--- 7.3/2023-05-26T14:39:52Z/2023-04-15T00:00:00Z/nm-bsd-ot31.txt Fri May 26 20:35:30 2023 +++ 7.3/2023-05-26T14:39:52Z/2023-04-22T00:00:00Z/nm-bsd-ot31.txt Fri May 26 21:23:53 2023 @@ -2,14 +2,14 @@ 00011006 A mp_pdirpa 0001419d A acpi_pdirpa 01000000 A __kernel_phys_base -02524000 T __kernel_kutext_phys -02528000 C __kernel_cptext_phys -02529000 C __kernel_rodata_phys -02ddc000 R __kernel_kutext_page_phys -02dde000 C __kernel_randomdata_phys -0309f000 R __kernel_data_phys -033d0000 D __kernel_kudata_phys -033d1000 C __kernel_bss_phys +02549000 T __kernel_kutext_phys +0254d000 C __kernel_cptext_phys +0254e000 C __kernel_rodata_phys +02e01000 R __kernel_kutext_page_phys +02e03000 C __kernel_randomdata_phys +030c4000 R __kernel_data_phys +033f5000 D __kernel_kudata_phys +033f6000 C __kernel_bss_phys 03800000 B __kernel_phys_end 80000000 A __kernel_virt_to_phys ffffffff80000000 A __kernel_base @@ -31,11 +31,11 @@ ffffffff81004000 T pcdisplay_cursor_reset ffffffff81004030 T pcdisplay_cursor_init ffffffff81004060 T pcdisplay_cursor ffffffff81004170 T pcdisplay_putchar -ffffffff81004230 T pcdisplay_getchar -ffffffff810042f0 T pcdisplay_copycols -ffffffff810043d0 T pcdisplay_erasecols -ffffffff81004520 T pcdisplay_copyrows -ffffffff81004600 T pcdisplay_eraserows +ffffffff81004240 T pcdisplay_getchar +ffffffff81004310 T pcdisplay_copycols +ffffffff810043f0 T pcdisplay_erasecols +ffffffff81004550 T pcdisplay_copyrows +ffffffff81004630 T pcdisplay_eraserows ffffffff81005000 T pcdisplay_mapchar ffffffff81006000 T drm_minor_acquire ffffffff81006080 T drm_dev_get @@ -49,245 +49,245 @@ ffffffff81006460 T drm_dev_unplug ffffffff81006480 T drm_dev_register ffffffff810067e0 T drm_dev_set_unique ffffffff81006850 T drm_attach_platform -ffffffff810068f0 T drmprint -ffffffff81006940 T drmsubmatch -ffffffff81006990 T drm_attach_pci -ffffffff81006aa0 T drm_pciprobe -ffffffff81006b40 T drm_find_description -ffffffff81006bf0 T drm_probe -ffffffff81006c40 T drm_attach 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vga_save_palette -ffffffff8100a510 T vga_common_attach -ffffffff8100a530 T vga_extended_attach -ffffffff8100a690 T vga_is_console -ffffffff8100a6f0 T vga_cnattach -ffffffff8100a7e0 T vga_restore_fonts -ffffffff8100a970 T vga_restore_palette -ffffffff8100aa20 T vga_setfont -ffffffff8100aaa0 T vga_doswitch -ffffffff8100ade0 T vga_unpack_attr -ffffffff8100ae70 T vga_copyrows -ffffffff8100b060 T _vga_mapchar -ffffffff8100b0c0 T vga_mapchar -ffffffff8100b200 T vga_putchar +ffffffff81009180 T vga_alloc_screen +ffffffff810092a0 T vga_free_screen +ffffffff81009390 T vga_show_screen +ffffffff81009420 T vga_load_font +ffffffff810096a0 T vga_list_font +ffffffff81009740 T vga_scrollback +ffffffff81009890 T vga_getchar +ffffffff810098b0 T vga_burner +ffffffff81009ab0 T vga_common_probe +ffffffff81009ce0 T vga_selectfont +ffffffff81009e20 T vga_init_screen +ffffffff8100a1d0 T vga_pack_attr +ffffffff8100a290 T vga_init +ffffffff8100a4c0 T vga_save_palette +ffffffff8100a560 T vga_common_attach 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edid_strchomp +ffffffff8100d1f0 T edid_is_valid +ffffffff8100d2d0 T edid_print +ffffffff8100d820 T edid_mode_lookup_list +ffffffff8100d8a0 T edid_std_timing +ffffffff8100da30 T edid_det_timing +ffffffff8100db90 T edid_block +ffffffff8100e030 T edid_parse ffffffff8100f000 T vesagtf_mode_params ffffffff8100f320 T vesagtf_mode ffffffff81010000 T mii_bitbang_sync -ffffffff810100c0 T mii_bitbang_sendbits -ffffffff810101f0 T mii_bitbang_readreg -ffffffff810107a0 T mii_bitbang_writereg +ffffffff810100d0 T mii_bitbang_sendbits +ffffffff81010200 T mii_bitbang_readreg +ffffffff810107c0 T mii_bitbang_writereg ffffffff81011000 T wdc_default_read_reg -ffffffff81011060 T wdc_default_write_reg -ffffffff810110e0 T wdc_default_lba48_write_reg -ffffffff81011130 T wdc_default_read_raw_multi_2 -ffffffff810111d0 T wdc_default_write_raw_multi_2 -ffffffff81011270 T wdc_default_read_raw_multi_4 -ffffffff81011310 T wdc_default_write_raw_multi_4 -ffffffff810113b0 T wdprint -ffffffff81011410 T wdc_disable_intr -ffffffff81011430 T wdc_enable_intr -ffffffff81011450 T wdc_set_drive -ffffffff81011480 T wdc_floating_bus -ffffffff81011560 T wdc_preata_drive -ffffffff81011810 T wdc_wait_for_status -ffffffff81011960 T wdc_ata_present -ffffffff81011c10 T wdccommandshort -ffffffff81011c60 T wdcprobe -ffffffff810120a0 T wdc_do_reset -ffffffff81012130 T __wdcwait_reset -ffffffff810122a0 T wdc_alloc_queue -ffffffff81012350 T wdc_xfer_get -ffffffff81012370 T wdc_xfer_put -ffffffff810123d0 T wdc_free_queue -ffffffff810123f0 T wdcattach -ffffffff81012710 T wdctimeout -ffffffff81012860 T wdcstart -ffffffff81012920 T wdcdetach -ffffffff810129e0 T wdc_kill_pending -ffffffff81012a40 T wdcintr -ffffffff81012b50 T wdc_reset_channel -ffffffff81012ba0 T wdcreset -ffffffff81012cd0 T wdc_dmawait -ffffffff81012df0 T __wdcerror -ffffffff81012e60 T wdc_probe_caps -ffffffff810131a0 T wdc_output_bytes -ffffffff81013250 T wdc_input_bytes -ffffffff81013300 T wdc_print_caps -ffffffff81013330 T wdc_print_current_modes -ffffffff810134e0 T wdc_downgrade_mode -ffffffff81013600 T wdc_exec_command -ffffffff81013760 T wdc_get_xfer -ffffffff81013780 T __wdccommand_start -ffffffff81013d00 T __wdccommand_intr -ffffffff81013f70 T __wdccommand_done -ffffffff810141b0 T wdc_exec_xfer -ffffffff810142d0 T wdccommand -ffffffff810143c0 T wdc_free_xfer -ffffffff810144e0 T wdccommandext -ffffffff810145e0 T wdc_scrub_xfer -ffffffff81014620 T wdcbit_bucket -ffffffff81014640 T wdc_ioc_ata_cmd -ffffffff81014850 T wdc_ioctl +ffffffff81011070 T wdc_default_write_reg +ffffffff810110f0 T wdc_default_lba48_write_reg +ffffffff81011140 T wdc_default_read_raw_multi_2 +ffffffff810111e0 T wdc_default_write_raw_multi_2 +ffffffff81011280 T wdc_default_read_raw_multi_4 +ffffffff81011320 T wdc_default_write_raw_multi_4 +ffffffff810113c0 T wdprint +ffffffff81011430 T wdc_disable_intr +ffffffff81011460 T wdc_enable_intr +ffffffff81011490 T wdc_set_drive +ffffffff810114c0 T wdc_floating_bus +ffffffff810115a0 T wdc_preata_drive +ffffffff81011850 T wdc_wait_for_status +ffffffff810119a0 T wdc_ata_present +ffffffff81011c50 T wdccommandshort +ffffffff81011ca0 T wdcprobe +ffffffff810120e0 T wdc_do_reset +ffffffff81012180 T __wdcwait_reset +ffffffff810122f0 T wdc_alloc_queue +ffffffff810123a0 T wdc_xfer_get +ffffffff810123c0 T wdc_xfer_put +ffffffff81012420 T wdc_free_queue +ffffffff81012440 T wdcattach +ffffffff81012760 T wdctimeout +ffffffff810128b0 T wdcstart +ffffffff81012980 T wdcdetach +ffffffff81012a40 T wdc_kill_pending +ffffffff81012aa0 T wdcintr +ffffffff81012bb0 T wdc_reset_channel +ffffffff81012c10 T wdcreset +ffffffff81012d40 T wdc_dmawait +ffffffff81012e70 T __wdcerror +ffffffff81012ee0 T wdc_probe_caps +ffffffff81013230 T wdc_output_bytes +ffffffff810132e0 T wdc_input_bytes +ffffffff81013390 T wdc_print_caps +ffffffff810133c0 T wdc_print_current_modes +ffffffff81013570 T wdc_downgrade_mode +ffffffff81013690 T wdc_exec_command +ffffffff810137f0 T wdc_get_xfer +ffffffff81013810 T __wdccommand_start +ffffffff81013d90 T __wdccommand_intr +ffffffff81014000 T __wdccommand_done +ffffffff81014240 T wdc_exec_xfer +ffffffff81014370 T wdccommand +ffffffff81014460 T wdc_free_xfer +ffffffff81014580 T wdccommandext +ffffffff81014680 T wdc_scrub_xfer +ffffffff810146d0 T wdcbit_bucket +ffffffff810146f0 T wdc_ioc_ata_cmd +ffffffff81014910 T wdc_ioctl ffffffff81015000 T ahc_restart ffffffff81015420 T ahc_run_qoutfifo -ffffffff81015650 T ahc_run_untagged_queues -ffffffff81015750 T ahc_run_untagged_queue -ffffffff81015a40 T ahc_handle_brkadrint -ffffffff81015c40 T ahc_dump_card_state -ffffffff81017180 T ahc_abort_scbs -ffffffff81017910 T ahc_shutdown -ffffffff810179c0 T ahc_handle_seqint -ffffffff8101a1c0 t ahc_fetch_devinfo -ffffffff8101a340 T ahc_print_devinfo -ffffffff8101a370 T ahc_freeze_devq -ffffffff8101a400 T ahc_update_neg_request -ffffffff8101a4c0 T ahc_qinfifo_requeue_tail -ffffffff8101a5d0 T ahc_index_busy_tcl -ffffffff8101a6c0 T ahc_clear_intstat -ffffffff8101a770 T ahc_reset_channel -ffffffff8101af60 T ahc_search_qinfifo -ffffffff8101b870 T ahc_handle_scsiint -ffffffff8101ca60 T ahc_clear_critical_section -ffffffff8101cd80 T ahc_scb_devinfo -ffffffff8101ce20 t ahc_handle_devreset -ffffffff8101cf30 T ahc_compile_devinfo -ffffffff8101cf90 T ahc_set_width -ffffffff8101d190 T ahc_set_syncrate -ffffffff8101d560 T ahc_find_syncrate -ffffffff8101d650 T ahc_find_period -ffffffff8101d6f0 T ahc_validate_offset -ffffffff8101d770 T ahc_validate_width -ffffffff8101d7d0 t ahc_update_pending_scbs -ffffffff8101db60 T ahc_set_tags -ffffffff8101dbd0 T ahc_lookup_phase_entry -ffffffff8101dcb0 T ahc_softc_init -ffffffff8101dd50 T ahc_softc_insert -ffffffff8101dee0 T ahc_set_unit -ffffffff8101df10 T ahc_set_name -ffffffff8101df40 T ahc_free -ffffffff8101e420 T ahc_reset -ffffffff8101e710 T ahc_probe_scbs -ffffffff8101e7f0 T ahc_alloc_scbs -ffffffff8101ea70 t ahc_createdmamem -ffffffff8101ec70 T ahc_controller_info -ffffffff8101ee00 T ahc_chip_init -ffffffff810200e0 T ahc_unbusy_tcl -ffffffff810201a0 T ahc_init -ffffffff81020ba0 t ahc_alloc_tstate -ffffffff81020f50 T ahc_intr_enable -ffffffff81020fe0 T ahc_busy_tcl -ffffffff810210a0 T ahc_match_scb -ffffffff81021170 t ahc_qinfifo_requeue -ffffffff810212b0 T ahc_search_untagged_queues -ffffffff81021540 T ahc_search_disc_list -ffffffff81021930 T ahc_calc_residual -ffffffff810219f0 T ahc_print_register -ffffffff81021b90 t ahc_build_transfer_msg -ffffffff81021fa0 t ahc_devlimited_syncrate -ffffffff810220d0 t ahc_parse_msg -ffffffff81022ea0 t ahc_patch1_func -ffffffff81022ed0 t ahc_patch2_func -ffffffff81022f00 t ahc_patch3_func -ffffffff81022f30 t ahc_patch0_func -ffffffff81022f60 t ahc_patch4_func -ffffffff81022f90 t ahc_patch5_func -ffffffff81022fc0 t ahc_patch6_func -ffffffff81022ff0 t ahc_patch7_func -ffffffff81023020 t ahc_patch8_func -ffffffff81023050 t ahc_patch9_func -ffffffff81023080 t ahc_patch10_func -ffffffff810230b0 t ahc_patch11_func -ffffffff810230e0 t ahc_patch12_func -ffffffff81023110 t ahc_patch13_func -ffffffff81023140 t ahc_patch14_func -ffffffff81023180 t ahc_patch15_func -ffffffff810231b0 t ahc_patch16_func -ffffffff810231e0 t ahc_patch17_func -ffffffff81023210 t ahc_patch18_func -ffffffff81023240 t ahc_patch19_func -ffffffff81023270 t ahc_patch20_func -ffffffff810232a0 t ahc_patch21_func -ffffffff810232d0 t ahc_patch22_func -ffffffff81023300 t ahc_patch23_func +ffffffff81015660 T ahc_run_untagged_queues +ffffffff81015770 T ahc_run_untagged_queue +ffffffff81015a60 T ahc_handle_brkadrint +ffffffff81015c70 T ahc_dump_card_state +ffffffff810171b0 T ahc_abort_scbs +ffffffff81017940 T ahc_shutdown +ffffffff81017a00 T ahc_handle_seqint +ffffffff8101a200 t ahc_fetch_devinfo +ffffffff8101a380 T ahc_print_devinfo +ffffffff8101a3b0 T ahc_freeze_devq +ffffffff8101a440 T ahc_update_neg_request +ffffffff8101a500 T ahc_qinfifo_requeue_tail +ffffffff8101a620 T ahc_index_busy_tcl +ffffffff8101a710 T ahc_clear_intstat +ffffffff8101a7c0 T ahc_reset_channel +ffffffff8101afc0 T ahc_search_qinfifo +ffffffff8101b8d0 T ahc_handle_scsiint +ffffffff8101cac0 T ahc_clear_critical_section +ffffffff8101cde0 T ahc_scb_devinfo +ffffffff8101ce90 t ahc_handle_devreset +ffffffff8101cfa0 T ahc_compile_devinfo +ffffffff8101d000 T ahc_set_width +ffffffff8101d200 T ahc_set_syncrate +ffffffff8101d5d0 T ahc_find_syncrate +ffffffff8101d6c0 T ahc_find_period +ffffffff8101d760 T ahc_validate_offset +ffffffff8101d7f0 T ahc_validate_width +ffffffff8101d850 t ahc_update_pending_scbs +ffffffff8101dbe0 T ahc_set_tags +ffffffff8101dc50 T ahc_lookup_phase_entry +ffffffff8101dd30 T ahc_softc_init +ffffffff8101dde0 T ahc_softc_insert +ffffffff8101df70 T ahc_set_unit +ffffffff8101dfa0 T ahc_set_name +ffffffff8101dfd0 T ahc_free +ffffffff8101e4b0 T ahc_reset +ffffffff8101e7b0 T ahc_probe_scbs +ffffffff8101e8a0 T ahc_alloc_scbs +ffffffff8101eb20 t ahc_createdmamem +ffffffff8101ed20 T ahc_controller_info +ffffffff8101eeb0 T ahc_chip_init +ffffffff810201a0 T ahc_unbusy_tcl +ffffffff81020260 T ahc_init +ffffffff81020c70 t ahc_alloc_tstate +ffffffff81021020 T ahc_intr_enable +ffffffff810210b0 T ahc_busy_tcl +ffffffff81021180 T ahc_match_scb +ffffffff81021250 t ahc_qinfifo_requeue +ffffffff81021390 T ahc_search_untagged_queues +ffffffff81021620 T ahc_search_disc_list +ffffffff81021a10 T ahc_calc_residual +ffffffff81021ad0 T ahc_print_register +ffffffff81021c70 t ahc_build_transfer_msg +ffffffff81022080 t ahc_devlimited_syncrate +ffffffff810221b0 t ahc_parse_msg +ffffffff81022f80 t ahc_patch1_func +ffffffff81022fc0 t ahc_patch2_func +ffffffff81023000 t ahc_patch3_func +ffffffff81023040 t ahc_patch0_func +ffffffff81023070 t ahc_patch4_func +ffffffff810230b0 t ahc_patch5_func +ffffffff810230f0 t ahc_patch6_func +ffffffff81023130 t ahc_patch7_func +ffffffff81023170 t ahc_patch8_func +ffffffff810231b0 t ahc_patch9_func +ffffffff810231f0 t ahc_patch10_func +ffffffff81023230 t ahc_patch11_func +ffffffff81023260 t ahc_patch12_func +ffffffff810232a0 t ahc_patch13_func +ffffffff810232e0 t ahc_patch14_func +ffffffff81023320 t ahc_patch15_func +ffffffff81023360 t ahc_patch16_func +ffffffff810233a0 t ahc_patch17_func +ffffffff810233d0 t ahc_patch18_func +ffffffff81023410 t ahc_patch19_func +ffffffff81023450 t ahc_patch20_func +ffffffff81023490 t ahc_patch21_func +ffffffff810234d0 t ahc_patch22_func +ffffffff81023510 t ahc_patch23_func ffffffff81024000 T ahc_attach ffffffff81024190 T ahc_platform_intr ffffffff810241e0 t ahc_intr ffffffff810243f0 T ahc_done ffffffff81024670 T ahc_action -ffffffff81024780 T ahc_timeout -ffffffff810248d0 T ahc_execute_scb -ffffffff81025060 T ahc_setup_data -ffffffff81025140 T ahc_adapter_req_set_xfer_mode -ffffffff81025360 T ahc_poll -ffffffff81025400 T ahc_platform_set_tags -ffffffff81025460 T ahc_softc_comp -ffffffff81025490 T ahc_send_async -ffffffff810254c0 T ahc_scb_alloc -ffffffff81025530 T ahc_scb_free +ffffffff81024790 T ahc_timeout +ffffffff810248f0 T ahc_execute_scb +ffffffff81025080 T ahc_setup_data +ffffffff81025160 T ahc_adapter_req_set_xfer_mode +ffffffff81025380 T ahc_poll +ffffffff81025430 T ahc_platform_set_tags +ffffffff810254a0 T ahc_softc_comp +ffffffff810254d0 T ahc_send_async +ffffffff81025500 T ahc_scb_alloc +ffffffff81025570 T ahc_scb_free ffffffff81026000 T ahc_check_extport ffffffff81026cf0 T ahc_acquire_seeprom -ffffffff81026e50 t verify_seeprom_cksum -ffffffff81026f40 T ahc_release_seeprom -ffffffff81026f70 t write_brdctl +ffffffff81026e60 t verify_seeprom_cksum +ffffffff81026f50 T ahc_release_seeprom +ffffffff81026f90 t write_brdctl ffffffff81028000 T ahd_currently_packetized ffffffff810281a0 T ahd_save_modes ffffffff81028230 T ahd_set_modes @@ -295,226 +295,226 @@ ffffffff810282b0 T ahd_restore_modes ffffffff81028340 T ahd_set_active_fifo ffffffff810283f0 T ahd_assert_modes ffffffff81028420 T ahd_restart -ffffffff81028670 T ahd_pause -ffffffff810286e0 T ahd_clear_msg_state -ffffffff810288a0 T ahd_unpause -ffffffff810289b0 T ahd_clear_fifo -ffffffff81028b60 T ahd_flush_qoutfifo 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-ffffffff8102fe40 T ahd_fetch_transinfo -ffffffff8102fe90 T ahd_set_width -ffffffff81030070 T ahd_set_syncrate -ffffffff81030460 T ahd_freeze_devq -ffffffff810304c0 T ahd_reinitialize_dataptrs -ffffffff81030930 T ahd_fetch_devinfo -ffffffff81030b30 T ahd_clear_intstat -ffffffff81030c60 T ahd_setup_initiator_msgout -ffffffff81030fe0 T ahd_handle_message_phase -ffffffff81031710 T ahd_find_busy_tcl -ffffffff81031880 T ahd_handle_proto_violation -ffffffff81031c60 T ahd_handle_ign_wide_residue -ffffffff81032080 T ahd_search_qinfifo -ffffffff81032c40 T ahd_abort_scbs -ffffffff81033120 T ahd_scb_devinfo -ffffffff81033190 T ahd_handle_devreset -ffffffff81033310 T ahd_handle_scsiint -ffffffff81033d00 T ahd_setup_iocell_workaround -ffffffff81033e80 T ahd_clear_critical_section -ffffffff810345c0 T ahd_handle_transmission_error -ffffffff81034c50 T ahd_iocell_first_selection -ffffffff81034e50 T ahd_handle_lqiphase_error -ffffffff81035000 T ahd_handle_pkt_busfree -ffffffff81035650 T ahd_handle_nonpkt_busfree -ffffffff81036110 T ahd_print_register -ffffffff810362b0 T ahd_lookup_phase_entry -ffffffff81036390 T ahd_sent_msg -ffffffff810364b0 T ahd_print_devinfo -ffffffff810364e0 T ahd_qinfifo_requeue_tail -ffffffff81036720 T ahd_force_renegotiation -ffffffff810367d0 T ahd_update_neg_request -ffffffff81036890 T ahd_print_scb -ffffffff81036a40 T ahd_dump_sglist -ffffffff81036b60 T ahd_alloc_tstate -ffffffff81036ef0 T ahd_devlimited_syncrate -ffffffff81037070 T ahd_find_syncrate -ffffffff81037120 T ahd_validate_offset -ffffffff810371a0 T ahd_validate_width -ffffffff81037200 T ahd_update_neg_table -ffffffff81037540 T ahd_update_pending_scbs -ffffffff810378f0 T ahd_set_tags -ffffffff81037900 T ahd_sync_scb -ffffffff81037930 T ahd_build_transfer_msg -ffffffff81037d50 T ahd_construct_ppr -ffffffff81037e70 T ahd_construct_sdtr -ffffffff81037f20 T ahd_construct_wdtr -ffffffff81037fb0 T ahd_parse_msg -ffffffff81038820 T ahd_handle_msg_reject -ffffffff81038f20 T ahd_busy_tcl -ffffffff81039030 T ahd_sg_virt_to_bus -ffffffff81039070 T ahd_sglist_size -ffffffff810390b0 T ahd_sglist_allocsize -ffffffff81039160 T ahd_alloc -ffffffff81039260 T ahd_softc_init -ffffffff81039290 T ahd_softc_insert -ffffffff81039360 T ahd_find_softc -ffffffff810393b0 T ahd_set_unit -ffffffff810393e0 T ahd_set_name -ffffffff81039440 T ahd_free -ffffffff81039720 T ahd_shutdown -ffffffff81039760 T ahd_freedmamem -ffffffff810397c0 T ahd_fini_scbdata -ffffffff810399a0 T ahd_reset -ffffffff81039c70 T ahd_known_modes -ffffffff81039cb0 T ahd_build_mode_state -ffffffff81039ce0 T ahd_chip_init -ffffffff8103b220 T ahd_probe_scbs -ffffffff8103b4a0 T ahd_initialize_hscbs -ffffffff8103b590 T ahd_init_scbdata -ffffffff8103b770 T ahd_scb_alloc -ffffffff8103b800 T ahd_scb_free -ffffffff8103b890 T ahd_alloc_scbs -ffffffff8103c050 T ahd_find_scb_by_tag -ffffffff8103c0c0 T ahd_createdmamem -ffffffff8103c340 T ahd_controller_info -ffffffff8103c3e0 T ahd_init -ffffffff8103c9a0 T ahd_probe_stack_size -ffffffff8103cac0 T ahd_write_flexport -ffffffff8103cc40 T ahd_read_flexport -ffffffff8103cd50 T ahd_reset_current_bus -ffffffff8103ce80 T ahd_stat_timer -ffffffff8103cfd0 T ahd_resolve_seqaddr -ffffffff8103d0f0 T ahd_sync_tqinfifo -ffffffff8103d120 T ahd_unbusy_tcl -ffffffff8103d220 T ahd_set_hnscb_qoff -ffffffff8103d240 T ahd_set_hescb_qoff -ffffffff8103d270 T ahd_set_snscb_qoff -ffffffff8103d2c0 T ahd_set_sescb_qoff -ffffffff8103d2f0 T ahd_set_sdscb_qoff -ffffffff8103d340 T ahd_update_coalescing_values -ffffffff8103d420 T ahd_enable_coalescing -ffffffff8103d480 T ahd_loadseq -ffffffff8103d820 T ahd_default_config -ffffffff8103d9b0 T ahd_parse_cfgdata -ffffffff8103dc80 T ahd_parse_vpddata -ffffffff8103dce0 T ahd_verify_vpd_cksum -ffffffff8103de20 T ahd_intr_enable -ffffffff8103deb0 T ahd_pause_and_flushwork -ffffffff8103e120 T ahd_intr -ffffffff8103e2e0 T ahd_suspend -ffffffff8103e360 T ahd_resume -ffffffff8103e3f0 T ahd_index_busy_tcl -ffffffff8103e4c0 T ahd_match_scb -ffffffff8103e530 T ahd_qinfifo_count -ffffffff8103e600 T ahd_qinfifo_requeue -ffffffff8103e730 T ahd_get_snscb_qoff -ffffffff8103e7e0 T ahd_reset_cmds_pending -ffffffff8103ea00 T ahd_done_with_status -ffffffff8103ea30 T ahd_search_scb_list -ffffffff8103ee00 T ahd_stitch_tid_list -ffffffff8103f0c0 T ahd_rem_wscb -ffffffff8103f250 T ahd_add_scb_to_free_list -ffffffff8103f280 T ahd_reset_poll -ffffffff8103f490 T ahd_handle_scsi_status -ffffffff8103f930 T ahd_calc_residual -ffffffff8103faa0 T ahd_sync_sense -ffffffff8103fad0 T ahd_update_residual -ffffffff8103fb10 T ahd_sg_setup -ffffffff8103fba0 T ahd_get_sense_bufaddr -ffffffff8103fbd0 T ahd_setup_data_scb -ffffffff8103fc60 T ahd_queue_scb -ffffffff8103fe80 T ahd_check_patch -ffffffff8103ff60 T ahd_download_instr -ffffffff810402d0 T ahd_dump_all_cards_state -ffffffff81040320 T ahd_check_cmdcmpltqueues -ffffffff810403a0 T ahd_dump_scbs -ffffffff81040760 T ahd_timeout -ffffffff81040830 T ahd_read_seeprom -ffffffff810409d0 T ahd_wait_seeprom -ffffffff81040a70 T ahd_write_seeprom -ffffffff81040d00 T ahd_verify_cksum -ffffffff81040df0 T ahd_acquire_seeprom -ffffffff81040e20 T ahd_release_seeprom -ffffffff81040e50 T ahd_wait_flexport -ffffffff81040ef0 T ahd_extract_mode_state -ffffffff81040f30 T ahd_setup_scb_common -ffffffff81040fa0 T ahd_setup_noxfer_scb -ffffffff81040ff0 T ahd_sg_size -ffffffff81041030 T ahd_sync_sglist -ffffffff810410b0 T ahd_targetcmd_offset -ffffffff810410f0 T ahd_get_hnscb_qoff -ffffffff81041140 T ahd_get_hescb_qoff -ffffffff81041190 T ahd_get_sescb_qoff -ffffffff810411e0 T ahd_get_sdscb_qoff -ffffffff81041250 T ahd_swap_with_next_hscb -ffffffff81041300 T ahd_get_sense_buf -ffffffff81041330 t ahd_patch1_func -ffffffff81041360 t ahd_patch0_func -ffffffff81041390 t ahd_patch2_func -ffffffff810413c0 t ahd_patch3_func -ffffffff810413f0 t ahd_patch4_func -ffffffff81041420 t ahd_patch5_func -ffffffff81041450 t ahd_patch6_func -ffffffff81041480 t ahd_patch7_func -ffffffff810414b0 t ahd_patch8_func -ffffffff810414e0 t ahd_patch9_func -ffffffff81041510 t ahd_patch10_func -ffffffff81041540 t ahd_patch11_func -ffffffff81041570 t ahd_patch12_func -ffffffff810415a0 t ahd_patch13_func -ffffffff810415d0 t ahd_patch14_func -ffffffff81041600 t ahd_patch15_func -ffffffff81041630 t ahd_patch16_func -ffffffff81041660 t ahd_patch17_func -ffffffff81041690 t ahd_patch18_func -ffffffff810416c0 t ahd_patch19_func -ffffffff810416f0 t ahd_patch20_func -ffffffff81041720 t ahd_patch21_func -ffffffff81041750 t ahd_patch22_func -ffffffff81041780 t ahd_patch23_func +ffffffff81028680 T ahd_pause +ffffffff810286f0 T ahd_clear_msg_state +ffffffff810288b0 T ahd_unpause +ffffffff810289c0 T ahd_clear_fifo +ffffffff81028b70 T ahd_flush_qoutfifo +ffffffff81029bb0 T ahd_get_scbptr +ffffffff81029c30 T ahd_inw +ffffffff81029cc0 T ahd_lookup_scb +ffffffff81029d40 T ahd_name +ffffffff81029d70 T ahd_scb_active_in_fifo +ffffffff81029e30 T ahd_run_data_fifo +ffffffff8102ad30 T ahd_set_scbptr +ffffffff8102ad80 T ahd_inb_scbram +ffffffff8102ae00 T ahd_outw +ffffffff8102ae70 T ahd_complete_scb +ffffffff8102aec0 T ahd_run_qoutfifo +ffffffff8102b090 T ahd_inw_scbram +ffffffff8102b160 T ahd_inl_scbram +ffffffff8102b2b0 T ahd_outq +ffffffff8102b460 T ahd_inq_scbram +ffffffff8102b4c0 T ahd_outl +ffffffff8102b5a0 T ahd_inl +ffffffff8102b680 T ahd_inq +ffffffff8102b800 T ahd_sg_bus_to_virt +ffffffff8102b850 T ahd_sync_qoutfifo +ffffffff8102b880 T ahd_dump_card_state +ffffffff8102e150 T ahd_handle_scb_status +ffffffff8102e1a0 T ahd_handle_hwerrint +ffffffff8102e330 T ahd_handle_seqint +ffffffff8102f8e0 T ahd_is_paused +ffffffff8102f930 T ahd_update_modes +ffffffff8102f9a0 T ahd_reset_channel +ffffffff8102fe20 T ahd_compile_devinfo +ffffffff8102fe80 T ahd_fetch_transinfo +ffffffff8102fed0 T ahd_set_width +ffffffff810300b0 T ahd_set_syncrate +ffffffff810304b0 T ahd_freeze_devq +ffffffff81030510 T ahd_reinitialize_dataptrs +ffffffff81030990 T ahd_fetch_devinfo +ffffffff81030ba0 T ahd_clear_intstat +ffffffff81030cd0 T ahd_setup_initiator_msgout +ffffffff81031050 T ahd_handle_message_phase +ffffffff81031780 T ahd_find_busy_tcl +ffffffff810318f0 T ahd_handle_proto_violation +ffffffff81031ce0 T ahd_handle_ign_wide_residue +ffffffff81032110 T ahd_search_qinfifo +ffffffff81032ce0 T ahd_abort_scbs +ffffffff810331c0 T ahd_scb_devinfo +ffffffff81033230 T ahd_handle_devreset +ffffffff810333c0 T ahd_handle_scsiint +ffffffff81033db0 T ahd_setup_iocell_workaround +ffffffff81033f40 T ahd_clear_critical_section +ffffffff81034680 T ahd_handle_transmission_error +ffffffff81034d20 T ahd_iocell_first_selection +ffffffff81034f30 T ahd_handle_lqiphase_error +ffffffff810350e0 T ahd_handle_pkt_busfree +ffffffff81035730 T ahd_handle_nonpkt_busfree +ffffffff810361f0 T ahd_print_register +ffffffff81036390 T ahd_lookup_phase_entry +ffffffff81036470 T ahd_sent_msg +ffffffff81036590 T ahd_print_devinfo +ffffffff810365c0 T ahd_qinfifo_requeue_tail +ffffffff81036800 T ahd_force_renegotiation +ffffffff810368b0 T ahd_update_neg_request +ffffffff81036970 T ahd_print_scb +ffffffff81036b20 T ahd_dump_sglist +ffffffff81036c40 T ahd_alloc_tstate +ffffffff81036fd0 T ahd_devlimited_syncrate +ffffffff81037160 T ahd_find_syncrate +ffffffff81037210 T ahd_validate_offset +ffffffff81037290 T ahd_validate_width +ffffffff810372f0 T ahd_update_neg_table +ffffffff81037630 T ahd_update_pending_scbs +ffffffff810379e0 T ahd_set_tags +ffffffff81037a00 T ahd_sync_scb +ffffffff81037a40 T ahd_build_transfer_msg +ffffffff81037e60 T ahd_construct_ppr +ffffffff81037f80 T ahd_construct_sdtr +ffffffff81038030 T ahd_construct_wdtr +ffffffff810380c0 T ahd_parse_msg +ffffffff81038930 T ahd_handle_msg_reject +ffffffff81039030 T ahd_busy_tcl +ffffffff81039140 T ahd_sg_virt_to_bus +ffffffff81039190 T ahd_sglist_size +ffffffff810391d0 T ahd_sglist_allocsize +ffffffff81039280 T ahd_alloc +ffffffff81039380 T ahd_softc_init +ffffffff810393c0 T ahd_softc_insert +ffffffff81039490 T ahd_find_softc +ffffffff810394f0 T ahd_set_unit +ffffffff81039520 T ahd_set_name +ffffffff81039580 T ahd_free +ffffffff81039860 T ahd_shutdown +ffffffff810398a0 T ahd_freedmamem +ffffffff81039910 T ahd_fini_scbdata +ffffffff81039af0 T ahd_reset +ffffffff81039dc0 T ahd_known_modes +ffffffff81039e00 T ahd_build_mode_state +ffffffff81039e30 T ahd_chip_init +ffffffff8103b380 T ahd_probe_scbs +ffffffff8103b600 T ahd_initialize_hscbs +ffffffff8103b6f0 T ahd_init_scbdata +ffffffff8103b8d0 T ahd_scb_alloc +ffffffff8103b970 T ahd_scb_free +ffffffff8103ba10 T ahd_alloc_scbs +ffffffff8103c1d0 T ahd_find_scb_by_tag +ffffffff8103c250 T ahd_createdmamem +ffffffff8103c4d0 T ahd_controller_info +ffffffff8103c570 T ahd_init +ffffffff8103cb40 T ahd_probe_stack_size +ffffffff8103cc70 T ahd_write_flexport +ffffffff8103cdf0 T ahd_read_flexport +ffffffff8103cf00 T ahd_reset_current_bus +ffffffff8103d040 T ahd_stat_timer +ffffffff8103d190 T ahd_resolve_seqaddr +ffffffff8103d2b0 T ahd_sync_tqinfifo +ffffffff8103d2e0 T ahd_unbusy_tcl +ffffffff8103d3f0 T ahd_set_hnscb_qoff +ffffffff8103d420 T ahd_set_hescb_qoff +ffffffff8103d450 T ahd_set_snscb_qoff +ffffffff8103d4a0 T ahd_set_sescb_qoff +ffffffff8103d4d0 T ahd_set_sdscb_qoff +ffffffff8103d520 T ahd_update_coalescing_values +ffffffff8103d600 T ahd_enable_coalescing +ffffffff8103d660 T ahd_loadseq +ffffffff8103da00 T ahd_default_config +ffffffff8103dba0 T ahd_parse_cfgdata +ffffffff8103de70 T ahd_parse_vpddata +ffffffff8103ded0 T ahd_verify_vpd_cksum +ffffffff8103e010 T ahd_intr_enable +ffffffff8103e0a0 T ahd_pause_and_flushwork +ffffffff8103e310 T ahd_intr +ffffffff8103e4d0 T ahd_suspend +ffffffff8103e560 T ahd_resume +ffffffff8103e5f0 T ahd_index_busy_tcl +ffffffff8103e6d0 T ahd_match_scb +ffffffff8103e750 T ahd_qinfifo_count +ffffffff8103e820 T ahd_qinfifo_requeue +ffffffff8103e960 T ahd_get_snscb_qoff +ffffffff8103ea10 T ahd_reset_cmds_pending +ffffffff8103ec40 T ahd_done_with_status +ffffffff8103ec70 T ahd_search_scb_list +ffffffff8103f040 T ahd_stitch_tid_list +ffffffff8103f310 T ahd_rem_wscb +ffffffff8103f4b0 T ahd_add_scb_to_free_list +ffffffff8103f4e0 T ahd_reset_poll +ffffffff8103f6f0 T ahd_handle_scsi_status +ffffffff8103fb90 T ahd_calc_residual +ffffffff8103fd00 T ahd_sync_sense +ffffffff8103fd30 T ahd_update_residual +ffffffff8103fd70 T ahd_sg_setup +ffffffff8103fe00 T ahd_get_sense_bufaddr +ffffffff8103fe30 T ahd_setup_data_scb +ffffffff8103fec0 T ahd_queue_scb +ffffffff810400f0 T ahd_check_patch +ffffffff810401d0 T ahd_download_instr +ffffffff81040540 T ahd_dump_all_cards_state +ffffffff810405a0 T ahd_check_cmdcmpltqueues +ffffffff81040630 T ahd_dump_scbs +ffffffff810409f0 T ahd_timeout +ffffffff81040ad0 T ahd_read_seeprom +ffffffff81040c70 T ahd_wait_seeprom +ffffffff81040d20 T ahd_write_seeprom +ffffffff81040fc0 T ahd_verify_cksum +ffffffff810410b0 T ahd_acquire_seeprom +ffffffff810410e0 T ahd_release_seeprom +ffffffff81041110 T ahd_wait_flexport +ffffffff810411c0 T ahd_extract_mode_state +ffffffff81041200 T ahd_setup_scb_common +ffffffff81041280 T ahd_setup_noxfer_scb +ffffffff810412d0 T ahd_sg_size +ffffffff81041310 T ahd_sync_sglist +ffffffff81041390 T ahd_targetcmd_offset +ffffffff810413d0 T ahd_get_hnscb_qoff +ffffffff81041420 T ahd_get_hescb_qoff +ffffffff81041470 T ahd_get_sescb_qoff +ffffffff810414c0 T ahd_get_sdscb_qoff +ffffffff81041540 T ahd_swap_with_next_hscb +ffffffff81041600 T ahd_get_sense_buf +ffffffff81041630 t ahd_patch1_func +ffffffff81041670 t ahd_patch0_func +ffffffff810416a0 t ahd_patch2_func +ffffffff810416e0 t ahd_patch3_func +ffffffff81041720 t ahd_patch4_func +ffffffff81041760 t ahd_patch5_func +ffffffff81041790 t ahd_patch6_func +ffffffff810417d0 t ahd_patch7_func +ffffffff81041810 t ahd_patch8_func +ffffffff81041850 t ahd_patch9_func +ffffffff81041890 t ahd_patch10_func +ffffffff810418d0 t ahd_patch11_func +ffffffff81041910 t ahd_patch12_func +ffffffff81041950 t ahd_patch13_func +ffffffff81041990 t ahd_patch14_func +ffffffff810419d0 t ahd_patch15_func +ffffffff81041a10 t ahd_patch16_func +ffffffff81041a50 t ahd_patch17_func +ffffffff81041a90 t ahd_patch18_func +ffffffff81041ad0 t ahd_patch19_func +ffffffff81041b10 t ahd_patch20_func +ffffffff81041b50 t ahd_patch21_func +ffffffff81041b90 t ahd_patch22_func +ffffffff81041bd0 t ahd_patch23_func ffffffff81042000 T ahd_attach -ffffffff81042120 T ahd_platform_intr -ffffffff81042130 T ahd_done -ffffffff81042360 T ahd_action -ffffffff810424c0 T ahd_execute_scb -ffffffff81042880 T ahd_setup_data -ffffffff81042960 T ahd_adapter_req_set_xfer_mode -ffffffff81042b80 T ahd_poll -ffffffff81042c20 T ahd_platform_set_tags -ffffffff81042ca0 T ahd_softc_comp -ffffffff81042cd0 T ahd_detach -ffffffff81042d30 T aic_timer_reset -ffffffff81042da0 T aic_scb_timer_reset -ffffffff81042e40 T ahd_flush_device_writes -ffffffff81042e60 T aic_platform_scb_free -ffffffff81042ed0 T ahd_print_path -ffffffff81042ef0 T ahd_platform_dump_card_state +ffffffff81042130 T ahd_platform_intr +ffffffff81042140 T ahd_done +ffffffff81042370 T ahd_action +ffffffff810424d0 T ahd_execute_scb +ffffffff81042890 T ahd_setup_data +ffffffff81042970 T ahd_adapter_req_set_xfer_mode +ffffffff81042ba0 T ahd_poll +ffffffff81042c50 T ahd_platform_set_tags +ffffffff81042cd0 T ahd_softc_comp +ffffffff81042d00 T ahd_detach +ffffffff81042d60 T aic_timer_reset +ffffffff81042dd0 T aic_scb_timer_reset +ffffffff81042e70 T ahd_flush_device_writes +ffffffff81042e90 T aic_platform_scb_free +ffffffff81042f00 T ahd_print_path +ffffffff81042f20 T ahd_platform_dump_card_state ffffffff81043000 T aic_scsi_cmd ffffffff810432a0 T aic_find ffffffff81043720 T aicattach @@ -526,72 +526,72 @@ ffffffff81043ce0 T aic_acb_alloc ffffffff81043d80 T aic_acb_free ffffffff81043df0 T aic_done ffffffff81043fd0 T aic_timeout -ffffffff81044060 T aic_sched -ffffffff81044280 T aic_poll -ffffffff81044360 T aicintr -ffffffff81044e90 T aic_sched_msgout -ffffffff81044f10 T aic_setsync -ffffffff81044f40 T aic_select -ffffffff81045010 T aic_reselect -ffffffff810452e0 T aic_sense -ffffffff81045500 T aic_dequeue -ffffffff81045570 T aic_msgin -ffffffff81045c10 T aic_msgout -ffffffff81045ed0 T aic_dataout_pio -ffffffff81046280 T aic_datain_pio -ffffffff810465a0 T aic_abort -ffffffff810466d0 T aic_show_scsi_cmd -ffffffff81046780 T aic_print_acb -ffffffff810467d0 T aic_print_active_acb -ffffffff81046930 T aic_dump6360 -ffffffff81046b00 T aic_dump_driver +ffffffff81044070 T aic_sched +ffffffff81044290 T aic_poll +ffffffff81044370 T aicintr +ffffffff81044ea0 T aic_sched_msgout +ffffffff81044f20 T aic_setsync +ffffffff81044f50 T aic_select +ffffffff81045030 T aic_reselect +ffffffff81045300 T aic_sense +ffffffff81045530 T aic_dequeue +ffffffff810455a0 T aic_msgin +ffffffff81045c40 T aic_msgout +ffffffff81045f00 T aic_dataout_pio +ffffffff810462b0 T aic_datain_pio +ffffffff810465d0 T aic_abort +ffffffff81046700 T aic_show_scsi_cmd +ffffffff810467b0 T aic_print_acb +ffffffff81046810 T aic_print_active_acb +ffffffff81046970 T aic_dump6360 +ffffffff81046b50 T aic_dump_driver ffffffff81047000 T adw_scsi_cmd ffffffff810471f0 T adw_alloc_controls ffffffff81047360 T adw_alloc_carriers -ffffffff81047500 T adw_create_ccbs -ffffffff81047680 T adw_init_ccb -ffffffff81047760 T adw_ccb_free -ffffffff810477f0 T adw_reset_ccb -ffffffff81047820 T adw_ccb_alloc -ffffffff810478e0 T adw_ccb_phys_kv -ffffffff81047940 T adw_queue_ccb -ffffffff81047b30 T adw_timeout -ffffffff81047c00 T adw_init -ffffffff81047d10 T adw_isr_callback -ffffffff81048000 T adw_async_callback -ffffffff810480b0 T adw_attach -ffffffff81048390 T adw_build_req -ffffffff81048640 T adw_poll -ffffffff81048710 T adw_build_sglist -ffffffff810487e0 T adw_intr -ffffffff81048820 T adw_print_info -ffffffff810489d0 T adw_reset_bus +ffffffff81047510 T adw_create_ccbs +ffffffff81047690 T adw_init_ccb +ffffffff81047770 T adw_ccb_free +ffffffff81047800 T adw_reset_ccb +ffffffff81047830 T adw_ccb_alloc +ffffffff810478f0 T adw_ccb_phys_kv +ffffffff81047950 T adw_queue_ccb +ffffffff81047b50 T adw_timeout +ffffffff81047c30 T adw_init +ffffffff81047d40 T adw_isr_callback +ffffffff81048030 T adw_async_callback +ffffffff810480f0 T adw_attach +ffffffff810483d0 T adw_build_req +ffffffff81048680 T adw_poll +ffffffff81048750 T adw_build_sglist +ffffffff81048820 T adw_intr +ffffffff81048860 T adw_print_info +ffffffff81048a20 T adw_reset_bus ffffffff81049000 T gdt_scsi_cmd -ffffffff81049470 T gdt_attach -ffffffff8104a370 T gdt_clear_events -ffffffff8104a3a0 T gdt_ccb_alloc -ffffffff8104a440 T gdt_ccb_free -ffffffff8104a500 T gdt_internal_cmd -ffffffff8104a820 T gdt_eval_mapping -ffffffff8104a8c0 T gdt_ioctl -ffffffff8104a9a0 T gdt_enqueue -ffffffff8104aa00 T gdt_dequeue -ffffffff8104aa50 T gdt_internal_cache_cmd -ffffffff8104acb0 T gdt_enqueue_ccb -ffffffff8104ad10 T gdt_wait -ffffffff8104adf0 T gdt_exec_ccb -ffffffff8104b040 T gdt_async_event -ffffffff8104b070 T gdt_sync_event -ffffffff8104b0c0 T gdt_intr -ffffffff8104b300 T gdt_chain -ffffffff8104b340 T gdt_timeout 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+ffffffff8104b670 T gdt_ioctl_disk +ffffffff8104b6a0 T gdt_ioctl_alarm +ffffffff8104b6d0 T gdt_ioctl_setstate ffffffff8104c000 T twe_scsi_cmd ffffffff8104c460 T twe_get_ccb ffffffff8104c500 T twe_put_ccb @@ -602,79 +602,79 @@ ffffffff8104d2e0 T twe_cmd ffffffff8104d5f0 T twe_thread_create ffffffff8104d670 T twe_thread ffffffff8104d830 T twe_done -ffffffff8104d9e0 T twe_start -ffffffff8104db10 T twe_complete -ffffffff8104dc80 T twe_intr +ffffffff8104d9f0 T twe_start +ffffffff8104db30 T twe_complete +ffffffff8104dca0 T twe_intr ffffffff8104e000 T ciss_scsi_cmd ffffffff8104e160 T ciss_scsi_ioctl ffffffff8104e180 T ciss_get_ccb ffffffff8104e200 T ciss_put_ccb -ffffffff8104e260 T ciss_attach -ffffffff8104ecd0 T ciss_inq -ffffffff8104edc0 T ciss_heartbeat -ffffffff8104ee50 T ciss_ldmap -ffffffff8104ef60 T ciss_pdscan -ffffffff8104f290 T ciss_ioctl -ffffffff8104f8e0 T ciss_sensors -ffffffff8104f9a0 T ciss_shutdown -ffffffff8104f9d0 T ciss_sync -ffffffff8104faf0 T ciss_cmd -ffffffff81050060 T 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drm_vma_offset_add -ffffffff81976170 T drm_vma_offset_remove -ffffffff819761c0 T drm_vma_node_allow -ffffffff819761d0 t vma_node_allow -ffffffff81976300 T drm_vma_node_allow_once -ffffffff81976310 T drm_vma_node_revoke -ffffffff81976390 T drm_vma_node_is_allowed -ffffffff81977000 T hdmi_avi_infoframe_init -ffffffff81977070 T hdmi_avi_infoframe_check -ffffffff819770c0 T hdmi_avi_infoframe_pack_only -ffffffff819772c0 T hdmi_avi_infoframe_pack -ffffffff81977320 T hdmi_spd_infoframe_init -ffffffff819773d0 T hdmi_spd_infoframe_check -ffffffff81977420 T hdmi_spd_infoframe_pack_only -ffffffff81977550 T hdmi_spd_infoframe_pack -ffffffff819776a0 T hdmi_audio_infoframe_init -ffffffff819776f0 T hdmi_audio_infoframe_check -ffffffff81977740 T hdmi_audio_infoframe_pack_only -ffffffff81977890 T hdmi_audio_infoframe_pack -ffffffff819778e0 T hdmi_audio_infoframe_pack_for_dp -ffffffff819779d0 T hdmi_vendor_infoframe_init -ffffffff81977a30 T hdmi_vendor_infoframe_check -ffffffff81977ad0 T hdmi_vendor_infoframe_pack_only -ffffffff81977ca0 T hdmi_vendor_infoframe_pack -ffffffff81977d40 T hdmi_drm_infoframe_init -ffffffff81977da0 T hdmi_drm_infoframe_check -ffffffff81977df0 T hdmi_drm_infoframe_pack_only -ffffffff81977fc0 T hdmi_drm_infoframe_pack -ffffffff81978010 T hdmi_infoframe_check -ffffffff81978160 T hdmi_infoframe_pack_only -ffffffff81978370 T hdmi_infoframe_pack -ffffffff819784e0 T hdmi_infoframe_log -ffffffff81979480 T hdmi_drm_infoframe_unpack_only -ffffffff81979560 T hdmi_infoframe_unpack -ffffffff8197a000 T list_sort -ffffffff8197b000 T radix_tree_lookup -ffffffff8197b0b0 T radix_tree_iter_find -ffffffff8197b190 T radix_tree_delete -ffffffff8197b320 T radix_tree_iter_delete -ffffffff8197b340 T radix_tree_insert -ffffffff8197c000 T sort -ffffffff8197c040 t qsort -ffffffff8197e000 T drm_dp_dual_mode_read -ffffffff8197e110 T drm_dp_dual_mode_write -ffffffff8197e1f0 T drm_dp_dual_mode_detect -ffffffff8197e490 T drm_dp_dual_mode_max_tmds_clock -ffffffff8197e5b0 T drm_dp_dual_mode_get_tmds_output -ffffffff8197e6e0 T drm_dp_dual_mode_set_tmds_output -ffffffff8197e970 T drm_dp_get_dual_mode_type_name -ffffffff8197e9e0 T drm_lspcon_get_mode -ffffffff8197eb90 T drm_lspcon_set_mode -ffffffff8197f000 T drm_dp_channel_eq_ok -ffffffff8197f080 T drm_dp_clock_recovery_ok -ffffffff8197f100 T drm_dp_get_adjust_request_voltage -ffffffff8197f140 T drm_dp_get_adjust_request_pre_emphasis -ffffffff8197f180 T drm_dp_get_adjust_tx_ffe_preset -ffffffff8197f1c0 T drm_dp_128b132b_lane_channel_eq_done -ffffffff8197f240 T drm_dp_128b132b_lane_symbol_locked -ffffffff8197f2b0 T drm_dp_128b132b_eq_interlane_align_done -ffffffff8197f2e0 T drm_dp_128b132b_cds_interlane_align_done -ffffffff8197f310 T drm_dp_128b132b_link_training_failed -ffffffff8197f340 T drm_dp_read_clock_recovery_delay -ffffffff8197f440 T drm_dp_read_channel_eq_delay -ffffffff8197f530 T drm_dp_128b132b_read_aux_rd_interval -ffffffff8197f5e0 T drm_dp_link_train_clock_recovery_delay -ffffffff8197f660 t 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drm_dp_pcon_hdmi_frl_link_error_count -ffffffff81981f30 T drm_dp_pcon_enc_is_dsc_1_2 -ffffffff81981f60 T drm_dp_pcon_dsc_max_slices -ffffffff81981ff0 T drm_dp_pcon_dsc_max_slice_width -ffffffff81982020 T drm_dp_pcon_dsc_bpp_incr -ffffffff81982060 T drm_dp_pcon_pps_default -ffffffff819820e0 T drm_dp_pcon_pps_override_buf -ffffffff81982190 T drm_dp_pcon_pps_override_param -ffffffff81982270 T drm_dp_pcon_convert_rgb_to_ycbcr -ffffffff81982300 T drm_edp_backlight_set_level -ffffffff819823e0 T drm_edp_backlight_enable -ffffffff819825f0 t drm_edp_backlight_set_enable -ffffffff81982730 T drm_edp_backlight_disable -ffffffff81982770 T drm_edp_backlight_init -ffffffff81982cc0 T drm_panel_dp_aux_backlight -ffffffff81982e50 t __128b132b_channel_eq_delay_us -ffffffff81982ed0 t __8b10b_channel_eq_delay_us -ffffffff81982f50 t drm_dp_aux_get_crc -ffffffff81983020 t drm_dp_i2c_xfer -ffffffff81983270 t drm_dp_i2c_functionality -ffffffff819832a0 t drm_dp_i2c_do_msg -ffffffff81983680 t lock_bus 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drm_dp_add_payload_part2 -ffffffff81986340 T drm_dp_get_vc_payload_bw -ffffffff819863d0 T drm_dp_read_mst_cap -ffffffff81986430 T drm_dp_mst_topology_mgr_set_mst -ffffffff819866f0 t drm_dp_dpcd_write_payload -ffffffff81986880 t drm_dp_mst_topology_put_mstb -ffffffff81986980 T drm_dp_mst_topology_mgr_suspend -ffffffff81986a40 t drm_dp_mst_topology_mgr_invalidate_mstb -ffffffff81986ab0 T drm_dp_mst_topology_mgr_resume -ffffffff81986cf0 T drm_dp_mst_hpd_irq -ffffffff81987b60 T drm_dp_mst_detect_port -ffffffff81987cd0 T drm_dp_mst_get_edid -ffffffff81987dd0 T drm_dp_atomic_find_time_slots -ffffffff819880a0 T drm_atomic_get_mst_topology_state -ffffffff819880b0 T drm_dp_atomic_release_time_slots -ffffffff819882d0 T drm_dp_mst_atomic_setup_commit -ffffffff81988460 T drm_dp_mst_atomic_wait_for_dependencies -ffffffff819885e0 T drm_dp_mst_root_conn_atomic_check -ffffffff819886f0 T drm_dp_mst_update_slots -ffffffff81988740 T drm_dp_check_act_status -ffffffff819888f0 T drm_dp_calc_pbn_mode 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xl_reset +ffffffff810a6700 T xl_mediacheck +ffffffff810a67d0 T xl_choose_xcvr +ffffffff810a6b40 T xl_list_tx_init +ffffffff810a6c20 T xl_list_tx_init_90xB +ffffffff810a6d60 T xl_list_rx_init +ffffffff810a6e90 T xl_fill_rx_ring +ffffffff810a6f30 T xl_newbuf +ffffffff810a70c0 T xl_rxeof +ffffffff810a7480 T xl_txeof +ffffffff810a7680 T xl_txeof_90xB +ffffffff810a77d0 T xl_txeoc +ffffffff810a7ac0 T xl_intr +ffffffff810a7cf0 T xl_stats_update +ffffffff810a8010 T xl_encap +ffffffff810a8280 T xl_start +ffffffff810a8550 T xl_start_90xB +ffffffff810a86f0 T xl_ifmedia_upd +ffffffff810a8780 T xl_ifmedia_sts +ffffffff810a89b0 T xl_ioctl +ffffffff810a8b50 T xl_watchdog +ffffffff810a8c60 T xl_freetxrx +ffffffff810a8db0 T xl_attach +ffffffff810a96f0 T xl_wol +ffffffff810a97c0 T xl_detach +ffffffff810aa000 T fxp_scb_wait +ffffffff810aa0b0 T fxp_eeprom_shiftin +ffffffff810aa1c0 T fxp_eeprom_putword +ffffffff810aab30 T fxp_write_eeprom +ffffffff810aabb0 T fxp_activate +ffffffff810aac70 T fxp_stop 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dc_eeprom_putbyte +ffffffff810b8e50 T dc_eeprom_getword_pnic +ffffffff810b8f10 T dc_eeprom_getword_xircom +ffffffff810b9050 T dc_eeprom_getword +ffffffff810b9860 T dc_read_eeprom +ffffffff810b9af0 T dc_mii_writebit +ffffffff810b9bc0 T dc_mii_readbit +ffffffff810b9cd0 T dc_mii_sync +ffffffff810b9de0 T dc_mii_send +ffffffff810b9f00 T dc_mii_readreg +ffffffff810ba790 T dc_mii_writereg +ffffffff810bafc0 T dc_miibus_readreg +ffffffff810bb210 T dc_miibus_writereg +ffffffff810bb3f0 T dc_miibus_statchg +ffffffff810bb470 T dc_setcfg +ffffffff810bc4a0 T dc_crc_le +ffffffff810bc550 T dc_setfilt_21143 +ffffffff810bc950 T dc_setfilt_admtek +ffffffff810bcbf0 T dc_setfilt_asix +ffffffff810bce90 T dc_setfilt_xircom +ffffffff810bd2e0 T dc_setfilt +ffffffff810bd380 T dc_apply_fixup +ffffffff810bd4c0 T dc_reset +ffffffff810bd730 T dc_decode_leaf_sia +ffffffff810bd7e0 T dc_decode_leaf_sym +ffffffff810bd890 T dc_decode_leaf_mii +ffffffff810bd930 T dc_read_srom +ffffffff810bd9b0 T dc_parse_21143_srom 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smc91cxx_mii_writereg +ffffffff810c1d80 T smc91cxx_statchg +ffffffff810c1e20 T smc91cxx_mediachange +ffffffff810c1f40 T smc91cxx_mediastatus +ffffffff810c2010 T smc91cxx_set_media +ffffffff810c2120 T smc91cxx_init +ffffffff810c24c0 T smc91cxx_tick +ffffffff810c2560 T smc91cxx_intr +ffffffff810c29b0 T smc91cxx_read +ffffffff810c2be0 T smc91cxx_enable +ffffffff810c2c70 T smc91cxx_disable +ffffffff810c2cd0 T smc91cxx_reset +ffffffff810c2d90 T smc91cxx_detach +ffffffff810c3000 T epic_attach +ffffffff810c3790 T epic_tick +ffffffff810c37e0 T epic_reset +ffffffff810c3860 T epic_read_eeprom +ffffffff810c3cc0 T epic_mii_read +ffffffff810c3e00 T epic_mii_write +ffffffff810c3ee0 T epic_statchg +ffffffff810c3fa0 T epic_mediachange +ffffffff810c41d0 T epic_mediastatus +ffffffff810c4230 T epic_ioctl +ffffffff810c4360 T epic_start +ffffffff810c47c0 T epic_watchdog +ffffffff810c4800 T epic_init +ffffffff810c4d30 T epic_stop +ffffffff810c4ed0 T epic_set_mchash +ffffffff810c5030 T epic_intr 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gem_fill_rx_ring +ffffffff810cba70 T gem_bitwait +ffffffff810cbb20 T gem_reset_rx +ffffffff810cbce0 T gem_reset_tx +ffffffff810cbea0 T gem_rxdrain +ffffffff810cbf70 T gem_disable_rx +ffffffff810cc030 T gem_disable_tx +ffffffff810cc0f0 T gem_meminit +ffffffff810cc270 T gem_ringsize +ffffffff810cc350 T gem_init +ffffffff810cc660 T gem_init_regs +ffffffff810cca30 T gem_iff +ffffffff810ccdc0 T gem_rint +ffffffff810ccff0 T gem_add_rxbuf +ffffffff810cd190 T gem_eint +ffffffff810cd1f0 T gem_pint +ffffffff810cd260 T gem_intr +ffffffff810cd430 T gem_tint +ffffffff810cd570 T gem_load_mbuf +ffffffff810ce000 T ti_eeprom_putbyte +ffffffff810ce270 T ti_eeprom_getbyte +ffffffff810cea40 T ti_read_eeprom +ffffffff810cead0 T ti_mem_read +ffffffff810cebd0 T ti_mem_write +ffffffff810cece0 T ti_mem_set +ffffffff810cede0 T ti_loadfw +ffffffff810cf300 T ti_cmd +ffffffff810cf3a0 T ti_cmd_ext +ffffffff810cf4a0 T ti_handle_events +ffffffff810cf770 T ti_ifmedia_sts +ffffffff810cf910 T ti_init2 +ffffffff810cfee0 T ti_stats_update +ffffffff810cff70 T ti_newbuf_std +ffffffff810d0150 T ti_newbuf_mini +ffffffff810d0330 T ti_newbuf_jumbo +ffffffff810d04f0 T ti_init_rx_ring_std +ffffffff810d0600 T ti_free_rx_ring_std +ffffffff810d06d0 T ti_init_rx_ring_jumbo +ffffffff810d07e0 T ti_free_rx_ring_jumbo +ffffffff810d0890 T ti_init_rx_ring_mini +ffffffff810d0930 T ti_free_rx_ring_mini +ffffffff810d0a10 T ti_free_tx_ring +ffffffff810d0b20 T ti_init_tx_ring +ffffffff810d0c50 T ti_add_mcast +ffffffff810d0e60 T ti_del_mcast +ffffffff810d1070 T ti_iff +ffffffff810d1360 T ti_64bitslot_war +ffffffff810d14a0 T ti_chipinit +ffffffff810d1780 T ti_chipinit_sbus +ffffffff810d17e0 T ti_chipinit_pci +ffffffff810d19d0 T ti_gibinit +ffffffff810d1ef0 T ti_attach +ffffffff810d2430 T ti_ioctl +ffffffff810d25b0 T ti_start +ffffffff810d2700 T ti_watchdog +ffffffff810d2790 T ti_ifmedia_upd +ffffffff810d2a80 T ti_rxeof +ffffffff810d2f30 T ti_txeof_tigon1 +ffffffff810d30d0 T ti_txeof_tigon2 +ffffffff810d3210 T ti_intr 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ath_initkeytable +ffffffff81105200 T ath_startrecv +ffffffff81105360 T ath_setcurmode +ffffffff811054d0 T ath_draintxq +ffffffff81105710 T ath_stoprecv +ffffffff81105790 T ath_beacon_free +ffffffff81105800 T ath_beacon_config +ffffffff81105ab0 T ath_tx_start +ffffffff81106430 T ath_mode_init +ffffffff811064f0 T ath_mcastfilter_accum +ffffffff811065a0 T ath_mcastfilter_compute +ffffffff811066a0 T ath_calcrxfilter +ffffffff81106730 T ath_getmbuf +ffffffff811067e0 T ath_beacon_alloc +ffffffff81106a50 T ath_rxbuf_init +ffffffff81106c10 T ath_chan_set +ffffffff81106f20 T ath_ledstate +ffffffff81106fe0 T ath_rssadapt_updatenode +ffffffff81107000 T ath_gpio_pin_read +ffffffff81107050 T ath_gpio_pin_write +ffffffff81107080 T ath_gpio_pin_ctl +ffffffff81108000 T athn_config_ht +ffffffff81108130 T athn_attach +ffffffff811089e0 T athn_get_chipid +ffffffff81108a80 T athn_reset_power_on +ffffffff81108be0 T athn_set_power_awake +ffffffff81108e30 T athn_set_power_sleep +ffffffff81108f30 T athn_get_mac_name +ffffffff81109020 T athn_get_rf_name +ffffffff811090b0 T athn_next_scan +ffffffff81109100 T athn_calib_to +ffffffff81109370 T athn_get_chanlist +ffffffff81109480 T athn_ioctl +ffffffff811096b0 T athn_start +ffffffff81109860 T athn_watchdog +ffffffff81109900 T athn_node_alloc +ffffffff81109980 T athn_newassoc +ffffffff81109cc0 T athn_updateslot +ffffffff81109ed0 T athn_updateedca +ffffffff81109fe0 T athn_set_key +ffffffff8110a250 T athn_delete_key +ffffffff8110a390 T athn_newstate +ffffffff8110a8d0 T athn_media_change +ffffffff8110aab0 T athn_radiotap_attach +ffffffff8110ab40 T athn_detach +ffffffff8110ac90 T athn_tx_reclaim +ffffffff8110ad80 T athn_rx_start +ffffffff8110afd0 T athn_set_rxfilter +ffffffff8110b050 T athn_set_opmode +ffffffff8110b180 T athn_intr +ffffffff8110b1d0 T athn_reset +ffffffff8110b380 T athn_init_pll +ffffffff8110b500 T athn_write_serdes +ffffffff8110b570 T athn_config_pcie +ffffffff8110b660 T athn_config_nonpcie +ffffffff8110b780 T athn_set_chan +ffffffff8110ba50 T athn_tx_pending +ffffffff8110bad0 T athn_switch_chan +ffffffff8110bef0 T athn_disable_interrupts +ffffffff8110c010 T athn_stop_tx_dma +ffffffff8110c360 T athn_stop_rx_dma +ffffffff8110c430 T athn_hw_reset +ffffffff8110d080 T athn_enable_interrupts +ffffffff8110d2b0 T athn_get_delta_slope +ffffffff8110d350 T athn_reset_key +ffffffff8110d440 T athn_led_init +ffffffff8110d4a0 T athn_set_led +ffffffff8110d4d0 T athn_iter_calib +ffffffff8110d520 T athn_cap_noisefloor +ffffffff8110d590 T athn_nf_hist_mid +ffffffff8110d720 T athn_filter_noisefloor +ffffffff8110dcd0 T athn_start_noisefloor_calib +ffffffff8110dd10 T athn_init_calib +ffffffff8110de50 T athn_ani_get_rssi +ffffffff8110de80 T athn_ani_ofdm_err_trigger +ffffffff8110df90 T athn_ani_cck_err_trigger +ffffffff8110e040 T athn_ani_lower_immunity +ffffffff8110e0e0 T athn_ani_restart +ffffffff8110e1a0 T athn_ani_monitor +ffffffff8110e640 T athn_clock_rate +ffffffff8110e6f0 T athn_chan2fbin +ffffffff8110e750 T athn_interpolate +ffffffff8110e7a0 T athn_get_pier_ival +ffffffff8110e840 T athn_init_dma +ffffffff8110e9d0 T athn_inc_tx_trigger_level +ffffffff8110ea90 T athn_rx_abort +ffffffff8110eb90 T athn_txtime +ffffffff8110ec80 T athn_init_tx_queues +ffffffff8110eef0 T athn_set_sta_timers +ffffffff8110f0d0 T athn_set_hostap_timers +ffffffff8110f1d0 T athn_set_bss +ffffffff8110f240 T athn_init_qos +ffffffff8110f330 T athn_setsifs +ffffffff8110f410 T athn_setclockrate +ffffffff8110f500 T athn_stop +ffffffff8110fdc0 T athn_init +ffffffff81110370 T athn_chan_sifs +ffffffff811103b0 T athn_acktimeout +ffffffff811103f0 T athn_setacktimeout +ffffffff81110500 T athn_setctstimeout +ffffffff81110640 T athn_set_multi +ffffffff81110770 T athn_suspend +ffffffff811107b0 T athn_wakeup +ffffffff81111000 T ar5008_attach +ffffffff811113f0 T ar5008_gpio_read +ffffffff811114b0 T ar5008_gpio_write +ffffffff811115b0 T ar5008_gpio_config_input +ffffffff81111670 T ar5008_gpio_config_output +ffffffff81111800 T ar5008_rfsilent_init +ffffffff811119a0 T ar5008_dma_alloc +ffffffff811119f0 T ar5008_dma_free +ffffffff81111ac0 T ar5008_rx_enable +ffffffff81111c50 T ar5008_intr +ffffffff81111f60 T ar5008_tx +ffffffff81112aa0 T ar5008_set_rf_mode +ffffffff81112b20 T ar5008_rf_bus_request +ffffffff81112bc0 T ar5008_rf_bus_release +ffffffff81112c50 T ar5008_set_phy +ffffffff81112d40 T ar5008_set_delta_slope +ffffffff81112e70 T ar5008_enable_antenna_diversity +ffffffff81112ed0 T ar5008_init_baseband +ffffffff81112f60 T ar5008_disable_phy +ffffffff81112fa0 T ar5008_set_rxchains +ffffffff81113030 T ar5008_do_noisefloor_calib +ffffffff811130f0 T ar5008_init_noisefloor_calib +ffffffff81113150 T ar5008_get_noisefloor +ffffffff811132f0 T ar5008_apply_noisefloor +ffffffff811133d0 T ar5008_do_calib +ffffffff811134a0 T ar5008_next_calib +ffffffff81113530 T ar5008_hw_init +ffffffff81113b80 T ar5008_set_noise_immunity_level +ffffffff81113c80 T ar5008_enable_ofdm_weak_signal +ffffffff81113d70 T ar5008_disable_ofdm_weak_signal +ffffffff81113e50 T ar5008_set_cck_weak_signal +ffffffff81113ec0 T ar5008_set_firstep_level +ffffffff81113f20 T ar5008_set_spur_immunity_level +ffffffff81113f90 T ar5008_read_rom +ffffffff811141f0 T ar5008_read_eep_word +ffffffff81114290 T ar5008_swap_rom +ffffffff81114300 T ar5008_tx_alloc +ffffffff811145c0 T ar5008_rx_alloc +ffffffff81114860 T ar5008_tx_free +ffffffff81114960 T ar5008_rx_free +ffffffff81114a90 T ar5008_rx_radiotap +ffffffff81114cf0 T ar5008_ccmp_decap +ffffffff81114e70 T ar5008_rx_intr +ffffffff81115460 T ar5008_tx_process +ffffffff811157b0 T ar5008_tx_intr +ffffffff811158b0 T ar5008_swba_intr +ffffffff81115c30 T ar5008_ccmp_encap +ffffffff81115d10 T ar5008_init_chains +ffffffff81115e10 T ar5008_read_noisefloor +ffffffff81115f10 T ar5008_write_noisefloor +ffffffff81116010 T ar5008_bb_load_noisefloor +ffffffff811163a0 T ar5008_calib_adc_gain +ffffffff81116710 T ar5008_calib_adc_dc_off +ffffffff81116ab0 T ar5008_calib_iq +ffffffff81116e40 T ar5008_write_txpower +ffffffff81117100 T ar5008_set_viterbi_mask +ffffffff81117b60 T ar5008_get_vpd +ffffffff81117c00 T ar5008_get_pdadcs +ffffffff81118360 T ar5008_get_lg_tpow +ffffffff811184c0 T ar5008_get_ht_tpow +ffffffff81119000 T ar5416_attach +ffffffff811190d0 T ar5416_setup +ffffffff81119160 T ar5416_swap_rom +ffffffff811192c0 T ar5416_init_from_rom +ffffffff81119830 T ar5416_set_txpower +ffffffff81119dc0 T ar5416_set_synth +ffffffff8111a0e0 T ar5416_spur_mitigate +ffffffff8111a2d0 T ar5416_get_spur_chans +ffffffff8111a310 T ar5416_force_bias +ffffffff8111a410 T ar5416_reverse_bits +ffffffff8111a4a0 T ar5416_init_calib +ffffffff8111a640 T ar5416_get_pdadcs +ffffffff8111a960 T ar5416_set_power_calib +ffffffff8111ad40 T ar5416_get_rf_rev +ffffffff8111aec0 T ar5416_rw_rfbits +ffffffff8111afb0 T ar5416_rw_bank6tpc +ffffffff8111b0c0 T ar5416_rf_reset +ffffffff8111b2a0 T ar5416_reset_bb_gain +ffffffff8111b330 T ar9160_rw_addac +ffffffff8111b480 T ar5416_reset_addac +ffffffff8111c000 T ar9280_attach +ffffffff8111c0e0 T ar9280_setup +ffffffff8111c1e0 T ar9280_init_from_rom +ffffffff8111ca00 T ar9280_set_synth +ffffffff8111ccb0 T ar9280_spur_mitigate +ffffffff8111cfa0 T ar9280_olpc_init +ffffffff8111d020 T ar9280_olpc_temp_compensation +ffffffff8111d180 T ar9280_olpc_get_pdadcs +ffffffff8111d450 T ar9280_reset_rx_gain +ffffffff8111d4f0 T ar9280_reset_tx_gain +ffffffff8111e000 T ar9285_attach +ffffffff8111e100 T ar9285_setup +ffffffff8111e1d0 T ar9285_swap_rom +ffffffff8111e250 T ar9285_init_from_rom +ffffffff8111eaa0 T ar9285_set_txpower +ffffffff8111ee70 T ar9285_get_spur_chans +ffffffff8111eed0 T ar9285_pa_calib +ffffffff8111f650 T ar9271_pa_calib +ffffffff8111fc60 T ar9285_cl_cal +ffffffff8111fe80 T ar9271_load_ani +ffffffff8111ff70 T ar9285_init_calib +ffffffff81120170 T ar9285_get_pdadcs +ffffffff81120330 T ar9285_set_power_calib +ffffffff81121000 T ar9287_attach +ffffffff811210e0 T ar9287_setup +ffffffff81121130 T ar9287_swap_rom +ffffffff811211e0 T ar9287_init_from_rom +ffffffff811217d0 T ar9287_set_txpower +ffffffff81121bb0 T ar9287_get_spur_chans +ffffffff81121c10 T ar9287_olpc_init +ffffffff81121cb0 T ar9287_olpc_temp_compensation +ffffffff81121dd0 T ar9287_get_pdadcs +ffffffff81122040 T ar9287_olpc_get_pdgain +ffffffff81122100 T ar9287_set_power_calib +ffffffff811224b0 T ar9287_1_3_enable_async_fifo +ffffffff811225a0 T ar9287_1_3_setup_async_fifo +ffffffff81123000 T ar9003_attach +ffffffff81123250 T ar9003_gpio_read +ffffffff811232d0 T ar9003_gpio_write +ffffffff81123370 T ar9003_gpio_config_input +ffffffff811233e0 T ar9003_gpio_config_output +ffffffff811234d0 T ar9003_rfsilent_init +ffffffff81123620 T ar9003_dma_alloc +ffffffff81123690 T ar9003_dma_free +ffffffff811237f0 T ar9003_rx_enable +ffffffff81123a20 T ar9003_intr +ffffffff81123dc0 T ar9003_tx +ffffffff81124880 T ar9003_set_rf_mode +ffffffff811248f0 T ar9003_rf_bus_request +ffffffff81124990 T ar9003_rf_bus_release +ffffffff81124a20 T ar9003_set_phy +ffffffff81124b00 T ar9003_set_delta_slope +ffffffff81124c30 T ar9003_enable_antenna_diversity +ffffffff81124c90 T ar9003_init_baseband +ffffffff81124d20 T ar9003_disable_phy +ffffffff81124d60 T ar9003_set_rxchains +ffffffff81124df0 T ar9003_do_noisefloor_calib +ffffffff81124eb0 T ar9003_init_noisefloor_calib +ffffffff81124f10 T ar9003_get_noisefloor +ffffffff81125080 T ar9003_apply_noisefloor +ffffffff81125160 T ar9003_do_calib +ffffffff811252a0 T ar9003_next_calib +ffffffff81125300 T ar9003_hw_init +ffffffff81125850 T ar9003_set_noise_immunity_level +ffffffff81125950 T ar9003_enable_ofdm_weak_signal +ffffffff81125a40 T ar9003_disable_ofdm_weak_signal +ffffffff81125b20 T ar9003_set_cck_weak_signal +ffffffff81125b90 T ar9003_set_firstep_level +ffffffff81125bf0 T ar9003_set_spur_immunity_level +ffffffff81125c60 T ar9003_find_rom +ffffffff81126070 T ar9003_read_rom +ffffffff811263d0 T ar9003_read_eep_word +ffffffff81126470 T ar9003_read_eep_data +ffffffff81126660 T ar9003_read_otp_word +ffffffff81126710 T ar9003_read_otp_data +ffffffff81126810 T ar9003_restore_rom_block +ffffffff81126920 T ar9003_tx_alloc +ffffffff81126c10 T ar9003_rx_alloc +ffffffff81126f20 T ar9003_tx_free +ffffffff81127090 T ar9003_rx_free +ffffffff81127180 T ar9003_reset_txsring +ffffffff81127210 T ar9003_rx_radiotap +ffffffff81127440 T ar9003_rx_process +ffffffff81127830 T ar9003_rx_intr +ffffffff811278c0 T ar9003_tx_process +ffffffff81127b80 T ar9003_paprd_tx_tone_done +ffffffff81127df0 T ar9003_tx_intr +ffffffff81127e60 T ar9003_swba_intr +ffffffff81128200 T ar9003_init_chains +ffffffff811282d0 T ar9003_read_noisefloor +ffffffff811283a0 T ar9003_write_noisefloor +ffffffff811284a0 T ar9003_bb_load_noisefloor +ffffffff81128830 T ar9003_init_calib +ffffffff81128aa0 T ar9003_calib_tx_iq +ffffffff81128ee0 T ar9003_calib_iq +ffffffff811291a0 T ar9003_get_iq_corr +ffffffff811295e0 T ar9003_paprd_calib +ffffffff81129c80 T ar9003_paprd_tx_tone +ffffffff81129dc0 T ar9003_get_desired_txgain +ffffffff81129f10 T ar9003_force_txgain +ffffffff81129fa0 T ar9003_set_training_gain +ffffffff8112a1b0 T ar9003_compute_predistortion +ffffffff8112ad50 T ar9003_enable_predistorter +ffffffff8112aec0 T ar9003_paprd_enable +ffffffff8112af60 T ar9003_write_txpower +ffffffff8112b2b0 T ar9003_reset_rx_gain +ffffffff8112b340 T ar9003_reset_tx_gain +ffffffff8112b3d0 T ar9003_get_lg_tpow +ffffffff8112b540 T ar9003_get_ht_tpow +ffffffff8112c000 T ar9380_attach +ffffffff8112c0d0 T ar9380_setup +ffffffff8112c280 T ar9380_get_rom_template +ffffffff8112c2c0 T ar9380_swap_rom +ffffffff8112c2f0 T ar9380_init_from_rom +ffffffff8112c900 T ar9380_set_txpower +ffffffff8112cd50 T ar9380_set_synth +ffffffff8112ce90 T ar9380_spur_mitigate +ffffffff8112ced0 T ar9380_get_paprd_masks +ffffffff8112cf20 T ar9485_init_swreg +ffffffff8112d270 T ar9380_init_swreg +ffffffff8112d340 T ar9485_pmu_write +ffffffff8112d400 T ar9380_spur_mitigate_cck +ffffffff8112d560 T ar9380_spur_mitigate_ofdm +ffffffff8112db20 T ar9380_set_correction +ffffffff8112ddf0 T ar9380_get_correction +ffffffff8112e000 T bwfm_proto_bcdc_query_dcmd +ffffffff8112e140 T bwfm_proto_bcdc_set_dcmd +ffffffff8112e250 T bwfm_proto_bcdc_rx +ffffffff8112e2c0 T bwfm_proto_bcdc_rxctl +ffffffff8112e380 T bwfm_attach +ffffffff8112e4f0 T bwfm_task +ffffffff8112e620 T bwfm_ioctl +ffffffff8112e850 T bwfm_start +ffffffff8112e980 T bwfm_watchdog +ffffffff8112ea10 T bwfm_newstate +ffffffff8112ec60 T bwfm_send_mgmt +ffffffff8112ec90 T bwfm_set_key +ffffffff8112eda0 T bwfm_delete_key +ffffffff8112ee80 T bwfm_media_change +ffffffff8112eef0 T bwfm_attachhook +ffffffff8112ef60 T bwfm_preinit +ffffffff8112f780 T bwfm_fwvar_cmd_get_int +ffffffff8112f7e0 T bwfm_fwvar_var_get_data +ffffffff8112f8f0 T bwfm_process_blob +ffffffff8112fb20 T bwfm_fwvar_var_get_int +ffffffff8112fc10 T bwfm_fwvar_cmd_get_data +ffffffff8112fc70 T bwfm_cleanup +ffffffff8112fd50 T bwfm_chip_detach +ffffffff8112fe10 T bwfm_detach +ffffffff8112ff30 T bwfm_activate +ffffffff8112ff90 T bwfm_stop +ffffffff811301f0 T bwfm_init +ffffffff81130b30 T bwfm_fwvar_var_set_int +ffffffff81130c10 T bwfm_fwvar_var_set_data +ffffffff81130d10 T bwfm_fwvar_cmd_set_int +ffffffff81130d70 T bwfm_iff +ffffffff81131020 T bwfm_fwvar_cmd_set_data +ffffffff81131050 T bwfm_rate2vhtmcs +ffffffff811310f0 T bwfm_rate2htmcs +ffffffff81131180 T bwfm_update_node +ffffffff81131520 T bwfm_update_nodes +ffffffff811315d0 T bwfm_chip_attach +ffffffff81131af0 T bwfm_chip_ai_isup +ffffffff81131b80 T bwfm_chip_ai_disable +ffffffff81131cd0 T bwfm_chip_ai_reset +ffffffff81131f50 T bwfm_chip_dmp_erom_scan +ffffffff81132100 T bwfm_chip_set_passive +ffffffff81132310 T bwfm_chip_get_core +ffffffff81132370 T bwfm_chip_tcm_ramsize +ffffffff81132460 T bwfm_chip_tcm_rambase +ffffffff81132660 T bwfm_chip_sysmem_ramsize +ffffffff81132760 T bwfm_chip_socram_ramsize +ffffffff81132920 T bwfm_chip_get_pmu +ffffffff811329b0 T bwfm_init_board_type +ffffffff811329e0 T bwfm_chip_get_core_idx +ffffffff81132a30 T bwfm_chip_dmp_get_regaddr +ffffffff81132bb0 T bwfm_chip_set_active +ffffffff81132d90 T bwfm_chip_cr4_set_active +ffffffff81132e20 T bwfm_chip_ca7_set_active +ffffffff81132eb0 T bwfm_chip_cm3_set_active +ffffffff81132f90 T bwfm_chip_cr4_set_passive +ffffffff81133090 T bwfm_chip_ca7_set_passive +ffffffff81133150 T bwfm_chip_cm3_set_passive +ffffffff811332a0 T bwfm_chip_sr_capable +ffffffff811336c0 T bwfm_proto_bcdc_txctl +ffffffff81133870 T bwfm_rx +ffffffff811339e0 T bwfm_chan2spec +ffffffff81133a70 T bwfm_chan2spec_d11n +ffffffff81133ae0 T bwfm_chan2spec_d11ac +ffffffff81133b40 T bwfm_spec2chan +ffffffff81133c00 T bwfm_spec2chan_d11n +ffffffff81133c60 T bwfm_spec2chan_d11ac +ffffffff81133cf0 T bwfm_connect +ffffffff81134420 T bwfm_hostap +ffffffff81134bf0 T bwfm_scan_v0 +ffffffff81134da0 T bwfm_scan_v2 +ffffffff81134f70 T bwfm_scan +ffffffff81134f90 T bwfm_scan_abort_v0 +ffffffff811350c0 T bwfm_scan_abort_v2 +ffffffff81135210 T bwfm_scan_abort +ffffffff81135230 T bwfm_newbuf +ffffffff811352b0 T bwfm_rx_event +ffffffff81135310 T bwfm_rx_auth_ind +ffffffff81135450 T bwfm_rx_assoc_ind +ffffffff81135610 T bwfm_rx_deauth_ind +ffffffff81135630 T bwfm_rx_leave_ind +ffffffff81135780 T bwfm_rx_disassoc_ind +ffffffff811357a0 T bwfm_rx_event_cb +ffffffff81135a80 T bwfm_scan_node +ffffffff81135ce0 T bwfm_do_async +ffffffff81135df0 T bwfm_set_key_cb +ffffffff81136840 T bwfm_delete_key_cb +ffffffff81136a40 T bwfm_nvram_convert +ffffffff81136bd0 T bwfm_loadfirmware +ffffffff81138000 T atw_enable +ffffffff811380a0 T atw_disable +ffffffff81138110 T atw_read_srom +ffffffff81138300 T atw_printmac +ffffffff81138370 T atw_attach +ffffffff81138fc0 T atw_reset +ffffffff81139260 T atw_ioctl +ffffffff81139430 T atw_start +ffffffff81139e40 T atw_watchdog +ffffffff81139fa0 T atw_newstate +ffffffff8113a490 T atw_recv_mgmt +ffffffff8113a6e0 T atw_node_free +ffffffff8113a700 T atw_node_alloc +ffffffff8113a720 T atw_media_change +ffffffff8113a790 T atw_media_status +ffffffff8113a7f0 T atw_next_scan +ffffffff8113a840 T atw_clear_sram +ffffffff8113a880 T atw_write_sram +ffffffff8113ab00 T atw_wcsr_init +ffffffff8113ab60 T atw_cmdr_init +ffffffff8113abc0 T atw_tofs2_init +ffffffff8113abf0 T atw_nar_init +ffffffff8113ac20 T atw_txlmt_init +ffffffff8113ac50 T atw_test1_init +ffffffff8113acb0 T atw_rf_reset +ffffffff8113ad30 T atw_cfp_init +ffffffff8113ad90 T atw_tofs0_init +ffffffff8113adc0 T atw_ifs_init +ffffffff8113adf0 T atw_response_times_init +ffffffff8113ae20 T atw_bbp_io_init +ffffffff8113af60 T atw_si4126_init +ffffffff8113b040 T atw_si4126_write +ffffffff8113b220 T atw_init +ffffffff8113bca0 T atw_stop +ffffffff8113bf10 T atw_rf3000_init +ffffffff8113c310 T atw_add_rxbuf +ffffffff8113c520 T atw_rxdrain +ffffffff8113c5c0 T atw_write_ssid +ffffffff8113c660 T atw_write_sup_rates +ffffffff8113c6f0 T atw_write_wep +ffffffff8113c7b0 T atw_filter_setup +ffffffff8113c990 T atw_start_beacon +ffffffff8113cbd0 T atw_bbp_io_enable +ffffffff8113cc30 T atw_tune +ffffffff8113cd50 T atw_idle +ffffffff8113d120 T atw_si4126_tune +ffffffff8113d310 T atw_rf3000_tune +ffffffff8113d710 T atw_rf3000_write +ffffffff8113d7f0 T atw_write_bssid +ffffffff8113d8d0 T atw_change_ibss +ffffffff8113d990 T atw_predict_beacon +ffffffff8113db20 T atw_get_tsft +ffffffff8113dc20 T atw_txdrain +ffffffff8113dd00 T atw_detach +ffffffff8113dee0 T atw_intr +ffffffff8113e1d0 T atw_linkintr +ffffffff8113e240 T atw_rxintr +ffffffff8113e850 T atw_txintr +ffffffff8113eaf0 T atw_compute_duration1 +ffffffff8113ebd0 T atw_compute_duration +ffffffff8113ee60 T atw_activate +ffffffff8113ef10 T atw_wakeup +ffffffff8113f000 T rtw_continuous_tx_enable +ffffffff8113f150 T rtw_set_access +ffffffff8113f1a0 T rtw_txdac_enable +ffffffff8113f230 T rtw_set_access1 +ffffffff8113f470 T rtw_anaparm_enable +ffffffff8113f4e0 T rtw_config0123_enable +ffffffff8113f570 T rtw_chip_reset1 +ffffffff8113f650 T rtw_chip_reset +ffffffff8113f760 T rtw_recall_eeprom +ffffffff8113f850 T rtw_reset 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T rtw_reset_oactive +ffffffff81141330 T rtw_collect_txring +ffffffff81141660 T rtw_intr_tx +ffffffff81141720 T rtw_start +ffffffff81141e20 T rtw_intr_beacon +ffffffff81141fa0 T rtw_txring_next +ffffffff81141ff0 T rtw_intr_atim +ffffffff81142020 T rtw_hwring_setup +ffffffff81142150 T rtw_swring_setup +ffffffff81142520 T rtw_txdesc_blk_init +ffffffff811425b0 T rtw_txring_fixup +ffffffff811426f0 T rtw_rxring_fixup +ffffffff81142780 T rtw_txdescs_reset +ffffffff81142800 T rtw_intr_ioerror +ffffffff81142c50 T rtw_suspend_ticks +ffffffff81142c80 T rtw_resume_ticks +ffffffff81142d10 T rtw_intr_timeout +ffffffff81142db0 T rtw_intr +ffffffff81143040 T rtw_stop +ffffffff81143490 T rtw_disable +ffffffff81143510 T rtw_maxim_pwrstate +ffffffff811435d0 T rtw_rfmd_pwrstate +ffffffff81143690 T rtw_philips_pwrstate +ffffffff81143780 T rtw_rtl_pwrstate +ffffffff811437b0 T rtw_pwrstate0 +ffffffff81143850 T rtw_pwrstate +ffffffff81143980 T rtw_tune +ffffffff81143c10 T rtw_phy_init +ffffffff81143d90 T rtw_enable +ffffffff81143e20 T rtw_transmit_config +ffffffff81143eb0 T rtw_enable_interrupts +ffffffff81143f90 T rtw_set_nettype +ffffffff81144060 T rtw_pktfilt_load +ffffffff81144240 T rtw_init +ffffffff811448b0 T rtw_led_init +ffffffff81144960 T rtw_led_newstate +ffffffff81144ba0 T rtw_led_set +ffffffff81144c90 T rtw_led_fastblink +ffffffff81144e20 T rtw_led_slowblink +ffffffff81144f70 T rtw_led_attach +ffffffff81144fc0 T rtw_ioctl +ffffffff81145140 T rtw_txring_choose +ffffffff81145210 T rtw_80211_dequeue +ffffffff81145310 T rtw_dequeue +ffffffff81145670 T rtw_seg_too_short +ffffffff811456f0 T rtw_dmamap_load_txbuf +ffffffff81145940 T rtw_compute_duration1 +ffffffff81145a20 T rtw_compute_duration +ffffffff81145cb0 T rtw_idle +ffffffff81145d60 T rtw_watchdog +ffffffff811460a0 T rtw_next_scan +ffffffff811460f0 T rtw_join_bss +ffffffff81146340 T rtw_newstate +ffffffff81146630 T rtw_tsf_extend +ffffffff811466b0 T rtw_ibss_merge +ffffffff811467b0 T rtw_recv_mgmt +ffffffff81146900 T rtw_node_alloc +ffffffff81146920 T rtw_node_free +ffffffff81146940 T rtw_media_change +ffffffff811469b0 T rtw_media_status +ffffffff81146a10 T rtw_activate +ffffffff81146ac0 T rtw_txsoft_blk_setup +ffffffff81146b40 T rtw_txsoft_blk_cleanup_all +ffffffff81146bf0 T rtw_txsoft_blk_setup_all +ffffffff81146df0 T rtw_txdesc_blk_setup +ffffffff81146ea0 T rtw_txdesc_blk_setup_all +ffffffff811471a0 T rtw_rf_attach +ffffffff81147550 T rtw_rtl8255_init +ffffffff81147580 T rtw_rtl8225_pwrstate +ffffffff811475b0 T rtw_rtl8225_tune +ffffffff811475e0 T rtw_rtl8225_txpower +ffffffff81147610 T rtw_rtl8255_pwrstate +ffffffff81147640 T rtw_rtl8255_tune +ffffffff81147670 T rtw_rtl8255_txpower +ffffffff811476a0 T rtw_max2820_init +ffffffff811478b0 T rtw_max2820_pwrstate +ffffffff811478e0 T rtw_max2820_tune +ffffffff81147930 T rtw_max2820_txpower +ffffffff81147960 T rtw_sa2400_init +ffffffff81147ab0 T rtw_sa2400_pwrstate +ffffffff81147b00 T rtw_sa2400_tune +ffffffff81147bc0 T rtw_sa2400_txpower +ffffffff81147be0 T rtw_grf5101_init +ffffffff81147e00 T rtw_grf5101_pwrstate +ffffffff81147f60 T rtw_grf5101_tune +ffffffff81147ff0 T rtw_grf5101_txpower +ffffffff81148070 T rtw_check_phydelay +ffffffff81148160 T rtw_attach +ffffffff81148fe0 T rtw_read8 +ffffffff81149000 T rtw_read16 +ffffffff81149020 T rtw_read32 +ffffffff81149040 T rtw_write8 +ffffffff81149060 T rtw_write16 +ffffffff81149080 T rtw_write32 +ffffffff811490a0 T rtw_barrier +ffffffff811490e0 T rtw_detach +ffffffff81149150 T rtw_bbp_preinit +ffffffff81149190 T rtw_bbp_write +ffffffff81149340 T rtw_bbp_init +ffffffff81149520 T rtw_rf_macwrite +ffffffff81149780 T rtw_verify_syna +ffffffff811498d0 T rtw_sa2400_vcocal_start +ffffffff81149910 T rtw_sa2400_vco_calibration +ffffffff811499b0 T rtw_sa2400_filter_calibration +ffffffff811499e0 T rtw_sa2400_dc_calibration +ffffffff81149c50 T rtw_sa2400_calibrate +ffffffff81149dd0 T rtw_rf_hostwrite +ffffffff81149fb0 T rtw_rtl8225_init +ffffffff81149fe0 T rtw_rf_hostbangbits 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rtwn_efuse_read_1 +ffffffff8114d310 T rtwn_efuse_read +ffffffff8114d7e0 T rtwn_efuse_switch_power +ffffffff8114d8b0 T rtwn_r88e_read_rom +ffffffff8114d970 T rtwn_r92e_read_rom +ffffffff8114d9f0 T rtwn_r23a_read_rom +ffffffff8114da50 T rtwn_r92c_read_rom +ffffffff8114db70 T rtwn_init +ffffffff8114e480 T rtwn_ra_init +ffffffff8114e760 T rtwn_r88e_ra_init +ffffffff8114e810 T rtwn_r92c_ra_init +ffffffff8114e920 T rtwn_tsf_sync_enable +ffffffff8114ea20 T rtwn_set_led +ffffffff8114ec00 T rtwn_set_nettype +ffffffff8114ec50 T rtwn_calib +ffffffff8114ece0 T rtwn_temp_calib +ffffffff8114ee60 T rtwn_next_scan +ffffffff8114eeb0 T rtwn_edca_init +ffffffff8114eff0 T rtwn_update_short_preamble +ffffffff8114f090 T rtwn_set_chan +ffffffff8114f630 T rtwn_r88e_update_short_preamble +ffffffff8114f690 T rtwn_r92c_update_short_preamble +ffffffff8114f6f0 T rtwn_set_key +ffffffff8114f950 T rtwn_delete_key +ffffffff8114faf0 T rtwn_update_avgrssi +ffffffff8114fbc0 T rtwn_get_rssi +ffffffff8114fc80 T rtwn_r88e_get_rssi +ffffffff8114fd00 T rtwn_fw_reset +ffffffff8114fe10 T rtwn_r88e_fw_reset +ffffffff8114ff50 T rtwn_r92c_fw_reset +ffffffff81150040 T rtwn_load_firmware +ffffffff81150410 T rtwn_rf_init +ffffffff81150c80 T rtwn_cam_init +ffffffff81150cb0 T rtwn_pa_bias_init +ffffffff81150fb0 T rtwn_rxfilter_init +ffffffff81151050 T rtwn_rate_fallback_init +ffffffff81151140 T rtwn_write_txpower +ffffffff81151470 T rtwn_get_txpower +ffffffff811514a0 T rtwn_r88e_get_txpower +ffffffff81151680 T rtwn_r92e_get_txpower +ffffffff81151890 T rtwn_r92c_get_txpower +ffffffff81151d50 T rtwn_set_txpower +ffffffff81151fd0 T rtwn_iq_calib_chain +ffffffff81152320 T rtwn_iq_calib_run +ffffffff81152e40 T rtwn_iq_calib_compare_results +ffffffff81152ff0 T rtwn_iq_calib_write_results +ffffffff811532f0 T rtwn_iq_calib +ffffffff811534d0 T rtwn_lc_calib +ffffffff81153840 T rtwn_enable_intr +ffffffff81153a10 T rtwn_disable_intr +ffffffff81154000 T rt2560_attach +ffffffff811545c0 T rt2560_amrr_timeout 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+ffffffff8115a8b0 T rt2560_set_macaddr +ffffffff8115a910 T rt2560_set_txantenna +ffffffff8115ab20 T rt2560_set_rxantenna +ffffffff8115ace0 T rt2560_bbp_init +ffffffff8115b000 T rt2661_attach +ffffffff8115b2f0 T rt2661_updatestats +ffffffff8115b3a0 T rt2661_next_scan +ffffffff8115b3f0 T rt2661_read_eeprom +ffffffff8115b5e0 T rt2661_get_rf +ffffffff8115b620 T rt2661_alloc_tx_ring +ffffffff8115b8d0 T rt2661_alloc_rx_ring +ffffffff8115bc60 T rt2661_attachhook +ffffffff8115c3b0 T rt2661_free_tx_ring +ffffffff8115c550 T rt2661_ioctl +ffffffff8115c770 T rt2661_start +ffffffff8115c950 T rt2661_watchdog +ffffffff8115c9e0 T rt2661_node_alloc +ffffffff8115caf0 T rt2661_node_free +ffffffff8115cb20 T rt2661_newassoc +ffffffff8115cbb0 T rt2661_updateslot +ffffffff8115cca0 T rt2661_newstate +ffffffff8115d250 T rt2661_media_change +ffffffff8115d2c0 T rt2661_detach +ffffffff8115d3b0 T rt2661_amrr_node_free_all +ffffffff8115d490 T rt2661_free_rx_ring +ffffffff8115d620 T rt2661_suspend +ffffffff8115d670 T rt2661_stop +ffffffff8115da00 T rt2661_wakeup +ffffffff8115da40 T rt2661_init +ffffffff8115e340 T rt2661_reset_tx_ring +ffffffff8115e480 T rt2661_reset_rx_ring +ffffffff8115e510 T rt2661_amrr_node_alloc +ffffffff8115e5f0 T rt2661_amrr_node_free_unused +ffffffff8115e6e0 T rt2661_amrr_node_free +ffffffff8115e780 T rt2661_amrr_node_find +ffffffff8115e8c0 T rt2661_iter_func +ffffffff8115e900 T rt2661_rx_tune +ffffffff8115eb30 T rt2661_set_chan +ffffffff8115f890 T rt2661_set_slottime +ffffffff8115f940 T rt2661_enable_mrr +ffffffff8115fa00 T rt2661_set_txpreamble +ffffffff8115faa0 T rt2661_set_basicrates +ffffffff8115fb20 T rt2661_set_bssid +ffffffff8115fbd0 T rt2661_prepare_beacon +ffffffff8115fe10 T rt2661_enable_tsf_sync +ffffffff8115ff10 T rt2661_eeprom_read +ffffffff81160590 T rt2661_tx_intr +ffffffff811606e0 T rt2661_tx_dma_intr +ffffffff811608b0 T rt2661_rx_intr +ffffffff81160d90 T rt2661_rxrate +ffffffff81160e00 T rt2661_get_rssi +ffffffff81160e80 T rt2661_mcu_beacon_expire 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rt2860_free_rx_ring +ffffffff81165ff0 T rt2860_free_tx_ring +ffffffff81166130 T rt2860_ioctl +ffffffff81166290 T rt2860_start +ffffffff81166440 T rt2860_watchdog +ffffffff811664e0 T rt2860_node_alloc +ffffffff81166500 T rt2860_newassoc +ffffffff81166700 T rt2860_node_leave +ffffffff81166740 T rt2860_ampdu_rx_start +ffffffff811667e0 T rt2860_ampdu_rx_stop +ffffffff81166860 T rt2860_updateslot +ffffffff811668e0 T rt2860_updateedca +ffffffff81166bd0 T rt2860_set_key +ffffffff81166f10 T rt2860_delete_key +ffffffff81166fd0 T rt2860_newstate +ffffffff81167720 T rt2860_media_change +ffffffff81167860 T rt2860_detach +ffffffff81167940 T rt2860_free_tx_pool +ffffffff81167a40 T rt2860_suspend +ffffffff81167a80 T rt2860_stop +ffffffff81167e10 T rt2860_wakeup +ffffffff81167e50 T rt2860_init +ffffffff81168fd0 T rt2860_reset_tx_ring +ffffffff811690c0 T rt2860_reset_rx_ring +ffffffff81169140 T rt2860_iter_func +ffffffff81169180 T rt2860_updatestats +ffffffff81169280 T rt2860_set_leds +ffffffff81169380 T rt2860_set_gp_timer +ffffffff81169490 T rt2860_switch_chan +ffffffff81169590 T rt2860_enable_mrr +ffffffff81169600 T rt2860_set_txpreamble +ffffffff81169670 T rt2860_set_basicrates +ffffffff811696c0 T rt2860_set_bssid +ffffffff81169720 T rt2860_setup_beacon +ffffffff81169840 T rt2860_enable_tsf_sync +ffffffff81169900 T rt3090_efuse_read_2 +ffffffff81169a30 T rt3290_efuse_read_2 +ffffffff81169b60 T rt2860_eeprom_read_2 +ffffffff81169ff0 T rt2860_intr_coherent +ffffffff8116a050 T rt2860_txrx_enable +ffffffff8116a1b0 T rt2860_drain_stats_fifo +ffffffff8116a280 T rt2860_tx_intr +ffffffff8116a4a0 T rt2860_rx_intr +ffffffff8116aa60 T rt2860_rssi2dbm +ffffffff8116ab10 T rt2860_tbtt_intr +ffffffff8116ac40 T rt2860_updateprot +ffffffff8116acf0 T rt2860_gp_intr +ffffffff8116ad40 T rt2860_intr +ffffffff8116aff0 T rt2860_tx +ffffffff8116b5f0 T rt2860_mcu_bbp_write +ffffffff8116b760 T rt2860_mcu_cmd +ffffffff8116b9d0 T rt2860_mcu_bbp_read +ffffffff8116bba0 T rt2860_rf_write +ffffffff8116bc70 T rt3090_rf_read +ffffffff8116bd80 T rt3090_rf_write +ffffffff8116c020 T rt2860_select_chan_group +ffffffff8116c3a0 T rt2860_set_chan +ffffffff8116cae0 T rt3090_set_chan +ffffffff8116cce0 T rt5390_set_chan +ffffffff8116d100 T rt3090_rf_init +ffffffff8116d5f0 T rt3090_filter_calib +ffffffff8116d7d0 T rt3090_set_rx_antenna +ffffffff8116d940 T rt5390_rf_init +ffffffff8116dd10 T rt3090_rf_wakeup +ffffffff8116df40 T rt5390_rf_wakeup +ffffffff8116e0f0 T rt3090_rf_setup +ffffffff8116e350 T rt2860_set_macaddr +ffffffff8116e3c0 T rt2860_bbp_init +ffffffff8116e7a0 T rt5390_bbp_init +ffffffff8116ea50 T rt3290_wlan_enable +ffffffff8116ebd0 T rt2860_load_microcode +ffffffff8116ed40 T rt2860_calib +ffffffff8116f000 T acx_attach +ffffffff8116f6b0 T acx_next_scan +ffffffff8116f6f0 T acx_dma_alloc +ffffffff8116fb30 T acx_reset +ffffffff8116fce0 T acx_disable_intr +ffffffff8116fd50 T acx_read_eeprom +ffffffff8116feb0 T acx_ioctl +ffffffff81170090 T acx_start +ffffffff811704d0 T acx_watchdog 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T acx100_set_wepkey +ffffffff81176310 T acx100_read_config +ffffffff811763e0 T acx100_write_config +ffffffff81176510 T acx100_set_fw_txdesc_rate +ffffffff81176550 T acx100_set_bss_join_param +ffffffff81176580 T acx100_proc_wep_rxbuf +ffffffff811765d0 T acx100_init_wep +ffffffff811766b0 T acx100_init_tmplt +ffffffff81176770 T acx100_init_fw_ring +ffffffff81176a30 T acx100_init_memory +ffffffff81176bc0 T acx100_init_fw_txring +ffffffff81176cc0 T acx100_init_fw_rxring +ffffffff81176db0 T acx100_set_txpower +ffffffff81177000 T pgt_write_memory_barrier +ffffffff81177030 T pgt_read_4 +ffffffff81177060 T pgt_write_4 +ffffffff81177090 T pgt_write_4_flush +ffffffff811770e0 T pgt_debug_events +ffffffff81177110 T pgt_queue_frags_pending +ffffffff81177150 T pgt_reinit_rx_desc_frag +ffffffff811771a0 T pgt_load_tx_desc_frag +ffffffff81177260 T pgt_unload_tx_desc_frag +ffffffff811772b0 T pgt_load_firmware +ffffffff81177670 T pgt_reboot +ffffffff81177750 T pgt_cleanup_queue +ffffffff81177870 T pgt_reset +ffffffff81177d70 T pgt_stop +ffffffff81178140 T pgt_drain_tx_queue +ffffffff811782e0 T pgt_update_hw_from_sw +ffffffff81178fd0 T pgt_attach +ffffffff81179180 T pgt_dma_alloc +ffffffff811795e0 T pgt_net_attach +ffffffff81179be0 T pgt_per_device_kthread +ffffffff81179dc0 T pgt_detach +ffffffff81179f10 T pgt_dma_free +ffffffff8117a420 T pgt_init_intr +ffffffff8117a470 T pgt_update_intr +ffffffff8117a820 T pgt_rxdone +ffffffff8117a8d0 T pgt_txdone +ffffffff8117a9d0 T pgt_mgmtrx_completion +ffffffff8117abd0 T pgt_datarx_completion +ffffffff8117ae70 T pgt_input_frames +ffffffff8117b190 T pgt_ieee80211_encap +ffffffff8117b440 T pgt_wakeup_intr +ffffffff8117b580 T pgt_sleep_intr +ffffffff8117b6d0 T pgt_empty_traps +ffffffff8117b760 T pgt_update_sw_from_hw +ffffffff8117bc40 T pgt_async_reset +ffffffff8117bc90 T pgt_async_update +ffffffff8117bce0 T pgt_intr +ffffffff8117bf90 T pgt_start +ffffffff8117c460 T pgt_trap_received +ffffffff8117c5a0 T pgt_oid_get +ffffffff8117c610 T pgt_mgmt_request +ffffffff8117c8d0 T pgt_oid_retrieve +ffffffff8117c940 T pgt_oid_set +ffffffff8117c9b0 T pgt_state_dump +ffffffff8117cad0 T pgt_desc_transmit +ffffffff8117cc50 T pgt_maybe_trigger +ffffffff8117ce00 T pgt_ieee80211_node_alloc +ffffffff8117ce60 T pgt_ieee80211_newassoc +ffffffff8117ce90 T pgt_ieee80211_node_free +ffffffff8117ceb0 T pgt_ieee80211_node_copy +ffffffff8117ced0 T pgt_ieee80211_send_mgmt +ffffffff8117cf00 T pgt_ioctl +ffffffff8117d5f0 T pgt_watchdog +ffffffff8117d6f0 T pgt_newstate +ffffffff8117d7f0 T pgt_media_change +ffffffff8117d850 T pgt_media_status +ffffffff8117d9c0 T pgt_obj_bss2scanres +ffffffff8117db50 T pgt_init +ffffffff8117dc00 T node_mark_active_ap +ffffffff8117dc30 T node_mark_active_adhoc +ffffffff8117dc70 T pgt_hostap_handle_mlme +ffffffff8117dd50 T pgt_dma_alloc_queue +ffffffff8117dfc0 T pgt_dma_free_queue +ffffffff8117e0d0 T pgt_activate +ffffffff8117e160 T pgt_wakeup +ffffffff8117f000 T sf_reg_read +ffffffff8117f060 T sf_reg_write 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malo_alloc_rx_ring +ffffffff81183150 T malo_alloc_tx_ring +ffffffff811833f0 T malo_ioctl +ffffffff81183580 T malo_start +ffffffff81183730 T malo_watchdog +ffffffff81183760 T malo_newstate +ffffffff81183990 T malo_newassoc +ffffffff811839c0 T malo_node_alloc +ffffffff811839e0 T malo_update_slot +ffffffff81183a60 T malo_media_change +ffffffff81183ad0 T malo_media_status +ffffffff81183bb0 T malo_detach +ffffffff81183cb0 T malo_stop +ffffffff81183e00 T malo_free_cmd +ffffffff81183e90 T malo_free_rx_ring +ffffffff81184010 T malo_free_tx_ring +ffffffff811841a0 T malo_send_cmd +ffffffff81184220 T malo_send_cmd_dma +ffffffff81184330 T malo_cmd_response +ffffffff811844d0 T malo_reset_rx_ring +ffffffff81184560 T malo_reset_tx_ring +ffffffff81184690 T malo_init +ffffffff81184930 T malo_load_bootimg +ffffffff81184da0 T malo_load_firmware +ffffffff811850c0 T malo_cmd_get_spec +ffffffff811852d0 T malo_cmd_set_channel +ffffffff81185420 T malo_cmd_set_antenna +ffffffff81185580 T malo_cmd_set_radio +ffffffff811856d0 T malo_cmd_set_txpower +ffffffff81185850 T malo_cmd_set_rts +ffffffff811859a0 T malo_tx_mgt +ffffffff81185ca0 T malo_tx_data +ffffffff81186010 T malo_cmd_set_prescan +ffffffff81186150 T malo_cmd_set_postscan +ffffffff811862b0 T malo_cmd_set_aid +ffffffff81186420 T malo_cmd_set_rate +ffffffff81186690 T malo_fix2rate +ffffffff811866d0 T malo_set_slot +ffffffff81186770 T malo_chip2rate +ffffffff811867b0 T malo_tx_setup_desc +ffffffff81186800 T malo_cmd_set_slot +ffffffff81187000 T bwi_intr +ffffffff81187640 T bwi_disable_intrs +ffffffff811876a0 T bwi_init_statechg +ffffffff81187b20 T bwi_mac_config_ps +ffffffff81187c60 T bwi_txeof +ffffffff81187d50 T bwi_enable_intrs +ffffffff81187db0 T bwi_led_event +ffffffff81187f40 T bwi_attach +ffffffff81188950 T bwi_amrr_timeout +ffffffff811889c0 T bwi_next_scan +ffffffff81188a10 T bwi_calibrate +ffffffff81188ab0 T bwi_power_on +ffffffff81188be0 T bwi_bbp_attach +ffffffff811891b0 T bwi_bbp_power_on +ffffffff811892d0 T bwi_set_clock_delay +ffffffff81189570 T bwi_set_clock_mode +ffffffff81189960 T bwi_get_pwron_delay +ffffffff81189b70 T bwi_bus_attach +ffffffff81189dc0 T bwi_get_card_flags +ffffffff81189e50 T bwi_led_attach +ffffffff8118a020 T bwi_regwin_switch +ffffffff8118a140 T bwi_mac_lateattach +ffffffff8118a260 T bwi_bbp_power_off +ffffffff8118a310 T bwi_dma_alloc +ffffffff8118a610 T bwi_ioctl +ffffffff8118a7e0 T bwi_start +ffffffff8118aaa0 T bwi_watchdog +ffffffff8118ab40 T bwi_read_sprom +ffffffff8118ab70 T bwi_get_eaddr +ffffffff8118ac40 T bwi_updateslot +ffffffff8118ad70 T bwi_newstate +ffffffff8118afe0 T bwi_newassoc +ffffffff8118b070 T bwi_node_alloc +ffffffff8118b090 T bwi_media_change +ffffffff8118b100 T bwi_detach +ffffffff8118b1f0 T bwi_stop +ffffffff8118b690 T bwi_mac_detach +ffffffff8118b6f0 T bwi_dma_free +ffffffff8118bb70 T bwi_dma_mbuf_destroy +ffffffff8118bce0 T bwi_tmplt_write_4 +ffffffff8118bd50 T bwi_hostflags_write +ffffffff8118be10 T bwi_memobj_write_2 +ffffffff8118bea0 T bwi_hostflags_read +ffffffff8118bf70 T bwi_memobj_read_2 +ffffffff8118bfe0 T bwi_memobj_read_4 +ffffffff8118c100 T bwi_memobj_write_4 +ffffffff8118c1e0 T bwi_mac_reset +ffffffff8118c3b0 T bwi_phy_attach +ffffffff8118c510 T bwi_rf_attach +ffffffff8118c840 T bwi_mac_test +ffffffff8118caf0 T bwi_mac_get_property +ffffffff8118cc20 T bwi_rf_map_txpower +ffffffff8118d050 T bwi_regwin_disable +ffffffff8118d390 T bwi_mac_init +ffffffff8118dba0 T bwi_mac_setup_tpctl +ffffffff8118ddd0 T bwi_rf_clear_state +ffffffff8118df00 T bwi_phy_clear_state +ffffffff8118df30 T bwi_regwin_is_enabled +ffffffff8118dfe0 T bwi_bus_init +ffffffff8118e5e0 T bwi_phy_calibrate +ffffffff8118e680 T bwi_mac_fw_alloc +ffffffff8118eab0 T bwi_mac_fw_load +ffffffff8118ed90 T bwi_mac_gpio_init +ffffffff8118f090 T bwi_mac_fw_init +ffffffff8118f130 T bwi_rf_set_ant_mode +ffffffff8118fb60 T bwi_mac_opmode_init +ffffffff8118fd60 T bwi_mac_hostflags_init +ffffffff8118ff50 T bwi_mac_bss_param_init +ffffffff811901a0 T bwi_regwin_enable +ffffffff81190350 T bwi_mac_set_tpctl_11bg +ffffffff811906c0 T bwi_phy_set_bbp_atten +ffffffff811907e0 T bwi_rf_write +ffffffff81190840 T bwi_rf_read +ffffffff811908c0 T bwi_rf_lo_adjust +ffffffff811909a0 T bwi_mac_dummy_xmit +ffffffff811911e0 T bwi_mac_init_tpctl_11bg +ffffffff811915f0 T bwi_phy_write +ffffffff81191650 T bwi_phy_read +ffffffff811916b0 T bwi_rf_clear_tssi +ffffffff81191820 T bwi_mac_fw_free +ffffffff81191880 T bwi_get_firmware +ffffffff81191a20 T bwi_fwimage_is_valid +ffffffff81191b30 T bwi_mac_gpio_fini +ffffffff81191d10 T bwi_mac_fw_load_iv +ffffffff81191ea0 T bwi_mac_set_retry_lim +ffffffff81191ff0 T bwi_mac_set_ackrates +ffffffff811921a0 T bwi_rate2modtype +ffffffff811921f0 T bwi_mac_start +ffffffff811922b0 T bwi_mac_stop +ffffffff811923b0 T bwi_mac_reset_hwkeys +ffffffff81192410 T bwi_mac_shutdown +ffffffff81192550 T bwi_mac_updateslot +ffffffff81192620 T bwi_mac_attach +ffffffff811927a0 T bwi_mac_balance_atten +ffffffff811928b0 T bwi_mac_adjust_tpctl +ffffffff81192b10 T bwi_mac_lock +ffffffff81192cd0 T bwi_mac_unlock +ffffffff81192e60 T bwi_mac_calibrate_txpower +ffffffff81193220 T bwi_rf_get_latest_tssi +ffffffff81193360 T bwi_rf_tssi2dbm +ffffffff811933c0 T bwi_mac_set_promisc +ffffffff81193460 T bwi_phy_init_11a +ffffffff81193490 T bwi_phy_init_11g +ffffffff81194020 T bwi_tbl_write_2 +ffffffff81194110 T bwi_tbl_write_4 +ffffffff81194250 T bwi_nrssi_write +ffffffff81194300 T bwi_nrssi_read +ffffffff811943d0 T bwi_phy_init_11b_rev5 +ffffffff811952e0 T bwi_phy_init_11b_rev6 +ffffffff81196950 T bwi_phy_config_11g +ffffffff81197940 T bwi_rf_get_gains +ffffffff811990c0 T bwi_rf_init +ffffffff81199180 T bwi_rf_init_hw_nrssi_table +ffffffff81199320 T bwi_phy_init_11b_rev2 +ffffffff81199350 T bwi_phy_init_11b_rev4 +ffffffff81199b20 T bwi_rf_set_chan +ffffffff81199dd0 T bwi_rf_init_bcm2050 +ffffffff8119beb0 T bwi_phy_config_agc +ffffffff8119d950 T bwi_set_gains +ffffffff8119ddb0 T bwi_nrssi_11g +ffffffff8119de40 T bwi_get_rf_lo +ffffffff8119deb0 T bwi_rf_lo_isused +ffffffff8119df30 T bwi_rf_on_11a +ffffffff8119df60 T bwi_rf_off_11a +ffffffff8119e180 T bwi_rf_calc_rssi_bcm2060 +ffffffff8119e1c0 T bwi_rf_calc_rssi_bcm2050 +ffffffff8119e2e0 T bwi_rf_calc_rssi_bcm2053 +ffffffff8119e340 T bwi_rf_on_11bg +ffffffff8119e5e0 T bwi_rf_off_11bg +ffffffff8119e640 T bwi_rf_calc_nrssi_slope_11b +ffffffff8119f360 T bwi_rf_set_nrssi_thr_11b +ffffffff8119f6f0 T bwi_rf_lo_update_11g +ffffffff811a0960 T bwi_rf_lo_update_11b +ffffffff811a1830 T bwi_rf_off_11g_rev5 +ffffffff811a1980 T bwi_rf_calc_nrssi_slope_11g +ffffffff811a33b0 T bwi_rf_set_nrssi_thr_11g +ffffffff811a35b0 T bwi_rf_workaround +ffffffff811a36e0 T bwi_rf_gain_max_reached +ffffffff811a3940 T bwi_rf_lo_find +ffffffff811a39f0 T bwi_rf_lo_write +ffffffff811a3a50 T bwi_bitswap4 +ffffffff811a3ab0 T bwi_phy812_value +ffffffff811a3d50 T bwi_rf_calibval +ffffffff811a3e10 T _bwi_adjust_devide +ffffffff811a3e50 T bwi_rf_calc_txpower +ffffffff811a3fa0 T bwi_rf_get_tp_ctrl2 +ffffffff811a40d0 T _bwi_rf_lo_update_11g +ffffffff811a4450 T bwi_rf_lo_devi_measure +ffffffff811a47a0 T bwi_rf_lo_measure_11g +ffffffff811a4a80 T bwi_rf_set_nrssi_ofs_11g +ffffffff811a6630 T bwi_rf_init_sw_nrssi_table +ffffffff811a66d0 T _nrssi_threshold +ffffffff811a6740 T bwi_rf_lo_measure_11b +ffffffff811a68f0 T bwi_setup_desc32 +ffffffff811a69b0 T bwi_power_off +ffffffff811a6a90 T bwi_regwin_select +ffffffff811a6b40 T bwi_regwin_info +ffffffff811a6bc0 T bwi_led_blink_next +ffffffff811a6c50 T bwi_led_blink_end +ffffffff811a6c80 T bwi_led_onoff +ffffffff811a6cd0 T bwi_led_newstate +ffffffff811a7040 T bwi_led_blink_start +ffffffff811a7110 T bwi_get_clock_freq +ffffffff811a7290 T bwi_init +ffffffff811a72d0 T bwi_set_bssid +ffffffff811a7500 T bwi_set_addr_filter +ffffffff811a75b0 T bwi_set_chan +ffffffff811a7620 T bwi_encap +ffffffff811a7d00 T bwi_newstate_begin +ffffffff811a7d70 T bwi_iter_func +ffffffff811a7d90 T bwi_newbuf30 +ffffffff811a7f60 T bwi_init_tx_ring32 +ffffffff811a8090 T bwi_free_tx_ring32 +ffffffff811a82d0 T bwi_init_rx_ring32 +ffffffff811a8440 T bwi_free_rx_ring32 +ffffffff811a84e0 T bwi_newbuf +ffffffff811a86d0 T bwi_setup_rx_desc32 +ffffffff811a8790 T bwi_setup_tx_desc32 +ffffffff811a8850 T bwi_rxeof32 +ffffffff811a8900 T bwi_start_tx32 +ffffffff811a8960 T bwi_init_txstats32 +ffffffff811a8b00 T bwi_free_txstats32 +ffffffff811a8b20 T bwi_txeof_status32 +ffffffff811a8c60 T bwi_dma_ring_alloc +ffffffff811a8e00 T bwi_dma_txstats_alloc +ffffffff811a9120 T bwi_dma_mbuf_create30 +ffffffff811a9b60 T bwi_dma_mbuf_create +ffffffff811aa060 T bwi_dma_txstats_free +ffffffff811aa120 T bwi_init_rxdesc_ring32 +ffffffff811aa1e0 T bwi_rxeof +ffffffff811aa5f0 T bwi_calc_rssi +ffffffff811aa640 T bwi_plcp2rate +ffffffff811aa660 T bwi_reset_rx_ring32 +ffffffff811aa8f0 T bwi_ofdm_plcp_header +ffffffff811aa950 T bwi_ds_plcp_header +ffffffff811aa9e0 T bwi_plcp_header +ffffffff811aaad0 T bwi_ack_rate +ffffffff811aac20 T bwi_txtime +ffffffff811aacd0 T bwi_txeof_status +ffffffff811aad90 T _bwi_txeof +ffffffff811aaf10 T bwi_regwin_name +ffffffff811aafa0 T bwi_regwin_disable_bits +ffffffff811ac000 T uhci_open +ffffffff811ac560 T uhci_softintr +ffffffff811ac5f0 T uhci_poll +ffffffff811ac660 T uhci_allocx +ffffffff811ac6b0 T uhci_freex +ffffffff811ac6f0 T uhci_root_ctrl_transfer +ffffffff811ac750 T uhci_root_ctrl_start +ffffffff811ad070 T uhci_root_ctrl_abort +ffffffff811ad0a0 T uhci_root_ctrl_close +ffffffff811ad0d0 T uhci_root_ctrl_done +ffffffff811ad100 T uhci_root_intr_transfer +ffffffff811ad180 T uhci_root_intr_start +ffffffff811ad1f0 T uhci_root_intr_abort +ffffffff811ad250 T uhci_root_intr_close +ffffffff811ad280 T uhci_root_intr_done +ffffffff811ad2d0 T uhci_device_ctrl_transfer +ffffffff811ad350 T uhci_device_ctrl_start +ffffffff811ad3c0 T uhci_device_ctrl_abort +ffffffff811ad3e0 T uhci_device_ctrl_close +ffffffff811ad410 T uhci_device_ctrl_done +ffffffff811ad690 T uhci_device_intr_transfer +ffffffff811ad6f0 T uhci_device_intr_start +ffffffff811ad870 T uhci_device_intr_abort +ffffffff811ad8c0 T uhci_device_intr_close +ffffffff811adae0 T uhci_device_clear_toggle +ffffffff811adb10 T uhci_device_intr_done +ffffffff811ade60 T uhci_device_bulk_transfer +ffffffff811adec0 T uhci_device_bulk_start +ffffffff811ae0c0 T uhci_device_bulk_abort +ffffffff811ae0e0 T uhci_device_bulk_close +ffffffff811ae130 T uhci_device_bulk_done +ffffffff811ae310 T uhci_device_isoc_transfer +ffffffff811ae380 T uhci_device_isoc_start +ffffffff811ae4e0 T uhci_device_isoc_abort +ffffffff811ae5a0 T uhci_device_isoc_close +ffffffff811ae720 T uhci_device_isoc_done +ffffffff811ae7c0 T uhci_globalreset +ffffffff811ae830 T uhci_init +ffffffff811af2d0 T uhci_reset +ffffffff811af390 T uhci_alloc_std +ffffffff811af4a0 T uhci_alloc_sqh +ffffffff811af5a0 T uhci_poll_hub +ffffffff811af6f0 T uhci_run +ffffffff811af830 T uhci_activate +ffffffff811afb30 T uhci_detach +ffffffff811afba0 T uhci_add_loop +ffffffff811afbf0 T uhci_rem_loop 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ohci_device_bulk_transfer +ffffffff811b41d0 T ohci_device_bulk_start +ffffffff811b4370 T ohci_device_bulk_abort +ffffffff811b4390 T ohci_device_bulk_close +ffffffff811b4410 T ohci_device_bulk_done +ffffffff811b4440 T ohci_device_isoc_transfer +ffffffff811b44d0 T ohci_device_isoc_start +ffffffff811b4540 T ohci_device_isoc_abort +ffffffff811b4630 T ohci_device_isoc_close +ffffffff811b4710 T ohci_device_isoc_done +ffffffff811b4740 T ohci_activate +ffffffff811b4bb0 T ohci_detach +ffffffff811b4c20 T ohci_alloc_sed +ffffffff811b4d30 T ohci_free_sed +ffffffff811b4d70 T ohci_alloc_std +ffffffff811b4ef0 T ohci_hash_add_td +ffffffff811b4f80 T ohci_free_std +ffffffff811b4ff0 T ohci_alloc_std_chain +ffffffff811b5240 T ohci_alloc_sitd +ffffffff811b53d0 T ohci_hash_add_itd +ffffffff811b5460 T ohci_free_sitd +ffffffff811b5520 T ohci_hash_rem_itd +ffffffff811b55a0 T ohci_checkrev +ffffffff811b5680 T ohci_handover +ffffffff811b57f0 T ohci_init +ffffffff811b6600 T ohci_rhsc_enable +ffffffff811b66a0 T ohci_intr +ffffffff811b6740 T ohci_intr1 +ffffffff811b6b40 T ohci_add_done +ffffffff811b6c80 T ohci_rhsc +ffffffff811b6dc0 T ohci_rhsc_able +ffffffff811b6e20 T ohci_hash_find_td +ffffffff811b6e80 T ohci_hash_find_itd +ffffffff811b6ee0 T ohci_device_request +ffffffff811b71e0 T ohci_timeout +ffffffff811b7260 T ohci_add_ed +ffffffff811b72e0 T ohci_rem_ed +ffffffff811b7370 T ohci_timeout_task +ffffffff811b73b0 T ohci_abort_xfer +ffffffff811b7650 T ohci_device_setintr +ffffffff811b7890 T ohci_setup_isoc +ffffffff811b7940 T ohci_close_pipe +ffffffff811b7ab0 T ohci_device_isoc_enter +ffffffff811b8000 T ehci_open +ffffffff811b8410 T ehci_setaddr +ffffffff811b84b0 T ehci_softintr +ffffffff811b8680 T ehci_poll +ffffffff811b86f0 T ehci_allocx +ffffffff811b8740 T ehci_freex +ffffffff811b8780 T ehci_root_ctrl_transfer +ffffffff811b87e0 T ehci_root_ctrl_start +ffffffff811b9330 T ehci_root_ctrl_abort +ffffffff811b9360 T ehci_root_ctrl_close +ffffffff811b9390 T ehci_root_ctrl_done +ffffffff811b93c0 T ehci_root_intr_transfer +ffffffff811b9430 T ehci_root_intr_start +ffffffff811b9480 T ehci_root_intr_abort +ffffffff811b94d0 T ehci_root_intr_close +ffffffff811b9500 T ehci_root_intr_done +ffffffff811b9530 T ehci_device_ctrl_transfer +ffffffff811b9590 T ehci_device_ctrl_start +ffffffff811b9990 T ehci_device_ctrl_abort +ffffffff811b99b0 T ehci_device_ctrl_close +ffffffff811b99c0 T ehci_device_ctrl_done +ffffffff811b9aa0 T ehci_device_intr_transfer +ffffffff811b9b00 T ehci_device_intr_start +ffffffff811b9d50 T ehci_device_intr_abort +ffffffff811b9da0 T ehci_device_intr_close +ffffffff811b9db0 T ehci_device_clear_toggle +ffffffff811b9e20 T ehci_device_intr_done +ffffffff811ba110 T ehci_device_bulk_transfer +ffffffff811ba170 T ehci_device_bulk_start +ffffffff811ba3c0 T ehci_device_bulk_abort +ffffffff811ba3e0 T ehci_device_bulk_close +ffffffff811ba3f0 T ehci_device_bulk_done +ffffffff811ba4a0 T ehci_device_isoc_transfer +ffffffff811ba4f0 T ehci_device_isoc_start +ffffffff811ba7d0 T ehci_device_isoc_abort +ffffffff811ba810 T ehci_device_isoc_close +ffffffff811ba840 T ehci_device_isoc_done +ffffffff811ba8b0 T ehci_reverse_bits +ffffffff811ba910 T ehci_init +ffffffff811bafc0 T ehci_reset +ffffffff811bb160 T ehci_alloc_sqh +ffffffff811bb2f0 T ehci_intrlist_timeout +ffffffff811bb360 T ehci_intr +ffffffff811bb420 T ehci_intr1 +ffffffff811bb5c0 T ehci_pcd +ffffffff811bb6d0 T ehci_close_pipe +ffffffff811bb7c0 T ehci_check_intr +ffffffff811bb7f0 T ehci_check_itd_intr +ffffffff811bb9a0 T ehci_check_qh_intr +ffffffff811bbb50 T ehci_idone +ffffffff811bbd40 T ehci_isoc_idone +ffffffff811bc220 T ehci_detach +ffffffff811bc2c0 T ehci_activate +ffffffff811bc7c0 T ehci_free_sqh +ffffffff811bc800 T ehci_add_qh +ffffffff811bc8b0 T ehci_device_setintr +ffffffff811bc970 T ehci_rem_qh +ffffffff811bca10 T ehci_sync_hc +ffffffff811bcb40 T ehci_set_qh_qtd +ffffffff811bcc10 T ehci_rem_itd_chain +ffffffff811bcd90 T ehci_free_itd_chain +ffffffff811bced0 T ehci_free_itd +ffffffff811bcf30 T ehci_disown +ffffffff811bcfa0 T ehci_alloc_sqtd +ffffffff811bd110 T ehci_free_sqtd +ffffffff811bd150 T ehci_alloc_sqtd_chain +ffffffff811bd4d0 T ehci_free_sqtd_chain +ffffffff811bd580 T ehci_alloc_itd +ffffffff811bd7f0 T ehci_abort_xfer +ffffffff811bdb40 T ehci_abort_isoc_xfer +ffffffff811bde20 T ehci_timeout +ffffffff811bdea0 T ehci_timeout_task +ffffffff811bdee0 T ehci_alloc_itd_chain +ffffffff811be360 T ehci_alloc_sitd_chain +ffffffff811bf000 T xhci_pipe_open +ffffffff811bf290 T xhci_setaddr +ffffffff811bf390 T xhci_softintr +ffffffff811bf3e0 T xhci_poll +ffffffff811bf450 T xhci_allocx +ffffffff811bf470 T xhci_freex +ffffffff811bf490 T xhci_root_ctrl_transfer +ffffffff811bf4f0 T xhci_root_ctrl_start +ffffffff811c0060 T xhci_noop +ffffffff811c0090 T xhci_pipe_close +ffffffff811c0330 T xhci_root_intr_transfer +ffffffff811c03a0 T xhci_root_intr_start +ffffffff811c03f0 T xhci_root_intr_abort +ffffffff811c0440 T xhci_root_intr_done +ffffffff811c0470 T xhci_device_ctrl_transfer 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xhci_ring_consume +ffffffff811c3b30 T xhci_event_xfer +ffffffff811c3d60 T xhci_event_command +ffffffff811c4040 T xhci_event_port_change +ffffffff811c4100 T xhci_skip_all +ffffffff811c41a0 T xhci_xfer_done +ffffffff811c42a0 T xhci_event_xfer_generic +ffffffff811c46a0 T xhci_event_xfer_isoc +ffffffff811c48c0 T xhci_xfer_length_generic +ffffffff811c4980 T xhci_cmd_reset_ep_async +ffffffff811c4ab0 T xhci_cmd_set_tr_deq_async +ffffffff811c4bf0 T xhci_cmd_slot_control +ffffffff811c4cb0 T xhci_softdev_alloc +ffffffff811c4f20 T xhci_pipe_init +ffffffff811c5190 T xhci_pipe_interval +ffffffff811c5270 T xhci_pipe_maxburst +ffffffff811c52d0 T xhci_context_setup +ffffffff811c5750 T xhci_cmd_set_address +ffffffff811c57e0 T xhci_cmd_configure_ep +ffffffff811c5870 T xhci_softdev_free +ffffffff811c5a50 T xhci_ring_produce +ffffffff811c5bc0 T xhci_xfer_get_trb +ffffffff811c5ca0 T xhci_command_submit +ffffffff811c5ee0 T xhci_cmd_stop_ep +ffffffff811c5f70 T xhci_abort_xfer +ffffffff811c6250 T xhci_timeout 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ieee80211_ccmp_delete_key +ffffffff814010f0 T ieee80211_ccmp_encrypt +ffffffff814015b0 t ieee80211_ccmp_phase1 +ffffffff81401940 T ieee80211_ccmp_get_pn +ffffffff81401a50 T ieee80211_ccmp_decrypt +ffffffff81402000 T ieee80211_tkip_set_key +ffffffff814020a0 T ieee80211_tkip_delete_key +ffffffff81402110 T ieee80211_tkip_mic +ffffffff81402290 T ieee80211_tkip_encrypt +ffffffff814026e0 t Phase1 +ffffffff81402870 t Phase2 +ffffffff81402b00 T ieee80211_tkip_get_tsc +ffffffff81402c10 T ieee80211_tkip_decrypt +ffffffff81403110 T ieee80211_michael_mic_failure +ffffffff814032a0 T ieee80211_michael_mic_failure_timeout +ffffffff814032d0 t ieee80211_tkip_deauth +ffffffff81404000 T ieee80211_wep_set_key +ffffffff81404060 T ieee80211_wep_delete_key +ffffffff814040d0 T ieee80211_wep_encrypt +ffffffff81404470 T ieee80211_wep_decrypt +ffffffff81405000 T ieee80211_get_hdrlen +ffffffff81405090 T ieee80211_input_hwdecrypt +ffffffff81405260 T ieee80211_inputm +ffffffff81405d50 T ieee80211_input_ba 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ieee80211_recv_probe_req +ffffffff81408750 T ieee80211_recv_auth +ffffffff814087f0 T ieee80211_recv_assoc_req +ffffffff814091a0 T ieee80211_recv_assoc_resp +ffffffff81409700 T ieee80211_recv_deauth +ffffffff81409870 T ieee80211_recv_disassoc +ffffffff81409980 T ieee80211_recv_addba_req +ffffffff81409da0 T ieee80211_addba_req_refuse +ffffffff81409e40 T ieee80211_addba_req_accept +ffffffff81409ed0 T ieee80211_recv_addba_resp +ffffffff8140a070 T ieee80211_addba_resp_refuse +ffffffff8140a0b0 T ieee80211_addba_resp_accept +ffffffff8140a130 T ieee80211_recv_delba +ffffffff8140a2b0 T ieee80211_recv_sa_query_req +ffffffff8140a320 T ieee80211_recv_sa_query_resp +ffffffff8140a390 T ieee80211_recv_action +ffffffff8140a4b0 T ieee80211_recv_mgmt +ffffffff8140a610 T ieee80211_bar_tid +ffffffff8140b000 T ieee80211_node2req +ffffffff8140b370 T ieee80211_req2node +ffffffff8140b480 T ieee80211_disable_wep +ffffffff8140b590 T ieee80211_disable_rsn +ffffffff8140b5f0 T ieee80211_ioctl +ffffffff8140d000 T ieee80211_inact_timeout +ffffffff8140d0a0 T ieee80211_node_cache_timeout +ffffffff8140d0e0 T ieee80211_clean_nodes +ffffffff8140d400 T ieee80211_print_ess +ffffffff8140d5f0 T ieee80211_print_ess_list +ffffffff8140d660 T ieee80211_get_ess +ffffffff8140d6f0 T ieee80211_del_ess +ffffffff8140d850 T ieee80211_add_ess +ffffffff8140ded0 T ieee80211_ess_adjust_rssi +ffffffff8140df40 T ieee80211_ess_calculate_score +ffffffff8140e0a0 T ieee80211_ess_is_better +ffffffff8140e1f0 T ieee80211_match_ess +ffffffff8140e2e0 T ieee80211_switch_ess +ffffffff8140e550 T ieee80211_set_ess +ffffffff8140e820 T ieee80211_deselect_ess +ffffffff8140e880 T ieee80211_node_attach +ffffffff8140ea60 T ieee80211_node_alloc +ffffffff8140ea80 T ieee80211_node_free +ffffffff8140eb30 T ieee80211_node_copy +ffffffff8140ece0 T ieee80211_node_getrssi +ffffffff8140ed10 T ieee80211_node_checkrssi +ffffffff8140eda0 T ieee80211_set_tim +ffffffff8140ee10 T ieee80211_alloc_node_helper +ffffffff8140ee90 T ieee80211_node_lateattach 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T ieee80211_output +ffffffff814140f0 T ieee80211_action_name +ffffffff81414140 T ieee80211_mgmt_output +ffffffff814143a0 T ieee80211_pwrsave +ffffffff814144d0 T ieee80211_up_to_ac +ffffffff81414590 T ieee80211_classify +ffffffff81414680 T ieee80211_can_use_ampdu +ffffffff814146e0 T ieee80211_tx_compressed_bar +ffffffff81414820 T ieee80211_get_compressed_bar +ffffffff814148f0 T ieee80211_encap +ffffffff81414d70 T ieee80211_add_capinfo +ffffffff81414e00 T ieee80211_add_ssid +ffffffff81414e60 T ieee80211_add_rates +ffffffff81414ed0 T ieee80211_add_ds_params +ffffffff81414f30 T ieee80211_add_tim +ffffffff81415090 T ieee80211_add_ibss_params +ffffffff814150c0 T ieee80211_add_edca_params +ffffffff81415240 T ieee80211_add_erp +ffffffff814152e0 T ieee80211_add_qos_capability +ffffffff81415320 T ieee80211_add_wme_info +ffffffff81415360 T ieee80211_add_wme_param +ffffffff814154f0 T ieee80211_add_rsn_body +ffffffff814157d0 T ieee80211_add_rsn +ffffffff81415830 T ieee80211_add_wpa +ffffffff814158a0 T ieee80211_add_xrates +ffffffff81415930 T ieee80211_add_htcaps +ffffffff81415a00 T ieee80211_add_htop +ffffffff81415ad0 T ieee80211_add_vhtcaps +ffffffff81415b70 T ieee80211_add_tie +ffffffff81415bc0 T ieee80211_getmgmt +ffffffff81415c80 T ieee80211_get_probe_req +ffffffff81416030 T ieee80211_get_probe_resp +ffffffff81416590 T ieee80211_get_auth +ffffffff81416620 T ieee80211_get_deauth +ffffffff814166a0 T ieee80211_get_assoc_req +ffffffff81416ba0 T ieee80211_get_assoc_resp +ffffffff81416f60 T ieee80211_get_disassoc +ffffffff81416fe0 T ieee80211_get_addba_req +ffffffff814170d0 T ieee80211_output_ba_move_window +ffffffff814171c0 T ieee80211_output_ba_move_window_to_first_unacked +ffffffff81417350 T ieee80211_output_ba_record_ack +ffffffff814174a0 T ieee80211_get_addba_resp +ffffffff814175a0 T ieee80211_get_delba +ffffffff81417640 T ieee80211_get_sa_query +ffffffff814176d0 T ieee80211_get_action +ffffffff81417960 T ieee80211_send_mgmt +ffffffff81417d00 T ieee80211_get_rts +ffffffff81417d90 T ieee80211_get_cts_to_self +ffffffff81417e20 T ieee80211_beacon_alloc +ffffffff81419000 T ieee80211_eapol_key_input +ffffffff81419210 T ieee80211_recv_eapol_key_req +ffffffff81419370 T ieee80211_recv_4way_msg3 +ffffffff81419d10 T ieee80211_recv_4way_msg2or4 +ffffffff81419e50 T ieee80211_recv_4way_msg1 +ffffffff8141a130 T ieee80211_recv_wpa_group_msg1 +ffffffff8141a460 T ieee80211_recv_rsn_group_msg1 +ffffffff8141a990 T ieee80211_recv_group_msg2 +ffffffff8141aae0 T ieee80211_recv_4way_msg2 +ffffffff8141acf0 T ieee80211_must_update_group_key +ffffffff8141ad50 T ieee80211_recv_4way_msg4 +ffffffff8141b000 T ieee80211_send_eapol_key +ffffffff8141b220 T ieee80211_eapol_timeout +ffffffff8141b2a0 T ieee80211_send_4way_msg1 +ffffffff8141b560 T ieee80211_send_4way_msg3 +ffffffff8141bab0 T ieee80211_send_group_msg1 +ffffffff8141bfd0 T ieee80211_add_gtk_kde +ffffffff8141c090 T ieee80211_add_pmkid_kde +ffffffff8141c0e0 T ieee80211_add_igtk_kde +ffffffff8141c1b0 T ieee80211_get_eapol_key +ffffffff8141c270 T ieee80211_send_4way_msg2 +ffffffff8141c490 T ieee80211_send_4way_msg4 +ffffffff8141c670 T ieee80211_send_group_msg2 +ffffffff8141c850 T ieee80211_send_eapol_key_req +ffffffff8141d000 T ieee80211_proto_attach +ffffffff8141d0b0 T ieee80211_newstate +ffffffff8141dd80 T ieee80211_proto_detach +ffffffff8141ddc0 T ieee80211_print_essid +ffffffff8141df40 T ieee80211_fix_rate +ffffffff8141e380 T ieee80211_reset_erp +ffffffff8141e4a0 T ieee80211_set_shortslottime +ffffffff8141e500 T ieee80211_keyrun +ffffffff8141e670 T ieee80211_setkeys +ffffffff8141e8b0 t ieee80211_node_gtk_rekey +ffffffff8141e910 T ieee80211_setkeysdone +ffffffff8141ea10 T ieee80211_gtk_rekey_timeout +ffffffff8141ea60 T ieee80211_sa_query_timeout +ffffffff8141eb30 T ieee80211_sa_query_request +ffffffff8141ebb0 T ieee80211_ht_negotiate +ffffffff8141ed80 T ieee80211_vht_negotiate +ffffffff8141ef90 T ieee80211_tx_ba_timeout +ffffffff8141f0b0 T ieee80211_delba_request +ffffffff8141f230 T ieee80211_rx_ba_timeout +ffffffff8141f2c0 T ieee80211_addba_request +ffffffff8141f490 T ieee80211_auth_open_confirm +ffffffff8141f540 T ieee80211_try_another_bss +ffffffff8141f650 T ieee80211_auth_open +ffffffff8141f950 T ieee80211_set_beacon_miss_threshold +ffffffff8141f9e0 T ieee80211_stop_ampdu_tx +ffffffff8141faf0 T ieee80211_check_wpa_supplicant_failure +ffffffff8141fb70 T ieee80211_set_link_state +ffffffff8141fc00 T ieee80211_rtm_80211info_task +ffffffff81420000 T ieee80211_ra_get_ht_rateset +ffffffff81420080 T ieee80211_ra_use_ht_sgi +ffffffff81420100 T ieee80211_ra_get_txrate +ffffffff81420190 T ieee80211_ra_next_lower_intra_rate +ffffffff81420330 T ieee80211_ra_next_intra_rate +ffffffff814204c0 T ieee80211_ra_next_rateset +ffffffff814206e0 T ieee80211_ra_best_mcs_in_rateset +ffffffff81420760 T ieee80211_ra_probe_next_rateset +ffffffff81420a20 T ieee80211_ra_next_mcs +ffffffff81420a70 T ieee80211_ra_probe_clear +ffffffff81420ab0 T ieee80211_ra_probe_done +ffffffff81420af0 T ieee80211_ra_intra_mode_ra_finished +ffffffff81420e60 T ieee80211_ra_trigger_next_rateset +ffffffff81420ed0 T ieee80211_ra_inter_mode_ra_finished +ffffffff81420f00 T ieee80211_ra_best_rate +ffffffff81420fa0 T ieee80211_ra_probe_next_rate +ffffffff81421040 T ieee80211_ra_valid_tx_mcs +ffffffff814210c0 T ieee80211_ra_valid_rates +ffffffff81421190 T ieee80211_ra_probe_valid +ffffffff814211e0 T ieee80211_ra_add_stats_ht +ffffffff81421480 T ieee80211_ra_choose +ffffffff814218c0 T ieee80211_ra_node_init +ffffffff81422000 T ieee80211_ra_vht_get_rateset +ffffffff814220a0 T ieee80211_ra_vht_use_sgi +ffffffff814221b0 T ieee80211_ra_vht_get_txrate +ffffffff81422250 T ieee80211_ra_vht_next_lower_intra_rate +ffffffff81422290 T ieee80211_ra_vht_get_max_mcs +ffffffff81422310 T ieee80211_ra_vht_next_intra_rate +ffffffff81422400 T ieee80211_ra_vht_next_rateset +ffffffff81422550 T ieee80211_ra_vht_best_mcs_in_rateset +ffffffff814225f0 T ieee80211_ra_vht_probe_next_rateset +ffffffff814228e0 T ieee80211_ra_vht_next_mcs +ffffffff81422970 T ieee80211_ra_vht_probe_clear +ffffffff814229a0 T ieee80211_ra_vht_probe_done +ffffffff814229f0 T ieee80211_ra_vht_intra_mode_ra_finished +ffffffff81422dc0 T ieee80211_ra_vht_trigger_next_rateset +ffffffff81422e30 T ieee80211_ra_vht_inter_mode_ra_finished +ffffffff81422e60 T ieee80211_ra_vht_best_rate +ffffffff81423120 T ieee80211_ra_vht_probe_next_rate +ffffffff814231d0 T ieee80211_ra_vht_init_valid_rates +ffffffff814233d0 T ieee80211_ra_vht_probe_valid +ffffffff81423420 T ieee80211_ra_vht_add_stats +ffffffff81423710 T ieee80211_ra_vht_choose +ffffffff81423b40 T ieee80211_ra_vht_node_init +ffffffff81424000 T ieee80211_rssadapt_choose +ffffffff814240d0 T ieee80211_rssadapt_updatestats +ffffffff81424150 T ieee80211_rssadapt_input +ffffffff81424190 T ieee80211_rssadapt_lower_rate +ffffffff81424210 T ieee80211_rssadapt_raise_rate +ffffffff81425000 T bsearch +ffffffff814250b0 T ieee80211_regdomain_compare_cn +ffffffff814250d0 T ieee80211_regdomain_compare_rn +ffffffff814250f0 T ieee80211_name2countrycode +ffffffff81425190 T ieee80211_name2regdomain +ffffffff81425230 T ieee80211_countrycode2name +ffffffff814252c0 T ieee80211_regdomain2name +ffffffff81425340 T ieee80211_regdomain2flag +ffffffff81425400 T ieee80211_countrycode2regdomain +ffffffff81426000 T arptimer +ffffffff81426080 T arptfree +ffffffff81426160 T arpinit +ffffffff814261d0 T arp_rtrequest +ffffffff81426610 T arprequest +ffffffff81426750 T arpinvalidate +ffffffff814267b0 T arpreply +ffffffff81426890 T arpresolve +ffffffff81426e80 T arppullup +ffffffff81426f40 T arpinput +ffffffff81426fa0 T arpintr +ffffffff81427050 T in_arpinput +ffffffff81427470 T arplookup +ffffffff81427560 T arpcache +ffffffff814278e0 T arpproxy +ffffffff814279c0 T revarpinput +ffffffff81427a10 T in_revarpinput +ffffffff81427ad0 T revarprequest +ffffffff81427c10 T revarpwhoarewe +ffffffff81427e00 T revarpwhoami +ffffffff81428000 T igmp_init +ffffffff81428090 T rti_fill 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in_insert_prefix +ffffffff8142b3d0 T in_addmulti +ffffffff8142b570 T in_delmulti +ffffffff8142b6c0 T in_broadcast +ffffffff8142b750 T in_hasmulti +ffffffff8142b7f0 T in_ifdetach +ffffffff8142b880 T in_prefixlen2mask +ffffffff8142c000 T in_init +ffffffff8142c060 T in_pcbhash +ffffffff8142c180 T in_pcblhash +ffffffff8142c240 T in_pcbinit +ffffffff8142c2f0 T in_baddynamic +ffffffff8142c360 T in_rootonly +ffffffff8142c3e0 T in_pcballoc +ffffffff8142c560 T in_pcbresize +ffffffff8142c740 T in_pcbhash_insert +ffffffff8142c920 T in_pcbbind +ffffffff8142cc20 T in_pcbaddrisavail +ffffffff8142ce10 T in_pcbpickport +ffffffff8142d000 T in_pcbrehash +ffffffff8142d090 T in_pcblookup_local +ffffffff8142d340 T in_pcbunref +ffffffff8142d430 T in_pcbconnect +ffffffff8142d6a0 T in_pcbselsrc +ffffffff8142d8d0 T in_pcblookup +ffffffff8142d9d0 T in_pcbdisconnect +ffffffff8142db10 T in_pcbdetach +ffffffff8142dc60 T in_pcbref +ffffffff8142dcb0 T in_setsockaddr +ffffffff8142dd10 T in_setpeeraddr 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T ip_freemoptions +ffffffff8143ef20 T in_delayed_cksum +ffffffff8143f000 T rip_attach +ffffffff8143f0f0 T rip_detach +ffffffff8143f170 T rip_lock +ffffffff8143f1d0 T rip_unlock +ffffffff8143f230 T rip_bind +ffffffff8143f2f0 T rip_connect +ffffffff8143f370 T rip_disconnect +ffffffff8143f3e0 T rip_shutdown +ffffffff8143f420 T rip_send +ffffffff8143f500 T rip_init +ffffffff8143f520 T rip_input +ffffffff8143f8a0 T rip_output +ffffffff8143fa90 T rip_chkhdr +ffffffff8143fb90 T rip_ctloutput +ffffffff81440000 T tcp_trace +ffffffff81441000 T tcp_reass +ffffffff814413b0 T tcp_flush_queue +ffffffff81441550 T tcp_input +ffffffff81444b80 T syn_cache_reset +ffffffff81444d80 T syn_cache_get +ffffffff814455c0 T syn_cache_add +ffffffff81445b70 T tcp_del_sackholes +ffffffff81445c30 T tcp_dooptions +ffffffff81446170 T tcp_xmit_timer +ffffffff814462d0 T tcp_clean_sackreport +ffffffff81446350 T tcp_mss +ffffffff814465f0 T tcp_sack_partialack +ffffffff814466a0 T tcp_newreno_partialack +ffffffff81446790 T tcp_seq_subtract +ffffffff814467c0 T tcp_pulloutofband +ffffffff81446880 T tcp_update_sack_list +ffffffff81446db0 T tcp_sack_option +ffffffff814472f0 T tcp_hdrsz +ffffffff81447360 T tcp_mss_update +ffffffff814474b0 T tcp_mss_adv +ffffffff81447570 T syn_cache_rm +ffffffff81447650 T syn_cache_put +ffffffff814476b0 T syn_cache_reaper +ffffffff814476d0 T syn_cache_init +ffffffff814477e0 T syn_cache_insert +ffffffff81447e60 T syn_cache_timer +ffffffff814480c0 T syn_cache_respond +ffffffff814486f0 T syn_cache_cleanup +ffffffff814488b0 T syn_cache_lookup +ffffffff81448ac0 T syn_cache_unreach +ffffffff81449000 T tcp_sack_output +ffffffff81449080 T tcp_sack_adjust +ffffffff81449100 T tcp_output +ffffffff8144ac80 T tcp_setpersist +ffffffff8144b000 T tcp_init +ffffffff8144b170 T tcp6_mtudisc_callback +ffffffff8144b1d0 T tcp_template +ffffffff8144b350 T tcp_respond +ffffffff8144b760 T tcp_newtcpcb +ffffffff8144b960 T tcp_drop +ffffffff8144ba60 T tcp_close +ffffffff8144bb90 T tcp_freeq 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udp_send +ffffffff814514f0 T udp_init +ffffffff81451520 T udp_input +ffffffff81452300 T udp_sbappend +ffffffff81452570 T udp_notify +ffffffff814525b0 T udp6_ctlinput +ffffffff814528f0 T udp_ctlinput +ffffffff81452a60 T udp_output +ffffffff81452ec0 T udp_sysctl +ffffffff81453160 T udp_sysctl_udpstat +ffffffff81454000 T gre_send +ffffffff81455000 T ipsp_ids_gc +ffffffff81455120 T ipsp_init +ffffffff81455200 T tdb_hash +ffffffff81455320 T reserve_spi +ffffffff814555a0 T tdb_alloc +ffffffff814556b0 T gettdb_dir +ffffffff814557f0 T tdb_unref +ffffffff81455840 T puttdb +ffffffff81455880 T tdb_ref +ffffffff814558d0 T gettdbbysrcdst_dir +ffffffff81455af0 T ipsp_aux_match +ffffffff81455ba0 T ipsp_ids_match +ffffffff81455bd0 T gettdbbydst +ffffffff81455d60 T gettdbbysrc +ffffffff81455ef0 T tdb_hashstats +ffffffff81456270 T tdb_printit +ffffffff81456a60 T ipsp_address +ffffffff81456ac0 T tdb_walk +ffffffff81456c60 T tdb_timeout +ffffffff81456d00 T tdb_delete +ffffffff81456ef0 T tdb_firstuse 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mpii_scsi_ioctl +ffffffff81711140 T mpii_write +ffffffff81711190 T mpii_iocfacts +ffffffff81711460 T mpii_init +ffffffff81711700 T mpii_alloc_ccbs +ffffffff81711b30 T mpii_alloc_replies +ffffffff81711bf0 T mpii_alloc_queues +ffffffff81711d50 T mpii_iocinit +ffffffff81711ed0 T mpii_wait_eq +ffffffff81711f80 T mpii_read +ffffffff81711fb0 T mpii_push_replies +ffffffff81712110 T mpii_init_queues +ffffffff81712190 T mpii_board_info +ffffffff81712390 T mpii_portfacts +ffffffff817124c0 T mpii_target_map +ffffffff817125b0 T mpii_cfg_coalescing +ffffffff81712680 T mpii_eventnotify +ffffffff81712850 T mpii_portenable +ffffffff81712940 T mpii_intr +ffffffff81712c70 T mpii_ioctl +ffffffff81712d80 T mpii_create_sensors +ffffffff81712f10 T mpii_dmamem_free +ffffffff81712fa0 T mpii_get_ccb +ffffffff81713030 T mpii_reply +ffffffff81713100 T mpii_event_process +ffffffff817133f0 T mpii_load_xs_sas3 +ffffffff817135a0 T mpii_load_xs +ffffffff817137a0 T mpii_req_cfg_header +ffffffff81713960 T mpii_req_cfg_page +ffffffff81713b90 T mpii_wait_ne +ffffffff81713c40 T mpii_reset_soft +ffffffff81713d70 T mpii_reset_hard +ffffffff81713fa0 T mpii_handshake_send +ffffffff81714200 T mpii_handshake_recv_dword +ffffffff81714370 T mpii_handshake_recv +ffffffff81714540 T mpii_empty_done +ffffffff81714570 T mpii_push_reply +ffffffff817145f0 T mpii_poll +ffffffff81714770 T mpii_eventack +ffffffff81714960 T mpii_eventack_done +ffffffff817149e0 T mpii_start +ffffffff81714ab0 T mpii_event_sas +ffffffff81714ee0 T mpii_eventnotify_done +ffffffff81714f20 T mpii_event_raid +ffffffff81715250 T mpii_find_dev +ffffffff817152b0 T mpii_insert_dev +ffffffff81715330 T mpii_remove_dev +ffffffff817153b0 T mpii_event_discovery +ffffffff81715410 T mpii_sas_remove_device +ffffffff817155d0 T mpii_event_done +ffffffff81715690 T mpii_wait +ffffffff81715810 T mpii_dmamem_alloc +ffffffff817159b0 T mpii_scsi_cmd_tmo_handler +ffffffff81715b10 T mpii_put_ccb +ffffffff81715bb0 T mpii_poll_done +ffffffff81715be0 T mpii_wait_done +ffffffff81715c20 T mpii_scsi_cmd_done +ffffffff81715e80 T mpii_scsi_cmd_tmo +ffffffff81715f30 T mpii_scsi_cmd_tmo_done +ffffffff81715f50 T mpii_ioctl_cache +ffffffff817161f0 T mpii_ioctl_inq +ffffffff817162a0 T mpii_ioctl_vol +ffffffff81716520 T mpii_ioctl_disk +ffffffff81716700 T mpii_find_vol +ffffffff81716750 T mpii_bio_hs +ffffffff81716940 T mpii_bio_disk +ffffffff81716b90 T mpii_bio_volstate +ffffffff81716d30 T mpii_refresh_sensors +ffffffff81717000 T sili_pci_match +ffffffff817170b0 T sili_pci_attach +ffffffff817173c0 T sili_pci_detach +ffffffff81717470 T sili_pci_activate +ffffffff817174b0 T sili_lookup +ffffffff81718000 T aq_fw1x_reset +ffffffff81718050 T aq_fw1x_set_mode +ffffffff81718080 T aq_fw1x_get_mode +ffffffff817180b0 T aq_fw1x_get_stats +ffffffff817180e0 T aq_fw2x_reset +ffffffff81718170 T aq_fw2x_set_mode +ffffffff81718310 T aq_fw2x_get_mode +ffffffff817184a0 T aq_fw2x_get_stats +ffffffff817184d0 T aq_match +ffffffff81718500 T aq_attach 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aq_hw_init_tx_path +ffffffff8171bd50 T aq_hw_init_rx_path +ffffffff8171c290 T aq_set_mac_addr +ffffffff8171c470 T aq_hw_qos_set +ffffffff8171ca90 T aq_get_linkmode +ffffffff8171cb00 T aq_txring_reset +ffffffff8171cea0 T aq_rxring_reset +ffffffff8171d390 T aq_rx_fill +ffffffff8171d590 T aq_rxeof +ffffffff8171d910 T aq_txeof +ffffffff8171dae0 T aq_update_link_status +ffffffff8171db80 T aq_free_slots +ffffffff8171dc30 T aq_queue_up +ffffffff8171e0a0 T aq_dmamem_alloc +ffffffff8171e1f0 T aq_dmamem_free +ffffffff8171e260 T aq_queue_down +ffffffff8171e540 T aq_invalidate_rx_desc_cache +ffffffff8171e5c0 T aq_up +ffffffff8171ea00 T aq_down +ffffffff8171eb50 T aq_rxrinfo +ffffffff8171ec40 T aq_iff +ffffffff8171f000 T tulip_probe +ffffffff8171f060 T tulip_attach +ffffffff8171fab0 T tulip_timeout_callback +ffffffff8171fb00 T tulip_timeout +ffffffff8171fb70 T tulip_txprobe +ffffffff8171fcb0 T tulip_txput +ffffffff81720230 T tulip_media_set +ffffffff81720820 T tulip_reset +ffffffff81720be0 T tulip_mii_autonegotiate +ffffffff81720ee0 T tulip_mii_readreg +ffffffff81721090 T tulip_mii_writereg +ffffffff81721250 T tulip_linkup +ffffffff81721320 T tulip_init +ffffffff817214a0 T tulip_media_print +ffffffff817214f0 T tulip_media_link_monitor +ffffffff81721760 T tulip_mii_map_abilities +ffffffff817217f0 T tulip_media_poll +ffffffff81721ce0 T tulip_mii_phy_readspecific +ffffffff81721ea0 T tulip_media_select +ffffffff81721fb0 T tulip_21040_mediainfo_init +ffffffff817220b0 T tulip_21040_media_probe +ffffffff817221a0 T tulip_21040_10baset_only_media_probe +ffffffff81722260 T tulip_21040_10baset_only_media_select +ffffffff817222c0 T tulip_21040_auibnc_only_media_probe +ffffffff81722350 T tulip_21040_auibnc_only_media_select +ffffffff817223a0 T tulip_21041_mediainfo_init +ffffffff81722460 T tulip_21041_media_probe +ffffffff81722540 T tulip_21041_media_poll +ffffffff81722850 T tulip_mii_get_phyaddr +ffffffff81722910 T tulip_2114x_media_preset +ffffffff81722b30 T tulip_null_media_poll +ffffffff81722b60 T tulip_21140_mediainit +ffffffff81722bb0 T tulip_21140_evalboard_media_probe +ffffffff81722d90 T tulip_21140_accton_media_probe +ffffffff81722fb0 T tulip_21140_smc9332_media_probe +ffffffff817231e0 T tulip_21140_cogent_em100_media_probe +ffffffff81723350 T tulip_21140_znyx_zx34x_media_probe +ffffffff81723590 T tulip_2114x_media_probe +ffffffff817235c0 T tulip_delay_300ns +ffffffff817236d0 T tulip_srom_idle +ffffffff81724070 T tulip_srom_read +ffffffff81724e10 T tulip_mii_writebits +ffffffff817253a0 T tulip_mii_turnaround +ffffffff81725b70 T tulip_mii_readbits +ffffffff81725f50 T tulip_identify_dec_nic +ffffffff81726000 T tulip_identify_znyx_nic +ffffffff817262d0 T tulip_identify_smc_nic +ffffffff817264b0 T tulip_identify_cogent_nic +ffffffff817265a0 T tulip_identify_accton_nic +ffffffff817266d0 T tulip_identify_asante_nic +ffffffff817269a0 T tulip_identify_compex_nic +ffffffff81726af0 T tulip_srom_decode +ffffffff81727740 T tulip_read_macaddr +ffffffff81728100 T tulip_ifmedia_add +ffffffff817281f0 T tulip_ifmedia_change +ffffffff817283d0 T tulip_ifmedia_status +ffffffff81728440 T tulip_alloc_rxmap +ffffffff81728480 T tulip_free_rxmap +ffffffff817284c0 T tulip_alloc_txmap +ffffffff81728500 T tulip_free_txmap +ffffffff81728540 T tulip_addr_filter +ffffffff81728850 T tulip_rx_intr +ffffffff81728e60 T tulip_txput_setup +ffffffff817290f0 T tulip_tx_intr +ffffffff81729510 T tulip_print_abnormal_interrupt +ffffffff81729540 T tulip_intr_handler +ffffffff817298f0 T tulip_ifstart +ffffffff817299c0 T tulip_intr_shared +ffffffff81729a30 T tulip_intr_normal +ffffffff81729a80 T tulip_ifioctl +ffffffff81729b70 T tulip_ifwatchdog +ffffffff81729c70 T tulip_busdma_allocmem +ffffffff81729e00 T tulip_busdma_init +ffffffff8172a020 T tulip_initcsrs +ffffffff8172a120 T tulip_initring +ffffffff8172b000 T ep_pci_match +ffffffff8172b030 T ep_pci_attach +ffffffff8172c000 T pcn_match +ffffffff8172c070 T pcn_attach +ffffffff8172c7e0 T pcn_tick +ffffffff8172c830 T pcn_reset +ffffffff8172c8a0 T pcn_intr +ffffffff8172cae0 T pcn_ioctl +ffffffff8172cc40 T pcn_start +ffffffff8172d090 T pcn_watchdog +ffffffff8172d100 T pcn_txintr +ffffffff8172d5c0 T pcn_init +ffffffff8172de80 T pcn_stop +ffffffff8172e000 T pcn_rxintr +ffffffff8172e520 T pcn_spnd +ffffffff8172e620 T pcn_add_rxbuf +ffffffff8172e810 T pcn_rxdrain +ffffffff8172e8b0 T pcn_set_filter +ffffffff8172ea10 T pcn_79c970_mediainit +ffffffff8172eb20 T pcn_79c970_mediachange +ffffffff8172ece0 T pcn_79c970_mediastatus +ffffffff8172ed20 T pcn_79c971_mediainit +ffffffff8172edf0 T pcn_mii_readreg +ffffffff8172eeb0 T pcn_mii_writereg +ffffffff8172ef50 T pcn_mii_statchg +ffffffff8172efb0 T pcn_79c971_mediachange +ffffffff8172f000 T pcn_79c971_mediastatus +ffffffff81730000 T siop_lookup_product +ffffffff817300a0 T siop_pci_attach_common +ffffffff81730530 T siop_pci_reset +ffffffff81731000 T siop_pci_match +ffffffff81731050 T siop_pci_attach +ffffffff81732000 T sii3114_read_reg +ffffffff81732060 T sii3114_write_reg +ffffffff817320d0 T pdc203xx_read_reg +ffffffff81732130 T pdc203xx_write_reg +ffffffff817321a0 T svwsata_read_reg +ffffffff81732200 T svwsata_write_reg +ffffffff81732240 T svwsata_lba48_write_reg +ffffffff81732280 T pciide_pci_read +ffffffff817322d0 T pciide_pci_write +ffffffff81732340 T default_chip_map +ffffffff81732990 T artisea_chip_map +ffffffff81732bf0 T piix_chip_map +ffffffff817331e0 T piixsata_chip_map +ffffffff81733700 T sch_chip_map +ffffffff81733a20 T amd756_chip_map +ffffffff81733e30 T ixp_chip_map +ffffffff817341a0 T cmd_chip_map +ffffffff81734300 T cmd0643_9_chip_map +ffffffff81734600 T cmd680_chip_map +ffffffff817347e0 T sii3112_chip_map +ffffffff81734b60 T sii3114_chip_map +ffffffff81734f60 T apollo_chip_map +ffffffff817355c0 T sata_chip_map +ffffffff817357e0 T cy693_chip_map +ffffffff81735ba0 T sis_chip_map +ffffffff817362e0 T natsemi_chip_map +ffffffff81736740 T ns_scx200_chip_map +ffffffff81736ad0 T acer_chip_map +ffffffff81737150 T hpt_chip_map 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+ffffffff8173b980 T pciide_dma_start +ffffffff8173ba00 T pciide_dma_finish +ffffffff8173bbd0 T pciide_unmapreg_dma +ffffffff8173bc00 T pciide_intr_flag +ffffffff8173be10 T pciide_compat_intr +ffffffff8173be90 T pciide_pci_intr +ffffffff8173bf50 T pciide_channel_dma_setup +ffffffff8173c020 T pciide_dma_table_setup +ffffffff8173c260 T pciide_irqack +ffffffff8173c2b0 T pciide_chansetup +ffffffff8173c390 T pciide_chanfree +ffffffff8173c3e0 T pciide_mapchan +ffffffff8173c470 T pciide_unmap_chan +ffffffff8173c540 T pciide_chan_candisable +ffffffff8173c5b0 T pciide_map_compat_intr +ffffffff8173c650 T pciide_unmap_compat_intr +ffffffff8173c6b0 T pciide_print_channels +ffffffff8173c780 T pciide_print_modes +ffffffff8173c790 T default_chip_unmap +ffffffff8173c870 T sata_setup_channel +ffffffff8173c990 T piix_timing_debug +ffffffff8173c9c0 T piix_setup_channel +ffffffff8173ce50 T piix3_4_setup_channel +ffffffff8173d5f0 T piix_setup_idetim_timings +ffffffff8173d660 T piix_setup_idetim_drvs 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ppb_hotplug_insert_finish +ffffffff81747150 T ppb_intr +ffffffff81747210 T ppb_alloc_resources +ffffffff81747920 T ppbprint +ffffffff81748000 T cy_pci_match +ffffffff81748030 T cy_pci_attach +ffffffff81749000 T rl_pci_match +ffffffff81749060 T rl_pci_attach +ffffffff81749220 T rl_pci_detach +ffffffff8174a000 T re_pci_probe +ffffffff8174a0a0 T re_pci_attach +ffffffff8174a3d0 T re_pci_detach +ffffffff8174a490 T re_pci_activate +ffffffff8174b000 T vr_probe +ffffffff8174b0f0 T vr_attach +ffffffff8174b880 T vr_activate +ffffffff8174b900 T vr_mii_readreg +ffffffff8174ba70 T vr_mii_writereg +ffffffff8174bbd0 T vr_miibus_readreg +ffffffff8174bc40 T vr_miibus_writereg +ffffffff8174bca0 T vr_miibus_statchg +ffffffff8174bcc0 T vr_setcfg +ffffffff8174bee0 T vr_iff +ffffffff8174c060 T vr_reset +ffffffff8174c170 T vr_quirks +ffffffff8174c270 T vr_dmamem_alloc +ffffffff8174c3d0 T vr_dmamem_free +ffffffff8174c440 T vr_intr +ffffffff8174c670 T vr_chipinit +ffffffff8174c750 T vr_ioctl +ffffffff8174c8f0 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txp_intr +ffffffff817518b0 T txp_reset_adapter +ffffffff817519b0 T txp_download_fw_wait +ffffffff81751aa0 T txp_download_fw_section +ffffffff81751e10 T txp_dma_malloc +ffffffff81751fb0 T txp_dma_free +ffffffff81752030 T txp_rx_reclaim +ffffffff81752310 T txp_rxbuf_reclaim +ffffffff81752590 T txp_tx_reclaim +ffffffff81752740 T txp_init +ffffffff81752880 T txp_stop +ffffffff81752980 T txp_set_filter +ffffffff81752b10 T txp_command2 +ffffffff81752df0 T txp_cmd_desc_numfree +ffffffff81752e50 T txp_response +ffffffff81753120 T txp_rsp_fixup +ffffffff81753210 T txp_show_descriptor +ffffffff81754000 T init_audio_devices +ffffffff81754120 T init_BTSC +ffffffff817541e0 T set_audio +ffffffff81754570 T set_bctv_audio +ffffffff817548b0 T msp_autodetect +ffffffff81754ce0 T temp_mute +ffffffff81754d80 T set_BTSC +ffffffff81754da0 T bctv_gpio_write +ffffffff81754f10 T msp_read_id +ffffffff81754fd0 T dpl_read_id +ffffffff81755090 T dpl_autodetect +ffffffff81756000 T writeEEProm +ffffffff81756030 T readEEProm +ffffffff81756100 T signCard +ffffffff817561b0 T probeCard +ffffffff81758000 T bktr_name +ffffffff81758030 T common_bktr_attach +ffffffff81758330 T common_bktr_intr +ffffffff81758950 T video_open +ffffffff81758e10 t set_fps +ffffffff81758f50 T vbi_open +ffffffff81758ff0 T tuner_open +ffffffff81759040 T video_close +ffffffff81759130 T tuner_close +ffffffff81759160 T vbi_close +ffffffff81759190 T video_read +ffffffff81759350 t start_capture +ffffffff8175c290 T vbi_read +ffffffff8175c3b0 T video_ioctl +ffffffff8175d850 T bktr_common_ioctl +ffffffff8175e020 T tuner_ioctl +ffffffff8175ef70 T i2cWrite +ffffffff8175f090 T i2cRead +ffffffff8175f1b0 T msp_dpl_read +ffffffff8175f480 T msp_dpl_write +ffffffff8175f640 T msp_dpl_reset +ffffffff8175f940 t i2c_write_byte +ffffffff8175fb20 t i2c_read_byte +ffffffff8175fd40 t split +ffffffff8175ff40 t getline +ffffffff81761000 t bktr_probe +ffffffff81761060 t bktr_attach +ffffffff817612e0 T bktr_get_info +ffffffff817613c0 T bktr_set_info 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em_setup_interface +ffffffff81765c80 T em_update_link_status +ffffffff81765e70 T em_local_timer +ffffffff81765f20 T em_82547_move_tail +ffffffff81765f60 T em_identify_hardware +ffffffff81766070 T em_allocate_pci_resources +ffffffff81766470 T em_allocate_desc_rings +ffffffff81766580 T em_hardware_init +ffffffff81766820 T em_kstat_attach +ffffffff81766970 T em_start +ffffffff81766c60 T em_encap +ffffffff81767140 T em_82547_move_tail_locked +ffffffff81767370 T em_82547_update_fifo_head +ffffffff817673c0 T em_ioctl +ffffffff817676b0 T em_init +ffffffff81767a10 T em_get_sffpage +ffffffff81767ad0 T em_disable_intr +ffffffff81767bd0 T em_iff +ffffffff81767ee0 T em_initialize_receive_unit +ffffffff81768670 T em_enable_intr +ffffffff817687d0 T em_watchdog +ffffffff81768980 T em_enable_hw_vlans +ffffffff81768a20 T em_setup_transmit_structures +ffffffff81768c20 T em_initialize_transmit_unit +ffffffff81769240 T em_setup_receive_structures +ffffffff81769380 T em_setup_queues_msix +ffffffff81769a40 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em_standby_eeprom +ffffffff8177bab0 t em_shift_out_ee_bits +ffffffff8177bc50 t em_shift_in_ee_bits +ffffffff8177bd90 T em_validate_eeprom_checksum +ffffffff8177bf40 T em_write_eeprom +ffffffff8177c4f0 T em_update_eeprom_checksum +ffffffff8177c610 t em_commit_shadow_ram +ffffffff8177cb90 T em_read_part_num +ffffffff8177cc30 T em_read_mac_addr +ffffffff8177cdb0 T em_mc_addr_list_update +ffffffff8177cfd0 T em_hash_mc_addr +ffffffff8177d0d0 T em_rar_set +ffffffff8177d1d0 T em_mta_set +ffffffff8177d340 T em_get_bus_info +ffffffff8177d4d0 T em_check_mng_mode +ffffffff8177d550 T em_valid_nvm_bank_detect_ich8lan +ffffffff8177d700 T em_read_eeprom_spt +ffffffff8177d9d0 T em_read_ich8_data32 +ffffffff8177db40 t em_ich8_cycle_init +ffffffff8177dcf0 t em_ich8_flash_cycle +ffffffff8177de60 T em_configure_k1_ich8lan +ffffffff8177e070 t em_get_hw_eeprom_semaphore +ffffffff8177e1e0 t em_shift_out_mdi_bits +ffffffff8177e360 t em_erase_ich8_4k_segment +ffffffff8177e5a0 t em_write_ich8_byte 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ixgb_enable_intr +ffffffff817823e0 T ixgb_watchdog +ffffffff81782470 T ixgb_enable_hw_vlans +ffffffff817824c0 T ixgb_setup_transmit_structures +ffffffff81782690 T ixgb_initialize_transmit_unit +ffffffff81782800 T ixgb_setup_receive_structures +ffffffff81782880 T ixgb_initialize_receive_unit +ffffffff81782b10 T ixgb_intr +ffffffff81782d10 T ixgb_rxeof +ffffffff81783160 T ixgb_txeof +ffffffff81783350 T ixgb_media_status +ffffffff81783440 T ixgb_media_change +ffffffff81783490 T ixgb_free_transmit_structures +ffffffff817835c0 T ixgb_free_receive_structures +ffffffff817836f0 T ixgb_allocate_transmit_structures +ffffffff81783770 T ixgb_transmit_checksum_setup +ffffffff81783870 T ixgb_get_buf +ffffffff81783a20 T ixgb_allocate_receive_structures +ffffffff81783be0 T ixgb_receive_checksum +ffffffff81783c40 T ixgb_write_pci_cfg +ffffffff81784000 T ixgb_validate_eeprom_checksum +ffffffff81784080 T ixgb_read_eeprom +ffffffff817842f0 T ixgb_update_eeprom_checksum +ffffffff81784360 T ixgb_write_eeprom +ffffffff81784820 t ixgb_shift_out_bits +ffffffff81784960 T ixgb_get_eeprom_data +ffffffff81784a00 T ixgb_get_eeprom_word +ffffffff81784ae0 T ixgb_get_ee_mac_addr +ffffffff81784bd0 T ixgb_get_ee_pba_number +ffffffff81784c90 T ixgb_get_ee_device_id +ffffffff81785000 T ixgb_mac_reset +ffffffff817851e0 T ixgb_adapter_stop +ffffffff81785320 T ixgb_init_hw +ffffffff81785630 T ixgb_init_rx_addrs +ffffffff81785760 T mac_addr_valid +ffffffff817857c0 T ixgb_clear_vfta +ffffffff81785840 T ixgb_clear_hw_cntrs +ffffffff81785f20 T ixgb_setup_fc +ffffffff817860b0 T ixgb_check_for_link +ffffffff817862c0 T ixgb_rar_set +ffffffff81786330 T ixgb_mc_addr_list_update +ffffffff817865b0 T ixgb_write_vfta +ffffffff817865e0 T ixgb_read_phy_reg +ffffffff81786ae0 T ixgb_write_phy_reg +ffffffff81786fd0 T ixgb_check_for_bad_link +ffffffff81787090 T ixgb_led_on +ffffffff817870e0 T ixgb_led_off +ffffffff81788000 T ixgbe_probe +ffffffff81788030 T ixgbe_attach +ffffffff817885a0 T ixgbe_detach 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ixgbe_setup_receive_structures +ffffffff8178be90 T ixgbe_initialize_receive_units +ffffffff8178c370 T ixgbe_config_gpie +ffffffff8178c440 T ixgbe_setup_vlan_hw_support +ffffffff8178c5d0 T ixgbe_configure_ivars +ffffffff8178c780 T ixgbe_set_ivar +ffffffff8178c950 T ixgbe_config_link +ffffffff8178caf0 T ixgbe_config_delay_values +ffffffff8178cc10 t ix_kstats_tick +ffffffff8178cce0 T ixgbe_enable_queue +ffffffff8178cdb0 T ixgbe_disable_queue +ffffffff8178ce80 T ixgbe_link_intr +ffffffff8178ce90 T ixgbe_intr +ffffffff8178d360 T ixgbe_queue_intr +ffffffff8178d4b0 T ixgbe_rxeof +ffffffff8178d880 T ixgbe_txeof +ffffffff8178da20 T ixgbe_rxrefill +ffffffff8178dae0 T ixgbe_legacy_intr +ffffffff8178dca0 T ixgbe_update_link_status +ffffffff8178ddf0 T ixgbe_handle_mod +ffffffff8178df10 T ixgbe_handle_msf +ffffffff8178dfe0 T ixgbe_handle_phy +ffffffff8178e070 T ixgbe_media_status +ffffffff8178e280 T ixgbe_media_change +ffffffff8178e330 T ixgbe_mc_array_itr +ffffffff8178e370 T ixgbe_setup_msix +ffffffff8178e400 T ixgbe_add_media_types +ffffffff8178e6a0 T ixgbe_dma_malloc +ffffffff8178e890 T ixgbe_dma_free +ffffffff8178e940 T ixgbe_allocate_transmit_buffers +ffffffff8178eab0 T ixgbe_setup_transmit_ring +ffffffff8178ec50 T ixgbe_free_transmit_buffers +ffffffff8178ed80 T ixgbe_get_buf +ffffffff8178eec0 T ixgbe_allocate_receive_buffers +ffffffff8178f000 T ixgbe_setup_receive_ring +ffffffff8178f0e0 T ixgbe_rxfill +ffffffff8178f210 T ixgbe_initialize_rss_mapping +ffffffff8178f480 T ixgbe_map_queue_statistics +ffffffff8178f580 T ixgbe_free_receive_buffers +ffffffff8178f6c0 T ixgbe_rx_checksum +ffffffff8178f710 T ixgbe_read_pci_cfg +ffffffff8178f770 T ixgbe_write_pci_cfg +ffffffff8178f7f0 t ix_kstats_read +ffffffff8178f9b0 t ix_rxq_kstats_read +ffffffff8178fb10 t ix_txq_kstats_read +ffffffff81790000 T ixgbe_init_ops_generic +ffffffff81790270 T ixgbe_init_eeprom_params_generic +ffffffff81790320 T ixgbe_read_eerd_generic +ffffffff81790420 T ixgbe_read_eeprom_bit_bang_generic +ffffffff817906c0 T ixgbe_write_eeprom_generic +ffffffff81790b10 T ixgbe_validate_eeprom_checksum_generic +ffffffff81790bc0 T ixgbe_update_eeprom_checksum_generic +ffffffff81790c40 T ixgbe_calc_eeprom_checksum_generic +ffffffff81790de0 T ixgbe_init_hw_generic +ffffffff81790e40 T ixgbe_start_hw_generic +ffffffff81790f60 T ixgbe_clear_hw_cntrs_generic +ffffffff81791940 T ixgbe_enable_rx_dma_generic +ffffffff817919a0 T ixgbe_get_mac_addr_generic +ffffffff81791a30 T ixgbe_stop_adapter_generic +ffffffff81791bb0 T ixgbe_get_bus_info_generic +ffffffff81791c60 T ixgbe_set_lan_id_multi_port_pcie +ffffffff81791d30 T ixgbe_acquire_swfw_sync +ffffffff81791f60 T ixgbe_release_swfw_sync +ffffffff81792010 T prot_autoc_read_generic +ffffffff81792070 T prot_autoc_write_generic +ffffffff817920c0 T ixgbe_led_on_generic +ffffffff81792180 T ixgbe_led_off_generic +ffffffff81792230 T ixgbe_blink_led_start_generic +ffffffff817923a0 T ixgbe_blink_led_stop_generic +ffffffff817924c0 T ixgbe_set_rar_generic +ffffffff817925e0 T ixgbe_clear_rar_generic +ffffffff817926e0 T ixgbe_init_rx_addrs_generic +ffffffff817928e0 T ixgbe_update_mc_addr_list_generic +ffffffff81792ae0 T ixgbe_enable_mc_generic +ffffffff81792b50 T ixgbe_disable_mc_generic +ffffffff81792bb0 T ixgbe_enable_rx_generic +ffffffff81792c70 T ixgbe_disable_rx_generic +ffffffff81792d50 T ixgbe_fc_enable_generic +ffffffff81793180 T ixgbe_setup_fc_generic +ffffffff81793450 T ixgbe_fc_autoneg +ffffffff81793620 T ixgbe_device_supports_autoneg_fc +ffffffff81793720 T ixgbe_start_hw_gen2 +ffffffff81793900 T ixgbe_identify_phy +ffffffff81793960 T ixgbe_set_pci_config_data_generic +ffffffff817939e0 T ixgbe_disable_rx +ffffffff81793a20 T ixgbe_disable_pcie_master +ffffffff81793b70 T ixgbe_read_eerd_buffer_generic +ffffffff81793cb0 T ixgbe_poll_eerd_eewr_done +ffffffff81793d50 T ixgbe_write_eewr_buffer_generic +ffffffff81793ed0 T ixgbe_write_eewr_generic +ffffffff81793f20 T ixgbe_acquire_eeprom +ffffffff817940a0 T ixgbe_get_eeprom_semaphore +ffffffff817942b0 T ixgbe_release_eeprom_semaphore +ffffffff81794320 T ixgbe_ready_eeprom +ffffffff81794490 T ixgbe_shift_out_eeprom_bits +ffffffff81794650 T ixgbe_shift_in_eeprom_bits +ffffffff817947b0 T ixgbe_standby_eeprom +ffffffff81794890 T ixgbe_raise_eeprom_clk +ffffffff81794900 T ixgbe_lower_eeprom_clk +ffffffff81794970 T ixgbe_release_eeprom +ffffffff81794a50 T ixgbe_validate_mac_addr +ffffffff81794ab0 T ixgbe_init_uta_tables +ffffffff81794af0 T ixgbe_add_uc_addr +ffffffff81794b60 T ixgbe_mta_vector +ffffffff81794c10 T ixgbe_set_mta +ffffffff81794cd0 T ixgbe_negotiate_fc +ffffffff81794d80 T ixgbe_fc_autoneg_fiber +ffffffff81794eb0 T ixgbe_fc_autoneg_backplane +ffffffff81795010 T ixgbe_fc_autoneg_copper +ffffffff81795140 T ixgbe_disable_sec_rx_path_generic +ffffffff81795200 T ixgbe_enable_sec_rx_path_generic +ffffffff81795290 T ixgbe_enable_rx +ffffffff817952d0 T ixgbe_get_pcie_msix_count_generic +ffffffff81795350 T ixgbe_insert_mac_addr_generic +ffffffff81795560 T ixgbe_set_vmdq +ffffffff817955a0 T ixgbe_set_rar +ffffffff817955f0 T ixgbe_clear_vmdq +ffffffff81795630 T ixgbe_clear_vmdq_generic +ffffffff817957d0 T ixgbe_set_vmdq_generic +ffffffff81795880 T ixgbe_init_uta_tables_generic +ffffffff81795900 T ixgbe_find_vlvf_slot +ffffffff817959c0 T ixgbe_set_vfta_generic +ffffffff81795ad0 T ixgbe_set_vlvf_generic +ffffffff81795d60 T ixgbe_clear_vfta_generic +ffffffff81795e60 T ixgbe_need_crosstalk_fix +ffffffff81795eb0 T ixgbe_check_mac_link_generic +ffffffff817960a0 T ixgbe_get_device_caps_generic +ffffffff817960f0 T ixgbe_calculate_checksum +ffffffff817961b0 T ixgbe_hic_unlocked +ffffffff81796390 T ixgbe_host_interface_command +ffffffff81796560 T ixgbe_clear_tx_pending +ffffffff81796750 T ixgbe_mng_present +ffffffff817967c0 T ixgbe_mng_enabled +ffffffff81796880 T ixgbe_setup_mac_link_multispeed_fiber +ffffffff81796c40 T ixgbe_flap_tx_laser +ffffffff81796c80 T ixgbe_check_link +ffffffff81796cd0 T ixgbe_set_soft_rate_select_speed +ffffffff81796dc0 T ixgbe_init_shared_code +ffffffff81796e70 T ixgbe_set_mac_type +ffffffff81797030 T ixgbe_init_hw +ffffffff81797070 T ixgbe_get_media_type +ffffffff817970b0 T ixgbe_read_mbx +ffffffff81797110 T ixgbe_write_mbx +ffffffff81797160 T ixgbe_check_for_msg +ffffffff817971a0 T ixgbe_check_for_ack +ffffffff817971e0 T ixgbe_check_for_rst +ffffffff81797220 T ixgbe_poll_for_msg +ffffffff817972e0 T ixgbe_poll_for_ack +ffffffff817973a0 T ixgbe_read_posted_mbx +ffffffff81797480 T ixgbe_write_posted_mbx +ffffffff81797550 T ixgbe_init_mbx_ops_generic +ffffffff81797590 T ixgbe_read_v2p_mailbox +ffffffff81797600 T ixgbe_check_for_bit_pf +ffffffff81797690 T ixgbe_check_for_msg_pf +ffffffff81797740 T ixgbe_check_for_ack_pf +ffffffff817977e0 T ixgbe_check_for_rst_pf +ffffffff817978e0 T ixgbe_obtain_mbx_lock_pf +ffffffff81797970 T ixgbe_write_mbx_pf +ffffffff81797b40 T ixgbe_read_mbx_pf +ffffffff81797c50 T ixgbe_init_mbx_params_pf +ffffffff81798000 T ixgbe_set_pcie_completion_timeout +ffffffff81798090 T ixgbe_init_ops_82598 +ffffffff817981e0 T ixgbe_init_phy_ops_82598 +ffffffff817982d0 T ixgbe_start_hw_82598 +ffffffff81798480 T ixgbe_reset_hw_82598 +ffffffff81798950 T ixgbe_get_media_type_82598 +ffffffff81798a20 T ixgbe_get_supported_physical_layer_82598 +ffffffff81798bf0 T ixgbe_read_analog_reg8_82598 +ffffffff81798cb0 T ixgbe_write_analog_reg8_82598 +ffffffff81798d30 T ixgbe_set_lan_id_multi_port_pcie_82598 +ffffffff81798dd0 T ixgbe_enable_rx_dma_82598 +ffffffff81798e20 T ixgbe_set_vmdq_82598 +ffffffff81798ed0 T ixgbe_clear_vmdq_82598 +ffffffff81798f80 T ixgbe_set_vfta_82598 +ffffffff817990b0 T ixgbe_clear_vfta_82598 +ffffffff81799260 T ixgbe_fc_enable_82598 +ffffffff817996c0 T ixgbe_read_i2c_eeprom_82598 +ffffffff817996e0 T ixgbe_check_mac_link_82598 +ffffffff81799980 T ixgbe_setup_mac_link_82598 +ffffffff81799b40 T ixgbe_get_link_capabilities_82598 +ffffffff81799c10 T ixgbe_setup_copper_link_82598 +ffffffff81799d20 T ixgbe_start_mac_link_82598 +ffffffff81799e40 T ixgbe_validate_link_ready +ffffffff81799ef0 T ixgbe_read_i2c_phy_82598 +ffffffff8179b000 T ixgbe_init_mac_link_ops_82599 +ffffffff8179b190 T ixgbe_disable_tx_laser_multispeed_fiber +ffffffff8179b260 T ixgbe_enable_tx_laser_multispeed_fiber +ffffffff8179b2e0 T ixgbe_flap_tx_laser_multispeed_fiber +ffffffff8179b420 T ixgbe_setup_mac_link_82599 +ffffffff8179b6b0 T ixgbe_set_hard_rate_select_speed +ffffffff8179b770 T ixgbe_verify_lesm_fw_enabled_82599 +ffffffff8179b830 T ixgbe_setup_mac_link_smartspeed +ffffffff8179bbb0 T ixgbe_init_phy_ops_82599 +ffffffff8179bd00 T ixgbe_read_i2c_byte_82599 +ffffffff8179be80 T ixgbe_write_i2c_byte_82599 +ffffffff8179c000 T ixgbe_setup_copper_link_82599 +ffffffff8179c060 T ixgbe_setup_sfp_modules_82599 +ffffffff8179c220 T prot_autoc_read_82599 +ffffffff8179c330 T prot_autoc_write_82599 +ffffffff8179c4a0 T ixgbe_reset_pipeline_82599 +ffffffff8179c7e0 T ixgbe_init_ops_82599 +ffffffff8179c9c0 T ixgbe_identify_phy_82599 +ffffffff8179ca50 T ixgbe_reset_hw_82599 +ffffffff8179cfa0 T ixgbe_get_media_type_82599 +ffffffff8179d0d0 T ixgbe_get_supported_physical_layer_82599 +ffffffff8179d2a0 T ixgbe_enable_rx_dma_82599 +ffffffff8179d310 T ixgbe_read_analog_reg8_82599 +ffffffff8179d3d0 T ixgbe_write_analog_reg8_82599 +ffffffff8179d450 T ixgbe_start_hw_82599 +ffffffff8179d550 T ixgbe_get_link_capabilities_82599 +ffffffff8179d690 T ixgbe_stop_mac_link_on_d3_82599 +ffffffff8179d750 T ixgbe_read_eeprom_82599 +ffffffff8179d780 T ixgbe_start_mac_link_82599 +ffffffff8179d960 T ixgbe_verify_fw_version_82599 +ffffffff8179e000 T ixgbe_init_ops_X540 +ffffffff8179e220 T ixgbe_init_eeprom_params_X540 +ffffffff8179e2b0 T ixgbe_read_eerd_X540 +ffffffff8179e340 T ixgbe_write_eewr_X540 +ffffffff8179e3d0 T ixgbe_update_eeprom_checksum_X540 +ffffffff8179e4a0 T ixgbe_validate_eeprom_checksum_X540 +ffffffff8179e590 T ixgbe_calc_eeprom_checksum_X540 +ffffffff8179e730 T ixgbe_reset_hw_X540 +ffffffff8179eac0 T ixgbe_get_media_type_X540 +ffffffff8179eaf0 T ixgbe_get_supported_physical_layer_X540 +ffffffff8179eb70 T ixgbe_start_hw_X540 +ffffffff8179ebc0 T ixgbe_acquire_swfw_sync_X540 +ffffffff8179f010 T ixgbe_release_swfw_sync_X540 +ffffffff8179f140 T ixgbe_init_swfw_sync_X540 +ffffffff8179f220 T ixgbe_setup_mac_link_X540 +ffffffff8179f240 T ixgbe_blink_led_start_X540 +ffffffff8179f360 T ixgbe_blink_led_stop_X540 +ffffffff8179f460 T ixgbe_get_link_capabilities_X540 +ffffffff8179f4a0 T ixgbe_update_flash_X540 +ffffffff8179f680 T ixgbe_poll_flash_update_done_X540 +ffffffff8179f710 T ixgbe_get_swfw_sync_semaphore +ffffffff8179f8a0 T ixgbe_release_swfw_sync_semaphore +ffffffff817a0000 T ixgbe_init_ops_X550 +ffffffff817a0110 T ixgbe_dmac_config_X550 +ffffffff817a01f0 T ixgbe_dmac_config_tcs_X550 +ffffffff817a0340 T ixgbe_dmac_update_tcs_X550 +ffffffff817a0400 T ixgbe_set_source_address_pruning_X550 +ffffffff817a04f0 T ixgbe_init_eeprom_params_X550 +ffffffff817a0570 T ixgbe_calc_eeprom_checksum_X550 +ffffffff817a0590 T ixgbe_read_ee_hostif_X550 +ffffffff817a0660 T ixgbe_write_ee_hostif_X550 +ffffffff817a0720 T ixgbe_update_eeprom_checksum_X550 +ffffffff817a08b0 T ixgbe_validate_eeprom_checksum_X550 +ffffffff817a0a00 T ixgbe_disable_rx_x550 +ffffffff817a0b20 T ixgbe_led_on_t_X550em +ffffffff817a0be0 T ixgbe_led_off_t_X550em +ffffffff817a0ca0 T ixgbe_read_cs4227 +ffffffff817a0cd0 T ixgbe_write_cs4227 +ffffffff817a0d00 T ixgbe_read_pe +ffffffff817a0d50 T ixgbe_write_pe +ffffffff817a0db0 T ixgbe_reset_cs4227 +ffffffff817a1040 T ixgbe_check_cs4227 +ffffffff817a11f0 T ixgbe_setup_mux_ctl +ffffffff817a1280 T ixgbe_identify_phy_x550em +ffffffff817a14a0 T ixgbe_read_mng_if_sel_x550em +ffffffff817a1520 T ixgbe_fw_phy_activity +ffffffff817a1640 T ixgbe_get_phy_id_fw +ffffffff817a1750 T ixgbe_identify_phy_fw +ffffffff817a17a0 T ixgbe_shutdown_fw_phy +ffffffff817a1800 T ixgbe_read_phy_reg_x550em +ffffffff817a1830 T ixgbe_write_phy_reg_x550em +ffffffff817a1860 T ixgbe_init_ops_X550EM +ffffffff817a1b10 T ixgbe_get_bus_info_X550em +ffffffff817a1b60 T ixgbe_get_media_type_X550em +ffffffff817a1c50 T ixgbe_setup_sfp_modules_X550em +ffffffff817a1de0 T ixgbe_get_link_capabilities_X550em +ffffffff817a1eb0 T ixgbe_reset_hw_X550em +ffffffff817a2530 T ixgbe_get_supported_physical_layer_X550em +ffffffff817a26b0 T ixgbe_setup_fc_X550em +ffffffff817a2810 T ixgbe_init_phy_ops_X550em +ffffffff817a2ce0 T ixgbe_setup_fw_link +ffffffff817a2e10 T ixgbe_fc_autoneg_fw +ffffffff817a2e40 T ixgbe_setup_eee_fw +ffffffff817a2ea0 T ixgbe_init_ops_X550EM_a +ffffffff817a2fd0 T ixgbe_read_iosf_sb_reg_x550 +ffffffff817a3150 T ixgbe_write_iosf_sb_reg_x550 +ffffffff817a32d0 T ixgbe_read_iosf_sb_reg_x550a +ffffffff817a3370 T ixgbe_write_iosf_sb_reg_x550a +ffffffff817a3400 T ixgbe_acquire_swfw_sync_X550a +ffffffff817a3540 T ixgbe_release_swfw_sync_X550a +ffffffff817a35e0 T ixgbe_fc_autoneg_fiber_x550em_a +ffffffff817a3620 T ixgbe_fc_autoneg_backplane_x550em_a +ffffffff817a3780 T ixgbe_setup_fc_backplane_x550em_a +ffffffff817a3970 T ixgbe_fc_autoneg_sgmii_x550em_a +ffffffff817a3a60 T ixgbe_init_ops_X550EM_x +ffffffff817a3b20 T ixgbe_acquire_swfw_sync_X550em +ffffffff817a3be0 T ixgbe_release_swfw_sync_X550em +ffffffff817a3c70 T ixgbe_iosf_wait +ffffffff817a3d20 T ixgbe_get_phy_token +ffffffff817a3da0 T ixgbe_put_phy_token +ffffffff817a3e20 T ixgbe_supported_sfp_modules_X550em +ffffffff817a3ea0 T ixgbe_identify_sfp_module_X550em +ffffffff817a3f20 T ixgbe_init_mac_link_ops_X550em +ffffffff817a4060 T ixgbe_restart_an_internal_phy_x550em +ffffffff817a4170 T ixgbe_setup_sgmii +ffffffff817a4410 T ixgbe_setup_sgmii_fw +ffffffff817a46f0 T ixgbe_setup_mac_link_sfp_x550a +ffffffff817a48e0 T ixgbe_setup_mac_link_sfp_x550em +ffffffff817a49a0 T ixgbe_setup_mac_link_t_X550em +ffffffff817a4a50 T ixgbe_check_link_t_X550em +ffffffff817a4b30 T ixgbe_get_lasi_ext_t_x550em +ffffffff817a4cb0 T ixgbe_enable_lasi_ext_t_x550em +ffffffff817a4e40 T ixgbe_setup_kr_speed_x550em +ffffffff817a5050 T ixgbe_reset_phy_fw +ffffffff817a5120 T ixgbe_check_overtemp_fw +ffffffff817a51b0 T ixgbe_read_phy_reg_x550a +ffffffff817a5250 T ixgbe_write_phy_reg_x550a +ffffffff817a5300 T ixgbe_setup_kr_x550em +ffffffff817a5370 T ixgbe_setup_internal_phy_t_x550em +ffffffff817a5500 T ixgbe_enter_lplu_t_x550em +ffffffff817a57f0 T ixgbe_handle_lasi_ext_t_x550em +ffffffff817a5870 T ixgbe_reset_phy_t_X550em +ffffffff817a58c0 T ixgbe_set_mdio_speed +ffffffff817a59a0 T ixgbe_init_ext_t_x550em +ffffffff817a5a50 T ixgbe_setup_sfi_x550a +ffffffff817a5c00 T ixgbe_setup_ixfi_x550em_x +ffffffff817a5de0 T ixgbe_setup_ixfi_x550em +ffffffff817a5fc0 T ixgbe_ext_phy_t_x550em_get_link +ffffffff817a6050 T ixgbe_setup_phy_loopback_x550em +ffffffff817a6240 T ixgbe_read_ee_hostif_buffer_X550 +ffffffff817a63d0 T ixgbe_write_ee_hostif_data_X550 +ffffffff817a6440 T ixgbe_checksum_ptr_x550 +ffffffff817a65d0 T ixgbe_calc_checksum_X550 +ffffffff817a6760 T ixgbe_update_flash_X550 +ffffffff817a67b0 T ixgbe_get_lcd_t_x550em +ffffffff817a6870 T ixgbe_set_mux +ffffffff817a7000 T ixgbe_read_i2c_combined_generic_int +ffffffff817a7260 T ixgbe_i2c_start +ffffffff817a73c0 T ixgbe_clock_in_i2c_byte +ffffffff817a74b0 T ixgbe_clock_out_i2c_bit +ffffffff817a75c0 T ixgbe_i2c_stop +ffffffff817a7750 T ixgbe_i2c_bus_clear +ffffffff817a7870 T ixgbe_read_i2c_combined_generic +ffffffff817a7890 T ixgbe_read_i2c_combined_generic_unlocked +ffffffff817a78b0 T ixgbe_write_i2c_combined_generic_int +ffffffff817a7a90 T ixgbe_write_i2c_combined_generic +ffffffff817a7ab0 T ixgbe_write_i2c_combined_generic_unlocked +ffffffff817a7ad0 T ixgbe_init_phy_ops_generic +ffffffff817a7c00 T ixgbe_identify_phy_generic +ffffffff817a80d0 T ixgbe_reset_phy_generic +ffffffff817a8260 T ixgbe_read_phy_reg_generic +ffffffff817a8300 T ixgbe_write_phy_reg_generic +ffffffff817a83a0 T ixgbe_read_phy_reg_mdi +ffffffff817a8520 T ixgbe_write_phy_reg_mdi +ffffffff817a8690 T ixgbe_setup_phy_link_generic +ffffffff817a8940 T ixgbe_setup_phy_link_speed_generic +ffffffff817a8990 T ixgbe_get_phy_firmware_version_generic +ffffffff817a89c0 T ixgbe_read_i2c_byte_generic +ffffffff817a89e0 T ixgbe_write_i2c_byte_generic +ffffffff817a8a00 T ixgbe_read_i2c_eeprom_generic +ffffffff817a8a30 T ixgbe_write_i2c_eeprom_generic +ffffffff817a8a50 T ixgbe_identify_module_generic +ffffffff817a8ac0 T ixgbe_read_i2c_byte_generic_unlocked +ffffffff817a8ae0 T ixgbe_write_i2c_byte_generic_unlocked +ffffffff817a8b00 T ixgbe_tn_check_overtemp +ffffffff817a8b70 T ixgbe_check_reset_blocked +ffffffff817a8bd0 T ixgbe_validate_phy_addr +ffffffff817a8c40 T ixgbe_get_phy_id +ffffffff817a8cf0 T ixgbe_get_phy_type_from_id +ffffffff817a8db0 T ixgbe_get_copper_link_capabilities_generic +ffffffff817a8ea0 T ixgbe_get_copper_speeds_supported +ffffffff817a8f60 T ixgbe_check_phy_link_tnx +ffffffff817a9220 T ixgbe_setup_phy_link_tnx +ffffffff817a94d0 T ixgbe_get_phy_firmware_version_tnx +ffffffff817a9500 T ixgbe_reset_phy_nl +ffffffff817a97a0 T ixgbe_get_sfp_init_sequence_offsets +ffffffff817a9980 T ixgbe_is_sfp +ffffffff817a99d0 T ixgbe_identify_sfp_module_generic +ffffffff817a9dc0 T ixgbe_identify_qsfp_module_generic +ffffffff817aa0b0 T ixgbe_get_supported_phy_sfp_layer_generic +ffffffff817aa250 T ixgbe_is_sfp_probe +ffffffff817aa2a0 T ixgbe_read_i2c_byte_generic_int +ffffffff817aa4a0 T ixgbe_clock_out_i2c_byte +ffffffff817aa600 T ixgbe_get_i2c_ack +ffffffff817aa800 T ixgbe_write_i2c_byte_generic_int +ffffffff817aa930 T ixgbe_set_i2c_data +ffffffff817aaae0 T ixgbe_raise_i2c_clk +ffffffff817aac00 T ixgbe_lower_i2c_clk +ffffffff817aac90 T ixgbe_clock_in_i2c_bit +ffffffff817aae60 T ixgbe_get_i2c_data +ffffffff817aaf10 T ixgbe_set_copper_phy_power +ffffffff817ab000 t ixl_match +ffffffff817ab0a0 t ixl_attach +ffffffff817adc40 t ixl_710_rd_ctl +ffffffff817addd0 t ixl_710_wr_ctl +ffffffff817adf80 t ixl_710_set_rss_key +ffffffff817ae100 t ixl_710_set_rss_lut +ffffffff817ae180 t ixl_wakeup +ffffffff817ae1a0 t ixl_722_rd_ctl +ffffffff817ae1d0 t ixl_722_wr_ctl +ffffffff817ae200 t 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ixl_kstat_read +ffffffff817b4000 T xge_match +ffffffff817b4030 T xge_attach +ffffffff817b4da0 T xge_setup_xgxs_xena +ffffffff817b4e30 T xge_setup_xgxs_herc +ffffffff817b4ec0 T xge_alloc_txmem +ffffffff817b50d0 T xge_alloc_rxmem +ffffffff817b53b0 T xge_add_rxbuf +ffffffff817b55a0 T xge_xgmii_mediachange +ffffffff817b55d0 T xge_ifmedia_status +ffffffff817b5650 T xge_ioctl +ffffffff817b58e0 T xge_start +ffffffff817b5c50 T xge_intr +ffffffff817b6210 T xge_enable +ffffffff817b62c0 T xge_init +ffffffff817b6750 T xge_stop +ffffffff817b6820 T xge_setpromisc +ffffffff817b68a0 T xge_setmulti +ffffffff817b7000 T thtc_match +ffffffff817b7060 T thtc_attach +ffffffff817b7280 T tht_match +ffffffff817b72b0 T tht_attach +ffffffff817b74d0 T thtc_lookup +ffffffff817b7550 T tht_intr +ffffffff817b7720 T thtc_print +ffffffff817b7790 T tht_sw_reset +ffffffff817b7c80 T tht_lladdr_read +ffffffff817b7d30 T tht_ioctl +ffffffff817b7ec0 T tht_start +ffffffff817b8490 T tht_watchdog +ffffffff817b84c0 T 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oce_get_fw_config +ffffffff817c2ff0 T oce_check_native_mode +ffffffff817c3150 T oce_macaddr_get +ffffffff817c32a0 T oce_intr +ffffffff817c34a0 T oce_init_stats +ffffffff817c3510 T oce_init_queues +ffffffff817c3690 T oce_attach_ifp +ffffffff817c3780 T oce_tick +ffffffff817c37d0 T oce_refill_rx +ffffffff817c3860 T oce_attachhook +ffffffff817c3a00 T oce_dma_free +ffffffff817c3ab0 T oce_get_link_status +ffffffff817c3c30 T oce_first_mcc +ffffffff817c3d20 T oce_media_change +ffffffff817c3d50 T oce_media_status +ffffffff817c3e80 T oce_ioctl +ffffffff817c4020 T oce_start +ffffffff817c4120 T oce_watchdog +ffffffff817c4180 T oce_init +ffffffff817c4660 T oce_stop +ffffffff817c49a0 T oce_rxrinfo +ffffffff817c4ae0 T oce_iff +ffffffff817c4c20 T oce_update_mcast +ffffffff817c4d90 T oce_set_promisc +ffffffff817c4e30 T oce_link_status +ffffffff817c4ed0 T oce_update_stats +ffffffff817c4fb0 T oce_macaddr_set +ffffffff817c5210 T oce_config_vlan +ffffffff817c5430 T oce_set_flow_control +ffffffff817c5650 T oce_new_rq +ffffffff817c59c0 T oce_alloc_rx_bufs +ffffffff817c5b10 T oce_drain_eq +ffffffff817c5c30 T oce_cmd +ffffffff817c5e80 T oce_drain_rq +ffffffff817c5fa0 T oce_free_posted_rxbuf +ffffffff817c6080 T oce_drain_wq +ffffffff817c61a0 T oce_encap +ffffffff817c6580 T oce_intr_wq +ffffffff817c6720 T oce_txeof +ffffffff817c6820 T oce_intr_rq +ffffffff817c6a00 T oce_rxeoc +ffffffff817c6b40 T oce_rxeof +ffffffff817c6e40 T oce_port_valid +ffffffff817c6e90 T oce_vtp_valid +ffffffff817c6ef0 T oce_get_buf +ffffffff817c70a0 T oce_intr_mq +ffffffff817c72d0 T oce_link_event +ffffffff817c7380 T oce_create_iface +ffffffff817c7540 T oce_create_eq +ffffffff817c76b0 T oce_create_wq +ffffffff817c7970 T oce_create_rq +ffffffff817c7c20 T oce_create_mq +ffffffff817c7df0 T oce_release_queues +ffffffff817c7f10 T oce_destroy_rq +ffffffff817c8170 T oce_destroy_wq +ffffffff817c83d0 T oce_destroy_mq +ffffffff817c8590 T oce_destroy_eq +ffffffff817c8740 T oce_create_ring +ffffffff817c8930 T oce_create_cq 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ehci_pci_match +ffffffff817e0040 T ehci_pci_attach +ffffffff817e0460 T ehci_pci_detach +ffffffff817e0500 T ehci_pci_activate +ffffffff817e0580 T ehci_sb700_match +ffffffff817e05d0 T ehci_pci_takecontroller +ffffffff817e1000 T xhci_pci_match +ffffffff817e1040 T xhci_pci_attach +ffffffff817e13a0 T xhci_pci_detach +ffffffff817e1440 T xhci_pci_activate +ffffffff817e1520 T xhci_pci_takecontroller +ffffffff817e2000 T pcicbbmatch +ffffffff817e2040 T pccbbattach +ffffffff817e2390 T pccbbactivate +ffffffff817e27e0 T cb_chipset +ffffffff817e2a60 T pccbb_shutdown +ffffffff817e2b60 T pccbb_power +ffffffff817e2d00 T pccbbintr +ffffffff817e2ed0 T pccbb_legacy_disable +ffffffff817e2f30 T pci113x_insert +ffffffff817e2ff0 T pccbb_pci_callback +ffffffff817e3320 T pccbb_chipinit +ffffffff817e3790 T pccbb_pcmcia_attach_setup +ffffffff817e38f0 T cbbprint +ffffffff817e3920 T pccbb_pcmcia_read +ffffffff817e3950 T pccbb_pcmcia_write +ffffffff817e3980 T pccbb_checksockstat +ffffffff817e3a50 T pccbbintr_function +ffffffff817e3b10 T pccbb_ctrl +ffffffff817e3c50 T pccbb_detect_card +ffffffff817e3cc0 T cb_detect_voltage +ffffffff817e3d10 T cb_reset +ffffffff817e3e60 T pccbb_cardenable +ffffffff817e3f20 T pccbb_cb_intr_establish +ffffffff817e3f40 T pccbb_intr_establish +ffffffff817e4090 T pccbb_cb_intr_disestablish +ffffffff817e40a0 T pccbb_intr_disestablish +ffffffff817e41e0 T pccbb_pcmcia_io_alloc +ffffffff817e42e0 T pccbb_pcmcia_io_free +ffffffff817e4310 T pccbb_pcmcia_io_map +ffffffff817e43d0 T pccbb_pcmcia_do_io_map +ffffffff817e4530 T pccbb_pcmcia_io_unmap +ffffffff817e45d0 T pccbb_pcmcia_wait_ready +ffffffff817e4680 T pccbb_pcmcia_socket_enable +ffffffff817e4a10 T pccbb_pcmcia_do_mem_map +ffffffff817e4b90 T pccbb_pcmcia_socket_disable +ffffffff817e4cb0 T pccbb_pcmcia_card_detect +ffffffff817e4d10 T pccbb_pcmcia_mem_alloc +ffffffff817e4de0 T pccbb_pcmcia_mem_free +ffffffff817e4e10 T pccbb_pcmcia_mem_map +ffffffff817e4f40 T pccbb_pcmcia_mem_unmap +ffffffff817e4fd0 T pccbb_pcmcia_intr_establish +ffffffff817e4ff0 T pccbb_pcmcia_intr_disestablish +ffffffff817e5010 T pccbb_pcmcia_intr_string +ffffffff817e5050 T pccbb_rbus_cb_space_alloc +ffffffff817e5170 T pccbb_open_win +ffffffff817e52f0 T pccbb_rbus_cb_space_free +ffffffff817e5400 T pccbb_close_win +ffffffff817e54c0 T pccbb_winlist_insert +ffffffff817e55c0 T pccbb_winset +ffffffff817e58a0 T pccbb_winlist_delete +ffffffff817e6000 T sk_xmac_miibus_readreg +ffffffff817e6180 T sk_xmac_miibus_writereg +ffffffff817e62e0 T sk_xmac_miibus_statchg +ffffffff817e63a0 T sk_marv_miibus_readreg +ffffffff817e64d0 T sk_marv_miibus_writereg +ffffffff817e65f0 T sk_marv_miibus_statchg +ffffffff817e6620 T sk_setfilt +ffffffff817e66f0 T sk_iff +ffffffff817e6720 T sk_iff_xmac +ffffffff817e6960 T sk_iff_yukon +ffffffff817e6b60 T sk_init_rx_ring +ffffffff817e6ca0 T sk_fill_rx_ring +ffffffff817e6d20 T sk_newbuf +ffffffff817e6e80 T sk_init_tx_ring +ffffffff817e7080 T sk_ifmedia_upd +ffffffff817e70d0 T sk_ifmedia_sts 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iwm_init_channel_map +ffffffff81823f10 T iwm_mimo_enabled +ffffffff81823f50 T iwm_setup_ht_rates +ffffffff81824000 T iwm_setup_vht_rates +ffffffff81824090 T iwm_init_reorder_buffer +ffffffff818240f0 T iwm_clear_reorder_buffer +ffffffff818241b0 T iwm_rx_ba_session_expired +ffffffff818242b0 T iwm_reorder_timer_expired +ffffffff81824470 T iwm_release_frames +ffffffff81824660 T iwm_sta_rx_agg +ffffffff81824b60 T iwm_send_cmd_pdu_status +ffffffff81824bf0 T iwm_mac_ctxt_task +ffffffff81824d50 T iwm_mac_ctxt_cmd +ffffffff81824f50 T iwm_updateprot +ffffffff81825010 T iwm_add_task +ffffffff81825080 T iwm_updateslot +ffffffff81825140 T iwm_updateedca +ffffffff81825200 T iwm_phy_ctxt_task +ffffffff818253d0 T iwm_phy_ctxt_update +ffffffff81825540 T iwm_setrates +ffffffff818256d0 T iwm_updatechan +ffffffff81825790 T iwm_updatedtim +ffffffff81825850 T iwm_sta_tx_agg +ffffffff81825d60 T iwm_flush_sta +ffffffff81825f00 T iwm_txq_advance +ffffffff818260f0 T iwm_clear_oactive +ffffffff81826170 T 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iwm_power_mac_update_mode +ffffffff8182d6a0 T iwm_power_update_device +ffffffff8182d740 T iwm_enable_beacon_filter +ffffffff8182d830 T iwm_disable_beacon_filter +ffffffff8182d910 T iwm_add_sta_cmd +ffffffff8182dd10 T iwm_add_aux_sta +ffffffff8182deb0 T iwm_drain_sta +ffffffff8182e060 T iwm_rm_sta_cmd +ffffffff8182e120 T iwm_scan_rx_chain +ffffffff8182e190 T iwm_scan_rate_n_flags +ffffffff8182e290 T iwm_lmac_scan_fill_channels +ffffffff8182e370 T iwm_umac_scan_fill_channels +ffffffff8182e460 T iwm_fill_probe_req_v1 +ffffffff8182e500 T iwm_fill_probe_req +ffffffff8182e740 T iwm_lmac_scan +ffffffff8182ec40 T iwm_config_umac_scan +ffffffff8182ee50 T iwm_umac_scan_size +ffffffff8182eec0 T iwm_get_scan_req_umac_chan_param +ffffffff8182ef10 T iwm_get_scan_req_umac_data +ffffffff8182ef60 T iwm_umac_scan +ffffffff8182f3d0 T iwm_mcc_update +ffffffff8182f460 T iwm_ridx2rate +ffffffff8182f4d0 T iwm_ack_rates +ffffffff8182f790 T iwm_mac_ctxt_cmd_common +ffffffff8182faa0 T iwm_mac_ctxt_cmd_fill_sta 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iwm_fill_sf_command +ffffffff81833a80 T iwm_send_soc_conf +ffffffff81833bc0 T iwm_send_update_mcc_cmd +ffffffff81833d80 T iwm_send_temp_report_ths_cmd +ffffffff81833e50 T iwm_tt_tx_backoff +ffffffff81833ee0 T iwm_fill_paging_mem +ffffffff81834110 T iwm_alloc_fw_paging_mem +ffffffff818342b0 T iwm_init_hw +ffffffff81834c80 T iwm_preinit +ffffffff81834ea0 T iwm_start +ffffffff81835070 T iwm_watchdog +ffffffff81835210 T iwm_nic_error +ffffffff81835700 T iwm_dump_driver_status +ffffffff818357a0 T iwm_ioctl +ffffffff81835910 T iwm_nic_umac_error +ffffffff81835d50 T iwm_desc_lookup +ffffffff81835ee0 T iwm_rx_pkt_valid +ffffffff81835f30 T iwm_rx_pkt +ffffffff81836cd0 T iwm_notif_intr +ffffffff81836e30 T iwm_intr +ffffffff81837260 T iwm_intr_msix +ffffffff81837500 T iwm_match +ffffffff81837530 T iwm_attach_hook +ffffffff81837570 T iwm_attach +ffffffff81838640 T iwm_radiotap_attach +ffffffff818386d0 T iwm_init_task +ffffffff81838790 T iwm_resume +ffffffff818388c0 T iwm_wakeup +ffffffff81838970 T iwm_activate +ffffffff81839000 T iwx_lookup_cmd_ver +ffffffff81839070 T iwx_lookup_notif_ver +ffffffff818390e0 T iwx_is_mimo_ht_plcp +ffffffff81839120 T iwx_store_cscheme +ffffffff81839170 T iwx_ctxt_info_alloc_dma +ffffffff81839210 T iwx_dma_contig_alloc +ffffffff818393f0 T iwx_ctxt_info_free_paging +ffffffff81839550 T iwx_dma_contig_free +ffffffff81839610 T iwx_get_num_sections +ffffffff81839690 T iwx_init_fw_sec +ffffffff81839b40 T iwx_fw_version_str +ffffffff81839b80 T iwx_alloc_fw_monitor_block +ffffffff81839c30 T iwx_alloc_fw_monitor +ffffffff81839cf0 T iwx_apply_debug_destination +ffffffff8183a230 T iwx_nic_lock +ffffffff8183a380 T iwx_write_prph +ffffffff8183a420 T iwx_set_bits_prph +ffffffff8183a440 T iwx_clear_bits_prph +ffffffff8183a460 T iwx_read_prph +ffffffff8183a500 T iwx_nic_unlock +ffffffff8183a5b0 T iwx_set_ltr +ffffffff8183a700 T iwx_ctxt_info_init +ffffffff8183a9c0 T iwx_ctxt_info_free_fw_img +ffffffff8183ab40 T iwx_ctxt_info_gen3_init +ffffffff8183b130 T iwx_write_umac_prph +ffffffff8183b1e0 T iwx_firmware_store_section +ffffffff8183b280 T iwx_set_default_calib +ffffffff8183b2d0 T iwx_fw_info_free +ffffffff8183b360 T iwx_read_firmware +ffffffff8183bef0 T iwx_prph_addr_mask +ffffffff8183bf30 T iwx_read_prph_unlocked +ffffffff8183bfb0 T iwx_nic_assert_locked +ffffffff8183c010 T iwx_write_prph_unlocked +ffffffff8183c090 T iwx_write_prph64 +ffffffff8183c1c0 T iwx_read_umac_prph_unlocked +ffffffff8183c240 T iwx_read_umac_prph +ffffffff8183c2e0 T iwx_write_umac_prph_unlocked +ffffffff8183c360 T iwx_read_mem +ffffffff8183c490 T iwx_write_mem +ffffffff8183c5d0 T iwx_write_mem32 +ffffffff8183c6e0 T iwx_poll_bit +ffffffff8183c7b0 T iwx_set_bits_mask_prph +ffffffff8183c990 T iwx_alloc_rx_ring +ffffffff8183cb70 T iwx_rx_addbuf +ffffffff8183cd80 T iwx_free_rx_ring +ffffffff8183d030 T iwx_disable_rx_dma +ffffffff8183d290 T iwx_reset_rx_ring +ffffffff8183d330 T iwx_alloc_tx_ring +ffffffff8183d540 T iwx_free_tx_ring +ffffffff8183d7d0 T iwx_reset_tx_ring +ffffffff8183da30 T iwx_enable_rfkill_int +ffffffff8183db10 T iwx_check_rfkill +ffffffff8183db90 T iwx_enable_interrupts +ffffffff8183dc40 T iwx_enable_fwload_interrupt +ffffffff8183dd20 T iwx_restore_interrupts +ffffffff8183dd50 T iwx_disable_interrupts +ffffffff8183de10 T iwx_ict_reset +ffffffff8183dfd0 T iwx_set_hw_ready +ffffffff8183e1b0 T iwx_prepare_card_hw +ffffffff8183e2f0 T iwx_force_power_gating +ffffffff8183e3a0 T iwx_apm_config +ffffffff8183e470 T iwx_apm_init +ffffffff8183e6d0 T iwx_apm_stop +ffffffff8183ea90 T iwx_init_msix_hw +ffffffff8183eb30 T iwx_conf_msix_hw +ffffffff8183f0d0 T iwx_clear_persistence_bit +ffffffff8183f250 T iwx_start_hw +ffffffff8183f650 T iwx_stop_device +ffffffff8183fbc0 T iwx_nic_config +ffffffff8183fc50 T iwx_nic_rx_init +ffffffff8183fcb0 T iwx_nic_init +ffffffff8183fdd0 T iwx_enable_txq +ffffffff818400a0 T iwx_send_cmd +ffffffff81840680 T iwx_free_resp +ffffffff81840700 T iwx_disable_txq +ffffffff81840960 T iwx_post_alive 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iwx_dump_driver_status +ffffffff8184fcb0 T iwx_ioctl +ffffffff8184fe20 T iwx_nic_umac_error +ffffffff81850260 T iwx_desc_lookup +ffffffff818503f0 T iwx_rx_pkt_valid +ffffffff81850440 T iwx_rx_pkt +ffffffff81851450 T iwx_notif_intr +ffffffff818515a0 T iwx_intr +ffffffff81851a40 T iwx_intr_msix +ffffffff81851d50 T iwx_match +ffffffff81851d80 T iwx_attach_hook +ffffffff81851dc0 T iwx_find_device_cfg +ffffffff81851f60 T iwx_attach +ffffffff81852f00 T iwx_radiotap_attach +ffffffff81852f90 T iwx_init_task +ffffffff81853050 T iwx_resume +ffffffff81853180 T iwx_wakeup +ffffffff81853250 T iwx_activate +ffffffff81854000 T cmpci_match +ffffffff81854030 T cmpci_attach +ffffffff81854500 T cmpci_activate +ffffffff81854580 T cmpci_open +ffffffff818545b0 T cmpci_close +ffffffff818545e0 T cmpci_set_params +ffffffff81855040 T cmpci_round_blocksize +ffffffff81855070 T cmpci_halt_output +ffffffff81855220 T cmpci_halt_input +ffffffff818553a0 T cmpci_set_port +ffffffff81855500 T cmpci_get_port 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jme_txeof +ffffffff81881290 T jme_init_tx_ring +ffffffff81881350 T jme_init_ssb +ffffffff818813b0 T jme_mac_config +ffffffff818817c0 T jme_mediastatus +ffffffff81881820 T jme_mediachange +ffffffff81881880 T jme_eeprom_read_byte +ffffffff818819e0 T jme_eeprom_macaddr +ffffffff81881b20 T jme_reg_macaddr +ffffffff81881bc0 T jme_map_intr_vector +ffffffff81881c60 T jme_intr +ffffffff81881e10 T jme_reset +ffffffff81881e80 T jme_dma_alloc +ffffffff81882450 T jme_ioctl +ffffffff818825a0 T jme_start +ffffffff818826f0 T jme_watchdog +ffffffff81882790 T jme_tick +ffffffff818827f0 T jme_detach +ffffffff818828b0 T jme_stop +ffffffff81882b90 T jme_dma_free +ffffffff81882cc0 T jme_encap +ffffffff81882f50 T jme_init +ffffffff818836c0 T jme_iff +ffffffff81883820 T jme_discard_rxbufs +ffffffff818838a0 T jme_rxpkt +ffffffff81883c10 T jme_newbuf +ffffffff81883d80 T jme_init_rx_ring +ffffffff81883ea0 T jme_set_vlan +ffffffff81884000 T age_match +ffffffff81884030 T age_attach +ffffffff81884490 T age_intr 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age_init_tx_ring +ffffffff81888770 T age_init_cmb_block +ffffffff818887c0 T age_init_smb_block +ffffffff81888810 T age_rxvlan +ffffffff81889000 T alc_match +ffffffff81889030 T alc_attach +ffffffff81889880 T alc_detach +ffffffff81889950 T alc_activate +ffffffff818899d0 T alc_miibus_readreg +ffffffff81889b90 T alc_mii_readreg_816x +ffffffff81889c90 T alc_mii_readreg_813x +ffffffff81889da0 T alc_miibus_writereg +ffffffff81889f70 T alc_mii_writereg_816x +ffffffff8188a080 T alc_mii_writereg_813x +ffffffff8188a180 T alc_miibus_statchg +ffffffff8188a530 T alc_stop_mac +ffffffff8188a620 T alc_start_queue +ffffffff8188a6d0 T alc_mac_config +ffffffff8188a7a0 T alc_aspm +ffffffff8188a870 T alc_dsp_fixup +ffffffff8188ae90 T alc_miidbg_readreg +ffffffff8188aed0 T alc_miidbg_writereg +ffffffff8188af20 T alc_miiext_readreg +ffffffff8188b050 T alc_miiext_writereg +ffffffff8188b190 T alc_mediastatus +ffffffff8188b200 T alc_mediachange +ffffffff8188b260 T alc_get_macaddr +ffffffff8188b280 T alc_get_macaddr_816x +ffffffff8188b510 T alc_get_macaddr_813x +ffffffff8188b9c0 T alc_get_macaddr_par +ffffffff8188ba70 T alc_disable_l0s_l1 +ffffffff8188bb00 T alc_phy_reset +ffffffff8188bb20 T alc_phy_reset_816x +ffffffff8188c3b0 T alc_phy_reset_813x +ffffffff8188c7a0 T alc_phy_down +ffffffff8188c8d0 T alc_aspm_816x +ffffffff8188c980 T alc_aspm_813x +ffffffff8188cb70 T alc_init_pcie +ffffffff8188cf00 T alc_config_msi +ffffffff8188cfd0 T alc_intr +ffffffff8188d1b0 T alc_reset +ffffffff8188d580 T alc_dma_alloc +ffffffff8188dcf0 T alc_ioctl +ffffffff8188de40 T alc_start +ffffffff8188dfe0 T alc_watchdog +ffffffff8188e060 T alc_tick +ffffffff8188e0c0 T alc_dma_free +ffffffff8188e380 T alc_stop +ffffffff8188e6d0 T alc_init +ffffffff8188f5f0 T alc_encap +ffffffff8188f820 T alc_txeof +ffffffff8188fa10 T alc_iff +ffffffff8188fb70 T alc_stats_clear +ffffffff8188fcb0 T alc_stats_update +ffffffff81890110 T alc_rxintr +ffffffff81890330 T alc_newbuf +ffffffff818904b0 T alc_rxeof +ffffffff81890740 T alc_osc_reset +ffffffff818908d0 T alc_init_rx_ring +ffffffff818909d0 T alc_init_rr_ring +ffffffff81890a50 T alc_init_tx_ring +ffffffff81890b00 T alc_init_cmb +ffffffff81890b40 T alc_init_smb +ffffffff81890b90 T alc_rxvlan +ffffffff81890c00 T alc_stop_queue +ffffffff81891000 T ale_match +ffffffff81891030 T ale_attach +ffffffff81891580 T ale_activate +ffffffff81891600 T ale_miibus_readreg +ffffffff81891720 T ale_miibus_writereg +ffffffff81891830 T ale_miibus_statchg +ffffffff81891a50 T ale_stop_mac +ffffffff81891b40 T ale_mac_config +ffffffff81891be0 T ale_mediastatus +ffffffff81891c50 T ale_mediachange +ffffffff81891cb0 T ale_get_macaddr +ffffffff81891e90 T ale_phy_reset +ffffffff818924d0 T ale_intr +ffffffff81892620 T ale_reset +ffffffff81892790 T ale_dma_alloc +ffffffff81892f00 T ale_ioctl +ffffffff81893050 T ale_start +ffffffff818931c0 T ale_watchdog +ffffffff81893240 T ale_tick +ffffffff818932a0 T ale_dma_free +ffffffff81893560 T ale_detach +ffffffff81893620 T ale_stop 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bce_mii_read +ffffffff81898950 T bce_mii_write +ffffffff81898a80 T bce_statchg +ffffffff81898e10 T bce_mediachange +ffffffff81898e60 T bce_mediastatus +ffffffff81898ec0 T bce_tick +ffffffff81898f10 T bce_stop +ffffffff81899030 T bce_init +ffffffff81899440 T bce_iff +ffffffff81899540 T bce_rxintr +ffffffff818996d0 T bce_txintr +ffffffff818997c0 T bce_add_rxbuf +ffffffff81899880 T bce_add_mac +ffffffff8189a000 T ath_pci_match +ffffffff8189a060 T ath_pci_attach +ffffffff8189a290 T ath_pci_detach +ffffffff8189b000 T athn_pci_match +ffffffff8189b030 T athn_pci_attach +ffffffff8189b2b0 T athn_pci_detach +ffffffff8189b330 T athn_pci_activate +ffffffff8189b3e0 T athn_pci_read +ffffffff8189b410 T athn_pci_write +ffffffff8189b440 T athn_pci_write_barrier +ffffffff8189b470 T athn_pci_disable_aspm +ffffffff8189b4e0 T athn_pci_wakeup +ffffffff8189c000 T atw_pci_match +ffffffff8189c030 T atw_pci_attach +ffffffff8189c2a0 T atw_pci_detach +ffffffff8189c320 t atw_pci_enable +ffffffff8189c3c0 t atw_pci_disable +ffffffff8189d000 T rtw_pci_match +ffffffff8189d030 T rtw_pci_attach +ffffffff8189d250 T rtw_pci_detach +ffffffff8189d2d0 T rtw_pci_enable +ffffffff8189d370 T rtw_pci_disable +ffffffff8189e000 T rtwn_pci_match +ffffffff8189e030 T rtwn_pci_attach +ffffffff8189e590 T rtwn_pci_detach +ffffffff8189e6a0 T rtwn_pci_activate +ffffffff8189e6c0 T rtwn_calib_to +ffffffff8189e720 T rtwn_scan_to +ffffffff8189e740 T rtwn_intr +ffffffff8189ea20 T rtwn_alloc_rx_list +ffffffff8189ed40 T rtwn_alloc_tx_list +ffffffff8189ef80 T rtwn_free_rx_list +ffffffff8189f0d0 T rtwn_pci_write_1 +ffffffff8189f100 T rtwn_pci_write_2 +ffffffff8189f130 T rtwn_pci_write_4 +ffffffff8189f160 T rtwn_pci_read_1 +ffffffff8189f190 T rtwn_pci_read_2 +ffffffff8189f1c0 T rtwn_pci_read_4 +ffffffff8189f1f0 T rtwn_tx +ffffffff8189f7c0 T rtwn_power_on +ffffffff8189f7f0 T rtwn_dma_init +ffffffff8189fba0 T rtwn_pci_load_firmware +ffffffff8189fc50 T rtwn_fw_loadpage +ffffffff8189fd90 T rtwn_mac_init +ffffffff8189ff10 T rtwn_bb_init +ffffffff818a03b0 T rtwn_alloc_buffers +ffffffff818a03e0 T rtwn_pci_init +ffffffff818a04b0 T rtwn_pci_stop +ffffffff818a0600 T rtwn_is_oactive +ffffffff818a0640 T rtwn_next_calib +ffffffff818a0660 T rtwn_cancel_calib +ffffffff818a06a0 T rtwn_pci_next_scan +ffffffff818a06c0 T rtwn_cancel_scan +ffffffff818a0700 T rtwn_wait_async +ffffffff818a0730 T rtwn_free_tx_list +ffffffff818a08a0 T rtwn_setup_rx_desc +ffffffff818a0910 T rtwn_reset_rx_list +ffffffff818a09b0 T rtwn_reset_tx_list +ffffffff818a0b00 T rtwn_rx_frame +ffffffff818a0f60 T rtwn_tx_done +ffffffff818a10f0 T rtwn_poll_c2h_events +ffffffff818a12b0 T rtwn_pci_92c_stop +ffffffff818a1490 T rtwn_pci_88e_stop +ffffffff818a1870 T rtwn_pci_23a_stop +ffffffff818a1c10 T rtwn_88e_intr +ffffffff818a1f60 T rtwn_llt_write +ffffffff818a2020 T rtwn_llt_init +ffffffff818a22f0 T rtwn_92c_power_on +ffffffff818a2770 T rtwn_88e_power_on +ffffffff818a2b70 T rtwn_23a_power_on +ffffffff818a2fe0 T rtwn_tx_report +ffffffff818a4000 T ral_pci_match +ffffffff818a4030 T ral_pci_attach +ffffffff818a4210 T ral_pci_detach +ffffffff818a42b0 T ral_pci_activate +ffffffff818a4340 T ral_pci_wakeup +ffffffff818a5000 T acx_pci_match +ffffffff818a5030 T acx_pci_attach +ffffffff818a5260 T acx_pci_detach +ffffffff818a6000 T pgt_pci_match +ffffffff818a6030 T pgt_pci_attach +ffffffff818a6200 T pgt_pci_detach +ffffffff818a7000 T malo_pci_match +ffffffff818a7030 T malo_pci_attach +ffffffff818a71e0 T malo_pci_detach +ffffffff818a7230 T malo_pci_activate +ffffffff818a7290 T malo_pci_wakeup +ffffffff818a8000 T bwi_pci_match +ffffffff818a8070 T bwi_pci_attach +ffffffff818a8290 T bwi_pci_detach +ffffffff818a82e0 T bwi_pci_activate +ffffffff818a8350 T bwi_reset_bcm4331 +ffffffff818a8470 T bwi_pci_conf_write +ffffffff818a84a0 T bwi_pci_conf_read +ffffffff818a84d0 T bwi_pci_wakeup +ffffffff818a9000 T piixpm_match +ffffffff818a9030 T piixpm_attach +ffffffff818a94c0 T piixpm_intr +ffffffff818a95d0 T piixpm_i2c_acquire_bus +ffffffff818a96b0 T piixpm_i2c_release_bus +ffffffff818a9790 T piixpm_i2c_exec +ffffffff818aa000 T vic_match +ffffffff818aa0a0 T vic_attach +ffffffff818aa440 T vic_intr +ffffffff818aa4c0 T vic_query +ffffffff818aa720 T vic_alloc_data +ffffffff818aaa20 T vic_tick +ffffffff818aaa90 T vic_ioctl +ffffffff818aacc0 T vic_start +ffffffff818ab000 T vic_watchdog +ffffffff818ab030 T vic_media_change +ffffffff818ab060 T vic_media_status +ffffffff818ab120 T vic_read +ffffffff818ab140 T vic_read_cmd +ffffffff818ab190 T vic_getlladdr +ffffffff818ab240 T vic_alloc_dmamem +ffffffff818ab3b0 T vic_rx_fill +ffffffff818ab590 T vic_alloc_mbuf +ffffffff818ab650 T vic_init_data +ffffffff818aba00 T vic_uninit_data +ffffffff818abbd0 T vic_link_state +ffffffff818abc50 T vic_write +ffffffff818abca0 T vic_rx_proc +ffffffff818abf00 T vic_tx_proc +ffffffff818ac080 T vic_iff +ffffffff818ac1c0 T vic_setlladdr +ffffffff818ac220 T vic_load_txb +ffffffff818ac2d0 T vic_init +ffffffff818ac470 T vic_stop +ffffffff818ac5b0 T vic_rxrinfo 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vmxnet3_rxintr +ffffffff818af8d0 T vmxnet3_txintr +ffffffff818afa70 T vmxnet3_init +ffffffff818afe80 T vmxnet3_rx_csum +ffffffff818afee0 T vmxnet3_iff +ffffffff818b0020 T vmxnet3_stop +ffffffff818b0270 T vmxnet3_reset +ffffffff818b02b0 t vmx_kstat_create +ffffffff818b0490 t vmx_kstat_read +ffffffff818b1000 T vmwpvs_match +ffffffff818b1040 T vmwpvs_attach +ffffffff818b1df0 T vmwpvs_scsi_cmd +ffffffff818b2260 T vmwpvs_intx +ffffffff818b22e0 T vmwpvs_msg_task +ffffffff818b2560 T vmwpvs_intr +ffffffff818b2740 T vmwpvs_get_config +ffffffff818b2940 T vmwpvs_dmamem_zalloc +ffffffff818b29a0 T vmwpvs_dmamem_alloc +ffffffff818b2b20 T vmwpvs_ccb_put +ffffffff818b2b80 T vmwpvs_setup_rings +ffffffff818b2cb0 T vmwpvs_setup_msg_ring +ffffffff818b2da0 T vmwpvs_ccb_get +ffffffff818b2e20 T vmwpvs_dmamem_free +ffffffff818b2ea0 T vmwpvs_cmd +ffffffff818b2f50 T vmwpvs_scsi_cmd_done +ffffffff818b3130 T vmwpvs_scsi_cmd_poll +ffffffff818b4000 T lii_match +ffffffff818b4030 T lii_attach +ffffffff818b4440 T lii_activate +ffffffff818b4540 T lii_reset +ffffffff818b4810 T lii_spi_configure +ffffffff818b4900 T lii_eeprom_present +ffffffff818b4990 T lii_eeprom_read +ffffffff818b49c0 T lii_spi_read +ffffffff818b4c80 T lii_read_macaddr +ffffffff818b4df0 T lii_intr +ffffffff818b4f00 T lii_alloc_rings +ffffffff818b5110 T lii_tick +ffffffff818b5160 T lii_mii_readreg +ffffffff818b5400 T lii_mii_writereg +ffffffff818b56a0 T lii_mii_statchg +ffffffff818b5710 T lii_media_change +ffffffff818b5760 T lii_media_status +ffffffff818b57c0 T lii_ioctl +ffffffff818b5950 T lii_start +ffffffff818b5b00 T lii_watchdog +ffffffff818b5b40 T lii_stop +ffffffff818b5bb0 T lii_init +ffffffff818b60b0 T lii_iff +ffffffff818b61f0 T lii_tx_put +ffffffff818b6300 T lii_free_tx_space +ffffffff818b6340 T lii_rxintr +ffffffff818b64f0 T lii_txintr +ffffffff818b7000 T ichiic_match +ffffffff818b7030 T ichiic_attach +ffffffff818b7220 T ichiic_intr +ffffffff818b7330 T ichiic_i2c_acquire_bus +ffffffff818b7380 T ichiic_i2c_release_bus +ffffffff818b73d0 T ichiic_i2c_exec +ffffffff818b8000 T viapm_match +ffffffff818b8030 T viapm_attach +ffffffff818b8650 T viapm_intr +ffffffff818b8760 T viapm_i2c_acquire_bus +ffffffff818b87b0 T viapm_i2c_release_bus +ffffffff818b8800 T viapm_i2c_exec +ffffffff818b8b20 T viapm_refresh_sensor_data +ffffffff818b8e50 T viapm_refresh +ffffffff818b8e80 T val_to_uK +ffffffff818b8f20 T val_to_rpm +ffffffff818b8f60 T val_to_uV +ffffffff818b9000 T viapm_get_timecount +ffffffff818ba000 T amdiic_match +ffffffff818ba030 T amdiic_attach +ffffffff818ba200 T amdiic_intr +ffffffff818ba2d0 T amdiic_i2c_acquire_bus +ffffffff818ba320 T amdiic_i2c_release_bus +ffffffff818ba370 T amdiic_i2c_exec +ffffffff818ba5d0 T amdiic_read +ffffffff818ba740 T amdiic_wait +ffffffff818ba7e0 T amdiic_write +ffffffff818bb000 T nviic_match +ffffffff818bb030 T nviic_attach +ffffffff818bb280 T nviic_i2c_acquire_bus +ffffffff818bb2d0 T nviic_i2c_release_bus +ffffffff818bb310 T nviic_i2c_exec +ffffffff818bb530 T nviic_write +ffffffff818bb580 T nviic_read +ffffffff818bc000 T sdhc_pci_match +ffffffff818bc060 T sdhc_pci_attach +ffffffff818bc3a0 T sdhc_pci_activate +ffffffff818bc400 T sdhc_takecontroller +ffffffff818bc4a0 T sdhc_ricohfix +ffffffff818bc610 T sdhc_pci_conf_write +ffffffff818bd000 T kate_match +ffffffff818bd170 T kate_attach +ffffffff818bd420 T kate_refresh +ffffffff818be000 T km_match +ffffffff818be050 T km_attach +ffffffff818be0f0 T km_refresh +ffffffff818bf000 T ksmn_match +ffffffff818bf050 T ksmn_attach +ffffffff818bf230 T ksmn_ccd_attach +ffffffff818bf380 T ksmn_refresh +ffffffff818bf4d0 T ksmn_read_reg +ffffffff818c0000 T itherm_probe +ffffffff818c0030 T itherm_attach +ffffffff818c0380 T itherm_activate +ffffffff818c0400 T itherm_enable +ffffffff818c0460 T itherm_refresh +ffffffff818c0470 T itherm_refresh_sensor_data +ffffffff818c0860 T itherm_bias_temperature_sensor +ffffffff818c1000 T pchtemp_match +ffffffff818c1030 T pchtemp_attach +ffffffff818c1190 T pchtemp_refresh +ffffffff818c2000 T rtsx_pci_match +ffffffff818c2090 T rtsx_pci_attach +ffffffff818c3000 T xspd_match +ffffffff818c3030 T xspd_attach +ffffffff818c31f0 T xspd_intr +ffffffff818c4000 T virtio_pci_match +ffffffff818c4080 T virtio_pci_attach +ffffffff818c4430 T virtio_pci_detach +ffffffff818c4510 T virtio_pci_kick +ffffffff818c4570 T virtio_pci_read_device_config_1 +ffffffff818c45a0 T virtio_pci_read_device_config_2 +ffffffff818c45d0 T virtio_pci_read_device_config_4 +ffffffff818c4600 T virtio_pci_read_device_config_8 +ffffffff818c4680 T virtio_pci_write_device_config_1 +ffffffff818c46b0 T virtio_pci_write_device_config_2 +ffffffff818c46e0 T virtio_pci_write_device_config_4 +ffffffff818c4710 T virtio_pci_write_device_config_8 +ffffffff818c4780 T virtio_pci_read_queue_size +ffffffff818c47f0 T virtio_pci_setup_queue +ffffffff818c4ae0 T virtio_pci_set_status +ffffffff818c4b60 T virtio_pci_negotiate_features +ffffffff818c4ca0 T virtio_pci_poll_intr +ffffffff818c4d10 T virtio_pci_find_cap +ffffffff818c4ed0 T virtio_pci_attach_10 +ffffffff818c5310 T virtio_pci_attach_09 +ffffffff818c5450 T virtio_pci_adjust_config_region +ffffffff818c54f0 T virtio_pci_setup_msix +ffffffff818c5850 T virtio_pci_legacy_intr +ffffffff818c58f0 T virtio_pci_legacy_intr_mpsafe +ffffffff818c5980 T virtio_pci_free_irqs +ffffffff818c5bd0 T virtio_pci_negotiate_features_10 +ffffffff818c5e10 T virtio_pci_msix_establish +ffffffff818c5ee0 T virtio_pci_set_msix_queue_vector +ffffffff818c5f60 T virtio_pci_set_msix_config_vector +ffffffff818c5fa0 T virtio_pci_config_intr +ffffffff818c5fe0 T virtio_pci_shared_queue_intr +ffffffff818c5ff0 T virtio_pci_queue_intr +ffffffff818c7000 T dwiic_pci_match +ffffffff818c7030 T dwiic_pci_attach +ffffffff818c7350 T dwiic_pci_activate +ffffffff818c73c0 T dwiic_pci_bus_scan +ffffffff818c8000 T bwfm_pci_buscore_read +ffffffff818c8060 T bwfm_pci_buscore_write +ffffffff818c80d0 T bwfm_pci_buscore_prepare +ffffffff818c8100 T bwfm_pci_buscore_reset +ffffffff818c82f0 T bwfm_pci_buscore_activate +ffffffff818c8320 T bwfm_pci_preinit +ffffffff818c9440 T bwfm_pci_stop +ffffffff818c94d0 T bwfm_pci_txcheck +ffffffff818c9590 T bwfm_pci_txdata +ffffffff818c98f0 T bwfm_pci_msgbuf_query_dcmd +ffffffff818c9d30 T bwfm_pci_msgbuf_set_dcmd +ffffffff818c9d80 T bwfm_pci_match +ffffffff818c9db0 T bwfm_pci_attach +ffffffff818ca020 T bwfm_pci_detach +ffffffff818ca060 T bwfm_pci_activate +ffffffff818ca210 T bwfm_pci_intr +ffffffff818ca470 T bwfm_pci_select_core +ffffffff818ca550 T bwfm_pci_load_microcode +ffffffff818ca9d0 T bwfm_pci_dmamem_alloc +ffffffff818cab70 T bwfm_pci_setup_ring +ffffffff818cad80 T bwfm_pci_intr_enable +ffffffff818cadd0 T bwfm_pci_hostready +ffffffff818cae40 T bwfm_pci_fill_rx_rings +ffffffff818cae90 T bwfm_pci_dmamem_free +ffffffff818caf00 T bwfm_pci_cleanup +ffffffff818cb570 T bwfm_pci_send_mb_data +ffffffff818cb690 T bwfm_pci_intmask +ffffffff818cb6d0 T bwfm_pci_pktid_avail +ffffffff818cb740 T bwfm_pci_pktid_new +ffffffff818cb8a0 T bwfm_pci_pktid_free +ffffffff818cb950 T bwfm_pci_fill_rx_buf_ring +ffffffff818cbcb0 T bwfm_pci_fill_rx_ioctl_ring +ffffffff818cc030 T bwfm_pci_ring_write_reserve +ffffffff818cc120 T bwfm_pci_ring_write_cancel +ffffffff818cc160 T bwfm_pci_ring_write_commit +ffffffff818cc240 T bwfm_pci_ring_write_rptr +ffffffff818cc2c0 T bwfm_pci_ring_write_wptr +ffffffff818cc340 T bwfm_pci_setup_flowring +ffffffff818cc4a0 T bwfm_pci_ring_bell +ffffffff818cc4e0 T bwfm_pci_ring_update_rptr +ffffffff818cc590 T bwfm_pci_ring_update_wptr +ffffffff818cc640 T bwfm_pci_ring_write_reserve_multi +ffffffff818cc760 T bwfm_pci_ring_read_avail +ffffffff818cc860 T bwfm_pci_ring_read_commit +ffffffff818cc8f0 T bwfm_pci_ring_rx +ffffffff818ccb00 T bwfm_pci_msg_rx +ffffffff818cd0e0 T bwfm_pci_flowring_delete_cb +ffffffff818cd190 T bwfm_pci_msgbuf_rxioctl +ffffffff818cd280 T bwfm_pci_intr_status +ffffffff818cd2c0 T bwfm_pci_intr_ack +ffffffff818cd300 T bwfm_pci_flowring_lookup +ffffffff818cd470 T bwfm_pci_flowring_create +ffffffff818cd5a0 T bwfm_pci_flowring_create_cb +ffffffff818cd8f0 T bwfm_pci_flowring_delete +ffffffff818cdbc0 T bwfm_pci_msgbuf_h2d_mb_write +ffffffff818cdde0 T bwfm_pci_handle_mb_data +ffffffff818cdeb0 T bwfm_pci_intr_disable +ffffffff818ce000 T ccp_pci_match +ffffffff818ce030 T ccp_pci_attach +ffffffff818cf000 T bnxt_match +ffffffff818cf030 T bnxt_attach +ffffffff818d02a0 T bnxt_dmamem_alloc +ffffffff818d0430 T bnxt_dmamem_free +ffffffff818d04c0 T bnxt_hwrm_ver_get +ffffffff818d0610 T bnxt_hwrm_nvm_get_dev_info +ffffffff818d0760 T bnxt_hwrm_func_drv_rgtr +ffffffff818d0880 T bnxt_hwrm_func_rgtr_async_events +ffffffff818d09a0 T bnxt_hwrm_func_qcaps +ffffffff818d0a80 T bnxt_admin_intr +ffffffff818d0c80 T bnxt_intr +ffffffff818d1150 T bnxt_hwrm_func_qcfg +ffffffff818d1200 T bnxt_hwrm_queue_qportcfg +ffffffff818d12d0 T bnxt_hwrm_func_reset +ffffffff818d1380 T bnxt_mark_cpr_invalid +ffffffff818d13e0 T bnxt_hwrm_ring_alloc +ffffffff818d1590 T bnxt_cfg_async_cr +ffffffff818d1690 T bnxt_write_cp_doorbell +ffffffff818d16d0 T bnxt_set_cp_ring_aggint +ffffffff818d17b0 T bnxt_ioctl +ffffffff818d1940 T bnxt_start +ffffffff818d1d60 T bnxt_watchdog +ffffffff818d1d90 T bnxt_media_change +ffffffff818d1ee0 T bnxt_media_status +ffffffff818d1f00 T bnxt_refill +ffffffff818d1f60 T bnxt_media_autonegotiate +ffffffff818d2050 T bnxt_hwrm_port_phy_qcfg +ffffffff818d24f0 T bnxt_free_slots +ffffffff818d2580 T bnxt_hwrm_cmd_hdr_init +ffffffff818d25d0 T hwrm_send_message +ffffffff818d2650 T bnxt_queue_up +ffffffff818d3580 T bnxt_hwrm_stat_ctx_alloc +ffffffff818d3680 T bnxt_write_tx_doorbell +ffffffff818d36f0 T bnxt_write_rx_doorbell +ffffffff818d3770 T bnxt_hwrm_ring_grp_alloc +ffffffff818d3870 T bnxt_rx_fill +ffffffff818d3980 T bnxt_hwrm_ring_grp_free +ffffffff818d3a60 T bnxt_hwrm_ring_free +ffffffff818d3b50 T bnxt_hwrm_stat_ctx_free +ffffffff818d3c40 T bnxt_queue_down +ffffffff818d4320 T bnxt_up +ffffffff818d49f0 T bnxt_hwrm_vnic_ctx_alloc +ffffffff818d4ad0 T bnxt_hwrm_vnic_alloc +ffffffff818d4bd0 T bnxt_hwrm_vnic_cfg +ffffffff818d4d10 T bnxt_hwrm_vnic_cfg_placement +ffffffff818d4de0 T bnxt_hwrm_set_filter +ffffffff818d4f70 T bnxt_hwrm_vnic_rss_cfg +ffffffff818d5050 T bnxt_iff +ffffffff818d51c0 T bnxt_hwrm_vnic_free +ffffffff818d52b0 T bnxt_hwrm_vnic_ctx_free +ffffffff818d53a0 T bnxt_down +ffffffff818d5740 T bnxt_hwrm_free_filter +ffffffff818d5820 T bnxt_hwrm_cfa_l2_set_rx_mask +ffffffff818d5900 T bnxt_rxrinfo +ffffffff818d5a50 T bnxt_get_sffpage +ffffffff818d5d60 T bnxt_load_mbuf +ffffffff818d5e10 T bnxt_handle_async_event +ffffffff818d5e60 T bnxt_cpr_next_cmpl +ffffffff818d5ed0 T bnxt_cpr_commit +ffffffff818d5f00 T bnxt_cpr_rollback +ffffffff818d5f30 T bnxt_write_cp_doorbell_index +ffffffff818d5fb0 T bnxt_rx +ffffffff818d6290 T bnxt_txeof +ffffffff818d63c0 T bnxt_get_media_type +ffffffff818d6920 T bnxt_add_media_type +ffffffff818d6af0 T _hwrm_send_message +ffffffff818d99a0 T bnxt_rx_fill_slots +ffffffff818d9b60 T bnxt_hwrm_err_map +ffffffff818d9ba0 T _bnxt_hwrm_set_async_event_bit +ffffffff818da000 t mcx_match +ffffffff818da030 t mcx_attach +ffffffff818dd110 T mcx_rx_fill +ffffffff818dd360 T mcx_load_mbuf +ffffffff818dd410 t mcx_dmamem_alloc +ffffffff818dd570 t mcx_pages +ffffffff818dde50 t mcx_iff +ffffffff818de290 t mcx_alloc_uar +ffffffff818de480 t mcx_admin_intr +ffffffff818de630 t mcx_create_eq +ffffffff818debc0 t mcx_ioctl +ffffffff818df6a0 t mcx_start +ffffffff818dfba0 t mcx_watchdog +ffffffff818dfbd0 t mcx_media_change +ffffffff818dfe90 t mcx_media_status +ffffffff818dffd0 t mcx_refill +ffffffff818e0040 t mcx_cq_intr +ffffffff818e0560 t mcx_calibrate +ffffffff818e0720 t mcx_port_change +ffffffff818e0860 t mcx_cmdq_post +ffffffff818e0940 t mcx_set_flow_table_entry_mac +ffffffff818e0e10 t mcx_delete_flow_table_entry +ffffffff818e1290 t mcx_access_hca_reg +ffffffff818e16c0 t mcx_cmdq_exec +ffffffff818e18c0 t mcx_up +ffffffff818e4bc0 t mcx_down +ffffffff818e5c20 t mcx_create_flow_table +ffffffff818e5fd0 t mcx_create_flow_group +ffffffff818e64b0 t mcx_destroy_sq +ffffffff818e6760 t mcx_destroy_cq +ffffffff818e6a20 t mcx_arm_cq +ffffffff818e6b40 t mcx_destroy_flow_table +ffffffff818e6ea0 t mcx_kstat_attach_ppcnt +ffffffff818e6fd0 t mcx_kstat_ppcnt_read +ffffffff818e70f0 t mcx_kstat_mtmp_read +ffffffff818e7280 t mcx_kstat_queue_read +ffffffff818e8710 t mcx_timecounter_read +ffffffff818e9000 t iavf_match +ffffffff818e9030 t iavf_attach +ffffffff818e9900 t iavf_reset +ffffffff818e9bd0 t iavf_dmamem_alloc +ffffffff818e9d30 t iavf_arq_fill +ffffffff818e9fe0 t iavf_arq_timeout +ffffffff818ea010 t iavf_init_admin_queue +ffffffff818ea1c0 t iavf_get_version +ffffffff818ea3e0 t iavf_get_vf_resources +ffffffff818ea5b0 t iavf_config_irq_map +ffffffff818ea7a0 t iavf_intr +ffffffff818eae20 t iavf_ioctl +ffffffff818eb9d0 t iavf_start +ffffffff818ebd20 t iavf_watchdog +ffffffff818ebd50 t iavf_media_change +ffffffff818ebd80 t iavf_media_status +ffffffff818ebe10 t iavf_arq_unfill +ffffffff818ebf10 t iavf_down +ffffffff818ec470 t iavf_up +ffffffff818ed0e0 t iavf_queue_select +ffffffff818ed2e0 t iavf_rxfill +ffffffff818ed4e0 t iavf_rxrefill +ffffffff818ed500 t iavf_process_arq +ffffffff818ee000 T rge_match +ffffffff818ee030 T rge_attach +ffffffff818ee520 T rge_activate +ffffffff818ee660 T rge_intr +ffffffff818ee950 T rge_config_imtype +ffffffff818ee9c0 T rge_exit_oob +ffffffff818ef1e0 T rge_hw_init +ffffffff818ef5d0 T rge_get_macaddr +ffffffff818ef650 T rge_set_phy_power +ffffffff818ef8b0 T rge_phy_config +ffffffff818f01f0 T rge_allocmem +ffffffff818f0600 T rge_ioctl +ffffffff818f07b0 T rge_start +ffffffff818f0980 T rge_watchdog +ffffffff818f09c0 T rge_wol +ffffffff818f0bf0 T rge_tick +ffffffff818f0c70 T rge_txstart +ffffffff818f0ca0 T rge_ifmedia_upd +ffffffff818f1260 T rge_ifmedia_sts +ffffffff818f1350 T rge_add_media_types +ffffffff818f1400 T rge_kstat_attach +ffffffff818f16e0 T rge_wol_power +ffffffff818f17c0 T rge_rxeof +ffffffff818f1bc0 T rge_txeof +ffffffff818f1dc0 T rge_init +ffffffff818f2f80 T rge_setup_intr +ffffffff818f30f0 T rge_encap +ffffffff818f3390 T rge_stop +ffffffff818f35f0 T rge_iff +ffffffff818f3770 T rge_set_macaddr +ffffffff818f3840 T rge_rx_list_init +ffffffff818f3900 T rge_tx_list_init +ffffffff818f39c0 T rge_read_csi +ffffffff818f3c30 T rge_write_csi +ffffffff818f3eb0 T rge_write_mac_ocp +ffffffff818f3f00 T rge_read_mac_ocp +ffffffff818f3f80 T rge_reset +ffffffff818f4140 T rge_write_phy_ocp +ffffffff818f4200 T rge_read_phy_ocp +ffffffff818f42b0 T rge_read_phy +ffffffff818f4380 T rge_write_phy +ffffffff818f4460 T rge_get_link_status +ffffffff818f44c0 T rge_newbuf +ffffffff818f4640 T rge_discard_rxbuf +ffffffff818f46b0 T rge_fill_rx_ring +ffffffff818f4730 T rge_phy_config_mac_cfg2 +ffffffff818f6140 T rge_phy_config_mac_cfg3 +ffffffff818f7df0 T rge_phy_config_mac_cfg4 +ffffffff818fbe60 T rge_phy_config_mac_cfg5 +ffffffff818fc950 T rge_patch_phy_mcu +ffffffff818fcbd0 T rge_write_ephy +ffffffff818fce30 T rge_phy_config_mcu +ffffffff818fd8f0 T rge_read_ephy +ffffffff818fdb70 T rge_disable_phy_ocp_pwrsave +ffffffff818fdd40 T rge_disable_hw_im +ffffffff818fdd70 T rge_disable_sim_im +ffffffff818fddd0 T rge_setup_sim_im +ffffffff818fde50 T rge_link_state +ffffffff818fded0 t rge_kstat_read +ffffffff818fe070 t rge_kstat_copy +ffffffff818ff000 T igc_match +ffffffff818ff030 T igc_attach +ffffffff818ff4a0 T igc_detach +ffffffff818ff6a0 T igc_identify_hardware +ffffffff818ff710 T igc_allocate_pci_resources +ffffffff818ff830 T igc_allocate_queues +ffffffff818ffd20 T igc_is_valid_ether_addr +ffffffff818ffd80 T igc_allocate_msix +ffffffff818fffe0 T igc_setup_interface +ffffffff81900220 T igc_reset +ffffffff81900360 T igc_update_link_status +ffffffff81900470 T igc_get_hw_control +ffffffff819004d0 T igc_release_hw_control +ffffffff81900530 T igc_free_pci_resources +ffffffff81900610 T igc_stop +ffffffff81900920 T igc_free_transmit_structures +ffffffff819009a0 T igc_free_receive_structures +ffffffff81900a60 T igc_setup_msix +ffffffff81900af0 T igc_dma_malloc +ffffffff81900c60 T igc_rxrefill +ffffffff81900d30 T igc_dma_free +ffffffff81900de0 T igc_init_dmac +ffffffff81901080 T igc_intr_queue +ffffffff81901190 T igc_intr_link +ffffffff81901310 T igc_ioctl +ffffffff819015f0 T igc_start +ffffffff81901a20 T igc_watchdog +ffffffff81901a50 T igc_media_change +ffffffff81901b60 T igc_media_status +ffffffff81901d10 T igc_init +ffffffff81902200 T igc_setup_transmit_structures +ffffffff819022c0 T igc_initialize_transmit_unit +ffffffff819024e0 T igc_setup_receive_structures +ffffffff81902660 T igc_initialize_receive_unit +ffffffff81902a30 T igc_iff +ffffffff81902b80 T igc_configure_queues +ffffffff81902d90 T igc_rxfill +ffffffff81902ec0 T igc_enable_intr +ffffffff81902f90 T igc_tx_ctx_setup +ffffffff819030a0 T igc_txeof +ffffffff81903260 T igc_disable_intr +ffffffff81903300 T igc_rxrinfo +ffffffff81903450 T igc_get_buf +ffffffff81903590 T igc_rxeof +ffffffff81903930 T igc_rx_checksum +ffffffff81903980 T igc_set_queues +ffffffff81903a60 T igc_enable_queue +ffffffff81903a90 T igc_allocate_transmit_buffers +ffffffff81903bf0 T igc_setup_transmit_ring +ffffffff81903d70 T igc_free_transmit_buffers +ffffffff81903e90 T igc_allocate_receive_buffers +ffffffff81903fc0 T igc_setup_receive_ring +ffffffff81904080 T igc_initialize_rss_mapping +ffffffff819042a0 T igc_free_receive_buffers +ffffffff81905000 T igc_init_mac_params +ffffffff81905040 T igc_init_nvm_params +ffffffff81905080 T igc_init_phy_params +ffffffff819050c0 T igc_set_mac_type +ffffffff81905170 T igc_setup_init_funcs +ffffffff819052d0 T igc_update_mc_addr_list +ffffffff81905310 T igc_check_for_link +ffffffff81905350 T igc_reset_hw +ffffffff81905390 T igc_init_hw +ffffffff819053d0 T igc_get_speed_and_duplex +ffffffff81905410 T igc_rar_set +ffffffff81905450 T igc_check_reset_block +ffffffff81905490 T igc_get_phy_info +ffffffff819054d0 T igc_phy_hw_reset +ffffffff81905510 T igc_read_mac_addr +ffffffff81905540 T igc_validate_nvm_checksum +ffffffff81906000 T igc_acquire_phy_base +ffffffff81906030 T igc_release_phy_base +ffffffff81906060 T igc_init_hw_base +ffffffff81906160 T igc_power_down_phy_copper_base +ffffffff81907000 T igc_init_nvm_params_i225 +ffffffff81907180 T igc_acquire_nvm_i225 +ffffffff81907250 T igc_release_nvm_i225 +ffffffff819072c0 T igc_get_flash_presence_i225 +ffffffff81907310 T igc_read_nvm_srrd_i225 +ffffffff819073f0 T igc_write_nvm_srwr_i225 +ffffffff819075c0 T igc_validate_nvm_checksum_i225 +ffffffff81907650 T igc_update_nvm_checksum_i225 +ffffffff819077f0 T igc_init_mac_params_i225 +ffffffff819078b0 T igc_reset_hw_i225 +ffffffff819079d0 T igc_init_hw_i225 +ffffffff819079e0 T igc_check_for_link_i225 +ffffffff81907aa0 T igc_acquire_swfw_sync_i225 +ffffffff81907b80 T igc_release_swfw_sync_i225 +ffffffff81907c00 T igc_setup_copper_link_i225 +ffffffff81907c90 T igc_init_phy_params_i225 +ffffffff81907d70 T igc_get_hw_semaphore_i225 +ffffffff81907f20 T __igc_write_nvm_srwr +ffffffff81908050 T igc_update_flash_i225 +ffffffff81908420 T igc_set_flsw_flash_burst_counter_i225 +ffffffff81908480 T igc_write_erase_flash_command_i225 +ffffffff81908580 T igc_pool_flash_update_done_i225 +ffffffff81908610 T igc_set_ltr_i225 +ffffffff81908880 T igc_init_function_pointers_i225 +ffffffff819088f0 T igc_set_eee_i225 +ffffffff81909000 T igc_init_mac_ops_generic +ffffffff81909050 T igc_null_ops_generic +ffffffff81909080 T igc_config_collision_dist_generic +ffffffff819090f0 T igc_rar_set_generic +ffffffff819091d0 T igc_write_vfta_generic +ffffffff81909220 T igc_init_rx_addrs_generic +ffffffff819092c0 T igc_check_alt_mac_addr_generic +ffffffff81909440 T igc_hash_mc_addr_generic +ffffffff819094e0 T igc_update_mc_addr_list_generic +ffffffff81909650 T igc_clear_hw_cntrs_base_generic +ffffffff81909a40 T igc_setup_link_generic +ffffffff81909bd0 T igc_set_fc_watermarks_generic +ffffffff81909c80 T igc_force_mac_fc_generic +ffffffff81909d40 T igc_config_fc_after_link_up_generic +ffffffff81909f60 T igc_get_speed_and_duplex_copper_generic +ffffffff8190a000 T igc_put_hw_semaphore_generic +ffffffff8190a050 T igc_get_auto_rd_done_generic +ffffffff8190a2a0 T igc_disable_pcie_master_generic +ffffffff8190b000 T igc_init_nvm_ops_generic +ffffffff8190b080 T igc_null_read_nvm +ffffffff8190b0b0 T igc_null_nvm_generic +ffffffff8190b0e0 T igc_reload_nvm_generic +ffffffff8190b160 T igc_null_write_nvm +ffffffff8190b190 T igc_poll_eerd_eewr_done +ffffffff8190b230 T igc_read_nvm_eerd +ffffffff8190b360 T igc_read_mac_addr_generic +ffffffff8190b440 T igc_validate_nvm_checksum_generic +ffffffff8190c000 T igc_init_phy_ops_generic +ffffffff8190c0f0 T igc_null_set_page +ffffffff8190c120 T igc_null_read_reg +ffffffff8190c150 T igc_null_phy_generic +ffffffff8190c180 T igc_null_lplu_state +ffffffff8190c1b0 T igc_null_write_reg +ffffffff8190c1e0 T igc_check_reset_block_generic +ffffffff8190c240 T igc_get_phy_id +ffffffff8190c2f0 T igc_read_phy_reg_mdic +ffffffff8190c400 T igc_write_phy_reg_mdic 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drm_atomic_helper_update_plane +ffffffff81928ad0 T drm_atomic_helper_disable_plane +ffffffff81928b90 T drm_atomic_helper_set_config +ffffffff81928c40 T drm_atomic_helper_disable_all +ffffffff81928df0 T drm_atomic_helper_shutdown +ffffffff81928f40 T drm_atomic_helper_duplicate_state +ffffffff819290b0 T drm_atomic_helper_suspend +ffffffff81929200 T drm_atomic_helper_commit_duplicated_state +ffffffff81929340 T drm_atomic_helper_resume +ffffffff81929470 T drm_atomic_helper_page_flip +ffffffff81929530 t page_flip_common +ffffffff81929630 T drm_atomic_helper_page_flip_target +ffffffff81929750 T drm_atomic_helper_bridge_propagate_bus_fmt +ffffffff819297d0 t set_best_encoder +ffffffff8192a000 T __drm_atomic_helper_crtc_state_reset +ffffffff8192a030 T __drm_atomic_helper_crtc_reset +ffffffff8192a090 T drm_atomic_helper_crtc_reset +ffffffff8192a130 T __drm_atomic_helper_crtc_duplicate_state +ffffffff8192a200 T drm_atomic_helper_crtc_duplicate_state +ffffffff8192a2a0 T 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drm_bridge_chain_mode_valid +ffffffff81930520 T drm_bridge_chain_disable +ffffffff819305b0 T drm_bridge_chain_post_disable +ffffffff81930630 T drm_bridge_chain_mode_set +ffffffff819306c0 T drm_bridge_chain_pre_enable +ffffffff81930750 T drm_bridge_chain_enable +ffffffff819307d0 T drm_atomic_bridge_chain_disable +ffffffff819308d0 T drm_atomic_bridge_chain_post_disable +ffffffff819309e0 T drm_atomic_bridge_chain_pre_enable +ffffffff81930ae0 T drm_atomic_bridge_chain_enable +ffffffff81930bf0 T drm_atomic_bridge_chain_check +ffffffff81930f50 T drm_bridge_detect +ffffffff81930fb0 T drm_bridge_get_modes +ffffffff81931010 T drm_bridge_get_edid +ffffffff81931070 T drm_bridge_hpd_enable +ffffffff81931140 T drm_bridge_hpd_disable +ffffffff819311e0 T drm_bridge_hpd_notify +ffffffff81931240 t drm_bridge_atomic_duplicate_priv_state +ffffffff81931260 t drm_bridge_atomic_destroy_priv_state +ffffffff81931280 t select_bus_fmt_recursive +ffffffff81932000 T drm_buddy_init +ffffffff81932460 T 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drm_client_buffer_vunmap +ffffffff81935560 T drm_client_framebuffer_create +ffffffff81935840 T drm_client_framebuffer_delete +ffffffff81935950 T drm_client_framebuffer_flush +ffffffff81936000 T drm_client_modeset_create +ffffffff81936140 T drm_client_modeset_free +ffffffff81936260 T drm_client_modeset_probe +ffffffff81937a30 t drm_client_pick_crtcs +ffffffff81937d20 T drm_client_rotation +ffffffff81937ec0 T drm_client_modeset_check +ffffffff81937f60 t drm_client_modeset_commit_atomic +ffffffff81938160 T drm_client_modeset_commit_locked +ffffffff81938300 T drm_client_modeset_commit +ffffffff81938370 T drm_client_modeset_dpms +ffffffff819385c0 t drm_connector_pick_cmdline_mode +ffffffff81939000 T drm_color_ctm_s31_32_to_qm_n +ffffffff819390e0 T drm_crtc_enable_color_mgmt +ffffffff819391c0 T drm_mode_crtc_set_gamma_size +ffffffff819392e0 T drm_mode_gamma_set_ioctl +ffffffff819397d0 T drm_mode_gamma_get_ioctl +ffffffff81939910 T drm_get_color_encoding_name +ffffffff81939980 T drm_get_color_range_name +ffffffff819399f0 T drm_plane_create_color_properties +ffffffff81939c50 T drm_color_lut_check +ffffffff8193a000 T drm_connector_ida_init +ffffffff8193a110 T drm_connector_ida_destroy +ffffffff8193a220 T drm_get_connector_type_name +ffffffff8193a260 T drm_connector_free_work_fn +ffffffff8193a320 T drm_connector_init +ffffffff8193a3a0 t __drm_connector_init +ffffffff8193a8b0 T drm_connector_init_with_ddc +ffffffff8193a940 T drmm_connector_init +ffffffff8193aa00 t drm_connector_cleanup_action +ffffffff8193aa20 T drm_connector_attach_edid_property +ffffffff8193aa40 T drm_connector_attach_encoder +ffffffff8193aac0 T drm_connector_has_possible_encoder +ffffffff8193ab00 T drm_connector_cleanup +ffffffff8193ae30 T drm_connector_unregister +ffffffff8193aed0 T drm_mode_put_tile_group +ffffffff8193af60 T drm_connector_register +ffffffff8193b050 T drm_connector_unregister_all +ffffffff8193b1f0 T drm_connector_list_iter_begin +ffffffff8193b230 T drm_connector_list_iter_next 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drm_connector_set_panel_orientation +ffffffff8193cb30 T drm_connector_set_panel_orientation_with_quirk +ffffffff8193cc10 T drm_connector_set_orientation_from_panel +ffffffff8193cd00 T drm_connector_create_privacy_screen_properties +ffffffff8193cda0 T drm_connector_attach_privacy_screen_properties +ffffffff8193ce10 T drm_connector_attach_privacy_screen_provider +ffffffff8193cf20 t drm_connector_privacy_screen_notifier +ffffffff8193cfc0 T drm_connector_update_privacy_screen +ffffffff8193d030 T drm_connector_set_obj_prop +ffffffff8193d110 T drm_connector_property_set_ioctl +ffffffff8193d170 T drm_mode_getconnector +ffffffff8193d6b0 T drm_connector_find_by_fwnode +ffffffff8193d760 T drm_connector_oob_hotplug_event +ffffffff8193d850 T drm_mode_get_tile_group +ffffffff8193d920 T drm_mode_create_tile_group +ffffffff8193d9f0 t drm_connector_free +ffffffff8193da30 t kasprintf +ffffffff8193e000 T drm_crtc_from_index +ffffffff8193e060 T drm_crtc_force_disable +ffffffff8193e180 T drm_mode_set_config_internal +ffffffff8193e200 T drm_crtc_register_all +ffffffff8193e290 T drm_crtc_unregister_all +ffffffff8193e300 T drm_crtc_create_fence +ffffffff8193e390 T drm_crtc_init_with_planes +ffffffff8193e460 t __drm_crtc_init_with_planes +ffffffff8193e850 T drmm_crtc_init_with_planes +ffffffff8193e950 T __drmm_crtc_alloc_with_planes +ffffffff8193eac0 T drm_crtc_cleanup +ffffffff8193ebe0 T drm_mode_getcrtc +ffffffff8193ed80 t __drm_mode_set_config_internal +ffffffff8193ef20 T drm_crtc_check_viewport +ffffffff8193efd0 T drm_mode_setcrtc +ffffffff8193f730 T drm_mode_crtc_set_obj_prop +ffffffff8193f7b0 T drm_crtc_create_scaling_filter_property +ffffffff8193f820 t drm_crtc_fence_get_driver_name +ffffffff8193f8a0 t drm_crtc_fence_get_timeline_name +ffffffff8193f910 t kasprintf +ffffffff8193f9e0 t drmm_crtc_init_with_planes_cleanup +ffffffff81940000 T drm_helper_encoder_in_use +ffffffff81940180 T drm_helper_crtc_in_use +ffffffff819402b0 T drm_helper_disable_unused_functions +ffffffff81940330 t __drm_helper_disable_unused_functions +ffffffff81940430 T drm_crtc_helper_set_mode +ffffffff819408e0 T drm_connector_get_single_encoder +ffffffff819409e0 T drm_crtc_helper_set_config +ffffffff81941600 T drm_helper_connector_dpms +ffffffff819418f0 T drm_helper_resume_force_mode +ffffffff81941be0 T drm_helper_force_disable_all +ffffffff81941cb0 t drm_encoder_disable +ffffffff81942000 T drm_atomic_helper_check_plane_damage +ffffffff819420a0 T drm_atomic_helper_dirtyfb +ffffffff81942350 T drm_atomic_helper_damage_iter_init +ffffffff819424a0 T drm_atomic_helper_damage_iter_next +ffffffff81942540 T drm_atomic_helper_damage_merged +ffffffff81943000 T displayid_iter_edid_begin +ffffffff81943050 T __displayid_iter_next +ffffffff819432e0 T displayid_iter_end +ffffffff81944000 T drm_mode_create_dumb +ffffffff819440c0 T drm_mode_create_dumb_ioctl +ffffffff81944180 T drm_mode_mmap_dumb_ioctl +ffffffff819441f0 T drm_mode_destroy_dumb +ffffffff81944260 T drm_mode_destroy_dumb_ioctl +ffffffff81945000 T drm_edid_header_is_valid +ffffffff81945080 T drm_edid_are_equal +ffffffff819450f0 T drm_edid_block_valid +ffffffff81945300 t edid_block_check +ffffffff81945430 t edid_block_status_print +ffffffff81945530 T drm_edid_is_valid +ffffffff819455b0 T drm_edid_override_set +ffffffff81945620 T drm_connector_update_edid_property +ffffffff819457d0 T drm_edid_override_reset +ffffffff81945900 T drm_add_override_edid_modes +ffffffff81945ae0 T drm_add_edid_modes +ffffffff81945bd0 T drm_do_get_edid +ffffffff81945bf0 t _drm_do_get_edid +ffffffff81946100 T drm_edid_raw +ffffffff81946190 T drm_edid_alloc +ffffffff81946260 T drm_edid_dup +ffffffff81946340 T drm_edid_free +ffffffff819463a0 T drm_probe_ddc +ffffffff819464a0 t drm_do_probe_ddc_edid +ffffffff819465f0 T drm_get_edid +ffffffff81946730 T drm_edid_read_custom +ffffffff81946820 T drm_edid_read_ddc +ffffffff81946950 T drm_edid_read +ffffffff819469d0 T drm_edid_get_panel_id +ffffffff81946ab0 t edid_block_read +ffffffff81946d20 T drm_get_edid_switcheroo +ffffffff81946d70 T drm_edid_duplicate +ffffffff81946df0 T drm_mode_find_dmt +ffffffff81946f10 T drm_mode_fixup_1366x768 +ffffffff81946f70 T drm_find_edid_extension +ffffffff81947180 T drm_match_cea_mode +ffffffff819473d0 T drm_display_mode_from_cea_vic +ffffffff81947440 T drm_edid_get_monitor_name +ffffffff819474f0 t get_monitor_name +ffffffff81947850 T drm_edid_to_sad +ffffffff81947a60 T drm_edid_to_speaker_allocation +ffffffff81947c10 T drm_av_sync_delay +ffffffff81947cc0 T drm_detect_hdmi_monitor +ffffffff81947de0 T drm_detect_monitor_audio +ffffffff81947ff0 T drm_default_rgb_quant_range +ffffffff81948030 T drm_edid_connector_update +ffffffff81948090 t _drm_edid_connector_update +ffffffff81949f40 t _drm_update_tile_info +ffffffff8194a1d0 t _drm_edid_connector_property_update +ffffffff8194a380 T drm_add_modes_noedid +ffffffff8194a470 T drm_set_preferred_mode +ffffffff8194a4d0 T drm_hdmi_avi_infoframe_from_display_mode +ffffffff8194a750 T drm_hdmi_avi_infoframe_quant_range +ffffffff8194a7f0 T drm_hdmi_vendor_infoframe_from_display_mode +ffffffff8194a8b0 t connector_bad_edid +ffffffff8194aa70 t drm_for_each_detailed_block +ffffffff8194acc0 t __cea_db_iter_next +ffffffff8194af60 t update_display_info +ffffffff8194bde0 t get_monitor_range +ffffffff8194be80 t do_detailed_mode +ffffffff8194c7a0 t hdmi_mode_alternate_clock +ffffffff8194c850 t do_cvt_mode +ffffffff8194caa0 t drm_mode_std +ffffffff8194d7b0 t do_standard_modes +ffffffff8194d900 t drm_monitor_supports_rb +ffffffff8194dbf0 t drm_gtf2_hbreak +ffffffff8194de80 t do_established_modes +ffffffff8194e080 t drm_match_hdmi_mode +ffffffff8194e2c0 t do_inferred_modes +ffffffff8194e830 t mode_in_range +ffffffff8194f000 T drm_encoder_register_all +ffffffff8194f090 T drm_encoder_unregister_all +ffffffff8194f100 T drm_encoder_init +ffffffff8194f1d0 t __drm_encoder_init +ffffffff8194f390 T drm_encoder_cleanup +ffffffff8194f4c0 T __drmm_encoder_alloc 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drm_fb_helper_fini +ffffffff81951a30 T drm_fb_helper_set_suspend +ffffffff81951a60 T drm_fb_helper_set_suspend_unlocked +ffffffff81951a90 T drm_fb_helper_set_par +ffffffff81951b80 T drm_fb_helper_pan_display +ffffffff81951c50 T drm_fb_helper_fill_info +ffffffff81951d10 T drm_fb_helper_initial_config +ffffffff81951d40 t __drm_fb_helper_initial_config_and_unlock +ffffffff81952290 T drm_fb_helper_hotplug_event +ffffffff81952490 t drm_setup_crtcs_fb +ffffffff819525d0 T drm_fb_helper_lastclose +ffffffff81952680 T drm_fb_helper_output_poll_changed +ffffffff819526a0 T drm_fbdev_generic_setup +ffffffff81952850 t drm_fbdev_client_hotplug +ffffffff81952a80 t drm_fbdev_client_unregister +ffffffff81952af0 t drm_fbdev_client_restore +ffffffff81952b90 t drm_fbdev_cleanup +ffffffff81952c30 t drm_fbdev_use_shadow_fb +ffffffff81952c80 t drm_fb_helper_generic_probe +ffffffff81953000 T drm_dev_needs_global_mutex +ffffffff81953060 T drm_file_alloc +ffffffff819532d0 T drm_file_free +ffffffff81953500 T drm_lastclose +ffffffff81953570 T drm_release +ffffffff819535c0 T drm_release_noglobal +ffffffff81953610 T drm_read +ffffffff81953660 T drm_event_reserve_init_locked +ffffffff819536e0 T drm_event_reserve_init +ffffffff819537a0 T drm_event_cancel_free +ffffffff81953820 T drm_send_event_timestamp_locked +ffffffff81953830 t drm_send_event_helper +ffffffff81953a10 T drm_send_event_locked +ffffffff81953a30 T drm_send_event +ffffffff81953a80 T mock_drm_getfile +ffffffff81954000 T drm_flip_work_allocate_task +ffffffff81954060 T drm_flip_work_queue_task +ffffffff819540b0 T drm_flip_work_queue +ffffffff81954150 T drm_flip_work_commit +ffffffff819541d0 T drm_flip_work_init +ffffffff81954240 t flip_worker +ffffffff81954320 T drm_flip_work_cleanup +ffffffff81955000 T drm_fb_clip_offset +ffffffff81955040 T drm_fb_memcpy +ffffffff819552c0 T drm_fb_swab +ffffffff819553c0 t drm_fb_swab32_line +ffffffff81955420 t drm_fb_swab16_line +ffffffff81955480 t drm_fb_xfrm +ffffffff81955740 T drm_fb_xrgb8888_to_rgb332 +ffffffff819557a0 t drm_fb_xrgb8888_to_rgb332_line +ffffffff81955890 T drm_fb_xrgb8888_to_rgb565 +ffffffff81955910 t drm_fb_xrgb8888_to_rgb565_swab_line +ffffffff81955990 t drm_fb_xrgb8888_to_rgb565_line +ffffffff81955a80 T drm_fb_xrgb8888_to_rgb888 +ffffffff81955ae0 t drm_fb_xrgb8888_to_rgb888_line +ffffffff81955b70 T drm_fb_xrgb8888_to_xrgb2101010 +ffffffff81955bd0 t drm_fb_xrgb8888_to_xrgb2101010_line +ffffffff81955c50 T drm_fb_xrgb8888_to_gray8 +ffffffff81955cb0 t drm_fb_xrgb8888_to_gray8_line +ffffffff81955d30 T drm_fb_blit +ffffffff81956180 T drm_fb_xrgb8888_to_mono +ffffffff81956510 T drm_fb_build_fourcc_list +ffffffff81956840 t drm_fb_rgb888_to_xrgb8888_line +ffffffff81956910 t drm_fb_rgb565_to_xrgb8888_line +ffffffff81957000 T drm_mode_legacy_fb_format +ffffffff819570f0 T drm_driver_legacy_fb_format +ffffffff819571f0 T __drm_format_info +ffffffff81957270 T drm_format_info +ffffffff81957330 T drm_get_format_info +ffffffff81957410 T drm_format_info_block_width +ffffffff81957460 T drm_format_info_block_height +ffffffff819574b0 T drm_format_info_bpp +ffffffff81957530 T drm_format_info_min_pitch +ffffffff81958000 T drm_framebuffer_check_src_coords +ffffffff81958120 T drm_mode_addfb +ffffffff81958330 T drm_mode_addfb2 +ffffffff81958420 T drm_mode_addfb_ioctl +ffffffff81958440 T drm_internal_framebuffer_create +ffffffff81958960 T drm_mode_addfb2_ioctl +ffffffff81958a50 T drm_mode_rmfb +ffffffff81958c20 T drm_framebuffer_lookup +ffffffff81958c70 t drm_mode_rmfb_work_fn +ffffffff81958d30 T drm_mode_rmfb_ioctl +ffffffff81958d50 T drm_mode_getfb +ffffffff81958eb0 T drm_mode_getfb2_ioctl +ffffffff81959260 T drm_mode_dirtyfb_ioctl +ffffffff81959400 T drm_fb_release +ffffffff81959510 T drm_framebuffer_free +ffffffff81959550 T drm_framebuffer_init +ffffffff819596b0 T drm_framebuffer_unregister_private +ffffffff819596f0 T drm_framebuffer_cleanup +ffffffff81959750 T drm_framebuffer_remove +ffffffff81959c00 T drm_framebuffer_plane_width +ffffffff81959c50 T drm_framebuffer_plane_height +ffffffff81959ca0 T drm_framebuffer_print_info +ffffffff8195a000 T drm_ref +ffffffff8195a030 T drm_unref +ffffffff8195a0b0 T drm_fault +ffffffff8195a270 T drm_flush +ffffffff8195a2a0 T udv_attach_drm +ffffffff8195a4c0 T drm_gem_init +ffffffff8195a570 t drm_gem_init_release +ffffffff8195a590 T drm_gem_object_init +ffffffff8195a6f0 T drm_gem_private_object_init +ffffffff8195a7f0 T drm_gem_handle_delete +ffffffff8195a8e0 t drm_gem_object_release_handle +ffffffff8195a970 T drm_gem_dumb_map_offset +ffffffff8195aaa0 T drm_gem_object_lookup +ffffffff8195ab20 T drm_gem_create_mmap_offset +ffffffff8195ab50 T drm_gem_dumb_destroy +ffffffff8195ab70 T drm_gem_handle_create_tail +ffffffff8195ace0 t drm_gem_object_handle_put_unlocked +ffffffff8195ae30 T drm_gem_handle_create +ffffffff8195ae80 T drm_gem_free_mmap_offset +ffffffff8195aeb0 T drm_gem_create_mmap_offset_size +ffffffff8195aee0 T drm_gem_get_pages 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drm_gem_fb_destroy +ffffffff8195e0c0 T drm_gem_fb_create_handle +ffffffff8195f000 T drm_ht_create +ffffffff8195f080 T drm_ht_verbose_list +ffffffff8195f140 T drm_ht_insert_item +ffffffff8195f190 T drm_ht_just_insert_please +ffffffff8195f260 T drm_ht_find_item +ffffffff8195f2b0 T drm_ht_remove_key +ffffffff8195f300 T drm_ht_remove_item +ffffffff8195f350 T drm_ht_remove +ffffffff81960000 T drm_getunique +ffffffff819600a0 T drm_getclient +ffffffff81960120 T drm_noop +ffffffff81960170 T drm_invalid_op +ffffffff819601a0 T drm_version +ffffffff819603c0 T pledge_ioctl_drm +ffffffff81960480 T drm_ioctl_kernel +ffffffff819604d0 T drm_ioctl +ffffffff81960520 T drm_ioctl_flags +ffffffff81960580 T drm_do_ioctl +ffffffff819608d0 T drmioctl +ffffffff81960a20 t drm_getstats +ffffffff81960a70 t drm_setversion +ffffffff81960bd0 t drm_getcap +ffffffff81960dc0 t drm_setclientcap +ffffffff81961000 T tasklet_unlock_wait +ffffffff81961080 T tasklet_unlock_spin_wait +ffffffff81961100 T tasklet_run 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dmi_first_match +ffffffff81962080 T dmi_get_system_info +ffffffff819620f0 T dmi_check_system +ffffffff819621f0 T alloc_pages +ffffffff819622c0 T __free_pages +ffffffff819623c0 T __pagevec_release +ffffffff81962470 T kmap +ffffffff819624b0 T kunmap_va +ffffffff819624d0 T kmap_atomic_prot +ffffffff81962560 T kunmap_atomic +ffffffff819625e0 T vmap +ffffffff819626c0 T vunmap +ffffffff81962710 T is_vmalloc_addr +ffffffff81962750 T print_hex_dump +ffffffff81962820 T memchr_inv +ffffffff81962870 T panic_cmp +ffffffff81962890 T linux_root_RB_INSERT_COLOR +ffffffff81962a90 T linux_root_RB_REMOVE_COLOR +ffffffff81962dd0 T linux_root_RB_REMOVE +ffffffff81962f00 T linux_root_RB_INSERT +ffffffff81962f70 T linux_root_RB_FIND +ffffffff81962fc0 T linux_root_RB_NFIND +ffffffff81963010 T linux_root_RB_NEXT +ffffffff81963080 T linux_root_RB_PREV +ffffffff819630f0 T linux_root_RB_MINMAX +ffffffff81963140 T idr_init +ffffffff81963170 T idr_destroy +ffffffff819632b0 T idr_tree_SPLAY_REMOVE +ffffffff81963330 T idr_preload +ffffffff819633c0 T idr_alloc +ffffffff81963560 T idr_tree_SPLAY_INSERT +ffffffff81963600 T idr_replace +ffffffff81963680 T idr_remove +ffffffff81963740 T idr_find +ffffffff819637b0 T idr_get_next +ffffffff819638e0 T idr_for_each +ffffffff819639f0 T idr_cmp +ffffffff81963a30 T idr_tree_SPLAY +ffffffff81963b60 T idr_tree_SPLAY_MINMAX +ffffffff81963c50 T ida_init +ffffffff81963c80 T ida_destroy +ffffffff81963c90 T ida_simple_get +ffffffff81963cb0 T ida_simple_remove +ffffffff81963cd0 T ida_alloc_min +ffffffff81963cf0 T ida_alloc_max +ffffffff81963d10 T ida_free +ffffffff81963d30 T xarray_cmp +ffffffff81963d70 T xarray_tree_SPLAY_INSERT +ffffffff81963e10 T xarray_tree_SPLAY +ffffffff81963f40 T xarray_tree_SPLAY_REMOVE +ffffffff81963fc0 T xarray_tree_SPLAY_MINMAX +ffffffff819640b0 T xa_init_flags +ffffffff81964130 T xa_destroy +ffffffff81964270 T __xa_alloc +ffffffff819643f0 T __xa_alloc_cyclic +ffffffff81964450 T __xa_erase +ffffffff81964510 T __xa_load +ffffffff81964580 T __xa_store +ffffffff81964700 T xa_get_next +ffffffff81964820 T sg_alloc_table +ffffffff819648a0 T sg_free_table +ffffffff81964900 T sg_copy_from_buffer +ffffffff81964930 T i2c_master_xfer +ffffffff81964a60 T __i2c_transfer +ffffffff81964b10 T i2c_transfer +ffffffff81964be0 T i2c_bb_master_xfer +ffffffff81964c80 T i2c_bb_functionality +ffffffff81964cb0 T i2c_bit_add_bus +ffffffff81964cf0 T vga_disable_bridge +ffffffff81964da0 T vga_get_uninterruptible +ffffffff81964df0 T vga_put +ffffffff81964e70 T acpi_get_table +ffffffff81964f40 T acpi_put_table +ffffffff81964f70 T acpi_get_handle +ffffffff81964fc0 T acpi_get_name +ffffffff81965060 T acpi_evaluate_object +ffffffff819652c0 T drm_linux_acpi_notify +ffffffff81965340 T register_acpi_notifier +ffffffff81965380 T unregister_acpi_notifier +ffffffff81965410 T acpi_format_exception +ffffffff81965460 T backlight_do_update_status +ffffffff81965480 T backlight_device_register +ffffffff81965510 T backlight_device_unregister +ffffffff81965530 T devm_backlight_device_register +ffffffff81965580 T backlight_schedule_update_status +ffffffff819655a0 T backlight_enable +ffffffff819655e0 T backlight_disable +ffffffff81965620 T drm_sysfs_hotplug_event +ffffffff81965640 T drm_sysfs_connector_hotplug_event +ffffffff81965660 T drm_sysfs_connector_status_event +ffffffff81965680 T dma_fence_get +ffffffff819656c0 T dma_fence_get_rcu +ffffffff81965700 T dma_fence_get_rcu_safe +ffffffff81965740 T dma_fence_release +ffffffff81965770 T dma_fence_put +ffffffff819657e0 T dma_fence_signal_timestamp_locked +ffffffff819658b0 T dma_fence_signal +ffffffff819659f0 T dma_fence_signal_locked +ffffffff81965b20 T dma_fence_signal_timestamp +ffffffff81965c10 T dma_fence_is_signaled +ffffffff81965c80 T dma_fence_is_signaled_locked +ffffffff81965dd0 T dma_fence_wait_timeout +ffffffff81965e30 T dma_fence_default_wait +ffffffff819660e0 T dma_fence_wait +ffffffff81966140 T dma_fence_enable_sw_signaling +ffffffff819662c0 T dma_fence_init +ffffffff81966320 T dma_fence_add_callback +ffffffff81966520 T dma_fence_remove_callback +ffffffff819665a0 T dma_fence_context_alloc +ffffffff819665e0 t dma_fence_default_wait_cb +ffffffff81966610 T dma_fence_wait_any_timeout +ffffffff81966950 T dma_fence_get_stub +ffffffff81966b00 T dma_fence_allocate_private_stub +ffffffff81966ba0 T dma_fence_array_create +ffffffff81966cc0 t irq_dma_fence_array_work +ffffffff81966d50 T dma_fence_array_first +ffffffff81966db0 T dma_fence_array_next +ffffffff81966e10 t dma_fence_array_get_driver_name +ffffffff81966e40 t dma_fence_array_get_timeline_name +ffffffff81966e70 t dma_fence_array_enable_signaling +ffffffff81966f70 t dma_fence_array_signaled +ffffffff81966fc0 t dma_fence_array_release +ffffffff81967080 T dma_fence_chain_find_seqno +ffffffff819671a0 T dma_fence_chain_walk +ffffffff819673e0 T dma_fence_chain_init +ffffffff819674f0 t dma_fence_chain_get_driver_name +ffffffff81967520 t dma_fence_chain_get_timeline_name +ffffffff81967550 t dma_fence_chain_enable_signaling +ffffffff81967700 t dma_fence_chain_signaled +ffffffff819677f0 t dma_fence_chain_release +ffffffff81967930 T dma_fence_is_container +ffffffff81967980 T dmabuf_read +ffffffff819679b0 T dmabuf_write +ffffffff819679e0 T dmabuf_ioctl +ffffffff81967a10 T dmabuf_kqfilter +ffffffff81967a40 T dmabuf_stat +ffffffff81967b00 T dmabuf_close +ffffffff81967b70 T dmabuf_seek +ffffffff81967c00 T dma_buf_export +ffffffff81967cb0 T dma_buf_get +ffffffff81967d40 T dma_buf_put +ffffffff81967df0 T dma_buf_fd +ffffffff81967f10 T get_dma_buf +ffffffff81967f50 T pcie_get_speed_cap +ffffffff819680f0 T printk +ffffffff81968180 T pcie_get_width_cap +ffffffff81968270 T pcie_aspm_enabled +ffffffff81968300 T autoremove_wake_function +ffffffff81968380 T wait_on_bit +ffffffff81968450 T wait_on_bit_timeout +ffffffff81968520 T wake_up_bit +ffffffff81968560 T clear_and_wake_up_bit +ffffffff819685b0 T bit_waitqueue +ffffffff819685e0 T __var_waitqueue +ffffffff81968610 T drm_linux_init +ffffffff81968780 T drm_linux_exit +ffffffff819687e0 T pci_resize_resource +ffffffff81968940 T register_shrinker +ffffffff81968990 T unregister_shrinker +ffffffff819689f0 T drmbackoff +ffffffff81968a80 T bitmap_zalloc +ffffffff81968ab0 T bitmap_free +ffffffff81968ad0 T atomic_dec_and_mutex_lock +ffffffff81968b50 T interval_tree_iter_first +ffffffff81968c00 T interval_tree_remove +ffffffff81968c20 T interval_tree_insert +ffffffff81968c90 T syncfile_read +ffffffff81968cc0 T syncfile_write +ffffffff81968cf0 T syncfile_ioctl +ffffffff81968d20 T syncfile_kqfilter +ffffffff81968d50 T syncfile_stat +ffffffff81968e00 T syncfile_close +ffffffff81968ea0 T syncfile_seek +ffffffff81968f20 T fd_install +ffffffff81968ff0 T fput +ffffffff81969050 T get_unused_fd_flags +ffffffff81969160 T put_unused_fd +ffffffff819691f0 T sync_file_get_fence +ffffffff819692a0 T sync_file_create +ffffffff81969340 T drm_firmware_drivers_only +ffffffff81969370 t dma_fence_stub_get_name +ffffffff819693a0 t dma_fence_array_cb_func +ffffffff81969420 t dma_fence_chain_cb +ffffffff819694e0 t dma_fence_chain_timo +ffffffff8196a000 T drmm_kzalloc +ffffffff8196a100 T drmm_kcalloc +ffffffff8196a210 T drmm_kstrdup +ffffffff8196a350 T drmm_kfree +ffffffff8196a450 T drmm_add_action +ffffffff8196a510 T drmm_add_action_or_reset +ffffffff8196a5e0 T drm_managed_release +ffffffff8196a6a0 T drmm_add_final_kfree +ffffffff8196b000 T mipi_dsi_attach +ffffffff8196b050 T mipi_dsi_detach +ffffffff8196b0a0 T devm_mipi_dsi_attach +ffffffff8196b110 T mipi_dsi_packet_format_is_short +ffffffff8196b160 T mipi_dsi_packet_format_is_long +ffffffff8196b1b0 T mipi_dsi_create_packet +ffffffff8196b2c0 T mipi_dsi_shutdown_peripheral +ffffffff8196b370 T mipi_dsi_turn_on_peripheral +ffffffff8196b420 T mipi_dsi_set_maximum_return_packet_size +ffffffff8196b4d0 T mipi_dsi_compression_mode +ffffffff8196b580 T mipi_dsi_picture_parameter_set +ffffffff8196b630 T mipi_dsi_generic_write +ffffffff8196b6f0 T mipi_dsi_generic_read +ffffffff8196b7a0 T mipi_dsi_dcs_write_buffer +ffffffff8196b860 T mipi_dsi_dcs_write +ffffffff8196b9b0 T mipi_dsi_dcs_read +ffffffff8196ba50 T mipi_dsi_dcs_nop +ffffffff8196bb00 T mipi_dsi_dcs_soft_reset +ffffffff8196bbb0 T mipi_dsi_dcs_get_power_mode +ffffffff8196bc70 T mipi_dsi_dcs_get_pixel_format +ffffffff8196bd30 T mipi_dsi_dcs_enter_sleep_mode +ffffffff8196bde0 T mipi_dsi_dcs_exit_sleep_mode +ffffffff8196be90 T mipi_dsi_dcs_set_display_off +ffffffff8196bf40 T mipi_dsi_dcs_set_display_on +ffffffff8196bff0 T mipi_dsi_dcs_set_column_address +ffffffff8196c0b0 T mipi_dsi_dcs_set_page_address +ffffffff8196c170 T mipi_dsi_dcs_set_tear_off +ffffffff8196c220 T mipi_dsi_dcs_set_tear_on +ffffffff8196c2d0 T mipi_dsi_dcs_set_pixel_format +ffffffff8196d000 T __drm_mm_interval_first +ffffffff8196d0c0 T drm_mm_reserve_node +ffffffff8196d370 t add_hole +ffffffff8196d4d0 T drm_mm_insert_node_in_range +ffffffff8196dac0 T drm_mm_remove_node +ffffffff8196dbf0 T drm_mm_replace_node +ffffffff8196ddd0 T drm_mm_scan_init_with_range +ffffffff8196de50 T drm_mm_scan_add_block +ffffffff8196dfc0 T drm_mm_scan_remove_block +ffffffff8196e040 T drm_mm_scan_color_evict +ffffffff8196e120 T drm_mm_init +ffffffff8196e1d0 T drm_mm_takedown +ffffffff8196e210 T drm_mm_print +ffffffff8196f000 T drm_modeset_register_all +ffffffff8196f0a0 T drm_modeset_unregister_all +ffffffff8196f0e0 T drm_mode_getresources +ffffffff8196f390 T drm_mode_config_reset +ffffffff8196f4f0 T drmm_mode_config_init +ffffffff8196fb70 T drm_mode_config_cleanup +ffffffff8196feb0 t drm_mode_config_init_release +ffffffff8196fec0 T drm_mode_config_validate +ffffffff81971000 T __drm_mode_object_add +ffffffff81971100 T drm_mode_object_add +ffffffff819711e0 T drm_mode_object_register +ffffffff81971230 T drm_mode_object_unregister +ffffffff819712d0 T drm_mode_object_lease_required +ffffffff81971320 T __drm_mode_object_find +ffffffff819713d0 T drm_mode_object_find +ffffffff81971480 T drm_mode_object_put +ffffffff81971500 T drm_mode_object_get +ffffffff81971560 T drm_object_attach_property +ffffffff81971670 T drm_object_property_set_value +ffffffff81971750 T drm_object_property_get_value +ffffffff819717e0 t __drm_object_property_get_value +ffffffff819718c0 T drm_object_property_get_default_value +ffffffff81971990 T drm_mode_object_get_properties +ffffffff81971ae0 T drm_mode_obj_get_properties_ioctl +ffffffff81971d30 T drm_mode_obj_find_prop_id +ffffffff81971d90 T drm_mode_obj_set_property_ioctl +ffffffff81973000 T drm_mode_debug_printmodeline +ffffffff81973140 T drm_mode_vrefresh +ffffffff819731e0 T drm_mode_create +ffffffff81973200 T drm_mode_destroy +ffffffff81973240 T drm_mode_probed_add +ffffffff819732e0 T drm_cvt_mode +ffffffff81973790 T drm_mode_set_name +ffffffff819737e0 T drm_gtf_mode_complex +ffffffff81973ae0 T drm_gtf_mode +ffffffff81973b30 T drm_mode_get_hv_timing +ffffffff81973b80 T drm_mode_init +ffffffff81973c50 T drm_mode_set_crtcinfo +ffffffff81973e00 T drm_mode_copy +ffffffff81973e60 T drm_mode_duplicate +ffffffff81973ee0 T drm_mode_match +ffffffff81974080 T drm_mode_equal +ffffffff819740a0 T drm_mode_equal_no_clocks +ffffffff819740c0 T drm_mode_equal_no_clocks_no_stereo +ffffffff81974180 T drm_mode_validate_driver +ffffffff81974270 T drm_mode_validate_size +ffffffff819742c0 T drm_mode_validate_ycbcr420 +ffffffff81974330 T drm_mode_is_420_only +ffffffff81974380 T drm_get_mode_status_name +ffffffff81974400 T drm_mode_prune_invalid +ffffffff819746a0 T drm_mode_sort +ffffffff819746d0 t drm_mode_compare +ffffffff81974860 T drm_connector_list_update +ffffffff81974a30 T drm_mode_parse_command_line_for_connector +ffffffff81974a60 T drm_mode_create_from_cmdline_mode +ffffffff81974b50 T drm_mode_convert_to_umode +ffffffff81974ce0 T drm_mode_convert_umode +ffffffff81974f00 T drm_mode_is_420_also +ffffffff81974f50 T drm_mode_is_420 +ffffffff81975000 T drm_helper_move_panel_connectors_to_head +ffffffff819750f0 T drm_helper_mode_fill_fb_struct +ffffffff819751b0 T drm_crtc_init +ffffffff81975280 T drm_mode_config_helper_suspend +ffffffff81975310 T drm_mode_config_helper_resume +ffffffff81976000 T drm_modeset_lock_all +ffffffff819761e0 T drm_modeset_acquire_init +ffffffff81976270 T drm_modeset_lock_all_ctx +ffffffff819763e0 T drm_modeset_backoff +ffffffff819764b0 T drm_modeset_acquire_fini +ffffffff819764e0 T drm_warn_on_modeset_not_all_locked +ffffffff81976630 T drm_modeset_unlock_all +ffffffff81976710 T drm_modeset_drop_locks +ffffffff819767a0 T drm_modeset_unlock +ffffffff81976870 t modeset_lock +ffffffff81976b00 T drm_modeset_lock_init +ffffffff81976b60 T drm_modeset_lock +ffffffff81976bc0 T drm_modeset_lock_single_interruptible +ffffffff81976be0 t __ww_mutex_lock +ffffffff81977000 T drm_mtrr_add +ffffffff81977070 T drm_mtrr_del +ffffffff81978000 T drm_panel_init +ffffffff81978040 T drm_panel_add +ffffffff81978090 T drm_panel_remove +ffffffff819780f0 T drm_panel_prepare +ffffffff81978140 T drm_panel_unprepare +ffffffff81978190 T drm_panel_enable +ffffffff81978230 T drm_panel_disable +ffffffff819782c0 T drm_panel_get_modes +ffffffff81978310 T drm_panel_of_backlight +ffffffff81979000 T drm_get_panel_orientation_quirk +ffffffff8197a000 T drm_pci_set_busid +ffffffff8197a090 t kasprintf +ffffffff8197b000 T drm_universal_plane_init +ffffffff8197b0f0 t __drm_universal_plane_init +ffffffff8197b7e0 T __drmm_universal_plane_alloc +ffffffff8197b920 t drmm_universal_plane_alloc_release +ffffffff8197b970 T __drm_universal_plane_alloc +ffffffff8197bab0 T drm_plane_register_all +ffffffff8197bba0 T drm_plane_unregister_all +ffffffff8197bc10 T drm_plane_cleanup +ffffffff8197bd60 T drm_plane_from_index +ffffffff8197bdc0 T drm_plane_force_disable +ffffffff8197bed0 T drm_mode_plane_set_obj_prop +ffffffff8197bf50 T drm_mode_getplane_res +ffffffff8197c050 T drm_mode_getplane +ffffffff8197c1b0 T drm_plane_check_pixel_format +ffffffff8197c270 T drm_any_plane_has_format +ffffffff8197c3b0 T drm_mode_setplane +ffffffff8197c710 T drm_mode_cursor_ioctl +ffffffff8197c780 t drm_mode_cursor_common +ffffffff8197ce00 T drm_mode_cursor2_ioctl +ffffffff8197ce20 T drm_mode_page_flip_ioctl +ffffffff8197d390 T drm_plane_enable_fb_damage_clips +ffffffff8197d3b0 T drm_plane_get_damage_clips_count +ffffffff8197d3f0 T __drm_plane_get_damage_clips +ffffffff8197d430 T drm_plane_get_damage_clips +ffffffff8197d4d0 T drm_create_scaling_filter_prop +ffffffff8197d620 T drm_plane_create_scaling_filter_property +ffffffff8197d690 t kasprintf +ffffffff8197d760 t __setplane_internal +ffffffff8197d950 t __setplane_check +ffffffff8197e000 T drm_plane_helper_update_primary +ffffffff8197e4b0 t get_connectors_for_crtc +ffffffff8197e5c0 T drm_plane_helper_disable_primary +ffffffff8197e670 T drm_plane_helper_destroy +ffffffff8197e6a0 T drm_plane_helper_atomic_check +ffffffff8197f000 T drm_prime_remove_buf_handle +ffffffff8197f090 T drm_prime_init_file_private +ffffffff8197f0f0 T drm_prime_destroy_file_private +ffffffff8197f150 T drm_gem_dmabuf_export +ffffffff8197f1b0 T drm_gem_dmabuf_release +ffffffff8197f1f0 T drm_gem_prime_fd_to_handle +ffffffff8197f400 T drm_gem_prime_import +ffffffff8197f460 t drm_prime_add_buf_handle +ffffffff8197f5b0 T drm_prime_fd_to_handle_ioctl +ffffffff8197f600 T drm_gem_prime_handle_to_fd +ffffffff8197f830 T drm_prime_handle_to_fd_ioctl +ffffffff8197f890 T drm_gem_map_attach +ffffffff8197f8b0 T drm_gem_map_detach +ffffffff8197f8d0 T drm_gem_dmabuf_vmap +ffffffff8197f8f0 T drm_gem_dmabuf_vunmap +ffffffff8197f910 T drm_gem_prime_mmap +ffffffff8197f960 T drm_prime_pages_to_sg +ffffffff8197f9b0 T drm_prime_get_contiguous_size +ffffffff8197fa00 T drm_gem_prime_export +ffffffff8197fa90 T drm_gem_prime_import_dev +ffffffff8197faf0 T drm_prime_sg_to_page_array +ffffffff8197fb40 T drm_prime_sg_to_dma_addr_array +ffffffff8197fb90 T drm_prime_gem_destroy +ffffffff81980000 T __drm_puts_coredump +ffffffff819800f0 T __drm_printfn_coredump +ffffffff81980210 T __drm_puts_seq_file +ffffffff81980240 T __drm_printfn_seq_file +ffffffff81980270 T __drm_printfn_info +ffffffff819802a0 T __drm_printfn_debug +ffffffff819802d0 T __drm_printfn_err +ffffffff81980310 T drm_puts +ffffffff81980340 T drm_printf +ffffffff819803c0 T drm_print_bits +ffffffff819805e0 T drm_dev_printk +ffffffff81980680 T __drm_dev_dbg +ffffffff81980710 T ___drm_dbg +ffffffff819807a0 T __drm_err +ffffffff81980830 T drm_print_regset32 +ffffffff81981000 T drm_crtc_mode_valid +ffffffff81981050 T drm_encoder_mode_valid +ffffffff81981090 T drm_connector_mode_valid +ffffffff81981110 T drm_kms_helper_poll_enable +ffffffff81981200 T drm_helper_probe_detect +ffffffff819813f0 T drm_helper_probe_single_connector_modes +ffffffff819819b0 t __drm_helper_update_and_validate +ffffffff81981d60 T drm_kms_helper_hotplug_event +ffffffff81981da0 T drm_kms_helper_connector_hotplug_event +ffffffff81981de0 T drm_kms_helper_is_poll_worker +ffffffff81981e10 T drm_kms_helper_poll_disable +ffffffff81981e90 T drm_kms_helper_poll_init +ffffffff81981ef0 t output_poll_execute +ffffffff81982180 T drm_kms_helper_poll_fini +ffffffff81982200 T drm_connector_helper_hpd_irq_event +ffffffff819822d0 t check_connector_changed +ffffffff819824b0 T drm_helper_hpd_irq_event +ffffffff81982600 T drm_crtc_helper_mode_valid_fixed +ffffffff81982650 T drm_connector_helper_get_modes_from_ddc +ffffffff819826e0 T drm_connector_helper_get_modes_fixed +ffffffff81982850 T drm_connector_helper_get_modes +ffffffff819828b0 t __delayed_work_tick +ffffffff81983000 T drm_property_create +ffffffff81983200 T drm_property_create_enum +ffffffff819832b0 T drm_property_add_enum +ffffffff819834d0 T drm_property_destroy +ffffffff81983580 T drm_property_create_bitmask +ffffffff819836b0 T drm_property_create_range +ffffffff81983720 T drm_property_create_signed_range +ffffffff81983790 T drm_property_create_object +ffffffff81983830 T drm_property_create_bool +ffffffff81983890 T drm_mode_getproperty_ioctl +ffffffff81983aa0 T drm_property_create_blob +ffffffff81983be0 t drm_property_free_blob +ffffffff81983c60 T drm_property_blob_put +ffffffff81983ca0 T drm_property_destroy_user_blobs +ffffffff81983d20 T drm_property_blob_get +ffffffff81983d60 T drm_property_lookup_blob +ffffffff81983d80 T drm_property_replace_global_blob +ffffffff81983ed0 T drm_property_replace_blob +ffffffff81983f40 T drm_mode_getblob_ioctl +ffffffff81984000 T drm_mode_createblob_ioctl +ffffffff81984100 T drm_mode_destroyblob_ioctl +ffffffff81984210 T drm_property_change_valid_get +ffffffff81984460 T drm_property_change_valid_put +ffffffff81985000 T drm_rect_intersect +ffffffff81985080 T drm_rect_clip_scaled +ffffffff819852f0 T drm_rect_calc_hscale +ffffffff819853c0 T drm_rect_calc_vscale +ffffffff81985490 T drm_rect_debug_print +ffffffff819855b0 T drm_rect_rotate +ffffffff81985670 T drm_rect_rotate_inv +ffffffff81986000 T drm_self_refresh_helper_update_avg_times +ffffffff81986140 T drm_self_refresh_helper_alter_state +ffffffff819862d0 T drm_self_refresh_helper_init +ffffffff81986480 t drm_self_refresh_helper_entry_work +ffffffff819865e0 T drm_self_refresh_helper_cleanup +ffffffff81986660 t __delayed_work_tick +ffffffff81987000 T drm_syncobj_find +ffffffff81987070 T drm_syncobj_add_point +ffffffff81987160 t syncobj_wait_syncobj_func +ffffffff81987210 T drm_syncobj_replace_fence +ffffffff819872a0 T drm_syncobj_find_fence +ffffffff81987600 t drm_syncobj_fence_add_wait +ffffffff819876d0 T drm_syncobj_free +ffffffff81987760 T drm_syncobj_create +ffffffff81987970 T drm_syncobj_get_handle +ffffffff81987a90 T drm_syncobj_get_fd +ffffffff81987ae0 T drm_syncobj_open +ffffffff81987b10 T drm_syncobj_release +ffffffff81987b50 t drm_syncobj_release_handle +ffffffff81987c00 T drm_syncobj_create_ioctl +ffffffff81987d30 T drm_syncobj_destroy_ioctl +ffffffff81987e50 T drm_syncobj_handle_to_fd_ioctl +ffffffff81988040 T drm_syncobj_fd_to_handle_ioctl +ffffffff81988230 T drm_syncobj_transfer_ioctl +ffffffff81988650 T drm_timeout_abs_to_jiffies +ffffffff81988730 T drm_syncobj_wait_ioctl +ffffffff819888c0 t drm_syncobj_array_find +ffffffff81988af0 t drm_syncobj_array_free +ffffffff81988bd0 T drm_syncobj_timeline_wait_ioctl +ffffffff81988d60 T drm_syncobj_reset_ioctl +ffffffff81988ec0 T drm_syncobj_signal_ioctl +ffffffff81989050 T drm_syncobj_timeline_signal_ioctl +ffffffff81989280 T drm_syncobj_query_ioctl +ffffffff81989480 t drm_syncobj_array_wait_timeout +ffffffff819898f0 t syncobj_wait_fence_func +ffffffff8198a000 T drm_vblank_count +ffffffff8198a090 T drm_crtc_accurate_vblank_count +ffffffff8198a1a0 t drm_update_vblank_count +ffffffff8198a5f0 T drm_vblank_disable_and_save +ffffffff8198a740 T drm_vblank_init +ffffffff8198a8c0 t vblank_disable_fn +ffffffff8198a940 t drm_vblank_init_release +ffffffff8198a9d0 T drm_dev_has_vblank +ffffffff8198aa00 T drm_crtc_vblank_waitqueue +ffffffff8198aa50 T drm_calc_timestamping_constants +ffffffff8198ac80 T drm_crtc_vblank_helper_get_vblank_timestamp_internal +ffffffff8198b1b0 T drm_crtc_vblank_helper_get_vblank_timestamp +ffffffff8198b1d0 T drm_crtc_vblank_count +ffffffff8198b260 T drm_crtc_vblank_count_and_time +ffffffff8198b320 T drm_crtc_arm_vblank_event +ffffffff8198b400 T drm_crtc_send_vblank_event +ffffffff8198b5b0 T drm_vblank_get +ffffffff8198b6d0 t drm_vblank_enable +ffffffff8198b890 T drm_crtc_vblank_get +ffffffff8198b9a0 T drm_vblank_put +ffffffff8198bad0 T drm_crtc_vblank_put +ffffffff8198baf0 T drm_wait_one_vblank +ffffffff8198bf40 T drm_crtc_wait_one_vblank +ffffffff8198bf60 T drm_crtc_vblank_off +ffffffff8198c350 T drm_crtc_vblank_reset +ffffffff8198c480 T drm_crtc_set_max_vblank_count +ffffffff8198c560 T drm_crtc_vblank_on +ffffffff8198c6b0 t drm_reset_vblank_timestamp +ffffffff8198c8b0 T drm_crtc_vblank_restore +ffffffff8198cc90 T drm_legacy_modeset_ctl_ioctl +ffffffff8198ceb0 T drm_wait_vblank_ioctl +ffffffff8198d8f0 T drm_handle_vblank +ffffffff8198dbe0 t drm_handle_vblank_events +ffffffff8198de70 T drm_crtc_handle_vblank +ffffffff8198de90 T drm_crtc_get_sequence_ioctl +ffffffff8198e080 T drm_crtc_queue_sequence_ioctl +ffffffff8198e450 t __get_vblank_counter +ffffffff8198f000 T drm_handle_vblank_works +ffffffff8198f1b0 T drm_vblank_cancel_pending_works +ffffffff8198f2f0 T drm_vblank_work_schedule +ffffffff8198f570 T drm_vblank_work_cancel_sync +ffffffff8198f6d0 T drm_vblank_work_flush +ffffffff8198f7a0 T drm_vblank_work_init +ffffffff8198f810 T drm_vblank_worker_init +ffffffff81990000 T drm_vma_offset_manager_init +ffffffff81990040 T drm_vma_offset_manager_destroy +ffffffff81990060 T drm_vma_offset_lookup_locked +ffffffff819900f0 T drm_vma_offset_add +ffffffff81990180 T drm_vma_offset_remove +ffffffff819901d0 T drm_vma_node_allow +ffffffff819901f0 t vma_node_allow +ffffffff81990320 T drm_vma_node_allow_once +ffffffff81990340 T drm_vma_node_revoke +ffffffff819903c0 T drm_vma_node_is_allowed +ffffffff81991000 T hdmi_avi_infoframe_init +ffffffff81991080 T hdmi_avi_infoframe_check +ffffffff819910d0 T hdmi_avi_infoframe_pack_only +ffffffff819912d0 T hdmi_avi_infoframe_pack +ffffffff81991330 T hdmi_spd_infoframe_init +ffffffff819913f0 T hdmi_spd_infoframe_check +ffffffff81991440 T hdmi_spd_infoframe_pack_only +ffffffff81991570 T hdmi_spd_infoframe_pack +ffffffff819916d0 T hdmi_audio_infoframe_init +ffffffff81991720 T hdmi_audio_infoframe_check +ffffffff81991770 T hdmi_audio_infoframe_pack_only +ffffffff819918c0 T hdmi_audio_infoframe_pack +ffffffff81991910 T hdmi_audio_infoframe_pack_for_dp +ffffffff81991a00 T hdmi_vendor_infoframe_init +ffffffff81991a60 T hdmi_vendor_infoframe_check +ffffffff81991b00 T hdmi_vendor_infoframe_pack_only +ffffffff81991cd0 T hdmi_vendor_infoframe_pack +ffffffff81991d70 T hdmi_drm_infoframe_init +ffffffff81991dd0 T hdmi_drm_infoframe_check +ffffffff81991e20 T hdmi_drm_infoframe_pack_only +ffffffff81991ff0 T hdmi_drm_infoframe_pack +ffffffff81992040 T hdmi_infoframe_check +ffffffff819921a0 T hdmi_infoframe_pack_only +ffffffff819923c0 T hdmi_infoframe_pack +ffffffff81992530 T hdmi_infoframe_log +ffffffff819934d0 T hdmi_drm_infoframe_unpack_only +ffffffff819935b0 T hdmi_infoframe_unpack +ffffffff81994000 T list_sort +ffffffff81995000 T radix_tree_lookup +ffffffff819950b0 T radix_tree_iter_find +ffffffff819951a0 T radix_tree_delete +ffffffff81995340 T radix_tree_iter_delete +ffffffff81995360 T radix_tree_insert +ffffffff81996000 T sort +ffffffff81996040 t qsort +ffffffff81998000 T drm_dp_dual_mode_read +ffffffff81998110 T drm_dp_dual_mode_write +ffffffff819981f0 T drm_dp_dual_mode_detect +ffffffff819984a0 T drm_dp_dual_mode_max_tmds_clock +ffffffff819985d0 T drm_dp_dual_mode_get_tmds_output +ffffffff81998700 T drm_dp_dual_mode_set_tmds_output +ffffffff81998990 T drm_dp_get_dual_mode_type_name +ffffffff81998a00 T drm_lspcon_get_mode +ffffffff81998bb0 T drm_lspcon_set_mode +ffffffff81999000 T drm_dp_channel_eq_ok +ffffffff81999080 T drm_dp_clock_recovery_ok +ffffffff81999100 T drm_dp_get_adjust_request_voltage +ffffffff81999140 T drm_dp_get_adjust_request_pre_emphasis +ffffffff81999190 T drm_dp_get_adjust_tx_ffe_preset +ffffffff819991d0 T drm_dp_128b132b_lane_channel_eq_done +ffffffff81999250 T drm_dp_128b132b_lane_symbol_locked +ffffffff819992c0 T drm_dp_128b132b_eq_interlane_align_done +ffffffff819992f0 T drm_dp_128b132b_cds_interlane_align_done +ffffffff81999320 T drm_dp_128b132b_link_training_failed +ffffffff81999350 T drm_dp_read_clock_recovery_delay +ffffffff81999450 T drm_dp_read_channel_eq_delay +ffffffff81999550 T drm_dp_128b132b_read_aux_rd_interval +ffffffff81999600 T drm_dp_link_train_clock_recovery_delay +ffffffff81999690 t __8b10b_clock_recovery_delay_us +ffffffff81999710 T drm_dp_link_train_channel_eq_delay +ffffffff81999790 T drm_dp_phy_name +ffffffff819997d0 T drm_dp_lttpr_link_train_clock_recovery_delay +ffffffff819997f0 T drm_dp_lttpr_link_train_channel_eq_delay +ffffffff81999860 T drm_dp_link_rate_to_bw_code +ffffffff819998d0 T drm_dp_bw_code_to_link_rate +ffffffff81999930 T drm_dp_dpcd_probe +ffffffff81999a70 t drm_dp_dpcd_access +ffffffff81999ba0 T drm_dp_dpcd_read +ffffffff81999cd0 T drm_dp_dpcd_write +ffffffff81999de0 T drm_dp_dpcd_read_link_status +ffffffff81999e00 T drm_dp_dpcd_read_phy_link_status +ffffffff81999f00 T drm_dp_downstream_is_type +ffffffff81999f40 T drm_dp_downstream_is_tmds +ffffffff81999fb0 T drm_dp_send_real_edid_checksum +ffffffff8199a210 T drm_dp_read_dpcd_caps +ffffffff8199a3a0 T drm_dp_read_downstream_info +ffffffff8199a4a0 T drm_dp_downstream_max_dotclock +ffffffff8199a4f0 T drm_dp_downstream_max_tmds_clock +ffffffff8199a590 T drm_dp_downstream_min_tmds_clock +ffffffff8199a610 T drm_dp_downstream_max_bpc +ffffffff8199a6b0 T drm_dp_downstream_420_passthrough +ffffffff8199a710 T drm_dp_downstream_444_to_420_conversion +ffffffff8199a770 T drm_dp_downstream_rgb_to_ycbcr_conversion +ffffffff8199a7d0 T drm_dp_downstream_mode +ffffffff8199a860 T drm_dp_downstream_id +ffffffff8199a880 T drm_dp_downstream_debug +ffffffff8199a920 T drm_dp_subconnector_type +ffffffff8199a990 T drm_dp_set_subconnector_property +ffffffff8199aa00 T drm_dp_read_sink_count_cap +ffffffff8199aa50 T drm_dp_read_sink_count +ffffffff8199aab0 T drm_dp_remote_aux_init +ffffffff8199aae0 t drm_dp_aux_crc_work +ffffffff8199ac60 T drm_dp_aux_init +ffffffff8199ad10 T drm_dp_aux_register +ffffffff8199ae30 T drm_dp_aux_unregister +ffffffff8199ae60 T drm_dp_psr_setup_time +ffffffff8199aeb0 T drm_dp_start_crc +ffffffff8199af60 T drm_dp_stop_crc +ffffffff8199aff0 T drm_dp_read_desc +ffffffff8199b1b0 T drm_dp_dsc_sink_max_slice_count +ffffffff8199b240 T drm_dp_dsc_sink_line_buf_depth +ffffffff8199b280 T drm_dp_dsc_sink_supported_input_bpcs +ffffffff8199b2f0 T drm_dp_read_lttpr_common_caps +ffffffff8199b3b0 T drm_dp_read_lttpr_phy_caps +ffffffff8199b470 T drm_dp_lttpr_count +ffffffff8199b500 T drm_dp_lttpr_max_link_rate +ffffffff8199b560 T drm_dp_lttpr_max_lane_count +ffffffff8199b590 T drm_dp_lttpr_voltage_swing_level_3_supported +ffffffff8199b5c0 T drm_dp_lttpr_pre_emphasis_level_3_supported +ffffffff8199b5f0 T drm_dp_get_phy_test_pattern +ffffffff8199b710 T drm_dp_set_phy_test_pattern +ffffffff8199b7e0 T drm_dp_vsc_sdp_log +ffffffff8199bb10 T drm_dp_get_pcon_max_frl_bw +ffffffff8199bb60 T drm_dp_pcon_frl_prepare +ffffffff8199bbb0 T drm_dp_pcon_is_frl_ready +ffffffff8199bc00 T drm_dp_pcon_frl_configure_1 +ffffffff8199bd00 T drm_dp_pcon_frl_configure_2 +ffffffff8199bd60 T drm_dp_pcon_reset_frl_config +ffffffff8199bdb0 T drm_dp_pcon_frl_enable +ffffffff8199be70 T drm_dp_pcon_hdmi_link_active +ffffffff8199bec0 T drm_dp_pcon_hdmi_link_mode +ffffffff8199bf30 T drm_dp_pcon_hdmi_frl_link_error_count +ffffffff8199c030 T drm_dp_pcon_enc_is_dsc_1_2 +ffffffff8199c060 T drm_dp_pcon_dsc_max_slices +ffffffff8199c0f0 T drm_dp_pcon_dsc_max_slice_width +ffffffff8199c120 T drm_dp_pcon_dsc_bpp_incr +ffffffff8199c160 T drm_dp_pcon_pps_default +ffffffff8199c1f0 T drm_dp_pcon_pps_override_buf +ffffffff8199c2a0 T drm_dp_pcon_pps_override_param +ffffffff8199c380 T drm_dp_pcon_convert_rgb_to_ycbcr +ffffffff8199c420 T drm_edp_backlight_set_level +ffffffff8199c500 T drm_edp_backlight_enable +ffffffff8199c710 t drm_edp_backlight_set_enable +ffffffff8199c850 T drm_edp_backlight_disable +ffffffff8199c890 T drm_edp_backlight_init +ffffffff8199cde0 T drm_panel_dp_aux_backlight +ffffffff8199cf70 t __128b132b_channel_eq_delay_us +ffffffff8199cff0 t __8b10b_channel_eq_delay_us +ffffffff8199d070 t drm_dp_aux_get_crc +ffffffff8199d140 t drm_dp_i2c_xfer +ffffffff8199d390 t drm_dp_i2c_functionality +ffffffff8199d3c0 t drm_dp_i2c_do_msg +ffffffff8199d7a0 t lock_bus +ffffffff8199d7c0 t trylock_bus +ffffffff8199d810 t unlock_bus +ffffffff8199d830 t dp_aux_backlight_update_status +ffffffff8199e000 T drm_dp_encode_sideband_req +ffffffff8199e420 T drm_dp_decode_sideband_req +ffffffff8199e970 T drm_dp_dump_sideband_msg_req_body +ffffffff8199ed30 T drm_dp_mst_get_port_malloc +ffffffff8199ed80 T drm_dp_mst_put_port_malloc +ffffffff8199ee80 t kref_put +ffffffff8199eec0 T drm_atomic_get_mst_payload_state +ffffffff8199ef20 T drm_dp_mst_dpcd_read +ffffffff8199f1e0 T drm_dp_mst_dpcd_write +ffffffff8199f230 t drm_dp_send_dpcd_write +ffffffff8199f470 T drm_dp_mst_connector_late_register +ffffffff8199f4f0 T drm_dp_mst_connector_early_unregister +ffffffff8199f530 T drm_dp_send_power_updown_phy +ffffffff8199f770 t drm_dp_mst_topology_put_port +ffffffff8199f8a0 t drm_dp_mst_wait_tx_reply +ffffffff8199fbf0 T drm_dp_send_query_stream_enc_status +ffffffff8199feb0 T drm_dp_add_payload_part1 +ffffffff819a0060 T drm_dp_remove_payload +ffffffff819a0200 T drm_dp_add_payload_part2 +ffffffff819a03c0 T drm_dp_get_vc_payload_bw +ffffffff819a0460 T drm_dp_read_mst_cap +ffffffff819a04c0 T drm_dp_mst_topology_mgr_set_mst +ffffffff819a0780 t drm_dp_dpcd_write_payload +ffffffff819a0910 t drm_dp_mst_topology_put_mstb +ffffffff819a0a10 T drm_dp_mst_topology_mgr_suspend +ffffffff819a0ad0 t drm_dp_mst_topology_mgr_invalidate_mstb +ffffffff819a0b40 T drm_dp_mst_topology_mgr_resume +ffffffff819a0d80 T drm_dp_mst_hpd_irq +ffffffff819a1bf0 T drm_dp_mst_detect_port +ffffffff819a1d70 T drm_dp_mst_get_edid +ffffffff819a1e80 T drm_dp_atomic_find_time_slots +ffffffff819a2150 T drm_atomic_get_mst_topology_state +ffffffff819a2160 T drm_dp_atomic_release_time_slots +ffffffff819a2380 T drm_dp_mst_atomic_setup_commit +ffffffff819a2510 T drm_dp_mst_atomic_wait_for_dependencies +ffffffff819a2690 T drm_dp_mst_root_conn_atomic_check +ffffffff819a27b0 T drm_dp_mst_update_slots +ffffffff819a2810 T drm_dp_check_act_status +ffffffff819a29c0 T drm_dp_calc_pbn_mode +ffffffff819a2a30 T drm_dp_mst_dump_topology +ffffffff819a2c80 t drm_dp_mst_dump_mstb +ffffffff819a2cf0 T drm_dp_mst_add_affected_dsc_crtcs +ffffffff819a2e20 T drm_dp_mst_dsc_aux_for_port +ffffffff819a3050 T drm_dp_mst_atomic_enable_dsc +ffffffff819a31f0 T drm_dp_mst_atomic_check +ffffffff819a34e0 t drm_dp_mst_atomic_check_mstb_bw_limit +ffffffff819a37b0 t drm_dp_mst_duplicate_state +ffffffff819a3980 t drm_dp_mst_destroy_state +ffffffff819a3a40 T drm_atomic_get_old_mst_topology_state +ffffffff819a3a50 T drm_atomic_get_new_mst_topology_state +ffffffff819a3a60 T drm_dp_mst_topology_mgr_init +ffffffff819a3cd0 t drm_dp_mst_link_probe_work +ffffffff819a3f70 t drm_dp_tx_work +ffffffff819a3fc0 t drm_dp_delayed_destroy_work +ffffffff819a43e0 t drm_dp_mst_up_req_work +ffffffff819a48f0 T drm_dp_mst_topology_mgr_destroy +ffffffff819a4980 t drm_dp_mst_is_virtual_dpcd +ffffffff819a4a60 t drm_dp_free_mst_branch_device +ffffffff819a4aa0 t drm_dp_mst_topology_get_port_validated_locked +ffffffff819a4b20 t drm_dp_mst_dump_sideband_msg_tx +ffffffff819a4d30 t process_single_down_tx_qlock +ffffffff819a4ea0 t process_single_tx_qlock +ffffffff819a5380 t drm_dp_msg_data_crc4 +ffffffff819a54a0 t drm_dp_payload_send_msg +ffffffff819a58f0 t drm_dp_mst_topology_get_mstb_validated_locked +ffffffff819a5970 t drm_dp_get_one_sb_msg +ffffffff819a6090 t drm_dp_get_mst_branch_device +ffffffff819a6200 t drm_dp_check_and_send_link_address +ffffffff819a62d0 t drm_dp_send_link_address +ffffffff819a6f80 t drm_dp_send_enum_path_resources +ffffffff819a71e0 t drm_dp_port_set_pdt +ffffffff819a74c0 t drm_dp_mst_port_add_connector +ffffffff819a76a0 t drm_dp_mst_i2c_xfer +ffffffff819a7da0 t drm_dp_mst_i2c_functionality +ffffffff819a7dd0 t get_mst_branch_device_by_guid_helper +ffffffff819a8000 T drm_dsc_dp_pps_header_init +ffffffff819a8030 T drm_dsc_dp_rc_buffer_size +ffffffff819a8090 T drm_dsc_pps_payload_pack +ffffffff819a8330 T drm_dsc_compute_rc_parameters +ffffffff819a9000 T drm_connector_attach_content_protection_property +ffffffff819a9030 T drm_hdcp_check_ksvs_revoked +ffffffff819a9080 T drm_hdcp_update_content_protection +ffffffff819aa000 T drm_hdmi_infoframe_set_hdr_metadata +ffffffff819aa120 T drm_hdmi_avi_infoframe_colorimetry +ffffffff819aa170 T drm_hdmi_avi_infoframe_bars +ffffffff819aa1c0 T drm_hdmi_avi_infoframe_content_type +ffffffff819ab000 T drm_scdc_read +ffffffff819ab090 T drm_scdc_write +ffffffff819ab170 T drm_scdc_get_scrambling_status +ffffffff819ab230 T drm_scdc_set_scrambling +ffffffff819ab380 T drm_scdc_set_high_tmds_clock_ratio +ffffffff819ac000 T drm_gem_ttm_mmap +ffffffff819ac070 T drm_gem_ttm_vmap +ffffffff819ac080 T drm_gem_ttm_vunmap +ffffffff819ad000 T ttm_agp_bind +ffffffff819ad050 T ttm_agp_unbind +ffffffff819ad070 T ttm_agp_is_bound +ffffffff819ad0c0 T ttm_agp_destroy +ffffffff819ad0e0 T ttm_agp_tt_create +ffffffff819ae000 T ttm_bo_move_to_lru_tail +ffffffff819ae040 T ttm_bo_set_bulk_move +ffffffff819ae100 T ttm_bo_delayed_delete +ffffffff819ae3f0 t ttm_bo_cleanup_refs +ffffffff819ae7a0 T ttm_bo_put +ffffffff819aece0 T ttm_bo_lock_delayed_workqueue +ffffffff819aed60 T ttm_bo_unlock_delayed_workqueue +ffffffff819aedd0 T ttm_bo_eviction_valuable +ffffffff819aee20 T ttm_mem_evict_first +ffffffff819af6e0 T ttm_bo_pin +ffffffff819af780 T ttm_bo_unpin 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ttm_bo_vm_fault_reserved +ffffffff819b3570 T ttm_bo_vm_fault +ffffffff819b36d0 T ttm_bo_vm_reference +ffffffff819b3700 T ttm_bo_vm_detach +ffffffff819b3710 T ttm_bo_mmap_obj +ffffffff819b4000 T ttm_global_swapout +ffffffff819b4100 T ttm_device_swapout +ffffffff819b4220 T ttm_device_init +ffffffff819b4470 t ttm_device_delayed_workqueue +ffffffff819b4510 T ttm_device_fini +ffffffff819b46f0 T ttm_device_clear_dma_mappings +ffffffff819b47a0 t ttm_device_clear_lru_dma_mappings +ffffffff819b4850 t __delayed_work_tick +ffffffff819b5000 T ttm_eu_backoff_reservation +ffffffff819b5130 T ttm_eu_reserve_buffers +ffffffff819b5530 T ttm_eu_fence_buffer_objects +ffffffff819b5680 t __ww_mutex_lock +ffffffff819b6000 T ttm_prot_from_caching +ffffffff819b7000 T ttm_pool_alloc +ffffffff819b77c0 T ttm_pool_free +ffffffff819b7be0 T ttm_pool_init +ffffffff819b7e90 T ttm_pool_fini +ffffffff819b8060 t ttm_pool_type_fini +ffffffff819b82a0 T ttm_pool_mgr_init +ffffffff819b8580 t ttm_pool_shrinker_count +ffffffff819b85d0 t ttm_pool_shrinker_scan +ffffffff819b87e0 T ttm_pool_mgr_fini +ffffffff819b9000 T ttm_range_man_init_nocheck +ffffffff819b9180 T ttm_range_man_fini_nocheck +ffffffff819b9310 t ttm_range_man_alloc +ffffffff819b9450 t ttm_range_man_free +ffffffff819b94b0 t ttm_range_man_intersects +ffffffff819b9510 t ttm_range_man_compatible +ffffffff819b9570 t ttm_range_man_debug +ffffffff819ba000 T ttm_lru_bulk_move_init +ffffffff819ba020 T ttm_lru_bulk_move_tail +ffffffff819ba1e0 T ttm_resource_add_bulk_move +ffffffff819ba2a0 T ttm_resource_del_bulk_move +ffffffff819ba390 T ttm_resource_move_to_lru_tail +ffffffff819ba4e0 T ttm_resource_init +ffffffff819ba5e0 T ttm_resource_fini +ffffffff819ba650 T ttm_resource_alloc +ffffffff819ba790 T ttm_resource_free +ffffffff819ba900 T ttm_resource_intersects +ffffffff819ba960 T ttm_resource_compatible +ffffffff819ba9c0 T ttm_resource_compat +ffffffff819bab50 T ttm_resource_set_bo +ffffffff819baba0 T ttm_resource_manager_init +ffffffff819bac50 T ttm_resource_manager_evict_all +ffffffff819bae20 T ttm_resource_manager_usage +ffffffff819bae80 T ttm_resource_manager_debug +ffffffff819baf70 T ttm_resource_manager_first +ffffffff819bb000 T ttm_resource_manager_next +ffffffff819bb140 T ttm_kmap_iter_iomap_init +ffffffff819bb1a0 T ttm_kmap_iter_linear_io_init +ffffffff819bb370 T ttm_kmap_iter_linear_io_fini +ffffffff819bb3c0 T ttm_resource_manager_create_debugfs +ffffffff819bb3f0 t ttm_kmap_iter_iomap_map_local +ffffffff819bb530 t ttm_kmap_iter_iomap_unmap_local +ffffffff819bb550 t ttm_kmap_iter_linear_io_map_local +ffffffff819bc000 T ttm_sys_man_init +ffffffff819bc130 t ttm_sys_man_alloc +ffffffff819bc1b0 t ttm_sys_man_free +ffffffff819bd000 T ttm_tt_create +ffffffff819bd100 T ttm_tt_destroy +ffffffff819bd120 T ttm_tt_init +ffffffff819bd1f0 T ttm_tt_fini +ffffffff819bd2d0 T ttm_sg_tt_init +ffffffff819bd4f0 T ttm_tt_swapin +ffffffff819bd600 T ttm_tt_swapout +ffffffff819bd650 T ttm_tt_populate +ffffffff819bd820 T ttm_tt_unpopulate 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drm_sched_fence_finished +ffffffff819bf0b0 T drm_sched_fence_free +ffffffff819bf160 T to_drm_sched_fence +ffffffff819bf1c0 T drm_sched_fence_alloc +ffffffff819bf240 T drm_sched_fence_init +ffffffff819bf2c0 t drm_sched_fence_get_driver_name +ffffffff819bf2f0 t drm_sched_fence_get_timeline_name +ffffffff819bf340 t drm_sched_fence_release_scheduled +ffffffff819bf440 t drm_sched_fence_release_finished +ffffffff819c0000 T drm_sched_rq_add_entity +ffffffff819c0090 T drm_sched_rq_remove_entity +ffffffff819c0130 T drm_sched_dependency_optimized +ffffffff819c01d0 T drm_sched_fault +ffffffff819c0200 T drm_sched_suspend_timeout +ffffffff819c0280 T drm_sched_resume_timeout +ffffffff819c0320 T drm_sched_increase_karma +ffffffff819c0340 T drm_sched_increase_karma_ext +ffffffff819c0490 T drm_sched_reset_karma +ffffffff819c04b0 T drm_sched_stop +ffffffff819c0680 T drm_sched_start +ffffffff819c0790 t drm_sched_job_done_cb +ffffffff819c07b0 t drm_sched_job_done +ffffffff819c0880 T drm_sched_resubmit_jobs +ffffffff819c09e0 T drm_sched_resubmit_jobs_ext +ffffffff819c0b40 T drm_sched_job_init +ffffffff819c0bd0 T drm_sched_job_arm +ffffffff819c0c60 T drm_sched_job_add_dependency +ffffffff819c0dd0 T drm_sched_job_add_implicit_dependencies +ffffffff819c0e90 T drm_sched_job_cleanup +ffffffff819c0f40 T drm_sched_wakeup +ffffffff819c1010 T drm_sched_pick_best +ffffffff819c10c0 T drm_sched_init +ffffffff819c1340 t drm_sched_job_timedout +ffffffff819c14a0 t drm_sched_main +ffffffff819c18d0 T drm_sched_fini +ffffffff819c1ae0 t __delayed_work_tick +ffffffff819c1b00 t drm_sched_get_cleanup_job +ffffffff819c1c40 t drm_sched_select_entity +ffffffff819c2000 t ch7017_init +ffffffff819c2140 t ch7017_dpms +ffffffff819c2380 t ch7017_mode_valid +ffffffff819c23c0 t ch7017_mode_set +ffffffff819c2680 t ch7017_detect +ffffffff819c26b0 t ch7017_get_hw_state +ffffffff819c2740 t ch7017_destroy +ffffffff819c2790 t ch7017_dump_regs +ffffffff819c3000 t ch7xxx_init +ffffffff819c3290 t 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intel_crtc_wait_for_next_vblank +ffffffff819fd090 T intel_wait_for_vblank_if_active +ffffffff819fd100 T intel_crtc_get_vblank_counter +ffffffff819fd180 T intel_crtc_max_vblank_count +ffffffff819fd220 T intel_crtc_vblank_on +ffffffff819fd300 T intel_crtc_vblank_off +ffffffff819fd3a0 T intel_crtc_state_alloc +ffffffff819fd440 T intel_crtc_state_reset +ffffffff819fd4c0 T intel_crtc_init +ffffffff819fd800 T intel_wait_for_vblank_workers +ffffffff819fd8c0 T intel_usecs_to_scanlines +ffffffff819fd910 T intel_pipe_update_start +ffffffff819fde10 T intel_pipe_update_end +ffffffff819fe110 t intel_crtc_destroy +ffffffff819fe140 t intel_crtc_late_register +ffffffff819fe170 t intel_crtc_vblank_work +ffffffff819ff000 T intel_crtc_state_dump +ffffffff81a01000 T intel_cursor_plane_create +ffffffff81a01200 t i845_cursor_max_stride +ffffffff81a01230 t i845_cursor_update_arm +ffffffff81a01480 t i845_cursor_disable_arm +ffffffff81a014a0 t i845_cursor_get_hw_state +ffffffff81a01540 t i845_check_cursor +ffffffff81a016d0 t i9xx_cursor_max_stride +ffffffff81a01710 t i9xx_cursor_update_arm +ffffffff81a01ad0 t i9xx_cursor_disable_arm +ffffffff81a01af0 t i9xx_cursor_get_hw_state +ffffffff81a01bd0 t i9xx_check_cursor +ffffffff81a01e50 t intel_check_cursor +ffffffff81a02060 t intel_legacy_cursor_update +ffffffff81a02430 t intel_cursor_format_mod_supported +ffffffff81a03000 T hsw_prepare_dp_ddi_buffers +ffffffff81a031b0 T intel_wait_ddi_buf_idle +ffffffff81a033d0 T intel_ddi_set_dp_msa +ffffffff81a035c0 T intel_ddi_enable_transcoder_func +ffffffff81a036b0 t intel_ddi_transcoder_func_reg_val_get +ffffffff81a03930 T intel_ddi_disable_transcoder_func +ffffffff81a03b20 T intel_ddi_toggle_hdcp_bits +ffffffff81a03c60 T intel_ddi_connector_get_hw_state +ffffffff81a03db0 T intel_ddi_get_hw_state +ffffffff81a03e20 t intel_ddi_get_encoder_pipes +ffffffff81a04280 T intel_ddi_enable_pipe_clock +ffffffff81a04340 T intel_ddi_disable_pipe_clock +ffffffff81a043b0 T intel_ddi_level +ffffffff81a04580 T icl_ddi_combo_get_pll +ffffffff81a04600 T hsw_ddi_enable_clock +ffffffff81a046c0 T hsw_ddi_disable_clock +ffffffff81a04700 T hsw_ddi_is_clock_enabled +ffffffff81a04760 T intel_ddi_enable_clock +ffffffff81a047a0 T intel_ddi_disable_clock +ffffffff81a047e0 T intel_ddi_sanitize_encoder_pll_mapping +ffffffff81a049c0 T dp_tp_ctl_reg +ffffffff81a04a40 T dp_tp_status_reg +ffffffff81a04ac0 T intel_ddi_update_pipe +ffffffff81a04b50 T intel_ddi_compute_min_voltage_level +ffffffff81a04bc0 T intel_ddi_get_clock +ffffffff81a04cd0 T hsw_ddi_get_config +ffffffff81a04dc0 t intel_ddi_get_config +ffffffff81a05630 T intel_ddi_init +ffffffff81a061d0 t intel_ddi_hotplug +ffffffff81a06600 t intel_ddi_compute_output_type +ffffffff81a06680 t intel_ddi_compute_config +ffffffff81a067c0 t intel_ddi_compute_config_late +ffffffff81a06a70 t intel_enable_ddi +ffffffff81a07250 t intel_ddi_pre_pll_enable +ffffffff81a073c0 t intel_ddi_pre_enable +ffffffff81a08090 t intel_disable_ddi +ffffffff81a08210 t intel_ddi_post_disable +ffffffff81a08730 t intel_ddi_sync_state +ffffffff81a087e0 t intel_ddi_initial_fastset_check +ffffffff81a088a0 t intel_ddi_encoder_suspend +ffffffff81a08950 t intel_ddi_encoder_shutdown +ffffffff81a08a10 t intel_ddi_get_power_domains +ffffffff81a08bc0 t dg2_ddi_get_config +ffffffff81a08c10 t adls_ddi_enable_clock +ffffffff81a08d90 t adls_ddi_disable_clock +ffffffff81a08e50 t adls_ddi_is_clock_enabled +ffffffff81a08ef0 t adls_ddi_get_config +ffffffff81a08fb0 t rkl_ddi_enable_clock +ffffffff81a09140 t rkl_ddi_disable_clock +ffffffff81a091e0 t rkl_ddi_is_clock_enabled +ffffffff81a09260 t rkl_ddi_get_config +ffffffff81a09330 t dg1_ddi_enable_clock +ffffffff81a094f0 t dg1_ddi_disable_clock +ffffffff81a095b0 t dg1_ddi_is_clock_enabled +ffffffff81a09650 t dg1_ddi_get_config +ffffffff81a09720 t jsl_ddi_tc_enable_clock +ffffffff81a097c0 t jsl_ddi_tc_disable_clock +ffffffff81a09880 t jsl_ddi_tc_is_clock_enabled +ffffffff81a09930 t icl_ddi_combo_get_config +ffffffff81a099e0 t icl_ddi_combo_enable_clock +ffffffff81a09b40 t icl_ddi_combo_disable_clock +ffffffff81a09be0 t icl_ddi_combo_is_clock_enabled +ffffffff81a09c60 t icl_ddi_tc_enable_clock +ffffffff81a09e40 t icl_ddi_tc_disable_clock +ffffffff81a09f20 t icl_ddi_tc_is_clock_enabled +ffffffff81a09fe0 t icl_ddi_tc_get_config +ffffffff81a0a220 t bxt_ddi_get_config +ffffffff81a0a290 t skl_ddi_enable_clock +ffffffff81a0a3a0 t skl_ddi_disable_clock +ffffffff81a0a430 t skl_ddi_is_clock_enabled +ffffffff81a0a4a0 t skl_ddi_get_config +ffffffff81a0a530 t icl_combo_phy_set_signal_levels +ffffffff81a0b000 t tgl_dkl_phy_set_signal_levels +ffffffff81a0b300 t icl_mg_phy_set_signal_levels +ffffffff81a0bc30 t hsw_set_signal_levels +ffffffff81a0bfa0 t intel_ddi_update_prepare +ffffffff81a0c120 t intel_ddi_update_complete +ffffffff81a0c160 t lpt_digital_port_connected +ffffffff81a0c1d0 t bdw_digital_port_connected +ffffffff81a0c240 t hsw_digital_port_connected +ffffffff81a0c2b0 t intel_ddi_encoder_reset +ffffffff81a0c2f0 t intel_ddi_encoder_destroy +ffffffff81a0c3a0 t icl_program_mg_dp_mode +ffffffff81a0c630 t intel_ddi_init_dp_buf_reg +ffffffff81a0c7f0 t intel_disable_ddi_buf +ffffffff81a0cb10 t intel_ddi_prepare_link_retrain +ffffffff81a0d180 t intel_ddi_set_link_train +ffffffff81a0d2e0 t intel_ddi_set_idle_link_train +ffffffff81a0d500 t intel_ddi_dp_voltage_max +ffffffff81a0d5c0 t intel_ddi_dp_preemph_max +ffffffff81a0e000 T is_hobl_buf_trans +ffffffff81a0e040 T intel_ddi_buf_trans_init +ffffffff81a0e300 t dg2_get_snps_buf_trans +ffffffff81a0e370 t adlp_get_combo_buf_trans +ffffffff81a0e4a0 t adlp_get_dkl_buf_trans +ffffffff81a0e500 t adls_get_combo_buf_trans +ffffffff81a0e630 t rkl_get_combo_buf_trans +ffffffff81a0e760 t dg1_get_combo_buf_trans +ffffffff81a0e890 t tgl_get_combo_buf_trans +ffffffff81a0e9e0 t tgl_get_dkl_buf_trans +ffffffff81a0ea40 t jsl_get_combo_buf_trans +ffffffff81a0eaf0 t ehl_get_combo_buf_trans +ffffffff81a0eba0 t icl_get_combo_buf_trans +ffffffff81a0ec50 t icl_get_mg_buf_trans +ffffffff81a0ecb0 t bxt_get_buf_trans +ffffffff81a0ed40 t kbl_y_get_buf_trans +ffffffff81a0edf0 t kbl_u_get_buf_trans +ffffffff81a0eea0 t kbl_get_buf_trans +ffffffff81a0ef50 t skl_y_get_buf_trans +ffffffff81a0f000 t skl_u_get_buf_trans +ffffffff81a0f0b0 t skl_get_buf_trans +ffffffff81a0f160 t bdw_get_buf_trans +ffffffff81a0f200 t hsw_get_buf_trans +ffffffff81a10000 T intel_update_watermarks +ffffffff81a10040 T vlv_get_hpll_vco +ffffffff81a10090 T vlv_get_cck_clock +ffffffff81a10140 T vlv_get_cck_clock_hpll +ffffffff81a10240 T is_trans_port_sync_mode +ffffffff81a10280 T intel_crtc_bigjoiner_slave_pipes +ffffffff81a102e0 T intel_crtc_is_bigjoiner_slave +ffffffff81a10340 T intel_crtc_is_bigjoiner_master +ffffffff81a103a0 T intel_master_crtc +ffffffff81a10440 T assert_transcoder +ffffffff81a105f0 T vlv_wait_port_ready +ffffffff81a10740 T intel_enable_transcoder +ffffffff81a10a30 T intel_disable_transcoder +ffffffff81a10d30 T intel_rotation_info_size +ffffffff81a10d80 T intel_remapped_info_size +ffffffff81a10eb0 T intel_plane_uses_fence +ffffffff81a10f00 T intel_fb_xy_to_linear +ffffffff81a10f50 T intel_add_fb_offsets +ffffffff81a10fa0 T intel_plane_fb_max_stride +ffffffff81a11020 T intel_set_plane_visible +ffffffff81a11070 T intel_plane_fixup_bitmasks +ffffffff81a11120 T intel_plane_disable_noatomic +ffffffff81a11310 T intel_plane_fence_y_offset +ffffffff81a11370 T intel_display_prepare_reset +ffffffff81a11550 T intel_display_finish_reset +ffffffff81a11750 t __intel_display_resume +ffffffff81a11860 T intel_modeset_init_hw +ffffffff81a11900 T intel_has_pending_fb_unpin +ffffffff81a11a00 T intel_get_crtc_new_encoder +ffffffff81a11ba0 T ilk_pfit_disable +ffffffff81a11c60 T intel_phy_is_combo +ffffffff81a11ce0 T intel_phy_is_tc +ffffffff81a11d50 T intel_phy_is_snps +ffffffff81a11d90 T intel_port_to_phy +ffffffff81a11e20 T intel_port_to_tc +ffffffff81a11f20 T intel_aux_power_domain +ffffffff81a11f60 T intel_modeset_get_crtc_power_domains +ffffffff81a12180 T intel_modeset_put_crtc_power_domains +ffffffff81a121b0 T intel_display_suspend +ffffffff81a12250 T intel_encoder_destroy +ffffffff81a12280 T intel_encoder_get_config +ffffffff81a122b0 t intel_crtc_readout_derived_state +ffffffff81a126e0 T intel_link_compute_m_n +ffffffff81a12810 T intel_zero_m_n +ffffffff81a12850 T intel_set_m_n +ffffffff81a12910 T intel_cpu_transcoder_has_m2_n2 +ffffffff81a12970 T intel_cpu_transcoder_set_m1_n1 +ffffffff81a12b30 T intel_cpu_transcoder_set_m2_n2 +ffffffff81a12c90 T i9xx_set_pipeconf +ffffffff81a12e40 T ilk_set_pipeconf +ffffffff81a13020 T bdw_get_pipemisc_bpp +ffffffff81a13110 T ilk_get_lanes_required +ffffffff81a13170 T intel_get_m_n +ffffffff81a13280 T intel_cpu_transcoder_get_m1_n1 +ffffffff81a13420 T intel_cpu_transcoder_get_m2_n2 +ffffffff81a13590 T intel_crtc_get_pipe_config +ffffffff81a13600 T intel_get_load_detect_pipe +ffffffff81a13a20 T intel_release_load_detect_pipe +ffffffff81a13af0 T i9xx_crtc_clock_get +ffffffff81a13d80 T intel_dotclock_calculate +ffffffff81a13de0 T intel_crtc_dotclock +ffffffff81a13eb0 T intel_encoder_current_mode +ffffffff81a14060 T intel_fuzzy_clock_check +ffffffff81a140b0 T intel_pipe_config_compare +ffffffff81a16ba0 t pipe_config_mismatch +ffffffff81a16c90 t pipe_config_infoframe_mismatch +ffffffff81a16e40 T intel_modeset_all_pipes +ffffffff81a16fe0 T intel_atomic_add_affected_planes +ffffffff81a170b0 T intel_crtc_update_active_timings +ffffffff81a171b0 T intel_calc_active_pipes +ffffffff81a17240 T intel_crtc_arm_fifo_underrun +ffffffff81a172e0 T intel_plane_destroy +ffffffff81a17310 T intel_get_pipe_from_crtc_id_ioctl +ffffffff81a17380 T intel_mode_valid_max_plane_size +ffffffff81a17400 T intel_init_display_hooks +ffffffff81a174e0 T intel_modeset_init_noirq +ffffffff81a177a0 t intel_atomic_helper_free_state_worker +ffffffff81a17810 T intel_modeset_init_nogem +ffffffff81a18940 T intel_modeset_init +ffffffff81a18b60 T i830_enable_pipe +ffffffff81a19190 T i830_disable_pipe +ffffffff81a194c0 T intel_display_resume +ffffffff81a19600 T intel_modeset_driver_remove +ffffffff81a196b0 T intel_modeset_driver_remove_noirq +ffffffff81a19820 T intel_modeset_driver_remove_nogem +ffffffff81a19860 T intel_modeset_probe_defer +ffffffff81a19890 T intel_display_driver_register +ffffffff81a198f0 T intel_display_driver_unregister +ffffffff81a19970 T intel_scanout_needs_vtd_wa +ffffffff81a199b0 t wait_for_pipe_scanline_moving +ffffffff81a19c10 t hsw_get_pipe_config +ffffffff81a1a9f0 t hsw_crtc_enable +ffffffff81a1b420 t hsw_crtc_disable +ffffffff81a1b5d0 t skl_commit_modeset_enables +ffffffff81a1bb90 t intel_get_transcoder_timings +ffffffff81a1be60 t ilk_get_pfit_config +ffffffff81a1bfe0 t enabled_bigjoiner_pipes +ffffffff81a1c1f0 t bdw_set_pipemisc +ffffffff81a1c330 t ilk_pfit_enable +ffffffff81a1c440 t intel_set_transcoder_timings +ffffffff81a1c800 t intel_update_crtc +ffffffff81a1ce20 t intel_pre_plane_update +ffffffff81a1d330 t intel_commit_modeset_enables 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t __intel_display_power_get_domain +ffffffff81a255c0 T intel_display_power_get_if_enabled +ffffffff81a256f0 T __intel_display_power_put_async +ffffffff81a258c0 t __intel_display_power_put_domain +ffffffff81a25a40 T intel_display_power_flush_work +ffffffff81a25b60 t release_async_put_domains +ffffffff81a25c40 T intel_display_power_put_unchecked +ffffffff81a25ca0 T intel_display_power_get_in_set +ffffffff81a25d80 T intel_display_power_get_in_set_if_enabled +ffffffff81a25e30 T intel_display_power_put_mask_in_set +ffffffff81a25f00 T intel_power_domains_init +ffffffff81a26150 t intel_display_power_put_async_work +ffffffff81a263c0 T intel_power_domains_cleanup +ffffffff81a263e0 T gen9_dbuf_slices_update +ffffffff81a26600 T intel_power_domains_init_hw +ffffffff81a26da0 t icl_display_core_init +ffffffff81a27690 t bxt_display_core_init +ffffffff81a277c0 T intel_power_domains_driver_remove +ffffffff81a278b0 T intel_power_domains_sanitize_state +ffffffff81a279a0 T intel_power_domains_enable +ffffffff81a27a00 T intel_power_domains_disable +ffffffff81a27ab0 T intel_power_domains_suspend +ffffffff81a27c40 t icl_display_core_uninit +ffffffff81a27ce0 t bxt_display_core_uninit +ffffffff81a27d90 T intel_power_domains_resume +ffffffff81a27e60 T intel_display_power_suspend_late +ffffffff81a27f50 t hsw_enable_pc8 +ffffffff81a288f0 T intel_display_power_resume_early +ffffffff81a289e0 t hsw_disable_pc8 +ffffffff81a28e60 T intel_display_power_suspend +ffffffff81a28ee0 T intel_display_power_resume +ffffffff81a28fc0 T intel_display_power_debug +ffffffff81a29090 T intel_display_power_ddi_io_domain +ffffffff81a29170 T intel_display_power_ddi_lanes_domain +ffffffff81a29250 T intel_display_power_legacy_aux_domain +ffffffff81a29360 T intel_display_power_tbt_aux_domain +ffffffff81a29470 t __delayed_work_tick +ffffffff81a2a000 T intel_display_power_map_init +ffffffff81a2a170 t __set_power_wells +ffffffff81a2a550 T intel_display_power_map_cleanup +ffffffff81a2b000 T lookup_power_well +ffffffff81a2b0c0 T intel_power_well_enable +ffffffff81a2b150 T intel_power_well_name +ffffffff81a2b190 T intel_power_well_disable +ffffffff81a2b200 T intel_power_well_sync_hw +ffffffff81a2b270 T intel_power_well_get +ffffffff81a2b310 T intel_power_well_put +ffffffff81a2b410 T intel_power_well_is_enabled +ffffffff81a2b430 T intel_power_well_is_enabled_cached +ffffffff81a2b460 T intel_display_power_well_is_enabled +ffffffff81a2b520 T intel_power_well_is_always_on +ffffffff81a2b560 T intel_power_well_domains +ffffffff81a2b590 T intel_power_well_refcount +ffffffff81a2b5c0 T gen9_sanitize_dc_state +ffffffff81a2b6a0 T gen9_set_dc_state +ffffffff81a2ba00 T gen9_enable_dc5 +ffffffff81a2bc60 T skl_enable_dc6 +ffffffff81a2bdb0 T bxt_enable_dc9 +ffffffff81a2bf60 T bxt_disable_dc9 +ffffffff81a2c050 T gen9_disable_dc_states +ffffffff81a2c420 T chv_phy_powergate_ch +ffffffff81a2c530 t assert_chv_phy_status +ffffffff81a2c8d0 T chv_phy_powergate_lanes +ffffffff81a2cb90 t i9xx_power_well_sync_hw_noop +ffffffff81a2cbc0 t i9xx_always_on_power_well_noop +ffffffff81a2cbf0 t i9xx_always_on_power_well_enabled +ffffffff81a2cc20 t chv_pipe_power_well_sync_hw +ffffffff81a2cc50 t chv_pipe_power_well_enable +ffffffff81a2cc80 t chv_pipe_power_well_disable +ffffffff81a2cce0 t chv_pipe_power_well_enabled +ffffffff81a2cde0 t chv_dpio_cmn_power_well_enable +ffffffff81a2cff0 t chv_dpio_cmn_power_well_disable +ffffffff81a2d120 t vlv_power_well_enabled +ffffffff81a2d230 t i830_pipes_power_well_sync_hw +ffffffff81a2d320 t i830_pipes_power_well_enable +ffffffff81a2d3e0 t i830_pipes_power_well_disable +ffffffff81a2d410 t i830_pipes_power_well_enabled +ffffffff81a2d4b0 t hsw_power_well_sync_hw +ffffffff81a2d5a0 t hsw_power_well_enable +ffffffff81a2d820 t hsw_power_well_disable +ffffffff81a2d8d0 t hsw_power_well_enabled +ffffffff81a2d9b0 t gen9_dc_off_power_well_enable +ffffffff81a2d9c0 t gen9_dc_off_power_well_disable +ffffffff81a2da60 t gen9_dc_off_power_well_enabled +ffffffff81a2daf0 t bxt_dpio_cmn_power_well_enable +ffffffff81a2db20 t bxt_dpio_cmn_power_well_disable +ffffffff81a2db50 t bxt_dpio_cmn_power_well_enabled +ffffffff81a2db80 t vlv_display_power_well_enable +ffffffff81a2dbb0 t vlv_display_power_well_disable +ffffffff81a2dc20 t vlv_dpio_cmn_power_well_enable +ffffffff81a2dca0 t vlv_dpio_cmn_power_well_disable +ffffffff81a2dda0 t vlv_power_well_enable +ffffffff81a2ddc0 t vlv_power_well_disable +ffffffff81a2dde0 t icl_aux_power_well_enable +ffffffff81a2e460 t icl_aux_power_well_disable +ffffffff81a2e700 t tgl_tc_cold_off_power_well_sync_hw +ffffffff81a2e720 t tgl_tc_cold_off_power_well_enable +ffffffff81a2e740 t tgl_tc_cold_off_power_well_disable +ffffffff81a2e760 t tgl_tc_cold_off_power_well_is_enabled +ffffffff81a2e790 t xelpdp_aux_power_well_enable +ffffffff81a2e870 t xelpdp_aux_power_well_disable +ffffffff81a2e950 t xelpdp_aux_power_well_enabled +ffffffff81a2ea00 t chv_set_pipe_power_well +ffffffff81a2ec00 t vlv_display_power_well_init +ffffffff81a2ee90 t vlv_set_power_well +ffffffff81a2f0a0 t hsw_wait_for_power_well_enable +ffffffff81a2f1e0 t hsw_wait_for_power_well_disable +ffffffff81a2f470 t tgl_tc_cold_request +ffffffff81a30000 T intel_dkl_phy_read +ffffffff81a30100 T intel_dkl_phy_write +ffffffff81a301f0 T intel_dkl_phy_rmw +ffffffff81a30310 T intel_dkl_phy_posting_read +ffffffff81a31000 T intel_dmc_has_payload +ffffffff81a31040 T intel_dmc_load_program +ffffffff81a31820 t pipedmc_clock_gating_wa +ffffffff81a31a10 T intel_dmc_disable_program +ffffffff81a31c30 T assert_dmc_loaded +ffffffff81a31d80 T intel_dmc_ucode_init +ffffffff81a32050 t dmc_load_work_fn +ffffffff81a328b0 T intel_dmc_ucode_suspend +ffffffff81a32920 T intel_dmc_ucode_resume +ffffffff81a329c0 T intel_dmc_ucode_fini +ffffffff81a32af0 T intel_dmc_print_error_state +ffffffff81a32ba0 T intel_dmc_debugfs_register +ffffffff81a33000 T intel_dp_is_edp +ffffffff81a33030 T intel_dp_is_uhbr +ffffffff81a33070 T intel_dp_max_lane_count +ffffffff81a330e0 T intel_dp_link_required +ffffffff81a33120 T intel_dp_max_data_rate +ffffffff81a33190 T intel_dp_can_bigjoiner +ffffffff81a331e0 T intel_dp_get_link_train_fallback_values +ffffffff81a335c0 T intel_dp_mode_to_fec_clock +ffffffff81a33610 T intel_dp_min_bpp +ffffffff81a33650 T intel_dp_source_supports_tps3 +ffffffff81a336a0 T intel_dp_source_supports_tps4 +ffffffff81a336d0 T intel_dp_max_link_rate +ffffffff81a33790 T intel_dp_rate_select +ffffffff81a33830 T intel_dp_compute_rate +ffffffff81a33900 T intel_dp_adjust_compliance_config +ffffffff81a33a40 T intel_dp_limited_color_range +ffffffff81a33ab0 T intel_dp_compute_psr_vsc_sdp +ffffffff81a33b30 T intel_dp_needs_vsc_sdp +ffffffff81a33b80 t intel_dp_compute_vsc_colorimetry +ffffffff81a33d00 T intel_dp_compute_config +ffffffff81a34390 t intel_dp_compute_output_format +ffffffff81a345c0 T intel_dp_set_link_params +ffffffff81a34600 T intel_edp_backlight_on +ffffffff81a346b0 T intel_edp_backlight_off +ffffffff81a34760 T intel_dp_sink_set_decompression_state +ffffffff81a34800 T intel_dp_wait_source_oui +ffffffff81a348d0 T intel_dp_set_power +ffffffff81a34ae0 T intel_dp_sync_state +ffffffff81a34b60 t intel_dp_get_dpcd +ffffffff81a34cc0 t intel_dp_reset_max_link_params +ffffffff81a34dd0 T intel_dp_initial_fastset_check +ffffffff81a34ed0 T intel_dp_check_frl_training +ffffffff81a35460 T intel_dp_pcon_dsc_configure +ffffffff81a35630 T intel_dp_configure_protocol_converter +ffffffff81a357a0 T intel_dp_get_colorimetry_status +ffffffff81a35800 T intel_edp_fixup_vbt_bpp +ffffffff81a358a0 T intel_write_dp_vsc_sdp +ffffffff81a35a30 T intel_dp_set_infoframes +ffffffff81a35b60 t intel_write_dp_sdp +ffffffff81a35e50 T intel_read_dp_sdp +ffffffff81a36180 T intel_dp_retrain_link +ffffffff81a36840 T intel_dp_phy_test +ffffffff81a36f20 T intel_digital_port_connected +ffffffff81a36fc0 T intel_dp_encoder_flush_work +ffffffff81a37010 T intel_dp_encoder_suspend +ffffffff81a37050 T intel_dp_encoder_shutdown +ffffffff81a37090 T intel_dp_hpd_pulse +ffffffff81a377e0 T intel_dp_is_port_edp +ffffffff81a37830 T intel_dp_init_connector +ffffffff81a38990 t intel_dp_modeset_retry_work_fn +ffffffff81a38a10 t intel_dp_set_common_rates +ffffffff81a38bb0 T intel_dp_mst_suspend +ffffffff81a38c50 T intel_dp_mst_resume +ffffffff81a38d00 t intel_dp_compute_link_config +ffffffff81a39a20 t intel_dp_dsc_get_slice_count +ffffffff81a39b90 t intel_dp_set_sink_rates +ffffffff81a39dc0 t intel_dp_check_device_service_irq +ffffffff81a3a390 t intel_dp_force +ffffffff81a3a4d0 t intel_dp_connector_register +ffffffff81a3a5b0 t intel_dp_connector_unregister +ffffffff81a3a610 t intel_dp_oob_hotplug_event +ffffffff81a3a690 t intel_dp_set_edid +ffffffff81a3aac0 t intel_dp_get_modes +ffffffff81a3abc0 t intel_dp_detect +ffffffff81a3b4b0 t intel_dp_mode_valid +ffffffff81a3bc40 t intel_dp_connector_atomic_check +ffffffff81a3bf80 t intel_dp_get_dsc_sink_cap +ffffffff81a3d000 T intel_dp_aux_fini +ffffffff81a3d020 T intel_dp_aux_init +ffffffff81a3d200 t xelpdp_aux_ctl_reg +ffffffff81a3d2c0 t xelpdp_aux_data_reg +ffffffff81a3d390 t tgl_aux_ctl_reg +ffffffff81a3d410 t tgl_aux_data_reg +ffffffff81a3d4a0 t skl_aux_ctl_reg +ffffffff81a3d520 t skl_aux_data_reg +ffffffff81a3d5b0 t ilk_aux_ctl_reg +ffffffff81a3d630 t ilk_aux_data_reg +ffffffff81a3d6c0 t g4x_aux_ctl_reg +ffffffff81a3d740 t g4x_aux_data_reg +ffffffff81a3d7d0 t skl_get_aux_clock_divider +ffffffff81a3d800 t hsw_get_aux_clock_divider +ffffffff81a3d8a0 t ilk_get_aux_clock_divider +ffffffff81a3d900 t g4x_get_aux_clock_divider +ffffffff81a3d950 t skl_get_aux_send_ctl +ffffffff81a3d9d0 t g4x_get_aux_send_ctl +ffffffff81a3da20 t kasprintf +ffffffff81a3daf0 t intel_dp_aux_transfer +ffffffff81a3dd40 t intel_dp_aux_xfer +ffffffff81a3f000 T intel_dp_aux_init_backlight_funcs +ffffffff81a3f270 t intel_dp_aux_hdr_setup_backlight +ffffffff81a3f3c0 t intel_dp_aux_hdr_get_backlight +ffffffff81a3f530 t intel_dp_aux_hdr_set_backlight +ffffffff81a3f620 t intel_dp_aux_hdr_disable_backlight +ffffffff81a3f6a0 t intel_dp_aux_hdr_enable_backlight +ffffffff81a3f8f0 t intel_dp_aux_vesa_setup_backlight +ffffffff81a3fab0 t intel_dp_aux_vesa_get_backlight +ffffffff81a3fae0 t intel_dp_aux_vesa_set_backlight +ffffffff81a3fb80 t intel_dp_aux_vesa_disable_backlight +ffffffff81a3fc30 t intel_dp_aux_vesa_enable_backlight +ffffffff81a40000 T intel_dp_hdcp_init +ffffffff81a400b0 t intel_dp_hdcp_write_an_aksv +ffffffff81a401a0 t intel_dp_hdcp_read_bksv +ffffffff81a40230 t intel_dp_hdcp_read_bstatus +ffffffff81a402c0 t intel_dp_hdcp_repeater_present +ffffffff81a40370 t intel_dp_hdcp_read_ri_prime +ffffffff81a40400 t intel_dp_hdcp_read_ksv_ready +ffffffff81a404a0 t intel_dp_hdcp_read_ksv_fifo +ffffffff81a40590 t intel_dp_hdcp_read_v_prime_part +ffffffff81a40630 t intel_dp_hdcp_toggle_signalling +ffffffff81a40660 t intel_dp_mst_hdcp_stream_encryption +ffffffff81a40870 t intel_dp_hdcp_check_link +ffffffff81a40900 t intel_dp_hdcp_capable +ffffffff81a409b0 t intel_dp_hdcp2_capable +ffffffff81a40a30 t intel_dp_hdcp2_write_msg +ffffffff81a40af0 t intel_dp_hdcp2_read_msg +ffffffff81a411c0 t intel_dp_hdcp2_config_stream_type +ffffffff81a41270 t intel_dp_mst_hdcp2_stream_encryption +ffffffff81a41500 t intel_dp_mst_hdcp2_check_link +ffffffff81a415c0 t get_hdcp2_dp_msg_data +ffffffff81a41700 t intel_dp_hdcp2_check_link +ffffffff81a42000 T intel_dp_init_lttpr_and_dprx_caps +ffffffff81a422c0 T intel_dp_get_adjust_train +ffffffff81a42980 T intel_dp_program_link_training_pattern +ffffffff81a42a80 T intel_dp_set_signal_levels +ffffffff81a42de0 T intel_dp_dump_link_status +ffffffff81a42eb0 T intel_dp_stop_link_train +ffffffff81a430e0 T intel_dp_start_link_train +ffffffff81a44220 t intel_dp_link_train_phy +ffffffff81a46000 T intel_dp_mst_encoder_active_links +ffffffff81a46030 T intel_dp_mst_encoder_init +ffffffff81a46270 T intel_dp_mst_source_support +ffffffff81a462b0 T intel_dp_mst_encoder_cleanup +ffffffff81a46310 T intel_dp_mst_is_master_trans +ffffffff81a46350 T intel_dp_mst_is_slave_trans +ffffffff81a46390 T intel_dp_mst_add_topology_state_for_crtc +ffffffff81a46460 t intel_dp_add_mst_connector +ffffffff81a46670 t intel_dp_mst_poll_hpd_irq +ffffffff81a46690 t intel_dp_mst_get_hw_state +ffffffff81a466f0 t intel_dp_mst_connector_late_register +ffffffff81a46760 t intel_dp_mst_connector_early_unregister +ffffffff81a46790 t intel_dp_mst_get_modes +ffffffff81a46830 t intel_dp_mst_detect +ffffffff81a46930 t intel_dp_mst_mode_valid_ctx +ffffffff81a46a90 t intel_mst_atomic_best_encoder +ffffffff81a46af0 t intel_dp_mst_atomic_check +ffffffff81a46c70 t intel_dp_mst_compute_config +ffffffff81a46f80 t intel_dp_mst_compute_config_late +ffffffff81a47080 t intel_mst_disable_dp +ffffffff81a47170 t intel_mst_post_disable_dp +ffffffff81a47430 t intel_mst_pre_pll_enable_dp +ffffffff81a47480 t intel_mst_pre_enable_dp +ffffffff81a476a0 t intel_mst_enable_dp +ffffffff81a47a90 t intel_dp_mst_enc_get_hw_state +ffffffff81a47ad0 t intel_dp_mst_enc_get_config +ffffffff81a47af0 t intel_dp_mst_initial_fastset_check +ffffffff81a47b10 t intel_dp_mst_encoder_destroy +ffffffff81a48000 T bxt_port_to_phy_channel +ffffffff81a48130 T bxt_ddi_phy_set_signal_levels +ffffffff81a48650 T bxt_ddi_phy_is_enabled +ffffffff81a487a0 T bxt_ddi_phy_uninit +ffffffff81a488a0 T bxt_ddi_phy_init +ffffffff81a48ad0 t _bxt_ddi_phy_init +ffffffff81a490f0 T bxt_ddi_phy_verify_state +ffffffff81a49430 t __phy_reg_verify_state +ffffffff81a49530 T bxt_ddi_phy_calc_lane_lat_optim_mask +ffffffff81a495a0 T bxt_ddi_phy_set_lane_optim_mask +ffffffff81a498d0 T bxt_ddi_phy_get_lane_lat_optim_mask +ffffffff81a49b20 T chv_set_phy_signal_level +ffffffff81a49e80 T chv_data_lane_soft_reset +ffffffff81a4a060 T chv_phy_pre_pll_enable +ffffffff81a4a300 T chv_phy_pre_encoder_enable +ffffffff81a4a590 T chv_phy_release_cl2_override +ffffffff81a4a620 T chv_phy_post_pll_disable +ffffffff81a4a6d0 T vlv_set_phy_signal_level +ffffffff81a4a850 T vlv_phy_pre_pll_enable +ffffffff81a4a970 T vlv_phy_pre_encoder_enable +ffffffff81a4aa90 T vlv_phy_reset_lanes +ffffffff81a4b000 T pnv_calc_dpll_params +ffffffff81a4b0c0 T i9xx_calc_dpll_params +ffffffff81a4b190 T vlv_calc_dpll_params +ffffffff81a4b250 T chv_calc_dpll_params +ffffffff81a4b320 T bxt_find_best_dpll +ffffffff81a4b340 t chv_find_best_dpll +ffffffff81a4b680 T i9xx_dpll_compute_fp +ffffffff81a4b6c0 T vlv_compute_dpll +ffffffff81a4b740 T chv_compute_dpll +ffffffff81a4b7c0 T intel_dpll_crtc_compute_clock +ffffffff81a4b8c0 T intel_dpll_crtc_get_shared_dpll +ffffffff81a4ba10 T intel_dpll_init_clock_hook +ffffffff81a4bb00 T i9xx_enable_pll +ffffffff81a4beb0 T vlv_enable_pll +ffffffff81a4c410 T chv_enable_pll +ffffffff81a4ca90 T vlv_force_pll_on +ffffffff81a4cbe0 T vlv_disable_pll +ffffffff81a4cca0 T chv_disable_pll +ffffffff81a4cdd0 T i9xx_disable_pll +ffffffff81a4ced0 T vlv_force_pll_off +ffffffff81a4cfc0 T assert_pll_enabled +ffffffff81a4d0a0 T assert_pll_disabled +ffffffff81a4d180 t intel_pll_is_valid +ffffffff81a4d250 t dg2_crtc_compute_clock +ffffffff81a4d2d0 t hsw_crtc_compute_clock +ffffffff81a4d390 t hsw_crtc_get_shared_dpll +ffffffff81a4d430 t ilk_crtc_compute_clock +ffffffff81a4d730 t ilk_crtc_get_shared_dpll +ffffffff81a4d780 t g4x_find_best_dpll +ffffffff81a4dac0 t chv_crtc_compute_clock +ffffffff81a4dbd0 t vlv_crtc_compute_clock +ffffffff81a4e090 t g4x_crtc_compute_clock +ffffffff81a4e1e0 t i9xx_compute_dpll +ffffffff81a4e460 t pnv_crtc_compute_clock +ffffffff81a4e820 t i9xx_crtc_compute_clock +ffffffff81a4e940 t i9xx_find_best_dpll +ffffffff81a4ec70 t i8xx_crtc_compute_clock +ffffffff81a4f000 T intel_get_shared_dpll_by_id +ffffffff81a4f040 T intel_get_shared_dpll_id +ffffffff81a4f0d0 T assert_shared_dpll +ffffffff81a4f1f0 T intel_dpll_get_hw_state +ffffffff81a4f220 T icl_tc_port_to_pll_id +ffffffff81a4f250 T intel_enable_shared_dpll +ffffffff81a4f540 T intel_disable_shared_dpll +ffffffff81a4f780 T intel_shared_dpll_swap_state +ffffffff81a4f860 T icl_set_active_port_dpll +ffffffff81a4f8a0 T intel_shared_dpll_init +ffffffff81a4fab0 T intel_compute_shared_dplls +ffffffff81a4fb40 T intel_reserve_shared_dplls +ffffffff81a4fbd0 T intel_release_shared_dplls +ffffffff81a4fc10 T intel_update_active_dpll +ffffffff81a4fc70 T intel_dpll_get_freq +ffffffff81a4fd00 T intel_dpll_update_ref_clks +ffffffff81a4fd50 T intel_dpll_readout_hw_state +ffffffff81a4fed0 T intel_dpll_sanitize_state +ffffffff81a4ffb0 T intel_dpll_dump_hw_state +ffffffff81a50030 T intel_shared_dpll_state_verify +ffffffff81a50150 t verify_single_dpll_state +ffffffff81a50470 T intel_shared_dpll_verify_disabled +ffffffff81a504f0 t icl_compute_dplls +ffffffff81a512d0 t icl_get_dplls +ffffffff81a51a50 t icl_put_dplls +ffffffff81a51b10 t icl_update_active_dpll +ffffffff81a51bc0 t icl_update_dpll_ref_clks +ffffffff81a51c00 t icl_dump_hw_state +ffffffff81a51cc0 t combo_pll_enable +ffffffff81a51ef0 t combo_pll_disable +ffffffff81a51fe0 t combo_pll_get_hw_state +ffffffff81a52070 t icl_ddi_combo_pll_get_freq +ffffffff81a52240 t icl_dpll_write +ffffffff81a524e0 t adlp_cmtg_clock_gating_wa +ffffffff81a52640 t icl_pll_disable +ffffffff81a527e0 t icl_pll_get_hw_state +ffffffff81a52b20 t tbt_pll_enable +ffffffff81a52ce0 t tbt_pll_disable +ffffffff81a52d00 t tbt_pll_get_hw_state +ffffffff81a52d20 t icl_ddi_tbt_pll_get_freq +ffffffff81a52d90 t mg_pll_enable +ffffffff81a53340 t mg_pll_disable +ffffffff81a53380 t dkl_pll_get_hw_state +ffffffff81a53550 t icl_ddi_mg_pll_get_freq +ffffffff81a53630 t intel_find_shared_dpll +ffffffff81a53960 t intel_unreference_shared_dpll +ffffffff81a53ac0 t mg_pll_get_hw_state +ffffffff81a53d10 t bxt_compute_dpll +ffffffff81a54030 t bxt_get_dpll +ffffffff81a54290 t intel_put_dpll +ffffffff81a542f0 t bxt_update_dpll_ref_clks +ffffffff81a54330 t bxt_dump_hw_state +ffffffff81a543e0 t bxt_ddi_pll_enable +ffffffff81a54ef0 t bxt_ddi_pll_disable +ffffffff81a55100 t bxt_ddi_pll_get_hw_state +ffffffff81a55590 t bxt_ddi_pll_get_freq +ffffffff81a55620 t bxt_ddi_set_dpll_hw_state +ffffffff81a557e0 t skl_compute_dpll +ffffffff81a55f60 t skl_get_dpll +ffffffff81a56190 t skl_update_dpll_ref_clks +ffffffff81a561d0 t skl_dump_hw_state +ffffffff81a56230 t skl_ddi_dpll0_enable +ffffffff81a562f0 t skl_ddi_dpll0_disable +ffffffff81a56320 t skl_ddi_dpll0_get_hw_state +ffffffff81a56420 t skl_ddi_pll_get_freq +ffffffff81a564b0 t skl_ddi_wrpll_get_freq +ffffffff81a56610 t skl_ddi_pll_enable +ffffffff81a56830 t skl_ddi_pll_disable +ffffffff81a568c0 t skl_ddi_pll_get_hw_state +ffffffff81a569e0 t hsw_compute_dpll +ffffffff81a57230 t hsw_get_dpll +ffffffff81a574f0 t hsw_update_dpll_ref_clks +ffffffff81a57560 t hsw_dump_hw_state +ffffffff81a57590 t hsw_ddi_wrpll_enable +ffffffff81a57610 t hsw_ddi_wrpll_disable +ffffffff81a576f0 t hsw_ddi_wrpll_get_hw_state +ffffffff81a57790 t hsw_ddi_wrpll_get_freq +ffffffff81a57880 t hsw_ddi_spll_enable +ffffffff81a578e0 t hsw_ddi_spll_disable +ffffffff81a579b0 t hsw_ddi_spll_get_hw_state +ffffffff81a57a40 t hsw_ddi_spll_get_freq +ffffffff81a57ae0 t hsw_ddi_lcpll_enable +ffffffff81a57b10 t hsw_ddi_lcpll_disable +ffffffff81a57b40 t hsw_ddi_lcpll_get_hw_state +ffffffff81a57b70 t hsw_ddi_lcpll_get_freq +ffffffff81a57bf0 t ibx_compute_dpll +ffffffff81a57c20 t ibx_get_dpll +ffffffff81a57ea0 t ibx_dump_hw_state +ffffffff81a57f00 t ibx_pch_dpll_enable +ffffffff81a580b0 t ibx_pch_dpll_disable +ffffffff81a58130 t ibx_pch_dpll_get_hw_state +ffffffff81a59000 T intel_dpt_pin +ffffffff81a591d0 T intel_dpt_unpin +ffffffff81a59240 T intel_dpt_resume +ffffffff81a59310 T intel_dpt_suspend +ffffffff81a593e0 T intel_dpt_create +ffffffff81a59710 t dpt_insert_page +ffffffff81a59780 t dpt_clear_range +ffffffff81a597b0 t dpt_insert_entries +ffffffff81a598b0 t dpt_cleanup +ffffffff81a59900 t dpt_bind_vma +ffffffff81a59990 t dpt_unbind_vma +ffffffff81a599c0 T intel_dpt_destroy +ffffffff81a59a10 t __ww_mutex_lock +ffffffff81a5a000 T intel_drrs_type_str +ffffffff81a5a040 T intel_drrs_is_active +ffffffff81a5a070 T intel_drrs_activate +ffffffff81a5a270 T intel_drrs_deactivate +ffffffff81a5a350 t intel_drrs_set_state +ffffffff81a5a4a0 T intel_drrs_invalidate +ffffffff81a5a4c0 t intel_drrs_frontbuffer_update +ffffffff81a5a620 T intel_drrs_flush +ffffffff81a5a640 T intel_crtc_drrs_init +ffffffff81a5a6e0 t intel_drrs_downclock_work +ffffffff81a5a740 t __delayed_work_tick +ffffffff81a5b000 T intel_dsb_indexed_reg_write +ffffffff81a5b140 T intel_dsb_reg_write +ffffffff81a5b230 T intel_dsb_commit +ffffffff81a5b680 T intel_dsb_prepare +ffffffff81a5b810 T intel_dsb_cleanup +ffffffff81a5c000 T intel_dsi_bitrate +ffffffff81a5c0a0 T intel_dsi_tlpx_ns +ffffffff81a5c0f0 T intel_dsi_get_modes +ffffffff81a5c100 T intel_dsi_mode_valid +ffffffff81a5c1c0 T intel_dsi_host_init +ffffffff81a5c270 T intel_dsi_get_panel_orientation +ffffffff81a5d000 T intel_dsi_dcs_init_backlight_funcs +ffffffff81a5d0a0 t dcs_setup_backlight +ffffffff81a5d100 t dcs_get_backlight +ffffffff81a5d200 t dcs_set_backlight +ffffffff81a5d2f0 t dcs_disable_backlight +ffffffff81a5d670 t dcs_enable_backlight +ffffffff81a5e000 T intel_dsi_vbt_exec_sequence +ffffffff81a5e020 T intel_dsi_msleep +ffffffff81a5e090 T intel_dsi_log_params +ffffffff81a5e410 T intel_dsi_vbt_init +ffffffff81a5e8a0 T intel_dsi_vbt_gpio_init +ffffffff81a5e8c0 T intel_dsi_vbt_gpio_cleanup +ffffffff81a5f000 T intel_dvo_init +ffffffff81a5f4f0 t intel_disable_dvo +ffffffff81a5f5a0 t intel_enable_dvo +ffffffff81a5f690 t intel_dvo_get_hw_state +ffffffff81a5f700 t intel_dvo_get_config +ffffffff81a5f7b0 t intel_dvo_compute_config +ffffffff81a5f840 t intel_dvo_pre_enable +ffffffff81a5f930 t intel_dvo_connector_get_hw_state +ffffffff81a5f9b0 t intel_dvo_enc_destroy +ffffffff81a5f9f0 t intel_dvo_detect +ffffffff81a5faf0 t intel_dvo_get_modes +ffffffff81a5fb60 t intel_dvo_mode_valid +ffffffff81a60000 T intel_fb_get_format_info +ffffffff81a60240 T intel_fb_is_ccs_modifier +ffffffff81a60410 T intel_fb_is_rc_ccs_cc_modifier +ffffffff81a605e0 T intel_fb_is_mc_ccs_modifier +ffffffff81a607b0 T intel_fb_plane_get_modifiers +ffffffff81a608f0 T intel_fb_plane_supports_modifier +ffffffff81a60960 T intel_format_info_is_yuv_semiplanar +ffffffff81a60c00 T intel_fb_is_ccs_aux_plane +ffffffff81a60e40 T intel_fb_rc_ccs_cc_plane +ffffffff81a610a0 T is_surface_linear +ffffffff81a613d0 T main_to_ccs_plane +ffffffff81a616b0 T skl_ccs_to_main_plane +ffffffff81a619a0 T skl_main_to_aux_plane +ffffffff81a61c00 T intel_tile_size +ffffffff81a61c40 T intel_tile_width_bytes +ffffffff81a61e90 T intel_tile_height +ffffffff81a61ef0 T intel_tile_row_size +ffffffff81a61f70 T intel_fb_align_height +ffffffff81a61ff0 T intel_fb_uses_dpt +ffffffff81a62040 T intel_cursor_alignment +ffffffff81a620a0 T intel_surf_alignment +ffffffff81a622c0 T intel_fb_plane_get_subsampling +ffffffff81a62690 T intel_plane_adjust_aligned_offset +ffffffff81a62700 t intel_adjust_aligned_offset +ffffffff81a628b0 T intel_plane_compute_aligned_offset +ffffffff81a629b0 t intel_compute_aligned_offset +ffffffff81a62b70 T intel_fb_needs_pot_stride_remap +ffffffff81a62bc0 T intel_fb_supports_90_270_rotation +ffffffff81a62c10 T intel_fill_fb_info +ffffffff81a63850 t calc_plane_remap_info +ffffffff81a642b0 T intel_fb_fill_view +ffffffff81a64300 T intel_plane_compute_gtt +ffffffff81a64bd0 t intel_plane_check_stride +ffffffff81a64f40 T intel_framebuffer_init +ffffffff81a66350 T intel_user_framebuffer_create +ffffffff81a66490 T intel_framebuffer_create +ffffffff81a66520 t intel_adjust_tile_offset +ffffffff81a66660 t intel_user_framebuffer_destroy +ffffffff81a666c0 t intel_user_framebuffer_create_handle +ffffffff81a666e0 t intel_user_framebuffer_dirty +ffffffff81a67000 T intel_pin_and_fence_fb_obj +ffffffff81a67320 t i915_gem_object_lock +ffffffff81a67530 T intel_unpin_fb_vma +ffffffff81a675a0 T intel_plane_pin_fb +ffffffff81a678d0 T intel_plane_unpin_fb +ffffffff81a68000 T intel_fbc_cleanup +ffffffff81a681c0 T intel_fbc_pre_update +ffffffff81a68810 T intel_fbc_post_update +ffffffff81a68a60 T intel_fbc_invalidate +ffffffff81a68c80 T intel_fbc_flush +ffffffff81a68f10 T intel_fbc_atomic_check +ffffffff81a69480 T intel_fbc_disable +ffffffff81a69540 t __intel_fbc_disable +ffffffff81a696d0 T intel_fbc_update +ffffffff81a69d90 T intel_fbc_reset_underrun +ffffffff81a69ef0 T intel_fbc_handle_fifo_underrun_irq +ffffffff81a69fa0 T intel_fbc_add_plane +ffffffff81a69fd0 T intel_fbc_init +ffffffff81a6a260 T intel_fbc_sanitize +ffffffff81a6a330 T intel_fbc_crtc_debugfs_add +ffffffff81a6a360 T intel_fbc_debugfs_register +ffffffff81a6a390 t intel_fbc_is_ok +ffffffff81a6a4b0 t intel_fbc_update_state +ffffffff81a6a820 t intel_fbc_underrun_work_fn +ffffffff81a6a940 t ivb_fbc_activate +ffffffff81a6aba0 t ilk_fbc_deactivate +ffffffff81a6ac50 t ilk_fbc_is_active +ffffffff81a6acb0 t ivb_fbc_is_compressing +ffffffff81a6ad20 t snb_fbc_nuke +ffffffff81a6ada0 t ilk_fbc_program_cfb +ffffffff81a6ade0 t ivb_fbc_set_false_color +ffffffff81a6aea0 t snb_fbc_activate +ffffffff81a6af30 t ilk_fbc_is_compressing +ffffffff81a6afa0 t ilk_fbc_activate +ffffffff81a6b0d0 t i965_fbc_nuke +ffffffff81a6b170 t g4x_fbc_activate +ffffffff81a6b280 t g4x_fbc_deactivate +ffffffff81a6b310 t g4x_fbc_is_active +ffffffff81a6b370 t g4x_fbc_is_compressing +ffffffff81a6b3d0 t g4x_fbc_program_cfb +ffffffff81a6b400 t i8xx_fbc_activate +ffffffff81a6b570 t i8xx_fbc_deactivate +ffffffff81a6b640 t i8xx_fbc_is_active +ffffffff81a6b6a0 t i8xx_fbc_is_compressing +ffffffff81a6b700 t i8xx_fbc_program_cfb +ffffffff81a6b780 t i8xx_fbc_nuke +ffffffff81a6c000 T intel_fbdev_init +ffffffff81a6c4d0 t intel_fbdev_suspend_worker +ffffffff81a6c500 T intel_fbdev_initial_config_async +ffffffff81a6c570 T intel_fbdev_unregister +ffffffff81a6c5b0 T intel_fbdev_set_suspend +ffffffff81a6c5e0 T intel_fbdev_fini +ffffffff81a6c670 T intel_fbdev_output_poll_changed +ffffffff81a6c710 T intel_fbdev_restore_mode +ffffffff81a6c790 T intel_fbdev_framebuffer +ffffffff81a6c7d0 t intelfb_create +ffffffff81a6cdd0 t intel_fbdev_set_par +ffffffff81a6d000 T assert_fdi_tx_enabled +ffffffff81a6d0e0 T assert_fdi_tx_disabled +ffffffff81a6d1c0 T assert_fdi_rx_enabled +ffffffff81a6d280 T assert_fdi_rx_disabled +ffffffff81a6d340 T assert_fdi_tx_pll_enabled +ffffffff81a6d3f0 T assert_fdi_rx_pll_enabled +ffffffff81a6d4b0 T assert_fdi_rx_pll_disabled +ffffffff81a6d570 T intel_fdi_link_train +ffffffff81a6d590 T intel_fdi_pll_freq_update +ffffffff81a6d640 T intel_fdi_link_freq +ffffffff81a6d690 T ilk_fdi_compute_config +ffffffff81a6d9d0 T intel_fdi_normal_train +ffffffff81a6db60 T hsw_fdi_link_train +ffffffff81a6e060 T hsw_fdi_disable +ffffffff81a6e1c0 T ilk_fdi_pll_enable +ffffffff81a6e3d0 T ilk_fdi_pll_disable +ffffffff81a6e500 T ilk_fdi_disable +ffffffff81a6e770 T intel_fdi_init_hook +ffffffff81a6e7d0 t ilk_fdi_link_train +ffffffff81a6ee40 t gen6_fdi_link_train +ffffffff81a6f670 t ivb_manual_fdi_link_train +ffffffff81a6ff10 t cpt_set_fdi_bc_bifurcation +ffffffff81a71000 T intel_set_cpu_fifo_underrun_reporting +ffffffff81a713f0 T intel_set_pch_fifo_underrun_reporting +ffffffff81a71620 T intel_cpu_fifo_underrun_irq_handler +ffffffff81a71810 T intel_pch_fifo_underrun_irq_handler +ffffffff81a71890 T intel_check_cpu_fifo_underruns +ffffffff81a71ab0 T intel_check_pch_fifo_underruns +ffffffff81a72000 T intel_frontbuffer_flip_prepare +ffffffff81a72050 T intel_frontbuffer_flip_complete +ffffffff81a72130 T intel_frontbuffer_flip +ffffffff81a72200 T __intel_fb_invalidate +ffffffff81a72290 T __intel_fb_flush +ffffffff81a72380 T intel_frontbuffer_get +ffffffff81a724c0 t frontbuffer_active +ffffffff81a724f0 t frontbuffer_retire +ffffffff81a72530 T intel_frontbuffer_put +ffffffff81a726c0 T intel_frontbuffer_track +ffffffff81a73000 T intel_atomic_global_obj_init +ffffffff81a73070 T intel_atomic_global_obj_cleanup +ffffffff81a73170 T intel_atomic_get_global_obj_state +ffffffff81a733e0 T intel_atomic_get_old_global_obj_state +ffffffff81a73440 T intel_atomic_get_new_global_obj_state +ffffffff81a734a0 T intel_atomic_swap_global_state +ffffffff81a735f0 T intel_atomic_clear_global_state +ffffffff81a73720 T intel_atomic_lock_global_state +ffffffff81a737a0 T intel_atomic_serialize_global_state +ffffffff81a74000 T intel_gmbus_is_valid_pin +ffffffff81a74110 T intel_gmbus_reset +ffffffff81a74170 T intel_bb_set_bits +ffffffff81a742a0 T intel_bb_set_dir +ffffffff81a742d0 T intel_bb_read_bits +ffffffff81a74450 T intel_acquire_bus +ffffffff81a74650 T intel_release_bus +ffffffff81a747f0 T intel_send_start +ffffffff81a74810 T intel_send_stop +ffffffff81a74830 T intel_initiate_xfer +ffffffff81a74850 T intel_read_byte +ffffffff81a74870 T intel_write_byte +ffffffff81a74890 T intel_gmbus_output_aksv +ffffffff81a74960 t do_gmbus_xfer +ffffffff81a74f60 T intel_gmbus_setup +ffffffff81a752f0 T intel_gmbus_teardown +ffffffff81a75370 T intel_gmbus_get_adapter +ffffffff81a753f0 T intel_gmbus_force_bit +ffffffff81a75490 T intel_gmbus_is_forced_bit +ffffffff81a754c0 t gmbus_xfer_read +ffffffff81a75790 t gmbus_xfer_write +ffffffff81a759e0 t gmbus_wait +ffffffff81a75dc0 t gmbus_wait_idle +ffffffff81a75f60 t gmbus_xfer +ffffffff81a76040 t gmbus_func +ffffffff81a76080 t gmbus_lock_bus +ffffffff81a760a0 t gmbus_trylock_bus +ffffffff81a76100 t gmbus_unlock_bus +ffffffff81a77000 T intel_hdcp_capable +ffffffff81a770a0 t intel_hdcp_read_valid_bksv +ffffffff81a77320 T intel_hdcp2_capable +ffffffff81a77400 T is_hdcp_supported +ffffffff81a77450 T intel_hdcp_component_init +ffffffff81a77480 T intel_hdcp_init +ffffffff81a775c0 t intel_hdcp_check_work +ffffffff81a7b4c0 t intel_hdcp_prop_work +ffffffff81a7b540 T intel_hdcp_enable +ffffffff81a7b590 T intel_hdcp_disable +ffffffff81a7b6c0 t intel_hdcp_update_value +ffffffff81a7b880 t _intel_hdcp2_disable +ffffffff81a7bc80 t _intel_hdcp_disable +ffffffff81a7bf80 T intel_hdcp_update_pipe +ffffffff81a7c0f0 T intel_hdcp_component_fini +ffffffff81a7c130 T intel_hdcp_cleanup +ffffffff81a7c270 T intel_hdcp_atomic_check +ffffffff81a7c300 T intel_hdcp_handle_cp_irq +ffffffff81a7c400 t __delayed_work_tick +ffffffff81a7c420 t hdcp2_authenticate_repeater_topology +ffffffff81a7c700 t intel_hdcp_get_repeater_ctl +ffffffff81a7d000 T hsw_write_infoframe +ffffffff81a7d410 t hsw_dip_data_reg +ffffffff81a7d5d0 T hsw_read_infoframe +ffffffff81a7d690 T intel_hdmi_infoframe_enable +ffffffff81a7d730 T intel_hdmi_infoframes_enabled +ffffffff81a7d850 T intel_read_infoframe +ffffffff81a7d9e0 T intel_hdmi_read_gcp_infoframe +ffffffff81a7dad0 T intel_dp_dual_mode_set_tmds_output +ffffffff81a7dba0 T intel_hdmi_tmds_clock +ffffffff81a7dbf0 T intel_hdmi_bpc_possible +ffffffff81a7dd20 T intel_hdmi_limited_color_range +ffffffff81a7dd90 T intel_hdmi_compute_config +ffffffff81a7e4e0 t intel_hdmi_compute_output_format +ffffffff81a7e610 T intel_hdmi_encoder_shutdown +ffffffff81a7e6e0 T intel_hdmi_handle_sink_scrambling +ffffffff81a7e800 T intel_infoframe_init +ffffffff81a7e980 t vlv_write_infoframe +ffffffff81a7ece0 t vlv_read_infoframe +ffffffff81a7eeb0 t vlv_set_infoframes +ffffffff81a7f250 t vlv_infoframes_enabled +ffffffff81a7f2f0 t g4x_write_infoframe +ffffffff81a7f5b0 t g4x_read_infoframe +ffffffff81a7f700 t g4x_set_infoframes +ffffffff81a7f9a0 t g4x_infoframes_enabled +ffffffff81a7fa20 t hsw_set_infoframes +ffffffff81a7fcc0 t hsw_infoframes_enabled +ffffffff81a7fd50 t ibx_write_infoframe +ffffffff81a80070 t ibx_read_infoframe +ffffffff81a801f0 t ibx_set_infoframes +ffffffff81a80560 t ibx_infoframes_enabled +ffffffff81a805f0 t cpt_write_infoframe +ffffffff81a808f0 t cpt_read_infoframe +ffffffff81a80a70 t cpt_set_infoframes +ffffffff81a80d80 t cpt_infoframes_enabled +ffffffff81a80df0 T intel_hdmi_init_connector +ffffffff81a81480 T intel_hdmi_dsc_get_slice_height +ffffffff81a814e0 T intel_hdmi_dsc_get_num_slices +ffffffff81a81660 T intel_hdmi_dsc_get_bpp +ffffffff81a81750 t intel_hdmi_compute_clock +ffffffff81a81a10 t hdmi_port_clock_valid +ffffffff81a81c40 t intel_write_infoframe +ffffffff81a81e10 t intel_hdmi_detect +ffffffff81a81fd0 t intel_hdmi_force +ffffffff81a820b0 t intel_hdmi_connector_register +ffffffff81a820c0 t intel_hdmi_connector_unregister +ffffffff81a820d0 t intel_hdmi_set_edid +ffffffff81a82370 t intel_hdmi_get_modes +ffffffff81a823b0 t intel_hdmi_mode_valid +ffffffff81a82550 t intel_hdmi_mode_clock_valid +ffffffff81a826e0 t intel_hdmi_hdcp_write_an_aksv +ffffffff81a82830 t intel_hdmi_hdcp_read_bksv +ffffffff81a82900 t intel_hdmi_hdcp_read_bstatus +ffffffff81a829d0 t intel_hdmi_hdcp_repeater_present +ffffffff81a82ab0 t intel_hdmi_hdcp_read_ri_prime +ffffffff81a82b80 t intel_hdmi_hdcp_read_ksv_ready +ffffffff81a82c60 t intel_hdmi_hdcp_read_ksv_fifo +ffffffff81a82d30 t intel_hdmi_hdcp_read_v_prime_part +ffffffff81a82e20 t intel_hdmi_hdcp_toggle_signalling +ffffffff81a830b0 t intel_hdmi_hdcp_check_link +ffffffff81a83400 t intel_hdmi_hdcp2_capable +ffffffff81a834c0 t intel_hdmi_hdcp2_write_msg +ffffffff81a835b0 t intel_hdmi_hdcp2_read_msg +ffffffff81a83a50 t intel_hdmi_hdcp2_check_link +ffffffff81a84000 T intel_hpd_pin_default +ffffffff81a84030 T intel_encoder_hotplug +ffffffff81a84160 T intel_hpd_trigger_irq +ffffffff81a841d0 T intel_hpd_irq_handler +ffffffff81a845b0 T intel_hpd_init +ffffffff81a846c0 T intel_hpd_poll_enable +ffffffff81a84740 T intel_hpd_poll_disable +ffffffff81a847a0 T intel_hpd_init_work +ffffffff81a84870 t i915_hotplug_work_func +ffffffff81a84bc0 t i915_digport_work_func +ffffffff81a84d50 t i915_hpd_poll_init_work +ffffffff81a84e60 t intel_hpd_irq_storm_reenable_work +ffffffff81a851b0 T intel_hpd_cancel_work +ffffffff81a852d0 T intel_hpd_disable +ffffffff81a85360 T intel_hpd_enable +ffffffff81a853d0 t __delayed_work_tick +ffffffff81a86000 T intel_lpe_audio_irq_handler +ffffffff81a86020 T intel_lpe_audio_init +ffffffff81a86050 T intel_lpe_audio_teardown +ffffffff81a86070 T intel_lpe_audio_notify +ffffffff81a87000 T lspcon_detect_hdr_capability +ffffffff81a870b0 T lspcon_write_infoframe +ffffffff81a87830 T lspcon_read_infoframe +ffffffff81a87870 T lspcon_set_infoframes +ffffffff81a87ae0 T lspcon_infoframes_enabled +ffffffff81a87cd0 T lspcon_wait_pcon_mode +ffffffff81a87cf0 t lspcon_wait_mode +ffffffff81a87fb0 T lspcon_init +ffffffff81a883c0 T intel_lspcon_infoframes_enabled +ffffffff81a88400 T lspcon_resume +ffffffff81a886b0 t lspcon_change_mode +ffffffff81a89000 T intel_lvds_port_enabled +ffffffff81a89080 T intel_get_lvds_encoder +ffffffff81a890e0 T intel_is_dual_link_lvds +ffffffff81a89150 T intel_lvds_init +ffffffff81a898c0 t intel_enable_lvds +ffffffff81a89a10 t intel_pre_enable_lvds +ffffffff81a89ce0 t intel_lvds_compute_config +ffffffff81a89e40 t pch_disable_lvds +ffffffff81a89e60 t pch_post_disable_lvds +ffffffff81a89e80 t gmch_disable_lvds +ffffffff81a89eb0 t intel_lvds_get_hw_state +ffffffff81a89f70 t intel_lvds_get_config +ffffffff81a8a070 t intel_lvds_shutdown +ffffffff81a8a110 t intel_no_lvds_dmi_callback +ffffffff81a8a160 t intel_disable_lvds +ffffffff81a8a290 t intel_lvds_get_modes +ffffffff81a8a2c0 t intel_lvds_mode_valid +ffffffff81a8a340 t intel_dual_link_lvds_callback +ffffffff81a8b000 T intel_modeset_setup_hw_state +ffffffff81a8d000 T intel_modeset_verify_crtc +ffffffff81a8d3b0 t verify_connector_state +ffffffff81a8d660 T intel_modeset_verify_disabled +ffffffff81a8e000 T intel_opregion_notify_encoder +ffffffff81a8e170 t swsci +ffffffff81a8e4a0 T intel_opregion_notify_adapter +ffffffff81a8e500 T intel_opregion_asle_intr +ffffffff81a8e550 T intel_opregion_setup +ffffffff81a8ed60 t asle_work +ffffffff81a8f1e0 T intel_opregion_get_panel_type +ffffffff81a8f2d0 T intel_opregion_get_edid +ffffffff81a8f3b0 T intel_opregion_headless_sku +ffffffff81a8f400 T intel_opregion_register +ffffffff81a8f490 T intel_opregion_resume +ffffffff81a8f520 T intel_opregion_suspend +ffffffff81a8f5c0 T intel_opregion_unregister +ffffffff81a8f740 t intel_no_opregion_vbt_callback +ffffffff81a8f7a0 t intel_use_opregion_panel_type_callback +ffffffff81a90000 T intel_overlay_reset +ffffffff81a90050 T intel_overlay_switch_off +ffffffff81a90250 t intel_overlay_release_old_vid +ffffffff81a903f0 T intel_overlay_put_image_ioctl +ffffffff81a915c0 T intel_overlay_attrs_ioctl +ffffffff81a91a70 T intel_overlay_setup +ffffffff81a91cd0 t intel_overlay_last_flip_retire +ffffffff81a91d10 T intel_overlay_cleanup +ffffffff81a91dd0 T intel_overlay_capture_error_state +ffffffff81a91ec0 T intel_overlay_print_error_state +ffffffff81a92290 t intel_overlay_release_old_vid_tail +ffffffff81a92360 t intel_overlay_off_tail +ffffffff81a92510 t intel_overlay_flip_prepare +ffffffff81a93000 T intel_panel_use_ssc +ffffffff81a93060 T intel_panel_preferred_fixed_mode +ffffffff81a930b0 T intel_panel_fixed_mode +ffffffff81a93170 T intel_panel_downclock_mode +ffffffff81a93260 T intel_panel_highest_mode +ffffffff81a932c0 T intel_panel_get_modes +ffffffff81a93350 T intel_panel_drrs_type +ffffffff81a933a0 T intel_panel_compute_config +ffffffff81a93520 T intel_panel_add_edid_fixed_modes +ffffffff81a93a50 T intel_panel_add_vbt_lfp_fixed_mode +ffffffff81a93ab0 t intel_panel_add_fixed_mode +ffffffff81a93c30 T intel_panel_add_vbt_sdvo_fixed_mode +ffffffff81a93ca0 T intel_panel_add_encoder_fixed_mode +ffffffff81a93ce0 T intel_panel_fitting +ffffffff81a94330 T intel_panel_detect +ffffffff81a943c0 T intel_panel_mode_valid +ffffffff81a944d0 T intel_panel_init_alloc +ffffffff81a94520 T intel_panel_init +ffffffff81a945e0 T intel_panel_fini +ffffffff81a95000 T intel_has_pch_trancoder +ffffffff81a95060 T intel_crtc_pch_transcoder +ffffffff81a950a0 T intel_pch_transcoder_get_m1_n1 +ffffffff81a950f0 T intel_pch_transcoder_get_m2_n2 +ffffffff81a95140 T ilk_pch_pre_enable +ffffffff81a95170 T ilk_pch_enable +ffffffff81a95720 t ilk_pch_transcoder_set_timings +ffffffff81a959a0 T ilk_pch_disable +ffffffff81a959c0 T ilk_pch_post_disable +ffffffff81a95d00 T ilk_pch_get_config +ffffffff81a95ec0 T lpt_pch_enable +ffffffff81a960f0 T lpt_pch_disable +ffffffff81a96200 T lpt_pch_get_config +ffffffff81a962d0 T intel_pch_sanitize +ffffffff81a965b0 t assert_pch_dp_disabled +ffffffff81a966a0 t assert_pch_hdmi_disabled +ffffffff81a97000 T lpt_disable_iclkip +ffffffff81a97070 T lpt_iclkip +ffffffff81a97100 T lpt_program_iclkip +ffffffff81a97380 T lpt_get_iclkip +ffffffff81a97490 T lpt_disable_clkout_dp +ffffffff81a97570 T intel_init_pch_refclk +ffffffff81a99000 T intel_crtc_initial_plane_config +ffffffff81a9a000 T intel_pps_lock +ffffffff81a9a060 T intel_pps_unlock +ffffffff81a9a0c0 T intel_pps_reset_all +ffffffff81a9a210 T intel_pps_check_power_unlocked +ffffffff81a9a3d0 T intel_pps_wait_power_cycle +ffffffff81a9a590 T intel_pps_vdd_on_unlocked +ffffffff81a9aac0 T intel_pps_vdd_on +ffffffff81a9abc0 T intel_pps_vdd_off_sync +ffffffff81a9ac90 t intel_pps_vdd_off_sync_unlocked +ffffffff81a9af70 T intel_pps_vdd_off_unlocked +ffffffff81a9b080 T intel_pps_on_unlocked +ffffffff81a9b480 T intel_pps_on +ffffffff81a9b520 T intel_pps_off_unlocked +ffffffff81a9b770 T intel_pps_off +ffffffff81a9b810 T intel_pps_backlight_on +ffffffff81a9ba20 T intel_pps_backlight_off +ffffffff81a9bc30 T intel_pps_backlight_power +ffffffff81a9be00 T vlv_pps_init +ffffffff81a9bf60 t vlv_detach_power_sequencer +ffffffff81a9c0e0 t vlv_steal_power_sequencer +ffffffff81a9c210 t pps_init_delays +ffffffff81a9c680 t pps_init_registers +ffffffff81a9ca20 T intel_pps_have_panel_power_or_vdd +ffffffff81a9cb80 T intel_pps_encoder_reset +ffffffff81a9cd10 t vlv_initial_power_sequencer_setup +ffffffff81a9cfc0 t pps_vdd_init +ffffffff81a9d0d0 T intel_pps_init +ffffffff81a9d250 t edp_panel_vdd_work +ffffffff81a9d300 T intel_pps_init_late +ffffffff81a9d480 T intel_pps_unlock_regs_wa +ffffffff81a9d570 T intel_pps_setup +ffffffff81a9d5e0 T assert_pps_unlocked +ffffffff81a9d830 t intel_pps_get_registers +ffffffff81a9df00 t wait_panel_status +ffffffff81a9e1d0 t intel_pps_readout_hw_state +ffffffff81a9e390 t __delayed_work_tick +ffffffff81a9f000 T intel_psr_irq_handler +ffffffff81a9f680 T intel_psr_init_dpcd +ffffffff81a9f910 T intel_psr_compute_config +ffffffff81aa01c0 T intel_psr_get_config +ffffffff81aa0370 T intel_psr_disable +ffffffff81aa0480 t intel_psr_disable_locked +ffffffff81aa08f0 T intel_psr_pause +ffffffff81aa0ae0 t intel_psr_exit +ffffffff81aa0dc0 T intel_psr_resume +ffffffff81aa0e50 t intel_psr_activate +ffffffff81aa15f0 T intel_psr2_disable_plane_sel_fetch +ffffffff81aa1660 T intel_psr2_program_plane_sel_fetch +ffffffff81aa1810 T intel_psr2_program_trans_man_trk_ctl +ffffffff81aa1960 T intel_psr2_sel_fetch_update +ffffffff81aa1ff0 T intel_psr_pre_plane_update +ffffffff81aa21c0 T intel_psr_post_plane_update +ffffffff81aa2c50 T intel_psr_wait_for_idle_locked +ffffffff81aa2e30 T intel_psr_debug_set +ffffffff81aa3060 t psr_irq_control +ffffffff81aa31b0 T intel_psr_invalidate +ffffffff81aa3470 T intel_psr_flush +ffffffff81aa3940 T intel_psr_init +ffffffff81aa3a70 t intel_psr_work +ffffffff81aa3c20 t tgl_dc3co_disable_work +ffffffff81aa3c70 T intel_psr_short_pulse +ffffffff81aa4030 T intel_psr_enabled +ffffffff81aa40b0 T intel_psr_lock +ffffffff81aa41a0 T intel_psr_unlock +ffffffff81aa4290 t tgl_psr2_disable_dc3co +ffffffff81aa43c0 t __delayed_work_tick +ffffffff81aa5000 T intel_lookup_range_min_qp +ffffffff81aa50b0 T intel_lookup_range_max_qp +ffffffff81aa6000 T intel_init_quirks +ffffffff81aa60f0 T intel_has_quirk +ffffffff81aa6130 t quirk_ssc_force_disable +ffffffff81aa6160 t quirk_invert_brightness +ffffffff81aa6190 t quirk_backlight_present +ffffffff81aa61c0 t quirk_increase_t12_delay +ffffffff81aa61f0 t quirk_increase_ddi_disabled_time +ffffffff81aa6220 t intel_dmi_reverse_brightness +ffffffff81aa6270 t intel_dmi_no_pps_backlight +ffffffff81aa7000 T intel_sdvo_port_enabled +ffffffff81aa70a0 T intel_sdvo_init +ffffffff81aa7c70 t intel_sdvo_compute_config +ffffffff81aa81d0 t pch_disable_sdvo +ffffffff81aa8200 t pch_post_disable_sdvo +ffffffff81aa8210 t intel_disable_sdvo +ffffffff81aa8380 t intel_sdvo_pre_enable +ffffffff81aa8d00 t intel_enable_sdvo +ffffffff81aa8f00 t intel_sdvo_get_hw_state +ffffffff81aa8ff0 t intel_sdvo_get_config +ffffffff81aa9560 t intel_sdvo_ddc_proxy_xfer +ffffffff81aa9610 t intel_sdvo_ddc_proxy_func +ffffffff81aa9640 t __intel_sdvo_write_cmd +ffffffff81aa9b00 t proxy_lock_bus +ffffffff81aa9b30 t proxy_trylock_bus +ffffffff81aa9b60 t proxy_unlock_bus +ffffffff81aa9b90 t intel_sdvo_enc_destroy +ffffffff81aa9ba0 t intel_sdvo_get_preferred_input_mode +ffffffff81aa9f30 t intel_sdvo_get_dtd_from_mode +ffffffff81aaa0a0 t intel_sdvo_read_response +ffffffff81aaa540 t intel_sdvo_write_sdvox +ffffffff81aaa730 t intel_sdvo_write_infoframe +ffffffff81aaa900 t intel_sdvo_dvi_init +ffffffff81aaab90 t intel_sdvo_tv_init +ffffffff81aaaeb0 t intel_sdvo_lvds_init +ffffffff81aab0a0 t intel_sdvo_hotplug +ffffffff81aab0e0 t intel_sdvo_connector_get_hw_state +ffffffff81aab170 t intel_sdvo_detect +ffffffff81aab4f0 t intel_sdvo_connector_register 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intel_guc_capture_get_matching_node +ffffffff81b5c360 T intel_guc_capture_process +ffffffff81b5d390 T intel_guc_capture_destroy +ffffffff81b5d6f0 T intel_guc_capture_init +ffffffff81b5dd10 t guc_capture_log_get_register +ffffffff81b5e0a0 t guc_capture_alloc_steered_lists_xe_hpg +ffffffff81b5f000 T intel_guc_ct_init_early +ffffffff81b5f120 t ct_incoming_request_worker_func +ffffffff81b5f4a0 t ct_receive_tasklet_func +ffffffff81b5f4c0 T intel_guc_ct_init +ffffffff81b5f660 T intel_guc_ct_fini +ffffffff81b5f6c0 T intel_guc_ct_enable +ffffffff81b5f9d0 T intel_guc_ct_disable +ffffffff81b5fa80 T intel_guc_ct_send +ffffffff81b60450 T intel_guc_ct_event_handler +ffffffff81b60480 t ct_try_receive_message +ffffffff81b60c70 T intel_guc_ct_print_info +ffffffff81b60d80 t ct_write +ffffffff81b60f20 t ct_deadlocked +ffffffff81b62000 T intel_guc_debugfs_register +ffffffff81b63000 T intel_guc_fw_upload +ffffffff81b64000 T intel_gt_init_hwconfig +ffffffff81b641d0 T intel_gt_fini_hwconfig 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i915_gem_driver_remove +ffffffff81b870f0 T i915_gem_driver_release +ffffffff81b87240 T i915_gem_init_early +ffffffff81b872c0 T i915_gem_cleanup_early +ffffffff81b87380 T i915_gem_open +ffffffff81b874a0 t i915_gem_gtt_prepare +ffffffff81b877a0 t __ww_mutex_lock +ffffffff81b88000 T i915_gem_evict_something +ffffffff81b88880 T i915_gem_evict_for_node +ffffffff81b88c50 T i915_gem_evict_vm +ffffffff81b8a000 T i915_gem_gtt_prepare_pages +ffffffff81b8a030 T i915_gem_gtt_finish_pages +ffffffff81b8a090 T i915_gem_gtt_reserve +ffffffff81b8a140 T i915_gem_gtt_insert +ffffffff81b8b000 T i915_gem_ww_ctx_init +ffffffff81b8b060 T i915_gem_ww_unlock_single +ffffffff81b8b1a0 T i915_gem_ww_ctx_fini +ffffffff81b8b210 t i915_gem_ww_ctx_unlock_all +ffffffff81b8b370 T i915_gem_ww_ctx_backoff +ffffffff81b8c000 T i915_getparam_ioctl +ffffffff81b8d000 T intel_gpu_error_find_batch +ffffffff81b8d070 T i915_error_printf +ffffffff81b8d130 T intel_gpu_error_print_vma +ffffffff81b8d160 T i915_gpu_coredump_copy_to_buffer +ffffffff81b8d1b0 T __i915_gpu_coredump_free +ffffffff81b8d340 T intel_engine_coredump_alloc +ffffffff81b8dba0 T intel_engine_coredump_add_request +ffffffff81b8df10 T intel_engine_coredump_add_vma +ffffffff81b8e030 T i915_gpu_coredump_alloc +ffffffff81b8e290 T intel_gt_coredump_alloc +ffffffff81b8ead0 T i915_vma_capture_prepare +ffffffff81b8eb80 T i915_vma_capture_finish +ffffffff81b8ebe0 T i915_gpu_coredump +ffffffff81b8f360 T i915_error_state_store +ffffffff81b8f3c0 T i915_capture_error_state +ffffffff81b8f480 T i915_first_error_state +ffffffff81b8f4f0 T i915_reset_error_state +ffffffff81b8f590 T i915_disable_error_state +ffffffff81b90000 T i915_reg_read_ioctl +ffffffff81b91000 T gen3_irq_reset +ffffffff81b910d0 T gen2_irq_reset +ffffffff81b911a0 T gen3_irq_init +ffffffff81b912e0 T gen2_irq_init +ffffffff81b91420 T i915_hotplug_interrupt_update +ffffffff81b91500 T ilk_enable_display_irq +ffffffff81b91510 t ilk_update_display_irq +ffffffff81b91650 T ilk_disable_display_irq +ffffffff81b91750 T bdw_enable_pipe_irq +ffffffff81b91770 t bdw_update_pipe_irq +ffffffff81b918d0 T bdw_disable_pipe_irq +ffffffff81b919d0 T ibx_enable_display_interrupt +ffffffff81b919e0 t ibx_display_interrupt_update +ffffffff81b91b00 T ibx_disable_display_interrupt +ffffffff81b91bc0 T i915_pipestat_enable_mask +ffffffff81b91d60 T i915_enable_pipestat +ffffffff81b91ef0 T intel_irqs_enabled +ffffffff81b91f20 T i915_disable_pipestat +ffffffff81b920a0 T i915_get_vblank_counter +ffffffff81b92250 T g4x_get_vblank_counter +ffffffff81b922e0 T intel_crtc_get_vblank_timestamp +ffffffff81b92300 t i915_get_crtc_scanoutpos +ffffffff81b92750 T intel_get_crtc_scanline +ffffffff81b927c0 t __intel_get_crtc_scanline +ffffffff81b92a30 T gen8_de_pipe_underrun_mask +ffffffff81b92a70 T i8xx_enable_vblank +ffffffff81b92b90 T i915gm_enable_vblank +ffffffff81b92c10 T i965_enable_vblank +ffffffff81b92d30 T ilk_enable_vblank +ffffffff81b92de0 T bdw_enable_vblank +ffffffff81b92f90 T i8xx_disable_vblank +ffffffff81b93090 T i915gm_disable_vblank +ffffffff81b93100 T i965_disable_vblank +ffffffff81b93200 T ilk_disable_vblank +ffffffff81b93300 T bdw_disable_vblank +ffffffff81b93480 T gen8_irq_power_well_post_enable +ffffffff81b93600 T gen8_irq_power_well_pre_disable +ffffffff81b93790 T intel_synchronize_irq +ffffffff81b937b0 T valleyview_enable_display_irqs +ffffffff81b93820 t vlv_display_irq_reset +ffffffff81b939e0 t vlv_display_irq_postinstall +ffffffff81b93c30 T valleyview_disable_display_irqs +ffffffff81b93c80 T intel_hpd_irq_setup +ffffffff81b93cd0 T intel_irq_init +ffffffff81b93f80 t ivb_parity_work +ffffffff81b94320 T intel_irq_fini +ffffffff81b94360 T intel_irq_install +ffffffff81b94470 t intel_irq_reset +ffffffff81b94fd0 t intel_irq_postinstall +ffffffff81b95cd0 T intel_irq_uninstall +ffffffff81b95d40 T intel_runtime_pm_disable_interrupts +ffffffff81b95d70 T intel_runtime_pm_enable_interrupts +ffffffff81b95da0 T intel_synchronize_hardirq +ffffffff81b95dc0 t i9xx_pipestat_irq_reset +ffffffff81b95f50 t kasprintf +ffffffff81b96020 t i915_hpd_irq_setup +ffffffff81b96130 t icp_hpd_irq_setup +ffffffff81b96320 t dg1_hpd_irq_setup +ffffffff81b96380 t gen11_hpd_irq_setup +ffffffff81b965d0 t bxt_hpd_irq_setup +ffffffff81b96760 t bdw_update_port_irq +ffffffff81b968a0 t spt_hpd_irq_setup +ffffffff81b96ac0 t ilk_hpd_irq_setup +ffffffff81b96d20 t gen11_display_irq_reset +ffffffff81b972a0 t ibx_irq_reset +ffffffff81b973e0 t cherryview_irq_handler +ffffffff81b976b0 t valleyview_irq_handler +ffffffff81b97a20 t i965_irq_handler +ffffffff81b97f90 t i915_irq_handler +ffffffff81b98480 t i8xx_irq_handler +ffffffff81b98880 t dg1_irq_handler +ffffffff81b98a30 t gen11_irq_handler +ffffffff81b98b80 t gen8_irq_handler +ffffffff81b98c60 t ilk_irq_handler +ffffffff81b99b20 t i9xx_pipestat_irq_ack +ffffffff81b99ca0 t i9xx_hpd_irq_handler +ffffffff81b99ec0 t valleyview_pipestat_irq_handler +ffffffff81b9a0d0 t i9xx_pipe_crc_irq_handler +ffffffff81b9a220 t gen8_de_irq_handler +ffffffff81b9b670 t cpt_irq_handler +ffffffff81b9bab0 t ibx_hpd_irq_handler +ffffffff81b9bc50 t gen8_de_irq_postinstall +ffffffff81b9d000 T i915_memcpy_from_wc +ffffffff81b9d120 T i915_unaligned_memcpy_from_wc +ffffffff81b9d240 T i915_memcpy_init_early +ffffffff81b9e000 T i915_mitigate_clear_residuals +ffffffff81b9f000 T i915_init +ffffffff81b9f240 t i915_check_nomodeset +ffffffff81b9f2c0 t i915_mock_selftests +ffffffff81b9f2f0 t i915_pmu_init +ffffffff81b9f320 t i915_pmu_exit +ffffffff81ba0000 T i915_params_dump +ffffffff81ba3120 T i915_params_copy +ffffffff81ba4000 T i915_params_free +ffffffff81ba5000 T i915_pci_register_driver +ffffffff81ba5030 T i915_pci_unregister_driver +ffffffff81ba6000 T i915_oa_config_release +ffffffff81ba6060 T i915_perf_get_oa_config +ffffffff81ba60c0 T i915_oa_init_reg_state +ffffffff81ba61d0 T i915_perf_open_ioctl +ffffffff81ba6720 T i915_perf_register +ffffffff81ba6750 T i915_perf_unregister +ffffffff81ba67c0 T i915_perf_add_config_ioctl +ffffffff81ba6810 T i915_perf_remove_config_ioctl +ffffffff81ba6890 T i915_perf_init +ffffffff81ba6c10 t gen7_is_valid_b_counter_addr +ffffffff81ba6c60 t hsw_is_valid_mux_addr +ffffffff81ba6ce0 t hsw_enable_metric_set +ffffffff81ba6dc0 t hsw_disable_metric_set +ffffffff81ba6ed0 t gen7_oa_enable +ffffffff81ba7030 t gen7_oa_disable +ffffffff81ba70f0 t gen7_oa_read +ffffffff81ba7650 t gen7_oa_hw_tail_read +ffffffff81ba76a0 t gen8_oa_read +ffffffff81ba7cd0 t gen8_is_valid_mux_addr +ffffffff81ba7d50 t gen8_is_valid_flex_addr +ffffffff81ba7dd0 t chv_is_valid_mux_addr +ffffffff81ba7e50 t gen8_oa_enable +ffffffff81ba7f90 t gen8_oa_disable +ffffffff81ba8050 t gen8_enable_metric_set +ffffffff81ba8110 t gen8_disable_metric_set +ffffffff81ba81a0 t gen8_oa_hw_tail_read +ffffffff81ba81f0 t gen11_is_valid_mux_addr +ffffffff81ba82b0 t gen11_disable_metric_set +ffffffff81ba8340 t gen12_is_valid_b_counter_addr +ffffffff81ba8390 t gen12_is_valid_mux_addr +ffffffff81ba83e0 t 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fill_topology_info +ffffffff81baabd0 t query_perf_config_data +ffffffff81bac000 T i915_request_slab_cache +ffffffff81bac030 t i915_fence_get_driver_name +ffffffff81bac060 t i915_fence_get_timeline_name +ffffffff81bac0c0 t i915_fence_enable_signaling +ffffffff81bac0d0 t i915_fence_signaled +ffffffff81bac120 t i915_fence_wait +ffffffff81bac140 t i915_fence_release +ffffffff81bac230 T i915_request_notify_execute_cb_imm +ffffffff81bac2a0 T i915_request_active_engine +ffffffff81bac380 T i915_request_free_capture_list +ffffffff81bac3f0 T i915_request_retire +ffffffff81bac5b0 T i915_request_retire_upto +ffffffff81bac620 T __i915_request_skip +ffffffff81bac6c0 T i915_request_set_error_once +ffffffff81bac730 T i915_request_mark_eio +ffffffff81bac7c0 T __i915_request_submit +ffffffff81baca10 T i915_request_submit +ffffffff81baca60 T __i915_request_unsubmit +ffffffff81bacad0 T i915_request_unsubmit +ffffffff81bacb50 T i915_request_cancel +ffffffff81bacbd0 T __i915_request_create +ffffffff81bacef0 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T add_taint_for_CI +ffffffff81bb90f0 T cancel_timer +ffffffff81bb9140 T set_timer_ms +ffffffff81bb91f0 T i915_vtd_active +ffffffff81bba000 T intel_vgpu_detect +ffffffff81bba030 T intel_vgpu_register +ffffffff81bba090 T intel_vgpu_active +ffffffff81bba0c0 T intel_vgpu_has_full_ppgtt +ffffffff81bba100 T intel_vgpu_has_hwsp_emulation +ffffffff81bba140 T intel_vgpu_has_huge_gtt +ffffffff81bba180 T intel_vgt_deballoon +ffffffff81bba3c0 T intel_vgt_balloon +ffffffff81bbb000 T i915_vma_instance +ffffffff81bbb5b0 T i915_vma_work +ffffffff81bbb620 T i915_vma_wait_for_bind +ffffffff81bbb6a0 T i915_vma_bind +ffffffff81bbb9f0 T i915_vma_pin_iomap +ffffffff81bbbbc0 T i915_vma_flush_writes +ffffffff81bbbc30 T i915_vma_unpin_iomap +ffffffff81bbbcc0 T i915_vma_unpin_and_release +ffffffff81bbbd30 T i915_vma_misplaced +ffffffff81bbbdd0 T __i915_vma_set_map_and_fenceable +ffffffff81bbbe50 T i915_gem_valid_gtt_space +ffffffff81bbbee0 T vma_invalidate_tlb +ffffffff81bbbf20 T i915_vma_pin_ww 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intel_rotate_pages +ffffffff81bbe6b0 t intel_remap_pages +ffffffff81bbea70 t intel_partial_pages +ffffffff81bbf000 T i915_vma_resource_alloc +ffffffff81bbf050 T i915_vma_resource_free +ffffffff81bbf090 T i915_vma_resource_unhold +ffffffff81bbf0a0 t __i915_vma_resource_unhold +ffffffff81bbf190 T i915_vma_resource_hold +ffffffff81bbf1e0 T i915_vma_resource_unbind +ffffffff81bbf310 T __i915_vma_resource_init +ffffffff81bbf370 t i915_vma_resource_fence_notify +ffffffff81bbf440 T i915_vma_resource_bind_dep_sync +ffffffff81bbf5c0 T i915_vma_resource_bind_dep_sync_all +ffffffff81bbf660 T i915_vma_resource_bind_dep_await +ffffffff81bbf800 T i915_vma_resource_module_exit +ffffffff81bbf820 T i915_vma_resource_module_init +ffffffff81bbf880 t get_driver_name +ffffffff81bbf8b0 t get_timeline_name +ffffffff81bbf8e0 t unbind_fence_release +ffffffff81bbf920 t i915_vma_resource_unbind_work +ffffffff81bc0000 T intel_platform_name +ffffffff81bc00a0 T intel_device_info_print +ffffffff81bc0d30 T intel_device_info_subplatform_init +ffffffff81bc1090 T intel_device_info_runtime_init +ffffffff81bc1770 T intel_driver_caps_print +ffffffff81bc2000 T intel_dram_detect +ffffffff81bc2480 t skl_get_dram_info +ffffffff81bc2660 T intel_dram_edram_detect +ffffffff81bc26f0 t icl_pcode_read_mem_global_info +ffffffff81bc27d0 t skl_dram_get_channel_info +ffffffff81bc29a0 t skl_dram_get_dimm_info +ffffffff81bc3000 T intel_memory_region_lookup +ffffffff81bc30e0 T intel_memory_region_by_type +ffffffff81bc31a0 T intel_memory_region_reserve +ffffffff81bc31c0 T intel_memory_region_debug +ffffffff81bc3220 T intel_memory_region_create +ffffffff81bc3390 T intel_memory_region_set_name +ffffffff81bc3410 T intel_memory_region_avail +ffffffff81bc3490 T intel_memory_region_destroy +ffffffff81bc3500 T intel_memory_regions_hw_probe +ffffffff81bc3650 T intel_memory_regions_driver_release +ffffffff81bc4000 T intel_detect_pch +ffffffff81bc4310 t intel_pch_match +ffffffff81bc4360 t intel_pch_type +ffffffff81bc5000 T snb_pcode_read +ffffffff81bc50d0 t __snb_pcode_rw +ffffffff81bc5260 T snb_pcode_write_timeout +ffffffff81bc5330 T skl_pcode_request +ffffffff81bc5670 T intel_pcode_init +ffffffff81bc56d0 T snb_pcode_read_p +ffffffff81bc57e0 T snb_pcode_write_p +ffffffff81bc6000 T intel_set_memory_cxsr +ffffffff81bc60a0 t _intel_set_memory_cxsr +ffffffff81bc6350 T intel_wm_plane_visible +ffffffff81bc63b0 T ilk_wm_max_level +ffffffff81bc6420 T intel_print_wm_latency +ffffffff81bc6580 T ilk_disable_lp_wm +ffffffff81bc6660 T g4x_wm_get_hw_state +ffffffff81bc6e30 T g4x_wm_sanitize +ffffffff81bc6fd0 t g4x_program_watermarks +ffffffff81bc7370 T vlv_wm_get_hw_state +ffffffff81bc8040 t vlv_invalidate_wms +ffffffff81bc81a0 T vlv_wm_sanitize +ffffffff81bc82f0 t vlv_program_watermarks +ffffffff81bc8a40 T ilk_wm_get_hw_state +ffffffff81bc8eb0 T intel_init_clock_gating +ffffffff81bc8ed0 T intel_suspend_hw +ffffffff81bc8f80 T intel_init_clock_gating_hooks +ffffffff81bc91d0 T intel_init_pm +ffffffff81bc9cc0 T intel_pm_setup +ffffffff81bc9d00 t chv_set_memory_dvfs +ffffffff81bc9ec0 t pvc_init_clock_gating +ffffffff81bca060 t dg2_init_clock_gating +ffffffff81bca1b0 t xehpsdv_init_clock_gating +ffffffff81bca2b0 t adlp_init_clock_gating +ffffffff81bca3a0 t gen12lp_init_clock_gating +ffffffff81bca510 t dg1_init_clock_gating +ffffffff81bca600 t icl_init_clock_gating +ffffffff81bca6c0 t cfl_init_clock_gating +ffffffff81bca7e0 t gen9_init_clock_gating +ffffffff81bca8f0 t skl_init_clock_gating +ffffffff81bcaa30 t kbl_init_clock_gating +ffffffff81bcac40 t bxt_init_clock_gating +ffffffff81bcada0 t glk_init_clock_gating +ffffffff81bcae00 t bdw_init_clock_gating +ffffffff81bcb250 t chv_init_clock_gating +ffffffff81bcb400 t hsw_init_clock_gating +ffffffff81bcb550 t ivb_init_clock_gating +ffffffff81bcb760 t g4x_disable_trickle_feed +ffffffff81bcb8c0 t cpt_init_clock_gating +ffffffff81bcbbf0 t vlv_init_clock_gating +ffffffff81bcbd00 t gen6_init_clock_gating +ffffffff81bcbf00 t ilk_init_clock_gating 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+ffffffff81bd4610 T intel_runtime_pm_init_early +ffffffff81bd5000 T intel_sbi_read +ffffffff81bd5050 t intel_sbi_rw +ffffffff81bd5240 T intel_sbi_write +ffffffff81bd6000 T intel_step_init +ffffffff81bd6400 T intel_step_name +ffffffff81bd6440 t pvc_step_lookup +ffffffff81bd7000 T gen3_stolen_base +ffffffff81bd7050 T gen11_stolen_base +ffffffff81bd70d0 T i830_stolen_size +ffffffff81bd7150 T gen3_stolen_size +ffffffff81bd71c0 T gen6_stolen_size +ffffffff81bd7210 T chv_stolen_size +ffffffff81bd7280 T gen8_stolen_size +ffffffff81bd72e0 T gen9_stolen_size +ffffffff81bd7350 T intel_init_stolen_res +ffffffff81bd8000 T intel_uncore_mmio_debug_init_early +ffffffff81bd8060 T intel_uncore_forcewake_domain_to_str +ffffffff81bd80d0 T intel_uncore_fw_release_timer +ffffffff81bd81f0 T intel_uncore_suspend +ffffffff81bd8240 t intel_uncore_forcewake_reset +ffffffff81bd8520 T intel_uncore_resume_early +ffffffff81bd8650 T intel_uncore_unclaimed_mmio +ffffffff81bd86c0 T intel_uncore_runtime_resume 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atom_execute_table_scratch_unlocked +ffffffff81be40a0 t atom_execute_table_locked +ffffffff81be43d0 T atom_execute_table +ffffffff81be4480 T atom_parse +ffffffff81be4660 T atom_destroy +ffffffff81be46a0 T atom_asic_init +ffffffff81be48b0 T atom_parse_data_header +ffffffff81be4950 T atom_parse_cmd_header +ffffffff81be49d0 T atom_allocate_fb_scratch +ffffffff81be4aa0 t atom_op_move +ffffffff81be4c80 t atom_op_and +ffffffff81be4e60 t atom_op_or +ffffffff81be5040 t atom_op_shift_left +ffffffff81be5230 t atom_op_shift_right +ffffffff81be5420 t atom_op_mul +ffffffff81be5570 t atom_op_div +ffffffff81be56e0 t atom_op_add +ffffffff81be58c0 t atom_op_sub +ffffffff81be5aa0 t atom_op_setport +ffffffff81be5c20 t atom_op_setregblock +ffffffff81be5ce0 t atom_op_setfbbase +ffffffff81be5db0 t atom_op_compare +ffffffff81be5fa0 t atom_op_switch +ffffffff81be61f0 t atom_op_jump +ffffffff81be6470 t atom_op_test +ffffffff81be6630 t atom_op_delay +ffffffff81be6710 t atom_op_calltable +ffffffff81be6860 t atom_op_repeat +ffffffff81be6890 t atom_op_clear +ffffffff81be69a0 t atom_op_nop +ffffffff81be69d0 t atom_op_eot +ffffffff81be6a00 t atom_op_mask +ffffffff81be6cd0 t atom_op_postcard +ffffffff81be6d80 t atom_op_beep +ffffffff81be6da0 t atom_op_savereg +ffffffff81be6dd0 t atom_op_restorereg +ffffffff81be6e00 t atom_op_setdatablock +ffffffff81be6f40 t atom_op_xor +ffffffff81be7120 t atom_op_shl +ffffffff81be7340 t atom_op_shr +ffffffff81be7560 t atom_op_debug +ffffffff81be7590 t atom_put_dst +ffffffff81be7a60 t atom_get_src_int +ffffffff81be8110 t atom_iio_execute +ffffffff81be9000 T atombios_crtc_dpms +ffffffff81be92f0 T atombios_crtc_set_base +ffffffff81be9340 t dce4_crtc_do_set_base +ffffffff81be9e30 t avivo_crtc_do_set_base +ffffffff81bea6a0 T atombios_crtc_set_base_atomic +ffffffff81bea6f0 T radeon_atom_disp_eng_pll_init +ffffffff81bea7d0 t atombios_crtc_set_disp_eng_pll +ffffffff81bea8e0 t atombios_crtc_program_ss +ffffffff81beab90 T atombios_crtc_mode_set +ffffffff81beb5c0 T radeon_atombios_init_crtc +ffffffff81beb6b0 t radeon_bo_reserve +ffffffff81beb830 t radeon_bo_unreserve +ffffffff81beb910 t atombios_crtc_program_pll +ffffffff81bebbc0 t atombios_crtc_prepare +ffffffff81bebc70 t atombios_crtc_commit +ffffffff81bebce0 t atombios_crtc_mode_fixup +ffffffff81beca60 t atombios_crtc_disable +ffffffff81beccc0 t radeon_get_shared_nondp_ppll +ffffffff81bed000 T radeon_atom_copy_swap +ffffffff81bed020 T radeon_dp_aux_init +ffffffff81bed110 t radeon_dp_aux_transfer_atom +ffffffff81bed2e0 T radeon_dp_getsinktype +ffffffff81bed350 T radeon_dp_getdpcd +ffffffff81bed4c0 T radeon_dp_get_panel_mode +ffffffff81bed5d0 T radeon_dp_set_link_config +ffffffff81bed650 t radeon_dp_get_dp_link_config +ffffffff81bed7d0 T radeon_dp_mode_valid_helper +ffffffff81bed880 T radeon_dp_needs_link_train +ffffffff81bed8f0 T radeon_dp_set_rx_power_state +ffffffff81bed970 T radeon_dp_link_train +ffffffff81bee0f0 t radeon_process_aux_ch +ffffffff81bee290 t dp_get_adjust_train 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radeon_atom_encoder_dpms +ffffffff81bf18e0 t radeon_atom_mode_fixup +ffffffff81bf1a20 t radeon_atom_encoder_prepare +ffffffff81bf1f00 t radeon_atom_encoder_commit +ffffffff81bf1f30 t radeon_atom_encoder_mode_set +ffffffff81bf24e0 t radeon_atom_dig_detect +ffffffff81bf25f0 t radeon_atom_encoder_disable +ffffffff81bf2890 t radeon_atom_encoder_dpms_avivo +ffffffff81bf2ac0 t radeon_atom_encoder_dpms_dig +ffffffff81bf2fc0 t radeon_atom_dac_detect +ffffffff81bf31b0 t radeon_atom_ext_dpms +ffffffff81bf31e0 t radeon_atom_ext_prepare +ffffffff81bf3210 t radeon_atom_ext_commit +ffffffff81bf3240 t radeon_atom_ext_mode_set +ffffffff81bf3270 t radeon_atom_ext_disable +ffffffff81bf4000 T radeon_atom_hw_i2c_xfer +ffffffff81bf4160 t radeon_process_i2c_ch +ffffffff81bf4330 T radeon_atom_hw_i2c_func +ffffffff81bf5000 T btc_get_max_clock_from_voltage_dependency_table +ffffffff81bf50d0 T btc_apply_voltage_dependency_rules +ffffffff81bf5140 T btc_skip_blacklist_clocks +ffffffff81bf5240 T btc_adjust_clock_combinations +ffffffff81bf5350 T btc_apply_voltage_delta_rules +ffffffff81bf5480 T btc_program_mgcg_hw_sequence +ffffffff81bf5580 T btc_dpm_enabled +ffffffff81bf5590 T btc_notify_uvd_to_smc +ffffffff81bf5600 T btc_reset_to_default +ffffffff81bf5650 T btc_read_arb_registers +ffffffff81bf56e0 T btc_dpm_vblank_too_short +ffffffff81bf5750 T btc_dpm_pre_set_power_state +ffffffff81bf6630 T btc_dpm_set_power_state +ffffffff81bf6a40 T btc_dpm_post_set_power_state +ffffffff81bf6b60 T btc_dpm_enable +ffffffff81bf7d70 T btc_dpm_disable +ffffffff81bf82a0 T btc_dpm_setup_asic +ffffffff81bf8380 T btc_dpm_init +ffffffff81bf8780 T btc_dpm_fini +ffffffff81bf8830 T btc_dpm_debugfs_print_current_performance_level +ffffffff81bf8880 T btc_dpm_get_current_sclk +ffffffff81bf8900 T btc_dpm_get_current_mclk +ffffffff81bf8980 T btc_dpm_get_sclk +ffffffff81bf89d0 T btc_dpm_get_mclk +ffffffff81bf9000 T ci_dpm_powergate_uvd +ffffffff81bf9380 T ci_dpm_vblank_too_short +ffffffff81bf9410 T ci_fan_ctrl_get_fan_speed_percent +ffffffff81bf94b0 T ci_fan_ctrl_set_fan_speed_percent +ffffffff81bf9580 T ci_fan_ctrl_set_mode +ffffffff81bf9710 t ci_fan_ctrl_set_static_mode +ffffffff81bf97d0 t ci_thermal_start_smc_fan_control +ffffffff81bf9a10 T ci_fan_ctrl_get_mode +ffffffff81bf9a70 T ci_dpm_force_performance_level +ffffffff81bfa330 t ci_upload_dpm_level_enable_mask +ffffffff81bfa660 T ci_dpm_pre_set_power_state +ffffffff81bfa960 T ci_dpm_post_set_power_state +ffffffff81bfaa30 T ci_dpm_setup_asic +ffffffff81bfac30 T ci_dpm_enable +ffffffff81bfea60 t ci_enable_didt +ffffffff81bfed00 t ci_enable_power_containment +ffffffff81bff1a0 T ci_dpm_late_enable +ffffffff81bff390 T ci_dpm_disable +ffffffff81bffa90 T ci_dpm_set_power_state +ffffffff81c00c10 T ci_dpm_display_configuration_changed +ffffffff81c00db0 T ci_dpm_fini +ffffffff81c00e60 T ci_dpm_init +ffffffff81c02530 T ci_dpm_debugfs_print_current_performance_level +ffffffff81c02670 T ci_dpm_print_power_state +ffffffff81c02730 T ci_dpm_get_current_sclk +ffffffff81c02800 T ci_dpm_get_current_mclk +ffffffff81c028d0 T ci_dpm_get_sclk +ffffffff81c02920 T ci_dpm_get_mclk +ffffffff81c02970 t ci_populate_all_graphic_levels +ffffffff81c02ef0 t ci_populate_all_memory_levels +ffffffff81c03800 t ci_do_program_memory_timing_parameters +ffffffff81c03a20 t ci_populate_smc_voltage_table +ffffffff81c03b80 t ci_enable_sclk_mclk_dpm +ffffffff81c04000 T ci_copy_bytes_to_smc +ffffffff81c04250 T ci_start_smc +ffffffff81c04290 T ci_reset_smc +ffffffff81c042d0 T ci_program_jump_on_start +ffffffff81c04300 T ci_stop_smc_clock +ffffffff81c04340 T ci_start_smc_clock +ffffffff81c04380 T ci_is_smc_running +ffffffff81c043f0 T ci_load_smc_ucode +ffffffff81c04580 T ci_read_smc_sram_dword +ffffffff81c04650 T ci_write_smc_sram_dword +ffffffff81c05000 T cik_get_allowed_info_register +ffffffff81c050a0 T cik_didt_rreg +ffffffff81c05140 T cik_didt_wreg +ffffffff81c051c0 T ci_get_temp +ffffffff81c05210 T kv_get_temp +ffffffff81c05260 T cik_pciep_rreg +ffffffff81c052e0 T cik_pciep_wreg +ffffffff81c05350 T cik_get_xclk +ffffffff81c053c0 T cik_mm_rdoorbell +ffffffff81c05420 T cik_mm_wdoorbell +ffffffff81c05470 T ci_mc_load_microcode +ffffffff81c057c0 T cik_ring_test +ffffffff81c05a70 T cik_fence_gfx_ring_emit +ffffffff81c05e70 T cik_fence_compute_ring_emit +ffffffff81c06100 T cik_semaphore_ring_emit +ffffffff81c062d0 T cik_copy_cpdma +ffffffff81c066d0 T cik_ring_ib_execute +ffffffff81c06cb0 T cik_ib_test +ffffffff81c06f90 T cik_gfx_get_rptr +ffffffff81c06ff0 T cik_gfx_get_wptr +ffffffff81c07030 T cik_gfx_set_wptr +ffffffff81c07070 T cik_compute_get_rptr +ffffffff81c07150 T cik_compute_get_wptr +ffffffff81c07230 T cik_compute_set_wptr +ffffffff81c072b0 T cik_gpu_check_soft_reset +ffffffff81c07420 T cik_asic_reset +ffffffff81c07830 t cik_gpu_pci_config_reset +ffffffff81c08050 T cik_gfx_is_lockup +ffffffff81c080c0 T cik_pcie_gart_tlb_flush +ffffffff81c08110 T cik_ib_parse +ffffffff81c08140 T cik_vm_init +ffffffff81c081a0 T cik_vm_fini +ffffffff81c081d0 T cik_vm_flush +ffffffff81c08f20 T cik_enter_rlc_safe_mode +ffffffff81c09010 T cik_exit_rlc_safe_mode +ffffffff81c09050 T cik_update_cg +ffffffff81c09520 t cik_enable_mgcg +ffffffff81c09a40 t cik_enable_cgcg +ffffffff81c09db0 T cik_init_cp_pg_table +ffffffff81c0a070 T cik_get_csb_size +ffffffff81c0a100 T cik_get_csb_buffer +ffffffff81c0a2a0 T cik_irq_set +ffffffff81c0b040 t cik_disable_interrupt_state +ffffffff81c0b500 T cik_irq_process +ffffffff81c0ccb0 t cik_irq_ack +ffffffff81c0d630 T cik_resume +ffffffff81c0d6c0 t cik_init_golden_registers +ffffffff81c0d880 t cik_startup +ffffffff81c135d0 T cik_suspend +ffffffff81c139c0 T cik_init +ffffffff81c141b0 t cik_init_microcode +ffffffff81c151c0 t cik_pcie_gart_fini +ffffffff81c152c0 T cik_fini +ffffffff81c15660 T dce8_program_fmt +ffffffff81c15790 T dce8_bandwidth_update +ffffffff81c163b0 T cik_get_gpu_clock_counter +ffffffff81c16480 T cik_set_uvd_clocks +ffffffff81c16500 t cik_set_uvd_clock +ffffffff81c16670 T cik_set_vce_clocks +ffffffff81c168b0 t cik_wait_for_rlc_serdes +ffffffff81c16a80 t radeon_bo_reserve +ffffffff81c16c00 t radeon_bo_unreserve +ffffffff81c16ce0 t cik_update_gfx_pg +ffffffff81c16e80 t cik_compute_stop +ffffffff81c16ff0 t cik_cp_compute_fini +ffffffff81c17190 t dce8_latency_watermark +ffffffff81c18000 T cik_sdma_get_rptr +ffffffff81c18070 T cik_sdma_get_wptr +ffffffff81c180c0 T cik_sdma_set_wptr +ffffffff81c18110 T cik_sdma_ring_ib_execute +ffffffff81c184f0 T cik_sdma_fence_ring_emit +ffffffff81c186d0 t cik_sdma_hdp_flush_ring_emit +ffffffff81c18910 T cik_sdma_semaphore_ring_emit +ffffffff81c18a30 T cik_sdma_enable +ffffffff81c18c10 T cik_sdma_resume +ffffffff81c190f0 T cik_sdma_fini +ffffffff81c19130 T cik_copy_dma +ffffffff81c19500 T cik_sdma_ring_test +ffffffff81c197a0 T cik_sdma_ib_test +ffffffff81c199f0 T cik_sdma_is_lockup +ffffffff81c19a70 T cik_sdma_vm_copy_pages +ffffffff81c19b80 T cik_sdma_vm_write_pages +ffffffff81c19cf0 T cik_sdma_vm_set_pages +ffffffff81c19e60 T cik_sdma_vm_pad_ib +ffffffff81c19eb0 T cik_dma_vm_flush +ffffffff81c1b000 T cypress_enable_spread_spectrum +ffffffff81c1b140 T cypress_start_dpm +ffffffff81c1b190 T cypress_enable_sclk_control +ffffffff81c1b1f0 T cypress_enable_mclk_control +ffffffff81c1b250 T cypress_notify_smc_display_change +ffffffff81c1b2a0 T cypress_program_response_times +ffffffff81c1b370 T cypress_advertise_gen2_capability +ffffffff81c1b440 T cypress_notify_link_speed_change_after_state_change +ffffffff81c1b500 T cypress_notify_link_speed_change_before_state_change +ffffffff81c1b5c0 T cypress_get_strobe_mode_settings +ffffffff81c1b6c0 T cypress_get_mclk_frequency_ratio +ffffffff81c1b770 T cypress_map_clkf_to_ibias +ffffffff81c1b830 T cypress_convert_power_level_to_smc +ffffffff81c1bbf0 t cypress_populate_mclk_value +ffffffff81c1bfc0 T cypress_upload_sw_state +ffffffff81c1c140 T cypress_upload_mc_reg_table +ffffffff81c1c200 t cypress_convert_mc_reg_table_to_smc +ffffffff81c1c4a0 T cypress_calculate_burst_time +ffffffff81c1c530 T cypress_program_memory_timing_parameters +ffffffff81c1c6e0 T cypress_populate_smc_initial_state +ffffffff81c1ca80 T cypress_populate_smc_acpi_state +ffffffff81c1ce10 T cypress_construct_voltage_tables +ffffffff81c1cec0 t cypress_trim_voltage_table_to_fit_state_table +ffffffff81c1d0b0 T cypress_populate_smc_voltage_tables +ffffffff81c1d200 T cypress_get_mvdd_configuration +ffffffff81c1d2c0 T cypress_populate_mc_reg_table +ffffffff81c1d520 T cypress_get_table_locations +ffffffff81c1d600 T cypress_enable_display_gap +ffffffff81c1d660 T cypress_dpm_setup_asic +ffffffff81c1d750 T cypress_dpm_enable +ffffffff81c1e230 t cypress_force_mc_use_s1 +ffffffff81c1e4b0 t cypress_gfx_clock_gating_enable +ffffffff81c1e7c0 t cypress_mg_clock_gating_enable +ffffffff81c1ea40 T cypress_dpm_disable +ffffffff81c1ec70 T cypress_dpm_set_power_state +ffffffff81c1ef20 T cypress_dpm_display_configuration_changed +ffffffff81c1f000 T cypress_dpm_init +ffffffff81c1f270 T cypress_dpm_fini +ffffffff81c1f300 T cypress_dpm_vblank_too_short +ffffffff81c1f370 t cypress_wait_for_mc_sequencer +ffffffff81c20000 T dce3_2_afmt_hdmi_write_speaker_allocation +ffffffff81c20070 T dce3_2_afmt_dp_write_speaker_allocation +ffffffff81c200e0 T dce3_2_afmt_write_sad_regs +ffffffff81c20200 T dce3_2_audio_set_dto +ffffffff81c20340 T dce3_2_hdmi_update_acr +ffffffff81c206a0 T dce3_2_set_audio_packet +ffffffff81c20830 T dce3_2_set_mute +ffffffff81c21000 T dce6_endpoint_rreg +ffffffff81c210e0 T dce6_endpoint_wreg +ffffffff81c211d0 T dce6_audio_get_pin +ffffffff81c21340 T dce6_afmt_select_pin +ffffffff81c213d0 T dce6_afmt_write_latency_fields +ffffffff81c21490 T dce6_afmt_hdmi_write_speaker_allocation +ffffffff81c21560 T dce6_afmt_dp_write_speaker_allocation +ffffffff81c21630 T dce6_afmt_write_sad_regs +ffffffff81c21770 T dce6_audio_enable +ffffffff81c217c0 T dce6_hdmi_audio_set_dto +ffffffff81c21830 T dce6_dp_audio_set_dto +ffffffff81c22000 T eg_cg_rreg +ffffffff81c22080 t r100_mm_rreg +ffffffff81c220d0 T eg_cg_wreg +ffffffff81c22140 T eg_pif_phy0_rreg +ffffffff81c221c0 T eg_pif_phy0_wreg +ffffffff81c22220 T eg_pif_phy1_rreg +ffffffff81c222a0 T eg_pif_phy1_wreg +ffffffff81c22300 T evergreen_get_allowed_info_register +ffffffff81c22390 T evergreen_tiling_fields +ffffffff81c22430 T sumo_set_uvd_clocks +ffffffff81c22510 t sumo_set_uvd_clock +ffffffff81c226d0 T evergreen_set_uvd_clocks +ffffffff81c22c70 T evergreen_fix_pci_max_read_req_size +ffffffff81c22e20 T dce4_program_fmt +ffffffff81c22f40 T dce4_wait_for_vblank +ffffffff81c231c0 T evergreen_page_flip +ffffffff81c23350 T evergreen_page_flip_pending +ffffffff81c233c0 T evergreen_get_temp +ffffffff81c23490 T sumo_get_temp +ffffffff81c234e0 T sumo_pm_init_profile +ffffffff81c23620 T btc_pm_init_profile +ffffffff81c23730 T evergreen_pm_misc +ffffffff81c238d0 T evergreen_pm_prepare +ffffffff81c239d0 T evergreen_pm_finish +ffffffff81c23ad0 T evergreen_hpd_sense +ffffffff81c23b40 T evergreen_hpd_set_polarity +ffffffff81c23c80 T evergreen_hpd_init +ffffffff81c23d50 T evergreen_hpd_fini +ffffffff81c23df0 T evergreen_get_number_of_dram_channels +ffffffff81c23e40 T evergreen_bandwidth_update +ffffffff81c24000 t evergreen_line_buffer_adjust +ffffffff81c24200 t evergreen_program_watermarks +ffffffff81c24cb0 T evergreen_mc_wait_for_idle +ffffffff81c24d50 T evergreen_pcie_gart_tlb_flush +ffffffff81c24e30 T evergreen_mc_stop +ffffffff81c25920 T evergreen_mc_resume +ffffffff81c26030 T evergreen_mc_program +ffffffff81c26440 T evergreen_ring_ib_execute +ffffffff81c268e0 T evergreen_mc_init +ffffffff81c26a20 T evergreen_print_gpu_status_regs +ffffffff81c26a50 T evergreen_is_display_hung +ffffffff81c26c60 T evergreen_gpu_check_soft_reset +ffffffff81c26dc0 T evergreen_gpu_pci_config_reset +ffffffff81c26f40 T evergreen_asic_reset +ffffffff81c27260 T evergreen_gfx_is_lockup +ffffffff81c272d0 T sumo_rlc_fini +ffffffff81c27490 t radeon_bo_reserve +ffffffff81c27610 t radeon_bo_unreserve +ffffffff81c276f0 T sumo_rlc_init +ffffffff81c27ee0 T evergreen_rlc_resume +ffffffff81c28250 T evergreen_get_vblank_counter +ffffffff81c282c0 T evergreen_disable_interrupt_state +ffffffff81c28590 T evergreen_irq_set +ffffffff81c28b50 T evergreen_irq_suspend +ffffffff81c28ba0 T evergreen_irq_process +ffffffff81c296a0 t evergreen_irq_ack +ffffffff81c29da0 T evergreen_resume +ffffffff81c29e80 t evergreen_init_golden_registers +ffffffff81c2a090 t evergreen_startup +ffffffff81c2c720 T evergreen_suspend +ffffffff81c2c8c0 T evergreen_init +ffffffff81c2cde0 T evergreen_fini +ffffffff81c2cfd0 T evergreen_pcie_gen2_enable +ffffffff81c2d200 T evergreen_program_aspm +ffffffff81c2d8a0 t evergreen_latency_watermark +ffffffff81c2e000 T evergreen_cs_parse +ffffffff81c308c0 T evergreen_dma_cs_parse +ffffffff81c31b00 T evergreen_ib_parse +ffffffff81c31fb0 T evergreen_dma_ib_parse +ffffffff81c32170 t evergreen_cs_track_check +ffffffff81c33190 t evergreen_cs_handle_reg +ffffffff81c350d0 t evergreen_surface_value_conv_check +ffffffff81c353b0 t evergreen_surface_check +ffffffff81c35850 t evergreen_cs_track_validate_htile +ffffffff81c35af0 t evergreen_vm_reg_valid +ffffffff81c36000 T evergreen_dma_fence_ring_emit +ffffffff81c362c0 T evergreen_dma_ring_ib_execute +ffffffff81c36600 T evergreen_copy_dma +ffffffff81c369b0 T evergreen_dma_is_lockup +ffffffff81c37000 T dce4_audio_enable +ffffffff81c37080 T evergreen_hdmi_update_acr +ffffffff81c372a0 T dce4_afmt_write_latency_fields +ffffffff81c37310 T dce4_afmt_hdmi_write_speaker_allocation +ffffffff81c37380 T dce4_afmt_dp_write_speaker_allocation +ffffffff81c373f0 T evergreen_hdmi_write_sad_regs +ffffffff81c37510 T evergreen_set_avi_packet +ffffffff81c376b0 T dce4_hdmi_audio_set_dto +ffffffff81c37790 T dce4_dp_audio_set_dto +ffffffff81c37880 T dce4_set_vbi_packet +ffffffff81c378f0 T dce4_hdmi_set_color_depth +ffffffff81c37a40 T dce4_set_audio_packet +ffffffff81c37c50 T dce4_set_mute +ffffffff81c37d60 T evergreen_hdmi_enable +ffffffff81c38090 T evergreen_dp_enable +ffffffff81c39000 T kv_dpm_enable_bapm +ffffffff81c39070 T kv_dpm_enable +ffffffff81c3a5c0 t kv_enable_didt +ffffffff81c3a860 T kv_dpm_late_enable +ffffffff81c3aa50 T kv_dpm_powergate_uvd +ffffffff81c3abc0 T kv_dpm_disable +ffffffff81c3af30 T kv_dpm_force_performance_level +ffffffff81c3b0c0 t kv_force_dpm_lowest +ffffffff81c3b190 T kv_dpm_pre_set_power_state +ffffffff81c3b720 T kv_dpm_set_power_state +ffffffff81c3bed0 t kv_set_valid_clock_range +ffffffff81c3c090 t kv_calculate_ds_divider +ffffffff81c3c200 t kv_calculate_nbps_level_settings +ffffffff81c3c390 t kv_update_vce_dpm +ffffffff81c3c570 T kv_dpm_post_set_power_state +ffffffff81c3c610 T kv_dpm_setup_asic +ffffffff81c3c670 T kv_dpm_init +ffffffff81c3cf10 T kv_dpm_debugfs_print_current_performance_level +ffffffff81c3cf80 T kv_dpm_get_current_sclk +ffffffff81c3cff0 T kv_dpm_get_current_mclk +ffffffff81c3d020 T kv_dpm_print_power_state +ffffffff81c3d0c0 T kv_dpm_fini +ffffffff81c3d160 T kv_dpm_display_configuration_changed +ffffffff81c3d190 T kv_dpm_get_sclk +ffffffff81c3d1e0 T kv_dpm_get_mclk +ffffffff81c3e000 T kv_notify_message_to_smu +ffffffff81c3e0c0 T kv_dpm_get_enable_mask +ffffffff81c3e1a0 T kv_send_msg_to_smc_with_parameter +ffffffff81c3e270 T kv_read_smc_sram_dword +ffffffff81c3e300 T kv_smc_dpm_enable +ffffffff81c3e430 T kv_smc_bapm_enable +ffffffff81c3e560 T kv_copy_bytes_to_smc +ffffffff81c3f000 T tn_smc_rreg +ffffffff81c3f080 T tn_smc_wreg +ffffffff81c3f0f0 T ni_mc_load_microcode +ffffffff81c3f2e0 T ni_init_microcode +ffffffff81c3f820 T cayman_get_allowed_info_register +ffffffff81c3f8b0 T tn_get_temp +ffffffff81c3f940 T cayman_pcie_gart_tlb_flush +ffffffff81c3f990 T cayman_cp_int_cntl_setup +ffffffff81c3f9e0 T cayman_fence_ring_emit +ffffffff81c3fd90 T cayman_ring_ib_execute +ffffffff81c40210 T cayman_gfx_get_rptr +ffffffff81c402a0 T cayman_gfx_get_wptr +ffffffff81c40310 T cayman_gfx_set_wptr +ffffffff81c40390 T cayman_gpu_check_soft_reset +ffffffff81c40510 T cayman_asic_reset +ffffffff81c40810 T cayman_gfx_is_lockup +ffffffff81c40880 T cayman_resume +ffffffff81c40910 t ni_init_golden_registers +ffffffff81c409f0 t cayman_startup +ffffffff81c43120 T cayman_suspend +ffffffff81c43310 T cayman_init +ffffffff81c43910 T cayman_fini +ffffffff81c43b90 T cayman_vm_init +ffffffff81c43bf0 T cayman_vm_fini +ffffffff81c43c20 T cayman_vm_decode_fault +ffffffff81c43cb0 T cayman_vm_flush +ffffffff81c44130 T tn_set_vce_clocks +ffffffff81c45000 T cayman_dma_get_rptr +ffffffff81c45070 T cayman_dma_get_wptr +ffffffff81c450c0 T cayman_dma_set_wptr +ffffffff81c45110 T cayman_dma_ring_ib_execute +ffffffff81c454a0 T cayman_dma_stop +ffffffff81c45550 T cayman_dma_resume +ffffffff81c457a0 T cayman_dma_fini +ffffffff81c45860 T cayman_dma_is_lockup +ffffffff81c458e0 T cayman_dma_vm_copy_pages +ffffffff81c459d0 T cayman_dma_vm_write_pages +ffffffff81c45b30 T cayman_dma_vm_set_pages +ffffffff81c45c90 T cayman_dma_vm_pad_ib +ffffffff81c45ce0 T cayman_dma_vm_flush +ffffffff81c47000 T ni_get_pi +ffffffff81c47030 T ni_get_ps +ffffffff81c47060 T ni_dpm_vblank_too_short +ffffffff81c470d0 T ni_dpm_force_performance_level +ffffffff81c47220 T ni_copy_and_switch_arb_sets +ffffffff81c47500 T ni_set_uvd_clock_before_set_eng_clock +ffffffff81c47580 T ni_set_uvd_clock_after_set_eng_clock +ffffffff81c47600 T ni_dpm_setup_asic +ffffffff81c47810 T ni_update_current_ps +ffffffff81c478d0 T ni_update_requested_ps +ffffffff81c47990 T ni_dpm_enable +ffffffff81c4abd0 t ni_populate_smc_tdp_limits +ffffffff81c4ad90 T ni_dpm_disable +ffffffff81c4b150 T ni_dpm_pre_set_power_state +ffffffff81c4b730 T ni_dpm_set_power_state +ffffffff81c4c850 T ni_dpm_post_set_power_state +ffffffff81c4c920 T ni_dpm_init +ffffffff81c4d2f0 T ni_dpm_fini +ffffffff81c4d3a0 T ni_dpm_print_power_state +ffffffff81c4d470 T ni_dpm_debugfs_print_current_performance_level +ffffffff81c4d4b0 T ni_dpm_get_current_sclk +ffffffff81c4d520 T ni_dpm_get_current_mclk +ffffffff81c4d590 T ni_dpm_get_sclk +ffffffff81c4d5f0 T ni_dpm_get_mclk +ffffffff81c4d650 t ni_do_program_memory_timing_parameters +ffffffff81c4d780 t ni_calculate_sclk_params +ffffffff81c4d9a0 t ni_calculate_power_boost_limit +ffffffff81c4db50 t ni_populate_mclk_value +ffffffff81c4e000 T r100_wait_for_vblank +ffffffff81c4e1a0 T r100_page_flip +ffffffff81c4e450 T r100_page_flip_pending +ffffffff81c4e500 T r100_pm_get_dynpm_state +ffffffff81c4e720 T r100_pm_init_profile +ffffffff81c4e800 T r100_pm_misc +ffffffff81c4ec40 T r100_pm_prepare +ffffffff81c4ed00 T r100_pm_finish +ffffffff81c4edc0 T r100_gui_idle +ffffffff81c4ee00 T r100_hpd_sense +ffffffff81c4ee60 T r100_hpd_set_polarity +ffffffff81c4ef20 T r100_hpd_init +ffffffff81c4efc0 T r100_hpd_fini +ffffffff81c4f020 T r100_pci_gart_tlb_flush +ffffffff81c4f050 T r100_pci_gart_init +ffffffff81c4f120 T r100_pci_gart_get_page_entry +ffffffff81c4f150 T r100_pci_gart_set_page +ffffffff81c4f190 T r100_pci_gart_enable +ffffffff81c4f280 T r100_pci_gart_disable +ffffffff81c4f300 T r100_pci_gart_fini +ffffffff81c4f380 T r100_irq_set +ffffffff81c4f460 T r100_irq_disable +ffffffff81c4f4d0 T r100_irq_process +ffffffff81c4f7d0 T r100_get_vblank_counter +ffffffff81c4f820 T r100_fence_ring_emit +ffffffff81c4fc90 T r100_semaphore_ring_emit +ffffffff81c4fcc0 T r100_copy_blit +ffffffff81c50360 T r100_ring_start +ffffffff81c50450 T r100_gfx_get_rptr +ffffffff81c504b0 T r100_gfx_get_wptr +ffffffff81c504f0 T r100_gfx_set_wptr +ffffffff81c50530 T r100_cp_init +ffffffff81c50a60 T r100_debugfs_cp_init +ffffffff81c50a90 T r100_cp_fini +ffffffff81c50b30 T r100_cp_disable +ffffffff81c50c70 T r100_gui_wait_for_idle +ffffffff81c50d60 T r100_reloc_pitch_offset +ffffffff81c50e90 T r100_packet3_load_vbpntr +ffffffff81c51130 T r100_cs_parse_packet0 +ffffffff81c51240 T r100_cs_packet_parse_vline +ffffffff81c51430 T r100_cs_track_check_pkt3_indx_buffer +ffffffff81c514b0 T r100_cs_parse +ffffffff81c52970 T r100_cs_track_clear +ffffffff81c52d00 T r100_cs_track_check +ffffffff81c536f0 T r100_mc_wait_for_idle +ffffffff81c53790 T r100_gpu_is_lockup +ffffffff81c537f0 T r100_enable_bm +ffffffff81c53840 T r100_bm_disable +ffffffff81c538f0 T r100_asic_reset +ffffffff81c53c20 T r100_mc_stop +ffffffff81c53de0 T r100_mc_resume +ffffffff81c53ea0 T r100_set_common_regs +ffffffff81c54050 T r100_vram_init_sizes +ffffffff81c54240 T r100_vga_set_state +ffffffff81c542a0 T r100_pll_errata_after_index +ffffffff81c542e0 T r100_pll_rreg +ffffffff81c54410 T r100_pll_wreg +ffffffff81c54520 T r100_debugfs_rbbm_init +ffffffff81c54550 T r100_debugfs_mc_info_init +ffffffff81c54580 T r100_set_surface_reg +ffffffff81c54790 T r100_clear_surface_reg +ffffffff81c54840 T r100_bandwidth_update +ffffffff81c552f0 T r100_ring_test +ffffffff81c555b0 T r100_ring_ib_execute +ffffffff81c55810 T r100_ib_test +ffffffff81c55b50 T r100_vga_render_disable +ffffffff81c55bb0 T r100_resume +ffffffff81c55db0 t r100_startup +ffffffff81c562e0 T r100_suspend +ffffffff81c563c0 T r100_fini +ffffffff81c564d0 T r100_restore_sanity +ffffffff81c56570 T r100_init +ffffffff81c56af0 T r100_mm_rreg_slow +ffffffff81c56b70 T r100_mm_wreg_slow +ffffffff81c56bd0 T r100_io_rreg +ffffffff81c56c70 T r100_io_wreg +ffffffff81c56ce0 t r100_cs_track_texture_print +ffffffff81c57000 T r200_copy_dma +ffffffff81c57470 T r200_packet0_check +ffffffff81c58490 T r200_set_safe_registers +ffffffff81c59000 T rv370_pcie_rreg +ffffffff81c59080 T rv370_pcie_wreg +ffffffff81c590f0 T rv370_pcie_gart_tlb_flush +ffffffff81c592f0 T rv370_pcie_gart_get_page_entry +ffffffff81c59350 T rv370_pcie_gart_set_page +ffffffff81c59390 T rv370_pcie_gart_init +ffffffff81c59460 T rv370_pcie_gart_enable +ffffffff81c597c0 T rv370_pcie_gart_disable +ffffffff81c59940 T rv370_pcie_gart_fini +ffffffff81c59970 T r300_fence_ring_emit +ffffffff81c59f00 T r300_ring_start +ffffffff81c5a910 T r300_mc_wait_for_idle +ffffffff81c5a9b0 T r300_asic_reset +ffffffff81c5abd0 T r300_mc_init +ffffffff81c5ac80 T rv370_set_pcie_lanes +ffffffff81c5ae40 T rv370_get_pcie_lanes +ffffffff81c5aef0 T r300_cs_parse +ffffffff81c5b260 t r300_packet0_check +ffffffff81c5c0c0 T r300_set_reg_safe +ffffffff81c5c100 T r300_mc_program +ffffffff81c5c280 T r300_clock_startup +ffffffff81c5c310 T r300_resume +ffffffff81c5c4e0 t r300_startup +ffffffff81c5c840 T r300_suspend +ffffffff81c5c8c0 T r300_fini +ffffffff81c5c9a0 T r300_init +ffffffff81c5d000 T r420_pm_init_profile +ffffffff81c5d0f0 T r420_pipes_init +ffffffff81c5d2d0 T r420_mc_rreg +ffffffff81c5d350 T r420_mc_wreg +ffffffff81c5d3c0 T r420_resume +ffffffff81c5d5a0 t r420_startup +ffffffff81c5d940 T r420_suspend +ffffffff81c5dae0 T r420_fini +ffffffff81c5dbc0 T r420_init +ffffffff81c5de40 T r420_debugfs_pipes_info_init +ffffffff81c5e000 T r520_mc_wait_for_idle +ffffffff81c5e0a0 T r520_resume +ffffffff81c5e1a0 t r520_startup +ffffffff81c5e590 T r520_init +ffffffff81c5f000 T r600_rcu_rreg +ffffffff81c5f080 T r600_rcu_wreg +ffffffff81c5f0f0 T r600_uvd_ctx_rreg +ffffffff81c5f170 T r600_uvd_ctx_wreg +ffffffff81c5f1e0 T r600_get_allowed_info_register +ffffffff81c5f260 T r600_get_xclk +ffffffff81c5f290 T r600_set_uvd_clocks +ffffffff81c5f7f0 T dce3_program_fmt +ffffffff81c5f910 T rv6xx_get_temp +ffffffff81c5f960 T r600_pm_get_dynpm_state +ffffffff81c5fd60 T rs780_pm_init_profile +ffffffff81c5fe70 T r600_pm_init_profile +ffffffff81c60110 T r600_pm_misc +ffffffff81c601f0 T r600_gui_idle +ffffffff81c60230 T r600_hpd_sense +ffffffff81c60350 T r600_hpd_set_polarity +ffffffff81c605c0 T r600_hpd_init +ffffffff81c607d0 T r600_hpd_fini +ffffffff81c60980 T r600_pcie_gart_tlb_flush +ffffffff81c60ac0 T r600_pcie_gart_init +ffffffff81c60b60 T r600_mc_wait_for_idle +ffffffff81c60c00 T rs780_mc_rreg +ffffffff81c60ca0 T rs780_mc_wreg +ffffffff81c60d30 T r600_vram_scratch_init +ffffffff81c60e30 t radeon_bo_reserve +ffffffff81c60fb0 t radeon_bo_unreserve +ffffffff81c61090 T r600_vram_scratch_fini +ffffffff81c61110 T r600_set_bios_scratch_engine_hung +ffffffff81c61160 T r600_gpu_check_soft_reset +ffffffff81c614e0 T r600_asic_reset +ffffffff81c61870 t r600_gpu_pci_config_reset +ffffffff81c61a90 T r600_gfx_is_lockup +ffffffff81c61b00 T r6xx_remap_render_backend +ffffffff81c61cf0 T r600_count_pipe_bits +ffffffff81c61d60 T r600_pciep_rreg +ffffffff81c61de0 T r600_pciep_wreg +ffffffff81c61e50 T r600_cp_stop +ffffffff81c61ed0 T r600_init_microcode +ffffffff81c623a0 T r600_gfx_get_rptr +ffffffff81c62400 T r600_gfx_get_wptr +ffffffff81c62440 T r600_gfx_set_wptr +ffffffff81c62480 T r600_cp_start +ffffffff81c62800 T r600_cp_resume +ffffffff81c62b60 T r600_ring_init +ffffffff81c62c00 T r600_cp_fini +ffffffff81c62c90 T r600_scratch_init +ffffffff81c62d00 T r600_ring_test +ffffffff81c62fb0 T r600_fence_ring_emit +ffffffff81c63870 T r600_semaphore_ring_emit +ffffffff81c63a60 T r600_copy_cpdma +ffffffff81c64020 T r600_set_surface_reg +ffffffff81c64050 T r600_clear_surface_reg +ffffffff81c64080 T r600_vga_set_state +ffffffff81c640e0 T r600_resume +ffffffff81c64170 t r600_startup +ffffffff81c66180 T r600_suspend +ffffffff81c662f0 T r600_irq_suspend +ffffffff81c663b0 t r600_pcie_gart_disable +ffffffff81c665b0 T r600_init +ffffffff81c66da0 T r600_ih_ring_init +ffffffff81c66e10 T r600_irq_fini +ffffffff81c66f50 T r600_fini +ffffffff81c670e0 T r600_ring_ib_execute +ffffffff81c67560 T r600_ib_test +ffffffff81c67810 T r600_ih_ring_alloc +ffffffff81c67930 T r600_ih_ring_fini +ffffffff81c679c0 T r600_rlc_stop +ffffffff81c67b50 T r600_disable_interrupts +ffffffff81c67c00 T r600_irq_init +ffffffff81c68070 t r600_disable_interrupt_state +ffffffff81c68360 T r600_irq_disable +ffffffff81c68420 T r600_irq_set +ffffffff81c68ba0 t r600_irq_ack +ffffffff81c69090 T r600_irq_process +ffffffff81c69c90 T r600_mmio_hdp_flush +ffffffff81c69d10 T r600_set_pcie_lanes +ffffffff81c69e40 T r600_get_pcie_lanes +ffffffff81c69f20 T r600_get_gpu_clock_counter +ffffffff81c6a000 T r600_fmt_is_valid_color +ffffffff81c6a040 T r600_fmt_is_valid_texture +ffffffff81c6a090 T r600_fmt_get_blocksize +ffffffff81c6a0d0 T r600_fmt_get_nblocksx +ffffffff81c6a130 T r600_fmt_get_nblocksy +ffffffff81c6a190 T r600_cs_common_vline_parse +ffffffff81c6a460 T r600_mip_minify +ffffffff81c6a4c0 T r600_cs_parse +ffffffff81c6c450 T r600_dma_cs_next_reloc +ffffffff81c6c4d0 T r600_dma_cs_parse +ffffffff81c6cc00 t r600_cs_track_check +ffffffff81c6dd40 t r600_cs_check_reg +ffffffff81c6f000 T r600_dma_get_rptr +ffffffff81c6f060 T r600_dma_get_wptr +ffffffff81c6f0a0 T r600_dma_set_wptr +ffffffff81c6f0e0 T r600_dma_stop +ffffffff81c6f170 T r600_dma_resume +ffffffff81c6f380 T r600_dma_fini +ffffffff81c6f400 T r600_dma_is_lockup +ffffffff81c6f470 T r600_dma_ring_test +ffffffff81c6f6d0 T r600_dma_fence_ring_emit +ffffffff81c6f8c0 T r600_dma_semaphore_ring_emit +ffffffff81c6f9e0 T r600_dma_ib_test +ffffffff81c6fbf0 T r600_dma_ring_ib_execute +ffffffff81c6ff30 T r600_copy_dma +ffffffff81c71000 T r600_dpm_print_class_info +ffffffff81c712b0 T r600_dpm_print_cap_info +ffffffff81c71340 T r600_dpm_print_ps_status +ffffffff81c713d0 T r600_dpm_get_vblank_time +ffffffff81c71490 T r600_dpm_get_vrefresh +ffffffff81c71520 T r600_calculate_u_and_p +ffffffff81c715a0 T r600_calculate_at +ffffffff81c71650 T r600_gfx_clockgating_enable +ffffffff81c71760 T r600_dynamicpm_enable +ffffffff81c717c0 T r600_enable_thermal_protection +ffffffff81c71820 T r600_enable_acpi_pm +ffffffff81c71870 T r600_enable_dynamic_pcie_gen2 +ffffffff81c718d0 T r600_dynamicpm_enabled +ffffffff81c71910 T r600_enable_sclk_control +ffffffff81c71970 T r600_enable_mclk_control +ffffffff81c719d0 T r600_enable_spll_bypass +ffffffff81c71a30 T r600_wait_for_spll_change +ffffffff81c71ab0 T r600_set_bsp +ffffffff81c71af0 T r600_set_at +ffffffff81c71b50 T r600_set_tc +ffffffff81c71bb0 T r600_select_td +ffffffff81c71c70 T r600_set_vrc +ffffffff81c71cb0 T r600_set_tpu +ffffffff81c71d10 T r600_set_tpc +ffffffff81c71d70 T r600_set_sstu +ffffffff81c71dd0 T r600_set_sst +ffffffff81c71e20 T r600_set_git +ffffffff81c71e70 T r600_set_fctu +ffffffff81c71ed0 T r600_set_fct +ffffffff81c71f20 T r600_set_ctxcgtt3d_rphc +ffffffff81c71f80 T r600_set_ctxcgtt3d_rsdc +ffffffff81c71fe0 T r600_set_vddc3d_oorsu +ffffffff81c72040 T r600_set_vddc3d_oorphc +ffffffff81c720a0 T r600_set_vddc3d_oorsdc +ffffffff81c72100 T r600_set_mpll_lock_time +ffffffff81c72150 T r600_set_mpll_reset_time +ffffffff81c721a0 T r600_engine_clock_entry_enable +ffffffff81c722a0 T r600_engine_clock_entry_enable_pulse_skipping +ffffffff81c723a0 T r600_engine_clock_entry_enable_post_divider +ffffffff81c724a0 T r600_engine_clock_entry_set_post_divider +ffffffff81c72560 T r600_engine_clock_entry_set_reference_divider +ffffffff81c72620 T r600_engine_clock_entry_set_feedback_divider +ffffffff81c726e0 T r600_engine_clock_entry_set_step_time +ffffffff81c727a0 T r600_vid_rt_set_ssu +ffffffff81c72800 T r600_vid_rt_set_vru +ffffffff81c72860 T r600_vid_rt_set_vrt +ffffffff81c728c0 T r600_voltage_control_enable_pins +ffffffff81c72910 T r600_voltage_control_program_voltages +ffffffff81c729a0 T r600_voltage_control_deactivate_static_control +ffffffff81c72a30 T r600_power_level_enable +ffffffff81c72aa0 T r600_power_level_set_voltage_index +ffffffff81c72b10 T r600_power_level_set_mem_clock_index +ffffffff81c72b70 T r600_power_level_set_eng_clock_index +ffffffff81c72be0 T r600_power_level_set_watermark_id +ffffffff81c72c50 T r600_power_level_set_pcie_gen2 +ffffffff81c72cb0 T r600_power_level_get_current_index +ffffffff81c72cf0 T r600_power_level_get_target_index +ffffffff81c72d30 T r600_power_level_set_enter_index +ffffffff81c72d90 T r600_wait_for_power_level_unequal +ffffffff81c72e80 T r600_wait_for_power_level +ffffffff81c72f70 T r600_start_dpm +ffffffff81c73250 T r600_stop_dpm +ffffffff81c732a0 T r600_dpm_pre_set_power_state +ffffffff81c732d0 T r600_dpm_post_set_power_state +ffffffff81c73300 T r600_is_uvd_state +ffffffff81c73340 T r600_is_internal_thermal_sensor +ffffffff81c73380 T r600_dpm_late_enable +ffffffff81c73490 T r600_get_platform_caps +ffffffff81c73530 T r600_parse_extended_power_table +ffffffff81c744a0 T r600_free_extended_power_table +ffffffff81c745a0 T r600_get_pcie_gen_support +ffffffff81c745f0 T r600_get_pcie_lane_support +ffffffff81c74650 T r600_encode_pci_lane_width +ffffffff81c75000 T r600_audio_update_hdmi +ffffffff81c75180 t r600_audio_status +ffffffff81c752a0 T r600_hdmi_buffer_status_changed +ffffffff81c75340 T r600_hdmi_update_audio_settings +ffffffff81c75710 T r600_audio_enable +ffffffff81c75790 T r600_audio_get_pin +ffffffff81c757c0 T r600_hdmi_update_acr +ffffffff81c75b60 T r600_set_avi_packet +ffffffff81c75d60 T r600_hdmi_audio_workaround +ffffffff81c75e30 T r600_hdmi_audio_set_dto +ffffffff81c75ef0 T r600_set_vbi_packet +ffffffff81c75fb0 T r600_set_audio_packet +ffffffff81c76280 T r600_set_mute +ffffffff81c76390 T r600_hdmi_enable +ffffffff81c77000 T radeon_acpi_is_pcie_performance_request_supported +ffffffff81c77050 T radeon_acpi_pcie_notify_device_ready +ffffffff81c77180 T radeon_acpi_pcie_performance_request +ffffffff81c773a0 T radeon_acpi_init +ffffffff81c77af0 t radeon_acpi_event +ffffffff81c77e40 T radeon_acpi_fini +ffffffff81c78000 T radeon_agp_head_init +ffffffff81c78050 T radeon_agp_init +ffffffff81c780a0 T radeon_agp_resume +ffffffff81c78140 T radeon_agp_fini +ffffffff81c78190 T radeon_agp_suspend +ffffffff81c79000 T radeon_agp_disable +ffffffff81c79120 T radeon_asic_init +ffffffff81c799b0 t radeon_invalid_rreg +ffffffff81c799f0 t radeon_invalid_wreg +ffffffff81c79a30 t radeon_invalid_get_allowed_info_register +ffffffff81c7a000 T radeon_atombios_i2c_init +ffffffff81c7a3b0 T radeon_atombios_lookup_gpio +ffffffff81c7a4b0 T radeon_get_atom_connector_info_from_object_table +ffffffff81c7ae10 t radeon_lookup_i2c_gpio +ffffffff81c7b110 t radeon_atom_apply_quirks +ffffffff81c7b540 T radeon_get_atom_connector_info_from_supported_devices_table +ffffffff81c7ba40 T radeon_atom_get_clock_info +ffffffff81c7bdc0 T radeon_atombios_sideport_present +ffffffff81c7be70 T radeon_atombios_get_tmds_info +ffffffff81c7bfb0 T radeon_atombios_get_ppll_ss_info +ffffffff81c7c0d0 T radeon_atombios_get_asic_ss_info +ffffffff81c7c440 T radeon_atombios_get_lvds_info +ffffffff81c7c7b0 T radeon_atombios_get_primary_dac_info +ffffffff81c7c860 T radeon_atom_get_tv_timings +ffffffff81c7cab0 T radeon_atombios_get_tv_info +ffffffff81c7cb60 T radeon_atombios_get_tv_dac_info +ffffffff81c7cc60 T radeon_atombios_get_default_voltages +ffffffff81c7cd20 T radeon_atombios_get_power_modes +ffffffff81c7ddf0 T radeon_atom_get_clock_dividers +ffffffff81c7e0f0 T radeon_atom_get_memory_pll_dividers +ffffffff81c7e230 T radeon_atom_set_clock_gating +ffffffff81c7e280 T radeon_atom_get_engine_clock +ffffffff81c7e2d0 T radeon_atom_get_memory_clock +ffffffff81c7e320 T radeon_atom_set_engine_clock +ffffffff81c7e370 T radeon_atom_set_memory_clock +ffffffff81c7e3d0 T radeon_atom_set_engine_dram_timings +ffffffff81c7e440 T radeon_atom_update_memory_dll +ffffffff81c7e490 T radeon_atom_set_ac_timing +ffffffff81c7e4e0 T radeon_atom_set_voltage +ffffffff81c7e5b0 T radeon_atom_get_max_vddc +ffffffff81c7e690 T radeon_atom_get_leakage_vddc_based_on_leakage_idx +ffffffff81c7e760 T radeon_atom_get_leakage_id_from_vbios +ffffffff81c7e820 T radeon_atom_get_leakage_vddc_based_on_leakage_params +ffffffff81c7ea30 T radeon_atom_get_voltage_evv +ffffffff81c7eae0 T radeon_atom_get_voltage_gpio_settings +ffffffff81c7ebe0 T radeon_atom_is_voltage_gpio +ffffffff81c7ed70 T radeon_atom_get_svi2_info +ffffffff81c7ee60 T radeon_atom_get_max_voltage +ffffffff81c7f000 T radeon_atom_get_min_voltage +ffffffff81c7f140 T radeon_atom_get_voltage_step +ffffffff81c7f240 T radeon_atom_round_to_true_voltage +ffffffff81c7f3b0 T radeon_atom_get_voltage_table +ffffffff81c7f620 T radeon_atom_get_memory_info +ffffffff81c7f7d0 T radeon_atom_get_mclk_range_table +ffffffff81c7fa20 T radeon_atom_init_mc_reg_table +ffffffff81c7fca0 T radeon_atom_initialize_bios_scratch_regs +ffffffff81c7fd70 T radeon_save_bios_scratch_regs +ffffffff81c7fe50 T radeon_restore_bios_scratch_regs +ffffffff81c7ff30 T radeon_atom_output_lock +ffffffff81c7ffc0 T radeon_atombios_connected_scratch_regs +ffffffff81c80740 T radeon_atombios_encoder_crtc_scratch_regs +ffffffff81c80880 T radeon_atombios_encoder_dpms_scratch_regs +ffffffff81c80aa0 t radeon_atombios_parse_misc_flags_1_3 +ffffffff81c80c90 t radeon_atombios_add_pplib_thermal_controller +ffffffff81c81090 t radeon_atombios_parse_pplib_clock_info +ffffffff81c813a0 t radeon_atombios_parse_pplib_non_clock_info +ffffffff81c82000 T radeon_audio_init +ffffffff81c82290 T radeon_audio_endpoint_rreg +ffffffff81c822d0 T radeon_audio_endpoint_wreg +ffffffff81c82310 T radeon_audio_get_pin +ffffffff81c82360 T radeon_audio_detect +ffffffff81c82690 T radeon_audio_fini +ffffffff81c827d0 T radeon_audio_mode_set +ffffffff81c82820 T radeon_audio_dpms +ffffffff81c82870 T radeon_audio_decode_dfs_div +ffffffff81c828d0 t radeon_audio_hdmi_mode_set +ffffffff81c83000 t radeon_audio_write_speaker_allocation +ffffffff81c830b0 t radeon_audio_write_sad_regs +ffffffff81c83180 t radeon_audio_set_avi_packet +ffffffff81c832c0 t radeon_audio_dp_mode_set +ffffffff81c83440 t radeon_audio_rreg +ffffffff81c83490 t radeon_audio_wreg +ffffffff81c84000 T radeon_benchmark +ffffffff81c84940 t radeon_benchmark_move +ffffffff81c84e00 t radeon_bo_reserve +ffffffff81c84f80 t radeon_bo_unreserve +ffffffff81c86000 T radeon_get_bios +ffffffff81c87000 t igp_read_bios_from_vram +ffffffff81c87110 t radeon_read_bios +ffffffff81c88000 T radeon_legacy_get_engine_clock +ffffffff81c880d0 T radeon_legacy_get_memory_clock +ffffffff81c881a0 T radeon_get_clock_info +ffffffff81c88730 T radeon_legacy_set_engine_clock +ffffffff81c88a80 T radeon_legacy_set_clock_gating +ffffffff81c8a000 T radeon_combios_check_hardcoded_edid +ffffffff81c8a100 T radeon_bios_get_hardcoded_edid +ffffffff81c8a180 T radeon_combios_i2c_init +ffffffff81c8a940 t combios_setup_i2c_bus +ffffffff81c8ac40 T radeon_combios_get_clock_info +ffffffff81c8ae30 T radeon_combios_sideport_present +ffffffff81c8aeb0 T radeon_combios_get_primary_dac_info +ffffffff81c8aff0 T radeon_combios_get_tv_info +ffffffff81c8b0f0 T radeon_combios_get_tv_dac_info +ffffffff81c8b3a0 T radeon_combios_get_lvds_info +ffffffff81c8b9f0 T radeon_legacy_get_tmds_info_from_table +ffffffff81c8bac0 T radeon_legacy_get_tmds_info_from_combios +ffffffff81c8bcd0 T radeon_legacy_get_ext_tmds_info_from_table +ffffffff81c8bf10 T radeon_legacy_get_ext_tmds_info_from_combios +ffffffff81c8c2a0 T radeon_get_legacy_connector_info_from_table +ffffffff81c8e660 T radeon_get_legacy_connector_info_from_bios +ffffffff81c8f3f0 T radeon_combios_get_power_modes +ffffffff81c8fca0 T radeon_external_tmds_setup +ffffffff81c8fd70 T radeon_combios_external_tmds_setup +ffffffff81c90330 T radeon_combios_asic_init +ffffffff81c90950 t combios_parse_mmio_table +ffffffff81c90b70 t combios_parse_pll_table +ffffffff81c90e40 T radeon_combios_initialize_bios_scratch_regs +ffffffff81c90ed0 T radeon_combios_output_lock +ffffffff81c90f30 T radeon_combios_connected_scratch_regs +ffffffff81c91290 T radeon_combios_encoder_crtc_scratch_regs +ffffffff81c91370 T radeon_combios_encoder_dpms_scratch_regs +ffffffff81c92000 T radeon_connector_hotplug +ffffffff81c92100 T radeon_get_monitor_bpc +ffffffff81c92530 T radeon_connector_edid +ffffffff81c925e0 T radeon_connector_encoder_get_dp_bridge_encoder_id +ffffffff81c92660 T radeon_connector_is_dp12_capable +ffffffff81c92700 T radeon_add_atom_connector +ffffffff81c93550 T radeon_add_legacy_connector +ffffffff81c93a90 t radeon_dp_detect +ffffffff81c93e50 t radeon_dvi_force +ffffffff81c93ea0 t radeon_connector_set_property +ffffffff81c946e0 t radeon_connector_unregister +ffffffff81c94740 t radeon_connector_destroy +ffffffff81c947b0 t radeon_best_single_encoder +ffffffff81c94830 t radeon_connector_get_edid +ffffffff81c94990 t radeon_dp_get_modes +ffffffff81c94cc0 t radeon_dp_mode_valid +ffffffff81c94e90 t radeon_dvi_encoder +ffffffff81c94f70 t radeon_fixup_lvds_native_mode +ffffffff81c950a0 t radeon_add_common_modes +ffffffff81c95190 t radeon_fp_native_mode +ffffffff81c95260 t radeon_lvds_set_property +ffffffff81c95350 t radeon_vga_detect +ffffffff81c95600 t radeon_connector_analog_encoder_conflict_solve +ffffffff81c95820 t radeon_vga_get_modes +ffffffff81c95910 t radeon_vga_mode_valid +ffffffff81c95970 t radeon_dvi_detect +ffffffff81c96010 t radeon_dvi_mode_valid +ffffffff81c961a0 t radeon_tv_detect +ffffffff81c963e0 t radeon_tv_get_modes +ffffffff81c964b0 t radeon_tv_mode_valid +ffffffff81c96500 t radeon_lvds_detect +ffffffff81c966a0 t radeon_lvds_get_modes +ffffffff81c96810 t radeon_lvds_mode_valid +ffffffff81c97000 T radeon_cs_parser_init +ffffffff81c97480 T radeon_cs_ioctl +ffffffff81c97fb0 t radeon_cs_parser_fini +ffffffff81c98140 T radeon_cs_packet_parse +ffffffff81c982f0 T radeon_cs_packet_next_is_pkt3_nop +ffffffff81c98350 T radeon_cs_dump_packet +ffffffff81c983d0 T radeon_cs_packet_next_reloc +ffffffff81c985a0 t cmp_size_smaller_first +ffffffff81c99000 T radeon_crtc_cursor_move +ffffffff81c99070 t radeon_lock_cursor +ffffffff81c99230 t radeon_cursor_move_locked +ffffffff81c99780 T radeon_crtc_cursor_set2 +ffffffff81c99a00 t radeon_hide_cursor +ffffffff81c99ac0 t radeon_bo_reserve +ffffffff81c99c40 t radeon_bo_unreserve +ffffffff81c99d20 t radeon_show_cursor +ffffffff81c99f70 T radeon_cursor_reset +ffffffff81c9a000 T radeon_is_px +ffffffff81c9a040 T radeon_program_register_sequence +ffffffff81c9a170 T radeon_pci_config_reset +ffffffff81c9a1a0 T radeon_surface_init +ffffffff81c9a360 T radeon_scratch_init +ffffffff81c9a3e0 T radeon_scratch_get +ffffffff81c9a460 T radeon_scratch_free +ffffffff81c9a4c0 T radeon_doorbell_get +ffffffff81c9a570 T radeon_doorbell_free +ffffffff81c9a5c0 T radeon_wb_disable +ffffffff81c9a5f0 T radeon_wb_fini +ffffffff81c9a690 t radeon_bo_reserve +ffffffff81c9a810 t radeon_bo_unreserve +ffffffff81c9a8f0 T radeon_wb_init +ffffffff81c9abe0 T radeon_vram_location +ffffffff81c9ad10 T radeon_gtt_location +ffffffff81c9ae40 T radeon_device_is_virtual +ffffffff81c9ae70 T radeon_card_posted +ffffffff81c9b090 T radeon_update_bandwidth_info +ffffffff81c9b110 T radeon_boot_test_post_card +ffffffff81c9b1d0 T radeon_dummy_page_init +ffffffff81c9b290 T radeon_dummy_page_fini +ffffffff81c9b2f0 T radeon_atombios_init +ffffffff81c9b480 t cail_reg_read +ffffffff81c9b4e0 t cail_reg_write +ffffffff81c9b540 t cail_ioreg_read +ffffffff81c9b560 t cail_ioreg_write +ffffffff81c9b580 t cail_mc_read +ffffffff81c9b5b0 t cail_mc_write +ffffffff81c9b5e0 t cail_pll_read +ffffffff81c9b610 t cail_pll_write +ffffffff81c9b640 T radeon_atombios_fini +ffffffff81c9b6e0 T radeon_combios_init +ffffffff81c9b720 T radeon_combios_fini +ffffffff81c9b750 T radeon_device_init +ffffffff81c9c230 T radeon_device_fini +ffffffff81c9c330 T radeon_suspend_kms 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radeon_bo_unreserve +ffffffff81ca1000 T radeon_dp_aux_transfer_native +ffffffff81ca2000 T radeondrm_probe +ffffffff81ca2060 T radeondrm_attach_kms +ffffffff81ca27a0 T radeondrm_detach_kms +ffffffff81ca2830 T radeondrm_activate_kms +ffffffff81ca28f0 T radeondrm_wsioctl +ffffffff81ca29a0 T radeondrm_wsmmap +ffffffff81ca29d0 T radeondrm_alloc_screen +ffffffff81ca2a00 T radeondrm_free_screen +ffffffff81ca2a10 T radeondrm_show_screen +ffffffff81ca2af0 T radeondrm_enter_ddb +ffffffff81ca2b50 T radeondrm_doswitch +ffffffff81ca2be0 T radeondrm_setpal +ffffffff81ca2de0 T radeondrm_attachhook +ffffffff81ca3110 T radeondrm_forcedetach +ffffffff81ca4000 T radeon_setup_encoder_clones +ffffffff81ca40b0 T radeon_get_encoder_enum +ffffffff81ca4230 T radeon_link_encoder_connector +ffffffff81ca4370 T radeon_encoder_set_active_device +ffffffff81ca4430 T radeon_get_connector_for_encoder +ffffffff81ca44b0 T radeon_get_connector_for_encoder_init +ffffffff81ca4530 T radeon_get_external_encoder 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radeon_fence_wait_empty +ffffffff81ca6df0 T radeon_fence_ref +ffffffff81ca6e30 T radeon_fence_unref +ffffffff81ca6e70 T radeon_fence_count_emitted +ffffffff81ca6ef0 T radeon_fence_need_sync +ffffffff81ca6f50 T radeon_fence_note_sync +ffffffff81ca7120 T radeon_fence_driver_start_ring +ffffffff81ca7310 T radeon_fence_driver_init +ffffffff81ca7450 T radeon_debugfs_fence_init +ffffffff81ca7480 T radeon_fence_driver_fini +ffffffff81ca76d0 T radeon_fence_driver_force_completion +ffffffff81ca77d0 t radeon_fence_get_driver_name +ffffffff81ca7800 t radeon_fence_get_timeline_name +ffffffff81ca78a0 t radeon_fence_enable_signaling +ffffffff81ca7ac0 t radeon_fence_is_signaled +ffffffff81ca7b80 t radeon_fence_default_wait +ffffffff81ca7d30 t radeon_fence_any_seq_signaled +ffffffff81ca7f30 t radeon_fence_check_lockup +ffffffff81ca8180 t __delayed_work_tick +ffffffff81ca81a0 t radeon_fence_check_signaled +ffffffff81ca8230 t radeon_fence_wait_cb +ffffffff81ca9000 T radeon_gart_table_ram_alloc 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radeon_gem_pwrite_ioctl +ffffffff81caa760 T radeon_gem_create_ioctl +ffffffff81caa880 T radeon_gem_userptr_ioctl +ffffffff81caa8b0 T radeon_gem_set_domain_ioctl +ffffffff81caaa10 T radeon_mode_dumb_mmap +ffffffff81caaac0 T radeon_gem_mmap_ioctl +ffffffff81caab80 T radeon_gem_busy_ioctl +ffffffff81caac30 T radeon_gem_wait_idle_ioctl +ffffffff81caad40 T radeon_gem_set_tiling_ioctl +ffffffff81caadf0 T radeon_gem_get_tiling_ioctl +ffffffff81caaec0 t radeon_bo_reserve +ffffffff81cab0d0 t radeon_bo_unreserve +ffffffff81cab1b0 T radeon_gem_va_ioctl +ffffffff81cab580 T radeon_gem_op_ioctl +ffffffff81cab680 T radeon_mode_dumb_create +ffffffff81cab780 T radeon_gem_debugfs_init +ffffffff81cac000 T radeon_ddc_probe +ffffffff81cac0c0 T radeon_router_select_ddc_port +ffffffff81cac320 T radeon_bb_set_bits +ffffffff81cac490 T radeon_bb_set_dir +ffffffff81cac4c0 T radeon_bb_read_bits +ffffffff81cac5a0 T radeon_acquire_bus +ffffffff81cac9f0 T radeon_release_bus +ffffffff81cacb60 T radeon_send_start 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radeon_irq_kms_init +ffffffff81cb03e0 t radeon_hotplug_work_func +ffffffff81cb0490 t radeon_dp_work_func +ffffffff81cb04c0 T radeon_irq_kms_fini +ffffffff81cb0660 T radeon_irq_kms_sw_irq_get +ffffffff81cb0700 T radeon_irq_kms_sw_irq_get_delayed +ffffffff81cb0740 T radeon_irq_kms_sw_irq_put +ffffffff81cb07d0 T radeon_irq_kms_pflip_irq_get +ffffffff81cb0880 T radeon_irq_kms_pflip_irq_put +ffffffff81cb0920 T radeon_irq_kms_enable_afmt +ffffffff81cb09b0 T radeon_irq_kms_disable_afmt +ffffffff81cb0a40 T radeon_irq_kms_enable_hpd +ffffffff81cb0b30 T radeon_irq_kms_disable_hpd +ffffffff81cb0c10 T radeon_irq_kms_set_irq_n_enabled +ffffffff81cb0d80 t __delayed_work_tick +ffffffff81cb1000 T radeon_info_ioctl +ffffffff81cb1bf0 T radeon_driver_lastclose_kms +ffffffff81cb1c00 T radeon_driver_open_kms +ffffffff81cb1d30 t radeon_bo_reserve +ffffffff81cb1eb0 T radeon_driver_postclose_kms +ffffffff81cb20d0 T radeon_get_vblank_counter_kms +ffffffff81cb2270 T radeon_enable_vblank_kms +ffffffff81cb2320 T radeon_disable_vblank_kms +ffffffff81cb3000 T radeon_crtc_set_base +ffffffff81cb3020 T radeon_crtc_do_set_base +ffffffff81cb35c0 T radeon_crtc_set_base_atomic +ffffffff81cb35e0 t radeon_bo_reserve +ffffffff81cb3760 t radeon_bo_unreserve +ffffffff81cb3840 T radeon_legacy_init_crtc +ffffffff81cb3890 t radeon_crtc_dpms +ffffffff81cb3a90 t radeon_crtc_prepare +ffffffff81cb3b10 t radeon_crtc_commit +ffffffff81cb3b80 t radeon_crtc_mode_fixup +ffffffff81cb3ba0 t radeon_crtc_mode_set +ffffffff81cb4ff0 t radeon_crtc_disable +ffffffff81cb6000 T radeon_legacy_get_backlight_level +ffffffff81cb6040 T radeon_legacy_set_backlight_level +ffffffff81cb6080 t radeon_legacy_lvds_update +ffffffff81cb63e0 T radeon_legacy_backlight_init +ffffffff81cb65b0 t radeon_legacy_backlight_get_brightness +ffffffff81cb6610 T radeon_add_legacy_encoder +ffffffff81cb6990 t radeon_legacy_backlight_update_status +ffffffff81cb6a20 t radeon_lvds_enc_destroy +ffffffff81cb6ab0 t radeon_legacy_lvds_dpms +ffffffff81cb6b00 t radeon_legacy_mode_fixup +ffffffff81cb6b70 t radeon_legacy_lvds_prepare +ffffffff81cb6c00 t radeon_legacy_lvds_commit +ffffffff81cb6c80 t radeon_legacy_lvds_mode_set +ffffffff81cb6e90 t radeon_legacy_encoder_disable +ffffffff81cb6ee0 t radeon_legacy_tmds_int_dpms +ffffffff81cb6fa0 t radeon_legacy_tmds_int_prepare +ffffffff81cb7070 t radeon_legacy_tmds_int_commit +ffffffff81cb7140 t radeon_legacy_tmds_int_mode_set +ffffffff81cb73b0 t radeon_legacy_primary_dac_dpms +ffffffff81cb74f0 t radeon_legacy_primary_dac_prepare +ffffffff81cb7550 t radeon_legacy_primary_dac_commit +ffffffff81cb75a0 t radeon_legacy_primary_dac_mode_set +ffffffff81cb7750 t radeon_legacy_primary_dac_detect +ffffffff81cb7940 t radeon_legacy_tv_dac_dpms +ffffffff81cb7b40 t radeon_legacy_tv_dac_prepare +ffffffff81cb7ba0 t radeon_legacy_tv_dac_commit +ffffffff81cb7bf0 t radeon_legacy_tv_dac_mode_set +ffffffff81cb7f90 t radeon_legacy_tv_dac_detect +ffffffff81cb8bc0 t radeon_ext_tmds_enc_destroy +ffffffff81cb8c10 t radeon_legacy_tmds_ext_dpms +ffffffff81cb8ce0 t radeon_legacy_tmds_ext_prepare +ffffffff81cb8db0 t radeon_legacy_tmds_ext_commit +ffffffff81cb8e80 t radeon_legacy_tmds_ext_mode_set +ffffffff81cba000 T radeon_legacy_tv_mode_set +ffffffff81cbb0b0 T radeon_legacy_tv_adjust_crtc_reg +ffffffff81cbb1c0 T radeon_legacy_tv_adjust_pll1 +ffffffff81cbb2b0 T radeon_legacy_tv_adjust_pll2 +ffffffff81cbc000 T radeon_ttm_bo_is_radeon_bo +ffffffff81cbc040 t radeon_ttm_bo_destroy +ffffffff81cbc170 T radeon_ttm_placement_from_domain +ffffffff81cbc2e0 T radeon_bo_create +ffffffff81cbc4a0 T radeon_bo_kmap +ffffffff81cbc580 T radeon_bo_check_tiling +ffffffff81cbc660 T radeon_bo_kunmap +ffffffff81cbc6f0 T radeon_bo_ref +ffffffff81cbc730 T radeon_bo_unref +ffffffff81cbc780 T radeon_bo_pin_restricted +ffffffff81cbcab0 T radeon_bo_pin +ffffffff81cbcad0 T radeon_bo_unpin +ffffffff81cbcb40 T radeon_bo_evict_vram +ffffffff81cbcba0 T radeon_bo_force_delete +ffffffff81cbcd10 T radeon_bo_init +ffffffff81cbcdf0 T radeon_bo_fini +ffffffff81cbce30 T radeon_bo_list_validate +ffffffff81cbd120 T radeon_bo_get_surface_reg +ffffffff81cbd3c0 T radeon_bo_set_tiling_flags +ffffffff81cbd6e0 T radeon_bo_get_tiling_flags +ffffffff81cbd730 T radeon_bo_move_notify +ffffffff81cbd7f0 T radeon_bo_fault_reserve_notify +ffffffff81cbdaf0 T radeon_bo_fence +ffffffff81cbe000 T radeon_pm_get_type_index +ffffffff81cbe080 T radeon_pm_acpi_event_handler +ffffffff81cbe160 t radeon_pm_update_profile +ffffffff81cbe280 t radeon_pm_set_clocks +ffffffff81cbec20 T radeon_dpm_enable_uvd +ffffffff81cbece0 T radeon_pm_compute_clocks +ffffffff81cbf720 T radeon_dpm_enable_vce +ffffffff81cbf790 T radeon_pm_suspend +ffffffff81cbf890 T radeon_pm_resume +ffffffff81cbfb80 T radeon_pm_init +ffffffff81cc0280 T radeon_pm_late_init +ffffffff81cc0340 T radeon_pm_fini +ffffffff81cc0450 t radeon_dpm_thermal_work_handler +ffffffff81cc0530 t radeon_dynpm_idle_work_handler +ffffffff81cc0820 t __delayed_work_tick +ffffffff81cc1000 T radeon_gem_prime_get_sg_table +ffffffff81cc1030 T radeon_gem_prime_pin +ffffffff81cc10c0 t radeon_bo_reserve +ffffffff81cc1240 t radeon_bo_unreserve +ffffffff81cc1320 T radeon_gem_prime_unpin +ffffffff81cc1390 T radeon_gem_prime_export +ffffffff81cc2000 T radeon_ring_supports_scratch_reg +ffffffff81cc2030 T radeon_ring_free_size +ffffffff81cc20e0 T radeon_ring_lockup_update +ffffffff81cc2140 T radeon_ring_alloc +ffffffff81cc22c0 T radeon_ring_lock +ffffffff81cc2340 T radeon_ring_commit +ffffffff81cc2440 T radeon_ring_unlock_commit +ffffffff81cc2470 T radeon_ring_undo +ffffffff81cc24a0 T radeon_ring_unlock_undo +ffffffff81cc24c0 T radeon_ring_test_lockup +ffffffff81cc25e0 T radeon_ring_backup +ffffffff81cc27a0 T radeon_ring_restore +ffffffff81cc2960 T radeon_ring_init +ffffffff81cc2b50 t radeon_bo_reserve +ffffffff81cc2cd0 t radeon_bo_unreserve +ffffffff81cc2db0 T radeon_ring_fini +ffffffff81cc3000 T radeon_sa_bo_manager_init +ffffffff81cc3190 T radeon_sa_bo_manager_fini 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radeon_vce_resume +ffffffff81ccfbf0 T radeon_vce_note_usage +ffffffff81ccfd10 T radeon_vce_free_handles +ffffffff81ccfdd0 T radeon_vce_get_destroy_msg +ffffffff81cd0070 T radeon_vce_get_create_msg +ffffffff81cd0430 T radeon_vce_cs_reloc +ffffffff81cd0530 T radeon_vce_cs_parse +ffffffff81cd0d60 T radeon_vce_semaphore_emit +ffffffff81cd0f30 T radeon_vce_ib_execute +ffffffff81cd10d0 T radeon_vce_fence_emit +ffffffff81cd1310 T radeon_vce_ring_test +ffffffff81cd1460 T radeon_vce_ib_test +ffffffff81cd1580 t __delayed_work_tick +ffffffff81cd2000 T radeon_vm_manager_init +ffffffff81cd2060 T radeon_vm_manager_fini +ffffffff81cd2180 T radeon_vm_get_bos +ffffffff81cd22b0 T radeon_vm_grab_id +ffffffff81cd2440 T radeon_vm_flush +ffffffff81cd25d0 T radeon_vm_fence +ffffffff81cd2680 T radeon_vm_bo_find +ffffffff81cd26e0 T radeon_vm_bo_add +ffffffff81cd27c0 T radeon_vm_bo_set_addr +ffffffff81cd2c20 t radeon_bo_unreserve +ffffffff81cd2d00 t radeon_vm_clear_bo +ffffffff81cd2ef0 T radeon_vm_map_gart +ffffffff81cd2f30 T radeon_vm_update_page_directory +ffffffff81cd32e0 T radeon_vm_bo_update +ffffffff81cd39c0 T radeon_vm_clear_freed +ffffffff81cd3aa0 T radeon_vm_clear_invalids +ffffffff81cd3b40 T radeon_vm_bo_rmv +ffffffff81cd3c30 T radeon_vm_bo_invalidate +ffffffff81cd3ce0 T radeon_vm_init +ffffffff81cd3f40 T radeon_vm_fini +ffffffff81cd4210 t radeon_bo_reserve +ffffffff81cd4390 t radeon_vm_frag_ptes +ffffffff81cd5000 T rs400_gart_adjust_size +ffffffff81cd50c0 T rs400_gart_tlb_flush +ffffffff81cd5140 T rs400_gart_init +ffffffff81cd5240 T rs400_gart_enable +ffffffff81cd55a0 T rs400_gart_disable +ffffffff81cd5600 T rs400_gart_fini +ffffffff81cd5670 T rs400_gart_get_page_entry +ffffffff81cd56d0 T rs400_gart_set_page +ffffffff81cd5710 T rs400_mc_wait_for_idle +ffffffff81cd57b0 T rs400_mc_rreg +ffffffff81cd5840 T rs400_mc_wreg +ffffffff81cd58c0 T rs400_resume +ffffffff81cd59f0 t rs400_mc_program +ffffffff81cd5af0 t rs400_startup +ffffffff81cd5ce0 T rs400_suspend +ffffffff81cd5d80 T rs400_fini +ffffffff81cd5e70 T rs400_init +ffffffff81cd7000 T avivo_wait_for_vblank +ffffffff81cd7280 T rs600_page_flip +ffffffff81cd7540 T rs600_page_flip_pending +ffffffff81cd75b0 T avivo_program_fmt +ffffffff81cd76d0 T rs600_pm_misc +ffffffff81cd7a10 T rs600_pm_prepare +ffffffff81cd7b10 T rs600_pm_finish +ffffffff81cd7c10 T rs600_hpd_sense +ffffffff81cd7c70 T rs600_hpd_set_polarity +ffffffff81cd7d30 T rs600_hpd_init +ffffffff81cd7e10 T rs600_hpd_fini +ffffffff81cd7eb0 T rs600_asic_reset +ffffffff81cd8120 T rs600_gart_tlb_flush +ffffffff81cd81e0 T rs600_gart_get_page_entry +ffffffff81cd8240 T rs600_gart_set_page +ffffffff81cd8280 T rs600_irq_set +ffffffff81cd8450 T rs600_irq_disable +ffffffff81cd84d0 t rs600_irq_ack +ffffffff81cd8680 T rs600_irq_process +ffffffff81cd89f0 T rs600_get_vblank_counter +ffffffff81cd8a40 T rs600_mc_wait_for_idle +ffffffff81cd8ae0 T rs600_bandwidth_update +ffffffff81cd8bd0 T rs600_mc_rreg +ffffffff81cd8c50 T rs600_mc_wreg +ffffffff81cd8cc0 T rs600_set_safe_registers +ffffffff81cd8d00 T rs600_resume +ffffffff81cd8e30 t rs600_startup +ffffffff81cd9670 T rs600_suspend +ffffffff81cd9770 T rs600_fini +ffffffff81cd9870 T rs600_init +ffffffff81cda000 T rs690_mc_wait_for_idle +ffffffff81cda0a0 T rs690_pm_info +ffffffff81cda330 T rs690_line_buffer_adjust +ffffffff81cda430 T rs690_bandwidth_update +ffffffff81cda750 t rs690_crtc_bandwidth_compute +ffffffff81cdab80 t rs690_compute_mode_priority +ffffffff81cdb000 T rs690_mc_rreg +ffffffff81cdb090 T rs690_mc_wreg +ffffffff81cdb110 T rs690_resume +ffffffff81cdb200 t rs690_startup +ffffffff81cdb4f0 T rs690_suspend +ffffffff81cdb550 T rs690_fini +ffffffff81cdb600 T rs690_init +ffffffff81cdc000 T rs780_dpm_enable +ffffffff81cdcbe0 T rs780_dpm_disable +ffffffff81cdccc0 T rs780_dpm_set_power_state +ffffffff81cdd0a0 t rs780_force_voltage +ffffffff81cdd1e0 t rs780_enable_voltage_scaling +ffffffff81cdd390 T rs780_dpm_setup_asic +ffffffff81cdd3c0 T rs780_dpm_display_configuration_changed +ffffffff81cdd510 T rs780_dpm_init +ffffffff81cdda80 T rs780_dpm_print_power_state +ffffffff81cddb10 T rs780_dpm_fini +ffffffff81cddba0 T rs780_dpm_get_sclk +ffffffff81cddbe0 T rs780_dpm_get_mclk +ffffffff81cddc10 T rs780_dpm_debugfs_print_current_performance_level +ffffffff81cddc40 T rs780_dpm_get_current_sclk +ffffffff81cddcd0 T rs780_dpm_get_current_mclk +ffffffff81cddd00 T rs780_dpm_force_performance_level +ffffffff81cddef0 t rs780_force_fbdiv +ffffffff81cdf000 T rv515_ring_start +ffffffff81cdfb30 T rv515_mc_wait_for_idle +ffffffff81cdfbd0 T rv515_vga_render_disable +ffffffff81cdfc20 T rv515_mc_rreg +ffffffff81cdfcb0 T rv515_mc_wreg +ffffffff81cdfd30 T rv515_debugfs +ffffffff81cdfd40 T rv515_mc_stop +ffffffff81ce02d0 T rv515_mc_resume +ffffffff81ce08e0 T rv515_clock_startup +ffffffff81ce09b0 T rv515_resume +ffffffff81ce0bf0 t rv515_startup +ffffffff81ce10d0 T rv515_suspend +ffffffff81ce1140 T rv515_set_safe_registers +ffffffff81ce1180 T rv515_fini +ffffffff81ce1230 T rv515_init +ffffffff81ce1520 T atom_rv515_force_tv_scaler +ffffffff81ce4bc0 T rv515_bandwidth_avivo_update +ffffffff81ce4d60 t rv515_crtc_bandwidth_compute +ffffffff81ce50a0 t rv515_compute_mode_priority +ffffffff81ce5550 T rv515_bandwidth_update +ffffffff81ce6000 T rv6xx_dpm_enable +ffffffff81ce67f0 t rv6xx_calculate_stepping_parameters +ffffffff81ce69c0 t rv6xx_program_stepping_parameters_except_lowest_entry +ffffffff81ce6fb0 t rv6xx_program_stepping_parameters_lowest_entry +ffffffff81ce7090 T rv6xx_dpm_disable +ffffffff81ce7410 T rv6xx_dpm_set_power_state +ffffffff81ce7e10 T rv6xx_setup_asic +ffffffff81ce7f50 T rv6xx_dpm_display_configuration_changed +ffffffff81ce7fd0 T rv6xx_dpm_init +ffffffff81ce8520 T rv6xx_dpm_print_power_state +ffffffff81ce85e0 T rv6xx_dpm_debugfs_print_current_performance_level +ffffffff81ce8610 T rv6xx_dpm_get_current_sclk +ffffffff81ce8680 T rv6xx_dpm_get_current_mclk +ffffffff81ce86f0 T rv6xx_dpm_fini +ffffffff81ce8780 T rv6xx_dpm_get_sclk +ffffffff81ce87c0 T rv6xx_dpm_get_mclk +ffffffff81ce8800 T rv6xx_dpm_force_performance_level +ffffffff81ce8990 t rv6xx_generate_steps +ffffffff81ce8ca0 t rv6xx_output_stepping +ffffffff81ce8dc0 t rv6xx_program_mclk_stepping_entry +ffffffff81ce9030 t rv6xx_program_engine_spread_spectrum +ffffffff81ce9310 t rv6xx_step_sw_voltage +ffffffff81cea000 T rv730_populate_sclk_value +ffffffff81cea240 T rv730_populate_mclk_value +ffffffff81cea460 T rv730_read_clock_registers +ffffffff81cea580 T rv730_populate_smc_acpi_state +ffffffff81cea730 T rv730_populate_smc_initial_state +ffffffff81cea8f0 T rv730_program_memory_timing_parameters +ffffffff81ceaad0 T rv730_start_dpm +ffffffff81ceab60 T rv730_stop_dpm +ffffffff81ceac20 T rv730_program_dcodt +ffffffff81ceacf0 T rv730_get_odt_values +ffffffff81ceb000 T rv740_get_decoded_reference_divider +ffffffff81ceb0a0 T rv740_get_dll_speed +ffffffff81ceb1d0 T rv740_populate_sclk_value +ffffffff81ceb3e0 T rv740_populate_mclk_value +ffffffff81ceb820 T rv740_read_clock_registers +ffffffff81ceb950 T rv740_populate_smc_acpi_state +ffffffff81cebb80 T rv740_enable_mclk_spread_spectrum +ffffffff81cebbe0 T rv740_get_mclk_frequency_ratio +ffffffff81cec000 T rv770_set_uvd_clocks +ffffffff81cec570 T rv770_get_xclk +ffffffff81cec5d0 T rv770_page_flip +ffffffff81cec8e0 T rv770_page_flip_pending +ffffffff81cec950 T rv770_get_temp +ffffffff81cec9b0 T rv770_pm_misc +ffffffff81ceca90 T r700_cp_stop +ffffffff81cecb10 T r700_cp_fini +ffffffff81cecba0 T rv770_set_clk_bypass_mode +ffffffff81ceccc0 T r700_vram_gtt_location +ffffffff81cece50 T rv770_resume +ffffffff81cecee0 t rv770_init_golden_registers +ffffffff81ced070 t rv770_startup +ffffffff81cef060 T rv770_suspend +ffffffff81cef280 T rv770_init +ffffffff81cef850 T rv770_fini +ffffffff81cf0000 T rv770_copy_dma +ffffffff81cf1000 T rv770_get_ps +ffffffff81cf1030 T rv770_get_pi +ffffffff81cf1060 T evergreen_get_pi +ffffffff81cf1090 T rv770_restore_cgcg +ffffffff81cf1110 T rv770_stop_dpm +ffffffff81cf11d0 T rv770_dpm_enabled +ffffffff81cf1210 T rv770_enable_thermal_protection +ffffffff81cf1270 T rv770_enable_acpi_pm +ffffffff81cf12c0 T rv770_get_seq_value +ffffffff81cf1300 T rv770_write_smc_soft_register +ffffffff81cf1330 T rv770_populate_smc_t +ffffffff81cf14d0 T rv770_populate_smc_sp +ffffffff81cf1530 T rv770_map_clkf_to_ibias +ffffffff81cf1590 T rv770_populate_vddc_value +ffffffff81cf1640 T rv770_populate_mvdd_value +ffffffff81cf1690 T rv770_calculate_memory_refresh_rate +ffffffff81cf1700 T rv770_enable_backbias +ffffffff81cf1760 T rv770_setup_bsp +ffffffff81cf1850 T rv770_program_git +ffffffff81cf18a0 T rv770_program_tp +ffffffff81cf1920 T rv770_program_tpp +ffffffff81cf1960 T rv770_program_sstp +ffffffff81cf19a0 T rv770_program_engine_speed_parameters +ffffffff81cf19f0 T rv770_program_vc +ffffffff81cf1a40 T rv770_clear_vc +ffffffff81cf1a80 T rv770_upload_firmware +ffffffff81cf1ac0 T rv770_populate_initial_mvdd_value +ffffffff81cf1b10 T rv770_get_memory_module_index +ffffffff81cf1b50 T rv770_enable_voltage_control +ffffffff81cf1bb0 T rv770_halt_smc +ffffffff81cf1c10 T rv770_resume_smc +ffffffff81cf1c60 T rv770_set_sw_state +ffffffff81cf1cc0 T rv770_set_boot_state +ffffffff81cf1d10 T rv770_set_uvd_clock_before_set_eng_clock +ffffffff81cf1d80 T rv770_set_uvd_clock_after_set_eng_clock +ffffffff81cf1df0 T rv770_restrict_performance_levels_before_switch +ffffffff81cf1e50 T rv770_dpm_force_performance_level +ffffffff81cf1f10 T r7xx_start_smc +ffffffff81cf1f40 T r7xx_stop_smc +ffffffff81cf1f70 T rv770_read_voltage_smio_registers +ffffffff81cf1fb0 T rv770_reset_smio_status +ffffffff81cf2070 T rv770_get_memory_type +ffffffff81cf20c0 T rv770_get_pcie_gen2_status +ffffffff81cf2130 T rv770_get_max_vddc +ffffffff81cf2190 T rv770_program_response_times +ffffffff81cf22e0 T rv770_enable_auto_throttle_source +ffffffff81cf2460 T rv770_dpm_enable +ffffffff81cf34e0 T rv770_dpm_late_enable +ffffffff81cf3610 T rv770_dpm_disable +ffffffff81cf3970 T rv770_dpm_set_power_state +ffffffff81cf3f70 T rv770_dpm_setup_asic +ffffffff81cf42d0 T rv770_dpm_display_configuration_changed +ffffffff81cf4350 T rv7xx_parse_power_table +ffffffff81cf4890 T rv770_get_engine_memory_ss +ffffffff81cf4920 T rv770_dpm_init +ffffffff81cf4b60 T rv770_dpm_print_power_state +ffffffff81cf4c80 T rv770_dpm_debugfs_print_current_performance_level +ffffffff81cf4cb0 T rv770_dpm_get_current_sclk +ffffffff81cf4d20 T rv770_dpm_get_current_mclk +ffffffff81cf4d90 T rv770_dpm_fini +ffffffff81cf4e20 T rv770_dpm_get_sclk +ffffffff81cf4e60 T rv770_dpm_get_mclk +ffffffff81cf4eb0 T rv770_dpm_vblank_too_short +ffffffff81cf4f20 t rv770_convert_power_level_to_smc +ffffffff81cf6000 T rv770_copy_bytes_to_smc +ffffffff81cf6240 T rv770_start_smc +ffffffff81cf6290 T rv770_reset_smc +ffffffff81cf62e0 T rv770_stop_smc_clock +ffffffff81cf6330 T rv770_start_smc_clock +ffffffff81cf6380 T rv770_is_smc_running +ffffffff81cf63c0 T rv770_send_msg_to_smc +ffffffff81cf64a0 T rv770_wait_for_smc_inactive +ffffffff81cf6540 T rv770_load_smc_ucode +ffffffff81cf66d0 T rv770_read_smc_sram_dword +ffffffff81cf6790 T rv770_write_smc_sram_dword +ffffffff81cf7000 T si_get_allowed_info_register +ffffffff81cf7090 T si_get_xclk +ffffffff81cf7100 T si_get_temp +ffffffff81cf7150 T si_mc_load_microcode +ffffffff81cf7420 T dce6_bandwidth_update +ffffffff81cf7820 t dce6_program_watermarks +ffffffff81cf82d0 T si_fence_ring_emit +ffffffff81cf8750 T si_ring_ib_execute +ffffffff81cf8f30 T si_gpu_check_soft_reset +ffffffff81cf90d0 T si_asic_reset +ffffffff81cf94f0 t si_gpu_pci_config_reset +ffffffff81cf98a0 T si_gfx_is_lockup +ffffffff81cf9910 T si_vram_gtt_location +ffffffff81cf99b0 T si_pcie_gart_tlb_flush +ffffffff81cf9a00 T si_ib_parse +ffffffff81cfa0b0 T si_vm_init +ffffffff81cfa0f0 T si_vm_fini +ffffffff81cfa120 T si_vm_flush +ffffffff81cfa800 T si_init_uvd_internal_cg +ffffffff81cfa850 T si_get_csb_size +ffffffff81cfa8e0 T si_get_csb_buffer +ffffffff81cfaa70 T si_rlc_reset +ffffffff81cfaaf0 T si_irq_set +ffffffff81cfb000 t si_disable_interrupt_state +ffffffff81cfb280 T si_irq_process +ffffffff81cfc480 t si_irq_ack +ffffffff81cfca80 T si_resume +ffffffff81cfcb10 t si_init_golden_registers +ffffffff81cfccd0 t si_startup +ffffffff81d01500 T si_suspend +ffffffff81d01880 T si_init +ffffffff81d02d50 t si_cp_fini +ffffffff81d02e40 t si_pcie_gart_fini +ffffffff81d02f40 T si_fini +ffffffff81d031f0 T si_get_gpu_clock_counter +ffffffff81d032c0 T si_set_uvd_clocks +ffffffff81d03830 T si_set_vce_clocks +ffffffff81d03d70 t si_vce_send_vcepll_ctlreq +ffffffff81d03fb0 t dce6_latency_watermark +ffffffff81d041e0 t si_rlc_stop +ffffffff81d04390 t si_vm_reg_valid +ffffffff81d044f0 t si_vm_packet3_cp_dma_check +ffffffff81d04670 t si_update_cg +ffffffff81d04bc0 t si_enable_mgcg +ffffffff81d04fe0 t si_enable_cgcg +ffffffff81d06000 T si_dma_is_lockup +ffffffff81d06080 T si_dma_vm_copy_pages +ffffffff81d06160 T si_dma_vm_write_pages +ffffffff81d062c0 T si_dma_vm_set_pages +ffffffff81d06420 T si_dma_vm_flush +ffffffff81d068b0 T si_copy_dma +ffffffff81d07000 T si_dpm_force_performance_level +ffffffff81d07160 T si_get_ddr3_mclk_frequency_ratio +ffffffff81d071c0 T si_get_mclk_frequency_ratio +ffffffff81d07240 T si_trim_voltage_table_to_fit_state_table +ffffffff81d07340 T si_dpm_setup_asic +ffffffff81d07510 T si_fan_ctrl_get_fan_speed_percent +ffffffff81d075a0 T si_fan_ctrl_set_fan_speed_percent +ffffffff81d07660 T si_fan_ctrl_set_mode +ffffffff81d078b0 T si_fan_ctrl_get_mode +ffffffff81d07900 T si_dpm_enable +ffffffff81d0cc00 t si_populate_smc_tdp_limits +ffffffff81d0ce10 T si_dpm_late_enable +ffffffff81d0cf60 T si_dpm_disable +ffffffff81d0d2e0 T si_dpm_pre_set_power_state +ffffffff81d0dee0 T si_dpm_set_power_state +ffffffff81d0f460 T si_dpm_post_set_power_state +ffffffff81d0f490 T si_dpm_display_configuration_changed +ffffffff81d0f570 T si_dpm_init +ffffffff81d11020 T si_dpm_fini +ffffffff81d110d0 T si_dpm_debugfs_print_current_performance_level +ffffffff81d11120 T si_dpm_get_current_sclk +ffffffff81d11190 T si_dpm_get_current_mclk +ffffffff81d11200 t si_get_std_voltage_value +ffffffff81d11330 t si_convert_power_level_to_smc +ffffffff81d11bd0 t si_calculate_sclk_params +ffffffff81d11df0 t si_convert_mc_reg_table_to_smc +ffffffff81d11f50 t si_program_cac_config_registers +ffffffff81d13000 T si_copy_bytes_to_smc +ffffffff81d13250 T si_start_smc +ffffffff81d13290 T si_reset_smc +ffffffff81d132d0 T si_program_jump_on_start +ffffffff81d13300 T si_stop_smc_clock +ffffffff81d13340 T si_start_smc_clock +ffffffff81d13380 T si_is_smc_running +ffffffff81d133e0 T si_send_msg_to_smc +ffffffff81d134b0 T si_wait_for_smc_inactive +ffffffff81d13550 T si_load_smc_ucode +ffffffff81d136f0 T si_read_smc_sram_dword +ffffffff81d137c0 T si_write_smc_sram_dword +ffffffff81d14000 T sumo_get_pi +ffffffff81d14030 T sumo_gfx_clockgating_initialize +ffffffff81d14110 T sumo_program_vc +ffffffff81d14150 T sumo_clear_vc +ffffffff81d14190 T sumo_program_sstp +ffffffff81d14210 T sumo_take_smu_control +ffffffff81d14240 T sumo_get_sleep_divider_from_id +ffffffff81d14270 T sumo_get_sleep_divider_id_from_clock +ffffffff81d14320 T sumo_dpm_enable +ffffffff81d149c0 T sumo_dpm_late_enable +ffffffff81d14f80 T sumo_dpm_disable +ffffffff81d152d0 T sumo_dpm_pre_set_power_state +ffffffff81d15790 T sumo_dpm_set_power_state +ffffffff81d162d0 T sumo_dpm_post_set_power_state +ffffffff81d16370 T sumo_dpm_setup_asic +ffffffff81d16470 T sumo_dpm_display_configuration_changed +ffffffff81d164a0 T sumo_convert_vid2_to_vid7 +ffffffff81d16500 T sumo_construct_sclk_voltage_mapping_table +ffffffff81d165c0 T sumo_construct_vid_mapping_table +ffffffff81d16740 T sumo_dpm_init +ffffffff81d17000 T sumo_dpm_print_power_state +ffffffff81d17120 T sumo_dpm_debugfs_print_current_performance_level +ffffffff81d17150 T sumo_dpm_get_current_sclk +ffffffff81d171c0 T sumo_dpm_get_current_mclk +ffffffff81d171f0 T sumo_dpm_get_current_vddc +ffffffff81d172c0 T sumo_dpm_fini +ffffffff81d17350 T sumo_dpm_get_sclk +ffffffff81d173a0 T sumo_dpm_get_mclk +ffffffff81d173d0 T sumo_dpm_force_performance_level +ffffffff81d177f0 t sumo_power_level_enable +ffffffff81d17a20 t sumo_program_power_level +ffffffff81d18000 T sumo_initialize_m3_arb +ffffffff81d182c0 T sumo_smu_notify_alt_vddnb_change +ffffffff81d18360 t sumo_send_msg_to_smu +ffffffff81d18500 T sumo_smu_pg_init +ffffffff81d18520 T sumo_enable_boost_timer +ffffffff81d18660 T sumo_set_tdp_limit +ffffffff81d186e0 T sumo_boost_state_enable +ffffffff81d18730 T sumo_get_running_fw_version +ffffffff81d19000 T trinity_dpm_enable_bapm +ffffffff81d19080 T trinity_dpm_enable +ffffffff81d19520 T trinity_dpm_late_enable +ffffffff81d19a80 T trinity_dpm_disable +ffffffff81d19e90 T trinity_dpm_force_performance_level +ffffffff81d19f50 T trinity_dpm_pre_set_power_state +ffffffff81d1a520 T trinity_dpm_set_power_state +ffffffff81d1aab0 T trinity_dpm_post_set_power_state +ffffffff81d1ab50 T trinity_dpm_setup_asic +ffffffff81d1abb0 T trinity_dpm_display_configuration_changed +ffffffff81d1ac40 T trinity_dpm_init +ffffffff81d1b540 T trinity_dpm_print_power_state +ffffffff81d1b650 T trinity_dpm_debugfs_print_current_performance_level +ffffffff81d1b6e0 T trinity_dpm_get_current_sclk +ffffffff81d1b740 T trinity_dpm_get_current_mclk +ffffffff81d1b770 T trinity_dpm_fini +ffffffff81d1b810 T trinity_dpm_get_sclk +ffffffff81d1b860 T trinity_dpm_get_mclk +ffffffff81d1b890 t trinity_program_power_level +ffffffff81d1c000 T trinity_dpm_bapm_enable +ffffffff81d1c150 T trinity_dpm_config +ffffffff81d1c230 T trinity_dpm_force_state +ffffffff81d1c310 T trinity_dpm_n_levels_disabled +ffffffff81d1c3f0 T trinity_uvd_dpm_config +ffffffff81d1c4c0 T trinity_dpm_no_forced_level +ffffffff81d1c590 T trinity_dce_enable_voltage_adjustment +ffffffff81d1c6e0 T trinity_gfx_dynamic_mgpg_config +ffffffff81d1c7b0 T trinity_acquire_mutex +ffffffff81d1c840 T trinity_release_mutex +ffffffff81d1d000 T uvd_v1_0_get_rptr +ffffffff81d1d040 T uvd_v1_0_get_wptr +ffffffff81d1d080 T uvd_v1_0_set_wptr +ffffffff81d1d0c0 T uvd_v1_0_fence_emit +ffffffff81d1d4b0 T uvd_v1_0_resume +ffffffff81d1d610 T uvd_v1_0_init +ffffffff81d1dba0 T uvd_v1_0_start +ffffffff81d1e320 T uvd_v1_0_fini +ffffffff81d1e490 T uvd_v1_0_stop +ffffffff81d1e600 T uvd_v1_0_ring_test +ffffffff81d1e7d0 T uvd_v1_0_semaphore_emit +ffffffff81d1e800 T uvd_v1_0_ib_execute +ffffffff81d1e9a0 T uvd_v1_0_ib_test +ffffffff81d1f000 T uvd_v2_2_fence_emit +ffffffff81d1f470 T uvd_v2_2_semaphore_emit +ffffffff81d1f680 T uvd_v2_2_resume +ffffffff81d20000 T uvd_v3_1_semaphore_emit +ffffffff81d21000 T uvd_v4_2_resume +ffffffff81d22000 T vce_v1_0_get_rptr +ffffffff81d22090 T vce_v1_0_get_wptr +ffffffff81d22120 T vce_v1_0_set_wptr +ffffffff81d221b0 T vce_v1_0_enable_mgcg +ffffffff81d22470 T vce_v1_0_load_fw +ffffffff81d22640 T vce_v1_0_bo_size +ffffffff81d226b0 T vce_v1_0_resume +ffffffff81d23020 T vce_v1_0_start +ffffffff81d237e0 T vce_v1_0_init +ffffffff81d24000 T vce_v2_0_enable_mgcg +ffffffff81d24070 t vce_v2_0_set_dyn_cg +ffffffff81d24260 T vce_v2_0_bo_size +ffffffff81d242d0 T vce_v2_0_resume +ffffffff81d25000 T aldebaran_reset_init +ffffffff81d250c0 t aldebaran_async_reset +ffffffff81d25120 t aldebaran_get_reset_handler +ffffffff81d251d0 T aldebaran_reset_fini +ffffffff81d25230 t aldebaran_mode2_prepare_hwcontext +ffffffff81d25350 t aldebaran_mode2_perform_reset +ffffffff81d25530 t aldebaran_mode2_restore_hwcontext +ffffffff81d25a10 t aldebaran_mode2_reset +ffffffff81d26000 T aldebaran_reg_base_init +ffffffff81d27000 T amdgpu_acpi_is_pcie_performance_request_supported +ffffffff81d27040 T amdgpu_acpi_is_power_shift_control_supported +ffffffff81d27070 T amdgpu_acpi_pcie_notify_device_ready +ffffffff81d27190 t amdgpu_atcs_call +ffffffff81d27280 T amdgpu_acpi_pcie_performance_request +ffffffff81d274d0 T amdgpu_acpi_power_shift_control +ffffffff81d27580 T amdgpu_acpi_smart_shift_update +ffffffff81d276d0 T amdgpu_acpi_init +ffffffff81d27790 t amdgpu_acpi_event +ffffffff81d27ad0 T amdgpu_acpi_get_backlight_caps +ffffffff81d27b20 T amdgpu_acpi_fini +ffffffff81d27b40 T amdgpu_acpi_should_gpu_reset +ffffffff81d27b90 T amdgpu_acpi_detect +ffffffff81d29000 T amdgpu_afmt_acr +ffffffff81d2a000 T amdgpu_amdkfd_init +ffffffff81d2a040 T amdgpu_amdkfd_fini +ffffffff81d2a070 T amdgpu_amdkfd_device_probe +ffffffff81d2a0a0 T amdgpu_amdkfd_device_init +ffffffff81d2a270 t amdgpu_amdkfd_reset_work +ffffffff81d2a2f0 T amdgpu_amdkfd_device_fini_sw +ffffffff81d2a340 T amdgpu_amdkfd_interrupt +ffffffff81d2a370 T amdgpu_amdkfd_suspend +ffffffff81d2a3a0 T amdgpu_amdkfd_resume_iommu +ffffffff81d2a3d0 T amdgpu_amdkfd_resume +ffffffff81d2a400 T amdgpu_amdkfd_pre_reset +ffffffff81d2a430 T amdgpu_amdkfd_post_reset +ffffffff81d2a460 T amdgpu_amdkfd_gpu_reset +ffffffff81d2a4c0 T amdgpu_amdkfd_alloc_gtt_mem +ffffffff81d2a770 t amdgpu_bo_reserve +ffffffff81d2a8d0 t amdgpu_bo_unreserve +ffffffff81d2a9b0 T amdgpu_amdkfd_free_gtt_mem +ffffffff81d2aa20 T amdgpu_amdkfd_alloc_gws +ffffffff81d2ab00 T amdgpu_amdkfd_free_gws +ffffffff81d2ab40 T amdgpu_amdkfd_get_fw_version +ffffffff81d2abf0 T amdgpu_amdkfd_get_local_mem_info +ffffffff81d2acc0 T amdgpu_amdkfd_get_gpu_clock_counter +ffffffff81d2ad00 T amdgpu_amdkfd_get_max_engine_clock_in_mhz +ffffffff81d2ad80 T amdgpu_amdkfd_get_cu_info +ffffffff81d2aed0 T amdgpu_amdkfd_get_dmabuf_info +ffffffff81d2b010 T amdgpu_amdkfd_get_xgmi_hops_count +ffffffff81d2b080 T amdgpu_amdkfd_get_xgmi_bandwidth_mbytes +ffffffff81d2b110 T amdgpu_amdkfd_get_pcie_bandwidth_mbytes +ffffffff81d2b280 T amdgpu_amdkfd_submit_ib +ffffffff81d2b3e0 T amdgpu_amdkfd_set_compute_idle +ffffffff81d2b430 T amdgpu_amdkfd_is_kfd_vmid +ffffffff81d2b470 T amdgpu_amdkfd_flush_gpu_tlb_vmid +ffffffff81d2b510 T amdgpu_amdkfd_flush_gpu_tlb_pasid +ffffffff81d2b540 T amdgpu_amdkfd_have_atomics_support +ffffffff81d2b570 T amdgpu_amdkfd_ras_poison_consumption_handler +ffffffff81d2b5d0 T amdgpu_amdkfd_ras_query_utcl2_poison_status +ffffffff81d2c000 T amdgpu_atom_execute_table +ffffffff81d2c0a0 t amdgpu_atom_execute_table_locked +ffffffff81d2c3f0 T amdgpu_atom_parse +ffffffff81d2c940 T amdgpu_atom_destroy +ffffffff81d2c980 T amdgpu_atom_asic_init +ffffffff81d2caa0 T amdgpu_atom_parse_data_header +ffffffff81d2cb40 T amdgpu_atom_parse_cmd_header +ffffffff81d2cbc0 t atom_op_move +ffffffff81d2cda0 t atom_op_and +ffffffff81d2cf80 t atom_op_or +ffffffff81d2d160 t atom_op_shift_left +ffffffff81d2d350 t atom_op_shift_right +ffffffff81d2d540 t atom_op_mul +ffffffff81d2d690 t atom_op_div +ffffffff81d2d800 t atom_op_add +ffffffff81d2d9e0 t atom_op_sub +ffffffff81d2dbc0 t atom_op_setport +ffffffff81d2dd40 t atom_op_setregblock +ffffffff81d2de00 t atom_op_setfbbase +ffffffff81d2ded0 t atom_op_compare +ffffffff81d2e0c0 t atom_op_switch +ffffffff81d2e310 t atom_op_jump +ffffffff81d2e590 t atom_op_test +ffffffff81d2e750 t atom_op_delay +ffffffff81d2e830 t atom_op_calltable +ffffffff81d2e980 t atom_op_repeat +ffffffff81d2e9b0 t atom_op_clear +ffffffff81d2eac0 t atom_op_nop +ffffffff81d2eaf0 t atom_op_eot +ffffffff81d2eb20 t atom_op_mask +ffffffff81d2edf0 t atom_op_postcard +ffffffff81d2eea0 t atom_op_beep +ffffffff81d2eec0 t atom_op_savereg +ffffffff81d2eef0 t atom_op_restorereg +ffffffff81d2ef20 t atom_op_setdatablock +ffffffff81d2f060 t atom_op_xor +ffffffff81d2f240 t atom_op_shl +ffffffff81d2f460 t atom_op_shr +ffffffff81d2f680 t atom_op_debug +ffffffff81d2f730 t atom_op_processds +ffffffff81d2f7f0 t atom_op_mul32 +ffffffff81d2f950 t atom_op_div32 +ffffffff81d2fae0 t atom_put_dst +ffffffff81d2ffb0 t atom_get_src_int +ffffffff81d30660 t atom_iio_execute +ffffffff81d31000 T amdgpu_atombios_lookup_i2c_gpio +ffffffff81d31260 T amdgpu_atombios_i2c_init +ffffffff81d31540 T amdgpu_atombios_lookup_gpio +ffffffff81d31640 T amdgpu_atombios_has_dce_engine_info +ffffffff81d316c0 T amdgpu_atombios_get_connector_info_from_object_table +ffffffff81d31f10 T amdgpu_atombios_get_clock_info +ffffffff81d32250 T amdgpu_atombios_get_gfx_info +ffffffff81d32310 T amdgpu_atombios_get_vram_width +ffffffff81d323a0 T amdgpu_atombios_get_asic_ss_info +ffffffff81d32710 T amdgpu_atombios_get_clock_dividers +ffffffff81d32930 T amdgpu_atombios_has_gpu_virtualization_table +ffffffff81d32980 T amdgpu_atombios_scratch_regs_lock +ffffffff81d329e0 T amdgpu_atombios_scratch_regs_engine_hung +ffffffff81d32a30 T amdgpu_atombios_scratch_regs_set_backlight_level +ffffffff81d32a90 T amdgpu_atombios_scratch_need_asic_init +ffffffff81d32ae0 T amdgpu_atombios_copy_swap +ffffffff81d32b00 T amdgpu_atombios_fini +ffffffff81d32ba0 T amdgpu_atombios_init +ffffffff81d32e40 t cail_reg_read +ffffffff81d32e60 t cail_reg_write +ffffffff81d32e80 t cail_mc_read +ffffffff81d32eb0 t cail_mc_write +ffffffff81d32ee0 t cail_pll_read +ffffffff81d32f10 t cail_pll_write +ffffffff81d32f40 T amdgpu_atombios_get_data_table +ffffffff81d33000 T amdgpu_atombios_crtc_overscan_setup +ffffffff81d33150 T amdgpu_atombios_crtc_scaler_setup +ffffffff81d331d0 T amdgpu_atombios_crtc_lock +ffffffff81d33230 T amdgpu_atombios_crtc_enable +ffffffff81d33290 T amdgpu_atombios_crtc_blank +ffffffff81d332f0 T amdgpu_atombios_crtc_powergate +ffffffff81d33360 T amdgpu_atombios_crtc_powergate_init +ffffffff81d333d0 T amdgpu_atombios_crtc_set_dtd_timing +ffffffff81d334e0 T amdgpu_atombios_crtc_set_disp_eng_pll +ffffffff81d335d0 T amdgpu_atombios_crtc_set_dce_clock +ffffffff81d336c0 T amdgpu_atombios_crtc_program_pll +ffffffff81d339d0 T amdgpu_atombios_crtc_prepare_pll +ffffffff81d33ed0 T amdgpu_atombios_crtc_set_pll +ffffffff81d35000 T amdgpu_atombios_dp_aux_init +ffffffff81d35090 t amdgpu_atombios_dp_aux_transfer +ffffffff81d35200 T amdgpu_atombios_dp_get_sinktype +ffffffff81d35270 T amdgpu_atombios_dp_get_dpcd +ffffffff81d35420 T amdgpu_atombios_dp_get_panel_mode +ffffffff81d35510 T amdgpu_atombios_dp_set_link_config +ffffffff81d35590 t amdgpu_atombios_dp_get_dp_link_config +ffffffff81d35710 T amdgpu_atombios_dp_mode_valid_helper +ffffffff81d35790 T amdgpu_atombios_dp_needs_link_train +ffffffff81d35800 T amdgpu_atombios_dp_set_rx_power_state +ffffffff81d35880 T amdgpu_atombios_dp_link_train +ffffffff81d35dd0 t amdgpu_atombios_dp_process_aux_ch +ffffffff81d35f40 t amdgpu_atombios_dp_get_adjust_train +ffffffff81d37000 T amdgpu_atombios_encoder_get_backlight_level_from_reg +ffffffff81d37050 T amdgpu_atombios_encoder_set_backlight_level_to_reg +ffffffff81d370a0 T amdgpu_atombios_encoder_get_backlight_level +ffffffff81d37100 T amdgpu_atombios_encoder_set_backlight_level +ffffffff81d37210 T amdgpu_atombios_encoder_setup_dig_transmitter +ffffffff81d37be0 T amdgpu_atombios_encoder_init_backlight +ffffffff81d37d80 t amdgpu_atombios_encoder_get_backlight_brightness +ffffffff81d37de0 T amdgpu_atombios_encoder_fini_backlight +ffffffff81d37e70 T amdgpu_atombios_encoder_is_digital +ffffffff81d37ec0 T amdgpu_atombios_encoder_mode_fixup +ffffffff81d37fa0 T amdgpu_atombios_encoder_get_encoder_mode +ffffffff81d38140 T amdgpu_atombios_encoder_setup_dig_encoder +ffffffff81d38600 T amdgpu_atombios_encoder_set_edp_panel_power +ffffffff81d38700 T amdgpu_atombios_encoder_dpms +ffffffff81d38870 t amdgpu_atombios_encoder_setup_dig +ffffffff81d38be0 t amdgpu_atombios_encoder_setup_dvo +ffffffff81d38d80 T amdgpu_atombios_encoder_set_crtc_source +ffffffff81d39160 T amdgpu_atombios_encoder_init_dig +ffffffff81d39230 t amdgpu_atombios_encoder_setup_external_encoder +ffffffff81d39490 T amdgpu_atombios_encoder_dac_detect +ffffffff81d39670 T amdgpu_atombios_encoder_dig_detect +ffffffff81d39770 T amdgpu_atombios_encoder_setup_ext_encoder_ddc +ffffffff81d397c0 T amdgpu_atombios_encoder_set_bios_scratch_regs +ffffffff81d39d60 T amdgpu_atombios_encoder_get_lcd_info +ffffffff81d3a0c0 T amdgpu_atombios_encoder_get_dig_info +ffffffff81d3a130 t amdgpu_atombios_encoder_update_backlight_status +ffffffff81d3b000 T amdgpu_atombios_i2c_xfer +ffffffff81d3b3b0 T amdgpu_atombios_i2c_func +ffffffff81d3b3e0 T amdgpu_atombios_i2c_channel_trans +ffffffff81d3c000 T amdgpu_atomfirmware_query_firmware_capability +ffffffff81d3c090 T amdgpu_atomfirmware_gpu_virtualization_supported +ffffffff81d3c0c0 T amdgpu_atomfirmware_scratch_regs_init +ffffffff81d3c140 T amdgpu_atomfirmware_allocate_fb_scratch +ffffffff81d3c270 T amdgpu_atomfirmware_get_vram_info +ffffffff81d3c9d0 T amdgpu_atomfirmware_mem_ecc_supported +ffffffff81d3ca80 T amdgpu_atomfirmware_sram_ecc_supported +ffffffff81d3cab0 T amdgpu_atomfirmware_dynamic_boot_config_supported +ffffffff81d3cae0 T amdgpu_atomfirmware_ras_rom_addr +ffffffff81d3cb80 T amdgpu_atomfirmware_get_clock_info +ffffffff81d3cda0 T amdgpu_atomfirmware_get_gfx_info +ffffffff81d3cf40 T amdgpu_atomfirmware_mem_training_supported +ffffffff81d3cf80 T amdgpu_atomfirmware_get_fw_reserved_fb_size +ffffffff81d3d010 T amdgpu_atomfirmware_asic_init +ffffffff81d3e000 T amdgpu_benchmark +ffffffff81d3e7a0 t amdgpu_benchmark_move +ffffffff81d3f000 T amdgpu_read_bios +ffffffff81d3f190 t check_atom_bios +ffffffff81d3f2a0 T amdgpu_get_bios +ffffffff81d3f850 t igp_read_bios_from_vram +ffffffff81d3f990 T amdgpu_soc15_read_bios_from_rom +ffffffff81d40000 T amdgpu_bo_list_create +ffffffff81d40290 T amdgpu_bo_list_get +ffffffff81d402f0 T amdgpu_bo_list_get_list +ffffffff81d40450 T amdgpu_bo_list_put +ffffffff81d40500 T amdgpu_bo_create_list_entry_array +ffffffff81d40650 T amdgpu_bo_list_ioctl +ffffffff81d41000 T amdgpu_cgs_create_device +ffffffff81d41080 T amdgpu_cgs_destroy_device +ffffffff81d410a0 t amdgpu_cgs_read_register +ffffffff81d410c0 t amdgpu_cgs_write_register +ffffffff81d410e0 t amdgpu_cgs_read_ind_register +ffffffff81d411c0 t amdgpu_cgs_write_ind_register +ffffffff81d41270 t amdgpu_cgs_get_firmware_info +ffffffff81d42000 T amdgpu_connector_hotplug +ffffffff81d420f0 T amdgpu_connector_get_monitor_bpc +ffffffff81d42380 T amdgpu_connector_edid +ffffffff81d42430 T amdgpu_connector_encoder_get_dp_bridge_encoder_id +ffffffff81d424b0 T amdgpu_connector_is_dp12_capable +ffffffff81d42540 T amdgpu_connector_add +ffffffff81d43150 t amdgpu_connector_dp_detect +ffffffff81d434c0 t amdgpu_connector_dvi_force +ffffffff81d43510 t amdgpu_connector_set_property +ffffffff81d43a80 t amdgpu_connector_late_register +ffffffff81d43ae0 t amdgpu_connector_unregister +ffffffff81d43b40 t amdgpu_connector_destroy +ffffffff81d43bb0 t amdgpu_connector_best_single_encoder +ffffffff81d43c30 t amdgpu_connector_dp_get_modes +ffffffff81d43f60 t amdgpu_connector_dp_mode_valid +ffffffff81d44080 t amdgpu_connector_dvi_encoder +ffffffff81d44160 t amdgpu_connector_get_edid +ffffffff81d442e0 t amdgpu_connector_fixup_lcd_native_mode +ffffffff81d44410 t amdgpu_connector_add_common_modes +ffffffff81d44500 t amdgpu_connector_lcd_native_mode +ffffffff81d445d0 t amdgpu_connector_set_lcd_property +ffffffff81d446c0 t amdgpu_connector_vga_detect +ffffffff81d44910 t amdgpu_connector_vga_get_modes +ffffffff81d44a00 t amdgpu_connector_vga_mode_valid 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sdmmc_cisptr -ffffffff8250f0a0 T sdmmc_read_cis -ffffffff8250f3a0 T sdmmc_print_cis -ffffffff8250f510 T sdmmc_check_cis_quirks -ffffffff82510000 T sdmmc_io_enable -ffffffff825102a0 T sdmmc_io_reset -ffffffff825103c0 T sdmmc_io_send_op_cond -ffffffff82510530 T sdmmc_io_scan -ffffffff82510680 T sdmmc_io_init -ffffffff825107a0 T sdmmc_io_set_highspeed -ffffffff82510a40 T sdmmc_io_set_bus_width -ffffffff82510cd0 T sdmmc_io_function_ready -ffffffff82510e40 T sdmmc_io_read_1 -ffffffff82510f90 T sdmmc_io_function_enable -ffffffff82511360 T sdmmc_io_write_1 -ffffffff825114e0 T sdmmc_io_function_disable -ffffffff82511760 T sdmmc_io_attach -ffffffff82511840 T sdmmc_print -ffffffff82511a90 T sdmmc_submatch -ffffffff82511b10 T sdmmc_io_detach -ffffffff82511bb0 T sdmmc_io_rw_direct -ffffffff82511d50 T sdmmc_io_rw_extended_subr -ffffffff82511ef0 T sdmmc_io_rw_extended -ffffffff825122e0 T sdmmc_io_read_2 -ffffffff82512430 T sdmmc_io_write_2 -ffffffff82512590 T sdmmc_io_read_4 -ffffffff825126e0 T sdmmc_io_write_4 -ffffffff82512840 T sdmmc_io_read_multi_1 -ffffffff82512930 T sdmmc_io_write_multi_1 -ffffffff82512a20 T sdmmc_io_read_region_1 -ffffffff82512b10 T sdmmc_io_write_region_1 -ffffffff82512c00 T sdmmc_io_xchg -ffffffff82512d90 T sdmmc_intr_enable -ffffffff82513000 T sdmmc_intr_disable -ffffffff82513270 T sdmmc_intr_establish -ffffffff82513370 T sdmmc_intr_disestablish -ffffffff82513450 T sdmmc_card_intr -ffffffff825134a0 T sdmmc_intr_task -ffffffff82513530 T sdmmc_io_set_blocklen -ffffffff82514000 T sdmmc_mem_enable -ffffffff825144e0 T sdmmc_mem_send_op_cond -ffffffff82514690 T sdmmc_mem_signal_voltage -ffffffff82514750 T sdmmc_mem_scan -ffffffff82514a50 T sdmmc_decode_csd -ffffffff82514e50 T sdmmc_decode_cid -ffffffff82515290 T sdmmc_mem_send_scr -ffffffff825153d0 T sdmmc_mem_decode_scr -ffffffff82515440 T sdmmc_mem_send_cxd_data -ffffffff825155b0 T sdmmc_mem_set_bus_width -ffffffff825156c0 T sdmmc_mem_sd_switch -ffffffff82515970 T sdmmc_be512_to_bitfield512 -ffffffff82515a20 T sdmmc_mem_mmc_switch -ffffffff82515b10 T sdmmc_mem_init -ffffffff82515c60 T sdmmc_mem_set_blocklen -ffffffff82515d60 T sdmmc_mem_sd_init -ffffffff82516310 T sdmmc_mem_mmc_init -ffffffff82516c30 T sdmmc_mem_select_transfer_mode -ffffffff82516cb0 T sdmmc_mem_execute_tuning -ffffffff82516d40 T sdmmc_mem_read_block_subr -ffffffff825170a0 T sdmmc_mem_single_read_block -ffffffff82517160 T sdmmc_mem_read_block -ffffffff82517320 T sdmmc_mem_write_block_subr -ffffffff82517670 T sdmmc_mem_single_write_block -ffffffff82517730 T sdmmc_mem_write_block -ffffffff825178f0 T sdmmc_mem_hibernate_write -ffffffff82518000 T sdmmc_scsi_cmd -ffffffff825181f0 T sdmmc_minphys -ffffffff82518260 T sdmmc_scsi_attach -ffffffff82518450 T sdmmc_alloc_ccbs -ffffffff82518590 T sdmmc_free_ccbs -ffffffff825185f0 T sdmmc_scsi_detach -ffffffff82518740 T sdmmc_stimeout -ffffffff825187c0 T sdmmc_ccb_alloc -ffffffff82518870 T sdmmc_ccb_free -ffffffff82518950 T sdmmc_inquiry -ffffffff82518b70 T sdmmc_start_xs -ffffffff82518c60 T sdmmc_complete_xs -ffffffff82518d20 T sdmmc_done_xs -ffffffff82518d60 T sdmmc_scsi_hibernate_io -ffffffff82519000 T bwfm_sdio_preinit -ffffffff825194f0 T bwfm_sdio_txcheck -ffffffff82519530 T bwfm_sdio_txdata -ffffffff825195a0 T bwfm_sdio_txctl -ffffffff825196f0 T bwfm_sdio_buscore_read -ffffffff82519700 T bwfm_sdio_buscore_write -ffffffff82519710 T bwfm_sdio_buscore_prepare -ffffffff82519840 T bwfm_sdio_buscore_activate -ffffffff825198c0 T bwfm_sdio_match -ffffffff82519980 T bwfm_sdio_attach -ffffffff82519c40 T bwfm_sdio_detach -ffffffff82519ca0 T bwfm_sdio_task -ffffffff82519df0 T bwfm_sdio_write_1 -ffffffff82519e20 T bwfm_sdio_read_1 -ffffffff82519e50 T bwfm_sdio_write_4 -ffffffff82519f00 T bwfm_sdio_read_4 -ffffffff82519fa0 T bwfm_sdio_load_microcode -ffffffff8251a200 T bwfm_sdio_clkctl -ffffffff8251a330 T bwfm_sdio_dev_write -ffffffff8251a370 T bwfm_sdio_intr -ffffffff8251a3b0 T bwfm_sdio_ram_read_write -ffffffff8251a5e0 T bwfm_sdio_htclk -ffffffff8251a840 T bwfm_sdio_readshared -ffffffff8251a900 T bwfm_sdio_dev_read -ffffffff8251a930 T bwfm_sdio_rx_frames -ffffffff8251acc0 T bwfm_sdio_tx_frames -ffffffff8251ada0 T bwfm_sdio_backplane -ffffffff8251ae50 T bwfm_sdio_buf_read -ffffffff8251af20 T bwfm_sdio_buf_write -ffffffff8251afd0 T bwfm_sdio_frame_read_write -ffffffff8251b150 T bwfm_sdio_newbuf -ffffffff8251b1d0 T bwfm_sdio_tx_ok -ffffffff8251b220 T bwfm_sdio_tx_ctrlframe -ffffffff8251b320 T bwfm_sdio_tx_dataframe -ffffffff8251b470 T bwfm_sdio_rx_glom -ffffffff8251c000 T onewire_match -ffffffff8251c050 T onewire_attach -ffffffff8251c0f0 T onewire_detach -ffffffff8251c160 T onewire_activate -ffffffff8251c180 T onewire_scan -ffffffff8251c390 T onewire_createthread -ffffffff8251c3f0 T onewire_print -ffffffff8251c4c0 T onewirebus_print -ffffffff8251c510 T onewire_lock -ffffffff8251c530 T onewire_unlock -ffffffff8251c540 T onewire_reset -ffffffff8251c560 T onewire_bit -ffffffff8251c580 T onewire_read_byte -ffffffff8251c6c0 T onewire_write_byte -ffffffff8251c790 T onewire_read_block -ffffffff8251c830 T onewire_write_block -ffffffff8251c8d0 T onewire_triplet -ffffffff8251c9b0 T onewire_matchrom -ffffffff8251cb00 T onewire_search -ffffffff8251ce90 T onewire_thread -ffffffff8251d000 T onewire_crc -ffffffff8251d0e0 T onewire_crc16 -ffffffff8251d1c0 T onewire_famname -ffffffff8251d200 T onewire_matchbyfam -ffffffff8251e000 T owid_match -ffffffff8251e020 T owid_attach -ffffffff8251e0f0 T owid_detach -ffffffff8251e130 T owid_activate -ffffffff8251f000 T owsbm_match -ffffffff8251f020 T owsbm_attach -ffffffff8251f1c0 T owsbm_detach -ffffffff8251f230 T owsbm_activate -ffffffff8251f260 T owsbm_update -ffffffff82520000 T owtemp_match -ffffffff82520020 T owtemp_attach -ffffffff82520110 T owtemp_detach -ffffffff82520180 T owtemp_activate -ffffffff825201b0 T owtemp_update -ffffffff82521000 T owctr_match -ffffffff82521020 T owctr_attach -ffffffff82521160 T owctr_detach -ffffffff825211d0 T owctr_activate -ffffffff82521200 T owctr_update -ffffffff82521230 T owctr_update_counter -ffffffff82522000 A __text_page_start -ffffffff82522000 T Xsyscall_meltdown -ffffffff8252200c T Xsyscall -ffffffff8252226e t Xsyscall_trampback -ffffffff82522280 T intr_user_exit -ffffffff825222c2 t intr_user_exit_post_ast -ffffffff825223ee t Xiretq_trampback -ffffffff825223fa T doreti_iret -ffffffff82523000 T alltraps -ffffffff82523138 T recall_trap -ffffffff82523150 T alltraps_kern -ffffffff82523153 T alltraps_kern_meltdown -ffffffff82524000 ? Xsyscall32 -ffffffff82524000 A __kutext_start -ffffffff82524000 A __text_page_end -ffffffff82525000 ? Xtrap00 -ffffffff82525010 ? Xtrap01 -ffffffff82525020 ? Xtrap02 -ffffffff82525024 c calltrap_specstk -ffffffff825250f0 ? calltrap_specstk_tramp -ffffffff82525110 ? Xtrap03 -ffffffff82525120 ? Xtrap04 -ffffffff82525130 ? Xtrap05 -ffffffff82525140 ? Xtrap06 -ffffffff82525150 ? Xtrap07 -ffffffff82525160 ? Xtrap08 -ffffffff82525170 ? Xtrap09 -ffffffff82525180 ? Xtrap0a -ffffffff82525190 ? Xtrap0b -ffffffff825251a0 ? Xtrap0c -ffffffff825251b0 ? Xtrap0d -ffffffff82525230 ? Xtrap0e -ffffffff82525240 ? Xintrspurious -ffffffff82525240 ? Xtrap0f -ffffffff82525250 ? Xtrap10 -ffffffff82525260 ? Xtrap11 -ffffffff82525270 ? Xtrap12 -ffffffff82525280 ? Xtrap13 -ffffffff82525290 ? Xtrap14 -ffffffff82525290 ? Xtrap15 -ffffffff82525290 ? Xtrap16 -ffffffff82525290 ? Xtrap17 -ffffffff82525290 ? Xtrap18 -ffffffff82525290 ? Xtrap19 -ffffffff82525290 ? Xtrap1a -ffffffff82525290 ? Xtrap1b -ffffffff82525290 ? Xtrap1c -ffffffff82525290 ? Xtrap1d -ffffffff82525290 ? Xtrap1e -ffffffff82525290 ? Xtrap1f -ffffffff825252a0 ? x2apic_eoi -ffffffff825252c0 ? Xintr_lapic_ipi -ffffffff825252f0 ? Xipi_invltlb -ffffffff82525310 ? Xipi_invlpg -ffffffff82525340 ? Xipi_invlrange -ffffffff82525380 ? Xipi_invltlb_pcid -ffffffff825253c0 ? Xipi_invlpg_pcid -ffffffff82525410 ? Xipi_invlrange_pcid -ffffffff82525480 ? Xintr_lapic_ltimer -ffffffff825254b0 ? Xintr_xen_upcall -ffffffff825254e0 ? Xintr_hyperv_upcall -ffffffff82525510 ? Xintr_legacy0 -ffffffff82525540 ? Xintr_legacy1 -ffffffff82525570 ? Xintr_legacy2 -ffffffff825255a0 ? Xintr_legacy3 -ffffffff825255d0 ? Xintr_legacy4 -ffffffff82525600 ? Xintr_legacy5 -ffffffff82525630 ? Xintr_legacy6 -ffffffff82525660 ? Xintr_legacy7 -ffffffff82525690 ? Xintr_legacy8 -ffffffff825256c0 ? Xintr_legacy9 -ffffffff825256f0 ? Xintr_legacy10 -ffffffff82525720 ? Xintr_legacy11 -ffffffff82525750 ? Xintr_legacy12 -ffffffff82525780 ? Xintr_legacy13 -ffffffff825257b0 ? Xintr_legacy14 -ffffffff825257e0 ? Xintr_legacy15 -ffffffff82525810 ? Xintr_ioapic_edge0 -ffffffff82525840 ? Xintr_ioapic_edge1 -ffffffff82525870 ? Xintr_ioapic_edge2 -ffffffff825258a0 ? Xintr_ioapic_edge3 -ffffffff825258d0 ? Xintr_ioapic_edge4 -ffffffff82525900 ? Xintr_ioapic_edge5 -ffffffff82525930 ? Xintr_ioapic_edge6 -ffffffff82525960 ? Xintr_ioapic_edge7 -ffffffff82525990 ? Xintr_ioapic_edge8 -ffffffff825259c0 ? Xintr_ioapic_edge9 -ffffffff825259f0 ? Xintr_ioapic_edge10 -ffffffff82525a20 ? Xintr_ioapic_edge11 -ffffffff82525a50 ? Xintr_ioapic_edge12 -ffffffff82525a80 ? Xintr_ioapic_edge13 -ffffffff82525ab0 ? Xintr_ioapic_edge14 -ffffffff82525ae0 ? Xintr_ioapic_edge15 -ffffffff82525b10 ? Xintr_ioapic_edge16 -ffffffff82525b40 ? Xintr_ioapic_edge17 -ffffffff82525b70 ? Xintr_ioapic_edge18 -ffffffff82525ba0 ? Xintr_ioapic_edge19 -ffffffff82525bd0 ? Xintr_ioapic_edge20 -ffffffff82525c00 ? Xintr_ioapic_edge21 -ffffffff82525c30 ? Xintr_ioapic_edge22 -ffffffff82525c60 ? Xintr_ioapic_edge23 -ffffffff82525c90 ? Xintr_ioapic_edge24 -ffffffff82525cc0 ? Xintr_ioapic_edge25 -ffffffff82525cf0 ? Xintr_ioapic_edge26 -ffffffff82525d20 ? Xintr_ioapic_edge27 -ffffffff82525d50 ? Xintr_ioapic_edge28 -ffffffff82525d80 ? Xintr_ioapic_edge29 -ffffffff82525db0 ? Xintr_ioapic_edge30 -ffffffff82525de0 ? Xintr_ioapic_edge31 -ffffffff82525e10 ? Xintr_ioapic_edge32 -ffffffff82525e40 ? Xintr_ioapic_edge33 -ffffffff82525e70 ? Xintr_ioapic_edge34 -ffffffff82525ea0 ? Xintr_ioapic_edge35 -ffffffff82525ed0 ? Xintr_ioapic_edge36 -ffffffff82525f00 ? Xintr_ioapic_edge37 -ffffffff82525f30 ? Xintr_ioapic_edge38 -ffffffff82525f60 ? Xintr_ioapic_edge39 -ffffffff82525f90 ? Xintr_ioapic_edge40 -ffffffff82525fc0 ? Xintr_ioapic_edge41 -ffffffff82525ff0 ? Xintr_ioapic_edge42 -ffffffff82526020 ? Xintr_ioapic_edge43 -ffffffff82526050 ? Xintr_ioapic_edge44 -ffffffff82526080 ? Xintr_ioapic_edge45 -ffffffff825260b0 ? Xintr_ioapic_edge46 -ffffffff825260e0 ? Xintr_ioapic_edge47 -ffffffff82526110 ? Xintr_ioapic_edge48 -ffffffff82526140 ? Xintr_ioapic_edge49 -ffffffff82526170 ? Xintr_ioapic_edge50 -ffffffff825261a0 ? Xintr_ioapic_edge51 -ffffffff825261d0 ? Xintr_ioapic_edge52 -ffffffff82526200 ? Xintr_ioapic_edge53 -ffffffff82526230 ? Xintr_ioapic_edge54 -ffffffff82526260 ? Xintr_ioapic_edge55 -ffffffff82526290 ? Xintr_ioapic_edge56 -ffffffff825262c0 ? Xintr_ioapic_edge57 -ffffffff825262f0 ? Xintr_ioapic_edge58 -ffffffff82526320 ? Xintr_ioapic_edge59 -ffffffff82526350 ? Xintr_ioapic_edge60 -ffffffff82526380 ? Xintr_ioapic_edge61 -ffffffff825263b0 ? Xintr_ioapic_edge62 -ffffffff825263e0 ? Xintr_ioapic_edge63 -ffffffff82526410 ? Xintr_ioapic_level0 -ffffffff82526440 ? Xintr_ioapic_level1 -ffffffff82526470 ? Xintr_ioapic_level2 -ffffffff825264a0 ? Xintr_ioapic_level3 -ffffffff825264d0 ? Xintr_ioapic_level4 -ffffffff82526500 ? Xintr_ioapic_level5 -ffffffff82526530 ? Xintr_ioapic_level6 -ffffffff82526560 ? Xintr_ioapic_level7 -ffffffff82526590 ? Xintr_ioapic_level8 -ffffffff825265c0 ? Xintr_ioapic_level9 -ffffffff825265f0 ? Xintr_ioapic_level10 -ffffffff82526620 ? Xintr_ioapic_level11 -ffffffff82526650 ? Xintr_ioapic_level12 -ffffffff82526680 ? Xintr_ioapic_level13 -ffffffff825266b0 ? Xintr_ioapic_level14 -ffffffff825266e0 ? Xintr_ioapic_level15 -ffffffff82526710 ? Xintr_ioapic_level16 -ffffffff82526740 ? Xintr_ioapic_level17 -ffffffff82526770 ? Xintr_ioapic_level18 -ffffffff825267a0 ? Xintr_ioapic_level19 -ffffffff825267d0 ? Xintr_ioapic_level20 -ffffffff82526800 ? Xintr_ioapic_level21 -ffffffff82526830 ? Xintr_ioapic_level22 -ffffffff82526860 ? Xintr_ioapic_level23 -ffffffff82526890 ? Xintr_ioapic_level24 -ffffffff825268c0 ? Xintr_ioapic_level25 -ffffffff825268f0 ? Xintr_ioapic_level26 -ffffffff82526920 ? Xintr_ioapic_level27 -ffffffff82526950 ? Xintr_ioapic_level28 -ffffffff82526980 ? Xintr_ioapic_level29 -ffffffff825269b0 ? Xintr_ioapic_level30 -ffffffff825269e0 ? Xintr_ioapic_level31 -ffffffff82526a10 ? Xintr_ioapic_level32 -ffffffff82526a40 ? Xintr_ioapic_level33 -ffffffff82526a70 ? Xintr_ioapic_level34 -ffffffff82526aa0 ? Xintr_ioapic_level35 -ffffffff82526ad0 ? Xintr_ioapic_level36 -ffffffff82526b00 ? Xintr_ioapic_level37 -ffffffff82526b30 ? Xintr_ioapic_level38 -ffffffff82526b60 ? Xintr_ioapic_level39 -ffffffff82526b90 ? Xintr_ioapic_level40 -ffffffff82526bc0 ? Xintr_ioapic_level41 -ffffffff82526bf0 ? Xintr_ioapic_level42 -ffffffff82526c20 ? Xintr_ioapic_level43 -ffffffff82526c50 ? Xintr_ioapic_level44 -ffffffff82526c80 ? Xintr_ioapic_level45 -ffffffff82526cb0 ? Xintr_ioapic_level46 -ffffffff82526ce0 ? Xintr_ioapic_level47 -ffffffff82526d10 ? Xintr_ioapic_level48 -ffffffff82526d40 ? Xintr_ioapic_level49 -ffffffff82526d70 ? Xintr_ioapic_level50 -ffffffff82526da0 ? Xintr_ioapic_level51 -ffffffff82526dd0 ? Xintr_ioapic_level52 -ffffffff82526e00 ? Xintr_ioapic_level53 -ffffffff82526e30 ? Xintr_ioapic_level54 -ffffffff82526e60 ? Xintr_ioapic_level55 -ffffffff82526e90 ? Xintr_ioapic_level56 -ffffffff82526ec0 ? Xintr_ioapic_level57 -ffffffff82526ef0 ? Xintr_ioapic_level58 -ffffffff82526f20 ? Xintr_ioapic_level59 -ffffffff82526f50 ? Xintr_ioapic_level60 -ffffffff82526f80 ? Xintr_ioapic_level61 -ffffffff82526fb0 ? Xintr_ioapic_level62 -ffffffff82526fe0 ? Xintr_ioapic_level63 -ffffffff82528000 ? codepatch_fill_nop -ffffffff82528000 A __cptext_start -ffffffff82528000 A __kutext_end -ffffffff825280b0 ? codepatch_maprw -ffffffff82528190 ? codepatch_unmaprw -ffffffff825281f0 ? codepatch_nop -ffffffff82528340 ? codepatch_replace -ffffffff825284e0 ? codepatch_call -ffffffff82528500 ? codepatch_jmp -ffffffff82529000 A __cptext_end -ffffffff82529000 A __rodata_start -ffffffff82529000 C _etext -ffffffff82529000 C etext -ffffffff8252a000 r seeprom_read -ffffffff8252a004 r icl_mg_pll_find_divisors.div1_vals -ffffffff8252a028 r gen9bc_tgp_ddc_pin_map -ffffffff8252a038 r athn_ac2qid -ffffffff8252a038 r athn_ac2qid -ffffffff8252a038 r athn_ac2qid -ffffffff8252a044 r rtwn_get_rssi.cckoff -ffffffff8252a06c r rsu_ac2qid -ffffffff8252a07c r pckbc_portcmd -ffffffff8252a080 r tht_fifo_write_pad.pad -ffffffff8252a088 r rsu_get_rssi.cckoff -ffffffff8252a09c r adlp_n_revids -ffffffff8252a0ec r apple_iso_trans -ffffffff8252a0f0 r dg2_g12_revid_step_tbl -ffffffff8252a0f8 r wihap_check_tx.txratetable -ffffffff8252a0fc r dmamode -ffffffff8252a124 r gen9_edram_size_mb.sets -ffffffff8252b000 r isomappings -ffffffff8252b080 r unimappings -ffffffff8252b230 r replacements -ffffffff8252eb06 r cmd0646_9_tim_udma -ffffffff825824fb r pp_r600_decoded_lanes -ffffffff8259d825 r cmd680_setup_channel.udma_tbl -ffffffff825a5491 r apollo_udma33_tim -ffffffff825ab57e r substchar -ffffffff825ad624 r apollo_udma100_tim -ffffffff825d4f4b r apollo_udma66_tim -ffffffff825dc3de r apollo_pio_rec -ffffffff825eb7a0 r cy_pio_rec -ffffffff8261ac20 r apollo_udma133_tim -ffffffff826277a8 R drm_ca -ffffffff826277d0 R drm_filtops -ffffffff82627800 R drmread_filtops -ffffffff82628000 r vga_emulops -ffffffff82628048 R vga_stdscreen -ffffffff82628078 R vga_stdscreen_mono -ffffffff826280a8 R vga_stdscreen_bf -ffffffff826280d8 R vga_40lscreen -ffffffff82628108 R vga_40lscreen_mono -ffffffff82628138 R vga_40lscreen_bf -ffffffff82628168 R vga_50lscreen -ffffffff82628198 R vga_50lscreen_mono -ffffffff826281c8 R vga_50lscreen_bf -ffffffff826281f8 R vga_screenlist -ffffffff82628208 R vga_screenlist_mono -ffffffff82628218 R vga_accessops -ffffffff82628278 r i945_wm_info -ffffffff826282b0 r bgansitopc -ffffffff826282b8 r pctoansi -ffffffff826282f8 r sdma_offsets -ffffffff826282f8 r sdma_offsets -ffffffff82628328 r iha_rate_tbl -ffffffff82628360 r i830_a_wm_info -ffffffff82628398 r gen9_edram_size_mb.ways -ffffffff82628400 r aggr_periodic_times -ffffffff82628480 r jsl_ehl_revids -ffffffff826284f8 r michael_final.pad -ffffffff82628520 r rt_copysa.maskarray -ffffffff82628528 r i915_wm_info -ffffffff82628530 r amdgpu_ih_clientid_jpeg -ffffffff82628530 r amdgpu_ih_clientid_uvds -ffffffff82628530 r amdgpu_ih_clientid_vcns -ffffffff82628530 r amdgpu_ih_clientid_vcns -ffffffff82628530 r amdgpu_ih_clientid_vcns -ffffffff82628568 r vga_setfontset.cmaptabb -ffffffff82628580 r tgl_revids -ffffffff826285d8 r i830_bc_wm_info -ffffffff82628648 r hsw_activate_psr2.map -ffffffff82628688 r __drm_universal_plane_init.default_modifiers -ffffffff82628698 r iwn_tid2fifo -ffffffff826286b0 r vga_setfontset.cmaptaba -ffffffff826286b8 r crtc_offsets -ffffffff826286b8 r crtc_offsets -ffffffff826286b8 r crtc_offsets -ffffffff826286d8 r link_speed -ffffffff826286d8 r link_speed -ffffffff826286d8 r link_speed -ffffffff82628750 r rtwn_r88e_get_rssi.cckoff -ffffffff82629000 R edid_vendors -ffffffff826292c0 R edid_nvendors -ffffffff826292d0 R edid_products -ffffffff82629330 R edid_nproducts -ffffffff82629340 r _edid_modes -ffffffff8262a000 R videomode_list -ffffffff8262b080 R videomode_count -ffffffff8262c000 r ahc_hard_errors -ffffffff8262c080 r critical_sections -ffffffff8262c0b0 r patches -ffffffff8262cd50 r seqprog -ffffffff8262e000 r ahc_switch -ffffffff8262f000 r termstat_strings -ffffffff8262f020 r critical_sections -ffffffff8262f060 r seqprog -ffffffff8262fd50 r patches -ffffffff82631000 r ahd_switch -ffffffff82632000 R aic_switch -ffffffff82633000 R adw_switch -ffffffff82634000 R gdt_switch -ffffffff82635000 R twe_switch -ffffffff82636000 R ciss_switch -ffffffff82636030 R ciss_level -ffffffff82636050 R ciss_stat -ffffffff82637000 R ami_switch -ffffffff82637028 R ami_raw_switch -ffffffff82638000 R mfi_switch -ffffffff82638028 R mfi_pd_switch -ffffffff82638050 r mfi_iop_xscale -ffffffff82638080 r mfi_iop_ppc -ffffffff826380b0 r mfi_iop_gen2 -ffffffff826380e0 r mfi_iop_skinny -ffffffff82638110 r mfi_bbu_indicators -ffffffff826381c0 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs -ffffffff826381f0 r chv_oa_mux_regs -ffffffff82638210 r fiji_clock_stretcher_lookup_table -ffffffff82638210 r tonga_clock_stretcher_lookup_table -ffffffff82638240 r link_speed -ffffffff82638240 r link_speed -ffffffff82638240 r link_speed -ffffffff82638280 r drm_fb_xfrm.default_dst_pitch -ffffffff82638280 r non_supported_protection -ffffffff82638380 r tgl_uy_revids -ffffffff826383d0 r bwi_phy_noise_11g_rev1 -ffffffff82638450 r cardslot_process_event.antonym_ev -ffffffff826384e0 r gen11_oa_mux_regs -ffffffff826385d0 r ddr2_cycle_tenths -ffffffff82638640 r rtw_intr_rx.ratetbl -ffffffff826386c0 r abm_config -ffffffff82638730 r getbootinfo.ports.30 -ffffffff82638780 r reg_offsets -ffffffff82638790 r bwi_rf_lo_measure_11g.rf_lo_adjust -ffffffff826387a0 r init_non_clock_fields.look_up -ffffffff826387b0 r uftdi_8u232am_getrate.roundoff -ffffffff82638800 r zyd_rx_data.rates -ffffffff82638810 r ieee80211_ra_valid_tx_mcs.max_mcs -ffffffff82638850 r mmio_invalidate_full.gen8_regs -ffffffff82638880 r bwi_phy_noise_11g -ffffffff82638890 r hpt366_pio -ffffffff826388c0 r glk_revids -ffffffff82638910 r bwi_rf_calc_nrssi_slope_11g.save_phy3_regs -ffffffff82638930 r ether_crc32_be_update.rev -ffffffff82638930 r rtw_grf5101_mac_crypt.caesar -ffffffff82638980 r snb_b_fdi_train_param -ffffffff82639000 R qlw_switch -ffffffff8263a000 R isp_2100_risc_code -ffffffff8264cbf0 R isp_2200_risc_code -ffffffff8265f990 R isp_2300_risc_code -ffffffff82679408 R qla_switch -ffffffff82679430 r qla_regs_2100 -ffffffff82679460 r qla_regs_2200 -ffffffff82679490 r qla_regs_23XX -ffffffff8267a000 R ahci_atascsi_methods -ffffffff8267b000 R nvme_switch -ffffffff8267b028 r nvme_ops -ffffffff8267c000 R mpi_switch -ffffffff8267c100 r intel_hpll_vco.elk_vco -ffffffff8267c160 r pin_offsets -ffffffff8267c1c0 r firmware_list -ffffffff8267c220 r atom_arg_shift -ffffffff8267c220 r atom_arg_shift -ffffffff8267c260 r pf_syncookie_wstab -ffffffff8267c280 r ieee80211_media_init.mopts -ffffffff8267c2e0 r add_entropy_words.twist_table -ffffffff8267c380 r urtw_8225v2_txpwr_cck -ffffffff8267c3a0 r bwfm_pci_prio2fifo -ffffffff8267c3a0 r ieee80211_up_to_ac.up_to_ac -ffffffff8267c460 r paritytab -ffffffff8267c460 r x86emu_parity_tab -ffffffff8267c480 r legacy_connector_convert -ffffffff8267c4c0 r gen7_oa_mux_regs -ffffffff8267c4e0 r hsw_oa_mux_regs -ffffffff8267c500 r notetab -ffffffff8267c520 r urtw_8225v2_txpwr_cck_ch14 -ffffffff8267c540 r bwi_rf_calibval.rf_calibvals -ffffffff8267c5e0 r pf_syncookie_msstab -ffffffff8267c640 r xgmi3x16_pcs_err_status_reg_aldebaran -ffffffff8267c6a0 r uath_wme_init.uath_wme_11g -ffffffff8267c6c0 r gen7_oa_b_counters -ffffffff8267c820 r icl_revids -ffffffff8267c8e0 r rtwn_iq_calib_run.reg_adda -ffffffff8267c920 r atom_def_dst -ffffffff8267c920 r atom_def_dst -ffffffff8267c960 r sha256_initial_hash_value -ffffffff8267c9c0 r otus_edca_def -ffffffff8267c9e0 r intel_hpll_vco.blb_vco -ffffffff8267caa0 r epic_pci_subsys_info -ffffffff8267cac0 r atom_arg_mask -ffffffff8267cac0 r atom_arg_mask -ffffffff8267cb20 r butmap -ffffffff8267cb60 r GFX_RLC_SRM_INDEX_CNTL_DATA_OFFSETS -ffffffff8267cba0 r comsoft.lsrmap -ffffffff8267cbe0 r tulip_mii_phy_readspecific.table -ffffffff8267cc00 r kbl_revids -ffffffff8267cca0 r intel_hpll_vco.pnv_vco -ffffffff8267cd00 r dmapageport -ffffffff8267cdc0 r intel_hpll_vco.ctg_vco -ffffffff8267ce80 r drm_calculate_luminance_range.pre_computed_values -ffffffff8267d000 R sili_atascsi_methods -ffffffff8267e000 R ncr53c9x_switch -ffffffff8267f000 r scf_period -ffffffff82680000 R siop_script -ffffffff826805a0 R lun_switch -ffffffff826805d0 R tag_switch -ffffffff82680660 R load_dsa -ffffffff826806c4 R siop_led_on -ffffffff826806cc R siop_led_off -ffffffff826806d8 R siop_switch -ffffffff82681000 R ep_vortex_media -ffffffff82681100 R ep_default_to_media -ffffffff82682000 R wi_card_ident -ffffffff82684000 R ucode_table -ffffffff82685000 r re_revisions -ffffffff82685290 r re_kstats_tpl -ffffffff82687000 R smc91cxx_media -ffffffff82687010 R smc91cxx_mii_bitbang_ops -ffffffff82688000 R dl10019_mii_bitbang_ops -ffffffff82688028 R dl10022_mii_bitbang_ops -ffffffff82689000 R ax88190_mii_bitbang_ops -ffffffff8268b000 R ac97_audio_default -ffffffff8268b020 R ac97_on_off -ffffffff8268b324 R ac97_mic_select -ffffffff8268b628 R ac97_mono_select -ffffffff8268b92c R ac97_source -ffffffff8268bc30 R ac97_volume_stereo -ffffffff8268bc4c R ac97_volume_mono -ffffffff8268bc70 R source_info -ffffffff8268c470 R ac97_ad -ffffffff8268c580 R ac97_ak -ffffffff8268c610 R ac97_av -ffffffff8268c750 R ac97_rl -ffffffff8268c7a0 R ac97_cm -ffffffff8268c820 R ac97_cr -ffffffff8268c840 R ac97_cs -ffffffff8268c920 R ac97_cx -ffffffff8268c980 R ac97_dt -ffffffff8268c9a0 R ac97_em -ffffffff8268c9d0 R ac97_es -ffffffff8268c9f0 R ac97_is -ffffffff8268ca10 R ac97_ic -ffffffff8268ca90 R ac97_it -ffffffff8268cac0 R ac97_ns -ffffffff8268cb80 R ac97_ps -ffffffff8268cbb0 R ac97_sl -ffffffff8268cbd0 R ac97_st -ffffffff8268cd20 R ac97_vi -ffffffff8268cd50 R ac97_tt -ffffffff8268cdd0 R ac97_ti -ffffffff8268cdf0 R ac97_wb -ffffffff8268ce10 R ac97_wo -ffffffff8268cea0 R ac97_ym -ffffffff8268cef0 R ac97_vendors -ffffffff8268d1f0 R ac97enhancement -ffffffff8268d2f0 R ac97feature -ffffffff8268e000 R lm_chips -ffffffff8268e020 R lm78_sensors -ffffffff8268e1a0 R w83627hf_sensors -ffffffff8268e3a0 R w83627ehf_sensors -ffffffff8268e5c0 R w83627dhg_sensors -ffffffff8268e7c0 R nct6776f_sensors -ffffffff8268ea00 R nct6779d_sensors -ffffffff8268ed60 R w83637hf_sensors -ffffffff8268ef20 R w83697hf_sensors -ffffffff8268f0c0 R w83781d_sensors -ffffffff8268f280 R w83782d_sensors -ffffffff8268f480 R w83783s_sensors -ffffffff8268f600 R w83791d_sensors -ffffffff8268f860 R w83792d_sensors -ffffffff8268fae0 R as99127f_sensors -ffffffff82690000 r ar5k_known_products -ffffffff82690110 r ar5111_gain_opt -ffffffff826901e0 r ar5112_gain_opt -ffffffff826902b0 r ar5k_5ghz_channels -ffffffff82690a00 r ar5k_2ghz_channels -ffffffff82690f10 r ar5111_rf -ffffffff82691350 r ar5112a_rf -ffffffff82691890 r ar5112_rf -ffffffff82691da0 r ar5413_rf -ffffffff826921b0 r ar2413_rf -ffffffff826924d0 r ar2425_rf -ffffffff82692830 r ar5111_rfg -ffffffff82692b30 r ar5112_rfg -ffffffff82692e30 r ar5413_rfg -ffffffff82693130 r ar2413_rfg -ffffffff82693430 r ar5k_rt_11a -ffffffff82693552 r ar5k_rt_11b -ffffffff82693674 r ar5k_rt_11g -ffffffff82693796 r ar5k_rt_xr -ffffffff82694000 r ar5210_ini -ffffffff82695000 r ar5211_mode -ffffffff826952c0 r ar5211_ini -ffffffff82695ad0 r ar5211_rf -ffffffff82696000 r ar5212_pcie -ffffffff82696080 r ar5212_mode -ffffffff82696310 r ar5212_ini -ffffffff82696c80 r ar5212_ar5111_mode -ffffffff82696f20 r ar5212_ar5112_mode -ffffffff826971b0 r ar5413_mode -ffffffff82697b10 r ar2413_mode -ffffffff82698430 r ar2425_mode -ffffffff82698d90 r ar5111_bbgain -ffffffff82699090 r ar5112_bbgain -ffffffff8269a000 r athn_5ghz_chans -ffffffff8269a020 r athn_rates -ffffffff8269b000 r athn_rates -ffffffff8269c000 r ar9160_ini -ffffffff8269c068 r ar5416_ini -ffffffff8269c0d0 r ar5416_serdes -ffffffff8269c0e8 r ar9160_1_1_addac -ffffffff8269c0f8 r ar9160_1_0_addac -ffffffff8269c108 r ar5416_2_2_addac -ffffffff8269c118 r ar5416_2_1_addac -ffffffff8269c128 r ar5416_set_power_calib.chainoffset -ffffffff8269c140 r ar9160_bank6tpc_vals -ffffffff8269c1c0 r ar5416_bank6tpc_vals -ffffffff8269c240 r ar5416_bb_rfgain_vals_2g -ffffffff8269c340 r ar5416_bb_rfgain_vals_5g -ffffffff8269c440 r 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vcn_v2_0_enc_ring_vm_funcs -ffffffff82adb2f8 r vcn_v2_0_irq_funcs -ffffffff82adc000 r vcn_v2_5_ip_funcs -ffffffff82adc0a0 R vcn_v2_5_ip_block -ffffffff82adc0b8 r vcn_v2_6_ip_funcs -ffffffff82adc158 R vcn_v2_6_ip_block -ffffffff82adc170 R vcn_v2_6_ras_hw_ops -ffffffff82adc1b0 r vcn_v2_5_dec_ring_vm_funcs -ffffffff82adc2d0 r vcn_v2_6_dec_ring_vm_funcs -ffffffff82adc3f0 r vcn_v2_5_enc_ring_vm_funcs -ffffffff82adc510 r vcn_v2_6_enc_ring_vm_funcs -ffffffff82adc630 r vcn_v2_5_irq_funcs -ffffffff82add000 r vcn_v3_0_ip_funcs -ffffffff82add0a0 R vcn_v3_0_ip_block -ffffffff82add0b8 r vcn_v3_0_dec_ring_vm_funcs -ffffffff82add1d8 r vcn_v3_0_enc_ring_vm_funcs -ffffffff82add2f8 r vcn_v3_0_irq_funcs -ffffffff82ade000 r vcn_v4_0_ip_funcs -ffffffff82ade0a0 R vcn_v4_0_ip_block -ffffffff82ade0b8 r vcn_v4_0_unified_ring_vm_funcs -ffffffff82ade1d8 r vcn_v4_0_irq_funcs -ffffffff82adf000 R vega10_ih_ip_funcs -ffffffff82adf0a0 R vega10_ih_ip_block -ffffffff82adf0b8 r vega10_ih_funcs -ffffffff82adf0d8 r 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iceland_mgcg_cgcg_init -ffffffff82ae3590 r fiji_mgcg_cgcg_init -ffffffff82ae35f0 r tonga_mgcg_cgcg_init -ffffffff82ae3650 r cz_mgcg_cgcg_init -ffffffff82ae3690 r stoney_mgcg_cgcg_init -ffffffff82ae4000 r amdgpu_dm_funcs -ffffffff82ae40a0 R dm_ip_block -ffffffff82ae40b8 R amdgpu_dm_encoder_helper_funcs -ffffffff82ae4120 r dm_display_funcs -ffffffff82ae4180 r hpd_disconnect_quirk_table -ffffffff82ae4ef0 r amdgpu_dm_mode_funcs -ffffffff82ae4f38 r amdgpu_dm_encoder_funcs -ffffffff82ae4f58 r amdgpu_dm_connector_funcs -ffffffff82ae4fd0 r amdgpu_dm_connector_helper_funcs -ffffffff82ae5020 r amdgpu_dm_i2c_algo -ffffffff82ae51f0 r add_fs_modes.common_rates -ffffffff82ae5220 r amdgpu_dm_backlight_ops -ffffffff82ae6000 r amdgpu_dm_crtc_funcs -ffffffff82ae60c0 r amdgpu_dm_crtc_helper_funcs -ffffffff82ae7000 r dm_dtn_log_begin.msg -ffffffff82ae700d r dm_dtn_log_end.msg -ffffffff82ae7018 r SYNAPTICS_DEVICE_ID -ffffffff82ae8000 r dm_crtc_irq_funcs -ffffffff82ae8010 r dm_vline0_irq_funcs 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disp_clk_mask -ffffffff82af8000 r dce112_max_clks_by_state -ffffffff82af8028 r disp_clk_regs -ffffffff82af807c r disp_clk_shift -ffffffff82af8088 r disp_clk_mask -ffffffff82af9000 r dce120_max_clks_by_state -ffffffff82afa000 r clk_mgr_regs -ffffffff82afa054 r clk_mgr_shift -ffffffff82afa060 r clk_mgr_mask -ffffffff82afb000 r clk_mgr_regs -ffffffff82afb054 r clk_mgr_shift -ffffffff82afb060 r clk_mgr_mask -ffffffff82afc000 r clk_mgr_regs -ffffffff82afc054 r clk_mgr_shift -ffffffff82afc060 r clk_mgr_mask -ffffffff82afd000 r lpddr5_wm_table -ffffffff82afd0c0 r ddr5_wm_table -ffffffff82afe000 r lpddr5_wm_table -ffffffff82afe0c0 r ddr5_wm_table -ffffffff82aff000 r lpddr5_wm_table -ffffffff82aff0c0 r ddr5_wm_table -ffffffff82b00000 r lpddr5_wm_table -ffffffff82b000c0 r ddr4_wm_table -ffffffff82b01000 r clk_mgr_regs_dcn321 -ffffffff82b01054 r clk_mgr_shift_dcn321 -ffffffff82b01060 r clk_mgr_mask_dcn321 -ffffffff82b01084 r clk_mgr_regs_dcn32 -ffffffff82b010d8 r clk_mgr_shift_dcn32 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amdgpu_vm_manager_init +ffffffff81db25f0 T amdgpu_vm_manager_fini +ffffffff81db2650 T amdgpu_vm_ioctl +ffffffff81db2770 T amdgpu_vm_get_task_info +ffffffff81db2810 T amdgpu_vm_set_task_info +ffffffff81db2900 T amdgpu_vm_handle_fault +ffffffff81db2ad0 t amdgpu_vm_add_prt_cb +ffffffff81db2c20 t amdgpu_vm_prt_cb +ffffffff81db3000 t amdgpu_vm_cpu_map_table +ffffffff81db3020 t amdgpu_vm_cpu_prepare +ffffffff81db3070 t amdgpu_vm_cpu_update +ffffffff81db3170 t amdgpu_vm_cpu_commit +ffffffff81db4000 T amdgpu_vm_pt_clear +ffffffff81db4430 T amdgpu_vm_pt_create +ffffffff81db4950 T amdgpu_vm_pt_free_work +ffffffff81db4c20 t amdgpu_vm_pt_free +ffffffff81db4d00 T amdgpu_vm_pt_free_root +ffffffff81db4d20 t amdgpu_vm_pt_free_dfs +ffffffff81db5a90 T amdgpu_vm_pt_is_root_clean +ffffffff81db5b60 T amdgpu_vm_pde_update +ffffffff81db5c50 T amdgpu_vm_ptes_update +ffffffff81db6620 t amdgpu_vm_pt_next +ffffffff81db7000 t amdgpu_vm_sdma_map_table +ffffffff81db7060 t amdgpu_vm_sdma_prepare +ffffffff81db7100 t amdgpu_vm_sdma_update +ffffffff81db75e0 t amdgpu_vm_sdma_commit +ffffffff81db8000 T amdgpu_vram_mgr_bo_visible_size +ffffffff81db8110 T amdgpu_vram_mgr_reserve_range +ffffffff81db81f0 t amdgpu_vram_mgr_do_reserve +ffffffff81db8370 T amdgpu_vram_mgr_query_page_status +ffffffff81db8450 T amdgpu_vram_mgr_alloc_sgt +ffffffff81db84a0 T amdgpu_vram_mgr_free_sgt +ffffffff81db84d0 T amdgpu_vram_mgr_vis_usage +ffffffff81db8500 T amdgpu_vram_mgr_init +ffffffff81db86d0 T amdgpu_vram_mgr_fini +ffffffff81db88e0 t amdgpu_vram_mgr_new +ffffffff81db8e70 t amdgpu_vram_mgr_del +ffffffff81db8f50 t amdgpu_vram_mgr_intersects +ffffffff81db8fd0 t amdgpu_vram_mgr_compatible +ffffffff81db9050 t amdgpu_vram_mgr_debug +ffffffff81dba000 t amdgpu_xgmi_hive_release +ffffffff81dba050 T amdgpu_get_xgmi_hive +ffffffff81dba0a0 T amdgpu_put_xgmi_hive +ffffffff81dba0f0 T amdgpu_xgmi_set_pstate +ffffffff81dba140 T amdgpu_xgmi_update_topology +ffffffff81dba200 T amdgpu_xgmi_get_hops_count +ffffffff81dba270 T amdgpu_xgmi_get_num_links +ffffffff81dba2e0 T amdgpu_xgmi_add_device +ffffffff81dba500 T amdgpu_xgmi_remove_device +ffffffff81dba650 T amdgpu_xgmi_get_relative_phy_addr +ffffffff81dba690 t amdgpu_ras_error_inject_xgmi +ffffffff81dba800 t amdgpu_xgmi_query_ras_error_count +ffffffff81dbb020 t amdgpu_xgmi_reset_ras_error_count +ffffffff81dbb340 t amdgpu_xgmi_ras_late_init +ffffffff81dbc000 T arct_reg_base_init +ffffffff81dbd000 T athub_v1_0_set_clockgating +ffffffff81dbd210 T athub_v1_0_get_clockgating +ffffffff81dbe000 T athub_v2_0_set_clockgating +ffffffff81dbe1e0 T athub_v2_0_get_clockgating +ffffffff81dbf000 T athub_v2_1_set_clockgating +ffffffff81dbf1f0 T athub_v2_1_get_clockgating +ffffffff81dc0000 T athub_v3_0_set_clockgating +ffffffff81dc00d0 T athub_v3_0_get_clockgating +ffffffff81dc0120 t athub_v3_0_get_cg_cntl +ffffffff81dc01c0 t athub_v3_0_set_cg_cntl +ffffffff81dc1000 t cz_ih_early_init +ffffffff81dc1050 t cz_ih_sw_init +ffffffff81dc10b0 t cz_ih_sw_fini +ffffffff81dc10f0 t cz_ih_hw_init +ffffffff81dc1320 t cz_ih_hw_fini +ffffffff81dc13f0 t cz_ih_suspend +ffffffff81dc14c0 t cz_ih_resume +ffffffff81dc1500 t cz_ih_is_idle +ffffffff81dc1550 t cz_ih_wait_for_idle +ffffffff81dc15f0 t cz_ih_soft_reset +ffffffff81dc16d0 t cz_ih_set_clockgating_state +ffffffff81dc1700 t cz_ih_set_powergating_state +ffffffff81dc1730 t cz_ih_get_wptr +ffffffff81dc1820 t cz_ih_decode_iv +ffffffff81dc18a0 t cz_ih_set_rptr +ffffffff81dc2000 T dce_v10_0_disable_dce +ffffffff81dc2170 t dce_v10_0_early_init +ffffffff81dc2230 t dce_v10_0_sw_init +ffffffff81dc26a0 t dce_v10_0_sw_fini +ffffffff81dc27d0 t dce_v10_0_hw_init +ffffffff81dc2b40 t dce_v10_0_hw_fini +ffffffff81dc2cd0 t dce_v10_0_suspend +ffffffff81dc2d30 t dce_v10_0_resume +ffffffff81dc2da0 t dce_v10_0_is_idle +ffffffff81dc2dd0 t dce_v10_0_wait_for_idle +ffffffff81dc2e00 t dce_v10_0_check_soft_reset +ffffffff81dc2e10 t dce_v10_0_soft_reset +ffffffff81dc2ee0 t dce_v10_0_set_clockgating_state +ffffffff81dc2f10 t dce_v10_0_set_powergating_state +ffffffff81dc2f40 t dce_v10_0_audio_endpt_rreg +ffffffff81dc2fd0 t dce_v10_0_audio_endpt_wreg +ffffffff81dc3050 t dce_v10_0_bandwidth_update +ffffffff81dc3ac0 t dce_v10_0_vblank_get_counter +ffffffff81dc3b10 t dce_v10_0_hpd_sense +ffffffff81dc3b70 t dce_v10_0_hpd_set_polarity +ffffffff81dc3c40 t dce_v10_0_hpd_get_gpio_reg +ffffffff81dc3c70 t dce_v10_0_page_flip +ffffffff81dc3d60 t dce_v10_0_crtc_get_scanoutpos +ffffffff81dc3e00 t dce_v10_0_encoder_add +ffffffff81dc4030 t dce_v10_0_latency_watermark +ffffffff81dc4250 t dce_v10_0_encoder_destroy +ffffffff81dc42b0 t dce_v10_0_encoder_prepare +ffffffff81dc44b0 t dce_v10_0_encoder_commit +ffffffff81dc44e0 t dce_v10_0_encoder_mode_set +ffffffff81dc5380 t dce_v10_0_encoder_disable +ffffffff81dc5490 t dce_v10_0_ext_dpms +ffffffff81dc54c0 t dce_v10_0_ext_prepare +ffffffff81dc54f0 t dce_v10_0_ext_commit +ffffffff81dc5520 t dce_v10_0_ext_mode_set +ffffffff81dc5550 t dce_v10_0_ext_disable +ffffffff81dc5580 t dce_v10_0_set_crtc_irq_state +ffffffff81dc5660 t dce_v10_0_crtc_irq +ffffffff81dc5890 t dce_v10_0_set_crtc_vblank_interrupt_state +ffffffff81dc5960 t dce_v10_0_set_crtc_vline_interrupt_state +ffffffff81dc5a30 t dce_v10_0_set_pageflip_irq_state +ffffffff81dc5ae0 t dce_v10_0_pageflip_irq +ffffffff81dc5c40 t dce_v10_0_set_hpd_irq_state +ffffffff81dc5d10 t dce_v10_0_hpd_irq +ffffffff81dc5e30 t dce_v10_0_crtc_cursor_set2 +ffffffff81dc61a0 t dce_v10_0_crtc_cursor_move +ffffffff81dc6280 t dce_v10_0_crtc_gamma_set +ffffffff81dc62c0 t dce_v10_0_crtc_destroy +ffffffff81dc62f0 t amdgpu_bo_reserve +ffffffff81dc6500 t amdgpu_bo_unreserve +ffffffff81dc65e0 t dce_v10_0_cursor_move_locked +ffffffff81dc6730 t dce_v10_0_crtc_load_lut +ffffffff81dc6ac0 t dce_v10_0_crtc_dpms +ffffffff81dc6c90 t dce_v10_0_crtc_prepare +ffffffff81dc6cd0 t dce_v10_0_crtc_commit +ffffffff81dc6d00 t dce_v10_0_crtc_mode_fixup +ffffffff81dc6ec0 t dce_v10_0_crtc_mode_set +ffffffff81dc70b0 t dce_v10_0_crtc_set_base +ffffffff81dc70d0 t dce_v10_0_crtc_set_base_atomic +ffffffff81dc70f0 t dce_v10_0_crtc_disable +ffffffff81dc7290 t dce_v10_0_crtc_do_set_base +ffffffff81dc7940 t dce_v10_0_is_display_hung +ffffffff81dc8000 T dce_v11_0_disable_dce +ffffffff81dc8160 t dce_v11_0_early_init +ffffffff81dc82b0 t dce_v11_0_sw_init +ffffffff81dc8730 t dce_v11_0_sw_fini +ffffffff81dc8860 t dce_v11_0_hw_init +ffffffff81dc8c30 t dce_v11_0_hw_fini +ffffffff81dc8dc0 t dce_v11_0_suspend +ffffffff81dc8e20 t dce_v11_0_resume +ffffffff81dc8e90 t dce_v11_0_is_idle +ffffffff81dc8ec0 t dce_v11_0_wait_for_idle +ffffffff81dc8ef0 t dce_v11_0_soft_reset +ffffffff81dc9110 t dce_v11_0_set_clockgating_state +ffffffff81dc9140 t dce_v11_0_set_powergating_state +ffffffff81dc9170 t dce_v11_0_audio_endpt_rreg +ffffffff81dc9200 t dce_v11_0_audio_endpt_wreg +ffffffff81dc9280 t dce_v11_0_bandwidth_update +ffffffff81dc9cf0 t dce_v11_0_vblank_get_counter +ffffffff81dc9d40 t dce_v11_0_hpd_sense +ffffffff81dc9da0 t dce_v11_0_hpd_set_polarity +ffffffff81dc9e70 t dce_v11_0_hpd_get_gpio_reg +ffffffff81dc9ea0 t dce_v11_0_page_flip +ffffffff81dc9fa0 t dce_v11_0_crtc_get_scanoutpos +ffffffff81dca040 t dce_v11_0_encoder_add +ffffffff81dca270 t dce_v11_0_latency_watermark +ffffffff81dca490 t dce_v11_0_encoder_destroy +ffffffff81dca4f0 t dce_v11_0_encoder_prepare +ffffffff81dca6f0 t dce_v11_0_encoder_commit +ffffffff81dca720 t dce_v11_0_encoder_mode_set +ffffffff81dcb5c0 t dce_v11_0_encoder_disable +ffffffff81dcb6d0 t dce_v11_0_ext_dpms +ffffffff81dcb700 t dce_v11_0_ext_prepare +ffffffff81dcb730 t dce_v11_0_ext_commit +ffffffff81dcb760 t dce_v11_0_ext_mode_set +ffffffff81dcb790 t dce_v11_0_ext_disable +ffffffff81dcb7c0 t dce_v11_0_set_crtc_irq_state +ffffffff81dcb8a0 t dce_v11_0_crtc_irq +ffffffff81dcbac0 t dce_v11_0_set_crtc_vblank_interrupt_state +ffffffff81dcbb90 t dce_v11_0_set_crtc_vline_interrupt_state +ffffffff81dcbc60 t dce_v11_0_set_pageflip_irq_state +ffffffff81dcbd10 t dce_v11_0_pageflip_irq +ffffffff81dcbe70 t dce_v11_0_set_hpd_irq_state +ffffffff81dcbf40 t dce_v11_0_hpd_irq +ffffffff81dcc060 t dce_v11_0_crtc_cursor_set2 +ffffffff81dcc3d0 t dce_v11_0_crtc_cursor_move +ffffffff81dcc4b0 t dce_v11_0_crtc_gamma_set +ffffffff81dcc4f0 t dce_v11_0_crtc_destroy +ffffffff81dcc520 t amdgpu_bo_reserve +ffffffff81dcc730 t amdgpu_bo_unreserve +ffffffff81dcc810 t dce_v11_0_cursor_move_locked +ffffffff81dcc960 t dce_v11_0_crtc_load_lut +ffffffff81dcccd0 t dce_v11_0_crtc_dpms +ffffffff81dccea0 t dce_v11_0_crtc_prepare +ffffffff81dccee0 t dce_v11_0_crtc_commit +ffffffff81dccf10 t dce_v11_0_crtc_mode_fixup +ffffffff81dcd180 t dce_v11_0_crtc_mode_set +ffffffff81dcd3e0 t dce_v11_0_crtc_set_base +ffffffff81dcd400 t dce_v11_0_crtc_set_base_atomic +ffffffff81dcd420 t dce_v11_0_crtc_disable +ffffffff81dcd5c0 t dce_v11_0_crtc_do_set_base +ffffffff81dce000 t df_v1_7_sw_init +ffffffff81dce040 t df_v1_7_sw_fini +ffffffff81dce070 t df_v1_7_enable_broadcast_mode +ffffffff81dce190 t df_v1_7_get_fb_channel_number +ffffffff81dce210 t df_v1_7_get_hbm_channel_number +ffffffff81dce260 t df_v1_7_update_medium_grain_clock_gating +ffffffff81dce3d0 t df_v1_7_get_clockgating_state +ffffffff81dce460 t df_v1_7_enable_ecc_force_par_wr_rmw +ffffffff81dcf000 t df_v3_6_sw_init +ffffffff81dcf160 t df_v3_6_sw_fini +ffffffff81dcf190 t df_v3_6_enable_broadcast_mode +ffffffff81dcf2b0 t df_v3_6_get_fb_channel_number +ffffffff81dcf390 t df_v3_6_get_hbm_channel_number +ffffffff81dcf3e0 t df_v3_6_update_medium_grain_clock_gating +ffffffff81dcf580 t df_v3_6_get_clockgating_state +ffffffff81dcf610 t df_v3_6_pmc_start +ffffffff81dcf990 t df_v3_6_pmc_stop +ffffffff81dcfc30 t df_v3_6_pmc_get_count +ffffffff81dcfdc0 t df_v3_6_get_fica +ffffffff81dcfed0 t df_v3_6_set_fica +ffffffff81dcffb0 t df_v3_6_query_ras_poison_mode +ffffffff81dd0120 t df_v3_6_perfmon_arm_with_status +ffffffff81dd1000 T dimgrey_cavefish_reg_base_init +ffffffff81dd2000 T emu_soc_asic_init +ffffffff81dd3000 t gfx_v10_0_early_init +ffffffff81dd3420 t gfx_v10_0_late_init +ffffffff81dd3490 t gfx_v10_0_sw_init +ffffffff81dd4840 t gfx_v10_0_sw_fini +ffffffff81dd4b80 t gfx_v10_0_hw_init +ffffffff81dd7730 t gfx_v10_0_hw_fini +ffffffff81dd7a20 t gfx_v10_0_suspend +ffffffff81dd7a60 t gfx_v10_0_resume +ffffffff81dd7a70 t gfx_v10_0_is_idle +ffffffff81dd7b00 t gfx_v10_0_wait_for_idle +ffffffff81dd7be0 t gfx_v10_0_soft_reset +ffffffff81dd7f30 t gfx_v10_0_set_clockgating_state +ffffffff81dd81d0 t gfx_v10_0_set_powergating_state +ffffffff81dd83f0 t gfx_v10_0_get_clockgating_state +ffffffff81dd8500 t gfx10_kiq_set_resources +ffffffff81dd8830 t gfx10_kiq_map_queues +ffffffff81dd8bc0 t gfx10_kiq_unmap_queues +ffffffff81dd8fc0 t gfx10_kiq_query_status +ffffffff81dd92c0 t gfx10_kiq_invalidate_tlbs +ffffffff81dd93e0 t gfx_v10_0_ring_get_rptr_compute +ffffffff81dd9410 t gfx_v10_0_ring_get_wptr_compute +ffffffff81dd9480 t gfx_v10_0_ring_set_wptr_compute +ffffffff81dd95c0 t gfx_v10_0_ring_emit_ib_compute +ffffffff81dd9910 t gfx_v10_0_ring_emit_fence_kiq +ffffffff81dd9d50 t gfx_v10_0_ring_test_ring +ffffffff81dd9fc0 t gfx_v10_0_ring_test_ib +ffffffff81dda270 t gfx_v10_0_ring_emit_rreg +ffffffff81dda510 t gfx_v10_0_ring_emit_wreg +ffffffff81dda750 t gfx_v10_0_ring_emit_reg_wait +ffffffff81dda7a0 t gfx_v10_0_ring_emit_reg_write_reg_wait +ffffffff81dda830 t gfx_v10_0_wait_reg_mem +ffffffff81ddab60 t gfx_v10_0_ring_get_rptr_gfx +ffffffff81ddab90 t gfx_v10_0_ring_get_wptr_gfx +ffffffff81ddaca0 t gfx_v10_0_ring_set_wptr_gfx +ffffffff81ddaeb0 t gfx_v10_0_ring_emit_ib_gfx +ffffffff81ddb560 t gfx_v10_0_ring_emit_fence +ffffffff81ddb930 t gfx_v10_0_ring_emit_pipeline_sync +ffffffff81ddb990 t gfx_v10_0_ring_emit_vm_flush +ffffffff81ddbb60 t gfx_v10_0_ring_emit_hdp_flush +ffffffff81ddbc30 t gfx_v10_0_ring_emit_gds_switch +ffffffff81ddbd10 t gfx_v10_0_ring_emit_init_cond_exec +ffffffff81ddbf40 t gfx_v10_0_ring_emit_patch_cond_exec +ffffffff81ddc000 t gfx_v10_0_ring_emit_sb +ffffffff81ddc0f0 t gfx_v10_0_ring_emit_cntxcntl +ffffffff81ddc5e0 t gfx_v10_0_ring_emit_frame_cntl +ffffffff81ddc6f0 t gfx_v10_0_ring_soft_recovery +ffffffff81ddc760 t gfx_v10_0_ring_preempt_ib +ffffffff81ddc8d0 t gfx_v10_0_emit_mem_sync +ffffffff81ddcc10 t gfx_v10_0_write_data_to_reg +ffffffff81ddce20 t gfx_v10_0_set_eop_interrupt_state +ffffffff81ddcf00 t gfx_v10_0_eop_irq +ffffffff81ddd0d0 t gfx_v10_0_set_gfx_eop_interrupt_state +ffffffff81ddd260 t gfx_v10_0_set_compute_eop_interrupt_state +ffffffff81ddd410 t gfx_v10_0_kiq_set_interrupt_state +ffffffff81ddd6f0 t gfx_v10_0_kiq_irq +ffffffff81ddd770 t gfx_v10_0_set_priv_reg_fault_state +ffffffff81ddd890 t gfx_v10_0_priv_reg_irq +ffffffff81ddd8f0 t gfx_v10_0_handle_priv_fault +ffffffff81ddda80 t gfx_v10_0_set_priv_inst_fault_state +ffffffff81dddba0 t gfx_v10_0_priv_inst_irq +ffffffff81dddc00 t gfx_v10_0_is_rlc_enabled +ffffffff81dddc80 t gfx_v10_0_set_safe_mode +ffffffff81dddf20 t gfx_v10_0_unset_safe_mode +ffffffff81dddfd0 t gfx_v10_0_rlc_init +ffffffff81dde050 t gfx_v10_0_get_csb_size +ffffffff81dde0b0 t gfx_v10_0_get_csb_buffer +ffffffff81dde230 t gfx_v10_0_rlc_resume +ffffffff81dded30 t gfx_v10_0_rlc_stop +ffffffff81ddee10 t gfx_v10_0_rlc_reset +ffffffff81ddefb0 t gfx_v10_0_rlc_start +ffffffff81ddf150 t gfx_v10_0_update_spm_vmid +ffffffff81ddf280 t gfx_v10_0_wait_for_rlc_autoload_complete +ffffffff81ddfe10 t gfx_v10_0_init_csb +ffffffff81de00e0 t gfx_v10_0_is_rlcg_access_range +ffffffff81de0110 t gfx_v10_0_gfx_mqd_init +ffffffff81de04f0 t gfx_v10_0_compute_mqd_init +ffffffff81de0990 t amdgpu_bo_unreserve +ffffffff81de0a70 t gfx_v10_0_get_gpu_clock_counter +ffffffff81de0f70 t gfx_v10_0_select_se_sh +ffffffff81de1010 t gfx_v10_0_read_wave_data +ffffffff81de1270 t gfx_v10_0_read_wave_vgprs +ffffffff81de12a0 t gfx_v10_0_read_wave_sgprs +ffffffff81de1320 t gfx_v10_0_select_me_pipe_q +ffffffff81de1340 t gfx_v10_0_init_spm_golden_registers +ffffffff81de13b0 t gfx_v10_0_update_perfmon_mgcg +ffffffff81de14d0 t wave_read_ind +ffffffff81de15b0 t wave_read_regs +ffffffff81de1710 t gfx_v10_0_cp_resume +ffffffff81de4350 t gfx_v10_3_get_disabled_sa +ffffffff81de4460 t gfx_v10_0_get_rb_active_bitmap +ffffffff81de4580 t gfx_v10_0_get_wgp_active_bitmap_per_sh +ffffffff81de4690 t gfx_v10_0_enable_gui_idle_interrupt +ffffffff81de47a0 t gfx_v10_0_cp_gfx_enable +ffffffff81de49e0 t gfx_v10_0_cp_compute_enable +ffffffff81de4b70 t amdgpu_bo_reserve +ffffffff81de4cf0 t gfx_v10_0_kiq_init_register +ffffffff81de5b60 t gfx_v10_0_cp_gfx_switch_pipe +ffffffff81de5c60 t gfx_v10_0_cp_gfx_set_doorbell +ffffffff81de5f30 t gfx_v10_0_cp_gfx_start +ffffffff81de6910 t gfx_v10_0_update_fine_grain_clock_gating +ffffffff81de6c30 t gfx_v10_0_update_medium_grain_clock_gating +ffffffff81de7350 t gfx_v10_0_update_3d_clock_gating +ffffffff81de7710 t gfx_v10_0_update_coarse_grain_clock_gating +ffffffff81de8000 t gfx_v11_0_early_init +ffffffff81de83a0 t gfx_v11_0_late_init +ffffffff81de8410 t gfx_v11_0_sw_init +ffffffff81de9360 t gfx_v11_0_sw_fini +ffffffff81de9640 t gfx_v11_0_hw_init +ffffffff81dedac0 t gfx_v11_0_hw_fini +ffffffff81dedd40 t gfx_v11_0_suspend +ffffffff81dedd80 t gfx_v11_0_resume +ffffffff81dedd90 t gfx_v11_0_is_idle +ffffffff81dede20 t gfx_v11_0_wait_for_idle +ffffffff81dedf00 t gfx_v11_0_check_soft_reset +ffffffff81dee030 t gfx_v11_0_soft_reset +ffffffff81deed10 t gfx_v11_0_post_soft_reset +ffffffff81deed20 t gfx_v11_0_set_clockgating_state +ffffffff81def900 t gfx_v11_0_set_powergating_state +ffffffff81defaf0 t gfx_v11_0_get_clockgating_state +ffffffff81defcc0 t gfx11_kiq_set_resources +ffffffff81defff0 t gfx11_kiq_map_queues +ffffffff81df0380 t gfx11_kiq_unmap_queues +ffffffff81df0780 t gfx11_kiq_query_status +ffffffff81df0a80 t gfx11_kiq_invalidate_tlbs +ffffffff81df0ba0 t gfx_v11_0_ring_get_rptr_compute +ffffffff81df0bd0 t gfx_v11_0_ring_get_wptr_compute +ffffffff81df0c40 t gfx_v11_0_ring_set_wptr_compute +ffffffff81df0d80 t gfx_v11_0_ring_emit_ib_compute +ffffffff81df10d0 t gfx_v11_0_ring_emit_fence_kiq +ffffffff81df1510 t gfx_v11_0_ring_test_ring +ffffffff81df17a0 t gfx_v11_0_ring_test_ib +ffffffff81df1a60 t gfx_v11_0_ring_emit_rreg +ffffffff81df1d00 t gfx_v11_0_ring_emit_wreg +ffffffff81df1f40 t gfx_v11_0_ring_emit_reg_wait +ffffffff81df1f90 t gfx_v11_0_ring_emit_reg_write_reg_wait +ffffffff81df2000 t gfx_v11_0_wait_reg_mem +ffffffff81df2330 t gfx_v11_0_ring_get_rptr_gfx +ffffffff81df2360 t gfx_v11_0_ring_get_wptr_gfx +ffffffff81df2470 t gfx_v11_0_ring_set_wptr_gfx +ffffffff81df2680 t gfx_v11_0_ring_emit_ib_gfx +ffffffff81df2d20 t gfx_v11_0_ring_emit_fence +ffffffff81df30f0 t gfx_v11_0_ring_emit_pipeline_sync +ffffffff81df3150 t gfx_v11_0_ring_emit_vm_flush +ffffffff81df3320 t gfx_v11_0_ring_emit_hdp_flush +ffffffff81df33f0 t gfx_v11_0_ring_emit_gds_switch +ffffffff81df34d0 t gfx_v11_0_ring_emit_init_cond_exec +ffffffff81df3700 t gfx_v11_0_ring_emit_patch_cond_exec +ffffffff81df37c0 t gfx_v11_0_ring_emit_cntxcntl +ffffffff81df3920 t gfx_v11_0_ring_emit_frame_cntl +ffffffff81df3a30 t gfx_v11_0_ring_soft_recovery +ffffffff81df3aa0 t gfx_v11_0_ring_preempt_ib +ffffffff81df3c10 t gfx_v11_0_emit_mem_sync +ffffffff81df3f50 t gfx_v11_0_write_data_to_reg +ffffffff81df4160 t gfx_v11_0_set_eop_interrupt_state +ffffffff81df41f0 t gfx_v11_0_eop_irq +ffffffff81df43c0 t gfx_v11_0_set_gfx_eop_interrupt_state +ffffffff81df4550 t gfx_v11_0_set_compute_eop_interrupt_state +ffffffff81df46e0 t gfx_v11_0_set_priv_reg_fault_state +ffffffff81df4800 t gfx_v11_0_priv_reg_irq +ffffffff81df4860 t gfx_v11_0_handle_priv_fault +ffffffff81df49f0 t gfx_v11_0_set_priv_inst_fault_state +ffffffff81df4b10 t gfx_v11_0_priv_inst_irq +ffffffff81df4b70 t gfx_v11_0_is_rlc_enabled +ffffffff81df4bf0 t gfx_v11_0_set_safe_mode +ffffffff81df4d40 t gfx_v11_0_unset_safe_mode +ffffffff81df4db0 t gfx_v11_0_rlc_init +ffffffff81df4e30 t gfx_v11_0_get_csb_size +ffffffff81df4e90 t gfx_v11_0_get_csb_buffer +ffffffff81df5010 t gfx_v11_0_rlc_resume +ffffffff81df5d30 t gfx_v11_0_rlc_stop +ffffffff81df5e10 t gfx_v11_0_rlc_reset +ffffffff81df5fb0 t gfx_v11_0_rlc_start +ffffffff81df6150 t gfx_v11_0_update_spm_vmid +ffffffff81df6250 t gfx_v11_0_init_csb +ffffffff81df63d0 t gfx_v11_0_gfx_mqd_init +ffffffff81df67a0 t gfx_v11_0_compute_mqd_init +ffffffff81df6cc0 t amdgpu_bo_unreserve +ffffffff81df6da0 t gfx_v11_0_get_gpu_clock_counter +ffffffff81df6ed0 t gfx_v11_0_select_se_sh +ffffffff81df6f70 t gfx_v11_0_read_wave_data +ffffffff81df71b0 t gfx_v11_0_read_wave_vgprs +ffffffff81df71e0 t gfx_v11_0_read_wave_sgprs +ffffffff81df7260 t gfx_v11_0_select_me_pipe_q +ffffffff81df7280 t gfx_v11_0_update_perf_clk +ffffffff81df73b0 t wave_read_ind +ffffffff81df7490 t wave_read_regs +ffffffff81df75f0 t gfx_v11_0_disable_gpa_mode +ffffffff81df7780 t gfx_v11_0_cp_resume +ffffffff81dfb820 t gfx_v11_0_config_me_cache +ffffffff81dfbbc0 t gfx_v11_0_config_pfp_cache +ffffffff81dfbf60 t gfx_v11_0_config_mec_cache +ffffffff81dfc300 t gfx_v11_0_enable_gui_idle_interrupt +ffffffff81dfc410 t gfx_v11_0_cp_compute_enable +ffffffff81dfc5e0 t gfx_v11_0_cp_gfx_enable +ffffffff81dfc7d0 t amdgpu_bo_reserve +ffffffff81dfc950 t gfx_v11_0_kiq_init_register +ffffffff81dfd7c0 t gfx_v11_0_cp_gfx_switch_pipe +ffffffff81dfd8a0 t gfx_v11_0_cp_gfx_set_doorbell +ffffffff81dfda80 t gfx_v11_0_cp_gfx_start +ffffffff81dff000 t gfx_v8_0_early_init +ffffffff81dff320 t gfx_v8_0_late_init +ffffffff81dffa20 t gfx_v8_0_sw_init +ffffffff81e010f0 t gfx_v8_0_sw_fini +ffffffff81e013b0 t gfx_v8_0_hw_init +ffffffff81e035e0 t gfx_v8_0_hw_fini +ffffffff81e03ad0 t gfx_v8_0_suspend +ffffffff81e03b10 t gfx_v8_0_resume +ffffffff81e03b20 t gfx_v8_0_is_idle +ffffffff81e03b90 t gfx_v8_0_wait_for_idle +ffffffff81e03c40 t gfx_v8_0_check_soft_reset +ffffffff81e03d20 t gfx_v8_0_pre_soft_reset +ffffffff81e03ea0 t gfx_v8_0_soft_reset +ffffffff81e04060 t gfx_v8_0_post_soft_reset +ffffffff81e04220 t gfx_v8_0_set_clockgating_state +ffffffff81e044e0 t gfx_v8_0_set_powergating_state +ffffffff81e048a0 t gfx_v8_0_get_clockgating_state +ffffffff81e04980 t gfx_v8_0_get_gpu_clock_counter +ffffffff81e04a20 t gfx_v8_0_select_se_sh +ffffffff81e04a80 t gfx_v8_0_read_wave_data +ffffffff81e04f20 t gfx_v8_0_read_wave_sgprs +ffffffff81e04fd0 t gfx_v8_0_select_me_pipe_q +ffffffff81e04ff0 t gfx_v8_0_ring_get_rptr +ffffffff81e05020 t gfx_v8_0_ring_get_wptr_compute +ffffffff81e05050 t gfx_v8_0_ring_set_wptr_compute +ffffffff81e05090 t gfx_v8_0_ring_emit_fence_kiq +ffffffff81e054c0 t gfx_v8_0_ring_test_ring +ffffffff81e056c0 t gfx_v8_0_ring_emit_rreg +ffffffff81e05960 t gfx_v8_0_ring_emit_wreg +ffffffff81e05ba0 t gfx_v8_0_ring_get_wptr_gfx +ffffffff81e05c00 t gfx_v8_0_ring_set_wptr_gfx +ffffffff81e05c70 t gfx_v8_0_ring_emit_ib_gfx +ffffffff81e061d0 t gfx_v8_0_ring_emit_fence_gfx +ffffffff81e066d0 t gfx_v8_0_ring_emit_pipeline_sync +ffffffff81e069c0 t gfx_v8_0_ring_emit_vm_flush +ffffffff81e06d70 t gfx_v8_0_ring_emit_hdp_flush +ffffffff81e07090 t gfx_v8_0_ring_emit_gds_switch +ffffffff81e07860 t gfx_v8_0_ring_test_ib +ffffffff81e07a10 t gfx_v8_0_ring_emit_init_cond_exec +ffffffff81e07c40 t gfx_v8_0_ring_emit_patch_cond_exec +ffffffff81e07cf0 t gfx_v8_ring_emit_sb +ffffffff81e07de0 t gfx_v8_ring_emit_cntxcntl +ffffffff81e08380 t gfx_v8_0_ring_soft_recovery +ffffffff81e083b0 t gfx_v8_0_emit_mem_sync +ffffffff81e085c0 t gfx_v8_0_ring_emit_ib_compute +ffffffff81e088d0 t gfx_v8_0_ring_emit_fence_compute +ffffffff81e08bd0 t gfx_v8_0_emit_mem_sync_compute +ffffffff81e08e90 t gfx_v8_0_emit_wave_limit +ffffffff81e09040 t gfx_v8_0_set_eop_interrupt_state +ffffffff81e09250 t gfx_v8_0_eop_irq +ffffffff81e09380 t gfx_v8_0_set_priv_reg_fault_state +ffffffff81e09400 t gfx_v8_0_priv_reg_irq +ffffffff81e09520 t gfx_v8_0_set_priv_inst_fault_state +ffffffff81e095a0 t gfx_v8_0_priv_inst_irq +ffffffff81e096c0 t gfx_v8_0_set_cp_ecc_int_state +ffffffff81e09930 t gfx_v8_0_cp_ecc_error_irq +ffffffff81e09980 t gfx_v8_0_set_sq_int_state +ffffffff81e09a10 t gfx_v8_0_sq_irq +ffffffff81e09ab0 t gfx_v8_0_parse_sq_irq +ffffffff81e09d00 t gfx_v8_0_is_rlc_enabled +ffffffff81e09d40 t gfx_v8_0_set_safe_mode +ffffffff81e09e40 t gfx_v8_0_unset_safe_mode +ffffffff81e09ee0 t gfx_v8_0_rlc_init +ffffffff81e09f90 t gfx_v8_0_get_csb_size +ffffffff81e09ff0 t gfx_v8_0_get_csb_buffer +ffffffff81e0a170 t gfx_v8_0_cp_jump_table_num +ffffffff81e0a1b0 t gfx_v8_0_rlc_resume +ffffffff81e0a540 t gfx_v8_0_rlc_stop +ffffffff81e0a5b0 t gfx_v8_0_rlc_reset +ffffffff81e0a630 t gfx_v8_0_rlc_start +ffffffff81e0a6b0 t gfx_v8_0_update_spm_vmid +ffffffff81e0a720 t gfx_v8_0_init_save_restore_list +ffffffff81e0ab40 t gfx_v8_0_wait_for_rlc_serdes +ffffffff81e0ad60 t gfx_v8_0_sq_irq_work_func +ffffffff81e0ad80 t amdgpu_bo_unreserve +ffffffff81e0ae60 t gfx_v8_0_kiq_resume +ffffffff81e0b0c0 t gfx_v8_0_cp_gfx_resume +ffffffff81e0bbe0 t gfx_v8_0_kcq_resume +ffffffff81e0c610 t amdgpu_bo_reserve +ffffffff81e0c790 t gfx_v8_0_mqd_commit +ffffffff81e0c970 t gfx_v8_0_mqd_init +ffffffff81e0cd90 t gfx_v8_0_deactivate_hqd +ffffffff81e0ce50 t gfx_v8_0_update_medium_grain_clock_gating +ffffffff81e0d180 t gfx_v8_0_update_coarse_grain_clock_gating +ffffffff81e0e000 t gfx_v9_0_ras_error_inject +ffffffff81e0e1a0 t gfx_v9_0_query_ras_error_count +ffffffff81e0ed40 t gfx_v9_0_reset_ras_error_count +ffffffff81e0f780 T gfx_v9_0_select_se_sh +ffffffff81e0f820 t gfx_v9_0_early_init +ffffffff81e0fc80 t gfx_v9_0_late_init +ffffffff81e10990 t gfx_v9_0_sw_init +ffffffff81e12000 t gfx_v9_0_sw_fini +ffffffff81e122b0 t gfx_v9_0_hw_init +ffffffff81e15360 t gfx_v9_0_hw_fini +ffffffff81e15ac0 t gfx_v9_0_suspend +ffffffff81e15b00 t gfx_v9_0_resume +ffffffff81e15b10 t gfx_v9_0_is_idle +ffffffff81e15b90 t gfx_v9_0_wait_for_idle +ffffffff81e15c70 t gfx_v9_0_soft_reset +ffffffff81e16000 t gfx_v9_0_set_clockgating_state +ffffffff81e160d0 t gfx_v9_0_set_powergating_state +ffffffff81e164d0 t gfx_v9_0_get_clockgating_state +ffffffff81e165e0 t gfx_v9_0_kiq_set_resources +ffffffff81e16910 t gfx_v9_0_kiq_map_queues +ffffffff81e16c50 t gfx_v9_0_kiq_unmap_queues +ffffffff81e16fd0 t gfx_v9_0_kiq_query_status +ffffffff81e172d0 t gfx_v9_0_kiq_invalidate_tlbs +ffffffff81e173f0 t gfx_v9_0_ring_get_rptr_compute +ffffffff81e17420 t gfx_v9_0_ring_get_wptr_compute +ffffffff81e17490 t gfx_v9_0_ring_set_wptr_compute +ffffffff81e174f0 t gfx_v9_0_ring_emit_fence_kiq +ffffffff81e17930 t gfx_v9_0_ring_test_ring +ffffffff81e17b60 t gfx_v9_0_ring_emit_rreg +ffffffff81e17e00 t gfx_v9_0_ring_emit_wreg +ffffffff81e18040 t gfx_v9_0_ring_emit_reg_wait +ffffffff81e18090 t gfx_v9_0_ring_emit_reg_write_reg_wait +ffffffff81e18130 t gfx_v9_0_wait_reg_mem +ffffffff81e18460 t gfx_v9_0_ring_get_rptr_gfx +ffffffff81e18490 t gfx_v9_0_ring_get_wptr_gfx +ffffffff81e185a0 t gfx_v9_0_ring_set_wptr_gfx +ffffffff81e186d0 t gfx_v9_0_ring_emit_ib_gfx +ffffffff81e18bf0 t gfx_v9_0_ring_emit_fence +ffffffff81e18fb0 t gfx_v9_0_ring_emit_pipeline_sync +ffffffff81e19010 t gfx_v9_0_ring_emit_vm_flush +ffffffff81e19120 t gfx_v9_0_ring_emit_hdp_flush +ffffffff81e191f0 t gfx_v9_0_ring_emit_gds_switch +ffffffff81e192d0 t gfx_v9_0_ring_test_ib +ffffffff81e19480 t gfx_v9_0_ring_emit_init_cond_exec +ffffffff81e196b0 t gfx_v9_0_ring_emit_patch_cond_exec +ffffffff81e19780 t gfx_v9_ring_emit_sb +ffffffff81e19870 t gfx_v9_ring_emit_cntxcntl +ffffffff81e19c70 t gfx_v9_0_ring_emit_frame_cntl +ffffffff81e19d80 t gfx_v9_0_ring_soft_recovery +ffffffff81e19df0 t gfx_v9_0_emit_mem_sync +ffffffff81e1a0b0 t gfx_v9_0_write_data_to_reg +ffffffff81e1a2c0 t gfx_v9_0_ring_emit_ib_compute +ffffffff81e1a5f0 t gfx_v9_0_emit_wave_limit +ffffffff81e1a7c0 t gfx_v9_0_set_eop_interrupt_state +ffffffff81e1a990 t gfx_v9_0_eop_irq +ffffffff81e1aac0 t gfx_v9_0_set_compute_eop_interrupt_state +ffffffff81e1ac70 t gfx_v9_0_set_priv_reg_fault_state +ffffffff81e1ad90 t gfx_v9_0_priv_reg_irq +ffffffff81e1aeb0 t gfx_v9_0_set_priv_inst_fault_state +ffffffff81e1afd0 t gfx_v9_0_priv_inst_irq +ffffffff81e1b0f0 t gfx_v9_0_set_cp_ecc_error_state +ffffffff81e1b920 t gfx_v9_0_is_rlc_enabled +ffffffff81e1b9a0 t gfx_v9_0_set_safe_mode +ffffffff81e1baf0 t gfx_v9_0_unset_safe_mode +ffffffff81e1bb60 t gfx_v9_0_rlc_init +ffffffff81e1c370 t gfx_v9_0_get_csb_size +ffffffff81e1c3d0 t gfx_v9_0_get_csb_buffer +ffffffff81e1c520 t gfx_v9_0_cp_jump_table_num +ffffffff81e1c570 t gfx_v9_0_rlc_resume +ffffffff81e1d310 t gfx_v9_0_rlc_stop +ffffffff81e1d7b0 t gfx_v9_0_rlc_reset +ffffffff81e1d940 t gfx_v9_0_rlc_start +ffffffff81e1da80 t gfx_v9_0_update_spm_vmid +ffffffff81e1dbb0 t gfx_v9_0_is_rlcg_access_range +ffffffff81e1dc00 t gfx_v9_0_init_always_on_cu_mask +ffffffff81e1df60 t gfx_v9_0_init_csb +ffffffff81e1e0f0 t gfx_v9_0_enable_lbpw +ffffffff81e1e1e0 t gfx_v9_0_enable_gui_idle_interrupt +ffffffff81e1e2e0 t amdgpu_bo_unreserve +ffffffff81e1e3c0 t gfx_v9_0_get_gpu_clock_counter +ffffffff81e1eb40 t gfx_v9_0_read_wave_data +ffffffff81e1ed80 t gfx_v9_0_read_wave_vgprs +ffffffff81e1eda0 t gfx_v9_0_read_wave_sgprs +ffffffff81e1edf0 t gfx_v9_0_select_me_pipe_q +ffffffff81e1ee10 t wave_read_ind +ffffffff81e1ef20 t wave_read_regs +ffffffff81e1f090 t gfx_v9_0_cp_gfx_enable +ffffffff81e1f170 t amdgpu_bo_reserve +ffffffff81e1f2f0 t gfx_v9_0_kiq_init_register +ffffffff81e1ff70 t gfx_v9_0_mqd_init +ffffffff81e204b0 t gfx_v9_0_update_medium_grain_clock_gating +ffffffff81e209c0 t gfx_v9_0_update_3d_clock_gating +ffffffff81e20da0 t gfx_v9_0_update_coarse_grain_clock_gating +ffffffff81e22000 t gfx_v9_4_ras_error_inject +ffffffff81e22130 t gfx_v9_4_query_ras_error_count +ffffffff81e22ef0 t gfx_v9_4_query_ras_error_status +ffffffff81e230c0 t gfx_v9_4_reset_ras_error_count +ffffffff81e24000 T gfx_v9_4_2_do_edc_gpr_workarounds +ffffffff81e24790 T gfx_v9_4_2_init_golden_registers +ffffffff81e24830 T gfx_v9_4_2_debug_trap_config_init +ffffffff81e248d0 T gfx_v9_4_2_set_power_brake_sequence +ffffffff81e24aa0 t gfx_v9_4_2_ras_error_inject +ffffffff81e24bd0 t gfx_v9_4_2_query_ras_error_count +ffffffff81e24c80 t gfx_v9_4_2_query_ras_error_status +ffffffff81e254d0 t gfx_v9_4_2_reset_ras_error_count +ffffffff81e25530 t gfx_v9_4_2_reset_ras_error_status +ffffffff81e259f0 t gfx_v9_4_2_enable_watchdog_timer +ffffffff81e25c10 t gfx_v9_4_2_query_uctl2_poison_status +ffffffff81e25c90 t gfx_v9_4_2_run_shader +ffffffff81e26010 t gfx_v9_4_2_wait_for_waves_assigned +ffffffff81e26650 t gfx_v9_4_2_query_sram_edc_count +ffffffff81e269a0 t gfx_v9_4_2_query_utc_edc_count +ffffffff81e26b80 t wave_read_ind +ffffffff81e27000 t gfxhub_v1_0_get_mc_fb_offset +ffffffff81e27090 t gfxhub_v1_0_setup_vm_pt_regs +ffffffff81e271d0 t gfxhub_v1_0_gart_enable +ffffffff81e286c0 t gfxhub_v1_0_gart_disable +ffffffff81e28950 t gfxhub_v1_0_set_fault_enable_default +ffffffff81e28a40 t gfxhub_v1_0_init +ffffffff81e29000 T gfxhub_v1_1_get_xgmi_info +ffffffff81e2a000 t gfxhub_v2_0_get_fb_location +ffffffff81e2a090 t gfxhub_v2_0_get_mc_fb_offset +ffffffff81e2a120 t gfxhub_v2_0_setup_vm_pt_regs +ffffffff81e2a260 t gfxhub_v2_0_gart_enable +ffffffff81e2b460 t gfxhub_v2_0_gart_disable +ffffffff81e2b6a0 t gfxhub_v2_0_set_fault_enable_default +ffffffff81e2b790 t gfxhub_v2_0_init +ffffffff81e2b860 t gfxhub_v2_0_print_l2_protection_fault_status +ffffffff81e2ba40 t gfxhub_v2_0_get_invalidate_req +ffffffff81e2c000 t gfxhub_v2_1_get_fb_location +ffffffff81e2c090 t gfxhub_v2_1_get_mc_fb_offset +ffffffff81e2c120 t gfxhub_v2_1_setup_vm_pt_regs +ffffffff81e2c260 t gfxhub_v2_1_gart_enable +ffffffff81e2d540 t gfxhub_v2_1_gart_disable +ffffffff81e2d7c0 t gfxhub_v2_1_set_fault_enable_default +ffffffff81e2d8d0 t gfxhub_v2_1_init +ffffffff81e2d9a0 t gfxhub_v2_1_get_xgmi_info +ffffffff81e2dad0 t gfxhub_v2_1_utcl2_harvest +ffffffff81e2dcb0 t gfxhub_v2_1_save_regs +ffffffff81e2e6e0 t gfxhub_v2_1_restore_regs +ffffffff81e2f2c0 t gfxhub_v2_1_halt +ffffffff81e2f680 t gfxhub_v2_1_print_l2_protection_fault_status +ffffffff81e2f860 t gfxhub_v2_1_get_invalidate_req +ffffffff81e30000 t gfxhub_v3_0_get_fb_location +ffffffff81e30090 t gfxhub_v3_0_get_mc_fb_offset +ffffffff81e30120 t gfxhub_v3_0_setup_vm_pt_regs +ffffffff81e30260 t gfxhub_v3_0_gart_enable +ffffffff81e314e0 t gfxhub_v3_0_gart_disable +ffffffff81e31760 t gfxhub_v3_0_set_fault_enable_default +ffffffff81e31b00 t gfxhub_v3_0_init +ffffffff81e31bd0 t gfxhub_v3_0_print_l2_protection_fault_status +ffffffff81e31db0 t gfxhub_v3_0_get_invalidate_req +ffffffff81e32000 t gfxhub_v3_0_3_get_fb_location +ffffffff81e32090 t gfxhub_v3_0_3_get_mc_fb_offset +ffffffff81e32120 t gfxhub_v3_0_3_setup_vm_pt_regs +ffffffff81e32260 t gfxhub_v3_0_3_gart_enable +ffffffff81e334f0 t gfxhub_v3_0_3_gart_disable +ffffffff81e33790 t gfxhub_v3_0_3_set_fault_enable_default +ffffffff81e338a0 t gfxhub_v3_0_3_init +ffffffff81e33970 t gfxhub_v3_0_3_print_l2_protection_fault_status +ffffffff81e33b50 t gfxhub_v3_0_3_get_invalidate_req +ffffffff81e34000 t gmc_v10_0_early_init +ffffffff81e341f0 t gmc_v10_0_late_init +ffffffff81e34260 t gmc_v10_0_sw_init +ffffffff81e34680 t gmc_v10_0_sw_fini +ffffffff81e346d0 t gmc_v10_0_hw_init +ffffffff81e348a0 t gmc_v10_0_hw_fini +ffffffff81e34940 t gmc_v10_0_suspend +ffffffff81e349e0 t gmc_v10_0_resume +ffffffff81e34a40 t gmc_v10_0_is_idle +ffffffff81e34a70 t gmc_v10_0_wait_for_idle +ffffffff81e34aa0 t gmc_v10_0_soft_reset +ffffffff81e34ad0 t gmc_v10_0_set_clockgating_state +ffffffff81e34b80 t gmc_v10_0_set_powergating_state +ffffffff81e34bb0 t gmc_v10_0_get_clockgating_state +ffffffff81e34c50 t gmc_v10_0_flush_gpu_tlb +ffffffff81e34f00 t gmc_v10_0_flush_gpu_tlb_pasid +ffffffff81e35120 t gmc_v10_0_emit_flush_gpu_tlb +ffffffff81e352d0 t gmc_v10_0_emit_pasid_mapping +ffffffff81e35340 t gmc_v10_0_map_mtype +ffffffff81e35390 t gmc_v10_0_get_vm_pde +ffffffff81e35480 t gmc_v10_0_get_vm_pte +ffffffff81e35530 t gmc_v10_0_get_vbios_fb_size +ffffffff81e356a0 t gmc_v10_0_flush_vm_hub +ffffffff81e35b00 t gmc_v10_0_vm_fault_interrupt_state +ffffffff81e35b70 t gmc_v10_0_process_interrupt +ffffffff81e35e30 t gmc_v10_0_ecc_interrupt_state +ffffffff81e36000 t gmc_v11_0_early_init +ffffffff81e36230 t gmc_v11_0_late_init +ffffffff81e362a0 t gmc_v11_0_sw_init +ffffffff81e365c0 t gmc_v11_0_sw_fini +ffffffff81e36610 t gmc_v11_0_hw_init +ffffffff81e36750 t gmc_v11_0_hw_fini +ffffffff81e367e0 t gmc_v11_0_suspend +ffffffff81e36870 t gmc_v11_0_resume +ffffffff81e368d0 t gmc_v11_0_is_idle +ffffffff81e36900 t gmc_v11_0_wait_for_idle +ffffffff81e36930 t gmc_v11_0_soft_reset +ffffffff81e36960 t gmc_v11_0_set_clockgating_state +ffffffff81e369e0 t gmc_v11_0_set_powergating_state +ffffffff81e36a10 t gmc_v11_0_get_clockgating_state +ffffffff81e36a50 t gmc_v11_0_flush_gpu_tlb +ffffffff81e36f20 t gmc_v11_0_flush_gpu_tlb_pasid +ffffffff81e37110 t gmc_v11_0_emit_flush_gpu_tlb +ffffffff81e372c0 t gmc_v11_0_emit_pasid_mapping +ffffffff81e37330 t gmc_v11_0_map_mtype +ffffffff81e37380 t gmc_v11_0_get_vm_pde +ffffffff81e37480 t gmc_v11_0_get_vm_pte +ffffffff81e37530 t gmc_v11_0_get_vbios_fb_size +ffffffff81e37560 t gmc_v11_0_vm_fault_interrupt_state +ffffffff81e375d0 t gmc_v11_0_process_interrupt +ffffffff81e377f0 t gmc_v11_0_ecc_interrupt_state +ffffffff81e38000 t gmc_v7_0_early_init +ffffffff81e38090 t gmc_v7_0_late_init +ffffffff81e380e0 t gmc_v7_0_sw_init +ffffffff81e385e0 t gmc_v7_0_sw_fini +ffffffff81e38690 t gmc_v7_0_hw_init +ffffffff81e39040 t gmc_v7_0_hw_fini +ffffffff81e39100 t gmc_v7_0_suspend +ffffffff81e39140 t gmc_v7_0_resume +ffffffff81e391a0 t gmc_v7_0_is_idle +ffffffff81e391f0 t gmc_v7_0_wait_for_idle +ffffffff81e39290 t gmc_v7_0_soft_reset +ffffffff81e394f0 t gmc_v7_0_set_clockgating_state +ffffffff81e39750 t gmc_v7_0_set_powergating_state +ffffffff81e39780 t gmc_v7_0_flush_gpu_tlb +ffffffff81e397b0 t gmc_v7_0_flush_gpu_tlb_pasid +ffffffff81e39870 t gmc_v7_0_emit_flush_gpu_tlb +ffffffff81e39900 t gmc_v7_0_emit_pasid_mapping +ffffffff81e39930 t gmc_v7_0_set_prt +ffffffff81e39af0 t gmc_v7_0_get_vm_pde +ffffffff81e39b50 t gmc_v7_0_get_vm_pte +ffffffff81e39b90 t gmc_v7_0_get_vbios_fb_size +ffffffff81e39c00 t gmc_v7_0_vm_fault_interrupt_state +ffffffff81e39cd0 t gmc_v7_0_process_interrupt +ffffffff81e3a000 t gmc_v8_0_early_init +ffffffff81e3a090 t gmc_v8_0_late_init +ffffffff81e3a0e0 t gmc_v8_0_sw_init +ffffffff81e3a760 t gmc_v8_0_sw_fini +ffffffff81e3a810 t gmc_v8_0_hw_init +ffffffff81e3b4c0 t gmc_v8_0_hw_fini +ffffffff81e3b580 t gmc_v8_0_suspend +ffffffff81e3b5c0 t gmc_v8_0_resume +ffffffff81e3b620 t gmc_v8_0_is_idle +ffffffff81e3b670 t gmc_v8_0_wait_for_idle +ffffffff81e3b710 t gmc_v8_0_check_soft_reset +ffffffff81e3b780 t gmc_v8_0_pre_soft_reset +ffffffff81e3b8f0 t gmc_v8_0_soft_reset +ffffffff81e3b9c0 t gmc_v8_0_post_soft_reset +ffffffff81e3ba30 t gmc_v8_0_set_clockgating_state +ffffffff81e3bff0 t gmc_v8_0_set_powergating_state +ffffffff81e3c020 t gmc_v8_0_get_clockgating_state +ffffffff81e3c090 t gmc_v8_0_flush_gpu_tlb +ffffffff81e3c0c0 t gmc_v8_0_flush_gpu_tlb_pasid +ffffffff81e3c180 t gmc_v8_0_emit_flush_gpu_tlb +ffffffff81e3c210 t gmc_v8_0_emit_pasid_mapping +ffffffff81e3c240 t gmc_v8_0_set_prt +ffffffff81e3c400 t gmc_v8_0_get_vm_pde +ffffffff81e3c460 t gmc_v8_0_get_vm_pte +ffffffff81e3c4b0 t gmc_v8_0_get_vbios_fb_size +ffffffff81e3c520 t gmc_v8_0_vm_fault_interrupt_state +ffffffff81e3c5f0 t gmc_v8_0_process_interrupt +ffffffff81e3d000 T gmc_v9_0_restore_registers +ffffffff81e3d150 t gmc_v9_0_early_init +ffffffff81e3d500 t gmc_v9_0_late_init +ffffffff81e3d610 t gmc_v9_0_sw_init +ffffffff81e3dcc0 t gmc_v9_0_sw_fini +ffffffff81e3dd30 t gmc_v9_0_hw_init +ffffffff81e3e130 t gmc_v9_0_hw_fini +ffffffff81e3e1f0 t gmc_v9_0_suspend +ffffffff81e3e2b0 t gmc_v9_0_resume +ffffffff81e3e310 t gmc_v9_0_is_idle +ffffffff81e3e340 t gmc_v9_0_wait_for_idle +ffffffff81e3e370 t gmc_v9_0_soft_reset +ffffffff81e3e3a0 t gmc_v9_0_set_clockgating_state +ffffffff81e3e400 t gmc_v9_0_set_powergating_state +ffffffff81e3e430 t gmc_v9_0_get_clockgating_state +ffffffff81e3e470 t gmc_v9_0_flush_gpu_tlb +ffffffff81e3eab0 t gmc_v9_0_flush_gpu_tlb_pasid +ffffffff81e3ed80 t gmc_v9_0_emit_flush_gpu_tlb +ffffffff81e3ef50 t gmc_v9_0_emit_pasid_mapping +ffffffff81e3efc0 t gmc_v9_0_map_mtype +ffffffff81e3f000 t gmc_v9_0_get_vm_pde +ffffffff81e3f100 t gmc_v9_0_get_vm_pte +ffffffff81e3f1d0 t gmc_v9_0_get_vbios_fb_size +ffffffff81e3f360 t gmc_v9_0_vm_fault_interrupt_state +ffffffff81e3f6e0 t gmc_v9_0_process_interrupt +ffffffff81e3fd20 t gmc_v9_0_ecc_interrupt_state +ffffffff81e40000 t hdp_v4_0_query_ras_error_count +ffffffff81e400c0 t hdp_v4_0_reset_ras_error_count +ffffffff81e401e0 t hdp_v4_0_flush_hdp +ffffffff81e40230 t hdp_v4_0_invalidate_hdp +ffffffff81e40300 t hdp_v4_0_update_clock_gating +ffffffff81e40400 t hdp_v4_0_get_clockgating_state +ffffffff81e40450 t hdp_v4_0_init_registers +ffffffff81e41000 t hdp_v5_0_flush_hdp +ffffffff81e41050 t hdp_v5_0_invalidate_hdp +ffffffff81e410f0 t hdp_v5_0_update_clock_gating +ffffffff81e414e0 t hdp_v5_0_get_clockgating_state +ffffffff81e41600 t hdp_v5_0_init_registers +ffffffff81e42000 t hdp_v5_2_flush_hdp +ffffffff81e42050 t hdp_v5_2_update_clock_gating +ffffffff81e42440 t hdp_v5_2_get_clockgating_state +ffffffff81e43000 t hdp_v6_0_flush_hdp +ffffffff81e43050 t hdp_v6_0_update_clock_gating +ffffffff81e43360 t hdp_v6_0_get_clockgating_state +ffffffff81e44000 t iceland_ih_early_init +ffffffff81e44050 t iceland_ih_sw_init +ffffffff81e440b0 t iceland_ih_sw_fini +ffffffff81e440f0 t iceland_ih_hw_init +ffffffff81e44320 t iceland_ih_hw_fini +ffffffff81e443f0 t iceland_ih_suspend +ffffffff81e444c0 t iceland_ih_resume +ffffffff81e44500 t iceland_ih_is_idle +ffffffff81e44550 t iceland_ih_wait_for_idle +ffffffff81e445f0 t iceland_ih_soft_reset +ffffffff81e446d0 t iceland_ih_set_clockgating_state +ffffffff81e44700 t iceland_ih_set_powergating_state +ffffffff81e44730 t iceland_ih_get_wptr +ffffffff81e44820 t iceland_ih_decode_iv +ffffffff81e448a0 t iceland_ih_set_rptr +ffffffff81e45000 t ih_v6_0_early_init +ffffffff81e45050 t ih_v6_0_sw_init +ffffffff81e451b0 t ih_v6_0_sw_fini +ffffffff81e451f0 t ih_v6_0_hw_init +ffffffff81e457a0 t ih_v6_0_hw_fini +ffffffff81e45800 t ih_v6_0_suspend +ffffffff81e45860 t ih_v6_0_resume +ffffffff81e45870 t ih_v6_0_is_idle +ffffffff81e458a0 t ih_v6_0_wait_for_idle +ffffffff81e458d0 t ih_v6_0_soft_reset +ffffffff81e45900 t ih_v6_0_set_clockgating_state +ffffffff81e45a20 t ih_v6_0_set_powergating_state +ffffffff81e45b90 t ih_v6_0_get_clockgating_state +ffffffff81e45c20 t ih_v6_0_get_wptr +ffffffff81e45d10 t ih_v6_0_set_rptr +ffffffff81e45de0 t ih_v6_0_self_irq +ffffffff81e45e50 t ih_v6_0_toggle_interrupts +ffffffff81e46030 t force_update_wptr_for_self_int +ffffffff81e47000 t imu_v11_0_init_microcode +ffffffff81e471f0 t imu_v11_0_load_microcode +ffffffff81e47550 t imu_v11_0_setup +ffffffff81e477d0 t imu_v11_0_start +ffffffff81e478c0 t imu_v11_0_program_rlc_ram +ffffffff81e47a70 t imu_v11_0_wait_for_reset_status +ffffffff81e47bc0 t program_imu_rlc_ram +ffffffff81e48000 T imu_v11_0_3_program_rlc_ram +ffffffff81e49000 T jpeg_v1_0_early_init +ffffffff81e49060 T jpeg_v1_0_sw_init +ffffffff81e49130 T jpeg_v1_0_sw_fini +ffffffff81e49150 T jpeg_v1_0_start +ffffffff81e49bc0 t jpeg_v1_0_decode_ring_get_rptr +ffffffff81e49c50 t jpeg_v1_0_decode_ring_get_wptr +ffffffff81e49ce0 t jpeg_v1_0_decode_ring_set_wptr +ffffffff81e49d50 t jpeg_v1_0_decode_ring_emit_ib +ffffffff81e4a660 t jpeg_v1_0_decode_ring_emit_fence +ffffffff81e4afc0 t jpeg_v1_0_decode_ring_emit_vm_flush +ffffffff81e4b030 t jpeg_v1_0_decode_ring_nop +ffffffff81e4b190 t jpeg_v1_0_decode_ring_insert_start +ffffffff81e4b360 t jpeg_v1_0_decode_ring_insert_end +ffffffff81e4b530 t jpeg_v1_0_ring_begin_use +ffffffff81e4b630 t jpeg_v1_0_decode_ring_emit_wreg +ffffffff81e4b890 t jpeg_v1_0_decode_ring_emit_reg_wait +ffffffff81e4bcb0 t jpeg_v1_0_set_interrupt_state +ffffffff81e4bce0 t jpeg_v1_0_process_interrupt +ffffffff81e4c000 T jpeg_v2_0_dec_ring_insert_start +ffffffff81e4c1b0 T jpeg_v2_0_dec_ring_insert_end +ffffffff81e4c360 T jpeg_v2_0_dec_ring_emit_fence +ffffffff81e4ca50 T jpeg_v2_0_dec_ring_emit_ib +ffffffff81e4d240 T jpeg_v2_0_dec_ring_emit_reg_wait +ffffffff81e4d600 T jpeg_v2_0_dec_ring_emit_vm_flush +ffffffff81e4d670 T jpeg_v2_0_dec_ring_emit_wreg +ffffffff81e4d8b0 T jpeg_v2_0_dec_ring_nop +ffffffff81e4da10 t jpeg_v2_0_early_init +ffffffff81e4da80 t jpeg_v2_0_sw_init +ffffffff81e4db90 t jpeg_v2_0_sw_fini +ffffffff81e4dbe0 t jpeg_v2_0_hw_init +ffffffff81e4dc60 t jpeg_v2_0_hw_fini +ffffffff81e4dd40 t jpeg_v2_0_suspend +ffffffff81e4dd70 t jpeg_v2_0_resume +ffffffff81e4de00 t jpeg_v2_0_is_idle +ffffffff81e4de80 t jpeg_v2_0_wait_for_idle +ffffffff81e4df70 t jpeg_v2_0_set_clockgating_state +ffffffff81e4e020 t jpeg_v2_0_set_powergating_state +ffffffff81e4e820 t jpeg_v2_0_dec_ring_get_rptr +ffffffff81e4e8b0 t jpeg_v2_0_dec_ring_get_wptr +ffffffff81e4e950 t jpeg_v2_0_dec_ring_set_wptr +ffffffff81e4e9f0 t jpeg_v2_0_set_interrupt_state +ffffffff81e4ea20 t jpeg_v2_0_process_interrupt +ffffffff81e4eab0 t jpeg_v2_0_enable_clock_gating +ffffffff81e4ec50 t jpeg_v2_0_disable_clock_gating +ffffffff81e4f000 t jpeg_v2_6_query_ras_poison_status +ffffffff81e4f140 t jpeg_v2_5_early_init +ffffffff81e4f410 t jpeg_v2_5_sw_init +ffffffff81e4f630 t jpeg_v2_5_sw_fini +ffffffff81e4f680 t jpeg_v2_5_hw_init +ffffffff81e4f770 t jpeg_v2_5_hw_fini +ffffffff81e4f8b0 t jpeg_v2_5_suspend +ffffffff81e4f8e0 t jpeg_v2_5_resume +ffffffff81e4f9e0 t jpeg_v2_5_is_idle +ffffffff81e4fae0 t jpeg_v2_5_wait_for_idle +ffffffff81e4fc10 t jpeg_v2_5_set_clockgating_state +ffffffff81e4fd80 t jpeg_v2_5_set_powergating_state +ffffffff81e50470 t jpeg_v2_5_dec_ring_get_rptr +ffffffff81e50510 t jpeg_v2_5_dec_ring_get_wptr +ffffffff81e505c0 t jpeg_v2_5_dec_ring_set_wptr +ffffffff81e50670 t jpeg_v2_6_dec_ring_insert_start +ffffffff81e50830 t jpeg_v2_6_dec_ring_insert_end +ffffffff81e509f0 t jpeg_v2_5_set_interrupt_state +ffffffff81e50a20 t jpeg_v2_5_process_interrupt +ffffffff81e50b00 t jpeg_v2_5_enable_clock_gating +ffffffff81e50bd0 t jpeg_v2_5_disable_clock_gating +ffffffff81e51000 t jpeg_v3_0_early_init +ffffffff81e510e0 t jpeg_v3_0_sw_init +ffffffff81e511f0 t jpeg_v3_0_sw_fini +ffffffff81e51240 t jpeg_v3_0_hw_init +ffffffff81e512c0 t jpeg_v3_0_hw_fini +ffffffff81e513a0 t jpeg_v3_0_suspend +ffffffff81e513d0 t jpeg_v3_0_resume +ffffffff81e51460 t jpeg_v3_0_is_idle +ffffffff81e514e0 t jpeg_v3_0_wait_for_idle +ffffffff81e515d0 t jpeg_v3_0_set_clockgating_state +ffffffff81e51680 t jpeg_v3_0_set_powergating_state +ffffffff81e51f30 t jpeg_v3_0_dec_ring_get_rptr +ffffffff81e51fc0 t jpeg_v3_0_dec_ring_get_wptr +ffffffff81e52060 t jpeg_v3_0_dec_ring_set_wptr +ffffffff81e52100 t jpeg_v3_0_set_interrupt_state +ffffffff81e52130 t jpeg_v3_0_process_interrupt +ffffffff81e521c0 t jpeg_v3_0_enable_clock_gating +ffffffff81e52290 t jpeg_v3_0_disable_clock_gating +ffffffff81e53000 t jpeg_v4_0_early_init +ffffffff81e53080 t jpeg_v4_0_sw_init +ffffffff81e53190 t jpeg_v4_0_sw_fini +ffffffff81e531e0 t jpeg_v4_0_hw_init +ffffffff81e53300 t jpeg_v4_0_hw_fini +ffffffff81e533e0 t jpeg_v4_0_suspend +ffffffff81e53410 t jpeg_v4_0_resume +ffffffff81e53460 t jpeg_v4_0_is_idle +ffffffff81e534e0 t jpeg_v4_0_wait_for_idle +ffffffff81e535d0 t jpeg_v4_0_set_clockgating_state +ffffffff81e53680 t jpeg_v4_0_set_powergating_state +ffffffff81e53e90 t jpeg_v4_0_dec_ring_get_rptr +ffffffff81e53f20 t jpeg_v4_0_dec_ring_get_wptr +ffffffff81e53fc0 t jpeg_v4_0_dec_ring_set_wptr +ffffffff81e54060 t jpeg_v4_0_set_interrupt_state +ffffffff81e54090 t jpeg_v4_0_process_interrupt +ffffffff81e54130 t jpeg_v4_0_enable_clock_gating +ffffffff81e542e0 t jpeg_v4_0_disable_clock_gating +ffffffff81e55000 t lsdma_v6_0_copy_mem +ffffffff81e55360 t lsdma_v6_0_fill_mem +ffffffff81e55640 t lsdma_v6_0_update_memory_power_gating +ffffffff81e56000 t mca_v3_0_mp0_query_ras_error_count +ffffffff81e56020 t mca_v3_0_ras_block_match +ffffffff81e56070 t mca_v3_0_mp1_query_ras_error_count +ffffffff81e56090 t mca_v3_0_mpio_query_ras_error_count +ffffffff81e560b0 t mca_v3_0_init +ffffffff81e57000 t mes_v10_0_late_init +ffffffff81e57050 t mes_v10_1_sw_init +ffffffff81e57660 t mes_v10_1_sw_fini +ffffffff81e577e0 t mes_v10_1_hw_init +ffffffff81e58080 t mes_v10_1_hw_fini +ffffffff81e58140 t mes_v10_1_suspend +ffffffff81e58220 t mes_v10_1_resume +ffffffff81e58270 t mes_v10_1_kiq_hw_init +ffffffff81e58680 t mes_v10_1_add_hw_queue +ffffffff81e58800 t mes_v10_1_remove_hw_queue +ffffffff81e58890 t mes_v10_1_unmap_legacy_queue +ffffffff81e58980 t mes_v10_1_suspend_gang +ffffffff81e589b0 t mes_v10_1_resume_gang +ffffffff81e589e0 t mes_v10_1_submit_pkt_and_poll_completion +ffffffff81e58be0 t mes_v10_1_load_microcode +ffffffff81e593d0 t mes_v10_1_enable +ffffffff81e59840 t mes_v10_1_queue_init +ffffffff81e59ae0 t amdgpu_bo_unreserve +ffffffff81e59bc0 t mes_v10_1_ring_get_rptr +ffffffff81e59bf0 t mes_v10_1_ring_get_wptr +ffffffff81e59c60 t mes_v10_1_ring_set_wptr +ffffffff81e5a000 t mes_v11_0_late_init +ffffffff81e5a070 t mes_v11_0_sw_init +ffffffff81e5a650 t mes_v11_0_sw_fini +ffffffff81e5a840 t mes_v11_0_hw_init +ffffffff81e5b050 t mes_v11_0_hw_fini +ffffffff81e5b080 t mes_v11_0_suspend +ffffffff81e5b090 t mes_v11_0_resume +ffffffff81e5b0e0 t mes_v11_0_kiq_hw_init +ffffffff81e5b2e0 t mes_v11_0_kiq_hw_fini +ffffffff81e5b720 t mes_v11_0_add_hw_queue +ffffffff81e5b920 t mes_v11_0_remove_hw_queue +ffffffff81e5b9b0 t mes_v11_0_unmap_legacy_queue +ffffffff81e5bab0 t mes_v11_0_suspend_gang +ffffffff81e5bae0 t mes_v11_0_resume_gang +ffffffff81e5bb10 t mes_v11_0_misc_op +ffffffff81e5bc80 t mes_v11_0_submit_pkt_and_poll_completion +ffffffff81e5bea0 t mes_v11_0_load_microcode +ffffffff81e5c600 t mes_v11_0_enable +ffffffff81e5caf0 t mes_v11_0_queue_init +ffffffff81e5d580 t amdgpu_bo_unreserve +ffffffff81e5d660 t mes_v11_0_mqd_init +ffffffff81e5d860 t mes_v11_0_ring_get_rptr +ffffffff81e5d890 t mes_v11_0_ring_get_wptr +ffffffff81e5d900 t mes_v11_0_ring_set_wptr +ffffffff81e5e000 t mmhub_v1_0_query_ras_error_count +ffffffff81e5e150 t mmhub_v1_0_reset_ras_error_count +ffffffff81e5e200 t mmhub_v1_0_get_fb_location +ffffffff81e5e310 t mmhub_v1_0_init +ffffffff81e5e3c0 t mmhub_v1_0_gart_enable +ffffffff81e5f6f0 t mmhub_v1_0_set_fault_enable_default +ffffffff81e5f800 t mmhub_v1_0_gart_disable +ffffffff81e5fa90 t mmhub_v1_0_set_clockgating +ffffffff81e5ff10 t mmhub_v1_0_get_clockgating +ffffffff81e60030 t mmhub_v1_0_setup_vm_pt_regs +ffffffff81e60170 t mmhub_v1_0_update_power_gating +ffffffff81e61000 t mmhub_v1_7_query_ras_error_count +ffffffff81e61150 t mmhub_v1_7_query_ras_error_status +ffffffff81e61230 t mmhub_v1_7_reset_ras_error_count +ffffffff81e612d0 t mmhub_v1_7_reset_ras_error_status +ffffffff81e613c0 t mmhub_v1_7_get_fb_location +ffffffff81e614d0 t mmhub_v1_7_init +ffffffff81e61570 t mmhub_v1_7_gart_enable +ffffffff81e62a50 t mmhub_v1_7_set_fault_enable_default +ffffffff81e62b60 t mmhub_v1_7_gart_disable +ffffffff81e62df0 t mmhub_v1_7_set_clockgating +ffffffff81e63170 t mmhub_v1_7_get_clockgating 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xgpu_nv_mailbox_add_irq_id +ffffffff81e730e0 T xgpu_nv_mailbox_get_irq +ffffffff81e73190 t xgpu_nv_mailbox_flr_work +ffffffff81e733b0 T xgpu_nv_mailbox_put_irq +ffffffff81e733f0 t xgpu_nv_request_full_gpu_access +ffffffff81e73410 t xgpu_nv_release_full_gpu_access +ffffffff81e73430 t xgpu_nv_request_init_data +ffffffff81e73450 t xgpu_nv_request_reset +ffffffff81e73550 t xgpu_nv_mailbox_trans_msg +ffffffff81e736f0 t xgpu_nv_set_mailbox_ack_irq +ffffffff81e73770 t xgpu_nv_mailbox_ack_irq +ffffffff81e737c0 t xgpu_nv_set_mailbox_rcv_irq +ffffffff81e73840 t xgpu_nv_mailbox_rcv_irq +ffffffff81e738f0 t xgpu_nv_send_access_requests +ffffffff81e74000 T xgpu_vi_init_golden_registers +ffffffff81e740c0 T xgpu_vi_mailbox_set_irq_funcs +ffffffff81e74110 T xgpu_vi_mailbox_add_irq_id +ffffffff81e741a0 T xgpu_vi_mailbox_get_irq +ffffffff81e74250 t xgpu_vi_mailbox_flr_work +ffffffff81e743a0 T xgpu_vi_mailbox_put_irq +ffffffff81e743e0 t xgpu_vi_request_full_gpu_access +ffffffff81e74400 t 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nbio_v7_4_get_hdp_flush_req_offset +ffffffff81e7e650 t nbio_v7_4_get_hdp_flush_done_offset +ffffffff81e7e690 t nbio_v7_4_get_pcie_index_offset +ffffffff81e7e6d0 t nbio_v7_4_get_pcie_data_offset +ffffffff81e7e710 t nbio_v7_4_get_rev_id +ffffffff81e7e7d0 t nbio_v7_4_mc_access_enable +ffffffff81e7e880 t nbio_v7_4_get_memsize +ffffffff81e7e8f0 t nbio_v7_4_sdma_doorbell_range +ffffffff81e7e9c0 t nbio_v7_4_vcn_doorbell_range +ffffffff81e7ea60 t nbio_v7_4_enable_doorbell_aperture +ffffffff81e7eb50 t nbio_v7_4_enable_doorbell_selfring_aperture +ffffffff81e7ecb0 t nbio_v7_4_ih_doorbell_range +ffffffff81e7edc0 t nbio_v7_4_enable_doorbell_interrupt +ffffffff81e7ef00 t nbio_v7_4_update_medium_grain_clock_gating +ffffffff81e7ef30 t nbio_v7_4_update_medium_grain_light_sleep +ffffffff81e7efd0 t nbio_v7_4_get_clockgating_state +ffffffff81e7f050 t nbio_v7_4_ih_control +ffffffff81e7f1a0 t nbio_v7_4_init_registers +ffffffff81e7f290 t nbio_v7_4_remap_hdp_registers +ffffffff81e7f3a0 t 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nv_pcie_rreg +ffffffff81e81a20 t nv_pcie_wreg +ffffffff81e81a80 t nv_pcie_rreg64 +ffffffff81e81ae0 t nv_pcie_wreg64 +ffffffff81e81b40 t nv_didt_rreg +ffffffff81e81be0 t nv_didt_wreg +ffffffff81e81c60 t nv_read_disabled_bios +ffffffff81e81c90 t nv_read_register +ffffffff81e81d70 t nv_vga_set_state +ffffffff81e81da0 t nv_asic_reset +ffffffff81e81ee0 t nv_asic_reset_method +ffffffff81e81fd0 t nv_get_xclk +ffffffff81e82000 t nv_set_uvd_clocks +ffffffff81e82030 t nv_set_vce_clocks +ffffffff81e82060 t nv_get_config_memsize +ffffffff81e82080 t nv_need_full_reset +ffffffff81e820b0 t nv_init_doorbell_index +ffffffff81e821e0 t nv_need_reset_on_init +ffffffff81e82270 t nv_get_pcie_replay_count +ffffffff81e822a0 t nv_pre_asic_init +ffffffff81e822d0 t nv_update_umd_stable_pstate +ffffffff81e82390 t nv_query_video_codecs +ffffffff81e83000 T psp_v10_0_set_psp_funcs +ffffffff81e83030 t psp_v10_0_init_microcode +ffffffff81e832a0 t psp_v10_0_ring_init +ffffffff81e83320 t psp_v10_0_ring_create +ffffffff81e83630 t psp_v10_0_ring_stop +ffffffff81e83820 t psp_v10_0_ring_destroy +ffffffff81e838a0 t psp_v10_0_mode1_reset +ffffffff81e838f0 t psp_v10_0_ring_get_wptr +ffffffff81e83950 t psp_v10_0_ring_set_wptr +ffffffff81e84000 T psp_v11_0_set_psp_funcs +ffffffff81e84030 t psp_v11_0_init_microcode +ffffffff81e84450 t psp_v11_0_bootloader_load_kdb +ffffffff81e84470 t psp_v11_0_bootloader_load_spl +ffffffff81e84490 t psp_v11_0_bootloader_load_sysdrv +ffffffff81e844b0 t psp_v11_0_bootloader_load_sos +ffffffff81e84800 t psp_v11_0_ring_init +ffffffff81e84880 t psp_v11_0_ring_create +ffffffff81e84f10 t psp_v11_0_ring_stop +ffffffff81e85130 t psp_v11_0_ring_destroy +ffffffff81e851b0 t psp_v11_0_mode1_reset +ffffffff81e852b0 t psp_v11_0_memory_training +ffffffff81e85730 t psp_v11_0_ring_get_wptr +ffffffff81e85780 t psp_v11_0_ring_set_wptr +ffffffff81e858c0 t psp_v11_0_load_usbc_pd_fw +ffffffff81e85ab0 t psp_v11_0_read_usbc_pd_fw +ffffffff81e85bd0 t psp_v11_0_bootloader_load_component +ffffffff81e85d90 t psp_v11_0_wait_for_bootloader +ffffffff81e85f60 t psp_v11_0_memory_training_send_msg +ffffffff81e87000 T psp_v11_0_8_set_psp_funcs +ffffffff81e87030 t psp_v11_0_8_ring_init +ffffffff81e870b0 t psp_v11_0_8_ring_create +ffffffff81e87740 t psp_v11_0_8_ring_stop +ffffffff81e87ad0 t psp_v11_0_8_ring_destroy +ffffffff81e87b50 t psp_v11_0_8_ring_get_wptr +ffffffff81e87bc0 t psp_v11_0_8_ring_set_wptr +ffffffff81e88000 T psp_v12_0_set_psp_funcs +ffffffff81e88030 t psp_v12_0_init_microcode +ffffffff81e882a0 t psp_v12_0_bootloader_load_sysdrv +ffffffff81e885c0 t psp_v12_0_bootloader_load_sos +ffffffff81e88920 t psp_v12_0_ring_init +ffffffff81e88f00 t psp_v12_0_ring_create +ffffffff81e89460 t psp_v12_0_ring_stop +ffffffff81e89680 t psp_v12_0_ring_destroy +ffffffff81e89700 t psp_v12_0_mode1_reset +ffffffff81e89800 t psp_v12_0_ring_get_wptr +ffffffff81e89870 t psp_v12_0_ring_set_wptr +ffffffff81e8a000 T psp_v13_0_set_psp_funcs +ffffffff81e8a030 t psp_v13_0_init_microcode +ffffffff81e8a160 t psp_v13_0_bootloader_load_kdb +ffffffff81e8a180 t psp_v13_0_bootloader_load_spl +ffffffff81e8a1a0 t psp_v13_0_bootloader_load_sysdrv +ffffffff81e8a1c0 t psp_v13_0_bootloader_load_soc_drv +ffffffff81e8a1e0 t psp_v13_0_bootloader_load_intf_drv +ffffffff81e8a200 t psp_v13_0_bootloader_load_dbg_drv +ffffffff81e8a220 t psp_v13_0_bootloader_load_ras_drv +ffffffff81e8a240 t psp_v13_0_bootloader_load_sos +ffffffff81e8a5a0 t psp_v13_0_ring_init +ffffffff81e8a620 t psp_v13_0_ring_create +ffffffff81e8acb0 t psp_v13_0_ring_stop +ffffffff81e8b040 t psp_v13_0_ring_destroy +ffffffff81e8b0c0 t psp_v13_0_memory_training +ffffffff81e8b500 t psp_v13_0_ring_get_wptr +ffffffff81e8b570 t psp_v13_0_ring_set_wptr +ffffffff81e8b670 t psp_v13_0_load_usbc_pd_fw +ffffffff81e8b860 t psp_v13_0_read_usbc_pd_fw +ffffffff81e8b980 t psp_v13_0_update_spirom +ffffffff81e8bb60 t psp_v13_0_vbflash_status +ffffffff81e8bbc0 t psp_v13_0_bootloader_load_component +ffffffff81e8bd90 t psp_v13_0_wait_for_bootloader +ffffffff81e8bf60 t psp_v13_0_memory_training_send_msg +ffffffff81e8c0c0 t psp_v13_0_exec_spi_cmd +ffffffff81e8d000 T psp_v13_0_4_set_psp_funcs +ffffffff81e8d030 t psp_v13_0_4_init_microcode +ffffffff81e8d100 t psp_v13_0_4_bootloader_load_kdb +ffffffff81e8d120 t psp_v13_0_4_bootloader_load_spl +ffffffff81e8d140 t psp_v13_0_4_bootloader_load_sysdrv +ffffffff81e8d160 t psp_v13_0_4_bootloader_load_soc_drv +ffffffff81e8d180 t psp_v13_0_4_bootloader_load_intf_drv +ffffffff81e8d1a0 t psp_v13_0_4_bootloader_load_dbg_drv +ffffffff81e8d1c0 t psp_v13_0_4_bootloader_load_sos +ffffffff81e8d530 t psp_v13_0_4_ring_init +ffffffff81e8d5b0 t psp_v13_0_4_ring_create +ffffffff81e8dc50 t psp_v13_0_4_ring_stop +ffffffff81e8dfe0 t psp_v13_0_4_ring_destroy +ffffffff81e8e060 t psp_v13_0_4_ring_get_wptr +ffffffff81e8e0d0 t psp_v13_0_4_ring_set_wptr +ffffffff81e8e1d0 t psp_v13_0_4_bootloader_load_component +ffffffff81e8e3a0 t psp_v13_0_4_wait_for_bootloader +ffffffff81e8f000 T psp_v3_1_set_psp_funcs +ffffffff81e8f030 t psp_v3_1_init_microcode +ffffffff81e8f0f0 t psp_v3_1_bootloader_load_sysdrv +ffffffff81e8f410 t psp_v3_1_bootloader_load_sos +ffffffff81e8f770 t psp_v3_1_ring_init +ffffffff81e8f7f0 t psp_v3_1_ring_create +ffffffff81e902f0 t psp_v3_1_ring_stop +ffffffff81e90510 t psp_v3_1_ring_destroy +ffffffff81e90590 t psp_v3_1_smu_reload_quirk +ffffffff81e905e0 t psp_v3_1_mode1_reset +ffffffff81e906e0 t psp_v3_1_ring_get_wptr +ffffffff81e90730 t psp_v3_1_ring_set_wptr +ffffffff81e91000 t sdma_v2_4_early_init +ffffffff81e910e0 t sdma_v2_4_sw_init +ffffffff81e91470 t sdma_v2_4_sw_fini +ffffffff81e91550 t sdma_v2_4_hw_init +ffffffff81e91910 t sdma_v2_4_hw_fini +ffffffff81e91950 t sdma_v2_4_suspend +ffffffff81e91990 t sdma_v2_4_resume +ffffffff81e919a0 t sdma_v2_4_is_idle +ffffffff81e919e0 t sdma_v2_4_wait_for_idle +ffffffff81e91a80 t sdma_v2_4_soft_reset +ffffffff81e91bc0 t sdma_v2_4_set_clockgating_state +ffffffff81e91bf0 t sdma_v2_4_set_powergating_state +ffffffff81e91c20 t sdma_v2_4_ring_get_rptr +ffffffff81e91c60 t sdma_v2_4_ring_get_wptr +ffffffff81e91cc0 t sdma_v2_4_ring_set_wptr +ffffffff81e91d00 t sdma_v2_4_ring_emit_ib +ffffffff81e91fb0 t sdma_v2_4_ring_emit_fence +ffffffff81e923b0 t sdma_v2_4_ring_emit_pipeline_sync +ffffffff81e92630 t sdma_v2_4_ring_emit_vm_flush +ffffffff81e928b0 t sdma_v2_4_ring_emit_hdp_flush +ffffffff81e92b30 t sdma_v2_4_ring_test_ring +ffffffff81e92e10 t sdma_v2_4_ring_test_ib +ffffffff81e92ff0 t sdma_v2_4_ring_insert_nop +ffffffff81e93120 t sdma_v2_4_ring_pad_ib +ffffffff81e93250 t sdma_v2_4_ring_emit_wreg +ffffffff81e933a0 t sdma_v2_4_emit_copy_buffer +ffffffff81e93460 t sdma_v2_4_emit_fill_buffer +ffffffff81e934f0 t sdma_v2_4_vm_copy_pte +ffffffff81e935b0 t sdma_v2_4_vm_write_pte +ffffffff81e93680 t sdma_v2_4_vm_set_pte_pde +ffffffff81e93780 t sdma_v2_4_set_trap_irq_state +ffffffff81e93840 t sdma_v2_4_process_trap_irq +ffffffff81e938e0 t sdma_v2_4_process_illegal_inst_irq +ffffffff81e93960 t sdma_v2_4_enable +ffffffff81e94000 t sdma_v3_0_early_init +ffffffff81e94150 t sdma_v3_0_sw_init +ffffffff81e94500 t sdma_v3_0_sw_fini +ffffffff81e945e0 t sdma_v3_0_hw_init +ffffffff81e94710 t sdma_v3_0_hw_fini +ffffffff81e94760 t sdma_v3_0_suspend +ffffffff81e947b0 t sdma_v3_0_resume +ffffffff81e947c0 t sdma_v3_0_is_idle +ffffffff81e94800 t sdma_v3_0_wait_for_idle +ffffffff81e948a0 t sdma_v3_0_check_soft_reset +ffffffff81e94900 t sdma_v3_0_pre_soft_reset +ffffffff81e94950 t sdma_v3_0_soft_reset +ffffffff81e94a20 t sdma_v3_0_post_soft_reset +ffffffff81e94a70 t sdma_v3_0_set_clockgating_state +ffffffff81e94cd0 t sdma_v3_0_set_powergating_state +ffffffff81e94d00 t sdma_v3_0_get_clockgating_state +ffffffff81e94d80 t sdma_v3_0_ring_get_rptr +ffffffff81e94dc0 t sdma_v3_0_ring_get_wptr +ffffffff81e94e40 t sdma_v3_0_ring_set_wptr +ffffffff81e94ef0 t sdma_v3_0_ring_emit_ib +ffffffff81e951a0 t sdma_v3_0_ring_emit_fence +ffffffff81e955a0 t sdma_v3_0_ring_emit_pipeline_sync +ffffffff81e95820 t sdma_v3_0_ring_emit_vm_flush +ffffffff81e95aa0 t sdma_v3_0_ring_emit_hdp_flush +ffffffff81e95d20 t sdma_v3_0_ring_test_ring +ffffffff81e96000 t sdma_v3_0_ring_test_ib +ffffffff81e961e0 t sdma_v3_0_ring_insert_nop +ffffffff81e96310 t sdma_v3_0_ring_pad_ib +ffffffff81e96440 t sdma_v3_0_ring_emit_wreg +ffffffff81e96590 t sdma_v3_0_emit_copy_buffer +ffffffff81e96650 t sdma_v3_0_emit_fill_buffer +ffffffff81e966e0 t sdma_v3_0_vm_copy_pte +ffffffff81e967a0 t sdma_v3_0_vm_write_pte +ffffffff81e96870 t sdma_v3_0_vm_set_pte_pde +ffffffff81e96970 t sdma_v3_0_set_trap_irq_state +ffffffff81e96a30 t sdma_v3_0_process_trap_irq +ffffffff81e96ad0 t sdma_v3_0_process_illegal_inst_irq +ffffffff81e96b50 t sdma_v3_0_ctx_switch_enable +ffffffff81e96ce0 t sdma_v3_0_enable +ffffffff81e96e50 t sdma_v3_0_gfx_resume +ffffffff81e98000 t sdma_v4_0_early_init +ffffffff81e98580 t sdma_v4_0_late_init +ffffffff81e98820 t sdma_v4_0_sw_init +ffffffff81e98ba0 t sdma_v4_0_sw_fini +ffffffff81e98c60 t sdma_v4_0_hw_init +ffffffff81e9bc00 t sdma_v4_0_hw_fini +ffffffff81e9bcb0 t sdma_v4_0_suspend +ffffffff81e9bd00 t sdma_v4_0_resume +ffffffff81e9bd80 t sdma_v4_0_is_idle +ffffffff81e9beb0 t sdma_v4_0_wait_for_idle +ffffffff81e9c050 t sdma_v4_0_soft_reset +ffffffff81e9c080 t sdma_v4_0_set_clockgating_state +ffffffff81e9c580 t sdma_v4_0_set_powergating_state +ffffffff81e9c640 t sdma_v4_0_get_clockgating_state +ffffffff81e9c6e0 t sdma_v4_0_query_ras_error_count +ffffffff81e9c8b0 t sdma_v4_0_reset_ras_error_count +ffffffff81e9ca00 t sdma_v4_0_ring_get_rptr +ffffffff81e9ca60 t sdma_v4_0_ring_get_wptr +ffffffff81e9cc50 t sdma_v4_0_ring_set_wptr +ffffffff81e9ced0 t sdma_v4_0_ring_emit_ib +ffffffff81e9d180 t sdma_v4_0_ring_emit_fence +ffffffff81e9d5b0 t sdma_v4_0_ring_emit_pipeline_sync +ffffffff81e9d610 t sdma_v4_0_ring_emit_vm_flush +ffffffff81e9d630 t sdma_v4_0_ring_emit_hdp_flush +ffffffff81e9d6d0 t sdma_v4_0_ring_test_ring +ffffffff81e9d9b0 t sdma_v4_0_ring_test_ib +ffffffff81e9db90 t sdma_v4_0_ring_insert_nop +ffffffff81e9dcc0 t sdma_v4_0_ring_pad_ib +ffffffff81e9ddf0 t sdma_v4_0_ring_emit_wreg +ffffffff81e9df40 t sdma_v4_0_ring_emit_reg_wait +ffffffff81e9df90 t sdma_v4_0_wait_reg_mem +ffffffff81e9e2c0 t sdma_v4_0_page_ring_get_wptr +ffffffff81e9e470 t sdma_v4_0_page_ring_set_wptr +ffffffff81e9e630 t sdma_v4_0_emit_copy_buffer +ffffffff81e9e6f0 t sdma_v4_0_emit_fill_buffer +ffffffff81e9e780 t sdma_v4_0_vm_copy_pte +ffffffff81e9e840 t sdma_v4_0_vm_write_pte +ffffffff81e9e910 t sdma_v4_0_vm_set_pte_pde +ffffffff81e9ea10 t sdma_v4_0_set_trap_irq_state +ffffffff81e9ebb0 t sdma_v4_0_process_trap_irq +ffffffff81e9ecf0 t sdma_v4_0_process_illegal_inst_irq +ffffffff81e9ee10 t sdma_v4_0_set_ecc_irq_state +ffffffff81e9efb0 t sdma_v4_0_process_vm_hole_irq +ffffffff81e9f0f0 t sdma_v4_0_process_doorbell_invalid_irq +ffffffff81e9f230 t sdma_v4_0_process_pool_timeout_irq +ffffffff81e9f370 t sdma_v4_0_process_srbm_write_irq +ffffffff81e9f4b0 t sdma_v4_0_process_ras_data_cb +ffffffff81e9f530 t sdma_v4_0_ctx_switch_enable +ffffffff81e9fbe0 t sdma_v4_0_enable +ffffffff81ea0180 t sdma_v4_0_gfx_enable +ffffffff81ea1000 t sdma_v4_4_query_ras_error_count +ffffffff81ea1270 t sdma_v4_4_reset_ras_error_count +ffffffff81ea2000 t sdma_v5_0_early_init +ffffffff81ea2170 t sdma_v5_0_sw_init +ffffffff81ea2410 t sdma_v5_0_sw_fini +ffffffff81ea24a0 t sdma_v5_0_hw_init +ffffffff81ea3750 t sdma_v5_0_hw_fini +ffffffff81ea37b0 t sdma_v5_0_suspend +ffffffff81ea3810 t sdma_v5_0_resume +ffffffff81ea3820 t sdma_v5_0_is_idle +ffffffff81ea38b0 t sdma_v5_0_wait_for_idle +ffffffff81ea3970 t sdma_v5_0_soft_reset +ffffffff81ea39a0 t sdma_v5_0_set_clockgating_state +ffffffff81ea3ba0 t sdma_v5_0_set_powergating_state +ffffffff81ea3bd0 t sdma_v5_0_get_clockgating_state +ffffffff81ea3c70 t sdma_v5_0_ring_get_rptr +ffffffff81ea3cd0 t sdma_v5_0_ring_get_wptr +ffffffff81ea3e70 t sdma_v5_0_ring_set_wptr +ffffffff81ea41d0 t sdma_v5_0_ring_emit_ib +ffffffff81ea4490 t sdma_v5_0_ring_emit_fence +ffffffff81ea4900 t sdma_v5_0_ring_emit_pipeline_sync +ffffffff81ea4b80 t sdma_v5_0_ring_emit_vm_flush +ffffffff81ea4ba0 t sdma_v5_0_ring_emit_hdp_flush +ffffffff81ea4e40 t sdma_v5_0_ring_test_ring +ffffffff81ea5210 t sdma_v5_0_ring_test_ib +ffffffff81ea5540 t sdma_v5_0_ring_insert_nop +ffffffff81ea5670 t sdma_v5_0_ring_pad_ib +ffffffff81ea57a0 t sdma_v5_0_ring_init_cond_exec +ffffffff81ea59d0 t sdma_v5_0_ring_patch_cond_exec +ffffffff81ea5a90 t sdma_v5_0_ring_emit_wreg +ffffffff81ea5be0 t sdma_v5_0_ring_emit_reg_wait +ffffffff81ea5e60 t sdma_v5_0_ring_emit_reg_write_reg_wait +ffffffff81ea5ee0 t sdma_v5_0_ring_preempt_ib +ffffffff81ea6020 t sdma_v5_0_ring_emit_mem_sync +ffffffff81ea6230 t sdma_v5_0_emit_copy_buffer +ffffffff81ea62f0 t sdma_v5_0_emit_fill_buffer +ffffffff81ea6380 t sdma_v5_0_vm_copy_pte +ffffffff81ea6440 t sdma_v5_0_vm_write_pte +ffffffff81ea6510 t sdma_v5_0_vm_set_pte_pde +ffffffff81ea6610 t sdma_v5_0_set_trap_irq_state +ffffffff81ea66a0 t sdma_v5_0_process_trap_irq +ffffffff81ea67b0 t sdma_v5_0_process_illegal_inst_irq +ffffffff81ea67e0 t sdma_v5_0_mqd_init +ffffffff81ea68c0 t sdma_v5_0_ctx_switch_enable +ffffffff81ea6bc0 t sdma_v5_0_enable +ffffffff81ea7000 t sdma_v5_2_early_init +ffffffff81ea7170 t sdma_v5_2_sw_init +ffffffff81ea73a0 t sdma_v5_2_sw_fini +ffffffff81ea7430 t sdma_v5_2_hw_init +ffffffff81ea7770 t sdma_v5_2_hw_fini +ffffffff81ea77d0 t sdma_v5_2_suspend +ffffffff81ea7830 t sdma_v5_2_resume +ffffffff81ea7840 t sdma_v5_2_is_idle +ffffffff81ea7900 t sdma_v5_2_wait_for_idle +ffffffff81ea7a00 t sdma_v5_2_soft_reset +ffffffff81ea7ca0 t sdma_v5_2_set_clockgating_state +ffffffff81ea7fc0 t sdma_v5_2_set_powergating_state +ffffffff81ea7ff0 t sdma_v5_2_get_clockgating_state +ffffffff81ea8080 t sdma_v5_2_ring_get_rptr +ffffffff81ea80e0 t sdma_v5_2_ring_get_wptr +ffffffff81ea8220 t sdma_v5_2_ring_set_wptr +ffffffff81ea83e0 t sdma_v5_2_ring_emit_ib +ffffffff81ea86a0 t sdma_v5_2_ring_emit_fence +ffffffff81ea8b10 t sdma_v5_2_ring_emit_pipeline_sync +ffffffff81ea8d90 t sdma_v5_2_ring_emit_vm_flush +ffffffff81ea8db0 t sdma_v5_2_ring_emit_hdp_flush +ffffffff81ea9050 t sdma_v5_2_ring_test_ring +ffffffff81ea9420 t sdma_v5_2_ring_test_ib +ffffffff81ea9750 t sdma_v5_2_ring_insert_nop +ffffffff81ea9880 t sdma_v5_2_ring_pad_ib +ffffffff81ea99b0 t sdma_v5_2_ring_init_cond_exec +ffffffff81ea9be0 t sdma_v5_2_ring_patch_cond_exec +ffffffff81ea9ca0 t sdma_v5_2_ring_emit_wreg +ffffffff81ea9df0 t sdma_v5_2_ring_emit_reg_wait +ffffffff81eaa070 t sdma_v5_2_ring_emit_reg_write_reg_wait +ffffffff81eaa0f0 t sdma_v5_2_ring_preempt_ib +ffffffff81eaa260 t sdma_v5_2_ring_emit_mem_sync +ffffffff81eaa470 t sdma_v5_2_emit_copy_buffer +ffffffff81eaa530 t sdma_v5_2_emit_fill_buffer +ffffffff81eaa5c0 t sdma_v5_2_vm_copy_pte +ffffffff81eaa680 t sdma_v5_2_vm_write_pte +ffffffff81eaa750 t sdma_v5_2_vm_set_pte_pde +ffffffff81eaa850 t sdma_v5_2_set_trap_irq_state +ffffffff81eaa910 t sdma_v5_2_process_trap_irq +ffffffff81eaaa50 t sdma_v5_2_process_illegal_inst_irq +ffffffff81eaaa80 t sdma_v5_2_mqd_init +ffffffff81eaab60 t sdma_v5_2_ctx_switch_enable +ffffffff81eaaf60 t sdma_v5_2_enable +ffffffff81eab370 t sdma_v5_2_gfx_resume +ffffffff81ead000 t sdma_v6_0_early_init +ffffffff81ead140 t sdma_v6_0_sw_init +ffffffff81ead320 t sdma_v6_0_sw_fini +ffffffff81ead3b0 t sdma_v6_0_hw_init +ffffffff81ead3c0 t sdma_v6_0_hw_fini +ffffffff81ead410 t sdma_v6_0_suspend +ffffffff81ead460 t sdma_v6_0_resume +ffffffff81ead470 t sdma_v6_0_is_idle +ffffffff81ead500 t sdma_v6_0_wait_for_idle +ffffffff81ead5c0 t sdma_v6_0_check_soft_reset +ffffffff81ead680 t sdma_v6_0_soft_reset +ffffffff81eadb20 t sdma_v6_0_set_clockgating_state +ffffffff81eadb50 t sdma_v6_0_set_powergating_state +ffffffff81eadb80 t sdma_v6_0_get_clockgating_state +ffffffff81eadbb0 t sdma_v6_0_ring_get_rptr +ffffffff81eadc10 t sdma_v6_0_ring_get_wptr +ffffffff81eadc80 t sdma_v6_0_ring_set_wptr +ffffffff81eadfe0 t sdma_v6_0_ring_emit_ib +ffffffff81eae2a0 t sdma_v6_0_ring_emit_fence +ffffffff81eae710 t sdma_v6_0_ring_emit_pipeline_sync +ffffffff81eae990 t sdma_v6_0_ring_emit_vm_flush +ffffffff81eae9b0 t sdma_v6_0_ring_emit_hdp_flush +ffffffff81eaec50 t sdma_v6_0_ring_test_ring +ffffffff81eaf020 t sdma_v6_0_ring_test_ib +ffffffff81eaf350 t sdma_v6_0_ring_insert_nop +ffffffff81eaf480 t sdma_v6_0_ring_pad_ib +ffffffff81eaf5b0 t sdma_v6_0_ring_init_cond_exec +ffffffff81eaf7e0 t sdma_v6_0_ring_patch_cond_exec +ffffffff81eaf8a0 t sdma_v6_0_ring_emit_wreg +ffffffff81eaf9f0 t sdma_v6_0_ring_emit_reg_wait +ffffffff81eafc70 t sdma_v6_0_ring_emit_reg_write_reg_wait +ffffffff81eafcf0 t sdma_v6_0_ring_preempt_ib +ffffffff81eafe40 t sdma_v6_0_ring_emit_mem_sync +ffffffff81eb0050 t sdma_v6_0_emit_copy_buffer +ffffffff81eb0110 t sdma_v6_0_emit_fill_buffer +ffffffff81eb01a0 t sdma_v6_0_vm_copy_pte +ffffffff81eb0260 t sdma_v6_0_vm_write_pte +ffffffff81eb0330 t sdma_v6_0_vm_set_pte_pde +ffffffff81eb0430 t sdma_v6_0_set_trap_irq_state +ffffffff81eb04c0 t sdma_v6_0_process_trap_irq +ffffffff81eb05f0 t sdma_v6_0_process_illegal_inst_irq +ffffffff81eb0620 t sdma_v6_0_mqd_init +ffffffff81eb0740 t sdma_v6_0_start +ffffffff81eb09c0 t sdma_v6_0_enable +ffffffff81eb0b40 t sdma_v6_0_gfx_resume +ffffffff81eb1bc0 t sdma_v6_0_gfx_stop +ffffffff81eb2000 T sienna_cichlid_reset_init +ffffffff81eb20c0 t sienna_cichlid_async_reset +ffffffff81eb2120 t sienna_cichlid_get_reset_handler +ffffffff81eb2180 T sienna_cichlid_reset_fini +ffffffff81eb21e0 t sienna_cichlid_mode2_prepare_hwcontext +ffffffff81eb2330 t sienna_cichlid_mode2_perform_reset +ffffffff81eb23b0 t sienna_cichlid_mode2_restore_hwcontext +ffffffff81eb26b0 t sienna_cichlid_mode2_reset +ffffffff81eb3000 T smu_v11_0_i2c_control_init +ffffffff81eb30d0 T smu_v11_0_i2c_control_fini +ffffffff81eb3110 t smu_v11_0_i2c_xfer +ffffffff81eb41f0 t smu_v11_0_i2c_func +ffffffff81eb4220 t smu_v11_0_i2c_enable +ffffffff81eb4360 t smu_v11_0_i2c_abort +ffffffff81eb4460 t lock_bus +ffffffff81eb4500 t trylock_bus +ffffffff81eb4550 t unlock_bus +ffffffff81eb5000 t smuio_v11_0_get_rom_index_offset +ffffffff81eb5040 t smuio_v11_0_get_rom_data_offset +ffffffff81eb5080 t smuio_v11_0_update_rom_clock_gating +ffffffff81eb51c0 t smuio_v11_0_get_clock_gating_state +ffffffff81eb6000 t smuio_v11_0_6_get_rom_index_offset +ffffffff81eb6040 t smuio_v11_0_6_get_rom_data_offset +ffffffff81eb6080 t smuio_v11_0_6_update_rom_clock_gating +ffffffff81eb61c0 t smuio_v11_0_6_get_clock_gating_state +ffffffff81eb7000 t smuio_v13_0_get_rom_index_offset +ffffffff81eb7040 t smuio_v13_0_get_rom_data_offset +ffffffff81eb7080 t smuio_v13_0_update_rom_clock_gating +ffffffff81eb71c0 t smuio_v13_0_get_clock_gating_state +ffffffff81eb7260 t smuio_v13_0_get_die_id +ffffffff81eb72e0 t smuio_v13_0_get_socket_id +ffffffff81eb7360 t smuio_v13_0_is_host_gpu_xgmi_supported +ffffffff81eb8000 t smuio_v13_0_6_get_rom_index_offset +ffffffff81eb8040 t smuio_v13_0_6_get_rom_data_offset +ffffffff81eb9000 t smuio_v9_0_get_rom_index_offset +ffffffff81eb9040 t smuio_v9_0_get_rom_data_offset +ffffffff81eb9080 t smuio_v9_0_update_rom_clock_gating +ffffffff81eb91c0 t smuio_v9_0_get_clock_gating_state +ffffffff81eba000 T soc15_grbm_select +ffffffff81eba080 T soc15_program_register_sequence +ffffffff81eba280 T soc15_set_virt_ops +ffffffff81eba2f0 t soc15_common_early_init +ffffffff81eba680 t soc15_common_late_init +ffffffff81eba6c0 t soc15_common_sw_init +ffffffff81eba720 t soc15_common_sw_fini +ffffffff81eba770 t soc15_common_hw_init +ffffffff81eba8a0 t soc15_common_hw_fini +ffffffff81eba970 t soc15_common_suspend +ffffffff81eba9b0 t soc15_common_resume +ffffffff81eba9f0 t soc15_common_is_idle +ffffffff81ebaa20 t soc15_common_wait_for_idle +ffffffff81ebaa50 t soc15_common_soft_reset +ffffffff81ebaa80 t soc15_common_set_clockgating_state +ffffffff81ebadc0 t soc15_common_set_powergating_state +ffffffff81ebadf0 t soc15_common_get_clockgating_state +ffffffff81ebaed0 t soc15_pcie_rreg +ffffffff81ebaf30 t soc15_pcie_wreg +ffffffff81ebaf90 t soc15_pcie_rreg64 +ffffffff81ebaff0 t soc15_pcie_wreg64 +ffffffff81ebb050 t soc15_uvd_ctx_rreg +ffffffff81ebb0f0 t soc15_uvd_ctx_wreg +ffffffff81ebb180 t soc15_didt_rreg +ffffffff81ebb220 t soc15_didt_wreg +ffffffff81ebb2a0 t soc15_gc_cac_rreg +ffffffff81ebb3c0 t soc15_gc_cac_wreg +ffffffff81ebb4d0 t soc15_se_cac_rreg +ffffffff81ebb5f0 t soc15_se_cac_wreg +ffffffff81ebb700 t soc15_read_disabled_bios +ffffffff81ebb730 t soc15_read_register +ffffffff81ebb830 t soc15_vga_set_state +ffffffff81ebb860 t soc15_asic_reset +ffffffff81ebb960 t soc15_asic_reset_method +ffffffff81ebbae0 t soc15_get_xclk +ffffffff81ebbb30 t soc15_set_uvd_clocks +ffffffff81ebbb60 t soc15_set_vce_clocks +ffffffff81ebbb90 t soc15_get_config_memsize +ffffffff81ebbbb0 t soc15_need_full_reset +ffffffff81ebbbe0 t soc15_get_pcie_usage +ffffffff81ebbd10 t soc15_need_reset_on_init +ffffffff81ebbdb0 t soc15_get_pcie_replay_count +ffffffff81ebbe20 t soc15_supports_baco +ffffffff81ebbe80 t soc15_pre_asic_init +ffffffff81ebbe90 t soc15_query_video_codecs +ffffffff81ebbf40 t vega20_get_pcie_usage +ffffffff81ebd000 T soc21_grbm_select +ffffffff81ebd080 t soc21_common_early_init +ffffffff81ebd2a0 t soc21_common_late_init +ffffffff81ebd2d0 t soc21_common_sw_init +ffffffff81ebd300 t soc21_common_sw_fini +ffffffff81ebd330 t soc21_common_hw_init +ffffffff81ebd400 t soc21_common_hw_fini +ffffffff81ebd460 t soc21_common_suspend +ffffffff81ebd4c0 t soc21_common_resume +ffffffff81ebd590 t soc21_common_is_idle +ffffffff81ebd5c0 t soc21_common_wait_for_idle +ffffffff81ebd5f0 t soc21_common_soft_reset +ffffffff81ebd620 t soc21_common_set_clockgating_state +ffffffff81ebd6d0 t soc21_common_set_powergating_state +ffffffff81ebd730 t soc21_common_get_clockgating_state +ffffffff81ebd780 t soc21_pcie_rreg +ffffffff81ebd7e0 t soc21_pcie_wreg +ffffffff81ebd840 t soc21_pcie_rreg64 +ffffffff81ebd8a0 t soc21_pcie_wreg64 +ffffffff81ebd900 t soc21_didt_rreg +ffffffff81ebd9a0 t soc21_didt_wreg +ffffffff81ebda20 t soc21_read_disabled_bios +ffffffff81ebda50 t soc21_read_register +ffffffff81ebdb40 t soc21_vga_set_state +ffffffff81ebdb70 t soc21_asic_reset +ffffffff81ebdc50 t soc21_asic_reset_method +ffffffff81ebdd10 t soc21_get_xclk +ffffffff81ebdd40 t soc21_set_uvd_clocks +ffffffff81ebdd70 t soc21_set_vce_clocks +ffffffff81ebdda0 t soc21_get_config_memsize +ffffffff81ebddc0 t soc21_need_full_reset +ffffffff81ebde20 t soc21_init_doorbell_index +ffffffff81ebdf40 t soc21_need_reset_on_init +ffffffff81ebdfd0 t soc21_get_pcie_replay_count +ffffffff81ebe000 t soc21_pre_asic_init +ffffffff81ebe030 t soc21_update_umd_stable_pstate +ffffffff81ebe0a0 t soc21_query_video_codecs +ffffffff81ebf000 t tonga_ih_early_init +ffffffff81ebf050 t tonga_ih_sw_init +ffffffff81ebf0d0 t tonga_ih_sw_fini +ffffffff81ebf110 t tonga_ih_hw_init +ffffffff81ebf300 t tonga_ih_hw_fini +ffffffff81ebf3a0 t tonga_ih_suspend +ffffffff81ebf440 t tonga_ih_resume +ffffffff81ebf480 t tonga_ih_is_idle +ffffffff81ebf4d0 t tonga_ih_wait_for_idle +ffffffff81ebf570 t tonga_ih_check_soft_reset +ffffffff81ebf5d0 t tonga_ih_pre_soft_reset +ffffffff81ebf680 t tonga_ih_soft_reset +ffffffff81ebf750 t tonga_ih_post_soft_reset +ffffffff81ebf790 t tonga_ih_set_clockgating_state +ffffffff81ebf7c0 t tonga_ih_set_powergating_state +ffffffff81ebf7f0 t tonga_ih_get_wptr +ffffffff81ebf8e0 t tonga_ih_decode_iv +ffffffff81ebf960 t tonga_ih_set_rptr +ffffffff81ec0000 t umc_v6_0_init_registers +ffffffff81ec1000 t umc_v6_1_query_ras_error_count +ffffffff81ec14e0 t umc_v6_1_query_ras_error_address +ffffffff81ec17c0 t umc_v6_1_err_cnt_init +ffffffff81ec2000 t umc_v6_7_query_ras_error_count +ffffffff81ec2410 t umc_v6_7_query_ras_error_address +ffffffff81ec2590 t umc_v6_7_query_ras_poison_mode +ffffffff81ec25f0 t umc_v6_7_convert_error_address +ffffffff81ec28f0 t umc_v6_7_ecc_info_query_ras_error_count +ffffffff81ec2b30 t umc_v6_7_ecc_info_query_ras_error_address +ffffffff81ec3000 t umc_v8_10_query_ras_error_count +ffffffff81ec3280 t umc_v8_10_query_ras_error_address +ffffffff81ec35b0 t umc_v8_10_err_cnt_init +ffffffff81ec3730 t umc_v8_10_query_ras_poison_mode +ffffffff81ec4000 t umc_v8_7_query_ras_error_count +ffffffff81ec4310 t umc_v8_7_query_ras_error_address +ffffffff81ec44c0 t umc_v8_7_err_cnt_init +ffffffff81ec4610 t umc_v8_7_ecc_info_query_ras_error_count +ffffffff81ec4740 t umc_v8_7_ecc_info_query_ras_error_address +ffffffff81ec5000 t uvd_v5_0_early_init +ffffffff81ec5050 t uvd_v5_0_sw_init +ffffffff81ec5140 t uvd_v5_0_sw_fini +ffffffff81ec5190 t uvd_v5_0_hw_init +ffffffff81ec56a0 t uvd_v5_0_hw_fini +ffffffff81ec5720 t uvd_v5_0_suspend +ffffffff81ec5820 t uvd_v5_0_resume +ffffffff81ec5870 t uvd_v5_0_is_idle +ffffffff81ec58c0 t uvd_v5_0_wait_for_idle +ffffffff81ec5950 t uvd_v5_0_soft_reset +ffffffff81ec59f0 t uvd_v5_0_set_clockgating_state +ffffffff81ec5b90 t uvd_v5_0_set_powergating_state +ffffffff81ec5bd0 t uvd_v5_0_get_clockgating_state +ffffffff81ec5c50 t uvd_v5_0_ring_get_rptr +ffffffff81ec5c90 t uvd_v5_0_ring_get_wptr +ffffffff81ec5cd0 t uvd_v5_0_ring_set_wptr +ffffffff81ec5d00 t uvd_v5_0_ring_emit_ib +ffffffff81ec5f70 t uvd_v5_0_ring_emit_fence +ffffffff81ec6520 t uvd_v5_0_ring_test_ring +ffffffff81ec66c0 t uvd_v5_0_ring_insert_nop +ffffffff81ec6820 t uvd_v5_0_set_interrupt_state +ffffffff81ec6850 t uvd_v5_0_process_interrupt +ffffffff81ec68b0 t uvd_v5_0_stop +ffffffff81ec69c0 t uvd_v5_0_start +ffffffff81ec8000 t uvd_v6_0_early_init +ffffffff81ec8140 t uvd_v6_0_sw_init +ffffffff81ec8460 t uvd_v6_0_sw_fini +ffffffff81ec8520 t uvd_v6_0_hw_init +ffffffff81ec8ae0 t uvd_v6_0_hw_fini +ffffffff81ec8b60 t uvd_v6_0_suspend +ffffffff81ec8c60 t uvd_v6_0_resume +ffffffff81ec8cb0 t uvd_v6_0_is_idle +ffffffff81ec8d00 t uvd_v6_0_wait_for_idle +ffffffff81ec8d90 t uvd_v6_0_check_soft_reset +ffffffff81ec8e10 t uvd_v6_0_pre_soft_reset +ffffffff81ec8e50 t uvd_v6_0_soft_reset +ffffffff81ec8f20 t uvd_v6_0_post_soft_reset +ffffffff81ec8fc0 t uvd_v6_0_set_clockgating_state +ffffffff81ec9150 t uvd_v6_0_set_powergating_state +ffffffff81ec91c0 t uvd_v6_0_get_clockgating_state +ffffffff81ec9250 t uvd_v6_0_ring_get_rptr +ffffffff81ec9290 t uvd_v6_0_ring_get_wptr +ffffffff81ec92d0 t uvd_v6_0_ring_set_wptr +ffffffff81ec9300 t uvd_v6_0_ring_emit_ib +ffffffff81ec9660 t uvd_v6_0_ring_emit_fence +ffffffff81ec9c10 t uvd_v6_0_ring_emit_pipeline_sync +ffffffff81eca010 t uvd_v6_0_ring_emit_vm_flush +ffffffff81eca370 t uvd_v6_0_ring_emit_hdp_flush +ffffffff81eca3a0 t uvd_v6_0_ring_test_ring +ffffffff81eca540 t uvd_v6_0_ring_insert_nop +ffffffff81eca6a0 t uvd_v6_0_ring_emit_wreg +ffffffff81eca920 t uvd_v6_0_enc_ring_get_rptr +ffffffff81eca980 t uvd_v6_0_enc_ring_get_wptr +ffffffff81eca9e0 t uvd_v6_0_enc_ring_set_wptr +ffffffff81ecaa20 t uvd_v6_0_enc_ring_emit_ib +ffffffff81ecac60 t uvd_v6_0_enc_ring_emit_fence +ffffffff81ecaea0 t uvd_v6_0_enc_ring_emit_pipeline_sync +ffffffff81ecb050 t uvd_v6_0_enc_ring_emit_vm_flush +ffffffff81ecb260 t uvd_v6_0_enc_ring_test_ring +ffffffff81ecb3b0 t uvd_v6_0_enc_ring_test_ib +ffffffff81ecb970 t uvd_v6_0_enc_ring_insert_end +ffffffff81ecba00 t uvd_v6_0_set_interrupt_state +ffffffff81ecba30 t uvd_v6_0_process_interrupt +ffffffff81ecbb20 t uvd_v6_0_stop +ffffffff81ecbc30 t uvd_v6_0_start +ffffffff81ecd000 t uvd_v7_0_early_init +ffffffff81ecd270 t uvd_v7_0_sw_init +ffffffff81ecd5f0 t uvd_v7_0_sw_fini +ffffffff81ecd700 t uvd_v7_0_hw_init +ffffffff81ed0620 t uvd_v7_0_hw_fini +ffffffff81ed0930 t uvd_v7_0_suspend +ffffffff81ed09e0 t uvd_v7_0_resume +ffffffff81ed0a30 t uvd_v7_0_set_clockgating_state +ffffffff81ed0a60 t uvd_v7_0_ring_get_rptr +ffffffff81ed0b00 t uvd_v7_0_ring_get_wptr +ffffffff81ed0ba0 t uvd_v7_0_ring_set_wptr +ffffffff81ed0c20 t uvd_v7_0_ring_patch_cs_in_place +ffffffff81ed0ca0 t uvd_v7_0_ring_emit_ib +ffffffff81ed1050 t uvd_v7_0_ring_emit_fence +ffffffff81ed16b0 t uvd_v7_0_ring_emit_vm_flush +ffffffff81ed1720 t uvd_v7_0_ring_emit_hdp_flush +ffffffff81ed1750 t uvd_v7_0_ring_test_ring +ffffffff81ed19e0 t uvd_v7_0_ring_insert_nop +ffffffff81ed1b80 t uvd_v7_0_ring_emit_wreg +ffffffff81ed1e50 t uvd_v7_0_ring_emit_reg_wait +ffffffff81ed21f0 t uvd_v7_0_enc_ring_get_rptr +ffffffff81ed22e0 t uvd_v7_0_enc_ring_get_wptr +ffffffff81ed23e0 t uvd_v7_0_enc_ring_set_wptr +ffffffff81ed24e0 t uvd_v7_0_enc_ring_emit_ib +ffffffff81ed2720 t uvd_v7_0_enc_ring_emit_fence +ffffffff81ed2960 t uvd_v7_0_enc_ring_emit_vm_flush +ffffffff81ed29d0 t uvd_v7_0_enc_ring_test_ring +ffffffff81ed2b30 t uvd_v7_0_enc_ring_test_ib +ffffffff81ed30f0 t uvd_v7_0_enc_ring_insert_end +ffffffff81ed3180 t uvd_v7_0_enc_ring_emit_wreg +ffffffff81ed32e0 t uvd_v7_0_enc_ring_emit_reg_wait +ffffffff81ed34a0 t uvd_v7_0_set_interrupt_state +ffffffff81ed34d0 t uvd_v7_0_process_interrupt +ffffffff81ed4000 t vce_v3_0_early_init +ffffffff81ed4180 t vce_v3_0_sw_init +ffffffff81ed42d0 t vce_v3_0_sw_fini +ffffffff81ed4320 t vce_v3_0_hw_init +ffffffff81ed4400 t vce_v3_0_hw_fini +ffffffff81ed44f0 t vce_v3_0_suspend +ffffffff81ed45c0 t vce_v3_0_resume +ffffffff81ed4610 t vce_v3_0_is_idle +ffffffff81ed4680 t vce_v3_0_wait_for_idle +ffffffff81ed4730 t vce_v3_0_check_soft_reset +ffffffff81ed4830 t vce_v3_0_pre_soft_reset +ffffffff81ed48d0 t vce_v3_0_soft_reset +ffffffff81ed49a0 t vce_v3_0_post_soft_reset +ffffffff81ed4b00 t vce_v3_0_set_clockgating_state +ffffffff81ed4df0 t vce_v3_0_set_powergating_state +ffffffff81ed5640 t vce_v3_0_get_clockgating_state +ffffffff81ed5700 t vce_v3_0_ring_get_rptr +ffffffff81ed57d0 t vce_v3_0_ring_get_wptr +ffffffff81ed58a0 t vce_v3_0_ring_set_wptr +ffffffff81ed5960 t vce_v3_0_ring_emit_ib +ffffffff81ed5ba0 t vce_v3_0_emit_pipeline_sync +ffffffff81ed5d50 t vce_v3_0_emit_vm_flush +ffffffff81ed5fc0 t vce_v3_0_set_interrupt_state +ffffffff81ed6030 t vce_v3_0_process_interrupt +ffffffff81ed60f0 t vce_v3_0_stop +ffffffff81ed7000 t vce_v4_0_early_init +ffffffff81ed70b0 t vce_v4_0_sw_init +ffffffff81ed72e0 t vce_v4_0_sw_fini +ffffffff81ed7360 t vce_v4_0_hw_init +ffffffff81ed7b40 t vce_v4_0_hw_fini +ffffffff81ed7be0 t vce_v4_0_suspend +ffffffff81ed7e00 t vce_v4_0_resume +ffffffff81ed7eb0 t vce_v4_0_set_clockgating_state +ffffffff81ed7ee0 t vce_v4_0_set_powergating_state +ffffffff81ed7fc0 t vce_v4_0_ring_get_rptr +ffffffff81ed8030 t vce_v4_0_ring_get_wptr +ffffffff81ed80c0 t vce_v4_0_ring_set_wptr +ffffffff81ed8150 t vce_v4_0_ring_emit_ib +ffffffff81ed8390 t vce_v4_0_ring_emit_fence +ffffffff81ed85d0 t vce_v4_0_emit_vm_flush +ffffffff81ed8640 t vce_v4_0_ring_insert_end +ffffffff81ed86d0 t vce_v4_0_emit_wreg +ffffffff81ed8830 t vce_v4_0_emit_reg_wait +ffffffff81ed89f0 t vce_v4_0_set_interrupt_state +ffffffff81ed8a80 t vce_v4_0_process_interrupt +ffffffff81ed8b20 t vce_v4_0_start +ffffffff81ed9500 t vce_v4_0_stop +ffffffff81eda000 T vcn_dec_sw_ring_emit_fence +ffffffff81eda240 T vcn_dec_sw_ring_insert_end +ffffffff81eda2d0 T vcn_dec_sw_ring_emit_ib +ffffffff81eda510 T vcn_dec_sw_ring_emit_reg_wait +ffffffff81eda6d0 T vcn_dec_sw_ring_emit_vm_flush +ffffffff81eda740 T vcn_dec_sw_ring_emit_wreg +ffffffff81edb000 T vcn_v1_0_set_pg_for_begin_use +ffffffff81edb150 T vcn_v1_0_ring_end_use +ffffffff81edb1c0 t vcn_v1_0_early_init +ffffffff81edb340 t vcn_v1_0_sw_init +ffffffff81edb5e0 t vcn_v1_0_sw_fini +ffffffff81edb640 t vcn_v1_0_hw_init +ffffffff81edb720 t vcn_v1_0_hw_fini +ffffffff81edb820 t vcn_v1_0_suspend +ffffffff81edb890 t vcn_v1_0_resume +ffffffff81edb980 t vcn_v1_0_is_idle +ffffffff81edba10 t vcn_v1_0_wait_for_idle +ffffffff81edbb00 t vcn_v1_0_set_clockgating_state +ffffffff81edbbb0 t vcn_v1_0_set_powergating_state +ffffffff81edc540 t vcn_v1_0_dec_ring_get_rptr +ffffffff81edc5d0 t vcn_v1_0_dec_ring_get_wptr +ffffffff81edc660 t vcn_v1_0_dec_ring_set_wptr +ffffffff81edc770 t vcn_v1_0_ring_patch_cs_in_place +ffffffff81edc940 t vcn_v1_0_dec_ring_emit_ib +ffffffff81edccd0 t vcn_v1_0_dec_ring_emit_fence +ffffffff81edd300 t vcn_v1_0_dec_ring_emit_vm_flush +ffffffff81edd370 t vcn_v1_0_dec_ring_insert_nop +ffffffff81edd500 t vcn_v1_0_dec_ring_insert_start +ffffffff81edd6e0 t vcn_v1_0_dec_ring_insert_end +ffffffff81edd7f0 t vcn_v1_0_ring_begin_use +ffffffff81edd890 t vcn_v1_0_dec_ring_emit_wreg +ffffffff81eddb40 t vcn_v1_0_dec_ring_emit_reg_wait +ffffffff81eddec0 t vcn_v1_0_enc_ring_get_rptr +ffffffff81eddf90 t vcn_v1_0_enc_ring_get_wptr +ffffffff81ede060 t vcn_v1_0_enc_ring_set_wptr +ffffffff81ede120 t vcn_v1_0_enc_ring_emit_ib +ffffffff81ede360 t vcn_v1_0_enc_ring_emit_fence +ffffffff81ede5a0 t vcn_v1_0_enc_ring_emit_vm_flush +ffffffff81ede610 t vcn_v1_0_enc_ring_insert_end +ffffffff81ede6a0 t vcn_v1_0_enc_ring_emit_wreg +ffffffff81ede800 t vcn_v1_0_enc_ring_emit_reg_wait +ffffffff81ede9c0 t vcn_v1_0_set_interrupt_state +ffffffff81ede9f0 t vcn_v1_0_process_interrupt +ffffffff81edeaa0 t vcn_v1_0_idle_work_handler +ffffffff81edec30 t vcn_v1_0_pause_dpg_mode +ffffffff81edfd50 t vcn_v1_0_enable_clock_gating +ffffffff81ee0160 t vcn_v1_0_disable_clock_gating +ffffffff81ee06f0 t vcn_1_0_enable_static_power_gating +ffffffff81ee0910 t vcn_v1_0_start_dpg_mode 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vcn_v2_6_query_poison_status +ffffffff81ef30d0 t vcn_v2_5_early_init +ffffffff81ef3410 t vcn_v2_5_sw_init +ffffffff81ef3890 t vcn_v2_5_sw_fini +ffffffff81ef3960 t vcn_v2_5_hw_init +ffffffff81ef4420 t vcn_v2_5_hw_fini +ffffffff81ef4560 t vcn_v2_5_suspend +ffffffff81ef4590 t vcn_v2_5_resume +ffffffff81ef45e0 t vcn_v2_5_is_idle +ffffffff81ef46d0 t vcn_v2_5_wait_for_idle +ffffffff81ef4800 t vcn_v2_5_set_clockgating_state +ffffffff81ef4880 t vcn_v2_5_set_powergating_state +ffffffff81ef5160 t vcn_v2_5_dec_ring_get_rptr +ffffffff81ef5200 t vcn_v2_5_dec_ring_get_wptr +ffffffff81ef52b0 t vcn_v2_5_dec_ring_set_wptr +ffffffff81ef5360 t vcn_v2_5_enc_ring_get_rptr +ffffffff81ef5450 t vcn_v2_5_enc_ring_get_wptr +ffffffff81ef5550 t vcn_v2_5_enc_ring_set_wptr +ffffffff81ef5650 t vcn_v2_5_set_interrupt_state +ffffffff81ef5680 t vcn_v2_5_process_interrupt +ffffffff81ef57a0 t vcn_v2_5_pause_dpg_mode +ffffffff81ef6110 t vcn_v2_5_enable_clock_gating +ffffffff81ef6410 t vcn_v2_5_disable_clock_gating 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amdgpu_dm_initialize_dp_connector +ffffffff81f312a0 t kasprintf +ffffffff81f31370 t dm_dp_aux_transfer +ffffffff81f314b0 T dm_mst_get_pbn_divider +ffffffff81f31510 T compute_mst_dsc_configs_for_state +ffffffff81f317a0 t is_dsc_need_re_compute +ffffffff81f31970 t compute_mst_dsc_configs_for_link +ffffffff81f325b0 T pre_validate_dsc +ffffffff81f32b80 T dm_dp_mst_is_port_support_mode +ffffffff81f32db0 t amdgpu_dm_encoder_destroy +ffffffff81f32dc0 t dm_dp_add_mst_connector +ffffffff81f32fb0 t amdgpu_dm_mst_connector_late_register +ffffffff81f33000 t amdgpu_dm_mst_connector_early_unregister +ffffffff81f330a0 t dm_dp_mst_connector_destroy +ffffffff81f33120 t dm_dp_mst_get_modes +ffffffff81f33550 t dm_dp_mst_detect +ffffffff81f336e0 t dm_mst_atomic_best_encoder +ffffffff81f33740 t dm_dp_mst_atomic_check +ffffffff81f33770 t set_dsc_configs_from_fairness_vars +ffffffff81f34000 T amd_get_format_info +ffffffff81f34020 T fill_blending_from_plane_state +ffffffff81f340d0 T fill_plane_buffer_attributes +ffffffff81f34640 T dm_plane_helper_check_state +ffffffff81f34860 T fill_dc_scaling_info +ffffffff81f34ac0 T handle_cursor_update +ffffffff81f34d40 T amdgpu_dm_plane_init +ffffffff81f35ac0 t dm_drm_plane_reset +ffffffff81f35b50 t dm_drm_plane_duplicate_state +ffffffff81f35be0 t dm_drm_plane_destroy_state +ffffffff81f35c20 t dm_plane_format_mod_supported +ffffffff81f35d50 t dm_plane_helper_prepare_fb +ffffffff81f36000 t dm_plane_helper_cleanup_fb +ffffffff81f360a0 t dm_plane_atomic_check +ffffffff81f36170 t dm_plane_atomic_async_check +ffffffff81f361b0 t dm_plane_atomic_async_update +ffffffff81f36260 t amdgpu_bo_reserve +ffffffff81f36470 t amdgpu_bo_unreserve +ffffffff81f37000 T dm_pp_apply_display_requirements +ffffffff81f371e0 T dm_pp_get_clock_levels_by_type +ffffffff81f37520 T dm_pp_get_clock_levels_by_type_with_latency +ffffffff81f376e0 T dm_pp_get_clock_levels_by_type_with_voltage +ffffffff81f378a0 T dm_pp_notify_wm_clock_changes +ffffffff81f378f0 T dm_pp_apply_power_level_change_request +ffffffff81f37920 T dm_pp_apply_clock_for_voltage_request +ffffffff81f379c0 T dm_pp_get_static_clocks +ffffffff81f37a80 T dm_pp_get_funcs +ffffffff81f37b90 t pp_rv_set_wm_ranges +ffffffff81f37ce0 t pp_rv_set_pme_wa_enable +ffffffff81f37d00 t pp_rv_set_active_display_count +ffffffff81f37d20 t pp_rv_set_min_deep_sleep_dcfclk +ffffffff81f37d40 t pp_rv_set_hard_min_dcefclk_by_freq +ffffffff81f37d60 t pp_rv_set_hard_min_fclk_by_freq +ffffffff81f37d80 t pp_nv_set_display_count +ffffffff81f37de0 t pp_nv_set_hard_min_dcefclk_by_freq +ffffffff81f37e50 t pp_nv_set_min_deep_sleep_dcfclk +ffffffff81f37eb0 t pp_nv_set_voltage_by_freq +ffffffff81f37f40 t pp_nv_set_wm_ranges +ffffffff81f37f90 t pp_nv_set_hard_min_uclk_by_freq +ffffffff81f38000 t pp_nv_get_maximum_sustainable_clocks +ffffffff81f38060 t pp_nv_get_uclk_dpm_states +ffffffff81f380c0 t pp_nv_set_pstate_handshake_support +ffffffff81f38110 t pp_rn_set_wm_ranges +ffffffff81f38160 t pp_rn_get_dpm_clock_table +ffffffff81f39000 T amdgpu_dm_set_psr_caps +ffffffff81f39110 T amdgpu_dm_link_setup_psr +ffffffff81f39290 T amdgpu_dm_psr_enable +ffffffff81f39390 T amdgpu_dm_psr_disable +ffffffff81f39410 T amdgpu_dm_psr_disable_all +ffffffff81f3a000 T dm_get_elapse_time_in_ns +ffffffff81f3a030 T dm_perf_trace_timestamp +ffffffff81f3b000 T dc_assert_fp_enabled +ffffffff81f3b070 T dc_fpu_begin +ffffffff81f3b0c0 T dc_fpu_end +ffffffff81f3c000 T dal_vector_construct +ffffffff81f3c0d0 T dal_vector_presized_create +ffffffff81f3c350 T dal_vector_create +ffffffff81f3c470 T dal_vector_destruct +ffffffff81f3c4c0 T dal_vector_destroy +ffffffff81f3c540 T dal_vector_get_count +ffffffff81f3c570 T dal_vector_at_index +ffffffff81f3c5b0 T dal_vector_remove_at_index +ffffffff81f3c640 T dal_vector_set_at_index +ffffffff81f3c6a0 T dal_vector_insert_at +ffffffff81f3c7a0 T dal_vector_reserve +ffffffff81f3c850 T dal_vector_append +ffffffff81f3c950 T dal_vector_clone +ffffffff81f3ca00 T dal_vector_capacity +ffffffff81f3ca30 T dal_vector_clear +ffffffff81f3d000 T fixed_point_to_int_frac +ffffffff81f3d200 T convert_float_matrix +ffffffff81f3d2c0 T reduce_fraction +ffffffff81f3e000 T is_rgb_cspace +ffffffff81f3e080 T is_lower_pipe_tree_visible +ffffffff81f3e0e0 T is_upper_pipe_tree_visible +ffffffff81f3e140 T is_pipe_tree_visible +ffffffff81f3e1c0 T build_prescale_params +ffffffff81f3f000 T dc_fixpt_from_fraction +ffffffff81f3f1d0 T dc_fixpt_mul +ffffffff81f3f380 T dc_fixpt_sqr +ffffffff81f3f4f0 T dc_fixpt_recip +ffffffff81f3f560 T dc_fixpt_sinc +ffffffff81f3f750 T dc_fixpt_sin +ffffffff81f3f780 T dc_fixpt_cos +ffffffff81f3f870 T dc_fixpt_exp +ffffffff81f3fb70 t fixed31_32_exp_from_taylor_series +ffffffff81f3ff50 T dc_fixpt_log +ffffffff81f40160 T dc_fixpt_u4d19 +ffffffff81f401a0 T dc_fixpt_u3d19 +ffffffff81f401e0 T dc_fixpt_u2d19 +ffffffff81f40220 T dc_fixpt_u0d19 +ffffffff81f40250 T dc_fixpt_clamp_u0d14 +ffffffff81f402a0 T dc_fixpt_clamp_u0d10 +ffffffff81f402f0 T dc_fixpt_s4d19 +ffffffff81f41000 T bios_parser_create +ffffffff81f423b0 t bios_parser_get_connectors_number +ffffffff81f42410 t bios_parser_get_connector_id +ffffffff81f424a0 t bios_parser_get_src_obj +ffffffff81f425b0 t bios_parser_get_i2c_info +ffffffff81f427d0 t bios_parser_get_hpd_info +ffffffff81f428b0 t bios_parser_get_device_tag +ffffffff81f42ab0 t bios_parser_get_spread_spectrum_info +ffffffff81f42db0 t bios_parser_get_ss_entry_number +ffffffff81f42fe0 t bios_parser_get_embedded_panel_info +ffffffff81f43530 t bios_parser_get_gpio_pin_info +ffffffff81f43650 t bios_parser_get_encoder_cap_info +ffffffff81f43750 t bios_parser_set_scratch_critical_state +ffffffff81f43760 t bios_parser_is_device_id_supported +ffffffff81f43820 t bios_parser_encoder_control +ffffffff81f43860 t bios_parser_transmitter_control +ffffffff81f438a0 t bios_parser_enable_crtc +ffffffff81f438f0 t bios_parser_adjust_pixel_clock +ffffffff81f43930 t bios_parser_set_pixel_clock +ffffffff81f43970 t bios_parser_set_dce_clock +ffffffff81f439b0 t bios_parser_enable_spread_spectrum_on_ppll +ffffffff81f43a00 t bios_parser_program_crtc_timing +ffffffff81f43a40 t bios_parser_program_display_engine_pll +ffffffff81f43a80 t bios_parser_enable_disp_power_gating +ffffffff81f43ac0 t bios_parser_destroy +ffffffff81f43b80 t bios_get_board_layout_info +ffffffff81f43e10 t get_bios_object +ffffffff81f43fe0 t get_ss_info_from_ss_info_table +ffffffff81f441a0 t get_ss_entry_number_from_ss_info_tbl +ffffffff81f45000 T firmware_parser_create +ffffffff81f46de0 t bios_parser_get_connectors_number +ffffffff81f46f70 t bios_parser_get_connector_id +ffffffff81f47000 t bios_parser_get_src_obj +ffffffff81f472a0 t bios_parser_get_i2c_info +ffffffff81f47510 t bios_parser_get_hpd_info +ffffffff81f47680 t bios_parser_get_device_tag +ffffffff81f47950 t bios_parser_get_spread_spectrum_info +ffffffff81f47d10 t bios_parser_get_ss_entry_number +ffffffff81f47d40 t bios_parser_get_embedded_panel_info +ffffffff81f47f40 t bios_parser_get_gpio_pin_info +ffffffff81f48060 t bios_parser_get_encoder_cap_info +ffffffff81f481d0 t bios_parser_is_accelerated_mode +ffffffff81f481e0 t bios_parser_set_scratch_critical_state +ffffffff81f481f0 t bios_parser_is_device_id_supported +ffffffff81f48270 t bios_parser_encoder_control +ffffffff81f482b0 t bios_parser_transmitter_control +ffffffff81f482f0 t bios_parser_enable_crtc +ffffffff81f48340 t bios_parser_set_pixel_clock +ffffffff81f48380 t bios_parser_set_dce_clock +ffffffff81f483c0 t bios_parser_program_crtc_timing +ffffffff81f48400 t bios_parser_enable_disp_power_gating +ffffffff81f48440 t firmware_parser_destroy +ffffffff81f48500 t bios_get_board_layout_info +ffffffff81f489b0 t bios_parser_pack_data_tables +ffffffff81f489e0 t bios_get_atom_dc_golden_table +ffffffff81f48b20 t bios_parser_enable_lvtma_control +ffffffff81f48b70 t bios_parser_get_soc_bb_info +ffffffff81f48c80 t bios_parser_get_disp_connector_caps_info +ffffffff81f48de0 t bios_parser_get_lttpr_caps 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transmitter_control_v4 +ffffffff81f4e1c0 t transmitter_control_v1_5 +ffffffff81f4e340 t transmitter_control_v1_6 +ffffffff81f4e4b0 t set_pixel_clock_v3 +ffffffff81f4e620 t set_pixel_clock_v5 +ffffffff81f4e7c0 t set_pixel_clock_v6 +ffffffff81f4e970 t set_pixel_clock_v7 +ffffffff81f4eb40 t enable_spread_spectrum_on_ppll_v1 +ffffffff81f4ec60 t enable_spread_spectrum_on_ppll_v2 +ffffffff81f4ed90 t enable_spread_spectrum_on_ppll_v3 +ffffffff81f4eea0 t adjust_display_pll_v2 +ffffffff81f4eff0 t adjust_display_pll_v3 +ffffffff81f4f160 t dac1_encoder_control_v1 +ffffffff81f4f1e0 t dac2_encoder_control_v1 +ffffffff81f4f260 t dac1_output_control_v1 +ffffffff81f4f2c0 t dac2_output_control_v1 +ffffffff81f4f320 t set_crtc_using_dtd_timing_v3 +ffffffff81f4f490 t set_crtc_timing_v1 +ffffffff81f4f630 t enable_crtc_v1 +ffffffff81f4f6d0 t enable_crtc_mem_req_v1 +ffffffff81f4f770 t program_clock_v5 +ffffffff81f4f870 t program_clock_v6 +ffffffff81f4f990 t external_encoder_control_v3 +ffffffff81f4fb40 t enable_disp_power_gating_v2_1 +ffffffff81f4fc00 t set_dce_clock_v2_1 +ffffffff81f50000 T dal_firmware_parser_init_cmd_tbl +ffffffff81f503d0 t encoder_control_digx_v1_5 +ffffffff81f505b0 t encoder_control_fallback +ffffffff81f50610 t transmitter_control_v1_6 +ffffffff81f507c0 t transmitter_control_v1_7 +ffffffff81f509b0 t transmitter_control_fallback +ffffffff81f50a10 t set_pixel_clock_v7 +ffffffff81f50c70 t set_pixel_clock_fallback +ffffffff81f50cd0 t set_crtc_using_dtd_timing_v3 +ffffffff81f50e40 t enable_crtc_v1 +ffffffff81f50ee0 t external_encoder_control_v3 +ffffffff81f50f10 t enable_disp_power_gating_v2_1 +ffffffff81f51070 t enable_disp_power_gating_fallback +ffffffff81f510d0 t set_dce_clock_v2_1 +ffffffff81f511f0 t get_smu_clock_info_v3_1 +ffffffff81f51260 t enable_lvtma_control +ffffffff81f52000 T dal_bios_parser_init_cmd_tbl_helper +ffffffff81f520a0 T dal_cmd_table_helper_controller_id_to_atom +ffffffff81f521c0 T dal_cmd_table_helper_transmitter_bp_to_atom +ffffffff81f52240 T dal_cmd_table_helper_encoder_mode_bp_to_atom +ffffffff81f522d0 T dal_cmd_table_helper_assign_control_parameter +ffffffff81f52390 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src +ffffffff81f52470 T dal_cmd_table_helper_encoder_id_to_atom +ffffffff81f53000 T dal_bios_parser_init_cmd_tbl_helper2 +ffffffff81f530b0 T dal_cmd_table_helper_controller_id_to_atom2 +ffffffff81f531c0 T dal_cmd_table_helper_transmitter_bp_to_atom2 +ffffffff81f53240 T dal_cmd_table_helper_encoder_mode_bp_to_atom2 +ffffffff81f532d0 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src2 +ffffffff81f533b0 T dal_cmd_table_helper_encoder_id_to_atom2 +ffffffff81f54000 T dal_cmd_tbl_helper_dce110_get_table +ffffffff81f54030 t encoder_action_to_atom +ffffffff81f540b0 t engine_bp_to_atom +ffffffff81f54100 t clock_source_id_to_atom +ffffffff81f541a0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff81f541f0 t signal_type_to_atom_dig_mode +ffffffff81f54250 t hpd_sel_to_atom +ffffffff81f54290 t dig_encoder_sel_to_atom +ffffffff81f542c0 t phy_id_to_atom +ffffffff81f54300 t disp_power_gating_action_to_atom +ffffffff81f55000 T dal_cmd_tbl_helper_dce112_get_table2 +ffffffff81f55030 t encoder_action_to_atom +ffffffff81f550b0 t engine_bp_to_atom +ffffffff81f55100 t clock_source_id_to_atom +ffffffff81f551d0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff81f55220 t signal_type_to_atom_dig_mode +ffffffff81f55280 t hpd_sel_to_atom +ffffffff81f552c0 t dig_encoder_sel_to_atom +ffffffff81f552f0 t phy_id_to_atom +ffffffff81f55330 t disp_power_gating_action_to_atom +ffffffff81f553a0 t dc_clock_type_to_atom +ffffffff81f55420 t transmitter_color_depth_to_atom +ffffffff81f56000 T dal_cmd_tbl_helper_dce112_get_table +ffffffff81f56030 t encoder_action_to_atom +ffffffff81f560b0 t engine_bp_to_atom +ffffffff81f56100 t clock_source_id_to_atom +ffffffff81f561d0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff81f56220 t signal_type_to_atom_dig_mode +ffffffff81f56280 t hpd_sel_to_atom +ffffffff81f562c0 t dig_encoder_sel_to_atom +ffffffff81f562f0 t phy_id_to_atom +ffffffff81f56330 t disp_power_gating_action_to_atom +ffffffff81f563a0 t dc_clock_type_to_atom +ffffffff81f56420 t transmitter_color_depth_to_atom +ffffffff81f57000 T dal_cmd_tbl_helper_dce80_get_table +ffffffff81f57030 t encoder_action_to_atom +ffffffff81f570b0 t engine_bp_to_atom +ffffffff81f57100 t clock_source_id_to_atom +ffffffff81f571d0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff81f57220 t signal_type_to_atom_dig_mode +ffffffff81f57280 t hpd_sel_to_atom +ffffffff81f572c0 t dig_encoder_sel_to_atom +ffffffff81f57310 t phy_id_to_atom +ffffffff81f57350 t disp_power_gating_action_to_atom +ffffffff81f58000 T clk_mgr_helper_get_active_display_cnt +ffffffff81f580e0 T clk_mgr_helper_get_active_plane_cnt +ffffffff81f58190 T clk_mgr_exit_optimized_pwr_state +ffffffff81f58290 T clk_mgr_optimize_pwr_state +ffffffff81f583a0 T dc_clk_mgr_create +ffffffff81f58a80 T dc_destroy_clk_mgr +ffffffff81f59000 T dentist_get_divider_from_did +ffffffff81f59070 T dce_adjust_dp_ref_freq_for_ss +ffffffff81f59180 T dce_get_dp_ref_freq_khz +ffffffff81f592b0 T dce12_get_dp_ref_freq_khz +ffffffff81f592d0 T dce_get_max_pixel_clock_for_all_paths +ffffffff81f594e0 T dce_get_required_clocks_state +ffffffff81f59590 T dce_set_clock +ffffffff81f596f0 T dce_clock_read_ss_info +ffffffff81f59830 T dce_clk_mgr_construct +ffffffff81f59a20 t dce_update_clocks +ffffffff81f5a000 T dce110_get_min_vblank_time_us +ffffffff81f5a080 T dce110_fill_display_configs +ffffffff81f5a2e0 T dce11_pplib_apply_display_requirements +ffffffff81f5a5d0 T dce110_clk_mgr_construct +ffffffff81f5a680 t dce11_update_clocks +ffffffff81f5b000 T dce112_set_clock +ffffffff81f5b1a0 T dce112_set_dispclk +ffffffff81f5b2d0 T dce112_set_dprefclk +ffffffff81f5b340 T dce112_clk_mgr_construct +ffffffff81f5b3f0 t dce112_update_clocks +ffffffff81f5c000 T dce120_clk_mgr_construct +ffffffff81f5c090 T dce121_clk_mgr_construct +ffffffff81f5c1c0 t dce12_update_clocks +ffffffff81f5d000 T rv1_clk_mgr_construct +ffffffff81f5d0c0 t rv1_update_clocks +ffffffff81f5d5b0 t rv1_init_clocks +ffffffff81f5d640 t rv1_enable_pme_wa +ffffffff81f5e000 T rv1_vbios_smu_set_dispclk +ffffffff81f5e0f0 t rv1_vbios_smu_send_msg_with_param +ffffffff81f5e200 T rv1_vbios_smu_set_dprefclk +ffffffff81f5f000 T rv2_clk_mgr_construct +ffffffff81f60000 T dentist_get_did_from_divider +ffffffff81f60090 T dcn20_update_clocks_update_dpp_dto +ffffffff81f60160 T dcn20_update_clocks_update_dentist +ffffffff81f60680 T dcn2_update_clocks +ffffffff81f60bf0 T dcn2_read_clocks_from_hw_dentist +ffffffff81f60cc0 T dcn2_update_clocks_fpga +ffffffff81f60e40 T dcn2_init_clocks +ffffffff81f60ee0 T dcn2_get_clock +ffffffff81f60f50 T dcn20_clk_mgr_construct +ffffffff81f610a0 t dcn2_enable_pme_wa +ffffffff81f610f0 t dcn2_are_clock_states_equal +ffffffff81f61160 t dcn2_notify_link_rate_change +ffffffff81f62000 t dcn201_update_clocks +ffffffff81f62240 t dcn201_init_clocks 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+ffffffff81f682d0 T dcn30_smu_transfer_wm_table_smu_2_dram +ffffffff81f682f0 T dcn30_smu_transfer_wm_table_dram_2_smu +ffffffff81f68310 T dcn30_smu_set_hard_min_by_freq +ffffffff81f68360 T dcn30_smu_set_hard_max_by_freq +ffffffff81f683b0 T dcn30_smu_get_dpm_freq_by_index +ffffffff81f68400 T dcn30_smu_get_dc_mode_max_dpm_freq +ffffffff81f68450 T dcn30_smu_set_min_deep_sleep_dcef_clk +ffffffff81f68470 T dcn30_smu_set_num_of_displays +ffffffff81f68490 T dcn30_smu_set_display_refresh_from_mall +ffffffff81f684c0 T dcn30_smu_set_external_client_df_cstate_allow +ffffffff81f684e0 T dcn30_smu_set_pme_workaround +ffffffff81f69000 T dcn301_smu_get_smu_version +ffffffff81f69070 t dcn301_smu_send_msg_with_param +ffffffff81f691f0 T dcn301_smu_set_dispclk +ffffffff81f69290 T dcn301_smu_set_dprefclk +ffffffff81f69340 T dcn301_smu_set_hard_min_dcfclk +ffffffff81f693e0 T dcn301_smu_set_min_deep_sleep_dcfclk +ffffffff81f69480 T dcn301_smu_set_dppclk +ffffffff81f69520 T dcn301_smu_set_display_idle_optimization +ffffffff81f69570 T dcn301_smu_enable_phy_refclk_pwrdwn +ffffffff81f695c0 T dcn301_smu_enable_pme_wa +ffffffff81f695e0 T dcn301_smu_set_dram_addr_high +ffffffff81f69630 T dcn301_smu_set_dram_addr_low +ffffffff81f69680 T dcn301_smu_transfer_dpm_table_smu_2_dram +ffffffff81f696a0 T dcn301_smu_transfer_wm_table_dram_2_smu +ffffffff81f6a000 T vg_clk_mgr_construct +ffffffff81f6a7f0 T vg_clk_mgr_destroy +ffffffff81f6a840 t vg_update_clocks +ffffffff81f6abd0 t vg_init_clocks +ffffffff81f6ac70 t vg_enable_pme_wa +ffffffff81f6ac80 t vg_are_clock_states_equal +ffffffff81f6acd0 t vg_notify_wm_ranges +ffffffff81f6c000 T dcn31_update_clocks +ffffffff81f6c620 T dcn31_init_clocks +ffffffff81f6c6d0 T dcn31_are_clock_states_equal +ffffffff81f6c730 T dcn31_get_dtb_ref_freq_khz +ffffffff81f6c760 T dcn31_clk_mgr_construct +ffffffff81f6cdd0 T dcn31_clk_mgr_destroy +ffffffff81f6ce20 t dcn31_set_low_power_state +ffffffff81f6d000 t dcn31_enable_pme_wa +ffffffff81f6d010 t dcn31_notify_wm_ranges +ffffffff81f6d3b0 t find_clk_for_voltage +ffffffff81f6e000 T dcn31_smu_get_smu_version +ffffffff81f6e020 t dcn31_smu_send_msg_with_param +ffffffff81f6e220 T dcn31_smu_set_dispclk +ffffffff81f6e290 T dcn31_smu_set_dprefclk +ffffffff81f6e300 T dcn31_smu_set_hard_min_dcfclk +ffffffff81f6e380 T dcn31_smu_set_min_deep_sleep_dcfclk +ffffffff81f6e400 T dcn31_smu_set_dppclk +ffffffff81f6e470 T dcn31_smu_set_display_idle_optimization +ffffffff81f6e4c0 T dcn31_smu_enable_phy_refclk_pwrdwn +ffffffff81f6e510 T dcn31_smu_enable_pme_wa +ffffffff81f6e550 T dcn31_smu_set_dram_addr_high +ffffffff81f6e590 T dcn31_smu_set_dram_addr_low +ffffffff81f6e5d0 T dcn31_smu_transfer_dpm_table_smu_2_dram +ffffffff81f6e610 T dcn31_smu_transfer_wm_table_dram_2_smu +ffffffff81f6e650 T dcn31_smu_set_zstate_support +ffffffff81f6e6c0 T dcn31_smu_set_dtbclk +ffffffff81f6f000 T dcn314_update_clocks +ffffffff81f6f6d0 T dcn314_are_clock_states_equal +ffffffff81f6f730 T dcn314_clk_mgr_construct +ffffffff81f70440 T dcn314_clk_mgr_destroy +ffffffff81f70490 t dcn314_enable_pme_wa +ffffffff81f704a0 t dcn314_notify_wm_ranges +ffffffff81f71000 T dcn314_smu_get_smu_version +ffffffff81f71020 t dcn314_smu_send_msg_with_param +ffffffff81f71240 T dcn314_smu_set_dispclk +ffffffff81f712b0 T dcn314_smu_set_dprefclk +ffffffff81f71320 T dcn314_smu_set_hard_min_dcfclk +ffffffff81f713a0 T dcn314_smu_set_min_deep_sleep_dcfclk +ffffffff81f71420 T dcn314_smu_set_dppclk +ffffffff81f71490 T dcn314_smu_set_display_idle_optimization +ffffffff81f714e0 T dcn314_smu_enable_phy_refclk_pwrdwn +ffffffff81f71530 T dcn314_smu_enable_pme_wa +ffffffff81f71570 T dcn314_smu_set_dram_addr_high +ffffffff81f715b0 T dcn314_smu_set_dram_addr_low +ffffffff81f715f0 T dcn314_smu_transfer_dpm_table_smu_2_dram +ffffffff81f71630 T dcn314_smu_transfer_wm_table_dram_2_smu +ffffffff81f71670 T dcn314_smu_set_zstate_support +ffffffff81f716c0 T dcn314_smu_set_dtbclk +ffffffff81f72000 T dcn315_clk_mgr_construct +ffffffff81f729c0 T dcn315_clk_mgr_destroy +ffffffff81f72a10 t dcn315_update_clocks +ffffffff81f73000 t dcn315_enable_pme_wa +ffffffff81f73010 t dcn315_notify_wm_ranges +ffffffff81f74000 T dcn315_smu_get_smu_version +ffffffff81f74020 t dcn315_smu_send_msg_with_param +ffffffff81f741b0 T dcn315_smu_set_dispclk +ffffffff81f74220 T dcn315_smu_set_hard_min_dcfclk +ffffffff81f742a0 T dcn315_smu_set_min_deep_sleep_dcfclk +ffffffff81f74320 T dcn315_smu_set_dppclk +ffffffff81f74390 T dcn315_smu_set_display_idle_optimization +ffffffff81f743e0 T dcn315_smu_enable_phy_refclk_pwrdwn +ffffffff81f74430 T dcn315_smu_enable_pme_wa +ffffffff81f74470 T dcn315_smu_set_dram_addr_high +ffffffff81f744b0 T dcn315_smu_set_dram_addr_low +ffffffff81f744f0 T dcn315_smu_transfer_dpm_table_smu_2_dram +ffffffff81f74530 T dcn315_smu_transfer_wm_table_dram_2_smu +ffffffff81f74570 T dcn315_smu_get_dpref_clk +ffffffff81f745d0 T dcn315_smu_get_dtbclk +ffffffff81f74630 T dcn315_smu_set_dtbclk +ffffffff81f75000 T dcn316_clk_mgr_construct +ffffffff81f756a0 T dcn316_clk_mgr_destroy +ffffffff81f756f0 t dcn316_update_clocks +ffffffff81f75d20 t dcn316_enable_pme_wa +ffffffff81f75d30 t dcn316_notify_wm_ranges +ffffffff81f760c0 t find_clk_for_voltage +ffffffff81f77000 T dcn316_smu_get_smu_version +ffffffff81f77020 t dcn316_smu_send_msg_with_param +ffffffff81f771b0 T dcn316_smu_set_dispclk +ffffffff81f77220 T dcn316_smu_set_hard_min_dcfclk +ffffffff81f772a0 T dcn316_smu_set_min_deep_sleep_dcfclk +ffffffff81f77320 T dcn316_smu_set_dppclk +ffffffff81f77390 T dcn316_smu_set_display_idle_optimization +ffffffff81f773e0 T dcn316_smu_enable_phy_refclk_pwrdwn +ffffffff81f77430 T dcn316_smu_set_dram_addr_high +ffffffff81f77470 T dcn316_smu_set_dram_addr_low +ffffffff81f774b0 T dcn316_smu_transfer_dpm_table_smu_2_dram +ffffffff81f774f0 T dcn316_smu_transfer_wm_table_dram_2_smu +ffffffff81f77530 T dcn316_smu_enable_pme_wa +ffffffff81f77570 T dcn316_smu_set_dtbclk +ffffffff81f775b0 T dcn316_smu_get_dpref_clk +ffffffff81f77610 T dcn316_smu_get_smu_fclk +ffffffff81f78000 T dcn32_init_clocks +ffffffff81f784e0 T dcn32_clk_mgr_construct +ffffffff81f78770 T dcn32_clk_mgr_destroy +ffffffff81f787e0 t dcn32_update_clocks +ffffffff81f78f30 t dcn32_dump_clk_registers +ffffffff81f79150 t dcn32_enable_pme_wa +ffffffff81f79190 t dcn32_are_clock_states_equal +ffffffff81f79200 t dcn32_notify_wm_ranges +ffffffff81f79380 t dcn32_set_hard_min_memclk +ffffffff81f79420 t dcn32_set_hard_max_memclk +ffffffff81f79480 t dcn32_get_memclk_states_from_smu +ffffffff81f79670 t dcn32_is_smu_present +ffffffff81f7a000 T dcn32_smu_send_fclk_pstate_message +ffffffff81f7a020 t dcn32_smu_send_msg_with_param +ffffffff81f7a160 T dcn32_smu_send_cab_for_uclk_message +ffffffff81f7a190 T dcn32_smu_transfer_wm_table_dram_2_smu +ffffffff81f7a1b0 T dcn32_smu_set_pme_workaround +ffffffff81f7a1d0 T dcn32_smu_set_hard_min_by_freq +ffffffff81f7b000 T dc_stream_adjust_vmin_vmax +ffffffff81f7b180 T dc_stream_get_last_used_drr_vtotal +ffffffff81f7b2e0 T dc_stream_get_crtc_position +ffffffff81f7b510 T dc_stream_configure_crc +ffffffff81f7b760 T dc_stream_get_crc +ffffffff81f7b840 T dc_stream_set_dyn_expansion +ffffffff81f7bab0 T dc_stream_set_dither_option +ffffffff81f7bc20 T dc_stream_set_gamut_remap +ffffffff81f7bda0 T dc_stream_program_csc_matrix +ffffffff81f7bfc0 T dc_stream_set_static_screen_params +ffffffff81f7c150 T dc_create +ffffffff81f7caf0 t dc_construct_ctx +ffffffff81f7cc50 t dc_destruct +ffffffff81f7cf20 T dc_hardware_init +ffffffff81f7d030 T dc_init_callbacks +ffffffff81f7d060 T dc_deinit_callbacks +ffffffff81f7d090 T dc_destroy +ffffffff81f7d0e0 T dc_validate_boot_timing +ffffffff81f7d470 T dc_enable_stereo +ffffffff81f7d570 T dc_trigger_sync +ffffffff81f7db90 T dc_z10_restore +ffffffff81f7dbd0 T dc_z10_save_init +ffffffff81f7dc10 T dc_commit_state +ffffffff81f7dd40 t dc_commit_state_no_check +ffffffff81f7f1c0 T dc_acquire_release_mpc_3dlut +ffffffff81f7f2b0 T dc_post_update_surfaces_to_stream +ffffffff81f7f6c0 T dc_create_state +ffffffff81f7f750 T dc_copy_state +ffffffff81f7f940 T dc_retain_state +ffffffff81f7f970 T dc_release_state +ffffffff81f7f9e0 T dc_set_generic_gpio_for_stereo +ffffffff81f7faf0 T dc_check_update_surfaces_for_stream +ffffffff81f80760 T dc_dmub_update_dirty_rect +ffffffff81f809f0 T dc_update_planes_and_stream +ffffffff81f81140 t commit_minimal_transition_state +ffffffff81f814d0 t commit_planes_for_stream +ffffffff81f82bc0 T dc_commit_updates_for_stream +ffffffff81f82fc0 t copy_surface_update_to_plane +ffffffff81f833c0 t copy_stream_update_to_stream +ffffffff81f839f0 T dc_get_current_stream_count +ffffffff81f83a30 T dc_get_stream_at_index +ffffffff81f83a80 T dc_interrupt_to_irq_source +ffffffff81f83aa0 T dc_interrupt_set +ffffffff81f83af0 T dc_interrupt_ack +ffffffff81f83b10 T dc_power_down_on_boot +ffffffff81f83b60 T dc_set_power_state +ffffffff81f83d50 T dc_resume +ffffffff81f83dc0 T dc_is_dmcu_initialized +ffffffff81f83e10 T dc_is_oem_i2c_device_present +ffffffff81f83e60 T dc_submit_i2c +ffffffff81f83e90 T dc_submit_i2c_oem +ffffffff81f83ee0 T dc_link_add_remote_sink +ffffffff81f84070 T dc_link_remove_remote_sink +ffffffff81f84160 T get_clock_requirements_for_state +ffffffff81f841e0 T dc_set_clock +ffffffff81f84220 T dc_get_clock +ffffffff81f84260 T dc_set_psr_allow_active +ffffffff81f84360 T dc_allow_idle_optimizations +ffffffff81f84400 T dc_unlock_memory_clock_frequency +ffffffff81f84470 T dc_lock_memory_clock_frequency +ffffffff81f84500 T dc_enable_dcmode_clk_limit +ffffffff81f84610 t blank_and_force_memclk +ffffffff81f847f0 T dc_is_plane_eligible_for_idle_optimizations +ffffffff81f84840 T dc_hardware_release +ffffffff81f84890 T dc_mclk_switch_using_fw_based_vblank_stretch_shut_down +ffffffff81f848d0 T dc_is_dmub_outbox_supported +ffffffff81f84930 T dc_enable_dmub_notifications +ffffffff81f84990 T dc_enable_dmub_outbox +ffffffff81f849d0 T dc_process_dmub_aux_transfer_async +ffffffff81f84b70 T get_link_index_from_dpia_port_index +ffffffff81f84c20 T dc_process_dmub_set_config_async +ffffffff81f84d10 T dc_process_dmub_set_mst_slots +ffffffff81f84e00 T dc_process_dmub_dpia_hpd_int_enable +ffffffff81f84ed0 T dc_disable_accelerated_mode +ffffffff81f84ef0 T dc_notify_vsync_int_state +ffffffff81f85120 T dc_extended_blank_supported +ffffffff81f86000 T pre_surface_trace +ffffffff81f86030 T update_surface_trace +ffffffff81f86060 T post_surface_trace +ffffffff81f86090 T context_timing_trace +ffffffff81f86240 T context_clock_trace +ffffffff81f86270 T dc_status_to_str +ffffffff81f87000 T find_color_matrix +ffffffff81f870b0 T color_space_to_black_color +ffffffff81f87140 T hwss_wait_for_blank_complete +ffffffff81f871f0 T get_mpctree_visual_confirm_color +ffffffff81f87250 T get_surface_visual_confirm_color +ffffffff81f87300 T get_hdr_visual_confirm_color +ffffffff81f873b0 T get_subvp_visual_confirm_color +ffffffff81f874a0 T get_surface_tile_visual_confirm_color +ffffffff81f88000 T get_hpd_gpio +ffffffff81f880e0 T dc_link_wait_for_t12 +ffffffff81f88140 T dc_link_detect_sink +ffffffff81f882f0 T dc_link_is_dp_sink_present +ffffffff81f88570 T reset_cur_dp_mst_topology +ffffffff81f885d0 T dc_link_detect +ffffffff81f89940 T dc_link_get_hpd_state +ffffffff81f899b0 T link_create +ffffffff81f8aad0 T link_destroy +ffffffff81f8ac30 T dc_link_blank_all_dp_displays +ffffffff81f8ad00 T dc_link_blank_dp_stream +ffffffff81f8ae10 T dc_link_blank_all_edp_displays +ffffffff81f8aed0 T dc_power_alpm_dpcd_enable +ffffffff81f8af40 T dc_link_validate_mode_timing +ffffffff81f8b460 T dc_link_get_backlight_level +ffffffff81f8b5d0 T dc_link_get_target_backlight_pwm +ffffffff81f8b6e0 T dc_link_set_backlight_level +ffffffff81f8b850 T dc_link_set_psr_allow_active +ffffffff81f8bad0 T dc_link_get_psr_state +ffffffff81f8bc00 T dc_link_setup_psr +ffffffff81f8c060 T dc_link_get_psr_residency +ffffffff81f8c160 T dc_link_set_sink_vtotal_in_psr_active +ffffffff81f8c1e0 T dc_link_get_status +ffffffff81f8c210 T core_link_resume +ffffffff81f8c250 t program_hpd_filter +ffffffff81f8c3e0 T dc_link_allocate_mst_payload +ffffffff81f8c8c0 t update_mst_stream_alloc_table +ffffffff81f8cb40 t dc_log_vcp_x_y +ffffffff81f8ccd0 T dc_link_reduce_mst_payload +ffffffff81f8d150 T dc_link_increase_mst_payload +ffffffff81f8d5d0 T core_link_enable_stream +ffffffff81f8e2b0 t disable_link +ffffffff81f8e3d0 t dc_link_update_sst_payload +ffffffff81f8e610 T core_link_set_avmute +ffffffff81f8e660 T core_link_disable_stream +ffffffff81f8ecd0 t get_ext_hdmi_settings +ffffffff81f8ef10 t write_i2c_retimer_setting +ffffffff81f8f5c0 t write_i2c_default_retimer_setting +ffffffff81f8fc60 t write_i2c_redriver_setting +ffffffff81f8fda0 T dc_link_enable_hpd_filter +ffffffff81f8ff10 T dc_link_set_drive_settings +ffffffff81f8ffe0 T dc_link_get_cur_link_res +ffffffff81f90130 T dc_link_set_preferred_link_settings +ffffffff81f90280 T dc_link_set_preferred_training_settings +ffffffff81f903c0 T dc_link_enable_hpd +ffffffff81f903d0 T dc_link_disable_hpd +ffffffff81f903e0 T dc_link_set_test_pattern +ffffffff81f90420 T dc_link_bandwidth_kbps +ffffffff81f904c0 T dc_link_should_enable_fec +ffffffff81f905e0 T dc_link_get_link_cap +ffffffff81f90630 T dc_link_overwrite_extended_receiver_cap +ffffffff81f90640 T dc_link_is_fec_supported +ffffffff81f90700 T dc_bandwidth_in_kbps_from_timing +ffffffff81f90860 T dc_get_cur_link_res_map +ffffffff81f90940 T dc_restore_link_res_map +ffffffff81f90a70 t read_current_link_settings_on_detect +ffffffff81f90c80 t enable_link_dp +ffffffff81f91000 T dal_ddc_i2c_payloads_add +ffffffff81f910c0 T dal_ddc_service_create +ffffffff81f91230 T dal_ddc_service_destroy +ffffffff81f912c0 T dal_ddc_service_get_type +ffffffff81f912f0 T dal_ddc_service_set_transaction_type +ffffffff81f91320 T dal_ddc_service_is_in_aux_transaction_mode +ffffffff81f91360 T ddc_service_set_dongle_type +ffffffff81f91390 T get_defer_delay +ffffffff81f914c0 T dal_ddc_service_i2c_query_dp_dual_mode_adaptor +ffffffff81f918d0 T dal_ddc_service_query_ddc_data +ffffffff81f91c90 T dal_ddc_submit_aux_command +ffffffff81f91d80 T dc_link_aux_transfer_with_retries +ffffffff81f91d90 T dc_link_aux_transfer_raw +ffffffff81f91dc0 T dc_link_aux_try_to_configure_timeout +ffffffff81f91ea0 T dal_ddc_service_set_ddc_pin +ffffffff81f91ed0 T dal_ddc_service_get_ddc_pin +ffffffff81f91f00 T dal_ddc_service_write_scdc_data +ffffffff81f91ff0 T dal_ddc_service_read_scdc_data +ffffffff81f93000 T dp_wait_for_training_aux_rd_interval +ffffffff81f93080 T dc_dp_training_pattern_to_dpcd_training_pattern +ffffffff81f93100 T dpcd_set_link_settings +ffffffff81f93280 T dc_dp_initialize_scrambling_data_symbols +ffffffff81f93320 T dp_is_cr_done +ffffffff81f93380 T dp_is_ch_eq_done +ffffffff81f93440 T dp_is_symbol_locked +ffffffff81f93500 T dp_is_interlane_aligned +ffffffff81f93530 T dp_hw_to_dpcd_lane_settings +ffffffff81f935f0 T dp_get_link_encoding_format +ffffffff81f93640 T dp_decide_lane_settings +ffffffff81f93a80 T dp_get_lane_status_and_lane_adjust +ffffffff81f93bc0 T dpcd_set_lane_settings +ffffffff81f93c00 T dp_is_max_vs_reached +ffffffff81f93c90 T dp_translate_training_aux_read_interval +ffffffff81f93cd0 T dp_get_cr_failure +ffffffff81f93d40 T dp_check_link_loss_status +ffffffff81f93de0 T dp_decide_training_settings +ffffffff81f94140 t decide_8b_10b_training_settings +ffffffff81f94450 T dp_convert_to_count +ffffffff81f944e0 T dc_link_dp_set_drive_settings +ffffffff81f94690 T dp_set_hw_lane_settings +ffffffff81f94840 T dc_link_dp_perform_link_training_skip_aux +ffffffff81f94c80 t override_training_settings +ffffffff81f94f30 T dp_set_hw_training_pattern +ffffffff81f94f90 T dp_set_hw_test_pattern +ffffffff81f950b0 t print_status_message +ffffffff81f95220 T dpcd_configure_lttpr_mode +ffffffff81f95400 T dpcd_configure_channel_coding +ffffffff81f95470 T dc_link_dp_perform_link_training +ffffffff81f977e0 T dp_set_fec_ready +ffffffff81f97960 t dp_perform_8b_10b_link_training +ffffffff81f97c40 T perform_link_training_with_retries +ffffffff81f98290 T dp_get_panel_mode +ffffffff81f98350 T dp_enable_link_phy +ffffffff81f983e0 T dp_set_panel_mode +ffffffff81f984f0 T dp_disable_link_phy +ffffffff81f985c0 t decide_fallback_link_setting +ffffffff81f98920 T dc_link_dp_sync_lt_begin +ffffffff81f98a00 T dc_link_dp_sync_lt_attempt +ffffffff81f98f30 t perform_clock_recovery_sequence +ffffffff81f994f0 t perform_channel_equalization_sequence +ffffffff81f99b70 T dc_link_dp_sync_lt_end +ffffffff81f99c60 T dc_link_dp_get_max_link_enc_cap +ffffffff81f99d50 T dp_get_max_link_cap +ffffffff81f99f40 T dp_is_lttpr_present +ffffffff81f99fb0 T hpd_rx_irq_check_link_loss_status +ffffffff81f9a0b0 T dp_verify_link_cap_with_retries +ffffffff81f9a7c0 T dp_validate_mode_timing +ffffffff81f9a880 T decide_edp_link_settings +ffffffff81f9a9c0 T decide_link_settings +ffffffff81f9ae00 t decide_edp_link_settings_with_dsc +ffffffff81f9b1a0 T dc_link_dp_allow_hpd_rx_irq +ffffffff81f9b1e0 T is_dp_branch_device +ffffffff81f9b210 T dc_link_dp_handle_automated_test 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dc_dmub_srv_p_state_delegate +ffffffff81fb5ed0 T dc_dmub_srv_query_caps_cmd +ffffffff81fb5fc0 T dc_dmub_srv_get_visual_confirm_color_cmd +ffffffff81fb6190 T dc_dmub_setup_subvp_dmub_command +ffffffff81fb6af0 T dc_dmub_srv_get_diagnostic_data +ffffffff81fb6b30 T dc_send_update_cursor_info_to_dmu +ffffffff81fb7000 T dc_edid_parser_send_cea +ffffffff81fb70b0 T dc_edid_parser_recv_cea_ack +ffffffff81fb7140 T dc_edid_parser_recv_amd_vsdb +ffffffff81fb8000 T generic_reg_update_ex +ffffffff81fb8370 t set_reg_field_values +ffffffff81fb8530 T generic_reg_set_ex +ffffffff81fb8780 T generic_reg_get +ffffffff81fb87f0 T generic_reg_get2 +ffffffff81fb8880 T generic_reg_get3 +ffffffff81fb8920 T generic_reg_get4 +ffffffff81fb89d0 T generic_reg_get5 +ffffffff81fb8aa0 T generic_reg_get6 +ffffffff81fb8b80 T generic_reg_get7 +ffffffff81fb8c80 T generic_reg_get8 +ffffffff81fb8d90 T generic_reg_wait +ffffffff81fb9000 T generic_write_indirect_reg +ffffffff81fb9050 T generic_read_indirect_reg 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hubp1_wait_pipe_read_start +ffffffff82013000 T dcn10_lock_all_pipes +ffffffff82013100 T dcn10_log_hw_state +ffffffff82014d10 T dcn10_did_underflow_occur +ffffffff82014db0 T dcn10_enable_power_gating_plane +ffffffff82014f50 T dcn10_disable_vga +ffffffff82015140 T dcn10_dpp_pg_control +ffffffff82015390 T dcn10_hubp_pg_control +ffffffff820155e0 T dcn10_bios_golden_init +ffffffff82015740 T dcn10_enable_stream_timing +ffffffff82015b30 T dcn10_verify_allow_pstate_change_high +ffffffff82015e90 T dcn10_plane_atomic_disconnect +ffffffff82015fc0 T dcn10_plane_atomic_power_down +ffffffff82016100 T dcn10_plane_atomic_disable +ffffffff82016260 T dcn10_disable_plane +ffffffff82016420 T dcn10_init_pipes +ffffffff82016b20 T dcn10_init_hw +ffffffff82017110 T dcn10_power_down_on_boot +ffffffff820172b0 T dcn10_reset_hw_ctx_wrap +ffffffff820175d0 T dcn10_update_plane_addr +ffffffff820176f0 T dcn10_set_input_transfer_func +ffffffff82017860 T dcn10_set_output_transfer_func +ffffffff82017920 T dcn10_pipe_control_lock +ffffffff820179f0 T dcn10_cursor_lock +ffffffff82017bb0 T dcn10_enable_vblanks_synchronization +ffffffff82018330 T dcn10_enable_timing_synchronization +ffffffff820186f0 T dcn10_enable_per_frame_crtc_position_reset +ffffffff820188d0 T dcn10_program_gamut_remap +ffffffff82018ad0 T dcn10_program_output_csc +ffffffff82018c00 T dcn10_update_visual_confirm_color +ffffffff82018d00 T dcn10_update_mpcc +ffffffff82018f80 T dcn10_blank_pixel_data +ffffffff820190c0 T dcn10_set_hdr_multiplier +ffffffff82019150 T dcn10_program_pipe +ffffffff82019d10 T dcn10_wait_for_pending_cleared +ffffffff82019e10 T dcn10_post_unlock_program_front_end +ffffffff8201a0c0 T dcn10_prepare_bandwidth +ffffffff8201a270 T dcn10_optimize_bandwidth +ffffffff8201a420 T dcn10_set_drr +ffffffff8201a520 T dcn10_get_position +ffffffff8201a5b0 T dcn10_set_static_screen_control +ffffffff8201a650 T dcn10_setup_stereo +ffffffff8201a7b0 T dcn10_wait_for_mpcc_disconnect +ffffffff8201a960 T dcn10_dummy_display_power_gating +ffffffff8201a990 T dcn10_update_pending_status +ffffffff8201aad0 T dcn10_update_dchub +ffffffff8201ab00 T dcn10_set_cursor_position +ffffffff8201b040 T dcn10_set_cursor_attribute +ffffffff8201b090 T dcn10_set_cursor_sdr_white_level +ffffffff8201b160 T dcn10_get_vupdate_offset_from_vsync +ffffffff8201b1f0 T dcn10_calc_vupdate_position +ffffffff8201b280 T dcn10_setup_periodic_interrupt +ffffffff8201b390 T dcn10_setup_vupdate_interrupt +ffffffff8201b450 T dcn10_unblank_stream +ffffffff8201b560 T dcn10_send_immediate_sdp_message +ffffffff8201b5c0 T dcn10_set_clock +ffffffff8201b6d0 T dcn10_get_clock +ffffffff8201b730 T dcn10_get_dcc_en_bits +ffffffff8201c000 T snprintf_count +ffffffff8201c090 T dcn10_clear_status_bits +ffffffff8201c240 T dcn10_get_hw_state +ffffffff8201e000 T dcn10_hw_sequencer_construct +ffffffff8201f000 T dcn10_ipp_construct +ffffffff8201f050 T dcn20_ipp_construct +ffffffff8201f0a0 t dcn10_ipp_destroy +ffffffff82020000 T dcn10_link_encoder_set_dp_phy_pattern_training_pattern +ffffffff820200b0 T dcn10_get_dig_frontend +ffffffff82020170 T enc1_configure_encoder +ffffffff820201f0 T dcn10_psr_program_dp_dphy_fast_training +ffffffff82020270 T dcn10_psr_program_secondary_packet +ffffffff820202f0 T dcn10_is_dig_enabled +ffffffff82020350 T dcn10_link_encoder_validate_dvi_output +ffffffff82020400 T dcn10_link_encoder_validate_dp_output +ffffffff82020440 T dcn10_link_encoder_construct +ffffffff82020630 T dcn10_link_encoder_validate_output_with_stream +ffffffff82020820 T dcn10_link_encoder_hw_init +ffffffff82020a20 T dcn10_aux_initialize +ffffffff82020ab0 T dcn10_link_encoder_destroy +ffffffff82020b00 T dcn10_link_encoder_setup +ffffffff82020c50 T dcn10_link_encoder_enable_tmds_output +ffffffff82020d40 T dcn10_link_encoder_enable_tmds_output_with_clk_pattern_wa +ffffffff82020e60 T dcn10_link_encoder_enable_dp_output +ffffffff82020fe0 T dcn10_link_encoder_enable_dp_mst_output +ffffffff82021160 T dcn10_link_encoder_disable_output +ffffffff82021340 T dcn10_link_encoder_dp_set_lane_settings +ffffffff820214e0 T dcn10_link_encoder_dp_set_phy_pattern +ffffffff82021c00 t set_dp_phy_pattern_hbr2_compliance_cp2520_2 +ffffffff82021e00 T dcn10_link_encoder_update_mst_stream_allocation_table +ffffffff820220e0 T dcn10_link_encoder_connect_dig_be_to_fe +ffffffff82022220 T dcn10_link_encoder_enable_hpd +ffffffff82022260 T dcn10_link_encoder_disable_hpd +ffffffff820222a0 T dcn10_get_dig_mode +ffffffff82022310 T dcn10_link_encoder_get_max_link_cap +ffffffff82022390 t program_pattern_symbols +ffffffff82023000 T mpc1_set_bg_color +ffffffff820231e0 T mpc1_get_mpcc +ffffffff82023270 T mpc1_update_stereo_mix +ffffffff820233a0 T mpc1_assert_idle_mpcc +ffffffff82023470 T mpc1_get_mpcc_for_dpp +ffffffff82023520 T mpc1_is_mpcc_idle +ffffffff82023610 T mpc1_assert_mpcc_idle_before_connect +ffffffff82023750 T mpc1_insert_plane +ffffffff82023ca0 T mpc1_remove_mpcc +ffffffff82024060 T mpc1_mpc_init +ffffffff82024380 T mpc1_mpc_init_single_inst +ffffffff82024570 T mpc1_init_mpcc_list_from_hw +ffffffff82024840 T mpc1_read_mpcc_state +ffffffff820249d0 T mpc1_cursor_lock +ffffffff82024a50 T mpc1_get_mpc_out_mux +ffffffff82024ad0 T dcn10_mpc_construct +ffffffff82024c50 t mpc1_update_blending +ffffffff82025000 T opp1_program_bit_depth_reduction +ffffffff82025400 T opp1_set_dyn_expansion +ffffffff82025570 T opp1_program_fmt +ffffffff82025870 T opp1_program_stereo +ffffffff820259a0 T opp1_pipe_clock_control +ffffffff820259e0 T opp1_destroy +ffffffff82025a30 T dcn10_opp_construct +ffffffff82026000 T optc1_program_global_sync +ffffffff82026150 T optc1_setup_vertical_interrupt0 +ffffffff820261e0 T optc1_setup_vertical_interrupt1 +ffffffff82026250 T optc1_setup_vertical_interrupt2 +ffffffff820262c0 T optc1_program_timing +ffffffff82026970 T optc1_is_two_pixels_per_containter +ffffffff820269c0 T optc1_set_vtg_params +ffffffff82026b00 T optc1_set_blank_data_double_buffer +ffffffff82026b40 T optc1_set_timing_double_buffer +ffffffff82026b80 T optc1_set_blank +ffffffff82026c60 T optc1_is_blanked +ffffffff82026ce0 T optc1_enable_optc_clock +ffffffff82026f00 T optc1_disable_crtc +ffffffff82026ff0 T optc1_program_blank_color +ffffffff820270a0 T optc1_validate_timing +ffffffff820271a0 T optc1_get_vblank_counter +ffffffff82027200 T optc1_lock +ffffffff820272f0 T optc1_unlock +ffffffff82027360 T optc1_get_position +ffffffff820273e0 T optc1_is_counter_moving +ffffffff82027460 T optc1_did_triggered_reset_occur +ffffffff82027500 T optc1_disable_reset_trigger +ffffffff820275c0 T optc1_enable_reset_trigger +ffffffff820276d0 T optc1_enable_crtc_reset +ffffffff82027830 T optc1_wait_for_state +ffffffff82027900 T optc1_set_early_control +ffffffff82027930 T optc1_set_static_screen_control +ffffffff820279d0 T optc1_set_drr +ffffffff82027c00 T optc1_set_vtotal_min_max +ffffffff82027ca0 T optc1_get_crtc_scanoutpos +ffffffff82027db0 T optc1_program_stereo +ffffffff82027fb0 T optc1_is_stereo_left_eye +ffffffff82028020 T optc1_get_hw_timing +ffffffff82028140 T optc1_read_otg_state +ffffffff82028450 T optc1_get_otg_active_size +ffffffff82028560 T optc1_clear_optc_underflow +ffffffff820285b0 T optc1_tg_init +ffffffff82028660 T optc1_is_tg_enabled +ffffffff820286d0 T optc1_is_optc_underflow_occurred +ffffffff82028740 T optc1_configure_crc +ffffffff820289d0 T optc1_get_crc +ffffffff82028ae0 T dcn10_timing_generator_init +ffffffff82028b50 t optc1_enable_crtc +ffffffff82028c50 t optc1_set_test_pattern +ffffffff82029330 t optc1_program_manual_trigger +ffffffff820293e0 t optc1_setup_manual_trigger +ffffffff8202a000 T dcn10_find_first_free_match_stream_enc_for_link +ffffffff8202a0b0 T dcn10_create_resource_pool +ffffffff8202b260 t dcn10_resource_construct_fp +ffffffff8202b3e0 t dcn10_resource_destruct +ffffffff8202b6f0 t dcn10_destroy_resource_pool +ffffffff8202b750 t dcn10_panel_cntl_create +ffffffff8202b7e0 t dcn10_link_encoder_create +ffffffff8202b8e0 t dcn10_validate_bandwidth +ffffffff8202b960 t dcn10_validate_global +ffffffff8202bb40 t dcn10_acquire_idle_pipe_for_layer +ffffffff8202bc80 t dcn10_validate_plane +ffffffff8202bcd0 t dcn10_add_stream_to_ctx +ffffffff8202be90 t dcn10_patch_unknown_plane_state +ffffffff8202bef0 t read_dce_straps +ffffffff8202bf20 t create_audio +ffffffff8202bf50 t dcn10_stream_encoder_create +ffffffff8202bff0 t dcn10_hwseq_create +ffffffff8202c0a0 t dcn10_get_dcc_compression_cap +ffffffff8202d000 T enc1_update_generic_info_packet +ffffffff8202d430 T enc1_stream_encoder_dp_set_stream_attribute +ffffffff8202d900 T enc1_stream_encoder_set_stream_attribute_helper +ffffffff8202d980 T enc1_stream_encoder_hdmi_set_stream_attribute +ffffffff8202df70 T enc1_stream_encoder_dvi_set_stream_attribute +ffffffff8202e100 T enc1_stream_encoder_set_throttled_vcp_size +ffffffff8202e320 T enc1_stream_encoder_update_dp_info_packets +ffffffff8202e4c0 T enc1_stream_encoder_send_immediate_sdp_message +ffffffff8202e8d0 T enc1_stream_encoder_stop_dp_info_packets +ffffffff8202eaa0 T enc1_stream_encoder_dp_blank +ffffffff8202ec10 T enc1_stream_encoder_dp_unblank +ffffffff8202ee20 T enc1_stream_encoder_set_avmute +ffffffff8202ee60 T enc1_reset_hdmi_stream_attribute +ffffffff8202ef30 T get_audio_clock_info +ffffffff8202f020 T enc1_se_enable_audio_clock +ffffffff8202f080 T enc1_se_enable_dp_audio +ffffffff8202f150 T enc1_se_audio_mute_control +ffffffff8202f1a0 T enc1_se_dp_audio_setup +ffffffff8202f1b0 t enc1_se_audio_setup +ffffffff8202f340 T enc1_se_dp_audio_enable +ffffffff8202f590 T enc1_se_dp_audio_disable +ffffffff8202f700 T enc1_se_hdmi_audio_setup +ffffffff8202fbd0 T enc1_se_hdmi_audio_disable +ffffffff8202fc60 T enc1_setup_stereo_sync +ffffffff8202fce0 T enc1_dig_connect_to_otg +ffffffff8202fd20 T enc1_dig_source_otg +ffffffff8202fd90 T enc1_stream_encoder_dp_get_pixel_format +ffffffff8202fe80 T dcn10_stream_encoder_construct +ffffffff8202fee0 t enc1_stream_encoder_update_hdmi_info_packets +ffffffff82030290 t enc1_stream_encoder_stop_hdmi_info_packets +ffffffff82031000 T dccg2_update_dpp_dto +ffffffff82031160 T dccg2_get_dccg_ref_freq +ffffffff82031220 T dccg2_set_fifo_errdet_ovr_en +ffffffff82031260 T dccg2_otg_add_pixel +ffffffff82031300 T dccg2_otg_drop_pixel +ffffffff820313a0 T dccg2_init +ffffffff820313d0 T dccg2_create +ffffffff82031480 T dcn_dccg_destroy +ffffffff82032000 T dpp20_read_state +ffffffff820321d0 T dpp2_power_on_obuf +ffffffff820322a0 T dpp2_dummy_program_input_lut +ffffffff820322d0 T dscl2_calc_lb_num_partitions +ffffffff820323f0 T dpp2_cnv_set_alpha_keyer +ffffffff82032670 T dpp2_set_cursor_attributes +ffffffff820327d0 T oppn20_dummy_program_regamma_pwl +ffffffff82032800 T dpp2_construct +ffffffff82032880 t dpp2_cnv_setup +ffffffff82034000 T dpp2_set_degamma_pwl +ffffffff820343b0 T dpp2_set_degamma +ffffffff82034560 T dpp2_cm_set_gamut_remap +ffffffff82034790 T dpp2_program_input_csc +ffffffff820349c0 T dpp20_program_blnd_lut +ffffffff82035110 T dpp20_program_shaper +ffffffff820370a0 T dpp20_program_3dlut +ffffffff820377a0 t dpp20_set3dlut_ram12 +ffffffff82037970 T dpp2_set_hdr_multiplier +ffffffff82038000 t dsc2_get_enc_caps +ffffffff82038080 t dsc2_read_state +ffffffff82038230 t dsc2_validate_stream +ffffffff82038290 t dsc2_set_config +ffffffff82039620 t dsc2_get_packed_pps +ffffffff820397c0 t dsc2_enable +ffffffff82039970 t dsc2_disable +ffffffff82039af0 t dsc2_disconnect +ffffffff82039b60 T dsc2_construct +ffffffff82039bb0 t dsc_prepare_config +ffffffff8203a270 t dsc_log_pps +ffffffff8203b000 T dwb2_config_dwb_cnv +ffffffff8203b1f0 T dwb2_disable +ffffffff8203b300 T dwb2_is_enabled +ffffffff8203b3a0 T dwb2_set_stereo +ffffffff8203b490 T dwb2_set_new_content +ffffffff8203b500 T dwb2_set_scaler +ffffffff8203b890 t dwb2_get_caps +ffffffff8203b970 t dwb2_enable +ffffffff8203bad0 t dwb2_update +ffffffff8203bc30 t dwb2_set_warmup +ffffffff8203bda0 T dcn20_dwbc_construct +ffffffff8203c000 T dwb_program_horz_scalar +ffffffff8203c4c0 t wbscl_get_filter_coeffs_16p +ffffffff8203c990 t wbscl_set_scaler_filter +ffffffff8203cba0 T dwb_program_vert_scalar +ffffffff8203e000 T hubbub2_dcc_support_swizzle +ffffffff8203e0c0 T hubbub2_dcc_support_pixel_format +ffffffff8203e110 T hubbub2_get_dcc_compression_cap +ffffffff8203e350 T hubbub2_init_vm_ctx +ffffffff8203e4a0 T hubbub2_init_dchub_sys_ctx +ffffffff8203e6f0 T hubbub2_update_dchub +ffffffff8203e8f0 T hubbub2_wm_read_state +ffffffff8203ec80 T hubbub2_get_dchub_ref_freq +ffffffff8203ed60 T hubbub2_read_state +ffffffff8203eeb0 T hubbub2_construct +ffffffff8203ef10 t hubbub2_program_watermarks +ffffffff82040000 T hubp2_set_vm_system_aperture_settings +ffffffff820401e0 T hubp2_program_deadline +ffffffff82040930 T hubp2_vready_at_or_After_vsync +ffffffff820409d0 T hubp2_setup_interdependent +ffffffff82040e40 T hubp2_program_size +ffffffff82040fd0 T hubp2_program_rotation +ffffffff82041140 T hubp2_dcc_control +ffffffff82041200 T hubp2_program_pixel_format +ffffffff820417d0 T hubp2_program_surface_config +ffffffff82041a10 T hubp2_get_lines_per_chunk +ffffffff82041ad0 T hubp2_cursor_set_attributes +ffffffff82041e90 T hubp2_dmdata_set_attributes +ffffffff82042270 T hubp2_dmdata_load +ffffffff82042300 T hubp2_dmdata_status_done +ffffffff82042370 T hubp2_program_surface_flip_and_addr +ffffffff82042ac0 T hubp2_enable_triplebuffer +ffffffff82042b90 T hubp2_is_triplebuffer_enabled +ffffffff82042c10 T hubp2_set_flip_control_surface_gsl +ffffffff82042c60 T hubp2_is_flip_pending +ffffffff82042d70 T hubp2_set_blank +ffffffff82042dd0 T hubp2_set_blank_regs +ffffffff82042ed0 T hubp2_cursor_set_position +ffffffff820432f0 T hubp2_clk_cntl +ffffffff82043340 T hubp2_vtg_sel +ffffffff82043380 T hubp2_clear_underflow +ffffffff820433d0 T hubp2_read_state_common +ffffffff82043fd0 T hubp2_read_state +ffffffff820442a0 T hubp2_construct +ffffffff82044310 t hubp2_setup +ffffffff820447c0 t hubp2_validate_dml_output +ffffffff82046000 T dcn20_set_flip_control_gsl +ffffffff82046050 T dcn20_enable_power_gating_plane +ffffffff82046410 T dcn20_dccg_init +ffffffff82046490 T dcn20_disable_vga +ffffffff82046550 T dcn20_program_triple_buffer +ffffffff820465a0 T dcn20_init_blank +ffffffff82046790 T dcn20_dsc_pg_control +ffffffff82046ba0 T dcn20_dpp_pg_control +ffffffff82046e50 T dcn20_hubp_pg_control +ffffffff82047100 T dcn20_plane_atomic_disable +ffffffff82047250 t dcn20_setup_gsl_group_as_lock +ffffffff820474d0 T dcn20_disable_plane +ffffffff82047670 T dcn20_disable_pixel_data +ffffffff82047690 T dcn20_blank_pixel_data +ffffffff82047870 T dcn20_enable_stream_timing +ffffffff82047e50 T dcn20_program_output_csc +ffffffff82047f40 T dcn20_set_output_transfer_func +ffffffff820480b0 T dcn20_set_blend_lut +ffffffff82048120 T dcn20_set_shaper_3dlut +ffffffff820481e0 T dcn20_set_input_transfer_func +ffffffff820483a0 T dcn20_update_odm +ffffffff82048490 T dcn20_pipe_control_lock +ffffffff820487d0 T dcn20_program_front_end_for_ctx +ffffffff820493a0 t dcn20_program_pipe +ffffffff82049e40 T dcn20_post_unlock_program_front_end +ffffffff8204a1d0 T dcn20_prepare_bandwidth +ffffffff8204a320 T dcn20_optimize_bandwidth +ffffffff8204a500 T dcn20_update_bandwidth +ffffffff8204a7c0 T dcn20_enable_writeback +ffffffff8204a910 T dcn20_disable_writeback +ffffffff8204a9a0 T dcn20_wait_for_blank_complete +ffffffff8204aa30 T dcn20_dmdata_status_done +ffffffff8204aa80 T dcn20_disable_stream_gating +ffffffff8204ab30 T dcn20_enable_stream_gating +ffffffff8204abd0 T dcn20_set_dmdata_attributes +ffffffff8204ac90 T dcn20_init_vm_ctx +ffffffff8204ad50 T dcn20_init_sys_ctx +ffffffff8204ae00 T dcn20_update_plane_addr +ffffffff8204af40 T dcn20_unblank_stream +ffffffff8204b0c0 T dcn20_setup_vupdate_interrupt +ffffffff8204b130 T dcn20_reset_hw_ctx_wrap +ffffffff8204b4d0 T dcn20_update_visual_confirm_color +ffffffff8204b5e0 T dcn20_update_mpcc +ffffffff8204b860 T dcn20_enable_stream +ffffffff8204ba30 T dcn20_program_dmdata_engine +ffffffff8204bad0 T dcn20_fpga_init_hw +ffffffff8204c0d0 T dcn20_optimize_timing_for_fsft +ffffffff8204c110 T dcn20_set_disp_pattern_generator +ffffffff8204d000 T dcn20_hw_sequencer_construct +ffffffff8204e000 T enc2_fec_set_enable +ffffffff8204e090 T enc2_fec_set_ready +ffffffff8204e0d0 T enc2_fec_is_active +ffffffff8204e140 T link_enc2_read_state +ffffffff8204e1f0 T dcn20_link_encoder_enable_dp_output +ffffffff8204e300 T dcn20_link_encoder_get_max_link_cap +ffffffff8204e3b0 T dcn20_link_encoder_is_in_alt_mode +ffffffff8204e430 T enc2_hw_init +ffffffff8204e510 T dcn20_link_encoder_construct +ffffffff8204f000 T mmhubbub2_config_mcif_irq +ffffffff8204f130 T mmhubbub2_enable_mcif +ffffffff8204f170 T mmhubbub2_disable_mcif +ffffffff8204f1b0 T mcifwb2_dump_frame +ffffffff8204f2c0 t mmhubbub2_config_mcif_buf +ffffffff8204f910 t mmhubbub2_config_mcif_arb +ffffffff8204fd20 T dcn20_mmhubbub_construct +ffffffff82050000 T mpc2_update_blending +ffffffff820502a0 T mpc2_set_denorm +ffffffff82050310 T mpc2_set_denorm_clamp +ffffffff82050460 T mpc2_set_output_csc +ffffffff82050650 T mpc2_set_ocsc_default +ffffffff82050830 T mpc20_power_on_ogam_lut +ffffffff820508b0 T mpc2_set_output_gamma +ffffffff82051070 T mpc2_assert_idle_mpcc +ffffffff82051180 T mpc2_assert_mpcc_idle_before_connect +ffffffff820513d0 t mpc2_get_mpcc_for_dpp +ffffffff82051490 T dcn20_mpc_construct +ffffffff82052000 T opp2_set_disp_pattern_generator +ffffffff82052810 T opp2_dpg_set_blank_color +ffffffff82052990 T opp2_program_dpg_dimensions +ffffffff82052a20 T opp2_dpg_is_blanked +ffffffff82052ae0 T opp2_program_left_edge_extra_pixel +ffffffff82052b30 T dcn20_opp_construct +ffffffff82053000 T optc2_enable_crtc +ffffffff82053100 T optc2_set_gsl +ffffffff820531f0 T optc2_set_gsl_source_select +ffffffff820532b0 T optc2_set_dsc_config +ffffffff82053380 T optc2_get_dsc_status +ffffffff820533c0 T optc2_is_two_pixels_per_containter +ffffffff820533d0 T optc2_set_odm_bypass +ffffffff82053510 T optc2_set_odm_combine +ffffffff82053700 T optc2_get_optc_source +ffffffff820537d0 T optc2_triplebuffer_lock +ffffffff820538f0 T optc2_triplebuffer_unlock +ffffffff820539a0 T optc2_lock_doublebuffer_enable +ffffffff82053b80 T optc2_lock_doublebuffer_disable +ffffffff82053c60 T optc2_setup_manual_trigger +ffffffff82053d80 T optc2_program_manual_trigger +ffffffff82053df0 T optc2_configure_crc +ffffffff82053e80 T optc2_get_last_used_drr_vtotal +ffffffff82053ec0 T dcn20_timing_generator_init +ffffffff82053f30 t optc2_set_dwb_source +ffffffff82053fc0 t optc2_align_vblanks +ffffffff82055000 T dcn20_dpp_destroy +ffffffff82055050 T dcn20_dpp_create +ffffffff82055120 T dcn20_ipp_create +ffffffff820551e0 T dcn20_opp_create +ffffffff820552a0 T dcn20_aux_engine_create +ffffffff82055340 T dcn20_i2c_hw_create +ffffffff820553d0 T dcn20_mpc_create +ffffffff82055460 T dcn20_hubbub_create +ffffffff82055530 T dcn20_timing_generator_create +ffffffff820555d0 T dcn20_link_encoder_create +ffffffff820556d0 T dcn20_stream_encoder_create +ffffffff82055790 T dcn20_hwseq_create +ffffffff82055800 T dcn20_clock_source_destroy +ffffffff82055850 T dcn20_dsc_create +ffffffff82055910 T dcn20_dsc_destroy +ffffffff82055960 T dcn20_hubp_create +ffffffff82055a30 T dcn20_build_mapped_resource +ffffffff82055c50 T dcn20_acquire_dsc +ffffffff82055d90 T dcn20_release_dsc +ffffffff82055e00 T dcn20_add_dsc_to_stream_resource +ffffffff82055f50 T dcn20_add_stream_to_ctx +ffffffff820560e0 T dcn20_remove_stream_from_ctx +ffffffff820561e0 T dcn20_split_stream_for_odm +ffffffff82056690 T dcn20_split_stream_for_mpc +ffffffff82056810 T dcn20_calc_max_scaled_time +ffffffff82056890 T dcn20_set_mcif_arb_params +ffffffff82056a00 T dcn20_validate_dsc +ffffffff82056b90 T dcn20_find_secondary_pipe +ffffffff82056d70 T dcn20_merge_pipes_for_validate +ffffffff82057010 T dcn20_validate_apply_pipe_split_flags +ffffffff82057800 T dcn20_fast_validate_bw +ffffffff82057d10 T dcn20_validate_bandwidth +ffffffff82057d90 T dcn20_acquire_idle_pipe_for_layer +ffffffff82057ea0 T dcn20_get_dcc_compression_cap +ffffffff82057ed0 T dcn20_patch_unknown_plane_state +ffffffff82057f30 T dcn20_dwbc_create +ffffffff82058050 T dcn20_mmhubbub_create +ffffffff820581b0 T dcn20_create_resource_pool +ffffffff82059a00 t dcn20_resource_destruct +ffffffff82059ea0 t dcn20_destroy_resource_pool +ffffffff82059f00 t dcn20_panel_cntl_create +ffffffff82059f90 t read_dce_straps +ffffffff82059fc0 t dcn20_create_audio +ffffffff8205a000 T enc2_set_dynamic_metadata +ffffffff8205a280 T enc2_stream_encoder_dp_unblank +ffffffff8205a5b0 T enc2_stream_encoder_dp_set_stream_attribute +ffffffff8205a610 T enc2_get_fifo_cal_average_level +ffffffff8205a670 T dcn20_stream_encoder_construct +ffffffff8205a6d0 t enc2_stream_encoder_update_hdmi_info_packets +ffffffff8205a7a0 t enc2_stream_encoder_stop_hdmi_info_packets +ffffffff8205aaa0 t enc2_stream_encoder_update_dp_info_packets +ffffffff8205ab50 t enc2_read_state +ffffffff8205acd0 t enc2_dp_set_dsc_config +ffffffff8205ada0 t enc2_dp_set_dsc_pps_info_packet +ffffffff8205b270 t enc2_dp_set_odm_combine +ffffffff8205b2b0 t enc2_update_hdmi_info_packet +ffffffff8205c000 T dcn20_vmid_setup +ffffffff8205d000 T dccg201_create +ffffffff8205d0b0 t dccg201_update_dpp_dto +ffffffff8205e000 T dpp201_construct +ffffffff8205e080 t dpp201_get_optimal_number_of_taps +ffffffff8205e460 t dpp201_cnv_setup +ffffffff8205f000 T hubbub201_construct +ffffffff8205f060 t hubbub201_program_watermarks +ffffffff82060000 T dcn201_hubp_construct +ffffffff82060070 t hubp201_setup +ffffffff82060360 t hubp201_program_surface_config +ffffffff82061000 T dcn201_update_plane_addr +ffffffff820612a0 T dcn201_init_blank +ffffffff820613e0 T dcn201_init_hw +ffffffff82061ca0 T dcn201_plane_atomic_disconnect +ffffffff82061e10 T dcn201_update_mpcc +ffffffff820620b0 T dcn201_pipe_control_lock +ffffffff820621b0 T dcn201_set_cursor_attribute +ffffffff82062240 T dcn201_set_dmdata_attributes +ffffffff82062350 T dcn201_unblank_stream +ffffffff82063000 T dcn201_hw_sequencer_construct +ffffffff82064000 T dcn201_link_encoder_construct +ffffffff820641a0 t dcn201_link_encoder_is_in_alt_mode +ffffffff82064210 t dcn201_link_encoder_get_max_link_cap +ffffffff82065000 t mpc201_set_out_rate_control +ffffffff82065130 T dcn201_mpc_construct +ffffffff82066000 T dcn201_opp_construct +ffffffff82067000 T optc201_is_two_pixels_per_containter +ffffffff82067010 T dcn201_timing_generator_init +ffffffff82067080 t optc201_validate_timing +ffffffff82067180 t optc201_triplebuffer_unlock +ffffffff82067230 t optc201_triplebuffer_lock +ffffffff82067350 t optc201_get_optc_source +ffffffff82068000 T dcn201_create_resource_pool +ffffffff82068a40 t dcn201_resource_destruct +ffffffff82068d30 t dcn201_destroy_resource_pool +ffffffff82068d90 t dcn201_link_init +ffffffff82068de0 t dcn201_link_encoder_create +ffffffff82068ea0 t dcn201_acquire_idle_pipe_for_layer +ffffffff82068fb0 t dcn201_populate_dml_writeback_from_context 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hubp21_program_surface_flip_and_addr +ffffffff8206e390 t hubp21_set_vm_system_aperture_settings +ffffffff8206e4c0 t hubp21_init +ffffffff8206e4f0 t hubp21_validate_dml_output +ffffffff82070000 T dcn21_init_sys_ctx +ffffffff82070110 T dcn21_s0i3_golden_init_wa +ffffffff82070170 T dcn21_exit_optimized_pwr_state +ffffffff82070190 T dcn21_optimize_pwr_state +ffffffff820701c0 T dcn21_PLAT_58856_wa +ffffffff82070220 T dcn21_set_abm_immediate_disable +ffffffff82070340 T dcn21_set_pipe +ffffffff82070450 T dcn21_set_backlight_level +ffffffff82070620 T dcn21_is_abm_supported +ffffffff82071000 T dcn21_hw_sequencer_construct +ffffffff82072000 T dcn21_link_encoder_enable_dp_output +ffffffff82072140 t dcn21_link_encoder_acquire_phy +ffffffff82072320 T dcn21_link_encoder_construct +ffffffff82072510 t dcn21_link_encoder_enable_dp_mst_output +ffffffff82072580 t dcn21_link_encoder_disable_output +ffffffff82073000 T dcn21_fast_validate_bw +ffffffff82073660 T dcn21_create_resource_pool +ffffffff820749c0 t dcn21_resource_destruct +ffffffff82074e60 t dcn21_destroy_resource_pool +ffffffff82074ec0 t dcn21_panel_cntl_create +ffffffff82074f50 t dcn21_link_encoder_create +ffffffff82075050 t dcn21_validate_bandwidth +ffffffff820750e0 t dcn21_patch_unknown_plane_state +ffffffff82075130 t dcn21_get_panel_config_defaults +ffffffff820751a0 t read_dce_straps +ffffffff820751d0 t dcn21_create_audio +ffffffff82075200 t dcn21_stream_encoder_create +ffffffff820752a0 t dcn21_hwseq_create +ffffffff82076000 T afmt3_setup_hdmi_audio +ffffffff820761d0 T afmt3_se_audio_setup +ffffffff82076390 T afmt3_audio_mute_control +ffffffff82076400 T afmt3_audio_info_immediate_update +ffffffff82076440 T afmt3_setup_dp_audio +ffffffff82076530 T afmt3_construct +ffffffff82077000 T cm_helper_program_gamcor_xfer_func +ffffffff820773a0 T cm3_helper_translate_curve_to_hw_format +ffffffff82077fa0 T cm3_helper_convert_to_custom_float +ffffffff820783f0 T cm3_helper_translate_curve_to_degamma_hw_format +ffffffff82078c60 T is_rgb_equal +ffffffff82079000 T dccg3_create +ffffffff820790b0 T dccg30_create +ffffffff8207a000 T dcn30_link_encoder_validate_output_with_stream +ffffffff8207a010 T dcn30_link_encoder_construct +ffffffff8207a230 T enc3_hw_init +ffffffff8207b000 T enc3_stream_encoder_update_hdmi_info_packets +ffffffff8207b100 t enc3_update_hdmi_info_packet +ffffffff8207b4f0 T enc3_stream_encoder_stop_hdmi_info_packets +ffffffff8207bab0 T enc3_dp_set_dsc_pps_info_packet +ffffffff8207bdd0 T enc3_stream_encoder_update_dp_info_packets +ffffffff8207c010 T enc3_audio_mute_control +ffffffff8207c080 T enc3_se_dp_audio_setup +ffffffff8207c100 T enc3_se_dp_audio_enable +ffffffff8207c1f0 T enc3_se_hdmi_audio_setup +ffffffff8207c500 T dcn30_dio_stream_encoder_construct +ffffffff8207c570 t enc3_stream_encoder_hdmi_set_stream_attribute +ffffffff8207cb60 t enc3_stream_encoder_dvi_set_stream_attribute +ffffffff8207cd60 t enc3_read_state +ffffffff8207cef0 t enc3_dp_set_dsc_config +ffffffff8207cfc0 t enc3_dp_set_odm_combine +ffffffff8207d000 T dpp30_read_state +ffffffff8207d050 T dpp3_program_post_csc +ffffffff8207d230 T dpp3_set_pre_degam +ffffffff8207d2e0 T dpp3_cnv_setup +ffffffff8207dba0 T dpp3_set_cursor_attributes +ffffffff8207dd20 T dpp3_get_optimal_number_of_taps +ffffffff8207e790 T dpp3_construct +ffffffff8207e7f0 t dpp3_deferred_update +ffffffff8207ebc0 t dpp3_program_blnd_lut +ffffffff8207f630 t dpp3_program_shaper +ffffffff82081680 t dpp3_program_3dlut +ffffffff82081e50 t dpp3_set3dlut_ram12 +ffffffff82083000 T dpp3_program_cm_dealpha +ffffffff820830a0 T dpp3_program_cm_bias +ffffffff82083190 T dpp3_program_gamcor_lut +ffffffff82083bd0 t dpp3_power_on_gamcor_lut +ffffffff82083d00 T dpp3_set_hdr_multiplier +ffffffff82083d50 T dpp3_cm_set_gamut_remap +ffffffff82084000 T dwb3_config_fc +ffffffff820841b0 T dwb3_set_stereo +ffffffff82084270 T dwb3_enable +ffffffff820843a0 T dwb3_set_denorm +ffffffff820844c0 T dwb3_disable +ffffffff82084570 T dwb3_update +ffffffff820846a0 T dwb3_is_enabled +ffffffff82084740 T dwb3_set_new_content +ffffffff82084780 t dwb3_get_caps +ffffffff82084820 T dcn30_dwbc_construct +ffffffff82084870 T dwb3_set_host_read_rate_control +ffffffff82085000 T dwb3_ogam_set_input_transfer_func +ffffffff820859d0 T dwb3_set_gamut_remap +ffffffff82085b30 t dwb3_program_gamut_remap +ffffffff82085cc0 T dwb3_program_hdr_mult +ffffffff82086000 T hubbub3_init_dchub_sys_ctx +ffffffff820861e0 T hubbub3_program_watermarks +ffffffff820862f0 T hubbub3_dcc_support_swizzle +ffffffff820863c0 T hubbub3_get_dcc_compression_cap +ffffffff820865b0 T hubbub3_force_wm_propagate_to_pipes +ffffffff82086660 T hubbub3_force_pstate_change_control +ffffffff820866e0 T hubbub3_init_watermarks +ffffffff82086a20 T hubbub3_construct +ffffffff82087000 T hubp3_set_vm_system_aperture_settings +ffffffff82087130 T hubp3_program_surface_flip_and_addr +ffffffff82087b60 T hubp3_dcc_control +ffffffff82087c20 T hubp3_dcc_control_sienna_cichlid +ffffffff82087d30 T hubp3_dmdata_set_attributes +ffffffff82087f30 T hubp3_program_surface_config +ffffffff82088230 T hubp3_read_state +ffffffff820884a0 T hubp3_setup +ffffffff82088530 T hubp3_init +ffffffff82088560 T hubp3_construct +ffffffff82089000 T dcn30_set_blend_lut +ffffffff82089070 T dcn30_set_input_transfer_func +ffffffff820891d0 T dcn30_set_output_transfer_func +ffffffff820894f0 T dcn30_update_writeback +ffffffff82089580 t dcn30_set_writeback +ffffffff82089730 T dcn30_mmhubbub_warmup +ffffffff820899e0 T dcn30_enable_writeback +ffffffff82089ab0 T dcn30_disable_writeback +ffffffff82089b90 T dcn30_program_all_writeback_pipes_in_tree +ffffffff82089e80 T dcn30_init_hw +ffffffff8208a770 T dcn30_set_avmute +ffffffff8208a7d0 T dcn30_update_info_frame +ffffffff8208a8a0 T dcn30_program_dmdata_engine +ffffffff8208a940 T dcn30_apply_idle_power_optimizations +ffffffff8208aec0 T dcn30_does_plane_fit_in_mall +ffffffff8208af70 T dcn30_hardware_release +ffffffff8208b080 T dcn30_set_disp_pattern_generator +ffffffff8208b0f0 T dcn30_prepare_bandwidth +ffffffff8208c000 T dcn30_hw_sequencer_construct +ffffffff8208d000 t mmhubbub3_warmup_mcif +ffffffff8208d210 t mmhubbub3_config_mcif_buf +ffffffff8208d6c0 t mmhubbub3_config_mcif_arb +ffffffff8208db10 T dcn30_mmhubbub_construct +ffffffff8208e000 T mpc3_is_dwb_idle +ffffffff8208e070 T mpc3_set_dwb_mux +ffffffff8208e0f0 T mpc3_disable_dwb_mux +ffffffff8208e170 T mpc3_set_out_rate_control +ffffffff8208e280 T mpc3_get_ogam_current +ffffffff8208e320 T mpc3_power_on_ogam_lut +ffffffff8208e3f0 T mpc3_set_output_gamma +ffffffff8208ef90 T mpc3_set_denorm +ffffffff8208f000 T mpc3_set_denorm_clamp +ffffffff8208f150 T mpc3_program_shaper +ffffffff820913c0 t mpc3_power_on_shaper_3dlut +ffffffff82091740 T mpc3_init_mpcc +ffffffff820917c0 T mpc3_set_gamut_remap +ffffffff82091a10 T mpc3_program_3dlut +ffffffff820921a0 t mpc3_set3dlut_ram12 +ffffffff82092380 T mpc3_set_output_csc +ffffffff820924f0 T mpc3_set_ocsc_default +ffffffff82092660 T mpc3_set_rmu_mux +ffffffff82092700 T mpc3_get_rmu_mux_status +ffffffff820927b0 T mpcc3_acquire_rmu +ffffffff82092910 t mpcc3_release_rmu +ffffffff82092a80 t mpc3_set_mpc_mem_lp_mode +ffffffff82092c10 T dcn30_mpc_construct +ffffffff82093000 T optc3_triplebuffer_lock +ffffffff82093120 T optc3_lock_doublebuffer_enable +ffffffff820933b0 T optc3_lock_doublebuffer_disable +ffffffff820934c0 T optc3_lock +ffffffff82093590 T optc3_set_out_mux +ffffffff820935d0 T optc3_program_blank_color +ffffffff82093710 T optc3_set_drr_trigger_window +ffffffff820937a0 T optc3_set_vtotal_change_limit +ffffffff82093810 T optc3_set_dsc_config +ffffffff82093860 T optc3_set_odm_bypass +ffffffff820939e0 T optc3_wait_drr_doublebuffer_pending_clear +ffffffff82093a60 T optc3_set_vtotal_min_max +ffffffff82093a80 T optc3_tg_init +ffffffff82093ae0 T dcn30_timing_generator_init +ffffffff82093b50 t optc3_set_odm_combine +ffffffff82094000 T dcn30_add_stream_to_ctx +ffffffff82094020 T dcn30_populate_dml_pipes_from_context +ffffffff82094110 T dcn30_populate_dml_writeback_from_context +ffffffff82094170 T dcn30_calc_max_scaled_time +ffffffff820941d0 T dcn30_set_mcif_arb_params +ffffffff82094340 T dcn30_acquire_post_bldn_3dlut +ffffffff820944c0 T dcn30_release_post_bldn_3dlut +ffffffff82094570 T dcn30_internal_validate_bw +ffffffff82095350 t dcn30_split_stream_for_mpc_or_odm +ffffffff82095670 T dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff82095790 T dcn30_setup_mclk_switch_using_fw_based_vblank_stretch +ffffffff82095830 T dcn30_update_soc_for_wm_a +ffffffff82095880 T dcn30_calculate_wm_and_dlg +ffffffff820958f0 T dcn30_validate_bandwidth +ffffffff82095d20 T dcn30_update_bw_bounding_box +ffffffff82096500 T dcn30_create_resource_pool +ffffffff82097ac0 t dcn30_resource_destruct +ffffffff82098030 t dcn30_destroy_resource_pool +ffffffff82098090 t dcn30_panel_cntl_create +ffffffff82098120 t dcn30_link_encoder_create +ffffffff820981e0 t read_dce_straps +ffffffff82098210 t dcn30_create_audio +ffffffff82098240 t dcn30_stream_encoder_create +ffffffff820983c0 t dcn30_hwseq_create +ffffffff82099000 T vpg3_update_generic_info_packet +ffffffff820999a0 T vpg3_construct +ffffffff8209a000 T dccg301_create +ffffffff8209b000 T dcn301_link_encoder_construct +ffffffff8209c000 T hubbub301_construct +ffffffff8209d000 T dcn301_hw_sequencer_construct +ffffffff8209e000 T dcn301_panel_cntl_construct +ffffffff8209e050 t dcn301_panel_cntl_destroy +ffffffff8209e0a0 t dcn301_panel_cntl_hw_init +ffffffff8209e2b0 t dcn301_is_panel_backlight_on +ffffffff8209e310 t dcn301_is_panel_powered_on +ffffffff8209e3c0 t dcn301_store_backlight_level +ffffffff8209e460 t dcn301_get_16_bit_backlight_from_pwm +ffffffff8209f000 T dcn301_create_resource_pool +ffffffff820a05a0 t dcn301_destruct +ffffffff820a0ae0 t dcn301_destroy_resource_pool +ffffffff820a0b40 t dcn301_panel_cntl_create +ffffffff820a0bd0 t dcn301_link_encoder_create +ffffffff820a0c90 t dcn301_calculate_wm_and_dlg +ffffffff820a0d00 t read_dce_straps +ffffffff820a0d30 t dcn301_create_audio +ffffffff820a0d60 t dcn301_stream_encoder_create +ffffffff820a0ee0 t dcn301_hwseq_create +ffffffff820a1000 T dcn302_dpp_pg_control +ffffffff820a12a0 T dcn302_hubp_pg_control +ffffffff820a1550 T dcn302_dsc_pg_control +ffffffff820a2000 T dcn302_hw_sequencer_construct +ffffffff820a3000 T dcn302_update_bw_bounding_box +ffffffff820a3050 T dcn302_create_resource_pool +ffffffff820a43e0 t dcn302_resource_destruct +ffffffff820a48f0 t dcn302_destroy_resource_pool +ffffffff820a4940 t dcn302_panel_cntl_create +ffffffff820a49d0 t dcn302_link_encoder_create +ffffffff820a4a90 t read_dce_straps +ffffffff820a4ac0 t dcn302_create_audio +ffffffff820a4af0 t dcn302_stream_encoder_create +ffffffff820a4c70 t dcn302_hwseq_create +ffffffff820a5000 T dcn303_dpp_pg_control +ffffffff820a5030 T dcn303_hubp_pg_control +ffffffff820a5060 T dcn303_dsc_pg_control +ffffffff820a5090 T dcn303_enable_power_gating_plane +ffffffff820a6000 T dcn303_hw_sequencer_construct +ffffffff820a7000 T dcn303_update_bw_bounding_box +ffffffff820a7050 T dcn303_create_resource_pool +ffffffff820a8290 t dcn303_resource_destruct +ffffffff820a87b0 t dcn303_destroy_resource_pool +ffffffff820a8800 t dcn303_panel_cntl_create +ffffffff820a8890 t dcn303_link_encoder_create +ffffffff820a8950 t read_dce_straps +ffffffff820a8980 t dcn303_create_audio +ffffffff820a89b0 t dcn303_stream_encoder_create +ffffffff820a8b30 t dcn303_hwseq_create +ffffffff820a9000 T afmt31_powerdown +ffffffff820a9090 T afmt31_poweron +ffffffff820a9120 T afmt31_construct +ffffffff820aa000 T apg31_construct +ffffffff820aa050 t apg31_se_audio_setup +ffffffff820aa160 t apg31_audio_mute_control +ffffffff820aa1a0 t apg31_enable +ffffffff820aa2b0 t apg31_disable +ffffffff820ab000 T dccg31_update_dpp_dto +ffffffff820ab1c0 T dccg31_set_dpstreamclk +ffffffff820ab350 t dccg31_disable_dpstreamclk +ffffffff820ab4a0 T dccg31_enable_symclk32_se +ffffffff820ab790 T dccg31_disable_symclk32_se +ffffffff820aba60 T dccg31_enable_symclk32_le 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dcn31_hpo_dp_link_enc_enable +ffffffff820b0160 T dcn31_hpo_dp_link_enc_disable +ffffffff820b01d0 T dcn31_hpo_dp_link_enc_set_link_test_pattern +ffffffff820b0b00 T dcn31_hpo_dp_link_enc_update_stream_allocation_table +ffffffff820b0d90 T dcn31_hpo_dp_link_enc_set_throttled_vcp_size +ffffffff820b1030 T dcn31_hpo_dp_link_enc_read_state +ffffffff820b12e0 T dcn31_hpo_dp_link_enc_enable_dp_output +ffffffff820b13e0 T dcn31_hpo_dp_link_enc_disable_output +ffffffff820b1520 T dcn31_hpo_dp_link_enc_set_ffe +ffffffff820b1610 T hpo_dp_link_encoder31_construct +ffffffff820b1670 t dcn31_hpo_dp_link_enc_is_in_alt_mode +ffffffff820b2000 T dcn31_hpo_dp_stream_encoder_construct +ffffffff820b2070 t dcn31_hpo_dp_stream_enc_enable_stream +ffffffff820b21b0 t dcn31_hpo_dp_stream_enc_dp_unblank +ffffffff820b2460 t dcn31_hpo_dp_stream_enc_dp_blank +ffffffff820b2560 t dcn31_hpo_dp_stream_enc_disable +ffffffff820b25d0 t dcn31_hpo_dp_stream_enc_set_stream_attribute +ffffffff820b2e80 t dcn31_hpo_dp_stream_enc_update_dp_info_packets +ffffffff820b3040 t dcn31_hpo_dp_stream_enc_stop_dp_info_packets +ffffffff820b31d0 t dcn31_hpo_dp_stream_enc_set_dsc_pps_info_packet +ffffffff820b3470 t dcn31_hpo_dp_stream_enc_map_stream_to_link +ffffffff820b3570 t dcn31_hpo_dp_stream_enc_mute_control +ffffffff820b35e0 t dcn31_hpo_dp_stream_enc_audio_setup +ffffffff820b3690 t dcn31_hpo_dp_stream_enc_audio_enable +ffffffff820b3760 t dcn31_hpo_dp_stream_enc_audio_disable +ffffffff820b3910 t dcn31_hpo_dp_stream_enc_read_state +ffffffff820b3aa0 t dcn31_set_hblank_min_symbol_width +ffffffff820b4000 T hubbub31_init_dchub_sys_ctx +ffffffff820b41f0 T hubbub31_construct +ffffffff820b4290 t hubbub31_get_dcc_compression_cap +ffffffff820b4480 t hubbub31_get_dchub_ref_freq +ffffffff820b4560 t hubbub31_program_watermarks +ffffffff820b5e20 t hubbub31_verify_allow_pstate_change_high +ffffffff820b5fe0 t dcn31_program_det_size +ffffffff820b61a0 t dcn31_program_compbuf_size +ffffffff820b6420 t dcn31_init_crb +ffffffff820b7000 T hubp31_set_unbounded_requesting +ffffffff820b7090 T hubp31_soft_reset +ffffffff820b70e0 T hubp31_construct +ffffffff820b7150 t hubp31_program_extended_blank +ffffffff820b8000 T dcn31_init_hw +ffffffff820b8960 T dcn31_dsc_pg_control +ffffffff820b8cb0 T dcn31_enable_power_gating_plane +ffffffff820b8f10 T dcn31_update_info_frame +ffffffff820b8fe0 T dcn31_z10_save_init +ffffffff820b90a0 T dcn31_z10_restore +ffffffff820b9180 T dcn31_hubp_pg_control +ffffffff820b94a0 T dcn31_init_sys_ctx +ffffffff820b9550 T dcn31_reset_hw_ctx_wrap +ffffffff820b98c0 T dcn31_setup_hpo_hw_control +ffffffff820ba000 T dcn31_hw_sequencer_construct +ffffffff820bb000 T optc31_immediate_disable_crtc +ffffffff820bb100 T optc31_set_drr +ffffffff820bb320 T optc3_init_odm +ffffffff820bb490 T dcn31_timing_generator_init +ffffffff820bb500 t optc31_enable_crtc +ffffffff820bb600 t optc31_disable_crtc +ffffffff820bb6e0 t optc31_set_odm_combine +ffffffff820bc000 T dcn31_panel_cntl_construct +ffffffff820bc040 t dcn31_panel_cntl_destroy +ffffffff820bc090 t dcn31_panel_cntl_hw_init +ffffffff820bc180 t dcn31_is_panel_backlight_on +ffffffff820bc220 t dcn31_is_panel_powered_on +ffffffff820bc2d0 t dcn31_store_backlight_level +ffffffff820bc390 t dcn31_get_16_bit_backlight_from_pwm +ffffffff820bd000 T dcn31_populate_dml_pipes_from_context +ffffffff820bd350 T dcn31_calculate_wm_and_dlg +ffffffff820bd3d0 T dcn31_populate_dml_writeback_from_context +ffffffff820bd430 T dcn31_set_mcif_arb_params +ffffffff820bd490 T dcn31_validate_bandwidth +ffffffff820bd870 T dcn31_create_resource_pool +ffffffff820bec10 t dcn31_resource_destruct +ffffffff820bf270 t dcn31_destroy_resource_pool +ffffffff820bf2d0 t dcn31_panel_cntl_create +ffffffff820bf340 t dcn31_link_encoder_create +ffffffff820bf400 t dcn31_link_enc_create_minimal +ffffffff820bf4a0 t dcn31_get_panel_config_defaults +ffffffff820bf510 t read_dce_straps +ffffffff820bf540 t dcn31_create_audio +ffffffff820bf570 t dcn31_stream_encoder_create +ffffffff820bf6f0 t dcn31_hpo_dp_stream_encoder_create +ffffffff820bf8b0 t dcn31_hpo_dp_link_encoder_create +ffffffff820bf940 t dcn31_hwseq_create +ffffffff820c0000 T vpg31_powerdown +ffffffff820c0090 T vpg31_poweron +ffffffff820c0120 T vpg31_construct +ffffffff820c1000 T dccg314_create +ffffffff820c10b0 t dccg314_set_dpstreamclk +ffffffff820c1480 t dccg314_set_dtbclk_dto +ffffffff820c1670 t dccg314_set_pixel_rate_div +ffffffff820c19e0 t dccg314_set_valid_pixel_rate +ffffffff820c2000 T dcn314_dio_stream_encoder_construct +ffffffff820c2070 t enc314_stream_encoder_hdmi_set_stream_attribute +ffffffff820c2660 t enc314_stream_encoder_dvi_set_stream_attribute +ffffffff820c2870 t enc314_stream_encoder_dp_blank +ffffffff820c28c0 t enc314_stream_encoder_dp_unblank +ffffffff820c2c00 t enc314_read_state +ffffffff820c2d60 t enc314_dp_set_dsc_config +ffffffff820c2db0 t enc314_dp_set_odm_combine +ffffffff820c2df0 t enc314_set_dig_input_mode +ffffffff820c2e40 t enc314_enable_fifo +ffffffff820c2ee0 t enc314_disable_fifo +ffffffff820c2f30 t enc314_reset_fifo +ffffffff820c4000 T dcn314_update_odm +ffffffff820c4610 T dcn314_dsc_pg_control +ffffffff820c49e0 T dcn314_enable_power_gating_plane +ffffffff820c4c70 T dcn314_calculate_dccg_k1_k2_values +ffffffff820c4e00 T dcn314_set_pixels_per_cycle +ffffffff820c4ef0 T dcn314_hubp_pg_control +ffffffff820c6000 T dcn314_hw_sequencer_construct +ffffffff820c7000 T dcn314_timing_generator_init +ffffffff820c7070 t optc314_enable_crtc +ffffffff820c7170 t optc314_disable_crtc +ffffffff820c7250 t optc314_phantom_crtc_post_enable +ffffffff820c7310 t optc314_set_odm_bypass +ffffffff820c7480 t optc314_set_odm_combine +ffffffff820c7780 t optc314_set_h_timing_div_manual_mode +ffffffff820c8000 T dcn314_create_resource_pool +ffffffff820c92d0 t dcn314_resource_destruct +ffffffff820c9930 t dcn314_destroy_resource_pool +ffffffff820c9990 t dcn31_panel_cntl_create +ffffffff820c9a00 t dcn31_link_encoder_create +ffffffff820c9ac0 t dcn31_link_enc_create_minimal +ffffffff820c9b60 t dcn314_populate_dml_pipes_from_context +ffffffff820c9bf0 t dcn314_update_bw_bounding_box +ffffffff820c9c40 t dcn314_get_panel_config_defaults +ffffffff820c9cb0 t read_dce_straps +ffffffff820c9ce0 t dcn31_create_audio +ffffffff820c9d10 t dcn314_stream_encoder_create +ffffffff820c9e90 t dcn31_hpo_dp_stream_encoder_create +ffffffff820ca050 t dcn31_hpo_dp_link_encoder_create +ffffffff820ca0e0 t dcn314_hwseq_create +ffffffff820cb000 T dcn315_create_resource_pool +ffffffff820cc270 t dcn315_resource_destruct +ffffffff820cc8d0 t dcn315_destroy_resource_pool +ffffffff820cc930 t dcn31_panel_cntl_create +ffffffff820cc9a0 t dcn31_link_encoder_create +ffffffff820cca60 t dcn31_link_enc_create_minimal +ffffffff820ccb00 t dcn315_populate_dml_pipes_from_context +ffffffff820cce50 t dcn315_get_panel_config_defaults +ffffffff820ccec0 t read_dce_straps +ffffffff820ccef0 t dcn31_create_audio +ffffffff820ccf20 t dcn315_stream_encoder_create +ffffffff820cd0a0 t dcn31_hpo_dp_stream_encoder_create +ffffffff820cd260 t dcn31_hpo_dp_link_encoder_create +ffffffff820cd2f0 t dcn31_hwseq_create +ffffffff820ce000 T dcn316_create_resource_pool +ffffffff820cf2b0 t dcn316_resource_destruct +ffffffff820cf910 t dcn316_destroy_resource_pool +ffffffff820cf970 t dcn31_panel_cntl_create +ffffffff820cf9e0 t dcn31_link_encoder_create +ffffffff820cfaa0 t dcn31_link_enc_create_minimal +ffffffff820cfb40 t dcn316_populate_dml_pipes_from_context +ffffffff820cfe70 t dcn316_get_panel_config_defaults +ffffffff820cfee0 t read_dce_straps +ffffffff820cff10 t dcn31_create_audio +ffffffff820cff40 t dcn316_stream_encoder_create +ffffffff820d00c0 t dcn31_hpo_dp_stream_encoder_create +ffffffff820d0280 t dcn31_hpo_dp_link_encoder_create +ffffffff820d0310 t dcn31_hwseq_create +ffffffff820d1000 T dccg32_create +ffffffff820d10b0 t dccg32_get_dccg_ref_freq +ffffffff820d10e0 t dccg32_otg_add_pixel +ffffffff820d1120 t dccg32_otg_drop_pixel +ffffffff820d1160 t dccg32_set_dpstreamclk +ffffffff820d1530 t dccg32_set_dtbclk_dto +ffffffff820d1730 t dccg32_set_pixel_rate_div +ffffffff820d1aa0 t dccg32_set_valid_pixel_rate +ffffffff820d2000 T enc32_hw_init +ffffffff820d2090 T dcn32_link_encoder_enable_dp_output +ffffffff820d20e0 T dcn32_link_encoder_construct +ffffffff820d22c0 t dcn32_link_encoder_is_in_alt_mode +ffffffff820d2340 t dcn32_link_encoder_get_max_link_cap +ffffffff820d3000 T dcn32_dio_stream_encoder_construct +ffffffff820d3070 t enc32_stream_encoder_hdmi_set_stream_attribute +ffffffff820d35a0 t enc32_stream_encoder_dvi_set_stream_attribute +ffffffff820d3720 t enc32_stream_encoder_dp_unblank +ffffffff820d3be0 t enc32_read_state +ffffffff820d3d40 t enc32_dp_set_dsc_config +ffffffff820d3d90 t enc32_dp_set_odm_combine +ffffffff820d3dd0 t enc32_set_dig_input_mode +ffffffff820d4000 T dpp32_construct +ffffffff820d4060 t dscl32_calc_lb_num_partitions +ffffffff820d5000 T hpo_dp_link_encoder32_construct +ffffffff820d5060 t dcn32_hpo_dp_link_enc_is_in_alt_mode +ffffffff820d6000 T dcn32_program_det_size +ffffffff820d61a0 T hubbub32_program_urgent_watermarks +ffffffff820d6910 T hubbub32_program_stutter_watermarks +ffffffff820d6d60 T hubbub32_program_pstate_watermarks +ffffffff820d71f0 T hubbub32_program_usr_watermarks +ffffffff820d7440 T hubbub32_force_usr_retraining_allow +ffffffff820d74c0 T hubbub32_force_wm_propagate_to_pipes +ffffffff820d7560 T hubbub32_construct +ffffffff820d75e0 t hubbub32_wm_read_state +ffffffff820d7a60 t hubbub32_program_watermarks +ffffffff820d7b70 t hubbub32_init_watermarks +ffffffff820d7fb0 t dcn32_program_compbuf_size +ffffffff820d8230 t dcn32_init_crb +ffffffff820d9000 T hubp32_update_force_pstate_disallow +ffffffff820d9090 T hubp32_update_mall_sel +ffffffff820d9120 T hubp32_prepare_subvp_buffering +ffffffff820d91c0 T hubp32_phantom_hubp_post_enable +ffffffff820d92d0 T hubp32_cursor_set_attributes +ffffffff820d9590 T hubp32_construct +ffffffff820da000 T dcn32_dsc_pg_control +ffffffff820da310 T dcn32_enable_power_gating_plane +ffffffff820da4b0 T dcn32_hubp_pg_control +ffffffff820da720 T dcn32_apply_idle_power_optimizations +ffffffff820da990 t dcn32_calculate_cab_allocation +ffffffff820dad40 T dcn32_commit_subvp_config +ffffffff820dadf0 T dcn32_subvp_pipe_control_lock +ffffffff820dafc0 T dcn32_set_mcm_luts +ffffffff820db150 T dcn32_set_input_transfer_func +ffffffff820db290 T dcn32_set_output_transfer_func +ffffffff820db4a0 T dcn32_subvp_update_force_pstate +ffffffff820db610 T dcn32_update_mall_sel +ffffffff820db790 T dcn32_program_mall_pipe_config +ffffffff820db870 T dcn32_init_hw +ffffffff820dc060 T dcn32_update_odm +ffffffff820dc670 T dcn32_calculate_dccg_k1_k2_values +ffffffff820dc870 T dcn32_is_dp_dig_pixel_rate_div_policy +ffffffff820dc900 T dcn32_set_pixels_per_cycle +ffffffff820dca40 T dcn32_unblank_stream +ffffffff820dcc10 T dcn32_disable_link_output +ffffffff820dcea0 T dcn32_update_phantom_vp_position +ffffffff820dcfc0 T dcn32_dsc_pg_status +ffffffff820dd0a0 T dcn32_update_dsc_pg +ffffffff820de000 T dcn32_hw_sequencer_init_functions +ffffffff820df000 t mmhubbub32_warmup_mcif +ffffffff820df210 t mmhubbub32_config_mcif_buf +ffffffff820df6c0 t mmhubbub32_config_mcif_arb +ffffffff820dfad0 T dcn32_mmhubbub_construct +ffffffff820e0000 t mpc32_mpc_init +ffffffff820e0220 t mpc32_program_post1dlut +ffffffff820e0d00 t mpc32_program_shaper +ffffffff820e2fb0 t mpc32_program_3dlut +ffffffff820e38a0 T dcn32_mpc_construct +ffffffff820e3960 t mpc32_power_on_shaper_3dlut +ffffffff820e3b90 t mpc32_set3dlut_ram12 +ffffffff820e4000 T dcn32_timing_generator_init +ffffffff820e4070 t optc32_enable_crtc +ffffffff820e4170 t optc32_disable_crtc +ffffffff820e4250 t optc32_phantom_crtc_post_enable +ffffffff820e4310 t optc32_set_drr +ffffffff820e4560 t optc32_set_odm_bypass +ffffffff820e46d0 t optc32_set_odm_combine +ffffffff820e49d0 t optc32_set_h_timing_div_manual_mode +ffffffff820e5000 T dcn32_panel_cntl_create +ffffffff820e5070 T dcn32_acquire_post_bldn_3dlut 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+ffffffff820fc0b0 t dcn32_vpg_create +ffffffff820fd000 T dcn32_helper_calculate_num_ways_for_subvp +ffffffff820fd1e0 T dcn32_merge_pipes_for_subvp +ffffffff820fd3b0 T dcn32_all_pipes_have_stream_and_plane +ffffffff820fd440 T dcn32_subvp_in_use +ffffffff820fd4d0 T dcn32_mpo_in_use +ffffffff820fd540 T dcn32_any_surfaces_rotated +ffffffff820fd5d0 T dcn32_determine_det_override +ffffffff820fd910 T dcn32_set_det_allocations +ffffffff820fda90 T dcn32_save_mall_state +ffffffff820fdb40 T dcn32_restore_mall_state +ffffffff820fe000 T dcn321_link_encoder_construct +ffffffff820ff000 T dcn321_create_resource_pool +ffffffff820ff0b0 t dcn321_resource_construct +ffffffff8210b4c0 t dcn321_mpc_create +ffffffff8210fe80 t dcn321_resource_destruct +ffffffff821104f0 t dcn321_destroy_resource_pool +ffffffff82110550 t dcn321_link_encoder_create +ffffffff821114b0 t dcn321_update_bw_bounding_box +ffffffff82111500 t read_dce_straps +ffffffff82111530 t dcn321_create_audio +ffffffff82111870 t dcn321_stream_encoder_create +ffffffff821136f0 t dcn321_hpo_dp_stream_encoder_create +ffffffff821143d0 t dcn321_hpo_dp_link_encoder_create +ffffffff82114850 t dcn321_hwseq_create +ffffffff82114cf0 t dcn321_vpg_create +ffffffff82116000 T bw_int_to_fixed_nonconst +ffffffff82116090 T bw_frc_to_fixed +ffffffff82116260 T bw_floor2 +ffffffff82116310 T bw_ceil2 +ffffffff82116390 T bw_mul +ffffffff82117000 T convert_to_custom_float_format +ffffffff82118000 T bw_calcs_init +ffffffff82118e30 T bw_calcs +ffffffff8211a760 t calculate_bandwidth +ffffffff82122000 T scaler_settings_calculation +ffffffff82122380 T mode_support_and_system_configuration +ffffffff82128160 T display_pipe_configuration +ffffffff821289a0 T dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation +ffffffff8212e000 T dcn_bw_mod +ffffffff8212e060 T dcn_bw_min2 +ffffffff8212e0a0 T dcn_bw_max +ffffffff8212e0d0 T dcn_bw_max2 +ffffffff8212e110 T dcn_bw_floor2 +ffffffff8212e1b0 T dcn_bw_floor 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+ffffffff821357b0 T dcn20_patch_bounding_box +ffffffff82135920 T dcn20_validate_bandwidth_fp +ffffffff82135ab0 t dcn20_validate_bandwidth_internal +ffffffff82135e90 T dcn20_fpu_set_wm_ranges +ffffffff82135f30 T dcn20_fpu_adjust_dppclk +ffffffff82135fd0 T dcn21_populate_dml_pipes_from_context +ffffffff821360d0 T dcn21_validate_bandwidth_fp +ffffffff82136b50 T dcn21_update_bw_bounding_box +ffffffff82137040 T dcn21_clk_mgr_set_bw_params_wm_table +ffffffff821370a0 T dcn201_populate_dml_writeback_from_context_fpu +ffffffff821373b0 t calculate_wm_set_for_vlevel +ffffffff82138000 T dml20_recalculate +ffffffff82138740 t dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff8213dda0 T dml20_ModeSupportAndSystemConfigurationFull +ffffffff82144d30 t TruncToValidBPP +ffffffff82144f10 t CalculateVMAndRowBytes +ffffffff821455a0 t CalculatePrefetchSourceLines +ffffffff82145760 t CalculateWriteBackDelay +ffffffff82145a30 t CalculatePrefetchSchedule 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optc3_fpu_set_vrr_m_const +ffffffff821744a0 T dcn30_fpu_populate_dml_writeback_from_context +ffffffff821747f0 T dcn30_fpu_set_mcif_arb_params +ffffffff82174960 T dcn30_fpu_update_soc_for_wm_a +ffffffff82174a10 T dcn30_fpu_calculate_wm_and_dlg +ffffffff821752f0 T dcn30_fpu_update_dram_channel_width_bytes +ffffffff82175350 T dcn30_fpu_update_max_clk +ffffffff82175400 T dcn30_fpu_get_optimal_dcfclk_fclk_for_uclk +ffffffff82175500 T dcn30_fpu_update_bw_bounding_box +ffffffff821756e0 T dcn30_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff821758a0 T dcn3_fpu_build_wm_range_table +ffffffff82175b80 T patch_dcn30_soc_bounding_box +ffffffff82176000 T dml30_recalculate +ffffffff82176600 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff8217cc50 T dml30_CalculateBytePerPixelAnd256BBlockSizes +ffffffff8217cec0 T dml30_CalculateWriteBackDISPCLK +ffffffff8217d040 T dml30_ModeSupportAndSystemConfigurationFull +ffffffff82184440 t CalculateSwathAndDETConfiguration +ffffffff82184ab0 t TruncToValidBPP +ffffffff82184d30 t dscceComputeDelay +ffffffff82184e70 t CalculateVMAndRowBytes +ffffffff82185520 t CalculatePrefetchSourceLines +ffffffff821856e0 t CalculateUrgentBurstFactor +ffffffff82185970 t CalculateDCFCLKDeepSleep +ffffffff82185c90 t UseMinimumDCFCLK +ffffffff82186e90 t CalculatePrefetchSchedule +ffffffff821883f0 t CalculateFlipSchedule +ffffffff821888e0 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff82189700 t CalculateSwathWidth +ffffffff8218a000 T dml30_rq_dlg_get_rq_reg +ffffffff8218a4b0 t dml_rq_dlg_get_rq_params +ffffffff8218a720 T dml30_rq_dlg_get_dlg_reg +ffffffff8218ced0 t get_surf_rq_param +ffffffff8218d870 t calculate_ttu_cursor +ffffffff8218e000 T dcn301_update_bw_bounding_box +ffffffff8218e320 T dcn301_fpu_set_wm_ranges +ffffffff8218e3c0 T dcn301_fpu_init_soc_bounding_box +ffffffff8218e460 T dcn301_calculate_wm_and_dlg_fp +ffffffff8218e790 t calculate_wm_set_for_vlevel +ffffffff8218f000 T dcn302_fpu_update_bw_bounding_box +ffffffff8218fac0 T dcn302_fpu_init_soc_bounding_box +ffffffff82190000 T dcn303_fpu_update_bw_bounding_box +ffffffff82190b00 T dcn303_fpu_init_soc_bounding_box +ffffffff82191000 T dcn31_zero_pipe_dcc_fraction +ffffffff82191060 T dcn31_update_soc_for_wm_a +ffffffff82191110 T dcn315_update_soc_for_wm_a +ffffffff821911e0 T dcn31_calculate_wm_and_dlg_fp +ffffffff821916e0 T dcn31_update_bw_bounding_box +ffffffff82191ad0 T dcn315_update_bw_bounding_box +ffffffff82191dc0 T dcn316_update_bw_bounding_box +ffffffff82193000 T dml31_recalculate +ffffffff821932a0 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff8219a060 T dml31_CalculateWriteBackDISPCLK +ffffffff8219a1e0 T dml31_ModeSupportAndSystemConfigurationFull +ffffffff821a24a0 t CalculateSwathAndDETConfiguration +ffffffff821a2aa0 t TruncToValidBPP +ffffffff821a2d20 t dscceComputeDelay +ffffffff821a2e60 t CalculateDCFCLKDeepSleep +ffffffff821a31a0 t CalculateVMAndRowBytes +ffffffff821a37f0 t CalculatePrefetchSourceLines +ffffffff821a39b0 t CalculateUrgentBurstFactor +ffffffff821a3c40 t CalculatePrefetchSchedulePerPlane +ffffffff821a4370 t CalculateFlipSchedule +ffffffff821a48f0 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff821a5550 t CalculateSwathWidth +ffffffff821a5a60 t CalculatePrefetchSchedule +ffffffff821a6ef0 t CalculateVupdateAndDynamicMetadataParameters +ffffffff821a8000 T dml31_rq_dlg_get_rq_reg +ffffffff821a84b0 t dml_rq_dlg_get_rq_params +ffffffff821a8720 T dml31_rq_dlg_get_dlg_reg +ffffffff821ab1f0 t get_surf_rq_param +ffffffff821ac000 T dcn314_update_bw_bounding_box_fpu +ffffffff821ac480 T dcn314_populate_dml_pipes_from_context_fpu +ffffffff821ad000 T dml314_recalculate +ffffffff821ad280 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff821b3f60 T dml314_CalculateWriteBackDISPCLK +ffffffff821b40e0 T dml314_ModeSupportAndSystemConfigurationFull +ffffffff821bc280 t CalculateBytePerPixelAnd256BBlockSizes +ffffffff821bc4f0 t CalculateSwathAndDETConfiguration +ffffffff821bcaf0 t TruncToValidBPP +ffffffff821bcd70 t dscceComputeDelay +ffffffff821bceb0 t CalculateDCFCLKDeepSleep +ffffffff821bd1f0 t CalculateVMAndRowBytes +ffffffff821bd840 t CalculatePrefetchSourceLines +ffffffff821bda00 t CalculateUrgentBurstFactor +ffffffff821bdc90 t CalculateMaxVStartup +ffffffff821bddd0 t CalculatePrefetchSchedulePerPlane +ffffffff821be500 t CalculateFlipSchedule +ffffffff821bea80 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff821bf6e0 t CalculateSwathWidth +ffffffff821bfbf0 t CalculatePrefetchSchedule +ffffffff821c1080 t CalculateVupdateAndDynamicMetadataParameters +ffffffff821c2000 T dml314_rq_dlg_get_rq_reg +ffffffff821c24b0 t dml_rq_dlg_get_rq_params +ffffffff821c2720 T dml314_rq_dlg_get_dlg_reg +ffffffff821c5270 t get_surf_rq_param +ffffffff821c6000 T dcn32_build_wm_range_table_fpu +ffffffff821c6390 T dcn32_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff821c65c0 T dcn32_internal_validate_bw +ffffffff821c82f0 T dcn32_helper_populate_phantom_dlg_params +ffffffff821c8490 T dcn32_predict_pipe_split +ffffffff821c86c0 T insert_entry_into_table_sorted +ffffffff821c8af0 T dcn32_set_phantom_stream_timing +ffffffff821c8d90 t dcn32_split_stream_for_mpc_or_odm +ffffffff821c9120 T dcn32_calculate_wm_and_dlg_fpu +ffffffff821ca640 T dcn32_patch_dpm_table +ffffffff821ca850 T dcn32_update_bw_bounding_box_fpu +ffffffff821cc250 T dcn32_zero_pipe_dcc_fraction +ffffffff821cc2b0 T dcn32_allow_subvp_with_active_margin +ffffffff821cc380 t subvp_drr_schedulable +ffffffff821cd000 T dml32_recalculate +ffffffff821d1320 T dml32_ModeSupportAndSystemConfigurationFull +ffffffff821d9000 T dml32_dscceComputeDelay +ffffffff821d9140 T dml32_dscComputeDelay +ffffffff821d9180 T IsVertical +ffffffff821d91b0 T dml32_CalculateSinglePipeDPPCLKAndSCLThroughput +ffffffff821d94d0 T dml32_CalculateBytePerPixelAndBlockSizes +ffffffff821d9800 T dml32_CalculateSwathAndDETConfiguration +ffffffff821da020 T dml32_CalculateSwathWidth +ffffffff821da8c0 T dml32_UnboundedRequest +ffffffff821da930 T dml32_CalculateDETBufferSize +ffffffff821daf70 T dml32_CalculateODMMode +ffffffff821db6d0 T dml32_CalculateRequiredDispclk +ffffffff821db890 T dml32_RoundToDFSGranularity +ffffffff821db920 T dml32_CalculateOutputLink +ffffffff821dc450 T dml32_TruncToValidBPP +ffffffff821dc7a0 T dml32_CalculateDPPCLK +ffffffff821dc950 T dml32_RequiredDTBCLK +ffffffff821dcba0 T dml32_DSCDelayRequirement +ffffffff821dd070 T dml32_CalculateSurfaceSizeInMall +ffffffff821ddb80 T dml32_CalculateVMRowAndSwath +ffffffff821de9b0 T dml32_CalculateVMAndRowBytes +ffffffff821df5f0 T dml32_CalculatePrefetchSourceLines +ffffffff821df840 T dml32_CalculateMALLUseForStaticScreen +ffffffff821df990 T dml32_CalculateRowBandwidth +ffffffff821dfaf0 T dml32_CalculateUrgentLatency +ffffffff821dfb90 T dml32_CalculateUrgentBurstFactor +ffffffff821dfe40 T dml32_CalculateDCFCLKDeepSleep +ffffffff821e0190 T dml32_CalculateWriteBackDelay +ffffffff821e02f0 T dml32_UseMinimumDCFCLK +ffffffff821e11b0 T dml32_CalculateExtraLatencyBytes +ffffffff821e1380 T dml32_CalculateTWait +ffffffff821e1460 T dml32_CalculateVUpdateAndDynamicMetadataParameters +ffffffff821e16c0 T dml32_get_return_bw_mbps +ffffffff821e1880 T dml32_get_return_bw_mbps_vm_only +ffffffff821e1960 T dml32_CalculateExtraLatency +ffffffff821e1b90 T dml32_CalculatePrefetchSchedule +ffffffff821e3140 T dml32_CalculateFlipSchedule +ffffffff821e36c0 T dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport +ffffffff821e4820 T dml32_CalculateWriteBackDISPCLK +ffffffff821e49e0 T dml32_CalculateMinAndMaxPrefetchMode +ffffffff821e4a20 T dml32_CalculatePixelDeliveryTimes +ffffffff821e4e90 T dml32_CalculateMetaAndPTETimes +ffffffff821e55d0 T dml32_CalculateVMGroupAndRequestTimes +ffffffff821e5ac0 T dml32_CalculateDCCConfiguration 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PixelClockAdjustmentForProgressiveToInterlaceUnit +ffffffff821efd20 T get_clk_dcf_deepsleep +ffffffff821efe30 T get_wm_urgent +ffffffff821eff40 T get_wm_memory_trip +ffffffff821f0050 T get_wm_writeback_urgent +ffffffff821f0160 T get_wm_stutter_exit +ffffffff821f0270 T get_wm_stutter_enter_exit +ffffffff821f0380 T get_wm_z8_stutter_exit +ffffffff821f0490 T get_wm_z8_stutter_enter_exit +ffffffff821f05a0 T get_stutter_efficiency_z8 +ffffffff821f06b0 T get_stutter_num_bursts_z8 +ffffffff821f07c0 T get_wm_dram_clock_change +ffffffff821f08d0 T get_wm_writeback_dram_clock_change +ffffffff821f09e0 T get_stutter_efficiency +ffffffff821f0af0 T get_stutter_efficiency_no_vblank +ffffffff821f0c00 T get_stutter_period +ffffffff821f0d10 T get_urgent_latency +ffffffff821f0e20 T get_urgent_extra_latency +ffffffff821f0f30 T get_nonurgent_latency +ffffffff821f1040 T get_dram_clock_change_latency +ffffffff821f1150 T get_dispclk_calculated +ffffffff821f1260 T get_total_data_read_bw +ffffffff821f1370 T get_return_bw +ffffffff821f1480 T get_tcalc +ffffffff821f1590 T get_fraction_of_urgent_bandwidth +ffffffff821f16a0 T get_fraction_of_urgent_bandwidth_imm_flip +ffffffff821f17b0 T get_cstate_max_cap_mode +ffffffff821f18d0 T get_comp_buffer_size_kbytes +ffffffff821f19e0 T get_pixel_chunk_size_in_kbyte +ffffffff821f1b00 T get_alpha_pixel_chunk_size_in_kbyte +ffffffff821f1c20 T get_meta_chunk_size_in_kbyte +ffffffff821f1d40 T get_min_pixel_chunk_size_in_byte +ffffffff821f1e50 T get_min_meta_chunk_size_in_byte +ffffffff821f1f70 T get_fclk_watermark +ffffffff821f2080 T get_usr_retraining_watermark +ffffffff821f2190 T get_comp_buffer_reserved_space_kbytes +ffffffff821f22b0 T get_comp_buffer_reserved_space_64bytes +ffffffff821f23d0 T get_comp_buffer_reserved_space_zs +ffffffff821f24f0 T get_unbounded_request_enabled +ffffffff821f2610 T get_dsc_delay +ffffffff821f2740 T get_dppclk_calculated +ffffffff821f2860 T get_dscclk_calculated +ffffffff821f2980 T get_min_ttu_vblank +ffffffff821f2aa0 T get_min_ttu_vblank_in_us +ffffffff821f2bc0 T get_vratio_prefetch_l +ffffffff821f2ce0 T get_vratio_prefetch_c +ffffffff821f2e00 T get_dst_x_after_scaler +ffffffff821f2f20 T get_dst_y_after_scaler +ffffffff821f3040 T get_dst_y_per_vm_vblank +ffffffff821f3160 T get_dst_y_per_row_vblank +ffffffff821f3280 T get_dst_y_prefetch +ffffffff821f33a0 T get_dst_y_per_vm_flip +ffffffff821f34c0 T get_dst_y_per_row_flip +ffffffff821f35e0 T get_refcyc_per_vm_group_vblank +ffffffff821f3700 T get_refcyc_per_vm_group_flip +ffffffff821f3820 T get_refcyc_per_vm_req_vblank +ffffffff821f3940 T get_refcyc_per_vm_req_flip +ffffffff821f3a60 T get_refcyc_per_vm_group_vblank_in_us +ffffffff821f3b80 T get_refcyc_per_vm_group_flip_in_us +ffffffff821f3ca0 T get_refcyc_per_vm_req_vblank_in_us +ffffffff821f3dc0 T get_refcyc_per_vm_req_flip_in_us +ffffffff821f3ee0 T get_refcyc_per_vm_dmdata_in_us +ffffffff821f4000 T get_dmdata_dl_delta_in_us +ffffffff821f4120 T get_refcyc_per_line_delivery_l_in_us +ffffffff821f4240 T get_refcyc_per_line_delivery_c_in_us +ffffffff821f4360 T get_refcyc_per_line_delivery_pre_l_in_us +ffffffff821f4480 T get_refcyc_per_line_delivery_pre_c_in_us +ffffffff821f45a0 T get_refcyc_per_req_delivery_l_in_us +ffffffff821f46c0 T get_refcyc_per_req_delivery_c_in_us +ffffffff821f47e0 T get_refcyc_per_req_delivery_pre_l_in_us +ffffffff821f4900 T get_refcyc_per_req_delivery_pre_c_in_us +ffffffff821f4a20 T get_refcyc_per_cursor_req_delivery_in_us +ffffffff821f4b40 T get_refcyc_per_cursor_req_delivery_pre_in_us +ffffffff821f4c60 T get_refcyc_per_meta_chunk_nom_l_in_us +ffffffff821f4d80 T get_refcyc_per_meta_chunk_nom_c_in_us +ffffffff821f4ea0 T get_refcyc_per_meta_chunk_vblank_l_in_us +ffffffff821f4fc0 T get_refcyc_per_meta_chunk_vblank_c_in_us +ffffffff821f50e0 T get_refcyc_per_meta_chunk_flip_l_in_us +ffffffff821f5200 T get_refcyc_per_meta_chunk_flip_c_in_us +ffffffff821f5320 T get_vstartup +ffffffff821f5450 T get_vupdate_offset +ffffffff821f5580 T get_vupdate_width +ffffffff821f56a0 T get_vready_offset +ffffffff821f57c0 T get_vready_at_or_after_vsync +ffffffff821f58f0 T get_min_dst_y_next_start +ffffffff821f5a20 T get_dst_y_per_pte_row_nom_l +ffffffff821f5b40 T get_dst_y_per_pte_row_nom_c +ffffffff821f5c60 T get_dst_y_per_meta_row_nom_l +ffffffff821f5d80 T get_dst_y_per_meta_row_nom_c +ffffffff821f5ea0 T get_refcyc_per_pte_group_nom_l_in_us +ffffffff821f5fc0 T get_refcyc_per_pte_group_nom_c_in_us +ffffffff821f60e0 T get_refcyc_per_pte_group_vblank_l_in_us +ffffffff821f6200 T get_refcyc_per_pte_group_vblank_c_in_us +ffffffff821f6320 T get_refcyc_per_pte_group_flip_l_in_us +ffffffff821f6440 T get_refcyc_per_pte_group_flip_c_in_us +ffffffff821f6560 T get_vstartup_calculated +ffffffff821f6690 T get_dpte_row_height_linear_c +ffffffff821f67c0 T get_swath_height_l +ffffffff821f68f0 T get_swath_height_c +ffffffff821f6a20 T get_det_stored_buffer_size_l_bytes +ffffffff821f6b50 T get_det_stored_buffer_size_c_bytes +ffffffff821f6c80 T get_dpte_group_size_in_bytes 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dal_irq_service_dcn32_create +ffffffff8222d080 t hpd_ack +ffffffff8222d130 t to_dal_irq_source_dcn32 +ffffffff8222e000 T dal_irq_service_construct +ffffffff8222e070 T dal_irq_service_destroy +ffffffff8222e100 T dal_irq_service_set_generic +ffffffff8222e180 T dal_irq_service_set +ffffffff8222e2a0 T dal_irq_service_ack +ffffffff8222e390 T dal_irq_service_ack_generic +ffffffff8222e400 T dal_irq_service_to_irq_source +ffffffff8222f000 T dp_trace_init +ffffffff8222f0a0 T dp_trace_reset +ffffffff8222f130 T dc_dp_trace_is_initialized +ffffffff8222f160 T dp_trace_detect_lt_init +ffffffff8222f1b0 T dp_trace_commit_lt_init +ffffffff8222f200 T dp_trace_link_loss_increment +ffffffff8222f230 T dp_trace_lt_fail_count_update +ffffffff8222f270 T dp_trace_lt_total_count_increment +ffffffff8222f2b0 T dc_dp_trace_set_is_logged_flag +ffffffff8222f2f0 T dc_dp_trace_is_logged +ffffffff8222f330 T dp_trace_lt_result_update +ffffffff8222f370 T dp_trace_set_lt_start_timestamp +ffffffff8222f450 T dp_trace_set_lt_end_timestamp +ffffffff8222f530 T dc_dp_trace_get_lt_end_timestamp +ffffffff8222f570 T dc_dp_trace_get_lt_counts +ffffffff8222f5b0 T dc_dp_trace_get_link_loss_count +ffffffff8222f5e0 T dp_trace_set_edp_power_timestamp +ffffffff8222f6c0 T dp_trace_get_edp_poweron_timestamp +ffffffff8222f6f0 T dp_trace_get_edp_poweroff_timestamp +ffffffff82230000 T set_dio_throttled_vcp_size +ffffffff82230020 T setup_dio_stream_encoder +ffffffff822300e0 T reset_dio_stream_encoder +ffffffff822301a0 T setup_dio_stream_attribute +ffffffff82230320 T enable_dio_dp_link_output +ffffffff82230390 T disable_dio_link_output +ffffffff822303d0 T set_dio_dp_link_test_pattern +ffffffff82230410 T set_dio_dp_lane_settings +ffffffff82230450 T can_use_dio_link_hwss +ffffffff82230490 T get_dio_link_hwss +ffffffff822304c0 t update_dio_stream_allocation_table +ffffffff82231000 T can_use_dpia_link_hwss +ffffffff82231050 T get_dpia_link_hwss +ffffffff82231080 t update_dpia_stream_allocation_table +ffffffff82232000 T can_use_hpo_dp_link_hwss +ffffffff82232030 T get_hpo_dp_link_hwss +ffffffff82232060 t set_hpo_dp_hblank_min_symbol_width +ffffffff82232130 t set_hpo_dp_throttled_vcp_size +ffffffff82232160 t enable_hpo_dp_link_output +ffffffff82232290 t set_hpo_dp_link_test_pattern +ffffffff822322d0 t set_hpo_dp_lane_settings +ffffffff82232300 t update_hpo_dp_stream_allocation_table +ffffffff82232320 t setup_hpo_dp_stream_encoder +ffffffff822324a0 t reset_hpo_dp_stream_encoder +ffffffff82232590 t setup_hpo_dp_stream_attribute +ffffffff822325f0 t disable_hpo_dp_link_output +ffffffff82233000 T virtual_link_encoder_construct +ffffffff82233060 t virtual_link_encoder_validate_output_with_stream +ffffffff82233090 t virtual_link_encoder_hw_init +ffffffff822330c0 t virtual_link_encoder_setup +ffffffff822330f0 t virtual_link_encoder_enable_tmds_output +ffffffff82233120 t virtual_link_encoder_enable_dp_output +ffffffff82233150 t virtual_link_encoder_enable_dp_mst_output +ffffffff82233180 t virtual_link_encoder_disable_output +ffffffff822331b0 t virtual_link_encoder_dp_set_lane_settings +ffffffff822331e0 t virtual_link_encoder_dp_set_phy_pattern +ffffffff82233210 t virtual_link_encoder_update_mst_stream_allocation_table +ffffffff82233240 t virtual_link_encoder_connect_dig_be_to_fe +ffffffff82233270 t virtual_link_encoder_destroy +ffffffff822332c0 t virtual_link_encoder_get_max_link_cap +ffffffff82234000 T virtual_setup_stream_encoder +ffffffff82234030 T virtual_setup_stream_attribute +ffffffff82234060 T virtual_reset_stream_encoder +ffffffff82234090 T get_virtual_link_hwss +ffffffff822340c0 t virtual_disable_link_output +ffffffff82235000 T virtual_stream_encoder_construct +ffffffff82235050 T virtual_stream_encoder_create +ffffffff82235110 t virtual_stream_encoder_dp_set_stream_attribute +ffffffff82235140 t virtual_stream_encoder_hdmi_set_stream_attribute +ffffffff82235170 t virtual_stream_encoder_dvi_set_stream_attribute +ffffffff822351a0 t virtual_stream_encoder_set_throttled_vcp_size +ffffffff822351d0 t virtual_stream_encoder_update_hdmi_info_packets +ffffffff82235200 t virtual_stream_encoder_stop_hdmi_info_packets +ffffffff82235230 t virtual_stream_encoder_update_dp_info_packets +ffffffff82235260 t virtual_stream_encoder_stop_dp_info_packets +ffffffff82235290 t virtual_stream_encoder_dp_blank +ffffffff822352c0 t virtual_stream_encoder_dp_unblank +ffffffff822352f0 t virtual_audio_mute_control +ffffffff82235320 t virtual_setup_stereo_sync +ffffffff82235350 t virtual_stream_encoder_set_avmute +ffffffff82235380 t virtual_dig_connect_to_otg +ffffffff822353b0 t virtual_stream_encoder_reset_hdmi_stream_attribute +ffffffff822353e0 t virtual_stream_encoder_set_dsc_pps_info_packet +ffffffff82235410 t virtual_enc_dp_set_odm_combine +ffffffff82236000 T dmub_dcn20_use_cached_inbox +ffffffff82236040 T dmub_dcn20_reset +ffffffff82236210 T dmub_dcn20_reset_release +ffffffff822362e0 T dmub_dcn20_backdoor_load +ffffffff82236590 T dmub_dcn20_setup_windows +ffffffff82236b00 T dmub_dcn20_setup_mailbox +ffffffff82236b60 T dmub_dcn20_get_inbox1_rptr +ffffffff82236b90 T dmub_dcn20_set_inbox1_wptr +ffffffff82236bc0 T dmub_dcn20_setup_out_mailbox +ffffffff82236c20 T dmub_dcn20_get_outbox1_wptr +ffffffff82236c50 T dmub_dcn20_set_outbox1_rptr +ffffffff82236c80 T dmub_dcn20_setup_outbox0 +ffffffff82236cd0 T dmub_dcn20_get_outbox0_wptr +ffffffff82236d00 T dmub_dcn20_set_outbox0_rptr +ffffffff82236d30 T dmub_dcn20_is_hw_init +ffffffff82236d90 T dmub_dcn20_is_supported +ffffffff82236df0 T dmub_dcn20_set_gpint +ffffffff82236e20 T dmub_dcn20_is_gpint_acked +ffffffff82236e80 T dmub_dcn20_get_gpint_response +ffffffff82236eb0 T dmub_dcn20_get_fw_boot_status +ffffffff82236ee0 T dmub_dcn20_enable_dmub_boot_options +ffffffff82236f10 T dmub_dcn20_skip_dmub_panel_power_sequence +ffffffff82236f70 T dmub_dcn20_get_current_time +ffffffff82236fa0 T dmub_dcn20_get_diagnostic_data +ffffffff82238000 T dmub_dcn21_is_phy_init +ffffffff82239000 T dmub_dcn30_backdoor_load +ffffffff82239260 T dmub_dcn30_setup_windows +ffffffff8223a000 T dmub_dcn31_reset +ffffffff8223a280 T dmub_dcn31_reset_release +ffffffff8223a350 T dmub_dcn31_backdoor_load +ffffffff8223a5b0 T dmub_dcn31_setup_windows +ffffffff8223a8f0 T dmub_dcn31_setup_mailbox +ffffffff8223a940 T dmub_dcn31_get_inbox1_rptr +ffffffff8223a970 T dmub_dcn31_set_inbox1_wptr +ffffffff8223a9a0 T dmub_dcn31_setup_out_mailbox +ffffffff8223a9f0 T dmub_dcn31_get_outbox1_wptr +ffffffff8223aa20 T dmub_dcn31_set_outbox1_rptr +ffffffff8223aa50 T dmub_dcn31_is_hw_init +ffffffff8223aad0 T dmub_dcn31_is_supported +ffffffff8223ab30 T dmub_dcn31_set_gpint +ffffffff8223ab60 T dmub_dcn31_is_gpint_acked +ffffffff8223abc0 T dmub_dcn31_get_gpint_response +ffffffff8223abf0 T dmub_dcn31_get_gpint_dataout +ffffffff8223ad10 T dmub_dcn31_get_fw_boot_status +ffffffff8223ad40 T dmub_dcn31_enable_dmub_boot_options +ffffffff8223adc0 T dmub_dcn31_skip_dmub_panel_power_sequence +ffffffff8223ae20 T dmub_dcn31_setup_outbox0 +ffffffff8223ae70 T dmub_dcn31_get_outbox0_wptr +ffffffff8223aea0 T dmub_dcn31_set_outbox0_rptr +ffffffff8223aed0 T dmub_dcn31_get_current_time +ffffffff8223af00 T dmub_dcn31_get_diagnostic_data +ffffffff8223b3a0 T dmub_dcn31_should_detect +ffffffff8223c000 T dmub_dcn32_reset +ffffffff8223c1d0 T dmub_dcn32_reset_release +ffffffff8223c2c0 T dmub_dcn32_backdoor_load +ffffffff8223c520 T dmub_dcn32_backdoor_load_zfb_mode +ffffffff8223c710 T dmub_dcn32_setup_windows +ffffffff8223ca50 T dmub_dcn32_setup_mailbox +ffffffff8223caa0 T dmub_dcn32_get_inbox1_rptr +ffffffff8223cad0 T dmub_dcn32_set_inbox1_wptr +ffffffff8223cb00 T dmub_dcn32_setup_out_mailbox +ffffffff8223cb50 T dmub_dcn32_get_outbox1_wptr +ffffffff8223cb80 T dmub_dcn32_set_outbox1_rptr +ffffffff8223cbb0 T dmub_dcn32_is_hw_init +ffffffff8223cc30 T dmub_dcn32_is_supported +ffffffff8223cc90 T dmub_dcn32_set_gpint +ffffffff8223ccc0 T dmub_dcn32_is_gpint_acked +ffffffff8223cd20 T dmub_dcn32_get_gpint_response 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T mod_freesync_destroy +ffffffff822490b0 T mod_freesync_calc_v_total_from_refresh +ffffffff82249140 T mod_freesync_get_vmin_vmax +ffffffff82249180 T mod_freesync_get_v_position +ffffffff82249200 T mod_freesync_build_vrr_infopacket +ffffffff82249950 T mod_freesync_build_vrr_params +ffffffff82249cd0 T mod_freesync_calc_nominal_field_rate +ffffffff82249d30 T mod_freesync_handle_preflip +ffffffff8224a150 T mod_freesync_handle_v_update +ffffffff8224a610 T mod_freesync_get_settings +ffffffff8224a680 T mod_freesync_calc_field_rate_from_timing +ffffffff8224a6d0 T mod_freesync_get_freesync_enabled +ffffffff8224a700 T mod_freesync_is_valid_range +ffffffff8224b000 T mod_build_vsc_infopacket +ffffffff8224b200 T mod_build_hf_vsif_infopacket +ffffffff8224c000 T dmub_init_abm_config +ffffffff8224c540 t fill_iram_v_2_3 +ffffffff8224c9a0 T dmcu_load_iram +ffffffff8224d180 T is_psr_su_specific_panel +ffffffff8224d210 T mod_power_calc_psr_configs +ffffffff8224d310 T mod_power_only_edp +ffffffff8224e000 T mod_vmid_get_for_ptb +ffffffff8224e230 T mod_vmid_reset +ffffffff8224e2f0 T mod_vmid_create +ffffffff8224e430 T mod_vmid_destroy +ffffffff8224f000 T amdgpu_dpm_get_sclk +ffffffff8224f090 T amdgpu_dpm_get_mclk +ffffffff8224f120 T amdgpu_dpm_set_powergating_by_smu +ffffffff8224f200 T amdgpu_dpm_set_gfx_power_up_by_imu +ffffffff8224f310 T amdgpu_dpm_baco_enter +ffffffff8224f3a0 T amdgpu_dpm_baco_exit +ffffffff8224f430 T amdgpu_dpm_set_mp1_state +ffffffff8224f4d0 T amdgpu_dpm_is_baco_supported +ffffffff8224f580 T amdgpu_dpm_mode2_reset +ffffffff8224f610 T amdgpu_dpm_baco_reset +ffffffff8224f6c0 T amdgpu_dpm_is_mode1_reset_supported +ffffffff8224f730 T amdgpu_dpm_mode1_reset +ffffffff8224f7b0 T amdgpu_dpm_switch_power_profile +ffffffff8224f860 T amdgpu_dpm_set_xgmi_pstate +ffffffff8224f900 T amdgpu_dpm_set_df_cstate +ffffffff8224f9a0 T amdgpu_dpm_allow_xgmi_power_down +ffffffff8224fa20 T amdgpu_dpm_enable_mgpu_fan_boost +ffffffff8224fab0 T amdgpu_dpm_set_clockgating_by_smu +ffffffff8224fb50 T amdgpu_dpm_smu_i2c_bus_access +ffffffff8224fbf0 T amdgpu_pm_acpi_event_handler +ffffffff8224fcb0 T amdgpu_dpm_read_sensor +ffffffff8224fd70 T amdgpu_dpm_compute_clocks +ffffffff8224fe50 T amdgpu_dpm_enable_uvd +ffffffff82250040 T amdgpu_dpm_enable_vce +ffffffff82250230 T amdgpu_dpm_enable_jpeg +ffffffff82250330 T amdgpu_pm_load_smu_firmware +ffffffff822503e0 T amdgpu_dpm_handle_passthrough_sbr +ffffffff82250460 T amdgpu_dpm_send_hbm_bad_pages_num +ffffffff822504e0 T amdgpu_dpm_send_hbm_bad_channel_flag +ffffffff82250560 T amdgpu_dpm_get_dpm_freq_range +ffffffff82250600 T amdgpu_dpm_set_soft_freq_range +ffffffff822506a0 T amdgpu_dpm_write_watermarks_table +ffffffff82250720 T amdgpu_dpm_wait_for_event +ffffffff822507b0 T amdgpu_dpm_set_residency_gfxoff +ffffffff82250830 T amdgpu_dpm_get_residency_gfxoff +ffffffff822508b0 T amdgpu_dpm_get_entrycount_gfxoff +ffffffff82250930 T amdgpu_dpm_get_status_gfxoff +ffffffff822509b0 T amdgpu_dpm_get_thermal_throttling_counter +ffffffff82250a00 T amdgpu_dpm_gfx_state_change +ffffffff82250a70 T amdgpu_dpm_get_ecc_info +ffffffff82250af0 T amdgpu_dpm_get_vce_clock_state +ffffffff82250b80 T amdgpu_dpm_get_current_power_state +ffffffff82250bf0 T amdgpu_dpm_set_power_state +ffffffff82250d50 T amdgpu_dpm_dispatch_task +ffffffff82250df0 T amdgpu_dpm_get_performance_level +ffffffff82250e80 T amdgpu_dpm_force_performance_level +ffffffff82251060 T amdgpu_dpm_get_pp_num_states +ffffffff822510f0 T amdgpu_dpm_get_pp_table +ffffffff82251180 T amdgpu_dpm_set_fine_grain_clk_vol +ffffffff82251220 T amdgpu_dpm_odn_edit_dpm_table +ffffffff822512c0 T amdgpu_dpm_print_clock_levels +ffffffff82251350 T amdgpu_dpm_emit_clock_levels +ffffffff822513f0 T amdgpu_dpm_set_ppfeature_status +ffffffff82251480 T amdgpu_dpm_get_ppfeature_status +ffffffff82251510 T amdgpu_dpm_force_clock_level +ffffffff822515a0 T amdgpu_dpm_get_sclk_od +ffffffff82251620 T amdgpu_dpm_set_sclk_od +ffffffff822517a0 T amdgpu_dpm_get_mclk_od +ffffffff82251820 T amdgpu_dpm_set_mclk_od +ffffffff822519a0 T amdgpu_dpm_get_power_profile_mode +ffffffff82251a30 T amdgpu_dpm_set_power_profile_mode +ffffffff82251ad0 T amdgpu_dpm_get_gpu_metrics +ffffffff82251b60 T amdgpu_dpm_get_fan_control_mode +ffffffff82251bf0 T amdgpu_dpm_set_fan_speed_pwm +ffffffff82251c80 T amdgpu_dpm_get_fan_speed_pwm +ffffffff82251d10 T amdgpu_dpm_get_fan_speed_rpm +ffffffff82251da0 T amdgpu_dpm_set_fan_speed_rpm +ffffffff82251e30 T amdgpu_dpm_set_fan_control_mode +ffffffff82251ec0 T amdgpu_dpm_get_power_limit +ffffffff82251f70 T amdgpu_dpm_set_power_limit +ffffffff82252000 T amdgpu_dpm_is_cclk_dpm_supported +ffffffff82252070 T amdgpu_dpm_debugfs_print_current_performance_level +ffffffff82252100 T amdgpu_dpm_get_smu_prv_buf_details +ffffffff822521a0 T amdgpu_dpm_is_overdrive_supported +ffffffff82252240 T amdgpu_dpm_set_pp_table +ffffffff822522e0 T amdgpu_dpm_get_num_cpu_cores +ffffffff82252330 T amdgpu_dpm_stb_debug_fs_init +ffffffff82252380 T amdgpu_dpm_display_configuration_change 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amdgpu_dpm_get_vblank_time +ffffffff82253150 T amdgpu_dpm_get_vrefresh +ffffffff82254000 T amdgpu_pm_sysfs_init +ffffffff82254030 T amdgpu_pm_sysfs_fini +ffffffff82254060 T amdgpu_debugfs_pm_init +ffffffff82255000 T amdgpu_dpm_print_class_info +ffffffff822552b0 T amdgpu_dpm_print_cap_info +ffffffff82255340 T amdgpu_dpm_print_ps_status +ffffffff822553d0 T amdgpu_pm_print_power_states +ffffffff82255490 T amdgpu_get_platform_caps +ffffffff82255530 T amdgpu_parse_extended_power_table +ffffffff82256540 T amdgpu_free_extended_power_table +ffffffff82256650 T amdgpu_add_thermal_controller +ffffffff82256a80 T amdgpu_get_vce_clock_state +ffffffff82256ac0 T amdgpu_legacy_dpm_compute_clocks +ffffffff82256f30 T amdgpu_dpm_thermal_work_handler +ffffffff82258000 t pp_early_init +ffffffff82258100 t pp_late_init +ffffffff82258220 t pp_sw_init +ffffffff82258240 t pp_sw_fini +ffffffff822582d0 t pp_hw_init +ffffffff82258330 t pp_hw_fini +ffffffff82258370 t pp_late_fini +ffffffff822583d0 t pp_suspend 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pp_dpm_get_pp_num_states +ffffffff82258d40 t pp_dpm_get_pp_table +ffffffff82258d90 t pp_dpm_set_pp_table +ffffffff82258ec0 t pp_dpm_switch_power_profile +ffffffff82259000 t pp_dpm_get_vce_clock_state +ffffffff82259050 t pp_dpm_dispatch_tasks +ffffffff82259090 t pp_dpm_load_fw +ffffffff82259100 t pp_dpm_fw_loading_complete +ffffffff82259130 t pp_set_powergating_by_smu +ffffffff822592b0 t pp_set_clockgating_by_smu +ffffffff82259320 t pp_set_power_limit +ffffffff822593e0 t pp_get_power_limit +ffffffff82259480 t pp_get_power_profile_mode +ffffffff822594e0 t pp_set_power_profile_mode +ffffffff82259540 t pp_set_fine_grain_clk_vol +ffffffff822595a0 t pp_odn_edit_dpm_table +ffffffff82259600 t pp_dpm_set_mp1_state +ffffffff82259660 t pp_smu_i2c_bus_access +ffffffff822596c0 t pp_gfx_state_change_set +ffffffff82259720 t pp_dpm_get_sclk +ffffffff82259770 t pp_dpm_get_mclk +ffffffff822597c0 t pp_display_configuration_change +ffffffff82259810 t pp_get_display_power_level +ffffffff82259850 t pp_get_current_clocks +ffffffff82259970 t pp_get_clock_by_type +ffffffff822599c0 t pp_get_clock_by_type_with_latency +ffffffff82259a10 t pp_get_clock_by_type_with_voltage +ffffffff82259a60 t pp_set_watermarks_for_clocks_ranges +ffffffff82259aa0 t pp_display_clock_voltage_request +ffffffff82259ae0 t pp_get_display_mode_validation_clocks +ffffffff82259b40 t pp_notify_smu_enable_pwe +ffffffff82259ba0 t pp_enable_mgpu_fan_boost +ffffffff82259c00 t pp_set_active_display_count +ffffffff82259c40 t pp_set_hard_min_dcefclk_by_freq +ffffffff82259ca0 t pp_set_hard_min_fclk_by_freq +ffffffff82259d00 t pp_set_min_deep_sleep_dcefclk +ffffffff82259d60 t pp_get_asic_baco_capability +ffffffff82259dd0 t pp_get_asic_baco_state +ffffffff82259e30 t pp_set_asic_baco_state +ffffffff82259ea0 t pp_get_ppfeature_status +ffffffff82259f00 t pp_set_ppfeature_status +ffffffff82259f50 t pp_asic_reset_mode_2 +ffffffff82259fb0 t pp_set_df_cstate +ffffffff8225a010 t pp_set_xgmi_pstate +ffffffff8225a070 t pp_get_gpu_metrics +ffffffff8225a0d0 t pp_get_prv_buffer_details +ffffffff8225a150 t pp_pm_compute_clocks +ffffffff8225b000 T ci_baco_set_state +ffffffff8225c000 T baco_program_registers +ffffffff8225c0d0 t baco_cmd_handler +ffffffff8225c250 T soc15_baco_program_registers +ffffffff8225d000 T fiji_baco_set_state +ffffffff8225e000 T phm_setup_asic +ffffffff8225e050 T phm_power_down_asic +ffffffff8225e0a0 T phm_set_power_state +ffffffff8225e110 T phm_enable_dynamic_state_management +ffffffff8225e1c0 T phm_disable_dynamic_state_management +ffffffff8225e260 T phm_force_dpm_levels +ffffffff8225e2b0 T phm_apply_state_adjust_rules +ffffffff8225e300 T phm_apply_clock_adjust_rules +ffffffff8225e350 T phm_powerdown_uvd +ffffffff8225e3a0 T phm_disable_clock_power_gatings +ffffffff8225e3f0 T phm_pre_display_configuration_changed +ffffffff8225e450 T phm_display_configuration_changed +ffffffff8225e4b0 T phm_notify_smc_display_config_after_ps_adjustment +ffffffff8225e510 T phm_stop_thermal_controller +ffffffff8225e570 T phm_register_irq_handlers +ffffffff8225e5c0 T phm_start_thermal_controller +ffffffff8225e700 T phm_check_smc_update_required_for_display_configuration +ffffffff8225e760 T phm_check_states_equal +ffffffff8225e7b0 T phm_store_dal_configuration_data +ffffffff8225e900 T phm_get_dal_power_level +ffffffff8225e960 T phm_set_cpu_power_state +ffffffff8225e9b0 T phm_get_performance_level +ffffffff8225ea10 T phm_get_clock_info +ffffffff8225eb90 T phm_get_current_shallow_sleep_clocks +ffffffff8225ebe0 T phm_get_clock_by_type +ffffffff8225ec30 T phm_get_clock_by_type_with_latency +ffffffff8225ec80 T phm_get_clock_by_type_with_voltage +ffffffff8225ecd0 T phm_set_watermarks_for_clocks_ranges +ffffffff8225ed20 T phm_display_clock_voltage_request +ffffffff8225ed70 T phm_get_max_high_clocks +ffffffff8225edc0 T phm_disable_smc_firmware_ctf +ffffffff8225ee20 T phm_set_active_display_count +ffffffff8225f000 T hwmgr_early_init +ffffffff8225f470 T hwmgr_sw_init +ffffffff8225f4e0 T hwmgr_sw_fini +ffffffff8225f530 T hwmgr_hw_init +ffffffff8225f6f0 T hwmgr_hw_fini +ffffffff8225f7b0 T hwmgr_suspend +ffffffff8225f830 T hwmgr_resume +ffffffff8225f8d0 T hwmgr_handle_task +ffffffff82260000 T polaris_baco_set_state +ffffffff82261000 T pp_override_get_default_fuse_value +ffffffff82262000 T psm_init_power_state_table +ffffffff822622a0 T psm_fini_power_state_table +ffffffff82262360 T psm_set_boot_states +ffffffff82262420 T psm_set_performance_states +ffffffff822624e0 T psm_set_user_performance_state +ffffffff82262580 T psm_adjust_power_state_dynamic +ffffffff82263000 T atomctrl_initialize_mc_reg_table +ffffffff82263210 T atomctrl_initialize_mc_reg_table_v2_2 +ffffffff82263420 T atomctrl_set_engine_dram_timings_rv770 +ffffffff82263490 T atomctrl_get_memory_pll_dividers_si +ffffffff82263570 T atomctrl_get_memory_pll_dividers_vi +ffffffff822635f0 T atomctrl_get_memory_pll_dividers_ai +ffffffff822636a0 T atomctrl_get_engine_pll_dividers_kong +ffffffff82263720 T atomctrl_get_engine_pll_dividers_vi +ffffffff822637e0 T atomctrl_get_engine_pll_dividers_ai +ffffffff822638c0 T atomctrl_get_dfs_pll_dividers_vi +ffffffff82263980 T atomctrl_get_reference_clock +ffffffff822639e0 T atomctrl_is_voltage_controlled_by_gpio_v3 +ffffffff82263aa0 T atomctrl_get_voltage_table_v3 +ffffffff82263c00 T atomctrl_get_pp_assign_pin +ffffffff82263cf0 T atomctrl_calculate_voltage_evv_on_sclk +ffffffff82264070 T atomctrl_get_voltage_evv_on_sclk +ffffffff822640f0 T atomctrl_get_voltage_evv +ffffffff822641a0 T atomctrl_get_mpll_reference_clock +ffffffff82264210 T atomctrl_is_asic_internal_ss_supported +ffffffff82264260 T atomctrl_get_memory_clock_spread_spectrum +ffffffff82264360 T atomctrl_get_engine_clock_spread_spectrum +ffffffff82264460 T atomctrl_read_efuse +ffffffff82264510 T atomctrl_set_ac_timing_ai +ffffffff82264570 T atomctrl_get_voltage_evv_on_sclk_ai +ffffffff822645f0 T atomctrl_get_smc_sclk_range_table +ffffffff822646b0 T atomctrl_get_vddc_shared_railinfo +ffffffff82264720 T atomctrl_get_avfs_information +ffffffff822648a0 T atomctrl_get_svi2_info +ffffffff82264980 T atomctrl_get_leakage_id_from_efuse +ffffffff822649e0 T atomctrl_get_leakage_vddc_base_on_leakage +ffffffff82264b80 T atomctrl_get_voltage_range +ffffffff82264c40 T atomctrl_get_edc_hilo_leakage_offset_table +ffffffff82264cc0 T atomctrl_get_edc_leakage_table +ffffffff82265000 T pp_atomfwctrl_is_voltage_controlled_by_gpio_v4 +ffffffff822650d0 T pp_atomfwctrl_get_voltage_table_v4 +ffffffff82265290 T pp_atomfwctrl_get_pp_assign_pin +ffffffff82265370 T pp_atomfwctrl_enter_self_refresh +ffffffff822653a0 T pp_atomfwctrl_get_gpu_pll_dividers_vega10 +ffffffff82265450 T pp_atomfwctrl_get_avfs_information +ffffffff82265780 T pp_atomfwctrl_get_gpio_information +ffffffff82265820 T pp_atomfwctrl_get_clk_information_by_clkid +ffffffff822658a0 T pp_atomfwctrl_get_vbios_bootup_values +ffffffff82265c20 T pp_atomfwctrl_get_smc_dpm_information +ffffffff82266000 T encode_pcie_lane_width +ffffffff82266030 T decode_pcie_lane_width +ffffffff82267000 t pp_tables_v1_0_initialize +ffffffff82268430 t pp_tables_v1_0_uninitialize +ffffffff822685e0 T get_number_of_powerplay_table_entries_v1_0 +ffffffff82268690 T get_powerplay_table_entry_v1_0 +ffffffff82269000 T pp_tables_get_response_times +ffffffff822690d0 T pp_tables_get_num_of_entries +ffffffff82269190 T pp_tables_get_entry +ffffffff822694f0 t init_non_clock_fields +ffffffff82269670 t pp_tables_initialize +ffffffff8226aad0 t pp_tables_uninitialize +ffffffff8226acd0 t get_number_of_vce_state_table_entries +ffffffff8226add0 t get_vce_state_table_entry +ffffffff8226b000 T smu10_init_function_pointers +ffffffff8226b040 t smu10_hwmgr_backend_init +ffffffff8226b710 t smu10_hwmgr_backend_fini +ffffffff8226b850 t smu10_setup_asic_task +ffffffff8226b8c0 t smu10_get_power_state_size +ffffffff8226b8f0 t smu10_apply_state_adjust_rules +ffffffff8226b920 t smu10_dpm_force_dpm_level +ffffffff8226bea0 t smu10_enable_dpm_tasks +ffffffff8226bf20 t smu10_disable_dpm_tasks +ffffffff8226bf50 t smu10_dpm_patch_boot_state +ffffffff8226bf80 t smu10_dpm_get_pp_table_entry +ffffffff8226bfe0 t smu10_dpm_get_num_of_pp_table_entries +ffffffff8226c030 t smu10_powergate_vcn +ffffffff8226c0d0 t smu10_dpm_get_mclk +ffffffff8226c130 t smu10_dpm_get_sclk +ffffffff8226c180 t smu10_set_power_state_tasks +ffffffff8226c1f0 t smu10_set_cpu_power_state +ffffffff8226c220 t smu10_store_cc6_data +ffffffff8226c290 t smu10_get_dal_power_level +ffffffff8226c2c0 t smu10_get_performance_level +ffffffff8226c350 t smu10_get_current_shallow_sleep_clocks +ffffffff8226c3b0 t smu10_get_clock_by_type_with_latency +ffffffff8226c500 t smu10_get_clock_by_type_with_voltage +ffffffff8226c610 t smu10_set_watermarks_for_clocks_ranges +ffffffff8226c6e0 t smu10_display_clock_voltage_request +ffffffff8226c780 t smu10_get_max_high_clocks +ffffffff8226c7b0 t smu10_power_off_asic +ffffffff8226c800 t smu10_force_clock_level +ffffffff8226c9c0 t smu10_print_clock_levels +ffffffff8226cd60 t smu10_gfx_off_control +ffffffff8226ce70 t smu10_read_sensor +ffffffff8226cff0 t smu10_set_active_display_count +ffffffff8226d050 t smu10_set_min_deep_sleep_dcefclk +ffffffff8226d0b0 t smu10_get_power_profile_mode +ffffffff8226d0f0 t smu10_set_power_profile_mode +ffffffff8226d240 t smu10_set_fine_grain_clk_vol +ffffffff8226d450 t smu10_powergate_mmhub +ffffffff8226d470 t smu10_smus_notify_pwe +ffffffff8226d490 t smu10_powergate_sdma +ffffffff8226d4b0 t smu10_set_hard_min_dcefclk_by_freq +ffffffff8226d510 t smu10_set_hard_min_fclk_by_freq +ffffffff8226d570 t smu10_set_hard_min_gfxclk_by_freq +ffffffff8226d5d0 t smu10_set_soft_max_gfxclk_by_freq +ffffffff8226d630 t smu10_asic_reset +ffffffff8226d650 t smu10_gfx_state_change +ffffffff8226d690 t smu10_dpm_get_pp_table_entry_callback +ffffffff8226e000 T smu7_baco_get_capability +ffffffff8226e060 T smu7_baco_get_state +ffffffff8226e0b0 T smu7_baco_set_state +ffffffff8226f000 T smu7_powerdown_uvd +ffffffff8226f050 T smu7_disable_clock_power_gating +ffffffff8226f0e0 T smu7_powergate_uvd +ffffffff8226f1d0 T smu7_powergate_vce +ffffffff8226f2c0 T smu7_update_clock_gatings +ffffffff8226f670 T smu7_powergate_gfx +ffffffff82270000 T smu7_get_sleep_divider_id_from_clock +ffffffff822700a0 T smu7_init_function_pointers +ffffffff82270100 t smu7_hwmgr_backend_init +ffffffff82271f50 t smu7_hwmgr_backend_fini +ffffffff82271fc0 t smu7_setup_asic_task +ffffffff82272330 t smu7_get_power_state_size +ffffffff82272360 t smu7_apply_state_adjust_rules +ffffffff822727e0 t smu7_force_dpm_level +ffffffff82272c10 t smu7_enable_dpm_tasks +ffffffff82275380 t smu7_disable_dpm_tasks +ffffffff82275ac0 t smu7_dpm_patch_boot_state +ffffffff82275c00 t smu7_get_pp_table_entry +ffffffff82276000 t smu7_get_number_of_powerplay_table_entries +ffffffff82276070 t smu7_dpm_get_mclk +ffffffff82276110 t smu7_dpm_get_sclk +ffffffff822761b0 t smu7_set_power_state_tasks +ffffffff82276f40 t smu7_notify_smc_display_config_after_ps_adjustment +ffffffff82276f70 t smu7_display_configuration_changed_task +ffffffff82277130 t smu7_set_max_fan_rpm_output +ffffffff82277160 t smu7_set_max_fan_pwm_output +ffffffff82277180 t smu7_set_fan_control_mode +ffffffff82277210 t smu7_get_fan_control_mode +ffffffff82277250 t smu7_register_irq_handlers +ffffffff82277300 t smu7_check_smc_update_required_for_display_configuration +ffffffff822773c0 t smu7_check_states_equal +ffffffff82277560 t smu7_get_performance_level +ffffffff82277600 t smu7_get_clock_by_type +ffffffff822777c0 t smu7_get_clock_by_type_with_latency +ffffffff82277960 t smu7_set_watermarks_for_clocks_ranges +ffffffff82277ba0 t smu7_get_max_high_clocks +ffffffff82277c20 t smu7_power_off_asic +ffffffff82277c80 t smu7_force_clock_level +ffffffff82277d90 t smu7_print_clock_levels +ffffffff82278370 t smu7_get_sclk_od +ffffffff822783e0 t smu7_set_sclk_od +ffffffff822784a0 t smu7_get_mclk_od +ffffffff82278510 t smu7_set_mclk_od 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smu7_enable_power_containment +ffffffff8227bb70 T smu7_disable_power_containment +ffffffff8227bc90 T smu7_power_control_set_level +ffffffff8227c000 T smu7_fan_ctrl_get_fan_speed_info +ffffffff8227c080 T smu7_fan_ctrl_get_fan_speed_pwm +ffffffff8227c140 T smu7_fan_ctrl_get_fan_speed_rpm +ffffffff8227c1f0 T smu7_fan_ctrl_set_static_mode +ffffffff8227c320 T smu7_fan_ctrl_set_default_mode +ffffffff8227c400 T smu7_fan_ctrl_start_smc_fan_control +ffffffff8227c530 T smu7_fan_ctrl_stop_smc_fan_control +ffffffff8227c550 T smu7_fan_ctrl_set_fan_speed_pwm +ffffffff8227c740 T smu7_fan_ctrl_reset_fan_speed_to_default +ffffffff8227c930 T smu7_fan_ctrl_set_fan_speed_rpm +ffffffff8227cb10 T smu7_thermal_get_temperature +ffffffff8227cb70 T smu7_thermal_disable_alert +ffffffff8227cc10 T smu7_thermal_stop_thermal_controller +ffffffff8227cd90 T smu7_start_thermal_controller +ffffffff8227d140 T smu7_thermal_ctrl_uninitialize_thermal_controller +ffffffff8227e000 T smu8_init_function_pointers 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smu8_get_current_shallow_sleep_clocks +ffffffff8227fdf0 t smu8_get_clock_by_type +ffffffff8227ff30 t smu8_get_max_high_clocks +ffffffff8227fff0 t smu8_power_off_asic +ffffffff82280070 t smu8_force_clock_level +ffffffff822800e0 t smu8_print_clock_levels +ffffffff822802b0 t smu8_read_sensor +ffffffff822805b0 t smu8_notify_cac_buffer_info +ffffffff82280660 t smu8_get_thermal_temperature_range +ffffffff822806e0 t smu8_dpm_get_pp_table_entry_callback +ffffffff82281000 T smu9_baco_get_capability +ffffffff822810d0 T smu9_baco_get_state +ffffffff82282000 T convert_to_vid +ffffffff82282050 T convert_to_vddc +ffffffff822820a0 T phm_copy_clock_limits_array +ffffffff82282180 T phm_copy_overdrive_settings_limits_array +ffffffff82282260 T phm_set_field_to_u32 +ffffffff822822c0 T phm_wait_on_register +ffffffff822823d0 T phm_wait_on_indirect_register +ffffffff82282500 T phm_wait_for_register_unequal +ffffffff82282600 T phm_wait_for_indirect_register_unequal +ffffffff82282730 T phm_cf_want_uvd_power_gating +ffffffff82282770 T phm_cf_want_vce_power_gating +ffffffff822827b0 T phm_trim_voltage_table +ffffffff822828e0 T phm_get_svi2_mvdd_voltage_table +ffffffff82282a70 T phm_get_svi2_vddci_voltage_table +ffffffff82282c00 T phm_get_svi2_vdd_voltage_table +ffffffff82282ca0 T phm_trim_voltage_table_to_fit_state_table +ffffffff82282d80 T phm_reset_single_dpm_table +ffffffff82282e50 T phm_setup_pcie_table_entry +ffffffff82282e90 T phm_get_dpm_level_enable_mask_value +ffffffff82282fb0 T phm_get_voltage_index +ffffffff82283030 T phm_get_voltage_id +ffffffff822830b0 T phm_find_closest_vddci +ffffffff82283110 T phm_find_boot_level +ffffffff82283180 T phm_get_sclk_for_voltage_evv +ffffffff82283230 T phm_initializa_dynamic_state_adjustment_rule_settings +ffffffff82283340 T phm_get_lowest_enabled_level +ffffffff82283380 T phm_apply_dal_min_voltage_request +ffffffff82283450 T phm_get_voltage_evv_on_sclk +ffffffff82283500 T phm_irq_process +ffffffff82283700 t orderly_poweroff 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vega12_fan_ctrl_get_fan_speed_info +ffffffff8229d040 T vega12_fan_ctrl_get_fan_speed_rpm +ffffffff8229d0b0 T vega12_fan_ctrl_start_smc_fan_control +ffffffff8229d0e0 T vega12_fan_ctrl_stop_smc_fan_control +ffffffff8229d110 T vega12_fan_ctrl_reset_fan_speed_to_default +ffffffff8229d140 T vega12_thermal_get_temperature +ffffffff8229d1d0 T vega12_thermal_disable_alert +ffffffff8229d260 T vega12_thermal_stop_thermal_controller +ffffffff8229d2f0 T vega12_start_thermal_controller +ffffffff8229e000 T vega20_baco_get_capability +ffffffff8229e0c0 T vega20_baco_get_state +ffffffff8229e150 T vega20_baco_set_state +ffffffff8229e350 T vega20_baco_apply_vdci_flush_workaround +ffffffff8229f000 T vega20_hwmgr_init +ffffffff8229f040 t vega20_hwmgr_backend_init +ffffffff8229f980 t vega20_hwmgr_backend_fini +ffffffff8229f9e0 t vega20_setup_asic_task +ffffffff8229fad0 t vega20_apply_clocks_adjust_rules +ffffffff8229ffc0 t vega20_dpm_force_dpm_level +ffffffff822a0730 t vega20_enable_dpm_tasks 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smum_smc_table_manager +ffffffff822c2680 T smum_stop_smc +ffffffff822c3000 t tonga_smu_init +ffffffff822c3090 t tonga_start_smu +ffffffff822c3420 t tonga_update_smc_table +ffffffff822c35c0 t tonga_process_firmware_header +ffffffff822c3700 t tonga_update_sclk_threshold +ffffffff822c3940 t tonga_thermal_setup_fan_table +ffffffff822c3bc0 t tonga_init_smc_table +ffffffff822c5a10 t tonga_populate_all_graphic_levels +ffffffff822c5ff0 t tonga_populate_all_memory_levels +ffffffff822c66d0 t tonga_initialize_mc_reg_table +ffffffff822c7250 t tonga_get_offsetof +ffffffff822c72e0 t tonga_get_mac_definition +ffffffff822c7340 t tonga_is_dpm_running +ffffffff822c7390 t tonga_update_dpm_settings +ffffffff822c7790 t tonga_program_memory_timing_parameters +ffffffff822c7950 t tonga_get_dependency_volt_by_clk +ffffffff822c8000 T vega10_enable_smc_features +ffffffff822c8040 T vega10_get_enabled_smc_features +ffffffff822c80a0 t vega10_smu_init +ffffffff822c83f0 t vega10_smu_fini +ffffffff822c84d0 t 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smu_get_status_gfxoff +ffffffff822d0150 T smu_set_soft_freq_range +ffffffff822d0190 T smu_get_dpm_freq_range +ffffffff822d01e0 T smu_set_gfx_power_up_by_imu +ffffffff822d0230 T is_support_sw_smu +ffffffff822d0270 T is_support_cclk_dpm +ffffffff822d02d0 T smu_allow_xgmi_power_down +ffffffff822d0390 T smu_write_watermarks_table +ffffffff822d0400 T smu_set_ac_dc +ffffffff822d0500 t smu_early_init +ffffffff822d0760 t smu_late_init +ffffffff822d0f10 t smu_sw_init +ffffffff822d1750 t smu_sw_fini +ffffffff822d19a0 t smu_hw_init +ffffffff822d1da0 t smu_hw_fini +ffffffff822d1ea0 t smu_late_fini +ffffffff822d1ec0 t smu_suspend +ffffffff822d1f90 t smu_resume +ffffffff822d2170 t smu_set_clockgating_state +ffffffff822d21a0 t smu_set_powergating_state +ffffffff822d21d0 T smu_get_power_limit +ffffffff822d2320 T smu_mode1_reset_is_support +ffffffff822d2370 T smu_mode2_reset_is_support +ffffffff822d23c0 T smu_mode1_reset +ffffffff822d2410 T smu_handle_passthrough_sbr +ffffffff822d2460 T smu_get_ecc_info +ffffffff822d24b0 T smu_wait_for_event +ffffffff822d2500 T smu_stb_collect_info +ffffffff822d2560 T amdgpu_smu_stb_debug_fs_init +ffffffff822d2590 T smu_send_hbm_bad_pages_num +ffffffff822d25e0 T smu_send_hbm_bad_channel_flag +ffffffff822d2630 t smu_set_fan_control_mode +ffffffff822d26f0 t smu_get_fan_control_mode +ffffffff822d2770 t smu_set_fan_speed_pwm +ffffffff822d2820 t smu_get_fan_speed_pwm +ffffffff822d2880 t smu_force_ppclk_levels +ffffffff822d29a0 t smu_print_ppclk_levels +ffffffff822d2a10 t smu_emit_ppclk_levels +ffffffff822d2a80 t smu_force_performance_level +ffffffff822d2d20 t smu_read_sensor +ffffffff822d2f20 t smu_get_performance_level +ffffffff822d2f90 t smu_get_current_power_state +ffffffff822d2ff0 t smu_get_fan_speed_rpm +ffffffff822d3050 t smu_set_fan_speed_rpm +ffffffff822d3100 t smu_get_power_num_states +ffffffff822d3180 t smu_sys_get_pp_table +ffffffff822d31f0 t smu_sys_set_pp_table +ffffffff822d33e0 t smu_switch_power_profile +ffffffff822d34f0 t smu_handle_dpm_task +ffffffff822d35a0 t smu_load_microcode +ffffffff822d3690 t smu_dpm_set_power_gate +ffffffff822d3a10 t smu_set_power_limit +ffffffff822d3b40 t smu_get_power_profile_mode +ffffffff822d3ba0 t smu_set_power_profile_mode +ffffffff822d3c00 t smu_od_edit_dpm_table +ffffffff822d3c60 t smu_set_mp1_state +ffffffff822d3cc0 t smu_gfx_state_change_set +ffffffff822d3d00 t smu_get_sclk +ffffffff822d3d80 t smu_get_mclk +ffffffff822d3e00 t smu_display_configuration_change +ffffffff822d3e90 t smu_get_clock_by_type_with_latency +ffffffff822d3f50 t smu_display_clock_voltage_request +ffffffff822d3fb0 t smu_enable_mgpu_fan_boost +ffffffff822d4010 t smu_set_display_count +ffffffff822d4080 t smu_set_deep_sleep_dcefclk +ffffffff822d40f0 t smu_get_baco_capability +ffffffff822d4150 t smu_baco_set_state +ffffffff822d4230 t smu_sys_get_pp_feature_mask +ffffffff822d42a0 t smu_sys_set_pp_feature_mask +ffffffff822d4310 t smu_mode2_reset +ffffffff822d43c0 t smu_set_df_cstate +ffffffff822d4480 t smu_set_xgmi_pstate +ffffffff822d4530 t smu_sys_get_gpu_metrics +ffffffff822d4590 t smu_set_watermarks_for_clock_ranges +ffffffff822d4610 t smu_display_disable_memory_clock_switch +ffffffff822d4670 t smu_get_max_sustainable_clocks_by_dc +ffffffff822d46d0 t smu_get_uclk_dpm_states +ffffffff822d4730 t smu_get_dpm_clock_table +ffffffff822d4790 t smu_get_prv_buffer_details +ffffffff822d4800 t smu_adjust_power_state_dynamic +ffffffff822d4a60 t smu_throttling_logging_work_fn +ffffffff822d4ab0 t smu_interrupt_work_fn +ffffffff822d4b00 t smu_smc_hw_setup +ffffffff822d5460 t smu_smc_hw_cleanup +ffffffff822d6000 T arcturus_set_ppt_funcs +ffffffff822d6050 t arcturus_run_btc +ffffffff822d6100 t arcturus_get_allowed_feature_mask +ffffffff822d6150 t arcturus_set_default_dpm_table +ffffffff822d6360 t arcturus_populate_umd_state_clk +ffffffff822d6420 t arcturus_print_clk_levels +ffffffff822d6670 t arcturus_force_clk_levels +ffffffff822d68b0 t arcturus_get_power_profile_mode +ffffffff822d6b40 t arcturus_set_power_profile_mode +ffffffff822d6e30 t arcturus_dpm_set_vcn_enable +ffffffff822d6f00 t arcturus_read_sensor +ffffffff822d70e0 t arcturus_is_dpm_running +ffffffff822d7130 t arcturus_get_fan_speed_pwm +ffffffff822d7270 t arcturus_get_fan_speed_rpm +ffffffff822d7380 t arcturus_get_thermal_temperature_range +ffffffff822d7470 t arcturus_set_performance_level +ffffffff822d7580 t arcturus_dump_pptable +ffffffff822d75b0 t arcturus_get_power_limit +ffffffff822d76c0 t arcturus_set_df_cstate +ffffffff822d77e0 t arcturus_allow_xgmi_power_down +ffffffff822d78e0 t arcturus_i2c_control_init +ffffffff822d7a10 t arcturus_i2c_control_fini +ffffffff822d7a50 t arcturus_get_unique_id +ffffffff822d7b70 t arcturus_init_smc_tables +ffffffff822d7ce0 t arcturus_setup_pptable +ffffffff822d7e20 t arcturus_set_fan_speed_pwm +ffffffff822d7fc0 t arcturus_set_fan_speed_rpm +ffffffff822d80e0 t arcturus_log_thermal_throttling_event +ffffffff822d84e0 t arcturus_get_gpu_metrics +ffffffff822d86f0 t arcturus_get_fan_parameters +ffffffff822d8730 t arcturus_get_current_clk_freq_by_table +ffffffff822d8870 t arcturus_get_smu_metrics_data +ffffffff822d8ae0 t arcturus_upload_dpm_level +ffffffff822d8bd0 t arcturus_i2c_xfer +ffffffff822d8e90 t arcturus_i2c_func +ffffffff822d8ec0 t arcturus_set_fan_static_mode +ffffffff822da000 T cyan_skillfish_set_ppt_funcs +ffffffff822da030 t cyan_skillfish_print_clk_levels +ffffffff822da150 t cyan_skillfish_od_edit_dpm_table +ffffffff822da440 t cyan_skillfish_read_sensor +ffffffff822da5f0 t cyan_skillfish_is_dpm_running +ffffffff822da690 t cyan_skillfish_init_smc_tables +ffffffff822da770 t cyan_skillfish_get_enabled_mask +ffffffff822da7b0 t cyan_skillfish_get_dpm_ultimate_freq +ffffffff822da870 t cyan_skillfish_get_gpu_metrics +ffffffff822dab10 t cyan_skillfish_get_smu_metrics_data +ffffffff822db000 T navi10_set_ppt_funcs +ffffffff822db050 t navi10_run_btc +ffffffff822db0d0 t navi10_get_allowed_feature_mask +ffffffff822db3a0 t navi10_set_default_dpm_table +ffffffff822db810 t navi10_populate_umd_state_clk +ffffffff822db990 t navi10_print_clk_levels +ffffffff822dbb20 t navi10_emit_clk_levels +ffffffff822dbd60 t navi10_force_clk_levels +ffffffff822dbe90 t navi10_od_edit_dpm_table +ffffffff822dc510 t navi10_get_clock_by_type_with_latency +ffffffff822dc610 t navi10_get_power_profile_mode +ffffffff822dc860 t navi10_set_power_profile_mode +ffffffff822dcb30 t navi10_dpm_set_vcn_enable +ffffffff822dcbc0 t navi10_dpm_set_jpeg_enable +ffffffff822dcc40 t navi10_read_sensor +ffffffff822dcdc0 t navi10_pre_display_config_changed +ffffffff822dce60 t navi10_display_config_changed +ffffffff822dcee0 t navi10_notify_smc_display_config +ffffffff822dd070 t navi10_is_dpm_running +ffffffff822dd0c0 t navi10_get_fan_speed_rpm +ffffffff822dd160 t navi10_set_watermarks_table +ffffffff822dd310 t navi10_get_thermal_temperature_range +ffffffff822dd400 t navi10_get_uclk_dpm_states +ffffffff822dd510 t navi10_set_default_od_settings +ffffffff822dd770 t navi10_display_disable_memory_clock_switch +ffffffff822dd7f0 t navi10_get_power_limit +ffffffff822dd910 t navi10_update_pcie_parameters +ffffffff822dda70 t navi10_i2c_control_init +ffffffff822ddba0 t navi10_i2c_control_fini +ffffffff822ddbe0 t navi10_init_smc_tables +ffffffff822dde10 t navi10_setup_pptable +ffffffff822de030 t navi10_baco_enter +ffffffff822de080 t navi10_baco_exit +ffffffff822de180 t navi1x_get_gpu_metrics +ffffffff822deb20 t navi10_enable_mgpu_fan_boost +ffffffff822deba0 t navi10_get_fan_parameters +ffffffff822debe0 t navi10_post_smu_init +ffffffff822deed0 t navi10_get_default_config_table_settings +ffffffff822def20 t navi10_set_config_table +ffffffff822defd0 t navi1x_get_smu_metrics_data +ffffffff822df430 t navi10_get_smu_metrics_data +ffffffff822df660 t navi10_i2c_xfer +ffffffff822df920 t navi10_i2c_func +ffffffff822df950 t navi10_umc_hybrid_cdr_workaround +ffffffff822e0000 T sienna_cichlid_set_ppt_funcs +ffffffff822e0050 t sienna_cichlid_run_btc +ffffffff822e00d0 t sienna_cichlid_get_allowed_feature_mask +ffffffff822e0350 t sienna_cichlid_set_default_dpm_table +ffffffff822e0920 t sienna_cichlid_populate_umd_state_clk +ffffffff822e09e0 t sienna_cichlid_print_clk_levels +ffffffff822e0bc0 t sienna_cichlid_force_clk_levels +ffffffff822e0cf0 t sienna_cichlid_od_edit_dpm_table +ffffffff822e1290 t sienna_cichlid_restore_user_od_settings +ffffffff822e1320 t sienna_cichlid_get_power_profile_mode +ffffffff822e1570 t sienna_cichlid_set_power_profile_mode +ffffffff822e1840 t sienna_cichlid_dpm_set_vcn_enable +ffffffff822e1900 t sienna_cichlid_dpm_set_jpeg_enable +ffffffff822e1980 t sienna_cichlid_read_sensor +ffffffff822e1c80 t sienna_cichlid_pre_display_config_changed +ffffffff822e1cb0 t sienna_cichlid_display_config_changed +ffffffff822e1d10 t sienna_cichlid_notify_smc_display_config +ffffffff822e1ea0 t sienna_cichlid_is_dpm_running +ffffffff822e1ef0 t sienna_cichlid_get_fan_speed_rpm +ffffffff822e2000 t sienna_cichlid_set_watermarks_table +ffffffff822e21a0 t sienna_cichlid_get_thermal_temperature_range +ffffffff822e2270 t sienna_cichlid_get_uclk_dpm_states +ffffffff822e2390 t sienna_cichlid_set_default_od_settings +ffffffff822e2540 t sienna_cichlid_display_disable_memory_clock_switch +ffffffff822e25c0 t sienna_cichlid_dump_pptable +ffffffff822e25f0 t sienna_cichlid_get_power_limit +ffffffff822e26c0 t sienna_cichlid_update_pcie_parameters +ffffffff822e2820 t sienna_cichlid_i2c_control_init +ffffffff822e2950 t sienna_cichlid_i2c_control_fini +ffffffff822e2990 t sienna_cichlid_get_unique_id +ffffffff822e2ae0 t sienna_cichlid_init_smc_tables +ffffffff822e2e00 t sienna_cichlid_set_mp1_state +ffffffff822e2e40 t sienna_cichlid_setup_pptable +ffffffff822e32b0 t sienna_cichlid_system_features_control +ffffffff822e3340 t sienna_cichlid_baco_enter +ffffffff822e3390 t sienna_cichlid_baco_exit +ffffffff822e3490 t sienna_cichlid_is_mode1_reset_supported +ffffffff822e3510 t sienna_cichlid_is_mode2_reset_supported +ffffffff822e3540 t sienna_cichlid_mode2_reset +ffffffff822e3670 t sienna_cichlid_get_dpm_ultimate_freq +ffffffff822e3690 t sienna_cichlid_get_gpu_metrics +ffffffff822e3b10 t sienna_cichlid_enable_mgpu_fan_boost +ffffffff822e3b60 t sienna_cichlid_get_fan_parameters +ffffffff822e3ba0 t sienna_cichlid_gpo_control +ffffffff822e3c50 t sienna_cichlid_get_ecc_info +ffffffff822e3d40 t sienna_cichlid_stb_get_data_direct +ffffffff822e3de0 t sienna_cichlid_get_default_config_table_settings +ffffffff822e3e50 t sienna_cichlid_set_config_table +ffffffff822e3f20 t sienna_cichlid_get_smu_metrics_data +ffffffff822e4360 t sienna_cichlid_get_throttler_status_locked +ffffffff822e44e0 t sienna_cichlid_get_smartshift_power_percentage +ffffffff822e4610 t sienna_cichlid_i2c_xfer +ffffffff822e48c0 t sienna_cichlid_i2c_func +ffffffff822e5000 T smu_v11_0_init_microcode +ffffffff822e52b0 T smu_v11_0_fini_microcode +ffffffff822e5330 T smu_v11_0_load_microcode +ffffffff822e5480 T smu_v11_0_check_fw_status +ffffffff822e54d0 T smu_v11_0_check_fw_version +ffffffff822e5680 T smu_v11_0_setup_pptable +ffffffff822e57b0 T smu_v11_0_init_smc_tables +ffffffff822e5910 T smu_v11_0_fini_smc_tables +ffffffff822e5b40 T smu_v11_0_init_power +ffffffff822e5bd0 T smu_v11_0_fini_power +ffffffff822e5c30 T smu_v11_0_get_vbios_bootup_values +ffffffff822e5f90 T smu_v11_0_notify_memory_pool_location +ffffffff822e6080 T smu_v11_0_set_min_deep_sleep_dcefclk +ffffffff822e6100 T smu_v11_0_set_driver_table_location +ffffffff822e6170 T smu_v11_0_set_tool_table_location +ffffffff822e61e0 T smu_v11_0_init_display_count +ffffffff822e6240 T smu_v11_0_set_allowed_mask +ffffffff822e6310 T smu_v11_0_system_features_control +ffffffff822e6330 T smu_v11_0_notify_display_change +ffffffff822e63a0 T smu_v11_0_init_max_sustainable_clocks +ffffffff822e6610 t smu_v11_0_get_max_sustainable_clock +ffffffff822e6730 T smu_v11_0_get_current_power_limit +ffffffff822e6800 T smu_v11_0_set_power_limit +ffffffff822e6940 T smu_v11_0_interrupt_work +ffffffff822e69c0 T smu_v11_0_enable_thermal_alert +ffffffff822e6a60 T smu_v11_0_disable_thermal_alert +ffffffff822e6a80 T smu_v11_0_get_gfx_vdd +ffffffff822e6b40 T smu_v11_0_display_clock_voltage_request +ffffffff822e6c80 T smu_v11_0_set_hard_freq_limited_range +ffffffff822e6d60 T smu_v11_0_gfx_off_control +ffffffff822e6dd0 T smu_v11_0_get_fan_control_mode +ffffffff822e6e20 T smu_v11_0_set_fan_speed_pwm +ffffffff822e6fc0 t smu_v11_0_set_fan_static_mode +ffffffff822e7170 T smu_v11_0_set_fan_speed_rpm +ffffffff822e7290 T smu_v11_0_get_fan_speed_pwm +ffffffff822e73d0 T smu_v11_0_get_fan_speed_rpm +ffffffff822e74d0 T smu_v11_0_set_fan_control_mode +ffffffff822e7670 T smu_v11_0_set_xgmi_pstate +ffffffff822e7690 T smu_v11_0_register_irq_handler +ffffffff822e7750 T smu_v11_0_get_max_sustainable_clocks_by_dc +ffffffff822e77e0 T smu_v11_0_set_azalia_d3_pme +ffffffff822e7800 T smu_v11_0_baco_set_armd3_sequence +ffffffff822e7820 T smu_v11_0_baco_is_support +ffffffff822e78b0 T smu_v11_0_baco_get_state +ffffffff822e78e0 T smu_v11_0_baco_set_state +ffffffff822e7b90 T smu_v11_0_baco_enter +ffffffff822e7c80 T smu_v11_0_baco_exit +ffffffff822e7d20 T smu_v11_0_mode1_reset +ffffffff822e7da0 T smu_v11_0_handle_passthrough_sbr +ffffffff822e7dc0 T smu_v11_0_get_dpm_ultimate_freq +ffffffff822e7f00 T smu_v11_0_set_soft_freq_limited_range +ffffffff822e7fe0 T smu_v11_0_set_performance_level +ffffffff822e8330 T smu_v11_0_set_power_source +ffffffff822e8390 T smu_v11_0_get_dpm_freq_by_index +ffffffff822e8440 T smu_v11_0_get_dpm_level_count +ffffffff822e84e0 T smu_v11_0_set_single_dpm_table +ffffffff822e86c0 T smu_v11_0_get_dpm_level_range +ffffffff822e8820 T smu_v11_0_get_current_pcie_link_width_level +ffffffff822e8870 T smu_v11_0_get_current_pcie_link_width +ffffffff822e88d0 T smu_v11_0_get_current_pcie_link_speed_level +ffffffff822e8920 T smu_v11_0_get_current_pcie_link_speed +ffffffff822e8980 T smu_v11_0_gfx_ulv_control +ffffffff822e89f0 T smu_v11_0_deep_sleep_control +ffffffff822e8ba0 T smu_v11_0_restore_user_od_settings +ffffffff822e8c30 T smu_v11_0_set_smu_mailbox_registers +ffffffff822e8ca0 t smu_v11_0_set_irq_state +ffffffff822e9220 t smu_v11_0_irq_process +ffffffff822e9520 t orderly_poweroff +ffffffff822ea000 T vangogh_set_ppt_funcs +ffffffff822ea040 t vangogh_set_default_dpm_tables +ffffffff822ea070 t vangogh_common_print_clk_levels +ffffffff822ea4c0 t vangogh_force_clk_levels +ffffffff822ea6f0 t vangogh_od_edit_dpm_table +ffffffff822eac50 t vangogh_get_power_profile_mode +ffffffff822ead20 t vangogh_set_power_profile_mode +ffffffff822eae50 t vangogh_dpm_set_vcn_enable +ffffffff822eaea0 t vangogh_dpm_set_jpeg_enable +ffffffff822eaef0 t vangogh_read_sensor +ffffffff822eb020 t vangogh_is_dpm_running +ffffffff822eb080 t vangogh_set_watermarks_table +ffffffff822eb210 t vangogh_set_performance_level +ffffffff822ebb40 t vangogh_get_power_limit +ffffffff822ebcc0 t vangogh_get_ppt_limit +ffffffff822ebd30 t vangogh_get_dpm_clock_table +ffffffff822ebea0 t vangogh_init_smc_tables +ffffffff822ec0f0 t vangogh_system_features_control +ffffffff822ec140 t vangogh_set_power_limit +ffffffff822ec2a0 t vangogh_get_gfxoff_status +ffffffff822ec330 t vangogh_get_gfxoff_entrycount +ffffffff822ec3a0 t vangogh_set_gfxoff_residency +ffffffff822ec410 t vangogh_get_gfxoff_residency +ffffffff822ec450 t vangogh_mode2_reset +ffffffff822ec590 t vangogh_common_get_gpu_metrics +ffffffff822ecbe0 t vangogh_post_smu_init +ffffffff822ecd90 t vangogh_set_fine_grain_gfx_freq_parameters +ffffffff822ece00 t vangogh_common_get_smu_metrics_data +ffffffff822ed150 t vangogh_force_dpm_limit_value +ffffffff822ed290 t vangogh_get_dpm_ultimate_freq +ffffffff822ed650 t vangogh_set_soft_freq_limited_range +ffffffff822ee000 T renoir_set_ppt_funcs +ffffffff822ee0a0 t renoir_get_current_power_state +ffffffff822ee120 t renoir_print_clk_levels +ffffffff822ee390 t renoir_force_clk_levels +ffffffff822ee5c0 t renoir_od_edit_dpm_table +ffffffff822ee8c0 t renoir_get_power_profile_mode +ffffffff822ee990 t renoir_set_power_profile_mode +ffffffff822eeac0 t renoir_dpm_set_vcn_enable +ffffffff822eeb40 t renoir_dpm_set_jpeg_enable +ffffffff822eebc0 t renoir_read_sensor +ffffffff822eefb0 t renoir_is_dpm_running +ffffffff822eeff0 t renoir_set_watermarks_table +ffffffff822ef1a0 t renoir_set_performance_level +ffffffff822ef6e0 t renoir_get_dpm_clock_table +ffffffff822efa30 t renoir_init_smc_tables +ffffffff822efba0 t renoir_get_enabled_mask +ffffffff822efbe0 t renoir_get_dpm_ultimate_freq +ffffffff822efe80 t renoir_get_gpu_metrics +ffffffff822f00a0 t renoir_gfx_state_change_set +ffffffff822f00d0 t renoir_set_fine_grain_gfx_freq_parameters +ffffffff822f0170 t renoir_force_dpm_limit_value +ffffffff822f1000 T smu_v12_0_check_fw_status +ffffffff822f1050 T smu_v12_0_check_fw_version +ffffffff822f1110 T smu_v12_0_powergate_sdma +ffffffff822f1150 T smu_v12_0_set_gfx_cgpg +ffffffff822f11b0 T smu_v12_0_get_gfxoff_status +ffffffff822f1240 T smu_v12_0_gfx_off_control +ffffffff822f1360 T smu_v12_0_fini_smc_tables +ffffffff822f1410 T smu_v12_0_set_default_dpm_tables +ffffffff822f1440 T smu_v12_0_mode2_reset +ffffffff822f1460 T smu_v12_0_set_soft_freq_limited_range +ffffffff822f15a0 T smu_v12_0_set_driver_table_location +ffffffff822f1610 T smu_v12_0_get_vbios_bootup_values +ffffffff822f2000 T aldebaran_set_ppt_funcs +ffffffff822f2040 t aldebaran_get_allowed_feature_mask +ffffffff822f2090 t aldebaran_set_default_dpm_table +ffffffff822f2290 t aldebaran_populate_umd_state_clk +ffffffff822f2390 t aldebaran_print_clk_levels +ffffffff822f2550 t aldebaran_force_clk_levels +ffffffff822f2700 t aldebaran_usr_edit_dpm_table +ffffffff822f2920 t aldebaran_read_sensor +ffffffff822f2bc0 t aldebaran_is_dpm_running +ffffffff822f2c10 t aldebaran_get_thermal_temperature_range +ffffffff822f2ce0 t aldebaran_set_performance_level +ffffffff822f2d90 t aldebaran_get_power_limit +ffffffff822f2f20 t aldebaran_set_df_cstate +ffffffff822f2fa0 t aldebaran_allow_xgmi_power_down +ffffffff822f3040 t aldebaran_i2c_control_init +ffffffff822f3100 t aldebaran_i2c_control_fini +ffffffff822f3140 t aldebaran_get_unique_id +ffffffff822f3220 t aldebaran_init_smc_tables +ffffffff822f33b0 t aldebaran_set_mp1_state +ffffffff822f33f0 t aldebaran_setup_pptable +ffffffff822f34c0 t aldebaran_system_features_control +ffffffff822f3620 t aldebaran_set_power_limit +ffffffff822f36b0 t aldebaran_is_baco_supported +ffffffff822f36e0 t aldebaran_is_mode1_reset_supported +ffffffff822f3710 t aldebaran_is_mode2_reset_supported +ffffffff822f3740 t aldebaran_mode1_reset +ffffffff822f3820 t aldebaran_mode2_reset +ffffffff822f39e0 t aldebaran_set_soft_freq_limited_range +ffffffff822f3bf0 t aldebaran_log_thermal_throttling_event +ffffffff822f3f00 t aldebaran_get_gpu_metrics +ffffffff822f4190 t aldebaran_smu_handle_passthrough_sbr +ffffffff822f41b0 t aldebaran_smu_send_hbm_bad_page_num +ffffffff822f4240 t aldebaran_get_ecc_info +ffffffff822f43a0 t aldebaran_send_hbm_bad_channel_flag +ffffffff822f4480 t aldebaran_get_current_clk_freq_by_table +ffffffff822f45c0 t aldebaran_get_smu_metrics_data +ffffffff822f4810 t aldebaran_upload_dpm_level +ffffffff822f4900 t aldebaran_i2c_xfer +ffffffff822f4bb0 t aldebaran_i2c_func +ffffffff822f5000 T smu_v13_0_init_microcode +ffffffff822f51d0 T smu_v13_0_fini_microcode +ffffffff822f5250 T smu_v13_0_load_microcode +ffffffff822f5280 T smu_v13_0_init_pptable_microcode +ffffffff822f5430 T smu_v13_0_get_pptable_from_firmware +ffffffff822f5560 T smu_v13_0_check_fw_status +ffffffff822f55d0 T smu_v13_0_check_fw_version +ffffffff822f5700 T smu_v13_0_setup_pptable +ffffffff822f58a0 T smu_v13_0_init_smc_tables +ffffffff822f59f0 T smu_v13_0_fini_smc_tables +ffffffff822f5be0 T smu_v13_0_init_power +ffffffff822f5c60 T smu_v13_0_fini_power +ffffffff822f5ce0 T smu_v13_0_get_vbios_bootup_values +ffffffff822f5f90 T smu_v13_0_notify_memory_pool_location +ffffffff822f6050 T smu_v13_0_set_min_deep_sleep_dcefclk +ffffffff822f60d0 T smu_v13_0_set_driver_table_location +ffffffff822f6140 T smu_v13_0_set_tool_table_location +ffffffff822f61b0 T smu_v13_0_init_display_count +ffffffff822f61f0 T smu_v13_0_set_allowed_mask +ffffffff822f62c0 T smu_v13_0_gfx_off_control +ffffffff822f6330 T smu_v13_0_system_features_control +ffffffff822f6350 T smu_v13_0_notify_display_change +ffffffff822f63c0 T smu_v13_0_init_max_sustainable_clocks +ffffffff822f6630 t smu_v13_0_get_max_sustainable_clock +ffffffff822f6750 T smu_v13_0_get_current_power_limit +ffffffff822f6820 T smu_v13_0_set_power_limit +ffffffff822f6940 T smu_v13_0_enable_thermal_alert +ffffffff822f69d0 T smu_v13_0_disable_thermal_alert +ffffffff822f6a10 T smu_v13_0_get_gfx_vdd +ffffffff822f6ad0 T smu_v13_0_display_clock_voltage_request +ffffffff822f6c10 T smu_v13_0_set_hard_freq_limited_range +ffffffff822f6cf0 T smu_v13_0_get_fan_control_mode +ffffffff822f6d40 T smu_v13_0_set_fan_speed_pwm +ffffffff822f6f50 t smu_v13_0_set_fan_static_mode +ffffffff822f7110 T smu_v13_0_set_fan_control_mode +ffffffff822f7270 T smu_v13_0_set_fan_speed_rpm +ffffffff822f7410 T smu_v13_0_set_xgmi_pstate +ffffffff822f7430 T smu_v13_0_register_irq_handler +ffffffff822f7500 T smu_v13_0_get_max_sustainable_clocks_by_dc +ffffffff822f7590 T smu_v13_0_set_azalia_d3_pme +ffffffff822f75b0 T smu_v13_0_wait_for_event +ffffffff822f7610 T smu_v13_0_get_dpm_ultimate_freq +ffffffff822f7770 T smu_v13_0_set_soft_freq_limited_range +ffffffff822f7850 T smu_v13_0_set_performance_level +ffffffff822f7fe0 T smu_v13_0_set_power_source +ffffffff822f8040 T smu_v13_0_set_single_dpm_table +ffffffff822f82d0 T smu_v13_0_get_dpm_level_range +ffffffff822f8450 T smu_v13_0_get_current_pcie_link_width_level +ffffffff822f84a0 T smu_v13_0_get_current_pcie_link_width +ffffffff822f8500 T smu_v13_0_get_current_pcie_link_speed_level +ffffffff822f8550 T smu_v13_0_get_current_pcie_link_speed +ffffffff822f85a0 T smu_v13_0_set_vcn_enable +ffffffff822f8650 T smu_v13_0_set_jpeg_enable +ffffffff822f8670 T smu_v13_0_run_btc +ffffffff822f86f0 T smu_v13_0_gpo_control +ffffffff822f8780 T smu_v13_0_deep_sleep_control +ffffffff822f89f0 T smu_v13_0_gfx_ulv_control +ffffffff822f8a60 T smu_v13_0_baco_set_armd3_sequence +ffffffff822f8a80 T smu_v13_0_baco_is_support +ffffffff822f8b10 T smu_v13_0_baco_get_state +ffffffff822f8b40 T smu_v13_0_baco_set_state +ffffffff822f8c00 T smu_v13_0_baco_enter +ffffffff822f8d10 T smu_v13_0_baco_exit +ffffffff822f8db0 T smu_v13_0_set_gfx_power_up_by_imu +ffffffff822f8df0 T smu_v13_0_od_edit_dpm_table +ffffffff822f90b0 T smu_v13_0_set_default_dpm_tables +ffffffff822f90e0 T smu_v13_0_set_smu_mailbox_registers +ffffffff822f9150 T smu_v13_0_mode1_reset +ffffffff822f91d0 t smu_v13_0_set_irq_state +ffffffff822f9750 t smu_v13_0_irq_process +ffffffff822f9a50 t orderly_poweroff +ffffffff822fa000 T smu_v13_0_0_set_ppt_funcs +ffffffff822fa0e0 t smu_v13_0_0_get_allowed_feature_mask +ffffffff822fa220 t smu_v13_0_0_set_default_dpm_table +ffffffff822fa650 t smu_v13_0_0_populate_umd_state_clk +ffffffff822fa780 t smu_v13_0_0_print_clk_levels +ffffffff822fa8a0 t smu_v13_0_0_force_clk_levels +ffffffff822faa20 t smu_v13_0_0_get_power_profile_mode +ffffffff822fac70 t smu_v13_0_0_set_power_profile_mode +ffffffff822faec0 t smu_v13_0_0_read_sensor +ffffffff822fb0e0 t smu_v13_0_0_is_dpm_running +ffffffff822fb130 t smu_v13_0_0_get_fan_speed_pwm +ffffffff822fb210 t smu_v13_0_0_get_fan_speed_rpm +ffffffff822fb280 t smu_v13_0_0_get_thermal_temperature_range +ffffffff822fb380 t smu_v13_0_0_dump_pptable +ffffffff822fb3b0 t smu_v13_0_0_get_power_limit +ffffffff822fb490 t smu_v13_0_0_set_df_cstate +ffffffff822fb4b0 t smu_v13_0_0_update_pcie_parameters +ffffffff822fb5a0 t smu_v13_0_0_i2c_control_init +ffffffff822fb6d0 t smu_v13_0_0_i2c_control_fini +ffffffff822fb710 t smu_v13_0_0_get_unique_id +ffffffff822fb7c0 t smu_v13_0_0_init_smc_tables +ffffffff822fb9b0 t smu_v13_0_0_set_mp1_state +ffffffff822fb9f0 t smu_v13_0_0_setup_pptable +ffffffff822fbb30 t smu_v13_0_0_system_features_control +ffffffff822fbb40 t smu_v13_0_0_baco_enter +ffffffff822fbb90 t smu_v13_0_0_baco_exit +ffffffff822fbbf0 t smu_v13_0_0_is_mode1_reset_supported +ffffffff822fbc50 t smu_v13_0_0_mode1_reset +ffffffff822fbce0 t smu_v13_0_0_get_dpm_ultimate_freq +ffffffff822fbe00 t smu_v13_0_0_get_gpu_metrics +ffffffff822fc230 t smu_v13_0_0_enable_mgpu_fan_boost +ffffffff822fc280 t smu_v13_0_0_smu_send_bad_mem_page_num +ffffffff822fc310 t smu_v13_0_0_send_bad_mem_channel_flag +ffffffff822fc3a0 t smu_v13_0_0_get_smu_metrics_data +ffffffff822fc710 t smu_v13_0_get_throttler_status +ffffffff822fc8d0 t smu_v13_0_0_i2c_xfer +ffffffff822fcb80 t smu_v13_0_0_i2c_func +ffffffff822fd000 T smu_v13_0_4_set_ppt_funcs +ffffffff822fd0b0 t smu_v13_0_4_print_clk_levels +ffffffff822fd170 t smu_v13_0_4_force_clk_levels +ffffffff822fd410 t smu_v13_0_4_read_sensor +ffffffff822fd6c0 t smu_v13_0_4_is_dpm_running +ffffffff822fd710 t smu_v13_0_4_set_watermarks_table +ffffffff822fd8a0 t smu_v13_0_4_set_performance_level +ffffffff822fdde0 t smu_v13_0_4_init_smc_tables +ffffffff822fdf50 t smu_v13_0_4_fini_smc_tables +ffffffff822fe000 t smu_v13_0_4_system_features_control +ffffffff822fe050 t smu_v13_0_4_mode2_reset +ffffffff822fe070 t smu_v13_0_4_get_dpm_ultimate_freq +ffffffff822fe490 t smu_v13_0_4_get_gpu_metrics +ffffffff822fe660 t smu_v13_0_4_set_fine_grain_gfx_freq_parameters +ffffffff822fe6c0 t smu_v13_0_4_get_smu_metrics_data +ffffffff822ff000 T smu_v13_0_5_set_ppt_funcs +ffffffff822ff090 t smu_v13_0_5_set_default_dpm_tables +ffffffff822ff0c0 t smu_v13_0_5_print_clk_levels +ffffffff822ff170 t smu_v13_0_5_force_clk_levels +ffffffff822ff2d0 t smu_v13_0_5_od_edit_dpm_table +ffffffff822ff590 t smu_v13_0_5_dpm_set_vcn_enable +ffffffff822ff5b0 t smu_v13_0_5_dpm_set_jpeg_enable +ffffffff822ff5d0 t smu_v13_0_5_read_sensor +ffffffff822ff7f0 t smu_v13_0_5_is_dpm_running +ffffffff822ff840 t smu_v13_0_5_set_watermarks_table +ffffffff822ff9d0 t smu_v13_0_5_set_performance_level +ffffffff822ffbb0 t smu_v13_0_5_init_smc_tables +ffffffff822ffd20 t smu_v13_0_5_fini_smc_tables +ffffffff822ffdd0 t smu_v13_0_5_system_features_control +ffffffff822ffe20 t smu_v13_0_5_mode2_reset +ffffffff822ffea0 t smu_v13_0_5_get_dpm_ultimate_freq +ffffffff823002e0 t smu_v13_0_5_get_gpu_metrics +ffffffff82300420 t smu_v13_0_5_set_fine_grain_gfx_freq_parameters +ffffffff82300480 t smu_v13_0_5_get_smu_metrics_data +ffffffff82301000 T smu_v13_0_7_set_ppt_funcs +ffffffff82301050 t smu_v13_0_7_get_allowed_feature_mask +ffffffff823011c0 t smu_v13_0_7_set_default_dpm_table +ffffffff823015f0 t smu_v13_0_7_populate_umd_state_clk +ffffffff82301720 t smu_v13_0_7_print_clk_levels +ffffffff82301840 t smu_v13_0_7_force_clk_levels +ffffffff823019c0 t smu_v13_0_7_get_power_profile_mode +ffffffff82301ca0 t smu_v13_0_7_set_power_profile_mode +ffffffff82301ee0 t smu_v13_0_7_read_sensor +ffffffff823020f0 t smu_v13_0_7_is_dpm_running +ffffffff82302140 t smu_v13_0_7_get_fan_speed_pwm +ffffffff82302220 t smu_v13_0_7_get_fan_speed_rpm +ffffffff82302290 t smu_v13_0_7_get_thermal_temperature_range +ffffffff82302380 t smu_v13_0_7_dump_pptable +ffffffff823023b0 t smu_v13_0_7_get_power_limit +ffffffff82302490 t smu_v13_0_7_set_df_cstate +ffffffff823024b0 t smu_v13_0_7_update_pcie_parameters +ffffffff823025a0 t smu_v13_0_7_init_smc_tables +ffffffff82302790 t smu_v13_0_7_check_fw_status +ffffffff823027e0 t smu_v13_0_7_set_mp1_state +ffffffff82302820 t smu_v13_0_7_setup_pptable +ffffffff82302980 t smu_v13_0_7_baco_enter +ffffffff823029d0 t smu_v13_0_7_baco_exit +ffffffff82302a30 t smu_v13_0_7_is_mode1_reset_supported +ffffffff82302a70 t smu_v13_0_7_get_dpm_ultimate_freq +ffffffff82302b90 t smu_v13_0_7_get_gpu_metrics +ffffffff82302fa0 t smu_v13_0_7_enable_mgpu_fan_boost +ffffffff82302ff0 t smu_v13_0_7_get_smu_metrics_data +ffffffff82303340 t smu_v13_0_7_get_throttler_status +ffffffff82304000 T yellow_carp_set_ppt_funcs +ffffffff82304040 t yellow_carp_set_default_dpm_tables +ffffffff82304070 t yellow_carp_print_clk_levels +ffffffff82304130 t yellow_carp_force_clk_levels +ffffffff823043d0 t yellow_carp_od_edit_dpm_table +ffffffff82304690 t yellow_carp_dpm_set_vcn_enable +ffffffff823046b0 t yellow_carp_dpm_set_jpeg_enable +ffffffff823046d0 t yellow_carp_read_sensor +ffffffff82304a70 t yellow_carp_is_dpm_running +ffffffff82304ac0 t yellow_carp_set_watermarks_table +ffffffff82304c50 t yellow_carp_set_performance_level +ffffffff82305190 t yellow_carp_init_smc_tables +ffffffff82305300 t yellow_carp_fini_smc_tables +ffffffff823053b0 t yellow_carp_system_features_control +ffffffff82305400 t yellow_carp_get_gfxoff_status +ffffffff82305490 t yellow_carp_mode2_reset +ffffffff82305510 t yellow_carp_get_dpm_ultimate_freq +ffffffff82305960 t yellow_carp_get_gpu_metrics +ffffffff82305b20 t yellow_carp_post_smu_init +ffffffff82305ba0 t yellow_carp_set_fine_grain_gfx_freq_parameters +ffffffff82305c00 t yellow_carp_get_smu_metrics_data +ffffffff82306000 T smu_cmn_send_msg_without_waiting +ffffffff82306170 T smu_cmn_wait_for_response +ffffffff823062b0 T smu_cmn_send_smc_msg_with_param +ffffffff823065d0 T smu_cmn_to_asic_specific_index +ffffffff823066e0 t __smu_cmn_reg_print_error +ffffffff82306930 T smu_cmn_send_smc_msg +ffffffff82306950 T smu_cmn_send_debug_smc_msg +ffffffff823069d0 T smu_cmn_feature_is_supported +ffffffff82306a80 T smu_cmn_feature_is_enabled +ffffffff82306b80 T smu_cmn_clk_dpm_is_enabled +ffffffff82306c80 T smu_cmn_get_enabled_mask +ffffffff82306d70 T smu_cmn_get_indep_throttler_status +ffffffff82306e20 T smu_cmn_feature_update_enable_state +ffffffff82306ec0 T smu_cmn_feature_set_enabled +ffffffff82306f90 T smu_cmn_get_pp_feature_mask +ffffffff82307140 T smu_cmn_set_pp_feature_mask +ffffffff82307240 T smu_cmn_disable_all_features_with_exception +ffffffff823072f0 T smu_cmn_get_smc_version +ffffffff823073c0 T smu_cmn_update_table +ffffffff82307520 T smu_cmn_write_watermarks_table +ffffffff823075f0 T smu_cmn_write_pptable +ffffffff823076b0 T smu_cmn_get_metrics_table +ffffffff82307810 T smu_cmn_get_combo_pptable +ffffffff823078e0 T smu_cmn_init_soft_gpu_metrics +ffffffff823079c0 T smu_cmn_set_mp1_state +ffffffff82307a60 T smu_cmn_is_audio_func_enabled +ffffffff82308000 T pci_mcfg_init +ffffffff82308050 T pci_lookup_segment +ffffffff823080b0 T pci_attach_hook +ffffffff823080e0 T pci_bus_maxdevs +ffffffff82308110 T pci_make_tag +ffffffff82308180 T pci_decompose_tag +ffffffff823081e0 T pci_conf_size +ffffffff82308240 T pci_mcfg_map_bus +ffffffff823082c0 T pci_conf_read +ffffffff82308410 T pci_conf_write +ffffffff82308550 T pci_msix_table_map +ffffffff82308670 T pci_msix_table_unmap +ffffffff82308710 T msi_hwmask +ffffffff82308740 T msi_hwunmask +ffffffff82308770 T msi_addroute +ffffffff82308870 T msi_delroute +ffffffff823088e0 T pci_intr_map_msi +ffffffff82308960 T msix_hwmask +ffffffff82308990 T msix_hwunmask +ffffffff823089c0 T msix_addroute +ffffffff82308bc0 T msix_delroute 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com_cardbus_gofigure +ffffffff82315900 T com_cardbus_enable +ffffffff823159d0 T com_cardbus_disable +ffffffff82315a20 T com_cardbus_setup +ffffffff82316000 T xl_cardbus_match +ffffffff82316090 T xl_cardbus_attach +ffffffff82316420 T xl_cardbus_detach +ffffffff823164e0 T xl_cardbus_lookup +ffffffff823165a0 T xl_cardbus_intr_ack +ffffffff82317000 T dc_cardbus_match +ffffffff82317030 T dc_cardbus_attach +ffffffff823173c0 T dc_cardbus_detach +ffffffff82317460 T dc_cardbus_setup +ffffffff82318000 T fxp_cardbus_match +ffffffff82318030 T fxp_cardbus_attach +ffffffff82318240 T fxp_cardbus_detach +ffffffff823182d0 T fxp_cardbus_setup +ffffffff82319000 t rl_cardbus_match +ffffffff82319030 t rl_cardbus_attach +ffffffff823191d0 t rl_cardbus_detach +ffffffff82319290 T rl_cardbus_setup +ffffffff8231a000 T re_cardbus_probe +ffffffff8231a030 T re_cardbus_attach +ffffffff8231a230 T re_cardbus_detach +ffffffff8231a310 T re_cardbus_setup +ffffffff8231b000 T ath_cardbus_match +ffffffff8231b050 T ath_cardbus_attach +ffffffff8231b180 T ath_cardbus_detach +ffffffff8231b250 T ath_cardbus_enable +ffffffff8231b320 T ath_cardbus_disable +ffffffff8231b370 T ath_cardbus_power +ffffffff8231b3b0 T ath_cardbus_setup +ffffffff8231c000 T athn_cardbus_match +ffffffff8231c030 T athn_cardbus_attach +ffffffff8231c170 T athn_cardbus_detach +ffffffff8231c210 T athn_cardbus_enable +ffffffff8231c2e0 T athn_cardbus_disable +ffffffff8231c330 T athn_cardbus_power +ffffffff8231c370 T athn_cardbus_read +ffffffff8231c3a0 T athn_cardbus_write +ffffffff8231c3d0 T athn_cardbus_write_barrier +ffffffff8231c400 T athn_cardbus_setup +ffffffff8231d000 T atw_cardbus_match +ffffffff8231d030 T atw_cardbus_attach +ffffffff8231d220 T atw_cardbus_detach +ffffffff8231d2e0 T atw_cardbus_enable +ffffffff8231d3b0 T atw_cardbus_disable +ffffffff8231d400 T atw_cardbus_power +ffffffff8231d440 T atw_cardbus_setup +ffffffff8231e000 T rtw_cardbus_match +ffffffff8231e030 T rtw_cardbus_attach +ffffffff8231e280 T rtw_cardbus_detach +ffffffff8231e3a0 T rtw_cardbus_intr_ack +ffffffff8231e3c0 T rtw_cardbus_funcregen +ffffffff8231e420 T rtw_cardbus_enable +ffffffff8231e580 T rtw_cardbus_disable +ffffffff8231e660 T rtw_cardbus_power +ffffffff8231e6a0 T rtw_cardbus_setup +ffffffff8231f000 T ral_cardbus_match +ffffffff8231f030 T ral_cardbus_attach +ffffffff8231f230 T ral_cardbus_detach +ffffffff8231f2e0 T ral_cardbus_activate +ffffffff8231f370 T ral_cardbus_enable +ffffffff8231f4d0 T ral_cardbus_disable +ffffffff8231f520 T ral_cardbus_setup +ffffffff8231f5c0 T ral_cardbus_wakeup +ffffffff82320000 T acx_cardbus_match +ffffffff82320030 T acx_cardbus_attach +ffffffff82320260 T acx_cardbus_detach +ffffffff82320380 T acx_cardbus_enable +ffffffff82320450 T acx_cardbus_disable +ffffffff823204a0 T acx_cardbus_power +ffffffff823204e0 T acx_cardbus_setup +ffffffff82321000 T pgt_cardbus_match +ffffffff82321030 T pgt_cardbus_attach +ffffffff82321230 T pgt_cardbus_detach +ffffffff823212e0 T pgt_cardbus_enable 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pcmcia_scan_cis +ffffffff8232bcc0 T pcmcia_parse_cis_tuple +ffffffff8232ce60 T pcmcia_print_cis +ffffffff8232e000 T pcmcia_check_cis_quirks +ffffffff8232f000 T ep_pcmcia_match +ffffffff8232f110 T ep_pcmcia_attach +ffffffff8232f560 T ep_pcmcia_detach +ffffffff8232f600 T ep_pcmcia_activate +ffffffff8232f6e0 T ep_pcmcia_lookup +ffffffff8232f7f0 T ep_pcmcia_enable1 +ffffffff8232f8a0 T ep_pcmcia_get_enaddr +ffffffff82330000 T ne_pcmcia_match +ffffffff82330140 T ne_pcmcia_attach +ffffffff82330760 T ne_pcmcia_detach +ffffffff82330820 T ne_pcmcia_activate +ffffffff82330910 T ne_pcmcia_get_enaddr +ffffffff82330af0 T ne_pcmcia_dl10019_get_enaddr +ffffffff82330d40 T ne_pcmcia_ax88190_set_iobase +ffffffff82331000 T aic_pcmcia_match +ffffffff823310b0 T aic_pcmcia_attach +ffffffff823312b0 T aic_pcmcia_detach +ffffffff82332000 T com_pcmcia_match +ffffffff82332220 T com_pcmcia_attach +ffffffff82332500 T com_pcmcia_detach +ffffffff823325a0 T com_pcmcia_activate +ffffffff82332660 T com_pcmcia_enable1 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xe_pcmcia_funce_enaddr +ffffffff82335c10 T xe_ioctl +ffffffff82335f70 T xe_start +ffffffff82336210 T xe_watchdog +ffffffff82336250 T xe_intr +ffffffff82336620 T xe_full_reset +ffffffff82336bf0 T xe_mdi_read +ffffffff82337580 T xe_mdi_write +ffffffff82337e90 T xe_statchg +ffffffff82337ec0 T xe_mediachange +ffffffff82337f50 T xe_mediastatus +ffffffff82337fb0 T xe_init +ffffffff82338010 T xe_stop +ffffffff82338140 T xe_reset +ffffffff823382b0 T xe_pcmcia_lan_nid_ciscallback +ffffffff82338400 T xe_pcmcia_manfid_ciscallback +ffffffff82338520 T xe_get +ffffffff823387f0 T xe_set_address +ffffffff82338ab0 T xe_cycle_power +ffffffff82339000 T wi_pcmcia_match +ffffffff82339130 T wi_pcmcia_attach +ffffffff823393e0 T wi_pcmcia_detach +ffffffff823394a0 T wi_pcmcia_activate +ffffffff82339590 T wi_pcmcia_wakeup +ffffffff8233a000 T malo_pcmcia_match +ffffffff8233a050 T malo_pcmcia_attach +ffffffff8233a220 T malo_pcmcia_detach +ffffffff8233a2a0 T malo_pcmcia_activate +ffffffff8233a500 T cmalo_intr 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cmalo_cmd_set_reset +ffffffff8233d2a0 T cmalo_select_network +ffffffff8233d3a0 T cmalo_cmd_set_auth +ffffffff8233d460 T cmalo_cmd_set_assoc +ffffffff8233d7c0 T cmalo_reflect_network +ffffffff8233d8b0 T cmalo_tx_done +ffffffff8233d970 T cmalo_rx +ffffffff8233db70 T cmalo_cmd_response +ffffffff8233dd90 T cmalo_event +ffffffff8233de00 T cmalo_tx +ffffffff8233dfe0 T cmalo_cmd_set_wep +ffffffff8233e230 T cmalo_rate2bitmap +ffffffff8233e270 T cmalo_hexdump +ffffffff8233e2a0 T cmalo_cmd_request +ffffffff8233e400 T cmalo_cmd_rsp_hwspec +ffffffff8233e470 T cmalo_cmd_rsp_scan +ffffffff8233e680 T cmalo_parse_elements +ffffffff8233e780 T cmalo_cmd_rsp_assoc +ffffffff8233e7c0 T cmalo_cmd_set_80211d +ffffffff8233e8c0 T cmalo_cmd_set_bgscan_config +ffffffff8233ea20 T cmalo_cmd_set_bgscan_query +ffffffff8233f000 T an_pcmcia_match +ffffffff8233f060 T an_pcmcia_attach +ffffffff8233f250 T an_pcmcia_detach +ffffffff8233f2e0 T an_pcmcia_activate +ffffffff82340000 T pcibmatch +ffffffff823400d0 T pcibattach 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hme_unconfig +ffffffff82345470 T hme_fill_rx_ring +ffffffff82345610 T hme_reset +ffffffff82345650 T hme_init +ffffffff82345b90 T hme_meminit +ffffffff82345d10 T hme_iff +ffffffff82345ec0 T hme_tint +ffffffff82346010 T hme_rint +ffffffff823461e0 T hme_eint +ffffffff82346290 T hme_intr +ffffffff82346390 T hme_newbuf +ffffffff82347000 T hmematch_pci +ffffffff82347040 T hmeattach_pci +ffffffff82347310 T hmedetach_pci +ffffffff82347390 T hme_pci_enaddr +ffffffff82348000 T isamatch +ffffffff82348050 T isaattach +ffffffff82348180 T isascan +ffffffff823485a0 T isaprint +ffffffff82348760 T isa_intr_typename +ffffffff82349000 T isadmamatch +ffffffff82349040 T isadmaattach +ffffffff82349230 T isa_dmacascade +ffffffff82349320 T isa_dmamap_create +ffffffff82349400 T isa_dmamap_destroy +ffffffff82349470 T isa_dmastart +ffffffff823498e0 T isa_dmaabort +ffffffff823499e0 T isa_dmacount +ffffffff82349ba0 T isa_dmafinished +ffffffff82349c60 T isa_dmadone +ffffffff82349df0 T isa_dmamem_alloc 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mpu_isa_match +ffffffff82354060 T mpu_isa_attach +ffffffff823540f0 T mpu_test +ffffffff82355000 T pcppi_match +ffffffff823551d0 T pcppi_attach +ffffffff823552e0 t pcppi_bell_stop +ffffffff82355370 T pcppi_kbd_bell +ffffffff823553a0 T pcppi_bell +ffffffff82356000 T spkrprobe +ffffffff82356040 T spkrattach +ffffffff823560a0 T spkropen +ffffffff82356160 T spkrwrite +ffffffff82356920 T spkrclose +ffffffff823569a0 T spkrioctl +ffffffff82356b60 t rest +ffffffff82356bc0 t playtone +ffffffff82357000 T lpt_isa_probe +ffffffff82357430 T lpt_isa_attach +ffffffff82358000 T wbsio_probe +ffffffff82358160 T wbsio_attach +ffffffff823584e0 T wbsio_print +ffffffff82359000 T schsio_probe +ffffffff82359110 T schsio_attach +ffffffff823592e0 T schsio_activate +ffffffff82359320 T schsio_config_read +ffffffff82359360 T schsio_config_write +ffffffff823593b0 T schsio_wdt_init +ffffffff823594c0 T schsio_hwm_init +ffffffff823597e0 T schsio_hwm_update +ffffffff82359d70 T schsio_hwm_read +ffffffff82359dc0 T schsio_wdt_cb +ffffffff8235a000 T lm_isa_match +ffffffff8235a1b0 T lm_isa_attach +ffffffff8235a380 T lm_wbsio_match +ffffffff8235a540 T lm_isa_writereg +ffffffff8235a5a0 T lm_isa_readreg +ffffffff8235a600 T lm_isa_remove_alias +ffffffff8235b000 T it_match +ffffffff8235b2d0 T it_enter +ffffffff8235b360 T it_readreg +ffffffff8235b3a0 T it_writereg +ffffffff8235b3f0 T it_exit +ffffffff8235b440 T it_attach +ffffffff8235baa0 T it_wdog_cb +ffffffff8235bd40 T it_ec_refresh +ffffffff8235c360 T it_ec_writereg +ffffffff8235c3b0 T it_ec_readreg +ffffffff8235c400 T it_activate +ffffffff8235d000 T uguru_refresh_temp +ffffffff8235d0d0 T uguru_refresh_volt +ffffffff8235d180 T uguru_refresh_fan +ffffffff8235d250 T uguru_match +ffffffff8235d3e0 T uguru_attach +ffffffff8235d970 T uguru_read_multi +ffffffff8235da50 T uguru_ac5_read +ffffffff8235dcc0 T uguru_read_sensor +ffffffff8235dfe0 T uguru_ac5_read_sensor +ffffffff8235e070 T uguru_refresh +ffffffff8235e100 T uguru_write_multi +ffffffff8235f000 T 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acpiivhd_intr +ffffffff824f70e0 T ivhd_poll_events +ffffffff824f71a0 T ivhd_intr_map +ffffffff824f7250 T _dumppte +ffffffff824f73c0 T ivhd_showpage +ffffffff824f7500 T ivhd_show_event +ffffffff824f7de0 T ivhd_showdte +ffffffff824f7ed0 T ivhd_showcmd +ffffffff824f7f90 T _ivhd_issue_command +ffffffff824f8070 T ivhd_issue_command +ffffffff824f8350 T ivhd_invalidate_iommu_all +ffffffff824f8440 T ivhd_invalidate_interrupt_table +ffffffff824f8530 T ivhd_showreg +ffffffff824f8670 T ivhd_checkerr +ffffffff824f88c0 T ivhd_iommu_init +ffffffff824f8d90 T acpiivrs_ivhd +ffffffff824f8e00 T acpiivrs_init +ffffffff824f8f30 T acpidmar_msi_hwmask +ffffffff824f8fa0 T acpidmar_msi_hwunmask +ffffffff824f9010 T acpidmar_msi_addroute +ffffffff824f90d0 T acpidmar_msi_delroute +ffffffff824f90f0 T iommu_showfault +ffffffff824f92b0 T iommu_showpte +ffffffff824fa000 T acpidock_match +ffffffff824fa070 T acpidock_attach +ffffffff824fa390 T acpidock_status +ffffffff824fa420 T acpidock_docklock +ffffffff824fa500 T acpidock_dockctl +ffffffff824fa5e0 T acpidock_foundejd +ffffffff824fa690 T acpidock_notify +ffffffff824fab80 T acpidock_eject +ffffffff824fac70 T acpidock_walkchildren +ffffffff824fb000 T abl_match +ffffffff824fb030 T abl_attach +ffffffff824fb220 T abl_get_brightness +ffffffff824fb2a0 T abl_get_param +ffffffff824fb300 T abl_set_param +ffffffff824fb3c0 T abl_set_brightness +ffffffff824fc000 T asmc_match +ffffffff824fc050 T asmc_attach +ffffffff824fc5c0 T asmc_activate +ffffffff824fc650 T asmc_try +ffffffff824fca30 T asmc_get_backlight +ffffffff824fcab0 T asmc_set_backlight +ffffffff824fcb40 T asmc_backlight +ffffffff824fcbd0 T asmc_init +ffffffff824fcdd0 T asmc_update +ffffffff824fcf80 T asmc_detach +ffffffff824fd150 t asmc_temp +ffffffff824fd2d0 t asmc_fan +ffffffff824fd4a0 t asmc_light +ffffffff824fe000 T acpiasus_match +ffffffff824fe030 T acpiasus_attach +ffffffff824fe150 T acpiasus_activate +ffffffff824fe2e0 T acpiasus_init +ffffffff824fe3c0 T acpiasus_notify +ffffffff824ff000 T thinkpad_match +ffffffff824ff0b0 T thinkpad_attach +ffffffff824ff2d0 T thinkpad_activate +ffffffff824ff450 T thinkpad_sensor_attach +ffffffff824ff5c0 T thinkpad_get_temp +ffffffff824ff650 T thinkpad_sensor_refresh +ffffffff824ff7c0 T thinkpad_get_volume_mute +ffffffff824ff830 T thinkpad_attach_deferred +ffffffff824ff850 T thinkpad_enable_events +ffffffff824ffa20 T thinkpad_get_kbd_backlight +ffffffff824ffab0 T thinkpad_set_kbd_backlight +ffffffff824ffb80 T thinkpad_get_param +ffffffff824ffbe0 T thinkpad_set_param +ffffffff824ffca0 T thinkpad_hotkey +ffffffff825002d0 T thinkpad_brightness_up +ffffffff82500470 T thinkpad_brightness_down +ffffffff82500620 T thinkpad_toggle_bluetooth +ffffffff82500740 T thinkpad_volume_mute +ffffffff825007f0 T thinkpad_volume_down +ffffffff825008a0 T thinkpad_volume_up +ffffffff82500950 T thinkpad_get_thinklight +ffffffff825009a0 T thinkpad_adaptive_change +ffffffff82500ac0 T thinkpad_get_brightness +ffffffff82500b00 T thinkpad_toggle_wan +ffffffff82500c20 T thinkpad_cmos +ffffffff82500cd0 T thinkpad_set_brightness +ffffffff82500dc0 T thinkpad_set_thinklight +ffffffff82501000 T toshiba_match +ffffffff825010a0 T toshiba_attach +ffffffff82501180 T get_param_brightness +ffffffff825011e0 T acpitoshiba_get_param +ffffffff82501240 T set_param_brightness +ffffffff825012d0 T toshiba_update_brightness +ffffffff825013d0 T acpitoshiba_set_param +ffffffff82501470 T toshiba_set_brightness +ffffffff82501590 T toshiba_enable_events +ffffffff82501620 T toshiba_read_events +ffffffff82501780 T toshiba_hotkey +ffffffff825019b0 T toshiba_get_brightness +ffffffff82501b20 T toshiba_fn_key_brightness_up +ffffffff82501c70 T toshiba_fn_key_brightness_down +ffffffff82501dc0 T toshiba_fn_key_video_output +ffffffff82501f10 T toshiba_get_video_output +ffffffff82502080 T toshiba_set_video_output +ffffffff82503000 T acpisony_match +ffffffff82503070 T acpisony_attach +ffffffff825030e0 T acpisony_activate +ffffffff82503120 T acpisony_notify_setup +ffffffff82503310 T acpisony_notify +ffffffff825036c0 T acpisony_find_offset +ffffffff825037d0 T acpisony_set_hotkey +ffffffff825039c0 T acpisony_brightness_down +ffffffff82503ad0 T acpisony_get_brightness +ffffffff82503b50 T acpisony_set_brightness +ffffffff82504000 T acpivideo_match +ffffffff82504070 T acpivideo_attach +ffffffff825041d0 T acpivideo_getpcibus +ffffffff82504210 T acpivideo_notify +ffffffff82504270 T acpivideo_set_policy +ffffffff82504340 T acpi_foundvout +ffffffff82504410 T acpivideo_print +ffffffff82505000 T acpivout_match +ffffffff82505070 T acpivout_attach +ffffffff825051c0 T acpivout_notify +ffffffff82505270 T acpivout_get_bcl +ffffffff82505390 T acpivout_get_brightness +ffffffff82505430 T acpivout_get_param +ffffffff825054e0 T acpivout_set_param +ffffffff82505650 T acpivout_select_brightness +ffffffff82505720 T acpivout_find_brightness +ffffffff825057b0 T acpivout_set_brightness +ffffffff82506000 T acpipwrres_match +ffffffff82506070 T acpipwrres_attach +ffffffff825062b0 T acpipwrres_foundcons +ffffffff82506440 T acpipwrres_ref_incr +ffffffff825064d0 T acpipwrres_hascons +ffffffff82506520 T acpipwrres_ref_decr +ffffffff825065b0 T acpipwrres_addcons +ffffffff82507000 T aibs_match +ffffffff82507030 T aibs_attach +ffffffff82507140 T aibs_probe +ffffffff825072a0 T aibs_attach_new +ffffffff825073c0 T aibs_attach_sif +ffffffff82507590 T aibs_notify +ffffffff82507600 T aibs_add_sensor +ffffffff82507850 T aibs_getpack +ffffffff825078d0 T aibs_refresh +ffffffff82507930 T aibs_refresh_r +ffffffff82507a70 T aibs_getvalue +ffffffff82507bc0 T aibs_find_cb +ffffffff82508000 T aplgpio_match +ffffffff82508060 T aplgpio_attach +ffffffff82508300 T aplgpio_intr +ffffffff82508440 T aplgpio_read_pin +ffffffff82508490 T aplgpio_write_pin +ffffffff82508500 T aplgpio_intr_establish +ffffffff82508620 T aplgpio_intr_enable +ffffffff825086b0 T aplgpio_intr_disable +ffffffff82509000 T bytgpio_match +ffffffff82509060 T bytgpio_attach +ffffffff82509320 T bytgpio_intr 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ccpmic_read_pin +ffffffff825103d0 T ccpmic_write_pin +ffffffff82510530 T ccpmic_thermal_opreg_handler +ffffffff82510770 T ccpmic_power_opreg_handler +ffffffff82510960 T ccpmic_read_1 +ffffffff82510a20 T ccpmic_write_1 +ffffffff82510ae0 T ccpmic_raw_to_temp +ffffffff82511000 T com_acpi_match +ffffffff82511120 T com_acpi_attach +ffffffff825113a0 T com_acpi_is_designware +ffffffff82511400 T com_acpi_intr_designware +ffffffff82511430 T com_acpi_is_console +ffffffff82512000 T sdhc_acpi_match +ffffffff82512060 T sdhc_acpi_attach +ffffffff82512360 T sdhc_acpi_parse_resources +ffffffff82512420 T sdhc_acpi_card_detect_gpio +ffffffff82512480 T sdhc_acpi_card_detect_intr +ffffffff825124c0 T sdhc_acpi_power_on +ffffffff82512540 T sdhc_acpi_explore +ffffffff82512570 T sdhc_acpi_card_detect_nonremovable +ffffffff825125a0 T sdhc_acpi_do_explore +ffffffff82513000 T dwiic_acpi_match +ffffffff82513050 T dwiic_acpi_attach +ffffffff825133b0 T dwiic_acpi_parse_crs +ffffffff825134e0 T dwiic_acpi_power +ffffffff825135f0 T dwiic_acpi_get_params +ffffffff82513730 T dwiic_i2c_intr_establish +ffffffff825137b0 T dwiic_i2c_intr_disestablish +ffffffff825137d0 T dwiic_i2c_intr_string +ffffffff82513860 T dwiic_acpi_bus_scan +ffffffff825138a0 T dwiic_acpi_found_hid +ffffffff82513bd0 T dwiic_matchhids +ffffffff82513c60 T dwiic_acpi_found_ihidev +ffffffff82513ee0 T dwiic_acpi_found_iatp +ffffffff82515000 T acpicbkbd_match +ffffffff82515030 T acpicbkbd_attach +ffffffff825150d0 T acpicbkbd_activate +ffffffff82515120 T acpicbkbd_get_backlight +ffffffff825151a0 T acpicbkbd_set_backlight +ffffffff82515240 T acpicbkbd_write_backlight +ffffffff82516000 T acpials_match +ffffffff82516090 T acpials_attach +ffffffff82516230 T acpials_read +ffffffff825162b0 T acpials_addtask +ffffffff825162f0 T acpials_notify +ffffffff82516380 T acpials_update +ffffffff82517000 T tpm_match +ffffffff82517050 T tpm_attach +ffffffff82517320 T tpm_activate +ffffffff82517430 T tpm2_start_method +ffffffff825174b0 T tpm_probe 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surface_attach +ffffffff8251b0c0 T surface_hotkey +ffffffff8251c000 T ipmi_acpi_match +ffffffff8251c030 T ipmi_acpi_attach +ffffffff8251c260 T ipmi_acpi_parse_crs +ffffffff8251d000 T amdgpio_match +ffffffff8251d060 T amdgpio_attach +ffffffff8251d2a0 T amdgpio_activate +ffffffff8251d390 T amdgpio_intr +ffffffff8251d530 T amdgpio_read_pin +ffffffff8251d580 T amdgpio_write_pin +ffffffff8251d5f0 T amdgpio_intr_establish +ffffffff8251d6e0 T amdgpio_intr_enable +ffffffff8251d760 T amdgpio_intr_disable +ffffffff8251d7e0 T amdgpio_save +ffffffff8251d860 T amdgpio_restore +ffffffff8251d8f0 T amdgpio_save_pin +ffffffff8251d960 T amdgpio_restore_pin +ffffffff8251d9d0 T amdgpio_pin_intr +ffffffff8251e000 T acpihid_match +ffffffff8251e030 T acpihid_attach +ffffffff8251e210 T acpihid_init_dsm +ffffffff8251e370 T acpihid_eval +ffffffff8251e590 T acpihid_notify +ffffffff8251e5f0 T acpihid_button_array_enable +ffffffff8251f000 T acpi_match +ffffffff8251f060 T acpi_attach +ffffffff8251f0a0 T acpi_probe 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suspend_finish +ffffffff82522000 T acpipci_match +ffffffff82522030 T acpipci_attach +ffffffff825222f0 T acpipci_osc +ffffffff82522430 T acpipci_parse_resources +ffffffff82522540 T acpipci_attach_bus +ffffffff82522710 T acpipci_print +ffffffff82522780 T acpipci_attach_busses +ffffffff82523000 T efiopen +ffffffff82523040 T eficlose +ffffffff82523070 T efiioctl +ffffffff82523110 T efiioc_get_table +ffffffff82523270 T efiioc_var_get +ffffffff825234f0 T efiioc_var_next +ffffffff82523710 T efiioc_var_set +ffffffff825239c0 T efi_adapt_error +ffffffff82524000 T efi_match +ffffffff82524060 T efi_attach +ffffffff82524420 T efi_map_runtime +ffffffff825245a0 T efi_enter +ffffffff82524630 T efi_leave +ffffffff82524690 T efi_gettime +ffffffff82524860 T efi_settime +ffffffff825249c0 T efi_fault +ffffffff82525000 T vmm_probe +ffffffff82525050 T vmm_attach +ffffffff825253e0 T vmm_activate +ffffffff82525600 T vmm_enabled +ffffffff82525690 T vmm_quiesce_vmx +ffffffff82525860 T vmm_stop +ffffffff825259b0 T vmm_start +ffffffff82525aa0 T vmmopen +ffffffff82525af0 T vmmioctl +ffffffff82525f00 T vm_create +ffffffff82526330 T vm_run +ffffffff82526520 T vm_get_info +ffffffff82526770 T vm_terminate +ffffffff825268e0 T vm_resetcpu +ffffffff82526a40 T vm_intr_pending +ffffffff82526b10 T vm_rwregs +ffffffff82526c60 T vm_mprotect_ept +ffffffff82526f10 T vm_rwvmparams +ffffffff825270d0 T pledge_ioctl_vmm +ffffffff825271b0 T vmmclose +ffffffff825271e0 T vm_find +ffffffff82527300 T vcpu_reset_regs +ffffffff82527350 T vmm_init_pvclock +ffffffff82527430 T vcpu_readregs_vmx +ffffffff82527860 T vcpu_writeregs_vmx +ffffffff82527cd0 T vcpu_readregs_svm +ffffffff82528180 T vcpu_writeregs_svm +ffffffff82528650 T vmm_get_guest_memtype +ffffffff825286d0 T vmx_mprotect_ept +ffffffff82528950 T vmx_pmap_find_pte_ept +ffffffff82528a20 T start_vmm_on_cpu +ffffffff82528b00 T stop_vmm_on_cpu +ffffffff82528ba0 T vmclear_on_cpu +ffffffff82528c20 T vm_create_check_mem_ranges +ffffffff82528d80 T vm_impl_init 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+ffffffff8252bf20 T vcpu_run_svm +ffffffff8252c510 T vcpu_must_stop +ffffffff8252c580 T vmm_fpurestore +ffffffff8252c650 T vmm_fpusave +ffffffff8252c6d0 T vmm_translate_gva +ffffffff8252ca00 T vmm_update_pvclock +ffffffff8252cb00 T vmx_get_exit_info +ffffffff8252cb60 T vmx_handle_exit +ffffffff8252cf50 T vmx_instruction_error_decode +ffffffff8252d120 T vmm_get_guest_cpu_cpl +ffffffff8252d1d0 T vmx_handle_intr +ffffffff8252d260 T svm_handle_hlt +ffffffff8252d2b0 T vmx_handle_hlt +ffffffff8252d360 T svm_handle_exit +ffffffff8252d640 T svm_handle_np_fault +ffffffff8252d7f0 T vmm_handle_cpuid +ffffffff8252de70 T svm_handle_msr +ffffffff8252e130 T svm_handle_xsetbv +ffffffff8252e180 T svm_handle_inout +ffffffff8252e2a0 T vmm_inject_ud +ffffffff8252e2d0 T vmm_inject_db +ffffffff8252e300 T vmx_handle_np_fault +ffffffff8252e480 T vmx_handle_inout +ffffffff8252e620 T vmx_handle_cr +ffffffff8252e890 T vmx_handle_rdmsr +ffffffff8252e960 T vmx_handle_wrmsr +ffffffff8252ebc0 T vmx_handle_xsetbv +ffffffff8252ec50 T vmm_inject_gp +ffffffff8252ec80 T vmx_get_exit_qualification +ffffffff8252ece0 T vmx_get_guest_faulttype +ffffffff8252ed80 T svm_get_guest_faulttype +ffffffff8252edb0 T svm_fault_page +ffffffff8252ee40 T vmx_fault_page +ffffffff8252efa0 T vmm_get_guest_cpu_mode +ffffffff8252f0b0 T vmx_load_pdptes +ffffffff8252f330 T vmx_handle_cr0_write +ffffffff8252f540 T vmx_handle_cr4_write +ffffffff8252f5e0 T vmm_handle_xsetbv +ffffffff8252f6d0 T vmx_handle_misc_enable_msr +ffffffff8252f730 T vmm_pat_is_valid +ffffffff8252f810 T vmm_gpa_is_valid +ffffffff8252f880 T vmx_exit_reason_decode +ffffffff8252f8c0 T svm_exit_reason_decode +ffffffff825306d0 T vcpu_state_decode +ffffffff82531000 T vmm_dispatch_intr +ffffffff82531020 T vmxon +ffffffff82531050 T vmxoff +ffffffff82531080 T vmclear +ffffffff825310b0 T vmptrld +ffffffff825310e0 T vmptrst +ffffffff82531110 T vmwrite +ffffffff82531140 T vmread +ffffffff82531170 T invvpid +ffffffff825311a0 T invept +ffffffff825311d0 T vmx_enter_guest +ffffffff825311fb t skip_init +ffffffff825312c8 t no_l1df_msr +ffffffff825312cb t l1df_tlb_loop +ffffffff825312e4 t l1df_tlb_done +ffffffff825312ec t l1df_load_cache +ffffffff82531303 t done_flush +ffffffff82531396 t do_resume +ffffffff8253141b t fail_launch_or_resume +ffffffff8253145d t fail_launch_unknown +ffffffff8253146a t fail_launch_invalid_vmcs +ffffffff82531477 t fail_launch_valid_vmcs +ffffffff82531494 t vmx_exit_handler_asm +ffffffff82531559 t restore_host +ffffffff825315f0 T svm_enter_guest +ffffffff82531780 t restore_host_svm +ffffffff82532000 T sdmmc_match +ffffffff82532050 T sdmmc_attach +ffffffff82532390 T sdmmc_detach +ffffffff82532440 T sdmmc_activate +ffffffff82532510 T sdmmc_discover_task +ffffffff825325d0 T sdmmc_create_thread +ffffffff82532640 T sdmmc_holds_root_device +ffffffff825326a0 T sdmmc_task_thread +ffffffff82532890 T sdmmc_needs_discover +ffffffff82532940 T sdmmc_del_task +ffffffff825329f0 T sdmmc_card_detach +ffffffff82532ad0 T sdmmc_add_task +ffffffff82532b50 T sdmmc_card_attach +ffffffff82532c60 T sdmmc_enable +ffffffff82532db0 T sdmmc_scan +ffffffff82532e40 T sdmmc_init +ffffffff82532f40 T sdmmc_disable +ffffffff825330a0 T sdmmc_function_free +ffffffff825330c0 T sdmmc_delay +ffffffff82533110 T sdmmc_select_card +ffffffff82533290 T sdmmc_set_bus_power +ffffffff82533450 T sdmmc_function_alloc +ffffffff825334e0 T sdmmc_app_command +ffffffff82533670 T sdmmc_mmc_command +ffffffff825336f0 T sdmmc_go_idle_state +ffffffff82533810 T sdmmc_send_if_cond +ffffffff82533960 T sdmmc_set_relative_addr +ffffffff82534000 T sdmmc_cisptr +ffffffff825340a0 T sdmmc_read_cis +ffffffff825343b0 T sdmmc_print_cis +ffffffff82534520 T sdmmc_check_cis_quirks +ffffffff82535000 T sdmmc_io_enable +ffffffff825352a0 T sdmmc_io_reset +ffffffff825353d0 T sdmmc_io_send_op_cond +ffffffff82535540 T sdmmc_io_scan +ffffffff82535690 T sdmmc_io_init +ffffffff825357c0 T sdmmc_io_set_highspeed +ffffffff82535a70 T sdmmc_io_set_bus_width +ffffffff82535d00 T sdmmc_io_function_ready +ffffffff82535e80 T sdmmc_io_read_1 +ffffffff82535fd0 T sdmmc_io_function_enable +ffffffff825363a0 T sdmmc_io_write_1 +ffffffff82536520 T sdmmc_io_function_disable +ffffffff825367a0 T sdmmc_io_attach +ffffffff82536890 T sdmmc_print +ffffffff82536ae0 T sdmmc_submatch +ffffffff82536b60 T sdmmc_io_detach +ffffffff82536c10 T sdmmc_io_rw_direct +ffffffff82536db0 T sdmmc_io_rw_extended_subr +ffffffff82536f50 T sdmmc_io_rw_extended +ffffffff82537340 T sdmmc_io_read_2 +ffffffff825374a0 T sdmmc_io_write_2 +ffffffff82537600 T sdmmc_io_read_4 +ffffffff82537760 T sdmmc_io_write_4 +ffffffff825378c0 T sdmmc_io_read_multi_1 +ffffffff825379b0 T sdmmc_io_write_multi_1 +ffffffff82537aa0 T sdmmc_io_read_region_1 +ffffffff82537b90 T sdmmc_io_write_region_1 +ffffffff82537c80 T sdmmc_io_xchg +ffffffff82537e10 T sdmmc_intr_enable +ffffffff82538080 T sdmmc_intr_disable +ffffffff825382f0 T sdmmc_intr_establish +ffffffff825383f0 T sdmmc_intr_disestablish +ffffffff825384e0 T sdmmc_card_intr +ffffffff82538530 T sdmmc_intr_task +ffffffff825385c0 T sdmmc_io_set_blocklen +ffffffff82539000 T sdmmc_mem_enable +ffffffff825394e0 T sdmmc_mem_send_op_cond +ffffffff82539690 T sdmmc_mem_signal_voltage +ffffffff82539750 T sdmmc_mem_scan +ffffffff82539a60 T sdmmc_decode_csd +ffffffff82539e70 T sdmmc_decode_cid +ffffffff8253a2b0 T sdmmc_mem_send_scr +ffffffff8253a3f0 T sdmmc_mem_decode_scr +ffffffff8253a470 T sdmmc_mem_send_cxd_data +ffffffff8253a5e0 T sdmmc_mem_set_bus_width +ffffffff8253a700 T sdmmc_mem_sd_switch +ffffffff8253a9b0 T sdmmc_be512_to_bitfield512 +ffffffff8253aa60 T sdmmc_mem_mmc_switch +ffffffff8253ab50 T sdmmc_mem_init +ffffffff8253aca0 T sdmmc_mem_set_blocklen +ffffffff8253ada0 T sdmmc_mem_sd_init +ffffffff8253b350 T sdmmc_mem_mmc_init +ffffffff8253bc70 T sdmmc_mem_select_transfer_mode +ffffffff8253bcf0 T sdmmc_mem_execute_tuning +ffffffff8253bd80 T sdmmc_mem_read_block_subr +ffffffff8253c0e0 T sdmmc_mem_single_read_block +ffffffff8253c1b0 T sdmmc_mem_read_block +ffffffff8253c370 T sdmmc_mem_write_block_subr +ffffffff8253c6c0 T sdmmc_mem_single_write_block +ffffffff8253c790 T sdmmc_mem_write_block +ffffffff8253c950 T sdmmc_mem_hibernate_write +ffffffff8253d000 T sdmmc_scsi_cmd +ffffffff8253d1f0 T sdmmc_minphys +ffffffff8253d270 T sdmmc_scsi_attach +ffffffff8253d460 T sdmmc_alloc_ccbs +ffffffff8253d5a0 T sdmmc_free_ccbs +ffffffff8253d600 T sdmmc_scsi_detach +ffffffff8253d760 T sdmmc_stimeout +ffffffff8253d7e0 T sdmmc_ccb_alloc +ffffffff8253d890 T sdmmc_ccb_free +ffffffff8253d970 T sdmmc_inquiry +ffffffff8253dbe0 T sdmmc_start_xs +ffffffff8253dcd0 T sdmmc_complete_xs +ffffffff8253dda0 T sdmmc_done_xs +ffffffff8253ddf0 T sdmmc_scsi_hibernate_io +ffffffff8253e000 T bwfm_sdio_preinit +ffffffff8253e4f0 T bwfm_sdio_txcheck +ffffffff8253e530 T bwfm_sdio_txdata +ffffffff8253e5a0 T bwfm_sdio_txctl +ffffffff8253e6f0 T bwfm_sdio_buscore_read +ffffffff8253e700 T bwfm_sdio_buscore_write +ffffffff8253e720 T bwfm_sdio_buscore_prepare +ffffffff8253e860 T bwfm_sdio_buscore_activate +ffffffff8253e8e0 T bwfm_sdio_match +ffffffff8253e9b0 T bwfm_sdio_attach +ffffffff8253ec70 T bwfm_sdio_detach +ffffffff8253ecd0 T bwfm_sdio_task +ffffffff8253ee30 T bwfm_sdio_write_1 +ffffffff8253ee60 T bwfm_sdio_read_1 +ffffffff8253ee90 T bwfm_sdio_write_4 +ffffffff8253ef40 T bwfm_sdio_read_4 +ffffffff8253eff0 T bwfm_sdio_load_microcode +ffffffff8253f250 T bwfm_sdio_clkctl +ffffffff8253f380 T bwfm_sdio_dev_write +ffffffff8253f3d0 T bwfm_sdio_intr +ffffffff8253f410 T bwfm_sdio_ram_read_write +ffffffff8253f640 T bwfm_sdio_htclk +ffffffff8253f8a0 T bwfm_sdio_readshared +ffffffff8253f970 T bwfm_sdio_dev_read +ffffffff8253f9b0 T bwfm_sdio_rx_frames +ffffffff8253fd40 T bwfm_sdio_tx_frames +ffffffff8253fe20 T bwfm_sdio_backplane +ffffffff8253fed0 T bwfm_sdio_buf_read +ffffffff8253ffb0 T bwfm_sdio_buf_write +ffffffff82540060 T bwfm_sdio_frame_read_write +ffffffff825401e0 T bwfm_sdio_newbuf +ffffffff82540260 T bwfm_sdio_tx_ok +ffffffff825402b0 T bwfm_sdio_tx_ctrlframe +ffffffff825403b0 T bwfm_sdio_tx_dataframe +ffffffff82540500 T bwfm_sdio_rx_glom +ffffffff82541000 T onewire_match +ffffffff82541050 T onewire_attach +ffffffff825410f0 T onewire_detach +ffffffff82541160 T onewire_activate +ffffffff82541180 T onewire_scan +ffffffff82541390 T onewire_createthread +ffffffff82541400 T onewire_print +ffffffff825414d0 T onewirebus_print +ffffffff82541520 T onewire_lock +ffffffff82541540 T onewire_unlock +ffffffff82541560 T onewire_reset +ffffffff82541580 T onewire_bit +ffffffff825415a0 T onewire_read_byte +ffffffff825416e0 T onewire_write_byte +ffffffff825417c0 T onewire_read_block +ffffffff82541860 T onewire_write_block +ffffffff82541900 T onewire_triplet +ffffffff825419e0 T onewire_matchrom +ffffffff82541b30 T onewire_search +ffffffff82541ec0 T onewire_thread +ffffffff82542000 T onewire_crc +ffffffff825420e0 T onewire_crc16 +ffffffff825421c0 T onewire_famname +ffffffff82542200 T onewire_matchbyfam +ffffffff82543000 T owid_match +ffffffff82543030 T owid_attach +ffffffff82543100 T owid_detach +ffffffff82543140 T owid_activate +ffffffff82544000 T owsbm_match +ffffffff82544030 T owsbm_attach +ffffffff825441d0 T owsbm_detach +ffffffff82544240 T owsbm_activate +ffffffff82544270 T owsbm_update +ffffffff82545000 T owtemp_match +ffffffff82545030 T owtemp_attach +ffffffff82545130 T owtemp_detach +ffffffff825451a0 T owtemp_activate +ffffffff825451d0 T owtemp_update +ffffffff82546000 T owctr_match +ffffffff82546030 T owctr_attach +ffffffff82546180 T owctr_detach +ffffffff825461f0 T owctr_activate +ffffffff82546220 T owctr_update +ffffffff82546250 T owctr_update_counter +ffffffff82547000 A __text_page_start +ffffffff82547000 T Xsyscall_meltdown +ffffffff8254700c T Xsyscall +ffffffff8254726e t Xsyscall_trampback +ffffffff82547280 T intr_user_exit +ffffffff825472c2 t intr_user_exit_post_ast +ffffffff825473ee t Xiretq_trampback +ffffffff825473fa T doreti_iret +ffffffff82548000 T alltraps +ffffffff82548138 T recall_trap +ffffffff82548150 T alltraps_kern +ffffffff82548153 T alltraps_kern_meltdown +ffffffff82549000 ? Xsyscall32 +ffffffff82549000 A __kutext_start +ffffffff82549000 A __text_page_end +ffffffff8254a000 ? Xtrap00 +ffffffff8254a010 ? Xtrap01 +ffffffff8254a020 ? Xtrap02 +ffffffff8254a028 c calltrap_specstk +ffffffff8254a0f0 ? calltrap_specstk_tramp +ffffffff8254a110 ? Xtrap03 +ffffffff8254a120 ? Xtrap04 +ffffffff8254a130 ? Xtrap05 +ffffffff8254a140 ? Xtrap06 +ffffffff8254a150 ? Xtrap07 +ffffffff8254a160 ? Xtrap08 +ffffffff8254a170 ? Xtrap09 +ffffffff8254a180 ? Xtrap0a +ffffffff8254a190 ? Xtrap0b +ffffffff8254a1a0 ? Xtrap0c +ffffffff8254a1b0 ? Xtrap0d +ffffffff8254a240 ? Xtrap0e +ffffffff8254a250 ? Xintrspurious +ffffffff8254a250 ? Xtrap0f +ffffffff8254a260 ? Xtrap10 +ffffffff8254a270 ? Xtrap11 +ffffffff8254a280 ? Xtrap12 +ffffffff8254a290 ? Xtrap13 +ffffffff8254a2a0 ? Xtrap14 +ffffffff8254a2b0 ? Xtrap15 +ffffffff8254a2c0 ? Xtrap16 +ffffffff8254a2c0 ? Xtrap17 +ffffffff8254a2c0 ? Xtrap18 +ffffffff8254a2c0 ? Xtrap19 +ffffffff8254a2c0 ? Xtrap1a +ffffffff8254a2c0 ? Xtrap1b +ffffffff8254a2c0 ? Xtrap1c +ffffffff8254a2c0 ? Xtrap1d +ffffffff8254a2c0 ? Xtrap1e +ffffffff8254a2c0 ? Xtrap1f +ffffffff8254a2d0 ? x2apic_eoi +ffffffff8254a2f0 ? Xintr_lapic_ipi +ffffffff8254a330 ? Xipi_invltlb +ffffffff8254a360 ? Xipi_invlpg +ffffffff8254a390 ? Xipi_invlrange +ffffffff8254a3d0 ? Xipi_invltlb_pcid +ffffffff8254a410 ? Xipi_invlpg_pcid +ffffffff8254a460 ? Xipi_invlrange_pcid +ffffffff8254a4d0 ? Xintr_lapic_ltimer +ffffffff8254a510 ? Xintr_xen_upcall +ffffffff8254a550 ? Xintr_hyperv_upcall +ffffffff8254a590 ? Xintr_legacy0 +ffffffff8254a5d0 ? Xintr_legacy1 +ffffffff8254a610 ? Xintr_legacy2 +ffffffff8254a650 ? Xintr_legacy3 +ffffffff8254a690 ? Xintr_legacy4 +ffffffff8254a6d0 ? Xintr_legacy5 +ffffffff8254a710 ? Xintr_legacy6 +ffffffff8254a750 ? Xintr_legacy7 +ffffffff8254a790 ? Xintr_legacy8 +ffffffff8254a7d0 ? Xintr_legacy9 +ffffffff8254a810 ? Xintr_legacy10 +ffffffff8254a850 ? Xintr_legacy11 +ffffffff8254a890 ? Xintr_legacy12 +ffffffff8254a8d0 ? Xintr_legacy13 +ffffffff8254a910 ? Xintr_legacy14 +ffffffff8254a950 ? Xintr_legacy15 +ffffffff8254a990 ? Xintr_ioapic_edge0 +ffffffff8254a9d0 ? Xintr_ioapic_edge1 +ffffffff8254aa10 ? Xintr_ioapic_edge2 +ffffffff8254aa50 ? Xintr_ioapic_edge3 +ffffffff8254aa90 ? Xintr_ioapic_edge4 +ffffffff8254aad0 ? Xintr_ioapic_edge5 +ffffffff8254ab10 ? Xintr_ioapic_edge6 +ffffffff8254ab50 ? Xintr_ioapic_edge7 +ffffffff8254ab90 ? Xintr_ioapic_edge8 +ffffffff8254abd0 ? Xintr_ioapic_edge9 +ffffffff8254ac10 ? Xintr_ioapic_edge10 +ffffffff8254ac50 ? Xintr_ioapic_edge11 +ffffffff8254ac90 ? Xintr_ioapic_edge12 +ffffffff8254acd0 ? Xintr_ioapic_edge13 +ffffffff8254ad10 ? Xintr_ioapic_edge14 +ffffffff8254ad50 ? Xintr_ioapic_edge15 +ffffffff8254ad90 ? Xintr_ioapic_edge16 +ffffffff8254add0 ? Xintr_ioapic_edge17 +ffffffff8254ae10 ? Xintr_ioapic_edge18 +ffffffff8254ae50 ? Xintr_ioapic_edge19 +ffffffff8254ae90 ? Xintr_ioapic_edge20 +ffffffff8254aed0 ? Xintr_ioapic_edge21 +ffffffff8254af10 ? Xintr_ioapic_edge22 +ffffffff8254af50 ? Xintr_ioapic_edge23 +ffffffff8254af90 ? Xintr_ioapic_edge24 +ffffffff8254afd0 ? Xintr_ioapic_edge25 +ffffffff8254b010 ? Xintr_ioapic_edge26 +ffffffff8254b050 ? Xintr_ioapic_edge27 +ffffffff8254b090 ? Xintr_ioapic_edge28 +ffffffff8254b0d0 ? Xintr_ioapic_edge29 +ffffffff8254b110 ? Xintr_ioapic_edge30 +ffffffff8254b150 ? Xintr_ioapic_edge31 +ffffffff8254b190 ? Xintr_ioapic_edge32 +ffffffff8254b1d0 ? Xintr_ioapic_edge33 +ffffffff8254b210 ? Xintr_ioapic_edge34 +ffffffff8254b250 ? Xintr_ioapic_edge35 +ffffffff8254b290 ? Xintr_ioapic_edge36 +ffffffff8254b2d0 ? Xintr_ioapic_edge37 +ffffffff8254b310 ? Xintr_ioapic_edge38 +ffffffff8254b350 ? Xintr_ioapic_edge39 +ffffffff8254b390 ? Xintr_ioapic_edge40 +ffffffff8254b3d0 ? Xintr_ioapic_edge41 +ffffffff8254b410 ? Xintr_ioapic_edge42 +ffffffff8254b450 ? Xintr_ioapic_edge43 +ffffffff8254b490 ? Xintr_ioapic_edge44 +ffffffff8254b4d0 ? Xintr_ioapic_edge45 +ffffffff8254b510 ? Xintr_ioapic_edge46 +ffffffff8254b550 ? Xintr_ioapic_edge47 +ffffffff8254b590 ? Xintr_ioapic_edge48 +ffffffff8254b5d0 ? Xintr_ioapic_edge49 +ffffffff8254b610 ? Xintr_ioapic_edge50 +ffffffff8254b650 ? Xintr_ioapic_edge51 +ffffffff8254b690 ? Xintr_ioapic_edge52 +ffffffff8254b6d0 ? Xintr_ioapic_edge53 +ffffffff8254b710 ? Xintr_ioapic_edge54 +ffffffff8254b750 ? Xintr_ioapic_edge55 +ffffffff8254b790 ? Xintr_ioapic_edge56 +ffffffff8254b7d0 ? Xintr_ioapic_edge57 +ffffffff8254b810 ? Xintr_ioapic_edge58 +ffffffff8254b850 ? Xintr_ioapic_edge59 +ffffffff8254b890 ? Xintr_ioapic_edge60 +ffffffff8254b8d0 ? Xintr_ioapic_edge61 +ffffffff8254b910 ? Xintr_ioapic_edge62 +ffffffff8254b950 ? Xintr_ioapic_edge63 +ffffffff8254b990 ? Xintr_ioapic_level0 +ffffffff8254b9d0 ? Xintr_ioapic_level1 +ffffffff8254ba10 ? Xintr_ioapic_level2 +ffffffff8254ba50 ? Xintr_ioapic_level3 +ffffffff8254ba90 ? Xintr_ioapic_level4 +ffffffff8254bad0 ? Xintr_ioapic_level5 +ffffffff8254bb10 ? Xintr_ioapic_level6 +ffffffff8254bb50 ? Xintr_ioapic_level7 +ffffffff8254bb90 ? Xintr_ioapic_level8 +ffffffff8254bbd0 ? Xintr_ioapic_level9 +ffffffff8254bc10 ? Xintr_ioapic_level10 +ffffffff8254bc50 ? Xintr_ioapic_level11 +ffffffff8254bc90 ? Xintr_ioapic_level12 +ffffffff8254bcd0 ? Xintr_ioapic_level13 +ffffffff8254bd10 ? Xintr_ioapic_level14 +ffffffff8254bd50 ? Xintr_ioapic_level15 +ffffffff8254bd90 ? Xintr_ioapic_level16 +ffffffff8254bdd0 ? Xintr_ioapic_level17 +ffffffff8254be10 ? Xintr_ioapic_level18 +ffffffff8254be50 ? Xintr_ioapic_level19 +ffffffff8254be90 ? Xintr_ioapic_level20 +ffffffff8254bed0 ? Xintr_ioapic_level21 +ffffffff8254bf10 ? Xintr_ioapic_level22 +ffffffff8254bf50 ? Xintr_ioapic_level23 +ffffffff8254bf90 ? Xintr_ioapic_level24 +ffffffff8254bfd0 ? Xintr_ioapic_level25 +ffffffff8254c010 ? Xintr_ioapic_level26 +ffffffff8254c050 ? Xintr_ioapic_level27 +ffffffff8254c090 ? Xintr_ioapic_level28 +ffffffff8254c0d0 ? Xintr_ioapic_level29 +ffffffff8254c110 ? Xintr_ioapic_level30 +ffffffff8254c150 ? Xintr_ioapic_level31 +ffffffff8254c190 ? Xintr_ioapic_level32 +ffffffff8254c1d0 ? Xintr_ioapic_level33 +ffffffff8254c210 ? Xintr_ioapic_level34 +ffffffff8254c250 ? Xintr_ioapic_level35 +ffffffff8254c290 ? Xintr_ioapic_level36 +ffffffff8254c2d0 ? Xintr_ioapic_level37 +ffffffff8254c310 ? Xintr_ioapic_level38 +ffffffff8254c350 ? Xintr_ioapic_level39 +ffffffff8254c390 ? Xintr_ioapic_level40 +ffffffff8254c3d0 ? Xintr_ioapic_level41 +ffffffff8254c410 ? Xintr_ioapic_level42 +ffffffff8254c450 ? Xintr_ioapic_level43 +ffffffff8254c490 ? Xintr_ioapic_level44 +ffffffff8254c4d0 ? Xintr_ioapic_level45 +ffffffff8254c510 ? Xintr_ioapic_level46 +ffffffff8254c550 ? Xintr_ioapic_level47 +ffffffff8254c590 ? Xintr_ioapic_level48 +ffffffff8254c5d0 ? Xintr_ioapic_level49 +ffffffff8254c610 ? Xintr_ioapic_level50 +ffffffff8254c650 ? Xintr_ioapic_level51 +ffffffff8254c690 ? Xintr_ioapic_level52 +ffffffff8254c6d0 ? Xintr_ioapic_level53 +ffffffff8254c710 ? Xintr_ioapic_level54 +ffffffff8254c750 ? Xintr_ioapic_level55 +ffffffff8254c790 ? Xintr_ioapic_level56 +ffffffff8254c7d0 ? Xintr_ioapic_level57 +ffffffff8254c810 ? Xintr_ioapic_level58 +ffffffff8254c850 ? Xintr_ioapic_level59 +ffffffff8254c890 ? Xintr_ioapic_level60 +ffffffff8254c8d0 ? Xintr_ioapic_level61 +ffffffff8254c910 ? Xintr_ioapic_level62 +ffffffff8254c950 ? Xintr_ioapic_level63 +ffffffff8254d000 ? codepatch_fill_nop +ffffffff8254d000 A __cptext_start +ffffffff8254d000 A __kutext_end +ffffffff8254d0b0 ? codepatch_maprw +ffffffff8254d190 ? codepatch_unmaprw +ffffffff8254d200 ? codepatch_nop +ffffffff8254d360 ? codepatch_replace +ffffffff8254d510 ? codepatch_call +ffffffff8254d530 ? codepatch_jmp +ffffffff8254e000 A __cptext_end +ffffffff8254e000 A __rodata_start +ffffffff8254e000 C _etext +ffffffff8254e000 C etext +ffffffff8254f000 r seeprom_read +ffffffff8254f004 r icl_mg_pll_find_divisors.div1_vals +ffffffff8254f028 r gen9bc_tgp_ddc_pin_map +ffffffff8254f038 r athn_ac2qid +ffffffff8254f038 r athn_ac2qid +ffffffff8254f038 r athn_ac2qid +ffffffff8254f044 r rtwn_get_rssi.cckoff +ffffffff8254f06c r rsu_ac2qid +ffffffff8254f07c r pckbc_portcmd +ffffffff8254f080 r tht_fifo_write_pad.pad +ffffffff8254f088 r rsu_get_rssi.cckoff +ffffffff8254f09c r adlp_n_revids +ffffffff8254f0ec r apple_iso_trans +ffffffff8254f0f0 r dg2_g12_revid_step_tbl +ffffffff8254f0f8 r wihap_check_tx.txratetable +ffffffff8254f0fc r dmamode +ffffffff8254f124 r gen9_edram_size_mb.sets +ffffffff82550000 r isomappings +ffffffff82550080 r unimappings +ffffffff82550230 r replacements +ffffffff82553b06 r cmd0646_9_tim_udma +ffffffff825a7591 r pp_r600_decoded_lanes +ffffffff825c28bb r cmd680_setup_channel.udma_tbl +ffffffff825ca527 r apollo_udma33_tim +ffffffff825d0614 r substchar +ffffffff825d26c2 r apollo_udma100_tim +ffffffff825f9fd9 r apollo_udma66_tim +ffffffff8260146c r apollo_pio_rec +ffffffff82610856 r cy_pio_rec +ffffffff8263fd3b r apollo_udma133_tim +ffffffff8264c8e0 R drm_ca +ffffffff8264c908 R drm_filtops +ffffffff8264c938 R drmread_filtops +ffffffff8264d000 r vga_emulops +ffffffff8264d048 R vga_stdscreen +ffffffff8264d078 R vga_stdscreen_mono +ffffffff8264d0a8 R vga_stdscreen_bf +ffffffff8264d0d8 R vga_40lscreen +ffffffff8264d108 R vga_40lscreen_mono +ffffffff8264d138 R vga_40lscreen_bf +ffffffff8264d168 R vga_50lscreen +ffffffff8264d198 R vga_50lscreen_mono +ffffffff8264d1c8 R vga_50lscreen_bf +ffffffff8264d1f8 R vga_screenlist +ffffffff8264d208 R vga_screenlist_mono +ffffffff8264d218 R vga_accessops +ffffffff8264d278 r i945_wm_info +ffffffff8264d2b0 r bgansitopc +ffffffff8264d2b8 r pctoansi +ffffffff8264d2f8 r sdma_offsets +ffffffff8264d2f8 r sdma_offsets +ffffffff8264d328 r iha_rate_tbl +ffffffff8264d360 r i830_a_wm_info +ffffffff8264d398 r gen9_edram_size_mb.ways +ffffffff8264d400 r aggr_periodic_times +ffffffff8264d480 r jsl_ehl_revids +ffffffff8264d4f8 r michael_final.pad +ffffffff8264d520 r rt_copysa.maskarray +ffffffff8264d528 r i915_wm_info +ffffffff8264d530 r amdgpu_ih_clientid_jpeg +ffffffff8264d530 r amdgpu_ih_clientid_uvds +ffffffff8264d530 r amdgpu_ih_clientid_vcns +ffffffff8264d530 r amdgpu_ih_clientid_vcns +ffffffff8264d530 r amdgpu_ih_clientid_vcns +ffffffff8264d568 r vga_setfontset.cmaptabb +ffffffff8264d580 r tgl_revids +ffffffff8264d5d8 r i830_bc_wm_info +ffffffff8264d648 r hsw_activate_psr2.map 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ar5211_mode +ffffffff826ba2c0 r ar5211_ini +ffffffff826baad0 r ar5211_rf +ffffffff826bb000 r ar5212_pcie +ffffffff826bb080 r ar5212_mode +ffffffff826bb310 r ar5212_ini +ffffffff826bbc80 r ar5212_ar5111_mode +ffffffff826bbf20 r ar5212_ar5112_mode +ffffffff826bc1b0 r ar5413_mode +ffffffff826bcb10 r ar2413_mode +ffffffff826bd430 r ar2425_mode +ffffffff826bdd90 r ar5111_bbgain +ffffffff826be090 r ar5112_bbgain +ffffffff826bf000 r athn_5ghz_chans +ffffffff826bf020 r athn_rates +ffffffff826c0000 r athn_rates +ffffffff826c1000 r ar9160_ini +ffffffff826c1068 r ar5416_ini +ffffffff826c10d0 r ar5416_serdes +ffffffff826c10e8 r ar9160_1_1_addac +ffffffff826c10f8 r ar9160_1_0_addac +ffffffff826c1108 r ar5416_2_2_addac +ffffffff826c1118 r ar5416_2_1_addac +ffffffff826c1128 r ar5416_set_power_calib.chainoffset +ffffffff826c1140 r ar9160_bank6tpc_vals +ffffffff826c11c0 r ar5416_bank6tpc_vals +ffffffff826c1240 r ar5416_bb_rfgain_vals_2g +ffffffff826c1340 r ar5416_bb_rfgain_vals_5g +ffffffff826c1440 r ar5416_bank6_vals +ffffffff826c14c0 r ar9160_regs +ffffffff826c1540 r ar9160_vals_5g20 +ffffffff826c1640 r ar9160_vals_5g40 +ffffffff826c1740 r ar9160_vals_2g40 +ffffffff826c1840 r ar9160_vals_2g20 +ffffffff826c1940 r ar9160_cm_regs +ffffffff826c1c30 r ar9160_cm_vals +ffffffff826c2210 r ar5416_regs +ffffffff826c2290 r ar5416_vals_5g20 +ffffffff826c2390 r ar5416_vals_5g40 +ffffffff826c2490 r ar5416_vals_2g40 +ffffffff826c2590 r ar5416_vals_2g20 +ffffffff826c2690 r ar5416_cm_regs +ffffffff826c2980 r ar5416_cm_vals +ffffffff826c2f60 r ar5416_serdes_regs +ffffffff826c2f90 r ar5416_serdes_vals +ffffffff826c2fc0 r ar9160_1_1_addac_vals +ffffffff826c3040 r ar9160_1_0_addac_vals +ffffffff826c30c0 r ar5416_2_2_addac_vals +ffffffff826c3150 r ar5416_2_1_addac_vals +ffffffff826c4000 r ar9280_2_0_ini +ffffffff826c4068 r ar9280_2_0_serdes +ffffffff826c4080 r ar9280_2_0_rx_gain_23db_backoff +ffffffff826c40a0 r ar9280_2_0_rx_gain_13db_backoff +ffffffff826c40c0 r ar9280_2_0_rx_gain +ffffffff826c40e0 r ar9280_2_0_tx_gain_high_power +ffffffff826c4100 r ar9280_2_0_tx_gain +ffffffff826c4120 r ar9280_init_from_rom.chainoffset +ffffffff826c4130 r ar9280_2_0_regs +ffffffff826c4190 r ar9280_2_0_vals_5g20 +ffffffff826c4250 r ar9280_2_0_vals_5g40 +ffffffff826c4310 r ar9280_2_0_vals_2g40 +ffffffff826c43d0 r ar9280_2_0_vals_2g20 +ffffffff826c4490 r ar9280_2_0_cm_regs +ffffffff826c4740 r ar9280_2_0_cm_vals +ffffffff826c4c90 r ar9280_2_0_fast_clock_regs +ffffffff826c4cb0 r ar9280_2_0_fast_clock_vals_5g20 +ffffffff826c4cf0 r ar9280_2_0_fast_clock_vals_5g40 +ffffffff826c4d30 r ar9280_2_0_serdes_regs +ffffffff826c4d60 r ar9280_2_0_serdes_vals +ffffffff826c4d90 r ar9280_2_0_rx_gain_regs +ffffffff826c4ea0 r ar9280_2_0_rx_gain_23db_backoff_vals_5g +ffffffff826c50b0 r ar9280_2_0_rx_gain_23db_backoff_vals_2g +ffffffff826c52c0 r ar9280_2_0_rx_gain_13db_backoff_vals_5g +ffffffff826c54d0 r ar9280_2_0_rx_gain_13db_backoff_vals_2g +ffffffff826c56e0 r ar9280_2_0_rx_gain_vals_5g +ffffffff826c58f0 r ar9280_2_0_rx_gain_vals_2g +ffffffff826c5b00 r ar9280_2_0_tx_gain_regs +ffffffff826c5b40 r ar9280_2_0_tx_gain_high_power_vals_5g +ffffffff826c5bc0 r ar9280_2_0_tx_gain_high_power_vals_2g +ffffffff826c5c40 r ar9280_2_0_tx_gain_vals_5g +ffffffff826c5cc0 r ar9280_2_0_tx_gain_vals_2g +ffffffff826c6000 r ar9271_ini +ffffffff826c6068 r ar9285_1_2_ini +ffffffff826c60d0 r ar9280_2_0_serdes +ffffffff826c60e8 r ar9271_tx_gain_high_power +ffffffff826c6108 r ar9271_tx_gain +ffffffff826c6128 r ar9285_2_0_tx_gain_high_power +ffffffff826c6148 r ar9285_2_0_tx_gain +ffffffff826c6168 r ar9285_1_2_tx_gain_high_power +ffffffff826c6188 r ar9285_1_2_tx_gain +ffffffff826c61b0 r ar9271_regs +ffffffff826c6410 r ar9271_vals_2g40 +ffffffff826c68d0 r ar9271_vals_2g20 +ffffffff826c6d90 r ar9271_cm_regs +ffffffff826c7020 r ar9271_cm_vals +ffffffff826c7540 r ar9285_1_2_regs +ffffffff826c77a0 r ar9285_1_2_vals_2g40 +ffffffff826c7c60 r ar9285_1_2_vals_2g20 +ffffffff826c8120 r ar9285_1_2_cm_regs +ffffffff826c83a0 r ar9285_1_2_cm_vals +ffffffff826c8890 r ar9280_2_0_serdes_regs +ffffffff826c88c0 r ar9280_2_0_serdes_vals +ffffffff826c88f0 r ar9271_tx_gain_regs +ffffffff826c8940 r ar9271_tx_gain_high_power_vals_2g +ffffffff826c89d0 r ar9271_tx_gain_vals_2g +ffffffff826c8a60 r ar9285_1_2_tx_gain_regs +ffffffff826c8ab0 r ar9285_2_0_tx_gain_high_power_vals_2g +ffffffff826c8b50 r ar9285_2_0_tx_gain_vals_2g +ffffffff826c8bf0 r ar9285_1_2_tx_gain_high_power_vals_2g +ffffffff826c8c90 r ar9285_1_2_tx_gain_vals_2g +ffffffff826c9000 r ar9287_1_1_ini +ffffffff826c9068 r ar9280_2_0_serdes +ffffffff826c9080 r ar9287_1_1_rx_gain +ffffffff826c90a0 r ar9287_1_1_tx_gain +ffffffff826c90c0 r ar9287_1_1_regs +ffffffff826c9120 r ar9287_1_1_vals_2g40 +ffffffff826c91d0 r ar9287_1_1_vals_2g20 +ffffffff826c9280 r ar9287_1_1_cm_regs +ffffffff826c9560 r ar9287_1_1_cm_vals +ffffffff826c9b20 r ar9280_2_0_serdes_regs +ffffffff826c9b50 r ar9280_2_0_serdes_vals +ffffffff826c9b80 r ar9287_1_1_rx_gain_regs +ffffffff826c9d90 r ar9287_1_1_rx_gain_vals_2g +ffffffff826ca1a0 r ar9287_1_1_tx_gain_regs +ffffffff826ca200 r ar9287_1_1_tx_gain_vals_2g +ffffffff826cb000 r athn_rates +ffffffff826cc000 r ar9485_1_1_ini +ffffffff826cc068 r ar9485_1_1_serdes +ffffffff826cc080 r ar9380_2_2_ini +ffffffff826cc0e8 r ar9380_2_2_serdes +ffffffff826cc100 r ar9380_2_2_rx_gain_wo_xlna +ffffffff826cc120 r ar9380_2_2_rx_gain +ffffffff826cc140 r ar9485_1_1_rx_gain +ffffffff826cc160 r ar9380_2_2_tx_gain_high_ob_db +ffffffff826cc180 r ar9380_2_2_tx_gain_low_ob_db +ffffffff826cc1a0 r ar9380_2_2_tx_gain_high_power +ffffffff826cc1c0 r ar9380_2_2_tx_gain +ffffffff826cc1e0 r ar9485_1_1_tx_gain +ffffffff826cc200 r ar9485_1_1_regs +ffffffff826cc270 r ar9485_1_1_vals_2g40 +ffffffff826cc350 r ar9485_1_1_vals_2g20 +ffffffff826cc430 r ar9485_1_1_cm_regs +ffffffff826cc720 r ar9485_1_1_cm_vals +ffffffff826ccd00 r ar9485_1_1_serdes_regs +ffffffff826ccd0c r ar9485_1_1_serdes_vals +ffffffff826ccd20 r ar9380_2_2_regs +ffffffff826ccdb0 r ar9380_2_2_vals_5g20 +ffffffff826cced0 r ar9380_2_2_vals_5g40 +ffffffff826ccff0 r ar9380_2_2_vals_2g40 +ffffffff826cd110 r ar9380_2_2_vals_2g20 +ffffffff826cd230 r ar9380_2_2_cm_regs +ffffffff826cd5d0 r ar9380_2_2_cm_vals +ffffffff826cdd00 r ar9380_2_2_fast_clock_regs +ffffffff826cdd20 r ar9380_2_2_fast_clock_vals_5g20 +ffffffff826cdd50 r ar9380_2_2_fast_clock_vals_5g40 +ffffffff826cdd74 r ar9380_2_2_serdes_regs +ffffffff826cdd80 r ar9380_2_2_serdes_vals +ffffffff826cdd90 r ar9380_2_2_rx_gain_regs +ffffffff826cdf90 r ar9380_2_2_rx_gain_wo_xlna_vals +ffffffff826ce390 r ar9380_2_2_rx_gain_vals +ffffffff826ce790 r ar9485_1_1_rx_gain_regs +ffffffff826ce890 r ar9485_1_1_rx_gain_vals +ffffffff826cea90 r ar9380_2_2_tx_gain_regs +ffffffff826ceb60 r ar9380_2_2_tx_gain_high_ob_db_vals_5g +ffffffff826ced00 r ar9380_2_2_tx_gain_high_ob_db_vals_2g +ffffffff826ceea0 r ar9380_2_2_tx_gain_low_ob_db_vals_5g +ffffffff826cf040 r ar9380_2_2_tx_gain_low_ob_db_vals_2g +ffffffff826cf1e0 r ar9380_2_2_tx_gain_high_power_vals_5g +ffffffff826cf380 r ar9380_2_2_tx_gain_high_power_vals_2g +ffffffff826cf520 r ar9380_2_2_tx_gain_vals_5g +ffffffff826cf6c0 r ar9380_2_2_tx_gain_vals_2g +ffffffff826cf860 r ar9485_1_1_tx_gain_regs +ffffffff826cf8f0 r ar9485_1_1_tx_gain_vals_2g +ffffffff826cfa10 r ar9380_def_rom +ffffffff826cfe50 r ar9380_def_rom_h112 +ffffffff826d0290 r ar9380_def_rom_h116 +ffffffff826d06d0 r ar9380_def_rom_x112 +ffffffff826d0b10 r ar9380_def_rom_x113 +ffffffff826d1000 R atw_txthresh_tab_lo +ffffffff826d1050 R atw_txthresh_tab_hi +ffffffff826d10a0 r atw_attach.empty_macaddr +ffffffff826d10b0 r atw_attach.type_strings +ffffffff826d10d0 r atw_rfmd2958_ifn +ffffffff826d1110 r atw_rfmd2958_rf1r +ffffffff826d1150 r atw_rxintr.rate_tbl +ffffffff826d2000 r rtw_identify_sta.empty_macaddr +ffffffff826d3000 r rtwn_set_key.etherzeroaddr +ffffffff826d3010 r rtl8188eu_rf_prog +ffffffff826d3030 r rtl8192e_rf_prog +ffffffff826d3060 r rtl8188ce_rf_prog +ffffffff826d3080 r rtl8188ru_rf_prog +ffffffff826d30a0 r rtl8188cu_rf_prog +ffffffff826d30c0 r rtl8192ce_rf_prog +ffffffff826d30f0 r rtl8188ru_txagc +ffffffff826d3150 r rtl8188eu_rf_regs +ffffffff826d31b0 r rtl8188eu_rf_vals +ffffffff826d3330 r rtl8192e_rf_regs +ffffffff826d33a0 r rtl8192e_rf_vals +ffffffff826d3540 r rtl8192e_rf2_regs +ffffffff826d3590 r rtl8192e_rf2_vals +ffffffff826d36d0 r rtl8192ce_rf1_regs +ffffffff826d3760 r rtl8188ce_rf_vals +ffffffff826d39a0 r rtl8188ru_rf_vals +ffffffff826d3be0 r rtl8188cu_rf_vals +ffffffff826d3e20 r rtl8192ce_rf1_vals +ffffffff826d4060 r rtl8192ce_rf2_regs +ffffffff826d4090 r rtl8192ce_rf2_vals +ffffffff826d4130 r rtl8192cu_txagc +ffffffff826d5000 r rt2560_rf2522_r2 +ffffffff826d5040 r rt2560_rf2524_r2 +ffffffff826d5080 r rt2560_rf2525_hi_r2 +ffffffff826d50c0 r rt2560_rf2525_r2 +ffffffff826d5100 r rt2560_rf2525e_r2 +ffffffff826d5140 r rt2560_rf2526_hi_r2 +ffffffff826d5180 r rt2560_rf2526_r2 +ffffffff826d51c0 r rt2560_def_bbp +ffffffff826d5200 r rt2560_def_mac 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intel_hpll_vco.cl_vco +ffffffff826db020 r sgpr_init_compute_shader +ffffffff826db0d0 r trinity_override_mgpg_sequences +ffffffff826db490 r vgpr_init_compute_shader +ffffffff826db550 r voltage_swing_to_pre_emphasis +ffffffff826dc000 r malo_cmd_string.cmds +ffffffff826dc0b0 r malo_cmd_string_result.results +ffffffff826dd000 R bwi_vendor_led_act +ffffffff826dd00c R bwi_default_led_act +ffffffff826dd010 R bwi_led_duration +ffffffff826dd380 r bwi_sup_bphy +ffffffff826dd3c0 r bwi_phy_freq_11g_rev1 +ffffffff826dd5c0 r bwi_phy_rotor_11g_rev1 +ffffffff826dd6a0 r bwi_phy_noise_scale_11g_rev2 +ffffffff826dd6e0 r bwi_phy_noise_scale_11g_rev7 +ffffffff826dd720 r bwi_phy_noise_scale_11g +ffffffff826dd760 r bwi_phy_sigma_sq_11g_rev2 +ffffffff826dd7d0 r bwi_phy_sigma_sq_11g_rev7 +ffffffff826dd840 r bwi_phy_delay_11g_rev1 +ffffffff826dd920 r bwi_rf_get_gains.save_phy_regs +ffffffff826dd940 r bwi_rf_lo_find.map +ffffffff826dd960 r bwi_txpower_map_11b +ffffffff826dd9a0 r bwi_txpower_map_11g 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+ffffffff826df0b0 R ohci_device_ctrl_methods +ffffffff826df0e0 R ohci_device_intr_methods +ffffffff826df110 R ohci_device_bulk_methods +ffffffff826df140 R ohci_device_isoc_methods +ffffffff826df170 R ohci_devd +ffffffff826df182 R ohci_confd +ffffffff826df18b R ohci_ifcd +ffffffff826df194 R ohci_endpd +ffffffff826df19b R ohci_hubd +ffffffff826e0000 R ehci_bus_methods +ffffffff826e0030 R ehci_root_ctrl_methods +ffffffff826e0060 R ehci_root_intr_methods +ffffffff826e0090 R ehci_device_ctrl_methods +ffffffff826e00c0 R ehci_device_intr_methods +ffffffff826e00f0 R ehci_device_bulk_methods +ffffffff826e0120 R ehci_device_isoc_methods +ffffffff826e0150 R ehci_devd +ffffffff826e0162 R ehci_odevd +ffffffff826e016c R ehci_confd +ffffffff826e0175 R ehci_ifcd +ffffffff826e017e R ehci_endpd +ffffffff826e0185 R ehci_hubd +ffffffff826e1000 R xhci_bus_methods +ffffffff826e1030 R xhci_root_ctrl_methods +ffffffff826e1060 R xhci_root_intr_methods +ffffffff826e1090 R xhci_device_ctrl_methods +ffffffff826e10c0 R xhci_device_intr_methods +ffffffff826e10f0 R xhci_device_bulk_methods +ffffffff826e1120 R xhci_device_isoc_methods +ffffffff826e1150 R xhci_devd +ffffffff826e1162 R xhci_confd +ffffffff826e116b R xhci_ifcd +ffffffff826e1174 R xhci_endpd +ffffffff826e117b R xhci_endpcd +ffffffff826e1181 R xhci_hubd +ffffffff826e4000 R radio_ca +ffffffff826e5000 R ipmi_ca +ffffffff826e6000 R vscsi_ca +ffffffff826e6028 R vscsi_switch +ffffffff826e6050 R vscsi_filtops +ffffffff826e7000 R mpath_ca +ffffffff826e7028 R mpath_switch +ffffffff826e8000 R softraid_ca +ffffffff826e8028 R sr_switch +ffffffff826e9000 r spdmem_basic_types +ffffffff826e90a0 r spdmem_parity_types +ffffffff826e90e0 r spdmem_ddr4_decode.ddr4_chipsize +ffffffff826ea000 R kstat_rlock_ops +ffffffff826ea010 R kstat_wlock_ops +ffffffff826ea020 R kstat_mutex_ops +ffffffff826ea030 R kstat_cpu_ops +ffffffff826ea040 r kstat_id_tree_RBT_INFO +ffffffff826ea058 R kstat_id_tree_RBT_TYPE +ffffffff826ea060 r kstat_pv_tree_RBT_INFO +ffffffff826ea078 R kstat_pv_tree_RBT_TYPE +ffffffff826ea080 r kstat_nm_tree_RBT_INFO +ffffffff826ea098 R kstat_nm_tree_RBT_TYPE +ffffffff826eb000 r fuse_rd_filtops +ffffffff826ec000 R fusefs_vfsops +ffffffff826ec070 R fusefs_vars +ffffffff826ed000 R fusefs_vops +ffffffff826ed110 R fusefsread_filtops +ffffffff826ed140 R fusefswrite_filtops +ffffffff826ed170 R fusefsvnode_filtops +ffffffff826ee000 r pf_state_tree_RBT_INFO +ffffffff826ee018 R pf_state_tree_RBT_TYPE +ffffffff826ee020 r pf_state_tree_id_RBT_INFO +ffffffff826ee038 R pf_state_tree_id_RBT_TYPE +ffffffff826ee040 r pf_translate_af.zero +ffffffff826ef000 R hfsc_ops +ffffffff826ef038 R ifq_hfsc_ops +ffffffff826ef040 R hfsc_pf_ops +ffffffff826ef088 R pfq_hfsc_ops +ffffffff826f0000 r fqcodel_ops +ffffffff826f0038 R ifq_fqcodel_ops +ffffffff826f0040 r fqcodel_pf_ops +ffffffff826f0088 R pfq_fqcodel_ops +ffffffff826f0090 r codel_intervals +ffffffff826f1000 R pfsync_acts +ffffffff826f2000 R hotplugread_filtops +ffffffff826f3000 R dtps_static +ffffffff826f4000 R db_show_all_cmds +ffffffff826f4180 R db_show_cmds +ffffffff826f44c0 R db_boot_cmds +ffffffff826f45a0 R db_command_table +ffffffff826f5000 R ddb_vars +ffffffff826f6000 R audio_ca +ffffffff826f6028 R audioctlread_filtops +ffffffff826f6058 R audiowrite_filtops +ffffffff826f6088 R audioread_filtops +ffffffff826f7000 R midi_ca +ffffffff826f7028 R midiwrite_filtops +ffffffff826f7058 R midiread_filtops +ffffffff826f8000 r mulawtolin16 +ffffffff826f8200 r lintomulaw +ffffffff826f9000 R randomread_filtops +ffffffff826f9030 R randomwrite_filtops +ffffffff826fa000 R video_ca +ffffffff826fa028 R video_filtops +ffffffff826fb000 R cd9660_vfsops +ffffffff826fc000 R cd9660_vops +ffffffff826fc110 R cd9660_specvops +ffffffff826fc220 R cd9660_fifovops +ffffffff826fc330 R cd9660read_filtops +ffffffff826fc360 R cd9660write_filtops +ffffffff826fc390 R cd9660vnode_filtops +ffffffff826fd000 R udf_vfsops +ffffffff826fe000 R udf_vops +ffffffff826fe110 r mon_lens +ffffffff826ff000 r month_days +ffffffff82700000 R execsw +ffffffff82701000 r shstrtab +ffffffff82702000 R copyright +ffffffff827020c0 r initpaths +ffffffff82703000 R sysent +ffffffff82705000 R bufq_impls +ffffffff82706000 R kqueueops +ffffffff82706038 R kqread_filtops +ffffffff82706068 R proc_filtops +ffffffff82706098 R file_filtops +ffffffff827060c8 R timer_filtops +ffffffff82706100 R sysfilt_ops +ffffffff82706148 R seltrue_filtops +ffffffff82706178 R dead_filtops +ffffffff827061a8 R badfd_filtops +ffffffff827061d8 r mutex_klistops +ffffffff827061f0 r rwlock_klistops +ffffffff82707000 R kv_exec +ffffffff82708000 R addrmask +ffffffff82709000 r rw_ops +ffffffff8270a000 r proc_printit.pstat +ffffffff8270b000 R pledge_syscalls +ffffffff8270ba60 r pledgenames +ffffffff8270bcb0 r pledgereq +ffffffff8270c000 r unvname_rbt_RBT_INFO +ffffffff8270c018 R unvname_rbt_RBT_TYPE +ffffffff8270d000 R sig_filtops +ffffffff8270d030 R sigprop +ffffffff8270e000 R kern_vars +ffffffff8270e2f0 R hw_vars +ffffffff8270f000 R tc_vars +ffffffff82710000 r sys_gettimeofday.zerotz +ffffffff82711000 r taskq_sys_name +ffffffff82711006 r taskq_sys_mp_name +ffffffff82711010 R systq +ffffffff82711018 R systqmp +ffffffff82713000 r gpt_get_fstype.gpt_uuid_openbsd +ffffffff82713010 r gpt_get_fstype.gpt_uuid_msdos +ffffffff82713020 r gpt_get_fstype.gpt_uuid_chromerootfs +ffffffff82713030 r gpt_get_fstype.gpt_uuid_linux +ffffffff82713040 r gpt_get_fstype.gpt_uuid_hfs +ffffffff82713050 r gpt_get_fstype.gpt_uuid_unused +ffffffff82713060 r gpt_get_fstype.gpt_uuid_efi_system +ffffffff82713070 r gpt_get_fstype.gpt_uuid_bios_boot +ffffffff82714000 r hiballoc_addr_RBT_INFO +ffffffff82714018 R hiballoc_addr_RBT_TYPE +ffffffff82715000 R logread_filtops +ffffffff82716000 r phtree_RBT_INFO +ffffffff82716018 R phtree_RBT_TYPE +ffffffff82716020 r pool_lock_ops_rw +ffffffff82716058 r pool_lock_ops_mtx +ffffffff82717000 r pselregister.evf +ffffffff8271700c r pselregister.evff +ffffffff82718000 R pipe_rfiltops +ffffffff82718030 R pipe_wfiltops +ffffffff82718060 R pipe_efiltops +ffffffff82718090 r pipeops +ffffffff82719000 R socketops +ffffffff8271a000 R sysvsem_vars +ffffffff8271b000 R char_type +ffffffff8271b100 R ttyread_filtops +ffffffff8271b130 R ttywrite_filtops +ffffffff8271b160 R ttyexcept_filtops +ffffffff8271c000 R ptcread_filtops +ffffffff8271c030 R ptcwrite_filtops +ffffffff8271c060 R ptcexcept_filtops +ffffffff8271e000 R domains +ffffffff8271f000 R unixdomain +ffffffff8271f050 R unixsw +ffffffff82720000 R solisten_filtops +ffffffff82720030 R soread_filtops +ffffffff82720060 R sowrite_filtops +ffffffff82720090 R soexcept_filtops +ffffffff827200c0 R socket_klistops +ffffffff82721000 R sun_noname +ffffffff82721010 R uipc_usrreqs +ffffffff827210b0 R uipc_dgram_usrreqs +ffffffff82721150 R unpstctl_vars +ffffffff82721180 R unpsqctl_vars +ffffffff827211b0 R unpdgctl_vars +ffffffff82722000 r namecache_rb_cache_RBT_INFO +ffffffff82722018 R namecache_rb_cache_RBT_TYPE +ffffffff82723000 R generic_filtops +ffffffff82724000 r buf_rb_bufs_RBT_INFO +ffffffff82724018 R buf_rb_bufs_RBT_TYPE +ffffffff82724020 r typename +ffffffff82725000 R sync_vops +ffffffff82726000 R vnops +ffffffff82727000 R spec_vops +ffffffff82728000 R dead_vops +ffffffff82729000 R fifo_vops +ffffffff82729110 R fiforead_filtops +ffffffff82729140 R fifowrite_filtops +ffffffff82729170 R fifoexcept_filtops +ffffffff8272a000 R regyear +ffffffff8272a020 R leapyear +ffffffff8272a040 r dos2unix +ffffffff8272a140 r u2l +ffffffff8272a240 r unix2dos +ffffffff8272b008 R msdosfs_vfsops +ffffffff8272c000 R msdosfs_vops +ffffffff8272c110 R msdosfsread_filtops +ffffffff8272c140 R msdosfswrite_filtops +ffffffff8272c170 R msdosfsvnode_filtops +ffffffff8272d000 r _utf_count +ffffffff8272e000 R ntfs_vfsops +ffffffff8272f000 R ntfs_vops +ffffffff82730000 R bpfread_filtops +ffffffff82730030 R bpf_mbuf_ops +ffffffff82731000 r bpf_mem_ops +ffffffff82732000 R priq_ops +ffffffff82732038 R ifq_priq_ops +ffffffff82732040 r ifq_kstat_tpl +ffffffff82732158 r ifiq_kstat_tpl +ffffffff82733000 r ether_crc32_le_update.crctab +ffffffff82733040 r ether_crc32_be_update.crctab +ffffffff82734000 r lcp +ffffffff82734078 r ipcp +ffffffff827340f0 r ipv6cp +ffffffff82734168 r chap +ffffffff827341e0 r pap +ffffffff82735000 R ifmedia_baudrate_descriptions +ffffffff82736000 r fcstab +ffffffff82738000 R tunread_filtops +ffffffff82738030 R tunwrite_filtops +ffffffff82739000 R bridge_brport +ffffffff8273a000 R bstp_etheraddr +ffffffff8273b000 r eb_tree_RBT_INFO +ffffffff8273b018 R eb_tree_RBT_TYPE +ffffffff8273c000 r veb_etherbridge_ops +ffffffff8273c028 r veb_pf_ipv4 +ffffffff8273c040 r veb_pf_ipv6 +ffffffff8273d000 r pipex_pppoe_padding +ffffffff8273e000 r rn_addmask.normal_chars +ffffffff8273f000 R route_src +ffffffff8273f010 R route_usrreqs +ffffffff8273f0b0 R routedomain +ffffffff8273f100 R routesw +ffffffff82740000 R gre_vars +ffffffff82740030 r mgre_tree_RBT_INFO +ffffffff82740048 R mgre_tree_RBT_TYPE +ffffffff82740050 r egre_tree_RBT_INFO +ffffffff82740068 R egre_tree_RBT_TYPE +ffffffff82740070 r nvgre_ucast_tree_RBT_INFO +ffffffff82740088 R nvgre_ucast_tree_RBT_TYPE +ffffffff82740090 r nvgre_mcast_tree_RBT_INFO +ffffffff827400a8 R nvgre_mcast_tree_RBT_TYPE +ffffffff827400b0 r eoip_tree_RBT_INFO +ffffffff827400c8 R eoip_tree_RBT_TYPE +ffffffff827400d0 r nvgre_etherbridge_ops +ffffffff82741000 r trunk_protos +ffffffff82742000 R ethermulticastaddr_slowprotocols +ffffffff82742006 R lacp_info_tlv_template +ffffffff8274200e R marker_info_tlv_template +ffffffff82742012 R marker_response_tlv_template +ffffffff82742020 R lacp_timer_funcs +ffffffff82743000 r lacp_rxm_state_names +ffffffff82743040 r lacp_rxm_event_names +ffffffff82743090 r aggr_port_selected_names +ffffffff827430b0 r lacp_mux_state_names +ffffffff827430e0 r lacp_mux_event_names +ffffffff82743128 r lacp_address_slow +ffffffff82744000 r tpmr_pf_ipv4 +ffffffff82744018 r tpmr_pf_ipv6 +ffffffff82745000 r bpe_tree_RBT_INFO +ffffffff82745018 R bpe_tree_RBT_TYPE +ffffffff82745020 r bpe_etherbridge_ops +ffffffff82746000 R pppx_rd_filtops +ffffffff82746030 R pppx_wr_filtops +ffffffff82746060 r pppx_ifs_RBT_INFO +ffffffff82746078 R pppx_ifs_RBT_TYPE +ffffffff82746080 r pppac_rd_filtops +ffffffff827460b0 r pppac_wr_filtops +ffffffff82747000 r vxlan_peers_RBT_INFO +ffffffff82747018 R vxlan_peers_RBT_TYPE +ffffffff82747020 r vxlan_etherbridge_ops +ffffffff82748000 R stoeplitz_cache +ffffffff82749000 R ieee80211_std_rateset_11a +ffffffff82749010 R ieee80211_std_rateset_11b +ffffffff82749020 R ieee80211_std_rateset_11g +ffffffff82749030 R ieee80211_std_ratesets_11n +ffffffff827493b0 R ieee80211_std_ratesets_11ac +ffffffff827496b0 r ieee80211_setbasicrates.basic +ffffffff82749710 r ieee80211_setmode.chanflags +ffffffff82749730 r ieee80211_rate2media.rates +ffffffff827498c0 r ieee80211_media2rate.ieeerates +ffffffff8274a000 r Sbox +ffffffff8274c000 r ieee80211_ioctl.empty_macaddr +ffffffff8274d000 r ieee80211_find_rxnode.zero +ffffffff8274d008 r ieee80211_tree_RBT_INFO +ffffffff8274d020 R ieee80211_tree_RBT_TYPE +ffffffff8274d028 r ieee80211_ess_tree_RBT_INFO +ffffffff8274d040 R ieee80211_ess_tree_RBT_TYPE +ffffffff8274d048 r ieee80211_do_slow_print.merge_print_intvl +ffffffff8274e020 R ieee80211_edca_table +ffffffff8274e0e0 R ieee80211_qap_edca_table +ffffffff8274f000 R ieee80211_mgt_subtype_name +ffffffff8274f080 R ieee80211_state_name +ffffffff8274f0b0 R ieee80211_phymode_name +ffffffff82750000 r ieee80211_r_ctry +ffffffff82750ae0 r ieee80211_r_names +ffffffff82750f80 r ieee80211_r_map +ffffffff82752000 R zeroin_addr +ffffffff82753000 R inetdomain +ffffffff82753050 R inetsw +ffffffff82754000 R divertctl_vars +ffffffff82754030 R divert_usrreqs +ffffffff82755000 R icmpctl_vars +ffffffff82756000 R ipctl_vars +ffffffff82756150 R inetctlerrmap +ffffffff82757000 R rip_usrreqs +ffffffff82758000 R tcp_timer_funcs +ffffffff82759000 R tcp_usrreqs +ffffffff827590a0 R tcp6_usrreqs +ffffffff82759140 R tcpctl_vars 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x86_soft_intr_to_ssir +ffffffff827af000 R Xexceptions +ffffffff827af100 r spl_lowered +ffffffff827af12d R i8259_stubs +ffffffff827af2ad R ioapic_edge_stubs +ffffffff827af8ad R ioapic_level_stubs +ffffffff827b0000 R _stac +ffffffff827b0003 R _clac +ffffffff827b1000 R x86_bus_space_io_ops +ffffffff827b1130 R x86_bus_space_mem_ops +ffffffff827b2000 ? cpu_spinup_trampoline +ffffffff827b20b6 R cpu_spinup_trampoline_end +ffffffff827b20b6 R mp_tramp_data_start +ffffffff827b20fc R mp_tramp_data_end +ffffffff827b4000 R db_acpi_cmds +ffffffff827b40a0 R db_machine_command_table +ffffffff827b5000 r i8254_delay.delaytab +ffffffff827b6000 R rasops_cmap +ffffffff827b7000 r reverse +ffffffff827b7100 r ibm437_level1 +ffffffff827b7230 r ibm437_level2_0 +ffffffff827b7248 r ibm437_level2_1 +ffffffff827b7260 r ibm437_level2_3 +ffffffff827b7278 r ibm437_level2_32 +ffffffff827b7290 r ibm437_level2_34 +ffffffff827b72a8 r ibm437_level2_35 +ffffffff827b72c0 r ibm437_level2_37 +ffffffff827b72e0 r ibm437_chars_0 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rlphys +ffffffff827c2000 R lxtphy_ca +ffffffff827c2028 R lxtphy_funcs +ffffffff827c2040 R lxtphy971_funcs +ffffffff827c2060 r lxtphys +ffffffff827c3000 R luphy_ca +ffffffff827c3028 R luphy_funcs +ffffffff827c3040 r luphys +ffffffff827c4000 R mtdphy_ca +ffffffff827c4028 R mtdphy_funcs +ffffffff827c4040 r mtdphys +ffffffff827c5000 R icsphy_ca +ffffffff827c5028 R icsphy_funcs +ffffffff827c5040 r icsphys +ffffffff827c6000 R sqphy_ca +ffffffff827c6028 R sqphy_funcs +ffffffff827c6040 r sqphys +ffffffff827c7000 R tqphy_ca +ffffffff827c7028 R tqphy_funcs +ffffffff827c7040 r tqphys +ffffffff827c8000 R ukphy_ca +ffffffff827c8028 R ukphy_funcs +ffffffff827c9000 R dcphy_ca +ffffffff827c9028 R dcphy_funcs +ffffffff827ca000 R bmtphy_ca +ffffffff827ca028 R bmtphy_funcs +ffffffff827ca040 r bmtphys +ffffffff827cb000 R brgphy_ca +ffffffff827cb028 R brgphy_copper_funcs +ffffffff827cb040 R brgphy_fiber_funcs +ffffffff827cb058 R brgphy_5708s_funcs +ffffffff827cb070 R brgphy_5709s_funcs +ffffffff827cb090 r brgphys +ffffffff827cb300 r brgphy_bcm5401_dspcode.dspcode +ffffffff827cc000 R xmphy_ca +ffffffff827cc028 R xmphy_funcs +ffffffff827cc040 r xmphys +ffffffff827cd000 R amphy_ca +ffffffff827cd028 R amphy_funcs +ffffffff827cd040 r amphys +ffffffff827ce000 R acphy_ca +ffffffff827ce028 R acphy_funcs +ffffffff827ce040 r acphys +ffffffff827cf000 R nsgphy_ca +ffffffff827cf028 R nsgphy_funcs +ffffffff827cf040 r nsgphys +ffffffff827d0000 R urlphy_ca +ffffffff827d0028 R urlphy_funcs +ffffffff827d1000 R rgephy_ca +ffffffff827d1028 R rgephy_funcs +ffffffff827d1040 r rgephys +ffffffff827d2000 R ciphy_ca +ffffffff827d2028 R ciphy_funcs +ffffffff827d2040 r ciphys +ffffffff827d3000 R ipgphy_ca +ffffffff827d3028 R ipgphy_funcs +ffffffff827d3040 r ipgphys +ffffffff827d4000 R etphy_funcs +ffffffff827d4018 R etphy_ca +ffffffff827d4040 r etphys +ffffffff827d4060 r etphy_dspcode +ffffffff827d5000 R jmphy_funcs +ffffffff827d5018 R jmphy_ca +ffffffff827d5040 r jmphys +ffffffff827d6000 R atphy_funcs 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vio_ca +ffffffff827fe030 r virtio_net_feature_names +ffffffff827ff000 R vioblk_ca +ffffffff827ff028 R vioblk_switch +ffffffff82800000 R viomb_ca +ffffffff82800030 r viomb_feature_names +ffffffff82801000 R viornd_ca +ffffffff82802000 R vioscsi_ca +ffffffff82802028 R vioscsi_switch +ffffffff82802050 R vioscsi_vq_names +ffffffff82803000 R vmmci_ca +ffffffff82804000 R pci_ca +ffffffff82805000 r pci_quirks +ffffffff82806000 R pci_subclass_prehistoric +ffffffff82806050 R pci_subclass_mass_storage +ffffffff82806160 R pci_subclass_network +ffffffff82806250 R pci_subclass_display +ffffffff828062d0 R pci_subclass_multimedia +ffffffff82806360 R pci_subclass_memory +ffffffff828063c0 R pci_subclass_bridge +ffffffff82806510 R pci_subclass_communications +ffffffff828065d0 R pci_subclass_system +ffffffff828066c0 R pci_subclass_input +ffffffff82806770 R pci_subclass_dock +ffffffff828067c0 R pci_subclass_processor +ffffffff82806880 R pci_subclass_serialbus +ffffffff82806990 R pci_subclass_wireless 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adw_asc38C0800_mcode_data +ffffffff828328a0 R adw_asc38C1600_mcode +ffffffff82834160 R adw_asc38C1600_mcode_data +ffffffff82835000 R twe_pci_ca +ffffffff82835028 R twe_pci_devices +ffffffff82836000 R arc_ca +ffffffff82836028 R arc_switch +ffffffff82836050 r arc_devices +ffffffff82836190 r arc_intel +ffffffff82836198 r arc_marvell +ffffffff828361a0 r arc_lsi +ffffffff828361a8 r arc_marvell2 +ffffffff82837000 R jmb_ca +ffffffff82837030 r jmb_devices +ffffffff82838000 R ahci_pci_ca +ffffffff82838028 R ahci_jmb_ca +ffffffff82838050 r ahci_devices +ffffffff82839000 R nvme_pci_ca +ffffffff82839028 r nvme_msi_blacklist +ffffffff8283a000 R ami_pci_ca +ffffffff8283a030 r ami_pci_subsys +ffffffff8283a270 r ami_pci_vendors +ffffffff8283b000 R mfi_pci_ca +ffffffff8283b030 r mfi_pci_devices +ffffffff8283c000 R mfii_ca +ffffffff8283c028 R mfii_switch +ffffffff8283c050 R mfii_pd_switch +ffffffff8283c078 R mfii_iop_thunderbolt +ffffffff8283c088 R mfii_iop_25 +ffffffff8283c098 R mfii_iop_35 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qlw_pci_ca +ffffffff8284b030 r qlw_devices +ffffffff8284b050 r isp_1040_risc_code +ffffffff828509f0 r isp_1080_risc_code +ffffffff82858470 r isp_12160_risc_code +ffffffff82860000 R qla_pci_ca +ffffffff82860030 r qla_devices +ffffffff82861000 R qle_ca +ffffffff82861028 R qle_switch +ffffffff82861050 r qle_devices +ffffffff82861070 r isp_2400_risc_code +ffffffff82890a50 r isp_2500_risc_code +ffffffff828c3000 R mpi_pci_ca +ffffffff828c3030 r mpi_devices +ffffffff828c4000 R mpii_ca +ffffffff828c4028 R mpii_switch +ffffffff828c4050 r mpii_devices +ffffffff828c5000 R sili_pci_ca +ffffffff828c5030 r sili_devices +ffffffff828c6000 R aq_devices +ffffffff828c6040 R aq_products +ffffffff828c6100 R aq_fw1x_ops +ffffffff828c6120 R aq_fw2x_ops +ffffffff828c6140 R aq_ca +ffffffff828c7000 R de_ca +ffffffff828c7030 r tulip_srom_conninfo +ffffffff828c7120 r tulip_mii_phy_attrlist +ffffffff828c71e0 r tulip_21140_znyx_zx34x_boardsw +ffffffff828c7208 r tulip_21040_10baset_only_boardsw +ffffffff828c7230 r tulip_21040_boardsw +ffffffff828c7258 r tulip_2114x_isv_boardsw +ffffffff828c7280 r tulip_21140_smc9332_boardsw +ffffffff828c72a8 r tulip_21040_auibnc_only_boardsw +ffffffff828c72d0 r tulip_21140_cogent_em100_boardsw +ffffffff828c72f8 r tulip_21140_accton_boardsw +ffffffff828c7320 r tulip_21140_eb_boardsw +ffffffff828c7348 r tulip_21041_boardsw +ffffffff828c7370 r tulip_srom_mediums +ffffffff828c73c0 r tulip_read_macaddr.testpat +ffffffff828c73d0 r tulip_vendors +ffffffff828c7480 r tulip_media_to_ifmedia +ffffffff828c74e0 r tulip_chipdescs +ffffffff828c8000 R ep_pci_ca +ffffffff828c8030 R ep_pci_devices +ffffffff828c9000 R pcn_ca +ffffffff828c9028 R pcn_devices +ffffffff828c9030 r pcn_79c970_rcvfw +ffffffff828c9050 r pcn_79c970_xmtsp +ffffffff828c9070 r pcn_79c970_xmtfw +ffffffff828c9090 r pcn_79c971_rcvfw +ffffffff828c90b0 r pcn_79c971_xmtsp_sram +ffffffff828c90d0 r pcn_79c971_xmtsp +ffffffff828c90f0 r pcn_79c971_xmtfw +ffffffff828c9110 r pcn_variants +ffffffff828ca000 R siop_products +ffffffff828cb000 R siop_pci_ca +ffffffff828cc000 R rdcide_setup +ffffffff828cc005 R rdcide_hold +ffffffff828cc00a R rdcide_udmatim +ffffffff828cc010 R rdcide_udmaclk +ffffffff828cc028 R default_product_desc +ffffffff828cc040 R pciide_intel_products +ffffffff828cc630 R pciide_amd_products +ffffffff828cc690 R pciide_cmd_products +ffffffff828cc730 R pciide_via_products +ffffffff828cc810 R pciide_cypress_products +ffffffff828cc820 R pciide_sis_products +ffffffff828cc870 R pciide_natsemi_products +ffffffff828cc890 R pciide_acer_products +ffffffff828cc8a0 R pciide_triones_products +ffffffff828cc8f0 R pciide_promise_products +ffffffff828ccac0 R pciide_acard_products +ffffffff828ccb10 R pciide_serverworks_products +ffffffff828ccbb0 R pciide_nvidia_products +ffffffff828cce80 R pciide_ite_products +ffffffff828ccea0 R pciide_ati_products +ffffffff828ccf20 R pciide_jmicron_products +ffffffff828ccf70 R pciide_phison_products +ffffffff828ccf80 R pciide_rdc_products +ffffffff828ccf90 R pciide_vendors +ffffffff828cd140 R pciide_pci_ca +ffffffff828cd168 R pciide_jmb_ca +ffffffff828cd190 r piix_isp_dma +ffffffff828cd193 r piix_rtc_dma +ffffffff828cd196 r apollo_pio_set +ffffffff828cd19b r cmd0643_9_data_tim_pio +ffffffff828cd1a0 r cmd0643_9_data_tim_dma +ffffffff828cd1a3 r cmd680_channel_map.init_val +ffffffff828cd1b1 r cmd680_setup_channel.udma2_tbl +ffffffff828cd1b8 r cmd680_setup_channel.dma_tbl +ffffffff828cd1be r cmd680_setup_channel.pio_tbl +ffffffff828cd1d0 r satalink_ba5_regmap +ffffffff828cd690 r sii3114_chansetup.channel_names +ffffffff828cd6b0 r cy_pio_pulse +ffffffff828cd6c0 r sis_udma133new_tim +ffffffff828cd6e0 r sis_pio133new_tim +ffffffff828cd6f4 r sis_dma133new_tim +ffffffff828cd700 r sis_udma66_tim +ffffffff828cd706 r sis_udma100new_tim +ffffffff828cd70c r sis_udma133old_tim +ffffffff828cd713 r sis_pio_act +ffffffff828cd718 r sis_pio_rec +ffffffff828cd71d r natsemi_pio_pulse +ffffffff828cd722 r natsemi_pio_recover +ffffffff828cd727 r natsemi_dma_pulse +ffffffff828cd72a r natsemi_dma_recover +ffffffff828cd730 r scx200_udma33 +ffffffff828cd73c r scx200_dma33 +ffffffff828cd750 r scx200_pio33 +ffffffff828cd778 r acer_udma +ffffffff828cd77e r acer_pio +ffffffff828cd790 r hpt370_pio +ffffffff828cd7a4 r hpt370_dma +ffffffff828cd7b0 r hpt370_udma +ffffffff828cd7d0 r hpt372_pio +ffffffff828cd7e4 r hpt372_dma +ffffffff828cd7f0 r hpt372_udma +ffffffff828cd80c r hpt366_dma +ffffffff828cd820 r hpt366_udma +ffffffff828cd840 r hpt374_pio +ffffffff828cd854 r hpt374_dma +ffffffff828cd860 r hpt374_udma +ffffffff828cd87c r pdc2xx_pa +ffffffff828cd881 r pdc2xx_pb +ffffffff828cd886 r pdc2xx_dma_mb +ffffffff828cd889 r pdc2xx_dma_mc +ffffffff828cd88c r pdc2xx_udma_mc +ffffffff828cd892 r acard_act_udma +ffffffff828cd899 r acard_rec_udma +ffffffff828cd8a0 r acard_udma_conf +ffffffff828cd8a7 r acard_act_dma +ffffffff828cd8aa r acard_rec_dma +ffffffff828cd8ad r acard_act_pio +ffffffff828cd8b2 r acard_rec_pio +ffffffff828cd8b7 r nforce_udma +ffffffff828cd8be r nforce_pio +ffffffff828cd8c3 r ixp_mdma_timings +ffffffff828cd8c6 r ixp_pio_timings +ffffffff828ce000 R ppb_ca +ffffffff828cf000 R cy_pci_ca +ffffffff828cf030 R cy_pci_devices +ffffffff828d0000 R rl_pci_ca +ffffffff828d0030 R rl_pci_devices +ffffffff828d1000 R re_pci_devices +ffffffff828d1030 R re_pci_ca +ffffffff828d2000 R vr_ca +ffffffff828d3000 R txp_ca +ffffffff828d3030 R txp_devices +ffffffff828d4000 r cards +ffffffff828d5000 r format_params +ffffffff828d51a0 r pixfmt_table +ffffffff828d5320 r meteor_pixfmt_table +ffffffff828d6000 R bktr_ca +ffffffff828d6028 R bktr_hw_if +ffffffff828d7000 r tuners +ffffffff828d7170 r freqTable +ffffffff828d7260 r nabcst +ffffffff828d72a0 r irccable +ffffffff828d7310 r hrccable +ffffffff828d7380 r weurope +ffffffff828d7420 r jpnbcst +ffffffff828d7460 r jpncable +ffffffff828d74c0 r xussr +ffffffff828d7530 r australia +ffffffff828d7590 r france +ffffffff828d8000 R xl_pci_ca +ffffffff828d8030 R xl_pci_devices +ffffffff828d9000 R fxp_pci_ca +ffffffff828d9030 R fxp_pci_devices +ffffffff828da000 R em_devices +ffffffff828da2e0 R em_ca +ffffffff828da310 r em_counters +ffffffff828db000 r em_igp_cable_length_table +ffffffff828db100 r em_igp_2_cable_length_table +ffffffff828dc000 R ixgb_devices +ffffffff828dc010 R ixgb_ca +ffffffff828dd000 R ixgbe_devices +ffffffff828dd0b8 R ix_ca +ffffffff828dd0e0 r ix_counters +ffffffff828dd3e0 r ix_rxq_kstats_tpl +ffffffff828dd458 r ix_txq_kstats_tpl +ffffffff828de000 r ixgbe_mvals_base +ffffffff828de060 r ixgbe_mvals_X540 +ffffffff828de0c0 r ixgbe_mvals_X550 +ffffffff828de120 r ixgbe_mvals_X550EM_x +ffffffff828de180 r ixgbe_mvals_X550EM_a +ffffffff828e1000 R ixl_ca +ffffffff828e1030 R ixl_port_counters +ffffffff828e12c0 R ixl_vsi_counters +ffffffff828e1380 r ixl_devices +ffffffff828e14c0 r ixl_710 +ffffffff828e14e8 r ixl_722 +ffffffff828e1510 r ixl_pf_aq_regs +ffffffff828e1578 r ixl_710_decrepit +ffffffff828e15a0 r ixl_phy_type_map +ffffffff828e1770 r ixl_speed_type_map +ffffffff828e17b0 r ixl_hmc_pack_rxq +ffffffff828e1830 r ixl_hmc_pack_txq +ffffffff828e18a0 r ixl_sfp_ops +ffffffff828e18b8 r ixl_qsfp_ops +ffffffff828e2000 R xge_ca +ffffffff828e2028 R xge_devices +ffffffff828e2030 r xge_fix_mac +ffffffff828e2110 r xge_xena_dtx_cfg +ffffffff828e2170 r xge_herc_dtx_cfg +ffffffff828e3000 R thtc_ca +ffffffff828e3028 R tht_ca +ffffffff828e3050 r thtc_devices +ffffffff828e3068 r tht_link_state.interval +ffffffff828e4000 R myx_ca +ffffffff828e4028 R myx_devices +ffffffff828e5000 R oce_ca +ffffffff828e5030 R oce_devices +ffffffff828e6000 R dc_pci_ca +ffffffff828e7000 R epic_pci_ca +ffffffff828e7028 R epic_pci_devices +ffffffff828e8000 R ti_pci_ca +ffffffff828e8030 R ti_devices +ffffffff828e9000 R ne_pci_ca +ffffffff828e9030 R ne_pci_prod +ffffffff828ea000 R gem_pci_ca +ffffffff828ea030 R gem_pci_devices +ffffffff828ea050 r gem_promhdr +ffffffff828ea052 r gem_promdat +ffffffff828ea05a r gem_promdat2 +ffffffff828eb000 R cas_ca +ffffffff828eb028 R cas_pci_devices +ffffffff828eb030 r cas_promhdr +ffffffff828eb032 r cas_promdat_sun +ffffffff828eb03a r cas_promdat_ns +ffffffff828eb042 r cas_promdat2 +ffffffff828ec000 R sf_pci_ca +ffffffff828ec028 R sf_pci_products +ffffffff828ed000 R sis_ca +ffffffff828ed028 R sis_devices +ffffffff828ee000 R se_devices +ffffffff828ee008 R se_ca +ffffffff828ef000 R uhci_pci_ca +ffffffff828f0000 R ohci_pci_ca +ffffffff828f1000 R ehci_pci_ca +ffffffff828f2000 R xhci_pci_ca +ffffffff828f3000 R cbb_pci_ca +ffffffff828f3028 r pccbb_pcmcia_do_io_map.pcic_iowidth +ffffffff828f4000 R skc_devices +ffffffff828f4030 R skc_ca +ffffffff828f4058 R sk_ca +ffffffff828f5000 R mskc_devices +ffffffff828f50a8 R mskc_ca +ffffffff828f50d0 R msk_ca +ffffffff828f5100 r msk_mib +ffffffff828f6000 R puc_pci_ca +ffffffff828f7000 R puc_devs +ffffffff828fc000 R com_puc_ca +ffffffff828fc030 r puc_port_types +ffffffff828fd000 R lpt_puc_ca +ffffffff828fe000 R wi_pci_ca +ffffffff828fe030 r wi_pci_products +ffffffff828ff000 R an_pci_ca +ffffffff828ff030 R an_pci_devices +ffffffff82900000 R iwi_devices +ffffffff82900010 R iwi_ca +ffffffff82901000 R wpi_ca +ffffffff82901028 r wpi_devices +ffffffff82901030 r wpi_rates +ffffffff82901050 r wpi_rf_gain_5ghz +ffffffff829010a0 r wpi_dsp_gain_5ghz +ffffffff829010f0 r wpi_rf_gain_2ghz +ffffffff82901140 r wpi_dsp_gain_2ghz +ffffffff82901190 r wpi_pmgt +ffffffff82901310 r wpi_bands +ffffffff82902000 R iwn_mcs2ridx +ffffffff82902020 R iwn_ca +ffffffff82902050 r iwn_devices +ffffffff829020e8 r iwn4965_sensitivity_limits +ffffffff82902124 r iwn5000_sensitivity_limits +ffffffff82902160 r iwn5150_sensitivity_limits +ffffffff8290219c r iwn1000_sensitivity_limits +ffffffff829021d8 r iwn6000_sensitivity_limits +ffffffff82902214 r iwn2000_sensitivity_limits +ffffffff82902250 r iwn_fw_errmsg +ffffffff82902340 r iwn4965_set_txpower.tdiv +ffffffff82902360 r iwn4965_rf_gain_5ghz +ffffffff829023d0 r iwn4965_dsp_gain_5ghz +ffffffff82902440 r iwn4965_dsp_gain_2ghz +ffffffff829024b0 r iwn_pmgt +ffffffff829026f0 r iwn4965_post_alive.qid2fifo +ffffffff82902700 r iwn_bands +ffffffff82902770 r iwn_rates +ffffffff82902820 r iwn4965_rf_gain_2ghz +ffffffff82903000 R iwm_nvm_channels +ffffffff82903030 R iwm_nvm_channels_8000 +ffffffff82903070 R iwm_rates +ffffffff829030d0 R iwm_ht_mcs2ridx +ffffffff82903110 R iwm_tid_to_ac +ffffffff82903118 R iwm_ac_to_tx_fifo +ffffffff82903120 R iwm_nvm_to_read +ffffffff82903144 r iwm_set_hw_address_8000.reserved_mac +ffffffff82903180 r iwm_sf_full_timeout +ffffffff829031b0 r iwm_sf_full_timeout_def +ffffffff829031e0 r advanced_lookup +ffffffff82903320 r iwm_devices +ffffffff82903360 R iwm_ca +ffffffff82904000 R iwx_9560_quz_a0_jf_b0_cfg +ffffffff82904020 R iwx_9560_qu_c0_jf_b0_cfg +ffffffff82904040 R iwx_qu_b0_hr1_b0 +ffffffff82904060 R iwx_qu_b0_hr_b0 +ffffffff82904080 R iwx_ax201_cfg_qu_hr +ffffffff829040a0 R iwx_qu_c0_hr1_b0 +ffffffff829040c0 R iwx_qu_c0_hr_b0 +ffffffff829040e0 R iwx_ax201_cfg_qu_c0_hr_b0 +ffffffff82904100 R iwx_quz_a0_hr1_b0 +ffffffff82904120 R iwx_ax201_cfg_quz_hr +ffffffff82904140 R iwx_cfg_so_a0_hr_b0 +ffffffff82904160 R iwx_cfg_quz_a0_hr_b0 +ffffffff82904180 R iwx_2ax_cfg_so_gf_a0 +ffffffff829041a0 R iwx_2ax_cfg_so_gf_a0_long +ffffffff829041c0 R iwx_2ax_cfg_so_gf4_a0 +ffffffff829041e0 R iwx_2ax_cfg_so_gf4_a0_long +ffffffff82904200 R iwx_2ax_cfg_ty_gf_a0 +ffffffff82904220 R iwx_2ax_cfg_so_jf_b0 +ffffffff82904240 R iwx_nvm_channels_8000 +ffffffff82904280 R iwx_rates +ffffffff829042e0 R iwx_mcs2ridx +ffffffff82904320 R iwx_tid_to_ac +ffffffff82904328 R iwx_ac_to_tx_fifo +ffffffff82904330 r iwx_nvm_channels_uhb +ffffffff8290439e r iwx_is_valid_mac_addr.reserved_mac +ffffffff829043b0 r iwx_sf_full_timeout +ffffffff829043e0 r iwx_sf_full_timeout_def +ffffffff82904410 r advanced_lookup +ffffffff82904550 r iwx_devices +ffffffff82904590 r iwx_dev_info_table +ffffffff82904de8 R iwx_ca +ffffffff82905000 R cmpci_ca +ffffffff82905028 R cmpci_hw_if +ffffffff829050e0 r cmpci_rate_table +ffffffff82905120 R cmpci_devices +ffffffff82905130 r cmpci_query_devinfo.mixer_port_names +ffffffff82905160 r cmpci_query_devinfo.mixer_classes +ffffffff82906000 R iha_pci_ca +ffffffff82906028 R iha_switch +ffffffff82907000 R pcscp_ca +ffffffff82908000 R bge_ca +ffffffff82908030 R bge_devices +ffffffff829081b0 r bge_revisions +ffffffff82908610 r bge_majorrevs +ffffffff82909000 R bnx_devices +ffffffff82909020 R bnx_ca +ffffffff8290a000 R vge_ca +ffffffff8290a028 R vge_devices +ffffffff8290b000 R stge_ca +ffffffff8290b028 R stge_mii_bitbang_ops +ffffffff8290b050 R stge_devices +ffffffff8290c000 R nfe_ca +ffffffff8290c030 R nfe_devices +ffffffff8290d000 R et_devices +ffffffff8290d008 R et_ca +ffffffff8290e000 R jme_devices +ffffffff8290e008 R jme_ca +ffffffff8290f000 R age_devices +ffffffff8290f008 R age_ca +ffffffff82910000 R alc_devices +ffffffff82910038 R alc_ca +ffffffff82911000 R ale_devices +ffffffff82911008 R ale_ca +ffffffff82912000 R amdpm_ca +ffffffff82912030 R amdpm_ids +ffffffff82913000 R bce_ca +ffffffff82913028 R bce_devices +ffffffff82914000 R ath_pci_ca +ffffffff82915000 R athn_pci_ca +ffffffff82915030 r athn_pci_devices +ffffffff82916000 R atw_pci_ca +ffffffff82916028 R atw_pci_devices +ffffffff82917000 R rtw_pci_ca +ffffffff82917030 R rtw_pci_products +ffffffff82918000 R rtwn_pci_ca +ffffffff82918030 r rtwn_pci_devices +ffffffff82918040 r rtl8188eu_mac +ffffffff829181b0 r rtl8192cu_mac +ffffffff82918310 r rtl8192ce_mac +ffffffff82918458 r rtl8188eu_bb_prog +ffffffff82918480 r rtl8723a_bb_prog +ffffffff829184a8 r rtl8192ce_bb_prog_1t +ffffffff829184d0 r rtl8192ce_bb_prog_2t +ffffffff82918500 r rtl8188eu_bb_regs +ffffffff82918680 r rtl8188eu_bb_vals +ffffffff82918980 r rtl8188eu_agc_vals +ffffffff82918b80 r rtl8723a_bb_regs +ffffffff82918d00 r rtl8723a_bb_vals +ffffffff82918ff0 r rtl8192ce_agc_vals +ffffffff82919270 r rtl8192ce_bb_regs +ffffffff829193f0 r rtl8192ce_bb_vals_1t +ffffffff829196e0 r rtl8192ce_bb_vals_2t +ffffffff8291a000 R ral_pci_ca +ffffffff8291a030 R ral_pci_devices +ffffffff8291b000 R acx_pci_ca +ffffffff8291b028 R acx_pci_devices +ffffffff8291c000 R pgt_pci_ca +ffffffff8291c028 R pgt_pci_devices +ffffffff8291d000 R malo_pci_ca +ffffffff8291d028 R malo_pci_devices +ffffffff8291e000 R bwi_pci_ca +ffffffff8291e030 R bwi_pci_devices +ffffffff8291f000 R piixpm_ca +ffffffff8291f030 R piixpm_ids +ffffffff82920000 R vic_ca +ffffffff82920028 R vic_devices +ffffffff82921000 R vmx_devices +ffffffff82921008 R vmx_ca +ffffffff82921030 r vmx_tx_kstat_tpl +ffffffff829210d0 r vmx_kstat_rate +ffffffff829210e0 r vmx_rx_kstat_tpl +ffffffff82922000 R vmwpvs_ca +ffffffff82922028 R vmwpvs_switch +ffffffff82923000 R lii_ca +ffffffff82923028 R lii_devices +ffffffff82924000 R ichiic_ca +ffffffff82924030 R ichiic_ids +ffffffff82925000 R viapm_ca +ffffffff82925030 R viapm_ids +ffffffff82925070 r val_to_temp +ffffffff82925870 r val_to_uV.mult +ffffffff82926000 R amdiic_ca +ffffffff82926028 R amdiic_ids +ffffffff82927000 R nviic_ca +ffffffff82927030 R nviic_ids +ffffffff82928000 R sdhc_pci_ca +ffffffff82929000 R kate_ca +ffffffff82929030 r kate_proc +ffffffff8292a000 R km_ca +ffffffff8292a030 r km_devices +ffffffff8292b000 R ksmn_ca +ffffffff8292b030 r ksmn_devices +ffffffff8292c000 R itherm_devices +ffffffff8292c008 R itherm_ca +ffffffff8292d000 R pchtemp_ca +ffffffff8292d030 R pchtemp_devices +ffffffff8292e000 R rtsx_pci_ca +ffffffff8292f000 R xspd_ca +ffffffff8292f028 R xspd_devices +ffffffff82930000 R virtio_pci_ca +ffffffff82931000 R dwiic_pci_ca +ffffffff82931030 R dwiic_pci_ids +ffffffff82932000 R bwfm_pci_ca +ffffffff82932030 r bwfm_pci_devices +ffffffff82933000 R ccp_pci_ca +ffffffff82933030 r ccp_pci_devices +ffffffff82934000 R bnxt_devices +ffffffff82934040 R bnxt_ca +ffffffff82935000 R mcx_ca +ffffffff82935030 r mcx_devices +ffffffff82935060 r mcx_rss_config +ffffffff829350d0 r mcx_eth_cap_map +ffffffff829352d0 r mcx_kstat_ppcnt_ieee8023 +ffffffff829352e8 r mcx_kstat_ppcnt_rfc2863 +ffffffff82935300 r mcx_kstat_ppcnt_rfc2819 +ffffffff82935318 r mcx_kstat_ppcnt_rfc3635 +ffffffff82935330 r mcx_ppcnt_ieee8023_tpl +ffffffff829354b0 r mcx_ppcnt_rfc2863_tpl +ffffffff829355c0 r mcx_ppcnt_rfc2819_tpl +ffffffff82935770 r mcx_ppcnt_rfc3635_tpl +ffffffff829358b0 r mcx_kstat_mtmp_tpl +ffffffff82935950 r mcx_kstat_mtmp_rate +ffffffff82935960 r mcx_queue_kstat_tpl +ffffffff82936000 R iavf_ca +ffffffff82936030 r iavf_devices +ffffffff82936040 r iavf_aq_regs +ffffffff829360b0 r iavf_link_speeds +ffffffff82937000 R rge_ca +ffffffff82937028 R rge_devices +ffffffff82937030 r rtl8125_mac_cfg2_ephy +ffffffff82937090 r rge_phy_config_mac_cfg3.mac_cfg3_a438_value +ffffffff829370b0 r rge_phy_config_mac_cfg3.mac_cfg3_b88e_value +ffffffff82937110 r rge_phy_config_mac_cfg4.mac_cfg4_b87c_value +ffffffff82937170 r rtl8125_mac_cfg4_ephy +ffffffff829371e0 r rtl8125_mac_cfg2_mcu +ffffffff82937e80 r rtl8125_mac_cfg3_mcu +ffffffff82938720 r rtl8125_mac_cfg4_mcu +ffffffff8293ad10 r rtl8125_mac_cfg5_mcu +ffffffff8293bc10 r rtl8125_mac_bps +ffffffff8293bf80 r rtl8125b_mac_bps +ffffffff8293c120 r rge_kstats_tpl +ffffffff8293d000 R igc_devices +ffffffff8293d040 R igc_ca +ffffffff8293e000 R ngbe_devices +ffffffff8293e008 R ngbe_ca +ffffffff8293f000 R com_pci_ca +ffffffff8293f030 R com_pci_ids +ffffffff82940000 r agp_attach.agp_max +ffffffff82940048 R agp_ca +ffffffff82941000 R intagp_ca +ffffffff82942000 r drm_plane_create_rotation_property.props +ffffffff82943000 r drm_bridge_priv_state_funcs +ffffffff82945000 r color_encoding_name +ffffffff82945020 r color_range_name +ffffffff82946000 r drm_subpixel_enum_list +ffffffff82946060 r drm_dpms_enum_list +ffffffff829460a0 r drm_dvi_i_select_enum_list +ffffffff829460d0 r drm_dvi_i_subconnector_enum_list +ffffffff82946100 r drm_tv_select_enum_list +ffffffff82946150 r drm_tv_subconnector_enum_list +ffffffff829461a0 r drm_dp_subconnector_enum_list +ffffffff82946210 r drm_link_status_enum_list +ffffffff82946230 r drm_scaling_mode_enum_list +ffffffff82946270 r drm_aspect_ratio_enum_list +ffffffff829462a0 r hdmi_colorspaces +ffffffff82946370 r dp_colorspaces +ffffffff82946450 r drm_content_type_enum_list +ffffffff829464a0 r drm_panel_orientation_enum_list +ffffffff829464e0 r privacy_screen_enum +ffffffff82947000 r drm_crtc_fence_ops +ffffffff82948000 r drm_dmt_modes +ffffffff8294a940 r edid_cea_modes_1 +ffffffff8294e4d0 r edid_cea_modes_193 +ffffffff8294f180 r edid_quirk_list +ffffffff8294f350 r edid_4k_modes +ffffffff8294f5b0 r edid_est_modes +ffffffff8294fdb0 r est3_modes +ffffffff8294ff10 r stereo_mandatory_modes +ffffffff8294ff90 r extra_modes +ffffffff82950000 r drm_encoder_enum_list +ffffffff82951000 r drm_fbdev_client_funcs +ffffffff82951020 r drm_fb_helper_generic_funcs +ffffffff82951028 r drm_fbdev_fb_ops +ffffffff82952000 r drm_fb_xrgb8888_to_rgb332.dst_pixsize +ffffffff82952004 r drm_fb_xrgb8888_to_rgb565.dst_pixsize +ffffffff82952008 r drm_fb_xrgb8888_to_rgb888.dst_pixsize +ffffffff8295200c r drm_fb_xrgb8888_to_xrgb2101010.dst_pixsize +ffffffff82952010 r drm_fb_xrgb8888_to_gray8.dst_pixsize +ffffffff82952014 r drm_fb_rgb888_to_xrgb8888.dst_pixsize +ffffffff82952018 r drm_fb_rgb565_to_xrgb8888.dst_pixsize +ffffffff82953000 r __drm_format_info.formats +ffffffff82954000 R drm_pgops +ffffffff82955000 r drm_ioctls +ffffffff82957000 r dma_fence_stub_ops +ffffffff82957038 R dma_fence_array_ops +ffffffff82957070 R dma_fence_chain_ops +ffffffff829570a8 R dmabufops +ffffffff829570e0 R syncfileops +ffffffff82958000 r drm_plane_type_enum_list +ffffffff82959000 r drm_mode_status_names +ffffffff8295a000 r primary_plane_funcs +ffffffff8295a068 r safe_modeset_formats +ffffffff8295b000 r orientation_data +ffffffff8295e5c0 r lcd800x1280_rightside_up +ffffffff8295e5d8 r lcd720x1280_rightside_up +ffffffff8295e5f0 r lcd800x1280_leftside_up +ffffffff8295e608 r lcd1080x1920_leftside_up +ffffffff8295e620 r lcd1200x1920_rightside_up +ffffffff8295e638 r gpd_micropc +ffffffff8295e650 r gpd_pocket +ffffffff8295e668 r gpd_pocket2 +ffffffff8295e680 r gpd_win +ffffffff8295e698 r gpd_win2 +ffffffff8295e6b0 r itworks_tw891 +ffffffff8295e6c8 r lcd1600x2560_rightside_up +ffffffff8295e6e0 r onegx1_pro +ffffffff8295e6f8 r lcd1600x2560_leftside_up +ffffffff8295e710 r lcd1280x1920_rightside_up +ffffffff8295e728 r .compoundliteral +ffffffff8295e738 r .compoundliteral.5 +ffffffff8295e760 r .compoundliteral.9 +ffffffff8295e780 r .compoundliteral.17 +ffffffff8295e7c0 r .compoundliteral.21 +ffffffff8295e7e0 r .compoundliteral.23 +ffffffff8295e7f0 r .compoundliteral.25 +ffffffff8295f000 r drm_gem_prime_dmabuf_ops +ffffffff82961000 r is_hdmi_adaptor.dp_dual_mode_hdmi_id +ffffffff82962000 r drm_dp_phy_name.phy_names +ffffffff82962048 r drm_dp_i2c_algo +ffffffff82962058 r drm_dp_i2c_lock_ops +ffffffff82962070 r dp_aux_bl_ops +ffffffff82962090 r dpcd_quirk_list +ffffffff82962320 r drm_dp_psr_setup_time.psr_setup_time_us +ffffffff82963000 R drm_dp_mst_topology_state_funcs +ffffffff82963020 r drm_dp_mst_req_type_str.req_type_str +ffffffff829631f0 r drm_dp_mst_sideband_tx_state_str.sideband_reason_str +ffffffff82963220 r drm_dp_mst_nak_reason_str.nak_reason_str +ffffffff82963278 r drm_dp_mst_i2c_algo +ffffffff82964000 r hdmi_colorimetry_val +ffffffff82965000 r ttm_bo_init_reserved.sys_mem +ffffffff82966000 r ttm_bo_pipeline_gutting.sys_mem +ffffffff82967018 R ttm_bo_vm_ops +ffffffff82968000 r ttm_range_manager_func +ffffffff82969018 r ttm_kmap_iter_io_ops +ffffffff82969030 r ttm_kmap_iter_linear_io_ops +ffffffff8296a000 r ttm_sys_manager_func +ffffffff8296b000 r ttm_kmap_iter_tt_ops +ffffffff8296c000 r drm_sched_fence_ops_scheduled +ffffffff8296c038 r drm_sched_fence_ops_finished +ffffffff8296d000 R ch7017_ops +ffffffff8296e000 R ch7xxx_ops +ffffffff8296e060 r ch7xxx_ids +ffffffff8296f000 R ivch_ops +ffffffff8296f060 r backup_addresses +ffffffff82970000 R ns2501_ops +ffffffff82970060 r mode_agnostic_values +ffffffff829700e0 r ns2501_modes +ffffffff82971000 R sil164_ops +ffffffff82972000 R tfp410_ops +ffffffff82973000 r chv_dpll +ffffffff82973050 r vlv_dpll +ffffffff829730a0 r g4x_dpll +ffffffff829730f0 r pch_dpll +ffffffff82973138 r intel_dp_enc_funcs +ffffffff82974000 r intel_hdmi_enc_funcs +ffffffff82975000 r vlv_primary_formats +ffffffff82975030 r ivb_primary_formats +ffffffff82975050 r i965_primary_formats +ffffffff82975070 r i8xx_primary_formats +ffffffff82975080 r i965_plane_funcs +ffffffff829750e8 r i8xx_plane_funcs +ffffffff82976000 r gen11_dsi_encoder_funcs +ffffffff82976020 r gen11_dsi_connector_funcs +ffffffff82976098 r gen11_dsi_connector_helper_funcs +ffffffff829760e8 r gen11_dsi_host_ops +ffffffff82977000 r intel_plane_helper_funcs +ffffffff82978000 r g4x_audio_funcs +ffffffff82978010 r ilk_audio_funcs +ffffffff82978020 r hsw_audio_funcs +ffffffff82978030 r hdmi_audio_clock +ffffffff829780a0 r dp_aud_n_m +ffffffff82978250 r hdmi_aud_ncts_36bpp +ffffffff82978330 r hdmi_aud_ncts_30bpp +ffffffff82978410 r hdmi_aud_ncts_24bpp +ffffffff82979000 r intel_backlight_device_ops +ffffffff82979018 r bxt_pwm_funcs +ffffffff82979048 r cnp_pwm_funcs +ffffffff82979078 r lpt_pwm_funcs +ffffffff829790a8 r spt_pwm_funcs +ffffffff829790d8 r pch_pwm_funcs +ffffffff82979108 r ext_pwm_funcs +ffffffff82979138 r vlv_pwm_funcs +ffffffff82979168 r i965_pwm_funcs +ffffffff82979198 r i9xx_pwm_funcs +ffffffff829791c8 r pwm_bl_funcs +ffffffff8297a000 r bdb_blocks +ffffffff8297a160 r translate_iboost.mapping +ffffffff8297a163 r adlp_ddc_pin_map +ffffffff8297a16a r adls_ddc_pin_map +ffffffff8297a170 r rkl_pch_tgp_ddc_pin_map +ffffffff8297a175 r icp_ddc_pin_map +ffffffff8297a17f r cnp_ddc_pin_map +ffffffff8297b000 r mtl_sa_info +ffffffff8297b006 r adlp_sa_info +ffffffff8297b00c r adls_sa_info +ffffffff8297b012 r rkl_sa_info +ffffffff8297b018 r tgl_sa_info +ffffffff8297b020 r intel_bw_funcs +ffffffff8297c000 r intel_cdclk_funcs +ffffffff8297c010 r dg2_cdclk_table +ffffffff8297c0c0 r adlp_a_step_cdclk_table +ffffffff8297c140 r adlp_cdclk_table +ffffffff8297c200 r rkl_cdclk_table +ffffffff8297c2f0 r icl_cdclk_table +ffffffff8297c3e0 r glk_cdclk_table +ffffffff8297c410 r bxt_cdclk_table +ffffffff8297c458 r tgl_cdclk_funcs +ffffffff8297c478 r ehl_cdclk_funcs +ffffffff8297c498 r icl_cdclk_funcs +ffffffff8297c4b8 r bxt_cdclk_funcs +ffffffff8297c4d8 r skl_cdclk_funcs +ffffffff8297c4f8 r bdw_cdclk_funcs +ffffffff8297c518 r hsw_cdclk_funcs +ffffffff8297c538 r chv_cdclk_funcs +ffffffff8297c558 r vlv_cdclk_funcs +ffffffff8297c578 r fixed_400mhz_cdclk_funcs +ffffffff8297c598 r ilk_cdclk_funcs +ffffffff8297c5b8 r gm45_cdclk_funcs +ffffffff8297c5d8 r g33_cdclk_funcs +ffffffff8297c5f8 r g33_get_cdclk.div_3200 +ffffffff8297c5fe r g33_get_cdclk.div_4000 +ffffffff8297c604 r g33_get_cdclk.div_4800 +ffffffff8297c60a r g33_get_cdclk.div_5333 +ffffffff8297c610 r i965gm_cdclk_funcs +ffffffff8297c630 r i965gm_get_cdclk.div_3200 +ffffffff8297c633 r i965gm_get_cdclk.div_4000 +ffffffff8297c636 r i965gm_get_cdclk.div_5333 +ffffffff8297c640 r pnv_cdclk_funcs +ffffffff8297c660 r i945gm_cdclk_funcs +ffffffff8297c680 r i915gm_cdclk_funcs +ffffffff8297c6a0 r i915g_cdclk_funcs +ffffffff8297c6c0 r i865g_cdclk_funcs +ffffffff8297c6e0 r i85x_cdclk_funcs +ffffffff8297c700 r i845g_cdclk_funcs +ffffffff8297c720 r i830_cdclk_funcs +ffffffff8297d000 r chv_color_funcs +ffffffff8297d028 r i965_color_funcs +ffffffff8297d050 r i9xx_color_funcs +ffffffff8297d078 r icl_color_funcs +ffffffff8297d0a0 r glk_color_funcs +ffffffff8297d0c8 r skl_color_funcs +ffffffff8297d0f0 r bdw_color_funcs +ffffffff8297d118 r hsw_color_funcs +ffffffff8297d140 r ivb_color_funcs +ffffffff8297d168 r ilk_color_funcs +ffffffff8297d190 r ilk_csc_off_zero +ffffffff8297d1a0 r ilk_csc_coeff_rgb_to_ycbcr +ffffffff8297d1b2 r ilk_csc_postoff_rgb_to_ycbcr +ffffffff8297d1c0 r ilk_csc_coeff_limited_range +ffffffff8297d1d2 r ilk_csc_postoff_limited_range +ffffffff8297d1e0 r ilk_csc_coeff_identity +ffffffff8297e000 r icl_procmon_values +ffffffff8297f000 r force_audio_names +ffffffff8297f040 r broadcast_rgb_names +ffffffff82980000 r intel_crt_connector_funcs +ffffffff82980078 r intel_crt_enc_funcs +ffffffff82980098 r intel_crt_connector_helper_funcs +ffffffff829800f0 r intel_spurious_crt_detect +ffffffff82981000 r g4x_crtc_funcs +ffffffff829810c0 r i965_crtc_funcs +ffffffff82981180 r i915gm_crtc_funcs +ffffffff82981240 r i915_crtc_funcs +ffffffff82981300 r i8xx_crtc_funcs +ffffffff829813c0 r bdw_crtc_funcs +ffffffff82981480 r ilk_crtc_funcs +ffffffff82982000 r output_type_str +ffffffff82982060 r output_format_str +ffffffff82983000 r intel_cursor_plane_funcs +ffffffff82983068 r intel_cursor_formats +ffffffff82984000 r intel_ddi_funcs +ffffffff82984020 r index_to_dp_signal_levels +ffffffff82984030 r gen9_chicken_trans_reg_by_port.trans +ffffffff82985000 r tgl_combo_phy_trans_edp_hbr2_hobl +ffffffff82985010 r _tgl_combo_phy_trans_edp_hbr2_hobl +ffffffff82985080 r dg2_snps_trans_uhbr +ffffffff82985090 r dg2_snps_trans +ffffffff829850a0 r _dg2_snps_trans_uhbr +ffffffff82985160 r _dg2_snps_trans +ffffffff829851d8 r icl_combo_phy_trans_hdmi +ffffffff829851f0 r _icl_combo_phy_trans_hdmi +ffffffff82985248 r adlp_combo_phy_trans_edp_hbr3 +ffffffff82985258 r adlp_combo_phy_trans_edp_up_to_hbr2 +ffffffff82985270 r _adlp_combo_phy_trans_dp_hbr2_edp_hbr3 +ffffffff829852f0 r _adlp_combo_phy_trans_edp_hbr2 +ffffffff82985368 r adlp_combo_phy_trans_dp_hbr2_hbr3 +ffffffff82985378 r adlp_combo_phy_trans_dp_hbr +ffffffff82985390 r _adlp_combo_phy_trans_dp_hbr2_hbr3 +ffffffff82985410 r _adlp_combo_phy_trans_dp_hbr +ffffffff82985488 r tgl_dkl_phy_trans_hdmi +ffffffff829854a0 r _tgl_dkl_phy_trans_hdmi +ffffffff82985518 r adlp_dkl_phy_trans_dp_hbr2_hbr3 +ffffffff82985528 r adlp_dkl_phy_trans_dp_hbr +ffffffff82985540 r _adlp_dkl_phy_trans_dp_hbr2_hbr3 +ffffffff829855c0 r _adlp_dkl_phy_trans_dp_hbr +ffffffff82985638 r adls_combo_phy_trans_edp_hbr3 +ffffffff82985648 r adls_combo_phy_trans_edp_hbr2 +ffffffff82985660 r _adls_combo_phy_trans_edp_hbr3 +ffffffff829856e0 r _adls_combo_phy_trans_edp_hbr2 +ffffffff82985758 r adls_combo_phy_trans_dp_hbr2_hbr3 +ffffffff82985768 r tgl_combo_phy_trans_dp_hbr +ffffffff82985780 r _adls_combo_phy_trans_dp_hbr2_hbr3 +ffffffff82985800 r _tgl_combo_phy_trans_dp_hbr +ffffffff82985878 r icl_combo_phy_trans_dp_hbr2_edp_hbr3 +ffffffff82985888 r icl_combo_phy_trans_edp_hbr2 +ffffffff829858a0 r _icl_combo_phy_trans_dp_hbr2_edp_hbr3 +ffffffff82985920 r _icl_combo_phy_trans_edp_hbr2 +ffffffff82985998 r rkl_combo_phy_trans_dp_hbr2_hbr3 +ffffffff829859a8 r rkl_combo_phy_trans_dp_hbr +ffffffff829859c0 r _rkl_combo_phy_trans_dp_hbr2_hbr3 +ffffffff82985a40 r _rkl_combo_phy_trans_dp_hbr +ffffffff82985ab8 r dg1_combo_phy_trans_dp_hbr2_hbr3 +ffffffff82985ac8 r dg1_combo_phy_trans_dp_rbr_hbr +ffffffff82985ae0 r _dg1_combo_phy_trans_dp_hbr2_hbr3 +ffffffff82985b60 r _dg1_combo_phy_trans_dp_rbr_hbr +ffffffff82985bd8 r tgl_uy_combo_phy_trans_dp_hbr2 +ffffffff82985be8 r tgl_combo_phy_trans_dp_hbr2 +ffffffff82985c00 r _tgl_uy_combo_phy_trans_dp_hbr2 +ffffffff82985c80 r _tgl_combo_phy_trans_dp_hbr2 +ffffffff82985cf8 r tgl_dkl_phy_trans_dp_hbr2 +ffffffff82985d08 r tgl_dkl_phy_trans_dp_hbr +ffffffff82985d20 r _tgl_dkl_phy_trans_dp_hbr2 +ffffffff82985da0 r _tgl_dkl_phy_trans_dp_hbr +ffffffff82985e18 r jsl_combo_phy_trans_edp_hbr2 +ffffffff82985e28 r jsl_combo_phy_trans_edp_hbr +ffffffff82985e40 r _jsl_combo_phy_trans_edp_hbr2 +ffffffff82985ec0 r _jsl_combo_phy_trans_edp_hbr +ffffffff82985f38 r ehl_combo_phy_trans_dp +ffffffff82985f48 r ehl_combo_phy_trans_edp_hbr2 +ffffffff82985f60 r _ehl_combo_phy_trans_edp_hbr2 +ffffffff82985fe0 r _ehl_combo_phy_trans_dp +ffffffff82986058 r icl_mg_phy_trans_hdmi +ffffffff82986070 r _icl_mg_phy_trans_hdmi +ffffffff829860e8 r icl_mg_phy_trans_hbr2_hbr3 +ffffffff829860f8 r icl_mg_phy_trans_rbr_hbr +ffffffff82986110 r _icl_mg_phy_trans_hbr2_hbr3 +ffffffff82986190 r _icl_mg_phy_trans_rbr_hbr +ffffffff82986208 r bxt_trans_hdmi +ffffffff82986218 r bxt_trans_edp +ffffffff82986228 r bxt_trans_dp +ffffffff82986240 r _bxt_trans_hdmi +ffffffff829862c0 r _bxt_trans_edp +ffffffff82986340 r _bxt_trans_dp +ffffffff829863b8 r skl_y_trans_hdmi +ffffffff829863c8 r skl_y_trans_edp +ffffffff829863d8 r kbl_y_trans_dp +ffffffff829863f0 r _skl_y_trans_hdmi +ffffffff82986480 r _skl_y_trans_edp +ffffffff82986500 r _kbl_y_trans_dp +ffffffff82986570 r skl_trans_hdmi +ffffffff82986580 r skl_u_trans_edp +ffffffff82986590 r kbl_u_trans_dp +ffffffff829865a0 r _skl_trans_hdmi +ffffffff82986630 r _skl_u_trans_edp +ffffffff829866b0 r _kbl_u_trans_dp +ffffffff82986720 r skl_trans_edp +ffffffff82986730 r kbl_trans_dp +ffffffff82986740 r _skl_trans_edp +ffffffff829867c0 r _kbl_trans_dp +ffffffff82986830 r skl_y_trans_dp +ffffffff82986840 r _skl_y_trans_dp +ffffffff829868b0 r skl_u_trans_dp +ffffffff829868c0 r _skl_u_trans_dp +ffffffff82986930 r skl_trans_dp +ffffffff82986940 r _skl_trans_dp +ffffffff829869b0 r bdw_trans_fdi +ffffffff829869c0 r bdw_trans_hdmi +ffffffff829869d0 r bdw_trans_edp +ffffffff829869e0 r bdw_trans_dp +ffffffff829869f0 r _bdw_trans_fdi +ffffffff82986a60 r _bdw_trans_hdmi +ffffffff82986ae0 r _bdw_trans_edp +ffffffff82986b50 r _bdw_trans_dp +ffffffff82986bc0 r hsw_trans_fdi +ffffffff82986bd0 r hsw_trans_hdmi +ffffffff82986be0 r hsw_trans_dp +ffffffff82986bf0 r _hsw_trans_fdi +ffffffff82986c60 r _hsw_trans_hdmi +ffffffff82986cf0 r _hsw_trans_dp +ffffffff82987000 r load_detect_mode +ffffffff82987078 r skl_display_funcs +ffffffff829870a0 r ddi_display_funcs +ffffffff829870c8 r pch_split_display_funcs +ffffffff829870f0 r vlv_display_funcs +ffffffff82987118 r i9xx_display_funcs +ffffffff82987158 r intel_mode_funcs +ffffffff829871a0 r intel_mode_config_funcs +ffffffff82988000 r wa_1409767108_buddy_page_masks +ffffffff82988050 r tgl_buddy_page_masks +ffffffff829880a0 r d13_port_domains +ffffffff82988100 r d12_port_domains +ffffffff82988140 r d11_port_domains +ffffffff82988180 r i9xx_port_domains +ffffffff82989000 r xelpdp_power_wells +ffffffff82989030 r xelpd_power_wells +ffffffff82989060 r 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SECT_CTRLCONST_defs +ffffffff82a094d0 r SECT_CONTEXT_def_2 +ffffffff82a094f0 r SECT_CONTEXT_def_4 +ffffffff82a09680 r SECT_CONTEXT_def_5 +ffffffff82a096a0 r SECT_CONTEXT_def_6 +ffffffff82a09780 r SECT_CONTEXT_def_1 +ffffffff82a09f20 r SECT_CONTEXT_def_3 +ffffffff82a0a000 r SECT_CONTEXT_def_7 +ffffffff82a0a488 r SECT_CLEAR_def_1 +ffffffff82a0a494 r SECT_CTRLCONST_def_1 +ffffffff82a0a4a0 r evergreen_default_state +ffffffff82a0b000 r cayman_reg_safe_bm +ffffffff82a0d000 r evergreen_reg_safe_bm +ffffffff82a10000 r evergreen_hdmi_write_sad_regs.eld_reg_to_type +ffffffff82a11000 r didt_config_kv +ffffffff82a12000 r barts_io_mc_regs +ffffffff82a120f0 r turks_io_mc_regs +ffffffff82a121e0 r caicos_io_mc_regs +ffffffff82a122d0 r cayman_io_mc_regs +ffffffff82a123c0 r cayman_golden_registers +ffffffff82a12580 r cayman_golden_registers2 +ffffffff82a125d0 r dvst_golden_registers +ffffffff82a12860 r dvst_golden_registers2 +ffffffff82a12890 r scrapper_golden_registers +ffffffff82a12d70 r tn_rlc_save_restore_register_list +ffffffff82a12f60 r cayman_cs_data +ffffffff82a12fa0 r SECT_CONTEXT_defs +ffffffff82a13020 r SECT_CLEAR_defs +ffffffff82a13040 r SECT_CTRLCONST_defs +ffffffff82a13060 r SECT_CONTEXT_def_2 +ffffffff82a13080 r SECT_CONTEXT_def_4 +ffffffff82a13210 r SECT_CONTEXT_def_5 +ffffffff82a13230 r SECT_CONTEXT_def_1 +ffffffff82a139d0 r SECT_CONTEXT_def_3 +ffffffff82a13ab0 r SECT_CONTEXT_def_6 +ffffffff82a13b90 r SECT_CONTEXT_def_7 +ffffffff82a14018 r SECT_CLEAR_def_1 +ffffffff82a14024 r SECT_CTRLCONST_def_1 +ffffffff82a14030 r cayman_default_state +ffffffff82a15000 r cac_weights_cayman_xt +ffffffff82a15128 r cac_weights_cayman_pro +ffffffff82a15250 r cac_weights_cayman_le +ffffffff82a15380 r cayman_cgcg_cgls_default +ffffffff82a155c0 r cayman_mgcg_default +ffffffff82a15f20 r cayman_sysls_default +ffffffff82a15ff0 r cayman_cgcg_cgls_enable +ffffffff82a16240 r cayman_cgcg_cgls_disable +ffffffff82a164a0 r cayman_mgcg_enable +ffffffff82a16520 r cayman_mgcg_disable +ffffffff82a165a0 r cayman_sysls_enable +ffffffff82a16670 r cayman_sysls_disable +ffffffff82a17000 r rn50_reg_safe_bm +ffffffff82a171a0 r r100_reg_safe_bm +ffffffff82a18000 r r200_reg_safe_bm +ffffffff82a19000 r r300_reg_safe_bm +ffffffff82a1a000 r r420_reg_safe_bm +ffffffff82a1c000 r color_formats_table +ffffffff82a1c480 r r600_reg_safe_bm +ffffffff82a1f000 R r600_utc +ffffffff82a1f040 R r600_dtc +ffffffff82a1f080 r r600_encode_pci_lane_width.encoded_lanes +ffffffff82a21000 r r100_gfx_ring +ffffffff82a21070 r r300_gfx_ring +ffffffff82a210e0 r rv515_gfx_ring +ffffffff82a21150 r r600_gfx_ring +ffffffff82a211c0 r r600_dma_ring +ffffffff82a21230 r rv6xx_uvd_ring +ffffffff82a212a0 r rv770_uvd_ring +ffffffff82a21310 r evergreen_gfx_ring +ffffffff82a21380 r evergreen_dma_ring +ffffffff82a213f0 r cayman_gfx_ring +ffffffff82a21460 r cayman_dma_ring +ffffffff82a214d0 r cayman_uvd_ring +ffffffff82a21540 r trinity_vce_ring +ffffffff82a215b0 r si_gfx_ring +ffffffff82a21620 r si_dma_ring +ffffffff82a21690 r ci_gfx_ring +ffffffff82a21700 r ci_cp_ring +ffffffff82a21770 r ci_dma_ring +ffffffff82a217e0 r ci_vce_ring +ffffffff82a22000 r object_connector_convert +ffffffff82a22060 r supported_devices_connector_convert +ffffffff82a220a0 r supported_devices_connector_object_id_convert +ffffffff82a220c0 r thermal_controller_names +ffffffff82a22100 r pp_lib_thermal_controller_names +ffffffff82a23000 r pin_offsets +ffffffff82a23020 r radeon_audio_acr.hdmi_predefined_acr +ffffffff82a25000 r thermal_controller_names +ffffffff82a25020 r default_primarydac_adj +ffffffff82a25120 r default_tvdac_adj +ffffffff82a25220 r default_tmds_pll +ffffffff82a26000 r radeon_dp_connector_helper_funcs +ffffffff82a26050 r radeon_vga_connector_helper_funcs +ffffffff82a260a0 r radeon_dvi_connector_helper_funcs +ffffffff82a260f0 r radeon_tv_connector_helper_funcs +ffffffff82a26140 r radeon_lvds_connector_helper_funcs +ffffffff82a26190 r radeon_dp_connector_funcs +ffffffff82a26298 r radeon_lvds_bridge_connector_funcs +ffffffff82a26310 r radeon_vga_connector_funcs +ffffffff82a26388 r radeon_dvi_connector_funcs +ffffffff82a26400 r radeon_edp_connector_funcs +ffffffff82a26478 r radeon_tv_connector_funcs +ffffffff82a264f0 r radeon_lvds_connector_funcs +ffffffff82a27000 r radeon_family_name +ffffffff82a273f0 r radeon_px_quirk_list +ffffffff82a28000 r radeon_fb_funcs +ffffffff82a28018 r radeon_mode_funcs +ffffffff82a28060 r radeon_tmds_pll_enum_list +ffffffff82a28080 r radeon_tv_std_enum_list +ffffffff82a28100 r radeon_underscan_enum_list +ffffffff82a28130 r radeon_audio_enum_list +ffffffff82a28160 r radeon_dither_enum_list +ffffffff82a28180 r radeon_output_csc_enum_list +ffffffff82a281c0 r radeon_crtc_funcs +ffffffff82a28280 r hpd_names +ffffffff82a282b0 r encoder_names +ffffffff82a283e0 r radeon_afmt_init.eg_offsets +ffffffff82a29000 r aux_offset +ffffffff82a2a000 R radeondrm_ca +ffffffff82a2a030 r pciidlist +ffffffff82a2e1d0 r kms_driver +ffffffff82a2e2c0 r radeon_ioctls_kms +ffffffff82a2f000 r radeon_fb_helper_funcs +ffffffff82a2f008 r radeonfb_ops +ffffffff82a30000 R radeon_fence_ops +ffffffff82a32000 R radeon_gem_object_funcs +ffffffff82a32060 r radeon_gem_vm_ops +ffffffff82a33000 r radeon_i2c_algo +ffffffff82a33010 r radeon_atom_i2c_algo +ffffffff82a34000 r legacy_helper_funcs +ffffffff82a35000 r radeon_backlight_ops +ffffffff82a35018 r radeon_legacy_lvds_enc_funcs +ffffffff82a35038 r radeon_legacy_lvds_helper_funcs +ffffffff82a350a0 r radeon_legacy_tmds_int_enc_funcs +ffffffff82a350c0 r radeon_legacy_tmds_int_helper_funcs +ffffffff82a35128 r radeon_legacy_primary_dac_enc_funcs +ffffffff82a35148 r radeon_legacy_primary_dac_helper_funcs +ffffffff82a351b0 r radeon_legacy_tv_dac_enc_funcs +ffffffff82a351d0 r radeon_legacy_tv_dac_helper_funcs +ffffffff82a35238 r radeon_legacy_tmds_ext_enc_funcs +ffffffff82a35258 r radeon_legacy_tmds_ext_helper_funcs +ffffffff82a36000 r SLOPE_value +ffffffff82a36030 r YCOEF_EN_value +ffffffff82a36060 r YCOEF_value +ffffffff82a36090 r available_tv_modes +ffffffff82a36110 r hor_timing_NTSC +ffffffff82a36150 r vert_timing_NTSC +ffffffff82a36190 r hor_timing_PAL +ffffffff82a361d0 r vert_timing_PAL +ffffffff82a38000 r radeon_pm_state_type_name +ffffffff82a39000 r radeon_evict_flags.placements +ffffffff82a3c000 r rs600_reg_safe_bm +ffffffff82a3e000 r rv515_reg_safe_bm +ffffffff82a3f000 r dll_speed_table +ffffffff82a40000 r r7xx_golden_registers +ffffffff82a40090 r r7xx_golden_dyn_gpr_registers +ffffffff82a40100 r rv770ce_golden_registers +ffffffff82a40160 r rv770_golden_registers +ffffffff82a401b0 r rv770_mgcg_init +ffffffff82a408f0 r rv730_golden_registers +ffffffff82a40950 r rv730_mgcg_init +ffffffff82a40ee0 r rv710_golden_registers +ffffffff82a40f30 r rv710_mgcg_init +ffffffff82a411d0 r rv740_golden_registers +ffffffff82a41360 r rv740_mgcg_init +ffffffff82a43000 r rv730_smc_int_vectors +ffffffff82a43040 r rv710_smc_int_vectors +ffffffff82a43080 r rv740_smc_int_vectors +ffffffff82a430c0 r cypress_smc_int_vectors +ffffffff82a43100 r caicos_smc_int_vectors +ffffffff82a43140 r cayman_smc_int_vectors +ffffffff82a44000 r tahiti_io_mc_regs +ffffffff82a44120 r pitcairn_io_mc_regs +ffffffff82a44240 r verde_io_mc_regs +ffffffff82a44360 r oland_io_mc_regs +ffffffff82a44480 r hainan_io_mc_regs +ffffffff82a445a0 r crtc_offsets +ffffffff82a445c0 r si_disp_int_status +ffffffff82a445e0 r tahiti_golden_registers +ffffffff82a44760 r tahiti_golden_rlc_registers +ffffffff82a447b0 r tahiti_mgcg_cgcg_init +ffffffff82a44d98 r tahiti_golden_registers2 +ffffffff82a44db0 r pitcairn_golden_registers +ffffffff82a44f00 r pitcairn_golden_rlc_registers +ffffffff82a44f40 r pitcairn_mgcg_cgcg_init +ffffffff82a453b0 r verde_golden_registers +ffffffff82a45620 r verde_golden_rlc_registers +ffffffff82a45660 r verde_mgcg_cgcg_init +ffffffff82a45ae0 r oland_golden_registers +ffffffff82a45c30 r oland_golden_rlc_registers +ffffffff82a45c70 r oland_mgcg_cgcg_init +ffffffff82a46000 r hainan_golden_registers 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lcac_cape_verde +ffffffff82a499d0 r cac_override_cape_verde +ffffffff82a499e4 r powertune_data_cape_verde +ffffffff82a49a20 r cac_weights_cape_verde_pro +ffffffff82a49ef0 r cac_weights_heathrow +ffffffff82a4a3c0 r cac_weights_chelsea_xt +ffffffff82a4a890 r cac_weights_chelsea_pro +ffffffff82a4ad60 r cac_weights_cape_verde +ffffffff82a4b230 r cac_weights_mars_pro +ffffffff82a4b700 r lcac_mars_pro +ffffffff82a4ba60 r cac_override_oland +ffffffff82a4ba74 r powertune_data_mars_pro +ffffffff82a4bab0 r cac_weights_mars_xt +ffffffff82a4bf80 r cac_weights_oland_pro +ffffffff82a4c450 r cac_weights_oland_xt +ffffffff82a4c920 r lcac_oland +ffffffff82a4cc7c r powertune_data_oland +ffffffff82a4ccb8 r dte_data_oland +ffffffff82a4cd90 r cac_weights_hainan +ffffffff82a4d254 r powertune_data_hainan +ffffffff82a4d290 r dte_data_aruba_pro +ffffffff82a4d360 r dte_data_tahiti_pro +ffffffff82a4d430 r dte_data_curacao_pro +ffffffff82a4d500 r dte_data_neptune_xt +ffffffff82a4d5d0 r dte_data_sun_xt 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r opcode_table +ffffffff82a54bd0 r atom_dst_to_src +ffffffff82a54c50 r atom_io_names +ffffffff82a54c80 r atom_table_names +ffffffff82a54ed0 r atom_iio_len +ffffffff82a55000 r object_connector_convert +ffffffff82a55058 R amdgpu_vbios_version_attr_group +ffffffff82a56000 r voltage_names +ffffffff82a56020 r pre_emph_names +ffffffff82a57000 r amdgpu_atombios_encoder_backlight_ops +ffffffff82a59000 r amdgpu_benchmark.common_modes +ffffffff82a5a000 r amdgpu_cgs_ops +ffffffff82a5b000 r amdgpu_connector_dp_helper_funcs +ffffffff82a5b050 r amdgpu_connector_vga_helper_funcs +ffffffff82a5b0a0 r amdgpu_connector_dvi_helper_funcs +ffffffff82a5b0f0 r amdgpu_connector_lvds_helper_funcs +ffffffff82a5b140 r amdgpu_connector_dp_funcs +ffffffff82a5b1c0 r amdgpu_connector_add_common_modes.common_modes +ffffffff82a5b248 r amdgpu_connector_edp_funcs +ffffffff82a5b2c0 r amdgpu_connector_vga_funcs +ffffffff82a5b338 r amdgpu_connector_dvi_funcs +ffffffff82a5b3b0 r amdgpu_connector_lvds_funcs +ffffffff82a5d000 R amdgpu_ctx_num_entities +ffffffff82a5e000 r amdgpu_kms_driver +ffffffff82a5e0f0 r amdgpu_device_ip_reinit_late_sriov.ip_order +ffffffff82a5f000 r hw_id_map +ffffffff82a5f090 r hw_id_names +ffffffff82a60000 r hpd_names +ffffffff82a60030 r encoder_names +ffffffff82a60180 r dcc_retile_formats +ffffffff82a60270 r dcc_formats +ffffffff82a60360 R amdgpu_mode_funcs +ffffffff82a603b0 r amdgpu_underscan_enum_list +ffffffff82a603e0 r amdgpu_audio_enum_list +ffffffff82a60410 r amdgpu_dither_enum_list +ffffffff82a60430 r amdgpu_fb_funcs +ffffffff82a61000 R amdgpu_dmabuf_ops +ffffffff82a62000 R amdgpu_ioctls_kms +ffffffff82a62210 R amdgpu_ca +ffffffff82a62240 r pciidlist +ffffffff82a63110 r amdgpu_unsupported_pciidlist +ffffffff82a63690 r amdgpu_kms_driver +ffffffff82a64000 r amdgpu_job_fence_ops +ffffffff82a64038 r amdgpu_fence_ops +ffffffff82a65000 r amdgpu_gem_object_funcs +ffffffff82a65060 r amdgpu_gem_vm_ops +ffffffff82a67000 R amdgpu_gtt_mgr_attr_group +ffffffff82a67018 r amdgpu_gtt_mgr_func +ffffffff82a68000 r amdgpu_atombios_i2c_algo +ffffffff82a69000 R amdgpu_sched_ops +ffffffff82a6c000 r amdgpu_vram_names +ffffffff82a6d000 r amdgpu_preempt_mgr_func +ffffffff82a6e000 R psp_ip_funcs +ffffffff82a6e0a0 R psp_v3_1_ip_block +ffffffff82a6e0b8 R psp_v10_0_ip_block +ffffffff82a6e0d0 R psp_v11_0_ip_block +ffffffff82a6e0e8 R psp_v11_0_8_ip_block +ffffffff82a6e100 R psp_v12_0_ip_block +ffffffff82a6e118 R psp_v13_0_ip_block +ffffffff82a6e130 R psp_v13_0_4_ip_block +ffffffff82a70000 r amdgpu_evict_flags.placements +ffffffff82a74000 R amdgpu_vkms_ip_block +ffffffff82a76000 R amdgpu_vm_cpu_funcs +ffffffff82a78000 R amdgpu_vm_sdma_funcs +ffffffff82a79000 R amdgpu_vram_mgr_attr_group +ffffffff82a79018 r amdgpu_vram_mgr_func +ffffffff82a7a000 r xgmi_pcs_err_status_reg_arct +ffffffff82a7b000 r GC_BASE +ffffffff82a7b0c0 r HDP_BASE +ffffffff82a7b180 r MMHUB_BASE +ffffffff82a7b240 r ATHUB_BASE +ffffffff82a7b300 r NBIF0_BASE +ffffffff82a7b3c0 r MP0_BASE +ffffffff82a7b480 r MP1_BASE +ffffffff82a7b540 r UVD_BASE +ffffffff82a7b600 r DF_BASE +ffffffff82a7b6c0 r OSSSYS_BASE +ffffffff82a7b780 r SDMA0_BASE +ffffffff82a7b840 r SDMA1_BASE +ffffffff82a7b900 r SDMA2_BASE +ffffffff82a7b9c0 r SDMA3_BASE +ffffffff82a7ba80 r SDMA4_BASE +ffffffff82a7bb40 r SDMA5_BASE +ffffffff82a7bc00 r SDMA6_BASE +ffffffff82a7bcc0 r SDMA7_BASE +ffffffff82a7bd80 r SMUIO_BASE +ffffffff82a7be40 r THM_BASE +ffffffff82a7bf00 r UMC_BASE +ffffffff82a7bfc0 r RSMU_BASE +ffffffff82a7d000 r cz_ih_ip_funcs +ffffffff82a7d0a0 R cz_ih_ip_block +ffffffff82a7d0b8 r cz_ih_funcs +ffffffff82a7e000 r crtc_offsets +ffffffff82a7e020 r dce_v10_0_ip_funcs +ffffffff82a7e0c0 R dce_v10_0_ip_block +ffffffff82a7e0d8 R dce_v10_1_ip_block +ffffffff82a7e0f0 r dce_v10_0_display_funcs +ffffffff82a7e150 r hpd_offsets +ffffffff82a7e168 r dce_v10_0_encoder_funcs +ffffffff82a7e188 r dce_v10_0_dac_helper_funcs +ffffffff82a7e1f0 r dce_v10_0_dig_helper_funcs +ffffffff82a7e258 r dce_v10_0_ext_helper_funcs +ffffffff82a7e2c0 r dce_v10_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82a7e2f0 r dce_v10_0_crtc_irq_funcs +ffffffff82a7e300 r dce_v10_0_pageflip_irq_funcs +ffffffff82a7e310 r dce_v10_0_hpd_irq_funcs +ffffffff82a7e320 r interrupt_status_offsets +ffffffff82a7e380 r dce_v10_0_crtc_funcs +ffffffff82a7e440 r dce_v10_0_crtc_helper_funcs +ffffffff82a7e4c0 r vga_control_regs +ffffffff82a7e4e0 r dig_offsets +ffffffff82a7e500 r pin_offsets +ffffffff82a7e520 r fiji_mgcg_cgcg_init +ffffffff82a7e540 r golden_settings_fiji_a10 +ffffffff82a7e570 r tonga_mgcg_cgcg_init +ffffffff82a7e590 r golden_settings_tonga_a11 +ffffffff82a7f000 r crtc_offsets +ffffffff82a7f020 r dce_v11_0_ip_funcs +ffffffff82a7f0c0 R dce_v11_0_ip_block +ffffffff82a7f0d8 R dce_v11_2_ip_block +ffffffff82a7f0f0 r dce_v11_0_display_funcs +ffffffff82a7f150 r hpd_offsets +ffffffff82a7f168 r dce_v11_0_encoder_funcs +ffffffff82a7f188 r dce_v11_0_dac_helper_funcs +ffffffff82a7f1f0 r dce_v11_0_dig_helper_funcs +ffffffff82a7f258 r dce_v11_0_ext_helper_funcs +ffffffff82a7f2c0 r dce_v11_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82a7f2f0 r dce_v11_0_crtc_irq_funcs +ffffffff82a7f300 r dce_v11_0_pageflip_irq_funcs +ffffffff82a7f310 r dce_v11_0_hpd_irq_funcs +ffffffff82a7f320 r interrupt_status_offsets +ffffffff82a7f380 r dce_v11_0_crtc_funcs +ffffffff82a7f440 r dce_v11_0_crtc_helper_funcs +ffffffff82a7f4c0 r vga_control_regs +ffffffff82a7f4e0 r dig_offsets +ffffffff82a7f510 r cz_mgcg_cgcg_init +ffffffff82a7f530 r cz_golden_settings_a11 +ffffffff82a7f550 r stoney_golden_settings_a11 +ffffffff82a7f570 r polaris11_golden_settings_a11 +ffffffff82a7f5b0 r polaris10_golden_settings_a11 +ffffffff82a80000 R df_v1_7_funcs +ffffffff82a80070 r df_v1_7_channel_number +ffffffff82a81000 R df_v3_6_funcs +ffffffff82a81070 r df_v3_6_channel_number +ffffffff82a82000 r GC_BASE +ffffffff82a820a8 r HDP_BASE +ffffffff82a82150 r MMHUB_BASE +ffffffff82a821f8 r ATHUB_BASE +ffffffff82a822a0 r NBIO_BASE +ffffffff82a82348 r MP0_BASE +ffffffff82a823f0 r MP1_BASE +ffffffff82a82498 r VCN0_BASE +ffffffff82a82540 r DF_BASE +ffffffff82a825e8 r DCN_BASE +ffffffff82a82690 r OSSSYS_BASE +ffffffff82a82738 r SMUIO_BASE +ffffffff82a827e0 r THM_BASE +ffffffff82a83000 r gfx_v10_0_ip_funcs +ffffffff82a830a0 R gfx_v10_0_ip_block +ffffffff82a830b8 r gfx_v10_0_kiq_pm4_funcs +ffffffff82a830f8 r gfx_v10_0_ring_funcs_kiq +ffffffff82a83218 r gfx_v10_0_ring_funcs_gfx +ffffffff82a83338 r gfx_v10_0_ring_funcs_compute +ffffffff82a83458 r gfx_v10_0_eop_irq_funcs +ffffffff82a83468 r gfx_v10_0_kiq_irq_funcs +ffffffff82a83478 r gfx_v10_0_priv_reg_irq_funcs +ffffffff82a83488 r gfx_v10_0_priv_inst_irq_funcs +ffffffff82a83498 r gfx_v10_0_rlc_funcs +ffffffff82a83500 r gfx_v10_0_rlc_funcs_sriov +ffffffff82a83570 r gfx10_cs_data +ffffffff82a83590 r gfx10_SECT_CONTEXT_defs +ffffffff82a83620 r gfx10_SECT_CONTEXT_def_1 +ffffffff82a83980 r gfx10_SECT_CONTEXT_def_3 +ffffffff82a83990 r gfx10_SECT_CONTEXT_def_4 +ffffffff82a83c08 r gfx10_SECT_CONTEXT_def_5 +ffffffff82a83c10 r gfx10_SECT_CONTEXT_def_6 +ffffffff82a83c20 r gfx10_SECT_CONTEXT_def_2 +ffffffff82a84060 r gfx10_SECT_CONTEXT_def_7 +ffffffff82a84170 r gfx10_SECT_CONTEXT_def_8 +ffffffff82a844a0 r gfx_v10_0_gfx_funcs +ffffffff82a844e0 r golden_settings_gc_rlc_spm_10_0_nv10 +ffffffff82a8a780 r golden_settings_gc_rlc_spm_10_1_nv14 +ffffffff82a8e1a0 r golden_settings_gc_rlc_spm_10_1_2_nv12 +ffffffff82a94440 r golden_settings_gc_10_1 +ffffffff82a94800 r golden_settings_gc_10_0_nv10 +ffffffff82a94800 r golden_settings_gc_10_1_1 +ffffffff82a94b90 r golden_settings_gc_10_1_2 +ffffffff82a94b90 r golden_settings_gc_10_1_nv14 +ffffffff82a94f80 r golden_settings_gc_10_1_2_nv12 +ffffffff82a94f80 r golden_settings_gc_10_3 +ffffffff82a95388 r golden_settings_gc_10_3_sienna_cichlid +ffffffff82a95390 r golden_settings_gc_10_3_2 +ffffffff82a95780 r golden_settings_gc_10_3_vangogh +ffffffff82a959e0 r golden_settings_gc_10_3_3 +ffffffff82a95bc0 r golden_settings_gc_10_3_4 +ffffffff82a95f20 r golden_settings_gc_10_3_5 +ffffffff82a96220 r golden_settings_gc_10_0_cyan_skillfish +ffffffff82a96550 r golden_settings_gc_10_3_6 +ffffffff82a96760 r golden_settings_gc_10_3_7 +ffffffff82a97000 r gfx_v11_0_ip_funcs +ffffffff82a970a0 R gfx_v11_0_ip_block +ffffffff82a970b8 r gfx_v11_0_kiq_pm4_funcs +ffffffff82a970f8 r gfx_v11_0_ring_funcs_kiq +ffffffff82a97218 r gfx_v11_0_ring_funcs_gfx +ffffffff82a97338 r gfx_v11_0_ring_funcs_compute +ffffffff82a97458 r gfx_v11_0_eop_irq_funcs +ffffffff82a97468 r gfx_v11_0_priv_reg_irq_funcs +ffffffff82a97478 r gfx_v11_0_priv_inst_irq_funcs +ffffffff82a97488 r gfx_v11_0_rlc_funcs +ffffffff82a974f0 r gfx11_cs_data +ffffffff82a97510 r gfx11_SECT_CONTEXT_defs +ffffffff82a97590 r gfx11_SECT_CONTEXT_def_1 +ffffffff82a978f0 r gfx11_SECT_CONTEXT_def_3 +ffffffff82a97900 r gfx11_SECT_CONTEXT_def_5 +ffffffff82a97908 r gfx11_SECT_CONTEXT_def_6 +ffffffff82a97910 r gfx11_SECT_CONTEXT_def_2 +ffffffff82a97d50 r gfx11_SECT_CONTEXT_def_4 +ffffffff82a97fd0 r gfx11_SECT_CONTEXT_def_7 +ffffffff82a98438 r gfx_v11_0_gfx_funcs +ffffffff82a98480 r golden_settings_gc_11_0_1 +ffffffff82a99000 r gfx_v8_0_ip_funcs +ffffffff82a990a0 R gfx_v8_0_ip_block +ffffffff82a990b8 R gfx_v8_1_ip_block +ffffffff82a990d0 r gfx_v8_0_gfx_funcs +ffffffff82a99110 r gfx_v8_0_ring_funcs_kiq +ffffffff82a99230 r gfx_v8_0_ring_funcs_gfx +ffffffff82a99350 r gfx_v8_0_ring_funcs_compute +ffffffff82a99470 r amdgpu_gds_reg_offset +ffffffff82a99570 r gfx_v8_0_eop_irq_funcs +ffffffff82a99580 r gfx_v8_0_priv_reg_irq_funcs +ffffffff82a99590 r gfx_v8_0_priv_inst_irq_funcs +ffffffff82a995a0 r gfx_v8_0_cp_ecc_error_irq_funcs +ffffffff82a995b0 r gfx_v8_0_sq_irq_funcs +ffffffff82a995c0 r sq_edc_source_names +ffffffff82a995f8 r iceland_rlc_funcs +ffffffff82a99660 r vi_cs_data +ffffffff82a99680 r vi_SECT_CONTEXT_defs +ffffffff82a99700 r vi_SECT_CONTEXT_def_1 +ffffffff82a99a50 r vi_SECT_CONTEXT_def_3 +ffffffff82a99a70 r vi_SECT_CONTEXT_def_4 +ffffffff82a99ce4 r vi_SECT_CONTEXT_def_5 +ffffffff82a99cec r vi_SECT_CONTEXT_def_6 +ffffffff82a99cf0 r vi_SECT_CONTEXT_def_2 +ffffffff82a9a140 r vi_SECT_CONTEXT_def_7 +ffffffff82a9a4f0 r vgpr_init_compute_shader +ffffffff82a9a600 r vgpr_init_regs +ffffffff82a9a690 r sgpr1_init_regs +ffffffff82a9a720 r sgpr2_init_regs +ffffffff82a9a7b0 r sec_ded_counter_registers +ffffffff82a9a820 r iceland_mgcg_cgcg_init +ffffffff82a9ab20 r golden_settings_iceland_a11 +ffffffff82a9abe0 r iceland_golden_common_all +ffffffff82a9ac40 r fiji_mgcg_cgcg_init +ffffffff82a9adf0 r golden_settings_fiji_a10 +ffffffff82a9ae80 r fiji_golden_common_all +ffffffff82a9af00 r tonga_mgcg_cgcg_init +ffffffff82a9b290 r golden_settings_tonga_a11 +ffffffff82a9b350 r tonga_golden_common_all +ffffffff82a9b3b0 r golden_settings_vegam_a11 +ffffffff82a9b480 r vegam_golden_common_all +ffffffff82a9b4d0 r golden_settings_polaris11_a11 +ffffffff82a9b5a0 r polaris11_golden_common_all +ffffffff82a9b5f0 r golden_settings_polaris10_a11 +ffffffff82a9b6c0 r polaris10_golden_common_all +ffffffff82a9b720 r cz_mgcg_cgcg_init +ffffffff82a9bab0 r cz_golden_settings_a11 +ffffffff82a9bb40 r cz_golden_common_all +ffffffff82a9bba0 r stoney_mgcg_cgcg_init +ffffffff82a9bbe0 r stoney_golden_settings_a11 +ffffffff82a9bc60 r stoney_golden_common_all +ffffffff82a9c000 R gfx_v9_0_ras_ops +ffffffff82a9c040 r gfx_v9_0_ip_funcs +ffffffff82a9c0e0 R gfx_v9_0_ip_block +ffffffff82a9c100 r ras_gfx_subblocks +ffffffff82a9cb80 r gfx_v9_0_edc_counter_regs +ffffffff82a9cf20 r gfx_v9_0_ras_fields +ffffffff82a9e000 r gfx_v9_0_kiq_pm4_funcs +ffffffff82a9e040 r gfx_v9_0_ring_funcs_kiq +ffffffff82a9e160 r gfx_v9_0_ring_funcs_gfx +ffffffff82a9e280 r gfx_v9_0_ring_funcs_compute +ffffffff82a9e3a0 r gfx_v9_0_eop_irq_funcs +ffffffff82a9e3b0 r gfx_v9_0_priv_reg_irq_funcs +ffffffff82a9e3c0 r gfx_v9_0_priv_inst_irq_funcs +ffffffff82a9e3d0 r gfx_v9_0_cp_ecc_error_irq_funcs +ffffffff82a9e3e0 r gfx_v9_0_rlc_funcs +ffffffff82a9e450 r gfx9_cs_data +ffffffff82a9e470 r gfx9_SECT_CONTEXT_defs +ffffffff82a9e500 r gfx9_SECT_CONTEXT_def_1 +ffffffff82a9e850 r gfx9_SECT_CONTEXT_def_3 +ffffffff82a9e860 r gfx9_SECT_CONTEXT_def_4 +ffffffff82a9ead4 r gfx9_SECT_CONTEXT_def_5 +ffffffff82a9eadc r gfx9_SECT_CONTEXT_def_6 +ffffffff82a9eae0 r gfx9_SECT_CONTEXT_def_7 +ffffffff82a9ebf0 r gfx9_SECT_CONTEXT_def_2 +ffffffff82a9f060 r gfx9_SECT_CONTEXT_def_8 +ffffffff82a9f2d0 r vgpr_init_compute_shader_arcturus +ffffffff82a9fb60 r vgpr_init_regs_arcturus +ffffffff82a9fcf0 r vgpr_init_regs +ffffffff82a9fe80 r sgpr1_init_regs +ffffffff82aa0010 r sgpr2_init_regs +ffffffff82aa0198 r gfx_v9_0_gfx_funcs +ffffffff82aa01e0 r golden_settings_gc_9_0 +ffffffff82aa03c0 r golden_settings_gc_9_0_vg10 +ffffffff82aa0570 r golden_settings_gc_9_2_1 +ffffffff82aa06f0 r golden_settings_gc_9_2_1_vg12 +ffffffff82aa0830 r golden_settings_gc_9_0_vg20 +ffffffff82aa0940 r golden_settings_gc_9_4_1_arct +ffffffff82aa0a50 r golden_settings_gc_9_1 +ffffffff82aa0c90 r golden_settings_gc_9_1_rv2 +ffffffff82aa0e60 r golden_settings_gc_9_1_rv1 +ffffffff82aa0f10 r golden_settings_gc_9_1_rn +ffffffff82aa1030 r golden_settings_gc_9_x_common +ffffffff82aa2000 R gfx_v9_4_ras_ops +ffffffff82aa2040 r gfx_v9_4_edc_counter_regs +ffffffff82aa2420 r gfx_v9_4_ras_fields +ffffffff82aa4000 R vgpr_init_regs_aldebaran +ffffffff82aa41b0 R sgpr112_init_regs_aldebaran +ffffffff82aa4360 R sgpr96_init_regs_aldebaran +ffffffff82aa4510 R sgpr64_init_regs_aldebaran +ffffffff82aa46c0 r golden_settings_gc_9_4_2_alde +ffffffff82aa4720 r golden_settings_gc_9_4_2_alde_die_0 +ffffffff82aa47b0 r golden_settings_gc_9_4_2_alde_die_1 +ffffffff82aa4840 r sgpr112_init_compute_shader_aldebaran +ffffffff82aa4a60 r sgpr96_init_compute_shader_aldebaran +ffffffff82aa4c50 r sgpr64_init_compute_shader_aldebaran +ffffffff82aa4dc0 r vgpr_init_compute_shader_aldebaran +ffffffff82aa56a0 r gfx_v9_4_2_edc_counter_regs +ffffffff82aa5a20 r gfx_v9_4_2_ras_fields +ffffffff82aa73c0 r gfx_v9_4_2_utc_blocks +ffffffff82aa8000 R gfxhub_v1_0_funcs +ffffffff82aa9000 R gfxhub_v2_0_funcs +ffffffff82aa9060 r gfxhub_v2_0_vmhub_funcs +ffffffff82aa9070 r gfxhub_client_ids +ffffffff82aaa000 R gfxhub_v2_1_funcs +ffffffff82aaa060 r gfxhub_v2_1_vmhub_funcs +ffffffff82aaa070 r gfxhub_client_ids +ffffffff82aab000 R gfxhub_v3_0_funcs +ffffffff82aab060 r gfxhub_v3_0_vmhub_funcs +ffffffff82aab070 r gfxhub_client_ids +ffffffff82aac000 R gfxhub_v3_0_3_funcs +ffffffff82aac060 r gfxhub_v3_0_3_vmhub_funcs +ffffffff82aac070 r gfxhub_client_ids +ffffffff82aad000 R gmc_v10_0_ip_funcs +ffffffff82aad0a0 R gmc_v10_0_ip_block +ffffffff82aad0b8 r gmc_v10_0_gmc_funcs +ffffffff82aad100 r gmc_v10_0_irq_funcs +ffffffff82aad110 r gmc_v10_0_ecc_funcs +ffffffff82aae000 R gmc_v11_0_ip_funcs +ffffffff82aae0a0 R gmc_v11_0_ip_block +ffffffff82aae0b8 r gmc_v11_0_gmc_funcs +ffffffff82aae100 r gmc_v11_0_irq_funcs +ffffffff82aae110 r gmc_v11_0_ecc_funcs +ffffffff82aaf000 r gmc_v7_0_ip_funcs +ffffffff82aaf0a0 R gmc_v7_0_ip_block +ffffffff82aaf0b8 R gmc_v7_4_ip_block +ffffffff82aaf0d0 r gmc_v7_0_gmc_funcs +ffffffff82aaf118 r gmc_v7_0_irq_funcs +ffffffff82aaf128 r iceland_mgcg_cgcg_init +ffffffff82aaf140 r golden_settings_iceland_a11 +ffffffff82aaf170 r mc_cg_registers +ffffffff82aaf1a0 r mc_cg_en +ffffffff82aaf1d0 r mc_cg_ls_en +ffffffff82ab0000 r gmc_v8_0_ip_funcs +ffffffff82ab00a0 R gmc_v8_0_ip_block +ffffffff82ab00b8 R gmc_v8_1_ip_block +ffffffff82ab00d0 R gmc_v8_5_ip_block +ffffffff82ab00e8 r gmc_v8_0_gmc_funcs +ffffffff82ab0130 r gmc_v8_0_irq_funcs +ffffffff82ab0140 r fiji_mgcg_cgcg_init +ffffffff82ab0150 r golden_settings_fiji_a10 +ffffffff82ab0180 r tonga_mgcg_cgcg_init +ffffffff82ab0190 r golden_settings_tonga_a11 +ffffffff82ab01f0 r golden_settings_polaris11_a11 +ffffffff82ab0220 r golden_settings_polaris10_a11 +ffffffff82ab025c r cz_mgcg_cgcg_init +ffffffff82ab0270 r stoney_mgcg_cgcg_init +ffffffff82ab0290 r golden_settings_stoney_common +ffffffff82ab1000 R gmc_v9_0_ip_funcs +ffffffff82ab10a0 R gmc_v9_0_ip_block +ffffffff82ab10b8 r gmc_v9_0_gmc_funcs +ffffffff82ab1100 r gmc_v9_0_irq_funcs +ffffffff82ab1110 r gmc_v9_0_ecc_funcs +ffffffff82ab1120 r gfxhub_client_ids +ffffffff82ab1190 r mmhub_client_ids_vega10 +ffffffff82ab1480 r mmhub_client_ids_vega12 +ffffffff82ab1780 r mmhub_client_ids_vega20 +ffffffff82ab1a70 r mmhub_client_ids_arcturus +ffffffff82ab3280 r mmhub_client_ids_raven +ffffffff82ab3440 r mmhub_client_ids_renoir +ffffffff82ab3630 r mmhub_client_ids_aldebaran +ffffffff82ab4e40 r ecc_umc_mcumc_ctrl_addrs +ffffffff82ab4ec0 r ecc_umc_mcumc_ctrl_mask_addrs +ffffffff82ab4f40 r golden_settings_mmhub_1_0_0 +ffffffff82ab4f70 r golden_settings_athub_1_0_0 +ffffffff82ab5000 R hdp_v4_0_funcs +ffffffff82ab6000 R hdp_v5_0_funcs +ffffffff82ab7000 R hdp_v5_2_funcs +ffffffff82ab8000 R hdp_v6_0_funcs +ffffffff82ab9000 r iceland_ih_ip_funcs +ffffffff82ab90a0 R iceland_ih_ip_block +ffffffff82ab90b8 r iceland_ih_funcs +ffffffff82aba000 r ih_v6_0_ip_funcs +ffffffff82aba0a0 R ih_v6_0_ip_block +ffffffff82aba0b8 r ih_v6_0_funcs +ffffffff82aba0d8 r ih_v6_0_self_irq_funcs +ffffffff82abb000 R gfx_v11_0_imu_funcs +ffffffff82abb030 r imu_rlc_ram_golden_11 +ffffffff82abb680 r imu_rlc_ram_golden_11_0_2 +ffffffff82abc000 r imu_rlc_ram_golden_11_0_3 +ffffffff82abd000 r jpeg_v1_0_decode_ring_vm_funcs +ffffffff82abd120 r jpeg_v1_0_irq_funcs +ffffffff82abe000 r jpeg_v2_0_ip_funcs +ffffffff82abe0a0 R jpeg_v2_0_ip_block +ffffffff82abe0b8 r jpeg_v2_0_dec_ring_vm_funcs +ffffffff82abe1d8 r jpeg_v2_0_irq_funcs +ffffffff82abf000 r jpeg_v2_5_ip_funcs +ffffffff82abf0a0 R jpeg_v2_5_ip_block +ffffffff82abf0b8 r jpeg_v2_6_ip_funcs +ffffffff82abf158 R jpeg_v2_6_ip_block +ffffffff82abf170 R jpeg_v2_6_ras_hw_ops +ffffffff82abf1b0 r jpeg_v2_5_dec_ring_vm_funcs +ffffffff82abf2d0 r jpeg_v2_6_dec_ring_vm_funcs +ffffffff82abf3f0 r jpeg_v2_5_irq_funcs +ffffffff82ac0000 r jpeg_v3_0_ip_funcs +ffffffff82ac00a0 R jpeg_v3_0_ip_block +ffffffff82ac00b8 r jpeg_v3_0_dec_ring_vm_funcs +ffffffff82ac01d8 r jpeg_v3_0_irq_funcs +ffffffff82ac1000 r jpeg_v4_0_ip_funcs +ffffffff82ac10a0 R jpeg_v4_0_ip_block +ffffffff82ac10b8 r jpeg_v4_0_dec_ring_vm_funcs +ffffffff82ac11d8 r jpeg_v4_0_irq_funcs +ffffffff82ac2000 R lsdma_v6_0_funcs +ffffffff82ac3000 R mca_v3_0_mp0_hw_ops +ffffffff82ac3040 R mca_v3_0_mp1_hw_ops +ffffffff82ac3080 R mca_v3_0_mpio_hw_ops +ffffffff82ac30c0 R mca_v3_0_funcs +ffffffff82ac4000 r mes_v10_1_ip_funcs +ffffffff82ac40a0 R mes_v10_1_ip_block +ffffffff82ac40b8 r mes_v10_1_funcs +ffffffff82ac40e8 r mes_v10_1_ring_funcs +ffffffff82ac5000 r mes_v11_0_ip_funcs +ffffffff82ac50a0 R mes_v11_0_ip_block +ffffffff82ac50b8 r mes_v11_0_funcs +ffffffff82ac50e8 r mes_v11_0_ring_funcs +ffffffff82ac6000 R mmhub_v1_0_funcs +ffffffff82ac6050 r mmhub_v1_0_edc_cnt_regs +ffffffff82ac60c0 r mmhub_v1_0_ras_fields +ffffffff82ac7000 R mmhub_v1_7_funcs +ffffffff82ac7050 r mmhub_v1_7_edc_cnt_regs +ffffffff82ac7250 r mmhub_v1_7_ras_fields +ffffffff82ac89c0 r mmhub_v1_7_ea_err_status_regs +ffffffff82ac9000 R mmhub_v2_0_funcs +ffffffff82ac9050 r mmhub_v2_0_vmhub_funcs +ffffffff82ac9060 r mmhub_client_ids_navi1x +ffffffff82ac9190 r mmhub_client_ids_sienna_cichlid +ffffffff82ac9450 r mmhub_client_ids_beige_goby +ffffffff82aca000 R mmhub_v2_3_funcs +ffffffff82aca050 r mmhub_v2_3_vmhub_funcs +ffffffff82aca060 r mmhub_client_ids_vangogh +ffffffff82acb000 R mmhub_v3_0_funcs +ffffffff82acb050 r mmhub_v3_0_vmhub_funcs +ffffffff82acb060 r mmhub_client_ids_v3_0_0 +ffffffff82acc000 R mmhub_v3_0_1_funcs +ffffffff82acc050 r mmhub_v3_0_1_vmhub_funcs +ffffffff82acc060 r mmhub_client_ids_v3_0_1 +ffffffff82acd000 R mmhub_v3_0_2_funcs +ffffffff82acd050 r mmhub_v3_0_2_vmhub_funcs +ffffffff82acd060 r mmhub_client_ids_v3_0_2 +ffffffff82ace000 R mmhub_v9_4_ras_hw_ops +ffffffff82ace040 R mmhub_v9_4_funcs +ffffffff82ace090 r mmhub_v9_4_edc_cnt_regs +ffffffff82ace330 r mmhub_v9_4_ras_fields +ffffffff82ad03b0 r mmhub_v9_4_err_status_regs +ffffffff82ad1000 r xgpu_ai_mailbox_ack_irq_funcs +ffffffff82ad1010 r xgpu_ai_mailbox_rcv_irq_funcs +ffffffff82ad1020 R xgpu_ai_virt_ops +ffffffff82ad2000 r xgpu_nv_mailbox_ack_irq_funcs +ffffffff82ad2010 r xgpu_nv_mailbox_rcv_irq_funcs +ffffffff82ad2020 R xgpu_nv_virt_ops +ffffffff82ad3000 r xgpu_fiji_mgcg_cgcg_init +ffffffff82ad3240 r xgpu_fiji_golden_settings_a10 +ffffffff82ad3370 r xgpu_fiji_golden_common_all +ffffffff82ad33f0 r xgpu_tonga_mgcg_cgcg_init +ffffffff82ad3810 r xgpu_tonga_golden_settings_a11 +ffffffff82ad39d0 r xgpu_tonga_golden_common_all +ffffffff82ad3a28 r xgpu_vi_mailbox_ack_irq_funcs +ffffffff82ad3a38 r xgpu_vi_mailbox_rcv_irq_funcs +ffffffff82ad3a48 R xgpu_vi_virt_ops +ffffffff82ad4000 r navi10_ih_ip_funcs +ffffffff82ad40a0 R navi10_ih_ip_block +ffffffff82ad40b8 r navi10_ih_funcs +ffffffff82ad40d8 r navi10_ih_self_irq_funcs +ffffffff82ad5000 R nbio_v2_3_hdp_flush_reg +ffffffff82ad5048 R nbio_v2_3_funcs +ffffffff82ad6000 R nbio_v4_3_hdp_flush_reg +ffffffff82ad6048 R nbio_v4_3_funcs +ffffffff82ad6130 R nbio_v4_3_sriov_funcs +ffffffff82ad7000 R nbio_v6_1_hdp_flush_reg +ffffffff82ad7048 R nbio_v6_1_funcs +ffffffff82ad8000 R nbio_v7_0_hdp_flush_reg +ffffffff82ad8048 R nbio_v7_0_funcs +ffffffff82ad9000 R nbio_v7_2_hdp_flush_reg +ffffffff82ad9048 R nbio_v7_2_funcs +ffffffff82ada000 R nbio_v7_4_hdp_flush_reg +ffffffff82ada048 R nbio_v7_4_ras_hw_ops +ffffffff82ada088 R nbio_v7_4_funcs +ffffffff82ada170 r nbio_v7_4_ras_controller_irq_funcs +ffffffff82ada180 r nbio_v7_4_ras_err_event_athub_irq_funcs +ffffffff82adb000 R nbio_v7_7_hdp_flush_reg +ffffffff82adb048 R nbio_v7_7_funcs +ffffffff82adc000 r nv_common_ip_funcs +ffffffff82adc0a0 R nv_common_ip_block +ffffffff82adc0b8 r nv_asic_funcs +ffffffff82adc170 r nv_allowed_read_registers +ffffffff82adc2f0 r nv_video_codecs_encode +ffffffff82adc300 r sc_video_codecs_decode +ffffffff82adc310 r yc_video_codecs_decode +ffffffff82adc320 r bg_video_codecs_encode +ffffffff82adc330 r bg_video_codecs_decode +ffffffff82adc340 r nv_video_codecs_decode +ffffffff82adc350 r nv_video_codecs_encode_array +ffffffff82adc380 r sc_video_codecs_decode_array +ffffffff82adc420 r yc_video_codecs_decode_array +ffffffff82adc490 r bg_video_codecs_decode_array +ffffffff82adc4d0 r nv_video_codecs_decode_array +ffffffff82add000 r psp_v10_0_funcs +ffffffff82ade000 r psp_v11_0_funcs +ffffffff82adf000 r psp_v11_0_8_funcs +ffffffff82ae0000 r psp_v12_0_funcs +ffffffff82ae1000 r psp_v13_0_funcs +ffffffff82ae2000 r psp_v13_0_4_funcs +ffffffff82ae3000 r psp_v3_1_funcs +ffffffff82ae4000 r sdma_v2_4_ip_funcs +ffffffff82ae40a0 R sdma_v2_4_ip_block +ffffffff82ae40b8 r sdma_v2_4_ring_funcs +ffffffff82ae41d8 r sdma_v2_4_buffer_funcs +ffffffff82ae41f8 r sdma_v2_4_vm_pte_funcs +ffffffff82ae4218 r sdma_v2_4_trap_irq_funcs +ffffffff82ae4228 r sdma_v2_4_illegal_inst_irq_funcs +ffffffff82ae4240 r iceland_mgcg_cgcg_init +ffffffff82ae4260 r golden_settings_iceland_a11 +ffffffff82ae5000 r sdma_v3_0_ip_funcs +ffffffff82ae50a0 R sdma_v3_0_ip_block +ffffffff82ae50b8 R sdma_v3_1_ip_block +ffffffff82ae50d0 r sdma_v3_0_ring_funcs +ffffffff82ae51f0 r sdma_v3_0_buffer_funcs +ffffffff82ae5210 r sdma_v3_0_vm_pte_funcs +ffffffff82ae5230 r sdma_v3_0_trap_irq_funcs +ffffffff82ae5240 r sdma_v3_0_illegal_inst_irq_funcs +ffffffff82ae5250 r fiji_mgcg_cgcg_init +ffffffff82ae5270 r golden_settings_fiji_a10 +ffffffff82ae52d0 r tonga_mgcg_cgcg_init +ffffffff82ae52f0 r golden_settings_tonga_a11 +ffffffff82ae5370 r golden_settings_polaris11_a11 +ffffffff82ae53f0 r golden_settings_polaris10_a11 +ffffffff82ae5470 r cz_mgcg_cgcg_init +ffffffff82ae5490 r cz_golden_settings_a11 +ffffffff82ae5520 r stoney_mgcg_cgcg_init +ffffffff82ae5530 r stoney_golden_settings_a11 +ffffffff82ae6000 R sdma_v4_0_ip_funcs +ffffffff82ae60a0 R sdma_v4_0_ras_hw_ops +ffffffff82ae60e0 R sdma_v4_0_ip_block +ffffffff82ae60f8 r sdma_v4_0_ring_funcs_2nd_mmhub +ffffffff82ae6218 r sdma_v4_0_ring_funcs +ffffffff82ae6338 r sdma_v4_0_page_ring_funcs_2nd_mmhub +ffffffff82ae6458 r sdma_v4_0_page_ring_funcs +ffffffff82ae6578 r sdma_v4_0_buffer_funcs +ffffffff82ae6598 r sdma_v4_0_vm_pte_funcs +ffffffff82ae65b8 r sdma_v4_0_trap_irq_funcs +ffffffff82ae65c8 r sdma_v4_0_illegal_inst_irq_funcs +ffffffff82ae65d8 r sdma_v4_0_ecc_irq_funcs +ffffffff82ae65e8 r sdma_v4_0_vm_hole_irq_funcs +ffffffff82ae65f8 r sdma_v4_0_doorbell_invalid_irq_funcs +ffffffff82ae6608 r sdma_v4_0_pool_timeout_irq_funcs +ffffffff82ae6618 r sdma_v4_0_srbm_write_irq_funcs +ffffffff82ae6630 r golden_settings_sdma_4 +ffffffff82ae6890 r golden_settings_sdma_vg10 +ffffffff82ae6940 r golden_settings_sdma_vg12 +ffffffff82ae69f0 r golden_settings_sdma0_4_2_init +ffffffff82ae6a10 r golden_settings_sdma0_4_2 +ffffffff82ae6ca0 r golden_settings_sdma1_4_2 +ffffffff82ae6f30 r golden_settings_sdma_arct +ffffffff82ae7230 r golden_settings_sdma_aldebaran +ffffffff82ae73a0 r golden_settings_sdma_4_1 +ffffffff82ae74b0 r golden_settings_sdma_rv2 +ffffffff82ae74e0 r golden_settings_sdma_rv1 +ffffffff82ae7510 r golden_settings_sdma_4_3 +ffffffff82ae7600 r sdma_v4_0_ras_fields +ffffffff82ae8000 R sdma_v4_4_ras_hw_ops +ffffffff82ae8040 r sdma_v4_4_ras_fields +ffffffff82ae9000 R sdma_v5_0_ip_funcs +ffffffff82ae90a0 R sdma_v5_0_ip_block +ffffffff82ae90b8 r sdma_v5_0_ring_funcs +ffffffff82ae91d8 r sdma_v5_0_buffer_funcs +ffffffff82ae91f8 r sdma_v5_0_vm_pte_funcs +ffffffff82ae9218 r sdma_v5_0_trap_irq_funcs +ffffffff82ae9228 r sdma_v5_0_illegal_inst_irq_funcs +ffffffff82ae9240 r golden_settings_sdma_5 +ffffffff82ae9480 r golden_settings_sdma_nv10 +ffffffff82ae94b0 r golden_settings_sdma_nv14 +ffffffff82ae94e0 r golden_settings_sdma_5_sriov +ffffffff82ae96c0 r golden_settings_sdma_nv12 +ffffffff82ae9750 r golden_settings_sdma_cyan_skillfish +ffffffff82aea000 R sdma_v5_2_ip_funcs +ffffffff82aea0a0 R sdma_v5_2_ip_block +ffffffff82aea0b8 r sdma_v5_2_ring_funcs +ffffffff82aea1d8 r sdma_v5_2_buffer_funcs +ffffffff82aea1f8 r sdma_v5_2_vm_pte_funcs +ffffffff82aea218 r sdma_v5_2_trap_irq_funcs +ffffffff82aea228 r sdma_v5_2_illegal_inst_irq_funcs +ffffffff82aeb000 R sdma_v6_0_ip_funcs +ffffffff82aeb0a0 R sdma_v6_0_ip_block +ffffffff82aeb0b8 r sdma_v6_0_ring_funcs +ffffffff82aeb1d8 r sdma_v6_0_buffer_funcs +ffffffff82aeb1f8 r sdma_v6_0_vm_pte_funcs +ffffffff82aeb218 r sdma_v6_0_trap_irq_funcs +ffffffff82aeb228 r sdma_v6_0_illegal_inst_irq_funcs +ffffffff82aec000 r smu_v11_0_i2c_algo +ffffffff82aec010 r smu_v11_0_i2c_i2c_lock_ops +ffffffff82aec028 r smu_v11_0_i2c_control_quirks +ffffffff82aed000 R smuio_v11_0_funcs +ffffffff82aee000 R smuio_v11_0_6_funcs +ffffffff82aef000 R smuio_v13_0_funcs +ffffffff82af0000 R smuio_v13_0_6_funcs +ffffffff82af1000 R smuio_v9_0_funcs +ffffffff82af2000 r soc15_common_ip_funcs +ffffffff82af20a0 R vega10_common_ip_block +ffffffff82af20b8 r soc15_asic_funcs +ffffffff82af2170 r vega20_asic_funcs +ffffffff82af2230 r soc15_allowed_read_registers +ffffffff82af23c0 r vega_video_codecs_encode +ffffffff82af23d0 r vega_video_codecs_decode +ffffffff82af23e0 r rv_video_codecs_decode +ffffffff82af23f0 r rn_video_codecs_decode +ffffffff82af2400 r vega_video_codecs_encode_array +ffffffff82af2430 r vega_video_codecs_decode_array +ffffffff82af24b0 r rv_video_codecs_decode_array +ffffffff82af2540 r rn_video_codecs_decode_array +ffffffff82af3000 r soc21_common_ip_funcs +ffffffff82af30a0 R soc21_common_ip_block +ffffffff82af30b8 r soc21_asic_funcs +ffffffff82af3170 r soc21_allowed_read_registers +ffffffff82af32f0 r vcn_4_0_0_video_codecs_encode_vcn1 +ffffffff82af3300 r vcn_4_0_0_video_codecs_decode_vcn1 +ffffffff82af3310 r vcn_4_0_0_video_codecs_encode_vcn0 +ffffffff82af3320 r vcn_4_0_0_video_codecs_decode_vcn0 +ffffffff82af3330 r vcn_4_0_0_video_codecs_encode_array_vcn1 +ffffffff82af3360 r vcn_4_0_0_video_codecs_decode_array_vcn1 +ffffffff82af33b0 r vcn_4_0_0_video_codecs_encode_array_vcn0 +ffffffff82af33e0 r vcn_4_0_0_video_codecs_decode_array_vcn0 +ffffffff82af4000 r tonga_ih_ip_funcs +ffffffff82af40a0 R tonga_ih_ip_block +ffffffff82af40b8 r tonga_ih_funcs +ffffffff82af5000 R umc_v6_0_funcs +ffffffff82af6000 R umc_v6_1_channel_idx_tbl +ffffffff82af6080 R umc_v6_1_ras_hw_ops +ffffffff82af7000 R umc_v6_7_channel_idx_tbl_second +ffffffff82af7080 R umc_v6_7_channel_idx_tbl_first +ffffffff82af7100 R umc_v6_7_ras_hw_ops +ffffffff82af8000 R umc_v8_10_channelnum_map_colbit_table +ffffffff82af8040 R umc_v8_10_channel_idx_tbl +ffffffff82af80a0 R umc_v8_10_ras_hw_ops +ffffffff82af9000 R umc_v8_7_channel_idx_tbl +ffffffff82af9040 R umc_v8_7_ras_hw_ops +ffffffff82afa000 r uvd_v5_0_ip_funcs +ffffffff82afa0a0 R uvd_v5_0_ip_block +ffffffff82afa0b8 r uvd_v5_0_ring_funcs +ffffffff82afa1d8 r uvd_v5_0_irq_funcs +ffffffff82afb000 r uvd_v6_0_ip_funcs +ffffffff82afb0a0 R uvd_v6_0_ip_block +ffffffff82afb0b8 R uvd_v6_2_ip_block +ffffffff82afb0d0 R uvd_v6_3_ip_block +ffffffff82afb0e8 r uvd_v6_0_ring_vm_funcs +ffffffff82afb208 r uvd_v6_0_ring_phys_funcs +ffffffff82afb328 r uvd_v6_0_enc_ring_vm_funcs +ffffffff82afb448 r uvd_v6_0_irq_funcs +ffffffff82afc000 R uvd_v7_0_ip_funcs +ffffffff82afc0a0 R uvd_v7_0_ip_block +ffffffff82afc0b8 r uvd_v7_0_ring_vm_funcs +ffffffff82afc1d8 r uvd_v7_0_enc_ring_vm_funcs +ffffffff82afc2f8 r uvd_v7_0_irq_funcs +ffffffff82afd000 r vce_v3_0_ip_funcs +ffffffff82afd0a0 R vce_v3_0_ip_block +ffffffff82afd0b8 R vce_v3_1_ip_block +ffffffff82afd0d0 R vce_v3_4_ip_block +ffffffff82afd0e8 r vce_v3_0_ring_vm_funcs +ffffffff82afd208 r vce_v3_0_ring_phys_funcs +ffffffff82afd328 r vce_v3_0_irq_funcs +ffffffff82afe000 R vce_v4_0_ip_funcs +ffffffff82afe0a0 R vce_v4_0_ip_block +ffffffff82afe0b8 r vce_v4_0_ring_vm_funcs +ffffffff82afe1d8 r vce_v4_0_irq_funcs +ffffffff82aff000 r vcn_v1_0_ip_funcs +ffffffff82aff0a0 R vcn_v1_0_ip_block +ffffffff82aff0b8 r vcn_v1_0_dec_ring_vm_funcs +ffffffff82aff1d8 r vcn_v1_0_enc_ring_vm_funcs +ffffffff82aff2f8 r vcn_v1_0_irq_funcs +ffffffff82b00000 r vcn_v2_0_ip_funcs +ffffffff82b000a0 R vcn_v2_0_ip_block +ffffffff82b000b8 r vcn_v2_0_dec_ring_vm_funcs +ffffffff82b001d8 r vcn_v2_0_enc_ring_vm_funcs +ffffffff82b002f8 r vcn_v2_0_irq_funcs +ffffffff82b01000 r vcn_v2_5_ip_funcs +ffffffff82b010a0 R vcn_v2_5_ip_block +ffffffff82b010b8 r vcn_v2_6_ip_funcs +ffffffff82b01158 R vcn_v2_6_ip_block +ffffffff82b01170 R vcn_v2_6_ras_hw_ops +ffffffff82b011b0 r vcn_v2_5_dec_ring_vm_funcs +ffffffff82b012d0 r vcn_v2_6_dec_ring_vm_funcs +ffffffff82b013f0 r vcn_v2_5_enc_ring_vm_funcs +ffffffff82b01510 r vcn_v2_6_enc_ring_vm_funcs +ffffffff82b01630 r vcn_v2_5_irq_funcs +ffffffff82b02000 r vcn_v3_0_ip_funcs +ffffffff82b020a0 R vcn_v3_0_ip_block +ffffffff82b020b8 r vcn_v3_0_dec_ring_vm_funcs +ffffffff82b021d8 r vcn_v3_0_enc_ring_vm_funcs +ffffffff82b022f8 r vcn_v3_0_irq_funcs +ffffffff82b03000 r vcn_v4_0_ip_funcs +ffffffff82b030a0 R vcn_v4_0_ip_block +ffffffff82b030b8 r vcn_v4_0_unified_ring_vm_funcs +ffffffff82b031d8 r vcn_v4_0_irq_funcs +ffffffff82b04000 R vega10_ih_ip_funcs +ffffffff82b040a0 R vega10_ih_ip_block +ffffffff82b040b8 r vega10_ih_funcs +ffffffff82b040d8 r vega10_ih_self_irq_funcs +ffffffff82b05000 r GC_BASE +ffffffff82b05064 r HDP_BASE +ffffffff82b050c8 r MMHUB_BASE +ffffffff82b0512c r ATHUB_BASE +ffffffff82b05190 r NBIO_BASE +ffffffff82b051f4 r MP0_BASE +ffffffff82b05258 r MP1_BASE +ffffffff82b052bc r VCE_BASE +ffffffff82b05320 r VCN_BASE +ffffffff82b05384 r DF_BASE +ffffffff82b053e8 r DCE_BASE +ffffffff82b0544c r OSSSYS_BASE +ffffffff82b054b0 r SDMA0_BASE +ffffffff82b05514 r SDMA1_BASE +ffffffff82b05578 r SMUIO_BASE +ffffffff82b055dc r PWR_BASE +ffffffff82b05640 r NBIF_BASE +ffffffff82b056a4 r THM_BASE +ffffffff82b05708 r CLK_BASE +ffffffff82b06000 R vega20_ih_ip_funcs +ffffffff82b060a0 R vega20_ih_ip_block +ffffffff82b060b8 r vega20_ih_funcs +ffffffff82b060d8 r vega20_ih_self_irq_funcs +ffffffff82b07000 r GC_BASE +ffffffff82b07090 r HDP_BASE +ffffffff82b07120 r MMHUB_BASE +ffffffff82b071b0 r ATHUB_BASE +ffffffff82b07240 r NBIO_BASE +ffffffff82b072d0 r MP0_BASE +ffffffff82b07360 r MP1_BASE +ffffffff82b073f0 r UVD_BASE +ffffffff82b07480 r VCE_BASE +ffffffff82b07510 r DF_BASE +ffffffff82b075a0 r DCE_BASE +ffffffff82b07630 r OSSSYS_BASE +ffffffff82b076c0 r SDMA0_BASE +ffffffff82b07750 r SDMA1_BASE +ffffffff82b077e0 r SMUIO_BASE +ffffffff82b07870 r THM_BASE +ffffffff82b07900 r CLK_BASE +ffffffff82b07990 r UMC_BASE +ffffffff82b07a20 r RSMU_BASE +ffffffff82b08000 r vi_common_ip_block +ffffffff82b08018 r vi_common_ip_funcs +ffffffff82b080b8 r vi_asic_funcs +ffffffff82b08170 r vi_allowed_read_registers +ffffffff82b083d0 r topaz_video_codecs_encode +ffffffff82b083e0 r topaz_video_codecs_decode +ffffffff82b083f0 r tonga_video_codecs_encode +ffffffff82b08400 r tonga_video_codecs_decode +ffffffff82b08410 r polaris_video_codecs_encode +ffffffff82b08420 r cz_video_codecs_decode +ffffffff82b08430 r tonga_video_codecs_encode_array +ffffffff82b08450 r tonga_video_codecs_decode_array +ffffffff82b084a0 r polaris_video_codecs_encode_array +ffffffff82b084d0 r cz_video_codecs_decode_array +ffffffff82b08550 r iceland_mgcg_cgcg_init +ffffffff82b08590 r fiji_mgcg_cgcg_init +ffffffff82b085f0 r tonga_mgcg_cgcg_init +ffffffff82b08650 r cz_mgcg_cgcg_init +ffffffff82b08690 r stoney_mgcg_cgcg_init +ffffffff82b09000 r amdgpu_dm_funcs +ffffffff82b090a0 R dm_ip_block +ffffffff82b090b8 R amdgpu_dm_encoder_helper_funcs +ffffffff82b09120 r dm_display_funcs +ffffffff82b09180 r hpd_disconnect_quirk_table +ffffffff82b09ef0 r amdgpu_dm_mode_funcs +ffffffff82b09f38 r amdgpu_dm_encoder_funcs +ffffffff82b09f58 r amdgpu_dm_connector_funcs +ffffffff82b09fd0 r amdgpu_dm_connector_helper_funcs +ffffffff82b0a020 r amdgpu_dm_i2c_algo +ffffffff82b0a1f0 r add_fs_modes.common_rates +ffffffff82b0a220 r amdgpu_dm_backlight_ops +ffffffff82b0b000 r amdgpu_dm_crtc_funcs +ffffffff82b0b0c0 r amdgpu_dm_crtc_helper_funcs +ffffffff82b0c000 r dm_dtn_log_begin.msg +ffffffff82b0c00d r dm_dtn_log_end.msg +ffffffff82b0c018 r SYNAPTICS_DEVICE_ID +ffffffff82b0d000 r dm_crtc_irq_funcs +ffffffff82b0d010 r dm_vline0_irq_funcs +ffffffff82b0d020 r dm_dmub_outbox_irq_funcs +ffffffff82b0d030 r dm_vupdate_irq_funcs +ffffffff82b0d040 r dm_dmub_trace_irq_funcs +ffffffff82b0d050 r dm_pageflip_irq_funcs +ffffffff82b0d060 r dm_hpd_irq_funcs +ffffffff82b0e000 r amdgpu_dm_encoder_funcs +ffffffff82b0e020 r dm_mst_cbs +ffffffff82b0e030 r dm_dp_mst_connector_funcs +ffffffff82b0e0a8 r dm_dp_mst_connector_helper_funcs +ffffffff82b0f000 r dm_plane_funcs +ffffffff82b0f068 r dm_plane_helper_funcs +ffffffff82b11000 r vbios_funcs +ffffffff82b12000 r vbios_funcs +ffffffff82b17000 r command_table_helper_funcs +ffffffff82b18000 r command_table_helper_funcs +ffffffff82b19000 r command_table_helper_funcs +ffffffff82b1a000 r command_table_helper_funcs +ffffffff82b1b000 r dce80_max_clks_by_state +ffffffff82b1b028 r disp_clk_regs +ffffffff82b1b07c r disp_clk_shift +ffffffff82b1b088 r disp_clk_mask +ffffffff82b1c000 r dce110_max_clks_by_state +ffffffff82b1c028 r disp_clk_regs +ffffffff82b1c07c r disp_clk_shift +ffffffff82b1c088 r disp_clk_mask +ffffffff82b1d000 r dce112_max_clks_by_state +ffffffff82b1d028 r disp_clk_regs +ffffffff82b1d07c r disp_clk_shift +ffffffff82b1d088 r disp_clk_mask +ffffffff82b1e000 r dce120_max_clks_by_state +ffffffff82b1f000 r clk_mgr_regs +ffffffff82b1f054 r clk_mgr_shift +ffffffff82b1f060 r clk_mgr_mask +ffffffff82b20000 r clk_mgr_regs +ffffffff82b20054 r clk_mgr_shift +ffffffff82b20060 r clk_mgr_mask +ffffffff82b21000 r clk_mgr_regs +ffffffff82b21054 r clk_mgr_shift +ffffffff82b21060 r clk_mgr_mask +ffffffff82b22000 r lpddr5_wm_table +ffffffff82b220c0 r ddr5_wm_table +ffffffff82b23000 r lpddr5_wm_table +ffffffff82b230c0 r ddr5_wm_table +ffffffff82b24000 r lpddr5_wm_table +ffffffff82b240c0 r ddr5_wm_table +ffffffff82b25000 r lpddr5_wm_table +ffffffff82b250c0 r ddr4_wm_table +ffffffff82b26000 r clk_mgr_regs_dcn321 +ffffffff82b26054 r clk_mgr_shift_dcn321 +ffffffff82b26060 r clk_mgr_mask_dcn321 +ffffffff82b26084 r clk_mgr_regs_dcn32 +ffffffff82b260d8 r clk_mgr_shift_dcn32 +ffffffff82b260e4 r clk_mgr_mask_dcn32 +ffffffff82b27000 r DC_BUILD_ID +ffffffff82b29000 r output_csc_matrix +ffffffff82b290e0 r black_color_format +ffffffff82b2a000 r DP_SINK_BRANCH_DEV_NAME_7580 +ffffffff82b2b000 r DP_VGA_DONGLE_BRANCH_DEV_NAME +ffffffff82b2b006 r DP_DVI_CONVERTER_ID_4 +ffffffff82b2b00d r DP_DVI_CONVERTER_ID_5 +ffffffff82b2c000 r DP_VGA_LVDS_CONVERTER_ID_2 +ffffffff82b2c007 r DP_VGA_LVDS_CONVERTER_ID_3 +ffffffff82b2c010 r dp_lt_fallbacks +ffffffff82b2d000 r mandatory_dpcd_partitions +ffffffff82b2f000 r dce_funcs +ffffffff82b30000 r funcs +ffffffff82b31000 R video_optimized_pixel_rates +ffffffff82b311b0 r dce110_clk_src_funcs +ffffffff82b311d8 r dce112_clk_src_funcs +ffffffff82b31200 r dcn20_clk_src_funcs +ffffffff82b31228 r dcn3_clk_src_funcs +ffffffff82b31250 r dcn31_clk_src_funcs +ffffffff82b32000 r dce_funcs +ffffffff82b32068 r dcn10_funcs +ffffffff82b320d0 r dcn20_funcs +ffffffff82b32138 r dcn21_funcs +ffffffff82b33000 r dce_ipp_funcs +ffffffff82b34000 r dce110_lnk_enc_funcs +ffffffff82b35000 r dce_mi_funcs +ffffffff82b35090 r dce112_mi_funcs +ffffffff82b35120 r dce120_mi_funcs +ffffffff82b351b0 r pte_settings +ffffffff82b36000 r funcs +ffffffff82b37000 r dce_link_panel_cntl_funcs +ffffffff82b38000 r filter_3tap_16p_upscale +ffffffff82b38040 r filter_3tap_16p_116 +ffffffff82b38080 r filter_3tap_16p_149 +ffffffff82b380c0 r filter_3tap_16p_183 +ffffffff82b38100 r filter_3tap_64p_upscale +ffffffff82b381d0 r filter_3tap_64p_116 +ffffffff82b382a0 r filter_3tap_64p_149 +ffffffff82b38370 r filter_3tap_64p_183 +ffffffff82b38440 r filter_4tap_16p_upscale +ffffffff82b38490 r filter_4tap_16p_116 +ffffffff82b384e0 r filter_4tap_16p_149 +ffffffff82b38530 r filter_4tap_16p_183 +ffffffff82b38580 r filter_4tap_64p_upscale +ffffffff82b38690 r filter_4tap_64p_116 +ffffffff82b387a0 r filter_4tap_64p_149 +ffffffff82b388b0 r filter_4tap_64p_183 +ffffffff82b389c0 r filter_5tap_64p_upscale +ffffffff82b38b10 r filter_5tap_64p_116 +ffffffff82b38c60 r filter_5tap_64p_149 +ffffffff82b38db0 r filter_5tap_64p_183 +ffffffff82b38f00 r filter_6tap_64p_upscale +ffffffff82b39090 r filter_6tap_64p_116 +ffffffff82b39220 r filter_6tap_64p_149 +ffffffff82b393b0 r filter_6tap_64p_183 +ffffffff82b39540 r filter_7tap_64p_upscale +ffffffff82b39710 r filter_7tap_64p_116 +ffffffff82b398e0 r filter_7tap_64p_149 +ffffffff82b39ab0 r filter_7tap_64p_183 +ffffffff82b39c80 r filter_8tap_64p_upscale +ffffffff82b39e90 r filter_8tap_64p_116 +ffffffff82b3a0a0 r filter_8tap_64p_149 +ffffffff82b3a2b0 r filter_8tap_64p_183 +ffffffff82b3a4c0 r filter_2tap_16p +ffffffff82b3a4f0 r filter_2tap_64p +ffffffff82b3b000 r audio_clock_info_table_48bpc +ffffffff82b3b190 r audio_clock_info_table_36bpc +ffffffff82b3b320 r audio_clock_info_table +ffffffff82b3b4e0 r dce110_str_enc_funcs +ffffffff82b3c000 r global_color_matrix +ffffffff82b3c0a8 r dce_transform_funcs +ffffffff82b3d000 r abm_funcs +ffffffff82b3e000 r psr_funcs +ffffffff82b3e040 r DP_SINK_DEVICE_STR_ID_1 +ffffffff82b3e045 r DP_SINK_DEVICE_STR_ID_2 +ffffffff82b3f000 r reg_offsets +ffffffff82b40000 r bios_regs +ffffffff82b40008 r res_cap +ffffffff82b40050 r clk_src_regs +ffffffff82b4014c r dmcu_regs +ffffffff82b401a8 r dmcu_shift +ffffffff82b401bc r dmcu_mask +ffffffff82b40208 r abm_regs +ffffffff82b40248 r abm_shift +ffffffff82b4025c r abm_mask +ffffffff82b402b0 r dce100_tg_offsets +ffffffff82b402f8 r plane_cap +ffffffff82b40328 r res_create_funcs +ffffffff82b40358 r dce100_res_pool_funcs +ffffffff82b40440 r panel_cntl_regs +ffffffff82b40460 r panel_cntl_shift +ffffffff82b40470 r panel_cntl_mask +ffffffff82b404b0 r link_enc_regs +ffffffff82b40870 r link_enc_aux_regs +ffffffff82b408c0 r link_enc_hpd_regs +ffffffff82b408d8 r link_enc_feature +ffffffff82b408e8 r cs_shift +ffffffff82b408f4 r cs_mask +ffffffff82b40920 r mi_regs +ffffffff82b40c38 r mi_shifts +ffffffff82b40c80 r mi_masks +ffffffff82b40da0 r ipp_regs +ffffffff82b40f98 r ipp_shift +ffffffff82b40fc0 r ipp_mask +ffffffff82b41060 r xfm_regs +ffffffff82b41600 r xfm_shift +ffffffff82b41660 r xfm_mask +ffffffff82b417e0 r opp_regs +ffffffff82b41930 r opp_shift +ffffffff82b4195c r opp_mask +ffffffff82b41a10 r aux_engine_regs +ffffffff82b41b00 r aux_mask +ffffffff82b41b60 r aux_shift +ffffffff82b41b80 r i2c_hw_regs +ffffffff82b41cd0 r i2c_shifts +ffffffff82b41cfc r i2c_masks +ffffffff82b41da0 r audio_regs +ffffffff82b41ed4 r audio_shift +ffffffff82b41eec r audio_mask +ffffffff82b41f30 r stream_enc_regs +ffffffff82b425dc r se_shift +ffffffff82b42660 r se_mask +ffffffff82b42864 r hwseq_reg +ffffffff82b42a80 r hwseq_shift +ffffffff82b42b00 r hwseq_mask +ffffffff82b43000 r reg_offsets +ffffffff82b43018 r dce110_compressor_funcs +ffffffff82b44000 r dce110_funcs +ffffffff82b442c0 r dce110_private_funcs +ffffffff82b45000 r dce110_mem_input_v_funcs +ffffffff82b45090 r dvmm_Hw_Setting_1DTiling +ffffffff82b45120 r dvmm_Hw_Setting_2DTiling +ffffffff82b451b0 r dvmm_Hw_Setting_Linear +ffffffff82b46000 r global_color_matrix +ffffffff82b460b0 r input_csc_matrix +ffffffff82b47000 r funcs +ffffffff82b48000 r bios_regs +ffffffff82b48008 r dce110_res_pool_funcs +ffffffff82b480f0 r clk_src_regs +ffffffff82b481ec r dmcu_regs +ffffffff82b48248 r dmcu_shift +ffffffff82b4825c r dmcu_mask +ffffffff82b482a8 r abm_regs +ffffffff82b482e8 r abm_shift +ffffffff82b482fc r abm_mask +ffffffff82b48350 r dce110_tg_offsets +ffffffff82b48398 r res_create_funcs +ffffffff82b483c8 r plane_cap +ffffffff82b483f4 r underlay_plane_cap +ffffffff82b48420 r stoney_resource_cap +ffffffff82b4845c r carrizo_resource_cap +ffffffff82b484a0 r panel_cntl_regs +ffffffff82b484c0 r panel_cntl_shift +ffffffff82b484d0 r panel_cntl_mask +ffffffff82b48510 r link_enc_regs +ffffffff82b488d0 r link_enc_aux_regs +ffffffff82b48920 r link_enc_hpd_regs +ffffffff82b48938 r link_enc_feature +ffffffff82b48948 r cs_shift +ffffffff82b48954 r cs_mask +ffffffff82b48980 r mi_regs +ffffffff82b48b0c r mi_shifts +ffffffff82b48b54 r mi_masks +ffffffff82b48c70 r ipp_regs +ffffffff82b48d6c r ipp_shift +ffffffff82b48d94 r ipp_mask +ffffffff82b48e30 r xfm_regs +ffffffff82b49100 r xfm_shift +ffffffff82b49160 r xfm_mask +ffffffff82b492e0 r opp_regs +ffffffff82b49430 r opp_shift +ffffffff82b4945c r opp_mask +ffffffff82b49510 r aux_engine_regs +ffffffff82b49600 r aux_mask +ffffffff82b49660 r aux_shift +ffffffff82b49680 r i2c_hw_regs +ffffffff82b497d0 r i2c_shifts +ffffffff82b497fc r i2c_masks +ffffffff82b498a0 r audio_regs +ffffffff82b499d4 r audio_shift +ffffffff82b499ec r audio_mask +ffffffff82b49a30 r stream_enc_regs +ffffffff82b49d0c r se_shift +ffffffff82b49d90 r se_mask +ffffffff82b49f94 r hwseq_stoney_reg +ffffffff82b4a1b0 r hwseq_cz_reg +ffffffff82b4a3cc r hwseq_shift +ffffffff82b4a44c r hwseq_mask +ffffffff82b4b000 r dce110_tg_funcs +ffffffff82b4c000 r dce110_tg_v_funcs +ffffffff82b4d000 r dce110_xfmv_funcs +ffffffff82b4e000 r reg_offsets +ffffffff82b4f000 r reg_offsets +ffffffff82b50000 r bios_regs +ffffffff82b50010 r clk_src_regs +ffffffff82b50208 r dmcu_regs +ffffffff82b50264 r dmcu_shift +ffffffff82b50278 r dmcu_mask +ffffffff82b502c4 r abm_regs +ffffffff82b50304 r abm_shift +ffffffff82b50318 r abm_mask +ffffffff82b50360 r dce112_tg_offsets +ffffffff82b503a8 r res_create_funcs +ffffffff82b503d8 r plane_cap +ffffffff82b50404 r polaris_11_resource_cap +ffffffff82b50440 r polaris_10_resource_cap +ffffffff82b50480 r dce112_res_pool_funcs +ffffffff82b50560 r panel_cntl_regs +ffffffff82b50580 r panel_cntl_shift +ffffffff82b50590 r panel_cntl_mask +ffffffff82b505d0 r link_enc_regs +ffffffff82b50990 r link_enc_aux_regs +ffffffff82b509e0 r link_enc_hpd_regs +ffffffff82b509f8 r link_enc_feature +ffffffff82b50a08 r cs_shift +ffffffff82b50a14 r cs_mask +ffffffff82b50a40 r mi_regs +ffffffff82b50d58 r mi_shifts +ffffffff82b50da0 r mi_masks +ffffffff82b50ec0 r ipp_regs +ffffffff82b510b8 r ipp_shift +ffffffff82b510e0 r ipp_mask +ffffffff82b51180 r xfm_regs +ffffffff82b51720 r xfm_shift +ffffffff82b51780 r xfm_mask +ffffffff82b51900 r opp_regs +ffffffff82b51a50 r opp_shift +ffffffff82b51a7c r opp_mask +ffffffff82b51b30 r aux_engine_regs +ffffffff82b51c20 r aux_mask +ffffffff82b51c80 r aux_shift +ffffffff82b51ca0 r i2c_hw_regs +ffffffff82b51df0 r i2c_shifts +ffffffff82b51e1c r i2c_masks +ffffffff82b51ec0 r audio_regs +ffffffff82b51fc8 r audio_shift +ffffffff82b51fe0 r audio_mask +ffffffff82b52020 r stream_enc_regs +ffffffff82b525d8 r se_shift +ffffffff82b5265c r se_mask +ffffffff82b52860 r hwseq_reg +ffffffff82b52a7c r hwseq_shift +ffffffff82b52afc r hwseq_mask +ffffffff82b53000 r bios_regs +ffffffff82b53008 r res_cap +ffffffff82b53048 r dce120_res_pool_funcs +ffffffff82b53128 r debug_defaults +ffffffff82b532a0 r clk_src_regs +ffffffff82b53498 r dmcu_regs +ffffffff82b534f4 r dmcu_shift +ffffffff82b53508 r dmcu_mask +ffffffff82b53554 r abm_regs +ffffffff82b53594 r abm_shift +ffffffff82b535a8 r abm_mask +ffffffff82b535f0 r dce120_tg_offsets +ffffffff82b53638 r dce121_res_create_funcs +ffffffff82b53668 r res_create_funcs +ffffffff82b53698 r plane_cap +ffffffff82b536d0 r panel_cntl_regs +ffffffff82b536f0 r panel_cntl_shift +ffffffff82b53700 r panel_cntl_mask +ffffffff82b53740 r link_enc_regs +ffffffff82b53b00 r link_enc_aux_regs +ffffffff82b53b50 r link_enc_hpd_regs +ffffffff82b53b68 r link_enc_feature +ffffffff82b53b78 r cs_shift +ffffffff82b53b84 r cs_mask +ffffffff82b53bb0 r mi_regs +ffffffff82b53ec8 r mi_shifts +ffffffff82b53f10 r mi_masks +ffffffff82b54030 r ipp_regs +ffffffff82b54228 r ipp_shift +ffffffff82b54250 r ipp_mask +ffffffff82b542f0 r xfm_regs +ffffffff82b54890 r xfm_shift +ffffffff82b548f0 r xfm_mask +ffffffff82b54a70 r opp_regs +ffffffff82b54bc0 r opp_shift +ffffffff82b54bec r opp_mask +ffffffff82b54ca0 r aux_engine_regs +ffffffff82b54d90 r aux_mask +ffffffff82b54df0 r aux_shift +ffffffff82b54e10 r i2c_hw_regs +ffffffff82b54f60 r i2c_shifts +ffffffff82b54f8c r i2c_masks +ffffffff82b55030 r audio_regs +ffffffff82b55164 r audio_shift +ffffffff82b5517c r audio_mask +ffffffff82b551c0 r stream_enc_regs +ffffffff82b55778 r se_shift +ffffffff82b557fc r se_mask +ffffffff82b55a00 r dce121_hwseq_reg +ffffffff82b55c1c r dce121_hwseq_shift +ffffffff82b55c9c r dce121_hwseq_mask +ffffffff82b55e90 r hwseq_reg +ffffffff82b560ac r hwseq_shift +ffffffff82b5612c r hwseq_mask +ffffffff82b57000 r dce120_tg_funcs +ffffffff82b58000 r bios_regs +ffffffff82b58008 r res_cap +ffffffff82b58048 r dce80_res_pool_funcs +ffffffff82b58130 r clk_src_regs +ffffffff82b5822c r dmcu_regs +ffffffff82b58288 r dmcu_shift +ffffffff82b5829c r dmcu_mask +ffffffff82b582e8 r abm_regs +ffffffff82b58328 r abm_shift +ffffffff82b5833c r abm_mask +ffffffff82b58390 r dce80_tg_offsets +ffffffff82b583d8 r plane_cap +ffffffff82b58408 r res_create_funcs +ffffffff82b58440 r panel_cntl_regs +ffffffff82b58460 r panel_cntl_shift +ffffffff82b58470 r panel_cntl_mask +ffffffff82b584b0 r link_enc_regs +ffffffff82b58870 r link_enc_aux_regs +ffffffff82b588c0 r link_enc_hpd_regs +ffffffff82b588d8 r link_enc_feature +ffffffff82b588e8 r cs_shift +ffffffff82b588f4 r cs_mask +ffffffff82b58920 r mi_regs +ffffffff82b58c38 r mi_shifts +ffffffff82b58c80 r mi_masks +ffffffff82b58da0 r ipp_regs +ffffffff82b58f98 r ipp_shift +ffffffff82b58fc0 r ipp_mask +ffffffff82b59060 r xfm_regs +ffffffff82b59600 r xfm_shift +ffffffff82b59660 r xfm_mask +ffffffff82b597e0 r opp_regs +ffffffff82b59930 r opp_shift +ffffffff82b5995c r opp_mask +ffffffff82b59a10 r aux_engine_regs +ffffffff82b59b00 r aux_mask +ffffffff82b59b60 r aux_shift +ffffffff82b59b80 r i2c_hw_regs +ffffffff82b59cd0 r i2c_shifts +ffffffff82b59cfc r i2c_masks +ffffffff82b59da0 r audio_regs +ffffffff82b59ed4 r audio_shift +ffffffff82b59eec r audio_mask +ffffffff82b59f30 r stream_enc_regs +ffffffff82b5a5dc r se_shift +ffffffff82b5a660 r se_mask +ffffffff82b5a864 r hwseq_reg +ffffffff82b5aa80 r hwseq_shift +ffffffff82b5ab00 r hwseq_mask +ffffffff82b5acf4 r res_cap_81 +ffffffff82b5ad30 r res_cap_83 +ffffffff82b5b000 r reg_offsets +ffffffff82b5b048 r dce80_tg_funcs +ffffffff82b5c000 r dcn10_dpp_funcs +ffffffff82b5d000 r dpp_input_csc_matrix +ffffffff82b5f000 r hubbub1_funcs +ffffffff82b60000 r dcn10_hubp_funcs +ffffffff82b61000 r reduceSizeAndFraction.prime_numbers +ffffffff82b63000 r dcn10_funcs +ffffffff82b632c0 r dcn10_private_funcs +ffffffff82b64000 r dcn10_ipp_funcs +ffffffff82b64048 r dcn20_ipp_funcs +ffffffff82b65000 r dcn10_lnk_enc_funcs +ffffffff82b66000 r dcn10_mpc_funcs +ffffffff82b67000 r dcn10_opp_funcs +ffffffff82b68000 r dcn10_tg_funcs +ffffffff82b69000 r bios_regs +ffffffff82b69008 r rv2_res_cap +ffffffff82b69044 r res_cap +ffffffff82b69080 r debug_defaults_drv +ffffffff82b691f8 r debug_defaults_diags +ffffffff82b69370 r clk_src_regs +ffffffff82b694c0 r dmcu_regs +ffffffff82b6951c r dmcu_shift +ffffffff82b69530 r dmcu_mask +ffffffff82b6957c r abm_regs +ffffffff82b695bc r abm_shift +ffffffff82b695d0 r abm_mask +ffffffff82b69618 r res_create_funcs +ffffffff82b69648 r res_create_maximus_funcs +ffffffff82b69678 r plane_cap +ffffffff82b696a8 r dcn10_res_pool_funcs +ffffffff82b69790 r panel_cntl_regs +ffffffff82b697b0 r panel_cntl_shift +ffffffff82b697c0 r panel_cntl_mask +ffffffff82b69800 r link_enc_regs +ffffffff82b69d10 r link_enc_aux_regs +ffffffff82b69d50 r link_enc_hpd_regs +ffffffff82b69d60 r le_shift +ffffffff82b69e50 r le_mask +ffffffff82b6a208 r link_enc_feature +ffffffff82b6a218 r cs_shift +ffffffff82b6a224 r cs_mask +ffffffff82b6a250 r hubp_regs +ffffffff82b6a900 r hubp_shift +ffffffff82b6a9c4 r hubp_mask +ffffffff82b6acd0 r ipp_regs +ffffffff82b6adb0 r ipp_shift +ffffffff82b6adcc r ipp_mask +ffffffff82b6ae40 r tf_regs +ffffffff82b6bda0 r tf_shift +ffffffff82b6c008 r tf_mask +ffffffff82b6c9a0 r opp_regs +ffffffff82b6ca70 r opp_shift +ffffffff82b6ca90 r opp_mask +ffffffff82b6cb10 r tg_regs +ffffffff82b6d010 r tg_shift +ffffffff82b6d0d0 r tg_mask +ffffffff82b6d3d0 r aux_engine_regs +ffffffff82b6d4c0 r aux_mask +ffffffff82b6d520 r aux_shift +ffffffff82b6d540 r i2c_hw_regs +ffffffff82b6d690 r i2c_shifts +ffffffff82b6d6bc r i2c_masks +ffffffff82b6d760 r mpc_regs +ffffffff82b6d880 r mpc_shift +ffffffff82b6d898 r mpc_mask +ffffffff82b6d8f4 r hubbub_reg +ffffffff82b6da68 r hubbub_shift +ffffffff82b6daf0 r hubbub_mask +ffffffff82b6dd10 r audio_regs +ffffffff82b6ddc0 r audio_shift +ffffffff82b6ddd8 r audio_mask +ffffffff82b6de20 r stream_enc_regs +ffffffff82b6e370 r se_shift +ffffffff82b6e44c r se_mask +ffffffff82b6e7b8 r hwseq_reg +ffffffff82b6e9d4 r hwseq_shift +ffffffff82b6ea54 r hwseq_mask +ffffffff82b6f000 r audio_clock_info_table_48bpc +ffffffff82b6f190 r audio_clock_info_table_36bpc +ffffffff82b6f320 r audio_clock_info_table +ffffffff82b6f4e0 r dcn10_str_enc_funcs +ffffffff82b70000 r dccg2_funcs +ffffffff82b72000 r dpp_input_csc_matrix +ffffffff82b73000 R dcn20_dsc_funcs +ffffffff82b74000 R dcn20_dwbc_funcs +ffffffff82b75000 r filter_12tap_16p_upscale +ffffffff82b750e0 r filter_12tap_16p_117 +ffffffff82b751c0 r filter_12tap_16p_150 +ffffffff82b752a0 r filter_12tap_16p_183 +ffffffff82b75380 r filter_11tap_16p_upscale +ffffffff82b75450 r filter_11tap_16p_117 +ffffffff82b75520 r filter_11tap_16p_150 +ffffffff82b755f0 r filter_11tap_16p_183 +ffffffff82b756c0 r filter_10tap_16p_upscale +ffffffff82b75780 r filter_10tap_16p_117 +ffffffff82b75840 r filter_10tap_16p_150 +ffffffff82b75900 r filter_10tap_16p_183 +ffffffff82b759c0 r filter_9tap_16p_upscale +ffffffff82b75a70 r filter_9tap_16p_117 +ffffffff82b75b20 r filter_9tap_16p_150 +ffffffff82b75bd0 r filter_9tap_16p_183 +ffffffff82b75c80 r filter_8tap_16p_upscale +ffffffff82b75d10 r filter_8tap_16p_117 +ffffffff82b75da0 r filter_8tap_16p_150 +ffffffff82b75e30 r filter_8tap_16p_183 +ffffffff82b75ec0 r filter_7tap_16p_upscale +ffffffff82b75f40 r filter_7tap_16p_117 +ffffffff82b75fc0 r filter_7tap_16p_150 +ffffffff82b76040 r filter_7tap_16p_183 +ffffffff82b760c0 r filter_6tap_16p_upscale +ffffffff82b76130 r filter_6tap_16p_117 +ffffffff82b761a0 r filter_6tap_16p_150 +ffffffff82b76210 r filter_6tap_16p_183 +ffffffff82b76280 r filter_5tap_16p_upscale +ffffffff82b762e0 r filter_5tap_16p_117 +ffffffff82b76340 r filter_5tap_16p_150 +ffffffff82b763a0 r filter_5tap_16p_183 +ffffffff82b76400 r filter_4tap_16p_upscale +ffffffff82b76450 r filter_4tap_16p_117 +ffffffff82b764a0 r filter_4tap_16p_150 +ffffffff82b764f0 r filter_4tap_16p_183 +ffffffff82b76540 r filter_3tap_16p_upscale +ffffffff82b76580 r filter_3tap_16p_117 +ffffffff82b765c0 r filter_3tap_16p_150 +ffffffff82b76600 r filter_3tap_16p_183 +ffffffff82b77000 r hubbub2_funcs +ffffffff82b78000 r dcn20_funcs +ffffffff82b782c0 r dcn20_private_funcs +ffffffff82b79000 r dcn2_mpll_cfg +ffffffff82b79190 r dcn20_link_enc_funcs +ffffffff82b7a000 R dcn20_mmhubbub_funcs +ffffffff82b7b000 R dcn20_mpc_funcs +ffffffff82b7c000 r tf_regs +ffffffff82b7d920 r tf_shift +ffffffff82b7dba4 r tf_mask +ffffffff82b7e5c0 r ipp_regs +ffffffff82b7e710 r ipp_shift +ffffffff82b7e72c r ipp_mask +ffffffff82b7e7a0 r opp_regs +ffffffff82b7e9b0 r opp_shift +ffffffff82b7e9e8 r opp_mask +ffffffff82b7eac0 r aux_engine_regs +ffffffff82b7ebb0 r aux_mask +ffffffff82b7ec10 r aux_shift +ffffffff82b7ec30 r i2c_hw_regs +ffffffff82b7ed80 r i2c_shifts +ffffffff82b7edac r i2c_masks +ffffffff82b7ee50 r mpc_regs +ffffffff82b7f398 r mpc_shift +ffffffff82b7f3e0 r mpc_mask +ffffffff82b7f4f4 r hubbub_reg +ffffffff82b7f668 r hubbub_shift +ffffffff82b7f6f0 r hubbub_mask +ffffffff82b7f90c r res_cap_nv10 +ffffffff82b7f950 r vmid_regs +ffffffff82b7fb10 r vmid_shifts +ffffffff82b7fb18 r vmid_masks +ffffffff82b7fb40 r tg_regs +ffffffff82b802c0 r tg_shift +ffffffff82b80380 r tg_mask +ffffffff82b80680 r link_enc_regs +ffffffff82b80e20 r link_enc_aux_regs +ffffffff82b80e80 r link_enc_hpd_regs +ffffffff82b80e98 r le_shift +ffffffff82b80f88 r le_mask +ffffffff82b81340 r stream_enc_regs +ffffffff82b81b38 r se_shift +ffffffff82b81c14 r se_mask +ffffffff82b81f80 r hwseq_reg +ffffffff82b8219c r hwseq_shift +ffffffff82b8221c r hwseq_mask +ffffffff82b82410 r dsc_regs +ffffffff82b828a8 r dsc_shift +ffffffff82b82960 r dsc_mask +ffffffff82b82c40 r hubp_regs +ffffffff82b83888 r hubp_shift +ffffffff82b83984 r hubp_mask +ffffffff82b83d80 r dwbc20_regs +ffffffff82b83e38 r dwbc20_shift +ffffffff82b83eb8 r dwbc20_mask +ffffffff82b840b0 r mcif_wb20_regs +ffffffff82b84190 r mcif_wb20_shift +ffffffff82b84230 r mcif_wb20_mask +ffffffff82b844b0 r link_enc_feature +ffffffff82b844c0 r bios_regs +ffffffff82b844c8 r dcn20_res_pool_funcs +ffffffff82b845a8 r res_cap_nv14 +ffffffff82b845e8 r debug_defaults_drv +ffffffff82b84760 r debug_defaults_diags +ffffffff82b848e0 r clk_src_regs +ffffffff82b84ad8 r dccg_regs +ffffffff82b84bc4 r dccg_shift +ffffffff82b84c5c r dccg_mask +ffffffff82b84eb8 r dmcu_regs +ffffffff82b84f14 r dmcu_shift +ffffffff82b84f28 r dmcu_mask +ffffffff82b84f74 r abm_regs +ffffffff82b84fb4 r abm_shift +ffffffff82b84fc8 r abm_mask +ffffffff82b85010 r res_create_funcs +ffffffff82b85040 r res_create_maximus_funcs +ffffffff82b85070 r plane_cap +ffffffff82b850a0 r panel_cntl_regs +ffffffff82b850c0 r panel_cntl_shift +ffffffff82b850d0 r panel_cntl_mask +ffffffff82b8510c r cs_shift +ffffffff82b85118 r cs_mask +ffffffff82b85140 r audio_regs +ffffffff82b85274 r audio_shift +ffffffff82b8528c r audio_mask +ffffffff82b86000 r dcn20_str_enc_funcs +ffffffff82b87000 r dccg201_funcs +ffffffff82b88000 r hubbub201_funcs +ffffffff82b89000 r dcn201_funcs +ffffffff82b892c0 r dcn201_private_funcs +ffffffff82b8a000 r dcn201_link_enc_funcs +ffffffff82b8b000 R dcn201_mpc_funcs +ffffffff82b8c000 r bios_regs +ffffffff82b8c008 r res_cap_dnc201 +ffffffff82b8c048 r debug_defaults_drv +ffffffff82b8c1c0 r clk_src_regs +ffffffff82b8c268 r dccg_regs +ffffffff82b8c354 r dccg_shift +ffffffff82b8c3ec r dccg_mask +ffffffff82b8c648 r res_create_funcs +ffffffff82b8c678 r res_create_maximus_funcs +ffffffff82b8c6a8 r plane_cap +ffffffff82b8c6e0 r link_enc_regs +ffffffff82b8c970 r link_enc_aux_regs +ffffffff82b8c990 r link_enc_hpd_regs +ffffffff82b8c998 r le_shift +ffffffff82b8ca88 r le_mask +ffffffff82b8ce40 r link_enc_feature +ffffffff82b8ce50 r cs_shift +ffffffff82b8ce5c r cs_mask +ffffffff82b8ce90 r hubp_regs +ffffffff82b8d620 r hubp_shift +ffffffff82b8d6f8 r hubp_mask +ffffffff82b8da60 r ipp_regs +ffffffff82b8db40 r ipp_shift +ffffffff82b8db5c r ipp_mask +ffffffff82b8dbd0 r tf_regs +ffffffff82b8ec10 r tf_shift +ffffffff82b8ee94 r tf_mask +ffffffff82b8f8b0 r opp_regs +ffffffff82b8f960 r opp_shift +ffffffff82b8f998 r opp_mask +ffffffff82b8fa70 r aux_engine_regs +ffffffff82b8fac0 r aux_mask +ffffffff82b8fb20 r aux_shift +ffffffff82b8fb40 r i2c_hw_regs +ffffffff82b8fbb0 r i2c_shifts +ffffffff82b8fbdc r i2c_masks +ffffffff82b8fc80 r tg_regs +ffffffff82b8ff00 r tg_shift +ffffffff82b8ffc0 r tg_mask +ffffffff82b902c0 r mpc_regs +ffffffff82b90808 r mpc_shift +ffffffff82b90854 r mpc_mask +ffffffff82b9097c r hubbub_reg +ffffffff82b90af0 r hubbub_shift +ffffffff82b90b78 r hubbub_mask +ffffffff82b90da0 r audio_regs +ffffffff82b90df8 r audio_shift +ffffffff82b90e10 r audio_mask +ffffffff82b90e50 r stream_enc_regs +ffffffff82b910f8 r se_shift +ffffffff82b911d4 r se_mask +ffffffff82b91540 r hwseq_reg +ffffffff82b9175c r hwseq_shift +ffffffff82b917dc r hwseq_mask +ffffffff82b92000 r dccg21_funcs +ffffffff82b93000 r hubbub21_funcs +ffffffff82b94000 r dcn21_funcs +ffffffff82b942c0 r dcn21_private_funcs +ffffffff82b95000 r dcn21_mpll_cfg_ref +ffffffff82b95190 r dcn21_link_enc_funcs +ffffffff82b96000 r bios_regs +ffffffff82b96008 r res_cap_rn +ffffffff82b96048 r dcn21_res_pool_funcs +ffffffff82b96128 r debug_defaults_drv +ffffffff82b962a0 r debug_defaults_diags +ffffffff82b96420 r clk_src_regs +ffffffff82b965c4 r dccg_regs +ffffffff82b966b0 r dccg_shift +ffffffff82b96748 r dccg_mask +ffffffff82b969a4 r dmcu_regs +ffffffff82b96a00 r dmcu_shift +ffffffff82b96a14 r dmcu_mask +ffffffff82b96a60 r abm_regs +ffffffff82b96aa0 r abm_shift +ffffffff82b96ab4 r abm_mask +ffffffff82b96b00 r res_create_funcs +ffffffff82b96b30 r res_create_maximus_funcs +ffffffff82b96b60 r plane_cap +ffffffff82b96b90 r panel_cntl_regs +ffffffff82b96bb0 r panel_cntl_shift +ffffffff82b96bc0 r panel_cntl_mask +ffffffff82b96c00 r link_enc_regs +ffffffff82b97260 r link_enc_aux_regs +ffffffff82b972b0 r link_enc_hpd_regs +ffffffff82b972c4 r le_shift +ffffffff82b973b4 r le_mask +ffffffff82b9776c r link_enc_feature +ffffffff82b9777c r panel_config_defaults +ffffffff82b977b0 r cs_shift +ffffffff82b977bc r cs_mask +ffffffff82b977f0 r hubp_regs +ffffffff82b98020 r hubp_shift +ffffffff82b9811c r hubp_mask +ffffffff82b98510 r ipp_regs +ffffffff82b985f0 r ipp_shift +ffffffff82b9860c r ipp_mask +ffffffff82b98680 r tf_regs +ffffffff82b99740 r tf_shift +ffffffff82b999c4 r tf_mask +ffffffff82b9a3e0 r opp_regs +ffffffff82b9a5f0 r opp_shift +ffffffff82b9a628 r opp_mask +ffffffff82b9a700 r tg_regs +ffffffff82b9ac00 r tg_shift +ffffffff82b9acc0 r tg_mask +ffffffff82b9afc0 r aux_engine_regs +ffffffff82b9b088 r aux_mask +ffffffff82b9b0e8 r aux_shift +ffffffff82b9b100 r i2c_hw_regs +ffffffff82b9b218 r i2c_shifts +ffffffff82b9b244 r i2c_masks +ffffffff82b9b2e8 r mpc_regs +ffffffff82b9b830 r mpc_shift +ffffffff82b9b878 r mpc_mask +ffffffff82b9b98c r hubbub_reg +ffffffff82b9bb00 r hubbub_shift +ffffffff82b9bb88 r hubbub_mask +ffffffff82b9bdb0 r vmid_regs +ffffffff82b9bf70 r vmid_shifts +ffffffff82b9bf78 r vmid_masks +ffffffff82b9bfa0 r dsc_regs +ffffffff82b9c438 r dsc_shift +ffffffff82b9c4f0 r dsc_mask +ffffffff82b9c7d0 r audio_regs +ffffffff82b9c8d8 r audio_shift +ffffffff82b9c8f0 r audio_mask ffffffff82b9c930 r stream_enc_regs -ffffffff82b9ce80 r se_shift -ffffffff82b9cf5c r se_mask -ffffffff82b9d2d0 r vpg_regs -ffffffff82b9d320 r vpg_shift -ffffffff82b9d348 r vpg_mask -ffffffff82b9d3e0 r afmt_regs -ffffffff82b9d470 r afmt_shift -ffffffff82b9d484 r afmt_mask -ffffffff82b9d4c8 r hwseq_reg -ffffffff82b9d6e4 r hwseq_shift -ffffffff82b9d764 r hwseq_mask -ffffffff82b9e000 r bios_regs -ffffffff82b9e008 r res_cap_dcn302 -ffffffff82b9e048 r debug_defaults_drv -ffffffff82b9e1c0 r debug_defaults_diags -ffffffff82b9e340 r clk_src_regs -ffffffff82b9e4e4 r dccg_regs -ffffffff82b9e5d0 r dccg_shift -ffffffff82b9e668 r dccg_mask -ffffffff82b9e8d0 r abm_regs -ffffffff82b9ea10 r abm_shift -ffffffff82b9ea24 r abm_mask -ffffffff82b9ea70 r res_create_funcs -ffffffff82b9eaa0 r res_create_maximus_funcs -ffffffff82b9ead0 r plane_cap -ffffffff82b9eb00 r panel_cntl_regs -ffffffff82b9eb20 r panel_cntl_shift -ffffffff82b9eb30 r panel_cntl_mask -ffffffff82b9eb70 r link_enc_regs -ffffffff82b9f1d0 r link_enc_aux_regs -ffffffff82b9f220 r link_enc_hpd_regs -ffffffff82b9f234 r le_shift -ffffffff82b9f324 r le_mask -ffffffff82b9f6dc r link_enc_feature -ffffffff82b9f6ec r cs_shift -ffffffff82b9f6f8 r cs_mask -ffffffff82b9f720 r hubbub_reg -ffffffff82b9f894 r hubbub_shift -ffffffff82b9f91c r hubbub_mask -ffffffff82b9fb40 r vmid_regs -ffffffff82b9fd00 r vmid_shifts -ffffffff82b9fd08 r vmid_masks -ffffffff82b9fd30 r hubp_regs -ffffffff82ba076c r hubp_shift -ffffffff82ba0868 r hubp_mask -ffffffff82ba0c60 r dpp_regs -ffffffff82ba26a0 r tf_shift -ffffffff82ba2970 r tf_mask -ffffffff82ba34b0 r opp_regs -ffffffff82ba3668 r opp_shift -ffffffff82ba36a0 r opp_mask -ffffffff82ba3780 r optc_regs -ffffffff82ba3dc0 r optc_shift -ffffffff82ba3e80 r optc_mask -ffffffff82ba4180 r mpc_regs -ffffffff82ba596c r mpc_shift -ffffffff82ba5a48 r mpc_mask -ffffffff82ba5dc0 r dsc_regs -ffffffff82ba6194 r dsc_shift -ffffffff82ba624c r dsc_mask -ffffffff82ba6530 r dwbc30_regs -ffffffff82ba670c r dwbc30_shift -ffffffff82ba6840 r dwbc30_mask -ffffffff82ba6d10 r mcif_wb30_regs -ffffffff82ba6e0c r mcif_wb30_shift -ffffffff82ba6eb8 r mcif_wb30_mask -ffffffff82ba7170 r aux_engine_regs -ffffffff82ba7238 r aux_mask -ffffffff82ba7298 r aux_shift -ffffffff82ba72b0 r i2c_hw_regs -ffffffff82ba73c8 r i2c_shifts -ffffffff82ba73f4 r i2c_masks -ffffffff82ba74a0 r audio_regs -ffffffff82ba75d4 r audio_shift -ffffffff82ba75ec r audio_mask -ffffffff82ba7630 r stream_enc_regs -ffffffff82ba7cd4 r se_shift -ffffffff82ba7db0 r se_mask -ffffffff82ba8120 r vpg_regs -ffffffff82ba8198 r vpg_shift -ffffffff82ba81c0 r vpg_mask -ffffffff82ba8260 r afmt_regs -ffffffff82ba8338 r afmt_shift -ffffffff82ba834c r afmt_mask -ffffffff82ba8390 r hwseq_reg -ffffffff82ba85ac r hwseq_shift -ffffffff82ba862c r hwseq_mask -ffffffff82ba9000 r bios_regs -ffffffff82ba9008 r res_cap_dcn303 -ffffffff82ba9048 r debug_defaults_drv -ffffffff82ba91c0 r debug_defaults_diags -ffffffff82ba9340 r clk_src_regs -ffffffff82ba93e8 r dccg_regs -ffffffff82ba94d4 r dccg_shift -ffffffff82ba956c r dccg_mask -ffffffff82ba97d0 r abm_regs -ffffffff82ba9850 r abm_shift -ffffffff82ba9864 r abm_mask -ffffffff82ba98b0 r res_create_funcs -ffffffff82ba98e0 r res_create_maximus_funcs -ffffffff82ba9910 r plane_cap -ffffffff82ba9940 r panel_cntl_regs -ffffffff82ba9960 r panel_cntl_shift -ffffffff82ba9970 r panel_cntl_mask -ffffffff82ba99b0 r link_enc_regs -ffffffff82ba9c40 r link_enc_aux_regs -ffffffff82ba9c60 r link_enc_hpd_regs -ffffffff82ba9c68 r le_shift -ffffffff82ba9d58 r le_mask -ffffffff82baa110 r link_enc_feature -ffffffff82baa120 r cs_shift -ffffffff82baa12c r cs_mask -ffffffff82baa154 r hubbub_reg -ffffffff82baa2c8 r hubbub_shift -ffffffff82baa350 r hubbub_mask -ffffffff82baa570 r vmid_regs -ffffffff82baa730 r vmid_shifts -ffffffff82baa738 r vmid_masks -ffffffff82baa760 r hubp_regs -ffffffff82baab78 r hubp_shift -ffffffff82baac74 r hubp_mask -ffffffff82bab070 r dpp_regs -ffffffff82babaf0 r tf_shift -ffffffff82babdc0 r tf_mask -ffffffff82bac900 r opp_regs -ffffffff82bac9b0 r opp_shift -ffffffff82bac9e8 r opp_mask -ffffffff82bacac0 r optc_regs -ffffffff82bacd40 r optc_shift -ffffffff82bace00 r optc_mask -ffffffff82bad100 r mpc_regs -ffffffff82bae8ec r mpc_shift -ffffffff82bae9c8 r mpc_mask -ffffffff82baed40 r dsc_regs -ffffffff82baeec8 r dsc_shift -ffffffff82baef80 r dsc_mask -ffffffff82baf260 r dwbc30_regs -ffffffff82baf43c r dwbc30_shift -ffffffff82baf570 r dwbc30_mask -ffffffff82bafa40 r mcif_wb30_regs -ffffffff82bafb3c r mcif_wb30_shift -ffffffff82bafbe8 r mcif_wb30_mask -ffffffff82bafea0 r aux_engine_regs -ffffffff82bafef0 r aux_mask -ffffffff82baff50 r aux_shift -ffffffff82baff70 r i2c_hw_regs -ffffffff82baffe0 r i2c_shifts -ffffffff82bb000c r i2c_masks -ffffffff82bb00b0 r audio_regs -ffffffff82bb01e4 r audio_shift -ffffffff82bb01fc r audio_mask -ffffffff82bb0240 r stream_enc_regs -ffffffff82bb04e8 r se_shift -ffffffff82bb05c4 r se_mask -ffffffff82bb0930 r vpg_regs -ffffffff82bb096c r vpg_shift -ffffffff82bb0994 r vpg_mask -ffffffff82bb0a30 r afmt_regs -ffffffff82bb0a9c r afmt_shift -ffffffff82bb0ab0 r afmt_mask -ffffffff82bb0af4 r hwseq_reg -ffffffff82bb0d10 r hwseq_shift -ffffffff82bb0d90 r hwseq_mask -ffffffff82bb1000 r dccg31_funcs -ffffffff82bb2000 r dcn31_link_enc_funcs -ffffffff82bb3000 r dcn30_str_enc_funcs -ffffffff82bb4000 r hubbub31_funcs -ffffffff82bb5000 r dcn31_funcs -ffffffff82bb52c0 r dcn31_private_funcs -ffffffff82bb6000 r dcn31_link_panel_cntl_funcs -ffffffff82bb7000 r bios_regs -ffffffff82bb7008 r res_cap_dcn31 -ffffffff82bb7048 r debug_defaults_diags -ffffffff82bb71c0 r clk_src_regs -ffffffff82bb7370 r clk_src_regs_b0 -ffffffff82bb7514 r dccg_regs -ffffffff82bb7600 r dccg_shift -ffffffff82bb7698 r dccg_mask -ffffffff82bb7900 r abm_regs -ffffffff82bb7a00 r abm_shift -ffffffff82bb7a14 r abm_mask -ffffffff82bb7a60 r res_create_funcs -ffffffff82bb7a90 r res_create_maximus_funcs -ffffffff82bb7ac0 r plane_cap -ffffffff82bb7af0 r link_enc_regs -ffffffff82bb8150 r link_enc_aux_regs -ffffffff82bb81a0 r link_enc_hpd_regs -ffffffff82bb81b4 r le_shift -ffffffff82bb82a4 r le_mask -ffffffff82bb865c r link_enc_feature -ffffffff82bb866c r panel_config_defaults -ffffffff82bb86a0 r debug_defaults_drv -ffffffff82bb8818 r cs_shift -ffffffff82bb8824 r cs_mask -ffffffff82bb884c r hubbub_reg -ffffffff82bb89c0 r hubbub_shift -ffffffff82bb8a48 r hubbub_mask -ffffffff82bb8c70 r vmid_regs -ffffffff82bb8e30 r vmid_shifts -ffffffff82bb8e38 r vmid_masks -ffffffff82bb8e60 r hubp_regs -ffffffff82bb9690 r hubp_shift -ffffffff82bb978c r hubp_mask -ffffffff82bb9b80 r dpp_regs -ffffffff82bbb080 r tf_shift -ffffffff82bbb350 r tf_mask -ffffffff82bbbe90 r opp_regs -ffffffff82bbbff0 r opp_shift -ffffffff82bbc028 r opp_mask -ffffffff82bbc100 r optc_regs -ffffffff82bbc600 r optc_shift -ffffffff82bbc6c0 r optc_mask -ffffffff82bbc9c0 r mpc_regs -ffffffff82bbe1ac r mpc_shift -ffffffff82bbe288 r mpc_mask -ffffffff82bbe600 r dsc_regs -ffffffff82bbe84c r dsc_shift -ffffffff82bbe904 r dsc_mask -ffffffff82bbebe0 r dwbc30_regs -ffffffff82bbedbc r dwbc30_shift -ffffffff82bbeef0 r dwbc30_mask -ffffffff82bbf3c0 r mcif_wb30_regs -ffffffff82bbf4bc r mcif_wb30_shift -ffffffff82bbf568 r mcif_wb30_mask -ffffffff82bbf820 r aux_engine_regs -ffffffff82bbf8e8 r aux_mask -ffffffff82bbf948 r aux_shift -ffffffff82bbf960 r i2c_hw_regs -ffffffff82bbfa78 r i2c_shifts -ffffffff82bbfaa4 r i2c_masks -ffffffff82bbfb50 r audio_regs -ffffffff82bbfc84 r audio_shift -ffffffff82bbfc9c r audio_mask -ffffffff82bbfcd8 r se_shift -ffffffff82bbfdb4 r se_mask -ffffffff82bc0120 r vpg_regs -ffffffff82bc0210 r vpg_shift -ffffffff82bc0238 r vpg_mask -ffffffff82bc02e0 r afmt_regs -ffffffff82bc03b8 r afmt_shift -ffffffff82bc03cc r afmt_mask -ffffffff82bc0420 r stream_enc_regs -ffffffff82bc1ac0 r hpo_dp_stream_enc_regs -ffffffff82bc1cf0 r hpo_dp_se_shift -ffffffff82bc1d18 r hpo_dp_se_mask -ffffffff82bc1dc0 r apg_regs -ffffffff82bc1e00 r apg_shift -ffffffff82bc1e08 r apg_mask -ffffffff82bc1e20 r hpo_dp_link_enc_regs -ffffffff82bc1f30 r hpo_dp_le_shift -ffffffff82bc1f4c r hpo_dp_le_mask -ffffffff82bc1fb0 r hwseq_reg -ffffffff82bc21cc r hwseq_shift -ffffffff82bc224c r hwseq_mask -ffffffff82bc3000 r dccg314_funcs -ffffffff82bc4000 r dcn314_str_enc_funcs -ffffffff82bc5000 r dcn314_funcs -ffffffff82bc52c0 r dcn314_private_funcs -ffffffff82bc6000 r bios_regs -ffffffff82bc6008 r res_cap_dcn314 -ffffffff82bc6048 r debug_defaults_diags -ffffffff82bc61c0 r clk_src_regs -ffffffff82bc6364 r dccg_regs -ffffffff82bc6450 r dccg_shift -ffffffff82bc64e8 r dccg_mask -ffffffff82bc6750 r abm_regs -ffffffff82bc6850 r abm_shift -ffffffff82bc6864 r abm_mask -ffffffff82bc68b0 r res_create_funcs -ffffffff82bc68e0 r res_create_maximus_funcs -ffffffff82bc6910 r plane_cap -ffffffff82bc6940 r link_enc_regs -ffffffff82bc6fa0 r link_enc_aux_regs -ffffffff82bc6ff0 r link_enc_hpd_regs -ffffffff82bc7004 r le_shift -ffffffff82bc70f4 r le_mask -ffffffff82bc74ac r link_enc_feature -ffffffff82bc74bc r panel_config_defaults -ffffffff82bc74f0 r debug_defaults_drv -ffffffff82bc7668 r cs_shift -ffffffff82bc7674 r cs_mask -ffffffff82bc769c r hubbub_reg -ffffffff82bc7810 r hubbub_shift -ffffffff82bc7898 r hubbub_mask -ffffffff82bc7ac0 r vmid_regs -ffffffff82bc7c80 r vmid_shifts -ffffffff82bc7c88 r vmid_masks -ffffffff82bc7cb0 r hubp_regs -ffffffff82bc84e0 r hubp_shift -ffffffff82bc85dc r hubp_mask -ffffffff82bc89d0 r dpp_regs -ffffffff82bc9ed0 r tf_shift -ffffffff82bca1a0 r tf_mask -ffffffff82bcace0 r opp_regs -ffffffff82bcae40 r opp_shift -ffffffff82bcae78 r opp_mask -ffffffff82bcaf50 r optc_regs -ffffffff82bcb450 r optc_shift -ffffffff82bcb510 r optc_mask -ffffffff82bcb810 r mpc_regs -ffffffff82bccffc r mpc_shift -ffffffff82bcd0d8 r mpc_mask -ffffffff82bcd450 r dsc_regs -ffffffff82bcd760 r dsc_shift -ffffffff82bcd818 r dsc_mask -ffffffff82bcdaf0 r dwbc30_regs -ffffffff82bcdccc r dwbc30_shift -ffffffff82bcde00 r dwbc30_mask -ffffffff82bce2d0 r mcif_wb30_regs -ffffffff82bce3cc r mcif_wb30_shift -ffffffff82bce478 r mcif_wb30_mask -ffffffff82bce730 r aux_engine_regs -ffffffff82bce7f8 r aux_mask -ffffffff82bce858 r aux_shift -ffffffff82bce870 r i2c_hw_regs -ffffffff82bce988 r i2c_shifts -ffffffff82bce9b4 r i2c_masks -ffffffff82bcea60 r audio_regs -ffffffff82bceb94 r audio_shift -ffffffff82bcebac r audio_mask -ffffffff82bcebf0 r stream_enc_regs -ffffffff82bcf294 r se_shift -ffffffff82bcf370 r se_mask -ffffffff82bcf6e0 r vpg_regs -ffffffff82bcf7d0 r vpg_shift -ffffffff82bcf7f8 r vpg_mask -ffffffff82bcf8a0 r afmt_regs -ffffffff82bcf978 r afmt_shift -ffffffff82bcf98c r afmt_mask -ffffffff82bcf9e0 r hpo_dp_stream_enc_regs -ffffffff82bcfc10 r hpo_dp_se_shift -ffffffff82bcfc38 r hpo_dp_se_mask -ffffffff82bcfce0 r apg_regs -ffffffff82bcfd20 r apg_shift -ffffffff82bcfd28 r apg_mask -ffffffff82bcfd40 r hpo_dp_link_enc_regs -ffffffff82bcfe50 r hpo_dp_le_shift -ffffffff82bcfe6c r hpo_dp_le_mask -ffffffff82bcfed0 r hwseq_reg -ffffffff82bd00ec r hwseq_shift -ffffffff82bd016c r hwseq_mask -ffffffff82bd1000 r bios_regs -ffffffff82bd1008 r res_cap_dcn31 -ffffffff82bd1048 r debug_defaults_diags -ffffffff82bd11c0 r clk_src_regs -ffffffff82bd1364 r dccg_regs -ffffffff82bd1450 r dccg_shift -ffffffff82bd14e8 r dccg_mask -ffffffff82bd1750 r abm_regs -ffffffff82bd1850 r abm_shift -ffffffff82bd1864 r abm_mask -ffffffff82bd18b0 r res_create_funcs -ffffffff82bd18e0 r res_create_maximus_funcs -ffffffff82bd1910 r plane_cap -ffffffff82bd1940 r link_enc_regs -ffffffff82bd1fa0 r link_enc_aux_regs -ffffffff82bd1ff0 r link_enc_hpd_regs -ffffffff82bd2004 r le_shift -ffffffff82bd20f4 r le_mask -ffffffff82bd24ac r link_enc_feature -ffffffff82bd24bc r panel_config_defaults -ffffffff82bd24f0 r debug_defaults_drv -ffffffff82bd2668 r cs_shift -ffffffff82bd2674 r cs_mask -ffffffff82bd269c r hubbub_reg -ffffffff82bd2810 r hubbub_shift -ffffffff82bd2898 r hubbub_mask -ffffffff82bd2ac0 r vmid_regs -ffffffff82bd2c80 r vmid_shifts -ffffffff82bd2c88 r vmid_masks -ffffffff82bd2cb0 r hubp_regs -ffffffff82bd34e0 r hubp_shift -ffffffff82bd35dc r hubp_mask -ffffffff82bd39d0 r dpp_regs -ffffffff82bd4ed0 r tf_shift -ffffffff82bd51a0 r tf_mask -ffffffff82bd5ce0 r opp_regs -ffffffff82bd5e40 r opp_shift -ffffffff82bd5e78 r opp_mask -ffffffff82bd5f50 r optc_regs -ffffffff82bd6450 r optc_shift -ffffffff82bd6510 r optc_mask -ffffffff82bd6810 r mpc_regs -ffffffff82bd7ffc r mpc_shift -ffffffff82bd80d8 r mpc_mask -ffffffff82bd8450 r dsc_regs -ffffffff82bd869c r dsc_shift -ffffffff82bd8754 r dsc_mask -ffffffff82bd8a30 r dwbc30_regs -ffffffff82bd8c0c r dwbc30_shift -ffffffff82bd8d40 r dwbc30_mask -ffffffff82bd9210 r mcif_wb30_regs -ffffffff82bd930c r mcif_wb30_shift -ffffffff82bd93b8 r mcif_wb30_mask -ffffffff82bd9670 r aux_engine_regs -ffffffff82bd9738 r aux_mask -ffffffff82bd9798 r aux_shift -ffffffff82bd97b0 r i2c_hw_regs -ffffffff82bd98c8 r i2c_shifts -ffffffff82bd98f4 r i2c_masks -ffffffff82bd99a0 r audio_regs -ffffffff82bd9ad4 r audio_shift -ffffffff82bd9aec r audio_mask -ffffffff82bd9b30 r stream_enc_regs -ffffffff82bda1d4 r se_shift -ffffffff82bda2b0 r se_mask -ffffffff82bda620 r vpg_regs -ffffffff82bda710 r vpg_shift -ffffffff82bda738 r vpg_mask -ffffffff82bda7e0 r afmt_regs -ffffffff82bda8b8 r afmt_shift -ffffffff82bda8cc r afmt_mask -ffffffff82bda920 r hpo_dp_stream_enc_regs -ffffffff82bdab50 r hpo_dp_se_shift -ffffffff82bdab78 r hpo_dp_se_mask -ffffffff82bdac20 r apg_regs -ffffffff82bdac60 r apg_shift -ffffffff82bdac68 r apg_mask -ffffffff82bdac80 r hpo_dp_link_enc_regs -ffffffff82bdad90 r hpo_dp_le_shift -ffffffff82bdadac r hpo_dp_le_mask -ffffffff82bdae10 r hwseq_reg -ffffffff82bdb02c r hwseq_shift -ffffffff82bdb0ac r hwseq_mask +ffffffff82b9cfd4 r se_shift +ffffffff82b9d0b0 r se_mask +ffffffff82b9d41c r hwseq_reg +ffffffff82b9d638 r hwseq_shift +ffffffff82b9d6b8 r hwseq_mask +ffffffff82b9e000 r dccg3_funcs +ffffffff82b9f000 r dcn30_link_enc_funcs +ffffffff82ba0000 r dcn30_str_enc_funcs +ffffffff82ba1000 r dpp_input_csc_matrix +ffffffff82ba2000 R dcn30_dwbc_funcs +ffffffff82ba3000 r hubbub30_funcs +ffffffff82ba5000 r dcn30_funcs +ffffffff82ba52c0 r dcn30_private_funcs +ffffffff82ba6000 R dcn30_mmhubbub_funcs +ffffffff82ba7000 R dcn30_mpc_funcs +ffffffff82ba8000 r bios_regs +ffffffff82ba8008 r res_cap_dcn3 +ffffffff82ba8048 r debug_defaults_drv +ffffffff82ba81c0 r debug_defaults_diags +ffffffff82ba8340 r clk_src_regs +ffffffff82ba8538 r dccg_regs +ffffffff82ba8624 r dccg_shift +ffffffff82ba86bc r dccg_mask +ffffffff82ba8920 r abm_regs +ffffffff82ba8aa0 r abm_shift +ffffffff82ba8ab4 r abm_mask +ffffffff82ba8b00 r res_create_funcs +ffffffff82ba8b30 r res_create_maximus_funcs +ffffffff82ba8b60 r plane_cap +ffffffff82ba8b90 r dcn30_res_pool_funcs +ffffffff82ba8c70 r panel_cntl_regs +ffffffff82ba8c90 r panel_cntl_shift +ffffffff82ba8ca0 r panel_cntl_mask +ffffffff82ba8ce0 r link_enc_regs +ffffffff82ba9480 r link_enc_aux_regs +ffffffff82ba94e0 r link_enc_hpd_regs +ffffffff82ba94f8 r le_shift +ffffffff82ba95e8 r le_mask +ffffffff82ba99a0 r link_enc_feature +ffffffff82ba99b0 r cs_shift +ffffffff82ba99bc r cs_mask +ffffffff82ba99e4 r hubbub_reg +ffffffff82ba9b58 r hubbub_shift +ffffffff82ba9be0 r hubbub_mask +ffffffff82ba9e00 r vmid_regs +ffffffff82ba9fc0 r vmid_shifts +ffffffff82ba9fc8 r vmid_masks +ffffffff82ba9ff0 r hubp_regs +ffffffff82baac38 r hubp_shift +ffffffff82baad34 r hubp_mask +ffffffff82bab130 r dpp_regs +ffffffff82bad0b0 r tf_shift +ffffffff82bad380 r tf_mask +ffffffff82badec0 r opp_regs +ffffffff82bae0d0 r opp_shift +ffffffff82bae108 r opp_mask +ffffffff82bae1e0 r optc_regs +ffffffff82bae960 r optc_shift +ffffffff82baea20 r optc_mask +ffffffff82baed20 r mpc_regs +ffffffff82bb050c r mpc_shift +ffffffff82bb05e8 r mpc_mask +ffffffff82bb0960 r dsc_regs +ffffffff82bb0df8 r dsc_shift +ffffffff82bb0eb0 r dsc_mask +ffffffff82bb1190 r dwbc30_regs +ffffffff82bb136c r dwbc30_shift +ffffffff82bb14a0 r dwbc30_mask +ffffffff82bb1970 r mcif_wb30_regs +ffffffff82bb1a6c r mcif_wb30_shift +ffffffff82bb1b18 r mcif_wb30_mask +ffffffff82bb1dd0 r aux_engine_regs +ffffffff82bb1ec0 r aux_mask +ffffffff82bb1f20 r aux_shift +ffffffff82bb1f40 r i2c_hw_regs +ffffffff82bb2090 r i2c_shifts +ffffffff82bb20bc r i2c_masks +ffffffff82bb2160 r audio_regs +ffffffff82bb2294 r audio_shift +ffffffff82bb22ac r audio_mask +ffffffff82bb22f0 r stream_enc_regs +ffffffff82bb2ae8 r se_shift +ffffffff82bb2bc4 r se_mask +ffffffff82bb2f30 r vpg_regs +ffffffff82bb2fbc r vpg_shift +ffffffff82bb2fe4 r vpg_mask +ffffffff82bb3080 r afmt_regs +ffffffff82bb317c r afmt_shift +ffffffff82bb3190 r afmt_mask +ffffffff82bb31d4 r hwseq_reg +ffffffff82bb33f0 r hwseq_shift +ffffffff82bb3470 r hwseq_mask +ffffffff82bb4000 r dccg301_funcs +ffffffff82bb5000 r dcn301_link_enc_funcs +ffffffff82bb6000 r hubbub301_funcs +ffffffff82bb7000 r dcn301_funcs +ffffffff82bb72c0 r dcn301_private_funcs +ffffffff82bb8000 r dcn301_link_panel_cntl_funcs +ffffffff82bb9000 r bios_regs +ffffffff82bb9008 r debug_defaults_drv +ffffffff82bb9180 r debug_defaults_diags +ffffffff82bb9300 r clk_src_regs +ffffffff82bb9450 r dccg_regs +ffffffff82bb953c r dccg_shift +ffffffff82bb95d4 r dccg_mask +ffffffff82bb9830 r abm_regs +ffffffff82bb9930 r abm_shift +ffffffff82bb9944 r abm_mask +ffffffff82bb9990 r res_create_funcs +ffffffff82bb99c0 r res_create_maximus_funcs +ffffffff82bb99f0 r plane_cap +ffffffff82bb9a20 r panel_cntl_regs +ffffffff82bb9a60 r panel_cntl_shift +ffffffff82bb9a70 r panel_cntl_mask +ffffffff82bb9ab0 r link_enc_regs +ffffffff82bb9fc0 r link_enc_aux_regs +ffffffff82bba000 r link_enc_hpd_regs +ffffffff82bba010 r le_shift +ffffffff82bba100 r le_mask +ffffffff82bba4b8 r link_enc_feature +ffffffff82bba4c8 r cs_shift +ffffffff82bba4d4 r cs_mask +ffffffff82bba4fc r hubbub_reg +ffffffff82bba670 r hubbub_shift +ffffffff82bba6f8 r hubbub_mask +ffffffff82bba920 r vmid_regs +ffffffff82bbaae0 r vmid_shifts +ffffffff82bbaae8 r vmid_masks +ffffffff82bbab10 r hubp_regs +ffffffff82bbb340 r hubp_shift +ffffffff82bbb43c r hubp_mask +ffffffff82bbb830 r dpp_regs +ffffffff82bbcd30 r tf_shift +ffffffff82bbd000 r tf_mask +ffffffff82bbdb40 r opp_regs +ffffffff82bbdca0 r opp_shift +ffffffff82bbdcd8 r opp_mask +ffffffff82bbddb0 r optc_regs +ffffffff82bbe2b0 r optc_shift +ffffffff82bbe370 r optc_mask +ffffffff82bbe670 r mpc_regs +ffffffff82bbfe5c r mpc_shift +ffffffff82bbff38 r mpc_mask +ffffffff82bc02b0 r dsc_regs +ffffffff82bc04fc r dsc_shift +ffffffff82bc05b4 r dsc_mask +ffffffff82bc0890 r dwbc30_regs +ffffffff82bc0a6c r dwbc30_shift +ffffffff82bc0ba0 r dwbc30_mask +ffffffff82bc1070 r mcif_wb30_regs +ffffffff82bc116c r mcif_wb30_shift +ffffffff82bc1218 r mcif_wb30_mask +ffffffff82bc14d0 r aux_engine_regs +ffffffff82bc1570 r aux_mask +ffffffff82bc15d0 r aux_shift +ffffffff82bc15f0 r i2c_hw_regs +ffffffff82bc16d0 r i2c_shifts +ffffffff82bc16fc r i2c_masks +ffffffff82bc17a0 r audio_regs +ffffffff82bc18d4 r audio_shift +ffffffff82bc18ec r audio_mask +ffffffff82bc1930 r stream_enc_regs +ffffffff82bc1e80 r se_shift +ffffffff82bc1f5c r se_mask +ffffffff82bc22d0 r vpg_regs +ffffffff82bc2320 r vpg_shift +ffffffff82bc2348 r vpg_mask +ffffffff82bc23e0 r afmt_regs +ffffffff82bc2470 r afmt_shift +ffffffff82bc2484 r afmt_mask +ffffffff82bc24c8 r hwseq_reg +ffffffff82bc26e4 r hwseq_shift +ffffffff82bc2764 r hwseq_mask +ffffffff82bc3000 r bios_regs +ffffffff82bc3008 r res_cap_dcn302 +ffffffff82bc3048 r debug_defaults_drv +ffffffff82bc31c0 r debug_defaults_diags +ffffffff82bc3340 r clk_src_regs +ffffffff82bc34e4 r dccg_regs +ffffffff82bc35d0 r dccg_shift +ffffffff82bc3668 r dccg_mask +ffffffff82bc38d0 r abm_regs +ffffffff82bc3a10 r abm_shift +ffffffff82bc3a24 r abm_mask +ffffffff82bc3a70 r res_create_funcs +ffffffff82bc3aa0 r res_create_maximus_funcs +ffffffff82bc3ad0 r plane_cap +ffffffff82bc3b00 r panel_cntl_regs +ffffffff82bc3b20 r panel_cntl_shift +ffffffff82bc3b30 r panel_cntl_mask +ffffffff82bc3b70 r link_enc_regs +ffffffff82bc41d0 r link_enc_aux_regs +ffffffff82bc4220 r link_enc_hpd_regs +ffffffff82bc4234 r le_shift +ffffffff82bc4324 r le_mask +ffffffff82bc46dc r link_enc_feature +ffffffff82bc46ec r cs_shift +ffffffff82bc46f8 r cs_mask +ffffffff82bc4720 r hubbub_reg +ffffffff82bc4894 r hubbub_shift +ffffffff82bc491c r hubbub_mask +ffffffff82bc4b40 r vmid_regs +ffffffff82bc4d00 r vmid_shifts +ffffffff82bc4d08 r vmid_masks +ffffffff82bc4d30 r hubp_regs +ffffffff82bc576c r hubp_shift +ffffffff82bc5868 r hubp_mask +ffffffff82bc5c60 r dpp_regs +ffffffff82bc76a0 r tf_shift +ffffffff82bc7970 r tf_mask +ffffffff82bc84b0 r opp_regs +ffffffff82bc8668 r opp_shift +ffffffff82bc86a0 r opp_mask +ffffffff82bc8780 r optc_regs +ffffffff82bc8dc0 r optc_shift +ffffffff82bc8e80 r optc_mask +ffffffff82bc9180 r mpc_regs +ffffffff82bca96c r mpc_shift +ffffffff82bcaa48 r mpc_mask +ffffffff82bcadc0 r dsc_regs +ffffffff82bcb194 r dsc_shift +ffffffff82bcb24c r dsc_mask +ffffffff82bcb530 r dwbc30_regs +ffffffff82bcb70c r dwbc30_shift +ffffffff82bcb840 r dwbc30_mask +ffffffff82bcbd10 r mcif_wb30_regs +ffffffff82bcbe0c r mcif_wb30_shift +ffffffff82bcbeb8 r mcif_wb30_mask +ffffffff82bcc170 r aux_engine_regs +ffffffff82bcc238 r aux_mask +ffffffff82bcc298 r aux_shift +ffffffff82bcc2b0 r i2c_hw_regs +ffffffff82bcc3c8 r i2c_shifts +ffffffff82bcc3f4 r i2c_masks +ffffffff82bcc4a0 r audio_regs +ffffffff82bcc5d4 r audio_shift +ffffffff82bcc5ec r audio_mask +ffffffff82bcc630 r stream_enc_regs +ffffffff82bcccd4 r se_shift +ffffffff82bccdb0 r se_mask +ffffffff82bcd120 r vpg_regs +ffffffff82bcd198 r vpg_shift +ffffffff82bcd1c0 r vpg_mask +ffffffff82bcd260 r afmt_regs +ffffffff82bcd338 r afmt_shift +ffffffff82bcd34c r afmt_mask +ffffffff82bcd390 r hwseq_reg +ffffffff82bcd5ac r hwseq_shift +ffffffff82bcd62c r hwseq_mask +ffffffff82bce000 r bios_regs +ffffffff82bce008 r res_cap_dcn303 +ffffffff82bce048 r debug_defaults_drv +ffffffff82bce1c0 r debug_defaults_diags +ffffffff82bce340 r clk_src_regs +ffffffff82bce3e8 r dccg_regs +ffffffff82bce4d4 r dccg_shift +ffffffff82bce56c r dccg_mask +ffffffff82bce7d0 r abm_regs +ffffffff82bce850 r abm_shift +ffffffff82bce864 r abm_mask +ffffffff82bce8b0 r res_create_funcs +ffffffff82bce8e0 r res_create_maximus_funcs +ffffffff82bce910 r plane_cap +ffffffff82bce940 r panel_cntl_regs +ffffffff82bce960 r panel_cntl_shift +ffffffff82bce970 r panel_cntl_mask +ffffffff82bce9b0 r link_enc_regs +ffffffff82bcec40 r link_enc_aux_regs +ffffffff82bcec60 r link_enc_hpd_regs +ffffffff82bcec68 r le_shift +ffffffff82bced58 r le_mask +ffffffff82bcf110 r link_enc_feature +ffffffff82bcf120 r cs_shift +ffffffff82bcf12c r cs_mask +ffffffff82bcf154 r hubbub_reg +ffffffff82bcf2c8 r hubbub_shift +ffffffff82bcf350 r hubbub_mask +ffffffff82bcf570 r vmid_regs +ffffffff82bcf730 r vmid_shifts +ffffffff82bcf738 r vmid_masks +ffffffff82bcf760 r hubp_regs +ffffffff82bcfb78 r hubp_shift +ffffffff82bcfc74 r hubp_mask +ffffffff82bd0070 r dpp_regs +ffffffff82bd0af0 r tf_shift +ffffffff82bd0dc0 r tf_mask +ffffffff82bd1900 r opp_regs +ffffffff82bd19b0 r opp_shift +ffffffff82bd19e8 r opp_mask +ffffffff82bd1ac0 r optc_regs +ffffffff82bd1d40 r optc_shift +ffffffff82bd1e00 r optc_mask +ffffffff82bd2100 r mpc_regs +ffffffff82bd38ec r mpc_shift +ffffffff82bd39c8 r mpc_mask +ffffffff82bd3d40 r dsc_regs +ffffffff82bd3ec8 r dsc_shift +ffffffff82bd3f80 r dsc_mask +ffffffff82bd4260 r dwbc30_regs +ffffffff82bd443c r dwbc30_shift +ffffffff82bd4570 r dwbc30_mask +ffffffff82bd4a40 r mcif_wb30_regs +ffffffff82bd4b3c r mcif_wb30_shift +ffffffff82bd4be8 r mcif_wb30_mask +ffffffff82bd4ea0 r aux_engine_regs +ffffffff82bd4ef0 r aux_mask +ffffffff82bd4f50 r aux_shift +ffffffff82bd4f70 r i2c_hw_regs +ffffffff82bd4fe0 r i2c_shifts +ffffffff82bd500c r i2c_masks +ffffffff82bd50b0 r audio_regs +ffffffff82bd51e4 r audio_shift +ffffffff82bd51fc r audio_mask +ffffffff82bd5240 r stream_enc_regs +ffffffff82bd54e8 r se_shift +ffffffff82bd55c4 r se_mask +ffffffff82bd5930 r vpg_regs +ffffffff82bd596c r vpg_shift +ffffffff82bd5994 r vpg_mask +ffffffff82bd5a30 r afmt_regs +ffffffff82bd5a9c r afmt_shift +ffffffff82bd5ab0 r afmt_mask +ffffffff82bd5af4 r hwseq_reg +ffffffff82bd5d10 r hwseq_shift +ffffffff82bd5d90 r hwseq_mask +ffffffff82bd6000 r dccg31_funcs +ffffffff82bd7000 r dcn31_link_enc_funcs +ffffffff82bd8000 r dcn30_str_enc_funcs +ffffffff82bd9000 r hubbub31_funcs +ffffffff82bda000 r dcn31_funcs +ffffffff82bda2c0 r dcn31_private_funcs +ffffffff82bdb000 r dcn31_link_panel_cntl_funcs ffffffff82bdc000 r bios_regs ffffffff82bdc008 r res_cap_dcn31 ffffffff82bdc048 r debug_defaults_diags ffffffff82bdc1c0 r clk_src_regs -ffffffff82bdc364 r dccg_regs -ffffffff82bdc450 r dccg_shift -ffffffff82bdc4e8 r dccg_mask -ffffffff82bdc750 r abm_regs -ffffffff82bdc850 r abm_shift -ffffffff82bdc864 r abm_mask -ffffffff82bdc8b0 r res_create_funcs -ffffffff82bdc8e0 r res_create_maximus_funcs -ffffffff82bdc910 r plane_cap -ffffffff82bdc940 r link_enc_regs -ffffffff82bdcfa0 r link_enc_aux_regs -ffffffff82bdcff0 r link_enc_hpd_regs -ffffffff82bdd004 r le_shift -ffffffff82bdd0f4 r le_mask -ffffffff82bdd4ac r link_enc_feature -ffffffff82bdd4bc r panel_config_defaults -ffffffff82bdd4f0 r debug_defaults_drv -ffffffff82bdd668 r cs_shift -ffffffff82bdd674 r cs_mask -ffffffff82bdd69c r hubbub_reg -ffffffff82bdd810 r hubbub_shift -ffffffff82bdd898 r hubbub_mask -ffffffff82bddac0 r vmid_regs -ffffffff82bddc80 r vmid_shifts -ffffffff82bddc88 r vmid_masks -ffffffff82bddcb0 r hubp_regs -ffffffff82bde4e0 r hubp_shift -ffffffff82bde5dc r hubp_mask -ffffffff82bde9d0 r dpp_regs -ffffffff82bdfed0 r tf_shift -ffffffff82be01a0 r tf_mask -ffffffff82be0ce0 r opp_regs -ffffffff82be0e40 r opp_shift -ffffffff82be0e78 r opp_mask -ffffffff82be0f50 r optc_regs -ffffffff82be1450 r optc_shift -ffffffff82be1510 r optc_mask -ffffffff82be1810 r mpc_regs -ffffffff82be2ffc r mpc_shift -ffffffff82be30d8 r mpc_mask -ffffffff82be3450 r dsc_regs -ffffffff82be369c r dsc_shift -ffffffff82be3754 r dsc_mask -ffffffff82be3a30 r dwbc30_regs -ffffffff82be3c0c r dwbc30_shift -ffffffff82be3d40 r dwbc30_mask -ffffffff82be4210 r mcif_wb30_regs -ffffffff82be430c r mcif_wb30_shift -ffffffff82be43b8 r mcif_wb30_mask -ffffffff82be4670 r aux_engine_regs -ffffffff82be4738 r aux_mask -ffffffff82be4798 r aux_shift -ffffffff82be47b0 r i2c_hw_regs -ffffffff82be48c8 r i2c_shifts -ffffffff82be48f4 r i2c_masks -ffffffff82be49a0 r audio_regs -ffffffff82be4ad4 r audio_shift -ffffffff82be4aec r audio_mask -ffffffff82be4b30 r stream_enc_regs -ffffffff82be51d4 r se_shift -ffffffff82be52b0 r se_mask -ffffffff82be5620 r vpg_regs -ffffffff82be5710 r vpg_shift -ffffffff82be5738 r vpg_mask -ffffffff82be57e0 r afmt_regs -ffffffff82be58b8 r afmt_shift -ffffffff82be58cc r afmt_mask -ffffffff82be5920 r hpo_dp_stream_enc_regs -ffffffff82be5b50 r hpo_dp_se_shift -ffffffff82be5b78 r hpo_dp_se_mask -ffffffff82be5c20 r apg_regs -ffffffff82be5c60 r apg_shift -ffffffff82be5c68 r apg_mask -ffffffff82be5c80 r hpo_dp_link_enc_regs -ffffffff82be5d90 r hpo_dp_le_shift -ffffffff82be5dac r hpo_dp_le_mask -ffffffff82be5e10 r hwseq_reg -ffffffff82be602c r hwseq_shift -ffffffff82be60ac r hwseq_mask -ffffffff82be7000 r dccg32_funcs -ffffffff82be8000 r dcn32_link_enc_funcs -ffffffff82be9000 r dcn32_str_enc_funcs -ffffffff82bea000 r hubbub32_funcs -ffffffff82beb000 r dcn32_funcs -ffffffff82beb2c0 r dcn32_private_funcs -ffffffff82bec000 R dcn32_mmhubbub_funcs -ffffffff82bed000 R dcn32_mpc_funcs -ffffffff82bee000 r res_cap_dcn32 -ffffffff82bee040 r debug_defaults_diags -ffffffff82bee1b8 r dccg_shift -ffffffff82bee250 r dccg_mask -ffffffff82bee4ac r abm_shift -ffffffff82bee4c0 r abm_mask -ffffffff82bee508 r res_create_funcs -ffffffff82bee538 r res_create_maximus_funcs -ffffffff82bee568 r plane_cap -ffffffff82bee594 r le_shift -ffffffff82bee684 r le_mask -ffffffff82beea3c r link_enc_feature -ffffffff82beea50 r debug_defaults_drv -ffffffff82beebc8 r cs_shift -ffffffff82beebd4 r cs_mask -ffffffff82beebfc r hubbub_shift -ffffffff82beec84 r hubbub_mask -ffffffff82beeea0 r vmid_shifts -ffffffff82beeea8 r vmid_masks -ffffffff82beeec8 r hubp_shift -ffffffff82beefc4 r hubp_mask -ffffffff82bef3b4 r tf_shift -ffffffff82bef684 r tf_mask -ffffffff82bf01c4 r opp_shift -ffffffff82bf01fc r opp_mask -ffffffff82bf02d0 r optc_shift -ffffffff82bf0390 r optc_mask -ffffffff82bf0690 r mpc_shift -ffffffff82bf076c r mpc_mask -ffffffff82bf0ad8 r dsc_shift -ffffffff82bf0b90 r dsc_mask -ffffffff82bf0e68 r dwbc30_shift -ffffffff82bf0f9c r dwbc30_mask -ffffffff82bf1464 r mcif_wb30_shift -ffffffff82bf1510 r mcif_wb30_mask -ffffffff82bf17bc r aux_mask -ffffffff82bf181c r aux_shift -ffffffff82bf1834 r i2c_shifts -ffffffff82bf1860 r i2c_masks -ffffffff82bf1904 r audio_shift -ffffffff82bf191c r audio_mask -ffffffff82bf1958 r se_shift -ffffffff82bf1a34 r se_mask -ffffffff82bf1da0 r vpg_shift -ffffffff82bf1dc8 r vpg_mask -ffffffff82bf1e5c r afmt_shift -ffffffff82bf1e70 r afmt_mask -ffffffff82bf1eb4 r hpo_dp_se_shift -ffffffff82bf1edc r hpo_dp_se_mask -ffffffff82bf1f7c r apg_shift -ffffffff82bf1f84 r apg_mask -ffffffff82bf1f9c r hpo_dp_le_shift -ffffffff82bf1fb8 r hpo_dp_le_mask -ffffffff82bf201c r hwseq_shift -ffffffff82bf209c r hwseq_mask -ffffffff82bf3000 r dcn321_link_enc_funcs -ffffffff82bf4000 r res_cap_dcn321 -ffffffff82bf4040 r debug_defaults_diags -ffffffff82bf41b8 r dccg_shift -ffffffff82bf4250 r dccg_mask -ffffffff82bf44ac r abm_shift -ffffffff82bf44c0 r abm_mask -ffffffff82bf4508 r res_create_funcs -ffffffff82bf4538 r res_create_maximus_funcs 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dt_static_raw_syscalls_sys_exit -ffffffff830ef420 D dt_static_uvm_fault -ffffffff830ef490 D dt_static_uvm_map_insert -ffffffff830ef500 D dt_static_uvm_map_remove -ffffffff830ef570 D dt_static_uvm_malloc -ffffffff830ef5e0 D dt_static_uvm_free -ffffffff830ef650 D dt_static_uvm_pool_get -ffffffff830ef6c0 D dt_static_uvm_pool_put -ffffffff830ef730 D dt_static_vfs_bufcache_rel -ffffffff830ef7a0 D dt_static_vfs_bufcache_take -ffffffff830ef810 D dt_static_vfs_cleaner -ffffffff830ef880 D dt_static_vmm_guest_enter -ffffffff830ef8f0 D dt_static_vmm_guest_exit -ffffffff830ef960 D dt_static_vmm_inout -ffffffff830ef9d0 D dt_static_smr_call -ffffffff830efa40 D dt_static_smr_called -ffffffff830efab0 D dt_static_smr_barrier_enter -ffffffff830efb20 D dt_static_smr_barrier_exit -ffffffff830efb90 D dt_static_smr_wakeup -ffffffff830efc00 D dt_static_smr_thread -ffffffff830efc70 D dt_static_refcnt_none -ffffffff830efce0 D dt_static_refcnt_ifaddr -ffffffff830efd50 D dt_static_refcnt_inpcb -ffffffff830efdc0 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pool_allocator_multi_ni -ffffffff8311b070 D pool_gc_tick -ffffffff8311b0b8 D pool_gc_task -ffffffff8311c000 D kprintf_mutex -ffffffff8311c010 D db_panic -ffffffff8311c014 D splassert_ctl -ffffffff8311c018 D v_putc -ffffffff8311c020 D printf_flags -ffffffff8311d000 D userconf_base -ffffffff8311d004 D userconf_maxdev -ffffffff8311d008 D userconf_totdev -ffffffff8311d00c D userconf_maxlocnames -ffffffff8311d010 D userconf_cnt -ffffffff8311d014 D userconf_lines -ffffffff8311d018 D userconf_histsz -ffffffff8311d020 D userconf_cmds -ffffffff8311e000 D ftlock -ffffffff8311f000 d ppollcollect.poll_errintvl -ffffffff83120000 D ttydefchars -ffffffff83120014 D ttclos -ffffffff8312001b D ttopen -ffffffff83120022 D ttybg -ffffffff83120028 D ttyin -ffffffff8312002e D ttyout -ffffffff83120038 D ttylist_lock -ffffffff83121000 D linesw -ffffffff83121280 D nlinesw -ffffffff83122000 D pt_softc_lock -ffffffff83123000 d mbstat_boot_boot_cpumem -ffffffff83123080 D mbstat -ffffffff83123090 D mclsizes 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syncdelay -ffffffff8312c000 D dosdirtemplate -ffffffff8312d000 D ntfs_hashlock -ffffffff8312e000 D ntfs_toupper_lock -ffffffff8312f000 D art_table_gc_mtx -ffffffff8312f010 D art_table_gc_task -ffffffff8312f040 D art_node_gc_mtx -ffffffff8312f050 D art_node_gc_task -ffffffff83130000 D bpf_bufsize -ffffffff83130004 D bpf_maxbufsize -ffffffff83130008 D bpf_sysctl_lk -ffffffff83131000 D ifg_head -ffffffff83131010 D if_cloners_lock -ffffffff83131020 D if_input_task_locked -ffffffff83131050 D netlock -ffffffff83131060 D ifnetlist -ffffffff83132000 D ifiq_maxlen_drop -ffffffff83132004 D ifiq_maxlen_return -ffffffff83133000 D etherbroadcastaddr -ffffffff83133006 D ether_ipmulticast_min -ffffffff8313300c D ether_ipmulticast_max -ffffffff83133012 D ether_ip6multicast_min -ffffffff83133018 D ether_ip6multicast_max -ffffffff83134000 D etherip_cloner -ffffffff83134030 D etherip_list -ffffffff83135000 D loop_cloner -ffffffff83136000 D ifmedia_mtx -ffffffff83137000 D ppp_compressors -ffffffff83137020 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ipsendredirects -ffffffff83155004 D ip_defttl -ffffffff83155008 D ip_mtudisc -ffffffff8315500c D ip_mtudisc_timeout -ffffffff83155010 D ipq_mutex -ffffffff83155020 D ip_maxqueue -ffffffff83155028 D ipintrq -ffffffff83155060 d ipsend_task -ffffffff83155090 d ipsendraw_task -ffffffff83156000 D ip_mrtproto -ffffffff83156004 d sin -ffffffff83157000 D rip_sendspace -ffffffff83157008 D rip_recvspace -ffffffff83158000 D tcprexmtthresh -ffffffff83158004 D tcptv_keep_init -ffffffff83158008 D tcp_rst_ppslim -ffffffff8315800c D tcp_ackdrop_ppslim -ffffffff83158010 D tcp_syn_hash_size -ffffffff83158014 D tcp_syn_cache_limit -ffffffff83158018 D tcp_syn_bucket_limit -ffffffff8315801c D tcp_syn_use_limit -ffffffff83159000 D tcp_outflags -ffffffff8315a000 D tcp_timer_mtx -ffffffff8315a010 D tcp_mssdflt -ffffffff8315a014 D tcp_rttdflt -ffffffff8315a018 D tcp_do_rfc1323 -ffffffff8315a01c D tcp_do_sack -ffffffff8315a020 D tcp_do_rfc3390 -ffffffff8315a024 D tcp_reass_limit -ffffffff8315a028 D tcp_sackhole_limit -ffffffff8315b000 D tcp_backoff -ffffffff8315b034 D tcp_totbackoff -ffffffff8315c000 D tcp_sendspace -ffffffff8315c004 D tcp_recvspace -ffffffff8315c008 D tcp_autorcvbuf_inc -ffffffff8315d000 D udpcksum -ffffffff8315d004 D udp_sendspace -ffffffff8315d008 D udp_recvspace -ffffffff8315e000 D ipsec_flows_mtx -ffffffff8315e010 D ipsec_ids_idle -ffffffff8315e014 D ipsec_ids_next_flow -ffffffff8315e018 D ipsec_policy_head -ffffffff8315e028 D ipsp_ids_gc_timeout -ffffffff8315e070 D tdb_sadb_mtx -ffffffff8315e080 d tdb_hashmask -ffffffff8315f000 D ipo_tdb_mtx -ffffffff8315f010 D ipsec_acquire_mtx -ffffffff8315f020 D ipsec_acquire_head -ffffffff83160000 D ipsec_keep_invalid -ffffffff83160004 D ipsec_require_pfs -ffffffff83160008 D ipsec_soft_timeout -ffffffff8316000c D ipsec_exp_timeout -ffffffff83160010 D ipsec_soft_first_use -ffffffff83160014 D ipsec_exp_first_use -ffffffff83160018 D ipsec_expire_acquire -ffffffff8316001c D esp_enable -ffffffff83160020 D ah_enable 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uao_list_lock -ffffffff83176000 d uvmexp_countersboot_boot_cpumem -ffffffff831760c0 D uvmexp_counters -ffffffff831760c8 D vm_min_kernel_address -ffffffff83177000 D no_constraint -ffffffff83178000 d uvm_kmapent_warn_rate -ffffffff83179000 D maxslp -ffffffff8317a000 D uvmpagerops -ffffffff8317b000 D uvm_swap_data_lock -ffffffff8317b010 D swap_syscall_lock -ffffffff8317b020 D oommtx -ffffffff8317c000 D uvm_doswapencrypt -ffffffff8317d000 D gif_list -ffffffff8317d010 D gif_cloner -ffffffff8317e000 D divert6_sendspace -ffffffff8317e004 D divert6_recvspace -ffffffff8317e008 D divb6hashsize -ffffffff8317f000 d in6_get_hw_ifid.allone -ffffffff83180000 D ip6_sendredirects -ffffffff83180004 D ip6_defhlim -ffffffff83180008 D ip6_defmcasthlim -ffffffff8318000c D ip6_maxfragpackets -ffffffff83180010 D ip6_maxfrags -ffffffff83180014 D ip6_log_interval -ffffffff83180018 D ip6_hdrnestlimit -ffffffff8318001c D ip6_dad_count -ffffffff83180020 D ip6_auto_flowlabel -ffffffff83180024 D ip6_use_deprecated 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D nchrdev -ffffffff8318c404 D mem_no -ffffffff8318c408 D swapdev -ffffffff8318c410 D constab -ffffffff8318d000 D machine -ffffffff8318d008 D lid_action -ffffffff8318d00c D pwr_action -ffffffff8318d010 D isa_constraint -ffffffff8318d020 D dma_constraint -ffffffff8318d030 D uvm_md_constraints -ffffffff8318d048 D delay_func -ffffffff8318d050 D initclock_func -ffffffff8318d058 D bootinfo_size -ffffffff8318d05c D waittime -ffffffff8318d060 D dumpmag -ffffffff8318e000 D tsc_rdtsc -ffffffff8318e008 D tsc_timecounter -ffffffff8318e058 D tsc_is_synchronized -ffffffff8318f000 D local_apic -ffffffff8318f020 D lapic_id -ffffffff8318f080 D lapic_tpr -ffffffff8318f0a0 d lapic_ppr -ffffffff8318f100 d lapic_isr -ffffffff83190000 D warn_once -ffffffff83191000 d errata -ffffffff83192000 D cpu_ucode_intel_mtx -ffffffff83193000 D mem_owner_bios -ffffffff83193008 D mrops -ffffffff83193028 D mtrrmask -ffffffff83193030 D mtrrtomrt -ffffffff83194000 D pmap_pg_wc -ffffffff83194008 D pmaps_lock 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viomb_cd -ffffffff831fb000 D viornd_cd -ffffffff831fc000 D vioscsi_cd -ffffffff831fd000 D vmmci_cd -ffffffff831fe000 D pci_cd -ffffffff831ff000 D arc_fw_hdr -ffffffff831ff008 D arc_cd -ffffffff83200000 D jmb_cd -ffffffff83201000 D mfii_cd -ffffffff83202000 D ips_cd -ffffffff83203000 D eap_cd -ffffffff83204000 D auacer_cd -ffffffff83205000 D auich_cd -ffffffff83206000 D azalia_cd -ffffffff83207000 D envy_cd -ffffffff83207020 D envy_matchids -ffffffff83207030 D envy_rates -ffffffff832070b0 D ak4524_dac -ffffffff832070d8 D ak4524_adc -ffffffff83207100 D ak4358_dac -ffffffff83207128 D ak5365_adc -ffffffff83207150 D unkenvy_codec -ffffffff83207180 D envy_cards -ffffffff832073f0 D envy_cards_ht -ffffffff83207600 d julia_eeprom -ffffffff83208000 D emu_cd -ffffffff83209000 D auixp_cd -ffffffff8320a000 D clcs_cd -ffffffff8320b000 D yds_cd -ffffffff8320c000 D auvia_cd -ffffffff8320d000 D qle_cd -ffffffff8320e000 D mpii_cd -ffffffff8320f000 D aq_cd -ffffffff83210000 D de_cd -ffffffff83211000 D pcn_cd -ffffffff83212000 D wdc_sii3114_vtbl -ffffffff83212038 D wdc_pdc203xx_vtbl -ffffffff83212070 D wdc_svwsata_vtbl -ffffffff832120a8 D pciide_cd -ffffffff832120d0 d sis_hostbr_type -ffffffff83213000 D ppb_cd -ffffffff83214000 D vr_cd -ffffffff83214020 D vr_devices -ffffffff83215000 D txp_cd -ffffffff83216000 D bt848_card_signature -ffffffff83217000 D bktr_cd -ffffffff83218000 D em_cd -ffffffff83219000 D ixgb_cd -ffffffff8321a000 D ix_cd -ffffffff8321a020 D ixgbe_smart_speed -ffffffff8321a024 D ixgbe_enable_msix -ffffffff8321b000 D ixl_cd -ffffffff8321b020 d ixl_sff_lock -ffffffff8321c000 D xge_cd -ffffffff8321d000 D thtc_cd -ffffffff8321d020 D tht_cd -ffffffff8321d040 D tht_txt_desc -ffffffff8321d068 D tht_rxf_desc -ffffffff8321d090 D tht_rxd_desc -ffffffff8321d0b8 D tht_txf_desc -ffffffff8321e000 D myx_cd -ffffffff8321f000 D oce_cd -ffffffff83220000 D dc_devs -ffffffff83221000 D cas_cd -ffffffff83222000 D sis_cd -ffffffff83223000 D se_cd -ffffffff83224000 D cbb_cd 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ngbe_cd -ffffffff83256000 D agp_cd -ffffffff83257000 D intagp_cd -ffffffff83257020 D agp_i810_methods -ffffffff83258000 D reservation_ww_class -ffffffff83259000 d bridge_lock -ffffffff83259010 d bridge_list -ffffffff8325a000 d drm_connector_enum_list -ffffffff8325a1f8 d connector_list_lock -ffffffff8325a208 d connector_list -ffffffff8325b000 d kernel_fb_helper_list -ffffffff8325b010 d kernel_fb_helper_lock -ffffffff8325c000 D drm_global_mutex -ffffffff8325d000 D sch_mtx -ffffffff8325d010 D i2c_bit_algo -ffffffff8325d020 d drm_fence_context_count -ffffffff8325d028 d dma_fence_stub_mtx -ffffffff8325d038 D wait_bit_mtx -ffffffff8325d048 D shrinkers -ffffffff8325e000 d crtc_ww_class -ffffffff8325f000 d panel_lock -ffffffff8325f010 d panel_list -ffffffff83260000 d ttm_global_mutex -ffffffff83261000 D intel_bbops -ffffffff83262000 d i915_sys_placement -ffffffff83262020 d i915_ttm_bo_driver -ffffffff83263000 d mchdev_lock -ffffffff83264000 D inteldrm_stdscreen -ffffffff83264030 D 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panel_config_defaults +ffffffff82bdd6a0 r debug_defaults_drv +ffffffff82bdd818 r cs_shift +ffffffff82bdd824 r cs_mask +ffffffff82bdd84c r hubbub_reg +ffffffff82bdd9c0 r hubbub_shift +ffffffff82bdda48 r hubbub_mask +ffffffff82bddc70 r vmid_regs +ffffffff82bdde30 r vmid_shifts +ffffffff82bdde38 r vmid_masks +ffffffff82bdde60 r hubp_regs +ffffffff82bde690 r hubp_shift +ffffffff82bde78c r hubp_mask +ffffffff82bdeb80 r dpp_regs +ffffffff82be0080 r tf_shift +ffffffff82be0350 r tf_mask +ffffffff82be0e90 r opp_regs +ffffffff82be0ff0 r opp_shift +ffffffff82be1028 r opp_mask +ffffffff82be1100 r optc_regs +ffffffff82be1600 r optc_shift +ffffffff82be16c0 r optc_mask +ffffffff82be19c0 r mpc_regs +ffffffff82be31ac r mpc_shift +ffffffff82be3288 r mpc_mask +ffffffff82be3600 r dsc_regs +ffffffff82be384c r dsc_shift +ffffffff82be3904 r dsc_mask +ffffffff82be3be0 r dwbc30_regs +ffffffff82be3dbc r dwbc30_shift +ffffffff82be3ef0 r dwbc30_mask +ffffffff82be43c0 r mcif_wb30_regs +ffffffff82be44bc r mcif_wb30_shift +ffffffff82be4568 r mcif_wb30_mask +ffffffff82be4820 r aux_engine_regs +ffffffff82be48e8 r aux_mask +ffffffff82be4948 r aux_shift +ffffffff82be4960 r i2c_hw_regs +ffffffff82be4a78 r i2c_shifts +ffffffff82be4aa4 r i2c_masks +ffffffff82be4b50 r audio_regs +ffffffff82be4c84 r audio_shift +ffffffff82be4c9c r audio_mask +ffffffff82be4cd8 r se_shift +ffffffff82be4db4 r se_mask +ffffffff82be5120 r vpg_regs +ffffffff82be5210 r vpg_shift +ffffffff82be5238 r vpg_mask +ffffffff82be52e0 r afmt_regs +ffffffff82be53b8 r afmt_shift +ffffffff82be53cc r afmt_mask +ffffffff82be5420 r stream_enc_regs +ffffffff82be6ac0 r hpo_dp_stream_enc_regs +ffffffff82be6cf0 r hpo_dp_se_shift +ffffffff82be6d18 r hpo_dp_se_mask +ffffffff82be6dc0 r apg_regs +ffffffff82be6e00 r apg_shift +ffffffff82be6e08 r apg_mask +ffffffff82be6e20 r hpo_dp_link_enc_regs +ffffffff82be6f30 r hpo_dp_le_shift +ffffffff82be6f4c r hpo_dp_le_mask +ffffffff82be6fb0 r hwseq_reg +ffffffff82be71cc r hwseq_shift +ffffffff82be724c r hwseq_mask +ffffffff82be8000 r dccg314_funcs +ffffffff82be9000 r dcn314_str_enc_funcs +ffffffff82bea000 r dcn314_funcs +ffffffff82bea2c0 r dcn314_private_funcs +ffffffff82beb000 r bios_regs +ffffffff82beb008 r res_cap_dcn314 +ffffffff82beb048 r debug_defaults_diags +ffffffff82beb1c0 r clk_src_regs +ffffffff82beb364 r dccg_regs +ffffffff82beb450 r dccg_shift +ffffffff82beb4e8 r dccg_mask +ffffffff82beb750 r abm_regs +ffffffff82beb850 r abm_shift +ffffffff82beb864 r abm_mask +ffffffff82beb8b0 r res_create_funcs +ffffffff82beb8e0 r res_create_maximus_funcs +ffffffff82beb910 r plane_cap +ffffffff82beb940 r link_enc_regs +ffffffff82bebfa0 r link_enc_aux_regs +ffffffff82bebff0 r link_enc_hpd_regs +ffffffff82bec004 r le_shift +ffffffff82bec0f4 r le_mask +ffffffff82bec4ac r link_enc_feature +ffffffff82bec4bc r panel_config_defaults +ffffffff82bec4f0 r debug_defaults_drv +ffffffff82bec668 r cs_shift +ffffffff82bec674 r cs_mask +ffffffff82bec69c r hubbub_reg +ffffffff82bec810 r hubbub_shift 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dccg_regs +ffffffff82bf6450 r dccg_shift +ffffffff82bf64e8 r dccg_mask +ffffffff82bf6750 r abm_regs +ffffffff82bf6850 r abm_shift +ffffffff82bf6864 r abm_mask +ffffffff82bf68b0 r res_create_funcs +ffffffff82bf68e0 r res_create_maximus_funcs +ffffffff82bf6910 r plane_cap +ffffffff82bf6940 r link_enc_regs +ffffffff82bf6fa0 r link_enc_aux_regs +ffffffff82bf6ff0 r link_enc_hpd_regs +ffffffff82bf7004 r le_shift +ffffffff82bf70f4 r le_mask +ffffffff82bf74ac r link_enc_feature +ffffffff82bf74bc r panel_config_defaults +ffffffff82bf74f0 r debug_defaults_drv +ffffffff82bf7668 r cs_shift +ffffffff82bf7674 r cs_mask +ffffffff82bf769c r hubbub_reg +ffffffff82bf7810 r hubbub_shift +ffffffff82bf7898 r hubbub_mask +ffffffff82bf7ac0 r vmid_regs +ffffffff82bf7c80 r vmid_shifts +ffffffff82bf7c88 r vmid_masks +ffffffff82bf7cb0 r hubp_regs +ffffffff82bf84e0 r hubp_shift +ffffffff82bf85dc r hubp_mask +ffffffff82bf89d0 r dpp_regs +ffffffff82bf9ed0 r tf_shift +ffffffff82bfa1a0 r tf_mask +ffffffff82bface0 r opp_regs +ffffffff82bfae40 r opp_shift +ffffffff82bfae78 r opp_mask +ffffffff82bfaf50 r optc_regs +ffffffff82bfb450 r optc_shift +ffffffff82bfb510 r optc_mask +ffffffff82bfb810 r mpc_regs +ffffffff82bfcffc r mpc_shift +ffffffff82bfd0d8 r mpc_mask +ffffffff82bfd450 r dsc_regs +ffffffff82bfd69c r dsc_shift +ffffffff82bfd754 r dsc_mask +ffffffff82bfda30 r dwbc30_regs +ffffffff82bfdc0c r dwbc30_shift +ffffffff82bfdd40 r dwbc30_mask +ffffffff82bfe210 r mcif_wb30_regs +ffffffff82bfe30c r mcif_wb30_shift +ffffffff82bfe3b8 r mcif_wb30_mask +ffffffff82bfe670 r aux_engine_regs +ffffffff82bfe738 r aux_mask +ffffffff82bfe798 r aux_shift +ffffffff82bfe7b0 r i2c_hw_regs +ffffffff82bfe8c8 r i2c_shifts +ffffffff82bfe8f4 r i2c_masks +ffffffff82bfe9a0 r audio_regs +ffffffff82bfead4 r audio_shift +ffffffff82bfeaec r audio_mask +ffffffff82bfeb30 r stream_enc_regs +ffffffff82bff1d4 r se_shift +ffffffff82bff2b0 r se_mask +ffffffff82bff620 r vpg_regs +ffffffff82bff710 r vpg_shift +ffffffff82bff738 r vpg_mask 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r hpo_dp_se_mask +ffffffff82c16f7c r apg_shift +ffffffff82c16f84 r apg_mask +ffffffff82c16f9c r hpo_dp_le_shift +ffffffff82c16fb8 r hpo_dp_le_mask +ffffffff82c1701c r hwseq_shift +ffffffff82c1709c r hwseq_mask +ffffffff82c18000 r dcn321_link_enc_funcs +ffffffff82c19000 r res_cap_dcn321 +ffffffff82c19040 r debug_defaults_diags +ffffffff82c191b8 r dccg_shift +ffffffff82c19250 r dccg_mask +ffffffff82c194ac r abm_shift +ffffffff82c194c0 r abm_mask +ffffffff82c19508 r res_create_funcs +ffffffff82c19538 r res_create_maximus_funcs +ffffffff82c19568 r plane_cap +ffffffff82c19594 r le_shift +ffffffff82c19684 r le_mask +ffffffff82c19a3c r link_enc_feature +ffffffff82c19a50 r debug_defaults_drv +ffffffff82c19bc8 r cs_shift +ffffffff82c19bd4 r cs_mask +ffffffff82c19bfc r hubbub_shift +ffffffff82c19c84 r hubbub_mask +ffffffff82c19ea0 r vmid_shifts +ffffffff82c19ea8 r vmid_masks +ffffffff82c19ec8 r hubp_shift +ffffffff82c19fc4 r hubp_mask +ffffffff82c1a3b4 r tf_shift +ffffffff82c1a684 r tf_mask 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+ffffffff82c1f000 R dcn10_soc_defaults +ffffffff82c1f08c R dcn10_ip_defaults +ffffffff82c2a000 R dml20_funcs +ffffffff82c2a030 R dml20v2_funcs +ffffffff82c2a060 R dml21_funcs +ffffffff82c2a090 R dml30_funcs +ffffffff82c2a0c0 R dml31_funcs +ffffffff82c2a0f0 R dml314_funcs +ffffffff82c2a120 R dml32_funcs +ffffffff82c2d000 R qp_table_422_10bpc_min +ffffffff82c2d740 R qp_table_444_8bpc_max +ffffffff82c2e080 R qp_table_420_12bpc_max +ffffffff82c2e7c0 R qp_table_444_10bpc_min +ffffffff82c2f400 R qp_table_420_8bpc_max +ffffffff82c2f840 R qp_table_444_8bpc_min +ffffffff82c30180 R qp_table_444_12bpc_min +ffffffff82c310c0 R qp_table_420_12bpc_min +ffffffff82c31800 R qp_table_422_12bpc_min +ffffffff82c32140 R qp_table_422_12bpc_max +ffffffff82c32a80 R qp_table_444_12bpc_max +ffffffff82c339c0 R qp_table_420_8bpc_min +ffffffff82c33e00 R qp_table_422_8bpc_min +ffffffff82c34340 R qp_table_422_10bpc_max +ffffffff82c34a80 R qp_table_420_10bpc_max +ffffffff82c35040 R qp_table_420_10bpc_min +ffffffff82c35600 R qp_table_444_10bpc_max +ffffffff82c36240 R qp_table_422_8bpc_max +ffffffff82c38000 r funcs +ffffffff82c38050 r hpd_regs +ffffffff82c381a0 r hpd_shift +ffffffff82c381b0 r hpd_mask +ffffffff82c381c0 r ddc_data_regs +ffffffff82c383a0 r ddc_clk_regs +ffffffff82c38580 r ddc_shift +ffffffff82c385a8 r ddc_mask +ffffffff82c39000 r funcs +ffffffff82c3a000 r funcs +ffffffff82c3a050 r hpd_regs +ffffffff82c3a1a0 r hpd_shift +ffffffff82c3a1b0 r hpd_mask +ffffffff82c3a1c0 r ddc_data_regs +ffffffff82c3a3a0 r ddc_clk_regs +ffffffff82c3a580 r ddc_shift +ffffffff82c3a5a8 r ddc_mask +ffffffff82c3b000 r funcs +ffffffff82c3c000 r funcs +ffffffff82c3c050 r hpd_regs +ffffffff82c3c1a0 r hpd_shift +ffffffff82c3c1b0 r hpd_mask +ffffffff82c3c1c0 r ddc_data_regs +ffffffff82c3c3a0 r ddc_clk_regs +ffffffff82c3c580 r ddc_shift +ffffffff82c3c5a8 r ddc_mask +ffffffff82c3d000 r funcs +ffffffff82c3e000 r funcs +ffffffff82c3e050 r hpd_regs +ffffffff82c3e1a0 r hpd_shift +ffffffff82c3e1b0 r hpd_mask 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r irq_source_info_dce120 +ffffffff82c52000 r irq_service_funcs_dce80 +ffffffff82c52008 r dummy_irq_info_funcs +ffffffff82c52018 r hpd_irq_info_funcs +ffffffff82c52028 r hpd_rx_irq_info_funcs +ffffffff82c52038 r pflip_irq_info_funcs +ffffffff82c52048 r vupdate_irq_info_funcs +ffffffff82c52058 r vblank_irq_info_funcs +ffffffff82c52070 r irq_source_info_dce80 +ffffffff82c54000 r irq_service_funcs_dcn10 +ffffffff82c54008 r dummy_irq_info_funcs +ffffffff82c54018 r hpd_irq_info_funcs +ffffffff82c54028 r hpd_rx_irq_info_funcs +ffffffff82c54038 r pflip_irq_info_funcs +ffffffff82c54048 r vupdate_no_lock_irq_info_funcs +ffffffff82c54058 r vblank_irq_info_funcs +ffffffff82c54068 r vline0_irq_info_funcs +ffffffff82c54080 r irq_source_info_dcn10 +ffffffff82c56000 r irq_service_funcs_dcn20 +ffffffff82c56008 r dummy_irq_info_funcs +ffffffff82c56018 r hpd_irq_info_funcs +ffffffff82c56028 r hpd_rx_irq_info_funcs +ffffffff82c56038 r pflip_irq_info_funcs +ffffffff82c56048 r vupdate_no_lock_irq_info_funcs +ffffffff82c56058 r vblank_irq_info_funcs +ffffffff82c56068 r vline0_irq_info_funcs +ffffffff82c56080 r irq_source_info_dcn20 +ffffffff82c58000 r irq_service_funcs_dcn201 +ffffffff82c58008 r dummy_irq_info_funcs +ffffffff82c58018 r hpd_irq_info_funcs +ffffffff82c58028 r hpd_rx_irq_info_funcs +ffffffff82c58038 r pflip_irq_info_funcs +ffffffff82c58048 r vupdate_no_lock_irq_info_funcs +ffffffff82c58058 r vblank_irq_info_funcs +ffffffff82c58068 r vline0_irq_info_funcs +ffffffff82c58080 r irq_source_info_dcn201 +ffffffff82c5a000 r irq_source_info_dcn21 +ffffffff82c5b290 r irq_service_funcs_dcn21 +ffffffff82c5b298 r dummy_irq_info_funcs +ffffffff82c5b2a8 r hpd_irq_info_funcs +ffffffff82c5b2b8 r hpd_rx_irq_info_funcs +ffffffff82c5b2c8 r pflip_irq_info_funcs +ffffffff82c5b2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c5b2e8 r vblank_irq_info_funcs +ffffffff82c5b2f8 r vline0_irq_info_funcs +ffffffff82c5b308 r dmub_outbox_irq_info_funcs +ffffffff82c5c000 r irq_source_info_dcn30 +ffffffff82c5d290 r irq_service_funcs_dcn30 +ffffffff82c5d298 r dummy_irq_info_funcs +ffffffff82c5d2a8 r hpd_irq_info_funcs +ffffffff82c5d2b8 r hpd_rx_irq_info_funcs +ffffffff82c5d2c8 r pflip_irq_info_funcs +ffffffff82c5d2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c5d2e8 r vblank_irq_info_funcs +ffffffff82c5d2f8 r vline0_irq_info_funcs +ffffffff82c5d308 r dmub_trace_irq_info_funcs +ffffffff82c5e000 r irq_source_info_dcn302 +ffffffff82c5f290 r irq_service_funcs_dcn302 +ffffffff82c5f298 r dummy_irq_info_funcs +ffffffff82c5f2a8 r hpd_irq_info_funcs +ffffffff82c5f2b8 r hpd_rx_irq_info_funcs +ffffffff82c5f2c8 r pflip_irq_info_funcs +ffffffff82c5f2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c5f2e8 r vblank_irq_info_funcs +ffffffff82c5f2f8 r vline0_irq_info_funcs +ffffffff82c5f308 r dmub_trace_irq_info_funcs +ffffffff82c60000 r irq_service_funcs_dcn303 +ffffffff82c60008 r dummy_irq_info_funcs +ffffffff82c60018 r hpd_irq_info_funcs +ffffffff82c60028 r hpd_rx_irq_info_funcs +ffffffff82c60038 r pflip_irq_info_funcs +ffffffff82c60048 r vupdate_no_lock_irq_info_funcs +ffffffff82c60058 r vblank_irq_info_funcs +ffffffff82c60068 r vline0_irq_info_funcs +ffffffff82c60080 r irq_source_info_dcn303 +ffffffff82c62000 r irq_source_info_dcn31 +ffffffff82c63290 r irq_service_funcs_dcn31 +ffffffff82c63298 r dummy_irq_info_funcs +ffffffff82c632a8 r hpd_irq_info_funcs +ffffffff82c632b8 r hpd_rx_irq_info_funcs +ffffffff82c632c8 r pflip_irq_info_funcs +ffffffff82c632d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c632e8 r vblank_irq_info_funcs +ffffffff82c632f8 r vline0_irq_info_funcs +ffffffff82c63308 r outbox_irq_info_funcs +ffffffff82c64000 r irq_source_info_dcn314 +ffffffff82c65290 r irq_service_funcs_dcn314 +ffffffff82c65298 r dummy_irq_info_funcs +ffffffff82c652a8 r hpd_irq_info_funcs +ffffffff82c652b8 r hpd_rx_irq_info_funcs +ffffffff82c652c8 r pflip_irq_info_funcs +ffffffff82c652d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c652e8 r vblank_irq_info_funcs +ffffffff82c652f8 r vline0_irq_info_funcs +ffffffff82c65308 r outbox_irq_info_funcs +ffffffff82c66000 r irq_source_info_dcn315 +ffffffff82c67290 r irq_service_funcs_dcn315 +ffffffff82c67298 r dummy_irq_info_funcs +ffffffff82c672a8 r hpd_irq_info_funcs +ffffffff82c672b8 r hpd_rx_irq_info_funcs +ffffffff82c672c8 r pflip_irq_info_funcs +ffffffff82c672d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c672e8 r vblank_irq_info_funcs +ffffffff82c672f8 r vline0_irq_info_funcs +ffffffff82c67308 r outbox_irq_info_funcs +ffffffff82c68000 r irq_source_info_dcn32 +ffffffff82c69290 r irq_service_funcs_dcn32 +ffffffff82c69298 r dummy_irq_info_funcs +ffffffff82c692a8 r hpd_irq_info_funcs +ffffffff82c692b8 r hpd_rx_irq_info_funcs +ffffffff82c692c8 r pflip_irq_info_funcs +ffffffff82c692d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c692e8 r vblank_irq_info_funcs +ffffffff82c692f8 r vline0_irq_info_funcs +ffffffff82c69308 r outbox_irq_info_funcs +ffffffff82c6a000 r dio_link_hwss +ffffffff82c6b000 r dpia_link_hwss +ffffffff82c6c000 r hpo_dp_link_hwss +ffffffff82c6d000 r virtual_lnk_enc_funcs +ffffffff82c6e000 r virtual_link_hwss +ffffffff82c6f000 r virtual_str_enc_funcs +ffffffff82c70000 R dmub_srv_dcn20_regs +ffffffff82c71000 R dmub_srv_dcn21_regs +ffffffff82c72000 R dmub_srv_dcn30_regs +ffffffff82c73000 R dmub_srv_dcn301_regs +ffffffff82c74000 R dmub_srv_dcn302_regs +ffffffff82c75000 R dmub_srv_dcn303_regs +ffffffff82c76000 R dmub_srv_dcn31_regs +ffffffff82c77000 R dmub_srv_dcn315_regs +ffffffff82c78000 R dmub_srv_dcn316_regs +ffffffff82c79000 R dmub_srv_dcn32_regs +ffffffff82c7a000 r numerator01 +ffffffff82c7a020 r numerator02 +ffffffff82c7a040 r numerator04 +ffffffff82c7a060 r numerator05 +ffffffff82c7c000 r abm_settings +ffffffff82c7c010 r abm_settings_config0 +ffffffff82c7c050 r abm_settings_config1 +ffffffff82c7c088 r min_reduction_table_v_2_2 +ffffffff82c7c095 r max_reduction_table_v_2_2 +ffffffff82c7c0a2 r min_reduction_table +ffffffff82c7c0af r max_reduction_table +ffffffff82c7d000 R amdgpu_pp_profile_name +ffffffff82c7e000 r pp_lib_thermal_controller_names +ffffffff82c7f000 r pp_ip_funcs +ffffffff82c7f0a0 R pp_smu_ip_block +ffffffff82c7f0b8 r pp_dpm_funcs +ffffffff82c80000 r gpio_tbl +ffffffff82c800f0 r enable_fb_req_rej_tbl +ffffffff82c80140 r use_bclk_tbl +ffffffff82c80310 r turn_off_plls_tbl +ffffffff82c80640 r enter_baco_tbl +ffffffff82c80730 r exit_baco_tbl +ffffffff82c80850 r clean_baco_tbl +ffffffff82c81000 r gpio_tbl +ffffffff82c810f0 r enable_fb_req_rej_tbl +ffffffff82c81140 r use_bclk_tbl +ffffffff82c812e0 r turn_off_plls_tbl +ffffffff82c81370 r clk_req_b_tbl +ffffffff82c81490 r enter_baco_tbl +ffffffff82c815b0 r exit_baco_tbl +ffffffff82c816d0 r clean_baco_tbl +ffffffff82c82000 r gpio_tbl +ffffffff82c820f0 r enable_fb_req_rej_tbl +ffffffff82c82140 r use_bclk_tbl_vg +ffffffff82c82200 r turn_off_plls_tbl_vg +ffffffff82c82350 r use_bclk_tbl +ffffffff82c82440 r turn_off_plls_tbl +ffffffff82c825f0 r clk_req_b_tbl +ffffffff82c82710 r enter_baco_tbl +ffffffff82c82830 r exit_baco_tbl +ffffffff82c82950 r clean_baco_tbl +ffffffff82c83000 r vega10_fuses_default +ffffffff82c92000 r pp_r600_encode_lanes +ffffffff82c93000 R pptable_v1_0_funcs +ffffffff82c94000 R pptable_funcs +ffffffff82c94020 r soft_dummy_pp_table +ffffffff82c95000 r smu10_hwmgr_funcs +ffffffff82c96000 r smu7_hwmgr_funcs +ffffffff82c962f8 r smu7_irq_funcs +ffffffff82c96310 r SMU7ThermalPolicy +ffffffff82c97000 r GCCACConfig_Polaris10 +ffffffff82c971b0 r DIDTConfig_Polaris10 +ffffffff82c97a50 r GCCACConfig_Polaris11 +ffffffff82c97c00 r DIDTConfig_Polaris11_Kicker +ffffffff82c984a0 r DIDTConfig_Polaris11 +ffffffff82c98d40 r DIDTConfig_Polaris12 +ffffffff82c995e0 r GCCACConfig_VegaM +ffffffff82c99790 r DIDTConfig_VegaM +ffffffff82c9b000 r smu8_hwmgr_funcs +ffffffff82c9b2f0 r SMU7ThermalPolicy +ffffffff82c9c000 r smu9_irq_funcs +ffffffff82c9d000 r gpio_tbl_iceland +ffffffff82c9d060 r gpio_tbl +ffffffff82c9d150 r enable_fb_req_rej_tbl +ffffffff82c9d1a0 r use_bclk_tbl +ffffffff82c9d370 r turn_off_plls_tbl +ffffffff82c9d610 r enter_baco_tbl +ffffffff82c9d730 r exit_baco_tbl_iceland +ffffffff82c9d870 r clean_baco_tbl_iceland +ffffffff82c9d890 r exit_baco_tbl +ffffffff82c9d9b0 r clean_baco_tbl +ffffffff82c9e000 r pre_baco_tbl +ffffffff82c9e090 r enter_baco_tbl +ffffffff82c9e2b0 r exit_baco_tbl +ffffffff82c9e520 r clean_baco_tbl +ffffffff82c9f000 r vega10_hwmgr_funcs +ffffffff82c9f2f0 r channel_number +ffffffff82c9f320 r SMU7ThermalWithDelayPolicy +ffffffff82ca0000 r SEDiDtStallCtrlConfig_vega10 +ffffffff82ca0110 r SEDiDtStallPatternConfig_vega10 +ffffffff82ca02e0 r SEDiDtWeightConfig_Vega10 +ffffffff82ca03b0 r SEDiDtCtrl1Config_Vega10 +ffffffff82ca0440 r SEDiDtCtrl2Config_Vega10 +ffffffff82ca0510 r SEDiDtCtrl3Config_vega10 +ffffffff82ca0820 r SEDiDtTuningCtrlConfig_Vega10 +ffffffff82ca08b0 r SELCacConfig_Vega10 +ffffffff82ca0a40 r SEDiDtCtrl0Config_Vega10 +ffffffff82ca0d10 r AvfsPSMInitConfig_vega10 +ffffffff82ca0d90 r SEEDCStallPatternConfig_Vega10 +ffffffff82ca0ea0 r SEEDCStallDelayConfig_Vega10 +ffffffff82ca0f80 r SEEDCCtrlConfig_Vega10 +ffffffff82ca1040 r PSMSEEDCStallPatternConfig_Vega10 +ffffffff82ca10c0 r PSMSEEDCStallDelayConfig_Vega10 +ffffffff82ca11d0 r PSMSEEDCCtrlResetConfig_Vega10 +ffffffff82ca1290 r PSMSEEDCCtrlConfig_Vega10 +ffffffff82ca1350 r SEEDCForceStallPatternConfig_Vega10 +ffffffff82ca13e0 r SEEDCCtrlForceStallConfig_Vega10 +ffffffff82ca2000 R vega10_pptable_funcs +ffffffff82ca3000 r pre_baco_tbl +ffffffff82ca3090 r enter_baco_tbl +ffffffff82ca32b0 r exit_baco_tbl +ffffffff82ca3520 r clean_baco_tbl +ffffffff82ca4000 r vega12_hwmgr_funcs +ffffffff82ca42f0 r SMU7ThermalWithDelayPolicy +ffffffff82ca4340 r link_width +ffffffff82ca5000 R vega12_pptable_funcs +ffffffff82ca6000 r clean_baco_tbl +ffffffff82ca7000 r vega20_hwmgr_funcs +ffffffff82ca72f0 r SMU7ThermalWithDelayPolicy +ffffffff82ca7340 r link_width +ffffffff82ca8000 R vega20_pptable_funcs +ffffffff82ca9000 R ci_smu_funcs +ffffffff82ca90e0 r defaults_hawaii_pro +ffffffff82ca912c r defaults_hawaii_xt +ffffffff82ca9178 r defaults_saturn_xt +ffffffff82ca91c4 r defaults_bonaire_xt +ffffffff82ca9210 r ci_program_jump_on_start.data +ffffffff82caa000 R fiji_smu_funcs +ffffffff82caa0e0 r avfs_graphics_level +ffffffff82caa240 r fiji_power_tune_data_set_array +ffffffff82caa246 r fiji_clock_stretch_amount_conversion +ffffffff82caa260 r fiji_clock_stretcher_ddt_table +ffffffff82cab000 R iceland_smu_funcs +ffffffff82cab0e0 r defaults_icelandxt +ffffffff82cab12c r defaults_icelandpro +ffffffff82cab178 r defaults_iceland +ffffffff82cac000 R polaris10_smu_funcs +ffffffff82cac0e0 r avfs_graphics_level_polaris10 +ffffffff82cac2a0 r avfs_memory_level_polaris10 +ffffffff82cac2c0 r polaris10_power_tune_data_set_array +ffffffff82cac310 r Range_Table +ffffffff82cad000 R smu10_smu_funcs +ffffffff82cae000 r smu7_program_jump_on_start.data +ffffffff82cae010 r pwr_virus_table_pre +ffffffff82cae680 r pwr_virus_table_post +ffffffff82caef80 r pwr_virus_section1 +ffffffff82caf610 r pwr_virus_section2 +ffffffff82caf660 r pwr_virus_section3 +ffffffff82cb6ab0 r pwr_virus_section4 +ffffffff82cb6e80 r pwr_virus_section5 +ffffffff82cb7490 r pwr_virus_section6 +ffffffff82cb9000 R smu8_smu_funcs +ffffffff82cba000 R tonga_smu_funcs +ffffffff82cba0e0 r tonga_power_tune_data_set_array +ffffffff82cba12c r tonga_clock_stretch_amount_conversion +ffffffff82cba140 r tonga_clock_stretcher_ddt_table +ffffffff82cbb000 R vega10_smu_funcs +ffffffff82cbc000 R vega12_smu_funcs +ffffffff82cbd000 R vega20_smu_funcs +ffffffff82cbe000 R vegam_smu_funcs +ffffffff82cbe0e0 r vegam_power_tune_data_set_array +ffffffff82cbe130 r Range_Table +ffffffff82cbf000 R smu_ip_funcs +ffffffff82cbf0a0 R smu_v11_0_ip_block +ffffffff82cbf0b8 R smu_v12_0_ip_block +ffffffff82cbf0d0 R smu_v13_0_ip_block +ffffffff82cbf0e8 r swsmu_pm_funcs +ffffffff82cc0000 r arcturus_table_map +ffffffff82cc0080 r arcturus_pwr_src_map +ffffffff82cc0090 r arcturus_workload_map +ffffffff82cc00d0 r arcturus_ppt_funcs +ffffffff82cc04a0 r smu11_thermal_policy +ffffffff82cc04f0 r arcturus_i2c_algo +ffffffff82cc0500 r arcturus_i2c_control_quirks +ffffffff82cc0510 r arcturus_throttler_map +ffffffff82cc0530 r arcturus_message_map +ffffffff82cc0f80 r arcturus_clk_map +ffffffff82cc1040 r arcturus_feature_mask_map +ffffffff82cc2000 r cyan_skillfish_ppt_funcs +ffffffff82cc3000 r navi10_ppt_funcs +ffffffff82cc33d0 r smu11_thermal_policy +ffffffff82cc3420 r navi10_i2c_algo +ffffffff82cc3430 r navi10_i2c_control_quirks +ffffffff82cc3440 r navi1x_throttler_map +ffffffff82cc3460 r NoDbiPrbs7 +ffffffff82cc4460 r DbiPrbs7 +ffffffff82cc6000 r sienna_cichlid_ppt_funcs +ffffffff82cc63d0 r smu11_thermal_policy +ffffffff82cc6420 r sienna_cichlid_i2c_algo +ffffffff82cc6430 r sienna_cichlid_i2c_control_quirks +ffffffff82cc6440 r sienna_cichlid_throttler_map +ffffffff82cc7000 r smu_v11_0_irq_funcs +ffffffff82cc7010 r link_width +ffffffff82cc8000 r vangogh_ppt_funcs +ffffffff82cc83d0 r vangogh_throttler_map +ffffffff82cc9000 r renoir_ppt_funcs +ffffffff82cc93d0 r renoir_throttler_map +ffffffff82cca000 r aldebaran_clk_map +ffffffff82cca0c0 r aldebaran_table_map +ffffffff82cca140 r aldebaran_ppt_funcs +ffffffff82cca510 r smu13_thermal_policy +ffffffff82cca560 r aldebaran_i2c_algo +ffffffff82cca570 r aldebaran_i2c_control_quirks +ffffffff82cca580 r aldebaran_throttler_map +ffffffff82cca5a0 r aldebaran_message_map +ffffffff82ccaff0 r aldebaran_feature_mask_map +ffffffff82ccc000 r smu_v13_0_irq_funcs +ffffffff82ccc010 r link_width +ffffffff82ccd000 r smu_v13_0_0_ppt_funcs +ffffffff82ccd3d0 r smu13_thermal_policy +ffffffff82ccd420 r smu_v13_0_0_i2c_algo +ffffffff82ccd430 r smu_v13_0_0_i2c_control_quirks +ffffffff82ccd440 r smu_v13_0_0_throttler_map +ffffffff82cce000 r smu_v13_0_4_ppt_funcs +ffffffff82ccf000 r smu_v13_0_5_ppt_funcs +ffffffff82cd0000 r smu_v13_0_7_ppt_funcs +ffffffff82cd03d0 r smu13_thermal_policy +ffffffff82cd0420 r smu_v13_0_7_throttler_map +ffffffff82cd1000 r yellow_carp_ppt_funcs +ffffffff82cd2000 r __smu_message_names +ffffffff82cd3000 R pchb_ca +ffffffff82cd4000 R amas_ca +ffffffff82cd4028 R amas_devices +ffffffff82cd4040 r amas_feature +ffffffff82cd5000 R cardslot_ca +ffffffff82cd6000 R cardbus_ca +ffffffff82cd7000 R com_cardbus_ca +ffffffff82cd8000 R xl_cardbus_ca +ffffffff82cd8030 R xl_cardbus_products +ffffffff82cd9000 R dc_cardbus_ca +ffffffff82cd9030 R dc_cardbus_devices +ffffffff82cda000 R fxp_cardbus_ca +ffffffff82cda028 R fxp_cardbus_devices +ffffffff82cdb000 R rl_cardbus_devices +ffffffff82cdb028 R rl_cardbus_ca +ffffffff82cdc000 R re_cardbus_ca +ffffffff82cdc028 R re_cardbus_devices +ffffffff82cdd000 R ath_cardbus_ca +ffffffff82cde000 R athn_cardbus_ca +ffffffff82cde030 r athn_cardbus_devices +ffffffff82cdf000 R atw_cardbus_ca +ffffffff82cdf028 R atw_cardbus_devices +ffffffff82ce0000 R rtw_cardbus_ca +ffffffff82ce0028 R rtw_cardbus_devices +ffffffff82ce1000 R ral_cardbus_ca +ffffffff82ce1030 r ral_cardbus_devices +ffffffff82ce2000 R acx_cardbus_ca +ffffffff82ce2028 r acx_cardbus_devices +ffffffff82ce3000 R pgt_cardbus_ca +ffffffff82ce3028 R pgt_cardbus_devices +ffffffff82ce4000 R ehci_cardbus_ca +ffffffff82ce5000 R ohci_cardbus_ca +ffffffff82ce6000 R uhci_cardbus_ca +ffffffff82ce7000 R malo_cardbus_ca +ffffffff82ce7028 r malo_cardbus_devices +ffffffff82ce8000 R bwi_cardbus_ca +ffffffff82ce8030 r bwi_cardbus_devices +ffffffff82ce9000 R pcmcia_ca +ffffffff82cea000 r pcmcia_parse_cis_tuple.init_cfe +ffffffff82ceb000 r pcmcia_cis_quirks +ffffffff82cec000 R ep_pcmcia_ca +ffffffff82ced000 R ne_pcmcia_ca +ffffffff82ced030 R ne2000devs +ffffffff82cef000 R aic_pcmcia_ca +ffffffff82cf0000 R com_pcmcia_ca +ffffffff82cf1000 R wdc_pcmcia_ca +ffffffff82cf2000 R sm_pcmcia_ca +ffffffff82cf3000 R xe_pcmcia_ca +ffffffff82cf4000 R wi_pcmcia_ca +ffffffff82cf4030 r wi_pcmcia_products +ffffffff82cf5000 R malo_pcmcia_ca +ffffffff82cf6000 R an_pcmcia_ca +ffffffff82cf7000 R pcib_ca +ffffffff82cf8000 R amdpcib_ca +ffffffff82cf8028 R amdpcib_devices +ffffffff82cf9000 R tcpcib_ca +ffffffff82cf9028 R tcpcib_devices +ffffffff82cfa000 R aapic_ca +ffffffff82cfb000 R hme_pci_ca +ffffffff82cfb028 r hme_promhdr +ffffffff82cfb02a r hme_promdat +ffffffff82cfc000 R isa_ca +ffffffff82cfd000 R isadma_ca +ffffffff82cfe000 R fdc_ca +ffffffff82cff000 R fd_ca +ffffffff82d00000 R com_isa_ca +ffffffff82d01000 R pckbc_isa_ca +ffffffff82d02000 R vga_isa_ca +ffffffff82d03000 R wdc_isa_ca +ffffffff82d04000 R mpu_midi_hw_if +ffffffff82d05000 R mpu_isa_ca +ffffffff82d06000 R pcppi_ca +ffffffff82d07000 R spkr_ca +ffffffff82d07030 r pitchtab +ffffffff82d08000 R lpt_isa_ca +ffffffff82d09000 R wbsio_ca +ffffffff82d0a000 R schsio_ca +ffffffff82d0b000 R lm_isa_ca +ffffffff82d0b028 R lm_wbsio_ca +ffffffff82d0c000 R it_sensors +ffffffff82d0c110 R it_vrfact +ffffffff82d0c140 R it_fan_regs +ffffffff82d0c160 R it_fan_ext_regs +ffffffff82d0c178 R it_ca +ffffffff82d0d000 R abitkv_sensors +ffffffff82d0d200 R abitaa_sensors +ffffffff82d0d480 R abitav_sensors +ffffffff82d0d700 R abitas_sensors +ffffffff82d0d980 R abitax_sensors +ffffffff82d0dbc0 R abitm4_sensors +ffffffff82d0de80 R abitan_sensors +ffffffff82d0e120 R abital_sensors +ffffffff82d0e3a0 R abitaw_sensors +ffffffff82d0e700 R abitni_sensors +ffffffff82d0e9a0 R abitat_sensors +ffffffff82d0ecc0 R abitan2_sensors +ffffffff82d0ef60 R abitab_sensors +ffffffff82d0f220 R abitan3_sensors +ffffffff82d0f500 R abitaw2_sensors +ffffffff82d0f860 R abitat2_sensors +ffffffff82d0fb60 R abitab2_sensors +ffffffff82d0fea0 R abitin_sensors +ffffffff82d101e0 R uguru_ca +ffffffff82d11000 R aps_ca +ffffffff82d12000 R wsdisplay_emul_ca +ffffffff82d12030 r charClass +ffffffff82d13000 r usl_syncops +ffffffff82d14000 R wsevent_filtops +ffffffff82d15000 R wskbd_ca +ffffffff82d16000 r latin1_to_upper +ffffffff82d17000 R wsmouse_ca +ffffffff82d18000 R cyrillic_to_koi8 +ffffffff82d18060 R unicode_to_latin2 +ffffffff82d180e0 R unicode_to_latin7 +ffffffff82d19000 R wsemul_vt100_ops +ffffffff82d1a000 r decspcgr2uni +ffffffff82d1a100 r dectech2uni +ffffffff82d1a200 r nrctable +ffffffff82d1a320 r nrcovlpos +ffffffff82d1b000 r vt100_fkeys +ffffffff82d1b0c0 r vt100_pfkeys +ffffffff82d1b0e0 r vt100_numpad +ffffffff82d1c000 R pckbd_ca +ffffffff82d1c028 R pckbd_accessops +ffffffff82d1c040 R pckbd_consops +ffffffff82d1c060 R pckbd_keymapdata +ffffffff82d1c070 R pckbd_xtbl +ffffffff82d1c100 R pckbd_xtbl_ext +ffffffff82d1d000 r pckbd_keydesc_us +ffffffff82d1d250 r pckbd_keydesc_de +ffffffff82d1d2f0 r pckbd_keydesc_de_nodead +ffffffff82d1d310 r pckbd_keydesc_fr +ffffffff82d1d3d0 r pckbd_keydesc_fr_dvorak_bepo +ffffffff82d1d510 r pckbd_keydesc_dk +ffffffff82d1d5a0 r pckbd_keydesc_dk_nodead +ffffffff82d1d5b0 r pckbd_keydesc_it +ffffffff82d1d640 r pckbd_keydesc_uk +ffffffff82d1d6e0 r pckbd_keydesc_jp +ffffffff82d1d750 r pckbd_keydesc_sv +ffffffff82d1d780 r pckbd_keydesc_sv_nodead +ffffffff82d1d790 r pckbd_keydesc_no +ffffffff82d1d7c0 r pckbd_keydesc_no_nodead +ffffffff82d1d7d0 r pckbd_keydesc_us_declk +ffffffff82d1d860 r pckbd_keydesc_us_dvorak +ffffffff82d1d900 r pckbd_keydesc_us_colemak +ffffffff82d1d948 r pckbd_keydesc_swapctrlcaps +ffffffff82d1d960 r pckbd_keydesc_iopener +ffffffff82d1d9b0 r pckbd_keydesc_es +ffffffff82d1da50 r pckbd_keydesc_be +ffffffff82d1db10 r pckbd_keydesc_ru +ffffffff82d1dc80 r pckbd_keydesc_ua +ffffffff82d1de10 r pckbd_keydesc_sg +ffffffff82d1dec0 r pckbd_keydesc_sg_nodead +ffffffff82d1dee0 r pckbd_keydesc_sf +ffffffff82d1df00 r pckbd_keydesc_pt +ffffffff82d1df90 r pckbd_keydesc_lt +ffffffff82d1e070 r pckbd_keydesc_la +ffffffff82d1e100 r pckbd_keydesc_br +ffffffff82d1e180 r pckbd_keydesc_tr +ffffffff82d1e230 r pckbd_keydesc_tr_nodead +ffffffff82d1e250 r pckbd_keydesc_pl +ffffffff82d1e2b0 r pckbd_keydesc_hu +ffffffff82d1e3c0 r pckbd_keydesc_si +ffffffff82d1e4d0 r pckbd_keydesc_cf +ffffffff82d1e5a0 r pckbd_keydesc_cf_nodead +ffffffff82d1e5c0 r pckbd_keydesc_lv +ffffffff82d1e640 r pckbd_keydesc_nl +ffffffff82d1e720 r pckbd_keydesc_nl_nodead +ffffffff82d1e740 r pckbd_keydesc_is +ffffffff82d1e7cc r pckbd_keydesc_is_nodead +ffffffff82d1e7e0 r pckbd_keydesc_ee +ffffffff82d1e890 r pckbd_keydesc_ee_nodead +ffffffff82d1e8b0 R pckbd_keydesctab +ffffffff82d1f000 R pms_ca +ffffffff82d1f028 R pms_accessops +ffffffff82d1f040 R pms_sec_accessops +ffffffff82d1f060 R pms_protocols +ffffffff82d1f1e0 r alps_models +ffffffff82d20000 R skgpio_led_offset +ffffffff82d20008 R skgpio_ca +ffffffff82d21000 R hidkbd_trtab +ffffffff82d21100 r apple_fn_trans +ffffffff82d21120 r apple_tb_trans +ffffffff82d21140 r apple_mba_trans +ffffffff82d22000 r hidcc_attach_wskbd.accessops +ffffffff82d22020 r hidcc_keysyms +ffffffff82d23000 R usb_ca +ffffffff82d24000 R usb_known_products +ffffffff82d2ff40 R usb_known_vendors +ffffffff82d32740 R usbd_error_strs +ffffffff82d33000 R usb_quirks +ffffffff82d33390 R usb_dev_quirks +ffffffff82d33398 R usbd_no_quirk +ffffffff82d34000 R uhub_ca +ffffffff82d34028 R uhub_uhub_ca +ffffffff82d35000 R uaudio_ca +ffffffff82d35028 R uaudio_hw_if +ffffffff82d350e0 R uaudio_rates +ffffffff82d35120 r uaudio_clkname.names +ffffffff82d35140 r uaudio_feature_addent.features +ffffffff82d36000 R uvideo_ca +ffffffff82d36028 R uvideo_hw_if +ffffffff82d36100 R uvideo_devs +ffffffff82d37000 r utvfu_select_norm.pal +ffffffff82d37040 r utvfu_select_norm.ntsc +ffffffff82d37080 r utvfu_setup_capture.setup +ffffffff82d37180 r utvfu_audio_start_chip.setup +ffffffff82d371c8 r utvfu_audio_stop_chip.setup +ffffffff82d371d8 R utvfu_ca +ffffffff82d37200 R utvfu_vid_hw_if +ffffffff82d372d0 R utvfu_au_hw_if +ffffffff82d38000 R udl_ca +ffffffff82d38030 r udl_devs +ffffffff82d380b0 r udl_modes +ffffffff82d39000 R umidi_hw_if +ffffffff82d39030 R umidi_ca +ffffffff82d39060 r umidi_evlen +ffffffff82d39080 r packet_length +ffffffff82d3a000 r quirk_name +ffffffff82d3b000 R ucom_ca +ffffffff82d3c000 R ugen_ca +ffffffff82d3c028 R ugenread_intr_filtops +ffffffff82d3c058 R ugenread_isoc_filtops +ffffffff82d3d000 R uhidev_ca +ffffffff82d3d030 r uhid_graphire_report_descr +ffffffff82d3d0b0 r uhid_graphire3_4x5_report_descr +ffffffff82d3d160 r uhid_xb360gp_report_descr +ffffffff82d3d210 r uhid_xbonegp_report_descr +ffffffff82d3e000 R uhid_ca +ffffffff82d3e028 R uhidread_filtops +ffffffff82d3f000 R fido_ca +ffffffff82d40000 R ujoy_ca +ffffffff82d41000 r ukbd_keydesc_us +ffffffff82d41290 r ukbd_keydesc_de +ffffffff82d41340 r ukbd_keydesc_de_nodead +ffffffff82d41360 r ukbd_keydesc_fr +ffffffff82d41420 r ukbd_keydesc_fr_apple +ffffffff82d41560 r ukbd_keydesc_fr_dvorak_bepo +ffffffff82d416a0 r ukbd_keydesc_dk +ffffffff82d41740 r ukbd_keydesc_dk_nodead +ffffffff82d41750 r ukbd_keydesc_it +ffffffff82d417f0 r ukbd_keydesc_uk +ffffffff82d418a0 r ukbd_keydesc_jp +ffffffff82d41910 r ukbd_keydesc_sv +ffffffff82d41940 r ukbd_keydesc_sv_nodead +ffffffff82d41950 r ukbd_keydesc_no +ffffffff82d41980 r ukbd_keydesc_no_nodead +ffffffff82d41990 r ukbd_keydesc_us_dvorak +ffffffff82d41a30 r ukbd_keydesc_us_colemak +ffffffff82d41a78 r ukbd_keydesc_swapctrlcaps +ffffffff82d41a90 r ukbd_keydesc_iopener +ffffffff82d41ae0 r ukbd_keydesc_es +ffffffff82d41b80 r ukbd_keydesc_be +ffffffff82d41c40 r ukbd_keydesc_ru +ffffffff82d41db0 r ukbd_keydesc_ua +ffffffff82d41f50 r ukbd_keydesc_sg +ffffffff82d42010 r ukbd_keydesc_sg_nodead +ffffffff82d42030 r ukbd_keydesc_sf +ffffffff82d42050 r ukbd_keydesc_pt +ffffffff82d420e0 r ukbd_keydesc_pt_apple +ffffffff82d42100 r ukbd_keydesc_lt +ffffffff82d421e0 r ukbd_keydesc_la +ffffffff82d42280 r ukbd_keydesc_br +ffffffff82d42310 r ukbd_keydesc_tr +ffffffff82d423d0 r ukbd_keydesc_tr_nodead +ffffffff82d423f0 r ukbd_keydesc_pl +ffffffff82d42450 r ukbd_keydesc_hu +ffffffff82d42560 r ukbd_keydesc_si +ffffffff82d42680 r ukbd_keydesc_cf +ffffffff82d42760 r ukbd_keydesc_cf_nodead +ffffffff82d42780 r ukbd_keydesc_lv +ffffffff82d42800 r ukbd_keydesc_nl +ffffffff82d428e0 r ukbd_keydesc_nl_nodead +ffffffff82d42900 r ukbd_keydesc_is +ffffffff82d42994 r ukbd_keydesc_is_nodead +ffffffff82d429a0 r ukbd_keydesc_ee +ffffffff82d42a50 r ukbd_keydesc_ee_nodead +ffffffff82d42a70 R ukbd_keydesctab +ffffffff82d43000 R ukbd_countrylayout +ffffffff82d43090 R ukbd_consops +ffffffff82d430b0 R ukbd_accessops +ffffffff82d430c8 R ukbd_ca +ffffffff82d44000 R ums_accessops +ffffffff82d44018 R ums_ca +ffffffff82d45000 R umt_accessops +ffffffff82d45018 R umt_ca +ffffffff82d46000 R uts_devs +ffffffff82d46010 R uts_accessops +ffffffff82d46028 R uts_ca +ffffffff82d47000 R ubcmtp_accessops +ffffffff82d47018 R ubcmtp_ca +ffffffff82d47040 r ubcmtp_devices +ffffffff82d48000 R ucycom_methods +ffffffff82d48040 R ucycom_devs +ffffffff82d48050 R ucycom_ca +ffffffff82d49000 R uslhcom_methods +ffffffff82d49040 R uslhcom_ca +ffffffff82d49068 r uslhcom_devs +ffffffff82d4a000 R ulpt_ca +ffffffff82d4b000 R umass_ca +ffffffff82d4b028 R umass_bbb_methods +ffffffff82d4b040 R umass_cbi_methods +ffffffff82d4c000 R umass_quirks +ffffffff82d4d000 R umass_scsi_switch +ffffffff82d4e000 R uthum_devs +ffffffff82d4e008 R uthum_ca +ffffffff82d4e030 r uthum_sensor_type_s +ffffffff82d4f000 R ugold_devs +ffffffff82d4f010 R ugold_ca +ffffffff82d50000 R utrh_devs +ffffffff82d50008 R utrh_ca +ffffffff82d51000 R uoakrh_devs +ffffffff82d51008 R uoakrh_ca +ffffffff82d51030 R uoakrh_methods +ffffffff82d52000 R uoaklux_devs +ffffffff82d52008 R uoaklux_ca +ffffffff82d52030 R uoaklux_methods +ffffffff82d53000 R uoakv_devs +ffffffff82d53008 R uoakv_ca +ffffffff82d53030 R uoakv_methods +ffffffff82d54000 R uonerng_ca +ffffffff82d55000 R urng_ca +ffffffff82d55030 r urng_devs +ffffffff82d56000 R udcf_ca +ffffffff82d56028 r udcf_devs +ffffffff82d57000 R umbg_ca +ffffffff82d58000 R uvisor_methods +ffffffff82d58040 R uvisor_ca +ffffffff82d58070 r uvisor_devs +ffffffff82d59000 R udsbr_hw_if +ffffffff82d59028 R udsbr_ca +ffffffff82d5a000 R utwitch_devs +ffffffff82d5a008 R utwitch_ca +ffffffff82d5b000 R aue_devs +ffffffff82d5b1b0 R aue_ca +ffffffff82d5c000 R axe_devs +ffffffff82d5c0d0 R axe_ca +ffffffff82d5d000 R axen_devs +ffffffff82d5d020 R axen_ca +ffffffff82d5e000 R smsc_ca +ffffffff82d5e030 r smsc_devs +ffffffff82d5f000 R cue_ca +ffffffff82d60000 R kue_devs +ffffffff82d60088 R kue_ca +ffffffff82d61000 R cdce_devs +ffffffff82d61048 R cdce_ca +ffffffff82d62000 R urndis_ca +ffffffff82d62030 R urndis_class +ffffffff82d63000 R mos_devs +ffffffff82d63018 R mos_ca +ffffffff82d64000 R mue_devs +ffffffff82d64020 R mue_ca +ffffffff82d65000 R udav_ca +ffffffff82d65030 r udav_devs +ffffffff82d66000 R upl_ca +ffffffff82d67000 R ugl_ca +ffffffff82d68000 R url_ca +ffffffff82d68030 r url_devs +ffffffff82d69000 R ure_devs +ffffffff82d690f0 R ure_ca +ffffffff82d6a000 R uaq_devs +ffffffff82d6a018 R uaq_ca +ffffffff82d6b000 R umodem_methods +ffffffff82d6b040 R umodem_ca +ffffffff82d6c000 R uftdi_methods +ffffffff82d6c040 R uftdi_ca +ffffffff82d6c070 r uftdi_devs +ffffffff82d6d000 R uplcom_methods +ffffffff82d6d040 R uplcom_ca +ffffffff82d6d070 r uplcom_devs +ffffffff82d6e000 R umct_methods +ffffffff82d6e040 R umct_ca +ffffffff82d6e070 r umct_devs +ffffffff82d6f000 R uvscom_methods +ffffffff82d6f040 R uvscom_ca +ffffffff82d6f070 r uvscom_devs +ffffffff82d70000 R ubsa_methods +ffffffff82d70040 R ubsa_devs +ffffffff82d70060 R ubsa_ca +ffffffff82d71000 R ukspan_ca +ffffffff82d71028 r ukspan_devs +ffffffff82d71030 r ukspan_methods +ffffffff82d72000 R uslcom_methods +ffffffff82d72040 R uslcom_ca +ffffffff82d72070 r uslcom_devs +ffffffff82d73000 R uark_methods +ffffffff82d73040 R uark_ca +ffffffff82d73068 r uark_devs +ffffffff82d74000 R moscom_methods +ffffffff82d74040 R moscom_ca +ffffffff82d74068 r moscom_devs +ffffffff82d75000 R umcs_methods +ffffffff82d75040 R umcs_devs +ffffffff82d75050 R umcs_ca +ffffffff82d76000 R uscom_methods +ffffffff82d76040 R uscom_ca +ffffffff82d76068 r uscom_devs +ffffffff82d77000 R ucrcom_methods +ffffffff82d77040 R ucrcom_ca +ffffffff82d78000 R uxrcom_methods +ffffffff82d78040 R uxrcom_ca +ffffffff82d78068 r uxrcom_devs +ffffffff82d79000 R uipaq_methods +ffffffff82d79040 R uipaq_ca +ffffffff82d79070 r uipaq_devs +ffffffff82d7a000 R umsm_methods +ffffffff82d7a040 R umsm_ca +ffffffff82d7a070 r umsm_devs +ffffffff82d7b000 R uchcom_methods +ffffffff82d7b040 R uchcom_ca +ffffffff82d7b068 r uchcom_devs +ffffffff82d7b080 r dividers +ffffffff82d7c000 R uticom_methods +ffffffff82d7c040 R uticom_ca +ffffffff82d7c070 r uticom_devs +ffffffff82d7d000 R wi_usb_devs +ffffffff82d7d0f0 R wi_usb_ca +ffffffff82d7e000 R atu_ca +ffffffff82d7f000 R ural_ca +ffffffff82d7f030 r ural_devs +ffffffff82d7f0a0 r ural_rf2522_r2 +ffffffff82d7f0e0 r ural_rf2524_r2 +ffffffff82d7f120 r ural_rf2525_hi_r2 +ffffffff82d7f160 r ural_rf2525_r2 +ffffffff82d7f1a0 r ural_rf2525e_r2 +ffffffff82d7f1e0 r ural_rf2526_hi_r2 +ffffffff82d7f220 r ural_rf2526_r2 +ffffffff82d7f260 r ural_def_bbp +ffffffff82d7f2a0 r ural_def_mac +ffffffff82d80000 R rum_ca +ffffffff82d80030 r rum_devs +ffffffff82d80110 r rum_rf5225 +ffffffff82d80460 r rum_rf5226 +ffffffff82d807b0 r rum_def_bbp +ffffffff82d807f0 r rum_def_mac +ffffffff82d81000 R run_ca +ffffffff82d81030 r run_devs +ffffffff82d81430 r rt2860_rf2850 +ffffffff82d81860 r rt2860_rates +ffffffff82d81920 r rt5592_freqs_40mhz +ffffffff82d81a60 r rt5592_freqs_20mhz +ffffffff82d81ba0 r rt5592_2ghz_def_rf +ffffffff82d81be0 r rt5592_chan_5ghz +ffffffff82d81e30 r rt5592_def_bbp +ffffffff82d81e70 r rt5592_bbp_r196 +ffffffff82d81ed0 r rt5390_def_bbp +ffffffff82d81f00 r rt3572_def_rf +ffffffff82d81f40 r rt3070_def_rf +ffffffff82d81f70 r rt3593_def_rf +ffffffff82d81fb0 r rt5592_def_rf +ffffffff82d81fe0 r rt5392_def_rf +ffffffff82d82060 r rt5390_def_rf +ffffffff82d820e0 r rt2870_def_mac +ffffffff82d83000 R mtw_ca +ffffffff82d83030 r mtw_devs +ffffffff82d83070 r rt2860_rates +ffffffff82d83130 r mt7601_rf_chan +ffffffff82d831a0 r mt7601_def_bbp +ffffffff82d832d0 r mt7601_rf_bank0 +ffffffff82d83330 r mt7601_rf_bank4 +ffffffff82d833b0 r mt7601_rf_bank5 +ffffffff82d83430 r mt7601_def_mac +ffffffff82d84000 R zyd_ca +ffffffff82d84030 r zyd_devs +ffffffff82d841b0 r zyd_rfmd_init.phyini +ffffffff82d842e0 r zyd_rfmd_init.rfini +ffffffff82d84330 r zyd_rfmd_set_channel.rfprog +ffffffff82d843a0 r zyd_al2230_init.phyini +ffffffff82d84480 r zyd_al2230_init.rfini +ffffffff82d844e0 r zyd_al2230_init_b.phyini +ffffffff82d845d0 r zyd_al2230_init_b.rfini +ffffffff82d84620 r zyd_al2230_set_channel.rfprog +ffffffff82d846d0 r zyd_al7230B_init.phyini_1 +ffffffff82d847b0 r zyd_al7230B_init.rfini_1 +ffffffff82d847f0 r zyd_al7230B_set_channel.rfprog +ffffffff82d84860 r zyd_al7230B_set_channel.rfsc +ffffffff82d84890 r zyd_al2210_init.phyini +ffffffff82d848f0 r zyd_al2210_init.rfini +ffffffff82d84920 r zyd_al2210_set_channel.rfprog +ffffffff82d84960 r zyd_gct_init.phyini +ffffffff82d849b0 r zyd_gct_init.rfini +ffffffff82d84a50 r zyd_gct_set_channel.rfprog +ffffffff82d84a90 r zyd_maxim_set_channel.phyini +ffffffff82d84ba0 r zyd_maxim_set_channel.rfini +ffffffff82d84be0 r zyd_maxim_set_channel.rfprog +ffffffff82d84c50 r zyd_maxim2_set_channel.phyini +ffffffff82d84d70 r zyd_maxim2_set_channel.rfini +ffffffff82d84db0 r zyd_maxim2_set_channel.rfprog +ffffffff82d84e20 r zyd_rf_name.zyd_rfs +ffffffff82d84ea0 r zyd_def_phyB +ffffffff82d850d0 r zyd_def_phy +ffffffff82d86000 R upgt_ca +ffffffff82d86028 r upgt_devs_1 +ffffffff82d86030 r upgt_devs_2 +ffffffff82d87000 R urtw_ca +ffffffff82d87030 r urtw_devs +ffffffff82d87090 r urtw_ratetable +ffffffff82d870f0 r urtw_8225_gain +ffffffff82d87110 r urtw_8225_txpwr_cck_ch14 +ffffffff82d87140 r urtw_8225_txpwr_cck +ffffffff82d87170 r urtw_8225_tx_gain_cck_ofdm +ffffffff82d87176 r urtw_8225_txpwr_ofdm +ffffffff82d87180 r urtw_8225_rf_part1 +ffffffff82d87200 r urtw_8225_rxgain +ffffffff82d872c0 r urtw_8225_agc +ffffffff82d87340 r urtw_8225_rf_part2 +ffffffff82d87470 r urtw_8225_rf_part3 +ffffffff82d87550 r urtw_8225_channel +ffffffff82d8758c r urtw_8225_threshold +ffffffff82d875a0 r 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+ffffffff83119000 D db_tab_stop_width +ffffffff83119004 D db_max_line +ffffffff83119008 D db_max_width +ffffffff8311900c D db_radix +ffffffff8311a000 D db_lastsym +ffffffff8311a008 D db_maxoff +ffffffff8311b000 D db_vars +ffffffff8311b090 D db_evars +ffffffff8311c000 D db_watchpoints_inserted +ffffffff8311c008 D db_next_free_watchpoint +ffffffff8311d000 D db_log +ffffffff8311e000 D audio_cd +ffffffff8311e020 D audio_lock +ffffffff8311f000 D midi_cd +ffffffff83120000 D rnd_cold +ffffffff83120004 D rnd_slowextract +ffffffff83120008 D rnd_timeout +ffffffff83120050 D rndlock +ffffffff83120060 D rndreinit_timeout +ffffffff831200a8 D rnd_task +ffffffff83121000 D video_cd +ffffffff83122000 d rrip_table_analyze +ffffffff831220e0 d rrip_table_getname +ffffffff831221e0 d rrip_table_getsymname +ffffffff83122280 d rrip_table_extref +ffffffff83123000 D nexecs +ffffffff83124000 D elf_note_names +ffffffff83125000 D ncpus +ffffffff83125004 D ncpusfound +ffffffff83126000 D acct_lock +ffffffff83126010 D acctsuspend +ffffffff83126014 D acctresume +ffffffff83126018 D acctrate +ffffffff83127000 D ticks +ffffffff83127008 D jiffies +ffffffff83128000 D clockintr_mtx +ffffffff83128010 D statclock_gen +ffffffff83129000 D fhdlk +ffffffff8312a000 D kqueue_klist_lock +ffffffff8312a010 D kq_timeoutmax +ffffffff8312b000 D stackgap_random +ffffffff8312c000 D nprocesses +ffffffff8312c004 D nthreads +ffffffff8312c008 D fork_tfmrate +ffffffff8312d000 D kthread_q +ffffffff8312e000 D malloc_mtx +ffffffff8312e010 D memname +ffffffff8312e4a0 D sysctl_kmemlock +ffffffff8312e4b0 D malloc_errintvl +ffffffff8312f000 D maxdmap +ffffffff8312f008 D maxsmap +ffffffff8312f010 D rlimit_lock +ffffffff83130000 D sched_cost_load +ffffffff83130004 D sched_cost_priority +ffffffff83130008 D sched_cost_runnable +ffffffff8313000c D sched_cost_resident +ffffffff83131000 D intrmap_lock +ffffffff83132000 D nosuidcoredump +ffffffff83132008 D sigio_lock +ffffffff83133000 D smr_lock +ffffffff83133010 D smr_logintvl +ffffffff83134000 D startuphook_list +ffffffff83135000 D sysctl_lock +ffffffff83135010 D sysctl_disklock +ffffffff83135020 d openbsd +ffffffff83135024 d arg_max +ffffffff83135028 d posix_version +ffffffff8313502c d ngroups_max +ffffffff83135030 d int_one +ffffffff83135034 d maxpartitions +ffffffff83135038 d raw_part +ffffffff8313503c D allowpowerdown +ffffffff83135040 D hw_power +ffffffff83135044 d byte_order +ffffffff83135048 d page_size +ffffffff83136000 d thrsleep_queue +ffffffff83136010 d thrsleep_lock +ffffffff83137000 D tc_lock +ffffffff83137010 D windup_mtx +ffffffff83137020 D timecounter +ffffffff83137028 D time_second +ffffffff83137030 d timehands +ffffffff83137038 d dummy_timecounter +ffffffff83137088 d th0 +ffffffff83137120 d th1 +ffffffff83138000 D itimer_mtx +ffffffff83138010 D ratecheck_mtx +ffffffff83138020 D ppsratecheck_mtx +ffffffff83138030 D resettodr_to +ffffffff83138078 D resettodr_task +ffffffff83139000 D timeout_mutex +ffffffff8313a000 D wdog_auto +ffffffff8313b000 D taskq_sys +ffffffff8313b050 D taskq_sys_mp +ffffffff8313c000 D ccpu +ffffffff8313c004 D perflevel +ffffffff8313c008 D perfpolicy +ffffffff8313c010 D setperf_to +ffffffff8313d000 D autoconf_attdet_mtx +ffffffff8313d010 D msgs +ffffffff8313e000 d evcount_list +ffffffff8313e010 d evcount_percpu_init_list +ffffffff8313f000 D syslogf_rwlock +ffffffff8313f010 D log_mtx +ffffffff8313f020 D logstash_in +ffffffff8313f028 D logstash_out +ffffffff8313f030 D logstash_rwlock +ffffffff83140000 D pool_head +ffffffff83140010 D pool_lock +ffffffff83140020 D pool_debug +ffffffff83140028 D pool_allocator_single +ffffffff83140040 D pool_allocator_multi +ffffffff83140058 D pool_allocator_multi_ni +ffffffff83140070 D pool_gc_tick +ffffffff831400b8 D pool_gc_task +ffffffff83141000 D kprintf_mutex +ffffffff83141010 D db_panic +ffffffff83141014 D splassert_ctl +ffffffff83141018 D v_putc +ffffffff83141020 D printf_flags +ffffffff83142000 D userconf_base +ffffffff83142004 D userconf_maxdev +ffffffff83142008 D userconf_totdev +ffffffff8314200c D userconf_maxlocnames +ffffffff83142010 D userconf_cnt +ffffffff83142014 D userconf_lines +ffffffff83142018 D userconf_histsz +ffffffff83142020 D userconf_cmds +ffffffff83143000 D ftlock +ffffffff83144000 d ppollcollect.poll_errintvl +ffffffff83145000 D ttydefchars +ffffffff83145014 D ttclos +ffffffff8314501b D ttopen +ffffffff83145022 D ttybg +ffffffff83145028 D ttyin +ffffffff8314502e D ttyout +ffffffff83145038 D ttylist_lock +ffffffff83146000 D linesw +ffffffff83146280 D nlinesw +ffffffff83147000 D pt_softc_lock +ffffffff83148000 d mbstat_boot_boot_cpumem +ffffffff83148080 D mbstat +ffffffff83148090 D mclsizes +ffffffff831480b0 D m_extref_mtx +ffffffff831480c0 D m_pool_allocator +ffffffff83149000 D somaxconn +ffffffff83149004 D sominconn +ffffffff83149008 D sosplice_lock +ffffffff8314a000 D sb_max +ffffffff8314b000 D unp_df_lock +ffffffff8314b010 D unp_gc_lock +ffffffff8314b020 D unp_rights_mtx +ffffffff8314b030 D unp_ino_mtx +ffffffff8314b040 D unp_gc_task +ffffffff8314b070 D unpst_sendspace +ffffffff8314b074 D unpst_recvspace +ffffffff8314b078 D unpsq_sendspace +ffffffff8314b07c D unpsq_recvspace +ffffffff8314b080 D unpdg_sendspace +ffffffff8314b084 D unpdg_recvspace +ffffffff8314c000 D doingcache +ffffffff8314d000 D maxvfsconf +ffffffff8314d010 d vfsconflist +ffffffff8314e000 D lockf_lock +ffffffff8314e010 D maxlocksperuid +ffffffff8314f000 D iftovt_tab +ffffffff8314f040 D vttoif_tab +ffffffff8314f064 D suid_clear +ffffffff8314f068 D vnode_mtx +ffffffff8314f078 D vfs_stall_lock +ffffffff8314f090 D vtypes +ffffffff8314f0e0 D vtags +ffffffff83150000 D syncer_maxdelay +ffffffff83150004 D syncdelay +ffffffff83151000 D dosdirtemplate +ffffffff83152000 D ntfs_hashlock +ffffffff83153000 D ntfs_toupper_lock +ffffffff83154000 D art_table_gc_mtx +ffffffff83154010 D art_table_gc_task +ffffffff83154040 D art_node_gc_mtx +ffffffff83154050 D art_node_gc_task +ffffffff83155000 D bpf_bufsize +ffffffff83155004 D bpf_maxbufsize +ffffffff83155008 D bpf_sysctl_lk +ffffffff83156000 D ifg_head +ffffffff83156010 D if_cloners_lock +ffffffff83156020 D if_input_task_locked +ffffffff83156050 D netlock +ffffffff83156060 D ifnetlist +ffffffff83157000 D ifiq_maxlen_drop +ffffffff83157004 D ifiq_maxlen_return +ffffffff83158000 D etherbroadcastaddr +ffffffff83158006 D ether_ipmulticast_min +ffffffff8315800c D ether_ipmulticast_max +ffffffff83158012 D ether_ip6multicast_min +ffffffff83158018 D ether_ip6multicast_max +ffffffff83159000 D etherip_cloner +ffffffff83159030 D etherip_list +ffffffff8315a000 D loop_cloner +ffffffff8315b000 D ifmedia_mtx +ffffffff8315c000 D ppp_compressors +ffffffff8315c020 D ppp_cloner +ffffffff8315d000 D ppp_pkt_init +ffffffff8315e000 D ppp_bsd_compress +ffffffff8315f000 D ppp_deflate +ffffffff8315f070 D ppp_deflate_draft +ffffffff83160000 D tun_cloner +ffffffff83160030 D tap_cloner +ffffffff83161000 D bridgeintrq +ffffffff83161038 D bridge_cloner +ffffffff83162000 d veb_cloner +ffffffff83162030 d vport_cloner +ffffffff83163000 D vlan_tagh_lk +ffffffff83163010 D vlan_cloner +ffffffff83163040 D svlan_cloner +ffffffff83164000 D pipex_list_mtx +ffffffff83164010 D pipex_prune +ffffffff83164018 D pipexoutq +ffffffff83164050 d SHAPad2 +ffffffff83165000 D rtmap_gc +ffffffff83165018 D rt_rc +ffffffff83166000 D rt_labels +ffffffff83167000 D enc_cloner +ffffffff83168000 D gre_cloner +ffffffff83168030 D gre_list +ffffffff83168040 D mgre_cloner +ffffffff83168070 D egre_cloner +ffffffff831680a0 D nvgre_cloner +ffffffff831680d0 D eoip_cloner +ffffffff83169000 D trunk_cloner +ffffffff8316a000 d aggr_cloner +ffffffff8316b000 d tpmr_cloner +ffffffff8316c000 D mpe_cloner +ffffffff8316d000 D mpw_cloner +ffffffff8316e000 D mpip_cloner +ffffffff8316f000 d bpe_cloner +ffffffff8316f030 d bpe_lock +ffffffff83170000 D vether_cloner +ffffffff83171000 D pair_cloner +ffffffff83172000 d vxlan_cloner +ffffffff83172030 d vxlan_lock +ffffffff83172040 d vxlan_teps +ffffffff83173000 D underload_interval +ffffffff83173010 D wg_cloner +ffffffff83174000 d stoeplitz_keyseed +ffffffff83175000 D ieee80211_cache_size +ffffffff83176000 D arpt_prune +ffffffff83176004 D arpt_keep +ffffffff83176008 D arpt_down +ffffffff83176010 D arpinq +ffffffff83176048 D arp_mtx +ffffffff83176058 D arp_maxtries +ffffffff83177000 D ipport_firstauto +ffffffff83177004 D ipport_lastauto +ffffffff83177008 D ipport_hifirstauto +ffffffff8317700c D ipport_hilastauto +ffffffff83178000 D divert_sendspace +ffffffff83178004 D divert_recvspace +ffffffff83178008 D divbhashsize +ffffffff83179000 D icmptstamprepl +ffffffff83179004 D icmperrppslim +ffffffff83179008 D icmp_redirtimeout +ffffffff8317a000 D ipsendredirects +ffffffff8317a004 D ip_defttl +ffffffff8317a008 D ip_mtudisc +ffffffff8317a00c D ip_mtudisc_timeout +ffffffff8317a010 D ipq_mutex +ffffffff8317a020 D ip_maxqueue +ffffffff8317a028 D ipintrq +ffffffff8317a060 d ipsend_task +ffffffff8317a090 d ipsendraw_task +ffffffff8317b000 D ip_mrtproto +ffffffff8317b004 d sin +ffffffff8317c000 D rip_sendspace +ffffffff8317c008 D rip_recvspace +ffffffff8317d000 D tcprexmtthresh +ffffffff8317d004 D tcptv_keep_init +ffffffff8317d008 D tcp_rst_ppslim +ffffffff8317d00c D tcp_ackdrop_ppslim +ffffffff8317d010 D tcp_syn_hash_size +ffffffff8317d014 D tcp_syn_cache_limit +ffffffff8317d018 D tcp_syn_bucket_limit +ffffffff8317d01c D tcp_syn_use_limit +ffffffff8317e000 D tcp_outflags +ffffffff8317f000 D tcp_timer_mtx +ffffffff8317f010 D tcp_mssdflt +ffffffff8317f014 D tcp_rttdflt +ffffffff8317f018 D tcp_do_rfc1323 +ffffffff8317f01c D tcp_do_sack +ffffffff8317f020 D tcp_do_rfc3390 +ffffffff8317f024 D tcp_reass_limit +ffffffff8317f028 D tcp_sackhole_limit +ffffffff83180000 D tcp_backoff +ffffffff83180034 D tcp_totbackoff +ffffffff83181000 D tcp_sendspace +ffffffff83181004 D tcp_recvspace +ffffffff83181008 D tcp_autorcvbuf_inc +ffffffff83182000 D udpcksum +ffffffff83182004 D udp_sendspace +ffffffff83182008 D udp_recvspace +ffffffff83183000 D ipsec_flows_mtx +ffffffff83183010 D ipsec_ids_idle +ffffffff83183014 D ipsec_ids_next_flow +ffffffff83183018 D ipsec_policy_head +ffffffff83183028 D ipsp_ids_gc_timeout +ffffffff83183070 D tdb_sadb_mtx +ffffffff83183080 d tdb_hashmask +ffffffff83184000 D ipo_tdb_mtx +ffffffff83184010 D ipsec_acquire_mtx +ffffffff83184020 D ipsec_acquire_head +ffffffff83185000 D ipsec_keep_invalid +ffffffff83185004 D ipsec_require_pfs +ffffffff83185008 D ipsec_soft_timeout +ffffffff8318500c D ipsec_exp_timeout +ffffffff83185010 D ipsec_soft_first_use +ffffffff83185014 D ipsec_exp_first_use +ffffffff83185018 D ipsec_expire_acquire +ffffffff8318501c D esp_enable +ffffffff83185020 D ah_enable +ffffffff83186000 D udpencap_enable +ffffffff83186004 D udpencap_port +ffffffff83187000 D carp_vh_rc +ffffffff83187020 D carp_sc_rc +ffffffff83187040 D carp_opts +ffffffff83187058 D carp_cloner +ffffffff83187088 d carp_send_na.mcast +ffffffff83188000 d PADDING +ffffffff83189000 d PADDING +ffffffff8318a000 d weak_keys +ffffffff8318b000 D swcr_id +ffffffff8318c000 D window_inflate +ffffffff8318c004 D window_deflate +ffffffff8318d000 D ghash_update +ffffffff8318e000 D mpls_defttl +ffffffff8318e004 D mpls_mapttl_ip +ffffffff8318f000 D nfskevq_lock +ffffffff83190000 D nfs_backoff +ffffffff83190020 D nfs_ptimers +ffffffff83191000 D desirednfsrvcache +ffffffff83191010 D nonidempotent +ffffffff83191070 D nfsv2_repstat +ffffffff83192000 D nfsv2_type +ffffffff83192030 D nfsv3_type +ffffffff83192060 D nv2tov_type +ffffffff83192080 D nv3tov_type +ffffffff831920a0 D nfsv3_procid +ffffffff83192100 D nfsv2_procid +ffffffff8319215c d nfsv3err_getattr +ffffffff83192170 d nfsv3err_setattr +ffffffff83192190 d nfsv3err_lookup +ffffffff831921a4 d nfsv3err_access +ffffffff831921b0 d nfsv3err_readlink +ffffffff831921d0 d nfsv3err_read +ffffffff831921f0 d nfsv3err_write +ffffffff83192210 d nfsv3err_create +ffffffff83192230 d nfsv3err_mkdir +ffffffff83192250 d nfsv3err_symlink +ffffffff83192270 d nfsv3err_mknod +ffffffff83192290 d nfsv3err_remove +ffffffff831922b0 d nfsv3err_rmdir +ffffffff831922d0 d nfsv3err_rename +ffffffff83192300 d nfsv3err_link +ffffffff83192330 d nfsv3err_readdir +ffffffff83192350 d nfsv3err_readdirplus +ffffffff83192366 d nfsv3err_fsstat +ffffffff83192372 d nfsv3err_fsinfo +ffffffff8319237c d nfsv3err_pathconf +ffffffff83192386 d nfsv3err_commit +ffffffff83193000 D nfsrv3_procs +ffffffff831930b8 D nfs_niothreads +ffffffff83194000 D fragtbl +ffffffff83195000 D ffs_vtbl +ffffffff83196000 D softdep_typenames +ffffffff83196070 D tickdelay +ffffffff83197000 D dirchk +ffffffff83198000 D desireddquot +ffffffff83199000 D amap_list_lock +ffffffff8319a000 d uao_list_lock +ffffffff8319b000 d uvmexp_countersboot_boot_cpumem +ffffffff8319b0c0 D uvmexp_counters +ffffffff8319b0c8 D vm_min_kernel_address +ffffffff8319c000 D no_constraint +ffffffff8319d000 d uvm_kmapent_warn_rate +ffffffff8319e000 D maxslp +ffffffff8319f000 D uvmpagerops +ffffffff831a0000 D uvm_swap_data_lock +ffffffff831a0010 D swap_syscall_lock +ffffffff831a0020 D oommtx +ffffffff831a1000 D uvm_doswapencrypt +ffffffff831a2000 D gif_list +ffffffff831a2010 D gif_cloner +ffffffff831a3000 D divert6_sendspace +ffffffff831a3004 D divert6_recvspace +ffffffff831a3008 D divb6hashsize +ffffffff831a4000 d in6_get_hw_ifid.allone +ffffffff831a5000 D ip6_sendredirects +ffffffff831a5004 D ip6_defhlim +ffffffff831a5008 D ip6_defmcasthlim +ffffffff831a500c D ip6_maxfragpackets +ffffffff831a5010 D ip6_maxfrags +ffffffff831a5014 D ip6_log_interval +ffffffff831a5018 D ip6_hdrnestlimit +ffffffff831a501c D ip6_dad_count +ffffffff831a5020 D ip6_auto_flowlabel +ffffffff831a5024 D ip6_use_deprecated +ffffffff831a5028 D ip6_neighborgcthresh +ffffffff831a502c D ip6_maxdynroutes +ffffffff831a5030 D rip6_sendspace +ffffffff831a5038 D rip6_recvspace +ffffffff831a5040 D icmp6_redirtimeout +ffffffff831a5044 D icmp6errppslim +ffffffff831a5048 D ip6_mtudisc_timeout +ffffffff831a6000 D frag6_mutex +ffffffff831a7000 d icmp6_mtudisc_hiwat +ffffffff831a7004 d icmp6_mtudisc_lowat +ffffffff831a8000 d randomtab_20 +ffffffff831a9000 D ip6intrq +ffffffff831a9038 d ip6send_task +ffffffff831aa000 D nd6_timer_next +ffffffff831aa008 D nd6_expire_next +ffffffff831aa010 D nd6_delay +ffffffff831aa014 D nd6_umaxtries +ffffffff831aa018 D nd6_mmaxtries +ffffffff831aa01c D nd6_gctimer +ffffffff831aa020 D nd6_maxndopt +ffffffff831ab000 d dadq +ffffffff831ac000 D pfkeyv2_mtx +ffffffff831ac010 d pfkeyv2_seq +ffffffff831ad000 D sadb_exts_allowed_in +ffffffff831ad090 D sadb_exts_required_in +ffffffff831ae000 D cold +ffffffff831af000 D bdevsw +ffffffff831af460 D nblkdev +ffffffff831af470 D cdevsw +ffffffff831b1400 D nchrdev +ffffffff831b1404 D mem_no +ffffffff831b1408 D swapdev +ffffffff831b1410 D constab +ffffffff831b2000 D machine +ffffffff831b2008 D lid_action +ffffffff831b200c D pwr_action +ffffffff831b2010 D isa_constraint +ffffffff831b2020 D dma_constraint +ffffffff831b2030 D uvm_md_constraints +ffffffff831b2048 D delay_func +ffffffff831b2050 D initclock_func +ffffffff831b2058 D bootinfo_size +ffffffff831b205c D waittime +ffffffff831b2060 D dumpmag +ffffffff831b3000 D tsc_rdtsc +ffffffff831b3008 D tsc_timecounter +ffffffff831b3058 D tsc_is_synchronized +ffffffff831b4000 D local_apic +ffffffff831b4020 D lapic_id +ffffffff831b4080 D lapic_tpr +ffffffff831b40a0 d lapic_ppr +ffffffff831b4100 d lapic_isr +ffffffff831b5000 D warn_once +ffffffff831b6000 d errata +ffffffff831b7000 D cpu_ucode_intel_mtx +ffffffff831b8000 D mem_owner_bios +ffffffff831b8008 D mrops +ffffffff831b8028 D mtrrmask +ffffffff831b8030 D mtrrtomrt +ffffffff831b9000 D pmap_pg_wc +ffffffff831b9008 D pmaps_lock +ffffffff831b9018 d pmap_maxkvaddr +ffffffff831ba000 D kv_physwait +ffffffff831bb000 D fpu_save_len +ffffffff831bc000 D i8259_pic +ffffffff831bd000 D softintr_pic +ffffffff831be000 D ipifunc +ffffffff831bf000 D setperf_mp_mutex +ffffffff831c0000 D db_Grp6 +ffffffff831c0040 D db_Grp7 +ffffffff831c0100 D db_Grp8 +ffffffff831c0140 D db_Grp9 +ffffffff831c0200 D db_GrpA +ffffffff831c0240 D db_GrpB +ffffffff831c0280 D db_GrpC +ffffffff831c02c0 D db_inst_0f0x +ffffffff831c0440 D db_inst_0f2x +ffffffff831c05c0 D db_inst_0f3x +ffffffff831c0740 D db_inst_0f8x +ffffffff831c08c0 D db_inst_0f9x +ffffffff831c0a40 D db_inst_0fax +ffffffff831c0bc0 D db_inst_0fbx +ffffffff831c0d40 D db_inst_0fcx +ffffffff831c0ec0 D db_inst_0f +ffffffff831c0f40 D db_Esc92 +ffffffff831c0f80 D db_Esc94 +ffffffff831c0fc0 D db_Esc95 +ffffffff831c1000 D db_Esc96 +ffffffff831c1040 D db_Esc97 +ffffffff831c1080 D db_Esca5 +ffffffff831c10c0 D db_Escb4 +ffffffff831c1100 D db_Esce3 +ffffffff831c1140 D db_Escf4 +ffffffff831c1180 D db_Esc8 +ffffffff831c1240 D db_Esc9 +ffffffff831c1300 D db_Esca +ffffffff831c13c0 D db_Escb +ffffffff831c1480 D db_Escc +ffffffff831c1540 D db_Escd +ffffffff831c1600 D db_Esce +ffffffff831c16c0 D db_Escf +ffffffff831c1780 D db_Esc_inst +ffffffff831c17c0 D db_Grp1 +ffffffff831c1800 D db_Grp2 +ffffffff831c1840 D db_Grp3 +ffffffff831c1900 D db_Grp4 +ffffffff831c19c0 D db_Grp5 +ffffffff831c1a80 D db_inst_table +ffffffff831c3280 D db_bad_inst +ffffffff831c32a0 D db_index_reg_16 +ffffffff831c32e0 D db_reg +ffffffff831c34e0 D db_seg_reg +ffffffff831c3520 D db_lengths +ffffffff831c4000 D db_regs +ffffffff831c41e0 D db_eregs +ffffffff831c41f0 D db_reg_args +ffffffff831c5000 D timer_mutex +ffffffff831c5010 d i8254_timecounter +ffffffff831c6000 D spleen8x16 +ffffffff831c6058 D spleen12x24 +ffffffff831c60b0 D spleen16x32 +ffffffff831c6108 D spleen32x64 +ffffffff831c6160 d builtin_fonts +ffffffff831c61e0 d wsfont_add.cookiegen +ffffffff831c61f0 d spleen8x16_data +ffffffff831c6ff0 d spleen12x24_data +ffffffff831c99f0 d spleen16x32_data +ffffffff831cd1f0 d spleen32x64_data +ffffffff831dc000 D nsphy_cd +ffffffff831dd000 D nsphyter_cd +ffffffff831de000 D gentbi_cd +ffffffff831df000 D qsphy_cd +ffffffff831e0000 D inphy_cd +ffffffff831e1000 D iophy_cd +ffffffff831e2000 D eephy_cd +ffffffff831e3000 D exphy_cd +ffffffff831e4000 D rlphy_cd +ffffffff831e5000 D lxtphy_cd +ffffffff831e6000 D luphy_cd +ffffffff831e7000 D mtdphy_cd +ffffffff831e8000 D icsphy_cd +ffffffff831e9000 D sqphy_cd +ffffffff831ea000 D tqphy_cd +ffffffff831eb000 D ukphy_cd +ffffffff831ec000 D dcphy_cd +ffffffff831ed000 D bmtphy_cd +ffffffff831ee000 D brgphy_cd +ffffffff831ef000 D xmphy_cd +ffffffff831f0000 D amphy_cd +ffffffff831f1000 D acphy_cd +ffffffff831f2000 D nsgphy_cd +ffffffff831f3000 D urlphy_cd +ffffffff831f4000 D rgephy_cd +ffffffff831f5000 D ciphy_cd +ffffffff831f6000 D ipgphy_cd +ffffffff831f7000 D etphy_cd +ffffffff831f8000 D jmphy_cd +ffffffff831f9000 D atphy_cd +ffffffff831fa000 D scsi_autoconf +ffffffff831fa008 D scsibus_cd +ffffffff831fb000 D cd_cd +ffffffff831fc000 D ch_cd +ffffffff831fc020 D chquirks +ffffffff831fd000 D sd_cd +ffffffff831fe000 D st_cd +ffffffff831ff000 D uk_cd +ffffffff83200000 D safte_cd +ffffffff83201000 D ses_cd +ffffffff83202000 D sym_cd +ffffffff83202020 D sym_devices +ffffffff83202070 D asym_devices +ffffffff83203000 D rdac_cd +ffffffff83203020 D rdac_devices +ffffffff83204000 D emc_cd +ffffffff83204020 D emc_devices +ffffffff83205000 D hds_cd +ffffffff83205020 D hds_devices +ffffffff83206000 D atapiscsi_cd +ffffffff83207000 D wd_cd +ffffffff83207020 d wddumpmulti +ffffffff83208000 D mainbus_cd +ffffffff83208020 D mba_iba +ffffffff83209000 D bios_cd +ffffffff83209020 D smbios_uninfo +ffffffff8320a000 D mpbios_cd +ffffffff8320a020 d mp_conf +ffffffff8320a070 d extint_bus +ffffffff8320a0a0 d smi_bus +ffffffff8320a0d0 d nmi_bus +ffffffff8320b000 D cpu_info_full_primary +ffffffff8320e000 D cpu_info_list +ffffffff8320e008 D mp_cpu_funcs +ffffffff8320e020 D cpu_cd +ffffffff8320e040 D cpu_info +ffffffff8320f000 D local_pic +ffffffff8320f090 D lapic_readreg +ffffffff8320f098 D lapic_writereg +ffffffff8320f0a0 D x86_ipi +ffffffff83210000 D ioapic_cold +ffffffff83210008 D ioapic_cd +ffffffff83211000 D efifb_std_descr +ffffffff83211030 D efifb_descrs +ffffffff83211038 D efifb_accessops +ffffffff83211098 D efifb_cd +ffffffff83212000 D pvbus_cd +ffffffff83212020 D pvbus_types +ffffffff832120e0 D pvbus_dma_tag +ffffffff83213000 D pvclock_cd +ffffffff83213020 D pvclock_timecounter +ffffffff83214000 D vmt_tclo_rpc +ffffffff832140d0 D vmt_cd +ffffffff83215000 D xen_cd +ffffffff83215020 D xen_bus_dma_tag +ffffffff83216000 D xnf_cd +ffffffff83217000 D xbf_cd +ffffffff83218000 D hv_msg_dispatch +ffffffff83218110 D hv_timecounter +ffffffff83218160 D hyperv_cd +ffffffff83219000 d hv_ic_devs +ffffffff8321a000 D hvn_cd +ffffffff8321b000 D hvs_cd +ffffffff8321c000 D virtio_cd +ffffffff8321d000 D vio_cd +ffffffff8321e000 D vioblk_cd +ffffffff8321f000 D viomb_cd +ffffffff83220000 D viornd_cd +ffffffff83221000 D vioscsi_cd +ffffffff83222000 D vmmci_cd +ffffffff83223000 D pci_cd +ffffffff83224000 D arc_fw_hdr +ffffffff83224008 D arc_cd +ffffffff83225000 D jmb_cd +ffffffff83226000 D mfii_cd +ffffffff83227000 D ips_cd +ffffffff83228000 D eap_cd +ffffffff83229000 D auacer_cd +ffffffff8322a000 D auich_cd +ffffffff8322b000 D azalia_cd +ffffffff8322c000 D envy_cd +ffffffff8322c020 D envy_matchids +ffffffff8322c030 D envy_rates +ffffffff8322c0b0 D ak4524_dac +ffffffff8322c0d8 D ak4524_adc +ffffffff8322c100 D ak4358_dac +ffffffff8322c128 D ak5365_adc +ffffffff8322c150 D unkenvy_codec +ffffffff8322c180 D envy_cards +ffffffff8322c3f0 D envy_cards_ht +ffffffff8322c600 d julia_eeprom +ffffffff8322d000 D emu_cd +ffffffff8322e000 D auixp_cd +ffffffff8322f000 D clcs_cd +ffffffff83230000 D yds_cd +ffffffff83231000 D auvia_cd +ffffffff83232000 D qle_cd +ffffffff83233000 D mpii_cd +ffffffff83234000 D aq_cd +ffffffff83235000 D de_cd +ffffffff83236000 D pcn_cd +ffffffff83237000 D wdc_sii3114_vtbl +ffffffff83237038 D wdc_pdc203xx_vtbl +ffffffff83237070 D wdc_svwsata_vtbl +ffffffff832370a8 D pciide_cd +ffffffff832370d0 d sis_hostbr_type +ffffffff83238000 D ppb_cd +ffffffff83239000 D vr_cd +ffffffff83239020 D vr_devices +ffffffff8323a000 D txp_cd +ffffffff8323b000 D bt848_card_signature +ffffffff8323c000 D bktr_cd +ffffffff8323d000 D em_cd +ffffffff8323e000 D ixgb_cd +ffffffff8323f000 D ix_cd +ffffffff8323f020 D ixgbe_smart_speed +ffffffff8323f024 D ixgbe_enable_msix +ffffffff83240000 D ixl_cd +ffffffff83240020 d ixl_sff_lock +ffffffff83241000 D xge_cd +ffffffff83242000 D thtc_cd +ffffffff83242020 D tht_cd +ffffffff83242040 D tht_txt_desc +ffffffff83242068 D tht_rxf_desc +ffffffff83242090 D tht_rxd_desc +ffffffff832420b8 D tht_txf_desc +ffffffff83243000 D myx_cd +ffffffff83244000 D oce_cd +ffffffff83245000 D dc_devs +ffffffff83246000 D cas_cd +ffffffff83247000 D sis_cd +ffffffff83248000 D se_cd +ffffffff83249000 D cbb_cd +ffffffff83249020 D yc_chipsets +ffffffff832491b0 d pccbb_funcs +ffffffff832491e0 d pccbb_pcmcia_funcs +ffffffff8324a000 D skc_cd +ffffffff8324a020 D sk_cd +ffffffff8324b000 D mskc_cd +ffffffff8324b020 D msk_cd +ffffffff8324c000 D puc_cd +ffffffff8324d000 D puc_ndevs +ffffffff8324e000 D iwi_cd +ffffffff8324f000 D wpi_cd +ffffffff83250000 D iwn_cd +ffffffff83251000 D iwm_cd +ffffffff83252000 D iwx_cd +ffffffff83253000 D cmpci_cd +ffffffff83254000 D iha_cd +ffffffff83255000 D pcscp_cd +ffffffff83255020 D pcscp_glue +ffffffff83256000 D bge_cd +ffffffff83257000 D bnx_firmwares +ffffffff83257160 D bnx_rv2ps +ffffffff832571c0 D bnx_cd +ffffffff832571e0 d flash_5709 +ffffffff83257210 d flash_table +ffffffff83258000 D vge_cd +ffffffff83259000 D stge_cd +ffffffff8325a000 D nfe_cd +ffffffff8325b000 D et_cd +ffffffff8325c000 D jme_cd +ffffffff8325d000 D age_cd +ffffffff8325e000 D alc_dma_burst +ffffffff8325e020 D alc_cd +ffffffff8325f000 D ale_cd +ffffffff83260000 D amdpm_cd +ffffffff83260020 d amdpm_timecounter +ffffffff83261000 D bce_cd +ffffffff83262000 D rtwn_cd +ffffffff83263000 d ral_rt2560_opns +ffffffff83263028 d ral_rt2661_opns +ffffffff83263050 d ral_rt2860_opns +ffffffff83264000 D piixpm_cd +ffffffff83265000 D vic_cd +ffffffff83266000 D vmx_cd +ffffffff83267000 D vmwpvs_cd +ffffffff83268000 D lii_cd +ffffffff83269000 D ichiic_cd +ffffffff8326a000 D viapm_cd +ffffffff8326a020 d viapm_timecounter +ffffffff8326b000 D amdiic_cd +ffffffff8326c000 D nviic_cd +ffffffff8326d000 D kate_cd +ffffffff8326e000 D km_cd +ffffffff8326f000 D cpu_model_offsets +ffffffff8326f070 D ksmn_cd +ffffffff83270000 D itherm_cd +ffffffff83271000 D pchtemp_cd +ffffffff83272000 D xspd_cd +ffffffff83273000 D virtio_pci_ops +ffffffff83274000 D bwfm_pci_buscore_ops +ffffffff83274030 D bwfm_pci_bus_ops +ffffffff83274058 D bwfm_pci_msgbuf_ops +ffffffff83275000 D bnxt_cd +ffffffff83276000 D mcx_cd +ffffffff83277000 D iavf_cd +ffffffff83278000 D rge_cd +ffffffff83279000 D igc_cd +ffffffff8327a000 D ngbe_cd +ffffffff8327b000 D agp_cd +ffffffff8327c000 D intagp_cd +ffffffff8327c020 D agp_i810_methods +ffffffff8327d000 D reservation_ww_class +ffffffff8327e000 d bridge_lock +ffffffff8327e010 d bridge_list +ffffffff8327f000 d drm_connector_enum_list +ffffffff8327f1f8 d connector_list_lock +ffffffff8327f208 d connector_list +ffffffff83280000 d kernel_fb_helper_list +ffffffff83280010 d kernel_fb_helper_lock +ffffffff83281000 D drm_global_mutex +ffffffff83282000 D sch_mtx +ffffffff83282010 D i2c_bit_algo +ffffffff83282020 d drm_fence_context_count +ffffffff83282028 d dma_fence_stub_mtx +ffffffff83282038 D wait_bit_mtx +ffffffff83282048 D shrinkers +ffffffff83283000 d crtc_ww_class +ffffffff83284000 d panel_lock +ffffffff83284010 d panel_list +ffffffff83285000 d ttm_global_mutex +ffffffff83286000 D intel_bbops +ffffffff83287000 d i915_sys_placement +ffffffff83287020 d i915_ttm_bo_driver +ffffffff83288000 d mchdev_lock +ffffffff83289000 D inteldrm_stdscreen +ffffffff83289030 D inteldrm_scrlist +ffffffff83289038 D inteldrm_screenlist +ffffffff83289048 D inteldrm_accessops +ffffffff832890a8 D inteldrm_cd +ffffffff8328a000 d capture_mutex +ffffffff8328b000 d mitigations +ffffffff8328c000 D i915_modparams +ffffffff8328d000 d schedule_lock +ffffffff8328e000 d unbind_fence_ops +ffffffff8328f000 D intel_graphics_stolen_res +ffffffff83290000 D btc_valid_sclk +ffffffff83291000 d evergreen_cs_packet_parse_vline.vline_start_end +ffffffff83291020 d evergreen_cs_packet_parse_vline.vline_status +ffffffff83292000 d r600_cs_packet_parse_vline.vline_start_end +ffffffff83292008 d r600_cs_packet_parse_vline.vline_status +ffffffff83293000 d r100_asic +ffffffff832932e0 d r200_asic +ffffffff832935c0 d r300_asic_pcie +ffffffff832938a0 d r300_asic +ffffffff83293b80 d r420_asic +ffffffff83293e60 d rs400_asic +ffffffff83294140 d rs600_asic +ffffffff83294420 d rs690_asic +ffffffff83294700 d rv515_asic +ffffffff832949e0 d r520_asic +ffffffff83294cc0 d r600_asic +ffffffff83294fa0 d rv6xx_asic +ffffffff83295280 d rs780_asic +ffffffff83295560 d rv770_asic +ffffffff83295840 d evergreen_asic +ffffffff83295b20 d sumo_asic +ffffffff83295e00 d btc_asic +ffffffff832960e0 d cayman_asic +ffffffff832963c0 d trinity_asic +ffffffff832966a0 d si_asic +ffffffff83296980 d ci_asic +ffffffff83296c60 d kv_asic +ffffffff83297000 d dce6_funcs +ffffffff83297018 d dce6_hdmi_funcs +ffffffff83297088 d dce6_dp_funcs +ffffffff832970f8 d dce4_funcs +ffffffff83297110 d dce4_hdmi_funcs +ffffffff83297180 d dce4_dp_funcs +ffffffff832971f0 d dce32_funcs +ffffffff83297208 d dce32_hdmi_funcs +ffffffff83297278 d dce32_dp_funcs +ffffffff832972e8 d r600_funcs +ffffffff83297300 d r600_hdmi_funcs +ffffffff83298000 D radeon_modeset +ffffffff83298004 D radeon_dynclks +ffffffff83298008 D radeon_agpmode +ffffffff8329800c D radeon_gart_size +ffffffff83298010 D radeon_tv +ffffffff83298014 D radeon_audio +ffffffff83298018 D radeon_pcie_gen2 +ffffffff8329801c D radeon_msi +ffffffff83298020 D radeon_lockup_timeout +ffffffff83298024 D radeon_dpm +ffffffff83298028 D radeon_aspm +ffffffff8329802c D radeon_runtime_pm +ffffffff83298030 D radeon_vm_size +ffffffff83298034 D radeon_vm_block_size +ffffffff83298038 D radeon_use_pflipirq +ffffffff8329803c D radeon_bapm +ffffffff83298040 D radeon_backlight +ffffffff83298044 D radeon_auxch +ffffffff83298048 D radeon_uvd +ffffffff8329804c D radeon_vce +ffffffff83298050 D radeon_si_support +ffffffff83298054 D radeon_cik_support +ffffffff83298058 D radeondrm_cd +ffffffff83298078 D radeondrm_stdscreen +ffffffff832980a8 D radeondrm_scrlist +ffffffff832980b0 D radeondrm_screenlist +ffffffff832980c0 D radeondrm_accessops +ffffffff83299000 D radeon_bbops +ffffffff8329a000 d radeon_bo_driver +ffffffff8329b000 d verde_pg_init +ffffffff8329c000 d cac_weights_pitcairn +ffffffff8329c4d0 d cac_weights_oland +ffffffff8329d000 d aldebaran_mode2_handler +ffffffff8329e000 d amdgpu_vbios_version_attrs +ffffffff8329f000 D amdgpu_asic_name +ffffffff832a0000 D amdgpu_gart_size +ffffffff832a0004 D amdgpu_gtt_size +ffffffff832a0008 D amdgpu_moverate +ffffffff832a000c D amdgpu_audio +ffffffff832a0010 D amdgpu_pcie_gen2 +ffffffff832a0014 D amdgpu_msi +ffffffff832a0018 D amdgpu_dpm +ffffffff832a001c D amdgpu_fw_load_type +ffffffff832a0020 D amdgpu_aspm +ffffffff832a0024 D amdgpu_runtime_pm +ffffffff832a0028 D amdgpu_ip_block_mask +ffffffff832a002c D amdgpu_bapm +ffffffff832a0030 D amdgpu_vm_size +ffffffff832a0034 D amdgpu_vm_fragment_size +ffffffff832a0038 D amdgpu_vm_block_size +ffffffff832a003c D amdgpu_vm_update_mode +ffffffff832a0040 D amdgpu_dc +ffffffff832a0044 D amdgpu_sched_jobs +ffffffff832a0048 D amdgpu_sched_hw_submission +ffffffff832a0050 D amdgpu_cg_mask +ffffffff832a0058 D amdgpu_pg_mask +ffffffff832a005c D amdgpu_sdma_phase_quantum +ffffffff832a0060 D amdgpu_pp_feature_mask +ffffffff832a0064 D amdgpu_lbpw +ffffffff832a0068 D amdgpu_compute_multipipe +ffffffff832a006c D amdgpu_gpu_recovery +ffffffff832a0070 D amdgpu_smu_pptable_id +ffffffff832a0074 D amdgpu_dc_feature_mask +ffffffff832a0078 D amdgpu_async_gfx_ring +ffffffff832a007c D amdgpu_discovery +ffffffff832a0080 D amdgpu_noretry +ffffffff832a0084 D amdgpu_force_asic_type +ffffffff832a0088 D amdgpu_tmz +ffffffff832a008c D amdgpu_reset_method +ffffffff832a0090 D amdgpu_num_kcq +ffffffff832a0094 D amdgpu_use_xgmi_p2p +ffffffff832a0098 D mgpu_info +ffffffff832a0248 D amdgpu_ras_enable +ffffffff832a024c D amdgpu_ras_mask +ffffffff832a0250 D amdgpu_bad_page_threshold +ffffffff832a0254 D amdgpu_backlight +ffffffff832a0258 D amdgpu_cd +ffffffff832a0278 D amdgpu_stdscreen +ffffffff832a02a8 D amdgpu_scrlist +ffffffff832a02b0 D amdgpu_screenlist +ffffffff832a02c0 D amdgpu_accessops +ffffffff832a1000 d amdgpu_gtt_mgr_attributes +ffffffff832a2000 D amdgpu_bbops +ffffffff832a3000 D soc15_ih_clientid_name +ffffffff832a4000 D ras_error_string +ffffffff832a4030 D ras_block_string +ffffffff832a40c0 D ras_mca_block_string +ffffffff832a5000 d amdgpu_bo_driver +ffffffff832a6000 d amdgpu_vram_mgr_attributes +ffffffff832a7000 D amdgpu_xgmi_hive_type +ffffffff832a7008 d xgmi_mutex +ffffffff832a7018 D xgmi_ras_hw_ops +ffffffff832a7058 D xgmi_ras +ffffffff832a8000 d gfx_v9_0_ras +ffffffff832a9000 D gfx_v9_4_ras +ffffffff832aa000 D gfx_v9_4_2_ras_ops +ffffffff832aa040 D gfx_v9_4_2_ras +ffffffff832ab000 D hdp_v4_0_ras_hw_ops +ffffffff832ab040 D hdp_v4_0_ras +ffffffff832ac000 d jpeg_v2_6_ras +ffffffff832ad000 D mca_v3_0_mp0_ras +ffffffff832ad058 D mca_v3_0_mp1_ras +ffffffff832ad0b0 D mca_v3_0_mpio_ras +ffffffff832ae000 D mmhub_v1_0_ras_hw_ops +ffffffff832ae040 D mmhub_v1_0_ras +ffffffff832af000 D mmhub_v1_7_ras_hw_ops +ffffffff832af040 D mmhub_v1_7_ras +ffffffff832b0000 D mmhub_v9_4_ras +ffffffff832b1000 D nbio_v7_4_ras +ffffffff832b2000 d sriov_sc_video_codecs_encode +ffffffff832b2010 d sriov_sc_video_codecs_decode +ffffffff832b2020 d sriov_sc_video_codecs_encode_array +ffffffff832b2050 d sriov_sc_video_codecs_decode_array +ffffffff832b3000 d sdma_v4_0_ras +ffffffff832b4000 D sdma_v4_4_ras +ffffffff832b5000 d sienna_cichlid_mode2_handler +ffffffff832b6000 D umc_v6_1_ras +ffffffff832b7000 D umc_v6_7_ras +ffffffff832b8000 D umc_v8_10_ras +ffffffff832b9000 D umc_v8_7_ras +ffffffff832ba000 d vcn_v2_6_ras +ffffffff832bb000 d amdgpu_dm_mode_config_helperfuncs +ffffffff832bb010 d dm_atomic_state_funcs +ffffffff832bc000 d construct_integrated_info.result +ffffffff832bc004 d bios_parser_get_firmware_info.result +ffffffff832bd000 d dce_funcs +ffffffff832be000 d dce110_funcs +ffffffff832bf000 d dce112_funcs +ffffffff832c0000 d dce120_funcs +ffffffff832c1000 d rv1_clk_funcs +ffffffff832c1088 d rv1_clk_internal_funcs +ffffffff832c2000 d rv2_clk_internal_funcs +ffffffff832c3000 d dcn2_funcs +ffffffff832c4000 D dcn201_funcs +ffffffff832c5000 d dcn21_funcs +ffffffff832c5088 d rn_bw_params +ffffffff832c6000 D dcn3_fpga_funcs +ffffffff832c6088 d dcn3_funcs +ffffffff832c7000 d vg_funcs +ffffffff832c7088 d dummy_clocks +ffffffff832c71b8 d vg_bw_params +ffffffff832c8000 d dcn31_bw_params +ffffffff832c82a0 d dcn31_funcs +ffffffff832c9000 d dcn314_bw_params +ffffffff832c92a0 d dcn314_funcs +ffffffff832ca000 d dcn315_funcs +ffffffff832ca088 d dcn315_bw_params +ffffffff832cb000 d dcn316_funcs +ffffffff832cb088 d dcn316_bw_params +ffffffff832cc000 d dcn32_funcs +ffffffff832cd000 d dcn10_dpp_cap +ffffffff832ce000 D aperture_default_system +ffffffff832cf000 d dcn20_dpp_cap +ffffffff832cf010 d dcn20_dpp_funcs +ffffffff832d0000 d dcn20_hubp_funcs +ffffffff832d1000 d dcn20_opp_funcs +ffffffff832d2000 d dcn20_tg_funcs +ffffffff832d3000 d dcn201_dpp_funcs +ffffffff832d3110 d dcn201_dpp_cap +ffffffff832d4000 d dcn201_hubp_funcs +ffffffff832d5000 d dcn201_opp_funcs +ffffffff832d6000 d dcn201_tg_funcs +ffffffff832d7000 D dcn201_ip +ffffffff832d71b8 D dcn201_soc +ffffffff832d7b88 d dcn201_res_pool_funcs +ffffffff832d8000 d dcn21_hubp_funcs +ffffffff832d9000 d dcn30_afmt_funcs +ffffffff832da000 d dcn30_dpp_cap +ffffffff832da010 d dcn30_dpp_funcs +ffffffff832db000 d dcn30_hubp_funcs +ffffffff832dc000 d dcn30_tg_funcs +ffffffff832dd000 d dcn30_vpg_funcs +ffffffff832de000 d res_cap_dcn301 +ffffffff832de040 d dcn301_res_pool_funcs +ffffffff832df000 d dcn302_res_pool_funcs +ffffffff832e0000 d dcn303_res_pool_funcs +ffffffff832e1000 d dcn31_afmt_funcs +ffffffff832e2000 d dcn31_apg_funcs +ffffffff832e3000 d dcn31_hpo_dp_link_encoder_funcs +ffffffff832e4000 d dcn31_hubp_funcs +ffffffff832e5000 d dcn31_tg_funcs +ffffffff832e6000 d dcn31_res_pool_funcs +ffffffff832e7000 d dcn31_vpg_funcs +ffffffff832e8000 d dcn314_tg_funcs +ffffffff832e9000 d dcn314_res_pool_funcs +ffffffff832ea000 d dcn315_res_pool_funcs +ffffffff832eb000 d dcn316_res_pool_funcs +ffffffff832ec000 d dcn32_dpp_funcs +ffffffff832ec110 d dcn32_dpp_cap +ffffffff832ed000 d dcn32_hpo_dp_link_encoder_funcs +ffffffff832ee000 d dcn32_hubp_funcs +ffffffff832ef000 d dcn32_tg_funcs +ffffffff832f0000 d dcn32_res_pool_funcs +ffffffff832f1000 d dcn321_res_pool_funcs +ffffffff832f2000 D dcn1_0_ip +ffffffff832f21b8 D dcn1_0_soc +ffffffff832f3000 D dcn2_0_ip +ffffffff832f31b8 D dcn2_0_nv14_ip +ffffffff832f3370 D dcn2_0_soc +ffffffff832f3d40 D dcn2_0_nv14_soc +ffffffff832f4710 D dcn2_1_ip +ffffffff832f48c8 D dcn2_1_soc +ffffffff832f5298 D ddr4_wm_table_gs +ffffffff832f5358 D lpddr4_wm_table_gs +ffffffff832f5418 D lpddr4_wm_table_with_disabled_ppt +ffffffff832f54d8 D ddr4_wm_table_rn +ffffffff832f5598 D ddr4_1R_wm_table_rn +ffffffff832f5658 D lpddr4_wm_table_rn +ffffffff832f6000 D dcn3_0_ip +ffffffff832f61b8 D dcn3_0_soc +ffffffff832f7000 D dcn3_01_ip +ffffffff832f71b8 D dcn3_01_soc +ffffffff832f7b88 D ddr4_wm_table +ffffffff832f7c48 D lpddr5_wm_table +ffffffff832f8000 D dcn3_02_ip +ffffffff832f81b8 D dcn3_02_soc +ffffffff832f9000 D dcn3_03_ip +ffffffff832f91b8 D dcn3_03_soc +ffffffff832fa000 D dcn3_1_ip +ffffffff832fa1b8 D dcn3_15_ip +ffffffff832fa370 D dcn3_16_ip +ffffffff832fa528 d dcn3_15_soc +ffffffff832faef8 d dcn3_1_soc +ffffffff832fb8c8 d dcn3_16_soc +ffffffff832fd000 D dcn3_14_ip +ffffffff832fd1b8 D dcn3_14_soc +ffffffff832fe000 D dcn3_2_ip +ffffffff832fe1b8 D dcn3_2_soc +ffffffff832ff000 D dcn3_21_ip +ffffffff832ff1b8 D dcn3_21_soc +ffffffff83300000 d dsc_policy_max_target_bpp_limit +ffffffff83301000 D DIDTEDCConfig_P12 +ffffffff83301070 d smu7_profiling +ffffffff83302000 d cyan_skillfish_table_map +ffffffff83302080 d cyan_skillfish_message_map +ffffffff83303000 d navi10_table_map +ffffffff83303080 d navi10_pwr_src_map +ffffffff83303090 d navi10_workload_map +ffffffff833030d0 d navi10_message_map +ffffffff83303b20 d navi10_clk_map +ffffffff83303be0 d navi10_feature_mask_map +ffffffff83304000 d sienna_cichlid_message_map +ffffffff83304a50 d sienna_cichlid_table_map +ffffffff83304ad0 d sienna_cichlid_pwr_src_map +ffffffff83304ae0 d sienna_cichlid_workload_map +ffffffff83304b20 d sienna_cichlid_clk_map +ffffffff83304be0 d sienna_cichlid_feature_mask_map +ffffffff83305000 d vangogh_message_map +ffffffff83305a50 d vangogh_table_map +ffffffff83305ad0 d vangogh_workload_map +ffffffff83305b10 d vangogh_feature_mask_map +ffffffff83306000 d renoir_table_map +ffffffff83306080 d renoir_workload_map +ffffffff833060c0 d renoir_message_map +ffffffff83306b10 d renoir_clk_map +ffffffff83307000 d smu_v13_0_0_message_map +ffffffff83307a50 d smu_v13_0_0_feature_mask_map +ffffffff83307e20 d smu_v13_0_0_table_map +ffffffff83307ea0 d smu_v13_0_0_pwr_src_map +ffffffff83307eb0 d smu_v13_0_0_workload_map +ffffffff83307ef0 d smu_v13_0_0_clk_map +ffffffff83308000 d smu_v13_0_4_message_map +ffffffff83308a50 d smu_v13_0_4_table_map +ffffffff83308ad0 d smu_v13_0_4_feature_mask_map +ffffffff83309000 d smu_v13_0_5_table_map +ffffffff83309080 d smu_v13_0_5_message_map +ffffffff83309ad0 d smu_v13_0_5_feature_mask_map +ffffffff8330a000 d smu_v13_0_7_message_map +ffffffff8330aa50 d smu_v13_0_7_feature_mask_map +ffffffff8330ae20 d smu_v13_0_7_table_map +ffffffff8330aea0 d smu_v13_0_7_pwr_src_map +ffffffff8330aeb0 d smu_v13_0_7_workload_map +ffffffff8330aef0 d smu_v13_0_7_clk_map +ffffffff8330b000 d yellow_carp_table_map +ffffffff8330b080 d yellow_carp_message_map +ffffffff8330bad0 d yellow_carp_feature_mask_map +ffffffff8330c000 D pci_conf_lock +ffffffff8330c010 D pci_bus_dma_tag +ffffffff8330c088 D msi_pic +ffffffff8330c118 D msix_pic +ffffffff8330d000 D pchb_cd +ffffffff8330e000 D amas_cd +ffffffff8330f000 D cardslot_cd +ffffffff83310000 D cardbus_cd +ffffffff83311000 d csdevs +ffffffff83312000 d ral_rt2560_opns +ffffffff83312028 d ral_rt2661_opns +ffffffff83312050 d ral_rt2860_opns +ffffffff83313000 D pcmcia_cd +ffffffff83314000 D pcmcia_3cxem556_func0 +ffffffff833140b8 D pcmcia_3cxem556_func0_cfe0 +ffffffff83314158 D pcmcia_megahertz_xjem1144_func0 +ffffffff83314210 D pcmcia_megahertz_xjem1144_func0_cfe0 +ffffffff833142b0 d pcmcia_3cxem556_func1 +ffffffff83314368 d pcmcia_3cxem556_func1_cfe0 +ffffffff83314408 d pcmcia_megahertz_xjem1144_func1 +ffffffff833144c0 d pcmcia_megahertz_xjem1144_func1_cfe0 +ffffffff83314560 d pcmcia_sierra_a555_func1 +ffffffff83314618 d pcmcia_sierra_a555_func1_cfe0 +ffffffff833146b8 d pcmcia_sveclancard_func0 +ffffffff83314770 d pcmcia_sveclancard_func0_cfe0 +ffffffff83315000 D ep_pcmcia_prod +ffffffff83316000 D aic_pcmcia_prod +ffffffff83317000 D com_pcmcia_prod +ffffffff83318000 D wdc_pcmcia_pr +ffffffff83319000 D sm_pcmcia_prod +ffffffff8331a000 D xe_cd +ffffffff8331b000 D pcib_cd +ffffffff8331c000 D amdpcib_cd +ffffffff8331d000 D tcpcib_cd +ffffffff8331e000 D aapic_cd +ffffffff8331f000 D hme_cd +ffffffff83320000 D isa_cd +ffffffff83321000 D isadma_cd +ffffffff83322000 D fdc_cd +ffffffff83323000 D fd_types +ffffffff833231f8 D fd_cd +ffffffff83324000 D mpu_cd +ffffffff83325000 D pcppi_cd +ffffffff83326000 D spkr_cd +ffffffff83327000 D wbsio_cd +ffffffff83328000 D schsio_cd +ffffffff83329000 D it_cd +ffffffff8332a000 D uguru_cd +ffffffff8332b000 D aps_cd +ffffffff8332c000 D isa_bus_dma_tag +ffffffff8332d000 D wsdisplay_cd +ffffffff8332d020 D wsdisplay_cons +ffffffff8332d058 D wsdisplay_defaultscreens +ffffffff8332e000 D wskbd_cd +ffffffff8332e020 D wskbd_default_bell_data +ffffffff8332e030 D wskbd_default_keyrepeat_data +ffffffff8332e040 D wskbd_srcops +ffffffff8332f000 d compose_tab +ffffffff83330000 D wsmouse_cd +ffffffff83330020 D wsmouse_srcops +ffffffff83331000 D wsmux_srcops +ffffffff83331030 D wsmux_tree_lock +ffffffff83332000 D vt100_output +ffffffff83333000 D pckbd_cd +ffffffff83334000 D pms_cd +ffffffff83334020 d synaptics_params +ffffffff83334030 d alps_params +ffffffff83335000 D skgpio_cd +ffffffff83336000 D pctr_conf_lock +ffffffff83337000 D ukbd_keymapdata +ffffffff83338000 D usbrev_str +ffffffff83338030 D usb_cd +ffffffff83339000 d usbd_ratecheck.errinterval +ffffffff8333a000 D uhub_cd +ffffffff8333b000 D uaudio_cd +ffffffff8333c000 D uvideo_ctrls +ffffffff8333c2d8 D uvideo_cd +ffffffff8333d000 D utvfu_norm_params +ffffffff8333d030 D utvfu_cd +ffffffff8333e000 D udl_reg_vals_640x480_60 +ffffffff8333e020 D udl_reg_vals_640x480_67 +ffffffff8333e040 D udl_reg_vals_640x480_72 +ffffffff8333e060 D udl_reg_vals_640x480_75 +ffffffff8333e080 D udl_reg_vals_800x480_61 +ffffffff8333e0a0 D udl_reg_vals_800x600_56 +ffffffff8333e0c0 D udl_reg_vals_800x600_60 +ffffffff8333e0e0 D udl_reg_vals_800x600_72 +ffffffff8333e100 D udl_reg_vals_800x600_74 +ffffffff8333e120 D udl_reg_vals_800x600_75 +ffffffff8333e140 D udl_reg_vals_1024x768_60 +ffffffff8333e160 D udl_reg_vals_1024x768_70 +ffffffff8333e180 D udl_reg_vals_1024x768_75 +ffffffff8333e1a0 D udl_reg_vals_1280x800_60 +ffffffff8333e1c0 D udl_reg_vals_1280x960_60 +ffffffff8333e1e0 D udl_reg_vals_1280x1024_60 +ffffffff8333e200 D udl_reg_vals_1280x1024_75 +ffffffff8333e220 D udl_reg_vals_1366x768_60 +ffffffff8333e240 D udl_reg_vals_1440x900_60 +ffffffff8333e260 D udl_reg_vals_1440x900_59 +ffffffff8333e280 D udl_reg_vals_1440x900_75 +ffffffff8333e2a0 D udl_reg_vals_1680x1050_60 +ffffffff8333e2c0 D udl_reg_vals_1600x1200_60 +ffffffff8333e2e0 D udl_reg_vals_1920x1080_60 +ffffffff8333e300 D udl_null_key_1 +ffffffff8333e310 D udl_decomp_table +ffffffff8333f510 D udl_cd +ffffffff8333f530 D udl_stdscreen +ffffffff8333f560 D udl_scrlist +ffffffff8333f568 D udl_screenlist +ffffffff8333f578 D udl_accessops +ffffffff83340000 D umidi_cd +ffffffff83341000 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE +ffffffff83341020 d umq_ROLAND_ROLAND_UM1_2 +ffffffff83341040 d umq_ROLAND_ROLAND_SC8850_2 +ffffffff83341060 d umq_ROLAND_ROLAND_SD90_2 +ffffffff83341080 d umq_ROLAND_ROLAND_UM880N_0 +ffffffff833410a0 d umq_ROLAND_ROLAND_UA100_2 +ffffffff833410c0 d umq_ROLAND_ROLAND_UM4_2 +ffffffff833410e0 d umq_ROLAND_ROLAND_U8_2 +ffffffff83341100 d umq_ROLAND_ROLAND_UM2_2 +ffffffff83341120 d umq_ROLAND_ROLAND_SC8820_2 +ffffffff83341140 d umq_ROLAND_ROLAND_PC300_2 +ffffffff83341160 d umq_ROLAND_ROLAND_SK500_2 +ffffffff83341180 d umq_ROLAND_ROLAND_SCD70_2 +ffffffff833411a0 d umq_ROLAND_ROLAND_UM550_0 +ffffffff833411c0 d umq_ROLAND_ROLAND_SD20_0 +ffffffff833411e0 d umq_ROLAND_ROLAND_SD80_0 +ffffffff83341200 d umq_ROLAND_ROLAND_UA700_3 +ffffffff83341220 d umq_ROLAND_ROLAND_UMONE_ANYIFACE +ffffffff83341240 D umidi_quirklist +ffffffff833414a0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_desc +ffffffff833414c0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_endpoints +ffffffff833414d0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_desc +ffffffff833414f0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_endpoints +ffffffff83341500 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_desc +ffffffff83341520 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_endpoints +ffffffff83341530 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_desc +ffffffff83341550 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_endpoints +ffffffff83341560 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_desc +ffffffff83341580 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_endpoints +ffffffff83341590 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_desc +ffffffff833415b0 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_endpoints +ffffffff833415c0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_desc +ffffffff833415e0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_endpoints +ffffffff833415f0 d umq_ROLAND_ROLAND_U8_2_fixed_ep_desc +ffffffff83341610 d umq_ROLAND_ROLAND_U8_2_fixed_ep_endpoints +ffffffff83341620 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_desc +ffffffff83341640 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_endpoints +ffffffff83341650 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_desc +ffffffff83341670 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_endpoints +ffffffff83341680 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_desc +ffffffff833416a0 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_endpoints +ffffffff833416b0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_desc +ffffffff833416d0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_endpoints +ffffffff833416e0 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_desc +ffffffff83341700 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_endpoints +ffffffff83341710 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_desc +ffffffff83341730 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_endpoints +ffffffff83341740 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_desc +ffffffff83341760 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_endpoints +ffffffff83341770 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_desc +ffffffff83341790 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_endpoints +ffffffff833417a0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_desc +ffffffff833417c0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_endpoints +ffffffff833417d0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_desc +ffffffff833417f0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_endpoints +ffffffff83342000 D ucom_cd +ffffffff83343000 D ugen_cd +ffffffff83344000 D uhidev_cd +ffffffff83344020 d uhidev_use_rdesc.reportbuf +ffffffff83345000 D uhid_cd +ffffffff83346000 D fido_cd +ffffffff83347000 D ujoy_cd +ffffffff83348000 D ukbd_cd +ffffffff83349000 D ums_cd +ffffffff83349020 d ums_fix_elecom_descriptor.match +ffffffff8334a000 D umt_cd +ffffffff8334b000 D def_scale +ffffffff8334b020 D uts_cd +ffffffff8334c000 D ubcmtp_cd +ffffffff8334d000 D ucycom_cd +ffffffff8334e000 D uslhcom_cd +ffffffff8334f000 D ulpt_fwdevs +ffffffff8334f060 D ulpt_cd +ffffffff8334f080 D ulptusein +ffffffff83350000 D umass_cd +ffffffff83350020 d umass_bbb_transfer.dCBWtag +ffffffff83351000 D uthum_cd +ffffffff83352000 D ugold_cd +ffffffff83352020 d cmd_init +ffffffff83352028 d cmd_type +ffffffff83352030 d cmd_data +ffffffff83353000 D utrh_cd +ffffffff83354000 D uoakrh_cd +ffffffff83355000 D uoaklux_cd +ffffffff83356000 D uoakv_cd +ffffffff83357000 D uonerng_cd +ffffffff83358000 D urng_cd +ffffffff83359000 D udcf_cd +ffffffff8335a000 D umbg_cd +ffffffff8335b000 D uvisor_cd +ffffffff8335c000 D udsbr_cd +ffffffff8335d000 D utwitch_cd +ffffffff8335e000 D aue_cd +ffffffff8335f000 D axe_cd +ffffffff83360000 D axen_cd +ffffffff83361000 D smsc_cd +ffffffff83362000 D cue_devs +ffffffff83362010 D cue_cd +ffffffff83363000 D kue_cd +ffffffff83364000 D cdce_cd +ffffffff83365000 D urndis_cd +ffffffff83366000 D mos_cd +ffffffff83367000 D mue_cd +ffffffff83368000 D udav_cd +ffffffff83369000 D upl_devs +ffffffff83369008 D upl_cd +ffffffff8336a000 D ugl_devs +ffffffff8336a008 D ugl_cd +ffffffff8336b000 D url_cd +ffffffff8336c000 D ure_cd +ffffffff8336d000 D uaq_cd +ffffffff8336e000 D umodem_cd +ffffffff8336f000 D uftdi_cd +ffffffff83370000 D uplcom_cd +ffffffff83371000 D umct_cd +ffffffff83372000 D uvscom_cd +ffffffff83373000 D ubsa_cd +ffffffff83374000 D ukspan_cd +ffffffff83375000 D uslcom_cd +ffffffff83376000 D uark_cd +ffffffff83377000 D moscom_cd +ffffffff83378000 D umcs_cd +ffffffff83379000 D uscom_cd +ffffffff8337a000 D ucrcom_cd +ffffffff8337b000 D uxrcom_cd +ffffffff8337c000 D uipaq_cd +ffffffff8337d000 D umsm_cd +ffffffff8337e000 D uchcom_cd +ffffffff8337f000 D uticom_cd +ffffffff83380000 D wi_func_usb +ffffffff83380060 D wi_usb_cd +ffffffff83381000 D atu_cd +ffffffff83381020 D atu_devs +ffffffff83381270 D atu_radfirm +ffffffff83382000 D ural_cd +ffffffff83383000 D rum_cd +ffffffff83384000 D run_cd +ffffffff83384020 D rt3070_freqs +ffffffff83385000 D mtw_cd +ffffffff83386000 D zyd_cd +ffffffff83387000 D upgt_cd +ffffffff83388000 D urtw_cd +ffffffff83389000 D urtwn_cd +ffffffff8338a000 D rsu_cd +ffffffff8338b000 D otus_cd +ffffffff8338b020 d AR_PLCP_HDR_INTR +ffffffff8338c000 D umb_xfer_tout +ffffffff8338c010 D umb_uuid_basic_connect +ffffffff8338c020 D umb_uuid_context_internet +ffffffff8338c030 D umb_uuid_qmi_mbim +ffffffff8338c040 D umb_cd +ffffffff8338c060 D umb_delay +ffffffff8338c070 D umb_qmi_alloc_cid +ffffffff8338c080 D umb_qmi_fcc_auth +ffffffff8338d000 D uath_cd +ffffffff8338e000 D uow_cd +ffffffff8338f000 D uberry_cd +ffffffff83390000 D upd_cd +ffffffff83390020 d upd_usage_roots +ffffffff833900a0 d upd_usage_batdep +ffffffff83391000 D uwacom_cd +ffffffff83391020 d uwacom_attach.reportbuf +ffffffff83392000 D bwfm_usb_bus_ops +ffffffff83393000 D umstc_cd +ffffffff83394000 D uhidpp_cd +ffffffff83395000 D ucc_cd +ffffffff83396000 D iic_cd +ffffffff83397000 D probe_addrs_sensor +ffffffff83397008 D probe_addrs_eeprom +ffffffff83398000 D lmtemp_cd +ffffffff83399000 D lmn_worklist +ffffffff83399240 D lmn_cd +ffffffff8339a000 D lmenv_cd +ffffffff8339b000 D maxtmp_cd +ffffffff8339c000 D adc_cd +ffffffff8339d000 D admtemp_cd +ffffffff8339e000 D admlc_cd +ffffffff8339f000 D admtm_cd +ffffffff833a0000 D admtmp_cd +ffffffff833a1000 D admtt_cd +ffffffff833a2000 D maxds_cd +ffffffff833a3000 D adt_chips +ffffffff833a3160 D worklist +ffffffff833a31a0 D adt_cd +ffffffff833a4000 D admcts_cd +ffffffff833a5000 D wbng_cd +ffffffff833a6000 D nvt_cd +ffffffff833a7000 D adl_worklist +ffffffff833a7138 D adl_cd +ffffffff833a8000 D andl_cd +ffffffff833a9000 D sdtemp_cd +ffffffff833aa000 D lisa_cd +ffffffff833ab000 D ihidev_cd +ffffffff833ac000 D ikbd_cd +ffffffff833ad000 D ims_cd +ffffffff833ae000 D imt_cd +ffffffff833af000 D iatp_cd +ffffffff833b0000 D bgw_cd +ffffffff833b1000 D icc_cd +ffffffff833b2000 D gpio_cd +ffffffff833b3000 D acpi_cd +ffffffff833b3020 D acpi_pcidevs +ffffffff833b3030 D acpi_pcirootdevs +ffffffff833b3040 D acpi_taskq +ffffffff833b3050 d acpi_indicator.save_led_state +ffffffff833b3060 d acpi_getprop.prop_guid +ffffffff833b3070 d acpi_getpropint.prop_guid +ffffffff833b3080 D acpi_skip_hids +ffffffff833b30f0 D acpi_isa_hids +ffffffff833b4000 D aml_intlen +ffffffff833b4010 D aml_table +ffffffff833b4af0 d osstring +ffffffff833b4b10 D aml_defobj +ffffffff833b4ca0 D aml_valid_osi +ffffffff833b4d78 D acpi_max_osi +ffffffff833b4d80 D aml_regionspace +ffffffff833b6000 D acpitimer_cd +ffffffff833b6020 d acpi_timecounter +ffffffff833b7000 D acpiac_cd +ffffffff833b7020 D acpiac_hids +ffffffff833b8000 D acpibat_cd +ffffffff833b8020 D acpibat_hids +ffffffff833b9000 D acpibtn_cd +ffffffff833b9020 D acpibtn_hids +ffffffff833ba000 D acpicmos_cd +ffffffff833ba020 D acpicmos_hids +ffffffff833bb000 D acpicpu_cd +ffffffff833bb020 D acpicpu_hids +ffffffff833bb030 d acpicpu_set_pdc.cpu_oscuuid +ffffffff833bc000 D acpihpet_cd +ffffffff833bc020 d hpet_timecounter +ffffffff833bd000 D acpiec_cd +ffffffff833bd020 D acpiec_hids +ffffffff833be000 D acpitz_cd +ffffffff833be020 D acpitz_perflevel +ffffffff833bf000 D acpimadt_cd +ffffffff833c0000 D acpimcfg_cd +ffffffff833c1000 D acpiprt_map_list +ffffffff833c1010 D acpiprt_cd +ffffffff833c1030 D acpiprt_pri +ffffffff833c2000 D acpidmar_force_cm +ffffffff833c2008 D acpidmar_cd +ffffffff833c2030 D vtd_faults +ffffffff833c3000 D acpidock_cd +ffffffff833c4000 D abl_cd +ffffffff833c4020 D abl_hids +ffffffff833c5000 D asmc_cd +ffffffff833c5020 D asmc_hids +ffffffff833c6000 D acpiasus_cd +ffffffff833c6020 D acpiasus_hids +ffffffff833c7000 D acpithinkpad_cd +ffffffff833c7020 D acpithinkpad_hids +ffffffff833c8000 D acpitoshiba_cd +ffffffff833c8020 D acpitoshiba_hids +ffffffff833c9000 D acpisony_cd +ffffffff833ca000 D acpivideo_cd +ffffffff833cb000 D acpivout_cd +ffffffff833cc000 D acpipwrres_cd +ffffffff833cd000 D aibs_cd +ffffffff833cd020 d aibs_hids +ffffffff833ce000 D aplgpio_cd +ffffffff833ce020 D aplgpio_hids +ffffffff833cf000 D bytgpio_cd +ffffffff833cf020 D bytgpio_hids +ffffffff833d0000 D chvgpio_cd +ffffffff833d0020 D chvgpio_hids +ffffffff833d1000 D glkgpio_cd +ffffffff833d1020 D glkgpio_hids +ffffffff833d2000 D pchgpio_cd +ffffffff833d2020 D pchgpio_hids +ffffffff833d2070 D pchgpio_devices +ffffffff833d3000 D tipmic_cd +ffffffff833d3020 D tipmic_thermal_regmap +ffffffff833d3030 D tipmic_power_regmap +ffffffff833d4000 D ccpmic_cd +ffffffff833d4020 D ccpmic_thermal_regmap +ffffffff833d4023 D ccpmic_power_regmap +ffffffff833d5000 D com_hids +ffffffff833d6000 D sdhc_hids +ffffffff833d7000 D dwiic_hids +ffffffff833d7050 D ihidev_hids +ffffffff833d7070 D iatp_hids +ffffffff833d7090 d dwiic_acpi_found_ihidev.i2c_hid_guid +ffffffff833d8000 D acpicbkbd_cd +ffffffff833d8020 D acpicbkbd_hids +ffffffff833d9000 D acpials_cd +ffffffff833d9020 D acpials_hids +ffffffff833da000 D tpm_cd +ffffffff833da020 D tpm_hids +ffffffff833db000 D acpihve_cd +ffffffff833dc000 D acpisbs_cd +ffffffff833dc020 D acpisbs_hids +ffffffff833dd000 D acpisurface_cd +ffffffff833dd020 D acpisurface_hids +ffffffff833de000 D ipmi_acpi_hids +ffffffff833df000 D amdgpio_cd +ffffffff833df020 D amdgpio_hids +ffffffff833e0000 D acpihid_cd +ffffffff833e0020 D acpihid_hids +ffffffff833e0030 d acpihid_guid +ffffffff833e1000 D acpipci_cd +ffffffff833e1020 D acpipci_hids +ffffffff833e1040 d acpipci_osc.uuid +ffffffff833e2000 D efi_cd +ffffffff833e3000 D vmm_hv_signature +ffffffff833e3008 D vmm_cd +ffffffff833e4000 D sdmmc_cd +ffffffff833e5000 D bwfm_sdio_bus_ops +ffffffff833e5028 D bwfm_sdio_buscore_ops +ffffffff833e6000 D onewire_cd +ffffffff833e7000 D owid_cd +ffffffff833e8000 D owsbm_cd +ffffffff833e9000 D owtemp_cd +ffffffff833ea000 D owctr_cd +ffffffff833eb000 D hz +ffffffff833eb004 D tick +ffffffff833eb008 D tick_nsec +ffffffff833eb00c D initialvnodes +ffffffff833eb010 D maxprocess +ffffffff833eb014 D maxthread +ffffffff833eb018 D maxfiles +ffffffff833eb020 D nmbclust +ffffffff833eb028 D mblowat +ffffffff833eb02c D mcllowat +ffffffff833eb030 D bufcachepercent +ffffffff833eb034 D fscale +ffffffff833eb038 D shminfo +ffffffff833eb04c D seminfo +ffffffff833ec000 D extraloc +ffffffff833ec100 D rextraloc +ffffffff833ec110 D locnames +ffffffff833ec1f0 D locnamp +ffffffff833ec408 D pv_size +ffffffff833ec410 D pv +ffffffff833ec630 d loc +ffffffff833ecac0 D cfdata +ffffffff833f3510 D cfroots +ffffffff833f351c D cfroots_size +ffffffff833f3520 D pdevnames +ffffffff833f3680 D pdevnames_size +ffffffff833f3690 D pdevinit +ffffffff833f4000 D rootdev +ffffffff833f4004 D dumpdev +ffffffff833f4010 D swdevt +ffffffff833f5000 A __kudata_start +ffffffff833f5000 D tlb_shoot_first_pcid +ffffffff833f5008 D tlb_shoot_addr1 +ffffffff833f5010 D tlb_shoot_addr2 +ffffffff833f5018 D tlb_shoot_wait +ffffffff833f6000 A __kudata_end +ffffffff833f6000 C _edata +ffffffff833f6000 b drm_minors_idr +ffffffff833f6008 B drm_refcnt +ffffffff833f7000 B vga_console_screen +ffffffff833f7070 B vga_console_attached +ffffffff833f7078 B vga_console_vc +ffffffff833f7488 B vgaconsole +ffffffff833f748c B vga_console_type +ffffffff833f8000 b wdc_alloc_queue.inited +ffffffff833f8008 B wdc_xfer_pool +ffffffff833f81b0 B wdc_xfer_iopool +ffffffff833f9000 B aic_debug +ffffffff833fa000 B gdt_cnt +ffffffff833fa004 B gdt_polling +ffffffff833fa005 B gdt_from_wait +ffffffff833fa008 b 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