--- 7.3/2023-05-18T04:43:55Z/2023-04-24T00:00:00Z/nm-bsd-ot14.txt Sat May 20 09:15:42 2023 +++ 7.3/2023-05-18T04:43:55Z/2023-04-25T00:00:00Z/nm-bsd-ot14.txt Sat May 20 11:15:51 2023 @@ -2,14 +2,14 @@ 00011006 A mp_pdirpa 0001419d A acpi_pdirpa 01000000 A __kernel_phys_base -0254c000 T __kernel_kutext_phys -02550000 C __kernel_cptext_phys -02551000 C __kernel_rodata_phys -02e06000 R __kernel_kutext_page_phys -02e08000 C __kernel_randomdata_phys -030c9000 R __kernel_data_phys -033fc000 D __kernel_kudata_phys -033fd000 C __kernel_bss_phys +0254d000 T __kernel_kutext_phys +02551000 C __kernel_cptext_phys +02552000 C __kernel_rodata_phys +02e07000 R __kernel_kutext_page_phys +02e09000 C __kernel_randomdata_phys +030ca000 R __kernel_data_phys +033fd000 D __kernel_kudata_phys +033fe000 C __kernel_bss_phys 03800000 B __kernel_phys_end 80000000 A __kernel_virt_to_phys ffffffff80000000 A __kernel_base @@ -5612,9 +5612,9 @@ ffffffff812a3200 t klist_rwlock_lock ffffffff812a3240 t klist_rwlock_unlock ffffffff812a4000 T check_exec ffffffff812a4320 T sys_execve -ffffffff812a52e0 T copyargs -ffffffff812a54b0 T exec_timekeep_map -ffffffff812a5650 T exec_sigcode_map +ffffffff812a5310 T copyargs +ffffffff812a54e0 T exec_timekeep_map +ffffffff812a5680 T exec_sigcode_map ffffffff812a6000 T sys_exit ffffffff812a6020 T exit1 ffffffff812a6660 T sys___threxit @@ -6852,31 +6852,31 @@ ffffffff8132eb30 T sobind ffffffff8132ebb0 T solisten ffffffff8132ec80 T sounsplice ffffffff8132ee50 T sorflush -ffffffff8132ef60 T soreaper -ffffffff8132efb0 T soclose -ffffffff8132f2c0 T sodisconnect -ffffffff8132f330 T soabort -ffffffff8132f360 T soaccept -ffffffff8132f410 T soconnect -ffffffff8132f4e0 T soconnect2 -ffffffff8132f590 T sosend -ffffffff8132fac0 T m_getuio -ffffffff8132fcc0 T sbsync -ffffffff8132fd20 T soreceive -ffffffff81330b50 T soshutdown -ffffffff81330be0 T sosplice -ffffffff81331000 T soidle -ffffffff81331050 T sotask -ffffffff81331090 T somove -ffffffff81331b50 T sorwakeup -ffffffff81331c10 T sowwakeup -ffffffff81331cb0 T soput -ffffffff81331cf0 T sosetopt -ffffffff81332210 T sogetopt -ffffffff813326b0 T sohasoutofband -ffffffff813326f0 T soo_kqfilter -ffffffff813327b0 T sobuf_print -ffffffff813328e0 T so_print +ffffffff8132ef50 T soreaper +ffffffff8132efa0 T soclose +ffffffff8132f2b0 T sodisconnect +ffffffff8132f320 T soabort +ffffffff8132f350 T soaccept +ffffffff8132f400 T soconnect +ffffffff8132f4d0 T soconnect2 +ffffffff8132f580 T sosend +ffffffff8132fab0 T m_getuio +ffffffff8132fcb0 T sbsync +ffffffff8132fd10 T soreceive +ffffffff81330b40 T soshutdown +ffffffff81330bd0 T sosplice +ffffffff81330ff0 T soidle +ffffffff81331040 T sotask +ffffffff81331080 T somove +ffffffff81331b40 T sorwakeup +ffffffff81331c00 T sowwakeup +ffffffff81331ca0 T soput +ffffffff81331ce0 T sosetopt +ffffffff81332200 T sogetopt +ffffffff813326a0 T sohasoutofband +ffffffff813326e0 T soo_kqfilter +ffffffff813327a0 T sobuf_print +ffffffff813328d0 T so_print ffffffff81333000 T soisconnecting ffffffff813330a0 T soassertlocked ffffffff81333130 T soisconnected @@ -6985,36 +6985,36 @@ ffffffff8133dc20 T bufbackoff ffffffff8133e040 T bufcache_gethighcleanbuf ffffffff8133e080 T bufcache_take ffffffff8133e270 T buf_flip_high -ffffffff8133e3e0 T buf_flip_dma -ffffffff8133e530 T bio_doread -ffffffff8133e620 T getblk -ffffffff8133e760 T brelse -ffffffff8133ec20 T bread -ffffffff8133ece0 T biowait -ffffffff8133ede0 T breadn -ffffffff8133ef80 T incore -ffffffff8133f020 T bread_cluster_callback -ffffffff8133f280 T biodone -ffffffff8133f3b0 T bread_cluster -ffffffff8133f790 T buf_get -ffffffff8133fdc0 T bwrite -ffffffff8133ff50 T bdwrite -ffffffff8133ffd0 T bawrite -ffffffff8133fff0 T buf_dirty -ffffffff81340080 T buf_undirty -ffffffff81340110 T bufcache_release -ffffffff813402e0 T geteblk -ffffffff81340330 T buf_daemon -ffffffff813405d0 T bufcache_getdirtybuf -ffffffff81340600 T bcstats_print -ffffffff813406e0 T buf_adjcnt -ffffffff81340740 T chillbufs -ffffffff81340880 T bufcache_getcleanbuf -ffffffff81340ae0 T discard_buffer -ffffffff81340b50 T bufcache_getcleanbuf_range -ffffffff81340be0 T bufcache_getdmacleanbuf -ffffffff81340c50 T hibernate_suspend_bufcache -ffffffff81340db0 T hibernate_resume_bufcache +ffffffff8133e3d0 T buf_flip_dma +ffffffff8133e520 T bio_doread +ffffffff8133e610 T getblk +ffffffff8133e750 T brelse +ffffffff8133ec10 T bread +ffffffff8133ecd0 T biowait +ffffffff8133edd0 T breadn +ffffffff8133ef60 T bread_cluster_callback +ffffffff8133f1c0 T biodone +ffffffff8133f2f0 T bread_cluster +ffffffff8133f6d0 T buf_get +ffffffff8133fcc0 T bwrite +ffffffff8133fe50 T bdwrite +ffffffff8133fed0 T bawrite +ffffffff8133fef0 T buf_dirty +ffffffff8133ff80 T buf_undirty +ffffffff81340010 T bufcache_release +ffffffff813401e0 T incore +ffffffff81340290 T geteblk +ffffffff813402e0 T buf_daemon +ffffffff81340580 T bufcache_getdirtybuf +ffffffff813405b0 T bcstats_print +ffffffff81340690 T buf_adjcnt +ffffffff813406f0 T chillbufs +ffffffff81340830 T bufcache_getcleanbuf +ffffffff81340a90 T discard_buffer +ffffffff81340b00 T bufcache_getcleanbuf_range +ffffffff81340b90 T bufcache_getdmacleanbuf +ffffffff81340c00 T hibernate_suspend_bufcache +ffffffff81340d60 T hibernate_resume_bufcache ffffffff81341000 T buf_mem_init ffffffff813410d0 T buf_acquire ffffffff81341140 T buf_map @@ -9253,20 +9253,20 @@ ffffffff8142b300 T in_control ffffffff8142b340 T in_ioctl ffffffff8142b6b0 T in_ioctl_get ffffffff8142b820 T in_ioctl_set_ifaddr -ffffffff8142ba20 T in_ioctl_change_ifaddr -ffffffff8142be40 T in_scrubhost -ffffffff8142be70 T in_addhost -ffffffff8142bea0 T in_ifscrub -ffffffff8142bf40 T in_ifinit -ffffffff8142c1e0 T in_purgeaddr -ffffffff8142c2e0 T in_remove_prefix -ffffffff8142c350 T in_insert_prefix -ffffffff8142c3d0 T in_addmulti -ffffffff8142c570 T in_delmulti -ffffffff8142c6c0 T in_broadcast -ffffffff8142c750 T in_hasmulti -ffffffff8142c7f0 T in_ifdetach -ffffffff8142c880 T in_prefixlen2mask +ffffffff8142ba10 T in_ioctl_change_ifaddr +ffffffff8142be20 T in_scrubhost +ffffffff8142be50 T in_addhost +ffffffff8142be80 T in_ifscrub +ffffffff8142bf20 T in_ifinit +ffffffff8142c1c0 T in_purgeaddr +ffffffff8142c2c0 T in_remove_prefix +ffffffff8142c330 T in_insert_prefix +ffffffff8142c3b0 T in_addmulti +ffffffff8142c550 T in_delmulti +ffffffff8142c6a0 T in_broadcast +ffffffff8142c730 T in_hasmulti +ffffffff8142c7d0 T in_ifdetach +ffffffff8142c860 T in_prefixlen2mask ffffffff8142d000 T in_init ffffffff8142d060 T in_pcbhash ffffffff8142d180 T in_pcblhash @@ -13019,11 +13019,11 @@ ffffffff816748a0 T cpu_init_vmm ffffffff81674950 T cpu_boot_secondary_processors ffffffff81674a80 T cpu_boot_secondary ffffffff81674b50 T cpu_hatch -ffffffff81674de0 T cpu_init_msrs -ffffffff81674ec0 T cpu_debug_dump -ffffffff81674f70 T patinit -ffffffff81674fc0 T rdrand -ffffffff816750b0 T wbinvd_on_all_cpus +ffffffff81674df0 T cpu_init_msrs +ffffffff81674ed0 T cpu_debug_dump +ffffffff81674f80 T patinit +ffffffff81674fd0 T rdrand +ffffffff816750c0 T wbinvd_on_all_cpus ffffffff81676000 T lapic_hwmask ffffffff81676050 T lapic_hwunmask ffffffff816760a0 T lapic_setup @@ -14478,14878 +14478,14874 @@ ffffffff817191c0 T aq_fw2x_reset ffffffff81719250 T aq_fw2x_set_mode ffffffff817193f0 T aq_fw2x_get_mode ffffffff81719580 T aq_fw2x_get_stats -ffffffff817195b0 T aq_match -ffffffff817195e0 T aq_attach -ffffffff8171a200 T aq_activate -ffffffff8171a230 T aq_lookup -ffffffff8171a400 T aq_intr -ffffffff8171a590 T aq_intr_link -ffffffff8171a690 T aq1_fw_reboot -ffffffff8171a8e0 T aq_hw_reset -ffffffff8171aa40 T aq_init_rss -ffffffff8171adb0 T aq_hw_init -ffffffff8171afc0 T aq_ifmedia_change -ffffffff8171b090 T aq_ifmedia_status -ffffffff8171b180 T aq_ioctl -ffffffff8171b3c0 T aq_start -ffffffff8171b700 T aq_watchdog -ffffffff8171b730 T aq_set_linkmode -ffffffff8171b760 T aq_refill -ffffffff8171b7d0 T aq_intr_queue -ffffffff8171b8b0 T aq_enable_intr -ffffffff8171b9c0 T aq1_fw_read_version -ffffffff8171ba60 T aq1_mac_soft_reset -ffffffff8171ba90 T aq1_fw_version_init -ffffffff8171bc10 T aq1_hw_init_ucp -ffffffff8171bda0 T aq1_mac_soft_reset_rbl -ffffffff8171c040 T aq1_global_software_reset -ffffffff8171c160 T aq1_mac_soft_reset_flb -ffffffff8171c520 T aq1_fw_downld_dwords -ffffffff8171c840 T aq_hw_l3_filter_set -ffffffff8171ca50 T aq_hw_init_tx_path -ffffffff8171cc60 T aq_hw_init_rx_path -ffffffff8171d1a0 T aq_set_mac_addr -ffffffff8171d380 T aq_hw_qos_set -ffffffff8171d9a0 T aq_get_linkmode -ffffffff8171da10 T aq_txring_reset -ffffffff8171ddc0 T aq_rxring_reset -ffffffff8171e2d0 T aq_rx_fill -ffffffff8171e4d0 T aq_rxeof -ffffffff8171e850 T aq_txeof -ffffffff8171ea20 T aq_update_link_status -ffffffff8171eac0 T aq_free_slots -ffffffff8171eb70 T aq_queue_up -ffffffff8171efe0 T aq_dmamem_alloc -ffffffff8171f130 T aq_dmamem_free -ffffffff8171f1a0 T aq_queue_down -ffffffff8171f480 T aq_invalidate_rx_desc_cache -ffffffff8171f500 T aq_up -ffffffff8171f940 T aq_down -ffffffff8171fa90 T aq_rxrinfo -ffffffff8171fb80 T aq_iff -ffffffff81720000 T tulip_probe -ffffffff81720060 T tulip_attach -ffffffff81720ab0 T tulip_timeout_callback -ffffffff81720b00 T tulip_timeout -ffffffff81720b70 T tulip_txprobe -ffffffff81720cb0 T tulip_txput -ffffffff81721230 T tulip_media_set -ffffffff81721820 T tulip_reset -ffffffff81721be0 T tulip_mii_autonegotiate -ffffffff81721ee0 T tulip_mii_readreg -ffffffff81722090 T tulip_mii_writereg -ffffffff81722250 T tulip_linkup -ffffffff81722320 T tulip_init -ffffffff817224a0 T tulip_media_print -ffffffff817224f0 T tulip_media_link_monitor -ffffffff81722760 T tulip_mii_map_abilities -ffffffff817227f0 T tulip_media_poll -ffffffff81722ce0 T tulip_mii_phy_readspecific -ffffffff81722ea0 T tulip_media_select -ffffffff81722fb0 T tulip_21040_mediainfo_init -ffffffff817230b0 T tulip_21040_media_probe -ffffffff817231a0 T tulip_21040_10baset_only_media_probe -ffffffff81723260 T tulip_21040_10baset_only_media_select -ffffffff817232c0 T tulip_21040_auibnc_only_media_probe -ffffffff81723350 T tulip_21040_auibnc_only_media_select -ffffffff817233a0 T tulip_21041_mediainfo_init -ffffffff81723460 T tulip_21041_media_probe -ffffffff81723540 T tulip_21041_media_poll -ffffffff81723850 T tulip_mii_get_phyaddr -ffffffff81723910 T tulip_2114x_media_preset -ffffffff81723b30 T tulip_null_media_poll -ffffffff81723b60 T tulip_21140_mediainit -ffffffff81723bb0 T tulip_21140_evalboard_media_probe -ffffffff81723d90 T tulip_21140_accton_media_probe -ffffffff81723fb0 T tulip_21140_smc9332_media_probe -ffffffff817241e0 T tulip_21140_cogent_em100_media_probe -ffffffff81724350 T tulip_21140_znyx_zx34x_media_probe -ffffffff81724590 T tulip_2114x_media_probe -ffffffff817245c0 T tulip_delay_300ns -ffffffff817246d0 T tulip_srom_idle -ffffffff81725070 T tulip_srom_read -ffffffff81725e10 T tulip_mii_writebits -ffffffff817263a0 T tulip_mii_turnaround -ffffffff81726b70 T tulip_mii_readbits -ffffffff81726f50 T tulip_identify_dec_nic -ffffffff81727000 T tulip_identify_znyx_nic -ffffffff817272d0 T tulip_identify_smc_nic -ffffffff817274b0 T tulip_identify_cogent_nic -ffffffff817275a0 T tulip_identify_accton_nic -ffffffff817276d0 T tulip_identify_asante_nic -ffffffff817279a0 T tulip_identify_compex_nic -ffffffff81727af0 T tulip_srom_decode -ffffffff81728740 T tulip_read_macaddr -ffffffff81729100 T tulip_ifmedia_add -ffffffff817291f0 T tulip_ifmedia_change -ffffffff817293d0 T tulip_ifmedia_status -ffffffff81729440 T tulip_alloc_rxmap -ffffffff81729480 T tulip_free_rxmap -ffffffff817294c0 T tulip_alloc_txmap -ffffffff81729500 T tulip_free_txmap -ffffffff81729540 T tulip_addr_filter -ffffffff81729850 T tulip_rx_intr -ffffffff81729e60 T tulip_txput_setup -ffffffff8172a0f0 T tulip_tx_intr -ffffffff8172a510 T tulip_print_abnormal_interrupt -ffffffff8172a540 T tulip_intr_handler -ffffffff8172a8f0 T tulip_ifstart -ffffffff8172a9c0 T tulip_intr_shared -ffffffff8172aa30 T tulip_intr_normal -ffffffff8172aa80 T tulip_ifioctl -ffffffff8172ab70 T tulip_ifwatchdog -ffffffff8172ac70 T tulip_busdma_allocmem -ffffffff8172ae00 T tulip_busdma_init -ffffffff8172b020 T tulip_initcsrs -ffffffff8172b120 T tulip_initring -ffffffff8172c000 T ep_pci_match -ffffffff8172c030 T ep_pci_attach -ffffffff8172d000 T pcn_match -ffffffff8172d070 T pcn_attach -ffffffff8172d7e0 T pcn_tick -ffffffff8172d830 T pcn_reset -ffffffff8172d8a0 T pcn_intr -ffffffff8172dae0 T pcn_ioctl -ffffffff8172dc40 T pcn_start -ffffffff8172e090 T pcn_watchdog -ffffffff8172e100 T pcn_txintr -ffffffff8172e5c0 T pcn_init -ffffffff8172ee80 T pcn_stop -ffffffff8172f000 T pcn_rxintr -ffffffff8172f520 T pcn_spnd -ffffffff8172f620 T pcn_add_rxbuf -ffffffff8172f810 T pcn_rxdrain -ffffffff8172f8b0 T pcn_set_filter -ffffffff8172fa10 T pcn_79c970_mediainit -ffffffff8172fb20 T pcn_79c970_mediachange -ffffffff8172fce0 T pcn_79c970_mediastatus -ffffffff8172fd20 T pcn_79c971_mediainit -ffffffff8172fdf0 T pcn_mii_readreg -ffffffff8172feb0 T pcn_mii_writereg -ffffffff8172ff50 T pcn_mii_statchg -ffffffff8172ffb0 T pcn_79c971_mediachange -ffffffff81730000 T pcn_79c971_mediastatus -ffffffff81731000 T siop_lookup_product -ffffffff817310a0 T siop_pci_attach_common -ffffffff81731530 T siop_pci_reset -ffffffff81732000 T siop_pci_match -ffffffff81732050 T siop_pci_attach -ffffffff81733000 T sii3114_read_reg -ffffffff81733060 T sii3114_write_reg -ffffffff817330d0 T pdc203xx_read_reg -ffffffff81733130 T pdc203xx_write_reg -ffffffff817331a0 T svwsata_read_reg -ffffffff81733200 T svwsata_write_reg -ffffffff81733240 T svwsata_lba48_write_reg -ffffffff81733280 T pciide_pci_read -ffffffff817332d0 T pciide_pci_write -ffffffff81733340 T default_chip_map -ffffffff81733990 T artisea_chip_map -ffffffff81733bf0 T piix_chip_map -ffffffff817341e0 T piixsata_chip_map -ffffffff81734700 T sch_chip_map -ffffffff81734a20 T amd756_chip_map -ffffffff81734e30 T ixp_chip_map -ffffffff817351a0 T cmd_chip_map -ffffffff81735300 T cmd0643_9_chip_map -ffffffff81735600 T cmd680_chip_map -ffffffff817357e0 T sii3112_chip_map -ffffffff81735b60 T sii3114_chip_map -ffffffff81735f60 T apollo_chip_map -ffffffff817365c0 T sata_chip_map -ffffffff817367e0 T cy693_chip_map -ffffffff81736ba0 T sis_chip_map -ffffffff817372e0 T natsemi_chip_map -ffffffff81737740 T ns_scx200_chip_map -ffffffff81737ad0 T acer_chip_map -ffffffff81738150 T hpt_chip_map -ffffffff81738630 T pdc202xx_chip_map -ffffffff81738ff0 T pdcsata_chip_map -ffffffff81739770 T acard_chip_map -ffffffff817399e0 T serverworks_chip_map -ffffffff81739cf0 T svwsata_chip_map -ffffffff8173a0d0 T nforce_chip_map -ffffffff8173a4f0 T ite_chip_map -ffffffff8173a7b0 T jmicron_chip_map -ffffffff8173abc0 T phison_chip_map -ffffffff8173aee0 T rdc_chip_map -ffffffff8173b330 T pciide_match -ffffffff8173b3d0 T pciide_attach -ffffffff8173b4b0 T pciide_detach -ffffffff8173b510 T pciide_activate -ffffffff8173bc40 T pciide_lookup_product -ffffffff8173bea0 T pciide_dmacmd_read -ffffffff8173bed0 T pciide_dmacmd_write -ffffffff8173bf00 T pciide_dmactl_read -ffffffff8173bf30 T pciide_dmactl_write -ffffffff8173bf60 T pciide_dmatbl_write -ffffffff8173bf90 T pciide_mapregs_compat -ffffffff8173c110 T pciide_unmapregs_compat -ffffffff8173c1a0 T pciide_mapregs_native -ffffffff8173c490 T pciide_unmapregs_native -ffffffff8173c520 T pciide_mapreg_dma -ffffffff8173c6b0 T pciide_dma_init -ffffffff8173c980 T pciide_dma_start -ffffffff8173ca00 T pciide_dma_finish -ffffffff8173cbd0 T pciide_unmapreg_dma -ffffffff8173cc00 T pciide_intr_flag -ffffffff8173ce10 T pciide_compat_intr -ffffffff8173ce90 T pciide_pci_intr -ffffffff8173cf50 T pciide_channel_dma_setup -ffffffff8173d020 T pciide_dma_table_setup -ffffffff8173d260 T pciide_irqack -ffffffff8173d2b0 T pciide_chansetup -ffffffff8173d390 T pciide_chanfree -ffffffff8173d3e0 T pciide_mapchan -ffffffff8173d470 T pciide_unmap_chan -ffffffff8173d540 T pciide_chan_candisable -ffffffff8173d5b0 T pciide_map_compat_intr -ffffffff8173d650 T pciide_unmap_compat_intr -ffffffff8173d6b0 T pciide_print_channels -ffffffff8173d780 T pciide_print_modes -ffffffff8173d790 T default_chip_unmap -ffffffff8173d870 T sata_setup_channel -ffffffff8173d990 T piix_timing_debug -ffffffff8173d9c0 T piix_setup_channel -ffffffff8173de50 T piix3_4_setup_channel -ffffffff8173e5f0 T piix_setup_idetim_timings -ffffffff8173e660 T piix_setup_idetim_drvs -ffffffff8173e780 T piix_setup_sidetim_timings -ffffffff8173e7f0 T amd756_setup_channel -ffffffff8173eba0 T apollo_setup_channel -ffffffff8173ef20 T cmd_channel_map -ffffffff8173f290 T cmd_pci_intr -ffffffff8173f390 T cmd646_9_irqack -ffffffff8173f490 T cmd0643_9_setup_channel -ffffffff8173f8b0 T cmd680_setup_channel -ffffffff8173fdb0 T cmd680_channel_map -ffffffff817400e0 T sii_fixup_cacheline -ffffffff817403b0 T sii3112_setup_channel -ffffffff81740570 T sii3112_drv_probe -ffffffff81740990 T sii3114_mapreg_dma -ffffffff81740c70 T sii3114_chansetup -ffffffff81740d40 T sii3114_mapchan -ffffffff81741060 T sii3114_dmacmd_read -ffffffff817410a0 T sii3114_dmacmd_write -ffffffff817410e0 T sii3114_dmactl_read -ffffffff81741120 T sii3114_dmactl_write -ffffffff81741160 T sii3114_dmatbl_write -ffffffff817411a0 T cy693_setup_channel -ffffffff817413c0 T sis_hostbr_match -ffffffff81741490 T sis_south_match -ffffffff817414d0 T sis_setup_channel -ffffffff81741810 T sis96x_setup_channel -ffffffff81741af0 T natsemi_irqack -ffffffff81741b90 T natsemi_setup_channel -ffffffff81741f80 T natsemi_pci_intr -ffffffff81742080 T ns_scx200_setup_channel -ffffffff81742380 T acer_dma_init -ffffffff817423c0 T acer_setup_channel -ffffffff817427c0 T acer_pci_intr -ffffffff817428b0 T hpt_setup_channel -ffffffff81742c00 T hpt_pci_intr -ffffffff81742d10 T pdc268_config_read -ffffffff81742d80 T pdc20268_setup_channel -ffffffff81742f50 T pdc202xx_setup_channel -ffffffff817433a0 T pdc20262_dma_start -ffffffff81743510 T pdc20262_dma_finish -ffffffff817435e0 T pdc20265_pci_intr -ffffffff81743790 T pdc202xx_pci_intr -ffffffff817438a0 T pdc203xx_pci_intr -ffffffff81743990 T pdc205xx_pci_intr -ffffffff81743ac0 T pdc203xx_irqack -ffffffff81743b50 T pdc203xx_setup_channel -ffffffff81743c50 T pdc205xx_do_reset -ffffffff81743cf0 T pdc205xx_drv_probe -ffffffff81743f70 T pdc203xx_dma_start -ffffffff81744030 T pdc203xx_dma_finish -ffffffff81744120 T serverworks_setup_channel -ffffffff81744550 T serverworks_pci_intr -ffffffff81744660 T svwsata_mapreg_dma -ffffffff81744710 T svwsata_drv_probe -ffffffff817449f0 T svwsata_mapchan -ffffffff81744ae0 T svwsata_dmacmd_read -ffffffff81744b10 T svwsata_dmacmd_write -ffffffff81744b40 T svwsata_dmactl_read -ffffffff81744b70 T svwsata_dmactl_write -ffffffff81744ba0 T svwsata_dmatbl_write -ffffffff81744bd0 T acard_setup_channel -ffffffff81744ff0 T nforce_setup_channel -ffffffff81745340 T nforce_pci_intr -ffffffff81745430 T ite_setup_channel -ffffffff817457b0 T ixp_setup_channel -ffffffff81745b50 T jmicron_setup_channel -ffffffff81745db0 T phison_setup_channel -ffffffff81745fc0 T sch_setup_channel -ffffffff817461c0 T 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hdmi_vendor_infoframe_init -ffffffff81993a60 T hdmi_vendor_infoframe_check -ffffffff81993b00 T hdmi_vendor_infoframe_pack_only -ffffffff81993cd0 T hdmi_vendor_infoframe_pack -ffffffff81993d70 T hdmi_drm_infoframe_init -ffffffff81993dd0 T hdmi_drm_infoframe_check -ffffffff81993e20 T hdmi_drm_infoframe_pack_only -ffffffff81993ff0 T hdmi_drm_infoframe_pack -ffffffff81994040 T hdmi_infoframe_check -ffffffff819941a0 T hdmi_infoframe_pack_only -ffffffff819943c0 T hdmi_infoframe_pack -ffffffff81994530 T hdmi_infoframe_log -ffffffff819954d0 T hdmi_drm_infoframe_unpack_only -ffffffff819955b0 T hdmi_infoframe_unpack -ffffffff81996000 T list_sort -ffffffff81997000 T radix_tree_lookup -ffffffff819970b0 T radix_tree_iter_find -ffffffff819971a0 T radix_tree_delete -ffffffff81997340 T radix_tree_iter_delete -ffffffff81997360 T radix_tree_insert -ffffffff81998000 T sort -ffffffff81998040 t qsort -ffffffff8199a000 T drm_dp_dual_mode_read -ffffffff8199a110 T drm_dp_dual_mode_write -ffffffff8199a1f0 T drm_dp_dual_mode_detect -ffffffff8199a4a0 T drm_dp_dual_mode_max_tmds_clock -ffffffff8199a5d0 T drm_dp_dual_mode_get_tmds_output -ffffffff8199a700 T drm_dp_dual_mode_set_tmds_output -ffffffff8199a990 T drm_dp_get_dual_mode_type_name -ffffffff8199aa00 T drm_lspcon_get_mode -ffffffff8199abb0 T drm_lspcon_set_mode -ffffffff8199b000 T drm_dp_channel_eq_ok -ffffffff8199b080 T drm_dp_clock_recovery_ok -ffffffff8199b100 T drm_dp_get_adjust_request_voltage -ffffffff8199b140 T drm_dp_get_adjust_request_pre_emphasis -ffffffff8199b190 T drm_dp_get_adjust_tx_ffe_preset -ffffffff8199b1d0 T drm_dp_128b132b_lane_channel_eq_done -ffffffff8199b250 T drm_dp_128b132b_lane_symbol_locked -ffffffff8199b2c0 T drm_dp_128b132b_eq_interlane_align_done -ffffffff8199b2f0 T drm_dp_128b132b_cds_interlane_align_done -ffffffff8199b320 T drm_dp_128b132b_link_training_failed -ffffffff8199b350 T drm_dp_read_clock_recovery_delay -ffffffff8199b450 T drm_dp_read_channel_eq_delay -ffffffff8199b550 T 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psp_v13_0_bootloader_load_intf_drv -ffffffff81e8c200 t psp_v13_0_bootloader_load_dbg_drv -ffffffff81e8c220 t psp_v13_0_bootloader_load_ras_drv -ffffffff81e8c240 t psp_v13_0_bootloader_load_sos -ffffffff81e8c5a0 t psp_v13_0_ring_init -ffffffff81e8c620 t psp_v13_0_ring_create -ffffffff81e8ccb0 t psp_v13_0_ring_stop -ffffffff81e8d040 t psp_v13_0_ring_destroy -ffffffff81e8d0c0 t psp_v13_0_memory_training -ffffffff81e8d500 t psp_v13_0_ring_get_wptr -ffffffff81e8d570 t psp_v13_0_ring_set_wptr -ffffffff81e8d670 t psp_v13_0_load_usbc_pd_fw -ffffffff81e8d860 t psp_v13_0_read_usbc_pd_fw -ffffffff81e8d980 t psp_v13_0_update_spirom -ffffffff81e8db60 t psp_v13_0_vbflash_status -ffffffff81e8dbc0 t psp_v13_0_bootloader_load_component -ffffffff81e8dd90 t psp_v13_0_wait_for_bootloader -ffffffff81e8df60 t psp_v13_0_memory_training_send_msg -ffffffff81e8e0c0 t psp_v13_0_exec_spi_cmd -ffffffff81e8f000 T psp_v13_0_4_set_psp_funcs -ffffffff81e8f030 t psp_v13_0_4_init_microcode -ffffffff81e8f100 t psp_v13_0_4_bootloader_load_kdb -ffffffff81e8f120 t psp_v13_0_4_bootloader_load_spl -ffffffff81e8f140 t psp_v13_0_4_bootloader_load_sysdrv -ffffffff81e8f160 t psp_v13_0_4_bootloader_load_soc_drv -ffffffff81e8f180 t psp_v13_0_4_bootloader_load_intf_drv -ffffffff81e8f1a0 t psp_v13_0_4_bootloader_load_dbg_drv -ffffffff81e8f1c0 t psp_v13_0_4_bootloader_load_sos -ffffffff81e8f530 t psp_v13_0_4_ring_init -ffffffff81e8f5b0 t psp_v13_0_4_ring_create -ffffffff81e8fc50 t psp_v13_0_4_ring_stop -ffffffff81e8ffe0 t psp_v13_0_4_ring_destroy -ffffffff81e90060 t psp_v13_0_4_ring_get_wptr -ffffffff81e900d0 t psp_v13_0_4_ring_set_wptr -ffffffff81e901d0 t psp_v13_0_4_bootloader_load_component -ffffffff81e903a0 t psp_v13_0_4_wait_for_bootloader -ffffffff81e91000 T psp_v3_1_set_psp_funcs -ffffffff81e91030 t psp_v3_1_init_microcode -ffffffff81e910f0 t psp_v3_1_bootloader_load_sysdrv -ffffffff81e91410 t psp_v3_1_bootloader_load_sos -ffffffff81e91770 t psp_v3_1_ring_init -ffffffff81e917f0 t psp_v3_1_ring_create -ffffffff81e922f0 t psp_v3_1_ring_stop -ffffffff81e92510 t psp_v3_1_ring_destroy -ffffffff81e92590 t psp_v3_1_smu_reload_quirk -ffffffff81e925e0 t psp_v3_1_mode1_reset -ffffffff81e926e0 t psp_v3_1_ring_get_wptr -ffffffff81e92730 t psp_v3_1_ring_set_wptr -ffffffff81e93000 t sdma_v2_4_early_init -ffffffff81e930e0 t sdma_v2_4_sw_init -ffffffff81e93470 t sdma_v2_4_sw_fini -ffffffff81e93550 t sdma_v2_4_hw_init -ffffffff81e93910 t sdma_v2_4_hw_fini -ffffffff81e93950 t sdma_v2_4_suspend -ffffffff81e93990 t sdma_v2_4_resume -ffffffff81e939a0 t sdma_v2_4_is_idle -ffffffff81e939e0 t sdma_v2_4_wait_for_idle -ffffffff81e93a80 t sdma_v2_4_soft_reset -ffffffff81e93bc0 t sdma_v2_4_set_clockgating_state -ffffffff81e93bf0 t sdma_v2_4_set_powergating_state -ffffffff81e93c20 t sdma_v2_4_ring_get_rptr -ffffffff81e93c60 t sdma_v2_4_ring_get_wptr -ffffffff81e93cc0 t sdma_v2_4_ring_set_wptr -ffffffff81e93d00 t sdma_v2_4_ring_emit_ib -ffffffff81e93fb0 t sdma_v2_4_ring_emit_fence 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sdma_v3_0_suspend -ffffffff81e967b0 t sdma_v3_0_resume -ffffffff81e967c0 t sdma_v3_0_is_idle -ffffffff81e96800 t sdma_v3_0_wait_for_idle -ffffffff81e968a0 t sdma_v3_0_check_soft_reset -ffffffff81e96900 t sdma_v3_0_pre_soft_reset -ffffffff81e96950 t sdma_v3_0_soft_reset -ffffffff81e96a20 t sdma_v3_0_post_soft_reset -ffffffff81e96a70 t sdma_v3_0_set_clockgating_state -ffffffff81e96cd0 t sdma_v3_0_set_powergating_state -ffffffff81e96d00 t sdma_v3_0_get_clockgating_state -ffffffff81e96d80 t sdma_v3_0_ring_get_rptr -ffffffff81e96dc0 t sdma_v3_0_ring_get_wptr -ffffffff81e96e40 t sdma_v3_0_ring_set_wptr -ffffffff81e96ef0 t sdma_v3_0_ring_emit_ib -ffffffff81e971a0 t sdma_v3_0_ring_emit_fence -ffffffff81e975a0 t sdma_v3_0_ring_emit_pipeline_sync -ffffffff81e97820 t sdma_v3_0_ring_emit_vm_flush -ffffffff81e97aa0 t sdma_v3_0_ring_emit_hdp_flush -ffffffff81e97d20 t sdma_v3_0_ring_test_ring -ffffffff81e98000 t sdma_v3_0_ring_test_ib -ffffffff81e981e0 t sdma_v3_0_ring_insert_nop -ffffffff81e98310 t sdma_v3_0_ring_pad_ib -ffffffff81e98440 t sdma_v3_0_ring_emit_wreg -ffffffff81e98590 t sdma_v3_0_emit_copy_buffer -ffffffff81e98650 t sdma_v3_0_emit_fill_buffer -ffffffff81e986e0 t sdma_v3_0_vm_copy_pte -ffffffff81e987a0 t sdma_v3_0_vm_write_pte -ffffffff81e98870 t sdma_v3_0_vm_set_pte_pde -ffffffff81e98970 t sdma_v3_0_set_trap_irq_state -ffffffff81e98a30 t sdma_v3_0_process_trap_irq -ffffffff81e98ad0 t sdma_v3_0_process_illegal_inst_irq -ffffffff81e98b50 t sdma_v3_0_ctx_switch_enable -ffffffff81e98ce0 t sdma_v3_0_enable -ffffffff81e98e50 t sdma_v3_0_gfx_resume -ffffffff81e9a000 t sdma_v4_0_early_init -ffffffff81e9a580 t sdma_v4_0_late_init -ffffffff81e9a820 t sdma_v4_0_sw_init -ffffffff81e9aba0 t sdma_v4_0_sw_fini -ffffffff81e9ac60 t sdma_v4_0_hw_init -ffffffff81e9dc00 t sdma_v4_0_hw_fini -ffffffff81e9dcb0 t sdma_v4_0_suspend -ffffffff81e9dd00 t sdma_v4_0_resume -ffffffff81e9dd80 t sdma_v4_0_is_idle -ffffffff81e9deb0 t sdma_v4_0_wait_for_idle -ffffffff81e9e050 t sdma_v4_0_soft_reset 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em_watchdog +ffffffff8176a980 T em_enable_hw_vlans +ffffffff8176aa20 T em_setup_transmit_structures +ffffffff8176ac20 T em_initialize_transmit_unit +ffffffff8176b240 T em_setup_receive_structures +ffffffff8176b380 T em_setup_queues_msix +ffffffff8176ba40 T em_intr +ffffffff8176bb40 T em_txeof +ffffffff8176bd10 T em_rxeof +ffffffff8176c1d0 T em_rxrefill +ffffffff8176c2e0 T em_media_status +ffffffff8176c520 T em_flowstatus +ffffffff8176c630 T em_media_change +ffffffff8176c790 T em_tx_ctx_setup +ffffffff8176c920 T em_transmit_checksum_setup +ffffffff8176ca00 T em_fill_descriptors +ffffffff8176ca80 T em_82547_fifo_workaround +ffffffff8176caf0 T em_82547_tx_fifo_reset +ffffffff8176cf60 T em_pci_clear_mwi +ffffffff8176cf90 T em_pci_set_mwi +ffffffff8176cfc0 T em_smartspeed +ffffffff8176d1c0 T em_kstat_read +ffffffff8176d5e0 T em_flush_desc_rings +ffffffff8176d710 T em_free_transmit_structures +ffffffff8176d8e0 T em_free_receive_structures +ffffffff8176daf0 T em_legacy_irq_quirk_spt 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em_disable_pciex_master +ffffffff81771f80 T em_check_phy_reset_block +ffffffff81772040 T em_gate_hw_phy_config_ich8lan +ffffffff817720e0 t em_get_software_flag +ffffffff81772260 T em_hv_phy_workarounds_ich8lan +ffffffff817725f0 T em_lv_phy_workarounds_ich8lan +ffffffff817726f0 t em_phy_init_script +ffffffff81772960 T em_read_eeprom +ffffffff81773040 T em_set_eee_i350 +ffffffff81773160 T em_init_hw +ffffffff81774e00 T em_phy_reset +ffffffff81775040 T em_clear_vfta_i350 +ffffffff81775220 T em_read_phy_reg +ffffffff817753c0 T em_setup_link +ffffffff81777c60 T em_enable_tx_pkt_filtering +ffffffff81778030 T em_clear_hw_cntrs +ffffffff81778920 T em_write_phy_reg +ffffffff81778ab0 T em_power_up_serdes_link_82575 +ffffffff81778ba0 T em_copper_link_autoneg +ffffffff81778cd0 T em_phy_setup_autoneg +ffffffff81778e40 T em_copper_link_postconfig +ffffffff81778f10 T em_config_collision_dist +ffffffff81778fa0 t em_config_mac_to_phy +ffffffff81779110 t em_config_fc_after_link_up +ffffffff81779410 t em_config_dsp_after_link_change +ffffffff81779d00 T em_force_mac_fc +ffffffff81779dd0 T em_check_for_link +ffffffff8177a5c0 T em_get_pcs_speed_and_duplex_82575 +ffffffff8177a680 T em_k1_gig_workaround_hv +ffffffff8177a7b0 T em_link_stall_workaround_hv +ffffffff8177a890 T em_k1_workaround_lv +ffffffff8177a950 T em_k1_workaround_lpt_lp +ffffffff8177ac10 T em_set_eee_pchlan +ffffffff8177acb0 t em_polarity_reversal_workaround +ffffffff8177aef0 T em_get_speed_and_duplex +ffffffff8177b3b0 T em_access_phy_wakeup_reg_bm +ffffffff8177b510 t em_write_phy_reg_ex +ffffffff8177b780 t em_read_phy_reg_ex +ffffffff8177bc30 T em_access_phy_debug_regs_hv +ffffffff8177bd00 T em_access_phy_reg_hv +ffffffff8177bec0 t em_swfw_sync_acquire +ffffffff8177c070 t em_swfw_sync_release +ffffffff8177c1f0 T em_sgmii_uses_mdio_82575 +ffffffff8177c250 T em_read_phy_reg_i2c +ffffffff8177c330 T em_write_phy_reg_i2c +ffffffff8177c410 T em_phy_hw_reset +ffffffff8177ca50 T em_oem_bits_config_pchlan +ffffffff8177cc30 T em_initialize_M88E1512_phy +ffffffff8177cdf0 T em_init_eeprom_params +ffffffff8177d330 T em_get_flash_presence_i210 +ffffffff8177d390 t em_acquire_eeprom +ffffffff8177d580 t em_read_eeprom_ich8 +ffffffff8177d750 t em_release_eeprom +ffffffff8177d8c0 t em_standby_eeprom +ffffffff8177dab0 t em_shift_out_ee_bits +ffffffff8177dc50 t em_shift_in_ee_bits +ffffffff8177dd90 T em_validate_eeprom_checksum +ffffffff8177df40 T em_write_eeprom +ffffffff8177e4f0 T em_update_eeprom_checksum +ffffffff8177e610 t em_commit_shadow_ram +ffffffff8177eb90 T em_read_part_num +ffffffff8177ec30 T em_read_mac_addr +ffffffff8177edb0 T em_mc_addr_list_update +ffffffff8177efd0 T em_hash_mc_addr +ffffffff8177f0d0 T em_rar_set +ffffffff8177f1d0 T em_mta_set +ffffffff8177f340 T em_get_bus_info +ffffffff8177f4d0 T em_check_mng_mode +ffffffff8177f550 T em_valid_nvm_bank_detect_ich8lan +ffffffff8177f700 T em_read_eeprom_spt +ffffffff8177f9d0 T em_read_ich8_data32 +ffffffff8177fb40 t em_ich8_cycle_init +ffffffff8177fcf0 t em_ich8_flash_cycle +ffffffff8177fe60 T em_configure_k1_ich8lan +ffffffff81780070 t em_get_hw_eeprom_semaphore +ffffffff817801e0 t em_shift_out_mdi_bits +ffffffff81780360 t em_erase_ich8_4k_segment +ffffffff817805a0 t em_write_ich8_byte +ffffffff81780710 t em_read_ich8_data +ffffffff81781000 T em_lookup_gcu +ffffffff81781030 T em_attach_miibus +ffffffff81781060 T gcu_miibus_readreg +ffffffff817811d0 T gcu_miibus_writereg +ffffffff81781320 T gcu_miibus_statchg +ffffffff81782000 T ixgb_probe +ffffffff81782030 T ixgb_attach +ffffffff81782450 T ixgb_local_timer +ffffffff817824f0 T ixgb_identify_hardware +ffffffff817825f0 T ixgb_allocate_pci_resources +ffffffff81782780 T ixgb_dma_malloc +ffffffff81782980 T ixgb_hardware_init +ffffffff81782a40 T ixgb_setup_interface +ffffffff81782b70 T ixgb_update_stats_counters +ffffffff81783470 T ixgb_update_link_status +ffffffff817834f0 T ixgb_dma_free +ffffffff817835a0 T ixgb_free_pci_resources +ffffffff81783630 T ixgb_start +ffffffff81783820 T ixgb_encap +ffffffff81783a10 T ixgb_ioctl +ffffffff81783cb0 T ixgb_init +ffffffff81784150 T ixgb_set_promisc +ffffffff817841d0 T ixgb_stop +ffffffff81784250 T ixgb_disable_intr +ffffffff81784280 T ixgb_set_multi +ffffffff81784390 T ixgb_enable_intr +ffffffff817843e0 T ixgb_watchdog +ffffffff81784470 T ixgb_enable_hw_vlans +ffffffff817844c0 T ixgb_setup_transmit_structures +ffffffff81784690 T ixgb_initialize_transmit_unit +ffffffff81784800 T ixgb_setup_receive_structures +ffffffff81784880 T ixgb_initialize_receive_unit +ffffffff81784b10 T ixgb_intr +ffffffff81784d10 T ixgb_rxeof +ffffffff81785160 T ixgb_txeof +ffffffff81785350 T ixgb_media_status +ffffffff81785440 T ixgb_media_change +ffffffff81785490 T ixgb_free_transmit_structures +ffffffff817855c0 T ixgb_free_receive_structures +ffffffff817856f0 T ixgb_allocate_transmit_structures +ffffffff81785770 T ixgb_transmit_checksum_setup +ffffffff81785870 T ixgb_get_buf +ffffffff81785a20 T ixgb_allocate_receive_structures +ffffffff81785be0 T ixgb_receive_checksum +ffffffff81785c40 T ixgb_write_pci_cfg +ffffffff81786000 T ixgb_validate_eeprom_checksum +ffffffff81786080 T ixgb_read_eeprom +ffffffff817862f0 T ixgb_update_eeprom_checksum +ffffffff81786360 T ixgb_write_eeprom +ffffffff81786820 t ixgb_shift_out_bits +ffffffff81786960 T ixgb_get_eeprom_data +ffffffff81786a00 T ixgb_get_eeprom_word +ffffffff81786ae0 T ixgb_get_ee_mac_addr +ffffffff81786bd0 T ixgb_get_ee_pba_number +ffffffff81786c90 T ixgb_get_ee_device_id +ffffffff81787000 T ixgb_mac_reset +ffffffff817871e0 T ixgb_adapter_stop +ffffffff81787320 T ixgb_init_hw +ffffffff81787630 T ixgb_init_rx_addrs +ffffffff81787760 T mac_addr_valid +ffffffff817877c0 T ixgb_clear_vfta +ffffffff81787840 T ixgb_clear_hw_cntrs +ffffffff81787f20 T ixgb_setup_fc +ffffffff817880b0 T ixgb_check_for_link +ffffffff817882c0 T ixgb_rar_set +ffffffff81788330 T ixgb_mc_addr_list_update +ffffffff817885b0 T ixgb_write_vfta +ffffffff817885e0 T ixgb_read_phy_reg +ffffffff81788ae0 T ixgb_write_phy_reg +ffffffff81788fd0 T ixgb_check_for_bad_link +ffffffff81789090 T ixgb_led_on +ffffffff817890e0 T ixgb_led_off +ffffffff8178a000 T ixgbe_probe +ffffffff8178a030 T ixgbe_attach +ffffffff8178a5a0 T ixgbe_detach +ffffffff8178a7c0 T ixgbe_activate +ffffffff8178a8d0 T ixgbe_identify_hardware +ffffffff8178a990 T ixgbe_allocate_pci_resources +ffffffff8178aae0 T ixgbe_allocate_queues +ffffffff8178afe0 T ixgbe_allocate_msix +ffffffff8178b220 T ixgbe_allocate_legacy +ffffffff8178b340 T ixgbe_setup_interface +ffffffff8178b680 T ixgbe_free_transmit_structures +ffffffff8178b700 T ixgbe_free_receive_structures +ffffffff8178b7c0 T ixgbe_free_pci_resources +ffffffff8178b8a0 T ixgbe_stop +ffffffff8178bbc0 T ixgbe_init +ffffffff8178c800 T ixgbe_start +ffffffff8178c9e0 T ixgbe_encap +ffffffff8178cce0 T ixgbe_ioctl +ffffffff8178d040 T ixgbe_rxrinfo +ffffffff8178d1a0 T ixgbe_get_sffpage +ffffffff8178d350 T ixgbe_disable_intr +ffffffff8178d420 T ixgbe_iff +ffffffff8178d590 T ixgbe_enable_intr +ffffffff8178d6a0 T ixgbe_enable_queues +ffffffff8178d7b0 T ixgbe_watchdog +ffffffff8178d9c0 T ixgbe_setup_transmit_structures +ffffffff8178daa0 T ixgbe_initialize_transmit_units +ffffffff8178dd60 T ixgbe_setup_receive_structures +ffffffff8178de90 T ixgbe_initialize_receive_units +ffffffff8178e370 T ixgbe_config_gpie +ffffffff8178e440 T ixgbe_setup_vlan_hw_support +ffffffff8178e5d0 T ixgbe_configure_ivars +ffffffff8178e780 T ixgbe_set_ivar +ffffffff8178e950 T ixgbe_config_link +ffffffff8178eaf0 T ixgbe_config_delay_values +ffffffff8178ec10 t ix_kstats_tick +ffffffff8178ece0 T ixgbe_enable_queue +ffffffff8178edb0 T ixgbe_disable_queue +ffffffff8178ee80 T ixgbe_link_intr +ffffffff8178ee90 T ixgbe_intr +ffffffff8178f360 T ixgbe_queue_intr +ffffffff8178f4b0 T ixgbe_rxeof +ffffffff8178f880 T ixgbe_txeof +ffffffff8178fa20 T ixgbe_rxrefill +ffffffff8178fae0 T ixgbe_legacy_intr +ffffffff8178fca0 T ixgbe_update_link_status +ffffffff8178fdf0 T ixgbe_handle_mod +ffffffff8178ff10 T ixgbe_handle_msf +ffffffff8178ffe0 T ixgbe_handle_phy +ffffffff81790070 T ixgbe_media_status +ffffffff81790280 T ixgbe_media_change +ffffffff81790330 T ixgbe_mc_array_itr +ffffffff81790370 T ixgbe_setup_msix +ffffffff81790400 T ixgbe_add_media_types +ffffffff817906a0 T ixgbe_dma_malloc +ffffffff81790890 T ixgbe_dma_free +ffffffff81790940 T ixgbe_allocate_transmit_buffers +ffffffff81790ab0 T ixgbe_setup_transmit_ring +ffffffff81790c50 T ixgbe_free_transmit_buffers +ffffffff81790d80 T ixgbe_get_buf +ffffffff81790ec0 T ixgbe_allocate_receive_buffers +ffffffff81791000 T ixgbe_setup_receive_ring +ffffffff817910e0 T ixgbe_rxfill +ffffffff81791210 T ixgbe_initialize_rss_mapping +ffffffff81791480 T ixgbe_map_queue_statistics +ffffffff81791580 T ixgbe_free_receive_buffers +ffffffff817916c0 T ixgbe_rx_checksum +ffffffff81791710 T ixgbe_read_pci_cfg +ffffffff81791770 T ixgbe_write_pci_cfg +ffffffff817917f0 t ix_kstats_read +ffffffff817919b0 t ix_rxq_kstats_read +ffffffff81791b10 t ix_txq_kstats_read +ffffffff81792000 T ixgbe_init_ops_generic +ffffffff81792270 T ixgbe_init_eeprom_params_generic +ffffffff81792320 T ixgbe_read_eerd_generic +ffffffff81792420 T ixgbe_read_eeprom_bit_bang_generic +ffffffff817926c0 T ixgbe_write_eeprom_generic +ffffffff81792b10 T ixgbe_validate_eeprom_checksum_generic +ffffffff81792bc0 T ixgbe_update_eeprom_checksum_generic +ffffffff81792c40 T ixgbe_calc_eeprom_checksum_generic +ffffffff81792de0 T ixgbe_init_hw_generic +ffffffff81792e40 T ixgbe_start_hw_generic +ffffffff81792f60 T ixgbe_clear_hw_cntrs_generic +ffffffff81793940 T ixgbe_enable_rx_dma_generic +ffffffff817939a0 T ixgbe_get_mac_addr_generic +ffffffff81793a30 T ixgbe_stop_adapter_generic +ffffffff81793bb0 T ixgbe_get_bus_info_generic +ffffffff81793c60 T ixgbe_set_lan_id_multi_port_pcie +ffffffff81793d30 T ixgbe_acquire_swfw_sync +ffffffff81793f60 T ixgbe_release_swfw_sync +ffffffff81794010 T prot_autoc_read_generic +ffffffff81794070 T prot_autoc_write_generic +ffffffff817940c0 T ixgbe_led_on_generic +ffffffff81794180 T ixgbe_led_off_generic +ffffffff81794230 T ixgbe_blink_led_start_generic +ffffffff817943a0 T ixgbe_blink_led_stop_generic +ffffffff817944c0 T ixgbe_set_rar_generic +ffffffff817945e0 T ixgbe_clear_rar_generic +ffffffff817946e0 T ixgbe_init_rx_addrs_generic +ffffffff817948e0 T ixgbe_update_mc_addr_list_generic +ffffffff81794ae0 T ixgbe_enable_mc_generic +ffffffff81794b50 T ixgbe_disable_mc_generic +ffffffff81794bb0 T ixgbe_enable_rx_generic +ffffffff81794c70 T ixgbe_disable_rx_generic +ffffffff81794d50 T ixgbe_fc_enable_generic +ffffffff81795180 T ixgbe_setup_fc_generic +ffffffff81795450 T ixgbe_fc_autoneg +ffffffff81795620 T ixgbe_device_supports_autoneg_fc +ffffffff81795720 T ixgbe_start_hw_gen2 +ffffffff81795900 T ixgbe_identify_phy +ffffffff81795960 T ixgbe_set_pci_config_data_generic +ffffffff817959e0 T ixgbe_disable_rx +ffffffff81795a20 T ixgbe_disable_pcie_master +ffffffff81795b70 T ixgbe_read_eerd_buffer_generic +ffffffff81795cb0 T ixgbe_poll_eerd_eewr_done +ffffffff81795d50 T ixgbe_write_eewr_buffer_generic +ffffffff81795ed0 T ixgbe_write_eewr_generic +ffffffff81795f20 T ixgbe_acquire_eeprom +ffffffff817960a0 T ixgbe_get_eeprom_semaphore +ffffffff817962b0 T ixgbe_release_eeprom_semaphore +ffffffff81796320 T ixgbe_ready_eeprom +ffffffff81796490 T ixgbe_shift_out_eeprom_bits +ffffffff81796650 T ixgbe_shift_in_eeprom_bits +ffffffff817967b0 T ixgbe_standby_eeprom +ffffffff81796890 T ixgbe_raise_eeprom_clk +ffffffff81796900 T ixgbe_lower_eeprom_clk +ffffffff81796970 T ixgbe_release_eeprom +ffffffff81796a50 T ixgbe_validate_mac_addr +ffffffff81796ab0 T ixgbe_init_uta_tables +ffffffff81796af0 T ixgbe_add_uc_addr +ffffffff81796b60 T ixgbe_mta_vector +ffffffff81796c10 T ixgbe_set_mta +ffffffff81796cd0 T ixgbe_negotiate_fc +ffffffff81796d80 T ixgbe_fc_autoneg_fiber +ffffffff81796eb0 T ixgbe_fc_autoneg_backplane +ffffffff81797010 T ixgbe_fc_autoneg_copper +ffffffff81797140 T ixgbe_disable_sec_rx_path_generic +ffffffff81797200 T ixgbe_enable_sec_rx_path_generic +ffffffff81797290 T ixgbe_enable_rx +ffffffff817972d0 T ixgbe_get_pcie_msix_count_generic +ffffffff81797350 T ixgbe_insert_mac_addr_generic +ffffffff81797560 T ixgbe_set_vmdq +ffffffff817975a0 T ixgbe_set_rar +ffffffff817975f0 T ixgbe_clear_vmdq +ffffffff81797630 T ixgbe_clear_vmdq_generic +ffffffff817977d0 T ixgbe_set_vmdq_generic +ffffffff81797880 T ixgbe_init_uta_tables_generic +ffffffff81797900 T ixgbe_find_vlvf_slot +ffffffff817979c0 T ixgbe_set_vfta_generic +ffffffff81797ad0 T ixgbe_set_vlvf_generic +ffffffff81797d60 T ixgbe_clear_vfta_generic +ffffffff81797e60 T ixgbe_need_crosstalk_fix +ffffffff81797eb0 T ixgbe_check_mac_link_generic +ffffffff817980a0 T ixgbe_get_device_caps_generic +ffffffff817980f0 T ixgbe_calculate_checksum +ffffffff817981b0 T ixgbe_hic_unlocked +ffffffff81798390 T ixgbe_host_interface_command +ffffffff81798560 T ixgbe_clear_tx_pending +ffffffff81798750 T ixgbe_mng_present +ffffffff817987c0 T ixgbe_mng_enabled +ffffffff81798880 T ixgbe_setup_mac_link_multispeed_fiber +ffffffff81798c40 T ixgbe_flap_tx_laser +ffffffff81798c80 T ixgbe_check_link +ffffffff81798cd0 T ixgbe_set_soft_rate_select_speed +ffffffff81798dc0 T ixgbe_init_shared_code +ffffffff81798e70 T ixgbe_set_mac_type +ffffffff81799030 T ixgbe_init_hw +ffffffff81799070 T ixgbe_get_media_type +ffffffff817990b0 T ixgbe_read_mbx +ffffffff81799110 T ixgbe_write_mbx +ffffffff81799160 T ixgbe_check_for_msg +ffffffff817991a0 T ixgbe_check_for_ack +ffffffff817991e0 T ixgbe_check_for_rst +ffffffff81799220 T ixgbe_poll_for_msg +ffffffff817992e0 T ixgbe_poll_for_ack +ffffffff817993a0 T ixgbe_read_posted_mbx +ffffffff81799480 T ixgbe_write_posted_mbx +ffffffff81799550 T ixgbe_init_mbx_ops_generic +ffffffff81799590 T ixgbe_read_v2p_mailbox +ffffffff81799600 T ixgbe_check_for_bit_pf +ffffffff81799690 T ixgbe_check_for_msg_pf +ffffffff81799740 T ixgbe_check_for_ack_pf +ffffffff817997e0 T ixgbe_check_for_rst_pf +ffffffff817998e0 T ixgbe_obtain_mbx_lock_pf +ffffffff81799970 T ixgbe_write_mbx_pf +ffffffff81799b40 T ixgbe_read_mbx_pf +ffffffff81799c50 T ixgbe_init_mbx_params_pf +ffffffff8179a000 T ixgbe_set_pcie_completion_timeout +ffffffff8179a090 T ixgbe_init_ops_82598 +ffffffff8179a1e0 T ixgbe_init_phy_ops_82598 +ffffffff8179a2d0 T ixgbe_start_hw_82598 +ffffffff8179a480 T ixgbe_reset_hw_82598 +ffffffff8179a950 T ixgbe_get_media_type_82598 +ffffffff8179aa20 T ixgbe_get_supported_physical_layer_82598 +ffffffff8179abf0 T ixgbe_read_analog_reg8_82598 +ffffffff8179acb0 T ixgbe_write_analog_reg8_82598 +ffffffff8179ad30 T ixgbe_set_lan_id_multi_port_pcie_82598 +ffffffff8179add0 T ixgbe_enable_rx_dma_82598 +ffffffff8179ae20 T ixgbe_set_vmdq_82598 +ffffffff8179aed0 T ixgbe_clear_vmdq_82598 +ffffffff8179af80 T ixgbe_set_vfta_82598 +ffffffff8179b0b0 T ixgbe_clear_vfta_82598 +ffffffff8179b260 T ixgbe_fc_enable_82598 +ffffffff8179b6c0 T ixgbe_read_i2c_eeprom_82598 +ffffffff8179b6e0 T ixgbe_check_mac_link_82598 +ffffffff8179b980 T ixgbe_setup_mac_link_82598 +ffffffff8179bb40 T ixgbe_get_link_capabilities_82598 +ffffffff8179bc10 T ixgbe_setup_copper_link_82598 +ffffffff8179bd20 T ixgbe_start_mac_link_82598 +ffffffff8179be40 T ixgbe_validate_link_ready +ffffffff8179bef0 T ixgbe_read_i2c_phy_82598 +ffffffff8179d000 T ixgbe_init_mac_link_ops_82599 +ffffffff8179d190 T ixgbe_disable_tx_laser_multispeed_fiber +ffffffff8179d260 T ixgbe_enable_tx_laser_multispeed_fiber +ffffffff8179d2e0 T ixgbe_flap_tx_laser_multispeed_fiber +ffffffff8179d420 T ixgbe_setup_mac_link_82599 +ffffffff8179d6b0 T ixgbe_set_hard_rate_select_speed +ffffffff8179d770 T ixgbe_verify_lesm_fw_enabled_82599 +ffffffff8179d830 T ixgbe_setup_mac_link_smartspeed +ffffffff8179dbb0 T ixgbe_init_phy_ops_82599 +ffffffff8179dd00 T ixgbe_read_i2c_byte_82599 +ffffffff8179de80 T ixgbe_write_i2c_byte_82599 +ffffffff8179e000 T ixgbe_setup_copper_link_82599 +ffffffff8179e060 T ixgbe_setup_sfp_modules_82599 +ffffffff8179e220 T prot_autoc_read_82599 +ffffffff8179e330 T prot_autoc_write_82599 +ffffffff8179e4a0 T ixgbe_reset_pipeline_82599 +ffffffff8179e7e0 T ixgbe_init_ops_82599 +ffffffff8179e9c0 T ixgbe_identify_phy_82599 +ffffffff8179ea50 T ixgbe_reset_hw_82599 +ffffffff8179efa0 T ixgbe_get_media_type_82599 +ffffffff8179f0d0 T ixgbe_get_supported_physical_layer_82599 +ffffffff8179f2a0 T ixgbe_enable_rx_dma_82599 +ffffffff8179f310 T ixgbe_read_analog_reg8_82599 +ffffffff8179f3d0 T ixgbe_write_analog_reg8_82599 +ffffffff8179f450 T ixgbe_start_hw_82599 +ffffffff8179f550 T ixgbe_get_link_capabilities_82599 +ffffffff8179f690 T ixgbe_stop_mac_link_on_d3_82599 +ffffffff8179f750 T ixgbe_read_eeprom_82599 +ffffffff8179f780 T ixgbe_start_mac_link_82599 +ffffffff8179f960 T ixgbe_verify_fw_version_82599 +ffffffff817a0000 T ixgbe_init_ops_X540 +ffffffff817a0220 T ixgbe_init_eeprom_params_X540 +ffffffff817a02b0 T ixgbe_read_eerd_X540 +ffffffff817a0340 T ixgbe_write_eewr_X540 +ffffffff817a03d0 T ixgbe_update_eeprom_checksum_X540 +ffffffff817a04a0 T ixgbe_validate_eeprom_checksum_X540 +ffffffff817a0590 T ixgbe_calc_eeprom_checksum_X540 +ffffffff817a0730 T ixgbe_reset_hw_X540 +ffffffff817a0ac0 T ixgbe_get_media_type_X540 +ffffffff817a0af0 T ixgbe_get_supported_physical_layer_X540 +ffffffff817a0b70 T ixgbe_start_hw_X540 +ffffffff817a0bc0 T ixgbe_acquire_swfw_sync_X540 +ffffffff817a1010 T ixgbe_release_swfw_sync_X540 +ffffffff817a1140 T ixgbe_init_swfw_sync_X540 +ffffffff817a1220 T ixgbe_setup_mac_link_X540 +ffffffff817a1240 T ixgbe_blink_led_start_X540 +ffffffff817a1360 T ixgbe_blink_led_stop_X540 +ffffffff817a1460 T ixgbe_get_link_capabilities_X540 +ffffffff817a14a0 T ixgbe_update_flash_X540 +ffffffff817a1680 T ixgbe_poll_flash_update_done_X540 +ffffffff817a1710 T ixgbe_get_swfw_sync_semaphore +ffffffff817a18a0 T ixgbe_release_swfw_sync_semaphore +ffffffff817a2000 T ixgbe_init_ops_X550 +ffffffff817a2110 T ixgbe_dmac_config_X550 +ffffffff817a21f0 T ixgbe_dmac_config_tcs_X550 +ffffffff817a2340 T ixgbe_dmac_update_tcs_X550 +ffffffff817a2400 T ixgbe_set_source_address_pruning_X550 +ffffffff817a24f0 T ixgbe_init_eeprom_params_X550 +ffffffff817a2570 T ixgbe_calc_eeprom_checksum_X550 +ffffffff817a2590 T ixgbe_read_ee_hostif_X550 +ffffffff817a2660 T ixgbe_write_ee_hostif_X550 +ffffffff817a2720 T ixgbe_update_eeprom_checksum_X550 +ffffffff817a28b0 T ixgbe_validate_eeprom_checksum_X550 +ffffffff817a2a00 T ixgbe_disable_rx_x550 +ffffffff817a2b20 T ixgbe_led_on_t_X550em +ffffffff817a2be0 T ixgbe_led_off_t_X550em +ffffffff817a2ca0 T ixgbe_read_cs4227 +ffffffff817a2cd0 T ixgbe_write_cs4227 +ffffffff817a2d00 T ixgbe_read_pe +ffffffff817a2d50 T ixgbe_write_pe +ffffffff817a2db0 T ixgbe_reset_cs4227 +ffffffff817a3040 T ixgbe_check_cs4227 +ffffffff817a31f0 T ixgbe_setup_mux_ctl +ffffffff817a3280 T ixgbe_identify_phy_x550em +ffffffff817a34a0 T ixgbe_read_mng_if_sel_x550em +ffffffff817a3520 T ixgbe_fw_phy_activity +ffffffff817a3640 T ixgbe_get_phy_id_fw +ffffffff817a3750 T ixgbe_identify_phy_fw +ffffffff817a37a0 T ixgbe_shutdown_fw_phy +ffffffff817a3800 T ixgbe_read_phy_reg_x550em +ffffffff817a3830 T ixgbe_write_phy_reg_x550em +ffffffff817a3860 T ixgbe_init_ops_X550EM +ffffffff817a3b10 T ixgbe_get_bus_info_X550em +ffffffff817a3b60 T ixgbe_get_media_type_X550em +ffffffff817a3c50 T ixgbe_setup_sfp_modules_X550em +ffffffff817a3de0 T ixgbe_get_link_capabilities_X550em +ffffffff817a3eb0 T ixgbe_reset_hw_X550em +ffffffff817a4530 T ixgbe_get_supported_physical_layer_X550em +ffffffff817a46b0 T ixgbe_setup_fc_X550em +ffffffff817a4810 T ixgbe_init_phy_ops_X550em +ffffffff817a4ce0 T ixgbe_setup_fw_link +ffffffff817a4e10 T ixgbe_fc_autoneg_fw +ffffffff817a4e40 T ixgbe_setup_eee_fw +ffffffff817a4ea0 T ixgbe_init_ops_X550EM_a +ffffffff817a4fd0 T ixgbe_read_iosf_sb_reg_x550 +ffffffff817a5150 T ixgbe_write_iosf_sb_reg_x550 +ffffffff817a52d0 T ixgbe_read_iosf_sb_reg_x550a +ffffffff817a5370 T ixgbe_write_iosf_sb_reg_x550a +ffffffff817a5400 T ixgbe_acquire_swfw_sync_X550a +ffffffff817a5540 T ixgbe_release_swfw_sync_X550a +ffffffff817a55e0 T ixgbe_fc_autoneg_fiber_x550em_a +ffffffff817a5620 T ixgbe_fc_autoneg_backplane_x550em_a +ffffffff817a5780 T ixgbe_setup_fc_backplane_x550em_a +ffffffff817a5970 T ixgbe_fc_autoneg_sgmii_x550em_a +ffffffff817a5a60 T ixgbe_init_ops_X550EM_x +ffffffff817a5b20 T ixgbe_acquire_swfw_sync_X550em +ffffffff817a5be0 T ixgbe_release_swfw_sync_X550em +ffffffff817a5c70 T ixgbe_iosf_wait +ffffffff817a5d20 T ixgbe_get_phy_token +ffffffff817a5da0 T ixgbe_put_phy_token +ffffffff817a5e20 T ixgbe_supported_sfp_modules_X550em +ffffffff817a5ea0 T ixgbe_identify_sfp_module_X550em +ffffffff817a5f20 T ixgbe_init_mac_link_ops_X550em +ffffffff817a6060 T ixgbe_restart_an_internal_phy_x550em +ffffffff817a6170 T ixgbe_setup_sgmii +ffffffff817a6410 T ixgbe_setup_sgmii_fw +ffffffff817a66f0 T ixgbe_setup_mac_link_sfp_x550a +ffffffff817a68e0 T ixgbe_setup_mac_link_sfp_x550em +ffffffff817a69a0 T ixgbe_setup_mac_link_t_X550em +ffffffff817a6a50 T ixgbe_check_link_t_X550em +ffffffff817a6b30 T ixgbe_get_lasi_ext_t_x550em +ffffffff817a6cb0 T ixgbe_enable_lasi_ext_t_x550em +ffffffff817a6e40 T ixgbe_setup_kr_speed_x550em +ffffffff817a7050 T ixgbe_reset_phy_fw +ffffffff817a7120 T ixgbe_check_overtemp_fw +ffffffff817a71b0 T ixgbe_read_phy_reg_x550a +ffffffff817a7250 T ixgbe_write_phy_reg_x550a +ffffffff817a7300 T ixgbe_setup_kr_x550em +ffffffff817a7370 T ixgbe_setup_internal_phy_t_x550em +ffffffff817a7500 T ixgbe_enter_lplu_t_x550em +ffffffff817a77f0 T ixgbe_handle_lasi_ext_t_x550em +ffffffff817a7870 T ixgbe_reset_phy_t_X550em +ffffffff817a78c0 T ixgbe_set_mdio_speed +ffffffff817a79a0 T ixgbe_init_ext_t_x550em +ffffffff817a7a50 T ixgbe_setup_sfi_x550a +ffffffff817a7c00 T ixgbe_setup_ixfi_x550em_x +ffffffff817a7de0 T ixgbe_setup_ixfi_x550em +ffffffff817a7fc0 T ixgbe_ext_phy_t_x550em_get_link +ffffffff817a8050 T ixgbe_setup_phy_loopback_x550em +ffffffff817a8240 T ixgbe_read_ee_hostif_buffer_X550 +ffffffff817a83d0 T ixgbe_write_ee_hostif_data_X550 +ffffffff817a8440 T ixgbe_checksum_ptr_x550 +ffffffff817a85d0 T ixgbe_calc_checksum_X550 +ffffffff817a8760 T ixgbe_update_flash_X550 +ffffffff817a87b0 T ixgbe_get_lcd_t_x550em +ffffffff817a8870 T ixgbe_set_mux +ffffffff817a9000 T ixgbe_read_i2c_combined_generic_int +ffffffff817a9260 T ixgbe_i2c_start +ffffffff817a93c0 T ixgbe_clock_in_i2c_byte +ffffffff817a94b0 T ixgbe_clock_out_i2c_bit +ffffffff817a95c0 T ixgbe_i2c_stop +ffffffff817a9750 T ixgbe_i2c_bus_clear +ffffffff817a9870 T ixgbe_read_i2c_combined_generic +ffffffff817a9890 T ixgbe_read_i2c_combined_generic_unlocked +ffffffff817a98b0 T ixgbe_write_i2c_combined_generic_int +ffffffff817a9a90 T ixgbe_write_i2c_combined_generic +ffffffff817a9ab0 T ixgbe_write_i2c_combined_generic_unlocked +ffffffff817a9ad0 T ixgbe_init_phy_ops_generic +ffffffff817a9c00 T ixgbe_identify_phy_generic +ffffffff817aa0d0 T ixgbe_reset_phy_generic +ffffffff817aa260 T ixgbe_read_phy_reg_generic +ffffffff817aa300 T ixgbe_write_phy_reg_generic +ffffffff817aa3a0 T ixgbe_read_phy_reg_mdi +ffffffff817aa520 T ixgbe_write_phy_reg_mdi +ffffffff817aa690 T ixgbe_setup_phy_link_generic +ffffffff817aa940 T ixgbe_setup_phy_link_speed_generic +ffffffff817aa990 T ixgbe_get_phy_firmware_version_generic +ffffffff817aa9c0 T ixgbe_read_i2c_byte_generic +ffffffff817aa9e0 T ixgbe_write_i2c_byte_generic +ffffffff817aaa00 T ixgbe_read_i2c_eeprom_generic +ffffffff817aaa30 T ixgbe_write_i2c_eeprom_generic +ffffffff817aaa50 T ixgbe_identify_module_generic +ffffffff817aaac0 T ixgbe_read_i2c_byte_generic_unlocked +ffffffff817aaae0 T ixgbe_write_i2c_byte_generic_unlocked +ffffffff817aab00 T ixgbe_tn_check_overtemp +ffffffff817aab70 T ixgbe_check_reset_blocked +ffffffff817aabd0 T ixgbe_validate_phy_addr +ffffffff817aac40 T ixgbe_get_phy_id +ffffffff817aacf0 T ixgbe_get_phy_type_from_id +ffffffff817aadb0 T ixgbe_get_copper_link_capabilities_generic +ffffffff817aaea0 T ixgbe_get_copper_speeds_supported +ffffffff817aaf60 T ixgbe_check_phy_link_tnx +ffffffff817ab220 T ixgbe_setup_phy_link_tnx +ffffffff817ab4d0 T ixgbe_get_phy_firmware_version_tnx +ffffffff817ab500 T ixgbe_reset_phy_nl +ffffffff817ab7a0 T ixgbe_get_sfp_init_sequence_offsets +ffffffff817ab980 T ixgbe_is_sfp +ffffffff817ab9d0 T ixgbe_identify_sfp_module_generic +ffffffff817abdc0 T ixgbe_identify_qsfp_module_generic +ffffffff817ac0b0 T ixgbe_get_supported_phy_sfp_layer_generic +ffffffff817ac250 T ixgbe_is_sfp_probe +ffffffff817ac2a0 T ixgbe_read_i2c_byte_generic_int +ffffffff817ac4a0 T ixgbe_clock_out_i2c_byte +ffffffff817ac600 T ixgbe_get_i2c_ack +ffffffff817ac800 T ixgbe_write_i2c_byte_generic_int +ffffffff817ac930 T ixgbe_set_i2c_data +ffffffff817acae0 T ixgbe_raise_i2c_clk +ffffffff817acc00 T ixgbe_lower_i2c_clk +ffffffff817acc90 T ixgbe_clock_in_i2c_bit +ffffffff817ace60 T ixgbe_get_i2c_data +ffffffff817acf10 T ixgbe_set_copper_phy_power +ffffffff817ad000 t ixl_match +ffffffff817ad0a0 t ixl_attach +ffffffff817afc40 t ixl_710_rd_ctl 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myx_kstat_start +ffffffff817c4000 T oce_match +ffffffff817c4030 T oce_attach +ffffffff817c46f0 T oce_pci_alloc +ffffffff817c4980 T oce_dma_alloc +ffffffff817c4ba0 T oce_init_fw +ffffffff817c4db0 T oce_mbox_init +ffffffff817c4e00 T oce_get_fw_config +ffffffff817c4ff0 T oce_check_native_mode +ffffffff817c5150 T oce_macaddr_get +ffffffff817c52a0 T oce_intr +ffffffff817c54a0 T oce_init_stats +ffffffff817c5510 T oce_init_queues +ffffffff817c5690 T oce_attach_ifp +ffffffff817c5780 T oce_tick +ffffffff817c57d0 T oce_refill_rx +ffffffff817c5860 T oce_attachhook +ffffffff817c5a00 T oce_dma_free +ffffffff817c5ab0 T oce_get_link_status +ffffffff817c5c30 T oce_first_mcc +ffffffff817c5d20 T oce_media_change +ffffffff817c5d50 T oce_media_status +ffffffff817c5e80 T oce_ioctl +ffffffff817c6020 T oce_start +ffffffff817c6120 T oce_watchdog +ffffffff817c6180 T oce_init +ffffffff817c6660 T oce_stop +ffffffff817c69a0 T oce_rxrinfo +ffffffff817c6ae0 T oce_iff +ffffffff817c6c20 T oce_update_mcast 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pccbb_pcmcia_card_detect +ffffffff817e6d10 T pccbb_pcmcia_mem_alloc +ffffffff817e6de0 T pccbb_pcmcia_mem_free +ffffffff817e6e10 T pccbb_pcmcia_mem_map +ffffffff817e6f40 T pccbb_pcmcia_mem_unmap +ffffffff817e6fd0 T pccbb_pcmcia_intr_establish +ffffffff817e6ff0 T pccbb_pcmcia_intr_disestablish +ffffffff817e7010 T pccbb_pcmcia_intr_string +ffffffff817e7050 T pccbb_rbus_cb_space_alloc +ffffffff817e7170 T pccbb_open_win +ffffffff817e72f0 T pccbb_rbus_cb_space_free +ffffffff817e7400 T pccbb_close_win +ffffffff817e74c0 T pccbb_winlist_insert +ffffffff817e75c0 T pccbb_winset +ffffffff817e78a0 T pccbb_winlist_delete +ffffffff817e8000 T sk_xmac_miibus_readreg +ffffffff817e8180 T sk_xmac_miibus_writereg +ffffffff817e82e0 T sk_xmac_miibus_statchg +ffffffff817e83a0 T sk_marv_miibus_readreg +ffffffff817e84d0 T sk_marv_miibus_writereg +ffffffff817e85f0 T sk_marv_miibus_statchg +ffffffff817e8620 T sk_setfilt +ffffffff817e86f0 T sk_iff +ffffffff817e8720 T sk_iff_xmac +ffffffff817e8960 T sk_iff_yukon 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iwx_mac_ctxt_task +ffffffff818440c0 T iwx_mac_ctxt_cmd +ffffffff818442a0 T iwx_phy_ctxt_task +ffffffff81844460 T iwx_phy_ctxt_update +ffffffff818448c0 T iwx_updatechan +ffffffff81844980 T iwx_add_task +ffffffff818449f0 T iwx_updateprot +ffffffff81844ab0 T iwx_updateslot +ffffffff81844b70 T iwx_updateedca +ffffffff81844c30 T iwx_updatedtim +ffffffff81844cf0 T iwx_sta_tx_agg_start +ffffffff81844ee0 T iwx_ba_task +ffffffff81845030 T iwx_ampdu_rx_start +ffffffff81845110 T iwx_ampdu_rx_stop +ffffffff818451f0 T iwx_ampdu_tx_start +ffffffff81845300 T iwx_set_mac_addr_from_csr +ffffffff81845520 T iwx_flip_hw_address +ffffffff81845570 T iwx_is_valid_mac_addr +ffffffff81845610 T iwx_nvm_get +ffffffff818458e0 T iwx_load_firmware +ffffffff81845ac0 T iwx_start_fw +ffffffff81845ca0 T iwx_pnvm_handle_section +ffffffff81845f90 T iwx_ctxt_info_gen3_set_pnvm +ffffffff81845fe0 T iwx_pnvm_parse +ffffffff818460d0 T iwx_load_pnvm +ffffffff81846470 T iwx_send_tx_ant_cfg +ffffffff81846500 T iwx_send_phy_cfg_cmd +ffffffff818465b0 T iwx_send_dqa_cmd +ffffffff81846640 T iwx_load_ucode_wait_alive +ffffffff81846700 T iwx_run_init_mvm_ucode +ffffffff81846950 T iwx_config_ltr +ffffffff81846a10 T iwx_update_rx_desc +ffffffff81846ab0 T iwx_rxmq_get_signal_strength +ffffffff81846b00 T iwx_rx_rx_phy_cmd +ffffffff81846b60 T iwx_get_noise +ffffffff81846bd0 T iwx_ccmp_decap +ffffffff81846d10 T iwx_rx_hwdecrypt +ffffffff81846e10 T iwx_rx_frame +ffffffff818470d0 T iwx_detect_duplicate +ffffffff818471d0 T iwx_is_sn_less +ffffffff81847230 T iwx_oldsn_workaround +ffffffff818472f0 T iwx_rx_reorder +ffffffff81847920 T iwx_rx_mpdu_mq +ffffffff81847c70 T iwx_clear_tx_desc +ffffffff81847df0 T iwx_txd_done +ffffffff81847eb0 T iwx_txq_advance +ffffffff818481f0 T iwx_tx_update_byte_tbl +ffffffff81848290 T iwx_rx_tx_cmd +ffffffff818483f0 T iwx_clear_oactive +ffffffff81848470 T iwx_rx_compressed_ba +ffffffff818485f0 T iwx_rx_bmiss +ffffffff818486e0 T iwx_binding_cmd +ffffffff81848870 T iwx_get_vht_ctrl_pos +ffffffff818488e0 T iwx_phy_ctxt_cmd_uhb_v3_v4 +ffffffff81848b30 T iwx_phy_ctxt_cmd_v3_v4 +ffffffff81848d80 T iwx_phy_ctxt_cmd +ffffffff81848e80 T iwx_send_cmd_status +ffffffff81848fa0 T iwx_cmd_done +ffffffff81849080 T iwx_fw_rateidx_ofdm +ffffffff818490e0 T iwx_fw_rateidx_cck +ffffffff81849140 T iwx_tx_fill_cmd +ffffffff818493f0 T iwx_rval2ridx +ffffffff81849480 T iwx_tx +ffffffff81849b80 T iwx_flush_sta_tids +ffffffff81849d30 T iwx_wait_tx_queues_empty +ffffffff81849df0 T iwx_drain_sta +ffffffff81849f90 T iwx_flush_sta +ffffffff8184a2f0 T iwx_beacon_filter_send_cmd +ffffffff8184a380 T iwx_update_beacon_abort +ffffffff8184a490 T iwx_power_build_cmd +ffffffff8184a520 T iwx_power_mac_update_mode +ffffffff8184a740 T iwx_power_update_device +ffffffff8184a7e0 T iwx_enable_beacon_filter +ffffffff8184a8f0 T iwx_disable_beacon_filter +ffffffff8184a9e0 T iwx_add_sta_cmd +ffffffff8184ace0 T iwx_rm_sta_cmd +ffffffff8184ada0 T iwx_rm_sta +ffffffff8184b210 T iwx_disable_mgmt_queue +ffffffff8184b2f0 T iwx_umac_scan_fill_channels +ffffffff8184b430 T iwx_fill_probe_req +ffffffff8184b670 T iwx_config_umac_scan_reduced +ffffffff8184b7d0 T iwx_scan_umac_flags_v2 +ffffffff8184b810 T iwx_scan_umac_dwell_v10 +ffffffff8184b880 T iwx_scan_umac_fill_general_p_v10 +ffffffff8184b910 T iwx_scan_umac_fill_ch_p_v6 +ffffffff8184ba50 T iwx_umac_scan_v14 +ffffffff8184bd40 T iwx_mcc_update +ffffffff8184bdd0 T iwx_ridx2rate +ffffffff8184be40 T iwx_ack_rates +ffffffff8184c100 T iwx_mac_ctxt_cmd_common +ffffffff8184c410 T iwx_mac_ctxt_cmd_fill_sta +ffffffff8184c4a0 T iwx_clear_statistics +ffffffff8184c580 T iwx_del_task +ffffffff8184c5e0 T iwx_scan +ffffffff8184c780 T iwx_scan_abort +ffffffff8184c830 T iwx_bgscan +ffffffff8184c8b0 T iwx_bgscan_done +ffffffff8184c950 T iwx_bgscan_done_task +ffffffff8184cac0 T iwx_umac_scan_abort +ffffffff8184cb50 T iwx_enable_mgmt_queue +ffffffff8184cbe0 T iwx_rs_rval2idx +ffffffff8184cc50 T iwx_rs_ht_rates +ffffffff8184cd20 T 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stge_add_rxbuf +ffffffff81878a90 T stge_rxdrain +ffffffff81879000 T nfe_match +ffffffff81879030 T nfe_attach +ffffffff818796a0 T nfe_activate +ffffffff81879720 T nfe_stop +ffffffff818798c0 T nfe_init +ffffffff81879e60 T nfe_intr +ffffffff81879f50 T nfe_get_macaddr +ffffffff8187a030 T nfe_alloc_tx_ring +ffffffff8187a250 T nfe_alloc_rx_ring +ffffffff8187a5d0 T nfe_free_tx_ring +ffffffff8187a740 T nfe_ioctl +ffffffff8187a890 T nfe_start +ffffffff8187aa60 T nfe_watchdog +ffffffff8187aac0 T nfe_wol +ffffffff8187ab40 T nfe_miibus_readreg +ffffffff8187acc0 T nfe_miibus_writereg +ffffffff8187ae20 T nfe_miibus_statchg +ffffffff8187af90 T nfe_ifmedia_upd +ffffffff8187aff0 T nfe_ifmedia_sts +ffffffff8187b050 T nfe_tick +ffffffff8187b0a0 T nfe_rxeof +ffffffff8187b4f0 T nfe_txeof +ffffffff8187b7a0 T nfe_iff +ffffffff8187ba70 T nfe_txdesc32_sync +ffffffff8187bab0 T nfe_txdesc64_sync +ffffffff8187baf0 T nfe_txdesc32_rsync +ffffffff8187bb80 T nfe_txdesc64_rsync +ffffffff8187bc10 T nfe_rxdesc32_sync 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alc_miiext_readreg +ffffffff8188d050 T alc_miiext_writereg +ffffffff8188d190 T alc_mediastatus +ffffffff8188d200 T alc_mediachange +ffffffff8188d260 T alc_get_macaddr +ffffffff8188d280 T alc_get_macaddr_816x +ffffffff8188d510 T alc_get_macaddr_813x +ffffffff8188d9c0 T alc_get_macaddr_par +ffffffff8188da70 T alc_disable_l0s_l1 +ffffffff8188db00 T alc_phy_reset +ffffffff8188db20 T alc_phy_reset_816x +ffffffff8188e3b0 T alc_phy_reset_813x +ffffffff8188e7a0 T alc_phy_down +ffffffff8188e8d0 T alc_aspm_816x +ffffffff8188e980 T alc_aspm_813x +ffffffff8188eb70 T alc_init_pcie +ffffffff8188ef00 T alc_config_msi +ffffffff8188efd0 T alc_intr +ffffffff8188f1b0 T alc_reset +ffffffff8188f580 T alc_dma_alloc +ffffffff8188fcf0 T alc_ioctl +ffffffff8188fe40 T alc_start +ffffffff8188ffe0 T alc_watchdog +ffffffff81890060 T alc_tick +ffffffff818900c0 T alc_dma_free +ffffffff81890380 T alc_stop +ffffffff818906d0 T alc_init +ffffffff818915f0 T alc_encap +ffffffff81891820 T alc_txeof +ffffffff81891a10 T alc_iff +ffffffff81891b70 T alc_stats_clear +ffffffff81891cb0 T alc_stats_update +ffffffff81892110 T alc_rxintr +ffffffff81892330 T alc_newbuf +ffffffff818924b0 T alc_rxeof +ffffffff81892740 T alc_osc_reset +ffffffff818928d0 T alc_init_rx_ring +ffffffff818929d0 T alc_init_rr_ring +ffffffff81892a50 T alc_init_tx_ring +ffffffff81892b00 T alc_init_cmb +ffffffff81892b40 T alc_init_smb +ffffffff81892b90 T alc_rxvlan +ffffffff81892c00 T alc_stop_queue +ffffffff81893000 T ale_match +ffffffff81893030 T ale_attach +ffffffff81893580 T ale_activate +ffffffff81893600 T ale_miibus_readreg +ffffffff81893720 T ale_miibus_writereg +ffffffff81893830 T ale_miibus_statchg +ffffffff81893a50 T ale_stop_mac +ffffffff81893b40 T ale_mac_config +ffffffff81893be0 T ale_mediastatus +ffffffff81893c50 T ale_mediachange +ffffffff81893cb0 T ale_get_macaddr +ffffffff81893e90 T ale_phy_reset +ffffffff818944d0 T ale_intr +ffffffff81894620 T ale_reset +ffffffff81894790 T ale_dma_alloc +ffffffff81894f00 T ale_ioctl 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bce_activate +ffffffff81899b50 T bce_intr +ffffffff81899e50 T bce_reset +ffffffff8189a410 T bce_ioctl +ffffffff8189a570 T bce_start +ffffffff8189a7c0 T bce_watchdog +ffffffff8189a810 T bce_mii_read +ffffffff8189a950 T bce_mii_write +ffffffff8189aa80 T bce_statchg +ffffffff8189ae10 T bce_mediachange +ffffffff8189ae60 T bce_mediastatus +ffffffff8189aec0 T bce_tick +ffffffff8189af10 T bce_stop +ffffffff8189b030 T bce_init +ffffffff8189b440 T bce_iff +ffffffff8189b540 T bce_rxintr +ffffffff8189b6d0 T bce_txintr +ffffffff8189b7c0 T bce_add_rxbuf +ffffffff8189b880 T bce_add_mac +ffffffff8189c000 T ath_pci_match +ffffffff8189c060 T ath_pci_attach +ffffffff8189c290 T ath_pci_detach +ffffffff8189d000 T athn_pci_match +ffffffff8189d030 T athn_pci_attach +ffffffff8189d2b0 T athn_pci_detach +ffffffff8189d330 T athn_pci_activate +ffffffff8189d3e0 T athn_pci_read +ffffffff8189d410 T athn_pci_write +ffffffff8189d440 T athn_pci_write_barrier +ffffffff8189d470 T athn_pci_disable_aspm +ffffffff8189d4e0 T athn_pci_wakeup +ffffffff8189e000 T atw_pci_match +ffffffff8189e030 T atw_pci_attach +ffffffff8189e2a0 T atw_pci_detach +ffffffff8189e320 t atw_pci_enable +ffffffff8189e3c0 t atw_pci_disable +ffffffff8189f000 T rtw_pci_match +ffffffff8189f030 T rtw_pci_attach +ffffffff8189f250 T rtw_pci_detach +ffffffff8189f2d0 T rtw_pci_enable +ffffffff8189f370 T rtw_pci_disable +ffffffff818a0000 T rtwn_pci_match +ffffffff818a0030 T rtwn_pci_attach +ffffffff818a0590 T rtwn_pci_detach +ffffffff818a06a0 T rtwn_pci_activate +ffffffff818a06c0 T rtwn_calib_to +ffffffff818a0720 T rtwn_scan_to +ffffffff818a0740 T rtwn_intr +ffffffff818a0a20 T rtwn_alloc_rx_list +ffffffff818a0d40 T rtwn_alloc_tx_list +ffffffff818a0f80 T rtwn_free_rx_list +ffffffff818a10d0 T rtwn_pci_write_1 +ffffffff818a1100 T rtwn_pci_write_2 +ffffffff818a1130 T rtwn_pci_write_4 +ffffffff818a1160 T rtwn_pci_read_1 +ffffffff818a1190 T rtwn_pci_read_2 +ffffffff818a11c0 T rtwn_pci_read_4 +ffffffff818a11f0 T rtwn_tx +ffffffff818a17c0 T rtwn_power_on +ffffffff818a17f0 T rtwn_dma_init +ffffffff818a1ba0 T rtwn_pci_load_firmware +ffffffff818a1c50 T rtwn_fw_loadpage +ffffffff818a1d90 T rtwn_mac_init +ffffffff818a1f10 T rtwn_bb_init +ffffffff818a23b0 T rtwn_alloc_buffers +ffffffff818a23e0 T rtwn_pci_init +ffffffff818a24b0 T rtwn_pci_stop +ffffffff818a2600 T rtwn_is_oactive +ffffffff818a2640 T rtwn_next_calib +ffffffff818a2660 T rtwn_cancel_calib +ffffffff818a26a0 T rtwn_pci_next_scan +ffffffff818a26c0 T rtwn_cancel_scan +ffffffff818a2700 T rtwn_wait_async +ffffffff818a2730 T rtwn_free_tx_list +ffffffff818a28a0 T rtwn_setup_rx_desc +ffffffff818a2910 T rtwn_reset_rx_list +ffffffff818a29b0 T rtwn_reset_tx_list +ffffffff818a2b00 T rtwn_rx_frame +ffffffff818a2f60 T rtwn_tx_done +ffffffff818a30f0 T rtwn_poll_c2h_events +ffffffff818a32b0 T rtwn_pci_92c_stop +ffffffff818a3490 T rtwn_pci_88e_stop +ffffffff818a3870 T rtwn_pci_23a_stop +ffffffff818a3c10 T rtwn_88e_intr +ffffffff818a3f60 T rtwn_llt_write +ffffffff818a4020 T rtwn_llt_init +ffffffff818a42f0 T rtwn_92c_power_on +ffffffff818a4770 T rtwn_88e_power_on +ffffffff818a4b70 T rtwn_23a_power_on +ffffffff818a4fe0 T rtwn_tx_report +ffffffff818a6000 T ral_pci_match +ffffffff818a6030 T ral_pci_attach +ffffffff818a6210 T ral_pci_detach +ffffffff818a62b0 T ral_pci_activate +ffffffff818a6340 T ral_pci_wakeup +ffffffff818a7000 T acx_pci_match +ffffffff818a7030 T acx_pci_attach +ffffffff818a7260 T acx_pci_detach +ffffffff818a8000 T pgt_pci_match +ffffffff818a8030 T pgt_pci_attach +ffffffff818a8200 T pgt_pci_detach +ffffffff818a9000 T malo_pci_match +ffffffff818a9030 T malo_pci_attach +ffffffff818a91e0 T malo_pci_detach +ffffffff818a9230 T malo_pci_activate +ffffffff818a9290 T malo_pci_wakeup +ffffffff818aa000 T bwi_pci_match +ffffffff818aa070 T bwi_pci_attach +ffffffff818aa290 T bwi_pci_detach +ffffffff818aa2e0 T bwi_pci_activate +ffffffff818aa350 T bwi_reset_bcm4331 +ffffffff818aa470 T bwi_pci_conf_write +ffffffff818aa4a0 T bwi_pci_conf_read +ffffffff818aa4d0 T bwi_pci_wakeup +ffffffff818ab000 T piixpm_match +ffffffff818ab030 T piixpm_attach +ffffffff818ab4c0 T piixpm_intr +ffffffff818ab5d0 T piixpm_i2c_acquire_bus +ffffffff818ab6b0 T piixpm_i2c_release_bus +ffffffff818ab790 T piixpm_i2c_exec +ffffffff818ac000 T vic_match +ffffffff818ac0a0 T vic_attach +ffffffff818ac440 T vic_intr +ffffffff818ac4c0 T vic_query +ffffffff818ac720 T vic_alloc_data +ffffffff818aca20 T vic_tick +ffffffff818aca90 T vic_ioctl +ffffffff818accc0 T vic_start +ffffffff818ad000 T vic_watchdog +ffffffff818ad030 T vic_media_change +ffffffff818ad060 T vic_media_status +ffffffff818ad120 T vic_read +ffffffff818ad140 T vic_read_cmd +ffffffff818ad190 T vic_getlladdr +ffffffff818ad240 T vic_alloc_dmamem +ffffffff818ad3b0 T vic_rx_fill +ffffffff818ad590 T vic_alloc_mbuf +ffffffff818ad650 T vic_init_data +ffffffff818ada00 T vic_uninit_data +ffffffff818adbd0 T vic_link_state +ffffffff818adc50 T vic_write +ffffffff818adca0 T vic_rx_proc +ffffffff818adf00 T vic_tx_proc +ffffffff818ae080 T vic_iff +ffffffff818ae1c0 T vic_setlladdr +ffffffff818ae220 T vic_load_txb +ffffffff818ae2d0 T vic_init +ffffffff818ae470 T vic_stop +ffffffff818ae5b0 T vic_rxrinfo +ffffffff818ae680 T vic_free_dmamem +ffffffff818af000 T vmxnet3_match +ffffffff818af030 T vmxnet3_attach +ffffffff818af900 T vmxnet3_intr +ffffffff818af9a0 T vmxnet3_intr_event +ffffffff818afa20 T vmxnet3_intr_intx +ffffffff818afa90 T vmxnet3_intr_queue +ffffffff818afb20 T vmxnet3_dma_init +ffffffff818afed0 T vmxnet3_ioctl +ffffffff818b0160 T vmxnet3_start +ffffffff818b0480 T vmxnet3_watchdog +ffffffff818b04d0 T vmxnet3_media_change +ffffffff818b0500 T vmxnet3_media_status +ffffffff818b0610 T vmxnet3_link_state +ffffffff818b06d0 T vmxnet3_dma_allocmem +ffffffff818b0820 T vmxnet3_alloc_txring +ffffffff818b0990 T vmxnet3_alloc_rxring +ffffffff818b0c40 T vmxnet3_rxfill_tick +ffffffff818b0cb0 T vmxnet3_txinit +ffffffff818b0d20 T vmxnet3_rxfill +ffffffff818b0f70 T vmxnet3_rxinit +ffffffff818b1040 T vmxnet3_txstop +ffffffff818b10d0 T vmxnet3_rxstop +ffffffff818b11d0 T vmxnet3_enable_all_intrs +ffffffff818b12a0 T vmxnet3_disable_all_intrs +ffffffff818b1370 T vmxnet3_evintr +ffffffff818b1540 T vmxnet3_rxintr +ffffffff818b18d0 T vmxnet3_txintr +ffffffff818b1a70 T vmxnet3_init +ffffffff818b1e80 T vmxnet3_rx_csum +ffffffff818b1ee0 T vmxnet3_iff +ffffffff818b2020 T vmxnet3_stop +ffffffff818b2270 T vmxnet3_reset +ffffffff818b22b0 t vmx_kstat_create +ffffffff818b2490 t vmx_kstat_read +ffffffff818b3000 T vmwpvs_match +ffffffff818b3040 T vmwpvs_attach +ffffffff818b3df0 T vmwpvs_scsi_cmd +ffffffff818b4260 T vmwpvs_intx +ffffffff818b42e0 T vmwpvs_msg_task +ffffffff818b4560 T vmwpvs_intr +ffffffff818b4740 T vmwpvs_get_config +ffffffff818b4940 T vmwpvs_dmamem_zalloc +ffffffff818b49a0 T vmwpvs_dmamem_alloc +ffffffff818b4b20 T vmwpvs_ccb_put +ffffffff818b4b80 T vmwpvs_setup_rings +ffffffff818b4cb0 T vmwpvs_setup_msg_ring +ffffffff818b4da0 T vmwpvs_ccb_get +ffffffff818b4e20 T vmwpvs_dmamem_free +ffffffff818b4ea0 T vmwpvs_cmd +ffffffff818b4f50 T vmwpvs_scsi_cmd_done +ffffffff818b5130 T vmwpvs_scsi_cmd_poll +ffffffff818b6000 T lii_match +ffffffff818b6030 T lii_attach +ffffffff818b6440 T lii_activate +ffffffff818b6540 T lii_reset +ffffffff818b6810 T lii_spi_configure +ffffffff818b6900 T lii_eeprom_present +ffffffff818b6990 T lii_eeprom_read +ffffffff818b69c0 T lii_spi_read +ffffffff818b6c80 T lii_read_macaddr +ffffffff818b6df0 T lii_intr +ffffffff818b6f00 T lii_alloc_rings +ffffffff818b7110 T lii_tick +ffffffff818b7160 T lii_mii_readreg +ffffffff818b7400 T lii_mii_writereg +ffffffff818b76a0 T lii_mii_statchg +ffffffff818b7710 T lii_media_change +ffffffff818b7760 T lii_media_status +ffffffff818b77c0 T lii_ioctl +ffffffff818b7950 T lii_start +ffffffff818b7b00 T lii_watchdog +ffffffff818b7b40 T lii_stop +ffffffff818b7bb0 T lii_init +ffffffff818b80b0 T lii_iff +ffffffff818b81f0 T lii_tx_put +ffffffff818b8300 T lii_free_tx_space +ffffffff818b8340 T lii_rxintr +ffffffff818b84f0 T lii_txintr +ffffffff818b9000 T ichiic_match +ffffffff818b9030 T ichiic_attach +ffffffff818b9220 T ichiic_intr +ffffffff818b9330 T ichiic_i2c_acquire_bus +ffffffff818b9380 T ichiic_i2c_release_bus +ffffffff818b93d0 T ichiic_i2c_exec +ffffffff818ba000 T viapm_match +ffffffff818ba030 T viapm_attach +ffffffff818ba650 T viapm_intr +ffffffff818ba760 T viapm_i2c_acquire_bus +ffffffff818ba7b0 T viapm_i2c_release_bus +ffffffff818ba800 T viapm_i2c_exec +ffffffff818bab20 T viapm_refresh_sensor_data +ffffffff818bae50 T viapm_refresh +ffffffff818bae80 T val_to_uK +ffffffff818baf20 T val_to_rpm +ffffffff818baf60 T val_to_uV +ffffffff818bb000 T viapm_get_timecount +ffffffff818bc000 T amdiic_match +ffffffff818bc030 T amdiic_attach +ffffffff818bc200 T amdiic_intr +ffffffff818bc2d0 T amdiic_i2c_acquire_bus +ffffffff818bc320 T amdiic_i2c_release_bus +ffffffff818bc370 T amdiic_i2c_exec +ffffffff818bc5d0 T amdiic_read +ffffffff818bc740 T amdiic_wait +ffffffff818bc7e0 T amdiic_write +ffffffff818bd000 T nviic_match +ffffffff818bd030 T nviic_attach +ffffffff818bd280 T nviic_i2c_acquire_bus +ffffffff818bd2d0 T nviic_i2c_release_bus +ffffffff818bd310 T nviic_i2c_exec +ffffffff818bd530 T nviic_write +ffffffff818bd580 T nviic_read +ffffffff818be000 T sdhc_pci_match +ffffffff818be060 T sdhc_pci_attach +ffffffff818be3a0 T sdhc_pci_activate +ffffffff818be400 T sdhc_takecontroller +ffffffff818be4a0 T sdhc_ricohfix +ffffffff818be610 T sdhc_pci_conf_write +ffffffff818bf000 T kate_match +ffffffff818bf170 T kate_attach +ffffffff818bf420 T kate_refresh +ffffffff818c0000 T km_match +ffffffff818c0050 T km_attach +ffffffff818c00f0 T km_refresh +ffffffff818c1000 T ksmn_match +ffffffff818c1050 T ksmn_attach +ffffffff818c1230 T ksmn_ccd_attach +ffffffff818c1380 T ksmn_refresh +ffffffff818c14d0 T ksmn_read_reg +ffffffff818c2000 t iosf_pci_match +ffffffff818c2060 t iosf_pci_attach +ffffffff818c2100 t iosf_pci_mbi_mdr_rd +ffffffff818c2160 t iosf_pci_mbi_mdr_wr +ffffffff818c3000 T itherm_probe +ffffffff818c3030 T itherm_attach +ffffffff818c3380 T itherm_activate +ffffffff818c3400 T itherm_enable +ffffffff818c3460 T itherm_refresh +ffffffff818c3470 T itherm_refresh_sensor_data +ffffffff818c3860 T itherm_bias_temperature_sensor +ffffffff818c4000 T pchtemp_match +ffffffff818c4030 T pchtemp_attach +ffffffff818c4190 T pchtemp_refresh +ffffffff818c5000 T rtsx_pci_match +ffffffff818c5090 T rtsx_pci_attach +ffffffff818c6000 T xspd_match +ffffffff818c6030 T xspd_attach +ffffffff818c61f0 T xspd_intr +ffffffff818c7000 T virtio_pci_match +ffffffff818c7080 T virtio_pci_attach +ffffffff818c7430 T virtio_pci_detach +ffffffff818c7510 T virtio_pci_kick +ffffffff818c7570 T virtio_pci_read_device_config_1 +ffffffff818c75a0 T virtio_pci_read_device_config_2 +ffffffff818c75d0 T virtio_pci_read_device_config_4 +ffffffff818c7600 T virtio_pci_read_device_config_8 +ffffffff818c7680 T virtio_pci_write_device_config_1 +ffffffff818c76b0 T virtio_pci_write_device_config_2 +ffffffff818c76e0 T virtio_pci_write_device_config_4 +ffffffff818c7710 T virtio_pci_write_device_config_8 +ffffffff818c7780 T virtio_pci_read_queue_size +ffffffff818c77f0 T virtio_pci_setup_queue +ffffffff818c7ae0 T virtio_pci_set_status +ffffffff818c7b60 T virtio_pci_negotiate_features +ffffffff818c7ca0 T virtio_pci_poll_intr +ffffffff818c7d10 T virtio_pci_find_cap +ffffffff818c7ed0 T virtio_pci_attach_10 +ffffffff818c8310 T virtio_pci_attach_09 +ffffffff818c8450 T virtio_pci_adjust_config_region +ffffffff818c84f0 T virtio_pci_setup_msix +ffffffff818c8850 T virtio_pci_legacy_intr +ffffffff818c88f0 T virtio_pci_legacy_intr_mpsafe +ffffffff818c8980 T virtio_pci_free_irqs +ffffffff818c8bd0 T virtio_pci_negotiate_features_10 +ffffffff818c8e10 T virtio_pci_msix_establish +ffffffff818c8ee0 T virtio_pci_set_msix_queue_vector +ffffffff818c8f60 T virtio_pci_set_msix_config_vector +ffffffff818c8fa0 T virtio_pci_config_intr +ffffffff818c8fe0 T virtio_pci_shared_queue_intr +ffffffff818c8ff0 T virtio_pci_queue_intr +ffffffff818ca000 T dwiic_pci_match +ffffffff818ca030 T dwiic_pci_attach +ffffffff818ca350 T dwiic_pci_activate +ffffffff818ca3c0 T dwiic_pci_bus_scan +ffffffff818cb000 T bwfm_pci_buscore_read +ffffffff818cb060 T bwfm_pci_buscore_write +ffffffff818cb0d0 T bwfm_pci_buscore_prepare +ffffffff818cb100 T bwfm_pci_buscore_reset +ffffffff818cb2f0 T bwfm_pci_buscore_activate +ffffffff818cb320 T bwfm_pci_preinit +ffffffff818cc440 T bwfm_pci_stop +ffffffff818cc4d0 T bwfm_pci_txcheck +ffffffff818cc590 T bwfm_pci_txdata +ffffffff818cc8f0 T bwfm_pci_msgbuf_query_dcmd +ffffffff818ccd30 T bwfm_pci_msgbuf_set_dcmd +ffffffff818ccd80 T bwfm_pci_match +ffffffff818ccdb0 T bwfm_pci_attach +ffffffff818cd020 T bwfm_pci_detach +ffffffff818cd060 T bwfm_pci_activate +ffffffff818cd210 T bwfm_pci_intr +ffffffff818cd470 T bwfm_pci_select_core +ffffffff818cd550 T bwfm_pci_load_microcode +ffffffff818cd9d0 T bwfm_pci_dmamem_alloc +ffffffff818cdb70 T bwfm_pci_setup_ring +ffffffff818cdd80 T bwfm_pci_intr_enable +ffffffff818cddd0 T bwfm_pci_hostready +ffffffff818cde40 T bwfm_pci_fill_rx_rings +ffffffff818cde90 T bwfm_pci_dmamem_free +ffffffff818cdf00 T bwfm_pci_cleanup +ffffffff818ce570 T bwfm_pci_send_mb_data +ffffffff818ce690 T bwfm_pci_intmask +ffffffff818ce6d0 T bwfm_pci_pktid_avail +ffffffff818ce740 T bwfm_pci_pktid_new +ffffffff818ce8a0 T bwfm_pci_pktid_free +ffffffff818ce950 T bwfm_pci_fill_rx_buf_ring +ffffffff818cecb0 T bwfm_pci_fill_rx_ioctl_ring +ffffffff818cf030 T bwfm_pci_ring_write_reserve +ffffffff818cf120 T bwfm_pci_ring_write_cancel +ffffffff818cf160 T bwfm_pci_ring_write_commit +ffffffff818cf240 T bwfm_pci_ring_write_rptr +ffffffff818cf2c0 T bwfm_pci_ring_write_wptr +ffffffff818cf340 T bwfm_pci_setup_flowring +ffffffff818cf4a0 T bwfm_pci_ring_bell +ffffffff818cf4e0 T bwfm_pci_ring_update_rptr +ffffffff818cf590 T bwfm_pci_ring_update_wptr +ffffffff818cf640 T bwfm_pci_ring_write_reserve_multi +ffffffff818cf760 T bwfm_pci_ring_read_avail +ffffffff818cf860 T bwfm_pci_ring_read_commit +ffffffff818cf8f0 T bwfm_pci_ring_rx +ffffffff818cfb00 T bwfm_pci_msg_rx +ffffffff818d00e0 T bwfm_pci_flowring_delete_cb +ffffffff818d0190 T bwfm_pci_msgbuf_rxioctl +ffffffff818d0280 T bwfm_pci_intr_status +ffffffff818d02c0 T bwfm_pci_intr_ack +ffffffff818d0300 T bwfm_pci_flowring_lookup +ffffffff818d0470 T bwfm_pci_flowring_create +ffffffff818d05a0 T bwfm_pci_flowring_create_cb +ffffffff818d08f0 T bwfm_pci_flowring_delete +ffffffff818d0bc0 T bwfm_pci_msgbuf_h2d_mb_write +ffffffff818d0de0 T bwfm_pci_handle_mb_data +ffffffff818d0eb0 T bwfm_pci_intr_disable +ffffffff818d1000 T ccp_pci_match +ffffffff818d1030 T ccp_pci_attach +ffffffff818d2000 T bnxt_match +ffffffff818d2030 T bnxt_attach +ffffffff818d32a0 T bnxt_dmamem_alloc +ffffffff818d3430 T bnxt_dmamem_free +ffffffff818d34c0 T bnxt_hwrm_ver_get +ffffffff818d3610 T bnxt_hwrm_nvm_get_dev_info +ffffffff818d3760 T bnxt_hwrm_func_drv_rgtr +ffffffff818d3880 T bnxt_hwrm_func_rgtr_async_events +ffffffff818d39a0 T bnxt_hwrm_func_qcaps +ffffffff818d3a80 T bnxt_admin_intr +ffffffff818d3c80 T bnxt_intr +ffffffff818d4150 T bnxt_hwrm_func_qcfg +ffffffff818d4200 T bnxt_hwrm_queue_qportcfg +ffffffff818d42d0 T bnxt_hwrm_func_reset +ffffffff818d4380 T bnxt_mark_cpr_invalid +ffffffff818d43e0 T bnxt_hwrm_ring_alloc +ffffffff818d4590 T bnxt_cfg_async_cr +ffffffff818d4690 T bnxt_write_cp_doorbell +ffffffff818d46d0 T bnxt_set_cp_ring_aggint +ffffffff818d47b0 T bnxt_ioctl +ffffffff818d4940 T bnxt_start +ffffffff818d4d60 T bnxt_watchdog +ffffffff818d4d90 T bnxt_media_change +ffffffff818d4ee0 T bnxt_media_status +ffffffff818d4f00 T bnxt_refill +ffffffff818d4f60 T bnxt_media_autonegotiate +ffffffff818d5050 T bnxt_hwrm_port_phy_qcfg +ffffffff818d54f0 T bnxt_free_slots +ffffffff818d5580 T bnxt_hwrm_cmd_hdr_init +ffffffff818d55d0 T hwrm_send_message +ffffffff818d5650 T bnxt_queue_up +ffffffff818d6580 T bnxt_hwrm_stat_ctx_alloc +ffffffff818d6680 T bnxt_write_tx_doorbell +ffffffff818d66f0 T bnxt_write_rx_doorbell +ffffffff818d6770 T bnxt_hwrm_ring_grp_alloc +ffffffff818d6870 T bnxt_rx_fill +ffffffff818d6980 T bnxt_hwrm_ring_grp_free +ffffffff818d6a60 T bnxt_hwrm_ring_free +ffffffff818d6b50 T bnxt_hwrm_stat_ctx_free +ffffffff818d6c40 T bnxt_queue_down +ffffffff818d7320 T bnxt_up +ffffffff818d79f0 T bnxt_hwrm_vnic_ctx_alloc +ffffffff818d7ad0 T bnxt_hwrm_vnic_alloc +ffffffff818d7bd0 T bnxt_hwrm_vnic_cfg +ffffffff818d7d10 T bnxt_hwrm_vnic_cfg_placement +ffffffff818d7de0 T bnxt_hwrm_set_filter +ffffffff818d7f70 T bnxt_hwrm_vnic_rss_cfg +ffffffff818d8050 T bnxt_iff +ffffffff818d81c0 T bnxt_hwrm_vnic_free +ffffffff818d82b0 T bnxt_hwrm_vnic_ctx_free +ffffffff818d83a0 T bnxt_down +ffffffff818d8740 T bnxt_hwrm_free_filter +ffffffff818d8820 T bnxt_hwrm_cfa_l2_set_rx_mask +ffffffff818d8900 T bnxt_rxrinfo +ffffffff818d8a50 T bnxt_get_sffpage +ffffffff818d8d60 T bnxt_load_mbuf +ffffffff818d8e10 T bnxt_handle_async_event +ffffffff818d8e60 T bnxt_cpr_next_cmpl +ffffffff818d8ed0 T bnxt_cpr_commit +ffffffff818d8f00 T bnxt_cpr_rollback +ffffffff818d8f30 T bnxt_write_cp_doorbell_index +ffffffff818d8fb0 T bnxt_rx +ffffffff818d9290 T bnxt_txeof +ffffffff818d93c0 T bnxt_get_media_type +ffffffff818d9920 T bnxt_add_media_type +ffffffff818d9af0 T _hwrm_send_message +ffffffff818dc9a0 T bnxt_rx_fill_slots +ffffffff818dcb60 T bnxt_hwrm_err_map +ffffffff818dcba0 T _bnxt_hwrm_set_async_event_bit +ffffffff818dd000 t mcx_match +ffffffff818dd030 t mcx_attach +ffffffff818e0110 T mcx_rx_fill +ffffffff818e0360 T mcx_load_mbuf +ffffffff818e0410 t mcx_dmamem_alloc +ffffffff818e0570 t mcx_pages +ffffffff818e0e50 t mcx_iff +ffffffff818e1290 t mcx_alloc_uar +ffffffff818e1480 t mcx_admin_intr +ffffffff818e1630 t mcx_create_eq +ffffffff818e1bc0 t mcx_ioctl +ffffffff818e26a0 t mcx_start +ffffffff818e2ba0 t mcx_watchdog +ffffffff818e2bd0 t mcx_media_change +ffffffff818e2e90 t mcx_media_status +ffffffff818e2fd0 t mcx_refill +ffffffff818e3040 t mcx_cq_intr +ffffffff818e3560 t mcx_calibrate +ffffffff818e3720 t mcx_port_change +ffffffff818e3860 t mcx_cmdq_post +ffffffff818e3940 t mcx_set_flow_table_entry_mac +ffffffff818e3e10 t mcx_delete_flow_table_entry +ffffffff818e4290 t mcx_access_hca_reg +ffffffff818e46c0 t mcx_cmdq_exec +ffffffff818e48c0 t mcx_up +ffffffff818e7bc0 t mcx_down +ffffffff818e8c20 t mcx_create_flow_table +ffffffff818e8fd0 t mcx_create_flow_group +ffffffff818e94b0 t mcx_destroy_sq +ffffffff818e9760 t mcx_destroy_cq +ffffffff818e9a20 t mcx_arm_cq +ffffffff818e9b40 t mcx_destroy_flow_table +ffffffff818e9ea0 t mcx_kstat_attach_ppcnt +ffffffff818e9fd0 t mcx_kstat_ppcnt_read +ffffffff818ea0f0 t mcx_kstat_mtmp_read +ffffffff818ea280 t mcx_kstat_queue_read +ffffffff818eb710 t mcx_timecounter_read +ffffffff818ec000 t iavf_match +ffffffff818ec030 t iavf_attach +ffffffff818ec900 t iavf_reset +ffffffff818ecbd0 t iavf_dmamem_alloc +ffffffff818ecd30 t iavf_arq_fill +ffffffff818ecfe0 t iavf_arq_timeout +ffffffff818ed010 t iavf_init_admin_queue +ffffffff818ed1c0 t iavf_get_version +ffffffff818ed3e0 t iavf_get_vf_resources +ffffffff818ed5b0 t iavf_config_irq_map +ffffffff818ed7a0 t iavf_intr +ffffffff818ede20 t iavf_ioctl +ffffffff818ee9d0 t iavf_start +ffffffff818eed20 t iavf_watchdog +ffffffff818eed50 t iavf_media_change +ffffffff818eed80 t iavf_media_status +ffffffff818eee10 t iavf_arq_unfill +ffffffff818eef10 t iavf_down +ffffffff818ef470 t iavf_up +ffffffff818f00e0 t iavf_queue_select +ffffffff818f02e0 t iavf_rxfill +ffffffff818f04e0 t iavf_rxrefill +ffffffff818f0500 t iavf_process_arq +ffffffff818f1000 T rge_match +ffffffff818f1030 T rge_attach +ffffffff818f1520 T rge_activate +ffffffff818f1660 T rge_intr +ffffffff818f1950 T rge_config_imtype +ffffffff818f19c0 T rge_exit_oob +ffffffff818f21e0 T rge_hw_init +ffffffff818f25d0 T rge_get_macaddr +ffffffff818f2650 T rge_set_phy_power +ffffffff818f28b0 T rge_phy_config +ffffffff818f31f0 T rge_allocmem +ffffffff818f3600 T rge_ioctl +ffffffff818f37b0 T rge_start +ffffffff818f3980 T rge_watchdog +ffffffff818f39c0 T rge_wol +ffffffff818f3bf0 T rge_tick +ffffffff818f3c70 T rge_txstart +ffffffff818f3ca0 T rge_ifmedia_upd +ffffffff818f4260 T rge_ifmedia_sts +ffffffff818f4350 T rge_add_media_types +ffffffff818f4400 T rge_kstat_attach +ffffffff818f46e0 T rge_wol_power +ffffffff818f47c0 T rge_rxeof +ffffffff818f4bc0 T rge_txeof +ffffffff818f4dc0 T rge_init +ffffffff818f5f80 T rge_setup_intr +ffffffff818f60f0 T rge_encap +ffffffff818f6390 T rge_stop +ffffffff818f65f0 T rge_iff +ffffffff818f6770 T rge_set_macaddr +ffffffff818f6840 T rge_rx_list_init +ffffffff818f6900 T rge_tx_list_init +ffffffff818f69c0 T rge_read_csi +ffffffff818f6c30 T rge_write_csi +ffffffff818f6eb0 T rge_write_mac_ocp +ffffffff818f6f00 T rge_read_mac_ocp +ffffffff818f6f80 T rge_reset +ffffffff818f7140 T rge_write_phy_ocp +ffffffff818f7200 T rge_read_phy_ocp +ffffffff818f72b0 T rge_read_phy +ffffffff818f7380 T rge_write_phy +ffffffff818f7460 T rge_get_link_status +ffffffff818f74c0 T rge_newbuf +ffffffff818f7640 T rge_discard_rxbuf +ffffffff818f76b0 T rge_fill_rx_ring +ffffffff818f7730 T rge_phy_config_mac_cfg2 +ffffffff818f9140 T rge_phy_config_mac_cfg3 +ffffffff818fadf0 T rge_phy_config_mac_cfg4 +ffffffff818fee60 T rge_phy_config_mac_cfg5 +ffffffff818ff950 T rge_patch_phy_mcu +ffffffff818ffbd0 T rge_write_ephy +ffffffff818ffe30 T rge_phy_config_mcu +ffffffff819008f0 T rge_read_ephy +ffffffff81900b70 T rge_disable_phy_ocp_pwrsave +ffffffff81900d40 T rge_disable_hw_im +ffffffff81900d70 T rge_disable_sim_im +ffffffff81900dd0 T rge_setup_sim_im +ffffffff81900e50 T rge_link_state +ffffffff81900ed0 t rge_kstat_read +ffffffff81901070 t rge_kstat_copy +ffffffff81902000 T igc_match +ffffffff81902030 T igc_attach +ffffffff819024a0 T igc_detach +ffffffff819026a0 T igc_identify_hardware +ffffffff81902710 T igc_allocate_pci_resources +ffffffff81902830 T igc_allocate_queues +ffffffff81902d20 T igc_is_valid_ether_addr +ffffffff81902d80 T igc_allocate_msix +ffffffff81902fe0 T igc_setup_interface +ffffffff81903220 T igc_reset +ffffffff81903360 T igc_update_link_status +ffffffff81903470 T igc_get_hw_control +ffffffff819034d0 T igc_release_hw_control +ffffffff81903530 T igc_free_pci_resources +ffffffff81903610 T igc_stop +ffffffff81903920 T igc_free_transmit_structures +ffffffff819039a0 T igc_free_receive_structures +ffffffff81903a60 T igc_setup_msix +ffffffff81903af0 T igc_dma_malloc +ffffffff81903c60 T igc_rxrefill +ffffffff81903d30 T igc_dma_free +ffffffff81903de0 T igc_init_dmac +ffffffff81904080 T igc_intr_queue +ffffffff81904190 T igc_intr_link +ffffffff81904310 T igc_ioctl +ffffffff819045f0 T igc_start +ffffffff81904a20 T igc_watchdog +ffffffff81904a50 T igc_media_change +ffffffff81904b60 T igc_media_status +ffffffff81904d10 T igc_init +ffffffff81905200 T igc_setup_transmit_structures +ffffffff819052c0 T igc_initialize_transmit_unit +ffffffff819054e0 T igc_setup_receive_structures +ffffffff81905660 T igc_initialize_receive_unit +ffffffff81905a30 T igc_iff +ffffffff81905b80 T igc_configure_queues +ffffffff81905d90 T igc_rxfill +ffffffff81905ec0 T igc_enable_intr +ffffffff81905f90 T igc_tx_ctx_setup +ffffffff819060a0 T igc_txeof +ffffffff81906260 T igc_disable_intr +ffffffff81906300 T igc_rxrinfo +ffffffff81906450 T igc_get_buf +ffffffff81906590 T igc_rxeof +ffffffff81906930 T igc_rx_checksum +ffffffff81906980 T igc_set_queues +ffffffff81906a60 T igc_enable_queue +ffffffff81906a90 T igc_allocate_transmit_buffers +ffffffff81906bf0 T igc_setup_transmit_ring +ffffffff81906d70 T igc_free_transmit_buffers +ffffffff81906e90 T igc_allocate_receive_buffers +ffffffff81906fc0 T igc_setup_receive_ring +ffffffff81907080 T igc_initialize_rss_mapping +ffffffff819072a0 T igc_free_receive_buffers +ffffffff81908000 T igc_init_mac_params +ffffffff81908040 T igc_init_nvm_params +ffffffff81908080 T igc_init_phy_params +ffffffff819080c0 T igc_set_mac_type +ffffffff81908170 T igc_setup_init_funcs +ffffffff819082d0 T igc_update_mc_addr_list +ffffffff81908310 T igc_check_for_link +ffffffff81908350 T igc_reset_hw +ffffffff81908390 T igc_init_hw +ffffffff819083d0 T igc_get_speed_and_duplex +ffffffff81908410 T igc_rar_set +ffffffff81908450 T igc_check_reset_block +ffffffff81908490 T igc_get_phy_info +ffffffff819084d0 T igc_phy_hw_reset +ffffffff81908510 T igc_read_mac_addr +ffffffff81908540 T igc_validate_nvm_checksum +ffffffff81909000 T igc_acquire_phy_base +ffffffff81909030 T igc_release_phy_base +ffffffff81909060 T igc_init_hw_base +ffffffff81909160 T igc_power_down_phy_copper_base +ffffffff8190a000 T igc_init_nvm_params_i225 +ffffffff8190a180 T igc_acquire_nvm_i225 +ffffffff8190a250 T igc_release_nvm_i225 +ffffffff8190a2c0 T igc_get_flash_presence_i225 +ffffffff8190a310 T igc_read_nvm_srrd_i225 +ffffffff8190a3f0 T igc_write_nvm_srwr_i225 +ffffffff8190a5c0 T igc_validate_nvm_checksum_i225 +ffffffff8190a650 T igc_update_nvm_checksum_i225 +ffffffff8190a7f0 T igc_init_mac_params_i225 +ffffffff8190a8b0 T igc_reset_hw_i225 +ffffffff8190a9d0 T igc_init_hw_i225 +ffffffff8190a9e0 T igc_check_for_link_i225 +ffffffff8190aaa0 T igc_acquire_swfw_sync_i225 +ffffffff8190ab80 T igc_release_swfw_sync_i225 +ffffffff8190ac00 T igc_setup_copper_link_i225 +ffffffff8190ac90 T igc_init_phy_params_i225 +ffffffff8190ad70 T igc_get_hw_semaphore_i225 +ffffffff8190af20 T __igc_write_nvm_srwr +ffffffff8190b050 T igc_update_flash_i225 +ffffffff8190b420 T igc_set_flsw_flash_burst_counter_i225 +ffffffff8190b480 T igc_write_erase_flash_command_i225 +ffffffff8190b580 T igc_pool_flash_update_done_i225 +ffffffff8190b610 T igc_set_ltr_i225 +ffffffff8190b880 T igc_init_function_pointers_i225 +ffffffff8190b8f0 T igc_set_eee_i225 +ffffffff8190c000 T igc_init_mac_ops_generic +ffffffff8190c050 T igc_null_ops_generic +ffffffff8190c080 T igc_config_collision_dist_generic +ffffffff8190c0f0 T igc_rar_set_generic +ffffffff8190c1d0 T igc_write_vfta_generic +ffffffff8190c220 T igc_init_rx_addrs_generic +ffffffff8190c2c0 T igc_check_alt_mac_addr_generic +ffffffff8190c440 T igc_hash_mc_addr_generic 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igc_null_read_reg +ffffffff8190f150 T igc_null_phy_generic +ffffffff8190f180 T igc_null_lplu_state +ffffffff8190f1b0 T igc_null_write_reg +ffffffff8190f1e0 T igc_check_reset_block_generic +ffffffff8190f240 T igc_get_phy_id +ffffffff8190f2f0 T igc_read_phy_reg_mdic +ffffffff8190f400 T igc_write_phy_reg_mdic +ffffffff8190f500 T igc_phy_setup_autoneg +ffffffff8190f700 T igc_copper_link_autoneg +ffffffff8190f850 T igc_wait_autoneg +ffffffff8190f920 T igc_setup_copper_link_generic +ffffffff8190fa30 T igc_phy_has_link_generic +ffffffff8190fb50 T igc_check_downshift_generic +ffffffff8190fb80 T igc_phy_hw_reset_generic +ffffffff8190fd20 T igc_power_up_phy_copper +ffffffff8190fdb0 T igc_power_down_phy_copper +ffffffff8190fe40 T igc_write_phy_reg_gpy +ffffffff81910030 T igc_write_xmdio_reg +ffffffff81910130 T igc_read_phy_reg_gpy +ffffffff81910330 T igc_read_xmdio_reg +ffffffff81910420 T __igc_access_xmdio_reg +ffffffff81911000 T ngbe_match +ffffffff81911030 T ngbe_attach +ffffffff81911560 T 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ngbe_set_rxpba +ffffffff81919d60 T ngbe_eepromcheck_cap +ffffffff81919e20 T ngbe_phy_led_oem_chk +ffffffff81919f10 T ngbe_set_fw_drv_ver +ffffffff8191a030 T ngbe_init_thermal_sensor_thresh +ffffffff8191a0f0 T ngbe_validate_mac_addr +ffffffff8191a150 T ngbe_fc_autoneg +ffffffff8191a2e0 T ngbe_fc_autoneg_copper +ffffffff8191a3f0 T ngbe_negotiate_fc +ffffffff8191a4a0 T ngbe_fmgr_cmd_op +ffffffff8191a580 T ngbe_flash_read_dword +ffffffff8191a670 T ngbe_calculate_checksum +ffffffff8191a730 T ngbe_check_internal_phy_id +ffffffff8191a870 T ngbe_gphy_wait_mdio_access_on +ffffffff8191a8f0 T ngbe_check_mng_access +ffffffff8191a940 T ngbe_mng_present +ffffffff8191a990 T ngbe_check_reset_blocked +ffffffff8191aa10 T ngbe_set_ivar +ffffffff8191ab00 T ngbe_pbthresh_setup +ffffffff8191abc0 T ngbe_disable_queue +ffffffff8191ac20 T ngbe_host_interface_command +ffffffff8191aff0 T ngbe_tx_ctx_setup +ffffffff8191b080 T ngbe_read_pci_cfg_word +ffffffff8191b0e0 T ngbe_set_pci_config_data +ffffffff8191b170 T ngbe_get_copper_link_capabilities +ffffffff8191b1c0 T ngbe_get_eeprom_semaphore +ffffffff8191b320 T ngbe_release_eeprom_semaphore +ffffffff8191b3d0 T ngbe_gphy_dis_eee +ffffffff8191b4f0 T ngbe_gphy_efuse_calibration +ffffffff8191b8b0 T ngbe_hpbthresh +ffffffff8191b940 T ngbe_lpbthresh +ffffffff8191b980 T ngbe_mta_vector +ffffffff8191b9d0 T ngbe_setup_copper_link +ffffffff8191ba20 T ngbe_reset_misc +ffffffff8191bd80 T ngbe_set_mta +ffffffff8191bdf0 T ngbe_rx_checksum +ffffffff8191c000 T com_pci_match +ffffffff8191c030 T com_pci_attach +ffffffff8191c300 T com_pci_detach +ffffffff8191c3a0 T com_pci_activate +ffffffff8191c490 T com_pci_intr_designware +ffffffff8191d000 T agpdev_print +ffffffff8191d050 T agpbus_probe +ffffffff8191d0c0 T agpvga_match +ffffffff8191d130 T agp_attach_bus +ffffffff8191d1b0 T agp_probe +ffffffff8191d1e0 T agp_attach +ffffffff8191d2f0 T agp_alloc_gatt +ffffffff8191d4b0 T agp_alloc_dmamem +ffffffff8191d5e0 T agp_free_dmamem +ffffffff8191d640 T agp_free_gatt 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drm_atomic_helper_calc_timestamping_constants +ffffffff81928070 T drm_atomic_helper_commit_modeset_disables +ffffffff81928670 T drm_atomic_helper_commit_modeset_enables +ffffffff81928960 T drm_atomic_helper_wait_for_fences +ffffffff81928a60 T drm_atomic_helper_wait_for_vblanks +ffffffff81928d70 T drm_atomic_helper_wait_for_flip_done +ffffffff81928f30 T drm_atomic_helper_commit_tail +ffffffff819290c0 T drm_atomic_helper_commit_planes +ffffffff81929380 T drm_atomic_helper_fake_vblank +ffffffff81929460 T drm_atomic_helper_commit_hw_done +ffffffff81929620 T drm_atomic_helper_cleanup_planes +ffffffff819296d0 T drm_atomic_helper_commit_tail_rpm +ffffffff81929860 T drm_atomic_helper_async_commit +ffffffff81929af0 T drm_atomic_helper_commit +ffffffff81929db0 T drm_atomic_helper_prepare_planes +ffffffff81929f60 T drm_atomic_helper_setup_commit +ffffffff8192a7f0 t commit_work +ffffffff8192a810 T drm_atomic_helper_swap_state +ffffffff8192ae80 t commit_tail +ffffffff8192b160 t release_crtc_commit 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drm_atomic_helper_connector_tv_reset +ffffffff8192d9e0 T __drm_atomic_helper_connector_duplicate_state +ffffffff8192da70 T drm_atomic_helper_connector_duplicate_state +ffffffff8192db50 T drm_atomic_helper_connector_destroy_state +ffffffff8192dbc0 T __drm_atomic_helper_private_obj_duplicate_state +ffffffff8192dc00 T __drm_atomic_helper_bridge_duplicate_state +ffffffff8192dc40 T drm_atomic_helper_bridge_duplicate_state +ffffffff8192dcf0 T drm_atomic_helper_bridge_destroy_state +ffffffff8192dd10 T __drm_atomic_helper_bridge_reset +ffffffff8192dd60 T drm_atomic_helper_bridge_reset +ffffffff8192e000 T drm_atomic_set_mode_for_crtc +ffffffff8192e200 T drm_atomic_set_mode_prop_for_crtc +ffffffff8192e490 T drm_atomic_set_crtc_for_plane +ffffffff8192e600 T drm_atomic_set_fb_for_plane +ffffffff8192e6e0 T drm_atomic_set_crtc_for_connector +ffffffff8192e840 T drm_atomic_get_property +ffffffff8192ef80 T drm_atomic_connector_commit_dpms +ffffffff8192f0e0 T drm_atomic_set_property +ffffffff8192fb90 T drm_mode_atomic_ioctl +ffffffff81931000 T drm_is_current_master +ffffffff81931060 T drm_getmagic +ffffffff81931130 T drm_authmagic +ffffffff819311f0 T drm_master_create +ffffffff81931290 T drm_setmaster_ioctl +ffffffff81931350 t drm_new_set_master +ffffffff819314e0 T drm_dropmaster_ioctl +ffffffff81931630 T drm_master_open +ffffffff819316e0 T drm_master_get +ffffffff81931710 T drm_master_release +ffffffff81931860 T drm_master_put +ffffffff819318f0 T drm_file_get_master +ffffffff81931950 T drm_master_internal_acquire +ffffffff819319c0 T drm_master_internal_release +ffffffff81932000 T drm_plane_create_alpha_property +ffffffff819320a0 T drm_plane_create_rotation_property +ffffffff819321e0 T drm_rotation_simplify +ffffffff81932260 T drm_plane_create_zpos_property +ffffffff81932320 T drm_plane_create_zpos_immutable_property +ffffffff819323d0 T drm_atomic_normalize_zpos +ffffffff819326d0 T drm_plane_create_blend_mode_property +ffffffff81932870 t drm_atomic_state_zpos_cmp +ffffffff81933000 T drm_bridge_add +ffffffff81933070 T devm_drm_bridge_add +ffffffff81933110 T drm_bridge_remove +ffffffff81933170 T drm_bridge_attach +ffffffff819332f0 T drm_bridge_detach +ffffffff819333e0 T drm_bridge_chain_mode_fixup +ffffffff81933480 T drm_bridge_chain_mode_valid +ffffffff81933520 T drm_bridge_chain_disable +ffffffff819335b0 T drm_bridge_chain_post_disable +ffffffff81933630 T drm_bridge_chain_mode_set +ffffffff819336c0 T drm_bridge_chain_pre_enable +ffffffff81933750 T drm_bridge_chain_enable +ffffffff819337d0 T drm_atomic_bridge_chain_disable +ffffffff819338d0 T drm_atomic_bridge_chain_post_disable +ffffffff819339e0 T drm_atomic_bridge_chain_pre_enable +ffffffff81933ae0 T drm_atomic_bridge_chain_enable +ffffffff81933bf0 T drm_atomic_bridge_chain_check +ffffffff81933f50 T drm_bridge_detect +ffffffff81933fb0 T drm_bridge_get_modes +ffffffff81934010 T drm_bridge_get_edid +ffffffff81934070 T drm_bridge_hpd_enable +ffffffff81934140 T drm_bridge_hpd_disable +ffffffff819341e0 T drm_bridge_hpd_notify +ffffffff81934240 t drm_bridge_atomic_duplicate_priv_state +ffffffff81934260 t drm_bridge_atomic_destroy_priv_state +ffffffff81934280 t select_bus_fmt_recursive +ffffffff81935000 T drm_buddy_init +ffffffff81935460 T drm_buddy_fini +ffffffff81935560 T drm_get_buddy +ffffffff819355a0 T drm_buddy_free_block +ffffffff81935740 T drm_buddy_free_list +ffffffff819357d0 T drm_buddy_block_trim +ffffffff81935a20 t __alloc_range +ffffffff81935df0 T drm_buddy_alloc_blocks +ffffffff81936690 T drm_buddy_block_print +ffffffff819366d0 T drm_buddy_print +ffffffff81936840 T drm_buddy_module_exit +ffffffff81936860 T drm_buddy_module_init +ffffffff819368c0 t split_block +ffffffff81937000 T drm_clflush_pages +ffffffff81937120 T drm_clflush_sg +ffffffff81937270 T drm_clflush_virt_range +ffffffff81937340 T drm_need_swiotlb +ffffffff81937370 T drm_memcpy_from_wc +ffffffff81937710 T drm_memcpy_init_early +ffffffff81938000 T drm_client_init +ffffffff81938110 T drm_client_register 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drm_crtc_enable_color_mgmt +ffffffff8193c1c0 T drm_mode_crtc_set_gamma_size +ffffffff8193c2e0 T drm_mode_gamma_set_ioctl +ffffffff8193c7d0 T drm_mode_gamma_get_ioctl +ffffffff8193c910 T drm_get_color_encoding_name +ffffffff8193c980 T drm_get_color_range_name +ffffffff8193c9f0 T drm_plane_create_color_properties +ffffffff8193cc50 T drm_color_lut_check +ffffffff8193d000 T drm_connector_ida_init +ffffffff8193d110 T drm_connector_ida_destroy +ffffffff8193d220 T drm_get_connector_type_name +ffffffff8193d260 T drm_connector_free_work_fn +ffffffff8193d320 T drm_connector_init +ffffffff8193d3a0 t __drm_connector_init +ffffffff8193d8b0 T drm_connector_init_with_ddc +ffffffff8193d940 T drmm_connector_init +ffffffff8193da00 t drm_connector_cleanup_action +ffffffff8193da20 T drm_connector_attach_edid_property +ffffffff8193da40 T drm_connector_attach_encoder +ffffffff8193dac0 T drm_connector_has_possible_encoder +ffffffff8193db00 T drm_connector_cleanup +ffffffff8193de30 T drm_connector_unregister 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+ffffffff8193ec20 T drm_connector_attach_content_type_property +ffffffff8193ecc0 T drm_mode_create_content_type_property +ffffffff8193ed40 T drm_connector_attach_tv_margin_properties +ffffffff8193edb0 T drm_mode_create_tv_margin_properties +ffffffff8193eed0 T drm_mode_create_tv_properties +ffffffff8193f130 T drm_mode_create_scaling_mode_property +ffffffff8193f1a0 T drm_connector_attach_vrr_capable_property +ffffffff8193f230 T drm_connector_attach_scaling_mode_property +ffffffff8193f400 T drm_mode_create_aspect_ratio_property +ffffffff8193f480 T drm_mode_create_hdmi_colorspace_property +ffffffff8193f500 T drm_mode_create_dp_colorspace_property +ffffffff8193f580 T drm_mode_create_suggested_offset_properties +ffffffff8193f650 T drm_connector_set_path_property +ffffffff8193f6b0 T drm_connector_set_tile_property +ffffffff8193f800 T drm_connector_set_link_status_property +ffffffff8193f850 T drm_connector_attach_max_bpc_property +ffffffff8193f910 T drm_connector_attach_hdr_output_metadata_property +ffffffff8193f960 T drm_connector_attach_colorspace_property +ffffffff8193f9b0 T drm_connector_atomic_hdr_metadata_equal +ffffffff8193fa20 T drm_connector_set_vrr_capable_property +ffffffff8193fa70 T drm_connector_set_panel_orientation +ffffffff8193fb30 T drm_connector_set_panel_orientation_with_quirk +ffffffff8193fc10 T drm_connector_set_orientation_from_panel +ffffffff8193fd00 T drm_connector_create_privacy_screen_properties +ffffffff8193fda0 T drm_connector_attach_privacy_screen_properties +ffffffff8193fe10 T drm_connector_attach_privacy_screen_provider +ffffffff8193ff20 t drm_connector_privacy_screen_notifier +ffffffff8193ffc0 T drm_connector_update_privacy_screen +ffffffff81940030 T drm_connector_set_obj_prop +ffffffff81940110 T drm_connector_property_set_ioctl +ffffffff81940170 T drm_mode_getconnector +ffffffff819406b0 T drm_connector_find_by_fwnode +ffffffff81940760 T drm_connector_oob_hotplug_event +ffffffff81940850 T drm_mode_get_tile_group +ffffffff81940920 T drm_mode_create_tile_group +ffffffff819409f0 t drm_connector_free +ffffffff81940a30 t kasprintf +ffffffff81941000 T drm_crtc_from_index +ffffffff81941060 T drm_crtc_force_disable +ffffffff81941180 T drm_mode_set_config_internal +ffffffff81941200 T drm_crtc_register_all +ffffffff81941290 T drm_crtc_unregister_all +ffffffff81941300 T drm_crtc_create_fence +ffffffff81941390 T drm_crtc_init_with_planes +ffffffff81941460 t __drm_crtc_init_with_planes +ffffffff81941850 T drmm_crtc_init_with_planes +ffffffff81941950 T __drmm_crtc_alloc_with_planes +ffffffff81941ac0 T drm_crtc_cleanup +ffffffff81941be0 T drm_mode_getcrtc +ffffffff81941d80 t __drm_mode_set_config_internal +ffffffff81941f20 T drm_crtc_check_viewport +ffffffff81941fd0 T drm_mode_setcrtc +ffffffff81942730 T drm_mode_crtc_set_obj_prop +ffffffff819427b0 T drm_crtc_create_scaling_filter_property +ffffffff81942820 t drm_crtc_fence_get_driver_name +ffffffff819428a0 t drm_crtc_fence_get_timeline_name +ffffffff81942910 t kasprintf +ffffffff819429e0 t drmm_crtc_init_with_planes_cleanup +ffffffff81943000 T drm_helper_encoder_in_use +ffffffff81943180 T drm_helper_crtc_in_use +ffffffff819432b0 T drm_helper_disable_unused_functions +ffffffff81943330 t __drm_helper_disable_unused_functions +ffffffff81943430 T drm_crtc_helper_set_mode +ffffffff819438e0 T drm_connector_get_single_encoder +ffffffff819439e0 T drm_crtc_helper_set_config +ffffffff81944600 T drm_helper_connector_dpms +ffffffff819448f0 T drm_helper_resume_force_mode +ffffffff81944be0 T drm_helper_force_disable_all +ffffffff81944cb0 t drm_encoder_disable +ffffffff81945000 T drm_atomic_helper_check_plane_damage +ffffffff819450a0 T drm_atomic_helper_dirtyfb +ffffffff81945350 T drm_atomic_helper_damage_iter_init +ffffffff819454a0 T drm_atomic_helper_damage_iter_next +ffffffff81945540 T drm_atomic_helper_damage_merged +ffffffff81946000 T displayid_iter_edid_begin +ffffffff81946050 T __displayid_iter_next +ffffffff819462e0 T displayid_iter_end +ffffffff81947000 T drm_mode_create_dumb +ffffffff819470c0 T drm_mode_create_dumb_ioctl +ffffffff81947180 T drm_mode_mmap_dumb_ioctl +ffffffff819471f0 T drm_mode_destroy_dumb +ffffffff81947260 T drm_mode_destroy_dumb_ioctl +ffffffff81948000 T drm_edid_header_is_valid +ffffffff81948080 T drm_edid_are_equal +ffffffff819480f0 T drm_edid_block_valid +ffffffff81948300 t edid_block_check +ffffffff81948430 t edid_block_status_print +ffffffff81948530 T drm_edid_is_valid +ffffffff819485b0 T drm_edid_override_set +ffffffff81948620 T drm_connector_update_edid_property +ffffffff819487d0 T drm_edid_override_reset +ffffffff81948900 T drm_add_override_edid_modes +ffffffff81948ae0 T drm_add_edid_modes +ffffffff81948bd0 T drm_do_get_edid +ffffffff81948bf0 t _drm_do_get_edid +ffffffff81949100 T drm_edid_raw +ffffffff81949190 T drm_edid_alloc +ffffffff81949260 T drm_edid_dup +ffffffff81949340 T drm_edid_free +ffffffff819493a0 T drm_probe_ddc +ffffffff819494a0 t drm_do_probe_ddc_edid +ffffffff819495f0 T drm_get_edid +ffffffff81949730 T drm_edid_read_custom +ffffffff81949820 T drm_edid_read_ddc +ffffffff81949950 T drm_edid_read +ffffffff819499d0 T drm_edid_get_panel_id +ffffffff81949ab0 t edid_block_read +ffffffff81949d20 T drm_get_edid_switcheroo +ffffffff81949d70 T drm_edid_duplicate +ffffffff81949df0 T drm_mode_find_dmt +ffffffff81949f10 T drm_mode_fixup_1366x768 +ffffffff81949f70 T drm_find_edid_extension +ffffffff8194a180 T drm_match_cea_mode +ffffffff8194a3d0 T drm_display_mode_from_cea_vic +ffffffff8194a440 T drm_edid_get_monitor_name +ffffffff8194a4f0 t get_monitor_name +ffffffff8194a850 T drm_edid_to_sad +ffffffff8194aa60 T drm_edid_to_speaker_allocation +ffffffff8194ac10 T drm_av_sync_delay +ffffffff8194acc0 T drm_detect_hdmi_monitor +ffffffff8194ade0 T drm_detect_monitor_audio +ffffffff8194aff0 T drm_default_rgb_quant_range +ffffffff8194b030 T drm_edid_connector_update +ffffffff8194b090 t _drm_edid_connector_update +ffffffff8194cf40 t _drm_update_tile_info +ffffffff8194d1d0 t _drm_edid_connector_property_update +ffffffff8194d380 T drm_add_modes_noedid +ffffffff8194d470 T drm_set_preferred_mode +ffffffff8194d4d0 T drm_hdmi_avi_infoframe_from_display_mode +ffffffff8194d750 T drm_hdmi_avi_infoframe_quant_range +ffffffff8194d7f0 T drm_hdmi_vendor_infoframe_from_display_mode +ffffffff8194d8b0 t connector_bad_edid +ffffffff8194da70 t drm_for_each_detailed_block +ffffffff8194dcc0 t __cea_db_iter_next +ffffffff8194df60 t update_display_info +ffffffff8194ede0 t get_monitor_range +ffffffff8194ee80 t do_detailed_mode +ffffffff8194f7a0 t hdmi_mode_alternate_clock +ffffffff8194f850 t do_cvt_mode +ffffffff8194faa0 t drm_mode_std +ffffffff819507b0 t do_standard_modes +ffffffff81950900 t drm_monitor_supports_rb +ffffffff81950bf0 t drm_gtf2_hbreak +ffffffff81950e80 t do_established_modes +ffffffff81951080 t drm_match_hdmi_mode +ffffffff819512c0 t do_inferred_modes +ffffffff81951830 t mode_in_range +ffffffff81952000 T drm_encoder_register_all +ffffffff81952090 T drm_encoder_unregister_all +ffffffff81952100 T drm_encoder_init +ffffffff819521d0 t __drm_encoder_init +ffffffff81952390 T drm_encoder_cleanup +ffffffff819524c0 T __drmm_encoder_alloc +ffffffff819525e0 T drmm_encoder_init +ffffffff819526c0 T drm_mode_getencoder +ffffffff81952820 t kasprintf +ffffffff819528f0 t drmm_encoder_alloc_release +ffffffff81953000 T drm_i2c_encoder_dpms +ffffffff81953020 T drm_i2c_encoder_mode_fixup +ffffffff81953060 T drm_i2c_encoder_prepare +ffffffff81953080 T drm_i2c_encoder_commit +ffffffff819530a0 T drm_i2c_encoder_mode_set +ffffffff819530c0 T drm_i2c_encoder_detect +ffffffff819530e0 T drm_i2c_encoder_save +ffffffff81953100 T drm_i2c_encoder_restore +ffffffff81954000 T drm_fb_helper_debug_enter +ffffffff81954100 T drm_fb_helper_debug_leave +ffffffff81954270 T drm_fb_helper_restore_fbdev_mode_unlocked +ffffffff81954310 T drm_fb_helper_blank +ffffffff819543a0 T drm_fb_helper_prepare +ffffffff81954480 t drm_fb_helper_resume_worker +ffffffff819544b0 t drm_fb_helper_damage_work +ffffffff81954830 T drm_fb_helper_init +ffffffff819548a0 T drm_fb_helper_alloc_fbi +ffffffff81954900 T drm_fb_helper_unregister_fbi +ffffffff81954930 T drm_fb_helper_fini +ffffffff81954a30 T drm_fb_helper_set_suspend +ffffffff81954a60 T drm_fb_helper_set_suspend_unlocked +ffffffff81954a90 T drm_fb_helper_set_par +ffffffff81954b80 T drm_fb_helper_pan_display +ffffffff81954c50 T drm_fb_helper_fill_info +ffffffff81954d10 T drm_fb_helper_initial_config +ffffffff81954d40 t __drm_fb_helper_initial_config_and_unlock +ffffffff81955290 T drm_fb_helper_hotplug_event +ffffffff81955490 t drm_setup_crtcs_fb +ffffffff819555d0 T drm_fb_helper_lastclose +ffffffff81955680 T drm_fb_helper_output_poll_changed +ffffffff819556a0 T drm_fbdev_generic_setup +ffffffff81955850 t drm_fbdev_client_hotplug +ffffffff81955a80 t drm_fbdev_client_unregister +ffffffff81955af0 t drm_fbdev_client_restore +ffffffff81955b90 t drm_fbdev_cleanup +ffffffff81955c30 t drm_fbdev_use_shadow_fb +ffffffff81955c80 t drm_fb_helper_generic_probe +ffffffff81956000 T drm_dev_needs_global_mutex +ffffffff81956060 T drm_file_alloc +ffffffff819562d0 T drm_file_free +ffffffff81956500 T drm_lastclose +ffffffff81956570 T drm_release +ffffffff819565c0 T drm_release_noglobal +ffffffff81956610 T drm_read +ffffffff81956660 T drm_event_reserve_init_locked +ffffffff819566e0 T drm_event_reserve_init +ffffffff819567a0 T drm_event_cancel_free +ffffffff81956820 T drm_send_event_timestamp_locked +ffffffff81956830 t drm_send_event_helper +ffffffff81956a10 T drm_send_event_locked +ffffffff81956a30 T drm_send_event +ffffffff81956a80 T mock_drm_getfile +ffffffff81957000 T drm_flip_work_allocate_task +ffffffff81957060 T drm_flip_work_queue_task +ffffffff819570b0 T drm_flip_work_queue +ffffffff81957150 T drm_flip_work_commit +ffffffff819571d0 T drm_flip_work_init +ffffffff81957240 t flip_worker +ffffffff81957320 T drm_flip_work_cleanup +ffffffff81958000 T drm_fb_clip_offset +ffffffff81958040 T drm_fb_memcpy +ffffffff819582c0 T drm_fb_swab +ffffffff819583c0 t drm_fb_swab32_line +ffffffff81958420 t drm_fb_swab16_line +ffffffff81958480 t drm_fb_xfrm +ffffffff81958740 T drm_fb_xrgb8888_to_rgb332 +ffffffff819587a0 t drm_fb_xrgb8888_to_rgb332_line +ffffffff81958890 T drm_fb_xrgb8888_to_rgb565 +ffffffff81958910 t drm_fb_xrgb8888_to_rgb565_swab_line +ffffffff81958990 t drm_fb_xrgb8888_to_rgb565_line +ffffffff81958a80 T drm_fb_xrgb8888_to_rgb888 +ffffffff81958ae0 t drm_fb_xrgb8888_to_rgb888_line +ffffffff81958b70 T drm_fb_xrgb8888_to_xrgb2101010 +ffffffff81958bd0 t drm_fb_xrgb8888_to_xrgb2101010_line +ffffffff81958c50 T drm_fb_xrgb8888_to_gray8 +ffffffff81958cb0 t drm_fb_xrgb8888_to_gray8_line +ffffffff81958d30 T drm_fb_blit +ffffffff81959180 T drm_fb_xrgb8888_to_mono +ffffffff81959510 T drm_fb_build_fourcc_list +ffffffff81959840 t drm_fb_rgb888_to_xrgb8888_line +ffffffff81959910 t drm_fb_rgb565_to_xrgb8888_line +ffffffff8195a000 T drm_mode_legacy_fb_format +ffffffff8195a0f0 T drm_driver_legacy_fb_format +ffffffff8195a1f0 T __drm_format_info +ffffffff8195a270 T drm_format_info +ffffffff8195a330 T drm_get_format_info +ffffffff8195a410 T drm_format_info_block_width +ffffffff8195a460 T drm_format_info_block_height +ffffffff8195a4b0 T drm_format_info_bpp +ffffffff8195a530 T drm_format_info_min_pitch +ffffffff8195b000 T drm_framebuffer_check_src_coords +ffffffff8195b120 T drm_mode_addfb +ffffffff8195b330 T drm_mode_addfb2 +ffffffff8195b420 T drm_mode_addfb_ioctl +ffffffff8195b440 T drm_internal_framebuffer_create +ffffffff8195b960 T drm_mode_addfb2_ioctl +ffffffff8195ba50 T drm_mode_rmfb +ffffffff8195bc20 T drm_framebuffer_lookup +ffffffff8195bc70 t drm_mode_rmfb_work_fn +ffffffff8195bd30 T drm_mode_rmfb_ioctl +ffffffff8195bd50 T drm_mode_getfb +ffffffff8195beb0 T drm_mode_getfb2_ioctl +ffffffff8195c260 T drm_mode_dirtyfb_ioctl +ffffffff8195c400 T drm_fb_release +ffffffff8195c510 T drm_framebuffer_free +ffffffff8195c550 T drm_framebuffer_init +ffffffff8195c6b0 T drm_framebuffer_unregister_private +ffffffff8195c6f0 T drm_framebuffer_cleanup +ffffffff8195c750 T drm_framebuffer_remove +ffffffff8195cc00 T drm_framebuffer_plane_width +ffffffff8195cc50 T drm_framebuffer_plane_height +ffffffff8195cca0 T drm_framebuffer_print_info +ffffffff8195d000 T drm_ref +ffffffff8195d030 T drm_unref +ffffffff8195d0b0 T drm_fault +ffffffff8195d270 T drm_flush +ffffffff8195d2a0 T udv_attach_drm +ffffffff8195d4c0 T drm_gem_init +ffffffff8195d570 t drm_gem_init_release +ffffffff8195d590 T drm_gem_object_init +ffffffff8195d6f0 T drm_gem_private_object_init +ffffffff8195d7f0 T drm_gem_handle_delete +ffffffff8195d8e0 t drm_gem_object_release_handle +ffffffff8195d970 T drm_gem_dumb_map_offset +ffffffff8195daa0 T drm_gem_object_lookup +ffffffff8195db20 T drm_gem_create_mmap_offset +ffffffff8195db50 T drm_gem_dumb_destroy +ffffffff8195db70 T drm_gem_handle_create_tail +ffffffff8195dce0 t drm_gem_object_handle_put_unlocked +ffffffff8195de30 T drm_gem_handle_create +ffffffff8195de80 T drm_gem_free_mmap_offset +ffffffff8195deb0 T drm_gem_create_mmap_offset_size +ffffffff8195dee0 T drm_gem_get_pages +ffffffff8195df30 T drm_gem_put_pages +ffffffff8195df60 T drm_gem_objects_lookup +ffffffff8195e0d0 T drm_gem_dma_resv_wait +ffffffff8195e210 T drm_gem_close_ioctl +ffffffff8195e260 T drm_gem_flink_ioctl +ffffffff8195e3d0 T drm_gem_open_ioctl +ffffffff8195e500 T drm_gem_open +ffffffff8195e530 T drm_gem_release +ffffffff8195e570 T drm_gem_object_release +ffffffff8195e6c0 T drm_gem_lru_remove +ffffffff8195e7a0 T drm_gem_object_free +ffffffff8195e7f0 T drm_gem_mmap_obj +ffffffff8195e900 T drm_gem_mmap +ffffffff8195eb80 T drm_gem_print_info +ffffffff8195eca0 T drm_gem_pin +ffffffff8195ece0 T drm_gem_unpin +ffffffff8195ed20 T drm_gem_vmap +ffffffff8195ed80 T drm_gem_vunmap +ffffffff8195edf0 T drm_gem_lock_reservations +ffffffff8195f060 T drm_gem_unlock_reservations +ffffffff8195f160 T drm_gem_lru_init +ffffffff8195f1a0 T drm_gem_lru_move_tail +ffffffff8195f290 T drm_gem_lru_scan +ffffffff8195f680 t __ww_mutex_lock +ffffffff81960000 T drm_gem_plane_helper_prepare_fb +ffffffff81961000 T drm_gem_fb_destroy +ffffffff819610c0 T drm_gem_fb_create_handle +ffffffff81962000 T drm_ht_create +ffffffff81962080 T drm_ht_verbose_list +ffffffff81962140 T drm_ht_insert_item +ffffffff81962190 T drm_ht_just_insert_please +ffffffff81962260 T drm_ht_find_item +ffffffff819622b0 T drm_ht_remove_key +ffffffff81962300 T drm_ht_remove_item +ffffffff81962350 T drm_ht_remove +ffffffff81963000 T drm_getunique +ffffffff819630a0 T drm_getclient +ffffffff81963120 T drm_noop +ffffffff81963170 T drm_invalid_op +ffffffff819631a0 T drm_version +ffffffff819633c0 T pledge_ioctl_drm +ffffffff81963480 T drm_ioctl_kernel +ffffffff819634d0 T drm_ioctl +ffffffff81963520 T drm_ioctl_flags +ffffffff81963580 T drm_do_ioctl +ffffffff819638d0 T drmioctl +ffffffff81963a20 t drm_getstats +ffffffff81963a70 t drm_setversion +ffffffff81963bd0 t drm_getcap +ffffffff81963dc0 t drm_setclientcap +ffffffff81964000 T tasklet_unlock_wait +ffffffff81964080 T tasklet_unlock_spin_wait +ffffffff81964100 T tasklet_run +ffffffff81964180 T set_current_state +ffffffff81964260 T __set_current_state +ffffffff81964340 T schedule +ffffffff81964360 T schedule_timeout +ffffffff81964510 T schedule_timeout_uninterruptible +ffffffff81964570 T wake_up_process +ffffffff81964590 T flush_workqueue +ffffffff819645d0 T flush_work +ffffffff81964620 T flush_delayed_work +ffffffff819646c0 T kthread_func +ffffffff81964700 T kthread_run +ffffffff819647e0 T kthread_create_worker +ffffffff819648a0 T kthread_destroy_worker +ffffffff819648e0 T kthread_init_work +ffffffff81964900 T kthread_queue_work +ffffffff81964940 T kthread_cancel_work_sync +ffffffff81964980 T kthread_flush_work +ffffffff819649c0 T kthread_flush_worker +ffffffff81964a00 T kthread_lookup +ffffffff81964a80 T kthread_should_park +ffffffff81964b10 T kthread_parkme +ffffffff81964be0 T kthread_park +ffffffff81964cc0 T kthread_unpark +ffffffff81964d20 T kthread_should_stop +ffffffff81964db0 T kthread_stop +ffffffff81964ef0 T dmi_match +ffffffff81964fa0 T dmi_first_match +ffffffff81965080 T dmi_get_system_info +ffffffff819650f0 T dmi_check_system +ffffffff819651f0 T alloc_pages +ffffffff819652c0 T __free_pages +ffffffff819653c0 T __pagevec_release +ffffffff81965470 T kmap +ffffffff819654b0 T kunmap_va +ffffffff819654d0 T kmap_atomic_prot +ffffffff81965560 T kunmap_atomic +ffffffff819655e0 T vmap +ffffffff819656c0 T vunmap +ffffffff81965710 T is_vmalloc_addr +ffffffff81965750 T print_hex_dump +ffffffff81965820 T memchr_inv +ffffffff81965870 T panic_cmp +ffffffff81965890 T linux_root_RB_INSERT_COLOR +ffffffff81965a90 T linux_root_RB_REMOVE_COLOR +ffffffff81965dd0 T linux_root_RB_REMOVE +ffffffff81965f00 T linux_root_RB_INSERT +ffffffff81965f70 T linux_root_RB_FIND +ffffffff81965fc0 T linux_root_RB_NFIND +ffffffff81966010 T linux_root_RB_NEXT +ffffffff81966080 T linux_root_RB_PREV +ffffffff819660f0 T linux_root_RB_MINMAX +ffffffff81966140 T idr_init +ffffffff81966170 T idr_destroy +ffffffff819662b0 T idr_tree_SPLAY_REMOVE +ffffffff81966330 T idr_preload +ffffffff819663c0 T idr_alloc +ffffffff81966560 T idr_tree_SPLAY_INSERT +ffffffff81966600 T idr_replace +ffffffff81966680 T idr_remove +ffffffff81966740 T idr_find +ffffffff819667b0 T idr_get_next +ffffffff819668e0 T idr_for_each +ffffffff819669f0 T idr_cmp +ffffffff81966a30 T idr_tree_SPLAY +ffffffff81966b60 T idr_tree_SPLAY_MINMAX +ffffffff81966c50 T ida_init +ffffffff81966c80 T ida_destroy +ffffffff81966c90 T ida_simple_get +ffffffff81966cb0 T ida_simple_remove +ffffffff81966cd0 T ida_alloc_min +ffffffff81966cf0 T ida_alloc_max +ffffffff81966d10 T ida_free +ffffffff81966d30 T xarray_cmp +ffffffff81966d70 T xarray_tree_SPLAY_INSERT +ffffffff81966e10 T xarray_tree_SPLAY +ffffffff81966f40 T xarray_tree_SPLAY_REMOVE +ffffffff81966fc0 T xarray_tree_SPLAY_MINMAX +ffffffff819670b0 T xa_init_flags +ffffffff81967130 T xa_destroy +ffffffff81967270 T __xa_alloc +ffffffff819673f0 T __xa_alloc_cyclic +ffffffff81967450 T __xa_erase +ffffffff81967510 T __xa_load +ffffffff81967580 T __xa_store +ffffffff81967700 T xa_get_next +ffffffff81967820 T sg_alloc_table +ffffffff819678a0 T sg_free_table +ffffffff81967900 T sg_copy_from_buffer +ffffffff81967930 T i2c_master_xfer +ffffffff81967a60 T __i2c_transfer +ffffffff81967b10 T i2c_transfer +ffffffff81967be0 T i2c_bb_master_xfer +ffffffff81967c80 T i2c_bb_functionality +ffffffff81967cb0 T i2c_bit_add_bus +ffffffff81967cf0 T vga_disable_bridge +ffffffff81967da0 T vga_get_uninterruptible +ffffffff81967df0 T vga_put +ffffffff81967e70 T acpi_get_table +ffffffff81967f40 T acpi_put_table +ffffffff81967f70 T acpi_get_handle +ffffffff81967fc0 T acpi_get_name +ffffffff81968060 T acpi_evaluate_object +ffffffff819682c0 T drm_linux_acpi_notify +ffffffff81968340 T register_acpi_notifier +ffffffff81968380 T unregister_acpi_notifier +ffffffff81968410 T acpi_format_exception +ffffffff81968460 T backlight_do_update_status +ffffffff81968480 T backlight_device_register +ffffffff81968510 T backlight_device_unregister +ffffffff81968530 T devm_backlight_device_register +ffffffff81968580 T backlight_schedule_update_status +ffffffff819685a0 T backlight_enable +ffffffff819685e0 T backlight_disable +ffffffff81968620 T drm_sysfs_hotplug_event +ffffffff81968640 T drm_sysfs_connector_hotplug_event +ffffffff81968660 T drm_sysfs_connector_status_event +ffffffff81968680 T dma_fence_get +ffffffff819686c0 T dma_fence_get_rcu +ffffffff81968700 T dma_fence_get_rcu_safe +ffffffff81968740 T dma_fence_release +ffffffff81968770 T dma_fence_put +ffffffff819687e0 T dma_fence_signal_timestamp_locked +ffffffff819688b0 T dma_fence_signal +ffffffff819689f0 T dma_fence_signal_locked +ffffffff81968b20 T dma_fence_signal_timestamp +ffffffff81968c10 T dma_fence_is_signaled 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get_unused_fd_flags +ffffffff8196c160 T put_unused_fd +ffffffff8196c1f0 T sync_file_get_fence +ffffffff8196c2a0 T sync_file_create +ffffffff8196c340 T drm_firmware_drivers_only +ffffffff8196c370 t dma_fence_stub_get_name +ffffffff8196c3a0 t dma_fence_array_cb_func +ffffffff8196c420 t dma_fence_chain_cb +ffffffff8196c4e0 t dma_fence_chain_timo +ffffffff8196d000 T drmm_kzalloc +ffffffff8196d100 T drmm_kcalloc +ffffffff8196d210 T drmm_kstrdup +ffffffff8196d350 T drmm_kfree +ffffffff8196d450 T drmm_add_action +ffffffff8196d510 T drmm_add_action_or_reset +ffffffff8196d5e0 T drm_managed_release +ffffffff8196d6a0 T drmm_add_final_kfree +ffffffff8196e000 T mipi_dsi_attach +ffffffff8196e050 T mipi_dsi_detach +ffffffff8196e0a0 T devm_mipi_dsi_attach +ffffffff8196e110 T mipi_dsi_packet_format_is_short +ffffffff8196e160 T mipi_dsi_packet_format_is_long +ffffffff8196e1b0 T mipi_dsi_create_packet +ffffffff8196e2c0 T mipi_dsi_shutdown_peripheral +ffffffff8196e370 T mipi_dsi_turn_on_peripheral +ffffffff8196e420 T mipi_dsi_set_maximum_return_packet_size +ffffffff8196e4d0 T mipi_dsi_compression_mode +ffffffff8196e580 T mipi_dsi_picture_parameter_set +ffffffff8196e630 T mipi_dsi_generic_write +ffffffff8196e6f0 T mipi_dsi_generic_read +ffffffff8196e7a0 T mipi_dsi_dcs_write_buffer +ffffffff8196e860 T mipi_dsi_dcs_write +ffffffff8196e9b0 T mipi_dsi_dcs_read +ffffffff8196ea50 T mipi_dsi_dcs_nop +ffffffff8196eb00 T mipi_dsi_dcs_soft_reset +ffffffff8196ebb0 T mipi_dsi_dcs_get_power_mode +ffffffff8196ec70 T mipi_dsi_dcs_get_pixel_format +ffffffff8196ed30 T mipi_dsi_dcs_enter_sleep_mode +ffffffff8196ede0 T mipi_dsi_dcs_exit_sleep_mode +ffffffff8196ee90 T mipi_dsi_dcs_set_display_off +ffffffff8196ef40 T mipi_dsi_dcs_set_display_on +ffffffff8196eff0 T mipi_dsi_dcs_set_column_address +ffffffff8196f0b0 T mipi_dsi_dcs_set_page_address +ffffffff8196f170 T mipi_dsi_dcs_set_tear_off +ffffffff8196f220 T mipi_dsi_dcs_set_tear_on +ffffffff8196f2d0 T mipi_dsi_dcs_set_pixel_format +ffffffff81970000 T __drm_mm_interval_first +ffffffff819700c0 T drm_mm_reserve_node +ffffffff81970370 t add_hole +ffffffff819704d0 T drm_mm_insert_node_in_range +ffffffff81970ac0 T drm_mm_remove_node +ffffffff81970bf0 T drm_mm_replace_node +ffffffff81970dd0 T drm_mm_scan_init_with_range +ffffffff81970e50 T drm_mm_scan_add_block +ffffffff81970fc0 T drm_mm_scan_remove_block +ffffffff81971040 T drm_mm_scan_color_evict +ffffffff81971120 T drm_mm_init +ffffffff819711d0 T drm_mm_takedown +ffffffff81971210 T drm_mm_print +ffffffff81972000 T drm_modeset_register_all +ffffffff819720a0 T drm_modeset_unregister_all +ffffffff819720e0 T drm_mode_getresources +ffffffff81972390 T drm_mode_config_reset +ffffffff819724f0 T drmm_mode_config_init +ffffffff81972b70 T drm_mode_config_cleanup +ffffffff81972eb0 t drm_mode_config_init_release +ffffffff81972ec0 T drm_mode_config_validate +ffffffff81974000 T __drm_mode_object_add +ffffffff81974100 T drm_mode_object_add +ffffffff819741e0 T drm_mode_object_register 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drm_mode_convert_umode +ffffffff81977f00 T drm_mode_is_420_also +ffffffff81977f50 T drm_mode_is_420 +ffffffff81978000 T drm_helper_move_panel_connectors_to_head +ffffffff819780f0 T drm_helper_mode_fill_fb_struct +ffffffff819781b0 T drm_crtc_init +ffffffff81978280 T drm_mode_config_helper_suspend +ffffffff81978310 T drm_mode_config_helper_resume +ffffffff81979000 T drm_modeset_lock_all +ffffffff819791e0 T drm_modeset_acquire_init +ffffffff81979270 T drm_modeset_lock_all_ctx +ffffffff819793e0 T drm_modeset_backoff +ffffffff819794b0 T drm_modeset_acquire_fini +ffffffff819794e0 T drm_warn_on_modeset_not_all_locked +ffffffff81979630 T drm_modeset_unlock_all +ffffffff81979710 T drm_modeset_drop_locks +ffffffff819797a0 T drm_modeset_unlock +ffffffff81979870 t modeset_lock +ffffffff81979b00 T drm_modeset_lock_init +ffffffff81979b60 T drm_modeset_lock +ffffffff81979bc0 T drm_modeset_lock_single_interruptible +ffffffff81979be0 t __ww_mutex_lock +ffffffff8197a000 T drm_mtrr_add +ffffffff8197a070 T drm_mtrr_del +ffffffff8197b000 T drm_panel_init +ffffffff8197b040 T drm_panel_add +ffffffff8197b090 T drm_panel_remove +ffffffff8197b0f0 T drm_panel_prepare +ffffffff8197b140 T drm_panel_unprepare +ffffffff8197b190 T drm_panel_enable +ffffffff8197b230 T drm_panel_disable +ffffffff8197b2c0 T drm_panel_get_modes +ffffffff8197b310 T drm_panel_of_backlight +ffffffff8197c000 T drm_get_panel_orientation_quirk +ffffffff8197d000 T drm_pci_set_busid +ffffffff8197d090 t kasprintf +ffffffff8197e000 T drm_universal_plane_init +ffffffff8197e0f0 t __drm_universal_plane_init +ffffffff8197e7e0 T __drmm_universal_plane_alloc +ffffffff8197e920 t drmm_universal_plane_alloc_release +ffffffff8197e970 T __drm_universal_plane_alloc +ffffffff8197eab0 T drm_plane_register_all +ffffffff8197eba0 T drm_plane_unregister_all +ffffffff8197ec10 T drm_plane_cleanup +ffffffff8197ed60 T drm_plane_from_index +ffffffff8197edc0 T drm_plane_force_disable +ffffffff8197eed0 T drm_mode_plane_set_obj_prop +ffffffff8197ef50 T drm_mode_getplane_res +ffffffff8197f050 T drm_mode_getplane +ffffffff8197f1b0 T drm_plane_check_pixel_format +ffffffff8197f270 T drm_any_plane_has_format +ffffffff8197f3b0 T drm_mode_setplane +ffffffff8197f710 T drm_mode_cursor_ioctl +ffffffff8197f780 t drm_mode_cursor_common +ffffffff8197fe00 T drm_mode_cursor2_ioctl +ffffffff8197fe20 T drm_mode_page_flip_ioctl +ffffffff81980390 T drm_plane_enable_fb_damage_clips +ffffffff819803b0 T drm_plane_get_damage_clips_count +ffffffff819803f0 T __drm_plane_get_damage_clips +ffffffff81980430 T drm_plane_get_damage_clips +ffffffff819804d0 T drm_create_scaling_filter_prop +ffffffff81980620 T drm_plane_create_scaling_filter_property +ffffffff81980690 t kasprintf +ffffffff81980760 t __setplane_internal +ffffffff81980950 t __setplane_check +ffffffff81981000 T drm_plane_helper_update_primary +ffffffff819814b0 t get_connectors_for_crtc +ffffffff819815c0 T drm_plane_helper_disable_primary +ffffffff81981670 T drm_plane_helper_destroy +ffffffff819816a0 T drm_plane_helper_atomic_check +ffffffff81982000 T drm_prime_remove_buf_handle +ffffffff81982090 T drm_prime_init_file_private +ffffffff819820f0 T drm_prime_destroy_file_private +ffffffff81982150 T drm_gem_dmabuf_export +ffffffff819821b0 T drm_gem_dmabuf_release +ffffffff819821f0 T drm_gem_prime_fd_to_handle +ffffffff81982400 T drm_gem_prime_import +ffffffff81982460 t drm_prime_add_buf_handle +ffffffff819825b0 T drm_prime_fd_to_handle_ioctl +ffffffff81982600 T drm_gem_prime_handle_to_fd +ffffffff81982830 T drm_prime_handle_to_fd_ioctl +ffffffff81982890 T drm_gem_map_attach +ffffffff819828b0 T drm_gem_map_detach +ffffffff819828d0 T drm_gem_dmabuf_vmap +ffffffff819828f0 T drm_gem_dmabuf_vunmap +ffffffff81982910 T drm_gem_prime_mmap +ffffffff81982960 T drm_prime_pages_to_sg +ffffffff819829b0 T drm_prime_get_contiguous_size +ffffffff81982a00 T drm_gem_prime_export +ffffffff81982a90 T drm_gem_prime_import_dev +ffffffff81982af0 T drm_prime_sg_to_page_array +ffffffff81982b40 T drm_prime_sg_to_dma_addr_array +ffffffff81982b90 T drm_prime_gem_destroy +ffffffff81983000 T __drm_puts_coredump +ffffffff819830f0 T __drm_printfn_coredump +ffffffff81983210 T __drm_puts_seq_file +ffffffff81983240 T __drm_printfn_seq_file +ffffffff81983270 T __drm_printfn_info +ffffffff819832a0 T __drm_printfn_debug +ffffffff819832d0 T __drm_printfn_err +ffffffff81983310 T drm_puts +ffffffff81983340 T drm_printf +ffffffff819833c0 T drm_print_bits +ffffffff819835e0 T drm_dev_printk +ffffffff81983680 T __drm_dev_dbg +ffffffff81983710 T ___drm_dbg +ffffffff819837a0 T __drm_err +ffffffff81983830 T drm_print_regset32 +ffffffff81984000 T drm_crtc_mode_valid +ffffffff81984050 T drm_encoder_mode_valid +ffffffff81984090 T drm_connector_mode_valid +ffffffff81984110 T drm_kms_helper_poll_enable +ffffffff81984200 T drm_helper_probe_detect +ffffffff819843f0 T drm_helper_probe_single_connector_modes +ffffffff819849b0 t __drm_helper_update_and_validate +ffffffff81984d60 T drm_kms_helper_hotplug_event +ffffffff81984da0 T drm_kms_helper_connector_hotplug_event +ffffffff81984de0 T drm_kms_helper_is_poll_worker +ffffffff81984e10 T drm_kms_helper_poll_disable +ffffffff81984e90 T drm_kms_helper_poll_init +ffffffff81984ef0 t output_poll_execute +ffffffff81985180 T drm_kms_helper_poll_fini +ffffffff81985200 T drm_connector_helper_hpd_irq_event +ffffffff819852d0 t check_connector_changed +ffffffff819854b0 T drm_helper_hpd_irq_event +ffffffff81985600 T drm_crtc_helper_mode_valid_fixed +ffffffff81985650 T drm_connector_helper_get_modes_from_ddc +ffffffff819856e0 T drm_connector_helper_get_modes_fixed +ffffffff81985850 T drm_connector_helper_get_modes +ffffffff819858b0 t __delayed_work_tick +ffffffff81986000 T drm_property_create +ffffffff81986200 T drm_property_create_enum +ffffffff819862b0 T drm_property_add_enum +ffffffff819864d0 T drm_property_destroy +ffffffff81986580 T drm_property_create_bitmask +ffffffff819866b0 T drm_property_create_range +ffffffff81986720 T drm_property_create_signed_range +ffffffff81986790 T drm_property_create_object +ffffffff81986830 T drm_property_create_bool +ffffffff81986890 T drm_mode_getproperty_ioctl +ffffffff81986aa0 T drm_property_create_blob +ffffffff81986be0 t drm_property_free_blob +ffffffff81986c60 T drm_property_blob_put +ffffffff81986ca0 T drm_property_destroy_user_blobs +ffffffff81986d20 T drm_property_blob_get +ffffffff81986d60 T drm_property_lookup_blob +ffffffff81986d80 T drm_property_replace_global_blob +ffffffff81986ed0 T drm_property_replace_blob +ffffffff81986f40 T drm_mode_getblob_ioctl +ffffffff81987000 T drm_mode_createblob_ioctl +ffffffff81987100 T drm_mode_destroyblob_ioctl +ffffffff81987210 T drm_property_change_valid_get +ffffffff81987460 T drm_property_change_valid_put +ffffffff81988000 T drm_rect_intersect +ffffffff81988080 T drm_rect_clip_scaled +ffffffff819882f0 T drm_rect_calc_hscale +ffffffff819883c0 T drm_rect_calc_vscale +ffffffff81988490 T drm_rect_debug_print +ffffffff819885b0 T drm_rect_rotate +ffffffff81988670 T drm_rect_rotate_inv +ffffffff81989000 T drm_self_refresh_helper_update_avg_times +ffffffff81989140 T drm_self_refresh_helper_alter_state +ffffffff819892d0 T drm_self_refresh_helper_init +ffffffff81989480 t drm_self_refresh_helper_entry_work +ffffffff819895e0 T drm_self_refresh_helper_cleanup +ffffffff81989660 t __delayed_work_tick +ffffffff8198a000 T drm_syncobj_find +ffffffff8198a070 T drm_syncobj_add_point +ffffffff8198a160 t syncobj_wait_syncobj_func +ffffffff8198a210 T drm_syncobj_replace_fence +ffffffff8198a2a0 T drm_syncobj_find_fence +ffffffff8198a600 t drm_syncobj_fence_add_wait +ffffffff8198a6d0 T drm_syncobj_free +ffffffff8198a760 T drm_syncobj_create +ffffffff8198a970 T drm_syncobj_get_handle +ffffffff8198aa90 T drm_syncobj_get_fd +ffffffff8198aae0 T drm_syncobj_open +ffffffff8198ab10 T drm_syncobj_release +ffffffff8198ab50 t drm_syncobj_release_handle +ffffffff8198ac00 T drm_syncobj_create_ioctl +ffffffff8198ad30 T drm_syncobj_destroy_ioctl +ffffffff8198ae50 T drm_syncobj_handle_to_fd_ioctl +ffffffff8198b040 T drm_syncobj_fd_to_handle_ioctl +ffffffff8198b230 T drm_syncobj_transfer_ioctl +ffffffff8198b650 T drm_timeout_abs_to_jiffies +ffffffff8198b730 T drm_syncobj_wait_ioctl +ffffffff8198b8c0 t drm_syncobj_array_find +ffffffff8198baf0 t drm_syncobj_array_free +ffffffff8198bbd0 T drm_syncobj_timeline_wait_ioctl +ffffffff8198bd60 T drm_syncobj_reset_ioctl +ffffffff8198bec0 T drm_syncobj_signal_ioctl +ffffffff8198c050 T drm_syncobj_timeline_signal_ioctl +ffffffff8198c280 T drm_syncobj_query_ioctl +ffffffff8198c480 t drm_syncobj_array_wait_timeout +ffffffff8198c8f0 t syncobj_wait_fence_func +ffffffff8198d000 T drm_vblank_count +ffffffff8198d090 T drm_crtc_accurate_vblank_count +ffffffff8198d1a0 t drm_update_vblank_count +ffffffff8198d5f0 T drm_vblank_disable_and_save +ffffffff8198d740 T drm_vblank_init +ffffffff8198d8c0 t vblank_disable_fn +ffffffff8198d940 t drm_vblank_init_release +ffffffff8198d9d0 T drm_dev_has_vblank +ffffffff8198da00 T drm_crtc_vblank_waitqueue +ffffffff8198da50 T drm_calc_timestamping_constants +ffffffff8198dc80 T drm_crtc_vblank_helper_get_vblank_timestamp_internal +ffffffff8198e1b0 T drm_crtc_vblank_helper_get_vblank_timestamp +ffffffff8198e1d0 T drm_crtc_vblank_count +ffffffff8198e260 T drm_crtc_vblank_count_and_time +ffffffff8198e320 T drm_crtc_arm_vblank_event +ffffffff8198e400 T drm_crtc_send_vblank_event +ffffffff8198e5b0 T drm_vblank_get +ffffffff8198e6d0 t drm_vblank_enable +ffffffff8198e890 T drm_crtc_vblank_get +ffffffff8198e9a0 T drm_vblank_put +ffffffff8198ead0 T drm_crtc_vblank_put +ffffffff8198eaf0 T drm_wait_one_vblank +ffffffff8198ef40 T drm_crtc_wait_one_vblank +ffffffff8198ef60 T drm_crtc_vblank_off +ffffffff8198f350 T drm_crtc_vblank_reset +ffffffff8198f480 T drm_crtc_set_max_vblank_count +ffffffff8198f560 T drm_crtc_vblank_on +ffffffff8198f6b0 t drm_reset_vblank_timestamp +ffffffff8198f8b0 T drm_crtc_vblank_restore +ffffffff8198fc90 T drm_legacy_modeset_ctl_ioctl +ffffffff8198feb0 T drm_wait_vblank_ioctl +ffffffff819908f0 T drm_handle_vblank +ffffffff81990be0 t drm_handle_vblank_events +ffffffff81990e70 T drm_crtc_handle_vblank +ffffffff81990e90 T drm_crtc_get_sequence_ioctl +ffffffff81991080 T drm_crtc_queue_sequence_ioctl +ffffffff81991450 t __get_vblank_counter +ffffffff81992000 T drm_handle_vblank_works +ffffffff819921b0 T drm_vblank_cancel_pending_works +ffffffff819922f0 T drm_vblank_work_schedule +ffffffff81992570 T drm_vblank_work_cancel_sync +ffffffff819926d0 T drm_vblank_work_flush +ffffffff819927a0 T drm_vblank_work_init +ffffffff81992810 T drm_vblank_worker_init +ffffffff81993000 T drm_vma_offset_manager_init +ffffffff81993040 T drm_vma_offset_manager_destroy +ffffffff81993060 T drm_vma_offset_lookup_locked +ffffffff819930f0 T drm_vma_offset_add +ffffffff81993180 T drm_vma_offset_remove +ffffffff819931d0 T drm_vma_node_allow +ffffffff819931f0 t vma_node_allow +ffffffff81993320 T drm_vma_node_allow_once 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hdmi_drm_infoframe_pack_only +ffffffff81994ff0 T hdmi_drm_infoframe_pack +ffffffff81995040 T hdmi_infoframe_check +ffffffff819951a0 T hdmi_infoframe_pack_only +ffffffff819953c0 T hdmi_infoframe_pack +ffffffff81995530 T hdmi_infoframe_log +ffffffff819964d0 T hdmi_drm_infoframe_unpack_only +ffffffff819965b0 T hdmi_infoframe_unpack +ffffffff81997000 T list_sort +ffffffff81998000 T radix_tree_lookup +ffffffff819980b0 T radix_tree_iter_find +ffffffff819981a0 T radix_tree_delete +ffffffff81998340 T radix_tree_iter_delete +ffffffff81998360 T radix_tree_insert +ffffffff81999000 T sort +ffffffff81999040 t qsort +ffffffff8199b000 T drm_dp_dual_mode_read +ffffffff8199b110 T drm_dp_dual_mode_write +ffffffff8199b1f0 T drm_dp_dual_mode_detect +ffffffff8199b4a0 T drm_dp_dual_mode_max_tmds_clock +ffffffff8199b5d0 T drm_dp_dual_mode_get_tmds_output +ffffffff8199b700 T drm_dp_dual_mode_set_tmds_output +ffffffff8199b990 T drm_dp_get_dual_mode_type_name +ffffffff8199ba00 T drm_lspcon_get_mode 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drm_dp_lttpr_link_train_clock_recovery_delay +ffffffff8199c7f0 T drm_dp_lttpr_link_train_channel_eq_delay +ffffffff8199c860 T drm_dp_link_rate_to_bw_code +ffffffff8199c8d0 T drm_dp_bw_code_to_link_rate +ffffffff8199c930 T drm_dp_dpcd_probe +ffffffff8199ca70 t drm_dp_dpcd_access +ffffffff8199cba0 T drm_dp_dpcd_read +ffffffff8199ccd0 T drm_dp_dpcd_write +ffffffff8199cde0 T drm_dp_dpcd_read_link_status +ffffffff8199ce00 T drm_dp_dpcd_read_phy_link_status +ffffffff8199cf00 T drm_dp_downstream_is_type +ffffffff8199cf40 T drm_dp_downstream_is_tmds +ffffffff8199cfb0 T drm_dp_send_real_edid_checksum +ffffffff8199d210 T drm_dp_read_dpcd_caps +ffffffff8199d3a0 T drm_dp_read_downstream_info +ffffffff8199d4a0 T drm_dp_downstream_max_dotclock +ffffffff8199d4f0 T drm_dp_downstream_max_tmds_clock +ffffffff8199d590 T drm_dp_downstream_min_tmds_clock +ffffffff8199d610 T drm_dp_downstream_max_bpc +ffffffff8199d6b0 T drm_dp_downstream_420_passthrough +ffffffff8199d710 T drm_dp_downstream_444_to_420_conversion +ffffffff8199d770 T drm_dp_downstream_rgb_to_ycbcr_conversion +ffffffff8199d7d0 T drm_dp_downstream_mode +ffffffff8199d860 T drm_dp_downstream_id +ffffffff8199d880 T drm_dp_downstream_debug +ffffffff8199d920 T drm_dp_subconnector_type +ffffffff8199d990 T drm_dp_set_subconnector_property +ffffffff8199da00 T drm_dp_read_sink_count_cap +ffffffff8199da50 T drm_dp_read_sink_count +ffffffff8199dab0 T drm_dp_remote_aux_init +ffffffff8199dae0 t drm_dp_aux_crc_work +ffffffff8199dc60 T drm_dp_aux_init +ffffffff8199dd10 T drm_dp_aux_register +ffffffff8199de30 T drm_dp_aux_unregister +ffffffff8199de60 T drm_dp_psr_setup_time +ffffffff8199deb0 T drm_dp_start_crc +ffffffff8199df60 T drm_dp_stop_crc +ffffffff8199dff0 T drm_dp_read_desc +ffffffff8199e1b0 T drm_dp_dsc_sink_max_slice_count +ffffffff8199e240 T drm_dp_dsc_sink_line_buf_depth +ffffffff8199e280 T drm_dp_dsc_sink_supported_input_bpcs +ffffffff8199e2f0 T drm_dp_read_lttpr_common_caps +ffffffff8199e3b0 T drm_dp_read_lttpr_phy_caps +ffffffff8199e470 T drm_dp_lttpr_count +ffffffff8199e500 T drm_dp_lttpr_max_link_rate +ffffffff8199e560 T drm_dp_lttpr_max_lane_count +ffffffff8199e590 T drm_dp_lttpr_voltage_swing_level_3_supported +ffffffff8199e5c0 T drm_dp_lttpr_pre_emphasis_level_3_supported +ffffffff8199e5f0 T drm_dp_get_phy_test_pattern +ffffffff8199e710 T drm_dp_set_phy_test_pattern +ffffffff8199e7e0 T drm_dp_vsc_sdp_log +ffffffff8199eb10 T drm_dp_get_pcon_max_frl_bw +ffffffff8199eb60 T drm_dp_pcon_frl_prepare +ffffffff8199ebb0 T drm_dp_pcon_is_frl_ready +ffffffff8199ec00 T drm_dp_pcon_frl_configure_1 +ffffffff8199ed00 T drm_dp_pcon_frl_configure_2 +ffffffff8199ed60 T drm_dp_pcon_reset_frl_config +ffffffff8199edb0 T drm_dp_pcon_frl_enable +ffffffff8199ee70 T drm_dp_pcon_hdmi_link_active +ffffffff8199eec0 T drm_dp_pcon_hdmi_link_mode +ffffffff8199ef30 T drm_dp_pcon_hdmi_frl_link_error_count +ffffffff8199f030 T drm_dp_pcon_enc_is_dsc_1_2 +ffffffff8199f060 T drm_dp_pcon_dsc_max_slices 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drm_dp_encode_sideband_req +ffffffff819a1420 T drm_dp_decode_sideband_req +ffffffff819a1970 T drm_dp_dump_sideband_msg_req_body +ffffffff819a1d30 T drm_dp_mst_get_port_malloc +ffffffff819a1d80 T drm_dp_mst_put_port_malloc +ffffffff819a1e80 t kref_put +ffffffff819a1ec0 T drm_atomic_get_mst_payload_state +ffffffff819a1f20 T drm_dp_mst_dpcd_read +ffffffff819a21e0 T drm_dp_mst_dpcd_write +ffffffff819a2230 t drm_dp_send_dpcd_write +ffffffff819a2470 T drm_dp_mst_connector_late_register +ffffffff819a24f0 T drm_dp_mst_connector_early_unregister +ffffffff819a2530 T drm_dp_send_power_updown_phy +ffffffff819a2770 t drm_dp_mst_topology_put_port +ffffffff819a28a0 t drm_dp_mst_wait_tx_reply +ffffffff819a2bf0 T drm_dp_send_query_stream_enc_status +ffffffff819a2eb0 T drm_dp_add_payload_part1 +ffffffff819a3060 T drm_dp_remove_payload +ffffffff819a3200 T drm_dp_add_payload_part2 +ffffffff819a33c0 T drm_dp_get_vc_payload_bw +ffffffff819a3460 T drm_dp_read_mst_cap +ffffffff819a34c0 T drm_dp_mst_topology_mgr_set_mst +ffffffff819a3780 t drm_dp_dpcd_write_payload +ffffffff819a3910 t drm_dp_mst_topology_put_mstb +ffffffff819a3a10 T drm_dp_mst_topology_mgr_suspend +ffffffff819a3ad0 t drm_dp_mst_topology_mgr_invalidate_mstb +ffffffff819a3b40 T drm_dp_mst_topology_mgr_resume +ffffffff819a3d80 T drm_dp_mst_hpd_irq +ffffffff819a4bf0 T drm_dp_mst_detect_port +ffffffff819a4d70 T drm_dp_mst_get_edid +ffffffff819a4e80 T drm_dp_atomic_find_time_slots +ffffffff819a5150 T drm_atomic_get_mst_topology_state +ffffffff819a5160 T drm_dp_atomic_release_time_slots +ffffffff819a5380 T drm_dp_mst_atomic_setup_commit +ffffffff819a5510 T drm_dp_mst_atomic_wait_for_dependencies +ffffffff819a5690 T drm_dp_mst_root_conn_atomic_check +ffffffff819a57b0 T drm_dp_mst_update_slots +ffffffff819a5810 T drm_dp_check_act_status +ffffffff819a59c0 T drm_dp_calc_pbn_mode +ffffffff819a5a30 T drm_dp_mst_dump_topology +ffffffff819a5c80 t drm_dp_mst_dump_mstb +ffffffff819a5cf0 T drm_dp_mst_add_affected_dsc_crtcs +ffffffff819a5e20 T drm_dp_mst_dsc_aux_for_port +ffffffff819a6050 T drm_dp_mst_atomic_enable_dsc +ffffffff819a61f0 T drm_dp_mst_atomic_check +ffffffff819a64e0 t drm_dp_mst_atomic_check_mstb_bw_limit +ffffffff819a67b0 t drm_dp_mst_duplicate_state +ffffffff819a6980 t drm_dp_mst_destroy_state +ffffffff819a6a40 T drm_atomic_get_old_mst_topology_state +ffffffff819a6a50 T drm_atomic_get_new_mst_topology_state +ffffffff819a6a60 T drm_dp_mst_topology_mgr_init +ffffffff819a6cd0 t drm_dp_mst_link_probe_work +ffffffff819a6f70 t drm_dp_tx_work +ffffffff819a6fc0 t drm_dp_delayed_destroy_work +ffffffff819a73e0 t drm_dp_mst_up_req_work +ffffffff819a78f0 T drm_dp_mst_topology_mgr_destroy +ffffffff819a7980 t drm_dp_mst_is_virtual_dpcd +ffffffff819a7a60 t drm_dp_free_mst_branch_device +ffffffff819a7aa0 t drm_dp_mst_topology_get_port_validated_locked +ffffffff819a7b20 t drm_dp_mst_dump_sideband_msg_tx +ffffffff819a7d30 t process_single_down_tx_qlock +ffffffff819a7ea0 t process_single_tx_qlock +ffffffff819a8380 t drm_dp_msg_data_crc4 +ffffffff819a84a0 t drm_dp_payload_send_msg +ffffffff819a88f0 t drm_dp_mst_topology_get_mstb_validated_locked +ffffffff819a8970 t drm_dp_get_one_sb_msg +ffffffff819a9090 t drm_dp_get_mst_branch_device +ffffffff819a9200 t drm_dp_check_and_send_link_address +ffffffff819a92d0 t drm_dp_send_link_address +ffffffff819a9f80 t drm_dp_send_enum_path_resources +ffffffff819aa1e0 t drm_dp_port_set_pdt +ffffffff819aa4c0 t drm_dp_mst_port_add_connector +ffffffff819aa6a0 t drm_dp_mst_i2c_xfer +ffffffff819aada0 t drm_dp_mst_i2c_functionality +ffffffff819aadd0 t get_mst_branch_device_by_guid_helper +ffffffff819ab000 T drm_dsc_dp_pps_header_init +ffffffff819ab030 T drm_dsc_dp_rc_buffer_size +ffffffff819ab090 T drm_dsc_pps_payload_pack +ffffffff819ab330 T drm_dsc_compute_rc_parameters +ffffffff819ac000 T drm_connector_attach_content_protection_property +ffffffff819ac030 T drm_hdcp_check_ksvs_revoked +ffffffff819ac080 T drm_hdcp_update_content_protection +ffffffff819ad000 T drm_hdmi_infoframe_set_hdr_metadata +ffffffff819ad120 T drm_hdmi_avi_infoframe_colorimetry +ffffffff819ad170 T drm_hdmi_avi_infoframe_bars +ffffffff819ad1c0 T drm_hdmi_avi_infoframe_content_type +ffffffff819ae000 T drm_scdc_read +ffffffff819ae090 T drm_scdc_write +ffffffff819ae170 T drm_scdc_get_scrambling_status +ffffffff819ae230 T drm_scdc_set_scrambling +ffffffff819ae380 T drm_scdc_set_high_tmds_clock_ratio +ffffffff819af000 T drm_gem_ttm_mmap +ffffffff819af070 T drm_gem_ttm_vmap +ffffffff819af080 T drm_gem_ttm_vunmap +ffffffff819b0000 T ttm_agp_bind +ffffffff819b0050 T ttm_agp_unbind +ffffffff819b0070 T ttm_agp_is_bound +ffffffff819b00c0 T ttm_agp_destroy +ffffffff819b00e0 T ttm_agp_tt_create +ffffffff819b1000 T ttm_bo_move_to_lru_tail +ffffffff819b1040 T ttm_bo_set_bulk_move +ffffffff819b1100 T ttm_bo_delayed_delete +ffffffff819b13f0 t ttm_bo_cleanup_refs +ffffffff819b17a0 T ttm_bo_put +ffffffff819b1ce0 T ttm_bo_lock_delayed_workqueue +ffffffff819b1d60 T ttm_bo_unlock_delayed_workqueue +ffffffff819b1dd0 T ttm_bo_eviction_valuable +ffffffff819b1e20 T ttm_mem_evict_first +ffffffff819b26e0 T ttm_bo_pin +ffffffff819b2780 T ttm_bo_unpin +ffffffff819b2890 T ttm_bo_mem_space +ffffffff819b2ae0 t ttm_bo_add_move_fence +ffffffff819b2ba0 T ttm_bo_validate +ffffffff819b2d20 T ttm_bo_init_reserved +ffffffff819b2fc0 T ttm_bo_init_validate +ffffffff819b3130 T ttm_bo_unmap_virtual +ffffffff819b3250 T ttm_bo_wait +ffffffff819b32d0 T ttm_bo_swapout +ffffffff819b36f0 t ttm_bo_handle_move_mem +ffffffff819b3860 T ttm_bo_tt_destroy +ffffffff819b4000 T ttm_mem_io_reserve +ffffffff819b4060 T ttm_mem_io_free +ffffffff819b40d0 T ttm_move_memcpy +ffffffff819b4290 T ttm_bo_move_memcpy +ffffffff819b44c0 T ttm_bo_move_sync_cleanup +ffffffff819b45b0 T ttm_io_prot +ffffffff819b45f0 T ttm_bo_kmap +ffffffff819b48a0 T ttm_bo_kunmap +ffffffff819b49e0 T ttm_bo_vmap +ffffffff819b4bd0 T ttm_bo_vunmap +ffffffff819b4cc0 T ttm_bo_move_accel_cleanup +ffffffff819b4f80 T ttm_bo_pipeline_gutting +ffffffff819b5220 t ttm_buffer_object_transfer +ffffffff819b5470 t ttm_transfered_destroy +ffffffff819b6000 T ttm_bo_vm_reserve +ffffffff819b6250 T ttm_bo_vm_fault_reserved +ffffffff819b6570 T ttm_bo_vm_fault +ffffffff819b66d0 T ttm_bo_vm_reference +ffffffff819b6700 T ttm_bo_vm_detach +ffffffff819b6710 T ttm_bo_mmap_obj +ffffffff819b7000 T ttm_global_swapout +ffffffff819b7100 T ttm_device_swapout +ffffffff819b7220 T ttm_device_init +ffffffff819b7470 t ttm_device_delayed_workqueue +ffffffff819b7510 T ttm_device_fini +ffffffff819b76f0 T ttm_device_clear_dma_mappings +ffffffff819b77a0 t ttm_device_clear_lru_dma_mappings +ffffffff819b7850 t __delayed_work_tick +ffffffff819b8000 T ttm_eu_backoff_reservation +ffffffff819b8130 T ttm_eu_reserve_buffers +ffffffff819b8530 T ttm_eu_fence_buffer_objects +ffffffff819b8680 t __ww_mutex_lock +ffffffff819b9000 T ttm_prot_from_caching +ffffffff819ba000 T ttm_pool_alloc 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drm_sched_entity_clear_dep +ffffffff819c1e50 t drm_sched_entity_wakeup +ffffffff819c2000 T drm_sched_fence_slab_init +ffffffff819c2060 T drm_sched_fence_slab_fini +ffffffff819c2080 T drm_sched_fence_scheduled +ffffffff819c2090 T drm_sched_fence_finished +ffffffff819c20b0 T drm_sched_fence_free +ffffffff819c2160 T to_drm_sched_fence +ffffffff819c21c0 T drm_sched_fence_alloc +ffffffff819c2240 T drm_sched_fence_init +ffffffff819c22c0 t drm_sched_fence_get_driver_name +ffffffff819c22f0 t drm_sched_fence_get_timeline_name +ffffffff819c2340 t drm_sched_fence_release_scheduled +ffffffff819c2440 t drm_sched_fence_release_finished +ffffffff819c3000 T drm_sched_rq_add_entity +ffffffff819c3090 T drm_sched_rq_remove_entity +ffffffff819c3130 T drm_sched_dependency_optimized +ffffffff819c31d0 T drm_sched_fault +ffffffff819c3200 T drm_sched_suspend_timeout +ffffffff819c3280 T drm_sched_resume_timeout +ffffffff819c3320 T drm_sched_increase_karma +ffffffff819c3340 T drm_sched_increase_karma_ext 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T intel_attach_dp_colorspace_property +ffffffff819fe000 T intel_crt_port_enabled +ffffffff819fe080 T intel_crt_reset +ffffffff819fe170 T intel_crt_init +ffffffff819fe5a0 t hsw_crt_get_config +ffffffff819fe650 t hsw_crt_compute_config +ffffffff819fe740 t hsw_pre_pll_enable_crt +ffffffff819fe7b0 t hsw_pre_enable_crt +ffffffff819fe850 t hsw_enable_crt +ffffffff819fea20 t hsw_disable_crt +ffffffff819fea90 t hsw_post_disable_crt +ffffffff819fec30 t pch_crt_compute_config +ffffffff819fec80 t pch_disable_crt +ffffffff819fecb0 t pch_post_disable_crt +ffffffff819feda0 t intel_crt_compute_config +ffffffff819fedf0 t intel_disable_crt +ffffffff819feee0 t intel_crt_get_config +ffffffff819fef90 t intel_crt_get_hw_state +ffffffff819ff050 t intel_enable_crt +ffffffff819ff140 t intel_spurious_crt_detect_dmi_callback +ffffffff819ff1a0 t intel_crt_get_modes +ffffffff819ff2b0 t intel_crt_detect +ffffffff819ffda0 t intel_crt_mode_valid +ffffffff819ffe90 t intel_crt_get_edid +ffffffff819fff30 t intel_crt_detect_ddc +ffffffff81a00000 T intel_first_crtc +ffffffff81a00020 T intel_crtc_for_pipe +ffffffff81a00080 T intel_crtc_wait_for_next_vblank +ffffffff81a00090 T intel_wait_for_vblank_if_active +ffffffff81a00100 T intel_crtc_get_vblank_counter +ffffffff81a00180 T intel_crtc_max_vblank_count +ffffffff81a00220 T intel_crtc_vblank_on +ffffffff81a00300 T intel_crtc_vblank_off +ffffffff81a003a0 T intel_crtc_state_alloc +ffffffff81a00440 T intel_crtc_state_reset +ffffffff81a004c0 T intel_crtc_init +ffffffff81a00800 T intel_wait_for_vblank_workers +ffffffff81a008c0 T intel_usecs_to_scanlines +ffffffff81a00910 T intel_pipe_update_start +ffffffff81a00e10 T intel_pipe_update_end +ffffffff81a01110 t intel_crtc_destroy +ffffffff81a01140 t intel_crtc_late_register +ffffffff81a01170 t intel_crtc_vblank_work +ffffffff81a02000 T intel_crtc_state_dump +ffffffff81a04000 T intel_cursor_plane_create +ffffffff81a04200 t i845_cursor_max_stride +ffffffff81a04230 t i845_cursor_update_arm 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intel_ddi_enable_pipe_clock +ffffffff81a07340 T intel_ddi_disable_pipe_clock +ffffffff81a073b0 T intel_ddi_level +ffffffff81a07580 T icl_ddi_combo_get_pll +ffffffff81a07600 T hsw_ddi_enable_clock +ffffffff81a076c0 T hsw_ddi_disable_clock +ffffffff81a07700 T hsw_ddi_is_clock_enabled +ffffffff81a07760 T intel_ddi_enable_clock +ffffffff81a077a0 T intel_ddi_disable_clock +ffffffff81a077e0 T intel_ddi_sanitize_encoder_pll_mapping +ffffffff81a079c0 T dp_tp_ctl_reg +ffffffff81a07a40 T dp_tp_status_reg +ffffffff81a07ac0 T intel_ddi_update_pipe +ffffffff81a07b50 T intel_ddi_compute_min_voltage_level +ffffffff81a07bc0 T intel_ddi_get_clock +ffffffff81a07cd0 T hsw_ddi_get_config +ffffffff81a07dc0 t intel_ddi_get_config +ffffffff81a08630 T intel_ddi_init +ffffffff81a091d0 t intel_ddi_hotplug +ffffffff81a09600 t intel_ddi_compute_output_type +ffffffff81a09680 t intel_ddi_compute_config +ffffffff81a097c0 t intel_ddi_compute_config_late +ffffffff81a09a70 t intel_enable_ddi +ffffffff81a0a250 t intel_ddi_pre_pll_enable +ffffffff81a0a3c0 t intel_ddi_pre_enable +ffffffff81a0b090 t intel_disable_ddi +ffffffff81a0b210 t intel_ddi_post_disable +ffffffff81a0b730 t intel_ddi_sync_state +ffffffff81a0b7e0 t intel_ddi_initial_fastset_check +ffffffff81a0b8a0 t intel_ddi_encoder_suspend +ffffffff81a0b950 t intel_ddi_encoder_shutdown +ffffffff81a0ba10 t intel_ddi_get_power_domains +ffffffff81a0bbc0 t dg2_ddi_get_config +ffffffff81a0bc10 t adls_ddi_enable_clock +ffffffff81a0bd90 t adls_ddi_disable_clock +ffffffff81a0be50 t adls_ddi_is_clock_enabled +ffffffff81a0bef0 t adls_ddi_get_config +ffffffff81a0bfb0 t rkl_ddi_enable_clock +ffffffff81a0c140 t rkl_ddi_disable_clock +ffffffff81a0c1e0 t rkl_ddi_is_clock_enabled +ffffffff81a0c260 t rkl_ddi_get_config +ffffffff81a0c330 t dg1_ddi_enable_clock +ffffffff81a0c4f0 t dg1_ddi_disable_clock +ffffffff81a0c5b0 t dg1_ddi_is_clock_enabled +ffffffff81a0c650 t dg1_ddi_get_config +ffffffff81a0c720 t jsl_ddi_tc_enable_clock +ffffffff81a0c7c0 t jsl_ddi_tc_disable_clock +ffffffff81a0c880 t jsl_ddi_tc_is_clock_enabled +ffffffff81a0c930 t icl_ddi_combo_get_config +ffffffff81a0c9e0 t icl_ddi_combo_enable_clock +ffffffff81a0cb40 t icl_ddi_combo_disable_clock +ffffffff81a0cbe0 t icl_ddi_combo_is_clock_enabled +ffffffff81a0cc60 t icl_ddi_tc_enable_clock +ffffffff81a0ce40 t icl_ddi_tc_disable_clock +ffffffff81a0cf20 t icl_ddi_tc_is_clock_enabled +ffffffff81a0cfe0 t icl_ddi_tc_get_config +ffffffff81a0d220 t bxt_ddi_get_config +ffffffff81a0d290 t skl_ddi_enable_clock +ffffffff81a0d3a0 t skl_ddi_disable_clock +ffffffff81a0d430 t skl_ddi_is_clock_enabled +ffffffff81a0d4a0 t skl_ddi_get_config +ffffffff81a0d530 t icl_combo_phy_set_signal_levels +ffffffff81a0e000 t tgl_dkl_phy_set_signal_levels +ffffffff81a0e300 t icl_mg_phy_set_signal_levels +ffffffff81a0ec30 t hsw_set_signal_levels +ffffffff81a0efa0 t intel_ddi_update_prepare +ffffffff81a0f120 t intel_ddi_update_complete +ffffffff81a0f160 t lpt_digital_port_connected +ffffffff81a0f1d0 t bdw_digital_port_connected +ffffffff81a0f240 t hsw_digital_port_connected +ffffffff81a0f2b0 t intel_ddi_encoder_reset +ffffffff81a0f2f0 t intel_ddi_encoder_destroy +ffffffff81a0f3a0 t icl_program_mg_dp_mode +ffffffff81a0f630 t intel_ddi_init_dp_buf_reg +ffffffff81a0f7f0 t intel_disable_ddi_buf +ffffffff81a0fb10 t intel_ddi_prepare_link_retrain +ffffffff81a10180 t intel_ddi_set_link_train +ffffffff81a102e0 t intel_ddi_set_idle_link_train +ffffffff81a10500 t intel_ddi_dp_voltage_max +ffffffff81a105c0 t intel_ddi_dp_preemph_max +ffffffff81a11000 T is_hobl_buf_trans +ffffffff81a11040 T intel_ddi_buf_trans_init +ffffffff81a11300 t dg2_get_snps_buf_trans +ffffffff81a11370 t adlp_get_combo_buf_trans +ffffffff81a114a0 t adlp_get_dkl_buf_trans +ffffffff81a11500 t adls_get_combo_buf_trans +ffffffff81a11630 t rkl_get_combo_buf_trans +ffffffff81a11760 t dg1_get_combo_buf_trans +ffffffff81a11890 t tgl_get_combo_buf_trans +ffffffff81a119e0 t tgl_get_dkl_buf_trans +ffffffff81a11a40 t jsl_get_combo_buf_trans +ffffffff81a11af0 t ehl_get_combo_buf_trans +ffffffff81a11ba0 t icl_get_combo_buf_trans +ffffffff81a11c50 t icl_get_mg_buf_trans +ffffffff81a11cb0 t bxt_get_buf_trans +ffffffff81a11d40 t kbl_y_get_buf_trans +ffffffff81a11df0 t kbl_u_get_buf_trans +ffffffff81a11ea0 t kbl_get_buf_trans +ffffffff81a11f50 t skl_y_get_buf_trans +ffffffff81a12000 t skl_u_get_buf_trans +ffffffff81a120b0 t skl_get_buf_trans +ffffffff81a12160 t bdw_get_buf_trans +ffffffff81a12200 t hsw_get_buf_trans +ffffffff81a13000 T intel_update_watermarks +ffffffff81a13040 T vlv_get_hpll_vco +ffffffff81a13090 T vlv_get_cck_clock +ffffffff81a13140 T vlv_get_cck_clock_hpll +ffffffff81a13240 T is_trans_port_sync_mode +ffffffff81a13280 T intel_crtc_bigjoiner_slave_pipes +ffffffff81a132e0 T intel_crtc_is_bigjoiner_slave +ffffffff81a13340 T intel_crtc_is_bigjoiner_master +ffffffff81a133a0 T intel_master_crtc +ffffffff81a13440 T assert_transcoder +ffffffff81a135f0 T vlv_wait_port_ready +ffffffff81a13740 T intel_enable_transcoder +ffffffff81a13a30 T intel_disable_transcoder +ffffffff81a13d30 T intel_rotation_info_size +ffffffff81a13d80 T intel_remapped_info_size +ffffffff81a13eb0 T intel_plane_uses_fence +ffffffff81a13f00 T intel_fb_xy_to_linear +ffffffff81a13f50 T intel_add_fb_offsets +ffffffff81a13fa0 T intel_plane_fb_max_stride +ffffffff81a14020 T intel_set_plane_visible +ffffffff81a14070 T intel_plane_fixup_bitmasks +ffffffff81a14120 T intel_plane_disable_noatomic +ffffffff81a14310 T intel_plane_fence_y_offset +ffffffff81a14370 T intel_display_prepare_reset +ffffffff81a14550 T intel_display_finish_reset +ffffffff81a14750 t __intel_display_resume +ffffffff81a14860 T intel_modeset_init_hw +ffffffff81a14900 T intel_has_pending_fb_unpin +ffffffff81a14a00 T intel_get_crtc_new_encoder +ffffffff81a14ba0 T ilk_pfit_disable +ffffffff81a14c60 T intel_phy_is_combo +ffffffff81a14ce0 T intel_phy_is_tc +ffffffff81a14d50 T intel_phy_is_snps +ffffffff81a14d90 T intel_port_to_phy +ffffffff81a14e20 T intel_port_to_tc +ffffffff81a14f20 T intel_aux_power_domain +ffffffff81a14f60 T intel_modeset_get_crtc_power_domains +ffffffff81a15180 T intel_modeset_put_crtc_power_domains +ffffffff81a151b0 T intel_display_suspend +ffffffff81a15250 T intel_encoder_destroy +ffffffff81a15280 T intel_encoder_get_config +ffffffff81a152b0 t intel_crtc_readout_derived_state +ffffffff81a156e0 T intel_link_compute_m_n +ffffffff81a15810 T intel_zero_m_n +ffffffff81a15850 T intel_set_m_n +ffffffff81a15910 T intel_cpu_transcoder_has_m2_n2 +ffffffff81a15970 T intel_cpu_transcoder_set_m1_n1 +ffffffff81a15b30 T intel_cpu_transcoder_set_m2_n2 +ffffffff81a15c90 T i9xx_set_pipeconf +ffffffff81a15e40 T ilk_set_pipeconf +ffffffff81a16020 T bdw_get_pipemisc_bpp +ffffffff81a16110 T ilk_get_lanes_required +ffffffff81a16170 T intel_get_m_n +ffffffff81a16280 T intel_cpu_transcoder_get_m1_n1 +ffffffff81a16420 T intel_cpu_transcoder_get_m2_n2 +ffffffff81a16590 T intel_crtc_get_pipe_config +ffffffff81a16600 T intel_get_load_detect_pipe +ffffffff81a16a20 T intel_release_load_detect_pipe +ffffffff81a16af0 T i9xx_crtc_clock_get +ffffffff81a16d80 T intel_dotclock_calculate +ffffffff81a16de0 T intel_crtc_dotclock +ffffffff81a16eb0 T intel_encoder_current_mode +ffffffff81a17060 T intel_fuzzy_clock_check +ffffffff81a170b0 T intel_pipe_config_compare +ffffffff81a19ba0 t pipe_config_mismatch +ffffffff81a19c90 t pipe_config_infoframe_mismatch +ffffffff81a19e40 T intel_modeset_all_pipes +ffffffff81a19fe0 T intel_atomic_add_affected_planes +ffffffff81a1a0b0 T intel_crtc_update_active_timings +ffffffff81a1a1b0 T intel_calc_active_pipes +ffffffff81a1a240 T intel_crtc_arm_fifo_underrun +ffffffff81a1a2e0 T intel_plane_destroy +ffffffff81a1a310 T intel_get_pipe_from_crtc_id_ioctl +ffffffff81a1a380 T intel_mode_valid_max_plane_size +ffffffff81a1a400 T intel_init_display_hooks +ffffffff81a1a4e0 T intel_modeset_init_noirq +ffffffff81a1a7a0 t intel_atomic_helper_free_state_worker +ffffffff81a1a810 T intel_modeset_init_nogem +ffffffff81a1b940 T intel_modeset_init +ffffffff81a1bb60 T i830_enable_pipe +ffffffff81a1c190 T i830_disable_pipe +ffffffff81a1c4c0 T intel_display_resume +ffffffff81a1c600 T intel_modeset_driver_remove +ffffffff81a1c6b0 T intel_modeset_driver_remove_noirq +ffffffff81a1c820 T intel_modeset_driver_remove_nogem +ffffffff81a1c860 T intel_modeset_probe_defer +ffffffff81a1c890 T intel_display_driver_register +ffffffff81a1c8f0 T intel_display_driver_unregister +ffffffff81a1c970 T intel_scanout_needs_vtd_wa +ffffffff81a1c9b0 t wait_for_pipe_scanline_moving +ffffffff81a1cc10 t hsw_get_pipe_config +ffffffff81a1d9f0 t hsw_crtc_enable +ffffffff81a1e420 t hsw_crtc_disable +ffffffff81a1e5d0 t skl_commit_modeset_enables +ffffffff81a1eb90 t intel_get_transcoder_timings +ffffffff81a1ee60 t ilk_get_pfit_config +ffffffff81a1efe0 t enabled_bigjoiner_pipes +ffffffff81a1f1f0 t bdw_set_pipemisc +ffffffff81a1f330 t ilk_pfit_enable +ffffffff81a1f440 t intel_set_transcoder_timings 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intel_display_power_is_enabled +ffffffff81a28240 T intel_display_power_set_target_dc_state +ffffffff81a28360 T intel_display_power_get +ffffffff81a283e0 t __intel_display_power_get_domain +ffffffff81a285c0 T intel_display_power_get_if_enabled +ffffffff81a286f0 T __intel_display_power_put_async +ffffffff81a288c0 t __intel_display_power_put_domain +ffffffff81a28a40 T intel_display_power_flush_work +ffffffff81a28b60 t release_async_put_domains +ffffffff81a28c40 T intel_display_power_put_unchecked +ffffffff81a28ca0 T intel_display_power_get_in_set +ffffffff81a28d80 T intel_display_power_get_in_set_if_enabled +ffffffff81a28e30 T intel_display_power_put_mask_in_set +ffffffff81a28f00 T intel_power_domains_init +ffffffff81a29150 t intel_display_power_put_async_work +ffffffff81a293c0 T intel_power_domains_cleanup +ffffffff81a293e0 T gen9_dbuf_slices_update +ffffffff81a29600 T intel_power_domains_init_hw +ffffffff81a29da0 t icl_display_core_init +ffffffff81a2a690 t bxt_display_core_init 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intel_display_power_map_init +ffffffff81a2d170 t __set_power_wells +ffffffff81a2d550 T intel_display_power_map_cleanup +ffffffff81a2e000 T lookup_power_well +ffffffff81a2e0c0 T intel_power_well_enable +ffffffff81a2e150 T intel_power_well_name +ffffffff81a2e190 T intel_power_well_disable +ffffffff81a2e200 T intel_power_well_sync_hw +ffffffff81a2e270 T intel_power_well_get +ffffffff81a2e310 T intel_power_well_put +ffffffff81a2e410 T intel_power_well_is_enabled +ffffffff81a2e430 T intel_power_well_is_enabled_cached +ffffffff81a2e460 T intel_display_power_well_is_enabled +ffffffff81a2e520 T intel_power_well_is_always_on +ffffffff81a2e560 T intel_power_well_domains +ffffffff81a2e590 T intel_power_well_refcount +ffffffff81a2e5c0 T gen9_sanitize_dc_state +ffffffff81a2e6a0 T gen9_set_dc_state +ffffffff81a2ea00 T gen9_enable_dc5 +ffffffff81a2ec60 T skl_enable_dc6 +ffffffff81a2edb0 T bxt_enable_dc9 +ffffffff81a2ef60 T bxt_disable_dc9 +ffffffff81a2f050 T gen9_disable_dc_states +ffffffff81a2f420 T chv_phy_powergate_ch +ffffffff81a2f530 t assert_chv_phy_status +ffffffff81a2f8d0 T chv_phy_powergate_lanes +ffffffff81a2fb90 t i9xx_power_well_sync_hw_noop +ffffffff81a2fbc0 t i9xx_always_on_power_well_noop +ffffffff81a2fbf0 t i9xx_always_on_power_well_enabled +ffffffff81a2fc20 t chv_pipe_power_well_sync_hw +ffffffff81a2fc50 t chv_pipe_power_well_enable +ffffffff81a2fc80 t chv_pipe_power_well_disable +ffffffff81a2fce0 t chv_pipe_power_well_enabled +ffffffff81a2fde0 t chv_dpio_cmn_power_well_enable +ffffffff81a2fff0 t chv_dpio_cmn_power_well_disable +ffffffff81a30120 t vlv_power_well_enabled +ffffffff81a30230 t i830_pipes_power_well_sync_hw +ffffffff81a30320 t i830_pipes_power_well_enable +ffffffff81a303e0 t i830_pipes_power_well_disable +ffffffff81a30410 t i830_pipes_power_well_enabled +ffffffff81a304b0 t hsw_power_well_sync_hw +ffffffff81a305a0 t hsw_power_well_enable +ffffffff81a30820 t hsw_power_well_disable +ffffffff81a308d0 t hsw_power_well_enabled +ffffffff81a309b0 t gen9_dc_off_power_well_enable +ffffffff81a309c0 t gen9_dc_off_power_well_disable +ffffffff81a30a60 t gen9_dc_off_power_well_enabled +ffffffff81a30af0 t bxt_dpio_cmn_power_well_enable +ffffffff81a30b20 t bxt_dpio_cmn_power_well_disable +ffffffff81a30b50 t bxt_dpio_cmn_power_well_enabled +ffffffff81a30b80 t vlv_display_power_well_enable +ffffffff81a30bb0 t vlv_display_power_well_disable +ffffffff81a30c20 t vlv_dpio_cmn_power_well_enable +ffffffff81a30ca0 t vlv_dpio_cmn_power_well_disable +ffffffff81a30da0 t vlv_power_well_enable +ffffffff81a30dc0 t vlv_power_well_disable +ffffffff81a30de0 t icl_aux_power_well_enable +ffffffff81a31460 t icl_aux_power_well_disable +ffffffff81a31700 t tgl_tc_cold_off_power_well_sync_hw +ffffffff81a31720 t tgl_tc_cold_off_power_well_enable +ffffffff81a31740 t tgl_tc_cold_off_power_well_disable +ffffffff81a31760 t tgl_tc_cold_off_power_well_is_enabled +ffffffff81a31790 t xelpdp_aux_power_well_enable +ffffffff81a31870 t xelpdp_aux_power_well_disable +ffffffff81a31950 t xelpdp_aux_power_well_enabled +ffffffff81a31a00 t chv_set_pipe_power_well +ffffffff81a31c00 t vlv_display_power_well_init +ffffffff81a31e90 t vlv_set_power_well +ffffffff81a320a0 t hsw_wait_for_power_well_enable +ffffffff81a321e0 t hsw_wait_for_power_well_disable +ffffffff81a32470 t tgl_tc_cold_request +ffffffff81a33000 T intel_dkl_phy_read +ffffffff81a33100 T intel_dkl_phy_write +ffffffff81a331f0 T intel_dkl_phy_rmw +ffffffff81a33310 T intel_dkl_phy_posting_read +ffffffff81a34000 T intel_dmc_has_payload +ffffffff81a34040 T intel_dmc_load_program +ffffffff81a34820 t pipedmc_clock_gating_wa +ffffffff81a34a10 T intel_dmc_disable_program +ffffffff81a34c30 T assert_dmc_loaded +ffffffff81a34d80 T intel_dmc_ucode_init +ffffffff81a35050 t dmc_load_work_fn +ffffffff81a358b0 T intel_dmc_ucode_suspend +ffffffff81a35920 T intel_dmc_ucode_resume +ffffffff81a359c0 T intel_dmc_ucode_fini +ffffffff81a35af0 T intel_dmc_print_error_state +ffffffff81a35ba0 T intel_dmc_debugfs_register +ffffffff81a36000 T intel_dp_is_edp +ffffffff81a36030 T intel_dp_is_uhbr +ffffffff81a36070 T intel_dp_max_lane_count +ffffffff81a360e0 T intel_dp_link_required +ffffffff81a36120 T intel_dp_max_data_rate +ffffffff81a36190 T intel_dp_can_bigjoiner +ffffffff81a361e0 T intel_dp_get_link_train_fallback_values +ffffffff81a365c0 T intel_dp_mode_to_fec_clock +ffffffff81a36610 T intel_dp_min_bpp +ffffffff81a36650 T intel_dp_source_supports_tps3 +ffffffff81a366a0 T intel_dp_source_supports_tps4 +ffffffff81a366d0 T intel_dp_max_link_rate +ffffffff81a36790 T intel_dp_rate_select +ffffffff81a36830 T intel_dp_compute_rate +ffffffff81a36900 T intel_dp_adjust_compliance_config +ffffffff81a36a40 T intel_dp_limited_color_range +ffffffff81a36ab0 T intel_dp_compute_psr_vsc_sdp +ffffffff81a36b30 T intel_dp_needs_vsc_sdp +ffffffff81a36b80 t intel_dp_compute_vsc_colorimetry +ffffffff81a36d00 T intel_dp_compute_config +ffffffff81a37390 t intel_dp_compute_output_format +ffffffff81a375c0 T intel_dp_set_link_params +ffffffff81a37600 T intel_edp_backlight_on +ffffffff81a376b0 T intel_edp_backlight_off +ffffffff81a37760 T intel_dp_sink_set_decompression_state +ffffffff81a37800 T intel_dp_wait_source_oui +ffffffff81a378d0 T intel_dp_set_power +ffffffff81a37ae0 T intel_dp_sync_state +ffffffff81a37b60 t intel_dp_get_dpcd +ffffffff81a37cc0 t intel_dp_reset_max_link_params +ffffffff81a37dd0 T intel_dp_initial_fastset_check +ffffffff81a37ed0 T intel_dp_check_frl_training +ffffffff81a38460 T intel_dp_pcon_dsc_configure +ffffffff81a38630 T intel_dp_configure_protocol_converter +ffffffff81a387a0 T intel_dp_get_colorimetry_status +ffffffff81a38800 T intel_edp_fixup_vbt_bpp +ffffffff81a388a0 T intel_write_dp_vsc_sdp +ffffffff81a38a30 T intel_dp_set_infoframes +ffffffff81a38b60 t intel_write_dp_sdp +ffffffff81a38e50 T intel_read_dp_sdp +ffffffff81a39180 T intel_dp_retrain_link +ffffffff81a39840 T intel_dp_phy_test +ffffffff81a39f20 T intel_digital_port_connected +ffffffff81a39fc0 T intel_dp_encoder_flush_work +ffffffff81a3a010 T intel_dp_encoder_suspend +ffffffff81a3a050 T intel_dp_encoder_shutdown +ffffffff81a3a090 T intel_dp_hpd_pulse +ffffffff81a3a7e0 T intel_dp_is_port_edp +ffffffff81a3a830 T intel_dp_init_connector +ffffffff81a3b990 t intel_dp_modeset_retry_work_fn +ffffffff81a3ba10 t intel_dp_set_common_rates +ffffffff81a3bbb0 T intel_dp_mst_suspend +ffffffff81a3bc50 T intel_dp_mst_resume +ffffffff81a3bd00 t intel_dp_compute_link_config +ffffffff81a3ca20 t intel_dp_dsc_get_slice_count +ffffffff81a3cb90 t intel_dp_set_sink_rates +ffffffff81a3cdc0 t intel_dp_check_device_service_irq +ffffffff81a3d390 t intel_dp_force +ffffffff81a3d4d0 t intel_dp_connector_register +ffffffff81a3d5b0 t intel_dp_connector_unregister +ffffffff81a3d610 t intel_dp_oob_hotplug_event +ffffffff81a3d690 t intel_dp_set_edid +ffffffff81a3dac0 t intel_dp_get_modes +ffffffff81a3dbc0 t intel_dp_detect +ffffffff81a3e4b0 t intel_dp_mode_valid +ffffffff81a3ec40 t intel_dp_connector_atomic_check +ffffffff81a3ef80 t intel_dp_get_dsc_sink_cap +ffffffff81a40000 T intel_dp_aux_fini +ffffffff81a40020 T intel_dp_aux_init +ffffffff81a40200 t xelpdp_aux_ctl_reg +ffffffff81a402c0 t xelpdp_aux_data_reg +ffffffff81a40390 t tgl_aux_ctl_reg +ffffffff81a40410 t tgl_aux_data_reg +ffffffff81a404a0 t skl_aux_ctl_reg +ffffffff81a40520 t skl_aux_data_reg +ffffffff81a405b0 t ilk_aux_ctl_reg +ffffffff81a40630 t ilk_aux_data_reg +ffffffff81a406c0 t g4x_aux_ctl_reg +ffffffff81a40740 t g4x_aux_data_reg +ffffffff81a407d0 t skl_get_aux_clock_divider +ffffffff81a40800 t hsw_get_aux_clock_divider +ffffffff81a408a0 t ilk_get_aux_clock_divider +ffffffff81a40900 t g4x_get_aux_clock_divider +ffffffff81a40950 t skl_get_aux_send_ctl +ffffffff81a409d0 t g4x_get_aux_send_ctl +ffffffff81a40a20 t kasprintf +ffffffff81a40af0 t intel_dp_aux_transfer +ffffffff81a40d40 t intel_dp_aux_xfer +ffffffff81a42000 T intel_dp_aux_init_backlight_funcs +ffffffff81a42270 t intel_dp_aux_hdr_setup_backlight +ffffffff81a423c0 t intel_dp_aux_hdr_get_backlight +ffffffff81a42530 t intel_dp_aux_hdr_set_backlight +ffffffff81a42620 t intel_dp_aux_hdr_disable_backlight +ffffffff81a426a0 t intel_dp_aux_hdr_enable_backlight +ffffffff81a428f0 t intel_dp_aux_vesa_setup_backlight +ffffffff81a42ab0 t intel_dp_aux_vesa_get_backlight +ffffffff81a42ae0 t intel_dp_aux_vesa_set_backlight +ffffffff81a42b80 t intel_dp_aux_vesa_disable_backlight +ffffffff81a42c30 t intel_dp_aux_vesa_enable_backlight +ffffffff81a43000 T intel_dp_hdcp_init +ffffffff81a430b0 t intel_dp_hdcp_write_an_aksv +ffffffff81a431a0 t intel_dp_hdcp_read_bksv +ffffffff81a43230 t intel_dp_hdcp_read_bstatus +ffffffff81a432c0 t intel_dp_hdcp_repeater_present +ffffffff81a43370 t intel_dp_hdcp_read_ri_prime +ffffffff81a43400 t intel_dp_hdcp_read_ksv_ready +ffffffff81a434a0 t intel_dp_hdcp_read_ksv_fifo +ffffffff81a43590 t intel_dp_hdcp_read_v_prime_part +ffffffff81a43630 t intel_dp_hdcp_toggle_signalling +ffffffff81a43660 t intel_dp_mst_hdcp_stream_encryption +ffffffff81a43870 t intel_dp_hdcp_check_link +ffffffff81a43900 t intel_dp_hdcp_capable +ffffffff81a439b0 t intel_dp_hdcp2_capable +ffffffff81a43a30 t intel_dp_hdcp2_write_msg +ffffffff81a43af0 t intel_dp_hdcp2_read_msg +ffffffff81a441c0 t intel_dp_hdcp2_config_stream_type +ffffffff81a44270 t intel_dp_mst_hdcp2_stream_encryption +ffffffff81a44500 t intel_dp_mst_hdcp2_check_link +ffffffff81a445c0 t get_hdcp2_dp_msg_data +ffffffff81a44700 t intel_dp_hdcp2_check_link +ffffffff81a45000 T intel_dp_init_lttpr_and_dprx_caps +ffffffff81a452c0 T intel_dp_get_adjust_train +ffffffff81a45980 T intel_dp_program_link_training_pattern +ffffffff81a45a80 T intel_dp_set_signal_levels +ffffffff81a45de0 T intel_dp_dump_link_status +ffffffff81a45eb0 T intel_dp_stop_link_train +ffffffff81a460e0 T intel_dp_start_link_train +ffffffff81a47220 t intel_dp_link_train_phy +ffffffff81a49000 T intel_dp_mst_encoder_active_links +ffffffff81a49030 T intel_dp_mst_encoder_init +ffffffff81a49270 T intel_dp_mst_source_support +ffffffff81a492b0 T intel_dp_mst_encoder_cleanup +ffffffff81a49310 T intel_dp_mst_is_master_trans +ffffffff81a49350 T intel_dp_mst_is_slave_trans +ffffffff81a49390 T intel_dp_mst_add_topology_state_for_crtc +ffffffff81a49460 t intel_dp_add_mst_connector +ffffffff81a49670 t intel_dp_mst_poll_hpd_irq +ffffffff81a49690 t intel_dp_mst_get_hw_state +ffffffff81a496f0 t intel_dp_mst_connector_late_register +ffffffff81a49760 t intel_dp_mst_connector_early_unregister +ffffffff81a49790 t intel_dp_mst_get_modes +ffffffff81a49830 t intel_dp_mst_detect +ffffffff81a49930 t intel_dp_mst_mode_valid_ctx +ffffffff81a49a90 t intel_mst_atomic_best_encoder +ffffffff81a49af0 t intel_dp_mst_atomic_check +ffffffff81a49c70 t intel_dp_mst_compute_config +ffffffff81a49f80 t intel_dp_mst_compute_config_late +ffffffff81a4a080 t intel_mst_disable_dp +ffffffff81a4a170 t intel_mst_post_disable_dp +ffffffff81a4a430 t intel_mst_pre_pll_enable_dp +ffffffff81a4a480 t intel_mst_pre_enable_dp +ffffffff81a4a6a0 t intel_mst_enable_dp +ffffffff81a4aa90 t intel_dp_mst_enc_get_hw_state +ffffffff81a4aad0 t intel_dp_mst_enc_get_config +ffffffff81a4aaf0 t intel_dp_mst_initial_fastset_check +ffffffff81a4ab10 t intel_dp_mst_encoder_destroy +ffffffff81a4b000 T bxt_port_to_phy_channel +ffffffff81a4b130 T bxt_ddi_phy_set_signal_levels +ffffffff81a4b650 T bxt_ddi_phy_is_enabled +ffffffff81a4b7a0 T bxt_ddi_phy_uninit +ffffffff81a4b8a0 T bxt_ddi_phy_init +ffffffff81a4bad0 t _bxt_ddi_phy_init +ffffffff81a4c0f0 T bxt_ddi_phy_verify_state +ffffffff81a4c430 t __phy_reg_verify_state +ffffffff81a4c530 T bxt_ddi_phy_calc_lane_lat_optim_mask +ffffffff81a4c5a0 T bxt_ddi_phy_set_lane_optim_mask +ffffffff81a4c8d0 T bxt_ddi_phy_get_lane_lat_optim_mask +ffffffff81a4cb20 T chv_set_phy_signal_level +ffffffff81a4ce80 T chv_data_lane_soft_reset +ffffffff81a4d060 T chv_phy_pre_pll_enable +ffffffff81a4d300 T chv_phy_pre_encoder_enable +ffffffff81a4d590 T chv_phy_release_cl2_override +ffffffff81a4d620 T chv_phy_post_pll_disable +ffffffff81a4d6d0 T vlv_set_phy_signal_level +ffffffff81a4d850 T vlv_phy_pre_pll_enable +ffffffff81a4d970 T vlv_phy_pre_encoder_enable +ffffffff81a4da90 T vlv_phy_reset_lanes +ffffffff81a4e000 T pnv_calc_dpll_params +ffffffff81a4e0c0 T i9xx_calc_dpll_params +ffffffff81a4e190 T vlv_calc_dpll_params +ffffffff81a4e250 T chv_calc_dpll_params +ffffffff81a4e320 T bxt_find_best_dpll +ffffffff81a4e340 t chv_find_best_dpll +ffffffff81a4e680 T i9xx_dpll_compute_fp +ffffffff81a4e6c0 T vlv_compute_dpll +ffffffff81a4e740 T chv_compute_dpll +ffffffff81a4e7c0 T intel_dpll_crtc_compute_clock +ffffffff81a4e8c0 T intel_dpll_crtc_get_shared_dpll +ffffffff81a4ea10 T intel_dpll_init_clock_hook +ffffffff81a4eb00 T i9xx_enable_pll +ffffffff81a4eeb0 T vlv_enable_pll +ffffffff81a4f410 T chv_enable_pll +ffffffff81a4fa90 T vlv_force_pll_on +ffffffff81a4fbe0 T vlv_disable_pll +ffffffff81a4fca0 T chv_disable_pll +ffffffff81a4fdd0 T i9xx_disable_pll +ffffffff81a4fed0 T vlv_force_pll_off +ffffffff81a4ffc0 T assert_pll_enabled +ffffffff81a500a0 T assert_pll_disabled +ffffffff81a50180 t intel_pll_is_valid +ffffffff81a50250 t dg2_crtc_compute_clock +ffffffff81a502d0 t hsw_crtc_compute_clock +ffffffff81a50390 t hsw_crtc_get_shared_dpll +ffffffff81a50430 t ilk_crtc_compute_clock +ffffffff81a50730 t ilk_crtc_get_shared_dpll +ffffffff81a50780 t g4x_find_best_dpll +ffffffff81a50ac0 t chv_crtc_compute_clock +ffffffff81a50bd0 t vlv_crtc_compute_clock +ffffffff81a51090 t g4x_crtc_compute_clock +ffffffff81a511e0 t i9xx_compute_dpll +ffffffff81a51460 t pnv_crtc_compute_clock +ffffffff81a51820 t i9xx_crtc_compute_clock +ffffffff81a51940 t i9xx_find_best_dpll +ffffffff81a51c70 t i8xx_crtc_compute_clock +ffffffff81a52000 T intel_get_shared_dpll_by_id +ffffffff81a52040 T intel_get_shared_dpll_id +ffffffff81a520d0 T assert_shared_dpll +ffffffff81a521f0 T intel_dpll_get_hw_state +ffffffff81a52220 T icl_tc_port_to_pll_id +ffffffff81a52250 T intel_enable_shared_dpll +ffffffff81a52540 T intel_disable_shared_dpll +ffffffff81a52780 T intel_shared_dpll_swap_state +ffffffff81a52860 T icl_set_active_port_dpll +ffffffff81a528a0 T intel_shared_dpll_init +ffffffff81a52ab0 T intel_compute_shared_dplls +ffffffff81a52b40 T intel_reserve_shared_dplls +ffffffff81a52bd0 T intel_release_shared_dplls +ffffffff81a52c10 T intel_update_active_dpll +ffffffff81a52c70 T intel_dpll_get_freq +ffffffff81a52d00 T intel_dpll_update_ref_clks +ffffffff81a52d50 T intel_dpll_readout_hw_state +ffffffff81a52ed0 T intel_dpll_sanitize_state +ffffffff81a52fb0 T intel_dpll_dump_hw_state +ffffffff81a53030 T intel_shared_dpll_state_verify +ffffffff81a53150 t verify_single_dpll_state +ffffffff81a53470 T intel_shared_dpll_verify_disabled +ffffffff81a534f0 t icl_compute_dplls +ffffffff81a542d0 t icl_get_dplls +ffffffff81a54a50 t icl_put_dplls +ffffffff81a54b10 t icl_update_active_dpll +ffffffff81a54bc0 t icl_update_dpll_ref_clks +ffffffff81a54c00 t icl_dump_hw_state +ffffffff81a54cc0 t combo_pll_enable +ffffffff81a54ef0 t combo_pll_disable +ffffffff81a54fe0 t combo_pll_get_hw_state +ffffffff81a55070 t icl_ddi_combo_pll_get_freq +ffffffff81a55240 t icl_dpll_write +ffffffff81a554e0 t adlp_cmtg_clock_gating_wa +ffffffff81a55640 t icl_pll_disable +ffffffff81a557e0 t icl_pll_get_hw_state +ffffffff81a55b20 t tbt_pll_enable +ffffffff81a55ce0 t tbt_pll_disable +ffffffff81a55d00 t tbt_pll_get_hw_state +ffffffff81a55d20 t icl_ddi_tbt_pll_get_freq +ffffffff81a55d90 t mg_pll_enable +ffffffff81a56340 t mg_pll_disable +ffffffff81a56380 t dkl_pll_get_hw_state +ffffffff81a56550 t icl_ddi_mg_pll_get_freq +ffffffff81a56630 t intel_find_shared_dpll +ffffffff81a56960 t intel_unreference_shared_dpll +ffffffff81a56ac0 t mg_pll_get_hw_state +ffffffff81a56d10 t bxt_compute_dpll +ffffffff81a57030 t bxt_get_dpll +ffffffff81a57290 t intel_put_dpll +ffffffff81a572f0 t bxt_update_dpll_ref_clks +ffffffff81a57330 t bxt_dump_hw_state +ffffffff81a573e0 t bxt_ddi_pll_enable +ffffffff81a57ef0 t bxt_ddi_pll_disable +ffffffff81a58100 t bxt_ddi_pll_get_hw_state +ffffffff81a58590 t bxt_ddi_pll_get_freq +ffffffff81a58620 t bxt_ddi_set_dpll_hw_state +ffffffff81a587e0 t skl_compute_dpll +ffffffff81a58f60 t skl_get_dpll +ffffffff81a59190 t skl_update_dpll_ref_clks +ffffffff81a591d0 t skl_dump_hw_state +ffffffff81a59230 t skl_ddi_dpll0_enable +ffffffff81a592f0 t skl_ddi_dpll0_disable +ffffffff81a59320 t skl_ddi_dpll0_get_hw_state +ffffffff81a59420 t skl_ddi_pll_get_freq +ffffffff81a594b0 t skl_ddi_wrpll_get_freq +ffffffff81a59610 t skl_ddi_pll_enable +ffffffff81a59830 t skl_ddi_pll_disable +ffffffff81a598c0 t skl_ddi_pll_get_hw_state +ffffffff81a599e0 t hsw_compute_dpll +ffffffff81a5a230 t hsw_get_dpll +ffffffff81a5a4f0 t hsw_update_dpll_ref_clks +ffffffff81a5a560 t hsw_dump_hw_state +ffffffff81a5a590 t hsw_ddi_wrpll_enable +ffffffff81a5a610 t hsw_ddi_wrpll_disable +ffffffff81a5a6f0 t hsw_ddi_wrpll_get_hw_state +ffffffff81a5a790 t hsw_ddi_wrpll_get_freq +ffffffff81a5a880 t hsw_ddi_spll_enable +ffffffff81a5a8e0 t hsw_ddi_spll_disable +ffffffff81a5a9b0 t hsw_ddi_spll_get_hw_state +ffffffff81a5aa40 t hsw_ddi_spll_get_freq +ffffffff81a5aae0 t hsw_ddi_lcpll_enable +ffffffff81a5ab10 t hsw_ddi_lcpll_disable +ffffffff81a5ab40 t hsw_ddi_lcpll_get_hw_state +ffffffff81a5ab70 t hsw_ddi_lcpll_get_freq +ffffffff81a5abf0 t ibx_compute_dpll +ffffffff81a5ac20 t ibx_get_dpll +ffffffff81a5aea0 t ibx_dump_hw_state +ffffffff81a5af00 t ibx_pch_dpll_enable +ffffffff81a5b0b0 t ibx_pch_dpll_disable +ffffffff81a5b130 t ibx_pch_dpll_get_hw_state +ffffffff81a5c000 T intel_dpt_pin +ffffffff81a5c1d0 T intel_dpt_unpin +ffffffff81a5c240 T intel_dpt_resume +ffffffff81a5c310 T intel_dpt_suspend +ffffffff81a5c3e0 T intel_dpt_create +ffffffff81a5c710 t dpt_insert_page +ffffffff81a5c780 t dpt_clear_range +ffffffff81a5c7b0 t dpt_insert_entries +ffffffff81a5c8b0 t dpt_cleanup +ffffffff81a5c900 t dpt_bind_vma +ffffffff81a5c990 t dpt_unbind_vma +ffffffff81a5c9c0 T intel_dpt_destroy +ffffffff81a5ca10 t __ww_mutex_lock +ffffffff81a5d000 T intel_drrs_type_str +ffffffff81a5d040 T intel_drrs_is_active +ffffffff81a5d070 T intel_drrs_activate +ffffffff81a5d270 T intel_drrs_deactivate +ffffffff81a5d350 t intel_drrs_set_state +ffffffff81a5d4a0 T intel_drrs_invalidate +ffffffff81a5d4c0 t intel_drrs_frontbuffer_update +ffffffff81a5d620 T intel_drrs_flush +ffffffff81a5d640 T intel_crtc_drrs_init +ffffffff81a5d6e0 t intel_drrs_downclock_work +ffffffff81a5d740 t __delayed_work_tick +ffffffff81a5e000 T intel_dsb_indexed_reg_write +ffffffff81a5e140 T intel_dsb_reg_write +ffffffff81a5e230 T intel_dsb_commit +ffffffff81a5e680 T intel_dsb_prepare +ffffffff81a5e810 T intel_dsb_cleanup +ffffffff81a5f000 T intel_dsi_bitrate +ffffffff81a5f0a0 T intel_dsi_tlpx_ns +ffffffff81a5f0f0 T intel_dsi_get_modes +ffffffff81a5f100 T intel_dsi_mode_valid +ffffffff81a5f1c0 T intel_dsi_host_init +ffffffff81a5f270 T intel_dsi_get_panel_orientation +ffffffff81a60000 T intel_dsi_dcs_init_backlight_funcs +ffffffff81a600a0 t dcs_setup_backlight +ffffffff81a60100 t dcs_get_backlight +ffffffff81a60200 t dcs_set_backlight +ffffffff81a602f0 t dcs_disable_backlight +ffffffff81a60670 t dcs_enable_backlight +ffffffff81a61000 T intel_dsi_vbt_exec_sequence +ffffffff81a61020 T intel_dsi_msleep +ffffffff81a61090 T intel_dsi_log_params +ffffffff81a61410 T intel_dsi_vbt_init +ffffffff81a618a0 T intel_dsi_vbt_gpio_init +ffffffff81a618c0 T intel_dsi_vbt_gpio_cleanup +ffffffff81a62000 T intel_dvo_init +ffffffff81a624f0 t intel_disable_dvo +ffffffff81a625a0 t intel_enable_dvo +ffffffff81a62690 t intel_dvo_get_hw_state +ffffffff81a62700 t intel_dvo_get_config +ffffffff81a627b0 t intel_dvo_compute_config +ffffffff81a62840 t intel_dvo_pre_enable +ffffffff81a62930 t intel_dvo_connector_get_hw_state +ffffffff81a629b0 t intel_dvo_enc_destroy +ffffffff81a629f0 t intel_dvo_detect +ffffffff81a62af0 t intel_dvo_get_modes +ffffffff81a62b60 t intel_dvo_mode_valid +ffffffff81a63000 T intel_fb_get_format_info +ffffffff81a63240 T intel_fb_is_ccs_modifier +ffffffff81a63410 T intel_fb_is_rc_ccs_cc_modifier +ffffffff81a635e0 T intel_fb_is_mc_ccs_modifier +ffffffff81a637b0 T intel_fb_plane_get_modifiers +ffffffff81a638f0 T intel_fb_plane_supports_modifier +ffffffff81a63960 T intel_format_info_is_yuv_semiplanar +ffffffff81a63c00 T intel_fb_is_ccs_aux_plane +ffffffff81a63e40 T intel_fb_rc_ccs_cc_plane +ffffffff81a640a0 T is_surface_linear +ffffffff81a643d0 T main_to_ccs_plane +ffffffff81a646b0 T skl_ccs_to_main_plane +ffffffff81a649a0 T skl_main_to_aux_plane +ffffffff81a64c00 T intel_tile_size +ffffffff81a64c40 T intel_tile_width_bytes +ffffffff81a64e90 T intel_tile_height +ffffffff81a64ef0 T intel_tile_row_size +ffffffff81a64f70 T intel_fb_align_height +ffffffff81a64ff0 T intel_fb_uses_dpt +ffffffff81a65040 T intel_cursor_alignment +ffffffff81a650a0 T intel_surf_alignment +ffffffff81a652c0 T intel_fb_plane_get_subsampling +ffffffff81a65690 T intel_plane_adjust_aligned_offset +ffffffff81a65700 t intel_adjust_aligned_offset +ffffffff81a658b0 T intel_plane_compute_aligned_offset +ffffffff81a659b0 t intel_compute_aligned_offset +ffffffff81a65b70 T intel_fb_needs_pot_stride_remap +ffffffff81a65bc0 T intel_fb_supports_90_270_rotation +ffffffff81a65c10 T intel_fill_fb_info +ffffffff81a66850 t calc_plane_remap_info +ffffffff81a672b0 T intel_fb_fill_view +ffffffff81a67300 T intel_plane_compute_gtt +ffffffff81a67bd0 t intel_plane_check_stride +ffffffff81a67f40 T intel_framebuffer_init +ffffffff81a69350 T intel_user_framebuffer_create +ffffffff81a69490 T intel_framebuffer_create +ffffffff81a69520 t intel_adjust_tile_offset +ffffffff81a69660 t intel_user_framebuffer_destroy +ffffffff81a696c0 t intel_user_framebuffer_create_handle +ffffffff81a696e0 t intel_user_framebuffer_dirty +ffffffff81a6a000 T intel_pin_and_fence_fb_obj +ffffffff81a6a320 t i915_gem_object_lock +ffffffff81a6a530 T intel_unpin_fb_vma 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intel_fbdev_fini +ffffffff81a6f670 T intel_fbdev_output_poll_changed +ffffffff81a6f710 T intel_fbdev_restore_mode +ffffffff81a6f790 T intel_fbdev_framebuffer +ffffffff81a6f7d0 t intelfb_create +ffffffff81a6fdd0 t intel_fbdev_set_par +ffffffff81a70000 T assert_fdi_tx_enabled +ffffffff81a700e0 T assert_fdi_tx_disabled +ffffffff81a701c0 T assert_fdi_rx_enabled +ffffffff81a70280 T assert_fdi_rx_disabled +ffffffff81a70340 T assert_fdi_tx_pll_enabled +ffffffff81a703f0 T assert_fdi_rx_pll_enabled +ffffffff81a704b0 T assert_fdi_rx_pll_disabled +ffffffff81a70570 T intel_fdi_link_train +ffffffff81a70590 T intel_fdi_pll_freq_update +ffffffff81a70640 T intel_fdi_link_freq +ffffffff81a70690 T ilk_fdi_compute_config +ffffffff81a709d0 T intel_fdi_normal_train +ffffffff81a70b60 T hsw_fdi_link_train +ffffffff81a71060 T hsw_fdi_disable +ffffffff81a711c0 T ilk_fdi_pll_enable +ffffffff81a713d0 T ilk_fdi_pll_disable +ffffffff81a71500 T ilk_fdi_disable +ffffffff81a71770 T intel_fdi_init_hook +ffffffff81a717d0 t ilk_fdi_link_train +ffffffff81a71e40 t gen6_fdi_link_train +ffffffff81a72670 t ivb_manual_fdi_link_train +ffffffff81a72f10 t cpt_set_fdi_bc_bifurcation +ffffffff81a74000 T intel_set_cpu_fifo_underrun_reporting +ffffffff81a743f0 T intel_set_pch_fifo_underrun_reporting +ffffffff81a74620 T intel_cpu_fifo_underrun_irq_handler +ffffffff81a74810 T intel_pch_fifo_underrun_irq_handler +ffffffff81a74890 T intel_check_cpu_fifo_underruns +ffffffff81a74ab0 T intel_check_pch_fifo_underruns +ffffffff81a75000 T intel_frontbuffer_flip_prepare +ffffffff81a75050 T intel_frontbuffer_flip_complete +ffffffff81a75130 T intel_frontbuffer_flip +ffffffff81a75200 T __intel_fb_invalidate +ffffffff81a75290 T __intel_fb_flush +ffffffff81a75380 T intel_frontbuffer_get +ffffffff81a754c0 t frontbuffer_active +ffffffff81a754f0 t frontbuffer_retire +ffffffff81a75530 T intel_frontbuffer_put +ffffffff81a756c0 T intel_frontbuffer_track +ffffffff81a76000 T intel_atomic_global_obj_init +ffffffff81a76070 T intel_atomic_global_obj_cleanup +ffffffff81a76170 T intel_atomic_get_global_obj_state +ffffffff81a763e0 T intel_atomic_get_old_global_obj_state +ffffffff81a76440 T intel_atomic_get_new_global_obj_state +ffffffff81a764a0 T intel_atomic_swap_global_state +ffffffff81a765f0 T intel_atomic_clear_global_state +ffffffff81a76720 T intel_atomic_lock_global_state +ffffffff81a767a0 T intel_atomic_serialize_global_state +ffffffff81a77000 T intel_gmbus_is_valid_pin +ffffffff81a77110 T intel_gmbus_reset +ffffffff81a77170 T intel_bb_set_bits +ffffffff81a772a0 T intel_bb_set_dir +ffffffff81a772d0 T intel_bb_read_bits +ffffffff81a77450 T intel_acquire_bus +ffffffff81a77650 T intel_release_bus +ffffffff81a777f0 T intel_send_start +ffffffff81a77810 T intel_send_stop +ffffffff81a77830 T intel_initiate_xfer +ffffffff81a77850 T intel_read_byte +ffffffff81a77870 T intel_write_byte +ffffffff81a77890 T intel_gmbus_output_aksv +ffffffff81a77960 t do_gmbus_xfer +ffffffff81a77f60 T intel_gmbus_setup +ffffffff81a782f0 T intel_gmbus_teardown +ffffffff81a78370 T intel_gmbus_get_adapter +ffffffff81a783f0 T intel_gmbus_force_bit +ffffffff81a78490 T intel_gmbus_is_forced_bit +ffffffff81a784c0 t gmbus_xfer_read +ffffffff81a78790 t gmbus_xfer_write +ffffffff81a789e0 t gmbus_wait +ffffffff81a78dc0 t gmbus_wait_idle +ffffffff81a78f60 t gmbus_xfer +ffffffff81a79040 t gmbus_func +ffffffff81a79080 t gmbus_lock_bus +ffffffff81a790a0 t gmbus_trylock_bus +ffffffff81a79100 t gmbus_unlock_bus +ffffffff81a7a000 T intel_hdcp_capable +ffffffff81a7a0a0 t intel_hdcp_read_valid_bksv +ffffffff81a7a320 T intel_hdcp2_capable +ffffffff81a7a400 T is_hdcp_supported +ffffffff81a7a450 T intel_hdcp_component_init +ffffffff81a7a480 T intel_hdcp_init +ffffffff81a7a5c0 t intel_hdcp_check_work +ffffffff81a7e4c0 t intel_hdcp_prop_work +ffffffff81a7e540 T intel_hdcp_enable +ffffffff81a7e590 T intel_hdcp_disable +ffffffff81a7e6c0 t intel_hdcp_update_value +ffffffff81a7e880 t _intel_hdcp2_disable +ffffffff81a7ec80 t _intel_hdcp_disable +ffffffff81a7ef80 T intel_hdcp_update_pipe +ffffffff81a7f0f0 T intel_hdcp_component_fini +ffffffff81a7f130 T intel_hdcp_cleanup +ffffffff81a7f270 T intel_hdcp_atomic_check +ffffffff81a7f300 T intel_hdcp_handle_cp_irq +ffffffff81a7f400 t __delayed_work_tick +ffffffff81a7f420 t hdcp2_authenticate_repeater_topology +ffffffff81a7f700 t intel_hdcp_get_repeater_ctl +ffffffff81a80000 T hsw_write_infoframe +ffffffff81a80410 t hsw_dip_data_reg +ffffffff81a805d0 T hsw_read_infoframe +ffffffff81a80690 T intel_hdmi_infoframe_enable +ffffffff81a80730 T intel_hdmi_infoframes_enabled +ffffffff81a80850 T intel_read_infoframe +ffffffff81a809e0 T intel_hdmi_read_gcp_infoframe +ffffffff81a80ad0 T intel_dp_dual_mode_set_tmds_output +ffffffff81a80ba0 T intel_hdmi_tmds_clock +ffffffff81a80bf0 T intel_hdmi_bpc_possible +ffffffff81a80d20 T intel_hdmi_limited_color_range +ffffffff81a80d90 T intel_hdmi_compute_config +ffffffff81a814e0 t intel_hdmi_compute_output_format +ffffffff81a81610 T intel_hdmi_encoder_shutdown +ffffffff81a816e0 T intel_hdmi_handle_sink_scrambling +ffffffff81a81800 T intel_infoframe_init +ffffffff81a81980 t vlv_write_infoframe +ffffffff81a81ce0 t vlv_read_infoframe +ffffffff81a81eb0 t vlv_set_infoframes +ffffffff81a82250 t vlv_infoframes_enabled +ffffffff81a822f0 t g4x_write_infoframe +ffffffff81a825b0 t g4x_read_infoframe +ffffffff81a82700 t g4x_set_infoframes +ffffffff81a829a0 t g4x_infoframes_enabled +ffffffff81a82a20 t hsw_set_infoframes +ffffffff81a82cc0 t hsw_infoframes_enabled +ffffffff81a82d50 t ibx_write_infoframe +ffffffff81a83070 t ibx_read_infoframe +ffffffff81a831f0 t ibx_set_infoframes +ffffffff81a83560 t ibx_infoframes_enabled +ffffffff81a835f0 t cpt_write_infoframe +ffffffff81a838f0 t cpt_read_infoframe +ffffffff81a83a70 t cpt_set_infoframes +ffffffff81a83d80 t cpt_infoframes_enabled +ffffffff81a83df0 T intel_hdmi_init_connector +ffffffff81a84480 T intel_hdmi_dsc_get_slice_height +ffffffff81a844e0 T intel_hdmi_dsc_get_num_slices +ffffffff81a84660 T intel_hdmi_dsc_get_bpp +ffffffff81a84750 t intel_hdmi_compute_clock +ffffffff81a84a10 t hdmi_port_clock_valid +ffffffff81a84c40 t intel_write_infoframe +ffffffff81a84e10 t intel_hdmi_detect +ffffffff81a84fd0 t intel_hdmi_force +ffffffff81a850b0 t intel_hdmi_connector_register +ffffffff81a850c0 t intel_hdmi_connector_unregister +ffffffff81a850d0 t intel_hdmi_set_edid +ffffffff81a85370 t intel_hdmi_get_modes +ffffffff81a853b0 t intel_hdmi_mode_valid +ffffffff81a85550 t intel_hdmi_mode_clock_valid +ffffffff81a856e0 t intel_hdmi_hdcp_write_an_aksv +ffffffff81a85830 t intel_hdmi_hdcp_read_bksv +ffffffff81a85900 t intel_hdmi_hdcp_read_bstatus +ffffffff81a859d0 t intel_hdmi_hdcp_repeater_present +ffffffff81a85ab0 t intel_hdmi_hdcp_read_ri_prime +ffffffff81a85b80 t intel_hdmi_hdcp_read_ksv_ready +ffffffff81a85c60 t intel_hdmi_hdcp_read_ksv_fifo +ffffffff81a85d30 t intel_hdmi_hdcp_read_v_prime_part +ffffffff81a85e20 t intel_hdmi_hdcp_toggle_signalling +ffffffff81a860b0 t intel_hdmi_hdcp_check_link +ffffffff81a86400 t intel_hdmi_hdcp2_capable +ffffffff81a864c0 t intel_hdmi_hdcp2_write_msg +ffffffff81a865b0 t intel_hdmi_hdcp2_read_msg +ffffffff81a86a50 t intel_hdmi_hdcp2_check_link +ffffffff81a87000 T intel_hpd_pin_default +ffffffff81a87030 T intel_encoder_hotplug +ffffffff81a87160 T intel_hpd_trigger_irq +ffffffff81a871d0 T intel_hpd_irq_handler +ffffffff81a875b0 T intel_hpd_init +ffffffff81a876c0 T intel_hpd_poll_enable +ffffffff81a87740 T intel_hpd_poll_disable +ffffffff81a877a0 T intel_hpd_init_work +ffffffff81a87870 t i915_hotplug_work_func +ffffffff81a87bc0 t i915_digport_work_func +ffffffff81a87d50 t i915_hpd_poll_init_work +ffffffff81a87e60 t intel_hpd_irq_storm_reenable_work +ffffffff81a881b0 T intel_hpd_cancel_work +ffffffff81a882d0 T intel_hpd_disable +ffffffff81a88360 T intel_hpd_enable +ffffffff81a883d0 t __delayed_work_tick +ffffffff81a89000 T intel_lpe_audio_irq_handler +ffffffff81a89020 T intel_lpe_audio_init +ffffffff81a89050 T intel_lpe_audio_teardown +ffffffff81a89070 T intel_lpe_audio_notify +ffffffff81a8a000 T lspcon_detect_hdr_capability +ffffffff81a8a0b0 T lspcon_write_infoframe +ffffffff81a8a830 T lspcon_read_infoframe +ffffffff81a8a870 T lspcon_set_infoframes +ffffffff81a8aae0 T lspcon_infoframes_enabled +ffffffff81a8acd0 T lspcon_wait_pcon_mode +ffffffff81a8acf0 t lspcon_wait_mode +ffffffff81a8afb0 T lspcon_init +ffffffff81a8b3c0 T intel_lspcon_infoframes_enabled +ffffffff81a8b400 T lspcon_resume +ffffffff81a8b6b0 t lspcon_change_mode +ffffffff81a8c000 T intel_lvds_port_enabled +ffffffff81a8c080 T intel_get_lvds_encoder +ffffffff81a8c0e0 T intel_is_dual_link_lvds +ffffffff81a8c150 T intel_lvds_init +ffffffff81a8c8c0 t intel_enable_lvds +ffffffff81a8ca10 t intel_pre_enable_lvds +ffffffff81a8cce0 t intel_lvds_compute_config +ffffffff81a8ce40 t pch_disable_lvds +ffffffff81a8ce60 t pch_post_disable_lvds +ffffffff81a8ce80 t gmch_disable_lvds +ffffffff81a8ceb0 t intel_lvds_get_hw_state +ffffffff81a8cf70 t intel_lvds_get_config +ffffffff81a8d070 t intel_lvds_shutdown +ffffffff81a8d110 t intel_no_lvds_dmi_callback +ffffffff81a8d160 t intel_disable_lvds +ffffffff81a8d290 t intel_lvds_get_modes +ffffffff81a8d2c0 t intel_lvds_mode_valid +ffffffff81a8d340 t intel_dual_link_lvds_callback +ffffffff81a8e000 T intel_modeset_setup_hw_state +ffffffff81a90000 T intel_modeset_verify_crtc +ffffffff81a903b0 t verify_connector_state +ffffffff81a90660 T intel_modeset_verify_disabled +ffffffff81a91000 T intel_opregion_notify_encoder +ffffffff81a91170 t swsci +ffffffff81a914a0 T intel_opregion_notify_adapter +ffffffff81a91500 T intel_opregion_asle_intr +ffffffff81a91550 T intel_opregion_setup +ffffffff81a91d60 t asle_work +ffffffff81a921e0 T intel_opregion_get_panel_type +ffffffff81a922d0 T intel_opregion_get_edid +ffffffff81a923b0 T intel_opregion_headless_sku +ffffffff81a92400 T intel_opregion_register +ffffffff81a92490 T intel_opregion_resume +ffffffff81a92520 T intel_opregion_suspend +ffffffff81a925c0 T intel_opregion_unregister +ffffffff81a92740 t intel_no_opregion_vbt_callback +ffffffff81a927a0 t intel_use_opregion_panel_type_callback +ffffffff81a93000 T intel_overlay_reset +ffffffff81a93050 T intel_overlay_switch_off +ffffffff81a93250 t intel_overlay_release_old_vid +ffffffff81a933f0 T intel_overlay_put_image_ioctl +ffffffff81a945c0 T intel_overlay_attrs_ioctl +ffffffff81a94a70 T intel_overlay_setup +ffffffff81a94cd0 t intel_overlay_last_flip_retire +ffffffff81a94d10 T intel_overlay_cleanup +ffffffff81a94dd0 T intel_overlay_capture_error_state +ffffffff81a94ec0 T intel_overlay_print_error_state +ffffffff81a95290 t intel_overlay_release_old_vid_tail +ffffffff81a95360 t intel_overlay_off_tail +ffffffff81a95510 t intel_overlay_flip_prepare +ffffffff81a96000 T intel_panel_use_ssc +ffffffff81a96060 T intel_panel_preferred_fixed_mode +ffffffff81a960b0 T intel_panel_fixed_mode +ffffffff81a96170 T intel_panel_downclock_mode +ffffffff81a96260 T intel_panel_highest_mode +ffffffff81a962c0 T intel_panel_get_modes +ffffffff81a96350 T intel_panel_drrs_type +ffffffff81a963a0 T intel_panel_compute_config +ffffffff81a96520 T intel_panel_add_edid_fixed_modes +ffffffff81a96a50 T intel_panel_add_vbt_lfp_fixed_mode +ffffffff81a96ab0 t intel_panel_add_fixed_mode +ffffffff81a96c30 T intel_panel_add_vbt_sdvo_fixed_mode +ffffffff81a96ca0 T intel_panel_add_encoder_fixed_mode +ffffffff81a96ce0 T intel_panel_fitting +ffffffff81a97330 T intel_panel_detect +ffffffff81a973c0 T intel_panel_mode_valid +ffffffff81a974d0 T intel_panel_init_alloc +ffffffff81a97520 T intel_panel_init +ffffffff81a975e0 T intel_panel_fini +ffffffff81a98000 T intel_has_pch_trancoder +ffffffff81a98060 T intel_crtc_pch_transcoder +ffffffff81a980a0 T intel_pch_transcoder_get_m1_n1 +ffffffff81a980f0 T intel_pch_transcoder_get_m2_n2 +ffffffff81a98140 T ilk_pch_pre_enable +ffffffff81a98170 T ilk_pch_enable +ffffffff81a98720 t ilk_pch_transcoder_set_timings +ffffffff81a989a0 T ilk_pch_disable +ffffffff81a989c0 T ilk_pch_post_disable +ffffffff81a98d00 T ilk_pch_get_config +ffffffff81a98ec0 T lpt_pch_enable +ffffffff81a990f0 T lpt_pch_disable +ffffffff81a99200 T lpt_pch_get_config +ffffffff81a992d0 T intel_pch_sanitize +ffffffff81a995b0 t assert_pch_dp_disabled +ffffffff81a996a0 t assert_pch_hdmi_disabled +ffffffff81a9a000 T lpt_disable_iclkip +ffffffff81a9a070 T lpt_iclkip +ffffffff81a9a100 T lpt_program_iclkip +ffffffff81a9a380 T lpt_get_iclkip +ffffffff81a9a490 T lpt_disable_clkout_dp +ffffffff81a9a570 T intel_init_pch_refclk +ffffffff81a9c000 T intel_crtc_initial_plane_config +ffffffff81a9d000 T intel_pps_lock +ffffffff81a9d060 T intel_pps_unlock +ffffffff81a9d0c0 T intel_pps_reset_all +ffffffff81a9d210 T intel_pps_check_power_unlocked +ffffffff81a9d3d0 T intel_pps_wait_power_cycle +ffffffff81a9d590 T intel_pps_vdd_on_unlocked +ffffffff81a9dac0 T intel_pps_vdd_on +ffffffff81a9dbc0 T intel_pps_vdd_off_sync +ffffffff81a9dc90 t intel_pps_vdd_off_sync_unlocked +ffffffff81a9df70 T intel_pps_vdd_off_unlocked +ffffffff81a9e080 T intel_pps_on_unlocked +ffffffff81a9e480 T intel_pps_on +ffffffff81a9e520 T intel_pps_off_unlocked +ffffffff81a9e770 T intel_pps_off +ffffffff81a9e810 T intel_pps_backlight_on +ffffffff81a9ea20 T intel_pps_backlight_off +ffffffff81a9ec30 T intel_pps_backlight_power +ffffffff81a9ee00 T vlv_pps_init +ffffffff81a9ef60 t vlv_detach_power_sequencer +ffffffff81a9f0e0 t vlv_steal_power_sequencer +ffffffff81a9f210 t pps_init_delays +ffffffff81a9f680 t pps_init_registers +ffffffff81a9fa20 T intel_pps_have_panel_power_or_vdd +ffffffff81a9fb80 T intel_pps_encoder_reset +ffffffff81a9fd10 t vlv_initial_power_sequencer_setup +ffffffff81a9ffc0 t pps_vdd_init +ffffffff81aa00d0 T intel_pps_init +ffffffff81aa0250 t edp_panel_vdd_work +ffffffff81aa0300 T intel_pps_init_late +ffffffff81aa0480 T intel_pps_unlock_regs_wa +ffffffff81aa0570 T intel_pps_setup +ffffffff81aa05e0 T assert_pps_unlocked +ffffffff81aa0830 t intel_pps_get_registers +ffffffff81aa0f00 t wait_panel_status +ffffffff81aa11d0 t intel_pps_readout_hw_state +ffffffff81aa1390 t __delayed_work_tick +ffffffff81aa2000 T intel_psr_irq_handler +ffffffff81aa2680 T intel_psr_init_dpcd +ffffffff81aa2910 T intel_psr_compute_config +ffffffff81aa31c0 T intel_psr_get_config +ffffffff81aa3370 T intel_psr_disable +ffffffff81aa3480 t intel_psr_disable_locked +ffffffff81aa38f0 T intel_psr_pause +ffffffff81aa3ae0 t intel_psr_exit +ffffffff81aa3dc0 T intel_psr_resume +ffffffff81aa3e50 t intel_psr_activate +ffffffff81aa45f0 T intel_psr2_disable_plane_sel_fetch +ffffffff81aa4660 T intel_psr2_program_plane_sel_fetch +ffffffff81aa4810 T intel_psr2_program_trans_man_trk_ctl +ffffffff81aa4960 T intel_psr2_sel_fetch_update +ffffffff81aa4ff0 T intel_psr_pre_plane_update +ffffffff81aa51c0 T intel_psr_post_plane_update +ffffffff81aa5c50 T intel_psr_wait_for_idle_locked +ffffffff81aa5e30 T intel_psr_debug_set +ffffffff81aa6060 t psr_irq_control +ffffffff81aa61b0 T intel_psr_invalidate +ffffffff81aa6470 T intel_psr_flush +ffffffff81aa6940 T intel_psr_init +ffffffff81aa6a70 t intel_psr_work +ffffffff81aa6c20 t tgl_dc3co_disable_work +ffffffff81aa6c70 T intel_psr_short_pulse +ffffffff81aa7030 T intel_psr_enabled +ffffffff81aa70b0 T intel_psr_lock +ffffffff81aa71a0 T intel_psr_unlock +ffffffff81aa7290 t tgl_psr2_disable_dc3co +ffffffff81aa73c0 t __delayed_work_tick +ffffffff81aa8000 T intel_lookup_range_min_qp +ffffffff81aa80b0 T intel_lookup_range_max_qp +ffffffff81aa9000 T intel_init_quirks +ffffffff81aa90f0 T intel_has_quirk +ffffffff81aa9130 t quirk_ssc_force_disable +ffffffff81aa9160 t quirk_invert_brightness +ffffffff81aa9190 t quirk_backlight_present +ffffffff81aa91c0 t quirk_increase_t12_delay +ffffffff81aa91f0 t quirk_increase_ddi_disabled_time +ffffffff81aa9220 t intel_dmi_reverse_brightness +ffffffff81aa9270 t intel_dmi_no_pps_backlight +ffffffff81aaa000 T intel_sdvo_port_enabled +ffffffff81aaa0a0 T intel_sdvo_init +ffffffff81aaac70 t intel_sdvo_compute_config +ffffffff81aab1d0 t pch_disable_sdvo +ffffffff81aab200 t pch_post_disable_sdvo +ffffffff81aab210 t intel_disable_sdvo +ffffffff81aab380 t intel_sdvo_pre_enable +ffffffff81aabd00 t intel_enable_sdvo +ffffffff81aabf00 t intel_sdvo_get_hw_state +ffffffff81aabff0 t intel_sdvo_get_config +ffffffff81aac560 t intel_sdvo_ddc_proxy_xfer +ffffffff81aac610 t intel_sdvo_ddc_proxy_func +ffffffff81aac640 t __intel_sdvo_write_cmd +ffffffff81aacb00 t proxy_lock_bus +ffffffff81aacb30 t proxy_trylock_bus +ffffffff81aacb60 t proxy_unlock_bus +ffffffff81aacb90 t intel_sdvo_enc_destroy +ffffffff81aacba0 t intel_sdvo_get_preferred_input_mode +ffffffff81aacf30 t intel_sdvo_get_dtd_from_mode +ffffffff81aad0a0 t intel_sdvo_read_response +ffffffff81aad540 t intel_sdvo_write_sdvox +ffffffff81aad730 t intel_sdvo_write_infoframe +ffffffff81aad900 t intel_sdvo_dvi_init +ffffffff81aadb90 t intel_sdvo_tv_init +ffffffff81aadeb0 t intel_sdvo_lvds_init +ffffffff81aae0a0 t intel_sdvo_hotplug +ffffffff81aae0e0 t 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skl_ddb_allocation_overlaps +ffffffff81ac7df0 T skl_wm_get_hw_state +ffffffff81ac83e0 t skl_pipe_wm_get_hw_state +ffffffff81ac8770 t skl_compute_dbuf_slices +ffffffff81ac8ca0 T skl_wm_sanitize +ffffffff81ac8ef0 T intel_wm_state_verify +ffffffff81ac9820 T skl_watermark_ipc_enabled +ffffffff81ac9850 T skl_watermark_ipc_update +ffffffff81ac9900 T skl_watermark_ipc_init +ffffffff81ac9a00 T skl_wm_init +ffffffff81aca030 T intel_atomic_get_dbuf_state +ffffffff81aca050 T intel_dbuf_init +ffffffff81aca0c0 T intel_dbuf_pre_plane_update +ffffffff81aca3a0 T intel_dbuf_post_plane_update +ffffffff81aca470 T intel_mbus_dbox_update +ffffffff81aca6e0 T skl_watermark_ipc_debugfs_register +ffffffff81aca710 t skl_sagv_disable +ffffffff81aca830 t skl_ddb_entry_for_slices +ffffffff81aca970 t skl_compute_wm +ffffffff81acd7b0 t skl_build_plane_wm_single +ffffffff81acdae0 t skl_compute_wm_params +ffffffff81acded0 t skl_compute_plane_wm +ffffffff81ace3b0 t intel_dbuf_duplicate_state +ffffffff81ace440 t intel_dbuf_destroy_state +ffffffff81acf000 T pixel_format_from_register_bits +ffffffff81acf060 T vlv_dsi_wait_for_fifo_empty +ffffffff81acf120 T vlv_dsi_init +ffffffff81acf980 t intel_dsi_compute_config +ffffffff81acfad0 t intel_dsi_pre_enable +ffffffff81ad1750 t bxt_dsi_enable +ffffffff81ad17b0 t intel_dsi_disable +ffffffff81ad1a60 t intel_dsi_post_disable +ffffffff81ad2740 t intel_dsi_get_hw_state +ffffffff81ad29f0 t intel_dsi_get_config +ffffffff81ad31b0 t intel_dsi_shutdown +ffffffff81ad32a0 t intel_dsi_encoder_destroy +ffffffff81ad32d0 t intel_dsi_prepare +ffffffff81ad3f20 t dpi_send_cmd +ffffffff81ad40b0 t intel_dsi_host_attach +ffffffff81ad40e0 t intel_dsi_host_detach +ffffffff81ad4110 t intel_dsi_host_transfer +ffffffff81ad5000 T vlv_dsi_pll_compute +ffffffff81ad5390 t vlv_dsi_pclk +ffffffff81ad5540 T vlv_dsi_pll_enable +ffffffff81ad5770 T vlv_dsi_pll_disable +ffffffff81ad57f0 T bxt_dsi_pll_is_enabled +ffffffff81ad58c0 T bxt_dsi_pll_disable +ffffffff81ad59c0 T vlv_dsi_get_pclk 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i915_gem_dumb_create +ffffffff81ade610 T i915_gem_create_ioctl +ffffffff81ade6e0 T i915_gem_create_ext_ioctl +ffffffff81ade8a0 t ext_set_placements +ffffffff81adecb0 t ext_set_protected +ffffffff81adf000 T i915_gem_prime_export +ffffffff81adf090 T i915_gem_prime_import +ffffffff81ae0000 T i915_gem_cpu_write_needs_clflush +ffffffff81ae0060 T i915_gem_object_flush_if_display +ffffffff81ae0270 T i915_gem_object_flush_if_display_locked +ffffffff81ae02f0 T i915_gem_object_set_to_wc_domain +ffffffff81ae03f0 t flush_write_domain +ffffffff81ae0560 T i915_gem_object_set_to_gtt_domain +ffffffff81ae06b0 T i915_gem_object_set_cache_level +ffffffff81ae0750 T i915_gem_get_caching_ioctl +ffffffff81ae07f0 T i915_gem_set_caching_ioctl +ffffffff81ae0a30 t i915_gem_object_lock_interruptible +ffffffff81ae0b60 T i915_gem_object_pin_to_display_plane +ffffffff81ae0d50 T i915_gem_object_set_to_cpu_domain +ffffffff81ae0e20 T i915_gem_set_domain_ioctl +ffffffff81ae1180 T i915_gem_object_prepare_read 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i915_gem_object_create_lmem +ffffffff81ae9000 T i915_gem_mmap_ioctl +ffffffff81ae9210 T i915_gem_mmap_gtt_version +ffffffff81ae9240 T remap_io_mapping +ffffffff81ae9300 T i915_gem_fault +ffffffff81ae9df0 T __i915_gem_object_release_mmap_gtt +ffffffff81ae9e70 T i915_gem_object_release_mmap_gtt +ffffffff81ae9f20 T i915_gem_object_runtime_pm_release_mmap_offset +ffffffff81ae9f80 T i915_gem_object_release_mmap_offset +ffffffff81aea080 T i915_gem_dumb_mmap_offset +ffffffff81aea0f0 t __assign_mmap_offset_handle +ffffffff81aea550 T i915_gem_mmap_offset_ioctl +ffffffff81aea660 T i915_gem_mmap +ffffffff81aea790 t __ww_mutex_lock +ffffffff81aeb000 T i915_gem_object_alloc +ffffffff81aeb060 T i915_gem_object_free +ffffffff81aeb080 T i915_gem_object_init +ffffffff81aeb1a0 T __i915_gem_object_fini +ffffffff81aeb1c0 T i915_gem_object_set_cache_coherency +ffffffff81aeb240 T i915_gem_object_can_bypass_llc +ffffffff81aeb290 T __i915_gem_free_object_rcu +ffffffff81aeb310 T __i915_gem_object_pages_fini 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intel_execlists_show_requests +ffffffff81b16f80 T intel_execlists_dump_active_requests +ffffffff81b17020 t process_csb +ffffffff81b17430 t post_process_csb +ffffffff81b17720 t wa_csb_read +ffffffff81b17850 t execlists_capture_work +ffffffff81b17af0 t execlists_resume +ffffffff81b17cf0 t execlists_request_alloc +ffffffff81b17f80 t add_to_engine +ffffffff81b18000 t remove_from_engine +ffffffff81b180e0 t execlists_reset_prepare +ffffffff81b18190 t execlists_reset_rewind +ffffffff81b181e0 t execlists_reset_cancel +ffffffff81b18490 t execlists_reset_finish +ffffffff81b184f0 t execlists_park +ffffffff81b18530 t execlists_set_default_submission +ffffffff81b185a0 t gen8_logical_ring_enable_irq +ffffffff81b18600 t gen8_logical_ring_disable_irq +ffffffff81b18640 t execlists_irq_handler +ffffffff81b187e0 t execlists_engine_busyness +ffffffff81b188f0 t execlists_context_alloc +ffffffff81b18910 t execlists_context_pre_pin +ffffffff81b189b0 t execlists_context_pin +ffffffff81b189d0 t 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intel_gt_driver_late_release_all +ffffffff81b22760 T intel_gt_probe_all +ffffffff81b22a50 t intel_gt_tile_setup +ffffffff81b22b20 T intel_gt_release_all +ffffffff81b22ba0 T intel_gt_tiles_init +ffffffff81b22e90 T intel_gt_info_print +ffffffff81b22ed0 T intel_gt_invalidate_tlb +ffffffff81b24000 T intel_gt_buffer_pool_mark_used +ffffffff81b24060 T intel_gt_get_buffer_pool +ffffffff81b24270 T intel_gt_init_buffer_pool +ffffffff81b24330 t pool_free_work +ffffffff81b243d0 T intel_gt_flush_buffer_pool +ffffffff81b24470 t pool_free_older_than +ffffffff81b24600 T intel_gt_fini_buffer_pool +ffffffff81b24630 t pool_retire +ffffffff81b24760 t __delayed_work_tick +ffffffff81b25000 T intel_gt_init_clock_frequency +ffffffff81b251d0 T intel_gt_clock_interval_to_ns +ffffffff81b25230 T intel_gt_pm_interval_to_ns +ffffffff81b25290 T intel_gt_ns_to_clock_interval +ffffffff81b25300 T intel_gt_ns_to_pm_interval +ffffffff81b26000 T intel_gt_debugfs_reset_show +ffffffff81b26050 T intel_gt_debugfs_reset_store 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intel_rps_read_actual_frequency +ffffffff81b4b050 T intel_rps_read_punit_req +ffffffff81b4b0d0 T intel_rps_read_punit_req_frequency +ffffffff81b4b1f0 T intel_rps_get_requested_frequency +ffffffff81b4b3b0 T intel_rps_get_max_frequency +ffffffff81b4b4a0 T intel_rps_get_max_raw_freq +ffffffff81b4b520 T intel_rps_get_rp0_frequency +ffffffff81b4b610 T intel_rps_get_rp1_frequency +ffffffff81b4b700 T intel_rps_get_rpn_frequency +ffffffff81b4b7f0 T intel_rps_set_max_frequency +ffffffff81b4ba60 T intel_rps_get_min_frequency +ffffffff81b4bb50 T intel_rps_get_min_raw_freq +ffffffff81b4bbd0 T intel_rps_set_min_frequency +ffffffff81b4bd50 T intel_rps_raise_unslice +ffffffff81b4be30 T intel_rps_lower_unslice +ffffffff81b4bf10 T rps_read_mask_mmio +ffffffff81b4bfa0 T intel_rps_driver_register +ffffffff81b4bfe0 T intel_rps_driver_unregister +ffffffff81b4c030 T i915_read_mch_val +ffffffff81b4c4b0 T i915_gpu_raise +ffffffff81b4c540 T i915_gpu_lower +ffffffff81b4c5d0 T i915_gpu_busy +ffffffff81b4c640 T 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i915_ttm_buddy_man_debug +ffffffff81bbb000 T i915_user_extensions +ffffffff81bbc000 T __i915_printk +ffffffff81bbc0c0 T add_taint_for_CI +ffffffff81bbc0f0 T cancel_timer +ffffffff81bbc140 T set_timer_ms +ffffffff81bbc1f0 T i915_vtd_active +ffffffff81bbd000 T intel_vgpu_detect +ffffffff81bbd030 T intel_vgpu_register +ffffffff81bbd090 T intel_vgpu_active +ffffffff81bbd0c0 T intel_vgpu_has_full_ppgtt +ffffffff81bbd100 T intel_vgpu_has_hwsp_emulation +ffffffff81bbd140 T intel_vgpu_has_huge_gtt +ffffffff81bbd180 T intel_vgt_deballoon +ffffffff81bbd3c0 T intel_vgt_balloon +ffffffff81bbe000 T i915_vma_instance +ffffffff81bbe5b0 T i915_vma_work +ffffffff81bbe620 T i915_vma_wait_for_bind +ffffffff81bbe6a0 T i915_vma_bind +ffffffff81bbe9f0 T i915_vma_pin_iomap +ffffffff81bbebc0 T i915_vma_flush_writes +ffffffff81bbec30 T i915_vma_unpin_iomap +ffffffff81bbecc0 T i915_vma_unpin_and_release +ffffffff81bbed30 T i915_vma_misplaced +ffffffff81bbedd0 T __i915_vma_set_map_and_fenceable +ffffffff81bbee50 T i915_gem_valid_gtt_space +ffffffff81bbeee0 T vma_invalidate_tlb +ffffffff81bbef20 T i915_vma_pin_ww +ffffffff81bbf940 T i915_ggtt_pin +ffffffff81bbfa20 t __i915_ggtt_pin +ffffffff81bbfb80 t i915_gem_object_lock +ffffffff81bbfd90 T i915_vma_close +ffffffff81bbfe60 T i915_vma_reopen +ffffffff81bbfee0 T i915_vma_destroy_locked +ffffffff81bbffd0 t release_references +ffffffff81bc0100 T i915_vma_destroy +ffffffff81bc0240 T i915_vma_parked +ffffffff81bc0520 T i915_vma_revoke_mmap +ffffffff81bc0620 T _i915_vma_move_to_active +ffffffff81bc0850 T __i915_vma_evict +ffffffff81bc0bc0 T __i915_vma_unbind +ffffffff81bc0c60 T i915_vma_unbind +ffffffff81bc0db0 T i915_vma_unbind_async +ffffffff81bc0fa0 T i915_vma_unbind_unlocked +ffffffff81bc10b0 T i915_vma_make_unshrinkable +ffffffff81bc10f0 T i915_vma_make_shrinkable +ffffffff81bc1110 T i915_vma_make_purgeable +ffffffff81bc1130 T i915_vma_module_exit +ffffffff81bc1150 T i915_vma_module_init +ffffffff81bc11b0 t __i915_vma_active +ffffffff81bc1200 t __i915_vma_retire +ffffffff81bc1250 t __vma_bind +ffffffff81bc12f0 t __vma_release +ffffffff81bc1370 t intel_rotate_pages +ffffffff81bc16b0 t intel_remap_pages +ffffffff81bc1a70 t intel_partial_pages +ffffffff81bc2000 T i915_vma_resource_alloc +ffffffff81bc2050 T i915_vma_resource_free +ffffffff81bc2090 T i915_vma_resource_unhold +ffffffff81bc20a0 t __i915_vma_resource_unhold +ffffffff81bc2190 T i915_vma_resource_hold +ffffffff81bc21e0 T i915_vma_resource_unbind +ffffffff81bc2310 T __i915_vma_resource_init +ffffffff81bc2370 t i915_vma_resource_fence_notify +ffffffff81bc2440 T i915_vma_resource_bind_dep_sync +ffffffff81bc25c0 T i915_vma_resource_bind_dep_sync_all +ffffffff81bc2660 T i915_vma_resource_bind_dep_await +ffffffff81bc2800 T i915_vma_resource_module_exit +ffffffff81bc2820 T i915_vma_resource_module_init +ffffffff81bc2880 t get_driver_name +ffffffff81bc28b0 t get_timeline_name +ffffffff81bc28e0 t unbind_fence_release +ffffffff81bc2920 t i915_vma_resource_unbind_work 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intel_detect_pch +ffffffff81bc7310 t intel_pch_match +ffffffff81bc7360 t intel_pch_type +ffffffff81bc8000 T snb_pcode_read +ffffffff81bc80d0 t __snb_pcode_rw +ffffffff81bc8260 T snb_pcode_write_timeout +ffffffff81bc8330 T skl_pcode_request +ffffffff81bc8670 T intel_pcode_init +ffffffff81bc86d0 T snb_pcode_read_p +ffffffff81bc87e0 T snb_pcode_write_p +ffffffff81bc9000 T intel_set_memory_cxsr +ffffffff81bc90a0 t _intel_set_memory_cxsr +ffffffff81bc9350 T intel_wm_plane_visible +ffffffff81bc93b0 T ilk_wm_max_level +ffffffff81bc9420 T intel_print_wm_latency +ffffffff81bc9580 T ilk_disable_lp_wm +ffffffff81bc9660 T g4x_wm_get_hw_state +ffffffff81bc9e30 T g4x_wm_sanitize +ffffffff81bc9fd0 t g4x_program_watermarks +ffffffff81bca370 T vlv_wm_get_hw_state +ffffffff81bcb040 t vlv_invalidate_wms +ffffffff81bcb1a0 T vlv_wm_sanitize +ffffffff81bcb2f0 t vlv_program_watermarks +ffffffff81bcba40 T ilk_wm_get_hw_state +ffffffff81bcbeb0 T intel_init_clock_gating +ffffffff81bcbed0 T intel_suspend_hw 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vlv_init_clock_gating +ffffffff81bced00 t gen6_init_clock_gating +ffffffff81bcef00 t ilk_init_clock_gating +ffffffff81bcf0d0 t g4x_init_clock_gating +ffffffff81bcf190 t i965gm_init_clock_gating +ffffffff81bcf260 t i965g_init_clock_gating +ffffffff81bcf2e0 t gen3_init_clock_gating +ffffffff81bcf3e0 t i85x_init_clock_gating +ffffffff81bcf480 t i830_init_clock_gating +ffffffff81bcf4b0 t nop_init_clock_gating +ffffffff81bcf4e0 t ilk_compute_pipe_wm +ffffffff81bcf960 t ilk_compute_intermediate_wm +ffffffff81bcfc90 t ilk_initial_watermarks +ffffffff81bcfd00 t ilk_optimize_watermarks +ffffffff81bcfdb0 t ilk_compute_wm_level +ffffffff81bd0320 t ilk_validate_wm_level +ffffffff81bd0460 t ilk_program_watermarks +ffffffff81bd1220 t ilk_wm_merge +ffffffff81bd1490 t vlv_compute_pipe_wm +ffffffff81bd22d0 t vlv_compute_intermediate_wm +ffffffff81bd25d0 t vlv_initial_watermarks +ffffffff81bd2650 t vlv_atomic_update_fifo +ffffffff81bd2960 t vlv_optimize_watermarks +ffffffff81bd2a20 t g4x_compute_pipe_wm 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fwtable_reg_read_fw_domains +ffffffff81bdfb60 t fwtable_write8 +ffffffff81bdfeb0 t fwtable_write16 +ffffffff81be0200 t fwtable_write32 +ffffffff81be0550 t fwtable_reg_write_fw_domains +ffffffff81be0700 t gen6_write8 +ffffffff81be08c0 t gen6_write16 +ffffffff81be0a80 t gen6_write32 +ffffffff81be0c40 t gen6_reg_write_fw_domains +ffffffff81be0c70 t i915_pmic_bus_access_notifier +ffffffff81be0cf0 t fw_domains_get_with_thread_status +ffffffff81be0e30 t fw_domains_get_with_fallback +ffffffff81be12d0 t fw_domain_wait_ack_with_fallback +ffffffff81be1550 t fw_domains_get_normal +ffffffff81be1880 t ___force_wake_auto +ffffffff81be1910 t __gen6_gt_wait_for_fifo +ffffffff81be2000 T __intel_wakeref_get_first +ffffffff81be20a0 T __intel_wakeref_put_last +ffffffff81be2100 t ____intel_wakeref_put_last +ffffffff81be21e0 T __intel_wakeref_init +ffffffff81be2260 t __intel_wakeref_put_work +ffffffff81be22d0 T intel_wakeref_wait_for_idle +ffffffff81be2410 T intel_wakeref_auto_init +ffffffff81be2490 t wakeref_auto_timeout +ffffffff81be2540 T intel_wakeref_auto +ffffffff81be2740 T intel_wakeref_auto_fini +ffffffff81be2800 t __delayed_work_tick +ffffffff81be3000 T intel_wopcm_init_early +ffffffff81be3080 T intel_wopcm_init +ffffffff81be4000 T vlv_iosf_sb_get +ffffffff81be4020 T vlv_iosf_sb_put +ffffffff81be4040 T vlv_punit_read +ffffffff81be4090 t vlv_sideband_rw +ffffffff81be4240 T vlv_punit_write +ffffffff81be4290 T vlv_bunit_read +ffffffff81be42e0 T vlv_bunit_write +ffffffff81be4330 T vlv_nc_read +ffffffff81be4380 T vlv_iosf_sb_read +ffffffff81be43d0 T vlv_iosf_sb_write +ffffffff81be4420 T vlv_cck_read +ffffffff81be4470 T vlv_cck_write +ffffffff81be44c0 T vlv_ccu_read +ffffffff81be4510 T vlv_ccu_write +ffffffff81be4560 T vlv_dpio_read +ffffffff81be4630 T vlv_dpio_write +ffffffff81be46a0 T vlv_flisdsi_read +ffffffff81be46f0 T vlv_flisdsi_write +ffffffff81be5000 T vlv_suspend_complete +ffffffff81be5a50 T vlv_resume_prepare +ffffffff81be6490 T vlv_suspend_init +ffffffff81be6500 T vlv_suspend_cleanup +ffffffff81be6560 t vlv_wait_for_pw_status +ffffffff81be7000 T atom_execute_table_scratch_unlocked +ffffffff81be70a0 t atom_execute_table_locked +ffffffff81be73d0 T atom_execute_table +ffffffff81be7480 T atom_parse +ffffffff81be7660 T atom_destroy +ffffffff81be76a0 T atom_asic_init +ffffffff81be78b0 T atom_parse_data_header +ffffffff81be7950 T atom_parse_cmd_header +ffffffff81be79d0 T atom_allocate_fb_scratch +ffffffff81be7aa0 t atom_op_move +ffffffff81be7c80 t atom_op_and +ffffffff81be7e60 t atom_op_or +ffffffff81be8040 t atom_op_shift_left +ffffffff81be8230 t atom_op_shift_right +ffffffff81be8420 t atom_op_mul +ffffffff81be8570 t atom_op_div +ffffffff81be86e0 t atom_op_add +ffffffff81be88c0 t atom_op_sub +ffffffff81be8aa0 t atom_op_setport +ffffffff81be8c20 t atom_op_setregblock +ffffffff81be8ce0 t atom_op_setfbbase +ffffffff81be8db0 t atom_op_compare +ffffffff81be8fa0 t atom_op_switch +ffffffff81be91f0 t atom_op_jump +ffffffff81be9470 t atom_op_test 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atombios_crtc_program_ss +ffffffff81bedb90 T atombios_crtc_mode_set +ffffffff81bee5c0 T radeon_atombios_init_crtc +ffffffff81bee6b0 t radeon_bo_reserve +ffffffff81bee830 t radeon_bo_unreserve +ffffffff81bee910 t atombios_crtc_program_pll +ffffffff81beebc0 t atombios_crtc_prepare +ffffffff81beec70 t atombios_crtc_commit +ffffffff81beece0 t atombios_crtc_mode_fixup +ffffffff81befa60 t atombios_crtc_disable +ffffffff81befcc0 t radeon_get_shared_nondp_ppll +ffffffff81bf0000 T radeon_atom_copy_swap +ffffffff81bf0020 T radeon_dp_aux_init +ffffffff81bf0110 t radeon_dp_aux_transfer_atom +ffffffff81bf02e0 T radeon_dp_getsinktype +ffffffff81bf0350 T radeon_dp_getdpcd +ffffffff81bf04c0 T radeon_dp_get_panel_mode +ffffffff81bf05d0 T radeon_dp_set_link_config +ffffffff81bf0650 t radeon_dp_get_dp_link_config +ffffffff81bf07d0 T radeon_dp_mode_valid_helper +ffffffff81bf0880 T radeon_dp_needs_link_train +ffffffff81bf08f0 T radeon_dp_set_rx_power_state +ffffffff81bf0970 T radeon_dp_link_train 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+ffffffff81c05670 T ci_dpm_print_power_state +ffffffff81c05730 T ci_dpm_get_current_sclk +ffffffff81c05800 T ci_dpm_get_current_mclk +ffffffff81c058d0 T ci_dpm_get_sclk +ffffffff81c05920 T ci_dpm_get_mclk +ffffffff81c05970 t ci_populate_all_graphic_levels +ffffffff81c05ef0 t ci_populate_all_memory_levels +ffffffff81c06800 t ci_do_program_memory_timing_parameters +ffffffff81c06a20 t ci_populate_smc_voltage_table +ffffffff81c06b80 t ci_enable_sclk_mclk_dpm +ffffffff81c07000 T ci_copy_bytes_to_smc +ffffffff81c07250 T ci_start_smc +ffffffff81c07290 T ci_reset_smc +ffffffff81c072d0 T ci_program_jump_on_start +ffffffff81c07300 T ci_stop_smc_clock +ffffffff81c07340 T ci_start_smc_clock +ffffffff81c07380 T ci_is_smc_running +ffffffff81c073f0 T ci_load_smc_ucode +ffffffff81c07580 T ci_read_smc_sram_dword +ffffffff81c07650 T ci_write_smc_sram_dword +ffffffff81c08000 T cik_get_allowed_info_register +ffffffff81c080a0 T cik_didt_rreg +ffffffff81c08140 T cik_didt_wreg +ffffffff81c081c0 T ci_get_temp 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+ffffffff81c1ccf0 T cik_sdma_vm_set_pages +ffffffff81c1ce60 T cik_sdma_vm_pad_ib +ffffffff81c1ceb0 T cik_dma_vm_flush +ffffffff81c1e000 T cypress_enable_spread_spectrum +ffffffff81c1e140 T cypress_start_dpm +ffffffff81c1e190 T cypress_enable_sclk_control +ffffffff81c1e1f0 T cypress_enable_mclk_control +ffffffff81c1e250 T cypress_notify_smc_display_change +ffffffff81c1e2a0 T cypress_program_response_times +ffffffff81c1e370 T cypress_advertise_gen2_capability +ffffffff81c1e440 T cypress_notify_link_speed_change_after_state_change +ffffffff81c1e500 T cypress_notify_link_speed_change_before_state_change +ffffffff81c1e5c0 T cypress_get_strobe_mode_settings +ffffffff81c1e6c0 T cypress_get_mclk_frequency_ratio +ffffffff81c1e770 T cypress_map_clkf_to_ibias +ffffffff81c1e830 T cypress_convert_power_level_to_smc +ffffffff81c1ebf0 t cypress_populate_mclk_value +ffffffff81c1efc0 T cypress_upload_sw_state +ffffffff81c1f140 T cypress_upload_mc_reg_table +ffffffff81c1f200 t cypress_convert_mc_reg_table_to_smc +ffffffff81c1f4a0 T cypress_calculate_burst_time +ffffffff81c1f530 T cypress_program_memory_timing_parameters +ffffffff81c1f6e0 T cypress_populate_smc_initial_state +ffffffff81c1fa80 T cypress_populate_smc_acpi_state +ffffffff81c1fe10 T cypress_construct_voltage_tables +ffffffff81c1fec0 t cypress_trim_voltage_table_to_fit_state_table +ffffffff81c200b0 T cypress_populate_smc_voltage_tables +ffffffff81c20200 T cypress_get_mvdd_configuration +ffffffff81c202c0 T cypress_populate_mc_reg_table +ffffffff81c20520 T cypress_get_table_locations +ffffffff81c20600 T cypress_enable_display_gap +ffffffff81c20660 T cypress_dpm_setup_asic +ffffffff81c20750 T cypress_dpm_enable +ffffffff81c21230 t cypress_force_mc_use_s1 +ffffffff81c214b0 t cypress_gfx_clock_gating_enable +ffffffff81c217c0 t cypress_mg_clock_gating_enable +ffffffff81c21a40 T cypress_dpm_disable +ffffffff81c21c70 T cypress_dpm_set_power_state +ffffffff81c21f20 T cypress_dpm_display_configuration_changed +ffffffff81c22000 T cypress_dpm_init +ffffffff81c22270 T cypress_dpm_fini +ffffffff81c22300 T cypress_dpm_vblank_too_short +ffffffff81c22370 t cypress_wait_for_mc_sequencer +ffffffff81c23000 T dce3_2_afmt_hdmi_write_speaker_allocation +ffffffff81c23070 T dce3_2_afmt_dp_write_speaker_allocation +ffffffff81c230e0 T dce3_2_afmt_write_sad_regs +ffffffff81c23200 T dce3_2_audio_set_dto +ffffffff81c23340 T dce3_2_hdmi_update_acr +ffffffff81c236a0 T dce3_2_set_audio_packet +ffffffff81c23830 T dce3_2_set_mute +ffffffff81c24000 T dce6_endpoint_rreg +ffffffff81c240e0 T dce6_endpoint_wreg +ffffffff81c241d0 T dce6_audio_get_pin +ffffffff81c24340 T dce6_afmt_select_pin +ffffffff81c243d0 T dce6_afmt_write_latency_fields +ffffffff81c24490 T dce6_afmt_hdmi_write_speaker_allocation +ffffffff81c24560 T dce6_afmt_dp_write_speaker_allocation +ffffffff81c24630 T dce6_afmt_write_sad_regs +ffffffff81c24770 T dce6_audio_enable +ffffffff81c247c0 T dce6_hdmi_audio_set_dto +ffffffff81c24830 T dce6_dp_audio_set_dto +ffffffff81c25000 T eg_cg_rreg +ffffffff81c25080 t r100_mm_rreg +ffffffff81c250d0 T eg_cg_wreg +ffffffff81c25140 T eg_pif_phy0_rreg +ffffffff81c251c0 T eg_pif_phy0_wreg +ffffffff81c25220 T eg_pif_phy1_rreg +ffffffff81c252a0 T eg_pif_phy1_wreg +ffffffff81c25300 T evergreen_get_allowed_info_register +ffffffff81c25390 T evergreen_tiling_fields +ffffffff81c25430 T sumo_set_uvd_clocks +ffffffff81c25510 t sumo_set_uvd_clock +ffffffff81c256d0 T evergreen_set_uvd_clocks +ffffffff81c25c70 T evergreen_fix_pci_max_read_req_size +ffffffff81c25e20 T dce4_program_fmt +ffffffff81c25f40 T dce4_wait_for_vblank +ffffffff81c261c0 T evergreen_page_flip +ffffffff81c26350 T evergreen_page_flip_pending +ffffffff81c263c0 T evergreen_get_temp +ffffffff81c26490 T sumo_get_temp +ffffffff81c264e0 T sumo_pm_init_profile +ffffffff81c26620 T btc_pm_init_profile +ffffffff81c26730 T evergreen_pm_misc +ffffffff81c268d0 T evergreen_pm_prepare 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+ffffffff81c3aa40 T dce4_set_audio_packet +ffffffff81c3ac50 T dce4_set_mute +ffffffff81c3ad60 T evergreen_hdmi_enable +ffffffff81c3b090 T evergreen_dp_enable +ffffffff81c3c000 T kv_dpm_enable_bapm +ffffffff81c3c070 T kv_dpm_enable +ffffffff81c3d5c0 t kv_enable_didt +ffffffff81c3d860 T kv_dpm_late_enable +ffffffff81c3da50 T kv_dpm_powergate_uvd +ffffffff81c3dbc0 T kv_dpm_disable +ffffffff81c3df30 T kv_dpm_force_performance_level +ffffffff81c3e0c0 t kv_force_dpm_lowest +ffffffff81c3e190 T kv_dpm_pre_set_power_state +ffffffff81c3e720 T kv_dpm_set_power_state +ffffffff81c3eed0 t kv_set_valid_clock_range +ffffffff81c3f090 t kv_calculate_ds_divider +ffffffff81c3f200 t kv_calculate_nbps_level_settings +ffffffff81c3f390 t kv_update_vce_dpm +ffffffff81c3f570 T kv_dpm_post_set_power_state +ffffffff81c3f610 T kv_dpm_setup_asic +ffffffff81c3f670 T kv_dpm_init +ffffffff81c3ff10 T kv_dpm_debugfs_print_current_performance_level +ffffffff81c3ff80 T kv_dpm_get_current_sclk +ffffffff81c3fff0 T kv_dpm_get_current_mclk +ffffffff81c40020 T kv_dpm_print_power_state +ffffffff81c400c0 T kv_dpm_fini +ffffffff81c40160 T kv_dpm_display_configuration_changed +ffffffff81c40190 T kv_dpm_get_sclk +ffffffff81c401e0 T kv_dpm_get_mclk +ffffffff81c41000 T kv_notify_message_to_smu +ffffffff81c410c0 T kv_dpm_get_enable_mask +ffffffff81c411a0 T kv_send_msg_to_smc_with_parameter +ffffffff81c41270 T kv_read_smc_sram_dword +ffffffff81c41300 T kv_smc_dpm_enable +ffffffff81c41430 T kv_smc_bapm_enable +ffffffff81c41560 T kv_copy_bytes_to_smc +ffffffff81c42000 T tn_smc_rreg +ffffffff81c42080 T tn_smc_wreg +ffffffff81c420f0 T ni_mc_load_microcode +ffffffff81c422e0 T ni_init_microcode +ffffffff81c42820 T cayman_get_allowed_info_register +ffffffff81c428b0 T tn_get_temp +ffffffff81c42940 T cayman_pcie_gart_tlb_flush +ffffffff81c42990 T cayman_cp_int_cntl_setup +ffffffff81c429e0 T cayman_fence_ring_emit +ffffffff81c42d90 T cayman_ring_ib_execute +ffffffff81c43210 T cayman_gfx_get_rptr +ffffffff81c432a0 T cayman_gfx_get_wptr +ffffffff81c43310 T cayman_gfx_set_wptr +ffffffff81c43390 T cayman_gpu_check_soft_reset +ffffffff81c43510 T cayman_asic_reset +ffffffff81c43810 T cayman_gfx_is_lockup +ffffffff81c43880 T cayman_resume +ffffffff81c43910 t ni_init_golden_registers +ffffffff81c439f0 t cayman_startup +ffffffff81c46120 T cayman_suspend +ffffffff81c46310 T cayman_init +ffffffff81c46910 T cayman_fini +ffffffff81c46b90 T cayman_vm_init +ffffffff81c46bf0 T cayman_vm_fini +ffffffff81c46c20 T cayman_vm_decode_fault +ffffffff81c46cb0 T cayman_vm_flush +ffffffff81c47130 T tn_set_vce_clocks +ffffffff81c48000 T cayman_dma_get_rptr +ffffffff81c48070 T cayman_dma_get_wptr +ffffffff81c480c0 T cayman_dma_set_wptr +ffffffff81c48110 T cayman_dma_ring_ib_execute +ffffffff81c484a0 T cayman_dma_stop +ffffffff81c48550 T cayman_dma_resume +ffffffff81c487a0 T cayman_dma_fini +ffffffff81c48860 T cayman_dma_is_lockup +ffffffff81c488e0 T cayman_dma_vm_copy_pages +ffffffff81c489d0 T cayman_dma_vm_write_pages +ffffffff81c48b30 T cayman_dma_vm_set_pages +ffffffff81c48c90 T cayman_dma_vm_pad_ib +ffffffff81c48ce0 T cayman_dma_vm_flush +ffffffff81c4a000 T ni_get_pi +ffffffff81c4a030 T ni_get_ps +ffffffff81c4a060 T ni_dpm_vblank_too_short +ffffffff81c4a0d0 T ni_dpm_force_performance_level +ffffffff81c4a220 T ni_copy_and_switch_arb_sets +ffffffff81c4a500 T ni_set_uvd_clock_before_set_eng_clock +ffffffff81c4a580 T ni_set_uvd_clock_after_set_eng_clock +ffffffff81c4a600 T ni_dpm_setup_asic +ffffffff81c4a810 T ni_update_current_ps +ffffffff81c4a8d0 T ni_update_requested_ps +ffffffff81c4a990 T ni_dpm_enable +ffffffff81c4dbd0 t ni_populate_smc_tdp_limits +ffffffff81c4dd90 T ni_dpm_disable +ffffffff81c4e150 T ni_dpm_pre_set_power_state +ffffffff81c4e730 T ni_dpm_set_power_state +ffffffff81c4f850 T ni_dpm_post_set_power_state +ffffffff81c4f920 T ni_dpm_init +ffffffff81c502f0 T ni_dpm_fini +ffffffff81c503a0 T ni_dpm_print_power_state +ffffffff81c50470 T ni_dpm_debugfs_print_current_performance_level +ffffffff81c504b0 T ni_dpm_get_current_sclk +ffffffff81c50520 T ni_dpm_get_current_mclk +ffffffff81c50590 T ni_dpm_get_sclk +ffffffff81c505f0 T ni_dpm_get_mclk +ffffffff81c50650 t ni_do_program_memory_timing_parameters +ffffffff81c50780 t ni_calculate_sclk_params +ffffffff81c509a0 t ni_calculate_power_boost_limit +ffffffff81c50b50 t ni_populate_mclk_value +ffffffff81c51000 T r100_wait_for_vblank +ffffffff81c511a0 T r100_page_flip +ffffffff81c51450 T r100_page_flip_pending +ffffffff81c51500 T r100_pm_get_dynpm_state +ffffffff81c51720 T r100_pm_init_profile +ffffffff81c51800 T r100_pm_misc +ffffffff81c51c40 T r100_pm_prepare +ffffffff81c51d00 T r100_pm_finish +ffffffff81c51dc0 T r100_gui_idle +ffffffff81c51e00 T r100_hpd_sense +ffffffff81c51e60 T r100_hpd_set_polarity +ffffffff81c51f20 T r100_hpd_init +ffffffff81c51fc0 T r100_hpd_fini +ffffffff81c52020 T r100_pci_gart_tlb_flush +ffffffff81c52050 T r100_pci_gart_init +ffffffff81c52120 T r100_pci_gart_get_page_entry +ffffffff81c52150 T r100_pci_gart_set_page +ffffffff81c52190 T r100_pci_gart_enable +ffffffff81c52280 T r100_pci_gart_disable +ffffffff81c52300 T r100_pci_gart_fini +ffffffff81c52380 T r100_irq_set +ffffffff81c52460 T r100_irq_disable +ffffffff81c524d0 T r100_irq_process +ffffffff81c527d0 T r100_get_vblank_counter +ffffffff81c52820 T r100_fence_ring_emit +ffffffff81c52c90 T r100_semaphore_ring_emit +ffffffff81c52cc0 T r100_copy_blit +ffffffff81c53360 T r100_ring_start +ffffffff81c53450 T r100_gfx_get_rptr +ffffffff81c534b0 T r100_gfx_get_wptr +ffffffff81c534f0 T r100_gfx_set_wptr +ffffffff81c53530 T r100_cp_init +ffffffff81c53a60 T r100_debugfs_cp_init +ffffffff81c53a90 T r100_cp_fini +ffffffff81c53b30 T r100_cp_disable +ffffffff81c53c70 T r100_gui_wait_for_idle +ffffffff81c53d60 T r100_reloc_pitch_offset +ffffffff81c53e90 T r100_packet3_load_vbpntr +ffffffff81c54130 T r100_cs_parse_packet0 +ffffffff81c54240 T r100_cs_packet_parse_vline +ffffffff81c54430 T r100_cs_track_check_pkt3_indx_buffer +ffffffff81c544b0 T r100_cs_parse +ffffffff81c55970 T r100_cs_track_clear +ffffffff81c55d00 T r100_cs_track_check +ffffffff81c566f0 T r100_mc_wait_for_idle +ffffffff81c56790 T r100_gpu_is_lockup +ffffffff81c567f0 T r100_enable_bm +ffffffff81c56840 T r100_bm_disable +ffffffff81c568f0 T r100_asic_reset +ffffffff81c56c20 T r100_mc_stop +ffffffff81c56de0 T r100_mc_resume +ffffffff81c56ea0 T r100_set_common_regs +ffffffff81c57050 T r100_vram_init_sizes +ffffffff81c57240 T r100_vga_set_state +ffffffff81c572a0 T r100_pll_errata_after_index +ffffffff81c572e0 T r100_pll_rreg +ffffffff81c57410 T r100_pll_wreg +ffffffff81c57520 T r100_debugfs_rbbm_init +ffffffff81c57550 T r100_debugfs_mc_info_init +ffffffff81c57580 T r100_set_surface_reg +ffffffff81c57790 T r100_clear_surface_reg +ffffffff81c57840 T r100_bandwidth_update +ffffffff81c582f0 T r100_ring_test +ffffffff81c585b0 T r100_ring_ib_execute +ffffffff81c58810 T r100_ib_test +ffffffff81c58b50 T r100_vga_render_disable +ffffffff81c58bb0 T r100_resume +ffffffff81c58db0 t r100_startup +ffffffff81c592e0 T r100_suspend +ffffffff81c593c0 T r100_fini +ffffffff81c594d0 T r100_restore_sanity +ffffffff81c59570 T r100_init +ffffffff81c59af0 T r100_mm_rreg_slow +ffffffff81c59b70 T r100_mm_wreg_slow +ffffffff81c59bd0 T r100_io_rreg +ffffffff81c59c70 T r100_io_wreg +ffffffff81c59ce0 t r100_cs_track_texture_print +ffffffff81c5a000 T r200_copy_dma +ffffffff81c5a470 T r200_packet0_check +ffffffff81c5b490 T r200_set_safe_registers +ffffffff81c5c000 T rv370_pcie_rreg +ffffffff81c5c080 T rv370_pcie_wreg +ffffffff81c5c0f0 T rv370_pcie_gart_tlb_flush +ffffffff81c5c2f0 T rv370_pcie_gart_get_page_entry +ffffffff81c5c350 T rv370_pcie_gart_set_page +ffffffff81c5c390 T rv370_pcie_gart_init +ffffffff81c5c460 T rv370_pcie_gart_enable +ffffffff81c5c7c0 T rv370_pcie_gart_disable +ffffffff81c5c940 T rv370_pcie_gart_fini +ffffffff81c5c970 T r300_fence_ring_emit +ffffffff81c5cf00 T r300_ring_start +ffffffff81c5d910 T r300_mc_wait_for_idle +ffffffff81c5d9b0 T r300_asic_reset +ffffffff81c5dbd0 T r300_mc_init +ffffffff81c5dc80 T rv370_set_pcie_lanes +ffffffff81c5de40 T rv370_get_pcie_lanes +ffffffff81c5def0 T r300_cs_parse +ffffffff81c5e260 t r300_packet0_check +ffffffff81c5f0c0 T r300_set_reg_safe +ffffffff81c5f100 T r300_mc_program +ffffffff81c5f280 T r300_clock_startup +ffffffff81c5f310 T r300_resume +ffffffff81c5f4e0 t r300_startup +ffffffff81c5f840 T r300_suspend +ffffffff81c5f8c0 T r300_fini +ffffffff81c5f9a0 T r300_init +ffffffff81c60000 T r420_pm_init_profile +ffffffff81c600f0 T r420_pipes_init +ffffffff81c602d0 T r420_mc_rreg +ffffffff81c60350 T r420_mc_wreg +ffffffff81c603c0 T r420_resume +ffffffff81c605a0 t r420_startup +ffffffff81c60940 T r420_suspend +ffffffff81c60ae0 T r420_fini +ffffffff81c60bc0 T r420_init +ffffffff81c60e40 T r420_debugfs_pipes_info_init +ffffffff81c61000 T r520_mc_wait_for_idle +ffffffff81c610a0 T r520_resume +ffffffff81c611a0 t r520_startup +ffffffff81c61590 T r520_init +ffffffff81c62000 T r600_rcu_rreg +ffffffff81c62080 T r600_rcu_wreg +ffffffff81c620f0 T r600_uvd_ctx_rreg +ffffffff81c62170 T r600_uvd_ctx_wreg +ffffffff81c621e0 T r600_get_allowed_info_register +ffffffff81c62260 T r600_get_xclk +ffffffff81c62290 T r600_set_uvd_clocks +ffffffff81c627f0 T dce3_program_fmt +ffffffff81c62910 T rv6xx_get_temp +ffffffff81c62960 T r600_pm_get_dynpm_state +ffffffff81c62d60 T rs780_pm_init_profile +ffffffff81c62e70 T r600_pm_init_profile +ffffffff81c63110 T r600_pm_misc +ffffffff81c631f0 T r600_gui_idle +ffffffff81c63230 T r600_hpd_sense +ffffffff81c63350 T r600_hpd_set_polarity +ffffffff81c635c0 T r600_hpd_init +ffffffff81c637d0 T r600_hpd_fini +ffffffff81c63980 T r600_pcie_gart_tlb_flush +ffffffff81c63ac0 T r600_pcie_gart_init +ffffffff81c63b60 T r600_mc_wait_for_idle +ffffffff81c63c00 T rs780_mc_rreg +ffffffff81c63ca0 T rs780_mc_wreg +ffffffff81c63d30 T r600_vram_scratch_init +ffffffff81c63e30 t radeon_bo_reserve +ffffffff81c63fb0 t radeon_bo_unreserve +ffffffff81c64090 T r600_vram_scratch_fini +ffffffff81c64110 T r600_set_bios_scratch_engine_hung +ffffffff81c64160 T r600_gpu_check_soft_reset +ffffffff81c644e0 T r600_asic_reset +ffffffff81c64870 t r600_gpu_pci_config_reset +ffffffff81c64a90 T r600_gfx_is_lockup +ffffffff81c64b00 T r6xx_remap_render_backend +ffffffff81c64cf0 T r600_count_pipe_bits +ffffffff81c64d60 T r600_pciep_rreg +ffffffff81c64de0 T r600_pciep_wreg +ffffffff81c64e50 T r600_cp_stop +ffffffff81c64ed0 T r600_init_microcode +ffffffff81c653a0 T r600_gfx_get_rptr +ffffffff81c65400 T r600_gfx_get_wptr +ffffffff81c65440 T r600_gfx_set_wptr +ffffffff81c65480 T r600_cp_start +ffffffff81c65800 T r600_cp_resume +ffffffff81c65b60 T r600_ring_init +ffffffff81c65c00 T r600_cp_fini +ffffffff81c65c90 T r600_scratch_init +ffffffff81c65d00 T r600_ring_test +ffffffff81c65fb0 T r600_fence_ring_emit +ffffffff81c66870 T r600_semaphore_ring_emit +ffffffff81c66a60 T r600_copy_cpdma +ffffffff81c67020 T r600_set_surface_reg +ffffffff81c67050 T r600_clear_surface_reg +ffffffff81c67080 T r600_vga_set_state +ffffffff81c670e0 T r600_resume +ffffffff81c67170 t r600_startup +ffffffff81c69180 T r600_suspend +ffffffff81c692f0 T r600_irq_suspend +ffffffff81c693b0 t r600_pcie_gart_disable +ffffffff81c695b0 T r600_init +ffffffff81c69da0 T r600_ih_ring_init +ffffffff81c69e10 T r600_irq_fini +ffffffff81c69f50 T r600_fini +ffffffff81c6a0e0 T r600_ring_ib_execute +ffffffff81c6a560 T r600_ib_test +ffffffff81c6a810 T r600_ih_ring_alloc +ffffffff81c6a930 T r600_ih_ring_fini +ffffffff81c6a9c0 T r600_rlc_stop +ffffffff81c6ab50 T r600_disable_interrupts +ffffffff81c6ac00 T r600_irq_init +ffffffff81c6b070 t r600_disable_interrupt_state +ffffffff81c6b360 T r600_irq_disable +ffffffff81c6b420 T r600_irq_set +ffffffff81c6bba0 t r600_irq_ack +ffffffff81c6c090 T r600_irq_process +ffffffff81c6cc90 T r600_mmio_hdp_flush +ffffffff81c6cd10 T r600_set_pcie_lanes +ffffffff81c6ce40 T r600_get_pcie_lanes +ffffffff81c6cf20 T r600_get_gpu_clock_counter +ffffffff81c6d000 T r600_fmt_is_valid_color +ffffffff81c6d040 T r600_fmt_is_valid_texture +ffffffff81c6d090 T r600_fmt_get_blocksize +ffffffff81c6d0d0 T r600_fmt_get_nblocksx +ffffffff81c6d130 T r600_fmt_get_nblocksy +ffffffff81c6d190 T r600_cs_common_vline_parse +ffffffff81c6d460 T r600_mip_minify +ffffffff81c6d4c0 T r600_cs_parse +ffffffff81c6f450 T r600_dma_cs_next_reloc +ffffffff81c6f4d0 T r600_dma_cs_parse +ffffffff81c6fc00 t r600_cs_track_check +ffffffff81c70d40 t r600_cs_check_reg +ffffffff81c72000 T r600_dma_get_rptr +ffffffff81c72060 T r600_dma_get_wptr +ffffffff81c720a0 T r600_dma_set_wptr +ffffffff81c720e0 T r600_dma_stop +ffffffff81c72170 T r600_dma_resume +ffffffff81c72380 T r600_dma_fini +ffffffff81c72400 T r600_dma_is_lockup +ffffffff81c72470 T r600_dma_ring_test +ffffffff81c726d0 T r600_dma_fence_ring_emit +ffffffff81c728c0 T r600_dma_semaphore_ring_emit +ffffffff81c729e0 T r600_dma_ib_test +ffffffff81c72bf0 T r600_dma_ring_ib_execute +ffffffff81c72f30 T r600_copy_dma +ffffffff81c74000 T r600_dpm_print_class_info +ffffffff81c742b0 T r600_dpm_print_cap_info +ffffffff81c74340 T r600_dpm_print_ps_status +ffffffff81c743d0 T r600_dpm_get_vblank_time +ffffffff81c74490 T r600_dpm_get_vrefresh +ffffffff81c74520 T r600_calculate_u_and_p +ffffffff81c745a0 T r600_calculate_at +ffffffff81c74650 T r600_gfx_clockgating_enable +ffffffff81c74760 T r600_dynamicpm_enable +ffffffff81c747c0 T r600_enable_thermal_protection +ffffffff81c74820 T r600_enable_acpi_pm +ffffffff81c74870 T r600_enable_dynamic_pcie_gen2 +ffffffff81c748d0 T r600_dynamicpm_enabled +ffffffff81c74910 T r600_enable_sclk_control +ffffffff81c74970 T r600_enable_mclk_control +ffffffff81c749d0 T r600_enable_spll_bypass +ffffffff81c74a30 T r600_wait_for_spll_change +ffffffff81c74ab0 T r600_set_bsp +ffffffff81c74af0 T r600_set_at +ffffffff81c74b50 T r600_set_tc +ffffffff81c74bb0 T r600_select_td +ffffffff81c74c70 T r600_set_vrc +ffffffff81c74cb0 T r600_set_tpu +ffffffff81c74d10 T r600_set_tpc +ffffffff81c74d70 T r600_set_sstu +ffffffff81c74dd0 T r600_set_sst +ffffffff81c74e20 T r600_set_git +ffffffff81c74e70 T r600_set_fctu +ffffffff81c74ed0 T r600_set_fct +ffffffff81c74f20 T r600_set_ctxcgtt3d_rphc +ffffffff81c74f80 T r600_set_ctxcgtt3d_rsdc +ffffffff81c74fe0 T r600_set_vddc3d_oorsu +ffffffff81c75040 T r600_set_vddc3d_oorphc +ffffffff81c750a0 T r600_set_vddc3d_oorsdc +ffffffff81c75100 T r600_set_mpll_lock_time +ffffffff81c75150 T r600_set_mpll_reset_time +ffffffff81c751a0 T r600_engine_clock_entry_enable +ffffffff81c752a0 T r600_engine_clock_entry_enable_pulse_skipping +ffffffff81c753a0 T r600_engine_clock_entry_enable_post_divider +ffffffff81c754a0 T r600_engine_clock_entry_set_post_divider +ffffffff81c75560 T r600_engine_clock_entry_set_reference_divider +ffffffff81c75620 T r600_engine_clock_entry_set_feedback_divider +ffffffff81c756e0 T r600_engine_clock_entry_set_step_time +ffffffff81c757a0 T r600_vid_rt_set_ssu +ffffffff81c75800 T r600_vid_rt_set_vru +ffffffff81c75860 T r600_vid_rt_set_vrt +ffffffff81c758c0 T r600_voltage_control_enable_pins +ffffffff81c75910 T r600_voltage_control_program_voltages +ffffffff81c759a0 T r600_voltage_control_deactivate_static_control +ffffffff81c75a30 T r600_power_level_enable +ffffffff81c75aa0 T r600_power_level_set_voltage_index +ffffffff81c75b10 T r600_power_level_set_mem_clock_index +ffffffff81c75b70 T r600_power_level_set_eng_clock_index +ffffffff81c75be0 T r600_power_level_set_watermark_id +ffffffff81c75c50 T r600_power_level_set_pcie_gen2 +ffffffff81c75cb0 T r600_power_level_get_current_index +ffffffff81c75cf0 T r600_power_level_get_target_index +ffffffff81c75d30 T r600_power_level_set_enter_index +ffffffff81c75d90 T r600_wait_for_power_level_unequal +ffffffff81c75e80 T r600_wait_for_power_level +ffffffff81c75f70 T r600_start_dpm +ffffffff81c76250 T r600_stop_dpm +ffffffff81c762a0 T r600_dpm_pre_set_power_state +ffffffff81c762d0 T r600_dpm_post_set_power_state +ffffffff81c76300 T r600_is_uvd_state +ffffffff81c76340 T r600_is_internal_thermal_sensor +ffffffff81c76380 T r600_dpm_late_enable +ffffffff81c76490 T r600_get_platform_caps +ffffffff81c76530 T r600_parse_extended_power_table +ffffffff81c774a0 T r600_free_extended_power_table +ffffffff81c775a0 T r600_get_pcie_gen_support +ffffffff81c775f0 T r600_get_pcie_lane_support +ffffffff81c77650 T r600_encode_pci_lane_width +ffffffff81c78000 T r600_audio_update_hdmi +ffffffff81c78180 t r600_audio_status +ffffffff81c782a0 T r600_hdmi_buffer_status_changed +ffffffff81c78340 T r600_hdmi_update_audio_settings +ffffffff81c78710 T r600_audio_enable +ffffffff81c78790 T r600_audio_get_pin +ffffffff81c787c0 T r600_hdmi_update_acr +ffffffff81c78b60 T r600_set_avi_packet +ffffffff81c78d60 T r600_hdmi_audio_workaround +ffffffff81c78e30 T r600_hdmi_audio_set_dto +ffffffff81c78ef0 T r600_set_vbi_packet +ffffffff81c78fb0 T r600_set_audio_packet +ffffffff81c79280 T r600_set_mute +ffffffff81c79390 T r600_hdmi_enable +ffffffff81c7a000 T radeon_acpi_is_pcie_performance_request_supported +ffffffff81c7a050 T radeon_acpi_pcie_notify_device_ready +ffffffff81c7a180 T radeon_acpi_pcie_performance_request +ffffffff81c7a3a0 T radeon_acpi_init +ffffffff81c7aaf0 t radeon_acpi_event +ffffffff81c7ae40 T radeon_acpi_fini +ffffffff81c7b000 T radeon_agp_head_init +ffffffff81c7b050 T radeon_agp_init +ffffffff81c7b0a0 T radeon_agp_resume +ffffffff81c7b140 T radeon_agp_fini +ffffffff81c7b190 T radeon_agp_suspend +ffffffff81c7c000 T radeon_agp_disable +ffffffff81c7c120 T radeon_asic_init +ffffffff81c7c9b0 t radeon_invalid_rreg +ffffffff81c7c9f0 t radeon_invalid_wreg +ffffffff81c7ca30 t radeon_invalid_get_allowed_info_register +ffffffff81c7d000 T radeon_atombios_i2c_init +ffffffff81c7d3b0 T radeon_atombios_lookup_gpio +ffffffff81c7d4b0 T radeon_get_atom_connector_info_from_object_table +ffffffff81c7de10 t radeon_lookup_i2c_gpio +ffffffff81c7e110 t radeon_atom_apply_quirks +ffffffff81c7e540 T radeon_get_atom_connector_info_from_supported_devices_table +ffffffff81c7ea40 T radeon_atom_get_clock_info +ffffffff81c7edc0 T radeon_atombios_sideport_present +ffffffff81c7ee70 T radeon_atombios_get_tmds_info +ffffffff81c7efb0 T radeon_atombios_get_ppll_ss_info +ffffffff81c7f0d0 T radeon_atombios_get_asic_ss_info +ffffffff81c7f440 T radeon_atombios_get_lvds_info +ffffffff81c7f7b0 T radeon_atombios_get_primary_dac_info +ffffffff81c7f860 T radeon_atom_get_tv_timings +ffffffff81c7fab0 T radeon_atombios_get_tv_info +ffffffff81c7fb60 T radeon_atombios_get_tv_dac_info +ffffffff81c7fc60 T radeon_atombios_get_default_voltages +ffffffff81c7fd20 T radeon_atombios_get_power_modes +ffffffff81c80df0 T radeon_atom_get_clock_dividers +ffffffff81c810f0 T radeon_atom_get_memory_pll_dividers +ffffffff81c81230 T radeon_atom_set_clock_gating +ffffffff81c81280 T radeon_atom_get_engine_clock +ffffffff81c812d0 T radeon_atom_get_memory_clock +ffffffff81c81320 T radeon_atom_set_engine_clock +ffffffff81c81370 T radeon_atom_set_memory_clock +ffffffff81c813d0 T radeon_atom_set_engine_dram_timings +ffffffff81c81440 T radeon_atom_update_memory_dll +ffffffff81c81490 T radeon_atom_set_ac_timing +ffffffff81c814e0 T radeon_atom_set_voltage +ffffffff81c815b0 T radeon_atom_get_max_vddc +ffffffff81c81690 T radeon_atom_get_leakage_vddc_based_on_leakage_idx +ffffffff81c81760 T radeon_atom_get_leakage_id_from_vbios +ffffffff81c81820 T radeon_atom_get_leakage_vddc_based_on_leakage_params +ffffffff81c81a30 T radeon_atom_get_voltage_evv +ffffffff81c81ae0 T radeon_atom_get_voltage_gpio_settings +ffffffff81c81be0 T radeon_atom_is_voltage_gpio +ffffffff81c81d70 T radeon_atom_get_svi2_info +ffffffff81c81e60 T radeon_atom_get_max_voltage +ffffffff81c82000 T radeon_atom_get_min_voltage +ffffffff81c82140 T radeon_atom_get_voltage_step +ffffffff81c82240 T radeon_atom_round_to_true_voltage +ffffffff81c823b0 T radeon_atom_get_voltage_table +ffffffff81c82620 T radeon_atom_get_memory_info +ffffffff81c827d0 T radeon_atom_get_mclk_range_table +ffffffff81c82a20 T radeon_atom_init_mc_reg_table +ffffffff81c82ca0 T radeon_atom_initialize_bios_scratch_regs +ffffffff81c82d70 T radeon_save_bios_scratch_regs +ffffffff81c82e50 T radeon_restore_bios_scratch_regs +ffffffff81c82f30 T radeon_atom_output_lock +ffffffff81c82fc0 T radeon_atombios_connected_scratch_regs +ffffffff81c83740 T radeon_atombios_encoder_crtc_scratch_regs +ffffffff81c83880 T radeon_atombios_encoder_dpms_scratch_regs +ffffffff81c83aa0 t radeon_atombios_parse_misc_flags_1_3 +ffffffff81c83c90 t radeon_atombios_add_pplib_thermal_controller +ffffffff81c84090 t radeon_atombios_parse_pplib_clock_info +ffffffff81c843a0 t radeon_atombios_parse_pplib_non_clock_info +ffffffff81c85000 T radeon_audio_init +ffffffff81c85290 T radeon_audio_endpoint_rreg +ffffffff81c852d0 T radeon_audio_endpoint_wreg +ffffffff81c85310 T radeon_audio_get_pin +ffffffff81c85360 T radeon_audio_detect +ffffffff81c85690 T radeon_audio_fini +ffffffff81c857d0 T radeon_audio_mode_set +ffffffff81c85820 T radeon_audio_dpms +ffffffff81c85870 T radeon_audio_decode_dfs_div +ffffffff81c858d0 t radeon_audio_hdmi_mode_set +ffffffff81c86000 t radeon_audio_write_speaker_allocation +ffffffff81c860b0 t radeon_audio_write_sad_regs +ffffffff81c86180 t radeon_audio_set_avi_packet +ffffffff81c862c0 t radeon_audio_dp_mode_set +ffffffff81c86440 t radeon_audio_rreg +ffffffff81c86490 t radeon_audio_wreg +ffffffff81c87000 T radeon_benchmark +ffffffff81c87940 t radeon_benchmark_move +ffffffff81c87e00 t radeon_bo_reserve +ffffffff81c87f80 t radeon_bo_unreserve +ffffffff81c89000 T radeon_get_bios +ffffffff81c8a000 t igp_read_bios_from_vram +ffffffff81c8a110 t radeon_read_bios +ffffffff81c8b000 T radeon_legacy_get_engine_clock +ffffffff81c8b0d0 T radeon_legacy_get_memory_clock +ffffffff81c8b1a0 T radeon_get_clock_info +ffffffff81c8b730 T radeon_legacy_set_engine_clock +ffffffff81c8ba80 T radeon_legacy_set_clock_gating +ffffffff81c8d000 T radeon_combios_check_hardcoded_edid +ffffffff81c8d100 T radeon_bios_get_hardcoded_edid +ffffffff81c8d180 T radeon_combios_i2c_init +ffffffff81c8d940 t combios_setup_i2c_bus +ffffffff81c8dc40 T radeon_combios_get_clock_info +ffffffff81c8de30 T radeon_combios_sideport_present +ffffffff81c8deb0 T radeon_combios_get_primary_dac_info +ffffffff81c8dff0 T radeon_combios_get_tv_info +ffffffff81c8e0f0 T radeon_combios_get_tv_dac_info +ffffffff81c8e3a0 T radeon_combios_get_lvds_info +ffffffff81c8e9f0 T radeon_legacy_get_tmds_info_from_table +ffffffff81c8eac0 T radeon_legacy_get_tmds_info_from_combios +ffffffff81c8ecd0 T radeon_legacy_get_ext_tmds_info_from_table +ffffffff81c8ef10 T radeon_legacy_get_ext_tmds_info_from_combios +ffffffff81c8f2a0 T radeon_get_legacy_connector_info_from_table +ffffffff81c91660 T radeon_get_legacy_connector_info_from_bios +ffffffff81c923f0 T radeon_combios_get_power_modes +ffffffff81c92ca0 T radeon_external_tmds_setup +ffffffff81c92d70 T radeon_combios_external_tmds_setup +ffffffff81c93330 T radeon_combios_asic_init +ffffffff81c93950 t combios_parse_mmio_table +ffffffff81c93b70 t combios_parse_pll_table +ffffffff81c93e40 T radeon_combios_initialize_bios_scratch_regs +ffffffff81c93ed0 T radeon_combios_output_lock +ffffffff81c93f30 T radeon_combios_connected_scratch_regs +ffffffff81c94290 T radeon_combios_encoder_crtc_scratch_regs +ffffffff81c94370 T radeon_combios_encoder_dpms_scratch_regs +ffffffff81c95000 T radeon_connector_hotplug +ffffffff81c95100 T radeon_get_monitor_bpc +ffffffff81c95530 T radeon_connector_edid +ffffffff81c955e0 T radeon_connector_encoder_get_dp_bridge_encoder_id +ffffffff81c95660 T radeon_connector_is_dp12_capable +ffffffff81c95700 T radeon_add_atom_connector +ffffffff81c96550 T radeon_add_legacy_connector +ffffffff81c96a90 t radeon_dp_detect +ffffffff81c96e50 t radeon_dvi_force +ffffffff81c96ea0 t radeon_connector_set_property +ffffffff81c976e0 t radeon_connector_unregister +ffffffff81c97740 t radeon_connector_destroy +ffffffff81c977b0 t radeon_best_single_encoder +ffffffff81c97830 t radeon_connector_get_edid +ffffffff81c97990 t radeon_dp_get_modes +ffffffff81c97cc0 t radeon_dp_mode_valid +ffffffff81c97e90 t radeon_dvi_encoder +ffffffff81c97f70 t radeon_fixup_lvds_native_mode +ffffffff81c980a0 t radeon_add_common_modes +ffffffff81c98190 t radeon_fp_native_mode +ffffffff81c98260 t radeon_lvds_set_property +ffffffff81c98350 t radeon_vga_detect +ffffffff81c98600 t radeon_connector_analog_encoder_conflict_solve +ffffffff81c98820 t radeon_vga_get_modes +ffffffff81c98910 t radeon_vga_mode_valid +ffffffff81c98970 t radeon_dvi_detect +ffffffff81c99010 t radeon_dvi_mode_valid +ffffffff81c991a0 t radeon_tv_detect +ffffffff81c993e0 t radeon_tv_get_modes +ffffffff81c994b0 t radeon_tv_mode_valid +ffffffff81c99500 t radeon_lvds_detect +ffffffff81c996a0 t radeon_lvds_get_modes +ffffffff81c99810 t radeon_lvds_mode_valid +ffffffff81c9a000 T radeon_cs_parser_init +ffffffff81c9a480 T radeon_cs_ioctl +ffffffff81c9afb0 t radeon_cs_parser_fini +ffffffff81c9b140 T radeon_cs_packet_parse +ffffffff81c9b2f0 T radeon_cs_packet_next_is_pkt3_nop +ffffffff81c9b350 T radeon_cs_dump_packet +ffffffff81c9b3d0 T radeon_cs_packet_next_reloc +ffffffff81c9b5a0 t cmp_size_smaller_first +ffffffff81c9c000 T radeon_crtc_cursor_move +ffffffff81c9c070 t radeon_lock_cursor +ffffffff81c9c230 t radeon_cursor_move_locked +ffffffff81c9c780 T radeon_crtc_cursor_set2 +ffffffff81c9ca00 t radeon_hide_cursor +ffffffff81c9cac0 t radeon_bo_reserve +ffffffff81c9cc40 t radeon_bo_unreserve +ffffffff81c9cd20 t radeon_show_cursor +ffffffff81c9cf70 T radeon_cursor_reset +ffffffff81c9d000 T radeon_is_px +ffffffff81c9d040 T radeon_program_register_sequence +ffffffff81c9d170 T radeon_pci_config_reset +ffffffff81c9d1a0 T radeon_surface_init +ffffffff81c9d360 T radeon_scratch_init +ffffffff81c9d3e0 T radeon_scratch_get +ffffffff81c9d460 T radeon_scratch_free +ffffffff81c9d4c0 T radeon_doorbell_get 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radeon_combios_fini +ffffffff81c9e750 T radeon_device_init +ffffffff81c9f230 T radeon_device_fini +ffffffff81c9f330 T radeon_suspend_kms +ffffffff81c9f6a0 T radeon_resume_kms +ffffffff81c9f8f0 T radeon_gpu_reset +ffffffff81ca0000 T radeon_crtc_load_lut +ffffffff81ca0dc0 T radeon_crtc_handle_vblank +ffffffff81ca0f30 T radeon_get_crtc_scanoutpos +ffffffff81ca1560 T radeon_crtc_handle_flip +ffffffff81ca1690 T radeon_compute_pll_avivo +ffffffff81ca1bd0 T radeon_compute_pll_legacy +ffffffff81ca2250 T radeon_framebuffer_init +ffffffff81ca22d0 T radeon_update_display_priority +ffffffff81ca2330 T radeon_modeset_init +ffffffff81ca2e50 T radeon_modeset_fini +ffffffff81ca2fb0 T radeon_crtc_scaling_mode_fixup +ffffffff81ca3310 T radeon_get_crtc_scanout_position +ffffffff81ca3380 t radeon_user_framebuffer_create +ffffffff81ca3520 t radeon_crtc_gamma_set +ffffffff81ca3560 t radeon_crtc_destroy +ffffffff81ca35a0 t radeon_crtc_set_config +ffffffff81ca3660 t radeon_crtc_page_flip_target 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radeon_get_connector_for_encoder +ffffffff81ca74b0 T radeon_get_connector_for_encoder_init +ffffffff81ca7530 T radeon_get_external_encoder +ffffffff81ca75c0 T radeon_encoder_get_dp_bridge_encoder_id +ffffffff81ca7660 T radeon_panel_mode_fixup +ffffffff81ca7830 T radeon_dig_monitor_is_duallink +ffffffff81ca7950 T radeon_encoder_is_digital +ffffffff81ca8000 T radeon_align_pitch +ffffffff81ca8090 T radeon_fbdev_init +ffffffff81ca81e0 T radeondrm_burner_cb +ffffffff81ca8210 T radeon_fbdev_fini +ffffffff81ca8280 T radeon_fbdev_set_suspend +ffffffff81ca82d0 T radeon_fbdev_robj_is_fb +ffffffff81ca8320 T radeondrm_burner +ffffffff81ca83a0 t radeonfb_create +ffffffff81ca87b0 t radeon_bo_reserve +ffffffff81ca8930 t radeon_bo_unreserve +ffffffff81ca9000 T radeon_fence_emit +ffffffff81ca9120 T radeon_fence_process +ffffffff81ca91f0 t radeon_fence_activity +ffffffff81ca9390 T radeon_fence_signaled +ffffffff81ca9430 T radeon_fence_wait_timeout +ffffffff81ca9580 t radeon_fence_wait_seq_timeout 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radeon_gem_object_mmap +ffffffff81cad650 T radeon_gem_info_ioctl +ffffffff81cad6c0 T radeon_gem_pread_ioctl +ffffffff81cad710 T radeon_gem_pwrite_ioctl +ffffffff81cad760 T radeon_gem_create_ioctl +ffffffff81cad880 T radeon_gem_userptr_ioctl +ffffffff81cad8b0 T radeon_gem_set_domain_ioctl +ffffffff81cada10 T radeon_mode_dumb_mmap +ffffffff81cadac0 T radeon_gem_mmap_ioctl +ffffffff81cadb80 T radeon_gem_busy_ioctl +ffffffff81cadc30 T radeon_gem_wait_idle_ioctl +ffffffff81cadd40 T radeon_gem_set_tiling_ioctl +ffffffff81caddf0 T radeon_gem_get_tiling_ioctl +ffffffff81cadec0 t radeon_bo_reserve +ffffffff81cae0d0 t radeon_bo_unreserve +ffffffff81cae1b0 T radeon_gem_va_ioctl +ffffffff81cae580 T radeon_gem_op_ioctl +ffffffff81cae680 T radeon_mode_dumb_create +ffffffff81cae780 T radeon_gem_debugfs_init +ffffffff81caf000 T radeon_ddc_probe +ffffffff81caf0c0 T radeon_router_select_ddc_port +ffffffff81caf320 T radeon_bb_set_bits +ffffffff81caf490 T radeon_bb_set_dir +ffffffff81caf4c0 T radeon_bb_read_bits +ffffffff81caf5a0 T radeon_acquire_bus +ffffffff81caf9f0 T radeon_release_bus +ffffffff81cafb60 T radeon_send_start +ffffffff81cafb80 T radeon_send_stop +ffffffff81cafba0 T radeon_initiate_xfer +ffffffff81cafbc0 T radeon_read_byte +ffffffff81cafbe0 T radeon_write_byte +ffffffff81cafc00 T radeon_i2c_create +ffffffff81cafe10 T radeon_i2c_destroy +ffffffff81cafe90 T radeon_i2c_init +ffffffff81cafee0 T radeon_i2c_fini +ffffffff81caff90 T radeon_i2c_add +ffffffff81cb0140 T radeon_i2c_lookup +ffffffff81cb0300 T radeon_i2c_get_byte +ffffffff81cb03d0 T radeon_i2c_put_byte +ffffffff81cb0460 T radeon_router_select_cd_port +ffffffff81cb06c0 t radeon_hw_i2c_xfer +ffffffff81cb1280 t radeon_hw_i2c_func +ffffffff81cb12b0 t r100_hw_i2c_xfer +ffffffff81cb1990 t radeon_get_i2c_prescale +ffffffff81cb2000 T radeon_ib_get +ffffffff81cb2100 T radeon_ib_free +ffffffff81cb2150 T radeon_ib_schedule +ffffffff81cb23e0 T radeon_ib_pool_init +ffffffff81cb2480 T radeon_ib_pool_fini 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T radeon_driver_postclose_kms +ffffffff81cb50d0 T radeon_get_vblank_counter_kms +ffffffff81cb5270 T radeon_enable_vblank_kms +ffffffff81cb5320 T radeon_disable_vblank_kms +ffffffff81cb6000 T radeon_crtc_set_base +ffffffff81cb6020 T radeon_crtc_do_set_base +ffffffff81cb65c0 T radeon_crtc_set_base_atomic +ffffffff81cb65e0 t radeon_bo_reserve +ffffffff81cb6760 t radeon_bo_unreserve +ffffffff81cb6840 T radeon_legacy_init_crtc +ffffffff81cb6890 t radeon_crtc_dpms +ffffffff81cb6a90 t radeon_crtc_prepare +ffffffff81cb6b10 t radeon_crtc_commit +ffffffff81cb6b80 t radeon_crtc_mode_fixup +ffffffff81cb6ba0 t radeon_crtc_mode_set +ffffffff81cb7ff0 t radeon_crtc_disable +ffffffff81cb9000 T radeon_legacy_get_backlight_level +ffffffff81cb9040 T radeon_legacy_set_backlight_level +ffffffff81cb9080 t radeon_legacy_lvds_update +ffffffff81cb93e0 T radeon_legacy_backlight_init +ffffffff81cb95b0 t radeon_legacy_backlight_get_brightness +ffffffff81cb9610 T radeon_add_legacy_encoder +ffffffff81cb9990 t radeon_legacy_backlight_update_status +ffffffff81cb9a20 t radeon_lvds_enc_destroy +ffffffff81cb9ab0 t radeon_legacy_lvds_dpms +ffffffff81cb9b00 t radeon_legacy_mode_fixup +ffffffff81cb9b70 t radeon_legacy_lvds_prepare +ffffffff81cb9c00 t radeon_legacy_lvds_commit +ffffffff81cb9c80 t radeon_legacy_lvds_mode_set +ffffffff81cb9e90 t radeon_legacy_encoder_disable +ffffffff81cb9ee0 t radeon_legacy_tmds_int_dpms +ffffffff81cb9fa0 t radeon_legacy_tmds_int_prepare +ffffffff81cba070 t radeon_legacy_tmds_int_commit +ffffffff81cba140 t radeon_legacy_tmds_int_mode_set +ffffffff81cba3b0 t radeon_legacy_primary_dac_dpms +ffffffff81cba4f0 t radeon_legacy_primary_dac_prepare +ffffffff81cba550 t radeon_legacy_primary_dac_commit +ffffffff81cba5a0 t radeon_legacy_primary_dac_mode_set +ffffffff81cba750 t radeon_legacy_primary_dac_detect +ffffffff81cba940 t radeon_legacy_tv_dac_dpms +ffffffff81cbab40 t radeon_legacy_tv_dac_prepare +ffffffff81cbaba0 t radeon_legacy_tv_dac_commit +ffffffff81cbabf0 t radeon_legacy_tv_dac_mode_set +ffffffff81cbaf90 t radeon_legacy_tv_dac_detect +ffffffff81cbbbc0 t radeon_ext_tmds_enc_destroy +ffffffff81cbbc10 t radeon_legacy_tmds_ext_dpms +ffffffff81cbbce0 t radeon_legacy_tmds_ext_prepare +ffffffff81cbbdb0 t radeon_legacy_tmds_ext_commit +ffffffff81cbbe80 t radeon_legacy_tmds_ext_mode_set +ffffffff81cbd000 T radeon_legacy_tv_mode_set +ffffffff81cbe0b0 T radeon_legacy_tv_adjust_crtc_reg +ffffffff81cbe1c0 T radeon_legacy_tv_adjust_pll1 +ffffffff81cbe2b0 T radeon_legacy_tv_adjust_pll2 +ffffffff81cbf000 T radeon_ttm_bo_is_radeon_bo +ffffffff81cbf040 t radeon_ttm_bo_destroy +ffffffff81cbf170 T radeon_ttm_placement_from_domain +ffffffff81cbf2e0 T radeon_bo_create +ffffffff81cbf4a0 T radeon_bo_kmap +ffffffff81cbf580 T radeon_bo_check_tiling +ffffffff81cbf660 T radeon_bo_kunmap +ffffffff81cbf6f0 T radeon_bo_ref +ffffffff81cbf730 T radeon_bo_unref +ffffffff81cbf780 T radeon_bo_pin_restricted +ffffffff81cbfab0 T radeon_bo_pin +ffffffff81cbfad0 T radeon_bo_unpin +ffffffff81cbfb40 T radeon_bo_evict_vram +ffffffff81cbfba0 T radeon_bo_force_delete +ffffffff81cbfd10 T radeon_bo_init +ffffffff81cbfdf0 T radeon_bo_fini +ffffffff81cbfe30 T radeon_bo_list_validate +ffffffff81cc0120 T radeon_bo_get_surface_reg +ffffffff81cc03c0 T radeon_bo_set_tiling_flags +ffffffff81cc06e0 T radeon_bo_get_tiling_flags +ffffffff81cc0730 T radeon_bo_move_notify +ffffffff81cc07f0 T radeon_bo_fault_reserve_notify +ffffffff81cc0af0 T radeon_bo_fence +ffffffff81cc1000 T radeon_pm_get_type_index +ffffffff81cc1080 T radeon_pm_acpi_event_handler +ffffffff81cc1160 t radeon_pm_update_profile +ffffffff81cc1280 t radeon_pm_set_clocks +ffffffff81cc1c20 T radeon_dpm_enable_uvd +ffffffff81cc1ce0 T radeon_pm_compute_clocks +ffffffff81cc2720 T radeon_dpm_enable_vce +ffffffff81cc2790 T radeon_pm_suspend +ffffffff81cc2890 T radeon_pm_resume +ffffffff81cc2b80 T radeon_pm_init +ffffffff81cc3280 T radeon_pm_late_init +ffffffff81cc3340 T radeon_pm_fini +ffffffff81cc3450 t radeon_dpm_thermal_work_handler +ffffffff81cc3530 t radeon_dynpm_idle_work_handler +ffffffff81cc3820 t __delayed_work_tick +ffffffff81cc4000 T radeon_gem_prime_get_sg_table +ffffffff81cc4030 T radeon_gem_prime_pin +ffffffff81cc40c0 t radeon_bo_reserve +ffffffff81cc4240 t radeon_bo_unreserve +ffffffff81cc4320 T radeon_gem_prime_unpin +ffffffff81cc4390 T radeon_gem_prime_export +ffffffff81cc5000 T radeon_ring_supports_scratch_reg +ffffffff81cc5030 T radeon_ring_free_size +ffffffff81cc50e0 T radeon_ring_lockup_update +ffffffff81cc5140 T radeon_ring_alloc +ffffffff81cc52c0 T radeon_ring_lock +ffffffff81cc5340 T radeon_ring_commit +ffffffff81cc5440 T radeon_ring_unlock_commit +ffffffff81cc5470 T radeon_ring_undo +ffffffff81cc54a0 T radeon_ring_unlock_undo +ffffffff81cc54c0 T radeon_ring_test_lockup +ffffffff81cc55e0 T radeon_ring_backup +ffffffff81cc57a0 T radeon_ring_restore +ffffffff81cc5960 T radeon_ring_init +ffffffff81cc5b50 t radeon_bo_reserve +ffffffff81cc5cd0 t radeon_bo_unreserve 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radeon_test_ring_sync2 +ffffffff81ccb0d0 t radeon_bo_reserve +ffffffff81ccb250 t radeon_bo_unreserve +ffffffff81ccc000 T radeon_get_rdev +ffffffff81ccc030 T radeon_ttm_tt_set_userptr +ffffffff81ccc080 T radeon_ttm_tt_is_bound +ffffffff81ccc0d0 T radeon_ttm_tt_has_userptr +ffffffff81ccc110 T radeon_ttm_tt_is_readonly +ffffffff81ccc150 T radeon_ttm_init +ffffffff81ccc370 T radeon_ttm_set_active_vram_size +ffffffff81ccc3b0 t radeon_bo_reserve +ffffffff81ccc530 t radeon_bo_unreserve +ffffffff81ccc610 T radeon_ttm_fini +ffffffff81ccc6e0 t radeon_ttm_tt_create +ffffffff81ccc7d0 t radeon_ttm_tt_populate +ffffffff81ccc880 t radeon_ttm_tt_unpopulate +ffffffff81ccc980 t radeon_ttm_tt_destroy +ffffffff81ccc9d0 t radeon_evict_flags +ffffffff81cccb20 t radeon_bo_move +ffffffff81cccfa0 t radeon_ttm_io_mem_reserve +ffffffff81cce000 T radeon_ucode_print_mc_hdr +ffffffff81cce0b0 t radeon_ucode_print_common_hdr +ffffffff81cce1e0 T radeon_ucode_print_smc_hdr +ffffffff81cce270 T radeon_ucode_print_gfx_hdr +ffffffff81cce340 T radeon_ucode_print_rlc_hdr +ffffffff81cce440 T radeon_ucode_print_sdma_hdr +ffffffff81cce520 T radeon_ucode_validate +ffffffff81ccf000 T radeon_uvd_init +ffffffff81ccf4f0 t radeon_uvd_idle_work_handler +ffffffff81ccf660 t radeon_bo_reserve +ffffffff81ccf870 t radeon_bo_unreserve +ffffffff81ccf950 T radeon_uvd_fini +ffffffff81ccfa20 T radeon_uvd_suspend +ffffffff81ccfbe0 T radeon_uvd_note_usage +ffffffff81ccfe20 T radeon_uvd_get_destroy_msg +ffffffff81ccff30 T radeon_uvd_resume +ffffffff81ccffc0 T radeon_uvd_force_into_uvd_segment +ffffffff81cd0060 T radeon_uvd_free_handles +ffffffff81cd0220 T radeon_uvd_cs_parse +ffffffff81cd0940 T radeon_uvd_get_create_msg +ffffffff81cd0ac0 t radeon_uvd_send_msg +ffffffff81cd0c60 T radeon_uvd_calc_upll_dividers +ffffffff81cd0e00 T radeon_uvd_send_upll_ctlreq +ffffffff81cd1140 t __delayed_work_tick +ffffffff81cd2000 T radeon_vce_init +ffffffff81cd2610 t radeon_vce_idle_work_handler +ffffffff81cd26e0 t radeon_bo_reserve +ffffffff81cd2860 t radeon_bo_unreserve +ffffffff81cd2940 T radeon_vce_fini +ffffffff81cd29c0 T radeon_vce_suspend +ffffffff81cd2aa0 T radeon_vce_resume +ffffffff81cd2bf0 T radeon_vce_note_usage +ffffffff81cd2d10 T radeon_vce_free_handles +ffffffff81cd2dd0 T radeon_vce_get_destroy_msg +ffffffff81cd3070 T radeon_vce_get_create_msg +ffffffff81cd3430 T radeon_vce_cs_reloc +ffffffff81cd3530 T radeon_vce_cs_parse +ffffffff81cd3d60 T radeon_vce_semaphore_emit +ffffffff81cd3f30 T radeon_vce_ib_execute +ffffffff81cd40d0 T radeon_vce_fence_emit +ffffffff81cd4310 T radeon_vce_ring_test +ffffffff81cd4460 T radeon_vce_ib_test +ffffffff81cd4580 t __delayed_work_tick +ffffffff81cd5000 T radeon_vm_manager_init +ffffffff81cd5060 T radeon_vm_manager_fini +ffffffff81cd5180 T radeon_vm_get_bos +ffffffff81cd52b0 T radeon_vm_grab_id +ffffffff81cd5440 T radeon_vm_flush +ffffffff81cd55d0 T radeon_vm_fence +ffffffff81cd5680 T radeon_vm_bo_find +ffffffff81cd56e0 T radeon_vm_bo_add +ffffffff81cd57c0 T radeon_vm_bo_set_addr +ffffffff81cd5c20 t radeon_bo_unreserve +ffffffff81cd5d00 t radeon_vm_clear_bo +ffffffff81cd5ef0 T radeon_vm_map_gart +ffffffff81cd5f30 T radeon_vm_update_page_directory +ffffffff81cd62e0 T radeon_vm_bo_update +ffffffff81cd69c0 T radeon_vm_clear_freed +ffffffff81cd6aa0 T radeon_vm_clear_invalids +ffffffff81cd6b40 T radeon_vm_bo_rmv +ffffffff81cd6c30 T radeon_vm_bo_invalidate +ffffffff81cd6ce0 T radeon_vm_init +ffffffff81cd6f40 T radeon_vm_fini +ffffffff81cd7210 t radeon_bo_reserve +ffffffff81cd7390 t radeon_vm_frag_ptes +ffffffff81cd8000 T rs400_gart_adjust_size +ffffffff81cd80c0 T rs400_gart_tlb_flush +ffffffff81cd8140 T rs400_gart_init +ffffffff81cd8240 T rs400_gart_enable +ffffffff81cd85a0 T rs400_gart_disable +ffffffff81cd8600 T rs400_gart_fini +ffffffff81cd8670 T rs400_gart_get_page_entry +ffffffff81cd86d0 T rs400_gart_set_page +ffffffff81cd8710 T rs400_mc_wait_for_idle +ffffffff81cd87b0 T rs400_mc_rreg +ffffffff81cd8840 T rs400_mc_wreg +ffffffff81cd88c0 T rs400_resume +ffffffff81cd89f0 t rs400_mc_program +ffffffff81cd8af0 t rs400_startup +ffffffff81cd8ce0 T rs400_suspend +ffffffff81cd8d80 T rs400_fini +ffffffff81cd8e70 T rs400_init +ffffffff81cda000 T avivo_wait_for_vblank +ffffffff81cda280 T rs600_page_flip +ffffffff81cda540 T rs600_page_flip_pending +ffffffff81cda5b0 T avivo_program_fmt +ffffffff81cda6d0 T rs600_pm_misc +ffffffff81cdaa10 T rs600_pm_prepare +ffffffff81cdab10 T rs600_pm_finish +ffffffff81cdac10 T rs600_hpd_sense +ffffffff81cdac70 T rs600_hpd_set_polarity +ffffffff81cdad30 T rs600_hpd_init +ffffffff81cdae10 T rs600_hpd_fini +ffffffff81cdaeb0 T rs600_asic_reset +ffffffff81cdb120 T rs600_gart_tlb_flush +ffffffff81cdb1e0 T rs600_gart_get_page_entry +ffffffff81cdb240 T rs600_gart_set_page +ffffffff81cdb280 T rs600_irq_set +ffffffff81cdb450 T rs600_irq_disable +ffffffff81cdb4d0 t rs600_irq_ack +ffffffff81cdb680 T rs600_irq_process +ffffffff81cdb9f0 T rs600_get_vblank_counter +ffffffff81cdba40 T rs600_mc_wait_for_idle +ffffffff81cdbae0 T rs600_bandwidth_update +ffffffff81cdbbd0 T rs600_mc_rreg +ffffffff81cdbc50 T rs600_mc_wreg +ffffffff81cdbcc0 T rs600_set_safe_registers +ffffffff81cdbd00 T rs600_resume +ffffffff81cdbe30 t rs600_startup +ffffffff81cdc670 T rs600_suspend +ffffffff81cdc770 T rs600_fini +ffffffff81cdc870 T rs600_init +ffffffff81cdd000 T rs690_mc_wait_for_idle +ffffffff81cdd0a0 T rs690_pm_info +ffffffff81cdd330 T rs690_line_buffer_adjust +ffffffff81cdd430 T rs690_bandwidth_update +ffffffff81cdd750 t rs690_crtc_bandwidth_compute +ffffffff81cddb80 t rs690_compute_mode_priority +ffffffff81cde000 T rs690_mc_rreg +ffffffff81cde090 T rs690_mc_wreg +ffffffff81cde110 T rs690_resume +ffffffff81cde200 t rs690_startup +ffffffff81cde4f0 T rs690_suspend +ffffffff81cde550 T rs690_fini +ffffffff81cde600 T rs690_init +ffffffff81cdf000 T rs780_dpm_enable +ffffffff81cdfbe0 T rs780_dpm_disable +ffffffff81cdfcc0 T rs780_dpm_set_power_state +ffffffff81ce00a0 t rs780_force_voltage +ffffffff81ce01e0 t rs780_enable_voltage_scaling +ffffffff81ce0390 T rs780_dpm_setup_asic +ffffffff81ce03c0 T rs780_dpm_display_configuration_changed +ffffffff81ce0510 T rs780_dpm_init +ffffffff81ce0a80 T rs780_dpm_print_power_state +ffffffff81ce0b10 T rs780_dpm_fini +ffffffff81ce0ba0 T rs780_dpm_get_sclk +ffffffff81ce0be0 T rs780_dpm_get_mclk +ffffffff81ce0c10 T rs780_dpm_debugfs_print_current_performance_level +ffffffff81ce0c40 T rs780_dpm_get_current_sclk +ffffffff81ce0cd0 T rs780_dpm_get_current_mclk +ffffffff81ce0d00 T rs780_dpm_force_performance_level +ffffffff81ce0ef0 t rs780_force_fbdiv +ffffffff81ce2000 T rv515_ring_start +ffffffff81ce2b30 T rv515_mc_wait_for_idle +ffffffff81ce2bd0 T rv515_vga_render_disable +ffffffff81ce2c20 T rv515_mc_rreg +ffffffff81ce2cb0 T rv515_mc_wreg +ffffffff81ce2d30 T rv515_debugfs +ffffffff81ce2d40 T rv515_mc_stop +ffffffff81ce32d0 T rv515_mc_resume +ffffffff81ce38e0 T rv515_clock_startup +ffffffff81ce39b0 T rv515_resume +ffffffff81ce3bf0 t rv515_startup +ffffffff81ce40d0 T rv515_suspend +ffffffff81ce4140 T rv515_set_safe_registers +ffffffff81ce4180 T rv515_fini +ffffffff81ce4230 T rv515_init +ffffffff81ce4520 T atom_rv515_force_tv_scaler +ffffffff81ce7bc0 T rv515_bandwidth_avivo_update +ffffffff81ce7d60 t rv515_crtc_bandwidth_compute +ffffffff81ce80a0 t rv515_compute_mode_priority +ffffffff81ce8550 T rv515_bandwidth_update +ffffffff81ce9000 T rv6xx_dpm_enable +ffffffff81ce97f0 t rv6xx_calculate_stepping_parameters +ffffffff81ce99c0 t rv6xx_program_stepping_parameters_except_lowest_entry +ffffffff81ce9fb0 t rv6xx_program_stepping_parameters_lowest_entry +ffffffff81cea090 T rv6xx_dpm_disable +ffffffff81cea410 T rv6xx_dpm_set_power_state +ffffffff81ceae10 T rv6xx_setup_asic +ffffffff81ceaf50 T rv6xx_dpm_display_configuration_changed +ffffffff81ceafd0 T rv6xx_dpm_init +ffffffff81ceb520 T rv6xx_dpm_print_power_state +ffffffff81ceb5e0 T rv6xx_dpm_debugfs_print_current_performance_level +ffffffff81ceb610 T rv6xx_dpm_get_current_sclk +ffffffff81ceb680 T rv6xx_dpm_get_current_mclk +ffffffff81ceb6f0 T rv6xx_dpm_fini +ffffffff81ceb780 T rv6xx_dpm_get_sclk +ffffffff81ceb7c0 T rv6xx_dpm_get_mclk +ffffffff81ceb800 T rv6xx_dpm_force_performance_level +ffffffff81ceb990 t rv6xx_generate_steps +ffffffff81cebca0 t rv6xx_output_stepping +ffffffff81cebdc0 t rv6xx_program_mclk_stepping_entry +ffffffff81cec030 t rv6xx_program_engine_spread_spectrum +ffffffff81cec310 t rv6xx_step_sw_voltage +ffffffff81ced000 T rv730_populate_sclk_value +ffffffff81ced240 T rv730_populate_mclk_value +ffffffff81ced460 T rv730_read_clock_registers +ffffffff81ced580 T rv730_populate_smc_acpi_state +ffffffff81ced730 T rv730_populate_smc_initial_state +ffffffff81ced8f0 T rv730_program_memory_timing_parameters +ffffffff81cedad0 T rv730_start_dpm +ffffffff81cedb60 T rv730_stop_dpm +ffffffff81cedc20 T rv730_program_dcodt +ffffffff81cedcf0 T rv730_get_odt_values +ffffffff81cee000 T rv740_get_decoded_reference_divider +ffffffff81cee0a0 T rv740_get_dll_speed +ffffffff81cee1d0 T rv740_populate_sclk_value +ffffffff81cee3e0 T rv740_populate_mclk_value +ffffffff81cee820 T rv740_read_clock_registers +ffffffff81cee950 T rv740_populate_smc_acpi_state +ffffffff81ceeb80 T rv740_enable_mclk_spread_spectrum +ffffffff81ceebe0 T rv740_get_mclk_frequency_ratio +ffffffff81cef000 T rv770_set_uvd_clocks +ffffffff81cef570 T rv770_get_xclk +ffffffff81cef5d0 T rv770_page_flip +ffffffff81cef8e0 T rv770_page_flip_pending +ffffffff81cef950 T rv770_get_temp +ffffffff81cef9b0 T rv770_pm_misc +ffffffff81cefa90 T r700_cp_stop +ffffffff81cefb10 T r700_cp_fini +ffffffff81cefba0 T rv770_set_clk_bypass_mode +ffffffff81cefcc0 T r700_vram_gtt_location +ffffffff81cefe50 T rv770_resume +ffffffff81cefee0 t rv770_init_golden_registers +ffffffff81cf0070 t rv770_startup +ffffffff81cf2060 T rv770_suspend +ffffffff81cf2280 T rv770_init +ffffffff81cf2850 T rv770_fini +ffffffff81cf3000 T rv770_copy_dma +ffffffff81cf4000 T rv770_get_ps +ffffffff81cf4030 T rv770_get_pi +ffffffff81cf4060 T evergreen_get_pi +ffffffff81cf4090 T rv770_restore_cgcg +ffffffff81cf4110 T rv770_stop_dpm +ffffffff81cf41d0 T rv770_dpm_enabled +ffffffff81cf4210 T rv770_enable_thermal_protection +ffffffff81cf4270 T rv770_enable_acpi_pm +ffffffff81cf42c0 T rv770_get_seq_value +ffffffff81cf4300 T rv770_write_smc_soft_register +ffffffff81cf4330 T rv770_populate_smc_t +ffffffff81cf44d0 T rv770_populate_smc_sp +ffffffff81cf4530 T rv770_map_clkf_to_ibias +ffffffff81cf4590 T rv770_populate_vddc_value +ffffffff81cf4640 T rv770_populate_mvdd_value +ffffffff81cf4690 T rv770_calculate_memory_refresh_rate +ffffffff81cf4700 T rv770_enable_backbias +ffffffff81cf4760 T rv770_setup_bsp +ffffffff81cf4850 T rv770_program_git +ffffffff81cf48a0 T rv770_program_tp +ffffffff81cf4920 T rv770_program_tpp +ffffffff81cf4960 T rv770_program_sstp +ffffffff81cf49a0 T rv770_program_engine_speed_parameters +ffffffff81cf49f0 T rv770_program_vc +ffffffff81cf4a40 T rv770_clear_vc +ffffffff81cf4a80 T rv770_upload_firmware +ffffffff81cf4ac0 T rv770_populate_initial_mvdd_value +ffffffff81cf4b10 T rv770_get_memory_module_index +ffffffff81cf4b50 T rv770_enable_voltage_control +ffffffff81cf4bb0 T rv770_halt_smc +ffffffff81cf4c10 T rv770_resume_smc +ffffffff81cf4c60 T rv770_set_sw_state +ffffffff81cf4cc0 T rv770_set_boot_state +ffffffff81cf4d10 T rv770_set_uvd_clock_before_set_eng_clock +ffffffff81cf4d80 T rv770_set_uvd_clock_after_set_eng_clock +ffffffff81cf4df0 T rv770_restrict_performance_levels_before_switch +ffffffff81cf4e50 T rv770_dpm_force_performance_level +ffffffff81cf4f10 T r7xx_start_smc +ffffffff81cf4f40 T r7xx_stop_smc +ffffffff81cf4f70 T rv770_read_voltage_smio_registers +ffffffff81cf4fb0 T rv770_reset_smio_status +ffffffff81cf5070 T rv770_get_memory_type +ffffffff81cf50c0 T rv770_get_pcie_gen2_status +ffffffff81cf5130 T rv770_get_max_vddc +ffffffff81cf5190 T rv770_program_response_times +ffffffff81cf52e0 T rv770_enable_auto_throttle_source +ffffffff81cf5460 T rv770_dpm_enable +ffffffff81cf64e0 T rv770_dpm_late_enable +ffffffff81cf6610 T rv770_dpm_disable +ffffffff81cf6970 T rv770_dpm_set_power_state +ffffffff81cf6f70 T rv770_dpm_setup_asic +ffffffff81cf72d0 T rv770_dpm_display_configuration_changed +ffffffff81cf7350 T rv7xx_parse_power_table +ffffffff81cf7890 T rv770_get_engine_memory_ss +ffffffff81cf7920 T rv770_dpm_init +ffffffff81cf7b60 T rv770_dpm_print_power_state +ffffffff81cf7c80 T rv770_dpm_debugfs_print_current_performance_level +ffffffff81cf7cb0 T rv770_dpm_get_current_sclk +ffffffff81cf7d20 T rv770_dpm_get_current_mclk +ffffffff81cf7d90 T rv770_dpm_fini +ffffffff81cf7e20 T rv770_dpm_get_sclk +ffffffff81cf7e60 T rv770_dpm_get_mclk +ffffffff81cf7eb0 T rv770_dpm_vblank_too_short +ffffffff81cf7f20 t rv770_convert_power_level_to_smc +ffffffff81cf9000 T rv770_copy_bytes_to_smc +ffffffff81cf9240 T rv770_start_smc +ffffffff81cf9290 T rv770_reset_smc +ffffffff81cf92e0 T rv770_stop_smc_clock +ffffffff81cf9330 T rv770_start_smc_clock +ffffffff81cf9380 T rv770_is_smc_running +ffffffff81cf93c0 T rv770_send_msg_to_smc +ffffffff81cf94a0 T rv770_wait_for_smc_inactive +ffffffff81cf9540 T rv770_load_smc_ucode +ffffffff81cf96d0 T rv770_read_smc_sram_dword +ffffffff81cf9790 T rv770_write_smc_sram_dword +ffffffff81cfa000 T si_get_allowed_info_register +ffffffff81cfa090 T si_get_xclk +ffffffff81cfa100 T si_get_temp +ffffffff81cfa150 T si_mc_load_microcode +ffffffff81cfa420 T dce6_bandwidth_update +ffffffff81cfa820 t dce6_program_watermarks +ffffffff81cfb2d0 T si_fence_ring_emit +ffffffff81cfb750 T si_ring_ib_execute +ffffffff81cfbf30 T si_gpu_check_soft_reset +ffffffff81cfc0d0 T si_asic_reset +ffffffff81cfc4f0 t si_gpu_pci_config_reset +ffffffff81cfc8a0 T si_gfx_is_lockup +ffffffff81cfc910 T si_vram_gtt_location +ffffffff81cfc9b0 T si_pcie_gart_tlb_flush +ffffffff81cfca00 T si_ib_parse +ffffffff81cfd0b0 T si_vm_init +ffffffff81cfd0f0 T si_vm_fini +ffffffff81cfd120 T si_vm_flush +ffffffff81cfd800 T si_init_uvd_internal_cg +ffffffff81cfd850 T si_get_csb_size +ffffffff81cfd8e0 T si_get_csb_buffer +ffffffff81cfda70 T si_rlc_reset +ffffffff81cfdaf0 T si_irq_set +ffffffff81cfe000 t si_disable_interrupt_state +ffffffff81cfe280 T si_irq_process +ffffffff81cff480 t si_irq_ack +ffffffff81cffa80 T si_resume +ffffffff81cffb10 t si_init_golden_registers +ffffffff81cffcd0 t si_startup +ffffffff81d04500 T si_suspend +ffffffff81d04880 T si_init +ffffffff81d05d50 t si_cp_fini +ffffffff81d05e40 t si_pcie_gart_fini +ffffffff81d05f40 T si_fini +ffffffff81d061f0 T si_get_gpu_clock_counter +ffffffff81d062c0 T si_set_uvd_clocks +ffffffff81d06830 T si_set_vce_clocks +ffffffff81d06d70 t si_vce_send_vcepll_ctlreq +ffffffff81d06fb0 t dce6_latency_watermark +ffffffff81d071e0 t si_rlc_stop +ffffffff81d07390 t si_vm_reg_valid +ffffffff81d074f0 t si_vm_packet3_cp_dma_check +ffffffff81d07670 t si_update_cg +ffffffff81d07bc0 t si_enable_mgcg +ffffffff81d07fe0 t si_enable_cgcg +ffffffff81d09000 T si_dma_is_lockup +ffffffff81d09080 T si_dma_vm_copy_pages +ffffffff81d09160 T si_dma_vm_write_pages +ffffffff81d092c0 T si_dma_vm_set_pages +ffffffff81d09420 T si_dma_vm_flush +ffffffff81d098b0 T si_copy_dma +ffffffff81d0a000 T si_dpm_force_performance_level +ffffffff81d0a160 T si_get_ddr3_mclk_frequency_ratio +ffffffff81d0a1c0 T si_get_mclk_frequency_ratio +ffffffff81d0a240 T si_trim_voltage_table_to_fit_state_table +ffffffff81d0a340 T si_dpm_setup_asic +ffffffff81d0a510 T si_fan_ctrl_get_fan_speed_percent +ffffffff81d0a5a0 T si_fan_ctrl_set_fan_speed_percent +ffffffff81d0a660 T si_fan_ctrl_set_mode +ffffffff81d0a8b0 T si_fan_ctrl_get_mode +ffffffff81d0a900 T si_dpm_enable +ffffffff81d0fc00 t si_populate_smc_tdp_limits +ffffffff81d0fe10 T si_dpm_late_enable +ffffffff81d0ff60 T si_dpm_disable +ffffffff81d102e0 T si_dpm_pre_set_power_state +ffffffff81d10ee0 T si_dpm_set_power_state +ffffffff81d12460 T si_dpm_post_set_power_state +ffffffff81d12490 T si_dpm_display_configuration_changed +ffffffff81d12570 T si_dpm_init +ffffffff81d14020 T si_dpm_fini +ffffffff81d140d0 T si_dpm_debugfs_print_current_performance_level +ffffffff81d14120 T si_dpm_get_current_sclk +ffffffff81d14190 T si_dpm_get_current_mclk +ffffffff81d14200 t si_get_std_voltage_value +ffffffff81d14330 t si_convert_power_level_to_smc +ffffffff81d14bd0 t si_calculate_sclk_params +ffffffff81d14df0 t si_convert_mc_reg_table_to_smc +ffffffff81d14f50 t si_program_cac_config_registers +ffffffff81d16000 T si_copy_bytes_to_smc +ffffffff81d16250 T si_start_smc +ffffffff81d16290 T si_reset_smc +ffffffff81d162d0 T si_program_jump_on_start +ffffffff81d16300 T si_stop_smc_clock +ffffffff81d16340 T si_start_smc_clock +ffffffff81d16380 T si_is_smc_running +ffffffff81d163e0 T si_send_msg_to_smc +ffffffff81d164b0 T si_wait_for_smc_inactive +ffffffff81d16550 T si_load_smc_ucode +ffffffff81d166f0 T si_read_smc_sram_dword +ffffffff81d167c0 T si_write_smc_sram_dword +ffffffff81d17000 T sumo_get_pi +ffffffff81d17030 T sumo_gfx_clockgating_initialize +ffffffff81d17110 T sumo_program_vc +ffffffff81d17150 T sumo_clear_vc +ffffffff81d17190 T sumo_program_sstp +ffffffff81d17210 T sumo_take_smu_control +ffffffff81d17240 T sumo_get_sleep_divider_from_id +ffffffff81d17270 T sumo_get_sleep_divider_id_from_clock +ffffffff81d17320 T sumo_dpm_enable +ffffffff81d179c0 T sumo_dpm_late_enable +ffffffff81d17f80 T sumo_dpm_disable +ffffffff81d182d0 T sumo_dpm_pre_set_power_state +ffffffff81d18790 T sumo_dpm_set_power_state +ffffffff81d192d0 T sumo_dpm_post_set_power_state +ffffffff81d19370 T sumo_dpm_setup_asic +ffffffff81d19470 T sumo_dpm_display_configuration_changed +ffffffff81d194a0 T sumo_convert_vid2_to_vid7 +ffffffff81d19500 T sumo_construct_sclk_voltage_mapping_table +ffffffff81d195c0 T sumo_construct_vid_mapping_table +ffffffff81d19740 T sumo_dpm_init +ffffffff81d1a000 T sumo_dpm_print_power_state +ffffffff81d1a120 T sumo_dpm_debugfs_print_current_performance_level +ffffffff81d1a150 T sumo_dpm_get_current_sclk +ffffffff81d1a1c0 T sumo_dpm_get_current_mclk +ffffffff81d1a1f0 T sumo_dpm_get_current_vddc +ffffffff81d1a2c0 T sumo_dpm_fini +ffffffff81d1a350 T sumo_dpm_get_sclk +ffffffff81d1a3a0 T sumo_dpm_get_mclk +ffffffff81d1a3d0 T sumo_dpm_force_performance_level +ffffffff81d1a7f0 t sumo_power_level_enable +ffffffff81d1aa20 t sumo_program_power_level +ffffffff81d1b000 T sumo_initialize_m3_arb +ffffffff81d1b2c0 T sumo_smu_notify_alt_vddnb_change +ffffffff81d1b360 t sumo_send_msg_to_smu +ffffffff81d1b500 T sumo_smu_pg_init +ffffffff81d1b520 T sumo_enable_boost_timer +ffffffff81d1b660 T sumo_set_tdp_limit +ffffffff81d1b6e0 T sumo_boost_state_enable +ffffffff81d1b730 T sumo_get_running_fw_version +ffffffff81d1c000 T trinity_dpm_enable_bapm +ffffffff81d1c080 T trinity_dpm_enable +ffffffff81d1c520 T trinity_dpm_late_enable +ffffffff81d1ca80 T trinity_dpm_disable +ffffffff81d1ce90 T trinity_dpm_force_performance_level +ffffffff81d1cf50 T trinity_dpm_pre_set_power_state +ffffffff81d1d520 T trinity_dpm_set_power_state +ffffffff81d1dab0 T trinity_dpm_post_set_power_state +ffffffff81d1db50 T trinity_dpm_setup_asic +ffffffff81d1dbb0 T trinity_dpm_display_configuration_changed +ffffffff81d1dc40 T trinity_dpm_init +ffffffff81d1e540 T trinity_dpm_print_power_state +ffffffff81d1e650 T trinity_dpm_debugfs_print_current_performance_level +ffffffff81d1e6e0 T trinity_dpm_get_current_sclk +ffffffff81d1e740 T trinity_dpm_get_current_mclk +ffffffff81d1e770 T trinity_dpm_fini +ffffffff81d1e810 T trinity_dpm_get_sclk +ffffffff81d1e860 T trinity_dpm_get_mclk +ffffffff81d1e890 t trinity_program_power_level +ffffffff81d1f000 T trinity_dpm_bapm_enable +ffffffff81d1f150 T trinity_dpm_config +ffffffff81d1f230 T trinity_dpm_force_state +ffffffff81d1f310 T trinity_dpm_n_levels_disabled +ffffffff81d1f3f0 T trinity_uvd_dpm_config +ffffffff81d1f4c0 T trinity_dpm_no_forced_level +ffffffff81d1f590 T trinity_dce_enable_voltage_adjustment +ffffffff81d1f6e0 T trinity_gfx_dynamic_mgpg_config +ffffffff81d1f7b0 T trinity_acquire_mutex +ffffffff81d1f840 T trinity_release_mutex +ffffffff81d20000 T uvd_v1_0_get_rptr +ffffffff81d20040 T uvd_v1_0_get_wptr +ffffffff81d20080 T uvd_v1_0_set_wptr +ffffffff81d200c0 T uvd_v1_0_fence_emit +ffffffff81d204b0 T uvd_v1_0_resume +ffffffff81d20610 T uvd_v1_0_init +ffffffff81d20ba0 T uvd_v1_0_start +ffffffff81d21320 T uvd_v1_0_fini +ffffffff81d21490 T uvd_v1_0_stop +ffffffff81d21600 T uvd_v1_0_ring_test +ffffffff81d217d0 T uvd_v1_0_semaphore_emit +ffffffff81d21800 T uvd_v1_0_ib_execute +ffffffff81d219a0 T uvd_v1_0_ib_test +ffffffff81d22000 T uvd_v2_2_fence_emit +ffffffff81d22470 T uvd_v2_2_semaphore_emit +ffffffff81d22680 T uvd_v2_2_resume +ffffffff81d23000 T uvd_v3_1_semaphore_emit +ffffffff81d24000 T uvd_v4_2_resume +ffffffff81d25000 T vce_v1_0_get_rptr +ffffffff81d25090 T vce_v1_0_get_wptr +ffffffff81d25120 T vce_v1_0_set_wptr +ffffffff81d251b0 T vce_v1_0_enable_mgcg +ffffffff81d25470 T vce_v1_0_load_fw +ffffffff81d25640 T vce_v1_0_bo_size +ffffffff81d256b0 T vce_v1_0_resume +ffffffff81d26020 T vce_v1_0_start +ffffffff81d267e0 T vce_v1_0_init +ffffffff81d27000 T vce_v2_0_enable_mgcg +ffffffff81d27070 t vce_v2_0_set_dyn_cg +ffffffff81d27260 T vce_v2_0_bo_size +ffffffff81d272d0 T vce_v2_0_resume +ffffffff81d28000 T aldebaran_reset_init +ffffffff81d280c0 t aldebaran_async_reset +ffffffff81d28120 t aldebaran_get_reset_handler +ffffffff81d281d0 T aldebaran_reset_fini +ffffffff81d28230 t aldebaran_mode2_prepare_hwcontext +ffffffff81d28350 t aldebaran_mode2_perform_reset +ffffffff81d28530 t aldebaran_mode2_restore_hwcontext +ffffffff81d28a10 t aldebaran_mode2_reset +ffffffff81d29000 T aldebaran_reg_base_init +ffffffff81d2a000 T amdgpu_acpi_is_pcie_performance_request_supported +ffffffff81d2a040 T amdgpu_acpi_is_power_shift_control_supported +ffffffff81d2a070 T amdgpu_acpi_pcie_notify_device_ready +ffffffff81d2a190 t amdgpu_atcs_call +ffffffff81d2a280 T amdgpu_acpi_pcie_performance_request +ffffffff81d2a4d0 T amdgpu_acpi_power_shift_control +ffffffff81d2a580 T amdgpu_acpi_smart_shift_update +ffffffff81d2a6d0 T amdgpu_acpi_init +ffffffff81d2a790 t amdgpu_acpi_event +ffffffff81d2aad0 T amdgpu_acpi_get_backlight_caps +ffffffff81d2ab20 T amdgpu_acpi_fini +ffffffff81d2ab40 T amdgpu_acpi_should_gpu_reset +ffffffff81d2ab90 T amdgpu_acpi_detect +ffffffff81d2c000 T amdgpu_afmt_acr +ffffffff81d2d000 T amdgpu_amdkfd_init +ffffffff81d2d040 T amdgpu_amdkfd_fini +ffffffff81d2d070 T amdgpu_amdkfd_device_probe +ffffffff81d2d0a0 T amdgpu_amdkfd_device_init +ffffffff81d2d270 t amdgpu_amdkfd_reset_work +ffffffff81d2d2f0 T amdgpu_amdkfd_device_fini_sw +ffffffff81d2d340 T amdgpu_amdkfd_interrupt +ffffffff81d2d370 T amdgpu_amdkfd_suspend +ffffffff81d2d3a0 T amdgpu_amdkfd_resume_iommu +ffffffff81d2d3d0 T amdgpu_amdkfd_resume +ffffffff81d2d400 T amdgpu_amdkfd_pre_reset +ffffffff81d2d430 T amdgpu_amdkfd_post_reset +ffffffff81d2d460 T amdgpu_amdkfd_gpu_reset +ffffffff81d2d4c0 T amdgpu_amdkfd_alloc_gtt_mem +ffffffff81d2d770 t amdgpu_bo_reserve +ffffffff81d2d8d0 t amdgpu_bo_unreserve +ffffffff81d2d9b0 T amdgpu_amdkfd_free_gtt_mem +ffffffff81d2da20 T amdgpu_amdkfd_alloc_gws +ffffffff81d2db00 T amdgpu_amdkfd_free_gws +ffffffff81d2db40 T amdgpu_amdkfd_get_fw_version +ffffffff81d2dbf0 T amdgpu_amdkfd_get_local_mem_info +ffffffff81d2dcc0 T amdgpu_amdkfd_get_gpu_clock_counter +ffffffff81d2dd00 T amdgpu_amdkfd_get_max_engine_clock_in_mhz +ffffffff81d2dd80 T amdgpu_amdkfd_get_cu_info +ffffffff81d2ded0 T amdgpu_amdkfd_get_dmabuf_info +ffffffff81d2e010 T amdgpu_amdkfd_get_xgmi_hops_count +ffffffff81d2e080 T amdgpu_amdkfd_get_xgmi_bandwidth_mbytes +ffffffff81d2e110 T amdgpu_amdkfd_get_pcie_bandwidth_mbytes +ffffffff81d2e280 T amdgpu_amdkfd_submit_ib +ffffffff81d2e3e0 T amdgpu_amdkfd_set_compute_idle +ffffffff81d2e430 T amdgpu_amdkfd_is_kfd_vmid +ffffffff81d2e470 T amdgpu_amdkfd_flush_gpu_tlb_vmid +ffffffff81d2e510 T amdgpu_amdkfd_flush_gpu_tlb_pasid +ffffffff81d2e540 T amdgpu_amdkfd_have_atomics_support +ffffffff81d2e570 T amdgpu_amdkfd_ras_poison_consumption_handler +ffffffff81d2e5d0 T amdgpu_amdkfd_ras_query_utcl2_poison_status +ffffffff81d2f000 T amdgpu_atom_execute_table +ffffffff81d2f0a0 t amdgpu_atom_execute_table_locked +ffffffff81d2f3f0 T amdgpu_atom_parse +ffffffff81d2f940 T amdgpu_atom_destroy +ffffffff81d2f980 T amdgpu_atom_asic_init +ffffffff81d2faa0 T amdgpu_atom_parse_data_header +ffffffff81d2fb40 T amdgpu_atom_parse_cmd_header +ffffffff81d2fbc0 t atom_op_move +ffffffff81d2fda0 t atom_op_and +ffffffff81d2ff80 t atom_op_or +ffffffff81d30160 t atom_op_shift_left +ffffffff81d30350 t atom_op_shift_right +ffffffff81d30540 t atom_op_mul +ffffffff81d30690 t atom_op_div +ffffffff81d30800 t atom_op_add +ffffffff81d309e0 t atom_op_sub +ffffffff81d30bc0 t atom_op_setport +ffffffff81d30d40 t atom_op_setregblock +ffffffff81d30e00 t atom_op_setfbbase +ffffffff81d30ed0 t atom_op_compare +ffffffff81d310c0 t atom_op_switch +ffffffff81d31310 t atom_op_jump +ffffffff81d31590 t atom_op_test +ffffffff81d31750 t atom_op_delay +ffffffff81d31830 t atom_op_calltable +ffffffff81d31980 t atom_op_repeat +ffffffff81d319b0 t atom_op_clear +ffffffff81d31ac0 t atom_op_nop +ffffffff81d31af0 t atom_op_eot +ffffffff81d31b20 t atom_op_mask +ffffffff81d31df0 t atom_op_postcard +ffffffff81d31ea0 t atom_op_beep +ffffffff81d31ec0 t atom_op_savereg +ffffffff81d31ef0 t atom_op_restorereg +ffffffff81d31f20 t atom_op_setdatablock +ffffffff81d32060 t atom_op_xor +ffffffff81d32240 t atom_op_shl +ffffffff81d32460 t atom_op_shr +ffffffff81d32680 t atom_op_debug +ffffffff81d32730 t atom_op_processds +ffffffff81d327f0 t atom_op_mul32 +ffffffff81d32950 t atom_op_div32 +ffffffff81d32ae0 t atom_put_dst +ffffffff81d32fb0 t atom_get_src_int +ffffffff81d33660 t atom_iio_execute +ffffffff81d34000 T amdgpu_atombios_lookup_i2c_gpio +ffffffff81d34260 T amdgpu_atombios_i2c_init +ffffffff81d34540 T amdgpu_atombios_lookup_gpio +ffffffff81d34640 T amdgpu_atombios_has_dce_engine_info +ffffffff81d346c0 T amdgpu_atombios_get_connector_info_from_object_table +ffffffff81d34f10 T amdgpu_atombios_get_clock_info +ffffffff81d35250 T amdgpu_atombios_get_gfx_info +ffffffff81d35310 T amdgpu_atombios_get_vram_width +ffffffff81d353a0 T amdgpu_atombios_get_asic_ss_info +ffffffff81d35710 T amdgpu_atombios_get_clock_dividers +ffffffff81d35930 T amdgpu_atombios_has_gpu_virtualization_table +ffffffff81d35980 T amdgpu_atombios_scratch_regs_lock +ffffffff81d359e0 T amdgpu_atombios_scratch_regs_engine_hung +ffffffff81d35a30 T amdgpu_atombios_scratch_regs_set_backlight_level +ffffffff81d35a90 T amdgpu_atombios_scratch_need_asic_init +ffffffff81d35ae0 T amdgpu_atombios_copy_swap +ffffffff81d35b00 T amdgpu_atombios_fini +ffffffff81d35ba0 T amdgpu_atombios_init +ffffffff81d35e40 t cail_reg_read +ffffffff81d35e60 t cail_reg_write +ffffffff81d35e80 t cail_mc_read +ffffffff81d35eb0 t cail_mc_write +ffffffff81d35ee0 t cail_pll_read +ffffffff81d35f10 t cail_pll_write +ffffffff81d35f40 T amdgpu_atombios_get_data_table +ffffffff81d36000 T amdgpu_atombios_crtc_overscan_setup +ffffffff81d36150 T amdgpu_atombios_crtc_scaler_setup +ffffffff81d361d0 T amdgpu_atombios_crtc_lock +ffffffff81d36230 T amdgpu_atombios_crtc_enable +ffffffff81d36290 T amdgpu_atombios_crtc_blank +ffffffff81d362f0 T amdgpu_atombios_crtc_powergate +ffffffff81d36360 T amdgpu_atombios_crtc_powergate_init +ffffffff81d363d0 T amdgpu_atombios_crtc_set_dtd_timing +ffffffff81d364e0 T amdgpu_atombios_crtc_set_disp_eng_pll +ffffffff81d365d0 T amdgpu_atombios_crtc_set_dce_clock +ffffffff81d366c0 T amdgpu_atombios_crtc_program_pll +ffffffff81d369d0 T amdgpu_atombios_crtc_prepare_pll +ffffffff81d36ed0 T amdgpu_atombios_crtc_set_pll +ffffffff81d38000 T amdgpu_atombios_dp_aux_init +ffffffff81d38090 t amdgpu_atombios_dp_aux_transfer +ffffffff81d38200 T amdgpu_atombios_dp_get_sinktype +ffffffff81d38270 T amdgpu_atombios_dp_get_dpcd +ffffffff81d38420 T amdgpu_atombios_dp_get_panel_mode +ffffffff81d38510 T amdgpu_atombios_dp_set_link_config +ffffffff81d38590 t amdgpu_atombios_dp_get_dp_link_config +ffffffff81d38710 T amdgpu_atombios_dp_mode_valid_helper +ffffffff81d38790 T amdgpu_atombios_dp_needs_link_train +ffffffff81d38800 T amdgpu_atombios_dp_set_rx_power_state +ffffffff81d38880 T amdgpu_atombios_dp_link_train +ffffffff81d38dd0 t amdgpu_atombios_dp_process_aux_ch +ffffffff81d38f40 t amdgpu_atombios_dp_get_adjust_train +ffffffff81d3a000 T amdgpu_atombios_encoder_get_backlight_level_from_reg +ffffffff81d3a050 T amdgpu_atombios_encoder_set_backlight_level_to_reg +ffffffff81d3a0a0 T amdgpu_atombios_encoder_get_backlight_level +ffffffff81d3a100 T amdgpu_atombios_encoder_set_backlight_level +ffffffff81d3a210 T amdgpu_atombios_encoder_setup_dig_transmitter +ffffffff81d3abe0 T amdgpu_atombios_encoder_init_backlight +ffffffff81d3ad80 t amdgpu_atombios_encoder_get_backlight_brightness +ffffffff81d3ade0 T amdgpu_atombios_encoder_fini_backlight +ffffffff81d3ae70 T amdgpu_atombios_encoder_is_digital +ffffffff81d3aec0 T amdgpu_atombios_encoder_mode_fixup +ffffffff81d3afa0 T amdgpu_atombios_encoder_get_encoder_mode +ffffffff81d3b140 T amdgpu_atombios_encoder_setup_dig_encoder +ffffffff81d3b600 T amdgpu_atombios_encoder_set_edp_panel_power +ffffffff81d3b700 T amdgpu_atombios_encoder_dpms +ffffffff81d3b870 t amdgpu_atombios_encoder_setup_dig +ffffffff81d3bbe0 t amdgpu_atombios_encoder_setup_dvo +ffffffff81d3bd80 T amdgpu_atombios_encoder_set_crtc_source +ffffffff81d3c160 T amdgpu_atombios_encoder_init_dig +ffffffff81d3c230 t amdgpu_atombios_encoder_setup_external_encoder +ffffffff81d3c490 T amdgpu_atombios_encoder_dac_detect +ffffffff81d3c670 T amdgpu_atombios_encoder_dig_detect +ffffffff81d3c770 T amdgpu_atombios_encoder_setup_ext_encoder_ddc +ffffffff81d3c7c0 T amdgpu_atombios_encoder_set_bios_scratch_regs +ffffffff81d3cd60 T amdgpu_atombios_encoder_get_lcd_info +ffffffff81d3d0c0 T amdgpu_atombios_encoder_get_dig_info +ffffffff81d3d130 t amdgpu_atombios_encoder_update_backlight_status +ffffffff81d3e000 T amdgpu_atombios_i2c_xfer +ffffffff81d3e3b0 T amdgpu_atombios_i2c_func +ffffffff81d3e3e0 T amdgpu_atombios_i2c_channel_trans +ffffffff81d3f000 T amdgpu_atomfirmware_query_firmware_capability +ffffffff81d3f090 T amdgpu_atomfirmware_gpu_virtualization_supported +ffffffff81d3f0c0 T amdgpu_atomfirmware_scratch_regs_init +ffffffff81d3f140 T amdgpu_atomfirmware_allocate_fb_scratch +ffffffff81d3f270 T amdgpu_atomfirmware_get_vram_info +ffffffff81d3f9d0 T amdgpu_atomfirmware_mem_ecc_supported +ffffffff81d3fa80 T amdgpu_atomfirmware_sram_ecc_supported +ffffffff81d3fab0 T amdgpu_atomfirmware_dynamic_boot_config_supported +ffffffff81d3fae0 T amdgpu_atomfirmware_ras_rom_addr +ffffffff81d3fb80 T amdgpu_atomfirmware_get_clock_info +ffffffff81d3fda0 T amdgpu_atomfirmware_get_gfx_info +ffffffff81d3ff40 T amdgpu_atomfirmware_mem_training_supported +ffffffff81d3ff80 T amdgpu_atomfirmware_get_fw_reserved_fb_size +ffffffff81d40010 T amdgpu_atomfirmware_asic_init +ffffffff81d41000 T amdgpu_benchmark +ffffffff81d417a0 t amdgpu_benchmark_move +ffffffff81d42000 T amdgpu_read_bios +ffffffff81d42190 t check_atom_bios +ffffffff81d422a0 T amdgpu_get_bios +ffffffff81d42850 t igp_read_bios_from_vram +ffffffff81d42990 T amdgpu_soc15_read_bios_from_rom +ffffffff81d43000 T amdgpu_bo_list_create +ffffffff81d43290 T amdgpu_bo_list_get +ffffffff81d432f0 T amdgpu_bo_list_get_list +ffffffff81d43450 T amdgpu_bo_list_put +ffffffff81d43500 T amdgpu_bo_create_list_entry_array +ffffffff81d43650 T amdgpu_bo_list_ioctl +ffffffff81d44000 T amdgpu_cgs_create_device +ffffffff81d44080 T amdgpu_cgs_destroy_device +ffffffff81d440a0 t amdgpu_cgs_read_register +ffffffff81d440c0 t amdgpu_cgs_write_register +ffffffff81d440e0 t amdgpu_cgs_read_ind_register +ffffffff81d441c0 t amdgpu_cgs_write_ind_register +ffffffff81d44270 t amdgpu_cgs_get_firmware_info +ffffffff81d45000 T amdgpu_connector_hotplug +ffffffff81d450f0 T amdgpu_connector_get_monitor_bpc +ffffffff81d45380 T amdgpu_connector_edid +ffffffff81d45430 T amdgpu_connector_encoder_get_dp_bridge_encoder_id +ffffffff81d454b0 T amdgpu_connector_is_dp12_capable +ffffffff81d45540 T amdgpu_connector_add +ffffffff81d46150 t amdgpu_connector_dp_detect +ffffffff81d464c0 t amdgpu_connector_dvi_force +ffffffff81d46510 t amdgpu_connector_set_property +ffffffff81d46a80 t amdgpu_connector_late_register +ffffffff81d46ae0 t amdgpu_connector_unregister +ffffffff81d46b40 t amdgpu_connector_destroy +ffffffff81d46bb0 t amdgpu_connector_best_single_encoder +ffffffff81d46c30 t amdgpu_connector_dp_get_modes +ffffffff81d46f60 t amdgpu_connector_dp_mode_valid +ffffffff81d47080 t amdgpu_connector_dvi_encoder +ffffffff81d47160 t amdgpu_connector_get_edid +ffffffff81d472e0 t amdgpu_connector_fixup_lcd_native_mode +ffffffff81d47410 t amdgpu_connector_add_common_modes +ffffffff81d47500 t amdgpu_connector_lcd_native_mode +ffffffff81d475d0 t amdgpu_connector_set_lcd_property +ffffffff81d476c0 t amdgpu_connector_vga_detect +ffffffff81d47910 t amdgpu_connector_vga_get_modes +ffffffff81d47a00 t amdgpu_connector_vga_mode_valid +ffffffff81d47a50 t amdgpu_connector_dvi_detect +ffffffff81d47e50 t amdgpu_connector_dvi_mode_valid +ffffffff81d47f00 t amdgpu_connector_lvds_detect +ffffffff81d48070 t amdgpu_connector_lvds_get_modes +ffffffff81d481e0 t amdgpu_connector_lvds_mode_valid +ffffffff81d49000 T amdgpu_cs_report_moved_bytes +ffffffff81d49070 T amdgpu_cs_ioctl +ffffffff81d4ae40 t amdgpu_cs_parser_fini +ffffffff81d4afd0 T amdgpu_cs_wait_ioctl +ffffffff81d4b110 T amdgpu_cs_fence_to_handle_ioctl +ffffffff81d4b2b0 t amdgpu_cs_get_fence +ffffffff81d4b360 T amdgpu_cs_wait_fences_ioctl +ffffffff81d4b650 T amdgpu_cs_find_mapping +ffffffff81d4b750 t amdgpu_cs_bo_validate +ffffffff81d4ba60 t amdgpu_cs_list_validate +ffffffff81d4c000 T amdgpu_csa_vaddr +ffffffff81d4c060 T amdgpu_allocate_static_csa +ffffffff81d4c100 T amdgpu_free_static_csa +ffffffff81d4c120 T amdgpu_map_static_csa +ffffffff81d4d000 T amdgpu_ctx_priority_is_valid +ffffffff81d4d060 T amdgpu_ctx_get_entity +ffffffff81d4d370 T amdgpu_ctx_ioctl +ffffffff81d4da70 T amdgpu_ctx_get +ffffffff81d4daf0 T amdgpu_ctx_put +ffffffff81d4dd00 T amdgpu_ctx_add_fence +ffffffff81d4de70 T amdgpu_ctx_get_fence +ffffffff81d4df20 T amdgpu_ctx_priority_override +ffffffff81d4e100 T amdgpu_ctx_wait_prev_fence +ffffffff81d4e1b0 T amdgpu_ctx_mgr_init +ffffffff81d4e250 T amdgpu_ctx_mgr_entity_flush +ffffffff81d4e360 T amdgpu_ctx_mgr_entity_fini +ffffffff81d4e610 T amdgpu_ctx_mgr_fini +ffffffff81d4e6c0 t amdgpu_ctx_fini +ffffffff81d4e8a0 T amdgpu_ctx_mgr_usage +ffffffff81d4eb00 t amdgpu_ctx_set_stable_pstate +ffffffff81d4f000 T amdgpu_debugfs_init +ffffffff81d4f030 T amdgpu_debugfs_regs_init +ffffffff81d50000 T amdgpu_device_supports_px +ffffffff81d50040 T amdgpu_device_supports_boco +ffffffff81d50070 T amdgpu_device_supports_baco +ffffffff81d500a0 T amdgpu_device_supports_smart_shift +ffffffff81d500e0 T amdgpu_device_mm_access +ffffffff81d50340 T amdgpu_device_wreg +ffffffff81d50440 T amdgpu_device_rreg +ffffffff81d50520 T amdgpu_device_aper_access +ffffffff81d50660 T amdgpu_device_flush_hdp +ffffffff81d50700 T amdgpu_device_invalidate_hdp +ffffffff81d50780 T amdgpu_device_vram_access +ffffffff81d50810 T amdgpu_device_skip_hw_access +ffffffff81d50840 T amdgpu_mm_rreg8 +ffffffff81d508c0 T amdgpu_mm_wreg8 +ffffffff81d50940 T amdgpu_mm_wreg_mmio_rlc +ffffffff81d50a30 T amdgpu_mm_rdoorbell +ffffffff81d50aa0 T amdgpu_mm_wdoorbell +ffffffff81d50b00 T amdgpu_mm_rdoorbell64 +ffffffff81d50b70 T amdgpu_mm_wdoorbell64 +ffffffff81d50bd0 T amdgpu_device_indirect_rreg +ffffffff81d50c60 T amdgpu_device_indirect_rreg64 +ffffffff81d50d10 T amdgpu_device_indirect_wreg +ffffffff81d50d90 T amdgpu_device_indirect_wreg64 +ffffffff81d50e20 T amdgpu_device_program_register_sequence +ffffffff81d51060 T amdgpu_device_pci_config_reset +ffffffff81d51090 T amdgpu_device_pci_reset +ffffffff81d510e0 T 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amdgpu_device_has_dc_support +ffffffff81d52120 T amdgpu_device_init +ffffffff81d54250 t amdgpu_invalid_rreg +ffffffff81d54290 t amdgpu_invalid_wreg +ffffffff81d542d0 t amdgpu_invalid_rreg64 +ffffffff81d54310 t amdgpu_invalid_wreg64 +ffffffff81d54350 t amdgpu_block_invalid_rreg +ffffffff81d54390 t amdgpu_block_invalid_wreg +ffffffff81d543d0 t amdgpu_device_delayed_init_work_handler +ffffffff81d54430 t amdgpu_device_delay_enable_gfx_off +ffffffff81d54510 t amdgpu_device_xgmi_reset_func +ffffffff81d54810 t amdgpu_device_ip_late_init +ffffffff81d54c40 T amdgpu_device_cache_pci_state +ffffffff81d54c70 T amdgpu_device_fini_hw +ffffffff81d55160 t amdgpu_device_unmap_mmio +ffffffff81d55260 T amdgpu_device_fini_sw +ffffffff81d55640 T amdgpu_device_suspend +ffffffff81d557e0 T amdgpu_device_resume +ffffffff81d55b10 T amdgpu_device_has_job_running +ffffffff81d55be0 T amdgpu_device_should_recover_gpu +ffffffff81d55d10 T amdgpu_device_mode1_reset +ffffffff81d55e20 T amdgpu_device_load_pci_state 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amdgpu_vm_handle_moved +ffffffff81db3100 T amdgpu_vm_bo_add +ffffffff81db31d0 T amdgpu_vm_bo_map +ffffffff81db3520 T amdgpu_vm_bo_replace_map +ffffffff81db3800 T amdgpu_vm_bo_clear_mappings +ffffffff81db3d30 T amdgpu_vm_bo_unmap +ffffffff81db3e60 T amdgpu_vm_bo_lookup_mapping +ffffffff81db3ed0 T amdgpu_vm_bo_trace_cs +ffffffff81db3f00 T amdgpu_vm_bo_del +ffffffff81db40f0 T amdgpu_vm_evictable +ffffffff81db41a0 T amdgpu_vm_bo_invalidate +ffffffff81db4460 T amdgpu_vm_adjust_size +ffffffff81db46d0 T amdgpu_vm_wait_idle +ffffffff81db4740 T amdgpu_vm_init +ffffffff81db4b00 t amdgpu_bo_reserve +ffffffff81db4c60 t amdgpu_bo_unreserve +ffffffff81db4d40 T amdgpu_vm_make_compute +ffffffff81db4f40 T amdgpu_vm_release_compute +ffffffff81db4ff0 T amdgpu_vm_fini +ffffffff81db5450 T amdgpu_vm_manager_init +ffffffff81db55f0 T amdgpu_vm_manager_fini +ffffffff81db5650 T amdgpu_vm_ioctl +ffffffff81db5770 T amdgpu_vm_get_task_info +ffffffff81db5810 T amdgpu_vm_set_task_info +ffffffff81db5900 T amdgpu_vm_handle_fault +ffffffff81db5ad0 t amdgpu_vm_add_prt_cb +ffffffff81db5c20 t amdgpu_vm_prt_cb +ffffffff81db6000 t amdgpu_vm_cpu_map_table +ffffffff81db6020 t amdgpu_vm_cpu_prepare +ffffffff81db6070 t amdgpu_vm_cpu_update +ffffffff81db6170 t amdgpu_vm_cpu_commit +ffffffff81db7000 T amdgpu_vm_pt_clear +ffffffff81db7430 T amdgpu_vm_pt_create +ffffffff81db7950 T amdgpu_vm_pt_free_work +ffffffff81db7c20 t amdgpu_vm_pt_free +ffffffff81db7d00 T amdgpu_vm_pt_free_root +ffffffff81db7d20 t amdgpu_vm_pt_free_dfs +ffffffff81db8a90 T amdgpu_vm_pt_is_root_clean +ffffffff81db8b60 T amdgpu_vm_pde_update +ffffffff81db8c50 T amdgpu_vm_ptes_update +ffffffff81db9620 t amdgpu_vm_pt_next +ffffffff81dba000 t amdgpu_vm_sdma_map_table +ffffffff81dba060 t amdgpu_vm_sdma_prepare +ffffffff81dba100 t amdgpu_vm_sdma_update +ffffffff81dba5e0 t amdgpu_vm_sdma_commit +ffffffff81dbb000 T amdgpu_vram_mgr_bo_visible_size +ffffffff81dbb110 T amdgpu_vram_mgr_reserve_range +ffffffff81dbb1f0 t amdgpu_vram_mgr_do_reserve +ffffffff81dbb370 T amdgpu_vram_mgr_query_page_status +ffffffff81dbb450 T amdgpu_vram_mgr_alloc_sgt +ffffffff81dbb4a0 T amdgpu_vram_mgr_free_sgt +ffffffff81dbb4d0 T amdgpu_vram_mgr_vis_usage +ffffffff81dbb500 T amdgpu_vram_mgr_init +ffffffff81dbb6d0 T amdgpu_vram_mgr_fini +ffffffff81dbb8e0 t amdgpu_vram_mgr_new +ffffffff81dbbe70 t amdgpu_vram_mgr_del +ffffffff81dbbf50 t amdgpu_vram_mgr_intersects +ffffffff81dbbfd0 t amdgpu_vram_mgr_compatible +ffffffff81dbc050 t amdgpu_vram_mgr_debug +ffffffff81dbd000 t amdgpu_xgmi_hive_release +ffffffff81dbd050 T amdgpu_get_xgmi_hive +ffffffff81dbd0a0 T amdgpu_put_xgmi_hive +ffffffff81dbd0f0 T amdgpu_xgmi_set_pstate +ffffffff81dbd140 T amdgpu_xgmi_update_topology +ffffffff81dbd200 T amdgpu_xgmi_get_hops_count +ffffffff81dbd270 T amdgpu_xgmi_get_num_links +ffffffff81dbd2e0 T amdgpu_xgmi_add_device +ffffffff81dbd500 T amdgpu_xgmi_remove_device +ffffffff81dbd650 T amdgpu_xgmi_get_relative_phy_addr +ffffffff81dbd690 t amdgpu_ras_error_inject_xgmi +ffffffff81dbd800 t amdgpu_xgmi_query_ras_error_count +ffffffff81dbe020 t amdgpu_xgmi_reset_ras_error_count +ffffffff81dbe340 t amdgpu_xgmi_ras_late_init +ffffffff81dbf000 T arct_reg_base_init +ffffffff81dc0000 T athub_v1_0_set_clockgating +ffffffff81dc0210 T athub_v1_0_get_clockgating +ffffffff81dc1000 T athub_v2_0_set_clockgating +ffffffff81dc11e0 T athub_v2_0_get_clockgating +ffffffff81dc2000 T athub_v2_1_set_clockgating +ffffffff81dc21f0 T athub_v2_1_get_clockgating +ffffffff81dc3000 T athub_v3_0_set_clockgating +ffffffff81dc30d0 T athub_v3_0_get_clockgating +ffffffff81dc3120 t athub_v3_0_get_cg_cntl +ffffffff81dc31c0 t athub_v3_0_set_cg_cntl +ffffffff81dc4000 t cz_ih_early_init +ffffffff81dc4050 t cz_ih_sw_init +ffffffff81dc40b0 t cz_ih_sw_fini +ffffffff81dc40f0 t cz_ih_hw_init +ffffffff81dc4320 t cz_ih_hw_fini +ffffffff81dc43f0 t cz_ih_suspend +ffffffff81dc44c0 t cz_ih_resume +ffffffff81dc4500 t cz_ih_is_idle +ffffffff81dc4550 t cz_ih_wait_for_idle +ffffffff81dc45f0 t cz_ih_soft_reset +ffffffff81dc46d0 t cz_ih_set_clockgating_state +ffffffff81dc4700 t cz_ih_set_powergating_state +ffffffff81dc4730 t cz_ih_get_wptr +ffffffff81dc4820 t cz_ih_decode_iv +ffffffff81dc48a0 t cz_ih_set_rptr +ffffffff81dc5000 T dce_v10_0_disable_dce +ffffffff81dc5170 t dce_v10_0_early_init +ffffffff81dc5230 t dce_v10_0_sw_init +ffffffff81dc56a0 t dce_v10_0_sw_fini +ffffffff81dc57d0 t dce_v10_0_hw_init +ffffffff81dc5b40 t dce_v10_0_hw_fini +ffffffff81dc5cd0 t dce_v10_0_suspend +ffffffff81dc5d30 t dce_v10_0_resume +ffffffff81dc5da0 t dce_v10_0_is_idle +ffffffff81dc5dd0 t dce_v10_0_wait_for_idle +ffffffff81dc5e00 t dce_v10_0_check_soft_reset +ffffffff81dc5e10 t dce_v10_0_soft_reset +ffffffff81dc5ee0 t dce_v10_0_set_clockgating_state +ffffffff81dc5f10 t dce_v10_0_set_powergating_state +ffffffff81dc5f40 t dce_v10_0_audio_endpt_rreg +ffffffff81dc5fd0 t dce_v10_0_audio_endpt_wreg +ffffffff81dc6050 t dce_v10_0_bandwidth_update +ffffffff81dc6ac0 t dce_v10_0_vblank_get_counter +ffffffff81dc6b10 t dce_v10_0_hpd_sense +ffffffff81dc6b70 t dce_v10_0_hpd_set_polarity +ffffffff81dc6c40 t dce_v10_0_hpd_get_gpio_reg +ffffffff81dc6c70 t dce_v10_0_page_flip +ffffffff81dc6d60 t dce_v10_0_crtc_get_scanoutpos +ffffffff81dc6e00 t dce_v10_0_encoder_add +ffffffff81dc7030 t dce_v10_0_latency_watermark +ffffffff81dc7250 t dce_v10_0_encoder_destroy +ffffffff81dc72b0 t dce_v10_0_encoder_prepare +ffffffff81dc74b0 t dce_v10_0_encoder_commit +ffffffff81dc74e0 t dce_v10_0_encoder_mode_set +ffffffff81dc8380 t dce_v10_0_encoder_disable +ffffffff81dc8490 t dce_v10_0_ext_dpms +ffffffff81dc84c0 t dce_v10_0_ext_prepare +ffffffff81dc84f0 t dce_v10_0_ext_commit +ffffffff81dc8520 t dce_v10_0_ext_mode_set +ffffffff81dc8550 t dce_v10_0_ext_disable +ffffffff81dc8580 t dce_v10_0_set_crtc_irq_state +ffffffff81dc8660 t dce_v10_0_crtc_irq +ffffffff81dc8890 t dce_v10_0_set_crtc_vblank_interrupt_state +ffffffff81dc8960 t dce_v10_0_set_crtc_vline_interrupt_state +ffffffff81dc8a30 t dce_v10_0_set_pageflip_irq_state +ffffffff81dc8ae0 t dce_v10_0_pageflip_irq +ffffffff81dc8c40 t dce_v10_0_set_hpd_irq_state +ffffffff81dc8d10 t dce_v10_0_hpd_irq +ffffffff81dc8e30 t dce_v10_0_crtc_cursor_set2 +ffffffff81dc91a0 t dce_v10_0_crtc_cursor_move +ffffffff81dc9280 t dce_v10_0_crtc_gamma_set +ffffffff81dc92c0 t dce_v10_0_crtc_destroy +ffffffff81dc92f0 t amdgpu_bo_reserve +ffffffff81dc9500 t amdgpu_bo_unreserve +ffffffff81dc95e0 t dce_v10_0_cursor_move_locked +ffffffff81dc9730 t dce_v10_0_crtc_load_lut +ffffffff81dc9ac0 t dce_v10_0_crtc_dpms +ffffffff81dc9c90 t dce_v10_0_crtc_prepare +ffffffff81dc9cd0 t dce_v10_0_crtc_commit +ffffffff81dc9d00 t dce_v10_0_crtc_mode_fixup +ffffffff81dc9ec0 t dce_v10_0_crtc_mode_set +ffffffff81dca0b0 t dce_v10_0_crtc_set_base +ffffffff81dca0d0 t dce_v10_0_crtc_set_base_atomic +ffffffff81dca0f0 t dce_v10_0_crtc_disable +ffffffff81dca290 t dce_v10_0_crtc_do_set_base +ffffffff81dca940 t dce_v10_0_is_display_hung +ffffffff81dcb000 T dce_v11_0_disable_dce +ffffffff81dcb160 t dce_v11_0_early_init +ffffffff81dcb2b0 t dce_v11_0_sw_init +ffffffff81dcb730 t dce_v11_0_sw_fini +ffffffff81dcb860 t dce_v11_0_hw_init +ffffffff81dcbc30 t dce_v11_0_hw_fini +ffffffff81dcbdc0 t dce_v11_0_suspend +ffffffff81dcbe20 t dce_v11_0_resume +ffffffff81dcbe90 t dce_v11_0_is_idle +ffffffff81dcbec0 t dce_v11_0_wait_for_idle +ffffffff81dcbef0 t dce_v11_0_soft_reset +ffffffff81dcc110 t dce_v11_0_set_clockgating_state +ffffffff81dcc140 t dce_v11_0_set_powergating_state +ffffffff81dcc170 t dce_v11_0_audio_endpt_rreg +ffffffff81dcc200 t dce_v11_0_audio_endpt_wreg +ffffffff81dcc280 t dce_v11_0_bandwidth_update +ffffffff81dcccf0 t dce_v11_0_vblank_get_counter +ffffffff81dccd40 t dce_v11_0_hpd_sense +ffffffff81dccda0 t dce_v11_0_hpd_set_polarity +ffffffff81dcce70 t dce_v11_0_hpd_get_gpio_reg +ffffffff81dccea0 t dce_v11_0_page_flip +ffffffff81dccfa0 t dce_v11_0_crtc_get_scanoutpos +ffffffff81dcd040 t dce_v11_0_encoder_add +ffffffff81dcd270 t dce_v11_0_latency_watermark +ffffffff81dcd490 t dce_v11_0_encoder_destroy +ffffffff81dcd4f0 t dce_v11_0_encoder_prepare +ffffffff81dcd6f0 t dce_v11_0_encoder_commit +ffffffff81dcd720 t dce_v11_0_encoder_mode_set +ffffffff81dce5c0 t dce_v11_0_encoder_disable +ffffffff81dce6d0 t dce_v11_0_ext_dpms +ffffffff81dce700 t dce_v11_0_ext_prepare +ffffffff81dce730 t dce_v11_0_ext_commit +ffffffff81dce760 t dce_v11_0_ext_mode_set +ffffffff81dce790 t dce_v11_0_ext_disable +ffffffff81dce7c0 t dce_v11_0_set_crtc_irq_state +ffffffff81dce8a0 t dce_v11_0_crtc_irq +ffffffff81dceac0 t dce_v11_0_set_crtc_vblank_interrupt_state +ffffffff81dceb90 t dce_v11_0_set_crtc_vline_interrupt_state +ffffffff81dcec60 t dce_v11_0_set_pageflip_irq_state +ffffffff81dced10 t dce_v11_0_pageflip_irq +ffffffff81dcee70 t dce_v11_0_set_hpd_irq_state +ffffffff81dcef40 t dce_v11_0_hpd_irq +ffffffff81dcf060 t dce_v11_0_crtc_cursor_set2 +ffffffff81dcf3d0 t dce_v11_0_crtc_cursor_move +ffffffff81dcf4b0 t dce_v11_0_crtc_gamma_set +ffffffff81dcf4f0 t dce_v11_0_crtc_destroy +ffffffff81dcf520 t amdgpu_bo_reserve +ffffffff81dcf730 t amdgpu_bo_unreserve +ffffffff81dcf810 t dce_v11_0_cursor_move_locked +ffffffff81dcf960 t dce_v11_0_crtc_load_lut +ffffffff81dcfcd0 t dce_v11_0_crtc_dpms +ffffffff81dcfea0 t dce_v11_0_crtc_prepare +ffffffff81dcfee0 t dce_v11_0_crtc_commit +ffffffff81dcff10 t dce_v11_0_crtc_mode_fixup +ffffffff81dd0180 t dce_v11_0_crtc_mode_set +ffffffff81dd03e0 t dce_v11_0_crtc_set_base +ffffffff81dd0400 t dce_v11_0_crtc_set_base_atomic +ffffffff81dd0420 t dce_v11_0_crtc_disable +ffffffff81dd05c0 t dce_v11_0_crtc_do_set_base +ffffffff81dd1000 t df_v1_7_sw_init +ffffffff81dd1040 t df_v1_7_sw_fini +ffffffff81dd1070 t df_v1_7_enable_broadcast_mode +ffffffff81dd1190 t df_v1_7_get_fb_channel_number +ffffffff81dd1210 t df_v1_7_get_hbm_channel_number +ffffffff81dd1260 t df_v1_7_update_medium_grain_clock_gating +ffffffff81dd13d0 t df_v1_7_get_clockgating_state +ffffffff81dd1460 t df_v1_7_enable_ecc_force_par_wr_rmw +ffffffff81dd2000 t df_v3_6_sw_init +ffffffff81dd2160 t df_v3_6_sw_fini +ffffffff81dd2190 t df_v3_6_enable_broadcast_mode +ffffffff81dd22b0 t df_v3_6_get_fb_channel_number +ffffffff81dd2390 t df_v3_6_get_hbm_channel_number +ffffffff81dd23e0 t df_v3_6_update_medium_grain_clock_gating +ffffffff81dd2580 t df_v3_6_get_clockgating_state +ffffffff81dd2610 t df_v3_6_pmc_start +ffffffff81dd2990 t df_v3_6_pmc_stop +ffffffff81dd2c30 t df_v3_6_pmc_get_count +ffffffff81dd2dc0 t df_v3_6_get_fica +ffffffff81dd2ed0 t df_v3_6_set_fica +ffffffff81dd2fb0 t df_v3_6_query_ras_poison_mode +ffffffff81dd3120 t df_v3_6_perfmon_arm_with_status +ffffffff81dd4000 T dimgrey_cavefish_reg_base_init +ffffffff81dd5000 T emu_soc_asic_init +ffffffff81dd6000 t gfx_v10_0_early_init +ffffffff81dd6420 t gfx_v10_0_late_init +ffffffff81dd6490 t gfx_v10_0_sw_init +ffffffff81dd7840 t gfx_v10_0_sw_fini +ffffffff81dd7b80 t gfx_v10_0_hw_init +ffffffff81dda730 t gfx_v10_0_hw_fini +ffffffff81ddaa20 t gfx_v10_0_suspend +ffffffff81ddaa60 t gfx_v10_0_resume +ffffffff81ddaa70 t gfx_v10_0_is_idle +ffffffff81ddab00 t gfx_v10_0_wait_for_idle +ffffffff81ddabe0 t gfx_v10_0_soft_reset +ffffffff81ddaf30 t gfx_v10_0_set_clockgating_state +ffffffff81ddb1d0 t gfx_v10_0_set_powergating_state +ffffffff81ddb3f0 t gfx_v10_0_get_clockgating_state +ffffffff81ddb500 t gfx10_kiq_set_resources +ffffffff81ddb830 t gfx10_kiq_map_queues +ffffffff81ddbbc0 t gfx10_kiq_unmap_queues +ffffffff81ddbfc0 t gfx10_kiq_query_status +ffffffff81ddc2c0 t gfx10_kiq_invalidate_tlbs +ffffffff81ddc3e0 t gfx_v10_0_ring_get_rptr_compute +ffffffff81ddc410 t gfx_v10_0_ring_get_wptr_compute +ffffffff81ddc480 t gfx_v10_0_ring_set_wptr_compute +ffffffff81ddc5c0 t gfx_v10_0_ring_emit_ib_compute +ffffffff81ddc910 t gfx_v10_0_ring_emit_fence_kiq +ffffffff81ddcd50 t gfx_v10_0_ring_test_ring +ffffffff81ddcfc0 t gfx_v10_0_ring_test_ib +ffffffff81ddd270 t gfx_v10_0_ring_emit_rreg +ffffffff81ddd510 t gfx_v10_0_ring_emit_wreg +ffffffff81ddd750 t gfx_v10_0_ring_emit_reg_wait +ffffffff81ddd7a0 t gfx_v10_0_ring_emit_reg_write_reg_wait +ffffffff81ddd830 t gfx_v10_0_wait_reg_mem +ffffffff81dddb60 t gfx_v10_0_ring_get_rptr_gfx +ffffffff81dddb90 t gfx_v10_0_ring_get_wptr_gfx +ffffffff81dddca0 t gfx_v10_0_ring_set_wptr_gfx +ffffffff81dddeb0 t gfx_v10_0_ring_emit_ib_gfx +ffffffff81dde560 t gfx_v10_0_ring_emit_fence +ffffffff81dde930 t gfx_v10_0_ring_emit_pipeline_sync +ffffffff81dde990 t gfx_v10_0_ring_emit_vm_flush +ffffffff81ddeb60 t gfx_v10_0_ring_emit_hdp_flush +ffffffff81ddec30 t gfx_v10_0_ring_emit_gds_switch +ffffffff81dded10 t gfx_v10_0_ring_emit_init_cond_exec +ffffffff81ddef40 t gfx_v10_0_ring_emit_patch_cond_exec +ffffffff81ddf000 t gfx_v10_0_ring_emit_sb +ffffffff81ddf0f0 t gfx_v10_0_ring_emit_cntxcntl +ffffffff81ddf5e0 t gfx_v10_0_ring_emit_frame_cntl +ffffffff81ddf6f0 t gfx_v10_0_ring_soft_recovery +ffffffff81ddf760 t gfx_v10_0_ring_preempt_ib +ffffffff81ddf8d0 t gfx_v10_0_emit_mem_sync +ffffffff81ddfc10 t gfx_v10_0_write_data_to_reg +ffffffff81ddfe20 t gfx_v10_0_set_eop_interrupt_state +ffffffff81ddff00 t gfx_v10_0_eop_irq +ffffffff81de00d0 t gfx_v10_0_set_gfx_eop_interrupt_state +ffffffff81de0260 t gfx_v10_0_set_compute_eop_interrupt_state +ffffffff81de0410 t gfx_v10_0_kiq_set_interrupt_state +ffffffff81de06f0 t gfx_v10_0_kiq_irq +ffffffff81de0770 t gfx_v10_0_set_priv_reg_fault_state +ffffffff81de0890 t gfx_v10_0_priv_reg_irq +ffffffff81de08f0 t gfx_v10_0_handle_priv_fault +ffffffff81de0a80 t gfx_v10_0_set_priv_inst_fault_state +ffffffff81de0ba0 t gfx_v10_0_priv_inst_irq +ffffffff81de0c00 t gfx_v10_0_is_rlc_enabled +ffffffff81de0c80 t gfx_v10_0_set_safe_mode +ffffffff81de0f20 t gfx_v10_0_unset_safe_mode +ffffffff81de0fd0 t gfx_v10_0_rlc_init +ffffffff81de1050 t gfx_v10_0_get_csb_size +ffffffff81de10b0 t gfx_v10_0_get_csb_buffer +ffffffff81de1230 t gfx_v10_0_rlc_resume +ffffffff81de1d30 t gfx_v10_0_rlc_stop +ffffffff81de1e10 t gfx_v10_0_rlc_reset +ffffffff81de1fb0 t gfx_v10_0_rlc_start +ffffffff81de2150 t gfx_v10_0_update_spm_vmid +ffffffff81de2280 t gfx_v10_0_wait_for_rlc_autoload_complete +ffffffff81de2e10 t gfx_v10_0_init_csb +ffffffff81de30e0 t gfx_v10_0_is_rlcg_access_range +ffffffff81de3110 t gfx_v10_0_gfx_mqd_init +ffffffff81de34f0 t gfx_v10_0_compute_mqd_init +ffffffff81de3990 t amdgpu_bo_unreserve +ffffffff81de3a70 t gfx_v10_0_get_gpu_clock_counter +ffffffff81de3f70 t gfx_v10_0_select_se_sh +ffffffff81de4010 t gfx_v10_0_read_wave_data +ffffffff81de4270 t gfx_v10_0_read_wave_vgprs +ffffffff81de42a0 t gfx_v10_0_read_wave_sgprs +ffffffff81de4320 t gfx_v10_0_select_me_pipe_q +ffffffff81de4340 t gfx_v10_0_init_spm_golden_registers +ffffffff81de43b0 t gfx_v10_0_update_perfmon_mgcg +ffffffff81de44d0 t wave_read_ind +ffffffff81de45b0 t wave_read_regs +ffffffff81de4710 t gfx_v10_0_cp_resume +ffffffff81de7350 t gfx_v10_3_get_disabled_sa +ffffffff81de7460 t gfx_v10_0_get_rb_active_bitmap +ffffffff81de7580 t gfx_v10_0_get_wgp_active_bitmap_per_sh +ffffffff81de7690 t gfx_v10_0_enable_gui_idle_interrupt +ffffffff81de77a0 t gfx_v10_0_cp_gfx_enable +ffffffff81de79e0 t gfx_v10_0_cp_compute_enable +ffffffff81de7b70 t amdgpu_bo_reserve +ffffffff81de7cf0 t gfx_v10_0_kiq_init_register +ffffffff81de8b60 t gfx_v10_0_cp_gfx_switch_pipe +ffffffff81de8c60 t gfx_v10_0_cp_gfx_set_doorbell +ffffffff81de8f30 t gfx_v10_0_cp_gfx_start +ffffffff81de9910 t gfx_v10_0_update_fine_grain_clock_gating +ffffffff81de9c30 t gfx_v10_0_update_medium_grain_clock_gating +ffffffff81dea350 t gfx_v10_0_update_3d_clock_gating +ffffffff81dea710 t gfx_v10_0_update_coarse_grain_clock_gating +ffffffff81deb000 t gfx_v11_0_early_init +ffffffff81deb3a0 t gfx_v11_0_late_init +ffffffff81deb410 t gfx_v11_0_sw_init +ffffffff81dec360 t gfx_v11_0_sw_fini +ffffffff81dec640 t gfx_v11_0_hw_init +ffffffff81df0ac0 t gfx_v11_0_hw_fini +ffffffff81df0d40 t gfx_v11_0_suspend +ffffffff81df0d80 t gfx_v11_0_resume +ffffffff81df0d90 t gfx_v11_0_is_idle +ffffffff81df0e20 t gfx_v11_0_wait_for_idle +ffffffff81df0f00 t gfx_v11_0_check_soft_reset +ffffffff81df1030 t gfx_v11_0_soft_reset +ffffffff81df1d10 t gfx_v11_0_post_soft_reset +ffffffff81df1d20 t gfx_v11_0_set_clockgating_state +ffffffff81df2900 t gfx_v11_0_set_powergating_state +ffffffff81df2af0 t gfx_v11_0_get_clockgating_state +ffffffff81df2cc0 t gfx11_kiq_set_resources +ffffffff81df2ff0 t gfx11_kiq_map_queues +ffffffff81df3380 t gfx11_kiq_unmap_queues +ffffffff81df3780 t gfx11_kiq_query_status +ffffffff81df3a80 t gfx11_kiq_invalidate_tlbs +ffffffff81df3ba0 t gfx_v11_0_ring_get_rptr_compute +ffffffff81df3bd0 t gfx_v11_0_ring_get_wptr_compute +ffffffff81df3c40 t gfx_v11_0_ring_set_wptr_compute +ffffffff81df3d80 t gfx_v11_0_ring_emit_ib_compute +ffffffff81df40d0 t gfx_v11_0_ring_emit_fence_kiq +ffffffff81df4510 t gfx_v11_0_ring_test_ring +ffffffff81df47a0 t gfx_v11_0_ring_test_ib +ffffffff81df4a60 t gfx_v11_0_ring_emit_rreg +ffffffff81df4d00 t gfx_v11_0_ring_emit_wreg +ffffffff81df4f40 t gfx_v11_0_ring_emit_reg_wait +ffffffff81df4f90 t gfx_v11_0_ring_emit_reg_write_reg_wait +ffffffff81df5000 t gfx_v11_0_wait_reg_mem +ffffffff81df5330 t gfx_v11_0_ring_get_rptr_gfx +ffffffff81df5360 t gfx_v11_0_ring_get_wptr_gfx +ffffffff81df5470 t gfx_v11_0_ring_set_wptr_gfx +ffffffff81df5680 t gfx_v11_0_ring_emit_ib_gfx +ffffffff81df5d20 t gfx_v11_0_ring_emit_fence +ffffffff81df60f0 t gfx_v11_0_ring_emit_pipeline_sync +ffffffff81df6150 t gfx_v11_0_ring_emit_vm_flush +ffffffff81df6320 t gfx_v11_0_ring_emit_hdp_flush +ffffffff81df63f0 t gfx_v11_0_ring_emit_gds_switch +ffffffff81df64d0 t gfx_v11_0_ring_emit_init_cond_exec +ffffffff81df6700 t gfx_v11_0_ring_emit_patch_cond_exec +ffffffff81df67c0 t gfx_v11_0_ring_emit_cntxcntl +ffffffff81df6920 t gfx_v11_0_ring_emit_frame_cntl +ffffffff81df6a30 t gfx_v11_0_ring_soft_recovery +ffffffff81df6aa0 t gfx_v11_0_ring_preempt_ib +ffffffff81df6c10 t gfx_v11_0_emit_mem_sync +ffffffff81df6f50 t gfx_v11_0_write_data_to_reg +ffffffff81df7160 t gfx_v11_0_set_eop_interrupt_state +ffffffff81df71f0 t gfx_v11_0_eop_irq +ffffffff81df73c0 t gfx_v11_0_set_gfx_eop_interrupt_state +ffffffff81df7550 t gfx_v11_0_set_compute_eop_interrupt_state +ffffffff81df76e0 t gfx_v11_0_set_priv_reg_fault_state +ffffffff81df7800 t gfx_v11_0_priv_reg_irq +ffffffff81df7860 t gfx_v11_0_handle_priv_fault +ffffffff81df79f0 t gfx_v11_0_set_priv_inst_fault_state +ffffffff81df7b10 t gfx_v11_0_priv_inst_irq +ffffffff81df7b70 t gfx_v11_0_is_rlc_enabled +ffffffff81df7bf0 t gfx_v11_0_set_safe_mode +ffffffff81df7d40 t gfx_v11_0_unset_safe_mode +ffffffff81df7db0 t gfx_v11_0_rlc_init +ffffffff81df7e30 t gfx_v11_0_get_csb_size +ffffffff81df7e90 t gfx_v11_0_get_csb_buffer +ffffffff81df8010 t gfx_v11_0_rlc_resume +ffffffff81df8d30 t gfx_v11_0_rlc_stop +ffffffff81df8e10 t gfx_v11_0_rlc_reset +ffffffff81df8fb0 t gfx_v11_0_rlc_start +ffffffff81df9150 t gfx_v11_0_update_spm_vmid +ffffffff81df9250 t gfx_v11_0_init_csb +ffffffff81df93d0 t gfx_v11_0_gfx_mqd_init +ffffffff81df97a0 t gfx_v11_0_compute_mqd_init +ffffffff81df9cc0 t amdgpu_bo_unreserve +ffffffff81df9da0 t gfx_v11_0_get_gpu_clock_counter +ffffffff81df9ed0 t gfx_v11_0_select_se_sh +ffffffff81df9f70 t gfx_v11_0_read_wave_data +ffffffff81dfa1b0 t gfx_v11_0_read_wave_vgprs +ffffffff81dfa1e0 t gfx_v11_0_read_wave_sgprs +ffffffff81dfa260 t gfx_v11_0_select_me_pipe_q +ffffffff81dfa280 t gfx_v11_0_update_perf_clk +ffffffff81dfa3b0 t wave_read_ind +ffffffff81dfa490 t wave_read_regs +ffffffff81dfa5f0 t gfx_v11_0_disable_gpa_mode +ffffffff81dfa780 t gfx_v11_0_cp_resume +ffffffff81dfe820 t gfx_v11_0_config_me_cache +ffffffff81dfebc0 t gfx_v11_0_config_pfp_cache +ffffffff81dfef60 t gfx_v11_0_config_mec_cache +ffffffff81dff300 t gfx_v11_0_enable_gui_idle_interrupt +ffffffff81dff410 t gfx_v11_0_cp_compute_enable +ffffffff81dff5e0 t gfx_v11_0_cp_gfx_enable +ffffffff81dff7d0 t amdgpu_bo_reserve +ffffffff81dff950 t gfx_v11_0_kiq_init_register +ffffffff81e007c0 t gfx_v11_0_cp_gfx_switch_pipe +ffffffff81e008a0 t gfx_v11_0_cp_gfx_set_doorbell +ffffffff81e00a80 t gfx_v11_0_cp_gfx_start +ffffffff81e02000 t gfx_v8_0_early_init +ffffffff81e02320 t gfx_v8_0_late_init +ffffffff81e02a20 t gfx_v8_0_sw_init +ffffffff81e040f0 t gfx_v8_0_sw_fini +ffffffff81e043b0 t gfx_v8_0_hw_init +ffffffff81e065e0 t gfx_v8_0_hw_fini +ffffffff81e06ad0 t gfx_v8_0_suspend +ffffffff81e06b10 t gfx_v8_0_resume +ffffffff81e06b20 t gfx_v8_0_is_idle +ffffffff81e06b90 t gfx_v8_0_wait_for_idle +ffffffff81e06c40 t gfx_v8_0_check_soft_reset +ffffffff81e06d20 t gfx_v8_0_pre_soft_reset +ffffffff81e06ea0 t gfx_v8_0_soft_reset +ffffffff81e07060 t gfx_v8_0_post_soft_reset +ffffffff81e07220 t gfx_v8_0_set_clockgating_state +ffffffff81e074e0 t gfx_v8_0_set_powergating_state +ffffffff81e078a0 t gfx_v8_0_get_clockgating_state +ffffffff81e07980 t gfx_v8_0_get_gpu_clock_counter +ffffffff81e07a20 t gfx_v8_0_select_se_sh +ffffffff81e07a80 t gfx_v8_0_read_wave_data +ffffffff81e07f20 t gfx_v8_0_read_wave_sgprs +ffffffff81e07fd0 t gfx_v8_0_select_me_pipe_q +ffffffff81e07ff0 t gfx_v8_0_ring_get_rptr +ffffffff81e08020 t gfx_v8_0_ring_get_wptr_compute +ffffffff81e08050 t gfx_v8_0_ring_set_wptr_compute +ffffffff81e08090 t gfx_v8_0_ring_emit_fence_kiq +ffffffff81e084c0 t gfx_v8_0_ring_test_ring +ffffffff81e086c0 t gfx_v8_0_ring_emit_rreg +ffffffff81e08960 t gfx_v8_0_ring_emit_wreg +ffffffff81e08ba0 t gfx_v8_0_ring_get_wptr_gfx +ffffffff81e08c00 t gfx_v8_0_ring_set_wptr_gfx +ffffffff81e08c70 t gfx_v8_0_ring_emit_ib_gfx +ffffffff81e091d0 t gfx_v8_0_ring_emit_fence_gfx +ffffffff81e096d0 t gfx_v8_0_ring_emit_pipeline_sync +ffffffff81e099c0 t gfx_v8_0_ring_emit_vm_flush +ffffffff81e09d70 t gfx_v8_0_ring_emit_hdp_flush +ffffffff81e0a090 t gfx_v8_0_ring_emit_gds_switch +ffffffff81e0a860 t gfx_v8_0_ring_test_ib +ffffffff81e0aa10 t gfx_v8_0_ring_emit_init_cond_exec +ffffffff81e0ac40 t gfx_v8_0_ring_emit_patch_cond_exec +ffffffff81e0acf0 t gfx_v8_ring_emit_sb +ffffffff81e0ade0 t gfx_v8_ring_emit_cntxcntl +ffffffff81e0b380 t gfx_v8_0_ring_soft_recovery +ffffffff81e0b3b0 t gfx_v8_0_emit_mem_sync +ffffffff81e0b5c0 t gfx_v8_0_ring_emit_ib_compute +ffffffff81e0b8d0 t gfx_v8_0_ring_emit_fence_compute +ffffffff81e0bbd0 t gfx_v8_0_emit_mem_sync_compute +ffffffff81e0be90 t gfx_v8_0_emit_wave_limit +ffffffff81e0c040 t gfx_v8_0_set_eop_interrupt_state +ffffffff81e0c250 t gfx_v8_0_eop_irq +ffffffff81e0c380 t gfx_v8_0_set_priv_reg_fault_state +ffffffff81e0c400 t gfx_v8_0_priv_reg_irq +ffffffff81e0c520 t gfx_v8_0_set_priv_inst_fault_state +ffffffff81e0c5a0 t gfx_v8_0_priv_inst_irq +ffffffff81e0c6c0 t gfx_v8_0_set_cp_ecc_int_state +ffffffff81e0c930 t gfx_v8_0_cp_ecc_error_irq +ffffffff81e0c980 t gfx_v8_0_set_sq_int_state +ffffffff81e0ca10 t gfx_v8_0_sq_irq +ffffffff81e0cab0 t gfx_v8_0_parse_sq_irq +ffffffff81e0cd00 t gfx_v8_0_is_rlc_enabled +ffffffff81e0cd40 t gfx_v8_0_set_safe_mode +ffffffff81e0ce40 t gfx_v8_0_unset_safe_mode +ffffffff81e0cee0 t gfx_v8_0_rlc_init +ffffffff81e0cf90 t gfx_v8_0_get_csb_size +ffffffff81e0cff0 t gfx_v8_0_get_csb_buffer +ffffffff81e0d170 t gfx_v8_0_cp_jump_table_num +ffffffff81e0d1b0 t gfx_v8_0_rlc_resume +ffffffff81e0d540 t gfx_v8_0_rlc_stop +ffffffff81e0d5b0 t gfx_v8_0_rlc_reset +ffffffff81e0d630 t gfx_v8_0_rlc_start +ffffffff81e0d6b0 t gfx_v8_0_update_spm_vmid +ffffffff81e0d720 t gfx_v8_0_init_save_restore_list +ffffffff81e0db40 t gfx_v8_0_wait_for_rlc_serdes +ffffffff81e0dd60 t gfx_v8_0_sq_irq_work_func +ffffffff81e0dd80 t amdgpu_bo_unreserve +ffffffff81e0de60 t gfx_v8_0_kiq_resume +ffffffff81e0e0c0 t gfx_v8_0_cp_gfx_resume +ffffffff81e0ebe0 t gfx_v8_0_kcq_resume +ffffffff81e0f610 t amdgpu_bo_reserve +ffffffff81e0f790 t gfx_v8_0_mqd_commit +ffffffff81e0f970 t gfx_v8_0_mqd_init +ffffffff81e0fd90 t gfx_v8_0_deactivate_hqd +ffffffff81e0fe50 t gfx_v8_0_update_medium_grain_clock_gating +ffffffff81e10180 t gfx_v8_0_update_coarse_grain_clock_gating +ffffffff81e11000 t gfx_v9_0_ras_error_inject +ffffffff81e111a0 t gfx_v9_0_query_ras_error_count +ffffffff81e11d40 t gfx_v9_0_reset_ras_error_count +ffffffff81e12780 T gfx_v9_0_select_se_sh +ffffffff81e12820 t gfx_v9_0_early_init +ffffffff81e12c80 t gfx_v9_0_late_init +ffffffff81e13990 t gfx_v9_0_sw_init +ffffffff81e15000 t gfx_v9_0_sw_fini +ffffffff81e152b0 t gfx_v9_0_hw_init +ffffffff81e18360 t gfx_v9_0_hw_fini +ffffffff81e18ac0 t gfx_v9_0_suspend +ffffffff81e18b00 t gfx_v9_0_resume +ffffffff81e18b10 t gfx_v9_0_is_idle +ffffffff81e18b90 t gfx_v9_0_wait_for_idle +ffffffff81e18c70 t gfx_v9_0_soft_reset +ffffffff81e19000 t gfx_v9_0_set_clockgating_state +ffffffff81e190d0 t gfx_v9_0_set_powergating_state +ffffffff81e194d0 t gfx_v9_0_get_clockgating_state +ffffffff81e195e0 t gfx_v9_0_kiq_set_resources +ffffffff81e19910 t gfx_v9_0_kiq_map_queues +ffffffff81e19c50 t gfx_v9_0_kiq_unmap_queues +ffffffff81e19fd0 t gfx_v9_0_kiq_query_status +ffffffff81e1a2d0 t gfx_v9_0_kiq_invalidate_tlbs +ffffffff81e1a3f0 t gfx_v9_0_ring_get_rptr_compute +ffffffff81e1a420 t gfx_v9_0_ring_get_wptr_compute +ffffffff81e1a490 t gfx_v9_0_ring_set_wptr_compute +ffffffff81e1a4f0 t gfx_v9_0_ring_emit_fence_kiq +ffffffff81e1a930 t gfx_v9_0_ring_test_ring +ffffffff81e1ab60 t gfx_v9_0_ring_emit_rreg +ffffffff81e1ae00 t gfx_v9_0_ring_emit_wreg +ffffffff81e1b040 t gfx_v9_0_ring_emit_reg_wait +ffffffff81e1b090 t gfx_v9_0_ring_emit_reg_write_reg_wait +ffffffff81e1b130 t gfx_v9_0_wait_reg_mem +ffffffff81e1b460 t gfx_v9_0_ring_get_rptr_gfx +ffffffff81e1b490 t gfx_v9_0_ring_get_wptr_gfx +ffffffff81e1b5a0 t gfx_v9_0_ring_set_wptr_gfx +ffffffff81e1b6d0 t gfx_v9_0_ring_emit_ib_gfx +ffffffff81e1bbf0 t gfx_v9_0_ring_emit_fence +ffffffff81e1bfb0 t gfx_v9_0_ring_emit_pipeline_sync +ffffffff81e1c010 t gfx_v9_0_ring_emit_vm_flush +ffffffff81e1c120 t gfx_v9_0_ring_emit_hdp_flush +ffffffff81e1c1f0 t gfx_v9_0_ring_emit_gds_switch +ffffffff81e1c2d0 t gfx_v9_0_ring_test_ib +ffffffff81e1c480 t gfx_v9_0_ring_emit_init_cond_exec +ffffffff81e1c6b0 t gfx_v9_0_ring_emit_patch_cond_exec +ffffffff81e1c780 t gfx_v9_ring_emit_sb +ffffffff81e1c870 t gfx_v9_ring_emit_cntxcntl +ffffffff81e1cc70 t gfx_v9_0_ring_emit_frame_cntl +ffffffff81e1cd80 t gfx_v9_0_ring_soft_recovery +ffffffff81e1cdf0 t gfx_v9_0_emit_mem_sync +ffffffff81e1d0b0 t gfx_v9_0_write_data_to_reg +ffffffff81e1d2c0 t gfx_v9_0_ring_emit_ib_compute +ffffffff81e1d5f0 t gfx_v9_0_emit_wave_limit +ffffffff81e1d7c0 t gfx_v9_0_set_eop_interrupt_state +ffffffff81e1d990 t gfx_v9_0_eop_irq +ffffffff81e1dac0 t gfx_v9_0_set_compute_eop_interrupt_state +ffffffff81e1dc70 t gfx_v9_0_set_priv_reg_fault_state +ffffffff81e1dd90 t gfx_v9_0_priv_reg_irq +ffffffff81e1deb0 t gfx_v9_0_set_priv_inst_fault_state +ffffffff81e1dfd0 t gfx_v9_0_priv_inst_irq +ffffffff81e1e0f0 t gfx_v9_0_set_cp_ecc_error_state +ffffffff81e1e920 t gfx_v9_0_is_rlc_enabled +ffffffff81e1e9a0 t gfx_v9_0_set_safe_mode +ffffffff81e1eaf0 t gfx_v9_0_unset_safe_mode +ffffffff81e1eb60 t gfx_v9_0_rlc_init +ffffffff81e1f370 t gfx_v9_0_get_csb_size +ffffffff81e1f3d0 t gfx_v9_0_get_csb_buffer +ffffffff81e1f520 t gfx_v9_0_cp_jump_table_num +ffffffff81e1f570 t gfx_v9_0_rlc_resume +ffffffff81e20310 t gfx_v9_0_rlc_stop +ffffffff81e207b0 t gfx_v9_0_rlc_reset +ffffffff81e20940 t gfx_v9_0_rlc_start +ffffffff81e20a80 t gfx_v9_0_update_spm_vmid +ffffffff81e20bb0 t gfx_v9_0_is_rlcg_access_range +ffffffff81e20c00 t gfx_v9_0_init_always_on_cu_mask +ffffffff81e20f60 t gfx_v9_0_init_csb +ffffffff81e210f0 t gfx_v9_0_enable_lbpw +ffffffff81e211e0 t gfx_v9_0_enable_gui_idle_interrupt +ffffffff81e212e0 t amdgpu_bo_unreserve +ffffffff81e213c0 t gfx_v9_0_get_gpu_clock_counter +ffffffff81e21b40 t gfx_v9_0_read_wave_data +ffffffff81e21d80 t gfx_v9_0_read_wave_vgprs +ffffffff81e21da0 t gfx_v9_0_read_wave_sgprs +ffffffff81e21df0 t gfx_v9_0_select_me_pipe_q +ffffffff81e21e10 t wave_read_ind +ffffffff81e21f20 t wave_read_regs +ffffffff81e22090 t gfx_v9_0_cp_gfx_enable +ffffffff81e22170 t amdgpu_bo_reserve +ffffffff81e222f0 t gfx_v9_0_kiq_init_register +ffffffff81e22f70 t gfx_v9_0_mqd_init +ffffffff81e234b0 t gfx_v9_0_update_medium_grain_clock_gating +ffffffff81e239c0 t gfx_v9_0_update_3d_clock_gating +ffffffff81e23da0 t gfx_v9_0_update_coarse_grain_clock_gating +ffffffff81e25000 t gfx_v9_4_ras_error_inject +ffffffff81e25130 t gfx_v9_4_query_ras_error_count +ffffffff81e25ef0 t gfx_v9_4_query_ras_error_status +ffffffff81e260c0 t gfx_v9_4_reset_ras_error_count +ffffffff81e27000 T gfx_v9_4_2_do_edc_gpr_workarounds +ffffffff81e27790 T gfx_v9_4_2_init_golden_registers +ffffffff81e27830 T gfx_v9_4_2_debug_trap_config_init +ffffffff81e278d0 T gfx_v9_4_2_set_power_brake_sequence +ffffffff81e27aa0 t gfx_v9_4_2_ras_error_inject +ffffffff81e27bd0 t gfx_v9_4_2_query_ras_error_count +ffffffff81e27c80 t gfx_v9_4_2_query_ras_error_status +ffffffff81e284d0 t gfx_v9_4_2_reset_ras_error_count +ffffffff81e28530 t gfx_v9_4_2_reset_ras_error_status +ffffffff81e289f0 t gfx_v9_4_2_enable_watchdog_timer +ffffffff81e28c10 t gfx_v9_4_2_query_uctl2_poison_status +ffffffff81e28c90 t gfx_v9_4_2_run_shader +ffffffff81e29010 t gfx_v9_4_2_wait_for_waves_assigned +ffffffff81e29650 t gfx_v9_4_2_query_sram_edc_count +ffffffff81e299a0 t gfx_v9_4_2_query_utc_edc_count +ffffffff81e29b80 t wave_read_ind +ffffffff81e2a000 t gfxhub_v1_0_get_mc_fb_offset +ffffffff81e2a090 t gfxhub_v1_0_setup_vm_pt_regs +ffffffff81e2a1d0 t gfxhub_v1_0_gart_enable +ffffffff81e2b6c0 t gfxhub_v1_0_gart_disable +ffffffff81e2b950 t gfxhub_v1_0_set_fault_enable_default +ffffffff81e2ba40 t gfxhub_v1_0_init +ffffffff81e2c000 T gfxhub_v1_1_get_xgmi_info +ffffffff81e2d000 t gfxhub_v2_0_get_fb_location +ffffffff81e2d090 t gfxhub_v2_0_get_mc_fb_offset +ffffffff81e2d120 t gfxhub_v2_0_setup_vm_pt_regs +ffffffff81e2d260 t gfxhub_v2_0_gart_enable +ffffffff81e2e460 t gfxhub_v2_0_gart_disable +ffffffff81e2e6a0 t gfxhub_v2_0_set_fault_enable_default +ffffffff81e2e790 t gfxhub_v2_0_init +ffffffff81e2e860 t gfxhub_v2_0_print_l2_protection_fault_status +ffffffff81e2ea40 t gfxhub_v2_0_get_invalidate_req +ffffffff81e2f000 t gfxhub_v2_1_get_fb_location +ffffffff81e2f090 t gfxhub_v2_1_get_mc_fb_offset +ffffffff81e2f120 t gfxhub_v2_1_setup_vm_pt_regs +ffffffff81e2f260 t gfxhub_v2_1_gart_enable +ffffffff81e30540 t gfxhub_v2_1_gart_disable +ffffffff81e307c0 t gfxhub_v2_1_set_fault_enable_default +ffffffff81e308d0 t gfxhub_v2_1_init +ffffffff81e309a0 t gfxhub_v2_1_get_xgmi_info +ffffffff81e30ad0 t gfxhub_v2_1_utcl2_harvest +ffffffff81e30cb0 t gfxhub_v2_1_save_regs +ffffffff81e316e0 t gfxhub_v2_1_restore_regs +ffffffff81e322c0 t gfxhub_v2_1_halt +ffffffff81e32680 t gfxhub_v2_1_print_l2_protection_fault_status +ffffffff81e32860 t gfxhub_v2_1_get_invalidate_req +ffffffff81e33000 t gfxhub_v3_0_get_fb_location +ffffffff81e33090 t gfxhub_v3_0_get_mc_fb_offset +ffffffff81e33120 t gfxhub_v3_0_setup_vm_pt_regs +ffffffff81e33260 t gfxhub_v3_0_gart_enable +ffffffff81e344e0 t gfxhub_v3_0_gart_disable +ffffffff81e34760 t gfxhub_v3_0_set_fault_enable_default +ffffffff81e34b00 t gfxhub_v3_0_init +ffffffff81e34bd0 t gfxhub_v3_0_print_l2_protection_fault_status +ffffffff81e34db0 t gfxhub_v3_0_get_invalidate_req +ffffffff81e35000 t gfxhub_v3_0_3_get_fb_location +ffffffff81e35090 t gfxhub_v3_0_3_get_mc_fb_offset +ffffffff81e35120 t gfxhub_v3_0_3_setup_vm_pt_regs +ffffffff81e35260 t gfxhub_v3_0_3_gart_enable +ffffffff81e364f0 t gfxhub_v3_0_3_gart_disable +ffffffff81e36790 t gfxhub_v3_0_3_set_fault_enable_default +ffffffff81e368a0 t gfxhub_v3_0_3_init +ffffffff81e36970 t gfxhub_v3_0_3_print_l2_protection_fault_status +ffffffff81e36b50 t gfxhub_v3_0_3_get_invalidate_req +ffffffff81e37000 t gmc_v10_0_early_init +ffffffff81e371f0 t gmc_v10_0_late_init +ffffffff81e37260 t gmc_v10_0_sw_init +ffffffff81e37680 t gmc_v10_0_sw_fini +ffffffff81e376d0 t gmc_v10_0_hw_init +ffffffff81e378a0 t gmc_v10_0_hw_fini +ffffffff81e37940 t gmc_v10_0_suspend +ffffffff81e379e0 t gmc_v10_0_resume +ffffffff81e37a40 t gmc_v10_0_is_idle +ffffffff81e37a70 t gmc_v10_0_wait_for_idle +ffffffff81e37aa0 t gmc_v10_0_soft_reset +ffffffff81e37ad0 t gmc_v10_0_set_clockgating_state +ffffffff81e37b80 t gmc_v10_0_set_powergating_state +ffffffff81e37bb0 t gmc_v10_0_get_clockgating_state +ffffffff81e37c50 t gmc_v10_0_flush_gpu_tlb +ffffffff81e37f00 t gmc_v10_0_flush_gpu_tlb_pasid +ffffffff81e38120 t gmc_v10_0_emit_flush_gpu_tlb +ffffffff81e382d0 t gmc_v10_0_emit_pasid_mapping +ffffffff81e38340 t gmc_v10_0_map_mtype +ffffffff81e38390 t gmc_v10_0_get_vm_pde +ffffffff81e38480 t gmc_v10_0_get_vm_pte +ffffffff81e38530 t gmc_v10_0_get_vbios_fb_size +ffffffff81e386a0 t gmc_v10_0_flush_vm_hub +ffffffff81e38b00 t gmc_v10_0_vm_fault_interrupt_state +ffffffff81e38b70 t gmc_v10_0_process_interrupt +ffffffff81e38e30 t gmc_v10_0_ecc_interrupt_state +ffffffff81e39000 t gmc_v11_0_early_init +ffffffff81e39230 t gmc_v11_0_late_init +ffffffff81e392a0 t gmc_v11_0_sw_init +ffffffff81e395c0 t gmc_v11_0_sw_fini +ffffffff81e39610 t gmc_v11_0_hw_init +ffffffff81e39750 t gmc_v11_0_hw_fini +ffffffff81e397e0 t gmc_v11_0_suspend +ffffffff81e39870 t gmc_v11_0_resume +ffffffff81e398d0 t gmc_v11_0_is_idle +ffffffff81e39900 t gmc_v11_0_wait_for_idle +ffffffff81e39930 t gmc_v11_0_soft_reset +ffffffff81e39960 t gmc_v11_0_set_clockgating_state +ffffffff81e399e0 t gmc_v11_0_set_powergating_state +ffffffff81e39a10 t gmc_v11_0_get_clockgating_state +ffffffff81e39a50 t gmc_v11_0_flush_gpu_tlb +ffffffff81e39f20 t gmc_v11_0_flush_gpu_tlb_pasid +ffffffff81e3a110 t gmc_v11_0_emit_flush_gpu_tlb +ffffffff81e3a2c0 t gmc_v11_0_emit_pasid_mapping +ffffffff81e3a330 t gmc_v11_0_map_mtype +ffffffff81e3a380 t gmc_v11_0_get_vm_pde +ffffffff81e3a480 t gmc_v11_0_get_vm_pte +ffffffff81e3a530 t gmc_v11_0_get_vbios_fb_size +ffffffff81e3a560 t gmc_v11_0_vm_fault_interrupt_state +ffffffff81e3a5d0 t gmc_v11_0_process_interrupt +ffffffff81e3a7f0 t gmc_v11_0_ecc_interrupt_state +ffffffff81e3b000 t gmc_v7_0_early_init +ffffffff81e3b090 t gmc_v7_0_late_init +ffffffff81e3b0e0 t gmc_v7_0_sw_init +ffffffff81e3b5e0 t gmc_v7_0_sw_fini +ffffffff81e3b690 t gmc_v7_0_hw_init +ffffffff81e3c040 t gmc_v7_0_hw_fini +ffffffff81e3c100 t gmc_v7_0_suspend +ffffffff81e3c140 t gmc_v7_0_resume +ffffffff81e3c1a0 t gmc_v7_0_is_idle +ffffffff81e3c1f0 t gmc_v7_0_wait_for_idle +ffffffff81e3c290 t gmc_v7_0_soft_reset +ffffffff81e3c4f0 t gmc_v7_0_set_clockgating_state +ffffffff81e3c750 t gmc_v7_0_set_powergating_state +ffffffff81e3c780 t gmc_v7_0_flush_gpu_tlb +ffffffff81e3c7b0 t gmc_v7_0_flush_gpu_tlb_pasid +ffffffff81e3c870 t gmc_v7_0_emit_flush_gpu_tlb +ffffffff81e3c900 t gmc_v7_0_emit_pasid_mapping +ffffffff81e3c930 t gmc_v7_0_set_prt +ffffffff81e3caf0 t gmc_v7_0_get_vm_pde +ffffffff81e3cb50 t gmc_v7_0_get_vm_pte +ffffffff81e3cb90 t gmc_v7_0_get_vbios_fb_size +ffffffff81e3cc00 t gmc_v7_0_vm_fault_interrupt_state +ffffffff81e3ccd0 t gmc_v7_0_process_interrupt +ffffffff81e3d000 t gmc_v8_0_early_init +ffffffff81e3d090 t gmc_v8_0_late_init +ffffffff81e3d0e0 t gmc_v8_0_sw_init +ffffffff81e3d760 t gmc_v8_0_sw_fini +ffffffff81e3d810 t gmc_v8_0_hw_init +ffffffff81e3e4c0 t gmc_v8_0_hw_fini +ffffffff81e3e580 t gmc_v8_0_suspend +ffffffff81e3e5c0 t gmc_v8_0_resume +ffffffff81e3e620 t gmc_v8_0_is_idle +ffffffff81e3e670 t gmc_v8_0_wait_for_idle +ffffffff81e3e710 t gmc_v8_0_check_soft_reset +ffffffff81e3e780 t gmc_v8_0_pre_soft_reset +ffffffff81e3e8f0 t gmc_v8_0_soft_reset +ffffffff81e3e9c0 t gmc_v8_0_post_soft_reset +ffffffff81e3ea30 t gmc_v8_0_set_clockgating_state +ffffffff81e3eff0 t gmc_v8_0_set_powergating_state +ffffffff81e3f020 t gmc_v8_0_get_clockgating_state +ffffffff81e3f090 t gmc_v8_0_flush_gpu_tlb +ffffffff81e3f0c0 t gmc_v8_0_flush_gpu_tlb_pasid +ffffffff81e3f180 t gmc_v8_0_emit_flush_gpu_tlb +ffffffff81e3f210 t gmc_v8_0_emit_pasid_mapping +ffffffff81e3f240 t gmc_v8_0_set_prt +ffffffff81e3f400 t gmc_v8_0_get_vm_pde +ffffffff81e3f460 t gmc_v8_0_get_vm_pte +ffffffff81e3f4b0 t gmc_v8_0_get_vbios_fb_size +ffffffff81e3f520 t gmc_v8_0_vm_fault_interrupt_state +ffffffff81e3f5f0 t gmc_v8_0_process_interrupt +ffffffff81e40000 T gmc_v9_0_restore_registers +ffffffff81e40150 t gmc_v9_0_early_init +ffffffff81e40500 t gmc_v9_0_late_init +ffffffff81e40610 t gmc_v9_0_sw_init +ffffffff81e40cc0 t gmc_v9_0_sw_fini +ffffffff81e40d30 t gmc_v9_0_hw_init +ffffffff81e41130 t gmc_v9_0_hw_fini +ffffffff81e411f0 t gmc_v9_0_suspend +ffffffff81e412b0 t gmc_v9_0_resume +ffffffff81e41310 t gmc_v9_0_is_idle +ffffffff81e41340 t gmc_v9_0_wait_for_idle +ffffffff81e41370 t gmc_v9_0_soft_reset +ffffffff81e413a0 t gmc_v9_0_set_clockgating_state +ffffffff81e41400 t gmc_v9_0_set_powergating_state +ffffffff81e41430 t gmc_v9_0_get_clockgating_state +ffffffff81e41470 t gmc_v9_0_flush_gpu_tlb +ffffffff81e41ab0 t gmc_v9_0_flush_gpu_tlb_pasid +ffffffff81e41d80 t gmc_v9_0_emit_flush_gpu_tlb +ffffffff81e41f50 t gmc_v9_0_emit_pasid_mapping +ffffffff81e41fc0 t gmc_v9_0_map_mtype +ffffffff81e42000 t gmc_v9_0_get_vm_pde +ffffffff81e42100 t gmc_v9_0_get_vm_pte +ffffffff81e421d0 t gmc_v9_0_get_vbios_fb_size +ffffffff81e42360 t gmc_v9_0_vm_fault_interrupt_state +ffffffff81e426e0 t gmc_v9_0_process_interrupt +ffffffff81e42d20 t gmc_v9_0_ecc_interrupt_state +ffffffff81e43000 t hdp_v4_0_query_ras_error_count +ffffffff81e430c0 t hdp_v4_0_reset_ras_error_count +ffffffff81e431e0 t hdp_v4_0_flush_hdp +ffffffff81e43230 t hdp_v4_0_invalidate_hdp +ffffffff81e43300 t hdp_v4_0_update_clock_gating +ffffffff81e43400 t hdp_v4_0_get_clockgating_state +ffffffff81e43450 t hdp_v4_0_init_registers +ffffffff81e44000 t hdp_v5_0_flush_hdp +ffffffff81e44050 t hdp_v5_0_invalidate_hdp +ffffffff81e440f0 t hdp_v5_0_update_clock_gating +ffffffff81e444e0 t hdp_v5_0_get_clockgating_state +ffffffff81e44600 t hdp_v5_0_init_registers +ffffffff81e45000 t hdp_v5_2_flush_hdp +ffffffff81e45050 t hdp_v5_2_update_clock_gating +ffffffff81e45440 t hdp_v5_2_get_clockgating_state +ffffffff81e46000 t hdp_v6_0_flush_hdp +ffffffff81e46050 t hdp_v6_0_update_clock_gating +ffffffff81e46360 t hdp_v6_0_get_clockgating_state +ffffffff81e47000 t iceland_ih_early_init +ffffffff81e47050 t iceland_ih_sw_init +ffffffff81e470b0 t iceland_ih_sw_fini +ffffffff81e470f0 t iceland_ih_hw_init +ffffffff81e47320 t iceland_ih_hw_fini +ffffffff81e473f0 t iceland_ih_suspend +ffffffff81e474c0 t iceland_ih_resume +ffffffff81e47500 t iceland_ih_is_idle +ffffffff81e47550 t iceland_ih_wait_for_idle +ffffffff81e475f0 t iceland_ih_soft_reset +ffffffff81e476d0 t iceland_ih_set_clockgating_state +ffffffff81e47700 t iceland_ih_set_powergating_state +ffffffff81e47730 t iceland_ih_get_wptr +ffffffff81e47820 t iceland_ih_decode_iv +ffffffff81e478a0 t iceland_ih_set_rptr +ffffffff81e48000 t ih_v6_0_early_init +ffffffff81e48050 t ih_v6_0_sw_init +ffffffff81e481b0 t ih_v6_0_sw_fini +ffffffff81e481f0 t ih_v6_0_hw_init +ffffffff81e487a0 t ih_v6_0_hw_fini +ffffffff81e48800 t ih_v6_0_suspend +ffffffff81e48860 t ih_v6_0_resume +ffffffff81e48870 t ih_v6_0_is_idle +ffffffff81e488a0 t ih_v6_0_wait_for_idle +ffffffff81e488d0 t ih_v6_0_soft_reset +ffffffff81e48900 t ih_v6_0_set_clockgating_state +ffffffff81e48a20 t ih_v6_0_set_powergating_state +ffffffff81e48b90 t ih_v6_0_get_clockgating_state +ffffffff81e48c20 t ih_v6_0_get_wptr +ffffffff81e48d10 t ih_v6_0_set_rptr +ffffffff81e48de0 t ih_v6_0_self_irq +ffffffff81e48e50 t ih_v6_0_toggle_interrupts +ffffffff81e49030 t force_update_wptr_for_self_int +ffffffff81e4a000 t imu_v11_0_init_microcode +ffffffff81e4a1f0 t imu_v11_0_load_microcode +ffffffff81e4a550 t imu_v11_0_setup +ffffffff81e4a7d0 t imu_v11_0_start +ffffffff81e4a8c0 t imu_v11_0_program_rlc_ram +ffffffff81e4aa70 t imu_v11_0_wait_for_reset_status +ffffffff81e4abc0 t program_imu_rlc_ram +ffffffff81e4b000 T imu_v11_0_3_program_rlc_ram +ffffffff81e4c000 T jpeg_v1_0_early_init +ffffffff81e4c060 T jpeg_v1_0_sw_init +ffffffff81e4c130 T jpeg_v1_0_sw_fini +ffffffff81e4c150 T jpeg_v1_0_start +ffffffff81e4cbc0 t jpeg_v1_0_decode_ring_get_rptr +ffffffff81e4cc50 t jpeg_v1_0_decode_ring_get_wptr +ffffffff81e4cce0 t jpeg_v1_0_decode_ring_set_wptr +ffffffff81e4cd50 t jpeg_v1_0_decode_ring_emit_ib +ffffffff81e4d660 t jpeg_v1_0_decode_ring_emit_fence +ffffffff81e4dfc0 t jpeg_v1_0_decode_ring_emit_vm_flush +ffffffff81e4e030 t jpeg_v1_0_decode_ring_nop +ffffffff81e4e190 t jpeg_v1_0_decode_ring_insert_start +ffffffff81e4e360 t jpeg_v1_0_decode_ring_insert_end +ffffffff81e4e530 t jpeg_v1_0_ring_begin_use +ffffffff81e4e630 t jpeg_v1_0_decode_ring_emit_wreg +ffffffff81e4e890 t jpeg_v1_0_decode_ring_emit_reg_wait +ffffffff81e4ecb0 t jpeg_v1_0_set_interrupt_state +ffffffff81e4ece0 t jpeg_v1_0_process_interrupt +ffffffff81e4f000 T jpeg_v2_0_dec_ring_insert_start +ffffffff81e4f1b0 T jpeg_v2_0_dec_ring_insert_end +ffffffff81e4f360 T jpeg_v2_0_dec_ring_emit_fence +ffffffff81e4fa50 T jpeg_v2_0_dec_ring_emit_ib +ffffffff81e50240 T jpeg_v2_0_dec_ring_emit_reg_wait +ffffffff81e50600 T jpeg_v2_0_dec_ring_emit_vm_flush +ffffffff81e50670 T jpeg_v2_0_dec_ring_emit_wreg +ffffffff81e508b0 T jpeg_v2_0_dec_ring_nop +ffffffff81e50a10 t jpeg_v2_0_early_init +ffffffff81e50a80 t jpeg_v2_0_sw_init +ffffffff81e50b90 t jpeg_v2_0_sw_fini +ffffffff81e50be0 t jpeg_v2_0_hw_init +ffffffff81e50c60 t jpeg_v2_0_hw_fini +ffffffff81e50d40 t jpeg_v2_0_suspend +ffffffff81e50d70 t jpeg_v2_0_resume +ffffffff81e50e00 t jpeg_v2_0_is_idle +ffffffff81e50e80 t jpeg_v2_0_wait_for_idle +ffffffff81e50f70 t jpeg_v2_0_set_clockgating_state +ffffffff81e51020 t jpeg_v2_0_set_powergating_state +ffffffff81e51820 t jpeg_v2_0_dec_ring_get_rptr +ffffffff81e518b0 t jpeg_v2_0_dec_ring_get_wptr +ffffffff81e51950 t jpeg_v2_0_dec_ring_set_wptr +ffffffff81e519f0 t jpeg_v2_0_set_interrupt_state +ffffffff81e51a20 t jpeg_v2_0_process_interrupt +ffffffff81e51ab0 t jpeg_v2_0_enable_clock_gating +ffffffff81e51c50 t jpeg_v2_0_disable_clock_gating +ffffffff81e52000 t jpeg_v2_6_query_ras_poison_status +ffffffff81e52140 t jpeg_v2_5_early_init +ffffffff81e52410 t jpeg_v2_5_sw_init +ffffffff81e52630 t jpeg_v2_5_sw_fini +ffffffff81e52680 t jpeg_v2_5_hw_init +ffffffff81e52770 t jpeg_v2_5_hw_fini +ffffffff81e528b0 t jpeg_v2_5_suspend +ffffffff81e528e0 t jpeg_v2_5_resume +ffffffff81e529e0 t jpeg_v2_5_is_idle +ffffffff81e52ae0 t jpeg_v2_5_wait_for_idle +ffffffff81e52c10 t jpeg_v2_5_set_clockgating_state +ffffffff81e52d80 t jpeg_v2_5_set_powergating_state +ffffffff81e53470 t jpeg_v2_5_dec_ring_get_rptr +ffffffff81e53510 t jpeg_v2_5_dec_ring_get_wptr +ffffffff81e535c0 t jpeg_v2_5_dec_ring_set_wptr +ffffffff81e53670 t jpeg_v2_6_dec_ring_insert_start +ffffffff81e53830 t jpeg_v2_6_dec_ring_insert_end +ffffffff81e539f0 t jpeg_v2_5_set_interrupt_state +ffffffff81e53a20 t jpeg_v2_5_process_interrupt +ffffffff81e53b00 t jpeg_v2_5_enable_clock_gating +ffffffff81e53bd0 t jpeg_v2_5_disable_clock_gating +ffffffff81e54000 t jpeg_v3_0_early_init +ffffffff81e540e0 t jpeg_v3_0_sw_init +ffffffff81e541f0 t jpeg_v3_0_sw_fini +ffffffff81e54240 t jpeg_v3_0_hw_init +ffffffff81e542c0 t jpeg_v3_0_hw_fini +ffffffff81e543a0 t jpeg_v3_0_suspend +ffffffff81e543d0 t jpeg_v3_0_resume +ffffffff81e54460 t jpeg_v3_0_is_idle +ffffffff81e544e0 t jpeg_v3_0_wait_for_idle +ffffffff81e545d0 t jpeg_v3_0_set_clockgating_state +ffffffff81e54680 t jpeg_v3_0_set_powergating_state +ffffffff81e54f30 t jpeg_v3_0_dec_ring_get_rptr +ffffffff81e54fc0 t jpeg_v3_0_dec_ring_get_wptr +ffffffff81e55060 t jpeg_v3_0_dec_ring_set_wptr +ffffffff81e55100 t jpeg_v3_0_set_interrupt_state +ffffffff81e55130 t jpeg_v3_0_process_interrupt +ffffffff81e551c0 t jpeg_v3_0_enable_clock_gating +ffffffff81e55290 t jpeg_v3_0_disable_clock_gating +ffffffff81e56000 t jpeg_v4_0_early_init +ffffffff81e56080 t jpeg_v4_0_sw_init +ffffffff81e56190 t jpeg_v4_0_sw_fini +ffffffff81e561e0 t jpeg_v4_0_hw_init +ffffffff81e56300 t jpeg_v4_0_hw_fini +ffffffff81e563e0 t jpeg_v4_0_suspend +ffffffff81e56410 t jpeg_v4_0_resume +ffffffff81e56460 t jpeg_v4_0_is_idle +ffffffff81e564e0 t jpeg_v4_0_wait_for_idle +ffffffff81e565d0 t jpeg_v4_0_set_clockgating_state +ffffffff81e56680 t jpeg_v4_0_set_powergating_state +ffffffff81e56e90 t jpeg_v4_0_dec_ring_get_rptr +ffffffff81e56f20 t jpeg_v4_0_dec_ring_get_wptr +ffffffff81e56fc0 t jpeg_v4_0_dec_ring_set_wptr +ffffffff81e57060 t jpeg_v4_0_set_interrupt_state +ffffffff81e57090 t jpeg_v4_0_process_interrupt +ffffffff81e57130 t jpeg_v4_0_enable_clock_gating +ffffffff81e572e0 t jpeg_v4_0_disable_clock_gating +ffffffff81e58000 t lsdma_v6_0_copy_mem +ffffffff81e58360 t lsdma_v6_0_fill_mem +ffffffff81e58640 t lsdma_v6_0_update_memory_power_gating +ffffffff81e59000 t mca_v3_0_mp0_query_ras_error_count +ffffffff81e59020 t mca_v3_0_ras_block_match +ffffffff81e59070 t mca_v3_0_mp1_query_ras_error_count +ffffffff81e59090 t mca_v3_0_mpio_query_ras_error_count +ffffffff81e590b0 t mca_v3_0_init +ffffffff81e5a000 t mes_v10_0_late_init +ffffffff81e5a050 t mes_v10_1_sw_init +ffffffff81e5a660 t mes_v10_1_sw_fini +ffffffff81e5a7e0 t mes_v10_1_hw_init +ffffffff81e5b080 t mes_v10_1_hw_fini +ffffffff81e5b140 t mes_v10_1_suspend +ffffffff81e5b220 t mes_v10_1_resume +ffffffff81e5b270 t mes_v10_1_kiq_hw_init +ffffffff81e5b680 t mes_v10_1_add_hw_queue +ffffffff81e5b800 t mes_v10_1_remove_hw_queue +ffffffff81e5b890 t mes_v10_1_unmap_legacy_queue +ffffffff81e5b980 t mes_v10_1_suspend_gang +ffffffff81e5b9b0 t mes_v10_1_resume_gang +ffffffff81e5b9e0 t mes_v10_1_submit_pkt_and_poll_completion +ffffffff81e5bbe0 t mes_v10_1_load_microcode +ffffffff81e5c3d0 t mes_v10_1_enable +ffffffff81e5c840 t mes_v10_1_queue_init +ffffffff81e5cae0 t amdgpu_bo_unreserve +ffffffff81e5cbc0 t mes_v10_1_ring_get_rptr +ffffffff81e5cbf0 t mes_v10_1_ring_get_wptr +ffffffff81e5cc60 t mes_v10_1_ring_set_wptr +ffffffff81e5d000 t mes_v11_0_late_init +ffffffff81e5d070 t mes_v11_0_sw_init +ffffffff81e5d650 t mes_v11_0_sw_fini +ffffffff81e5d840 t mes_v11_0_hw_init +ffffffff81e5e050 t mes_v11_0_hw_fini +ffffffff81e5e080 t mes_v11_0_suspend +ffffffff81e5e090 t mes_v11_0_resume +ffffffff81e5e0e0 t mes_v11_0_kiq_hw_init +ffffffff81e5e2e0 t mes_v11_0_kiq_hw_fini +ffffffff81e5e720 t mes_v11_0_add_hw_queue +ffffffff81e5e920 t mes_v11_0_remove_hw_queue +ffffffff81e5e9b0 t mes_v11_0_unmap_legacy_queue +ffffffff81e5eab0 t mes_v11_0_suspend_gang +ffffffff81e5eae0 t mes_v11_0_resume_gang +ffffffff81e5eb10 t mes_v11_0_misc_op +ffffffff81e5ec80 t mes_v11_0_submit_pkt_and_poll_completion +ffffffff81e5eea0 t mes_v11_0_load_microcode +ffffffff81e5f600 t mes_v11_0_enable +ffffffff81e5faf0 t mes_v11_0_queue_init +ffffffff81e60580 t amdgpu_bo_unreserve +ffffffff81e60660 t mes_v11_0_mqd_init +ffffffff81e60860 t mes_v11_0_ring_get_rptr +ffffffff81e60890 t mes_v11_0_ring_get_wptr +ffffffff81e60900 t mes_v11_0_ring_set_wptr +ffffffff81e61000 t mmhub_v1_0_query_ras_error_count +ffffffff81e61150 t mmhub_v1_0_reset_ras_error_count +ffffffff81e61200 t mmhub_v1_0_get_fb_location +ffffffff81e61310 t mmhub_v1_0_init +ffffffff81e613c0 t mmhub_v1_0_gart_enable +ffffffff81e626f0 t mmhub_v1_0_set_fault_enable_default +ffffffff81e62800 t mmhub_v1_0_gart_disable +ffffffff81e62a90 t mmhub_v1_0_set_clockgating +ffffffff81e62f10 t mmhub_v1_0_get_clockgating +ffffffff81e63030 t mmhub_v1_0_setup_vm_pt_regs +ffffffff81e63170 t mmhub_v1_0_update_power_gating +ffffffff81e64000 t mmhub_v1_7_query_ras_error_count +ffffffff81e64150 t mmhub_v1_7_query_ras_error_status +ffffffff81e64230 t mmhub_v1_7_reset_ras_error_count +ffffffff81e642d0 t mmhub_v1_7_reset_ras_error_status +ffffffff81e643c0 t mmhub_v1_7_get_fb_location +ffffffff81e644d0 t mmhub_v1_7_init +ffffffff81e64570 t mmhub_v1_7_gart_enable +ffffffff81e65a50 t mmhub_v1_7_set_fault_enable_default +ffffffff81e65b60 t mmhub_v1_7_gart_disable +ffffffff81e65df0 t mmhub_v1_7_set_clockgating +ffffffff81e66170 t mmhub_v1_7_get_clockgating +ffffffff81e66290 t mmhub_v1_7_setup_vm_pt_regs +ffffffff81e67000 t mmhub_v2_0_init +ffffffff81e670d0 t mmhub_v2_0_gart_enable +ffffffff81e68250 t mmhub_v2_0_set_fault_enable_default +ffffffff81e68360 t mmhub_v2_0_gart_disable +ffffffff81e685e0 t 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+ffffffff81e750e0 T xgpu_ai_mailbox_get_irq +ffffffff81e75190 t xgpu_ai_mailbox_flr_work +ffffffff81e753a0 T xgpu_ai_mailbox_put_irq +ffffffff81e753e0 t xgpu_ai_request_full_gpu_access +ffffffff81e75400 t xgpu_ai_release_full_gpu_access +ffffffff81e75420 t xgpu_ai_request_init_data +ffffffff81e75480 t xgpu_ai_request_reset +ffffffff81e75530 t xgpu_ai_mailbox_trans_msg +ffffffff81e75760 t xgpu_ai_set_mailbox_ack_irq +ffffffff81e757f0 t xgpu_ai_mailbox_ack_irq +ffffffff81e75840 t xgpu_ai_set_mailbox_rcv_irq +ffffffff81e758d0 t xgpu_ai_mailbox_rcv_irq +ffffffff81e759b0 t xgpu_ai_send_access_requests +ffffffff81e75aa0 t xgpu_ai_poll_msg +ffffffff81e76000 T xgpu_nv_mailbox_set_irq_funcs +ffffffff81e76050 T xgpu_nv_mailbox_add_irq_id +ffffffff81e760e0 T xgpu_nv_mailbox_get_irq +ffffffff81e76190 t xgpu_nv_mailbox_flr_work +ffffffff81e763b0 T xgpu_nv_mailbox_put_irq +ffffffff81e763f0 t xgpu_nv_request_full_gpu_access +ffffffff81e76410 t xgpu_nv_release_full_gpu_access +ffffffff81e76430 t xgpu_nv_request_init_data +ffffffff81e76450 t xgpu_nv_request_reset +ffffffff81e76550 t xgpu_nv_mailbox_trans_msg +ffffffff81e766f0 t xgpu_nv_set_mailbox_ack_irq +ffffffff81e76770 t xgpu_nv_mailbox_ack_irq +ffffffff81e767c0 t xgpu_nv_set_mailbox_rcv_irq +ffffffff81e76840 t xgpu_nv_mailbox_rcv_irq +ffffffff81e768f0 t xgpu_nv_send_access_requests +ffffffff81e77000 T xgpu_vi_init_golden_registers +ffffffff81e770c0 T xgpu_vi_mailbox_set_irq_funcs +ffffffff81e77110 T xgpu_vi_mailbox_add_irq_id +ffffffff81e771a0 T xgpu_vi_mailbox_get_irq +ffffffff81e77250 t xgpu_vi_mailbox_flr_work +ffffffff81e773a0 T xgpu_vi_mailbox_put_irq +ffffffff81e773e0 t xgpu_vi_request_full_gpu_access +ffffffff81e77400 t xgpu_vi_release_full_gpu_access +ffffffff81e77420 t xgpu_vi_request_reset +ffffffff81e77440 t xgpu_vi_wait_reset_cmpl +ffffffff81e77520 t xgpu_vi_set_mailbox_ack_irq +ffffffff81e775a0 t xgpu_vi_mailbox_ack_irq +ffffffff81e775f0 t xgpu_vi_set_mailbox_rcv_irq +ffffffff81e77670 t xgpu_vi_mailbox_rcv_irq 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nbio_v2_3_get_pcie_index_offset +ffffffff81e7a0c0 t nbio_v2_3_get_pcie_data_offset +ffffffff81e7a100 t nbio_v2_3_get_rev_id +ffffffff81e7a160 t nbio_v2_3_mc_access_enable +ffffffff81e7a210 t nbio_v2_3_get_memsize +ffffffff81e7a280 t nbio_v2_3_sdma_doorbell_range +ffffffff81e7a320 t nbio_v2_3_vcn_doorbell_range +ffffffff81e7a3a0 t nbio_v2_3_enable_doorbell_aperture +ffffffff81e7a490 t nbio_v2_3_enable_doorbell_selfring_aperture +ffffffff81e7a5f0 t nbio_v2_3_ih_doorbell_range +ffffffff81e7a700 t nbio_v2_3_update_medium_grain_clock_gating +ffffffff81e7a7a0 t nbio_v2_3_update_medium_grain_light_sleep +ffffffff81e7a840 t nbio_v2_3_get_clockgating_state +ffffffff81e7a8c0 t nbio_v2_3_ih_control +ffffffff81e7aa10 t nbio_v2_3_init_registers +ffffffff81e7aaa0 t nbio_v2_3_remap_hdp_registers +ffffffff81e7abb0 t nbio_v2_3_enable_aspm +ffffffff81e7ac50 t nbio_v2_3_program_aspm +ffffffff81e7b2e0 t nbio_v2_3_apply_lc_spc_mode_wa +ffffffff81e7b370 t nbio_v2_3_apply_l1_link_width_reconfig_wa +ffffffff81e7b3e0 t nbio_v2_3_clear_doorbell_interrupt +ffffffff81e7c000 t nbio_v4_3_get_hdp_flush_req_offset +ffffffff81e7c040 t nbio_v4_3_get_hdp_flush_done_offset +ffffffff81e7c080 t nbio_v4_3_get_pcie_index_offset +ffffffff81e7c0b0 t nbio_v4_3_get_pcie_data_offset +ffffffff81e7c0f0 t nbio_v4_3_get_rev_id +ffffffff81e7c170 t nbio_v4_3_mc_access_enable +ffffffff81e7c220 t nbio_v4_3_get_memsize +ffffffff81e7c290 t nbio_v4_3_sdma_doorbell_range +ffffffff81e7c400 t nbio_v4_3_vcn_doorbell_range +ffffffff81e7c5b0 t nbio_v4_3_gc_doorbell_init +ffffffff81e7c6a0 t nbio_v4_3_enable_doorbell_aperture +ffffffff81e7c790 t nbio_v4_3_enable_doorbell_selfring_aperture +ffffffff81e7c8f0 t nbio_v4_3_ih_doorbell_range +ffffffff81e7ca10 t nbio_v4_3_update_medium_grain_clock_gating +ffffffff81e7cb50 t nbio_v4_3_update_medium_grain_light_sleep +ffffffff81e7cc80 t nbio_v4_3_get_clockgating_state +ffffffff81e7cd90 t nbio_v4_3_ih_control +ffffffff81e7cee0 t nbio_v4_3_init_registers +ffffffff81e7cff0 t nbio_v4_3_remap_hdp_registers +ffffffff81e7d100 t nbio_v4_3_program_aspm +ffffffff81e7dda0 t nbio_v4_3_get_rom_offset +ffffffff81e7de30 t nbio_v4_3_sriov_sdma_doorbell_range +ffffffff81e7de60 t nbio_v4_3_sriov_vcn_doorbell_range +ffffffff81e7de90 t nbio_v4_3_sriov_gc_doorbell_init +ffffffff81e7dec0 t nbio_v4_3_sriov_ih_doorbell_range +ffffffff81e7e000 t nbio_v6_1_get_hdp_flush_req_offset +ffffffff81e7e040 t nbio_v6_1_get_hdp_flush_done_offset +ffffffff81e7e080 t nbio_v6_1_get_pcie_index_offset +ffffffff81e7e0c0 t nbio_v6_1_get_pcie_data_offset +ffffffff81e7e100 t nbio_v6_1_get_rev_id +ffffffff81e7e180 t nbio_v6_1_mc_access_enable +ffffffff81e7e230 t nbio_v6_1_get_memsize +ffffffff81e7e2a0 t nbio_v6_1_sdma_doorbell_range +ffffffff81e7e330 t nbio_v6_1_enable_doorbell_aperture +ffffffff81e7e420 t nbio_v6_1_enable_doorbell_selfring_aperture +ffffffff81e7e580 t nbio_v6_1_ih_doorbell_range +ffffffff81e7e690 t nbio_v6_1_update_medium_grain_clock_gating +ffffffff81e7e730 t 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+ffffffff81e83e20 t nbio_v7_7_remap_hdp_registers +ffffffff81e84000 T nv_grbm_select +ffffffff81e840a0 T nv_set_virt_ops +ffffffff81e840e0 t nv_common_early_init +ffffffff81e844d0 t nv_common_late_init +ffffffff81e84540 t nv_common_sw_init +ffffffff81e84580 t nv_common_sw_fini +ffffffff81e845b0 t nv_common_hw_init +ffffffff81e846c0 t nv_common_hw_fini +ffffffff81e84720 t nv_common_suspend +ffffffff81e84780 t nv_common_resume +ffffffff81e847c0 t nv_common_is_idle +ffffffff81e847f0 t nv_common_wait_for_idle +ffffffff81e84820 t nv_common_soft_reset +ffffffff81e84850 t nv_common_set_clockgating_state +ffffffff81e84920 t nv_common_set_powergating_state +ffffffff81e84950 t nv_common_get_clockgating_state +ffffffff81e849c0 t nv_pcie_rreg +ffffffff81e84a20 t nv_pcie_wreg +ffffffff81e84a80 t nv_pcie_rreg64 +ffffffff81e84ae0 t nv_pcie_wreg64 +ffffffff81e84b40 t nv_didt_rreg +ffffffff81e84be0 t nv_didt_wreg +ffffffff81e84c60 t nv_read_disabled_bios +ffffffff81e84c90 t nv_read_register +ffffffff81e84d70 t nv_vga_set_state +ffffffff81e84da0 t nv_asic_reset +ffffffff81e84ee0 t nv_asic_reset_method +ffffffff81e84fd0 t nv_get_xclk +ffffffff81e85000 t nv_set_uvd_clocks +ffffffff81e85030 t nv_set_vce_clocks +ffffffff81e85060 t nv_get_config_memsize +ffffffff81e85080 t nv_need_full_reset +ffffffff81e850b0 t nv_init_doorbell_index +ffffffff81e851e0 t nv_need_reset_on_init +ffffffff81e85270 t nv_get_pcie_replay_count +ffffffff81e852a0 t nv_pre_asic_init +ffffffff81e852d0 t nv_update_umd_stable_pstate +ffffffff81e85390 t nv_query_video_codecs +ffffffff81e86000 T psp_v10_0_set_psp_funcs +ffffffff81e86030 t psp_v10_0_init_microcode +ffffffff81e862a0 t psp_v10_0_ring_init +ffffffff81e86320 t psp_v10_0_ring_create +ffffffff81e86630 t psp_v10_0_ring_stop +ffffffff81e86820 t psp_v10_0_ring_destroy +ffffffff81e868a0 t psp_v10_0_mode1_reset +ffffffff81e868f0 t psp_v10_0_ring_get_wptr +ffffffff81e86950 t psp_v10_0_ring_set_wptr +ffffffff81e87000 T psp_v11_0_set_psp_funcs +ffffffff81e87030 t psp_v11_0_init_microcode +ffffffff81e87450 t psp_v11_0_bootloader_load_kdb +ffffffff81e87470 t psp_v11_0_bootloader_load_spl +ffffffff81e87490 t psp_v11_0_bootloader_load_sysdrv +ffffffff81e874b0 t psp_v11_0_bootloader_load_sos +ffffffff81e87800 t psp_v11_0_ring_init +ffffffff81e87880 t psp_v11_0_ring_create +ffffffff81e87f10 t psp_v11_0_ring_stop +ffffffff81e88130 t psp_v11_0_ring_destroy +ffffffff81e881b0 t psp_v11_0_mode1_reset +ffffffff81e882b0 t psp_v11_0_memory_training +ffffffff81e88730 t psp_v11_0_ring_get_wptr +ffffffff81e88780 t psp_v11_0_ring_set_wptr +ffffffff81e888c0 t psp_v11_0_load_usbc_pd_fw +ffffffff81e88ab0 t psp_v11_0_read_usbc_pd_fw +ffffffff81e88bd0 t psp_v11_0_bootloader_load_component +ffffffff81e88d90 t psp_v11_0_wait_for_bootloader +ffffffff81e88f60 t psp_v11_0_memory_training_send_msg +ffffffff81e8a000 T psp_v11_0_8_set_psp_funcs +ffffffff81e8a030 t psp_v11_0_8_ring_init +ffffffff81e8a0b0 t psp_v11_0_8_ring_create +ffffffff81e8a740 t psp_v11_0_8_ring_stop +ffffffff81e8aad0 t psp_v11_0_8_ring_destroy +ffffffff81e8ab50 t psp_v11_0_8_ring_get_wptr +ffffffff81e8abc0 t psp_v11_0_8_ring_set_wptr +ffffffff81e8b000 T psp_v12_0_set_psp_funcs +ffffffff81e8b030 t psp_v12_0_init_microcode +ffffffff81e8b2a0 t psp_v12_0_bootloader_load_sysdrv +ffffffff81e8b5c0 t psp_v12_0_bootloader_load_sos +ffffffff81e8b920 t psp_v12_0_ring_init +ffffffff81e8bf00 t psp_v12_0_ring_create +ffffffff81e8c460 t psp_v12_0_ring_stop +ffffffff81e8c680 t psp_v12_0_ring_destroy +ffffffff81e8c700 t psp_v12_0_mode1_reset +ffffffff81e8c800 t psp_v12_0_ring_get_wptr +ffffffff81e8c870 t psp_v12_0_ring_set_wptr +ffffffff81e8d000 T psp_v13_0_set_psp_funcs +ffffffff81e8d030 t psp_v13_0_init_microcode +ffffffff81e8d160 t psp_v13_0_bootloader_load_kdb +ffffffff81e8d180 t psp_v13_0_bootloader_load_spl +ffffffff81e8d1a0 t psp_v13_0_bootloader_load_sysdrv +ffffffff81e8d1c0 t psp_v13_0_bootloader_load_soc_drv +ffffffff81e8d1e0 t psp_v13_0_bootloader_load_intf_drv +ffffffff81e8d200 t psp_v13_0_bootloader_load_dbg_drv +ffffffff81e8d220 t psp_v13_0_bootloader_load_ras_drv +ffffffff81e8d240 t psp_v13_0_bootloader_load_sos +ffffffff81e8d5a0 t psp_v13_0_ring_init +ffffffff81e8d620 t psp_v13_0_ring_create +ffffffff81e8dcb0 t psp_v13_0_ring_stop +ffffffff81e8e040 t psp_v13_0_ring_destroy +ffffffff81e8e0c0 t psp_v13_0_memory_training +ffffffff81e8e500 t psp_v13_0_ring_get_wptr +ffffffff81e8e570 t psp_v13_0_ring_set_wptr +ffffffff81e8e670 t psp_v13_0_load_usbc_pd_fw +ffffffff81e8e860 t psp_v13_0_read_usbc_pd_fw +ffffffff81e8e980 t psp_v13_0_update_spirom +ffffffff81e8eb60 t psp_v13_0_vbflash_status +ffffffff81e8ebc0 t psp_v13_0_bootloader_load_component +ffffffff81e8ed90 t psp_v13_0_wait_for_bootloader +ffffffff81e8ef60 t psp_v13_0_memory_training_send_msg +ffffffff81e8f0c0 t psp_v13_0_exec_spi_cmd +ffffffff81e90000 T psp_v13_0_4_set_psp_funcs +ffffffff81e90030 t psp_v13_0_4_init_microcode +ffffffff81e90100 t psp_v13_0_4_bootloader_load_kdb +ffffffff81e90120 t psp_v13_0_4_bootloader_load_spl +ffffffff81e90140 t psp_v13_0_4_bootloader_load_sysdrv +ffffffff81e90160 t psp_v13_0_4_bootloader_load_soc_drv +ffffffff81e90180 t psp_v13_0_4_bootloader_load_intf_drv +ffffffff81e901a0 t psp_v13_0_4_bootloader_load_dbg_drv +ffffffff81e901c0 t psp_v13_0_4_bootloader_load_sos +ffffffff81e90530 t psp_v13_0_4_ring_init +ffffffff81e905b0 t psp_v13_0_4_ring_create +ffffffff81e90c50 t psp_v13_0_4_ring_stop +ffffffff81e90fe0 t psp_v13_0_4_ring_destroy +ffffffff81e91060 t psp_v13_0_4_ring_get_wptr +ffffffff81e910d0 t psp_v13_0_4_ring_set_wptr +ffffffff81e911d0 t psp_v13_0_4_bootloader_load_component +ffffffff81e913a0 t psp_v13_0_4_wait_for_bootloader +ffffffff81e92000 T psp_v3_1_set_psp_funcs +ffffffff81e92030 t psp_v3_1_init_microcode +ffffffff81e920f0 t psp_v3_1_bootloader_load_sysdrv +ffffffff81e92410 t psp_v3_1_bootloader_load_sos +ffffffff81e92770 t psp_v3_1_ring_init +ffffffff81e927f0 t psp_v3_1_ring_create +ffffffff81e932f0 t psp_v3_1_ring_stop +ffffffff81e93510 t psp_v3_1_ring_destroy +ffffffff81e93590 t psp_v3_1_smu_reload_quirk +ffffffff81e935e0 t psp_v3_1_mode1_reset +ffffffff81e936e0 t psp_v3_1_ring_get_wptr +ffffffff81e93730 t psp_v3_1_ring_set_wptr +ffffffff81e94000 t sdma_v2_4_early_init +ffffffff81e940e0 t sdma_v2_4_sw_init +ffffffff81e94470 t sdma_v2_4_sw_fini +ffffffff81e94550 t sdma_v2_4_hw_init +ffffffff81e94910 t sdma_v2_4_hw_fini +ffffffff81e94950 t sdma_v2_4_suspend +ffffffff81e94990 t sdma_v2_4_resume +ffffffff81e949a0 t sdma_v2_4_is_idle +ffffffff81e949e0 t sdma_v2_4_wait_for_idle +ffffffff81e94a80 t sdma_v2_4_soft_reset +ffffffff81e94bc0 t sdma_v2_4_set_clockgating_state +ffffffff81e94bf0 t sdma_v2_4_set_powergating_state +ffffffff81e94c20 t sdma_v2_4_ring_get_rptr +ffffffff81e94c60 t sdma_v2_4_ring_get_wptr +ffffffff81e94cc0 t sdma_v2_4_ring_set_wptr +ffffffff81e94d00 t sdma_v2_4_ring_emit_ib +ffffffff81e94fb0 t sdma_v2_4_ring_emit_fence +ffffffff81e953b0 t sdma_v2_4_ring_emit_pipeline_sync +ffffffff81e95630 t sdma_v2_4_ring_emit_vm_flush +ffffffff81e958b0 t sdma_v2_4_ring_emit_hdp_flush +ffffffff81e95b30 t sdma_v2_4_ring_test_ring +ffffffff81e95e10 t sdma_v2_4_ring_test_ib +ffffffff81e95ff0 t sdma_v2_4_ring_insert_nop +ffffffff81e96120 t sdma_v2_4_ring_pad_ib +ffffffff81e96250 t sdma_v2_4_ring_emit_wreg +ffffffff81e963a0 t sdma_v2_4_emit_copy_buffer +ffffffff81e96460 t sdma_v2_4_emit_fill_buffer +ffffffff81e964f0 t sdma_v2_4_vm_copy_pte +ffffffff81e965b0 t sdma_v2_4_vm_write_pte +ffffffff81e96680 t sdma_v2_4_vm_set_pte_pde +ffffffff81e96780 t sdma_v2_4_set_trap_irq_state +ffffffff81e96840 t sdma_v2_4_process_trap_irq +ffffffff81e968e0 t sdma_v2_4_process_illegal_inst_irq +ffffffff81e96960 t sdma_v2_4_enable +ffffffff81e97000 t sdma_v3_0_early_init +ffffffff81e97150 t sdma_v3_0_sw_init +ffffffff81e97500 t sdma_v3_0_sw_fini +ffffffff81e975e0 t sdma_v3_0_hw_init +ffffffff81e97710 t sdma_v3_0_hw_fini +ffffffff81e97760 t sdma_v3_0_suspend +ffffffff81e977b0 t sdma_v3_0_resume +ffffffff81e977c0 t sdma_v3_0_is_idle +ffffffff81e97800 t sdma_v3_0_wait_for_idle +ffffffff81e978a0 t sdma_v3_0_check_soft_reset +ffffffff81e97900 t sdma_v3_0_pre_soft_reset +ffffffff81e97950 t sdma_v3_0_soft_reset +ffffffff81e97a20 t sdma_v3_0_post_soft_reset +ffffffff81e97a70 t sdma_v3_0_set_clockgating_state +ffffffff81e97cd0 t sdma_v3_0_set_powergating_state +ffffffff81e97d00 t sdma_v3_0_get_clockgating_state +ffffffff81e97d80 t sdma_v3_0_ring_get_rptr +ffffffff81e97dc0 t sdma_v3_0_ring_get_wptr +ffffffff81e97e40 t sdma_v3_0_ring_set_wptr +ffffffff81e97ef0 t sdma_v3_0_ring_emit_ib +ffffffff81e981a0 t sdma_v3_0_ring_emit_fence +ffffffff81e985a0 t sdma_v3_0_ring_emit_pipeline_sync +ffffffff81e98820 t sdma_v3_0_ring_emit_vm_flush +ffffffff81e98aa0 t sdma_v3_0_ring_emit_hdp_flush +ffffffff81e98d20 t sdma_v3_0_ring_test_ring +ffffffff81e99000 t sdma_v3_0_ring_test_ib +ffffffff81e991e0 t sdma_v3_0_ring_insert_nop +ffffffff81e99310 t sdma_v3_0_ring_pad_ib +ffffffff81e99440 t sdma_v3_0_ring_emit_wreg +ffffffff81e99590 t sdma_v3_0_emit_copy_buffer +ffffffff81e99650 t sdma_v3_0_emit_fill_buffer +ffffffff81e996e0 t sdma_v3_0_vm_copy_pte +ffffffff81e997a0 t sdma_v3_0_vm_write_pte +ffffffff81e99870 t sdma_v3_0_vm_set_pte_pde +ffffffff81e99970 t sdma_v3_0_set_trap_irq_state +ffffffff81e99a30 t sdma_v3_0_process_trap_irq +ffffffff81e99ad0 t sdma_v3_0_process_illegal_inst_irq +ffffffff81e99b50 t sdma_v3_0_ctx_switch_enable +ffffffff81e99ce0 t sdma_v3_0_enable +ffffffff81e99e50 t sdma_v3_0_gfx_resume +ffffffff81e9b000 t sdma_v4_0_early_init +ffffffff81e9b580 t sdma_v4_0_late_init +ffffffff81e9b820 t sdma_v4_0_sw_init +ffffffff81e9bba0 t sdma_v4_0_sw_fini +ffffffff81e9bc60 t sdma_v4_0_hw_init +ffffffff81e9ec00 t sdma_v4_0_hw_fini +ffffffff81e9ecb0 t sdma_v4_0_suspend +ffffffff81e9ed00 t sdma_v4_0_resume +ffffffff81e9ed80 t sdma_v4_0_is_idle +ffffffff81e9eeb0 t sdma_v4_0_wait_for_idle +ffffffff81e9f050 t sdma_v4_0_soft_reset +ffffffff81e9f080 t sdma_v4_0_set_clockgating_state +ffffffff81e9f580 t sdma_v4_0_set_powergating_state +ffffffff81e9f640 t sdma_v4_0_get_clockgating_state +ffffffff81e9f6e0 t sdma_v4_0_query_ras_error_count +ffffffff81e9f8b0 t sdma_v4_0_reset_ras_error_count +ffffffff81e9fa00 t sdma_v4_0_ring_get_rptr +ffffffff81e9fa60 t sdma_v4_0_ring_get_wptr +ffffffff81e9fc50 t sdma_v4_0_ring_set_wptr +ffffffff81e9fed0 t sdma_v4_0_ring_emit_ib +ffffffff81ea0180 t sdma_v4_0_ring_emit_fence +ffffffff81ea05b0 t sdma_v4_0_ring_emit_pipeline_sync +ffffffff81ea0610 t sdma_v4_0_ring_emit_vm_flush +ffffffff81ea0630 t sdma_v4_0_ring_emit_hdp_flush +ffffffff81ea06d0 t sdma_v4_0_ring_test_ring +ffffffff81ea09b0 t sdma_v4_0_ring_test_ib +ffffffff81ea0b90 t sdma_v4_0_ring_insert_nop +ffffffff81ea0cc0 t sdma_v4_0_ring_pad_ib +ffffffff81ea0df0 t sdma_v4_0_ring_emit_wreg +ffffffff81ea0f40 t sdma_v4_0_ring_emit_reg_wait +ffffffff81ea0f90 t sdma_v4_0_wait_reg_mem +ffffffff81ea12c0 t sdma_v4_0_page_ring_get_wptr +ffffffff81ea1470 t sdma_v4_0_page_ring_set_wptr +ffffffff81ea1630 t sdma_v4_0_emit_copy_buffer +ffffffff81ea16f0 t sdma_v4_0_emit_fill_buffer +ffffffff81ea1780 t sdma_v4_0_vm_copy_pte +ffffffff81ea1840 t sdma_v4_0_vm_write_pte +ffffffff81ea1910 t sdma_v4_0_vm_set_pte_pde +ffffffff81ea1a10 t sdma_v4_0_set_trap_irq_state +ffffffff81ea1bb0 t sdma_v4_0_process_trap_irq +ffffffff81ea1cf0 t sdma_v4_0_process_illegal_inst_irq +ffffffff81ea1e10 t sdma_v4_0_set_ecc_irq_state +ffffffff81ea1fb0 t sdma_v4_0_process_vm_hole_irq +ffffffff81ea20f0 t sdma_v4_0_process_doorbell_invalid_irq +ffffffff81ea2230 t sdma_v4_0_process_pool_timeout_irq +ffffffff81ea2370 t sdma_v4_0_process_srbm_write_irq +ffffffff81ea24b0 t sdma_v4_0_process_ras_data_cb +ffffffff81ea2530 t sdma_v4_0_ctx_switch_enable +ffffffff81ea2be0 t sdma_v4_0_enable +ffffffff81ea3180 t sdma_v4_0_gfx_enable +ffffffff81ea4000 t sdma_v4_4_query_ras_error_count +ffffffff81ea4270 t sdma_v4_4_reset_ras_error_count +ffffffff81ea5000 t sdma_v5_0_early_init +ffffffff81ea5170 t sdma_v5_0_sw_init +ffffffff81ea5410 t sdma_v5_0_sw_fini +ffffffff81ea54a0 t sdma_v5_0_hw_init +ffffffff81ea6750 t sdma_v5_0_hw_fini +ffffffff81ea67b0 t sdma_v5_0_suspend +ffffffff81ea6810 t sdma_v5_0_resume +ffffffff81ea6820 t sdma_v5_0_is_idle +ffffffff81ea68b0 t sdma_v5_0_wait_for_idle +ffffffff81ea6970 t sdma_v5_0_soft_reset +ffffffff81ea69a0 t sdma_v5_0_set_clockgating_state +ffffffff81ea6ba0 t sdma_v5_0_set_powergating_state +ffffffff81ea6bd0 t sdma_v5_0_get_clockgating_state +ffffffff81ea6c70 t sdma_v5_0_ring_get_rptr +ffffffff81ea6cd0 t sdma_v5_0_ring_get_wptr +ffffffff81ea6e70 t sdma_v5_0_ring_set_wptr +ffffffff81ea71d0 t sdma_v5_0_ring_emit_ib +ffffffff81ea7490 t sdma_v5_0_ring_emit_fence +ffffffff81ea7900 t sdma_v5_0_ring_emit_pipeline_sync +ffffffff81ea7b80 t sdma_v5_0_ring_emit_vm_flush +ffffffff81ea7ba0 t sdma_v5_0_ring_emit_hdp_flush +ffffffff81ea7e40 t sdma_v5_0_ring_test_ring +ffffffff81ea8210 t sdma_v5_0_ring_test_ib +ffffffff81ea8540 t sdma_v5_0_ring_insert_nop +ffffffff81ea8670 t sdma_v5_0_ring_pad_ib +ffffffff81ea87a0 t sdma_v5_0_ring_init_cond_exec +ffffffff81ea89d0 t sdma_v5_0_ring_patch_cond_exec +ffffffff81ea8a90 t sdma_v5_0_ring_emit_wreg +ffffffff81ea8be0 t sdma_v5_0_ring_emit_reg_wait +ffffffff81ea8e60 t sdma_v5_0_ring_emit_reg_write_reg_wait +ffffffff81ea8ee0 t sdma_v5_0_ring_preempt_ib +ffffffff81ea9020 t sdma_v5_0_ring_emit_mem_sync +ffffffff81ea9230 t sdma_v5_0_emit_copy_buffer +ffffffff81ea92f0 t sdma_v5_0_emit_fill_buffer +ffffffff81ea9380 t sdma_v5_0_vm_copy_pte +ffffffff81ea9440 t sdma_v5_0_vm_write_pte +ffffffff81ea9510 t sdma_v5_0_vm_set_pte_pde +ffffffff81ea9610 t sdma_v5_0_set_trap_irq_state +ffffffff81ea96a0 t sdma_v5_0_process_trap_irq +ffffffff81ea97b0 t sdma_v5_0_process_illegal_inst_irq +ffffffff81ea97e0 t sdma_v5_0_mqd_init +ffffffff81ea98c0 t sdma_v5_0_ctx_switch_enable +ffffffff81ea9bc0 t sdma_v5_0_enable +ffffffff81eaa000 t sdma_v5_2_early_init +ffffffff81eaa170 t sdma_v5_2_sw_init +ffffffff81eaa3a0 t sdma_v5_2_sw_fini +ffffffff81eaa430 t sdma_v5_2_hw_init +ffffffff81eaa770 t sdma_v5_2_hw_fini +ffffffff81eaa7d0 t sdma_v5_2_suspend +ffffffff81eaa830 t sdma_v5_2_resume +ffffffff81eaa840 t sdma_v5_2_is_idle +ffffffff81eaa900 t sdma_v5_2_wait_for_idle +ffffffff81eaaa00 t sdma_v5_2_soft_reset +ffffffff81eaaca0 t sdma_v5_2_set_clockgating_state +ffffffff81eaafc0 t sdma_v5_2_set_powergating_state +ffffffff81eaaff0 t sdma_v5_2_get_clockgating_state +ffffffff81eab080 t sdma_v5_2_ring_get_rptr +ffffffff81eab0e0 t sdma_v5_2_ring_get_wptr +ffffffff81eab220 t sdma_v5_2_ring_set_wptr +ffffffff81eab3e0 t sdma_v5_2_ring_emit_ib +ffffffff81eab6a0 t sdma_v5_2_ring_emit_fence +ffffffff81eabb10 t sdma_v5_2_ring_emit_pipeline_sync +ffffffff81eabd90 t sdma_v5_2_ring_emit_vm_flush +ffffffff81eabdb0 t sdma_v5_2_ring_emit_hdp_flush +ffffffff81eac050 t sdma_v5_2_ring_test_ring +ffffffff81eac420 t sdma_v5_2_ring_test_ib +ffffffff81eac750 t sdma_v5_2_ring_insert_nop +ffffffff81eac880 t sdma_v5_2_ring_pad_ib +ffffffff81eac9b0 t sdma_v5_2_ring_init_cond_exec +ffffffff81eacbe0 t sdma_v5_2_ring_patch_cond_exec +ffffffff81eacca0 t sdma_v5_2_ring_emit_wreg +ffffffff81eacdf0 t sdma_v5_2_ring_emit_reg_wait +ffffffff81ead070 t sdma_v5_2_ring_emit_reg_write_reg_wait +ffffffff81ead0f0 t sdma_v5_2_ring_preempt_ib +ffffffff81ead260 t sdma_v5_2_ring_emit_mem_sync +ffffffff81ead470 t sdma_v5_2_emit_copy_buffer +ffffffff81ead530 t sdma_v5_2_emit_fill_buffer +ffffffff81ead5c0 t sdma_v5_2_vm_copy_pte +ffffffff81ead680 t sdma_v5_2_vm_write_pte +ffffffff81ead750 t sdma_v5_2_vm_set_pte_pde +ffffffff81ead850 t sdma_v5_2_set_trap_irq_state +ffffffff81ead910 t sdma_v5_2_process_trap_irq +ffffffff81eada50 t sdma_v5_2_process_illegal_inst_irq +ffffffff81eada80 t sdma_v5_2_mqd_init +ffffffff81eadb60 t sdma_v5_2_ctx_switch_enable +ffffffff81eadf60 t sdma_v5_2_enable +ffffffff81eae370 t sdma_v5_2_gfx_resume +ffffffff81eb0000 t sdma_v6_0_early_init +ffffffff81eb0140 t sdma_v6_0_sw_init +ffffffff81eb0320 t sdma_v6_0_sw_fini +ffffffff81eb03b0 t sdma_v6_0_hw_init +ffffffff81eb03c0 t sdma_v6_0_hw_fini +ffffffff81eb0410 t sdma_v6_0_suspend +ffffffff81eb0460 t sdma_v6_0_resume +ffffffff81eb0470 t sdma_v6_0_is_idle +ffffffff81eb0500 t sdma_v6_0_wait_for_idle +ffffffff81eb05c0 t sdma_v6_0_check_soft_reset +ffffffff81eb0680 t sdma_v6_0_soft_reset +ffffffff81eb0b20 t sdma_v6_0_set_clockgating_state +ffffffff81eb0b50 t sdma_v6_0_set_powergating_state +ffffffff81eb0b80 t sdma_v6_0_get_clockgating_state +ffffffff81eb0bb0 t sdma_v6_0_ring_get_rptr +ffffffff81eb0c10 t sdma_v6_0_ring_get_wptr +ffffffff81eb0c80 t sdma_v6_0_ring_set_wptr +ffffffff81eb0fe0 t sdma_v6_0_ring_emit_ib +ffffffff81eb12a0 t sdma_v6_0_ring_emit_fence +ffffffff81eb1710 t sdma_v6_0_ring_emit_pipeline_sync +ffffffff81eb1990 t sdma_v6_0_ring_emit_vm_flush +ffffffff81eb19b0 t sdma_v6_0_ring_emit_hdp_flush +ffffffff81eb1c50 t sdma_v6_0_ring_test_ring +ffffffff81eb2020 t sdma_v6_0_ring_test_ib +ffffffff81eb2350 t sdma_v6_0_ring_insert_nop +ffffffff81eb2480 t sdma_v6_0_ring_pad_ib +ffffffff81eb25b0 t sdma_v6_0_ring_init_cond_exec +ffffffff81eb27e0 t sdma_v6_0_ring_patch_cond_exec +ffffffff81eb28a0 t sdma_v6_0_ring_emit_wreg +ffffffff81eb29f0 t sdma_v6_0_ring_emit_reg_wait +ffffffff81eb2c70 t sdma_v6_0_ring_emit_reg_write_reg_wait +ffffffff81eb2cf0 t sdma_v6_0_ring_preempt_ib +ffffffff81eb2e40 t sdma_v6_0_ring_emit_mem_sync +ffffffff81eb3050 t sdma_v6_0_emit_copy_buffer +ffffffff81eb3110 t sdma_v6_0_emit_fill_buffer +ffffffff81eb31a0 t sdma_v6_0_vm_copy_pte +ffffffff81eb3260 t sdma_v6_0_vm_write_pte +ffffffff81eb3330 t sdma_v6_0_vm_set_pte_pde +ffffffff81eb3430 t sdma_v6_0_set_trap_irq_state +ffffffff81eb34c0 t sdma_v6_0_process_trap_irq +ffffffff81eb35f0 t sdma_v6_0_process_illegal_inst_irq +ffffffff81eb3620 t sdma_v6_0_mqd_init +ffffffff81eb3740 t sdma_v6_0_start +ffffffff81eb39c0 t sdma_v6_0_enable +ffffffff81eb3b40 t sdma_v6_0_gfx_resume +ffffffff81eb4bc0 t sdma_v6_0_gfx_stop +ffffffff81eb5000 T sienna_cichlid_reset_init +ffffffff81eb50c0 t sienna_cichlid_async_reset +ffffffff81eb5120 t sienna_cichlid_get_reset_handler +ffffffff81eb5180 T sienna_cichlid_reset_fini +ffffffff81eb51e0 t sienna_cichlid_mode2_prepare_hwcontext +ffffffff81eb5330 t sienna_cichlid_mode2_perform_reset +ffffffff81eb53b0 t sienna_cichlid_mode2_restore_hwcontext +ffffffff81eb56b0 t sienna_cichlid_mode2_reset +ffffffff81eb6000 T smu_v11_0_i2c_control_init +ffffffff81eb60d0 T smu_v11_0_i2c_control_fini +ffffffff81eb6110 t smu_v11_0_i2c_xfer +ffffffff81eb71f0 t smu_v11_0_i2c_func +ffffffff81eb7220 t smu_v11_0_i2c_enable +ffffffff81eb7360 t smu_v11_0_i2c_abort +ffffffff81eb7460 t lock_bus +ffffffff81eb7500 t trylock_bus +ffffffff81eb7550 t unlock_bus +ffffffff81eb8000 t smuio_v11_0_get_rom_index_offset +ffffffff81eb8040 t smuio_v11_0_get_rom_data_offset +ffffffff81eb8080 t smuio_v11_0_update_rom_clock_gating +ffffffff81eb81c0 t smuio_v11_0_get_clock_gating_state +ffffffff81eb9000 t smuio_v11_0_6_get_rom_index_offset +ffffffff81eb9040 t smuio_v11_0_6_get_rom_data_offset +ffffffff81eb9080 t smuio_v11_0_6_update_rom_clock_gating +ffffffff81eb91c0 t smuio_v11_0_6_get_clock_gating_state +ffffffff81eba000 t smuio_v13_0_get_rom_index_offset +ffffffff81eba040 t smuio_v13_0_get_rom_data_offset +ffffffff81eba080 t smuio_v13_0_update_rom_clock_gating +ffffffff81eba1c0 t smuio_v13_0_get_clock_gating_state +ffffffff81eba260 t smuio_v13_0_get_die_id +ffffffff81eba2e0 t smuio_v13_0_get_socket_id +ffffffff81eba360 t smuio_v13_0_is_host_gpu_xgmi_supported +ffffffff81ebb000 t smuio_v13_0_6_get_rom_index_offset +ffffffff81ebb040 t smuio_v13_0_6_get_rom_data_offset +ffffffff81ebc000 t smuio_v9_0_get_rom_index_offset +ffffffff81ebc040 t smuio_v9_0_get_rom_data_offset +ffffffff81ebc080 t smuio_v9_0_update_rom_clock_gating +ffffffff81ebc1c0 t smuio_v9_0_get_clock_gating_state +ffffffff81ebd000 T soc15_grbm_select +ffffffff81ebd080 T soc15_program_register_sequence +ffffffff81ebd280 T soc15_set_virt_ops +ffffffff81ebd2f0 t soc15_common_early_init +ffffffff81ebd680 t soc15_common_late_init +ffffffff81ebd6c0 t soc15_common_sw_init +ffffffff81ebd720 t soc15_common_sw_fini +ffffffff81ebd770 t soc15_common_hw_init +ffffffff81ebd8a0 t soc15_common_hw_fini +ffffffff81ebd970 t soc15_common_suspend +ffffffff81ebd9b0 t soc15_common_resume +ffffffff81ebd9f0 t soc15_common_is_idle +ffffffff81ebda20 t soc15_common_wait_for_idle +ffffffff81ebda50 t soc15_common_soft_reset +ffffffff81ebda80 t soc15_common_set_clockgating_state +ffffffff81ebddc0 t soc15_common_set_powergating_state +ffffffff81ebddf0 t soc15_common_get_clockgating_state +ffffffff81ebded0 t soc15_pcie_rreg +ffffffff81ebdf30 t soc15_pcie_wreg +ffffffff81ebdf90 t soc15_pcie_rreg64 +ffffffff81ebdff0 t soc15_pcie_wreg64 +ffffffff81ebe050 t soc15_uvd_ctx_rreg +ffffffff81ebe0f0 t soc15_uvd_ctx_wreg +ffffffff81ebe180 t soc15_didt_rreg +ffffffff81ebe220 t soc15_didt_wreg +ffffffff81ebe2a0 t soc15_gc_cac_rreg +ffffffff81ebe3c0 t soc15_gc_cac_wreg +ffffffff81ebe4d0 t soc15_se_cac_rreg +ffffffff81ebe5f0 t soc15_se_cac_wreg +ffffffff81ebe700 t soc15_read_disabled_bios +ffffffff81ebe730 t soc15_read_register +ffffffff81ebe830 t soc15_vga_set_state +ffffffff81ebe860 t soc15_asic_reset +ffffffff81ebe960 t soc15_asic_reset_method +ffffffff81ebeae0 t soc15_get_xclk +ffffffff81ebeb30 t soc15_set_uvd_clocks +ffffffff81ebeb60 t soc15_set_vce_clocks +ffffffff81ebeb90 t soc15_get_config_memsize +ffffffff81ebebb0 t soc15_need_full_reset +ffffffff81ebebe0 t soc15_get_pcie_usage +ffffffff81ebed10 t soc15_need_reset_on_init +ffffffff81ebedb0 t soc15_get_pcie_replay_count +ffffffff81ebee20 t soc15_supports_baco +ffffffff81ebee80 t soc15_pre_asic_init +ffffffff81ebee90 t soc15_query_video_codecs +ffffffff81ebef40 t vega20_get_pcie_usage +ffffffff81ec0000 T soc21_grbm_select +ffffffff81ec0080 t soc21_common_early_init +ffffffff81ec02a0 t soc21_common_late_init +ffffffff81ec02d0 t soc21_common_sw_init +ffffffff81ec0300 t soc21_common_sw_fini +ffffffff81ec0330 t soc21_common_hw_init +ffffffff81ec0400 t soc21_common_hw_fini +ffffffff81ec0460 t soc21_common_suspend +ffffffff81ec04c0 t soc21_common_resume +ffffffff81ec0590 t soc21_common_is_idle +ffffffff81ec05c0 t soc21_common_wait_for_idle +ffffffff81ec05f0 t soc21_common_soft_reset +ffffffff81ec0620 t soc21_common_set_clockgating_state +ffffffff81ec06d0 t soc21_common_set_powergating_state +ffffffff81ec0730 t soc21_common_get_clockgating_state +ffffffff81ec0780 t soc21_pcie_rreg +ffffffff81ec07e0 t soc21_pcie_wreg +ffffffff81ec0840 t soc21_pcie_rreg64 +ffffffff81ec08a0 t soc21_pcie_wreg64 +ffffffff81ec0900 t soc21_didt_rreg +ffffffff81ec09a0 t soc21_didt_wreg +ffffffff81ec0a20 t soc21_read_disabled_bios +ffffffff81ec0a50 t soc21_read_register +ffffffff81ec0b40 t soc21_vga_set_state +ffffffff81ec0b70 t soc21_asic_reset +ffffffff81ec0c50 t soc21_asic_reset_method +ffffffff81ec0d10 t soc21_get_xclk +ffffffff81ec0d40 t soc21_set_uvd_clocks +ffffffff81ec0d70 t soc21_set_vce_clocks +ffffffff81ec0da0 t soc21_get_config_memsize +ffffffff81ec0dc0 t soc21_need_full_reset +ffffffff81ec0e20 t soc21_init_doorbell_index +ffffffff81ec0f40 t soc21_need_reset_on_init +ffffffff81ec0fd0 t soc21_get_pcie_replay_count +ffffffff81ec1000 t soc21_pre_asic_init +ffffffff81ec1030 t soc21_update_umd_stable_pstate +ffffffff81ec10a0 t soc21_query_video_codecs +ffffffff81ec2000 t tonga_ih_early_init +ffffffff81ec2050 t tonga_ih_sw_init +ffffffff81ec20d0 t tonga_ih_sw_fini +ffffffff81ec2110 t tonga_ih_hw_init +ffffffff81ec2300 t tonga_ih_hw_fini +ffffffff81ec23a0 t tonga_ih_suspend +ffffffff81ec2440 t tonga_ih_resume +ffffffff81ec2480 t tonga_ih_is_idle +ffffffff81ec24d0 t tonga_ih_wait_for_idle +ffffffff81ec2570 t tonga_ih_check_soft_reset +ffffffff81ec25d0 t tonga_ih_pre_soft_reset +ffffffff81ec2680 t tonga_ih_soft_reset +ffffffff81ec2750 t tonga_ih_post_soft_reset +ffffffff81ec2790 t tonga_ih_set_clockgating_state +ffffffff81ec27c0 t tonga_ih_set_powergating_state +ffffffff81ec27f0 t tonga_ih_get_wptr +ffffffff81ec28e0 t tonga_ih_decode_iv +ffffffff81ec2960 t tonga_ih_set_rptr +ffffffff81ec3000 t umc_v6_0_init_registers +ffffffff81ec4000 t umc_v6_1_query_ras_error_count +ffffffff81ec44e0 t umc_v6_1_query_ras_error_address +ffffffff81ec47c0 t umc_v6_1_err_cnt_init +ffffffff81ec5000 t umc_v6_7_query_ras_error_count +ffffffff81ec5410 t umc_v6_7_query_ras_error_address +ffffffff81ec5590 t umc_v6_7_query_ras_poison_mode +ffffffff81ec55f0 t umc_v6_7_convert_error_address +ffffffff81ec58f0 t umc_v6_7_ecc_info_query_ras_error_count +ffffffff81ec5b30 t umc_v6_7_ecc_info_query_ras_error_address +ffffffff81ec6000 t umc_v8_10_query_ras_error_count +ffffffff81ec6280 t umc_v8_10_query_ras_error_address +ffffffff81ec65b0 t umc_v8_10_err_cnt_init +ffffffff81ec6730 t umc_v8_10_query_ras_poison_mode +ffffffff81ec7000 t umc_v8_7_query_ras_error_count +ffffffff81ec7310 t umc_v8_7_query_ras_error_address +ffffffff81ec74c0 t umc_v8_7_err_cnt_init +ffffffff81ec7610 t umc_v8_7_ecc_info_query_ras_error_count +ffffffff81ec7740 t umc_v8_7_ecc_info_query_ras_error_address +ffffffff81ec8000 t uvd_v5_0_early_init +ffffffff81ec8050 t uvd_v5_0_sw_init +ffffffff81ec8140 t uvd_v5_0_sw_fini +ffffffff81ec8190 t uvd_v5_0_hw_init +ffffffff81ec86a0 t uvd_v5_0_hw_fini +ffffffff81ec8720 t uvd_v5_0_suspend +ffffffff81ec8820 t uvd_v5_0_resume +ffffffff81ec8870 t uvd_v5_0_is_idle +ffffffff81ec88c0 t uvd_v5_0_wait_for_idle +ffffffff81ec8950 t uvd_v5_0_soft_reset +ffffffff81ec89f0 t uvd_v5_0_set_clockgating_state +ffffffff81ec8b90 t uvd_v5_0_set_powergating_state +ffffffff81ec8bd0 t uvd_v5_0_get_clockgating_state +ffffffff81ec8c50 t uvd_v5_0_ring_get_rptr +ffffffff81ec8c90 t uvd_v5_0_ring_get_wptr +ffffffff81ec8cd0 t uvd_v5_0_ring_set_wptr +ffffffff81ec8d00 t uvd_v5_0_ring_emit_ib +ffffffff81ec8f70 t uvd_v5_0_ring_emit_fence +ffffffff81ec9520 t uvd_v5_0_ring_test_ring +ffffffff81ec96c0 t uvd_v5_0_ring_insert_nop +ffffffff81ec9820 t uvd_v5_0_set_interrupt_state +ffffffff81ec9850 t uvd_v5_0_process_interrupt +ffffffff81ec98b0 t uvd_v5_0_stop +ffffffff81ec99c0 t uvd_v5_0_start +ffffffff81ecb000 t uvd_v6_0_early_init +ffffffff81ecb140 t uvd_v6_0_sw_init +ffffffff81ecb460 t uvd_v6_0_sw_fini +ffffffff81ecb520 t uvd_v6_0_hw_init +ffffffff81ecbae0 t uvd_v6_0_hw_fini +ffffffff81ecbb60 t uvd_v6_0_suspend +ffffffff81ecbc60 t uvd_v6_0_resume +ffffffff81ecbcb0 t uvd_v6_0_is_idle +ffffffff81ecbd00 t uvd_v6_0_wait_for_idle +ffffffff81ecbd90 t uvd_v6_0_check_soft_reset +ffffffff81ecbe10 t uvd_v6_0_pre_soft_reset +ffffffff81ecbe50 t uvd_v6_0_soft_reset +ffffffff81ecbf20 t uvd_v6_0_post_soft_reset +ffffffff81ecbfc0 t uvd_v6_0_set_clockgating_state +ffffffff81ecc150 t uvd_v6_0_set_powergating_state +ffffffff81ecc1c0 t uvd_v6_0_get_clockgating_state +ffffffff81ecc250 t uvd_v6_0_ring_get_rptr +ffffffff81ecc290 t uvd_v6_0_ring_get_wptr +ffffffff81ecc2d0 t uvd_v6_0_ring_set_wptr +ffffffff81ecc300 t uvd_v6_0_ring_emit_ib +ffffffff81ecc660 t uvd_v6_0_ring_emit_fence +ffffffff81eccc10 t uvd_v6_0_ring_emit_pipeline_sync +ffffffff81ecd010 t uvd_v6_0_ring_emit_vm_flush +ffffffff81ecd370 t uvd_v6_0_ring_emit_hdp_flush +ffffffff81ecd3a0 t uvd_v6_0_ring_test_ring +ffffffff81ecd540 t uvd_v6_0_ring_insert_nop +ffffffff81ecd6a0 t uvd_v6_0_ring_emit_wreg +ffffffff81ecd920 t uvd_v6_0_enc_ring_get_rptr +ffffffff81ecd980 t uvd_v6_0_enc_ring_get_wptr +ffffffff81ecd9e0 t uvd_v6_0_enc_ring_set_wptr +ffffffff81ecda20 t uvd_v6_0_enc_ring_emit_ib +ffffffff81ecdc60 t uvd_v6_0_enc_ring_emit_fence +ffffffff81ecdea0 t uvd_v6_0_enc_ring_emit_pipeline_sync +ffffffff81ece050 t uvd_v6_0_enc_ring_emit_vm_flush +ffffffff81ece260 t uvd_v6_0_enc_ring_test_ring +ffffffff81ece3b0 t uvd_v6_0_enc_ring_test_ib +ffffffff81ece970 t uvd_v6_0_enc_ring_insert_end +ffffffff81ecea00 t uvd_v6_0_set_interrupt_state +ffffffff81ecea30 t uvd_v6_0_process_interrupt +ffffffff81eceb20 t uvd_v6_0_stop +ffffffff81ecec30 t uvd_v6_0_start +ffffffff81ed0000 t uvd_v7_0_early_init +ffffffff81ed0270 t uvd_v7_0_sw_init +ffffffff81ed05f0 t uvd_v7_0_sw_fini +ffffffff81ed0700 t uvd_v7_0_hw_init +ffffffff81ed3620 t uvd_v7_0_hw_fini +ffffffff81ed3930 t uvd_v7_0_suspend +ffffffff81ed39e0 t uvd_v7_0_resume +ffffffff81ed3a30 t uvd_v7_0_set_clockgating_state +ffffffff81ed3a60 t uvd_v7_0_ring_get_rptr +ffffffff81ed3b00 t uvd_v7_0_ring_get_wptr +ffffffff81ed3ba0 t uvd_v7_0_ring_set_wptr +ffffffff81ed3c20 t uvd_v7_0_ring_patch_cs_in_place +ffffffff81ed3ca0 t uvd_v7_0_ring_emit_ib +ffffffff81ed4050 t uvd_v7_0_ring_emit_fence +ffffffff81ed46b0 t uvd_v7_0_ring_emit_vm_flush +ffffffff81ed4720 t uvd_v7_0_ring_emit_hdp_flush +ffffffff81ed4750 t uvd_v7_0_ring_test_ring +ffffffff81ed49e0 t uvd_v7_0_ring_insert_nop +ffffffff81ed4b80 t uvd_v7_0_ring_emit_wreg +ffffffff81ed4e50 t uvd_v7_0_ring_emit_reg_wait +ffffffff81ed51f0 t uvd_v7_0_enc_ring_get_rptr +ffffffff81ed52e0 t uvd_v7_0_enc_ring_get_wptr +ffffffff81ed53e0 t uvd_v7_0_enc_ring_set_wptr +ffffffff81ed54e0 t uvd_v7_0_enc_ring_emit_ib +ffffffff81ed5720 t uvd_v7_0_enc_ring_emit_fence +ffffffff81ed5960 t uvd_v7_0_enc_ring_emit_vm_flush +ffffffff81ed59d0 t uvd_v7_0_enc_ring_test_ring +ffffffff81ed5b30 t uvd_v7_0_enc_ring_test_ib +ffffffff81ed60f0 t uvd_v7_0_enc_ring_insert_end +ffffffff81ed6180 t uvd_v7_0_enc_ring_emit_wreg +ffffffff81ed62e0 t uvd_v7_0_enc_ring_emit_reg_wait +ffffffff81ed64a0 t uvd_v7_0_set_interrupt_state +ffffffff81ed64d0 t uvd_v7_0_process_interrupt +ffffffff81ed7000 t vce_v3_0_early_init +ffffffff81ed7180 t vce_v3_0_sw_init +ffffffff81ed72d0 t vce_v3_0_sw_fini +ffffffff81ed7320 t vce_v3_0_hw_init +ffffffff81ed7400 t vce_v3_0_hw_fini +ffffffff81ed74f0 t vce_v3_0_suspend +ffffffff81ed75c0 t vce_v3_0_resume +ffffffff81ed7610 t vce_v3_0_is_idle +ffffffff81ed7680 t vce_v3_0_wait_for_idle +ffffffff81ed7730 t vce_v3_0_check_soft_reset +ffffffff81ed7830 t vce_v3_0_pre_soft_reset +ffffffff81ed78d0 t vce_v3_0_soft_reset +ffffffff81ed79a0 t vce_v3_0_post_soft_reset +ffffffff81ed7b00 t vce_v3_0_set_clockgating_state +ffffffff81ed7df0 t vce_v3_0_set_powergating_state +ffffffff81ed8640 t vce_v3_0_get_clockgating_state +ffffffff81ed8700 t vce_v3_0_ring_get_rptr +ffffffff81ed87d0 t vce_v3_0_ring_get_wptr +ffffffff81ed88a0 t vce_v3_0_ring_set_wptr +ffffffff81ed8960 t vce_v3_0_ring_emit_ib +ffffffff81ed8ba0 t vce_v3_0_emit_pipeline_sync +ffffffff81ed8d50 t vce_v3_0_emit_vm_flush +ffffffff81ed8fc0 t vce_v3_0_set_interrupt_state +ffffffff81ed9030 t vce_v3_0_process_interrupt +ffffffff81ed90f0 t vce_v3_0_stop +ffffffff81eda000 t vce_v4_0_early_init +ffffffff81eda0b0 t vce_v4_0_sw_init +ffffffff81eda2e0 t vce_v4_0_sw_fini +ffffffff81eda360 t vce_v4_0_hw_init +ffffffff81edab40 t vce_v4_0_hw_fini +ffffffff81edabe0 t vce_v4_0_suspend +ffffffff81edae00 t vce_v4_0_resume +ffffffff81edaeb0 t vce_v4_0_set_clockgating_state +ffffffff81edaee0 t vce_v4_0_set_powergating_state +ffffffff81edafc0 t vce_v4_0_ring_get_rptr +ffffffff81edb030 t vce_v4_0_ring_get_wptr +ffffffff81edb0c0 t vce_v4_0_ring_set_wptr +ffffffff81edb150 t vce_v4_0_ring_emit_ib +ffffffff81edb390 t vce_v4_0_ring_emit_fence +ffffffff81edb5d0 t vce_v4_0_emit_vm_flush +ffffffff81edb640 t vce_v4_0_ring_insert_end +ffffffff81edb6d0 t vce_v4_0_emit_wreg +ffffffff81edb830 t vce_v4_0_emit_reg_wait +ffffffff81edb9f0 t vce_v4_0_set_interrupt_state +ffffffff81edba80 t vce_v4_0_process_interrupt +ffffffff81edbb20 t vce_v4_0_start +ffffffff81edc500 t vce_v4_0_stop +ffffffff81edd000 T vcn_dec_sw_ring_emit_fence +ffffffff81edd240 T vcn_dec_sw_ring_insert_end +ffffffff81edd2d0 T vcn_dec_sw_ring_emit_ib +ffffffff81edd510 T vcn_dec_sw_ring_emit_reg_wait +ffffffff81edd6d0 T vcn_dec_sw_ring_emit_vm_flush +ffffffff81edd740 T vcn_dec_sw_ring_emit_wreg +ffffffff81ede000 T vcn_v1_0_set_pg_for_begin_use +ffffffff81ede150 T vcn_v1_0_ring_end_use +ffffffff81ede1c0 t vcn_v1_0_early_init +ffffffff81ede340 t vcn_v1_0_sw_init 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vcn_v2_0_wait_for_idle +ffffffff81eed0a0 t vcn_v2_0_set_clockgating_state +ffffffff81eed130 t vcn_v2_0_set_powergating_state +ffffffff81eef3f0 t vcn_v2_0_dec_ring_get_rptr +ffffffff81eef480 t vcn_v2_0_dec_ring_get_wptr +ffffffff81eef520 t vcn_v2_0_dec_ring_set_wptr +ffffffff81eef650 t vcn_v2_0_enc_ring_get_rptr +ffffffff81eef720 t vcn_v2_0_enc_ring_get_wptr +ffffffff81eef810 t vcn_v2_0_enc_ring_set_wptr +ffffffff81eef900 t vcn_v2_0_set_interrupt_state +ffffffff81eef930 t vcn_v2_0_process_interrupt +ffffffff81eef9e0 t vcn_v2_0_pause_dpg_mode +ffffffff81ef0340 t vcn_v2_0_enable_clock_gating +ffffffff81ef05c0 t vcn_v2_0_disable_clock_gating +ffffffff81ef09c0 t vcn_v2_0_enable_static_power_gating +ffffffff81ef0ba0 t vcn_v2_0_start_dpg_mode +ffffffff81ef5660 t vcn_v2_0_clock_gating_dpg_mode +ffffffff81ef6000 t vcn_v2_6_query_poison_status +ffffffff81ef60d0 t vcn_v2_5_early_init +ffffffff81ef6410 t vcn_v2_5_sw_init +ffffffff81ef6890 t vcn_v2_5_sw_fini +ffffffff81ef6960 t vcn_v2_5_hw_init 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is_dsc_need_re_compute +ffffffff81f34970 t compute_mst_dsc_configs_for_link +ffffffff81f355b0 T pre_validate_dsc +ffffffff81f35b80 T dm_dp_mst_is_port_support_mode +ffffffff81f35db0 t amdgpu_dm_encoder_destroy +ffffffff81f35dc0 t dm_dp_add_mst_connector +ffffffff81f35fb0 t amdgpu_dm_mst_connector_late_register +ffffffff81f36000 t amdgpu_dm_mst_connector_early_unregister +ffffffff81f360a0 t dm_dp_mst_connector_destroy +ffffffff81f36120 t dm_dp_mst_get_modes +ffffffff81f36550 t dm_dp_mst_detect +ffffffff81f366e0 t dm_mst_atomic_best_encoder +ffffffff81f36740 t dm_dp_mst_atomic_check +ffffffff81f36770 t set_dsc_configs_from_fairness_vars +ffffffff81f37000 T amd_get_format_info +ffffffff81f37020 T fill_blending_from_plane_state +ffffffff81f370d0 T fill_plane_buffer_attributes +ffffffff81f37640 T dm_plane_helper_check_state +ffffffff81f37860 T fill_dc_scaling_info +ffffffff81f37ac0 T handle_cursor_update +ffffffff81f37d40 T amdgpu_dm_plane_init +ffffffff81f38ac0 t dm_drm_plane_reset +ffffffff81f38b50 t dm_drm_plane_duplicate_state +ffffffff81f38be0 t dm_drm_plane_destroy_state +ffffffff81f38c20 t dm_plane_format_mod_supported +ffffffff81f38d50 t dm_plane_helper_prepare_fb +ffffffff81f39000 t dm_plane_helper_cleanup_fb +ffffffff81f390a0 t dm_plane_atomic_check +ffffffff81f39170 t dm_plane_atomic_async_check +ffffffff81f391b0 t dm_plane_atomic_async_update +ffffffff81f39260 t amdgpu_bo_reserve +ffffffff81f39470 t amdgpu_bo_unreserve +ffffffff81f3a000 T dm_pp_apply_display_requirements +ffffffff81f3a1e0 T dm_pp_get_clock_levels_by_type +ffffffff81f3a520 T dm_pp_get_clock_levels_by_type_with_latency +ffffffff81f3a6e0 T dm_pp_get_clock_levels_by_type_with_voltage +ffffffff81f3a8a0 T dm_pp_notify_wm_clock_changes +ffffffff81f3a8f0 T dm_pp_apply_power_level_change_request +ffffffff81f3a920 T dm_pp_apply_clock_for_voltage_request +ffffffff81f3a9c0 T dm_pp_get_static_clocks +ffffffff81f3aa80 T dm_pp_get_funcs +ffffffff81f3ab90 t pp_rv_set_wm_ranges +ffffffff81f3ace0 t pp_rv_set_pme_wa_enable +ffffffff81f3ad00 t pp_rv_set_active_display_count +ffffffff81f3ad20 t pp_rv_set_min_deep_sleep_dcfclk +ffffffff81f3ad40 t pp_rv_set_hard_min_dcefclk_by_freq +ffffffff81f3ad60 t pp_rv_set_hard_min_fclk_by_freq +ffffffff81f3ad80 t pp_nv_set_display_count +ffffffff81f3ade0 t pp_nv_set_hard_min_dcefclk_by_freq +ffffffff81f3ae50 t pp_nv_set_min_deep_sleep_dcfclk +ffffffff81f3aeb0 t pp_nv_set_voltage_by_freq +ffffffff81f3af40 t pp_nv_set_wm_ranges +ffffffff81f3af90 t pp_nv_set_hard_min_uclk_by_freq +ffffffff81f3b000 t pp_nv_get_maximum_sustainable_clocks +ffffffff81f3b060 t pp_nv_get_uclk_dpm_states +ffffffff81f3b0c0 t pp_nv_set_pstate_handshake_support +ffffffff81f3b110 t pp_rn_set_wm_ranges +ffffffff81f3b160 t pp_rn_get_dpm_clock_table +ffffffff81f3c000 T amdgpu_dm_set_psr_caps +ffffffff81f3c110 T amdgpu_dm_link_setup_psr +ffffffff81f3c290 T amdgpu_dm_psr_enable +ffffffff81f3c390 T amdgpu_dm_psr_disable +ffffffff81f3c410 T amdgpu_dm_psr_disable_all +ffffffff81f3d000 T dm_get_elapse_time_in_ns +ffffffff81f3d030 T dm_perf_trace_timestamp +ffffffff81f3e000 T dc_assert_fp_enabled +ffffffff81f3e070 T dc_fpu_begin +ffffffff81f3e0c0 T dc_fpu_end +ffffffff81f3f000 T dal_vector_construct +ffffffff81f3f0d0 T dal_vector_presized_create +ffffffff81f3f350 T dal_vector_create +ffffffff81f3f470 T dal_vector_destruct +ffffffff81f3f4c0 T dal_vector_destroy +ffffffff81f3f540 T dal_vector_get_count +ffffffff81f3f570 T dal_vector_at_index +ffffffff81f3f5b0 T dal_vector_remove_at_index +ffffffff81f3f640 T dal_vector_set_at_index +ffffffff81f3f6a0 T dal_vector_insert_at +ffffffff81f3f7a0 T dal_vector_reserve +ffffffff81f3f850 T dal_vector_append +ffffffff81f3f950 T dal_vector_clone +ffffffff81f3fa00 T dal_vector_capacity +ffffffff81f3fa30 T dal_vector_clear +ffffffff81f40000 T fixed_point_to_int_frac +ffffffff81f40200 T convert_float_matrix +ffffffff81f402c0 T reduce_fraction +ffffffff81f41000 T is_rgb_cspace +ffffffff81f41080 T is_lower_pipe_tree_visible +ffffffff81f410e0 T is_upper_pipe_tree_visible +ffffffff81f41140 T is_pipe_tree_visible +ffffffff81f411c0 T build_prescale_params +ffffffff81f42000 T dc_fixpt_from_fraction +ffffffff81f421d0 T dc_fixpt_mul +ffffffff81f42380 T dc_fixpt_sqr +ffffffff81f424f0 T dc_fixpt_recip +ffffffff81f42560 T dc_fixpt_sinc +ffffffff81f42750 T dc_fixpt_sin +ffffffff81f42780 T dc_fixpt_cos +ffffffff81f42870 T dc_fixpt_exp +ffffffff81f42b70 t fixed31_32_exp_from_taylor_series +ffffffff81f42f50 T dc_fixpt_log +ffffffff81f43160 T dc_fixpt_u4d19 +ffffffff81f431a0 T dc_fixpt_u3d19 +ffffffff81f431e0 T dc_fixpt_u2d19 +ffffffff81f43220 T dc_fixpt_u0d19 +ffffffff81f43250 T dc_fixpt_clamp_u0d14 +ffffffff81f432a0 T dc_fixpt_clamp_u0d10 +ffffffff81f432f0 T dc_fixpt_s4d19 +ffffffff81f44000 T bios_parser_create +ffffffff81f453b0 t bios_parser_get_connectors_number +ffffffff81f45410 t bios_parser_get_connector_id +ffffffff81f454a0 t bios_parser_get_src_obj +ffffffff81f455b0 t bios_parser_get_i2c_info +ffffffff81f457d0 t bios_parser_get_hpd_info +ffffffff81f458b0 t bios_parser_get_device_tag +ffffffff81f45ab0 t bios_parser_get_spread_spectrum_info +ffffffff81f45db0 t bios_parser_get_ss_entry_number +ffffffff81f45fe0 t bios_parser_get_embedded_panel_info +ffffffff81f46530 t bios_parser_get_gpio_pin_info +ffffffff81f46650 t bios_parser_get_encoder_cap_info +ffffffff81f46750 t bios_parser_set_scratch_critical_state +ffffffff81f46760 t bios_parser_is_device_id_supported +ffffffff81f46820 t bios_parser_encoder_control +ffffffff81f46860 t bios_parser_transmitter_control +ffffffff81f468a0 t bios_parser_enable_crtc +ffffffff81f468f0 t bios_parser_adjust_pixel_clock +ffffffff81f46930 t bios_parser_set_pixel_clock +ffffffff81f46970 t bios_parser_set_dce_clock +ffffffff81f469b0 t bios_parser_enable_spread_spectrum_on_ppll +ffffffff81f46a00 t bios_parser_program_crtc_timing +ffffffff81f46a40 t bios_parser_program_display_engine_pll +ffffffff81f46a80 t bios_parser_enable_disp_power_gating +ffffffff81f46ac0 t bios_parser_destroy +ffffffff81f46b80 t bios_get_board_layout_info +ffffffff81f46e10 t get_bios_object +ffffffff81f46fe0 t get_ss_info_from_ss_info_table +ffffffff81f471a0 t get_ss_entry_number_from_ss_info_tbl +ffffffff81f48000 T firmware_parser_create +ffffffff81f49de0 t bios_parser_get_connectors_number +ffffffff81f49f70 t bios_parser_get_connector_id +ffffffff81f4a000 t bios_parser_get_src_obj +ffffffff81f4a2a0 t bios_parser_get_i2c_info +ffffffff81f4a510 t bios_parser_get_hpd_info +ffffffff81f4a680 t bios_parser_get_device_tag +ffffffff81f4a950 t bios_parser_get_spread_spectrum_info +ffffffff81f4ad10 t bios_parser_get_ss_entry_number +ffffffff81f4ad40 t bios_parser_get_embedded_panel_info +ffffffff81f4af40 t bios_parser_get_gpio_pin_info +ffffffff81f4b060 t bios_parser_get_encoder_cap_info +ffffffff81f4b1d0 t bios_parser_is_accelerated_mode +ffffffff81f4b1e0 t bios_parser_set_scratch_critical_state +ffffffff81f4b1f0 t bios_parser_is_device_id_supported +ffffffff81f4b270 t bios_parser_encoder_control +ffffffff81f4b2b0 t bios_parser_transmitter_control +ffffffff81f4b2f0 t bios_parser_enable_crtc +ffffffff81f4b340 t bios_parser_set_pixel_clock +ffffffff81f4b380 t bios_parser_set_dce_clock +ffffffff81f4b3c0 t bios_parser_program_crtc_timing +ffffffff81f4b400 t bios_parser_enable_disp_power_gating +ffffffff81f4b440 t firmware_parser_destroy +ffffffff81f4b500 t bios_get_board_layout_info +ffffffff81f4b9b0 t bios_parser_pack_data_tables +ffffffff81f4b9e0 t bios_get_atom_dc_golden_table +ffffffff81f4bb20 t bios_parser_enable_lvtma_control +ffffffff81f4bb70 t bios_parser_get_soc_bb_info +ffffffff81f4bc80 t bios_parser_get_disp_connector_caps_info +ffffffff81f4bde0 t bios_parser_get_lttpr_caps +ffffffff81f4bf30 t bios_parser_get_lttpr_interop +ffffffff81f4c070 t bios_parser_get_connector_speed_cap_info +ffffffff81f4c1c0 t get_bios_object +ffffffff81f4c320 t get_bios_object_from_path_v3 +ffffffff81f4d000 T object_id_from_bios_object_id +ffffffff81f4e000 T bios_get_image +ffffffff81f4e050 T bios_is_accelerated_mode +ffffffff81f4e0b0 T bios_set_scratch_acc_mode_change +ffffffff81f4e0f0 T bios_set_scratch_critical_state +ffffffff81f4e130 T bios_get_vga_enabled_displays +ffffffff81f4f000 T dal_bios_parser_create +ffffffff81f4f070 T dal_bios_parser_destroy +ffffffff81f50000 T dal_bios_parser_init_cmd_tbl +ffffffff81f50800 t encoder_control_digx_v3 +ffffffff81f50900 t encoder_control_digx_v4 +ffffffff81f50a00 t encoder_control_digx_v5 +ffffffff81f50b50 t encoder_control_dig1_v1 +ffffffff81f50bd0 t encoder_control_dig2_v1 +ffffffff81f50c50 t encoder_control_dig_v1 +ffffffff81f50cb0 t transmitter_control_v2 +ffffffff81f50e50 t transmitter_control_v3 +ffffffff81f51010 t transmitter_control_v4 +ffffffff81f511c0 t transmitter_control_v1_5 +ffffffff81f51340 t transmitter_control_v1_6 +ffffffff81f514b0 t set_pixel_clock_v3 +ffffffff81f51620 t set_pixel_clock_v5 +ffffffff81f517c0 t set_pixel_clock_v6 +ffffffff81f51970 t set_pixel_clock_v7 +ffffffff81f51b40 t enable_spread_spectrum_on_ppll_v1 +ffffffff81f51c60 t enable_spread_spectrum_on_ppll_v2 +ffffffff81f51d90 t enable_spread_spectrum_on_ppll_v3 +ffffffff81f51ea0 t adjust_display_pll_v2 +ffffffff81f51ff0 t adjust_display_pll_v3 +ffffffff81f52160 t dac1_encoder_control_v1 +ffffffff81f521e0 t dac2_encoder_control_v1 +ffffffff81f52260 t dac1_output_control_v1 +ffffffff81f522c0 t dac2_output_control_v1 +ffffffff81f52320 t set_crtc_using_dtd_timing_v3 +ffffffff81f52490 t set_crtc_timing_v1 +ffffffff81f52630 t enable_crtc_v1 +ffffffff81f526d0 t enable_crtc_mem_req_v1 +ffffffff81f52770 t program_clock_v5 +ffffffff81f52870 t program_clock_v6 +ffffffff81f52990 t external_encoder_control_v3 +ffffffff81f52b40 t enable_disp_power_gating_v2_1 +ffffffff81f52c00 t set_dce_clock_v2_1 +ffffffff81f53000 T dal_firmware_parser_init_cmd_tbl +ffffffff81f533d0 t encoder_control_digx_v1_5 +ffffffff81f535b0 t encoder_control_fallback +ffffffff81f53610 t transmitter_control_v1_6 +ffffffff81f537c0 t transmitter_control_v1_7 +ffffffff81f539b0 t transmitter_control_fallback +ffffffff81f53a10 t set_pixel_clock_v7 +ffffffff81f53c70 t set_pixel_clock_fallback +ffffffff81f53cd0 t set_crtc_using_dtd_timing_v3 +ffffffff81f53e40 t enable_crtc_v1 +ffffffff81f53ee0 t external_encoder_control_v3 +ffffffff81f53f10 t enable_disp_power_gating_v2_1 +ffffffff81f54070 t enable_disp_power_gating_fallback +ffffffff81f540d0 t set_dce_clock_v2_1 +ffffffff81f541f0 t get_smu_clock_info_v3_1 +ffffffff81f54260 t enable_lvtma_control +ffffffff81f55000 T dal_bios_parser_init_cmd_tbl_helper +ffffffff81f550a0 T dal_cmd_table_helper_controller_id_to_atom +ffffffff81f551c0 T dal_cmd_table_helper_transmitter_bp_to_atom +ffffffff81f55240 T dal_cmd_table_helper_encoder_mode_bp_to_atom +ffffffff81f552d0 T dal_cmd_table_helper_assign_control_parameter +ffffffff81f55390 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src +ffffffff81f55470 T dal_cmd_table_helper_encoder_id_to_atom +ffffffff81f56000 T dal_bios_parser_init_cmd_tbl_helper2 +ffffffff81f560b0 T dal_cmd_table_helper_controller_id_to_atom2 +ffffffff81f561c0 T dal_cmd_table_helper_transmitter_bp_to_atom2 +ffffffff81f56240 T dal_cmd_table_helper_encoder_mode_bp_to_atom2 +ffffffff81f562d0 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src2 +ffffffff81f563b0 T dal_cmd_table_helper_encoder_id_to_atom2 +ffffffff81f57000 T dal_cmd_tbl_helper_dce110_get_table ffffffff81f57030 t encoder_action_to_atom ffffffff81f570b0 t engine_bp_to_atom ffffffff81f57100 t clock_source_id_to_atom -ffffffff81f571d0 t clock_source_id_to_atom_phy_clk_src_id -ffffffff81f57220 t signal_type_to_atom_dig_mode -ffffffff81f57280 t hpd_sel_to_atom -ffffffff81f572c0 t dig_encoder_sel_to_atom -ffffffff81f572f0 t phy_id_to_atom -ffffffff81f57330 t disp_power_gating_action_to_atom -ffffffff81f573a0 t dc_clock_type_to_atom -ffffffff81f57420 t transmitter_color_depth_to_atom -ffffffff81f58000 T dal_cmd_tbl_helper_dce112_get_table +ffffffff81f571a0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff81f571f0 t signal_type_to_atom_dig_mode +ffffffff81f57250 t hpd_sel_to_atom +ffffffff81f57290 t dig_encoder_sel_to_atom +ffffffff81f572c0 t phy_id_to_atom +ffffffff81f57300 t disp_power_gating_action_to_atom +ffffffff81f58000 T dal_cmd_tbl_helper_dce112_get_table2 ffffffff81f58030 t encoder_action_to_atom ffffffff81f580b0 t engine_bp_to_atom ffffffff81f58100 t clock_source_id_to_atom @@ -29361,7 +29357,7 @@ ffffffff81f582f0 t phy_id_to_atom ffffffff81f58330 t disp_power_gating_action_to_atom ffffffff81f583a0 t dc_clock_type_to_atom ffffffff81f58420 t transmitter_color_depth_to_atom -ffffffff81f59000 T dal_cmd_tbl_helper_dce80_get_table +ffffffff81f59000 T dal_cmd_tbl_helper_dce112_get_table ffffffff81f59030 t encoder_action_to_atom ffffffff81f590b0 t engine_bp_to_atom ffffffff81f59100 t clock_source_id_to_atom @@ -29369,25453 +29365,25466 @@ ffffffff81f591d0 t clock_source_id_to_atom_phy_clk_src ffffffff81f59220 t signal_type_to_atom_dig_mode ffffffff81f59280 t hpd_sel_to_atom ffffffff81f592c0 t dig_encoder_sel_to_atom -ffffffff81f59310 t phy_id_to_atom -ffffffff81f59350 t disp_power_gating_action_to_atom -ffffffff81f5a000 T clk_mgr_helper_get_active_display_cnt -ffffffff81f5a0e0 T clk_mgr_helper_get_active_plane_cnt -ffffffff81f5a190 T clk_mgr_exit_optimized_pwr_state -ffffffff81f5a290 T clk_mgr_optimize_pwr_state -ffffffff81f5a3a0 T dc_clk_mgr_create -ffffffff81f5aa80 T dc_destroy_clk_mgr -ffffffff81f5b000 T dentist_get_divider_from_did -ffffffff81f5b070 T dce_adjust_dp_ref_freq_for_ss -ffffffff81f5b180 T dce_get_dp_ref_freq_khz -ffffffff81f5b2b0 T dce12_get_dp_ref_freq_khz -ffffffff81f5b2d0 T dce_get_max_pixel_clock_for_all_paths -ffffffff81f5b4e0 T dce_get_required_clocks_state -ffffffff81f5b590 T dce_set_clock -ffffffff81f5b6f0 T dce_clock_read_ss_info -ffffffff81f5b830 T dce_clk_mgr_construct -ffffffff81f5ba20 t dce_update_clocks -ffffffff81f5c000 T dce110_get_min_vblank_time_us -ffffffff81f5c080 T dce110_fill_display_configs -ffffffff81f5c2e0 T dce11_pplib_apply_display_requirements -ffffffff81f5c5d0 T dce110_clk_mgr_construct -ffffffff81f5c680 t dce11_update_clocks -ffffffff81f5d000 T dce112_set_clock -ffffffff81f5d1a0 T dce112_set_dispclk -ffffffff81f5d2d0 T dce112_set_dprefclk -ffffffff81f5d340 T dce112_clk_mgr_construct -ffffffff81f5d3f0 t dce112_update_clocks -ffffffff81f5e000 T dce120_clk_mgr_construct -ffffffff81f5e090 T dce121_clk_mgr_construct -ffffffff81f5e1c0 t dce12_update_clocks -ffffffff81f5f000 T rv1_clk_mgr_construct -ffffffff81f5f0c0 t rv1_update_clocks -ffffffff81f5f5b0 t rv1_init_clocks -ffffffff81f5f640 t rv1_enable_pme_wa -ffffffff81f60000 T rv1_vbios_smu_set_dispclk -ffffffff81f600f0 t rv1_vbios_smu_send_msg_with_param -ffffffff81f60200 T rv1_vbios_smu_set_dprefclk -ffffffff81f61000 T rv2_clk_mgr_construct -ffffffff81f62000 T dentist_get_did_from_divider -ffffffff81f62090 T dcn20_update_clocks_update_dpp_dto -ffffffff81f62160 T dcn20_update_clocks_update_dentist -ffffffff81f62680 T dcn2_update_clocks -ffffffff81f62bf0 T dcn2_read_clocks_from_hw_dentist -ffffffff81f62cc0 T dcn2_update_clocks_fpga -ffffffff81f62e40 T dcn2_init_clocks -ffffffff81f62ee0 T dcn2_get_clock -ffffffff81f62f50 T dcn20_clk_mgr_construct -ffffffff81f630a0 t dcn2_enable_pme_wa -ffffffff81f630f0 t dcn2_are_clock_states_equal -ffffffff81f63160 t dcn2_notify_link_rate_change -ffffffff81f64000 t dcn201_update_clocks -ffffffff81f64240 t dcn201_init_clocks -ffffffff81f642e0 T dcn201_clk_mgr_construct -ffffffff81f65000 T rn_clk_mgr_construct -ffffffff81f658e0 t rn_update_clocks -ffffffff81f65e80 t rn_set_low_power_state -ffffffff81f66050 t rn_init_clocks -ffffffff81f660f0 t rn_enable_pme_wa -ffffffff81f66100 t rn_are_clock_states_equal -ffffffff81f66150 t rn_notify_wm_ranges -ffffffff81f664e0 t rn_notify_link_rate_change -ffffffff81f67000 T rn_vbios_smu_get_smu_version -ffffffff81f67020 t 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clk_mgr_helper_get_active_display_cnt +ffffffff81f5b0e0 T clk_mgr_helper_get_active_plane_cnt +ffffffff81f5b190 T clk_mgr_exit_optimized_pwr_state +ffffffff81f5b290 T clk_mgr_optimize_pwr_state +ffffffff81f5b3a0 T dc_clk_mgr_create +ffffffff81f5ba80 T dc_destroy_clk_mgr +ffffffff81f5c000 T dentist_get_divider_from_did +ffffffff81f5c070 T dce_adjust_dp_ref_freq_for_ss +ffffffff81f5c180 T dce_get_dp_ref_freq_khz +ffffffff81f5c2b0 T dce12_get_dp_ref_freq_khz +ffffffff81f5c2d0 T dce_get_max_pixel_clock_for_all_paths +ffffffff81f5c4e0 T dce_get_required_clocks_state +ffffffff81f5c590 T dce_set_clock +ffffffff81f5c6f0 T dce_clock_read_ss_info +ffffffff81f5c830 T dce_clk_mgr_construct +ffffffff81f5ca20 t dce_update_clocks +ffffffff81f5d000 T dce110_get_min_vblank_time_us +ffffffff81f5d080 T dce110_fill_display_configs +ffffffff81f5d2e0 T dce11_pplib_apply_display_requirements +ffffffff81f5d5d0 T dce110_clk_mgr_construct +ffffffff81f5d680 t dce11_update_clocks +ffffffff81f5e000 T dce112_set_clock +ffffffff81f5e1a0 T dce112_set_dispclk +ffffffff81f5e2d0 T dce112_set_dprefclk +ffffffff81f5e340 T dce112_clk_mgr_construct +ffffffff81f5e3f0 t dce112_update_clocks +ffffffff81f5f000 T dce120_clk_mgr_construct +ffffffff81f5f090 T dce121_clk_mgr_construct +ffffffff81f5f1c0 t dce12_update_clocks +ffffffff81f60000 T rv1_clk_mgr_construct +ffffffff81f600c0 t rv1_update_clocks +ffffffff81f605b0 t rv1_init_clocks +ffffffff81f60640 t rv1_enable_pme_wa +ffffffff81f61000 T rv1_vbios_smu_set_dispclk +ffffffff81f610f0 t rv1_vbios_smu_send_msg_with_param +ffffffff81f61200 T rv1_vbios_smu_set_dprefclk +ffffffff81f62000 T rv2_clk_mgr_construct +ffffffff81f63000 T dentist_get_did_from_divider +ffffffff81f63090 T dcn20_update_clocks_update_dpp_dto +ffffffff81f63160 T dcn20_update_clocks_update_dentist +ffffffff81f63680 T dcn2_update_clocks +ffffffff81f63bf0 T dcn2_read_clocks_from_hw_dentist +ffffffff81f63cc0 T dcn2_update_clocks_fpga +ffffffff81f63e40 T dcn2_init_clocks +ffffffff81f63ee0 T dcn2_get_clock +ffffffff81f63f50 T dcn20_clk_mgr_construct +ffffffff81f640a0 t dcn2_enable_pme_wa +ffffffff81f640f0 t dcn2_are_clock_states_equal +ffffffff81f64160 t dcn2_notify_link_rate_change +ffffffff81f65000 t dcn201_update_clocks +ffffffff81f65240 t dcn201_init_clocks +ffffffff81f652e0 T dcn201_clk_mgr_construct +ffffffff81f66000 T rn_clk_mgr_construct +ffffffff81f668e0 t rn_update_clocks +ffffffff81f66e80 t rn_set_low_power_state +ffffffff81f67050 t rn_init_clocks +ffffffff81f670f0 t rn_enable_pme_wa +ffffffff81f67100 t rn_are_clock_states_equal +ffffffff81f67150 t rn_notify_wm_ranges +ffffffff81f674e0 t rn_notify_link_rate_change +ffffffff81f68000 T rn_vbios_smu_get_smu_version +ffffffff81f68020 t rn_vbios_smu_send_msg_with_param +ffffffff81f681b0 T rn_vbios_smu_set_dispclk +ffffffff81f682f0 T rn_vbios_smu_set_dprefclk +ffffffff81f68360 T rn_vbios_smu_set_hard_min_dcfclk +ffffffff81f683e0 T rn_vbios_smu_set_min_deep_sleep_dcfclk +ffffffff81f68460 T rn_vbios_smu_set_phyclk +ffffffff81f684a0 T rn_vbios_smu_set_dppclk +ffffffff81f68560 T rn_vbios_smu_set_dcn_low_power_state +ffffffff81f68580 T rn_vbios_smu_enable_48mhz_tmdp_refclk_pwrdwn +ffffffff81f685a0 T rn_vbios_smu_enable_pme_wa +ffffffff81f685c0 T rn_vbios_smu_is_periodic_retraining_disabled +ffffffff81f69000 T dcn3_init_clocks +ffffffff81f693d0 t dcn3_init_clocks_fpga +ffffffff81f693e0 T dcn3_clk_mgr_construct +ffffffff81f69540 T dcn3_clk_mgr_destroy +ffffffff81f695b0 t dcn3_update_clocks +ffffffff81f69a10 t dcn3_enable_pme_wa +ffffffff81f69a50 t dcn3_are_clock_states_equal +ffffffff81f69ab0 t dcn3_notify_wm_ranges +ffffffff81f69d40 t dcn30_notify_link_rate_change +ffffffff81f69e60 t dcn3_set_hard_min_memclk +ffffffff81f69f00 t dcn3_set_hard_max_memclk +ffffffff81f69f60 t dcn3_set_max_memclk +ffffffff81f69fa0 t dcn3_set_min_memclk +ffffffff81f69fe0 t dcn3_get_memclk_states_from_smu +ffffffff81f6a120 t dcn3_is_smu_present +ffffffff81f6b000 T dcn30_smu_test_message +ffffffff81f6b070 t dcn30_smu_send_msg_with_param +ffffffff81f6b1d0 T dcn30_smu_get_smu_version +ffffffff81f6b1f0 T dcn30_smu_check_driver_if_version +ffffffff81f6b240 T dcn30_smu_check_msg_header_version +ffffffff81f6b290 T dcn30_smu_set_dram_addr_high +ffffffff81f6b2b0 T dcn30_smu_set_dram_addr_low +ffffffff81f6b2d0 T dcn30_smu_transfer_wm_table_smu_2_dram +ffffffff81f6b2f0 T dcn30_smu_transfer_wm_table_dram_2_smu +ffffffff81f6b310 T dcn30_smu_set_hard_min_by_freq +ffffffff81f6b360 T dcn30_smu_set_hard_max_by_freq +ffffffff81f6b3b0 T dcn30_smu_get_dpm_freq_by_index +ffffffff81f6b400 T dcn30_smu_get_dc_mode_max_dpm_freq +ffffffff81f6b450 T dcn30_smu_set_min_deep_sleep_dcef_clk +ffffffff81f6b470 T dcn30_smu_set_num_of_displays +ffffffff81f6b490 T dcn30_smu_set_display_refresh_from_mall +ffffffff81f6b4c0 T dcn30_smu_set_external_client_df_cstate_allow +ffffffff81f6b4e0 T dcn30_smu_set_pme_workaround +ffffffff81f6c000 T dcn301_smu_get_smu_version +ffffffff81f6c070 t dcn301_smu_send_msg_with_param +ffffffff81f6c1f0 T dcn301_smu_set_dispclk +ffffffff81f6c290 T dcn301_smu_set_dprefclk +ffffffff81f6c340 T dcn301_smu_set_hard_min_dcfclk +ffffffff81f6c3e0 T dcn301_smu_set_min_deep_sleep_dcfclk +ffffffff81f6c480 T dcn301_smu_set_dppclk +ffffffff81f6c520 T dcn301_smu_set_display_idle_optimization +ffffffff81f6c570 T dcn301_smu_enable_phy_refclk_pwrdwn +ffffffff81f6c5c0 T dcn301_smu_enable_pme_wa +ffffffff81f6c5e0 T dcn301_smu_set_dram_addr_high +ffffffff81f6c630 T dcn301_smu_set_dram_addr_low +ffffffff81f6c680 T dcn301_smu_transfer_dpm_table_smu_2_dram +ffffffff81f6c6a0 T dcn301_smu_transfer_wm_table_dram_2_smu +ffffffff81f6d000 T vg_clk_mgr_construct +ffffffff81f6d7f0 T vg_clk_mgr_destroy +ffffffff81f6d840 t vg_update_clocks +ffffffff81f6dbd0 t vg_init_clocks +ffffffff81f6dc70 t vg_enable_pme_wa +ffffffff81f6dc80 t vg_are_clock_states_equal +ffffffff81f6dcd0 t vg_notify_wm_ranges +ffffffff81f6f000 T dcn31_update_clocks +ffffffff81f6f620 T dcn31_init_clocks +ffffffff81f6f6d0 T dcn31_are_clock_states_equal +ffffffff81f6f730 T dcn31_get_dtb_ref_freq_khz +ffffffff81f6f760 T dcn31_clk_mgr_construct +ffffffff81f6fdd0 T dcn31_clk_mgr_destroy +ffffffff81f6fe20 t dcn31_set_low_power_state +ffffffff81f70000 t dcn31_enable_pme_wa +ffffffff81f70010 t dcn31_notify_wm_ranges +ffffffff81f703b0 t find_clk_for_voltage +ffffffff81f71000 T dcn31_smu_get_smu_version +ffffffff81f71020 t dcn31_smu_send_msg_with_param +ffffffff81f71220 T dcn31_smu_set_dispclk +ffffffff81f71290 T dcn31_smu_set_dprefclk +ffffffff81f71300 T dcn31_smu_set_hard_min_dcfclk +ffffffff81f71380 T dcn31_smu_set_min_deep_sleep_dcfclk +ffffffff81f71400 T dcn31_smu_set_dppclk +ffffffff81f71470 T dcn31_smu_set_display_idle_optimization +ffffffff81f714c0 T dcn31_smu_enable_phy_refclk_pwrdwn +ffffffff81f71510 T dcn31_smu_enable_pme_wa +ffffffff81f71550 T dcn31_smu_set_dram_addr_high +ffffffff81f71590 T dcn31_smu_set_dram_addr_low +ffffffff81f715d0 T dcn31_smu_transfer_dpm_table_smu_2_dram +ffffffff81f71610 T dcn31_smu_transfer_wm_table_dram_2_smu +ffffffff81f71650 T dcn31_smu_set_zstate_support +ffffffff81f716c0 T dcn31_smu_set_dtbclk +ffffffff81f72000 T dcn314_update_clocks +ffffffff81f726d0 T dcn314_are_clock_states_equal +ffffffff81f72730 T dcn314_clk_mgr_construct +ffffffff81f73440 T dcn314_clk_mgr_destroy +ffffffff81f73490 t dcn314_enable_pme_wa +ffffffff81f734a0 t dcn314_notify_wm_ranges +ffffffff81f74000 T dcn314_smu_get_smu_version +ffffffff81f74020 t dcn314_smu_send_msg_with_param +ffffffff81f74240 T dcn314_smu_set_dispclk +ffffffff81f742b0 T dcn314_smu_set_dprefclk +ffffffff81f74320 T dcn314_smu_set_hard_min_dcfclk +ffffffff81f743a0 T dcn314_smu_set_min_deep_sleep_dcfclk +ffffffff81f74420 T dcn314_smu_set_dppclk +ffffffff81f74490 T dcn314_smu_set_display_idle_optimization +ffffffff81f744e0 T dcn314_smu_enable_phy_refclk_pwrdwn +ffffffff81f74530 T dcn314_smu_enable_pme_wa +ffffffff81f74570 T dcn314_smu_set_dram_addr_high +ffffffff81f745b0 T dcn314_smu_set_dram_addr_low +ffffffff81f745f0 T dcn314_smu_transfer_dpm_table_smu_2_dram +ffffffff81f74630 T dcn314_smu_transfer_wm_table_dram_2_smu +ffffffff81f74670 T dcn314_smu_set_zstate_support +ffffffff81f746c0 T dcn314_smu_set_dtbclk +ffffffff81f75000 T dcn315_clk_mgr_construct +ffffffff81f759c0 T dcn315_clk_mgr_destroy +ffffffff81f75a10 t dcn315_update_clocks +ffffffff81f76000 t dcn315_enable_pme_wa +ffffffff81f76010 t dcn315_notify_wm_ranges +ffffffff81f77000 T dcn315_smu_get_smu_version +ffffffff81f77020 t dcn315_smu_send_msg_with_param +ffffffff81f771b0 T dcn315_smu_set_dispclk +ffffffff81f77220 T dcn315_smu_set_hard_min_dcfclk +ffffffff81f772a0 T dcn315_smu_set_min_deep_sleep_dcfclk +ffffffff81f77320 T dcn315_smu_set_dppclk +ffffffff81f77390 T dcn315_smu_set_display_idle_optimization +ffffffff81f773e0 T dcn315_smu_enable_phy_refclk_pwrdwn +ffffffff81f77430 T dcn315_smu_enable_pme_wa +ffffffff81f77470 T dcn315_smu_set_dram_addr_high +ffffffff81f774b0 T dcn315_smu_set_dram_addr_low +ffffffff81f774f0 T dcn315_smu_transfer_dpm_table_smu_2_dram +ffffffff81f77530 T dcn315_smu_transfer_wm_table_dram_2_smu +ffffffff81f77570 T dcn315_smu_get_dpref_clk +ffffffff81f775d0 T dcn315_smu_get_dtbclk +ffffffff81f77630 T dcn315_smu_set_dtbclk +ffffffff81f78000 T dcn316_clk_mgr_construct +ffffffff81f786a0 T dcn316_clk_mgr_destroy +ffffffff81f786f0 t dcn316_update_clocks +ffffffff81f78d20 t dcn316_enable_pme_wa +ffffffff81f78d30 t dcn316_notify_wm_ranges +ffffffff81f790c0 t find_clk_for_voltage +ffffffff81f7a000 T dcn316_smu_get_smu_version +ffffffff81f7a020 t dcn316_smu_send_msg_with_param +ffffffff81f7a1b0 T dcn316_smu_set_dispclk +ffffffff81f7a220 T dcn316_smu_set_hard_min_dcfclk +ffffffff81f7a2a0 T dcn316_smu_set_min_deep_sleep_dcfclk +ffffffff81f7a320 T dcn316_smu_set_dppclk +ffffffff81f7a390 T dcn316_smu_set_display_idle_optimization +ffffffff81f7a3e0 T dcn316_smu_enable_phy_refclk_pwrdwn +ffffffff81f7a430 T dcn316_smu_set_dram_addr_high +ffffffff81f7a470 T dcn316_smu_set_dram_addr_low +ffffffff81f7a4b0 T dcn316_smu_transfer_dpm_table_smu_2_dram +ffffffff81f7a4f0 T dcn316_smu_transfer_wm_table_dram_2_smu +ffffffff81f7a530 T dcn316_smu_enable_pme_wa +ffffffff81f7a570 T dcn316_smu_set_dtbclk +ffffffff81f7a5b0 T dcn316_smu_get_dpref_clk +ffffffff81f7a610 T dcn316_smu_get_smu_fclk +ffffffff81f7b000 T dcn32_init_clocks +ffffffff81f7b4e0 T dcn32_clk_mgr_construct +ffffffff81f7b770 T dcn32_clk_mgr_destroy +ffffffff81f7b7e0 t dcn32_update_clocks +ffffffff81f7bf30 t dcn32_dump_clk_registers +ffffffff81f7c150 t dcn32_enable_pme_wa +ffffffff81f7c190 t dcn32_are_clock_states_equal +ffffffff81f7c200 t dcn32_notify_wm_ranges +ffffffff81f7c380 t dcn32_set_hard_min_memclk +ffffffff81f7c420 t dcn32_set_hard_max_memclk +ffffffff81f7c480 t dcn32_get_memclk_states_from_smu +ffffffff81f7c670 t dcn32_is_smu_present +ffffffff81f7d000 T dcn32_smu_send_fclk_pstate_message +ffffffff81f7d020 t dcn32_smu_send_msg_with_param +ffffffff81f7d160 T dcn32_smu_send_cab_for_uclk_message +ffffffff81f7d190 T dcn32_smu_transfer_wm_table_dram_2_smu +ffffffff81f7d1b0 T dcn32_smu_set_pme_workaround +ffffffff81f7d1d0 T dcn32_smu_set_hard_min_by_freq +ffffffff81f7e000 T dc_stream_adjust_vmin_vmax +ffffffff81f7e180 T dc_stream_get_last_used_drr_vtotal +ffffffff81f7e2e0 T dc_stream_get_crtc_position +ffffffff81f7e510 T dc_stream_configure_crc +ffffffff81f7e760 T dc_stream_get_crc +ffffffff81f7e840 T dc_stream_set_dyn_expansion +ffffffff81f7eab0 T dc_stream_set_dither_option +ffffffff81f7ec20 T dc_stream_set_gamut_remap +ffffffff81f7eda0 T dc_stream_program_csc_matrix +ffffffff81f7efc0 T dc_stream_set_static_screen_params +ffffffff81f7f150 T dc_create +ffffffff81f7faf0 t dc_construct_ctx +ffffffff81f7fc50 t dc_destruct +ffffffff81f7ff20 T dc_hardware_init +ffffffff81f80030 T dc_init_callbacks +ffffffff81f80060 T dc_deinit_callbacks +ffffffff81f80090 T dc_destroy +ffffffff81f800e0 T dc_validate_boot_timing +ffffffff81f80470 T dc_enable_stereo +ffffffff81f80570 T dc_trigger_sync +ffffffff81f80b90 T dc_z10_restore +ffffffff81f80bd0 T dc_z10_save_init +ffffffff81f80c10 T dc_commit_state +ffffffff81f80d40 t dc_commit_state_no_check +ffffffff81f821c0 T dc_acquire_release_mpc_3dlut +ffffffff81f822b0 T dc_post_update_surfaces_to_stream +ffffffff81f826c0 T dc_create_state +ffffffff81f82750 T dc_copy_state +ffffffff81f82940 T dc_retain_state +ffffffff81f82970 T dc_release_state +ffffffff81f829e0 T dc_set_generic_gpio_for_stereo +ffffffff81f82af0 T dc_check_update_surfaces_for_stream +ffffffff81f83760 T dc_dmub_update_dirty_rect +ffffffff81f839f0 T dc_update_planes_and_stream +ffffffff81f84140 t commit_minimal_transition_state +ffffffff81f844d0 t commit_planes_for_stream +ffffffff81f85bc0 T dc_commit_updates_for_stream +ffffffff81f85fc0 t copy_surface_update_to_plane +ffffffff81f863c0 t copy_stream_update_to_stream +ffffffff81f869f0 T dc_get_current_stream_count +ffffffff81f86a30 T dc_get_stream_at_index +ffffffff81f86a80 T dc_interrupt_to_irq_source +ffffffff81f86aa0 T dc_interrupt_set +ffffffff81f86af0 T dc_interrupt_ack +ffffffff81f86b10 T dc_power_down_on_boot +ffffffff81f86b60 T dc_set_power_state +ffffffff81f86d50 T dc_resume +ffffffff81f86dc0 T dc_is_dmcu_initialized +ffffffff81f86e10 T dc_is_oem_i2c_device_present +ffffffff81f86e60 T dc_submit_i2c +ffffffff81f86e90 T dc_submit_i2c_oem +ffffffff81f86ee0 T dc_link_add_remote_sink +ffffffff81f87070 T dc_link_remove_remote_sink +ffffffff81f87160 T get_clock_requirements_for_state +ffffffff81f871e0 T dc_set_clock +ffffffff81f87220 T dc_get_clock +ffffffff81f87260 T dc_set_psr_allow_active +ffffffff81f87360 T dc_allow_idle_optimizations +ffffffff81f87400 T dc_unlock_memory_clock_frequency +ffffffff81f87470 T dc_lock_memory_clock_frequency +ffffffff81f87500 T dc_enable_dcmode_clk_limit +ffffffff81f87610 t blank_and_force_memclk +ffffffff81f877f0 T dc_is_plane_eligible_for_idle_optimizations +ffffffff81f87840 T dc_hardware_release +ffffffff81f87890 T dc_mclk_switch_using_fw_based_vblank_stretch_shut_down +ffffffff81f878d0 T dc_is_dmub_outbox_supported +ffffffff81f87930 T dc_enable_dmub_notifications +ffffffff81f87990 T dc_enable_dmub_outbox +ffffffff81f879d0 T dc_process_dmub_aux_transfer_async +ffffffff81f87b70 T get_link_index_from_dpia_port_index +ffffffff81f87c20 T dc_process_dmub_set_config_async +ffffffff81f87d10 T dc_process_dmub_set_mst_slots +ffffffff81f87e00 T dc_process_dmub_dpia_hpd_int_enable +ffffffff81f87ed0 T dc_disable_accelerated_mode +ffffffff81f87ef0 T dc_notify_vsync_int_state +ffffffff81f88120 T dc_extended_blank_supported +ffffffff81f89000 T pre_surface_trace +ffffffff81f89030 T update_surface_trace +ffffffff81f89060 T post_surface_trace +ffffffff81f89090 T context_timing_trace +ffffffff81f89240 T context_clock_trace +ffffffff81f89270 T dc_status_to_str +ffffffff81f8a000 T find_color_matrix +ffffffff81f8a0b0 T color_space_to_black_color +ffffffff81f8a140 T hwss_wait_for_blank_complete +ffffffff81f8a1f0 T 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dce110_link_encoder_set_dp_phy_pattern_training_pattern +ffffffff81fce160 T dce110_psr_program_dp_dphy_fast_training +ffffffff81fce1d0 T dce110_psr_program_secondary_packet +ffffffff81fce240 T dce110_is_dig_enabled +ffffffff81fce2a0 T dce110_link_encoder_validate_dvi_output +ffffffff81fce350 T dce110_link_encoder_validate_dp_output +ffffffff81fce380 T dce110_link_encoder_construct +ffffffff81fce550 T dce110_link_encoder_validate_output_with_stream +ffffffff81fce700 T dce110_link_encoder_hw_init +ffffffff81fce920 T dce110_link_encoder_destroy +ffffffff81fce970 T dce110_link_encoder_setup +ffffffff81fceaa0 T dce110_link_encoder_enable_tmds_output +ffffffff81fceb90 T dce110_link_encoder_enable_lvds_output +ffffffff81fcec80 T dce110_link_encoder_enable_dp_output +ffffffff81fcee00 T dce110_link_encoder_enable_dp_mst_output +ffffffff81fcef80 T dce110_link_encoder_disable_output +ffffffff81fcf1a0 T dce110_link_encoder_dp_set_lane_settings +ffffffff81fcf340 T dce110_link_encoder_dp_set_phy_pattern +ffffffff81fcfb40 t set_dp_phy_pattern_hbr2_compliance_cp2520_2 +ffffffff81fcfd50 T dce110_link_encoder_update_mst_stream_allocation_table +ffffffff81fcffd0 T dce110_link_encoder_connect_dig_be_to_fe +ffffffff81fd0100 T dce110_link_encoder_enable_hpd +ffffffff81fd0130 T dce110_link_encoder_disable_hpd +ffffffff81fd0160 T dce110_link_encoder_get_max_link_cap +ffffffff81fd1000 T dce_mem_input_construct +ffffffff81fd1060 T dce112_mem_input_construct +ffffffff81fd10c0 T dce120_mem_input_construct +ffffffff81fd1120 t dce_mi_program_display_marks +ffffffff81fd13f0 t dce_mi_allocate_dmif +ffffffff81fd1630 t dce_mi_free_dmif +ffffffff81fd1790 t dce_mi_program_surface_flip_and_addr +ffffffff81fd1ab0 t dce_mi_program_pte_vm +ffffffff81fd1c70 t dce_mi_program_surface_config +ffffffff81fd24f0 t dce_mi_is_flip_pending +ffffffff81fd2580 t program_nbp_watermark +ffffffff81fd2780 t dce112_mi_program_display_marks +ffffffff81fd2c90 t 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dce_transform_construct +ffffffff81fdc1a0 t dce_transform_reset +ffffffff81fdc1e0 t dce_transform_set_scaler +ffffffff81fdcc80 t dce_transform_set_pixel_storage_depth +ffffffff81fdd140 t dce_transform_set_gamut_remap +ffffffff81fdd480 t program_multi_taps_filter +ffffffff81fde000 T dmub_abm_create +ffffffff81fde0c0 T dmub_abm_destroy +ffffffff81fde110 t dmub_abm_init +ffffffff81fde4f0 t dmub_abm_set_level +ffffffff81fde6b0 t dmub_abm_get_current_backlight +ffffffff81fde6e0 t dmub_abm_get_target_backlight +ffffffff81fde710 t dmub_abm_init_config +ffffffff81fde840 t dmub_abm_set_pause +ffffffff81fdf000 T dmub_hw_lock_mgr_cmd +ffffffff81fdf0b0 T dmub_hw_lock_mgr_inbox0_cmd +ffffffff81fdf0f0 T should_use_dmub_lock +ffffffff81fe0000 T dmub_enable_outbox_notification +ffffffff81fe1000 T dmub_psr_create +ffffffff81fe10a0 T dmub_psr_destroy +ffffffff81fe10f0 t dmub_psr_copy_settings +ffffffff81fe15a0 t dmub_psr_enable +ffffffff81fe1730 t dmub_psr_get_state +ffffffff81fe1a20 t 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dce112_compressor_program_compressed_surface_address_and_pitch +ffffffff81ff7b30 T dce112_compressor_program_lpt_control +ffffffff81ff7da0 T dce112_compressor_set_fbc_invalidation_triggers +ffffffff81ff7e30 T dce112_compressor_construct +ffffffff81ff7ef0 T dce112_compressor_create +ffffffff81ff7fe0 T dce112_compressor_destroy +ffffffff81ff9000 T dce112_hw_sequencer_construct +ffffffff81ff9050 t dce112_enable_display_power_gating +ffffffff81ffa000 T dce112_validate_bandwidth +ffffffff81ffa0c0 T resource_map_phy_clock_resources +ffffffff81ffa210 T dce112_add_stream_to_ctx +ffffffff81ffa2b0 T dce112_create_resource_pool +ffffffff81ffb650 t dce112_resource_destruct +ffffffff81ffb920 t dce112_destroy_resource_pool +ffffffff81ffb980 t dce112_panel_cntl_create +ffffffff81ffba10 t dce112_link_encoder_create +ffffffff81ffbb20 t dce112_validate_global +ffffffff81ffbbb0 t read_dce_straps +ffffffff81ffbc10 t create_audio +ffffffff81ffbc40 t dce112_stream_encoder_create +ffffffff81ffbce0 t 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+ffffffff8200a680 T dpp1_cm_configure_regamma_lut +ffffffff8200a780 T dpp1_cm_program_regamma_luta_settings +ffffffff8200a910 T dpp1_cm_program_regamma_lutb_settings +ffffffff8200aaa0 T dpp1_program_input_csc +ffffffff8200acf0 T dpp1_program_bias_and_scale +ffffffff8200ae60 T dpp1_program_degamma_lutb_settings +ffffffff8200b010 T dpp1_program_degamma_luta_settings +ffffffff8200b1c0 T dpp1_power_on_degamma_lut +ffffffff8200b240 T dpp1_set_degamma +ffffffff8200b430 T dpp1_degamma_ram_select +ffffffff8200b490 T dpp1_program_degamma_lut +ffffffff8200b7b0 T dpp1_set_degamma_pwl +ffffffff8200b980 T dpp1_full_bypass +ffffffff8200bb20 T dpp1_program_input_lut +ffffffff8200c1f0 T dpp1_set_hdr_multiplier +ffffffff8200d000 T dpp1_dscl_calc_lb_num_partitions +ffffffff8200d1e0 T dpp1_dscl_is_lb_conf_valid +ffffffff8200d220 T dpp1_dscl_set_scaler_manual_scale +ffffffff8200e5e0 t dpp1_dscl_get_filter_coeffs_64p +ffffffff8200e6b0 t dpp1_dscl_set_scaler_filter +ffffffff8200f000 T hubbub1_wm_read_state +ffffffff8200f380 T hubbub1_allow_self_refresh_control +ffffffff8200f400 T hubbub1_is_allow_self_refresh_enabled +ffffffff8200f470 T hubbub1_verify_allow_pstate_change_high +ffffffff8200f630 T hubbub1_wm_change_req_wa +ffffffff8200f6d0 T hubbub1_program_urgent_watermarks +ffffffff8200fab0 T hubbub1_program_stutter_watermarks +ffffffff8200ff10 T hubbub1_program_pstate_watermarks +ffffffff82010160 T hubbub1_program_watermarks +ffffffff82010290 T hubbub1_update_dchub +ffffffff820104c0 T hubbub1_toggle_watermark_change_req +ffffffff82010560 T hubbub1_soft_reset +ffffffff820105a0 T hubbub1_construct +ffffffff82010600 t hubbub1_get_dcc_compression_cap +ffffffff82010820 t hubbub1_dcc_support_swizzle +ffffffff820108b0 t hubbub1_dcc_support_pixel_format +ffffffff82011000 T hubp1_set_blank +ffffffff82011110 T hubp1_clear_underflow +ffffffff82011160 T hubp1_vready_workaround +ffffffff820111f0 T hubp1_program_tiling +ffffffff82011460 T hubp1_program_size +ffffffff820115f0 T hubp1_program_rotation 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hubp1_set_vm_context0_settings +ffffffff820156e0 t hubp1_set_hubp_blank_en +ffffffff82015720 t hubp1_disconnect +ffffffff820157b0 t hubp1_disable_control +ffffffff820157f0 t hubp1_get_underflow_status +ffffffff82015860 t hubp1_wait_pipe_read_start +ffffffff82016000 T dcn10_lock_all_pipes +ffffffff82016100 T dcn10_log_hw_state +ffffffff82017d10 T dcn10_did_underflow_occur +ffffffff82017db0 T dcn10_enable_power_gating_plane +ffffffff82017f50 T dcn10_disable_vga +ffffffff82018140 T dcn10_dpp_pg_control +ffffffff82018390 T dcn10_hubp_pg_control +ffffffff820185e0 T dcn10_bios_golden_init +ffffffff82018740 T dcn10_enable_stream_timing +ffffffff82018b30 T dcn10_verify_allow_pstate_change_high +ffffffff82018e90 T dcn10_plane_atomic_disconnect +ffffffff82018fc0 T dcn10_plane_atomic_power_down +ffffffff82019100 T dcn10_plane_atomic_disable +ffffffff82019260 T dcn10_disable_plane +ffffffff82019420 T dcn10_init_pipes +ffffffff82019b20 T dcn10_init_hw +ffffffff8201a110 T dcn10_power_down_on_boot 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+ffffffff8201d520 T dcn10_get_position +ffffffff8201d5b0 T dcn10_set_static_screen_control +ffffffff8201d650 T dcn10_setup_stereo +ffffffff8201d7b0 T dcn10_wait_for_mpcc_disconnect +ffffffff8201d960 T dcn10_dummy_display_power_gating +ffffffff8201d990 T dcn10_update_pending_status +ffffffff8201dad0 T dcn10_update_dchub +ffffffff8201db00 T dcn10_set_cursor_position +ffffffff8201e040 T dcn10_set_cursor_attribute +ffffffff8201e090 T dcn10_set_cursor_sdr_white_level +ffffffff8201e160 T dcn10_get_vupdate_offset_from_vsync +ffffffff8201e1f0 T dcn10_calc_vupdate_position +ffffffff8201e280 T dcn10_setup_periodic_interrupt +ffffffff8201e390 T dcn10_setup_vupdate_interrupt +ffffffff8201e450 T dcn10_unblank_stream +ffffffff8201e560 T dcn10_send_immediate_sdp_message +ffffffff8201e5c0 T dcn10_set_clock +ffffffff8201e6d0 T dcn10_get_clock +ffffffff8201e730 T dcn10_get_dcc_en_bits +ffffffff8201f000 T snprintf_count +ffffffff8201f090 T dcn10_clear_status_bits +ffffffff8201f240 T dcn10_get_hw_state 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dcn10_link_encoder_enable_tmds_output_with_clk_pattern_wa +ffffffff82023e60 T dcn10_link_encoder_enable_dp_output +ffffffff82023fe0 T dcn10_link_encoder_enable_dp_mst_output +ffffffff82024160 T dcn10_link_encoder_disable_output +ffffffff82024340 T dcn10_link_encoder_dp_set_lane_settings +ffffffff820244e0 T dcn10_link_encoder_dp_set_phy_pattern +ffffffff82024c00 t set_dp_phy_pattern_hbr2_compliance_cp2520_2 +ffffffff82024e00 T dcn10_link_encoder_update_mst_stream_allocation_table +ffffffff820250e0 T dcn10_link_encoder_connect_dig_be_to_fe +ffffffff82025220 T dcn10_link_encoder_enable_hpd +ffffffff82025260 T dcn10_link_encoder_disable_hpd +ffffffff820252a0 T dcn10_get_dig_mode +ffffffff82025310 T dcn10_link_encoder_get_max_link_cap +ffffffff82025390 t program_pattern_symbols +ffffffff82026000 T mpc1_set_bg_color +ffffffff820261e0 T mpc1_get_mpcc +ffffffff82026270 T mpc1_update_stereo_mix +ffffffff820263a0 T mpc1_assert_idle_mpcc +ffffffff82026470 T mpc1_get_mpcc_for_dpp +ffffffff82026520 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optc1_program_timing +ffffffff82029970 T optc1_is_two_pixels_per_containter +ffffffff820299c0 T optc1_set_vtg_params +ffffffff82029b00 T optc1_set_blank_data_double_buffer +ffffffff82029b40 T optc1_set_timing_double_buffer +ffffffff82029b80 T optc1_set_blank +ffffffff82029c60 T optc1_is_blanked +ffffffff82029ce0 T optc1_enable_optc_clock +ffffffff82029f00 T optc1_disable_crtc +ffffffff82029ff0 T optc1_program_blank_color +ffffffff8202a0a0 T optc1_validate_timing +ffffffff8202a1a0 T optc1_get_vblank_counter +ffffffff8202a200 T optc1_lock +ffffffff8202a2f0 T optc1_unlock +ffffffff8202a360 T optc1_get_position +ffffffff8202a3e0 T optc1_is_counter_moving +ffffffff8202a460 T optc1_did_triggered_reset_occur +ffffffff8202a500 T optc1_disable_reset_trigger +ffffffff8202a5c0 T optc1_enable_reset_trigger +ffffffff8202a6d0 T optc1_enable_crtc_reset +ffffffff8202a830 T optc1_wait_for_state +ffffffff8202a900 T optc1_set_early_control +ffffffff8202a930 T optc1_set_static_screen_control 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dcn10_resource_destruct +ffffffff8202e6f0 t dcn10_destroy_resource_pool +ffffffff8202e750 t dcn10_panel_cntl_create +ffffffff8202e7e0 t dcn10_link_encoder_create +ffffffff8202e8e0 t dcn10_validate_bandwidth +ffffffff8202e960 t dcn10_validate_global +ffffffff8202eb40 t dcn10_acquire_idle_pipe_for_layer +ffffffff8202ec80 t dcn10_validate_plane +ffffffff8202ecd0 t dcn10_add_stream_to_ctx +ffffffff8202ee90 t dcn10_patch_unknown_plane_state +ffffffff8202eef0 t read_dce_straps +ffffffff8202ef20 t create_audio +ffffffff8202ef50 t dcn10_stream_encoder_create +ffffffff8202eff0 t dcn10_hwseq_create +ffffffff8202f0a0 t dcn10_get_dcc_compression_cap +ffffffff82030000 T enc1_update_generic_info_packet +ffffffff82030430 T enc1_stream_encoder_dp_set_stream_attribute +ffffffff82030900 T enc1_stream_encoder_set_stream_attribute_helper +ffffffff82030980 T enc1_stream_encoder_hdmi_set_stream_attribute +ffffffff82030f70 T enc1_stream_encoder_dvi_set_stream_attribute +ffffffff82031100 T enc1_stream_encoder_set_throttled_vcp_size +ffffffff82031320 T enc1_stream_encoder_update_dp_info_packets +ffffffff820314c0 T enc1_stream_encoder_send_immediate_sdp_message +ffffffff820318d0 T enc1_stream_encoder_stop_dp_info_packets +ffffffff82031aa0 T enc1_stream_encoder_dp_blank +ffffffff82031c10 T enc1_stream_encoder_dp_unblank +ffffffff82031e20 T enc1_stream_encoder_set_avmute +ffffffff82031e60 T enc1_reset_hdmi_stream_attribute +ffffffff82031f30 T get_audio_clock_info +ffffffff82032020 T enc1_se_enable_audio_clock +ffffffff82032080 T enc1_se_enable_dp_audio +ffffffff82032150 T enc1_se_audio_mute_control +ffffffff820321a0 T enc1_se_dp_audio_setup +ffffffff820321b0 t enc1_se_audio_setup +ffffffff82032340 T enc1_se_dp_audio_enable +ffffffff82032590 T enc1_se_dp_audio_disable +ffffffff82032700 T enc1_se_hdmi_audio_setup +ffffffff82032bd0 T enc1_se_hdmi_audio_disable +ffffffff82032c60 T enc1_setup_stereo_sync +ffffffff82032ce0 T enc1_dig_connect_to_otg +ffffffff82032d20 T enc1_dig_source_otg +ffffffff82032d90 T enc1_stream_encoder_dp_get_pixel_format +ffffffff82032e80 T dcn10_stream_encoder_construct +ffffffff82032ee0 t enc1_stream_encoder_update_hdmi_info_packets +ffffffff82033290 t enc1_stream_encoder_stop_hdmi_info_packets +ffffffff82034000 T dccg2_update_dpp_dto +ffffffff82034160 T dccg2_get_dccg_ref_freq +ffffffff82034220 T dccg2_set_fifo_errdet_ovr_en +ffffffff82034260 T dccg2_otg_add_pixel +ffffffff82034300 T dccg2_otg_drop_pixel +ffffffff820343a0 T dccg2_init +ffffffff820343d0 T dccg2_create +ffffffff82034480 T dcn_dccg_destroy +ffffffff82035000 T dpp20_read_state +ffffffff820351d0 T dpp2_power_on_obuf +ffffffff820352a0 T dpp2_dummy_program_input_lut +ffffffff820352d0 T dscl2_calc_lb_num_partitions +ffffffff820353f0 T dpp2_cnv_set_alpha_keyer +ffffffff82035670 T dpp2_set_cursor_attributes +ffffffff820357d0 T oppn20_dummy_program_regamma_pwl +ffffffff82035800 T dpp2_construct +ffffffff82035880 t dpp2_cnv_setup +ffffffff82037000 T dpp2_set_degamma_pwl +ffffffff820373b0 T dpp2_set_degamma +ffffffff82037560 T dpp2_cm_set_gamut_remap +ffffffff82037790 T dpp2_program_input_csc +ffffffff820379c0 T dpp20_program_blnd_lut +ffffffff82038110 T dpp20_program_shaper +ffffffff8203a0a0 T dpp20_program_3dlut +ffffffff8203a7a0 t dpp20_set3dlut_ram12 +ffffffff8203a970 T dpp2_set_hdr_multiplier +ffffffff8203b000 t dsc2_get_enc_caps +ffffffff8203b080 t dsc2_read_state +ffffffff8203b230 t dsc2_validate_stream +ffffffff8203b290 t dsc2_set_config +ffffffff8203c620 t dsc2_get_packed_pps +ffffffff8203c7c0 t dsc2_enable +ffffffff8203c970 t dsc2_disable +ffffffff8203caf0 t dsc2_disconnect +ffffffff8203cb60 T dsc2_construct +ffffffff8203cbb0 t dsc_prepare_config +ffffffff8203d270 t dsc_log_pps +ffffffff8203e000 T dwb2_config_dwb_cnv +ffffffff8203e1f0 T dwb2_disable +ffffffff8203e300 T dwb2_is_enabled +ffffffff8203e3a0 T dwb2_set_stereo +ffffffff8203e490 T dwb2_set_new_content +ffffffff8203e500 T dwb2_set_scaler +ffffffff8203e890 t dwb2_get_caps +ffffffff8203e970 t dwb2_enable +ffffffff8203ead0 t dwb2_update +ffffffff8203ec30 t dwb2_set_warmup +ffffffff8203eda0 T dcn20_dwbc_construct +ffffffff8203f000 T dwb_program_horz_scalar +ffffffff8203f4c0 t wbscl_get_filter_coeffs_16p +ffffffff8203f990 t wbscl_set_scaler_filter +ffffffff8203fba0 T dwb_program_vert_scalar +ffffffff82041000 T hubbub2_dcc_support_swizzle +ffffffff820410c0 T hubbub2_dcc_support_pixel_format +ffffffff82041110 T hubbub2_get_dcc_compression_cap +ffffffff82041350 T hubbub2_init_vm_ctx +ffffffff820414a0 T hubbub2_init_dchub_sys_ctx +ffffffff820416f0 T hubbub2_update_dchub +ffffffff820418f0 T hubbub2_wm_read_state +ffffffff82041c80 T hubbub2_get_dchub_ref_freq +ffffffff82041d60 T hubbub2_read_state +ffffffff82041eb0 T hubbub2_construct +ffffffff82041f10 t hubbub2_program_watermarks +ffffffff82043000 T hubp2_set_vm_system_aperture_settings +ffffffff820431e0 T hubp2_program_deadline +ffffffff82043930 T hubp2_vready_at_or_After_vsync +ffffffff820439d0 T hubp2_setup_interdependent +ffffffff82043e40 T hubp2_program_size +ffffffff82043fd0 T hubp2_program_rotation +ffffffff82044140 T hubp2_dcc_control +ffffffff82044200 T hubp2_program_pixel_format +ffffffff820447d0 T hubp2_program_surface_config +ffffffff82044a10 T hubp2_get_lines_per_chunk +ffffffff82044ad0 T hubp2_cursor_set_attributes +ffffffff82044e90 T hubp2_dmdata_set_attributes +ffffffff82045270 T hubp2_dmdata_load +ffffffff82045300 T hubp2_dmdata_status_done +ffffffff82045370 T hubp2_program_surface_flip_and_addr +ffffffff82045ac0 T hubp2_enable_triplebuffer +ffffffff82045b90 T hubp2_is_triplebuffer_enabled +ffffffff82045c10 T hubp2_set_flip_control_surface_gsl +ffffffff82045c60 T hubp2_is_flip_pending +ffffffff82045d70 T hubp2_set_blank +ffffffff82045dd0 T hubp2_set_blank_regs +ffffffff82045ed0 T hubp2_cursor_set_position +ffffffff820462f0 T hubp2_clk_cntl +ffffffff82046340 T hubp2_vtg_sel +ffffffff82046380 T hubp2_clear_underflow +ffffffff820463d0 T hubp2_read_state_common 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hubp3_set_vm_system_aperture_settings +ffffffff8208a130 T hubp3_program_surface_flip_and_addr +ffffffff8208ab60 T hubp3_dcc_control +ffffffff8208ac20 T hubp3_dcc_control_sienna_cichlid +ffffffff8208ad30 T hubp3_dmdata_set_attributes +ffffffff8208af30 T hubp3_program_surface_config +ffffffff8208b230 T hubp3_read_state +ffffffff8208b4a0 T hubp3_setup +ffffffff8208b530 T hubp3_init +ffffffff8208b560 T hubp3_construct +ffffffff8208c000 T dcn30_set_blend_lut +ffffffff8208c070 T dcn30_set_input_transfer_func +ffffffff8208c1d0 T dcn30_set_output_transfer_func +ffffffff8208c4f0 T dcn30_update_writeback +ffffffff8208c580 t dcn30_set_writeback +ffffffff8208c730 T dcn30_mmhubbub_warmup +ffffffff8208c9e0 T dcn30_enable_writeback +ffffffff8208cab0 T dcn30_disable_writeback +ffffffff8208cb90 T dcn30_program_all_writeback_pipes_in_tree +ffffffff8208ce80 T dcn30_init_hw +ffffffff8208d770 T dcn30_set_avmute +ffffffff8208d7d0 T dcn30_update_info_frame +ffffffff8208d8a0 T dcn30_program_dmdata_engine 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mpc3_set_gamut_remap +ffffffff82094a10 T mpc3_program_3dlut +ffffffff820951a0 t mpc3_set3dlut_ram12 +ffffffff82095380 T mpc3_set_output_csc +ffffffff820954f0 T mpc3_set_ocsc_default +ffffffff82095660 T mpc3_set_rmu_mux +ffffffff82095700 T mpc3_get_rmu_mux_status +ffffffff820957b0 T mpcc3_acquire_rmu +ffffffff82095910 t mpcc3_release_rmu +ffffffff82095a80 t mpc3_set_mpc_mem_lp_mode +ffffffff82095c10 T dcn30_mpc_construct +ffffffff82096000 T optc3_triplebuffer_lock +ffffffff82096120 T optc3_lock_doublebuffer_enable +ffffffff820963b0 T optc3_lock_doublebuffer_disable +ffffffff820964c0 T optc3_lock +ffffffff82096590 T optc3_set_out_mux +ffffffff820965d0 T optc3_program_blank_color +ffffffff82096710 T optc3_set_drr_trigger_window +ffffffff820967a0 T optc3_set_vtotal_change_limit +ffffffff82096810 T optc3_set_dsc_config +ffffffff82096860 T optc3_set_odm_bypass +ffffffff820969e0 T optc3_wait_drr_doublebuffer_pending_clear +ffffffff82096a60 T optc3_set_vtotal_min_max +ffffffff82096a80 T optc3_tg_init +ffffffff82096ae0 T dcn30_timing_generator_init +ffffffff82096b50 t optc3_set_odm_combine +ffffffff82097000 T dcn30_add_stream_to_ctx +ffffffff82097020 T dcn30_populate_dml_pipes_from_context +ffffffff82097110 T dcn30_populate_dml_writeback_from_context +ffffffff82097170 T dcn30_calc_max_scaled_time +ffffffff820971d0 T dcn30_set_mcif_arb_params +ffffffff82097340 T dcn30_acquire_post_bldn_3dlut +ffffffff820974c0 T dcn30_release_post_bldn_3dlut +ffffffff82097570 T dcn30_internal_validate_bw +ffffffff82098350 t dcn30_split_stream_for_mpc_or_odm +ffffffff82098670 T dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff82098790 T dcn30_setup_mclk_switch_using_fw_based_vblank_stretch +ffffffff82098830 T dcn30_update_soc_for_wm_a +ffffffff82098880 T dcn30_calculate_wm_and_dlg +ffffffff820988f0 T dcn30_validate_bandwidth +ffffffff82098d20 T dcn30_update_bw_bounding_box +ffffffff82099500 T dcn30_create_resource_pool +ffffffff8209aac0 t dcn30_resource_destruct +ffffffff8209b030 t dcn30_destroy_resource_pool +ffffffff8209b090 t dcn30_panel_cntl_create +ffffffff8209b120 t dcn30_link_encoder_create +ffffffff8209b1e0 t read_dce_straps +ffffffff8209b210 t dcn30_create_audio +ffffffff8209b240 t dcn30_stream_encoder_create +ffffffff8209b3c0 t dcn30_hwseq_create +ffffffff8209c000 T vpg3_update_generic_info_packet +ffffffff8209c9a0 T vpg3_construct +ffffffff8209d000 T dccg301_create +ffffffff8209e000 T dcn301_link_encoder_construct +ffffffff8209f000 T hubbub301_construct +ffffffff820a0000 T dcn301_hw_sequencer_construct +ffffffff820a1000 T dcn301_panel_cntl_construct +ffffffff820a1050 t dcn301_panel_cntl_destroy +ffffffff820a10a0 t dcn301_panel_cntl_hw_init +ffffffff820a12b0 t dcn301_is_panel_backlight_on +ffffffff820a1310 t dcn301_is_panel_powered_on +ffffffff820a13c0 t dcn301_store_backlight_level +ffffffff820a1460 t dcn301_get_16_bit_backlight_from_pwm +ffffffff820a2000 T dcn301_create_resource_pool +ffffffff820a35a0 t dcn301_destruct +ffffffff820a3ae0 t dcn301_destroy_resource_pool +ffffffff820a3b40 t dcn301_panel_cntl_create +ffffffff820a3bd0 t dcn301_link_encoder_create +ffffffff820a3c90 t dcn301_calculate_wm_and_dlg +ffffffff820a3d00 t read_dce_straps +ffffffff820a3d30 t dcn301_create_audio +ffffffff820a3d60 t dcn301_stream_encoder_create +ffffffff820a3ee0 t dcn301_hwseq_create +ffffffff820a4000 T dcn302_dpp_pg_control +ffffffff820a42a0 T dcn302_hubp_pg_control +ffffffff820a4550 T dcn302_dsc_pg_control +ffffffff820a5000 T dcn302_hw_sequencer_construct +ffffffff820a6000 T dcn302_update_bw_bounding_box +ffffffff820a6050 T dcn302_create_resource_pool +ffffffff820a73e0 t dcn302_resource_destruct +ffffffff820a78f0 t dcn302_destroy_resource_pool +ffffffff820a7940 t dcn302_panel_cntl_create +ffffffff820a79d0 t dcn302_link_encoder_create +ffffffff820a7a90 t read_dce_straps +ffffffff820a7ac0 t dcn302_create_audio +ffffffff820a7af0 t dcn302_stream_encoder_create +ffffffff820a7c70 t dcn302_hwseq_create +ffffffff820a8000 T dcn303_dpp_pg_control +ffffffff820a8030 T dcn303_hubp_pg_control +ffffffff820a8060 T dcn303_dsc_pg_control +ffffffff820a8090 T dcn303_enable_power_gating_plane +ffffffff820a9000 T dcn303_hw_sequencer_construct +ffffffff820aa000 T dcn303_update_bw_bounding_box +ffffffff820aa050 T dcn303_create_resource_pool +ffffffff820ab290 t dcn303_resource_destruct +ffffffff820ab7b0 t dcn303_destroy_resource_pool +ffffffff820ab800 t dcn303_panel_cntl_create +ffffffff820ab890 t dcn303_link_encoder_create +ffffffff820ab950 t read_dce_straps +ffffffff820ab980 t dcn303_create_audio +ffffffff820ab9b0 t dcn303_stream_encoder_create +ffffffff820abb30 t dcn303_hwseq_create +ffffffff820ac000 T afmt31_powerdown +ffffffff820ac090 T afmt31_poweron +ffffffff820ac120 T afmt31_construct +ffffffff820ad000 T apg31_construct +ffffffff820ad050 t apg31_se_audio_setup +ffffffff820ad160 t apg31_audio_mute_control +ffffffff820ad1a0 t apg31_enable +ffffffff820ad2b0 t apg31_disable +ffffffff820ae000 T dccg31_update_dpp_dto +ffffffff820ae1c0 T dccg31_set_dpstreamclk +ffffffff820ae350 t dccg31_disable_dpstreamclk +ffffffff820ae4a0 T dccg31_enable_symclk32_se +ffffffff820ae790 T dccg31_disable_symclk32_se +ffffffff820aea60 T dccg31_enable_symclk32_le +ffffffff820aec30 T dccg31_disable_symclk32_le +ffffffff820aedd0 T dccg31_disable_dscclk +ffffffff820aef90 T dccg31_enable_dscclk +ffffffff820af160 T dccg31_set_physymclk +ffffffff820af680 T dccg31_set_dtbclk_dto +ffffffff820af930 T dccg31_set_audio_dtbclk_dto +ffffffff820afa40 T dccg31_get_dccg_ref_freq +ffffffff820afa70 T dccg31_set_dispclk_change_mode +ffffffff820afac0 T dccg31_init +ffffffff820b0020 T dccg31_otg_add_pixel +ffffffff820b0060 T dccg31_otg_drop_pixel +ffffffff820b00a0 T dccg31_create +ffffffff820b1000 T dcn31_link_encoder_set_dio_phy_mux +ffffffff820b1390 T dcn31_link_encoder_construct +ffffffff820b1590 T dcn31_link_encoder_construct_minimal +ffffffff820b1610 T dcn31_link_encoder_enable_dp_output +ffffffff820b1850 T dcn31_link_encoder_enable_dp_mst_output +ffffffff820b1a90 T dcn31_link_encoder_disable_output +ffffffff820b1d20 T dcn31_link_encoder_is_in_alt_mode +ffffffff820b1e60 T dcn31_link_encoder_get_max_link_cap +ffffffff820b1fd0 t enc31_hw_init +ffffffff820b3000 T dcn31_hpo_dp_link_enc_enable +ffffffff820b3160 T dcn31_hpo_dp_link_enc_disable +ffffffff820b31d0 T dcn31_hpo_dp_link_enc_set_link_test_pattern +ffffffff820b3b00 T dcn31_hpo_dp_link_enc_update_stream_allocation_table +ffffffff820b3d90 T dcn31_hpo_dp_link_enc_set_throttled_vcp_size +ffffffff820b4030 T dcn31_hpo_dp_link_enc_read_state +ffffffff820b42e0 T dcn31_hpo_dp_link_enc_enable_dp_output +ffffffff820b43e0 T dcn31_hpo_dp_link_enc_disable_output +ffffffff820b4520 T dcn31_hpo_dp_link_enc_set_ffe +ffffffff820b4610 T hpo_dp_link_encoder31_construct +ffffffff820b4670 t dcn31_hpo_dp_link_enc_is_in_alt_mode +ffffffff820b5000 T dcn31_hpo_dp_stream_encoder_construct +ffffffff820b5070 t dcn31_hpo_dp_stream_enc_enable_stream +ffffffff820b51b0 t dcn31_hpo_dp_stream_enc_dp_unblank +ffffffff820b5460 t dcn31_hpo_dp_stream_enc_dp_blank +ffffffff820b5560 t dcn31_hpo_dp_stream_enc_disable +ffffffff820b55d0 t dcn31_hpo_dp_stream_enc_set_stream_attribute +ffffffff820b5e80 t dcn31_hpo_dp_stream_enc_update_dp_info_packets +ffffffff820b6040 t dcn31_hpo_dp_stream_enc_stop_dp_info_packets +ffffffff820b61d0 t dcn31_hpo_dp_stream_enc_set_dsc_pps_info_packet +ffffffff820b6470 t dcn31_hpo_dp_stream_enc_map_stream_to_link +ffffffff820b6570 t dcn31_hpo_dp_stream_enc_mute_control +ffffffff820b65e0 t dcn31_hpo_dp_stream_enc_audio_setup +ffffffff820b6690 t dcn31_hpo_dp_stream_enc_audio_enable +ffffffff820b6760 t dcn31_hpo_dp_stream_enc_audio_disable +ffffffff820b6910 t dcn31_hpo_dp_stream_enc_read_state +ffffffff820b6aa0 t dcn31_set_hblank_min_symbol_width +ffffffff820b7000 T hubbub31_init_dchub_sys_ctx +ffffffff820b71f0 T hubbub31_construct +ffffffff820b7290 t hubbub31_get_dcc_compression_cap +ffffffff820b7480 t hubbub31_get_dchub_ref_freq +ffffffff820b7560 t hubbub31_program_watermarks +ffffffff820b8e20 t hubbub31_verify_allow_pstate_change_high +ffffffff820b8fe0 t dcn31_program_det_size +ffffffff820b91a0 t dcn31_program_compbuf_size +ffffffff820b9420 t dcn31_init_crb +ffffffff820ba000 T hubp31_set_unbounded_requesting +ffffffff820ba090 T hubp31_soft_reset +ffffffff820ba0e0 T hubp31_construct +ffffffff820ba150 t hubp31_program_extended_blank +ffffffff820bb000 T dcn31_init_hw +ffffffff820bb960 T dcn31_dsc_pg_control +ffffffff820bbcb0 T dcn31_enable_power_gating_plane +ffffffff820bbf10 T dcn31_update_info_frame +ffffffff820bbfe0 T dcn31_z10_save_init +ffffffff820bc0a0 T dcn31_z10_restore +ffffffff820bc180 T dcn31_hubp_pg_control +ffffffff820bc4a0 T dcn31_init_sys_ctx +ffffffff820bc550 T dcn31_reset_hw_ctx_wrap +ffffffff820bc8c0 T dcn31_setup_hpo_hw_control +ffffffff820bd000 T dcn31_hw_sequencer_construct +ffffffff820be000 T optc31_immediate_disable_crtc +ffffffff820be100 T optc31_set_drr +ffffffff820be320 T optc3_init_odm +ffffffff820be490 T dcn31_timing_generator_init +ffffffff820be500 t optc31_enable_crtc +ffffffff820be600 t optc31_disable_crtc +ffffffff820be6e0 t optc31_set_odm_combine +ffffffff820bf000 T dcn31_panel_cntl_construct +ffffffff820bf040 t dcn31_panel_cntl_destroy +ffffffff820bf090 t dcn31_panel_cntl_hw_init +ffffffff820bf180 t dcn31_is_panel_backlight_on +ffffffff820bf220 t dcn31_is_panel_powered_on +ffffffff820bf2d0 t dcn31_store_backlight_level +ffffffff820bf390 t dcn31_get_16_bit_backlight_from_pwm +ffffffff820c0000 T dcn31_populate_dml_pipes_from_context +ffffffff820c0350 T dcn31_calculate_wm_and_dlg +ffffffff820c03d0 T dcn31_populate_dml_writeback_from_context +ffffffff820c0430 T dcn31_set_mcif_arb_params +ffffffff820c0490 T dcn31_validate_bandwidth +ffffffff820c0870 T dcn31_create_resource_pool +ffffffff820c1c10 t dcn31_resource_destruct +ffffffff820c2270 t dcn31_destroy_resource_pool +ffffffff820c22d0 t dcn31_panel_cntl_create +ffffffff820c2340 t dcn31_link_encoder_create +ffffffff820c2400 t dcn31_link_enc_create_minimal +ffffffff820c24a0 t dcn31_get_panel_config_defaults +ffffffff820c2510 t read_dce_straps +ffffffff820c2540 t dcn31_create_audio +ffffffff820c2570 t dcn31_stream_encoder_create +ffffffff820c26f0 t dcn31_hpo_dp_stream_encoder_create +ffffffff820c28b0 t dcn31_hpo_dp_link_encoder_create +ffffffff820c2940 t dcn31_hwseq_create +ffffffff820c3000 T vpg31_powerdown +ffffffff820c3090 T vpg31_poweron +ffffffff820c3120 T vpg31_construct +ffffffff820c4000 T dccg314_create +ffffffff820c40b0 t dccg314_set_dpstreamclk +ffffffff820c4480 t dccg314_set_dtbclk_dto +ffffffff820c4670 t dccg314_set_pixel_rate_div +ffffffff820c49e0 t dccg314_set_valid_pixel_rate +ffffffff820c5000 T dcn314_dio_stream_encoder_construct +ffffffff820c5070 t enc314_stream_encoder_hdmi_set_stream_attribute +ffffffff820c5660 t enc314_stream_encoder_dvi_set_stream_attribute +ffffffff820c5870 t enc314_stream_encoder_dp_blank +ffffffff820c58c0 t enc314_stream_encoder_dp_unblank +ffffffff820c5c00 t enc314_read_state +ffffffff820c5d60 t enc314_dp_set_dsc_config +ffffffff820c5db0 t enc314_dp_set_odm_combine +ffffffff820c5df0 t enc314_set_dig_input_mode +ffffffff820c5e40 t enc314_enable_fifo +ffffffff820c5ee0 t enc314_disable_fifo +ffffffff820c5f30 t enc314_reset_fifo +ffffffff820c7000 T dcn314_update_odm +ffffffff820c7610 T dcn314_dsc_pg_control +ffffffff820c79e0 T dcn314_enable_power_gating_plane +ffffffff820c7c70 T dcn314_calculate_dccg_k1_k2_values +ffffffff820c7e00 T dcn314_set_pixels_per_cycle +ffffffff820c7ef0 T dcn314_hubp_pg_control +ffffffff820c9000 T dcn314_hw_sequencer_construct +ffffffff820ca000 T dcn314_timing_generator_init +ffffffff820ca070 t optc314_enable_crtc +ffffffff820ca170 t optc314_disable_crtc +ffffffff820ca250 t optc314_phantom_crtc_post_enable +ffffffff820ca310 t optc314_set_odm_bypass +ffffffff820ca480 t optc314_set_odm_combine +ffffffff820ca780 t optc314_set_h_timing_div_manual_mode +ffffffff820cb000 T dcn314_create_resource_pool +ffffffff820cc2d0 t dcn314_resource_destruct +ffffffff820cc930 t dcn314_destroy_resource_pool +ffffffff820cc990 t dcn31_panel_cntl_create +ffffffff820cca00 t dcn31_link_encoder_create +ffffffff820ccac0 t dcn31_link_enc_create_minimal +ffffffff820ccb60 t dcn314_populate_dml_pipes_from_context +ffffffff820ccbf0 t dcn314_update_bw_bounding_box +ffffffff820ccc40 t dcn314_get_panel_config_defaults +ffffffff820cccb0 t read_dce_straps +ffffffff820ccce0 t dcn31_create_audio +ffffffff820ccd10 t dcn314_stream_encoder_create +ffffffff820cce90 t dcn31_hpo_dp_stream_encoder_create +ffffffff820cd050 t dcn31_hpo_dp_link_encoder_create +ffffffff820cd0e0 t dcn314_hwseq_create +ffffffff820ce000 T dcn315_create_resource_pool +ffffffff820cf270 t dcn315_resource_destruct +ffffffff820cf8d0 t dcn315_destroy_resource_pool +ffffffff820cf930 t dcn31_panel_cntl_create +ffffffff820cf9a0 t dcn31_link_encoder_create +ffffffff820cfa60 t dcn31_link_enc_create_minimal +ffffffff820cfb00 t dcn315_populate_dml_pipes_from_context +ffffffff820cfe50 t dcn315_get_panel_config_defaults +ffffffff820cfec0 t read_dce_straps +ffffffff820cfef0 t dcn31_create_audio +ffffffff820cff20 t dcn315_stream_encoder_create +ffffffff820d00a0 t dcn31_hpo_dp_stream_encoder_create +ffffffff820d0260 t dcn31_hpo_dp_link_encoder_create +ffffffff820d02f0 t dcn31_hwseq_create +ffffffff820d1000 T dcn316_create_resource_pool +ffffffff820d22b0 t dcn316_resource_destruct +ffffffff820d2910 t dcn316_destroy_resource_pool +ffffffff820d2970 t dcn31_panel_cntl_create +ffffffff820d29e0 t dcn31_link_encoder_create +ffffffff820d2aa0 t dcn31_link_enc_create_minimal +ffffffff820d2b40 t dcn316_populate_dml_pipes_from_context +ffffffff820d2e70 t dcn316_get_panel_config_defaults +ffffffff820d2ee0 t read_dce_straps +ffffffff820d2f10 t dcn31_create_audio +ffffffff820d2f40 t dcn316_stream_encoder_create +ffffffff820d30c0 t dcn31_hpo_dp_stream_encoder_create +ffffffff820d3280 t dcn31_hpo_dp_link_encoder_create +ffffffff820d3310 t dcn31_hwseq_create +ffffffff820d4000 T dccg32_create +ffffffff820d40b0 t dccg32_get_dccg_ref_freq +ffffffff820d40e0 t dccg32_otg_add_pixel +ffffffff820d4120 t dccg32_otg_drop_pixel +ffffffff820d4160 t dccg32_set_dpstreamclk +ffffffff820d4530 t dccg32_set_dtbclk_dto +ffffffff820d4730 t dccg32_set_pixel_rate_div +ffffffff820d4aa0 t dccg32_set_valid_pixel_rate +ffffffff820d5000 T enc32_hw_init +ffffffff820d5090 T dcn32_link_encoder_enable_dp_output +ffffffff820d50e0 T dcn32_link_encoder_construct +ffffffff820d52c0 t dcn32_link_encoder_is_in_alt_mode +ffffffff820d5340 t dcn32_link_encoder_get_max_link_cap +ffffffff820d6000 T dcn32_dio_stream_encoder_construct +ffffffff820d6070 t enc32_stream_encoder_hdmi_set_stream_attribute +ffffffff820d65a0 t enc32_stream_encoder_dvi_set_stream_attribute +ffffffff820d6720 t enc32_stream_encoder_dp_unblank +ffffffff820d6be0 t enc32_read_state +ffffffff820d6d40 t enc32_dp_set_dsc_config +ffffffff820d6d90 t enc32_dp_set_odm_combine +ffffffff820d6dd0 t enc32_set_dig_input_mode +ffffffff820d7000 T dpp32_construct +ffffffff820d7060 t dscl32_calc_lb_num_partitions +ffffffff820d8000 T hpo_dp_link_encoder32_construct +ffffffff820d8060 t dcn32_hpo_dp_link_enc_is_in_alt_mode +ffffffff820d9000 T dcn32_program_det_size +ffffffff820d91a0 T hubbub32_program_urgent_watermarks +ffffffff820d9910 T hubbub32_program_stutter_watermarks +ffffffff820d9d60 T hubbub32_program_pstate_watermarks +ffffffff820da1f0 T hubbub32_program_usr_watermarks +ffffffff820da440 T hubbub32_force_usr_retraining_allow +ffffffff820da4c0 T hubbub32_force_wm_propagate_to_pipes +ffffffff820da560 T hubbub32_construct +ffffffff820da5e0 t hubbub32_wm_read_state +ffffffff820daa60 t hubbub32_program_watermarks +ffffffff820dab70 t hubbub32_init_watermarks +ffffffff820dafb0 t dcn32_program_compbuf_size +ffffffff820db230 t dcn32_init_crb +ffffffff820dc000 T hubp32_update_force_pstate_disallow +ffffffff820dc090 T hubp32_update_mall_sel +ffffffff820dc120 T hubp32_prepare_subvp_buffering +ffffffff820dc1c0 T hubp32_phantom_hubp_post_enable +ffffffff820dc2d0 T hubp32_cursor_set_attributes +ffffffff820dc590 T hubp32_construct +ffffffff820dd000 T dcn32_dsc_pg_control +ffffffff820dd310 T dcn32_enable_power_gating_plane +ffffffff820dd4b0 T dcn32_hubp_pg_control +ffffffff820dd720 T dcn32_apply_idle_power_optimizations +ffffffff820dd990 t dcn32_calculate_cab_allocation +ffffffff820ddd40 T dcn32_commit_subvp_config +ffffffff820dddf0 T dcn32_subvp_pipe_control_lock +ffffffff820ddfc0 T dcn32_set_mcm_luts +ffffffff820de150 T dcn32_set_input_transfer_func +ffffffff820de290 T dcn32_set_output_transfer_func +ffffffff820de4a0 T dcn32_subvp_update_force_pstate +ffffffff820de610 T dcn32_update_mall_sel +ffffffff820de790 T dcn32_program_mall_pipe_config +ffffffff820de870 T dcn32_init_hw +ffffffff820df060 T dcn32_update_odm +ffffffff820df670 T dcn32_calculate_dccg_k1_k2_values +ffffffff820df870 T dcn32_is_dp_dig_pixel_rate_div_policy +ffffffff820df900 T dcn32_set_pixels_per_cycle +ffffffff820dfa40 T dcn32_unblank_stream +ffffffff820dfc10 T dcn32_disable_link_output +ffffffff820dfea0 T dcn32_update_phantom_vp_position +ffffffff820dffc0 T dcn32_dsc_pg_status +ffffffff820e00a0 T dcn32_update_dsc_pg +ffffffff820e1000 T dcn32_hw_sequencer_init_functions +ffffffff820e2000 t mmhubbub32_warmup_mcif +ffffffff820e2210 t mmhubbub32_config_mcif_buf +ffffffff820e26c0 t mmhubbub32_config_mcif_arb +ffffffff820e2ad0 T dcn32_mmhubbub_construct +ffffffff820e3000 t mpc32_mpc_init +ffffffff820e3220 t mpc32_program_post1dlut +ffffffff820e3d00 t mpc32_program_shaper +ffffffff820e5fb0 t mpc32_program_3dlut +ffffffff820e68a0 T dcn32_mpc_construct +ffffffff820e6960 t mpc32_power_on_shaper_3dlut +ffffffff820e6b90 t mpc32_set3dlut_ram12 +ffffffff820e7000 T dcn32_timing_generator_init +ffffffff820e7070 t optc32_enable_crtc +ffffffff820e7170 t optc32_disable_crtc +ffffffff820e7250 t optc32_phantom_crtc_post_enable +ffffffff820e7310 t optc32_set_drr +ffffffff820e7560 t optc32_set_odm_bypass +ffffffff820e76d0 t optc32_set_odm_combine +ffffffff820e79d0 t optc32_set_h_timing_div_manual_mode +ffffffff820e8000 T dcn32_panel_cntl_create +ffffffff820e8070 T dcn32_acquire_post_bldn_3dlut +ffffffff820e8160 T dcn32_release_post_bldn_3dlut +ffffffff820e8210 T dcn32_remove_phantom_pipes +ffffffff820e8380 T dcn32_add_phantom_pipes +ffffffff820e87c0 T dcn32_validate_bandwidth +ffffffff820e8c80 T dcn32_populate_dml_pipes_from_context +ffffffff820e9040 T dcn32_calculate_wm_and_dlg +ffffffff820e90b0 T dcn32_create_resource_pool +ffffffff820e9160 t dcn32_resource_construct +ffffffff820f55d0 T dcn32_acquire_idle_pipe_for_head_pipe_in_layer +ffffffff820f5810 T dcn32_calc_num_avail_chans_for_mall +ffffffff820f5880 t dcn32_mpc_create +ffffffff820fa240 t dcn32_resource_destruct +ffffffff820fa8b0 t dcn32_destroy_resource_pool +ffffffff820fa910 t dcn32_link_encoder_create +ffffffff820fb870 t dcn32_update_bw_bounding_box +ffffffff820fb8c0 t read_dce_straps +ffffffff820fb8f0 t dcn32_create_audio +ffffffff820fbc30 t dcn32_stream_encoder_create +ffffffff820fdab0 t dcn32_hpo_dp_stream_encoder_create +ffffffff820fe790 t dcn32_hpo_dp_link_encoder_create +ffffffff820fec10 t dcn32_hwseq_create +ffffffff820ff0b0 t dcn32_vpg_create +ffffffff82100000 T dcn32_helper_calculate_num_ways_for_subvp +ffffffff821001e0 T dcn32_merge_pipes_for_subvp +ffffffff821003b0 T dcn32_all_pipes_have_stream_and_plane +ffffffff82100440 T dcn32_subvp_in_use +ffffffff821004d0 T dcn32_mpo_in_use +ffffffff82100540 T dcn32_any_surfaces_rotated +ffffffff821005d0 T dcn32_determine_det_override +ffffffff82100910 T dcn32_set_det_allocations +ffffffff82100a90 T dcn32_save_mall_state +ffffffff82100b40 T dcn32_restore_mall_state +ffffffff82101000 T dcn321_link_encoder_construct +ffffffff82102000 T dcn321_create_resource_pool +ffffffff821020b0 t dcn321_resource_construct +ffffffff8210e4c0 t dcn321_mpc_create +ffffffff82112e80 t dcn321_resource_destruct +ffffffff821134f0 t dcn321_destroy_resource_pool +ffffffff82113550 t dcn321_link_encoder_create +ffffffff821144b0 t dcn321_update_bw_bounding_box +ffffffff82114500 t read_dce_straps +ffffffff82114530 t dcn321_create_audio +ffffffff82114870 t dcn321_stream_encoder_create +ffffffff821166f0 t dcn321_hpo_dp_stream_encoder_create +ffffffff821173d0 t dcn321_hpo_dp_link_encoder_create +ffffffff82117850 t dcn321_hwseq_create +ffffffff82117cf0 t dcn321_vpg_create +ffffffff82119000 T bw_int_to_fixed_nonconst +ffffffff82119090 T bw_frc_to_fixed +ffffffff82119260 T bw_floor2 +ffffffff82119310 T bw_ceil2 +ffffffff82119390 T bw_mul +ffffffff8211a000 T convert_to_custom_float_format +ffffffff8211b000 T bw_calcs_init +ffffffff8211be30 T bw_calcs +ffffffff8211d760 t calculate_bandwidth +ffffffff82125000 T scaler_settings_calculation +ffffffff82125380 T mode_support_and_system_configuration +ffffffff8212b160 T display_pipe_configuration +ffffffff8212b9a0 T dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation +ffffffff82131000 T dcn_bw_mod +ffffffff82131060 T dcn_bw_min2 +ffffffff821310a0 T dcn_bw_max +ffffffff821310d0 T dcn_bw_max2 +ffffffff82131110 T dcn_bw_floor2 +ffffffff821311b0 T dcn_bw_floor +ffffffff821311e0 T dcn_bw_ceil +ffffffff82131220 T dcn_bw_ceil2 +ffffffff821312d0 T dcn_bw_max3 +ffffffff82131370 T dcn_bw_max5 +ffffffff821314e0 T dcn_bw_pow +ffffffff82131570 T dcn_bw_fabs +ffffffff821315d0 T dcn_bw_log +ffffffff82132000 T swizzle_mode_to_macro_tile_size +ffffffff82132090 T dcn_validate_bandwidth +ffffffff82134330 T dcn_bw_sync_calcs_and_dml +ffffffff82134580 t dcn_bw_calc_rq_dlg_ttu +ffffffff82134f00 T dcn_find_dcfclk_suits_all +ffffffff82135360 T dcn_bw_update_from_pplib_fclks +ffffffff821354f0 T dcn_bw_update_from_pplib_dcfclks +ffffffff821355c0 T dcn_get_soc_clks +ffffffff82135640 T dcn_bw_notify_pplib_of_wm_ranges +ffffffff82136000 T dcn20_populate_dml_writeback_from_context +ffffffff82136180 T dcn20_fpu_set_wb_arb_params +ffffffff82136330 T dcn20_calculate_dlg_params +ffffffff82136b10 T dcn20_populate_dml_pipes_from_context +ffffffff82137a10 T dcn20_calculate_wm +ffffffff821381b0 T dcn20_update_bounding_box +ffffffff82138430 T dcn20_cap_soc_clocks +ffffffff821387b0 T dcn20_patch_bounding_box +ffffffff82138920 T dcn20_validate_bandwidth_fp +ffffffff82138ab0 t dcn20_validate_bandwidth_internal +ffffffff82138e90 T dcn20_fpu_set_wm_ranges +ffffffff82138f30 T dcn20_fpu_adjust_dppclk +ffffffff82138fd0 T dcn21_populate_dml_pipes_from_context +ffffffff821390d0 T dcn21_validate_bandwidth_fp +ffffffff82139b50 T dcn21_update_bw_bounding_box +ffffffff8213a040 T dcn21_clk_mgr_set_bw_params_wm_table +ffffffff8213a0a0 T dcn201_populate_dml_writeback_from_context_fpu +ffffffff8213a3b0 t calculate_wm_set_for_vlevel +ffffffff8213b000 T dml20_recalculate +ffffffff8213b740 t dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation 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dml20_rq_dlg_get_rq_params +ffffffff8215a660 T dml20_rq_dlg_get_dlg_reg +ffffffff8215c5b0 t get_surf_rq_param +ffffffff8215ce30 t calculate_ttu_cursor +ffffffff8215e000 T dml20v2_rq_dlg_get_rq_reg +ffffffff8215e490 t dml20v2_rq_dlg_get_rq_params +ffffffff8215e660 T dml20v2_rq_dlg_get_dlg_reg +ffffffff821605b0 t get_surf_rq_param +ffffffff82160e30 t calculate_ttu_cursor +ffffffff82162000 T dml21_recalculate +ffffffff82162700 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff821680b0 T dml21_ModeSupportAndSystemConfigurationFull +ffffffff8216e190 t TruncToValidBPP +ffffffff8216e720 t CalculateDCFCLKDeepSleep +ffffffff8216ea60 t CalculateVMAndRowBytes +ffffffff8216f2d0 t CalculatePrefetchSourceLines +ffffffff8216f490 t CalculateWriteBackDelay +ffffffff8216f760 t CalculatePrefetchSchedulePerPlane +ffffffff8216ff70 t CalculateUrgentBurstFactor +ffffffff82170380 t CalculateFlipSchedule +ffffffff82170870 t CalculateWatermarksAndDRAMSpeedChangeSupport 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DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff8217fc50 T dml30_CalculateBytePerPixelAnd256BBlockSizes +ffffffff8217fec0 T dml30_CalculateWriteBackDISPCLK +ffffffff82180040 T dml30_ModeSupportAndSystemConfigurationFull +ffffffff82187440 t CalculateSwathAndDETConfiguration +ffffffff82187ab0 t TruncToValidBPP +ffffffff82187d30 t dscceComputeDelay +ffffffff82187e70 t CalculateVMAndRowBytes +ffffffff82188520 t CalculatePrefetchSourceLines +ffffffff821886e0 t CalculateUrgentBurstFactor +ffffffff82188970 t CalculateDCFCLKDeepSleep +ffffffff82188c90 t UseMinimumDCFCLK +ffffffff82189e90 t CalculatePrefetchSchedule +ffffffff8218b3f0 t CalculateFlipSchedule +ffffffff8218b8e0 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff8218c700 t CalculateSwathWidth +ffffffff8218d000 T dml30_rq_dlg_get_rq_reg +ffffffff8218d4b0 t dml_rq_dlg_get_rq_params +ffffffff8218d720 T dml30_rq_dlg_get_dlg_reg +ffffffff8218fed0 t get_surf_rq_param +ffffffff82190870 t calculate_ttu_cursor +ffffffff82191000 T dcn301_update_bw_bounding_box +ffffffff82191320 T dcn301_fpu_set_wm_ranges +ffffffff821913c0 T dcn301_fpu_init_soc_bounding_box +ffffffff82191460 T dcn301_calculate_wm_and_dlg_fp +ffffffff82191790 t calculate_wm_set_for_vlevel +ffffffff82192000 T dcn302_fpu_update_bw_bounding_box +ffffffff82192ac0 T dcn302_fpu_init_soc_bounding_box +ffffffff82193000 T dcn303_fpu_update_bw_bounding_box +ffffffff82193b00 T dcn303_fpu_init_soc_bounding_box +ffffffff82194000 T dcn31_zero_pipe_dcc_fraction +ffffffff82194060 T dcn31_update_soc_for_wm_a +ffffffff82194110 T dcn315_update_soc_for_wm_a +ffffffff821941e0 T dcn31_calculate_wm_and_dlg_fp +ffffffff821946e0 T dcn31_update_bw_bounding_box +ffffffff82194ad0 T dcn315_update_bw_bounding_box +ffffffff82194dc0 T dcn316_update_bw_bounding_box +ffffffff82196000 T dml31_recalculate +ffffffff821962a0 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff8219d060 T dml31_CalculateWriteBackDISPCLK +ffffffff8219d1e0 T dml31_ModeSupportAndSystemConfigurationFull +ffffffff821a54a0 t CalculateSwathAndDETConfiguration +ffffffff821a5aa0 t TruncToValidBPP +ffffffff821a5d20 t dscceComputeDelay +ffffffff821a5e60 t CalculateDCFCLKDeepSleep +ffffffff821a61a0 t CalculateVMAndRowBytes +ffffffff821a67f0 t CalculatePrefetchSourceLines +ffffffff821a69b0 t CalculateUrgentBurstFactor +ffffffff821a6c40 t CalculatePrefetchSchedulePerPlane +ffffffff821a7370 t CalculateFlipSchedule +ffffffff821a78f0 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff821a8550 t CalculateSwathWidth +ffffffff821a8a60 t CalculatePrefetchSchedule +ffffffff821a9ef0 t CalculateVupdateAndDynamicMetadataParameters +ffffffff821ab000 T dml31_rq_dlg_get_rq_reg +ffffffff821ab4b0 t dml_rq_dlg_get_rq_params +ffffffff821ab720 T dml31_rq_dlg_get_dlg_reg +ffffffff821ae1f0 t get_surf_rq_param +ffffffff821af000 T dcn314_update_bw_bounding_box_fpu +ffffffff821af480 T dcn314_populate_dml_pipes_from_context_fpu +ffffffff821b0000 T dml314_recalculate +ffffffff821b0280 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff821b6f60 T dml314_CalculateWriteBackDISPCLK +ffffffff821b70e0 T dml314_ModeSupportAndSystemConfigurationFull +ffffffff821bf280 t CalculateBytePerPixelAnd256BBlockSizes +ffffffff821bf4f0 t CalculateSwathAndDETConfiguration +ffffffff821bfaf0 t TruncToValidBPP +ffffffff821bfd70 t dscceComputeDelay +ffffffff821bfeb0 t CalculateDCFCLKDeepSleep +ffffffff821c01f0 t CalculateVMAndRowBytes +ffffffff821c0840 t CalculatePrefetchSourceLines +ffffffff821c0a00 t CalculateUrgentBurstFactor +ffffffff821c0c90 t CalculateMaxVStartup +ffffffff821c0dd0 t CalculatePrefetchSchedulePerPlane +ffffffff821c1500 t CalculateFlipSchedule +ffffffff821c1a80 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff821c26e0 t CalculateSwathWidth +ffffffff821c2bf0 t CalculatePrefetchSchedule +ffffffff821c4080 t CalculateVupdateAndDynamicMetadataParameters +ffffffff821c5000 T dml314_rq_dlg_get_rq_reg +ffffffff821c54b0 t dml_rq_dlg_get_rq_params +ffffffff821c5720 T dml314_rq_dlg_get_dlg_reg +ffffffff821c8270 t get_surf_rq_param +ffffffff821c9000 T dcn32_build_wm_range_table_fpu +ffffffff821c9390 T dcn32_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff821c95c0 T dcn32_internal_validate_bw +ffffffff821cb2f0 T dcn32_helper_populate_phantom_dlg_params +ffffffff821cb490 T dcn32_predict_pipe_split +ffffffff821cb6c0 T insert_entry_into_table_sorted +ffffffff821cbaf0 T dcn32_set_phantom_stream_timing +ffffffff821cbd90 t dcn32_split_stream_for_mpc_or_odm +ffffffff821cc120 T dcn32_calculate_wm_and_dlg_fpu +ffffffff821cd640 T dcn32_patch_dpm_table +ffffffff821cd850 T dcn32_update_bw_bounding_box_fpu +ffffffff821cf250 T dcn32_zero_pipe_dcc_fraction +ffffffff821cf2b0 T dcn32_allow_subvp_with_active_margin +ffffffff821cf380 t subvp_drr_schedulable +ffffffff821d0000 T dml32_recalculate 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dml32_CalculateVMAndRowBytes +ffffffff821e25f0 T dml32_CalculatePrefetchSourceLines +ffffffff821e2840 T dml32_CalculateMALLUseForStaticScreen +ffffffff821e2990 T dml32_CalculateRowBandwidth +ffffffff821e2af0 T dml32_CalculateUrgentLatency +ffffffff821e2b90 T dml32_CalculateUrgentBurstFactor +ffffffff821e2e40 T dml32_CalculateDCFCLKDeepSleep +ffffffff821e3190 T dml32_CalculateWriteBackDelay +ffffffff821e32f0 T dml32_UseMinimumDCFCLK +ffffffff821e41b0 T dml32_CalculateExtraLatencyBytes +ffffffff821e4380 T dml32_CalculateTWait +ffffffff821e4460 T dml32_CalculateVUpdateAndDynamicMetadataParameters +ffffffff821e46c0 T dml32_get_return_bw_mbps +ffffffff821e4880 T dml32_get_return_bw_mbps_vm_only +ffffffff821e4960 T dml32_CalculateExtraLatency +ffffffff821e4b90 T dml32_CalculatePrefetchSchedule +ffffffff821e6140 T dml32_CalculateFlipSchedule +ffffffff821e66c0 T dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport +ffffffff821e7820 T dml32_CalculateWriteBackDISPCLK +ffffffff821e79e0 T dml32_CalculateMinAndMaxPrefetchMode +ffffffff821e7a20 T dml32_CalculatePixelDeliveryTimes +ffffffff821e7e90 T dml32_CalculateMetaAndPTETimes +ffffffff821e85d0 T dml32_CalculateVMGroupAndRequestTimes +ffffffff821e8ac0 T dml32_CalculateDCCConfiguration +ffffffff821e90e0 T dml32_CalculateStutterEfficiency +ffffffff821ea030 T dml32_CalculateMaxDETAndMinCompressedBufferSize +ffffffff821ea120 T dml32_CalculateVActiveBandwithSupport +ffffffff821ea2b0 T dml32_CalculatePrefetchBandwithSupport +ffffffff821ea550 T dml32_CalculateBandwidthAvailableForImmediateFlip +ffffffff821ea6a0 T dml32_CalculateImmediateFlipBandwithSupport +ffffffff821ea8f0 T dml32_CalculateDETSwathFillLatencyHiding +ffffffff821eb000 T dml32_rq_dlg_get_rq_reg +ffffffff821eb6a0 T dml32_rq_dlg_get_dlg_reg +ffffffff821ee000 T dcn321_insert_entry_into_table_sorted +ffffffff821ee430 T dcn321_update_bw_bounding_box_fpu +ffffffff821f0000 T dml_init_instance +ffffffff821f0310 T dml_get_status_message +ffffffff821f0350 T dml_log_pipe_params +ffffffff821f0380 T dml_log_mode_support_params +ffffffff821f1000 T dml_get_voltage_level +ffffffff821f11f0 t fetch_socbb_params +ffffffff821f1700 t fetch_ip_params +ffffffff821f1ba0 t fetch_pipe_params +ffffffff821f2ca0 T PixelClockAdjustmentForProgressiveToInterlaceUnit +ffffffff821f2d20 T get_clk_dcf_deepsleep +ffffffff821f2e30 T get_wm_urgent +ffffffff821f2f40 T get_wm_memory_trip +ffffffff821f3050 T get_wm_writeback_urgent +ffffffff821f3160 T get_wm_stutter_exit +ffffffff821f3270 T get_wm_stutter_enter_exit +ffffffff821f3380 T get_wm_z8_stutter_exit +ffffffff821f3490 T get_wm_z8_stutter_enter_exit +ffffffff821f35a0 T get_stutter_efficiency_z8 +ffffffff821f36b0 T get_stutter_num_bursts_z8 +ffffffff821f37c0 T get_wm_dram_clock_change +ffffffff821f38d0 T get_wm_writeback_dram_clock_change +ffffffff821f39e0 T get_stutter_efficiency +ffffffff821f3af0 T get_stutter_efficiency_no_vblank +ffffffff821f3c00 T get_stutter_period +ffffffff821f3d10 T get_urgent_latency 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get_comp_buffer_reserved_space_zs +ffffffff821f54f0 T get_unbounded_request_enabled +ffffffff821f5610 T get_dsc_delay +ffffffff821f5740 T get_dppclk_calculated +ffffffff821f5860 T get_dscclk_calculated +ffffffff821f5980 T get_min_ttu_vblank +ffffffff821f5aa0 T get_min_ttu_vblank_in_us +ffffffff821f5bc0 T get_vratio_prefetch_l +ffffffff821f5ce0 T get_vratio_prefetch_c +ffffffff821f5e00 T get_dst_x_after_scaler +ffffffff821f5f20 T get_dst_y_after_scaler +ffffffff821f6040 T get_dst_y_per_vm_vblank +ffffffff821f6160 T get_dst_y_per_row_vblank +ffffffff821f6280 T get_dst_y_prefetch +ffffffff821f63a0 T get_dst_y_per_vm_flip +ffffffff821f64c0 T get_dst_y_per_row_flip +ffffffff821f65e0 T get_refcyc_per_vm_group_vblank +ffffffff821f6700 T get_refcyc_per_vm_group_flip +ffffffff821f6820 T get_refcyc_per_vm_req_vblank +ffffffff821f6940 T get_refcyc_per_vm_req_flip +ffffffff821f6a60 T get_refcyc_per_vm_group_vblank_in_us +ffffffff821f6b80 T get_refcyc_per_vm_group_flip_in_us +ffffffff821f6ca0 T get_refcyc_per_vm_req_vblank_in_us +ffffffff821f6dc0 T get_refcyc_per_vm_req_flip_in_us +ffffffff821f6ee0 T get_refcyc_per_vm_dmdata_in_us +ffffffff821f7000 T get_dmdata_dl_delta_in_us +ffffffff821f7120 T get_refcyc_per_line_delivery_l_in_us +ffffffff821f7240 T get_refcyc_per_line_delivery_c_in_us +ffffffff821f7360 T get_refcyc_per_line_delivery_pre_l_in_us +ffffffff821f7480 T get_refcyc_per_line_delivery_pre_c_in_us +ffffffff821f75a0 T get_refcyc_per_req_delivery_l_in_us +ffffffff821f76c0 T get_refcyc_per_req_delivery_c_in_us +ffffffff821f77e0 T get_refcyc_per_req_delivery_pre_l_in_us +ffffffff821f7900 T get_refcyc_per_req_delivery_pre_c_in_us +ffffffff821f7a20 T get_refcyc_per_cursor_req_delivery_in_us +ffffffff821f7b40 T get_refcyc_per_cursor_req_delivery_pre_in_us +ffffffff821f7c60 T get_refcyc_per_meta_chunk_nom_l_in_us +ffffffff821f7d80 T get_refcyc_per_meta_chunk_nom_c_in_us +ffffffff821f7ea0 T get_refcyc_per_meta_chunk_vblank_l_in_us +ffffffff821f7fc0 T get_refcyc_per_meta_chunk_vblank_c_in_us +ffffffff821f80e0 T get_refcyc_per_meta_chunk_flip_l_in_us +ffffffff821f8200 T get_refcyc_per_meta_chunk_flip_c_in_us +ffffffff821f8320 T get_vstartup +ffffffff821f8450 T get_vupdate_offset +ffffffff821f8580 T get_vupdate_width +ffffffff821f86a0 T get_vready_offset +ffffffff821f87c0 T get_vready_at_or_after_vsync +ffffffff821f88f0 T get_min_dst_y_next_start +ffffffff821f8a20 T get_dst_y_per_pte_row_nom_l +ffffffff821f8b40 T get_dst_y_per_pte_row_nom_c +ffffffff821f8c60 T get_dst_y_per_meta_row_nom_l +ffffffff821f8d80 T get_dst_y_per_meta_row_nom_c +ffffffff821f8ea0 T get_refcyc_per_pte_group_nom_l_in_us +ffffffff821f8fc0 T get_refcyc_per_pte_group_nom_c_in_us +ffffffff821f90e0 T get_refcyc_per_pte_group_vblank_l_in_us +ffffffff821f9200 T get_refcyc_per_pte_group_vblank_c_in_us +ffffffff821f9320 T get_refcyc_per_pte_group_flip_l_in_us +ffffffff821f9440 T get_refcyc_per_pte_group_flip_c_in_us +ffffffff821f9560 T get_vstartup_calculated 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smu_v13_0_5_print_clk_levels -ffffffff82301170 t smu_v13_0_5_force_clk_levels -ffffffff823012d0 t smu_v13_0_5_od_edit_dpm_table -ffffffff82301590 t smu_v13_0_5_dpm_set_vcn_enable -ffffffff823015b0 t smu_v13_0_5_dpm_set_jpeg_enable -ffffffff823015d0 t smu_v13_0_5_read_sensor -ffffffff823017f0 t smu_v13_0_5_is_dpm_running -ffffffff82301840 t smu_v13_0_5_set_watermarks_table -ffffffff823019d0 t smu_v13_0_5_set_performance_level -ffffffff82301bb0 t smu_v13_0_5_init_smc_tables -ffffffff82301d20 t smu_v13_0_5_fini_smc_tables -ffffffff82301dd0 t smu_v13_0_5_system_features_control -ffffffff82301e20 t smu_v13_0_5_mode2_reset -ffffffff82301ea0 t smu_v13_0_5_get_dpm_ultimate_freq -ffffffff823022e0 t smu_v13_0_5_get_gpu_metrics -ffffffff82302420 t smu_v13_0_5_set_fine_grain_gfx_freq_parameters -ffffffff82302480 t smu_v13_0_5_get_smu_metrics_data -ffffffff82303000 T smu_v13_0_7_set_ppt_funcs -ffffffff82303050 t smu_v13_0_7_get_allowed_feature_mask -ffffffff823031c0 t smu_v13_0_7_set_default_dpm_table -ffffffff823035f0 t smu_v13_0_7_populate_umd_state_clk -ffffffff82303720 t smu_v13_0_7_print_clk_levels -ffffffff82303840 t smu_v13_0_7_force_clk_levels -ffffffff823039c0 t smu_v13_0_7_get_power_profile_mode -ffffffff82303ca0 t smu_v13_0_7_set_power_profile_mode -ffffffff82303ee0 t smu_v13_0_7_read_sensor -ffffffff823040f0 t smu_v13_0_7_is_dpm_running -ffffffff82304140 t smu_v13_0_7_get_fan_speed_pwm -ffffffff82304220 t smu_v13_0_7_get_fan_speed_rpm -ffffffff82304290 t smu_v13_0_7_get_thermal_temperature_range -ffffffff82304380 t smu_v13_0_7_dump_pptable -ffffffff823043b0 t smu_v13_0_7_get_power_limit -ffffffff82304490 t smu_v13_0_7_set_df_cstate -ffffffff823044b0 t smu_v13_0_7_update_pcie_parameters -ffffffff823045a0 t smu_v13_0_7_init_smc_tables -ffffffff82304790 t smu_v13_0_7_check_fw_status -ffffffff823047e0 t smu_v13_0_7_set_mp1_state -ffffffff82304820 t smu_v13_0_7_setup_pptable -ffffffff82304980 t smu_v13_0_7_baco_enter -ffffffff823049d0 t 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svm_setmsrbrw -ffffffff8252ca10 T svm_setmsrbr -ffffffff8252cae0 T vmm_alloc_vpid -ffffffff8252cc00 T svm_setmsrbw -ffffffff8252cce0 T vmx_setmsrbr -ffffffff8252cd90 T vmx_setmsrbw -ffffffff8252ce40 T vmx_setmsrbrw -ffffffff8252cf50 T svm_set_clean -ffffffff8252cfa0 T svm_set_dirty -ffffffff8252cff0 T vcpu_reset_regs_vmx -ffffffff8252db80 T vcpu_vmx_check_cap -ffffffff8252dc80 T vcpu_vmx_compute_ctrl -ffffffff8252de60 T vcpu_init_vmx -ffffffff8252e200 T vcpu_deinit_vmx -ffffffff8252e380 T vcpu_init_svm -ffffffff8252e510 T vcpu_deinit_svm -ffffffff8252e650 T vmm_free_vpid -ffffffff8252e6c0 T vcpu_deinit -ffffffff8252e710 T vcpu_run_vmx -ffffffff8252ef20 T vcpu_run_svm -ffffffff8252f510 T vcpu_must_stop -ffffffff8252f580 T vmm_fpurestore -ffffffff8252f650 T vmm_fpusave -ffffffff8252f6d0 T vmm_translate_gva -ffffffff8252fa00 T vmm_update_pvclock -ffffffff8252fb00 T vmx_get_exit_info -ffffffff8252fb60 T vmx_handle_exit -ffffffff8252ff50 T vmx_instruction_error_decode -ffffffff82530120 T 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sdmmc_free_ccbs -ffffffff82540600 T sdmmc_scsi_detach -ffffffff82540760 T sdmmc_stimeout -ffffffff825407e0 T sdmmc_ccb_alloc -ffffffff82540890 T sdmmc_ccb_free -ffffffff82540970 T sdmmc_inquiry -ffffffff82540be0 T sdmmc_start_xs -ffffffff82540cd0 T sdmmc_complete_xs -ffffffff82540da0 T sdmmc_done_xs -ffffffff82540df0 T sdmmc_scsi_hibernate_io -ffffffff82541000 T bwfm_sdio_preinit -ffffffff825414f0 T bwfm_sdio_txcheck -ffffffff82541530 T bwfm_sdio_txdata -ffffffff825415a0 T bwfm_sdio_txctl -ffffffff825416f0 T bwfm_sdio_buscore_read -ffffffff82541700 T bwfm_sdio_buscore_write -ffffffff82541720 T bwfm_sdio_buscore_prepare -ffffffff82541860 T bwfm_sdio_buscore_activate -ffffffff825418e0 T bwfm_sdio_match -ffffffff825419b0 T bwfm_sdio_attach -ffffffff82541c70 T bwfm_sdio_detach -ffffffff82541cd0 T bwfm_sdio_task -ffffffff82541e30 T bwfm_sdio_write_1 -ffffffff82541e60 T bwfm_sdio_read_1 -ffffffff82541e90 T bwfm_sdio_write_4 -ffffffff82541f40 T bwfm_sdio_read_4 -ffffffff82541ff0 T bwfm_sdio_load_microcode -ffffffff82542250 T bwfm_sdio_clkctl -ffffffff82542380 T bwfm_sdio_dev_write -ffffffff825423d0 T bwfm_sdio_intr -ffffffff82542410 T bwfm_sdio_ram_read_write -ffffffff82542640 T bwfm_sdio_htclk -ffffffff825428a0 T bwfm_sdio_readshared -ffffffff82542970 T bwfm_sdio_dev_read -ffffffff825429b0 T bwfm_sdio_rx_frames -ffffffff82542d40 T bwfm_sdio_tx_frames -ffffffff82542e20 T bwfm_sdio_backplane -ffffffff82542ed0 T bwfm_sdio_buf_read -ffffffff82542fb0 T bwfm_sdio_buf_write -ffffffff82543060 T bwfm_sdio_frame_read_write -ffffffff825431e0 T bwfm_sdio_newbuf -ffffffff82543260 T bwfm_sdio_tx_ok -ffffffff825432b0 T bwfm_sdio_tx_ctrlframe -ffffffff825433b0 T bwfm_sdio_tx_dataframe -ffffffff82543500 T bwfm_sdio_rx_glom -ffffffff82544000 T onewire_match -ffffffff82544050 T onewire_attach -ffffffff825440f0 T onewire_detach -ffffffff82544160 T onewire_activate -ffffffff82544180 T onewire_scan -ffffffff82544390 T onewire_createthread -ffffffff82544400 T onewire_print -ffffffff825444d0 T onewirebus_print -ffffffff82544520 T onewire_lock -ffffffff82544540 T onewire_unlock -ffffffff82544560 T onewire_reset -ffffffff82544580 T onewire_bit -ffffffff825445a0 T onewire_read_byte -ffffffff825446e0 T onewire_write_byte -ffffffff825447c0 T onewire_read_block -ffffffff82544860 T onewire_write_block -ffffffff82544900 T onewire_triplet -ffffffff825449e0 T onewire_matchrom -ffffffff82544b30 T onewire_search -ffffffff82544ec0 T onewire_thread -ffffffff82545000 T onewire_crc -ffffffff825450e0 T onewire_crc16 -ffffffff825451c0 T onewire_famname -ffffffff82545200 T onewire_matchbyfam -ffffffff82546000 T owid_match -ffffffff82546030 T owid_attach -ffffffff82546100 T owid_detach -ffffffff82546140 T owid_activate -ffffffff82547000 T owsbm_match -ffffffff82547030 T owsbm_attach -ffffffff825471d0 T owsbm_detach -ffffffff82547240 T owsbm_activate -ffffffff82547270 T owsbm_update -ffffffff82548000 T owtemp_match -ffffffff82548030 T owtemp_attach -ffffffff82548130 T owtemp_detach -ffffffff825481a0 T owtemp_activate -ffffffff825481d0 T owtemp_update -ffffffff82549000 T owctr_match -ffffffff82549030 T owctr_attach -ffffffff82549180 T owctr_detach -ffffffff825491f0 T owctr_activate -ffffffff82549220 T owctr_update -ffffffff82549250 T owctr_update_counter -ffffffff8254a000 A __text_page_start -ffffffff8254a000 T Xsyscall_meltdown -ffffffff8254a00c T Xsyscall -ffffffff8254a26e t Xsyscall_trampback -ffffffff8254a280 T intr_user_exit -ffffffff8254a2c2 t intr_user_exit_post_ast -ffffffff8254a3ee t Xiretq_trampback -ffffffff8254a3fa T doreti_iret -ffffffff8254b000 T alltraps -ffffffff8254b138 T recall_trap -ffffffff8254b150 T alltraps_kern -ffffffff8254b153 T alltraps_kern_meltdown -ffffffff8254c000 ? Xsyscall32 -ffffffff8254c000 A __kutext_start -ffffffff8254c000 A __text_page_end -ffffffff8254d000 ? Xtrap00 -ffffffff8254d010 ? Xtrap01 -ffffffff8254d020 ? Xtrap02 -ffffffff8254d028 c calltrap_specstk -ffffffff8254d0f0 ? calltrap_specstk_tramp -ffffffff8254d110 ? Xtrap03 -ffffffff8254d120 ? Xtrap04 -ffffffff8254d130 ? Xtrap05 -ffffffff8254d140 ? Xtrap06 -ffffffff8254d150 ? Xtrap07 -ffffffff8254d160 ? Xtrap08 -ffffffff8254d170 ? Xtrap09 -ffffffff8254d180 ? Xtrap0a -ffffffff8254d190 ? Xtrap0b -ffffffff8254d1a0 ? Xtrap0c -ffffffff8254d1b0 ? Xtrap0d -ffffffff8254d240 ? Xtrap0e -ffffffff8254d250 ? Xintrspurious -ffffffff8254d250 ? Xtrap0f -ffffffff8254d260 ? Xtrap10 -ffffffff8254d270 ? Xtrap11 -ffffffff8254d280 ? Xtrap12 -ffffffff8254d290 ? Xtrap13 -ffffffff8254d2a0 ? Xtrap14 -ffffffff8254d2b0 ? Xtrap15 -ffffffff8254d2c0 ? Xtrap16 -ffffffff8254d2c0 ? Xtrap17 -ffffffff8254d2c0 ? Xtrap18 -ffffffff8254d2c0 ? Xtrap19 -ffffffff8254d2c0 ? Xtrap1a -ffffffff8254d2c0 ? Xtrap1b -ffffffff8254d2c0 ? Xtrap1c -ffffffff8254d2c0 ? Xtrap1d -ffffffff8254d2c0 ? Xtrap1e -ffffffff8254d2c0 ? Xtrap1f -ffffffff8254d2d0 ? x2apic_eoi -ffffffff8254d2f0 ? Xintr_lapic_ipi -ffffffff8254d330 ? Xipi_invltlb -ffffffff8254d360 ? Xipi_invlpg -ffffffff8254d390 ? Xipi_invlrange -ffffffff8254d3d0 ? Xipi_invltlb_pcid -ffffffff8254d410 ? Xipi_invlpg_pcid -ffffffff8254d460 ? Xipi_invlrange_pcid -ffffffff8254d4d0 ? Xintr_lapic_ltimer -ffffffff8254d510 ? Xintr_xen_upcall -ffffffff8254d550 ? Xintr_hyperv_upcall -ffffffff8254d590 ? Xintr_legacy0 -ffffffff8254d5d0 ? Xintr_legacy1 -ffffffff8254d610 ? Xintr_legacy2 -ffffffff8254d650 ? Xintr_legacy3 -ffffffff8254d690 ? Xintr_legacy4 -ffffffff8254d6d0 ? Xintr_legacy5 -ffffffff8254d710 ? Xintr_legacy6 -ffffffff8254d750 ? Xintr_legacy7 -ffffffff8254d790 ? Xintr_legacy8 -ffffffff8254d7d0 ? Xintr_legacy9 -ffffffff8254d810 ? Xintr_legacy10 -ffffffff8254d850 ? Xintr_legacy11 -ffffffff8254d890 ? Xintr_legacy12 -ffffffff8254d8d0 ? Xintr_legacy13 -ffffffff8254d910 ? Xintr_legacy14 -ffffffff8254d950 ? Xintr_legacy15 -ffffffff8254d990 ? Xintr_ioapic_edge0 -ffffffff8254d9d0 ? Xintr_ioapic_edge1 -ffffffff8254da10 ? Xintr_ioapic_edge2 -ffffffff8254da50 ? Xintr_ioapic_edge3 -ffffffff8254da90 ? Xintr_ioapic_edge4 -ffffffff8254dad0 ? Xintr_ioapic_edge5 -ffffffff8254db10 ? Xintr_ioapic_edge6 -ffffffff8254db50 ? Xintr_ioapic_edge7 -ffffffff8254db90 ? Xintr_ioapic_edge8 -ffffffff8254dbd0 ? Xintr_ioapic_edge9 -ffffffff8254dc10 ? Xintr_ioapic_edge10 -ffffffff8254dc50 ? Xintr_ioapic_edge11 -ffffffff8254dc90 ? Xintr_ioapic_edge12 -ffffffff8254dcd0 ? Xintr_ioapic_edge13 -ffffffff8254dd10 ? Xintr_ioapic_edge14 -ffffffff8254dd50 ? Xintr_ioapic_edge15 -ffffffff8254dd90 ? Xintr_ioapic_edge16 -ffffffff8254ddd0 ? Xintr_ioapic_edge17 -ffffffff8254de10 ? Xintr_ioapic_edge18 -ffffffff8254de50 ? Xintr_ioapic_edge19 -ffffffff8254de90 ? Xintr_ioapic_edge20 -ffffffff8254ded0 ? Xintr_ioapic_edge21 -ffffffff8254df10 ? Xintr_ioapic_edge22 -ffffffff8254df50 ? Xintr_ioapic_edge23 -ffffffff8254df90 ? Xintr_ioapic_edge24 -ffffffff8254dfd0 ? Xintr_ioapic_edge25 -ffffffff8254e010 ? Xintr_ioapic_edge26 -ffffffff8254e050 ? Xintr_ioapic_edge27 -ffffffff8254e090 ? Xintr_ioapic_edge28 -ffffffff8254e0d0 ? Xintr_ioapic_edge29 -ffffffff8254e110 ? Xintr_ioapic_edge30 -ffffffff8254e150 ? Xintr_ioapic_edge31 -ffffffff8254e190 ? Xintr_ioapic_edge32 -ffffffff8254e1d0 ? Xintr_ioapic_edge33 -ffffffff8254e210 ? Xintr_ioapic_edge34 -ffffffff8254e250 ? Xintr_ioapic_edge35 -ffffffff8254e290 ? Xintr_ioapic_edge36 -ffffffff8254e2d0 ? Xintr_ioapic_edge37 -ffffffff8254e310 ? Xintr_ioapic_edge38 -ffffffff8254e350 ? Xintr_ioapic_edge39 -ffffffff8254e390 ? Xintr_ioapic_edge40 -ffffffff8254e3d0 ? Xintr_ioapic_edge41 -ffffffff8254e410 ? Xintr_ioapic_edge42 -ffffffff8254e450 ? Xintr_ioapic_edge43 -ffffffff8254e490 ? Xintr_ioapic_edge44 -ffffffff8254e4d0 ? Xintr_ioapic_edge45 -ffffffff8254e510 ? Xintr_ioapic_edge46 -ffffffff8254e550 ? Xintr_ioapic_edge47 -ffffffff8254e590 ? Xintr_ioapic_edge48 -ffffffff8254e5d0 ? Xintr_ioapic_edge49 -ffffffff8254e610 ? Xintr_ioapic_edge50 -ffffffff8254e650 ? Xintr_ioapic_edge51 -ffffffff8254e690 ? Xintr_ioapic_edge52 -ffffffff8254e6d0 ? Xintr_ioapic_edge53 -ffffffff8254e710 ? Xintr_ioapic_edge54 -ffffffff8254e750 ? Xintr_ioapic_edge55 -ffffffff8254e790 ? Xintr_ioapic_edge56 -ffffffff8254e7d0 ? Xintr_ioapic_edge57 -ffffffff8254e810 ? Xintr_ioapic_edge58 -ffffffff8254e850 ? Xintr_ioapic_edge59 -ffffffff8254e890 ? Xintr_ioapic_edge60 -ffffffff8254e8d0 ? Xintr_ioapic_edge61 -ffffffff8254e910 ? Xintr_ioapic_edge62 -ffffffff8254e950 ? Xintr_ioapic_edge63 -ffffffff8254e990 ? Xintr_ioapic_level0 -ffffffff8254e9d0 ? Xintr_ioapic_level1 -ffffffff8254ea10 ? Xintr_ioapic_level2 -ffffffff8254ea50 ? Xintr_ioapic_level3 -ffffffff8254ea90 ? Xintr_ioapic_level4 -ffffffff8254ead0 ? Xintr_ioapic_level5 -ffffffff8254eb10 ? Xintr_ioapic_level6 -ffffffff8254eb50 ? Xintr_ioapic_level7 -ffffffff8254eb90 ? Xintr_ioapic_level8 -ffffffff8254ebd0 ? Xintr_ioapic_level9 -ffffffff8254ec10 ? Xintr_ioapic_level10 -ffffffff8254ec50 ? Xintr_ioapic_level11 -ffffffff8254ec90 ? Xintr_ioapic_level12 -ffffffff8254ecd0 ? Xintr_ioapic_level13 -ffffffff8254ed10 ? Xintr_ioapic_level14 -ffffffff8254ed50 ? Xintr_ioapic_level15 -ffffffff8254ed90 ? Xintr_ioapic_level16 -ffffffff8254edd0 ? Xintr_ioapic_level17 -ffffffff8254ee10 ? Xintr_ioapic_level18 -ffffffff8254ee50 ? Xintr_ioapic_level19 -ffffffff8254ee90 ? Xintr_ioapic_level20 -ffffffff8254eed0 ? Xintr_ioapic_level21 -ffffffff8254ef10 ? Xintr_ioapic_level22 -ffffffff8254ef50 ? Xintr_ioapic_level23 -ffffffff8254ef90 ? Xintr_ioapic_level24 -ffffffff8254efd0 ? Xintr_ioapic_level25 -ffffffff8254f010 ? Xintr_ioapic_level26 -ffffffff8254f050 ? Xintr_ioapic_level27 -ffffffff8254f090 ? Xintr_ioapic_level28 -ffffffff8254f0d0 ? Xintr_ioapic_level29 -ffffffff8254f110 ? Xintr_ioapic_level30 -ffffffff8254f150 ? Xintr_ioapic_level31 -ffffffff8254f190 ? Xintr_ioapic_level32 -ffffffff8254f1d0 ? Xintr_ioapic_level33 -ffffffff8254f210 ? Xintr_ioapic_level34 -ffffffff8254f250 ? Xintr_ioapic_level35 -ffffffff8254f290 ? Xintr_ioapic_level36 -ffffffff8254f2d0 ? Xintr_ioapic_level37 -ffffffff8254f310 ? Xintr_ioapic_level38 -ffffffff8254f350 ? Xintr_ioapic_level39 -ffffffff8254f390 ? Xintr_ioapic_level40 -ffffffff8254f3d0 ? Xintr_ioapic_level41 -ffffffff8254f410 ? Xintr_ioapic_level42 -ffffffff8254f450 ? Xintr_ioapic_level43 -ffffffff8254f490 ? Xintr_ioapic_level44 -ffffffff8254f4d0 ? Xintr_ioapic_level45 -ffffffff8254f510 ? Xintr_ioapic_level46 -ffffffff8254f550 ? Xintr_ioapic_level47 -ffffffff8254f590 ? Xintr_ioapic_level48 -ffffffff8254f5d0 ? Xintr_ioapic_level49 -ffffffff8254f610 ? Xintr_ioapic_level50 -ffffffff8254f650 ? Xintr_ioapic_level51 -ffffffff8254f690 ? Xintr_ioapic_level52 -ffffffff8254f6d0 ? Xintr_ioapic_level53 -ffffffff8254f710 ? Xintr_ioapic_level54 -ffffffff8254f750 ? Xintr_ioapic_level55 -ffffffff8254f790 ? Xintr_ioapic_level56 -ffffffff8254f7d0 ? Xintr_ioapic_level57 -ffffffff8254f810 ? Xintr_ioapic_level58 -ffffffff8254f850 ? Xintr_ioapic_level59 -ffffffff8254f890 ? Xintr_ioapic_level60 -ffffffff8254f8d0 ? Xintr_ioapic_level61 -ffffffff8254f910 ? Xintr_ioapic_level62 -ffffffff8254f950 ? Xintr_ioapic_level63 -ffffffff82550000 ? codepatch_fill_nop -ffffffff82550000 A __cptext_start -ffffffff82550000 A __kutext_end -ffffffff825500b0 ? codepatch_maprw -ffffffff82550190 ? codepatch_unmaprw -ffffffff82550200 ? codepatch_nop -ffffffff82550360 ? codepatch_replace -ffffffff82550510 ? codepatch_call -ffffffff82550530 ? codepatch_jmp -ffffffff82551000 A __cptext_end -ffffffff82551000 A __rodata_start -ffffffff82551000 C _etext -ffffffff82551000 C etext -ffffffff82552000 r seeprom_read -ffffffff82552004 r icl_mg_pll_find_divisors.div1_vals -ffffffff82552028 r gen9bc_tgp_ddc_pin_map -ffffffff82552038 r athn_ac2qid -ffffffff82552038 r athn_ac2qid -ffffffff82552038 r athn_ac2qid -ffffffff82552044 r rtwn_get_rssi.cckoff -ffffffff8255206c r rsu_ac2qid -ffffffff8255207c r pckbc_portcmd -ffffffff82552080 r tht_fifo_write_pad.pad -ffffffff82552088 r rsu_get_rssi.cckoff -ffffffff8255209c r adlp_n_revids -ffffffff825520ec r apple_iso_trans -ffffffff825520f0 r dg2_g12_revid_step_tbl -ffffffff825520f8 r wihap_check_tx.txratetable -ffffffff825520fc r dmamode -ffffffff82552124 r gen9_edram_size_mb.sets -ffffffff82553000 r isomappings -ffffffff82553080 r unimappings -ffffffff82553230 r replacements -ffffffff82556b18 r cmd0646_9_tim_udma -ffffffff825aa5a3 r pp_r600_decoded_lanes -ffffffff825c5906 r cmd680_setup_channel.udma_tbl -ffffffff825cd596 r apollo_udma33_tim -ffffffff825d3683 r substchar -ffffffff825d576a r apollo_udma100_tim -ffffffff825fd061 r apollo_udma66_tim -ffffffff826044f4 r apollo_pio_rec -ffffffff826138ce r cy_pio_rec -ffffffff82642dd9 r apollo_udma133_tim -ffffffff8264f980 R drm_ca -ffffffff8264f9a8 R drm_filtops -ffffffff8264f9d8 R drmread_filtops -ffffffff82650000 r vga_emulops -ffffffff82650048 R vga_stdscreen -ffffffff82650078 R vga_stdscreen_mono -ffffffff826500a8 R vga_stdscreen_bf -ffffffff826500d8 R vga_40lscreen -ffffffff82650108 R vga_40lscreen_mono -ffffffff82650138 R vga_40lscreen_bf -ffffffff82650168 R vga_50lscreen -ffffffff82650198 R vga_50lscreen_mono -ffffffff826501c8 R vga_50lscreen_bf -ffffffff826501f8 R vga_screenlist -ffffffff82650208 R vga_screenlist_mono -ffffffff82650218 R vga_accessops -ffffffff82650278 r i945_wm_info -ffffffff826502b0 r bgansitopc -ffffffff826502b8 r pctoansi -ffffffff826502f8 r sdma_offsets -ffffffff826502f8 r sdma_offsets -ffffffff82650328 r iha_rate_tbl -ffffffff82650360 r i830_a_wm_info -ffffffff82650398 r gen9_edram_size_mb.ways -ffffffff82650400 r aggr_periodic_times -ffffffff82650480 r jsl_ehl_revids -ffffffff826504f8 r michael_final.pad -ffffffff82650520 r rt_copysa.maskarray -ffffffff82650528 r i915_wm_info -ffffffff82650530 r amdgpu_ih_clientid_jpeg -ffffffff82650530 r amdgpu_ih_clientid_uvds -ffffffff82650530 r amdgpu_ih_clientid_vcns -ffffffff82650530 r amdgpu_ih_clientid_vcns -ffffffff82650530 r amdgpu_ih_clientid_vcns -ffffffff82650568 r vga_setfontset.cmaptabb -ffffffff82650580 r tgl_revids -ffffffff826505d8 r i830_bc_wm_info -ffffffff82650648 r hsw_activate_psr2.map -ffffffff82650688 r __drm_universal_plane_init.default_modifiers -ffffffff82650698 r iwn_tid2fifo -ffffffff826506b0 r vga_setfontset.cmaptaba -ffffffff826506b8 r crtc_offsets -ffffffff826506b8 r crtc_offsets -ffffffff826506b8 r crtc_offsets -ffffffff826506d8 r link_speed -ffffffff826506d8 r link_speed -ffffffff826506d8 r link_speed -ffffffff82650750 r rtwn_r88e_get_rssi.cckoff -ffffffff82651000 R edid_vendors -ffffffff826512c0 R edid_nvendors -ffffffff826512d0 R edid_products -ffffffff82651330 R edid_nproducts -ffffffff82651340 r _edid_modes -ffffffff82652000 R videomode_list -ffffffff82653080 R videomode_count -ffffffff82654000 r ahc_hard_errors -ffffffff82654080 r critical_sections -ffffffff826540b0 r patches -ffffffff82654d50 r seqprog -ffffffff82656000 r ahc_switch -ffffffff82657000 r termstat_strings -ffffffff82657020 r critical_sections -ffffffff82657060 r seqprog -ffffffff82657d50 r patches -ffffffff82659000 r ahd_switch -ffffffff8265a000 R aic_switch -ffffffff8265b000 R adw_switch -ffffffff8265c000 R gdt_switch -ffffffff8265d000 R twe_switch -ffffffff8265e000 R ciss_switch -ffffffff8265e030 R ciss_level -ffffffff8265e050 R ciss_stat -ffffffff8265f000 R ami_switch -ffffffff8265f028 R ami_raw_switch -ffffffff82660000 R mfi_switch -ffffffff82660028 R mfi_pd_switch -ffffffff82660050 r mfi_iop_xscale -ffffffff82660080 r mfi_iop_ppc -ffffffff826600b0 r mfi_iop_gen2 -ffffffff826600e0 r mfi_iop_skinny -ffffffff82660110 r mfi_bbu_indicators -ffffffff826601c0 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs -ffffffff826601f0 r chv_oa_mux_regs -ffffffff82660210 r fiji_clock_stretcher_lookup_table -ffffffff82660210 r tonga_clock_stretcher_lookup_table -ffffffff82660230 r iosf_pci_devices -ffffffff82660250 r link_speed -ffffffff82660250 r link_speed -ffffffff82660250 r link_speed -ffffffff82660290 r drm_fb_xfrm.default_dst_pitch -ffffffff82660290 r non_supported_protection -ffffffff82660390 r tgl_uy_revids -ffffffff826603e0 r bwi_phy_noise_11g_rev1 -ffffffff82660460 r cardslot_process_event.antonym_ev -ffffffff826604f0 r gen11_oa_mux_regs -ffffffff826605e0 r ddr2_cycle_tenths -ffffffff82660650 r rtw_intr_rx.ratetbl -ffffffff826606d0 r abm_config -ffffffff82660740 r getbootinfo.ports.30 -ffffffff82660790 r reg_offsets -ffffffff826607a0 r bwi_rf_lo_measure_11g.rf_lo_adjust -ffffffff826607b0 r init_non_clock_fields.look_up -ffffffff826607c0 r uftdi_8u232am_getrate.roundoff -ffffffff82660810 r zyd_rx_data.rates -ffffffff82660820 r ieee80211_ra_valid_tx_mcs.max_mcs -ffffffff82660860 r mmio_invalidate_full.gen8_regs -ffffffff82660890 r bwi_phy_noise_11g -ffffffff826608a0 r hpt366_pio -ffffffff826608d0 r glk_revids -ffffffff82660920 r bwi_rf_calc_nrssi_slope_11g.save_phy3_regs -ffffffff82660940 r ether_crc32_be_update.rev -ffffffff82660940 r rtw_grf5101_mac_crypt.caesar -ffffffff82660990 r snb_b_fdi_train_param -ffffffff82661000 R qlw_switch -ffffffff82662000 R isp_2100_risc_code -ffffffff82674bf0 R isp_2200_risc_code -ffffffff82687990 R isp_2300_risc_code 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bwi_rf_calibval.rf_calibvals -ffffffff826a45e0 r pf_syncookie_msstab -ffffffff826a4640 r xgmi3x16_pcs_err_status_reg_aldebaran -ffffffff826a46a0 r uath_wme_init.uath_wme_11g -ffffffff826a46c0 r gen7_oa_b_counters -ffffffff826a4820 r icl_revids -ffffffff826a48e0 r rtwn_iq_calib_run.reg_adda -ffffffff826a4920 r atom_def_dst -ffffffff826a4920 r atom_def_dst -ffffffff826a4960 r sha256_initial_hash_value -ffffffff826a49c0 r otus_edca_def -ffffffff826a49e0 r intel_hpll_vco.blb_vco -ffffffff826a4aa0 r epic_pci_subsys_info -ffffffff826a4ac0 r atom_arg_mask -ffffffff826a4ac0 r atom_arg_mask -ffffffff826a4b20 r butmap -ffffffff826a4b60 r GFX_RLC_SRM_INDEX_CNTL_DATA_OFFSETS -ffffffff826a4ba0 r comsoft.lsrmap -ffffffff826a4be0 r tulip_mii_phy_readspecific.table -ffffffff826a4c00 r kbl_revids -ffffffff826a4ca0 r intel_hpll_vco.pnv_vco -ffffffff826a4d00 r dmapageport -ffffffff826a4dc0 r intel_hpll_vco.ctg_vco -ffffffff826a4e80 r drm_calculate_luminance_range.pre_computed_values -ffffffff826a5000 R sili_atascsi_methods -ffffffff826a6000 R ncr53c9x_switch -ffffffff826a7000 r scf_period -ffffffff826a8000 R siop_script -ffffffff826a85a0 R lun_switch -ffffffff826a85d0 R tag_switch -ffffffff826a8660 R load_dsa -ffffffff826a86c4 R siop_led_on -ffffffff826a86cc R siop_led_off -ffffffff826a86d8 R siop_switch -ffffffff826a9000 R ep_vortex_media -ffffffff826a9100 R ep_default_to_media -ffffffff826aa000 R wi_card_ident -ffffffff826ac000 R ucode_table -ffffffff826ad000 r re_revisions -ffffffff826ad290 r re_kstats_tpl -ffffffff826af000 R smc91cxx_media -ffffffff826af010 R smc91cxx_mii_bitbang_ops -ffffffff826b0000 R dl10019_mii_bitbang_ops -ffffffff826b0028 R dl10022_mii_bitbang_ops -ffffffff826b1000 R ax88190_mii_bitbang_ops -ffffffff826b3000 R ac97_audio_default -ffffffff826b3020 R ac97_on_off -ffffffff826b3324 R ac97_mic_select -ffffffff826b3628 R ac97_mono_select -ffffffff826b392c R ac97_source -ffffffff826b3c30 R ac97_volume_stereo -ffffffff826b3c4c R ac97_volume_mono -ffffffff826b3c70 R source_info -ffffffff826b4470 R ac97_ad -ffffffff826b4580 R ac97_ak -ffffffff826b4610 R ac97_av -ffffffff826b4750 R ac97_rl -ffffffff826b47a0 R ac97_cm -ffffffff826b4820 R ac97_cr -ffffffff826b4840 R ac97_cs -ffffffff826b4920 R ac97_cx -ffffffff826b4980 R ac97_dt -ffffffff826b49a0 R ac97_em -ffffffff826b49d0 R ac97_es -ffffffff826b49f0 R ac97_is -ffffffff826b4a10 R ac97_ic -ffffffff826b4a90 R ac97_it -ffffffff826b4ac0 R ac97_ns -ffffffff826b4b80 R ac97_ps -ffffffff826b4bb0 R ac97_sl -ffffffff826b4bd0 R ac97_st -ffffffff826b4d20 R ac97_vi -ffffffff826b4d50 R ac97_tt -ffffffff826b4dd0 R ac97_ti -ffffffff826b4df0 R ac97_wb -ffffffff826b4e10 R ac97_wo -ffffffff826b4ea0 R ac97_ym -ffffffff826b4ef0 R ac97_vendors -ffffffff826b51f0 R ac97enhancement -ffffffff826b52f0 R ac97feature -ffffffff826b6000 R lm_chips -ffffffff826b6020 R lm78_sensors -ffffffff826b61a0 R w83627hf_sensors -ffffffff826b63a0 R w83627ehf_sensors -ffffffff826b65c0 R w83627dhg_sensors -ffffffff826b67c0 R nct6776f_sensors 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dmub_dcn20_setup_outbox0 +ffffffff82239cd0 T dmub_dcn20_get_outbox0_wptr +ffffffff82239d00 T dmub_dcn20_set_outbox0_rptr +ffffffff82239d30 T dmub_dcn20_is_hw_init +ffffffff82239d90 T dmub_dcn20_is_supported +ffffffff82239df0 T dmub_dcn20_set_gpint +ffffffff82239e20 T dmub_dcn20_is_gpint_acked +ffffffff82239e80 T dmub_dcn20_get_gpint_response +ffffffff82239eb0 T dmub_dcn20_get_fw_boot_status +ffffffff82239ee0 T dmub_dcn20_enable_dmub_boot_options +ffffffff82239f10 T dmub_dcn20_skip_dmub_panel_power_sequence +ffffffff82239f70 T dmub_dcn20_get_current_time +ffffffff82239fa0 T dmub_dcn20_get_diagnostic_data +ffffffff8223b000 T dmub_dcn21_is_phy_init +ffffffff8223c000 T dmub_dcn30_backdoor_load +ffffffff8223c260 T dmub_dcn30_setup_windows +ffffffff8223d000 T dmub_dcn31_reset +ffffffff8223d280 T dmub_dcn31_reset_release +ffffffff8223d350 T dmub_dcn31_backdoor_load +ffffffff8223d5b0 T dmub_dcn31_setup_windows +ffffffff8223d8f0 T dmub_dcn31_setup_mailbox +ffffffff8223d940 T dmub_dcn31_get_inbox1_rptr +ffffffff8223d970 T dmub_dcn31_set_inbox1_wptr +ffffffff8223d9a0 T dmub_dcn31_setup_out_mailbox +ffffffff8223d9f0 T dmub_dcn31_get_outbox1_wptr +ffffffff8223da20 T dmub_dcn31_set_outbox1_rptr +ffffffff8223da50 T dmub_dcn31_is_hw_init +ffffffff8223dad0 T dmub_dcn31_is_supported +ffffffff8223db30 T dmub_dcn31_set_gpint +ffffffff8223db60 T dmub_dcn31_is_gpint_acked +ffffffff8223dbc0 T dmub_dcn31_get_gpint_response +ffffffff8223dbf0 T dmub_dcn31_get_gpint_dataout +ffffffff8223dd10 T dmub_dcn31_get_fw_boot_status +ffffffff8223dd40 T dmub_dcn31_enable_dmub_boot_options +ffffffff8223ddc0 T dmub_dcn31_skip_dmub_panel_power_sequence +ffffffff8223de20 T dmub_dcn31_setup_outbox0 +ffffffff8223de70 T dmub_dcn31_get_outbox0_wptr +ffffffff8223dea0 T dmub_dcn31_set_outbox0_rptr +ffffffff8223ded0 T dmub_dcn31_get_current_time +ffffffff8223df00 T dmub_dcn31_get_diagnostic_data +ffffffff8223e3a0 T dmub_dcn31_should_detect +ffffffff8223f000 T dmub_dcn32_reset +ffffffff8223f1d0 T dmub_dcn32_reset_release +ffffffff8223f2c0 T dmub_dcn32_backdoor_load +ffffffff8223f520 T dmub_dcn32_backdoor_load_zfb_mode +ffffffff8223f710 T dmub_dcn32_setup_windows +ffffffff8223fa50 T dmub_dcn32_setup_mailbox +ffffffff8223faa0 T dmub_dcn32_get_inbox1_rptr +ffffffff8223fad0 T dmub_dcn32_set_inbox1_wptr +ffffffff8223fb00 T dmub_dcn32_setup_out_mailbox +ffffffff8223fb50 T dmub_dcn32_get_outbox1_wptr +ffffffff8223fb80 T dmub_dcn32_set_outbox1_rptr +ffffffff8223fbb0 T dmub_dcn32_is_hw_init +ffffffff8223fc30 T dmub_dcn32_is_supported +ffffffff8223fc90 T dmub_dcn32_set_gpint +ffffffff8223fcc0 T dmub_dcn32_is_gpint_acked +ffffffff8223fd20 T dmub_dcn32_get_gpint_response +ffffffff8223fd50 T dmub_dcn32_get_gpint_dataout +ffffffff8223fe70 T dmub_dcn32_get_fw_boot_status +ffffffff8223fea0 T dmub_dcn32_enable_dmub_boot_options +ffffffff8223fed0 T dmub_dcn32_skip_dmub_panel_power_sequence +ffffffff8223ff30 T dmub_dcn32_setup_outbox0 +ffffffff8223ff80 T dmub_dcn32_get_outbox0_wptr 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dmub_srv_wait_for_phy_init +ffffffff82243280 T dmub_srv_wait_for_idle +ffffffff82243330 T dmub_srv_send_gpint_command +ffffffff82243420 T dmub_srv_get_gpint_response +ffffffff82243480 T dmub_srv_get_gpint_dataout +ffffffff822434e0 T dmub_srv_get_fw_boot_status +ffffffff82243550 T dmub_srv_cmd_with_reply_data +ffffffff822437c0 T dmub_srv_get_outbox0_msg +ffffffff82243860 T dmub_srv_get_diagnostic_data +ffffffff822438c0 T dmub_srv_should_detect +ffffffff82243910 T dmub_srv_clear_inbox0_ack +ffffffff82243960 T dmub_srv_wait_for_inbox0_ack +ffffffff822439f0 T dmub_srv_send_inbox0_cmd +ffffffff82244000 T dmub_srv_stat_get_notification +ffffffff82245000 T setup_x_points_distribution +ffffffff82245170 T log_x_points_distribution +ffffffff822451a0 T precompute_pq +ffffffff82245370 t compute_pq +ffffffff82245580 T precompute_de_pq +ffffffff822456e0 t compute_de_pq +ffffffff822459a0 T calculate_user_regamma_coeff +ffffffff82245d70 t apply_lut_1d +ffffffff822460a0 T calculate_user_regamma_ramp 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mod_freesync_calc_nominal_field_rate +ffffffff8224cd30 T mod_freesync_handle_preflip +ffffffff8224d150 T mod_freesync_handle_v_update +ffffffff8224d610 T mod_freesync_get_settings +ffffffff8224d680 T mod_freesync_calc_field_rate_from_timing +ffffffff8224d6d0 T mod_freesync_get_freesync_enabled +ffffffff8224d700 T mod_freesync_is_valid_range +ffffffff8224e000 T mod_build_vsc_infopacket +ffffffff8224e200 T mod_build_hf_vsif_infopacket +ffffffff8224f000 T dmub_init_abm_config +ffffffff8224f540 t fill_iram_v_2_3 +ffffffff8224f9a0 T dmcu_load_iram +ffffffff82250180 T is_psr_su_specific_panel +ffffffff82250210 T mod_power_calc_psr_configs +ffffffff82250310 T mod_power_only_edp +ffffffff82251000 T mod_vmid_get_for_ptb +ffffffff82251230 T mod_vmid_reset +ffffffff822512f0 T mod_vmid_create +ffffffff82251430 T mod_vmid_destroy +ffffffff82252000 T amdgpu_dpm_get_sclk +ffffffff82252090 T amdgpu_dpm_get_mclk +ffffffff82252120 T amdgpu_dpm_set_powergating_by_smu +ffffffff82252200 T amdgpu_dpm_set_gfx_power_up_by_imu +ffffffff82252310 T amdgpu_dpm_baco_enter +ffffffff822523a0 T amdgpu_dpm_baco_exit +ffffffff82252430 T amdgpu_dpm_set_mp1_state +ffffffff822524d0 T amdgpu_dpm_is_baco_supported +ffffffff82252580 T amdgpu_dpm_mode2_reset +ffffffff82252610 T amdgpu_dpm_baco_reset +ffffffff822526c0 T amdgpu_dpm_is_mode1_reset_supported +ffffffff82252730 T amdgpu_dpm_mode1_reset +ffffffff822527b0 T amdgpu_dpm_switch_power_profile +ffffffff82252860 T amdgpu_dpm_set_xgmi_pstate +ffffffff82252900 T amdgpu_dpm_set_df_cstate +ffffffff822529a0 T amdgpu_dpm_allow_xgmi_power_down +ffffffff82252a20 T amdgpu_dpm_enable_mgpu_fan_boost +ffffffff82252ab0 T amdgpu_dpm_set_clockgating_by_smu +ffffffff82252b50 T amdgpu_dpm_smu_i2c_bus_access +ffffffff82252bf0 T amdgpu_pm_acpi_event_handler +ffffffff82252cb0 T amdgpu_dpm_read_sensor +ffffffff82252d70 T amdgpu_dpm_compute_clocks +ffffffff82252e50 T amdgpu_dpm_enable_uvd +ffffffff82253040 T amdgpu_dpm_enable_vce +ffffffff82253230 T amdgpu_dpm_enable_jpeg +ffffffff82253330 T amdgpu_pm_load_smu_firmware +ffffffff822533e0 T amdgpu_dpm_handle_passthrough_sbr +ffffffff82253460 T amdgpu_dpm_send_hbm_bad_pages_num +ffffffff822534e0 T amdgpu_dpm_send_hbm_bad_channel_flag +ffffffff82253560 T amdgpu_dpm_get_dpm_freq_range +ffffffff82253600 T amdgpu_dpm_set_soft_freq_range +ffffffff822536a0 T amdgpu_dpm_write_watermarks_table +ffffffff82253720 T amdgpu_dpm_wait_for_event +ffffffff822537b0 T amdgpu_dpm_set_residency_gfxoff +ffffffff82253830 T amdgpu_dpm_get_residency_gfxoff +ffffffff822538b0 T amdgpu_dpm_get_entrycount_gfxoff +ffffffff82253930 T amdgpu_dpm_get_status_gfxoff +ffffffff822539b0 T amdgpu_dpm_get_thermal_throttling_counter +ffffffff82253a00 T amdgpu_dpm_gfx_state_change +ffffffff82253a70 T amdgpu_dpm_get_ecc_info +ffffffff82253af0 T amdgpu_dpm_get_vce_clock_state +ffffffff82253b80 T amdgpu_dpm_get_current_power_state +ffffffff82253bf0 T amdgpu_dpm_set_power_state +ffffffff82253d50 T amdgpu_dpm_dispatch_task +ffffffff82253df0 T amdgpu_dpm_get_performance_level +ffffffff82253e80 T amdgpu_dpm_force_performance_level +ffffffff82254060 T amdgpu_dpm_get_pp_num_states +ffffffff822540f0 T amdgpu_dpm_get_pp_table +ffffffff82254180 T amdgpu_dpm_set_fine_grain_clk_vol +ffffffff82254220 T amdgpu_dpm_odn_edit_dpm_table +ffffffff822542c0 T amdgpu_dpm_print_clock_levels +ffffffff82254350 T amdgpu_dpm_emit_clock_levels +ffffffff822543f0 T amdgpu_dpm_set_ppfeature_status +ffffffff82254480 T amdgpu_dpm_get_ppfeature_status +ffffffff82254510 T amdgpu_dpm_force_clock_level +ffffffff822545a0 T amdgpu_dpm_get_sclk_od +ffffffff82254620 T amdgpu_dpm_set_sclk_od +ffffffff822547a0 T amdgpu_dpm_get_mclk_od +ffffffff82254820 T amdgpu_dpm_set_mclk_od +ffffffff822549a0 T amdgpu_dpm_get_power_profile_mode +ffffffff82254a30 T amdgpu_dpm_set_power_profile_mode +ffffffff82254ad0 T amdgpu_dpm_get_gpu_metrics +ffffffff82254b60 T amdgpu_dpm_get_fan_control_mode +ffffffff82254bf0 T amdgpu_dpm_set_fan_speed_pwm +ffffffff82254c80 T amdgpu_dpm_get_fan_speed_pwm +ffffffff82254d10 T amdgpu_dpm_get_fan_speed_rpm +ffffffff82254da0 T amdgpu_dpm_set_fan_speed_rpm +ffffffff82254e30 T amdgpu_dpm_set_fan_control_mode +ffffffff82254ec0 T amdgpu_dpm_get_power_limit +ffffffff82254f70 T amdgpu_dpm_set_power_limit +ffffffff82255000 T amdgpu_dpm_is_cclk_dpm_supported +ffffffff82255070 T amdgpu_dpm_debugfs_print_current_performance_level +ffffffff82255100 T amdgpu_dpm_get_smu_prv_buf_details +ffffffff822551a0 T amdgpu_dpm_is_overdrive_supported +ffffffff82255240 T amdgpu_dpm_set_pp_table +ffffffff822552e0 T amdgpu_dpm_get_num_cpu_cores +ffffffff82255330 T amdgpu_dpm_stb_debug_fs_init +ffffffff82255380 T amdgpu_dpm_display_configuration_change +ffffffff82255410 T amdgpu_dpm_get_clock_by_type +ffffffff822554b0 T amdgpu_dpm_get_display_mode_validation_clks +ffffffff82255540 T amdgpu_dpm_get_clock_by_type_with_latency +ffffffff822555e0 T amdgpu_dpm_get_clock_by_type_with_voltage +ffffffff82255680 T amdgpu_dpm_set_watermarks_for_clocks_ranges +ffffffff82255710 T amdgpu_dpm_display_clock_voltage_request +ffffffff822557a0 T amdgpu_dpm_get_current_clocks +ffffffff82255830 T amdgpu_dpm_notify_smu_enable_pwe +ffffffff822558b0 T amdgpu_dpm_set_active_display_count +ffffffff82255940 T amdgpu_dpm_set_min_deep_sleep_dcefclk +ffffffff822559d0 T amdgpu_dpm_set_hard_min_dcefclk_by_freq +ffffffff82255a70 T amdgpu_dpm_set_hard_min_fclk_by_freq +ffffffff82255b10 T amdgpu_dpm_display_disable_memory_clock_switch +ffffffff82255ba0 T amdgpu_dpm_get_max_sustainable_clocks_by_dc +ffffffff82255c30 T amdgpu_dpm_get_uclk_dpm_states +ffffffff82255cd0 T amdgpu_dpm_get_dpm_clock_table +ffffffff82256000 T amdgpu_dpm_get_active_displays +ffffffff822560a0 T amdgpu_dpm_get_vblank_time +ffffffff82256150 T amdgpu_dpm_get_vrefresh +ffffffff82257000 T amdgpu_pm_sysfs_init +ffffffff82257030 T amdgpu_pm_sysfs_fini +ffffffff82257060 T amdgpu_debugfs_pm_init +ffffffff82258000 T amdgpu_dpm_print_class_info +ffffffff822582b0 T amdgpu_dpm_print_cap_info +ffffffff82258340 T amdgpu_dpm_print_ps_status +ffffffff822583d0 T amdgpu_pm_print_power_states +ffffffff82258490 T amdgpu_get_platform_caps +ffffffff82258530 T amdgpu_parse_extended_power_table +ffffffff82259540 T amdgpu_free_extended_power_table +ffffffff82259650 T amdgpu_add_thermal_controller +ffffffff82259a80 T amdgpu_get_vce_clock_state +ffffffff82259ac0 T amdgpu_legacy_dpm_compute_clocks +ffffffff82259f30 T amdgpu_dpm_thermal_work_handler +ffffffff8225b000 t pp_early_init +ffffffff8225b100 t pp_late_init +ffffffff8225b220 t pp_sw_init +ffffffff8225b240 t pp_sw_fini +ffffffff8225b2d0 t pp_hw_init +ffffffff8225b330 t pp_hw_fini +ffffffff8225b370 t pp_late_fini +ffffffff8225b3d0 t pp_suspend +ffffffff8225b3f0 t pp_resume +ffffffff8225b410 t pp_is_idle +ffffffff8225b440 t pp_wait_for_idle +ffffffff8225b470 t pp_sw_reset +ffffffff8225b4a0 t pp_set_clockgating_state +ffffffff8225b4d0 t pp_set_powergating_state +ffffffff8225b500 t pp_dpm_set_fan_control_mode +ffffffff8225b570 t pp_dpm_get_fan_control_mode +ffffffff8225b5e0 t pp_dpm_set_fan_speed_pwm +ffffffff8225b640 t pp_dpm_get_fan_speed_pwm +ffffffff8225b6a0 t pp_dpm_force_clock_level +ffffffff8225b700 t pp_dpm_print_clock_levels +ffffffff8225b760 t pp_dpm_emit_clock_levels +ffffffff8225b7c0 t pp_dpm_force_performance_level +ffffffff8225b860 t pp_dpm_get_sclk_od +ffffffff8225b8c0 t pp_dpm_set_sclk_od +ffffffff8225b920 t pp_dpm_get_mclk_od +ffffffff8225b980 t pp_dpm_set_mclk_od +ffffffff8225b9e0 t pp_dpm_read_sensor +ffffffff8225ba80 t pp_dpm_get_performance_level +ffffffff8225bac0 t pp_dpm_get_current_power_state +ffffffff8225bb40 t pp_dpm_get_fan_speed_rpm +ffffffff8225bba0 t pp_dpm_set_fan_speed_rpm +ffffffff8225bc00 t pp_dpm_get_pp_num_states +ffffffff8225bd40 t pp_dpm_get_pp_table +ffffffff8225bd90 t pp_dpm_set_pp_table +ffffffff8225bec0 t pp_dpm_switch_power_profile +ffffffff8225c000 t pp_dpm_get_vce_clock_state +ffffffff8225c050 t pp_dpm_dispatch_tasks +ffffffff8225c090 t pp_dpm_load_fw +ffffffff8225c100 t pp_dpm_fw_loading_complete +ffffffff8225c130 t pp_set_powergating_by_smu +ffffffff8225c2b0 t pp_set_clockgating_by_smu +ffffffff8225c320 t pp_set_power_limit +ffffffff8225c3e0 t pp_get_power_limit +ffffffff8225c480 t pp_get_power_profile_mode +ffffffff8225c4e0 t pp_set_power_profile_mode +ffffffff8225c540 t pp_set_fine_grain_clk_vol +ffffffff8225c5a0 t pp_odn_edit_dpm_table +ffffffff8225c600 t pp_dpm_set_mp1_state +ffffffff8225c660 t pp_smu_i2c_bus_access +ffffffff8225c6c0 t pp_gfx_state_change_set +ffffffff8225c720 t pp_dpm_get_sclk +ffffffff8225c770 t pp_dpm_get_mclk +ffffffff8225c7c0 t pp_display_configuration_change +ffffffff8225c810 t pp_get_display_power_level +ffffffff8225c850 t pp_get_current_clocks +ffffffff8225c970 t pp_get_clock_by_type +ffffffff8225c9c0 t pp_get_clock_by_type_with_latency +ffffffff8225ca10 t pp_get_clock_by_type_with_voltage +ffffffff8225ca60 t pp_set_watermarks_for_clocks_ranges +ffffffff8225caa0 t pp_display_clock_voltage_request +ffffffff8225cae0 t pp_get_display_mode_validation_clocks +ffffffff8225cb40 t pp_notify_smu_enable_pwe +ffffffff8225cba0 t pp_enable_mgpu_fan_boost +ffffffff8225cc00 t pp_set_active_display_count +ffffffff8225cc40 t pp_set_hard_min_dcefclk_by_freq +ffffffff8225cca0 t pp_set_hard_min_fclk_by_freq +ffffffff8225cd00 t pp_set_min_deep_sleep_dcefclk +ffffffff8225cd60 t pp_get_asic_baco_capability +ffffffff8225cdd0 t pp_get_asic_baco_state +ffffffff8225ce30 t pp_set_asic_baco_state +ffffffff8225cea0 t pp_get_ppfeature_status +ffffffff8225cf00 t pp_set_ppfeature_status +ffffffff8225cf50 t pp_asic_reset_mode_2 +ffffffff8225cfb0 t pp_set_df_cstate +ffffffff8225d010 t pp_set_xgmi_pstate +ffffffff8225d070 t pp_get_gpu_metrics +ffffffff8225d0d0 t pp_get_prv_buffer_details +ffffffff8225d150 t pp_pm_compute_clocks +ffffffff8225e000 T ci_baco_set_state +ffffffff8225f000 T baco_program_registers +ffffffff8225f0d0 t baco_cmd_handler +ffffffff8225f250 T soc15_baco_program_registers +ffffffff82260000 T fiji_baco_set_state +ffffffff82261000 T phm_setup_asic +ffffffff82261050 T phm_power_down_asic +ffffffff822610a0 T phm_set_power_state +ffffffff82261110 T phm_enable_dynamic_state_management +ffffffff822611c0 T phm_disable_dynamic_state_management +ffffffff82261260 T phm_force_dpm_levels +ffffffff822612b0 T phm_apply_state_adjust_rules +ffffffff82261300 T phm_apply_clock_adjust_rules +ffffffff82261350 T phm_powerdown_uvd +ffffffff822613a0 T phm_disable_clock_power_gatings +ffffffff822613f0 T phm_pre_display_configuration_changed +ffffffff82261450 T phm_display_configuration_changed +ffffffff822614b0 T phm_notify_smc_display_config_after_ps_adjustment +ffffffff82261510 T phm_stop_thermal_controller +ffffffff82261570 T phm_register_irq_handlers +ffffffff822615c0 T phm_start_thermal_controller +ffffffff82261700 T phm_check_smc_update_required_for_display_configuration +ffffffff82261760 T phm_check_states_equal +ffffffff822617b0 T phm_store_dal_configuration_data +ffffffff82261900 T phm_get_dal_power_level +ffffffff82261960 T phm_set_cpu_power_state +ffffffff822619b0 T phm_get_performance_level +ffffffff82261a10 T phm_get_clock_info +ffffffff82261b90 T phm_get_current_shallow_sleep_clocks +ffffffff82261be0 T phm_get_clock_by_type +ffffffff82261c30 T phm_get_clock_by_type_with_latency +ffffffff82261c80 T phm_get_clock_by_type_with_voltage +ffffffff82261cd0 T phm_set_watermarks_for_clocks_ranges +ffffffff82261d20 T phm_display_clock_voltage_request +ffffffff82261d70 T phm_get_max_high_clocks +ffffffff82261dc0 T phm_disable_smc_firmware_ctf +ffffffff82261e20 T phm_set_active_display_count +ffffffff82262000 T hwmgr_early_init +ffffffff82262470 T hwmgr_sw_init +ffffffff822624e0 T hwmgr_sw_fini +ffffffff82262530 T hwmgr_hw_init +ffffffff822626f0 T hwmgr_hw_fini +ffffffff822627b0 T hwmgr_suspend +ffffffff82262830 T hwmgr_resume +ffffffff822628d0 T hwmgr_handle_task +ffffffff82263000 T polaris_baco_set_state +ffffffff82264000 T pp_override_get_default_fuse_value +ffffffff82265000 T psm_init_power_state_table +ffffffff822652a0 T psm_fini_power_state_table +ffffffff82265360 T psm_set_boot_states +ffffffff82265420 T psm_set_performance_states +ffffffff822654e0 T psm_set_user_performance_state +ffffffff82265580 T psm_adjust_power_state_dynamic +ffffffff82266000 T atomctrl_initialize_mc_reg_table +ffffffff82266210 T atomctrl_initialize_mc_reg_table_v2_2 +ffffffff82266420 T atomctrl_set_engine_dram_timings_rv770 +ffffffff82266490 T atomctrl_get_memory_pll_dividers_si +ffffffff82266570 T atomctrl_get_memory_pll_dividers_vi +ffffffff822665f0 T atomctrl_get_memory_pll_dividers_ai +ffffffff822666a0 T atomctrl_get_engine_pll_dividers_kong +ffffffff82266720 T atomctrl_get_engine_pll_dividers_vi +ffffffff822667e0 T atomctrl_get_engine_pll_dividers_ai +ffffffff822668c0 T atomctrl_get_dfs_pll_dividers_vi +ffffffff82266980 T atomctrl_get_reference_clock +ffffffff822669e0 T atomctrl_is_voltage_controlled_by_gpio_v3 +ffffffff82266aa0 T atomctrl_get_voltage_table_v3 +ffffffff82266c00 T atomctrl_get_pp_assign_pin +ffffffff82266cf0 T atomctrl_calculate_voltage_evv_on_sclk +ffffffff82267070 T atomctrl_get_voltage_evv_on_sclk +ffffffff822670f0 T atomctrl_get_voltage_evv +ffffffff822671a0 T atomctrl_get_mpll_reference_clock +ffffffff82267210 T atomctrl_is_asic_internal_ss_supported +ffffffff82267260 T atomctrl_get_memory_clock_spread_spectrum +ffffffff82267360 T atomctrl_get_engine_clock_spread_spectrum +ffffffff82267460 T atomctrl_read_efuse +ffffffff82267510 T atomctrl_set_ac_timing_ai +ffffffff82267570 T atomctrl_get_voltage_evv_on_sclk_ai +ffffffff822675f0 T atomctrl_get_smc_sclk_range_table +ffffffff822676b0 T atomctrl_get_vddc_shared_railinfo +ffffffff82267720 T atomctrl_get_avfs_information +ffffffff822678a0 T atomctrl_get_svi2_info +ffffffff82267980 T atomctrl_get_leakage_id_from_efuse +ffffffff822679e0 T atomctrl_get_leakage_vddc_base_on_leakage +ffffffff82267b80 T atomctrl_get_voltage_range +ffffffff82267c40 T atomctrl_get_edc_hilo_leakage_offset_table +ffffffff82267cc0 T atomctrl_get_edc_leakage_table +ffffffff82268000 T pp_atomfwctrl_is_voltage_controlled_by_gpio_v4 +ffffffff822680d0 T pp_atomfwctrl_get_voltage_table_v4 +ffffffff82268290 T pp_atomfwctrl_get_pp_assign_pin +ffffffff82268370 T pp_atomfwctrl_enter_self_refresh +ffffffff822683a0 T pp_atomfwctrl_get_gpu_pll_dividers_vega10 +ffffffff82268450 T pp_atomfwctrl_get_avfs_information +ffffffff82268780 T pp_atomfwctrl_get_gpio_information +ffffffff82268820 T pp_atomfwctrl_get_clk_information_by_clkid +ffffffff822688a0 T pp_atomfwctrl_get_vbios_bootup_values +ffffffff82268c20 T pp_atomfwctrl_get_smc_dpm_information +ffffffff82269000 T encode_pcie_lane_width +ffffffff82269030 T decode_pcie_lane_width +ffffffff8226a000 t pp_tables_v1_0_initialize +ffffffff8226b430 t pp_tables_v1_0_uninitialize +ffffffff8226b5e0 T get_number_of_powerplay_table_entries_v1_0 +ffffffff8226b690 T get_powerplay_table_entry_v1_0 +ffffffff8226c000 T pp_tables_get_response_times +ffffffff8226c0d0 T pp_tables_get_num_of_entries +ffffffff8226c190 T pp_tables_get_entry +ffffffff8226c4f0 t init_non_clock_fields +ffffffff8226c670 t pp_tables_initialize +ffffffff8226dad0 t pp_tables_uninitialize +ffffffff8226dcd0 t get_number_of_vce_state_table_entries +ffffffff8226ddd0 t get_vce_state_table_entry +ffffffff8226e000 T smu10_init_function_pointers +ffffffff8226e040 t smu10_hwmgr_backend_init +ffffffff8226e710 t smu10_hwmgr_backend_fini +ffffffff8226e850 t smu10_setup_asic_task +ffffffff8226e8c0 t smu10_get_power_state_size +ffffffff8226e8f0 t smu10_apply_state_adjust_rules +ffffffff8226e920 t smu10_dpm_force_dpm_level +ffffffff8226eea0 t smu10_enable_dpm_tasks +ffffffff8226ef20 t smu10_disable_dpm_tasks +ffffffff8226ef50 t smu10_dpm_patch_boot_state +ffffffff8226ef80 t smu10_dpm_get_pp_table_entry +ffffffff8226efe0 t smu10_dpm_get_num_of_pp_table_entries +ffffffff8226f030 t smu10_powergate_vcn +ffffffff8226f0d0 t smu10_dpm_get_mclk +ffffffff8226f130 t smu10_dpm_get_sclk +ffffffff8226f180 t smu10_set_power_state_tasks +ffffffff8226f1f0 t smu10_set_cpu_power_state +ffffffff8226f220 t smu10_store_cc6_data +ffffffff8226f290 t smu10_get_dal_power_level +ffffffff8226f2c0 t smu10_get_performance_level +ffffffff8226f350 t smu10_get_current_shallow_sleep_clocks +ffffffff8226f3b0 t smu10_get_clock_by_type_with_latency +ffffffff8226f500 t smu10_get_clock_by_type_with_voltage +ffffffff8226f610 t smu10_set_watermarks_for_clocks_ranges +ffffffff8226f6e0 t smu10_display_clock_voltage_request +ffffffff8226f780 t smu10_get_max_high_clocks +ffffffff8226f7b0 t smu10_power_off_asic +ffffffff8226f800 t smu10_force_clock_level +ffffffff8226f9c0 t smu10_print_clock_levels +ffffffff8226fd60 t smu10_gfx_off_control +ffffffff8226fe70 t smu10_read_sensor +ffffffff8226fff0 t smu10_set_active_display_count +ffffffff82270050 t smu10_set_min_deep_sleep_dcefclk +ffffffff822700b0 t smu10_get_power_profile_mode +ffffffff822700f0 t smu10_set_power_profile_mode +ffffffff82270240 t smu10_set_fine_grain_clk_vol +ffffffff82270450 t smu10_powergate_mmhub +ffffffff82270470 t smu10_smus_notify_pwe +ffffffff82270490 t smu10_powergate_sdma +ffffffff822704b0 t smu10_set_hard_min_dcefclk_by_freq +ffffffff82270510 t smu10_set_hard_min_fclk_by_freq +ffffffff82270570 t smu10_set_hard_min_gfxclk_by_freq +ffffffff822705d0 t smu10_set_soft_max_gfxclk_by_freq +ffffffff82270630 t smu10_asic_reset +ffffffff82270650 t smu10_gfx_state_change +ffffffff82270690 t smu10_dpm_get_pp_table_entry_callback +ffffffff82271000 T smu7_baco_get_capability +ffffffff82271060 T smu7_baco_get_state +ffffffff822710b0 T smu7_baco_set_state +ffffffff82272000 T smu7_powerdown_uvd +ffffffff82272050 T smu7_disable_clock_power_gating +ffffffff822720e0 T smu7_powergate_uvd +ffffffff822721d0 T smu7_powergate_vce +ffffffff822722c0 T smu7_update_clock_gatings +ffffffff82272670 T smu7_powergate_gfx +ffffffff82273000 T smu7_get_sleep_divider_id_from_clock +ffffffff822730a0 T smu7_init_function_pointers +ffffffff82273100 t smu7_hwmgr_backend_init +ffffffff82274f50 t smu7_hwmgr_backend_fini +ffffffff82274fc0 t smu7_setup_asic_task +ffffffff82275330 t smu7_get_power_state_size +ffffffff82275360 t smu7_apply_state_adjust_rules +ffffffff822757e0 t smu7_force_dpm_level +ffffffff82275c10 t smu7_enable_dpm_tasks +ffffffff82278380 t smu7_disable_dpm_tasks +ffffffff82278ac0 t smu7_dpm_patch_boot_state +ffffffff82278c00 t smu7_get_pp_table_entry +ffffffff82279000 t smu7_get_number_of_powerplay_table_entries +ffffffff82279070 t smu7_dpm_get_mclk +ffffffff82279110 t smu7_dpm_get_sclk +ffffffff822791b0 t smu7_set_power_state_tasks +ffffffff82279f40 t smu7_notify_smc_display_config_after_ps_adjustment +ffffffff82279f70 t smu7_display_configuration_changed_task +ffffffff8227a130 t smu7_set_max_fan_rpm_output +ffffffff8227a160 t smu7_set_max_fan_pwm_output +ffffffff8227a180 t smu7_set_fan_control_mode +ffffffff8227a210 t smu7_get_fan_control_mode +ffffffff8227a250 t smu7_register_irq_handlers +ffffffff8227a300 t smu7_check_smc_update_required_for_display_configuration +ffffffff8227a3c0 t smu7_check_states_equal +ffffffff8227a560 t smu7_get_performance_level +ffffffff8227a600 t smu7_get_clock_by_type +ffffffff8227a7c0 t smu7_get_clock_by_type_with_latency +ffffffff8227a960 t smu7_set_watermarks_for_clocks_ranges +ffffffff8227aba0 t smu7_get_max_high_clocks +ffffffff8227ac20 t smu7_power_off_asic +ffffffff8227ac80 t smu7_force_clock_level +ffffffff8227ad90 t smu7_print_clock_levels +ffffffff8227b370 t smu7_get_sclk_od +ffffffff8227b3e0 t smu7_set_sclk_od +ffffffff8227b4a0 t smu7_get_mclk_od +ffffffff8227b510 t smu7_set_mclk_od +ffffffff8227b5d0 t smu7_read_sensor +ffffffff8227b8a0 t smu7_avfs_control +ffffffff8227b970 t smu7_notify_cac_buffer_info +ffffffff8227bb10 t smu7_get_thermal_temperature_range +ffffffff8227bba0 t smu7_get_power_profile_mode +ffffffff8227bbe0 t smu7_set_power_profile_mode +ffffffff8227be40 t smu7_odn_edit_dpm_table +ffffffff8227bff0 t phm_add_voltage +ffffffff8227c100 t smu7_get_profiling_clk +ffffffff8227c2c0 t smu7_check_dpm_table_updated +ffffffff8227c410 t smu7_odn_initial_default_setting +ffffffff8227c540 t smu7_set_dpm_event_sources +ffffffff8227c660 t smu7_get_pp_table_entry_callback_func_v0 +ffffffff8227cb60 t smu7_get_pp_table_entry_callback_func_v1 +ffffffff8227e000 T smu7_enable_didt_config +ffffffff8227e3c0 t smu7_program_pt_config_registers +ffffffff8227e5b0 t smu7_enable_didt +ffffffff8227e7a0 T smu7_disable_didt_config +ffffffff8227e860 T smu7_enable_smc_cac +ffffffff8227e8f0 T smu7_disable_smc_cac +ffffffff8227e980 T smu7_set_power_limit +ffffffff8227e9e0 T smu7_enable_power_containment +ffffffff8227eb70 T smu7_disable_power_containment +ffffffff8227ec90 T smu7_power_control_set_level +ffffffff8227f000 T smu7_fan_ctrl_get_fan_speed_info +ffffffff8227f080 T smu7_fan_ctrl_get_fan_speed_pwm +ffffffff8227f140 T smu7_fan_ctrl_get_fan_speed_rpm +ffffffff8227f1f0 T smu7_fan_ctrl_set_static_mode +ffffffff8227f320 T smu7_fan_ctrl_set_default_mode +ffffffff8227f400 T smu7_fan_ctrl_start_smc_fan_control +ffffffff8227f530 T smu7_fan_ctrl_stop_smc_fan_control +ffffffff8227f550 T smu7_fan_ctrl_set_fan_speed_pwm +ffffffff8227f740 T smu7_fan_ctrl_reset_fan_speed_to_default +ffffffff8227f930 T smu7_fan_ctrl_set_fan_speed_rpm +ffffffff8227fb10 T smu7_thermal_get_temperature +ffffffff8227fb70 T smu7_thermal_disable_alert +ffffffff8227fc10 T smu7_thermal_stop_thermal_controller +ffffffff8227fd90 T smu7_start_thermal_controller +ffffffff82280140 T smu7_thermal_ctrl_uninitialize_thermal_controller +ffffffff82281000 T smu8_init_function_pointers +ffffffff82281040 t smu8_hwmgr_backend_init +ffffffff82281520 t smu8_hwmgr_backend_fini +ffffffff822815a0 t smu8_setup_asic_task +ffffffff82281ac0 t smu8_get_power_state_size +ffffffff82281af0 t smu8_apply_state_adjust_rules +ffffffff82281c40 t smu8_dpm_force_dpm_level +ffffffff82281f40 t smu8_enable_dpm_tasks +ffffffff82282090 t smu8_disable_dpm_tasks +ffffffff82282170 t smu8_dpm_patch_boot_state +ffffffff822821d0 t smu8_dpm_get_pp_table_entry +ffffffff82282230 t smu8_dpm_get_num_of_pp_table_entries +ffffffff82282280 t smu8_dpm_powerdown_uvd +ffffffff822822d0 t smu8_dpm_powergate_vce +ffffffff822824a0 t smu8_dpm_powergate_uvd +ffffffff822826d0 t smu8_dpm_powergate_acp +ffffffff82282730 t smu8_dpm_get_mclk +ffffffff82282760 t smu8_dpm_get_sclk +ffffffff822827d0 t smu8_set_power_state_tasks +ffffffff82282b20 t smu8_set_cpu_power_state +ffffffff82282ba0 t smu8_store_cc6_data +ffffffff82282c20 t smu8_get_dal_power_level +ffffffff82282ca0 t smu8_get_performance_level +ffffffff82282d90 t smu8_get_current_shallow_sleep_clocks +ffffffff82282df0 t smu8_get_clock_by_type +ffffffff82282f30 t smu8_get_max_high_clocks +ffffffff82282ff0 t smu8_power_off_asic +ffffffff82283070 t smu8_force_clock_level +ffffffff822830e0 t smu8_print_clock_levels +ffffffff822832b0 t smu8_read_sensor +ffffffff822835b0 t smu8_notify_cac_buffer_info +ffffffff82283660 t smu8_get_thermal_temperature_range +ffffffff822836e0 t smu8_dpm_get_pp_table_entry_callback +ffffffff82284000 T smu9_baco_get_capability +ffffffff822840d0 T smu9_baco_get_state +ffffffff82285000 T convert_to_vid +ffffffff82285050 T convert_to_vddc +ffffffff822850a0 T phm_copy_clock_limits_array +ffffffff82285180 T phm_copy_overdrive_settings_limits_array +ffffffff82285260 T phm_set_field_to_u32 +ffffffff822852c0 T phm_wait_on_register +ffffffff822853d0 T phm_wait_on_indirect_register +ffffffff82285500 T phm_wait_for_register_unequal +ffffffff82285600 T phm_wait_for_indirect_register_unequal +ffffffff82285730 T phm_cf_want_uvd_power_gating +ffffffff82285770 T phm_cf_want_vce_power_gating +ffffffff822857b0 T phm_trim_voltage_table +ffffffff822858e0 T phm_get_svi2_mvdd_voltage_table +ffffffff82285a70 T phm_get_svi2_vddci_voltage_table +ffffffff82285c00 T phm_get_svi2_vdd_voltage_table +ffffffff82285ca0 T phm_trim_voltage_table_to_fit_state_table +ffffffff82285d80 T phm_reset_single_dpm_table +ffffffff82285e50 T phm_setup_pcie_table_entry +ffffffff82285e90 T phm_get_dpm_level_enable_mask_value +ffffffff82285fb0 T phm_get_voltage_index +ffffffff82286030 T phm_get_voltage_id +ffffffff822860b0 T phm_find_closest_vddci +ffffffff82286110 T phm_find_boot_level +ffffffff82286180 T phm_get_sclk_for_voltage_evv +ffffffff82286230 T phm_initializa_dynamic_state_adjustment_rule_settings +ffffffff82286340 T phm_get_lowest_enabled_level +ffffffff82286380 T phm_apply_dal_min_voltage_request +ffffffff82286450 T phm_get_voltage_evv_on_sclk +ffffffff82286500 T phm_irq_process +ffffffff82286700 t orderly_poweroff +ffffffff82286710 T smu9_register_irq_handlers +ffffffff822867c0 T smu_atom_get_data_table +ffffffff82286830 T smu_get_voltage_dependency_table_ppt_v1 +ffffffff82286910 T smu_set_watermarks_for_clocks_ranges +ffffffff82287000 T tonga_baco_set_state +ffffffff82288000 T vega10_baco_set_state +ffffffff82289000 T vega10_enable_disable_vce_dpm +ffffffff82289090 T vega10_hwmgr_init +ffffffff822890f0 t vega10_hwmgr_backend_init +ffffffff82289ef0 t vega10_hwmgr_backend_fini +ffffffff82289f60 t vega10_setup_asic_task +ffffffff8228a090 t vega10_get_power_state_size +ffffffff8228a0c0 t vega10_apply_state_adjust_rules +ffffffff8228a450 t vega10_dpm_force_dpm_level +ffffffff8228a980 t vega10_enable_dpm_tasks +ffffffff8228d2f0 t vega10_disable_dpm_tasks +ffffffff8228d8d0 t vega10_patch_boot_state +ffffffff8228d900 t vega10_get_pp_table_entry +ffffffff8228d970 t vega10_power_gate_vce +ffffffff8228da10 t vega10_power_gate_uvd +ffffffff8228dab0 t vega10_dpm_get_mclk +ffffffff8228db50 t vega10_dpm_get_sclk +ffffffff8228dbf0 t vega10_set_power_state_tasks +ffffffff8228e680 t vega10_notify_smc_display_config_after_ps_adjustment +ffffffff8228e830 t vega10_display_configuration_changed_task +ffffffff8228e900 t vega10_set_fan_control_mode +ffffffff8228e970 t vega10_get_fan_control_mode +ffffffff8228e9b0 t vega10_check_smc_update_required_for_display_configuration +ffffffff8228ea10 t vega10_check_states_equal +ffffffff8228eb70 t vega10_get_dal_power_level +ffffffff8228ebb0 t vega10_get_performance_level +ffffffff8228ec50 t vega10_get_clock_by_type_with_latency +ffffffff8228ee80 t vega10_get_clock_by_type_with_voltage +ffffffff8228ef60 t vega10_set_watermarks_for_clocks_ranges +ffffffff8228efc0 t vega10_display_clock_voltage_request +ffffffff8228f040 t vega10_power_off_asic +ffffffff8228f0b0 t vega10_force_clock_level +ffffffff8228f1e0 t vega10_emit_clock_levels +ffffffff8228f350 t vega10_print_clock_levels +ffffffff8228fb30 t vega10_get_sclk_od +ffffffff8228fba0 t vega10_set_sclk_od +ffffffff8228fca0 t vega10_get_mclk_od +ffffffff8228fd10 t vega10_set_mclk_od +ffffffff8228fe00 t vega10_read_sensor +ffffffff82290050 t vega10_avfs_enable +ffffffff82290110 t vega10_notify_cac_buffer_info +ffffffff822901c0 t vega10_get_thermal_temperature_range +ffffffff822902a0 t vega10_get_power_profile_mode +ffffffff822902e0 t vega10_set_power_profile_mode +ffffffff82290400 t vega10_odn_edit_dpm_table +ffffffff822909c0 t vega10_get_ppfeature_status +ffffffff82290a40 t vega10_set_ppfeature_status +ffffffff82290ae0 t vega10_set_mp1_state +ffffffff82290b50 t vega10_disable_power_features_for_compute_performance +ffffffff82290d40 t vega10_upload_dpm_bootup_level +ffffffff82290e50 t vega10_upload_dpm_max_level +ffffffff82290f30 t vega10_trim_voltage_table_to_fit_state_table +ffffffff82291030 t vega10_odn_initial_default_setting +ffffffff82291200 t vega10_populate_all_graphic_levels +ffffffff82291400 t vega10_populate_all_memory_levels +ffffffff82291560 t vega10_populate_single_gfx_level +ffffffff822916b0 t vega10_populate_single_soc_level +ffffffff82291800 t vega10_populate_single_memory_level +ffffffff82291970 t vega10_get_pp_table_entry_callback_func +ffffffff82291b90 t vega10_odn_update_power_state +ffffffff82292000 T vega10_enable_didt_config +ffffffff82293870 T vega10_disable_didt_config +ffffffff82293ab0 T vega10_initialize_power_tune_defaults +ffffffff82293be0 T vega10_set_power_limit +ffffffff82293c30 T vega10_enable_power_containment +ffffffff82293d50 T vega10_disable_power_containment +ffffffff82293e20 T vega10_power_control_set_level +ffffffff82293e80 t vega10_didt_set_mask +ffffffff82295000 t vega10_pp_tables_initialize +ffffffff822969a0 t vega10_pp_tables_uninitialize +ffffffff82296b50 T vega10_get_number_of_powerplay_table_entries +ffffffff82296c00 T vega10_get_powerplay_table_entry +ffffffff82296d80 T vega10_baco_set_cap +ffffffff82297000 T vega10_fan_ctrl_get_fan_speed_info +ffffffff82297080 T vega10_fan_ctrl_get_fan_speed_pwm +ffffffff822971a0 T vega10_fan_ctrl_get_fan_speed_rpm +ffffffff822972a0 T vega10_fan_ctrl_set_static_mode +ffffffff82297550 T vega10_fan_ctrl_set_default_mode +ffffffff82297760 T vega10_fan_ctrl_start_smc_fan_control +ffffffff82297820 T vega10_fan_ctrl_stop_smc_fan_control +ffffffff822978e0 T vega10_fan_ctrl_set_fan_speed_pwm +ffffffff82297b00 T vega10_fan_ctrl_reset_fan_speed_to_default +ffffffff82297bc0 T vega10_fan_ctrl_set_fan_speed_rpm +ffffffff82297d90 T vega10_thermal_get_temperature +ffffffff82297e20 T vega10_thermal_disable_alert +ffffffff82297f30 T vega10_thermal_stop_thermal_controller +ffffffff82297f90 T vega10_enable_mgpu_fan_boost +ffffffff822980a0 T vega10_start_thermal_controller +ffffffff82298640 T vega10_thermal_ctrl_uninitialize_thermal_controller +ffffffff82299000 T vega12_baco_set_state +ffffffff8229a000 T vega12_enable_disable_vce_dpm +ffffffff8229a090 T vega12_hwmgr_init +ffffffff8229a0d0 t vega12_hwmgr_backend_init +ffffffff8229a930 t vega12_hwmgr_backend_fini +ffffffff8229a990 t vega12_setup_asic_task +ffffffff8229a9d0 t vega12_apply_clocks_adjust_rules +ffffffff8229adc0 t vega12_dpm_force_dpm_level +ffffffff8229b210 t vega12_enable_dpm_tasks +ffffffff8229bc80 t vega12_disable_dpm_tasks +ffffffff8229bd80 t vega12_patch_boot_state +ffffffff8229bdb0 t vega12_power_gate_vce +ffffffff8229be60 t vega12_power_gate_uvd +ffffffff8229bf10 t vega12_dpm_get_mclk +ffffffff8229bf60 t vega12_dpm_get_sclk +ffffffff8229bfb0 t vega12_notify_smc_display_config_after_ps_adjustment +ffffffff8229c110 t vega12_pre_display_configuration_changed_task +ffffffff8229c1f0 t vega12_display_configuration_changed_task +ffffffff8229c2d0 t vega12_set_fan_control_mode +ffffffff8229c330 t vega12_get_fan_control_mode +ffffffff8229c370 t vega12_check_smc_update_required_for_display_configuration +ffffffff8229c3d0 t vega12_get_dal_power_level +ffffffff8229c400 t vega12_get_performance_level +ffffffff8229c430 t vega12_get_clock_by_type_with_latency +ffffffff8229c710 t vega12_get_clock_by_type_with_voltage +ffffffff8229c740 t vega12_set_watermarks_for_clocks_ranges +ffffffff8229c7c0 t vega12_display_clock_voltage_request +ffffffff8229c840 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vega12_fan_ctrl_reset_fan_speed_to_default +ffffffff822a0140 T vega12_thermal_get_temperature +ffffffff822a01d0 T vega12_thermal_disable_alert +ffffffff822a0260 T vega12_thermal_stop_thermal_controller +ffffffff822a02f0 T vega12_start_thermal_controller +ffffffff822a1000 T vega20_baco_get_capability +ffffffff822a10c0 T vega20_baco_get_state +ffffffff822a1150 T vega20_baco_set_state +ffffffff822a1350 T vega20_baco_apply_vdci_flush_workaround +ffffffff822a2000 T vega20_hwmgr_init +ffffffff822a2040 t vega20_hwmgr_backend_init +ffffffff822a2980 t vega20_hwmgr_backend_fini +ffffffff822a29e0 t vega20_setup_asic_task +ffffffff822a2ad0 t vega20_apply_clocks_adjust_rules +ffffffff822a2fc0 t vega20_dpm_force_dpm_level +ffffffff822a3730 t vega20_enable_dpm_tasks +ffffffff822a4ba0 t vega20_disable_dpm_tasks +ffffffff822a4d40 t vega20_power_gate_vce +ffffffff822a4e70 t vega20_power_gate_uvd +ffffffff822a4f20 t vega20_dpm_get_mclk +ffffffff822a5020 t vega20_dpm_get_sclk +ffffffff822a5120 t vega20_notify_smc_display_config_after_ps_adjustment +ffffffff822a5260 t vega20_pre_display_configuration_changed_task +ffffffff822a53c0 t vega20_display_configuration_changed_task +ffffffff822a54a0 t vega20_set_fan_control_mode +ffffffff822a5510 t vega20_get_fan_control_mode +ffffffff822a5550 t vega20_check_smc_update_required_for_display_configuration +ffffffff822a55b0 t vega20_get_dal_power_level +ffffffff822a55e0 t vega20_get_performance_level +ffffffff822a5610 t vega20_get_clock_by_type_with_latency +ffffffff822a5970 t vega20_get_clock_by_type_with_voltage +ffffffff822a59a0 t vega20_set_watermarks_for_clocks_ranges +ffffffff822a5a20 t vega20_display_clock_voltage_request +ffffffff822a5aa0 t vega20_power_off_asic +ffffffff822a5b10 t vega20_force_clock_level +ffffffff822a6130 t vega20_print_clock_levels +ffffffff822a7050 t vega20_get_sclk_od +ffffffff822a70c0 t vega20_set_sclk_od +ffffffff822a7250 t vega20_get_mclk_od +ffffffff822a72c0 t vega20_set_mclk_od +ffffffff822a7450 t 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vega20_pp_tables_uninitialize +ffffffff822ac000 T vega20_fan_ctrl_stop_smc_fan_control +ffffffff822ac090 T vega20_fan_ctrl_start_smc_fan_control +ffffffff822ac120 T vega20_fan_ctrl_get_fan_speed_pwm +ffffffff822ac240 T vega20_fan_ctrl_set_fan_speed_pwm +ffffffff822ac430 t vega20_fan_ctrl_set_static_mode +ffffffff822ac5e0 T vega20_fan_ctrl_get_fan_speed_info +ffffffff822ac620 T vega20_fan_ctrl_get_fan_speed_rpm +ffffffff822ac680 T vega20_fan_ctrl_set_fan_speed_rpm +ffffffff822ac820 T vega20_thermal_get_temperature +ffffffff822ac8b0 T vega20_thermal_disable_alert +ffffffff822ac940 T vega20_thermal_stop_thermal_controller +ffffffff822ac9d0 T vega20_start_thermal_controller +ffffffff822ad000 t ci_smu_init +ffffffff822ad060 t ci_smu_fini +ffffffff822ad0c0 t ci_start_smu +ffffffff822ad0f0 t ci_send_msg_to_smc +ffffffff822ad190 t ci_send_msg_to_smc_with_parameter +ffffffff822ad240 t ci_update_smc_table +ffffffff822ad490 t ci_process_firmware_header +ffffffff822ad9a0 t ci_update_sclk_threshold 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t iceland_is_dpm_running +ffffffff822b9760 t iceland_program_memory_timing_parameters +ffffffff822b9920 t iceland_populate_smc_voltage_table +ffffffff822ba000 t polaris10_smu_init +ffffffff822ba090 t polaris10_start_smu +ffffffff822ba640 t polaris10_update_smc_table +ffffffff822ba8b0 t polaris10_process_firmware_header +ffffffff822baa00 t polaris10_update_sclk_threshold +ffffffff822baae0 t polaris10_thermal_setup_fan_table +ffffffff822bad90 t polaris10_thermal_avfs_enable +ffffffff822bae20 t polaris10_init_smc_table +ffffffff822bce20 t polaris10_populate_all_graphic_levels +ffffffff822bd620 t polaris10_populate_all_memory_levels +ffffffff822bd970 t polaris10_initialize_mc_reg_table +ffffffff822bd9e0 t polaris10_get_offsetof +ffffffff822bda70 t polaris10_get_mac_definition +ffffffff822bdad0 t polaris10_is_dpm_running +ffffffff822bdb20 t polaris10_is_hw_avfs_present +ffffffff822bdb70 t polaris10_update_dpm_settings +ffffffff822bdf70 t polaris10_program_memory_timing_parameters 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tonga_update_sclk_threshold +ffffffff822c6940 t tonga_thermal_setup_fan_table +ffffffff822c6bc0 t tonga_init_smc_table +ffffffff822c8a10 t tonga_populate_all_graphic_levels +ffffffff822c8ff0 t tonga_populate_all_memory_levels +ffffffff822c96d0 t tonga_initialize_mc_reg_table +ffffffff822ca250 t tonga_get_offsetof +ffffffff822ca2e0 t tonga_get_mac_definition +ffffffff822ca340 t tonga_is_dpm_running +ffffffff822ca390 t tonga_update_dpm_settings +ffffffff822ca790 t tonga_program_memory_timing_parameters +ffffffff822ca950 t tonga_get_dependency_volt_by_clk +ffffffff822cb000 T vega10_enable_smc_features +ffffffff822cb040 T vega10_get_enabled_smc_features +ffffffff822cb0a0 t vega10_smu_init +ffffffff822cb3f0 t vega10_smu_fini +ffffffff822cb4d0 t vega10_start_smu +ffffffff822cb610 t vega10_is_dpm_running +ffffffff822cb660 t vega10_smc_table_manager +ffffffff822cc000 T vega12_enable_smc_features +ffffffff822cc0d0 T vega12_get_enabled_smc_features +ffffffff822cc190 t vega12_smu_init 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arcturus_get_fan_speed_rpm +ffffffff822da380 t arcturus_get_thermal_temperature_range +ffffffff822da470 t arcturus_set_performance_level +ffffffff822da580 t arcturus_dump_pptable +ffffffff822da5b0 t arcturus_get_power_limit +ffffffff822da6c0 t arcturus_set_df_cstate +ffffffff822da7e0 t arcturus_allow_xgmi_power_down +ffffffff822da8e0 t arcturus_i2c_control_init +ffffffff822daa10 t arcturus_i2c_control_fini +ffffffff822daa50 t arcturus_get_unique_id +ffffffff822dab70 t arcturus_init_smc_tables +ffffffff822dace0 t arcturus_setup_pptable +ffffffff822dae20 t arcturus_set_fan_speed_pwm +ffffffff822dafc0 t arcturus_set_fan_speed_rpm +ffffffff822db0e0 t arcturus_log_thermal_throttling_event +ffffffff822db4e0 t arcturus_get_gpu_metrics +ffffffff822db6f0 t arcturus_get_fan_parameters +ffffffff822db730 t arcturus_get_current_clk_freq_by_table +ffffffff822db870 t arcturus_get_smu_metrics_data +ffffffff822dbae0 t arcturus_upload_dpm_level +ffffffff822dbbd0 t arcturus_i2c_xfer +ffffffff822dbe90 t arcturus_i2c_func +ffffffff822dbec0 t arcturus_set_fan_static_mode +ffffffff822dd000 T cyan_skillfish_set_ppt_funcs +ffffffff822dd030 t cyan_skillfish_print_clk_levels +ffffffff822dd150 t cyan_skillfish_od_edit_dpm_table +ffffffff822dd440 t cyan_skillfish_read_sensor +ffffffff822dd5f0 t cyan_skillfish_is_dpm_running +ffffffff822dd690 t cyan_skillfish_init_smc_tables +ffffffff822dd770 t cyan_skillfish_get_enabled_mask +ffffffff822dd7b0 t cyan_skillfish_get_dpm_ultimate_freq +ffffffff822dd870 t cyan_skillfish_get_gpu_metrics +ffffffff822ddb10 t cyan_skillfish_get_smu_metrics_data +ffffffff822de000 T navi10_set_ppt_funcs +ffffffff822de050 t navi10_run_btc +ffffffff822de0d0 t navi10_get_allowed_feature_mask +ffffffff822de3a0 t navi10_set_default_dpm_table +ffffffff822de810 t navi10_populate_umd_state_clk +ffffffff822de990 t navi10_print_clk_levels +ffffffff822deb20 t navi10_emit_clk_levels +ffffffff822ded60 t navi10_force_clk_levels +ffffffff822dee90 t navi10_od_edit_dpm_table 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navi10_init_smc_tables +ffffffff822e0e10 t navi10_setup_pptable +ffffffff822e1030 t navi10_baco_enter +ffffffff822e1080 t navi10_baco_exit +ffffffff822e1180 t navi1x_get_gpu_metrics +ffffffff822e1b20 t navi10_enable_mgpu_fan_boost +ffffffff822e1ba0 t navi10_get_fan_parameters +ffffffff822e1be0 t navi10_post_smu_init +ffffffff822e1ed0 t navi10_get_default_config_table_settings +ffffffff822e1f20 t navi10_set_config_table +ffffffff822e1fd0 t navi1x_get_smu_metrics_data +ffffffff822e2430 t navi10_get_smu_metrics_data +ffffffff822e2660 t navi10_i2c_xfer +ffffffff822e2920 t navi10_i2c_func +ffffffff822e2950 t navi10_umc_hybrid_cdr_workaround +ffffffff822e3000 T sienna_cichlid_set_ppt_funcs +ffffffff822e3050 t sienna_cichlid_run_btc +ffffffff822e30d0 t sienna_cichlid_get_allowed_feature_mask +ffffffff822e3350 t sienna_cichlid_set_default_dpm_table +ffffffff822e3920 t sienna_cichlid_populate_umd_state_clk +ffffffff822e39e0 t sienna_cichlid_print_clk_levels +ffffffff822e3bc0 t sienna_cichlid_force_clk_levels +ffffffff822e3cf0 t sienna_cichlid_od_edit_dpm_table +ffffffff822e4290 t sienna_cichlid_restore_user_od_settings +ffffffff822e4320 t sienna_cichlid_get_power_profile_mode +ffffffff822e4570 t sienna_cichlid_set_power_profile_mode +ffffffff822e4840 t sienna_cichlid_dpm_set_vcn_enable +ffffffff822e4900 t sienna_cichlid_dpm_set_jpeg_enable +ffffffff822e4980 t sienna_cichlid_read_sensor +ffffffff822e4c80 t sienna_cichlid_pre_display_config_changed +ffffffff822e4cb0 t sienna_cichlid_display_config_changed +ffffffff822e4d10 t sienna_cichlid_notify_smc_display_config +ffffffff822e4ea0 t sienna_cichlid_is_dpm_running +ffffffff822e4ef0 t sienna_cichlid_get_fan_speed_rpm +ffffffff822e5000 t sienna_cichlid_set_watermarks_table +ffffffff822e51a0 t sienna_cichlid_get_thermal_temperature_range +ffffffff822e5270 t sienna_cichlid_get_uclk_dpm_states +ffffffff822e5390 t sienna_cichlid_set_default_od_settings +ffffffff822e5540 t sienna_cichlid_display_disable_memory_clock_switch +ffffffff822e55c0 t sienna_cichlid_dump_pptable +ffffffff822e55f0 t sienna_cichlid_get_power_limit +ffffffff822e56c0 t sienna_cichlid_update_pcie_parameters +ffffffff822e5820 t sienna_cichlid_i2c_control_init +ffffffff822e5950 t sienna_cichlid_i2c_control_fini +ffffffff822e5990 t sienna_cichlid_get_unique_id +ffffffff822e5ae0 t sienna_cichlid_init_smc_tables +ffffffff822e5e00 t sienna_cichlid_set_mp1_state +ffffffff822e5e40 t sienna_cichlid_setup_pptable +ffffffff822e62b0 t sienna_cichlid_system_features_control +ffffffff822e6340 t sienna_cichlid_baco_enter +ffffffff822e6390 t sienna_cichlid_baco_exit +ffffffff822e6490 t sienna_cichlid_is_mode1_reset_supported +ffffffff822e6510 t sienna_cichlid_is_mode2_reset_supported +ffffffff822e6540 t sienna_cichlid_mode2_reset +ffffffff822e6670 t sienna_cichlid_get_dpm_ultimate_freq +ffffffff822e6690 t sienna_cichlid_get_gpu_metrics +ffffffff822e6b10 t sienna_cichlid_enable_mgpu_fan_boost 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smu_v11_0_init_power +ffffffff822e8bd0 T smu_v11_0_fini_power +ffffffff822e8c30 T smu_v11_0_get_vbios_bootup_values +ffffffff822e8f90 T smu_v11_0_notify_memory_pool_location +ffffffff822e9080 T smu_v11_0_set_min_deep_sleep_dcefclk +ffffffff822e9100 T smu_v11_0_set_driver_table_location +ffffffff822e9170 T smu_v11_0_set_tool_table_location +ffffffff822e91e0 T smu_v11_0_init_display_count +ffffffff822e9240 T smu_v11_0_set_allowed_mask +ffffffff822e9310 T smu_v11_0_system_features_control +ffffffff822e9330 T smu_v11_0_notify_display_change +ffffffff822e93a0 T smu_v11_0_init_max_sustainable_clocks +ffffffff822e9610 t smu_v11_0_get_max_sustainable_clock +ffffffff822e9730 T smu_v11_0_get_current_power_limit +ffffffff822e9800 T smu_v11_0_set_power_limit +ffffffff822e9940 T smu_v11_0_interrupt_work +ffffffff822e99c0 T smu_v11_0_enable_thermal_alert +ffffffff822e9a60 T smu_v11_0_disable_thermal_alert +ffffffff822e9a80 T smu_v11_0_get_gfx_vdd +ffffffff822e9b40 T smu_v11_0_display_clock_voltage_request +ffffffff822e9c80 T smu_v11_0_set_hard_freq_limited_range +ffffffff822e9d60 T smu_v11_0_gfx_off_control +ffffffff822e9dd0 T smu_v11_0_get_fan_control_mode +ffffffff822e9e20 T smu_v11_0_set_fan_speed_pwm +ffffffff822e9fc0 t smu_v11_0_set_fan_static_mode +ffffffff822ea170 T smu_v11_0_set_fan_speed_rpm +ffffffff822ea290 T smu_v11_0_get_fan_speed_pwm +ffffffff822ea3d0 T smu_v11_0_get_fan_speed_rpm +ffffffff822ea4d0 T smu_v11_0_set_fan_control_mode +ffffffff822ea670 T smu_v11_0_set_xgmi_pstate +ffffffff822ea690 T smu_v11_0_register_irq_handler +ffffffff822ea750 T smu_v11_0_get_max_sustainable_clocks_by_dc +ffffffff822ea7e0 T smu_v11_0_set_azalia_d3_pme +ffffffff822ea800 T smu_v11_0_baco_set_armd3_sequence +ffffffff822ea820 T smu_v11_0_baco_is_support +ffffffff822ea8b0 T smu_v11_0_baco_get_state +ffffffff822ea8e0 T smu_v11_0_baco_set_state +ffffffff822eab90 T smu_v11_0_baco_enter +ffffffff822eac80 T smu_v11_0_baco_exit +ffffffff822ead20 T smu_v11_0_mode1_reset +ffffffff822eada0 T smu_v11_0_handle_passthrough_sbr +ffffffff822eadc0 T smu_v11_0_get_dpm_ultimate_freq +ffffffff822eaf00 T smu_v11_0_set_soft_freq_limited_range +ffffffff822eafe0 T smu_v11_0_set_performance_level +ffffffff822eb330 T smu_v11_0_set_power_source +ffffffff822eb390 T smu_v11_0_get_dpm_freq_by_index +ffffffff822eb440 T smu_v11_0_get_dpm_level_count +ffffffff822eb4e0 T smu_v11_0_set_single_dpm_table +ffffffff822eb6c0 T smu_v11_0_get_dpm_level_range +ffffffff822eb820 T smu_v11_0_get_current_pcie_link_width_level +ffffffff822eb870 T smu_v11_0_get_current_pcie_link_width +ffffffff822eb8d0 T smu_v11_0_get_current_pcie_link_speed_level +ffffffff822eb920 T smu_v11_0_get_current_pcie_link_speed +ffffffff822eb980 T smu_v11_0_gfx_ulv_control +ffffffff822eb9f0 T smu_v11_0_deep_sleep_control +ffffffff822ebba0 T smu_v11_0_restore_user_od_settings +ffffffff822ebc30 T smu_v11_0_set_smu_mailbox_registers +ffffffff822ebca0 t smu_v11_0_set_irq_state +ffffffff822ec220 t smu_v11_0_irq_process +ffffffff822ec520 t orderly_poweroff +ffffffff822ed000 T vangogh_set_ppt_funcs +ffffffff822ed040 t vangogh_set_default_dpm_tables +ffffffff822ed070 t vangogh_common_print_clk_levels +ffffffff822ed4c0 t vangogh_force_clk_levels +ffffffff822ed6f0 t vangogh_od_edit_dpm_table +ffffffff822edc50 t vangogh_get_power_profile_mode +ffffffff822edd20 t vangogh_set_power_profile_mode +ffffffff822ede50 t vangogh_dpm_set_vcn_enable +ffffffff822edea0 t vangogh_dpm_set_jpeg_enable +ffffffff822edef0 t vangogh_read_sensor +ffffffff822ee020 t vangogh_is_dpm_running +ffffffff822ee080 t vangogh_set_watermarks_table +ffffffff822ee210 t vangogh_set_performance_level +ffffffff822eeb40 t vangogh_get_power_limit +ffffffff822eecc0 t vangogh_get_ppt_limit +ffffffff822eed30 t vangogh_get_dpm_clock_table +ffffffff822eeea0 t vangogh_init_smc_tables +ffffffff822ef0f0 t vangogh_system_features_control +ffffffff822ef140 t vangogh_set_power_limit +ffffffff822ef2a0 t vangogh_get_gfxoff_status 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renoir_read_sensor +ffffffff822f1fb0 t renoir_is_dpm_running +ffffffff822f1ff0 t renoir_set_watermarks_table +ffffffff822f21a0 t renoir_set_performance_level +ffffffff822f26e0 t renoir_get_dpm_clock_table +ffffffff822f2a30 t renoir_init_smc_tables +ffffffff822f2ba0 t renoir_get_enabled_mask +ffffffff822f2be0 t renoir_get_dpm_ultimate_freq +ffffffff822f2e80 t renoir_get_gpu_metrics +ffffffff822f30a0 t renoir_gfx_state_change_set +ffffffff822f30d0 t renoir_set_fine_grain_gfx_freq_parameters +ffffffff822f3170 t renoir_force_dpm_limit_value +ffffffff822f4000 T smu_v12_0_check_fw_status +ffffffff822f4050 T smu_v12_0_check_fw_version +ffffffff822f4110 T smu_v12_0_powergate_sdma +ffffffff822f4150 T smu_v12_0_set_gfx_cgpg +ffffffff822f41b0 T smu_v12_0_get_gfxoff_status +ffffffff822f4240 T smu_v12_0_gfx_off_control +ffffffff822f4360 T smu_v12_0_fini_smc_tables +ffffffff822f4410 T smu_v12_0_set_default_dpm_tables +ffffffff822f4440 T smu_v12_0_mode2_reset +ffffffff822f4460 T smu_v12_0_set_soft_freq_limited_range +ffffffff822f45a0 T smu_v12_0_set_driver_table_location +ffffffff822f4610 T smu_v12_0_get_vbios_bootup_values +ffffffff822f5000 T aldebaran_set_ppt_funcs +ffffffff822f5040 t aldebaran_get_allowed_feature_mask +ffffffff822f5090 t aldebaran_set_default_dpm_table +ffffffff822f5290 t aldebaran_populate_umd_state_clk +ffffffff822f5390 t aldebaran_print_clk_levels +ffffffff822f5550 t aldebaran_force_clk_levels +ffffffff822f5700 t aldebaran_usr_edit_dpm_table +ffffffff822f5920 t aldebaran_read_sensor +ffffffff822f5bc0 t aldebaran_is_dpm_running +ffffffff822f5c10 t aldebaran_get_thermal_temperature_range +ffffffff822f5ce0 t aldebaran_set_performance_level +ffffffff822f5d90 t aldebaran_get_power_limit +ffffffff822f5f20 t aldebaran_set_df_cstate +ffffffff822f5fa0 t aldebaran_allow_xgmi_power_down +ffffffff822f6040 t aldebaran_i2c_control_init +ffffffff822f6100 t aldebaran_i2c_control_fini +ffffffff822f6140 t aldebaran_get_unique_id +ffffffff822f6220 t aldebaran_init_smc_tables +ffffffff822f63b0 t aldebaran_set_mp1_state +ffffffff822f63f0 t aldebaran_setup_pptable +ffffffff822f64c0 t aldebaran_system_features_control +ffffffff822f6620 t aldebaran_set_power_limit +ffffffff822f66b0 t aldebaran_is_baco_supported +ffffffff822f66e0 t aldebaran_is_mode1_reset_supported +ffffffff822f6710 t aldebaran_is_mode2_reset_supported +ffffffff822f6740 t aldebaran_mode1_reset +ffffffff822f6820 t aldebaran_mode2_reset +ffffffff822f69e0 t aldebaran_set_soft_freq_limited_range +ffffffff822f6bf0 t aldebaran_log_thermal_throttling_event +ffffffff822f6f00 t aldebaran_get_gpu_metrics +ffffffff822f7190 t aldebaran_smu_handle_passthrough_sbr +ffffffff822f71b0 t aldebaran_smu_send_hbm_bad_page_num +ffffffff822f7240 t aldebaran_get_ecc_info +ffffffff822f73a0 t aldebaran_send_hbm_bad_channel_flag +ffffffff822f7480 t aldebaran_get_current_clk_freq_by_table +ffffffff822f75c0 t aldebaran_get_smu_metrics_data +ffffffff822f7810 t aldebaran_upload_dpm_level +ffffffff822f7900 t aldebaran_i2c_xfer +ffffffff822f7bb0 t aldebaran_i2c_func +ffffffff822f8000 T smu_v13_0_init_microcode +ffffffff822f81d0 T smu_v13_0_fini_microcode +ffffffff822f8250 T smu_v13_0_load_microcode +ffffffff822f8280 T smu_v13_0_init_pptable_microcode +ffffffff822f8430 T smu_v13_0_get_pptable_from_firmware +ffffffff822f8560 T smu_v13_0_check_fw_status +ffffffff822f85d0 T smu_v13_0_check_fw_version +ffffffff822f8700 T smu_v13_0_setup_pptable +ffffffff822f88a0 T smu_v13_0_init_smc_tables +ffffffff822f89f0 T smu_v13_0_fini_smc_tables +ffffffff822f8be0 T smu_v13_0_init_power +ffffffff822f8c60 T smu_v13_0_fini_power +ffffffff822f8ce0 T smu_v13_0_get_vbios_bootup_values +ffffffff822f8f90 T smu_v13_0_notify_memory_pool_location +ffffffff822f9050 T smu_v13_0_set_min_deep_sleep_dcefclk +ffffffff822f90d0 T smu_v13_0_set_driver_table_location +ffffffff822f9140 T smu_v13_0_set_tool_table_location +ffffffff822f91b0 T smu_v13_0_init_display_count +ffffffff822f91f0 T smu_v13_0_set_allowed_mask +ffffffff822f92c0 T smu_v13_0_gfx_off_control +ffffffff822f9330 T smu_v13_0_system_features_control +ffffffff822f9350 T smu_v13_0_notify_display_change +ffffffff822f93c0 T smu_v13_0_init_max_sustainable_clocks +ffffffff822f9630 t smu_v13_0_get_max_sustainable_clock +ffffffff822f9750 T smu_v13_0_get_current_power_limit +ffffffff822f9820 T smu_v13_0_set_power_limit +ffffffff822f9940 T smu_v13_0_enable_thermal_alert +ffffffff822f99d0 T smu_v13_0_disable_thermal_alert +ffffffff822f9a10 T smu_v13_0_get_gfx_vdd +ffffffff822f9ad0 T smu_v13_0_display_clock_voltage_request +ffffffff822f9c10 T smu_v13_0_set_hard_freq_limited_range +ffffffff822f9cf0 T smu_v13_0_get_fan_control_mode +ffffffff822f9d40 T smu_v13_0_set_fan_speed_pwm +ffffffff822f9f50 t smu_v13_0_set_fan_static_mode +ffffffff822fa110 T smu_v13_0_set_fan_control_mode +ffffffff822fa270 T smu_v13_0_set_fan_speed_rpm +ffffffff822fa410 T smu_v13_0_set_xgmi_pstate +ffffffff822fa430 T smu_v13_0_register_irq_handler +ffffffff822fa500 T smu_v13_0_get_max_sustainable_clocks_by_dc +ffffffff822fa590 T smu_v13_0_set_azalia_d3_pme +ffffffff822fa5b0 T smu_v13_0_wait_for_event +ffffffff822fa610 T smu_v13_0_get_dpm_ultimate_freq +ffffffff822fa770 T smu_v13_0_set_soft_freq_limited_range +ffffffff822fa850 T smu_v13_0_set_performance_level +ffffffff822fafe0 T smu_v13_0_set_power_source +ffffffff822fb040 T smu_v13_0_set_single_dpm_table +ffffffff822fb2d0 T smu_v13_0_get_dpm_level_range +ffffffff822fb450 T smu_v13_0_get_current_pcie_link_width_level +ffffffff822fb4a0 T smu_v13_0_get_current_pcie_link_width +ffffffff822fb500 T smu_v13_0_get_current_pcie_link_speed_level +ffffffff822fb550 T smu_v13_0_get_current_pcie_link_speed +ffffffff822fb5a0 T smu_v13_0_set_vcn_enable +ffffffff822fb650 T smu_v13_0_set_jpeg_enable +ffffffff822fb670 T smu_v13_0_run_btc +ffffffff822fb6f0 T smu_v13_0_gpo_control +ffffffff822fb780 T smu_v13_0_deep_sleep_control +ffffffff822fb9f0 T smu_v13_0_gfx_ulv_control +ffffffff822fba60 T smu_v13_0_baco_set_armd3_sequence +ffffffff822fba80 T smu_v13_0_baco_is_support +ffffffff822fbb10 T smu_v13_0_baco_get_state +ffffffff822fbb40 T smu_v13_0_baco_set_state +ffffffff822fbc00 T smu_v13_0_baco_enter +ffffffff822fbd10 T smu_v13_0_baco_exit +ffffffff822fbdb0 T smu_v13_0_set_gfx_power_up_by_imu +ffffffff822fbdf0 T smu_v13_0_od_edit_dpm_table +ffffffff822fc0b0 T smu_v13_0_set_default_dpm_tables +ffffffff822fc0e0 T smu_v13_0_set_smu_mailbox_registers +ffffffff822fc150 T smu_v13_0_mode1_reset +ffffffff822fc1d0 t smu_v13_0_set_irq_state +ffffffff822fc750 t smu_v13_0_irq_process +ffffffff822fca50 t orderly_poweroff +ffffffff822fd000 T smu_v13_0_0_set_ppt_funcs +ffffffff822fd0e0 t smu_v13_0_0_get_allowed_feature_mask +ffffffff822fd220 t smu_v13_0_0_set_default_dpm_table +ffffffff822fd650 t smu_v13_0_0_populate_umd_state_clk +ffffffff822fd780 t smu_v13_0_0_print_clk_levels +ffffffff822fd8a0 t smu_v13_0_0_force_clk_levels +ffffffff822fda20 t smu_v13_0_0_get_power_profile_mode +ffffffff822fdc70 t smu_v13_0_0_set_power_profile_mode +ffffffff822fdec0 t smu_v13_0_0_read_sensor +ffffffff822fe0e0 t smu_v13_0_0_is_dpm_running +ffffffff822fe130 t smu_v13_0_0_get_fan_speed_pwm +ffffffff822fe210 t smu_v13_0_0_get_fan_speed_rpm +ffffffff822fe280 t smu_v13_0_0_get_thermal_temperature_range +ffffffff822fe380 t smu_v13_0_0_dump_pptable +ffffffff822fe3b0 t smu_v13_0_0_get_power_limit +ffffffff822fe490 t smu_v13_0_0_set_df_cstate +ffffffff822fe4b0 t smu_v13_0_0_update_pcie_parameters +ffffffff822fe5a0 t smu_v13_0_0_i2c_control_init +ffffffff822fe6d0 t smu_v13_0_0_i2c_control_fini +ffffffff822fe710 t smu_v13_0_0_get_unique_id +ffffffff822fe7c0 t smu_v13_0_0_init_smc_tables +ffffffff822fe9b0 t smu_v13_0_0_set_mp1_state +ffffffff822fe9f0 t smu_v13_0_0_setup_pptable +ffffffff822feb30 t smu_v13_0_0_system_features_control +ffffffff822feb40 t smu_v13_0_0_baco_enter +ffffffff822feb90 t smu_v13_0_0_baco_exit +ffffffff822febf0 t smu_v13_0_0_is_mode1_reset_supported +ffffffff822fec50 t smu_v13_0_0_mode1_reset +ffffffff822fece0 t smu_v13_0_0_get_dpm_ultimate_freq +ffffffff822fee00 t smu_v13_0_0_get_gpu_metrics +ffffffff822ff230 t smu_v13_0_0_enable_mgpu_fan_boost +ffffffff822ff280 t smu_v13_0_0_smu_send_bad_mem_page_num +ffffffff822ff310 t smu_v13_0_0_send_bad_mem_channel_flag +ffffffff822ff3a0 t smu_v13_0_0_get_smu_metrics_data +ffffffff822ff710 t smu_v13_0_get_throttler_status +ffffffff822ff8d0 t smu_v13_0_0_i2c_xfer +ffffffff822ffb80 t smu_v13_0_0_i2c_func +ffffffff82300000 T smu_v13_0_4_set_ppt_funcs +ffffffff823000b0 t smu_v13_0_4_print_clk_levels +ffffffff82300170 t smu_v13_0_4_force_clk_levels +ffffffff82300410 t smu_v13_0_4_read_sensor +ffffffff823006c0 t smu_v13_0_4_is_dpm_running +ffffffff82300710 t smu_v13_0_4_set_watermarks_table +ffffffff823008a0 t smu_v13_0_4_set_performance_level +ffffffff82300de0 t smu_v13_0_4_init_smc_tables +ffffffff82300f50 t smu_v13_0_4_fini_smc_tables +ffffffff82301000 t smu_v13_0_4_system_features_control +ffffffff82301050 t smu_v13_0_4_mode2_reset +ffffffff82301070 t smu_v13_0_4_get_dpm_ultimate_freq +ffffffff82301490 t smu_v13_0_4_get_gpu_metrics +ffffffff82301660 t smu_v13_0_4_set_fine_grain_gfx_freq_parameters +ffffffff823016c0 t smu_v13_0_4_get_smu_metrics_data +ffffffff82302000 T smu_v13_0_5_set_ppt_funcs +ffffffff82302090 t smu_v13_0_5_set_default_dpm_tables +ffffffff823020c0 t smu_v13_0_5_print_clk_levels +ffffffff82302170 t smu_v13_0_5_force_clk_levels +ffffffff823022d0 t smu_v13_0_5_od_edit_dpm_table +ffffffff82302590 t smu_v13_0_5_dpm_set_vcn_enable +ffffffff823025b0 t smu_v13_0_5_dpm_set_jpeg_enable +ffffffff823025d0 t smu_v13_0_5_read_sensor +ffffffff823027f0 t smu_v13_0_5_is_dpm_running +ffffffff82302840 t smu_v13_0_5_set_watermarks_table +ffffffff823029d0 t smu_v13_0_5_set_performance_level +ffffffff82302bb0 t smu_v13_0_5_init_smc_tables +ffffffff82302d20 t smu_v13_0_5_fini_smc_tables +ffffffff82302dd0 t smu_v13_0_5_system_features_control +ffffffff82302e20 t smu_v13_0_5_mode2_reset +ffffffff82302ea0 t smu_v13_0_5_get_dpm_ultimate_freq +ffffffff823032e0 t smu_v13_0_5_get_gpu_metrics +ffffffff82303420 t smu_v13_0_5_set_fine_grain_gfx_freq_parameters +ffffffff82303480 t smu_v13_0_5_get_smu_metrics_data +ffffffff82304000 T smu_v13_0_7_set_ppt_funcs +ffffffff82304050 t smu_v13_0_7_get_allowed_feature_mask +ffffffff823041c0 t smu_v13_0_7_set_default_dpm_table +ffffffff823045f0 t smu_v13_0_7_populate_umd_state_clk +ffffffff82304720 t smu_v13_0_7_print_clk_levels +ffffffff82304840 t smu_v13_0_7_force_clk_levels +ffffffff823049c0 t smu_v13_0_7_get_power_profile_mode +ffffffff82304ca0 t smu_v13_0_7_set_power_profile_mode +ffffffff82304ee0 t smu_v13_0_7_read_sensor +ffffffff823050f0 t smu_v13_0_7_is_dpm_running +ffffffff82305140 t smu_v13_0_7_get_fan_speed_pwm +ffffffff82305220 t smu_v13_0_7_get_fan_speed_rpm +ffffffff82305290 t smu_v13_0_7_get_thermal_temperature_range +ffffffff82305380 t smu_v13_0_7_dump_pptable +ffffffff823053b0 t smu_v13_0_7_get_power_limit +ffffffff82305490 t smu_v13_0_7_set_df_cstate +ffffffff823054b0 t smu_v13_0_7_update_pcie_parameters +ffffffff823055a0 t smu_v13_0_7_init_smc_tables +ffffffff82305790 t smu_v13_0_7_check_fw_status +ffffffff823057e0 t smu_v13_0_7_set_mp1_state +ffffffff82305820 t smu_v13_0_7_setup_pptable +ffffffff82305980 t smu_v13_0_7_baco_enter +ffffffff823059d0 t smu_v13_0_7_baco_exit +ffffffff82305a30 t smu_v13_0_7_is_mode1_reset_supported +ffffffff82305a70 t smu_v13_0_7_get_dpm_ultimate_freq +ffffffff82305b90 t smu_v13_0_7_get_gpu_metrics +ffffffff82305fa0 t smu_v13_0_7_enable_mgpu_fan_boost +ffffffff82305ff0 t smu_v13_0_7_get_smu_metrics_data +ffffffff82306340 t smu_v13_0_7_get_throttler_status +ffffffff82307000 T yellow_carp_set_ppt_funcs +ffffffff82307040 t yellow_carp_set_default_dpm_tables +ffffffff82307070 t yellow_carp_print_clk_levels +ffffffff82307130 t yellow_carp_force_clk_levels +ffffffff823073d0 t yellow_carp_od_edit_dpm_table +ffffffff82307690 t yellow_carp_dpm_set_vcn_enable +ffffffff823076b0 t yellow_carp_dpm_set_jpeg_enable +ffffffff823076d0 t yellow_carp_read_sensor +ffffffff82307a70 t yellow_carp_is_dpm_running +ffffffff82307ac0 t yellow_carp_set_watermarks_table +ffffffff82307c50 t yellow_carp_set_performance_level +ffffffff82308190 t yellow_carp_init_smc_tables +ffffffff82308300 t yellow_carp_fini_smc_tables +ffffffff823083b0 t yellow_carp_system_features_control +ffffffff82308400 t yellow_carp_get_gfxoff_status +ffffffff82308490 t yellow_carp_mode2_reset +ffffffff82308510 t yellow_carp_get_dpm_ultimate_freq +ffffffff82308960 t yellow_carp_get_gpu_metrics +ffffffff82308b20 t yellow_carp_post_smu_init +ffffffff82308ba0 t yellow_carp_set_fine_grain_gfx_freq_parameters +ffffffff82308c00 t yellow_carp_get_smu_metrics_data +ffffffff82309000 T smu_cmn_send_msg_without_waiting +ffffffff82309170 T smu_cmn_wait_for_response +ffffffff823092b0 T smu_cmn_send_smc_msg_with_param +ffffffff823095d0 T smu_cmn_to_asic_specific_index +ffffffff823096e0 t __smu_cmn_reg_print_error +ffffffff82309930 T smu_cmn_send_smc_msg +ffffffff82309950 T smu_cmn_send_debug_smc_msg +ffffffff823099d0 T smu_cmn_feature_is_supported +ffffffff82309a80 T smu_cmn_feature_is_enabled +ffffffff82309b80 T smu_cmn_clk_dpm_is_enabled +ffffffff82309c80 T smu_cmn_get_enabled_mask +ffffffff82309d70 T smu_cmn_get_indep_throttler_status +ffffffff82309e20 T smu_cmn_feature_update_enable_state +ffffffff82309ec0 T smu_cmn_feature_set_enabled +ffffffff82309f90 T smu_cmn_get_pp_feature_mask +ffffffff8230a140 T smu_cmn_set_pp_feature_mask +ffffffff8230a240 T smu_cmn_disable_all_features_with_exception +ffffffff8230a2f0 T smu_cmn_get_smc_version +ffffffff8230a3c0 T smu_cmn_update_table +ffffffff8230a520 T smu_cmn_write_watermarks_table +ffffffff8230a5f0 T smu_cmn_write_pptable +ffffffff8230a6b0 T smu_cmn_get_metrics_table +ffffffff8230a810 T smu_cmn_get_combo_pptable +ffffffff8230a8e0 T smu_cmn_init_soft_gpu_metrics +ffffffff8230a9c0 T smu_cmn_set_mp1_state +ffffffff8230aa60 T smu_cmn_is_audio_func_enabled +ffffffff8230b000 T pci_mcfg_init +ffffffff8230b050 T pci_lookup_segment +ffffffff8230b0b0 T pci_attach_hook +ffffffff8230b0e0 T pci_bus_maxdevs +ffffffff8230b110 T pci_make_tag +ffffffff8230b180 T pci_decompose_tag +ffffffff8230b1e0 T pci_conf_size +ffffffff8230b240 T pci_mcfg_map_bus +ffffffff8230b2c0 T pci_conf_read +ffffffff8230b410 T pci_conf_write +ffffffff8230b550 T pci_msix_table_map +ffffffff8230b670 T pci_msix_table_unmap +ffffffff8230b710 T msi_hwmask +ffffffff8230b740 T msi_hwunmask +ffffffff8230b770 T msi_addroute +ffffffff8230b870 T msi_delroute +ffffffff8230b8e0 T pci_intr_map_msi +ffffffff8230b960 T msix_hwmask +ffffffff8230b990 T msix_hwunmask +ffffffff8230b9c0 T msix_addroute +ffffffff8230bbc0 T msix_delroute +ffffffff8230bd20 T pci_intr_map_msix +ffffffff8230bdf0 T pci_intr_map +ffffffff8230c010 T pci_intr_string +ffffffff8230c0f0 T pci_intr_establish +ffffffff8230c140 T pci_intr_establish_cpu +ffffffff8230c2a0 T pci_intr_disestablish +ffffffff8230c2c0 T pci_init_extents +ffffffff8230c4a0 T pci_probe_device_hook +ffffffff8230c4e0 T pci_dev_postattach +ffffffff8230c4f0 T pci_min_powerstate +ffffffff8230c500 T pci_set_powerstate_md +ffffffff8230d000 T pciide_machdep_compat_intr_establish +ffffffff8230d060 T pciide_machdep_compat_intr_disestablish +ffffffff8230e000 T vga_post_init +ffffffff8230e310 t vm86_emu_inb +ffffffff8230e360 t vm86_emu_inw +ffffffff8230e3a0 t vm86_emu_inl +ffffffff8230e3e0 t vm86_emu_outb +ffffffff8230e430 t vm86_emu_outw +ffffffff8230e470 t vm86_emu_outl +ffffffff8230e4b0 T vga_post_call +ffffffff8230e520 T vga_post_free +ffffffff8230e590 T ddb_vgapost +ffffffff8230f000 T pchbmatch +ffffffff8230f040 T pchbattach +ffffffff8230f4b0 T pchbactivate +ffffffff8230f520 T pchb_amd64ht_attach +ffffffff8230f670 T pchb_rnd +ffffffff8230f6f0 T pchb_print +ffffffff82310000 T amas_match +ffffffff82310050 T amas_attach +ffffffff823100b0 T amas_intl_nodes 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+ffffffff82319090 T xl_cardbus_attach +ffffffff82319420 T xl_cardbus_detach +ffffffff823194e0 T xl_cardbus_lookup +ffffffff823195a0 T xl_cardbus_intr_ack +ffffffff8231a000 T dc_cardbus_match +ffffffff8231a030 T dc_cardbus_attach +ffffffff8231a3c0 T dc_cardbus_detach +ffffffff8231a460 T dc_cardbus_setup +ffffffff8231b000 T fxp_cardbus_match +ffffffff8231b030 T fxp_cardbus_attach +ffffffff8231b240 T fxp_cardbus_detach +ffffffff8231b2d0 T fxp_cardbus_setup +ffffffff8231c000 t rl_cardbus_match +ffffffff8231c030 t rl_cardbus_attach +ffffffff8231c1d0 t rl_cardbus_detach +ffffffff8231c290 T rl_cardbus_setup +ffffffff8231d000 T re_cardbus_probe +ffffffff8231d030 T re_cardbus_attach +ffffffff8231d230 T re_cardbus_detach +ffffffff8231d310 T re_cardbus_setup +ffffffff8231e000 T ath_cardbus_match +ffffffff8231e050 T ath_cardbus_attach +ffffffff8231e180 T ath_cardbus_detach +ffffffff8231e250 T ath_cardbus_enable +ffffffff8231e320 T ath_cardbus_disable +ffffffff8231e370 T ath_cardbus_power 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ehci_cardbus_attach +ffffffff823252e0 T ehci_cardbus_detach +ffffffff82326000 T ohci_cardbus_match +ffffffff82326040 T ohci_cardbus_attach +ffffffff823262d0 T ohci_cardbus_detach +ffffffff82327000 T uhci_cardbus_match +ffffffff82327040 T uhci_cardbus_attach +ffffffff82327350 T uhci_cardbus_detach +ffffffff82328000 T malo_cardbus_match +ffffffff82328030 T malo_cardbus_attach +ffffffff82328270 T malo_cardbus_detach +ffffffff82328340 T malo_cardbus_enable +ffffffff823284b0 T malo_cardbus_disable +ffffffff82328500 T malo_cardbus_setup +ffffffff82329000 T bwi_cardbus_match +ffffffff82329030 T bwi_cardbus_attach +ffffffff823292a0 T bwi_cardbus_detach +ffffffff82329350 T bwi_cardbus_enable +ffffffff823294b0 T bwi_cardbus_disable +ffffffff82329500 T bwi_cardbus_setup +ffffffff823295a0 T bwi_cardbus_conf_read +ffffffff823295d0 T bwi_cardbus_conf_write +ffffffff8232a000 T rbus_pccbb_parent_mem +ffffffff8232a060 T rbus_pccbb_parent_io +ffffffff8232a0d0 T pccbb_attach_hook +ffffffff8232b000 T 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wsmux_do_ioctl +ffffffff8237b810 T wsmux_do_displayioctl +ffffffff8237b930 T wsmux_evsrc_set_display +ffffffff8237b980 T wsmuxattach +ffffffff8237b9b0 T wsmux_getmux +ffffffff8237bbf0 T wsmux_create +ffffffff8237bcc0 T wsmuxopen +ffffffff8237be20 T wsmux_detach_sc +ffffffff8237bf30 T wsmux_do_open +ffffffff8237c020 T wsmuxclose +ffffffff8237c120 T wsmux_do_close +ffffffff8237c1c0 T wsmuxread +ffffffff8237c240 T wsmuxioctl +ffffffff8237c270 T wsmux_add_mux +ffffffff8237c350 T wsmux_detach_sc_locked +ffffffff8237c440 T wsmuxkqfilter +ffffffff8237c4a0 T wsmux_depth +ffffffff8237c540 T wsmux_attach_sc +ffffffff8237c700 T wsmux_set_display +ffffffff8237c830 T wsmux_get_layout +ffffffff8237c860 T wsmux_set_layout +ffffffff8237d000 T wsemul_pick +ffffffff8237d070 T wsemul_getname +ffffffff8237e000 T wsemul_getchar +ffffffff8237e1d0 T wsemul_local_translate +ffffffff8237e490 T wsemul_utf8_translate +ffffffff8237f000 T wsemul_vt100_cnattach +ffffffff8237f200 T wsemul_vt100_attach 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wsemul_vt100_jump_scroll +ffffffff82382000 T wsemul_vt100_scrollup +ffffffff82382150 T wsemul_vt100_scrolldown +ffffffff823822a0 T wsemul_vt100_ed +ffffffff82382510 T wsemul_vt100_el +ffffffff82382600 T wsemul_vt100_handle_csi +ffffffff82383590 T vt100_ansimode +ffffffff82383600 T vt100_decmode +ffffffff82383730 T vt100_selectattribute +ffffffff82383870 T wsemul_vt100_handle_dcs +ffffffff82384000 T vt100_initchartables +ffffffff82384200 T vt100_setnrc +ffffffff82385000 T wsemul_vt100_translate +ffffffff82386000 T pckbdprobe +ffffffff82386120 T pckbdattach +ffffffff82386300 T pckbdactivate +ffffffff82386390 T pckbd_enable +ffffffff823864e0 T pckbd_set_leds +ffffffff82386570 T pckbd_ioctl +ffffffff823866c0 T pckbd_cngetc +ffffffff823868a0 T pckbd_cnpollc +ffffffff82386940 T pckbd_cnbell +ffffffff82386990 T pckbd_set_xtscancode +ffffffff82386b00 T pckbd_init +ffffffff82386b60 T pckbd_input +ffffffff82386dd0 T pckbd_scancode_translate +ffffffff82386ea0 T pckbd_bell +ffffffff82386ef0 T pckbd_hookup_bell +ffffffff82386f30 T pckbd_cnattach +ffffffff82387000 T pmsprobe +ffffffff823870a0 T pmsattach +ffffffff82387280 T pmsactivate +ffffffff823872e0 T pms_enable +ffffffff82387350 T pms_ioctl +ffffffff823873a0 T pms_disable +ffffffff823873e0 T pms_sec_enable +ffffffff82387450 T pms_sec_ioctl +ffffffff823874a0 T pms_sec_disable +ffffffff823874e0 T pms_ioctl_mouse +ffffffff82387600 T pms_sync_mouse +ffffffff82387660 T pms_proc_mouse +ffffffff82387700 T pms_enable_synaptics +ffffffff82387b30 T pms_ioctl_synaptics +ffffffff82387c00 T pms_sync_synaptics +ffffffff82387c60 T pms_proc_synaptics +ffffffff82387fb0 T pms_disable_synaptics +ffffffff82388090 T pms_enable_alps +ffffffff82388b10 T pms_ioctl_alps +ffffffff82388bc0 T pms_sync_alps +ffffffff82388c60 T pms_proc_alps +ffffffff82388eb0 T pms_enable_elantech_v1 +ffffffff823890c0 T pms_ioctl_elantech +ffffffff82389180 T pms_sync_elantech_v1 +ffffffff82389260 T pms_proc_elantech_v1 +ffffffff823893d0 T pms_enable_elantech_v2 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usb_detach +ffffffff8239b3e0 T usb_activate +ffffffff8239b500 T usb_create_task_threads +ffffffff8239b5a0 T usb_explore +ffffffff8239b740 T usb_attach_roothub +ffffffff8239b7e0 T usb_needs_explore +ffffffff8239b830 T usb_detach_roothub +ffffffff8239b920 T usb_wait_task +ffffffff8239b9c0 T usb_abort_task_thread +ffffffff8239bab0 T usb_task_thread +ffffffff8239bbd0 T usb_add_task +ffffffff8239bcf0 T usb_rem_task +ffffffff8239bdb0 T usb_rem_wait_task +ffffffff8239bec0 T usbctlprint +ffffffff8239bf10 T usbopen +ffffffff8239bf80 T usbclose +ffffffff8239bfb0 T usb_fill_udc_task +ffffffff8239c050 T usb_fill_udf_task +ffffffff8239c0c0 T usbioctl +ffffffff8239c670 T usb_needs_reattach +ffffffff8239c6c0 T usb_schedsoftintr +ffffffff8239c790 T usb_tap +ffffffff8239d000 T usbd_is_dying +ffffffff8239d040 T usbd_deactivate +ffffffff8239d070 T usbd_ref_incr +ffffffff8239d0a0 T usbd_ref_decr +ffffffff8239d0e0 T usbd_ref_wait +ffffffff8239d160 T usbd_get_devcnt +ffffffff8239d190 T usbd_claim_iface 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usbd_parse_idesc +ffffffff823a2200 T usbd_free_iface_data +ffffffff823a2270 T usbd_set_config +ffffffff823a22c0 T usbd_set_config_no +ffffffff823a2390 T usbd_set_config_index +ffffffff823a2850 T usbd_setup_pipe +ffffffff823a2940 T usbd_set_address +ffffffff823a2a00 T usbd_getnewaddr +ffffffff823a2a90 T usbd_probe_and_attach +ffffffff823a3010 T usbd_print +ffffffff823a3120 T usbd_new_device +ffffffff823a39a0 T usbd_reload_device_desc +ffffffff823a3a10 T usb_free_device +ffffffff823a3b80 T usbd_fill_deviceinfo +ffffffff823a3ee0 T usbd_get_cdesc +ffffffff823a4000 T usbd_detach +ffffffff823a5000 T usbd_find_quirk +ffffffff823a6000 T uhub_match +ffffffff823a6060 T uhub_attach +ffffffff823a6520 T uhub_detach +ffffffff823a6650 T uhub_explore +ffffffff823a68f0 T uhub_intr +ffffffff823a6a40 T uhub_port_connect +ffffffff823a7000 T uaudio_match +ffffffff823a7070 T uaudio_attach +ffffffff823a71d0 T uaudio_detach +ffffffff823a7380 T uaudio_open +ffffffff823a7480 T uaudio_close +ffffffff823a74a0 T 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umb_decode_ip_configuration +ffffffff82487700 T umb_rxeof +ffffffff82487830 T umb_decap +ffffffff82487ad0 T umb_txeof +ffffffff82487b70 T umb_send_encap_command +ffffffff82487c60 T umb_ctrl_msg +ffffffff82487f30 T umb_cmd1 +ffffffff82488030 T umb_send_connect +ffffffff82488210 T umb_decode_qmi +ffffffff82489000 T uath_match +ffffffff82489070 T uath_attach +ffffffff82489810 T uath_detach +ffffffff82489a20 T uath_attachhook +ffffffff82489b00 T uath_loadfirmware +ffffffff82489e10 T uath_open_pipes +ffffffff82489fb0 T uath_task +ffffffff8248a430 T uath_next_scan +ffffffff8248a470 T uath_stat +ffffffff8248a4e0 T uath_alloc_tx_cmd_list +ffffffff8248a5a0 T uath_alloc_rx_cmd_list +ffffffff8248a660 T uath_cmd_rxeof +ffffffff8248a790 T uath_reset +ffffffff8248a900 T uath_query_eeprom +ffffffff8248aa60 T uath_alloc_tx_data_list +ffffffff8248ab20 T uath_alloc_rx_data_list +ffffffff8248ac50 T uath_ioctl +ffffffff8248ad30 T uath_start +ffffffff8248aee0 T uath_watchdog +ffffffff8248af70 T uath_newstate +ffffffff8248b010 T uath_media_change +ffffffff8248b070 T uath_close_pipes +ffffffff8248b120 T uath_free_tx_data_list +ffffffff8248b240 T uath_free_rx_cmd_list +ffffffff8248b290 T uath_free_tx_cmd_list +ffffffff8248b3b0 T uath_free_rx_data_list +ffffffff8248b420 T uath_init +ffffffff8248bb80 T uath_cmd_write +ffffffff8248bba0 T uath_set_led +ffffffff8248bc00 T uath_switch_channel +ffffffff8248bd30 T uath_set_rates +ffffffff8248bdd0 T uath_cmd +ffffffff8248bff0 T uath_cmd_read +ffffffff8248c010 T uath_write_reg +ffffffff8248c0b0 T uath_write_multi +ffffffff8248c170 T uath_read_reg +ffffffff8248c210 T uath_read_eeprom +ffffffff8248c2d0 T uath_data_rxeof +ffffffff8248c600 T uath_tx_null +ffffffff8248c740 T uath_data_txeof +ffffffff8248c840 T uath_tx_data +ffffffff8248cb10 T uath_stop +ffffffff8248cc40 T uath_reset_tx_queues +ffffffff8248cd10 T uath_wme_init +ffffffff8248ce00 T uath_set_chan +ffffffff8248ce80 T uath_set_key +ffffffff8248d020 T uath_set_keys +ffffffff8248d2b0 T uath_set_rxfilter +ffffffff8248e000 T athn_usb_match +ffffffff8248e070 T athn_usb_attach +ffffffff8248e1b0 T athn_usb_detach +ffffffff8248e260 T athn_usb_read +ffffffff8248e300 T athn_usb_write +ffffffff8248e390 T athn_usb_write_barrier +ffffffff8248e3f0 T athn_usb_task +ffffffff8248e4b0 T athn_usb_open_pipes +ffffffff8248e660 T athn_usb_alloc_tx_cmd +ffffffff8248e700 T athn_usb_attachhook +ffffffff8248e8c0 T athn_usb_wait_async +ffffffff8248e8f0 T athn_usb_close_pipes +ffffffff8248e9c0 T athn_usb_free_tx_cmd +ffffffff8248ea10 T athn_usb_free_tx_list +ffffffff8248eb40 T athn_usb_free_rx_list +ffffffff8248eb90 T athn_usb_load_firmware +ffffffff8248ed80 T athn_usb_htc_setup +ffffffff8248f0c0 T athn_usb_ioctl +ffffffff8248f270 T athn_usb_start +ffffffff8248f3f0 T athn_usb_watchdog +ffffffff8248f480 T athn_usb_node_alloc +ffffffff8248f4a0 T athn_usb_newauth +ffffffff8248f670 T athn_usb_newassoc +ffffffff8248f7a0 T athn_usb_node_free +ffffffff8248f8a0 T athn_usb_updateslot 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uow_ow_bit +ffffffff824947b0 T uow_ow_read_byte +ffffffff82494830 T uow_ow_write_byte +ffffffff82494890 T uow_ow_read_block +ffffffff82494920 T uow_ow_write_block +ffffffff82494990 T uow_ow_matchrom +ffffffff82494a60 T uow_cmd +ffffffff82494ba0 T uow_read +ffffffff82494cb0 T uow_write +ffffffff82494d90 T uow_ow_search +ffffffff82495000 T uberry_match +ffffffff82495070 T uberry_attach +ffffffff824951f0 T uberry_detach +ffffffff82495220 T uberry_charge +ffffffff824952d0 T uberry_pearlmode +ffffffff82496000 T upd_match +ffffffff82496140 T upd_attach +ffffffff824963c0 T upd_detach +ffffffff824964b0 T upd_lookup_usage_entry +ffffffff82496570 T upd_intr +ffffffff824965a0 T upd_attach_sensor_tree +ffffffff82496870 T upd_refresh +ffffffff82496990 T upd_request_children +ffffffff82496ab0 T upd_update_report_cb +ffffffff82496bd0 T upd_lookup_sensor +ffffffff82496c40 T upd_sensor_invalidate +ffffffff82496cc0 T upd_sensor_update +ffffffff82497000 T uwacom_match +ffffffff824970c0 T uwacom_attach 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hidpp20_feature_get_id +ffffffff8249cc80 T hidpp_send_fap_report +ffffffff8249cd60 T hidpp_send_rap_report +ffffffff8249ce20 T hidpp20_battery_status_is_charging +ffffffff8249ce60 T hidpp20_unified_battery_status_is_charging +ffffffff8249cea0 T hidpp_send_validate +ffffffff8249cef0 T hidpp_send_report +ffffffff8249e000 T ucc_match +ffffffff8249e0a0 T ucc_attach +ffffffff8249e1b0 T ucc_detach +ffffffff8249e210 T ucc_intr +ffffffff8249e250 T ucc_enable +ffffffff8249f000 T iic_match +ffffffff8249f050 T iic_attach +ffffffff8249f0c0 T iicbus_print +ffffffff8249f110 T iic_print +ffffffff8249f180 T iic_search +ffffffff8249f250 T iic_is_compatible +ffffffff824a0000 T iic_exec +ffffffff824a0220 T iic_smbus_write_byte +ffffffff824a0320 T iic_smbus_read_byte +ffffffff824a0380 T iic_smbus_receive_byte +ffffffff824a1000 T iicprobeinit +ffffffff824a1040 T iicprobenc +ffffffff824a10f0 T iicprobew +ffffffff824a11a0 T iicprobe +ffffffff824a1270 T lm75probe +ffffffff824a2790 T adm1032cloneprobe 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aibs_attach_new +ffffffff8250a3c0 T aibs_attach_sif +ffffffff8250a590 T aibs_notify +ffffffff8250a600 T aibs_add_sensor +ffffffff8250a850 T aibs_getpack +ffffffff8250a8d0 T aibs_refresh +ffffffff8250a930 T aibs_refresh_r +ffffffff8250aa70 T aibs_getvalue +ffffffff8250abc0 T aibs_find_cb +ffffffff8250b000 T aplgpio_match +ffffffff8250b060 T aplgpio_attach +ffffffff8250b300 T aplgpio_intr +ffffffff8250b440 T aplgpio_read_pin +ffffffff8250b490 T aplgpio_write_pin +ffffffff8250b500 T aplgpio_intr_establish +ffffffff8250b620 T aplgpio_intr_enable +ffffffff8250b6b0 T aplgpio_intr_disable +ffffffff8250c000 T bytgpio_match +ffffffff8250c060 T bytgpio_attach +ffffffff8250c320 T bytgpio_intr +ffffffff8250c450 T bytgpio_read_pin +ffffffff8250c4b0 T bytgpio_write_pin +ffffffff8250c530 T bytgpio_intr_establish +ffffffff8250c5a0 T bytgpio_intr_enable +ffffffff8250c690 T bytgpio_intr_disable +ffffffff8250d000 T chvgpio_match +ffffffff8250d060 T chvgpio_attach +ffffffff8250d300 T chvgpio_intr +ffffffff8250d3d0 T chvgpio_read_pin +ffffffff8250d480 T chvgpio_write_pin +ffffffff8250d540 T chvgpio_intr_establish +ffffffff8250d710 T chvgpio_intr_enable +ffffffff8250d7e0 T chvgpio_intr_disable +ffffffff8250d8b0 T chvgpio_opreg_handler +ffffffff8250d940 T chvgpio_check_pin +ffffffff8250e000 T glkgpio_match +ffffffff8250e060 T glkgpio_attach +ffffffff8250e300 T glkgpio_intr +ffffffff8250e440 T glkgpio_read_pin +ffffffff8250e4a0 T glkgpio_write_pin +ffffffff8250e510 T glkgpio_intr_establish +ffffffff8250e630 T glkgpio_intr_enable +ffffffff8250e6c0 T glkgpio_intr_disable +ffffffff8250f000 T pchgpio_match +ffffffff8250f060 T pchgpio_attach +ffffffff8250f4b0 T pchgpio_activate +ffffffff8250f560 T pchgpio_intr +ffffffff8250f780 T pchgpio_read_pin +ffffffff8250f870 T pchgpio_write_pin +ffffffff8250f980 T pchgpio_intr_establish +ffffffff8250fbb0 T pchgpio_intr_enable +ffffffff8250fcf0 T pchgpio_intr_disable +ffffffff8250fe30 T pchgpio_save +ffffffff8250fea0 T pchgpio_restore +ffffffff8250ff10 T pchgpio_find_group +ffffffff8250ff90 T pchgpio_intr_handle +ffffffff82510070 T pchgpio_save_pin +ffffffff82510240 T pchgpio_restore_pin +ffffffff82511000 T tipmic_match +ffffffff82511050 T tipmic_attach +ffffffff82511250 T tipmic_write_1 +ffffffff82511310 T tipmic_intr +ffffffff82511470 T tipmic_get_lpat +ffffffff825115a0 T tipmic_read_pin +ffffffff825115d0 T tipmic_write_pin +ffffffff82511600 T tipmic_thermal_opreg_handler +ffffffff82511e70 T tipmic_power_opreg_handler +ffffffff82512110 T tipmic_read_1 +ffffffff825121d0 T tipmic_raw_to_temp +ffffffff82513000 T ccpmic_match +ffffffff82513050 T ccpmic_attach +ffffffff82513130 T ccpmic_get_lpat +ffffffff82513250 T ccpmic_read_pin +ffffffff825133d0 T ccpmic_write_pin +ffffffff82513530 T ccpmic_thermal_opreg_handler +ffffffff82513770 T ccpmic_power_opreg_handler +ffffffff82513960 T ccpmic_read_1 +ffffffff82513a20 T ccpmic_write_1 +ffffffff82513ae0 T ccpmic_raw_to_temp +ffffffff82514000 T com_acpi_match +ffffffff82514120 T com_acpi_attach +ffffffff825143a0 T com_acpi_is_designware +ffffffff82514400 T com_acpi_intr_designware +ffffffff82514430 T com_acpi_is_console +ffffffff82515000 T sdhc_acpi_match +ffffffff82515060 T sdhc_acpi_attach +ffffffff82515360 T sdhc_acpi_parse_resources +ffffffff82515420 T sdhc_acpi_card_detect_gpio +ffffffff82515480 T sdhc_acpi_card_detect_intr +ffffffff825154c0 T sdhc_acpi_power_on +ffffffff82515540 T sdhc_acpi_explore +ffffffff82515570 T sdhc_acpi_card_detect_nonremovable +ffffffff825155a0 T sdhc_acpi_do_explore +ffffffff82516000 T dwiic_acpi_match +ffffffff82516050 T dwiic_acpi_attach +ffffffff82516410 T dwiic_acpi_parse_crs +ffffffff82516540 T dwiic_acpi_power +ffffffff82516650 T dwiic_acpi_get_params +ffffffff82516790 T dwiic_i2c_intr_establish +ffffffff82516810 T dwiic_i2c_intr_disestablish +ffffffff82516830 T dwiic_i2c_intr_string +ffffffff825168c0 T dwiic_acpi_acquire_bus +ffffffff82516910 T dwiic_acpi_release_bus +ffffffff82516940 T dwiic_acpi_bus_scan +ffffffff82516980 T dwiic_acpi_found_hid +ffffffff82516cb0 T dwiic_matchhids +ffffffff82516d40 T dwiic_acpi_found_ihidev +ffffffff82516fc0 T dwiic_acpi_found_iatp +ffffffff82518000 T acpicbkbd_match +ffffffff82518030 T acpicbkbd_attach +ffffffff825180d0 T acpicbkbd_activate +ffffffff82518120 T acpicbkbd_get_backlight +ffffffff825181a0 T acpicbkbd_set_backlight +ffffffff82518240 T acpicbkbd_write_backlight +ffffffff82519000 T acpials_match +ffffffff82519090 T acpials_attach +ffffffff82519230 T acpials_read +ffffffff825192b0 T acpials_addtask +ffffffff825192f0 T acpials_notify +ffffffff82519380 T acpials_update +ffffffff8251a000 T tpm_match +ffffffff8251a050 T tpm_attach +ffffffff8251a320 T tpm_activate +ffffffff8251a430 T tpm2_start_method +ffffffff8251a4b0 T tpm_probe +ffffffff8251a560 T tpm_init_tis +ffffffff8251a7d0 T tpm_init_crb +ffffffff8251ab10 T tpm_suspend +ffffffff8251ac00 T tpm_resume +ffffffff8251ac30 T tpm_write_tis +ffffffff8251afb0 T tpm_read_tis +ffffffff8251b190 T tpm_write_crb +ffffffff8251b5a0 T tpm_read_crb +ffffffff8251b8a0 T tpm_request_locality_tis +ffffffff8251b990 T tpm_request_locality_crb +ffffffff8251ba90 T tpm_release_locality_crb +ffffffff8251bae0 T tpm_release_locality_tis +ffffffff8251bb50 T tpm_getburst +ffffffff8251bc00 T tpm_status +ffffffff8251bc20 T tpm_waitfor +ffffffff8251bd00 T tpm_waitfor_status +ffffffff8251c000 T acpihve_match +ffffffff8251c0b0 T acpihve_attach +ffffffff8251d000 T acpisbs_match +ffffffff8251d030 T acpisbs_attach +ffffffff8251d2a0 T acpisbs_activate +ffffffff8251d380 T acpisbs_read +ffffffff8251d440 T acpisbs_setup_sensors +ffffffff8251d560 T acpisbs_refresh_sensors +ffffffff8251d6d0 T acpisbs_notify +ffffffff8251d810 T acpi_smbus_read +ffffffff8251e000 T surface_match +ffffffff8251e060 T surface_attach +ffffffff8251e0c0 T surface_hotkey +ffffffff8251f000 T ipmi_acpi_match +ffffffff8251f030 T ipmi_acpi_attach +ffffffff8251f260 T ipmi_acpi_parse_crs +ffffffff82520000 T amdgpio_match +ffffffff82520060 T amdgpio_attach +ffffffff825202a0 T amdgpio_activate +ffffffff82520390 T amdgpio_intr +ffffffff82520530 T amdgpio_read_pin +ffffffff82520580 T amdgpio_write_pin +ffffffff825205f0 T amdgpio_intr_establish +ffffffff825206e0 T amdgpio_intr_enable +ffffffff82520760 T amdgpio_intr_disable +ffffffff825207e0 T amdgpio_save +ffffffff82520860 T amdgpio_restore +ffffffff825208f0 T amdgpio_save_pin +ffffffff82520960 T amdgpio_restore_pin +ffffffff825209d0 T amdgpio_pin_intr +ffffffff82521000 T acpihid_match +ffffffff82521030 T acpihid_attach +ffffffff82521210 T acpihid_init_dsm +ffffffff82521370 T acpihid_eval +ffffffff82521590 T acpihid_notify +ffffffff825215f0 T acpihid_button_array_enable +ffffffff82522000 t iosf_acpi_match +ffffffff82522050 t iosf_acpi_attach +ffffffff82522140 t iosf_acpi_mbi_mdr_rd +ffffffff825221b0 t iosf_acpi_mbi_mdr_wr +ffffffff82523000 T acpi_match +ffffffff82523060 T acpi_attach +ffffffff825230a0 T acpi_probe +ffffffff82523240 T acpi_map +ffffffff82523330 T acpi_unmap +ffffffff82523380 T acpi_bus_space_map +ffffffff825233a0 T acpi_bus_space_unmap +ffffffff825233c0 T acpi_intr_establish +ffffffff82523510 T acpi_intr_disestablish +ffffffff82523520 T acpi_scan +ffffffff825236d0 T acpi_acquire_glk +ffffffff82523730 T acpi_release_glk +ffffffff82523780 T acpi_attach_machdep +ffffffff82523910 T acpi_sleep_cpu +ffffffff82523ad0 T acpi_resume_cpu +ffffffff82523bd0 T sleep_mp +ffffffff82523cd0 T resume_mp +ffffffff82523dc0 T acpi_iommu_device_map +ffffffff82524000 T hibernate_resume_machdep +ffffffff82524050 T hibernate_drop_to_real_mode +ffffffff82524060 T hibernate_activate_resume_pt_machdep +ffffffff825240a0 T hibernate_switch_stack_machdep +ffffffff825240e0 T hibernate_flush +ffffffff82524110 T acpi_savecpu +ffffffff82525000 T sleep_showstate +ffffffff82525100 T sleep_setstate +ffffffff82525160 T gosleep +ffffffff82525220 T sleep_abort +ffffffff82525250 T sleep_resume +ffffffff825252c0 T suspend_finish +ffffffff82526000 T acpipci_match +ffffffff82526030 T acpipci_attach +ffffffff825262f0 T acpipci_osc +ffffffff82526430 T acpipci_parse_resources +ffffffff82526540 T acpipci_attach_bus +ffffffff82526710 T acpipci_print +ffffffff82526780 T acpipci_attach_busses +ffffffff82527000 T efiopen +ffffffff82527040 T eficlose +ffffffff82527070 T efiioctl +ffffffff82527110 T efiioc_get_table +ffffffff82527270 T efiioc_var_get +ffffffff825274f0 T efiioc_var_next +ffffffff82527710 T efiioc_var_set +ffffffff825279c0 T efi_adapt_error +ffffffff82528000 T efi_match +ffffffff82528060 T efi_attach +ffffffff82528420 T efi_map_runtime +ffffffff825285a0 T efi_enter +ffffffff82528630 T efi_leave +ffffffff82528690 T efi_gettime +ffffffff82528860 T efi_settime +ffffffff825289c0 T efi_fault +ffffffff82529000 T vmm_probe +ffffffff82529050 T vmm_attach +ffffffff825293e0 T vmm_activate +ffffffff82529600 T vmm_enabled +ffffffff82529690 T vmm_quiesce_vmx +ffffffff82529860 T vmm_stop +ffffffff825299b0 T vmm_start +ffffffff82529aa0 T vmmopen +ffffffff82529af0 T vmmioctl +ffffffff82529f00 T vm_create +ffffffff8252a330 T vm_run +ffffffff8252a520 T vm_get_info +ffffffff8252a770 T vm_terminate +ffffffff8252a8e0 T vm_resetcpu +ffffffff8252aa40 T vm_intr_pending +ffffffff8252ab10 T vm_rwregs +ffffffff8252ac60 T vm_mprotect_ept +ffffffff8252af10 T vm_rwvmparams +ffffffff8252b0d0 T pledge_ioctl_vmm +ffffffff8252b1b0 T vmmclose +ffffffff8252b1e0 T vm_find +ffffffff8252b300 T vcpu_reset_regs +ffffffff8252b350 T vmm_init_pvclock +ffffffff8252b430 T vcpu_readregs_vmx +ffffffff8252b860 T vcpu_writeregs_vmx +ffffffff8252bcd0 T vcpu_readregs_svm +ffffffff8252c180 T vcpu_writeregs_svm +ffffffff8252c650 T vmm_get_guest_memtype +ffffffff8252c6d0 T vmx_mprotect_ept +ffffffff8252c950 T vmx_pmap_find_pte_ept +ffffffff8252ca20 T start_vmm_on_cpu +ffffffff8252cb00 T stop_vmm_on_cpu +ffffffff8252cba0 T vmclear_on_cpu +ffffffff8252cc20 T vm_create_check_mem_ranges +ffffffff8252cd80 T vm_impl_init +ffffffff8252ce30 T vm_teardown +ffffffff8252cfe0 T vcpu_init +ffffffff8252d0b0 T vm_impl_init_vmx +ffffffff8252d1d0 T vm_impl_init_svm +ffffffff8252d2f0 T vm_impl_deinit_vmx +ffffffff8252d320 T vm_impl_deinit_svm +ffffffff8252d350 T vm_impl_deinit +ffffffff8252d3c0 T vcpu_reload_vmcs_vmx +ffffffff8252d500 T vcpu_reset_regs_svm +ffffffff8252d8a0 T svm_setmsrbrw +ffffffff8252da10 T svm_setmsrbr +ffffffff8252dae0 T vmm_alloc_vpid +ffffffff8252dc00 T svm_setmsrbw +ffffffff8252dce0 T vmx_setmsrbr +ffffffff8252dd90 T vmx_setmsrbw +ffffffff8252de40 T vmx_setmsrbrw +ffffffff8252df50 T svm_set_clean +ffffffff8252dfa0 T svm_set_dirty +ffffffff8252dff0 T vcpu_reset_regs_vmx +ffffffff8252eba0 T vcpu_vmx_check_cap +ffffffff8252eca0 T vcpu_vmx_compute_ctrl +ffffffff8252ee80 T vcpu_init_vmx +ffffffff8252f220 T vcpu_deinit_vmx +ffffffff8252f3a0 T vcpu_init_svm +ffffffff8252f530 T vcpu_deinit_svm +ffffffff8252f670 T vmm_free_vpid +ffffffff8252f6e0 T vcpu_deinit +ffffffff8252f730 T vcpu_run_vmx +ffffffff8252ff40 T vcpu_run_svm +ffffffff82530520 T vcpu_must_stop +ffffffff82530590 T vmm_fpurestore +ffffffff82530660 T vmm_fpusave +ffffffff825306e0 T vmm_translate_gva +ffffffff82530a10 T vmm_update_pvclock +ffffffff82530b10 T vmx_get_exit_info +ffffffff82530b70 T vmx_handle_exit +ffffffff82530f60 T vmx_instruction_error_decode +ffffffff82531130 T vmm_get_guest_cpu_cpl +ffffffff825311e0 T vmx_handle_intr +ffffffff82531270 T svm_handle_hlt +ffffffff825312c0 T vmx_handle_hlt +ffffffff82531370 T svm_handle_exit +ffffffff82531650 T svm_handle_np_fault +ffffffff82531800 T vmm_handle_cpuid +ffffffff82531e70 T svm_handle_msr +ffffffff82532130 T svm_handle_xsetbv +ffffffff82532180 T svm_handle_inout +ffffffff825322a0 T vmm_inject_ud +ffffffff825322d0 T vmm_inject_db +ffffffff82532300 T vmx_handle_np_fault +ffffffff82532480 T vmx_handle_inout +ffffffff82532620 T vmx_handle_cr +ffffffff82532890 T vmx_handle_rdmsr +ffffffff82532960 T vmx_handle_wrmsr +ffffffff82532bc0 T vmx_handle_xsetbv +ffffffff82532c50 T vmm_inject_gp +ffffffff82532c80 T vmx_get_exit_qualification +ffffffff82532ce0 T vmx_get_guest_faulttype +ffffffff82532d80 T svm_get_guest_faulttype +ffffffff82532db0 T svm_fault_page +ffffffff82532e40 T vmx_fault_page +ffffffff82532fa0 T vmm_get_guest_cpu_mode +ffffffff825330b0 T vmx_load_pdptes +ffffffff82533330 T vmx_handle_cr0_write +ffffffff82533540 T vmx_handle_cr4_write +ffffffff825335e0 T vmm_handle_xsetbv +ffffffff825336d0 T vmx_handle_misc_enable_msr +ffffffff82533730 T vmm_pat_is_valid +ffffffff82533810 T vmm_gpa_is_valid +ffffffff82533880 T vmx_exit_reason_decode +ffffffff825338c0 T svm_exit_reason_decode +ffffffff825346d0 T vcpu_state_decode +ffffffff82535000 T vmm_dispatch_intr +ffffffff82535020 T vmxon +ffffffff82535050 T vmxoff +ffffffff82535080 T vmclear +ffffffff825350b0 T vmptrld +ffffffff825350e0 T vmptrst +ffffffff82535110 T vmwrite +ffffffff82535140 T vmread +ffffffff82535170 T invvpid +ffffffff825351a0 T invept +ffffffff825351d0 T vmx_enter_guest +ffffffff825351fb t skip_init +ffffffff825352c8 t no_l1df_msr +ffffffff825352cb t l1df_tlb_loop +ffffffff825352e4 t l1df_tlb_done +ffffffff825352ec t l1df_load_cache +ffffffff82535303 t done_flush +ffffffff82535396 t do_resume +ffffffff8253541b t fail_launch_or_resume +ffffffff8253545d t fail_launch_unknown +ffffffff8253546a t fail_launch_invalid_vmcs +ffffffff82535477 t fail_launch_valid_vmcs +ffffffff82535494 t vmx_exit_handler_asm +ffffffff82535559 t restore_host +ffffffff825355f0 T svm_enter_guest +ffffffff82535780 t restore_host_svm +ffffffff82536000 T sdmmc_match +ffffffff82536050 T sdmmc_attach +ffffffff82536390 T sdmmc_detach +ffffffff82536440 T sdmmc_activate +ffffffff82536510 T sdmmc_discover_task +ffffffff825365d0 T sdmmc_create_thread +ffffffff82536640 T sdmmc_holds_root_device +ffffffff825366a0 T sdmmc_task_thread +ffffffff82536890 T sdmmc_needs_discover +ffffffff82536940 T sdmmc_del_task +ffffffff825369f0 T sdmmc_card_detach +ffffffff82536ad0 T sdmmc_add_task +ffffffff82536b50 T sdmmc_card_attach +ffffffff82536c60 T sdmmc_enable +ffffffff82536db0 T sdmmc_scan +ffffffff82536e40 T sdmmc_init +ffffffff82536f40 T sdmmc_disable +ffffffff825370a0 T sdmmc_function_free +ffffffff825370c0 T sdmmc_delay +ffffffff82537110 T sdmmc_select_card +ffffffff82537290 T sdmmc_set_bus_power +ffffffff82537450 T sdmmc_function_alloc +ffffffff825374e0 T sdmmc_app_command +ffffffff82537670 T sdmmc_mmc_command +ffffffff825376f0 T sdmmc_go_idle_state +ffffffff82537810 T sdmmc_send_if_cond +ffffffff82537960 T sdmmc_set_relative_addr +ffffffff82538000 T sdmmc_cisptr +ffffffff825380a0 T sdmmc_read_cis +ffffffff825383b0 T sdmmc_print_cis +ffffffff82538520 T sdmmc_check_cis_quirks +ffffffff82539000 T sdmmc_io_enable +ffffffff825392a0 T sdmmc_io_reset +ffffffff825393d0 T sdmmc_io_send_op_cond +ffffffff82539540 T sdmmc_io_scan +ffffffff82539690 T sdmmc_io_init +ffffffff825397c0 T sdmmc_io_set_highspeed +ffffffff82539a70 T sdmmc_io_set_bus_width +ffffffff82539d00 T sdmmc_io_function_ready +ffffffff82539e80 T sdmmc_io_read_1 +ffffffff82539fd0 T sdmmc_io_function_enable +ffffffff8253a3a0 T sdmmc_io_write_1 +ffffffff8253a520 T sdmmc_io_function_disable +ffffffff8253a7a0 T sdmmc_io_attach +ffffffff8253a890 T sdmmc_print +ffffffff8253aae0 T sdmmc_submatch +ffffffff8253ab60 T sdmmc_io_detach +ffffffff8253ac10 T sdmmc_io_rw_direct +ffffffff8253adb0 T sdmmc_io_rw_extended_subr +ffffffff8253af50 T sdmmc_io_rw_extended +ffffffff8253b340 T sdmmc_io_read_2 +ffffffff8253b4a0 T sdmmc_io_write_2 +ffffffff8253b600 T sdmmc_io_read_4 +ffffffff8253b760 T sdmmc_io_write_4 +ffffffff8253b8c0 T sdmmc_io_read_multi_1 +ffffffff8253b9b0 T sdmmc_io_write_multi_1 +ffffffff8253baa0 T sdmmc_io_read_region_1 +ffffffff8253bb90 T sdmmc_io_write_region_1 +ffffffff8253bc80 T sdmmc_io_xchg +ffffffff8253be10 T sdmmc_intr_enable +ffffffff8253c080 T sdmmc_intr_disable +ffffffff8253c2f0 T sdmmc_intr_establish +ffffffff8253c3f0 T sdmmc_intr_disestablish +ffffffff8253c4e0 T sdmmc_card_intr +ffffffff8253c530 T sdmmc_intr_task +ffffffff8253c5c0 T sdmmc_io_set_blocklen +ffffffff8253d000 T sdmmc_mem_enable +ffffffff8253d4e0 T sdmmc_mem_send_op_cond +ffffffff8253d690 T sdmmc_mem_signal_voltage +ffffffff8253d750 T sdmmc_mem_scan +ffffffff8253da60 T sdmmc_decode_csd +ffffffff8253de70 T sdmmc_decode_cid +ffffffff8253e2b0 T sdmmc_mem_send_scr +ffffffff8253e3f0 T sdmmc_mem_decode_scr +ffffffff8253e470 T sdmmc_mem_send_cxd_data +ffffffff8253e5e0 T sdmmc_mem_set_bus_width +ffffffff8253e700 T sdmmc_mem_sd_switch +ffffffff8253e9b0 T sdmmc_be512_to_bitfield512 +ffffffff8253ea60 T sdmmc_mem_mmc_switch +ffffffff8253eb50 T sdmmc_mem_init +ffffffff8253eca0 T sdmmc_mem_set_blocklen +ffffffff8253eda0 T sdmmc_mem_sd_init +ffffffff8253f350 T sdmmc_mem_mmc_init +ffffffff8253fc70 T sdmmc_mem_select_transfer_mode +ffffffff8253fcf0 T sdmmc_mem_execute_tuning +ffffffff8253fd80 T sdmmc_mem_read_block_subr +ffffffff825400e0 T sdmmc_mem_single_read_block +ffffffff825401b0 T sdmmc_mem_read_block +ffffffff82540370 T sdmmc_mem_write_block_subr +ffffffff825406c0 T sdmmc_mem_single_write_block +ffffffff82540790 T sdmmc_mem_write_block +ffffffff82540950 T sdmmc_mem_hibernate_write +ffffffff82541000 T sdmmc_scsi_cmd +ffffffff825411f0 T sdmmc_minphys +ffffffff82541270 T sdmmc_scsi_attach +ffffffff82541460 T sdmmc_alloc_ccbs +ffffffff825415a0 T sdmmc_free_ccbs +ffffffff82541600 T sdmmc_scsi_detach +ffffffff82541760 T sdmmc_stimeout +ffffffff825417e0 T sdmmc_ccb_alloc +ffffffff82541890 T sdmmc_ccb_free +ffffffff82541970 T sdmmc_inquiry +ffffffff82541be0 T sdmmc_start_xs +ffffffff82541cd0 T sdmmc_complete_xs +ffffffff82541da0 T sdmmc_done_xs +ffffffff82541df0 T sdmmc_scsi_hibernate_io +ffffffff82542000 T bwfm_sdio_preinit +ffffffff825424f0 T bwfm_sdio_txcheck +ffffffff82542530 T bwfm_sdio_txdata +ffffffff825425a0 T bwfm_sdio_txctl +ffffffff825426f0 T bwfm_sdio_buscore_read +ffffffff82542700 T bwfm_sdio_buscore_write +ffffffff82542720 T bwfm_sdio_buscore_prepare +ffffffff82542860 T bwfm_sdio_buscore_activate +ffffffff825428e0 T bwfm_sdio_match +ffffffff825429b0 T bwfm_sdio_attach +ffffffff82542c70 T bwfm_sdio_detach +ffffffff82542cd0 T bwfm_sdio_task +ffffffff82542e30 T bwfm_sdio_write_1 +ffffffff82542e60 T bwfm_sdio_read_1 +ffffffff82542e90 T bwfm_sdio_write_4 +ffffffff82542f40 T bwfm_sdio_read_4 +ffffffff82542ff0 T bwfm_sdio_load_microcode +ffffffff82543250 T bwfm_sdio_clkctl +ffffffff82543380 T bwfm_sdio_dev_write +ffffffff825433d0 T bwfm_sdio_intr +ffffffff82543410 T bwfm_sdio_ram_read_write +ffffffff82543640 T bwfm_sdio_htclk +ffffffff825438a0 T bwfm_sdio_readshared +ffffffff82543970 T bwfm_sdio_dev_read +ffffffff825439b0 T bwfm_sdio_rx_frames +ffffffff82543d40 T bwfm_sdio_tx_frames +ffffffff82543e20 T bwfm_sdio_backplane +ffffffff82543ed0 T bwfm_sdio_buf_read +ffffffff82543fb0 T bwfm_sdio_buf_write +ffffffff82544060 T bwfm_sdio_frame_read_write +ffffffff825441e0 T bwfm_sdio_newbuf +ffffffff82544260 T bwfm_sdio_tx_ok +ffffffff825442b0 T bwfm_sdio_tx_ctrlframe +ffffffff825443b0 T bwfm_sdio_tx_dataframe +ffffffff82544500 T bwfm_sdio_rx_glom +ffffffff82545000 T onewire_match +ffffffff82545050 T onewire_attach +ffffffff825450f0 T onewire_detach +ffffffff82545160 T onewire_activate +ffffffff82545180 T onewire_scan +ffffffff82545390 T onewire_createthread +ffffffff82545400 T onewire_print +ffffffff825454d0 T onewirebus_print +ffffffff82545520 T onewire_lock +ffffffff82545540 T onewire_unlock +ffffffff82545560 T onewire_reset +ffffffff82545580 T onewire_bit +ffffffff825455a0 T onewire_read_byte +ffffffff825456e0 T onewire_write_byte +ffffffff825457c0 T onewire_read_block +ffffffff82545860 T onewire_write_block +ffffffff82545900 T onewire_triplet +ffffffff825459e0 T onewire_matchrom +ffffffff82545b30 T onewire_search +ffffffff82545ec0 T onewire_thread +ffffffff82546000 T onewire_crc +ffffffff825460e0 T onewire_crc16 +ffffffff825461c0 T onewire_famname +ffffffff82546200 T onewire_matchbyfam +ffffffff82547000 T owid_match +ffffffff82547030 T owid_attach +ffffffff82547100 T owid_detach +ffffffff82547140 T owid_activate +ffffffff82548000 T owsbm_match +ffffffff82548030 T owsbm_attach +ffffffff825481d0 T owsbm_detach +ffffffff82548240 T owsbm_activate +ffffffff82548270 T owsbm_update +ffffffff82549000 T owtemp_match +ffffffff82549030 T owtemp_attach +ffffffff82549130 T owtemp_detach +ffffffff825491a0 T owtemp_activate +ffffffff825491d0 T owtemp_update +ffffffff8254a000 T owctr_match +ffffffff8254a030 T owctr_attach +ffffffff8254a180 T owctr_detach +ffffffff8254a1f0 T owctr_activate +ffffffff8254a220 T owctr_update +ffffffff8254a250 T owctr_update_counter +ffffffff8254b000 A __text_page_start +ffffffff8254b000 T Xsyscall_meltdown +ffffffff8254b00c T Xsyscall +ffffffff8254b26e t Xsyscall_trampback +ffffffff8254b280 T intr_user_exit +ffffffff8254b2c2 t intr_user_exit_post_ast +ffffffff8254b3ee t Xiretq_trampback +ffffffff8254b3fa T doreti_iret +ffffffff8254c000 T alltraps +ffffffff8254c138 T recall_trap +ffffffff8254c150 T alltraps_kern +ffffffff8254c153 T alltraps_kern_meltdown +ffffffff8254d000 ? Xsyscall32 +ffffffff8254d000 A __kutext_start +ffffffff8254d000 A __text_page_end +ffffffff8254e000 ? Xtrap00 +ffffffff8254e010 ? Xtrap01 +ffffffff8254e020 ? Xtrap02 +ffffffff8254e028 c calltrap_specstk +ffffffff8254e0f0 ? calltrap_specstk_tramp +ffffffff8254e110 ? Xtrap03 +ffffffff8254e120 ? Xtrap04 +ffffffff8254e130 ? Xtrap05 +ffffffff8254e140 ? Xtrap06 +ffffffff8254e150 ? Xtrap07 +ffffffff8254e160 ? Xtrap08 +ffffffff8254e170 ? Xtrap09 +ffffffff8254e180 ? Xtrap0a +ffffffff8254e190 ? Xtrap0b +ffffffff8254e1a0 ? Xtrap0c +ffffffff8254e1b0 ? Xtrap0d +ffffffff8254e240 ? Xtrap0e +ffffffff8254e250 ? Xintrspurious +ffffffff8254e250 ? Xtrap0f +ffffffff8254e260 ? Xtrap10 +ffffffff8254e270 ? Xtrap11 +ffffffff8254e280 ? Xtrap12 +ffffffff8254e290 ? Xtrap13 +ffffffff8254e2a0 ? Xtrap14 +ffffffff8254e2b0 ? Xtrap15 +ffffffff8254e2c0 ? Xtrap16 +ffffffff8254e2c0 ? Xtrap17 +ffffffff8254e2c0 ? Xtrap18 +ffffffff8254e2c0 ? Xtrap19 +ffffffff8254e2c0 ? Xtrap1a +ffffffff8254e2c0 ? Xtrap1b +ffffffff8254e2c0 ? Xtrap1c +ffffffff8254e2c0 ? Xtrap1d +ffffffff8254e2c0 ? Xtrap1e +ffffffff8254e2c0 ? Xtrap1f +ffffffff8254e2d0 ? x2apic_eoi +ffffffff8254e2f0 ? Xintr_lapic_ipi +ffffffff8254e330 ? Xipi_invltlb +ffffffff8254e360 ? Xipi_invlpg +ffffffff8254e390 ? Xipi_invlrange +ffffffff8254e3d0 ? Xipi_invltlb_pcid +ffffffff8254e410 ? Xipi_invlpg_pcid +ffffffff8254e460 ? Xipi_invlrange_pcid +ffffffff8254e4d0 ? Xintr_lapic_ltimer +ffffffff8254e510 ? Xintr_xen_upcall +ffffffff8254e550 ? Xintr_hyperv_upcall +ffffffff8254e590 ? Xintr_legacy0 +ffffffff8254e5d0 ? Xintr_legacy1 +ffffffff8254e610 ? Xintr_legacy2 +ffffffff8254e650 ? Xintr_legacy3 +ffffffff8254e690 ? Xintr_legacy4 +ffffffff8254e6d0 ? Xintr_legacy5 +ffffffff8254e710 ? Xintr_legacy6 +ffffffff8254e750 ? Xintr_legacy7 +ffffffff8254e790 ? Xintr_legacy8 +ffffffff8254e7d0 ? Xintr_legacy9 +ffffffff8254e810 ? Xintr_legacy10 +ffffffff8254e850 ? Xintr_legacy11 +ffffffff8254e890 ? Xintr_legacy12 +ffffffff8254e8d0 ? Xintr_legacy13 +ffffffff8254e910 ? Xintr_legacy14 +ffffffff8254e950 ? Xintr_legacy15 +ffffffff8254e990 ? Xintr_ioapic_edge0 +ffffffff8254e9d0 ? Xintr_ioapic_edge1 +ffffffff8254ea10 ? Xintr_ioapic_edge2 +ffffffff8254ea50 ? Xintr_ioapic_edge3 +ffffffff8254ea90 ? Xintr_ioapic_edge4 +ffffffff8254ead0 ? Xintr_ioapic_edge5 +ffffffff8254eb10 ? Xintr_ioapic_edge6 +ffffffff8254eb50 ? Xintr_ioapic_edge7 +ffffffff8254eb90 ? Xintr_ioapic_edge8 +ffffffff8254ebd0 ? Xintr_ioapic_edge9 +ffffffff8254ec10 ? Xintr_ioapic_edge10 +ffffffff8254ec50 ? Xintr_ioapic_edge11 +ffffffff8254ec90 ? Xintr_ioapic_edge12 +ffffffff8254ecd0 ? Xintr_ioapic_edge13 +ffffffff8254ed10 ? Xintr_ioapic_edge14 +ffffffff8254ed50 ? Xintr_ioapic_edge15 +ffffffff8254ed90 ? Xintr_ioapic_edge16 +ffffffff8254edd0 ? Xintr_ioapic_edge17 +ffffffff8254ee10 ? Xintr_ioapic_edge18 +ffffffff8254ee50 ? Xintr_ioapic_edge19 +ffffffff8254ee90 ? Xintr_ioapic_edge20 +ffffffff8254eed0 ? Xintr_ioapic_edge21 +ffffffff8254ef10 ? Xintr_ioapic_edge22 +ffffffff8254ef50 ? Xintr_ioapic_edge23 +ffffffff8254ef90 ? Xintr_ioapic_edge24 +ffffffff8254efd0 ? Xintr_ioapic_edge25 +ffffffff8254f010 ? Xintr_ioapic_edge26 +ffffffff8254f050 ? Xintr_ioapic_edge27 +ffffffff8254f090 ? Xintr_ioapic_edge28 +ffffffff8254f0d0 ? Xintr_ioapic_edge29 +ffffffff8254f110 ? Xintr_ioapic_edge30 +ffffffff8254f150 ? Xintr_ioapic_edge31 +ffffffff8254f190 ? Xintr_ioapic_edge32 +ffffffff8254f1d0 ? Xintr_ioapic_edge33 +ffffffff8254f210 ? Xintr_ioapic_edge34 +ffffffff8254f250 ? Xintr_ioapic_edge35 +ffffffff8254f290 ? Xintr_ioapic_edge36 +ffffffff8254f2d0 ? Xintr_ioapic_edge37 +ffffffff8254f310 ? Xintr_ioapic_edge38 +ffffffff8254f350 ? Xintr_ioapic_edge39 +ffffffff8254f390 ? Xintr_ioapic_edge40 +ffffffff8254f3d0 ? Xintr_ioapic_edge41 +ffffffff8254f410 ? Xintr_ioapic_edge42 +ffffffff8254f450 ? Xintr_ioapic_edge43 +ffffffff8254f490 ? Xintr_ioapic_edge44 +ffffffff8254f4d0 ? Xintr_ioapic_edge45 +ffffffff8254f510 ? Xintr_ioapic_edge46 +ffffffff8254f550 ? Xintr_ioapic_edge47 +ffffffff8254f590 ? Xintr_ioapic_edge48 +ffffffff8254f5d0 ? Xintr_ioapic_edge49 +ffffffff8254f610 ? Xintr_ioapic_edge50 +ffffffff8254f650 ? Xintr_ioapic_edge51 +ffffffff8254f690 ? Xintr_ioapic_edge52 +ffffffff8254f6d0 ? Xintr_ioapic_edge53 +ffffffff8254f710 ? Xintr_ioapic_edge54 +ffffffff8254f750 ? Xintr_ioapic_edge55 +ffffffff8254f790 ? Xintr_ioapic_edge56 +ffffffff8254f7d0 ? Xintr_ioapic_edge57 +ffffffff8254f810 ? Xintr_ioapic_edge58 +ffffffff8254f850 ? Xintr_ioapic_edge59 +ffffffff8254f890 ? Xintr_ioapic_edge60 +ffffffff8254f8d0 ? Xintr_ioapic_edge61 +ffffffff8254f910 ? Xintr_ioapic_edge62 +ffffffff8254f950 ? Xintr_ioapic_edge63 +ffffffff8254f990 ? Xintr_ioapic_level0 +ffffffff8254f9d0 ? Xintr_ioapic_level1 +ffffffff8254fa10 ? Xintr_ioapic_level2 +ffffffff8254fa50 ? Xintr_ioapic_level3 +ffffffff8254fa90 ? Xintr_ioapic_level4 +ffffffff8254fad0 ? Xintr_ioapic_level5 +ffffffff8254fb10 ? Xintr_ioapic_level6 +ffffffff8254fb50 ? Xintr_ioapic_level7 +ffffffff8254fb90 ? Xintr_ioapic_level8 +ffffffff8254fbd0 ? Xintr_ioapic_level9 +ffffffff8254fc10 ? Xintr_ioapic_level10 +ffffffff8254fc50 ? Xintr_ioapic_level11 +ffffffff8254fc90 ? Xintr_ioapic_level12 +ffffffff8254fcd0 ? Xintr_ioapic_level13 +ffffffff8254fd10 ? Xintr_ioapic_level14 +ffffffff8254fd50 ? Xintr_ioapic_level15 +ffffffff8254fd90 ? Xintr_ioapic_level16 +ffffffff8254fdd0 ? Xintr_ioapic_level17 +ffffffff8254fe10 ? Xintr_ioapic_level18 +ffffffff8254fe50 ? Xintr_ioapic_level19 +ffffffff8254fe90 ? Xintr_ioapic_level20 +ffffffff8254fed0 ? Xintr_ioapic_level21 +ffffffff8254ff10 ? Xintr_ioapic_level22 +ffffffff8254ff50 ? Xintr_ioapic_level23 +ffffffff8254ff90 ? Xintr_ioapic_level24 +ffffffff8254ffd0 ? Xintr_ioapic_level25 +ffffffff82550010 ? Xintr_ioapic_level26 +ffffffff82550050 ? Xintr_ioapic_level27 +ffffffff82550090 ? Xintr_ioapic_level28 +ffffffff825500d0 ? Xintr_ioapic_level29 +ffffffff82550110 ? Xintr_ioapic_level30 +ffffffff82550150 ? Xintr_ioapic_level31 +ffffffff82550190 ? Xintr_ioapic_level32 +ffffffff825501d0 ? Xintr_ioapic_level33 +ffffffff82550210 ? Xintr_ioapic_level34 +ffffffff82550250 ? Xintr_ioapic_level35 +ffffffff82550290 ? Xintr_ioapic_level36 +ffffffff825502d0 ? Xintr_ioapic_level37 +ffffffff82550310 ? Xintr_ioapic_level38 +ffffffff82550350 ? Xintr_ioapic_level39 +ffffffff82550390 ? Xintr_ioapic_level40 +ffffffff825503d0 ? Xintr_ioapic_level41 +ffffffff82550410 ? Xintr_ioapic_level42 +ffffffff82550450 ? Xintr_ioapic_level43 +ffffffff82550490 ? Xintr_ioapic_level44 +ffffffff825504d0 ? Xintr_ioapic_level45 +ffffffff82550510 ? Xintr_ioapic_level46 +ffffffff82550550 ? Xintr_ioapic_level47 +ffffffff82550590 ? Xintr_ioapic_level48 +ffffffff825505d0 ? Xintr_ioapic_level49 +ffffffff82550610 ? Xintr_ioapic_level50 +ffffffff82550650 ? Xintr_ioapic_level51 +ffffffff82550690 ? Xintr_ioapic_level52 +ffffffff825506d0 ? Xintr_ioapic_level53 +ffffffff82550710 ? Xintr_ioapic_level54 +ffffffff82550750 ? Xintr_ioapic_level55 +ffffffff82550790 ? Xintr_ioapic_level56 +ffffffff825507d0 ? Xintr_ioapic_level57 +ffffffff82550810 ? Xintr_ioapic_level58 +ffffffff82550850 ? Xintr_ioapic_level59 +ffffffff82550890 ? Xintr_ioapic_level60 +ffffffff825508d0 ? Xintr_ioapic_level61 +ffffffff82550910 ? Xintr_ioapic_level62 +ffffffff82550950 ? Xintr_ioapic_level63 +ffffffff82551000 ? codepatch_fill_nop +ffffffff82551000 A __cptext_start +ffffffff82551000 A __kutext_end +ffffffff825510b0 ? codepatch_maprw +ffffffff82551190 ? codepatch_unmaprw +ffffffff82551200 ? codepatch_nop +ffffffff82551360 ? codepatch_replace +ffffffff82551510 ? codepatch_call +ffffffff82551530 ? codepatch_jmp +ffffffff82552000 A __cptext_end +ffffffff82552000 A __rodata_start +ffffffff82552000 C _etext +ffffffff82552000 C etext +ffffffff82553000 r seeprom_read +ffffffff82553004 r icl_mg_pll_find_divisors.div1_vals +ffffffff82553028 r gen9bc_tgp_ddc_pin_map +ffffffff82553038 r athn_ac2qid +ffffffff82553038 r athn_ac2qid +ffffffff82553038 r athn_ac2qid +ffffffff82553044 r rtwn_get_rssi.cckoff +ffffffff8255306c r rsu_ac2qid +ffffffff8255307c r pckbc_portcmd +ffffffff82553080 r tht_fifo_write_pad.pad +ffffffff82553088 r rsu_get_rssi.cckoff +ffffffff8255309c r adlp_n_revids +ffffffff825530ec r apple_iso_trans +ffffffff825530f0 r dg2_g12_revid_step_tbl +ffffffff825530f8 r wihap_check_tx.txratetable +ffffffff825530fc r dmamode +ffffffff82553124 r gen9_edram_size_mb.sets +ffffffff82554000 r isomappings +ffffffff82554080 r unimappings +ffffffff82554230 r replacements +ffffffff82557b1f r cmd0646_9_tim_udma +ffffffff825ab641 r pp_r600_decoded_lanes +ffffffff825c69a4 r cmd680_setup_channel.udma_tbl +ffffffff825ce642 r apollo_udma33_tim +ffffffff825d472f r substchar +ffffffff825d6816 r apollo_udma100_tim +ffffffff825fe122 r apollo_udma66_tim +ffffffff826055df r apollo_pio_rec +ffffffff826149b9 r cy_pio_rec +ffffffff82643ed5 r apollo_udma133_tim +ffffffff82650a90 R drm_ca +ffffffff82650ab8 R drm_filtops +ffffffff82650ae8 R drmread_filtops +ffffffff82651000 r vga_emulops +ffffffff82651048 R vga_stdscreen +ffffffff82651078 R vga_stdscreen_mono +ffffffff826510a8 R vga_stdscreen_bf +ffffffff826510d8 R vga_40lscreen +ffffffff82651108 R vga_40lscreen_mono +ffffffff82651138 R vga_40lscreen_bf +ffffffff82651168 R vga_50lscreen +ffffffff82651198 R vga_50lscreen_mono +ffffffff826511c8 R vga_50lscreen_bf +ffffffff826511f8 R vga_screenlist +ffffffff82651208 R vga_screenlist_mono +ffffffff82651218 R vga_accessops +ffffffff82651278 r i945_wm_info +ffffffff826512b0 r bgansitopc +ffffffff826512b8 r pctoansi +ffffffff826512f8 r sdma_offsets +ffffffff826512f8 r sdma_offsets +ffffffff82651328 r iha_rate_tbl +ffffffff82651360 r i830_a_wm_info +ffffffff82651398 r gen9_edram_size_mb.ways +ffffffff82651400 r aggr_periodic_times +ffffffff82651480 r jsl_ehl_revids +ffffffff826514f8 r michael_final.pad +ffffffff82651520 r rt_copysa.maskarray +ffffffff82651528 r i915_wm_info +ffffffff82651530 r amdgpu_ih_clientid_jpeg +ffffffff82651530 r amdgpu_ih_clientid_uvds +ffffffff82651530 r amdgpu_ih_clientid_vcns +ffffffff82651530 r amdgpu_ih_clientid_vcns +ffffffff82651530 r amdgpu_ih_clientid_vcns +ffffffff82651568 r vga_setfontset.cmaptabb +ffffffff82651580 r tgl_revids +ffffffff826515d8 r i830_bc_wm_info +ffffffff82651648 r hsw_activate_psr2.map +ffffffff82651688 r __drm_universal_plane_init.default_modifiers +ffffffff82651698 r iwn_tid2fifo +ffffffff826516b0 r vga_setfontset.cmaptaba +ffffffff826516b8 r crtc_offsets +ffffffff826516b8 r crtc_offsets +ffffffff826516b8 r crtc_offsets +ffffffff826516d8 r link_speed +ffffffff826516d8 r link_speed +ffffffff826516d8 r link_speed +ffffffff82651750 r rtwn_r88e_get_rssi.cckoff +ffffffff82652000 R edid_vendors +ffffffff826522c0 R edid_nvendors +ffffffff826522d0 R edid_products +ffffffff82652330 R edid_nproducts +ffffffff82652340 r _edid_modes +ffffffff82653000 R videomode_list +ffffffff82654080 R videomode_count +ffffffff82655000 r ahc_hard_errors +ffffffff82655080 r critical_sections +ffffffff826550b0 r patches +ffffffff82655d50 r seqprog +ffffffff82657000 r ahc_switch +ffffffff82658000 r termstat_strings +ffffffff82658020 r critical_sections +ffffffff82658060 r seqprog +ffffffff82658d50 r patches +ffffffff8265a000 r ahd_switch +ffffffff8265b000 R aic_switch +ffffffff8265c000 R adw_switch +ffffffff8265d000 R gdt_switch +ffffffff8265e000 R twe_switch +ffffffff8265f000 R ciss_switch +ffffffff8265f030 R ciss_level +ffffffff8265f050 R ciss_stat +ffffffff82660000 R ami_switch +ffffffff82660028 R ami_raw_switch +ffffffff82661000 R mfi_switch +ffffffff82661028 R mfi_pd_switch +ffffffff82661050 r mfi_iop_xscale +ffffffff82661080 r mfi_iop_ppc +ffffffff826610b0 r mfi_iop_gen2 +ffffffff826610e0 r mfi_iop_skinny +ffffffff82661110 r mfi_bbu_indicators +ffffffff826611c0 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs +ffffffff826611f0 r chv_oa_mux_regs +ffffffff82661210 r fiji_clock_stretcher_lookup_table +ffffffff82661210 r tonga_clock_stretcher_lookup_table +ffffffff82661230 r iosf_pci_devices +ffffffff82661250 r link_speed +ffffffff82661250 r link_speed +ffffffff82661250 r link_speed +ffffffff82661290 r drm_fb_xfrm.default_dst_pitch +ffffffff82661290 r non_supported_protection +ffffffff82661390 r tgl_uy_revids +ffffffff826613e0 r bwi_phy_noise_11g_rev1 +ffffffff82661460 r cardslot_process_event.antonym_ev +ffffffff826614f0 r gen11_oa_mux_regs +ffffffff826615e0 r ddr2_cycle_tenths +ffffffff82661650 r rtw_intr_rx.ratetbl +ffffffff826616d0 r abm_config +ffffffff82661740 r getbootinfo.ports.30 +ffffffff82661790 r reg_offsets +ffffffff826617a0 r bwi_rf_lo_measure_11g.rf_lo_adjust +ffffffff826617b0 r init_non_clock_fields.look_up +ffffffff826617c0 r uftdi_8u232am_getrate.roundoff +ffffffff82661810 r zyd_rx_data.rates +ffffffff82661820 r ieee80211_ra_valid_tx_mcs.max_mcs +ffffffff82661860 r mmio_invalidate_full.gen8_regs +ffffffff82661890 r bwi_phy_noise_11g +ffffffff826618a0 r hpt366_pio +ffffffff826618d0 r glk_revids +ffffffff82661920 r bwi_rf_calc_nrssi_slope_11g.save_phy3_regs +ffffffff82661940 r ether_crc32_be_update.rev +ffffffff82661940 r rtw_grf5101_mac_crypt.caesar +ffffffff82661990 r snb_b_fdi_train_param +ffffffff82662000 R qlw_switch +ffffffff82663000 R isp_2100_risc_code +ffffffff82675bf0 R isp_2200_risc_code +ffffffff82688990 R isp_2300_risc_code +ffffffff826a2408 R qla_switch +ffffffff826a2430 r qla_regs_2100 +ffffffff826a2460 r qla_regs_2200 +ffffffff826a2490 r qla_regs_23XX +ffffffff826a3000 R ahci_atascsi_methods +ffffffff826a4000 R nvme_switch +ffffffff826a4028 r nvme_ops +ffffffff826a5000 R mpi_switch +ffffffff826a5100 r intel_hpll_vco.elk_vco +ffffffff826a5160 r pin_offsets +ffffffff826a51c0 r firmware_list +ffffffff826a5220 r atom_arg_shift +ffffffff826a5220 r atom_arg_shift +ffffffff826a5260 r pf_syncookie_wstab +ffffffff826a5280 r ieee80211_media_init.mopts +ffffffff826a52e0 r add_entropy_words.twist_table +ffffffff826a5380 r urtw_8225v2_txpwr_cck +ffffffff826a53a0 r bwfm_pci_prio2fifo +ffffffff826a53a0 r ieee80211_up_to_ac.up_to_ac +ffffffff826a5460 r paritytab +ffffffff826a5460 r x86emu_parity_tab +ffffffff826a5480 r legacy_connector_convert +ffffffff826a54c0 r gen7_oa_mux_regs +ffffffff826a54e0 r hsw_oa_mux_regs +ffffffff826a5500 r notetab +ffffffff826a5520 r urtw_8225v2_txpwr_cck_ch14 +ffffffff826a5540 r bwi_rf_calibval.rf_calibvals +ffffffff826a55e0 r pf_syncookie_msstab +ffffffff826a5640 r xgmi3x16_pcs_err_status_reg_aldebaran +ffffffff826a56a0 r uath_wme_init.uath_wme_11g +ffffffff826a56c0 r gen7_oa_b_counters +ffffffff826a5820 r icl_revids +ffffffff826a58e0 r rtwn_iq_calib_run.reg_adda +ffffffff826a5920 r atom_def_dst +ffffffff826a5920 r atom_def_dst +ffffffff826a5960 r sha256_initial_hash_value +ffffffff826a59c0 r otus_edca_def +ffffffff826a59e0 r intel_hpll_vco.blb_vco +ffffffff826a5aa0 r epic_pci_subsys_info +ffffffff826a5ac0 r atom_arg_mask +ffffffff826a5ac0 r atom_arg_mask +ffffffff826a5b20 r butmap +ffffffff826a5b60 r GFX_RLC_SRM_INDEX_CNTL_DATA_OFFSETS +ffffffff826a5ba0 r comsoft.lsrmap +ffffffff826a5be0 r tulip_mii_phy_readspecific.table +ffffffff826a5c00 r kbl_revids +ffffffff826a5ca0 r intel_hpll_vco.pnv_vco +ffffffff826a5d00 r dmapageport +ffffffff826a5dc0 r intel_hpll_vco.ctg_vco +ffffffff826a5e80 r drm_calculate_luminance_range.pre_computed_values +ffffffff826a6000 R sili_atascsi_methods +ffffffff826a7000 R ncr53c9x_switch +ffffffff826a8000 r scf_period +ffffffff826a9000 R siop_script +ffffffff826a95a0 R lun_switch +ffffffff826a95d0 R tag_switch +ffffffff826a9660 R load_dsa +ffffffff826a96c4 R siop_led_on +ffffffff826a96cc R siop_led_off +ffffffff826a96d8 R siop_switch +ffffffff826aa000 R ep_vortex_media +ffffffff826aa100 R ep_default_to_media +ffffffff826ab000 R wi_card_ident +ffffffff826ad000 R ucode_table +ffffffff826ae000 r re_revisions +ffffffff826ae290 r re_kstats_tpl +ffffffff826b0000 R smc91cxx_media +ffffffff826b0010 R smc91cxx_mii_bitbang_ops +ffffffff826b1000 R dl10019_mii_bitbang_ops +ffffffff826b1028 R dl10022_mii_bitbang_ops +ffffffff826b2000 R ax88190_mii_bitbang_ops +ffffffff826b4000 R ac97_audio_default +ffffffff826b4020 R ac97_on_off +ffffffff826b4324 R ac97_mic_select +ffffffff826b4628 R ac97_mono_select +ffffffff826b492c R ac97_source +ffffffff826b4c30 R ac97_volume_stereo +ffffffff826b4c4c R ac97_volume_mono +ffffffff826b4c70 R source_info +ffffffff826b5470 R ac97_ad +ffffffff826b5580 R ac97_ak +ffffffff826b5610 R ac97_av +ffffffff826b5750 R ac97_rl +ffffffff826b57a0 R ac97_cm +ffffffff826b5820 R ac97_cr +ffffffff826b5840 R ac97_cs +ffffffff826b5920 R ac97_cx +ffffffff826b5980 R ac97_dt +ffffffff826b59a0 R ac97_em +ffffffff826b59d0 R ac97_es +ffffffff826b59f0 R ac97_is +ffffffff826b5a10 R ac97_ic +ffffffff826b5a90 R ac97_it +ffffffff826b5ac0 R ac97_ns +ffffffff826b5b80 R ac97_ps +ffffffff826b5bb0 R ac97_sl +ffffffff826b5bd0 R ac97_st +ffffffff826b5d20 R ac97_vi +ffffffff826b5d50 R ac97_tt +ffffffff826b5dd0 R ac97_ti +ffffffff826b5df0 R ac97_wb +ffffffff826b5e10 R ac97_wo +ffffffff826b5ea0 R ac97_ym +ffffffff826b5ef0 R ac97_vendors +ffffffff826b61f0 R ac97enhancement +ffffffff826b62f0 R ac97feature +ffffffff826b7000 R lm_chips +ffffffff826b7020 R lm78_sensors +ffffffff826b71a0 R w83627hf_sensors +ffffffff826b73a0 R w83627ehf_sensors +ffffffff826b75c0 R w83627dhg_sensors +ffffffff826b77c0 R nct6776f_sensors +ffffffff826b7a00 R nct6779d_sensors +ffffffff826b7d60 R w83637hf_sensors +ffffffff826b7f20 R w83697hf_sensors +ffffffff826b80c0 R w83781d_sensors +ffffffff826b8280 R w83782d_sensors +ffffffff826b8480 R w83783s_sensors +ffffffff826b8600 R w83791d_sensors +ffffffff826b8860 R w83792d_sensors +ffffffff826b8ae0 R as99127f_sensors +ffffffff826b9000 r ar5k_known_products +ffffffff826b9110 r ar5111_gain_opt +ffffffff826b91e0 r ar5112_gain_opt +ffffffff826b92b0 r ar5k_5ghz_channels +ffffffff826b9a00 r ar5k_2ghz_channels +ffffffff826b9f10 r ar5111_rf +ffffffff826ba350 r ar5112a_rf +ffffffff826ba890 r ar5112_rf +ffffffff826bada0 r ar5413_rf +ffffffff826bb1b0 r ar2413_rf +ffffffff826bb4d0 r ar2425_rf +ffffffff826bb830 r ar5111_rfg +ffffffff826bbb30 r ar5112_rfg +ffffffff826bbe30 r ar5413_rfg +ffffffff826bc130 r ar2413_rfg +ffffffff826bc430 r ar5k_rt_11a +ffffffff826bc552 r ar5k_rt_11b +ffffffff826bc674 r ar5k_rt_11g +ffffffff826bc796 r ar5k_rt_xr +ffffffff826bd000 r ar5210_ini +ffffffff826be000 r ar5211_mode +ffffffff826be2c0 r ar5211_ini +ffffffff826bead0 r ar5211_rf +ffffffff826bf000 r ar5212_pcie +ffffffff826bf080 r ar5212_mode +ffffffff826bf310 r ar5212_ini +ffffffff826bfc80 r ar5212_ar5111_mode +ffffffff826bff20 r ar5212_ar5112_mode +ffffffff826c01b0 r ar5413_mode +ffffffff826c0b10 r ar2413_mode +ffffffff826c1430 r ar2425_mode +ffffffff826c1d90 r ar5111_bbgain +ffffffff826c2090 r ar5112_bbgain +ffffffff826c3000 r athn_5ghz_chans +ffffffff826c3020 r athn_rates +ffffffff826c4000 r athn_rates +ffffffff826c5000 r ar9160_ini +ffffffff826c5068 r ar5416_ini +ffffffff826c50d0 r ar5416_serdes +ffffffff826c50e8 r ar9160_1_1_addac +ffffffff826c50f8 r ar9160_1_0_addac +ffffffff826c5108 r ar5416_2_2_addac +ffffffff826c5118 r ar5416_2_1_addac +ffffffff826c5128 r ar5416_set_power_calib.chainoffset +ffffffff826c5140 r ar9160_bank6tpc_vals +ffffffff826c51c0 r ar5416_bank6tpc_vals +ffffffff826c5240 r ar5416_bb_rfgain_vals_2g +ffffffff826c5340 r ar5416_bb_rfgain_vals_5g +ffffffff826c5440 r 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ar9380_2_2_tx_gain_high_power_vals_5g +ffffffff826d3380 r ar9380_2_2_tx_gain_high_power_vals_2g +ffffffff826d3520 r ar9380_2_2_tx_gain_vals_5g +ffffffff826d36c0 r ar9380_2_2_tx_gain_vals_2g +ffffffff826d3860 r ar9485_1_1_tx_gain_regs +ffffffff826d38f0 r ar9485_1_1_tx_gain_vals_2g +ffffffff826d3a10 r ar9380_def_rom +ffffffff826d3e50 r ar9380_def_rom_h112 +ffffffff826d4290 r ar9380_def_rom_h116 +ffffffff826d46d0 r ar9380_def_rom_x112 +ffffffff826d4b10 r ar9380_def_rom_x113 +ffffffff826d5000 R atw_txthresh_tab_lo +ffffffff826d5050 R atw_txthresh_tab_hi +ffffffff826d50a0 r atw_attach.empty_macaddr +ffffffff826d50b0 r atw_attach.type_strings +ffffffff826d50d0 r atw_rfmd2958_ifn +ffffffff826d5110 r atw_rfmd2958_rf1r +ffffffff826d5150 r atw_rxintr.rate_tbl +ffffffff826d6000 r rtw_identify_sta.empty_macaddr +ffffffff826d7000 r rtwn_set_key.etherzeroaddr +ffffffff826d7010 r rtl8188eu_rf_prog +ffffffff826d7030 r rtl8192e_rf_prog +ffffffff826d7060 r rtl8188ce_rf_prog +ffffffff826d7080 r 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urlphy_funcs +ffffffff827d5000 R rgephy_ca +ffffffff827d5028 R rgephy_funcs +ffffffff827d5040 r rgephys +ffffffff827d6000 R ciphy_ca +ffffffff827d6028 R ciphy_funcs +ffffffff827d6040 r ciphys +ffffffff827d7000 R ipgphy_ca +ffffffff827d7028 R ipgphy_funcs +ffffffff827d7040 r ipgphys +ffffffff827d8000 R etphy_funcs +ffffffff827d8018 R etphy_ca +ffffffff827d8040 r etphys +ffffffff827d8060 r etphy_dspcode +ffffffff827d9000 R jmphy_funcs +ffffffff827d9018 R jmphy_ca +ffffffff827d9040 r jmphys +ffffffff827da000 R atphy_funcs +ffffffff827da018 R atphy_ca +ffffffff827da040 r atphys +ffffffff827db000 r sense_keys +ffffffff827db080 r adesc +ffffffff827de000 R scsi_readsafe_cmd +ffffffff827df000 R scsibus_ca +ffffffff827df030 R scsi_quirk_patterns +ffffffff827e0000 R cd_ca +ffffffff827e0030 R cd_patterns +ffffffff827e1000 R ch_ca +ffffffff827e1030 R ch_patterns +ffffffff827e2000 R sd_ca +ffffffff827e2030 R sd_patterns +ffffffff827e3000 R st_quirk_patterns +ffffffff827e3210 R st_ca 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ahd_num_pci_devs +ffffffff828311a0 R ahd_pci_ca +ffffffff828311d0 r pci_bus_modes +ffffffff82831210 r pci_status_strings +ffffffff82831250 r pci_status_source +ffffffff82831290 r split_status_strings +ffffffff82832000 R adw_pci_ca +ffffffff82832028 R adw_pci_devices +ffffffff82833000 r adw_3550_Default_EEPROM +ffffffff82833080 r adw_38C0800_Default_EEPROM +ffffffff82833100 r adw_38C1600_Default_EEPROM +ffffffff82834000 R adw_asc3550_mcode +ffffffff828353a0 R adw_asc3550_mcode_data +ffffffff828353b0 R adw_asc38C0800_mcode +ffffffff82836888 R adw_asc38C0800_mcode_data +ffffffff828368a0 R adw_asc38C1600_mcode +ffffffff82838160 R adw_asc38C1600_mcode_data +ffffffff82839000 R twe_pci_ca +ffffffff82839028 R twe_pci_devices +ffffffff8283a000 R arc_ca +ffffffff8283a028 R arc_switch +ffffffff8283a050 r arc_devices +ffffffff8283a190 r arc_intel +ffffffff8283a198 r arc_marvell +ffffffff8283a1a0 r arc_lsi +ffffffff8283a1a8 r arc_marvell2 +ffffffff8283b000 R jmb_ca +ffffffff8283b030 r jmb_devices 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tulip_read_macaddr.testpat +ffffffff828cb3d0 r tulip_vendors +ffffffff828cb480 r tulip_media_to_ifmedia +ffffffff828cb4e0 r tulip_chipdescs +ffffffff828cc000 R ep_pci_ca +ffffffff828cc030 R ep_pci_devices +ffffffff828cd000 R pcn_ca +ffffffff828cd028 R pcn_devices +ffffffff828cd030 r pcn_79c970_rcvfw +ffffffff828cd050 r pcn_79c970_xmtsp +ffffffff828cd070 r pcn_79c970_xmtfw +ffffffff828cd090 r pcn_79c971_rcvfw +ffffffff828cd0b0 r pcn_79c971_xmtsp_sram +ffffffff828cd0d0 r pcn_79c971_xmtsp +ffffffff828cd0f0 r pcn_79c971_xmtfw +ffffffff828cd110 r pcn_variants +ffffffff828ce000 R siop_products +ffffffff828cf000 R siop_pci_ca +ffffffff828d0000 R rdcide_setup +ffffffff828d0005 R rdcide_hold +ffffffff828d000a R rdcide_udmatim +ffffffff828d0010 R rdcide_udmaclk +ffffffff828d0028 R default_product_desc +ffffffff828d0040 R pciide_intel_products +ffffffff828d0630 R pciide_amd_products +ffffffff828d0690 R pciide_cmd_products +ffffffff828d0730 R pciide_via_products +ffffffff828d0810 R pciide_cypress_products +ffffffff828d0820 R pciide_sis_products +ffffffff828d0870 R pciide_natsemi_products +ffffffff828d0890 R pciide_acer_products +ffffffff828d08a0 R pciide_triones_products +ffffffff828d08f0 R pciide_promise_products +ffffffff828d0ac0 R pciide_acard_products +ffffffff828d0b10 R pciide_serverworks_products +ffffffff828d0bb0 R pciide_nvidia_products +ffffffff828d0e80 R pciide_ite_products +ffffffff828d0ea0 R pciide_ati_products +ffffffff828d0f20 R pciide_jmicron_products +ffffffff828d0f70 R pciide_phison_products +ffffffff828d0f80 R pciide_rdc_products +ffffffff828d0f90 R pciide_vendors +ffffffff828d1140 R pciide_pci_ca +ffffffff828d1168 R pciide_jmb_ca +ffffffff828d1190 r piix_isp_dma +ffffffff828d1193 r piix_rtc_dma +ffffffff828d1196 r apollo_pio_set +ffffffff828d119b r cmd0643_9_data_tim_pio +ffffffff828d11a0 r cmd0643_9_data_tim_dma +ffffffff828d11a3 r cmd680_channel_map.init_val +ffffffff828d11b1 r cmd680_setup_channel.udma2_tbl +ffffffff828d11b8 r cmd680_setup_channel.dma_tbl +ffffffff828d11be r cmd680_setup_channel.pio_tbl +ffffffff828d11d0 r satalink_ba5_regmap +ffffffff828d1690 r sii3114_chansetup.channel_names +ffffffff828d16b0 r cy_pio_pulse +ffffffff828d16c0 r sis_udma133new_tim +ffffffff828d16e0 r sis_pio133new_tim +ffffffff828d16f4 r sis_dma133new_tim +ffffffff828d1700 r sis_udma66_tim +ffffffff828d1706 r sis_udma100new_tim +ffffffff828d170c r sis_udma133old_tim +ffffffff828d1713 r sis_pio_act +ffffffff828d1718 r sis_pio_rec +ffffffff828d171d r natsemi_pio_pulse +ffffffff828d1722 r natsemi_pio_recover +ffffffff828d1727 r natsemi_dma_pulse +ffffffff828d172a r natsemi_dma_recover +ffffffff828d1730 r scx200_udma33 +ffffffff828d173c r scx200_dma33 +ffffffff828d1750 r scx200_pio33 +ffffffff828d1778 r acer_udma +ffffffff828d177e r acer_pio +ffffffff828d1790 r hpt370_pio +ffffffff828d17a4 r hpt370_dma +ffffffff828d17b0 r hpt370_udma +ffffffff828d17d0 r hpt372_pio +ffffffff828d17e4 r hpt372_dma +ffffffff828d17f0 r hpt372_udma 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txp_devices +ffffffff828d8000 r cards +ffffffff828d9000 r format_params +ffffffff828d91a0 r pixfmt_table +ffffffff828d9320 r meteor_pixfmt_table +ffffffff828da000 R bktr_ca +ffffffff828da028 R bktr_hw_if +ffffffff828db000 r tuners +ffffffff828db170 r freqTable +ffffffff828db260 r nabcst +ffffffff828db2a0 r irccable +ffffffff828db310 r hrccable +ffffffff828db380 r weurope +ffffffff828db420 r jpnbcst +ffffffff828db460 r jpncable +ffffffff828db4c0 r xussr +ffffffff828db530 r australia +ffffffff828db590 r france +ffffffff828dc000 R xl_pci_ca +ffffffff828dc030 R xl_pci_devices +ffffffff828dd000 R fxp_pci_ca +ffffffff828dd030 R fxp_pci_devices +ffffffff828de000 R em_devices +ffffffff828de2e0 R em_ca +ffffffff828de310 r em_counters +ffffffff828df000 r em_igp_cable_length_table +ffffffff828df100 r em_igp_2_cable_length_table +ffffffff828e0000 R ixgb_devices +ffffffff828e0010 R ixgb_ca +ffffffff828e1000 R ixgbe_devices +ffffffff828e10b8 R ix_ca +ffffffff828e10e0 r ix_counters +ffffffff828e13e0 r ix_rxq_kstats_tpl +ffffffff828e1458 r ix_txq_kstats_tpl +ffffffff828e2000 r ixgbe_mvals_base +ffffffff828e2060 r ixgbe_mvals_X540 +ffffffff828e20c0 r ixgbe_mvals_X550 +ffffffff828e2120 r ixgbe_mvals_X550EM_x +ffffffff828e2180 r ixgbe_mvals_X550EM_a +ffffffff828e5000 R ixl_ca +ffffffff828e5030 R ixl_port_counters +ffffffff828e52c0 R ixl_vsi_counters +ffffffff828e5380 r ixl_devices +ffffffff828e54c0 r ixl_710 +ffffffff828e54e8 r ixl_722 +ffffffff828e5510 r ixl_pf_aq_regs +ffffffff828e5578 r ixl_710_decrepit +ffffffff828e55a0 r ixl_phy_type_map +ffffffff828e5770 r ixl_speed_type_map +ffffffff828e57b0 r ixl_hmc_pack_rxq +ffffffff828e5830 r ixl_hmc_pack_txq +ffffffff828e58a0 r ixl_sfp_ops +ffffffff828e58b8 r ixl_qsfp_ops +ffffffff828e6000 R xge_ca +ffffffff828e6028 R xge_devices +ffffffff828e6030 r xge_fix_mac +ffffffff828e6110 r xge_xena_dtx_cfg +ffffffff828e6170 r xge_herc_dtx_cfg +ffffffff828e7000 R thtc_ca +ffffffff828e7028 R tht_ca +ffffffff828e7050 r thtc_devices +ffffffff828e7068 r tht_link_state.interval +ffffffff828e8000 R myx_ca +ffffffff828e8028 R myx_devices +ffffffff828e9000 R oce_ca +ffffffff828e9030 R oce_devices +ffffffff828ea000 R dc_pci_ca +ffffffff828eb000 R epic_pci_ca +ffffffff828eb028 R epic_pci_devices +ffffffff828ec000 R ti_pci_ca +ffffffff828ec030 R ti_devices +ffffffff828ed000 R ne_pci_ca +ffffffff828ed030 R ne_pci_prod +ffffffff828ee000 R gem_pci_ca +ffffffff828ee030 R gem_pci_devices +ffffffff828ee050 r gem_promhdr +ffffffff828ee052 r gem_promdat +ffffffff828ee05a r gem_promdat2 +ffffffff828ef000 R cas_ca +ffffffff828ef028 R cas_pci_devices +ffffffff828ef030 r cas_promhdr +ffffffff828ef032 r cas_promdat_sun +ffffffff828ef03a r cas_promdat_ns +ffffffff828ef042 r cas_promdat2 +ffffffff828f0000 R sf_pci_ca +ffffffff828f0028 R sf_pci_products +ffffffff828f1000 R sis_ca +ffffffff828f1028 R sis_devices +ffffffff828f2000 R se_devices +ffffffff828f2008 R se_ca +ffffffff828f3000 R uhci_pci_ca +ffffffff828f4000 R ohci_pci_ca +ffffffff828f5000 R ehci_pci_ca +ffffffff828f6000 R xhci_pci_ca +ffffffff828f7000 R cbb_pci_ca +ffffffff828f7028 r pccbb_pcmcia_do_io_map.pcic_iowidth +ffffffff828f8000 R skc_devices +ffffffff828f8030 R skc_ca +ffffffff828f8058 R sk_ca +ffffffff828f9000 R mskc_devices +ffffffff828f90a8 R mskc_ca +ffffffff828f90d0 R msk_ca +ffffffff828f9100 r msk_mib +ffffffff828fa000 R puc_pci_ca +ffffffff828fb000 R puc_devs +ffffffff82900000 R com_puc_ca +ffffffff82900030 r puc_port_types +ffffffff82901000 R lpt_puc_ca +ffffffff82902000 R wi_pci_ca +ffffffff82902030 r wi_pci_products +ffffffff82903000 R an_pci_ca +ffffffff82903030 R an_pci_devices +ffffffff82904000 R iwi_devices +ffffffff82904010 R iwi_ca +ffffffff82905000 R wpi_ca +ffffffff82905028 r wpi_devices +ffffffff82905030 r wpi_rates +ffffffff82905050 r wpi_rf_gain_5ghz +ffffffff829050a0 r wpi_dsp_gain_5ghz +ffffffff829050f0 r wpi_rf_gain_2ghz +ffffffff82905140 r wpi_dsp_gain_2ghz +ffffffff82905190 r wpi_pmgt +ffffffff82905310 r wpi_bands +ffffffff82906000 R iwn_mcs2ridx +ffffffff82906020 R iwn_ca +ffffffff82906050 r iwn_devices +ffffffff829060e8 r iwn4965_sensitivity_limits +ffffffff82906124 r iwn5000_sensitivity_limits +ffffffff82906160 r iwn5150_sensitivity_limits +ffffffff8290619c r iwn1000_sensitivity_limits +ffffffff829061d8 r iwn6000_sensitivity_limits +ffffffff82906214 r iwn2000_sensitivity_limits +ffffffff82906250 r iwn_fw_errmsg +ffffffff82906340 r iwn4965_set_txpower.tdiv +ffffffff82906360 r iwn4965_rf_gain_5ghz +ffffffff829063d0 r iwn4965_dsp_gain_5ghz +ffffffff82906440 r iwn4965_dsp_gain_2ghz +ffffffff829064b0 r iwn_pmgt +ffffffff829066f0 r iwn4965_post_alive.qid2fifo +ffffffff82906700 r iwn_bands +ffffffff82906770 r iwn_rates +ffffffff82906820 r iwn4965_rf_gain_2ghz +ffffffff82907000 R iwm_nvm_channels +ffffffff82907030 R iwm_nvm_channels_8000 +ffffffff82907070 R iwm_rates +ffffffff829070d0 R iwm_ht_mcs2ridx +ffffffff82907110 R iwm_tid_to_ac +ffffffff82907118 R iwm_ac_to_tx_fifo +ffffffff82907120 R iwm_nvm_to_read +ffffffff82907144 r iwm_set_hw_address_8000.reserved_mac +ffffffff82907180 r iwm_sf_full_timeout +ffffffff829071b0 r iwm_sf_full_timeout_def +ffffffff829071e0 r advanced_lookup +ffffffff82907320 r iwm_devices +ffffffff82907360 R iwm_ca +ffffffff82908000 R iwx_9560_quz_a0_jf_b0_cfg +ffffffff82908020 R iwx_9560_qu_c0_jf_b0_cfg +ffffffff82908040 R iwx_qu_b0_hr1_b0 +ffffffff82908060 R iwx_qu_b0_hr_b0 +ffffffff82908080 R iwx_ax201_cfg_qu_hr +ffffffff829080a0 R iwx_qu_c0_hr1_b0 +ffffffff829080c0 R iwx_qu_c0_hr_b0 +ffffffff829080e0 R iwx_ax201_cfg_qu_c0_hr_b0 +ffffffff82908100 R iwx_quz_a0_hr1_b0 +ffffffff82908120 R iwx_ax201_cfg_quz_hr +ffffffff82908140 R iwx_cfg_so_a0_hr_b0 +ffffffff82908160 R iwx_cfg_quz_a0_hr_b0 +ffffffff82908180 R iwx_2ax_cfg_so_gf_a0 +ffffffff829081a0 R iwx_2ax_cfg_so_gf_a0_long +ffffffff829081c0 R iwx_2ax_cfg_so_gf4_a0 +ffffffff829081e0 R iwx_2ax_cfg_so_gf4_a0_long +ffffffff82908200 R iwx_2ax_cfg_ty_gf_a0 +ffffffff82908220 R iwx_2ax_cfg_so_jf_b0 +ffffffff82908240 R iwx_nvm_channels_8000 +ffffffff82908280 R iwx_rates +ffffffff829082e0 R iwx_mcs2ridx +ffffffff82908320 R iwx_tid_to_ac +ffffffff82908328 R iwx_ac_to_tx_fifo +ffffffff82908330 r iwx_nvm_channels_uhb +ffffffff8290839e r iwx_is_valid_mac_addr.reserved_mac +ffffffff829083b0 r iwx_sf_full_timeout +ffffffff829083e0 r iwx_sf_full_timeout_def +ffffffff82908410 r advanced_lookup +ffffffff82908550 r iwx_devices +ffffffff82908590 r iwx_dev_info_table +ffffffff82908de8 R iwx_ca +ffffffff82909000 R cmpci_ca +ffffffff82909028 R cmpci_hw_if +ffffffff829090e0 r cmpci_rate_table +ffffffff82909120 R cmpci_devices +ffffffff82909130 r cmpci_query_devinfo.mixer_port_names +ffffffff82909160 r cmpci_query_devinfo.mixer_classes +ffffffff8290a000 R iha_pci_ca +ffffffff8290a028 R iha_switch +ffffffff8290b000 R pcscp_ca +ffffffff8290c000 R bge_ca +ffffffff8290c030 R bge_devices +ffffffff8290c1b0 r bge_revisions +ffffffff8290c610 r bge_majorrevs +ffffffff8290d000 R bnx_devices +ffffffff8290d020 R bnx_ca +ffffffff8290e000 R vge_ca +ffffffff8290e028 R vge_devices +ffffffff8290f000 R stge_ca +ffffffff8290f028 R stge_mii_bitbang_ops +ffffffff8290f050 R stge_devices +ffffffff82910000 R nfe_ca +ffffffff82910030 R nfe_devices +ffffffff82911000 R et_devices +ffffffff82911008 R et_ca +ffffffff82912000 R jme_devices +ffffffff82912008 R jme_ca +ffffffff82913000 R age_devices +ffffffff82913008 R age_ca +ffffffff82914000 R alc_devices +ffffffff82914038 R alc_ca +ffffffff82915000 R ale_devices +ffffffff82915008 R ale_ca +ffffffff82916000 R amdpm_ca +ffffffff82916030 R amdpm_ids +ffffffff82917000 R bce_ca +ffffffff82917028 R bce_devices +ffffffff82918000 R ath_pci_ca +ffffffff82919000 R athn_pci_ca +ffffffff82919030 r athn_pci_devices +ffffffff8291a000 R atw_pci_ca +ffffffff8291a028 R atw_pci_devices +ffffffff8291b000 R rtw_pci_ca +ffffffff8291b030 R rtw_pci_products +ffffffff8291c000 R rtwn_pci_ca +ffffffff8291c030 r rtwn_pci_devices +ffffffff8291c040 r rtl8188eu_mac +ffffffff8291c1b0 r rtl8192cu_mac +ffffffff8291c310 r rtl8192ce_mac +ffffffff8291c458 r rtl8188eu_bb_prog +ffffffff8291c480 r rtl8723a_bb_prog +ffffffff8291c4a8 r rtl8192ce_bb_prog_1t +ffffffff8291c4d0 r rtl8192ce_bb_prog_2t +ffffffff8291c500 r rtl8188eu_bb_regs +ffffffff8291c680 r rtl8188eu_bb_vals +ffffffff8291c980 r rtl8188eu_agc_vals +ffffffff8291cb80 r rtl8723a_bb_regs +ffffffff8291cd00 r rtl8723a_bb_vals +ffffffff8291cff0 r rtl8192ce_agc_vals +ffffffff8291d270 r rtl8192ce_bb_regs +ffffffff8291d3f0 r rtl8192ce_bb_vals_1t +ffffffff8291d6e0 r rtl8192ce_bb_vals_2t +ffffffff8291e000 R ral_pci_ca +ffffffff8291e030 R ral_pci_devices +ffffffff8291f000 R acx_pci_ca +ffffffff8291f028 R acx_pci_devices +ffffffff82920000 R pgt_pci_ca +ffffffff82920028 R pgt_pci_devices +ffffffff82921000 R malo_pci_ca +ffffffff82921028 R malo_pci_devices +ffffffff82922000 R bwi_pci_ca +ffffffff82922030 R bwi_pci_devices +ffffffff82923000 R piixpm_ca +ffffffff82923030 R piixpm_ids +ffffffff82924000 R vic_ca +ffffffff82924028 R vic_devices +ffffffff82925000 R vmx_devices +ffffffff82925008 R vmx_ca +ffffffff82925030 r vmx_tx_kstat_tpl +ffffffff829250d0 r vmx_kstat_rate +ffffffff829250e0 r vmx_rx_kstat_tpl +ffffffff82926000 R vmwpvs_ca +ffffffff82926028 R vmwpvs_switch +ffffffff82927000 R lii_ca +ffffffff82927028 R lii_devices +ffffffff82928000 R ichiic_ca +ffffffff82928030 R ichiic_ids +ffffffff82929000 R viapm_ca +ffffffff82929030 R viapm_ids +ffffffff82929070 r val_to_temp +ffffffff82929870 r val_to_uV.mult +ffffffff8292a000 R amdiic_ca +ffffffff8292a028 R amdiic_ids +ffffffff8292b000 R nviic_ca +ffffffff8292b030 R nviic_ids +ffffffff8292c000 R sdhc_pci_ca +ffffffff8292d000 R kate_ca +ffffffff8292d030 r kate_proc +ffffffff8292e000 R km_ca +ffffffff8292e030 r km_devices +ffffffff8292f000 R ksmn_ca +ffffffff8292f030 r ksmn_devices +ffffffff82930000 R iosf_pci_ca +ffffffff82931000 R itherm_devices +ffffffff82931008 R itherm_ca +ffffffff82932000 R pchtemp_ca +ffffffff82932030 R pchtemp_devices +ffffffff82933000 R rtsx_pci_ca +ffffffff82934000 R xspd_ca +ffffffff82934028 R xspd_devices +ffffffff82935000 R virtio_pci_ca +ffffffff82936000 R dwiic_pci_ca +ffffffff82936030 R dwiic_pci_ids +ffffffff82937000 R bwfm_pci_ca +ffffffff82937030 r bwfm_pci_devices +ffffffff82938000 R ccp_pci_ca +ffffffff82938030 r ccp_pci_devices +ffffffff82939000 R bnxt_devices +ffffffff82939040 R bnxt_ca +ffffffff8293a000 R mcx_ca +ffffffff8293a030 r mcx_devices +ffffffff8293a060 r mcx_rss_config +ffffffff8293a0d0 r mcx_eth_cap_map +ffffffff8293a2d0 r mcx_kstat_ppcnt_ieee8023 +ffffffff8293a2e8 r mcx_kstat_ppcnt_rfc2863 +ffffffff8293a300 r mcx_kstat_ppcnt_rfc2819 +ffffffff8293a318 r mcx_kstat_ppcnt_rfc3635 +ffffffff8293a330 r mcx_ppcnt_ieee8023_tpl +ffffffff8293a4b0 r mcx_ppcnt_rfc2863_tpl +ffffffff8293a5c0 r mcx_ppcnt_rfc2819_tpl +ffffffff8293a770 r mcx_ppcnt_rfc3635_tpl +ffffffff8293a8b0 r mcx_kstat_mtmp_tpl +ffffffff8293a950 r mcx_kstat_mtmp_rate +ffffffff8293a960 r mcx_queue_kstat_tpl +ffffffff8293b000 R iavf_ca +ffffffff8293b030 r iavf_devices +ffffffff8293b040 r iavf_aq_regs +ffffffff8293b0b0 r iavf_link_speeds +ffffffff8293c000 R rge_ca +ffffffff8293c028 R rge_devices +ffffffff8293c030 r rtl8125_mac_cfg2_ephy +ffffffff8293c090 r rge_phy_config_mac_cfg3.mac_cfg3_a438_value +ffffffff8293c0b0 r rge_phy_config_mac_cfg3.mac_cfg3_b88e_value +ffffffff8293c110 r rge_phy_config_mac_cfg4.mac_cfg4_b87c_value +ffffffff8293c170 r rtl8125_mac_cfg4_ephy +ffffffff8293c1e0 r rtl8125_mac_cfg2_mcu +ffffffff8293ce80 r rtl8125_mac_cfg3_mcu +ffffffff8293d720 r rtl8125_mac_cfg4_mcu +ffffffff8293fd10 r rtl8125_mac_cfg5_mcu +ffffffff82940c10 r rtl8125_mac_bps +ffffffff82940f80 r rtl8125b_mac_bps +ffffffff82941120 r rge_kstats_tpl +ffffffff82942000 R igc_devices +ffffffff82942040 R igc_ca +ffffffff82943000 R ngbe_devices +ffffffff82943008 R ngbe_ca +ffffffff82944000 R com_pci_ca +ffffffff82944030 R com_pci_ids +ffffffff82945000 r agp_attach.agp_max +ffffffff82945048 R agp_ca +ffffffff82946000 R intagp_ca +ffffffff82947000 r drm_plane_create_rotation_property.props +ffffffff82948000 r drm_bridge_priv_state_funcs +ffffffff8294a000 r color_encoding_name +ffffffff8294a020 r color_range_name +ffffffff8294b000 r drm_subpixel_enum_list +ffffffff8294b060 r drm_dpms_enum_list +ffffffff8294b0a0 r drm_dvi_i_select_enum_list +ffffffff8294b0d0 r drm_dvi_i_subconnector_enum_list +ffffffff8294b100 r drm_tv_select_enum_list +ffffffff8294b150 r drm_tv_subconnector_enum_list +ffffffff8294b1a0 r drm_dp_subconnector_enum_list +ffffffff8294b210 r drm_link_status_enum_list +ffffffff8294b230 r drm_scaling_mode_enum_list +ffffffff8294b270 r drm_aspect_ratio_enum_list +ffffffff8294b2a0 r hdmi_colorspaces +ffffffff8294b370 r dp_colorspaces +ffffffff8294b450 r drm_content_type_enum_list +ffffffff8294b4a0 r drm_panel_orientation_enum_list +ffffffff8294b4e0 r privacy_screen_enum +ffffffff8294c000 r drm_crtc_fence_ops +ffffffff8294d000 r drm_dmt_modes +ffffffff8294f940 r edid_cea_modes_1 +ffffffff829534d0 r edid_cea_modes_193 +ffffffff82954180 r edid_quirk_list +ffffffff82954350 r edid_4k_modes +ffffffff829545b0 r edid_est_modes +ffffffff82954db0 r est3_modes +ffffffff82954f10 r stereo_mandatory_modes +ffffffff82954f90 r extra_modes +ffffffff82955000 r drm_encoder_enum_list +ffffffff82956000 r drm_fbdev_client_funcs +ffffffff82956020 r drm_fb_helper_generic_funcs +ffffffff82956028 r drm_fbdev_fb_ops +ffffffff82957000 r drm_fb_xrgb8888_to_rgb332.dst_pixsize +ffffffff82957004 r drm_fb_xrgb8888_to_rgb565.dst_pixsize +ffffffff82957008 r drm_fb_xrgb8888_to_rgb888.dst_pixsize +ffffffff8295700c r drm_fb_xrgb8888_to_xrgb2101010.dst_pixsize +ffffffff82957010 r drm_fb_xrgb8888_to_gray8.dst_pixsize +ffffffff82957014 r drm_fb_rgb888_to_xrgb8888.dst_pixsize +ffffffff82957018 r drm_fb_rgb565_to_xrgb8888.dst_pixsize +ffffffff82958000 r __drm_format_info.formats +ffffffff82959000 R drm_pgops +ffffffff8295a000 r drm_ioctls +ffffffff8295c000 r dma_fence_stub_ops +ffffffff8295c038 R dma_fence_array_ops +ffffffff8295c070 R dma_fence_chain_ops +ffffffff8295c0a8 R dmabufops +ffffffff8295c0e0 R syncfileops +ffffffff8295d000 r drm_plane_type_enum_list +ffffffff8295e000 r drm_mode_status_names +ffffffff8295f000 r primary_plane_funcs +ffffffff8295f068 r safe_modeset_formats +ffffffff82960000 r orientation_data +ffffffff829635c0 r lcd800x1280_rightside_up +ffffffff829635d8 r lcd720x1280_rightside_up +ffffffff829635f0 r lcd800x1280_leftside_up +ffffffff82963608 r lcd1080x1920_leftside_up +ffffffff82963620 r lcd1200x1920_rightside_up +ffffffff82963638 r gpd_micropc +ffffffff82963650 r gpd_pocket +ffffffff82963668 r gpd_pocket2 +ffffffff82963680 r gpd_win +ffffffff82963698 r gpd_win2 +ffffffff829636b0 r itworks_tw891 +ffffffff829636c8 r lcd1600x2560_rightside_up +ffffffff829636e0 r onegx1_pro +ffffffff829636f8 r lcd1600x2560_leftside_up +ffffffff82963710 r lcd1280x1920_rightside_up +ffffffff82963728 r .compoundliteral +ffffffff82963738 r .compoundliteral.5 +ffffffff82963760 r .compoundliteral.9 +ffffffff82963780 r .compoundliteral.17 +ffffffff829637c0 r .compoundliteral.21 +ffffffff829637e0 r .compoundliteral.23 +ffffffff829637f0 r .compoundliteral.25 +ffffffff82964000 r drm_gem_prime_dmabuf_ops +ffffffff82966000 r is_hdmi_adaptor.dp_dual_mode_hdmi_id +ffffffff82967000 r drm_dp_phy_name.phy_names +ffffffff82967048 r drm_dp_i2c_algo +ffffffff82967058 r drm_dp_i2c_lock_ops +ffffffff82967070 r dp_aux_bl_ops +ffffffff82967090 r dpcd_quirk_list +ffffffff82967320 r drm_dp_psr_setup_time.psr_setup_time_us +ffffffff82968000 R drm_dp_mst_topology_state_funcs +ffffffff82968020 r drm_dp_mst_req_type_str.req_type_str +ffffffff829681f0 r drm_dp_mst_sideband_tx_state_str.sideband_reason_str +ffffffff82968220 r drm_dp_mst_nak_reason_str.nak_reason_str +ffffffff82968278 r drm_dp_mst_i2c_algo +ffffffff82969000 r hdmi_colorimetry_val +ffffffff8296a000 r ttm_bo_init_reserved.sys_mem +ffffffff8296b000 r ttm_bo_pipeline_gutting.sys_mem +ffffffff8296c018 R ttm_bo_vm_ops +ffffffff8296d000 r ttm_range_manager_func +ffffffff8296e018 r ttm_kmap_iter_io_ops +ffffffff8296e030 r ttm_kmap_iter_linear_io_ops +ffffffff8296f000 r ttm_sys_manager_func +ffffffff82970000 r ttm_kmap_iter_tt_ops +ffffffff82971000 r drm_sched_fence_ops_scheduled +ffffffff82971038 r drm_sched_fence_ops_finished +ffffffff82972000 R ch7017_ops +ffffffff82973000 R ch7xxx_ops +ffffffff82973060 r ch7xxx_ids +ffffffff82974000 R ivch_ops +ffffffff82974060 r backup_addresses +ffffffff82975000 R ns2501_ops +ffffffff82975060 r mode_agnostic_values +ffffffff829750e0 r ns2501_modes +ffffffff82976000 R sil164_ops +ffffffff82977000 R tfp410_ops +ffffffff82978000 r chv_dpll +ffffffff82978050 r vlv_dpll +ffffffff829780a0 r g4x_dpll +ffffffff829780f0 r pch_dpll +ffffffff82978138 r intel_dp_enc_funcs +ffffffff82979000 r intel_hdmi_enc_funcs +ffffffff8297a000 r vlv_primary_formats +ffffffff8297a030 r ivb_primary_formats +ffffffff8297a050 r i965_primary_formats +ffffffff8297a070 r i8xx_primary_formats +ffffffff8297a080 r i965_plane_funcs +ffffffff8297a0e8 r i8xx_plane_funcs +ffffffff8297b000 r gen11_dsi_encoder_funcs +ffffffff8297b020 r gen11_dsi_connector_funcs +ffffffff8297b098 r gen11_dsi_connector_helper_funcs +ffffffff8297b0e8 r gen11_dsi_host_ops +ffffffff8297c000 r intel_plane_helper_funcs +ffffffff8297d000 r g4x_audio_funcs +ffffffff8297d010 r ilk_audio_funcs +ffffffff8297d020 r hsw_audio_funcs +ffffffff8297d030 r hdmi_audio_clock +ffffffff8297d0a0 r dp_aud_n_m +ffffffff8297d250 r hdmi_aud_ncts_36bpp +ffffffff8297d330 r hdmi_aud_ncts_30bpp +ffffffff8297d410 r hdmi_aud_ncts_24bpp +ffffffff8297e000 r intel_backlight_device_ops +ffffffff8297e018 r bxt_pwm_funcs +ffffffff8297e048 r cnp_pwm_funcs +ffffffff8297e078 r lpt_pwm_funcs +ffffffff8297e0a8 r spt_pwm_funcs +ffffffff8297e0d8 r pch_pwm_funcs +ffffffff8297e108 r ext_pwm_funcs +ffffffff8297e138 r vlv_pwm_funcs +ffffffff8297e168 r i965_pwm_funcs +ffffffff8297e198 r i9xx_pwm_funcs +ffffffff8297e1c8 r pwm_bl_funcs +ffffffff8297f000 r bdb_blocks +ffffffff8297f160 r translate_iboost.mapping +ffffffff8297f163 r adlp_ddc_pin_map +ffffffff8297f16a r adls_ddc_pin_map +ffffffff8297f170 r rkl_pch_tgp_ddc_pin_map +ffffffff8297f175 r icp_ddc_pin_map +ffffffff8297f17f r cnp_ddc_pin_map +ffffffff82980000 r mtl_sa_info +ffffffff82980006 r adlp_sa_info +ffffffff8298000c r adls_sa_info +ffffffff82980012 r rkl_sa_info +ffffffff82980018 r tgl_sa_info +ffffffff82980020 r intel_bw_funcs +ffffffff82981000 r intel_cdclk_funcs +ffffffff82981010 r dg2_cdclk_table +ffffffff829810c0 r adlp_a_step_cdclk_table +ffffffff82981140 r adlp_cdclk_table +ffffffff82981200 r rkl_cdclk_table +ffffffff829812f0 r icl_cdclk_table +ffffffff829813e0 r glk_cdclk_table +ffffffff82981410 r bxt_cdclk_table +ffffffff82981458 r tgl_cdclk_funcs +ffffffff82981478 r ehl_cdclk_funcs +ffffffff82981498 r icl_cdclk_funcs +ffffffff829814b8 r bxt_cdclk_funcs +ffffffff829814d8 r skl_cdclk_funcs +ffffffff829814f8 r bdw_cdclk_funcs +ffffffff82981518 r hsw_cdclk_funcs +ffffffff82981538 r chv_cdclk_funcs +ffffffff82981558 r vlv_cdclk_funcs +ffffffff82981578 r fixed_400mhz_cdclk_funcs +ffffffff82981598 r ilk_cdclk_funcs +ffffffff829815b8 r gm45_cdclk_funcs +ffffffff829815d8 r g33_cdclk_funcs +ffffffff829815f8 r g33_get_cdclk.div_3200 +ffffffff829815fe r g33_get_cdclk.div_4000 +ffffffff82981604 r g33_get_cdclk.div_4800 +ffffffff8298160a r g33_get_cdclk.div_5333 +ffffffff82981610 r i965gm_cdclk_funcs +ffffffff82981630 r i965gm_get_cdclk.div_3200 +ffffffff82981633 r i965gm_get_cdclk.div_4000 +ffffffff82981636 r i965gm_get_cdclk.div_5333 +ffffffff82981640 r pnv_cdclk_funcs +ffffffff82981660 r i945gm_cdclk_funcs +ffffffff82981680 r i915gm_cdclk_funcs +ffffffff829816a0 r i915g_cdclk_funcs +ffffffff829816c0 r i865g_cdclk_funcs +ffffffff829816e0 r i85x_cdclk_funcs +ffffffff82981700 r i845g_cdclk_funcs +ffffffff82981720 r i830_cdclk_funcs +ffffffff82982000 r chv_color_funcs +ffffffff82982028 r i965_color_funcs +ffffffff82982050 r i9xx_color_funcs +ffffffff82982078 r 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caicos_sysls_default +ffffffff82a02280 r caicos_cgcg_cgls_enable +ffffffff82a024d0 r caicos_cgcg_cgls_disable +ffffffff82a02730 r barts_mgcg_enable +ffffffff82a027b0 r turks_mgcg_enable +ffffffff82a02830 r caicos_mgcg_enable +ffffffff82a028b0 r caicos_mgcg_disable +ffffffff82a02930 r turks_sysls_enable +ffffffff82a029f0 r caicos_sysls_enable +ffffffff82a02aa0 r turks_sysls_disable +ffffffff82a02b60 r caicos_sysls_disable +ffffffff82a03000 r didt_config_ci +ffffffff82a035b4 r defaults_bonaire_xt +ffffffff82a03600 r defaults_saturn_xt +ffffffff82a0364c r defaults_hawaii_xt +ffffffff82a03698 r defaults_hawaii_pro +ffffffff82a04000 r ci_program_jump_on_start.data +ffffffff82a05000 r bonaire_io_mc_regs +ffffffff82a05120 r hawaii_io_mc_regs +ffffffff82a051d0 r mc_cg_registers +ffffffff82a05200 r bonaire_mgcg_cgcg_init +ffffffff82a055e0 r bonaire_golden_registers +ffffffff82a057d0 r bonaire_golden_common_registers +ffffffff82a05800 r bonaire_golden_spm_registers +ffffffff82a05810 r kalindi_mgcg_cgcg_init +ffffffff82a05ab0 r kalindi_golden_registers +ffffffff82a05c20 r kalindi_golden_common_registers +ffffffff82a05c50 r kalindi_golden_spm_registers +ffffffff82a05c60 r godavari_golden_registers +ffffffff82a05de0 r spectre_mgcg_cgcg_init +ffffffff82a06200 r spectre_golden_registers +ffffffff82a06330 r spectre_golden_common_registers +ffffffff82a06360 r spectre_golden_spm_registers +ffffffff82a06370 r hawaii_mgcg_cgcg_init +ffffffff82a06880 r hawaii_golden_registers +ffffffff82a06a30 r hawaii_golden_common_registers +ffffffff82a06a6c r hawaii_golden_spm_registers +ffffffff82a06a80 r spectre_rlc_save_restore_register_list +ffffffff82a07170 r kalindi_rlc_save_restore_register_list +ffffffff82a07680 r ci_cs_data +ffffffff82a076a0 r ci_SECT_CONTEXT_defs +ffffffff82a07720 r ci_SECT_CONTEXT_def_1 +ffffffff82a07a70 r ci_SECT_CONTEXT_def_3 +ffffffff82a07a90 r ci_SECT_CONTEXT_def_4 +ffffffff82a07d04 r ci_SECT_CONTEXT_def_5 +ffffffff82a07d0c r ci_SECT_CONTEXT_def_6 +ffffffff82a07d10 r ci_SECT_CONTEXT_def_2 +ffffffff82a08160 r ci_SECT_CONTEXT_def_7 +ffffffff82a08510 r cik_default_state +ffffffff82a0a000 r dce3_2_afmt_write_sad_regs.eld_reg_to_type +ffffffff82a0b000 r dce6_afmt_write_sad_regs.eld_reg_to_type +ffffffff82a0c000 r ni_tx_offsets +ffffffff82a0c020 r evergreen_dp_offsets +ffffffff82a0c040 r evergreen_disp_int_status +ffffffff82a0c060 r evergreen_golden_registers +ffffffff82a0c260 r evergreen_golden_registers2 +ffffffff82a0c310 r cypress_mgcg_init +ffffffff82a0ca10 r juniper_mgcg_init +ffffffff82a0ce80 r redwood_mgcg_init +ffffffff82a0d1b0 r cedar_golden_registers +ffffffff82a0d390 r cedar_mgcg_init +ffffffff82a0d5f0 r wrestler_golden_registers +ffffffff82a0d840 r supersumo_golden_registers +ffffffff82a0dba0 r sumo_golden_registers +ffffffff82a0dbe0 r barts_golden_registers +ffffffff82a0de00 r turks_golden_registers +ffffffff82a0e040 r caicos_golden_registers +ffffffff82a0e280 r sumo_rlc_save_restore_register_list +ffffffff82a0e3d0 r evergreen_cs_data +ffffffff82a0e410 r SECT_CONTEXT_defs +ffffffff82a0e490 r SECT_CLEAR_defs +ffffffff82a0e4b0 r SECT_CTRLCONST_defs +ffffffff82a0e4d0 r SECT_CONTEXT_def_2 +ffffffff82a0e4f0 r SECT_CONTEXT_def_4 +ffffffff82a0e680 r SECT_CONTEXT_def_5 +ffffffff82a0e6a0 r SECT_CONTEXT_def_6 +ffffffff82a0e780 r SECT_CONTEXT_def_1 +ffffffff82a0ef20 r SECT_CONTEXT_def_3 +ffffffff82a0f000 r SECT_CONTEXT_def_7 +ffffffff82a0f488 r SECT_CLEAR_def_1 +ffffffff82a0f494 r SECT_CTRLCONST_def_1 +ffffffff82a0f4a0 r evergreen_default_state +ffffffff82a10000 r cayman_reg_safe_bm +ffffffff82a12000 r evergreen_reg_safe_bm +ffffffff82a15000 r evergreen_hdmi_write_sad_regs.eld_reg_to_type +ffffffff82a16000 r didt_config_kv +ffffffff82a17000 r barts_io_mc_regs +ffffffff82a170f0 r turks_io_mc_regs +ffffffff82a171e0 r caicos_io_mc_regs +ffffffff82a172d0 r cayman_io_mc_regs +ffffffff82a173c0 r cayman_golden_registers +ffffffff82a17580 r cayman_golden_registers2 +ffffffff82a175d0 r dvst_golden_registers +ffffffff82a17860 r dvst_golden_registers2 +ffffffff82a17890 r scrapper_golden_registers +ffffffff82a17d70 r tn_rlc_save_restore_register_list +ffffffff82a17f60 r cayman_cs_data +ffffffff82a17fa0 r SECT_CONTEXT_defs +ffffffff82a18020 r SECT_CLEAR_defs +ffffffff82a18040 r SECT_CTRLCONST_defs +ffffffff82a18060 r SECT_CONTEXT_def_2 +ffffffff82a18080 r SECT_CONTEXT_def_4 +ffffffff82a18210 r SECT_CONTEXT_def_5 +ffffffff82a18230 r SECT_CONTEXT_def_1 +ffffffff82a189d0 r SECT_CONTEXT_def_3 +ffffffff82a18ab0 r SECT_CONTEXT_def_6 +ffffffff82a18b90 r SECT_CONTEXT_def_7 +ffffffff82a19018 r SECT_CLEAR_def_1 +ffffffff82a19024 r SECT_CTRLCONST_def_1 +ffffffff82a19030 r cayman_default_state +ffffffff82a1a000 r cac_weights_cayman_xt +ffffffff82a1a128 r cac_weights_cayman_pro +ffffffff82a1a250 r cac_weights_cayman_le +ffffffff82a1a380 r cayman_cgcg_cgls_default +ffffffff82a1a5c0 r cayman_mgcg_default +ffffffff82a1af20 r cayman_sysls_default +ffffffff82a1aff0 r cayman_cgcg_cgls_enable +ffffffff82a1b240 r cayman_cgcg_cgls_disable +ffffffff82a1b4a0 r cayman_mgcg_enable +ffffffff82a1b520 r cayman_mgcg_disable +ffffffff82a1b5a0 r cayman_sysls_enable +ffffffff82a1b670 r cayman_sysls_disable +ffffffff82a1c000 r rn50_reg_safe_bm +ffffffff82a1c1a0 r r100_reg_safe_bm +ffffffff82a1d000 r r200_reg_safe_bm +ffffffff82a1e000 r r300_reg_safe_bm +ffffffff82a1f000 r r420_reg_safe_bm +ffffffff82a21000 r color_formats_table +ffffffff82a21480 r r600_reg_safe_bm +ffffffff82a24000 R r600_utc +ffffffff82a24040 R r600_dtc +ffffffff82a24080 r r600_encode_pci_lane_width.encoded_lanes +ffffffff82a26000 r r100_gfx_ring +ffffffff82a26070 r r300_gfx_ring +ffffffff82a260e0 r rv515_gfx_ring +ffffffff82a26150 r r600_gfx_ring +ffffffff82a261c0 r r600_dma_ring +ffffffff82a26230 r rv6xx_uvd_ring +ffffffff82a262a0 r rv770_uvd_ring +ffffffff82a26310 r evergreen_gfx_ring +ffffffff82a26380 r evergreen_dma_ring +ffffffff82a263f0 r cayman_gfx_ring +ffffffff82a26460 r cayman_dma_ring +ffffffff82a264d0 r cayman_uvd_ring +ffffffff82a26540 r trinity_vce_ring +ffffffff82a265b0 r si_gfx_ring +ffffffff82a26620 r si_dma_ring +ffffffff82a26690 r ci_gfx_ring +ffffffff82a26700 r ci_cp_ring +ffffffff82a26770 r ci_dma_ring +ffffffff82a267e0 r ci_vce_ring +ffffffff82a27000 r object_connector_convert +ffffffff82a27060 r supported_devices_connector_convert +ffffffff82a270a0 r supported_devices_connector_object_id_convert +ffffffff82a270c0 r thermal_controller_names +ffffffff82a27100 r pp_lib_thermal_controller_names +ffffffff82a28000 r pin_offsets +ffffffff82a28020 r radeon_audio_acr.hdmi_predefined_acr +ffffffff82a2a000 r thermal_controller_names +ffffffff82a2a020 r default_primarydac_adj +ffffffff82a2a120 r default_tvdac_adj +ffffffff82a2a220 r default_tmds_pll +ffffffff82a2b000 r radeon_dp_connector_helper_funcs +ffffffff82a2b050 r radeon_vga_connector_helper_funcs +ffffffff82a2b0a0 r radeon_dvi_connector_helper_funcs +ffffffff82a2b0f0 r radeon_tv_connector_helper_funcs +ffffffff82a2b140 r radeon_lvds_connector_helper_funcs +ffffffff82a2b190 r radeon_dp_connector_funcs +ffffffff82a2b298 r radeon_lvds_bridge_connector_funcs +ffffffff82a2b310 r radeon_vga_connector_funcs +ffffffff82a2b388 r radeon_dvi_connector_funcs +ffffffff82a2b400 r radeon_edp_connector_funcs +ffffffff82a2b478 r radeon_tv_connector_funcs +ffffffff82a2b4f0 r radeon_lvds_connector_funcs +ffffffff82a2c000 r radeon_family_name +ffffffff82a2c3f0 r radeon_px_quirk_list +ffffffff82a2d000 r radeon_fb_funcs +ffffffff82a2d018 r radeon_mode_funcs +ffffffff82a2d060 r radeon_tmds_pll_enum_list +ffffffff82a2d080 r radeon_tv_std_enum_list +ffffffff82a2d100 r radeon_underscan_enum_list +ffffffff82a2d130 r radeon_audio_enum_list +ffffffff82a2d160 r radeon_dither_enum_list +ffffffff82a2d180 r radeon_output_csc_enum_list +ffffffff82a2d1c0 r radeon_crtc_funcs +ffffffff82a2d280 r hpd_names +ffffffff82a2d2b0 r encoder_names +ffffffff82a2d3e0 r radeon_afmt_init.eg_offsets +ffffffff82a2e000 r aux_offset +ffffffff82a2f000 R radeondrm_ca +ffffffff82a2f030 r pciidlist +ffffffff82a331d0 r kms_driver +ffffffff82a332c0 r radeon_ioctls_kms +ffffffff82a34000 r radeon_fb_helper_funcs +ffffffff82a34008 r radeonfb_ops +ffffffff82a35000 R radeon_fence_ops +ffffffff82a37000 R radeon_gem_object_funcs +ffffffff82a37060 r radeon_gem_vm_ops +ffffffff82a38000 r radeon_i2c_algo +ffffffff82a38010 r radeon_atom_i2c_algo +ffffffff82a39000 r legacy_helper_funcs +ffffffff82a3a000 r radeon_backlight_ops +ffffffff82a3a018 r radeon_legacy_lvds_enc_funcs +ffffffff82a3a038 r radeon_legacy_lvds_helper_funcs +ffffffff82a3a0a0 r radeon_legacy_tmds_int_enc_funcs +ffffffff82a3a0c0 r radeon_legacy_tmds_int_helper_funcs +ffffffff82a3a128 r radeon_legacy_primary_dac_enc_funcs +ffffffff82a3a148 r radeon_legacy_primary_dac_helper_funcs +ffffffff82a3a1b0 r radeon_legacy_tv_dac_enc_funcs +ffffffff82a3a1d0 r radeon_legacy_tv_dac_helper_funcs +ffffffff82a3a238 r radeon_legacy_tmds_ext_enc_funcs +ffffffff82a3a258 r radeon_legacy_tmds_ext_helper_funcs +ffffffff82a3b000 r SLOPE_value +ffffffff82a3b030 r YCOEF_EN_value +ffffffff82a3b060 r YCOEF_value +ffffffff82a3b090 r available_tv_modes +ffffffff82a3b110 r hor_timing_NTSC +ffffffff82a3b150 r vert_timing_NTSC +ffffffff82a3b190 r hor_timing_PAL +ffffffff82a3b1d0 r vert_timing_PAL +ffffffff82a3d000 r radeon_pm_state_type_name +ffffffff82a3e000 r radeon_evict_flags.placements +ffffffff82a41000 r rs600_reg_safe_bm +ffffffff82a43000 r rv515_reg_safe_bm +ffffffff82a44000 r dll_speed_table +ffffffff82a45000 r r7xx_golden_registers +ffffffff82a45090 r r7xx_golden_dyn_gpr_registers +ffffffff82a45100 r rv770ce_golden_registers +ffffffff82a45160 r rv770_golden_registers +ffffffff82a451b0 r rv770_mgcg_init +ffffffff82a458f0 r rv730_golden_registers +ffffffff82a45950 r rv730_mgcg_init +ffffffff82a45ee0 r rv710_golden_registers +ffffffff82a45f30 r rv710_mgcg_init +ffffffff82a461d0 r rv740_golden_registers +ffffffff82a46360 r rv740_mgcg_init +ffffffff82a48000 r rv730_smc_int_vectors +ffffffff82a48040 r rv710_smc_int_vectors +ffffffff82a48080 r rv740_smc_int_vectors +ffffffff82a480c0 r cypress_smc_int_vectors +ffffffff82a48100 r caicos_smc_int_vectors +ffffffff82a48140 r cayman_smc_int_vectors +ffffffff82a49000 r tahiti_io_mc_regs +ffffffff82a49120 r pitcairn_io_mc_regs +ffffffff82a49240 r verde_io_mc_regs +ffffffff82a49360 r oland_io_mc_regs +ffffffff82a49480 r hainan_io_mc_regs +ffffffff82a495a0 r crtc_offsets +ffffffff82a495c0 r si_disp_int_status +ffffffff82a495e0 r tahiti_golden_registers +ffffffff82a49760 r tahiti_golden_rlc_registers +ffffffff82a497b0 r tahiti_mgcg_cgcg_init +ffffffff82a49d98 r tahiti_golden_registers2 +ffffffff82a49db0 r pitcairn_golden_registers +ffffffff82a49f00 r pitcairn_golden_rlc_registers +ffffffff82a49f40 r pitcairn_mgcg_cgcg_init +ffffffff82a4a3b0 r verde_golden_registers +ffffffff82a4a620 r verde_golden_rlc_registers +ffffffff82a4a660 r verde_mgcg_cgcg_init +ffffffff82a4aae0 r oland_golden_registers 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lcac_pitcairn +ffffffff82a4e530 r cac_override_pitcairn +ffffffff82a4e544 r powertune_data_pitcairn +ffffffff82a4e580 r lcac_cape_verde +ffffffff82a4e9d0 r cac_override_cape_verde +ffffffff82a4e9e4 r powertune_data_cape_verde +ffffffff82a4ea20 r cac_weights_cape_verde_pro +ffffffff82a4eef0 r cac_weights_heathrow +ffffffff82a4f3c0 r cac_weights_chelsea_xt +ffffffff82a4f890 r cac_weights_chelsea_pro +ffffffff82a4fd60 r cac_weights_cape_verde +ffffffff82a50230 r cac_weights_mars_pro +ffffffff82a50700 r lcac_mars_pro +ffffffff82a50a60 r cac_override_oland +ffffffff82a50a74 r powertune_data_mars_pro +ffffffff82a50ab0 r cac_weights_mars_xt +ffffffff82a50f80 r cac_weights_oland_pro +ffffffff82a51450 r cac_weights_oland_xt +ffffffff82a51920 r lcac_oland +ffffffff82a51c7c r powertune_data_oland +ffffffff82a51cb8 r dte_data_oland +ffffffff82a51d90 r cac_weights_hainan +ffffffff82a52254 r powertune_data_hainan +ffffffff82a52290 r dte_data_aruba_pro +ffffffff82a52360 r dte_data_tahiti_pro +ffffffff82a52430 r dte_data_curacao_pro +ffffffff82a52500 r dte_data_neptune_xt +ffffffff82a525d0 r dte_data_sun_xt +ffffffff82a526a0 r dte_data_venus_xtx +ffffffff82a52770 r dte_data_venus_xt +ffffffff82a52840 r dte_data_venus_pro +ffffffff82a52910 r dte_data_mars_pro +ffffffff82a53000 r si_program_jump_on_start.data +ffffffff82a54000 r sumo_dtc +ffffffff82a55000 r trinity_mgcg_shls_default +ffffffff82a55380 r trinity_sysls_enable +ffffffff82a55450 r trinity_sysls_disable +ffffffff82a57000 r GC_BASE +ffffffff82a570a8 r HDP_BASE +ffffffff82a57150 r MMHUB_BASE +ffffffff82a571f8 r ATHUB_BASE +ffffffff82a572a0 r NBIO_BASE +ffffffff82a57348 r MP0_BASE +ffffffff82a573f0 r MP1_BASE +ffffffff82a57498 r DF_BASE +ffffffff82a57540 r OSSSYS_BASE +ffffffff82a575e8 r SDMA0_BASE +ffffffff82a57690 r SDMA1_BASE +ffffffff82a57738 r SDMA2_BASE +ffffffff82a577e0 r SDMA3_BASE +ffffffff82a57888 r SDMA4_BASE +ffffffff82a57930 r SMUIO_BASE +ffffffff82a579d8 r THM_BASE +ffffffff82a57a80 r UMC_BASE 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amdgpu_connector_vga_funcs +ffffffff82a60338 r amdgpu_connector_dvi_funcs +ffffffff82a603b0 r amdgpu_connector_lvds_funcs +ffffffff82a62000 R amdgpu_ctx_num_entities +ffffffff82a63000 r amdgpu_kms_driver +ffffffff82a630f0 r amdgpu_device_ip_reinit_late_sriov.ip_order +ffffffff82a64000 r hw_id_map +ffffffff82a64090 r hw_id_names +ffffffff82a65000 r hpd_names +ffffffff82a65030 r encoder_names +ffffffff82a65180 r dcc_retile_formats +ffffffff82a65270 r dcc_formats +ffffffff82a65360 R amdgpu_mode_funcs +ffffffff82a653b0 r amdgpu_underscan_enum_list +ffffffff82a653e0 r amdgpu_audio_enum_list +ffffffff82a65410 r amdgpu_dither_enum_list +ffffffff82a65430 r amdgpu_fb_funcs +ffffffff82a66000 R amdgpu_dmabuf_ops +ffffffff82a67000 R amdgpu_ioctls_kms +ffffffff82a67210 R amdgpu_ca +ffffffff82a67240 r pciidlist +ffffffff82a68110 r amdgpu_unsupported_pciidlist +ffffffff82a68690 r amdgpu_kms_driver +ffffffff82a69000 r amdgpu_job_fence_ops +ffffffff82a69038 r amdgpu_fence_ops +ffffffff82a6a000 r amdgpu_gem_object_funcs +ffffffff82a6a060 r amdgpu_gem_vm_ops +ffffffff82a6c000 R amdgpu_gtt_mgr_attr_group +ffffffff82a6c018 r amdgpu_gtt_mgr_func +ffffffff82a6d000 r amdgpu_atombios_i2c_algo +ffffffff82a6e000 R amdgpu_sched_ops +ffffffff82a71000 r amdgpu_vram_names +ffffffff82a72000 r amdgpu_preempt_mgr_func +ffffffff82a73000 R psp_ip_funcs +ffffffff82a730a0 R psp_v3_1_ip_block +ffffffff82a730b8 R psp_v10_0_ip_block +ffffffff82a730d0 R psp_v11_0_ip_block +ffffffff82a730e8 R psp_v11_0_8_ip_block +ffffffff82a73100 R psp_v12_0_ip_block +ffffffff82a73118 R psp_v13_0_ip_block +ffffffff82a73130 R psp_v13_0_4_ip_block +ffffffff82a75000 r amdgpu_evict_flags.placements +ffffffff82a79000 R amdgpu_vkms_ip_block +ffffffff82a7b000 R amdgpu_vm_cpu_funcs +ffffffff82a7d000 R amdgpu_vm_sdma_funcs +ffffffff82a7e000 R amdgpu_vram_mgr_attr_group +ffffffff82a7e018 r amdgpu_vram_mgr_func +ffffffff82a7f000 r xgmi_pcs_err_status_reg_arct +ffffffff82a80000 r GC_BASE +ffffffff82a800c0 r HDP_BASE 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dce_v10_1_ip_block +ffffffff82a830f0 r dce_v10_0_display_funcs ffffffff82a83150 r hpd_offsets -ffffffff82a83168 r dce_v11_0_encoder_funcs -ffffffff82a83188 r dce_v11_0_dac_helper_funcs -ffffffff82a831f0 r dce_v11_0_dig_helper_funcs -ffffffff82a83258 r dce_v11_0_ext_helper_funcs -ffffffff82a832c0 r dce_v11_0_audio_write_sad_regs.eld_reg_to_type -ffffffff82a832f0 r dce_v11_0_crtc_irq_funcs -ffffffff82a83300 r dce_v11_0_pageflip_irq_funcs -ffffffff82a83310 r dce_v11_0_hpd_irq_funcs +ffffffff82a83168 r dce_v10_0_encoder_funcs +ffffffff82a83188 r dce_v10_0_dac_helper_funcs +ffffffff82a831f0 r dce_v10_0_dig_helper_funcs +ffffffff82a83258 r dce_v10_0_ext_helper_funcs +ffffffff82a832c0 r dce_v10_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82a832f0 r dce_v10_0_crtc_irq_funcs +ffffffff82a83300 r dce_v10_0_pageflip_irq_funcs +ffffffff82a83310 r dce_v10_0_hpd_irq_funcs ffffffff82a83320 r interrupt_status_offsets -ffffffff82a83380 r dce_v11_0_crtc_funcs -ffffffff82a83440 r dce_v11_0_crtc_helper_funcs +ffffffff82a83380 r dce_v10_0_crtc_funcs +ffffffff82a83440 r dce_v10_0_crtc_helper_funcs ffffffff82a834c0 r vga_control_regs ffffffff82a834e0 r dig_offsets -ffffffff82a83510 r cz_mgcg_cgcg_init -ffffffff82a83530 r cz_golden_settings_a11 -ffffffff82a83550 r stoney_golden_settings_a11 -ffffffff82a83570 r polaris11_golden_settings_a11 -ffffffff82a835b0 r polaris10_golden_settings_a11 -ffffffff82a84000 R df_v1_7_funcs -ffffffff82a84070 r df_v1_7_channel_number -ffffffff82a85000 R df_v3_6_funcs -ffffffff82a85070 r df_v3_6_channel_number -ffffffff82a86000 r GC_BASE -ffffffff82a860a8 r HDP_BASE -ffffffff82a86150 r MMHUB_BASE -ffffffff82a861f8 r ATHUB_BASE -ffffffff82a862a0 r NBIO_BASE -ffffffff82a86348 r MP0_BASE -ffffffff82a863f0 r MP1_BASE -ffffffff82a86498 r VCN0_BASE -ffffffff82a86540 r DF_BASE -ffffffff82a865e8 r DCN_BASE -ffffffff82a86690 r OSSSYS_BASE -ffffffff82a86738 r SMUIO_BASE -ffffffff82a867e0 r THM_BASE -ffffffff82a87000 r gfx_v10_0_ip_funcs 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golden_settings_gc_rlc_spm_10_0_nv10 -ffffffff82a8e780 r golden_settings_gc_rlc_spm_10_1_nv14 -ffffffff82a921a0 r golden_settings_gc_rlc_spm_10_1_2_nv12 -ffffffff82a98440 r golden_settings_gc_10_1 -ffffffff82a98800 r golden_settings_gc_10_0_nv10 -ffffffff82a98800 r golden_settings_gc_10_1_1 -ffffffff82a98b90 r golden_settings_gc_10_1_2 -ffffffff82a98b90 r golden_settings_gc_10_1_nv14 -ffffffff82a98f80 r golden_settings_gc_10_1_2_nv12 -ffffffff82a98f80 r golden_settings_gc_10_3 -ffffffff82a99388 r golden_settings_gc_10_3_sienna_cichlid -ffffffff82a99390 r golden_settings_gc_10_3_2 -ffffffff82a99780 r golden_settings_gc_10_3_vangogh -ffffffff82a999e0 r golden_settings_gc_10_3_3 -ffffffff82a99bc0 r golden_settings_gc_10_3_4 -ffffffff82a99f20 r golden_settings_gc_10_3_5 -ffffffff82a9a220 r golden_settings_gc_10_0_cyan_skillfish -ffffffff82a9a550 r golden_settings_gc_10_3_6 -ffffffff82a9a760 r golden_settings_gc_10_3_7 -ffffffff82a9b000 r gfx_v11_0_ip_funcs -ffffffff82a9b0a0 R gfx_v11_0_ip_block -ffffffff82a9b0b8 r gfx_v11_0_kiq_pm4_funcs -ffffffff82a9b0f8 r gfx_v11_0_ring_funcs_kiq -ffffffff82a9b218 r gfx_v11_0_ring_funcs_gfx -ffffffff82a9b338 r gfx_v11_0_ring_funcs_compute -ffffffff82a9b458 r gfx_v11_0_eop_irq_funcs -ffffffff82a9b468 r gfx_v11_0_priv_reg_irq_funcs -ffffffff82a9b478 r gfx_v11_0_priv_inst_irq_funcs -ffffffff82a9b488 r gfx_v11_0_rlc_funcs -ffffffff82a9b4f0 r gfx11_cs_data -ffffffff82a9b510 r gfx11_SECT_CONTEXT_defs -ffffffff82a9b590 r gfx11_SECT_CONTEXT_def_1 -ffffffff82a9b8f0 r gfx11_SECT_CONTEXT_def_3 -ffffffff82a9b900 r gfx11_SECT_CONTEXT_def_5 -ffffffff82a9b908 r gfx11_SECT_CONTEXT_def_6 -ffffffff82a9b910 r gfx11_SECT_CONTEXT_def_2 -ffffffff82a9bd50 r gfx11_SECT_CONTEXT_def_4 -ffffffff82a9bfd0 r gfx11_SECT_CONTEXT_def_7 -ffffffff82a9c438 r gfx_v11_0_gfx_funcs -ffffffff82a9c480 r golden_settings_gc_11_0_1 -ffffffff82a9d000 r gfx_v8_0_ip_funcs -ffffffff82a9d0a0 R gfx_v8_0_ip_block -ffffffff82a9d0b8 R gfx_v8_1_ip_block -ffffffff82a9d0d0 r gfx_v8_0_gfx_funcs -ffffffff82a9d110 r gfx_v8_0_ring_funcs_kiq -ffffffff82a9d230 r gfx_v8_0_ring_funcs_gfx -ffffffff82a9d350 r gfx_v8_0_ring_funcs_compute -ffffffff82a9d470 r amdgpu_gds_reg_offset -ffffffff82a9d570 r gfx_v8_0_eop_irq_funcs -ffffffff82a9d580 r gfx_v8_0_priv_reg_irq_funcs -ffffffff82a9d590 r gfx_v8_0_priv_inst_irq_funcs -ffffffff82a9d5a0 r gfx_v8_0_cp_ecc_error_irq_funcs -ffffffff82a9d5b0 r gfx_v8_0_sq_irq_funcs -ffffffff82a9d5c0 r sq_edc_source_names -ffffffff82a9d5f8 r iceland_rlc_funcs -ffffffff82a9d660 r vi_cs_data -ffffffff82a9d680 r vi_SECT_CONTEXT_defs -ffffffff82a9d700 r vi_SECT_CONTEXT_def_1 -ffffffff82a9da50 r vi_SECT_CONTEXT_def_3 -ffffffff82a9da70 r vi_SECT_CONTEXT_def_4 -ffffffff82a9dce4 r vi_SECT_CONTEXT_def_5 -ffffffff82a9dcec r vi_SECT_CONTEXT_def_6 -ffffffff82a9dcf0 r vi_SECT_CONTEXT_def_2 -ffffffff82a9e140 r vi_SECT_CONTEXT_def_7 -ffffffff82a9e4f0 r vgpr_init_compute_shader -ffffffff82a9e600 r vgpr_init_regs -ffffffff82a9e690 r sgpr1_init_regs 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stoney_golden_common_all -ffffffff82aa0000 R gfx_v9_0_ras_ops -ffffffff82aa0040 r gfx_v9_0_ip_funcs -ffffffff82aa00e0 R gfx_v9_0_ip_block -ffffffff82aa0100 r ras_gfx_subblocks -ffffffff82aa0b80 r gfx_v9_0_edc_counter_regs -ffffffff82aa0f20 r gfx_v9_0_ras_fields -ffffffff82aa2000 r gfx_v9_0_kiq_pm4_funcs -ffffffff82aa2040 r gfx_v9_0_ring_funcs_kiq -ffffffff82aa2160 r gfx_v9_0_ring_funcs_gfx -ffffffff82aa2280 r gfx_v9_0_ring_funcs_compute -ffffffff82aa23a0 r gfx_v9_0_eop_irq_funcs -ffffffff82aa23b0 r gfx_v9_0_priv_reg_irq_funcs -ffffffff82aa23c0 r gfx_v9_0_priv_inst_irq_funcs -ffffffff82aa23d0 r gfx_v9_0_cp_ecc_error_irq_funcs -ffffffff82aa23e0 r gfx_v9_0_rlc_funcs -ffffffff82aa2450 r gfx9_cs_data -ffffffff82aa2470 r gfx9_SECT_CONTEXT_defs -ffffffff82aa2500 r gfx9_SECT_CONTEXT_def_1 -ffffffff82aa2850 r gfx9_SECT_CONTEXT_def_3 -ffffffff82aa2860 r gfx9_SECT_CONTEXT_def_4 -ffffffff82aa2ad4 r gfx9_SECT_CONTEXT_def_5 -ffffffff82aa2adc r gfx9_SECT_CONTEXT_def_6 -ffffffff82aa2ae0 r gfx9_SECT_CONTEXT_def_7 -ffffffff82aa2bf0 r gfx9_SECT_CONTEXT_def_2 -ffffffff82aa3060 r gfx9_SECT_CONTEXT_def_8 -ffffffff82aa32d0 r vgpr_init_compute_shader_arcturus -ffffffff82aa3b60 r vgpr_init_regs_arcturus -ffffffff82aa3cf0 r vgpr_init_regs -ffffffff82aa3e80 r sgpr1_init_regs -ffffffff82aa4010 r sgpr2_init_regs -ffffffff82aa4198 r gfx_v9_0_gfx_funcs -ffffffff82aa41e0 r golden_settings_gc_9_0 -ffffffff82aa43c0 r golden_settings_gc_9_0_vg10 -ffffffff82aa4570 r golden_settings_gc_9_2_1 -ffffffff82aa46f0 r golden_settings_gc_9_2_1_vg12 -ffffffff82aa4830 r golden_settings_gc_9_0_vg20 -ffffffff82aa4940 r golden_settings_gc_9_4_1_arct -ffffffff82aa4a50 r golden_settings_gc_9_1 -ffffffff82aa4c90 r golden_settings_gc_9_1_rv2 -ffffffff82aa4e60 r golden_settings_gc_9_1_rv1 -ffffffff82aa4f10 r golden_settings_gc_9_1_rn -ffffffff82aa5030 r golden_settings_gc_9_x_common -ffffffff82aa6000 R gfx_v9_4_ras_ops -ffffffff82aa6040 r gfx_v9_4_edc_counter_regs -ffffffff82aa6420 r gfx_v9_4_ras_fields -ffffffff82aa8000 R vgpr_init_regs_aldebaran -ffffffff82aa81b0 R sgpr112_init_regs_aldebaran -ffffffff82aa8360 R sgpr96_init_regs_aldebaran -ffffffff82aa8510 R sgpr64_init_regs_aldebaran -ffffffff82aa86c0 r golden_settings_gc_9_4_2_alde -ffffffff82aa8720 r golden_settings_gc_9_4_2_alde_die_0 -ffffffff82aa87b0 r golden_settings_gc_9_4_2_alde_die_1 -ffffffff82aa8840 r sgpr112_init_compute_shader_aldebaran -ffffffff82aa8a60 r sgpr96_init_compute_shader_aldebaran -ffffffff82aa8c50 r sgpr64_init_compute_shader_aldebaran -ffffffff82aa8dc0 r vgpr_init_compute_shader_aldebaran -ffffffff82aa96a0 r gfx_v9_4_2_edc_counter_regs -ffffffff82aa9a20 r gfx_v9_4_2_ras_fields -ffffffff82aab3c0 r gfx_v9_4_2_utc_blocks -ffffffff82aac000 R gfxhub_v1_0_funcs -ffffffff82aad000 R gfxhub_v2_0_funcs -ffffffff82aad060 r gfxhub_v2_0_vmhub_funcs -ffffffff82aad070 r gfxhub_client_ids -ffffffff82aae000 R gfxhub_v2_1_funcs -ffffffff82aae060 r gfxhub_v2_1_vmhub_funcs +ffffffff82a83500 r pin_offsets +ffffffff82a83520 r fiji_mgcg_cgcg_init +ffffffff82a83540 r golden_settings_fiji_a10 +ffffffff82a83570 r tonga_mgcg_cgcg_init +ffffffff82a83590 r golden_settings_tonga_a11 +ffffffff82a84000 r crtc_offsets +ffffffff82a84020 r dce_v11_0_ip_funcs +ffffffff82a840c0 R dce_v11_0_ip_block +ffffffff82a840d8 R dce_v11_2_ip_block +ffffffff82a840f0 r dce_v11_0_display_funcs +ffffffff82a84150 r hpd_offsets +ffffffff82a84168 r dce_v11_0_encoder_funcs +ffffffff82a84188 r dce_v11_0_dac_helper_funcs +ffffffff82a841f0 r dce_v11_0_dig_helper_funcs +ffffffff82a84258 r dce_v11_0_ext_helper_funcs +ffffffff82a842c0 r dce_v11_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82a842f0 r dce_v11_0_crtc_irq_funcs +ffffffff82a84300 r dce_v11_0_pageflip_irq_funcs +ffffffff82a84310 r dce_v11_0_hpd_irq_funcs +ffffffff82a84320 r interrupt_status_offsets +ffffffff82a84380 r dce_v11_0_crtc_funcs +ffffffff82a84440 r dce_v11_0_crtc_helper_funcs +ffffffff82a844c0 r vga_control_regs +ffffffff82a844e0 r dig_offsets +ffffffff82a84510 r cz_mgcg_cgcg_init +ffffffff82a84530 r cz_golden_settings_a11 +ffffffff82a84550 r stoney_golden_settings_a11 +ffffffff82a84570 r polaris11_golden_settings_a11 +ffffffff82a845b0 r polaris10_golden_settings_a11 +ffffffff82a85000 R df_v1_7_funcs +ffffffff82a85070 r df_v1_7_channel_number +ffffffff82a86000 R df_v3_6_funcs +ffffffff82a86070 r df_v3_6_channel_number +ffffffff82a87000 r GC_BASE +ffffffff82a870a8 r HDP_BASE +ffffffff82a87150 r MMHUB_BASE +ffffffff82a871f8 r ATHUB_BASE +ffffffff82a872a0 r NBIO_BASE +ffffffff82a87348 r MP0_BASE +ffffffff82a873f0 r MP1_BASE +ffffffff82a87498 r VCN0_BASE +ffffffff82a87540 r DF_BASE +ffffffff82a875e8 r DCN_BASE +ffffffff82a87690 r OSSSYS_BASE +ffffffff82a87738 r SMUIO_BASE +ffffffff82a877e0 r THM_BASE +ffffffff82a88000 r gfx_v10_0_ip_funcs +ffffffff82a880a0 R gfx_v10_0_ip_block +ffffffff82a880b8 r gfx_v10_0_kiq_pm4_funcs +ffffffff82a880f8 r gfx_v10_0_ring_funcs_kiq +ffffffff82a88218 r gfx_v10_0_ring_funcs_gfx +ffffffff82a88338 r gfx_v10_0_ring_funcs_compute +ffffffff82a88458 r gfx_v10_0_eop_irq_funcs +ffffffff82a88468 r gfx_v10_0_kiq_irq_funcs +ffffffff82a88478 r gfx_v10_0_priv_reg_irq_funcs +ffffffff82a88488 r gfx_v10_0_priv_inst_irq_funcs +ffffffff82a88498 r gfx_v10_0_rlc_funcs +ffffffff82a88500 r gfx_v10_0_rlc_funcs_sriov +ffffffff82a88570 r gfx10_cs_data +ffffffff82a88590 r gfx10_SECT_CONTEXT_defs +ffffffff82a88620 r gfx10_SECT_CONTEXT_def_1 +ffffffff82a88980 r gfx10_SECT_CONTEXT_def_3 +ffffffff82a88990 r gfx10_SECT_CONTEXT_def_4 +ffffffff82a88c08 r gfx10_SECT_CONTEXT_def_5 +ffffffff82a88c10 r gfx10_SECT_CONTEXT_def_6 +ffffffff82a88c20 r gfx10_SECT_CONTEXT_def_2 +ffffffff82a89060 r gfx10_SECT_CONTEXT_def_7 +ffffffff82a89170 r gfx10_SECT_CONTEXT_def_8 +ffffffff82a894a0 r gfx_v10_0_gfx_funcs +ffffffff82a894e0 r golden_settings_gc_rlc_spm_10_0_nv10 +ffffffff82a8f780 r golden_settings_gc_rlc_spm_10_1_nv14 +ffffffff82a931a0 r golden_settings_gc_rlc_spm_10_1_2_nv12 +ffffffff82a99440 r golden_settings_gc_10_1 +ffffffff82a99800 r golden_settings_gc_10_0_nv10 +ffffffff82a99800 r golden_settings_gc_10_1_1 +ffffffff82a99b90 r golden_settings_gc_10_1_2 +ffffffff82a99b90 r golden_settings_gc_10_1_nv14 +ffffffff82a99f80 r golden_settings_gc_10_1_2_nv12 +ffffffff82a99f80 r golden_settings_gc_10_3 +ffffffff82a9a388 r golden_settings_gc_10_3_sienna_cichlid +ffffffff82a9a390 r golden_settings_gc_10_3_2 +ffffffff82a9a780 r golden_settings_gc_10_3_vangogh +ffffffff82a9a9e0 r golden_settings_gc_10_3_3 +ffffffff82a9abc0 r golden_settings_gc_10_3_4 +ffffffff82a9af20 r golden_settings_gc_10_3_5 +ffffffff82a9b220 r golden_settings_gc_10_0_cyan_skillfish +ffffffff82a9b550 r golden_settings_gc_10_3_6 +ffffffff82a9b760 r golden_settings_gc_10_3_7 +ffffffff82a9c000 r gfx_v11_0_ip_funcs +ffffffff82a9c0a0 R gfx_v11_0_ip_block +ffffffff82a9c0b8 r gfx_v11_0_kiq_pm4_funcs +ffffffff82a9c0f8 r gfx_v11_0_ring_funcs_kiq +ffffffff82a9c218 r gfx_v11_0_ring_funcs_gfx +ffffffff82a9c338 r gfx_v11_0_ring_funcs_compute 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iceland_golden_common_all +ffffffff82a9fc40 r fiji_mgcg_cgcg_init +ffffffff82a9fdf0 r golden_settings_fiji_a10 +ffffffff82a9fe80 r fiji_golden_common_all +ffffffff82a9ff00 r tonga_mgcg_cgcg_init +ffffffff82aa0290 r golden_settings_tonga_a11 +ffffffff82aa0350 r tonga_golden_common_all +ffffffff82aa03b0 r golden_settings_vegam_a11 +ffffffff82aa0480 r vegam_golden_common_all +ffffffff82aa04d0 r golden_settings_polaris11_a11 +ffffffff82aa05a0 r polaris11_golden_common_all +ffffffff82aa05f0 r golden_settings_polaris10_a11 +ffffffff82aa06c0 r polaris10_golden_common_all +ffffffff82aa0720 r cz_mgcg_cgcg_init +ffffffff82aa0ab0 r cz_golden_settings_a11 +ffffffff82aa0b40 r cz_golden_common_all +ffffffff82aa0ba0 r stoney_mgcg_cgcg_init +ffffffff82aa0be0 r stoney_golden_settings_a11 +ffffffff82aa0c60 r stoney_golden_common_all +ffffffff82aa1000 R gfx_v9_0_ras_ops +ffffffff82aa1040 r gfx_v9_0_ip_funcs +ffffffff82aa10e0 R gfx_v9_0_ip_block +ffffffff82aa1100 r ras_gfx_subblocks +ffffffff82aa1b80 r gfx_v9_0_edc_counter_regs +ffffffff82aa1f20 r gfx_v9_0_ras_fields +ffffffff82aa3000 r gfx_v9_0_kiq_pm4_funcs +ffffffff82aa3040 r gfx_v9_0_ring_funcs_kiq +ffffffff82aa3160 r gfx_v9_0_ring_funcs_gfx +ffffffff82aa3280 r gfx_v9_0_ring_funcs_compute +ffffffff82aa33a0 r gfx_v9_0_eop_irq_funcs +ffffffff82aa33b0 r gfx_v9_0_priv_reg_irq_funcs +ffffffff82aa33c0 r gfx_v9_0_priv_inst_irq_funcs +ffffffff82aa33d0 r gfx_v9_0_cp_ecc_error_irq_funcs +ffffffff82aa33e0 r gfx_v9_0_rlc_funcs +ffffffff82aa3450 r gfx9_cs_data +ffffffff82aa3470 r gfx9_SECT_CONTEXT_defs +ffffffff82aa3500 r gfx9_SECT_CONTEXT_def_1 +ffffffff82aa3850 r gfx9_SECT_CONTEXT_def_3 +ffffffff82aa3860 r gfx9_SECT_CONTEXT_def_4 +ffffffff82aa3ad4 r gfx9_SECT_CONTEXT_def_5 +ffffffff82aa3adc r gfx9_SECT_CONTEXT_def_6 +ffffffff82aa3ae0 r gfx9_SECT_CONTEXT_def_7 +ffffffff82aa3bf0 r gfx9_SECT_CONTEXT_def_2 +ffffffff82aa4060 r gfx9_SECT_CONTEXT_def_8 +ffffffff82aa42d0 r vgpr_init_compute_shader_arcturus +ffffffff82aa4b60 r vgpr_init_regs_arcturus +ffffffff82aa4cf0 r vgpr_init_regs +ffffffff82aa4e80 r sgpr1_init_regs +ffffffff82aa5010 r sgpr2_init_regs +ffffffff82aa5198 r gfx_v9_0_gfx_funcs +ffffffff82aa51e0 r golden_settings_gc_9_0 +ffffffff82aa53c0 r golden_settings_gc_9_0_vg10 +ffffffff82aa5570 r golden_settings_gc_9_2_1 +ffffffff82aa56f0 r golden_settings_gc_9_2_1_vg12 +ffffffff82aa5830 r golden_settings_gc_9_0_vg20 +ffffffff82aa5940 r golden_settings_gc_9_4_1_arct +ffffffff82aa5a50 r golden_settings_gc_9_1 +ffffffff82aa5c90 r golden_settings_gc_9_1_rv2 +ffffffff82aa5e60 r golden_settings_gc_9_1_rv1 +ffffffff82aa5f10 r golden_settings_gc_9_1_rn +ffffffff82aa6030 r golden_settings_gc_9_x_common +ffffffff82aa7000 R gfx_v9_4_ras_ops +ffffffff82aa7040 r gfx_v9_4_edc_counter_regs +ffffffff82aa7420 r gfx_v9_4_ras_fields +ffffffff82aa9000 R vgpr_init_regs_aldebaran +ffffffff82aa91b0 R sgpr112_init_regs_aldebaran +ffffffff82aa9360 R sgpr96_init_regs_aldebaran +ffffffff82aa9510 R sgpr64_init_regs_aldebaran +ffffffff82aa96c0 r golden_settings_gc_9_4_2_alde +ffffffff82aa9720 r golden_settings_gc_9_4_2_alde_die_0 +ffffffff82aa97b0 r golden_settings_gc_9_4_2_alde_die_1 +ffffffff82aa9840 r sgpr112_init_compute_shader_aldebaran +ffffffff82aa9a60 r sgpr96_init_compute_shader_aldebaran +ffffffff82aa9c50 r sgpr64_init_compute_shader_aldebaran +ffffffff82aa9dc0 r vgpr_init_compute_shader_aldebaran +ffffffff82aaa6a0 r gfx_v9_4_2_edc_counter_regs +ffffffff82aaaa20 r gfx_v9_4_2_ras_fields +ffffffff82aac3c0 r gfx_v9_4_2_utc_blocks +ffffffff82aad000 R gfxhub_v1_0_funcs +ffffffff82aae000 R gfxhub_v2_0_funcs +ffffffff82aae060 r gfxhub_v2_0_vmhub_funcs ffffffff82aae070 r gfxhub_client_ids -ffffffff82aaf000 R gfxhub_v3_0_funcs -ffffffff82aaf060 r gfxhub_v3_0_vmhub_funcs +ffffffff82aaf000 R gfxhub_v2_1_funcs +ffffffff82aaf060 r gfxhub_v2_1_vmhub_funcs ffffffff82aaf070 r gfxhub_client_ids -ffffffff82ab0000 R gfxhub_v3_0_3_funcs -ffffffff82ab0060 r gfxhub_v3_0_3_vmhub_funcs +ffffffff82ab0000 R gfxhub_v3_0_funcs +ffffffff82ab0060 r gfxhub_v3_0_vmhub_funcs ffffffff82ab0070 r gfxhub_client_ids -ffffffff82ab1000 R gmc_v10_0_ip_funcs -ffffffff82ab10a0 R gmc_v10_0_ip_block -ffffffff82ab10b8 r gmc_v10_0_gmc_funcs -ffffffff82ab1100 r gmc_v10_0_irq_funcs -ffffffff82ab1110 r gmc_v10_0_ecc_funcs -ffffffff82ab2000 R gmc_v11_0_ip_funcs -ffffffff82ab20a0 R gmc_v11_0_ip_block -ffffffff82ab20b8 r gmc_v11_0_gmc_funcs -ffffffff82ab2100 r gmc_v11_0_irq_funcs -ffffffff82ab2110 r gmc_v11_0_ecc_funcs -ffffffff82ab3000 r gmc_v7_0_ip_funcs -ffffffff82ab30a0 R gmc_v7_0_ip_block -ffffffff82ab30b8 R gmc_v7_4_ip_block -ffffffff82ab30d0 r gmc_v7_0_gmc_funcs -ffffffff82ab3118 r gmc_v7_0_irq_funcs -ffffffff82ab3128 r iceland_mgcg_cgcg_init -ffffffff82ab3140 r golden_settings_iceland_a11 -ffffffff82ab3170 r mc_cg_registers -ffffffff82ab31a0 r mc_cg_en -ffffffff82ab31d0 r mc_cg_ls_en -ffffffff82ab4000 r gmc_v8_0_ip_funcs -ffffffff82ab40a0 R gmc_v8_0_ip_block -ffffffff82ab40b8 R gmc_v8_1_ip_block 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mmhub_client_ids_renoir -ffffffff82ab7630 r mmhub_client_ids_aldebaran -ffffffff82ab8e40 r ecc_umc_mcumc_ctrl_addrs -ffffffff82ab8ec0 r ecc_umc_mcumc_ctrl_mask_addrs -ffffffff82ab8f40 r golden_settings_mmhub_1_0_0 -ffffffff82ab8f70 r golden_settings_athub_1_0_0 -ffffffff82ab9000 R hdp_v4_0_funcs -ffffffff82aba000 R hdp_v5_0_funcs -ffffffff82abb000 R hdp_v5_2_funcs -ffffffff82abc000 R hdp_v6_0_funcs -ffffffff82abd000 r iceland_ih_ip_funcs -ffffffff82abd0a0 R iceland_ih_ip_block -ffffffff82abd0b8 r iceland_ih_funcs -ffffffff82abe000 r ih_v6_0_ip_funcs -ffffffff82abe0a0 R ih_v6_0_ip_block -ffffffff82abe0b8 r ih_v6_0_funcs -ffffffff82abe0d8 r ih_v6_0_self_irq_funcs -ffffffff82abf000 R gfx_v11_0_imu_funcs -ffffffff82abf030 r imu_rlc_ram_golden_11 -ffffffff82abf680 r imu_rlc_ram_golden_11_0_2 -ffffffff82ac0000 r imu_rlc_ram_golden_11_0_3 -ffffffff82ac1000 r jpeg_v1_0_decode_ring_vm_funcs -ffffffff82ac1120 r jpeg_v1_0_irq_funcs -ffffffff82ac2000 r jpeg_v2_0_ip_funcs -ffffffff82ac20a0 R jpeg_v2_0_ip_block -ffffffff82ac20b8 r jpeg_v2_0_dec_ring_vm_funcs -ffffffff82ac21d8 r jpeg_v2_0_irq_funcs -ffffffff82ac3000 r jpeg_v2_5_ip_funcs -ffffffff82ac30a0 R jpeg_v2_5_ip_block -ffffffff82ac30b8 r jpeg_v2_6_ip_funcs -ffffffff82ac3158 R jpeg_v2_6_ip_block -ffffffff82ac3170 R jpeg_v2_6_ras_hw_ops -ffffffff82ac31b0 r jpeg_v2_5_dec_ring_vm_funcs -ffffffff82ac32d0 r jpeg_v2_6_dec_ring_vm_funcs -ffffffff82ac33f0 r jpeg_v2_5_irq_funcs -ffffffff82ac4000 r jpeg_v3_0_ip_funcs -ffffffff82ac40a0 R jpeg_v3_0_ip_block -ffffffff82ac40b8 r jpeg_v3_0_dec_ring_vm_funcs -ffffffff82ac41d8 r jpeg_v3_0_irq_funcs -ffffffff82ac5000 r jpeg_v4_0_ip_funcs -ffffffff82ac50a0 R jpeg_v4_0_ip_block -ffffffff82ac50b8 r jpeg_v4_0_dec_ring_vm_funcs -ffffffff82ac51d8 r jpeg_v4_0_irq_funcs -ffffffff82ac6000 R lsdma_v6_0_funcs -ffffffff82ac7000 R mca_v3_0_mp0_hw_ops -ffffffff82ac7040 R mca_v3_0_mp1_hw_ops -ffffffff82ac7080 R mca_v3_0_mpio_hw_ops -ffffffff82ac70c0 R mca_v3_0_funcs -ffffffff82ac8000 r mes_v10_1_ip_funcs -ffffffff82ac80a0 R mes_v10_1_ip_block -ffffffff82ac80b8 r mes_v10_1_funcs -ffffffff82ac80e8 r mes_v10_1_ring_funcs -ffffffff82ac9000 r mes_v11_0_ip_funcs -ffffffff82ac90a0 R mes_v11_0_ip_block -ffffffff82ac90b8 r mes_v11_0_funcs -ffffffff82ac90e8 r mes_v11_0_ring_funcs -ffffffff82aca000 R mmhub_v1_0_funcs -ffffffff82aca050 r mmhub_v1_0_edc_cnt_regs -ffffffff82aca0c0 r mmhub_v1_0_ras_fields -ffffffff82acb000 R mmhub_v1_7_funcs -ffffffff82acb050 r mmhub_v1_7_edc_cnt_regs -ffffffff82acb250 r mmhub_v1_7_ras_fields -ffffffff82acc9c0 r mmhub_v1_7_ea_err_status_regs -ffffffff82acd000 R mmhub_v2_0_funcs -ffffffff82acd050 r mmhub_v2_0_vmhub_funcs -ffffffff82acd060 r mmhub_client_ids_navi1x -ffffffff82acd190 r mmhub_client_ids_sienna_cichlid -ffffffff82acd450 r mmhub_client_ids_beige_goby -ffffffff82ace000 R mmhub_v2_3_funcs -ffffffff82ace050 r mmhub_v2_3_vmhub_funcs -ffffffff82ace060 r mmhub_client_ids_vangogh -ffffffff82acf000 R mmhub_v3_0_funcs -ffffffff82acf050 r mmhub_v3_0_vmhub_funcs -ffffffff82acf060 r mmhub_client_ids_v3_0_0 -ffffffff82ad0000 R mmhub_v3_0_1_funcs -ffffffff82ad0050 r mmhub_v3_0_1_vmhub_funcs -ffffffff82ad0060 r mmhub_client_ids_v3_0_1 -ffffffff82ad1000 R mmhub_v3_0_2_funcs -ffffffff82ad1050 r mmhub_v3_0_2_vmhub_funcs -ffffffff82ad1060 r mmhub_client_ids_v3_0_2 -ffffffff82ad2000 R mmhub_v9_4_ras_hw_ops -ffffffff82ad2040 R mmhub_v9_4_funcs -ffffffff82ad2090 r mmhub_v9_4_edc_cnt_regs -ffffffff82ad2330 r mmhub_v9_4_ras_fields -ffffffff82ad43b0 r mmhub_v9_4_err_status_regs -ffffffff82ad5000 r xgpu_ai_mailbox_ack_irq_funcs -ffffffff82ad5010 r xgpu_ai_mailbox_rcv_irq_funcs -ffffffff82ad5020 R xgpu_ai_virt_ops -ffffffff82ad6000 r xgpu_nv_mailbox_ack_irq_funcs -ffffffff82ad6010 r xgpu_nv_mailbox_rcv_irq_funcs -ffffffff82ad6020 R xgpu_nv_virt_ops -ffffffff82ad7000 r xgpu_fiji_mgcg_cgcg_init -ffffffff82ad7240 r xgpu_fiji_golden_settings_a10 -ffffffff82ad7370 r xgpu_fiji_golden_common_all -ffffffff82ad73f0 r xgpu_tonga_mgcg_cgcg_init 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nbio_v7_4_ras_controller_irq_funcs -ffffffff82ade180 r nbio_v7_4_ras_err_event_athub_irq_funcs -ffffffff82adf000 R nbio_v7_7_hdp_flush_reg -ffffffff82adf048 R nbio_v7_7_funcs -ffffffff82ae0000 r nv_common_ip_funcs -ffffffff82ae00a0 R nv_common_ip_block -ffffffff82ae00b8 r nv_asic_funcs -ffffffff82ae0170 r nv_allowed_read_registers -ffffffff82ae02f0 r nv_video_codecs_encode -ffffffff82ae0300 r sc_video_codecs_decode -ffffffff82ae0310 r yc_video_codecs_decode -ffffffff82ae0320 r bg_video_codecs_encode -ffffffff82ae0330 r bg_video_codecs_decode -ffffffff82ae0340 r nv_video_codecs_decode -ffffffff82ae0350 r nv_video_codecs_encode_array -ffffffff82ae0380 r sc_video_codecs_decode_array -ffffffff82ae0420 r yc_video_codecs_decode_array -ffffffff82ae0490 r bg_video_codecs_decode_array -ffffffff82ae04d0 r nv_video_codecs_decode_array -ffffffff82ae1000 r psp_v10_0_funcs -ffffffff82ae2000 r psp_v11_0_funcs -ffffffff82ae3000 r psp_v11_0_8_funcs -ffffffff82ae4000 r psp_v12_0_funcs -ffffffff82ae5000 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+ffffffff82ac8080 R mca_v3_0_mpio_hw_ops +ffffffff82ac80c0 R mca_v3_0_funcs +ffffffff82ac9000 r mes_v10_1_ip_funcs +ffffffff82ac90a0 R mes_v10_1_ip_block +ffffffff82ac90b8 r mes_v10_1_funcs +ffffffff82ac90e8 r mes_v10_1_ring_funcs +ffffffff82aca000 r mes_v11_0_ip_funcs +ffffffff82aca0a0 R mes_v11_0_ip_block +ffffffff82aca0b8 r mes_v11_0_funcs +ffffffff82aca0e8 r mes_v11_0_ring_funcs +ffffffff82acb000 R mmhub_v1_0_funcs +ffffffff82acb050 r mmhub_v1_0_edc_cnt_regs +ffffffff82acb0c0 r mmhub_v1_0_ras_fields +ffffffff82acc000 R mmhub_v1_7_funcs +ffffffff82acc050 r mmhub_v1_7_edc_cnt_regs +ffffffff82acc250 r mmhub_v1_7_ras_fields +ffffffff82acd9c0 r mmhub_v1_7_ea_err_status_regs +ffffffff82ace000 R mmhub_v2_0_funcs +ffffffff82ace050 r mmhub_v2_0_vmhub_funcs +ffffffff82ace060 r mmhub_client_ids_navi1x +ffffffff82ace190 r mmhub_client_ids_sienna_cichlid +ffffffff82ace450 r mmhub_client_ids_beige_goby +ffffffff82acf000 R mmhub_v2_3_funcs +ffffffff82acf050 r mmhub_v2_3_vmhub_funcs +ffffffff82acf060 r mmhub_client_ids_vangogh +ffffffff82ad0000 R mmhub_v3_0_funcs +ffffffff82ad0050 r mmhub_v3_0_vmhub_funcs +ffffffff82ad0060 r mmhub_client_ids_v3_0_0 +ffffffff82ad1000 R mmhub_v3_0_1_funcs +ffffffff82ad1050 r mmhub_v3_0_1_vmhub_funcs +ffffffff82ad1060 r mmhub_client_ids_v3_0_1 +ffffffff82ad2000 R mmhub_v3_0_2_funcs +ffffffff82ad2050 r mmhub_v3_0_2_vmhub_funcs +ffffffff82ad2060 r mmhub_client_ids_v3_0_2 +ffffffff82ad3000 R mmhub_v9_4_ras_hw_ops +ffffffff82ad3040 R mmhub_v9_4_funcs +ffffffff82ad3090 r mmhub_v9_4_edc_cnt_regs +ffffffff82ad3330 r mmhub_v9_4_ras_fields +ffffffff82ad53b0 r mmhub_v9_4_err_status_regs +ffffffff82ad6000 r xgpu_ai_mailbox_ack_irq_funcs +ffffffff82ad6010 r xgpu_ai_mailbox_rcv_irq_funcs +ffffffff82ad6020 R xgpu_ai_virt_ops +ffffffff82ad7000 r xgpu_nv_mailbox_ack_irq_funcs +ffffffff82ad7010 r xgpu_nv_mailbox_rcv_irq_funcs +ffffffff82ad7020 R xgpu_nv_virt_ops +ffffffff82ad8000 r xgpu_fiji_mgcg_cgcg_init +ffffffff82ad8240 r xgpu_fiji_golden_settings_a10 +ffffffff82ad8370 r xgpu_fiji_golden_common_all +ffffffff82ad83f0 r xgpu_tonga_mgcg_cgcg_init +ffffffff82ad8810 r xgpu_tonga_golden_settings_a11 +ffffffff82ad89d0 r xgpu_tonga_golden_common_all +ffffffff82ad8a28 r xgpu_vi_mailbox_ack_irq_funcs +ffffffff82ad8a38 r xgpu_vi_mailbox_rcv_irq_funcs +ffffffff82ad8a48 R xgpu_vi_virt_ops +ffffffff82ad9000 r navi10_ih_ip_funcs +ffffffff82ad90a0 R navi10_ih_ip_block +ffffffff82ad90b8 r navi10_ih_funcs +ffffffff82ad90d8 r navi10_ih_self_irq_funcs +ffffffff82ada000 R nbio_v2_3_hdp_flush_reg +ffffffff82ada048 R nbio_v2_3_funcs +ffffffff82adb000 R nbio_v4_3_hdp_flush_reg +ffffffff82adb048 R nbio_v4_3_funcs +ffffffff82adb130 R nbio_v4_3_sriov_funcs +ffffffff82adc000 R nbio_v6_1_hdp_flush_reg +ffffffff82adc048 R nbio_v6_1_funcs +ffffffff82add000 R nbio_v7_0_hdp_flush_reg +ffffffff82add048 R nbio_v7_0_funcs +ffffffff82ade000 R nbio_v7_2_hdp_flush_reg +ffffffff82ade048 R nbio_v7_2_funcs +ffffffff82adf000 R nbio_v7_4_hdp_flush_reg +ffffffff82adf048 R nbio_v7_4_ras_hw_ops +ffffffff82adf088 R nbio_v7_4_funcs +ffffffff82adf170 r nbio_v7_4_ras_controller_irq_funcs +ffffffff82adf180 r nbio_v7_4_ras_err_event_athub_irq_funcs +ffffffff82ae0000 R nbio_v7_7_hdp_flush_reg +ffffffff82ae0048 R nbio_v7_7_funcs +ffffffff82ae1000 r nv_common_ip_funcs +ffffffff82ae10a0 R nv_common_ip_block +ffffffff82ae10b8 r nv_asic_funcs +ffffffff82ae1170 r nv_allowed_read_registers +ffffffff82ae12f0 r nv_video_codecs_encode +ffffffff82ae1300 r sc_video_codecs_decode +ffffffff82ae1310 r yc_video_codecs_decode +ffffffff82ae1320 r bg_video_codecs_encode +ffffffff82ae1330 r bg_video_codecs_decode +ffffffff82ae1340 r nv_video_codecs_decode +ffffffff82ae1350 r nv_video_codecs_encode_array +ffffffff82ae1380 r sc_video_codecs_decode_array +ffffffff82ae1420 r yc_video_codecs_decode_array +ffffffff82ae1490 r bg_video_codecs_decode_array +ffffffff82ae14d0 r nv_video_codecs_decode_array +ffffffff82ae2000 r psp_v10_0_funcs +ffffffff82ae3000 r psp_v11_0_funcs +ffffffff82ae4000 r psp_v11_0_8_funcs +ffffffff82ae5000 r psp_v12_0_funcs +ffffffff82ae6000 r psp_v13_0_funcs +ffffffff82ae7000 r psp_v13_0_4_funcs +ffffffff82ae8000 r psp_v3_1_funcs +ffffffff82ae9000 r sdma_v2_4_ip_funcs +ffffffff82ae90a0 R sdma_v2_4_ip_block +ffffffff82ae90b8 r sdma_v2_4_ring_funcs +ffffffff82ae91d8 r sdma_v2_4_buffer_funcs +ffffffff82ae91f8 r sdma_v2_4_vm_pte_funcs +ffffffff82ae9218 r sdma_v2_4_trap_irq_funcs +ffffffff82ae9228 r sdma_v2_4_illegal_inst_irq_funcs +ffffffff82ae9240 r iceland_mgcg_cgcg_init +ffffffff82ae9260 r golden_settings_iceland_a11 +ffffffff82aea000 r sdma_v3_0_ip_funcs +ffffffff82aea0a0 R sdma_v3_0_ip_block +ffffffff82aea0b8 R sdma_v3_1_ip_block +ffffffff82aea0d0 r sdma_v3_0_ring_funcs +ffffffff82aea1f0 r sdma_v3_0_buffer_funcs +ffffffff82aea210 r sdma_v3_0_vm_pte_funcs +ffffffff82aea230 r sdma_v3_0_trap_irq_funcs +ffffffff82aea240 r sdma_v3_0_illegal_inst_irq_funcs +ffffffff82aea250 r fiji_mgcg_cgcg_init +ffffffff82aea270 r golden_settings_fiji_a10 +ffffffff82aea2d0 r tonga_mgcg_cgcg_init +ffffffff82aea2f0 r golden_settings_tonga_a11 +ffffffff82aea370 r golden_settings_polaris11_a11 +ffffffff82aea3f0 r golden_settings_polaris10_a11 +ffffffff82aea470 r cz_mgcg_cgcg_init +ffffffff82aea490 r cz_golden_settings_a11 +ffffffff82aea520 r stoney_mgcg_cgcg_init +ffffffff82aea530 r stoney_golden_settings_a11 +ffffffff82aeb000 R sdma_v4_0_ip_funcs +ffffffff82aeb0a0 R sdma_v4_0_ras_hw_ops +ffffffff82aeb0e0 R sdma_v4_0_ip_block +ffffffff82aeb0f8 r sdma_v4_0_ring_funcs_2nd_mmhub +ffffffff82aeb218 r sdma_v4_0_ring_funcs +ffffffff82aeb338 r sdma_v4_0_page_ring_funcs_2nd_mmhub +ffffffff82aeb458 r sdma_v4_0_page_ring_funcs +ffffffff82aeb578 r sdma_v4_0_buffer_funcs +ffffffff82aeb598 r sdma_v4_0_vm_pte_funcs +ffffffff82aeb5b8 r sdma_v4_0_trap_irq_funcs +ffffffff82aeb5c8 r sdma_v4_0_illegal_inst_irq_funcs +ffffffff82aeb5d8 r sdma_v4_0_ecc_irq_funcs +ffffffff82aeb5e8 r sdma_v4_0_vm_hole_irq_funcs +ffffffff82aeb5f8 r sdma_v4_0_doorbell_invalid_irq_funcs +ffffffff82aeb608 r sdma_v4_0_pool_timeout_irq_funcs +ffffffff82aeb618 r sdma_v4_0_srbm_write_irq_funcs +ffffffff82aeb630 r golden_settings_sdma_4 +ffffffff82aeb890 r golden_settings_sdma_vg10 +ffffffff82aeb940 r golden_settings_sdma_vg12 +ffffffff82aeb9f0 r golden_settings_sdma0_4_2_init +ffffffff82aeba10 r golden_settings_sdma0_4_2 +ffffffff82aebca0 r golden_settings_sdma1_4_2 +ffffffff82aebf30 r golden_settings_sdma_arct +ffffffff82aec230 r golden_settings_sdma_aldebaran +ffffffff82aec3a0 r golden_settings_sdma_4_1 +ffffffff82aec4b0 r golden_settings_sdma_rv2 +ffffffff82aec4e0 r golden_settings_sdma_rv1 +ffffffff82aec510 r golden_settings_sdma_4_3 +ffffffff82aec600 r sdma_v4_0_ras_fields +ffffffff82aed000 R sdma_v4_4_ras_hw_ops +ffffffff82aed040 r sdma_v4_4_ras_fields +ffffffff82aee000 R sdma_v5_0_ip_funcs +ffffffff82aee0a0 R sdma_v5_0_ip_block +ffffffff82aee0b8 r sdma_v5_0_ring_funcs +ffffffff82aee1d8 r sdma_v5_0_buffer_funcs +ffffffff82aee1f8 r sdma_v5_0_vm_pte_funcs +ffffffff82aee218 r sdma_v5_0_trap_irq_funcs +ffffffff82aee228 r sdma_v5_0_illegal_inst_irq_funcs +ffffffff82aee240 r golden_settings_sdma_5 +ffffffff82aee480 r golden_settings_sdma_nv10 +ffffffff82aee4b0 r golden_settings_sdma_nv14 +ffffffff82aee4e0 r golden_settings_sdma_5_sriov +ffffffff82aee6c0 r golden_settings_sdma_nv12 +ffffffff82aee750 r golden_settings_sdma_cyan_skillfish +ffffffff82aef000 R sdma_v5_2_ip_funcs +ffffffff82aef0a0 R sdma_v5_2_ip_block +ffffffff82aef0b8 r sdma_v5_2_ring_funcs +ffffffff82aef1d8 r sdma_v5_2_buffer_funcs +ffffffff82aef1f8 r sdma_v5_2_vm_pte_funcs +ffffffff82aef218 r sdma_v5_2_trap_irq_funcs +ffffffff82aef228 r sdma_v5_2_illegal_inst_irq_funcs +ffffffff82af0000 R sdma_v6_0_ip_funcs +ffffffff82af00a0 R sdma_v6_0_ip_block +ffffffff82af00b8 r sdma_v6_0_ring_funcs +ffffffff82af01d8 r sdma_v6_0_buffer_funcs +ffffffff82af01f8 r sdma_v6_0_vm_pte_funcs +ffffffff82af0218 r sdma_v6_0_trap_irq_funcs +ffffffff82af0228 r sdma_v6_0_illegal_inst_irq_funcs +ffffffff82af1000 r smu_v11_0_i2c_algo +ffffffff82af1010 r smu_v11_0_i2c_i2c_lock_ops +ffffffff82af1028 r smu_v11_0_i2c_control_quirks +ffffffff82af2000 R smuio_v11_0_funcs +ffffffff82af3000 R smuio_v11_0_6_funcs +ffffffff82af4000 R smuio_v13_0_funcs +ffffffff82af5000 R smuio_v13_0_6_funcs +ffffffff82af6000 R smuio_v9_0_funcs +ffffffff82af7000 r soc15_common_ip_funcs +ffffffff82af70a0 R vega10_common_ip_block +ffffffff82af70b8 r soc15_asic_funcs +ffffffff82af7170 r vega20_asic_funcs +ffffffff82af7230 r soc15_allowed_read_registers +ffffffff82af73c0 r vega_video_codecs_encode +ffffffff82af73d0 r vega_video_codecs_decode +ffffffff82af73e0 r rv_video_codecs_decode +ffffffff82af73f0 r rn_video_codecs_decode +ffffffff82af7400 r vega_video_codecs_encode_array +ffffffff82af7430 r vega_video_codecs_decode_array +ffffffff82af74b0 r rv_video_codecs_decode_array +ffffffff82af7540 r rn_video_codecs_decode_array +ffffffff82af8000 r soc21_common_ip_funcs +ffffffff82af80a0 R soc21_common_ip_block +ffffffff82af80b8 r soc21_asic_funcs +ffffffff82af8170 r soc21_allowed_read_registers +ffffffff82af82f0 r vcn_4_0_0_video_codecs_encode_vcn1 +ffffffff82af8300 r vcn_4_0_0_video_codecs_decode_vcn1 +ffffffff82af8310 r vcn_4_0_0_video_codecs_encode_vcn0 +ffffffff82af8320 r vcn_4_0_0_video_codecs_decode_vcn0 +ffffffff82af8330 r vcn_4_0_0_video_codecs_encode_array_vcn1 +ffffffff82af8360 r vcn_4_0_0_video_codecs_decode_array_vcn1 +ffffffff82af83b0 r vcn_4_0_0_video_codecs_encode_array_vcn0 +ffffffff82af83e0 r vcn_4_0_0_video_codecs_decode_array_vcn0 +ffffffff82af9000 r tonga_ih_ip_funcs +ffffffff82af90a0 R tonga_ih_ip_block +ffffffff82af90b8 r tonga_ih_funcs +ffffffff82afa000 R umc_v6_0_funcs +ffffffff82afb000 R umc_v6_1_channel_idx_tbl +ffffffff82afb080 R umc_v6_1_ras_hw_ops +ffffffff82afc000 R umc_v6_7_channel_idx_tbl_second +ffffffff82afc080 R umc_v6_7_channel_idx_tbl_first +ffffffff82afc100 R umc_v6_7_ras_hw_ops +ffffffff82afd000 R umc_v8_10_channelnum_map_colbit_table +ffffffff82afd040 R umc_v8_10_channel_idx_tbl +ffffffff82afd0a0 R umc_v8_10_ras_hw_ops +ffffffff82afe000 R umc_v8_7_channel_idx_tbl +ffffffff82afe040 R umc_v8_7_ras_hw_ops +ffffffff82aff000 r uvd_v5_0_ip_funcs +ffffffff82aff0a0 R uvd_v5_0_ip_block +ffffffff82aff0b8 r uvd_v5_0_ring_funcs +ffffffff82aff1d8 r uvd_v5_0_irq_funcs +ffffffff82b00000 r uvd_v6_0_ip_funcs +ffffffff82b000a0 R uvd_v6_0_ip_block +ffffffff82b000b8 R uvd_v6_2_ip_block +ffffffff82b000d0 R uvd_v6_3_ip_block +ffffffff82b000e8 r uvd_v6_0_ring_vm_funcs +ffffffff82b00208 r uvd_v6_0_ring_phys_funcs +ffffffff82b00328 r uvd_v6_0_enc_ring_vm_funcs +ffffffff82b00448 r uvd_v6_0_irq_funcs +ffffffff82b01000 R uvd_v7_0_ip_funcs +ffffffff82b010a0 R uvd_v7_0_ip_block +ffffffff82b010b8 r uvd_v7_0_ring_vm_funcs +ffffffff82b011d8 r uvd_v7_0_enc_ring_vm_funcs +ffffffff82b012f8 r uvd_v7_0_irq_funcs +ffffffff82b02000 r vce_v3_0_ip_funcs +ffffffff82b020a0 R vce_v3_0_ip_block +ffffffff82b020b8 R vce_v3_1_ip_block +ffffffff82b020d0 R vce_v3_4_ip_block +ffffffff82b020e8 r vce_v3_0_ring_vm_funcs +ffffffff82b02208 r vce_v3_0_ring_phys_funcs +ffffffff82b02328 r vce_v3_0_irq_funcs +ffffffff82b03000 R vce_v4_0_ip_funcs +ffffffff82b030a0 R vce_v4_0_ip_block +ffffffff82b030b8 r vce_v4_0_ring_vm_funcs +ffffffff82b031d8 r vce_v4_0_irq_funcs +ffffffff82b04000 r vcn_v1_0_ip_funcs +ffffffff82b040a0 R vcn_v1_0_ip_block +ffffffff82b040b8 r vcn_v1_0_dec_ring_vm_funcs +ffffffff82b041d8 r vcn_v1_0_enc_ring_vm_funcs +ffffffff82b042f8 r vcn_v1_0_irq_funcs +ffffffff82b05000 r vcn_v2_0_ip_funcs +ffffffff82b050a0 R vcn_v2_0_ip_block +ffffffff82b050b8 r vcn_v2_0_dec_ring_vm_funcs +ffffffff82b051d8 r vcn_v2_0_enc_ring_vm_funcs +ffffffff82b052f8 r vcn_v2_0_irq_funcs +ffffffff82b06000 r vcn_v2_5_ip_funcs +ffffffff82b060a0 R vcn_v2_5_ip_block +ffffffff82b060b8 r vcn_v2_6_ip_funcs +ffffffff82b06158 R vcn_v2_6_ip_block +ffffffff82b06170 R vcn_v2_6_ras_hw_ops +ffffffff82b061b0 r vcn_v2_5_dec_ring_vm_funcs +ffffffff82b062d0 r vcn_v2_6_dec_ring_vm_funcs +ffffffff82b063f0 r vcn_v2_5_enc_ring_vm_funcs +ffffffff82b06510 r vcn_v2_6_enc_ring_vm_funcs +ffffffff82b06630 r vcn_v2_5_irq_funcs +ffffffff82b07000 r vcn_v3_0_ip_funcs +ffffffff82b070a0 R vcn_v3_0_ip_block +ffffffff82b070b8 r vcn_v3_0_dec_ring_vm_funcs +ffffffff82b071d8 r vcn_v3_0_enc_ring_vm_funcs +ffffffff82b072f8 r vcn_v3_0_irq_funcs +ffffffff82b08000 r vcn_v4_0_ip_funcs +ffffffff82b080a0 R vcn_v4_0_ip_block +ffffffff82b080b8 r vcn_v4_0_unified_ring_vm_funcs +ffffffff82b081d8 r vcn_v4_0_irq_funcs +ffffffff82b09000 R vega10_ih_ip_funcs +ffffffff82b090a0 R vega10_ih_ip_block +ffffffff82b090b8 r vega10_ih_funcs +ffffffff82b090d8 r vega10_ih_self_irq_funcs +ffffffff82b0a000 r GC_BASE +ffffffff82b0a064 r HDP_BASE +ffffffff82b0a0c8 r MMHUB_BASE +ffffffff82b0a12c r ATHUB_BASE +ffffffff82b0a190 r NBIO_BASE +ffffffff82b0a1f4 r MP0_BASE +ffffffff82b0a258 r MP1_BASE +ffffffff82b0a2bc r VCE_BASE +ffffffff82b0a320 r VCN_BASE +ffffffff82b0a384 r DF_BASE +ffffffff82b0a3e8 r DCE_BASE +ffffffff82b0a44c r OSSSYS_BASE +ffffffff82b0a4b0 r SDMA0_BASE +ffffffff82b0a514 r SDMA1_BASE +ffffffff82b0a578 r SMUIO_BASE +ffffffff82b0a5dc r PWR_BASE +ffffffff82b0a640 r NBIF_BASE +ffffffff82b0a6a4 r THM_BASE +ffffffff82b0a708 r CLK_BASE +ffffffff82b0b000 R vega20_ih_ip_funcs +ffffffff82b0b0a0 R vega20_ih_ip_block +ffffffff82b0b0b8 r vega20_ih_funcs +ffffffff82b0b0d8 r vega20_ih_self_irq_funcs +ffffffff82b0c000 r GC_BASE +ffffffff82b0c090 r HDP_BASE +ffffffff82b0c120 r MMHUB_BASE +ffffffff82b0c1b0 r ATHUB_BASE +ffffffff82b0c240 r NBIO_BASE +ffffffff82b0c2d0 r MP0_BASE +ffffffff82b0c360 r MP1_BASE +ffffffff82b0c3f0 r UVD_BASE +ffffffff82b0c480 r VCE_BASE +ffffffff82b0c510 r DF_BASE +ffffffff82b0c5a0 r DCE_BASE +ffffffff82b0c630 r OSSSYS_BASE +ffffffff82b0c6c0 r SDMA0_BASE +ffffffff82b0c750 r SDMA1_BASE +ffffffff82b0c7e0 r SMUIO_BASE +ffffffff82b0c870 r THM_BASE +ffffffff82b0c900 r CLK_BASE +ffffffff82b0c990 r UMC_BASE +ffffffff82b0ca20 r RSMU_BASE +ffffffff82b0d000 r vi_common_ip_block +ffffffff82b0d018 r vi_common_ip_funcs +ffffffff82b0d0b8 r vi_asic_funcs +ffffffff82b0d170 r vi_allowed_read_registers +ffffffff82b0d3d0 r topaz_video_codecs_encode +ffffffff82b0d3e0 r topaz_video_codecs_decode +ffffffff82b0d3f0 r tonga_video_codecs_encode +ffffffff82b0d400 r tonga_video_codecs_decode +ffffffff82b0d410 r polaris_video_codecs_encode +ffffffff82b0d420 r cz_video_codecs_decode +ffffffff82b0d430 r tonga_video_codecs_encode_array +ffffffff82b0d450 r tonga_video_codecs_decode_array +ffffffff82b0d4a0 r polaris_video_codecs_encode_array +ffffffff82b0d4d0 r cz_video_codecs_decode_array +ffffffff82b0d550 r iceland_mgcg_cgcg_init +ffffffff82b0d590 r fiji_mgcg_cgcg_init +ffffffff82b0d5f0 r tonga_mgcg_cgcg_init +ffffffff82b0d650 r cz_mgcg_cgcg_init +ffffffff82b0d690 r stoney_mgcg_cgcg_init +ffffffff82b0e000 r amdgpu_dm_funcs +ffffffff82b0e0a0 R dm_ip_block +ffffffff82b0e0b8 R amdgpu_dm_encoder_helper_funcs +ffffffff82b0e120 r dm_display_funcs +ffffffff82b0e180 r hpd_disconnect_quirk_table +ffffffff82b0eef0 r amdgpu_dm_mode_funcs +ffffffff82b0ef38 r amdgpu_dm_encoder_funcs +ffffffff82b0ef58 r amdgpu_dm_connector_funcs +ffffffff82b0efd0 r amdgpu_dm_connector_helper_funcs +ffffffff82b0f020 r amdgpu_dm_i2c_algo +ffffffff82b0f1f0 r add_fs_modes.common_rates +ffffffff82b0f220 r amdgpu_dm_backlight_ops +ffffffff82b10000 r amdgpu_dm_crtc_funcs +ffffffff82b100c0 r amdgpu_dm_crtc_helper_funcs +ffffffff82b11000 r dm_dtn_log_begin.msg +ffffffff82b1100d r dm_dtn_log_end.msg +ffffffff82b11018 r SYNAPTICS_DEVICE_ID +ffffffff82b12000 r dm_crtc_irq_funcs +ffffffff82b12010 r dm_vline0_irq_funcs +ffffffff82b12020 r dm_dmub_outbox_irq_funcs +ffffffff82b12030 r dm_vupdate_irq_funcs +ffffffff82b12040 r dm_dmub_trace_irq_funcs +ffffffff82b12050 r dm_pageflip_irq_funcs +ffffffff82b12060 r dm_hpd_irq_funcs +ffffffff82b13000 r amdgpu_dm_encoder_funcs +ffffffff82b13020 r dm_mst_cbs +ffffffff82b13030 r dm_dp_mst_connector_funcs +ffffffff82b130a8 r dm_dp_mst_connector_helper_funcs +ffffffff82b14000 r dm_plane_funcs +ffffffff82b14068 r dm_plane_helper_funcs ffffffff82b16000 r vbios_funcs -ffffffff82b1b000 r command_table_helper_funcs +ffffffff82b17000 r vbios_funcs ffffffff82b1c000 r command_table_helper_funcs ffffffff82b1d000 r command_table_helper_funcs ffffffff82b1e000 r command_table_helper_funcs -ffffffff82b1f000 r dce80_max_clks_by_state -ffffffff82b1f028 r disp_clk_regs -ffffffff82b1f07c r disp_clk_shift -ffffffff82b1f088 r disp_clk_mask -ffffffff82b20000 r dce110_max_clks_by_state +ffffffff82b1f000 r command_table_helper_funcs +ffffffff82b20000 r dce80_max_clks_by_state ffffffff82b20028 r disp_clk_regs ffffffff82b2007c r disp_clk_shift ffffffff82b20088 r disp_clk_mask -ffffffff82b21000 r dce112_max_clks_by_state +ffffffff82b21000 r dce110_max_clks_by_state ffffffff82b21028 r disp_clk_regs ffffffff82b2107c r disp_clk_shift ffffffff82b21088 r disp_clk_mask -ffffffff82b22000 r dce120_max_clks_by_state -ffffffff82b23000 r clk_mgr_regs -ffffffff82b23054 r clk_mgr_shift -ffffffff82b23060 r clk_mgr_mask +ffffffff82b22000 r dce112_max_clks_by_state +ffffffff82b22028 r disp_clk_regs +ffffffff82b2207c r disp_clk_shift +ffffffff82b22088 r disp_clk_mask +ffffffff82b23000 r dce120_max_clks_by_state ffffffff82b24000 r clk_mgr_regs ffffffff82b24054 r clk_mgr_shift ffffffff82b24060 r clk_mgr_mask ffffffff82b25000 r clk_mgr_regs ffffffff82b25054 r clk_mgr_shift ffffffff82b25060 r clk_mgr_mask -ffffffff82b26000 r lpddr5_wm_table -ffffffff82b260c0 r ddr5_wm_table +ffffffff82b26000 r clk_mgr_regs +ffffffff82b26054 r clk_mgr_shift +ffffffff82b26060 r clk_mgr_mask ffffffff82b27000 r lpddr5_wm_table ffffffff82b270c0 r ddr5_wm_table ffffffff82b28000 r lpddr5_wm_table ffffffff82b280c0 r ddr5_wm_table ffffffff82b29000 r lpddr5_wm_table -ffffffff82b290c0 r ddr4_wm_table -ffffffff82b2a000 r clk_mgr_regs_dcn321 -ffffffff82b2a054 r clk_mgr_shift_dcn321 -ffffffff82b2a060 r clk_mgr_mask_dcn321 -ffffffff82b2a084 r clk_mgr_regs_dcn32 -ffffffff82b2a0d8 r clk_mgr_shift_dcn32 -ffffffff82b2a0e4 r clk_mgr_mask_dcn32 -ffffffff82b2b000 r DC_BUILD_ID -ffffffff82b2d000 r output_csc_matrix -ffffffff82b2d0e0 r black_color_format -ffffffff82b2e000 r DP_SINK_BRANCH_DEV_NAME_7580 -ffffffff82b2f000 r DP_VGA_DONGLE_BRANCH_DEV_NAME -ffffffff82b2f006 r DP_DVI_CONVERTER_ID_4 -ffffffff82b2f00d r DP_DVI_CONVERTER_ID_5 -ffffffff82b30000 r DP_VGA_LVDS_CONVERTER_ID_2 -ffffffff82b30007 r DP_VGA_LVDS_CONVERTER_ID_3 -ffffffff82b30010 r dp_lt_fallbacks -ffffffff82b31000 r mandatory_dpcd_partitions -ffffffff82b33000 r dce_funcs -ffffffff82b34000 r funcs -ffffffff82b35000 R video_optimized_pixel_rates -ffffffff82b351b0 r dce110_clk_src_funcs -ffffffff82b351d8 r dce112_clk_src_funcs -ffffffff82b35200 r dcn20_clk_src_funcs -ffffffff82b35228 r dcn3_clk_src_funcs -ffffffff82b35250 r dcn31_clk_src_funcs -ffffffff82b36000 r dce_funcs -ffffffff82b36068 r dcn10_funcs -ffffffff82b360d0 r dcn20_funcs -ffffffff82b36138 r dcn21_funcs -ffffffff82b37000 r dce_ipp_funcs -ffffffff82b38000 r dce110_lnk_enc_funcs -ffffffff82b39000 r dce_mi_funcs -ffffffff82b39090 r dce112_mi_funcs -ffffffff82b39120 r dce120_mi_funcs -ffffffff82b391b0 r pte_settings -ffffffff82b3a000 r funcs -ffffffff82b3b000 r dce_link_panel_cntl_funcs -ffffffff82b3c000 r filter_3tap_16p_upscale -ffffffff82b3c040 r filter_3tap_16p_116 -ffffffff82b3c080 r filter_3tap_16p_149 -ffffffff82b3c0c0 r filter_3tap_16p_183 -ffffffff82b3c100 r filter_3tap_64p_upscale -ffffffff82b3c1d0 r filter_3tap_64p_116 -ffffffff82b3c2a0 r filter_3tap_64p_149 -ffffffff82b3c370 r filter_3tap_64p_183 -ffffffff82b3c440 r filter_4tap_16p_upscale -ffffffff82b3c490 r filter_4tap_16p_116 -ffffffff82b3c4e0 r filter_4tap_16p_149 -ffffffff82b3c530 r filter_4tap_16p_183 -ffffffff82b3c580 r filter_4tap_64p_upscale -ffffffff82b3c690 r filter_4tap_64p_116 -ffffffff82b3c7a0 r filter_4tap_64p_149 -ffffffff82b3c8b0 r filter_4tap_64p_183 -ffffffff82b3c9c0 r filter_5tap_64p_upscale -ffffffff82b3cb10 r filter_5tap_64p_116 -ffffffff82b3cc60 r filter_5tap_64p_149 -ffffffff82b3cdb0 r filter_5tap_64p_183 -ffffffff82b3cf00 r filter_6tap_64p_upscale -ffffffff82b3d090 r filter_6tap_64p_116 -ffffffff82b3d220 r filter_6tap_64p_149 -ffffffff82b3d3b0 r filter_6tap_64p_183 -ffffffff82b3d540 r filter_7tap_64p_upscale -ffffffff82b3d710 r filter_7tap_64p_116 -ffffffff82b3d8e0 r filter_7tap_64p_149 -ffffffff82b3dab0 r filter_7tap_64p_183 -ffffffff82b3dc80 r filter_8tap_64p_upscale -ffffffff82b3de90 r filter_8tap_64p_116 -ffffffff82b3e0a0 r filter_8tap_64p_149 -ffffffff82b3e2b0 r filter_8tap_64p_183 -ffffffff82b3e4c0 r filter_2tap_16p -ffffffff82b3e4f0 r filter_2tap_64p -ffffffff82b3f000 r audio_clock_info_table_48bpc -ffffffff82b3f190 r audio_clock_info_table_36bpc -ffffffff82b3f320 r audio_clock_info_table -ffffffff82b3f4e0 r dce110_str_enc_funcs -ffffffff82b40000 r global_color_matrix -ffffffff82b400a8 r dce_transform_funcs -ffffffff82b41000 r abm_funcs -ffffffff82b42000 r psr_funcs -ffffffff82b42040 r DP_SINK_DEVICE_STR_ID_1 -ffffffff82b42045 r DP_SINK_DEVICE_STR_ID_2 -ffffffff82b43000 r reg_offsets -ffffffff82b44000 r bios_regs -ffffffff82b44008 r res_cap -ffffffff82b44050 r clk_src_regs -ffffffff82b4414c r dmcu_regs -ffffffff82b441a8 r dmcu_shift -ffffffff82b441bc r dmcu_mask -ffffffff82b44208 r abm_regs -ffffffff82b44248 r abm_shift -ffffffff82b4425c r abm_mask -ffffffff82b442b0 r dce100_tg_offsets -ffffffff82b442f8 r plane_cap -ffffffff82b44328 r res_create_funcs -ffffffff82b44358 r dce100_res_pool_funcs -ffffffff82b44440 r panel_cntl_regs -ffffffff82b44460 r panel_cntl_shift -ffffffff82b44470 r panel_cntl_mask -ffffffff82b444b0 r link_enc_regs -ffffffff82b44870 r link_enc_aux_regs -ffffffff82b448c0 r link_enc_hpd_regs -ffffffff82b448d8 r link_enc_feature -ffffffff82b448e8 r cs_shift -ffffffff82b448f4 r cs_mask -ffffffff82b44920 r mi_regs -ffffffff82b44c38 r mi_shifts -ffffffff82b44c80 r mi_masks -ffffffff82b44da0 r ipp_regs -ffffffff82b44f98 r ipp_shift -ffffffff82b44fc0 r ipp_mask -ffffffff82b45060 r xfm_regs -ffffffff82b45600 r xfm_shift -ffffffff82b45660 r xfm_mask -ffffffff82b457e0 r opp_regs -ffffffff82b45930 r opp_shift -ffffffff82b4595c r opp_mask -ffffffff82b45a10 r aux_engine_regs -ffffffff82b45b00 r aux_mask -ffffffff82b45b60 r aux_shift -ffffffff82b45b80 r i2c_hw_regs -ffffffff82b45cd0 r i2c_shifts -ffffffff82b45cfc r i2c_masks -ffffffff82b45da0 r audio_regs -ffffffff82b45ed4 r audio_shift -ffffffff82b45eec r audio_mask -ffffffff82b45f30 r stream_enc_regs -ffffffff82b465dc r se_shift -ffffffff82b46660 r se_mask -ffffffff82b46864 r hwseq_reg -ffffffff82b46a80 r hwseq_shift -ffffffff82b46b00 r hwseq_mask -ffffffff82b47000 r reg_offsets -ffffffff82b47018 r dce110_compressor_funcs -ffffffff82b48000 r dce110_funcs -ffffffff82b482c0 r dce110_private_funcs -ffffffff82b49000 r dce110_mem_input_v_funcs -ffffffff82b49090 r dvmm_Hw_Setting_1DTiling -ffffffff82b49120 r dvmm_Hw_Setting_2DTiling -ffffffff82b491b0 r dvmm_Hw_Setting_Linear -ffffffff82b4a000 r global_color_matrix -ffffffff82b4a0b0 r input_csc_matrix -ffffffff82b4b000 r funcs -ffffffff82b4c000 r bios_regs -ffffffff82b4c008 r dce110_res_pool_funcs -ffffffff82b4c0f0 r clk_src_regs -ffffffff82b4c1ec r dmcu_regs -ffffffff82b4c248 r dmcu_shift -ffffffff82b4c25c r dmcu_mask -ffffffff82b4c2a8 r abm_regs -ffffffff82b4c2e8 r abm_shift -ffffffff82b4c2fc r abm_mask -ffffffff82b4c350 r dce110_tg_offsets -ffffffff82b4c398 r res_create_funcs -ffffffff82b4c3c8 r plane_cap -ffffffff82b4c3f4 r underlay_plane_cap -ffffffff82b4c420 r stoney_resource_cap -ffffffff82b4c45c r carrizo_resource_cap -ffffffff82b4c4a0 r panel_cntl_regs -ffffffff82b4c4c0 r panel_cntl_shift -ffffffff82b4c4d0 r panel_cntl_mask -ffffffff82b4c510 r link_enc_regs -ffffffff82b4c8d0 r link_enc_aux_regs -ffffffff82b4c920 r link_enc_hpd_regs -ffffffff82b4c938 r link_enc_feature -ffffffff82b4c948 r cs_shift -ffffffff82b4c954 r cs_mask -ffffffff82b4c980 r mi_regs -ffffffff82b4cb0c r mi_shifts -ffffffff82b4cb54 r mi_masks -ffffffff82b4cc70 r ipp_regs -ffffffff82b4cd6c r ipp_shift -ffffffff82b4cd94 r ipp_mask -ffffffff82b4ce30 r xfm_regs -ffffffff82b4d100 r xfm_shift -ffffffff82b4d160 r xfm_mask -ffffffff82b4d2e0 r opp_regs -ffffffff82b4d430 r opp_shift -ffffffff82b4d45c r opp_mask -ffffffff82b4d510 r aux_engine_regs -ffffffff82b4d600 r aux_mask -ffffffff82b4d660 r aux_shift -ffffffff82b4d680 r i2c_hw_regs -ffffffff82b4d7d0 r i2c_shifts -ffffffff82b4d7fc r i2c_masks -ffffffff82b4d8a0 r audio_regs -ffffffff82b4d9d4 r audio_shift -ffffffff82b4d9ec r audio_mask -ffffffff82b4da30 r stream_enc_regs -ffffffff82b4dd0c r se_shift -ffffffff82b4dd90 r se_mask -ffffffff82b4df94 r hwseq_stoney_reg -ffffffff82b4e1b0 r hwseq_cz_reg -ffffffff82b4e3cc r hwseq_shift -ffffffff82b4e44c r hwseq_mask -ffffffff82b4f000 r dce110_tg_funcs -ffffffff82b50000 r dce110_tg_v_funcs -ffffffff82b51000 r dce110_xfmv_funcs -ffffffff82b52000 r reg_offsets +ffffffff82b290c0 r ddr5_wm_table +ffffffff82b2a000 r lpddr5_wm_table +ffffffff82b2a0c0 r ddr4_wm_table +ffffffff82b2b000 r clk_mgr_regs_dcn321 +ffffffff82b2b054 r clk_mgr_shift_dcn321 +ffffffff82b2b060 r clk_mgr_mask_dcn321 +ffffffff82b2b084 r clk_mgr_regs_dcn32 +ffffffff82b2b0d8 r clk_mgr_shift_dcn32 +ffffffff82b2b0e4 r clk_mgr_mask_dcn32 +ffffffff82b2c000 r DC_BUILD_ID +ffffffff82b2e000 r output_csc_matrix +ffffffff82b2e0e0 r black_color_format +ffffffff82b2f000 r DP_SINK_BRANCH_DEV_NAME_7580 +ffffffff82b30000 r DP_VGA_DONGLE_BRANCH_DEV_NAME +ffffffff82b30006 r DP_DVI_CONVERTER_ID_4 +ffffffff82b3000d r DP_DVI_CONVERTER_ID_5 +ffffffff82b31000 r DP_VGA_LVDS_CONVERTER_ID_2 +ffffffff82b31007 r DP_VGA_LVDS_CONVERTER_ID_3 +ffffffff82b31010 r dp_lt_fallbacks +ffffffff82b32000 r mandatory_dpcd_partitions +ffffffff82b34000 r dce_funcs +ffffffff82b35000 r funcs +ffffffff82b36000 R video_optimized_pixel_rates +ffffffff82b361b0 r dce110_clk_src_funcs +ffffffff82b361d8 r dce112_clk_src_funcs +ffffffff82b36200 r dcn20_clk_src_funcs +ffffffff82b36228 r dcn3_clk_src_funcs +ffffffff82b36250 r dcn31_clk_src_funcs +ffffffff82b37000 r dce_funcs +ffffffff82b37068 r dcn10_funcs +ffffffff82b370d0 r dcn20_funcs +ffffffff82b37138 r dcn21_funcs +ffffffff82b38000 r dce_ipp_funcs +ffffffff82b39000 r dce110_lnk_enc_funcs +ffffffff82b3a000 r dce_mi_funcs +ffffffff82b3a090 r dce112_mi_funcs +ffffffff82b3a120 r dce120_mi_funcs +ffffffff82b3a1b0 r pte_settings +ffffffff82b3b000 r funcs +ffffffff82b3c000 r dce_link_panel_cntl_funcs +ffffffff82b3d000 r filter_3tap_16p_upscale +ffffffff82b3d040 r filter_3tap_16p_116 +ffffffff82b3d080 r filter_3tap_16p_149 +ffffffff82b3d0c0 r filter_3tap_16p_183 +ffffffff82b3d100 r filter_3tap_64p_upscale +ffffffff82b3d1d0 r filter_3tap_64p_116 +ffffffff82b3d2a0 r filter_3tap_64p_149 +ffffffff82b3d370 r filter_3tap_64p_183 +ffffffff82b3d440 r filter_4tap_16p_upscale +ffffffff82b3d490 r filter_4tap_16p_116 +ffffffff82b3d4e0 r filter_4tap_16p_149 +ffffffff82b3d530 r filter_4tap_16p_183 +ffffffff82b3d580 r filter_4tap_64p_upscale +ffffffff82b3d690 r filter_4tap_64p_116 +ffffffff82b3d7a0 r filter_4tap_64p_149 +ffffffff82b3d8b0 r filter_4tap_64p_183 +ffffffff82b3d9c0 r filter_5tap_64p_upscale +ffffffff82b3db10 r filter_5tap_64p_116 +ffffffff82b3dc60 r filter_5tap_64p_149 +ffffffff82b3ddb0 r filter_5tap_64p_183 +ffffffff82b3df00 r filter_6tap_64p_upscale +ffffffff82b3e090 r filter_6tap_64p_116 +ffffffff82b3e220 r filter_6tap_64p_149 +ffffffff82b3e3b0 r filter_6tap_64p_183 +ffffffff82b3e540 r filter_7tap_64p_upscale +ffffffff82b3e710 r filter_7tap_64p_116 +ffffffff82b3e8e0 r filter_7tap_64p_149 +ffffffff82b3eab0 r filter_7tap_64p_183 +ffffffff82b3ec80 r filter_8tap_64p_upscale +ffffffff82b3ee90 r filter_8tap_64p_116 +ffffffff82b3f0a0 r filter_8tap_64p_149 +ffffffff82b3f2b0 r filter_8tap_64p_183 +ffffffff82b3f4c0 r filter_2tap_16p +ffffffff82b3f4f0 r filter_2tap_64p +ffffffff82b40000 r audio_clock_info_table_48bpc +ffffffff82b40190 r audio_clock_info_table_36bpc +ffffffff82b40320 r audio_clock_info_table +ffffffff82b404e0 r dce110_str_enc_funcs +ffffffff82b41000 r global_color_matrix +ffffffff82b410a8 r dce_transform_funcs +ffffffff82b42000 r abm_funcs +ffffffff82b43000 r psr_funcs +ffffffff82b43040 r DP_SINK_DEVICE_STR_ID_1 +ffffffff82b43045 r DP_SINK_DEVICE_STR_ID_2 +ffffffff82b44000 r reg_offsets +ffffffff82b45000 r bios_regs +ffffffff82b45008 r res_cap +ffffffff82b45050 r clk_src_regs +ffffffff82b4514c r dmcu_regs +ffffffff82b451a8 r dmcu_shift +ffffffff82b451bc r dmcu_mask +ffffffff82b45208 r abm_regs +ffffffff82b45248 r abm_shift +ffffffff82b4525c r abm_mask +ffffffff82b452b0 r dce100_tg_offsets +ffffffff82b452f8 r plane_cap +ffffffff82b45328 r res_create_funcs +ffffffff82b45358 r dce100_res_pool_funcs +ffffffff82b45440 r panel_cntl_regs +ffffffff82b45460 r panel_cntl_shift +ffffffff82b45470 r panel_cntl_mask +ffffffff82b454b0 r link_enc_regs +ffffffff82b45870 r link_enc_aux_regs +ffffffff82b458c0 r link_enc_hpd_regs +ffffffff82b458d8 r link_enc_feature +ffffffff82b458e8 r cs_shift +ffffffff82b458f4 r cs_mask +ffffffff82b45920 r mi_regs +ffffffff82b45c38 r mi_shifts +ffffffff82b45c80 r mi_masks +ffffffff82b45da0 r ipp_regs +ffffffff82b45f98 r ipp_shift +ffffffff82b45fc0 r ipp_mask +ffffffff82b46060 r xfm_regs +ffffffff82b46600 r xfm_shift +ffffffff82b46660 r xfm_mask +ffffffff82b467e0 r opp_regs +ffffffff82b46930 r opp_shift +ffffffff82b4695c r opp_mask +ffffffff82b46a10 r aux_engine_regs +ffffffff82b46b00 r aux_mask +ffffffff82b46b60 r aux_shift +ffffffff82b46b80 r i2c_hw_regs +ffffffff82b46cd0 r i2c_shifts +ffffffff82b46cfc r i2c_masks +ffffffff82b46da0 r audio_regs +ffffffff82b46ed4 r audio_shift +ffffffff82b46eec r audio_mask +ffffffff82b46f30 r stream_enc_regs +ffffffff82b475dc r se_shift +ffffffff82b47660 r se_mask +ffffffff82b47864 r hwseq_reg +ffffffff82b47a80 r hwseq_shift +ffffffff82b47b00 r hwseq_mask +ffffffff82b48000 r reg_offsets +ffffffff82b48018 r dce110_compressor_funcs +ffffffff82b49000 r dce110_funcs +ffffffff82b492c0 r dce110_private_funcs +ffffffff82b4a000 r dce110_mem_input_v_funcs +ffffffff82b4a090 r dvmm_Hw_Setting_1DTiling +ffffffff82b4a120 r dvmm_Hw_Setting_2DTiling +ffffffff82b4a1b0 r dvmm_Hw_Setting_Linear +ffffffff82b4b000 r global_color_matrix +ffffffff82b4b0b0 r input_csc_matrix +ffffffff82b4c000 r funcs +ffffffff82b4d000 r bios_regs +ffffffff82b4d008 r dce110_res_pool_funcs +ffffffff82b4d0f0 r clk_src_regs +ffffffff82b4d1ec r dmcu_regs +ffffffff82b4d248 r dmcu_shift +ffffffff82b4d25c r dmcu_mask +ffffffff82b4d2a8 r abm_regs +ffffffff82b4d2e8 r abm_shift +ffffffff82b4d2fc r abm_mask +ffffffff82b4d350 r dce110_tg_offsets +ffffffff82b4d398 r res_create_funcs +ffffffff82b4d3c8 r plane_cap +ffffffff82b4d3f4 r underlay_plane_cap +ffffffff82b4d420 r stoney_resource_cap +ffffffff82b4d45c r carrizo_resource_cap +ffffffff82b4d4a0 r panel_cntl_regs +ffffffff82b4d4c0 r panel_cntl_shift +ffffffff82b4d4d0 r panel_cntl_mask +ffffffff82b4d510 r link_enc_regs +ffffffff82b4d8d0 r link_enc_aux_regs +ffffffff82b4d920 r link_enc_hpd_regs +ffffffff82b4d938 r link_enc_feature +ffffffff82b4d948 r cs_shift +ffffffff82b4d954 r cs_mask +ffffffff82b4d980 r mi_regs +ffffffff82b4db0c r mi_shifts +ffffffff82b4db54 r mi_masks +ffffffff82b4dc70 r ipp_regs +ffffffff82b4dd6c r ipp_shift +ffffffff82b4dd94 r ipp_mask +ffffffff82b4de30 r xfm_regs +ffffffff82b4e100 r xfm_shift +ffffffff82b4e160 r xfm_mask +ffffffff82b4e2e0 r opp_regs +ffffffff82b4e430 r opp_shift +ffffffff82b4e45c r opp_mask +ffffffff82b4e510 r aux_engine_regs +ffffffff82b4e600 r aux_mask +ffffffff82b4e660 r aux_shift +ffffffff82b4e680 r i2c_hw_regs +ffffffff82b4e7d0 r i2c_shifts +ffffffff82b4e7fc r i2c_masks +ffffffff82b4e8a0 r audio_regs +ffffffff82b4e9d4 r audio_shift +ffffffff82b4e9ec r audio_mask +ffffffff82b4ea30 r stream_enc_regs +ffffffff82b4ed0c r se_shift +ffffffff82b4ed90 r se_mask +ffffffff82b4ef94 r hwseq_stoney_reg +ffffffff82b4f1b0 r hwseq_cz_reg +ffffffff82b4f3cc r hwseq_shift +ffffffff82b4f44c r hwseq_mask +ffffffff82b50000 r dce110_tg_funcs +ffffffff82b51000 r dce110_tg_v_funcs +ffffffff82b52000 r dce110_xfmv_funcs ffffffff82b53000 r reg_offsets -ffffffff82b54000 r bios_regs -ffffffff82b54010 r clk_src_regs -ffffffff82b54208 r dmcu_regs -ffffffff82b54264 r dmcu_shift -ffffffff82b54278 r dmcu_mask -ffffffff82b542c4 r abm_regs -ffffffff82b54304 r abm_shift -ffffffff82b54318 r abm_mask -ffffffff82b54360 r dce112_tg_offsets -ffffffff82b543a8 r res_create_funcs -ffffffff82b543d8 r plane_cap -ffffffff82b54404 r polaris_11_resource_cap -ffffffff82b54440 r polaris_10_resource_cap -ffffffff82b54480 r dce112_res_pool_funcs -ffffffff82b54560 r panel_cntl_regs -ffffffff82b54580 r panel_cntl_shift -ffffffff82b54590 r panel_cntl_mask -ffffffff82b545d0 r link_enc_regs -ffffffff82b54990 r link_enc_aux_regs -ffffffff82b549e0 r link_enc_hpd_regs -ffffffff82b549f8 r link_enc_feature -ffffffff82b54a08 r cs_shift -ffffffff82b54a14 r cs_mask -ffffffff82b54a40 r mi_regs -ffffffff82b54d58 r mi_shifts -ffffffff82b54da0 r mi_masks -ffffffff82b54ec0 r ipp_regs -ffffffff82b550b8 r ipp_shift -ffffffff82b550e0 r ipp_mask -ffffffff82b55180 r xfm_regs -ffffffff82b55720 r xfm_shift -ffffffff82b55780 r xfm_mask -ffffffff82b55900 r opp_regs -ffffffff82b55a50 r opp_shift -ffffffff82b55a7c r opp_mask -ffffffff82b55b30 r aux_engine_regs -ffffffff82b55c20 r aux_mask -ffffffff82b55c80 r aux_shift -ffffffff82b55ca0 r i2c_hw_regs -ffffffff82b55df0 r i2c_shifts -ffffffff82b55e1c r i2c_masks -ffffffff82b55ec0 r audio_regs -ffffffff82b55fc8 r audio_shift -ffffffff82b55fe0 r audio_mask -ffffffff82b56020 r stream_enc_regs -ffffffff82b565d8 r se_shift -ffffffff82b5665c r se_mask -ffffffff82b56860 r hwseq_reg -ffffffff82b56a7c r hwseq_shift -ffffffff82b56afc r hwseq_mask -ffffffff82b57000 r bios_regs -ffffffff82b57008 r res_cap -ffffffff82b57048 r dce120_res_pool_funcs -ffffffff82b57128 r debug_defaults -ffffffff82b572a0 r clk_src_regs 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debug_defaults_drv -ffffffff82c1dbc8 r cs_shift -ffffffff82c1dbd4 r cs_mask -ffffffff82c1dbfc r hubbub_shift -ffffffff82c1dc84 r hubbub_mask -ffffffff82c1dea0 r vmid_shifts -ffffffff82c1dea8 r vmid_masks -ffffffff82c1dec8 r hubp_shift -ffffffff82c1dfc4 r hubp_mask -ffffffff82c1e3b4 r tf_shift -ffffffff82c1e684 r tf_mask -ffffffff82c1f1c4 r opp_shift -ffffffff82c1f1fc r opp_mask -ffffffff82c1f2d0 r optc_shift -ffffffff82c1f390 r optc_mask -ffffffff82c1f690 r mpc_shift -ffffffff82c1f76c r mpc_mask -ffffffff82c1fad8 r dsc_shift -ffffffff82c1fb90 r dsc_mask -ffffffff82c1fe68 r dwbc30_shift -ffffffff82c1ff9c r dwbc30_mask -ffffffff82c20464 r mcif_wb30_shift -ffffffff82c20510 r mcif_wb30_mask -ffffffff82c207bc r aux_mask -ffffffff82c2081c r aux_shift -ffffffff82c20834 r i2c_shifts -ffffffff82c20860 r i2c_masks -ffffffff82c20904 r audio_shift -ffffffff82c2091c r audio_mask -ffffffff82c20958 r se_shift -ffffffff82c20a34 r se_mask -ffffffff82c20da0 r vpg_shift -ffffffff82c20dc8 r vpg_mask -ffffffff82c20e5c r afmt_shift -ffffffff82c20e70 r afmt_mask -ffffffff82c20eb4 r hpo_dp_se_shift -ffffffff82c20edc r hpo_dp_se_mask -ffffffff82c20f7c r apg_shift -ffffffff82c20f84 r apg_mask -ffffffff82c20f9c r hpo_dp_le_shift -ffffffff82c20fb8 r hpo_dp_le_mask -ffffffff82c2101c r hwseq_shift -ffffffff82c2109c r hwseq_mask -ffffffff82c23000 R dcn10_soc_defaults -ffffffff82c2308c R dcn10_ip_defaults -ffffffff82c2e000 R dml20_funcs -ffffffff82c2e030 R dml20v2_funcs -ffffffff82c2e060 R dml21_funcs -ffffffff82c2e090 R dml30_funcs -ffffffff82c2e0c0 R dml31_funcs -ffffffff82c2e0f0 R dml314_funcs -ffffffff82c2e120 R dml32_funcs -ffffffff82c31000 R qp_table_422_10bpc_min -ffffffff82c31740 R qp_table_444_8bpc_max -ffffffff82c32080 R qp_table_420_12bpc_max -ffffffff82c327c0 R qp_table_444_10bpc_min -ffffffff82c33400 R qp_table_420_8bpc_max -ffffffff82c33840 R qp_table_444_8bpc_min -ffffffff82c34180 R qp_table_444_12bpc_min -ffffffff82c350c0 R qp_table_420_12bpc_min -ffffffff82c35800 R qp_table_422_12bpc_min -ffffffff82c36140 R qp_table_422_12bpc_max -ffffffff82c36a80 R qp_table_444_12bpc_max -ffffffff82c379c0 R qp_table_420_8bpc_min -ffffffff82c37e00 R qp_table_422_8bpc_min -ffffffff82c38340 R qp_table_422_10bpc_max -ffffffff82c38a80 R qp_table_420_10bpc_max -ffffffff82c39040 R qp_table_420_10bpc_min -ffffffff82c39600 R qp_table_444_10bpc_max -ffffffff82c3a240 R qp_table_422_8bpc_max -ffffffff82c3c000 r funcs -ffffffff82c3c050 r hpd_regs -ffffffff82c3c1a0 r hpd_shift -ffffffff82c3c1b0 r hpd_mask -ffffffff82c3c1c0 r ddc_data_regs -ffffffff82c3c3a0 r ddc_clk_regs -ffffffff82c3c580 r ddc_shift -ffffffff82c3c5a8 r ddc_mask +ffffffff82b54000 r reg_offsets +ffffffff82b55000 r bios_regs +ffffffff82b55010 r clk_src_regs +ffffffff82b55208 r dmcu_regs +ffffffff82b55264 r dmcu_shift +ffffffff82b55278 r dmcu_mask +ffffffff82b552c4 r abm_regs +ffffffff82b55304 r abm_shift +ffffffff82b55318 r abm_mask +ffffffff82b55360 r dce112_tg_offsets +ffffffff82b553a8 r res_create_funcs +ffffffff82b553d8 r plane_cap +ffffffff82b55404 r polaris_11_resource_cap +ffffffff82b55440 r polaris_10_resource_cap +ffffffff82b55480 r dce112_res_pool_funcs +ffffffff82b55560 r panel_cntl_regs +ffffffff82b55580 r panel_cntl_shift +ffffffff82b55590 r panel_cntl_mask +ffffffff82b555d0 r link_enc_regs +ffffffff82b55990 r link_enc_aux_regs +ffffffff82b559e0 r link_enc_hpd_regs +ffffffff82b559f8 r link_enc_feature +ffffffff82b55a08 r cs_shift +ffffffff82b55a14 r cs_mask +ffffffff82b55a40 r mi_regs +ffffffff82b55d58 r mi_shifts +ffffffff82b55da0 r mi_masks +ffffffff82b55ec0 r ipp_regs +ffffffff82b560b8 r ipp_shift +ffffffff82b560e0 r ipp_mask +ffffffff82b56180 r xfm_regs +ffffffff82b56720 r xfm_shift +ffffffff82b56780 r xfm_mask +ffffffff82b56900 r opp_regs +ffffffff82b56a50 r opp_shift +ffffffff82b56a7c r opp_mask +ffffffff82b56b30 r aux_engine_regs +ffffffff82b56c20 r aux_mask +ffffffff82b56c80 r aux_shift +ffffffff82b56ca0 r i2c_hw_regs +ffffffff82b56df0 r i2c_shifts +ffffffff82b56e1c r i2c_masks +ffffffff82b56ec0 r audio_regs +ffffffff82b56fc8 r audio_shift +ffffffff82b56fe0 r audio_mask +ffffffff82b57020 r stream_enc_regs +ffffffff82b575d8 r se_shift +ffffffff82b5765c r se_mask +ffffffff82b57860 r hwseq_reg +ffffffff82b57a7c r hwseq_shift +ffffffff82b57afc r hwseq_mask +ffffffff82b58000 r bios_regs +ffffffff82b58008 r res_cap +ffffffff82b58048 r dce120_res_pool_funcs +ffffffff82b58128 r debug_defaults +ffffffff82b582a0 r clk_src_regs +ffffffff82b58498 r dmcu_regs +ffffffff82b584f4 r dmcu_shift +ffffffff82b58508 r dmcu_mask +ffffffff82b58554 r abm_regs +ffffffff82b58594 r abm_shift +ffffffff82b585a8 r abm_mask +ffffffff82b585f0 r dce120_tg_offsets +ffffffff82b58638 r dce121_res_create_funcs +ffffffff82b58668 r res_create_funcs +ffffffff82b58698 r plane_cap +ffffffff82b586d0 r panel_cntl_regs +ffffffff82b586f0 r panel_cntl_shift +ffffffff82b58700 r panel_cntl_mask +ffffffff82b58740 r link_enc_regs +ffffffff82b58b00 r link_enc_aux_regs +ffffffff82b58b50 r link_enc_hpd_regs +ffffffff82b58b68 r link_enc_feature +ffffffff82b58b78 r cs_shift +ffffffff82b58b84 r cs_mask +ffffffff82b58bb0 r mi_regs +ffffffff82b58ec8 r mi_shifts +ffffffff82b58f10 r mi_masks +ffffffff82b59030 r ipp_regs +ffffffff82b59228 r ipp_shift +ffffffff82b59250 r ipp_mask +ffffffff82b592f0 r xfm_regs +ffffffff82b59890 r xfm_shift +ffffffff82b598f0 r xfm_mask +ffffffff82b59a70 r opp_regs +ffffffff82b59bc0 r opp_shift +ffffffff82b59bec r opp_mask +ffffffff82b59ca0 r aux_engine_regs +ffffffff82b59d90 r aux_mask +ffffffff82b59df0 r aux_shift +ffffffff82b59e10 r i2c_hw_regs +ffffffff82b59f60 r i2c_shifts +ffffffff82b59f8c r i2c_masks +ffffffff82b5a030 r audio_regs +ffffffff82b5a164 r audio_shift +ffffffff82b5a17c r audio_mask +ffffffff82b5a1c0 r stream_enc_regs +ffffffff82b5a778 r se_shift +ffffffff82b5a7fc r se_mask +ffffffff82b5aa00 r dce121_hwseq_reg +ffffffff82b5ac1c r dce121_hwseq_shift +ffffffff82b5ac9c r dce121_hwseq_mask +ffffffff82b5ae90 r hwseq_reg +ffffffff82b5b0ac r hwseq_shift +ffffffff82b5b12c r hwseq_mask +ffffffff82b5c000 r dce120_tg_funcs +ffffffff82b5d000 r bios_regs +ffffffff82b5d008 r res_cap +ffffffff82b5d048 r dce80_res_pool_funcs +ffffffff82b5d130 r clk_src_regs +ffffffff82b5d22c r dmcu_regs +ffffffff82b5d288 r dmcu_shift +ffffffff82b5d29c r dmcu_mask +ffffffff82b5d2e8 r abm_regs +ffffffff82b5d328 r abm_shift +ffffffff82b5d33c r abm_mask +ffffffff82b5d390 r dce80_tg_offsets +ffffffff82b5d3d8 r plane_cap +ffffffff82b5d408 r res_create_funcs +ffffffff82b5d440 r panel_cntl_regs +ffffffff82b5d460 r panel_cntl_shift +ffffffff82b5d470 r panel_cntl_mask +ffffffff82b5d4b0 r link_enc_regs +ffffffff82b5d870 r link_enc_aux_regs +ffffffff82b5d8c0 r link_enc_hpd_regs +ffffffff82b5d8d8 r link_enc_feature +ffffffff82b5d8e8 r cs_shift +ffffffff82b5d8f4 r cs_mask +ffffffff82b5d920 r mi_regs +ffffffff82b5dc38 r mi_shifts +ffffffff82b5dc80 r mi_masks +ffffffff82b5dda0 r ipp_regs +ffffffff82b5df98 r ipp_shift +ffffffff82b5dfc0 r ipp_mask +ffffffff82b5e060 r xfm_regs +ffffffff82b5e600 r xfm_shift +ffffffff82b5e660 r xfm_mask +ffffffff82b5e7e0 r opp_regs +ffffffff82b5e930 r opp_shift +ffffffff82b5e95c r opp_mask +ffffffff82b5ea10 r aux_engine_regs +ffffffff82b5eb00 r aux_mask +ffffffff82b5eb60 r aux_shift +ffffffff82b5eb80 r i2c_hw_regs +ffffffff82b5ecd0 r i2c_shifts +ffffffff82b5ecfc r i2c_masks +ffffffff82b5eda0 r audio_regs +ffffffff82b5eed4 r audio_shift +ffffffff82b5eeec r audio_mask +ffffffff82b5ef30 r stream_enc_regs +ffffffff82b5f5dc r se_shift +ffffffff82b5f660 r se_mask +ffffffff82b5f864 r hwseq_reg +ffffffff82b5fa80 r hwseq_shift +ffffffff82b5fb00 r hwseq_mask +ffffffff82b5fcf4 r res_cap_81 +ffffffff82b5fd30 r res_cap_83 +ffffffff82b60000 r reg_offsets +ffffffff82b60048 r dce80_tg_funcs +ffffffff82b61000 r dcn10_dpp_funcs +ffffffff82b62000 r dpp_input_csc_matrix +ffffffff82b64000 r hubbub1_funcs +ffffffff82b65000 r dcn10_hubp_funcs +ffffffff82b66000 r reduceSizeAndFraction.prime_numbers +ffffffff82b68000 r dcn10_funcs +ffffffff82b682c0 r dcn10_private_funcs +ffffffff82b69000 r dcn10_ipp_funcs +ffffffff82b69048 r dcn20_ipp_funcs +ffffffff82b6a000 r dcn10_lnk_enc_funcs +ffffffff82b6b000 r dcn10_mpc_funcs +ffffffff82b6c000 r dcn10_opp_funcs +ffffffff82b6d000 r dcn10_tg_funcs +ffffffff82b6e000 r bios_regs +ffffffff82b6e008 r rv2_res_cap +ffffffff82b6e044 r res_cap +ffffffff82b6e080 r debug_defaults_drv +ffffffff82b6e1f8 r debug_defaults_diags +ffffffff82b6e370 r clk_src_regs +ffffffff82b6e4c0 r dmcu_regs +ffffffff82b6e51c r dmcu_shift +ffffffff82b6e530 r dmcu_mask +ffffffff82b6e57c r abm_regs +ffffffff82b6e5bc r abm_shift +ffffffff82b6e5d0 r abm_mask +ffffffff82b6e618 r res_create_funcs +ffffffff82b6e648 r res_create_maximus_funcs +ffffffff82b6e678 r plane_cap +ffffffff82b6e6a8 r dcn10_res_pool_funcs +ffffffff82b6e790 r panel_cntl_regs +ffffffff82b6e7b0 r panel_cntl_shift +ffffffff82b6e7c0 r panel_cntl_mask +ffffffff82b6e800 r link_enc_regs +ffffffff82b6ed10 r link_enc_aux_regs +ffffffff82b6ed50 r link_enc_hpd_regs +ffffffff82b6ed60 r le_shift +ffffffff82b6ee50 r le_mask +ffffffff82b6f208 r link_enc_feature +ffffffff82b6f218 r cs_shift +ffffffff82b6f224 r cs_mask +ffffffff82b6f250 r hubp_regs +ffffffff82b6f900 r hubp_shift +ffffffff82b6f9c4 r hubp_mask +ffffffff82b6fcd0 r ipp_regs +ffffffff82b6fdb0 r ipp_shift +ffffffff82b6fdcc r ipp_mask +ffffffff82b6fe40 r tf_regs +ffffffff82b70da0 r tf_shift +ffffffff82b71008 r tf_mask +ffffffff82b719a0 r opp_regs +ffffffff82b71a70 r opp_shift +ffffffff82b71a90 r opp_mask +ffffffff82b71b10 r tg_regs +ffffffff82b72010 r tg_shift +ffffffff82b720d0 r tg_mask +ffffffff82b723d0 r aux_engine_regs +ffffffff82b724c0 r aux_mask +ffffffff82b72520 r aux_shift +ffffffff82b72540 r i2c_hw_regs +ffffffff82b72690 r i2c_shifts +ffffffff82b726bc r i2c_masks +ffffffff82b72760 r mpc_regs +ffffffff82b72880 r mpc_shift +ffffffff82b72898 r mpc_mask +ffffffff82b728f4 r hubbub_reg +ffffffff82b72a68 r hubbub_shift +ffffffff82b72af0 r hubbub_mask +ffffffff82b72d10 r audio_regs +ffffffff82b72dc0 r audio_shift +ffffffff82b72dd8 r audio_mask +ffffffff82b72e20 r stream_enc_regs +ffffffff82b73370 r se_shift +ffffffff82b7344c r se_mask +ffffffff82b737b8 r hwseq_reg +ffffffff82b739d4 r hwseq_shift +ffffffff82b73a54 r hwseq_mask +ffffffff82b74000 r audio_clock_info_table_48bpc +ffffffff82b74190 r audio_clock_info_table_36bpc +ffffffff82b74320 r audio_clock_info_table +ffffffff82b744e0 r dcn10_str_enc_funcs +ffffffff82b75000 r dccg2_funcs +ffffffff82b77000 r dpp_input_csc_matrix +ffffffff82b78000 R dcn20_dsc_funcs +ffffffff82b79000 R dcn20_dwbc_funcs +ffffffff82b7a000 r filter_12tap_16p_upscale +ffffffff82b7a0e0 r filter_12tap_16p_117 +ffffffff82b7a1c0 r filter_12tap_16p_150 +ffffffff82b7a2a0 r filter_12tap_16p_183 +ffffffff82b7a380 r filter_11tap_16p_upscale +ffffffff82b7a450 r filter_11tap_16p_117 +ffffffff82b7a520 r filter_11tap_16p_150 +ffffffff82b7a5f0 r filter_11tap_16p_183 +ffffffff82b7a6c0 r filter_10tap_16p_upscale +ffffffff82b7a780 r filter_10tap_16p_117 +ffffffff82b7a840 r filter_10tap_16p_150 +ffffffff82b7a900 r filter_10tap_16p_183 +ffffffff82b7a9c0 r filter_9tap_16p_upscale +ffffffff82b7aa70 r filter_9tap_16p_117 +ffffffff82b7ab20 r filter_9tap_16p_150 +ffffffff82b7abd0 r filter_9tap_16p_183 +ffffffff82b7ac80 r filter_8tap_16p_upscale +ffffffff82b7ad10 r filter_8tap_16p_117 +ffffffff82b7ada0 r filter_8tap_16p_150 +ffffffff82b7ae30 r filter_8tap_16p_183 +ffffffff82b7aec0 r filter_7tap_16p_upscale +ffffffff82b7af40 r filter_7tap_16p_117 +ffffffff82b7afc0 r filter_7tap_16p_150 +ffffffff82b7b040 r filter_7tap_16p_183 +ffffffff82b7b0c0 r filter_6tap_16p_upscale +ffffffff82b7b130 r filter_6tap_16p_117 +ffffffff82b7b1a0 r filter_6tap_16p_150 +ffffffff82b7b210 r filter_6tap_16p_183 +ffffffff82b7b280 r filter_5tap_16p_upscale +ffffffff82b7b2e0 r filter_5tap_16p_117 +ffffffff82b7b340 r filter_5tap_16p_150 +ffffffff82b7b3a0 r filter_5tap_16p_183 +ffffffff82b7b400 r filter_4tap_16p_upscale +ffffffff82b7b450 r filter_4tap_16p_117 +ffffffff82b7b4a0 r filter_4tap_16p_150 +ffffffff82b7b4f0 r filter_4tap_16p_183 +ffffffff82b7b540 r filter_3tap_16p_upscale +ffffffff82b7b580 r filter_3tap_16p_117 +ffffffff82b7b5c0 r filter_3tap_16p_150 +ffffffff82b7b600 r filter_3tap_16p_183 +ffffffff82b7c000 r hubbub2_funcs +ffffffff82b7d000 r dcn20_funcs +ffffffff82b7d2c0 r dcn20_private_funcs +ffffffff82b7e000 r dcn2_mpll_cfg +ffffffff82b7e190 r dcn20_link_enc_funcs +ffffffff82b7f000 R dcn20_mmhubbub_funcs +ffffffff82b80000 R dcn20_mpc_funcs +ffffffff82b81000 r tf_regs +ffffffff82b82920 r tf_shift +ffffffff82b82ba4 r tf_mask +ffffffff82b835c0 r ipp_regs +ffffffff82b83710 r ipp_shift +ffffffff82b8372c r ipp_mask +ffffffff82b837a0 r opp_regs +ffffffff82b839b0 r opp_shift +ffffffff82b839e8 r opp_mask +ffffffff82b83ac0 r aux_engine_regs +ffffffff82b83bb0 r aux_mask +ffffffff82b83c10 r aux_shift +ffffffff82b83c30 r i2c_hw_regs +ffffffff82b83d80 r i2c_shifts +ffffffff82b83dac r i2c_masks +ffffffff82b83e50 r mpc_regs +ffffffff82b84398 r mpc_shift +ffffffff82b843e0 r mpc_mask +ffffffff82b844f4 r hubbub_reg +ffffffff82b84668 r hubbub_shift +ffffffff82b846f0 r hubbub_mask +ffffffff82b8490c r res_cap_nv10 +ffffffff82b84950 r vmid_regs +ffffffff82b84b10 r vmid_shifts +ffffffff82b84b18 r vmid_masks +ffffffff82b84b40 r tg_regs +ffffffff82b852c0 r tg_shift +ffffffff82b85380 r tg_mask +ffffffff82b85680 r link_enc_regs +ffffffff82b85e20 r link_enc_aux_regs +ffffffff82b85e80 r link_enc_hpd_regs +ffffffff82b85e98 r le_shift +ffffffff82b85f88 r le_mask +ffffffff82b86340 r stream_enc_regs +ffffffff82b86b38 r se_shift +ffffffff82b86c14 r se_mask +ffffffff82b86f80 r hwseq_reg +ffffffff82b8719c r hwseq_shift +ffffffff82b8721c r hwseq_mask +ffffffff82b87410 r dsc_regs +ffffffff82b878a8 r dsc_shift +ffffffff82b87960 r dsc_mask +ffffffff82b87c40 r hubp_regs +ffffffff82b88888 r hubp_shift +ffffffff82b88984 r hubp_mask +ffffffff82b88d80 r dwbc20_regs +ffffffff82b88e38 r dwbc20_shift +ffffffff82b88eb8 r dwbc20_mask +ffffffff82b890b0 r mcif_wb20_regs +ffffffff82b89190 r mcif_wb20_shift +ffffffff82b89230 r mcif_wb20_mask +ffffffff82b894b0 r link_enc_feature +ffffffff82b894c0 r bios_regs +ffffffff82b894c8 r dcn20_res_pool_funcs +ffffffff82b895a8 r res_cap_nv14 +ffffffff82b895e8 r debug_defaults_drv +ffffffff82b89760 r debug_defaults_diags +ffffffff82b898e0 r clk_src_regs +ffffffff82b89ad8 r dccg_regs +ffffffff82b89bc4 r dccg_shift +ffffffff82b89c5c r dccg_mask +ffffffff82b89eb8 r dmcu_regs +ffffffff82b89f14 r dmcu_shift +ffffffff82b89f28 r dmcu_mask +ffffffff82b89f74 r abm_regs +ffffffff82b89fb4 r abm_shift +ffffffff82b89fc8 r abm_mask +ffffffff82b8a010 r res_create_funcs +ffffffff82b8a040 r res_create_maximus_funcs +ffffffff82b8a070 r plane_cap +ffffffff82b8a0a0 r panel_cntl_regs +ffffffff82b8a0c0 r panel_cntl_shift +ffffffff82b8a0d0 r panel_cntl_mask +ffffffff82b8a10c r cs_shift +ffffffff82b8a118 r cs_mask +ffffffff82b8a140 r audio_regs +ffffffff82b8a274 r audio_shift +ffffffff82b8a28c r audio_mask +ffffffff82b8b000 r dcn20_str_enc_funcs +ffffffff82b8c000 r dccg201_funcs +ffffffff82b8d000 r hubbub201_funcs +ffffffff82b8e000 r dcn201_funcs +ffffffff82b8e2c0 r dcn201_private_funcs +ffffffff82b8f000 r dcn201_link_enc_funcs +ffffffff82b90000 R dcn201_mpc_funcs +ffffffff82b91000 r bios_regs +ffffffff82b91008 r res_cap_dnc201 +ffffffff82b91048 r debug_defaults_drv +ffffffff82b911c0 r clk_src_regs +ffffffff82b91268 r dccg_regs +ffffffff82b91354 r dccg_shift +ffffffff82b913ec r dccg_mask +ffffffff82b91648 r res_create_funcs +ffffffff82b91678 r res_create_maximus_funcs +ffffffff82b916a8 r plane_cap +ffffffff82b916e0 r link_enc_regs +ffffffff82b91970 r link_enc_aux_regs +ffffffff82b91990 r link_enc_hpd_regs +ffffffff82b91998 r le_shift +ffffffff82b91a88 r le_mask +ffffffff82b91e40 r link_enc_feature +ffffffff82b91e50 r cs_shift +ffffffff82b91e5c r cs_mask +ffffffff82b91e90 r hubp_regs +ffffffff82b92620 r hubp_shift +ffffffff82b926f8 r hubp_mask +ffffffff82b92a60 r ipp_regs +ffffffff82b92b40 r ipp_shift +ffffffff82b92b5c r ipp_mask +ffffffff82b92bd0 r tf_regs +ffffffff82b93c10 r tf_shift +ffffffff82b93e94 r tf_mask +ffffffff82b948b0 r opp_regs +ffffffff82b94960 r opp_shift +ffffffff82b94998 r opp_mask +ffffffff82b94a70 r aux_engine_regs +ffffffff82b94ac0 r aux_mask +ffffffff82b94b20 r aux_shift +ffffffff82b94b40 r i2c_hw_regs +ffffffff82b94bb0 r i2c_shifts +ffffffff82b94bdc r i2c_masks +ffffffff82b94c80 r tg_regs +ffffffff82b94f00 r tg_shift +ffffffff82b94fc0 r tg_mask +ffffffff82b952c0 r mpc_regs +ffffffff82b95808 r mpc_shift +ffffffff82b95854 r mpc_mask +ffffffff82b9597c r hubbub_reg +ffffffff82b95af0 r hubbub_shift +ffffffff82b95b78 r hubbub_mask +ffffffff82b95da0 r audio_regs +ffffffff82b95df8 r audio_shift +ffffffff82b95e10 r audio_mask +ffffffff82b95e50 r stream_enc_regs +ffffffff82b960f8 r se_shift +ffffffff82b961d4 r se_mask +ffffffff82b96540 r hwseq_reg +ffffffff82b9675c r hwseq_shift +ffffffff82b967dc r hwseq_mask +ffffffff82b97000 r dccg21_funcs +ffffffff82b98000 r hubbub21_funcs +ffffffff82b99000 r dcn21_funcs +ffffffff82b992c0 r dcn21_private_funcs +ffffffff82b9a000 r dcn21_mpll_cfg_ref +ffffffff82b9a190 r dcn21_link_enc_funcs +ffffffff82b9b000 r bios_regs +ffffffff82b9b008 r res_cap_rn +ffffffff82b9b048 r dcn21_res_pool_funcs +ffffffff82b9b128 r debug_defaults_drv +ffffffff82b9b2a0 r debug_defaults_diags +ffffffff82b9b420 r clk_src_regs +ffffffff82b9b5c4 r dccg_regs +ffffffff82b9b6b0 r dccg_shift +ffffffff82b9b748 r dccg_mask +ffffffff82b9b9a4 r dmcu_regs +ffffffff82b9ba00 r dmcu_shift +ffffffff82b9ba14 r dmcu_mask +ffffffff82b9ba60 r abm_regs +ffffffff82b9baa0 r abm_shift +ffffffff82b9bab4 r abm_mask +ffffffff82b9bb00 r res_create_funcs +ffffffff82b9bb30 r res_create_maximus_funcs +ffffffff82b9bb60 r plane_cap +ffffffff82b9bb90 r panel_cntl_regs +ffffffff82b9bbb0 r panel_cntl_shift +ffffffff82b9bbc0 r panel_cntl_mask +ffffffff82b9bc00 r link_enc_regs +ffffffff82b9c260 r link_enc_aux_regs +ffffffff82b9c2b0 r link_enc_hpd_regs +ffffffff82b9c2c4 r le_shift +ffffffff82b9c3b4 r le_mask +ffffffff82b9c76c r link_enc_feature +ffffffff82b9c77c r panel_config_defaults +ffffffff82b9c7b0 r cs_shift +ffffffff82b9c7bc r cs_mask +ffffffff82b9c7f0 r hubp_regs +ffffffff82b9d020 r hubp_shift +ffffffff82b9d11c r hubp_mask +ffffffff82b9d510 r ipp_regs +ffffffff82b9d5f0 r ipp_shift +ffffffff82b9d60c r ipp_mask +ffffffff82b9d680 r tf_regs +ffffffff82b9e740 r tf_shift +ffffffff82b9e9c4 r tf_mask +ffffffff82b9f3e0 r opp_regs +ffffffff82b9f5f0 r opp_shift +ffffffff82b9f628 r opp_mask +ffffffff82b9f700 r tg_regs +ffffffff82b9fc00 r tg_shift +ffffffff82b9fcc0 r tg_mask +ffffffff82b9ffc0 r aux_engine_regs +ffffffff82ba0088 r aux_mask +ffffffff82ba00e8 r aux_shift +ffffffff82ba0100 r i2c_hw_regs +ffffffff82ba0218 r i2c_shifts +ffffffff82ba0244 r i2c_masks +ffffffff82ba02e8 r mpc_regs +ffffffff82ba0830 r mpc_shift +ffffffff82ba0878 r mpc_mask +ffffffff82ba098c r hubbub_reg +ffffffff82ba0b00 r hubbub_shift +ffffffff82ba0b88 r hubbub_mask +ffffffff82ba0db0 r vmid_regs +ffffffff82ba0f70 r vmid_shifts +ffffffff82ba0f78 r vmid_masks +ffffffff82ba0fa0 r dsc_regs +ffffffff82ba1438 r dsc_shift +ffffffff82ba14f0 r dsc_mask +ffffffff82ba17d0 r audio_regs +ffffffff82ba18d8 r audio_shift +ffffffff82ba18f0 r audio_mask +ffffffff82ba1930 r stream_enc_regs +ffffffff82ba1fd4 r se_shift +ffffffff82ba20b0 r se_mask +ffffffff82ba241c r hwseq_reg +ffffffff82ba2638 r hwseq_shift +ffffffff82ba26b8 r hwseq_mask +ffffffff82ba3000 r dccg3_funcs +ffffffff82ba4000 r dcn30_link_enc_funcs +ffffffff82ba5000 r dcn30_str_enc_funcs +ffffffff82ba6000 r dpp_input_csc_matrix +ffffffff82ba7000 R dcn30_dwbc_funcs +ffffffff82ba8000 r hubbub30_funcs +ffffffff82baa000 r dcn30_funcs +ffffffff82baa2c0 r dcn30_private_funcs +ffffffff82bab000 R dcn30_mmhubbub_funcs +ffffffff82bac000 R dcn30_mpc_funcs +ffffffff82bad000 r bios_regs +ffffffff82bad008 r res_cap_dcn3 +ffffffff82bad048 r debug_defaults_drv +ffffffff82bad1c0 r debug_defaults_diags +ffffffff82bad340 r clk_src_regs +ffffffff82bad538 r dccg_regs +ffffffff82bad624 r dccg_shift +ffffffff82bad6bc r dccg_mask +ffffffff82bad920 r abm_regs +ffffffff82badaa0 r abm_shift +ffffffff82badab4 r abm_mask +ffffffff82badb00 r res_create_funcs +ffffffff82badb30 r res_create_maximus_funcs +ffffffff82badb60 r plane_cap +ffffffff82badb90 r dcn30_res_pool_funcs +ffffffff82badc70 r panel_cntl_regs +ffffffff82badc90 r panel_cntl_shift +ffffffff82badca0 r panel_cntl_mask +ffffffff82badce0 r link_enc_regs +ffffffff82bae480 r link_enc_aux_regs +ffffffff82bae4e0 r link_enc_hpd_regs +ffffffff82bae4f8 r le_shift +ffffffff82bae5e8 r le_mask +ffffffff82bae9a0 r link_enc_feature +ffffffff82bae9b0 r cs_shift +ffffffff82bae9bc r cs_mask +ffffffff82bae9e4 r hubbub_reg +ffffffff82baeb58 r hubbub_shift +ffffffff82baebe0 r hubbub_mask +ffffffff82baee00 r vmid_regs +ffffffff82baefc0 r vmid_shifts +ffffffff82baefc8 r vmid_masks +ffffffff82baeff0 r hubp_regs +ffffffff82bafc38 r hubp_shift +ffffffff82bafd34 r hubp_mask +ffffffff82bb0130 r dpp_regs +ffffffff82bb20b0 r tf_shift +ffffffff82bb2380 r tf_mask +ffffffff82bb2ec0 r opp_regs +ffffffff82bb30d0 r opp_shift +ffffffff82bb3108 r opp_mask +ffffffff82bb31e0 r optc_regs +ffffffff82bb3960 r optc_shift +ffffffff82bb3a20 r optc_mask +ffffffff82bb3d20 r mpc_regs +ffffffff82bb550c r mpc_shift +ffffffff82bb55e8 r mpc_mask +ffffffff82bb5960 r dsc_regs +ffffffff82bb5df8 r dsc_shift +ffffffff82bb5eb0 r dsc_mask +ffffffff82bb6190 r dwbc30_regs +ffffffff82bb636c r dwbc30_shift +ffffffff82bb64a0 r dwbc30_mask +ffffffff82bb6970 r mcif_wb30_regs +ffffffff82bb6a6c r mcif_wb30_shift +ffffffff82bb6b18 r mcif_wb30_mask +ffffffff82bb6dd0 r aux_engine_regs +ffffffff82bb6ec0 r aux_mask +ffffffff82bb6f20 r aux_shift +ffffffff82bb6f40 r i2c_hw_regs +ffffffff82bb7090 r i2c_shifts +ffffffff82bb70bc r i2c_masks +ffffffff82bb7160 r audio_regs +ffffffff82bb7294 r audio_shift +ffffffff82bb72ac r audio_mask +ffffffff82bb72f0 r stream_enc_regs +ffffffff82bb7ae8 r se_shift +ffffffff82bb7bc4 r se_mask +ffffffff82bb7f30 r vpg_regs +ffffffff82bb7fbc r vpg_shift +ffffffff82bb7fe4 r vpg_mask +ffffffff82bb8080 r afmt_regs +ffffffff82bb817c r afmt_shift +ffffffff82bb8190 r afmt_mask +ffffffff82bb81d4 r hwseq_reg +ffffffff82bb83f0 r hwseq_shift +ffffffff82bb8470 r hwseq_mask +ffffffff82bb9000 r dccg301_funcs +ffffffff82bba000 r dcn301_link_enc_funcs +ffffffff82bbb000 r hubbub301_funcs +ffffffff82bbc000 r dcn301_funcs +ffffffff82bbc2c0 r dcn301_private_funcs +ffffffff82bbd000 r dcn301_link_panel_cntl_funcs +ffffffff82bbe000 r bios_regs +ffffffff82bbe008 r debug_defaults_drv +ffffffff82bbe180 r debug_defaults_diags +ffffffff82bbe300 r clk_src_regs +ffffffff82bbe450 r dccg_regs +ffffffff82bbe53c r dccg_shift +ffffffff82bbe5d4 r dccg_mask +ffffffff82bbe830 r abm_regs +ffffffff82bbe930 r abm_shift +ffffffff82bbe944 r abm_mask +ffffffff82bbe990 r res_create_funcs +ffffffff82bbe9c0 r res_create_maximus_funcs +ffffffff82bbe9f0 r plane_cap +ffffffff82bbea20 r panel_cntl_regs +ffffffff82bbea60 r panel_cntl_shift +ffffffff82bbea70 r panel_cntl_mask +ffffffff82bbeab0 r link_enc_regs +ffffffff82bbefc0 r link_enc_aux_regs +ffffffff82bbf000 r link_enc_hpd_regs +ffffffff82bbf010 r le_shift +ffffffff82bbf100 r le_mask +ffffffff82bbf4b8 r link_enc_feature +ffffffff82bbf4c8 r cs_shift +ffffffff82bbf4d4 r cs_mask +ffffffff82bbf4fc r hubbub_reg +ffffffff82bbf670 r hubbub_shift +ffffffff82bbf6f8 r hubbub_mask +ffffffff82bbf920 r vmid_regs +ffffffff82bbfae0 r vmid_shifts +ffffffff82bbfae8 r vmid_masks +ffffffff82bbfb10 r hubp_regs +ffffffff82bc0340 r hubp_shift +ffffffff82bc043c r hubp_mask +ffffffff82bc0830 r dpp_regs +ffffffff82bc1d30 r tf_shift +ffffffff82bc2000 r tf_mask +ffffffff82bc2b40 r opp_regs +ffffffff82bc2ca0 r opp_shift +ffffffff82bc2cd8 r opp_mask +ffffffff82bc2db0 r optc_regs +ffffffff82bc32b0 r optc_shift +ffffffff82bc3370 r optc_mask +ffffffff82bc3670 r mpc_regs +ffffffff82bc4e5c r mpc_shift +ffffffff82bc4f38 r mpc_mask +ffffffff82bc52b0 r dsc_regs +ffffffff82bc54fc r dsc_shift +ffffffff82bc55b4 r dsc_mask +ffffffff82bc5890 r dwbc30_regs +ffffffff82bc5a6c r dwbc30_shift +ffffffff82bc5ba0 r dwbc30_mask +ffffffff82bc6070 r mcif_wb30_regs +ffffffff82bc616c r mcif_wb30_shift +ffffffff82bc6218 r mcif_wb30_mask +ffffffff82bc64d0 r aux_engine_regs +ffffffff82bc6570 r aux_mask +ffffffff82bc65d0 r aux_shift +ffffffff82bc65f0 r i2c_hw_regs +ffffffff82bc66d0 r i2c_shifts +ffffffff82bc66fc r i2c_masks +ffffffff82bc67a0 r audio_regs +ffffffff82bc68d4 r audio_shift +ffffffff82bc68ec r audio_mask +ffffffff82bc6930 r stream_enc_regs +ffffffff82bc6e80 r se_shift +ffffffff82bc6f5c r se_mask +ffffffff82bc72d0 r vpg_regs +ffffffff82bc7320 r vpg_shift +ffffffff82bc7348 r vpg_mask +ffffffff82bc73e0 r afmt_regs +ffffffff82bc7470 r afmt_shift +ffffffff82bc7484 r afmt_mask +ffffffff82bc74c8 r hwseq_reg +ffffffff82bc76e4 r hwseq_shift +ffffffff82bc7764 r hwseq_mask +ffffffff82bc8000 r bios_regs +ffffffff82bc8008 r res_cap_dcn302 +ffffffff82bc8048 r debug_defaults_drv +ffffffff82bc81c0 r debug_defaults_diags +ffffffff82bc8340 r clk_src_regs +ffffffff82bc84e4 r dccg_regs +ffffffff82bc85d0 r dccg_shift +ffffffff82bc8668 r dccg_mask +ffffffff82bc88d0 r abm_regs +ffffffff82bc8a10 r abm_shift +ffffffff82bc8a24 r abm_mask +ffffffff82bc8a70 r res_create_funcs +ffffffff82bc8aa0 r res_create_maximus_funcs +ffffffff82bc8ad0 r plane_cap +ffffffff82bc8b00 r panel_cntl_regs +ffffffff82bc8b20 r panel_cntl_shift +ffffffff82bc8b30 r panel_cntl_mask +ffffffff82bc8b70 r link_enc_regs +ffffffff82bc91d0 r link_enc_aux_regs +ffffffff82bc9220 r link_enc_hpd_regs +ffffffff82bc9234 r le_shift +ffffffff82bc9324 r le_mask +ffffffff82bc96dc r link_enc_feature +ffffffff82bc96ec r cs_shift +ffffffff82bc96f8 r cs_mask +ffffffff82bc9720 r hubbub_reg +ffffffff82bc9894 r hubbub_shift +ffffffff82bc991c r hubbub_mask +ffffffff82bc9b40 r vmid_regs +ffffffff82bc9d00 r vmid_shifts +ffffffff82bc9d08 r vmid_masks +ffffffff82bc9d30 r hubp_regs +ffffffff82bca76c r hubp_shift +ffffffff82bca868 r hubp_mask +ffffffff82bcac60 r dpp_regs +ffffffff82bcc6a0 r tf_shift +ffffffff82bcc970 r tf_mask +ffffffff82bcd4b0 r opp_regs +ffffffff82bcd668 r opp_shift +ffffffff82bcd6a0 r opp_mask +ffffffff82bcd780 r optc_regs +ffffffff82bcddc0 r optc_shift +ffffffff82bcde80 r optc_mask +ffffffff82bce180 r mpc_regs +ffffffff82bcf96c r mpc_shift +ffffffff82bcfa48 r mpc_mask +ffffffff82bcfdc0 r dsc_regs +ffffffff82bd0194 r dsc_shift +ffffffff82bd024c r dsc_mask +ffffffff82bd0530 r dwbc30_regs +ffffffff82bd070c r dwbc30_shift +ffffffff82bd0840 r dwbc30_mask +ffffffff82bd0d10 r mcif_wb30_regs +ffffffff82bd0e0c r mcif_wb30_shift +ffffffff82bd0eb8 r mcif_wb30_mask +ffffffff82bd1170 r aux_engine_regs +ffffffff82bd1238 r aux_mask +ffffffff82bd1298 r aux_shift +ffffffff82bd12b0 r i2c_hw_regs +ffffffff82bd13c8 r i2c_shifts +ffffffff82bd13f4 r i2c_masks +ffffffff82bd14a0 r audio_regs +ffffffff82bd15d4 r audio_shift +ffffffff82bd15ec r audio_mask +ffffffff82bd1630 r stream_enc_regs +ffffffff82bd1cd4 r se_shift +ffffffff82bd1db0 r se_mask +ffffffff82bd2120 r vpg_regs +ffffffff82bd2198 r vpg_shift +ffffffff82bd21c0 r vpg_mask +ffffffff82bd2260 r afmt_regs +ffffffff82bd2338 r afmt_shift +ffffffff82bd234c r afmt_mask +ffffffff82bd2390 r hwseq_reg +ffffffff82bd25ac r hwseq_shift +ffffffff82bd262c r hwseq_mask +ffffffff82bd3000 r bios_regs +ffffffff82bd3008 r res_cap_dcn303 +ffffffff82bd3048 r debug_defaults_drv +ffffffff82bd31c0 r debug_defaults_diags +ffffffff82bd3340 r clk_src_regs +ffffffff82bd33e8 r dccg_regs +ffffffff82bd34d4 r dccg_shift +ffffffff82bd356c r dccg_mask +ffffffff82bd37d0 r abm_regs +ffffffff82bd3850 r abm_shift +ffffffff82bd3864 r abm_mask +ffffffff82bd38b0 r res_create_funcs +ffffffff82bd38e0 r res_create_maximus_funcs +ffffffff82bd3910 r plane_cap +ffffffff82bd3940 r panel_cntl_regs +ffffffff82bd3960 r panel_cntl_shift +ffffffff82bd3970 r panel_cntl_mask +ffffffff82bd39b0 r link_enc_regs +ffffffff82bd3c40 r link_enc_aux_regs +ffffffff82bd3c60 r link_enc_hpd_regs +ffffffff82bd3c68 r le_shift +ffffffff82bd3d58 r le_mask +ffffffff82bd4110 r link_enc_feature +ffffffff82bd4120 r cs_shift +ffffffff82bd412c r cs_mask +ffffffff82bd4154 r hubbub_reg +ffffffff82bd42c8 r hubbub_shift +ffffffff82bd4350 r hubbub_mask +ffffffff82bd4570 r vmid_regs +ffffffff82bd4730 r vmid_shifts +ffffffff82bd4738 r vmid_masks +ffffffff82bd4760 r hubp_regs +ffffffff82bd4b78 r hubp_shift +ffffffff82bd4c74 r hubp_mask +ffffffff82bd5070 r dpp_regs +ffffffff82bd5af0 r tf_shift +ffffffff82bd5dc0 r tf_mask +ffffffff82bd6900 r opp_regs +ffffffff82bd69b0 r opp_shift +ffffffff82bd69e8 r opp_mask +ffffffff82bd6ac0 r optc_regs +ffffffff82bd6d40 r optc_shift +ffffffff82bd6e00 r optc_mask +ffffffff82bd7100 r mpc_regs +ffffffff82bd88ec r mpc_shift +ffffffff82bd89c8 r mpc_mask +ffffffff82bd8d40 r dsc_regs +ffffffff82bd8ec8 r dsc_shift +ffffffff82bd8f80 r dsc_mask +ffffffff82bd9260 r dwbc30_regs +ffffffff82bd943c r dwbc30_shift +ffffffff82bd9570 r dwbc30_mask +ffffffff82bd9a40 r mcif_wb30_regs +ffffffff82bd9b3c r mcif_wb30_shift +ffffffff82bd9be8 r mcif_wb30_mask +ffffffff82bd9ea0 r aux_engine_regs +ffffffff82bd9ef0 r aux_mask +ffffffff82bd9f50 r aux_shift +ffffffff82bd9f70 r i2c_hw_regs +ffffffff82bd9fe0 r i2c_shifts +ffffffff82bda00c r i2c_masks +ffffffff82bda0b0 r audio_regs +ffffffff82bda1e4 r audio_shift +ffffffff82bda1fc r audio_mask +ffffffff82bda240 r stream_enc_regs +ffffffff82bda4e8 r se_shift +ffffffff82bda5c4 r se_mask +ffffffff82bda930 r vpg_regs +ffffffff82bda96c r vpg_shift +ffffffff82bda994 r vpg_mask +ffffffff82bdaa30 r afmt_regs +ffffffff82bdaa9c r afmt_shift +ffffffff82bdaab0 r afmt_mask +ffffffff82bdaaf4 r hwseq_reg +ffffffff82bdad10 r hwseq_shift +ffffffff82bdad90 r hwseq_mask +ffffffff82bdb000 r dccg31_funcs +ffffffff82bdc000 r dcn31_link_enc_funcs +ffffffff82bdd000 r dcn30_str_enc_funcs +ffffffff82bde000 r hubbub31_funcs +ffffffff82bdf000 r dcn31_funcs +ffffffff82bdf2c0 r dcn31_private_funcs +ffffffff82be0000 r dcn31_link_panel_cntl_funcs +ffffffff82be1000 r bios_regs +ffffffff82be1008 r res_cap_dcn31 +ffffffff82be1048 r debug_defaults_diags +ffffffff82be11c0 r clk_src_regs +ffffffff82be1370 r clk_src_regs_b0 +ffffffff82be1514 r dccg_regs +ffffffff82be1600 r dccg_shift +ffffffff82be1698 r dccg_mask +ffffffff82be1900 r abm_regs +ffffffff82be1a00 r abm_shift +ffffffff82be1a14 r abm_mask +ffffffff82be1a60 r res_create_funcs +ffffffff82be1a90 r res_create_maximus_funcs +ffffffff82be1ac0 r plane_cap +ffffffff82be1af0 r link_enc_regs +ffffffff82be2150 r link_enc_aux_regs +ffffffff82be21a0 r link_enc_hpd_regs +ffffffff82be21b4 r le_shift +ffffffff82be22a4 r le_mask +ffffffff82be265c r link_enc_feature +ffffffff82be266c r panel_config_defaults +ffffffff82be26a0 r debug_defaults_drv +ffffffff82be2818 r cs_shift +ffffffff82be2824 r cs_mask +ffffffff82be284c r hubbub_reg +ffffffff82be29c0 r hubbub_shift +ffffffff82be2a48 r hubbub_mask +ffffffff82be2c70 r vmid_regs +ffffffff82be2e30 r vmid_shifts +ffffffff82be2e38 r vmid_masks +ffffffff82be2e60 r hubp_regs +ffffffff82be3690 r hubp_shift +ffffffff82be378c r hubp_mask +ffffffff82be3b80 r dpp_regs +ffffffff82be5080 r tf_shift +ffffffff82be5350 r tf_mask +ffffffff82be5e90 r opp_regs +ffffffff82be5ff0 r opp_shift +ffffffff82be6028 r opp_mask +ffffffff82be6100 r optc_regs +ffffffff82be6600 r optc_shift +ffffffff82be66c0 r optc_mask +ffffffff82be69c0 r mpc_regs +ffffffff82be81ac r mpc_shift +ffffffff82be8288 r mpc_mask +ffffffff82be8600 r dsc_regs +ffffffff82be884c r dsc_shift +ffffffff82be8904 r dsc_mask +ffffffff82be8be0 r dwbc30_regs +ffffffff82be8dbc r dwbc30_shift +ffffffff82be8ef0 r dwbc30_mask +ffffffff82be93c0 r mcif_wb30_regs +ffffffff82be94bc r mcif_wb30_shift +ffffffff82be9568 r mcif_wb30_mask +ffffffff82be9820 r aux_engine_regs +ffffffff82be98e8 r aux_mask +ffffffff82be9948 r aux_shift +ffffffff82be9960 r i2c_hw_regs +ffffffff82be9a78 r i2c_shifts +ffffffff82be9aa4 r i2c_masks +ffffffff82be9b50 r audio_regs +ffffffff82be9c84 r audio_shift +ffffffff82be9c9c r audio_mask +ffffffff82be9cd8 r se_shift +ffffffff82be9db4 r se_mask +ffffffff82bea120 r vpg_regs +ffffffff82bea210 r vpg_shift +ffffffff82bea238 r vpg_mask +ffffffff82bea2e0 r afmt_regs +ffffffff82bea3b8 r afmt_shift +ffffffff82bea3cc r afmt_mask +ffffffff82bea420 r stream_enc_regs +ffffffff82bebac0 r hpo_dp_stream_enc_regs +ffffffff82bebcf0 r hpo_dp_se_shift +ffffffff82bebd18 r hpo_dp_se_mask +ffffffff82bebdc0 r apg_regs +ffffffff82bebe00 r apg_shift +ffffffff82bebe08 r apg_mask +ffffffff82bebe20 r hpo_dp_link_enc_regs +ffffffff82bebf30 r hpo_dp_le_shift +ffffffff82bebf4c r hpo_dp_le_mask +ffffffff82bebfb0 r hwseq_reg +ffffffff82bec1cc r hwseq_shift +ffffffff82bec24c r hwseq_mask +ffffffff82bed000 r dccg314_funcs +ffffffff82bee000 r dcn314_str_enc_funcs +ffffffff82bef000 r dcn314_funcs +ffffffff82bef2c0 r dcn314_private_funcs +ffffffff82bf0000 r bios_regs +ffffffff82bf0008 r res_cap_dcn314 +ffffffff82bf0048 r debug_defaults_diags +ffffffff82bf01c0 r clk_src_regs +ffffffff82bf0364 r dccg_regs +ffffffff82bf0450 r dccg_shift +ffffffff82bf04e8 r dccg_mask +ffffffff82bf0750 r abm_regs +ffffffff82bf0850 r abm_shift +ffffffff82bf0864 r abm_mask +ffffffff82bf08b0 r res_create_funcs +ffffffff82bf08e0 r res_create_maximus_funcs +ffffffff82bf0910 r plane_cap +ffffffff82bf0940 r link_enc_regs +ffffffff82bf0fa0 r link_enc_aux_regs +ffffffff82bf0ff0 r link_enc_hpd_regs +ffffffff82bf1004 r le_shift +ffffffff82bf10f4 r le_mask +ffffffff82bf14ac r link_enc_feature +ffffffff82bf14bc r panel_config_defaults +ffffffff82bf14f0 r debug_defaults_drv +ffffffff82bf1668 r cs_shift +ffffffff82bf1674 r cs_mask +ffffffff82bf169c r hubbub_reg +ffffffff82bf1810 r hubbub_shift +ffffffff82bf1898 r hubbub_mask +ffffffff82bf1ac0 r vmid_regs +ffffffff82bf1c80 r vmid_shifts +ffffffff82bf1c88 r vmid_masks +ffffffff82bf1cb0 r hubp_regs +ffffffff82bf24e0 r hubp_shift +ffffffff82bf25dc r hubp_mask +ffffffff82bf29d0 r dpp_regs +ffffffff82bf3ed0 r tf_shift +ffffffff82bf41a0 r tf_mask +ffffffff82bf4ce0 r opp_regs +ffffffff82bf4e40 r opp_shift +ffffffff82bf4e78 r opp_mask +ffffffff82bf4f50 r optc_regs +ffffffff82bf5450 r optc_shift +ffffffff82bf5510 r optc_mask +ffffffff82bf5810 r mpc_regs +ffffffff82bf6ffc r mpc_shift +ffffffff82bf70d8 r mpc_mask +ffffffff82bf7450 r dsc_regs +ffffffff82bf7760 r dsc_shift +ffffffff82bf7818 r dsc_mask +ffffffff82bf7af0 r dwbc30_regs +ffffffff82bf7ccc r dwbc30_shift +ffffffff82bf7e00 r dwbc30_mask +ffffffff82bf82d0 r mcif_wb30_regs +ffffffff82bf83cc r mcif_wb30_shift +ffffffff82bf8478 r mcif_wb30_mask +ffffffff82bf8730 r aux_engine_regs +ffffffff82bf87f8 r aux_mask +ffffffff82bf8858 r aux_shift +ffffffff82bf8870 r i2c_hw_regs +ffffffff82bf8988 r i2c_shifts +ffffffff82bf89b4 r i2c_masks +ffffffff82bf8a60 r audio_regs +ffffffff82bf8b94 r audio_shift +ffffffff82bf8bac r audio_mask +ffffffff82bf8bf0 r stream_enc_regs +ffffffff82bf9294 r se_shift +ffffffff82bf9370 r se_mask +ffffffff82bf96e0 r vpg_regs +ffffffff82bf97d0 r vpg_shift +ffffffff82bf97f8 r vpg_mask +ffffffff82bf98a0 r afmt_regs +ffffffff82bf9978 r afmt_shift +ffffffff82bf998c r afmt_mask +ffffffff82bf99e0 r hpo_dp_stream_enc_regs +ffffffff82bf9c10 r hpo_dp_se_shift +ffffffff82bf9c38 r hpo_dp_se_mask +ffffffff82bf9ce0 r apg_regs +ffffffff82bf9d20 r apg_shift +ffffffff82bf9d28 r apg_mask +ffffffff82bf9d40 r hpo_dp_link_enc_regs +ffffffff82bf9e50 r hpo_dp_le_shift +ffffffff82bf9e6c r hpo_dp_le_mask +ffffffff82bf9ed0 r hwseq_reg +ffffffff82bfa0ec r hwseq_shift +ffffffff82bfa16c r hwseq_mask +ffffffff82bfb000 r bios_regs +ffffffff82bfb008 r res_cap_dcn31 +ffffffff82bfb048 r debug_defaults_diags +ffffffff82bfb1c0 r clk_src_regs +ffffffff82bfb364 r dccg_regs +ffffffff82bfb450 r dccg_shift +ffffffff82bfb4e8 r dccg_mask +ffffffff82bfb750 r abm_regs +ffffffff82bfb850 r abm_shift +ffffffff82bfb864 r abm_mask +ffffffff82bfb8b0 r res_create_funcs +ffffffff82bfb8e0 r res_create_maximus_funcs +ffffffff82bfb910 r plane_cap +ffffffff82bfb940 r link_enc_regs +ffffffff82bfbfa0 r link_enc_aux_regs +ffffffff82bfbff0 r link_enc_hpd_regs +ffffffff82bfc004 r le_shift +ffffffff82bfc0f4 r le_mask +ffffffff82bfc4ac r link_enc_feature +ffffffff82bfc4bc r panel_config_defaults +ffffffff82bfc4f0 r debug_defaults_drv +ffffffff82bfc668 r cs_shift +ffffffff82bfc674 r cs_mask +ffffffff82bfc69c r hubbub_reg +ffffffff82bfc810 r hubbub_shift +ffffffff82bfc898 r hubbub_mask +ffffffff82bfcac0 r vmid_regs +ffffffff82bfcc80 r vmid_shifts +ffffffff82bfcc88 r vmid_masks +ffffffff82bfccb0 r hubp_regs +ffffffff82bfd4e0 r hubp_shift +ffffffff82bfd5dc r hubp_mask +ffffffff82bfd9d0 r dpp_regs +ffffffff82bfeed0 r tf_shift +ffffffff82bff1a0 r tf_mask +ffffffff82bffce0 r opp_regs +ffffffff82bffe40 r opp_shift +ffffffff82bffe78 r opp_mask +ffffffff82bfff50 r optc_regs +ffffffff82c00450 r optc_shift +ffffffff82c00510 r optc_mask +ffffffff82c00810 r mpc_regs +ffffffff82c01ffc r mpc_shift +ffffffff82c020d8 r mpc_mask +ffffffff82c02450 r dsc_regs +ffffffff82c0269c r dsc_shift +ffffffff82c02754 r dsc_mask +ffffffff82c02a30 r dwbc30_regs +ffffffff82c02c0c r dwbc30_shift +ffffffff82c02d40 r dwbc30_mask +ffffffff82c03210 r mcif_wb30_regs +ffffffff82c0330c r mcif_wb30_shift +ffffffff82c033b8 r mcif_wb30_mask +ffffffff82c03670 r aux_engine_regs +ffffffff82c03738 r aux_mask +ffffffff82c03798 r aux_shift +ffffffff82c037b0 r i2c_hw_regs +ffffffff82c038c8 r i2c_shifts +ffffffff82c038f4 r i2c_masks +ffffffff82c039a0 r audio_regs +ffffffff82c03ad4 r audio_shift +ffffffff82c03aec r audio_mask +ffffffff82c03b30 r stream_enc_regs +ffffffff82c041d4 r se_shift +ffffffff82c042b0 r se_mask +ffffffff82c04620 r vpg_regs +ffffffff82c04710 r vpg_shift +ffffffff82c04738 r vpg_mask +ffffffff82c047e0 r afmt_regs +ffffffff82c048b8 r afmt_shift +ffffffff82c048cc r afmt_mask +ffffffff82c04920 r hpo_dp_stream_enc_regs +ffffffff82c04b50 r hpo_dp_se_shift +ffffffff82c04b78 r hpo_dp_se_mask +ffffffff82c04c20 r apg_regs +ffffffff82c04c60 r apg_shift +ffffffff82c04c68 r apg_mask +ffffffff82c04c80 r hpo_dp_link_enc_regs +ffffffff82c04d90 r hpo_dp_le_shift +ffffffff82c04dac r hpo_dp_le_mask +ffffffff82c04e10 r hwseq_reg +ffffffff82c0502c r hwseq_shift +ffffffff82c050ac r hwseq_mask +ffffffff82c06000 r bios_regs +ffffffff82c06008 r res_cap_dcn31 +ffffffff82c06048 r debug_defaults_diags +ffffffff82c061c0 r clk_src_regs +ffffffff82c06364 r dccg_regs +ffffffff82c06450 r dccg_shift +ffffffff82c064e8 r dccg_mask +ffffffff82c06750 r abm_regs +ffffffff82c06850 r abm_shift +ffffffff82c06864 r abm_mask +ffffffff82c068b0 r res_create_funcs +ffffffff82c068e0 r res_create_maximus_funcs +ffffffff82c06910 r plane_cap +ffffffff82c06940 r link_enc_regs +ffffffff82c06fa0 r link_enc_aux_regs +ffffffff82c06ff0 r link_enc_hpd_regs +ffffffff82c07004 r le_shift +ffffffff82c070f4 r le_mask +ffffffff82c074ac r link_enc_feature +ffffffff82c074bc r panel_config_defaults +ffffffff82c074f0 r debug_defaults_drv +ffffffff82c07668 r cs_shift +ffffffff82c07674 r cs_mask +ffffffff82c0769c r hubbub_reg +ffffffff82c07810 r hubbub_shift +ffffffff82c07898 r hubbub_mask +ffffffff82c07ac0 r vmid_regs +ffffffff82c07c80 r vmid_shifts +ffffffff82c07c88 r vmid_masks +ffffffff82c07cb0 r hubp_regs +ffffffff82c084e0 r hubp_shift +ffffffff82c085dc r hubp_mask +ffffffff82c089d0 r dpp_regs +ffffffff82c09ed0 r tf_shift +ffffffff82c0a1a0 r tf_mask +ffffffff82c0ace0 r opp_regs +ffffffff82c0ae40 r opp_shift +ffffffff82c0ae78 r opp_mask +ffffffff82c0af50 r optc_regs +ffffffff82c0b450 r optc_shift +ffffffff82c0b510 r optc_mask +ffffffff82c0b810 r mpc_regs +ffffffff82c0cffc r mpc_shift +ffffffff82c0d0d8 r mpc_mask +ffffffff82c0d450 r dsc_regs +ffffffff82c0d69c r dsc_shift +ffffffff82c0d754 r dsc_mask +ffffffff82c0da30 r dwbc30_regs +ffffffff82c0dc0c r dwbc30_shift +ffffffff82c0dd40 r dwbc30_mask +ffffffff82c0e210 r mcif_wb30_regs +ffffffff82c0e30c r mcif_wb30_shift +ffffffff82c0e3b8 r mcif_wb30_mask +ffffffff82c0e670 r aux_engine_regs +ffffffff82c0e738 r aux_mask +ffffffff82c0e798 r aux_shift +ffffffff82c0e7b0 r i2c_hw_regs +ffffffff82c0e8c8 r i2c_shifts +ffffffff82c0e8f4 r i2c_masks +ffffffff82c0e9a0 r audio_regs +ffffffff82c0ead4 r audio_shift +ffffffff82c0eaec r audio_mask +ffffffff82c0eb30 r stream_enc_regs +ffffffff82c0f1d4 r se_shift +ffffffff82c0f2b0 r se_mask +ffffffff82c0f620 r vpg_regs +ffffffff82c0f710 r vpg_shift +ffffffff82c0f738 r vpg_mask +ffffffff82c0f7e0 r afmt_regs +ffffffff82c0f8b8 r afmt_shift +ffffffff82c0f8cc r afmt_mask +ffffffff82c0f920 r hpo_dp_stream_enc_regs +ffffffff82c0fb50 r hpo_dp_se_shift +ffffffff82c0fb78 r hpo_dp_se_mask +ffffffff82c0fc20 r apg_regs +ffffffff82c0fc60 r apg_shift +ffffffff82c0fc68 r apg_mask +ffffffff82c0fc80 r hpo_dp_link_enc_regs +ffffffff82c0fd90 r hpo_dp_le_shift +ffffffff82c0fdac r hpo_dp_le_mask +ffffffff82c0fe10 r hwseq_reg +ffffffff82c1002c r hwseq_shift +ffffffff82c100ac r hwseq_mask +ffffffff82c11000 r dccg32_funcs +ffffffff82c12000 r dcn32_link_enc_funcs +ffffffff82c13000 r dcn32_str_enc_funcs +ffffffff82c14000 r hubbub32_funcs +ffffffff82c15000 r dcn32_funcs +ffffffff82c152c0 r dcn32_private_funcs +ffffffff82c16000 R dcn32_mmhubbub_funcs +ffffffff82c17000 R dcn32_mpc_funcs +ffffffff82c18000 r res_cap_dcn32 +ffffffff82c18040 r debug_defaults_diags +ffffffff82c181b8 r dccg_shift +ffffffff82c18250 r dccg_mask +ffffffff82c184ac r abm_shift +ffffffff82c184c0 r abm_mask +ffffffff82c18508 r res_create_funcs +ffffffff82c18538 r res_create_maximus_funcs +ffffffff82c18568 r plane_cap +ffffffff82c18594 r le_shift +ffffffff82c18684 r le_mask +ffffffff82c18a3c r link_enc_feature +ffffffff82c18a50 r debug_defaults_drv +ffffffff82c18bc8 r cs_shift +ffffffff82c18bd4 r cs_mask +ffffffff82c18bfc r hubbub_shift +ffffffff82c18c84 r hubbub_mask +ffffffff82c18ea0 r vmid_shifts +ffffffff82c18ea8 r vmid_masks +ffffffff82c18ec8 r hubp_shift +ffffffff82c18fc4 r hubp_mask +ffffffff82c193b4 r tf_shift +ffffffff82c19684 r tf_mask +ffffffff82c1a1c4 r opp_shift +ffffffff82c1a1fc r opp_mask +ffffffff82c1a2d0 r optc_shift +ffffffff82c1a390 r optc_mask +ffffffff82c1a690 r mpc_shift +ffffffff82c1a76c r mpc_mask +ffffffff82c1aad8 r dsc_shift +ffffffff82c1ab90 r dsc_mask +ffffffff82c1ae68 r dwbc30_shift +ffffffff82c1af9c r dwbc30_mask +ffffffff82c1b464 r mcif_wb30_shift +ffffffff82c1b510 r mcif_wb30_mask +ffffffff82c1b7bc r aux_mask +ffffffff82c1b81c r aux_shift +ffffffff82c1b834 r i2c_shifts +ffffffff82c1b860 r i2c_masks +ffffffff82c1b904 r audio_shift +ffffffff82c1b91c r audio_mask +ffffffff82c1b958 r se_shift +ffffffff82c1ba34 r se_mask +ffffffff82c1bda0 r vpg_shift +ffffffff82c1bdc8 r vpg_mask +ffffffff82c1be5c r afmt_shift +ffffffff82c1be70 r afmt_mask +ffffffff82c1beb4 r hpo_dp_se_shift +ffffffff82c1bedc r hpo_dp_se_mask +ffffffff82c1bf7c r apg_shift +ffffffff82c1bf84 r apg_mask +ffffffff82c1bf9c r hpo_dp_le_shift +ffffffff82c1bfb8 r hpo_dp_le_mask +ffffffff82c1c01c r hwseq_shift +ffffffff82c1c09c r hwseq_mask +ffffffff82c1d000 r dcn321_link_enc_funcs +ffffffff82c1e000 r res_cap_dcn321 +ffffffff82c1e040 r debug_defaults_diags +ffffffff82c1e1b8 r dccg_shift +ffffffff82c1e250 r dccg_mask +ffffffff82c1e4ac r abm_shift +ffffffff82c1e4c0 r abm_mask +ffffffff82c1e508 r res_create_funcs +ffffffff82c1e538 r res_create_maximus_funcs +ffffffff82c1e568 r plane_cap +ffffffff82c1e594 r le_shift +ffffffff82c1e684 r le_mask +ffffffff82c1ea3c r link_enc_feature +ffffffff82c1ea50 r debug_defaults_drv +ffffffff82c1ebc8 r cs_shift +ffffffff82c1ebd4 r cs_mask +ffffffff82c1ebfc r hubbub_shift +ffffffff82c1ec84 r hubbub_mask +ffffffff82c1eea0 r vmid_shifts +ffffffff82c1eea8 r vmid_masks +ffffffff82c1eec8 r hubp_shift +ffffffff82c1efc4 r hubp_mask +ffffffff82c1f3b4 r tf_shift +ffffffff82c1f684 r tf_mask +ffffffff82c201c4 r opp_shift +ffffffff82c201fc r opp_mask +ffffffff82c202d0 r optc_shift +ffffffff82c20390 r optc_mask +ffffffff82c20690 r mpc_shift +ffffffff82c2076c r mpc_mask +ffffffff82c20ad8 r dsc_shift +ffffffff82c20b90 r dsc_mask +ffffffff82c20e68 r dwbc30_shift +ffffffff82c20f9c r dwbc30_mask +ffffffff82c21464 r mcif_wb30_shift +ffffffff82c21510 r mcif_wb30_mask +ffffffff82c217bc r aux_mask +ffffffff82c2181c r aux_shift +ffffffff82c21834 r i2c_shifts +ffffffff82c21860 r i2c_masks +ffffffff82c21904 r audio_shift +ffffffff82c2191c r audio_mask +ffffffff82c21958 r se_shift +ffffffff82c21a34 r se_mask +ffffffff82c21da0 r vpg_shift +ffffffff82c21dc8 r vpg_mask +ffffffff82c21e5c r afmt_shift +ffffffff82c21e70 r afmt_mask +ffffffff82c21eb4 r hpo_dp_se_shift +ffffffff82c21edc r hpo_dp_se_mask +ffffffff82c21f7c r apg_shift +ffffffff82c21f84 r apg_mask +ffffffff82c21f9c r hpo_dp_le_shift +ffffffff82c21fb8 r hpo_dp_le_mask +ffffffff82c2201c r hwseq_shift +ffffffff82c2209c r hwseq_mask +ffffffff82c24000 R dcn10_soc_defaults +ffffffff82c2408c R dcn10_ip_defaults +ffffffff82c2f000 R dml20_funcs +ffffffff82c2f030 R dml20v2_funcs +ffffffff82c2f060 R dml21_funcs +ffffffff82c2f090 R dml30_funcs +ffffffff82c2f0c0 R dml31_funcs +ffffffff82c2f0f0 R dml314_funcs +ffffffff82c2f120 R dml32_funcs +ffffffff82c32000 R qp_table_422_10bpc_min +ffffffff82c32740 R qp_table_444_8bpc_max +ffffffff82c33080 R qp_table_420_12bpc_max +ffffffff82c337c0 R qp_table_444_10bpc_min +ffffffff82c34400 R qp_table_420_8bpc_max +ffffffff82c34840 R qp_table_444_8bpc_min +ffffffff82c35180 R qp_table_444_12bpc_min +ffffffff82c360c0 R qp_table_420_12bpc_min +ffffffff82c36800 R qp_table_422_12bpc_min +ffffffff82c37140 R qp_table_422_12bpc_max +ffffffff82c37a80 R qp_table_444_12bpc_max +ffffffff82c389c0 R qp_table_420_8bpc_min +ffffffff82c38e00 R qp_table_422_8bpc_min +ffffffff82c39340 R qp_table_422_10bpc_max +ffffffff82c39a80 R qp_table_420_10bpc_max +ffffffff82c3a040 R qp_table_420_10bpc_min +ffffffff82c3a600 R qp_table_444_10bpc_max +ffffffff82c3b240 R qp_table_422_8bpc_max ffffffff82c3d000 r funcs +ffffffff82c3d050 r hpd_regs +ffffffff82c3d1a0 r hpd_shift +ffffffff82c3d1b0 r hpd_mask +ffffffff82c3d1c0 r ddc_data_regs +ffffffff82c3d3a0 r ddc_clk_regs +ffffffff82c3d580 r ddc_shift +ffffffff82c3d5a8 r ddc_mask ffffffff82c3e000 r funcs -ffffffff82c3e050 r hpd_regs -ffffffff82c3e1a0 r hpd_shift -ffffffff82c3e1b0 r hpd_mask -ffffffff82c3e1c0 r ddc_data_regs -ffffffff82c3e3a0 r ddc_clk_regs -ffffffff82c3e580 r ddc_shift -ffffffff82c3e5a8 r ddc_mask ffffffff82c3f000 r funcs +ffffffff82c3f050 r hpd_regs +ffffffff82c3f1a0 r hpd_shift +ffffffff82c3f1b0 r hpd_mask +ffffffff82c3f1c0 r ddc_data_regs +ffffffff82c3f3a0 r ddc_clk_regs +ffffffff82c3f580 r ddc_shift +ffffffff82c3f5a8 r ddc_mask ffffffff82c40000 r funcs -ffffffff82c40050 r hpd_regs -ffffffff82c401a0 r hpd_shift -ffffffff82c401b0 r hpd_mask -ffffffff82c401c0 r ddc_data_regs -ffffffff82c403a0 r ddc_clk_regs -ffffffff82c40580 r ddc_shift -ffffffff82c405a8 r ddc_mask ffffffff82c41000 r funcs +ffffffff82c41050 r hpd_regs +ffffffff82c411a0 r hpd_shift +ffffffff82c411b0 r hpd_mask +ffffffff82c411c0 r ddc_data_regs +ffffffff82c413a0 r ddc_clk_regs +ffffffff82c41580 r ddc_shift +ffffffff82c415a8 r ddc_mask ffffffff82c42000 r funcs -ffffffff82c42050 r hpd_regs -ffffffff82c421a0 r hpd_shift -ffffffff82c421b0 r hpd_mask -ffffffff82c421c0 r ddc_data_regs -ffffffff82c423a0 r ddc_clk_regs -ffffffff82c42580 r ddc_shift -ffffffff82c425a8 r ddc_mask -ffffffff82c425d0 r generic_regs -ffffffff82c42640 r generic_shift -ffffffff82c42650 r generic_mask ffffffff82c43000 r funcs +ffffffff82c43050 r hpd_regs +ffffffff82c431a0 r hpd_shift +ffffffff82c431b0 r hpd_mask +ffffffff82c431c0 r ddc_data_regs +ffffffff82c433a0 r ddc_clk_regs +ffffffff82c43580 r ddc_shift +ffffffff82c435a8 r ddc_mask +ffffffff82c435d0 r generic_regs +ffffffff82c43640 r generic_shift +ffffffff82c43650 r generic_mask ffffffff82c44000 r funcs -ffffffff82c44050 r hpd_regs -ffffffff82c441a0 r hpd_shift -ffffffff82c441b0 r hpd_mask -ffffffff82c441c0 r ddc_data_regs_dcn -ffffffff82c44370 r ddc_clk_regs_dcn -ffffffff82c44520 r ddc_shift -ffffffff82c44640 r ddc_mask -ffffffff82c44760 r generic_regs -ffffffff82c447d0 r generic_shift -ffffffff82c447e0 r generic_mask ffffffff82c45000 r funcs +ffffffff82c45050 r hpd_regs +ffffffff82c451a0 r hpd_shift +ffffffff82c451b0 r hpd_mask +ffffffff82c451c0 r ddc_data_regs_dcn +ffffffff82c45370 r ddc_clk_regs_dcn +ffffffff82c45520 r ddc_shift +ffffffff82c45640 r ddc_mask +ffffffff82c45760 r generic_regs +ffffffff82c457d0 r generic_shift +ffffffff82c457e0 r generic_mask ffffffff82c46000 r funcs -ffffffff82c46050 r hpd_regs -ffffffff82c46168 r hpd_shift -ffffffff82c46178 r hpd_mask -ffffffff82c46190 r ddc_data_regs_dcn -ffffffff82c462c0 r ddc_clk_regs_dcn -ffffffff82c463f0 r ddc_shift -ffffffff82c464e0 r ddc_mask -ffffffff82c465d0 r generic_regs -ffffffff82c46604 r generic_shift -ffffffff82c4660c r generic_mask ffffffff82c47000 r funcs +ffffffff82c47050 r hpd_regs +ffffffff82c47168 r hpd_shift +ffffffff82c47178 r hpd_mask +ffffffff82c47190 r ddc_data_regs_dcn +ffffffff82c472c0 r ddc_clk_regs_dcn +ffffffff82c473f0 r ddc_shift +ffffffff82c474e0 r ddc_mask +ffffffff82c475d0 r generic_regs +ffffffff82c47604 r generic_shift +ffffffff82c4760c r generic_mask ffffffff82c48000 r funcs -ffffffff82c48050 r hpd_regs -ffffffff82c481a0 r hpd_shift -ffffffff82c481b0 r hpd_mask -ffffffff82c481c0 r ddc_data_regs_dcn -ffffffff82c48370 r ddc_clk_regs_dcn -ffffffff82c48520 r ddc_shift -ffffffff82c48640 r ddc_mask -ffffffff82c48760 r generic_regs -ffffffff82c487d0 r generic_shift -ffffffff82c487e0 r generic_mask ffffffff82c49000 r funcs +ffffffff82c49050 r hpd_regs +ffffffff82c491a0 r hpd_shift +ffffffff82c491b0 r hpd_mask +ffffffff82c491c0 r ddc_data_regs_dcn +ffffffff82c49370 r ddc_clk_regs_dcn +ffffffff82c49520 r ddc_shift +ffffffff82c49640 r ddc_mask +ffffffff82c49760 r generic_regs +ffffffff82c497d0 r generic_shift +ffffffff82c497e0 r generic_mask ffffffff82c4a000 r funcs -ffffffff82c4a050 r hpd_regs -ffffffff82c4a168 r hpd_shift -ffffffff82c4a178 r hpd_mask -ffffffff82c4a190 r ddc_data_regs_dcn -ffffffff82c4a300 r ddc_clk_regs_dcn -ffffffff82c4a470 r ddc_shift -ffffffff82c4a560 r ddc_mask -ffffffff82c4a650 r generic_regs -ffffffff82c4a6c0 r generic_shift -ffffffff82c4a6d0 r generic_mask ffffffff82c4b000 r funcs +ffffffff82c4b050 r hpd_regs +ffffffff82c4b168 r hpd_shift +ffffffff82c4b178 r hpd_mask +ffffffff82c4b190 r ddc_data_regs_dcn +ffffffff82c4b300 r ddc_clk_regs_dcn +ffffffff82c4b470 r ddc_shift +ffffffff82c4b560 r ddc_mask +ffffffff82c4b650 r generic_regs +ffffffff82c4b6c0 r generic_shift +ffffffff82c4b6d0 r generic_mask ffffffff82c4c000 r funcs -ffffffff82c4c050 r hpd_regs -ffffffff82c4c168 r hpd_shift -ffffffff82c4c178 r hpd_mask -ffffffff82c4c190 r ddc_data_regs_dcn -ffffffff82c4c340 r ddc_clk_regs_dcn -ffffffff82c4c4f0 r ddc_shift -ffffffff82c4c610 r ddc_mask -ffffffff82c4c730 r generic_regs -ffffffff82c4c7a0 r generic_shift -ffffffff82c4c7b0 r generic_mask ffffffff82c4d000 r funcs +ffffffff82c4d050 r hpd_regs +ffffffff82c4d168 r hpd_shift +ffffffff82c4d178 r hpd_mask +ffffffff82c4d190 r ddc_data_regs_dcn +ffffffff82c4d340 r ddc_clk_regs_dcn +ffffffff82c4d4f0 r ddc_shift +ffffffff82c4d610 r ddc_mask +ffffffff82c4d730 r generic_regs +ffffffff82c4d7a0 r generic_shift +ffffffff82c4d7b0 r generic_mask ffffffff82c4e000 r funcs ffffffff82c4f000 r funcs ffffffff82c50000 r funcs -ffffffff82c51000 r hdmi_14_protection -ffffffff82c51010 r dp_11_protection -ffffffff82c51020 r hdcp_i2c_offsets -ffffffff82c51050 r hdcp_dpcd_addrs -ffffffff82c52000 r irq_service_funcs_dce110 -ffffffff82c52010 r irq_source_info_dce110 -ffffffff82c532a0 r dummy_irq_info_funcs -ffffffff82c532b0 r hpd_irq_info_funcs -ffffffff82c532c0 r hpd_rx_irq_info_funcs -ffffffff82c532d0 r pflip_irq_info_funcs -ffffffff82c532e0 r vupdate_irq_info_funcs -ffffffff82c532f0 r vblank_irq_info_funcs -ffffffff82c54000 r irq_service_funcs_dce120 -ffffffff82c54008 r dummy_irq_info_funcs -ffffffff82c54018 r hpd_irq_info_funcs -ffffffff82c54028 r hpd_rx_irq_info_funcs -ffffffff82c54038 r pflip_irq_info_funcs -ffffffff82c54048 r vupdate_irq_info_funcs -ffffffff82c54058 r vblank_irq_info_funcs -ffffffff82c54070 r irq_source_info_dce120 -ffffffff82c56000 r irq_service_funcs_dce80 -ffffffff82c56008 r dummy_irq_info_funcs -ffffffff82c56018 r hpd_irq_info_funcs -ffffffff82c56028 r hpd_rx_irq_info_funcs -ffffffff82c56038 r pflip_irq_info_funcs -ffffffff82c56048 r vupdate_irq_info_funcs -ffffffff82c56058 r vblank_irq_info_funcs -ffffffff82c56070 r irq_source_info_dce80 -ffffffff82c58000 r irq_service_funcs_dcn10 -ffffffff82c58008 r dummy_irq_info_funcs -ffffffff82c58018 r hpd_irq_info_funcs -ffffffff82c58028 r hpd_rx_irq_info_funcs -ffffffff82c58038 r pflip_irq_info_funcs -ffffffff82c58048 r vupdate_no_lock_irq_info_funcs -ffffffff82c58058 r vblank_irq_info_funcs -ffffffff82c58068 r vline0_irq_info_funcs -ffffffff82c58080 r irq_source_info_dcn10 -ffffffff82c5a000 r irq_service_funcs_dcn20 -ffffffff82c5a008 r dummy_irq_info_funcs -ffffffff82c5a018 r hpd_irq_info_funcs -ffffffff82c5a028 r hpd_rx_irq_info_funcs -ffffffff82c5a038 r pflip_irq_info_funcs -ffffffff82c5a048 r vupdate_no_lock_irq_info_funcs -ffffffff82c5a058 r vblank_irq_info_funcs -ffffffff82c5a068 r vline0_irq_info_funcs -ffffffff82c5a080 r irq_source_info_dcn20 -ffffffff82c5c000 r irq_service_funcs_dcn201 -ffffffff82c5c008 r dummy_irq_info_funcs -ffffffff82c5c018 r hpd_irq_info_funcs -ffffffff82c5c028 r hpd_rx_irq_info_funcs -ffffffff82c5c038 r pflip_irq_info_funcs -ffffffff82c5c048 r vupdate_no_lock_irq_info_funcs -ffffffff82c5c058 r vblank_irq_info_funcs -ffffffff82c5c068 r vline0_irq_info_funcs -ffffffff82c5c080 r irq_source_info_dcn201 -ffffffff82c5e000 r irq_source_info_dcn21 -ffffffff82c5f290 r irq_service_funcs_dcn21 -ffffffff82c5f298 r dummy_irq_info_funcs -ffffffff82c5f2a8 r hpd_irq_info_funcs -ffffffff82c5f2b8 r hpd_rx_irq_info_funcs -ffffffff82c5f2c8 r pflip_irq_info_funcs -ffffffff82c5f2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c5f2e8 r vblank_irq_info_funcs -ffffffff82c5f2f8 r vline0_irq_info_funcs -ffffffff82c5f308 r dmub_outbox_irq_info_funcs -ffffffff82c60000 r irq_source_info_dcn30 -ffffffff82c61290 r irq_service_funcs_dcn30 -ffffffff82c61298 r dummy_irq_info_funcs -ffffffff82c612a8 r hpd_irq_info_funcs -ffffffff82c612b8 r hpd_rx_irq_info_funcs -ffffffff82c612c8 r pflip_irq_info_funcs -ffffffff82c612d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c612e8 r vblank_irq_info_funcs -ffffffff82c612f8 r vline0_irq_info_funcs -ffffffff82c61308 r dmub_trace_irq_info_funcs -ffffffff82c62000 r irq_source_info_dcn302 -ffffffff82c63290 r irq_service_funcs_dcn302 -ffffffff82c63298 r dummy_irq_info_funcs -ffffffff82c632a8 r hpd_irq_info_funcs -ffffffff82c632b8 r hpd_rx_irq_info_funcs -ffffffff82c632c8 r pflip_irq_info_funcs -ffffffff82c632d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c632e8 r vblank_irq_info_funcs -ffffffff82c632f8 r vline0_irq_info_funcs -ffffffff82c63308 r dmub_trace_irq_info_funcs -ffffffff82c64000 r irq_service_funcs_dcn303 -ffffffff82c64008 r dummy_irq_info_funcs -ffffffff82c64018 r hpd_irq_info_funcs -ffffffff82c64028 r hpd_rx_irq_info_funcs -ffffffff82c64038 r pflip_irq_info_funcs -ffffffff82c64048 r vupdate_no_lock_irq_info_funcs -ffffffff82c64058 r vblank_irq_info_funcs -ffffffff82c64068 r vline0_irq_info_funcs -ffffffff82c64080 r irq_source_info_dcn303 -ffffffff82c66000 r irq_source_info_dcn31 -ffffffff82c67290 r irq_service_funcs_dcn31 -ffffffff82c67298 r dummy_irq_info_funcs -ffffffff82c672a8 r hpd_irq_info_funcs -ffffffff82c672b8 r hpd_rx_irq_info_funcs -ffffffff82c672c8 r pflip_irq_info_funcs -ffffffff82c672d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c672e8 r vblank_irq_info_funcs -ffffffff82c672f8 r vline0_irq_info_funcs -ffffffff82c67308 r outbox_irq_info_funcs -ffffffff82c68000 r irq_source_info_dcn314 -ffffffff82c69290 r irq_service_funcs_dcn314 -ffffffff82c69298 r dummy_irq_info_funcs -ffffffff82c692a8 r hpd_irq_info_funcs -ffffffff82c692b8 r hpd_rx_irq_info_funcs -ffffffff82c692c8 r pflip_irq_info_funcs -ffffffff82c692d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c692e8 r vblank_irq_info_funcs -ffffffff82c692f8 r vline0_irq_info_funcs -ffffffff82c69308 r outbox_irq_info_funcs -ffffffff82c6a000 r irq_source_info_dcn315 -ffffffff82c6b290 r irq_service_funcs_dcn315 -ffffffff82c6b298 r dummy_irq_info_funcs -ffffffff82c6b2a8 r hpd_irq_info_funcs -ffffffff82c6b2b8 r hpd_rx_irq_info_funcs -ffffffff82c6b2c8 r pflip_irq_info_funcs -ffffffff82c6b2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c6b2e8 r vblank_irq_info_funcs -ffffffff82c6b2f8 r vline0_irq_info_funcs -ffffffff82c6b308 r outbox_irq_info_funcs -ffffffff82c6c000 r irq_source_info_dcn32 -ffffffff82c6d290 r irq_service_funcs_dcn32 -ffffffff82c6d298 r dummy_irq_info_funcs -ffffffff82c6d2a8 r hpd_irq_info_funcs -ffffffff82c6d2b8 r hpd_rx_irq_info_funcs -ffffffff82c6d2c8 r pflip_irq_info_funcs -ffffffff82c6d2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c6d2e8 r vblank_irq_info_funcs -ffffffff82c6d2f8 r vline0_irq_info_funcs -ffffffff82c6d308 r outbox_irq_info_funcs -ffffffff82c6e000 r dio_link_hwss -ffffffff82c6f000 r dpia_link_hwss -ffffffff82c70000 r hpo_dp_link_hwss -ffffffff82c71000 r virtual_lnk_enc_funcs -ffffffff82c72000 r virtual_link_hwss -ffffffff82c73000 r virtual_str_enc_funcs -ffffffff82c74000 R dmub_srv_dcn20_regs -ffffffff82c75000 R dmub_srv_dcn21_regs -ffffffff82c76000 R dmub_srv_dcn30_regs -ffffffff82c77000 R dmub_srv_dcn301_regs -ffffffff82c78000 R dmub_srv_dcn302_regs -ffffffff82c79000 R dmub_srv_dcn303_regs -ffffffff82c7a000 R dmub_srv_dcn31_regs -ffffffff82c7b000 R dmub_srv_dcn315_regs -ffffffff82c7c000 R dmub_srv_dcn316_regs -ffffffff82c7d000 R dmub_srv_dcn32_regs -ffffffff82c7e000 r numerator01 -ffffffff82c7e020 r numerator02 -ffffffff82c7e040 r numerator04 -ffffffff82c7e060 r numerator05 -ffffffff82c80000 r abm_settings -ffffffff82c80010 r abm_settings_config0 -ffffffff82c80050 r abm_settings_config1 -ffffffff82c80088 r min_reduction_table_v_2_2 -ffffffff82c80095 r max_reduction_table_v_2_2 -ffffffff82c800a2 r min_reduction_table -ffffffff82c800af r max_reduction_table -ffffffff82c81000 R amdgpu_pp_profile_name -ffffffff82c82000 r pp_lib_thermal_controller_names -ffffffff82c83000 r pp_ip_funcs -ffffffff82c830a0 R pp_smu_ip_block -ffffffff82c830b8 r pp_dpm_funcs -ffffffff82c84000 r gpio_tbl -ffffffff82c840f0 r enable_fb_req_rej_tbl -ffffffff82c84140 r use_bclk_tbl -ffffffff82c84310 r turn_off_plls_tbl -ffffffff82c84640 r enter_baco_tbl -ffffffff82c84730 r exit_baco_tbl -ffffffff82c84850 r clean_baco_tbl +ffffffff82c51000 r funcs +ffffffff82c52000 r hdmi_14_protection +ffffffff82c52010 r dp_11_protection +ffffffff82c52020 r hdcp_i2c_offsets +ffffffff82c52050 r hdcp_dpcd_addrs +ffffffff82c53000 r irq_service_funcs_dce110 +ffffffff82c53010 r irq_source_info_dce110 +ffffffff82c542a0 r dummy_irq_info_funcs +ffffffff82c542b0 r hpd_irq_info_funcs +ffffffff82c542c0 r hpd_rx_irq_info_funcs +ffffffff82c542d0 r pflip_irq_info_funcs +ffffffff82c542e0 r vupdate_irq_info_funcs +ffffffff82c542f0 r vblank_irq_info_funcs +ffffffff82c55000 r irq_service_funcs_dce120 +ffffffff82c55008 r dummy_irq_info_funcs +ffffffff82c55018 r hpd_irq_info_funcs +ffffffff82c55028 r hpd_rx_irq_info_funcs +ffffffff82c55038 r pflip_irq_info_funcs +ffffffff82c55048 r vupdate_irq_info_funcs +ffffffff82c55058 r vblank_irq_info_funcs +ffffffff82c55070 r irq_source_info_dce120 +ffffffff82c57000 r irq_service_funcs_dce80 +ffffffff82c57008 r dummy_irq_info_funcs +ffffffff82c57018 r hpd_irq_info_funcs +ffffffff82c57028 r hpd_rx_irq_info_funcs +ffffffff82c57038 r pflip_irq_info_funcs +ffffffff82c57048 r vupdate_irq_info_funcs +ffffffff82c57058 r vblank_irq_info_funcs +ffffffff82c57070 r irq_source_info_dce80 +ffffffff82c59000 r irq_service_funcs_dcn10 +ffffffff82c59008 r dummy_irq_info_funcs +ffffffff82c59018 r hpd_irq_info_funcs +ffffffff82c59028 r hpd_rx_irq_info_funcs +ffffffff82c59038 r pflip_irq_info_funcs +ffffffff82c59048 r vupdate_no_lock_irq_info_funcs +ffffffff82c59058 r vblank_irq_info_funcs +ffffffff82c59068 r vline0_irq_info_funcs +ffffffff82c59080 r irq_source_info_dcn10 +ffffffff82c5b000 r irq_service_funcs_dcn20 +ffffffff82c5b008 r dummy_irq_info_funcs +ffffffff82c5b018 r hpd_irq_info_funcs +ffffffff82c5b028 r hpd_rx_irq_info_funcs +ffffffff82c5b038 r pflip_irq_info_funcs +ffffffff82c5b048 r vupdate_no_lock_irq_info_funcs +ffffffff82c5b058 r vblank_irq_info_funcs +ffffffff82c5b068 r vline0_irq_info_funcs +ffffffff82c5b080 r irq_source_info_dcn20 +ffffffff82c5d000 r irq_service_funcs_dcn201 +ffffffff82c5d008 r dummy_irq_info_funcs +ffffffff82c5d018 r hpd_irq_info_funcs +ffffffff82c5d028 r hpd_rx_irq_info_funcs +ffffffff82c5d038 r pflip_irq_info_funcs +ffffffff82c5d048 r vupdate_no_lock_irq_info_funcs +ffffffff82c5d058 r vblank_irq_info_funcs +ffffffff82c5d068 r vline0_irq_info_funcs +ffffffff82c5d080 r irq_source_info_dcn201 +ffffffff82c5f000 r irq_source_info_dcn21 +ffffffff82c60290 r irq_service_funcs_dcn21 +ffffffff82c60298 r dummy_irq_info_funcs +ffffffff82c602a8 r hpd_irq_info_funcs +ffffffff82c602b8 r hpd_rx_irq_info_funcs +ffffffff82c602c8 r pflip_irq_info_funcs +ffffffff82c602d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c602e8 r vblank_irq_info_funcs +ffffffff82c602f8 r vline0_irq_info_funcs +ffffffff82c60308 r dmub_outbox_irq_info_funcs +ffffffff82c61000 r irq_source_info_dcn30 +ffffffff82c62290 r irq_service_funcs_dcn30 +ffffffff82c62298 r dummy_irq_info_funcs +ffffffff82c622a8 r hpd_irq_info_funcs +ffffffff82c622b8 r hpd_rx_irq_info_funcs +ffffffff82c622c8 r pflip_irq_info_funcs +ffffffff82c622d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c622e8 r vblank_irq_info_funcs +ffffffff82c622f8 r vline0_irq_info_funcs +ffffffff82c62308 r dmub_trace_irq_info_funcs +ffffffff82c63000 r irq_source_info_dcn302 +ffffffff82c64290 r irq_service_funcs_dcn302 +ffffffff82c64298 r dummy_irq_info_funcs +ffffffff82c642a8 r hpd_irq_info_funcs +ffffffff82c642b8 r hpd_rx_irq_info_funcs +ffffffff82c642c8 r pflip_irq_info_funcs +ffffffff82c642d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c642e8 r vblank_irq_info_funcs +ffffffff82c642f8 r vline0_irq_info_funcs +ffffffff82c64308 r dmub_trace_irq_info_funcs +ffffffff82c65000 r irq_service_funcs_dcn303 +ffffffff82c65008 r dummy_irq_info_funcs +ffffffff82c65018 r hpd_irq_info_funcs +ffffffff82c65028 r hpd_rx_irq_info_funcs +ffffffff82c65038 r pflip_irq_info_funcs +ffffffff82c65048 r vupdate_no_lock_irq_info_funcs +ffffffff82c65058 r vblank_irq_info_funcs +ffffffff82c65068 r vline0_irq_info_funcs +ffffffff82c65080 r irq_source_info_dcn303 +ffffffff82c67000 r irq_source_info_dcn31 +ffffffff82c68290 r irq_service_funcs_dcn31 +ffffffff82c68298 r dummy_irq_info_funcs +ffffffff82c682a8 r hpd_irq_info_funcs +ffffffff82c682b8 r hpd_rx_irq_info_funcs +ffffffff82c682c8 r pflip_irq_info_funcs +ffffffff82c682d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c682e8 r vblank_irq_info_funcs +ffffffff82c682f8 r vline0_irq_info_funcs +ffffffff82c68308 r outbox_irq_info_funcs +ffffffff82c69000 r irq_source_info_dcn314 +ffffffff82c6a290 r irq_service_funcs_dcn314 +ffffffff82c6a298 r dummy_irq_info_funcs +ffffffff82c6a2a8 r hpd_irq_info_funcs +ffffffff82c6a2b8 r hpd_rx_irq_info_funcs +ffffffff82c6a2c8 r pflip_irq_info_funcs +ffffffff82c6a2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c6a2e8 r vblank_irq_info_funcs +ffffffff82c6a2f8 r vline0_irq_info_funcs +ffffffff82c6a308 r outbox_irq_info_funcs +ffffffff82c6b000 r irq_source_info_dcn315 +ffffffff82c6c290 r irq_service_funcs_dcn315 +ffffffff82c6c298 r dummy_irq_info_funcs +ffffffff82c6c2a8 r hpd_irq_info_funcs +ffffffff82c6c2b8 r hpd_rx_irq_info_funcs +ffffffff82c6c2c8 r pflip_irq_info_funcs +ffffffff82c6c2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c6c2e8 r vblank_irq_info_funcs +ffffffff82c6c2f8 r vline0_irq_info_funcs +ffffffff82c6c308 r outbox_irq_info_funcs +ffffffff82c6d000 r irq_source_info_dcn32 +ffffffff82c6e290 r irq_service_funcs_dcn32 +ffffffff82c6e298 r dummy_irq_info_funcs +ffffffff82c6e2a8 r hpd_irq_info_funcs +ffffffff82c6e2b8 r hpd_rx_irq_info_funcs +ffffffff82c6e2c8 r pflip_irq_info_funcs +ffffffff82c6e2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c6e2e8 r vblank_irq_info_funcs +ffffffff82c6e2f8 r vline0_irq_info_funcs +ffffffff82c6e308 r outbox_irq_info_funcs +ffffffff82c6f000 r dio_link_hwss +ffffffff82c70000 r dpia_link_hwss +ffffffff82c71000 r hpo_dp_link_hwss +ffffffff82c72000 r virtual_lnk_enc_funcs +ffffffff82c73000 r virtual_link_hwss +ffffffff82c74000 r virtual_str_enc_funcs +ffffffff82c75000 R dmub_srv_dcn20_regs +ffffffff82c76000 R dmub_srv_dcn21_regs +ffffffff82c77000 R dmub_srv_dcn30_regs +ffffffff82c78000 R dmub_srv_dcn301_regs +ffffffff82c79000 R dmub_srv_dcn302_regs +ffffffff82c7a000 R dmub_srv_dcn303_regs +ffffffff82c7b000 R dmub_srv_dcn31_regs +ffffffff82c7c000 R dmub_srv_dcn315_regs +ffffffff82c7d000 R dmub_srv_dcn316_regs +ffffffff82c7e000 R dmub_srv_dcn32_regs +ffffffff82c7f000 r numerator01 +ffffffff82c7f020 r numerator02 +ffffffff82c7f040 r numerator04 +ffffffff82c7f060 r numerator05 +ffffffff82c81000 r abm_settings +ffffffff82c81010 r abm_settings_config0 +ffffffff82c81050 r abm_settings_config1 +ffffffff82c81088 r min_reduction_table_v_2_2 +ffffffff82c81095 r max_reduction_table_v_2_2 +ffffffff82c810a2 r min_reduction_table +ffffffff82c810af r max_reduction_table +ffffffff82c82000 R amdgpu_pp_profile_name +ffffffff82c83000 r pp_lib_thermal_controller_names +ffffffff82c84000 r pp_ip_funcs +ffffffff82c840a0 R pp_smu_ip_block +ffffffff82c840b8 r pp_dpm_funcs ffffffff82c85000 r gpio_tbl ffffffff82c850f0 r enable_fb_req_rej_tbl ffffffff82c85140 r use_bclk_tbl -ffffffff82c852e0 r turn_off_plls_tbl -ffffffff82c85370 r clk_req_b_tbl -ffffffff82c85490 r enter_baco_tbl -ffffffff82c855b0 r exit_baco_tbl -ffffffff82c856d0 r clean_baco_tbl +ffffffff82c85310 r turn_off_plls_tbl +ffffffff82c85640 r enter_baco_tbl +ffffffff82c85730 r exit_baco_tbl +ffffffff82c85850 r clean_baco_tbl ffffffff82c86000 r gpio_tbl ffffffff82c860f0 r enable_fb_req_rej_tbl -ffffffff82c86140 r use_bclk_tbl_vg -ffffffff82c86200 r turn_off_plls_tbl_vg -ffffffff82c86350 r use_bclk_tbl -ffffffff82c86440 r turn_off_plls_tbl -ffffffff82c865f0 r clk_req_b_tbl -ffffffff82c86710 r enter_baco_tbl -ffffffff82c86830 r exit_baco_tbl -ffffffff82c86950 r clean_baco_tbl -ffffffff82c87000 r vega10_fuses_default -ffffffff82c96000 r pp_r600_encode_lanes -ffffffff82c97000 R pptable_v1_0_funcs -ffffffff82c98000 R pptable_funcs -ffffffff82c98020 r soft_dummy_pp_table -ffffffff82c99000 r smu10_hwmgr_funcs -ffffffff82c9a000 r smu7_hwmgr_funcs -ffffffff82c9a2f8 r smu7_irq_funcs -ffffffff82c9a310 r SMU7ThermalPolicy -ffffffff82c9b000 r GCCACConfig_Polaris10 -ffffffff82c9b1b0 r DIDTConfig_Polaris10 -ffffffff82c9ba50 r GCCACConfig_Polaris11 -ffffffff82c9bc00 r DIDTConfig_Polaris11_Kicker -ffffffff82c9c4a0 r DIDTConfig_Polaris11 -ffffffff82c9cd40 r DIDTConfig_Polaris12 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SMU7ThermalWithDelayPolicy -ffffffff82ca8340 r link_width -ffffffff82ca9000 R vega12_pptable_funcs -ffffffff82caa000 r clean_baco_tbl -ffffffff82cab000 r vega20_hwmgr_funcs -ffffffff82cab2f0 r SMU7ThermalWithDelayPolicy -ffffffff82cab340 r link_width -ffffffff82cac000 R vega20_pptable_funcs -ffffffff82cad000 R ci_smu_funcs -ffffffff82cad0e0 r defaults_hawaii_pro -ffffffff82cad12c r defaults_hawaii_xt -ffffffff82cad178 r defaults_saturn_xt -ffffffff82cad1c4 r defaults_bonaire_xt -ffffffff82cad210 r ci_program_jump_on_start.data -ffffffff82cae000 R fiji_smu_funcs -ffffffff82cae0e0 r avfs_graphics_level -ffffffff82cae240 r fiji_power_tune_data_set_array -ffffffff82cae246 r fiji_clock_stretch_amount_conversion -ffffffff82cae260 r fiji_clock_stretcher_ddt_table -ffffffff82caf000 R iceland_smu_funcs -ffffffff82caf0e0 r defaults_icelandxt -ffffffff82caf12c r defaults_icelandpro -ffffffff82caf178 r defaults_iceland -ffffffff82cb0000 R polaris10_smu_funcs -ffffffff82cb00e0 r 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wbsio_ca -ffffffff82d0e000 R schsio_ca -ffffffff82d0f000 R lm_isa_ca -ffffffff82d0f028 R lm_wbsio_ca -ffffffff82d10000 R it_sensors -ffffffff82d10110 R it_vrfact -ffffffff82d10140 R it_fan_regs -ffffffff82d10160 R it_fan_ext_regs -ffffffff82d10178 R it_ca -ffffffff82d11000 R abitkv_sensors -ffffffff82d11200 R abitaa_sensors -ffffffff82d11480 R abitav_sensors -ffffffff82d11700 R abitas_sensors -ffffffff82d11980 R abitax_sensors -ffffffff82d11bc0 R abitm4_sensors -ffffffff82d11e80 R abitan_sensors -ffffffff82d12120 R abital_sensors -ffffffff82d123a0 R abitaw_sensors -ffffffff82d12700 R abitni_sensors -ffffffff82d129a0 R abitat_sensors -ffffffff82d12cc0 R abitan2_sensors -ffffffff82d12f60 R abitab_sensors -ffffffff82d13220 R abitan3_sensors -ffffffff82d13500 R abitaw2_sensors -ffffffff82d13860 R abitat2_sensors -ffffffff82d13b60 R abitab2_sensors -ffffffff82d13ea0 R abitin_sensors -ffffffff82d141e0 R uguru_ca -ffffffff82d15000 R aps_ca -ffffffff82d16000 R wsdisplay_emul_ca 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pckbd_keydesc_dk -ffffffff82d215a0 r pckbd_keydesc_dk_nodead -ffffffff82d215b0 r pckbd_keydesc_it -ffffffff82d21640 r pckbd_keydesc_uk -ffffffff82d216e0 r pckbd_keydesc_jp -ffffffff82d21750 r pckbd_keydesc_sv -ffffffff82d21780 r pckbd_keydesc_sv_nodead -ffffffff82d21790 r pckbd_keydesc_no -ffffffff82d217c0 r pckbd_keydesc_no_nodead -ffffffff82d217d0 r pckbd_keydesc_us_declk -ffffffff82d21860 r pckbd_keydesc_us_dvorak -ffffffff82d21900 r pckbd_keydesc_us_colemak -ffffffff82d21948 r pckbd_keydesc_swapctrlcaps -ffffffff82d21960 r pckbd_keydesc_iopener -ffffffff82d219b0 r pckbd_keydesc_es -ffffffff82d21a50 r pckbd_keydesc_be -ffffffff82d21b10 r pckbd_keydesc_ru -ffffffff82d21c80 r pckbd_keydesc_ua -ffffffff82d21e10 r pckbd_keydesc_sg -ffffffff82d21ec0 r pckbd_keydesc_sg_nodead -ffffffff82d21ee0 r pckbd_keydesc_sf -ffffffff82d21f00 r pckbd_keydesc_pt -ffffffff82d21f90 r pckbd_keydesc_lt -ffffffff82d22070 r pckbd_keydesc_la -ffffffff82d22100 r pckbd_keydesc_br -ffffffff82d22180 r pckbd_keydesc_tr -ffffffff82d22230 r pckbd_keydesc_tr_nodead -ffffffff82d22250 r pckbd_keydesc_pl -ffffffff82d222b0 r pckbd_keydesc_hu -ffffffff82d223c0 r pckbd_keydesc_si -ffffffff82d224d0 r pckbd_keydesc_cf -ffffffff82d225a0 r pckbd_keydesc_cf_nodead -ffffffff82d225c0 r pckbd_keydesc_lv -ffffffff82d22640 r pckbd_keydesc_nl -ffffffff82d22720 r pckbd_keydesc_nl_nodead -ffffffff82d22740 r pckbd_keydesc_is -ffffffff82d227cc r pckbd_keydesc_is_nodead -ffffffff82d227e0 r pckbd_keydesc_ee -ffffffff82d22890 r pckbd_keydesc_ee_nodead -ffffffff82d228b0 R pckbd_keydesctab -ffffffff82d23000 R pms_ca -ffffffff82d23028 R pms_accessops -ffffffff82d23040 R pms_sec_accessops -ffffffff82d23060 R pms_protocols -ffffffff82d231e0 r alps_models -ffffffff82d24000 R skgpio_led_offset -ffffffff82d24008 R skgpio_ca -ffffffff82d25000 R hidkbd_trtab -ffffffff82d25100 r apple_fn_trans -ffffffff82d25120 r apple_tb_trans -ffffffff82d25140 r apple_mba_trans -ffffffff82d26000 r hidcc_attach_wskbd.accessops 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udl_devs -ffffffff82d3c0b0 r udl_modes -ffffffff82d3d000 R umidi_hw_if -ffffffff82d3d030 R umidi_ca -ffffffff82d3d060 r umidi_evlen -ffffffff82d3d080 r packet_length -ffffffff82d3e000 r quirk_name -ffffffff82d3f000 R ucom_ca -ffffffff82d40000 R ugen_ca -ffffffff82d40028 R ugenread_intr_filtops -ffffffff82d40058 R ugenread_isoc_filtops -ffffffff82d41000 R uhidev_ca -ffffffff82d41030 r uhid_graphire_report_descr -ffffffff82d410b0 r uhid_graphire3_4x5_report_descr -ffffffff82d41160 r uhid_xb360gp_report_descr -ffffffff82d41210 r uhid_xbonegp_report_descr -ffffffff82d42000 R uhid_ca -ffffffff82d42028 R uhidread_filtops -ffffffff82d43000 R fido_ca -ffffffff82d44000 R ujoy_ca -ffffffff82d45000 r ukbd_keydesc_us -ffffffff82d45290 r ukbd_keydesc_de -ffffffff82d45340 r ukbd_keydesc_de_nodead -ffffffff82d45360 r ukbd_keydesc_fr -ffffffff82d45420 r ukbd_keydesc_fr_apple -ffffffff82d45560 r ukbd_keydesc_fr_dvorak_bepo -ffffffff82d456a0 r ukbd_keydesc_dk -ffffffff82d45740 r ukbd_keydesc_dk_nodead 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wi_cd -ffffffff830e2020 D wi_func_io -ffffffff830e3000 D an_cd -ffffffff830e4000 D xl_cd -ffffffff830e5000 D fxp_int_delay -ffffffff830e5004 D fxp_bundle_max -ffffffff830e5008 D fxp_min_size_mask -ffffffff830e5010 D fxp_cd -ffffffff830e5030 d tx_threshold -ffffffff830e5040 d fxp_cb_config_template -ffffffff830e6000 D rl_cd -ffffffff830e7000 D re_cd -ffffffff830e8000 D dc_cd -ffffffff830e9000 D smc91cxx_idstrs -ffffffff830e9080 D sm_cd -ffffffff830ea000 D epic_cd -ffffffff830eb000 D ne_cd -ffffffff830eb020 d ne2000_detect.test_pattern -ffffffff830ec000 D gem_cd -ffffffff830ed000 D ti_cd -ffffffff830ee000 D com_cd -ffffffff830ee020 D comdefaultrate -ffffffff830ee024 D comconsrate -ffffffff830ee028 D comconscflag -ffffffff830ee030 d comcnattach.comcons -ffffffff830ef000 D pckbc_slot_names -ffffffff830ef010 D pckbc_cd -ffffffff830f0000 D ac97civ -ffffffff830f1000 D cy_cd -ffffffff830f2000 D lpt_cd -ffffffff830f3000 D lm_cd -ffffffff830f4000 D ath_dwelltime -ffffffff830f4004 D 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iosf_lock -ffffffff83100030 d iosf_mbi_mtx -ffffffff83101000 D uhci_cd -ffffffff83102000 D ohci_cd -ffffffff83103000 D ehci_cd -ffffffff83104000 D xhci_cd -ffffffff83105000 D ccp_cd -ffffffff83106000 D sdhc_functions -ffffffff83106068 D sdhc_cd -ffffffff83107000 D rtsx_functions -ffffffff83107068 D rtsx_cd -ffffffff83108000 D radio_cd -ffffffff83109000 D kcs_if -ffffffff83109040 D smic_if -ffffffff83109080 D bt_if -ffffffff831090c0 D ipmi_cd -ffffffff831090e0 D maxsdrlen -ffffffff8310a000 D vscsi_cd -ffffffff8310b000 D mpath_cd -ffffffff8310c000 D softraid_cd -ffffffff8310c020 D smd -ffffffff8310d000 D spdmem_cd -ffffffff8310e000 D dwiic_cd -ffffffff8310f000 D kstat_lock -ffffffff8310f010 D kstat_next_id -ffffffff8310f018 D kstat_default_lock -ffffffff83110000 D pf_hdr_limit -ffffffff83110008 D pf_purge_task -ffffffff83110038 D pf_purge_to -ffffffff83110080 D pf_pool_limits -ffffffff831100f0 D pf_state_list -ffffffff83111000 D pf_tags -ffffffff83111010 D pf_qids -ffffffff83111020 D pf_lock -ffffffff83111030 D pf_state_lock -ffffffff83111040 D pfioctl_rw -ffffffff83112000 D pfi_update -ffffffff83113000 D pflog_cloner -ffffffff83114000 D pfsync_qs -ffffffff83114078 D pfsync_cloner -ffffffff831140a8 d pfsync_task -ffffffff83115000 D pflow_cloner -ffffffff83116000 D pppoe_cloner -ffffffff83116030 D pppoediscinq -ffffffff83116060 D pppoeinq -ffffffff83117000 D dt_lock -ffffffff83118000 D dt_prov_profile -ffffffff83118030 D dt_prov_interval -ffffffff83119000 D dtps_nsysent -ffffffff83119008 D dt_prov_syscall -ffffffff8311a000 D dt_prov_static -ffffffff8311a030 D dt_static_sched_dequeue -ffffffff8311a0a0 D dt_static_sched_enqueue -ffffffff8311a110 D dt_static_sched_off__cpu -ffffffff8311a180 D dt_static_sched_on__cpu -ffffffff8311a1f0 D dt_static_sched_remain__cpu -ffffffff8311a260 D dt_static_sched_sleep -ffffffff8311a2d0 D dt_static_sched_wakeup -ffffffff8311a340 D dt_static_raw_syscalls_sys_enter -ffffffff8311a3b0 D dt_static_raw_syscalls_sys_exit -ffffffff8311a420 D dt_static_uvm_fault -ffffffff8311a490 D dt_static_uvm_map_insert -ffffffff8311a500 D dt_static_uvm_map_remove -ffffffff8311a570 D dt_static_uvm_malloc -ffffffff8311a5e0 D dt_static_uvm_free -ffffffff8311a650 D dt_static_uvm_pool_get -ffffffff8311a6c0 D dt_static_uvm_pool_put -ffffffff8311a730 D dt_static_vfs_bufcache_rel -ffffffff8311a7a0 D dt_static_vfs_bufcache_take -ffffffff8311a810 D dt_static_vfs_cleaner -ffffffff8311a880 D dt_static_vmm_guest_enter -ffffffff8311a8f0 D dt_static_vmm_guest_exit -ffffffff8311a960 D dt_static_vmm_inout -ffffffff8311a9d0 D dt_static_smr_call -ffffffff8311aa40 D dt_static_smr_called -ffffffff8311aab0 D dt_static_smr_barrier_enter -ffffffff8311ab20 D dt_static_smr_barrier_exit -ffffffff8311ab90 D dt_static_smr_wakeup -ffffffff8311ac00 D dt_static_smr_thread -ffffffff8311ac70 D dt_static_refcnt_none -ffffffff8311ace0 D dt_static_refcnt_ifaddr -ffffffff8311ad50 D dt_static_refcnt_inpcb -ffffffff8311adc0 D dt_static_refcnt_tdb -ffffffff8311b000 D db_next_free_breakpoint -ffffffff8311b008 D db_breakpoints_inserted -ffffffff8311c000 D db_ed_style -ffffffff8311d000 D db_examine_format -ffffffff8311d078 D db_print_format -ffffffff8311e000 D db_history_size -ffffffff8311e008 D db_history_curr -ffffffff8311e010 D db_history_last -ffffffff8311f000 D db_tab_stop_width -ffffffff8311f004 D db_max_line -ffffffff8311f008 D db_max_width -ffffffff8311f00c D db_radix -ffffffff83120000 D db_lastsym -ffffffff83120008 D db_maxoff -ffffffff83121000 D db_vars -ffffffff83121090 D db_evars -ffffffff83122000 D db_watchpoints_inserted -ffffffff83122008 D db_next_free_watchpoint -ffffffff83123000 D db_log -ffffffff83124000 D audio_cd -ffffffff83124020 D audio_lock -ffffffff83125000 D midi_cd -ffffffff83126000 D rnd_cold -ffffffff83126004 D rnd_slowextract -ffffffff83126008 D rnd_timeout -ffffffff83126050 D rndlock -ffffffff83126060 D rndreinit_timeout -ffffffff831260a8 D rnd_task -ffffffff83127000 D video_cd -ffffffff83128000 d rrip_table_analyze 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-ffffffff8313d088 d th0 -ffffffff8313d120 d th1 -ffffffff8313e000 D itimer_mtx -ffffffff8313e010 D ratecheck_mtx -ffffffff8313e020 D ppsratecheck_mtx -ffffffff8313e030 D resettodr_to -ffffffff8313e078 D resettodr_task -ffffffff8313f000 D timeout_mutex -ffffffff83140000 D wdog_auto -ffffffff83141000 D taskq_sys -ffffffff83141050 D taskq_sys_mp -ffffffff83142000 D ccpu -ffffffff83142004 D perflevel -ffffffff83142008 D perfpolicy -ffffffff83142010 D setperf_to -ffffffff83143000 D autoconf_attdet_mtx -ffffffff83143010 D msgs -ffffffff83144000 d evcount_list -ffffffff83144010 d evcount_percpu_init_list -ffffffff83145000 D syslogf_rwlock -ffffffff83145010 D log_mtx -ffffffff83145020 D logstash_in -ffffffff83145028 D logstash_out -ffffffff83145030 D logstash_rwlock -ffffffff83146000 D pool_head -ffffffff83146010 D pool_lock -ffffffff83146020 D pool_debug -ffffffff83146028 D pool_allocator_single -ffffffff83146040 D pool_allocator_multi -ffffffff83146058 D pool_allocator_multi_ni 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m_extref_mtx -ffffffff8314e0c0 D m_pool_allocator -ffffffff8314f000 D somaxconn -ffffffff8314f004 D sominconn -ffffffff8314f008 D sosplice_lock -ffffffff83150000 D sb_max -ffffffff83151000 D unp_df_lock -ffffffff83151010 D unp_gc_lock -ffffffff83151020 D unp_rights_mtx -ffffffff83151030 D unp_ino_mtx -ffffffff83151040 D unp_gc_task -ffffffff83151070 D unpst_sendspace -ffffffff83151074 D unpst_recvspace -ffffffff83151078 D unpsq_sendspace -ffffffff8315107c D unpsq_recvspace -ffffffff83151080 D unpdg_sendspace -ffffffff83151084 D unpdg_recvspace -ffffffff83152000 D doingcache -ffffffff83153000 D maxvfsconf -ffffffff83153010 d vfsconflist -ffffffff83154000 D lockf_lock -ffffffff83154010 D maxlocksperuid -ffffffff83155000 D iftovt_tab -ffffffff83155040 D vttoif_tab -ffffffff83155064 D suid_clear -ffffffff83155068 D vnode_mtx -ffffffff83155078 D vfs_stall_lock -ffffffff83155090 D vtypes -ffffffff831550e0 D vtags -ffffffff83156000 D syncer_maxdelay -ffffffff83156004 D syncdelay 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ppp_cloner -ffffffff83163000 D ppp_pkt_init -ffffffff83164000 D ppp_bsd_compress -ffffffff83165000 D ppp_deflate -ffffffff83165070 D ppp_deflate_draft -ffffffff83166000 D tun_cloner -ffffffff83166030 D tap_cloner -ffffffff83167000 D bridgeintrq -ffffffff83167038 D bridge_cloner -ffffffff83168000 d veb_cloner -ffffffff83168030 d vport_cloner -ffffffff83169000 D vlan_tagh_lk -ffffffff83169010 D vlan_cloner -ffffffff83169040 D svlan_cloner -ffffffff8316a000 D pipex_list_mtx -ffffffff8316a010 D pipex_prune -ffffffff8316a018 D pipexoutq -ffffffff8316a050 d SHAPad2 -ffffffff8316b000 D rtmap_gc -ffffffff8316b018 D rt_rc -ffffffff8316c000 D rt_labels -ffffffff8316d000 D enc_cloner -ffffffff8316e000 D gre_cloner -ffffffff8316e030 D gre_list -ffffffff8316e040 D mgre_cloner -ffffffff8316e070 D egre_cloner -ffffffff8316e0a0 D nvgre_cloner -ffffffff8316e0d0 D eoip_cloner -ffffffff8316f000 D trunk_cloner -ffffffff83170000 d aggr_cloner -ffffffff83171000 d tpmr_cloner -ffffffff83172000 D mpe_cloner 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ipsendredirects -ffffffff83180004 D ip_defttl -ffffffff83180008 D ip_mtudisc -ffffffff8318000c D ip_mtudisc_timeout -ffffffff83180010 D ipq_mutex -ffffffff83180020 D ip_maxqueue -ffffffff83180028 D ipintrq -ffffffff83180060 d ipsend_task -ffffffff83180090 d ipsendraw_task -ffffffff83181000 D ip_mrtproto -ffffffff83181004 d sin -ffffffff83182000 D rip_sendspace -ffffffff83182008 D rip_recvspace -ffffffff83183000 D tcprexmtthresh -ffffffff83183004 D tcptv_keep_init -ffffffff83183008 D tcp_rst_ppslim -ffffffff8318300c D tcp_ackdrop_ppslim -ffffffff83183010 D tcp_syn_hash_size -ffffffff83183014 D tcp_syn_cache_limit -ffffffff83183018 D tcp_syn_bucket_limit -ffffffff8318301c D tcp_syn_use_limit -ffffffff83184000 D tcp_outflags -ffffffff83185000 D tcp_timer_mtx -ffffffff83185010 D tcp_mssdflt -ffffffff83185014 D tcp_rttdflt -ffffffff83185018 D tcp_do_rfc1323 -ffffffff8318501c D tcp_do_sack -ffffffff83185020 D tcp_do_rfc3390 -ffffffff83185024 D tcp_reass_limit -ffffffff83185028 D tcp_sackhole_limit -ffffffff83186000 D tcp_backoff -ffffffff83186034 D tcp_totbackoff -ffffffff83187000 D tcp_sendspace -ffffffff83187004 D tcp_recvspace -ffffffff83187008 D tcp_autorcvbuf_inc -ffffffff83188000 D udpcksum -ffffffff83188004 D udp_sendspace -ffffffff83188008 D udp_recvspace -ffffffff83189000 D ipsec_flows_mtx -ffffffff83189010 D ipsec_ids_idle -ffffffff83189014 D ipsec_ids_next_flow -ffffffff83189018 D ipsec_policy_head -ffffffff83189028 D ipsp_ids_gc_timeout -ffffffff83189070 D tdb_sadb_mtx -ffffffff83189080 d tdb_hashmask -ffffffff8318a000 D ipo_tdb_mtx -ffffffff8318a010 D ipsec_acquire_mtx -ffffffff8318a020 D ipsec_acquire_head -ffffffff8318b000 D ipsec_keep_invalid -ffffffff8318b004 D ipsec_require_pfs -ffffffff8318b008 D ipsec_soft_timeout -ffffffff8318b00c D ipsec_exp_timeout -ffffffff8318b010 D ipsec_soft_first_use -ffffffff8318b014 D ipsec_exp_first_use -ffffffff8318b018 D ipsec_expire_acquire -ffffffff8318b01c D esp_enable -ffffffff8318b020 D ah_enable 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r soft_dummy_pp_table +ffffffff82c9a000 r smu10_hwmgr_funcs +ffffffff82c9b000 r smu7_hwmgr_funcs +ffffffff82c9b2f8 r smu7_irq_funcs +ffffffff82c9b310 r SMU7ThermalPolicy +ffffffff82c9c000 r GCCACConfig_Polaris10 +ffffffff82c9c1b0 r DIDTConfig_Polaris10 +ffffffff82c9ca50 r GCCACConfig_Polaris11 +ffffffff82c9cc00 r DIDTConfig_Polaris11_Kicker +ffffffff82c9d4a0 r DIDTConfig_Polaris11 +ffffffff82c9dd40 r DIDTConfig_Polaris12 +ffffffff82c9e5e0 r GCCACConfig_VegaM +ffffffff82c9e790 r DIDTConfig_VegaM +ffffffff82ca0000 r smu8_hwmgr_funcs +ffffffff82ca02f0 r SMU7ThermalPolicy +ffffffff82ca1000 r smu9_irq_funcs +ffffffff82ca2000 r gpio_tbl_iceland +ffffffff82ca2060 r gpio_tbl +ffffffff82ca2150 r enable_fb_req_rej_tbl +ffffffff82ca21a0 r use_bclk_tbl +ffffffff82ca2370 r turn_off_plls_tbl +ffffffff82ca2610 r enter_baco_tbl +ffffffff82ca2730 r exit_baco_tbl_iceland +ffffffff82ca2870 r clean_baco_tbl_iceland +ffffffff82ca2890 r exit_baco_tbl +ffffffff82ca29b0 r clean_baco_tbl +ffffffff82ca3000 r pre_baco_tbl +ffffffff82ca3090 r enter_baco_tbl +ffffffff82ca32b0 r exit_baco_tbl +ffffffff82ca3520 r clean_baco_tbl +ffffffff82ca4000 r vega10_hwmgr_funcs +ffffffff82ca42f0 r channel_number +ffffffff82ca4320 r SMU7ThermalWithDelayPolicy +ffffffff82ca5000 r SEDiDtStallCtrlConfig_vega10 +ffffffff82ca5110 r SEDiDtStallPatternConfig_vega10 +ffffffff82ca52e0 r SEDiDtWeightConfig_Vega10 +ffffffff82ca53b0 r SEDiDtCtrl1Config_Vega10 +ffffffff82ca5440 r SEDiDtCtrl2Config_Vega10 +ffffffff82ca5510 r SEDiDtCtrl3Config_vega10 +ffffffff82ca5820 r SEDiDtTuningCtrlConfig_Vega10 +ffffffff82ca58b0 r SELCacConfig_Vega10 +ffffffff82ca5a40 r SEDiDtCtrl0Config_Vega10 +ffffffff82ca5d10 r AvfsPSMInitConfig_vega10 +ffffffff82ca5d90 r SEEDCStallPatternConfig_Vega10 +ffffffff82ca5ea0 r SEEDCStallDelayConfig_Vega10 +ffffffff82ca5f80 r SEEDCCtrlConfig_Vega10 +ffffffff82ca6040 r PSMSEEDCStallPatternConfig_Vega10 +ffffffff82ca60c0 r PSMSEEDCStallDelayConfig_Vega10 +ffffffff82ca61d0 r PSMSEEDCCtrlResetConfig_Vega10 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tonga_smu_funcs +ffffffff82cbf0e0 r tonga_power_tune_data_set_array +ffffffff82cbf12c r tonga_clock_stretch_amount_conversion +ffffffff82cbf140 r tonga_clock_stretcher_ddt_table +ffffffff82cc0000 R vega10_smu_funcs +ffffffff82cc1000 R vega12_smu_funcs +ffffffff82cc2000 R vega20_smu_funcs +ffffffff82cc3000 R vegam_smu_funcs +ffffffff82cc30e0 r vegam_power_tune_data_set_array +ffffffff82cc3130 r Range_Table +ffffffff82cc4000 R smu_ip_funcs +ffffffff82cc40a0 R smu_v11_0_ip_block +ffffffff82cc40b8 R smu_v12_0_ip_block +ffffffff82cc40d0 R smu_v13_0_ip_block +ffffffff82cc40e8 r swsmu_pm_funcs +ffffffff82cc5000 r arcturus_table_map +ffffffff82cc5080 r arcturus_pwr_src_map +ffffffff82cc5090 r arcturus_workload_map +ffffffff82cc50d0 r arcturus_ppt_funcs +ffffffff82cc54a0 r smu11_thermal_policy +ffffffff82cc54f0 r arcturus_i2c_algo +ffffffff82cc5500 r arcturus_i2c_control_quirks +ffffffff82cc5510 r arcturus_throttler_map +ffffffff82cc5530 r arcturus_message_map +ffffffff82cc5f80 r arcturus_clk_map +ffffffff82cc6040 r arcturus_feature_mask_map +ffffffff82cc7000 r cyan_skillfish_ppt_funcs +ffffffff82cc8000 r navi10_ppt_funcs +ffffffff82cc83d0 r smu11_thermal_policy +ffffffff82cc8420 r navi10_i2c_algo +ffffffff82cc8430 r navi10_i2c_control_quirks +ffffffff82cc8440 r navi1x_throttler_map +ffffffff82cc8460 r NoDbiPrbs7 +ffffffff82cc9460 r DbiPrbs7 +ffffffff82ccb000 r sienna_cichlid_ppt_funcs +ffffffff82ccb3d0 r smu11_thermal_policy +ffffffff82ccb420 r sienna_cichlid_i2c_algo +ffffffff82ccb430 r sienna_cichlid_i2c_control_quirks +ffffffff82ccb440 r sienna_cichlid_throttler_map +ffffffff82ccc000 r smu_v11_0_irq_funcs +ffffffff82ccc010 r link_width +ffffffff82ccd000 r vangogh_ppt_funcs +ffffffff82ccd3d0 r vangogh_throttler_map +ffffffff82cce000 r renoir_ppt_funcs +ffffffff82cce3d0 r renoir_throttler_map +ffffffff82ccf000 r aldebaran_clk_map +ffffffff82ccf0c0 r aldebaran_table_map +ffffffff82ccf140 r aldebaran_ppt_funcs +ffffffff82ccf510 r smu13_thermal_policy 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+ffffffff82cdc000 R com_cardbus_ca +ffffffff82cdd000 R xl_cardbus_ca +ffffffff82cdd030 R xl_cardbus_products +ffffffff82cde000 R dc_cardbus_ca +ffffffff82cde030 R dc_cardbus_devices +ffffffff82cdf000 R fxp_cardbus_ca +ffffffff82cdf028 R fxp_cardbus_devices +ffffffff82ce0000 R rl_cardbus_devices +ffffffff82ce0028 R rl_cardbus_ca +ffffffff82ce1000 R re_cardbus_ca +ffffffff82ce1028 R re_cardbus_devices +ffffffff82ce2000 R ath_cardbus_ca +ffffffff82ce3000 R athn_cardbus_ca +ffffffff82ce3030 r athn_cardbus_devices +ffffffff82ce4000 R atw_cardbus_ca +ffffffff82ce4028 R atw_cardbus_devices +ffffffff82ce5000 R rtw_cardbus_ca +ffffffff82ce5028 R rtw_cardbus_devices +ffffffff82ce6000 R ral_cardbus_ca +ffffffff82ce6030 r ral_cardbus_devices +ffffffff82ce7000 R acx_cardbus_ca +ffffffff82ce7028 r acx_cardbus_devices +ffffffff82ce8000 R pgt_cardbus_ca +ffffffff82ce8028 R pgt_cardbus_devices +ffffffff82ce9000 R ehci_cardbus_ca +ffffffff82cea000 R ohci_cardbus_ca +ffffffff82ceb000 R uhci_cardbus_ca +ffffffff82cec000 R malo_cardbus_ca +ffffffff82cec028 r malo_cardbus_devices +ffffffff82ced000 R bwi_cardbus_ca +ffffffff82ced030 r bwi_cardbus_devices +ffffffff82cee000 R pcmcia_ca +ffffffff82cef000 r pcmcia_parse_cis_tuple.init_cfe +ffffffff82cf0000 r pcmcia_cis_quirks +ffffffff82cf1000 R ep_pcmcia_ca +ffffffff82cf2000 R ne_pcmcia_ca +ffffffff82cf2030 R ne2000devs +ffffffff82cf4000 R aic_pcmcia_ca +ffffffff82cf5000 R com_pcmcia_ca +ffffffff82cf6000 R wdc_pcmcia_ca +ffffffff82cf7000 R sm_pcmcia_ca +ffffffff82cf8000 R xe_pcmcia_ca +ffffffff82cf9000 R wi_pcmcia_ca +ffffffff82cf9030 r wi_pcmcia_products +ffffffff82cfa000 R malo_pcmcia_ca +ffffffff82cfb000 R an_pcmcia_ca +ffffffff82cfc000 R pcib_ca +ffffffff82cfd000 R amdpcib_ca +ffffffff82cfd028 R amdpcib_devices +ffffffff82cfe000 R tcpcib_ca +ffffffff82cfe028 R tcpcib_devices +ffffffff82cff000 R aapic_ca +ffffffff82d00000 R hme_pci_ca +ffffffff82d00028 r hme_promhdr +ffffffff82d0002a r hme_promdat +ffffffff82d01000 R isa_ca +ffffffff82d02000 R isadma_ca +ffffffff82d03000 R fdc_ca +ffffffff82d04000 R fd_ca +ffffffff82d05000 R com_isa_ca +ffffffff82d06000 R pckbc_isa_ca +ffffffff82d07000 R vga_isa_ca +ffffffff82d08000 R wdc_isa_ca +ffffffff82d09000 R mpu_midi_hw_if +ffffffff82d0a000 R mpu_isa_ca +ffffffff82d0b000 R pcppi_ca +ffffffff82d0c000 R spkr_ca +ffffffff82d0c030 r pitchtab +ffffffff82d0d000 R lpt_isa_ca +ffffffff82d0e000 R wbsio_ca +ffffffff82d0f000 R schsio_ca +ffffffff82d10000 R lm_isa_ca +ffffffff82d10028 R lm_wbsio_ca +ffffffff82d11000 R it_sensors +ffffffff82d11110 R it_vrfact +ffffffff82d11140 R it_fan_regs +ffffffff82d11160 R it_fan_ext_regs +ffffffff82d11178 R it_ca +ffffffff82d12000 R abitkv_sensors +ffffffff82d12200 R abitaa_sensors +ffffffff82d12480 R abitav_sensors +ffffffff82d12700 R abitas_sensors +ffffffff82d12980 R abitax_sensors +ffffffff82d12bc0 R abitm4_sensors +ffffffff82d12e80 R abitan_sensors +ffffffff82d13120 R abital_sensors +ffffffff82d133a0 R abitaw_sensors +ffffffff82d13700 R abitni_sensors +ffffffff82d139a0 R abitat_sensors +ffffffff82d13cc0 R abitan2_sensors +ffffffff82d13f60 R abitab_sensors +ffffffff82d14220 R abitan3_sensors +ffffffff82d14500 R abitaw2_sensors +ffffffff82d14860 R abitat2_sensors +ffffffff82d14b60 R abitab2_sensors +ffffffff82d14ea0 R abitin_sensors +ffffffff82d151e0 R uguru_ca +ffffffff82d16000 R aps_ca +ffffffff82d17000 R wsdisplay_emul_ca +ffffffff82d17030 r charClass +ffffffff82d18000 r usl_syncops +ffffffff82d19000 R wsevent_filtops +ffffffff82d1a000 R wskbd_ca +ffffffff82d1b000 r latin1_to_upper +ffffffff82d1c000 R wsmouse_ca +ffffffff82d1d000 R cyrillic_to_koi8 +ffffffff82d1d060 R unicode_to_latin2 +ffffffff82d1d0e0 R unicode_to_latin7 +ffffffff82d1e000 R wsemul_vt100_ops +ffffffff82d1f000 r decspcgr2uni +ffffffff82d1f100 r dectech2uni +ffffffff82d1f200 r nrctable +ffffffff82d1f320 r nrcovlpos +ffffffff82d20000 r vt100_fkeys +ffffffff82d200c0 r vt100_pfkeys +ffffffff82d200e0 r vt100_numpad +ffffffff82d21000 R pckbd_ca +ffffffff82d21028 R pckbd_accessops +ffffffff82d21040 R pckbd_consops +ffffffff82d21060 R pckbd_keymapdata +ffffffff82d21070 R pckbd_xtbl +ffffffff82d21100 R pckbd_xtbl_ext +ffffffff82d22000 r pckbd_keydesc_us +ffffffff82d22250 r pckbd_keydesc_de +ffffffff82d222f0 r pckbd_keydesc_de_nodead +ffffffff82d22310 r pckbd_keydesc_fr +ffffffff82d223d0 r pckbd_keydesc_fr_dvorak_bepo +ffffffff82d22510 r pckbd_keydesc_dk +ffffffff82d225a0 r pckbd_keydesc_dk_nodead +ffffffff82d225b0 r pckbd_keydesc_it +ffffffff82d22640 r pckbd_keydesc_uk +ffffffff82d226e0 r pckbd_keydesc_jp +ffffffff82d22750 r pckbd_keydesc_sv +ffffffff82d22780 r pckbd_keydesc_sv_nodead +ffffffff82d22790 r pckbd_keydesc_no +ffffffff82d227c0 r pckbd_keydesc_no_nodead +ffffffff82d227d0 r pckbd_keydesc_us_declk +ffffffff82d22860 r pckbd_keydesc_us_dvorak +ffffffff82d22900 r pckbd_keydesc_us_colemak +ffffffff82d22948 r pckbd_keydesc_swapctrlcaps +ffffffff82d22960 r pckbd_keydesc_iopener +ffffffff82d229b0 r pckbd_keydesc_es +ffffffff82d22a50 r pckbd_keydesc_be +ffffffff82d22b10 r pckbd_keydesc_ru +ffffffff82d22c80 r pckbd_keydesc_ua +ffffffff82d22e10 r pckbd_keydesc_sg +ffffffff82d22ec0 r pckbd_keydesc_sg_nodead +ffffffff82d22ee0 r pckbd_keydesc_sf +ffffffff82d22f00 r pckbd_keydesc_pt +ffffffff82d22f90 r pckbd_keydesc_lt +ffffffff82d23070 r pckbd_keydesc_la +ffffffff82d23100 r pckbd_keydesc_br +ffffffff82d23180 r pckbd_keydesc_tr +ffffffff82d23230 r pckbd_keydesc_tr_nodead +ffffffff82d23250 r pckbd_keydesc_pl +ffffffff82d232b0 r pckbd_keydesc_hu +ffffffff82d233c0 r pckbd_keydesc_si +ffffffff82d234d0 r pckbd_keydesc_cf +ffffffff82d235a0 r pckbd_keydesc_cf_nodead +ffffffff82d235c0 r pckbd_keydesc_lv +ffffffff82d23640 r pckbd_keydesc_nl +ffffffff82d23720 r pckbd_keydesc_nl_nodead +ffffffff82d23740 r pckbd_keydesc_is +ffffffff82d237cc r pckbd_keydesc_is_nodead +ffffffff82d237e0 r pckbd_keydesc_ee +ffffffff82d23890 r pckbd_keydesc_ee_nodead +ffffffff82d238b0 R pckbd_keydesctab +ffffffff82d24000 R pms_ca +ffffffff82d24028 R pms_accessops +ffffffff82d24040 R pms_sec_accessops +ffffffff82d24060 R pms_protocols +ffffffff82d241e0 r alps_models +ffffffff82d25000 R skgpio_led_offset +ffffffff82d25008 R skgpio_ca +ffffffff82d26000 R hidkbd_trtab +ffffffff82d26100 r apple_fn_trans +ffffffff82d26120 r apple_tb_trans +ffffffff82d26140 r apple_mba_trans +ffffffff82d27000 r hidcc_attach_wskbd.accessops +ffffffff82d27020 r hidcc_keysyms +ffffffff82d28000 R usb_ca +ffffffff82d29000 R usb_known_products +ffffffff82d34f40 R usb_known_vendors +ffffffff82d37740 R usbd_error_strs +ffffffff82d38000 R usb_quirks +ffffffff82d38390 R usb_dev_quirks +ffffffff82d38398 R usbd_no_quirk +ffffffff82d39000 R uhub_ca +ffffffff82d39028 R uhub_uhub_ca +ffffffff82d3a000 R uaudio_ca +ffffffff82d3a028 R uaudio_hw_if +ffffffff82d3a0e0 R uaudio_rates +ffffffff82d3a120 r uaudio_clkname.names +ffffffff82d3a140 r uaudio_feature_addent.features +ffffffff82d3b000 R uvideo_ca +ffffffff82d3b028 R uvideo_hw_if +ffffffff82d3b100 R uvideo_devs +ffffffff82d3c000 r utvfu_select_norm.pal +ffffffff82d3c040 r utvfu_select_norm.ntsc +ffffffff82d3c080 r utvfu_setup_capture.setup +ffffffff82d3c180 r utvfu_audio_start_chip.setup +ffffffff82d3c1c8 r utvfu_audio_stop_chip.setup +ffffffff82d3c1d8 R utvfu_ca +ffffffff82d3c200 R utvfu_vid_hw_if +ffffffff82d3c2d0 R utvfu_au_hw_if +ffffffff82d3d000 R udl_ca +ffffffff82d3d030 r udl_devs +ffffffff82d3d0b0 r udl_modes +ffffffff82d3e000 R umidi_hw_if +ffffffff82d3e030 R umidi_ca +ffffffff82d3e060 r umidi_evlen +ffffffff82d3e080 r packet_length +ffffffff82d3f000 r quirk_name +ffffffff82d40000 R ucom_ca +ffffffff82d41000 R ugen_ca +ffffffff82d41028 R ugenread_intr_filtops +ffffffff82d41058 R ugenread_isoc_filtops +ffffffff82d42000 R uhidev_ca +ffffffff82d42030 r uhid_graphire_report_descr +ffffffff82d420b0 r uhid_graphire3_4x5_report_descr +ffffffff82d42160 r uhid_xb360gp_report_descr +ffffffff82d42210 r uhid_xbonegp_report_descr +ffffffff82d43000 R uhid_ca +ffffffff82d43028 R uhidread_filtops +ffffffff82d44000 R fido_ca +ffffffff82d45000 R ujoy_ca +ffffffff82d46000 r ukbd_keydesc_us +ffffffff82d46290 r ukbd_keydesc_de +ffffffff82d46340 r ukbd_keydesc_de_nodead +ffffffff82d46360 r ukbd_keydesc_fr +ffffffff82d46420 r ukbd_keydesc_fr_apple +ffffffff82d46560 r ukbd_keydesc_fr_dvorak_bepo +ffffffff82d466a0 r ukbd_keydesc_dk +ffffffff82d46740 r ukbd_keydesc_dk_nodead +ffffffff82d46750 r ukbd_keydesc_it +ffffffff82d467f0 r ukbd_keydesc_uk +ffffffff82d468a0 r ukbd_keydesc_jp +ffffffff82d46910 r ukbd_keydesc_sv +ffffffff82d46940 r ukbd_keydesc_sv_nodead +ffffffff82d46950 r ukbd_keydesc_no +ffffffff82d46980 r ukbd_keydesc_no_nodead +ffffffff82d46990 r ukbd_keydesc_us_dvorak +ffffffff82d46a30 r ukbd_keydesc_us_colemak +ffffffff82d46a78 r ukbd_keydesc_swapctrlcaps +ffffffff82d46a90 r ukbd_keydesc_iopener +ffffffff82d46ae0 r ukbd_keydesc_es +ffffffff82d46b80 r ukbd_keydesc_be +ffffffff82d46c40 r ukbd_keydesc_ru +ffffffff82d46db0 r ukbd_keydesc_ua +ffffffff82d46f50 r ukbd_keydesc_sg +ffffffff82d47010 r ukbd_keydesc_sg_nodead +ffffffff82d47030 r ukbd_keydesc_sf +ffffffff82d47050 r ukbd_keydesc_pt +ffffffff82d470e0 r ukbd_keydesc_pt_apple +ffffffff82d47100 r ukbd_keydesc_lt +ffffffff82d471e0 r ukbd_keydesc_la +ffffffff82d47280 r ukbd_keydesc_br +ffffffff82d47310 r ukbd_keydesc_tr +ffffffff82d473d0 r ukbd_keydesc_tr_nodead +ffffffff82d473f0 r ukbd_keydesc_pl +ffffffff82d47450 r ukbd_keydesc_hu +ffffffff82d47560 r ukbd_keydesc_si +ffffffff82d47680 r ukbd_keydesc_cf +ffffffff82d47760 r ukbd_keydesc_cf_nodead +ffffffff82d47780 r ukbd_keydesc_lv +ffffffff82d47800 r ukbd_keydesc_nl +ffffffff82d478e0 r ukbd_keydesc_nl_nodead +ffffffff82d47900 r ukbd_keydesc_is +ffffffff82d47994 r ukbd_keydesc_is_nodead +ffffffff82d479a0 r ukbd_keydesc_ee +ffffffff82d47a50 r ukbd_keydesc_ee_nodead +ffffffff82d47a70 R ukbd_keydesctab +ffffffff82d48000 R ukbd_countrylayout +ffffffff82d48090 R ukbd_consops +ffffffff82d480b0 R ukbd_accessops +ffffffff82d480c8 R ukbd_ca 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+ffffffff82d56030 R uoakrh_methods +ffffffff82d57000 R uoaklux_devs +ffffffff82d57008 R uoaklux_ca +ffffffff82d57030 R uoaklux_methods +ffffffff82d58000 R uoakv_devs +ffffffff82d58008 R uoakv_ca +ffffffff82d58030 R uoakv_methods +ffffffff82d59000 R uonerng_ca +ffffffff82d5a000 R urng_ca +ffffffff82d5a030 r urng_devs +ffffffff82d5b000 R udcf_ca +ffffffff82d5b028 r udcf_devs +ffffffff82d5c000 R umbg_ca +ffffffff82d5d000 R uvisor_methods +ffffffff82d5d040 R uvisor_ca +ffffffff82d5d070 r uvisor_devs +ffffffff82d5e000 R udsbr_hw_if +ffffffff82d5e028 R udsbr_ca +ffffffff82d5f000 R utwitch_devs +ffffffff82d5f008 R utwitch_ca +ffffffff82d60000 R aue_devs +ffffffff82d601b0 R aue_ca +ffffffff82d61000 R axe_devs +ffffffff82d610d0 R axe_ca +ffffffff82d62000 R axen_devs +ffffffff82d62020 R axen_ca +ffffffff82d63000 R smsc_ca +ffffffff82d63030 r smsc_devs +ffffffff82d64000 R cue_ca +ffffffff82d65000 R kue_devs +ffffffff82d65088 R kue_ca +ffffffff82d66000 R cdce_devs +ffffffff82d66048 R cdce_ca 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wdc_default_vtbl +ffffffff830cf000 D ahc_tailq +ffffffff830cf010 D ahc_chip_names +ffffffff830cf080 d ahc_phase_table +ffffffff830cf120 d ahc_syncrates +ffffffff830d0000 D ahc_cd +ffffffff830d1000 D ahd_tailq +ffffffff830d1010 D ahd_attach_to_HostRAID_controllers +ffffffff830d1020 D ahd_chip_names +ffffffff830d1040 d ahd_phase_table +ffffffff830d2000 D ahd_cd +ffffffff830d3000 D aic_cd +ffffffff830d4000 D adw_cd +ffffffff830d5000 D gdt_cd +ffffffff830d6000 D twe_cd +ffffffff830d7000 D ciss_cd +ffffffff830d8000 D ami_cd +ffffffff830d9000 D mfi_cd +ffffffff830da000 D qlwdebug +ffffffff830da008 D qlw_cd +ffffffff830db000 D qla_cd +ffffffff830dc000 D ahci_cd +ffffffff830dd000 D nvme_cd +ffffffff830de000 D mpi_cd +ffffffff830df000 D sili_error_test_inv_p +ffffffff830df004 D sili_error_restart_type +ffffffff830df008 D sili_cd +ffffffff830e0000 D esp_cd +ffffffff830e0020 D ncr53c9x_variant_names +ffffffff830e1000 D E_abs_script_sched_slot0_Used +ffffffff830e10a0 D E_abs_targ0_Used +ffffffff830e10dc D E_abs_msgin_Used +ffffffff830e10e8 D E_abs_lunsw_return_Used +ffffffff830e10f0 D E_abs_tag0_Used +ffffffff830e1130 D E_ldsa_abs_reselected_Used +ffffffff830e1134 D E_ldsa_abs_reselect_Used +ffffffff830e1138 D E_ldsa_abs_selected_Used +ffffffff830e113c D E_ldsa_abs_data_Used +ffffffff830e1140 D E_ldsa_abs_slot_Used +ffffffff830e1148 D siop_cd +ffffffff830e2000 D ep_isa_media +ffffffff830e2060 D ep_cd +ffffffff830e3000 D wi_cd +ffffffff830e3020 D wi_func_io +ffffffff830e4000 D an_cd +ffffffff830e5000 D xl_cd +ffffffff830e6000 D fxp_int_delay +ffffffff830e6004 D fxp_bundle_max +ffffffff830e6008 D fxp_min_size_mask +ffffffff830e6010 D fxp_cd +ffffffff830e6030 d tx_threshold +ffffffff830e6040 d fxp_cb_config_template +ffffffff830e7000 D rl_cd +ffffffff830e8000 D re_cd +ffffffff830e9000 D dc_cd +ffffffff830ea000 D smc91cxx_idstrs +ffffffff830ea080 D sm_cd +ffffffff830eb000 D epic_cd +ffffffff830ec000 D ne_cd +ffffffff830ec020 d ne2000_detect.test_pattern +ffffffff830ed000 D gem_cd +ffffffff830ee000 D ti_cd +ffffffff830ef000 D com_cd +ffffffff830ef020 D comdefaultrate +ffffffff830ef024 D comconsrate +ffffffff830ef028 D comconscflag +ffffffff830ef030 d comcnattach.comcons +ffffffff830f0000 D pckbc_slot_names +ffffffff830f0010 D pckbc_cd +ffffffff830f1000 D ac97civ +ffffffff830f2000 D cy_cd +ffffffff830f3000 D lpt_cd +ffffffff830f4000 D lm_cd +ffffffff830f5000 D ath_dwelltime +ffffffff830f5004 D ath_calinterval +ffffffff830f5008 D ath_outdoor +ffffffff830f500c D ath_xchanmode +ffffffff830f5010 D ath_softcrypto +ffffffff830f5018 D ath_cd +ffffffff830f6000 D athn_cd +ffffffff830f7000 D bwfm_2ghz_channels +ffffffff830f7010 D bwfm_5ghz_channels +ffffffff830f7030 D bwfm_proto_bcdc_ops +ffffffff830f7050 D bwfm_cd +ffffffff830f8000 D atw_bbp_io_enable_delay +ffffffff830f8004 D atw_bbp_io_disable_delay +ffffffff830f8008 D atw_writewep_delay +ffffffff830f800c D atw_beacon_len_adjust +ffffffff830f8010 D atw_dwelltime +ffffffff830f8018 D atw_cd +ffffffff830f9000 D rtw_dwelltime +ffffffff830f9004 D rtw_macbangbits_timeout +ffffffff830f9008 D rtw_cd +ffffffff830fa000 D ral_cd +ffffffff830fb000 D rt3090_freqs +ffffffff830fc000 D acx_beacon_intvl +ffffffff830fc008 D acx_cd +ffffffff830fd000 D pgt_cd +ffffffff830fe000 D sf_cd +ffffffff830ff000 D malo_cd +ffffffff83100000 D bwi_cd +ffffffff83100020 D bwi_constraint +ffffffff83100030 D bwi_pa_mode +ffffffff83101000 D iosf_cd +ffffffff83101020 d iosf_lock +ffffffff83101030 d iosf_mbi_mtx +ffffffff83102000 D uhci_cd +ffffffff83103000 D ohci_cd +ffffffff83104000 D ehci_cd +ffffffff83105000 D xhci_cd +ffffffff83106000 D ccp_cd +ffffffff83107000 D sdhc_functions +ffffffff83107068 D sdhc_cd +ffffffff83108000 D rtsx_functions +ffffffff83108068 D rtsx_cd +ffffffff83109000 D radio_cd +ffffffff8310a000 D kcs_if +ffffffff8310a040 D smic_if +ffffffff8310a080 D bt_if +ffffffff8310a0c0 D ipmi_cd +ffffffff8310a0e0 D maxsdrlen +ffffffff8310b000 D vscsi_cd +ffffffff8310c000 D mpath_cd +ffffffff8310d000 D softraid_cd +ffffffff8310d020 D smd +ffffffff8310e000 D spdmem_cd +ffffffff8310f000 D dwiic_cd +ffffffff83110000 D kstat_lock +ffffffff83110010 D kstat_next_id +ffffffff83110018 D kstat_default_lock +ffffffff83111000 D pf_hdr_limit +ffffffff83111008 D pf_purge_task +ffffffff83111038 D pf_purge_to +ffffffff83111080 D pf_pool_limits +ffffffff831110f0 D pf_state_list +ffffffff83112000 D pf_tags +ffffffff83112010 D pf_qids +ffffffff83112020 D pf_lock +ffffffff83112030 D pf_state_lock +ffffffff83112040 D pfioctl_rw +ffffffff83113000 D pfi_update +ffffffff83114000 D pflog_cloner +ffffffff83115000 D pfsync_qs +ffffffff83115078 D pfsync_cloner +ffffffff831150a8 d pfsync_task +ffffffff83116000 D pflow_cloner +ffffffff83117000 D pppoe_cloner +ffffffff83117030 D pppoediscinq +ffffffff83117060 D pppoeinq +ffffffff83118000 D dt_lock +ffffffff83119000 D dt_prov_profile +ffffffff83119030 D dt_prov_interval +ffffffff8311a000 D dtps_nsysent +ffffffff8311a008 D dt_prov_syscall +ffffffff8311b000 D dt_prov_static +ffffffff8311b030 D dt_static_sched_dequeue +ffffffff8311b0a0 D dt_static_sched_enqueue +ffffffff8311b110 D dt_static_sched_off__cpu +ffffffff8311b180 D dt_static_sched_on__cpu +ffffffff8311b1f0 D dt_static_sched_remain__cpu +ffffffff8311b260 D dt_static_sched_sleep +ffffffff8311b2d0 D dt_static_sched_wakeup +ffffffff8311b340 D dt_static_raw_syscalls_sys_enter +ffffffff8311b3b0 D dt_static_raw_syscalls_sys_exit +ffffffff8311b420 D dt_static_uvm_fault +ffffffff8311b490 D dt_static_uvm_map_insert +ffffffff8311b500 D dt_static_uvm_map_remove +ffffffff8311b570 D dt_static_uvm_malloc +ffffffff8311b5e0 D dt_static_uvm_free +ffffffff8311b650 D dt_static_uvm_pool_get +ffffffff8311b6c0 D dt_static_uvm_pool_put +ffffffff8311b730 D dt_static_vfs_bufcache_rel +ffffffff8311b7a0 D dt_static_vfs_bufcache_take +ffffffff8311b810 D dt_static_vfs_cleaner +ffffffff8311b880 D dt_static_vmm_guest_enter +ffffffff8311b8f0 D dt_static_vmm_guest_exit +ffffffff8311b960 D dt_static_vmm_inout +ffffffff8311b9d0 D dt_static_smr_call +ffffffff8311ba40 D dt_static_smr_called +ffffffff8311bab0 D dt_static_smr_barrier_enter +ffffffff8311bb20 D dt_static_smr_barrier_exit +ffffffff8311bb90 D dt_static_smr_wakeup +ffffffff8311bc00 D dt_static_smr_thread +ffffffff8311bc70 D dt_static_refcnt_none +ffffffff8311bce0 D dt_static_refcnt_ifaddr +ffffffff8311bd50 D dt_static_refcnt_inpcb +ffffffff8311bdc0 D dt_static_refcnt_tdb +ffffffff8311c000 D db_next_free_breakpoint +ffffffff8311c008 D db_breakpoints_inserted +ffffffff8311d000 D db_ed_style +ffffffff8311e000 D db_examine_format +ffffffff8311e078 D db_print_format +ffffffff8311f000 D db_history_size +ffffffff8311f008 D db_history_curr +ffffffff8311f010 D db_history_last +ffffffff83120000 D db_tab_stop_width +ffffffff83120004 D db_max_line +ffffffff83120008 D db_max_width +ffffffff8312000c D db_radix +ffffffff83121000 D db_lastsym +ffffffff83121008 D db_maxoff +ffffffff83122000 D db_vars +ffffffff83122090 D db_evars +ffffffff83123000 D db_watchpoints_inserted +ffffffff83123008 D db_next_free_watchpoint +ffffffff83124000 D db_log +ffffffff83125000 D audio_cd +ffffffff83125020 D audio_lock +ffffffff83126000 D midi_cd +ffffffff83127000 D rnd_cold +ffffffff83127004 D rnd_slowextract +ffffffff83127008 D rnd_timeout +ffffffff83127050 D rndlock +ffffffff83127060 D rndreinit_timeout +ffffffff831270a8 D rnd_task +ffffffff83128000 D video_cd +ffffffff83129000 d rrip_table_analyze +ffffffff831290e0 d rrip_table_getname +ffffffff831291e0 d rrip_table_getsymname +ffffffff83129280 d rrip_table_extref +ffffffff8312a000 D nexecs +ffffffff8312b000 D elf_note_names +ffffffff8312c000 D ncpus +ffffffff8312c004 D ncpusfound +ffffffff8312d000 D acct_lock +ffffffff8312d010 D acctsuspend +ffffffff8312d014 D acctresume +ffffffff8312d018 D acctrate +ffffffff8312e000 D ticks +ffffffff8312e008 D jiffies +ffffffff8312f000 D clockintr_mtx +ffffffff8312f010 D statclock_gen +ffffffff83130000 D fhdlk +ffffffff83131000 D kqueue_klist_lock +ffffffff83131010 D kq_timeoutmax +ffffffff83132000 D stackgap_random +ffffffff83133000 D nprocesses +ffffffff83133004 D nthreads +ffffffff83133008 D fork_tfmrate +ffffffff83134000 D kthread_q +ffffffff83135000 D malloc_mtx +ffffffff83135010 D memname +ffffffff831354a0 D sysctl_kmemlock +ffffffff831354b0 D malloc_errintvl +ffffffff83136000 D maxdmap +ffffffff83136008 D maxsmap +ffffffff83136010 D rlimit_lock +ffffffff83137000 D sched_cost_load +ffffffff83137004 D sched_cost_priority +ffffffff83137008 D sched_cost_runnable +ffffffff8313700c D sched_cost_resident +ffffffff83138000 D intrmap_lock +ffffffff83139000 D nosuidcoredump +ffffffff83139008 D sigio_lock +ffffffff8313a000 D smr_lock +ffffffff8313a010 D smr_logintvl +ffffffff8313b000 D startuphook_list +ffffffff8313c000 D sysctl_lock +ffffffff8313c010 D sysctl_disklock +ffffffff8313c020 d openbsd +ffffffff8313c024 d arg_max +ffffffff8313c028 d posix_version +ffffffff8313c02c d ngroups_max +ffffffff8313c030 d int_one +ffffffff8313c034 d maxpartitions +ffffffff8313c038 d raw_part +ffffffff8313c03c D allowpowerdown +ffffffff8313c040 D hw_power +ffffffff8313c044 d byte_order +ffffffff8313c048 d page_size +ffffffff8313d000 d thrsleep_queue +ffffffff8313d010 d thrsleep_lock +ffffffff8313e000 D tc_lock +ffffffff8313e010 D windup_mtx +ffffffff8313e020 D timecounter +ffffffff8313e028 D time_second +ffffffff8313e030 d timehands +ffffffff8313e038 d dummy_timecounter +ffffffff8313e088 d th0 +ffffffff8313e120 d th1 +ffffffff8313f000 D itimer_mtx +ffffffff8313f010 D ratecheck_mtx +ffffffff8313f020 D ppsratecheck_mtx +ffffffff8313f030 D resettodr_to +ffffffff8313f078 D resettodr_task +ffffffff83140000 D timeout_mutex +ffffffff83141000 D wdog_auto +ffffffff83142000 D taskq_sys +ffffffff83142050 D taskq_sys_mp +ffffffff83143000 D ccpu +ffffffff83143004 D perflevel +ffffffff83143008 D perfpolicy +ffffffff83143010 D setperf_to +ffffffff83144000 D autoconf_attdet_mtx +ffffffff83144010 D msgs +ffffffff83145000 d evcount_list +ffffffff83145010 d evcount_percpu_init_list +ffffffff83146000 D syslogf_rwlock +ffffffff83146010 D log_mtx +ffffffff83146020 D logstash_in +ffffffff83146028 D logstash_out +ffffffff83146030 D logstash_rwlock +ffffffff83147000 D pool_head +ffffffff83147010 D pool_lock +ffffffff83147020 D pool_debug +ffffffff83147028 D pool_allocator_single +ffffffff83147040 D pool_allocator_multi +ffffffff83147058 D pool_allocator_multi_ni +ffffffff83147070 D pool_gc_tick +ffffffff831470b8 D pool_gc_task +ffffffff83148000 D kprintf_mutex +ffffffff83148010 D db_panic +ffffffff83148014 D splassert_ctl +ffffffff83148018 D v_putc +ffffffff83148020 D printf_flags +ffffffff83149000 D userconf_base +ffffffff83149004 D userconf_maxdev +ffffffff83149008 D userconf_totdev +ffffffff8314900c D userconf_maxlocnames +ffffffff83149010 D userconf_cnt +ffffffff83149014 D userconf_lines +ffffffff83149018 D userconf_histsz +ffffffff83149020 D userconf_cmds +ffffffff8314a000 D ftlock +ffffffff8314b000 d ppollcollect.poll_errintvl +ffffffff8314c000 D ttydefchars +ffffffff8314c014 D ttclos +ffffffff8314c01b D ttopen +ffffffff8314c022 D ttybg +ffffffff8314c028 D ttyin +ffffffff8314c02e D ttyout +ffffffff8314c038 D ttylist_lock +ffffffff8314d000 D linesw +ffffffff8314d280 D nlinesw +ffffffff8314e000 D pt_softc_lock +ffffffff8314f000 d mbstat_boot_boot_cpumem +ffffffff8314f080 D mbstat +ffffffff8314f090 D mclsizes +ffffffff8314f0b0 D m_extref_mtx +ffffffff8314f0c0 D m_pool_allocator +ffffffff83150000 D somaxconn +ffffffff83150004 D sominconn +ffffffff83150008 D sosplice_lock +ffffffff83151000 D sb_max +ffffffff83152000 D unp_df_lock +ffffffff83152010 D unp_gc_lock +ffffffff83152020 D unp_rights_mtx +ffffffff83152030 D unp_ino_mtx +ffffffff83152040 D unp_gc_task +ffffffff83152070 D unpst_sendspace +ffffffff83152074 D unpst_recvspace +ffffffff83152078 D unpsq_sendspace +ffffffff8315207c D unpsq_recvspace +ffffffff83152080 D unpdg_sendspace +ffffffff83152084 D unpdg_recvspace +ffffffff83153000 D doingcache +ffffffff83154000 D maxvfsconf +ffffffff83154010 d vfsconflist +ffffffff83155000 D lockf_lock +ffffffff83155010 D maxlocksperuid +ffffffff83156000 D iftovt_tab +ffffffff83156040 D vttoif_tab +ffffffff83156064 D suid_clear +ffffffff83156068 D vnode_mtx +ffffffff83156078 D vfs_stall_lock +ffffffff83156090 D vtypes +ffffffff831560e0 D vtags +ffffffff83157000 D syncer_maxdelay +ffffffff83157004 D syncdelay +ffffffff83158000 D dosdirtemplate +ffffffff83159000 D ntfs_hashlock +ffffffff8315a000 D ntfs_toupper_lock +ffffffff8315b000 D art_table_gc_mtx +ffffffff8315b010 D art_table_gc_task +ffffffff8315b040 D art_node_gc_mtx +ffffffff8315b050 D art_node_gc_task +ffffffff8315c000 D bpf_bufsize +ffffffff8315c004 D bpf_maxbufsize +ffffffff8315c008 D bpf_sysctl_lk +ffffffff8315d000 D ifg_head +ffffffff8315d010 D if_cloners_lock +ffffffff8315d020 D if_input_task_locked +ffffffff8315d050 D netlock +ffffffff8315d060 D ifnetlist +ffffffff8315e000 D ifiq_maxlen_drop +ffffffff8315e004 D ifiq_maxlen_return +ffffffff8315f000 D etherbroadcastaddr +ffffffff8315f006 D ether_ipmulticast_min +ffffffff8315f00c D ether_ipmulticast_max +ffffffff8315f012 D ether_ip6multicast_min +ffffffff8315f018 D ether_ip6multicast_max +ffffffff83160000 D etherip_cloner +ffffffff83160030 D etherip_list +ffffffff83161000 D loop_cloner +ffffffff83162000 D ifmedia_mtx +ffffffff83163000 D ppp_compressors +ffffffff83163020 D ppp_cloner +ffffffff83164000 D ppp_pkt_init +ffffffff83165000 D ppp_bsd_compress +ffffffff83166000 D ppp_deflate +ffffffff83166070 D ppp_deflate_draft +ffffffff83167000 D tun_cloner +ffffffff83167030 D tap_cloner +ffffffff83168000 D bridgeintrq +ffffffff83168038 D bridge_cloner +ffffffff83169000 d veb_cloner +ffffffff83169030 d vport_cloner +ffffffff8316a000 D vlan_tagh_lk +ffffffff8316a010 D vlan_cloner +ffffffff8316a040 D svlan_cloner +ffffffff8316b000 D pipex_list_mtx +ffffffff8316b010 D pipex_prune +ffffffff8316b018 D pipexoutq +ffffffff8316b050 d SHAPad2 +ffffffff8316c000 D rtmap_gc +ffffffff8316c018 D rt_rc +ffffffff8316d000 D rt_labels +ffffffff8316e000 D enc_cloner +ffffffff8316f000 D gre_cloner +ffffffff8316f030 D gre_list +ffffffff8316f040 D mgre_cloner +ffffffff8316f070 D egre_cloner +ffffffff8316f0a0 D nvgre_cloner +ffffffff8316f0d0 D eoip_cloner +ffffffff83170000 D trunk_cloner +ffffffff83171000 d aggr_cloner +ffffffff83172000 d tpmr_cloner +ffffffff83173000 D mpe_cloner +ffffffff83174000 D mpw_cloner +ffffffff83175000 D mpip_cloner +ffffffff83176000 d bpe_cloner +ffffffff83176030 d bpe_lock +ffffffff83177000 D vether_cloner +ffffffff83178000 D pair_cloner +ffffffff83179000 d vxlan_cloner +ffffffff83179030 d vxlan_lock +ffffffff83179040 d vxlan_teps +ffffffff8317a000 D underload_interval +ffffffff8317a010 D wg_cloner +ffffffff8317b000 d stoeplitz_keyseed +ffffffff8317c000 D ieee80211_cache_size +ffffffff8317d000 D arpt_prune +ffffffff8317d004 D arpt_keep +ffffffff8317d008 D arpt_down +ffffffff8317d010 D arpinq +ffffffff8317d048 D arp_mtx +ffffffff8317d058 D arp_maxtries +ffffffff8317e000 D ipport_firstauto +ffffffff8317e004 D ipport_lastauto +ffffffff8317e008 D ipport_hifirstauto +ffffffff8317e00c D ipport_hilastauto +ffffffff8317f000 D divert_sendspace +ffffffff8317f004 D divert_recvspace +ffffffff8317f008 D divbhashsize +ffffffff83180000 D icmptstamprepl +ffffffff83180004 D icmperrppslim +ffffffff83180008 D icmp_redirtimeout +ffffffff83181000 D ipsendredirects +ffffffff83181004 D ip_defttl +ffffffff83181008 D ip_mtudisc +ffffffff8318100c D ip_mtudisc_timeout +ffffffff83181010 D ipq_mutex +ffffffff83181020 D ip_maxqueue +ffffffff83181028 D ipintrq +ffffffff83181060 d ipsend_task +ffffffff83181090 d ipsendraw_task +ffffffff83182000 D ip_mrtproto +ffffffff83182004 d sin +ffffffff83183000 D rip_sendspace +ffffffff83183008 D rip_recvspace +ffffffff83184000 D tcprexmtthresh +ffffffff83184004 D tcptv_keep_init +ffffffff83184008 D tcp_rst_ppslim +ffffffff8318400c D tcp_ackdrop_ppslim +ffffffff83184010 D tcp_syn_hash_size +ffffffff83184014 D tcp_syn_cache_limit +ffffffff83184018 D tcp_syn_bucket_limit +ffffffff8318401c D tcp_syn_use_limit +ffffffff83185000 D tcp_outflags +ffffffff83186000 D tcp_timer_mtx +ffffffff83186010 D tcp_mssdflt +ffffffff83186014 D tcp_rttdflt +ffffffff83186018 D tcp_do_rfc1323 +ffffffff8318601c D tcp_do_sack +ffffffff83186020 D tcp_do_rfc3390 +ffffffff83186024 D tcp_reass_limit +ffffffff83186028 D tcp_sackhole_limit +ffffffff83187000 D tcp_backoff +ffffffff83187034 D tcp_totbackoff +ffffffff83188000 D tcp_sendspace +ffffffff83188004 D tcp_recvspace +ffffffff83188008 D tcp_autorcvbuf_inc +ffffffff83189000 D udpcksum +ffffffff83189004 D udp_sendspace +ffffffff83189008 D udp_recvspace +ffffffff8318a000 D ipsec_flows_mtx +ffffffff8318a010 D ipsec_ids_idle +ffffffff8318a014 D ipsec_ids_next_flow +ffffffff8318a018 D ipsec_policy_head +ffffffff8318a028 D ipsp_ids_gc_timeout +ffffffff8318a070 D tdb_sadb_mtx +ffffffff8318a080 d tdb_hashmask +ffffffff8318b000 D ipo_tdb_mtx +ffffffff8318b010 D ipsec_acquire_mtx +ffffffff8318b020 D ipsec_acquire_head +ffffffff8318c000 D ipsec_keep_invalid +ffffffff8318c004 D ipsec_require_pfs +ffffffff8318c008 D ipsec_soft_timeout +ffffffff8318c00c D ipsec_exp_timeout +ffffffff8318c010 D ipsec_soft_first_use +ffffffff8318c014 D ipsec_exp_first_use +ffffffff8318c018 D ipsec_expire_acquire +ffffffff8318c01c D esp_enable +ffffffff8318c020 D ah_enable +ffffffff8318d000 D udpencap_enable +ffffffff8318d004 D udpencap_port +ffffffff8318e000 D carp_vh_rc +ffffffff8318e020 D carp_sc_rc +ffffffff8318e040 D carp_opts +ffffffff8318e058 D carp_cloner +ffffffff8318e088 d carp_send_na.mcast ffffffff8318f000 d PADDING -ffffffff83190000 d weak_keys -ffffffff83191000 D swcr_id -ffffffff83192000 D window_inflate -ffffffff83192004 D window_deflate -ffffffff83193000 D ghash_update -ffffffff83194000 D mpls_defttl -ffffffff83194004 D mpls_mapttl_ip -ffffffff83195000 D nfskevq_lock -ffffffff83196000 D nfs_backoff -ffffffff83196020 D nfs_ptimers -ffffffff83197000 D desirednfsrvcache -ffffffff83197010 D nonidempotent -ffffffff83197070 D nfsv2_repstat -ffffffff83198000 D nfsv2_type -ffffffff83198030 D nfsv3_type -ffffffff83198060 D nv2tov_type -ffffffff83198080 D nv3tov_type -ffffffff831980a0 D nfsv3_procid -ffffffff83198100 D nfsv2_procid -ffffffff8319815c d nfsv3err_getattr -ffffffff83198170 d nfsv3err_setattr -ffffffff83198190 d nfsv3err_lookup -ffffffff831981a4 d nfsv3err_access -ffffffff831981b0 d nfsv3err_readlink -ffffffff831981d0 d nfsv3err_read -ffffffff831981f0 d nfsv3err_write -ffffffff83198210 d nfsv3err_create -ffffffff83198230 d nfsv3err_mkdir -ffffffff83198250 d nfsv3err_symlink -ffffffff83198270 d nfsv3err_mknod -ffffffff83198290 d nfsv3err_remove -ffffffff831982b0 d nfsv3err_rmdir -ffffffff831982d0 d nfsv3err_rename -ffffffff83198300 d nfsv3err_link -ffffffff83198330 d nfsv3err_readdir -ffffffff83198350 d nfsv3err_readdirplus -ffffffff83198366 d nfsv3err_fsstat -ffffffff83198372 d nfsv3err_fsinfo -ffffffff8319837c d nfsv3err_pathconf -ffffffff83198386 d nfsv3err_commit -ffffffff83199000 D nfsrv3_procs -ffffffff831990b8 D nfs_niothreads -ffffffff8319a000 D fragtbl -ffffffff8319b000 D ffs_vtbl -ffffffff8319c000 D softdep_typenames -ffffffff8319c070 D tickdelay -ffffffff8319d000 D dirchk -ffffffff8319e000 D desireddquot -ffffffff8319f000 D amap_list_lock -ffffffff831a0000 d uao_list_lock -ffffffff831a1000 d uvmexp_countersboot_boot_cpumem -ffffffff831a10c0 D uvmexp_counters -ffffffff831a10c8 D vm_min_kernel_address -ffffffff831a2000 D no_constraint -ffffffff831a3000 d uvm_kmapent_warn_rate -ffffffff831a4000 D maxslp -ffffffff831a5000 D uvmpagerops -ffffffff831a6000 D uvm_swap_data_lock -ffffffff831a6010 D swap_syscall_lock -ffffffff831a6020 D oommtx -ffffffff831a7000 D uvm_doswapencrypt -ffffffff831a8000 D gif_list -ffffffff831a8010 D gif_cloner -ffffffff831a9000 D divert6_sendspace -ffffffff831a9004 D divert6_recvspace -ffffffff831a9008 D divb6hashsize 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nd6_umaxtries -ffffffff831b0018 D nd6_mmaxtries -ffffffff831b001c D nd6_gctimer -ffffffff831b0020 D nd6_maxndopt -ffffffff831b1000 d dadq -ffffffff831b2000 D pfkeyv2_mtx -ffffffff831b2010 d pfkeyv2_seq -ffffffff831b3000 D sadb_exts_allowed_in -ffffffff831b3090 D sadb_exts_required_in -ffffffff831b4000 D cold -ffffffff831b5000 D bdevsw -ffffffff831b5460 D nblkdev -ffffffff831b5470 D cdevsw -ffffffff831b7400 D nchrdev -ffffffff831b7404 D mem_no -ffffffff831b7408 D swapdev -ffffffff831b7410 D constab -ffffffff831b8000 D machine -ffffffff831b8008 D lid_action -ffffffff831b800c D pwr_action -ffffffff831b8010 D isa_constraint -ffffffff831b8020 D dma_constraint -ffffffff831b8030 D uvm_md_constraints -ffffffff831b8048 D delay_func -ffffffff831b8050 D initclock_func -ffffffff831b8058 D bootinfo_size -ffffffff831b805c D waittime -ffffffff831b8060 D dumpmag -ffffffff831b9000 D tsc_rdtsc -ffffffff831b9008 D tsc_timecounter -ffffffff831b9058 D tsc_is_synchronized -ffffffff831ba000 D local_apic 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db_regs -ffffffff831ca1e0 D db_eregs -ffffffff831ca1f0 D db_reg_args -ffffffff831cb000 D timer_mutex -ffffffff831cb010 d i8254_timecounter -ffffffff831cc000 D spleen8x16 -ffffffff831cc058 D spleen12x24 -ffffffff831cc0b0 D spleen16x32 -ffffffff831cc108 D spleen32x64 -ffffffff831cc160 d builtin_fonts -ffffffff831cc1e0 d wsfont_add.cookiegen -ffffffff831cc1f0 d spleen8x16_data -ffffffff831ccff0 d spleen12x24_data -ffffffff831cf9f0 d spleen16x32_data -ffffffff831d31f0 d spleen32x64_data -ffffffff831e2000 D nsphy_cd -ffffffff831e3000 D nsphyter_cd -ffffffff831e4000 D gentbi_cd -ffffffff831e5000 D qsphy_cd -ffffffff831e6000 D inphy_cd -ffffffff831e7000 D iophy_cd -ffffffff831e8000 D eephy_cd -ffffffff831e9000 D exphy_cd -ffffffff831ea000 D rlphy_cd -ffffffff831eb000 D lxtphy_cd -ffffffff831ec000 D luphy_cd -ffffffff831ed000 D mtdphy_cd -ffffffff831ee000 D icsphy_cd -ffffffff831ef000 D sqphy_cd -ffffffff831f0000 D tqphy_cd -ffffffff831f1000 D ukphy_cd -ffffffff831f2000 D dcphy_cd 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ak4358_dac -ffffffff83232128 D ak5365_adc -ffffffff83232150 D unkenvy_codec -ffffffff83232180 D envy_cards -ffffffff832323f0 D envy_cards_ht -ffffffff83232600 d julia_eeprom -ffffffff83233000 D emu_cd -ffffffff83234000 D auixp_cd -ffffffff83235000 D clcs_cd -ffffffff83236000 D yds_cd -ffffffff83237000 D auvia_cd -ffffffff83238000 D qle_cd -ffffffff83239000 D mpii_cd -ffffffff8323a000 D aq_cd -ffffffff8323b000 D de_cd -ffffffff8323c000 D pcn_cd -ffffffff8323d000 D wdc_sii3114_vtbl -ffffffff8323d038 D wdc_pdc203xx_vtbl -ffffffff8323d070 D wdc_svwsata_vtbl -ffffffff8323d0a8 D pciide_cd -ffffffff8323d0d0 d sis_hostbr_type -ffffffff8323e000 D ppb_cd -ffffffff8323f000 D vr_cd -ffffffff8323f020 D vr_devices -ffffffff83240000 D txp_cd -ffffffff83241000 D bt848_card_signature -ffffffff83242000 D bktr_cd -ffffffff83243000 D em_cd -ffffffff83244000 D ixgb_cd -ffffffff83245000 D ix_cd -ffffffff83245020 D ixgbe_smart_speed -ffffffff83245024 D ixgbe_enable_msix -ffffffff83246000 D ixl_cd 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D bnx_firmwares -ffffffff8325d160 D bnx_rv2ps -ffffffff8325d1c0 D bnx_cd -ffffffff8325d1e0 d flash_5709 -ffffffff8325d210 d flash_table -ffffffff8325e000 D vge_cd -ffffffff8325f000 D stge_cd -ffffffff83260000 D nfe_cd -ffffffff83261000 D et_cd -ffffffff83262000 D jme_cd -ffffffff83263000 D age_cd -ffffffff83264000 D alc_dma_burst -ffffffff83264020 D alc_cd -ffffffff83265000 D ale_cd -ffffffff83266000 D amdpm_cd -ffffffff83266020 d amdpm_timecounter -ffffffff83267000 D bce_cd -ffffffff83268000 D rtwn_cd -ffffffff83269000 d ral_rt2560_opns -ffffffff83269028 d ral_rt2661_opns -ffffffff83269050 d ral_rt2860_opns -ffffffff8326a000 D piixpm_cd -ffffffff8326b000 D vic_cd -ffffffff8326c000 D vmx_cd -ffffffff8326d000 D vmwpvs_cd -ffffffff8326e000 D lii_cd -ffffffff8326f000 D ichiic_cd -ffffffff83270000 D viapm_cd -ffffffff83270020 d viapm_timecounter -ffffffff83271000 D amdiic_cd -ffffffff83272000 D nviic_cd -ffffffff83273000 D kate_cd -ffffffff83274000 D km_cd -ffffffff83275000 D cpu_model_offsets -ffffffff83275070 D ksmn_cd -ffffffff83276000 D itherm_cd -ffffffff83277000 D pchtemp_cd -ffffffff83278000 D xspd_cd -ffffffff83279000 D virtio_pci_ops -ffffffff8327a000 D bwfm_pci_buscore_ops -ffffffff8327a030 D bwfm_pci_bus_ops -ffffffff8327a058 D bwfm_pci_msgbuf_ops -ffffffff8327b000 D bnxt_cd -ffffffff8327c000 D mcx_cd -ffffffff8327d000 D iavf_cd -ffffffff8327e000 D rge_cd -ffffffff8327f000 D igc_cd -ffffffff83280000 D ngbe_cd -ffffffff83281000 D agp_cd -ffffffff83282000 D intagp_cd -ffffffff83282020 D agp_i810_methods -ffffffff83283000 D reservation_ww_class -ffffffff83284000 d bridge_lock -ffffffff83284010 d bridge_list -ffffffff83285000 d drm_connector_enum_list -ffffffff832851f8 d connector_list_lock -ffffffff83285208 d connector_list -ffffffff83286000 d kernel_fb_helper_list -ffffffff83286010 d kernel_fb_helper_lock -ffffffff83287000 D drm_global_mutex -ffffffff83288000 D sch_mtx -ffffffff83288010 D i2c_bit_algo -ffffffff83288020 d drm_fence_context_count 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r600_cs_packet_parse_vline.vline_start_end -ffffffff83298008 d r600_cs_packet_parse_vline.vline_status -ffffffff83299000 d r100_asic -ffffffff832992e0 d r200_asic -ffffffff832995c0 d r300_asic_pcie -ffffffff832998a0 d r300_asic -ffffffff83299b80 d r420_asic -ffffffff83299e60 d rs400_asic -ffffffff8329a140 d rs600_asic -ffffffff8329a420 d rs690_asic -ffffffff8329a700 d rv515_asic -ffffffff8329a9e0 d r520_asic -ffffffff8329acc0 d r600_asic -ffffffff8329afa0 d rv6xx_asic -ffffffff8329b280 d rs780_asic -ffffffff8329b560 d rv770_asic -ffffffff8329b840 d evergreen_asic -ffffffff8329bb20 d sumo_asic -ffffffff8329be00 d btc_asic -ffffffff8329c0e0 d cayman_asic -ffffffff8329c3c0 d trinity_asic -ffffffff8329c6a0 d si_asic -ffffffff8329c980 d ci_asic -ffffffff8329cc60 d kv_asic -ffffffff8329d000 d dce6_funcs -ffffffff8329d018 d dce6_hdmi_funcs -ffffffff8329d088 d dce6_dp_funcs -ffffffff8329d0f8 d dce4_funcs -ffffffff8329d110 d dce4_hdmi_funcs -ffffffff8329d180 d dce4_dp_funcs -ffffffff8329d1f0 d dce32_funcs -ffffffff8329d208 d dce32_hdmi_funcs -ffffffff8329d278 d dce32_dp_funcs -ffffffff8329d2e8 d r600_funcs -ffffffff8329d300 d r600_hdmi_funcs -ffffffff8329e000 D radeon_modeset -ffffffff8329e004 D radeon_dynclks -ffffffff8329e008 D radeon_agpmode -ffffffff8329e00c D radeon_gart_size -ffffffff8329e010 D radeon_tv -ffffffff8329e014 D radeon_audio -ffffffff8329e018 D radeon_pcie_gen2 -ffffffff8329e01c D radeon_msi -ffffffff8329e020 D radeon_lockup_timeout -ffffffff8329e024 D radeon_dpm -ffffffff8329e028 D radeon_aspm -ffffffff8329e02c D radeon_runtime_pm -ffffffff8329e030 D radeon_vm_size -ffffffff8329e034 D radeon_vm_block_size -ffffffff8329e038 D radeon_use_pflipirq -ffffffff8329e03c D radeon_bapm -ffffffff8329e040 D radeon_backlight -ffffffff8329e044 D radeon_auxch -ffffffff8329e048 D radeon_uvd -ffffffff8329e04c D radeon_vce -ffffffff8329e050 D radeon_si_support -ffffffff8329e054 D radeon_cik_support -ffffffff8329e058 D radeondrm_cd -ffffffff8329e078 D radeondrm_stdscreen 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-ffffffff83568008 B mld6_timers_are_running -ffffffff83568010 b ip6_opts -ffffffff83569000 B nd6_maxnudhint -ffffffff83569004 B nd6_debug -ffffffff83569008 B nd6_list -ffffffff83569018 B nd6_pool -ffffffff835691c0 B nd6_expire_task -ffffffff835691f0 B nd6_timer_to -ffffffff83569238 B nd6_slowtimo_ch -ffffffff83569280 B nd6_expire_timeout -ffffffff835692c8 B ln_hold_total -ffffffff835692cc B nd6_inuse -ffffffff8356a000 B rawin6pcbtable -ffffffff8356a078 B rip6counters -ffffffff8356b000 B pkptable -ffffffff8356b038 B pkpcb_pool -ffffffff8356b1e0 b nregistered -ffffffff8356b1e4 b npromisc -ffffffff8356c000 B cpu_idle_cycle_fcn -ffffffff8356c008 B setperf_prio -ffffffff8356c00c B cpureset_delay -ffffffff8356c010 B ssym -ffffffff8356c018 B esym -ffffffff8356c020 B bootdev -ffffffff8356c024 B biosbasemem -ffffffff8356c028 B bootapiver -ffffffff8356c02c B safepri -ffffffff8356c030 B exec_map -ffffffff8356c038 B phys_map -ffffffff8356c040 B allowaperture -ffffffff8356c048 B msgbuf_paddr -ffffffff8356c050 B msgbuf_vaddr -ffffffff8356c058 B physmem -ffffffff8356c060 B idt_vaddr -ffffffff8356c068 B idt_paddr -ffffffff8356c070 B bios_diskinfo -ffffffff8356c078 B bios_cksumlen -ffffffff8356c07c B kbd_reset -ffffffff8356c080 B forceukbd -ffffffff8356c084 B dumpsize -ffffffff8356c088 B dumplo -ffffffff8356c090 B mem_cluster_cnt -ffffffff8356c0a0 B mem_clusters -ffffffff8356c1a0 B dumpmem_vaddr -ffffffff8356c1a8 B dumppcb -ffffffff8356c528 B dumpmem_sz -ffffffff8356c530 B proc0paddr -ffffffff8356c538 B idt -ffffffff8356c540 b cpu_init_extents.already_done -ffffffff8356c548 B lo32_vaddr -ffffffff8356c550 B lo32_paddr -ffffffff8356c558 B tramp_pdirpa -ffffffff8356c560 B early_pte_pages -ffffffff8356c570 B bootinfo -ffffffff8356d570 B avail_start -ffffffff8356d578 B avail_end -ffffffff8356d580 B bios_memmap -ffffffff8356d588 B bios_efiinfo -ffffffff8356d590 B mmap -ffffffff8356d598 B kern_end -ffffffff8356d5a0 B dumpmem_paddr -ffffffff8356d5b0 B idt_allocmap -ffffffff8356d6b0 B cpuresetfn -ffffffff8356d6b8 B bios_bootmac -ffffffff8356d6c0 B bios_ucode -ffffffff8356d6c8 B amd64_delay_quality -ffffffff8356d6d0 B dumpmem_low -ffffffff8356d6d8 B dumpmem_high -ffffffff8356d6e0 B cpu_class -ffffffff8356e000 B cpuspeed -ffffffff8356e004 B amd64_has_xcrypt -ffffffff8356e010 B cpu_model -ffffffff8356e040 B setperf_setup -ffffffff8356e048 B has_rdrand -ffffffff8356e04c B has_rdseed -ffffffff8356e050 B amd64_has_pclmul -ffffffff8356e054 B amd64_has_aesni -ffffffff8356f000 B tsc_is_invariant -ffffffff8356f008 B tsc_frequency -ffffffff8356f010 B tsc_recalibrate -ffffffff8356f040 B tsc_bp_status -ffffffff8356f0c0 B tsc_test_cycles -ffffffff8356f0c8 B tsc_test_rounds -ffffffff8356f0cc B tsc_ingress_barrier -ffffffff8356f0d0 B tsc_egress_barrier -ffffffff8356f100 B tsc_ap_status -ffffffff8356f180 B tsc_ap_name -ffffffff83570000 b vc3_sc -ffffffff83570010 b viac3_rnd.buffer -ffffffff83570058 B viac3_rnd_tmo -ffffffff835700a0 B viac3_rnd_present -ffffffff83571000 B aesni_sc -ffffffff83571008 B aesnipl -ffffffff835711b0 B aesni_ops -ffffffff83572000 b amd64_errata.printed -ffffffff83573000 B cpu_ucode_size -ffffffff83573008 B cpu_ucode_data -ffffffff83573010 B cpu_ucode_intel_applied -ffffffff83574000 b ap_open_count -ffffffff83574008 B zeropage -ffffffff83574010 B mem_range_softc -ffffffff83575000 B mtrrdef -ffffffff83575008 B mtrrcap -ffffffff83576000 B nkptp -ffffffff83576020 B pg_nx -ffffffff83576028 B pg_g_kern -ffffffff83576030 B pmap_initialized -ffffffff83576038 B kernel_pmap_store -ffffffff83576110 B cr3_reuse_pcid -ffffffff83576118 b cr3_pcid_temp -ffffffff83576120 B virtual_avail -ffffffff83576128 B pg_xo -ffffffff83576130 B protection_codes -ffffffff83576170 B pmap_use_pcid -ffffffff83576174 b cr3_pcid_proc -ffffffff83576178 B cr3_pcid_proc_intel -ffffffff83576180 B pmaps -ffffffff83576188 B pmap_pmap_pool -ffffffff83576330 B pmap_pv_pool -ffffffff835764d8 B pmap_pdp_pool -ffffffff83577000 B fpu_mxcsr_mask -ffffffff83577008 B xsave_mask -ffffffff83578000 B x86_soft_intrs -ffffffff83579000 B i8259_imen -ffffffff8357a000 B intr_shared_edge -ffffffff8357a008 B fake_softclock_intrhand -ffffffff8357a078 B fake_softnet_intrhand -ffffffff8357a0e8 B fake_softtty_intrhand -ffffffff8357a158 B fake_timer_intrhand -ffffffff8357a1c8 B fake_ipi_intrhand -ffffffff8357a238 B fake_xen_intrhand -ffffffff8357a2a8 B fake_hyperv_intrhand -ffffffff8357b000 B atdevbase -ffffffff8357b010 b ioport_ex_storage -ffffffff8357b2e0 B ioport_ex -ffffffff8357b2f0 b iomem_ex_storage -ffffffff8357b5c0 B iomem_ex -ffffffff8357b5c8 b ioport_malloc_safe -ffffffff8357c000 B mp_perflevel -ffffffff8357c008 B ul_setperf -ffffffff8357d000 B cn_tab -ffffffff8357e000 B ddb_mp_mutex -ffffffff8357e010 B ddb_state -ffffffff8357e018 B ddb_regs -ffffffff8357e0c8 B db_switch_cpu -ffffffff8357e0d0 B db_switch_to_cpu -ffffffff8357e0d8 B ddb_active_cpu -ffffffff8357f000 B rtclock_tval -ffffffff8357f008 B i8254_ticked -ffffffff8357f00c B i8254_offset -ffffffff8357f010 B i8254_lastcount -ffffffff8357f018 b rtcstart.rtcdrain_timeout -ffffffff8357f060 B rtc_update_century -ffffffff8357f068 B rtc_todr -ffffffff83580000 B k8pnow_current_state -ffffffff83581000 B bus_clock -ffffffff83581008 b est_fqlist -ffffffff83582000 B k1x_current_state -ffffffff83583000 B rotatedfonts -ffffffff83583008 B rasops_framebuffers -ffffffff83584000 b stamp_attr -ffffffff83584010 b stamp +ffffffff83190000 d PADDING +ffffffff83191000 d weak_keys +ffffffff83192000 D swcr_id +ffffffff83193000 D window_inflate +ffffffff83193004 D window_deflate +ffffffff83194000 D ghash_update +ffffffff83195000 D mpls_defttl +ffffffff83195004 D mpls_mapttl_ip +ffffffff83196000 D nfskevq_lock +ffffffff83197000 D nfs_backoff +ffffffff83197020 D nfs_ptimers +ffffffff83198000 D desirednfsrvcache +ffffffff83198010 D nonidempotent +ffffffff83198070 D nfsv2_repstat +ffffffff83199000 D nfsv2_type +ffffffff83199030 D nfsv3_type +ffffffff83199060 D nv2tov_type +ffffffff83199080 D nv3tov_type +ffffffff831990a0 D nfsv3_procid +ffffffff83199100 D nfsv2_procid +ffffffff8319915c d nfsv3err_getattr +ffffffff83199170 d nfsv3err_setattr +ffffffff83199190 d nfsv3err_lookup +ffffffff831991a4 d nfsv3err_access +ffffffff831991b0 d nfsv3err_readlink +ffffffff831991d0 d nfsv3err_read +ffffffff831991f0 d nfsv3err_write +ffffffff83199210 d nfsv3err_create +ffffffff83199230 d nfsv3err_mkdir +ffffffff83199250 d nfsv3err_symlink +ffffffff83199270 d nfsv3err_mknod +ffffffff83199290 d nfsv3err_remove +ffffffff831992b0 d nfsv3err_rmdir +ffffffff831992d0 d nfsv3err_rename +ffffffff83199300 d nfsv3err_link +ffffffff83199330 d nfsv3err_readdir +ffffffff83199350 d nfsv3err_readdirplus +ffffffff83199366 d nfsv3err_fsstat +ffffffff83199372 d nfsv3err_fsinfo +ffffffff8319937c d nfsv3err_pathconf +ffffffff83199386 d nfsv3err_commit +ffffffff8319a000 D nfsrv3_procs +ffffffff8319a0b8 D nfs_niothreads +ffffffff8319b000 D fragtbl +ffffffff8319c000 D ffs_vtbl +ffffffff8319d000 D softdep_typenames +ffffffff8319d070 D tickdelay +ffffffff8319e000 D dirchk +ffffffff8319f000 D desireddquot +ffffffff831a0000 D amap_list_lock +ffffffff831a1000 d uao_list_lock +ffffffff831a2000 d uvmexp_countersboot_boot_cpumem +ffffffff831a20c0 D uvmexp_counters +ffffffff831a20c8 D vm_min_kernel_address +ffffffff831a3000 D no_constraint +ffffffff831a4000 d uvm_kmapent_warn_rate +ffffffff831a5000 D maxslp +ffffffff831a6000 D uvmpagerops +ffffffff831a7000 D uvm_swap_data_lock +ffffffff831a7010 D swap_syscall_lock +ffffffff831a7020 D oommtx +ffffffff831a8000 D uvm_doswapencrypt +ffffffff831a9000 D gif_list +ffffffff831a9010 D gif_cloner +ffffffff831aa000 D divert6_sendspace +ffffffff831aa004 D divert6_recvspace +ffffffff831aa008 D divb6hashsize +ffffffff831ab000 d in6_get_hw_ifid.allone +ffffffff831ac000 D ip6_sendredirects +ffffffff831ac004 D ip6_defhlim +ffffffff831ac008 D ip6_defmcasthlim +ffffffff831ac00c D ip6_maxfragpackets +ffffffff831ac010 D ip6_maxfrags +ffffffff831ac014 D ip6_log_interval +ffffffff831ac018 D ip6_hdrnestlimit +ffffffff831ac01c D ip6_dad_count +ffffffff831ac020 D ip6_auto_flowlabel +ffffffff831ac024 D ip6_use_deprecated +ffffffff831ac028 D ip6_neighborgcthresh +ffffffff831ac02c D ip6_maxdynroutes +ffffffff831ac030 D rip6_sendspace +ffffffff831ac038 D rip6_recvspace +ffffffff831ac040 D icmp6_redirtimeout +ffffffff831ac044 D icmp6errppslim +ffffffff831ac048 D ip6_mtudisc_timeout +ffffffff831ad000 D frag6_mutex +ffffffff831ae000 d icmp6_mtudisc_hiwat +ffffffff831ae004 d icmp6_mtudisc_lowat +ffffffff831af000 d randomtab_20 +ffffffff831b0000 D ip6intrq +ffffffff831b0038 d ip6send_task +ffffffff831b1000 D nd6_timer_next +ffffffff831b1008 D nd6_expire_next +ffffffff831b1010 D nd6_delay +ffffffff831b1014 D nd6_umaxtries +ffffffff831b1018 D nd6_mmaxtries +ffffffff831b101c D nd6_gctimer +ffffffff831b1020 D nd6_maxndopt +ffffffff831b2000 d dadq +ffffffff831b3000 D pfkeyv2_mtx +ffffffff831b3010 d pfkeyv2_seq +ffffffff831b4000 D sadb_exts_allowed_in +ffffffff831b4090 D sadb_exts_required_in +ffffffff831b5000 D cold +ffffffff831b6000 D bdevsw +ffffffff831b6460 D nblkdev +ffffffff831b6470 D cdevsw +ffffffff831b8400 D nchrdev +ffffffff831b8404 D mem_no +ffffffff831b8408 D swapdev +ffffffff831b8410 D constab +ffffffff831b9000 D machine +ffffffff831b9008 D lid_action +ffffffff831b900c D pwr_action +ffffffff831b9010 D isa_constraint +ffffffff831b9020 D dma_constraint +ffffffff831b9030 D uvm_md_constraints +ffffffff831b9048 D delay_func +ffffffff831b9050 D initclock_func +ffffffff831b9058 D bootinfo_size +ffffffff831b905c D waittime +ffffffff831b9060 D dumpmag +ffffffff831ba000 D tsc_rdtsc +ffffffff831ba008 D tsc_timecounter +ffffffff831ba058 D tsc_is_synchronized +ffffffff831bb000 D local_apic +ffffffff831bb020 D lapic_id +ffffffff831bb080 D lapic_tpr +ffffffff831bb0a0 d lapic_ppr +ffffffff831bb100 d lapic_isr +ffffffff831bc000 D warn_once +ffffffff831bd000 d errata +ffffffff831be000 D cpu_ucode_intel_mtx +ffffffff831bf000 D mem_owner_bios +ffffffff831bf008 D mrops +ffffffff831bf028 D mtrrmask +ffffffff831bf030 D mtrrtomrt +ffffffff831c0000 D pmap_pg_wc +ffffffff831c0008 D pmaps_lock +ffffffff831c0018 d pmap_maxkvaddr +ffffffff831c1000 D kv_physwait +ffffffff831c2000 D fpu_save_len +ffffffff831c3000 D i8259_pic +ffffffff831c4000 D softintr_pic +ffffffff831c5000 D ipifunc +ffffffff831c6000 D setperf_mp_mutex +ffffffff831c7000 D db_Grp6 +ffffffff831c7040 D db_Grp7 +ffffffff831c7100 D db_Grp8 +ffffffff831c7140 D db_Grp9 +ffffffff831c7200 D db_GrpA +ffffffff831c7240 D db_GrpB +ffffffff831c7280 D db_GrpC +ffffffff831c72c0 D db_inst_0f0x +ffffffff831c7440 D db_inst_0f2x +ffffffff831c75c0 D db_inst_0f3x +ffffffff831c7740 D db_inst_0f8x +ffffffff831c78c0 D db_inst_0f9x +ffffffff831c7a40 D db_inst_0fax +ffffffff831c7bc0 D db_inst_0fbx +ffffffff831c7d40 D db_inst_0fcx +ffffffff831c7ec0 D db_inst_0f +ffffffff831c7f40 D db_Esc92 +ffffffff831c7f80 D db_Esc94 +ffffffff831c7fc0 D db_Esc95 +ffffffff831c8000 D db_Esc96 +ffffffff831c8040 D db_Esc97 +ffffffff831c8080 D db_Esca5 +ffffffff831c80c0 D db_Escb4 +ffffffff831c8100 D db_Esce3 +ffffffff831c8140 D db_Escf4 +ffffffff831c8180 D db_Esc8 +ffffffff831c8240 D db_Esc9 +ffffffff831c8300 D db_Esca +ffffffff831c83c0 D db_Escb +ffffffff831c8480 D db_Escc +ffffffff831c8540 D db_Escd +ffffffff831c8600 D db_Esce +ffffffff831c86c0 D db_Escf +ffffffff831c8780 D db_Esc_inst +ffffffff831c87c0 D db_Grp1 +ffffffff831c8800 D db_Grp2 +ffffffff831c8840 D db_Grp3 +ffffffff831c8900 D db_Grp4 +ffffffff831c89c0 D db_Grp5 +ffffffff831c8a80 D db_inst_table +ffffffff831ca280 D db_bad_inst +ffffffff831ca2a0 D db_index_reg_16 +ffffffff831ca2e0 D db_reg +ffffffff831ca4e0 D db_seg_reg +ffffffff831ca520 D db_lengths +ffffffff831cb000 D db_regs +ffffffff831cb1e0 D db_eregs +ffffffff831cb1f0 D db_reg_args +ffffffff831cc000 D timer_mutex +ffffffff831cc010 d i8254_timecounter +ffffffff831cd000 D spleen8x16 +ffffffff831cd058 D spleen12x24 +ffffffff831cd0b0 D spleen16x32 +ffffffff831cd108 D spleen32x64 +ffffffff831cd160 d builtin_fonts +ffffffff831cd1e0 d wsfont_add.cookiegen +ffffffff831cd1f0 d spleen8x16_data +ffffffff831cdff0 d spleen12x24_data +ffffffff831d09f0 d spleen16x32_data +ffffffff831d41f0 d spleen32x64_data +ffffffff831e3000 D nsphy_cd +ffffffff831e4000 D nsphyter_cd +ffffffff831e5000 D gentbi_cd +ffffffff831e6000 D qsphy_cd +ffffffff831e7000 D inphy_cd +ffffffff831e8000 D iophy_cd +ffffffff831e9000 D eephy_cd +ffffffff831ea000 D exphy_cd +ffffffff831eb000 D rlphy_cd +ffffffff831ec000 D lxtphy_cd +ffffffff831ed000 D luphy_cd +ffffffff831ee000 D mtdphy_cd +ffffffff831ef000 D icsphy_cd +ffffffff831f0000 D sqphy_cd +ffffffff831f1000 D tqphy_cd +ffffffff831f2000 D ukphy_cd +ffffffff831f3000 D dcphy_cd +ffffffff831f4000 D bmtphy_cd +ffffffff831f5000 D brgphy_cd +ffffffff831f6000 D xmphy_cd +ffffffff831f7000 D amphy_cd +ffffffff831f8000 D acphy_cd +ffffffff831f9000 D nsgphy_cd +ffffffff831fa000 D urlphy_cd +ffffffff831fb000 D rgephy_cd +ffffffff831fc000 D ciphy_cd +ffffffff831fd000 D ipgphy_cd +ffffffff831fe000 D etphy_cd +ffffffff831ff000 D jmphy_cd +ffffffff83200000 D atphy_cd +ffffffff83201000 D scsi_autoconf +ffffffff83201008 D scsibus_cd +ffffffff83202000 D cd_cd +ffffffff83203000 D ch_cd +ffffffff83203020 D chquirks +ffffffff83204000 D sd_cd +ffffffff83205000 D st_cd +ffffffff83206000 D uk_cd +ffffffff83207000 D safte_cd +ffffffff83208000 D ses_cd +ffffffff83209000 D sym_cd +ffffffff83209020 D sym_devices +ffffffff83209070 D asym_devices +ffffffff8320a000 D rdac_cd +ffffffff8320a020 D rdac_devices +ffffffff8320b000 D emc_cd +ffffffff8320b020 D emc_devices +ffffffff8320c000 D hds_cd +ffffffff8320c020 D hds_devices +ffffffff8320d000 D atapiscsi_cd +ffffffff8320e000 D wd_cd +ffffffff8320e020 d wddumpmulti +ffffffff8320f000 D mainbus_cd +ffffffff8320f020 D mba_iba +ffffffff83210000 D bios_cd +ffffffff83210020 D smbios_uninfo +ffffffff83211000 D mpbios_cd +ffffffff83211020 d mp_conf +ffffffff83211070 d extint_bus +ffffffff832110a0 d smi_bus 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+ffffffff83221000 D hvn_cd +ffffffff83222000 D hvs_cd +ffffffff83223000 D virtio_cd +ffffffff83224000 D vio_cd +ffffffff83225000 D vioblk_cd +ffffffff83226000 D viomb_cd +ffffffff83227000 D viornd_cd +ffffffff83228000 D vioscsi_cd +ffffffff83229000 D vmmci_cd +ffffffff8322a000 D pci_cd +ffffffff8322b000 D arc_fw_hdr +ffffffff8322b008 D arc_cd +ffffffff8322c000 D jmb_cd +ffffffff8322d000 D mfii_cd +ffffffff8322e000 D ips_cd +ffffffff8322f000 D eap_cd +ffffffff83230000 D auacer_cd +ffffffff83231000 D auich_cd +ffffffff83232000 D azalia_cd +ffffffff83233000 D envy_cd +ffffffff83233020 D envy_matchids +ffffffff83233030 D envy_rates +ffffffff832330b0 D ak4524_dac +ffffffff832330d8 D ak4524_adc +ffffffff83233100 D ak4358_dac +ffffffff83233128 D ak5365_adc +ffffffff83233150 D unkenvy_codec +ffffffff83233180 D envy_cards +ffffffff832333f0 D envy_cards_ht +ffffffff83233600 d julia_eeprom +ffffffff83234000 D emu_cd +ffffffff83235000 D auixp_cd +ffffffff83236000 D clcs_cd +ffffffff83237000 D yds_cd +ffffffff83238000 D auvia_cd +ffffffff83239000 D qle_cd +ffffffff8323a000 D mpii_cd +ffffffff8323b000 D aq_cd +ffffffff8323c000 D de_cd +ffffffff8323d000 D pcn_cd +ffffffff8323e000 D wdc_sii3114_vtbl +ffffffff8323e038 D wdc_pdc203xx_vtbl +ffffffff8323e070 D wdc_svwsata_vtbl +ffffffff8323e0a8 D pciide_cd +ffffffff8323e0d0 d sis_hostbr_type +ffffffff8323f000 D ppb_cd +ffffffff83240000 D vr_cd +ffffffff83240020 D vr_devices +ffffffff83241000 D txp_cd +ffffffff83242000 D bt848_card_signature +ffffffff83243000 D bktr_cd +ffffffff83244000 D em_cd +ffffffff83245000 D ixgb_cd +ffffffff83246000 D ix_cd +ffffffff83246020 D ixgbe_smart_speed +ffffffff83246024 D ixgbe_enable_msix +ffffffff83247000 D ixl_cd +ffffffff83247020 d ixl_sff_lock +ffffffff83248000 D xge_cd +ffffffff83249000 D thtc_cd +ffffffff83249020 D tht_cd +ffffffff83249040 D tht_txt_desc +ffffffff83249068 D tht_rxf_desc +ffffffff83249090 D tht_rxd_desc +ffffffff832490b8 D tht_txf_desc +ffffffff8324a000 D myx_cd +ffffffff8324b000 D oce_cd +ffffffff8324c000 D dc_devs +ffffffff8324d000 D cas_cd +ffffffff8324e000 D sis_cd +ffffffff8324f000 D se_cd +ffffffff83250000 D cbb_cd +ffffffff83250020 D yc_chipsets +ffffffff832501b0 d pccbb_funcs +ffffffff832501e0 d pccbb_pcmcia_funcs +ffffffff83251000 D skc_cd +ffffffff83251020 D sk_cd +ffffffff83252000 D mskc_cd +ffffffff83252020 D msk_cd +ffffffff83253000 D puc_cd +ffffffff83254000 D puc_ndevs +ffffffff83255000 D iwi_cd +ffffffff83256000 D wpi_cd +ffffffff83257000 D iwn_cd +ffffffff83258000 D iwm_cd +ffffffff83259000 D iwx_cd +ffffffff8325a000 D cmpci_cd +ffffffff8325b000 D iha_cd +ffffffff8325c000 D pcscp_cd +ffffffff8325c020 D pcscp_glue +ffffffff8325d000 D bge_cd +ffffffff8325e000 D bnx_firmwares +ffffffff8325e160 D bnx_rv2ps +ffffffff8325e1c0 D bnx_cd +ffffffff8325e1e0 d flash_5709 +ffffffff8325e210 d flash_table +ffffffff8325f000 D vge_cd +ffffffff83260000 D stge_cd +ffffffff83261000 D nfe_cd +ffffffff83262000 D et_cd +ffffffff83263000 D jme_cd +ffffffff83264000 D age_cd +ffffffff83265000 D alc_dma_burst +ffffffff83265020 D alc_cd +ffffffff83266000 D ale_cd +ffffffff83267000 D amdpm_cd +ffffffff83267020 d amdpm_timecounter +ffffffff83268000 D bce_cd +ffffffff83269000 D rtwn_cd +ffffffff8326a000 d ral_rt2560_opns +ffffffff8326a028 d ral_rt2661_opns +ffffffff8326a050 d ral_rt2860_opns +ffffffff8326b000 D piixpm_cd +ffffffff8326c000 D vic_cd +ffffffff8326d000 D vmx_cd +ffffffff8326e000 D vmwpvs_cd +ffffffff8326f000 D lii_cd +ffffffff83270000 D ichiic_cd +ffffffff83271000 D viapm_cd +ffffffff83271020 d viapm_timecounter +ffffffff83272000 D amdiic_cd +ffffffff83273000 D nviic_cd +ffffffff83274000 D kate_cd +ffffffff83275000 D km_cd +ffffffff83276000 D cpu_model_offsets +ffffffff83276070 D ksmn_cd +ffffffff83277000 D itherm_cd +ffffffff83278000 D pchtemp_cd +ffffffff83279000 D xspd_cd +ffffffff8327a000 D virtio_pci_ops +ffffffff8327b000 D bwfm_pci_buscore_ops +ffffffff8327b030 D bwfm_pci_bus_ops +ffffffff8327b058 D bwfm_pci_msgbuf_ops +ffffffff8327c000 D bnxt_cd +ffffffff8327d000 D mcx_cd +ffffffff8327e000 D iavf_cd +ffffffff8327f000 D rge_cd +ffffffff83280000 D igc_cd +ffffffff83281000 D ngbe_cd +ffffffff83282000 D agp_cd +ffffffff83283000 D intagp_cd +ffffffff83283020 D agp_i810_methods +ffffffff83284000 D reservation_ww_class +ffffffff83285000 d bridge_lock +ffffffff83285010 d bridge_list +ffffffff83286000 d drm_connector_enum_list +ffffffff832861f8 d connector_list_lock +ffffffff83286208 d connector_list +ffffffff83287000 d kernel_fb_helper_list +ffffffff83287010 d kernel_fb_helper_lock +ffffffff83288000 D drm_global_mutex +ffffffff83289000 D sch_mtx +ffffffff83289010 D i2c_bit_algo +ffffffff83289020 d drm_fence_context_count +ffffffff83289028 d dma_fence_stub_mtx +ffffffff83289038 D wait_bit_mtx +ffffffff83289048 D shrinkers +ffffffff8328a000 d crtc_ww_class +ffffffff8328b000 d panel_lock +ffffffff8328b010 d panel_list +ffffffff8328c000 d ttm_global_mutex +ffffffff8328d000 D intel_bbops +ffffffff8328e000 d i915_sys_placement +ffffffff8328e020 d i915_ttm_bo_driver +ffffffff8328f000 d mchdev_lock +ffffffff83290000 D inteldrm_stdscreen +ffffffff83290030 D inteldrm_scrlist +ffffffff83290038 D inteldrm_screenlist +ffffffff83290048 D inteldrm_accessops +ffffffff832900a8 D inteldrm_cd +ffffffff83291000 d capture_mutex +ffffffff83292000 d mitigations +ffffffff83293000 D i915_modparams +ffffffff83294000 d schedule_lock +ffffffff83295000 d unbind_fence_ops +ffffffff83296000 D intel_graphics_stolen_res +ffffffff83297000 D btc_valid_sclk +ffffffff83298000 d evergreen_cs_packet_parse_vline.vline_start_end +ffffffff83298020 d evergreen_cs_packet_parse_vline.vline_status +ffffffff83299000 d r600_cs_packet_parse_vline.vline_start_end +ffffffff83299008 d r600_cs_packet_parse_vline.vline_status +ffffffff8329a000 d r100_asic +ffffffff8329a2e0 d r200_asic +ffffffff8329a5c0 d r300_asic_pcie +ffffffff8329a8a0 d r300_asic +ffffffff8329ab80 d r420_asic +ffffffff8329ae60 d rs400_asic +ffffffff8329b140 d rs600_asic +ffffffff8329b420 d rs690_asic +ffffffff8329b700 d rv515_asic +ffffffff8329b9e0 d r520_asic +ffffffff8329bcc0 d r600_asic +ffffffff8329bfa0 d rv6xx_asic +ffffffff8329c280 d rs780_asic +ffffffff8329c560 d rv770_asic +ffffffff8329c840 d evergreen_asic +ffffffff8329cb20 d sumo_asic +ffffffff8329ce00 d btc_asic +ffffffff8329d0e0 d cayman_asic +ffffffff8329d3c0 d trinity_asic +ffffffff8329d6a0 d si_asic +ffffffff8329d980 d ci_asic +ffffffff8329dc60 d kv_asic +ffffffff8329e000 d dce6_funcs +ffffffff8329e018 d dce6_hdmi_funcs +ffffffff8329e088 d dce6_dp_funcs +ffffffff8329e0f8 d dce4_funcs +ffffffff8329e110 d dce4_hdmi_funcs +ffffffff8329e180 d dce4_dp_funcs +ffffffff8329e1f0 d dce32_funcs +ffffffff8329e208 d dce32_hdmi_funcs +ffffffff8329e278 d dce32_dp_funcs +ffffffff8329e2e8 d r600_funcs +ffffffff8329e300 d r600_hdmi_funcs +ffffffff8329f000 D radeon_modeset +ffffffff8329f004 D radeon_dynclks +ffffffff8329f008 D radeon_agpmode +ffffffff8329f00c D radeon_gart_size +ffffffff8329f010 D radeon_tv +ffffffff8329f014 D radeon_audio +ffffffff8329f018 D radeon_pcie_gen2 +ffffffff8329f01c D radeon_msi +ffffffff8329f020 D radeon_lockup_timeout +ffffffff8329f024 D radeon_dpm +ffffffff8329f028 D radeon_aspm +ffffffff8329f02c D radeon_runtime_pm +ffffffff8329f030 D radeon_vm_size +ffffffff8329f034 D radeon_vm_block_size +ffffffff8329f038 D radeon_use_pflipirq +ffffffff8329f03c D radeon_bapm +ffffffff8329f040 D radeon_backlight +ffffffff8329f044 D radeon_auxch +ffffffff8329f048 D radeon_uvd +ffffffff8329f04c D radeon_vce +ffffffff8329f050 D radeon_si_support +ffffffff8329f054 D radeon_cik_support +ffffffff8329f058 D radeondrm_cd +ffffffff8329f078 D radeondrm_stdscreen +ffffffff8329f0a8 D radeondrm_scrlist +ffffffff8329f0b0 D radeondrm_screenlist +ffffffff8329f0c0 D radeondrm_accessops +ffffffff832a0000 D radeon_bbops +ffffffff832a1000 d radeon_bo_driver +ffffffff832a2000 d verde_pg_init +ffffffff832a3000 d cac_weights_pitcairn +ffffffff832a34d0 d cac_weights_oland +ffffffff832a4000 d aldebaran_mode2_handler +ffffffff832a5000 d amdgpu_vbios_version_attrs +ffffffff832a6000 D amdgpu_asic_name +ffffffff832a7000 D amdgpu_gart_size +ffffffff832a7004 D amdgpu_gtt_size +ffffffff832a7008 D amdgpu_moverate +ffffffff832a700c D amdgpu_audio +ffffffff832a7010 D amdgpu_pcie_gen2 +ffffffff832a7014 D amdgpu_msi +ffffffff832a7018 D amdgpu_dpm +ffffffff832a701c D amdgpu_fw_load_type +ffffffff832a7020 D amdgpu_aspm +ffffffff832a7024 D amdgpu_runtime_pm +ffffffff832a7028 D amdgpu_ip_block_mask +ffffffff832a702c D amdgpu_bapm +ffffffff832a7030 D amdgpu_vm_size +ffffffff832a7034 D amdgpu_vm_fragment_size +ffffffff832a7038 D amdgpu_vm_block_size +ffffffff832a703c D amdgpu_vm_update_mode +ffffffff832a7040 D amdgpu_dc +ffffffff832a7044 D amdgpu_sched_jobs +ffffffff832a7048 D amdgpu_sched_hw_submission +ffffffff832a7050 D amdgpu_cg_mask +ffffffff832a7058 D amdgpu_pg_mask +ffffffff832a705c D amdgpu_sdma_phase_quantum +ffffffff832a7060 D amdgpu_pp_feature_mask +ffffffff832a7064 D amdgpu_lbpw +ffffffff832a7068 D amdgpu_compute_multipipe +ffffffff832a706c D amdgpu_gpu_recovery +ffffffff832a7070 D amdgpu_smu_pptable_id +ffffffff832a7074 D amdgpu_dc_feature_mask +ffffffff832a7078 D amdgpu_async_gfx_ring +ffffffff832a707c D amdgpu_discovery +ffffffff832a7080 D amdgpu_noretry +ffffffff832a7084 D amdgpu_force_asic_type +ffffffff832a7088 D amdgpu_tmz +ffffffff832a708c D amdgpu_reset_method +ffffffff832a7090 D amdgpu_num_kcq +ffffffff832a7094 D amdgpu_use_xgmi_p2p +ffffffff832a7098 D mgpu_info +ffffffff832a7248 D amdgpu_ras_enable +ffffffff832a724c D amdgpu_ras_mask +ffffffff832a7250 D amdgpu_bad_page_threshold +ffffffff832a7254 D amdgpu_backlight +ffffffff832a7258 D amdgpu_cd +ffffffff832a7278 D amdgpu_stdscreen +ffffffff832a72a8 D amdgpu_scrlist +ffffffff832a72b0 D amdgpu_screenlist +ffffffff832a72c0 D amdgpu_accessops +ffffffff832a8000 d amdgpu_gtt_mgr_attributes +ffffffff832a9000 D amdgpu_bbops +ffffffff832aa000 D soc15_ih_clientid_name +ffffffff832ab000 D ras_error_string +ffffffff832ab030 D ras_block_string +ffffffff832ab0c0 D ras_mca_block_string +ffffffff832ac000 d amdgpu_bo_driver +ffffffff832ad000 d amdgpu_vram_mgr_attributes +ffffffff832ae000 D amdgpu_xgmi_hive_type +ffffffff832ae008 d xgmi_mutex +ffffffff832ae018 D xgmi_ras_hw_ops +ffffffff832ae058 D xgmi_ras +ffffffff832af000 d gfx_v9_0_ras +ffffffff832b0000 D gfx_v9_4_ras +ffffffff832b1000 D gfx_v9_4_2_ras_ops +ffffffff832b1040 D gfx_v9_4_2_ras +ffffffff832b2000 D hdp_v4_0_ras_hw_ops +ffffffff832b2040 D hdp_v4_0_ras +ffffffff832b3000 d jpeg_v2_6_ras +ffffffff832b4000 D mca_v3_0_mp0_ras +ffffffff832b4058 D mca_v3_0_mp1_ras +ffffffff832b40b0 D mca_v3_0_mpio_ras +ffffffff832b5000 D mmhub_v1_0_ras_hw_ops +ffffffff832b5040 D mmhub_v1_0_ras +ffffffff832b6000 D mmhub_v1_7_ras_hw_ops +ffffffff832b6040 D mmhub_v1_7_ras +ffffffff832b7000 D mmhub_v9_4_ras +ffffffff832b8000 D nbio_v7_4_ras +ffffffff832b9000 d sriov_sc_video_codecs_encode +ffffffff832b9010 d sriov_sc_video_codecs_decode +ffffffff832b9020 d sriov_sc_video_codecs_encode_array +ffffffff832b9050 d sriov_sc_video_codecs_decode_array +ffffffff832ba000 d sdma_v4_0_ras +ffffffff832bb000 D sdma_v4_4_ras +ffffffff832bc000 d sienna_cichlid_mode2_handler +ffffffff832bd000 D umc_v6_1_ras +ffffffff832be000 D umc_v6_7_ras +ffffffff832bf000 D umc_v8_10_ras +ffffffff832c0000 D umc_v8_7_ras +ffffffff832c1000 d vcn_v2_6_ras +ffffffff832c2000 d amdgpu_dm_mode_config_helperfuncs +ffffffff832c2010 d dm_atomic_state_funcs +ffffffff832c3000 d construct_integrated_info.result +ffffffff832c3004 d bios_parser_get_firmware_info.result +ffffffff832c4000 d dce_funcs +ffffffff832c5000 d dce110_funcs +ffffffff832c6000 d dce112_funcs +ffffffff832c7000 d dce120_funcs +ffffffff832c8000 d rv1_clk_funcs +ffffffff832c8088 d rv1_clk_internal_funcs +ffffffff832c9000 d rv2_clk_internal_funcs +ffffffff832ca000 d dcn2_funcs +ffffffff832cb000 D dcn201_funcs +ffffffff832cc000 d dcn21_funcs +ffffffff832cc088 d rn_bw_params +ffffffff832cd000 D dcn3_fpga_funcs +ffffffff832cd088 d dcn3_funcs +ffffffff832ce000 d vg_funcs +ffffffff832ce088 d dummy_clocks +ffffffff832ce1b8 d vg_bw_params +ffffffff832cf000 d dcn31_bw_params +ffffffff832cf2a0 d dcn31_funcs +ffffffff832d0000 d dcn314_bw_params +ffffffff832d02a0 d dcn314_funcs +ffffffff832d1000 d dcn315_funcs +ffffffff832d1088 d dcn315_bw_params +ffffffff832d2000 d dcn316_funcs +ffffffff832d2088 d dcn316_bw_params +ffffffff832d3000 d dcn32_funcs +ffffffff832d4000 d dcn10_dpp_cap +ffffffff832d5000 D aperture_default_system +ffffffff832d6000 d dcn20_dpp_cap +ffffffff832d6010 d dcn20_dpp_funcs +ffffffff832d7000 d dcn20_hubp_funcs +ffffffff832d8000 d dcn20_opp_funcs +ffffffff832d9000 d dcn20_tg_funcs +ffffffff832da000 d dcn201_dpp_funcs +ffffffff832da110 d dcn201_dpp_cap +ffffffff832db000 d dcn201_hubp_funcs +ffffffff832dc000 d dcn201_opp_funcs +ffffffff832dd000 d dcn201_tg_funcs +ffffffff832de000 D dcn201_ip +ffffffff832de1b8 D dcn201_soc +ffffffff832deb88 d dcn201_res_pool_funcs +ffffffff832df000 d dcn21_hubp_funcs +ffffffff832e0000 d dcn30_afmt_funcs +ffffffff832e1000 d dcn30_dpp_cap +ffffffff832e1010 d dcn30_dpp_funcs +ffffffff832e2000 d dcn30_hubp_funcs +ffffffff832e3000 d dcn30_tg_funcs +ffffffff832e4000 d dcn30_vpg_funcs +ffffffff832e5000 d res_cap_dcn301 +ffffffff832e5040 d dcn301_res_pool_funcs +ffffffff832e6000 d dcn302_res_pool_funcs +ffffffff832e7000 d dcn303_res_pool_funcs +ffffffff832e8000 d dcn31_afmt_funcs +ffffffff832e9000 d dcn31_apg_funcs +ffffffff832ea000 d dcn31_hpo_dp_link_encoder_funcs +ffffffff832eb000 d dcn31_hubp_funcs +ffffffff832ec000 d dcn31_tg_funcs +ffffffff832ed000 d dcn31_res_pool_funcs +ffffffff832ee000 d dcn31_vpg_funcs +ffffffff832ef000 d dcn314_tg_funcs +ffffffff832f0000 d dcn314_res_pool_funcs +ffffffff832f1000 d dcn315_res_pool_funcs +ffffffff832f2000 d dcn316_res_pool_funcs +ffffffff832f3000 d dcn32_dpp_funcs +ffffffff832f3110 d dcn32_dpp_cap +ffffffff832f4000 d dcn32_hpo_dp_link_encoder_funcs +ffffffff832f5000 d dcn32_hubp_funcs +ffffffff832f6000 d dcn32_tg_funcs +ffffffff832f7000 d dcn32_res_pool_funcs +ffffffff832f8000 d dcn321_res_pool_funcs +ffffffff832f9000 D dcn1_0_ip +ffffffff832f91b8 D dcn1_0_soc +ffffffff832fa000 D dcn2_0_ip +ffffffff832fa1b8 D dcn2_0_nv14_ip +ffffffff832fa370 D dcn2_0_soc +ffffffff832fad40 D dcn2_0_nv14_soc +ffffffff832fb710 D dcn2_1_ip +ffffffff832fb8c8 D dcn2_1_soc +ffffffff832fc298 D ddr4_wm_table_gs +ffffffff832fc358 D lpddr4_wm_table_gs +ffffffff832fc418 D lpddr4_wm_table_with_disabled_ppt +ffffffff832fc4d8 D ddr4_wm_table_rn +ffffffff832fc598 D ddr4_1R_wm_table_rn +ffffffff832fc658 D lpddr4_wm_table_rn +ffffffff832fd000 D dcn3_0_ip +ffffffff832fd1b8 D dcn3_0_soc +ffffffff832fe000 D dcn3_01_ip +ffffffff832fe1b8 D dcn3_01_soc +ffffffff832feb88 D ddr4_wm_table +ffffffff832fec48 D lpddr5_wm_table +ffffffff832ff000 D dcn3_02_ip +ffffffff832ff1b8 D dcn3_02_soc +ffffffff83300000 D dcn3_03_ip +ffffffff833001b8 D dcn3_03_soc +ffffffff83301000 D dcn3_1_ip +ffffffff833011b8 D dcn3_15_ip +ffffffff83301370 D dcn3_16_ip +ffffffff83301528 d dcn3_15_soc +ffffffff83301ef8 d dcn3_1_soc +ffffffff833028c8 d dcn3_16_soc +ffffffff83304000 D dcn3_14_ip +ffffffff833041b8 D dcn3_14_soc +ffffffff83305000 D dcn3_2_ip +ffffffff833051b8 D dcn3_2_soc +ffffffff83306000 D dcn3_21_ip +ffffffff833061b8 D dcn3_21_soc +ffffffff83307000 d dsc_policy_max_target_bpp_limit +ffffffff83308000 D DIDTEDCConfig_P12 +ffffffff83308070 d smu7_profiling +ffffffff83309000 d cyan_skillfish_table_map +ffffffff83309080 d cyan_skillfish_message_map +ffffffff8330a000 d navi10_table_map +ffffffff8330a080 d navi10_pwr_src_map +ffffffff8330a090 d navi10_workload_map +ffffffff8330a0d0 d navi10_message_map +ffffffff8330ab20 d navi10_clk_map +ffffffff8330abe0 d navi10_feature_mask_map +ffffffff8330b000 d sienna_cichlid_message_map +ffffffff8330ba50 d sienna_cichlid_table_map +ffffffff8330bad0 d sienna_cichlid_pwr_src_map +ffffffff8330bae0 d sienna_cichlid_workload_map +ffffffff8330bb20 d sienna_cichlid_clk_map +ffffffff8330bbe0 d sienna_cichlid_feature_mask_map +ffffffff8330c000 d vangogh_message_map +ffffffff8330ca50 d vangogh_table_map +ffffffff8330cad0 d vangogh_workload_map +ffffffff8330cb10 d vangogh_feature_mask_map +ffffffff8330d000 d renoir_table_map +ffffffff8330d080 d renoir_workload_map +ffffffff8330d0c0 d renoir_message_map +ffffffff8330db10 d renoir_clk_map +ffffffff8330e000 d smu_v13_0_0_message_map +ffffffff8330ea50 d smu_v13_0_0_feature_mask_map +ffffffff8330ee20 d smu_v13_0_0_table_map +ffffffff8330eea0 d smu_v13_0_0_pwr_src_map +ffffffff8330eeb0 d smu_v13_0_0_workload_map +ffffffff8330eef0 d smu_v13_0_0_clk_map +ffffffff8330f000 d smu_v13_0_4_message_map +ffffffff8330fa50 d smu_v13_0_4_table_map +ffffffff8330fad0 d smu_v13_0_4_feature_mask_map +ffffffff83310000 d smu_v13_0_5_table_map +ffffffff83310080 d smu_v13_0_5_message_map +ffffffff83310ad0 d smu_v13_0_5_feature_mask_map +ffffffff83311000 d smu_v13_0_7_message_map +ffffffff83311a50 d smu_v13_0_7_feature_mask_map +ffffffff83311e20 d smu_v13_0_7_table_map +ffffffff83311ea0 d smu_v13_0_7_pwr_src_map +ffffffff83311eb0 d smu_v13_0_7_workload_map +ffffffff83311ef0 d smu_v13_0_7_clk_map +ffffffff83312000 d yellow_carp_table_map +ffffffff83312080 d yellow_carp_message_map +ffffffff83312ad0 d yellow_carp_feature_mask_map +ffffffff83313000 D pci_conf_lock +ffffffff83313010 D pci_bus_dma_tag +ffffffff83313088 D msi_pic +ffffffff83313118 D msix_pic +ffffffff83314000 D pchb_cd +ffffffff83315000 D amas_cd +ffffffff83316000 D cardslot_cd +ffffffff83317000 D cardbus_cd +ffffffff83318000 d csdevs +ffffffff83319000 d ral_rt2560_opns +ffffffff83319028 d ral_rt2661_opns +ffffffff83319050 d ral_rt2860_opns +ffffffff8331a000 D pcmcia_cd +ffffffff8331b000 D pcmcia_3cxem556_func0 +ffffffff8331b0b8 D pcmcia_3cxem556_func0_cfe0 +ffffffff8331b158 D pcmcia_megahertz_xjem1144_func0 +ffffffff8331b210 D pcmcia_megahertz_xjem1144_func0_cfe0 +ffffffff8331b2b0 d pcmcia_3cxem556_func1 +ffffffff8331b368 d pcmcia_3cxem556_func1_cfe0 +ffffffff8331b408 d pcmcia_megahertz_xjem1144_func1 +ffffffff8331b4c0 d pcmcia_megahertz_xjem1144_func1_cfe0 +ffffffff8331b560 d pcmcia_sierra_a555_func1 +ffffffff8331b618 d pcmcia_sierra_a555_func1_cfe0 +ffffffff8331b6b8 d pcmcia_sveclancard_func0 +ffffffff8331b770 d pcmcia_sveclancard_func0_cfe0 +ffffffff8331c000 D ep_pcmcia_prod +ffffffff8331d000 D aic_pcmcia_prod +ffffffff8331e000 D com_pcmcia_prod +ffffffff8331f000 D wdc_pcmcia_pr +ffffffff83320000 D sm_pcmcia_prod +ffffffff83321000 D xe_cd +ffffffff83322000 D pcib_cd +ffffffff83323000 D amdpcib_cd +ffffffff83324000 D tcpcib_cd +ffffffff83325000 D aapic_cd +ffffffff83326000 D hme_cd +ffffffff83327000 D isa_cd +ffffffff83328000 D isadma_cd +ffffffff83329000 D fdc_cd +ffffffff8332a000 D fd_types +ffffffff8332a1f8 D fd_cd +ffffffff8332b000 D mpu_cd +ffffffff8332c000 D pcppi_cd +ffffffff8332d000 D spkr_cd +ffffffff8332e000 D wbsio_cd +ffffffff8332f000 D schsio_cd +ffffffff83330000 D it_cd +ffffffff83331000 D uguru_cd +ffffffff83332000 D aps_cd +ffffffff83333000 D isa_bus_dma_tag +ffffffff83334000 D wsdisplay_cd +ffffffff83334020 D wsdisplay_cons +ffffffff83334058 D wsdisplay_defaultscreens +ffffffff83335000 D wskbd_cd +ffffffff83335020 D wskbd_default_bell_data +ffffffff83335030 D wskbd_default_keyrepeat_data +ffffffff83335040 D wskbd_srcops +ffffffff83336000 d compose_tab +ffffffff83337000 D wsmouse_cd +ffffffff83337020 D wsmouse_srcops +ffffffff83338000 D wsmux_srcops +ffffffff83338030 D wsmux_tree_lock +ffffffff83339000 D vt100_output +ffffffff8333a000 D pckbd_cd +ffffffff8333b000 D pms_cd +ffffffff8333b020 d synaptics_params +ffffffff8333b030 d alps_params +ffffffff8333c000 D skgpio_cd +ffffffff8333d000 D pctr_conf_lock +ffffffff8333e000 D ukbd_keymapdata +ffffffff8333f000 D usbrev_str +ffffffff8333f030 D usb_cd +ffffffff83340000 d usbd_ratecheck.errinterval +ffffffff83341000 D uhub_cd +ffffffff83342000 D uaudio_cd +ffffffff83343000 D uvideo_ctrls +ffffffff833432d8 D uvideo_cd +ffffffff83344000 D utvfu_norm_params +ffffffff83344030 D utvfu_cd +ffffffff83345000 D udl_reg_vals_640x480_60 +ffffffff83345020 D udl_reg_vals_640x480_67 +ffffffff83345040 D udl_reg_vals_640x480_72 +ffffffff83345060 D udl_reg_vals_640x480_75 +ffffffff83345080 D udl_reg_vals_800x480_61 +ffffffff833450a0 D udl_reg_vals_800x600_56 +ffffffff833450c0 D udl_reg_vals_800x600_60 +ffffffff833450e0 D udl_reg_vals_800x600_72 +ffffffff83345100 D udl_reg_vals_800x600_74 +ffffffff83345120 D udl_reg_vals_800x600_75 +ffffffff83345140 D udl_reg_vals_1024x768_60 +ffffffff83345160 D udl_reg_vals_1024x768_70 +ffffffff83345180 D udl_reg_vals_1024x768_75 +ffffffff833451a0 D udl_reg_vals_1280x800_60 +ffffffff833451c0 D udl_reg_vals_1280x960_60 +ffffffff833451e0 D udl_reg_vals_1280x1024_60 +ffffffff83345200 D udl_reg_vals_1280x1024_75 +ffffffff83345220 D udl_reg_vals_1366x768_60 +ffffffff83345240 D udl_reg_vals_1440x900_60 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cdce_cd +ffffffff8336c000 D urndis_cd +ffffffff8336d000 D mos_cd +ffffffff8336e000 D mue_cd +ffffffff8336f000 D udav_cd +ffffffff83370000 D upl_devs +ffffffff83370008 D upl_cd +ffffffff83371000 D ugl_devs +ffffffff83371008 D ugl_cd +ffffffff83372000 D url_cd +ffffffff83373000 D ure_cd +ffffffff83374000 D uaq_cd +ffffffff83375000 D umodem_cd +ffffffff83376000 D uftdi_cd +ffffffff83377000 D uplcom_cd +ffffffff83378000 D umct_cd +ffffffff83379000 D uvscom_cd +ffffffff8337a000 D ubsa_cd +ffffffff8337b000 D ukspan_cd +ffffffff8337c000 D uslcom_cd +ffffffff8337d000 D uark_cd +ffffffff8337e000 D moscom_cd +ffffffff8337f000 D umcs_cd +ffffffff83380000 D uscom_cd +ffffffff83381000 D ucrcom_cd +ffffffff83382000 D uxrcom_cd +ffffffff83383000 D uipaq_cd +ffffffff83384000 D umsm_cd +ffffffff83385000 D uchcom_cd +ffffffff83386000 D uticom_cd +ffffffff83387000 D wi_func_usb +ffffffff83387060 D wi_usb_cd +ffffffff83388000 D atu_cd +ffffffff83388020 D atu_devs +ffffffff83388270 D atu_radfirm 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acpicpu_set_pdc.cpu_oscuuid +ffffffff833c3000 D acpihpet_cd +ffffffff833c3020 d hpet_timecounter +ffffffff833c4000 D acpiec_cd +ffffffff833c4020 D acpiec_hids +ffffffff833c5000 D acpitz_cd +ffffffff833c5020 D acpitz_perflevel +ffffffff833c6000 D acpimadt_cd +ffffffff833c7000 D acpimcfg_cd +ffffffff833c8000 D acpiprt_map_list +ffffffff833c8010 D acpiprt_cd +ffffffff833c8030 D acpiprt_pri +ffffffff833c9000 D acpidmar_force_cm +ffffffff833c9008 D acpidmar_cd +ffffffff833c9030 D vtd_faults +ffffffff833ca000 D acpidock_cd +ffffffff833cb000 D abl_cd +ffffffff833cb020 D abl_hids +ffffffff833cc000 D asmc_cd +ffffffff833cc020 D asmc_hids +ffffffff833cd000 D acpiasus_cd +ffffffff833cd020 D acpiasus_hids +ffffffff833ce000 D acpithinkpad_cd +ffffffff833ce020 D acpithinkpad_hids +ffffffff833cf000 D acpitoshiba_cd +ffffffff833cf020 D acpitoshiba_hids +ffffffff833d0000 D acpisony_cd +ffffffff833d1000 D acpivideo_cd +ffffffff833d2000 D acpivout_cd +ffffffff833d3000 D acpipwrres_cd +ffffffff833d4000 D aibs_cd +ffffffff833d4020 d aibs_hids +ffffffff833d5000 D aplgpio_cd +ffffffff833d5020 D aplgpio_hids +ffffffff833d6000 D bytgpio_cd +ffffffff833d6020 D bytgpio_hids +ffffffff833d7000 D chvgpio_cd +ffffffff833d7020 D chvgpio_hids +ffffffff833d8000 D glkgpio_cd +ffffffff833d8020 D glkgpio_hids +ffffffff833d9000 D pchgpio_cd +ffffffff833d9020 D pchgpio_hids +ffffffff833d9070 D pchgpio_devices +ffffffff833da000 D tipmic_cd +ffffffff833da020 D tipmic_thermal_regmap +ffffffff833da030 D tipmic_power_regmap +ffffffff833db000 D ccpmic_cd +ffffffff833db020 D ccpmic_thermal_regmap +ffffffff833db023 D ccpmic_power_regmap +ffffffff833dc000 D com_hids +ffffffff833dd000 D sdhc_hids +ffffffff833de000 D dwiic_hids +ffffffff833de050 D ihidev_hids +ffffffff833de070 D iatp_hids +ffffffff833de090 d dwiic_acpi_found_ihidev.i2c_hid_guid +ffffffff833df000 D acpicbkbd_cd +ffffffff833df020 D acpicbkbd_hids +ffffffff833e0000 D acpials_cd +ffffffff833e0020 D acpials_hids +ffffffff833e1000 D tpm_cd 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D maxprocess +ffffffff833f3014 D maxthread +ffffffff833f3018 D maxfiles +ffffffff833f3020 D nmbclust +ffffffff833f3028 D mblowat +ffffffff833f302c D mcllowat +ffffffff833f3030 D bufcachepercent +ffffffff833f3034 D fscale +ffffffff833f3038 D shminfo +ffffffff833f304c D seminfo +ffffffff833f4000 D extraloc +ffffffff833f4100 D rextraloc +ffffffff833f4110 D locnames +ffffffff833f41f0 D locnamp +ffffffff833f4408 D pv_size +ffffffff833f4410 D pv +ffffffff833f4630 d loc +ffffffff833f4ac0 D cfdata +ffffffff833fb580 D cfroots +ffffffff833fb58c D cfroots_size +ffffffff833fb590 D pdevnames +ffffffff833fb6f0 D pdevnames_size +ffffffff833fb700 D pdevinit +ffffffff833fc000 D rootdev +ffffffff833fc004 D dumpdev +ffffffff833fc010 D swdevt +ffffffff833fd000 A __kudata_start +ffffffff833fd000 D tlb_shoot_first_pcid +ffffffff833fd008 D tlb_shoot_addr1 +ffffffff833fd010 D tlb_shoot_addr2 +ffffffff833fd018 D tlb_shoot_wait +ffffffff833fe000 A __kudata_end +ffffffff833fe000 C _edata +ffffffff833fe000 b drm_minors_idr +ffffffff833fe008 B drm_refcnt +ffffffff833ff000 B vga_console_screen +ffffffff833ff070 B vga_console_attached +ffffffff833ff078 B vga_console_vc +ffffffff833ff488 B vgaconsole +ffffffff833ff48c B vga_console_type +ffffffff83400000 b wdc_alloc_queue.inited +ffffffff83400008 B wdc_xfer_pool +ffffffff834001b0 B wdc_xfer_iopool +ffffffff83401000 B aic_debug +ffffffff83402000 B gdt_cnt +ffffffff83402004 B gdt_polling +ffffffff83402005 B gdt_from_wait +ffffffff83402008 b gdt_exec_ccb.__level +ffffffff8340200c B gdt_wait_index +ffffffff83402010 B gdt_wait_gdt +ffffffff83403000 B sili_error_pmp_ports +ffffffff83404000 B ncr53c9x_debug +ffffffff83404008 b ecb_iopool +ffffffff83404048 b ecb_pool_initialized +ffffffff83404050 b ecb_pool +ffffffff834041f8 B sdebug +ffffffff83405000 B epic_copy_small +ffffffff83406000 B comconsaddr +ffffffff83406008 B comconsiot +ffffffff83406010 B comconsioh +ffffffff83406018 B comconsfreq +ffffffff8340601c B commajor +ffffffff83406020 B comconsunit +ffffffff83406024 B comcons_reg_shift +ffffffff83406028 B comconsattached +ffffffff8340602c B comcons_reg_width +ffffffff83407000 B pckbc_console +ffffffff83407004 B pckbc_console_attached +ffffffff83407008 B pckbc_consdata +ffffffff834070e0 b pckbc_cons_slotdata +ffffffff83408000 b cy_poll.counter +ffffffff83409000 B atw_xindiv2 +ffffffff8340a000 B rtw_rfprog_fallback +ffffffff8340a004 B rtw_do_chip_reset +ffffffff8340b000 b malo_cmd_string.cmd_buf +ffffffff8340c000 b iosf_mbi +ffffffff8340d000 B uhcixfer +ffffffff8340e000 B ohcixfer +ffffffff8340e008 b ohci_intr.ohci_intr_tv +ffffffff8340f000 B ehcixfer +ffffffff83410000 B xhcixfer +ffffffff83411000 B ipmi_enabled +ffffffff83411008 B ipmi_sensor_list +ffffffff83412000 B mpath +ffffffff83413000 B sr_bootuuid +ffffffff83413010 B sr_bootkey +ffffffff83413030 B softraid0 +ffffffff83413038 B sr_hotplug_callbacks +ffffffff83414000 B gf_pow +ffffffff83414300 B gf_map +ffffffff83414b00 B gf_log +ffffffff83415000 b ksym_syms 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spd_tables +ffffffff83506008 B spd_table_max +ffffffff83506010 B ipsec_policy_pool +ffffffff835061b8 B ipsec_acquire_pool +ffffffff83507000 B ipip_allow +ffffffff83507008 B ipipcounters +ffffffff83508000 B encdebug +ffffffff83508004 B ipsec_soft_allocations +ffffffff83508008 B ipsec_exp_allocations +ffffffff8350800c B ipsec_soft_bytes +ffffffff83508010 B ipsec_exp_bytes +ffffffff83508014 B ipcomp_enable +ffffffff83508018 B espcounters +ffffffff83508020 B ahcounters +ffffffff83508028 B ipcompcounters +ffffffff83508030 B ipseccounters +ffffffff83508040 B ipsec_def_enc +ffffffff83508060 B ipsec_def_auth +ffffffff83508080 B ipsec_def_comp +ffffffff83509000 B carp_send_all_recur +ffffffff83509008 B carpcounters +ffffffff8350a000 B des_check_key +ffffffff8350b000 B crypto_drivers_num +ffffffff8350b008 B crypto_drivers +ffffffff8350b010 B cryptop_pool +ffffffff8350c000 B swcr_sessions +ffffffff8350c008 B swcr_sesnum +ffffffff8350d000 B mpls_push_expnull_ip +ffffffff8350d004 B mpls_push_expnull_ip6 +ffffffff8350d008 B mpls_mapttl_ip6 +ffffffff8350e000 b krpc_get_xid.krpc_xid_ctx +ffffffff8350e038 b krpc_get_xid.called +ffffffff8350e03c b krpc_call.xid +ffffffff8350f000 B nfs_bufqlen +ffffffff8350f004 B nfs_bufqmax +ffffffff8350f008 B nfs_bufq +ffffffff83510000 B nfsbootdevname +ffffffff83511000 B nfs_node_pool +ffffffff83512000 B kevlist +ffffffff83512008 B pnfskq +ffffffff83513000 B nfs_realign_test +ffffffff83513004 B nfs_realign_count +ffffffff83514000 B nfsrvhash +ffffffff83514008 B nfsrvhashtbl +ffffffff83514010 B nfsrvhashkey +ffffffff83514020 B nfsrvlruhead +ffffffff83514030 B numnfsrvcache +ffffffff83515000 b nfs_get_xid.nfs_xid_ctx +ffffffff83515038 b nfs_get_xid.called +ffffffff8351503c B rpc_call +ffffffff83515040 B rpc_vers +ffffffff83515044 B nfs_prog +ffffffff83515048 B rpc_reply +ffffffff8351504c B rpc_msgdenied +ffffffff83515050 B rpc_msgaccepted +ffffffff83515054 B rpc_mismatch +ffffffff83515058 B rpc_autherr +ffffffff8351505c B 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uao_create.kernel_object_store +ffffffff835281f0 b uao_create.bootstrap_kernel_object_lock +ffffffff83528200 b uao_create.kobj_alloced +ffffffff83528208 B uvm_aobj_pool +ffffffff835283b0 b uao_list +ffffffff83529000 B udv_list +ffffffff83529008 B udv_lock +ffffffff8352a000 b uvmadvice +ffffffff8352b000 b uvm_pause.toggle +ffffffff8352c000 B uvmexp +ffffffff8352c158 B uvm +ffffffff8352d000 B kernel_map +ffffffff8352d008 b kernel_map_store +ffffffff8352e000 B uvm_maxkaddr +ffffffff8352e008 b uvm_kmapent_mtx +ffffffff8352e018 b uvm_kmapent_last_warn_time +ffffffff8352e028 B uvm_map_entry_kmem_pool +ffffffff8352e1d0 B uvm_map_entry_pool +ffffffff8352e380 b uvm_map_init.kernel_map_entry +ffffffff83558380 B uvm_vmspace_pool +ffffffff83559000 B averunnable +ffffffff83559020 B malloc_conf +ffffffff8355a000 B uvm_wxabort +ffffffff8355b000 B vm_nphysseg +ffffffff8355b010 B vm_physmem +ffffffff8355b310 b virtual_space_start +ffffffff8355b318 b virtual_space_end +ffffffff8355c000 B psegs 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frag6_queue +ffffffff83564360 B frag6_nfrags +ffffffff83564364 B frag6_nfragpackets +ffffffff83565000 B icmp6_mtudisc_callbacks +ffffffff83565008 B icmp6_mtudisc_timeout_q +ffffffff83565040 B icmp6_redirect_timeout_q +ffffffff83565078 B icmp6counters +ffffffff83565080 b icmp6_redirect_diag.buf +ffffffff83565480 b icmp6errppslim_last +ffffffff83565490 b icmp6errpps_count +ffffffff83566000 b ip6send_mq +ffffffff83566030 B ip6counters +ffffffff83566040 B ip6_soiikey +ffffffff83567000 B ip6_mrouter_ver +ffffffff83567010 B ip6_mrouter +ffffffff83567810 B ip6_mrouterq +ffffffff83567848 B mrt6stat +ffffffff835678b0 B ip6_mrtproto +ffffffff83568000 B ip6_id_ctx +ffffffff83569000 b mld6_init.hbh_buf +ffffffff83569008 B mld6_timers_are_running +ffffffff83569010 b ip6_opts +ffffffff8356a000 B nd6_maxnudhint +ffffffff8356a004 B nd6_debug +ffffffff8356a008 B nd6_list +ffffffff8356a018 B nd6_pool +ffffffff8356a1c0 B nd6_expire_task +ffffffff8356a1f0 B nd6_timer_to +ffffffff8356a238 B nd6_slowtimo_ch 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mem_range_softc +ffffffff83576000 B mtrrdef +ffffffff83576008 B mtrrcap +ffffffff83577000 B nkptp +ffffffff83577020 B pg_nx +ffffffff83577028 B pg_g_kern +ffffffff83577030 B pmap_initialized +ffffffff83577038 B kernel_pmap_store +ffffffff83577110 B cr3_reuse_pcid +ffffffff83577118 b cr3_pcid_temp +ffffffff83577120 B virtual_avail +ffffffff83577128 B pg_xo +ffffffff83577130 B protection_codes +ffffffff83577170 B pmap_use_pcid +ffffffff83577174 b cr3_pcid_proc +ffffffff83577178 B cr3_pcid_proc_intel +ffffffff83577180 B pmaps +ffffffff83577188 B pmap_pmap_pool +ffffffff83577330 B pmap_pv_pool +ffffffff835774d8 B pmap_pdp_pool +ffffffff83578000 B fpu_mxcsr_mask +ffffffff83578008 B xsave_mask +ffffffff83579000 B x86_soft_intrs +ffffffff8357a000 B i8259_imen +ffffffff8357b000 B intr_shared_edge +ffffffff8357b008 B fake_softclock_intrhand +ffffffff8357b078 B fake_softnet_intrhand +ffffffff8357b0e8 B fake_softtty_intrhand +ffffffff8357b158 B fake_timer_intrhand +ffffffff8357b1c8 B fake_ipi_intrhand +ffffffff8357b238 B fake_xen_intrhand +ffffffff8357b2a8 B fake_hyperv_intrhand +ffffffff8357c000 B atdevbase +ffffffff8357c010 b ioport_ex_storage +ffffffff8357c2e0 B ioport_ex +ffffffff8357c2f0 b iomem_ex_storage +ffffffff8357c5c0 B iomem_ex +ffffffff8357c5c8 b ioport_malloc_safe +ffffffff8357d000 B mp_perflevel +ffffffff8357d008 B ul_setperf +ffffffff8357e000 B cn_tab +ffffffff8357f000 B ddb_mp_mutex +ffffffff8357f010 B ddb_state +ffffffff8357f018 B ddb_regs +ffffffff8357f0c8 B db_switch_cpu +ffffffff8357f0d0 B db_switch_to_cpu +ffffffff8357f0d8 B ddb_active_cpu +ffffffff83580000 B rtclock_tval +ffffffff83580008 B i8254_ticked +ffffffff8358000c B i8254_offset +ffffffff83580010 B i8254_lastcount +ffffffff83580018 b rtcstart.rtcdrain_timeout +ffffffff83580060 B rtc_update_century +ffffffff83580068 B rtc_todr +ffffffff83581000 B k8pnow_current_state +ffffffff83582000 B bus_clock +ffffffff83582008 b est_fqlist +ffffffff83583000 B k1x_current_state +ffffffff83584000 B rotatedfonts +ffffffff83584008 B rasops_framebuffers ffffffff83585000 b stamp_attr ffffffff83585010 b stamp ffffffff83586000 b stamp_attr ffffffff83586010 b stamp -ffffffff83586110 b stamp_mutex -ffffffff83587000 B fontlist -ffffffff83587010 b wsfont_init.again -ffffffff83588000 B urlphydebug -ffffffff83589000 b scsi_init.scsi_init_done -ffffffff83589008 B scsi_xfer_pool -ffffffff835891b0 B scsi_plug_pool -ffffffff83589360 b scsi_decode_sense.rqsbuf -ffffffff8358a000 b sddoingadump -ffffffff8358b000 b wddoingadump -ffffffff8358b004 b wddumprecalibrated -ffffffff8358c000 B mp_verbose -ffffffff8358c004 B isa_has_been_seen -ffffffff8358c008 B mp_busses -ffffffff8358c010 B mp_nbusses -ffffffff8358c018 B mp_intrs -ffffffff8358c020 B mp_nintrs -ffffffff8358c028 B mp_isa_bus -ffffffff8358c030 B mp_eisa_bus -ffffffff8358d000 B smbios_entry -ffffffff8358d020 B smbios_bios_version -ffffffff8358d060 B smbios_bios_date -ffffffff8358d0a0 B smbios_board_vendor -ffffffff8358d0e0 B smbios_board_prod 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isa_dma_stats_nbouncebufs +ffffffff8370d0e0 B intrlevel +ffffffff8370e000 B wsdisplay_console_conf +ffffffff8370e028 B wsdisplay_console_initted +ffffffff8370e030 B wsdisplay_console_device +ffffffff8370e038 B wsdisplay_clearonclose +ffffffff8370e03c B wsdisplay_cons_pollmode +ffffffff8370e040 B wsdisplay_cons_kbd_pollc +ffffffff8370e048 B ws_get_param +ffffffff8370e050 B ws_set_param +ffffffff8370f000 b wskbd_console_data +ffffffff8370f040 b wskbd_console_initted +ffffffff8370f048 b wskbd_console_device +ffffffff8370f050 B wskbd_get_backlight +ffffffff8370f058 B wskbd_set_backlight +ffffffff8370f060 b wskbd_cngetc.num +ffffffff8370f064 b wskbd_cngetc.pos +ffffffff83710000 b compose_tab_inorder +ffffffff83711000 B nwsmux +ffffffff83711008 B wsmuxdevs +ffffffff83712000 B wsemul_vt100_console_emuldata +ffffffff83713000 B pckbd_consdata +ffffffff83713038 B pckbd_bell_fn +ffffffff83713040 B pckbd_bell_fn_arg +ffffffff83714000 b wscninit.initted +ffffffff83715000 B pctr_isamd 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