--- 7.3/2023-05-18T04:43:55Z/2023-04-23T00:00:00Z/nm-bsd-ot14.txt Sat May 20 07:14:14 2023 +++ 7.3/2023-05-18T04:43:55Z/2023-04-24T00:00:00Z/nm-bsd-ot14.txt Sat May 20 09:15:42 2023 @@ -2,14 +2,14 @@ 00011006 A mp_pdirpa 0001419d A acpi_pdirpa 01000000 A __kernel_phys_base -02549000 T __kernel_kutext_phys -0254d000 C __kernel_cptext_phys -0254e000 C __kernel_rodata_phys -02e01000 R __kernel_kutext_page_phys -02e03000 C __kernel_randomdata_phys -030c4000 R __kernel_data_phys -033f5000 D __kernel_kudata_phys -033f6000 C __kernel_bss_phys +0254c000 T __kernel_kutext_phys +02550000 C __kernel_cptext_phys +02551000 C __kernel_rodata_phys +02e06000 R __kernel_kutext_page_phys +02e08000 C __kernel_randomdata_phys +030c9000 R __kernel_data_phys +033fc000 D __kernel_kudata_phys +033fd000 C __kernel_bss_phys 03800000 B __kernel_phys_end 80000000 A __kernel_virt_to_phys ffffffff80000000 A __kernel_base @@ -3472,25883 +3472,25872 @@ ffffffff811aacd0 T bwi_txeof_status ffffffff811aad90 T _bwi_txeof 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uhci_timeout_task +ffffffff811b1710 T uhci_abort_xfer +ffffffff811b1890 T uhci_free_std +ffffffff811b1900 T uhci_free_sqh +ffffffff811b1940 T uhci_free_std_chain +ffffffff811b1a00 T uhci_alloc_std_chain +ffffffff811b1dc0 T uhci_device_request +ffffffff811b20c0 T uhci_remove_intr +ffffffff811b21b0 T uhci_device_isoc_enter +ffffffff811b23a0 T uhci_setup_isoc +ffffffff811b2690 T uhci_add_intr +ffffffff811b2700 T uhci_device_setintr +ffffffff811b2b30 T uhci_portreset +ffffffff811b3000 T ohci_open +ffffffff811b3420 T ohci_setaddr +ffffffff811b35b0 T ohci_softintr +ffffffff811b3d20 T ohci_poll +ffffffff811b3d90 T ohci_allocx +ffffffff811b3db0 T ohci_freex +ffffffff811b3dd0 T ohci_root_ctrl_transfer +ffffffff811b3e30 T ohci_root_ctrl_start +ffffffff811b4830 T ohci_root_ctrl_abort +ffffffff811b4860 T ohci_root_ctrl_close +ffffffff811b4890 T ohci_root_ctrl_done +ffffffff811b48c0 T ohci_root_intr_transfer +ffffffff811b4930 T ohci_root_intr_start +ffffffff811b4980 T ohci_root_intr_abort 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ohci_abort_xfer +ffffffff811b8650 T ohci_device_setintr +ffffffff811b8890 T ohci_setup_isoc +ffffffff811b8940 T ohci_close_pipe +ffffffff811b8ab0 T ohci_device_isoc_enter +ffffffff811b9000 T ehci_open +ffffffff811b9410 T ehci_setaddr +ffffffff811b94b0 T ehci_softintr +ffffffff811b9680 T ehci_poll +ffffffff811b96f0 T ehci_allocx +ffffffff811b9740 T ehci_freex +ffffffff811b9780 T ehci_root_ctrl_transfer +ffffffff811b97e0 T ehci_root_ctrl_start +ffffffff811ba330 T ehci_root_ctrl_abort +ffffffff811ba360 T ehci_root_ctrl_close +ffffffff811ba390 T ehci_root_ctrl_done +ffffffff811ba3c0 T ehci_root_intr_transfer +ffffffff811ba430 T ehci_root_intr_start +ffffffff811ba480 T ehci_root_intr_abort +ffffffff811ba4d0 T ehci_root_intr_close +ffffffff811ba500 T ehci_root_intr_done +ffffffff811ba530 T ehci_device_ctrl_transfer +ffffffff811ba590 T ehci_device_ctrl_start +ffffffff811ba990 T ehci_device_ctrl_abort +ffffffff811ba9b0 T ehci_device_ctrl_close +ffffffff811ba9c0 T ehci_device_ctrl_done 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ehci_alloc_sitd_chain +ffffffff811c0000 T xhci_pipe_open +ffffffff811c0290 T xhci_setaddr +ffffffff811c0390 T xhci_softintr +ffffffff811c03e0 T xhci_poll +ffffffff811c0450 T xhci_allocx +ffffffff811c0470 T xhci_freex +ffffffff811c0490 T xhci_root_ctrl_transfer +ffffffff811c04f0 T xhci_root_ctrl_start +ffffffff811c1060 T xhci_noop +ffffffff811c1090 T xhci_pipe_close +ffffffff811c1330 T xhci_root_intr_transfer +ffffffff811c13a0 T xhci_root_intr_start +ffffffff811c13f0 T xhci_root_intr_abort +ffffffff811c1440 T xhci_root_intr_done +ffffffff811c1470 T xhci_device_ctrl_transfer +ffffffff811c14d0 T xhci_device_ctrl_start +ffffffff811c1960 T xhci_device_ctrl_abort +ffffffff811c1980 T xhci_device_generic_transfer +ffffffff811c19e0 T xhci_device_generic_start +ffffffff811c1fe0 T xhci_device_generic_abort +ffffffff811c2030 T xhci_device_generic_done +ffffffff811c2070 T xhci_device_isoc_transfer +ffffffff811c20c0 T xhci_device_isoc_start +ffffffff811c2730 T usbd_dma_contig_alloc +ffffffff811c28f0 T usbd_dma_contig_free +ffffffff811c29c0 T xhci_init +ffffffff811c3350 T xhci_reset +ffffffff811c34c0 T xhci_ring_alloc +ffffffff811c35c0 T xhci_ring_free +ffffffff811c3690 T xhci_scratchpad_alloc +ffffffff811c38d0 T xhci_config +ffffffff811c3b70 T xhci_detach +ffffffff811c4030 T xhci_command_abort +ffffffff811c4160 T xhci_scratchpad_free +ffffffff811c4310 T xhci_activate +ffffffff811c4490 T xhci_reinit +ffffffff811c4590 T xhci_ring_reset +ffffffff811c4640 T xhci_intr +ffffffff811c4690 T xhci_intr1 +ffffffff811c47f0 T xhci_event_dequeue +ffffffff811c4a60 T xhci_ring_consume +ffffffff811c4b30 T xhci_event_xfer +ffffffff811c4d60 T xhci_event_command +ffffffff811c5040 T xhci_event_port_change +ffffffff811c5100 T xhci_skip_all +ffffffff811c51a0 T xhci_xfer_done +ffffffff811c52a0 T xhci_event_xfer_generic +ffffffff811c56a0 T xhci_event_xfer_isoc +ffffffff811c58c0 T xhci_xfer_length_generic +ffffffff811c5980 T xhci_cmd_reset_ep_async +ffffffff811c5ab0 T xhci_cmd_set_tr_deq_async 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ieee80211_watchdog +ffffffff813fd320 T ieee80211_min_basic_rate +ffffffff813fd420 T ieee80211_max_basic_rate +ffffffff813fd4f0 T ieee80211_next_mode +ffffffff813fd5f0 T ieee80211_chan2mode +ffffffff813fd680 T ieee80211_rate2plcp +ffffffff813fd780 T ieee80211_plcp2rate +ffffffff813fe000 T ieee80211_amrr_node_init +ffffffff813fe040 T ieee80211_amrr_choose +ffffffff813ff000 T ieee80211_crypto_attach +ffffffff813ff090 T ieee80211_set_key +ffffffff813ff130 T ieee80211_delete_key +ffffffff813ff1a0 T ieee80211_crypto_detach +ffffffff813ff260 T ieee80211_crypto_clear_groupkeys +ffffffff813ff3b0 T ieee80211_cipher_keylen +ffffffff813ff410 T ieee80211_get_txkey +ffffffff813ff490 T ieee80211_get_rxkey +ffffffff813ff570 T ieee80211_encrypt +ffffffff813ff5f0 T ieee80211_decrypt +ffffffff813ff760 T ieee80211_prf +ffffffff813ff880 T ieee80211_kdf +ffffffff813ff9e0 T ieee80211_derive_ptk +ffffffff813ffb50 T ieee80211_derive_pmkid +ffffffff813ffc70 T ieee80211_eapol_key_mic +ffffffff813ffda0 T ieee80211_eapol_key_check_mic +ffffffff813ffe20 T ieee80211_eapol_key_encrypt +ffffffff813fffd0 T ieee80211_eapol_key_decrypt +ffffffff814000e0 T ieee80211_pmksa_add +ffffffff81400230 T ieee80211_pmksa_find +ffffffff81401000 T ieee80211_bip_set_key +ffffffff81401080 T ieee80211_bip_delete_key +ffffffff814010f0 T ieee80211_bip_encap +ffffffff814012f0 T ieee80211_bip_decap +ffffffff81402000 T ieee80211_ccmp_set_key +ffffffff81402080 T ieee80211_ccmp_delete_key +ffffffff814020f0 T ieee80211_ccmp_encrypt +ffffffff814025b0 t ieee80211_ccmp_phase1 +ffffffff81402940 T ieee80211_ccmp_get_pn +ffffffff81402a50 T ieee80211_ccmp_decrypt +ffffffff81403000 T ieee80211_tkip_set_key +ffffffff814030a0 T ieee80211_tkip_delete_key +ffffffff81403110 T ieee80211_tkip_mic +ffffffff81403290 T ieee80211_tkip_encrypt +ffffffff814036e0 t Phase1 +ffffffff81403870 t Phase2 +ffffffff81403b00 T ieee80211_tkip_get_tsc +ffffffff81403c10 T ieee80211_tkip_decrypt +ffffffff81404110 T ieee80211_michael_mic_failure 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ieee80211_parse_edca_params_body +ffffffff81408110 T ieee80211_parse_edca_params +ffffffff81408160 T ieee80211_parse_wmm_params +ffffffff814081b0 T ieee80211_parse_rsn_cipher +ffffffff81408260 T ieee80211_parse_rsn_akm +ffffffff81408310 T ieee80211_parse_rsn_body +ffffffff81408590 T ieee80211_parse_rsn +ffffffff814085e0 T ieee80211_parse_wpa +ffffffff81408640 T ieee80211_save_ie +ffffffff814086f0 T ieee80211_recv_probe_resp +ffffffff81409490 T ieee80211_recv_probe_req +ffffffff81409750 T ieee80211_recv_auth +ffffffff814097f0 T ieee80211_recv_assoc_req +ffffffff8140a1a0 T ieee80211_recv_assoc_resp +ffffffff8140a700 T ieee80211_recv_deauth +ffffffff8140a870 T ieee80211_recv_disassoc +ffffffff8140a980 T ieee80211_recv_addba_req +ffffffff8140ada0 T ieee80211_addba_req_refuse +ffffffff8140ae40 T ieee80211_addba_req_accept +ffffffff8140aed0 T ieee80211_recv_addba_resp +ffffffff8140b070 T ieee80211_addba_resp_refuse +ffffffff8140b0b0 T ieee80211_addba_resp_accept +ffffffff8140b130 T ieee80211_recv_delba +ffffffff8140b2b0 T ieee80211_recv_sa_query_req +ffffffff8140b320 T ieee80211_recv_sa_query_resp +ffffffff8140b390 T ieee80211_recv_action +ffffffff8140b4b0 T ieee80211_recv_mgmt +ffffffff8140b610 T ieee80211_bar_tid +ffffffff8140c000 T ieee80211_node2req +ffffffff8140c370 T ieee80211_req2node +ffffffff8140c480 T ieee80211_disable_wep +ffffffff8140c590 T ieee80211_disable_rsn +ffffffff8140c5f0 T ieee80211_ioctl +ffffffff8140e000 T ieee80211_inact_timeout +ffffffff8140e0a0 T ieee80211_node_cache_timeout +ffffffff8140e0e0 T ieee80211_clean_nodes +ffffffff8140e400 T ieee80211_print_ess +ffffffff8140e5f0 T ieee80211_print_ess_list +ffffffff8140e660 T ieee80211_get_ess +ffffffff8140e6f0 T ieee80211_del_ess +ffffffff8140e850 T ieee80211_add_ess +ffffffff8140eed0 T ieee80211_ess_adjust_rssi +ffffffff8140ef40 T ieee80211_ess_calculate_score +ffffffff8140f0a0 T ieee80211_ess_is_better +ffffffff8140f1f0 T ieee80211_match_ess +ffffffff8140f2e0 T ieee80211_switch_ess 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ieee80211_node_tx_stopped +ffffffff81411700 T ieee80211_node_switch_bss +ffffffff814119d0 T ieee80211_node_tx_flushed +ffffffff81411b50 T ieee80211_find_node +ffffffff81411bf0 T ieee80211_node_join_bss +ffffffff81411dd0 T ieee80211_choose_rsnparams +ffffffff81411f00 T ieee80211_node_choose_bss +ffffffff814120f0 T ieee80211_free_node +ffffffff814121f0 T ieee80211_node_cmp +ffffffff81412210 T ieee80211_clean_inactive_nodes +ffffffff814122d0 T ieee80211_get_rate +ffffffff81412330 T ieee80211_ba_del +ffffffff81412420 T ieee80211_node_set_timeouts +ffffffff81412520 T ieee80211_node_addba_request_ac_be_to +ffffffff81412540 T ieee80211_node_addba_request_ac_bk_to +ffffffff81412570 T ieee80211_node_addba_request_ac_vi_to +ffffffff814125a0 T ieee80211_node_addba_request_ac_vo_to +ffffffff814125d0 T ieee80211_setup_node +ffffffff81412760 T ieee80211_alloc_node +ffffffff81412800 T ieee80211_dup_bss +ffffffff814128d0 T ieee80211_find_txnode +ffffffff81412ae0 T ieee80211_find_rxnode +ffffffff81412df0 T ieee80211_node_tx_ba_clear +ffffffff81412e60 T ieee80211_release_node +ffffffff81412ef0 T ieee80211_clean_cached +ffffffff81412f80 T ieee80211_node_leave +ffffffff814131f0 T ieee80211_setup_htcaps +ffffffff814132a0 T ieee80211_clear_htcaps +ffffffff81413320 T ieee80211_setup_htop +ffffffff814133a0 T ieee80211_setup_vhtcaps +ffffffff81413420 T ieee80211_setup_vhtop +ffffffff81413480 T ieee80211_clear_vhtcaps +ffffffff814134d0 T ieee80211_setup_rates +ffffffff81413590 T ieee80211_node_trigger_addba_req +ffffffff814135f0 T ieee80211_node_addba_request +ffffffff81413620 T ieee80211_iserp_sta +ffffffff814137d0 T ieee80211_needs_auth +ffffffff81413800 T ieee80211_node_join_ht +ffffffff81413850 T ieee80211_node_join_rsn +ffffffff81413960 T ieee80211_count_longslotsta +ffffffff814139b0 T ieee80211_count_nonerpsta +ffffffff81413a10 T ieee80211_count_pssta +ffffffff81413a60 T ieee80211_count_rekeysta +ffffffff81413ab0 T ieee80211_node_join_11g +ffffffff81413c40 T ieee80211_node_join +ffffffff81413f40 T ieee80211_node_leave_ht +ffffffff81414070 T ieee80211_node_leave_vht +ffffffff814140c0 T ieee80211_node_leave_rsn +ffffffff81414200 T ieee80211_node_leave_11g +ffffffff81414520 T ieee80211_node_leave_pwrsave +ffffffff814146e0 T ieee80211_ibss_merge +ffffffff814149e0 T ieee80211_notify_dtim +ffffffff81414ac0 T ieee80211_ess_cmp +ffffffff81414ae0 t ieee80211_tree_RBT_COMPARE +ffffffff81414b00 t ieee80211_ess_tree_RBT_COMPARE +ffffffff81415000 T ieee80211_output +ffffffff814150f0 T ieee80211_action_name +ffffffff81415140 T ieee80211_mgmt_output +ffffffff814153a0 T ieee80211_pwrsave +ffffffff814154d0 T ieee80211_up_to_ac +ffffffff81415590 T ieee80211_classify +ffffffff81415680 T ieee80211_can_use_ampdu +ffffffff814156e0 T ieee80211_tx_compressed_bar +ffffffff81415820 T ieee80211_get_compressed_bar +ffffffff814158f0 T ieee80211_encap +ffffffff81415d70 T ieee80211_add_capinfo +ffffffff81415e00 T ieee80211_add_ssid +ffffffff81415e60 T ieee80211_add_rates +ffffffff81415ed0 T ieee80211_add_ds_params +ffffffff81415f30 T ieee80211_add_tim +ffffffff81416090 T ieee80211_add_ibss_params +ffffffff814160c0 T ieee80211_add_edca_params +ffffffff81416240 T ieee80211_add_erp +ffffffff814162e0 T ieee80211_add_qos_capability +ffffffff81416320 T ieee80211_add_wme_info +ffffffff81416360 T ieee80211_add_wme_param +ffffffff814164f0 T ieee80211_add_rsn_body +ffffffff814167d0 T ieee80211_add_rsn +ffffffff81416830 T ieee80211_add_wpa +ffffffff814168a0 T ieee80211_add_xrates +ffffffff81416930 T ieee80211_add_htcaps +ffffffff81416a00 T ieee80211_add_htop +ffffffff81416ad0 T ieee80211_add_vhtcaps +ffffffff81416b70 T ieee80211_add_tie +ffffffff81416bc0 T ieee80211_getmgmt +ffffffff81416c80 T ieee80211_get_probe_req +ffffffff81417030 T ieee80211_get_probe_resp +ffffffff81417590 T ieee80211_get_auth +ffffffff81417620 T ieee80211_get_deauth +ffffffff814176a0 T ieee80211_get_assoc_req +ffffffff81417ba0 T ieee80211_get_assoc_resp +ffffffff81417f60 T ieee80211_get_disassoc +ffffffff81417fe0 T ieee80211_get_addba_req +ffffffff814180d0 T ieee80211_output_ba_move_window +ffffffff814181c0 T ieee80211_output_ba_move_window_to_first_unacked +ffffffff81418350 T ieee80211_output_ba_record_ack +ffffffff814184a0 T ieee80211_get_addba_resp +ffffffff814185a0 T ieee80211_get_delba +ffffffff81418640 T ieee80211_get_sa_query +ffffffff814186d0 T ieee80211_get_action +ffffffff81418960 T ieee80211_send_mgmt +ffffffff81418d00 T ieee80211_get_rts +ffffffff81418d90 T ieee80211_get_cts_to_self +ffffffff81418e20 T ieee80211_beacon_alloc +ffffffff8141a000 T ieee80211_eapol_key_input +ffffffff8141a210 T ieee80211_recv_eapol_key_req +ffffffff8141a370 T ieee80211_recv_4way_msg3 +ffffffff8141ad10 T ieee80211_recv_4way_msg2or4 +ffffffff8141ae50 T ieee80211_recv_4way_msg1 +ffffffff8141b130 T ieee80211_recv_wpa_group_msg1 +ffffffff8141b460 T ieee80211_recv_rsn_group_msg1 +ffffffff8141b990 T ieee80211_recv_group_msg2 +ffffffff8141bae0 T ieee80211_recv_4way_msg2 +ffffffff8141bcf0 T ieee80211_must_update_group_key +ffffffff8141bd50 T ieee80211_recv_4way_msg4 +ffffffff8141c000 T ieee80211_send_eapol_key +ffffffff8141c220 T ieee80211_eapol_timeout +ffffffff8141c2a0 T ieee80211_send_4way_msg1 +ffffffff8141c560 T ieee80211_send_4way_msg3 +ffffffff8141cab0 T ieee80211_send_group_msg1 +ffffffff8141cfd0 T ieee80211_add_gtk_kde +ffffffff8141d090 T ieee80211_add_pmkid_kde +ffffffff8141d0e0 T ieee80211_add_igtk_kde +ffffffff8141d1b0 T ieee80211_get_eapol_key +ffffffff8141d270 T ieee80211_send_4way_msg2 +ffffffff8141d490 T ieee80211_send_4way_msg4 +ffffffff8141d670 T ieee80211_send_group_msg2 +ffffffff8141d850 T ieee80211_send_eapol_key_req +ffffffff8141e000 T ieee80211_proto_attach +ffffffff8141e0b0 T ieee80211_newstate +ffffffff8141ed80 T ieee80211_proto_detach +ffffffff8141edc0 T ieee80211_print_essid +ffffffff8141ef40 T ieee80211_fix_rate +ffffffff8141f380 T ieee80211_reset_erp +ffffffff8141f4a0 T ieee80211_set_shortslottime +ffffffff8141f500 T ieee80211_keyrun +ffffffff8141f670 T ieee80211_setkeys +ffffffff8141f8b0 t ieee80211_node_gtk_rekey +ffffffff8141f910 T ieee80211_setkeysdone +ffffffff8141fa10 T ieee80211_gtk_rekey_timeout +ffffffff8141fa60 T ieee80211_sa_query_timeout +ffffffff8141fb30 T ieee80211_sa_query_request +ffffffff8141fbb0 T ieee80211_ht_negotiate +ffffffff8141fd80 T ieee80211_vht_negotiate +ffffffff8141ff90 T ieee80211_tx_ba_timeout +ffffffff814200b0 T ieee80211_delba_request +ffffffff81420230 T ieee80211_rx_ba_timeout +ffffffff814202c0 T ieee80211_addba_request +ffffffff81420490 T ieee80211_auth_open_confirm +ffffffff81420540 T ieee80211_try_another_bss +ffffffff81420650 T ieee80211_auth_open +ffffffff81420950 T ieee80211_set_beacon_miss_threshold +ffffffff814209e0 T ieee80211_stop_ampdu_tx +ffffffff81420af0 T ieee80211_check_wpa_supplicant_failure +ffffffff81420b70 T ieee80211_set_link_state +ffffffff81420c00 T ieee80211_rtm_80211info_task +ffffffff81421000 T ieee80211_ra_get_ht_rateset +ffffffff81421080 T ieee80211_ra_use_ht_sgi +ffffffff81421100 T ieee80211_ra_get_txrate +ffffffff81421190 T ieee80211_ra_next_lower_intra_rate +ffffffff81421330 T ieee80211_ra_next_intra_rate +ffffffff814214c0 T ieee80211_ra_next_rateset +ffffffff814216e0 T ieee80211_ra_best_mcs_in_rateset +ffffffff81421760 T ieee80211_ra_probe_next_rateset +ffffffff81421a20 T ieee80211_ra_next_mcs +ffffffff81421a70 T ieee80211_ra_probe_clear +ffffffff81421ab0 T ieee80211_ra_probe_done +ffffffff81421af0 T ieee80211_ra_intra_mode_ra_finished +ffffffff81421e60 T ieee80211_ra_trigger_next_rateset +ffffffff81421ed0 T ieee80211_ra_inter_mode_ra_finished +ffffffff81421f00 T ieee80211_ra_best_rate +ffffffff81421fa0 T ieee80211_ra_probe_next_rate +ffffffff81422040 T ieee80211_ra_valid_tx_mcs +ffffffff814220c0 T ieee80211_ra_valid_rates +ffffffff81422190 T ieee80211_ra_probe_valid +ffffffff814221e0 T ieee80211_ra_add_stats_ht +ffffffff81422480 T ieee80211_ra_choose +ffffffff814228c0 T ieee80211_ra_node_init +ffffffff81423000 T ieee80211_ra_vht_get_rateset +ffffffff814230a0 T ieee80211_ra_vht_use_sgi +ffffffff814231b0 T ieee80211_ra_vht_get_txrate +ffffffff81423250 T ieee80211_ra_vht_next_lower_intra_rate +ffffffff81423290 T ieee80211_ra_vht_get_max_mcs +ffffffff81423310 T ieee80211_ra_vht_next_intra_rate +ffffffff81423400 T ieee80211_ra_vht_next_rateset +ffffffff81423550 T ieee80211_ra_vht_best_mcs_in_rateset +ffffffff814235f0 T ieee80211_ra_vht_probe_next_rateset +ffffffff814238e0 T ieee80211_ra_vht_next_mcs +ffffffff81423970 T ieee80211_ra_vht_probe_clear +ffffffff814239a0 T ieee80211_ra_vht_probe_done +ffffffff814239f0 T ieee80211_ra_vht_intra_mode_ra_finished +ffffffff81423dc0 T ieee80211_ra_vht_trigger_next_rateset +ffffffff81423e30 T ieee80211_ra_vht_inter_mode_ra_finished +ffffffff81423e60 T ieee80211_ra_vht_best_rate +ffffffff81424120 T ieee80211_ra_vht_probe_next_rate +ffffffff814241d0 T ieee80211_ra_vht_init_valid_rates +ffffffff814243d0 T ieee80211_ra_vht_probe_valid +ffffffff81424420 T ieee80211_ra_vht_add_stats +ffffffff81424710 T ieee80211_ra_vht_choose +ffffffff81424b40 T ieee80211_ra_vht_node_init +ffffffff81425000 T ieee80211_rssadapt_choose +ffffffff814250d0 T ieee80211_rssadapt_updatestats +ffffffff81425150 T ieee80211_rssadapt_input +ffffffff81425190 T ieee80211_rssadapt_lower_rate +ffffffff81425210 T ieee80211_rssadapt_raise_rate +ffffffff81426000 T bsearch +ffffffff814260b0 T ieee80211_regdomain_compare_cn +ffffffff814260d0 T ieee80211_regdomain_compare_rn +ffffffff814260f0 T ieee80211_name2countrycode +ffffffff81426190 T ieee80211_name2regdomain +ffffffff81426230 T ieee80211_countrycode2name +ffffffff814262c0 T ieee80211_regdomain2name +ffffffff81426340 T ieee80211_regdomain2flag +ffffffff81426400 T ieee80211_countrycode2regdomain +ffffffff81427000 T arptimer +ffffffff81427080 T arptfree +ffffffff81427160 T arpinit +ffffffff814271d0 T arp_rtrequest +ffffffff81427610 T arprequest +ffffffff81427750 T arpinvalidate +ffffffff814277b0 T arpreply +ffffffff81427890 T arpresolve +ffffffff81427e80 T arppullup +ffffffff81427f40 T arpinput +ffffffff81427fa0 T arpintr +ffffffff81428050 T in_arpinput +ffffffff81428470 T arplookup +ffffffff81428560 T arpcache +ffffffff814288e0 T arpproxy +ffffffff814289c0 T revarpinput +ffffffff81428a10 T in_revarpinput +ffffffff81428ad0 T revarprequest +ffffffff81428c10 T revarpwhoarewe +ffffffff81428e00 T revarpwhoami +ffffffff81429000 T igmp_init +ffffffff81429090 T rti_fill +ffffffff81429160 T rti_find +ffffffff81429240 T rti_delete +ffffffff814292d0 T igmp_input +ffffffff814293b0 T igmp_input_if +ffffffff81429c10 T igmp_joingroup +ffffffff81429d50 T igmp_sendpkt +ffffffff81429ed0 T igmp_leavegroup +ffffffff81429f50 T igmp_fasttimo +ffffffff81429fe0 T igmp_checktimer +ffffffff8142a0d0 T igmp_slowtimo +ffffffff8142a130 T igmp_sysctl +ffffffff8142a290 T igmp_sysctl_igmpstat +ffffffff8142b000 T in_canforward +ffffffff8142b060 T in_socktrim +ffffffff8142b0c0 T in_mask2len +ffffffff8142b1a0 T in_len2mask +ffffffff8142b260 T in_nam2sin +ffffffff8142b2c0 T in_sa2sin +ffffffff8142b300 T in_control +ffffffff8142b340 T in_ioctl +ffffffff8142b6b0 T in_ioctl_get +ffffffff8142b820 T in_ioctl_set_ifaddr +ffffffff8142ba20 T in_ioctl_change_ifaddr +ffffffff8142be40 T in_scrubhost +ffffffff8142be70 T in_addhost +ffffffff8142bea0 T in_ifscrub +ffffffff8142bf40 T in_ifinit +ffffffff8142c1e0 T in_purgeaddr +ffffffff8142c2e0 T in_remove_prefix +ffffffff8142c350 T in_insert_prefix +ffffffff8142c3d0 T in_addmulti +ffffffff8142c570 T in_delmulti +ffffffff8142c6c0 T in_broadcast +ffffffff8142c750 T in_hasmulti +ffffffff8142c7f0 T in_ifdetach +ffffffff8142c880 T in_prefixlen2mask +ffffffff8142d000 T in_init +ffffffff8142d060 T in_pcbhash +ffffffff8142d180 T in_pcblhash +ffffffff8142d240 T in_pcbinit +ffffffff8142d2f0 T in_baddynamic +ffffffff8142d360 T in_rootonly +ffffffff8142d3e0 T in_pcballoc +ffffffff8142d560 T in_pcbresize +ffffffff8142d740 T in_pcbhash_insert +ffffffff8142d920 T in_pcbbind +ffffffff8142dc20 T in_pcbaddrisavail +ffffffff8142de10 T in_pcbpickport +ffffffff8142e000 T in_pcbrehash +ffffffff8142e090 T in_pcblookup_local +ffffffff8142e340 T in_pcbunref +ffffffff8142e430 T in_pcbconnect +ffffffff8142e6a0 T in_pcbselsrc +ffffffff8142e8d0 T in_pcblookup +ffffffff8142e9d0 T in_pcbdisconnect +ffffffff8142eb10 T in_pcbdetach +ffffffff8142ec60 T in_pcbref +ffffffff8142ecb0 T in_setsockaddr +ffffffff8142ed10 T in_setpeeraddr +ffffffff8142ed80 T in_sockaddr +ffffffff8142ede0 T in_peeraddr +ffffffff8142ee60 T in_pcbnotifyall +ffffffff8142efd0 T in_losing +ffffffff8142f060 T in_rtchange +ffffffff8142f0b0 T in_pcbrtentry +ffffffff8142f200 T in_pcbhash_lookup +ffffffff8142f3b0 T in_pcblookup_listen +ffffffff81430000 T inet_nat64_mask +ffffffff81430060 T inet_nat64 +ffffffff814301f0 T inet_nat64_inet +ffffffff814302b0 T inet_nat64_inet6 +ffffffff81430380 T inet_nat46 +ffffffff81430430 T inet_nat46_inet +ffffffff81430490 T inet_nat46_inet6 +ffffffff81431000 T inet_ntop +ffffffff814310d0 t inet_ntop6 +ffffffff814315c0 T sockaddr_ntop +ffffffff81432000 T divert_attach +ffffffff81432090 T divert_detach +ffffffff814320e0 T divert_lock +ffffffff81432140 T divert_unlock +ffffffff814321a0 T divert_bind +ffffffff814321e0 T divert_shutdown +ffffffff81432220 T divert_send +ffffffff81432260 T divert_init +ffffffff814322b0 T divert_output +ffffffff81432570 T divert_packet +ffffffff81432820 T divert_sysctl_divstat +ffffffff814328f0 T divert_sysctl +ffffffff81433000 T icmp_init +ffffffff81433080 T icmp_mtudisc_timeout +ffffffff81433180 T icmp_do_error +ffffffff81433500 T icmp_ratelimit +ffffffff81433560 T icmp_error +ffffffff814335e0 T icmp_reflect +ffffffff81433930 T icmp_send +ffffffff81433a10 T icmp_input +ffffffff81433ab0 T icmp_input_if +ffffffff81434420 T iptime +ffffffff814344c0 T icmp_sysctl +ffffffff81434670 T icmp_sysctl_icmpstat +ffffffff81434760 T icmp_mtudisc_clone +ffffffff81434910 T icmp_mtudisc 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+ffffffff8143a2c0 T ip_mrouter_done +ffffffff8143a4e0 T add_vif +ffffffff8143a6e0 T del_vif +ffffffff8143a840 T add_mfc +ffffffff8143a9f0 T del_mfc +ffffffff8143ab70 T set_api_config +ffffffff8143ac10 T ip_mrouter_get +ffffffff8143acc0 T get_version +ffffffff8143ad00 T get_api_support +ffffffff8143ad50 T get_api_config +ffffffff8143ada0 T mrt_ioctl +ffffffff8143aef0 T get_vif_cnt +ffffffff8143af80 T get_sg_cnt +ffffffff8143b0a0 T if_lookupbyvif +ffffffff8143b100 T mrt_sysctl_vif +ffffffff8143b270 T mrt_rtwalk_mfcsysctl +ffffffff8143b3b0 T mrt_sysctl_mfc +ffffffff8143b4d0 T mrouter_rtwalk_delete +ffffffff8143b510 T mrt_mcast_del +ffffffff8143b5a0 T vif_delete +ffffffff8143b660 T mfc_expire_route +ffffffff8143b740 T mfc_add_route +ffffffff8143b8c0 T rt_mcast_add +ffffffff8143b9f0 T update_mfc_params +ffffffff8143bd20 T mfc_add +ffffffff8143be30 T socket_send +ffffffff8143beb0 T ip_mforward +ffffffff8143c1e0 T ip_mdq +ffffffff8143d000 T ip_output +ffffffff8143dbc0 T ip_insertoptions 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tcp_trace +ffffffff81442000 T tcp_reass +ffffffff814423b0 T tcp_flush_queue +ffffffff81442550 T tcp_input +ffffffff81445b80 T syn_cache_reset +ffffffff81445d80 T syn_cache_get +ffffffff814465c0 T syn_cache_add +ffffffff81446b70 T tcp_del_sackholes +ffffffff81446c30 T tcp_dooptions +ffffffff81447170 T tcp_xmit_timer +ffffffff814472d0 T tcp_clean_sackreport +ffffffff81447350 T tcp_mss +ffffffff814475f0 T tcp_sack_partialack +ffffffff814476a0 T tcp_newreno_partialack +ffffffff81447790 T tcp_seq_subtract +ffffffff814477c0 T tcp_pulloutofband +ffffffff81447880 T tcp_update_sack_list +ffffffff81447db0 T tcp_sack_option +ffffffff814482f0 T tcp_hdrsz +ffffffff81448360 T tcp_mss_update +ffffffff814484b0 T tcp_mss_adv +ffffffff81448570 T syn_cache_rm +ffffffff81448650 T syn_cache_put +ffffffff814486b0 T syn_cache_reaper +ffffffff814486d0 T syn_cache_init +ffffffff814487e0 T syn_cache_insert +ffffffff81448e60 T syn_cache_timer +ffffffff814490c0 T syn_cache_respond +ffffffff814496f0 T syn_cache_cleanup +ffffffff814498b0 T syn_cache_lookup +ffffffff81449ac0 T syn_cache_unreach +ffffffff8144a000 T tcp_sack_output +ffffffff8144a080 T tcp_sack_adjust +ffffffff8144a100 T tcp_output +ffffffff8144bc80 T tcp_setpersist +ffffffff8144c000 T tcp_init +ffffffff8144c170 T tcp6_mtudisc_callback +ffffffff8144c1d0 T tcp_template +ffffffff8144c350 T tcp_respond +ffffffff8144c760 T tcp_newtcpcb +ffffffff8144c960 T tcp_drop +ffffffff8144ca60 T tcp_close +ffffffff8144cb90 T tcp_freeq +ffffffff8144cc30 T tcp_rscale +ffffffff8144cd00 T tcp_notify +ffffffff8144cdc0 T tcp6_ctlinput +ffffffff8144d090 T tcp_ctlinput +ffffffff8144d440 T tcp_mtudisc +ffffffff8144d540 T tcp_mtudisc_increase +ffffffff8144d5c0 T tcp_set_iss_tsm +ffffffff8144d740 T tcp_signature_tdb_attach +ffffffff8144d770 T tcp_signature_tdb_init +ffffffff8144d810 T tcp_signature_tdb_zeroize +ffffffff8144d880 T tcp_signature_tdb_input +ffffffff8144d8d0 T tcp_signature_tdb_output +ffffffff8144d910 T tcp_signature_apply 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x86_bus_space_mem_read_multi_1 +ffffffff815fea60 T x86_bus_space_mem_read_multi_2 +ffffffff815feaa0 T x86_bus_space_mem_read_multi_4 +ffffffff815feae0 T x86_bus_space_mem_read_multi_8 +ffffffff815feb20 T x86_bus_space_mem_read_region_1 +ffffffff815feb50 T x86_bus_space_mem_read_region_2 +ffffffff815feb90 T x86_bus_space_mem_read_region_4 +ffffffff815febc0 T x86_bus_space_mem_read_region_8 +ffffffff815fec00 T x86_bus_space_mem_write_1 +ffffffff815fec30 T x86_bus_space_mem_write_2 +ffffffff815fec60 T x86_bus_space_mem_write_4 +ffffffff815fec90 T x86_bus_space_mem_write_8 +ffffffff815fecc0 T x86_bus_space_mem_write_multi_1 +ffffffff815fed00 T x86_bus_space_mem_write_multi_2 +ffffffff815fed40 T x86_bus_space_mem_write_multi_4 +ffffffff815fed80 T x86_bus_space_mem_write_multi_8 +ffffffff815fedc0 T x86_bus_space_mem_write_region_1 +ffffffff815fedf0 T x86_bus_space_mem_write_region_2 +ffffffff815fee30 T x86_bus_space_mem_write_region_4 +ffffffff815fee60 T x86_bus_space_mem_write_region_8 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qle_get_port_db +ffffffff8170d410 T qle_get_port_name_list +ffffffff8170d670 T qle_add_loop_port +ffffffff8170d8f0 T qle_add_fabric_port +ffffffff8170dab0 T qle_add_logged_in_port +ffffffff8170dd00 T qle_handle_resp +ffffffff8170e0c0 T qle_dump_iocb +ffffffff8170e0f0 T qle_async +ffffffff8170e310 T qle_read +ffffffff8170e360 T qle_write +ffffffff8170e3b0 T qle_clear_isr +ffffffff8170e400 T qle_put_marker +ffffffff8170e440 T qle_put_cmd +ffffffff8170e7a0 T qle_write_mbox +ffffffff8170e7f0 T qle_set_ints +ffffffff8170e850 T qle_update_done +ffffffff8170e880 T qle_update_cancel +ffffffff8170e8c0 T qle_update_start +ffffffff8170e910 T qle_update_defer +ffffffff8170e960 T qle_clear_port_lists +ffffffff8170eac0 T qle_update_topology +ffffffff8170ebb0 T qle_update_fabric +ffffffff8170ecc0 T qle_ct_pass_through +ffffffff8170efb0 T qle_sge +ffffffff8170eff0 T qle_next_fabric_port +ffffffff8170f160 T qle_fabric_plogx +ffffffff8170f3f0 T qle_fabric_plogi +ffffffff8170f560 T qle_fabric_plogo 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aq_dmamem_free +ffffffff8171f1a0 T aq_queue_down +ffffffff8171f480 T aq_invalidate_rx_desc_cache +ffffffff8171f500 T aq_up +ffffffff8171f940 T aq_down +ffffffff8171fa90 T aq_rxrinfo +ffffffff8171fb80 T aq_iff +ffffffff81720000 T tulip_probe +ffffffff81720060 T tulip_attach +ffffffff81720ab0 T tulip_timeout_callback +ffffffff81720b00 T tulip_timeout +ffffffff81720b70 T tulip_txprobe +ffffffff81720cb0 T tulip_txput +ffffffff81721230 T tulip_media_set +ffffffff81721820 T tulip_reset +ffffffff81721be0 T tulip_mii_autonegotiate +ffffffff81721ee0 T tulip_mii_readreg +ffffffff81722090 T tulip_mii_writereg +ffffffff81722250 T tulip_linkup +ffffffff81722320 T tulip_init +ffffffff817224a0 T tulip_media_print +ffffffff817224f0 T tulip_media_link_monitor +ffffffff81722760 T tulip_mii_map_abilities +ffffffff817227f0 T tulip_media_poll +ffffffff81722ce0 T tulip_mii_phy_readspecific +ffffffff81722ea0 T tulip_media_select +ffffffff81722fb0 T tulip_21040_mediainfo_init +ffffffff817230b0 T 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tulip_mii_writebits +ffffffff817263a0 T tulip_mii_turnaround +ffffffff81726b70 T tulip_mii_readbits +ffffffff81726f50 T tulip_identify_dec_nic +ffffffff81727000 T tulip_identify_znyx_nic +ffffffff817272d0 T tulip_identify_smc_nic +ffffffff817274b0 T tulip_identify_cogent_nic +ffffffff817275a0 T tulip_identify_accton_nic +ffffffff817276d0 T tulip_identify_asante_nic +ffffffff817279a0 T tulip_identify_compex_nic +ffffffff81727af0 T tulip_srom_decode +ffffffff81728740 T tulip_read_macaddr +ffffffff81729100 T tulip_ifmedia_add +ffffffff817291f0 T tulip_ifmedia_change +ffffffff817293d0 T tulip_ifmedia_status +ffffffff81729440 T tulip_alloc_rxmap +ffffffff81729480 T tulip_free_rxmap +ffffffff817294c0 T tulip_alloc_txmap +ffffffff81729500 T tulip_free_txmap +ffffffff81729540 T tulip_addr_filter +ffffffff81729850 T tulip_rx_intr +ffffffff81729e60 T tulip_txput_setup +ffffffff8172a0f0 T tulip_tx_intr +ffffffff8172a510 T tulip_print_abnormal_interrupt +ffffffff8172a540 T tulip_intr_handler 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amd756_chip_map +ffffffff81734e30 T ixp_chip_map +ffffffff817351a0 T cmd_chip_map +ffffffff81735300 T cmd0643_9_chip_map +ffffffff81735600 T cmd680_chip_map +ffffffff817357e0 T sii3112_chip_map +ffffffff81735b60 T sii3114_chip_map +ffffffff81735f60 T apollo_chip_map +ffffffff817365c0 T sata_chip_map +ffffffff817367e0 T cy693_chip_map +ffffffff81736ba0 T sis_chip_map +ffffffff817372e0 T natsemi_chip_map +ffffffff81737740 T ns_scx200_chip_map +ffffffff81737ad0 T acer_chip_map +ffffffff81738150 T hpt_chip_map +ffffffff81738630 T pdc202xx_chip_map +ffffffff81738ff0 T pdcsata_chip_map +ffffffff81739770 T acard_chip_map +ffffffff817399e0 T serverworks_chip_map +ffffffff81739cf0 T svwsata_chip_map +ffffffff8173a0d0 T nforce_chip_map +ffffffff8173a4f0 T ite_chip_map +ffffffff8173a7b0 T jmicron_chip_map +ffffffff8173abc0 T phison_chip_map +ffffffff8173aee0 T rdc_chip_map +ffffffff8173b330 T pciide_match +ffffffff8173b3d0 T pciide_attach +ffffffff8173b4b0 T pciide_detach +ffffffff8173b510 T pciide_activate +ffffffff8173bc40 T pciide_lookup_product +ffffffff8173bea0 T pciide_dmacmd_read +ffffffff8173bed0 T pciide_dmacmd_write +ffffffff8173bf00 T pciide_dmactl_read +ffffffff8173bf30 T pciide_dmactl_write +ffffffff8173bf60 T pciide_dmatbl_write +ffffffff8173bf90 T pciide_mapregs_compat +ffffffff8173c110 T pciide_unmapregs_compat +ffffffff8173c1a0 T pciide_mapregs_native +ffffffff8173c490 T pciide_unmapregs_native +ffffffff8173c520 T pciide_mapreg_dma +ffffffff8173c6b0 T pciide_dma_init +ffffffff8173c980 T pciide_dma_start +ffffffff8173ca00 T pciide_dma_finish +ffffffff8173cbd0 T pciide_unmapreg_dma +ffffffff8173cc00 T pciide_intr_flag +ffffffff8173ce10 T pciide_compat_intr +ffffffff8173ce90 T pciide_pci_intr +ffffffff8173cf50 T pciide_channel_dma_setup +ffffffff8173d020 T pciide_dma_table_setup +ffffffff8173d260 T pciide_irqack +ffffffff8173d2b0 T pciide_chansetup +ffffffff8173d390 T pciide_chanfree +ffffffff8173d3e0 T pciide_mapchan +ffffffff8173d470 T pciide_unmap_chan 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sii3114_mapreg_dma +ffffffff81740c70 T sii3114_chansetup +ffffffff81740d40 T sii3114_mapchan +ffffffff81741060 T sii3114_dmacmd_read +ffffffff817410a0 T sii3114_dmacmd_write +ffffffff817410e0 T sii3114_dmactl_read +ffffffff81741120 T sii3114_dmactl_write +ffffffff81741160 T sii3114_dmatbl_write +ffffffff817411a0 T cy693_setup_channel +ffffffff817413c0 T sis_hostbr_match +ffffffff81741490 T sis_south_match +ffffffff817414d0 T sis_setup_channel +ffffffff81741810 T sis96x_setup_channel +ffffffff81741af0 T natsemi_irqack +ffffffff81741b90 T natsemi_setup_channel +ffffffff81741f80 T natsemi_pci_intr +ffffffff81742080 T ns_scx200_setup_channel +ffffffff81742380 T acer_dma_init +ffffffff817423c0 T acer_setup_channel +ffffffff817427c0 T acer_pci_intr +ffffffff817428b0 T hpt_setup_channel +ffffffff81742c00 T hpt_pci_intr +ffffffff81742d10 T pdc268_config_read +ffffffff81742d80 T pdc20268_setup_channel +ffffffff81742f50 T pdc202xx_setup_channel +ffffffff817433a0 T pdc20262_dma_start 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T vr_activate +ffffffff8174c900 T vr_mii_readreg +ffffffff8174ca70 T vr_mii_writereg +ffffffff8174cbd0 T vr_miibus_readreg +ffffffff8174cc40 T vr_miibus_writereg +ffffffff8174cca0 T vr_miibus_statchg +ffffffff8174ccc0 T vr_setcfg +ffffffff8174cee0 T vr_iff +ffffffff8174d060 T vr_reset +ffffffff8174d170 T vr_quirks +ffffffff8174d270 T vr_dmamem_alloc +ffffffff8174d3d0 T vr_dmamem_free +ffffffff8174d440 T vr_intr +ffffffff8174d670 T vr_chipinit +ffffffff8174d750 T vr_ioctl +ffffffff8174d8f0 T vr_start +ffffffff8174dac0 T vr_watchdog +ffffffff8174db50 T vr_wol +ffffffff8174dd00 T vr_ifmedia_upd +ffffffff8174dd50 T vr_ifmedia_sts +ffffffff8174ddb0 T vr_tick +ffffffff8174de30 T vr_rxtick +ffffffff8174df10 T vr_stop +ffffffff8174e1a0 T vr_init +ffffffff8174e740 T vr_list_tx_init +ffffffff8174e840 T vr_list_rx_init +ffffffff8174ea00 T vr_fill_rx_ring +ffffffff8174ead0 T vr_alloc_mbuf +ffffffff8174ec40 T vr_rxeof +ffffffff8174eec0 T vr_rxeoc +ffffffff8174f050 T vr_txeof +ffffffff8174f210 T vr_encap +ffffffff81750000 T txp_probe +ffffffff81750030 T txp_attach +ffffffff817501a0 T txp_attachhook +ffffffff817504c0 T txp_chip_init +ffffffff81750680 T txp_download_fw +ffffffff81750b20 T txp_alloc_rings +ffffffff81751960 T txp_command +ffffffff81751a30 T txp_ifmedia_upd +ffffffff81751b40 T txp_ifmedia_sts +ffffffff81751e30 T txp_ioctl +ffffffff81751f50 T txp_start +ffffffff81752310 T txp_watchdog +ffffffff81752340 T txp_capabilities +ffffffff817524f0 T txp_tick +ffffffff81752640 T txp_intr +ffffffff817528b0 T txp_reset_adapter +ffffffff817529b0 T txp_download_fw_wait +ffffffff81752aa0 T txp_download_fw_section +ffffffff81752e10 T txp_dma_malloc +ffffffff81752fb0 T txp_dma_free +ffffffff81753030 T txp_rx_reclaim +ffffffff81753310 T txp_rxbuf_reclaim +ffffffff81753590 T txp_tx_reclaim +ffffffff81753740 T txp_init +ffffffff81753880 T txp_stop +ffffffff81753980 T txp_set_filter +ffffffff81753b10 T txp_command2 +ffffffff81753df0 T txp_cmd_desc_numfree +ffffffff81753e50 T txp_response +ffffffff81754120 T txp_rsp_fixup +ffffffff81754210 T txp_show_descriptor +ffffffff81755000 T init_audio_devices +ffffffff81755120 T init_BTSC +ffffffff817551e0 T set_audio +ffffffff81755570 T set_bctv_audio +ffffffff817558b0 T msp_autodetect +ffffffff81755ce0 T temp_mute +ffffffff81755d80 T set_BTSC +ffffffff81755da0 T bctv_gpio_write +ffffffff81755f10 T msp_read_id +ffffffff81755fd0 T dpl_read_id +ffffffff81756090 T dpl_autodetect +ffffffff81757000 T writeEEProm +ffffffff81757030 T readEEProm +ffffffff81757100 T signCard +ffffffff817571b0 T probeCard +ffffffff81759000 T bktr_name +ffffffff81759030 T common_bktr_attach +ffffffff81759330 T common_bktr_intr +ffffffff81759950 T video_open +ffffffff81759e10 t set_fps +ffffffff81759f50 T vbi_open +ffffffff81759ff0 T tuner_open +ffffffff8175a040 T video_close +ffffffff8175a130 T tuner_close +ffffffff8175a160 T vbi_close +ffffffff8175a190 T video_read +ffffffff8175a350 t start_capture +ffffffff8175d290 T vbi_read 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xl_pci_match +ffffffff81764030 T xl_pci_attach +ffffffff81764390 T xl_pci_detach +ffffffff81764420 T xl_pci_wol_power +ffffffff81764470 T xl_pci_intr_ack +ffffffff81765000 T fxp_pci_match +ffffffff81765030 T fxp_pci_attach +ffffffff81765360 T fxp_pci_detach +ffffffff81766000 T em_probe +ffffffff81766030 T em_attach +ffffffff81766530 T em_detach +ffffffff817665c0 T em_activate +ffffffff81766640 T em_defer_attach +ffffffff817666e0 T em_stop +ffffffff817667d0 T em_free_pci_resources +ffffffff81766a90 T em_setup_interface +ffffffff81766c80 T em_update_link_status +ffffffff81766e70 T em_local_timer +ffffffff81766f20 T em_82547_move_tail +ffffffff81766f60 T em_identify_hardware +ffffffff81767070 T em_allocate_pci_resources +ffffffff81767470 T em_allocate_desc_rings +ffffffff81767580 T em_hardware_init +ffffffff81767820 T em_kstat_attach +ffffffff81767970 T em_start +ffffffff81767c60 T em_encap +ffffffff81768140 T em_82547_move_tail_locked +ffffffff81768370 T em_82547_update_fifo_head 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+ffffffff8176bfc0 T em_smartspeed +ffffffff8176c1c0 T em_kstat_read +ffffffff8176c5e0 T em_flush_desc_rings +ffffffff8176c710 T em_free_transmit_structures +ffffffff8176c8e0 T em_free_receive_structures +ffffffff8176caf0 T em_legacy_irq_quirk_spt +ffffffff8176cbd0 T em_allocate_msix +ffffffff8176cde0 T em_allocate_legacy +ffffffff8176cf00 T em_dma_free +ffffffff8176cf70 T em_disable_aspm +ffffffff8176d040 T em_dma_malloc +ffffffff8176d1d0 T em_allocate_transmit_structures +ffffffff8176d2c0 T em_get_buf +ffffffff8176d420 T em_allocate_receive_structures +ffffffff8176d5f0 T em_rxfill +ffffffff8176d740 T em_tbi_adjust_stats +ffffffff8176d910 T em_receive_checksum +ffffffff8176d980 T em_write_pci_cfg +ffffffff8176da00 T em_read_pci_cfg +ffffffff8176da70 T em_read_pcie_cap_reg +ffffffff8176daa0 T em_flush_tx_ring +ffffffff8176dc10 T em_flush_rx_ring +ffffffff8176ddd0 T em_queue_intr_msix +ffffffff8176de80 T em_link_intr_msix +ffffffff8176dfb0 T em_enable_queue_intr_msix +ffffffff8176f000 T em_set_mac_type +ffffffff8176fa00 T em_set_sfp_media_type_82575 +ffffffff8176fd50 T em_translate_82542_register +ffffffff8176ff80 T em_read_sfp_data_byte +ffffffff81770070 T em_set_media_type +ffffffff817702e0 T em_reset_hw +ffffffff81770eb0 T em_disable_pciex_master +ffffffff81770f80 T em_check_phy_reset_block +ffffffff81771040 T em_gate_hw_phy_config_ich8lan +ffffffff817710e0 t em_get_software_flag +ffffffff81771260 T em_hv_phy_workarounds_ich8lan +ffffffff817715f0 T em_lv_phy_workarounds_ich8lan +ffffffff817716f0 t em_phy_init_script +ffffffff81771960 T em_read_eeprom +ffffffff81772040 T em_set_eee_i350 +ffffffff81772160 T em_init_hw +ffffffff81773e00 T em_phy_reset +ffffffff81774040 T em_clear_vfta_i350 +ffffffff81774220 T em_read_phy_reg +ffffffff817743c0 T em_setup_link +ffffffff81776c60 T em_enable_tx_pkt_filtering +ffffffff81777030 T em_clear_hw_cntrs +ffffffff81777920 T em_write_phy_reg +ffffffff81777ab0 T em_power_up_serdes_link_82575 +ffffffff81777ba0 T em_copper_link_autoneg +ffffffff81777cd0 T em_phy_setup_autoneg +ffffffff81777e40 T em_copper_link_postconfig +ffffffff81777f10 T em_config_collision_dist +ffffffff81777fa0 t em_config_mac_to_phy +ffffffff81778110 t em_config_fc_after_link_up +ffffffff81778410 t em_config_dsp_after_link_change +ffffffff81778d00 T em_force_mac_fc +ffffffff81778dd0 T em_check_for_link +ffffffff817795c0 T em_get_pcs_speed_and_duplex_82575 +ffffffff81779680 T em_k1_gig_workaround_hv +ffffffff817797b0 T em_link_stall_workaround_hv +ffffffff81779890 T em_k1_workaround_lv +ffffffff81779950 T em_k1_workaround_lpt_lp +ffffffff81779c10 T em_set_eee_pchlan +ffffffff81779cb0 t em_polarity_reversal_workaround +ffffffff81779ef0 T em_get_speed_and_duplex +ffffffff8177a3b0 T em_access_phy_wakeup_reg_bm +ffffffff8177a510 t em_write_phy_reg_ex +ffffffff8177a780 t em_read_phy_reg_ex +ffffffff8177ac30 T em_access_phy_debug_regs_hv +ffffffff8177ad00 T em_access_phy_reg_hv +ffffffff8177aec0 t em_swfw_sync_acquire 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em_mta_set +ffffffff8177e340 T em_get_bus_info +ffffffff8177e4d0 T em_check_mng_mode +ffffffff8177e550 T em_valid_nvm_bank_detect_ich8lan +ffffffff8177e700 T em_read_eeprom_spt +ffffffff8177e9d0 T em_read_ich8_data32 +ffffffff8177eb40 t em_ich8_cycle_init +ffffffff8177ecf0 t em_ich8_flash_cycle +ffffffff8177ee60 T em_configure_k1_ich8lan +ffffffff8177f070 t em_get_hw_eeprom_semaphore +ffffffff8177f1e0 t em_shift_out_mdi_bits +ffffffff8177f360 t em_erase_ich8_4k_segment +ffffffff8177f5a0 t em_write_ich8_byte +ffffffff8177f710 t em_read_ich8_data +ffffffff81780000 T em_lookup_gcu +ffffffff81780030 T em_attach_miibus +ffffffff81780060 T gcu_miibus_readreg +ffffffff817801d0 T gcu_miibus_writereg +ffffffff81780320 T gcu_miibus_statchg +ffffffff81781000 T ixgb_probe +ffffffff81781030 T ixgb_attach +ffffffff81781450 T ixgb_local_timer +ffffffff817814f0 T ixgb_identify_hardware +ffffffff817815f0 T ixgb_allocate_pci_resources +ffffffff81781780 T ixgb_dma_malloc +ffffffff81781980 T ixgb_hardware_init +ffffffff81781a40 T ixgb_setup_interface +ffffffff81781b70 T ixgb_update_stats_counters +ffffffff81782470 T ixgb_update_link_status +ffffffff817824f0 T ixgb_dma_free +ffffffff817825a0 T ixgb_free_pci_resources +ffffffff81782630 T ixgb_start +ffffffff81782820 T ixgb_encap +ffffffff81782a10 T ixgb_ioctl +ffffffff81782cb0 T ixgb_init +ffffffff81783150 T ixgb_set_promisc +ffffffff817831d0 T ixgb_stop +ffffffff81783250 T ixgb_disable_intr +ffffffff81783280 T ixgb_set_multi +ffffffff81783390 T ixgb_enable_intr +ffffffff817833e0 T ixgb_watchdog +ffffffff81783470 T ixgb_enable_hw_vlans +ffffffff817834c0 T ixgb_setup_transmit_structures +ffffffff81783690 T ixgb_initialize_transmit_unit +ffffffff81783800 T ixgb_setup_receive_structures +ffffffff81783880 T ixgb_initialize_receive_unit +ffffffff81783b10 T ixgb_intr +ffffffff81783d10 T ixgb_rxeof +ffffffff81784160 T ixgb_txeof +ffffffff81784350 T ixgb_media_status +ffffffff81784440 T ixgb_media_change +ffffffff81784490 T ixgb_free_transmit_structures +ffffffff817845c0 T ixgb_free_receive_structures +ffffffff817846f0 T ixgb_allocate_transmit_structures +ffffffff81784770 T ixgb_transmit_checksum_setup +ffffffff81784870 T ixgb_get_buf +ffffffff81784a20 T ixgb_allocate_receive_structures +ffffffff81784be0 T ixgb_receive_checksum +ffffffff81784c40 T ixgb_write_pci_cfg +ffffffff81785000 T ixgb_validate_eeprom_checksum +ffffffff81785080 T ixgb_read_eeprom +ffffffff817852f0 T ixgb_update_eeprom_checksum +ffffffff81785360 T ixgb_write_eeprom +ffffffff81785820 t ixgb_shift_out_bits +ffffffff81785960 T ixgb_get_eeprom_data +ffffffff81785a00 T ixgb_get_eeprom_word +ffffffff81785ae0 T ixgb_get_ee_mac_addr +ffffffff81785bd0 T ixgb_get_ee_pba_number +ffffffff81785c90 T ixgb_get_ee_device_id +ffffffff81786000 T ixgb_mac_reset +ffffffff817861e0 T ixgb_adapter_stop +ffffffff81786320 T ixgb_init_hw +ffffffff81786630 T ixgb_init_rx_addrs +ffffffff81786760 T mac_addr_valid +ffffffff817867c0 T ixgb_clear_vfta +ffffffff81786840 T ixgb_clear_hw_cntrs +ffffffff81786f20 T ixgb_setup_fc +ffffffff817870b0 T ixgb_check_for_link +ffffffff817872c0 T ixgb_rar_set +ffffffff81787330 T ixgb_mc_addr_list_update +ffffffff817875b0 T ixgb_write_vfta +ffffffff817875e0 T ixgb_read_phy_reg +ffffffff81787ae0 T ixgb_write_phy_reg +ffffffff81787fd0 T ixgb_check_for_bad_link +ffffffff81788090 T ixgb_led_on +ffffffff817880e0 T ixgb_led_off +ffffffff81789000 T ixgbe_probe +ffffffff81789030 T ixgbe_attach +ffffffff817895a0 T ixgbe_detach +ffffffff817897c0 T ixgbe_activate +ffffffff817898d0 T ixgbe_identify_hardware +ffffffff81789990 T ixgbe_allocate_pci_resources +ffffffff81789ae0 T ixgbe_allocate_queues +ffffffff81789fe0 T ixgbe_allocate_msix +ffffffff8178a220 T ixgbe_allocate_legacy +ffffffff8178a340 T ixgbe_setup_interface +ffffffff8178a680 T ixgbe_free_transmit_structures +ffffffff8178a700 T ixgbe_free_receive_structures +ffffffff8178a7c0 T ixgbe_free_pci_resources +ffffffff8178a8a0 T ixgbe_stop +ffffffff8178abc0 T ixgbe_init +ffffffff8178b800 T ixgbe_start +ffffffff8178b9e0 T ixgbe_encap +ffffffff8178bce0 T ixgbe_ioctl +ffffffff8178c040 T ixgbe_rxrinfo +ffffffff8178c1a0 T ixgbe_get_sffpage +ffffffff8178c350 T ixgbe_disable_intr +ffffffff8178c420 T ixgbe_iff +ffffffff8178c590 T ixgbe_enable_intr +ffffffff8178c6a0 T ixgbe_enable_queues +ffffffff8178c7b0 T ixgbe_watchdog +ffffffff8178c9c0 T ixgbe_setup_transmit_structures +ffffffff8178caa0 T ixgbe_initialize_transmit_units +ffffffff8178cd60 T ixgbe_setup_receive_structures +ffffffff8178ce90 T ixgbe_initialize_receive_units +ffffffff8178d370 T ixgbe_config_gpie +ffffffff8178d440 T ixgbe_setup_vlan_hw_support +ffffffff8178d5d0 T ixgbe_configure_ivars +ffffffff8178d780 T ixgbe_set_ivar +ffffffff8178d950 T ixgbe_config_link +ffffffff8178daf0 T ixgbe_config_delay_values +ffffffff8178dc10 t ix_kstats_tick +ffffffff8178dce0 T ixgbe_enable_queue +ffffffff8178ddb0 T ixgbe_disable_queue +ffffffff8178de80 T ixgbe_link_intr +ffffffff8178de90 T ixgbe_intr +ffffffff8178e360 T ixgbe_queue_intr +ffffffff8178e4b0 T ixgbe_rxeof +ffffffff8178e880 T ixgbe_txeof +ffffffff8178ea20 T ixgbe_rxrefill +ffffffff8178eae0 T ixgbe_legacy_intr +ffffffff8178eca0 T ixgbe_update_link_status +ffffffff8178edf0 T ixgbe_handle_mod +ffffffff8178ef10 T ixgbe_handle_msf +ffffffff8178efe0 T ixgbe_handle_phy +ffffffff8178f070 T ixgbe_media_status +ffffffff8178f280 T ixgbe_media_change +ffffffff8178f330 T ixgbe_mc_array_itr +ffffffff8178f370 T ixgbe_setup_msix +ffffffff8178f400 T ixgbe_add_media_types +ffffffff8178f6a0 T ixgbe_dma_malloc +ffffffff8178f890 T ixgbe_dma_free +ffffffff8178f940 T ixgbe_allocate_transmit_buffers +ffffffff8178fab0 T ixgbe_setup_transmit_ring +ffffffff8178fc50 T ixgbe_free_transmit_buffers +ffffffff8178fd80 T ixgbe_get_buf +ffffffff8178fec0 T ixgbe_allocate_receive_buffers +ffffffff81790000 T ixgbe_setup_receive_ring +ffffffff817900e0 T ixgbe_rxfill +ffffffff81790210 T ixgbe_initialize_rss_mapping +ffffffff81790480 T ixgbe_map_queue_statistics +ffffffff81790580 T ixgbe_free_receive_buffers +ffffffff817906c0 T ixgbe_rx_checksum +ffffffff81790710 T ixgbe_read_pci_cfg +ffffffff81790770 T ixgbe_write_pci_cfg +ffffffff817907f0 t ix_kstats_read +ffffffff817909b0 t ix_rxq_kstats_read +ffffffff81790b10 t ix_txq_kstats_read +ffffffff81791000 T ixgbe_init_ops_generic +ffffffff81791270 T ixgbe_init_eeprom_params_generic +ffffffff81791320 T ixgbe_read_eerd_generic +ffffffff81791420 T ixgbe_read_eeprom_bit_bang_generic +ffffffff817916c0 T ixgbe_write_eeprom_generic +ffffffff81791b10 T ixgbe_validate_eeprom_checksum_generic +ffffffff81791bc0 T ixgbe_update_eeprom_checksum_generic +ffffffff81791c40 T ixgbe_calc_eeprom_checksum_generic +ffffffff81791de0 T ixgbe_init_hw_generic +ffffffff81791e40 T ixgbe_start_hw_generic +ffffffff81791f60 T ixgbe_clear_hw_cntrs_generic +ffffffff81792940 T ixgbe_enable_rx_dma_generic +ffffffff817929a0 T ixgbe_get_mac_addr_generic +ffffffff81792a30 T ixgbe_stop_adapter_generic +ffffffff81792bb0 T ixgbe_get_bus_info_generic +ffffffff81792c60 T ixgbe_set_lan_id_multi_port_pcie +ffffffff81792d30 T ixgbe_acquire_swfw_sync +ffffffff81792f60 T ixgbe_release_swfw_sync +ffffffff81793010 T prot_autoc_read_generic +ffffffff81793070 T prot_autoc_write_generic +ffffffff817930c0 T ixgbe_led_on_generic +ffffffff81793180 T ixgbe_led_off_generic +ffffffff81793230 T ixgbe_blink_led_start_generic +ffffffff817933a0 T ixgbe_blink_led_stop_generic +ffffffff817934c0 T ixgbe_set_rar_generic +ffffffff817935e0 T ixgbe_clear_rar_generic +ffffffff817936e0 T ixgbe_init_rx_addrs_generic +ffffffff817938e0 T ixgbe_update_mc_addr_list_generic +ffffffff81793ae0 T ixgbe_enable_mc_generic +ffffffff81793b50 T ixgbe_disable_mc_generic +ffffffff81793bb0 T ixgbe_enable_rx_generic +ffffffff81793c70 T ixgbe_disable_rx_generic +ffffffff81793d50 T ixgbe_fc_enable_generic +ffffffff81794180 T ixgbe_setup_fc_generic +ffffffff81794450 T ixgbe_fc_autoneg +ffffffff81794620 T ixgbe_device_supports_autoneg_fc +ffffffff81794720 T ixgbe_start_hw_gen2 +ffffffff81794900 T ixgbe_identify_phy +ffffffff81794960 T ixgbe_set_pci_config_data_generic +ffffffff817949e0 T ixgbe_disable_rx +ffffffff81794a20 T ixgbe_disable_pcie_master +ffffffff81794b70 T ixgbe_read_eerd_buffer_generic +ffffffff81794cb0 T ixgbe_poll_eerd_eewr_done +ffffffff81794d50 T ixgbe_write_eewr_buffer_generic +ffffffff81794ed0 T ixgbe_write_eewr_generic +ffffffff81794f20 T ixgbe_acquire_eeprom +ffffffff817950a0 T ixgbe_get_eeprom_semaphore +ffffffff817952b0 T ixgbe_release_eeprom_semaphore +ffffffff81795320 T ixgbe_ready_eeprom +ffffffff81795490 T ixgbe_shift_out_eeprom_bits +ffffffff81795650 T ixgbe_shift_in_eeprom_bits +ffffffff817957b0 T ixgbe_standby_eeprom +ffffffff81795890 T ixgbe_raise_eeprom_clk +ffffffff81795900 T ixgbe_lower_eeprom_clk +ffffffff81795970 T ixgbe_release_eeprom +ffffffff81795a50 T ixgbe_validate_mac_addr +ffffffff81795ab0 T ixgbe_init_uta_tables +ffffffff81795af0 T ixgbe_add_uc_addr +ffffffff81795b60 T ixgbe_mta_vector +ffffffff81795c10 T ixgbe_set_mta +ffffffff81795cd0 T ixgbe_negotiate_fc +ffffffff81795d80 T ixgbe_fc_autoneg_fiber +ffffffff81795eb0 T ixgbe_fc_autoneg_backplane +ffffffff81796010 T ixgbe_fc_autoneg_copper +ffffffff81796140 T ixgbe_disable_sec_rx_path_generic +ffffffff81796200 T ixgbe_enable_sec_rx_path_generic +ffffffff81796290 T ixgbe_enable_rx +ffffffff817962d0 T ixgbe_get_pcie_msix_count_generic +ffffffff81796350 T ixgbe_insert_mac_addr_generic +ffffffff81796560 T ixgbe_set_vmdq +ffffffff817965a0 T ixgbe_set_rar +ffffffff817965f0 T ixgbe_clear_vmdq +ffffffff81796630 T ixgbe_clear_vmdq_generic +ffffffff817967d0 T ixgbe_set_vmdq_generic +ffffffff81796880 T ixgbe_init_uta_tables_generic +ffffffff81796900 T ixgbe_find_vlvf_slot +ffffffff817969c0 T ixgbe_set_vfta_generic +ffffffff81796ad0 T ixgbe_set_vlvf_generic +ffffffff81796d60 T ixgbe_clear_vfta_generic +ffffffff81796e60 T ixgbe_need_crosstalk_fix +ffffffff81796eb0 T ixgbe_check_mac_link_generic +ffffffff817970a0 T ixgbe_get_device_caps_generic +ffffffff817970f0 T ixgbe_calculate_checksum +ffffffff817971b0 T ixgbe_hic_unlocked +ffffffff81797390 T ixgbe_host_interface_command +ffffffff81797560 T ixgbe_clear_tx_pending +ffffffff81797750 T ixgbe_mng_present +ffffffff817977c0 T ixgbe_mng_enabled +ffffffff81797880 T ixgbe_setup_mac_link_multispeed_fiber +ffffffff81797c40 T ixgbe_flap_tx_laser +ffffffff81797c80 T ixgbe_check_link +ffffffff81797cd0 T ixgbe_set_soft_rate_select_speed +ffffffff81797dc0 T ixgbe_init_shared_code +ffffffff81797e70 T ixgbe_set_mac_type +ffffffff81798030 T ixgbe_init_hw +ffffffff81798070 T ixgbe_get_media_type +ffffffff817980b0 T ixgbe_read_mbx +ffffffff81798110 T ixgbe_write_mbx +ffffffff81798160 T ixgbe_check_for_msg +ffffffff817981a0 T ixgbe_check_for_ack +ffffffff817981e0 T ixgbe_check_for_rst +ffffffff81798220 T ixgbe_poll_for_msg +ffffffff817982e0 T ixgbe_poll_for_ack +ffffffff817983a0 T ixgbe_read_posted_mbx +ffffffff81798480 T ixgbe_write_posted_mbx +ffffffff81798550 T ixgbe_init_mbx_ops_generic +ffffffff81798590 T ixgbe_read_v2p_mailbox +ffffffff81798600 T ixgbe_check_for_bit_pf +ffffffff81798690 T ixgbe_check_for_msg_pf +ffffffff81798740 T ixgbe_check_for_ack_pf +ffffffff817987e0 T ixgbe_check_for_rst_pf +ffffffff817988e0 T ixgbe_obtain_mbx_lock_pf +ffffffff81798970 T ixgbe_write_mbx_pf +ffffffff81798b40 T ixgbe_read_mbx_pf +ffffffff81798c50 T ixgbe_init_mbx_params_pf +ffffffff81799000 T ixgbe_set_pcie_completion_timeout +ffffffff81799090 T ixgbe_init_ops_82598 +ffffffff817991e0 T ixgbe_init_phy_ops_82598 +ffffffff817992d0 T ixgbe_start_hw_82598 +ffffffff81799480 T ixgbe_reset_hw_82598 +ffffffff81799950 T ixgbe_get_media_type_82598 +ffffffff81799a20 T ixgbe_get_supported_physical_layer_82598 +ffffffff81799bf0 T ixgbe_read_analog_reg8_82598 +ffffffff81799cb0 T ixgbe_write_analog_reg8_82598 +ffffffff81799d30 T ixgbe_set_lan_id_multi_port_pcie_82598 +ffffffff81799dd0 T ixgbe_enable_rx_dma_82598 +ffffffff81799e20 T ixgbe_set_vmdq_82598 +ffffffff81799ed0 T ixgbe_clear_vmdq_82598 +ffffffff81799f80 T ixgbe_set_vfta_82598 +ffffffff8179a0b0 T ixgbe_clear_vfta_82598 +ffffffff8179a260 T ixgbe_fc_enable_82598 +ffffffff8179a6c0 T ixgbe_read_i2c_eeprom_82598 +ffffffff8179a6e0 T ixgbe_check_mac_link_82598 +ffffffff8179a980 T ixgbe_setup_mac_link_82598 +ffffffff8179ab40 T ixgbe_get_link_capabilities_82598 +ffffffff8179ac10 T ixgbe_setup_copper_link_82598 +ffffffff8179ad20 T ixgbe_start_mac_link_82598 +ffffffff8179ae40 T ixgbe_validate_link_ready +ffffffff8179aef0 T ixgbe_read_i2c_phy_82598 +ffffffff8179c000 T ixgbe_init_mac_link_ops_82599 +ffffffff8179c190 T ixgbe_disable_tx_laser_multispeed_fiber +ffffffff8179c260 T ixgbe_enable_tx_laser_multispeed_fiber +ffffffff8179c2e0 T ixgbe_flap_tx_laser_multispeed_fiber +ffffffff8179c420 T ixgbe_setup_mac_link_82599 +ffffffff8179c6b0 T ixgbe_set_hard_rate_select_speed +ffffffff8179c770 T ixgbe_verify_lesm_fw_enabled_82599 +ffffffff8179c830 T ixgbe_setup_mac_link_smartspeed +ffffffff8179cbb0 T ixgbe_init_phy_ops_82599 +ffffffff8179cd00 T ixgbe_read_i2c_byte_82599 +ffffffff8179ce80 T ixgbe_write_i2c_byte_82599 +ffffffff8179d000 T ixgbe_setup_copper_link_82599 +ffffffff8179d060 T ixgbe_setup_sfp_modules_82599 +ffffffff8179d220 T prot_autoc_read_82599 +ffffffff8179d330 T prot_autoc_write_82599 +ffffffff8179d4a0 T ixgbe_reset_pipeline_82599 +ffffffff8179d7e0 T ixgbe_init_ops_82599 +ffffffff8179d9c0 T ixgbe_identify_phy_82599 +ffffffff8179da50 T ixgbe_reset_hw_82599 +ffffffff8179dfa0 T ixgbe_get_media_type_82599 +ffffffff8179e0d0 T ixgbe_get_supported_physical_layer_82599 +ffffffff8179e2a0 T ixgbe_enable_rx_dma_82599 +ffffffff8179e310 T ixgbe_read_analog_reg8_82599 +ffffffff8179e3d0 T ixgbe_write_analog_reg8_82599 +ffffffff8179e450 T ixgbe_start_hw_82599 +ffffffff8179e550 T ixgbe_get_link_capabilities_82599 +ffffffff8179e690 T ixgbe_stop_mac_link_on_d3_82599 +ffffffff8179e750 T ixgbe_read_eeprom_82599 +ffffffff8179e780 T ixgbe_start_mac_link_82599 +ffffffff8179e960 T ixgbe_verify_fw_version_82599 +ffffffff8179f000 T ixgbe_init_ops_X540 +ffffffff8179f220 T ixgbe_init_eeprom_params_X540 +ffffffff8179f2b0 T ixgbe_read_eerd_X540 +ffffffff8179f340 T ixgbe_write_eewr_X540 +ffffffff8179f3d0 T ixgbe_update_eeprom_checksum_X540 +ffffffff8179f4a0 T ixgbe_validate_eeprom_checksum_X540 +ffffffff8179f590 T ixgbe_calc_eeprom_checksum_X540 +ffffffff8179f730 T ixgbe_reset_hw_X540 +ffffffff8179fac0 T ixgbe_get_media_type_X540 +ffffffff8179faf0 T ixgbe_get_supported_physical_layer_X540 +ffffffff8179fb70 T ixgbe_start_hw_X540 +ffffffff8179fbc0 T ixgbe_acquire_swfw_sync_X540 +ffffffff817a0010 T ixgbe_release_swfw_sync_X540 +ffffffff817a0140 T ixgbe_init_swfw_sync_X540 +ffffffff817a0220 T ixgbe_setup_mac_link_X540 +ffffffff817a0240 T ixgbe_blink_led_start_X540 +ffffffff817a0360 T ixgbe_blink_led_stop_X540 +ffffffff817a0460 T ixgbe_get_link_capabilities_X540 +ffffffff817a04a0 T ixgbe_update_flash_X540 +ffffffff817a0680 T ixgbe_poll_flash_update_done_X540 +ffffffff817a0710 T ixgbe_get_swfw_sync_semaphore +ffffffff817a08a0 T ixgbe_release_swfw_sync_semaphore +ffffffff817a1000 T ixgbe_init_ops_X550 +ffffffff817a1110 T ixgbe_dmac_config_X550 +ffffffff817a11f0 T ixgbe_dmac_config_tcs_X550 +ffffffff817a1340 T ixgbe_dmac_update_tcs_X550 +ffffffff817a1400 T ixgbe_set_source_address_pruning_X550 +ffffffff817a14f0 T ixgbe_init_eeprom_params_X550 +ffffffff817a1570 T ixgbe_calc_eeprom_checksum_X550 +ffffffff817a1590 T ixgbe_read_ee_hostif_X550 +ffffffff817a1660 T ixgbe_write_ee_hostif_X550 +ffffffff817a1720 T ixgbe_update_eeprom_checksum_X550 +ffffffff817a18b0 T ixgbe_validate_eeprom_checksum_X550 +ffffffff817a1a00 T ixgbe_disable_rx_x550 +ffffffff817a1b20 T ixgbe_led_on_t_X550em +ffffffff817a1be0 T ixgbe_led_off_t_X550em +ffffffff817a1ca0 T ixgbe_read_cs4227 +ffffffff817a1cd0 T ixgbe_write_cs4227 +ffffffff817a1d00 T ixgbe_read_pe +ffffffff817a1d50 T ixgbe_write_pe +ffffffff817a1db0 T ixgbe_reset_cs4227 +ffffffff817a2040 T ixgbe_check_cs4227 +ffffffff817a21f0 T ixgbe_setup_mux_ctl +ffffffff817a2280 T ixgbe_identify_phy_x550em +ffffffff817a24a0 T ixgbe_read_mng_if_sel_x550em +ffffffff817a2520 T ixgbe_fw_phy_activity +ffffffff817a2640 T ixgbe_get_phy_id_fw +ffffffff817a2750 T ixgbe_identify_phy_fw +ffffffff817a27a0 T ixgbe_shutdown_fw_phy +ffffffff817a2800 T ixgbe_read_phy_reg_x550em +ffffffff817a2830 T ixgbe_write_phy_reg_x550em +ffffffff817a2860 T ixgbe_init_ops_X550EM +ffffffff817a2b10 T ixgbe_get_bus_info_X550em +ffffffff817a2b60 T ixgbe_get_media_type_X550em +ffffffff817a2c50 T ixgbe_setup_sfp_modules_X550em +ffffffff817a2de0 T ixgbe_get_link_capabilities_X550em +ffffffff817a2eb0 T ixgbe_reset_hw_X550em +ffffffff817a3530 T ixgbe_get_supported_physical_layer_X550em +ffffffff817a36b0 T ixgbe_setup_fc_X550em +ffffffff817a3810 T ixgbe_init_phy_ops_X550em +ffffffff817a3ce0 T ixgbe_setup_fw_link +ffffffff817a3e10 T ixgbe_fc_autoneg_fw +ffffffff817a3e40 T ixgbe_setup_eee_fw +ffffffff817a3ea0 T ixgbe_init_ops_X550EM_a +ffffffff817a3fd0 T ixgbe_read_iosf_sb_reg_x550 +ffffffff817a4150 T ixgbe_write_iosf_sb_reg_x550 +ffffffff817a42d0 T ixgbe_read_iosf_sb_reg_x550a +ffffffff817a4370 T ixgbe_write_iosf_sb_reg_x550a +ffffffff817a4400 T ixgbe_acquire_swfw_sync_X550a +ffffffff817a4540 T ixgbe_release_swfw_sync_X550a +ffffffff817a45e0 T ixgbe_fc_autoneg_fiber_x550em_a +ffffffff817a4620 T ixgbe_fc_autoneg_backplane_x550em_a +ffffffff817a4780 T ixgbe_setup_fc_backplane_x550em_a +ffffffff817a4970 T ixgbe_fc_autoneg_sgmii_x550em_a +ffffffff817a4a60 T ixgbe_init_ops_X550EM_x +ffffffff817a4b20 T ixgbe_acquire_swfw_sync_X550em +ffffffff817a4be0 T ixgbe_release_swfw_sync_X550em +ffffffff817a4c70 T ixgbe_iosf_wait +ffffffff817a4d20 T ixgbe_get_phy_token +ffffffff817a4da0 T ixgbe_put_phy_token +ffffffff817a4e20 T ixgbe_supported_sfp_modules_X550em +ffffffff817a4ea0 T ixgbe_identify_sfp_module_X550em +ffffffff817a4f20 T ixgbe_init_mac_link_ops_X550em +ffffffff817a5060 T ixgbe_restart_an_internal_phy_x550em +ffffffff817a5170 T ixgbe_setup_sgmii +ffffffff817a5410 T ixgbe_setup_sgmii_fw +ffffffff817a56f0 T ixgbe_setup_mac_link_sfp_x550a +ffffffff817a58e0 T ixgbe_setup_mac_link_sfp_x550em +ffffffff817a59a0 T ixgbe_setup_mac_link_t_X550em +ffffffff817a5a50 T ixgbe_check_link_t_X550em +ffffffff817a5b30 T ixgbe_get_lasi_ext_t_x550em +ffffffff817a5cb0 T ixgbe_enable_lasi_ext_t_x550em +ffffffff817a5e40 T ixgbe_setup_kr_speed_x550em +ffffffff817a6050 T ixgbe_reset_phy_fw +ffffffff817a6120 T ixgbe_check_overtemp_fw +ffffffff817a61b0 T ixgbe_read_phy_reg_x550a +ffffffff817a6250 T ixgbe_write_phy_reg_x550a +ffffffff817a6300 T ixgbe_setup_kr_x550em +ffffffff817a6370 T ixgbe_setup_internal_phy_t_x550em +ffffffff817a6500 T ixgbe_enter_lplu_t_x550em +ffffffff817a67f0 T ixgbe_handle_lasi_ext_t_x550em +ffffffff817a6870 T ixgbe_reset_phy_t_X550em +ffffffff817a68c0 T ixgbe_set_mdio_speed +ffffffff817a69a0 T ixgbe_init_ext_t_x550em +ffffffff817a6a50 T ixgbe_setup_sfi_x550a +ffffffff817a6c00 T ixgbe_setup_ixfi_x550em_x +ffffffff817a6de0 T ixgbe_setup_ixfi_x550em +ffffffff817a6fc0 T ixgbe_ext_phy_t_x550em_get_link +ffffffff817a7050 T ixgbe_setup_phy_loopback_x550em +ffffffff817a7240 T ixgbe_read_ee_hostif_buffer_X550 +ffffffff817a73d0 T ixgbe_write_ee_hostif_data_X550 +ffffffff817a7440 T ixgbe_checksum_ptr_x550 +ffffffff817a75d0 T ixgbe_calc_checksum_X550 +ffffffff817a7760 T ixgbe_update_flash_X550 +ffffffff817a77b0 T ixgbe_get_lcd_t_x550em +ffffffff817a7870 T ixgbe_set_mux +ffffffff817a8000 T ixgbe_read_i2c_combined_generic_int +ffffffff817a8260 T ixgbe_i2c_start +ffffffff817a83c0 T ixgbe_clock_in_i2c_byte +ffffffff817a84b0 T ixgbe_clock_out_i2c_bit +ffffffff817a85c0 T ixgbe_i2c_stop +ffffffff817a8750 T ixgbe_i2c_bus_clear +ffffffff817a8870 T ixgbe_read_i2c_combined_generic +ffffffff817a8890 T ixgbe_read_i2c_combined_generic_unlocked +ffffffff817a88b0 T ixgbe_write_i2c_combined_generic_int +ffffffff817a8a90 T ixgbe_write_i2c_combined_generic +ffffffff817a8ab0 T ixgbe_write_i2c_combined_generic_unlocked +ffffffff817a8ad0 T ixgbe_init_phy_ops_generic +ffffffff817a8c00 T ixgbe_identify_phy_generic +ffffffff817a90d0 T ixgbe_reset_phy_generic +ffffffff817a9260 T ixgbe_read_phy_reg_generic +ffffffff817a9300 T ixgbe_write_phy_reg_generic +ffffffff817a93a0 T ixgbe_read_phy_reg_mdi +ffffffff817a9520 T ixgbe_write_phy_reg_mdi +ffffffff817a9690 T ixgbe_setup_phy_link_generic +ffffffff817a9940 T ixgbe_setup_phy_link_speed_generic +ffffffff817a9990 T ixgbe_get_phy_firmware_version_generic +ffffffff817a99c0 T ixgbe_read_i2c_byte_generic +ffffffff817a99e0 T ixgbe_write_i2c_byte_generic +ffffffff817a9a00 T ixgbe_read_i2c_eeprom_generic +ffffffff817a9a30 T ixgbe_write_i2c_eeprom_generic +ffffffff817a9a50 T ixgbe_identify_module_generic +ffffffff817a9ac0 T ixgbe_read_i2c_byte_generic_unlocked +ffffffff817a9ae0 T ixgbe_write_i2c_byte_generic_unlocked +ffffffff817a9b00 T ixgbe_tn_check_overtemp +ffffffff817a9b70 T ixgbe_check_reset_blocked +ffffffff817a9bd0 T ixgbe_validate_phy_addr +ffffffff817a9c40 T ixgbe_get_phy_id +ffffffff817a9cf0 T ixgbe_get_phy_type_from_id +ffffffff817a9db0 T ixgbe_get_copper_link_capabilities_generic +ffffffff817a9ea0 T ixgbe_get_copper_speeds_supported +ffffffff817a9f60 T ixgbe_check_phy_link_tnx +ffffffff817aa220 T ixgbe_setup_phy_link_tnx +ffffffff817aa4d0 T ixgbe_get_phy_firmware_version_tnx +ffffffff817aa500 T ixgbe_reset_phy_nl +ffffffff817aa7a0 T ixgbe_get_sfp_init_sequence_offsets +ffffffff817aa980 T ixgbe_is_sfp +ffffffff817aa9d0 T ixgbe_identify_sfp_module_generic +ffffffff817aadc0 T ixgbe_identify_qsfp_module_generic +ffffffff817ab0b0 T ixgbe_get_supported_phy_sfp_layer_generic +ffffffff817ab250 T ixgbe_is_sfp_probe +ffffffff817ab2a0 T ixgbe_read_i2c_byte_generic_int +ffffffff817ab4a0 T ixgbe_clock_out_i2c_byte +ffffffff817ab600 T ixgbe_get_i2c_ack +ffffffff817ab800 T ixgbe_write_i2c_byte_generic_int +ffffffff817ab930 T ixgbe_set_i2c_data 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xge_enable +ffffffff817b72c0 T xge_init +ffffffff817b7750 T xge_stop +ffffffff817b7820 T xge_setpromisc +ffffffff817b78a0 T xge_setmulti +ffffffff817b8000 T thtc_match +ffffffff817b8060 T thtc_attach +ffffffff817b8280 T tht_match +ffffffff817b82b0 T tht_attach +ffffffff817b84d0 T thtc_lookup +ffffffff817b8550 T tht_intr +ffffffff817b8720 T thtc_print +ffffffff817b8790 T tht_sw_reset +ffffffff817b8c80 T tht_lladdr_read +ffffffff817b8d30 T tht_ioctl +ffffffff817b8ec0 T tht_start +ffffffff817b9490 T tht_watchdog +ffffffff817b94c0 T tht_media_change +ffffffff817b94f0 T tht_media_status +ffffffff817b95e0 T tht_mountroot +ffffffff817b97b0 T tht_fifo_alloc +ffffffff817b98c0 T tht_fw_load +ffffffff817b9c20 T tht_fifo_free +ffffffff817b9cd0 T tht_link_state +ffffffff817b9d80 T tht_write +ffffffff817b9dd0 T tht_read +ffffffff817b9e00 T tht_rxd +ffffffff817ba200 T tht_rxf_fill +ffffffff817ba7a0 T tht_txf +ffffffff817baaa0 T tht_up +ffffffff817bb170 T tht_down +ffffffff817bb7a0 T tht_iff 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myx_tx_empty +ffffffff817c1f70 T myx_kstat_stop +ffffffff817c2060 T myx_write_txd_tail +ffffffff817c2200 T myx_load_mbuf +ffffffff817c22b0 T myx_txeof +ffffffff817c2400 T myx_rxeof +ffffffff817c2650 T myx_buf_fill +ffffffff817c2710 T myx_kstat_read +ffffffff817c2970 T myx_kstat_tick +ffffffff817c2a00 T myx_kstat_start +ffffffff817c3000 T oce_match +ffffffff817c3030 T oce_attach +ffffffff817c36f0 T oce_pci_alloc +ffffffff817c3980 T oce_dma_alloc +ffffffff817c3ba0 T oce_init_fw +ffffffff817c3db0 T oce_mbox_init +ffffffff817c3e00 T oce_get_fw_config +ffffffff817c3ff0 T oce_check_native_mode +ffffffff817c4150 T oce_macaddr_get +ffffffff817c42a0 T oce_intr +ffffffff817c44a0 T oce_init_stats +ffffffff817c4510 T oce_init_queues +ffffffff817c4690 T oce_attach_ifp +ffffffff817c4780 T oce_tick +ffffffff817c47d0 T oce_refill_rx +ffffffff817c4860 T oce_attachhook +ffffffff817c4a00 T oce_dma_free +ffffffff817c4ab0 T oce_get_link_status +ffffffff817c4c30 T oce_first_mcc +ffffffff817c4d20 T oce_media_change +ffffffff817c4d50 T oce_media_status +ffffffff817c4e80 T oce_ioctl +ffffffff817c5020 T oce_start +ffffffff817c5120 T oce_watchdog +ffffffff817c5180 T oce_init +ffffffff817c5660 T oce_stop +ffffffff817c59a0 T oce_rxrinfo +ffffffff817c5ae0 T oce_iff +ffffffff817c5c20 T oce_update_mcast +ffffffff817c5d90 T oce_set_promisc +ffffffff817c5e30 T oce_link_status +ffffffff817c5ed0 T oce_update_stats +ffffffff817c5fb0 T oce_macaddr_set +ffffffff817c6210 T oce_config_vlan +ffffffff817c6430 T oce_set_flow_control +ffffffff817c6650 T oce_new_rq +ffffffff817c69c0 T oce_alloc_rx_bufs +ffffffff817c6b10 T oce_drain_eq +ffffffff817c6c30 T oce_cmd +ffffffff817c6e80 T oce_drain_rq +ffffffff817c6fa0 T oce_free_posted_rxbuf +ffffffff817c7080 T oce_drain_wq +ffffffff817c71a0 T oce_encap +ffffffff817c7580 T oce_intr_wq +ffffffff817c7720 T oce_txeof +ffffffff817c7820 T oce_intr_rq +ffffffff817c7a00 T oce_rxeoc +ffffffff817c7b40 T oce_rxeof +ffffffff817c7e40 T oce_port_valid +ffffffff817c7e90 T oce_vtp_valid +ffffffff817c7ef0 T oce_get_buf +ffffffff817c80a0 T oce_intr_mq +ffffffff817c82d0 T oce_link_event +ffffffff817c8380 T oce_create_iface +ffffffff817c8540 T oce_create_eq +ffffffff817c86b0 T oce_create_wq +ffffffff817c8970 T oce_create_rq +ffffffff817c8c20 T oce_create_mq +ffffffff817c8df0 T oce_release_queues +ffffffff817c8f10 T oce_destroy_rq +ffffffff817c9170 T oce_destroy_wq +ffffffff817c93d0 T oce_destroy_mq +ffffffff817c9590 T oce_destroy_eq +ffffffff817c9740 T oce_create_ring +ffffffff817c9930 T oce_create_cq +ffffffff817c9ad0 T oce_destroy_ring +ffffffff817c9b80 T oce_pkt_alloc +ffffffff817c9c30 T oce_new_wq +ffffffff817c9f40 T oce_destroy_cq +ffffffff817ca0f0 T oce_pkt_free +ffffffff817ca140 T oce_new_eq +ffffffff817ca4b0 T oce_new_mq +ffffffff817ca820 T oce_drain_mq +ffffffff817ca940 T oce_new_cq +ffffffff817cad60 T oce_load_ring +ffffffff817cae70 T oce_mbox_dispatch +ffffffff817cb040 T oce_macaddr_add +ffffffff817cb190 T oce_macaddr_del +ffffffff817cb2c0 T oce_stats_be2 +ffffffff817cb3f0 T oce_stats_be3 +ffffffff817cb510 T oce_stats_xe +ffffffff817cc000 T dc_pci_match +ffffffff817cc090 T dc_pci_attach +ffffffff817cc8b0 T dc_pci_detach +ffffffff817cd000 T epic_pci_match +ffffffff817cd030 T epic_pci_attach +ffffffff817ce000 T ti_pci_match +ffffffff817ce030 T ti_pci_attach +ffffffff817cf000 T ne_pci_match +ffffffff817cf110 T ne_pci_attach +ffffffff817cf480 T ne_pci_lookup +ffffffff817d0000 T gem_match_pci +ffffffff817d0030 T gem_attach_pci +ffffffff817d02a0 T gem_detach_pci +ffffffff817d0320 T gem_pci_enaddr +ffffffff817d1000 T cas_match +ffffffff817d1030 T cas_attach +ffffffff817d11c0 T cas_pci_enaddr +ffffffff817d14d0 T cas_intr +ffffffff817d1650 T cas_config +ffffffff817d1d60 T cas_reset +ffffffff817d1e20 T cas_start +ffffffff817d1f70 T cas_ioctl +ffffffff817d20c0 T cas_watchdog +ffffffff817d2110 T cas_mii_readreg +ffffffff817d21e0 T cas_mii_writereg +ffffffff817d22d0 T cas_mii_statchg +ffffffff817d2390 T cas_mediachange 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iwm_flush_tx_path +ffffffff8182dfa0 T iwm_wait_tx_queues_empty +ffffffff8182e060 T iwm_led_enable +ffffffff8182e090 T iwm_led_disable +ffffffff8182e0c0 T iwm_led_is_enabled +ffffffff8182e120 T iwm_led_blink_timeout +ffffffff8182e1a0 T iwm_led_blink_start +ffffffff8182e1f0 T iwm_led_blink_stop +ffffffff8182e240 T iwm_beacon_filter_send_cmd +ffffffff8182e2d0 T iwm_beacon_filter_set_cqm_params +ffffffff8182e310 T iwm_update_beacon_abort +ffffffff8182e400 T iwm_power_build_cmd +ffffffff8182e490 T iwm_power_mac_update_mode +ffffffff8182e6a0 T iwm_power_update_device +ffffffff8182e740 T iwm_enable_beacon_filter +ffffffff8182e830 T iwm_disable_beacon_filter +ffffffff8182e910 T iwm_add_sta_cmd +ffffffff8182ed10 T iwm_add_aux_sta +ffffffff8182eeb0 T iwm_drain_sta +ffffffff8182f060 T iwm_rm_sta_cmd +ffffffff8182f120 T iwm_scan_rx_chain +ffffffff8182f190 T iwm_scan_rate_n_flags +ffffffff8182f290 T iwm_lmac_scan_fill_channels +ffffffff8182f370 T iwm_umac_scan_fill_channels +ffffffff8182f460 T iwm_fill_probe_req_v1 +ffffffff8182f500 T iwm_fill_probe_req +ffffffff8182f740 T iwm_lmac_scan +ffffffff8182fc40 T iwm_config_umac_scan +ffffffff8182fe50 T iwm_umac_scan_size +ffffffff8182fec0 T iwm_get_scan_req_umac_chan_param +ffffffff8182ff10 T iwm_get_scan_req_umac_data +ffffffff8182ff60 T iwm_umac_scan +ffffffff818303d0 T iwm_mcc_update +ffffffff81830460 T iwm_ridx2rate +ffffffff818304d0 T iwm_ack_rates +ffffffff81830790 T iwm_mac_ctxt_cmd_common +ffffffff81830aa0 T iwm_mac_ctxt_cmd_fill_sta +ffffffff81830b50 T iwm_update_quotas +ffffffff81830f40 T iwm_del_task +ffffffff81830fa0 T iwm_scan +ffffffff81831210 T iwm_scan_abort +ffffffff81831330 T iwm_bgscan +ffffffff818313d0 T iwm_bgscan_done +ffffffff81831470 T iwm_bgscan_done_task +ffffffff818316d0 T iwm_umac_scan_abort +ffffffff81831760 T iwm_lmac_scan_abort +ffffffff81831800 T iwm_auth +ffffffff81831c00 T iwm_deauth +ffffffff81831f60 T iwm_run +ffffffff81832640 T iwm_allow_mcast +ffffffff81832740 T iwm_run_stop +ffffffff81832db0 T iwm_node_alloc +ffffffff81832dd0 T iwm_set_key_v1 +ffffffff81832f10 T iwm_set_key +ffffffff81833180 T iwm_delete_key_v1 +ffffffff818332b0 T iwm_delete_key +ffffffff81833520 T iwm_calib_timeout +ffffffff818335e0 T iwm_set_rate_table_vht +ffffffff81833900 T iwm_set_rate_table +ffffffff81833d00 T iwm_media_change +ffffffff81833ef0 T iwm_stop +ffffffff81834390 T iwm_init +ffffffff81834650 T iwm_newstate_task +ffffffff818347d0 T iwm_newstate +ffffffff81834930 T iwm_endscan +ffffffff81834980 T iwm_fill_sf_command +ffffffff81834a80 T iwm_send_soc_conf +ffffffff81834bc0 T iwm_send_update_mcc_cmd +ffffffff81834d80 T iwm_send_temp_report_ths_cmd +ffffffff81834e50 T iwm_tt_tx_backoff +ffffffff81834ee0 T iwm_fill_paging_mem +ffffffff81835110 T iwm_alloc_fw_paging_mem +ffffffff818352b0 T iwm_init_hw +ffffffff81835c80 T iwm_preinit +ffffffff81835ea0 T iwm_start +ffffffff81836070 T iwm_watchdog +ffffffff81836210 T iwm_nic_error +ffffffff81836700 T iwm_dump_driver_status +ffffffff818367a0 T iwm_ioctl +ffffffff81836910 T iwm_nic_umac_error +ffffffff81836d50 T iwm_desc_lookup +ffffffff81836ee0 T iwm_rx_pkt_valid +ffffffff81836f30 T iwm_rx_pkt +ffffffff81837cd0 T iwm_notif_intr +ffffffff81837e30 T iwm_intr +ffffffff81838260 T iwm_intr_msix +ffffffff81838500 T iwm_match +ffffffff81838530 T iwm_attach_hook +ffffffff81838570 T iwm_attach +ffffffff81839640 T iwm_radiotap_attach +ffffffff818396d0 T iwm_init_task +ffffffff81839790 T iwm_resume +ffffffff818398c0 T iwm_wakeup +ffffffff81839970 T iwm_activate +ffffffff8183a000 T iwx_lookup_cmd_ver +ffffffff8183a070 T iwx_lookup_notif_ver +ffffffff8183a0e0 T iwx_is_mimo_ht_plcp +ffffffff8183a120 T iwx_store_cscheme +ffffffff8183a170 T iwx_ctxt_info_alloc_dma +ffffffff8183a210 T iwx_dma_contig_alloc +ffffffff8183a3f0 T iwx_ctxt_info_free_paging +ffffffff8183a550 T iwx_dma_contig_free +ffffffff8183a610 T iwx_get_num_sections +ffffffff8183a690 T iwx_init_fw_sec +ffffffff8183ab40 T iwx_fw_version_str +ffffffff8183ab80 T iwx_alloc_fw_monitor_block +ffffffff8183ac30 T iwx_alloc_fw_monitor +ffffffff8183acf0 T iwx_apply_debug_destination +ffffffff8183b230 T iwx_nic_lock +ffffffff8183b380 T iwx_write_prph +ffffffff8183b420 T iwx_set_bits_prph +ffffffff8183b440 T iwx_clear_bits_prph +ffffffff8183b460 T iwx_read_prph +ffffffff8183b500 T iwx_nic_unlock +ffffffff8183b5b0 T iwx_set_ltr +ffffffff8183b700 T iwx_ctxt_info_init +ffffffff8183b9c0 T iwx_ctxt_info_free_fw_img +ffffffff8183bb40 T iwx_ctxt_info_gen3_init +ffffffff8183c130 T iwx_write_umac_prph +ffffffff8183c1e0 T iwx_firmware_store_section +ffffffff8183c280 T iwx_set_default_calib +ffffffff8183c2d0 T iwx_fw_info_free +ffffffff8183c360 T iwx_read_firmware +ffffffff8183cef0 T iwx_prph_addr_mask +ffffffff8183cf30 T iwx_read_prph_unlocked +ffffffff8183cfb0 T iwx_nic_assert_locked +ffffffff8183d010 T iwx_write_prph_unlocked +ffffffff8183d090 T iwx_write_prph64 +ffffffff8183d1c0 T iwx_read_umac_prph_unlocked +ffffffff8183d240 T iwx_read_umac_prph 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iwx_apm_init +ffffffff8183f6d0 T iwx_apm_stop +ffffffff8183fa90 T iwx_init_msix_hw +ffffffff8183fb30 T iwx_conf_msix_hw +ffffffff818400d0 T iwx_clear_persistence_bit +ffffffff81840250 T iwx_start_hw +ffffffff81840650 T iwx_stop_device +ffffffff81840bc0 T iwx_nic_config +ffffffff81840c50 T iwx_nic_rx_init +ffffffff81840cb0 T iwx_nic_init +ffffffff81840dd0 T iwx_enable_txq +ffffffff818410a0 T iwx_send_cmd +ffffffff81841680 T iwx_free_resp +ffffffff81841700 T iwx_disable_txq +ffffffff81841960 T iwx_post_alive +ffffffff818419f0 T iwx_schedule_session_protection +ffffffff81841ac0 T iwx_send_cmd_pdu +ffffffff81841b40 T iwx_unprotect_session +ffffffff81841c10 T iwx_fw_valid_tx_ant +ffffffff81841c50 T iwx_fw_valid_rx_ant +ffffffff81841ca0 T iwx_init_channel_map +ffffffff81841ea0 T iwx_mimo_enabled +ffffffff81841ee0 T iwx_setup_ht_rates +ffffffff81841f90 T iwx_setup_vht_rates +ffffffff81842020 T iwx_init_reorder_buffer +ffffffff81842080 T iwx_clear_reorder_buffer +ffffffff81842140 T iwx_rx_ba_session_expired +ffffffff81842240 T iwx_rx_bar_frame_release +ffffffff818422f0 T iwx_release_frames +ffffffff818424e0 T iwx_reorder_timer_expired +ffffffff818426a0 T iwx_find_rxba_data +ffffffff81842730 T iwx_sta_rx_agg_baid_cfg_cmd +ffffffff81842980 T iwx_send_cmd_pdu_status +ffffffff81842a10 T iwx_sta_rx_agg_sta_cmd +ffffffff81842c60 T iwx_sta_rx_agg +ffffffff81842f30 T iwx_mac_ctxt_task +ffffffff818430c0 T iwx_mac_ctxt_cmd +ffffffff818432a0 T iwx_phy_ctxt_task +ffffffff81843460 T iwx_phy_ctxt_update +ffffffff818438c0 T iwx_updatechan +ffffffff81843980 T iwx_add_task +ffffffff818439f0 T iwx_updateprot +ffffffff81843ab0 T iwx_updateslot +ffffffff81843b70 T iwx_updateedca +ffffffff81843c30 T iwx_updatedtim +ffffffff81843cf0 T iwx_sta_tx_agg_start +ffffffff81843ee0 T iwx_ba_task +ffffffff81844030 T iwx_ampdu_rx_start +ffffffff81844110 T iwx_ampdu_rx_stop +ffffffff818441f0 T iwx_ampdu_tx_start +ffffffff81844300 T iwx_set_mac_addr_from_csr +ffffffff81844520 T iwx_flip_hw_address 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cmpci_reg_set_4 +ffffffff81857830 T cmpci_reg_clear_4 +ffffffff818578a0 T cmpci_reg_set_reg_misc +ffffffff818578e0 T cmpci_reg_clear_reg_misc +ffffffff81857930 T cmpci_rate_to_index +ffffffff818579b0 T cmpci_index_to_rate +ffffffff818579e0 T cmpci_index_to_divider +ffffffff81857a10 T cmpci_intr +ffffffff81857d10 T cmpci_set_mixer_gain +ffffffff81858460 T cmpci_resume +ffffffff818584d0 T cmpci_alloc_dmamem +ffffffff818586a0 T cmpci_free_dmamem +ffffffff81858770 T cmpci_find_dmamem +ffffffff818587d0 T cmpci_adjust +ffffffff81858820 T cmpci_set_out_ports +ffffffff81858e20 T cmpci_set_in_ports +ffffffff8185a000 T iha_pci_probe +ffffffff8185a070 T iha_pci_attach +ffffffff8185b000 T pcscp_match +ffffffff8185b040 T pcscp_attach +ffffffff8185b420 T pcscp_read_reg +ffffffff8185b450 T pcscp_write_reg +ffffffff8185b480 T pcscp_dma_isintr +ffffffff8185b4d0 T pcscp_dma_reset +ffffffff8185b530 T pcscp_dma_intr +ffffffff8185ba90 T pcscp_dma_setup +ffffffff8185bd10 T pcscp_dma_go +ffffffff8185be40 T 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bge_rxtick +ffffffff8185f730 T bge_rxtick_jumbo +ffffffff8185f770 T bge_fill_rx_ring_jumbo +ffffffff8185f8e0 T bge_free_rx_ring_std +ffffffff8185fa00 T bge_init_rx_ring_jumbo +ffffffff8185fbe0 T bge_free_rx_ring_jumbo +ffffffff8185fd40 T bge_free_tx_ring +ffffffff8185fe20 T bge_init_tx_ring +ffffffff81860010 T bge_iff +ffffffff81860180 T bge_sig_pre_reset +ffffffff818601c0 T bge_sig_post_reset +ffffffff81860240 T bge_sig_legacy +ffffffff81860270 T bge_stop_fw +ffffffff818602a0 T bge_dma_swap_options +ffffffff818602f0 T bge_phy_addr +ffffffff818603b0 T bge_chipinit +ffffffff81860840 T bge_blockinit +ffffffff81861f10 T bge_lookup_rev +ffffffff818621b0 T bge_can_use_msi +ffffffff81862220 T bge_reset +ffffffff81862bd0 T bge_ioctl +ffffffff81862f30 T bge_start +ffffffff818630f0 T bge_watchdog +ffffffff81863150 T bge_intr +ffffffff81863350 T bge_ifmedia_upd +ffffffff81863620 T bge_ifmedia_sts +ffffffff81863720 T bge_tick +ffffffff818638e0 T bge_stop +ffffffff81864640 T bge_init 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bnx_miibus_read_reg +ffffffff8186a580 T bnx_miibus_write_reg +ffffffff8186a7c0 T bnx_miibus_statchg +ffffffff8186a9a0 T bnx_init_media +ffffffff8186aa30 T bnx_ifmedia_upd +ffffffff8186aab0 T bnx_ifmedia_sts +ffffffff8186ab20 T bnx_tick +ffffffff8186ac30 T bnx_rxrefill +ffffffff8186ac80 T bnx_mgmt_init +ffffffff8186ada0 T bnx_reg_wr_ind +ffffffff8186adf0 T bnx_ctx_wr +ffffffff8186afe0 T bnx_acquire_nvram_lock +ffffffff8186b0a0 T bnx_release_nvram_lock +ffffffff8186b160 T bnx_enable_nvram_access +ffffffff8186b1c0 T bnx_disable_nvram_access +ffffffff8186b220 T bnx_nvram_read_dword +ffffffff8186b390 T bnx_init_nvram +ffffffff8186bb30 T bnx_nvram_read +ffffffff8186be60 T bnx_dma_free +ffffffff8186c3a0 T bnx_fw_sync +ffffffff8186c560 T bnx_load_rv2p_fw +ffffffff8186c670 T bnx_load_cpu_fw +ffffffff8186cb00 T bnx_init_cpus +ffffffff8186d4a0 T bnx_init_context +ffffffff8186db50 T bnx_set_mac_addr +ffffffff8186dbc0 T bnx_stop +ffffffff8186de90 T bnx_disable_intr +ffffffff8186def0 T bnx_free_rx_chain +ffffffff8186dfc0 T bnx_free_tx_chain +ffffffff8186e0c0 T bnx_blockinit +ffffffff8186e690 T bnx_get_buf +ffffffff8186e870 T bnx_init_tx_context +ffffffff8186e930 T bnx_init_tx_chain +ffffffff8186ea70 T bnx_init_rx_context +ffffffff8186eb30 T bnx_fill_rx_chain +ffffffff8186ec70 T bnx_init_rx_chain +ffffffff8186ed70 T bnx_phy_intr +ffffffff8186ee10 T bnx_rx_intr +ffffffff8186f170 T bnx_tx_intr +ffffffff8186f2e0 T bnx_enable_intr +ffffffff8186f3a0 T bnx_init +ffffffff8186f7c0 T bnx_iff +ffffffff8186fbe0 T bnx_tx_encap +ffffffff8186fe20 T bnx_stats_update +ffffffff81871000 T vge_probe +ffffffff81871030 T vge_attach +ffffffff81871410 T vge_detach +ffffffff818714d0 T vge_read_eeprom +ffffffff818715d0 T vge_miipoll_stop +ffffffff818716a0 T vge_miipoll_start +ffffffff81871800 T vge_miibus_readreg +ffffffff818719e0 T vge_miibus_writereg +ffffffff81871bd0 T vge_cam_clear +ffffffff81871f30 T vge_cam_set +ffffffff818722f0 T vge_iff +ffffffff818724b0 T vge_reset +ffffffff81872640 T vge_allocmem +ffffffff81872a60 T vge_freemem +ffffffff81872bb0 T vge_intr +ffffffff81872db0 T vge_ioctl +ffffffff81872f00 T vge_start +ffffffff81873100 T vge_watchdog +ffffffff81873170 T vge_miibus_statchg +ffffffff818733b0 T vge_ifmedia_upd +ffffffff818733d0 T vge_ifmedia_sts +ffffffff81873430 T vge_tick +ffffffff81873500 T vge_stop +ffffffff81873700 T vge_newbuf +ffffffff81873930 T vge_tx_list_init +ffffffff818739e0 T vge_rx_list_init +ffffffff81873ae0 T vge_rxeof +ffffffff81873f10 T vge_txeof +ffffffff81874090 T vge_init +ffffffff81874820 T vge_encap +ffffffff81875000 T stge_match +ffffffff81875030 T stge_attach +ffffffff818758b0 T stge_mii_bitbang_read +ffffffff81875900 T stge_mii_bitbang_write +ffffffff81875930 T stge_tick +ffffffff81875a70 T stge_intr +ffffffff81875d60 T stge_reset +ffffffff81875e40 T stge_read_eeprom +ffffffff81875f70 T stge_mii_readreg +ffffffff81875f90 T stge_mii_writereg +ffffffff81875fb0 T stge_mii_statchg +ffffffff81876000 T stge_mediachange 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et_init_mac +ffffffff8187f930 T et_init_rxmac +ffffffff8187fbe0 T et_init_txmac +ffffffff8187fc60 T et_init_rxdma +ffffffff8187ffd0 T et_init_txdma +ffffffff81880100 T et_newbuf_cluster +ffffffff81880120 T et_newbuf +ffffffff81880360 T et_newbuf_hdr +ffffffff81881000 T jme_match +ffffffff81881030 T jme_attach +ffffffff818815c0 T jme_miibus_readreg +ffffffff818816e0 T jme_miibus_writereg +ffffffff81881800 T jme_miibus_statchg +ffffffff81881d30 T jme_stop_rx +ffffffff81881e20 T jme_stop_tx +ffffffff81881f10 T jme_rxeof +ffffffff81882040 T jme_txeof +ffffffff81882290 T jme_init_tx_ring +ffffffff81882350 T jme_init_ssb +ffffffff818823b0 T jme_mac_config +ffffffff818827c0 T jme_mediastatus +ffffffff81882820 T jme_mediachange +ffffffff81882880 T jme_eeprom_read_byte +ffffffff818829e0 T jme_eeprom_macaddr +ffffffff81882b20 T jme_reg_macaddr +ffffffff81882bc0 T jme_map_intr_vector +ffffffff81882c60 T jme_intr +ffffffff81882e10 T jme_reset +ffffffff81882e80 T jme_dma_alloc +ffffffff81883450 T jme_ioctl +ffffffff818835a0 T jme_start +ffffffff818836f0 T jme_watchdog +ffffffff81883790 T jme_tick +ffffffff818837f0 T jme_detach +ffffffff818838b0 T jme_stop +ffffffff81883b90 T jme_dma_free +ffffffff81883cc0 T jme_encap +ffffffff81883f50 T jme_init +ffffffff818846c0 T jme_iff +ffffffff81884820 T jme_discard_rxbufs +ffffffff818848a0 T jme_rxpkt +ffffffff81884c10 T jme_newbuf +ffffffff81884d80 T jme_init_rx_ring +ffffffff81884ea0 T jme_set_vlan +ffffffff81885000 T age_match +ffffffff81885030 T age_attach +ffffffff81885490 T age_intr +ffffffff81885680 T age_phy_reset +ffffffff81885f40 T age_reset +ffffffff81886070 T age_dma_alloc +ffffffff818867e0 T age_get_macaddr +ffffffff818869c0 T age_ioctl +ffffffff81886b10 T age_start +ffffffff81886c80 T age_watchdog +ffffffff81886d20 T age_miibus_readreg +ffffffff81886e20 T age_miibus_writereg +ffffffff81886f30 T age_miibus_statchg +ffffffff81887100 T age_mediachange +ffffffff81887160 T age_mediastatus +ffffffff818871c0 T age_tick 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ale_miibus_statchg +ffffffff81892a50 T ale_stop_mac +ffffffff81892b40 T ale_mac_config +ffffffff81892be0 T ale_mediastatus +ffffffff81892c50 T ale_mediachange +ffffffff81892cb0 T ale_get_macaddr +ffffffff81892e90 T ale_phy_reset +ffffffff818934d0 T ale_intr +ffffffff81893620 T ale_reset +ffffffff81893790 T ale_dma_alloc +ffffffff81893f00 T ale_ioctl +ffffffff81894050 T ale_start +ffffffff818941c0 T ale_watchdog +ffffffff81894240 T ale_tick +ffffffff818942a0 T ale_dma_free +ffffffff81894560 T ale_detach +ffffffff81894620 T ale_stop +ffffffff818948e0 T ale_init +ffffffff818952f0 T ale_encap +ffffffff81895550 T ale_txeof +ffffffff81895710 T ale_iff +ffffffff81895870 T ale_stats_clear +ffffffff81895940 T ale_stats_update +ffffffff81895cb0 T ale_rxeof +ffffffff81895f50 T ale_rx_update_page +ffffffff81896090 T ale_rxcsum +ffffffff81896140 T ale_init_rx_pages +ffffffff81896270 T ale_init_tx_ring +ffffffff81896360 T ale_rxvlan +ffffffff81897000 T amdpm_match +ffffffff81897030 T amdpm_attach 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malo_pci_detach +ffffffff818a8230 T malo_pci_activate +ffffffff818a8290 T malo_pci_wakeup +ffffffff818a9000 T bwi_pci_match +ffffffff818a9070 T bwi_pci_attach +ffffffff818a9290 T bwi_pci_detach +ffffffff818a92e0 T bwi_pci_activate +ffffffff818a9350 T bwi_reset_bcm4331 +ffffffff818a9470 T bwi_pci_conf_write +ffffffff818a94a0 T bwi_pci_conf_read +ffffffff818a94d0 T bwi_pci_wakeup +ffffffff818aa000 T piixpm_match +ffffffff818aa030 T piixpm_attach +ffffffff818aa4c0 T piixpm_intr +ffffffff818aa5d0 T piixpm_i2c_acquire_bus +ffffffff818aa6b0 T piixpm_i2c_release_bus +ffffffff818aa790 T piixpm_i2c_exec +ffffffff818ab000 T vic_match +ffffffff818ab0a0 T vic_attach +ffffffff818ab440 T vic_intr +ffffffff818ab4c0 T vic_query +ffffffff818ab720 T vic_alloc_data +ffffffff818aba20 T vic_tick +ffffffff818aba90 T vic_ioctl +ffffffff818abcc0 T vic_start +ffffffff818ac000 T vic_watchdog +ffffffff818ac030 T vic_media_change +ffffffff818ac060 T vic_media_status +ffffffff818ac120 T vic_read +ffffffff818ac140 T vic_read_cmd +ffffffff818ac190 T vic_getlladdr +ffffffff818ac240 T vic_alloc_dmamem +ffffffff818ac3b0 T vic_rx_fill +ffffffff818ac590 T vic_alloc_mbuf +ffffffff818ac650 T vic_init_data +ffffffff818aca00 T vic_uninit_data +ffffffff818acbd0 T vic_link_state +ffffffff818acc50 T vic_write +ffffffff818acca0 T vic_rx_proc +ffffffff818acf00 T vic_tx_proc +ffffffff818ad080 T vic_iff +ffffffff818ad1c0 T vic_setlladdr +ffffffff818ad220 T vic_load_txb +ffffffff818ad2d0 T vic_init +ffffffff818ad470 T vic_stop +ffffffff818ad5b0 T vic_rxrinfo +ffffffff818ad680 T vic_free_dmamem +ffffffff818ae000 T vmxnet3_match +ffffffff818ae030 T vmxnet3_attach +ffffffff818ae900 T vmxnet3_intr +ffffffff818ae9a0 T vmxnet3_intr_event +ffffffff818aea20 T vmxnet3_intr_intx +ffffffff818aea90 T vmxnet3_intr_queue +ffffffff818aeb20 T vmxnet3_dma_init +ffffffff818aeed0 T vmxnet3_ioctl +ffffffff818af160 T vmxnet3_start +ffffffff818af480 T vmxnet3_watchdog +ffffffff818af4d0 T vmxnet3_media_change +ffffffff818af500 T vmxnet3_media_status +ffffffff818af610 T vmxnet3_link_state +ffffffff818af6d0 T vmxnet3_dma_allocmem +ffffffff818af820 T vmxnet3_alloc_txring +ffffffff818af990 T vmxnet3_alloc_rxring +ffffffff818afc40 T vmxnet3_rxfill_tick +ffffffff818afcb0 T vmxnet3_txinit +ffffffff818afd20 T vmxnet3_rxfill +ffffffff818aff70 T vmxnet3_rxinit +ffffffff818b0040 T vmxnet3_txstop +ffffffff818b00d0 T vmxnet3_rxstop +ffffffff818b01d0 T vmxnet3_enable_all_intrs +ffffffff818b02a0 T vmxnet3_disable_all_intrs +ffffffff818b0370 T vmxnet3_evintr +ffffffff818b0540 T vmxnet3_rxintr +ffffffff818b08d0 T vmxnet3_txintr +ffffffff818b0a70 T vmxnet3_init +ffffffff818b0e80 T vmxnet3_rx_csum +ffffffff818b0ee0 T vmxnet3_iff +ffffffff818b1020 T vmxnet3_stop +ffffffff818b1270 T vmxnet3_reset +ffffffff818b12b0 t vmx_kstat_create +ffffffff818b1490 t vmx_kstat_read +ffffffff818b2000 T vmwpvs_match +ffffffff818b2040 T vmwpvs_attach +ffffffff818b2df0 T vmwpvs_scsi_cmd +ffffffff818b3260 T vmwpvs_intx +ffffffff818b32e0 T vmwpvs_msg_task +ffffffff818b3560 T vmwpvs_intr +ffffffff818b3740 T vmwpvs_get_config +ffffffff818b3940 T vmwpvs_dmamem_zalloc +ffffffff818b39a0 T vmwpvs_dmamem_alloc +ffffffff818b3b20 T vmwpvs_ccb_put +ffffffff818b3b80 T vmwpvs_setup_rings +ffffffff818b3cb0 T vmwpvs_setup_msg_ring +ffffffff818b3da0 T vmwpvs_ccb_get +ffffffff818b3e20 T vmwpvs_dmamem_free +ffffffff818b3ea0 T vmwpvs_cmd +ffffffff818b3f50 T vmwpvs_scsi_cmd_done +ffffffff818b4130 T vmwpvs_scsi_cmd_poll +ffffffff818b5000 T lii_match +ffffffff818b5030 T lii_attach +ffffffff818b5440 T lii_activate +ffffffff818b5540 T lii_reset +ffffffff818b5810 T lii_spi_configure +ffffffff818b5900 T lii_eeprom_present +ffffffff818b5990 T lii_eeprom_read +ffffffff818b59c0 T lii_spi_read +ffffffff818b5c80 T lii_read_macaddr +ffffffff818b5df0 T lii_intr +ffffffff818b5f00 T lii_alloc_rings +ffffffff818b6110 T lii_tick +ffffffff818b6160 T lii_mii_readreg +ffffffff818b6400 T lii_mii_writereg +ffffffff818b66a0 T lii_mii_statchg +ffffffff818b6710 T lii_media_change +ffffffff818b6760 T lii_media_status +ffffffff818b67c0 T lii_ioctl +ffffffff818b6950 T lii_start +ffffffff818b6b00 T lii_watchdog +ffffffff818b6b40 T lii_stop +ffffffff818b6bb0 T lii_init +ffffffff818b70b0 T lii_iff +ffffffff818b71f0 T lii_tx_put +ffffffff818b7300 T lii_free_tx_space +ffffffff818b7340 T lii_rxintr +ffffffff818b74f0 T lii_txintr +ffffffff818b8000 T ichiic_match +ffffffff818b8030 T ichiic_attach +ffffffff818b8220 T ichiic_intr +ffffffff818b8330 T ichiic_i2c_acquire_bus +ffffffff818b8380 T ichiic_i2c_release_bus +ffffffff818b83d0 T ichiic_i2c_exec +ffffffff818b9000 T viapm_match +ffffffff818b9030 T viapm_attach +ffffffff818b9650 T viapm_intr +ffffffff818b9760 T viapm_i2c_acquire_bus +ffffffff818b97b0 T viapm_i2c_release_bus +ffffffff818b9800 T viapm_i2c_exec +ffffffff818b9b20 T viapm_refresh_sensor_data +ffffffff818b9e50 T viapm_refresh +ffffffff818b9e80 T val_to_uK +ffffffff818b9f20 T val_to_rpm +ffffffff818b9f60 T val_to_uV +ffffffff818ba000 T viapm_get_timecount +ffffffff818bb000 T amdiic_match +ffffffff818bb030 T amdiic_attach +ffffffff818bb200 T amdiic_intr +ffffffff818bb2d0 T amdiic_i2c_acquire_bus +ffffffff818bb320 T amdiic_i2c_release_bus +ffffffff818bb370 T amdiic_i2c_exec +ffffffff818bb5d0 T amdiic_read +ffffffff818bb740 T amdiic_wait +ffffffff818bb7e0 T amdiic_write +ffffffff818bc000 T nviic_match +ffffffff818bc030 T nviic_attach +ffffffff818bc280 T nviic_i2c_acquire_bus +ffffffff818bc2d0 T nviic_i2c_release_bus +ffffffff818bc310 T nviic_i2c_exec +ffffffff818bc530 T nviic_write +ffffffff818bc580 T nviic_read +ffffffff818bd000 T sdhc_pci_match +ffffffff818bd060 T sdhc_pci_attach +ffffffff818bd3a0 T sdhc_pci_activate +ffffffff818bd400 T sdhc_takecontroller +ffffffff818bd4a0 T sdhc_ricohfix +ffffffff818bd610 T sdhc_pci_conf_write +ffffffff818be000 T kate_match +ffffffff818be170 T kate_attach +ffffffff818be420 T kate_refresh +ffffffff818bf000 T km_match +ffffffff818bf050 T km_attach +ffffffff818bf0f0 T km_refresh +ffffffff818c0000 T ksmn_match +ffffffff818c0050 T ksmn_attach +ffffffff818c0230 T ksmn_ccd_attach +ffffffff818c0380 T ksmn_refresh +ffffffff818c04d0 T ksmn_read_reg +ffffffff818c1000 t iosf_pci_match +ffffffff818c1060 t iosf_pci_attach +ffffffff818c1100 t iosf_pci_mbi_mdr_rd +ffffffff818c1160 t iosf_pci_mbi_mdr_wr +ffffffff818c2000 T itherm_probe +ffffffff818c2030 T itherm_attach +ffffffff818c2380 T itherm_activate +ffffffff818c2400 T itherm_enable +ffffffff818c2460 T itherm_refresh +ffffffff818c2470 T itherm_refresh_sensor_data +ffffffff818c2860 T itherm_bias_temperature_sensor +ffffffff818c3000 T pchtemp_match +ffffffff818c3030 T pchtemp_attach +ffffffff818c3190 T pchtemp_refresh +ffffffff818c4000 T rtsx_pci_match +ffffffff818c4090 T rtsx_pci_attach +ffffffff818c5000 T xspd_match +ffffffff818c5030 T xspd_attach +ffffffff818c51f0 T xspd_intr +ffffffff818c6000 T virtio_pci_match +ffffffff818c6080 T virtio_pci_attach +ffffffff818c6430 T virtio_pci_detach +ffffffff818c6510 T virtio_pci_kick +ffffffff818c6570 T virtio_pci_read_device_config_1 +ffffffff818c65a0 T virtio_pci_read_device_config_2 +ffffffff818c65d0 T virtio_pci_read_device_config_4 +ffffffff818c6600 T virtio_pci_read_device_config_8 +ffffffff818c6680 T virtio_pci_write_device_config_1 +ffffffff818c66b0 T virtio_pci_write_device_config_2 +ffffffff818c66e0 T virtio_pci_write_device_config_4 +ffffffff818c6710 T virtio_pci_write_device_config_8 +ffffffff818c6780 T virtio_pci_read_queue_size +ffffffff818c67f0 T virtio_pci_setup_queue +ffffffff818c6ae0 T virtio_pci_set_status +ffffffff818c6b60 T virtio_pci_negotiate_features +ffffffff818c6ca0 T virtio_pci_poll_intr +ffffffff818c6d10 T virtio_pci_find_cap +ffffffff818c6ed0 T virtio_pci_attach_10 +ffffffff818c7310 T virtio_pci_attach_09 +ffffffff818c7450 T virtio_pci_adjust_config_region +ffffffff818c74f0 T virtio_pci_setup_msix +ffffffff818c7850 T virtio_pci_legacy_intr +ffffffff818c78f0 T virtio_pci_legacy_intr_mpsafe +ffffffff818c7980 T virtio_pci_free_irqs +ffffffff818c7bd0 T virtio_pci_negotiate_features_10 +ffffffff818c7e10 T virtio_pci_msix_establish +ffffffff818c7ee0 T virtio_pci_set_msix_queue_vector +ffffffff818c7f60 T virtio_pci_set_msix_config_vector +ffffffff818c7fa0 T virtio_pci_config_intr +ffffffff818c7fe0 T virtio_pci_shared_queue_intr +ffffffff818c7ff0 T virtio_pci_queue_intr +ffffffff818c9000 T dwiic_pci_match +ffffffff818c9030 T dwiic_pci_attach +ffffffff818c9350 T dwiic_pci_activate +ffffffff818c93c0 T dwiic_pci_bus_scan +ffffffff818ca000 T bwfm_pci_buscore_read +ffffffff818ca060 T bwfm_pci_buscore_write +ffffffff818ca0d0 T bwfm_pci_buscore_prepare +ffffffff818ca100 T bwfm_pci_buscore_reset +ffffffff818ca2f0 T bwfm_pci_buscore_activate +ffffffff818ca320 T bwfm_pci_preinit +ffffffff818cb440 T bwfm_pci_stop +ffffffff818cb4d0 T bwfm_pci_txcheck +ffffffff818cb590 T bwfm_pci_txdata +ffffffff818cb8f0 T bwfm_pci_msgbuf_query_dcmd +ffffffff818cbd30 T bwfm_pci_msgbuf_set_dcmd +ffffffff818cbd80 T bwfm_pci_match +ffffffff818cbdb0 T bwfm_pci_attach +ffffffff818cc020 T bwfm_pci_detach +ffffffff818cc060 T bwfm_pci_activate +ffffffff818cc210 T bwfm_pci_intr +ffffffff818cc470 T bwfm_pci_select_core +ffffffff818cc550 T bwfm_pci_load_microcode +ffffffff818cc9d0 T bwfm_pci_dmamem_alloc +ffffffff818ccb70 T bwfm_pci_setup_ring +ffffffff818ccd80 T bwfm_pci_intr_enable +ffffffff818ccdd0 T bwfm_pci_hostready +ffffffff818cce40 T bwfm_pci_fill_rx_rings +ffffffff818cce90 T bwfm_pci_dmamem_free +ffffffff818ccf00 T bwfm_pci_cleanup +ffffffff818cd570 T bwfm_pci_send_mb_data +ffffffff818cd690 T bwfm_pci_intmask +ffffffff818cd6d0 T bwfm_pci_pktid_avail +ffffffff818cd740 T bwfm_pci_pktid_new +ffffffff818cd8a0 T bwfm_pci_pktid_free +ffffffff818cd950 T bwfm_pci_fill_rx_buf_ring +ffffffff818cdcb0 T bwfm_pci_fill_rx_ioctl_ring +ffffffff818ce030 T bwfm_pci_ring_write_reserve +ffffffff818ce120 T bwfm_pci_ring_write_cancel +ffffffff818ce160 T bwfm_pci_ring_write_commit +ffffffff818ce240 T bwfm_pci_ring_write_rptr +ffffffff818ce2c0 T bwfm_pci_ring_write_wptr +ffffffff818ce340 T bwfm_pci_setup_flowring +ffffffff818ce4a0 T bwfm_pci_ring_bell +ffffffff818ce4e0 T bwfm_pci_ring_update_rptr +ffffffff818ce590 T bwfm_pci_ring_update_wptr +ffffffff818ce640 T bwfm_pci_ring_write_reserve_multi +ffffffff818ce760 T bwfm_pci_ring_read_avail +ffffffff818ce860 T bwfm_pci_ring_read_commit +ffffffff818ce8f0 T bwfm_pci_ring_rx +ffffffff818ceb00 T bwfm_pci_msg_rx +ffffffff818cf0e0 T bwfm_pci_flowring_delete_cb +ffffffff818cf190 T bwfm_pci_msgbuf_rxioctl +ffffffff818cf280 T bwfm_pci_intr_status +ffffffff818cf2c0 T bwfm_pci_intr_ack +ffffffff818cf300 T bwfm_pci_flowring_lookup +ffffffff818cf470 T bwfm_pci_flowring_create +ffffffff818cf5a0 T bwfm_pci_flowring_create_cb +ffffffff818cf8f0 T bwfm_pci_flowring_delete +ffffffff818cfbc0 T bwfm_pci_msgbuf_h2d_mb_write +ffffffff818cfde0 T bwfm_pci_handle_mb_data +ffffffff818cfeb0 T bwfm_pci_intr_disable +ffffffff818d0000 T ccp_pci_match +ffffffff818d0030 T ccp_pci_attach +ffffffff818d1000 T bnxt_match +ffffffff818d1030 T bnxt_attach +ffffffff818d22a0 T bnxt_dmamem_alloc +ffffffff818d2430 T bnxt_dmamem_free +ffffffff818d24c0 T bnxt_hwrm_ver_get +ffffffff818d2610 T bnxt_hwrm_nvm_get_dev_info +ffffffff818d2760 T bnxt_hwrm_func_drv_rgtr +ffffffff818d2880 T bnxt_hwrm_func_rgtr_async_events +ffffffff818d29a0 T bnxt_hwrm_func_qcaps +ffffffff818d2a80 T bnxt_admin_intr +ffffffff818d2c80 T bnxt_intr +ffffffff818d3150 T bnxt_hwrm_func_qcfg +ffffffff818d3200 T bnxt_hwrm_queue_qportcfg +ffffffff818d32d0 T bnxt_hwrm_func_reset +ffffffff818d3380 T bnxt_mark_cpr_invalid +ffffffff818d33e0 T bnxt_hwrm_ring_alloc +ffffffff818d3590 T bnxt_cfg_async_cr +ffffffff818d3690 T bnxt_write_cp_doorbell +ffffffff818d36d0 T bnxt_set_cp_ring_aggint +ffffffff818d37b0 T bnxt_ioctl +ffffffff818d3940 T bnxt_start +ffffffff818d3d60 T bnxt_watchdog +ffffffff818d3d90 T bnxt_media_change +ffffffff818d3ee0 T bnxt_media_status +ffffffff818d3f00 T bnxt_refill +ffffffff818d3f60 T bnxt_media_autonegotiate +ffffffff818d4050 T bnxt_hwrm_port_phy_qcfg +ffffffff818d44f0 T bnxt_free_slots +ffffffff818d4580 T bnxt_hwrm_cmd_hdr_init +ffffffff818d45d0 T hwrm_send_message +ffffffff818d4650 T bnxt_queue_up +ffffffff818d5580 T bnxt_hwrm_stat_ctx_alloc +ffffffff818d5680 T bnxt_write_tx_doorbell +ffffffff818d56f0 T bnxt_write_rx_doorbell +ffffffff818d5770 T bnxt_hwrm_ring_grp_alloc +ffffffff818d5870 T bnxt_rx_fill +ffffffff818d5980 T bnxt_hwrm_ring_grp_free +ffffffff818d5a60 T bnxt_hwrm_ring_free +ffffffff818d5b50 T bnxt_hwrm_stat_ctx_free +ffffffff818d5c40 T bnxt_queue_down +ffffffff818d6320 T bnxt_up +ffffffff818d69f0 T bnxt_hwrm_vnic_ctx_alloc +ffffffff818d6ad0 T bnxt_hwrm_vnic_alloc +ffffffff818d6bd0 T bnxt_hwrm_vnic_cfg +ffffffff818d6d10 T bnxt_hwrm_vnic_cfg_placement +ffffffff818d6de0 T bnxt_hwrm_set_filter +ffffffff818d6f70 T bnxt_hwrm_vnic_rss_cfg +ffffffff818d7050 T bnxt_iff +ffffffff818d71c0 T bnxt_hwrm_vnic_free +ffffffff818d72b0 T bnxt_hwrm_vnic_ctx_free +ffffffff818d73a0 T bnxt_down +ffffffff818d7740 T bnxt_hwrm_free_filter +ffffffff818d7820 T bnxt_hwrm_cfa_l2_set_rx_mask +ffffffff818d7900 T bnxt_rxrinfo +ffffffff818d7a50 T bnxt_get_sffpage +ffffffff818d7d60 T bnxt_load_mbuf +ffffffff818d7e10 T bnxt_handle_async_event +ffffffff818d7e60 T bnxt_cpr_next_cmpl +ffffffff818d7ed0 T bnxt_cpr_commit +ffffffff818d7f00 T bnxt_cpr_rollback +ffffffff818d7f30 T bnxt_write_cp_doorbell_index +ffffffff818d7fb0 T bnxt_rx +ffffffff818d8290 T bnxt_txeof +ffffffff818d83c0 T bnxt_get_media_type +ffffffff818d8920 T bnxt_add_media_type +ffffffff818d8af0 T _hwrm_send_message +ffffffff818db9a0 T bnxt_rx_fill_slots +ffffffff818dbb60 T bnxt_hwrm_err_map +ffffffff818dbba0 T _bnxt_hwrm_set_async_event_bit +ffffffff818dc000 t mcx_match +ffffffff818dc030 t mcx_attach +ffffffff818df110 T mcx_rx_fill +ffffffff818df360 T mcx_load_mbuf +ffffffff818df410 t mcx_dmamem_alloc +ffffffff818df570 t mcx_pages +ffffffff818dfe50 t mcx_iff +ffffffff818e0290 t mcx_alloc_uar +ffffffff818e0480 t mcx_admin_intr +ffffffff818e0630 t mcx_create_eq +ffffffff818e0bc0 t mcx_ioctl +ffffffff818e16a0 t mcx_start +ffffffff818e1ba0 t mcx_watchdog +ffffffff818e1bd0 t mcx_media_change +ffffffff818e1e90 t mcx_media_status +ffffffff818e1fd0 t mcx_refill +ffffffff818e2040 t mcx_cq_intr +ffffffff818e2560 t mcx_calibrate +ffffffff818e2720 t mcx_port_change +ffffffff818e2860 t mcx_cmdq_post +ffffffff818e2940 t mcx_set_flow_table_entry_mac +ffffffff818e2e10 t mcx_delete_flow_table_entry +ffffffff818e3290 t mcx_access_hca_reg +ffffffff818e36c0 t mcx_cmdq_exec +ffffffff818e38c0 t mcx_up +ffffffff818e6bc0 t mcx_down +ffffffff818e7c20 t mcx_create_flow_table +ffffffff818e7fd0 t mcx_create_flow_group +ffffffff818e84b0 t mcx_destroy_sq +ffffffff818e8760 t mcx_destroy_cq +ffffffff818e8a20 t mcx_arm_cq +ffffffff818e8b40 t mcx_destroy_flow_table +ffffffff818e8ea0 t mcx_kstat_attach_ppcnt +ffffffff818e8fd0 t mcx_kstat_ppcnt_read +ffffffff818e90f0 t mcx_kstat_mtmp_read +ffffffff818e9280 t mcx_kstat_queue_read +ffffffff818ea710 t mcx_timecounter_read +ffffffff818eb000 t iavf_match +ffffffff818eb030 t iavf_attach +ffffffff818eb900 t iavf_reset +ffffffff818ebbd0 t iavf_dmamem_alloc +ffffffff818ebd30 t iavf_arq_fill +ffffffff818ebfe0 t iavf_arq_timeout +ffffffff818ec010 t iavf_init_admin_queue +ffffffff818ec1c0 t iavf_get_version +ffffffff818ec3e0 t iavf_get_vf_resources +ffffffff818ec5b0 t iavf_config_irq_map +ffffffff818ec7a0 t iavf_intr +ffffffff818ece20 t iavf_ioctl +ffffffff818ed9d0 t iavf_start +ffffffff818edd20 t iavf_watchdog +ffffffff818edd50 t iavf_media_change +ffffffff818edd80 t iavf_media_status +ffffffff818ede10 t iavf_arq_unfill +ffffffff818edf10 t iavf_down +ffffffff818ee470 t iavf_up +ffffffff818ef0e0 t iavf_queue_select +ffffffff818ef2e0 t iavf_rxfill +ffffffff818ef4e0 t iavf_rxrefill +ffffffff818ef500 t iavf_process_arq +ffffffff818f0000 T rge_match +ffffffff818f0030 T rge_attach +ffffffff818f0520 T rge_activate +ffffffff818f0660 T rge_intr +ffffffff818f0950 T rge_config_imtype +ffffffff818f09c0 T rge_exit_oob +ffffffff818f11e0 T rge_hw_init +ffffffff818f15d0 T rge_get_macaddr +ffffffff818f1650 T rge_set_phy_power +ffffffff818f18b0 T rge_phy_config +ffffffff818f21f0 T rge_allocmem +ffffffff818f2600 T rge_ioctl +ffffffff818f27b0 T rge_start +ffffffff818f2980 T rge_watchdog +ffffffff818f29c0 T rge_wol +ffffffff818f2bf0 T rge_tick +ffffffff818f2c70 T rge_txstart +ffffffff818f2ca0 T rge_ifmedia_upd +ffffffff818f3260 T rge_ifmedia_sts +ffffffff818f3350 T rge_add_media_types +ffffffff818f3400 T rge_kstat_attach +ffffffff818f36e0 T rge_wol_power +ffffffff818f37c0 T rge_rxeof +ffffffff818f3bc0 T rge_txeof +ffffffff818f3dc0 T rge_init +ffffffff818f4f80 T rge_setup_intr +ffffffff818f50f0 T rge_encap +ffffffff818f5390 T rge_stop +ffffffff818f55f0 T rge_iff +ffffffff818f5770 T rge_set_macaddr +ffffffff818f5840 T rge_rx_list_init +ffffffff818f5900 T rge_tx_list_init +ffffffff818f59c0 T rge_read_csi +ffffffff818f5c30 T rge_write_csi +ffffffff818f5eb0 T rge_write_mac_ocp +ffffffff818f5f00 T rge_read_mac_ocp +ffffffff818f5f80 T rge_reset +ffffffff818f6140 T rge_write_phy_ocp +ffffffff818f6200 T rge_read_phy_ocp +ffffffff818f62b0 T rge_read_phy +ffffffff818f6380 T rge_write_phy +ffffffff818f6460 T rge_get_link_status +ffffffff818f64c0 T rge_newbuf +ffffffff818f6640 T rge_discard_rxbuf +ffffffff818f66b0 T rge_fill_rx_ring +ffffffff818f6730 T rge_phy_config_mac_cfg2 +ffffffff818f8140 T rge_phy_config_mac_cfg3 +ffffffff818f9df0 T rge_phy_config_mac_cfg4 +ffffffff818fde60 T rge_phy_config_mac_cfg5 +ffffffff818fe950 T rge_patch_phy_mcu +ffffffff818febd0 T rge_write_ephy +ffffffff818fee30 T rge_phy_config_mcu +ffffffff818ff8f0 T rge_read_ephy +ffffffff818ffb70 T rge_disable_phy_ocp_pwrsave +ffffffff818ffd40 T rge_disable_hw_im +ffffffff818ffd70 T rge_disable_sim_im +ffffffff818ffdd0 T rge_setup_sim_im +ffffffff818ffe50 T rge_link_state +ffffffff818ffed0 t rge_kstat_read +ffffffff81900070 t rge_kstat_copy +ffffffff81901000 T igc_match +ffffffff81901030 T igc_attach +ffffffff819014a0 T igc_detach +ffffffff819016a0 T igc_identify_hardware +ffffffff81901710 T igc_allocate_pci_resources +ffffffff81901830 T igc_allocate_queues +ffffffff81901d20 T igc_is_valid_ether_addr +ffffffff81901d80 T igc_allocate_msix +ffffffff81901fe0 T igc_setup_interface +ffffffff81902220 T igc_reset +ffffffff81902360 T igc_update_link_status +ffffffff81902470 T igc_get_hw_control +ffffffff819024d0 T igc_release_hw_control +ffffffff81902530 T igc_free_pci_resources +ffffffff81902610 T igc_stop +ffffffff81902920 T igc_free_transmit_structures +ffffffff819029a0 T igc_free_receive_structures +ffffffff81902a60 T igc_setup_msix +ffffffff81902af0 T igc_dma_malloc +ffffffff81902c60 T igc_rxrefill +ffffffff81902d30 T igc_dma_free +ffffffff81902de0 T igc_init_dmac +ffffffff81903080 T igc_intr_queue +ffffffff81903190 T igc_intr_link +ffffffff81903310 T igc_ioctl +ffffffff819035f0 T igc_start +ffffffff81903a20 T igc_watchdog +ffffffff81903a50 T igc_media_change +ffffffff81903b60 T igc_media_status +ffffffff81903d10 T igc_init +ffffffff81904200 T igc_setup_transmit_structures +ffffffff819042c0 T igc_initialize_transmit_unit +ffffffff819044e0 T igc_setup_receive_structures +ffffffff81904660 T igc_initialize_receive_unit +ffffffff81904a30 T igc_iff +ffffffff81904b80 T igc_configure_queues +ffffffff81904d90 T igc_rxfill +ffffffff81904ec0 T igc_enable_intr +ffffffff81904f90 T igc_tx_ctx_setup +ffffffff819050a0 T igc_txeof +ffffffff81905260 T igc_disable_intr +ffffffff81905300 T igc_rxrinfo +ffffffff81905450 T igc_get_buf +ffffffff81905590 T igc_rxeof +ffffffff81905930 T igc_rx_checksum +ffffffff81905980 T igc_set_queues +ffffffff81905a60 T igc_enable_queue +ffffffff81905a90 T igc_allocate_transmit_buffers +ffffffff81905bf0 T igc_setup_transmit_ring +ffffffff81905d70 T igc_free_transmit_buffers +ffffffff81905e90 T igc_allocate_receive_buffers +ffffffff81905fc0 T igc_setup_receive_ring +ffffffff81906080 T igc_initialize_rss_mapping +ffffffff819062a0 T igc_free_receive_buffers +ffffffff81907000 T igc_init_mac_params +ffffffff81907040 T igc_init_nvm_params +ffffffff81907080 T igc_init_phy_params +ffffffff819070c0 T igc_set_mac_type +ffffffff81907170 T igc_setup_init_funcs +ffffffff819072d0 T igc_update_mc_addr_list +ffffffff81907310 T igc_check_for_link +ffffffff81907350 T igc_reset_hw +ffffffff81907390 T igc_init_hw +ffffffff819073d0 T igc_get_speed_and_duplex +ffffffff81907410 T igc_rar_set +ffffffff81907450 T igc_check_reset_block +ffffffff81907490 T igc_get_phy_info +ffffffff819074d0 T igc_phy_hw_reset +ffffffff81907510 T igc_read_mac_addr +ffffffff81907540 T igc_validate_nvm_checksum +ffffffff81908000 T igc_acquire_phy_base +ffffffff81908030 T igc_release_phy_base +ffffffff81908060 T igc_init_hw_base +ffffffff81908160 T igc_power_down_phy_copper_base +ffffffff81909000 T igc_init_nvm_params_i225 +ffffffff81909180 T igc_acquire_nvm_i225 +ffffffff81909250 T igc_release_nvm_i225 +ffffffff819092c0 T igc_get_flash_presence_i225 +ffffffff81909310 T igc_read_nvm_srrd_i225 +ffffffff819093f0 T igc_write_nvm_srwr_i225 +ffffffff819095c0 T igc_validate_nvm_checksum_i225 +ffffffff81909650 T igc_update_nvm_checksum_i225 +ffffffff819097f0 T igc_init_mac_params_i225 +ffffffff819098b0 T igc_reset_hw_i225 +ffffffff819099d0 T igc_init_hw_i225 +ffffffff819099e0 T igc_check_for_link_i225 +ffffffff81909aa0 T igc_acquire_swfw_sync_i225 +ffffffff81909b80 T igc_release_swfw_sync_i225 +ffffffff81909c00 T igc_setup_copper_link_i225 +ffffffff81909c90 T igc_init_phy_params_i225 +ffffffff81909d70 T igc_get_hw_semaphore_i225 +ffffffff81909f20 T __igc_write_nvm_srwr +ffffffff8190a050 T igc_update_flash_i225 +ffffffff8190a420 T igc_set_flsw_flash_burst_counter_i225 +ffffffff8190a480 T igc_write_erase_flash_command_i225 +ffffffff8190a580 T igc_pool_flash_update_done_i225 +ffffffff8190a610 T igc_set_ltr_i225 +ffffffff8190a880 T igc_init_function_pointers_i225 +ffffffff8190a8f0 T igc_set_eee_i225 +ffffffff8190b000 T igc_init_mac_ops_generic +ffffffff8190b050 T igc_null_ops_generic +ffffffff8190b080 T igc_config_collision_dist_generic +ffffffff8190b0f0 T igc_rar_set_generic +ffffffff8190b1d0 T igc_write_vfta_generic +ffffffff8190b220 T igc_init_rx_addrs_generic +ffffffff8190b2c0 T igc_check_alt_mac_addr_generic +ffffffff8190b440 T igc_hash_mc_addr_generic +ffffffff8190b4e0 T igc_update_mc_addr_list_generic +ffffffff8190b650 T igc_clear_hw_cntrs_base_generic +ffffffff8190ba40 T igc_setup_link_generic +ffffffff8190bbd0 T igc_set_fc_watermarks_generic +ffffffff8190bc80 T igc_force_mac_fc_generic +ffffffff8190bd40 T igc_config_fc_after_link_up_generic +ffffffff8190bf60 T igc_get_speed_and_duplex_copper_generic +ffffffff8190c000 T igc_put_hw_semaphore_generic +ffffffff8190c050 T igc_get_auto_rd_done_generic +ffffffff8190c2a0 T igc_disable_pcie_master_generic +ffffffff8190d000 T igc_init_nvm_ops_generic +ffffffff8190d080 T igc_null_read_nvm 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ngbe_check_mng_access +ffffffff81919940 T ngbe_mng_present +ffffffff81919990 T ngbe_check_reset_blocked +ffffffff81919a10 T ngbe_set_ivar +ffffffff81919b00 T ngbe_pbthresh_setup +ffffffff81919bc0 T ngbe_disable_queue +ffffffff81919c20 T ngbe_host_interface_command +ffffffff81919ff0 T ngbe_tx_ctx_setup +ffffffff8191a080 T ngbe_read_pci_cfg_word +ffffffff8191a0e0 T ngbe_set_pci_config_data +ffffffff8191a170 T ngbe_get_copper_link_capabilities +ffffffff8191a1c0 T ngbe_get_eeprom_semaphore +ffffffff8191a320 T ngbe_release_eeprom_semaphore +ffffffff8191a3d0 T ngbe_gphy_dis_eee +ffffffff8191a4f0 T ngbe_gphy_efuse_calibration +ffffffff8191a8b0 T ngbe_hpbthresh +ffffffff8191a940 T ngbe_lpbthresh +ffffffff8191a980 T ngbe_mta_vector +ffffffff8191a9d0 T ngbe_setup_copper_link +ffffffff8191aa20 T ngbe_reset_misc +ffffffff8191ad80 T ngbe_set_mta +ffffffff8191adf0 T ngbe_rx_checksum +ffffffff8191b000 T com_pci_match +ffffffff8191b030 T com_pci_attach +ffffffff8191b300 T com_pci_detach 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drm_atomic_get_old_connector_for_encoder +ffffffff81922fb0 T drm_atomic_get_new_connector_for_encoder +ffffffff81923020 T drm_atomic_get_connector_state +ffffffff81923250 T drm_atomic_get_bridge_state +ffffffff81923260 T drm_atomic_get_old_bridge_state +ffffffff819232c0 T drm_atomic_get_new_bridge_state +ffffffff81923320 T drm_atomic_add_encoder_bridges +ffffffff819233e0 T drm_atomic_add_affected_connectors +ffffffff81923510 T drm_atomic_add_affected_planes +ffffffff81923630 T drm_atomic_check_only +ffffffff819240e0 T drm_atomic_commit +ffffffff819241b0 T drm_atomic_print_new_state +ffffffff819243b0 T drm_atomic_nonblocking_commit +ffffffff81924450 T __drm_atomic_helper_disable_plane +ffffffff819244d0 T __drm_atomic_helper_set_config +ffffffff81924850 t drm_atomic_plane_print_state +ffffffff81924a70 t drm_atomic_crtc_print_state +ffffffff81924cd0 t drm_atomic_connector_print_state +ffffffff81924de0 T drm_state_dump +ffffffff81925000 T drm_atomic_helper_check_modeset +ffffffff81925f30 t handle_conflicting_encoders +ffffffff81926220 T drm_atomic_helper_check_wb_encoder_state +ffffffff81926280 T drm_atomic_helper_check_plane_state +ffffffff81926630 T drm_atomic_helper_check_crtc_state +ffffffff819266e0 T drm_atomic_helper_check_planes +ffffffff81926990 T drm_atomic_helper_check +ffffffff81926a40 T drm_atomic_helper_async_check +ffffffff81926d60 T drm_atomic_helper_update_legacy_modeset_state +ffffffff81926fd0 T drm_atomic_helper_calc_timestamping_constants +ffffffff81927070 T drm_atomic_helper_commit_modeset_disables +ffffffff81927670 T drm_atomic_helper_commit_modeset_enables +ffffffff81927960 T drm_atomic_helper_wait_for_fences +ffffffff81927a60 T drm_atomic_helper_wait_for_vblanks +ffffffff81927d70 T drm_atomic_helper_wait_for_flip_done +ffffffff81927f30 T drm_atomic_helper_commit_tail +ffffffff819280c0 T drm_atomic_helper_commit_planes +ffffffff81928380 T drm_atomic_helper_fake_vblank +ffffffff81928460 T drm_atomic_helper_commit_hw_done +ffffffff81928620 T drm_atomic_helper_cleanup_planes +ffffffff819286d0 T drm_atomic_helper_commit_tail_rpm +ffffffff81928860 T drm_atomic_helper_async_commit +ffffffff81928af0 T drm_atomic_helper_commit +ffffffff81928db0 T drm_atomic_helper_prepare_planes +ffffffff81928f60 T drm_atomic_helper_setup_commit +ffffffff819297f0 t commit_work +ffffffff81929810 T drm_atomic_helper_swap_state +ffffffff81929e80 t commit_tail +ffffffff8192a160 t release_crtc_commit +ffffffff8192a1a0 T drm_atomic_helper_wait_for_dependencies +ffffffff8192a3a0 T drm_atomic_helper_commit_cleanup_done +ffffffff8192a610 T drm_atomic_helper_commit_planes_on_crtc +ffffffff8192a840 T drm_atomic_helper_disable_planes_on_crtc +ffffffff8192a9a0 T drm_atomic_helper_update_plane +ffffffff8192aad0 T drm_atomic_helper_disable_plane +ffffffff8192ab90 T drm_atomic_helper_set_config +ffffffff8192ac40 T drm_atomic_helper_disable_all +ffffffff8192adf0 T drm_atomic_helper_shutdown +ffffffff8192af40 T drm_atomic_helper_duplicate_state +ffffffff8192b0b0 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drm_atomic_helper_bridge_reset +ffffffff8192d000 T drm_atomic_set_mode_for_crtc +ffffffff8192d200 T drm_atomic_set_mode_prop_for_crtc +ffffffff8192d490 T drm_atomic_set_crtc_for_plane +ffffffff8192d600 T drm_atomic_set_fb_for_plane +ffffffff8192d6e0 T drm_atomic_set_crtc_for_connector +ffffffff8192d840 T drm_atomic_get_property +ffffffff8192df80 T drm_atomic_connector_commit_dpms +ffffffff8192e0e0 T drm_atomic_set_property +ffffffff8192eb90 T drm_mode_atomic_ioctl +ffffffff81930000 T drm_is_current_master +ffffffff81930060 T drm_getmagic +ffffffff81930130 T drm_authmagic +ffffffff819301f0 T drm_master_create +ffffffff81930290 T drm_setmaster_ioctl +ffffffff81930350 t drm_new_set_master +ffffffff819304e0 T drm_dropmaster_ioctl +ffffffff81930630 T drm_master_open +ffffffff819306e0 T drm_master_get +ffffffff81930710 T drm_master_release +ffffffff81930860 T drm_master_put +ffffffff819308f0 T drm_file_get_master +ffffffff81930950 T drm_master_internal_acquire +ffffffff819309c0 T drm_master_internal_release +ffffffff81931000 T drm_plane_create_alpha_property +ffffffff819310a0 T drm_plane_create_rotation_property +ffffffff819311e0 T drm_rotation_simplify +ffffffff81931260 T drm_plane_create_zpos_property +ffffffff81931320 T drm_plane_create_zpos_immutable_property +ffffffff819313d0 T drm_atomic_normalize_zpos +ffffffff819316d0 T drm_plane_create_blend_mode_property +ffffffff81931870 t drm_atomic_state_zpos_cmp +ffffffff81932000 T drm_bridge_add +ffffffff81932070 T devm_drm_bridge_add +ffffffff81932110 T drm_bridge_remove +ffffffff81932170 T drm_bridge_attach +ffffffff819322f0 T drm_bridge_detach +ffffffff819323e0 T drm_bridge_chain_mode_fixup +ffffffff81932480 T drm_bridge_chain_mode_valid +ffffffff81932520 T drm_bridge_chain_disable +ffffffff819325b0 T drm_bridge_chain_post_disable +ffffffff81932630 T drm_bridge_chain_mode_set +ffffffff819326c0 T drm_bridge_chain_pre_enable +ffffffff81932750 T drm_bridge_chain_enable +ffffffff819327d0 T drm_atomic_bridge_chain_disable +ffffffff819328d0 T drm_atomic_bridge_chain_post_disable +ffffffff819329e0 T drm_atomic_bridge_chain_pre_enable +ffffffff81932ae0 T drm_atomic_bridge_chain_enable +ffffffff81932bf0 T drm_atomic_bridge_chain_check +ffffffff81932f50 T drm_bridge_detect +ffffffff81932fb0 T drm_bridge_get_modes +ffffffff81933010 T drm_bridge_get_edid +ffffffff81933070 T drm_bridge_hpd_enable +ffffffff81933140 T drm_bridge_hpd_disable +ffffffff819331e0 T drm_bridge_hpd_notify +ffffffff81933240 t drm_bridge_atomic_duplicate_priv_state +ffffffff81933260 t drm_bridge_atomic_destroy_priv_state +ffffffff81933280 t select_bus_fmt_recursive +ffffffff81934000 T drm_buddy_init +ffffffff81934460 T drm_buddy_fini +ffffffff81934560 T drm_get_buddy +ffffffff819345a0 T drm_buddy_free_block +ffffffff81934740 T drm_buddy_free_list +ffffffff819347d0 T drm_buddy_block_trim +ffffffff81934a20 t __alloc_range +ffffffff81934df0 T drm_buddy_alloc_blocks +ffffffff81935690 T drm_buddy_block_print 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drm_client_modeset_probe +ffffffff81939a30 t drm_client_pick_crtcs +ffffffff81939d20 T drm_client_rotation +ffffffff81939ec0 T drm_client_modeset_check +ffffffff81939f60 t drm_client_modeset_commit_atomic +ffffffff8193a160 T drm_client_modeset_commit_locked +ffffffff8193a300 T drm_client_modeset_commit +ffffffff8193a370 T drm_client_modeset_dpms +ffffffff8193a5c0 t drm_connector_pick_cmdline_mode +ffffffff8193b000 T drm_color_ctm_s31_32_to_qm_n +ffffffff8193b0e0 T drm_crtc_enable_color_mgmt +ffffffff8193b1c0 T drm_mode_crtc_set_gamma_size +ffffffff8193b2e0 T drm_mode_gamma_set_ioctl +ffffffff8193b7d0 T drm_mode_gamma_get_ioctl +ffffffff8193b910 T drm_get_color_encoding_name +ffffffff8193b980 T drm_get_color_range_name +ffffffff8193b9f0 T drm_plane_create_color_properties +ffffffff8193bc50 T drm_color_lut_check +ffffffff8193c000 T drm_connector_ida_init +ffffffff8193c110 T drm_connector_ida_destroy +ffffffff8193c220 T drm_get_connector_type_name +ffffffff8193c260 T drm_connector_free_work_fn +ffffffff8193c320 T drm_connector_init +ffffffff8193c3a0 t __drm_connector_init +ffffffff8193c8b0 T drm_connector_init_with_ddc +ffffffff8193c940 T drmm_connector_init +ffffffff8193ca00 t drm_connector_cleanup_action +ffffffff8193ca20 T drm_connector_attach_edid_property +ffffffff8193ca40 T drm_connector_attach_encoder +ffffffff8193cac0 T drm_connector_has_possible_encoder +ffffffff8193cb00 T drm_connector_cleanup +ffffffff8193ce30 T drm_connector_unregister +ffffffff8193ced0 T drm_mode_put_tile_group +ffffffff8193cf60 T drm_connector_register +ffffffff8193d050 T drm_connector_unregister_all +ffffffff8193d1f0 T drm_connector_list_iter_begin +ffffffff8193d230 T drm_connector_list_iter_next +ffffffff8193d340 T drm_connector_list_iter_end +ffffffff8193d410 T drm_connector_register_all +ffffffff8193d5a0 T drm_get_connector_status_name +ffffffff8193d5f0 T drm_get_connector_force_name +ffffffff8193d630 T drm_get_subpixel_order_name +ffffffff8193d670 T drm_get_dpms_name +ffffffff8193d6b0 T drm_display_info_set_bus_formats +ffffffff8193d780 T drm_get_dvi_i_select_name +ffffffff8193d7e0 T drm_get_dvi_i_subconnector_name +ffffffff8193d840 T drm_get_tv_select_name +ffffffff8193d8a0 T drm_get_tv_subconnector_name +ffffffff8193d900 T drm_get_dp_subconnector_name +ffffffff8193d990 T drm_connector_create_standard_properties +ffffffff8193db10 T drm_mode_create_dvi_i_properties +ffffffff8193dbb0 T drm_connector_attach_dp_subconnector_property +ffffffff8193dc20 T drm_connector_attach_content_type_property +ffffffff8193dcc0 T drm_mode_create_content_type_property +ffffffff8193dd40 T drm_connector_attach_tv_margin_properties +ffffffff8193ddb0 T drm_mode_create_tv_margin_properties +ffffffff8193ded0 T drm_mode_create_tv_properties +ffffffff8193e130 T drm_mode_create_scaling_mode_property +ffffffff8193e1a0 T drm_connector_attach_vrr_capable_property +ffffffff8193e230 T drm_connector_attach_scaling_mode_property +ffffffff8193e400 T drm_mode_create_aspect_ratio_property +ffffffff8193e480 T drm_mode_create_hdmi_colorspace_property +ffffffff8193e500 T drm_mode_create_dp_colorspace_property +ffffffff8193e580 T drm_mode_create_suggested_offset_properties +ffffffff8193e650 T drm_connector_set_path_property +ffffffff8193e6b0 T drm_connector_set_tile_property +ffffffff8193e800 T drm_connector_set_link_status_property +ffffffff8193e850 T drm_connector_attach_max_bpc_property +ffffffff8193e910 T drm_connector_attach_hdr_output_metadata_property +ffffffff8193e960 T drm_connector_attach_colorspace_property +ffffffff8193e9b0 T drm_connector_atomic_hdr_metadata_equal +ffffffff8193ea20 T drm_connector_set_vrr_capable_property +ffffffff8193ea70 T drm_connector_set_panel_orientation +ffffffff8193eb30 T drm_connector_set_panel_orientation_with_quirk +ffffffff8193ec10 T drm_connector_set_orientation_from_panel +ffffffff8193ed00 T drm_connector_create_privacy_screen_properties +ffffffff8193eda0 T drm_connector_attach_privacy_screen_properties +ffffffff8193ee10 T drm_connector_attach_privacy_screen_provider +ffffffff8193ef20 t drm_connector_privacy_screen_notifier +ffffffff8193efc0 T drm_connector_update_privacy_screen +ffffffff8193f030 T drm_connector_set_obj_prop +ffffffff8193f110 T drm_connector_property_set_ioctl +ffffffff8193f170 T drm_mode_getconnector +ffffffff8193f6b0 T drm_connector_find_by_fwnode +ffffffff8193f760 T drm_connector_oob_hotplug_event +ffffffff8193f850 T drm_mode_get_tile_group +ffffffff8193f920 T drm_mode_create_tile_group +ffffffff8193f9f0 t drm_connector_free +ffffffff8193fa30 t kasprintf +ffffffff81940000 T drm_crtc_from_index +ffffffff81940060 T drm_crtc_force_disable +ffffffff81940180 T drm_mode_set_config_internal +ffffffff81940200 T drm_crtc_register_all +ffffffff81940290 T drm_crtc_unregister_all +ffffffff81940300 T drm_crtc_create_fence +ffffffff81940390 T drm_crtc_init_with_planes +ffffffff81940460 t __drm_crtc_init_with_planes +ffffffff81940850 T drmm_crtc_init_with_planes +ffffffff81940950 T __drmm_crtc_alloc_with_planes +ffffffff81940ac0 T drm_crtc_cleanup +ffffffff81940be0 T drm_mode_getcrtc +ffffffff81940d80 t __drm_mode_set_config_internal +ffffffff81940f20 T drm_crtc_check_viewport +ffffffff81940fd0 T drm_mode_setcrtc +ffffffff81941730 T drm_mode_crtc_set_obj_prop +ffffffff819417b0 T drm_crtc_create_scaling_filter_property +ffffffff81941820 t drm_crtc_fence_get_driver_name +ffffffff819418a0 t drm_crtc_fence_get_timeline_name +ffffffff81941910 t kasprintf +ffffffff819419e0 t drmm_crtc_init_with_planes_cleanup +ffffffff81942000 T drm_helper_encoder_in_use +ffffffff81942180 T drm_helper_crtc_in_use +ffffffff819422b0 T drm_helper_disable_unused_functions +ffffffff81942330 t __drm_helper_disable_unused_functions +ffffffff81942430 T drm_crtc_helper_set_mode +ffffffff819428e0 T drm_connector_get_single_encoder +ffffffff819429e0 T drm_crtc_helper_set_config +ffffffff81943600 T drm_helper_connector_dpms +ffffffff819438f0 T drm_helper_resume_force_mode +ffffffff81943be0 T drm_helper_force_disable_all +ffffffff81943cb0 t drm_encoder_disable +ffffffff81944000 T drm_atomic_helper_check_plane_damage +ffffffff819440a0 T drm_atomic_helper_dirtyfb +ffffffff81944350 T drm_atomic_helper_damage_iter_init +ffffffff819444a0 T drm_atomic_helper_damage_iter_next +ffffffff81944540 T drm_atomic_helper_damage_merged +ffffffff81945000 T displayid_iter_edid_begin +ffffffff81945050 T __displayid_iter_next +ffffffff819452e0 T displayid_iter_end +ffffffff81946000 T drm_mode_create_dumb +ffffffff819460c0 T drm_mode_create_dumb_ioctl +ffffffff81946180 T drm_mode_mmap_dumb_ioctl +ffffffff819461f0 T drm_mode_destroy_dumb +ffffffff81946260 T drm_mode_destroy_dumb_ioctl +ffffffff81947000 T drm_edid_header_is_valid +ffffffff81947080 T drm_edid_are_equal +ffffffff819470f0 T drm_edid_block_valid +ffffffff81947300 t edid_block_check +ffffffff81947430 t edid_block_status_print +ffffffff81947530 T drm_edid_is_valid +ffffffff819475b0 T drm_edid_override_set +ffffffff81947620 T drm_connector_update_edid_property +ffffffff819477d0 T drm_edid_override_reset +ffffffff81947900 T drm_add_override_edid_modes +ffffffff81947ae0 T drm_add_edid_modes +ffffffff81947bd0 T drm_do_get_edid +ffffffff81947bf0 t _drm_do_get_edid +ffffffff81948100 T drm_edid_raw +ffffffff81948190 T drm_edid_alloc +ffffffff81948260 T drm_edid_dup +ffffffff81948340 T drm_edid_free +ffffffff819483a0 T drm_probe_ddc +ffffffff819484a0 t drm_do_probe_ddc_edid +ffffffff819485f0 T drm_get_edid +ffffffff81948730 T drm_edid_read_custom +ffffffff81948820 T drm_edid_read_ddc +ffffffff81948950 T drm_edid_read +ffffffff819489d0 T drm_edid_get_panel_id +ffffffff81948ab0 t edid_block_read +ffffffff81948d20 T drm_get_edid_switcheroo +ffffffff81948d70 T drm_edid_duplicate +ffffffff81948df0 T drm_mode_find_dmt +ffffffff81948f10 T drm_mode_fixup_1366x768 +ffffffff81948f70 T drm_find_edid_extension +ffffffff81949180 T drm_match_cea_mode +ffffffff819493d0 T drm_display_mode_from_cea_vic +ffffffff81949440 T drm_edid_get_monitor_name +ffffffff819494f0 t get_monitor_name +ffffffff81949850 T drm_edid_to_sad +ffffffff81949a60 T drm_edid_to_speaker_allocation +ffffffff81949c10 T drm_av_sync_delay +ffffffff81949cc0 T drm_detect_hdmi_monitor +ffffffff81949de0 T drm_detect_monitor_audio +ffffffff81949ff0 T drm_default_rgb_quant_range +ffffffff8194a030 T drm_edid_connector_update +ffffffff8194a090 t _drm_edid_connector_update +ffffffff8194bf40 t _drm_update_tile_info +ffffffff8194c1d0 t _drm_edid_connector_property_update +ffffffff8194c380 T drm_add_modes_noedid +ffffffff8194c470 T drm_set_preferred_mode +ffffffff8194c4d0 T drm_hdmi_avi_infoframe_from_display_mode +ffffffff8194c750 T drm_hdmi_avi_infoframe_quant_range +ffffffff8194c7f0 T drm_hdmi_vendor_infoframe_from_display_mode +ffffffff8194c8b0 t connector_bad_edid +ffffffff8194ca70 t drm_for_each_detailed_block +ffffffff8194ccc0 t __cea_db_iter_next +ffffffff8194cf60 t update_display_info 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+ffffffff81953d40 t __drm_fb_helper_initial_config_and_unlock +ffffffff81954290 T drm_fb_helper_hotplug_event +ffffffff81954490 t drm_setup_crtcs_fb +ffffffff819545d0 T drm_fb_helper_lastclose +ffffffff81954680 T drm_fb_helper_output_poll_changed +ffffffff819546a0 T drm_fbdev_generic_setup +ffffffff81954850 t drm_fbdev_client_hotplug +ffffffff81954a80 t drm_fbdev_client_unregister +ffffffff81954af0 t drm_fbdev_client_restore +ffffffff81954b90 t drm_fbdev_cleanup +ffffffff81954c30 t drm_fbdev_use_shadow_fb +ffffffff81954c80 t drm_fb_helper_generic_probe +ffffffff81955000 T drm_dev_needs_global_mutex +ffffffff81955060 T drm_file_alloc +ffffffff819552d0 T drm_file_free +ffffffff81955500 T drm_lastclose +ffffffff81955570 T drm_release +ffffffff819555c0 T drm_release_noglobal +ffffffff81955610 T drm_read +ffffffff81955660 T drm_event_reserve_init_locked +ffffffff819556e0 T drm_event_reserve_init +ffffffff819557a0 T drm_event_cancel_free +ffffffff81955820 T drm_send_event_timestamp_locked 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drm_fb_xrgb8888_to_rgb888_line +ffffffff81957b70 T drm_fb_xrgb8888_to_xrgb2101010 +ffffffff81957bd0 t drm_fb_xrgb8888_to_xrgb2101010_line +ffffffff81957c50 T drm_fb_xrgb8888_to_gray8 +ffffffff81957cb0 t drm_fb_xrgb8888_to_gray8_line +ffffffff81957d30 T drm_fb_blit +ffffffff81958180 T drm_fb_xrgb8888_to_mono +ffffffff81958510 T drm_fb_build_fourcc_list +ffffffff81958840 t drm_fb_rgb888_to_xrgb8888_line +ffffffff81958910 t drm_fb_rgb565_to_xrgb8888_line +ffffffff81959000 T drm_mode_legacy_fb_format +ffffffff819590f0 T drm_driver_legacy_fb_format +ffffffff819591f0 T __drm_format_info +ffffffff81959270 T drm_format_info +ffffffff81959330 T drm_get_format_info +ffffffff81959410 T drm_format_info_block_width +ffffffff81959460 T drm_format_info_block_height +ffffffff819594b0 T drm_format_info_bpp +ffffffff81959530 T drm_format_info_min_pitch +ffffffff8195a000 T drm_framebuffer_check_src_coords +ffffffff8195a120 T drm_mode_addfb +ffffffff8195a330 T drm_mode_addfb2 +ffffffff8195a420 T drm_mode_addfb_ioctl +ffffffff8195a440 T drm_internal_framebuffer_create +ffffffff8195a960 T drm_mode_addfb2_ioctl +ffffffff8195aa50 T drm_mode_rmfb +ffffffff8195ac20 T drm_framebuffer_lookup +ffffffff8195ac70 t drm_mode_rmfb_work_fn +ffffffff8195ad30 T drm_mode_rmfb_ioctl +ffffffff8195ad50 T drm_mode_getfb +ffffffff8195aeb0 T drm_mode_getfb2_ioctl +ffffffff8195b260 T drm_mode_dirtyfb_ioctl +ffffffff8195b400 T drm_fb_release +ffffffff8195b510 T drm_framebuffer_free +ffffffff8195b550 T drm_framebuffer_init +ffffffff8195b6b0 T drm_framebuffer_unregister_private +ffffffff8195b6f0 T drm_framebuffer_cleanup +ffffffff8195b750 T drm_framebuffer_remove +ffffffff8195bc00 T drm_framebuffer_plane_width +ffffffff8195bc50 T drm_framebuffer_plane_height +ffffffff8195bca0 T drm_framebuffer_print_info +ffffffff8195c000 T drm_ref +ffffffff8195c030 T drm_unref +ffffffff8195c0b0 T drm_fault +ffffffff8195c270 T drm_flush +ffffffff8195c2a0 T udv_attach_drm +ffffffff8195c4c0 T drm_gem_init +ffffffff8195c570 t drm_gem_init_release +ffffffff8195c590 T drm_gem_object_init +ffffffff8195c6f0 T drm_gem_private_object_init +ffffffff8195c7f0 T drm_gem_handle_delete +ffffffff8195c8e0 t drm_gem_object_release_handle +ffffffff8195c970 T drm_gem_dumb_map_offset +ffffffff8195caa0 T drm_gem_object_lookup +ffffffff8195cb20 T drm_gem_create_mmap_offset +ffffffff8195cb50 T drm_gem_dumb_destroy +ffffffff8195cb70 T drm_gem_handle_create_tail +ffffffff8195cce0 t drm_gem_object_handle_put_unlocked +ffffffff8195ce30 T drm_gem_handle_create +ffffffff8195ce80 T drm_gem_free_mmap_offset +ffffffff8195ceb0 T drm_gem_create_mmap_offset_size +ffffffff8195cee0 T drm_gem_get_pages +ffffffff8195cf30 T drm_gem_put_pages +ffffffff8195cf60 T drm_gem_objects_lookup +ffffffff8195d0d0 T drm_gem_dma_resv_wait +ffffffff8195d210 T drm_gem_close_ioctl +ffffffff8195d260 T drm_gem_flink_ioctl +ffffffff8195d3d0 T drm_gem_open_ioctl +ffffffff8195d500 T drm_gem_open +ffffffff8195d530 T drm_gem_release +ffffffff8195d570 T drm_gem_object_release +ffffffff8195d6c0 T drm_gem_lru_remove +ffffffff8195d7a0 T drm_gem_object_free +ffffffff8195d7f0 T drm_gem_mmap_obj +ffffffff8195d900 T drm_gem_mmap +ffffffff8195db80 T drm_gem_print_info +ffffffff8195dca0 T drm_gem_pin +ffffffff8195dce0 T drm_gem_unpin +ffffffff8195dd20 T drm_gem_vmap +ffffffff8195dd80 T drm_gem_vunmap +ffffffff8195ddf0 T drm_gem_lock_reservations +ffffffff8195e060 T drm_gem_unlock_reservations +ffffffff8195e160 T drm_gem_lru_init +ffffffff8195e1a0 T drm_gem_lru_move_tail +ffffffff8195e290 T drm_gem_lru_scan +ffffffff8195e680 t __ww_mutex_lock +ffffffff8195f000 T drm_gem_plane_helper_prepare_fb +ffffffff81960000 T drm_gem_fb_destroy +ffffffff819600c0 T drm_gem_fb_create_handle +ffffffff81961000 T drm_ht_create +ffffffff81961080 T drm_ht_verbose_list +ffffffff81961140 T drm_ht_insert_item +ffffffff81961190 T drm_ht_just_insert_please +ffffffff81961260 T drm_ht_find_item +ffffffff819612b0 T drm_ht_remove_key +ffffffff81961300 T drm_ht_remove_item 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idr_tree_SPLAY_MINMAX +ffffffff81965c50 T ida_init +ffffffff81965c80 T ida_destroy +ffffffff81965c90 T ida_simple_get +ffffffff81965cb0 T ida_simple_remove +ffffffff81965cd0 T ida_alloc_min +ffffffff81965cf0 T ida_alloc_max +ffffffff81965d10 T ida_free +ffffffff81965d30 T xarray_cmp +ffffffff81965d70 T xarray_tree_SPLAY_INSERT +ffffffff81965e10 T xarray_tree_SPLAY +ffffffff81965f40 T xarray_tree_SPLAY_REMOVE +ffffffff81965fc0 T xarray_tree_SPLAY_MINMAX +ffffffff819660b0 T xa_init_flags +ffffffff81966130 T xa_destroy +ffffffff81966270 T __xa_alloc +ffffffff819663f0 T __xa_alloc_cyclic +ffffffff81966450 T __xa_erase +ffffffff81966510 T __xa_load +ffffffff81966580 T __xa_store +ffffffff81966700 T xa_get_next +ffffffff81966820 T sg_alloc_table +ffffffff819668a0 T sg_free_table +ffffffff81966900 T sg_copy_from_buffer +ffffffff81966930 T i2c_master_xfer +ffffffff81966a60 T __i2c_transfer +ffffffff81966b10 T i2c_transfer +ffffffff81966be0 T i2c_bb_master_xfer +ffffffff81966c80 T i2c_bb_functionality +ffffffff81966cb0 T i2c_bit_add_bus +ffffffff81966cf0 T vga_disable_bridge +ffffffff81966da0 T vga_get_uninterruptible +ffffffff81966df0 T vga_put +ffffffff81966e70 T acpi_get_table +ffffffff81966f40 T acpi_put_table +ffffffff81966f70 T acpi_get_handle +ffffffff81966fc0 T acpi_get_name +ffffffff81967060 T acpi_evaluate_object +ffffffff819672c0 T drm_linux_acpi_notify +ffffffff81967340 T register_acpi_notifier +ffffffff81967380 T unregister_acpi_notifier +ffffffff81967410 T acpi_format_exception +ffffffff81967460 T backlight_do_update_status +ffffffff81967480 T backlight_device_register +ffffffff81967510 T backlight_device_unregister +ffffffff81967530 T devm_backlight_device_register +ffffffff81967580 T backlight_schedule_update_status +ffffffff819675a0 T backlight_enable +ffffffff819675e0 T backlight_disable +ffffffff81967620 T drm_sysfs_hotplug_event +ffffffff81967640 T drm_sysfs_connector_hotplug_event +ffffffff81967660 T drm_sysfs_connector_status_event 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T dma_fence_array_create +ffffffff81968cc0 t irq_dma_fence_array_work +ffffffff81968d50 T dma_fence_array_first +ffffffff81968db0 T dma_fence_array_next +ffffffff81968e10 t dma_fence_array_get_driver_name +ffffffff81968e40 t dma_fence_array_get_timeline_name +ffffffff81968e70 t dma_fence_array_enable_signaling +ffffffff81968f70 t dma_fence_array_signaled +ffffffff81968fc0 t dma_fence_array_release +ffffffff81969080 T dma_fence_chain_find_seqno +ffffffff819691a0 T dma_fence_chain_walk +ffffffff819693e0 T dma_fence_chain_init +ffffffff819694f0 t dma_fence_chain_get_driver_name +ffffffff81969520 t dma_fence_chain_get_timeline_name +ffffffff81969550 t dma_fence_chain_enable_signaling +ffffffff81969700 t dma_fence_chain_signaled +ffffffff819697f0 t dma_fence_chain_release +ffffffff81969930 T dma_fence_is_container +ffffffff81969980 T dmabuf_read +ffffffff819699b0 T dmabuf_write +ffffffff819699e0 T dmabuf_ioctl +ffffffff81969a10 T dmabuf_kqfilter +ffffffff81969a40 T dmabuf_stat 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interval_tree_iter_first +ffffffff8196ac00 T interval_tree_remove +ffffffff8196ac20 T interval_tree_insert +ffffffff8196ac90 T syncfile_read +ffffffff8196acc0 T syncfile_write +ffffffff8196acf0 T syncfile_ioctl +ffffffff8196ad20 T syncfile_kqfilter +ffffffff8196ad50 T syncfile_stat +ffffffff8196ae00 T syncfile_close +ffffffff8196aea0 T syncfile_seek +ffffffff8196af20 T fd_install +ffffffff8196aff0 T fput +ffffffff8196b050 T get_unused_fd_flags +ffffffff8196b160 T put_unused_fd +ffffffff8196b1f0 T sync_file_get_fence +ffffffff8196b2a0 T sync_file_create +ffffffff8196b340 T drm_firmware_drivers_only +ffffffff8196b370 t dma_fence_stub_get_name +ffffffff8196b3a0 t dma_fence_array_cb_func +ffffffff8196b420 t dma_fence_chain_cb +ffffffff8196b4e0 t dma_fence_chain_timo +ffffffff8196c000 T drmm_kzalloc +ffffffff8196c100 T drmm_kcalloc +ffffffff8196c210 T drmm_kstrdup +ffffffff8196c350 T drmm_kfree +ffffffff8196c450 T drmm_add_action +ffffffff8196c510 T drmm_add_action_or_reset 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mipi_dsi_dcs_enter_sleep_mode +ffffffff8196dde0 T mipi_dsi_dcs_exit_sleep_mode +ffffffff8196de90 T mipi_dsi_dcs_set_display_off +ffffffff8196df40 T mipi_dsi_dcs_set_display_on +ffffffff8196dff0 T mipi_dsi_dcs_set_column_address +ffffffff8196e0b0 T mipi_dsi_dcs_set_page_address +ffffffff8196e170 T mipi_dsi_dcs_set_tear_off +ffffffff8196e220 T mipi_dsi_dcs_set_tear_on +ffffffff8196e2d0 T mipi_dsi_dcs_set_pixel_format +ffffffff8196f000 T __drm_mm_interval_first +ffffffff8196f0c0 T drm_mm_reserve_node +ffffffff8196f370 t add_hole +ffffffff8196f4d0 T drm_mm_insert_node_in_range +ffffffff8196fac0 T drm_mm_remove_node +ffffffff8196fbf0 T drm_mm_replace_node +ffffffff8196fdd0 T drm_mm_scan_init_with_range +ffffffff8196fe50 T drm_mm_scan_add_block +ffffffff8196ffc0 T drm_mm_scan_remove_block +ffffffff81970040 T drm_mm_scan_color_evict +ffffffff81970120 T drm_mm_init +ffffffff819701d0 T drm_mm_takedown +ffffffff81970210 T drm_mm_print +ffffffff81971000 T drm_modeset_register_all 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drm_mode_object_get_properties +ffffffff81973ae0 T drm_mode_obj_get_properties_ioctl +ffffffff81973d30 T drm_mode_obj_find_prop_id +ffffffff81973d90 T drm_mode_obj_set_property_ioctl +ffffffff81975000 T drm_mode_debug_printmodeline +ffffffff81975140 T drm_mode_vrefresh +ffffffff819751e0 T drm_mode_create +ffffffff81975200 T drm_mode_destroy +ffffffff81975240 T drm_mode_probed_add +ffffffff819752e0 T drm_cvt_mode +ffffffff81975790 T drm_mode_set_name +ffffffff819757e0 T drm_gtf_mode_complex +ffffffff81975ae0 T drm_gtf_mode +ffffffff81975b30 T drm_mode_get_hv_timing +ffffffff81975b80 T drm_mode_init +ffffffff81975c50 T drm_mode_set_crtcinfo +ffffffff81975e00 T drm_mode_copy +ffffffff81975e60 T drm_mode_duplicate +ffffffff81975ee0 T drm_mode_match +ffffffff81976080 T drm_mode_equal +ffffffff819760a0 T drm_mode_equal_no_clocks +ffffffff819760c0 T drm_mode_equal_no_clocks_no_stereo +ffffffff81976180 T drm_mode_validate_driver +ffffffff81976270 T drm_mode_validate_size +ffffffff819762c0 T drm_mode_validate_ycbcr420 +ffffffff81976330 T drm_mode_is_420_only +ffffffff81976380 T drm_get_mode_status_name +ffffffff81976400 T drm_mode_prune_invalid +ffffffff819766a0 T drm_mode_sort +ffffffff819766d0 t drm_mode_compare +ffffffff81976860 T drm_connector_list_update +ffffffff81976a30 T drm_mode_parse_command_line_for_connector +ffffffff81976a60 T drm_mode_create_from_cmdline_mode +ffffffff81976b50 T drm_mode_convert_to_umode +ffffffff81976ce0 T drm_mode_convert_umode +ffffffff81976f00 T drm_mode_is_420_also +ffffffff81976f50 T drm_mode_is_420 +ffffffff81977000 T drm_helper_move_panel_connectors_to_head +ffffffff819770f0 T drm_helper_mode_fill_fb_struct +ffffffff819771b0 T drm_crtc_init +ffffffff81977280 T drm_mode_config_helper_suspend +ffffffff81977310 T drm_mode_config_helper_resume +ffffffff81978000 T drm_modeset_lock_all +ffffffff819781e0 T drm_modeset_acquire_init +ffffffff81978270 T drm_modeset_lock_all_ctx +ffffffff819783e0 T drm_modeset_backoff +ffffffff819784b0 T drm_modeset_acquire_fini +ffffffff819784e0 T drm_warn_on_modeset_not_all_locked +ffffffff81978630 T drm_modeset_unlock_all +ffffffff81978710 T drm_modeset_drop_locks +ffffffff819787a0 T drm_modeset_unlock +ffffffff81978870 t modeset_lock +ffffffff81978b00 T drm_modeset_lock_init +ffffffff81978b60 T drm_modeset_lock +ffffffff81978bc0 T drm_modeset_lock_single_interruptible +ffffffff81978be0 t __ww_mutex_lock +ffffffff81979000 T drm_mtrr_add +ffffffff81979070 T drm_mtrr_del +ffffffff8197a000 T drm_panel_init +ffffffff8197a040 T drm_panel_add +ffffffff8197a090 T drm_panel_remove +ffffffff8197a0f0 T drm_panel_prepare +ffffffff8197a140 T drm_panel_unprepare +ffffffff8197a190 T drm_panel_enable +ffffffff8197a230 T drm_panel_disable +ffffffff8197a2c0 T drm_panel_get_modes +ffffffff8197a310 T drm_panel_of_backlight +ffffffff8197b000 T drm_get_panel_orientation_quirk +ffffffff8197c000 T drm_pci_set_busid +ffffffff8197c090 t kasprintf +ffffffff8197d000 T drm_universal_plane_init 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drm_prime_handle_to_fd_ioctl +ffffffff81981890 T drm_gem_map_attach +ffffffff819818b0 T drm_gem_map_detach +ffffffff819818d0 T drm_gem_dmabuf_vmap +ffffffff819818f0 T drm_gem_dmabuf_vunmap +ffffffff81981910 T drm_gem_prime_mmap +ffffffff81981960 T drm_prime_pages_to_sg +ffffffff819819b0 T drm_prime_get_contiguous_size +ffffffff81981a00 T drm_gem_prime_export +ffffffff81981a90 T drm_gem_prime_import_dev +ffffffff81981af0 T drm_prime_sg_to_page_array +ffffffff81981b40 T drm_prime_sg_to_dma_addr_array +ffffffff81981b90 T drm_prime_gem_destroy +ffffffff81982000 T __drm_puts_coredump +ffffffff819820f0 T __drm_printfn_coredump +ffffffff81982210 T __drm_puts_seq_file +ffffffff81982240 T __drm_printfn_seq_file +ffffffff81982270 T __drm_printfn_info +ffffffff819822a0 T __drm_printfn_debug +ffffffff819822d0 T __drm_printfn_err +ffffffff81982310 T drm_puts +ffffffff81982340 T drm_printf +ffffffff819823c0 T drm_print_bits +ffffffff819825e0 T drm_dev_printk +ffffffff81982680 T __drm_dev_dbg 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drm_connector_helper_get_modes_from_ddc +ffffffff819846e0 T drm_connector_helper_get_modes_fixed +ffffffff81984850 T drm_connector_helper_get_modes +ffffffff819848b0 t __delayed_work_tick +ffffffff81985000 T drm_property_create +ffffffff81985200 T drm_property_create_enum +ffffffff819852b0 T drm_property_add_enum +ffffffff819854d0 T drm_property_destroy +ffffffff81985580 T drm_property_create_bitmask +ffffffff819856b0 T drm_property_create_range +ffffffff81985720 T drm_property_create_signed_range +ffffffff81985790 T drm_property_create_object +ffffffff81985830 T drm_property_create_bool +ffffffff81985890 T drm_mode_getproperty_ioctl +ffffffff81985aa0 T drm_property_create_blob +ffffffff81985be0 t drm_property_free_blob +ffffffff81985c60 T drm_property_blob_put +ffffffff81985ca0 T drm_property_destroy_user_blobs +ffffffff81985d20 T drm_property_blob_get +ffffffff81985d60 T drm_property_lookup_blob +ffffffff81985d80 T drm_property_replace_global_blob +ffffffff81985ed0 T drm_property_replace_blob +ffffffff81985f40 T drm_mode_getblob_ioctl +ffffffff81986000 T drm_mode_createblob_ioctl +ffffffff81986100 T drm_mode_destroyblob_ioctl +ffffffff81986210 T drm_property_change_valid_get +ffffffff81986460 T drm_property_change_valid_put +ffffffff81987000 T drm_rect_intersect +ffffffff81987080 T drm_rect_clip_scaled +ffffffff819872f0 T drm_rect_calc_hscale +ffffffff819873c0 T drm_rect_calc_vscale +ffffffff81987490 T drm_rect_debug_print +ffffffff819875b0 T drm_rect_rotate +ffffffff81987670 T drm_rect_rotate_inv +ffffffff81988000 T drm_self_refresh_helper_update_avg_times +ffffffff81988140 T drm_self_refresh_helper_alter_state +ffffffff819882d0 T drm_self_refresh_helper_init +ffffffff81988480 t drm_self_refresh_helper_entry_work +ffffffff819885e0 T drm_self_refresh_helper_cleanup +ffffffff81988660 t __delayed_work_tick +ffffffff81989000 T drm_syncobj_find +ffffffff81989070 T drm_syncobj_add_point +ffffffff81989160 t syncobj_wait_syncobj_func +ffffffff81989210 T drm_syncobj_replace_fence +ffffffff819892a0 T drm_syncobj_find_fence +ffffffff81989600 t drm_syncobj_fence_add_wait +ffffffff819896d0 T drm_syncobj_free +ffffffff81989760 T drm_syncobj_create +ffffffff81989970 T drm_syncobj_get_handle +ffffffff81989a90 T drm_syncobj_get_fd +ffffffff81989ae0 T drm_syncobj_open +ffffffff81989b10 T drm_syncobj_release +ffffffff81989b50 t drm_syncobj_release_handle +ffffffff81989c00 T drm_syncobj_create_ioctl +ffffffff81989d30 T drm_syncobj_destroy_ioctl +ffffffff81989e50 T drm_syncobj_handle_to_fd_ioctl +ffffffff8198a040 T drm_syncobj_fd_to_handle_ioctl +ffffffff8198a230 T drm_syncobj_transfer_ioctl +ffffffff8198a650 T drm_timeout_abs_to_jiffies +ffffffff8198a730 T drm_syncobj_wait_ioctl +ffffffff8198a8c0 t drm_syncobj_array_find +ffffffff8198aaf0 t drm_syncobj_array_free +ffffffff8198abd0 T drm_syncobj_timeline_wait_ioctl +ffffffff8198ad60 T drm_syncobj_reset_ioctl +ffffffff8198aec0 T drm_syncobj_signal_ioctl +ffffffff8198b050 T drm_syncobj_timeline_signal_ioctl +ffffffff8198b280 T drm_syncobj_query_ioctl +ffffffff8198b480 t drm_syncobj_array_wait_timeout +ffffffff8198b8f0 t syncobj_wait_fence_func +ffffffff8198c000 T drm_vblank_count +ffffffff8198c090 T drm_crtc_accurate_vblank_count +ffffffff8198c1a0 t drm_update_vblank_count +ffffffff8198c5f0 T drm_vblank_disable_and_save +ffffffff8198c740 T drm_vblank_init +ffffffff8198c8c0 t vblank_disable_fn +ffffffff8198c940 t drm_vblank_init_release +ffffffff8198c9d0 T drm_dev_has_vblank +ffffffff8198ca00 T drm_crtc_vblank_waitqueue +ffffffff8198ca50 T drm_calc_timestamping_constants +ffffffff8198cc80 T drm_crtc_vblank_helper_get_vblank_timestamp_internal +ffffffff8198d1b0 T drm_crtc_vblank_helper_get_vblank_timestamp +ffffffff8198d1d0 T drm_crtc_vblank_count +ffffffff8198d260 T drm_crtc_vblank_count_and_time +ffffffff8198d320 T drm_crtc_arm_vblank_event +ffffffff8198d400 T drm_crtc_send_vblank_event +ffffffff8198d5b0 T drm_vblank_get +ffffffff8198d6d0 t drm_vblank_enable +ffffffff8198d890 T drm_crtc_vblank_get +ffffffff8198d9a0 T drm_vblank_put +ffffffff8198dad0 T drm_crtc_vblank_put +ffffffff8198daf0 T drm_wait_one_vblank +ffffffff8198df40 T drm_crtc_wait_one_vblank +ffffffff8198df60 T drm_crtc_vblank_off +ffffffff8198e350 T drm_crtc_vblank_reset +ffffffff8198e480 T drm_crtc_set_max_vblank_count +ffffffff8198e560 T drm_crtc_vblank_on +ffffffff8198e6b0 t drm_reset_vblank_timestamp +ffffffff8198e8b0 T drm_crtc_vblank_restore +ffffffff8198ec90 T drm_legacy_modeset_ctl_ioctl +ffffffff8198eeb0 T drm_wait_vblank_ioctl +ffffffff8198f8f0 T drm_handle_vblank +ffffffff8198fbe0 t drm_handle_vblank_events +ffffffff8198fe70 T drm_crtc_handle_vblank +ffffffff8198fe90 T drm_crtc_get_sequence_ioctl +ffffffff81990080 T drm_crtc_queue_sequence_ioctl +ffffffff81990450 t __get_vblank_counter +ffffffff81991000 T drm_handle_vblank_works +ffffffff819911b0 T drm_vblank_cancel_pending_works +ffffffff819912f0 T drm_vblank_work_schedule +ffffffff81991570 T drm_vblank_work_cancel_sync +ffffffff819916d0 T drm_vblank_work_flush +ffffffff819917a0 T drm_vblank_work_init +ffffffff81991810 T drm_vblank_worker_init +ffffffff81992000 T drm_vma_offset_manager_init +ffffffff81992040 T drm_vma_offset_manager_destroy +ffffffff81992060 T drm_vma_offset_lookup_locked +ffffffff819920f0 T drm_vma_offset_add +ffffffff81992180 T drm_vma_offset_remove +ffffffff819921d0 T drm_vma_node_allow +ffffffff819921f0 t vma_node_allow +ffffffff81992320 T drm_vma_node_allow_once +ffffffff81992340 T drm_vma_node_revoke +ffffffff819923c0 T drm_vma_node_is_allowed +ffffffff81993000 T hdmi_avi_infoframe_init +ffffffff81993080 T hdmi_avi_infoframe_check +ffffffff819930d0 T hdmi_avi_infoframe_pack_only +ffffffff819932d0 T hdmi_avi_infoframe_pack +ffffffff81993330 T hdmi_spd_infoframe_init +ffffffff819933f0 T hdmi_spd_infoframe_check +ffffffff81993440 T hdmi_spd_infoframe_pack_only +ffffffff81993570 T hdmi_spd_infoframe_pack +ffffffff819936d0 T hdmi_audio_infoframe_init +ffffffff81993720 T hdmi_audio_infoframe_check +ffffffff81993770 T hdmi_audio_infoframe_pack_only +ffffffff819938c0 T hdmi_audio_infoframe_pack +ffffffff81993910 T hdmi_audio_infoframe_pack_for_dp +ffffffff81993a00 T hdmi_vendor_infoframe_init +ffffffff81993a60 T hdmi_vendor_infoframe_check +ffffffff81993b00 T hdmi_vendor_infoframe_pack_only +ffffffff81993cd0 T hdmi_vendor_infoframe_pack +ffffffff81993d70 T hdmi_drm_infoframe_init +ffffffff81993dd0 T hdmi_drm_infoframe_check +ffffffff81993e20 T hdmi_drm_infoframe_pack_only +ffffffff81993ff0 T hdmi_drm_infoframe_pack +ffffffff81994040 T hdmi_infoframe_check +ffffffff819941a0 T hdmi_infoframe_pack_only +ffffffff819943c0 T hdmi_infoframe_pack +ffffffff81994530 T hdmi_infoframe_log +ffffffff819954d0 T hdmi_drm_infoframe_unpack_only +ffffffff819955b0 T hdmi_infoframe_unpack +ffffffff81996000 T list_sort +ffffffff81997000 T radix_tree_lookup +ffffffff819970b0 T radix_tree_iter_find +ffffffff819971a0 T radix_tree_delete +ffffffff81997340 T radix_tree_iter_delete +ffffffff81997360 T radix_tree_insert +ffffffff81998000 T sort +ffffffff81998040 t qsort +ffffffff8199a000 T drm_dp_dual_mode_read +ffffffff8199a110 T drm_dp_dual_mode_write +ffffffff8199a1f0 T drm_dp_dual_mode_detect +ffffffff8199a4a0 T drm_dp_dual_mode_max_tmds_clock +ffffffff8199a5d0 T drm_dp_dual_mode_get_tmds_output +ffffffff8199a700 T drm_dp_dual_mode_set_tmds_output +ffffffff8199a990 T drm_dp_get_dual_mode_type_name +ffffffff8199aa00 T drm_lspcon_get_mode +ffffffff8199abb0 T drm_lspcon_set_mode +ffffffff8199b000 T drm_dp_channel_eq_ok +ffffffff8199b080 T drm_dp_clock_recovery_ok +ffffffff8199b100 T drm_dp_get_adjust_request_voltage +ffffffff8199b140 T drm_dp_get_adjust_request_pre_emphasis +ffffffff8199b190 T drm_dp_get_adjust_tx_ffe_preset +ffffffff8199b1d0 T drm_dp_128b132b_lane_channel_eq_done +ffffffff8199b250 T drm_dp_128b132b_lane_symbol_locked +ffffffff8199b2c0 T drm_dp_128b132b_eq_interlane_align_done +ffffffff8199b2f0 T drm_dp_128b132b_cds_interlane_align_done +ffffffff8199b320 T drm_dp_128b132b_link_training_failed +ffffffff8199b350 T drm_dp_read_clock_recovery_delay +ffffffff8199b450 T drm_dp_read_channel_eq_delay +ffffffff8199b550 T drm_dp_128b132b_read_aux_rd_interval +ffffffff8199b600 T drm_dp_link_train_clock_recovery_delay +ffffffff8199b690 t __8b10b_clock_recovery_delay_us +ffffffff8199b710 T drm_dp_link_train_channel_eq_delay +ffffffff8199b790 T drm_dp_phy_name +ffffffff8199b7d0 T drm_dp_lttpr_link_train_clock_recovery_delay +ffffffff8199b7f0 T drm_dp_lttpr_link_train_channel_eq_delay +ffffffff8199b860 T drm_dp_link_rate_to_bw_code +ffffffff8199b8d0 T drm_dp_bw_code_to_link_rate +ffffffff8199b930 T drm_dp_dpcd_probe +ffffffff8199ba70 t drm_dp_dpcd_access +ffffffff8199bba0 T drm_dp_dpcd_read +ffffffff8199bcd0 T drm_dp_dpcd_write +ffffffff8199bde0 T drm_dp_dpcd_read_link_status +ffffffff8199be00 T drm_dp_dpcd_read_phy_link_status +ffffffff8199bf00 T drm_dp_downstream_is_type +ffffffff8199bf40 T drm_dp_downstream_is_tmds +ffffffff8199bfb0 T drm_dp_send_real_edid_checksum +ffffffff8199c210 T drm_dp_read_dpcd_caps +ffffffff8199c3a0 T drm_dp_read_downstream_info +ffffffff8199c4a0 T drm_dp_downstream_max_dotclock +ffffffff8199c4f0 T drm_dp_downstream_max_tmds_clock +ffffffff8199c590 T drm_dp_downstream_min_tmds_clock +ffffffff8199c610 T drm_dp_downstream_max_bpc +ffffffff8199c6b0 T drm_dp_downstream_420_passthrough +ffffffff8199c710 T drm_dp_downstream_444_to_420_conversion +ffffffff8199c770 T drm_dp_downstream_rgb_to_ycbcr_conversion +ffffffff8199c7d0 T drm_dp_downstream_mode +ffffffff8199c860 T drm_dp_downstream_id +ffffffff8199c880 T drm_dp_downstream_debug +ffffffff8199c920 T drm_dp_subconnector_type +ffffffff8199c990 T drm_dp_set_subconnector_property +ffffffff8199ca00 T drm_dp_read_sink_count_cap +ffffffff8199ca50 T drm_dp_read_sink_count +ffffffff8199cab0 T drm_dp_remote_aux_init +ffffffff8199cae0 t drm_dp_aux_crc_work +ffffffff8199cc60 T drm_dp_aux_init +ffffffff8199cd10 T drm_dp_aux_register +ffffffff8199ce30 T drm_dp_aux_unregister +ffffffff8199ce60 T drm_dp_psr_setup_time +ffffffff8199ceb0 T drm_dp_start_crc +ffffffff8199cf60 T drm_dp_stop_crc +ffffffff8199cff0 T drm_dp_read_desc +ffffffff8199d1b0 T drm_dp_dsc_sink_max_slice_count +ffffffff8199d240 T drm_dp_dsc_sink_line_buf_depth +ffffffff8199d280 T drm_dp_dsc_sink_supported_input_bpcs +ffffffff8199d2f0 T drm_dp_read_lttpr_common_caps +ffffffff8199d3b0 T drm_dp_read_lttpr_phy_caps +ffffffff8199d470 T drm_dp_lttpr_count +ffffffff8199d500 T drm_dp_lttpr_max_link_rate +ffffffff8199d560 T drm_dp_lttpr_max_lane_count +ffffffff8199d590 T drm_dp_lttpr_voltage_swing_level_3_supported +ffffffff8199d5c0 T drm_dp_lttpr_pre_emphasis_level_3_supported +ffffffff8199d5f0 T drm_dp_get_phy_test_pattern +ffffffff8199d710 T drm_dp_set_phy_test_pattern +ffffffff8199d7e0 T drm_dp_vsc_sdp_log +ffffffff8199db10 T drm_dp_get_pcon_max_frl_bw +ffffffff8199db60 T drm_dp_pcon_frl_prepare +ffffffff8199dbb0 T drm_dp_pcon_is_frl_ready +ffffffff8199dc00 T drm_dp_pcon_frl_configure_1 +ffffffff8199dd00 T drm_dp_pcon_frl_configure_2 +ffffffff8199dd60 T drm_dp_pcon_reset_frl_config +ffffffff8199ddb0 T drm_dp_pcon_frl_enable +ffffffff8199de70 T drm_dp_pcon_hdmi_link_active +ffffffff8199dec0 T drm_dp_pcon_hdmi_link_mode +ffffffff8199df30 T drm_dp_pcon_hdmi_frl_link_error_count +ffffffff8199e030 T drm_dp_pcon_enc_is_dsc_1_2 +ffffffff8199e060 T drm_dp_pcon_dsc_max_slices +ffffffff8199e0f0 T drm_dp_pcon_dsc_max_slice_width +ffffffff8199e120 T drm_dp_pcon_dsc_bpp_incr +ffffffff8199e160 T drm_dp_pcon_pps_default +ffffffff8199e1f0 T drm_dp_pcon_pps_override_buf +ffffffff8199e2a0 T drm_dp_pcon_pps_override_param +ffffffff8199e380 T drm_dp_pcon_convert_rgb_to_ycbcr +ffffffff8199e420 T drm_edp_backlight_set_level +ffffffff8199e500 T drm_edp_backlight_enable +ffffffff8199e710 t drm_edp_backlight_set_enable +ffffffff8199e850 T drm_edp_backlight_disable +ffffffff8199e890 T drm_edp_backlight_init +ffffffff8199ede0 T drm_panel_dp_aux_backlight +ffffffff8199ef70 t __128b132b_channel_eq_delay_us +ffffffff8199eff0 t __8b10b_channel_eq_delay_us +ffffffff8199f070 t drm_dp_aux_get_crc +ffffffff8199f140 t drm_dp_i2c_xfer +ffffffff8199f390 t drm_dp_i2c_functionality +ffffffff8199f3c0 t drm_dp_i2c_do_msg +ffffffff8199f7a0 t lock_bus +ffffffff8199f7c0 t trylock_bus +ffffffff8199f810 t unlock_bus +ffffffff8199f830 t dp_aux_backlight_update_status +ffffffff819a0000 T drm_dp_encode_sideband_req +ffffffff819a0420 T drm_dp_decode_sideband_req +ffffffff819a0970 T drm_dp_dump_sideband_msg_req_body +ffffffff819a0d30 T drm_dp_mst_get_port_malloc +ffffffff819a0d80 T drm_dp_mst_put_port_malloc +ffffffff819a0e80 t kref_put +ffffffff819a0ec0 T drm_atomic_get_mst_payload_state +ffffffff819a0f20 T drm_dp_mst_dpcd_read +ffffffff819a11e0 T drm_dp_mst_dpcd_write +ffffffff819a1230 t drm_dp_send_dpcd_write +ffffffff819a1470 T drm_dp_mst_connector_late_register +ffffffff819a14f0 T drm_dp_mst_connector_early_unregister +ffffffff819a1530 T drm_dp_send_power_updown_phy +ffffffff819a1770 t drm_dp_mst_topology_put_port +ffffffff819a18a0 t drm_dp_mst_wait_tx_reply +ffffffff819a1bf0 T drm_dp_send_query_stream_enc_status +ffffffff819a1eb0 T drm_dp_add_payload_part1 +ffffffff819a2060 T drm_dp_remove_payload +ffffffff819a2200 T drm_dp_add_payload_part2 +ffffffff819a23c0 T drm_dp_get_vc_payload_bw +ffffffff819a2460 T drm_dp_read_mst_cap +ffffffff819a24c0 T drm_dp_mst_topology_mgr_set_mst +ffffffff819a2780 t drm_dp_dpcd_write_payload +ffffffff819a2910 t drm_dp_mst_topology_put_mstb +ffffffff819a2a10 T drm_dp_mst_topology_mgr_suspend +ffffffff819a2ad0 t drm_dp_mst_topology_mgr_invalidate_mstb +ffffffff819a2b40 T drm_dp_mst_topology_mgr_resume +ffffffff819a2d80 T drm_dp_mst_hpd_irq +ffffffff819a3bf0 T drm_dp_mst_detect_port +ffffffff819a3d70 T drm_dp_mst_get_edid +ffffffff819a3e80 T drm_dp_atomic_find_time_slots +ffffffff819a4150 T drm_atomic_get_mst_topology_state +ffffffff819a4160 T drm_dp_atomic_release_time_slots +ffffffff819a4380 T drm_dp_mst_atomic_setup_commit +ffffffff819a4510 T drm_dp_mst_atomic_wait_for_dependencies +ffffffff819a4690 T drm_dp_mst_root_conn_atomic_check +ffffffff819a47b0 T drm_dp_mst_update_slots +ffffffff819a4810 T drm_dp_check_act_status +ffffffff819a49c0 T drm_dp_calc_pbn_mode +ffffffff819a4a30 T drm_dp_mst_dump_topology +ffffffff819a4c80 t drm_dp_mst_dump_mstb +ffffffff819a4cf0 T drm_dp_mst_add_affected_dsc_crtcs +ffffffff819a4e20 T drm_dp_mst_dsc_aux_for_port +ffffffff819a5050 T drm_dp_mst_atomic_enable_dsc +ffffffff819a51f0 T drm_dp_mst_atomic_check +ffffffff819a54e0 t drm_dp_mst_atomic_check_mstb_bw_limit +ffffffff819a57b0 t drm_dp_mst_duplicate_state +ffffffff819a5980 t drm_dp_mst_destroy_state +ffffffff819a5a40 T drm_atomic_get_old_mst_topology_state +ffffffff819a5a50 T drm_atomic_get_new_mst_topology_state +ffffffff819a5a60 T drm_dp_mst_topology_mgr_init +ffffffff819a5cd0 t drm_dp_mst_link_probe_work +ffffffff819a5f70 t drm_dp_tx_work +ffffffff819a5fc0 t drm_dp_delayed_destroy_work +ffffffff819a63e0 t drm_dp_mst_up_req_work +ffffffff819a68f0 T drm_dp_mst_topology_mgr_destroy +ffffffff819a6980 t drm_dp_mst_is_virtual_dpcd +ffffffff819a6a60 t drm_dp_free_mst_branch_device +ffffffff819a6aa0 t drm_dp_mst_topology_get_port_validated_locked +ffffffff819a6b20 t drm_dp_mst_dump_sideband_msg_tx +ffffffff819a6d30 t process_single_down_tx_qlock +ffffffff819a6ea0 t process_single_tx_qlock +ffffffff819a7380 t drm_dp_msg_data_crc4 +ffffffff819a74a0 t drm_dp_payload_send_msg +ffffffff819a78f0 t drm_dp_mst_topology_get_mstb_validated_locked +ffffffff819a7970 t drm_dp_get_one_sb_msg +ffffffff819a8090 t drm_dp_get_mst_branch_device +ffffffff819a8200 t drm_dp_check_and_send_link_address +ffffffff819a82d0 t drm_dp_send_link_address +ffffffff819a8f80 t drm_dp_send_enum_path_resources +ffffffff819a91e0 t drm_dp_port_set_pdt +ffffffff819a94c0 t drm_dp_mst_port_add_connector +ffffffff819a96a0 t drm_dp_mst_i2c_xfer +ffffffff819a9da0 t drm_dp_mst_i2c_functionality +ffffffff819a9dd0 t get_mst_branch_device_by_guid_helper +ffffffff819aa000 T drm_dsc_dp_pps_header_init +ffffffff819aa030 T drm_dsc_dp_rc_buffer_size +ffffffff819aa090 T drm_dsc_pps_payload_pack +ffffffff819aa330 T drm_dsc_compute_rc_parameters +ffffffff819ab000 T drm_connector_attach_content_protection_property +ffffffff819ab030 T drm_hdcp_check_ksvs_revoked +ffffffff819ab080 T drm_hdcp_update_content_protection +ffffffff819ac000 T drm_hdmi_infoframe_set_hdr_metadata +ffffffff819ac120 T drm_hdmi_avi_infoframe_colorimetry +ffffffff819ac170 T drm_hdmi_avi_infoframe_bars +ffffffff819ac1c0 T drm_hdmi_avi_infoframe_content_type +ffffffff819ad000 T drm_scdc_read +ffffffff819ad090 T drm_scdc_write +ffffffff819ad170 T drm_scdc_get_scrambling_status +ffffffff819ad230 T drm_scdc_set_scrambling +ffffffff819ad380 T drm_scdc_set_high_tmds_clock_ratio +ffffffff819ae000 T drm_gem_ttm_mmap +ffffffff819ae070 T drm_gem_ttm_vmap +ffffffff819ae080 T drm_gem_ttm_vunmap +ffffffff819af000 T ttm_agp_bind +ffffffff819af050 T ttm_agp_unbind +ffffffff819af070 T ttm_agp_is_bound +ffffffff819af0c0 T ttm_agp_destroy +ffffffff819af0e0 T ttm_agp_tt_create +ffffffff819b0000 T ttm_bo_move_to_lru_tail +ffffffff819b0040 T ttm_bo_set_bulk_move +ffffffff819b0100 T ttm_bo_delayed_delete +ffffffff819b03f0 t ttm_bo_cleanup_refs +ffffffff819b07a0 T ttm_bo_put +ffffffff819b0ce0 T ttm_bo_lock_delayed_workqueue +ffffffff819b0d60 T ttm_bo_unlock_delayed_workqueue +ffffffff819b0dd0 T ttm_bo_eviction_valuable +ffffffff819b0e20 T ttm_mem_evict_first +ffffffff819b16e0 T ttm_bo_pin +ffffffff819b1780 T ttm_bo_unpin +ffffffff819b1890 T ttm_bo_mem_space +ffffffff819b1ae0 t ttm_bo_add_move_fence +ffffffff819b1ba0 T ttm_bo_validate +ffffffff819b1d20 T ttm_bo_init_reserved +ffffffff819b1fc0 T ttm_bo_init_validate +ffffffff819b2130 T ttm_bo_unmap_virtual +ffffffff819b2250 T ttm_bo_wait +ffffffff819b22d0 T ttm_bo_swapout +ffffffff819b26f0 t ttm_bo_handle_move_mem +ffffffff819b2860 T ttm_bo_tt_destroy +ffffffff819b3000 T ttm_mem_io_reserve +ffffffff819b3060 T ttm_mem_io_free +ffffffff819b30d0 T ttm_move_memcpy +ffffffff819b3290 T ttm_bo_move_memcpy +ffffffff819b34c0 T ttm_bo_move_sync_cleanup +ffffffff819b35b0 T ttm_io_prot +ffffffff819b35f0 T ttm_bo_kmap +ffffffff819b38a0 T ttm_bo_kunmap +ffffffff819b39e0 T ttm_bo_vmap +ffffffff819b3bd0 T ttm_bo_vunmap +ffffffff819b3cc0 T ttm_bo_move_accel_cleanup +ffffffff819b3f80 T ttm_bo_pipeline_gutting +ffffffff819b4220 t ttm_buffer_object_transfer +ffffffff819b4470 t ttm_transfered_destroy +ffffffff819b5000 T ttm_bo_vm_reserve +ffffffff819b5250 T ttm_bo_vm_fault_reserved +ffffffff819b5570 T ttm_bo_vm_fault +ffffffff819b56d0 T ttm_bo_vm_reference +ffffffff819b5700 T ttm_bo_vm_detach +ffffffff819b5710 T ttm_bo_mmap_obj +ffffffff819b6000 T ttm_global_swapout +ffffffff819b6100 T ttm_device_swapout +ffffffff819b6220 T ttm_device_init +ffffffff819b6470 t ttm_device_delayed_workqueue +ffffffff819b6510 T ttm_device_fini +ffffffff819b66f0 T ttm_device_clear_dma_mappings +ffffffff819b67a0 t ttm_device_clear_lru_dma_mappings +ffffffff819b6850 t __delayed_work_tick +ffffffff819b7000 T ttm_eu_backoff_reservation +ffffffff819b7130 T ttm_eu_reserve_buffers +ffffffff819b7530 T ttm_eu_fence_buffer_objects +ffffffff819b7680 t __ww_mutex_lock +ffffffff819b8000 T ttm_prot_from_caching +ffffffff819b9000 T ttm_pool_alloc +ffffffff819b97c0 T ttm_pool_free +ffffffff819b9be0 T ttm_pool_init +ffffffff819b9e90 T ttm_pool_fini +ffffffff819ba060 t ttm_pool_type_fini +ffffffff819ba2a0 T ttm_pool_mgr_init +ffffffff819ba580 t ttm_pool_shrinker_count +ffffffff819ba5d0 t ttm_pool_shrinker_scan +ffffffff819ba7e0 T ttm_pool_mgr_fini +ffffffff819bb000 T ttm_range_man_init_nocheck +ffffffff819bb180 T ttm_range_man_fini_nocheck +ffffffff819bb310 t ttm_range_man_alloc +ffffffff819bb450 t ttm_range_man_free +ffffffff819bb4b0 t ttm_range_man_intersects +ffffffff819bb510 t ttm_range_man_compatible +ffffffff819bb570 t ttm_range_man_debug +ffffffff819bc000 T ttm_lru_bulk_move_init +ffffffff819bc020 T ttm_lru_bulk_move_tail +ffffffff819bc1e0 T ttm_resource_add_bulk_move +ffffffff819bc2a0 T ttm_resource_del_bulk_move +ffffffff819bc390 T ttm_resource_move_to_lru_tail +ffffffff819bc4e0 T ttm_resource_init +ffffffff819bc5e0 T ttm_resource_fini +ffffffff819bc650 T ttm_resource_alloc +ffffffff819bc790 T ttm_resource_free +ffffffff819bc900 T ttm_resource_intersects +ffffffff819bc960 T ttm_resource_compatible +ffffffff819bc9c0 T ttm_resource_compat +ffffffff819bcb50 T ttm_resource_set_bo +ffffffff819bcba0 T ttm_resource_manager_init +ffffffff819bcc50 T ttm_resource_manager_evict_all +ffffffff819bce20 T ttm_resource_manager_usage +ffffffff819bce80 T ttm_resource_manager_debug +ffffffff819bcf70 T ttm_resource_manager_first +ffffffff819bd000 T ttm_resource_manager_next +ffffffff819bd140 T ttm_kmap_iter_iomap_init +ffffffff819bd1a0 T ttm_kmap_iter_linear_io_init +ffffffff819bd370 T ttm_kmap_iter_linear_io_fini +ffffffff819bd3c0 T ttm_resource_manager_create_debugfs +ffffffff819bd3f0 t ttm_kmap_iter_iomap_map_local +ffffffff819bd530 t ttm_kmap_iter_iomap_unmap_local +ffffffff819bd550 t ttm_kmap_iter_linear_io_map_local +ffffffff819be000 T ttm_sys_man_init +ffffffff819be130 t ttm_sys_man_alloc +ffffffff819be1b0 t ttm_sys_man_free +ffffffff819bf000 T ttm_tt_create +ffffffff819bf100 T ttm_tt_destroy +ffffffff819bf120 T ttm_tt_init +ffffffff819bf1f0 T ttm_tt_fini +ffffffff819bf2d0 T ttm_sg_tt_init +ffffffff819bf4f0 T ttm_tt_swapin +ffffffff819bf600 T ttm_tt_swapout +ffffffff819bf650 T ttm_tt_populate +ffffffff819bf820 T ttm_tt_unpopulate +ffffffff819bf8d0 T ttm_tt_mgr_init +ffffffff819bf930 T ttm_kmap_iter_tt_init +ffffffff819bf990 t ttm_kmap_iter_tt_map_local +ffffffff819bf9f0 t ttm_kmap_iter_tt_unmap_local +ffffffff819c0000 T drm_sched_entity_init +ffffffff819c0180 T drm_sched_entity_modify_sched +ffffffff819c0200 T drm_sched_entity_is_ready +ffffffff819c0240 T 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intel_digital_connector_atomic_get_property +ffffffff819db090 T intel_digital_connector_atomic_set_property +ffffffff819db110 T intel_digital_connector_atomic_check +ffffffff819db210 T intel_digital_connector_duplicate_state +ffffffff819db290 T intel_connector_needs_modeset +ffffffff819db300 T intel_any_crtc_needs_modeset +ffffffff819db390 T intel_atomic_get_digital_connector_state +ffffffff819db3a0 T intel_crtc_duplicate_state +ffffffff819db490 T intel_crtc_free_hw_state +ffffffff819db4d0 T intel_crtc_destroy_state +ffffffff819db560 T intel_atomic_setup_scalers +ffffffff819db9f0 T intel_atomic_state_alloc +ffffffff819dba70 T intel_atomic_state_free +ffffffff819dbab0 T intel_atomic_state_clear +ffffffff819dbb00 T intel_atomic_get_crtc_state +ffffffff819dc000 T intel_plane_alloc +ffffffff819dc0c0 T intel_plane_free +ffffffff819dc100 T intel_plane_destroy_state +ffffffff819dc1d0 T intel_plane_duplicate_state +ffffffff819dc290 T intel_adjusted_rate +ffffffff819dc310 T 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intel_bw_init_hw +ffffffff819ec5e0 t tgl_get_bw_info +ffffffff819ecbd0 T intel_bw_crtc_update +ffffffff819eccb0 t intel_bw_crtc_data_rate +ffffffff819ecdc0 T intel_atomic_get_old_bw_state +ffffffff819ecde0 T intel_atomic_get_new_bw_state +ffffffff819ece00 T intel_atomic_get_bw_state +ffffffff819ece20 T intel_bw_min_cdclk +ffffffff819ed080 T intel_bw_calc_min_cdclk +ffffffff819ed440 T intel_bw_atomic_check +ffffffff819edc40 T intel_bw_init +ffffffff819edcb0 t icl_get_qgv_points +ffffffff819ee2a0 t skl_plane_calc_dbuf_bw +ffffffff819ee3f0 t intel_bw_duplicate_state +ffffffff819ee460 t intel_bw_destroy_state +ffffffff819ef000 T intel_cdclk_get_cdclk +ffffffff819ef020 T intel_cdclk_init_hw +ffffffff819ef7b0 T intel_cdclk_uninit_hw +ffffffff819ef8c0 T intel_cdclk_needs_modeset +ffffffff819ef900 T intel_cdclk_dump_config +ffffffff819ef980 T intel_set_cdclk_pre_plane_update +ffffffff819efa90 t intel_set_cdclk +ffffffff819efea0 T intel_set_cdclk_post_plane_update +ffffffff819effa0 T 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T intel_connector_attach_encoder +ffffffff819fc200 T intel_connector_get_hw_state +ffffffff819fc250 T intel_connector_get_pipe +ffffffff819fc310 T intel_connector_update_modes +ffffffff819fc340 T intel_ddc_get_modes +ffffffff819fc3c0 T intel_attach_force_audio_property +ffffffff819fc460 T intel_attach_broadcast_rgb_property +ffffffff819fc500 T intel_attach_aspect_ratio_property +ffffffff819fc560 T intel_attach_hdmi_colorspace_property +ffffffff819fc5b0 T intel_attach_dp_colorspace_property +ffffffff819fd000 T intel_crt_port_enabled +ffffffff819fd080 T intel_crt_reset +ffffffff819fd170 T intel_crt_init +ffffffff819fd5a0 t hsw_crt_get_config +ffffffff819fd650 t hsw_crt_compute_config +ffffffff819fd740 t hsw_pre_pll_enable_crt +ffffffff819fd7b0 t hsw_pre_enable_crt +ffffffff819fd850 t hsw_enable_crt +ffffffff819fda20 t hsw_disable_crt +ffffffff819fda90 t hsw_post_disable_crt +ffffffff819fdc30 t pch_crt_compute_config +ffffffff819fdc80 t pch_disable_crt +ffffffff819fdcb0 t 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intel_wait_for_vblank_workers +ffffffff819ff8c0 T intel_usecs_to_scanlines +ffffffff819ff910 T intel_pipe_update_start +ffffffff819ffe10 T intel_pipe_update_end +ffffffff81a00110 t intel_crtc_destroy +ffffffff81a00140 t intel_crtc_late_register +ffffffff81a00170 t intel_crtc_vblank_work +ffffffff81a01000 T intel_crtc_state_dump +ffffffff81a03000 T intel_cursor_plane_create +ffffffff81a03200 t i845_cursor_max_stride +ffffffff81a03230 t i845_cursor_update_arm +ffffffff81a03480 t i845_cursor_disable_arm +ffffffff81a034a0 t i845_cursor_get_hw_state +ffffffff81a03540 t i845_check_cursor +ffffffff81a036d0 t i9xx_cursor_max_stride +ffffffff81a03710 t i9xx_cursor_update_arm +ffffffff81a03ad0 t i9xx_cursor_disable_arm +ffffffff81a03af0 t i9xx_cursor_get_hw_state +ffffffff81a03bd0 t i9xx_check_cursor +ffffffff81a03e50 t intel_check_cursor +ffffffff81a04060 t intel_legacy_cursor_update +ffffffff81a04430 t intel_cursor_format_mod_supported +ffffffff81a05000 T hsw_prepare_dp_ddi_buffers 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intel_ddi_update_pipe +ffffffff81a06b50 T intel_ddi_compute_min_voltage_level +ffffffff81a06bc0 T intel_ddi_get_clock +ffffffff81a06cd0 T hsw_ddi_get_config +ffffffff81a06dc0 t intel_ddi_get_config +ffffffff81a07630 T intel_ddi_init +ffffffff81a081d0 t intel_ddi_hotplug +ffffffff81a08600 t intel_ddi_compute_output_type +ffffffff81a08680 t intel_ddi_compute_config +ffffffff81a087c0 t intel_ddi_compute_config_late +ffffffff81a08a70 t intel_enable_ddi +ffffffff81a09250 t intel_ddi_pre_pll_enable +ffffffff81a093c0 t intel_ddi_pre_enable +ffffffff81a0a090 t intel_disable_ddi +ffffffff81a0a210 t intel_ddi_post_disable +ffffffff81a0a730 t intel_ddi_sync_state +ffffffff81a0a7e0 t intel_ddi_initial_fastset_check +ffffffff81a0a8a0 t intel_ddi_encoder_suspend +ffffffff81a0a950 t intel_ddi_encoder_shutdown +ffffffff81a0aa10 t intel_ddi_get_power_domains +ffffffff81a0abc0 t dg2_ddi_get_config +ffffffff81a0ac10 t adls_ddi_enable_clock +ffffffff81a0ad90 t adls_ddi_disable_clock +ffffffff81a0ae50 t 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intel_ddi_dp_preemph_max +ffffffff81a10000 T is_hobl_buf_trans +ffffffff81a10040 T intel_ddi_buf_trans_init +ffffffff81a10300 t dg2_get_snps_buf_trans +ffffffff81a10370 t adlp_get_combo_buf_trans +ffffffff81a104a0 t adlp_get_dkl_buf_trans +ffffffff81a10500 t adls_get_combo_buf_trans +ffffffff81a10630 t rkl_get_combo_buf_trans +ffffffff81a10760 t dg1_get_combo_buf_trans +ffffffff81a10890 t tgl_get_combo_buf_trans +ffffffff81a109e0 t tgl_get_dkl_buf_trans +ffffffff81a10a40 t jsl_get_combo_buf_trans +ffffffff81a10af0 t ehl_get_combo_buf_trans +ffffffff81a10ba0 t icl_get_combo_buf_trans +ffffffff81a10c50 t icl_get_mg_buf_trans +ffffffff81a10cb0 t bxt_get_buf_trans +ffffffff81a10d40 t kbl_y_get_buf_trans +ffffffff81a10df0 t kbl_u_get_buf_trans +ffffffff81a10ea0 t kbl_get_buf_trans +ffffffff81a10f50 t skl_y_get_buf_trans +ffffffff81a11000 t skl_u_get_buf_trans +ffffffff81a110b0 t skl_get_buf_trans +ffffffff81a11160 t bdw_get_buf_trans +ffffffff81a11200 t hsw_get_buf_trans +ffffffff81a12000 T intel_update_watermarks +ffffffff81a12040 T vlv_get_hpll_vco +ffffffff81a12090 T vlv_get_cck_clock +ffffffff81a12140 T vlv_get_cck_clock_hpll +ffffffff81a12240 T is_trans_port_sync_mode +ffffffff81a12280 T intel_crtc_bigjoiner_slave_pipes +ffffffff81a122e0 T intel_crtc_is_bigjoiner_slave +ffffffff81a12340 T intel_crtc_is_bigjoiner_master +ffffffff81a123a0 T intel_master_crtc +ffffffff81a12440 T assert_transcoder +ffffffff81a125f0 T vlv_wait_port_ready +ffffffff81a12740 T intel_enable_transcoder +ffffffff81a12a30 T intel_disable_transcoder +ffffffff81a12d30 T intel_rotation_info_size +ffffffff81a12d80 T intel_remapped_info_size +ffffffff81a12eb0 T intel_plane_uses_fence +ffffffff81a12f00 T intel_fb_xy_to_linear +ffffffff81a12f50 T intel_add_fb_offsets +ffffffff81a12fa0 T intel_plane_fb_max_stride +ffffffff81a13020 T intel_set_plane_visible +ffffffff81a13070 T intel_plane_fixup_bitmasks +ffffffff81a13120 T intel_plane_disable_noatomic +ffffffff81a13310 T intel_plane_fence_y_offset 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intel_atomic_commit +ffffffff81a24ec0 t copy_bigjoiner_crtc_state_nomodeset +ffffffff81a24fc0 t intel_crtc_copy_uapi_to_hw_state_modeset +ffffffff81a25120 t intel_atomic_commit_ready +ffffffff81a251c0 t intel_atomic_commit_work +ffffffff81a251e0 t intel_atomic_commit_tail +ffffffff81a265c0 t intel_atomic_cleanup_work +ffffffff81a27000 T intel_display_power_domain_str +ffffffff81a27060 T __intel_display_power_is_enabled +ffffffff81a27130 T intel_display_power_is_enabled +ffffffff81a27240 T intel_display_power_set_target_dc_state +ffffffff81a27360 T intel_display_power_get +ffffffff81a273e0 t __intel_display_power_get_domain +ffffffff81a275c0 T intel_display_power_get_if_enabled +ffffffff81a276f0 T __intel_display_power_put_async +ffffffff81a278c0 t __intel_display_power_put_domain +ffffffff81a27a40 T intel_display_power_flush_work +ffffffff81a27b60 t release_async_put_domains +ffffffff81a27c40 T intel_display_power_put_unchecked +ffffffff81a27ca0 T intel_display_power_get_in_set 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hsw_disable_pc8 +ffffffff81a2ae60 T intel_display_power_suspend +ffffffff81a2aee0 T intel_display_power_resume +ffffffff81a2afc0 T intel_display_power_debug +ffffffff81a2b090 T intel_display_power_ddi_io_domain +ffffffff81a2b170 T intel_display_power_ddi_lanes_domain +ffffffff81a2b250 T intel_display_power_legacy_aux_domain +ffffffff81a2b360 T intel_display_power_tbt_aux_domain +ffffffff81a2b470 t __delayed_work_tick +ffffffff81a2c000 T intel_display_power_map_init +ffffffff81a2c170 t __set_power_wells +ffffffff81a2c550 T intel_display_power_map_cleanup +ffffffff81a2d000 T lookup_power_well +ffffffff81a2d0c0 T intel_power_well_enable +ffffffff81a2d150 T intel_power_well_name +ffffffff81a2d190 T intel_power_well_disable +ffffffff81a2d200 T intel_power_well_sync_hw +ffffffff81a2d270 T intel_power_well_get +ffffffff81a2d310 T intel_power_well_put +ffffffff81a2d410 T intel_power_well_is_enabled +ffffffff81a2d430 T intel_power_well_is_enabled_cached +ffffffff81a2d460 T intel_display_power_well_is_enabled +ffffffff81a2d520 T intel_power_well_is_always_on +ffffffff81a2d560 T intel_power_well_domains +ffffffff81a2d590 T intel_power_well_refcount +ffffffff81a2d5c0 T gen9_sanitize_dc_state +ffffffff81a2d6a0 T gen9_set_dc_state +ffffffff81a2da00 T gen9_enable_dc5 +ffffffff81a2dc60 T skl_enable_dc6 +ffffffff81a2ddb0 T bxt_enable_dc9 +ffffffff81a2df60 T bxt_disable_dc9 +ffffffff81a2e050 T gen9_disable_dc_states +ffffffff81a2e420 T chv_phy_powergate_ch +ffffffff81a2e530 t assert_chv_phy_status +ffffffff81a2e8d0 T chv_phy_powergate_lanes +ffffffff81a2eb90 t i9xx_power_well_sync_hw_noop +ffffffff81a2ebc0 t i9xx_always_on_power_well_noop +ffffffff81a2ebf0 t i9xx_always_on_power_well_enabled +ffffffff81a2ec20 t chv_pipe_power_well_sync_hw +ffffffff81a2ec50 t chv_pipe_power_well_enable +ffffffff81a2ec80 t chv_pipe_power_well_disable +ffffffff81a2ece0 t chv_pipe_power_well_enabled +ffffffff81a2ede0 t chv_dpio_cmn_power_well_enable +ffffffff81a2eff0 t chv_dpio_cmn_power_well_disable +ffffffff81a2f120 t vlv_power_well_enabled +ffffffff81a2f230 t i830_pipes_power_well_sync_hw +ffffffff81a2f320 t i830_pipes_power_well_enable +ffffffff81a2f3e0 t i830_pipes_power_well_disable +ffffffff81a2f410 t i830_pipes_power_well_enabled +ffffffff81a2f4b0 t hsw_power_well_sync_hw +ffffffff81a2f5a0 t hsw_power_well_enable +ffffffff81a2f820 t hsw_power_well_disable +ffffffff81a2f8d0 t hsw_power_well_enabled +ffffffff81a2f9b0 t gen9_dc_off_power_well_enable +ffffffff81a2f9c0 t gen9_dc_off_power_well_disable +ffffffff81a2fa60 t gen9_dc_off_power_well_enabled +ffffffff81a2faf0 t bxt_dpio_cmn_power_well_enable +ffffffff81a2fb20 t bxt_dpio_cmn_power_well_disable +ffffffff81a2fb50 t bxt_dpio_cmn_power_well_enabled +ffffffff81a2fb80 t vlv_display_power_well_enable +ffffffff81a2fbb0 t vlv_display_power_well_disable +ffffffff81a2fc20 t vlv_dpio_cmn_power_well_enable +ffffffff81a2fca0 t vlv_dpio_cmn_power_well_disable +ffffffff81a2fda0 t vlv_power_well_enable +ffffffff81a2fdc0 t vlv_power_well_disable +ffffffff81a2fde0 t icl_aux_power_well_enable +ffffffff81a30460 t icl_aux_power_well_disable +ffffffff81a30700 t tgl_tc_cold_off_power_well_sync_hw +ffffffff81a30720 t tgl_tc_cold_off_power_well_enable +ffffffff81a30740 t tgl_tc_cold_off_power_well_disable +ffffffff81a30760 t tgl_tc_cold_off_power_well_is_enabled +ffffffff81a30790 t xelpdp_aux_power_well_enable +ffffffff81a30870 t xelpdp_aux_power_well_disable +ffffffff81a30950 t xelpdp_aux_power_well_enabled +ffffffff81a30a00 t chv_set_pipe_power_well +ffffffff81a30c00 t vlv_display_power_well_init +ffffffff81a30e90 t vlv_set_power_well +ffffffff81a310a0 t hsw_wait_for_power_well_enable +ffffffff81a311e0 t hsw_wait_for_power_well_disable +ffffffff81a31470 t tgl_tc_cold_request +ffffffff81a32000 T intel_dkl_phy_read +ffffffff81a32100 T intel_dkl_phy_write +ffffffff81a321f0 T intel_dkl_phy_rmw +ffffffff81a32310 T intel_dkl_phy_posting_read +ffffffff81a33000 T intel_dmc_has_payload +ffffffff81a33040 T intel_dmc_load_program +ffffffff81a33820 t pipedmc_clock_gating_wa +ffffffff81a33a10 T intel_dmc_disable_program +ffffffff81a33c30 T assert_dmc_loaded +ffffffff81a33d80 T intel_dmc_ucode_init +ffffffff81a34050 t dmc_load_work_fn +ffffffff81a348b0 T intel_dmc_ucode_suspend +ffffffff81a34920 T intel_dmc_ucode_resume +ffffffff81a349c0 T intel_dmc_ucode_fini +ffffffff81a34af0 T intel_dmc_print_error_state +ffffffff81a34ba0 T intel_dmc_debugfs_register +ffffffff81a35000 T intel_dp_is_edp +ffffffff81a35030 T intel_dp_is_uhbr +ffffffff81a35070 T intel_dp_max_lane_count +ffffffff81a350e0 T intel_dp_link_required +ffffffff81a35120 T intel_dp_max_data_rate +ffffffff81a35190 T intel_dp_can_bigjoiner +ffffffff81a351e0 T intel_dp_get_link_train_fallback_values +ffffffff81a355c0 T intel_dp_mode_to_fec_clock +ffffffff81a35610 T intel_dp_min_bpp +ffffffff81a35650 T intel_dp_source_supports_tps3 +ffffffff81a356a0 T intel_dp_source_supports_tps4 +ffffffff81a356d0 T intel_dp_max_link_rate +ffffffff81a35790 T intel_dp_rate_select +ffffffff81a35830 T intel_dp_compute_rate +ffffffff81a35900 T intel_dp_adjust_compliance_config +ffffffff81a35a40 T intel_dp_limited_color_range +ffffffff81a35ab0 T intel_dp_compute_psr_vsc_sdp +ffffffff81a35b30 T intel_dp_needs_vsc_sdp +ffffffff81a35b80 t intel_dp_compute_vsc_colorimetry +ffffffff81a35d00 T intel_dp_compute_config +ffffffff81a36390 t intel_dp_compute_output_format +ffffffff81a365c0 T intel_dp_set_link_params +ffffffff81a36600 T intel_edp_backlight_on +ffffffff81a366b0 T intel_edp_backlight_off +ffffffff81a36760 T intel_dp_sink_set_decompression_state +ffffffff81a36800 T intel_dp_wait_source_oui +ffffffff81a368d0 T intel_dp_set_power +ffffffff81a36ae0 T intel_dp_sync_state +ffffffff81a36b60 t intel_dp_get_dpcd +ffffffff81a36cc0 t intel_dp_reset_max_link_params +ffffffff81a36dd0 T intel_dp_initial_fastset_check +ffffffff81a36ed0 T intel_dp_check_frl_training +ffffffff81a37460 T intel_dp_pcon_dsc_configure +ffffffff81a37630 T intel_dp_configure_protocol_converter +ffffffff81a377a0 T intel_dp_get_colorimetry_status +ffffffff81a37800 T intel_edp_fixup_vbt_bpp +ffffffff81a378a0 T intel_write_dp_vsc_sdp +ffffffff81a37a30 T intel_dp_set_infoframes +ffffffff81a37b60 t intel_write_dp_sdp +ffffffff81a37e50 T intel_read_dp_sdp +ffffffff81a38180 T intel_dp_retrain_link +ffffffff81a38840 T intel_dp_phy_test +ffffffff81a38f20 T intel_digital_port_connected +ffffffff81a38fc0 T intel_dp_encoder_flush_work +ffffffff81a39010 T intel_dp_encoder_suspend +ffffffff81a39050 T intel_dp_encoder_shutdown +ffffffff81a39090 T intel_dp_hpd_pulse +ffffffff81a397e0 T intel_dp_is_port_edp +ffffffff81a39830 T intel_dp_init_connector +ffffffff81a3a990 t intel_dp_modeset_retry_work_fn +ffffffff81a3aa10 t intel_dp_set_common_rates +ffffffff81a3abb0 T intel_dp_mst_suspend +ffffffff81a3ac50 T intel_dp_mst_resume +ffffffff81a3ad00 t intel_dp_compute_link_config +ffffffff81a3ba20 t intel_dp_dsc_get_slice_count +ffffffff81a3bb90 t intel_dp_set_sink_rates +ffffffff81a3bdc0 t intel_dp_check_device_service_irq +ffffffff81a3c390 t intel_dp_force +ffffffff81a3c4d0 t intel_dp_connector_register +ffffffff81a3c5b0 t intel_dp_connector_unregister +ffffffff81a3c610 t intel_dp_oob_hotplug_event +ffffffff81a3c690 t intel_dp_set_edid +ffffffff81a3cac0 t intel_dp_get_modes +ffffffff81a3cbc0 t intel_dp_detect +ffffffff81a3d4b0 t intel_dp_mode_valid +ffffffff81a3dc40 t intel_dp_connector_atomic_check +ffffffff81a3df80 t intel_dp_get_dsc_sink_cap +ffffffff81a3f000 T intel_dp_aux_fini +ffffffff81a3f020 T intel_dp_aux_init +ffffffff81a3f200 t xelpdp_aux_ctl_reg +ffffffff81a3f2c0 t xelpdp_aux_data_reg +ffffffff81a3f390 t tgl_aux_ctl_reg +ffffffff81a3f410 t tgl_aux_data_reg +ffffffff81a3f4a0 t skl_aux_ctl_reg +ffffffff81a3f520 t skl_aux_data_reg +ffffffff81a3f5b0 t ilk_aux_ctl_reg +ffffffff81a3f630 t ilk_aux_data_reg +ffffffff81a3f6c0 t g4x_aux_ctl_reg +ffffffff81a3f740 t g4x_aux_data_reg +ffffffff81a3f7d0 t skl_get_aux_clock_divider +ffffffff81a3f800 t hsw_get_aux_clock_divider +ffffffff81a3f8a0 t ilk_get_aux_clock_divider +ffffffff81a3f900 t g4x_get_aux_clock_divider +ffffffff81a3f950 t skl_get_aux_send_ctl +ffffffff81a3f9d0 t g4x_get_aux_send_ctl +ffffffff81a3fa20 t kasprintf +ffffffff81a3faf0 t intel_dp_aux_transfer +ffffffff81a3fd40 t intel_dp_aux_xfer +ffffffff81a41000 T intel_dp_aux_init_backlight_funcs +ffffffff81a41270 t intel_dp_aux_hdr_setup_backlight +ffffffff81a413c0 t intel_dp_aux_hdr_get_backlight +ffffffff81a41530 t intel_dp_aux_hdr_set_backlight +ffffffff81a41620 t intel_dp_aux_hdr_disable_backlight +ffffffff81a416a0 t intel_dp_aux_hdr_enable_backlight +ffffffff81a418f0 t intel_dp_aux_vesa_setup_backlight +ffffffff81a41ab0 t intel_dp_aux_vesa_get_backlight +ffffffff81a41ae0 t intel_dp_aux_vesa_set_backlight +ffffffff81a41b80 t intel_dp_aux_vesa_disable_backlight +ffffffff81a41c30 t intel_dp_aux_vesa_enable_backlight +ffffffff81a42000 T intel_dp_hdcp_init +ffffffff81a420b0 t intel_dp_hdcp_write_an_aksv +ffffffff81a421a0 t intel_dp_hdcp_read_bksv +ffffffff81a42230 t intel_dp_hdcp_read_bstatus +ffffffff81a422c0 t intel_dp_hdcp_repeater_present +ffffffff81a42370 t intel_dp_hdcp_read_ri_prime +ffffffff81a42400 t intel_dp_hdcp_read_ksv_ready +ffffffff81a424a0 t intel_dp_hdcp_read_ksv_fifo +ffffffff81a42590 t intel_dp_hdcp_read_v_prime_part +ffffffff81a42630 t intel_dp_hdcp_toggle_signalling +ffffffff81a42660 t intel_dp_mst_hdcp_stream_encryption +ffffffff81a42870 t intel_dp_hdcp_check_link +ffffffff81a42900 t intel_dp_hdcp_capable +ffffffff81a429b0 t intel_dp_hdcp2_capable +ffffffff81a42a30 t intel_dp_hdcp2_write_msg +ffffffff81a42af0 t intel_dp_hdcp2_read_msg +ffffffff81a431c0 t intel_dp_hdcp2_config_stream_type +ffffffff81a43270 t intel_dp_mst_hdcp2_stream_encryption +ffffffff81a43500 t intel_dp_mst_hdcp2_check_link +ffffffff81a435c0 t get_hdcp2_dp_msg_data +ffffffff81a43700 t intel_dp_hdcp2_check_link +ffffffff81a44000 T intel_dp_init_lttpr_and_dprx_caps +ffffffff81a442c0 T intel_dp_get_adjust_train +ffffffff81a44980 T intel_dp_program_link_training_pattern +ffffffff81a44a80 T intel_dp_set_signal_levels +ffffffff81a44de0 T intel_dp_dump_link_status +ffffffff81a44eb0 T intel_dp_stop_link_train +ffffffff81a450e0 T intel_dp_start_link_train +ffffffff81a46220 t intel_dp_link_train_phy +ffffffff81a48000 T intel_dp_mst_encoder_active_links +ffffffff81a48030 T intel_dp_mst_encoder_init +ffffffff81a48270 T intel_dp_mst_source_support +ffffffff81a482b0 T intel_dp_mst_encoder_cleanup +ffffffff81a48310 T intel_dp_mst_is_master_trans +ffffffff81a48350 T intel_dp_mst_is_slave_trans +ffffffff81a48390 T intel_dp_mst_add_topology_state_for_crtc +ffffffff81a48460 t intel_dp_add_mst_connector +ffffffff81a48670 t intel_dp_mst_poll_hpd_irq +ffffffff81a48690 t intel_dp_mst_get_hw_state +ffffffff81a486f0 t intel_dp_mst_connector_late_register +ffffffff81a48760 t intel_dp_mst_connector_early_unregister +ffffffff81a48790 t intel_dp_mst_get_modes +ffffffff81a48830 t intel_dp_mst_detect +ffffffff81a48930 t intel_dp_mst_mode_valid_ctx +ffffffff81a48a90 t intel_mst_atomic_best_encoder +ffffffff81a48af0 t intel_dp_mst_atomic_check +ffffffff81a48c70 t intel_dp_mst_compute_config +ffffffff81a48f80 t intel_dp_mst_compute_config_late +ffffffff81a49080 t intel_mst_disable_dp +ffffffff81a49170 t intel_mst_post_disable_dp +ffffffff81a49430 t intel_mst_pre_pll_enable_dp +ffffffff81a49480 t intel_mst_pre_enable_dp +ffffffff81a496a0 t intel_mst_enable_dp +ffffffff81a49a90 t intel_dp_mst_enc_get_hw_state +ffffffff81a49ad0 t intel_dp_mst_enc_get_config +ffffffff81a49af0 t intel_dp_mst_initial_fastset_check +ffffffff81a49b10 t intel_dp_mst_encoder_destroy +ffffffff81a4a000 T bxt_port_to_phy_channel +ffffffff81a4a130 T bxt_ddi_phy_set_signal_levels +ffffffff81a4a650 T bxt_ddi_phy_is_enabled +ffffffff81a4a7a0 T bxt_ddi_phy_uninit +ffffffff81a4a8a0 T bxt_ddi_phy_init +ffffffff81a4aad0 t _bxt_ddi_phy_init +ffffffff81a4b0f0 T bxt_ddi_phy_verify_state +ffffffff81a4b430 t __phy_reg_verify_state +ffffffff81a4b530 T bxt_ddi_phy_calc_lane_lat_optim_mask +ffffffff81a4b5a0 T bxt_ddi_phy_set_lane_optim_mask +ffffffff81a4b8d0 T bxt_ddi_phy_get_lane_lat_optim_mask +ffffffff81a4bb20 T chv_set_phy_signal_level +ffffffff81a4be80 T chv_data_lane_soft_reset +ffffffff81a4c060 T chv_phy_pre_pll_enable +ffffffff81a4c300 T chv_phy_pre_encoder_enable +ffffffff81a4c590 T chv_phy_release_cl2_override +ffffffff81a4c620 T chv_phy_post_pll_disable +ffffffff81a4c6d0 T vlv_set_phy_signal_level +ffffffff81a4c850 T vlv_phy_pre_pll_enable +ffffffff81a4c970 T vlv_phy_pre_encoder_enable +ffffffff81a4ca90 T vlv_phy_reset_lanes +ffffffff81a4d000 T pnv_calc_dpll_params +ffffffff81a4d0c0 T i9xx_calc_dpll_params +ffffffff81a4d190 T vlv_calc_dpll_params +ffffffff81a4d250 T chv_calc_dpll_params +ffffffff81a4d320 T bxt_find_best_dpll +ffffffff81a4d340 t chv_find_best_dpll +ffffffff81a4d680 T i9xx_dpll_compute_fp +ffffffff81a4d6c0 T vlv_compute_dpll +ffffffff81a4d740 T chv_compute_dpll +ffffffff81a4d7c0 T intel_dpll_crtc_compute_clock +ffffffff81a4d8c0 T intel_dpll_crtc_get_shared_dpll +ffffffff81a4da10 T intel_dpll_init_clock_hook +ffffffff81a4db00 T i9xx_enable_pll +ffffffff81a4deb0 T vlv_enable_pll +ffffffff81a4e410 T chv_enable_pll +ffffffff81a4ea90 T vlv_force_pll_on +ffffffff81a4ebe0 T vlv_disable_pll +ffffffff81a4eca0 T chv_disable_pll +ffffffff81a4edd0 T i9xx_disable_pll +ffffffff81a4eed0 T vlv_force_pll_off +ffffffff81a4efc0 T assert_pll_enabled +ffffffff81a4f0a0 T assert_pll_disabled +ffffffff81a4f180 t intel_pll_is_valid +ffffffff81a4f250 t dg2_crtc_compute_clock +ffffffff81a4f2d0 t hsw_crtc_compute_clock +ffffffff81a4f390 t hsw_crtc_get_shared_dpll +ffffffff81a4f430 t ilk_crtc_compute_clock +ffffffff81a4f730 t ilk_crtc_get_shared_dpll +ffffffff81a4f780 t g4x_find_best_dpll +ffffffff81a4fac0 t chv_crtc_compute_clock +ffffffff81a4fbd0 t vlv_crtc_compute_clock +ffffffff81a50090 t g4x_crtc_compute_clock +ffffffff81a501e0 t i9xx_compute_dpll +ffffffff81a50460 t pnv_crtc_compute_clock +ffffffff81a50820 t i9xx_crtc_compute_clock +ffffffff81a50940 t i9xx_find_best_dpll +ffffffff81a50c70 t i8xx_crtc_compute_clock +ffffffff81a51000 T intel_get_shared_dpll_by_id +ffffffff81a51040 T intel_get_shared_dpll_id +ffffffff81a510d0 T assert_shared_dpll +ffffffff81a511f0 T intel_dpll_get_hw_state +ffffffff81a51220 T icl_tc_port_to_pll_id +ffffffff81a51250 T intel_enable_shared_dpll +ffffffff81a51540 T intel_disable_shared_dpll +ffffffff81a51780 T intel_shared_dpll_swap_state +ffffffff81a51860 T icl_set_active_port_dpll +ffffffff81a518a0 T intel_shared_dpll_init +ffffffff81a51ab0 T intel_compute_shared_dplls +ffffffff81a51b40 T intel_reserve_shared_dplls +ffffffff81a51bd0 T intel_release_shared_dplls +ffffffff81a51c10 T intel_update_active_dpll +ffffffff81a51c70 T intel_dpll_get_freq +ffffffff81a51d00 T intel_dpll_update_ref_clks +ffffffff81a51d50 T intel_dpll_readout_hw_state +ffffffff81a51ed0 T intel_dpll_sanitize_state +ffffffff81a51fb0 T intel_dpll_dump_hw_state +ffffffff81a52030 T intel_shared_dpll_state_verify +ffffffff81a52150 t verify_single_dpll_state +ffffffff81a52470 T intel_shared_dpll_verify_disabled +ffffffff81a524f0 t icl_compute_dplls +ffffffff81a532d0 t icl_get_dplls +ffffffff81a53a50 t icl_put_dplls +ffffffff81a53b10 t icl_update_active_dpll +ffffffff81a53bc0 t icl_update_dpll_ref_clks +ffffffff81a53c00 t icl_dump_hw_state +ffffffff81a53cc0 t combo_pll_enable +ffffffff81a53ef0 t combo_pll_disable +ffffffff81a53fe0 t combo_pll_get_hw_state +ffffffff81a54070 t icl_ddi_combo_pll_get_freq +ffffffff81a54240 t icl_dpll_write +ffffffff81a544e0 t adlp_cmtg_clock_gating_wa +ffffffff81a54640 t icl_pll_disable +ffffffff81a547e0 t icl_pll_get_hw_state +ffffffff81a54b20 t tbt_pll_enable +ffffffff81a54ce0 t tbt_pll_disable +ffffffff81a54d00 t tbt_pll_get_hw_state +ffffffff81a54d20 t icl_ddi_tbt_pll_get_freq +ffffffff81a54d90 t mg_pll_enable +ffffffff81a55340 t mg_pll_disable +ffffffff81a55380 t dkl_pll_get_hw_state +ffffffff81a55550 t icl_ddi_mg_pll_get_freq +ffffffff81a55630 t intel_find_shared_dpll +ffffffff81a55960 t intel_unreference_shared_dpll +ffffffff81a55ac0 t mg_pll_get_hw_state +ffffffff81a55d10 t bxt_compute_dpll +ffffffff81a56030 t bxt_get_dpll +ffffffff81a56290 t intel_put_dpll +ffffffff81a562f0 t bxt_update_dpll_ref_clks +ffffffff81a56330 t bxt_dump_hw_state +ffffffff81a563e0 t bxt_ddi_pll_enable +ffffffff81a56ef0 t bxt_ddi_pll_disable +ffffffff81a57100 t bxt_ddi_pll_get_hw_state +ffffffff81a57590 t bxt_ddi_pll_get_freq +ffffffff81a57620 t bxt_ddi_set_dpll_hw_state +ffffffff81a577e0 t skl_compute_dpll +ffffffff81a57f60 t skl_get_dpll +ffffffff81a58190 t skl_update_dpll_ref_clks +ffffffff81a581d0 t skl_dump_hw_state +ffffffff81a58230 t skl_ddi_dpll0_enable +ffffffff81a582f0 t skl_ddi_dpll0_disable +ffffffff81a58320 t skl_ddi_dpll0_get_hw_state +ffffffff81a58420 t skl_ddi_pll_get_freq +ffffffff81a584b0 t skl_ddi_wrpll_get_freq +ffffffff81a58610 t skl_ddi_pll_enable +ffffffff81a58830 t skl_ddi_pll_disable +ffffffff81a588c0 t skl_ddi_pll_get_hw_state +ffffffff81a589e0 t hsw_compute_dpll +ffffffff81a59230 t hsw_get_dpll +ffffffff81a594f0 t hsw_update_dpll_ref_clks +ffffffff81a59560 t hsw_dump_hw_state +ffffffff81a59590 t hsw_ddi_wrpll_enable +ffffffff81a59610 t hsw_ddi_wrpll_disable +ffffffff81a596f0 t hsw_ddi_wrpll_get_hw_state +ffffffff81a59790 t hsw_ddi_wrpll_get_freq +ffffffff81a59880 t hsw_ddi_spll_enable +ffffffff81a598e0 t hsw_ddi_spll_disable +ffffffff81a599b0 t hsw_ddi_spll_get_hw_state +ffffffff81a59a40 t hsw_ddi_spll_get_freq +ffffffff81a59ae0 t hsw_ddi_lcpll_enable +ffffffff81a59b10 t hsw_ddi_lcpll_disable +ffffffff81a59b40 t hsw_ddi_lcpll_get_hw_state +ffffffff81a59b70 t hsw_ddi_lcpll_get_freq +ffffffff81a59bf0 t ibx_compute_dpll +ffffffff81a59c20 t ibx_get_dpll +ffffffff81a59ea0 t ibx_dump_hw_state +ffffffff81a59f00 t ibx_pch_dpll_enable +ffffffff81a5a0b0 t ibx_pch_dpll_disable +ffffffff81a5a130 t ibx_pch_dpll_get_hw_state +ffffffff81a5b000 T intel_dpt_pin +ffffffff81a5b1d0 T intel_dpt_unpin +ffffffff81a5b240 T intel_dpt_resume +ffffffff81a5b310 T intel_dpt_suspend +ffffffff81a5b3e0 T intel_dpt_create +ffffffff81a5b710 t dpt_insert_page +ffffffff81a5b780 t dpt_clear_range +ffffffff81a5b7b0 t dpt_insert_entries +ffffffff81a5b8b0 t dpt_cleanup +ffffffff81a5b900 t dpt_bind_vma +ffffffff81a5b990 t dpt_unbind_vma +ffffffff81a5b9c0 T intel_dpt_destroy +ffffffff81a5ba10 t __ww_mutex_lock +ffffffff81a5c000 T intel_drrs_type_str +ffffffff81a5c040 T intel_drrs_is_active +ffffffff81a5c070 T intel_drrs_activate +ffffffff81a5c270 T intel_drrs_deactivate +ffffffff81a5c350 t intel_drrs_set_state +ffffffff81a5c4a0 T intel_drrs_invalidate +ffffffff81a5c4c0 t intel_drrs_frontbuffer_update +ffffffff81a5c620 T intel_drrs_flush +ffffffff81a5c640 T intel_crtc_drrs_init +ffffffff81a5c6e0 t intel_drrs_downclock_work +ffffffff81a5c740 t __delayed_work_tick +ffffffff81a5d000 T intel_dsb_indexed_reg_write +ffffffff81a5d140 T intel_dsb_reg_write +ffffffff81a5d230 T intel_dsb_commit +ffffffff81a5d680 T intel_dsb_prepare +ffffffff81a5d810 T intel_dsb_cleanup +ffffffff81a5e000 T intel_dsi_bitrate +ffffffff81a5e0a0 T intel_dsi_tlpx_ns +ffffffff81a5e0f0 T intel_dsi_get_modes +ffffffff81a5e100 T intel_dsi_mode_valid +ffffffff81a5e1c0 T intel_dsi_host_init +ffffffff81a5e270 T intel_dsi_get_panel_orientation +ffffffff81a5f000 T intel_dsi_dcs_init_backlight_funcs +ffffffff81a5f0a0 t dcs_setup_backlight +ffffffff81a5f100 t dcs_get_backlight +ffffffff81a5f200 t dcs_set_backlight +ffffffff81a5f2f0 t dcs_disable_backlight +ffffffff81a5f670 t dcs_enable_backlight +ffffffff81a60000 T intel_dsi_vbt_exec_sequence +ffffffff81a60020 T intel_dsi_msleep +ffffffff81a60090 T intel_dsi_log_params +ffffffff81a60410 T intel_dsi_vbt_init +ffffffff81a608a0 T intel_dsi_vbt_gpio_init +ffffffff81a608c0 T intel_dsi_vbt_gpio_cleanup +ffffffff81a61000 T intel_dvo_init +ffffffff81a614f0 t intel_disable_dvo +ffffffff81a615a0 t intel_enable_dvo +ffffffff81a61690 t intel_dvo_get_hw_state +ffffffff81a61700 t intel_dvo_get_config +ffffffff81a617b0 t intel_dvo_compute_config +ffffffff81a61840 t intel_dvo_pre_enable +ffffffff81a61930 t intel_dvo_connector_get_hw_state +ffffffff81a619b0 t intel_dvo_enc_destroy +ffffffff81a619f0 t intel_dvo_detect +ffffffff81a61af0 t intel_dvo_get_modes +ffffffff81a61b60 t intel_dvo_mode_valid +ffffffff81a62000 T intel_fb_get_format_info +ffffffff81a62240 T intel_fb_is_ccs_modifier +ffffffff81a62410 T intel_fb_is_rc_ccs_cc_modifier +ffffffff81a625e0 T intel_fb_is_mc_ccs_modifier +ffffffff81a627b0 T intel_fb_plane_get_modifiers +ffffffff81a628f0 T intel_fb_plane_supports_modifier +ffffffff81a62960 T intel_format_info_is_yuv_semiplanar +ffffffff81a62c00 T intel_fb_is_ccs_aux_plane +ffffffff81a62e40 T intel_fb_rc_ccs_cc_plane +ffffffff81a630a0 T is_surface_linear +ffffffff81a633d0 T main_to_ccs_plane +ffffffff81a636b0 T skl_ccs_to_main_plane +ffffffff81a639a0 T skl_main_to_aux_plane +ffffffff81a63c00 T intel_tile_size +ffffffff81a63c40 T intel_tile_width_bytes +ffffffff81a63e90 T intel_tile_height +ffffffff81a63ef0 T intel_tile_row_size +ffffffff81a63f70 T intel_fb_align_height +ffffffff81a63ff0 T intel_fb_uses_dpt +ffffffff81a64040 T intel_cursor_alignment +ffffffff81a640a0 T intel_surf_alignment +ffffffff81a642c0 T intel_fb_plane_get_subsampling +ffffffff81a64690 T intel_plane_adjust_aligned_offset +ffffffff81a64700 t intel_adjust_aligned_offset +ffffffff81a648b0 T intel_plane_compute_aligned_offset +ffffffff81a649b0 t intel_compute_aligned_offset +ffffffff81a64b70 T intel_fb_needs_pot_stride_remap +ffffffff81a64bc0 T intel_fb_supports_90_270_rotation +ffffffff81a64c10 T intel_fill_fb_info +ffffffff81a65850 t calc_plane_remap_info +ffffffff81a662b0 T intel_fb_fill_view +ffffffff81a66300 T intel_plane_compute_gtt +ffffffff81a66bd0 t intel_plane_check_stride +ffffffff81a66f40 T intel_framebuffer_init +ffffffff81a68350 T intel_user_framebuffer_create +ffffffff81a68490 T intel_framebuffer_create +ffffffff81a68520 t intel_adjust_tile_offset +ffffffff81a68660 t intel_user_framebuffer_destroy +ffffffff81a686c0 t intel_user_framebuffer_create_handle +ffffffff81a686e0 t intel_user_framebuffer_dirty +ffffffff81a69000 T intel_pin_and_fence_fb_obj +ffffffff81a69320 t i915_gem_object_lock +ffffffff81a69530 T intel_unpin_fb_vma +ffffffff81a695a0 T intel_plane_pin_fb +ffffffff81a698d0 T intel_plane_unpin_fb +ffffffff81a6a000 T intel_fbc_cleanup +ffffffff81a6a1c0 T intel_fbc_pre_update +ffffffff81a6a810 T intel_fbc_post_update +ffffffff81a6aa60 T intel_fbc_invalidate +ffffffff81a6ac80 T intel_fbc_flush +ffffffff81a6af10 T intel_fbc_atomic_check +ffffffff81a6b480 T intel_fbc_disable +ffffffff81a6b540 t __intel_fbc_disable +ffffffff81a6b6d0 T intel_fbc_update +ffffffff81a6bd90 T intel_fbc_reset_underrun +ffffffff81a6bef0 T intel_fbc_handle_fifo_underrun_irq +ffffffff81a6bfa0 T intel_fbc_add_plane +ffffffff81a6bfd0 T intel_fbc_init +ffffffff81a6c260 T intel_fbc_sanitize +ffffffff81a6c330 T intel_fbc_crtc_debugfs_add +ffffffff81a6c360 T intel_fbc_debugfs_register +ffffffff81a6c390 t intel_fbc_is_ok +ffffffff81a6c4b0 t intel_fbc_update_state +ffffffff81a6c820 t intel_fbc_underrun_work_fn +ffffffff81a6c940 t ivb_fbc_activate +ffffffff81a6cba0 t ilk_fbc_deactivate +ffffffff81a6cc50 t ilk_fbc_is_active +ffffffff81a6ccb0 t ivb_fbc_is_compressing +ffffffff81a6cd20 t snb_fbc_nuke +ffffffff81a6cda0 t ilk_fbc_program_cfb +ffffffff81a6cde0 t ivb_fbc_set_false_color +ffffffff81a6cea0 t snb_fbc_activate +ffffffff81a6cf30 t ilk_fbc_is_compressing +ffffffff81a6cfa0 t ilk_fbc_activate +ffffffff81a6d0d0 t i965_fbc_nuke +ffffffff81a6d170 t g4x_fbc_activate +ffffffff81a6d280 t g4x_fbc_deactivate +ffffffff81a6d310 t g4x_fbc_is_active +ffffffff81a6d370 t g4x_fbc_is_compressing +ffffffff81a6d3d0 t g4x_fbc_program_cfb +ffffffff81a6d400 t i8xx_fbc_activate +ffffffff81a6d570 t i8xx_fbc_deactivate +ffffffff81a6d640 t i8xx_fbc_is_active +ffffffff81a6d6a0 t i8xx_fbc_is_compressing +ffffffff81a6d700 t i8xx_fbc_program_cfb +ffffffff81a6d780 t i8xx_fbc_nuke +ffffffff81a6e000 T intel_fbdev_init +ffffffff81a6e4d0 t intel_fbdev_suspend_worker +ffffffff81a6e500 T intel_fbdev_initial_config_async +ffffffff81a6e570 T intel_fbdev_unregister +ffffffff81a6e5b0 T intel_fbdev_set_suspend +ffffffff81a6e5e0 T intel_fbdev_fini +ffffffff81a6e670 T intel_fbdev_output_poll_changed +ffffffff81a6e710 T intel_fbdev_restore_mode +ffffffff81a6e790 T intel_fbdev_framebuffer +ffffffff81a6e7d0 t intelfb_create +ffffffff81a6edd0 t intel_fbdev_set_par +ffffffff81a6f000 T assert_fdi_tx_enabled +ffffffff81a6f0e0 T assert_fdi_tx_disabled +ffffffff81a6f1c0 T assert_fdi_rx_enabled +ffffffff81a6f280 T assert_fdi_rx_disabled +ffffffff81a6f340 T assert_fdi_tx_pll_enabled +ffffffff81a6f3f0 T assert_fdi_rx_pll_enabled +ffffffff81a6f4b0 T assert_fdi_rx_pll_disabled +ffffffff81a6f570 T intel_fdi_link_train +ffffffff81a6f590 T intel_fdi_pll_freq_update +ffffffff81a6f640 T intel_fdi_link_freq +ffffffff81a6f690 T ilk_fdi_compute_config +ffffffff81a6f9d0 T intel_fdi_normal_train +ffffffff81a6fb60 T hsw_fdi_link_train +ffffffff81a70060 T hsw_fdi_disable +ffffffff81a701c0 T ilk_fdi_pll_enable +ffffffff81a703d0 T ilk_fdi_pll_disable +ffffffff81a70500 T ilk_fdi_disable +ffffffff81a70770 T intel_fdi_init_hook +ffffffff81a707d0 t ilk_fdi_link_train +ffffffff81a70e40 t gen6_fdi_link_train +ffffffff81a71670 t ivb_manual_fdi_link_train +ffffffff81a71f10 t cpt_set_fdi_bc_bifurcation +ffffffff81a73000 T intel_set_cpu_fifo_underrun_reporting +ffffffff81a733f0 T intel_set_pch_fifo_underrun_reporting +ffffffff81a73620 T intel_cpu_fifo_underrun_irq_handler +ffffffff81a73810 T intel_pch_fifo_underrun_irq_handler +ffffffff81a73890 T intel_check_cpu_fifo_underruns +ffffffff81a73ab0 T intel_check_pch_fifo_underruns +ffffffff81a74000 T intel_frontbuffer_flip_prepare +ffffffff81a74050 T intel_frontbuffer_flip_complete +ffffffff81a74130 T intel_frontbuffer_flip +ffffffff81a74200 T __intel_fb_invalidate +ffffffff81a74290 T __intel_fb_flush +ffffffff81a74380 T intel_frontbuffer_get +ffffffff81a744c0 t frontbuffer_active +ffffffff81a744f0 t frontbuffer_retire +ffffffff81a74530 T intel_frontbuffer_put +ffffffff81a746c0 T intel_frontbuffer_track +ffffffff81a75000 T intel_atomic_global_obj_init +ffffffff81a75070 T intel_atomic_global_obj_cleanup +ffffffff81a75170 T intel_atomic_get_global_obj_state +ffffffff81a753e0 T intel_atomic_get_old_global_obj_state +ffffffff81a75440 T intel_atomic_get_new_global_obj_state +ffffffff81a754a0 T intel_atomic_swap_global_state +ffffffff81a755f0 T intel_atomic_clear_global_state +ffffffff81a75720 T intel_atomic_lock_global_state +ffffffff81a757a0 T intel_atomic_serialize_global_state +ffffffff81a76000 T intel_gmbus_is_valid_pin +ffffffff81a76110 T intel_gmbus_reset +ffffffff81a76170 T intel_bb_set_bits +ffffffff81a762a0 T intel_bb_set_dir +ffffffff81a762d0 T intel_bb_read_bits +ffffffff81a76450 T intel_acquire_bus +ffffffff81a76650 T intel_release_bus +ffffffff81a767f0 T intel_send_start +ffffffff81a76810 T intel_send_stop +ffffffff81a76830 T intel_initiate_xfer +ffffffff81a76850 T intel_read_byte +ffffffff81a76870 T intel_write_byte +ffffffff81a76890 T intel_gmbus_output_aksv +ffffffff81a76960 t do_gmbus_xfer +ffffffff81a76f60 T intel_gmbus_setup +ffffffff81a772f0 T intel_gmbus_teardown +ffffffff81a77370 T intel_gmbus_get_adapter +ffffffff81a773f0 T intel_gmbus_force_bit +ffffffff81a77490 T intel_gmbus_is_forced_bit +ffffffff81a774c0 t gmbus_xfer_read +ffffffff81a77790 t gmbus_xfer_write +ffffffff81a779e0 t gmbus_wait +ffffffff81a77dc0 t gmbus_wait_idle +ffffffff81a77f60 t gmbus_xfer +ffffffff81a78040 t gmbus_func +ffffffff81a78080 t gmbus_lock_bus +ffffffff81a780a0 t gmbus_trylock_bus +ffffffff81a78100 t gmbus_unlock_bus +ffffffff81a79000 T intel_hdcp_capable +ffffffff81a790a0 t intel_hdcp_read_valid_bksv +ffffffff81a79320 T intel_hdcp2_capable +ffffffff81a79400 T is_hdcp_supported +ffffffff81a79450 T intel_hdcp_component_init +ffffffff81a79480 T intel_hdcp_init +ffffffff81a795c0 t intel_hdcp_check_work +ffffffff81a7d4c0 t intel_hdcp_prop_work +ffffffff81a7d540 T intel_hdcp_enable +ffffffff81a7d590 T intel_hdcp_disable +ffffffff81a7d6c0 t intel_hdcp_update_value +ffffffff81a7d880 t _intel_hdcp2_disable +ffffffff81a7dc80 t _intel_hdcp_disable +ffffffff81a7df80 T intel_hdcp_update_pipe +ffffffff81a7e0f0 T intel_hdcp_component_fini +ffffffff81a7e130 T intel_hdcp_cleanup +ffffffff81a7e270 T intel_hdcp_atomic_check +ffffffff81a7e300 T intel_hdcp_handle_cp_irq +ffffffff81a7e400 t __delayed_work_tick +ffffffff81a7e420 t hdcp2_authenticate_repeater_topology +ffffffff81a7e700 t intel_hdcp_get_repeater_ctl +ffffffff81a7f000 T hsw_write_infoframe +ffffffff81a7f410 t hsw_dip_data_reg +ffffffff81a7f5d0 T hsw_read_infoframe +ffffffff81a7f690 T intel_hdmi_infoframe_enable +ffffffff81a7f730 T intel_hdmi_infoframes_enabled +ffffffff81a7f850 T intel_read_infoframe +ffffffff81a7f9e0 T intel_hdmi_read_gcp_infoframe +ffffffff81a7fad0 T intel_dp_dual_mode_set_tmds_output +ffffffff81a7fba0 T intel_hdmi_tmds_clock +ffffffff81a7fbf0 T intel_hdmi_bpc_possible +ffffffff81a7fd20 T intel_hdmi_limited_color_range +ffffffff81a7fd90 T intel_hdmi_compute_config +ffffffff81a804e0 t intel_hdmi_compute_output_format +ffffffff81a80610 T intel_hdmi_encoder_shutdown +ffffffff81a806e0 T intel_hdmi_handle_sink_scrambling +ffffffff81a80800 T intel_infoframe_init +ffffffff81a80980 t vlv_write_infoframe +ffffffff81a80ce0 t vlv_read_infoframe +ffffffff81a80eb0 t vlv_set_infoframes +ffffffff81a81250 t vlv_infoframes_enabled +ffffffff81a812f0 t g4x_write_infoframe +ffffffff81a815b0 t g4x_read_infoframe +ffffffff81a81700 t g4x_set_infoframes +ffffffff81a819a0 t g4x_infoframes_enabled +ffffffff81a81a20 t hsw_set_infoframes +ffffffff81a81cc0 t hsw_infoframes_enabled +ffffffff81a81d50 t ibx_write_infoframe +ffffffff81a82070 t ibx_read_infoframe +ffffffff81a821f0 t ibx_set_infoframes +ffffffff81a82560 t ibx_infoframes_enabled +ffffffff81a825f0 t cpt_write_infoframe +ffffffff81a828f0 t cpt_read_infoframe +ffffffff81a82a70 t cpt_set_infoframes +ffffffff81a82d80 t cpt_infoframes_enabled +ffffffff81a82df0 T intel_hdmi_init_connector +ffffffff81a83480 T intel_hdmi_dsc_get_slice_height +ffffffff81a834e0 T intel_hdmi_dsc_get_num_slices +ffffffff81a83660 T intel_hdmi_dsc_get_bpp +ffffffff81a83750 t intel_hdmi_compute_clock +ffffffff81a83a10 t hdmi_port_clock_valid +ffffffff81a83c40 t intel_write_infoframe +ffffffff81a83e10 t intel_hdmi_detect +ffffffff81a83fd0 t intel_hdmi_force +ffffffff81a840b0 t intel_hdmi_connector_register +ffffffff81a840c0 t intel_hdmi_connector_unregister +ffffffff81a840d0 t intel_hdmi_set_edid +ffffffff81a84370 t intel_hdmi_get_modes +ffffffff81a843b0 t intel_hdmi_mode_valid +ffffffff81a84550 t intel_hdmi_mode_clock_valid +ffffffff81a846e0 t intel_hdmi_hdcp_write_an_aksv +ffffffff81a84830 t intel_hdmi_hdcp_read_bksv +ffffffff81a84900 t intel_hdmi_hdcp_read_bstatus +ffffffff81a849d0 t intel_hdmi_hdcp_repeater_present +ffffffff81a84ab0 t intel_hdmi_hdcp_read_ri_prime +ffffffff81a84b80 t intel_hdmi_hdcp_read_ksv_ready +ffffffff81a84c60 t intel_hdmi_hdcp_read_ksv_fifo +ffffffff81a84d30 t intel_hdmi_hdcp_read_v_prime_part +ffffffff81a84e20 t intel_hdmi_hdcp_toggle_signalling +ffffffff81a850b0 t intel_hdmi_hdcp_check_link +ffffffff81a85400 t intel_hdmi_hdcp2_capable +ffffffff81a854c0 t intel_hdmi_hdcp2_write_msg +ffffffff81a855b0 t intel_hdmi_hdcp2_read_msg +ffffffff81a85a50 t intel_hdmi_hdcp2_check_link +ffffffff81a86000 T intel_hpd_pin_default +ffffffff81a86030 T intel_encoder_hotplug +ffffffff81a86160 T intel_hpd_trigger_irq +ffffffff81a861d0 T intel_hpd_irq_handler +ffffffff81a865b0 T intel_hpd_init +ffffffff81a866c0 T intel_hpd_poll_enable +ffffffff81a86740 T intel_hpd_poll_disable +ffffffff81a867a0 T intel_hpd_init_work +ffffffff81a86870 t i915_hotplug_work_func +ffffffff81a86bc0 t i915_digport_work_func +ffffffff81a86d50 t i915_hpd_poll_init_work +ffffffff81a86e60 t intel_hpd_irq_storm_reenable_work +ffffffff81a871b0 T intel_hpd_cancel_work +ffffffff81a872d0 T intel_hpd_disable +ffffffff81a87360 T intel_hpd_enable +ffffffff81a873d0 t __delayed_work_tick +ffffffff81a88000 T intel_lpe_audio_irq_handler +ffffffff81a88020 T intel_lpe_audio_init +ffffffff81a88050 T intel_lpe_audio_teardown +ffffffff81a88070 T intel_lpe_audio_notify +ffffffff81a89000 T lspcon_detect_hdr_capability +ffffffff81a890b0 T lspcon_write_infoframe +ffffffff81a89830 T lspcon_read_infoframe +ffffffff81a89870 T lspcon_set_infoframes +ffffffff81a89ae0 T lspcon_infoframes_enabled +ffffffff81a89cd0 T lspcon_wait_pcon_mode +ffffffff81a89cf0 t lspcon_wait_mode +ffffffff81a89fb0 T lspcon_init +ffffffff81a8a3c0 T intel_lspcon_infoframes_enabled +ffffffff81a8a400 T lspcon_resume +ffffffff81a8a6b0 t lspcon_change_mode +ffffffff81a8b000 T intel_lvds_port_enabled +ffffffff81a8b080 T intel_get_lvds_encoder +ffffffff81a8b0e0 T intel_is_dual_link_lvds +ffffffff81a8b150 T intel_lvds_init +ffffffff81a8b8c0 t intel_enable_lvds +ffffffff81a8ba10 t intel_pre_enable_lvds +ffffffff81a8bce0 t intel_lvds_compute_config +ffffffff81a8be40 t pch_disable_lvds +ffffffff81a8be60 t pch_post_disable_lvds +ffffffff81a8be80 t gmch_disable_lvds +ffffffff81a8beb0 t intel_lvds_get_hw_state +ffffffff81a8bf70 t intel_lvds_get_config +ffffffff81a8c070 t intel_lvds_shutdown +ffffffff81a8c110 t intel_no_lvds_dmi_callback +ffffffff81a8c160 t intel_disable_lvds +ffffffff81a8c290 t intel_lvds_get_modes +ffffffff81a8c2c0 t intel_lvds_mode_valid +ffffffff81a8c340 t intel_dual_link_lvds_callback +ffffffff81a8d000 T intel_modeset_setup_hw_state +ffffffff81a8f000 T intel_modeset_verify_crtc +ffffffff81a8f3b0 t verify_connector_state +ffffffff81a8f660 T intel_modeset_verify_disabled +ffffffff81a90000 T intel_opregion_notify_encoder +ffffffff81a90170 t swsci +ffffffff81a904a0 T intel_opregion_notify_adapter +ffffffff81a90500 T intel_opregion_asle_intr +ffffffff81a90550 T intel_opregion_setup +ffffffff81a90d60 t asle_work +ffffffff81a911e0 T intel_opregion_get_panel_type +ffffffff81a912d0 T intel_opregion_get_edid +ffffffff81a913b0 T intel_opregion_headless_sku +ffffffff81a91400 T intel_opregion_register +ffffffff81a91490 T intel_opregion_resume +ffffffff81a91520 T intel_opregion_suspend +ffffffff81a915c0 T intel_opregion_unregister +ffffffff81a91740 t intel_no_opregion_vbt_callback +ffffffff81a917a0 t intel_use_opregion_panel_type_callback +ffffffff81a92000 T intel_overlay_reset +ffffffff81a92050 T intel_overlay_switch_off +ffffffff81a92250 t intel_overlay_release_old_vid +ffffffff81a923f0 T intel_overlay_put_image_ioctl +ffffffff81a935c0 T intel_overlay_attrs_ioctl +ffffffff81a93a70 T intel_overlay_setup +ffffffff81a93cd0 t intel_overlay_last_flip_retire +ffffffff81a93d10 T intel_overlay_cleanup +ffffffff81a93dd0 T intel_overlay_capture_error_state +ffffffff81a93ec0 T intel_overlay_print_error_state +ffffffff81a94290 t intel_overlay_release_old_vid_tail +ffffffff81a94360 t intel_overlay_off_tail +ffffffff81a94510 t intel_overlay_flip_prepare +ffffffff81a95000 T intel_panel_use_ssc +ffffffff81a95060 T intel_panel_preferred_fixed_mode +ffffffff81a950b0 T intel_panel_fixed_mode +ffffffff81a95170 T intel_panel_downclock_mode +ffffffff81a95260 T intel_panel_highest_mode +ffffffff81a952c0 T intel_panel_get_modes +ffffffff81a95350 T intel_panel_drrs_type +ffffffff81a953a0 T intel_panel_compute_config +ffffffff81a95520 T intel_panel_add_edid_fixed_modes +ffffffff81a95a50 T intel_panel_add_vbt_lfp_fixed_mode +ffffffff81a95ab0 t intel_panel_add_fixed_mode +ffffffff81a95c30 T intel_panel_add_vbt_sdvo_fixed_mode +ffffffff81a95ca0 T intel_panel_add_encoder_fixed_mode +ffffffff81a95ce0 T intel_panel_fitting +ffffffff81a96330 T intel_panel_detect +ffffffff81a963c0 T intel_panel_mode_valid +ffffffff81a964d0 T intel_panel_init_alloc +ffffffff81a96520 T intel_panel_init +ffffffff81a965e0 T intel_panel_fini +ffffffff81a97000 T intel_has_pch_trancoder +ffffffff81a97060 T intel_crtc_pch_transcoder +ffffffff81a970a0 T intel_pch_transcoder_get_m1_n1 +ffffffff81a970f0 T intel_pch_transcoder_get_m2_n2 +ffffffff81a97140 T ilk_pch_pre_enable +ffffffff81a97170 T ilk_pch_enable +ffffffff81a97720 t ilk_pch_transcoder_set_timings +ffffffff81a979a0 T ilk_pch_disable +ffffffff81a979c0 T ilk_pch_post_disable +ffffffff81a97d00 T ilk_pch_get_config +ffffffff81a97ec0 T lpt_pch_enable +ffffffff81a980f0 T lpt_pch_disable +ffffffff81a98200 T lpt_pch_get_config +ffffffff81a982d0 T intel_pch_sanitize +ffffffff81a985b0 t assert_pch_dp_disabled +ffffffff81a986a0 t assert_pch_hdmi_disabled +ffffffff81a99000 T lpt_disable_iclkip +ffffffff81a99070 T lpt_iclkip +ffffffff81a99100 T lpt_program_iclkip +ffffffff81a99380 T lpt_get_iclkip +ffffffff81a99490 T lpt_disable_clkout_dp +ffffffff81a99570 T intel_init_pch_refclk +ffffffff81a9b000 T intel_crtc_initial_plane_config +ffffffff81a9c000 T intel_pps_lock +ffffffff81a9c060 T intel_pps_unlock +ffffffff81a9c0c0 T intel_pps_reset_all +ffffffff81a9c210 T intel_pps_check_power_unlocked +ffffffff81a9c3d0 T intel_pps_wait_power_cycle +ffffffff81a9c590 T intel_pps_vdd_on_unlocked +ffffffff81a9cac0 T intel_pps_vdd_on +ffffffff81a9cbc0 T intel_pps_vdd_off_sync +ffffffff81a9cc90 t intel_pps_vdd_off_sync_unlocked +ffffffff81a9cf70 T intel_pps_vdd_off_unlocked +ffffffff81a9d080 T intel_pps_on_unlocked +ffffffff81a9d480 T intel_pps_on +ffffffff81a9d520 T intel_pps_off_unlocked +ffffffff81a9d770 T intel_pps_off +ffffffff81a9d810 T intel_pps_backlight_on +ffffffff81a9da20 T intel_pps_backlight_off +ffffffff81a9dc30 T intel_pps_backlight_power +ffffffff81a9de00 T vlv_pps_init +ffffffff81a9df60 t vlv_detach_power_sequencer +ffffffff81a9e0e0 t vlv_steal_power_sequencer +ffffffff81a9e210 t pps_init_delays +ffffffff81a9e680 t pps_init_registers +ffffffff81a9ea20 T intel_pps_have_panel_power_or_vdd +ffffffff81a9eb80 T intel_pps_encoder_reset +ffffffff81a9ed10 t vlv_initial_power_sequencer_setup +ffffffff81a9efc0 t pps_vdd_init +ffffffff81a9f0d0 T intel_pps_init +ffffffff81a9f250 t edp_panel_vdd_work +ffffffff81a9f300 T intel_pps_init_late +ffffffff81a9f480 T intel_pps_unlock_regs_wa +ffffffff81a9f570 T intel_pps_setup +ffffffff81a9f5e0 T assert_pps_unlocked +ffffffff81a9f830 t intel_pps_get_registers +ffffffff81a9ff00 t wait_panel_status +ffffffff81aa01d0 t intel_pps_readout_hw_state +ffffffff81aa0390 t __delayed_work_tick +ffffffff81aa1000 T intel_psr_irq_handler +ffffffff81aa1680 T intel_psr_init_dpcd +ffffffff81aa1910 T intel_psr_compute_config +ffffffff81aa21c0 T intel_psr_get_config +ffffffff81aa2370 T intel_psr_disable +ffffffff81aa2480 t intel_psr_disable_locked +ffffffff81aa28f0 T intel_psr_pause +ffffffff81aa2ae0 t intel_psr_exit +ffffffff81aa2dc0 T intel_psr_resume +ffffffff81aa2e50 t intel_psr_activate +ffffffff81aa35f0 T intel_psr2_disable_plane_sel_fetch +ffffffff81aa3660 T intel_psr2_program_plane_sel_fetch +ffffffff81aa3810 T intel_psr2_program_trans_man_trk_ctl +ffffffff81aa3960 T intel_psr2_sel_fetch_update +ffffffff81aa3ff0 T intel_psr_pre_plane_update +ffffffff81aa41c0 T intel_psr_post_plane_update +ffffffff81aa4c50 T intel_psr_wait_for_idle_locked +ffffffff81aa4e30 T intel_psr_debug_set +ffffffff81aa5060 t psr_irq_control +ffffffff81aa51b0 T intel_psr_invalidate +ffffffff81aa5470 T intel_psr_flush +ffffffff81aa5940 T intel_psr_init +ffffffff81aa5a70 t intel_psr_work +ffffffff81aa5c20 t tgl_dc3co_disable_work +ffffffff81aa5c70 T intel_psr_short_pulse +ffffffff81aa6030 T intel_psr_enabled +ffffffff81aa60b0 T intel_psr_lock +ffffffff81aa61a0 T intel_psr_unlock +ffffffff81aa6290 t tgl_psr2_disable_dc3co +ffffffff81aa63c0 t __delayed_work_tick +ffffffff81aa7000 T intel_lookup_range_min_qp +ffffffff81aa70b0 T intel_lookup_range_max_qp +ffffffff81aa8000 T intel_init_quirks +ffffffff81aa80f0 T intel_has_quirk +ffffffff81aa8130 t quirk_ssc_force_disable +ffffffff81aa8160 t quirk_invert_brightness +ffffffff81aa8190 t quirk_backlight_present +ffffffff81aa81c0 t quirk_increase_t12_delay +ffffffff81aa81f0 t quirk_increase_ddi_disabled_time +ffffffff81aa8220 t intel_dmi_reverse_brightness +ffffffff81aa8270 t intel_dmi_no_pps_backlight +ffffffff81aa9000 T intel_sdvo_port_enabled +ffffffff81aa90a0 T intel_sdvo_init +ffffffff81aa9c70 t intel_sdvo_compute_config +ffffffff81aaa1d0 t pch_disable_sdvo +ffffffff81aaa200 t pch_post_disable_sdvo +ffffffff81aaa210 t intel_disable_sdvo +ffffffff81aaa380 t intel_sdvo_pre_enable +ffffffff81aaad00 t intel_enable_sdvo +ffffffff81aaaf00 t intel_sdvo_get_hw_state +ffffffff81aaaff0 t intel_sdvo_get_config +ffffffff81aab560 t intel_sdvo_ddc_proxy_xfer +ffffffff81aab610 t intel_sdvo_ddc_proxy_func +ffffffff81aab640 t __intel_sdvo_write_cmd +ffffffff81aabb00 t proxy_lock_bus +ffffffff81aabb30 t proxy_trylock_bus +ffffffff81aabb60 t proxy_unlock_bus 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vlv_sprite_check +ffffffff81ab2640 t ivb_sprite_update_noarm +ffffffff81ab27b0 t ivb_sprite_update_arm +ffffffff81ab2b90 t ivb_sprite_disable_arm +ffffffff81ab2c40 t ivb_sprite_get_hw_state +ffffffff81ab2cf0 t g4x_sprite_check +ffffffff81ab32c0 t hsw_sprite_max_stride +ffffffff81ab3310 t g4x_sprite_max_stride +ffffffff81ab3380 t ivb_sprite_min_cdclk +ffffffff81ab34b0 t g4x_sprite_update_noarm +ffffffff81ab3620 t g4x_sprite_update_arm +ffffffff81ab3a70 t g4x_sprite_disable_arm +ffffffff81ab3b20 t g4x_sprite_get_hw_state +ffffffff81ab3bd0 t g4x_sprite_min_cdclk +ffffffff81ab3c90 t vlv_sprite_format_mod_supported +ffffffff81ab3dc0 t snb_sprite_format_mod_supported +ffffffff81ab3eb0 t g4x_sprite_format_mod_supported +ffffffff81ab4000 T intel_tc_port_in_tbt_alt_mode +ffffffff81ab4070 T intel_tc_port_in_dp_alt_mode +ffffffff81ab40e0 T intel_tc_port_in_legacy_mode +ffffffff81ab4150 T intel_tc_cold_requires_aux_pw +ffffffff81ab41a0 T intel_tc_port_get_lane_mask +ffffffff81ab4300 T intel_tc_port_get_pin_assignment_mask +ffffffff81ab4460 T intel_tc_port_fia_max_lane_count +ffffffff81ab45a0 T intel_tc_port_set_fia_lane_count +ffffffff81ab47b0 T intel_tc_port_sanitize +ffffffff81ab4e40 T intel_tc_port_connected +ffffffff81ab4f30 T intel_tc_port_lock +ffffffff81ab4f50 t tc_port_live_status_mask +ffffffff81ab5220 T intel_tc_port_unlock +ffffffff81ab52a0 t __intel_tc_port_lock +ffffffff81ab54a0 T intel_tc_port_flush_work +ffffffff81ab54c0 T intel_tc_port_ref_held +ffffffff81ab5510 T intel_tc_port_get_link +ffffffff81ab5590 T intel_tc_port_put_link +ffffffff81ab5620 T intel_tc_port_init +ffffffff81ab58c0 t intel_tc_port_disconnect_phy_work +ffffffff81ab5910 t tc_phy_status_complete +ffffffff81ab5a20 t tc_phy_take_ownership +ffffffff81ab5bc0 t intel_tc_port_update_mode +ffffffff81ab60e0 t __delayed_work_tick +ffffffff81ab7000 T intel_tv_init +ffffffff81ab7420 t intel_tv_compute_config +ffffffff81ab78c0 t intel_tv_get_config +ffffffff81ab7e70 t intel_tv_pre_enable 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intel_vga_unregister +ffffffff81abe000 T intel_vrr_is_capable +ffffffff81abe0a0 T intel_vrr_check_modeset +ffffffff81abe130 T intel_vrr_vmin_vblank_start +ffffffff81abe190 T intel_vrr_vmax_vblank_start +ffffffff81abe1f0 T intel_vrr_compute_config +ffffffff81abe380 T intel_vrr_enable +ffffffff81abe560 T intel_vrr_send_push +ffffffff81abe5e0 T intel_vrr_is_push_sent +ffffffff81abe670 T intel_vrr_disable +ffffffff81abe740 T intel_vrr_get_config +ffffffff81abf000 T skl_update_scaler_crtc +ffffffff81abf0c0 t skl_update_scaler +ffffffff81abf370 T skl_update_scaler_plane +ffffffff81abf760 T skl_pfit_enable +ffffffff81abfc40 T skl_program_plane_scaler +ffffffff81ac0300 T skl_detach_scalers +ffffffff81ac0440 T skl_scaler_disable +ffffffff81ac1000 T skl_format_to_fourcc +ffffffff81ac1180 T icl_is_nv12_y_plane +ffffffff81ac11f0 T icl_is_hdr_plane +ffffffff81ac1230 T skl_calc_main_surface_offset +ffffffff81ac1470 T skl_universal_plane_create +ffffffff81ac1b60 t icl_plane_min_width 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skl_check_main_ccs_coordinates +ffffffff81ac5400 t gen12_plane_format_mod_supported +ffffffff81ac5650 t skl_plane_format_mod_supported +ffffffff81ac6000 T intel_enabled_dbuf_slices_mask +ffffffff81ac6130 T intel_sagv_pre_plane_update +ffffffff81ac62a0 T intel_sagv_post_plane_update +ffffffff81ac64f0 T intel_can_enable_sagv +ffffffff81ac6560 T skl_ddb_dbuf_slice_mask +ffffffff81ac6610 T skl_write_plane_wm +ffffffff81ac69f0 T skl_write_cursor_wm +ffffffff81ac6d50 T skl_ddb_allocation_overlaps +ffffffff81ac6df0 T skl_wm_get_hw_state +ffffffff81ac73e0 t skl_pipe_wm_get_hw_state +ffffffff81ac7770 t skl_compute_dbuf_slices +ffffffff81ac7ca0 T skl_wm_sanitize +ffffffff81ac7ef0 T intel_wm_state_verify +ffffffff81ac8820 T skl_watermark_ipc_enabled +ffffffff81ac8850 T skl_watermark_ipc_update +ffffffff81ac8900 T skl_watermark_ipc_init +ffffffff81ac8a00 T skl_wm_init +ffffffff81ac9030 T intel_atomic_get_dbuf_state +ffffffff81ac9050 T intel_dbuf_init +ffffffff81ac90c0 T intel_dbuf_pre_plane_update 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i915_gem_context_release_work +ffffffff81adb1f0 t intel_context_set_gem +ffffffff81adb300 t engines_notify +ffffffff81adb480 t kill_engines +ffffffff81adb620 t create_setparam +ffffffff81adb690 t invalid_ext +ffffffff81adb6c0 t set_proto_ctx_engines_balance +ffffffff81adb9a0 t set_proto_ctx_engines_bond +ffffffff81adbd30 t set_proto_ctx_engines_parallel_submit +ffffffff81add000 T __i915_gem_object_create_user +ffffffff81add020 t __i915_gem_object_create_user_ext +ffffffff81add4a0 T i915_gem_dumb_create +ffffffff81add610 T i915_gem_create_ioctl +ffffffff81add6e0 T i915_gem_create_ext_ioctl +ffffffff81add8a0 t ext_set_placements +ffffffff81addcb0 t ext_set_protected +ffffffff81ade000 T i915_gem_prime_export +ffffffff81ade090 T i915_gem_prime_import +ffffffff81adf000 T i915_gem_cpu_write_needs_clflush +ffffffff81adf060 T i915_gem_object_flush_if_display +ffffffff81adf270 T i915_gem_object_flush_if_display_locked +ffffffff81adf2f0 T i915_gem_object_set_to_wc_domain +ffffffff81adf3f0 t flush_write_domain +ffffffff81adf560 T i915_gem_object_set_to_gtt_domain +ffffffff81adf6b0 T i915_gem_object_set_cache_level +ffffffff81adf750 T i915_gem_get_caching_ioctl +ffffffff81adf7f0 T i915_gem_set_caching_ioctl +ffffffff81adfa30 t i915_gem_object_lock_interruptible +ffffffff81adfb60 T i915_gem_object_pin_to_display_plane +ffffffff81adfd50 T i915_gem_object_set_to_cpu_domain +ffffffff81adfe20 T i915_gem_set_domain_ioctl +ffffffff81ae0180 T i915_gem_object_prepare_read +ffffffff81ae02d0 T i915_gem_object_prepare_write +ffffffff81ae1000 T i915_gem_execbuffer2_ioctl +ffffffff81ae3270 t eb_release_vmas +ffffffff81ae3540 t parse_timeline_fences +ffffffff81ae3940 t eb_pin_engine +ffffffff81ae3c00 t eb_validate_vmas +ffffffff81ae4500 t eb_relocate_vma +ffffffff81ae4740 t eb_parse +ffffffff81ae4b20 t eb_relocate_parse_slow +ffffffff81ae5220 t eb_pin_timeline +ffffffff81ae5400 t i915_gem_object_lock +ffffffff81ae5610 t eb_relocate_entry +ffffffff81ae5dd0 t reloc_cache_reset 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intel_gt_sysfs_register +ffffffff81b2e030 T intel_gt_sysfs_unregister +ffffffff81b2f000 T intel_gt_sysfs_pm_init +ffffffff81b30000 T intel_vm_no_concurrent_access_wa +ffffffff81b30050 T alloc_pt_lmem +ffffffff81b300c0 T alloc_pt_dma +ffffffff81b30130 T map_pt_dma +ffffffff81b30190 T map_pt_dma_locked +ffffffff81b301f0 T i915_vm_lock_objects +ffffffff81b30230 t i915_gem_object_lock +ffffffff81b30440 T i915_address_space_fini +ffffffff81b30460 T i915_vm_resv_release +ffffffff81b304a0 T i915_vm_release +ffffffff81b304d0 T i915_address_space_init +ffffffff81b30670 t __i915_vm_release +ffffffff81b30740 T __px_vaddr +ffffffff81b30780 T __px_dma +ffffffff81b307c0 T __px_page +ffffffff81b30800 T fill_page_dma +ffffffff81b308b0 T setup_scratch_page +ffffffff81b30a40 T free_scratch +ffffffff81b30ac0 T gtt_write_workarounds +ffffffff81b30c70 T setup_private_pat +ffffffff81b30f10 T __vm_create_scratch_for_read +ffffffff81b30fc0 T __vm_create_scratch_for_read_pinned +ffffffff81b31130 t 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intel_engine_emit_ctx_wa +ffffffff81b52e30 T intel_gt_init_workarounds +ffffffff81b54020 T intel_gt_apply_workarounds +ffffffff81b54040 t wa_list_apply +ffffffff81b54180 T intel_gt_verify_workarounds +ffffffff81b54300 T intel_engine_init_whitelist +ffffffff81b54c60 T intel_engine_apply_whitelist +ffffffff81b54d60 T intel_engine_init_workarounds +ffffffff81b56a00 T intel_engine_apply_workarounds +ffffffff81b56a20 T intel_engine_verify_workarounds +ffffffff81b57270 t _wa_add +ffffffff81b57490 t gen9_ctx_workarounds_init +ffffffff81b576f0 t gen12_gt_workarounds_init +ffffffff81b57880 t gen9_gt_workarounds_init +ffffffff81b57a00 t xehp_init_mcr +ffffffff81b58000 T uao_create_from_data +ffffffff81b58090 T uao_write +ffffffff81b580b0 T uao_create_from_object +ffffffff81b581a0 T uao_read +ffffffff81b581c0 t __uao_rw +ffffffff81b59000 T intel_engines_add_sysfs +ffffffff81b5a000 T intel_guc_notify +ffffffff81b5a030 T intel_guc_init_send_regs +ffffffff81b5a0d0 T intel_guc_init_early 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intel_guc_ads_print_policy_info +ffffffff81b5c020 T intel_guc_global_policies_update +ffffffff81b5c070 T intel_guc_ads_create +ffffffff81b5c630 T intel_guc_ads_init_late +ffffffff81b5c680 T intel_guc_ads_destroy +ffffffff81b5c6e0 T intel_guc_ads_reset +ffffffff81b5c750 T intel_guc_engine_usage_offset +ffffffff81b5c790 T intel_guc_engine_usage_record_map +ffffffff81b5d000 T intel_guc_capture_getlistsize +ffffffff81b5d020 t guc_capture_getlistsize +ffffffff81b5d300 T intel_guc_capture_getlist +ffffffff81b5dbb0 T intel_guc_capture_getnullheader +ffffffff81b5dc60 T intel_guc_capture_print_engine_node +ffffffff81b5e160 T intel_guc_capture_free_node +ffffffff81b5e1e0 T intel_guc_capture_get_matching_node +ffffffff81b5e360 T intel_guc_capture_process +ffffffff81b5f390 T intel_guc_capture_destroy +ffffffff81b5f6f0 T intel_guc_capture_init +ffffffff81b5fd10 t guc_capture_log_get_register +ffffffff81b600a0 t guc_capture_alloc_steered_lists_xe_hpg +ffffffff81b61000 T intel_guc_ct_init_early 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i915_sw_fence_await_dma_fence +ffffffff81bb4840 t dma_i915_sw_fence_wake +ffffffff81bb48c0 t irq_i915_sw_fence_work +ffffffff81bb4900 t timer_i915_sw_fence_wake +ffffffff81bb49e0 t dma_i915_sw_fence_wake_timer +ffffffff81bb4a70 T __i915_sw_fence_await_dma_fence +ffffffff81bb4bc0 t __dma_i915_sw_fence_wake +ffffffff81bb4c20 T i915_sw_fence_await_reservation +ffffffff81bb4d00 t i915_sw_fence_wake +ffffffff81bb5000 T dma_fence_work_init +ffffffff81bb5080 t fence_notify +ffffffff81bb5170 t fence_work +ffffffff81bb51d0 T dma_fence_work_chain +ffffffff81bb5220 t get_driver_name +ffffffff81bb5250 t get_timeline_name +ffffffff81bb5290 t fence_release +ffffffff81bb6000 T i915_switcheroo_register +ffffffff81bb6030 T i915_switcheroo_unregister +ffffffff81bb7000 T i915_syncmap_init +ffffffff81bb7030 T i915_syncmap_is_later +ffffffff81bb7130 T i915_syncmap_set +ffffffff81bb71e0 t __sync_set +ffffffff81bb74d0 T i915_syncmap_free +ffffffff81bb7530 t __sync_free +ffffffff81bb8000 T i915_setup_sysfs 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intel_vgt_deballoon +ffffffff81bbc3c0 T intel_vgt_balloon +ffffffff81bbd000 T i915_vma_instance +ffffffff81bbd5b0 T i915_vma_work +ffffffff81bbd620 T i915_vma_wait_for_bind +ffffffff81bbd6a0 T i915_vma_bind +ffffffff81bbd9f0 T i915_vma_pin_iomap +ffffffff81bbdbc0 T i915_vma_flush_writes +ffffffff81bbdc30 T i915_vma_unpin_iomap +ffffffff81bbdcc0 T i915_vma_unpin_and_release +ffffffff81bbdd30 T i915_vma_misplaced +ffffffff81bbddd0 T __i915_vma_set_map_and_fenceable +ffffffff81bbde50 T i915_gem_valid_gtt_space +ffffffff81bbdee0 T vma_invalidate_tlb +ffffffff81bbdf20 T i915_vma_pin_ww +ffffffff81bbe940 T i915_ggtt_pin +ffffffff81bbea20 t __i915_ggtt_pin +ffffffff81bbeb80 t i915_gem_object_lock +ffffffff81bbed90 T i915_vma_close +ffffffff81bbee60 T i915_vma_reopen +ffffffff81bbeee0 T i915_vma_destroy_locked +ffffffff81bbefd0 t release_references +ffffffff81bbf100 T i915_vma_destroy +ffffffff81bbf240 T i915_vma_parked +ffffffff81bbf520 T i915_vma_revoke_mmap +ffffffff81bbf620 T _i915_vma_move_to_active +ffffffff81bbf850 T __i915_vma_evict +ffffffff81bbfbc0 T __i915_vma_unbind +ffffffff81bbfc60 T i915_vma_unbind +ffffffff81bbfdb0 T i915_vma_unbind_async +ffffffff81bbffa0 T i915_vma_unbind_unlocked +ffffffff81bc00b0 T i915_vma_make_unshrinkable +ffffffff81bc00f0 T i915_vma_make_shrinkable +ffffffff81bc0110 T i915_vma_make_purgeable +ffffffff81bc0130 T i915_vma_module_exit +ffffffff81bc0150 T i915_vma_module_init +ffffffff81bc01b0 t __i915_vma_active +ffffffff81bc0200 t __i915_vma_retire +ffffffff81bc0250 t __vma_bind +ffffffff81bc02f0 t __vma_release +ffffffff81bc0370 t intel_rotate_pages +ffffffff81bc06b0 t intel_remap_pages +ffffffff81bc0a70 t intel_partial_pages +ffffffff81bc1000 T i915_vma_resource_alloc +ffffffff81bc1050 T i915_vma_resource_free +ffffffff81bc1090 T i915_vma_resource_unhold +ffffffff81bc10a0 t __i915_vma_resource_unhold +ffffffff81bc1190 T i915_vma_resource_hold +ffffffff81bc11e0 T i915_vma_resource_unbind +ffffffff81bc1310 T __i915_vma_resource_init +ffffffff81bc1370 t i915_vma_resource_fence_notify +ffffffff81bc1440 T i915_vma_resource_bind_dep_sync +ffffffff81bc15c0 T i915_vma_resource_bind_dep_sync_all +ffffffff81bc1660 T i915_vma_resource_bind_dep_await +ffffffff81bc1800 T i915_vma_resource_module_exit +ffffffff81bc1820 T i915_vma_resource_module_init +ffffffff81bc1880 t get_driver_name +ffffffff81bc18b0 t get_timeline_name +ffffffff81bc18e0 t unbind_fence_release +ffffffff81bc1920 t i915_vma_resource_unbind_work +ffffffff81bc2000 T intel_platform_name +ffffffff81bc20a0 T intel_device_info_print +ffffffff81bc2d30 T intel_device_info_subplatform_init +ffffffff81bc3090 T intel_device_info_runtime_init +ffffffff81bc3770 T intel_driver_caps_print +ffffffff81bc4000 T intel_dram_detect +ffffffff81bc4480 t skl_get_dram_info +ffffffff81bc4660 T intel_dram_edram_detect +ffffffff81bc46f0 t icl_pcode_read_mem_global_info +ffffffff81bc47d0 t skl_dram_get_channel_info +ffffffff81bc49a0 t skl_dram_get_dimm_info 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cfl_init_clock_gating +ffffffff81bcc7e0 t gen9_init_clock_gating +ffffffff81bcc8f0 t skl_init_clock_gating +ffffffff81bcca30 t kbl_init_clock_gating +ffffffff81bccc40 t bxt_init_clock_gating +ffffffff81bccda0 t glk_init_clock_gating +ffffffff81bcce00 t bdw_init_clock_gating +ffffffff81bcd250 t chv_init_clock_gating +ffffffff81bcd400 t hsw_init_clock_gating +ffffffff81bcd550 t ivb_init_clock_gating +ffffffff81bcd760 t g4x_disable_trickle_feed +ffffffff81bcd8c0 t cpt_init_clock_gating +ffffffff81bcdbf0 t vlv_init_clock_gating +ffffffff81bcdd00 t gen6_init_clock_gating +ffffffff81bcdf00 t ilk_init_clock_gating +ffffffff81bce0d0 t g4x_init_clock_gating +ffffffff81bce190 t i965gm_init_clock_gating +ffffffff81bce260 t i965g_init_clock_gating +ffffffff81bce2e0 t gen3_init_clock_gating +ffffffff81bce3e0 t i85x_init_clock_gating +ffffffff81bce480 t i830_init_clock_gating +ffffffff81bce4b0 t nop_init_clock_gating +ffffffff81bce4e0 t ilk_compute_pipe_wm +ffffffff81bce960 t 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fw_domains_get_with_fallback +ffffffff81be02d0 t fw_domain_wait_ack_with_fallback +ffffffff81be0550 t fw_domains_get_normal +ffffffff81be0880 t ___force_wake_auto +ffffffff81be0910 t __gen6_gt_wait_for_fifo +ffffffff81be1000 T __intel_wakeref_get_first +ffffffff81be10a0 T __intel_wakeref_put_last +ffffffff81be1100 t ____intel_wakeref_put_last +ffffffff81be11e0 T __intel_wakeref_init +ffffffff81be1260 t __intel_wakeref_put_work +ffffffff81be12d0 T intel_wakeref_wait_for_idle +ffffffff81be1410 T intel_wakeref_auto_init +ffffffff81be1490 t wakeref_auto_timeout +ffffffff81be1540 T intel_wakeref_auto +ffffffff81be1740 T intel_wakeref_auto_fini +ffffffff81be1800 t __delayed_work_tick +ffffffff81be2000 T intel_wopcm_init_early +ffffffff81be2080 T intel_wopcm_init +ffffffff81be3000 T vlv_iosf_sb_get +ffffffff81be3020 T vlv_iosf_sb_put +ffffffff81be3040 T vlv_punit_read +ffffffff81be3090 t vlv_sideband_rw +ffffffff81be3240 T vlv_punit_write +ffffffff81be3290 T vlv_bunit_read +ffffffff81be32e0 T vlv_bunit_write +ffffffff81be3330 T vlv_nc_read +ffffffff81be3380 T vlv_iosf_sb_read +ffffffff81be33d0 T vlv_iosf_sb_write +ffffffff81be3420 T vlv_cck_read +ffffffff81be3470 T vlv_cck_write +ffffffff81be34c0 T vlv_ccu_read +ffffffff81be3510 T vlv_ccu_write +ffffffff81be3560 T vlv_dpio_read +ffffffff81be3630 T vlv_dpio_write +ffffffff81be36a0 T vlv_flisdsi_read +ffffffff81be36f0 T vlv_flisdsi_write +ffffffff81be4000 T vlv_suspend_complete +ffffffff81be4a50 T vlv_resume_prepare +ffffffff81be5490 T vlv_suspend_init +ffffffff81be5500 T vlv_suspend_cleanup +ffffffff81be5560 t vlv_wait_for_pw_status +ffffffff81be6000 T atom_execute_table_scratch_unlocked +ffffffff81be60a0 t atom_execute_table_locked +ffffffff81be63d0 T atom_execute_table +ffffffff81be6480 T atom_parse +ffffffff81be6660 T atom_destroy +ffffffff81be66a0 T atom_asic_init +ffffffff81be68b0 T atom_parse_data_header +ffffffff81be6950 T atom_parse_cmd_header +ffffffff81be69d0 T atom_allocate_fb_scratch +ffffffff81be6aa0 t atom_op_move +ffffffff81be6c80 t atom_op_and +ffffffff81be6e60 t atom_op_or +ffffffff81be7040 t atom_op_shift_left +ffffffff81be7230 t atom_op_shift_right +ffffffff81be7420 t atom_op_mul +ffffffff81be7570 t atom_op_div +ffffffff81be76e0 t atom_op_add +ffffffff81be78c0 t atom_op_sub +ffffffff81be7aa0 t atom_op_setport +ffffffff81be7c20 t atom_op_setregblock +ffffffff81be7ce0 t atom_op_setfbbase +ffffffff81be7db0 t atom_op_compare +ffffffff81be7fa0 t atom_op_switch +ffffffff81be81f0 t atom_op_jump +ffffffff81be8470 t atom_op_test +ffffffff81be8630 t atom_op_delay +ffffffff81be8710 t atom_op_calltable +ffffffff81be8860 t atom_op_repeat +ffffffff81be8890 t atom_op_clear +ffffffff81be89a0 t atom_op_nop +ffffffff81be89d0 t atom_op_eot +ffffffff81be8a00 t atom_op_mask +ffffffff81be8cd0 t atom_op_postcard +ffffffff81be8d80 t atom_op_beep +ffffffff81be8da0 t atom_op_savereg +ffffffff81be8dd0 t atom_op_restorereg +ffffffff81be8e00 t atom_op_setdatablock +ffffffff81be8f40 t atom_op_xor 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radeon_atom_encoder_dpms_dig +ffffffff81bf4fc0 t radeon_atom_dac_detect +ffffffff81bf51b0 t radeon_atom_ext_dpms +ffffffff81bf51e0 t radeon_atom_ext_prepare +ffffffff81bf5210 t radeon_atom_ext_commit +ffffffff81bf5240 t radeon_atom_ext_mode_set +ffffffff81bf5270 t radeon_atom_ext_disable +ffffffff81bf6000 T radeon_atom_hw_i2c_xfer +ffffffff81bf6160 t radeon_process_i2c_ch +ffffffff81bf6330 T radeon_atom_hw_i2c_func +ffffffff81bf7000 T btc_get_max_clock_from_voltage_dependency_table +ffffffff81bf70d0 T btc_apply_voltage_dependency_rules +ffffffff81bf7140 T btc_skip_blacklist_clocks +ffffffff81bf7240 T btc_adjust_clock_combinations +ffffffff81bf7350 T btc_apply_voltage_delta_rules +ffffffff81bf7480 T btc_program_mgcg_hw_sequence +ffffffff81bf7580 T btc_dpm_enabled +ffffffff81bf7590 T btc_notify_uvd_to_smc +ffffffff81bf7600 T btc_reset_to_default +ffffffff81bf7650 T btc_read_arb_registers +ffffffff81bf76e0 T btc_dpm_vblank_too_short +ffffffff81bf7750 T btc_dpm_pre_set_power_state +ffffffff81bf8630 T btc_dpm_set_power_state +ffffffff81bf8a40 T btc_dpm_post_set_power_state +ffffffff81bf8b60 T btc_dpm_enable +ffffffff81bf9d70 T btc_dpm_disable +ffffffff81bfa2a0 T btc_dpm_setup_asic +ffffffff81bfa380 T btc_dpm_init +ffffffff81bfa780 T btc_dpm_fini +ffffffff81bfa830 T btc_dpm_debugfs_print_current_performance_level +ffffffff81bfa880 T btc_dpm_get_current_sclk +ffffffff81bfa900 T btc_dpm_get_current_mclk +ffffffff81bfa980 T btc_dpm_get_sclk +ffffffff81bfa9d0 T btc_dpm_get_mclk +ffffffff81bfb000 T ci_dpm_powergate_uvd +ffffffff81bfb380 T ci_dpm_vblank_too_short +ffffffff81bfb410 T ci_fan_ctrl_get_fan_speed_percent +ffffffff81bfb4b0 T ci_fan_ctrl_set_fan_speed_percent +ffffffff81bfb580 T ci_fan_ctrl_set_mode +ffffffff81bfb710 t ci_fan_ctrl_set_static_mode +ffffffff81bfb7d0 t ci_thermal_start_smc_fan_control +ffffffff81bfba10 T ci_fan_ctrl_get_mode +ffffffff81bfba70 T ci_dpm_force_performance_level +ffffffff81bfc330 t ci_upload_dpm_level_enable_mask +ffffffff81bfc660 T ci_dpm_pre_set_power_state +ffffffff81bfc960 T ci_dpm_post_set_power_state +ffffffff81bfca30 T ci_dpm_setup_asic +ffffffff81bfcc30 T ci_dpm_enable +ffffffff81c00a60 t ci_enable_didt +ffffffff81c00d00 t ci_enable_power_containment +ffffffff81c011a0 T ci_dpm_late_enable +ffffffff81c01390 T ci_dpm_disable +ffffffff81c01a90 T ci_dpm_set_power_state +ffffffff81c02c10 T ci_dpm_display_configuration_changed +ffffffff81c02db0 T ci_dpm_fini +ffffffff81c02e60 T ci_dpm_init +ffffffff81c04530 T ci_dpm_debugfs_print_current_performance_level +ffffffff81c04670 T ci_dpm_print_power_state +ffffffff81c04730 T ci_dpm_get_current_sclk +ffffffff81c04800 T ci_dpm_get_current_mclk +ffffffff81c048d0 T ci_dpm_get_sclk +ffffffff81c04920 T ci_dpm_get_mclk +ffffffff81c04970 t ci_populate_all_graphic_levels +ffffffff81c04ef0 t ci_populate_all_memory_levels +ffffffff81c05800 t ci_do_program_memory_timing_parameters +ffffffff81c05a20 t ci_populate_smc_voltage_table +ffffffff81c05b80 t ci_enable_sclk_mclk_dpm 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+ffffffff81c0d040 t cik_disable_interrupt_state +ffffffff81c0d500 T cik_irq_process +ffffffff81c0ecb0 t cik_irq_ack +ffffffff81c0f630 T cik_resume +ffffffff81c0f6c0 t cik_init_golden_registers +ffffffff81c0f880 t cik_startup +ffffffff81c155d0 T cik_suspend +ffffffff81c159c0 T cik_init +ffffffff81c161b0 t cik_init_microcode +ffffffff81c171c0 t cik_pcie_gart_fini +ffffffff81c172c0 T cik_fini +ffffffff81c17660 T dce8_program_fmt +ffffffff81c17790 T dce8_bandwidth_update +ffffffff81c183b0 T cik_get_gpu_clock_counter +ffffffff81c18480 T cik_set_uvd_clocks +ffffffff81c18500 t cik_set_uvd_clock +ffffffff81c18670 T cik_set_vce_clocks +ffffffff81c188b0 t cik_wait_for_rlc_serdes +ffffffff81c18a80 t radeon_bo_reserve +ffffffff81c18c00 t radeon_bo_unreserve +ffffffff81c18ce0 t cik_update_gfx_pg +ffffffff81c18e80 t cik_compute_stop +ffffffff81c18ff0 t cik_cp_compute_fini +ffffffff81c19190 t dce8_latency_watermark +ffffffff81c1a000 T cik_sdma_get_rptr +ffffffff81c1a070 T cik_sdma_get_wptr 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cypress_advertise_gen2_capability +ffffffff81c1d440 T cypress_notify_link_speed_change_after_state_change +ffffffff81c1d500 T cypress_notify_link_speed_change_before_state_change +ffffffff81c1d5c0 T cypress_get_strobe_mode_settings +ffffffff81c1d6c0 T cypress_get_mclk_frequency_ratio +ffffffff81c1d770 T cypress_map_clkf_to_ibias +ffffffff81c1d830 T cypress_convert_power_level_to_smc +ffffffff81c1dbf0 t cypress_populate_mclk_value +ffffffff81c1dfc0 T cypress_upload_sw_state +ffffffff81c1e140 T cypress_upload_mc_reg_table +ffffffff81c1e200 t cypress_convert_mc_reg_table_to_smc +ffffffff81c1e4a0 T cypress_calculate_burst_time +ffffffff81c1e530 T cypress_program_memory_timing_parameters +ffffffff81c1e6e0 T cypress_populate_smc_initial_state +ffffffff81c1ea80 T cypress_populate_smc_acpi_state +ffffffff81c1ee10 T cypress_construct_voltage_tables +ffffffff81c1eec0 t cypress_trim_voltage_table_to_fit_state_table +ffffffff81c1f0b0 T cypress_populate_smc_voltage_tables +ffffffff81c1f200 T cypress_get_mvdd_configuration +ffffffff81c1f2c0 T cypress_populate_mc_reg_table +ffffffff81c1f520 T cypress_get_table_locations +ffffffff81c1f600 T cypress_enable_display_gap +ffffffff81c1f660 T cypress_dpm_setup_asic +ffffffff81c1f750 T cypress_dpm_enable +ffffffff81c20230 t cypress_force_mc_use_s1 +ffffffff81c204b0 t cypress_gfx_clock_gating_enable +ffffffff81c207c0 t cypress_mg_clock_gating_enable +ffffffff81c20a40 T cypress_dpm_disable +ffffffff81c20c70 T cypress_dpm_set_power_state +ffffffff81c20f20 T cypress_dpm_display_configuration_changed +ffffffff81c21000 T cypress_dpm_init +ffffffff81c21270 T cypress_dpm_fini +ffffffff81c21300 T cypress_dpm_vblank_too_short +ffffffff81c21370 t cypress_wait_for_mc_sequencer +ffffffff81c22000 T dce3_2_afmt_hdmi_write_speaker_allocation +ffffffff81c22070 T dce3_2_afmt_dp_write_speaker_allocation +ffffffff81c220e0 T dce3_2_afmt_write_sad_regs +ffffffff81c22200 T dce3_2_audio_set_dto +ffffffff81c22340 T dce3_2_hdmi_update_acr +ffffffff81c226a0 T dce3_2_set_audio_packet +ffffffff81c22830 T dce3_2_set_mute +ffffffff81c23000 T dce6_endpoint_rreg +ffffffff81c230e0 T dce6_endpoint_wreg +ffffffff81c231d0 T dce6_audio_get_pin +ffffffff81c23340 T dce6_afmt_select_pin +ffffffff81c233d0 T dce6_afmt_write_latency_fields +ffffffff81c23490 T dce6_afmt_hdmi_write_speaker_allocation +ffffffff81c23560 T dce6_afmt_dp_write_speaker_allocation +ffffffff81c23630 T dce6_afmt_write_sad_regs +ffffffff81c23770 T dce6_audio_enable +ffffffff81c237c0 T dce6_hdmi_audio_set_dto +ffffffff81c23830 T dce6_dp_audio_set_dto +ffffffff81c24000 T eg_cg_rreg +ffffffff81c24080 t r100_mm_rreg +ffffffff81c240d0 T eg_cg_wreg +ffffffff81c24140 T eg_pif_phy0_rreg +ffffffff81c241c0 T eg_pif_phy0_wreg +ffffffff81c24220 T eg_pif_phy1_rreg +ffffffff81c242a0 T eg_pif_phy1_wreg +ffffffff81c24300 T evergreen_get_allowed_info_register +ffffffff81c24390 T evergreen_tiling_fields +ffffffff81c24430 T sumo_set_uvd_clocks +ffffffff81c24510 t sumo_set_uvd_clock +ffffffff81c246d0 T evergreen_set_uvd_clocks +ffffffff81c24c70 T evergreen_fix_pci_max_read_req_size +ffffffff81c24e20 T dce4_program_fmt +ffffffff81c24f40 T dce4_wait_for_vblank +ffffffff81c251c0 T evergreen_page_flip +ffffffff81c25350 T evergreen_page_flip_pending +ffffffff81c253c0 T evergreen_get_temp +ffffffff81c25490 T sumo_get_temp +ffffffff81c254e0 T sumo_pm_init_profile +ffffffff81c25620 T btc_pm_init_profile +ffffffff81c25730 T evergreen_pm_misc +ffffffff81c258d0 T evergreen_pm_prepare +ffffffff81c259d0 T evergreen_pm_finish +ffffffff81c25ad0 T evergreen_hpd_sense +ffffffff81c25b40 T evergreen_hpd_set_polarity +ffffffff81c25c80 T evergreen_hpd_init +ffffffff81c25d50 T evergreen_hpd_fini +ffffffff81c25df0 T evergreen_get_number_of_dram_channels +ffffffff81c25e40 T evergreen_bandwidth_update +ffffffff81c26000 t evergreen_line_buffer_adjust +ffffffff81c26200 t evergreen_program_watermarks +ffffffff81c26cb0 T evergreen_mc_wait_for_idle +ffffffff81c26d50 T evergreen_pcie_gart_tlb_flush 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evergreen_init_golden_registers +ffffffff81c2c090 t evergreen_startup +ffffffff81c2e720 T evergreen_suspend +ffffffff81c2e8c0 T evergreen_init +ffffffff81c2ede0 T evergreen_fini +ffffffff81c2efd0 T evergreen_pcie_gen2_enable +ffffffff81c2f200 T evergreen_program_aspm +ffffffff81c2f8a0 t evergreen_latency_watermark +ffffffff81c30000 T evergreen_cs_parse +ffffffff81c328c0 T evergreen_dma_cs_parse +ffffffff81c33b00 T evergreen_ib_parse +ffffffff81c33fb0 T evergreen_dma_ib_parse +ffffffff81c34170 t evergreen_cs_track_check +ffffffff81c35190 t evergreen_cs_handle_reg +ffffffff81c370d0 t evergreen_surface_value_conv_check +ffffffff81c373b0 t evergreen_surface_check +ffffffff81c37850 t evergreen_cs_track_validate_htile +ffffffff81c37af0 t evergreen_vm_reg_valid +ffffffff81c38000 T evergreen_dma_fence_ring_emit +ffffffff81c382c0 T evergreen_dma_ring_ib_execute +ffffffff81c38600 T evergreen_copy_dma +ffffffff81c389b0 T evergreen_dma_is_lockup +ffffffff81c39000 T dce4_audio_enable +ffffffff81c39080 T evergreen_hdmi_update_acr +ffffffff81c392a0 T dce4_afmt_write_latency_fields +ffffffff81c39310 T dce4_afmt_hdmi_write_speaker_allocation +ffffffff81c39380 T dce4_afmt_dp_write_speaker_allocation +ffffffff81c393f0 T evergreen_hdmi_write_sad_regs +ffffffff81c39510 T evergreen_set_avi_packet +ffffffff81c396b0 T dce4_hdmi_audio_set_dto +ffffffff81c39790 T dce4_dp_audio_set_dto +ffffffff81c39880 T dce4_set_vbi_packet +ffffffff81c398f0 T dce4_hdmi_set_color_depth +ffffffff81c39a40 T dce4_set_audio_packet +ffffffff81c39c50 T dce4_set_mute +ffffffff81c39d60 T evergreen_hdmi_enable +ffffffff81c3a090 T evergreen_dp_enable +ffffffff81c3b000 T kv_dpm_enable_bapm +ffffffff81c3b070 T kv_dpm_enable +ffffffff81c3c5c0 t kv_enable_didt +ffffffff81c3c860 T kv_dpm_late_enable +ffffffff81c3ca50 T kv_dpm_powergate_uvd +ffffffff81c3cbc0 T kv_dpm_disable +ffffffff81c3cf30 T kv_dpm_force_performance_level +ffffffff81c3d0c0 t kv_force_dpm_lowest +ffffffff81c3d190 T kv_dpm_pre_set_power_state +ffffffff81c3d720 T kv_dpm_set_power_state +ffffffff81c3ded0 t kv_set_valid_clock_range +ffffffff81c3e090 t kv_calculate_ds_divider +ffffffff81c3e200 t kv_calculate_nbps_level_settings +ffffffff81c3e390 t kv_update_vce_dpm +ffffffff81c3e570 T kv_dpm_post_set_power_state +ffffffff81c3e610 T kv_dpm_setup_asic +ffffffff81c3e670 T kv_dpm_init +ffffffff81c3ef10 T kv_dpm_debugfs_print_current_performance_level +ffffffff81c3ef80 T kv_dpm_get_current_sclk +ffffffff81c3eff0 T kv_dpm_get_current_mclk +ffffffff81c3f020 T kv_dpm_print_power_state +ffffffff81c3f0c0 T kv_dpm_fini +ffffffff81c3f160 T kv_dpm_display_configuration_changed +ffffffff81c3f190 T kv_dpm_get_sclk +ffffffff81c3f1e0 T kv_dpm_get_mclk +ffffffff81c40000 T kv_notify_message_to_smu +ffffffff81c400c0 T kv_dpm_get_enable_mask +ffffffff81c401a0 T kv_send_msg_to_smc_with_parameter +ffffffff81c40270 T kv_read_smc_sram_dword +ffffffff81c40300 T kv_smc_dpm_enable +ffffffff81c40430 T kv_smc_bapm_enable +ffffffff81c40560 T kv_copy_bytes_to_smc +ffffffff81c41000 T tn_smc_rreg +ffffffff81c41080 T tn_smc_wreg +ffffffff81c410f0 T ni_mc_load_microcode +ffffffff81c412e0 T ni_init_microcode +ffffffff81c41820 T cayman_get_allowed_info_register +ffffffff81c418b0 T tn_get_temp +ffffffff81c41940 T cayman_pcie_gart_tlb_flush +ffffffff81c41990 T cayman_cp_int_cntl_setup +ffffffff81c419e0 T cayman_fence_ring_emit +ffffffff81c41d90 T cayman_ring_ib_execute +ffffffff81c42210 T cayman_gfx_get_rptr +ffffffff81c422a0 T cayman_gfx_get_wptr +ffffffff81c42310 T cayman_gfx_set_wptr +ffffffff81c42390 T cayman_gpu_check_soft_reset +ffffffff81c42510 T cayman_asic_reset +ffffffff81c42810 T cayman_gfx_is_lockup +ffffffff81c42880 T cayman_resume +ffffffff81c42910 t ni_init_golden_registers +ffffffff81c429f0 t cayman_startup +ffffffff81c45120 T cayman_suspend +ffffffff81c45310 T cayman_init +ffffffff81c45910 T cayman_fini +ffffffff81c45b90 T cayman_vm_init +ffffffff81c45bf0 T cayman_vm_fini +ffffffff81c45c20 T cayman_vm_decode_fault +ffffffff81c45cb0 T cayman_vm_flush +ffffffff81c46130 T tn_set_vce_clocks +ffffffff81c47000 T cayman_dma_get_rptr +ffffffff81c47070 T cayman_dma_get_wptr +ffffffff81c470c0 T cayman_dma_set_wptr +ffffffff81c47110 T cayman_dma_ring_ib_execute +ffffffff81c474a0 T cayman_dma_stop +ffffffff81c47550 T cayman_dma_resume +ffffffff81c477a0 T cayman_dma_fini +ffffffff81c47860 T cayman_dma_is_lockup +ffffffff81c478e0 T cayman_dma_vm_copy_pages +ffffffff81c479d0 T cayman_dma_vm_write_pages +ffffffff81c47b30 T cayman_dma_vm_set_pages +ffffffff81c47c90 T cayman_dma_vm_pad_ib +ffffffff81c47ce0 T cayman_dma_vm_flush +ffffffff81c49000 T ni_get_pi +ffffffff81c49030 T ni_get_ps +ffffffff81c49060 T ni_dpm_vblank_too_short +ffffffff81c490d0 T ni_dpm_force_performance_level +ffffffff81c49220 T ni_copy_and_switch_arb_sets +ffffffff81c49500 T ni_set_uvd_clock_before_set_eng_clock +ffffffff81c49580 T ni_set_uvd_clock_after_set_eng_clock +ffffffff81c49600 T ni_dpm_setup_asic +ffffffff81c49810 T ni_update_current_ps +ffffffff81c498d0 T ni_update_requested_ps +ffffffff81c49990 T ni_dpm_enable +ffffffff81c4cbd0 t ni_populate_smc_tdp_limits +ffffffff81c4cd90 T ni_dpm_disable +ffffffff81c4d150 T ni_dpm_pre_set_power_state +ffffffff81c4d730 T ni_dpm_set_power_state +ffffffff81c4e850 T ni_dpm_post_set_power_state +ffffffff81c4e920 T ni_dpm_init +ffffffff81c4f2f0 T ni_dpm_fini +ffffffff81c4f3a0 T ni_dpm_print_power_state +ffffffff81c4f470 T ni_dpm_debugfs_print_current_performance_level +ffffffff81c4f4b0 T ni_dpm_get_current_sclk +ffffffff81c4f520 T ni_dpm_get_current_mclk +ffffffff81c4f590 T ni_dpm_get_sclk +ffffffff81c4f5f0 T ni_dpm_get_mclk +ffffffff81c4f650 t ni_do_program_memory_timing_parameters +ffffffff81c4f780 t ni_calculate_sclk_params +ffffffff81c4f9a0 t ni_calculate_power_boost_limit +ffffffff81c4fb50 t ni_populate_mclk_value +ffffffff81c50000 T r100_wait_for_vblank +ffffffff81c501a0 T r100_page_flip +ffffffff81c50450 T r100_page_flip_pending +ffffffff81c50500 T r100_pm_get_dynpm_state +ffffffff81c50720 T r100_pm_init_profile +ffffffff81c50800 T r100_pm_misc +ffffffff81c50c40 T r100_pm_prepare +ffffffff81c50d00 T r100_pm_finish +ffffffff81c50dc0 T r100_gui_idle +ffffffff81c50e00 T r100_hpd_sense +ffffffff81c50e60 T r100_hpd_set_polarity +ffffffff81c50f20 T r100_hpd_init +ffffffff81c50fc0 T r100_hpd_fini +ffffffff81c51020 T r100_pci_gart_tlb_flush +ffffffff81c51050 T r100_pci_gart_init +ffffffff81c51120 T r100_pci_gart_get_page_entry +ffffffff81c51150 T r100_pci_gart_set_page +ffffffff81c51190 T r100_pci_gart_enable +ffffffff81c51280 T r100_pci_gart_disable +ffffffff81c51300 T r100_pci_gart_fini +ffffffff81c51380 T r100_irq_set +ffffffff81c51460 T r100_irq_disable +ffffffff81c514d0 T r100_irq_process +ffffffff81c517d0 T r100_get_vblank_counter +ffffffff81c51820 T r100_fence_ring_emit +ffffffff81c51c90 T r100_semaphore_ring_emit +ffffffff81c51cc0 T r100_copy_blit +ffffffff81c52360 T r100_ring_start +ffffffff81c52450 T r100_gfx_get_rptr +ffffffff81c524b0 T r100_gfx_get_wptr +ffffffff81c524f0 T r100_gfx_set_wptr +ffffffff81c52530 T r100_cp_init +ffffffff81c52a60 T r100_debugfs_cp_init +ffffffff81c52a90 T r100_cp_fini +ffffffff81c52b30 T r100_cp_disable +ffffffff81c52c70 T r100_gui_wait_for_idle +ffffffff81c52d60 T r100_reloc_pitch_offset +ffffffff81c52e90 T r100_packet3_load_vbpntr +ffffffff81c53130 T r100_cs_parse_packet0 +ffffffff81c53240 T r100_cs_packet_parse_vline +ffffffff81c53430 T r100_cs_track_check_pkt3_indx_buffer +ffffffff81c534b0 T r100_cs_parse +ffffffff81c54970 T r100_cs_track_clear +ffffffff81c54d00 T r100_cs_track_check +ffffffff81c556f0 T r100_mc_wait_for_idle +ffffffff81c55790 T r100_gpu_is_lockup +ffffffff81c557f0 T r100_enable_bm +ffffffff81c55840 T r100_bm_disable +ffffffff81c558f0 T r100_asic_reset +ffffffff81c55c20 T r100_mc_stop +ffffffff81c55de0 T r100_mc_resume +ffffffff81c55ea0 T r100_set_common_regs +ffffffff81c56050 T r100_vram_init_sizes +ffffffff81c56240 T r100_vga_set_state +ffffffff81c562a0 T r100_pll_errata_after_index +ffffffff81c562e0 T r100_pll_rreg +ffffffff81c56410 T r100_pll_wreg +ffffffff81c56520 T r100_debugfs_rbbm_init +ffffffff81c56550 T r100_debugfs_mc_info_init +ffffffff81c56580 T r100_set_surface_reg +ffffffff81c56790 T r100_clear_surface_reg +ffffffff81c56840 T r100_bandwidth_update +ffffffff81c572f0 T r100_ring_test +ffffffff81c575b0 T r100_ring_ib_execute +ffffffff81c57810 T r100_ib_test +ffffffff81c57b50 T r100_vga_render_disable +ffffffff81c57bb0 T r100_resume +ffffffff81c57db0 t r100_startup +ffffffff81c582e0 T r100_suspend +ffffffff81c583c0 T r100_fini +ffffffff81c584d0 T r100_restore_sanity +ffffffff81c58570 T r100_init +ffffffff81c58af0 T r100_mm_rreg_slow +ffffffff81c58b70 T r100_mm_wreg_slow +ffffffff81c58bd0 T r100_io_rreg +ffffffff81c58c70 T r100_io_wreg +ffffffff81c58ce0 t r100_cs_track_texture_print +ffffffff81c59000 T r200_copy_dma +ffffffff81c59470 T r200_packet0_check +ffffffff81c5a490 T r200_set_safe_registers +ffffffff81c5b000 T rv370_pcie_rreg +ffffffff81c5b080 T rv370_pcie_wreg +ffffffff81c5b0f0 T rv370_pcie_gart_tlb_flush +ffffffff81c5b2f0 T rv370_pcie_gart_get_page_entry +ffffffff81c5b350 T rv370_pcie_gart_set_page +ffffffff81c5b390 T rv370_pcie_gart_init +ffffffff81c5b460 T rv370_pcie_gart_enable +ffffffff81c5b7c0 T rv370_pcie_gart_disable +ffffffff81c5b940 T rv370_pcie_gart_fini +ffffffff81c5b970 T r300_fence_ring_emit +ffffffff81c5bf00 T r300_ring_start +ffffffff81c5c910 T r300_mc_wait_for_idle +ffffffff81c5c9b0 T r300_asic_reset +ffffffff81c5cbd0 T r300_mc_init +ffffffff81c5cc80 T rv370_set_pcie_lanes +ffffffff81c5ce40 T rv370_get_pcie_lanes +ffffffff81c5cef0 T r300_cs_parse +ffffffff81c5d260 t r300_packet0_check +ffffffff81c5e0c0 T r300_set_reg_safe +ffffffff81c5e100 T r300_mc_program +ffffffff81c5e280 T r300_clock_startup +ffffffff81c5e310 T r300_resume +ffffffff81c5e4e0 t r300_startup +ffffffff81c5e840 T r300_suspend +ffffffff81c5e8c0 T r300_fini +ffffffff81c5e9a0 T r300_init +ffffffff81c5f000 T r420_pm_init_profile +ffffffff81c5f0f0 T r420_pipes_init +ffffffff81c5f2d0 T r420_mc_rreg +ffffffff81c5f350 T r420_mc_wreg +ffffffff81c5f3c0 T r420_resume +ffffffff81c5f5a0 t r420_startup +ffffffff81c5f940 T r420_suspend +ffffffff81c5fae0 T r420_fini +ffffffff81c5fbc0 T r420_init +ffffffff81c5fe40 T r420_debugfs_pipes_info_init +ffffffff81c60000 T r520_mc_wait_for_idle +ffffffff81c600a0 T r520_resume +ffffffff81c601a0 t r520_startup +ffffffff81c60590 T r520_init +ffffffff81c61000 T r600_rcu_rreg +ffffffff81c61080 T r600_rcu_wreg +ffffffff81c610f0 T r600_uvd_ctx_rreg +ffffffff81c61170 T r600_uvd_ctx_wreg +ffffffff81c611e0 T r600_get_allowed_info_register +ffffffff81c61260 T r600_get_xclk +ffffffff81c61290 T r600_set_uvd_clocks +ffffffff81c617f0 T dce3_program_fmt +ffffffff81c61910 T rv6xx_get_temp +ffffffff81c61960 T r600_pm_get_dynpm_state +ffffffff81c61d60 T rs780_pm_init_profile +ffffffff81c61e70 T r600_pm_init_profile +ffffffff81c62110 T r600_pm_misc +ffffffff81c621f0 T r600_gui_idle +ffffffff81c62230 T r600_hpd_sense +ffffffff81c62350 T r600_hpd_set_polarity +ffffffff81c625c0 T r600_hpd_init +ffffffff81c627d0 T r600_hpd_fini +ffffffff81c62980 T r600_pcie_gart_tlb_flush +ffffffff81c62ac0 T r600_pcie_gart_init +ffffffff81c62b60 T r600_mc_wait_for_idle +ffffffff81c62c00 T rs780_mc_rreg +ffffffff81c62ca0 T rs780_mc_wreg +ffffffff81c62d30 T r600_vram_scratch_init +ffffffff81c62e30 t radeon_bo_reserve +ffffffff81c62fb0 t radeon_bo_unreserve +ffffffff81c63090 T r600_vram_scratch_fini +ffffffff81c63110 T r600_set_bios_scratch_engine_hung +ffffffff81c63160 T r600_gpu_check_soft_reset +ffffffff81c634e0 T r600_asic_reset +ffffffff81c63870 t r600_gpu_pci_config_reset +ffffffff81c63a90 T r600_gfx_is_lockup +ffffffff81c63b00 T r6xx_remap_render_backend +ffffffff81c63cf0 T r600_count_pipe_bits +ffffffff81c63d60 T r600_pciep_rreg +ffffffff81c63de0 T r600_pciep_wreg +ffffffff81c63e50 T r600_cp_stop +ffffffff81c63ed0 T r600_init_microcode +ffffffff81c643a0 T r600_gfx_get_rptr +ffffffff81c64400 T r600_gfx_get_wptr +ffffffff81c64440 T r600_gfx_set_wptr +ffffffff81c64480 T r600_cp_start +ffffffff81c64800 T r600_cp_resume +ffffffff81c64b60 T r600_ring_init +ffffffff81c64c00 T r600_cp_fini +ffffffff81c64c90 T r600_scratch_init +ffffffff81c64d00 T r600_ring_test +ffffffff81c64fb0 T r600_fence_ring_emit +ffffffff81c65870 T r600_semaphore_ring_emit +ffffffff81c65a60 T r600_copy_cpdma +ffffffff81c66020 T r600_set_surface_reg +ffffffff81c66050 T r600_clear_surface_reg +ffffffff81c66080 T r600_vga_set_state +ffffffff81c660e0 T r600_resume +ffffffff81c66170 t r600_startup +ffffffff81c68180 T r600_suspend +ffffffff81c682f0 T r600_irq_suspend +ffffffff81c683b0 t r600_pcie_gart_disable +ffffffff81c685b0 T r600_init +ffffffff81c68da0 T r600_ih_ring_init +ffffffff81c68e10 T r600_irq_fini +ffffffff81c68f50 T r600_fini +ffffffff81c690e0 T r600_ring_ib_execute +ffffffff81c69560 T r600_ib_test +ffffffff81c69810 T r600_ih_ring_alloc +ffffffff81c69930 T r600_ih_ring_fini +ffffffff81c699c0 T r600_rlc_stop +ffffffff81c69b50 T r600_disable_interrupts +ffffffff81c69c00 T r600_irq_init +ffffffff81c6a070 t r600_disable_interrupt_state +ffffffff81c6a360 T r600_irq_disable +ffffffff81c6a420 T r600_irq_set +ffffffff81c6aba0 t r600_irq_ack +ffffffff81c6b090 T r600_irq_process +ffffffff81c6bc90 T r600_mmio_hdp_flush +ffffffff81c6bd10 T r600_set_pcie_lanes +ffffffff81c6be40 T r600_get_pcie_lanes +ffffffff81c6bf20 T r600_get_gpu_clock_counter +ffffffff81c6c000 T r600_fmt_is_valid_color +ffffffff81c6c040 T r600_fmt_is_valid_texture +ffffffff81c6c090 T r600_fmt_get_blocksize +ffffffff81c6c0d0 T r600_fmt_get_nblocksx +ffffffff81c6c130 T r600_fmt_get_nblocksy +ffffffff81c6c190 T r600_cs_common_vline_parse +ffffffff81c6c460 T r600_mip_minify +ffffffff81c6c4c0 T r600_cs_parse +ffffffff81c6e450 T r600_dma_cs_next_reloc +ffffffff81c6e4d0 T r600_dma_cs_parse +ffffffff81c6ec00 t r600_cs_track_check +ffffffff81c6fd40 t r600_cs_check_reg +ffffffff81c71000 T r600_dma_get_rptr +ffffffff81c71060 T r600_dma_get_wptr +ffffffff81c710a0 T r600_dma_set_wptr +ffffffff81c710e0 T r600_dma_stop +ffffffff81c71170 T r600_dma_resume +ffffffff81c71380 T r600_dma_fini +ffffffff81c71400 T r600_dma_is_lockup +ffffffff81c71470 T r600_dma_ring_test +ffffffff81c716d0 T r600_dma_fence_ring_emit +ffffffff81c718c0 T r600_dma_semaphore_ring_emit +ffffffff81c719e0 T r600_dma_ib_test +ffffffff81c71bf0 T r600_dma_ring_ib_execute +ffffffff81c71f30 T r600_copy_dma +ffffffff81c73000 T r600_dpm_print_class_info +ffffffff81c732b0 T r600_dpm_print_cap_info +ffffffff81c73340 T r600_dpm_print_ps_status +ffffffff81c733d0 T r600_dpm_get_vblank_time +ffffffff81c73490 T r600_dpm_get_vrefresh +ffffffff81c73520 T r600_calculate_u_and_p +ffffffff81c735a0 T r600_calculate_at +ffffffff81c73650 T r600_gfx_clockgating_enable +ffffffff81c73760 T r600_dynamicpm_enable +ffffffff81c737c0 T r600_enable_thermal_protection +ffffffff81c73820 T r600_enable_acpi_pm +ffffffff81c73870 T r600_enable_dynamic_pcie_gen2 +ffffffff81c738d0 T r600_dynamicpm_enabled +ffffffff81c73910 T r600_enable_sclk_control +ffffffff81c73970 T r600_enable_mclk_control +ffffffff81c739d0 T r600_enable_spll_bypass +ffffffff81c73a30 T r600_wait_for_spll_change +ffffffff81c73ab0 T r600_set_bsp +ffffffff81c73af0 T r600_set_at +ffffffff81c73b50 T r600_set_tc +ffffffff81c73bb0 T r600_select_td +ffffffff81c73c70 T r600_set_vrc +ffffffff81c73cb0 T r600_set_tpu +ffffffff81c73d10 T r600_set_tpc +ffffffff81c73d70 T r600_set_sstu +ffffffff81c73dd0 T r600_set_sst +ffffffff81c73e20 T r600_set_git +ffffffff81c73e70 T r600_set_fctu +ffffffff81c73ed0 T r600_set_fct +ffffffff81c73f20 T r600_set_ctxcgtt3d_rphc +ffffffff81c73f80 T r600_set_ctxcgtt3d_rsdc +ffffffff81c73fe0 T r600_set_vddc3d_oorsu +ffffffff81c74040 T r600_set_vddc3d_oorphc +ffffffff81c740a0 T r600_set_vddc3d_oorsdc +ffffffff81c74100 T r600_set_mpll_lock_time +ffffffff81c74150 T r600_set_mpll_reset_time +ffffffff81c741a0 T r600_engine_clock_entry_enable +ffffffff81c742a0 T r600_engine_clock_entry_enable_pulse_skipping +ffffffff81c743a0 T r600_engine_clock_entry_enable_post_divider +ffffffff81c744a0 T r600_engine_clock_entry_set_post_divider +ffffffff81c74560 T r600_engine_clock_entry_set_reference_divider +ffffffff81c74620 T r600_engine_clock_entry_set_feedback_divider +ffffffff81c746e0 T r600_engine_clock_entry_set_step_time +ffffffff81c747a0 T r600_vid_rt_set_ssu +ffffffff81c74800 T r600_vid_rt_set_vru +ffffffff81c74860 T r600_vid_rt_set_vrt +ffffffff81c748c0 T r600_voltage_control_enable_pins +ffffffff81c74910 T r600_voltage_control_program_voltages +ffffffff81c749a0 T r600_voltage_control_deactivate_static_control +ffffffff81c74a30 T r600_power_level_enable +ffffffff81c74aa0 T r600_power_level_set_voltage_index +ffffffff81c74b10 T r600_power_level_set_mem_clock_index +ffffffff81c74b70 T r600_power_level_set_eng_clock_index +ffffffff81c74be0 T r600_power_level_set_watermark_id +ffffffff81c74c50 T r600_power_level_set_pcie_gen2 +ffffffff81c74cb0 T r600_power_level_get_current_index +ffffffff81c74cf0 T r600_power_level_get_target_index +ffffffff81c74d30 T r600_power_level_set_enter_index +ffffffff81c74d90 T r600_wait_for_power_level_unequal +ffffffff81c74e80 T r600_wait_for_power_level +ffffffff81c74f70 T r600_start_dpm +ffffffff81c75250 T r600_stop_dpm +ffffffff81c752a0 T r600_dpm_pre_set_power_state +ffffffff81c752d0 T r600_dpm_post_set_power_state +ffffffff81c75300 T r600_is_uvd_state +ffffffff81c75340 T r600_is_internal_thermal_sensor +ffffffff81c75380 T r600_dpm_late_enable +ffffffff81c75490 T r600_get_platform_caps +ffffffff81c75530 T r600_parse_extended_power_table +ffffffff81c764a0 T r600_free_extended_power_table +ffffffff81c765a0 T r600_get_pcie_gen_support +ffffffff81c765f0 T r600_get_pcie_lane_support +ffffffff81c76650 T r600_encode_pci_lane_width +ffffffff81c77000 T r600_audio_update_hdmi +ffffffff81c77180 t r600_audio_status +ffffffff81c772a0 T r600_hdmi_buffer_status_changed +ffffffff81c77340 T r600_hdmi_update_audio_settings +ffffffff81c77710 T r600_audio_enable +ffffffff81c77790 T r600_audio_get_pin +ffffffff81c777c0 T r600_hdmi_update_acr +ffffffff81c77b60 T r600_set_avi_packet +ffffffff81c77d60 T r600_hdmi_audio_workaround +ffffffff81c77e30 T r600_hdmi_audio_set_dto +ffffffff81c77ef0 T r600_set_vbi_packet +ffffffff81c77fb0 T r600_set_audio_packet +ffffffff81c78280 T r600_set_mute +ffffffff81c78390 T r600_hdmi_enable +ffffffff81c79000 T radeon_acpi_is_pcie_performance_request_supported +ffffffff81c79050 T radeon_acpi_pcie_notify_device_ready +ffffffff81c79180 T radeon_acpi_pcie_performance_request +ffffffff81c793a0 T radeon_acpi_init +ffffffff81c79af0 t radeon_acpi_event +ffffffff81c79e40 T radeon_acpi_fini +ffffffff81c7a000 T radeon_agp_head_init +ffffffff81c7a050 T radeon_agp_init +ffffffff81c7a0a0 T radeon_agp_resume +ffffffff81c7a140 T radeon_agp_fini +ffffffff81c7a190 T radeon_agp_suspend +ffffffff81c7b000 T radeon_agp_disable +ffffffff81c7b120 T radeon_asic_init +ffffffff81c7b9b0 t radeon_invalid_rreg +ffffffff81c7b9f0 t radeon_invalid_wreg +ffffffff81c7ba30 t radeon_invalid_get_allowed_info_register +ffffffff81c7c000 T radeon_atombios_i2c_init +ffffffff81c7c3b0 T radeon_atombios_lookup_gpio +ffffffff81c7c4b0 T radeon_get_atom_connector_info_from_object_table +ffffffff81c7ce10 t radeon_lookup_i2c_gpio +ffffffff81c7d110 t radeon_atom_apply_quirks +ffffffff81c7d540 T radeon_get_atom_connector_info_from_supported_devices_table +ffffffff81c7da40 T radeon_atom_get_clock_info +ffffffff81c7ddc0 T radeon_atombios_sideport_present +ffffffff81c7de70 T radeon_atombios_get_tmds_info +ffffffff81c7dfb0 T radeon_atombios_get_ppll_ss_info +ffffffff81c7e0d0 T radeon_atombios_get_asic_ss_info +ffffffff81c7e440 T radeon_atombios_get_lvds_info +ffffffff81c7e7b0 T radeon_atombios_get_primary_dac_info +ffffffff81c7e860 T radeon_atom_get_tv_timings +ffffffff81c7eab0 T radeon_atombios_get_tv_info +ffffffff81c7eb60 T radeon_atombios_get_tv_dac_info +ffffffff81c7ec60 T radeon_atombios_get_default_voltages +ffffffff81c7ed20 T radeon_atombios_get_power_modes +ffffffff81c7fdf0 T radeon_atom_get_clock_dividers +ffffffff81c800f0 T radeon_atom_get_memory_pll_dividers +ffffffff81c80230 T radeon_atom_set_clock_gating +ffffffff81c80280 T radeon_atom_get_engine_clock +ffffffff81c802d0 T radeon_atom_get_memory_clock +ffffffff81c80320 T radeon_atom_set_engine_clock +ffffffff81c80370 T radeon_atom_set_memory_clock +ffffffff81c803d0 T radeon_atom_set_engine_dram_timings +ffffffff81c80440 T radeon_atom_update_memory_dll +ffffffff81c80490 T radeon_atom_set_ac_timing +ffffffff81c804e0 T radeon_atom_set_voltage +ffffffff81c805b0 T radeon_atom_get_max_vddc +ffffffff81c80690 T radeon_atom_get_leakage_vddc_based_on_leakage_idx +ffffffff81c80760 T radeon_atom_get_leakage_id_from_vbios +ffffffff81c80820 T radeon_atom_get_leakage_vddc_based_on_leakage_params +ffffffff81c80a30 T radeon_atom_get_voltage_evv +ffffffff81c80ae0 T radeon_atom_get_voltage_gpio_settings +ffffffff81c80be0 T radeon_atom_is_voltage_gpio +ffffffff81c80d70 T radeon_atom_get_svi2_info +ffffffff81c80e60 T radeon_atom_get_max_voltage +ffffffff81c81000 T radeon_atom_get_min_voltage +ffffffff81c81140 T radeon_atom_get_voltage_step +ffffffff81c81240 T radeon_atom_round_to_true_voltage +ffffffff81c813b0 T radeon_atom_get_voltage_table +ffffffff81c81620 T radeon_atom_get_memory_info +ffffffff81c817d0 T radeon_atom_get_mclk_range_table +ffffffff81c81a20 T radeon_atom_init_mc_reg_table +ffffffff81c81ca0 T radeon_atom_initialize_bios_scratch_regs +ffffffff81c81d70 T radeon_save_bios_scratch_regs +ffffffff81c81e50 T radeon_restore_bios_scratch_regs +ffffffff81c81f30 T radeon_atom_output_lock +ffffffff81c81fc0 T radeon_atombios_connected_scratch_regs +ffffffff81c82740 T radeon_atombios_encoder_crtc_scratch_regs +ffffffff81c82880 T radeon_atombios_encoder_dpms_scratch_regs +ffffffff81c82aa0 t radeon_atombios_parse_misc_flags_1_3 +ffffffff81c82c90 t radeon_atombios_add_pplib_thermal_controller +ffffffff81c83090 t radeon_atombios_parse_pplib_clock_info +ffffffff81c833a0 t radeon_atombios_parse_pplib_non_clock_info +ffffffff81c84000 T radeon_audio_init +ffffffff81c84290 T radeon_audio_endpoint_rreg +ffffffff81c842d0 T radeon_audio_endpoint_wreg +ffffffff81c84310 T radeon_audio_get_pin +ffffffff81c84360 T radeon_audio_detect +ffffffff81c84690 T radeon_audio_fini +ffffffff81c847d0 T radeon_audio_mode_set +ffffffff81c84820 T radeon_audio_dpms +ffffffff81c84870 T radeon_audio_decode_dfs_div +ffffffff81c848d0 t radeon_audio_hdmi_mode_set +ffffffff81c85000 t radeon_audio_write_speaker_allocation +ffffffff81c850b0 t radeon_audio_write_sad_regs +ffffffff81c85180 t radeon_audio_set_avi_packet +ffffffff81c852c0 t radeon_audio_dp_mode_set +ffffffff81c85440 t radeon_audio_rreg +ffffffff81c85490 t radeon_audio_wreg +ffffffff81c86000 T radeon_benchmark +ffffffff81c86940 t radeon_benchmark_move +ffffffff81c86e00 t radeon_bo_reserve +ffffffff81c86f80 t radeon_bo_unreserve +ffffffff81c88000 T radeon_get_bios +ffffffff81c89000 t igp_read_bios_from_vram +ffffffff81c89110 t radeon_read_bios +ffffffff81c8a000 T radeon_legacy_get_engine_clock +ffffffff81c8a0d0 T radeon_legacy_get_memory_clock +ffffffff81c8a1a0 T radeon_get_clock_info +ffffffff81c8a730 T radeon_legacy_set_engine_clock +ffffffff81c8aa80 T radeon_legacy_set_clock_gating +ffffffff81c8c000 T radeon_combios_check_hardcoded_edid +ffffffff81c8c100 T radeon_bios_get_hardcoded_edid +ffffffff81c8c180 T radeon_combios_i2c_init +ffffffff81c8c940 t combios_setup_i2c_bus +ffffffff81c8cc40 T radeon_combios_get_clock_info +ffffffff81c8ce30 T radeon_combios_sideport_present +ffffffff81c8ceb0 T radeon_combios_get_primary_dac_info +ffffffff81c8cff0 T radeon_combios_get_tv_info +ffffffff81c8d0f0 T radeon_combios_get_tv_dac_info +ffffffff81c8d3a0 T radeon_combios_get_lvds_info +ffffffff81c8d9f0 T radeon_legacy_get_tmds_info_from_table +ffffffff81c8dac0 T radeon_legacy_get_tmds_info_from_combios +ffffffff81c8dcd0 T radeon_legacy_get_ext_tmds_info_from_table +ffffffff81c8df10 T radeon_legacy_get_ext_tmds_info_from_combios +ffffffff81c8e2a0 T radeon_get_legacy_connector_info_from_table +ffffffff81c90660 T radeon_get_legacy_connector_info_from_bios +ffffffff81c913f0 T radeon_combios_get_power_modes +ffffffff81c91ca0 T radeon_external_tmds_setup +ffffffff81c91d70 T radeon_combios_external_tmds_setup +ffffffff81c92330 T radeon_combios_asic_init +ffffffff81c92950 t combios_parse_mmio_table +ffffffff81c92b70 t combios_parse_pll_table +ffffffff81c92e40 T radeon_combios_initialize_bios_scratch_regs +ffffffff81c92ed0 T radeon_combios_output_lock +ffffffff81c92f30 T radeon_combios_connected_scratch_regs +ffffffff81c93290 T radeon_combios_encoder_crtc_scratch_regs +ffffffff81c93370 T radeon_combios_encoder_dpms_scratch_regs +ffffffff81c94000 T radeon_connector_hotplug +ffffffff81c94100 T radeon_get_monitor_bpc +ffffffff81c94530 T radeon_connector_edid +ffffffff81c945e0 T radeon_connector_encoder_get_dp_bridge_encoder_id +ffffffff81c94660 T radeon_connector_is_dp12_capable +ffffffff81c94700 T radeon_add_atom_connector +ffffffff81c95550 T radeon_add_legacy_connector +ffffffff81c95a90 t radeon_dp_detect +ffffffff81c95e50 t radeon_dvi_force +ffffffff81c95ea0 t radeon_connector_set_property +ffffffff81c966e0 t radeon_connector_unregister +ffffffff81c96740 t radeon_connector_destroy +ffffffff81c967b0 t radeon_best_single_encoder +ffffffff81c96830 t radeon_connector_get_edid +ffffffff81c96990 t radeon_dp_get_modes +ffffffff81c96cc0 t radeon_dp_mode_valid +ffffffff81c96e90 t radeon_dvi_encoder +ffffffff81c96f70 t radeon_fixup_lvds_native_mode +ffffffff81c970a0 t radeon_add_common_modes +ffffffff81c97190 t radeon_fp_native_mode +ffffffff81c97260 t radeon_lvds_set_property +ffffffff81c97350 t radeon_vga_detect +ffffffff81c97600 t radeon_connector_analog_encoder_conflict_solve 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radeon_bo_reserve +ffffffff81c9bc40 t radeon_bo_unreserve +ffffffff81c9bd20 t radeon_show_cursor +ffffffff81c9bf70 T radeon_cursor_reset +ffffffff81c9c000 T radeon_is_px +ffffffff81c9c040 T radeon_program_register_sequence +ffffffff81c9c170 T radeon_pci_config_reset +ffffffff81c9c1a0 T radeon_surface_init +ffffffff81c9c360 T radeon_scratch_init +ffffffff81c9c3e0 T radeon_scratch_get +ffffffff81c9c460 T radeon_scratch_free +ffffffff81c9c4c0 T radeon_doorbell_get +ffffffff81c9c570 T radeon_doorbell_free +ffffffff81c9c5c0 T radeon_wb_disable +ffffffff81c9c5f0 T radeon_wb_fini +ffffffff81c9c690 t radeon_bo_reserve +ffffffff81c9c810 t radeon_bo_unreserve +ffffffff81c9c8f0 T radeon_wb_init +ffffffff81c9cbe0 T radeon_vram_location +ffffffff81c9cd10 T radeon_gtt_location +ffffffff81c9ce40 T radeon_device_is_virtual +ffffffff81c9ce70 T radeon_card_posted +ffffffff81c9d090 T radeon_update_bandwidth_info +ffffffff81c9d110 T radeon_boot_test_post_card +ffffffff81c9d1d0 T radeon_dummy_page_init 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radeon_fence_driver_fini +ffffffff81ca96d0 T radeon_fence_driver_force_completion +ffffffff81ca97d0 t radeon_fence_get_driver_name +ffffffff81ca9800 t radeon_fence_get_timeline_name +ffffffff81ca98a0 t radeon_fence_enable_signaling +ffffffff81ca9ac0 t radeon_fence_is_signaled +ffffffff81ca9b80 t radeon_fence_default_wait +ffffffff81ca9d30 t radeon_fence_any_seq_signaled +ffffffff81ca9f30 t radeon_fence_check_lockup +ffffffff81caa180 t __delayed_work_tick +ffffffff81caa1a0 t radeon_fence_check_signaled +ffffffff81caa230 t radeon_fence_wait_cb +ffffffff81cab000 T radeon_gart_table_ram_alloc +ffffffff81cab0c0 T radeon_gart_table_ram_free +ffffffff81cab130 T radeon_gart_table_vram_alloc +ffffffff81cab1b0 T radeon_gart_table_vram_pin +ffffffff81cab2f0 t radeon_bo_reserve +ffffffff81cab470 t radeon_bo_unreserve +ffffffff81cab550 T radeon_gart_table_vram_unpin +ffffffff81cab5d0 T radeon_gart_table_vram_free +ffffffff81cab610 T radeon_gart_unbind +ffffffff81cab730 T radeon_gart_bind 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radeon_gem_get_tiling_ioctl +ffffffff81cacec0 t radeon_bo_reserve +ffffffff81cad0d0 t radeon_bo_unreserve +ffffffff81cad1b0 T radeon_gem_va_ioctl +ffffffff81cad580 T radeon_gem_op_ioctl +ffffffff81cad680 T radeon_mode_dumb_create +ffffffff81cad780 T radeon_gem_debugfs_init +ffffffff81cae000 T radeon_ddc_probe +ffffffff81cae0c0 T radeon_router_select_ddc_port +ffffffff81cae320 T radeon_bb_set_bits +ffffffff81cae490 T radeon_bb_set_dir +ffffffff81cae4c0 T radeon_bb_read_bits +ffffffff81cae5a0 T radeon_acquire_bus +ffffffff81cae9f0 T radeon_release_bus +ffffffff81caeb60 T radeon_send_start +ffffffff81caeb80 T radeon_send_stop +ffffffff81caeba0 T radeon_initiate_xfer +ffffffff81caebc0 T radeon_read_byte +ffffffff81caebe0 T radeon_write_byte +ffffffff81caec00 T radeon_i2c_create +ffffffff81caee10 T radeon_i2c_destroy +ffffffff81caee90 T radeon_i2c_init +ffffffff81caeee0 T radeon_i2c_fini +ffffffff81caef90 T radeon_i2c_add +ffffffff81caf140 T radeon_i2c_lookup +ffffffff81caf300 T radeon_i2c_get_byte +ffffffff81caf3d0 T radeon_i2c_put_byte +ffffffff81caf460 T radeon_router_select_cd_port +ffffffff81caf6c0 t radeon_hw_i2c_xfer +ffffffff81cb0280 t radeon_hw_i2c_func +ffffffff81cb02b0 t r100_hw_i2c_xfer +ffffffff81cb0990 t radeon_get_i2c_prescale +ffffffff81cb1000 T radeon_ib_get +ffffffff81cb1100 T radeon_ib_free +ffffffff81cb1150 T radeon_ib_schedule +ffffffff81cb13e0 T radeon_ib_pool_init +ffffffff81cb1480 T radeon_ib_pool_fini +ffffffff81cb14f0 T radeon_ib_ring_tests +ffffffff81cb2000 T radeon_driver_irq_handler_kms +ffffffff81cb2050 T radeon_msi_ok +ffffffff81cb2150 T radeon_irq_kms_init +ffffffff81cb23e0 t radeon_hotplug_work_func +ffffffff81cb2490 t radeon_dp_work_func +ffffffff81cb24c0 T radeon_irq_kms_fini +ffffffff81cb2660 T radeon_irq_kms_sw_irq_get +ffffffff81cb2700 T radeon_irq_kms_sw_irq_get_delayed +ffffffff81cb2740 T radeon_irq_kms_sw_irq_put +ffffffff81cb27d0 T radeon_irq_kms_pflip_irq_get +ffffffff81cb2880 T radeon_irq_kms_pflip_irq_put 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radeon_crtc_commit +ffffffff81cb5b80 t radeon_crtc_mode_fixup +ffffffff81cb5ba0 t radeon_crtc_mode_set +ffffffff81cb6ff0 t radeon_crtc_disable +ffffffff81cb8000 T radeon_legacy_get_backlight_level +ffffffff81cb8040 T radeon_legacy_set_backlight_level +ffffffff81cb8080 t radeon_legacy_lvds_update +ffffffff81cb83e0 T radeon_legacy_backlight_init +ffffffff81cb85b0 t radeon_legacy_backlight_get_brightness +ffffffff81cb8610 T radeon_add_legacy_encoder +ffffffff81cb8990 t radeon_legacy_backlight_update_status +ffffffff81cb8a20 t radeon_lvds_enc_destroy +ffffffff81cb8ab0 t radeon_legacy_lvds_dpms +ffffffff81cb8b00 t radeon_legacy_mode_fixup +ffffffff81cb8b70 t radeon_legacy_lvds_prepare +ffffffff81cb8c00 t radeon_legacy_lvds_commit +ffffffff81cb8c80 t radeon_legacy_lvds_mode_set +ffffffff81cb8e90 t radeon_legacy_encoder_disable +ffffffff81cb8ee0 t radeon_legacy_tmds_int_dpms +ffffffff81cb8fa0 t radeon_legacy_tmds_int_prepare +ffffffff81cb9070 t radeon_legacy_tmds_int_commit +ffffffff81cb9140 t radeon_legacy_tmds_int_mode_set +ffffffff81cb93b0 t radeon_legacy_primary_dac_dpms +ffffffff81cb94f0 t radeon_legacy_primary_dac_prepare +ffffffff81cb9550 t radeon_legacy_primary_dac_commit +ffffffff81cb95a0 t radeon_legacy_primary_dac_mode_set +ffffffff81cb9750 t radeon_legacy_primary_dac_detect +ffffffff81cb9940 t radeon_legacy_tv_dac_dpms +ffffffff81cb9b40 t radeon_legacy_tv_dac_prepare +ffffffff81cb9ba0 t radeon_legacy_tv_dac_commit +ffffffff81cb9bf0 t radeon_legacy_tv_dac_mode_set +ffffffff81cb9f90 t radeon_legacy_tv_dac_detect +ffffffff81cbabc0 t radeon_ext_tmds_enc_destroy +ffffffff81cbac10 t radeon_legacy_tmds_ext_dpms +ffffffff81cbace0 t radeon_legacy_tmds_ext_prepare +ffffffff81cbadb0 t radeon_legacy_tmds_ext_commit +ffffffff81cbae80 t radeon_legacy_tmds_ext_mode_set +ffffffff81cbc000 T radeon_legacy_tv_mode_set +ffffffff81cbd0b0 T radeon_legacy_tv_adjust_crtc_reg +ffffffff81cbd1c0 T radeon_legacy_tv_adjust_pll1 +ffffffff81cbd2b0 T radeon_legacy_tv_adjust_pll2 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+ffffffff81cc7210 T radeon_semaphore_free +ffffffff81cc8000 T radeon_sync_create +ffffffff81cc8090 T radeon_sync_fence +ffffffff81cc8140 T radeon_sync_resv +ffffffff81cc8270 T radeon_sync_rings +ffffffff81cc8430 T radeon_sync_free +ffffffff81cc9000 T radeon_test_moves +ffffffff81cc9070 t radeon_do_test_moves +ffffffff81cc9660 T radeon_test_ring_sync +ffffffff81cc9930 t radeon_test_create_and_emit_fence +ffffffff81cc9aa0 T radeon_test_syncing +ffffffff81cc9d60 t radeon_test_ring_sync2 +ffffffff81cca0d0 t radeon_bo_reserve +ffffffff81cca250 t radeon_bo_unreserve +ffffffff81ccb000 T radeon_get_rdev +ffffffff81ccb030 T radeon_ttm_tt_set_userptr +ffffffff81ccb080 T radeon_ttm_tt_is_bound +ffffffff81ccb0d0 T radeon_ttm_tt_has_userptr +ffffffff81ccb110 T radeon_ttm_tt_is_readonly +ffffffff81ccb150 T radeon_ttm_init +ffffffff81ccb370 T radeon_ttm_set_active_vram_size +ffffffff81ccb3b0 t radeon_bo_reserve +ffffffff81ccb530 t radeon_bo_unreserve +ffffffff81ccb610 T radeon_ttm_fini +ffffffff81ccb6e0 t radeon_ttm_tt_create +ffffffff81ccb7d0 t radeon_ttm_tt_populate +ffffffff81ccb880 t radeon_ttm_tt_unpopulate +ffffffff81ccb980 t radeon_ttm_tt_destroy +ffffffff81ccb9d0 t radeon_evict_flags +ffffffff81ccbb20 t radeon_bo_move +ffffffff81ccbfa0 t radeon_ttm_io_mem_reserve +ffffffff81ccd000 T radeon_ucode_print_mc_hdr +ffffffff81ccd0b0 t radeon_ucode_print_common_hdr +ffffffff81ccd1e0 T radeon_ucode_print_smc_hdr +ffffffff81ccd270 T radeon_ucode_print_gfx_hdr +ffffffff81ccd340 T radeon_ucode_print_rlc_hdr +ffffffff81ccd440 T radeon_ucode_print_sdma_hdr +ffffffff81ccd520 T radeon_ucode_validate +ffffffff81cce000 T radeon_uvd_init +ffffffff81cce4f0 t radeon_uvd_idle_work_handler +ffffffff81cce660 t radeon_bo_reserve +ffffffff81cce870 t radeon_bo_unreserve +ffffffff81cce950 T radeon_uvd_fini +ffffffff81ccea20 T radeon_uvd_suspend +ffffffff81ccebe0 T radeon_uvd_note_usage +ffffffff81ccee20 T radeon_uvd_get_destroy_msg +ffffffff81ccef30 T radeon_uvd_resume +ffffffff81ccefc0 T radeon_uvd_force_into_uvd_segment +ffffffff81ccf060 T radeon_uvd_free_handles +ffffffff81ccf220 T radeon_uvd_cs_parse +ffffffff81ccf940 T radeon_uvd_get_create_msg +ffffffff81ccfac0 t radeon_uvd_send_msg +ffffffff81ccfc60 T radeon_uvd_calc_upll_dividers +ffffffff81ccfe00 T radeon_uvd_send_upll_ctlreq +ffffffff81cd0140 t __delayed_work_tick +ffffffff81cd1000 T radeon_vce_init +ffffffff81cd1610 t radeon_vce_idle_work_handler +ffffffff81cd16e0 t radeon_bo_reserve +ffffffff81cd1860 t radeon_bo_unreserve +ffffffff81cd1940 T radeon_vce_fini +ffffffff81cd19c0 T radeon_vce_suspend +ffffffff81cd1aa0 T radeon_vce_resume +ffffffff81cd1bf0 T radeon_vce_note_usage +ffffffff81cd1d10 T radeon_vce_free_handles +ffffffff81cd1dd0 T radeon_vce_get_destroy_msg +ffffffff81cd2070 T radeon_vce_get_create_msg +ffffffff81cd2430 T radeon_vce_cs_reloc +ffffffff81cd2530 T radeon_vce_cs_parse +ffffffff81cd2d60 T radeon_vce_semaphore_emit +ffffffff81cd2f30 T radeon_vce_ib_execute +ffffffff81cd30d0 T radeon_vce_fence_emit +ffffffff81cd3310 T radeon_vce_ring_test +ffffffff81cd3460 T radeon_vce_ib_test +ffffffff81cd3580 t __delayed_work_tick +ffffffff81cd4000 T radeon_vm_manager_init +ffffffff81cd4060 T radeon_vm_manager_fini +ffffffff81cd4180 T radeon_vm_get_bos +ffffffff81cd42b0 T radeon_vm_grab_id +ffffffff81cd4440 T radeon_vm_flush +ffffffff81cd45d0 T radeon_vm_fence +ffffffff81cd4680 T radeon_vm_bo_find +ffffffff81cd46e0 T radeon_vm_bo_add +ffffffff81cd47c0 T radeon_vm_bo_set_addr +ffffffff81cd4c20 t radeon_bo_unreserve +ffffffff81cd4d00 t radeon_vm_clear_bo +ffffffff81cd4ef0 T radeon_vm_map_gart +ffffffff81cd4f30 T radeon_vm_update_page_directory +ffffffff81cd52e0 T radeon_vm_bo_update +ffffffff81cd59c0 T radeon_vm_clear_freed +ffffffff81cd5aa0 T radeon_vm_clear_invalids +ffffffff81cd5b40 T radeon_vm_bo_rmv +ffffffff81cd5c30 T radeon_vm_bo_invalidate +ffffffff81cd5ce0 T radeon_vm_init +ffffffff81cd5f40 T radeon_vm_fini +ffffffff81cd6210 t radeon_bo_reserve +ffffffff81cd6390 t radeon_vm_frag_ptes +ffffffff81cd7000 T rs400_gart_adjust_size +ffffffff81cd70c0 T rs400_gart_tlb_flush +ffffffff81cd7140 T rs400_gart_init +ffffffff81cd7240 T rs400_gart_enable +ffffffff81cd75a0 T rs400_gart_disable +ffffffff81cd7600 T rs400_gart_fini +ffffffff81cd7670 T rs400_gart_get_page_entry +ffffffff81cd76d0 T rs400_gart_set_page +ffffffff81cd7710 T rs400_mc_wait_for_idle +ffffffff81cd77b0 T rs400_mc_rreg +ffffffff81cd7840 T rs400_mc_wreg +ffffffff81cd78c0 T rs400_resume +ffffffff81cd79f0 t rs400_mc_program +ffffffff81cd7af0 t rs400_startup +ffffffff81cd7ce0 T rs400_suspend +ffffffff81cd7d80 T rs400_fini +ffffffff81cd7e70 T rs400_init +ffffffff81cd9000 T avivo_wait_for_vblank +ffffffff81cd9280 T rs600_page_flip +ffffffff81cd9540 T rs600_page_flip_pending +ffffffff81cd95b0 T avivo_program_fmt +ffffffff81cd96d0 T rs600_pm_misc +ffffffff81cd9a10 T rs600_pm_prepare +ffffffff81cd9b10 T rs600_pm_finish +ffffffff81cd9c10 T rs600_hpd_sense +ffffffff81cd9c70 T rs600_hpd_set_polarity +ffffffff81cd9d30 T rs600_hpd_init +ffffffff81cd9e10 T rs600_hpd_fini +ffffffff81cd9eb0 T rs600_asic_reset +ffffffff81cda120 T rs600_gart_tlb_flush +ffffffff81cda1e0 T rs600_gart_get_page_entry +ffffffff81cda240 T rs600_gart_set_page +ffffffff81cda280 T rs600_irq_set +ffffffff81cda450 T rs600_irq_disable +ffffffff81cda4d0 t rs600_irq_ack +ffffffff81cda680 T rs600_irq_process +ffffffff81cda9f0 T rs600_get_vblank_counter +ffffffff81cdaa40 T rs600_mc_wait_for_idle +ffffffff81cdaae0 T rs600_bandwidth_update +ffffffff81cdabd0 T rs600_mc_rreg +ffffffff81cdac50 T rs600_mc_wreg +ffffffff81cdacc0 T rs600_set_safe_registers +ffffffff81cdad00 T rs600_resume +ffffffff81cdae30 t rs600_startup +ffffffff81cdb670 T rs600_suspend +ffffffff81cdb770 T rs600_fini +ffffffff81cdb870 T rs600_init +ffffffff81cdc000 T rs690_mc_wait_for_idle +ffffffff81cdc0a0 T rs690_pm_info +ffffffff81cdc330 T rs690_line_buffer_adjust +ffffffff81cdc430 T rs690_bandwidth_update +ffffffff81cdc750 t rs690_crtc_bandwidth_compute +ffffffff81cdcb80 t rs690_compute_mode_priority +ffffffff81cdd000 T rs690_mc_rreg +ffffffff81cdd090 T rs690_mc_wreg +ffffffff81cdd110 T rs690_resume +ffffffff81cdd200 t rs690_startup +ffffffff81cdd4f0 T rs690_suspend +ffffffff81cdd550 T rs690_fini +ffffffff81cdd600 T rs690_init +ffffffff81cde000 T rs780_dpm_enable +ffffffff81cdebe0 T rs780_dpm_disable +ffffffff81cdecc0 T rs780_dpm_set_power_state +ffffffff81cdf0a0 t rs780_force_voltage +ffffffff81cdf1e0 t rs780_enable_voltage_scaling +ffffffff81cdf390 T rs780_dpm_setup_asic +ffffffff81cdf3c0 T rs780_dpm_display_configuration_changed +ffffffff81cdf510 T rs780_dpm_init +ffffffff81cdfa80 T rs780_dpm_print_power_state +ffffffff81cdfb10 T rs780_dpm_fini +ffffffff81cdfba0 T rs780_dpm_get_sclk +ffffffff81cdfbe0 T rs780_dpm_get_mclk +ffffffff81cdfc10 T rs780_dpm_debugfs_print_current_performance_level +ffffffff81cdfc40 T rs780_dpm_get_current_sclk +ffffffff81cdfcd0 T rs780_dpm_get_current_mclk +ffffffff81cdfd00 T rs780_dpm_force_performance_level +ffffffff81cdfef0 t rs780_force_fbdiv +ffffffff81ce1000 T rv515_ring_start +ffffffff81ce1b30 T rv515_mc_wait_for_idle +ffffffff81ce1bd0 T rv515_vga_render_disable +ffffffff81ce1c20 T rv515_mc_rreg +ffffffff81ce1cb0 T rv515_mc_wreg +ffffffff81ce1d30 T rv515_debugfs +ffffffff81ce1d40 T rv515_mc_stop +ffffffff81ce22d0 T rv515_mc_resume +ffffffff81ce28e0 T rv515_clock_startup +ffffffff81ce29b0 T rv515_resume +ffffffff81ce2bf0 t rv515_startup +ffffffff81ce30d0 T rv515_suspend +ffffffff81ce3140 T rv515_set_safe_registers +ffffffff81ce3180 T rv515_fini +ffffffff81ce3230 T rv515_init +ffffffff81ce3520 T atom_rv515_force_tv_scaler +ffffffff81ce6bc0 T rv515_bandwidth_avivo_update +ffffffff81ce6d60 t rv515_crtc_bandwidth_compute +ffffffff81ce70a0 t rv515_compute_mode_priority +ffffffff81ce7550 T rv515_bandwidth_update +ffffffff81ce8000 T rv6xx_dpm_enable +ffffffff81ce87f0 t rv6xx_calculate_stepping_parameters +ffffffff81ce89c0 t rv6xx_program_stepping_parameters_except_lowest_entry +ffffffff81ce8fb0 t rv6xx_program_stepping_parameters_lowest_entry +ffffffff81ce9090 T rv6xx_dpm_disable +ffffffff81ce9410 T rv6xx_dpm_set_power_state +ffffffff81ce9e10 T rv6xx_setup_asic +ffffffff81ce9f50 T rv6xx_dpm_display_configuration_changed +ffffffff81ce9fd0 T rv6xx_dpm_init +ffffffff81cea520 T rv6xx_dpm_print_power_state +ffffffff81cea5e0 T rv6xx_dpm_debugfs_print_current_performance_level +ffffffff81cea610 T rv6xx_dpm_get_current_sclk +ffffffff81cea680 T rv6xx_dpm_get_current_mclk +ffffffff81cea6f0 T rv6xx_dpm_fini +ffffffff81cea780 T rv6xx_dpm_get_sclk +ffffffff81cea7c0 T rv6xx_dpm_get_mclk +ffffffff81cea800 T rv6xx_dpm_force_performance_level +ffffffff81cea990 t rv6xx_generate_steps +ffffffff81ceaca0 t rv6xx_output_stepping +ffffffff81ceadc0 t rv6xx_program_mclk_stepping_entry +ffffffff81ceb030 t rv6xx_program_engine_spread_spectrum +ffffffff81ceb310 t rv6xx_step_sw_voltage +ffffffff81cec000 T rv730_populate_sclk_value +ffffffff81cec240 T rv730_populate_mclk_value +ffffffff81cec460 T rv730_read_clock_registers +ffffffff81cec580 T rv730_populate_smc_acpi_state +ffffffff81cec730 T rv730_populate_smc_initial_state +ffffffff81cec8f0 T rv730_program_memory_timing_parameters +ffffffff81cecad0 T rv730_start_dpm +ffffffff81cecb60 T rv730_stop_dpm +ffffffff81cecc20 T rv730_program_dcodt +ffffffff81ceccf0 T rv730_get_odt_values +ffffffff81ced000 T rv740_get_decoded_reference_divider +ffffffff81ced0a0 T rv740_get_dll_speed +ffffffff81ced1d0 T rv740_populate_sclk_value +ffffffff81ced3e0 T rv740_populate_mclk_value +ffffffff81ced820 T rv740_read_clock_registers +ffffffff81ced950 T rv740_populate_smc_acpi_state +ffffffff81cedb80 T rv740_enable_mclk_spread_spectrum +ffffffff81cedbe0 T rv740_get_mclk_frequency_ratio +ffffffff81cee000 T rv770_set_uvd_clocks +ffffffff81cee570 T rv770_get_xclk +ffffffff81cee5d0 T rv770_page_flip +ffffffff81cee8e0 T rv770_page_flip_pending +ffffffff81cee950 T rv770_get_temp +ffffffff81cee9b0 T rv770_pm_misc +ffffffff81ceea90 T r700_cp_stop +ffffffff81ceeb10 T r700_cp_fini +ffffffff81ceeba0 T rv770_set_clk_bypass_mode +ffffffff81ceecc0 T r700_vram_gtt_location +ffffffff81ceee50 T rv770_resume +ffffffff81ceeee0 t rv770_init_golden_registers +ffffffff81cef070 t rv770_startup +ffffffff81cf1060 T rv770_suspend +ffffffff81cf1280 T rv770_init +ffffffff81cf1850 T rv770_fini +ffffffff81cf2000 T rv770_copy_dma +ffffffff81cf3000 T rv770_get_ps +ffffffff81cf3030 T rv770_get_pi +ffffffff81cf3060 T evergreen_get_pi +ffffffff81cf3090 T rv770_restore_cgcg +ffffffff81cf3110 T rv770_stop_dpm +ffffffff81cf31d0 T rv770_dpm_enabled +ffffffff81cf3210 T rv770_enable_thermal_protection +ffffffff81cf3270 T rv770_enable_acpi_pm +ffffffff81cf32c0 T rv770_get_seq_value +ffffffff81cf3300 T rv770_write_smc_soft_register +ffffffff81cf3330 T rv770_populate_smc_t +ffffffff81cf34d0 T rv770_populate_smc_sp +ffffffff81cf3530 T rv770_map_clkf_to_ibias +ffffffff81cf3590 T rv770_populate_vddc_value +ffffffff81cf3640 T rv770_populate_mvdd_value +ffffffff81cf3690 T rv770_calculate_memory_refresh_rate +ffffffff81cf3700 T rv770_enable_backbias +ffffffff81cf3760 T rv770_setup_bsp +ffffffff81cf3850 T rv770_program_git +ffffffff81cf38a0 T rv770_program_tp +ffffffff81cf3920 T rv770_program_tpp +ffffffff81cf3960 T rv770_program_sstp +ffffffff81cf39a0 T rv770_program_engine_speed_parameters +ffffffff81cf39f0 T rv770_program_vc +ffffffff81cf3a40 T rv770_clear_vc +ffffffff81cf3a80 T rv770_upload_firmware +ffffffff81cf3ac0 T rv770_populate_initial_mvdd_value +ffffffff81cf3b10 T rv770_get_memory_module_index +ffffffff81cf3b50 T rv770_enable_voltage_control +ffffffff81cf3bb0 T rv770_halt_smc +ffffffff81cf3c10 T rv770_resume_smc +ffffffff81cf3c60 T rv770_set_sw_state +ffffffff81cf3cc0 T rv770_set_boot_state +ffffffff81cf3d10 T rv770_set_uvd_clock_before_set_eng_clock +ffffffff81cf3d80 T rv770_set_uvd_clock_after_set_eng_clock +ffffffff81cf3df0 T rv770_restrict_performance_levels_before_switch +ffffffff81cf3e50 T rv770_dpm_force_performance_level +ffffffff81cf3f10 T r7xx_start_smc +ffffffff81cf3f40 T r7xx_stop_smc +ffffffff81cf3f70 T rv770_read_voltage_smio_registers +ffffffff81cf3fb0 T rv770_reset_smio_status +ffffffff81cf4070 T rv770_get_memory_type +ffffffff81cf40c0 T rv770_get_pcie_gen2_status +ffffffff81cf4130 T rv770_get_max_vddc +ffffffff81cf4190 T rv770_program_response_times +ffffffff81cf42e0 T rv770_enable_auto_throttle_source +ffffffff81cf4460 T rv770_dpm_enable +ffffffff81cf54e0 T rv770_dpm_late_enable +ffffffff81cf5610 T rv770_dpm_disable +ffffffff81cf5970 T rv770_dpm_set_power_state +ffffffff81cf5f70 T rv770_dpm_setup_asic +ffffffff81cf62d0 T rv770_dpm_display_configuration_changed +ffffffff81cf6350 T rv7xx_parse_power_table +ffffffff81cf6890 T rv770_get_engine_memory_ss +ffffffff81cf6920 T rv770_dpm_init +ffffffff81cf6b60 T rv770_dpm_print_power_state +ffffffff81cf6c80 T rv770_dpm_debugfs_print_current_performance_level +ffffffff81cf6cb0 T rv770_dpm_get_current_sclk +ffffffff81cf6d20 T rv770_dpm_get_current_mclk +ffffffff81cf6d90 T rv770_dpm_fini +ffffffff81cf6e20 T rv770_dpm_get_sclk +ffffffff81cf6e60 T rv770_dpm_get_mclk +ffffffff81cf6eb0 T rv770_dpm_vblank_too_short +ffffffff81cf6f20 t rv770_convert_power_level_to_smc +ffffffff81cf8000 T rv770_copy_bytes_to_smc +ffffffff81cf8240 T rv770_start_smc +ffffffff81cf8290 T rv770_reset_smc +ffffffff81cf82e0 T rv770_stop_smc_clock +ffffffff81cf8330 T rv770_start_smc_clock +ffffffff81cf8380 T rv770_is_smc_running +ffffffff81cf83c0 T rv770_send_msg_to_smc +ffffffff81cf84a0 T rv770_wait_for_smc_inactive +ffffffff81cf8540 T rv770_load_smc_ucode +ffffffff81cf86d0 T rv770_read_smc_sram_dword +ffffffff81cf8790 T rv770_write_smc_sram_dword +ffffffff81cf9000 T si_get_allowed_info_register +ffffffff81cf9090 T si_get_xclk +ffffffff81cf9100 T si_get_temp +ffffffff81cf9150 T si_mc_load_microcode +ffffffff81cf9420 T dce6_bandwidth_update +ffffffff81cf9820 t dce6_program_watermarks +ffffffff81cfa2d0 T si_fence_ring_emit +ffffffff81cfa750 T si_ring_ib_execute +ffffffff81cfaf30 T si_gpu_check_soft_reset +ffffffff81cfb0d0 T si_asic_reset +ffffffff81cfb4f0 t si_gpu_pci_config_reset +ffffffff81cfb8a0 T si_gfx_is_lockup +ffffffff81cfb910 T si_vram_gtt_location +ffffffff81cfb9b0 T si_pcie_gart_tlb_flush +ffffffff81cfba00 T si_ib_parse +ffffffff81cfc0b0 T si_vm_init +ffffffff81cfc0f0 T si_vm_fini +ffffffff81cfc120 T si_vm_flush +ffffffff81cfc800 T si_init_uvd_internal_cg +ffffffff81cfc850 T si_get_csb_size +ffffffff81cfc8e0 T si_get_csb_buffer +ffffffff81cfca70 T si_rlc_reset +ffffffff81cfcaf0 T si_irq_set +ffffffff81cfd000 t si_disable_interrupt_state +ffffffff81cfd280 T si_irq_process +ffffffff81cfe480 t si_irq_ack +ffffffff81cfea80 T si_resume +ffffffff81cfeb10 t si_init_golden_registers +ffffffff81cfecd0 t si_startup +ffffffff81d03500 T si_suspend +ffffffff81d03880 T si_init +ffffffff81d04d50 t si_cp_fini +ffffffff81d04e40 t si_pcie_gart_fini +ffffffff81d04f40 T si_fini +ffffffff81d051f0 T si_get_gpu_clock_counter +ffffffff81d052c0 T si_set_uvd_clocks +ffffffff81d05830 T si_set_vce_clocks +ffffffff81d05d70 t si_vce_send_vcepll_ctlreq +ffffffff81d05fb0 t dce6_latency_watermark +ffffffff81d061e0 t si_rlc_stop +ffffffff81d06390 t si_vm_reg_valid +ffffffff81d064f0 t si_vm_packet3_cp_dma_check +ffffffff81d06670 t si_update_cg +ffffffff81d06bc0 t si_enable_mgcg +ffffffff81d06fe0 t si_enable_cgcg +ffffffff81d08000 T si_dma_is_lockup +ffffffff81d08080 T si_dma_vm_copy_pages +ffffffff81d08160 T si_dma_vm_write_pages +ffffffff81d082c0 T si_dma_vm_set_pages +ffffffff81d08420 T si_dma_vm_flush +ffffffff81d088b0 T si_copy_dma +ffffffff81d09000 T si_dpm_force_performance_level +ffffffff81d09160 T si_get_ddr3_mclk_frequency_ratio +ffffffff81d091c0 T si_get_mclk_frequency_ratio +ffffffff81d09240 T si_trim_voltage_table_to_fit_state_table +ffffffff81d09340 T si_dpm_setup_asic +ffffffff81d09510 T si_fan_ctrl_get_fan_speed_percent +ffffffff81d095a0 T si_fan_ctrl_set_fan_speed_percent +ffffffff81d09660 T si_fan_ctrl_set_mode +ffffffff81d098b0 T si_fan_ctrl_get_mode +ffffffff81d09900 T si_dpm_enable +ffffffff81d0ec00 t si_populate_smc_tdp_limits +ffffffff81d0ee10 T si_dpm_late_enable +ffffffff81d0ef60 T si_dpm_disable +ffffffff81d0f2e0 T si_dpm_pre_set_power_state +ffffffff81d0fee0 T si_dpm_set_power_state +ffffffff81d11460 T si_dpm_post_set_power_state +ffffffff81d11490 T si_dpm_display_configuration_changed +ffffffff81d11570 T si_dpm_init +ffffffff81d13020 T si_dpm_fini +ffffffff81d130d0 T si_dpm_debugfs_print_current_performance_level +ffffffff81d13120 T si_dpm_get_current_sclk +ffffffff81d13190 T si_dpm_get_current_mclk +ffffffff81d13200 t si_get_std_voltage_value +ffffffff81d13330 t si_convert_power_level_to_smc +ffffffff81d13bd0 t si_calculate_sclk_params +ffffffff81d13df0 t si_convert_mc_reg_table_to_smc +ffffffff81d13f50 t si_program_cac_config_registers +ffffffff81d15000 T si_copy_bytes_to_smc +ffffffff81d15250 T si_start_smc +ffffffff81d15290 T si_reset_smc +ffffffff81d152d0 T si_program_jump_on_start +ffffffff81d15300 T si_stop_smc_clock +ffffffff81d15340 T si_start_smc_clock +ffffffff81d15380 T si_is_smc_running +ffffffff81d153e0 T si_send_msg_to_smc +ffffffff81d154b0 T si_wait_for_smc_inactive +ffffffff81d15550 T si_load_smc_ucode +ffffffff81d156f0 T si_read_smc_sram_dword +ffffffff81d157c0 T si_write_smc_sram_dword +ffffffff81d16000 T sumo_get_pi +ffffffff81d16030 T sumo_gfx_clockgating_initialize +ffffffff81d16110 T sumo_program_vc +ffffffff81d16150 T sumo_clear_vc +ffffffff81d16190 T sumo_program_sstp +ffffffff81d16210 T sumo_take_smu_control +ffffffff81d16240 T sumo_get_sleep_divider_from_id +ffffffff81d16270 T sumo_get_sleep_divider_id_from_clock +ffffffff81d16320 T sumo_dpm_enable +ffffffff81d169c0 T sumo_dpm_late_enable +ffffffff81d16f80 T sumo_dpm_disable +ffffffff81d172d0 T sumo_dpm_pre_set_power_state +ffffffff81d17790 T sumo_dpm_set_power_state +ffffffff81d182d0 T sumo_dpm_post_set_power_state +ffffffff81d18370 T sumo_dpm_setup_asic +ffffffff81d18470 T sumo_dpm_display_configuration_changed +ffffffff81d184a0 T sumo_convert_vid2_to_vid7 +ffffffff81d18500 T sumo_construct_sclk_voltage_mapping_table +ffffffff81d185c0 T sumo_construct_vid_mapping_table +ffffffff81d18740 T sumo_dpm_init +ffffffff81d19000 T sumo_dpm_print_power_state +ffffffff81d19120 T sumo_dpm_debugfs_print_current_performance_level +ffffffff81d19150 T sumo_dpm_get_current_sclk +ffffffff81d191c0 T sumo_dpm_get_current_mclk +ffffffff81d191f0 T sumo_dpm_get_current_vddc +ffffffff81d192c0 T sumo_dpm_fini +ffffffff81d19350 T sumo_dpm_get_sclk +ffffffff81d193a0 T sumo_dpm_get_mclk +ffffffff81d193d0 T sumo_dpm_force_performance_level +ffffffff81d197f0 t sumo_power_level_enable +ffffffff81d19a20 t sumo_program_power_level +ffffffff81d1a000 T sumo_initialize_m3_arb +ffffffff81d1a2c0 T sumo_smu_notify_alt_vddnb_change +ffffffff81d1a360 t sumo_send_msg_to_smu +ffffffff81d1a500 T sumo_smu_pg_init +ffffffff81d1a520 T sumo_enable_boost_timer +ffffffff81d1a660 T sumo_set_tdp_limit +ffffffff81d1a6e0 T sumo_boost_state_enable +ffffffff81d1a730 T sumo_get_running_fw_version +ffffffff81d1b000 T trinity_dpm_enable_bapm +ffffffff81d1b080 T trinity_dpm_enable +ffffffff81d1b520 T trinity_dpm_late_enable +ffffffff81d1ba80 T trinity_dpm_disable +ffffffff81d1be90 T trinity_dpm_force_performance_level +ffffffff81d1bf50 T trinity_dpm_pre_set_power_state +ffffffff81d1c520 T trinity_dpm_set_power_state +ffffffff81d1cab0 T trinity_dpm_post_set_power_state +ffffffff81d1cb50 T trinity_dpm_setup_asic +ffffffff81d1cbb0 T trinity_dpm_display_configuration_changed +ffffffff81d1cc40 T trinity_dpm_init +ffffffff81d1d540 T trinity_dpm_print_power_state +ffffffff81d1d650 T trinity_dpm_debugfs_print_current_performance_level +ffffffff81d1d6e0 T trinity_dpm_get_current_sclk +ffffffff81d1d740 T trinity_dpm_get_current_mclk +ffffffff81d1d770 T trinity_dpm_fini +ffffffff81d1d810 T trinity_dpm_get_sclk +ffffffff81d1d860 T trinity_dpm_get_mclk +ffffffff81d1d890 t trinity_program_power_level +ffffffff81d1e000 T trinity_dpm_bapm_enable +ffffffff81d1e150 T trinity_dpm_config +ffffffff81d1e230 T trinity_dpm_force_state +ffffffff81d1e310 T trinity_dpm_n_levels_disabled +ffffffff81d1e3f0 T trinity_uvd_dpm_config +ffffffff81d1e4c0 T trinity_dpm_no_forced_level +ffffffff81d1e590 T trinity_dce_enable_voltage_adjustment +ffffffff81d1e6e0 T trinity_gfx_dynamic_mgpg_config +ffffffff81d1e7b0 T trinity_acquire_mutex +ffffffff81d1e840 T trinity_release_mutex +ffffffff81d1f000 T uvd_v1_0_get_rptr +ffffffff81d1f040 T uvd_v1_0_get_wptr +ffffffff81d1f080 T uvd_v1_0_set_wptr +ffffffff81d1f0c0 T uvd_v1_0_fence_emit +ffffffff81d1f4b0 T uvd_v1_0_resume +ffffffff81d1f610 T uvd_v1_0_init +ffffffff81d1fba0 T uvd_v1_0_start +ffffffff81d20320 T uvd_v1_0_fini +ffffffff81d20490 T uvd_v1_0_stop +ffffffff81d20600 T uvd_v1_0_ring_test +ffffffff81d207d0 T uvd_v1_0_semaphore_emit +ffffffff81d20800 T uvd_v1_0_ib_execute +ffffffff81d209a0 T uvd_v1_0_ib_test +ffffffff81d21000 T uvd_v2_2_fence_emit +ffffffff81d21470 T uvd_v2_2_semaphore_emit +ffffffff81d21680 T uvd_v2_2_resume +ffffffff81d22000 T uvd_v3_1_semaphore_emit +ffffffff81d23000 T uvd_v4_2_resume +ffffffff81d24000 T vce_v1_0_get_rptr +ffffffff81d24090 T vce_v1_0_get_wptr +ffffffff81d24120 T vce_v1_0_set_wptr +ffffffff81d241b0 T vce_v1_0_enable_mgcg +ffffffff81d24470 T vce_v1_0_load_fw +ffffffff81d24640 T vce_v1_0_bo_size +ffffffff81d246b0 T vce_v1_0_resume +ffffffff81d25020 T vce_v1_0_start +ffffffff81d257e0 T vce_v1_0_init +ffffffff81d26000 T vce_v2_0_enable_mgcg +ffffffff81d26070 t vce_v2_0_set_dyn_cg +ffffffff81d26260 T vce_v2_0_bo_size +ffffffff81d262d0 T vce_v2_0_resume +ffffffff81d27000 T aldebaran_reset_init +ffffffff81d270c0 t aldebaran_async_reset +ffffffff81d27120 t aldebaran_get_reset_handler +ffffffff81d271d0 T aldebaran_reset_fini +ffffffff81d27230 t aldebaran_mode2_prepare_hwcontext +ffffffff81d27350 t aldebaran_mode2_perform_reset +ffffffff81d27530 t aldebaran_mode2_restore_hwcontext +ffffffff81d27a10 t aldebaran_mode2_reset +ffffffff81d28000 T aldebaran_reg_base_init +ffffffff81d29000 T amdgpu_acpi_is_pcie_performance_request_supported +ffffffff81d29040 T amdgpu_acpi_is_power_shift_control_supported +ffffffff81d29070 T amdgpu_acpi_pcie_notify_device_ready +ffffffff81d29190 t amdgpu_atcs_call +ffffffff81d29280 T amdgpu_acpi_pcie_performance_request +ffffffff81d294d0 T amdgpu_acpi_power_shift_control +ffffffff81d29580 T amdgpu_acpi_smart_shift_update +ffffffff81d296d0 T amdgpu_acpi_init +ffffffff81d29790 t amdgpu_acpi_event +ffffffff81d29ad0 T amdgpu_acpi_get_backlight_caps +ffffffff81d29b20 T amdgpu_acpi_fini +ffffffff81d29b40 T amdgpu_acpi_should_gpu_reset +ffffffff81d29b90 T amdgpu_acpi_detect +ffffffff81d2b000 T amdgpu_afmt_acr +ffffffff81d2c000 T amdgpu_amdkfd_init +ffffffff81d2c040 T amdgpu_amdkfd_fini +ffffffff81d2c070 T amdgpu_amdkfd_device_probe +ffffffff81d2c0a0 T amdgpu_amdkfd_device_init +ffffffff81d2c270 t amdgpu_amdkfd_reset_work +ffffffff81d2c2f0 T amdgpu_amdkfd_device_fini_sw +ffffffff81d2c340 T amdgpu_amdkfd_interrupt +ffffffff81d2c370 T amdgpu_amdkfd_suspend +ffffffff81d2c3a0 T amdgpu_amdkfd_resume_iommu +ffffffff81d2c3d0 T amdgpu_amdkfd_resume +ffffffff81d2c400 T amdgpu_amdkfd_pre_reset +ffffffff81d2c430 T amdgpu_amdkfd_post_reset +ffffffff81d2c460 T amdgpu_amdkfd_gpu_reset +ffffffff81d2c4c0 T amdgpu_amdkfd_alloc_gtt_mem +ffffffff81d2c770 t amdgpu_bo_reserve +ffffffff81d2c8d0 t amdgpu_bo_unreserve +ffffffff81d2c9b0 T amdgpu_amdkfd_free_gtt_mem +ffffffff81d2ca20 T amdgpu_amdkfd_alloc_gws +ffffffff81d2cb00 T amdgpu_amdkfd_free_gws +ffffffff81d2cb40 T amdgpu_amdkfd_get_fw_version +ffffffff81d2cbf0 T amdgpu_amdkfd_get_local_mem_info +ffffffff81d2ccc0 T amdgpu_amdkfd_get_gpu_clock_counter +ffffffff81d2cd00 T amdgpu_amdkfd_get_max_engine_clock_in_mhz +ffffffff81d2cd80 T amdgpu_amdkfd_get_cu_info +ffffffff81d2ced0 T amdgpu_amdkfd_get_dmabuf_info +ffffffff81d2d010 T amdgpu_amdkfd_get_xgmi_hops_count +ffffffff81d2d080 T amdgpu_amdkfd_get_xgmi_bandwidth_mbytes +ffffffff81d2d110 T amdgpu_amdkfd_get_pcie_bandwidth_mbytes +ffffffff81d2d280 T amdgpu_amdkfd_submit_ib +ffffffff81d2d3e0 T amdgpu_amdkfd_set_compute_idle +ffffffff81d2d430 T amdgpu_amdkfd_is_kfd_vmid +ffffffff81d2d470 T amdgpu_amdkfd_flush_gpu_tlb_vmid +ffffffff81d2d510 T amdgpu_amdkfd_flush_gpu_tlb_pasid +ffffffff81d2d540 T amdgpu_amdkfd_have_atomics_support +ffffffff81d2d570 T amdgpu_amdkfd_ras_poison_consumption_handler +ffffffff81d2d5d0 T amdgpu_amdkfd_ras_query_utcl2_poison_status +ffffffff81d2e000 T amdgpu_atom_execute_table +ffffffff81d2e0a0 t amdgpu_atom_execute_table_locked +ffffffff81d2e3f0 T amdgpu_atom_parse +ffffffff81d2e940 T amdgpu_atom_destroy +ffffffff81d2e980 T amdgpu_atom_asic_init +ffffffff81d2eaa0 T amdgpu_atom_parse_data_header +ffffffff81d2eb40 T amdgpu_atom_parse_cmd_header +ffffffff81d2ebc0 t atom_op_move +ffffffff81d2eda0 t atom_op_and +ffffffff81d2ef80 t atom_op_or +ffffffff81d2f160 t atom_op_shift_left +ffffffff81d2f350 t atom_op_shift_right +ffffffff81d2f540 t atom_op_mul +ffffffff81d2f690 t atom_op_div +ffffffff81d2f800 t atom_op_add +ffffffff81d2f9e0 t atom_op_sub +ffffffff81d2fbc0 t atom_op_setport +ffffffff81d2fd40 t atom_op_setregblock +ffffffff81d2fe00 t atom_op_setfbbase +ffffffff81d2fed0 t atom_op_compare +ffffffff81d300c0 t atom_op_switch +ffffffff81d30310 t atom_op_jump +ffffffff81d30590 t atom_op_test +ffffffff81d30750 t atom_op_delay +ffffffff81d30830 t atom_op_calltable +ffffffff81d30980 t atom_op_repeat +ffffffff81d309b0 t atom_op_clear +ffffffff81d30ac0 t atom_op_nop +ffffffff81d30af0 t atom_op_eot +ffffffff81d30b20 t atom_op_mask +ffffffff81d30df0 t atom_op_postcard +ffffffff81d30ea0 t atom_op_beep +ffffffff81d30ec0 t atom_op_savereg +ffffffff81d30ef0 t atom_op_restorereg +ffffffff81d30f20 t atom_op_setdatablock +ffffffff81d31060 t atom_op_xor +ffffffff81d31240 t atom_op_shl +ffffffff81d31460 t atom_op_shr +ffffffff81d31680 t atom_op_debug +ffffffff81d31730 t atom_op_processds +ffffffff81d317f0 t atom_op_mul32 +ffffffff81d31950 t atom_op_div32 +ffffffff81d31ae0 t atom_put_dst +ffffffff81d31fb0 t atom_get_src_int +ffffffff81d32660 t atom_iio_execute +ffffffff81d33000 T amdgpu_atombios_lookup_i2c_gpio +ffffffff81d33260 T amdgpu_atombios_i2c_init +ffffffff81d33540 T amdgpu_atombios_lookup_gpio +ffffffff81d33640 T amdgpu_atombios_has_dce_engine_info +ffffffff81d336c0 T amdgpu_atombios_get_connector_info_from_object_table +ffffffff81d33f10 T amdgpu_atombios_get_clock_info +ffffffff81d34250 T amdgpu_atombios_get_gfx_info +ffffffff81d34310 T amdgpu_atombios_get_vram_width +ffffffff81d343a0 T amdgpu_atombios_get_asic_ss_info +ffffffff81d34710 T amdgpu_atombios_get_clock_dividers +ffffffff81d34930 T amdgpu_atombios_has_gpu_virtualization_table +ffffffff81d34980 T amdgpu_atombios_scratch_regs_lock +ffffffff81d349e0 T amdgpu_atombios_scratch_regs_engine_hung +ffffffff81d34a30 T amdgpu_atombios_scratch_regs_set_backlight_level +ffffffff81d34a90 T amdgpu_atombios_scratch_need_asic_init +ffffffff81d34ae0 T amdgpu_atombios_copy_swap +ffffffff81d34b00 T amdgpu_atombios_fini +ffffffff81d34ba0 T amdgpu_atombios_init +ffffffff81d34e40 t cail_reg_read +ffffffff81d34e60 t cail_reg_write +ffffffff81d34e80 t cail_mc_read +ffffffff81d34eb0 t cail_mc_write +ffffffff81d34ee0 t cail_pll_read +ffffffff81d34f10 t cail_pll_write +ffffffff81d34f40 T amdgpu_atombios_get_data_table +ffffffff81d35000 T amdgpu_atombios_crtc_overscan_setup +ffffffff81d35150 T amdgpu_atombios_crtc_scaler_setup +ffffffff81d351d0 T amdgpu_atombios_crtc_lock +ffffffff81d35230 T amdgpu_atombios_crtc_enable +ffffffff81d35290 T amdgpu_atombios_crtc_blank +ffffffff81d352f0 T amdgpu_atombios_crtc_powergate +ffffffff81d35360 T amdgpu_atombios_crtc_powergate_init +ffffffff81d353d0 T amdgpu_atombios_crtc_set_dtd_timing +ffffffff81d354e0 T amdgpu_atombios_crtc_set_disp_eng_pll +ffffffff81d355d0 T amdgpu_atombios_crtc_set_dce_clock +ffffffff81d356c0 T amdgpu_atombios_crtc_program_pll +ffffffff81d359d0 T amdgpu_atombios_crtc_prepare_pll +ffffffff81d35ed0 T amdgpu_atombios_crtc_set_pll +ffffffff81d37000 T amdgpu_atombios_dp_aux_init +ffffffff81d37090 t amdgpu_atombios_dp_aux_transfer +ffffffff81d37200 T amdgpu_atombios_dp_get_sinktype +ffffffff81d37270 T amdgpu_atombios_dp_get_dpcd +ffffffff81d37420 T amdgpu_atombios_dp_get_panel_mode +ffffffff81d37510 T amdgpu_atombios_dp_set_link_config +ffffffff81d37590 t amdgpu_atombios_dp_get_dp_link_config +ffffffff81d37710 T amdgpu_atombios_dp_mode_valid_helper +ffffffff81d37790 T amdgpu_atombios_dp_needs_link_train +ffffffff81d37800 T amdgpu_atombios_dp_set_rx_power_state +ffffffff81d37880 T amdgpu_atombios_dp_link_train +ffffffff81d37dd0 t amdgpu_atombios_dp_process_aux_ch +ffffffff81d37f40 t amdgpu_atombios_dp_get_adjust_train +ffffffff81d39000 T amdgpu_atombios_encoder_get_backlight_level_from_reg +ffffffff81d39050 T amdgpu_atombios_encoder_set_backlight_level_to_reg +ffffffff81d390a0 T amdgpu_atombios_encoder_get_backlight_level +ffffffff81d39100 T amdgpu_atombios_encoder_set_backlight_level +ffffffff81d39210 T amdgpu_atombios_encoder_setup_dig_transmitter +ffffffff81d39be0 T amdgpu_atombios_encoder_init_backlight +ffffffff81d39d80 t amdgpu_atombios_encoder_get_backlight_brightness +ffffffff81d39de0 T amdgpu_atombios_encoder_fini_backlight +ffffffff81d39e70 T amdgpu_atombios_encoder_is_digital +ffffffff81d39ec0 T amdgpu_atombios_encoder_mode_fixup +ffffffff81d39fa0 T amdgpu_atombios_encoder_get_encoder_mode +ffffffff81d3a140 T amdgpu_atombios_encoder_setup_dig_encoder +ffffffff81d3a600 T amdgpu_atombios_encoder_set_edp_panel_power +ffffffff81d3a700 T amdgpu_atombios_encoder_dpms +ffffffff81d3a870 t amdgpu_atombios_encoder_setup_dig +ffffffff81d3abe0 t amdgpu_atombios_encoder_setup_dvo +ffffffff81d3ad80 T amdgpu_atombios_encoder_set_crtc_source +ffffffff81d3b160 T amdgpu_atombios_encoder_init_dig +ffffffff81d3b230 t amdgpu_atombios_encoder_setup_external_encoder +ffffffff81d3b490 T amdgpu_atombios_encoder_dac_detect +ffffffff81d3b670 T amdgpu_atombios_encoder_dig_detect +ffffffff81d3b770 T amdgpu_atombios_encoder_setup_ext_encoder_ddc +ffffffff81d3b7c0 T amdgpu_atombios_encoder_set_bios_scratch_regs +ffffffff81d3bd60 T amdgpu_atombios_encoder_get_lcd_info +ffffffff81d3c0c0 T amdgpu_atombios_encoder_get_dig_info +ffffffff81d3c130 t amdgpu_atombios_encoder_update_backlight_status +ffffffff81d3d000 T amdgpu_atombios_i2c_xfer +ffffffff81d3d3b0 T amdgpu_atombios_i2c_func +ffffffff81d3d3e0 T amdgpu_atombios_i2c_channel_trans +ffffffff81d3e000 T amdgpu_atomfirmware_query_firmware_capability +ffffffff81d3e090 T amdgpu_atomfirmware_gpu_virtualization_supported +ffffffff81d3e0c0 T amdgpu_atomfirmware_scratch_regs_init +ffffffff81d3e140 T amdgpu_atomfirmware_allocate_fb_scratch +ffffffff81d3e270 T amdgpu_atomfirmware_get_vram_info +ffffffff81d3e9d0 T amdgpu_atomfirmware_mem_ecc_supported +ffffffff81d3ea80 T amdgpu_atomfirmware_sram_ecc_supported +ffffffff81d3eab0 T amdgpu_atomfirmware_dynamic_boot_config_supported +ffffffff81d3eae0 T amdgpu_atomfirmware_ras_rom_addr +ffffffff81d3eb80 T amdgpu_atomfirmware_get_clock_info +ffffffff81d3eda0 T amdgpu_atomfirmware_get_gfx_info +ffffffff81d3ef40 T amdgpu_atomfirmware_mem_training_supported +ffffffff81d3ef80 T amdgpu_atomfirmware_get_fw_reserved_fb_size +ffffffff81d3f010 T amdgpu_atomfirmware_asic_init +ffffffff81d40000 T amdgpu_benchmark +ffffffff81d407a0 t amdgpu_benchmark_move +ffffffff81d41000 T amdgpu_read_bios +ffffffff81d41190 t check_atom_bios +ffffffff81d412a0 T amdgpu_get_bios +ffffffff81d41850 t igp_read_bios_from_vram +ffffffff81d41990 T amdgpu_soc15_read_bios_from_rom +ffffffff81d42000 T amdgpu_bo_list_create +ffffffff81d42290 T amdgpu_bo_list_get +ffffffff81d422f0 T amdgpu_bo_list_get_list +ffffffff81d42450 T amdgpu_bo_list_put +ffffffff81d42500 T amdgpu_bo_create_list_entry_array +ffffffff81d42650 T amdgpu_bo_list_ioctl +ffffffff81d43000 T amdgpu_cgs_create_device +ffffffff81d43080 T amdgpu_cgs_destroy_device +ffffffff81d430a0 t amdgpu_cgs_read_register +ffffffff81d430c0 t amdgpu_cgs_write_register +ffffffff81d430e0 t amdgpu_cgs_read_ind_register +ffffffff81d431c0 t amdgpu_cgs_write_ind_register +ffffffff81d43270 t amdgpu_cgs_get_firmware_info +ffffffff81d44000 T amdgpu_connector_hotplug +ffffffff81d440f0 T amdgpu_connector_get_monitor_bpc +ffffffff81d44380 T amdgpu_connector_edid +ffffffff81d44430 T amdgpu_connector_encoder_get_dp_bridge_encoder_id +ffffffff81d444b0 T amdgpu_connector_is_dp12_capable +ffffffff81d44540 T amdgpu_connector_add +ffffffff81d45150 t amdgpu_connector_dp_detect +ffffffff81d454c0 t amdgpu_connector_dvi_force +ffffffff81d45510 t amdgpu_connector_set_property +ffffffff81d45a80 t amdgpu_connector_late_register +ffffffff81d45ae0 t amdgpu_connector_unregister +ffffffff81d45b40 t amdgpu_connector_destroy +ffffffff81d45bb0 t amdgpu_connector_best_single_encoder +ffffffff81d45c30 t amdgpu_connector_dp_get_modes +ffffffff81d45f60 t amdgpu_connector_dp_mode_valid +ffffffff81d46080 t amdgpu_connector_dvi_encoder +ffffffff81d46160 t amdgpu_connector_get_edid +ffffffff81d462e0 t amdgpu_connector_fixup_lcd_native_mode +ffffffff81d46410 t amdgpu_connector_add_common_modes +ffffffff81d46500 t amdgpu_connector_lcd_native_mode +ffffffff81d465d0 t amdgpu_connector_set_lcd_property +ffffffff81d466c0 t amdgpu_connector_vga_detect +ffffffff81d46910 t amdgpu_connector_vga_get_modes +ffffffff81d46a00 t amdgpu_connector_vga_mode_valid +ffffffff81d46a50 t amdgpu_connector_dvi_detect +ffffffff81d46e50 t amdgpu_connector_dvi_mode_valid +ffffffff81d46f00 t amdgpu_connector_lvds_detect +ffffffff81d47070 t amdgpu_connector_lvds_get_modes +ffffffff81d471e0 t amdgpu_connector_lvds_mode_valid +ffffffff81d48000 T amdgpu_cs_report_moved_bytes +ffffffff81d48070 T amdgpu_cs_ioctl +ffffffff81d49e40 t amdgpu_cs_parser_fini +ffffffff81d49fd0 T amdgpu_cs_wait_ioctl +ffffffff81d4a110 T amdgpu_cs_fence_to_handle_ioctl +ffffffff81d4a2b0 t amdgpu_cs_get_fence +ffffffff81d4a360 T amdgpu_cs_wait_fences_ioctl +ffffffff81d4a650 T amdgpu_cs_find_mapping +ffffffff81d4a750 t amdgpu_cs_bo_validate +ffffffff81d4aa60 t amdgpu_cs_list_validate +ffffffff81d4b000 T amdgpu_csa_vaddr +ffffffff81d4b060 T amdgpu_allocate_static_csa +ffffffff81d4b100 T amdgpu_free_static_csa +ffffffff81d4b120 T amdgpu_map_static_csa +ffffffff81d4c000 T amdgpu_ctx_priority_is_valid +ffffffff81d4c060 T amdgpu_ctx_get_entity +ffffffff81d4c370 T amdgpu_ctx_ioctl +ffffffff81d4ca70 T amdgpu_ctx_get +ffffffff81d4caf0 T amdgpu_ctx_put +ffffffff81d4cd00 T amdgpu_ctx_add_fence +ffffffff81d4ce70 T amdgpu_ctx_get_fence +ffffffff81d4cf20 T amdgpu_ctx_priority_override +ffffffff81d4d100 T amdgpu_ctx_wait_prev_fence +ffffffff81d4d1b0 T amdgpu_ctx_mgr_init +ffffffff81d4d250 T amdgpu_ctx_mgr_entity_flush +ffffffff81d4d360 T amdgpu_ctx_mgr_entity_fini +ffffffff81d4d610 T amdgpu_ctx_mgr_fini +ffffffff81d4d6c0 t amdgpu_ctx_fini +ffffffff81d4d8a0 T amdgpu_ctx_mgr_usage +ffffffff81d4db00 t amdgpu_ctx_set_stable_pstate +ffffffff81d4e000 T amdgpu_debugfs_init +ffffffff81d4e030 T amdgpu_debugfs_regs_init +ffffffff81d4f000 T amdgpu_device_supports_px +ffffffff81d4f040 T amdgpu_device_supports_boco +ffffffff81d4f070 T amdgpu_device_supports_baco +ffffffff81d4f0a0 T amdgpu_device_supports_smart_shift +ffffffff81d4f0e0 T amdgpu_device_mm_access +ffffffff81d4f340 T amdgpu_device_wreg +ffffffff81d4f440 T amdgpu_device_rreg +ffffffff81d4f520 T amdgpu_device_aper_access +ffffffff81d4f660 T amdgpu_device_flush_hdp +ffffffff81d4f700 T amdgpu_device_invalidate_hdp +ffffffff81d4f780 T amdgpu_device_vram_access +ffffffff81d4f810 T amdgpu_device_skip_hw_access +ffffffff81d4f840 T amdgpu_mm_rreg8 +ffffffff81d4f8c0 T amdgpu_mm_wreg8 +ffffffff81d4f940 T amdgpu_mm_wreg_mmio_rlc +ffffffff81d4fa30 T amdgpu_mm_rdoorbell +ffffffff81d4faa0 T amdgpu_mm_wdoorbell +ffffffff81d4fb00 T amdgpu_mm_rdoorbell64 +ffffffff81d4fb70 T amdgpu_mm_wdoorbell64 +ffffffff81d4fbd0 T amdgpu_device_indirect_rreg +ffffffff81d4fc60 T amdgpu_device_indirect_rreg64 +ffffffff81d4fd10 T amdgpu_device_indirect_wreg +ffffffff81d4fd90 T amdgpu_device_indirect_wreg64 +ffffffff81d4fe20 T amdgpu_device_program_register_sequence +ffffffff81d50060 T amdgpu_device_pci_config_reset +ffffffff81d50090 T amdgpu_device_pci_reset +ffffffff81d500e0 T amdgpu_device_wb_get +ffffffff81d50190 T amdgpu_device_wb_free +ffffffff81d501e0 T amdgpu_device_resize_fb_bar +ffffffff81d50210 T amdgpu_device_need_post +ffffffff81d50340 T amdgpu_device_should_use_aspm +ffffffff81d50390 T amdgpu_device_aspm_support_quirk +ffffffff81d503e0 T amdgpu_device_ip_set_clockgating_state +ffffffff81d504d0 T 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amdgpu_vm_bo_del +ffffffff81db30f0 T amdgpu_vm_evictable +ffffffff81db31a0 T amdgpu_vm_bo_invalidate +ffffffff81db3460 T amdgpu_vm_adjust_size +ffffffff81db36d0 T amdgpu_vm_wait_idle +ffffffff81db3740 T amdgpu_vm_init +ffffffff81db3b00 t amdgpu_bo_reserve +ffffffff81db3c60 t amdgpu_bo_unreserve +ffffffff81db3d40 T amdgpu_vm_make_compute +ffffffff81db3f40 T amdgpu_vm_release_compute +ffffffff81db3ff0 T amdgpu_vm_fini +ffffffff81db4450 T amdgpu_vm_manager_init +ffffffff81db45f0 T amdgpu_vm_manager_fini +ffffffff81db4650 T amdgpu_vm_ioctl +ffffffff81db4770 T amdgpu_vm_get_task_info +ffffffff81db4810 T amdgpu_vm_set_task_info +ffffffff81db4900 T amdgpu_vm_handle_fault +ffffffff81db4ad0 t amdgpu_vm_add_prt_cb +ffffffff81db4c20 t amdgpu_vm_prt_cb +ffffffff81db5000 t amdgpu_vm_cpu_map_table +ffffffff81db5020 t amdgpu_vm_cpu_prepare +ffffffff81db5070 t amdgpu_vm_cpu_update +ffffffff81db5170 t amdgpu_vm_cpu_commit +ffffffff81db6000 T amdgpu_vm_pt_clear +ffffffff81db6430 T amdgpu_vm_pt_create +ffffffff81db6950 T amdgpu_vm_pt_free_work +ffffffff81db6c20 t amdgpu_vm_pt_free +ffffffff81db6d00 T amdgpu_vm_pt_free_root +ffffffff81db6d20 t amdgpu_vm_pt_free_dfs +ffffffff81db7a90 T amdgpu_vm_pt_is_root_clean +ffffffff81db7b60 T amdgpu_vm_pde_update +ffffffff81db7c50 T amdgpu_vm_ptes_update +ffffffff81db8620 t amdgpu_vm_pt_next +ffffffff81db9000 t amdgpu_vm_sdma_map_table +ffffffff81db9060 t amdgpu_vm_sdma_prepare +ffffffff81db9100 t amdgpu_vm_sdma_update +ffffffff81db95e0 t amdgpu_vm_sdma_commit +ffffffff81dba000 T amdgpu_vram_mgr_bo_visible_size +ffffffff81dba110 T amdgpu_vram_mgr_reserve_range +ffffffff81dba1f0 t amdgpu_vram_mgr_do_reserve +ffffffff81dba370 T amdgpu_vram_mgr_query_page_status +ffffffff81dba450 T amdgpu_vram_mgr_alloc_sgt +ffffffff81dba4a0 T amdgpu_vram_mgr_free_sgt +ffffffff81dba4d0 T amdgpu_vram_mgr_vis_usage +ffffffff81dba500 T amdgpu_vram_mgr_init +ffffffff81dba6d0 T amdgpu_vram_mgr_fini +ffffffff81dba8e0 t amdgpu_vram_mgr_new +ffffffff81dbae70 t amdgpu_vram_mgr_del +ffffffff81dbaf50 t amdgpu_vram_mgr_intersects +ffffffff81dbafd0 t amdgpu_vram_mgr_compatible +ffffffff81dbb050 t amdgpu_vram_mgr_debug +ffffffff81dbc000 t amdgpu_xgmi_hive_release +ffffffff81dbc050 T amdgpu_get_xgmi_hive +ffffffff81dbc0a0 T amdgpu_put_xgmi_hive +ffffffff81dbc0f0 T amdgpu_xgmi_set_pstate +ffffffff81dbc140 T amdgpu_xgmi_update_topology +ffffffff81dbc200 T amdgpu_xgmi_get_hops_count +ffffffff81dbc270 T amdgpu_xgmi_get_num_links +ffffffff81dbc2e0 T amdgpu_xgmi_add_device +ffffffff81dbc500 T amdgpu_xgmi_remove_device +ffffffff81dbc650 T amdgpu_xgmi_get_relative_phy_addr +ffffffff81dbc690 t amdgpu_ras_error_inject_xgmi +ffffffff81dbc800 t amdgpu_xgmi_query_ras_error_count +ffffffff81dbd020 t amdgpu_xgmi_reset_ras_error_count +ffffffff81dbd340 t amdgpu_xgmi_ras_late_init +ffffffff81dbe000 T arct_reg_base_init +ffffffff81dbf000 T athub_v1_0_set_clockgating +ffffffff81dbf210 T athub_v1_0_get_clockgating +ffffffff81dc0000 T athub_v2_0_set_clockgating +ffffffff81dc01e0 T athub_v2_0_get_clockgating +ffffffff81dc1000 T athub_v2_1_set_clockgating +ffffffff81dc11f0 T athub_v2_1_get_clockgating +ffffffff81dc2000 T athub_v3_0_set_clockgating +ffffffff81dc20d0 T athub_v3_0_get_clockgating +ffffffff81dc2120 t athub_v3_0_get_cg_cntl +ffffffff81dc21c0 t athub_v3_0_set_cg_cntl +ffffffff81dc3000 t cz_ih_early_init +ffffffff81dc3050 t cz_ih_sw_init +ffffffff81dc30b0 t cz_ih_sw_fini +ffffffff81dc30f0 t cz_ih_hw_init +ffffffff81dc3320 t cz_ih_hw_fini +ffffffff81dc33f0 t cz_ih_suspend +ffffffff81dc34c0 t cz_ih_resume +ffffffff81dc3500 t cz_ih_is_idle +ffffffff81dc3550 t cz_ih_wait_for_idle +ffffffff81dc35f0 t cz_ih_soft_reset +ffffffff81dc36d0 t cz_ih_set_clockgating_state +ffffffff81dc3700 t cz_ih_set_powergating_state +ffffffff81dc3730 t cz_ih_get_wptr +ffffffff81dc3820 t cz_ih_decode_iv +ffffffff81dc38a0 t cz_ih_set_rptr +ffffffff81dc4000 T dce_v10_0_disable_dce +ffffffff81dc4170 t dce_v10_0_early_init +ffffffff81dc4230 t dce_v10_0_sw_init +ffffffff81dc46a0 t dce_v10_0_sw_fini +ffffffff81dc47d0 t dce_v10_0_hw_init +ffffffff81dc4b40 t dce_v10_0_hw_fini +ffffffff81dc4cd0 t dce_v10_0_suspend +ffffffff81dc4d30 t dce_v10_0_resume +ffffffff81dc4da0 t dce_v10_0_is_idle +ffffffff81dc4dd0 t dce_v10_0_wait_for_idle +ffffffff81dc4e00 t dce_v10_0_check_soft_reset +ffffffff81dc4e10 t dce_v10_0_soft_reset +ffffffff81dc4ee0 t dce_v10_0_set_clockgating_state +ffffffff81dc4f10 t dce_v10_0_set_powergating_state +ffffffff81dc4f40 t dce_v10_0_audio_endpt_rreg +ffffffff81dc4fd0 t dce_v10_0_audio_endpt_wreg +ffffffff81dc5050 t dce_v10_0_bandwidth_update +ffffffff81dc5ac0 t dce_v10_0_vblank_get_counter +ffffffff81dc5b10 t dce_v10_0_hpd_sense +ffffffff81dc5b70 t dce_v10_0_hpd_set_polarity +ffffffff81dc5c40 t dce_v10_0_hpd_get_gpio_reg +ffffffff81dc5c70 t dce_v10_0_page_flip +ffffffff81dc5d60 t dce_v10_0_crtc_get_scanoutpos +ffffffff81dc5e00 t dce_v10_0_encoder_add +ffffffff81dc6030 t dce_v10_0_latency_watermark +ffffffff81dc6250 t dce_v10_0_encoder_destroy +ffffffff81dc62b0 t dce_v10_0_encoder_prepare +ffffffff81dc64b0 t dce_v10_0_encoder_commit +ffffffff81dc64e0 t dce_v10_0_encoder_mode_set +ffffffff81dc7380 t dce_v10_0_encoder_disable +ffffffff81dc7490 t dce_v10_0_ext_dpms +ffffffff81dc74c0 t dce_v10_0_ext_prepare +ffffffff81dc74f0 t dce_v10_0_ext_commit +ffffffff81dc7520 t dce_v10_0_ext_mode_set +ffffffff81dc7550 t dce_v10_0_ext_disable +ffffffff81dc7580 t dce_v10_0_set_crtc_irq_state +ffffffff81dc7660 t dce_v10_0_crtc_irq +ffffffff81dc7890 t dce_v10_0_set_crtc_vblank_interrupt_state +ffffffff81dc7960 t dce_v10_0_set_crtc_vline_interrupt_state +ffffffff81dc7a30 t dce_v10_0_set_pageflip_irq_state +ffffffff81dc7ae0 t dce_v10_0_pageflip_irq +ffffffff81dc7c40 t dce_v10_0_set_hpd_irq_state +ffffffff81dc7d10 t dce_v10_0_hpd_irq +ffffffff81dc7e30 t dce_v10_0_crtc_cursor_set2 +ffffffff81dc81a0 t dce_v10_0_crtc_cursor_move +ffffffff81dc8280 t dce_v10_0_crtc_gamma_set +ffffffff81dc82c0 t dce_v10_0_crtc_destroy +ffffffff81dc82f0 t amdgpu_bo_reserve +ffffffff81dc8500 t amdgpu_bo_unreserve +ffffffff81dc85e0 t dce_v10_0_cursor_move_locked +ffffffff81dc8730 t dce_v10_0_crtc_load_lut +ffffffff81dc8ac0 t dce_v10_0_crtc_dpms +ffffffff81dc8c90 t dce_v10_0_crtc_prepare +ffffffff81dc8cd0 t dce_v10_0_crtc_commit +ffffffff81dc8d00 t dce_v10_0_crtc_mode_fixup +ffffffff81dc8ec0 t dce_v10_0_crtc_mode_set +ffffffff81dc90b0 t dce_v10_0_crtc_set_base +ffffffff81dc90d0 t dce_v10_0_crtc_set_base_atomic +ffffffff81dc90f0 t dce_v10_0_crtc_disable +ffffffff81dc9290 t dce_v10_0_crtc_do_set_base +ffffffff81dc9940 t dce_v10_0_is_display_hung +ffffffff81dca000 T dce_v11_0_disable_dce +ffffffff81dca160 t dce_v11_0_early_init +ffffffff81dca2b0 t dce_v11_0_sw_init +ffffffff81dca730 t dce_v11_0_sw_fini +ffffffff81dca860 t dce_v11_0_hw_init +ffffffff81dcac30 t dce_v11_0_hw_fini +ffffffff81dcadc0 t dce_v11_0_suspend +ffffffff81dcae20 t dce_v11_0_resume +ffffffff81dcae90 t dce_v11_0_is_idle +ffffffff81dcaec0 t dce_v11_0_wait_for_idle +ffffffff81dcaef0 t dce_v11_0_soft_reset +ffffffff81dcb110 t dce_v11_0_set_clockgating_state +ffffffff81dcb140 t dce_v11_0_set_powergating_state +ffffffff81dcb170 t dce_v11_0_audio_endpt_rreg +ffffffff81dcb200 t dce_v11_0_audio_endpt_wreg +ffffffff81dcb280 t dce_v11_0_bandwidth_update +ffffffff81dcbcf0 t dce_v11_0_vblank_get_counter +ffffffff81dcbd40 t dce_v11_0_hpd_sense +ffffffff81dcbda0 t dce_v11_0_hpd_set_polarity +ffffffff81dcbe70 t dce_v11_0_hpd_get_gpio_reg +ffffffff81dcbea0 t dce_v11_0_page_flip +ffffffff81dcbfa0 t dce_v11_0_crtc_get_scanoutpos +ffffffff81dcc040 t dce_v11_0_encoder_add +ffffffff81dcc270 t dce_v11_0_latency_watermark +ffffffff81dcc490 t dce_v11_0_encoder_destroy +ffffffff81dcc4f0 t dce_v11_0_encoder_prepare +ffffffff81dcc6f0 t dce_v11_0_encoder_commit +ffffffff81dcc720 t dce_v11_0_encoder_mode_set +ffffffff81dcd5c0 t dce_v11_0_encoder_disable +ffffffff81dcd6d0 t dce_v11_0_ext_dpms +ffffffff81dcd700 t dce_v11_0_ext_prepare +ffffffff81dcd730 t dce_v11_0_ext_commit +ffffffff81dcd760 t dce_v11_0_ext_mode_set +ffffffff81dcd790 t dce_v11_0_ext_disable +ffffffff81dcd7c0 t dce_v11_0_set_crtc_irq_state +ffffffff81dcd8a0 t dce_v11_0_crtc_irq +ffffffff81dcdac0 t dce_v11_0_set_crtc_vblank_interrupt_state +ffffffff81dcdb90 t dce_v11_0_set_crtc_vline_interrupt_state +ffffffff81dcdc60 t dce_v11_0_set_pageflip_irq_state +ffffffff81dcdd10 t dce_v11_0_pageflip_irq +ffffffff81dcde70 t dce_v11_0_set_hpd_irq_state +ffffffff81dcdf40 t dce_v11_0_hpd_irq +ffffffff81dce060 t dce_v11_0_crtc_cursor_set2 +ffffffff81dce3d0 t dce_v11_0_crtc_cursor_move +ffffffff81dce4b0 t dce_v11_0_crtc_gamma_set +ffffffff81dce4f0 t dce_v11_0_crtc_destroy +ffffffff81dce520 t amdgpu_bo_reserve +ffffffff81dce730 t amdgpu_bo_unreserve +ffffffff81dce810 t dce_v11_0_cursor_move_locked +ffffffff81dce960 t dce_v11_0_crtc_load_lut +ffffffff81dcecd0 t dce_v11_0_crtc_dpms +ffffffff81dceea0 t dce_v11_0_crtc_prepare +ffffffff81dceee0 t dce_v11_0_crtc_commit +ffffffff81dcef10 t dce_v11_0_crtc_mode_fixup +ffffffff81dcf180 t dce_v11_0_crtc_mode_set +ffffffff81dcf3e0 t dce_v11_0_crtc_set_base +ffffffff81dcf400 t dce_v11_0_crtc_set_base_atomic +ffffffff81dcf420 t dce_v11_0_crtc_disable +ffffffff81dcf5c0 t dce_v11_0_crtc_do_set_base +ffffffff81dd0000 t df_v1_7_sw_init +ffffffff81dd0040 t df_v1_7_sw_fini +ffffffff81dd0070 t df_v1_7_enable_broadcast_mode +ffffffff81dd0190 t df_v1_7_get_fb_channel_number +ffffffff81dd0210 t df_v1_7_get_hbm_channel_number +ffffffff81dd0260 t df_v1_7_update_medium_grain_clock_gating +ffffffff81dd03d0 t df_v1_7_get_clockgating_state +ffffffff81dd0460 t df_v1_7_enable_ecc_force_par_wr_rmw +ffffffff81dd1000 t df_v3_6_sw_init +ffffffff81dd1160 t df_v3_6_sw_fini +ffffffff81dd1190 t df_v3_6_enable_broadcast_mode +ffffffff81dd12b0 t df_v3_6_get_fb_channel_number +ffffffff81dd1390 t df_v3_6_get_hbm_channel_number +ffffffff81dd13e0 t df_v3_6_update_medium_grain_clock_gating +ffffffff81dd1580 t df_v3_6_get_clockgating_state +ffffffff81dd1610 t df_v3_6_pmc_start +ffffffff81dd1990 t df_v3_6_pmc_stop +ffffffff81dd1c30 t df_v3_6_pmc_get_count +ffffffff81dd1dc0 t df_v3_6_get_fica +ffffffff81dd1ed0 t df_v3_6_set_fica +ffffffff81dd1fb0 t df_v3_6_query_ras_poison_mode +ffffffff81dd2120 t df_v3_6_perfmon_arm_with_status +ffffffff81dd3000 T dimgrey_cavefish_reg_base_init +ffffffff81dd4000 T emu_soc_asic_init +ffffffff81dd5000 t gfx_v10_0_early_init +ffffffff81dd5420 t gfx_v10_0_late_init +ffffffff81dd5490 t gfx_v10_0_sw_init +ffffffff81dd6840 t gfx_v10_0_sw_fini +ffffffff81dd6b80 t gfx_v10_0_hw_init +ffffffff81dd9730 t gfx_v10_0_hw_fini +ffffffff81dd9a20 t gfx_v10_0_suspend +ffffffff81dd9a60 t gfx_v10_0_resume +ffffffff81dd9a70 t gfx_v10_0_is_idle +ffffffff81dd9b00 t gfx_v10_0_wait_for_idle +ffffffff81dd9be0 t gfx_v10_0_soft_reset +ffffffff81dd9f30 t gfx_v10_0_set_clockgating_state +ffffffff81dda1d0 t gfx_v10_0_set_powergating_state +ffffffff81dda3f0 t gfx_v10_0_get_clockgating_state +ffffffff81dda500 t gfx10_kiq_set_resources +ffffffff81dda830 t gfx10_kiq_map_queues +ffffffff81ddabc0 t gfx10_kiq_unmap_queues +ffffffff81ddafc0 t gfx10_kiq_query_status +ffffffff81ddb2c0 t gfx10_kiq_invalidate_tlbs +ffffffff81ddb3e0 t gfx_v10_0_ring_get_rptr_compute +ffffffff81ddb410 t gfx_v10_0_ring_get_wptr_compute +ffffffff81ddb480 t gfx_v10_0_ring_set_wptr_compute +ffffffff81ddb5c0 t gfx_v10_0_ring_emit_ib_compute +ffffffff81ddb910 t gfx_v10_0_ring_emit_fence_kiq +ffffffff81ddbd50 t gfx_v10_0_ring_test_ring +ffffffff81ddbfc0 t gfx_v10_0_ring_test_ib +ffffffff81ddc270 t gfx_v10_0_ring_emit_rreg +ffffffff81ddc510 t gfx_v10_0_ring_emit_wreg +ffffffff81ddc750 t gfx_v10_0_ring_emit_reg_wait +ffffffff81ddc7a0 t gfx_v10_0_ring_emit_reg_write_reg_wait +ffffffff81ddc830 t gfx_v10_0_wait_reg_mem +ffffffff81ddcb60 t gfx_v10_0_ring_get_rptr_gfx +ffffffff81ddcb90 t gfx_v10_0_ring_get_wptr_gfx +ffffffff81ddcca0 t gfx_v10_0_ring_set_wptr_gfx +ffffffff81ddceb0 t gfx_v10_0_ring_emit_ib_gfx +ffffffff81ddd560 t gfx_v10_0_ring_emit_fence +ffffffff81ddd930 t gfx_v10_0_ring_emit_pipeline_sync +ffffffff81ddd990 t gfx_v10_0_ring_emit_vm_flush +ffffffff81dddb60 t gfx_v10_0_ring_emit_hdp_flush +ffffffff81dddc30 t gfx_v10_0_ring_emit_gds_switch +ffffffff81dddd10 t gfx_v10_0_ring_emit_init_cond_exec +ffffffff81dddf40 t gfx_v10_0_ring_emit_patch_cond_exec +ffffffff81dde000 t gfx_v10_0_ring_emit_sb +ffffffff81dde0f0 t gfx_v10_0_ring_emit_cntxcntl +ffffffff81dde5e0 t gfx_v10_0_ring_emit_frame_cntl +ffffffff81dde6f0 t gfx_v10_0_ring_soft_recovery +ffffffff81dde760 t gfx_v10_0_ring_preempt_ib +ffffffff81dde8d0 t gfx_v10_0_emit_mem_sync +ffffffff81ddec10 t gfx_v10_0_write_data_to_reg +ffffffff81ddee20 t gfx_v10_0_set_eop_interrupt_state +ffffffff81ddef00 t gfx_v10_0_eop_irq +ffffffff81ddf0d0 t gfx_v10_0_set_gfx_eop_interrupt_state +ffffffff81ddf260 t gfx_v10_0_set_compute_eop_interrupt_state +ffffffff81ddf410 t gfx_v10_0_kiq_set_interrupt_state +ffffffff81ddf6f0 t gfx_v10_0_kiq_irq +ffffffff81ddf770 t gfx_v10_0_set_priv_reg_fault_state +ffffffff81ddf890 t gfx_v10_0_priv_reg_irq +ffffffff81ddf8f0 t gfx_v10_0_handle_priv_fault +ffffffff81ddfa80 t gfx_v10_0_set_priv_inst_fault_state +ffffffff81ddfba0 t gfx_v10_0_priv_inst_irq +ffffffff81ddfc00 t gfx_v10_0_is_rlc_enabled +ffffffff81ddfc80 t gfx_v10_0_set_safe_mode +ffffffff81ddff20 t gfx_v10_0_unset_safe_mode +ffffffff81ddffd0 t gfx_v10_0_rlc_init +ffffffff81de0050 t gfx_v10_0_get_csb_size +ffffffff81de00b0 t gfx_v10_0_get_csb_buffer +ffffffff81de0230 t gfx_v10_0_rlc_resume +ffffffff81de0d30 t gfx_v10_0_rlc_stop +ffffffff81de0e10 t gfx_v10_0_rlc_reset +ffffffff81de0fb0 t gfx_v10_0_rlc_start +ffffffff81de1150 t gfx_v10_0_update_spm_vmid +ffffffff81de1280 t gfx_v10_0_wait_for_rlc_autoload_complete +ffffffff81de1e10 t gfx_v10_0_init_csb +ffffffff81de20e0 t gfx_v10_0_is_rlcg_access_range +ffffffff81de2110 t gfx_v10_0_gfx_mqd_init +ffffffff81de24f0 t gfx_v10_0_compute_mqd_init +ffffffff81de2990 t amdgpu_bo_unreserve +ffffffff81de2a70 t gfx_v10_0_get_gpu_clock_counter +ffffffff81de2f70 t gfx_v10_0_select_se_sh +ffffffff81de3010 t gfx_v10_0_read_wave_data +ffffffff81de3270 t gfx_v10_0_read_wave_vgprs +ffffffff81de32a0 t gfx_v10_0_read_wave_sgprs +ffffffff81de3320 t gfx_v10_0_select_me_pipe_q +ffffffff81de3340 t gfx_v10_0_init_spm_golden_registers +ffffffff81de33b0 t gfx_v10_0_update_perfmon_mgcg +ffffffff81de34d0 t wave_read_ind +ffffffff81de35b0 t wave_read_regs +ffffffff81de3710 t gfx_v10_0_cp_resume +ffffffff81de6350 t gfx_v10_3_get_disabled_sa +ffffffff81de6460 t gfx_v10_0_get_rb_active_bitmap +ffffffff81de6580 t gfx_v10_0_get_wgp_active_bitmap_per_sh +ffffffff81de6690 t gfx_v10_0_enable_gui_idle_interrupt +ffffffff81de67a0 t gfx_v10_0_cp_gfx_enable +ffffffff81de69e0 t gfx_v10_0_cp_compute_enable +ffffffff81de6b70 t amdgpu_bo_reserve +ffffffff81de6cf0 t gfx_v10_0_kiq_init_register +ffffffff81de7b60 t gfx_v10_0_cp_gfx_switch_pipe +ffffffff81de7c60 t gfx_v10_0_cp_gfx_set_doorbell +ffffffff81de7f30 t gfx_v10_0_cp_gfx_start +ffffffff81de8910 t gfx_v10_0_update_fine_grain_clock_gating +ffffffff81de8c30 t gfx_v10_0_update_medium_grain_clock_gating +ffffffff81de9350 t gfx_v10_0_update_3d_clock_gating +ffffffff81de9710 t gfx_v10_0_update_coarse_grain_clock_gating +ffffffff81dea000 t gfx_v11_0_early_init +ffffffff81dea3a0 t gfx_v11_0_late_init +ffffffff81dea410 t gfx_v11_0_sw_init +ffffffff81deb360 t gfx_v11_0_sw_fini +ffffffff81deb640 t gfx_v11_0_hw_init +ffffffff81defac0 t gfx_v11_0_hw_fini +ffffffff81defd40 t gfx_v11_0_suspend +ffffffff81defd80 t gfx_v11_0_resume +ffffffff81defd90 t gfx_v11_0_is_idle +ffffffff81defe20 t gfx_v11_0_wait_for_idle +ffffffff81deff00 t gfx_v11_0_check_soft_reset +ffffffff81df0030 t gfx_v11_0_soft_reset +ffffffff81df0d10 t gfx_v11_0_post_soft_reset +ffffffff81df0d20 t gfx_v11_0_set_clockgating_state +ffffffff81df1900 t gfx_v11_0_set_powergating_state +ffffffff81df1af0 t gfx_v11_0_get_clockgating_state +ffffffff81df1cc0 t gfx11_kiq_set_resources +ffffffff81df1ff0 t gfx11_kiq_map_queues +ffffffff81df2380 t gfx11_kiq_unmap_queues +ffffffff81df2780 t gfx11_kiq_query_status +ffffffff81df2a80 t gfx11_kiq_invalidate_tlbs +ffffffff81df2ba0 t gfx_v11_0_ring_get_rptr_compute +ffffffff81df2bd0 t gfx_v11_0_ring_get_wptr_compute +ffffffff81df2c40 t gfx_v11_0_ring_set_wptr_compute +ffffffff81df2d80 t gfx_v11_0_ring_emit_ib_compute +ffffffff81df30d0 t gfx_v11_0_ring_emit_fence_kiq +ffffffff81df3510 t gfx_v11_0_ring_test_ring +ffffffff81df37a0 t gfx_v11_0_ring_test_ib +ffffffff81df3a60 t gfx_v11_0_ring_emit_rreg +ffffffff81df3d00 t gfx_v11_0_ring_emit_wreg +ffffffff81df3f40 t gfx_v11_0_ring_emit_reg_wait +ffffffff81df3f90 t gfx_v11_0_ring_emit_reg_write_reg_wait +ffffffff81df4000 t gfx_v11_0_wait_reg_mem +ffffffff81df4330 t gfx_v11_0_ring_get_rptr_gfx +ffffffff81df4360 t gfx_v11_0_ring_get_wptr_gfx +ffffffff81df4470 t gfx_v11_0_ring_set_wptr_gfx +ffffffff81df4680 t gfx_v11_0_ring_emit_ib_gfx +ffffffff81df4d20 t gfx_v11_0_ring_emit_fence +ffffffff81df50f0 t gfx_v11_0_ring_emit_pipeline_sync +ffffffff81df5150 t gfx_v11_0_ring_emit_vm_flush +ffffffff81df5320 t gfx_v11_0_ring_emit_hdp_flush +ffffffff81df53f0 t gfx_v11_0_ring_emit_gds_switch +ffffffff81df54d0 t gfx_v11_0_ring_emit_init_cond_exec +ffffffff81df5700 t gfx_v11_0_ring_emit_patch_cond_exec +ffffffff81df57c0 t gfx_v11_0_ring_emit_cntxcntl +ffffffff81df5920 t gfx_v11_0_ring_emit_frame_cntl +ffffffff81df5a30 t gfx_v11_0_ring_soft_recovery +ffffffff81df5aa0 t gfx_v11_0_ring_preempt_ib +ffffffff81df5c10 t gfx_v11_0_emit_mem_sync +ffffffff81df5f50 t gfx_v11_0_write_data_to_reg +ffffffff81df6160 t gfx_v11_0_set_eop_interrupt_state +ffffffff81df61f0 t gfx_v11_0_eop_irq +ffffffff81df63c0 t gfx_v11_0_set_gfx_eop_interrupt_state +ffffffff81df6550 t gfx_v11_0_set_compute_eop_interrupt_state +ffffffff81df66e0 t gfx_v11_0_set_priv_reg_fault_state +ffffffff81df6800 t gfx_v11_0_priv_reg_irq +ffffffff81df6860 t gfx_v11_0_handle_priv_fault +ffffffff81df69f0 t gfx_v11_0_set_priv_inst_fault_state +ffffffff81df6b10 t gfx_v11_0_priv_inst_irq +ffffffff81df6b70 t gfx_v11_0_is_rlc_enabled +ffffffff81df6bf0 t gfx_v11_0_set_safe_mode +ffffffff81df6d40 t gfx_v11_0_unset_safe_mode +ffffffff81df6db0 t gfx_v11_0_rlc_init +ffffffff81df6e30 t gfx_v11_0_get_csb_size +ffffffff81df6e90 t gfx_v11_0_get_csb_buffer +ffffffff81df7010 t gfx_v11_0_rlc_resume +ffffffff81df7d30 t gfx_v11_0_rlc_stop +ffffffff81df7e10 t gfx_v11_0_rlc_reset +ffffffff81df7fb0 t gfx_v11_0_rlc_start +ffffffff81df8150 t gfx_v11_0_update_spm_vmid +ffffffff81df8250 t gfx_v11_0_init_csb +ffffffff81df83d0 t gfx_v11_0_gfx_mqd_init +ffffffff81df87a0 t gfx_v11_0_compute_mqd_init +ffffffff81df8cc0 t amdgpu_bo_unreserve +ffffffff81df8da0 t gfx_v11_0_get_gpu_clock_counter +ffffffff81df8ed0 t gfx_v11_0_select_se_sh +ffffffff81df8f70 t gfx_v11_0_read_wave_data +ffffffff81df91b0 t gfx_v11_0_read_wave_vgprs +ffffffff81df91e0 t gfx_v11_0_read_wave_sgprs +ffffffff81df9260 t gfx_v11_0_select_me_pipe_q +ffffffff81df9280 t gfx_v11_0_update_perf_clk +ffffffff81df93b0 t wave_read_ind +ffffffff81df9490 t wave_read_regs +ffffffff81df95f0 t gfx_v11_0_disable_gpa_mode +ffffffff81df9780 t gfx_v11_0_cp_resume +ffffffff81dfd820 t gfx_v11_0_config_me_cache +ffffffff81dfdbc0 t gfx_v11_0_config_pfp_cache +ffffffff81dfdf60 t gfx_v11_0_config_mec_cache +ffffffff81dfe300 t gfx_v11_0_enable_gui_idle_interrupt +ffffffff81dfe410 t gfx_v11_0_cp_compute_enable +ffffffff81dfe5e0 t gfx_v11_0_cp_gfx_enable +ffffffff81dfe7d0 t amdgpu_bo_reserve +ffffffff81dfe950 t gfx_v11_0_kiq_init_register +ffffffff81dff7c0 t gfx_v11_0_cp_gfx_switch_pipe +ffffffff81dff8a0 t gfx_v11_0_cp_gfx_set_doorbell +ffffffff81dffa80 t gfx_v11_0_cp_gfx_start +ffffffff81e01000 t gfx_v8_0_early_init +ffffffff81e01320 t gfx_v8_0_late_init +ffffffff81e01a20 t gfx_v8_0_sw_init +ffffffff81e030f0 t gfx_v8_0_sw_fini +ffffffff81e033b0 t gfx_v8_0_hw_init +ffffffff81e055e0 t gfx_v8_0_hw_fini +ffffffff81e05ad0 t gfx_v8_0_suspend +ffffffff81e05b10 t gfx_v8_0_resume +ffffffff81e05b20 t gfx_v8_0_is_idle +ffffffff81e05b90 t gfx_v8_0_wait_for_idle +ffffffff81e05c40 t gfx_v8_0_check_soft_reset +ffffffff81e05d20 t gfx_v8_0_pre_soft_reset +ffffffff81e05ea0 t gfx_v8_0_soft_reset +ffffffff81e06060 t gfx_v8_0_post_soft_reset +ffffffff81e06220 t gfx_v8_0_set_clockgating_state +ffffffff81e064e0 t gfx_v8_0_set_powergating_state +ffffffff81e068a0 t gfx_v8_0_get_clockgating_state +ffffffff81e06980 t gfx_v8_0_get_gpu_clock_counter +ffffffff81e06a20 t gfx_v8_0_select_se_sh +ffffffff81e06a80 t gfx_v8_0_read_wave_data +ffffffff81e06f20 t gfx_v8_0_read_wave_sgprs +ffffffff81e06fd0 t gfx_v8_0_select_me_pipe_q +ffffffff81e06ff0 t gfx_v8_0_ring_get_rptr +ffffffff81e07020 t gfx_v8_0_ring_get_wptr_compute +ffffffff81e07050 t gfx_v8_0_ring_set_wptr_compute +ffffffff81e07090 t gfx_v8_0_ring_emit_fence_kiq +ffffffff81e074c0 t gfx_v8_0_ring_test_ring +ffffffff81e076c0 t gfx_v8_0_ring_emit_rreg +ffffffff81e07960 t gfx_v8_0_ring_emit_wreg +ffffffff81e07ba0 t gfx_v8_0_ring_get_wptr_gfx +ffffffff81e07c00 t gfx_v8_0_ring_set_wptr_gfx +ffffffff81e07c70 t gfx_v8_0_ring_emit_ib_gfx +ffffffff81e081d0 t gfx_v8_0_ring_emit_fence_gfx +ffffffff81e086d0 t gfx_v8_0_ring_emit_pipeline_sync +ffffffff81e089c0 t gfx_v8_0_ring_emit_vm_flush +ffffffff81e08d70 t gfx_v8_0_ring_emit_hdp_flush +ffffffff81e09090 t gfx_v8_0_ring_emit_gds_switch +ffffffff81e09860 t gfx_v8_0_ring_test_ib +ffffffff81e09a10 t gfx_v8_0_ring_emit_init_cond_exec +ffffffff81e09c40 t gfx_v8_0_ring_emit_patch_cond_exec +ffffffff81e09cf0 t gfx_v8_ring_emit_sb +ffffffff81e09de0 t gfx_v8_ring_emit_cntxcntl +ffffffff81e0a380 t gfx_v8_0_ring_soft_recovery +ffffffff81e0a3b0 t gfx_v8_0_emit_mem_sync +ffffffff81e0a5c0 t gfx_v8_0_ring_emit_ib_compute +ffffffff81e0a8d0 t gfx_v8_0_ring_emit_fence_compute +ffffffff81e0abd0 t gfx_v8_0_emit_mem_sync_compute +ffffffff81e0ae90 t gfx_v8_0_emit_wave_limit +ffffffff81e0b040 t gfx_v8_0_set_eop_interrupt_state +ffffffff81e0b250 t gfx_v8_0_eop_irq +ffffffff81e0b380 t gfx_v8_0_set_priv_reg_fault_state +ffffffff81e0b400 t gfx_v8_0_priv_reg_irq +ffffffff81e0b520 t gfx_v8_0_set_priv_inst_fault_state +ffffffff81e0b5a0 t gfx_v8_0_priv_inst_irq +ffffffff81e0b6c0 t gfx_v8_0_set_cp_ecc_int_state +ffffffff81e0b930 t gfx_v8_0_cp_ecc_error_irq +ffffffff81e0b980 t gfx_v8_0_set_sq_int_state +ffffffff81e0ba10 t gfx_v8_0_sq_irq +ffffffff81e0bab0 t gfx_v8_0_parse_sq_irq +ffffffff81e0bd00 t gfx_v8_0_is_rlc_enabled +ffffffff81e0bd40 t gfx_v8_0_set_safe_mode +ffffffff81e0be40 t gfx_v8_0_unset_safe_mode +ffffffff81e0bee0 t gfx_v8_0_rlc_init +ffffffff81e0bf90 t gfx_v8_0_get_csb_size +ffffffff81e0bff0 t gfx_v8_0_get_csb_buffer +ffffffff81e0c170 t gfx_v8_0_cp_jump_table_num +ffffffff81e0c1b0 t gfx_v8_0_rlc_resume +ffffffff81e0c540 t gfx_v8_0_rlc_stop +ffffffff81e0c5b0 t gfx_v8_0_rlc_reset +ffffffff81e0c630 t gfx_v8_0_rlc_start +ffffffff81e0c6b0 t gfx_v8_0_update_spm_vmid +ffffffff81e0c720 t gfx_v8_0_init_save_restore_list +ffffffff81e0cb40 t gfx_v8_0_wait_for_rlc_serdes +ffffffff81e0cd60 t gfx_v8_0_sq_irq_work_func +ffffffff81e0cd80 t amdgpu_bo_unreserve +ffffffff81e0ce60 t gfx_v8_0_kiq_resume +ffffffff81e0d0c0 t gfx_v8_0_cp_gfx_resume +ffffffff81e0dbe0 t gfx_v8_0_kcq_resume +ffffffff81e0e610 t amdgpu_bo_reserve +ffffffff81e0e790 t gfx_v8_0_mqd_commit +ffffffff81e0e970 t gfx_v8_0_mqd_init +ffffffff81e0ed90 t gfx_v8_0_deactivate_hqd +ffffffff81e0ee50 t gfx_v8_0_update_medium_grain_clock_gating +ffffffff81e0f180 t gfx_v8_0_update_coarse_grain_clock_gating +ffffffff81e10000 t gfx_v9_0_ras_error_inject +ffffffff81e101a0 t gfx_v9_0_query_ras_error_count +ffffffff81e10d40 t gfx_v9_0_reset_ras_error_count +ffffffff81e11780 T gfx_v9_0_select_se_sh +ffffffff81e11820 t gfx_v9_0_early_init +ffffffff81e11c80 t gfx_v9_0_late_init +ffffffff81e12990 t gfx_v9_0_sw_init +ffffffff81e14000 t gfx_v9_0_sw_fini +ffffffff81e142b0 t gfx_v9_0_hw_init +ffffffff81e17360 t gfx_v9_0_hw_fini +ffffffff81e17ac0 t gfx_v9_0_suspend +ffffffff81e17b00 t gfx_v9_0_resume +ffffffff81e17b10 t gfx_v9_0_is_idle +ffffffff81e17b90 t gfx_v9_0_wait_for_idle +ffffffff81e17c70 t gfx_v9_0_soft_reset +ffffffff81e18000 t gfx_v9_0_set_clockgating_state +ffffffff81e180d0 t gfx_v9_0_set_powergating_state +ffffffff81e184d0 t gfx_v9_0_get_clockgating_state +ffffffff81e185e0 t gfx_v9_0_kiq_set_resources +ffffffff81e18910 t gfx_v9_0_kiq_map_queues +ffffffff81e18c50 t gfx_v9_0_kiq_unmap_queues +ffffffff81e18fd0 t gfx_v9_0_kiq_query_status +ffffffff81e192d0 t gfx_v9_0_kiq_invalidate_tlbs +ffffffff81e193f0 t gfx_v9_0_ring_get_rptr_compute +ffffffff81e19420 t gfx_v9_0_ring_get_wptr_compute +ffffffff81e19490 t gfx_v9_0_ring_set_wptr_compute +ffffffff81e194f0 t gfx_v9_0_ring_emit_fence_kiq +ffffffff81e19930 t gfx_v9_0_ring_test_ring +ffffffff81e19b60 t gfx_v9_0_ring_emit_rreg +ffffffff81e19e00 t gfx_v9_0_ring_emit_wreg +ffffffff81e1a040 t gfx_v9_0_ring_emit_reg_wait +ffffffff81e1a090 t gfx_v9_0_ring_emit_reg_write_reg_wait +ffffffff81e1a130 t gfx_v9_0_wait_reg_mem +ffffffff81e1a460 t gfx_v9_0_ring_get_rptr_gfx +ffffffff81e1a490 t gfx_v9_0_ring_get_wptr_gfx +ffffffff81e1a5a0 t gfx_v9_0_ring_set_wptr_gfx +ffffffff81e1a6d0 t gfx_v9_0_ring_emit_ib_gfx +ffffffff81e1abf0 t gfx_v9_0_ring_emit_fence +ffffffff81e1afb0 t gfx_v9_0_ring_emit_pipeline_sync +ffffffff81e1b010 t gfx_v9_0_ring_emit_vm_flush +ffffffff81e1b120 t gfx_v9_0_ring_emit_hdp_flush +ffffffff81e1b1f0 t gfx_v9_0_ring_emit_gds_switch +ffffffff81e1b2d0 t gfx_v9_0_ring_test_ib +ffffffff81e1b480 t gfx_v9_0_ring_emit_init_cond_exec +ffffffff81e1b6b0 t gfx_v9_0_ring_emit_patch_cond_exec +ffffffff81e1b780 t gfx_v9_ring_emit_sb +ffffffff81e1b870 t gfx_v9_ring_emit_cntxcntl +ffffffff81e1bc70 t gfx_v9_0_ring_emit_frame_cntl +ffffffff81e1bd80 t gfx_v9_0_ring_soft_recovery +ffffffff81e1bdf0 t gfx_v9_0_emit_mem_sync +ffffffff81e1c0b0 t gfx_v9_0_write_data_to_reg +ffffffff81e1c2c0 t gfx_v9_0_ring_emit_ib_compute +ffffffff81e1c5f0 t gfx_v9_0_emit_wave_limit +ffffffff81e1c7c0 t gfx_v9_0_set_eop_interrupt_state +ffffffff81e1c990 t gfx_v9_0_eop_irq +ffffffff81e1cac0 t gfx_v9_0_set_compute_eop_interrupt_state +ffffffff81e1cc70 t gfx_v9_0_set_priv_reg_fault_state +ffffffff81e1cd90 t gfx_v9_0_priv_reg_irq +ffffffff81e1ceb0 t gfx_v9_0_set_priv_inst_fault_state +ffffffff81e1cfd0 t gfx_v9_0_priv_inst_irq +ffffffff81e1d0f0 t gfx_v9_0_set_cp_ecc_error_state +ffffffff81e1d920 t gfx_v9_0_is_rlc_enabled +ffffffff81e1d9a0 t gfx_v9_0_set_safe_mode +ffffffff81e1daf0 t gfx_v9_0_unset_safe_mode +ffffffff81e1db60 t gfx_v9_0_rlc_init +ffffffff81e1e370 t gfx_v9_0_get_csb_size +ffffffff81e1e3d0 t gfx_v9_0_get_csb_buffer +ffffffff81e1e520 t gfx_v9_0_cp_jump_table_num +ffffffff81e1e570 t gfx_v9_0_rlc_resume +ffffffff81e1f310 t gfx_v9_0_rlc_stop +ffffffff81e1f7b0 t gfx_v9_0_rlc_reset +ffffffff81e1f940 t gfx_v9_0_rlc_start +ffffffff81e1fa80 t gfx_v9_0_update_spm_vmid +ffffffff81e1fbb0 t gfx_v9_0_is_rlcg_access_range +ffffffff81e1fc00 t gfx_v9_0_init_always_on_cu_mask +ffffffff81e1ff60 t gfx_v9_0_init_csb +ffffffff81e200f0 t gfx_v9_0_enable_lbpw +ffffffff81e201e0 t gfx_v9_0_enable_gui_idle_interrupt +ffffffff81e202e0 t amdgpu_bo_unreserve +ffffffff81e203c0 t gfx_v9_0_get_gpu_clock_counter +ffffffff81e20b40 t gfx_v9_0_read_wave_data +ffffffff81e20d80 t gfx_v9_0_read_wave_vgprs +ffffffff81e20da0 t gfx_v9_0_read_wave_sgprs +ffffffff81e20df0 t gfx_v9_0_select_me_pipe_q +ffffffff81e20e10 t wave_read_ind +ffffffff81e20f20 t wave_read_regs +ffffffff81e21090 t gfx_v9_0_cp_gfx_enable +ffffffff81e21170 t amdgpu_bo_reserve +ffffffff81e212f0 t gfx_v9_0_kiq_init_register +ffffffff81e21f70 t gfx_v9_0_mqd_init +ffffffff81e224b0 t gfx_v9_0_update_medium_grain_clock_gating +ffffffff81e229c0 t gfx_v9_0_update_3d_clock_gating +ffffffff81e22da0 t gfx_v9_0_update_coarse_grain_clock_gating +ffffffff81e24000 t gfx_v9_4_ras_error_inject +ffffffff81e24130 t gfx_v9_4_query_ras_error_count +ffffffff81e24ef0 t gfx_v9_4_query_ras_error_status +ffffffff81e250c0 t gfx_v9_4_reset_ras_error_count +ffffffff81e26000 T gfx_v9_4_2_do_edc_gpr_workarounds +ffffffff81e26790 T gfx_v9_4_2_init_golden_registers +ffffffff81e26830 T gfx_v9_4_2_debug_trap_config_init +ffffffff81e268d0 T gfx_v9_4_2_set_power_brake_sequence +ffffffff81e26aa0 t gfx_v9_4_2_ras_error_inject +ffffffff81e26bd0 t gfx_v9_4_2_query_ras_error_count +ffffffff81e26c80 t gfx_v9_4_2_query_ras_error_status +ffffffff81e274d0 t gfx_v9_4_2_reset_ras_error_count +ffffffff81e27530 t gfx_v9_4_2_reset_ras_error_status +ffffffff81e279f0 t gfx_v9_4_2_enable_watchdog_timer +ffffffff81e27c10 t gfx_v9_4_2_query_uctl2_poison_status +ffffffff81e27c90 t gfx_v9_4_2_run_shader +ffffffff81e28010 t gfx_v9_4_2_wait_for_waves_assigned +ffffffff81e28650 t gfx_v9_4_2_query_sram_edc_count +ffffffff81e289a0 t gfx_v9_4_2_query_utc_edc_count +ffffffff81e28b80 t wave_read_ind +ffffffff81e29000 t gfxhub_v1_0_get_mc_fb_offset +ffffffff81e29090 t gfxhub_v1_0_setup_vm_pt_regs +ffffffff81e291d0 t gfxhub_v1_0_gart_enable +ffffffff81e2a6c0 t gfxhub_v1_0_gart_disable +ffffffff81e2a950 t gfxhub_v1_0_set_fault_enable_default +ffffffff81e2aa40 t gfxhub_v1_0_init +ffffffff81e2b000 T gfxhub_v1_1_get_xgmi_info +ffffffff81e2c000 t gfxhub_v2_0_get_fb_location +ffffffff81e2c090 t gfxhub_v2_0_get_mc_fb_offset +ffffffff81e2c120 t gfxhub_v2_0_setup_vm_pt_regs +ffffffff81e2c260 t gfxhub_v2_0_gart_enable +ffffffff81e2d460 t gfxhub_v2_0_gart_disable +ffffffff81e2d6a0 t gfxhub_v2_0_set_fault_enable_default +ffffffff81e2d790 t gfxhub_v2_0_init +ffffffff81e2d860 t gfxhub_v2_0_print_l2_protection_fault_status +ffffffff81e2da40 t gfxhub_v2_0_get_invalidate_req +ffffffff81e2e000 t gfxhub_v2_1_get_fb_location +ffffffff81e2e090 t gfxhub_v2_1_get_mc_fb_offset +ffffffff81e2e120 t gfxhub_v2_1_setup_vm_pt_regs +ffffffff81e2e260 t gfxhub_v2_1_gart_enable +ffffffff81e2f540 t gfxhub_v2_1_gart_disable +ffffffff81e2f7c0 t gfxhub_v2_1_set_fault_enable_default +ffffffff81e2f8d0 t gfxhub_v2_1_init +ffffffff81e2f9a0 t gfxhub_v2_1_get_xgmi_info +ffffffff81e2fad0 t gfxhub_v2_1_utcl2_harvest +ffffffff81e2fcb0 t gfxhub_v2_1_save_regs +ffffffff81e306e0 t gfxhub_v2_1_restore_regs +ffffffff81e312c0 t gfxhub_v2_1_halt +ffffffff81e31680 t gfxhub_v2_1_print_l2_protection_fault_status +ffffffff81e31860 t gfxhub_v2_1_get_invalidate_req +ffffffff81e32000 t gfxhub_v3_0_get_fb_location +ffffffff81e32090 t gfxhub_v3_0_get_mc_fb_offset +ffffffff81e32120 t gfxhub_v3_0_setup_vm_pt_regs +ffffffff81e32260 t gfxhub_v3_0_gart_enable +ffffffff81e334e0 t gfxhub_v3_0_gart_disable +ffffffff81e33760 t gfxhub_v3_0_set_fault_enable_default +ffffffff81e33b00 t gfxhub_v3_0_init +ffffffff81e33bd0 t gfxhub_v3_0_print_l2_protection_fault_status +ffffffff81e33db0 t gfxhub_v3_0_get_invalidate_req +ffffffff81e34000 t gfxhub_v3_0_3_get_fb_location +ffffffff81e34090 t gfxhub_v3_0_3_get_mc_fb_offset +ffffffff81e34120 t gfxhub_v3_0_3_setup_vm_pt_regs +ffffffff81e34260 t gfxhub_v3_0_3_gart_enable +ffffffff81e354f0 t gfxhub_v3_0_3_gart_disable +ffffffff81e35790 t gfxhub_v3_0_3_set_fault_enable_default +ffffffff81e358a0 t gfxhub_v3_0_3_init +ffffffff81e35970 t gfxhub_v3_0_3_print_l2_protection_fault_status +ffffffff81e35b50 t gfxhub_v3_0_3_get_invalidate_req +ffffffff81e36000 t gmc_v10_0_early_init +ffffffff81e361f0 t gmc_v10_0_late_init +ffffffff81e36260 t gmc_v10_0_sw_init +ffffffff81e36680 t gmc_v10_0_sw_fini +ffffffff81e366d0 t gmc_v10_0_hw_init +ffffffff81e368a0 t gmc_v10_0_hw_fini +ffffffff81e36940 t gmc_v10_0_suspend +ffffffff81e369e0 t gmc_v10_0_resume +ffffffff81e36a40 t gmc_v10_0_is_idle +ffffffff81e36a70 t gmc_v10_0_wait_for_idle +ffffffff81e36aa0 t gmc_v10_0_soft_reset +ffffffff81e36ad0 t gmc_v10_0_set_clockgating_state +ffffffff81e36b80 t gmc_v10_0_set_powergating_state +ffffffff81e36bb0 t gmc_v10_0_get_clockgating_state +ffffffff81e36c50 t gmc_v10_0_flush_gpu_tlb +ffffffff81e36f00 t gmc_v10_0_flush_gpu_tlb_pasid +ffffffff81e37120 t gmc_v10_0_emit_flush_gpu_tlb +ffffffff81e372d0 t gmc_v10_0_emit_pasid_mapping +ffffffff81e37340 t gmc_v10_0_map_mtype +ffffffff81e37390 t gmc_v10_0_get_vm_pde +ffffffff81e37480 t gmc_v10_0_get_vm_pte +ffffffff81e37530 t gmc_v10_0_get_vbios_fb_size +ffffffff81e376a0 t gmc_v10_0_flush_vm_hub +ffffffff81e37b00 t gmc_v10_0_vm_fault_interrupt_state +ffffffff81e37b70 t gmc_v10_0_process_interrupt +ffffffff81e37e30 t gmc_v10_0_ecc_interrupt_state +ffffffff81e38000 t gmc_v11_0_early_init +ffffffff81e38230 t gmc_v11_0_late_init +ffffffff81e382a0 t gmc_v11_0_sw_init +ffffffff81e385c0 t gmc_v11_0_sw_fini +ffffffff81e38610 t gmc_v11_0_hw_init +ffffffff81e38750 t gmc_v11_0_hw_fini +ffffffff81e387e0 t gmc_v11_0_suspend +ffffffff81e38870 t gmc_v11_0_resume +ffffffff81e388d0 t gmc_v11_0_is_idle +ffffffff81e38900 t gmc_v11_0_wait_for_idle +ffffffff81e38930 t gmc_v11_0_soft_reset +ffffffff81e38960 t gmc_v11_0_set_clockgating_state +ffffffff81e389e0 t gmc_v11_0_set_powergating_state +ffffffff81e38a10 t gmc_v11_0_get_clockgating_state +ffffffff81e38a50 t gmc_v11_0_flush_gpu_tlb +ffffffff81e38f20 t gmc_v11_0_flush_gpu_tlb_pasid +ffffffff81e39110 t gmc_v11_0_emit_flush_gpu_tlb +ffffffff81e392c0 t gmc_v11_0_emit_pasid_mapping +ffffffff81e39330 t gmc_v11_0_map_mtype +ffffffff81e39380 t gmc_v11_0_get_vm_pde +ffffffff81e39480 t gmc_v11_0_get_vm_pte +ffffffff81e39530 t gmc_v11_0_get_vbios_fb_size +ffffffff81e39560 t gmc_v11_0_vm_fault_interrupt_state +ffffffff81e395d0 t gmc_v11_0_process_interrupt +ffffffff81e397f0 t gmc_v11_0_ecc_interrupt_state +ffffffff81e3a000 t gmc_v7_0_early_init +ffffffff81e3a090 t gmc_v7_0_late_init +ffffffff81e3a0e0 t gmc_v7_0_sw_init +ffffffff81e3a5e0 t gmc_v7_0_sw_fini +ffffffff81e3a690 t gmc_v7_0_hw_init +ffffffff81e3b040 t gmc_v7_0_hw_fini +ffffffff81e3b100 t gmc_v7_0_suspend +ffffffff81e3b140 t gmc_v7_0_resume +ffffffff81e3b1a0 t gmc_v7_0_is_idle +ffffffff81e3b1f0 t gmc_v7_0_wait_for_idle +ffffffff81e3b290 t gmc_v7_0_soft_reset +ffffffff81e3b4f0 t gmc_v7_0_set_clockgating_state +ffffffff81e3b750 t gmc_v7_0_set_powergating_state +ffffffff81e3b780 t gmc_v7_0_flush_gpu_tlb +ffffffff81e3b7b0 t gmc_v7_0_flush_gpu_tlb_pasid +ffffffff81e3b870 t gmc_v7_0_emit_flush_gpu_tlb +ffffffff81e3b900 t gmc_v7_0_emit_pasid_mapping +ffffffff81e3b930 t gmc_v7_0_set_prt +ffffffff81e3baf0 t gmc_v7_0_get_vm_pde +ffffffff81e3bb50 t gmc_v7_0_get_vm_pte +ffffffff81e3bb90 t gmc_v7_0_get_vbios_fb_size +ffffffff81e3bc00 t gmc_v7_0_vm_fault_interrupt_state +ffffffff81e3bcd0 t gmc_v7_0_process_interrupt +ffffffff81e3c000 t gmc_v8_0_early_init +ffffffff81e3c090 t gmc_v8_0_late_init +ffffffff81e3c0e0 t gmc_v8_0_sw_init +ffffffff81e3c760 t gmc_v8_0_sw_fini +ffffffff81e3c810 t gmc_v8_0_hw_init +ffffffff81e3d4c0 t gmc_v8_0_hw_fini +ffffffff81e3d580 t gmc_v8_0_suspend +ffffffff81e3d5c0 t gmc_v8_0_resume +ffffffff81e3d620 t gmc_v8_0_is_idle +ffffffff81e3d670 t gmc_v8_0_wait_for_idle +ffffffff81e3d710 t gmc_v8_0_check_soft_reset +ffffffff81e3d780 t gmc_v8_0_pre_soft_reset +ffffffff81e3d8f0 t gmc_v8_0_soft_reset +ffffffff81e3d9c0 t gmc_v8_0_post_soft_reset +ffffffff81e3da30 t gmc_v8_0_set_clockgating_state +ffffffff81e3dff0 t gmc_v8_0_set_powergating_state +ffffffff81e3e020 t gmc_v8_0_get_clockgating_state +ffffffff81e3e090 t gmc_v8_0_flush_gpu_tlb +ffffffff81e3e0c0 t gmc_v8_0_flush_gpu_tlb_pasid +ffffffff81e3e180 t gmc_v8_0_emit_flush_gpu_tlb +ffffffff81e3e210 t gmc_v8_0_emit_pasid_mapping +ffffffff81e3e240 t gmc_v8_0_set_prt +ffffffff81e3e400 t gmc_v8_0_get_vm_pde +ffffffff81e3e460 t gmc_v8_0_get_vm_pte +ffffffff81e3e4b0 t gmc_v8_0_get_vbios_fb_size +ffffffff81e3e520 t gmc_v8_0_vm_fault_interrupt_state +ffffffff81e3e5f0 t gmc_v8_0_process_interrupt +ffffffff81e3f000 T gmc_v9_0_restore_registers +ffffffff81e3f150 t gmc_v9_0_early_init +ffffffff81e3f500 t gmc_v9_0_late_init +ffffffff81e3f610 t gmc_v9_0_sw_init +ffffffff81e3fcc0 t gmc_v9_0_sw_fini +ffffffff81e3fd30 t gmc_v9_0_hw_init +ffffffff81e40130 t gmc_v9_0_hw_fini +ffffffff81e401f0 t gmc_v9_0_suspend +ffffffff81e402b0 t gmc_v9_0_resume +ffffffff81e40310 t gmc_v9_0_is_idle +ffffffff81e40340 t gmc_v9_0_wait_for_idle +ffffffff81e40370 t gmc_v9_0_soft_reset +ffffffff81e403a0 t gmc_v9_0_set_clockgating_state +ffffffff81e40400 t gmc_v9_0_set_powergating_state +ffffffff81e40430 t gmc_v9_0_get_clockgating_state +ffffffff81e40470 t gmc_v9_0_flush_gpu_tlb +ffffffff81e40ab0 t gmc_v9_0_flush_gpu_tlb_pasid +ffffffff81e40d80 t gmc_v9_0_emit_flush_gpu_tlb +ffffffff81e40f50 t gmc_v9_0_emit_pasid_mapping +ffffffff81e40fc0 t gmc_v9_0_map_mtype +ffffffff81e41000 t gmc_v9_0_get_vm_pde +ffffffff81e41100 t gmc_v9_0_get_vm_pte +ffffffff81e411d0 t gmc_v9_0_get_vbios_fb_size +ffffffff81e41360 t gmc_v9_0_vm_fault_interrupt_state +ffffffff81e416e0 t gmc_v9_0_process_interrupt +ffffffff81e41d20 t gmc_v9_0_ecc_interrupt_state +ffffffff81e42000 t hdp_v4_0_query_ras_error_count +ffffffff81e420c0 t hdp_v4_0_reset_ras_error_count +ffffffff81e421e0 t hdp_v4_0_flush_hdp +ffffffff81e42230 t hdp_v4_0_invalidate_hdp +ffffffff81e42300 t hdp_v4_0_update_clock_gating +ffffffff81e42400 t hdp_v4_0_get_clockgating_state +ffffffff81e42450 t hdp_v4_0_init_registers +ffffffff81e43000 t hdp_v5_0_flush_hdp +ffffffff81e43050 t hdp_v5_0_invalidate_hdp +ffffffff81e430f0 t hdp_v5_0_update_clock_gating +ffffffff81e434e0 t hdp_v5_0_get_clockgating_state +ffffffff81e43600 t hdp_v5_0_init_registers +ffffffff81e44000 t hdp_v5_2_flush_hdp +ffffffff81e44050 t hdp_v5_2_update_clock_gating +ffffffff81e44440 t hdp_v5_2_get_clockgating_state +ffffffff81e45000 t hdp_v6_0_flush_hdp +ffffffff81e45050 t hdp_v6_0_update_clock_gating +ffffffff81e45360 t hdp_v6_0_get_clockgating_state +ffffffff81e46000 t iceland_ih_early_init +ffffffff81e46050 t iceland_ih_sw_init +ffffffff81e460b0 t iceland_ih_sw_fini +ffffffff81e460f0 t iceland_ih_hw_init +ffffffff81e46320 t iceland_ih_hw_fini +ffffffff81e463f0 t iceland_ih_suspend +ffffffff81e464c0 t iceland_ih_resume +ffffffff81e46500 t iceland_ih_is_idle +ffffffff81e46550 t iceland_ih_wait_for_idle +ffffffff81e465f0 t iceland_ih_soft_reset +ffffffff81e466d0 t iceland_ih_set_clockgating_state +ffffffff81e46700 t iceland_ih_set_powergating_state +ffffffff81e46730 t iceland_ih_get_wptr +ffffffff81e46820 t iceland_ih_decode_iv +ffffffff81e468a0 t iceland_ih_set_rptr +ffffffff81e47000 t ih_v6_0_early_init +ffffffff81e47050 t ih_v6_0_sw_init +ffffffff81e471b0 t ih_v6_0_sw_fini +ffffffff81e471f0 t ih_v6_0_hw_init +ffffffff81e477a0 t ih_v6_0_hw_fini +ffffffff81e47800 t ih_v6_0_suspend +ffffffff81e47860 t ih_v6_0_resume +ffffffff81e47870 t ih_v6_0_is_idle +ffffffff81e478a0 t ih_v6_0_wait_for_idle +ffffffff81e478d0 t ih_v6_0_soft_reset +ffffffff81e47900 t ih_v6_0_set_clockgating_state +ffffffff81e47a20 t ih_v6_0_set_powergating_state +ffffffff81e47b90 t ih_v6_0_get_clockgating_state +ffffffff81e47c20 t ih_v6_0_get_wptr +ffffffff81e47d10 t ih_v6_0_set_rptr +ffffffff81e47de0 t ih_v6_0_self_irq +ffffffff81e47e50 t ih_v6_0_toggle_interrupts +ffffffff81e48030 t force_update_wptr_for_self_int +ffffffff81e49000 t imu_v11_0_init_microcode +ffffffff81e491f0 t imu_v11_0_load_microcode +ffffffff81e49550 t imu_v11_0_setup +ffffffff81e497d0 t imu_v11_0_start +ffffffff81e498c0 t imu_v11_0_program_rlc_ram +ffffffff81e49a70 t imu_v11_0_wait_for_reset_status +ffffffff81e49bc0 t program_imu_rlc_ram +ffffffff81e4a000 T imu_v11_0_3_program_rlc_ram +ffffffff81e4b000 T jpeg_v1_0_early_init +ffffffff81e4b060 T jpeg_v1_0_sw_init +ffffffff81e4b130 T jpeg_v1_0_sw_fini +ffffffff81e4b150 T jpeg_v1_0_start +ffffffff81e4bbc0 t jpeg_v1_0_decode_ring_get_rptr +ffffffff81e4bc50 t jpeg_v1_0_decode_ring_get_wptr +ffffffff81e4bce0 t jpeg_v1_0_decode_ring_set_wptr +ffffffff81e4bd50 t jpeg_v1_0_decode_ring_emit_ib +ffffffff81e4c660 t jpeg_v1_0_decode_ring_emit_fence +ffffffff81e4cfc0 t jpeg_v1_0_decode_ring_emit_vm_flush +ffffffff81e4d030 t jpeg_v1_0_decode_ring_nop +ffffffff81e4d190 t jpeg_v1_0_decode_ring_insert_start +ffffffff81e4d360 t jpeg_v1_0_decode_ring_insert_end +ffffffff81e4d530 t jpeg_v1_0_ring_begin_use +ffffffff81e4d630 t jpeg_v1_0_decode_ring_emit_wreg +ffffffff81e4d890 t jpeg_v1_0_decode_ring_emit_reg_wait +ffffffff81e4dcb0 t jpeg_v1_0_set_interrupt_state +ffffffff81e4dce0 t jpeg_v1_0_process_interrupt +ffffffff81e4e000 T jpeg_v2_0_dec_ring_insert_start +ffffffff81e4e1b0 T jpeg_v2_0_dec_ring_insert_end +ffffffff81e4e360 T jpeg_v2_0_dec_ring_emit_fence +ffffffff81e4ea50 T jpeg_v2_0_dec_ring_emit_ib +ffffffff81e4f240 T jpeg_v2_0_dec_ring_emit_reg_wait +ffffffff81e4f600 T jpeg_v2_0_dec_ring_emit_vm_flush +ffffffff81e4f670 T jpeg_v2_0_dec_ring_emit_wreg +ffffffff81e4f8b0 T jpeg_v2_0_dec_ring_nop +ffffffff81e4fa10 t jpeg_v2_0_early_init +ffffffff81e4fa80 t jpeg_v2_0_sw_init +ffffffff81e4fb90 t jpeg_v2_0_sw_fini +ffffffff81e4fbe0 t jpeg_v2_0_hw_init +ffffffff81e4fc60 t jpeg_v2_0_hw_fini +ffffffff81e4fd40 t jpeg_v2_0_suspend +ffffffff81e4fd70 t jpeg_v2_0_resume +ffffffff81e4fe00 t jpeg_v2_0_is_idle +ffffffff81e4fe80 t jpeg_v2_0_wait_for_idle +ffffffff81e4ff70 t jpeg_v2_0_set_clockgating_state +ffffffff81e50020 t jpeg_v2_0_set_powergating_state +ffffffff81e50820 t jpeg_v2_0_dec_ring_get_rptr +ffffffff81e508b0 t jpeg_v2_0_dec_ring_get_wptr +ffffffff81e50950 t jpeg_v2_0_dec_ring_set_wptr +ffffffff81e509f0 t jpeg_v2_0_set_interrupt_state +ffffffff81e50a20 t jpeg_v2_0_process_interrupt +ffffffff81e50ab0 t jpeg_v2_0_enable_clock_gating +ffffffff81e50c50 t jpeg_v2_0_disable_clock_gating +ffffffff81e51000 t jpeg_v2_6_query_ras_poison_status +ffffffff81e51140 t jpeg_v2_5_early_init +ffffffff81e51410 t jpeg_v2_5_sw_init +ffffffff81e51630 t jpeg_v2_5_sw_fini +ffffffff81e51680 t jpeg_v2_5_hw_init +ffffffff81e51770 t jpeg_v2_5_hw_fini +ffffffff81e518b0 t jpeg_v2_5_suspend +ffffffff81e518e0 t jpeg_v2_5_resume +ffffffff81e519e0 t jpeg_v2_5_is_idle +ffffffff81e51ae0 t jpeg_v2_5_wait_for_idle +ffffffff81e51c10 t jpeg_v2_5_set_clockgating_state +ffffffff81e51d80 t jpeg_v2_5_set_powergating_state +ffffffff81e52470 t jpeg_v2_5_dec_ring_get_rptr +ffffffff81e52510 t jpeg_v2_5_dec_ring_get_wptr +ffffffff81e525c0 t jpeg_v2_5_dec_ring_set_wptr +ffffffff81e52670 t jpeg_v2_6_dec_ring_insert_start +ffffffff81e52830 t jpeg_v2_6_dec_ring_insert_end +ffffffff81e529f0 t jpeg_v2_5_set_interrupt_state +ffffffff81e52a20 t jpeg_v2_5_process_interrupt +ffffffff81e52b00 t jpeg_v2_5_enable_clock_gating +ffffffff81e52bd0 t jpeg_v2_5_disable_clock_gating +ffffffff81e53000 t jpeg_v3_0_early_init +ffffffff81e530e0 t jpeg_v3_0_sw_init +ffffffff81e531f0 t jpeg_v3_0_sw_fini +ffffffff81e53240 t jpeg_v3_0_hw_init +ffffffff81e532c0 t jpeg_v3_0_hw_fini +ffffffff81e533a0 t jpeg_v3_0_suspend +ffffffff81e533d0 t jpeg_v3_0_resume +ffffffff81e53460 t jpeg_v3_0_is_idle +ffffffff81e534e0 t jpeg_v3_0_wait_for_idle +ffffffff81e535d0 t jpeg_v3_0_set_clockgating_state +ffffffff81e53680 t jpeg_v3_0_set_powergating_state +ffffffff81e53f30 t jpeg_v3_0_dec_ring_get_rptr +ffffffff81e53fc0 t jpeg_v3_0_dec_ring_get_wptr +ffffffff81e54060 t jpeg_v3_0_dec_ring_set_wptr +ffffffff81e54100 t jpeg_v3_0_set_interrupt_state +ffffffff81e54130 t jpeg_v3_0_process_interrupt +ffffffff81e541c0 t jpeg_v3_0_enable_clock_gating +ffffffff81e54290 t jpeg_v3_0_disable_clock_gating +ffffffff81e55000 t jpeg_v4_0_early_init +ffffffff81e55080 t jpeg_v4_0_sw_init +ffffffff81e55190 t jpeg_v4_0_sw_fini +ffffffff81e551e0 t jpeg_v4_0_hw_init +ffffffff81e55300 t jpeg_v4_0_hw_fini +ffffffff81e553e0 t jpeg_v4_0_suspend +ffffffff81e55410 t jpeg_v4_0_resume +ffffffff81e55460 t jpeg_v4_0_is_idle +ffffffff81e554e0 t jpeg_v4_0_wait_for_idle +ffffffff81e555d0 t jpeg_v4_0_set_clockgating_state +ffffffff81e55680 t jpeg_v4_0_set_powergating_state +ffffffff81e55e90 t jpeg_v4_0_dec_ring_get_rptr +ffffffff81e55f20 t jpeg_v4_0_dec_ring_get_wptr +ffffffff81e55fc0 t jpeg_v4_0_dec_ring_set_wptr +ffffffff81e56060 t jpeg_v4_0_set_interrupt_state +ffffffff81e56090 t jpeg_v4_0_process_interrupt +ffffffff81e56130 t jpeg_v4_0_enable_clock_gating +ffffffff81e562e0 t jpeg_v4_0_disable_clock_gating +ffffffff81e57000 t lsdma_v6_0_copy_mem +ffffffff81e57360 t lsdma_v6_0_fill_mem +ffffffff81e57640 t lsdma_v6_0_update_memory_power_gating +ffffffff81e58000 t mca_v3_0_mp0_query_ras_error_count +ffffffff81e58020 t mca_v3_0_ras_block_match +ffffffff81e58070 t mca_v3_0_mp1_query_ras_error_count +ffffffff81e58090 t mca_v3_0_mpio_query_ras_error_count +ffffffff81e580b0 t mca_v3_0_init +ffffffff81e59000 t mes_v10_0_late_init +ffffffff81e59050 t mes_v10_1_sw_init +ffffffff81e59660 t mes_v10_1_sw_fini +ffffffff81e597e0 t mes_v10_1_hw_init +ffffffff81e5a080 t mes_v10_1_hw_fini +ffffffff81e5a140 t mes_v10_1_suspend +ffffffff81e5a220 t mes_v10_1_resume +ffffffff81e5a270 t mes_v10_1_kiq_hw_init +ffffffff81e5a680 t mes_v10_1_add_hw_queue +ffffffff81e5a800 t mes_v10_1_remove_hw_queue +ffffffff81e5a890 t mes_v10_1_unmap_legacy_queue +ffffffff81e5a980 t mes_v10_1_suspend_gang +ffffffff81e5a9b0 t mes_v10_1_resume_gang +ffffffff81e5a9e0 t mes_v10_1_submit_pkt_and_poll_completion +ffffffff81e5abe0 t mes_v10_1_load_microcode +ffffffff81e5b3d0 t mes_v10_1_enable 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+ffffffff81e760c0 T xgpu_vi_mailbox_set_irq_funcs +ffffffff81e76110 T xgpu_vi_mailbox_add_irq_id +ffffffff81e761a0 T xgpu_vi_mailbox_get_irq +ffffffff81e76250 t xgpu_vi_mailbox_flr_work +ffffffff81e763a0 T xgpu_vi_mailbox_put_irq +ffffffff81e763e0 t xgpu_vi_request_full_gpu_access +ffffffff81e76400 t xgpu_vi_release_full_gpu_access +ffffffff81e76420 t xgpu_vi_request_reset +ffffffff81e76440 t xgpu_vi_wait_reset_cmpl +ffffffff81e76520 t xgpu_vi_set_mailbox_ack_irq +ffffffff81e765a0 t xgpu_vi_mailbox_ack_irq +ffffffff81e765f0 t xgpu_vi_set_mailbox_rcv_irq +ffffffff81e76670 t xgpu_vi_mailbox_rcv_irq +ffffffff81e76720 t xgpu_vi_mailbox_rcv_msg +ffffffff81e76840 t xgpu_vi_send_access_requests +ffffffff81e77000 t navi10_ih_early_init +ffffffff81e77060 t navi10_ih_sw_init +ffffffff81e771d0 t navi10_ih_sw_fini +ffffffff81e77210 t navi10_ih_hw_init +ffffffff81e77640 t navi10_ih_hw_fini +ffffffff81e776a0 t navi10_ih_suspend +ffffffff81e77700 t navi10_ih_resume +ffffffff81e77710 t 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nbio_v4_3_get_memsize +ffffffff81e7b290 t nbio_v4_3_sdma_doorbell_range +ffffffff81e7b400 t nbio_v4_3_vcn_doorbell_range +ffffffff81e7b5b0 t nbio_v4_3_gc_doorbell_init +ffffffff81e7b6a0 t nbio_v4_3_enable_doorbell_aperture +ffffffff81e7b790 t nbio_v4_3_enable_doorbell_selfring_aperture +ffffffff81e7b8f0 t nbio_v4_3_ih_doorbell_range +ffffffff81e7ba10 t nbio_v4_3_update_medium_grain_clock_gating +ffffffff81e7bb50 t nbio_v4_3_update_medium_grain_light_sleep +ffffffff81e7bc80 t nbio_v4_3_get_clockgating_state +ffffffff81e7bd90 t nbio_v4_3_ih_control +ffffffff81e7bee0 t nbio_v4_3_init_registers +ffffffff81e7bff0 t nbio_v4_3_remap_hdp_registers +ffffffff81e7c100 t nbio_v4_3_program_aspm +ffffffff81e7cda0 t nbio_v4_3_get_rom_offset +ffffffff81e7ce30 t nbio_v4_3_sriov_sdma_doorbell_range +ffffffff81e7ce60 t nbio_v4_3_sriov_vcn_doorbell_range +ffffffff81e7ce90 t nbio_v4_3_sriov_gc_doorbell_init +ffffffff81e7cec0 t nbio_v4_3_sriov_ih_doorbell_range +ffffffff81e7d000 t nbio_v6_1_get_hdp_flush_req_offset +ffffffff81e7d040 t nbio_v6_1_get_hdp_flush_done_offset +ffffffff81e7d080 t nbio_v6_1_get_pcie_index_offset +ffffffff81e7d0c0 t nbio_v6_1_get_pcie_data_offset +ffffffff81e7d100 t nbio_v6_1_get_rev_id +ffffffff81e7d180 t nbio_v6_1_mc_access_enable +ffffffff81e7d230 t nbio_v6_1_get_memsize +ffffffff81e7d2a0 t nbio_v6_1_sdma_doorbell_range +ffffffff81e7d330 t nbio_v6_1_enable_doorbell_aperture +ffffffff81e7d420 t nbio_v6_1_enable_doorbell_selfring_aperture +ffffffff81e7d580 t nbio_v6_1_ih_doorbell_range +ffffffff81e7d690 t nbio_v6_1_update_medium_grain_clock_gating +ffffffff81e7d730 t nbio_v6_1_update_medium_grain_light_sleep +ffffffff81e7d7d0 t nbio_v6_1_get_clockgating_state +ffffffff81e7d850 t nbio_v6_1_ih_control +ffffffff81e7d9a0 t nbio_v6_1_init_registers +ffffffff81e7da70 t nbio_v6_1_remap_hdp_registers +ffffffff81e7db80 t nbio_v6_1_program_aspm +ffffffff81e7e000 t nbio_v7_0_get_hdp_flush_req_offset +ffffffff81e7e040 t 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nbio_v7_2_get_hdp_flush_req_offset +ffffffff81e7f040 t nbio_v7_2_get_hdp_flush_done_offset +ffffffff81e7f080 t nbio_v7_2_get_pcie_index_offset +ffffffff81e7f0c0 t nbio_v7_2_get_pcie_data_offset +ffffffff81e7f100 t nbio_v7_2_get_pcie_port_index_offset +ffffffff81e7f130 t nbio_v7_2_get_pcie_port_data_offset +ffffffff81e7f170 t nbio_v7_2_get_rev_id +ffffffff81e7f250 t nbio_v7_2_mc_access_enable +ffffffff81e7f390 t nbio_v7_2_get_memsize +ffffffff81e7f400 t nbio_v7_2_sdma_doorbell_range +ffffffff81e7f4a0 t nbio_v7_2_vcn_doorbell_range +ffffffff81e7f520 t nbio_v7_2_enable_doorbell_aperture +ffffffff81e7f600 t nbio_v7_2_enable_doorbell_selfring_aperture +ffffffff81e7f760 t nbio_v7_2_ih_doorbell_range +ffffffff81e7f7f0 t nbio_v7_2_update_medium_grain_clock_gating +ffffffff81e7f8b0 t nbio_v7_2_update_medium_grain_light_sleep +ffffffff81e7fa40 t nbio_v7_2_get_clockgating_state +ffffffff81e7fad0 t nbio_v7_2_ih_control +ffffffff81e7fc20 t nbio_v7_2_init_registers +ffffffff81e7fde0 t nbio_v7_2_remap_hdp_registers +ffffffff81e80000 t nbio_v7_4_query_ras_error_count +ffffffff81e801a0 t nbio_v7_4_handle_ras_controller_intr_no_bifring +ffffffff81e803e0 t nbio_v7_4_handle_ras_err_event_athub_intr_no_bifring +ffffffff81e80590 t nbio_v7_4_init_ras_controller_interrupt +ffffffff81e805d0 t nbio_v7_4_init_ras_err_event_athub_interrupt +ffffffff81e80610 t nbio_v7_4_get_hdp_flush_req_offset +ffffffff81e80650 t nbio_v7_4_get_hdp_flush_done_offset +ffffffff81e80690 t nbio_v7_4_get_pcie_index_offset +ffffffff81e806d0 t nbio_v7_4_get_pcie_data_offset +ffffffff81e80710 t nbio_v7_4_get_rev_id +ffffffff81e807d0 t nbio_v7_4_mc_access_enable +ffffffff81e80880 t nbio_v7_4_get_memsize +ffffffff81e808f0 t nbio_v7_4_sdma_doorbell_range +ffffffff81e809c0 t nbio_v7_4_vcn_doorbell_range +ffffffff81e80a60 t nbio_v7_4_enable_doorbell_aperture +ffffffff81e80b50 t nbio_v7_4_enable_doorbell_selfring_aperture +ffffffff81e80cb0 t nbio_v7_4_ih_doorbell_range +ffffffff81e80dc0 t nbio_v7_4_enable_doorbell_interrupt +ffffffff81e80f00 t nbio_v7_4_update_medium_grain_clock_gating +ffffffff81e80f30 t nbio_v7_4_update_medium_grain_light_sleep +ffffffff81e80fd0 t nbio_v7_4_get_clockgating_state +ffffffff81e81050 t nbio_v7_4_ih_control +ffffffff81e811a0 t nbio_v7_4_init_registers +ffffffff81e81290 t nbio_v7_4_remap_hdp_registers +ffffffff81e813a0 t nbio_v7_4_program_aspm +ffffffff81e817b0 t nbio_v7_4_set_ras_controller_irq_state +ffffffff81e81940 t nbio_v7_4_process_ras_controller_irq +ffffffff81e81970 t nbio_v7_4_set_ras_err_event_athub_irq_state +ffffffff81e81b00 t nbio_v7_4_process_err_event_athub_irq +ffffffff81e82000 t nbio_v7_7_get_hdp_flush_req_offset +ffffffff81e82040 t nbio_v7_7_get_hdp_flush_done_offset +ffffffff81e82080 t nbio_v7_7_get_pcie_index_offset +ffffffff81e820c0 t nbio_v7_7_get_pcie_data_offset +ffffffff81e82100 t nbio_v7_7_get_pcie_port_index_offset +ffffffff81e82130 t nbio_v7_7_get_pcie_port_data_offset +ffffffff81e82170 t nbio_v7_7_get_rev_id +ffffffff81e821f0 t nbio_v7_7_mc_access_enable +ffffffff81e822a0 t nbio_v7_7_get_memsize +ffffffff81e82310 t nbio_v7_7_sdma_doorbell_range +ffffffff81e823a0 t nbio_v7_7_vcn_doorbell_range +ffffffff81e82420 t nbio_v7_7_enable_doorbell_aperture +ffffffff81e82500 t nbio_v7_7_enable_doorbell_selfring_aperture +ffffffff81e82660 t nbio_v7_7_ih_doorbell_range +ffffffff81e82770 t nbio_v7_7_update_medium_grain_clock_gating +ffffffff81e828b0 t nbio_v7_7_update_medium_grain_light_sleep +ffffffff81e82ac0 t nbio_v7_7_get_clockgating_state +ffffffff81e82bd0 t nbio_v7_7_ih_control +ffffffff81e82d20 t nbio_v7_7_init_registers +ffffffff81e82e20 t nbio_v7_7_remap_hdp_registers +ffffffff81e83000 T nv_grbm_select +ffffffff81e830a0 T nv_set_virt_ops +ffffffff81e830e0 t nv_common_early_init +ffffffff81e834d0 t nv_common_late_init +ffffffff81e83540 t nv_common_sw_init +ffffffff81e83580 t nv_common_sw_fini +ffffffff81e835b0 t nv_common_hw_init +ffffffff81e836c0 t nv_common_hw_fini +ffffffff81e83720 t nv_common_suspend +ffffffff81e83780 t nv_common_resume +ffffffff81e837c0 t nv_common_is_idle +ffffffff81e837f0 t nv_common_wait_for_idle +ffffffff81e83820 t nv_common_soft_reset +ffffffff81e83850 t nv_common_set_clockgating_state +ffffffff81e83920 t nv_common_set_powergating_state +ffffffff81e83950 t nv_common_get_clockgating_state +ffffffff81e839c0 t nv_pcie_rreg +ffffffff81e83a20 t nv_pcie_wreg +ffffffff81e83a80 t nv_pcie_rreg64 +ffffffff81e83ae0 t nv_pcie_wreg64 +ffffffff81e83b40 t nv_didt_rreg +ffffffff81e83be0 t nv_didt_wreg +ffffffff81e83c60 t nv_read_disabled_bios +ffffffff81e83c90 t nv_read_register +ffffffff81e83d70 t nv_vga_set_state +ffffffff81e83da0 t nv_asic_reset +ffffffff81e83ee0 t nv_asic_reset_method +ffffffff81e83fd0 t nv_get_xclk +ffffffff81e84000 t nv_set_uvd_clocks +ffffffff81e84030 t nv_set_vce_clocks +ffffffff81e84060 t nv_get_config_memsize +ffffffff81e84080 t nv_need_full_reset +ffffffff81e840b0 t nv_init_doorbell_index +ffffffff81e841e0 t nv_need_reset_on_init +ffffffff81e84270 t nv_get_pcie_replay_count +ffffffff81e842a0 t nv_pre_asic_init +ffffffff81e842d0 t nv_update_umd_stable_pstate +ffffffff81e84390 t nv_query_video_codecs +ffffffff81e85000 T psp_v10_0_set_psp_funcs +ffffffff81e85030 t psp_v10_0_init_microcode +ffffffff81e852a0 t psp_v10_0_ring_init +ffffffff81e85320 t psp_v10_0_ring_create +ffffffff81e85630 t psp_v10_0_ring_stop +ffffffff81e85820 t psp_v10_0_ring_destroy +ffffffff81e858a0 t psp_v10_0_mode1_reset +ffffffff81e858f0 t psp_v10_0_ring_get_wptr +ffffffff81e85950 t psp_v10_0_ring_set_wptr +ffffffff81e86000 T psp_v11_0_set_psp_funcs +ffffffff81e86030 t psp_v11_0_init_microcode +ffffffff81e86450 t psp_v11_0_bootloader_load_kdb +ffffffff81e86470 t psp_v11_0_bootloader_load_spl +ffffffff81e86490 t psp_v11_0_bootloader_load_sysdrv +ffffffff81e864b0 t psp_v11_0_bootloader_load_sos +ffffffff81e86800 t psp_v11_0_ring_init +ffffffff81e86880 t psp_v11_0_ring_create +ffffffff81e86f10 t psp_v11_0_ring_stop +ffffffff81e87130 t psp_v11_0_ring_destroy +ffffffff81e871b0 t psp_v11_0_mode1_reset +ffffffff81e872b0 t psp_v11_0_memory_training +ffffffff81e87730 t psp_v11_0_ring_get_wptr +ffffffff81e87780 t psp_v11_0_ring_set_wptr +ffffffff81e878c0 t psp_v11_0_load_usbc_pd_fw +ffffffff81e87ab0 t psp_v11_0_read_usbc_pd_fw +ffffffff81e87bd0 t psp_v11_0_bootloader_load_component +ffffffff81e87d90 t psp_v11_0_wait_for_bootloader +ffffffff81e87f60 t psp_v11_0_memory_training_send_msg +ffffffff81e89000 T psp_v11_0_8_set_psp_funcs +ffffffff81e89030 t psp_v11_0_8_ring_init +ffffffff81e890b0 t psp_v11_0_8_ring_create +ffffffff81e89740 t psp_v11_0_8_ring_stop +ffffffff81e89ad0 t psp_v11_0_8_ring_destroy +ffffffff81e89b50 t psp_v11_0_8_ring_get_wptr +ffffffff81e89bc0 t psp_v11_0_8_ring_set_wptr +ffffffff81e8a000 T psp_v12_0_set_psp_funcs +ffffffff81e8a030 t psp_v12_0_init_microcode +ffffffff81e8a2a0 t psp_v12_0_bootloader_load_sysdrv +ffffffff81e8a5c0 t psp_v12_0_bootloader_load_sos +ffffffff81e8a920 t psp_v12_0_ring_init +ffffffff81e8af00 t psp_v12_0_ring_create +ffffffff81e8b460 t psp_v12_0_ring_stop +ffffffff81e8b680 t psp_v12_0_ring_destroy +ffffffff81e8b700 t psp_v12_0_mode1_reset +ffffffff81e8b800 t psp_v12_0_ring_get_wptr +ffffffff81e8b870 t psp_v12_0_ring_set_wptr +ffffffff81e8c000 T psp_v13_0_set_psp_funcs +ffffffff81e8c030 t psp_v13_0_init_microcode +ffffffff81e8c160 t psp_v13_0_bootloader_load_kdb +ffffffff81e8c180 t psp_v13_0_bootloader_load_spl +ffffffff81e8c1a0 t psp_v13_0_bootloader_load_sysdrv +ffffffff81e8c1c0 t psp_v13_0_bootloader_load_soc_drv +ffffffff81e8c1e0 t psp_v13_0_bootloader_load_intf_drv +ffffffff81e8c200 t psp_v13_0_bootloader_load_dbg_drv +ffffffff81e8c220 t psp_v13_0_bootloader_load_ras_drv +ffffffff81e8c240 t psp_v13_0_bootloader_load_sos +ffffffff81e8c5a0 t psp_v13_0_ring_init +ffffffff81e8c620 t psp_v13_0_ring_create +ffffffff81e8ccb0 t psp_v13_0_ring_stop +ffffffff81e8d040 t psp_v13_0_ring_destroy +ffffffff81e8d0c0 t psp_v13_0_memory_training +ffffffff81e8d500 t psp_v13_0_ring_get_wptr +ffffffff81e8d570 t psp_v13_0_ring_set_wptr +ffffffff81e8d670 t psp_v13_0_load_usbc_pd_fw +ffffffff81e8d860 t psp_v13_0_read_usbc_pd_fw +ffffffff81e8d980 t psp_v13_0_update_spirom +ffffffff81e8db60 t psp_v13_0_vbflash_status +ffffffff81e8dbc0 t psp_v13_0_bootloader_load_component +ffffffff81e8dd90 t psp_v13_0_wait_for_bootloader +ffffffff81e8df60 t psp_v13_0_memory_training_send_msg +ffffffff81e8e0c0 t psp_v13_0_exec_spi_cmd +ffffffff81e8f000 T psp_v13_0_4_set_psp_funcs +ffffffff81e8f030 t psp_v13_0_4_init_microcode +ffffffff81e8f100 t psp_v13_0_4_bootloader_load_kdb +ffffffff81e8f120 t psp_v13_0_4_bootloader_load_spl +ffffffff81e8f140 t psp_v13_0_4_bootloader_load_sysdrv +ffffffff81e8f160 t psp_v13_0_4_bootloader_load_soc_drv +ffffffff81e8f180 t psp_v13_0_4_bootloader_load_intf_drv +ffffffff81e8f1a0 t psp_v13_0_4_bootloader_load_dbg_drv +ffffffff81e8f1c0 t psp_v13_0_4_bootloader_load_sos +ffffffff81e8f530 t psp_v13_0_4_ring_init +ffffffff81e8f5b0 t psp_v13_0_4_ring_create +ffffffff81e8fc50 t psp_v13_0_4_ring_stop +ffffffff81e8ffe0 t psp_v13_0_4_ring_destroy +ffffffff81e90060 t psp_v13_0_4_ring_get_wptr +ffffffff81e900d0 t psp_v13_0_4_ring_set_wptr +ffffffff81e901d0 t psp_v13_0_4_bootloader_load_component +ffffffff81e903a0 t psp_v13_0_4_wait_for_bootloader +ffffffff81e91000 T psp_v3_1_set_psp_funcs +ffffffff81e91030 t psp_v3_1_init_microcode +ffffffff81e910f0 t psp_v3_1_bootloader_load_sysdrv +ffffffff81e91410 t psp_v3_1_bootloader_load_sos +ffffffff81e91770 t psp_v3_1_ring_init +ffffffff81e917f0 t psp_v3_1_ring_create +ffffffff81e922f0 t psp_v3_1_ring_stop +ffffffff81e92510 t psp_v3_1_ring_destroy +ffffffff81e92590 t psp_v3_1_smu_reload_quirk +ffffffff81e925e0 t psp_v3_1_mode1_reset +ffffffff81e926e0 t psp_v3_1_ring_get_wptr +ffffffff81e92730 t psp_v3_1_ring_set_wptr +ffffffff81e93000 t sdma_v2_4_early_init +ffffffff81e930e0 t sdma_v2_4_sw_init +ffffffff81e93470 t sdma_v2_4_sw_fini +ffffffff81e93550 t sdma_v2_4_hw_init +ffffffff81e93910 t sdma_v2_4_hw_fini +ffffffff81e93950 t sdma_v2_4_suspend +ffffffff81e93990 t sdma_v2_4_resume +ffffffff81e939a0 t sdma_v2_4_is_idle +ffffffff81e939e0 t sdma_v2_4_wait_for_idle +ffffffff81e93a80 t sdma_v2_4_soft_reset +ffffffff81e93bc0 t sdma_v2_4_set_clockgating_state +ffffffff81e93bf0 t sdma_v2_4_set_powergating_state +ffffffff81e93c20 t sdma_v2_4_ring_get_rptr +ffffffff81e93c60 t sdma_v2_4_ring_get_wptr +ffffffff81e93cc0 t sdma_v2_4_ring_set_wptr +ffffffff81e93d00 t sdma_v2_4_ring_emit_ib +ffffffff81e93fb0 t sdma_v2_4_ring_emit_fence +ffffffff81e943b0 t sdma_v2_4_ring_emit_pipeline_sync +ffffffff81e94630 t sdma_v2_4_ring_emit_vm_flush +ffffffff81e948b0 t sdma_v2_4_ring_emit_hdp_flush +ffffffff81e94b30 t sdma_v2_4_ring_test_ring +ffffffff81e94e10 t sdma_v2_4_ring_test_ib +ffffffff81e94ff0 t sdma_v2_4_ring_insert_nop +ffffffff81e95120 t sdma_v2_4_ring_pad_ib +ffffffff81e95250 t sdma_v2_4_ring_emit_wreg +ffffffff81e953a0 t sdma_v2_4_emit_copy_buffer +ffffffff81e95460 t sdma_v2_4_emit_fill_buffer +ffffffff81e954f0 t sdma_v2_4_vm_copy_pte +ffffffff81e955b0 t sdma_v2_4_vm_write_pte +ffffffff81e95680 t sdma_v2_4_vm_set_pte_pde +ffffffff81e95780 t sdma_v2_4_set_trap_irq_state +ffffffff81e95840 t sdma_v2_4_process_trap_irq +ffffffff81e958e0 t sdma_v2_4_process_illegal_inst_irq +ffffffff81e95960 t sdma_v2_4_enable +ffffffff81e96000 t sdma_v3_0_early_init +ffffffff81e96150 t sdma_v3_0_sw_init +ffffffff81e96500 t sdma_v3_0_sw_fini +ffffffff81e965e0 t sdma_v3_0_hw_init +ffffffff81e96710 t sdma_v3_0_hw_fini +ffffffff81e96760 t sdma_v3_0_suspend +ffffffff81e967b0 t sdma_v3_0_resume +ffffffff81e967c0 t sdma_v3_0_is_idle +ffffffff81e96800 t sdma_v3_0_wait_for_idle +ffffffff81e968a0 t sdma_v3_0_check_soft_reset +ffffffff81e96900 t sdma_v3_0_pre_soft_reset +ffffffff81e96950 t sdma_v3_0_soft_reset +ffffffff81e96a20 t sdma_v3_0_post_soft_reset +ffffffff81e96a70 t sdma_v3_0_set_clockgating_state +ffffffff81e96cd0 t sdma_v3_0_set_powergating_state +ffffffff81e96d00 t sdma_v3_0_get_clockgating_state +ffffffff81e96d80 t sdma_v3_0_ring_get_rptr +ffffffff81e96dc0 t sdma_v3_0_ring_get_wptr +ffffffff81e96e40 t sdma_v3_0_ring_set_wptr +ffffffff81e96ef0 t sdma_v3_0_ring_emit_ib +ffffffff81e971a0 t sdma_v3_0_ring_emit_fence +ffffffff81e975a0 t sdma_v3_0_ring_emit_pipeline_sync +ffffffff81e97820 t sdma_v3_0_ring_emit_vm_flush +ffffffff81e97aa0 t sdma_v3_0_ring_emit_hdp_flush +ffffffff81e97d20 t sdma_v3_0_ring_test_ring +ffffffff81e98000 t sdma_v3_0_ring_test_ib +ffffffff81e981e0 t sdma_v3_0_ring_insert_nop +ffffffff81e98310 t sdma_v3_0_ring_pad_ib +ffffffff81e98440 t sdma_v3_0_ring_emit_wreg +ffffffff81e98590 t sdma_v3_0_emit_copy_buffer +ffffffff81e98650 t sdma_v3_0_emit_fill_buffer +ffffffff81e986e0 t sdma_v3_0_vm_copy_pte +ffffffff81e987a0 t sdma_v3_0_vm_write_pte +ffffffff81e98870 t sdma_v3_0_vm_set_pte_pde +ffffffff81e98970 t sdma_v3_0_set_trap_irq_state +ffffffff81e98a30 t sdma_v3_0_process_trap_irq +ffffffff81e98ad0 t sdma_v3_0_process_illegal_inst_irq +ffffffff81e98b50 t sdma_v3_0_ctx_switch_enable +ffffffff81e98ce0 t sdma_v3_0_enable +ffffffff81e98e50 t sdma_v3_0_gfx_resume +ffffffff81e9a000 t sdma_v4_0_early_init +ffffffff81e9a580 t sdma_v4_0_late_init +ffffffff81e9a820 t sdma_v4_0_sw_init +ffffffff81e9aba0 t sdma_v4_0_sw_fini +ffffffff81e9ac60 t sdma_v4_0_hw_init +ffffffff81e9dc00 t sdma_v4_0_hw_fini +ffffffff81e9dcb0 t sdma_v4_0_suspend +ffffffff81e9dd00 t sdma_v4_0_resume +ffffffff81e9dd80 t sdma_v4_0_is_idle +ffffffff81e9deb0 t sdma_v4_0_wait_for_idle +ffffffff81e9e050 t sdma_v4_0_soft_reset +ffffffff81e9e080 t sdma_v4_0_set_clockgating_state +ffffffff81e9e580 t sdma_v4_0_set_powergating_state +ffffffff81e9e640 t sdma_v4_0_get_clockgating_state +ffffffff81e9e6e0 t sdma_v4_0_query_ras_error_count +ffffffff81e9e8b0 t sdma_v4_0_reset_ras_error_count +ffffffff81e9ea00 t sdma_v4_0_ring_get_rptr +ffffffff81e9ea60 t sdma_v4_0_ring_get_wptr +ffffffff81e9ec50 t sdma_v4_0_ring_set_wptr +ffffffff81e9eed0 t sdma_v4_0_ring_emit_ib +ffffffff81e9f180 t sdma_v4_0_ring_emit_fence +ffffffff81e9f5b0 t sdma_v4_0_ring_emit_pipeline_sync +ffffffff81e9f610 t sdma_v4_0_ring_emit_vm_flush +ffffffff81e9f630 t sdma_v4_0_ring_emit_hdp_flush +ffffffff81e9f6d0 t sdma_v4_0_ring_test_ring +ffffffff81e9f9b0 t sdma_v4_0_ring_test_ib +ffffffff81e9fb90 t sdma_v4_0_ring_insert_nop +ffffffff81e9fcc0 t sdma_v4_0_ring_pad_ib +ffffffff81e9fdf0 t sdma_v4_0_ring_emit_wreg +ffffffff81e9ff40 t sdma_v4_0_ring_emit_reg_wait +ffffffff81e9ff90 t sdma_v4_0_wait_reg_mem +ffffffff81ea02c0 t sdma_v4_0_page_ring_get_wptr +ffffffff81ea0470 t sdma_v4_0_page_ring_set_wptr +ffffffff81ea0630 t sdma_v4_0_emit_copy_buffer +ffffffff81ea06f0 t sdma_v4_0_emit_fill_buffer +ffffffff81ea0780 t sdma_v4_0_vm_copy_pte +ffffffff81ea0840 t sdma_v4_0_vm_write_pte +ffffffff81ea0910 t sdma_v4_0_vm_set_pte_pde +ffffffff81ea0a10 t sdma_v4_0_set_trap_irq_state +ffffffff81ea0bb0 t sdma_v4_0_process_trap_irq +ffffffff81ea0cf0 t sdma_v4_0_process_illegal_inst_irq +ffffffff81ea0e10 t sdma_v4_0_set_ecc_irq_state +ffffffff81ea0fb0 t sdma_v4_0_process_vm_hole_irq +ffffffff81ea10f0 t sdma_v4_0_process_doorbell_invalid_irq +ffffffff81ea1230 t sdma_v4_0_process_pool_timeout_irq +ffffffff81ea1370 t sdma_v4_0_process_srbm_write_irq +ffffffff81ea14b0 t sdma_v4_0_process_ras_data_cb +ffffffff81ea1530 t sdma_v4_0_ctx_switch_enable +ffffffff81ea1be0 t sdma_v4_0_enable +ffffffff81ea2180 t sdma_v4_0_gfx_enable +ffffffff81ea3000 t sdma_v4_4_query_ras_error_count +ffffffff81ea3270 t sdma_v4_4_reset_ras_error_count +ffffffff81ea4000 t sdma_v5_0_early_init +ffffffff81ea4170 t sdma_v5_0_sw_init +ffffffff81ea4410 t sdma_v5_0_sw_fini +ffffffff81ea44a0 t sdma_v5_0_hw_init +ffffffff81ea5750 t sdma_v5_0_hw_fini +ffffffff81ea57b0 t sdma_v5_0_suspend +ffffffff81ea5810 t sdma_v5_0_resume +ffffffff81ea5820 t sdma_v5_0_is_idle +ffffffff81ea58b0 t sdma_v5_0_wait_for_idle +ffffffff81ea5970 t sdma_v5_0_soft_reset +ffffffff81ea59a0 t sdma_v5_0_set_clockgating_state +ffffffff81ea5ba0 t sdma_v5_0_set_powergating_state +ffffffff81ea5bd0 t sdma_v5_0_get_clockgating_state +ffffffff81ea5c70 t sdma_v5_0_ring_get_rptr +ffffffff81ea5cd0 t sdma_v5_0_ring_get_wptr +ffffffff81ea5e70 t sdma_v5_0_ring_set_wptr +ffffffff81ea61d0 t sdma_v5_0_ring_emit_ib +ffffffff81ea6490 t sdma_v5_0_ring_emit_fence +ffffffff81ea6900 t sdma_v5_0_ring_emit_pipeline_sync +ffffffff81ea6b80 t sdma_v5_0_ring_emit_vm_flush +ffffffff81ea6ba0 t sdma_v5_0_ring_emit_hdp_flush +ffffffff81ea6e40 t sdma_v5_0_ring_test_ring +ffffffff81ea7210 t sdma_v5_0_ring_test_ib +ffffffff81ea7540 t sdma_v5_0_ring_insert_nop +ffffffff81ea7670 t sdma_v5_0_ring_pad_ib +ffffffff81ea77a0 t sdma_v5_0_ring_init_cond_exec +ffffffff81ea79d0 t sdma_v5_0_ring_patch_cond_exec +ffffffff81ea7a90 t sdma_v5_0_ring_emit_wreg +ffffffff81ea7be0 t sdma_v5_0_ring_emit_reg_wait +ffffffff81ea7e60 t sdma_v5_0_ring_emit_reg_write_reg_wait +ffffffff81ea7ee0 t sdma_v5_0_ring_preempt_ib +ffffffff81ea8020 t sdma_v5_0_ring_emit_mem_sync +ffffffff81ea8230 t sdma_v5_0_emit_copy_buffer +ffffffff81ea82f0 t sdma_v5_0_emit_fill_buffer +ffffffff81ea8380 t sdma_v5_0_vm_copy_pte +ffffffff81ea8440 t sdma_v5_0_vm_write_pte +ffffffff81ea8510 t sdma_v5_0_vm_set_pte_pde +ffffffff81ea8610 t sdma_v5_0_set_trap_irq_state +ffffffff81ea86a0 t sdma_v5_0_process_trap_irq +ffffffff81ea87b0 t sdma_v5_0_process_illegal_inst_irq +ffffffff81ea87e0 t sdma_v5_0_mqd_init +ffffffff81ea88c0 t sdma_v5_0_ctx_switch_enable +ffffffff81ea8bc0 t sdma_v5_0_enable +ffffffff81ea9000 t sdma_v5_2_early_init +ffffffff81ea9170 t sdma_v5_2_sw_init +ffffffff81ea93a0 t sdma_v5_2_sw_fini +ffffffff81ea9430 t sdma_v5_2_hw_init +ffffffff81ea9770 t sdma_v5_2_hw_fini +ffffffff81ea97d0 t sdma_v5_2_suspend +ffffffff81ea9830 t sdma_v5_2_resume +ffffffff81ea9840 t sdma_v5_2_is_idle +ffffffff81ea9900 t sdma_v5_2_wait_for_idle +ffffffff81ea9a00 t sdma_v5_2_soft_reset +ffffffff81ea9ca0 t sdma_v5_2_set_clockgating_state +ffffffff81ea9fc0 t sdma_v5_2_set_powergating_state +ffffffff81ea9ff0 t sdma_v5_2_get_clockgating_state +ffffffff81eaa080 t sdma_v5_2_ring_get_rptr +ffffffff81eaa0e0 t sdma_v5_2_ring_get_wptr +ffffffff81eaa220 t sdma_v5_2_ring_set_wptr +ffffffff81eaa3e0 t sdma_v5_2_ring_emit_ib +ffffffff81eaa6a0 t sdma_v5_2_ring_emit_fence +ffffffff81eaab10 t sdma_v5_2_ring_emit_pipeline_sync +ffffffff81eaad90 t sdma_v5_2_ring_emit_vm_flush +ffffffff81eaadb0 t sdma_v5_2_ring_emit_hdp_flush +ffffffff81eab050 t sdma_v5_2_ring_test_ring +ffffffff81eab420 t sdma_v5_2_ring_test_ib +ffffffff81eab750 t sdma_v5_2_ring_insert_nop +ffffffff81eab880 t sdma_v5_2_ring_pad_ib +ffffffff81eab9b0 t sdma_v5_2_ring_init_cond_exec +ffffffff81eabbe0 t sdma_v5_2_ring_patch_cond_exec +ffffffff81eabca0 t sdma_v5_2_ring_emit_wreg +ffffffff81eabdf0 t sdma_v5_2_ring_emit_reg_wait +ffffffff81eac070 t sdma_v5_2_ring_emit_reg_write_reg_wait +ffffffff81eac0f0 t sdma_v5_2_ring_preempt_ib +ffffffff81eac260 t sdma_v5_2_ring_emit_mem_sync +ffffffff81eac470 t sdma_v5_2_emit_copy_buffer +ffffffff81eac530 t sdma_v5_2_emit_fill_buffer +ffffffff81eac5c0 t sdma_v5_2_vm_copy_pte +ffffffff81eac680 t sdma_v5_2_vm_write_pte +ffffffff81eac750 t sdma_v5_2_vm_set_pte_pde +ffffffff81eac850 t sdma_v5_2_set_trap_irq_state +ffffffff81eac910 t sdma_v5_2_process_trap_irq +ffffffff81eaca50 t sdma_v5_2_process_illegal_inst_irq +ffffffff81eaca80 t sdma_v5_2_mqd_init +ffffffff81eacb60 t sdma_v5_2_ctx_switch_enable +ffffffff81eacf60 t sdma_v5_2_enable +ffffffff81ead370 t sdma_v5_2_gfx_resume +ffffffff81eaf000 t sdma_v6_0_early_init +ffffffff81eaf140 t sdma_v6_0_sw_init +ffffffff81eaf320 t sdma_v6_0_sw_fini +ffffffff81eaf3b0 t sdma_v6_0_hw_init +ffffffff81eaf3c0 t sdma_v6_0_hw_fini +ffffffff81eaf410 t sdma_v6_0_suspend +ffffffff81eaf460 t sdma_v6_0_resume +ffffffff81eaf470 t sdma_v6_0_is_idle +ffffffff81eaf500 t sdma_v6_0_wait_for_idle +ffffffff81eaf5c0 t sdma_v6_0_check_soft_reset +ffffffff81eaf680 t sdma_v6_0_soft_reset +ffffffff81eafb20 t sdma_v6_0_set_clockgating_state +ffffffff81eafb50 t sdma_v6_0_set_powergating_state +ffffffff81eafb80 t sdma_v6_0_get_clockgating_state +ffffffff81eafbb0 t sdma_v6_0_ring_get_rptr +ffffffff81eafc10 t sdma_v6_0_ring_get_wptr +ffffffff81eafc80 t sdma_v6_0_ring_set_wptr +ffffffff81eaffe0 t sdma_v6_0_ring_emit_ib +ffffffff81eb02a0 t sdma_v6_0_ring_emit_fence +ffffffff81eb0710 t sdma_v6_0_ring_emit_pipeline_sync +ffffffff81eb0990 t sdma_v6_0_ring_emit_vm_flush +ffffffff81eb09b0 t sdma_v6_0_ring_emit_hdp_flush +ffffffff81eb0c50 t sdma_v6_0_ring_test_ring +ffffffff81eb1020 t sdma_v6_0_ring_test_ib +ffffffff81eb1350 t sdma_v6_0_ring_insert_nop +ffffffff81eb1480 t sdma_v6_0_ring_pad_ib +ffffffff81eb15b0 t sdma_v6_0_ring_init_cond_exec +ffffffff81eb17e0 t sdma_v6_0_ring_patch_cond_exec +ffffffff81eb18a0 t sdma_v6_0_ring_emit_wreg +ffffffff81eb19f0 t sdma_v6_0_ring_emit_reg_wait +ffffffff81eb1c70 t sdma_v6_0_ring_emit_reg_write_reg_wait +ffffffff81eb1cf0 t sdma_v6_0_ring_preempt_ib +ffffffff81eb1e40 t sdma_v6_0_ring_emit_mem_sync +ffffffff81eb2050 t sdma_v6_0_emit_copy_buffer +ffffffff81eb2110 t sdma_v6_0_emit_fill_buffer +ffffffff81eb21a0 t sdma_v6_0_vm_copy_pte +ffffffff81eb2260 t sdma_v6_0_vm_write_pte +ffffffff81eb2330 t sdma_v6_0_vm_set_pte_pde +ffffffff81eb2430 t sdma_v6_0_set_trap_irq_state +ffffffff81eb24c0 t sdma_v6_0_process_trap_irq +ffffffff81eb25f0 t sdma_v6_0_process_illegal_inst_irq +ffffffff81eb2620 t sdma_v6_0_mqd_init +ffffffff81eb2740 t sdma_v6_0_start +ffffffff81eb29c0 t sdma_v6_0_enable +ffffffff81eb2b40 t sdma_v6_0_gfx_resume +ffffffff81eb3bc0 t sdma_v6_0_gfx_stop +ffffffff81eb4000 T sienna_cichlid_reset_init +ffffffff81eb40c0 t sienna_cichlid_async_reset +ffffffff81eb4120 t sienna_cichlid_get_reset_handler +ffffffff81eb4180 T sienna_cichlid_reset_fini +ffffffff81eb41e0 t sienna_cichlid_mode2_prepare_hwcontext +ffffffff81eb4330 t sienna_cichlid_mode2_perform_reset +ffffffff81eb43b0 t sienna_cichlid_mode2_restore_hwcontext +ffffffff81eb46b0 t sienna_cichlid_mode2_reset +ffffffff81eb5000 T smu_v11_0_i2c_control_init +ffffffff81eb50d0 T smu_v11_0_i2c_control_fini +ffffffff81eb5110 t smu_v11_0_i2c_xfer +ffffffff81eb61f0 t smu_v11_0_i2c_func +ffffffff81eb6220 t smu_v11_0_i2c_enable +ffffffff81eb6360 t smu_v11_0_i2c_abort +ffffffff81eb6460 t lock_bus +ffffffff81eb6500 t trylock_bus +ffffffff81eb6550 t unlock_bus +ffffffff81eb7000 t smuio_v11_0_get_rom_index_offset +ffffffff81eb7040 t smuio_v11_0_get_rom_data_offset +ffffffff81eb7080 t smuio_v11_0_update_rom_clock_gating +ffffffff81eb71c0 t smuio_v11_0_get_clock_gating_state +ffffffff81eb8000 t smuio_v11_0_6_get_rom_index_offset +ffffffff81eb8040 t smuio_v11_0_6_get_rom_data_offset +ffffffff81eb8080 t smuio_v11_0_6_update_rom_clock_gating +ffffffff81eb81c0 t smuio_v11_0_6_get_clock_gating_state +ffffffff81eb9000 t smuio_v13_0_get_rom_index_offset +ffffffff81eb9040 t smuio_v13_0_get_rom_data_offset +ffffffff81eb9080 t smuio_v13_0_update_rom_clock_gating +ffffffff81eb91c0 t smuio_v13_0_get_clock_gating_state +ffffffff81eb9260 t smuio_v13_0_get_die_id +ffffffff81eb92e0 t smuio_v13_0_get_socket_id +ffffffff81eb9360 t smuio_v13_0_is_host_gpu_xgmi_supported +ffffffff81eba000 t smuio_v13_0_6_get_rom_index_offset +ffffffff81eba040 t smuio_v13_0_6_get_rom_data_offset +ffffffff81ebb000 t smuio_v9_0_get_rom_index_offset +ffffffff81ebb040 t smuio_v9_0_get_rom_data_offset +ffffffff81ebb080 t smuio_v9_0_update_rom_clock_gating +ffffffff81ebb1c0 t smuio_v9_0_get_clock_gating_state +ffffffff81ebc000 T soc15_grbm_select +ffffffff81ebc080 T soc15_program_register_sequence +ffffffff81ebc280 T soc15_set_virt_ops +ffffffff81ebc2f0 t soc15_common_early_init +ffffffff81ebc680 t soc15_common_late_init +ffffffff81ebc6c0 t soc15_common_sw_init +ffffffff81ebc720 t soc15_common_sw_fini +ffffffff81ebc770 t soc15_common_hw_init +ffffffff81ebc8a0 t soc15_common_hw_fini +ffffffff81ebc970 t soc15_common_suspend +ffffffff81ebc9b0 t soc15_common_resume +ffffffff81ebc9f0 t soc15_common_is_idle +ffffffff81ebca20 t soc15_common_wait_for_idle +ffffffff81ebca50 t soc15_common_soft_reset +ffffffff81ebca80 t soc15_common_set_clockgating_state +ffffffff81ebcdc0 t soc15_common_set_powergating_state +ffffffff81ebcdf0 t soc15_common_get_clockgating_state +ffffffff81ebced0 t soc15_pcie_rreg +ffffffff81ebcf30 t soc15_pcie_wreg +ffffffff81ebcf90 t soc15_pcie_rreg64 +ffffffff81ebcff0 t soc15_pcie_wreg64 +ffffffff81ebd050 t soc15_uvd_ctx_rreg +ffffffff81ebd0f0 t soc15_uvd_ctx_wreg +ffffffff81ebd180 t soc15_didt_rreg +ffffffff81ebd220 t soc15_didt_wreg +ffffffff81ebd2a0 t soc15_gc_cac_rreg +ffffffff81ebd3c0 t soc15_gc_cac_wreg +ffffffff81ebd4d0 t soc15_se_cac_rreg +ffffffff81ebd5f0 t soc15_se_cac_wreg +ffffffff81ebd700 t soc15_read_disabled_bios +ffffffff81ebd730 t soc15_read_register +ffffffff81ebd830 t soc15_vga_set_state +ffffffff81ebd860 t soc15_asic_reset +ffffffff81ebd960 t soc15_asic_reset_method +ffffffff81ebdae0 t soc15_get_xclk +ffffffff81ebdb30 t soc15_set_uvd_clocks +ffffffff81ebdb60 t soc15_set_vce_clocks +ffffffff81ebdb90 t soc15_get_config_memsize +ffffffff81ebdbb0 t soc15_need_full_reset +ffffffff81ebdbe0 t soc15_get_pcie_usage +ffffffff81ebdd10 t soc15_need_reset_on_init +ffffffff81ebddb0 t soc15_get_pcie_replay_count +ffffffff81ebde20 t soc15_supports_baco +ffffffff81ebde80 t soc15_pre_asic_init +ffffffff81ebde90 t soc15_query_video_codecs +ffffffff81ebdf40 t vega20_get_pcie_usage +ffffffff81ebf000 T soc21_grbm_select +ffffffff81ebf080 t soc21_common_early_init +ffffffff81ebf2a0 t soc21_common_late_init +ffffffff81ebf2d0 t soc21_common_sw_init +ffffffff81ebf300 t soc21_common_sw_fini +ffffffff81ebf330 t soc21_common_hw_init +ffffffff81ebf400 t soc21_common_hw_fini +ffffffff81ebf460 t soc21_common_suspend +ffffffff81ebf4c0 t soc21_common_resume +ffffffff81ebf590 t soc21_common_is_idle +ffffffff81ebf5c0 t soc21_common_wait_for_idle +ffffffff81ebf5f0 t soc21_common_soft_reset +ffffffff81ebf620 t soc21_common_set_clockgating_state +ffffffff81ebf6d0 t soc21_common_set_powergating_state +ffffffff81ebf730 t soc21_common_get_clockgating_state +ffffffff81ebf780 t soc21_pcie_rreg +ffffffff81ebf7e0 t soc21_pcie_wreg +ffffffff81ebf840 t soc21_pcie_rreg64 +ffffffff81ebf8a0 t soc21_pcie_wreg64 +ffffffff81ebf900 t soc21_didt_rreg +ffffffff81ebf9a0 t soc21_didt_wreg +ffffffff81ebfa20 t soc21_read_disabled_bios +ffffffff81ebfa50 t soc21_read_register +ffffffff81ebfb40 t soc21_vga_set_state +ffffffff81ebfb70 t soc21_asic_reset +ffffffff81ebfc50 t soc21_asic_reset_method +ffffffff81ebfd10 t soc21_get_xclk +ffffffff81ebfd40 t soc21_set_uvd_clocks +ffffffff81ebfd70 t soc21_set_vce_clocks +ffffffff81ebfda0 t soc21_get_config_memsize +ffffffff81ebfdc0 t soc21_need_full_reset +ffffffff81ebfe20 t soc21_init_doorbell_index +ffffffff81ebff40 t soc21_need_reset_on_init +ffffffff81ebffd0 t soc21_get_pcie_replay_count +ffffffff81ec0000 t soc21_pre_asic_init +ffffffff81ec0030 t soc21_update_umd_stable_pstate +ffffffff81ec00a0 t soc21_query_video_codecs +ffffffff81ec1000 t tonga_ih_early_init +ffffffff81ec1050 t tonga_ih_sw_init +ffffffff81ec10d0 t tonga_ih_sw_fini +ffffffff81ec1110 t tonga_ih_hw_init +ffffffff81ec1300 t tonga_ih_hw_fini +ffffffff81ec13a0 t tonga_ih_suspend +ffffffff81ec1440 t tonga_ih_resume +ffffffff81ec1480 t tonga_ih_is_idle +ffffffff81ec14d0 t tonga_ih_wait_for_idle +ffffffff81ec1570 t tonga_ih_check_soft_reset +ffffffff81ec15d0 t tonga_ih_pre_soft_reset +ffffffff81ec1680 t tonga_ih_soft_reset +ffffffff81ec1750 t tonga_ih_post_soft_reset +ffffffff81ec1790 t tonga_ih_set_clockgating_state +ffffffff81ec17c0 t tonga_ih_set_powergating_state +ffffffff81ec17f0 t tonga_ih_get_wptr +ffffffff81ec18e0 t tonga_ih_decode_iv +ffffffff81ec1960 t tonga_ih_set_rptr +ffffffff81ec2000 t umc_v6_0_init_registers +ffffffff81ec3000 t umc_v6_1_query_ras_error_count +ffffffff81ec34e0 t umc_v6_1_query_ras_error_address +ffffffff81ec37c0 t umc_v6_1_err_cnt_init +ffffffff81ec4000 t umc_v6_7_query_ras_error_count +ffffffff81ec4410 t umc_v6_7_query_ras_error_address +ffffffff81ec4590 t umc_v6_7_query_ras_poison_mode +ffffffff81ec45f0 t umc_v6_7_convert_error_address +ffffffff81ec48f0 t umc_v6_7_ecc_info_query_ras_error_count +ffffffff81ec4b30 t umc_v6_7_ecc_info_query_ras_error_address +ffffffff81ec5000 t umc_v8_10_query_ras_error_count +ffffffff81ec5280 t umc_v8_10_query_ras_error_address +ffffffff81ec55b0 t umc_v8_10_err_cnt_init +ffffffff81ec5730 t umc_v8_10_query_ras_poison_mode +ffffffff81ec6000 t umc_v8_7_query_ras_error_count +ffffffff81ec6310 t umc_v8_7_query_ras_error_address +ffffffff81ec64c0 t umc_v8_7_err_cnt_init +ffffffff81ec6610 t umc_v8_7_ecc_info_query_ras_error_count +ffffffff81ec6740 t umc_v8_7_ecc_info_query_ras_error_address +ffffffff81ec7000 t uvd_v5_0_early_init +ffffffff81ec7050 t uvd_v5_0_sw_init +ffffffff81ec7140 t uvd_v5_0_sw_fini +ffffffff81ec7190 t uvd_v5_0_hw_init +ffffffff81ec76a0 t uvd_v5_0_hw_fini +ffffffff81ec7720 t uvd_v5_0_suspend +ffffffff81ec7820 t uvd_v5_0_resume +ffffffff81ec7870 t uvd_v5_0_is_idle +ffffffff81ec78c0 t uvd_v5_0_wait_for_idle +ffffffff81ec7950 t uvd_v5_0_soft_reset +ffffffff81ec79f0 t uvd_v5_0_set_clockgating_state +ffffffff81ec7b90 t uvd_v5_0_set_powergating_state +ffffffff81ec7bd0 t uvd_v5_0_get_clockgating_state +ffffffff81ec7c50 t uvd_v5_0_ring_get_rptr +ffffffff81ec7c90 t uvd_v5_0_ring_get_wptr +ffffffff81ec7cd0 t uvd_v5_0_ring_set_wptr +ffffffff81ec7d00 t uvd_v5_0_ring_emit_ib +ffffffff81ec7f70 t uvd_v5_0_ring_emit_fence +ffffffff81ec8520 t uvd_v5_0_ring_test_ring +ffffffff81ec86c0 t uvd_v5_0_ring_insert_nop +ffffffff81ec8820 t uvd_v5_0_set_interrupt_state +ffffffff81ec8850 t uvd_v5_0_process_interrupt +ffffffff81ec88b0 t uvd_v5_0_stop +ffffffff81ec89c0 t uvd_v5_0_start +ffffffff81eca000 t uvd_v6_0_early_init +ffffffff81eca140 t uvd_v6_0_sw_init +ffffffff81eca460 t uvd_v6_0_sw_fini +ffffffff81eca520 t uvd_v6_0_hw_init +ffffffff81ecaae0 t uvd_v6_0_hw_fini +ffffffff81ecab60 t uvd_v6_0_suspend +ffffffff81ecac60 t uvd_v6_0_resume +ffffffff81ecacb0 t uvd_v6_0_is_idle +ffffffff81ecad00 t uvd_v6_0_wait_for_idle +ffffffff81ecad90 t uvd_v6_0_check_soft_reset +ffffffff81ecae10 t uvd_v6_0_pre_soft_reset +ffffffff81ecae50 t uvd_v6_0_soft_reset +ffffffff81ecaf20 t uvd_v6_0_post_soft_reset +ffffffff81ecafc0 t uvd_v6_0_set_clockgating_state +ffffffff81ecb150 t uvd_v6_0_set_powergating_state +ffffffff81ecb1c0 t uvd_v6_0_get_clockgating_state +ffffffff81ecb250 t uvd_v6_0_ring_get_rptr +ffffffff81ecb290 t uvd_v6_0_ring_get_wptr +ffffffff81ecb2d0 t uvd_v6_0_ring_set_wptr +ffffffff81ecb300 t uvd_v6_0_ring_emit_ib +ffffffff81ecb660 t uvd_v6_0_ring_emit_fence +ffffffff81ecbc10 t uvd_v6_0_ring_emit_pipeline_sync +ffffffff81ecc010 t uvd_v6_0_ring_emit_vm_flush +ffffffff81ecc370 t uvd_v6_0_ring_emit_hdp_flush +ffffffff81ecc3a0 t uvd_v6_0_ring_test_ring +ffffffff81ecc540 t uvd_v6_0_ring_insert_nop +ffffffff81ecc6a0 t uvd_v6_0_ring_emit_wreg +ffffffff81ecc920 t uvd_v6_0_enc_ring_get_rptr +ffffffff81ecc980 t uvd_v6_0_enc_ring_get_wptr +ffffffff81ecc9e0 t uvd_v6_0_enc_ring_set_wptr +ffffffff81ecca20 t uvd_v6_0_enc_ring_emit_ib +ffffffff81eccc60 t uvd_v6_0_enc_ring_emit_fence +ffffffff81eccea0 t uvd_v6_0_enc_ring_emit_pipeline_sync +ffffffff81ecd050 t uvd_v6_0_enc_ring_emit_vm_flush +ffffffff81ecd260 t uvd_v6_0_enc_ring_test_ring +ffffffff81ecd3b0 t uvd_v6_0_enc_ring_test_ib +ffffffff81ecd970 t uvd_v6_0_enc_ring_insert_end +ffffffff81ecda00 t uvd_v6_0_set_interrupt_state +ffffffff81ecda30 t uvd_v6_0_process_interrupt +ffffffff81ecdb20 t uvd_v6_0_stop +ffffffff81ecdc30 t uvd_v6_0_start +ffffffff81ecf000 t uvd_v7_0_early_init +ffffffff81ecf270 t uvd_v7_0_sw_init +ffffffff81ecf5f0 t uvd_v7_0_sw_fini +ffffffff81ecf700 t uvd_v7_0_hw_init +ffffffff81ed2620 t uvd_v7_0_hw_fini +ffffffff81ed2930 t uvd_v7_0_suspend +ffffffff81ed29e0 t uvd_v7_0_resume +ffffffff81ed2a30 t uvd_v7_0_set_clockgating_state +ffffffff81ed2a60 t uvd_v7_0_ring_get_rptr +ffffffff81ed2b00 t uvd_v7_0_ring_get_wptr +ffffffff81ed2ba0 t uvd_v7_0_ring_set_wptr +ffffffff81ed2c20 t uvd_v7_0_ring_patch_cs_in_place +ffffffff81ed2ca0 t uvd_v7_0_ring_emit_ib +ffffffff81ed3050 t uvd_v7_0_ring_emit_fence +ffffffff81ed36b0 t uvd_v7_0_ring_emit_vm_flush +ffffffff81ed3720 t uvd_v7_0_ring_emit_hdp_flush +ffffffff81ed3750 t uvd_v7_0_ring_test_ring +ffffffff81ed39e0 t uvd_v7_0_ring_insert_nop +ffffffff81ed3b80 t uvd_v7_0_ring_emit_wreg +ffffffff81ed3e50 t uvd_v7_0_ring_emit_reg_wait +ffffffff81ed41f0 t uvd_v7_0_enc_ring_get_rptr +ffffffff81ed42e0 t uvd_v7_0_enc_ring_get_wptr +ffffffff81ed43e0 t uvd_v7_0_enc_ring_set_wptr +ffffffff81ed44e0 t uvd_v7_0_enc_ring_emit_ib +ffffffff81ed4720 t uvd_v7_0_enc_ring_emit_fence +ffffffff81ed4960 t uvd_v7_0_enc_ring_emit_vm_flush +ffffffff81ed49d0 t uvd_v7_0_enc_ring_test_ring +ffffffff81ed4b30 t uvd_v7_0_enc_ring_test_ib +ffffffff81ed50f0 t uvd_v7_0_enc_ring_insert_end +ffffffff81ed5180 t uvd_v7_0_enc_ring_emit_wreg +ffffffff81ed52e0 t uvd_v7_0_enc_ring_emit_reg_wait +ffffffff81ed54a0 t uvd_v7_0_set_interrupt_state +ffffffff81ed54d0 t uvd_v7_0_process_interrupt +ffffffff81ed6000 t vce_v3_0_early_init +ffffffff81ed6180 t vce_v3_0_sw_init +ffffffff81ed62d0 t vce_v3_0_sw_fini +ffffffff81ed6320 t vce_v3_0_hw_init +ffffffff81ed6400 t vce_v3_0_hw_fini +ffffffff81ed64f0 t vce_v3_0_suspend +ffffffff81ed65c0 t vce_v3_0_resume +ffffffff81ed6610 t vce_v3_0_is_idle +ffffffff81ed6680 t vce_v3_0_wait_for_idle +ffffffff81ed6730 t vce_v3_0_check_soft_reset +ffffffff81ed6830 t vce_v3_0_pre_soft_reset +ffffffff81ed68d0 t vce_v3_0_soft_reset +ffffffff81ed69a0 t vce_v3_0_post_soft_reset +ffffffff81ed6b00 t vce_v3_0_set_clockgating_state +ffffffff81ed6df0 t vce_v3_0_set_powergating_state +ffffffff81ed7640 t vce_v3_0_get_clockgating_state +ffffffff81ed7700 t vce_v3_0_ring_get_rptr +ffffffff81ed77d0 t vce_v3_0_ring_get_wptr +ffffffff81ed78a0 t vce_v3_0_ring_set_wptr +ffffffff81ed7960 t vce_v3_0_ring_emit_ib +ffffffff81ed7ba0 t vce_v3_0_emit_pipeline_sync +ffffffff81ed7d50 t vce_v3_0_emit_vm_flush +ffffffff81ed7fc0 t vce_v3_0_set_interrupt_state +ffffffff81ed8030 t vce_v3_0_process_interrupt +ffffffff81ed80f0 t vce_v3_0_stop +ffffffff81ed9000 t vce_v4_0_early_init +ffffffff81ed90b0 t vce_v4_0_sw_init +ffffffff81ed92e0 t vce_v4_0_sw_fini +ffffffff81ed9360 t vce_v4_0_hw_init +ffffffff81ed9b40 t vce_v4_0_hw_fini +ffffffff81ed9be0 t vce_v4_0_suspend +ffffffff81ed9e00 t vce_v4_0_resume +ffffffff81ed9eb0 t vce_v4_0_set_clockgating_state +ffffffff81ed9ee0 t vce_v4_0_set_powergating_state +ffffffff81ed9fc0 t vce_v4_0_ring_get_rptr +ffffffff81eda030 t vce_v4_0_ring_get_wptr +ffffffff81eda0c0 t vce_v4_0_ring_set_wptr +ffffffff81eda150 t vce_v4_0_ring_emit_ib +ffffffff81eda390 t vce_v4_0_ring_emit_fence +ffffffff81eda5d0 t vce_v4_0_emit_vm_flush +ffffffff81eda640 t vce_v4_0_ring_insert_end +ffffffff81eda6d0 t vce_v4_0_emit_wreg +ffffffff81eda830 t vce_v4_0_emit_reg_wait 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vcn_v1_0_enc_ring_emit_wreg +ffffffff81ee0800 t vcn_v1_0_enc_ring_emit_reg_wait +ffffffff81ee09c0 t vcn_v1_0_set_interrupt_state +ffffffff81ee09f0 t vcn_v1_0_process_interrupt +ffffffff81ee0aa0 t vcn_v1_0_idle_work_handler +ffffffff81ee0c30 t vcn_v1_0_pause_dpg_mode +ffffffff81ee1d50 t vcn_v1_0_enable_clock_gating +ffffffff81ee2160 t vcn_v1_0_disable_clock_gating +ffffffff81ee26f0 t vcn_1_0_enable_static_power_gating +ffffffff81ee2910 t vcn_v1_0_start_dpg_mode +ffffffff81ee6540 t vcn_v1_0_start_spg_mode +ffffffff81ee8760 t vcn_v1_0_clock_gating_dpg_mode +ffffffff81ee9000 T vcn_v2_0_dec_ring_insert_start +ffffffff81ee91c0 T vcn_v2_0_dec_ring_insert_end +ffffffff81ee92c0 T vcn_v2_0_dec_ring_insert_nop +ffffffff81ee9430 T vcn_v2_0_dec_ring_emit_fence +ffffffff81ee99f0 T vcn_v2_0_dec_ring_emit_ib +ffffffff81ee9d50 T vcn_v2_0_dec_ring_emit_reg_wait +ffffffff81eea0a0 T vcn_v2_0_dec_ring_emit_vm_flush +ffffffff81eea110 T vcn_v2_0_dec_ring_emit_wreg +ffffffff81eea3a0 T vcn_v2_0_enc_ring_emit_fence +ffffffff81eea5e0 T vcn_v2_0_enc_ring_insert_end +ffffffff81eea670 T vcn_v2_0_enc_ring_emit_ib +ffffffff81eea8b0 T vcn_v2_0_enc_ring_emit_reg_wait +ffffffff81eeaa70 T vcn_v2_0_enc_ring_emit_vm_flush +ffffffff81eeaae0 T vcn_v2_0_enc_ring_emit_wreg +ffffffff81eeac40 T vcn_v2_0_dec_ring_test_ring +ffffffff81eeaee0 t vcn_v2_0_early_init +ffffffff81eeb060 t vcn_v2_0_sw_init +ffffffff81eeb370 t vcn_v2_0_sw_fini +ffffffff81eeb3f0 t vcn_v2_0_hw_init +ffffffff81eebda0 t vcn_v2_0_hw_fini +ffffffff81eebea0 t vcn_v2_0_suspend +ffffffff81eebed0 t vcn_v2_0_resume +ffffffff81eebf20 t vcn_v2_0_is_idle +ffffffff81eebfb0 t vcn_v2_0_wait_for_idle +ffffffff81eec0a0 t vcn_v2_0_set_clockgating_state +ffffffff81eec130 t vcn_v2_0_set_powergating_state +ffffffff81eee3f0 t vcn_v2_0_dec_ring_get_rptr +ffffffff81eee480 t vcn_v2_0_dec_ring_get_wptr +ffffffff81eee520 t vcn_v2_0_dec_ring_set_wptr +ffffffff81eee650 t vcn_v2_0_enc_ring_get_rptr +ffffffff81eee720 t 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vcn_v3_0_set_clockgating_state +ffffffff81f01800 t vcn_v3_0_set_powergating_state +ffffffff81f04080 t vcn_v3_0_dec_ring_get_rptr +ffffffff81f04120 t vcn_v3_0_dec_ring_get_wptr +ffffffff81f041d0 t vcn_v3_0_dec_ring_set_wptr +ffffffff81f04340 t vcn_v3_0_ring_patch_cs_in_place +ffffffff81f04640 t vcn_v3_0_enc_ring_get_rptr +ffffffff81f04730 t vcn_v3_0_enc_ring_get_wptr +ffffffff81f04830 t vcn_v3_0_enc_ring_set_wptr +ffffffff81f04930 t vcn_v3_0_set_interrupt_state +ffffffff81f04960 t vcn_v3_0_process_interrupt +ffffffff81f04a50 t vcn_v3_0_pause_dpg_mode +ffffffff81f053c0 t vcn_v3_0_enable_clock_gating +ffffffff81f05640 t vcn_v3_0_disable_clock_gating +ffffffff81f05be0 t vcn_v3_0_start_dpg_mode +ffffffff81f0a980 t vcn_v3_0_clock_gating_dpg_mode +ffffffff81f0c000 t vcn_v4_0_early_init +ffffffff81f0c120 t vcn_v4_0_sw_init +ffffffff81f0c360 t vcn_v4_0_sw_fini +ffffffff81f0c440 t vcn_v4_0_hw_init +ffffffff81f0ce80 t vcn_v4_0_hw_fini +ffffffff81f0cf90 t vcn_v4_0_suspend +ffffffff81f0cfc0 t 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dm_helpers_dp_mst_clear_payload_allocation_table +ffffffff81f2f5a0 T dm_helpers_dp_mst_poll_for_allocation_change_trigger +ffffffff81f2f610 T dm_helpers_dp_mst_send_payload_allocation +ffffffff81f2f6e0 T dm_dtn_log_begin +ffffffff81f2f730 T dm_dtn_log_append_v +ffffffff81f2f880 T dm_dtn_log_end +ffffffff81f2f8d0 T dm_helpers_dp_mst_start_top_mgr +ffffffff81f2f970 T dm_helpers_dp_mst_stop_top_mgr +ffffffff81f2fa10 T dm_helpers_dp_read_dpcd +ffffffff81f2fa90 T dm_helpers_dp_write_dpcd +ffffffff81f2fb10 T dm_helpers_submit_i2c +ffffffff81f2fc30 T dm_helpers_dp_write_dsc_enable +ffffffff81f301b0 T dm_helpers_is_dp_sink_present +ffffffff81f30240 T dm_helpers_read_local_edid +ffffffff81f303e0 T dm_helper_dmub_aux_transfer_sync +ffffffff81f30400 T dm_helpers_dmub_set_config_sync +ffffffff81f30420 T dm_set_dcn_clocks +ffffffff81f30450 T dm_helpers_smu_timeout +ffffffff81f30480 T dm_helpers_init_panel_settings +ffffffff81f304f0 T dm_helpers_override_panel_settings +ffffffff81f30530 T dm_helpers_allocate_gpu_mem +ffffffff81f30620 T dm_helpers_free_gpu_mem +ffffffff81f306d0 T dm_helpers_dmub_outbox_interrupt_control +ffffffff81f30760 T dm_helpers_mst_enable_stream_features +ffffffff81f30870 T dm_set_phyd32clk +ffffffff81f308a0 T dm_helpers_enable_periodic_detection +ffffffff81f308d0 t execute_synaptics_rc_command +ffffffff81f31000 T amdgpu_dm_irq_register_interrupt +ffffffff81f311a0 t dm_irq_work_func +ffffffff81f311c0 T amdgpu_dm_irq_unregister_interrupt +ffffffff81f313e0 T amdgpu_dm_irq_init +ffffffff81f314d0 T amdgpu_dm_irq_fini +ffffffff81f31670 T amdgpu_dm_irq_suspend +ffffffff81f31780 T amdgpu_dm_irq_resume_early +ffffffff81f31940 T amdgpu_dm_irq_resume_late +ffffffff81f31b00 T amdgpu_dm_set_irq_funcs +ffffffff81f31bc0 T amdgpu_dm_outbox_init +ffffffff81f31bf0 T amdgpu_dm_hpd_init +ffffffff81f31cb0 T amdgpu_dm_hpd_fini +ffffffff81f31d70 t amdgpu_dm_set_crtc_irq_state +ffffffff81f31df0 t amdgpu_dm_irq_handler +ffffffff81f31fe0 t amdgpu_dm_set_vline0_irq_state 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amdgpu_dm_mst_connector_early_unregister +ffffffff81f350a0 t dm_dp_mst_connector_destroy +ffffffff81f35120 t dm_dp_mst_get_modes +ffffffff81f35550 t dm_dp_mst_detect +ffffffff81f356e0 t dm_mst_atomic_best_encoder +ffffffff81f35740 t dm_dp_mst_atomic_check +ffffffff81f35770 t set_dsc_configs_from_fairness_vars +ffffffff81f36000 T amd_get_format_info +ffffffff81f36020 T fill_blending_from_plane_state +ffffffff81f360d0 T fill_plane_buffer_attributes +ffffffff81f36640 T dm_plane_helper_check_state +ffffffff81f36860 T fill_dc_scaling_info +ffffffff81f36ac0 T handle_cursor_update +ffffffff81f36d40 T amdgpu_dm_plane_init +ffffffff81f37ac0 t dm_drm_plane_reset +ffffffff81f37b50 t dm_drm_plane_duplicate_state +ffffffff81f37be0 t dm_drm_plane_destroy_state +ffffffff81f37c20 t dm_plane_format_mod_supported +ffffffff81f37d50 t dm_plane_helper_prepare_fb +ffffffff81f38000 t dm_plane_helper_cleanup_fb +ffffffff81f380a0 t dm_plane_atomic_check +ffffffff81f38170 t dm_plane_atomic_async_check +ffffffff81f381b0 t dm_plane_atomic_async_update +ffffffff81f38260 t amdgpu_bo_reserve +ffffffff81f38470 t amdgpu_bo_unreserve +ffffffff81f39000 T dm_pp_apply_display_requirements +ffffffff81f391e0 T dm_pp_get_clock_levels_by_type +ffffffff81f39520 T dm_pp_get_clock_levels_by_type_with_latency +ffffffff81f396e0 T dm_pp_get_clock_levels_by_type_with_voltage +ffffffff81f398a0 T dm_pp_notify_wm_clock_changes +ffffffff81f398f0 T dm_pp_apply_power_level_change_request +ffffffff81f39920 T dm_pp_apply_clock_for_voltage_request +ffffffff81f399c0 T dm_pp_get_static_clocks +ffffffff81f39a80 T dm_pp_get_funcs +ffffffff81f39b90 t pp_rv_set_wm_ranges +ffffffff81f39ce0 t pp_rv_set_pme_wa_enable +ffffffff81f39d00 t pp_rv_set_active_display_count +ffffffff81f39d20 t pp_rv_set_min_deep_sleep_dcfclk +ffffffff81f39d40 t pp_rv_set_hard_min_dcefclk_by_freq +ffffffff81f39d60 t pp_rv_set_hard_min_fclk_by_freq +ffffffff81f39d80 t pp_nv_set_display_count +ffffffff81f39de0 t pp_nv_set_hard_min_dcefclk_by_freq +ffffffff81f39e50 t pp_nv_set_min_deep_sleep_dcfclk +ffffffff81f39eb0 t pp_nv_set_voltage_by_freq +ffffffff81f39f40 t pp_nv_set_wm_ranges +ffffffff81f39f90 t pp_nv_set_hard_min_uclk_by_freq +ffffffff81f3a000 t pp_nv_get_maximum_sustainable_clocks +ffffffff81f3a060 t pp_nv_get_uclk_dpm_states +ffffffff81f3a0c0 t pp_nv_set_pstate_handshake_support +ffffffff81f3a110 t pp_rn_set_wm_ranges +ffffffff81f3a160 t pp_rn_get_dpm_clock_table +ffffffff81f3b000 T amdgpu_dm_set_psr_caps +ffffffff81f3b110 T amdgpu_dm_link_setup_psr +ffffffff81f3b290 T amdgpu_dm_psr_enable +ffffffff81f3b390 T amdgpu_dm_psr_disable +ffffffff81f3b410 T amdgpu_dm_psr_disable_all +ffffffff81f3c000 T dm_get_elapse_time_in_ns +ffffffff81f3c030 T dm_perf_trace_timestamp +ffffffff81f3d000 T dc_assert_fp_enabled +ffffffff81f3d070 T dc_fpu_begin +ffffffff81f3d0c0 T dc_fpu_end +ffffffff81f3e000 T dal_vector_construct +ffffffff81f3e0d0 T dal_vector_presized_create +ffffffff81f3e350 T dal_vector_create +ffffffff81f3e470 T dal_vector_destruct +ffffffff81f3e4c0 T dal_vector_destroy +ffffffff81f3e540 T dal_vector_get_count +ffffffff81f3e570 T dal_vector_at_index +ffffffff81f3e5b0 T dal_vector_remove_at_index +ffffffff81f3e640 T dal_vector_set_at_index +ffffffff81f3e6a0 T dal_vector_insert_at +ffffffff81f3e7a0 T dal_vector_reserve +ffffffff81f3e850 T dal_vector_append +ffffffff81f3e950 T dal_vector_clone +ffffffff81f3ea00 T dal_vector_capacity +ffffffff81f3ea30 T dal_vector_clear +ffffffff81f3f000 T fixed_point_to_int_frac +ffffffff81f3f200 T convert_float_matrix +ffffffff81f3f2c0 T reduce_fraction +ffffffff81f40000 T is_rgb_cspace +ffffffff81f40080 T is_lower_pipe_tree_visible +ffffffff81f400e0 T is_upper_pipe_tree_visible +ffffffff81f40140 T is_pipe_tree_visible +ffffffff81f401c0 T build_prescale_params +ffffffff81f41000 T dc_fixpt_from_fraction +ffffffff81f411d0 T dc_fixpt_mul +ffffffff81f41380 T dc_fixpt_sqr +ffffffff81f414f0 T dc_fixpt_recip +ffffffff81f41560 T dc_fixpt_sinc +ffffffff81f41750 T dc_fixpt_sin +ffffffff81f41780 T dc_fixpt_cos +ffffffff81f41870 T dc_fixpt_exp +ffffffff81f41b70 t fixed31_32_exp_from_taylor_series +ffffffff81f41f50 T dc_fixpt_log +ffffffff81f42160 T dc_fixpt_u4d19 +ffffffff81f421a0 T dc_fixpt_u3d19 +ffffffff81f421e0 T dc_fixpt_u2d19 +ffffffff81f42220 T dc_fixpt_u0d19 +ffffffff81f42250 T dc_fixpt_clamp_u0d14 +ffffffff81f422a0 T dc_fixpt_clamp_u0d10 +ffffffff81f422f0 T dc_fixpt_s4d19 +ffffffff81f43000 T bios_parser_create +ffffffff81f443b0 t bios_parser_get_connectors_number +ffffffff81f44410 t bios_parser_get_connector_id +ffffffff81f444a0 t bios_parser_get_src_obj +ffffffff81f445b0 t bios_parser_get_i2c_info +ffffffff81f447d0 t bios_parser_get_hpd_info +ffffffff81f448b0 t bios_parser_get_device_tag +ffffffff81f44ab0 t bios_parser_get_spread_spectrum_info +ffffffff81f44db0 t bios_parser_get_ss_entry_number +ffffffff81f44fe0 t bios_parser_get_embedded_panel_info +ffffffff81f45530 t bios_parser_get_gpio_pin_info +ffffffff81f45650 t bios_parser_get_encoder_cap_info +ffffffff81f45750 t bios_parser_set_scratch_critical_state +ffffffff81f45760 t bios_parser_is_device_id_supported +ffffffff81f45820 t bios_parser_encoder_control +ffffffff81f45860 t bios_parser_transmitter_control +ffffffff81f458a0 t bios_parser_enable_crtc +ffffffff81f458f0 t bios_parser_adjust_pixel_clock +ffffffff81f45930 t bios_parser_set_pixel_clock +ffffffff81f45970 t bios_parser_set_dce_clock +ffffffff81f459b0 t bios_parser_enable_spread_spectrum_on_ppll +ffffffff81f45a00 t bios_parser_program_crtc_timing +ffffffff81f45a40 t bios_parser_program_display_engine_pll +ffffffff81f45a80 t bios_parser_enable_disp_power_gating +ffffffff81f45ac0 t bios_parser_destroy +ffffffff81f45b80 t bios_get_board_layout_info +ffffffff81f45e10 t get_bios_object +ffffffff81f45fe0 t get_ss_info_from_ss_info_table +ffffffff81f461a0 t get_ss_entry_number_from_ss_info_tbl +ffffffff81f47000 T firmware_parser_create +ffffffff81f48de0 t bios_parser_get_connectors_number +ffffffff81f48f70 t bios_parser_get_connector_id +ffffffff81f49000 t bios_parser_get_src_obj +ffffffff81f492a0 t bios_parser_get_i2c_info +ffffffff81f49510 t bios_parser_get_hpd_info +ffffffff81f49680 t bios_parser_get_device_tag +ffffffff81f49950 t bios_parser_get_spread_spectrum_info +ffffffff81f49d10 t bios_parser_get_ss_entry_number +ffffffff81f49d40 t bios_parser_get_embedded_panel_info +ffffffff81f49f40 t bios_parser_get_gpio_pin_info +ffffffff81f4a060 t bios_parser_get_encoder_cap_info +ffffffff81f4a1d0 t bios_parser_is_accelerated_mode +ffffffff81f4a1e0 t bios_parser_set_scratch_critical_state +ffffffff81f4a1f0 t bios_parser_is_device_id_supported +ffffffff81f4a270 t bios_parser_encoder_control +ffffffff81f4a2b0 t bios_parser_transmitter_control +ffffffff81f4a2f0 t bios_parser_enable_crtc +ffffffff81f4a340 t bios_parser_set_pixel_clock +ffffffff81f4a380 t bios_parser_set_dce_clock +ffffffff81f4a3c0 t bios_parser_program_crtc_timing +ffffffff81f4a400 t bios_parser_enable_disp_power_gating +ffffffff81f4a440 t firmware_parser_destroy +ffffffff81f4a500 t bios_get_board_layout_info +ffffffff81f4a9b0 t bios_parser_pack_data_tables +ffffffff81f4a9e0 t bios_get_atom_dc_golden_table +ffffffff81f4ab20 t bios_parser_enable_lvtma_control +ffffffff81f4ab70 t bios_parser_get_soc_bb_info +ffffffff81f4ac80 t bios_parser_get_disp_connector_caps_info +ffffffff81f4ade0 t bios_parser_get_lttpr_caps +ffffffff81f4af30 t bios_parser_get_lttpr_interop +ffffffff81f4b070 t bios_parser_get_connector_speed_cap_info +ffffffff81f4b1c0 t get_bios_object +ffffffff81f4b320 t get_bios_object_from_path_v3 +ffffffff81f4c000 T object_id_from_bios_object_id +ffffffff81f4d000 T bios_get_image +ffffffff81f4d050 T bios_is_accelerated_mode +ffffffff81f4d0b0 T bios_set_scratch_acc_mode_change +ffffffff81f4d0f0 T bios_set_scratch_critical_state +ffffffff81f4d130 T bios_get_vga_enabled_displays +ffffffff81f4e000 T dal_bios_parser_create +ffffffff81f4e070 T dal_bios_parser_destroy +ffffffff81f4f000 T dal_bios_parser_init_cmd_tbl +ffffffff81f4f800 t encoder_control_digx_v3 +ffffffff81f4f900 t encoder_control_digx_v4 +ffffffff81f4fa00 t encoder_control_digx_v5 +ffffffff81f4fb50 t encoder_control_dig1_v1 +ffffffff81f4fbd0 t encoder_control_dig2_v1 +ffffffff81f4fc50 t encoder_control_dig_v1 +ffffffff81f4fcb0 t transmitter_control_v2 +ffffffff81f4fe50 t transmitter_control_v3 +ffffffff81f50010 t transmitter_control_v4 +ffffffff81f501c0 t transmitter_control_v1_5 +ffffffff81f50340 t transmitter_control_v1_6 +ffffffff81f504b0 t set_pixel_clock_v3 +ffffffff81f50620 t set_pixel_clock_v5 +ffffffff81f507c0 t set_pixel_clock_v6 +ffffffff81f50970 t set_pixel_clock_v7 +ffffffff81f50b40 t enable_spread_spectrum_on_ppll_v1 +ffffffff81f50c60 t enable_spread_spectrum_on_ppll_v2 +ffffffff81f50d90 t enable_spread_spectrum_on_ppll_v3 +ffffffff81f50ea0 t adjust_display_pll_v2 +ffffffff81f50ff0 t adjust_display_pll_v3 +ffffffff81f51160 t dac1_encoder_control_v1 +ffffffff81f511e0 t dac2_encoder_control_v1 +ffffffff81f51260 t dac1_output_control_v1 +ffffffff81f512c0 t dac2_output_control_v1 +ffffffff81f51320 t set_crtc_using_dtd_timing_v3 +ffffffff81f51490 t set_crtc_timing_v1 +ffffffff81f51630 t enable_crtc_v1 +ffffffff81f516d0 t enable_crtc_mem_req_v1 +ffffffff81f51770 t program_clock_v5 +ffffffff81f51870 t program_clock_v6 +ffffffff81f51990 t external_encoder_control_v3 +ffffffff81f51b40 t enable_disp_power_gating_v2_1 +ffffffff81f51c00 t set_dce_clock_v2_1 +ffffffff81f52000 T dal_firmware_parser_init_cmd_tbl +ffffffff81f523d0 t encoder_control_digx_v1_5 +ffffffff81f525b0 t encoder_control_fallback +ffffffff81f52610 t transmitter_control_v1_6 +ffffffff81f527c0 t transmitter_control_v1_7 +ffffffff81f529b0 t transmitter_control_fallback +ffffffff81f52a10 t set_pixel_clock_v7 +ffffffff81f52c70 t set_pixel_clock_fallback +ffffffff81f52cd0 t set_crtc_using_dtd_timing_v3 +ffffffff81f52e40 t enable_crtc_v1 +ffffffff81f52ee0 t external_encoder_control_v3 +ffffffff81f52f10 t enable_disp_power_gating_v2_1 +ffffffff81f53070 t enable_disp_power_gating_fallback +ffffffff81f530d0 t set_dce_clock_v2_1 +ffffffff81f531f0 t get_smu_clock_info_v3_1 +ffffffff81f53260 t enable_lvtma_control +ffffffff81f54000 T dal_bios_parser_init_cmd_tbl_helper +ffffffff81f540a0 T dal_cmd_table_helper_controller_id_to_atom +ffffffff81f541c0 T dal_cmd_table_helper_transmitter_bp_to_atom +ffffffff81f54240 T dal_cmd_table_helper_encoder_mode_bp_to_atom +ffffffff81f542d0 T dal_cmd_table_helper_assign_control_parameter +ffffffff81f54390 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src +ffffffff81f54470 T dal_cmd_table_helper_encoder_id_to_atom +ffffffff81f55000 T dal_bios_parser_init_cmd_tbl_helper2 +ffffffff81f550b0 T dal_cmd_table_helper_controller_id_to_atom2 +ffffffff81f551c0 T dal_cmd_table_helper_transmitter_bp_to_atom2 +ffffffff81f55240 T dal_cmd_table_helper_encoder_mode_bp_to_atom2 +ffffffff81f552d0 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src2 +ffffffff81f553b0 T dal_cmd_table_helper_encoder_id_to_atom2 +ffffffff81f56000 T dal_cmd_tbl_helper_dce110_get_table ffffffff81f56030 t encoder_action_to_atom ffffffff81f560b0 t engine_bp_to_atom ffffffff81f56100 t clock_source_id_to_atom -ffffffff81f561d0 t clock_source_id_to_atom_phy_clk_src_id -ffffffff81f56220 t signal_type_to_atom_dig_mode -ffffffff81f56280 t hpd_sel_to_atom -ffffffff81f562c0 t dig_encoder_sel_to_atom -ffffffff81f562f0 t phy_id_to_atom -ffffffff81f56330 t disp_power_gating_action_to_atom -ffffffff81f563a0 t dc_clock_type_to_atom -ffffffff81f56420 t transmitter_color_depth_to_atom -ffffffff81f57000 T dal_cmd_tbl_helper_dce80_get_table +ffffffff81f561a0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff81f561f0 t signal_type_to_atom_dig_mode +ffffffff81f56250 t hpd_sel_to_atom +ffffffff81f56290 t dig_encoder_sel_to_atom +ffffffff81f562c0 t phy_id_to_atom +ffffffff81f56300 t disp_power_gating_action_to_atom +ffffffff81f57000 T dal_cmd_tbl_helper_dce112_get_table2 ffffffff81f57030 t encoder_action_to_atom ffffffff81f570b0 t engine_bp_to_atom ffffffff81f57100 t clock_source_id_to_atom @@ -29356,15770 +29345,15784 @@ ffffffff81f571d0 t clock_source_id_to_atom_phy_clk_src ffffffff81f57220 t signal_type_to_atom_dig_mode ffffffff81f57280 t hpd_sel_to_atom ffffffff81f572c0 t dig_encoder_sel_to_atom -ffffffff81f57310 t phy_id_to_atom -ffffffff81f57350 t disp_power_gating_action_to_atom -ffffffff81f58000 T clk_mgr_helper_get_active_display_cnt -ffffffff81f580e0 T clk_mgr_helper_get_active_plane_cnt -ffffffff81f58190 T clk_mgr_exit_optimized_pwr_state -ffffffff81f58290 T clk_mgr_optimize_pwr_state -ffffffff81f583a0 T dc_clk_mgr_create -ffffffff81f58a80 T dc_destroy_clk_mgr -ffffffff81f59000 T dentist_get_divider_from_did -ffffffff81f59070 T dce_adjust_dp_ref_freq_for_ss -ffffffff81f59180 T dce_get_dp_ref_freq_khz -ffffffff81f592b0 T dce12_get_dp_ref_freq_khz -ffffffff81f592d0 T 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rv2_clk_mgr_construct +ffffffff81f62000 T dentist_get_did_from_divider +ffffffff81f62090 T dcn20_update_clocks_update_dpp_dto +ffffffff81f62160 T dcn20_update_clocks_update_dentist +ffffffff81f62680 T dcn2_update_clocks +ffffffff81f62bf0 T dcn2_read_clocks_from_hw_dentist +ffffffff81f62cc0 T dcn2_update_clocks_fpga +ffffffff81f62e40 T dcn2_init_clocks +ffffffff81f62ee0 T dcn2_get_clock +ffffffff81f62f50 T dcn20_clk_mgr_construct +ffffffff81f630a0 t dcn2_enable_pme_wa +ffffffff81f630f0 t dcn2_are_clock_states_equal +ffffffff81f63160 t dcn2_notify_link_rate_change +ffffffff81f64000 t dcn201_update_clocks +ffffffff81f64240 t dcn201_init_clocks +ffffffff81f642e0 T dcn201_clk_mgr_construct +ffffffff81f65000 T rn_clk_mgr_construct +ffffffff81f658e0 t rn_update_clocks +ffffffff81f65e80 t rn_set_low_power_state +ffffffff81f66050 t rn_init_clocks +ffffffff81f660f0 t rn_enable_pme_wa +ffffffff81f66100 t rn_are_clock_states_equal +ffffffff81f66150 t rn_notify_wm_ranges +ffffffff81f664e0 t rn_notify_link_rate_change +ffffffff81f67000 T rn_vbios_smu_get_smu_version +ffffffff81f67020 t rn_vbios_smu_send_msg_with_param +ffffffff81f671b0 T rn_vbios_smu_set_dispclk +ffffffff81f672f0 T rn_vbios_smu_set_dprefclk +ffffffff81f67360 T rn_vbios_smu_set_hard_min_dcfclk +ffffffff81f673e0 T rn_vbios_smu_set_min_deep_sleep_dcfclk +ffffffff81f67460 T rn_vbios_smu_set_phyclk +ffffffff81f674a0 T rn_vbios_smu_set_dppclk +ffffffff81f67560 T rn_vbios_smu_set_dcn_low_power_state +ffffffff81f67580 T rn_vbios_smu_enable_48mhz_tmdp_refclk_pwrdwn +ffffffff81f675a0 T rn_vbios_smu_enable_pme_wa +ffffffff81f675c0 T rn_vbios_smu_is_periodic_retraining_disabled +ffffffff81f68000 T dcn3_init_clocks +ffffffff81f683d0 t dcn3_init_clocks_fpga +ffffffff81f683e0 T dcn3_clk_mgr_construct +ffffffff81f68540 T dcn3_clk_mgr_destroy +ffffffff81f685b0 t dcn3_update_clocks +ffffffff81f68a10 t dcn3_enable_pme_wa +ffffffff81f68a50 t dcn3_are_clock_states_equal +ffffffff81f68ab0 t dcn3_notify_wm_ranges +ffffffff81f68d40 t dcn30_notify_link_rate_change +ffffffff81f68e60 t dcn3_set_hard_min_memclk +ffffffff81f68f00 t dcn3_set_hard_max_memclk +ffffffff81f68f60 t dcn3_set_max_memclk +ffffffff81f68fa0 t dcn3_set_min_memclk +ffffffff81f68fe0 t dcn3_get_memclk_states_from_smu +ffffffff81f69120 t dcn3_is_smu_present +ffffffff81f6a000 T dcn30_smu_test_message +ffffffff81f6a070 t dcn30_smu_send_msg_with_param +ffffffff81f6a1d0 T dcn30_smu_get_smu_version +ffffffff81f6a1f0 T dcn30_smu_check_driver_if_version +ffffffff81f6a240 T dcn30_smu_check_msg_header_version +ffffffff81f6a290 T dcn30_smu_set_dram_addr_high +ffffffff81f6a2b0 T dcn30_smu_set_dram_addr_low +ffffffff81f6a2d0 T dcn30_smu_transfer_wm_table_smu_2_dram +ffffffff81f6a2f0 T dcn30_smu_transfer_wm_table_dram_2_smu +ffffffff81f6a310 T dcn30_smu_set_hard_min_by_freq +ffffffff81f6a360 T dcn30_smu_set_hard_max_by_freq +ffffffff81f6a3b0 T dcn30_smu_get_dpm_freq_by_index +ffffffff81f6a400 T dcn30_smu_get_dc_mode_max_dpm_freq +ffffffff81f6a450 T dcn30_smu_set_min_deep_sleep_dcef_clk +ffffffff81f6a470 T dcn30_smu_set_num_of_displays +ffffffff81f6a490 T dcn30_smu_set_display_refresh_from_mall +ffffffff81f6a4c0 T dcn30_smu_set_external_client_df_cstate_allow +ffffffff81f6a4e0 T dcn30_smu_set_pme_workaround +ffffffff81f6b000 T dcn301_smu_get_smu_version +ffffffff81f6b070 t dcn301_smu_send_msg_with_param +ffffffff81f6b1f0 T dcn301_smu_set_dispclk +ffffffff81f6b290 T dcn301_smu_set_dprefclk +ffffffff81f6b340 T dcn301_smu_set_hard_min_dcfclk +ffffffff81f6b3e0 T dcn301_smu_set_min_deep_sleep_dcfclk +ffffffff81f6b480 T dcn301_smu_set_dppclk +ffffffff81f6b520 T dcn301_smu_set_display_idle_optimization +ffffffff81f6b570 T dcn301_smu_enable_phy_refclk_pwrdwn +ffffffff81f6b5c0 T dcn301_smu_enable_pme_wa +ffffffff81f6b5e0 T dcn301_smu_set_dram_addr_high +ffffffff81f6b630 T dcn301_smu_set_dram_addr_low +ffffffff81f6b680 T dcn301_smu_transfer_dpm_table_smu_2_dram +ffffffff81f6b6a0 T dcn301_smu_transfer_wm_table_dram_2_smu +ffffffff81f6c000 T vg_clk_mgr_construct +ffffffff81f6c7f0 T vg_clk_mgr_destroy +ffffffff81f6c840 t vg_update_clocks +ffffffff81f6cbd0 t vg_init_clocks +ffffffff81f6cc70 t vg_enable_pme_wa +ffffffff81f6cc80 t vg_are_clock_states_equal +ffffffff81f6ccd0 t vg_notify_wm_ranges +ffffffff81f6e000 T dcn31_update_clocks +ffffffff81f6e620 T dcn31_init_clocks +ffffffff81f6e6d0 T dcn31_are_clock_states_equal +ffffffff81f6e730 T dcn31_get_dtb_ref_freq_khz +ffffffff81f6e760 T dcn31_clk_mgr_construct +ffffffff81f6edd0 T dcn31_clk_mgr_destroy +ffffffff81f6ee20 t dcn31_set_low_power_state +ffffffff81f6f000 t dcn31_enable_pme_wa +ffffffff81f6f010 t dcn31_notify_wm_ranges +ffffffff81f6f3b0 t find_clk_for_voltage +ffffffff81f70000 T dcn31_smu_get_smu_version +ffffffff81f70020 t dcn31_smu_send_msg_with_param +ffffffff81f70220 T dcn31_smu_set_dispclk +ffffffff81f70290 T dcn31_smu_set_dprefclk +ffffffff81f70300 T dcn31_smu_set_hard_min_dcfclk +ffffffff81f70380 T dcn31_smu_set_min_deep_sleep_dcfclk +ffffffff81f70400 T dcn31_smu_set_dppclk +ffffffff81f70470 T dcn31_smu_set_display_idle_optimization +ffffffff81f704c0 T dcn31_smu_enable_phy_refclk_pwrdwn +ffffffff81f70510 T dcn31_smu_enable_pme_wa +ffffffff81f70550 T dcn31_smu_set_dram_addr_high +ffffffff81f70590 T dcn31_smu_set_dram_addr_low +ffffffff81f705d0 T dcn31_smu_transfer_dpm_table_smu_2_dram +ffffffff81f70610 T dcn31_smu_transfer_wm_table_dram_2_smu +ffffffff81f70650 T dcn31_smu_set_zstate_support +ffffffff81f706c0 T dcn31_smu_set_dtbclk +ffffffff81f71000 T dcn314_update_clocks +ffffffff81f716d0 T dcn314_are_clock_states_equal +ffffffff81f71730 T dcn314_clk_mgr_construct +ffffffff81f72440 T dcn314_clk_mgr_destroy +ffffffff81f72490 t dcn314_enable_pme_wa +ffffffff81f724a0 t dcn314_notify_wm_ranges +ffffffff81f73000 T dcn314_smu_get_smu_version +ffffffff81f73020 t dcn314_smu_send_msg_with_param +ffffffff81f73240 T dcn314_smu_set_dispclk +ffffffff81f732b0 T dcn314_smu_set_dprefclk +ffffffff81f73320 T dcn314_smu_set_hard_min_dcfclk +ffffffff81f733a0 T dcn314_smu_set_min_deep_sleep_dcfclk +ffffffff81f73420 T dcn314_smu_set_dppclk +ffffffff81f73490 T dcn314_smu_set_display_idle_optimization +ffffffff81f734e0 T dcn314_smu_enable_phy_refclk_pwrdwn +ffffffff81f73530 T dcn314_smu_enable_pme_wa +ffffffff81f73570 T dcn314_smu_set_dram_addr_high +ffffffff81f735b0 T dcn314_smu_set_dram_addr_low +ffffffff81f735f0 T dcn314_smu_transfer_dpm_table_smu_2_dram +ffffffff81f73630 T dcn314_smu_transfer_wm_table_dram_2_smu +ffffffff81f73670 T dcn314_smu_set_zstate_support +ffffffff81f736c0 T dcn314_smu_set_dtbclk +ffffffff81f74000 T dcn315_clk_mgr_construct +ffffffff81f749c0 T dcn315_clk_mgr_destroy +ffffffff81f74a10 t dcn315_update_clocks +ffffffff81f75000 t dcn315_enable_pme_wa +ffffffff81f75010 t dcn315_notify_wm_ranges +ffffffff81f76000 T dcn315_smu_get_smu_version +ffffffff81f76020 t dcn315_smu_send_msg_with_param +ffffffff81f761b0 T dcn315_smu_set_dispclk +ffffffff81f76220 T dcn315_smu_set_hard_min_dcfclk +ffffffff81f762a0 T dcn315_smu_set_min_deep_sleep_dcfclk +ffffffff81f76320 T dcn315_smu_set_dppclk +ffffffff81f76390 T dcn315_smu_set_display_idle_optimization +ffffffff81f763e0 T dcn315_smu_enable_phy_refclk_pwrdwn +ffffffff81f76430 T dcn315_smu_enable_pme_wa +ffffffff81f76470 T dcn315_smu_set_dram_addr_high +ffffffff81f764b0 T dcn315_smu_set_dram_addr_low +ffffffff81f764f0 T dcn315_smu_transfer_dpm_table_smu_2_dram +ffffffff81f76530 T dcn315_smu_transfer_wm_table_dram_2_smu +ffffffff81f76570 T dcn315_smu_get_dpref_clk +ffffffff81f765d0 T dcn315_smu_get_dtbclk +ffffffff81f76630 T dcn315_smu_set_dtbclk +ffffffff81f77000 T dcn316_clk_mgr_construct +ffffffff81f776a0 T dcn316_clk_mgr_destroy +ffffffff81f776f0 t dcn316_update_clocks +ffffffff81f77d20 t dcn316_enable_pme_wa +ffffffff81f77d30 t dcn316_notify_wm_ranges +ffffffff81f780c0 t find_clk_for_voltage +ffffffff81f79000 T dcn316_smu_get_smu_version +ffffffff81f79020 t dcn316_smu_send_msg_with_param +ffffffff81f791b0 T dcn316_smu_set_dispclk +ffffffff81f79220 T dcn316_smu_set_hard_min_dcfclk +ffffffff81f792a0 T dcn316_smu_set_min_deep_sleep_dcfclk +ffffffff81f79320 T dcn316_smu_set_dppclk +ffffffff81f79390 T dcn316_smu_set_display_idle_optimization +ffffffff81f793e0 T dcn316_smu_enable_phy_refclk_pwrdwn +ffffffff81f79430 T dcn316_smu_set_dram_addr_high +ffffffff81f79470 T dcn316_smu_set_dram_addr_low +ffffffff81f794b0 T dcn316_smu_transfer_dpm_table_smu_2_dram +ffffffff81f794f0 T dcn316_smu_transfer_wm_table_dram_2_smu +ffffffff81f79530 T dcn316_smu_enable_pme_wa +ffffffff81f79570 T dcn316_smu_set_dtbclk +ffffffff81f795b0 T dcn316_smu_get_dpref_clk +ffffffff81f79610 T dcn316_smu_get_smu_fclk +ffffffff81f7a000 T dcn32_init_clocks +ffffffff81f7a4e0 T dcn32_clk_mgr_construct +ffffffff81f7a770 T dcn32_clk_mgr_destroy +ffffffff81f7a7e0 t dcn32_update_clocks +ffffffff81f7af30 t dcn32_dump_clk_registers +ffffffff81f7b150 t dcn32_enable_pme_wa +ffffffff81f7b190 t dcn32_are_clock_states_equal +ffffffff81f7b200 t dcn32_notify_wm_ranges +ffffffff81f7b380 t dcn32_set_hard_min_memclk +ffffffff81f7b420 t dcn32_set_hard_max_memclk +ffffffff81f7b480 t dcn32_get_memclk_states_from_smu +ffffffff81f7b670 t dcn32_is_smu_present +ffffffff81f7c000 T dcn32_smu_send_fclk_pstate_message +ffffffff81f7c020 t dcn32_smu_send_msg_with_param +ffffffff81f7c160 T dcn32_smu_send_cab_for_uclk_message +ffffffff81f7c190 T dcn32_smu_transfer_wm_table_dram_2_smu +ffffffff81f7c1b0 T dcn32_smu_set_pme_workaround +ffffffff81f7c1d0 T dcn32_smu_set_hard_min_by_freq +ffffffff81f7d000 T dc_stream_adjust_vmin_vmax +ffffffff81f7d180 T dc_stream_get_last_used_drr_vtotal +ffffffff81f7d2e0 T dc_stream_get_crtc_position +ffffffff81f7d510 T dc_stream_configure_crc +ffffffff81f7d760 T dc_stream_get_crc +ffffffff81f7d840 T dc_stream_set_dyn_expansion +ffffffff81f7dab0 T dc_stream_set_dither_option +ffffffff81f7dc20 T dc_stream_set_gamut_remap +ffffffff81f7dda0 T dc_stream_program_csc_matrix +ffffffff81f7dfc0 T dc_stream_set_static_screen_params +ffffffff81f7e150 T dc_create +ffffffff81f7eaf0 t dc_construct_ctx +ffffffff81f7ec50 t dc_destruct +ffffffff81f7ef20 T dc_hardware_init +ffffffff81f7f030 T dc_init_callbacks +ffffffff81f7f060 T dc_deinit_callbacks +ffffffff81f7f090 T dc_destroy +ffffffff81f7f0e0 T dc_validate_boot_timing +ffffffff81f7f470 T dc_enable_stereo +ffffffff81f7f570 T dc_trigger_sync +ffffffff81f7fb90 T dc_z10_restore +ffffffff81f7fbd0 T dc_z10_save_init +ffffffff81f7fc10 T dc_commit_state +ffffffff81f7fd40 t dc_commit_state_no_check +ffffffff81f811c0 T dc_acquire_release_mpc_3dlut +ffffffff81f812b0 T dc_post_update_surfaces_to_stream +ffffffff81f816c0 T dc_create_state +ffffffff81f81750 T dc_copy_state +ffffffff81f81940 T dc_retain_state +ffffffff81f81970 T dc_release_state +ffffffff81f819e0 T dc_set_generic_gpio_for_stereo +ffffffff81f81af0 T dc_check_update_surfaces_for_stream +ffffffff81f82760 T dc_dmub_update_dirty_rect +ffffffff81f829f0 T dc_update_planes_and_stream +ffffffff81f83140 t commit_minimal_transition_state +ffffffff81f834d0 t commit_planes_for_stream +ffffffff81f84bc0 T dc_commit_updates_for_stream +ffffffff81f84fc0 t copy_surface_update_to_plane +ffffffff81f853c0 t copy_stream_update_to_stream +ffffffff81f859f0 T dc_get_current_stream_count +ffffffff81f85a30 T dc_get_stream_at_index +ffffffff81f85a80 T dc_interrupt_to_irq_source +ffffffff81f85aa0 T dc_interrupt_set +ffffffff81f85af0 T dc_interrupt_ack +ffffffff81f85b10 T dc_power_down_on_boot +ffffffff81f85b60 T dc_set_power_state +ffffffff81f85d50 T dc_resume +ffffffff81f85dc0 T dc_is_dmcu_initialized +ffffffff81f85e10 T dc_is_oem_i2c_device_present +ffffffff81f85e60 T dc_submit_i2c +ffffffff81f85e90 T dc_submit_i2c_oem +ffffffff81f85ee0 T dc_link_add_remote_sink +ffffffff81f86070 T dc_link_remove_remote_sink +ffffffff81f86160 T get_clock_requirements_for_state +ffffffff81f861e0 T dc_set_clock +ffffffff81f86220 T dc_get_clock +ffffffff81f86260 T dc_set_psr_allow_active +ffffffff81f86360 T dc_allow_idle_optimizations +ffffffff81f86400 T dc_unlock_memory_clock_frequency +ffffffff81f86470 T dc_lock_memory_clock_frequency +ffffffff81f86500 T dc_enable_dcmode_clk_limit +ffffffff81f86610 t blank_and_force_memclk +ffffffff81f867f0 T dc_is_plane_eligible_for_idle_optimizations +ffffffff81f86840 T dc_hardware_release +ffffffff81f86890 T dc_mclk_switch_using_fw_based_vblank_stretch_shut_down +ffffffff81f868d0 T dc_is_dmub_outbox_supported +ffffffff81f86930 T dc_enable_dmub_notifications +ffffffff81f86990 T dc_enable_dmub_outbox +ffffffff81f869d0 T dc_process_dmub_aux_transfer_async +ffffffff81f86b70 T get_link_index_from_dpia_port_index +ffffffff81f86c20 T dc_process_dmub_set_config_async +ffffffff81f86d10 T dc_process_dmub_set_mst_slots +ffffffff81f86e00 T dc_process_dmub_dpia_hpd_int_enable +ffffffff81f86ed0 T dc_disable_accelerated_mode +ffffffff81f86ef0 T dc_notify_vsync_int_state +ffffffff81f87120 T dc_extended_blank_supported +ffffffff81f88000 T pre_surface_trace +ffffffff81f88030 T update_surface_trace +ffffffff81f88060 T post_surface_trace +ffffffff81f88090 T context_timing_trace +ffffffff81f88240 T context_clock_trace +ffffffff81f88270 T dc_status_to_str +ffffffff81f89000 T find_color_matrix +ffffffff81f890b0 T color_space_to_black_color +ffffffff81f89140 T hwss_wait_for_blank_complete +ffffffff81f891f0 T get_mpctree_visual_confirm_color +ffffffff81f89250 T get_surface_visual_confirm_color +ffffffff81f89300 T get_hdr_visual_confirm_color +ffffffff81f893b0 T get_subvp_visual_confirm_color +ffffffff81f894a0 T get_surface_tile_visual_confirm_color +ffffffff81f8a000 T get_hpd_gpio +ffffffff81f8a0e0 T dc_link_wait_for_t12 +ffffffff81f8a140 T dc_link_detect_sink +ffffffff81f8a2f0 T dc_link_is_dp_sink_present +ffffffff81f8a570 T reset_cur_dp_mst_topology +ffffffff81f8a5d0 T dc_link_detect +ffffffff81f8b940 T dc_link_get_hpd_state +ffffffff81f8b9b0 T link_create +ffffffff81f8cad0 T link_destroy +ffffffff81f8cc30 T dc_link_blank_all_dp_displays +ffffffff81f8cd00 T dc_link_blank_dp_stream +ffffffff81f8ce10 T dc_link_blank_all_edp_displays +ffffffff81f8ced0 T dc_power_alpm_dpcd_enable +ffffffff81f8cf40 T dc_link_validate_mode_timing +ffffffff81f8d460 T dc_link_get_backlight_level +ffffffff81f8d5d0 T dc_link_get_target_backlight_pwm +ffffffff81f8d6e0 T dc_link_set_backlight_level +ffffffff81f8d850 T dc_link_set_psr_allow_active +ffffffff81f8dad0 T dc_link_get_psr_state +ffffffff81f8dc00 T dc_link_setup_psr +ffffffff81f8e060 T dc_link_get_psr_residency +ffffffff81f8e160 T dc_link_set_sink_vtotal_in_psr_active +ffffffff81f8e1e0 T dc_link_get_status +ffffffff81f8e210 T core_link_resume +ffffffff81f8e250 t program_hpd_filter +ffffffff81f8e3e0 T dc_link_allocate_mst_payload +ffffffff81f8e8c0 t update_mst_stream_alloc_table +ffffffff81f8eb40 t dc_log_vcp_x_y +ffffffff81f8ecd0 T dc_link_reduce_mst_payload +ffffffff81f8f150 T dc_link_increase_mst_payload +ffffffff81f8f5d0 T core_link_enable_stream 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dc_bandwidth_in_kbps_from_timing +ffffffff81f92860 T dc_get_cur_link_res_map +ffffffff81f92940 T dc_restore_link_res_map +ffffffff81f92a70 t read_current_link_settings_on_detect +ffffffff81f92c80 t enable_link_dp +ffffffff81f93000 T dal_ddc_i2c_payloads_add +ffffffff81f930c0 T dal_ddc_service_create +ffffffff81f93230 T dal_ddc_service_destroy +ffffffff81f932c0 T dal_ddc_service_get_type +ffffffff81f932f0 T dal_ddc_service_set_transaction_type +ffffffff81f93320 T dal_ddc_service_is_in_aux_transaction_mode +ffffffff81f93360 T ddc_service_set_dongle_type +ffffffff81f93390 T get_defer_delay +ffffffff81f934c0 T dal_ddc_service_i2c_query_dp_dual_mode_adaptor +ffffffff81f938d0 T dal_ddc_service_query_ddc_data +ffffffff81f93c90 T dal_ddc_submit_aux_command +ffffffff81f93d80 T dc_link_aux_transfer_with_retries +ffffffff81f93d90 T dc_link_aux_transfer_raw +ffffffff81f93dc0 T dc_link_aux_try_to_configure_timeout +ffffffff81f93ea0 T dal_ddc_service_set_ddc_pin +ffffffff81f93ed0 T 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dpp1_dppclk_control +ffffffff82008d90 T dpp1_construct +ffffffff82008e10 t dpp1_cm_set_regamma_pwl +ffffffff82009000 T dpp1_cm_set_gamut_remap +ffffffff820091a0 T dpp1_cm_set_output_csc_default +ffffffff82009220 t dpp1_cm_program_color_matrix +ffffffff820093e0 T dpp1_cm_set_output_csc_adjustment +ffffffff820093f0 T dpp1_cm_power_on_regamma_lut +ffffffff82009470 T dpp1_cm_program_regamma_lut +ffffffff82009680 T dpp1_cm_configure_regamma_lut +ffffffff82009780 T dpp1_cm_program_regamma_luta_settings +ffffffff82009910 T dpp1_cm_program_regamma_lutb_settings +ffffffff82009aa0 T dpp1_program_input_csc +ffffffff82009cf0 T dpp1_program_bias_and_scale +ffffffff82009e60 T dpp1_program_degamma_lutb_settings +ffffffff8200a010 T dpp1_program_degamma_luta_settings +ffffffff8200a1c0 T dpp1_power_on_degamma_lut +ffffffff8200a240 T dpp1_set_degamma +ffffffff8200a430 T dpp1_degamma_ram_select +ffffffff8200a490 T dpp1_program_degamma_lut +ffffffff8200a7b0 T dpp1_set_degamma_pwl +ffffffff8200a980 T dpp1_full_bypass +ffffffff8200ab20 T dpp1_program_input_lut +ffffffff8200b1f0 T dpp1_set_hdr_multiplier +ffffffff8200c000 T dpp1_dscl_calc_lb_num_partitions +ffffffff8200c1e0 T dpp1_dscl_is_lb_conf_valid +ffffffff8200c220 T dpp1_dscl_set_scaler_manual_scale +ffffffff8200d5e0 t dpp1_dscl_get_filter_coeffs_64p +ffffffff8200d6b0 t dpp1_dscl_set_scaler_filter +ffffffff8200e000 T hubbub1_wm_read_state +ffffffff8200e380 T hubbub1_allow_self_refresh_control +ffffffff8200e400 T hubbub1_is_allow_self_refresh_enabled +ffffffff8200e470 T hubbub1_verify_allow_pstate_change_high +ffffffff8200e630 T hubbub1_wm_change_req_wa +ffffffff8200e6d0 T hubbub1_program_urgent_watermarks +ffffffff8200eab0 T hubbub1_program_stutter_watermarks +ffffffff8200ef10 T hubbub1_program_pstate_watermarks +ffffffff8200f160 T hubbub1_program_watermarks +ffffffff8200f290 T hubbub1_update_dchub +ffffffff8200f4c0 T hubbub1_toggle_watermark_change_req +ffffffff8200f560 T hubbub1_soft_reset +ffffffff8200f5a0 T hubbub1_construct +ffffffff8200f600 t hubbub1_get_dcc_compression_cap +ffffffff8200f820 t hubbub1_dcc_support_swizzle +ffffffff8200f8b0 t hubbub1_dcc_support_pixel_format +ffffffff82010000 T hubp1_set_blank +ffffffff82010110 T hubp1_clear_underflow +ffffffff82010160 T hubp1_vready_workaround +ffffffff820101f0 T hubp1_program_tiling +ffffffff82010460 T hubp1_program_size +ffffffff820105f0 T hubp1_program_rotation +ffffffff82010760 T hubp1_program_pixel_format +ffffffff82010d30 T hubp1_program_surface_flip_and_addr +ffffffff820114c0 T hubp1_dcc_control +ffffffff82011580 T hubp1_program_surface_config +ffffffff82011690 T hubp1_program_requestor +ffffffff82011a60 T hubp1_program_deadline +ffffffff82012160 T hubp1_is_flip_pending +ffffffff82012270 T min_set_viewport +ffffffff82012560 T hubp1_read_state_common +ffffffff82013200 T hubp1_read_state +ffffffff820134d0 T hubp1_get_cursor_pitch +ffffffff82013570 T hubp1_cursor_set_attributes +ffffffff82013820 T hubp1_cursor_set_position +ffffffff82013b80 T hubp1_clk_cntl +ffffffff82013bd0 T hubp1_vtg_sel +ffffffff82013c10 T hubp1_in_blank +ffffffff82013c80 T hubp1_soft_reset +ffffffff82013cc0 T hubp1_set_flip_int +ffffffff82013d10 T hubp1_init +ffffffff82013d40 T dcn10_hubp_construct +ffffffff82013db0 t hubp1_setup +ffffffff82013e70 t hubp1_setup_interdependent +ffffffff820141e0 t hubp1_set_vm_system_aperture_settings +ffffffff82014400 t hubp1_set_vm_context0_settings +ffffffff820146e0 t hubp1_set_hubp_blank_en +ffffffff82014720 t hubp1_disconnect +ffffffff820147b0 t hubp1_disable_control +ffffffff820147f0 t hubp1_get_underflow_status +ffffffff82014860 t hubp1_wait_pipe_read_start +ffffffff82015000 T dcn10_lock_all_pipes +ffffffff82015100 T dcn10_log_hw_state +ffffffff82016d10 T dcn10_did_underflow_occur +ffffffff82016db0 T dcn10_enable_power_gating_plane +ffffffff82016f50 T dcn10_disable_vga +ffffffff82017140 T dcn10_dpp_pg_control +ffffffff82017390 T dcn10_hubp_pg_control +ffffffff820175e0 T dcn10_bios_golden_init +ffffffff82017740 T dcn10_enable_stream_timing +ffffffff82017b30 T dcn10_verify_allow_pstate_change_high +ffffffff82017e90 T dcn10_plane_atomic_disconnect +ffffffff82017fc0 T dcn10_plane_atomic_power_down +ffffffff82018100 T dcn10_plane_atomic_disable +ffffffff82018260 T dcn10_disable_plane +ffffffff82018420 T dcn10_init_pipes +ffffffff82018b20 T dcn10_init_hw +ffffffff82019110 T dcn10_power_down_on_boot +ffffffff820192b0 T dcn10_reset_hw_ctx_wrap +ffffffff820195d0 T dcn10_update_plane_addr +ffffffff820196f0 T dcn10_set_input_transfer_func +ffffffff82019860 T dcn10_set_output_transfer_func +ffffffff82019920 T dcn10_pipe_control_lock +ffffffff820199f0 T dcn10_cursor_lock +ffffffff82019bb0 T dcn10_enable_vblanks_synchronization +ffffffff8201a330 T dcn10_enable_timing_synchronization +ffffffff8201a6f0 T dcn10_enable_per_frame_crtc_position_reset +ffffffff8201a8d0 T dcn10_program_gamut_remap +ffffffff8201aad0 T dcn10_program_output_csc +ffffffff8201ac00 T dcn10_update_visual_confirm_color +ffffffff8201ad00 T dcn10_update_mpcc +ffffffff8201af80 T dcn10_blank_pixel_data +ffffffff8201b0c0 T dcn10_set_hdr_multiplier +ffffffff8201b150 T dcn10_program_pipe +ffffffff8201bd10 T dcn10_wait_for_pending_cleared +ffffffff8201be10 T dcn10_post_unlock_program_front_end +ffffffff8201c0c0 T dcn10_prepare_bandwidth +ffffffff8201c270 T dcn10_optimize_bandwidth +ffffffff8201c420 T dcn10_set_drr +ffffffff8201c520 T dcn10_get_position +ffffffff8201c5b0 T dcn10_set_static_screen_control +ffffffff8201c650 T dcn10_setup_stereo +ffffffff8201c7b0 T dcn10_wait_for_mpcc_disconnect +ffffffff8201c960 T dcn10_dummy_display_power_gating +ffffffff8201c990 T dcn10_update_pending_status +ffffffff8201cad0 T dcn10_update_dchub +ffffffff8201cb00 T dcn10_set_cursor_position +ffffffff8201d040 T dcn10_set_cursor_attribute +ffffffff8201d090 T dcn10_set_cursor_sdr_white_level +ffffffff8201d160 T dcn10_get_vupdate_offset_from_vsync +ffffffff8201d1f0 T dcn10_calc_vupdate_position +ffffffff8201d280 T dcn10_setup_periodic_interrupt +ffffffff8201d390 T dcn10_setup_vupdate_interrupt +ffffffff8201d450 T dcn10_unblank_stream +ffffffff8201d560 T dcn10_send_immediate_sdp_message +ffffffff8201d5c0 T dcn10_set_clock +ffffffff8201d6d0 T dcn10_get_clock +ffffffff8201d730 T dcn10_get_dcc_en_bits +ffffffff8201e000 T snprintf_count +ffffffff8201e090 T dcn10_clear_status_bits +ffffffff8201e240 T dcn10_get_hw_state +ffffffff82020000 T dcn10_hw_sequencer_construct +ffffffff82021000 T dcn10_ipp_construct +ffffffff82021050 T dcn20_ipp_construct +ffffffff820210a0 t dcn10_ipp_destroy +ffffffff82022000 T dcn10_link_encoder_set_dp_phy_pattern_training_pattern +ffffffff820220b0 T dcn10_get_dig_frontend +ffffffff82022170 T enc1_configure_encoder +ffffffff820221f0 T dcn10_psr_program_dp_dphy_fast_training +ffffffff82022270 T dcn10_psr_program_secondary_packet +ffffffff820222f0 T dcn10_is_dig_enabled +ffffffff82022350 T dcn10_link_encoder_validate_dvi_output +ffffffff82022400 T dcn10_link_encoder_validate_dp_output +ffffffff82022440 T dcn10_link_encoder_construct +ffffffff82022630 T dcn10_link_encoder_validate_output_with_stream +ffffffff82022820 T dcn10_link_encoder_hw_init +ffffffff82022a20 T dcn10_aux_initialize +ffffffff82022ab0 T dcn10_link_encoder_destroy +ffffffff82022b00 T dcn10_link_encoder_setup +ffffffff82022c50 T dcn10_link_encoder_enable_tmds_output +ffffffff82022d40 T dcn10_link_encoder_enable_tmds_output_with_clk_pattern_wa +ffffffff82022e60 T dcn10_link_encoder_enable_dp_output +ffffffff82022fe0 T dcn10_link_encoder_enable_dp_mst_output +ffffffff82023160 T dcn10_link_encoder_disable_output +ffffffff82023340 T dcn10_link_encoder_dp_set_lane_settings +ffffffff820234e0 T dcn10_link_encoder_dp_set_phy_pattern +ffffffff82023c00 t set_dp_phy_pattern_hbr2_compliance_cp2520_2 +ffffffff82023e00 T dcn10_link_encoder_update_mst_stream_allocation_table +ffffffff820240e0 T dcn10_link_encoder_connect_dig_be_to_fe +ffffffff82024220 T dcn10_link_encoder_enable_hpd +ffffffff82024260 T dcn10_link_encoder_disable_hpd +ffffffff820242a0 T dcn10_get_dig_mode +ffffffff82024310 T dcn10_link_encoder_get_max_link_cap +ffffffff82024390 t program_pattern_symbols +ffffffff82025000 T mpc1_set_bg_color +ffffffff820251e0 T mpc1_get_mpcc +ffffffff82025270 T mpc1_update_stereo_mix +ffffffff820253a0 T mpc1_assert_idle_mpcc +ffffffff82025470 T mpc1_get_mpcc_for_dpp +ffffffff82025520 T mpc1_is_mpcc_idle +ffffffff82025610 T mpc1_assert_mpcc_idle_before_connect +ffffffff82025750 T mpc1_insert_plane +ffffffff82025ca0 T mpc1_remove_mpcc +ffffffff82026060 T mpc1_mpc_init +ffffffff82026380 T mpc1_mpc_init_single_inst +ffffffff82026570 T mpc1_init_mpcc_list_from_hw +ffffffff82026840 T mpc1_read_mpcc_state +ffffffff820269d0 T mpc1_cursor_lock +ffffffff82026a50 T mpc1_get_mpc_out_mux +ffffffff82026ad0 T dcn10_mpc_construct +ffffffff82026c50 t mpc1_update_blending +ffffffff82027000 T opp1_program_bit_depth_reduction +ffffffff82027400 T opp1_set_dyn_expansion +ffffffff82027570 T opp1_program_fmt +ffffffff82027870 T opp1_program_stereo +ffffffff820279a0 T opp1_pipe_clock_control +ffffffff820279e0 T opp1_destroy +ffffffff82027a30 T dcn10_opp_construct +ffffffff82028000 T optc1_program_global_sync +ffffffff82028150 T optc1_setup_vertical_interrupt0 +ffffffff820281e0 T optc1_setup_vertical_interrupt1 +ffffffff82028250 T optc1_setup_vertical_interrupt2 +ffffffff820282c0 T optc1_program_timing +ffffffff82028970 T optc1_is_two_pixels_per_containter +ffffffff820289c0 T optc1_set_vtg_params +ffffffff82028b00 T optc1_set_blank_data_double_buffer +ffffffff82028b40 T optc1_set_timing_double_buffer +ffffffff82028b80 T optc1_set_blank +ffffffff82028c60 T optc1_is_blanked +ffffffff82028ce0 T optc1_enable_optc_clock +ffffffff82028f00 T optc1_disable_crtc +ffffffff82028ff0 T optc1_program_blank_color +ffffffff820290a0 T optc1_validate_timing +ffffffff820291a0 T optc1_get_vblank_counter +ffffffff82029200 T optc1_lock +ffffffff820292f0 T optc1_unlock +ffffffff82029360 T optc1_get_position +ffffffff820293e0 T optc1_is_counter_moving +ffffffff82029460 T optc1_did_triggered_reset_occur +ffffffff82029500 T optc1_disable_reset_trigger +ffffffff820295c0 T optc1_enable_reset_trigger +ffffffff820296d0 T optc1_enable_crtc_reset +ffffffff82029830 T optc1_wait_for_state +ffffffff82029900 T optc1_set_early_control +ffffffff82029930 T optc1_set_static_screen_control +ffffffff820299d0 T optc1_set_drr +ffffffff82029c00 T optc1_set_vtotal_min_max +ffffffff82029ca0 T optc1_get_crtc_scanoutpos +ffffffff82029db0 T optc1_program_stereo +ffffffff82029fb0 T optc1_is_stereo_left_eye +ffffffff8202a020 T optc1_get_hw_timing +ffffffff8202a140 T optc1_read_otg_state +ffffffff8202a450 T optc1_get_otg_active_size +ffffffff8202a560 T optc1_clear_optc_underflow +ffffffff8202a5b0 T optc1_tg_init +ffffffff8202a660 T optc1_is_tg_enabled +ffffffff8202a6d0 T optc1_is_optc_underflow_occurred +ffffffff8202a740 T optc1_configure_crc +ffffffff8202a9d0 T optc1_get_crc +ffffffff8202aae0 T dcn10_timing_generator_init +ffffffff8202ab50 t optc1_enable_crtc +ffffffff8202ac50 t optc1_set_test_pattern +ffffffff8202b330 t optc1_program_manual_trigger +ffffffff8202b3e0 t optc1_setup_manual_trigger +ffffffff8202c000 T dcn10_find_first_free_match_stream_enc_for_link +ffffffff8202c0b0 T dcn10_create_resource_pool +ffffffff8202d260 t dcn10_resource_construct_fp +ffffffff8202d3e0 t dcn10_resource_destruct +ffffffff8202d6f0 t dcn10_destroy_resource_pool +ffffffff8202d750 t dcn10_panel_cntl_create +ffffffff8202d7e0 t dcn10_link_encoder_create +ffffffff8202d8e0 t dcn10_validate_bandwidth +ffffffff8202d960 t dcn10_validate_global +ffffffff8202db40 t dcn10_acquire_idle_pipe_for_layer +ffffffff8202dc80 t dcn10_validate_plane +ffffffff8202dcd0 t dcn10_add_stream_to_ctx +ffffffff8202de90 t dcn10_patch_unknown_plane_state +ffffffff8202def0 t read_dce_straps +ffffffff8202df20 t create_audio +ffffffff8202df50 t dcn10_stream_encoder_create +ffffffff8202dff0 t dcn10_hwseq_create +ffffffff8202e0a0 t dcn10_get_dcc_compression_cap +ffffffff8202f000 T enc1_update_generic_info_packet +ffffffff8202f430 T enc1_stream_encoder_dp_set_stream_attribute +ffffffff8202f900 T enc1_stream_encoder_set_stream_attribute_helper +ffffffff8202f980 T enc1_stream_encoder_hdmi_set_stream_attribute +ffffffff8202ff70 T enc1_stream_encoder_dvi_set_stream_attribute +ffffffff82030100 T enc1_stream_encoder_set_throttled_vcp_size +ffffffff82030320 T enc1_stream_encoder_update_dp_info_packets +ffffffff820304c0 T enc1_stream_encoder_send_immediate_sdp_message +ffffffff820308d0 T enc1_stream_encoder_stop_dp_info_packets +ffffffff82030aa0 T enc1_stream_encoder_dp_blank +ffffffff82030c10 T enc1_stream_encoder_dp_unblank +ffffffff82030e20 T enc1_stream_encoder_set_avmute +ffffffff82030e60 T enc1_reset_hdmi_stream_attribute +ffffffff82030f30 T get_audio_clock_info +ffffffff82031020 T enc1_se_enable_audio_clock +ffffffff82031080 T enc1_se_enable_dp_audio +ffffffff82031150 T enc1_se_audio_mute_control +ffffffff820311a0 T enc1_se_dp_audio_setup +ffffffff820311b0 t enc1_se_audio_setup +ffffffff82031340 T enc1_se_dp_audio_enable +ffffffff82031590 T enc1_se_dp_audio_disable +ffffffff82031700 T enc1_se_hdmi_audio_setup +ffffffff82031bd0 T enc1_se_hdmi_audio_disable +ffffffff82031c60 T enc1_setup_stereo_sync +ffffffff82031ce0 T enc1_dig_connect_to_otg +ffffffff82031d20 T enc1_dig_source_otg +ffffffff82031d90 T enc1_stream_encoder_dp_get_pixel_format +ffffffff82031e80 T dcn10_stream_encoder_construct +ffffffff82031ee0 t enc1_stream_encoder_update_hdmi_info_packets +ffffffff82032290 t enc1_stream_encoder_stop_hdmi_info_packets +ffffffff82033000 T dccg2_update_dpp_dto +ffffffff82033160 T dccg2_get_dccg_ref_freq +ffffffff82033220 T dccg2_set_fifo_errdet_ovr_en +ffffffff82033260 T dccg2_otg_add_pixel +ffffffff82033300 T dccg2_otg_drop_pixel +ffffffff820333a0 T dccg2_init +ffffffff820333d0 T dccg2_create +ffffffff82033480 T dcn_dccg_destroy +ffffffff82034000 T dpp20_read_state +ffffffff820341d0 T dpp2_power_on_obuf +ffffffff820342a0 T dpp2_dummy_program_input_lut +ffffffff820342d0 T dscl2_calc_lb_num_partitions +ffffffff820343f0 T dpp2_cnv_set_alpha_keyer +ffffffff82034670 T dpp2_set_cursor_attributes +ffffffff820347d0 T oppn20_dummy_program_regamma_pwl +ffffffff82034800 T dpp2_construct +ffffffff82034880 t dpp2_cnv_setup +ffffffff82036000 T dpp2_set_degamma_pwl +ffffffff820363b0 T dpp2_set_degamma +ffffffff82036560 T dpp2_cm_set_gamut_remap +ffffffff82036790 T dpp2_program_input_csc +ffffffff820369c0 T dpp20_program_blnd_lut +ffffffff82037110 T dpp20_program_shaper +ffffffff820390a0 T dpp20_program_3dlut +ffffffff820397a0 t dpp20_set3dlut_ram12 +ffffffff82039970 T dpp2_set_hdr_multiplier +ffffffff8203a000 t dsc2_get_enc_caps +ffffffff8203a080 t dsc2_read_state +ffffffff8203a230 t dsc2_validate_stream +ffffffff8203a290 t dsc2_set_config +ffffffff8203b620 t dsc2_get_packed_pps +ffffffff8203b7c0 t dsc2_enable +ffffffff8203b970 t dsc2_disable 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hubp2_is_triplebuffer_enabled +ffffffff82044c10 T hubp2_set_flip_control_surface_gsl +ffffffff82044c60 T hubp2_is_flip_pending +ffffffff82044d70 T hubp2_set_blank +ffffffff82044dd0 T hubp2_set_blank_regs +ffffffff82044ed0 T hubp2_cursor_set_position +ffffffff820452f0 T hubp2_clk_cntl +ffffffff82045340 T hubp2_vtg_sel +ffffffff82045380 T hubp2_clear_underflow +ffffffff820453d0 T hubp2_read_state_common +ffffffff82045fd0 T hubp2_read_state +ffffffff820462a0 T hubp2_construct +ffffffff82046310 t hubp2_setup +ffffffff820467c0 t hubp2_validate_dml_output +ffffffff82048000 T dcn20_set_flip_control_gsl +ffffffff82048050 T dcn20_enable_power_gating_plane +ffffffff82048410 T dcn20_dccg_init +ffffffff82048490 T dcn20_disable_vga +ffffffff82048550 T dcn20_program_triple_buffer +ffffffff820485a0 T dcn20_init_blank +ffffffff82048790 T dcn20_dsc_pg_control +ffffffff82048ba0 T dcn20_dpp_pg_control +ffffffff82048e50 T dcn20_hubp_pg_control +ffffffff82049100 T dcn20_plane_atomic_disable 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opp2_set_disp_pattern_generator +ffffffff82054810 T opp2_dpg_set_blank_color +ffffffff82054990 T opp2_program_dpg_dimensions +ffffffff82054a20 T opp2_dpg_is_blanked +ffffffff82054ae0 T opp2_program_left_edge_extra_pixel +ffffffff82054b30 T dcn20_opp_construct +ffffffff82055000 T optc2_enable_crtc +ffffffff82055100 T optc2_set_gsl +ffffffff820551f0 T optc2_set_gsl_source_select +ffffffff820552b0 T optc2_set_dsc_config +ffffffff82055380 T optc2_get_dsc_status +ffffffff820553c0 T optc2_is_two_pixels_per_containter +ffffffff820553d0 T optc2_set_odm_bypass +ffffffff82055510 T optc2_set_odm_combine +ffffffff82055700 T optc2_get_optc_source +ffffffff820557d0 T optc2_triplebuffer_lock +ffffffff820558f0 T optc2_triplebuffer_unlock +ffffffff820559a0 T optc2_lock_doublebuffer_enable +ffffffff82055b80 T optc2_lock_doublebuffer_disable +ffffffff82055c60 T optc2_setup_manual_trigger +ffffffff82055d80 T optc2_program_manual_trigger +ffffffff82055df0 T optc2_configure_crc +ffffffff82055e80 T optc2_get_last_used_drr_vtotal +ffffffff82055ec0 T dcn20_timing_generator_init +ffffffff82055f30 t optc2_set_dwb_source +ffffffff82055fc0 t optc2_align_vblanks +ffffffff82057000 T dcn20_dpp_destroy +ffffffff82057050 T dcn20_dpp_create +ffffffff82057120 T dcn20_ipp_create +ffffffff820571e0 T dcn20_opp_create +ffffffff820572a0 T dcn20_aux_engine_create +ffffffff82057340 T dcn20_i2c_hw_create +ffffffff820573d0 T dcn20_mpc_create +ffffffff82057460 T dcn20_hubbub_create +ffffffff82057530 T dcn20_timing_generator_create +ffffffff820575d0 T dcn20_link_encoder_create +ffffffff820576d0 T dcn20_stream_encoder_create +ffffffff82057790 T dcn20_hwseq_create +ffffffff82057800 T dcn20_clock_source_destroy +ffffffff82057850 T dcn20_dsc_create +ffffffff82057910 T dcn20_dsc_destroy +ffffffff82057960 T dcn20_hubp_create +ffffffff82057a30 T dcn20_build_mapped_resource +ffffffff82057c50 T dcn20_acquire_dsc +ffffffff82057d90 T dcn20_release_dsc +ffffffff82057e00 T dcn20_add_dsc_to_stream_resource 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read_dce_straps +ffffffff8205bfc0 t dcn20_create_audio +ffffffff8205c000 T enc2_set_dynamic_metadata +ffffffff8205c280 T enc2_stream_encoder_dp_unblank +ffffffff8205c5b0 T enc2_stream_encoder_dp_set_stream_attribute +ffffffff8205c610 T enc2_get_fifo_cal_average_level +ffffffff8205c670 T dcn20_stream_encoder_construct +ffffffff8205c6d0 t enc2_stream_encoder_update_hdmi_info_packets +ffffffff8205c7a0 t enc2_stream_encoder_stop_hdmi_info_packets +ffffffff8205caa0 t enc2_stream_encoder_update_dp_info_packets +ffffffff8205cb50 t enc2_read_state +ffffffff8205ccd0 t enc2_dp_set_dsc_config +ffffffff8205cda0 t enc2_dp_set_dsc_pps_info_packet +ffffffff8205d270 t enc2_dp_set_odm_combine +ffffffff8205d2b0 t enc2_update_hdmi_info_packet +ffffffff8205e000 T dcn20_vmid_setup +ffffffff8205f000 T dccg201_create +ffffffff8205f0b0 t dccg201_update_dpp_dto +ffffffff82060000 T dpp201_construct +ffffffff82060080 t dpp201_get_optimal_number_of_taps +ffffffff82060460 t dpp201_cnv_setup +ffffffff82061000 T hubbub201_construct +ffffffff82061060 t hubbub201_program_watermarks +ffffffff82062000 T dcn201_hubp_construct +ffffffff82062070 t hubp201_setup +ffffffff82062360 t hubp201_program_surface_config +ffffffff82063000 T dcn201_update_plane_addr +ffffffff820632a0 T dcn201_init_blank +ffffffff820633e0 T dcn201_init_hw +ffffffff82063ca0 T dcn201_plane_atomic_disconnect +ffffffff82063e10 T dcn201_update_mpcc +ffffffff820640b0 T dcn201_pipe_control_lock +ffffffff820641b0 T dcn201_set_cursor_attribute +ffffffff82064240 T dcn201_set_dmdata_attributes +ffffffff82064350 T dcn201_unblank_stream +ffffffff82065000 T dcn201_hw_sequencer_construct +ffffffff82066000 T dcn201_link_encoder_construct +ffffffff820661a0 t dcn201_link_encoder_is_in_alt_mode +ffffffff82066210 t dcn201_link_encoder_get_max_link_cap +ffffffff82067000 t mpc201_set_out_rate_control +ffffffff82067130 T dcn201_mpc_construct +ffffffff82068000 T dcn201_opp_construct +ffffffff82069000 T optc201_is_two_pixels_per_containter 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dcn21_set_abm_immediate_disable +ffffffff82072340 T dcn21_set_pipe +ffffffff82072450 T dcn21_set_backlight_level +ffffffff82072620 T dcn21_is_abm_supported +ffffffff82073000 T dcn21_hw_sequencer_construct +ffffffff82074000 T dcn21_link_encoder_enable_dp_output +ffffffff82074140 t dcn21_link_encoder_acquire_phy +ffffffff82074320 T dcn21_link_encoder_construct +ffffffff82074510 t dcn21_link_encoder_enable_dp_mst_output +ffffffff82074580 t dcn21_link_encoder_disable_output +ffffffff82075000 T dcn21_fast_validate_bw +ffffffff82075660 T dcn21_create_resource_pool +ffffffff820769c0 t dcn21_resource_destruct +ffffffff82076e60 t dcn21_destroy_resource_pool +ffffffff82076ec0 t dcn21_panel_cntl_create +ffffffff82076f50 t dcn21_link_encoder_create +ffffffff82077050 t dcn21_validate_bandwidth +ffffffff820770e0 t dcn21_patch_unknown_plane_state +ffffffff82077130 t dcn21_get_panel_config_defaults +ffffffff820771a0 t read_dce_straps +ffffffff820771d0 t dcn21_create_audio +ffffffff82077200 t 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dpp3_program_shaper +ffffffff82083680 t dpp3_program_3dlut +ffffffff82083e50 t dpp3_set3dlut_ram12 +ffffffff82085000 T dpp3_program_cm_dealpha +ffffffff820850a0 T dpp3_program_cm_bias +ffffffff82085190 T dpp3_program_gamcor_lut +ffffffff82085bd0 t dpp3_power_on_gamcor_lut +ffffffff82085d00 T dpp3_set_hdr_multiplier +ffffffff82085d50 T dpp3_cm_set_gamut_remap +ffffffff82086000 T dwb3_config_fc +ffffffff820861b0 T dwb3_set_stereo +ffffffff82086270 T dwb3_enable +ffffffff820863a0 T dwb3_set_denorm +ffffffff820864c0 T dwb3_disable +ffffffff82086570 T dwb3_update +ffffffff820866a0 T dwb3_is_enabled +ffffffff82086740 T dwb3_set_new_content +ffffffff82086780 t dwb3_get_caps +ffffffff82086820 T dcn30_dwbc_construct +ffffffff82086870 T dwb3_set_host_read_rate_control +ffffffff82087000 T dwb3_ogam_set_input_transfer_func +ffffffff820879d0 T dwb3_set_gamut_remap +ffffffff82087b30 t dwb3_program_gamut_remap +ffffffff82087cc0 T dwb3_program_hdr_mult +ffffffff82088000 T hubbub3_init_dchub_sys_ctx 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dcn30_set_writeback +ffffffff8208b730 T dcn30_mmhubbub_warmup +ffffffff8208b9e0 T dcn30_enable_writeback +ffffffff8208bab0 T dcn30_disable_writeback +ffffffff8208bb90 T dcn30_program_all_writeback_pipes_in_tree +ffffffff8208be80 T dcn30_init_hw +ffffffff8208c770 T dcn30_set_avmute +ffffffff8208c7d0 T dcn30_update_info_frame +ffffffff8208c8a0 T dcn30_program_dmdata_engine +ffffffff8208c940 T dcn30_apply_idle_power_optimizations +ffffffff8208cec0 T dcn30_does_plane_fit_in_mall +ffffffff8208cf70 T dcn30_hardware_release +ffffffff8208d080 T dcn30_set_disp_pattern_generator +ffffffff8208d0f0 T dcn30_prepare_bandwidth +ffffffff8208e000 T dcn30_hw_sequencer_construct +ffffffff8208f000 t mmhubbub3_warmup_mcif +ffffffff8208f210 t mmhubbub3_config_mcif_buf +ffffffff8208f6c0 t mmhubbub3_config_mcif_arb +ffffffff8208fb10 T dcn30_mmhubbub_construct +ffffffff82090000 T mpc3_is_dwb_idle +ffffffff82090070 T mpc3_set_dwb_mux +ffffffff820900f0 T mpc3_disable_dwb_mux +ffffffff82090170 T mpc3_set_out_rate_control +ffffffff82090280 T mpc3_get_ogam_current +ffffffff82090320 T mpc3_power_on_ogam_lut +ffffffff820903f0 T mpc3_set_output_gamma +ffffffff82090f90 T mpc3_set_denorm +ffffffff82091000 T mpc3_set_denorm_clamp +ffffffff82091150 T mpc3_program_shaper +ffffffff820933c0 t mpc3_power_on_shaper_3dlut +ffffffff82093740 T mpc3_init_mpcc +ffffffff820937c0 T mpc3_set_gamut_remap +ffffffff82093a10 T mpc3_program_3dlut +ffffffff820941a0 t mpc3_set3dlut_ram12 +ffffffff82094380 T mpc3_set_output_csc +ffffffff820944f0 T mpc3_set_ocsc_default +ffffffff82094660 T mpc3_set_rmu_mux +ffffffff82094700 T mpc3_get_rmu_mux_status +ffffffff820947b0 T mpcc3_acquire_rmu +ffffffff82094910 t mpcc3_release_rmu +ffffffff82094a80 t mpc3_set_mpc_mem_lp_mode +ffffffff82094c10 T dcn30_mpc_construct +ffffffff82095000 T optc3_triplebuffer_lock +ffffffff82095120 T optc3_lock_doublebuffer_enable +ffffffff820953b0 T optc3_lock_doublebuffer_disable +ffffffff820954c0 T optc3_lock +ffffffff82095590 T optc3_set_out_mux +ffffffff820955d0 T optc3_program_blank_color +ffffffff82095710 T optc3_set_drr_trigger_window +ffffffff820957a0 T optc3_set_vtotal_change_limit +ffffffff82095810 T optc3_set_dsc_config +ffffffff82095860 T optc3_set_odm_bypass +ffffffff820959e0 T optc3_wait_drr_doublebuffer_pending_clear +ffffffff82095a60 T optc3_set_vtotal_min_max +ffffffff82095a80 T optc3_tg_init +ffffffff82095ae0 T dcn30_timing_generator_init +ffffffff82095b50 t optc3_set_odm_combine +ffffffff82096000 T dcn30_add_stream_to_ctx +ffffffff82096020 T dcn30_populate_dml_pipes_from_context +ffffffff82096110 T dcn30_populate_dml_writeback_from_context +ffffffff82096170 T dcn30_calc_max_scaled_time +ffffffff820961d0 T dcn30_set_mcif_arb_params +ffffffff82096340 T dcn30_acquire_post_bldn_3dlut +ffffffff820964c0 T dcn30_release_post_bldn_3dlut +ffffffff82096570 T dcn30_internal_validate_bw +ffffffff82097350 t dcn30_split_stream_for_mpc_or_odm +ffffffff82097670 T dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff82097790 T dcn30_setup_mclk_switch_using_fw_based_vblank_stretch +ffffffff82097830 T dcn30_update_soc_for_wm_a +ffffffff82097880 T dcn30_calculate_wm_and_dlg +ffffffff820978f0 T dcn30_validate_bandwidth +ffffffff82097d20 T dcn30_update_bw_bounding_box +ffffffff82098500 T dcn30_create_resource_pool +ffffffff82099ac0 t dcn30_resource_destruct +ffffffff8209a030 t dcn30_destroy_resource_pool +ffffffff8209a090 t dcn30_panel_cntl_create +ffffffff8209a120 t dcn30_link_encoder_create +ffffffff8209a1e0 t read_dce_straps +ffffffff8209a210 t dcn30_create_audio +ffffffff8209a240 t dcn30_stream_encoder_create +ffffffff8209a3c0 t dcn30_hwseq_create +ffffffff8209b000 T vpg3_update_generic_info_packet +ffffffff8209b9a0 T vpg3_construct +ffffffff8209c000 T dccg301_create +ffffffff8209d000 T dcn301_link_encoder_construct +ffffffff8209e000 T hubbub301_construct +ffffffff8209f000 T dcn301_hw_sequencer_construct +ffffffff820a0000 T dcn301_panel_cntl_construct +ffffffff820a0050 t dcn301_panel_cntl_destroy +ffffffff820a00a0 t dcn301_panel_cntl_hw_init +ffffffff820a02b0 t dcn301_is_panel_backlight_on +ffffffff820a0310 t dcn301_is_panel_powered_on +ffffffff820a03c0 t dcn301_store_backlight_level +ffffffff820a0460 t dcn301_get_16_bit_backlight_from_pwm +ffffffff820a1000 T dcn301_create_resource_pool +ffffffff820a25a0 t dcn301_destruct +ffffffff820a2ae0 t dcn301_destroy_resource_pool +ffffffff820a2b40 t dcn301_panel_cntl_create +ffffffff820a2bd0 t dcn301_link_encoder_create +ffffffff820a2c90 t dcn301_calculate_wm_and_dlg +ffffffff820a2d00 t read_dce_straps +ffffffff820a2d30 t dcn301_create_audio +ffffffff820a2d60 t dcn301_stream_encoder_create +ffffffff820a2ee0 t dcn301_hwseq_create +ffffffff820a3000 T dcn302_dpp_pg_control +ffffffff820a32a0 T dcn302_hubp_pg_control +ffffffff820a3550 T dcn302_dsc_pg_control +ffffffff820a4000 T dcn302_hw_sequencer_construct +ffffffff820a5000 T dcn302_update_bw_bounding_box +ffffffff820a5050 T dcn302_create_resource_pool +ffffffff820a63e0 t dcn302_resource_destruct +ffffffff820a68f0 t dcn302_destroy_resource_pool +ffffffff820a6940 t dcn302_panel_cntl_create +ffffffff820a69d0 t dcn302_link_encoder_create +ffffffff820a6a90 t read_dce_straps +ffffffff820a6ac0 t dcn302_create_audio +ffffffff820a6af0 t dcn302_stream_encoder_create +ffffffff820a6c70 t dcn302_hwseq_create +ffffffff820a7000 T dcn303_dpp_pg_control +ffffffff820a7030 T dcn303_hubp_pg_control +ffffffff820a7060 T dcn303_dsc_pg_control +ffffffff820a7090 T dcn303_enable_power_gating_plane +ffffffff820a8000 T dcn303_hw_sequencer_construct +ffffffff820a9000 T dcn303_update_bw_bounding_box +ffffffff820a9050 T dcn303_create_resource_pool +ffffffff820aa290 t dcn303_resource_destruct +ffffffff820aa7b0 t dcn303_destroy_resource_pool +ffffffff820aa800 t dcn303_panel_cntl_create +ffffffff820aa890 t dcn303_link_encoder_create +ffffffff820aa950 t read_dce_straps +ffffffff820aa980 t dcn303_create_audio +ffffffff820aa9b0 t dcn303_stream_encoder_create +ffffffff820aab30 t dcn303_hwseq_create +ffffffff820ab000 T afmt31_powerdown +ffffffff820ab090 T afmt31_poweron +ffffffff820ab120 T afmt31_construct +ffffffff820ac000 T apg31_construct +ffffffff820ac050 t apg31_se_audio_setup +ffffffff820ac160 t apg31_audio_mute_control +ffffffff820ac1a0 t apg31_enable +ffffffff820ac2b0 t apg31_disable +ffffffff820ad000 T dccg31_update_dpp_dto +ffffffff820ad1c0 T dccg31_set_dpstreamclk +ffffffff820ad350 t dccg31_disable_dpstreamclk +ffffffff820ad4a0 T dccg31_enable_symclk32_se +ffffffff820ad790 T dccg31_disable_symclk32_se +ffffffff820ada60 T dccg31_enable_symclk32_le +ffffffff820adc30 T dccg31_disable_symclk32_le +ffffffff820addd0 T dccg31_disable_dscclk +ffffffff820adf90 T dccg31_enable_dscclk +ffffffff820ae160 T dccg31_set_physymclk +ffffffff820ae680 T dccg31_set_dtbclk_dto +ffffffff820ae930 T dccg31_set_audio_dtbclk_dto +ffffffff820aea40 T dccg31_get_dccg_ref_freq +ffffffff820aea70 T dccg31_set_dispclk_change_mode +ffffffff820aeac0 T dccg31_init +ffffffff820af020 T dccg31_otg_add_pixel +ffffffff820af060 T dccg31_otg_drop_pixel +ffffffff820af0a0 T dccg31_create +ffffffff820b0000 T dcn31_link_encoder_set_dio_phy_mux +ffffffff820b0390 T dcn31_link_encoder_construct +ffffffff820b0590 T dcn31_link_encoder_construct_minimal +ffffffff820b0610 T dcn31_link_encoder_enable_dp_output +ffffffff820b0850 T dcn31_link_encoder_enable_dp_mst_output +ffffffff820b0a90 T dcn31_link_encoder_disable_output +ffffffff820b0d20 T dcn31_link_encoder_is_in_alt_mode +ffffffff820b0e60 T dcn31_link_encoder_get_max_link_cap +ffffffff820b0fd0 t enc31_hw_init +ffffffff820b2000 T dcn31_hpo_dp_link_enc_enable +ffffffff820b2160 T dcn31_hpo_dp_link_enc_disable +ffffffff820b21d0 T dcn31_hpo_dp_link_enc_set_link_test_pattern +ffffffff820b2b00 T dcn31_hpo_dp_link_enc_update_stream_allocation_table +ffffffff820b2d90 T dcn31_hpo_dp_link_enc_set_throttled_vcp_size +ffffffff820b3030 T dcn31_hpo_dp_link_enc_read_state +ffffffff820b32e0 T dcn31_hpo_dp_link_enc_enable_dp_output +ffffffff820b33e0 T dcn31_hpo_dp_link_enc_disable_output +ffffffff820b3520 T dcn31_hpo_dp_link_enc_set_ffe +ffffffff820b3610 T hpo_dp_link_encoder31_construct +ffffffff820b3670 t dcn31_hpo_dp_link_enc_is_in_alt_mode +ffffffff820b4000 T dcn31_hpo_dp_stream_encoder_construct +ffffffff820b4070 t dcn31_hpo_dp_stream_enc_enable_stream +ffffffff820b41b0 t dcn31_hpo_dp_stream_enc_dp_unblank +ffffffff820b4460 t dcn31_hpo_dp_stream_enc_dp_blank +ffffffff820b4560 t dcn31_hpo_dp_stream_enc_disable +ffffffff820b45d0 t dcn31_hpo_dp_stream_enc_set_stream_attribute +ffffffff820b4e80 t dcn31_hpo_dp_stream_enc_update_dp_info_packets +ffffffff820b5040 t dcn31_hpo_dp_stream_enc_stop_dp_info_packets +ffffffff820b51d0 t dcn31_hpo_dp_stream_enc_set_dsc_pps_info_packet +ffffffff820b5470 t dcn31_hpo_dp_stream_enc_map_stream_to_link +ffffffff820b5570 t dcn31_hpo_dp_stream_enc_mute_control +ffffffff820b55e0 t dcn31_hpo_dp_stream_enc_audio_setup +ffffffff820b5690 t dcn31_hpo_dp_stream_enc_audio_enable +ffffffff820b5760 t dcn31_hpo_dp_stream_enc_audio_disable +ffffffff820b5910 t dcn31_hpo_dp_stream_enc_read_state +ffffffff820b5aa0 t dcn31_set_hblank_min_symbol_width +ffffffff820b6000 T hubbub31_init_dchub_sys_ctx +ffffffff820b61f0 T hubbub31_construct +ffffffff820b6290 t hubbub31_get_dcc_compression_cap +ffffffff820b6480 t hubbub31_get_dchub_ref_freq +ffffffff820b6560 t hubbub31_program_watermarks +ffffffff820b7e20 t hubbub31_verify_allow_pstate_change_high +ffffffff820b7fe0 t dcn31_program_det_size +ffffffff820b81a0 t dcn31_program_compbuf_size +ffffffff820b8420 t dcn31_init_crb +ffffffff820b9000 T hubp31_set_unbounded_requesting +ffffffff820b9090 T hubp31_soft_reset +ffffffff820b90e0 T hubp31_construct +ffffffff820b9150 t hubp31_program_extended_blank +ffffffff820ba000 T dcn31_init_hw +ffffffff820ba960 T dcn31_dsc_pg_control +ffffffff820bacb0 T dcn31_enable_power_gating_plane +ffffffff820baf10 T dcn31_update_info_frame +ffffffff820bafe0 T dcn31_z10_save_init +ffffffff820bb0a0 T dcn31_z10_restore +ffffffff820bb180 T dcn31_hubp_pg_control +ffffffff820bb4a0 T dcn31_init_sys_ctx +ffffffff820bb550 T dcn31_reset_hw_ctx_wrap +ffffffff820bb8c0 T dcn31_setup_hpo_hw_control +ffffffff820bc000 T dcn31_hw_sequencer_construct +ffffffff820bd000 T optc31_immediate_disable_crtc +ffffffff820bd100 T optc31_set_drr +ffffffff820bd320 T optc3_init_odm +ffffffff820bd490 T dcn31_timing_generator_init +ffffffff820bd500 t optc31_enable_crtc +ffffffff820bd600 t optc31_disable_crtc +ffffffff820bd6e0 t optc31_set_odm_combine +ffffffff820be000 T dcn31_panel_cntl_construct +ffffffff820be040 t dcn31_panel_cntl_destroy +ffffffff820be090 t dcn31_panel_cntl_hw_init +ffffffff820be180 t dcn31_is_panel_backlight_on +ffffffff820be220 t dcn31_is_panel_powered_on +ffffffff820be2d0 t dcn31_store_backlight_level +ffffffff820be390 t dcn31_get_16_bit_backlight_from_pwm +ffffffff820bf000 T dcn31_populate_dml_pipes_from_context +ffffffff820bf350 T dcn31_calculate_wm_and_dlg +ffffffff820bf3d0 T dcn31_populate_dml_writeback_from_context +ffffffff820bf430 T dcn31_set_mcif_arb_params +ffffffff820bf490 T dcn31_validate_bandwidth +ffffffff820bf870 T dcn31_create_resource_pool +ffffffff820c0c10 t dcn31_resource_destruct +ffffffff820c1270 t dcn31_destroy_resource_pool +ffffffff820c12d0 t dcn31_panel_cntl_create +ffffffff820c1340 t dcn31_link_encoder_create +ffffffff820c1400 t dcn31_link_enc_create_minimal +ffffffff820c14a0 t dcn31_get_panel_config_defaults +ffffffff820c1510 t read_dce_straps +ffffffff820c1540 t dcn31_create_audio +ffffffff820c1570 t dcn31_stream_encoder_create +ffffffff820c16f0 t dcn31_hpo_dp_stream_encoder_create +ffffffff820c18b0 t dcn31_hpo_dp_link_encoder_create +ffffffff820c1940 t dcn31_hwseq_create +ffffffff820c2000 T vpg31_powerdown +ffffffff820c2090 T vpg31_poweron +ffffffff820c2120 T vpg31_construct +ffffffff820c3000 T dccg314_create +ffffffff820c30b0 t dccg314_set_dpstreamclk +ffffffff820c3480 t dccg314_set_dtbclk_dto +ffffffff820c3670 t dccg314_set_pixel_rate_div +ffffffff820c39e0 t dccg314_set_valid_pixel_rate +ffffffff820c4000 T dcn314_dio_stream_encoder_construct +ffffffff820c4070 t enc314_stream_encoder_hdmi_set_stream_attribute +ffffffff820c4660 t enc314_stream_encoder_dvi_set_stream_attribute +ffffffff820c4870 t enc314_stream_encoder_dp_blank +ffffffff820c48c0 t enc314_stream_encoder_dp_unblank +ffffffff820c4c00 t enc314_read_state +ffffffff820c4d60 t enc314_dp_set_dsc_config +ffffffff820c4db0 t enc314_dp_set_odm_combine +ffffffff820c4df0 t enc314_set_dig_input_mode +ffffffff820c4e40 t enc314_enable_fifo +ffffffff820c4ee0 t enc314_disable_fifo +ffffffff820c4f30 t enc314_reset_fifo +ffffffff820c6000 T dcn314_update_odm +ffffffff820c6610 T dcn314_dsc_pg_control +ffffffff820c69e0 T dcn314_enable_power_gating_plane +ffffffff820c6c70 T dcn314_calculate_dccg_k1_k2_values +ffffffff820c6e00 T dcn314_set_pixels_per_cycle +ffffffff820c6ef0 T dcn314_hubp_pg_control +ffffffff820c8000 T dcn314_hw_sequencer_construct +ffffffff820c9000 T dcn314_timing_generator_init +ffffffff820c9070 t optc314_enable_crtc +ffffffff820c9170 t optc314_disable_crtc +ffffffff820c9250 t optc314_phantom_crtc_post_enable +ffffffff820c9310 t optc314_set_odm_bypass +ffffffff820c9480 t optc314_set_odm_combine +ffffffff820c9780 t optc314_set_h_timing_div_manual_mode +ffffffff820ca000 T dcn314_create_resource_pool +ffffffff820cb2d0 t dcn314_resource_destruct +ffffffff820cb930 t dcn314_destroy_resource_pool +ffffffff820cb990 t dcn31_panel_cntl_create +ffffffff820cba00 t dcn31_link_encoder_create +ffffffff820cbac0 t dcn31_link_enc_create_minimal +ffffffff820cbb60 t dcn314_populate_dml_pipes_from_context +ffffffff820cbbf0 t dcn314_update_bw_bounding_box +ffffffff820cbc40 t dcn314_get_panel_config_defaults +ffffffff820cbcb0 t read_dce_straps +ffffffff820cbce0 t dcn31_create_audio +ffffffff820cbd10 t dcn314_stream_encoder_create +ffffffff820cbe90 t dcn31_hpo_dp_stream_encoder_create +ffffffff820cc050 t dcn31_hpo_dp_link_encoder_create +ffffffff820cc0e0 t dcn314_hwseq_create +ffffffff820cd000 T dcn315_create_resource_pool +ffffffff820ce270 t dcn315_resource_destruct +ffffffff820ce8d0 t dcn315_destroy_resource_pool +ffffffff820ce930 t dcn31_panel_cntl_create +ffffffff820ce9a0 t dcn31_link_encoder_create +ffffffff820cea60 t dcn31_link_enc_create_minimal +ffffffff820ceb00 t dcn315_populate_dml_pipes_from_context +ffffffff820cee50 t dcn315_get_panel_config_defaults +ffffffff820ceec0 t read_dce_straps +ffffffff820ceef0 t dcn31_create_audio +ffffffff820cef20 t dcn315_stream_encoder_create +ffffffff820cf0a0 t dcn31_hpo_dp_stream_encoder_create +ffffffff820cf260 t dcn31_hpo_dp_link_encoder_create +ffffffff820cf2f0 t dcn31_hwseq_create +ffffffff820d0000 T dcn316_create_resource_pool +ffffffff820d12b0 t dcn316_resource_destruct +ffffffff820d1910 t dcn316_destroy_resource_pool +ffffffff820d1970 t dcn31_panel_cntl_create +ffffffff820d19e0 t dcn31_link_encoder_create +ffffffff820d1aa0 t dcn31_link_enc_create_minimal +ffffffff820d1b40 t dcn316_populate_dml_pipes_from_context +ffffffff820d1e70 t dcn316_get_panel_config_defaults +ffffffff820d1ee0 t read_dce_straps +ffffffff820d1f10 t dcn31_create_audio +ffffffff820d1f40 t dcn316_stream_encoder_create +ffffffff820d20c0 t dcn31_hpo_dp_stream_encoder_create +ffffffff820d2280 t dcn31_hpo_dp_link_encoder_create +ffffffff820d2310 t dcn31_hwseq_create +ffffffff820d3000 T dccg32_create +ffffffff820d30b0 t dccg32_get_dccg_ref_freq +ffffffff820d30e0 t dccg32_otg_add_pixel +ffffffff820d3120 t dccg32_otg_drop_pixel +ffffffff820d3160 t dccg32_set_dpstreamclk +ffffffff820d3530 t dccg32_set_dtbclk_dto +ffffffff820d3730 t dccg32_set_pixel_rate_div +ffffffff820d3aa0 t dccg32_set_valid_pixel_rate +ffffffff820d4000 T enc32_hw_init +ffffffff820d4090 T dcn32_link_encoder_enable_dp_output +ffffffff820d40e0 T dcn32_link_encoder_construct +ffffffff820d42c0 t dcn32_link_encoder_is_in_alt_mode +ffffffff820d4340 t dcn32_link_encoder_get_max_link_cap +ffffffff820d5000 T dcn32_dio_stream_encoder_construct +ffffffff820d5070 t enc32_stream_encoder_hdmi_set_stream_attribute +ffffffff820d55a0 t enc32_stream_encoder_dvi_set_stream_attribute +ffffffff820d5720 t enc32_stream_encoder_dp_unblank +ffffffff820d5be0 t enc32_read_state +ffffffff820d5d40 t enc32_dp_set_dsc_config +ffffffff820d5d90 t enc32_dp_set_odm_combine +ffffffff820d5dd0 t enc32_set_dig_input_mode +ffffffff820d6000 T dpp32_construct +ffffffff820d6060 t dscl32_calc_lb_num_partitions +ffffffff820d7000 T hpo_dp_link_encoder32_construct +ffffffff820d7060 t dcn32_hpo_dp_link_enc_is_in_alt_mode +ffffffff820d8000 T dcn32_program_det_size +ffffffff820d81a0 T hubbub32_program_urgent_watermarks +ffffffff820d8910 T hubbub32_program_stutter_watermarks +ffffffff820d8d60 T hubbub32_program_pstate_watermarks +ffffffff820d91f0 T hubbub32_program_usr_watermarks +ffffffff820d9440 T hubbub32_force_usr_retraining_allow +ffffffff820d94c0 T hubbub32_force_wm_propagate_to_pipes +ffffffff820d9560 T hubbub32_construct +ffffffff820d95e0 t hubbub32_wm_read_state +ffffffff820d9a60 t hubbub32_program_watermarks +ffffffff820d9b70 t hubbub32_init_watermarks +ffffffff820d9fb0 t dcn32_program_compbuf_size +ffffffff820da230 t dcn32_init_crb +ffffffff820db000 T hubp32_update_force_pstate_disallow +ffffffff820db090 T hubp32_update_mall_sel +ffffffff820db120 T hubp32_prepare_subvp_buffering +ffffffff820db1c0 T hubp32_phantom_hubp_post_enable +ffffffff820db2d0 T hubp32_cursor_set_attributes +ffffffff820db590 T hubp32_construct +ffffffff820dc000 T dcn32_dsc_pg_control +ffffffff820dc310 T dcn32_enable_power_gating_plane +ffffffff820dc4b0 T dcn32_hubp_pg_control +ffffffff820dc720 T dcn32_apply_idle_power_optimizations +ffffffff820dc990 t dcn32_calculate_cab_allocation +ffffffff820dcd40 T dcn32_commit_subvp_config +ffffffff820dcdf0 T dcn32_subvp_pipe_control_lock +ffffffff820dcfc0 T dcn32_set_mcm_luts +ffffffff820dd150 T dcn32_set_input_transfer_func +ffffffff820dd290 T dcn32_set_output_transfer_func +ffffffff820dd4a0 T dcn32_subvp_update_force_pstate +ffffffff820dd610 T dcn32_update_mall_sel +ffffffff820dd790 T dcn32_program_mall_pipe_config +ffffffff820dd870 T dcn32_init_hw +ffffffff820de060 T dcn32_update_odm +ffffffff820de670 T dcn32_calculate_dccg_k1_k2_values +ffffffff820de870 T dcn32_is_dp_dig_pixel_rate_div_policy +ffffffff820de900 T dcn32_set_pixels_per_cycle +ffffffff820dea40 T dcn32_unblank_stream +ffffffff820dec10 T dcn32_disable_link_output +ffffffff820deea0 T dcn32_update_phantom_vp_position +ffffffff820defc0 T dcn32_dsc_pg_status +ffffffff820df0a0 T dcn32_update_dsc_pg +ffffffff820e0000 T dcn32_hw_sequencer_init_functions +ffffffff820e1000 t mmhubbub32_warmup_mcif +ffffffff820e1210 t mmhubbub32_config_mcif_buf +ffffffff820e16c0 t mmhubbub32_config_mcif_arb +ffffffff820e1ad0 T dcn32_mmhubbub_construct +ffffffff820e2000 t mpc32_mpc_init +ffffffff820e2220 t mpc32_program_post1dlut +ffffffff820e2d00 t mpc32_program_shaper +ffffffff820e4fb0 t mpc32_program_3dlut +ffffffff820e58a0 T dcn32_mpc_construct +ffffffff820e5960 t mpc32_power_on_shaper_3dlut +ffffffff820e5b90 t mpc32_set3dlut_ram12 +ffffffff820e6000 T dcn32_timing_generator_init +ffffffff820e6070 t optc32_enable_crtc +ffffffff820e6170 t optc32_disable_crtc +ffffffff820e6250 t optc32_phantom_crtc_post_enable +ffffffff820e6310 t optc32_set_drr +ffffffff820e6560 t optc32_set_odm_bypass +ffffffff820e66d0 t optc32_set_odm_combine +ffffffff820e69d0 t optc32_set_h_timing_div_manual_mode +ffffffff820e7000 T dcn32_panel_cntl_create +ffffffff820e7070 T dcn32_acquire_post_bldn_3dlut +ffffffff820e7160 T dcn32_release_post_bldn_3dlut +ffffffff820e7210 T dcn32_remove_phantom_pipes +ffffffff820e7380 T dcn32_add_phantom_pipes +ffffffff820e77c0 T dcn32_validate_bandwidth +ffffffff820e7c80 T dcn32_populate_dml_pipes_from_context +ffffffff820e8040 T dcn32_calculate_wm_and_dlg +ffffffff820e80b0 T dcn32_create_resource_pool +ffffffff820e8160 t dcn32_resource_construct +ffffffff820f45d0 T dcn32_acquire_idle_pipe_for_head_pipe_in_layer +ffffffff820f4810 T dcn32_calc_num_avail_chans_for_mall +ffffffff820f4880 t dcn32_mpc_create +ffffffff820f9240 t dcn32_resource_destruct +ffffffff820f98b0 t dcn32_destroy_resource_pool +ffffffff820f9910 t dcn32_link_encoder_create +ffffffff820fa870 t dcn32_update_bw_bounding_box +ffffffff820fa8c0 t read_dce_straps +ffffffff820fa8f0 t dcn32_create_audio +ffffffff820fac30 t dcn32_stream_encoder_create +ffffffff820fcab0 t dcn32_hpo_dp_stream_encoder_create +ffffffff820fd790 t dcn32_hpo_dp_link_encoder_create +ffffffff820fdc10 t dcn32_hwseq_create +ffffffff820fe0b0 t dcn32_vpg_create +ffffffff820ff000 T dcn32_helper_calculate_num_ways_for_subvp +ffffffff820ff1e0 T dcn32_merge_pipes_for_subvp +ffffffff820ff3b0 T dcn32_all_pipes_have_stream_and_plane +ffffffff820ff440 T dcn32_subvp_in_use +ffffffff820ff4d0 T dcn32_mpo_in_use +ffffffff820ff540 T dcn32_any_surfaces_rotated +ffffffff820ff5d0 T dcn32_determine_det_override +ffffffff820ff910 T dcn32_set_det_allocations +ffffffff820ffa90 T dcn32_save_mall_state +ffffffff820ffb40 T dcn32_restore_mall_state +ffffffff82100000 T dcn321_link_encoder_construct +ffffffff82101000 T dcn321_create_resource_pool +ffffffff821010b0 t dcn321_resource_construct +ffffffff8210d4c0 t dcn321_mpc_create +ffffffff82111e80 t dcn321_resource_destruct +ffffffff821124f0 t dcn321_destroy_resource_pool +ffffffff82112550 t dcn321_link_encoder_create +ffffffff821134b0 t dcn321_update_bw_bounding_box +ffffffff82113500 t read_dce_straps +ffffffff82113530 t dcn321_create_audio +ffffffff82113870 t dcn321_stream_encoder_create +ffffffff821156f0 t dcn321_hpo_dp_stream_encoder_create +ffffffff821163d0 t dcn321_hpo_dp_link_encoder_create +ffffffff82116850 t dcn321_hwseq_create +ffffffff82116cf0 t dcn321_vpg_create +ffffffff82118000 T bw_int_to_fixed_nonconst +ffffffff82118090 T bw_frc_to_fixed +ffffffff82118260 T bw_floor2 +ffffffff82118310 T bw_ceil2 +ffffffff82118390 T bw_mul +ffffffff82119000 T convert_to_custom_float_format +ffffffff8211a000 T bw_calcs_init +ffffffff8211ae30 T bw_calcs +ffffffff8211c760 t calculate_bandwidth +ffffffff82124000 T scaler_settings_calculation +ffffffff82124380 T mode_support_and_system_configuration +ffffffff8212a160 T display_pipe_configuration +ffffffff8212a9a0 T dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation +ffffffff82130000 T dcn_bw_mod +ffffffff82130060 T dcn_bw_min2 +ffffffff821300a0 T dcn_bw_max +ffffffff821300d0 T dcn_bw_max2 +ffffffff82130110 T dcn_bw_floor2 +ffffffff821301b0 T dcn_bw_floor +ffffffff821301e0 T dcn_bw_ceil +ffffffff82130220 T dcn_bw_ceil2 +ffffffff821302d0 T dcn_bw_max3 +ffffffff82130370 T dcn_bw_max5 +ffffffff821304e0 T dcn_bw_pow +ffffffff82130570 T dcn_bw_fabs +ffffffff821305d0 T dcn_bw_log +ffffffff82131000 T swizzle_mode_to_macro_tile_size +ffffffff82131090 T dcn_validate_bandwidth +ffffffff82133330 T dcn_bw_sync_calcs_and_dml +ffffffff82133580 t dcn_bw_calc_rq_dlg_ttu +ffffffff82133f00 T dcn_find_dcfclk_suits_all +ffffffff82134360 T dcn_bw_update_from_pplib_fclks +ffffffff821344f0 T dcn_bw_update_from_pplib_dcfclks +ffffffff821345c0 T dcn_get_soc_clks +ffffffff82134640 T dcn_bw_notify_pplib_of_wm_ranges +ffffffff82135000 T dcn20_populate_dml_writeback_from_context +ffffffff82135180 T dcn20_fpu_set_wb_arb_params +ffffffff82135330 T dcn20_calculate_dlg_params +ffffffff82135b10 T dcn20_populate_dml_pipes_from_context +ffffffff82136a10 T dcn20_calculate_wm +ffffffff821371b0 T dcn20_update_bounding_box +ffffffff82137430 T dcn20_cap_soc_clocks +ffffffff821377b0 T dcn20_patch_bounding_box +ffffffff82137920 T dcn20_validate_bandwidth_fp +ffffffff82137ab0 t dcn20_validate_bandwidth_internal +ffffffff82137e90 T dcn20_fpu_set_wm_ranges +ffffffff82137f30 T dcn20_fpu_adjust_dppclk +ffffffff82137fd0 T dcn21_populate_dml_pipes_from_context +ffffffff821380d0 T dcn21_validate_bandwidth_fp +ffffffff82138b50 T dcn21_update_bw_bounding_box +ffffffff82139040 T dcn21_clk_mgr_set_bw_params_wm_table +ffffffff821390a0 T dcn201_populate_dml_writeback_from_context_fpu +ffffffff821393b0 t calculate_wm_set_for_vlevel +ffffffff8213a000 T dml20_recalculate +ffffffff8213a740 t dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff8213fda0 T dml20_ModeSupportAndSystemConfigurationFull +ffffffff82146d30 t TruncToValidBPP +ffffffff82146f10 t CalculateVMAndRowBytes +ffffffff821475a0 t CalculatePrefetchSourceLines +ffffffff82147760 t CalculateWriteBackDelay +ffffffff82147a30 t CalculatePrefetchSchedule +ffffffff821488f0 t CalculateFlipSchedule +ffffffff82148ca0 t adjust_ReturnBW +ffffffff82149000 T dml20v2_recalculate +ffffffff82149740 t dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff8214ee50 T dml20v2_ModeSupportAndSystemConfigurationFull +ffffffff82155cd0 t TruncToValidBPP +ffffffff82156260 t CalculateVMAndRowBytes +ffffffff821568f0 t CalculatePrefetchSourceLines +ffffffff82156ab0 t CalculateWriteBackDelay +ffffffff82156d80 t CalculateDelayAfterScaler +ffffffff821570d0 t CalculatePrefetchSchedule +ffffffff82157e40 t CalculateFlipSchedule +ffffffff821581f0 t adjust_ReturnBW +ffffffff82159000 T dml20_rq_dlg_get_rq_reg +ffffffff82159490 t dml20_rq_dlg_get_rq_params +ffffffff82159660 T dml20_rq_dlg_get_dlg_reg +ffffffff8215b5b0 t get_surf_rq_param +ffffffff8215be30 t calculate_ttu_cursor +ffffffff8215d000 T dml20v2_rq_dlg_get_rq_reg +ffffffff8215d490 t dml20v2_rq_dlg_get_rq_params +ffffffff8215d660 T dml20v2_rq_dlg_get_dlg_reg +ffffffff8215f5b0 t get_surf_rq_param +ffffffff8215fe30 t calculate_ttu_cursor +ffffffff82161000 T dml21_recalculate +ffffffff82161700 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff821670b0 T dml21_ModeSupportAndSystemConfigurationFull +ffffffff8216d190 t TruncToValidBPP +ffffffff8216d720 t CalculateDCFCLKDeepSleep +ffffffff8216da60 t CalculateVMAndRowBytes +ffffffff8216e2d0 t CalculatePrefetchSourceLines +ffffffff8216e490 t CalculateWriteBackDelay +ffffffff8216e760 t CalculatePrefetchSchedulePerPlane +ffffffff8216ef70 t CalculateUrgentBurstFactor +ffffffff8216f380 t CalculateFlipSchedule +ffffffff8216f870 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff821708d0 t CalculatePrefetchSchedule +ffffffff82172000 T dml21_rq_dlg_get_rq_reg +ffffffff82172490 t dml_rq_dlg_get_rq_params +ffffffff82172660 T dml21_rq_dlg_get_dlg_reg +ffffffff821749c0 t get_surf_rq_param +ffffffff82175300 t calculate_ttu_cursor +ffffffff82176000 T optc3_fpu_set_vrr_m_const +ffffffff821764a0 T dcn30_fpu_populate_dml_writeback_from_context +ffffffff821767f0 T dcn30_fpu_set_mcif_arb_params +ffffffff82176960 T dcn30_fpu_update_soc_for_wm_a +ffffffff82176a10 T dcn30_fpu_calculate_wm_and_dlg +ffffffff821772f0 T dcn30_fpu_update_dram_channel_width_bytes +ffffffff82177350 T dcn30_fpu_update_max_clk +ffffffff82177400 T dcn30_fpu_get_optimal_dcfclk_fclk_for_uclk +ffffffff82177500 T dcn30_fpu_update_bw_bounding_box +ffffffff821776e0 T dcn30_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff821778a0 T dcn3_fpu_build_wm_range_table +ffffffff82177b80 T patch_dcn30_soc_bounding_box +ffffffff82178000 T dml30_recalculate +ffffffff82178600 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff8217ec50 T dml30_CalculateBytePerPixelAnd256BBlockSizes +ffffffff8217eec0 T dml30_CalculateWriteBackDISPCLK +ffffffff8217f040 T dml30_ModeSupportAndSystemConfigurationFull +ffffffff82186440 t CalculateSwathAndDETConfiguration +ffffffff82186ab0 t TruncToValidBPP +ffffffff82186d30 t dscceComputeDelay +ffffffff82186e70 t CalculateVMAndRowBytes +ffffffff82187520 t CalculatePrefetchSourceLines +ffffffff821876e0 t CalculateUrgentBurstFactor +ffffffff82187970 t CalculateDCFCLKDeepSleep +ffffffff82187c90 t UseMinimumDCFCLK +ffffffff82188e90 t CalculatePrefetchSchedule +ffffffff8218a3f0 t CalculateFlipSchedule +ffffffff8218a8e0 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff8218b700 t CalculateSwathWidth +ffffffff8218c000 T dml30_rq_dlg_get_rq_reg +ffffffff8218c4b0 t dml_rq_dlg_get_rq_params +ffffffff8218c720 T dml30_rq_dlg_get_dlg_reg +ffffffff8218eed0 t get_surf_rq_param +ffffffff8218f870 t calculate_ttu_cursor +ffffffff82190000 T dcn301_update_bw_bounding_box +ffffffff82190320 T dcn301_fpu_set_wm_ranges +ffffffff821903c0 T dcn301_fpu_init_soc_bounding_box +ffffffff82190460 T dcn301_calculate_wm_and_dlg_fp +ffffffff82190790 t calculate_wm_set_for_vlevel +ffffffff82191000 T dcn302_fpu_update_bw_bounding_box +ffffffff82191ac0 T dcn302_fpu_init_soc_bounding_box +ffffffff82192000 T dcn303_fpu_update_bw_bounding_box +ffffffff82192b00 T dcn303_fpu_init_soc_bounding_box +ffffffff82193000 T dcn31_zero_pipe_dcc_fraction +ffffffff82193060 T dcn31_update_soc_for_wm_a +ffffffff82193110 T dcn315_update_soc_for_wm_a +ffffffff821931e0 T dcn31_calculate_wm_and_dlg_fp +ffffffff821936e0 T dcn31_update_bw_bounding_box +ffffffff82193ad0 T dcn315_update_bw_bounding_box +ffffffff82193dc0 T dcn316_update_bw_bounding_box +ffffffff82195000 T dml31_recalculate +ffffffff821952a0 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff8219c060 T dml31_CalculateWriteBackDISPCLK +ffffffff8219c1e0 T dml31_ModeSupportAndSystemConfigurationFull +ffffffff821a44a0 t CalculateSwathAndDETConfiguration +ffffffff821a4aa0 t TruncToValidBPP +ffffffff821a4d20 t dscceComputeDelay +ffffffff821a4e60 t CalculateDCFCLKDeepSleep +ffffffff821a51a0 t CalculateVMAndRowBytes +ffffffff821a57f0 t CalculatePrefetchSourceLines +ffffffff821a59b0 t CalculateUrgentBurstFactor +ffffffff821a5c40 t CalculatePrefetchSchedulePerPlane +ffffffff821a6370 t CalculateFlipSchedule +ffffffff821a68f0 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff821a7550 t CalculateSwathWidth +ffffffff821a7a60 t CalculatePrefetchSchedule +ffffffff821a8ef0 t CalculateVupdateAndDynamicMetadataParameters +ffffffff821aa000 T dml31_rq_dlg_get_rq_reg +ffffffff821aa4b0 t dml_rq_dlg_get_rq_params +ffffffff821aa720 T dml31_rq_dlg_get_dlg_reg +ffffffff821ad1f0 t get_surf_rq_param +ffffffff821ae000 T dcn314_update_bw_bounding_box_fpu +ffffffff821ae480 T dcn314_populate_dml_pipes_from_context_fpu +ffffffff821af000 T dml314_recalculate +ffffffff821af280 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff821b5f60 T dml314_CalculateWriteBackDISPCLK +ffffffff821b60e0 T dml314_ModeSupportAndSystemConfigurationFull +ffffffff821be280 t CalculateBytePerPixelAnd256BBlockSizes +ffffffff821be4f0 t CalculateSwathAndDETConfiguration +ffffffff821beaf0 t TruncToValidBPP +ffffffff821bed70 t dscceComputeDelay +ffffffff821beeb0 t CalculateDCFCLKDeepSleep +ffffffff821bf1f0 t CalculateVMAndRowBytes +ffffffff821bf840 t CalculatePrefetchSourceLines +ffffffff821bfa00 t CalculateUrgentBurstFactor +ffffffff821bfc90 t CalculateMaxVStartup +ffffffff821bfdd0 t CalculatePrefetchSchedulePerPlane +ffffffff821c0500 t CalculateFlipSchedule +ffffffff821c0a80 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff821c16e0 t CalculateSwathWidth +ffffffff821c1bf0 t CalculatePrefetchSchedule +ffffffff821c3080 t CalculateVupdateAndDynamicMetadataParameters +ffffffff821c4000 T dml314_rq_dlg_get_rq_reg +ffffffff821c44b0 t dml_rq_dlg_get_rq_params +ffffffff821c4720 T dml314_rq_dlg_get_dlg_reg +ffffffff821c7270 t get_surf_rq_param +ffffffff821c8000 T dcn32_build_wm_range_table_fpu +ffffffff821c8390 T dcn32_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff821c85c0 T dcn32_internal_validate_bw +ffffffff821ca2f0 T dcn32_helper_populate_phantom_dlg_params +ffffffff821ca490 T dcn32_predict_pipe_split +ffffffff821ca6c0 T insert_entry_into_table_sorted +ffffffff821caaf0 T dcn32_set_phantom_stream_timing +ffffffff821cad90 t dcn32_split_stream_for_mpc_or_odm +ffffffff821cb120 T dcn32_calculate_wm_and_dlg_fpu +ffffffff821cc640 T dcn32_patch_dpm_table +ffffffff821cc850 T dcn32_update_bw_bounding_box_fpu +ffffffff821ce250 T dcn32_zero_pipe_dcc_fraction +ffffffff821ce2b0 T dcn32_allow_subvp_with_active_margin +ffffffff821ce380 t subvp_drr_schedulable +ffffffff821cf000 T dml32_recalculate +ffffffff821d3320 T dml32_ModeSupportAndSystemConfigurationFull +ffffffff821db000 T dml32_dscceComputeDelay +ffffffff821db140 T dml32_dscComputeDelay +ffffffff821db180 T IsVertical +ffffffff821db1b0 T dml32_CalculateSinglePipeDPPCLKAndSCLThroughput +ffffffff821db4d0 T dml32_CalculateBytePerPixelAndBlockSizes +ffffffff821db800 T dml32_CalculateSwathAndDETConfiguration +ffffffff821dc020 T dml32_CalculateSwathWidth +ffffffff821dc8c0 T dml32_UnboundedRequest +ffffffff821dc930 T dml32_CalculateDETBufferSize +ffffffff821dcf70 T dml32_CalculateODMMode +ffffffff821dd6d0 T dml32_CalculateRequiredDispclk +ffffffff821dd890 T dml32_RoundToDFSGranularity +ffffffff821dd920 T dml32_CalculateOutputLink +ffffffff821de450 T dml32_TruncToValidBPP +ffffffff821de7a0 T dml32_CalculateDPPCLK +ffffffff821de950 T dml32_RequiredDTBCLK +ffffffff821deba0 T dml32_DSCDelayRequirement +ffffffff821df070 T dml32_CalculateSurfaceSizeInMall +ffffffff821dfb80 T dml32_CalculateVMRowAndSwath +ffffffff821e09b0 T dml32_CalculateVMAndRowBytes +ffffffff821e15f0 T dml32_CalculatePrefetchSourceLines +ffffffff821e1840 T dml32_CalculateMALLUseForStaticScreen +ffffffff821e1990 T dml32_CalculateRowBandwidth +ffffffff821e1af0 T dml32_CalculateUrgentLatency +ffffffff821e1b90 T dml32_CalculateUrgentBurstFactor +ffffffff821e1e40 T dml32_CalculateDCFCLKDeepSleep +ffffffff821e2190 T dml32_CalculateWriteBackDelay +ffffffff821e22f0 T dml32_UseMinimumDCFCLK +ffffffff821e31b0 T dml32_CalculateExtraLatencyBytes +ffffffff821e3380 T dml32_CalculateTWait +ffffffff821e3460 T dml32_CalculateVUpdateAndDynamicMetadataParameters +ffffffff821e36c0 T dml32_get_return_bw_mbps +ffffffff821e3880 T dml32_get_return_bw_mbps_vm_only +ffffffff821e3960 T dml32_CalculateExtraLatency +ffffffff821e3b90 T dml32_CalculatePrefetchSchedule +ffffffff821e5140 T dml32_CalculateFlipSchedule +ffffffff821e56c0 T dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport +ffffffff821e6820 T dml32_CalculateWriteBackDISPCLK +ffffffff821e69e0 T dml32_CalculateMinAndMaxPrefetchMode +ffffffff821e6a20 T dml32_CalculatePixelDeliveryTimes +ffffffff821e6e90 T dml32_CalculateMetaAndPTETimes +ffffffff821e75d0 T dml32_CalculateVMGroupAndRequestTimes +ffffffff821e7ac0 T dml32_CalculateDCCConfiguration +ffffffff821e80e0 T dml32_CalculateStutterEfficiency +ffffffff821e9030 T dml32_CalculateMaxDETAndMinCompressedBufferSize +ffffffff821e9120 T dml32_CalculateVActiveBandwithSupport +ffffffff821e92b0 T dml32_CalculatePrefetchBandwithSupport +ffffffff821e9550 T dml32_CalculateBandwidthAvailableForImmediateFlip +ffffffff821e96a0 T dml32_CalculateImmediateFlipBandwithSupport +ffffffff821e98f0 T dml32_CalculateDETSwathFillLatencyHiding +ffffffff821ea000 T dml32_rq_dlg_get_rq_reg +ffffffff821ea6a0 T dml32_rq_dlg_get_dlg_reg +ffffffff821ed000 T dcn321_insert_entry_into_table_sorted +ffffffff821ed430 T dcn321_update_bw_bounding_box_fpu +ffffffff821ef000 T dml_init_instance +ffffffff821ef310 T dml_get_status_message +ffffffff821ef350 T dml_log_pipe_params +ffffffff821ef380 T dml_log_mode_support_params +ffffffff821f0000 T dml_get_voltage_level +ffffffff821f01f0 t fetch_socbb_params +ffffffff821f0700 t fetch_ip_params +ffffffff821f0ba0 t fetch_pipe_params +ffffffff821f1ca0 T PixelClockAdjustmentForProgressiveToInterlaceUnit +ffffffff821f1d20 T get_clk_dcf_deepsleep +ffffffff821f1e30 T get_wm_urgent +ffffffff821f1f40 T get_wm_memory_trip +ffffffff821f2050 T get_wm_writeback_urgent +ffffffff821f2160 T get_wm_stutter_exit +ffffffff821f2270 T get_wm_stutter_enter_exit +ffffffff821f2380 T get_wm_z8_stutter_exit +ffffffff821f2490 T get_wm_z8_stutter_enter_exit +ffffffff821f25a0 T get_stutter_efficiency_z8 +ffffffff821f26b0 T get_stutter_num_bursts_z8 +ffffffff821f27c0 T get_wm_dram_clock_change +ffffffff821f28d0 T get_wm_writeback_dram_clock_change +ffffffff821f29e0 T get_stutter_efficiency +ffffffff821f2af0 T get_stutter_efficiency_no_vblank +ffffffff821f2c00 T get_stutter_period +ffffffff821f2d10 T get_urgent_latency +ffffffff821f2e20 T get_urgent_extra_latency +ffffffff821f2f30 T get_nonurgent_latency +ffffffff821f3040 T get_dram_clock_change_latency +ffffffff821f3150 T get_dispclk_calculated +ffffffff821f3260 T get_total_data_read_bw +ffffffff821f3370 T get_return_bw +ffffffff821f3480 T get_tcalc +ffffffff821f3590 T get_fraction_of_urgent_bandwidth +ffffffff821f36a0 T get_fraction_of_urgent_bandwidth_imm_flip +ffffffff821f37b0 T get_cstate_max_cap_mode +ffffffff821f38d0 T get_comp_buffer_size_kbytes +ffffffff821f39e0 T get_pixel_chunk_size_in_kbyte +ffffffff821f3b00 T get_alpha_pixel_chunk_size_in_kbyte +ffffffff821f3c20 T get_meta_chunk_size_in_kbyte +ffffffff821f3d40 T get_min_pixel_chunk_size_in_byte +ffffffff821f3e50 T get_min_meta_chunk_size_in_byte +ffffffff821f3f70 T get_fclk_watermark +ffffffff821f4080 T get_usr_retraining_watermark +ffffffff821f4190 T get_comp_buffer_reserved_space_kbytes +ffffffff821f42b0 T get_comp_buffer_reserved_space_64bytes +ffffffff821f43d0 T get_comp_buffer_reserved_space_zs +ffffffff821f44f0 T get_unbounded_request_enabled +ffffffff821f4610 T get_dsc_delay +ffffffff821f4740 T get_dppclk_calculated +ffffffff821f4860 T get_dscclk_calculated +ffffffff821f4980 T get_min_ttu_vblank +ffffffff821f4aa0 T get_min_ttu_vblank_in_us +ffffffff821f4bc0 T get_vratio_prefetch_l +ffffffff821f4ce0 T get_vratio_prefetch_c +ffffffff821f4e00 T get_dst_x_after_scaler +ffffffff821f4f20 T get_dst_y_after_scaler +ffffffff821f5040 T get_dst_y_per_vm_vblank +ffffffff821f5160 T get_dst_y_per_row_vblank +ffffffff821f5280 T get_dst_y_prefetch +ffffffff821f53a0 T get_dst_y_per_vm_flip +ffffffff821f54c0 T get_dst_y_per_row_flip +ffffffff821f55e0 T get_refcyc_per_vm_group_vblank +ffffffff821f5700 T get_refcyc_per_vm_group_flip +ffffffff821f5820 T get_refcyc_per_vm_req_vblank +ffffffff821f5940 T get_refcyc_per_vm_req_flip +ffffffff821f5a60 T get_refcyc_per_vm_group_vblank_in_us +ffffffff821f5b80 T get_refcyc_per_vm_group_flip_in_us +ffffffff821f5ca0 T get_refcyc_per_vm_req_vblank_in_us +ffffffff821f5dc0 T get_refcyc_per_vm_req_flip_in_us +ffffffff821f5ee0 T get_refcyc_per_vm_dmdata_in_us +ffffffff821f6000 T get_dmdata_dl_delta_in_us +ffffffff821f6120 T get_refcyc_per_line_delivery_l_in_us +ffffffff821f6240 T get_refcyc_per_line_delivery_c_in_us +ffffffff821f6360 T get_refcyc_per_line_delivery_pre_l_in_us +ffffffff821f6480 T get_refcyc_per_line_delivery_pre_c_in_us +ffffffff821f65a0 T get_refcyc_per_req_delivery_l_in_us +ffffffff821f66c0 T get_refcyc_per_req_delivery_c_in_us +ffffffff821f67e0 T get_refcyc_per_req_delivery_pre_l_in_us +ffffffff821f6900 T get_refcyc_per_req_delivery_pre_c_in_us +ffffffff821f6a20 T get_refcyc_per_cursor_req_delivery_in_us +ffffffff821f6b40 T get_refcyc_per_cursor_req_delivery_pre_in_us +ffffffff821f6c60 T get_refcyc_per_meta_chunk_nom_l_in_us +ffffffff821f6d80 T get_refcyc_per_meta_chunk_nom_c_in_us +ffffffff821f6ea0 T get_refcyc_per_meta_chunk_vblank_l_in_us +ffffffff821f6fc0 T get_refcyc_per_meta_chunk_vblank_c_in_us +ffffffff821f70e0 T get_refcyc_per_meta_chunk_flip_l_in_us +ffffffff821f7200 T get_refcyc_per_meta_chunk_flip_c_in_us +ffffffff821f7320 T get_vstartup +ffffffff821f7450 T get_vupdate_offset +ffffffff821f7580 T get_vupdate_width +ffffffff821f76a0 T get_vready_offset +ffffffff821f77c0 T get_vready_at_or_after_vsync +ffffffff821f78f0 T get_min_dst_y_next_start +ffffffff821f7a20 T get_dst_y_per_pte_row_nom_l +ffffffff821f7b40 T get_dst_y_per_pte_row_nom_c +ffffffff821f7c60 T get_dst_y_per_meta_row_nom_l +ffffffff821f7d80 T get_dst_y_per_meta_row_nom_c +ffffffff821f7ea0 T get_refcyc_per_pte_group_nom_l_in_us +ffffffff821f7fc0 T get_refcyc_per_pte_group_nom_c_in_us +ffffffff821f80e0 T get_refcyc_per_pte_group_vblank_l_in_us +ffffffff821f8200 T get_refcyc_per_pte_group_vblank_c_in_us +ffffffff821f8320 T get_refcyc_per_pte_group_flip_l_in_us +ffffffff821f8440 T get_refcyc_per_pte_group_flip_c_in_us +ffffffff821f8560 T get_vstartup_calculated +ffffffff821f8690 T get_dpte_row_height_linear_c +ffffffff821f87c0 T get_swath_height_l +ffffffff821f88f0 T get_swath_height_c +ffffffff821f8a20 T get_det_stored_buffer_size_l_bytes +ffffffff821f8b50 T get_det_stored_buffer_size_c_bytes +ffffffff821f8c80 T get_dpte_group_size_in_bytes +ffffffff821f8db0 T get_vm_group_size_in_bytes +ffffffff821f8ee0 T get_dpte_row_height_linear_l +ffffffff821f9010 T get_pte_buffer_mode +ffffffff821f9140 T get_subviewport_lines_needed_in_mall +ffffffff821f9270 T get_total_immediate_flip_bytes +ffffffff821f9390 T get_total_immediate_flip_bw +ffffffff821f9570 T get_total_prefetch_bw +ffffffff821f9750 T get_total_surface_size_in_mall_bytes +ffffffff821f9900 T get_det_buffer_size_kbytes +ffffffff821f9a30 T get_is_phantom_pipe +ffffffff821f9b60 T Calculate256BBlockSizes +ffffffff821f9c50 T CalculateMinAndMaxPrefetchMode +ffffffff821f9cd0 T ModeSupportAndSystemConfiguration +ffffffff821f9ff0 T CalculateWriteBackDISPCLK +ffffffff821fb000 T print__rq_params_st +ffffffff821fb030 T print__data_rq_sizing_params_st +ffffffff821fb060 T print__data_rq_dlg_params_st +ffffffff821fb090 T print__data_rq_misc_params_st +ffffffff821fb0c0 T print__rq_dlg_params_st +ffffffff821fb0f0 T print__dlg_sys_params_st +ffffffff821fb120 T print__data_rq_regs_st +ffffffff821fb150 T print__rq_regs_st +ffffffff821fb180 T print__dlg_regs_st +ffffffff821fb1b0 T print__ttu_regs_st +ffffffff821fc000 T dml1_extract_rq_regs +ffffffff821fc330 T dml1_rq_dlg_get_rq_params +ffffffff821fc500 t get_surf_rq_param +ffffffff821fd200 T dml1_rq_dlg_get_dlg_params +ffffffff82200000 T _do_calc_rc_params +ffffffff82201040 t get_qp_set +ffffffff82202000 T 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dal_hw_factory_dce80_init +ffffffff82207390 t id_to_offset +ffffffff82208000 T dal_hw_factory_dce120_init ffffffff82208060 t define_hpd_registers ffffffff822080b0 t define_ddc_registers -ffffffff82209000 T dal_hw_translate_dce80_init +ffffffff82209000 T dal_hw_translate_dce120_init ffffffff82209030 t offset_to_id -ffffffff822097b0 t id_to_offset -ffffffff8220a000 T dal_hw_factory_dcn10_init +ffffffff822093a0 t id_to_offset +ffffffff8220a000 T dal_hw_factory_dce80_init ffffffff8220a060 t define_hpd_registers ffffffff8220a0b0 t define_ddc_registers -ffffffff8220a150 t define_generic_registers -ffffffff8220b000 T dal_hw_translate_dcn10_init +ffffffff8220b000 T dal_hw_translate_dce80_init ffffffff8220b030 t offset_to_id -ffffffff8220b390 t id_to_offset -ffffffff8220c000 T dal_hw_factory_dcn20_init +ffffffff8220b7b0 t id_to_offset +ffffffff8220c000 T dal_hw_factory_dcn10_init ffffffff8220c060 t define_hpd_registers ffffffff8220c0b0 t define_ddc_registers -ffffffff8220c160 t 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dal_hw_factory_dcn32_init +ffffffff82216060 t define_hpd_registers +ffffffff822160b0 t define_ddc_registers +ffffffff82216160 t define_generic_registers +ffffffff82217000 T dal_hw_translate_dcn32_init +ffffffff82217030 t offset_to_id +ffffffff82217290 t id_to_offset +ffffffff82218000 T dal_gpio_open +ffffffff822180c0 T dal_gpio_open_ex +ffffffff82218180 T dal_gpio_get_value +ffffffff82218200 T dal_gpio_set_value +ffffffff82218280 T dal_gpio_get_mode +ffffffff822182b0 T dal_gpio_lock_pin +ffffffff822182d0 T dal_gpio_unlock_pin +ffffffff822182f0 T dal_gpio_change_mode +ffffffff82218370 T dal_gpio_get_id +ffffffff822183a0 T dal_gpio_get_enum +ffffffff822183d0 T dal_gpio_set_config +ffffffff82218450 T dal_gpio_get_pin_info +ffffffff822184b0 T dal_gpio_get_sync_source +ffffffff82218540 T dal_gpio_get_output_state +ffffffff82218570 T dal_gpio_get_ddc +ffffffff822185a0 T dal_gpio_get_hpd +ffffffff822185d0 T dal_gpio_get_generic +ffffffff82218600 T dal_gpio_close +ffffffff82218650 T dal_gpio_create +ffffffff822187e0 T dal_gpio_destroy +ffffffff82219000 T dal_gpio_service_create +ffffffff82219260 T dal_gpio_service_create_irq +ffffffff82219320 T dal_gpio_create_irq +ffffffff822193a0 T dal_gpio_service_create_generic_mux +ffffffff82219440 T dal_gpio_destroy_generic_mux +ffffffff822194d0 T dal_gpio_get_generic_pin_info +ffffffff82219530 T dal_gpio_service_destroy +ffffffff82219660 T dal_mux_setup_config +ffffffff822196c0 T dal_gpio_service_lock +ffffffff82219740 T dal_gpio_service_unlock +ffffffff822197c0 T dal_gpio_service_open +ffffffff82219a00 T dal_gpio_service_close +ffffffff82219aa0 T dal_irq_get_source +ffffffff82219b10 T dal_irq_get_rx_source +ffffffff82219b60 T dal_irq_setup_hpd_filter +ffffffff82219bc0 T dal_gpio_destroy_irq +ffffffff82219c50 T dal_gpio_create_ddc +ffffffff82219dc0 T dal_gpio_destroy_ddc +ffffffff82219e90 T dal_ddc_close +ffffffff82219ee0 T dal_ddc_open +ffffffff8221a040 T dal_ddc_change_mode +ffffffff8221a0e0 T dal_ddc_get_line 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sdmmc_submatch -ffffffff82536b60 T sdmmc_io_detach -ffffffff82536c10 T sdmmc_io_rw_direct -ffffffff82536db0 T sdmmc_io_rw_extended_subr -ffffffff82536f50 T sdmmc_io_rw_extended -ffffffff82537340 T sdmmc_io_read_2 -ffffffff825374a0 T sdmmc_io_write_2 -ffffffff82537600 T sdmmc_io_read_4 -ffffffff82537760 T sdmmc_io_write_4 -ffffffff825378c0 T sdmmc_io_read_multi_1 -ffffffff825379b0 T sdmmc_io_write_multi_1 -ffffffff82537aa0 T sdmmc_io_read_region_1 -ffffffff82537b90 T sdmmc_io_write_region_1 -ffffffff82537c80 T sdmmc_io_xchg -ffffffff82537e10 T sdmmc_intr_enable -ffffffff82538080 T sdmmc_intr_disable -ffffffff825382f0 T sdmmc_intr_establish -ffffffff825383f0 T sdmmc_intr_disestablish -ffffffff825384e0 T sdmmc_card_intr -ffffffff82538530 T sdmmc_intr_task -ffffffff825385c0 T sdmmc_io_set_blocklen -ffffffff82539000 T sdmmc_mem_enable -ffffffff825394e0 T sdmmc_mem_send_op_cond -ffffffff82539690 T sdmmc_mem_signal_voltage -ffffffff82539750 T sdmmc_mem_scan -ffffffff82539a60 T sdmmc_decode_csd -ffffffff82539e70 T sdmmc_decode_cid -ffffffff8253a2b0 T sdmmc_mem_send_scr -ffffffff8253a3f0 T sdmmc_mem_decode_scr -ffffffff8253a470 T sdmmc_mem_send_cxd_data -ffffffff8253a5e0 T sdmmc_mem_set_bus_width -ffffffff8253a700 T sdmmc_mem_sd_switch -ffffffff8253a9b0 T sdmmc_be512_to_bitfield512 -ffffffff8253aa60 T sdmmc_mem_mmc_switch -ffffffff8253ab50 T sdmmc_mem_init -ffffffff8253aca0 T sdmmc_mem_set_blocklen -ffffffff8253ada0 T sdmmc_mem_sd_init -ffffffff8253b350 T sdmmc_mem_mmc_init -ffffffff8253bc70 T sdmmc_mem_select_transfer_mode -ffffffff8253bcf0 T sdmmc_mem_execute_tuning -ffffffff8253bd80 T sdmmc_mem_read_block_subr -ffffffff8253c0e0 T sdmmc_mem_single_read_block -ffffffff8253c1b0 T sdmmc_mem_read_block -ffffffff8253c370 T sdmmc_mem_write_block_subr -ffffffff8253c6c0 T sdmmc_mem_single_write_block -ffffffff8253c790 T sdmmc_mem_write_block -ffffffff8253c950 T sdmmc_mem_hibernate_write -ffffffff8253d000 T sdmmc_scsi_cmd -ffffffff8253d1f0 T sdmmc_minphys -ffffffff8253d270 T sdmmc_scsi_attach -ffffffff8253d460 T sdmmc_alloc_ccbs -ffffffff8253d5a0 T sdmmc_free_ccbs -ffffffff8253d600 T sdmmc_scsi_detach -ffffffff8253d760 T sdmmc_stimeout -ffffffff8253d7e0 T sdmmc_ccb_alloc -ffffffff8253d890 T sdmmc_ccb_free -ffffffff8253d970 T sdmmc_inquiry -ffffffff8253dbe0 T sdmmc_start_xs -ffffffff8253dcd0 T sdmmc_complete_xs -ffffffff8253dda0 T sdmmc_done_xs -ffffffff8253ddf0 T sdmmc_scsi_hibernate_io -ffffffff8253e000 T bwfm_sdio_preinit -ffffffff8253e4f0 T bwfm_sdio_txcheck -ffffffff8253e530 T bwfm_sdio_txdata -ffffffff8253e5a0 T bwfm_sdio_txctl -ffffffff8253e6f0 T bwfm_sdio_buscore_read -ffffffff8253e700 T bwfm_sdio_buscore_write -ffffffff8253e720 T bwfm_sdio_buscore_prepare -ffffffff8253e860 T bwfm_sdio_buscore_activate -ffffffff8253e8e0 T bwfm_sdio_match -ffffffff8253e9b0 T bwfm_sdio_attach -ffffffff8253ec70 T bwfm_sdio_detach -ffffffff8253ecd0 T bwfm_sdio_task -ffffffff8253ee30 T bwfm_sdio_write_1 -ffffffff8253ee60 T bwfm_sdio_read_1 -ffffffff8253ee90 T bwfm_sdio_write_4 -ffffffff8253ef40 T bwfm_sdio_read_4 -ffffffff8253eff0 T bwfm_sdio_load_microcode -ffffffff8253f250 T bwfm_sdio_clkctl -ffffffff8253f380 T bwfm_sdio_dev_write -ffffffff8253f3d0 T bwfm_sdio_intr -ffffffff8253f410 T bwfm_sdio_ram_read_write -ffffffff8253f640 T bwfm_sdio_htclk -ffffffff8253f8a0 T bwfm_sdio_readshared -ffffffff8253f970 T bwfm_sdio_dev_read -ffffffff8253f9b0 T bwfm_sdio_rx_frames -ffffffff8253fd40 T bwfm_sdio_tx_frames -ffffffff8253fe20 T bwfm_sdio_backplane -ffffffff8253fed0 T bwfm_sdio_buf_read -ffffffff8253ffb0 T bwfm_sdio_buf_write -ffffffff82540060 T bwfm_sdio_frame_read_write -ffffffff825401e0 T bwfm_sdio_newbuf -ffffffff82540260 T bwfm_sdio_tx_ok -ffffffff825402b0 T bwfm_sdio_tx_ctrlframe -ffffffff825403b0 T bwfm_sdio_tx_dataframe -ffffffff82540500 T bwfm_sdio_rx_glom -ffffffff82541000 T onewire_match -ffffffff82541050 T onewire_attach -ffffffff825410f0 T onewire_detach -ffffffff82541160 T onewire_activate -ffffffff82541180 T onewire_scan -ffffffff82541390 T onewire_createthread -ffffffff82541400 T onewire_print -ffffffff825414d0 T onewirebus_print -ffffffff82541520 T onewire_lock -ffffffff82541540 T onewire_unlock -ffffffff82541560 T onewire_reset -ffffffff82541580 T onewire_bit -ffffffff825415a0 T onewire_read_byte -ffffffff825416e0 T onewire_write_byte -ffffffff825417c0 T onewire_read_block -ffffffff82541860 T onewire_write_block -ffffffff82541900 T onewire_triplet -ffffffff825419e0 T onewire_matchrom -ffffffff82541b30 T onewire_search -ffffffff82541ec0 T onewire_thread -ffffffff82542000 T onewire_crc -ffffffff825420e0 T onewire_crc16 -ffffffff825421c0 T onewire_famname -ffffffff82542200 T onewire_matchbyfam -ffffffff82543000 T owid_match -ffffffff82543030 T owid_attach -ffffffff82543100 T owid_detach -ffffffff82543140 T owid_activate -ffffffff82544000 T owsbm_match -ffffffff82544030 T owsbm_attach -ffffffff825441d0 T owsbm_detach -ffffffff82544240 T owsbm_activate -ffffffff82544270 T owsbm_update -ffffffff82545000 T owtemp_match -ffffffff82545030 T owtemp_attach -ffffffff82545130 T owtemp_detach -ffffffff825451a0 T owtemp_activate -ffffffff825451d0 T owtemp_update -ffffffff82546000 T owctr_match -ffffffff82546030 T owctr_attach -ffffffff82546180 T owctr_detach -ffffffff825461f0 T owctr_activate -ffffffff82546220 T owctr_update -ffffffff82546250 T owctr_update_counter -ffffffff82547000 A __text_page_start -ffffffff82547000 T Xsyscall_meltdown -ffffffff8254700c T Xsyscall -ffffffff8254726e t Xsyscall_trampback -ffffffff82547280 T intr_user_exit -ffffffff825472c2 t intr_user_exit_post_ast -ffffffff825473ee t Xiretq_trampback -ffffffff825473fa T doreti_iret -ffffffff82548000 T alltraps -ffffffff82548138 T recall_trap -ffffffff82548150 T alltraps_kern -ffffffff82548153 T alltraps_kern_meltdown -ffffffff82549000 ? Xsyscall32 -ffffffff82549000 A __kutext_start -ffffffff82549000 A __text_page_end -ffffffff8254a000 ? Xtrap00 -ffffffff8254a010 ? Xtrap01 -ffffffff8254a020 ? Xtrap02 -ffffffff8254a028 c calltrap_specstk -ffffffff8254a0f0 ? calltrap_specstk_tramp -ffffffff8254a110 ? Xtrap03 -ffffffff8254a120 ? Xtrap04 -ffffffff8254a130 ? Xtrap05 -ffffffff8254a140 ? Xtrap06 -ffffffff8254a150 ? Xtrap07 -ffffffff8254a160 ? Xtrap08 -ffffffff8254a170 ? Xtrap09 -ffffffff8254a180 ? Xtrap0a -ffffffff8254a190 ? Xtrap0b -ffffffff8254a1a0 ? Xtrap0c -ffffffff8254a1b0 ? Xtrap0d -ffffffff8254a240 ? Xtrap0e -ffffffff8254a250 ? Xintrspurious -ffffffff8254a250 ? Xtrap0f -ffffffff8254a260 ? Xtrap10 -ffffffff8254a270 ? Xtrap11 -ffffffff8254a280 ? Xtrap12 -ffffffff8254a290 ? Xtrap13 -ffffffff8254a2a0 ? Xtrap14 -ffffffff8254a2b0 ? Xtrap15 -ffffffff8254a2c0 ? Xtrap16 -ffffffff8254a2c0 ? Xtrap17 -ffffffff8254a2c0 ? Xtrap18 -ffffffff8254a2c0 ? Xtrap19 -ffffffff8254a2c0 ? Xtrap1a -ffffffff8254a2c0 ? Xtrap1b -ffffffff8254a2c0 ? Xtrap1c -ffffffff8254a2c0 ? Xtrap1d -ffffffff8254a2c0 ? Xtrap1e -ffffffff8254a2c0 ? Xtrap1f -ffffffff8254a2d0 ? x2apic_eoi -ffffffff8254a2f0 ? Xintr_lapic_ipi -ffffffff8254a330 ? Xipi_invltlb -ffffffff8254a360 ? Xipi_invlpg -ffffffff8254a390 ? Xipi_invlrange -ffffffff8254a3d0 ? Xipi_invltlb_pcid -ffffffff8254a410 ? Xipi_invlpg_pcid -ffffffff8254a460 ? Xipi_invlrange_pcid -ffffffff8254a4d0 ? Xintr_lapic_ltimer -ffffffff8254a510 ? Xintr_xen_upcall -ffffffff8254a550 ? Xintr_hyperv_upcall -ffffffff8254a590 ? Xintr_legacy0 -ffffffff8254a5d0 ? Xintr_legacy1 -ffffffff8254a610 ? Xintr_legacy2 -ffffffff8254a650 ? Xintr_legacy3 -ffffffff8254a690 ? Xintr_legacy4 -ffffffff8254a6d0 ? Xintr_legacy5 -ffffffff8254a710 ? Xintr_legacy6 -ffffffff8254a750 ? Xintr_legacy7 -ffffffff8254a790 ? Xintr_legacy8 -ffffffff8254a7d0 ? Xintr_legacy9 -ffffffff8254a810 ? Xintr_legacy10 -ffffffff8254a850 ? Xintr_legacy11 -ffffffff8254a890 ? Xintr_legacy12 -ffffffff8254a8d0 ? Xintr_legacy13 -ffffffff8254a910 ? Xintr_legacy14 -ffffffff8254a950 ? Xintr_legacy15 -ffffffff8254a990 ? Xintr_ioapic_edge0 -ffffffff8254a9d0 ? Xintr_ioapic_edge1 -ffffffff8254aa10 ? Xintr_ioapic_edge2 -ffffffff8254aa50 ? Xintr_ioapic_edge3 -ffffffff8254aa90 ? Xintr_ioapic_edge4 -ffffffff8254aad0 ? Xintr_ioapic_edge5 -ffffffff8254ab10 ? Xintr_ioapic_edge6 -ffffffff8254ab50 ? Xintr_ioapic_edge7 -ffffffff8254ab90 ? Xintr_ioapic_edge8 -ffffffff8254abd0 ? Xintr_ioapic_edge9 -ffffffff8254ac10 ? Xintr_ioapic_edge10 -ffffffff8254ac50 ? Xintr_ioapic_edge11 -ffffffff8254ac90 ? Xintr_ioapic_edge12 -ffffffff8254acd0 ? Xintr_ioapic_edge13 -ffffffff8254ad10 ? Xintr_ioapic_edge14 -ffffffff8254ad50 ? Xintr_ioapic_edge15 -ffffffff8254ad90 ? Xintr_ioapic_edge16 -ffffffff8254add0 ? Xintr_ioapic_edge17 -ffffffff8254ae10 ? Xintr_ioapic_edge18 -ffffffff8254ae50 ? Xintr_ioapic_edge19 -ffffffff8254ae90 ? Xintr_ioapic_edge20 -ffffffff8254aed0 ? Xintr_ioapic_edge21 -ffffffff8254af10 ? Xintr_ioapic_edge22 -ffffffff8254af50 ? Xintr_ioapic_edge23 -ffffffff8254af90 ? Xintr_ioapic_edge24 -ffffffff8254afd0 ? Xintr_ioapic_edge25 -ffffffff8254b010 ? Xintr_ioapic_edge26 -ffffffff8254b050 ? Xintr_ioapic_edge27 -ffffffff8254b090 ? Xintr_ioapic_edge28 -ffffffff8254b0d0 ? Xintr_ioapic_edge29 -ffffffff8254b110 ? Xintr_ioapic_edge30 -ffffffff8254b150 ? Xintr_ioapic_edge31 -ffffffff8254b190 ? Xintr_ioapic_edge32 -ffffffff8254b1d0 ? Xintr_ioapic_edge33 -ffffffff8254b210 ? Xintr_ioapic_edge34 -ffffffff8254b250 ? Xintr_ioapic_edge35 -ffffffff8254b290 ? Xintr_ioapic_edge36 -ffffffff8254b2d0 ? Xintr_ioapic_edge37 -ffffffff8254b310 ? Xintr_ioapic_edge38 -ffffffff8254b350 ? Xintr_ioapic_edge39 -ffffffff8254b390 ? Xintr_ioapic_edge40 -ffffffff8254b3d0 ? Xintr_ioapic_edge41 -ffffffff8254b410 ? Xintr_ioapic_edge42 -ffffffff8254b450 ? Xintr_ioapic_edge43 -ffffffff8254b490 ? Xintr_ioapic_edge44 -ffffffff8254b4d0 ? Xintr_ioapic_edge45 -ffffffff8254b510 ? Xintr_ioapic_edge46 -ffffffff8254b550 ? Xintr_ioapic_edge47 -ffffffff8254b590 ? Xintr_ioapic_edge48 -ffffffff8254b5d0 ? Xintr_ioapic_edge49 -ffffffff8254b610 ? Xintr_ioapic_edge50 -ffffffff8254b650 ? Xintr_ioapic_edge51 -ffffffff8254b690 ? Xintr_ioapic_edge52 -ffffffff8254b6d0 ? Xintr_ioapic_edge53 -ffffffff8254b710 ? Xintr_ioapic_edge54 -ffffffff8254b750 ? Xintr_ioapic_edge55 -ffffffff8254b790 ? Xintr_ioapic_edge56 -ffffffff8254b7d0 ? Xintr_ioapic_edge57 -ffffffff8254b810 ? Xintr_ioapic_edge58 -ffffffff8254b850 ? Xintr_ioapic_edge59 -ffffffff8254b890 ? Xintr_ioapic_edge60 -ffffffff8254b8d0 ? Xintr_ioapic_edge61 -ffffffff8254b910 ? Xintr_ioapic_edge62 -ffffffff8254b950 ? Xintr_ioapic_edge63 -ffffffff8254b990 ? Xintr_ioapic_level0 -ffffffff8254b9d0 ? Xintr_ioapic_level1 -ffffffff8254ba10 ? Xintr_ioapic_level2 -ffffffff8254ba50 ? Xintr_ioapic_level3 -ffffffff8254ba90 ? Xintr_ioapic_level4 -ffffffff8254bad0 ? Xintr_ioapic_level5 -ffffffff8254bb10 ? Xintr_ioapic_level6 -ffffffff8254bb50 ? Xintr_ioapic_level7 -ffffffff8254bb90 ? Xintr_ioapic_level8 -ffffffff8254bbd0 ? Xintr_ioapic_level9 -ffffffff8254bc10 ? Xintr_ioapic_level10 -ffffffff8254bc50 ? Xintr_ioapic_level11 -ffffffff8254bc90 ? Xintr_ioapic_level12 -ffffffff8254bcd0 ? Xintr_ioapic_level13 -ffffffff8254bd10 ? Xintr_ioapic_level14 -ffffffff8254bd50 ? Xintr_ioapic_level15 -ffffffff8254bd90 ? Xintr_ioapic_level16 -ffffffff8254bdd0 ? Xintr_ioapic_level17 -ffffffff8254be10 ? Xintr_ioapic_level18 -ffffffff8254be50 ? Xintr_ioapic_level19 -ffffffff8254be90 ? Xintr_ioapic_level20 -ffffffff8254bed0 ? Xintr_ioapic_level21 -ffffffff8254bf10 ? Xintr_ioapic_level22 -ffffffff8254bf50 ? Xintr_ioapic_level23 -ffffffff8254bf90 ? Xintr_ioapic_level24 -ffffffff8254bfd0 ? Xintr_ioapic_level25 -ffffffff8254c010 ? Xintr_ioapic_level26 -ffffffff8254c050 ? Xintr_ioapic_level27 -ffffffff8254c090 ? Xintr_ioapic_level28 -ffffffff8254c0d0 ? Xintr_ioapic_level29 -ffffffff8254c110 ? Xintr_ioapic_level30 -ffffffff8254c150 ? Xintr_ioapic_level31 -ffffffff8254c190 ? Xintr_ioapic_level32 -ffffffff8254c1d0 ? Xintr_ioapic_level33 -ffffffff8254c210 ? Xintr_ioapic_level34 -ffffffff8254c250 ? Xintr_ioapic_level35 -ffffffff8254c290 ? Xintr_ioapic_level36 -ffffffff8254c2d0 ? Xintr_ioapic_level37 -ffffffff8254c310 ? Xintr_ioapic_level38 -ffffffff8254c350 ? Xintr_ioapic_level39 -ffffffff8254c390 ? Xintr_ioapic_level40 -ffffffff8254c3d0 ? Xintr_ioapic_level41 -ffffffff8254c410 ? Xintr_ioapic_level42 -ffffffff8254c450 ? Xintr_ioapic_level43 -ffffffff8254c490 ? Xintr_ioapic_level44 -ffffffff8254c4d0 ? Xintr_ioapic_level45 -ffffffff8254c510 ? Xintr_ioapic_level46 -ffffffff8254c550 ? Xintr_ioapic_level47 -ffffffff8254c590 ? Xintr_ioapic_level48 -ffffffff8254c5d0 ? Xintr_ioapic_level49 -ffffffff8254c610 ? Xintr_ioapic_level50 -ffffffff8254c650 ? Xintr_ioapic_level51 -ffffffff8254c690 ? Xintr_ioapic_level52 -ffffffff8254c6d0 ? Xintr_ioapic_level53 -ffffffff8254c710 ? Xintr_ioapic_level54 -ffffffff8254c750 ? Xintr_ioapic_level55 -ffffffff8254c790 ? Xintr_ioapic_level56 -ffffffff8254c7d0 ? Xintr_ioapic_level57 -ffffffff8254c810 ? Xintr_ioapic_level58 -ffffffff8254c850 ? Xintr_ioapic_level59 -ffffffff8254c890 ? Xintr_ioapic_level60 -ffffffff8254c8d0 ? Xintr_ioapic_level61 -ffffffff8254c910 ? Xintr_ioapic_level62 -ffffffff8254c950 ? Xintr_ioapic_level63 -ffffffff8254d000 ? codepatch_fill_nop -ffffffff8254d000 A __cptext_start -ffffffff8254d000 A __kutext_end -ffffffff8254d0b0 ? codepatch_maprw -ffffffff8254d190 ? codepatch_unmaprw -ffffffff8254d200 ? codepatch_nop -ffffffff8254d360 ? codepatch_replace -ffffffff8254d510 ? codepatch_call -ffffffff8254d530 ? codepatch_jmp -ffffffff8254e000 A __cptext_end -ffffffff8254e000 A __rodata_start -ffffffff8254e000 C _etext -ffffffff8254e000 C etext -ffffffff8254f000 r seeprom_read -ffffffff8254f004 r icl_mg_pll_find_divisors.div1_vals -ffffffff8254f028 r gen9bc_tgp_ddc_pin_map -ffffffff8254f038 r athn_ac2qid -ffffffff8254f038 r athn_ac2qid -ffffffff8254f038 r athn_ac2qid -ffffffff8254f044 r rtwn_get_rssi.cckoff -ffffffff8254f06c r rsu_ac2qid -ffffffff8254f07c r pckbc_portcmd -ffffffff8254f080 r tht_fifo_write_pad.pad -ffffffff8254f088 r rsu_get_rssi.cckoff -ffffffff8254f09c r adlp_n_revids -ffffffff8254f0ec r apple_iso_trans -ffffffff8254f0f0 r dg2_g12_revid_step_tbl -ffffffff8254f0f8 r wihap_check_tx.txratetable -ffffffff8254f0fc r dmamode -ffffffff8254f124 r gen9_edram_size_mb.sets -ffffffff82550000 r isomappings -ffffffff82550080 r unimappings -ffffffff82550230 r replacements -ffffffff82553b06 r cmd0646_9_tim_udma -ffffffff825a7594 r pp_r600_decoded_lanes -ffffffff825c28be r cmd680_setup_channel.udma_tbl -ffffffff825ca52a r apollo_udma33_tim -ffffffff825d0617 r substchar -ffffffff825d26c5 r apollo_udma100_tim -ffffffff825f9fdc r apollo_udma66_tim -ffffffff8260146f r apollo_pio_rec -ffffffff82610861 r cy_pio_rec -ffffffff8263fd4d r apollo_udma133_tim -ffffffff8264c8f8 R drm_ca -ffffffff8264c920 R drm_filtops -ffffffff8264c950 R drmread_filtops -ffffffff8264d000 r vga_emulops -ffffffff8264d048 R vga_stdscreen -ffffffff8264d078 R vga_stdscreen_mono -ffffffff8264d0a8 R vga_stdscreen_bf -ffffffff8264d0d8 R vga_40lscreen -ffffffff8264d108 R vga_40lscreen_mono -ffffffff8264d138 R vga_40lscreen_bf -ffffffff8264d168 R vga_50lscreen -ffffffff8264d198 R vga_50lscreen_mono -ffffffff8264d1c8 R vga_50lscreen_bf -ffffffff8264d1f8 R vga_screenlist -ffffffff8264d208 R vga_screenlist_mono -ffffffff8264d218 R vga_accessops -ffffffff8264d278 r i945_wm_info -ffffffff8264d2b0 r bgansitopc -ffffffff8264d2b8 r pctoansi -ffffffff8264d2f8 r sdma_offsets -ffffffff8264d2f8 r sdma_offsets -ffffffff8264d328 r iha_rate_tbl -ffffffff8264d360 r i830_a_wm_info -ffffffff8264d398 r gen9_edram_size_mb.ways -ffffffff8264d400 r aggr_periodic_times -ffffffff8264d480 r jsl_ehl_revids -ffffffff8264d4f8 r michael_final.pad -ffffffff8264d520 r rt_copysa.maskarray -ffffffff8264d528 r i915_wm_info -ffffffff8264d530 r amdgpu_ih_clientid_jpeg -ffffffff8264d530 r amdgpu_ih_clientid_uvds -ffffffff8264d530 r amdgpu_ih_clientid_vcns -ffffffff8264d530 r amdgpu_ih_clientid_vcns -ffffffff8264d530 r amdgpu_ih_clientid_vcns -ffffffff8264d568 r vga_setfontset.cmaptabb -ffffffff8264d580 r tgl_revids -ffffffff8264d5d8 r i830_bc_wm_info -ffffffff8264d648 r hsw_activate_psr2.map -ffffffff8264d688 r __drm_universal_plane_init.default_modifiers -ffffffff8264d698 r iwn_tid2fifo -ffffffff8264d6b0 r vga_setfontset.cmaptaba -ffffffff8264d6b8 r crtc_offsets -ffffffff8264d6b8 r crtc_offsets -ffffffff8264d6b8 r crtc_offsets -ffffffff8264d6d8 r link_speed -ffffffff8264d6d8 r link_speed -ffffffff8264d6d8 r link_speed -ffffffff8264d750 r rtwn_r88e_get_rssi.cckoff -ffffffff8264e000 R edid_vendors -ffffffff8264e2c0 R edid_nvendors -ffffffff8264e2d0 R edid_products -ffffffff8264e330 R edid_nproducts -ffffffff8264e340 r _edid_modes -ffffffff8264f000 R videomode_list -ffffffff82650080 R videomode_count -ffffffff82651000 r ahc_hard_errors -ffffffff82651080 r critical_sections -ffffffff826510b0 r patches -ffffffff82651d50 r seqprog -ffffffff82653000 r ahc_switch -ffffffff82654000 r termstat_strings -ffffffff82654020 r critical_sections -ffffffff82654060 r seqprog -ffffffff82654d50 r patches -ffffffff82656000 r ahd_switch -ffffffff82657000 R aic_switch -ffffffff82658000 R adw_switch -ffffffff82659000 R gdt_switch -ffffffff8265a000 R twe_switch -ffffffff8265b000 R ciss_switch -ffffffff8265b030 R ciss_level -ffffffff8265b050 R ciss_stat -ffffffff8265c000 R ami_switch -ffffffff8265c028 R ami_raw_switch -ffffffff8265d000 R mfi_switch -ffffffff8265d028 R mfi_pd_switch -ffffffff8265d050 r mfi_iop_xscale -ffffffff8265d080 r mfi_iop_ppc -ffffffff8265d0b0 r mfi_iop_gen2 -ffffffff8265d0e0 r mfi_iop_skinny -ffffffff8265d110 r mfi_bbu_indicators -ffffffff8265d1c0 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs -ffffffff8265d1f0 r chv_oa_mux_regs -ffffffff8265d210 r fiji_clock_stretcher_lookup_table -ffffffff8265d210 r tonga_clock_stretcher_lookup_table -ffffffff8265d240 r link_speed -ffffffff8265d240 r link_speed -ffffffff8265d240 r link_speed -ffffffff8265d280 r drm_fb_xfrm.default_dst_pitch -ffffffff8265d280 r non_supported_protection -ffffffff8265d380 r tgl_uy_revids -ffffffff8265d3d0 r bwi_phy_noise_11g_rev1 -ffffffff8265d450 r cardslot_process_event.antonym_ev -ffffffff8265d4e0 r gen11_oa_mux_regs -ffffffff8265d5d0 r ddr2_cycle_tenths -ffffffff8265d640 r rtw_intr_rx.ratetbl -ffffffff8265d6c0 r abm_config -ffffffff8265d730 r getbootinfo.ports.30 -ffffffff8265d780 r reg_offsets -ffffffff8265d790 r bwi_rf_lo_measure_11g.rf_lo_adjust -ffffffff8265d7a0 r init_non_clock_fields.look_up -ffffffff8265d7b0 r uftdi_8u232am_getrate.roundoff -ffffffff8265d800 r zyd_rx_data.rates -ffffffff8265d810 r ieee80211_ra_valid_tx_mcs.max_mcs -ffffffff8265d850 r mmio_invalidate_full.gen8_regs -ffffffff8265d880 r bwi_phy_noise_11g -ffffffff8265d890 r hpt366_pio -ffffffff8265d8c0 r glk_revids -ffffffff8265d910 r bwi_rf_calc_nrssi_slope_11g.save_phy3_regs -ffffffff8265d930 r ether_crc32_be_update.rev -ffffffff8265d930 r rtw_grf5101_mac_crypt.caesar -ffffffff8265d980 r snb_b_fdi_train_param -ffffffff8265e000 R qlw_switch -ffffffff8265f000 R isp_2100_risc_code -ffffffff82671bf0 R isp_2200_risc_code -ffffffff82684990 R isp_2300_risc_code -ffffffff8269e408 R qla_switch -ffffffff8269e430 r qla_regs_2100 -ffffffff8269e460 r qla_regs_2200 -ffffffff8269e490 r qla_regs_23XX -ffffffff8269f000 R ahci_atascsi_methods -ffffffff826a0000 R nvme_switch -ffffffff826a0028 r nvme_ops -ffffffff826a1000 R mpi_switch -ffffffff826a1100 r intel_hpll_vco.elk_vco -ffffffff826a1160 r pin_offsets -ffffffff826a11c0 r firmware_list -ffffffff826a1220 r atom_arg_shift -ffffffff826a1220 r atom_arg_shift -ffffffff826a1260 r pf_syncookie_wstab -ffffffff826a1280 r ieee80211_media_init.mopts -ffffffff826a12e0 r add_entropy_words.twist_table -ffffffff826a1380 r urtw_8225v2_txpwr_cck -ffffffff826a13a0 r bwfm_pci_prio2fifo -ffffffff826a13a0 r ieee80211_up_to_ac.up_to_ac -ffffffff826a1460 r paritytab -ffffffff826a1460 r x86emu_parity_tab -ffffffff826a1480 r legacy_connector_convert -ffffffff826a14c0 r gen7_oa_mux_regs -ffffffff826a14e0 r hsw_oa_mux_regs -ffffffff826a1500 r notetab -ffffffff826a1520 r urtw_8225v2_txpwr_cck_ch14 -ffffffff826a1540 r bwi_rf_calibval.rf_calibvals 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-ffffffff826a3000 R ncr53c9x_switch -ffffffff826a4000 r scf_period -ffffffff826a5000 R siop_script -ffffffff826a55a0 R lun_switch -ffffffff826a55d0 R tag_switch -ffffffff826a5660 R load_dsa -ffffffff826a56c4 R siop_led_on -ffffffff826a56cc R siop_led_off -ffffffff826a56d8 R siop_switch -ffffffff826a6000 R ep_vortex_media -ffffffff826a6100 R ep_default_to_media -ffffffff826a7000 R wi_card_ident -ffffffff826a9000 R ucode_table -ffffffff826aa000 r re_revisions -ffffffff826aa290 r re_kstats_tpl -ffffffff826ac000 R smc91cxx_media -ffffffff826ac010 R smc91cxx_mii_bitbang_ops -ffffffff826ad000 R dl10019_mii_bitbang_ops -ffffffff826ad028 R dl10022_mii_bitbang_ops -ffffffff826ae000 R ax88190_mii_bitbang_ops -ffffffff826b0000 R ac97_audio_default -ffffffff826b0020 R ac97_on_off -ffffffff826b0324 R ac97_mic_select -ffffffff826b0628 R ac97_mono_select -ffffffff826b092c R ac97_source -ffffffff826b0c30 R ac97_volume_stereo -ffffffff826b0c4c R ac97_volume_mono -ffffffff826b0c70 R source_info -ffffffff826b1470 R ac97_ad -ffffffff826b1580 R ac97_ak -ffffffff826b1610 R ac97_av -ffffffff826b1750 R ac97_rl -ffffffff826b17a0 R ac97_cm -ffffffff826b1820 R ac97_cr -ffffffff826b1840 R ac97_cs -ffffffff826b1920 R ac97_cx -ffffffff826b1980 R ac97_dt -ffffffff826b19a0 R ac97_em -ffffffff826b19d0 R ac97_es -ffffffff826b19f0 R ac97_is -ffffffff826b1a10 R ac97_ic -ffffffff826b1a90 R ac97_it -ffffffff826b1ac0 R ac97_ns -ffffffff826b1b80 R ac97_ps -ffffffff826b1bb0 R ac97_sl -ffffffff826b1bd0 R ac97_st -ffffffff826b1d20 R ac97_vi -ffffffff826b1d50 R ac97_tt -ffffffff826b1dd0 R ac97_ti -ffffffff826b1df0 R ac97_wb -ffffffff826b1e10 R ac97_wo -ffffffff826b1ea0 R ac97_ym -ffffffff826b1ef0 R ac97_vendors -ffffffff826b21f0 R ac97enhancement -ffffffff826b22f0 R ac97feature -ffffffff826b3000 R lm_chips -ffffffff826b3020 R lm78_sensors -ffffffff826b31a0 R w83627hf_sensors -ffffffff826b33a0 R w83627ehf_sensors -ffffffff826b35c0 R w83627dhg_sensors -ffffffff826b37c0 R nct6776f_sensors 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disp_clk_mask -ffffffff82b1d000 r dce112_max_clks_by_state -ffffffff82b1d028 r disp_clk_regs -ffffffff82b1d07c r disp_clk_shift -ffffffff82b1d088 r disp_clk_mask -ffffffff82b1e000 r dce120_max_clks_by_state -ffffffff82b1f000 r clk_mgr_regs -ffffffff82b1f054 r clk_mgr_shift -ffffffff82b1f060 r clk_mgr_mask -ffffffff82b20000 r clk_mgr_regs -ffffffff82b20054 r clk_mgr_shift -ffffffff82b20060 r clk_mgr_mask -ffffffff82b21000 r clk_mgr_regs -ffffffff82b21054 r clk_mgr_shift -ffffffff82b21060 r clk_mgr_mask -ffffffff82b22000 r lpddr5_wm_table -ffffffff82b220c0 r ddr5_wm_table -ffffffff82b23000 r lpddr5_wm_table -ffffffff82b230c0 r ddr5_wm_table -ffffffff82b24000 r lpddr5_wm_table -ffffffff82b240c0 r ddr5_wm_table -ffffffff82b25000 r lpddr5_wm_table -ffffffff82b250c0 r ddr4_wm_table -ffffffff82b26000 r clk_mgr_regs_dcn321 -ffffffff82b26054 r clk_mgr_shift_dcn321 -ffffffff82b26060 r clk_mgr_mask_dcn321 -ffffffff82b26084 r clk_mgr_regs_dcn32 -ffffffff82b260d8 r clk_mgr_shift_dcn32 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dal_irq_service_destroy +ffffffff82230100 T dal_irq_service_set_generic +ffffffff82230180 T dal_irq_service_set +ffffffff822302a0 T dal_irq_service_ack +ffffffff82230390 T dal_irq_service_ack_generic +ffffffff82230400 T dal_irq_service_to_irq_source +ffffffff82231000 T dp_trace_init +ffffffff822310a0 T dp_trace_reset +ffffffff82231130 T dc_dp_trace_is_initialized +ffffffff82231160 T dp_trace_detect_lt_init +ffffffff822311b0 T dp_trace_commit_lt_init +ffffffff82231200 T dp_trace_link_loss_increment +ffffffff82231230 T dp_trace_lt_fail_count_update +ffffffff82231270 T dp_trace_lt_total_count_increment +ffffffff822312b0 T dc_dp_trace_set_is_logged_flag +ffffffff822312f0 T dc_dp_trace_is_logged +ffffffff82231330 T dp_trace_lt_result_update +ffffffff82231370 T dp_trace_set_lt_start_timestamp +ffffffff82231450 T dp_trace_set_lt_end_timestamp +ffffffff82231530 T dc_dp_trace_get_lt_end_timestamp +ffffffff82231570 T dc_dp_trace_get_lt_counts +ffffffff822315b0 T dc_dp_trace_get_link_loss_count +ffffffff822315e0 T dp_trace_set_edp_power_timestamp +ffffffff822316c0 T dp_trace_get_edp_poweron_timestamp +ffffffff822316f0 T dp_trace_get_edp_poweroff_timestamp +ffffffff82232000 T set_dio_throttled_vcp_size +ffffffff82232020 T setup_dio_stream_encoder +ffffffff822320e0 T reset_dio_stream_encoder +ffffffff822321a0 T setup_dio_stream_attribute +ffffffff82232320 T enable_dio_dp_link_output +ffffffff82232390 T disable_dio_link_output +ffffffff822323d0 T set_dio_dp_link_test_pattern +ffffffff82232410 T set_dio_dp_lane_settings +ffffffff82232450 T can_use_dio_link_hwss +ffffffff82232490 T get_dio_link_hwss +ffffffff822324c0 t update_dio_stream_allocation_table +ffffffff82233000 T can_use_dpia_link_hwss +ffffffff82233050 T get_dpia_link_hwss +ffffffff82233080 t update_dpia_stream_allocation_table +ffffffff82234000 T can_use_hpo_dp_link_hwss +ffffffff82234030 T get_hpo_dp_link_hwss +ffffffff82234060 t set_hpo_dp_hblank_min_symbol_width +ffffffff82234130 t set_hpo_dp_throttled_vcp_size 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virtual_link_encoder_update_mst_stream_allocation_table +ffffffff82235240 t virtual_link_encoder_connect_dig_be_to_fe +ffffffff82235270 t virtual_link_encoder_destroy +ffffffff822352c0 t virtual_link_encoder_get_max_link_cap +ffffffff82236000 T virtual_setup_stream_encoder +ffffffff82236030 T virtual_setup_stream_attribute +ffffffff82236060 T virtual_reset_stream_encoder +ffffffff82236090 T get_virtual_link_hwss +ffffffff822360c0 t virtual_disable_link_output +ffffffff82237000 T virtual_stream_encoder_construct +ffffffff82237050 T virtual_stream_encoder_create +ffffffff82237110 t virtual_stream_encoder_dp_set_stream_attribute +ffffffff82237140 t virtual_stream_encoder_hdmi_set_stream_attribute +ffffffff82237170 t virtual_stream_encoder_dvi_set_stream_attribute +ffffffff822371a0 t virtual_stream_encoder_set_throttled_vcp_size +ffffffff822371d0 t virtual_stream_encoder_update_hdmi_info_packets +ffffffff82237200 t virtual_stream_encoder_stop_hdmi_info_packets +ffffffff82237230 t virtual_stream_encoder_update_dp_info_packets +ffffffff82237260 t virtual_stream_encoder_stop_dp_info_packets +ffffffff82237290 t virtual_stream_encoder_dp_blank +ffffffff822372c0 t virtual_stream_encoder_dp_unblank +ffffffff822372f0 t virtual_audio_mute_control +ffffffff82237320 t virtual_setup_stereo_sync +ffffffff82237350 t virtual_stream_encoder_set_avmute +ffffffff82237380 t virtual_dig_connect_to_otg +ffffffff822373b0 t virtual_stream_encoder_reset_hdmi_stream_attribute +ffffffff822373e0 t virtual_stream_encoder_set_dsc_pps_info_packet +ffffffff82237410 t virtual_enc_dp_set_odm_combine +ffffffff82238000 T dmub_dcn20_use_cached_inbox +ffffffff82238040 T dmub_dcn20_reset +ffffffff82238210 T dmub_dcn20_reset_release +ffffffff822382e0 T dmub_dcn20_backdoor_load +ffffffff82238590 T dmub_dcn20_setup_windows +ffffffff82238b00 T dmub_dcn20_setup_mailbox +ffffffff82238b60 T dmub_dcn20_get_inbox1_rptr +ffffffff82238b90 T dmub_dcn20_set_inbox1_wptr +ffffffff82238bc0 T dmub_dcn20_setup_out_mailbox +ffffffff82238c20 T dmub_dcn20_get_outbox1_wptr +ffffffff82238c50 T dmub_dcn20_set_outbox1_rptr +ffffffff82238c80 T dmub_dcn20_setup_outbox0 +ffffffff82238cd0 T dmub_dcn20_get_outbox0_wptr +ffffffff82238d00 T dmub_dcn20_set_outbox0_rptr +ffffffff82238d30 T dmub_dcn20_is_hw_init +ffffffff82238d90 T dmub_dcn20_is_supported +ffffffff82238df0 T dmub_dcn20_set_gpint +ffffffff82238e20 T dmub_dcn20_is_gpint_acked +ffffffff82238e80 T dmub_dcn20_get_gpint_response +ffffffff82238eb0 T dmub_dcn20_get_fw_boot_status +ffffffff82238ee0 T dmub_dcn20_enable_dmub_boot_options +ffffffff82238f10 T dmub_dcn20_skip_dmub_panel_power_sequence +ffffffff82238f70 T dmub_dcn20_get_current_time +ffffffff82238fa0 T dmub_dcn20_get_diagnostic_data +ffffffff8223a000 T dmub_dcn21_is_phy_init +ffffffff8223b000 T dmub_dcn30_backdoor_load +ffffffff8223b260 T dmub_dcn30_setup_windows +ffffffff8223c000 T dmub_dcn31_reset +ffffffff8223c280 T dmub_dcn31_reset_release +ffffffff8223c350 T dmub_dcn31_backdoor_load +ffffffff8223c5b0 T dmub_dcn31_setup_windows +ffffffff8223c8f0 T dmub_dcn31_setup_mailbox +ffffffff8223c940 T dmub_dcn31_get_inbox1_rptr +ffffffff8223c970 T dmub_dcn31_set_inbox1_wptr +ffffffff8223c9a0 T dmub_dcn31_setup_out_mailbox +ffffffff8223c9f0 T dmub_dcn31_get_outbox1_wptr +ffffffff8223ca20 T dmub_dcn31_set_outbox1_rptr +ffffffff8223ca50 T dmub_dcn31_is_hw_init +ffffffff8223cad0 T dmub_dcn31_is_supported +ffffffff8223cb30 T dmub_dcn31_set_gpint +ffffffff8223cb60 T dmub_dcn31_is_gpint_acked +ffffffff8223cbc0 T dmub_dcn31_get_gpint_response +ffffffff8223cbf0 T dmub_dcn31_get_gpint_dataout +ffffffff8223cd10 T dmub_dcn31_get_fw_boot_status +ffffffff8223cd40 T dmub_dcn31_enable_dmub_boot_options +ffffffff8223cdc0 T dmub_dcn31_skip_dmub_panel_power_sequence +ffffffff8223ce20 T dmub_dcn31_setup_outbox0 +ffffffff8223ce70 T dmub_dcn31_get_outbox0_wptr +ffffffff8223cea0 T dmub_dcn31_set_outbox0_rptr +ffffffff8223ced0 T dmub_dcn31_get_current_time +ffffffff8223cf00 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dmub_dcn32_skip_dmub_panel_power_sequence +ffffffff8223ef30 T dmub_dcn32_setup_outbox0 +ffffffff8223ef80 T dmub_dcn32_get_outbox0_wptr +ffffffff8223efb0 T dmub_dcn32_set_outbox0_rptr +ffffffff8223efe0 T dmub_dcn32_get_current_time +ffffffff8223f010 T dmub_dcn32_get_diagnostic_data +ffffffff8223f4b0 T dmub_dcn32_configure_dmub_in_system_memory +ffffffff8223f4e0 T dmub_dcn32_send_inbox0_cmd +ffffffff8223f510 T dmub_dcn32_clear_inbox0_ack_register +ffffffff8223f540 T dmub_dcn32_read_inbox0_ack_register +ffffffff82240000 T dmub_reg_update +ffffffff82240170 T dmub_reg_set +ffffffff822402d0 T dmub_reg_get +ffffffff82241000 T dmub_flush_buffer_mem +ffffffff82241030 T dmub_srv_create +ffffffff82241560 T dmub_srv_destroy +ffffffff82241580 T dmub_srv_calc_region_info +ffffffff822417f0 T dmub_srv_calc_fb_info +ffffffff82241990 T dmub_srv_has_hw_support +ffffffff82241a00 T dmub_srv_is_hw_init +ffffffff82241a80 T dmub_srv_hw_init +ffffffff82241ed0 T dmub_srv_hw_reset +ffffffff82241f60 T dmub_srv_cmd_queue +ffffffff82242070 T dmub_srv_cmd_execute +ffffffff82242130 T dmub_srv_wait_for_auto_load +ffffffff822421d0 T dmub_srv_wait_for_phy_init +ffffffff82242280 T dmub_srv_wait_for_idle +ffffffff82242330 T dmub_srv_send_gpint_command +ffffffff82242420 T dmub_srv_get_gpint_response +ffffffff82242480 T dmub_srv_get_gpint_dataout +ffffffff822424e0 T dmub_srv_get_fw_boot_status +ffffffff82242550 T dmub_srv_cmd_with_reply_data +ffffffff822427c0 T dmub_srv_get_outbox0_msg +ffffffff82242860 T dmub_srv_get_diagnostic_data +ffffffff822428c0 T dmub_srv_should_detect +ffffffff82242910 T dmub_srv_clear_inbox0_ack +ffffffff82242960 T dmub_srv_wait_for_inbox0_ack +ffffffff822429f0 T dmub_srv_send_inbox0_cmd +ffffffff82243000 T dmub_srv_stat_get_notification +ffffffff82244000 T setup_x_points_distribution +ffffffff82244170 T log_x_points_distribution +ffffffff822441a0 T precompute_pq +ffffffff82244370 t compute_pq +ffffffff82244580 T precompute_de_pq +ffffffff822446e0 t compute_de_pq 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+ffffffff8224b200 T mod_freesync_build_vrr_infopacket +ffffffff8224b950 T mod_freesync_build_vrr_params +ffffffff8224bcd0 T mod_freesync_calc_nominal_field_rate +ffffffff8224bd30 T mod_freesync_handle_preflip +ffffffff8224c150 T mod_freesync_handle_v_update +ffffffff8224c610 T mod_freesync_get_settings +ffffffff8224c680 T mod_freesync_calc_field_rate_from_timing +ffffffff8224c6d0 T mod_freesync_get_freesync_enabled +ffffffff8224c700 T mod_freesync_is_valid_range +ffffffff8224d000 T mod_build_vsc_infopacket +ffffffff8224d200 T mod_build_hf_vsif_infopacket +ffffffff8224e000 T dmub_init_abm_config +ffffffff8224e540 t fill_iram_v_2_3 +ffffffff8224e9a0 T dmcu_load_iram +ffffffff8224f180 T is_psr_su_specific_panel +ffffffff8224f210 T mod_power_calc_psr_configs +ffffffff8224f310 T mod_power_only_edp +ffffffff82250000 T mod_vmid_get_for_ptb +ffffffff82250230 T mod_vmid_reset +ffffffff822502f0 T mod_vmid_create +ffffffff82250430 T mod_vmid_destroy +ffffffff82251000 T amdgpu_dpm_get_sclk +ffffffff82251090 T amdgpu_dpm_get_mclk +ffffffff82251120 T amdgpu_dpm_set_powergating_by_smu +ffffffff82251200 T amdgpu_dpm_set_gfx_power_up_by_imu +ffffffff82251310 T amdgpu_dpm_baco_enter +ffffffff822513a0 T amdgpu_dpm_baco_exit +ffffffff82251430 T amdgpu_dpm_set_mp1_state +ffffffff822514d0 T amdgpu_dpm_is_baco_supported +ffffffff82251580 T amdgpu_dpm_mode2_reset +ffffffff82251610 T amdgpu_dpm_baco_reset +ffffffff822516c0 T amdgpu_dpm_is_mode1_reset_supported +ffffffff82251730 T amdgpu_dpm_mode1_reset +ffffffff822517b0 T amdgpu_dpm_switch_power_profile +ffffffff82251860 T amdgpu_dpm_set_xgmi_pstate +ffffffff82251900 T amdgpu_dpm_set_df_cstate +ffffffff822519a0 T amdgpu_dpm_allow_xgmi_power_down +ffffffff82251a20 T amdgpu_dpm_enable_mgpu_fan_boost +ffffffff82251ab0 T amdgpu_dpm_set_clockgating_by_smu +ffffffff82251b50 T amdgpu_dpm_smu_i2c_bus_access +ffffffff82251bf0 T amdgpu_pm_acpi_event_handler +ffffffff82251cb0 T amdgpu_dpm_read_sensor +ffffffff82251d70 T amdgpu_dpm_compute_clocks +ffffffff82251e50 T amdgpu_dpm_enable_uvd +ffffffff82252040 T amdgpu_dpm_enable_vce +ffffffff82252230 T amdgpu_dpm_enable_jpeg +ffffffff82252330 T amdgpu_pm_load_smu_firmware +ffffffff822523e0 T amdgpu_dpm_handle_passthrough_sbr +ffffffff82252460 T amdgpu_dpm_send_hbm_bad_pages_num +ffffffff822524e0 T amdgpu_dpm_send_hbm_bad_channel_flag +ffffffff82252560 T amdgpu_dpm_get_dpm_freq_range +ffffffff82252600 T amdgpu_dpm_set_soft_freq_range +ffffffff822526a0 T amdgpu_dpm_write_watermarks_table +ffffffff82252720 T amdgpu_dpm_wait_for_event +ffffffff822527b0 T amdgpu_dpm_set_residency_gfxoff +ffffffff82252830 T amdgpu_dpm_get_residency_gfxoff +ffffffff822528b0 T amdgpu_dpm_get_entrycount_gfxoff +ffffffff82252930 T amdgpu_dpm_get_status_gfxoff +ffffffff822529b0 T amdgpu_dpm_get_thermal_throttling_counter +ffffffff82252a00 T amdgpu_dpm_gfx_state_change +ffffffff82252a70 T amdgpu_dpm_get_ecc_info +ffffffff82252af0 T amdgpu_dpm_get_vce_clock_state +ffffffff82252b80 T amdgpu_dpm_get_current_power_state +ffffffff82252bf0 T amdgpu_dpm_set_power_state +ffffffff82252d50 T amdgpu_dpm_dispatch_task +ffffffff82252df0 T amdgpu_dpm_get_performance_level +ffffffff82252e80 T amdgpu_dpm_force_performance_level +ffffffff82253060 T amdgpu_dpm_get_pp_num_states +ffffffff822530f0 T amdgpu_dpm_get_pp_table +ffffffff82253180 T amdgpu_dpm_set_fine_grain_clk_vol +ffffffff82253220 T amdgpu_dpm_odn_edit_dpm_table +ffffffff822532c0 T amdgpu_dpm_print_clock_levels +ffffffff82253350 T amdgpu_dpm_emit_clock_levels +ffffffff822533f0 T amdgpu_dpm_set_ppfeature_status +ffffffff82253480 T amdgpu_dpm_get_ppfeature_status +ffffffff82253510 T amdgpu_dpm_force_clock_level +ffffffff822535a0 T amdgpu_dpm_get_sclk_od +ffffffff82253620 T amdgpu_dpm_set_sclk_od +ffffffff822537a0 T amdgpu_dpm_get_mclk_od +ffffffff82253820 T amdgpu_dpm_set_mclk_od +ffffffff822539a0 T amdgpu_dpm_get_power_profile_mode +ffffffff82253a30 T amdgpu_dpm_set_power_profile_mode +ffffffff82253ad0 T amdgpu_dpm_get_gpu_metrics +ffffffff82253b60 T amdgpu_dpm_get_fan_control_mode +ffffffff82253bf0 T amdgpu_dpm_set_fan_speed_pwm +ffffffff82253c80 T amdgpu_dpm_get_fan_speed_pwm +ffffffff82253d10 T amdgpu_dpm_get_fan_speed_rpm +ffffffff82253da0 T amdgpu_dpm_set_fan_speed_rpm +ffffffff82253e30 T amdgpu_dpm_set_fan_control_mode +ffffffff82253ec0 T amdgpu_dpm_get_power_limit +ffffffff82253f70 T amdgpu_dpm_set_power_limit +ffffffff82254000 T amdgpu_dpm_is_cclk_dpm_supported +ffffffff82254070 T amdgpu_dpm_debugfs_print_current_performance_level +ffffffff82254100 T amdgpu_dpm_get_smu_prv_buf_details +ffffffff822541a0 T amdgpu_dpm_is_overdrive_supported +ffffffff82254240 T amdgpu_dpm_set_pp_table +ffffffff822542e0 T amdgpu_dpm_get_num_cpu_cores +ffffffff82254330 T amdgpu_dpm_stb_debug_fs_init +ffffffff82254380 T amdgpu_dpm_display_configuration_change +ffffffff82254410 T amdgpu_dpm_get_clock_by_type +ffffffff822544b0 T amdgpu_dpm_get_display_mode_validation_clks +ffffffff82254540 T amdgpu_dpm_get_clock_by_type_with_latency +ffffffff822545e0 T amdgpu_dpm_get_clock_by_type_with_voltage +ffffffff82254680 T amdgpu_dpm_set_watermarks_for_clocks_ranges +ffffffff82254710 T amdgpu_dpm_display_clock_voltage_request +ffffffff822547a0 T amdgpu_dpm_get_current_clocks +ffffffff82254830 T amdgpu_dpm_notify_smu_enable_pwe +ffffffff822548b0 T amdgpu_dpm_set_active_display_count +ffffffff82254940 T amdgpu_dpm_set_min_deep_sleep_dcefclk +ffffffff822549d0 T amdgpu_dpm_set_hard_min_dcefclk_by_freq +ffffffff82254a70 T amdgpu_dpm_set_hard_min_fclk_by_freq +ffffffff82254b10 T amdgpu_dpm_display_disable_memory_clock_switch +ffffffff82254ba0 T amdgpu_dpm_get_max_sustainable_clocks_by_dc +ffffffff82254c30 T amdgpu_dpm_get_uclk_dpm_states +ffffffff82254cd0 T amdgpu_dpm_get_dpm_clock_table +ffffffff82255000 T amdgpu_dpm_get_active_displays +ffffffff822550a0 T amdgpu_dpm_get_vblank_time +ffffffff82255150 T amdgpu_dpm_get_vrefresh +ffffffff82256000 T amdgpu_pm_sysfs_init +ffffffff82256030 T amdgpu_pm_sysfs_fini +ffffffff82256060 T amdgpu_debugfs_pm_init +ffffffff82257000 T amdgpu_dpm_print_class_info +ffffffff822572b0 T amdgpu_dpm_print_cap_info +ffffffff82257340 T amdgpu_dpm_print_ps_status +ffffffff822573d0 T amdgpu_pm_print_power_states +ffffffff82257490 T amdgpu_get_platform_caps +ffffffff82257530 T amdgpu_parse_extended_power_table +ffffffff82258540 T amdgpu_free_extended_power_table +ffffffff82258650 T amdgpu_add_thermal_controller +ffffffff82258a80 T amdgpu_get_vce_clock_state +ffffffff82258ac0 T amdgpu_legacy_dpm_compute_clocks +ffffffff82258f30 T amdgpu_dpm_thermal_work_handler +ffffffff8225a000 t pp_early_init +ffffffff8225a100 t pp_late_init +ffffffff8225a220 t pp_sw_init +ffffffff8225a240 t pp_sw_fini +ffffffff8225a2d0 t pp_hw_init +ffffffff8225a330 t pp_hw_fini +ffffffff8225a370 t pp_late_fini +ffffffff8225a3d0 t pp_suspend +ffffffff8225a3f0 t pp_resume +ffffffff8225a410 t pp_is_idle +ffffffff8225a440 t pp_wait_for_idle +ffffffff8225a470 t pp_sw_reset +ffffffff8225a4a0 t pp_set_clockgating_state +ffffffff8225a4d0 t pp_set_powergating_state +ffffffff8225a500 t pp_dpm_set_fan_control_mode +ffffffff8225a570 t pp_dpm_get_fan_control_mode +ffffffff8225a5e0 t pp_dpm_set_fan_speed_pwm +ffffffff8225a640 t pp_dpm_get_fan_speed_pwm +ffffffff8225a6a0 t pp_dpm_force_clock_level +ffffffff8225a700 t pp_dpm_print_clock_levels +ffffffff8225a760 t pp_dpm_emit_clock_levels +ffffffff8225a7c0 t pp_dpm_force_performance_level +ffffffff8225a860 t pp_dpm_get_sclk_od +ffffffff8225a8c0 t pp_dpm_set_sclk_od +ffffffff8225a920 t pp_dpm_get_mclk_od +ffffffff8225a980 t pp_dpm_set_mclk_od +ffffffff8225a9e0 t pp_dpm_read_sensor +ffffffff8225aa80 t pp_dpm_get_performance_level +ffffffff8225aac0 t pp_dpm_get_current_power_state +ffffffff8225ab40 t pp_dpm_get_fan_speed_rpm +ffffffff8225aba0 t pp_dpm_set_fan_speed_rpm +ffffffff8225ac00 t pp_dpm_get_pp_num_states +ffffffff8225ad40 t pp_dpm_get_pp_table +ffffffff8225ad90 t pp_dpm_set_pp_table +ffffffff8225aec0 t pp_dpm_switch_power_profile +ffffffff8225b000 t pp_dpm_get_vce_clock_state +ffffffff8225b050 t pp_dpm_dispatch_tasks +ffffffff8225b090 t pp_dpm_load_fw +ffffffff8225b100 t pp_dpm_fw_loading_complete +ffffffff8225b130 t pp_set_powergating_by_smu +ffffffff8225b2b0 t pp_set_clockgating_by_smu +ffffffff8225b320 t pp_set_power_limit +ffffffff8225b3e0 t pp_get_power_limit +ffffffff8225b480 t pp_get_power_profile_mode +ffffffff8225b4e0 t pp_set_power_profile_mode +ffffffff8225b540 t pp_set_fine_grain_clk_vol +ffffffff8225b5a0 t pp_odn_edit_dpm_table +ffffffff8225b600 t pp_dpm_set_mp1_state +ffffffff8225b660 t pp_smu_i2c_bus_access +ffffffff8225b6c0 t pp_gfx_state_change_set +ffffffff8225b720 t pp_dpm_get_sclk +ffffffff8225b770 t pp_dpm_get_mclk +ffffffff8225b7c0 t pp_display_configuration_change +ffffffff8225b810 t pp_get_display_power_level +ffffffff8225b850 t pp_get_current_clocks +ffffffff8225b970 t pp_get_clock_by_type +ffffffff8225b9c0 t pp_get_clock_by_type_with_latency +ffffffff8225ba10 t pp_get_clock_by_type_with_voltage +ffffffff8225ba60 t pp_set_watermarks_for_clocks_ranges +ffffffff8225baa0 t pp_display_clock_voltage_request +ffffffff8225bae0 t pp_get_display_mode_validation_clocks +ffffffff8225bb40 t pp_notify_smu_enable_pwe +ffffffff8225bba0 t pp_enable_mgpu_fan_boost +ffffffff8225bc00 t pp_set_active_display_count +ffffffff8225bc40 t pp_set_hard_min_dcefclk_by_freq +ffffffff8225bca0 t pp_set_hard_min_fclk_by_freq +ffffffff8225bd00 t pp_set_min_deep_sleep_dcefclk +ffffffff8225bd60 t pp_get_asic_baco_capability +ffffffff8225bdd0 t pp_get_asic_baco_state +ffffffff8225be30 t pp_set_asic_baco_state +ffffffff8225bea0 t pp_get_ppfeature_status +ffffffff8225bf00 t pp_set_ppfeature_status +ffffffff8225bf50 t pp_asic_reset_mode_2 +ffffffff8225bfb0 t pp_set_df_cstate +ffffffff8225c010 t pp_set_xgmi_pstate +ffffffff8225c070 t pp_get_gpu_metrics +ffffffff8225c0d0 t pp_get_prv_buffer_details +ffffffff8225c150 t pp_pm_compute_clocks +ffffffff8225d000 T ci_baco_set_state +ffffffff8225e000 T baco_program_registers +ffffffff8225e0d0 t baco_cmd_handler +ffffffff8225e250 T soc15_baco_program_registers +ffffffff8225f000 T fiji_baco_set_state +ffffffff82260000 T phm_setup_asic +ffffffff82260050 T phm_power_down_asic +ffffffff822600a0 T phm_set_power_state +ffffffff82260110 T phm_enable_dynamic_state_management +ffffffff822601c0 T phm_disable_dynamic_state_management +ffffffff82260260 T phm_force_dpm_levels +ffffffff822602b0 T phm_apply_state_adjust_rules +ffffffff82260300 T phm_apply_clock_adjust_rules +ffffffff82260350 T phm_powerdown_uvd +ffffffff822603a0 T phm_disable_clock_power_gatings +ffffffff822603f0 T phm_pre_display_configuration_changed +ffffffff82260450 T phm_display_configuration_changed +ffffffff822604b0 T phm_notify_smc_display_config_after_ps_adjustment +ffffffff82260510 T phm_stop_thermal_controller +ffffffff82260570 T phm_register_irq_handlers +ffffffff822605c0 T phm_start_thermal_controller +ffffffff82260700 T phm_check_smc_update_required_for_display_configuration +ffffffff82260760 T phm_check_states_equal +ffffffff822607b0 T phm_store_dal_configuration_data +ffffffff82260900 T phm_get_dal_power_level +ffffffff82260960 T phm_set_cpu_power_state +ffffffff822609b0 T phm_get_performance_level +ffffffff82260a10 T phm_get_clock_info +ffffffff82260b90 T phm_get_current_shallow_sleep_clocks +ffffffff82260be0 T phm_get_clock_by_type +ffffffff82260c30 T phm_get_clock_by_type_with_latency +ffffffff82260c80 T phm_get_clock_by_type_with_voltage +ffffffff82260cd0 T phm_set_watermarks_for_clocks_ranges +ffffffff82260d20 T phm_display_clock_voltage_request +ffffffff82260d70 T phm_get_max_high_clocks +ffffffff82260dc0 T phm_disable_smc_firmware_ctf +ffffffff82260e20 T phm_set_active_display_count +ffffffff82261000 T hwmgr_early_init +ffffffff82261470 T hwmgr_sw_init +ffffffff822614e0 T hwmgr_sw_fini +ffffffff82261530 T hwmgr_hw_init +ffffffff822616f0 T hwmgr_hw_fini +ffffffff822617b0 T hwmgr_suspend +ffffffff82261830 T hwmgr_resume +ffffffff822618d0 T hwmgr_handle_task +ffffffff82262000 T polaris_baco_set_state +ffffffff82263000 T pp_override_get_default_fuse_value +ffffffff82264000 T psm_init_power_state_table +ffffffff822642a0 T psm_fini_power_state_table +ffffffff82264360 T psm_set_boot_states +ffffffff82264420 T psm_set_performance_states +ffffffff822644e0 T psm_set_user_performance_state +ffffffff82264580 T psm_adjust_power_state_dynamic +ffffffff82265000 T atomctrl_initialize_mc_reg_table +ffffffff82265210 T atomctrl_initialize_mc_reg_table_v2_2 +ffffffff82265420 T atomctrl_set_engine_dram_timings_rv770 +ffffffff82265490 T atomctrl_get_memory_pll_dividers_si +ffffffff82265570 T atomctrl_get_memory_pll_dividers_vi +ffffffff822655f0 T atomctrl_get_memory_pll_dividers_ai +ffffffff822656a0 T atomctrl_get_engine_pll_dividers_kong +ffffffff82265720 T atomctrl_get_engine_pll_dividers_vi +ffffffff822657e0 T atomctrl_get_engine_pll_dividers_ai +ffffffff822658c0 T atomctrl_get_dfs_pll_dividers_vi +ffffffff82265980 T atomctrl_get_reference_clock +ffffffff822659e0 T atomctrl_is_voltage_controlled_by_gpio_v3 +ffffffff82265aa0 T atomctrl_get_voltage_table_v3 +ffffffff82265c00 T atomctrl_get_pp_assign_pin +ffffffff82265cf0 T atomctrl_calculate_voltage_evv_on_sclk +ffffffff82266070 T atomctrl_get_voltage_evv_on_sclk +ffffffff822660f0 T atomctrl_get_voltage_evv +ffffffff822661a0 T atomctrl_get_mpll_reference_clock +ffffffff82266210 T atomctrl_is_asic_internal_ss_supported +ffffffff82266260 T atomctrl_get_memory_clock_spread_spectrum +ffffffff82266360 T atomctrl_get_engine_clock_spread_spectrum +ffffffff82266460 T atomctrl_read_efuse +ffffffff82266510 T atomctrl_set_ac_timing_ai +ffffffff82266570 T atomctrl_get_voltage_evv_on_sclk_ai +ffffffff822665f0 T atomctrl_get_smc_sclk_range_table +ffffffff822666b0 T atomctrl_get_vddc_shared_railinfo +ffffffff82266720 T atomctrl_get_avfs_information +ffffffff822668a0 T atomctrl_get_svi2_info +ffffffff82266980 T atomctrl_get_leakage_id_from_efuse +ffffffff822669e0 T atomctrl_get_leakage_vddc_base_on_leakage +ffffffff82266b80 T atomctrl_get_voltage_range +ffffffff82266c40 T atomctrl_get_edc_hilo_leakage_offset_table +ffffffff82266cc0 T atomctrl_get_edc_leakage_table +ffffffff82267000 T pp_atomfwctrl_is_voltage_controlled_by_gpio_v4 +ffffffff822670d0 T pp_atomfwctrl_get_voltage_table_v4 +ffffffff82267290 T pp_atomfwctrl_get_pp_assign_pin +ffffffff82267370 T pp_atomfwctrl_enter_self_refresh +ffffffff822673a0 T pp_atomfwctrl_get_gpu_pll_dividers_vega10 +ffffffff82267450 T pp_atomfwctrl_get_avfs_information +ffffffff82267780 T pp_atomfwctrl_get_gpio_information +ffffffff82267820 T pp_atomfwctrl_get_clk_information_by_clkid +ffffffff822678a0 T pp_atomfwctrl_get_vbios_bootup_values +ffffffff82267c20 T pp_atomfwctrl_get_smc_dpm_information +ffffffff82268000 T encode_pcie_lane_width +ffffffff82268030 T decode_pcie_lane_width +ffffffff82269000 t pp_tables_v1_0_initialize +ffffffff8226a430 t pp_tables_v1_0_uninitialize +ffffffff8226a5e0 T get_number_of_powerplay_table_entries_v1_0 +ffffffff8226a690 T get_powerplay_table_entry_v1_0 +ffffffff8226b000 T pp_tables_get_response_times +ffffffff8226b0d0 T pp_tables_get_num_of_entries +ffffffff8226b190 T pp_tables_get_entry +ffffffff8226b4f0 t init_non_clock_fields +ffffffff8226b670 t pp_tables_initialize +ffffffff8226cad0 t pp_tables_uninitialize +ffffffff8226ccd0 t get_number_of_vce_state_table_entries +ffffffff8226cdd0 t get_vce_state_table_entry +ffffffff8226d000 T smu10_init_function_pointers +ffffffff8226d040 t smu10_hwmgr_backend_init +ffffffff8226d710 t smu10_hwmgr_backend_fini +ffffffff8226d850 t smu10_setup_asic_task +ffffffff8226d8c0 t smu10_get_power_state_size +ffffffff8226d8f0 t smu10_apply_state_adjust_rules +ffffffff8226d920 t smu10_dpm_force_dpm_level +ffffffff8226dea0 t smu10_enable_dpm_tasks +ffffffff8226df20 t smu10_disable_dpm_tasks +ffffffff8226df50 t smu10_dpm_patch_boot_state +ffffffff8226df80 t smu10_dpm_get_pp_table_entry +ffffffff8226dfe0 t smu10_dpm_get_num_of_pp_table_entries +ffffffff8226e030 t smu10_powergate_vcn +ffffffff8226e0d0 t smu10_dpm_get_mclk +ffffffff8226e130 t smu10_dpm_get_sclk +ffffffff8226e180 t smu10_set_power_state_tasks +ffffffff8226e1f0 t smu10_set_cpu_power_state +ffffffff8226e220 t smu10_store_cc6_data +ffffffff8226e290 t smu10_get_dal_power_level +ffffffff8226e2c0 t smu10_get_performance_level +ffffffff8226e350 t smu10_get_current_shallow_sleep_clocks +ffffffff8226e3b0 t smu10_get_clock_by_type_with_latency +ffffffff8226e500 t smu10_get_clock_by_type_with_voltage +ffffffff8226e610 t smu10_set_watermarks_for_clocks_ranges +ffffffff8226e6e0 t smu10_display_clock_voltage_request +ffffffff8226e780 t smu10_get_max_high_clocks +ffffffff8226e7b0 t smu10_power_off_asic +ffffffff8226e800 t smu10_force_clock_level +ffffffff8226e9c0 t smu10_print_clock_levels +ffffffff8226ed60 t smu10_gfx_off_control +ffffffff8226ee70 t smu10_read_sensor +ffffffff8226eff0 t smu10_set_active_display_count +ffffffff8226f050 t smu10_set_min_deep_sleep_dcefclk +ffffffff8226f0b0 t smu10_get_power_profile_mode +ffffffff8226f0f0 t smu10_set_power_profile_mode +ffffffff8226f240 t smu10_set_fine_grain_clk_vol +ffffffff8226f450 t smu10_powergate_mmhub +ffffffff8226f470 t smu10_smus_notify_pwe +ffffffff8226f490 t smu10_powergate_sdma +ffffffff8226f4b0 t smu10_set_hard_min_dcefclk_by_freq +ffffffff8226f510 t smu10_set_hard_min_fclk_by_freq +ffffffff8226f570 t smu10_set_hard_min_gfxclk_by_freq +ffffffff8226f5d0 t smu10_set_soft_max_gfxclk_by_freq +ffffffff8226f630 t smu10_asic_reset +ffffffff8226f650 t smu10_gfx_state_change +ffffffff8226f690 t smu10_dpm_get_pp_table_entry_callback +ffffffff82270000 T smu7_baco_get_capability +ffffffff82270060 T smu7_baco_get_state +ffffffff822700b0 T smu7_baco_set_state +ffffffff82271000 T smu7_powerdown_uvd +ffffffff82271050 T smu7_disable_clock_power_gating +ffffffff822710e0 T smu7_powergate_uvd +ffffffff822711d0 T smu7_powergate_vce +ffffffff822712c0 T smu7_update_clock_gatings +ffffffff82271670 T smu7_powergate_gfx +ffffffff82272000 T smu7_get_sleep_divider_id_from_clock +ffffffff822720a0 T smu7_init_function_pointers +ffffffff82272100 t smu7_hwmgr_backend_init +ffffffff82273f50 t smu7_hwmgr_backend_fini +ffffffff82273fc0 t smu7_setup_asic_task +ffffffff82274330 t smu7_get_power_state_size +ffffffff82274360 t smu7_apply_state_adjust_rules +ffffffff822747e0 t smu7_force_dpm_level +ffffffff82274c10 t smu7_enable_dpm_tasks +ffffffff82277380 t smu7_disable_dpm_tasks +ffffffff82277ac0 t smu7_dpm_patch_boot_state +ffffffff82277c00 t smu7_get_pp_table_entry +ffffffff82278000 t smu7_get_number_of_powerplay_table_entries +ffffffff82278070 t smu7_dpm_get_mclk +ffffffff82278110 t smu7_dpm_get_sclk +ffffffff822781b0 t smu7_set_power_state_tasks +ffffffff82278f40 t smu7_notify_smc_display_config_after_ps_adjustment +ffffffff82278f70 t smu7_display_configuration_changed_task +ffffffff82279130 t smu7_set_max_fan_rpm_output +ffffffff82279160 t smu7_set_max_fan_pwm_output +ffffffff82279180 t smu7_set_fan_control_mode +ffffffff82279210 t smu7_get_fan_control_mode +ffffffff82279250 t smu7_register_irq_handlers +ffffffff82279300 t smu7_check_smc_update_required_for_display_configuration +ffffffff822793c0 t smu7_check_states_equal +ffffffff82279560 t smu7_get_performance_level +ffffffff82279600 t smu7_get_clock_by_type +ffffffff822797c0 t smu7_get_clock_by_type_with_latency +ffffffff82279960 t smu7_set_watermarks_for_clocks_ranges +ffffffff82279ba0 t smu7_get_max_high_clocks +ffffffff82279c20 t smu7_power_off_asic +ffffffff82279c80 t smu7_force_clock_level +ffffffff82279d90 t smu7_print_clock_levels +ffffffff8227a370 t smu7_get_sclk_od +ffffffff8227a3e0 t smu7_set_sclk_od +ffffffff8227a4a0 t smu7_get_mclk_od +ffffffff8227a510 t smu7_set_mclk_od +ffffffff8227a5d0 t smu7_read_sensor +ffffffff8227a8a0 t smu7_avfs_control +ffffffff8227a970 t smu7_notify_cac_buffer_info +ffffffff8227ab10 t smu7_get_thermal_temperature_range +ffffffff8227aba0 t smu7_get_power_profile_mode +ffffffff8227abe0 t smu7_set_power_profile_mode +ffffffff8227ae40 t smu7_odn_edit_dpm_table +ffffffff8227aff0 t phm_add_voltage +ffffffff8227b100 t smu7_get_profiling_clk +ffffffff8227b2c0 t smu7_check_dpm_table_updated +ffffffff8227b410 t smu7_odn_initial_default_setting +ffffffff8227b540 t smu7_set_dpm_event_sources +ffffffff8227b660 t smu7_get_pp_table_entry_callback_func_v0 +ffffffff8227bb60 t smu7_get_pp_table_entry_callback_func_v1 +ffffffff8227d000 T smu7_enable_didt_config +ffffffff8227d3c0 t smu7_program_pt_config_registers +ffffffff8227d5b0 t smu7_enable_didt +ffffffff8227d7a0 T smu7_disable_didt_config +ffffffff8227d860 T smu7_enable_smc_cac +ffffffff8227d8f0 T smu7_disable_smc_cac +ffffffff8227d980 T smu7_set_power_limit +ffffffff8227d9e0 T smu7_enable_power_containment +ffffffff8227db70 T smu7_disable_power_containment +ffffffff8227dc90 T smu7_power_control_set_level +ffffffff8227e000 T smu7_fan_ctrl_get_fan_speed_info +ffffffff8227e080 T smu7_fan_ctrl_get_fan_speed_pwm +ffffffff8227e140 T smu7_fan_ctrl_get_fan_speed_rpm +ffffffff8227e1f0 T smu7_fan_ctrl_set_static_mode +ffffffff8227e320 T smu7_fan_ctrl_set_default_mode +ffffffff8227e400 T smu7_fan_ctrl_start_smc_fan_control +ffffffff8227e530 T smu7_fan_ctrl_stop_smc_fan_control +ffffffff8227e550 T smu7_fan_ctrl_set_fan_speed_pwm +ffffffff8227e740 T smu7_fan_ctrl_reset_fan_speed_to_default +ffffffff8227e930 T smu7_fan_ctrl_set_fan_speed_rpm +ffffffff8227eb10 T smu7_thermal_get_temperature +ffffffff8227eb70 T smu7_thermal_disable_alert +ffffffff8227ec10 T smu7_thermal_stop_thermal_controller +ffffffff8227ed90 T smu7_start_thermal_controller +ffffffff8227f140 T smu7_thermal_ctrl_uninitialize_thermal_controller +ffffffff82280000 T smu8_init_function_pointers +ffffffff82280040 t smu8_hwmgr_backend_init +ffffffff82280520 t smu8_hwmgr_backend_fini +ffffffff822805a0 t smu8_setup_asic_task +ffffffff82280ac0 t smu8_get_power_state_size +ffffffff82280af0 t smu8_apply_state_adjust_rules +ffffffff82280c40 t smu8_dpm_force_dpm_level +ffffffff82280f40 t smu8_enable_dpm_tasks +ffffffff82281090 t smu8_disable_dpm_tasks +ffffffff82281170 t smu8_dpm_patch_boot_state +ffffffff822811d0 t smu8_dpm_get_pp_table_entry +ffffffff82281230 t smu8_dpm_get_num_of_pp_table_entries +ffffffff82281280 t smu8_dpm_powerdown_uvd +ffffffff822812d0 t smu8_dpm_powergate_vce +ffffffff822814a0 t smu8_dpm_powergate_uvd +ffffffff822816d0 t smu8_dpm_powergate_acp +ffffffff82281730 t smu8_dpm_get_mclk +ffffffff82281760 t smu8_dpm_get_sclk +ffffffff822817d0 t smu8_set_power_state_tasks +ffffffff82281b20 t smu8_set_cpu_power_state +ffffffff82281ba0 t smu8_store_cc6_data +ffffffff82281c20 t smu8_get_dal_power_level +ffffffff82281ca0 t smu8_get_performance_level +ffffffff82281d90 t smu8_get_current_shallow_sleep_clocks +ffffffff82281df0 t smu8_get_clock_by_type +ffffffff82281f30 t smu8_get_max_high_clocks +ffffffff82281ff0 t smu8_power_off_asic +ffffffff82282070 t smu8_force_clock_level +ffffffff822820e0 t smu8_print_clock_levels +ffffffff822822b0 t smu8_read_sensor +ffffffff822825b0 t smu8_notify_cac_buffer_info +ffffffff82282660 t smu8_get_thermal_temperature_range +ffffffff822826e0 t smu8_dpm_get_pp_table_entry_callback +ffffffff82283000 T smu9_baco_get_capability +ffffffff822830d0 T smu9_baco_get_state +ffffffff82284000 T convert_to_vid +ffffffff82284050 T convert_to_vddc +ffffffff822840a0 T phm_copy_clock_limits_array +ffffffff82284180 T phm_copy_overdrive_settings_limits_array +ffffffff82284260 T phm_set_field_to_u32 +ffffffff822842c0 T phm_wait_on_register +ffffffff822843d0 T phm_wait_on_indirect_register +ffffffff82284500 T phm_wait_for_register_unequal +ffffffff82284600 T phm_wait_for_indirect_register_unequal +ffffffff82284730 T phm_cf_want_uvd_power_gating +ffffffff82284770 T phm_cf_want_vce_power_gating +ffffffff822847b0 T phm_trim_voltage_table +ffffffff822848e0 T phm_get_svi2_mvdd_voltage_table +ffffffff82284a70 T phm_get_svi2_vddci_voltage_table +ffffffff82284c00 T phm_get_svi2_vdd_voltage_table +ffffffff82284ca0 T phm_trim_voltage_table_to_fit_state_table +ffffffff82284d80 T phm_reset_single_dpm_table +ffffffff82284e50 T phm_setup_pcie_table_entry +ffffffff82284e90 T phm_get_dpm_level_enable_mask_value +ffffffff82284fb0 T phm_get_voltage_index +ffffffff82285030 T phm_get_voltage_id +ffffffff822850b0 T phm_find_closest_vddci +ffffffff82285110 T phm_find_boot_level +ffffffff82285180 T phm_get_sclk_for_voltage_evv +ffffffff82285230 T phm_initializa_dynamic_state_adjustment_rule_settings +ffffffff82285340 T phm_get_lowest_enabled_level +ffffffff82285380 T phm_apply_dal_min_voltage_request +ffffffff82285450 T phm_get_voltage_evv_on_sclk +ffffffff82285500 T phm_irq_process +ffffffff82285700 t orderly_poweroff +ffffffff82285710 T smu9_register_irq_handlers +ffffffff822857c0 T smu_atom_get_data_table +ffffffff82285830 T smu_get_voltage_dependency_table_ppt_v1 +ffffffff82285910 T smu_set_watermarks_for_clocks_ranges +ffffffff82286000 T tonga_baco_set_state +ffffffff82287000 T vega10_baco_set_state +ffffffff82288000 T vega10_enable_disable_vce_dpm +ffffffff82288090 T vega10_hwmgr_init +ffffffff822880f0 t vega10_hwmgr_backend_init +ffffffff82288ef0 t vega10_hwmgr_backend_fini +ffffffff82288f60 t vega10_setup_asic_task +ffffffff82289090 t vega10_get_power_state_size +ffffffff822890c0 t vega10_apply_state_adjust_rules +ffffffff82289450 t vega10_dpm_force_dpm_level +ffffffff82289980 t vega10_enable_dpm_tasks +ffffffff8228c2f0 t vega10_disable_dpm_tasks +ffffffff8228c8d0 t vega10_patch_boot_state +ffffffff8228c900 t vega10_get_pp_table_entry +ffffffff8228c970 t vega10_power_gate_vce +ffffffff8228ca10 t vega10_power_gate_uvd +ffffffff8228cab0 t vega10_dpm_get_mclk +ffffffff8228cb50 t vega10_dpm_get_sclk +ffffffff8228cbf0 t vega10_set_power_state_tasks +ffffffff8228d680 t vega10_notify_smc_display_config_after_ps_adjustment +ffffffff8228d830 t vega10_display_configuration_changed_task +ffffffff8228d900 t vega10_set_fan_control_mode +ffffffff8228d970 t vega10_get_fan_control_mode +ffffffff8228d9b0 t vega10_check_smc_update_required_for_display_configuration +ffffffff8228da10 t vega10_check_states_equal +ffffffff8228db70 t vega10_get_dal_power_level +ffffffff8228dbb0 t vega10_get_performance_level +ffffffff8228dc50 t vega10_get_clock_by_type_with_latency +ffffffff8228de80 t vega10_get_clock_by_type_with_voltage +ffffffff8228df60 t vega10_set_watermarks_for_clocks_ranges +ffffffff8228dfc0 t vega10_display_clock_voltage_request +ffffffff8228e040 t vega10_power_off_asic +ffffffff8228e0b0 t vega10_force_clock_level +ffffffff8228e1e0 t vega10_emit_clock_levels +ffffffff8228e350 t vega10_print_clock_levels +ffffffff8228eb30 t vega10_get_sclk_od +ffffffff8228eba0 t vega10_set_sclk_od +ffffffff8228eca0 t vega10_get_mclk_od +ffffffff8228ed10 t vega10_set_mclk_od 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vega10_populate_single_memory_level +ffffffff82290970 t vega10_get_pp_table_entry_callback_func +ffffffff82290b90 t vega10_odn_update_power_state +ffffffff82291000 T vega10_enable_didt_config +ffffffff82292870 T vega10_disable_didt_config +ffffffff82292ab0 T vega10_initialize_power_tune_defaults +ffffffff82292be0 T vega10_set_power_limit +ffffffff82292c30 T vega10_enable_power_containment +ffffffff82292d50 T vega10_disable_power_containment +ffffffff82292e20 T vega10_power_control_set_level +ffffffff82292e80 t vega10_didt_set_mask +ffffffff82294000 t vega10_pp_tables_initialize +ffffffff822959a0 t vega10_pp_tables_uninitialize +ffffffff82295b50 T vega10_get_number_of_powerplay_table_entries +ffffffff82295c00 T vega10_get_powerplay_table_entry +ffffffff82295d80 T vega10_baco_set_cap +ffffffff82296000 T vega10_fan_ctrl_get_fan_speed_info +ffffffff82296080 T vega10_fan_ctrl_get_fan_speed_pwm +ffffffff822961a0 T vega10_fan_ctrl_get_fan_speed_rpm +ffffffff822962a0 T vega10_fan_ctrl_set_static_mode +ffffffff82296550 T vega10_fan_ctrl_set_default_mode +ffffffff82296760 T vega10_fan_ctrl_start_smc_fan_control +ffffffff82296820 T vega10_fan_ctrl_stop_smc_fan_control +ffffffff822968e0 T vega10_fan_ctrl_set_fan_speed_pwm +ffffffff82296b00 T vega10_fan_ctrl_reset_fan_speed_to_default +ffffffff82296bc0 T vega10_fan_ctrl_set_fan_speed_rpm +ffffffff82296d90 T vega10_thermal_get_temperature +ffffffff82296e20 T vega10_thermal_disable_alert +ffffffff82296f30 T vega10_thermal_stop_thermal_controller +ffffffff82296f90 T vega10_enable_mgpu_fan_boost +ffffffff822970a0 T vega10_start_thermal_controller +ffffffff82297640 T vega10_thermal_ctrl_uninitialize_thermal_controller +ffffffff82298000 T vega12_baco_set_state +ffffffff82299000 T vega12_enable_disable_vce_dpm +ffffffff82299090 T vega12_hwmgr_init +ffffffff822990d0 t vega12_hwmgr_backend_init +ffffffff82299930 t vega12_hwmgr_backend_fini +ffffffff82299990 t vega12_setup_asic_task +ffffffff822999d0 t vega12_apply_clocks_adjust_rules +ffffffff82299dc0 t vega12_dpm_force_dpm_level +ffffffff8229a210 t vega12_enable_dpm_tasks +ffffffff8229ac80 t vega12_disable_dpm_tasks +ffffffff8229ad80 t vega12_patch_boot_state +ffffffff8229adb0 t vega12_power_gate_vce +ffffffff8229ae60 t vega12_power_gate_uvd +ffffffff8229af10 t vega12_dpm_get_mclk +ffffffff8229af60 t vega12_dpm_get_sclk +ffffffff8229afb0 t vega12_notify_smc_display_config_after_ps_adjustment +ffffffff8229b110 t vega12_pre_display_configuration_changed_task +ffffffff8229b1f0 t vega12_display_configuration_changed_task +ffffffff8229b2d0 t vega12_set_fan_control_mode +ffffffff8229b330 t vega12_get_fan_control_mode +ffffffff8229b370 t vega12_check_smc_update_required_for_display_configuration +ffffffff8229b3d0 t vega12_get_dal_power_level +ffffffff8229b400 t vega12_get_performance_level +ffffffff8229b430 t vega12_get_clock_by_type_with_latency +ffffffff8229b710 t vega12_get_clock_by_type_with_voltage +ffffffff8229b740 t vega12_set_watermarks_for_clocks_ranges +ffffffff8229b7c0 t vega12_display_clock_voltage_request +ffffffff8229b840 t vega12_power_off_asic +ffffffff8229b8b0 t vega12_force_clock_level +ffffffff8229bb00 t vega12_print_clock_levels +ffffffff8229c2f0 t vega12_gfx_off_control +ffffffff8229c340 t vega12_read_sensor +ffffffff8229c710 t vega12_notify_cac_buffer_info +ffffffff8229c7c0 t vega12_get_thermal_temperature_range +ffffffff8229c8a0 t vega12_get_ppfeature_status +ffffffff8229c920 t vega12_set_ppfeature_status +ffffffff8229c9c0 t vega12_set_mp1_state +ffffffff8229ca30 t vega12_get_gpu_metrics +ffffffff8229ccc0 t vega12_upload_dpm_min_level +ffffffff8229cf00 t vega12_upload_dpm_max_level +ffffffff8229d0d0 t vega12_setup_single_dpm_table +ffffffff8229e000 t vega12_pp_tables_initialize +ffffffff8229e5f0 t vega12_pp_tables_uninitialize +ffffffff8229f000 T vega12_fan_ctrl_get_fan_speed_info +ffffffff8229f040 T vega12_fan_ctrl_get_fan_speed_rpm +ffffffff8229f0b0 T vega12_fan_ctrl_start_smc_fan_control +ffffffff8229f0e0 T vega12_fan_ctrl_stop_smc_fan_control +ffffffff8229f110 T vega12_fan_ctrl_reset_fan_speed_to_default +ffffffff8229f140 T vega12_thermal_get_temperature +ffffffff8229f1d0 T vega12_thermal_disable_alert +ffffffff8229f260 T vega12_thermal_stop_thermal_controller +ffffffff8229f2f0 T vega12_start_thermal_controller +ffffffff822a0000 T vega20_baco_get_capability +ffffffff822a00c0 T vega20_baco_get_state +ffffffff822a0150 T vega20_baco_set_state +ffffffff822a0350 T vega20_baco_apply_vdci_flush_workaround +ffffffff822a1000 T vega20_hwmgr_init +ffffffff822a1040 t vega20_hwmgr_backend_init +ffffffff822a1980 t vega20_hwmgr_backend_fini +ffffffff822a19e0 t vega20_setup_asic_task +ffffffff822a1ad0 t vega20_apply_clocks_adjust_rules +ffffffff822a1fc0 t vega20_dpm_force_dpm_level +ffffffff822a2730 t vega20_enable_dpm_tasks +ffffffff822a3ba0 t vega20_disable_dpm_tasks +ffffffff822a3d40 t vega20_power_gate_vce +ffffffff822a3e70 t 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navi10_print_clk_levels +ffffffff822ddb20 t navi10_emit_clk_levels +ffffffff822ddd60 t navi10_force_clk_levels +ffffffff822dde90 t navi10_od_edit_dpm_table +ffffffff822de510 t navi10_get_clock_by_type_with_latency +ffffffff822de610 t navi10_get_power_profile_mode +ffffffff822de860 t navi10_set_power_profile_mode +ffffffff822deb30 t navi10_dpm_set_vcn_enable +ffffffff822debc0 t navi10_dpm_set_jpeg_enable +ffffffff822dec40 t navi10_read_sensor +ffffffff822dedc0 t navi10_pre_display_config_changed +ffffffff822dee60 t navi10_display_config_changed +ffffffff822deee0 t navi10_notify_smc_display_config +ffffffff822df070 t navi10_is_dpm_running +ffffffff822df0c0 t navi10_get_fan_speed_rpm +ffffffff822df160 t navi10_set_watermarks_table +ffffffff822df310 t navi10_get_thermal_temperature_range +ffffffff822df400 t navi10_get_uclk_dpm_states +ffffffff822df510 t navi10_set_default_od_settings +ffffffff822df770 t navi10_display_disable_memory_clock_switch +ffffffff822df7f0 t navi10_get_power_limit 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sienna_cichlid_set_default_dpm_table +ffffffff822e2920 t sienna_cichlid_populate_umd_state_clk +ffffffff822e29e0 t sienna_cichlid_print_clk_levels +ffffffff822e2bc0 t sienna_cichlid_force_clk_levels +ffffffff822e2cf0 t sienna_cichlid_od_edit_dpm_table +ffffffff822e3290 t sienna_cichlid_restore_user_od_settings +ffffffff822e3320 t sienna_cichlid_get_power_profile_mode +ffffffff822e3570 t sienna_cichlid_set_power_profile_mode +ffffffff822e3840 t sienna_cichlid_dpm_set_vcn_enable +ffffffff822e3900 t sienna_cichlid_dpm_set_jpeg_enable +ffffffff822e3980 t sienna_cichlid_read_sensor +ffffffff822e3c80 t sienna_cichlid_pre_display_config_changed +ffffffff822e3cb0 t sienna_cichlid_display_config_changed +ffffffff822e3d10 t sienna_cichlid_notify_smc_display_config +ffffffff822e3ea0 t sienna_cichlid_is_dpm_running +ffffffff822e3ef0 t sienna_cichlid_get_fan_speed_rpm +ffffffff822e4000 t sienna_cichlid_set_watermarks_table +ffffffff822e41a0 t sienna_cichlid_get_thermal_temperature_range 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sienna_cichlid_get_dpm_ultimate_freq +ffffffff822e5690 t sienna_cichlid_get_gpu_metrics +ffffffff822e5b10 t sienna_cichlid_enable_mgpu_fan_boost +ffffffff822e5b60 t sienna_cichlid_get_fan_parameters +ffffffff822e5ba0 t sienna_cichlid_gpo_control +ffffffff822e5c50 t sienna_cichlid_get_ecc_info +ffffffff822e5d40 t sienna_cichlid_stb_get_data_direct +ffffffff822e5de0 t sienna_cichlid_get_default_config_table_settings +ffffffff822e5e50 t sienna_cichlid_set_config_table +ffffffff822e5f20 t sienna_cichlid_get_smu_metrics_data +ffffffff822e6360 t sienna_cichlid_get_throttler_status_locked +ffffffff822e64e0 t sienna_cichlid_get_smartshift_power_percentage +ffffffff822e6610 t sienna_cichlid_i2c_xfer +ffffffff822e68c0 t sienna_cichlid_i2c_func +ffffffff822e7000 T smu_v11_0_init_microcode +ffffffff822e72b0 T smu_v11_0_fini_microcode +ffffffff822e7330 T smu_v11_0_load_microcode +ffffffff822e7480 T smu_v11_0_check_fw_status +ffffffff822e74d0 T smu_v11_0_check_fw_version +ffffffff822e7680 T smu_v11_0_setup_pptable +ffffffff822e77b0 T smu_v11_0_init_smc_tables +ffffffff822e7910 T smu_v11_0_fini_smc_tables +ffffffff822e7b40 T smu_v11_0_init_power +ffffffff822e7bd0 T smu_v11_0_fini_power +ffffffff822e7c30 T smu_v11_0_get_vbios_bootup_values +ffffffff822e7f90 T smu_v11_0_notify_memory_pool_location +ffffffff822e8080 T smu_v11_0_set_min_deep_sleep_dcefclk +ffffffff822e8100 T smu_v11_0_set_driver_table_location +ffffffff822e8170 T smu_v11_0_set_tool_table_location +ffffffff822e81e0 T smu_v11_0_init_display_count +ffffffff822e8240 T smu_v11_0_set_allowed_mask +ffffffff822e8310 T smu_v11_0_system_features_control +ffffffff822e8330 T smu_v11_0_notify_display_change +ffffffff822e83a0 T smu_v11_0_init_max_sustainable_clocks +ffffffff822e8610 t smu_v11_0_get_max_sustainable_clock +ffffffff822e8730 T smu_v11_0_get_current_power_limit +ffffffff822e8800 T smu_v11_0_set_power_limit +ffffffff822e8940 T smu_v11_0_interrupt_work +ffffffff822e89c0 T smu_v11_0_enable_thermal_alert +ffffffff822e8a60 T smu_v11_0_disable_thermal_alert +ffffffff822e8a80 T smu_v11_0_get_gfx_vdd +ffffffff822e8b40 T smu_v11_0_display_clock_voltage_request +ffffffff822e8c80 T smu_v11_0_set_hard_freq_limited_range +ffffffff822e8d60 T smu_v11_0_gfx_off_control +ffffffff822e8dd0 T smu_v11_0_get_fan_control_mode +ffffffff822e8e20 T smu_v11_0_set_fan_speed_pwm +ffffffff822e8fc0 t smu_v11_0_set_fan_static_mode +ffffffff822e9170 T smu_v11_0_set_fan_speed_rpm +ffffffff822e9290 T smu_v11_0_get_fan_speed_pwm +ffffffff822e93d0 T smu_v11_0_get_fan_speed_rpm +ffffffff822e94d0 T smu_v11_0_set_fan_control_mode +ffffffff822e9670 T smu_v11_0_set_xgmi_pstate +ffffffff822e9690 T smu_v11_0_register_irq_handler +ffffffff822e9750 T smu_v11_0_get_max_sustainable_clocks_by_dc +ffffffff822e97e0 T smu_v11_0_set_azalia_d3_pme +ffffffff822e9800 T smu_v11_0_baco_set_armd3_sequence +ffffffff822e9820 T smu_v11_0_baco_is_support +ffffffff822e98b0 T smu_v11_0_baco_get_state +ffffffff822e98e0 T smu_v11_0_baco_set_state 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T smu_v11_0_set_smu_mailbox_registers +ffffffff822eaca0 t smu_v11_0_set_irq_state +ffffffff822eb220 t smu_v11_0_irq_process +ffffffff822eb520 t orderly_poweroff +ffffffff822ec000 T vangogh_set_ppt_funcs +ffffffff822ec040 t vangogh_set_default_dpm_tables +ffffffff822ec070 t vangogh_common_print_clk_levels +ffffffff822ec4c0 t vangogh_force_clk_levels +ffffffff822ec6f0 t vangogh_od_edit_dpm_table +ffffffff822ecc50 t vangogh_get_power_profile_mode +ffffffff822ecd20 t vangogh_set_power_profile_mode +ffffffff822ece50 t vangogh_dpm_set_vcn_enable +ffffffff822ecea0 t vangogh_dpm_set_jpeg_enable +ffffffff822ecef0 t vangogh_read_sensor +ffffffff822ed020 t vangogh_is_dpm_running +ffffffff822ed080 t vangogh_set_watermarks_table +ffffffff822ed210 t vangogh_set_performance_level +ffffffff822edb40 t vangogh_get_power_limit +ffffffff822edcc0 t vangogh_get_ppt_limit +ffffffff822edd30 t vangogh_get_dpm_clock_table +ffffffff822edea0 t vangogh_init_smc_tables +ffffffff822ee0f0 t vangogh_system_features_control +ffffffff822ee140 t vangogh_set_power_limit +ffffffff822ee2a0 t vangogh_get_gfxoff_status +ffffffff822ee330 t vangogh_get_gfxoff_entrycount +ffffffff822ee3a0 t vangogh_set_gfxoff_residency +ffffffff822ee410 t vangogh_get_gfxoff_residency +ffffffff822ee450 t vangogh_mode2_reset +ffffffff822ee590 t vangogh_common_get_gpu_metrics +ffffffff822eebe0 t vangogh_post_smu_init +ffffffff822eed90 t vangogh_set_fine_grain_gfx_freq_parameters +ffffffff822eee00 t vangogh_common_get_smu_metrics_data +ffffffff822ef150 t vangogh_force_dpm_limit_value +ffffffff822ef290 t vangogh_get_dpm_ultimate_freq +ffffffff822ef650 t vangogh_set_soft_freq_limited_range +ffffffff822f0000 T renoir_set_ppt_funcs +ffffffff822f00a0 t renoir_get_current_power_state +ffffffff822f0120 t renoir_print_clk_levels +ffffffff822f0390 t renoir_force_clk_levels +ffffffff822f05c0 t renoir_od_edit_dpm_table +ffffffff822f08c0 t renoir_get_power_profile_mode +ffffffff822f0990 t renoir_set_power_profile_mode +ffffffff822f0ac0 t renoir_dpm_set_vcn_enable +ffffffff822f0b40 t renoir_dpm_set_jpeg_enable +ffffffff822f0bc0 t renoir_read_sensor +ffffffff822f0fb0 t renoir_is_dpm_running +ffffffff822f0ff0 t renoir_set_watermarks_table +ffffffff822f11a0 t renoir_set_performance_level +ffffffff822f16e0 t renoir_get_dpm_clock_table +ffffffff822f1a30 t renoir_init_smc_tables +ffffffff822f1ba0 t renoir_get_enabled_mask +ffffffff822f1be0 t renoir_get_dpm_ultimate_freq +ffffffff822f1e80 t renoir_get_gpu_metrics +ffffffff822f20a0 t renoir_gfx_state_change_set +ffffffff822f20d0 t renoir_set_fine_grain_gfx_freq_parameters +ffffffff822f2170 t renoir_force_dpm_limit_value +ffffffff822f3000 T smu_v12_0_check_fw_status +ffffffff822f3050 T smu_v12_0_check_fw_version +ffffffff822f3110 T smu_v12_0_powergate_sdma +ffffffff822f3150 T smu_v12_0_set_gfx_cgpg +ffffffff822f31b0 T smu_v12_0_get_gfxoff_status +ffffffff822f3240 T smu_v12_0_gfx_off_control +ffffffff822f3360 T smu_v12_0_fini_smc_tables +ffffffff822f3410 T smu_v12_0_set_default_dpm_tables +ffffffff822f3440 T smu_v12_0_mode2_reset +ffffffff822f3460 T smu_v12_0_set_soft_freq_limited_range +ffffffff822f35a0 T smu_v12_0_set_driver_table_location +ffffffff822f3610 T smu_v12_0_get_vbios_bootup_values +ffffffff822f4000 T aldebaran_set_ppt_funcs +ffffffff822f4040 t aldebaran_get_allowed_feature_mask +ffffffff822f4090 t aldebaran_set_default_dpm_table +ffffffff822f4290 t aldebaran_populate_umd_state_clk +ffffffff822f4390 t aldebaran_print_clk_levels +ffffffff822f4550 t aldebaran_force_clk_levels +ffffffff822f4700 t aldebaran_usr_edit_dpm_table +ffffffff822f4920 t aldebaran_read_sensor +ffffffff822f4bc0 t aldebaran_is_dpm_running +ffffffff822f4c10 t aldebaran_get_thermal_temperature_range +ffffffff822f4ce0 t aldebaran_set_performance_level +ffffffff822f4d90 t aldebaran_get_power_limit +ffffffff822f4f20 t aldebaran_set_df_cstate +ffffffff822f4fa0 t aldebaran_allow_xgmi_power_down +ffffffff822f5040 t aldebaran_i2c_control_init +ffffffff822f5100 t aldebaran_i2c_control_fini +ffffffff822f5140 t aldebaran_get_unique_id +ffffffff822f5220 t aldebaran_init_smc_tables +ffffffff822f53b0 t aldebaran_set_mp1_state +ffffffff822f53f0 t aldebaran_setup_pptable +ffffffff822f54c0 t aldebaran_system_features_control +ffffffff822f5620 t aldebaran_set_power_limit +ffffffff822f56b0 t aldebaran_is_baco_supported +ffffffff822f56e0 t aldebaran_is_mode1_reset_supported +ffffffff822f5710 t aldebaran_is_mode2_reset_supported +ffffffff822f5740 t aldebaran_mode1_reset +ffffffff822f5820 t aldebaran_mode2_reset +ffffffff822f59e0 t aldebaran_set_soft_freq_limited_range +ffffffff822f5bf0 t aldebaran_log_thermal_throttling_event +ffffffff822f5f00 t aldebaran_get_gpu_metrics +ffffffff822f6190 t aldebaran_smu_handle_passthrough_sbr +ffffffff822f61b0 t aldebaran_smu_send_hbm_bad_page_num +ffffffff822f6240 t aldebaran_get_ecc_info +ffffffff822f63a0 t aldebaran_send_hbm_bad_channel_flag +ffffffff822f6480 t aldebaran_get_current_clk_freq_by_table +ffffffff822f65c0 t aldebaran_get_smu_metrics_data +ffffffff822f6810 t aldebaran_upload_dpm_level +ffffffff822f6900 t aldebaran_i2c_xfer +ffffffff822f6bb0 t aldebaran_i2c_func +ffffffff822f7000 T smu_v13_0_init_microcode +ffffffff822f71d0 T smu_v13_0_fini_microcode +ffffffff822f7250 T smu_v13_0_load_microcode +ffffffff822f7280 T smu_v13_0_init_pptable_microcode +ffffffff822f7430 T smu_v13_0_get_pptable_from_firmware +ffffffff822f7560 T smu_v13_0_check_fw_status +ffffffff822f75d0 T smu_v13_0_check_fw_version +ffffffff822f7700 T smu_v13_0_setup_pptable +ffffffff822f78a0 T smu_v13_0_init_smc_tables +ffffffff822f79f0 T smu_v13_0_fini_smc_tables +ffffffff822f7be0 T smu_v13_0_init_power +ffffffff822f7c60 T smu_v13_0_fini_power +ffffffff822f7ce0 T smu_v13_0_get_vbios_bootup_values +ffffffff822f7f90 T smu_v13_0_notify_memory_pool_location +ffffffff822f8050 T smu_v13_0_set_min_deep_sleep_dcefclk +ffffffff822f80d0 T smu_v13_0_set_driver_table_location +ffffffff822f8140 T smu_v13_0_set_tool_table_location +ffffffff822f81b0 T smu_v13_0_init_display_count +ffffffff822f81f0 T smu_v13_0_set_allowed_mask +ffffffff822f82c0 T smu_v13_0_gfx_off_control +ffffffff822f8330 T smu_v13_0_system_features_control +ffffffff822f8350 T smu_v13_0_notify_display_change +ffffffff822f83c0 T smu_v13_0_init_max_sustainable_clocks +ffffffff822f8630 t smu_v13_0_get_max_sustainable_clock +ffffffff822f8750 T smu_v13_0_get_current_power_limit +ffffffff822f8820 T smu_v13_0_set_power_limit +ffffffff822f8940 T smu_v13_0_enable_thermal_alert +ffffffff822f89d0 T smu_v13_0_disable_thermal_alert +ffffffff822f8a10 T smu_v13_0_get_gfx_vdd +ffffffff822f8ad0 T smu_v13_0_display_clock_voltage_request +ffffffff822f8c10 T smu_v13_0_set_hard_freq_limited_range +ffffffff822f8cf0 T smu_v13_0_get_fan_control_mode +ffffffff822f8d40 T smu_v13_0_set_fan_speed_pwm +ffffffff822f8f50 t smu_v13_0_set_fan_static_mode +ffffffff822f9110 T smu_v13_0_set_fan_control_mode +ffffffff822f9270 T smu_v13_0_set_fan_speed_rpm +ffffffff822f9410 T smu_v13_0_set_xgmi_pstate +ffffffff822f9430 T smu_v13_0_register_irq_handler +ffffffff822f9500 T smu_v13_0_get_max_sustainable_clocks_by_dc +ffffffff822f9590 T smu_v13_0_set_azalia_d3_pme +ffffffff822f95b0 T smu_v13_0_wait_for_event +ffffffff822f9610 T smu_v13_0_get_dpm_ultimate_freq +ffffffff822f9770 T smu_v13_0_set_soft_freq_limited_range +ffffffff822f9850 T smu_v13_0_set_performance_level +ffffffff822f9fe0 T smu_v13_0_set_power_source +ffffffff822fa040 T smu_v13_0_set_single_dpm_table +ffffffff822fa2d0 T smu_v13_0_get_dpm_level_range +ffffffff822fa450 T smu_v13_0_get_current_pcie_link_width_level +ffffffff822fa4a0 T smu_v13_0_get_current_pcie_link_width +ffffffff822fa500 T smu_v13_0_get_current_pcie_link_speed_level +ffffffff822fa550 T smu_v13_0_get_current_pcie_link_speed +ffffffff822fa5a0 T smu_v13_0_set_vcn_enable +ffffffff822fa650 T smu_v13_0_set_jpeg_enable +ffffffff822fa670 T smu_v13_0_run_btc +ffffffff822fa6f0 T smu_v13_0_gpo_control +ffffffff822fa780 T smu_v13_0_deep_sleep_control +ffffffff822fa9f0 T smu_v13_0_gfx_ulv_control +ffffffff822faa60 T smu_v13_0_baco_set_armd3_sequence +ffffffff822faa80 T smu_v13_0_baco_is_support +ffffffff822fab10 T smu_v13_0_baco_get_state +ffffffff822fab40 T smu_v13_0_baco_set_state +ffffffff822fac00 T smu_v13_0_baco_enter +ffffffff822fad10 T smu_v13_0_baco_exit +ffffffff822fadb0 T smu_v13_0_set_gfx_power_up_by_imu +ffffffff822fadf0 T smu_v13_0_od_edit_dpm_table +ffffffff822fb0b0 T smu_v13_0_set_default_dpm_tables +ffffffff822fb0e0 T smu_v13_0_set_smu_mailbox_registers +ffffffff822fb150 T smu_v13_0_mode1_reset +ffffffff822fb1d0 t smu_v13_0_set_irq_state +ffffffff822fb750 t smu_v13_0_irq_process +ffffffff822fba50 t orderly_poweroff +ffffffff822fc000 T smu_v13_0_0_set_ppt_funcs +ffffffff822fc0e0 t smu_v13_0_0_get_allowed_feature_mask +ffffffff822fc220 t smu_v13_0_0_set_default_dpm_table +ffffffff822fc650 t smu_v13_0_0_populate_umd_state_clk +ffffffff822fc780 t smu_v13_0_0_print_clk_levels +ffffffff822fc8a0 t smu_v13_0_0_force_clk_levels +ffffffff822fca20 t smu_v13_0_0_get_power_profile_mode +ffffffff822fcc70 t smu_v13_0_0_set_power_profile_mode +ffffffff822fcec0 t smu_v13_0_0_read_sensor +ffffffff822fd0e0 t smu_v13_0_0_is_dpm_running +ffffffff822fd130 t smu_v13_0_0_get_fan_speed_pwm +ffffffff822fd210 t smu_v13_0_0_get_fan_speed_rpm +ffffffff822fd280 t smu_v13_0_0_get_thermal_temperature_range +ffffffff822fd380 t smu_v13_0_0_dump_pptable +ffffffff822fd3b0 t smu_v13_0_0_get_power_limit +ffffffff822fd490 t smu_v13_0_0_set_df_cstate +ffffffff822fd4b0 t smu_v13_0_0_update_pcie_parameters +ffffffff822fd5a0 t smu_v13_0_0_i2c_control_init +ffffffff822fd6d0 t smu_v13_0_0_i2c_control_fini +ffffffff822fd710 t smu_v13_0_0_get_unique_id +ffffffff822fd7c0 t smu_v13_0_0_init_smc_tables +ffffffff822fd9b0 t smu_v13_0_0_set_mp1_state +ffffffff822fd9f0 t smu_v13_0_0_setup_pptable +ffffffff822fdb30 t smu_v13_0_0_system_features_control +ffffffff822fdb40 t smu_v13_0_0_baco_enter +ffffffff822fdb90 t smu_v13_0_0_baco_exit +ffffffff822fdbf0 t smu_v13_0_0_is_mode1_reset_supported +ffffffff822fdc50 t smu_v13_0_0_mode1_reset +ffffffff822fdce0 t smu_v13_0_0_get_dpm_ultimate_freq +ffffffff822fde00 t smu_v13_0_0_get_gpu_metrics +ffffffff822fe230 t smu_v13_0_0_enable_mgpu_fan_boost +ffffffff822fe280 t smu_v13_0_0_smu_send_bad_mem_page_num +ffffffff822fe310 t smu_v13_0_0_send_bad_mem_channel_flag +ffffffff822fe3a0 t smu_v13_0_0_get_smu_metrics_data +ffffffff822fe710 t smu_v13_0_get_throttler_status +ffffffff822fe8d0 t smu_v13_0_0_i2c_xfer +ffffffff822feb80 t smu_v13_0_0_i2c_func +ffffffff822ff000 T smu_v13_0_4_set_ppt_funcs +ffffffff822ff0b0 t smu_v13_0_4_print_clk_levels +ffffffff822ff170 t smu_v13_0_4_force_clk_levels +ffffffff822ff410 t smu_v13_0_4_read_sensor +ffffffff822ff6c0 t smu_v13_0_4_is_dpm_running +ffffffff822ff710 t smu_v13_0_4_set_watermarks_table +ffffffff822ff8a0 t smu_v13_0_4_set_performance_level +ffffffff822ffde0 t smu_v13_0_4_init_smc_tables +ffffffff822fff50 t smu_v13_0_4_fini_smc_tables +ffffffff82300000 t smu_v13_0_4_system_features_control +ffffffff82300050 t smu_v13_0_4_mode2_reset +ffffffff82300070 t smu_v13_0_4_get_dpm_ultimate_freq +ffffffff82300490 t smu_v13_0_4_get_gpu_metrics +ffffffff82300660 t smu_v13_0_4_set_fine_grain_gfx_freq_parameters +ffffffff823006c0 t smu_v13_0_4_get_smu_metrics_data +ffffffff82301000 T smu_v13_0_5_set_ppt_funcs +ffffffff82301090 t smu_v13_0_5_set_default_dpm_tables +ffffffff823010c0 t smu_v13_0_5_print_clk_levels +ffffffff82301170 t smu_v13_0_5_force_clk_levels +ffffffff823012d0 t smu_v13_0_5_od_edit_dpm_table +ffffffff82301590 t smu_v13_0_5_dpm_set_vcn_enable +ffffffff823015b0 t smu_v13_0_5_dpm_set_jpeg_enable +ffffffff823015d0 t smu_v13_0_5_read_sensor +ffffffff823017f0 t smu_v13_0_5_is_dpm_running +ffffffff82301840 t smu_v13_0_5_set_watermarks_table +ffffffff823019d0 t smu_v13_0_5_set_performance_level +ffffffff82301bb0 t smu_v13_0_5_init_smc_tables +ffffffff82301d20 t smu_v13_0_5_fini_smc_tables +ffffffff82301dd0 t smu_v13_0_5_system_features_control +ffffffff82301e20 t smu_v13_0_5_mode2_reset +ffffffff82301ea0 t smu_v13_0_5_get_dpm_ultimate_freq +ffffffff823022e0 t smu_v13_0_5_get_gpu_metrics +ffffffff82302420 t smu_v13_0_5_set_fine_grain_gfx_freq_parameters +ffffffff82302480 t smu_v13_0_5_get_smu_metrics_data +ffffffff82303000 T smu_v13_0_7_set_ppt_funcs +ffffffff82303050 t smu_v13_0_7_get_allowed_feature_mask +ffffffff823031c0 t smu_v13_0_7_set_default_dpm_table +ffffffff823035f0 t smu_v13_0_7_populate_umd_state_clk +ffffffff82303720 t smu_v13_0_7_print_clk_levels +ffffffff82303840 t smu_v13_0_7_force_clk_levels +ffffffff823039c0 t smu_v13_0_7_get_power_profile_mode +ffffffff82303ca0 t smu_v13_0_7_set_power_profile_mode +ffffffff82303ee0 t smu_v13_0_7_read_sensor +ffffffff823040f0 t smu_v13_0_7_is_dpm_running +ffffffff82304140 t smu_v13_0_7_get_fan_speed_pwm +ffffffff82304220 t smu_v13_0_7_get_fan_speed_rpm +ffffffff82304290 t smu_v13_0_7_get_thermal_temperature_range +ffffffff82304380 t smu_v13_0_7_dump_pptable +ffffffff823043b0 t smu_v13_0_7_get_power_limit +ffffffff82304490 t smu_v13_0_7_set_df_cstate +ffffffff823044b0 t smu_v13_0_7_update_pcie_parameters +ffffffff823045a0 t smu_v13_0_7_init_smc_tables +ffffffff82304790 t smu_v13_0_7_check_fw_status +ffffffff823047e0 t smu_v13_0_7_set_mp1_state +ffffffff82304820 t smu_v13_0_7_setup_pptable +ffffffff82304980 t smu_v13_0_7_baco_enter +ffffffff823049d0 t smu_v13_0_7_baco_exit +ffffffff82304a30 t smu_v13_0_7_is_mode1_reset_supported +ffffffff82304a70 t smu_v13_0_7_get_dpm_ultimate_freq +ffffffff82304b90 t smu_v13_0_7_get_gpu_metrics +ffffffff82304fa0 t smu_v13_0_7_enable_mgpu_fan_boost +ffffffff82304ff0 t smu_v13_0_7_get_smu_metrics_data +ffffffff82305340 t smu_v13_0_7_get_throttler_status +ffffffff82306000 T yellow_carp_set_ppt_funcs +ffffffff82306040 t yellow_carp_set_default_dpm_tables +ffffffff82306070 t yellow_carp_print_clk_levels +ffffffff82306130 t yellow_carp_force_clk_levels +ffffffff823063d0 t yellow_carp_od_edit_dpm_table +ffffffff82306690 t yellow_carp_dpm_set_vcn_enable +ffffffff823066b0 t yellow_carp_dpm_set_jpeg_enable +ffffffff823066d0 t yellow_carp_read_sensor +ffffffff82306a70 t yellow_carp_is_dpm_running +ffffffff82306ac0 t yellow_carp_set_watermarks_table +ffffffff82306c50 t yellow_carp_set_performance_level +ffffffff82307190 t yellow_carp_init_smc_tables +ffffffff82307300 t yellow_carp_fini_smc_tables +ffffffff823073b0 t yellow_carp_system_features_control +ffffffff82307400 t yellow_carp_get_gfxoff_status +ffffffff82307490 t yellow_carp_mode2_reset +ffffffff82307510 t yellow_carp_get_dpm_ultimate_freq +ffffffff82307960 t yellow_carp_get_gpu_metrics +ffffffff82307b20 t yellow_carp_post_smu_init +ffffffff82307ba0 t yellow_carp_set_fine_grain_gfx_freq_parameters +ffffffff82307c00 t yellow_carp_get_smu_metrics_data +ffffffff82308000 T smu_cmn_send_msg_without_waiting +ffffffff82308170 T smu_cmn_wait_for_response +ffffffff823082b0 T smu_cmn_send_smc_msg_with_param +ffffffff823085d0 T smu_cmn_to_asic_specific_index +ffffffff823086e0 t __smu_cmn_reg_print_error +ffffffff82308930 T smu_cmn_send_smc_msg +ffffffff82308950 T smu_cmn_send_debug_smc_msg +ffffffff823089d0 T smu_cmn_feature_is_supported +ffffffff82308a80 T smu_cmn_feature_is_enabled +ffffffff82308b80 T smu_cmn_clk_dpm_is_enabled +ffffffff82308c80 T smu_cmn_get_enabled_mask +ffffffff82308d70 T smu_cmn_get_indep_throttler_status +ffffffff82308e20 T smu_cmn_feature_update_enable_state +ffffffff82308ec0 T smu_cmn_feature_set_enabled +ffffffff82308f90 T smu_cmn_get_pp_feature_mask +ffffffff82309140 T smu_cmn_set_pp_feature_mask +ffffffff82309240 T smu_cmn_disable_all_features_with_exception +ffffffff823092f0 T smu_cmn_get_smc_version +ffffffff823093c0 T smu_cmn_update_table +ffffffff82309520 T smu_cmn_write_watermarks_table +ffffffff823095f0 T smu_cmn_write_pptable +ffffffff823096b0 T smu_cmn_get_metrics_table +ffffffff82309810 T smu_cmn_get_combo_pptable +ffffffff823098e0 T smu_cmn_init_soft_gpu_metrics +ffffffff823099c0 T smu_cmn_set_mp1_state +ffffffff82309a60 T smu_cmn_is_audio_func_enabled +ffffffff8230a000 T pci_mcfg_init +ffffffff8230a050 T pci_lookup_segment +ffffffff8230a0b0 T pci_attach_hook +ffffffff8230a0e0 T pci_bus_maxdevs +ffffffff8230a110 T pci_make_tag +ffffffff8230a180 T pci_decompose_tag +ffffffff8230a1e0 T pci_conf_size +ffffffff8230a240 T pci_mcfg_map_bus +ffffffff8230a2c0 T pci_conf_read +ffffffff8230a410 T pci_conf_write +ffffffff8230a550 T pci_msix_table_map +ffffffff8230a670 T pci_msix_table_unmap +ffffffff8230a710 T msi_hwmask +ffffffff8230a740 T msi_hwunmask +ffffffff8230a770 T msi_addroute +ffffffff8230a870 T msi_delroute +ffffffff8230a8e0 T pci_intr_map_msi +ffffffff8230a960 T msix_hwmask +ffffffff8230a990 T msix_hwunmask +ffffffff8230a9c0 T msix_addroute +ffffffff8230abc0 T msix_delroute +ffffffff8230ad20 T pci_intr_map_msix +ffffffff8230adf0 T pci_intr_map +ffffffff8230b010 T pci_intr_string +ffffffff8230b0f0 T pci_intr_establish +ffffffff8230b140 T pci_intr_establish_cpu +ffffffff8230b2a0 T pci_intr_disestablish +ffffffff8230b2c0 T pci_init_extents +ffffffff8230b4a0 T pci_probe_device_hook +ffffffff8230b4e0 T pci_dev_postattach +ffffffff8230b4f0 T pci_min_powerstate +ffffffff8230b500 T pci_set_powerstate_md +ffffffff8230c000 T pciide_machdep_compat_intr_establish +ffffffff8230c060 T pciide_machdep_compat_intr_disestablish +ffffffff8230d000 T vga_post_init +ffffffff8230d310 t vm86_emu_inb +ffffffff8230d360 t vm86_emu_inw +ffffffff8230d3a0 t vm86_emu_inl +ffffffff8230d3e0 t vm86_emu_outb +ffffffff8230d430 t vm86_emu_outw +ffffffff8230d470 t vm86_emu_outl +ffffffff8230d4b0 T vga_post_call +ffffffff8230d520 T vga_post_free +ffffffff8230d590 T ddb_vgapost +ffffffff8230e000 T pchbmatch +ffffffff8230e040 T pchbattach +ffffffff8230e4b0 T pchbactivate +ffffffff8230e520 T pchb_amd64ht_attach +ffffffff8230e670 T pchb_rnd +ffffffff8230e6f0 T pchb_print +ffffffff8230f000 T amas_match +ffffffff8230f050 T amas_attach +ffffffff8230f0b0 T amas_intl_nodes +ffffffff8230f140 T amas_get_pagerange +ffffffff82310000 T agp_flush_cache +ffffffff82310030 T agp_flush_cache_range +ffffffff82310040 T agp_init_map +ffffffff82310110 T agp_destroy_map +ffffffff82310150 T agp_map_subregion +ffffffff82310180 T agp_unmap_subregion +ffffffff823101b0 T agp_map_atomic +ffffffff823101e0 T agp_unmap_atomic +ffffffff82311000 T cardslotmatch +ffffffff82311050 T cardslotattach +ffffffff823112a0 T cardslot_event +ffffffff82311300 T cardslot_cb_print +ffffffff82311350 T cardslot_16_print +ffffffff823113a0 T cardslot_16_submatch +ffffffff823113f0 T cardslot_event_throw +ffffffff82311490 T cardslot_process_event +ffffffff82312000 T cardbusmatch +ffffffff82312050 T cardbusattach +ffffffff82312130 T cardbus_read_tuples +ffffffff823124e0 T parse_tuple +ffffffff82312760 T cardbus_attach_card +ffffffff82312ee0 T enable_function +ffffffff82312f80 T decode_tuples +ffffffff82313050 T cardbusprint +ffffffff82313140 T cardbussubmatch +ffffffff823131a0 T disable_function +ffffffff82313200 T cardbus_detach_card +ffffffff823132e0 T cardbus_intr_establish +ffffffff82313310 T cardbus_intr_disestablish +ffffffff82313330 T cardbus_function_enable +ffffffff82313410 T cardbus_function_disable +ffffffff82313470 T cardbus_matchbyid +ffffffff823134e0 T decode_tuple +ffffffff82314000 T cardbus_mapreg_map +ffffffff823141b0 T cardbus_mapreg_unmap +ffffffff82315000 T cardbus_read_exrom +ffffffff82316000 T rbus_space_alloc +ffffffff82316060 T rbus_space_alloc_subregion +ffffffff82316240 T rbus_space_free +ffffffff823162d0 T rbus_new_body +ffffffff82316360 T rbus_new_root_delegate +ffffffff82316430 T rbus_new_root_share +ffffffff82317000 T com_cardbus_match +ffffffff82317070 T com_cardbus_attach +ffffffff82317220 T com_cardbus_detach +ffffffff823172c0 T com_cardbus_find_csdev +ffffffff82317440 T com_cardbus_gofigure +ffffffff82317900 T com_cardbus_enable +ffffffff823179d0 T com_cardbus_disable +ffffffff82317a20 T com_cardbus_setup +ffffffff82318000 T xl_cardbus_match +ffffffff82318090 T xl_cardbus_attach +ffffffff82318420 T xl_cardbus_detach +ffffffff823184e0 T xl_cardbus_lookup +ffffffff823185a0 T xl_cardbus_intr_ack +ffffffff82319000 T dc_cardbus_match +ffffffff82319030 T dc_cardbus_attach +ffffffff823193c0 T dc_cardbus_detach +ffffffff82319460 T dc_cardbus_setup +ffffffff8231a000 T fxp_cardbus_match +ffffffff8231a030 T fxp_cardbus_attach +ffffffff8231a240 T fxp_cardbus_detach +ffffffff8231a2d0 T fxp_cardbus_setup +ffffffff8231b000 t rl_cardbus_match +ffffffff8231b030 t rl_cardbus_attach +ffffffff8231b1d0 t rl_cardbus_detach +ffffffff8231b290 T rl_cardbus_setup +ffffffff8231c000 T re_cardbus_probe +ffffffff8231c030 T re_cardbus_attach +ffffffff8231c230 T re_cardbus_detach +ffffffff8231c310 T re_cardbus_setup +ffffffff8231d000 T ath_cardbus_match +ffffffff8231d050 T ath_cardbus_attach +ffffffff8231d180 T ath_cardbus_detach +ffffffff8231d250 T ath_cardbus_enable +ffffffff8231d320 T ath_cardbus_disable +ffffffff8231d370 T ath_cardbus_power +ffffffff8231d3b0 T ath_cardbus_setup +ffffffff8231e000 T athn_cardbus_match +ffffffff8231e030 T athn_cardbus_attach +ffffffff8231e170 T athn_cardbus_detach +ffffffff8231e210 T athn_cardbus_enable +ffffffff8231e2e0 T athn_cardbus_disable +ffffffff8231e330 T athn_cardbus_power +ffffffff8231e370 T athn_cardbus_read +ffffffff8231e3a0 T athn_cardbus_write +ffffffff8231e3d0 T athn_cardbus_write_barrier +ffffffff8231e400 T athn_cardbus_setup +ffffffff8231f000 T atw_cardbus_match +ffffffff8231f030 T atw_cardbus_attach +ffffffff8231f220 T atw_cardbus_detach +ffffffff8231f2e0 T atw_cardbus_enable +ffffffff8231f3b0 T atw_cardbus_disable +ffffffff8231f400 T atw_cardbus_power +ffffffff8231f440 T atw_cardbus_setup +ffffffff82320000 T rtw_cardbus_match +ffffffff82320030 T rtw_cardbus_attach +ffffffff82320280 T rtw_cardbus_detach +ffffffff823203a0 T rtw_cardbus_intr_ack +ffffffff823203c0 T rtw_cardbus_funcregen +ffffffff82320420 T rtw_cardbus_enable +ffffffff82320580 T rtw_cardbus_disable +ffffffff82320660 T rtw_cardbus_power +ffffffff823206a0 T rtw_cardbus_setup +ffffffff82321000 T ral_cardbus_match +ffffffff82321030 T ral_cardbus_attach +ffffffff82321230 T ral_cardbus_detach +ffffffff823212e0 T ral_cardbus_activate +ffffffff82321370 T ral_cardbus_enable +ffffffff823214d0 T ral_cardbus_disable +ffffffff82321520 T ral_cardbus_setup +ffffffff823215c0 T ral_cardbus_wakeup +ffffffff82322000 T acx_cardbus_match +ffffffff82322030 T acx_cardbus_attach +ffffffff82322260 T acx_cardbus_detach +ffffffff82322380 T acx_cardbus_enable +ffffffff82322450 T acx_cardbus_disable +ffffffff823224a0 T acx_cardbus_power +ffffffff823224e0 T acx_cardbus_setup +ffffffff82323000 T pgt_cardbus_match +ffffffff82323030 T pgt_cardbus_attach +ffffffff82323230 T pgt_cardbus_detach +ffffffff823232e0 T pgt_cardbus_enable +ffffffff82323440 T pgt_cardbus_disable +ffffffff82323490 T pgt_cardbus_power +ffffffff823234f0 T pgt_cardbus_setup +ffffffff82324000 T ehci_cardbus_match +ffffffff82324040 T ehci_cardbus_attach +ffffffff823242e0 T ehci_cardbus_detach +ffffffff82325000 T ohci_cardbus_match +ffffffff82325040 T ohci_cardbus_attach +ffffffff823252d0 T ohci_cardbus_detach +ffffffff82326000 T uhci_cardbus_match +ffffffff82326040 T uhci_cardbus_attach +ffffffff82326350 T uhci_cardbus_detach +ffffffff82327000 T malo_cardbus_match +ffffffff82327030 T malo_cardbus_attach +ffffffff82327270 T malo_cardbus_detach +ffffffff82327340 T malo_cardbus_enable +ffffffff823274b0 T malo_cardbus_disable +ffffffff82327500 T malo_cardbus_setup +ffffffff82328000 T bwi_cardbus_match +ffffffff82328030 T bwi_cardbus_attach +ffffffff823282a0 T bwi_cardbus_detach +ffffffff82328350 T bwi_cardbus_enable +ffffffff823284b0 T bwi_cardbus_disable +ffffffff82328500 T bwi_cardbus_setup +ffffffff823285a0 T bwi_cardbus_conf_read +ffffffff823285d0 T bwi_cardbus_conf_write +ffffffff82329000 T rbus_pccbb_parent_mem +ffffffff82329060 T rbus_pccbb_parent_io +ffffffff823290d0 T pccbb_attach_hook +ffffffff8232a000 T pcmcia_match +ffffffff8232a050 T pcmcia_attach +ffffffff8232a0d0 T pcmcia_activate +ffffffff8232a180 T pcmcia_ccr_read +ffffffff8232a1d0 T pcmcia_ccr_write +ffffffff8232a240 T pcmcia_card_attach +ffffffff8232a450 T pcmcia_print +ffffffff8232a6b0 T pcmcia_submatch +ffffffff8232a700 T pcmcia_card_detach +ffffffff8232a7b0 T pcmcia_card_deactivate +ffffffff8232a820 T pcmcia_card_gettype +ffffffff8232a880 T pcmcia_function_init +ffffffff8232a8d0 T pcmcia_function_enable +ffffffff8232ad00 T pcmcia_function_disable +ffffffff8232ae20 T pcmcia_io_map +ffffffff8232b060 T pcmcia_intr_establish +ffffffff8232b2d0 T pcmcia_card_intr +ffffffff8232b3f0 T pcmcia_intr_disestablish +ffffffff8232b610 T pcmcia_intr_string +ffffffff8232c000 T pcmcia_cis_read_1 +ffffffff8232c0f0 T pcmcia_read_cis +ffffffff8232c1e0 T pcmcia_scan_cis +ffffffff8232dcc0 T pcmcia_parse_cis_tuple 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com_pcmcia_disable +ffffffff82334850 T com_pcmcia_disable1 +ffffffff82335000 t wdc_pcmcia_match +ffffffff823350d0 t wdc_pcmcia_attach +ffffffff82335540 T wdc_pcmcia_detach +ffffffff82335640 T wdc_pcmcia_activate +ffffffff82335760 T wdc_pcmcia_disk_device_interface_callback +ffffffff82335800 T wdc_pcmcia_disk_device_interface +ffffffff82335860 T wdc_pcmcia_lookup +ffffffff82336000 T sm_pcmcia_match +ffffffff82336100 T sm_pcmcia_attach +ffffffff82336320 T sm_pcmcia_detach +ffffffff823363c0 T sm_pcmcia_activate +ffffffff82336450 T sm_pcmcia_funce_enaddr +ffffffff82336470 T sm_pcmcia_ascii_enaddr +ffffffff82336570 T sm_pcmcia_lannid_ciscallback +ffffffff82336680 T sm_pcmcia_enable +ffffffff82336720 T sm_pcmcia_disable +ffffffff82337000 T xe_pcmcia_match +ffffffff82337050 T xe_pcmcia_attach +ffffffff823377a0 T xe_pcmcia_detach +ffffffff82337860 T xe_pcmcia_activate +ffffffff82337b50 T xe_pcmcia_interpret_manfid +ffffffff82337bf0 T xe_pcmcia_funce_enaddr +ffffffff82337c10 T xe_ioctl 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hid_is_collection +ffffffff82394000 T hidkbd_attach +ffffffff823940f0 T hidkbd_parse_desc +ffffffff82394460 T hidkbd_delayed_decode +ffffffff82394480 T hidkbd_attach_wskbd +ffffffff82394510 T hidkbd_detach +ffffffff823945b0 T hidkbd_translate +ffffffff82394600 T hidkbd_apple_translate +ffffffff82394690 T hidkbd_apple_munge +ffffffff823947f0 T hidkbd_apple_tb_munge +ffffffff823949d0 T hidkbd_apple_iso_munge +ffffffff82394c10 T hidkbd_apple_mba_munge +ffffffff82394d70 T hidkbd_apple_iso_mba_munge +ffffffff82394fb0 T hidkbd_input +ffffffff823950b0 T hidkbd_decode +ffffffff82395420 T hidkbd_enable +ffffffff82395460 T hidkbd_set_leds +ffffffff82395540 T hidkbd_ioctl +ffffffff823955e0 T hidkbd_bell +ffffffff82395630 T hidkbd_cngetc +ffffffff823956c0 T hidkbd_hookup_bell +ffffffff82396000 T hidms_setup +ffffffff823965c0 T hidms_attach +ffffffff82396710 T hidms_detach +ffffffff82396750 T hidms_input +ffffffff82396a00 T hidms_enable +ffffffff82396a40 T hidms_ioctl +ffffffff82396c10 T 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usbd_port_disown_to_1_1 +ffffffff823a0af0 T usbd_reset_port +ffffffff823a0cb0 T usbd_find_idesc +ffffffff823a0d60 T usbd_find_edesc +ffffffff823a0e70 T usbd_fill_iface_data +ffffffff823a10e0 T usbd_parse_idesc +ffffffff823a1200 T usbd_free_iface_data +ffffffff823a1270 T usbd_set_config +ffffffff823a12c0 T usbd_set_config_no +ffffffff823a1390 T usbd_set_config_index +ffffffff823a1850 T usbd_setup_pipe +ffffffff823a1940 T usbd_set_address +ffffffff823a1a00 T usbd_getnewaddr +ffffffff823a1a90 T usbd_probe_and_attach +ffffffff823a2010 T usbd_print +ffffffff823a2120 T usbd_new_device +ffffffff823a29a0 T usbd_reload_device_desc +ffffffff823a2a10 T usb_free_device +ffffffff823a2b80 T usbd_fill_deviceinfo +ffffffff823a2ee0 T usbd_get_cdesc +ffffffff823a3000 T usbd_detach +ffffffff823a4000 T usbd_find_quirk +ffffffff823a5000 T uhub_match +ffffffff823a5060 T uhub_attach +ffffffff823a5520 T uhub_detach +ffffffff823a5650 T uhub_explore +ffffffff823a58f0 T uhub_intr +ffffffff823a5a40 T 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uaudio_ranges_add +ffffffff823a7780 T uaudio_ranges_clear +ffffffff823a77f0 T uaudio_ranges_decode +ffffffff823a7880 T uaudio_ranges_encode +ffffffff823a7900 T uaudio_ranges_getrates +ffffffff823a79f0 T uaudio_rates_indexof +ffffffff823a7a70 T uaudio_req_ranges +ffffffff823a80a0 T uaudio_alt_getrates +ffffffff823a8180 T uaudio_clock_id +ffffffff823a8200 T uaudio_getrates +ffffffff823a82e0 T uaudio_feature_addent +ffffffff823a84a0 T uaudio_process_srcs +ffffffff823a8590 T uaudio_process_unit +ffffffff823a9190 T uaudio_process_nch +ffffffff823a9240 T uaudio_unit_getdesc +ffffffff823a9310 T uaudio_setname_dsts +ffffffff823a93c0 T uaudio_setname_srcs +ffffffff823a9470 T uaudio_setname_middle +ffffffff823a9530 T uaudio_mixer_nchan +ffffffff823a95e0 T uaudio_mixer_skip +ffffffff823a9650 T uaudio_mixer_byindex +ffffffff823a9780 T uaudio_process_header +ffffffff823a9830 T uaudio_process_ac_ep +ffffffff823a98f0 T uaudio_process_ac +ffffffff823aa1c0 T uaudio_process_as_ep +ffffffff823aa320 T uaudio_process_as_general +ffffffff823aa430 T uaudio_process_as_format +ffffffff823aa990 T uaudio_process_as +ffffffff823aad60 T uaudio_fixup_params +ffffffff823aaee0 T uaudio_process_conf +ffffffff823ab0a0 T uaudio_xfer_alloc +ffffffff823ab150 T uaudio_xfer_free +ffffffff823ab1d0 T uaudio_stream_close +ffffffff823ab380 T uaudio_stream_open +ffffffff823abac0 T uaudio_adjspf +ffffffff823abbb0 T uaudio_pdata_copy +ffffffff823abd70 T uaudio_pdata_calcsizes +ffffffff823abe70 T uaudio_pdata_xfer +ffffffff823abf60 T uaudio_pdata_intr +ffffffff823ac1d0 T uaudio_psync_xfer +ffffffff823ac2e0 T uaudio_psync_intr +ffffffff823ac3f0 T uaudio_rdata_xfer +ffffffff823ac5e0 T uaudio_rdata_intr +ffffffff823ac9d0 T uaudio_trigger +ffffffff823acc10 T uaudio_print +ffffffff823acd80 T uaudio_get_port_do +ffffffff823ad020 T uaudio_set_port_do +ffffffff823ad270 T uaudio_query_devinfo_do +ffffffff823ae000 T uvideo_match +ffffffff823ae0c0 T uvideo_attach +ffffffff823ae320 T uvideo_detach +ffffffff823ae420 T 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T uath_tx_null +ffffffff8248b740 T uath_data_txeof +ffffffff8248b840 T uath_tx_data +ffffffff8248bb10 T uath_stop +ffffffff8248bc40 T uath_reset_tx_queues +ffffffff8248bd10 T uath_wme_init +ffffffff8248be00 T uath_set_chan +ffffffff8248be80 T uath_set_key +ffffffff8248c020 T uath_set_keys +ffffffff8248c2b0 T uath_set_rxfilter +ffffffff8248d000 T athn_usb_match +ffffffff8248d070 T athn_usb_attach +ffffffff8248d1b0 T athn_usb_detach +ffffffff8248d260 T athn_usb_read +ffffffff8248d300 T athn_usb_write +ffffffff8248d390 T athn_usb_write_barrier +ffffffff8248d3f0 T athn_usb_task +ffffffff8248d4b0 T athn_usb_open_pipes +ffffffff8248d660 T athn_usb_alloc_tx_cmd +ffffffff8248d700 T athn_usb_attachhook +ffffffff8248d8c0 T athn_usb_wait_async +ffffffff8248d8f0 T athn_usb_close_pipes +ffffffff8248d9c0 T athn_usb_free_tx_cmd +ffffffff8248da10 T athn_usb_free_tx_list +ffffffff8248db40 T athn_usb_free_rx_list +ffffffff8248db90 T athn_usb_load_firmware +ffffffff8248dd80 T athn_usb_htc_setup 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athn_usb_newstate_cb +ffffffff82490370 T athn_usb_remove_node +ffffffff82490470 T athn_usb_switch_chan +ffffffff82490650 T athn_usb_create_node +ffffffff824908c0 T athn_usb_newassoc_cb +ffffffff82490a50 T athn_usb_node_set_rates +ffffffff82490b80 T athn_usb_count_active_sta +ffffffff82490bd0 T athn_usb_newauth_cb +ffffffff82490cb0 T athn_usb_node_free_cb +ffffffff82490d70 T athn_usb_ampdu_tx_start +ffffffff82490e80 T athn_usb_ampdu_tx_start_cb +ffffffff82490ee0 T athn_usb_ampdu_tx_stop +ffffffff82490fc0 T athn_usb_ampdu_tx_stop_cb +ffffffff82491020 T athn_usb_clean_nodes +ffffffff824910e0 T athn_usb_updateedca_cb +ffffffff82491120 T athn_usb_updateslot_cb +ffffffff82491160 T athn_usb_set_key_cb +ffffffff82491220 T athn_usb_delete_key_cb +ffffffff82491280 T athn_usb_bcneof +ffffffff824912e0 T athn_usb_swba +ffffffff82491440 T athn_usb_tx_status +ffffffff824914b0 T athn_usb_rx_wmi_ctrl +ffffffff824916d0 T athn_usb_rx_radiotap +ffffffff824918a0 T athn_usb_rx_frame +ffffffff82491b10 T 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upd_attach_sensor_tree +ffffffff82495870 T upd_refresh +ffffffff82495990 T upd_request_children +ffffffff82495ab0 T upd_update_report_cb +ffffffff82495bd0 T upd_lookup_sensor +ffffffff82495c40 T upd_sensor_invalidate +ffffffff82495cc0 T upd_sensor_update +ffffffff82496000 T uwacom_match +ffffffff824960c0 T uwacom_attach +ffffffff824962c0 T uwacom_detach +ffffffff824962e0 T uwacom_enable +ffffffff82496350 T uwacom_ioctl +ffffffff82496400 T uwacom_disable +ffffffff82496430 T uwacom_intr +ffffffff82497000 T bwfm_usb_preinit +ffffffff82497500 T bwfm_usb_txcheck +ffffffff82497540 T bwfm_usb_txdata +ffffffff82497680 T bwfm_usb_txctl +ffffffff82497840 T bwfm_usb_match +ffffffff824978b0 T bwfm_usb_attach +ffffffff82497a40 T bwfm_usb_detach +ffffffff82497b20 T bwfm_usb_dl_cmd +ffffffff82497bc0 T bwfm_usb_load_microcode +ffffffff82497f30 T bwfm_usb_alloc_rx_list +ffffffff82498020 T bwfm_usb_alloc_tx_list +ffffffff82498140 T bwfm_usb_rxeof +ffffffff824982f0 T bwfm_usb_free_rx_list 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andl_refresh +ffffffff824bf360 T andl_refresh_temps +ffffffff824bf4a0 T andl_refresh_volts +ffffffff824bf670 T andl_refresh_tachs +ffffffff824bf790 T andl_readreg +ffffffff824bf800 T andl_writereg +ffffffff824c0000 T spdmem_iic_match +ffffffff824c00a0 T spdmem_iic_attach +ffffffff824c00f0 T spdmem_iic_read +ffffffff824c1000 T sdtemp_match +ffffffff824c1290 T sdtemp_attach +ffffffff824c1340 T sdtemp_refresh +ffffffff824c2000 T lisa_match +ffffffff824c2050 T lisa_attach +ffffffff824c2180 T lisa_refresh +ffffffff824c22a0 T lisa_readreg +ffffffff824c2310 T lisa_writereg +ffffffff824c3000 T ihidev_match +ffffffff824c3050 T ihidev_attach +ffffffff824c3540 T ihidev_detach +ffffffff824c35e0 T ihidev_activate +ffffffff824c3720 T ihidev_hid_command +ffffffff824c3b00 T ihidev_hid_desc_parse +ffffffff824c3d10 T ihidev_intr +ffffffff824c4020 T ihidev_maxrepid +ffffffff824c40d0 T ihidev_submatch +ffffffff824c4120 T ihidev_print +ffffffff824c4180 T ihidev_reset +ffffffff824c43a0 T ihidev_sleep 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+ffffffff8250e560 T pchgpio_intr +ffffffff8250e780 T pchgpio_read_pin +ffffffff8250e870 T pchgpio_write_pin +ffffffff8250e980 T pchgpio_intr_establish +ffffffff8250ebb0 T pchgpio_intr_enable +ffffffff8250ecf0 T pchgpio_intr_disable +ffffffff8250ee30 T pchgpio_save +ffffffff8250eea0 T pchgpio_restore +ffffffff8250ef10 T pchgpio_find_group +ffffffff8250ef90 T pchgpio_intr_handle +ffffffff8250f070 T pchgpio_save_pin +ffffffff8250f240 T pchgpio_restore_pin +ffffffff82510000 T tipmic_match +ffffffff82510050 T tipmic_attach +ffffffff82510250 T tipmic_write_1 +ffffffff82510310 T tipmic_intr +ffffffff82510470 T tipmic_get_lpat +ffffffff825105a0 T tipmic_read_pin +ffffffff825105d0 T tipmic_write_pin +ffffffff82510600 T tipmic_thermal_opreg_handler +ffffffff82510e70 T tipmic_power_opreg_handler +ffffffff82511110 T tipmic_read_1 +ffffffff825111d0 T tipmic_raw_to_temp +ffffffff82512000 T ccpmic_match +ffffffff82512050 T ccpmic_attach +ffffffff82512130 T ccpmic_get_lpat +ffffffff82512250 T ccpmic_read_pin +ffffffff825123d0 T ccpmic_write_pin +ffffffff82512530 T ccpmic_thermal_opreg_handler +ffffffff82512770 T ccpmic_power_opreg_handler +ffffffff82512960 T ccpmic_read_1 +ffffffff82512a20 T ccpmic_write_1 +ffffffff82512ae0 T ccpmic_raw_to_temp +ffffffff82513000 T com_acpi_match +ffffffff82513120 T com_acpi_attach +ffffffff825133a0 T com_acpi_is_designware +ffffffff82513400 T com_acpi_intr_designware +ffffffff82513430 T com_acpi_is_console +ffffffff82514000 T sdhc_acpi_match +ffffffff82514060 T sdhc_acpi_attach +ffffffff82514360 T sdhc_acpi_parse_resources +ffffffff82514420 T sdhc_acpi_card_detect_gpio +ffffffff82514480 T sdhc_acpi_card_detect_intr +ffffffff825144c0 T sdhc_acpi_power_on +ffffffff82514540 T sdhc_acpi_explore +ffffffff82514570 T sdhc_acpi_card_detect_nonremovable +ffffffff825145a0 T sdhc_acpi_do_explore +ffffffff82515000 T dwiic_acpi_match +ffffffff82515050 T dwiic_acpi_attach +ffffffff82515410 T dwiic_acpi_parse_crs +ffffffff82515540 T dwiic_acpi_power +ffffffff82515650 T dwiic_acpi_get_params +ffffffff82515790 T dwiic_i2c_intr_establish +ffffffff82515810 T dwiic_i2c_intr_disestablish +ffffffff82515830 T dwiic_i2c_intr_string +ffffffff825158c0 T dwiic_acpi_acquire_bus +ffffffff82515910 T dwiic_acpi_release_bus +ffffffff82515940 T dwiic_acpi_bus_scan +ffffffff82515980 T dwiic_acpi_found_hid +ffffffff82515cb0 T dwiic_matchhids +ffffffff82515d40 T dwiic_acpi_found_ihidev +ffffffff82515fc0 T dwiic_acpi_found_iatp +ffffffff82517000 T acpicbkbd_match +ffffffff82517030 T acpicbkbd_attach +ffffffff825170d0 T acpicbkbd_activate +ffffffff82517120 T acpicbkbd_get_backlight +ffffffff825171a0 T acpicbkbd_set_backlight +ffffffff82517240 T acpicbkbd_write_backlight +ffffffff82518000 T acpials_match +ffffffff82518090 T acpials_attach +ffffffff82518230 T acpials_read +ffffffff825182b0 T acpials_addtask +ffffffff825182f0 T acpials_notify +ffffffff82518380 T acpials_update +ffffffff82519000 T tpm_match +ffffffff82519050 T tpm_attach +ffffffff82519320 T tpm_activate +ffffffff82519430 T tpm2_start_method +ffffffff825194b0 T tpm_probe +ffffffff82519560 T tpm_init_tis +ffffffff825197d0 T tpm_init_crb +ffffffff82519b10 T tpm_suspend +ffffffff82519c00 T tpm_resume +ffffffff82519c30 T tpm_write_tis +ffffffff82519fb0 T tpm_read_tis +ffffffff8251a190 T tpm_write_crb +ffffffff8251a5a0 T tpm_read_crb +ffffffff8251a8a0 T tpm_request_locality_tis +ffffffff8251a990 T tpm_request_locality_crb +ffffffff8251aa90 T tpm_release_locality_crb +ffffffff8251aae0 T tpm_release_locality_tis +ffffffff8251ab50 T tpm_getburst +ffffffff8251ac00 T tpm_status +ffffffff8251ac20 T tpm_waitfor +ffffffff8251ad00 T tpm_waitfor_status +ffffffff8251b000 T acpihve_match +ffffffff8251b0b0 T acpihve_attach +ffffffff8251c000 T acpisbs_match +ffffffff8251c030 T acpisbs_attach +ffffffff8251c2a0 T acpisbs_activate +ffffffff8251c380 T acpisbs_read +ffffffff8251c440 T acpisbs_setup_sensors +ffffffff8251c560 T acpisbs_refresh_sensors +ffffffff8251c6d0 T acpisbs_notify +ffffffff8251c810 T acpi_smbus_read +ffffffff8251d000 T surface_match +ffffffff8251d060 T surface_attach +ffffffff8251d0c0 T surface_hotkey +ffffffff8251e000 T ipmi_acpi_match +ffffffff8251e030 T ipmi_acpi_attach +ffffffff8251e260 T ipmi_acpi_parse_crs +ffffffff8251f000 T amdgpio_match +ffffffff8251f060 T amdgpio_attach +ffffffff8251f2a0 T amdgpio_activate +ffffffff8251f390 T amdgpio_intr +ffffffff8251f530 T amdgpio_read_pin +ffffffff8251f580 T amdgpio_write_pin +ffffffff8251f5f0 T amdgpio_intr_establish +ffffffff8251f6e0 T amdgpio_intr_enable +ffffffff8251f760 T amdgpio_intr_disable +ffffffff8251f7e0 T amdgpio_save +ffffffff8251f860 T amdgpio_restore +ffffffff8251f8f0 T amdgpio_save_pin +ffffffff8251f960 T amdgpio_restore_pin +ffffffff8251f9d0 T amdgpio_pin_intr +ffffffff82520000 T acpihid_match +ffffffff82520030 T acpihid_attach +ffffffff82520210 T acpihid_init_dsm +ffffffff82520370 T acpihid_eval +ffffffff82520590 T acpihid_notify +ffffffff825205f0 T acpihid_button_array_enable +ffffffff82521000 t iosf_acpi_match +ffffffff82521050 t iosf_acpi_attach +ffffffff82521140 t iosf_acpi_mbi_mdr_rd +ffffffff825211b0 t iosf_acpi_mbi_mdr_wr +ffffffff82522000 T acpi_match +ffffffff82522060 T acpi_attach +ffffffff825220a0 T acpi_probe +ffffffff82522240 T acpi_map +ffffffff82522330 T acpi_unmap +ffffffff82522380 T acpi_bus_space_map +ffffffff825223a0 T acpi_bus_space_unmap +ffffffff825223c0 T acpi_intr_establish +ffffffff82522510 T acpi_intr_disestablish +ffffffff82522520 T acpi_scan +ffffffff825226d0 T acpi_acquire_glk +ffffffff82522730 T acpi_release_glk +ffffffff82522780 T acpi_attach_machdep +ffffffff82522910 T acpi_sleep_cpu +ffffffff82522ab0 T acpi_resume_cpu +ffffffff82522bb0 T sleep_mp +ffffffff82522cb0 T resume_mp +ffffffff82522da0 T acpi_iommu_device_map +ffffffff82523000 T hibernate_resume_machdep +ffffffff82523050 T hibernate_drop_to_real_mode +ffffffff82523060 T hibernate_activate_resume_pt_machdep +ffffffff825230a0 T hibernate_switch_stack_machdep +ffffffff825230e0 T hibernate_flush +ffffffff82523110 T acpi_savecpu +ffffffff82524000 T sleep_showstate +ffffffff82524100 T sleep_setstate +ffffffff82524160 T gosleep +ffffffff82524220 T sleep_abort +ffffffff82524250 T sleep_resume +ffffffff825242c0 T suspend_finish +ffffffff82525000 T acpipci_match +ffffffff82525030 T acpipci_attach +ffffffff825252f0 T acpipci_osc +ffffffff82525430 T acpipci_parse_resources +ffffffff82525540 T acpipci_attach_bus +ffffffff82525710 T acpipci_print +ffffffff82525780 T acpipci_attach_busses +ffffffff82526000 T efiopen +ffffffff82526040 T eficlose +ffffffff82526070 T efiioctl +ffffffff82526110 T efiioc_get_table +ffffffff82526270 T efiioc_var_get +ffffffff825264f0 T efiioc_var_next +ffffffff82526710 T efiioc_var_set +ffffffff825269c0 T efi_adapt_error +ffffffff82527000 T efi_match +ffffffff82527060 T efi_attach +ffffffff82527420 T efi_map_runtime +ffffffff825275a0 T efi_enter +ffffffff82527630 T efi_leave +ffffffff82527690 T efi_gettime +ffffffff82527860 T efi_settime +ffffffff825279c0 T efi_fault +ffffffff82528000 T vmm_probe +ffffffff82528050 T vmm_attach +ffffffff825283e0 T vmm_activate +ffffffff82528600 T vmm_enabled +ffffffff82528690 T vmm_quiesce_vmx +ffffffff82528860 T vmm_stop +ffffffff825289b0 T vmm_start +ffffffff82528aa0 T vmmopen +ffffffff82528af0 T vmmioctl +ffffffff82528f00 T vm_create +ffffffff82529330 T vm_run +ffffffff82529520 T vm_get_info +ffffffff82529770 T vm_terminate +ffffffff825298e0 T vm_resetcpu +ffffffff82529a40 T vm_intr_pending +ffffffff82529b10 T vm_rwregs +ffffffff82529c60 T vm_mprotect_ept +ffffffff82529f10 T vm_rwvmparams +ffffffff8252a0d0 T pledge_ioctl_vmm +ffffffff8252a1b0 T vmmclose +ffffffff8252a1e0 T vm_find +ffffffff8252a300 T vcpu_reset_regs +ffffffff8252a350 T vmm_init_pvclock +ffffffff8252a430 T vcpu_readregs_vmx +ffffffff8252a860 T vcpu_writeregs_vmx +ffffffff8252acd0 T vcpu_readregs_svm +ffffffff8252b180 T vcpu_writeregs_svm +ffffffff8252b650 T vmm_get_guest_memtype +ffffffff8252b6d0 T vmx_mprotect_ept +ffffffff8252b950 T vmx_pmap_find_pte_ept +ffffffff8252ba20 T start_vmm_on_cpu +ffffffff8252bb00 T stop_vmm_on_cpu +ffffffff8252bba0 T vmclear_on_cpu +ffffffff8252bc20 T vm_create_check_mem_ranges +ffffffff8252bd80 T vm_impl_init +ffffffff8252be30 T vm_teardown +ffffffff8252bfe0 T vcpu_init +ffffffff8252c0b0 T vm_impl_init_vmx +ffffffff8252c1d0 T vm_impl_init_svm +ffffffff8252c2f0 T vm_impl_deinit_vmx +ffffffff8252c320 T vm_impl_deinit_svm +ffffffff8252c350 T vm_impl_deinit +ffffffff8252c3c0 T vcpu_reload_vmcs_vmx +ffffffff8252c500 T vcpu_reset_regs_svm +ffffffff8252c8a0 T svm_setmsrbrw +ffffffff8252ca10 T svm_setmsrbr +ffffffff8252cae0 T vmm_alloc_vpid +ffffffff8252cc00 T svm_setmsrbw +ffffffff8252cce0 T vmx_setmsrbr +ffffffff8252cd90 T vmx_setmsrbw +ffffffff8252ce40 T vmx_setmsrbrw +ffffffff8252cf50 T svm_set_clean +ffffffff8252cfa0 T svm_set_dirty +ffffffff8252cff0 T vcpu_reset_regs_vmx +ffffffff8252db80 T vcpu_vmx_check_cap +ffffffff8252dc80 T vcpu_vmx_compute_ctrl +ffffffff8252de60 T vcpu_init_vmx +ffffffff8252e200 T vcpu_deinit_vmx +ffffffff8252e380 T vcpu_init_svm +ffffffff8252e510 T vcpu_deinit_svm +ffffffff8252e650 T vmm_free_vpid +ffffffff8252e6c0 T vcpu_deinit +ffffffff8252e710 T vcpu_run_vmx +ffffffff8252ef20 T vcpu_run_svm +ffffffff8252f510 T vcpu_must_stop +ffffffff8252f580 T vmm_fpurestore +ffffffff8252f650 T vmm_fpusave +ffffffff8252f6d0 T vmm_translate_gva +ffffffff8252fa00 T vmm_update_pvclock +ffffffff8252fb00 T vmx_get_exit_info +ffffffff8252fb60 T vmx_handle_exit +ffffffff8252ff50 T vmx_instruction_error_decode +ffffffff82530120 T vmm_get_guest_cpu_cpl +ffffffff825301d0 T vmx_handle_intr +ffffffff82530260 T svm_handle_hlt +ffffffff825302b0 T vmx_handle_hlt +ffffffff82530360 T svm_handle_exit +ffffffff82530640 T svm_handle_np_fault +ffffffff825307f0 T vmm_handle_cpuid +ffffffff82530e70 T svm_handle_msr +ffffffff82531130 T svm_handle_xsetbv +ffffffff82531180 T svm_handle_inout +ffffffff825312a0 T vmm_inject_ud +ffffffff825312d0 T vmm_inject_db +ffffffff82531300 T vmx_handle_np_fault +ffffffff82531480 T vmx_handle_inout +ffffffff82531620 T vmx_handle_cr +ffffffff82531890 T vmx_handle_rdmsr +ffffffff82531960 T vmx_handle_wrmsr +ffffffff82531bc0 T vmx_handle_xsetbv +ffffffff82531c50 T vmm_inject_gp +ffffffff82531c80 T vmx_get_exit_qualification +ffffffff82531ce0 T vmx_get_guest_faulttype +ffffffff82531d80 T svm_get_guest_faulttype +ffffffff82531db0 T svm_fault_page +ffffffff82531e40 T vmx_fault_page +ffffffff82531fa0 T vmm_get_guest_cpu_mode +ffffffff825320b0 T vmx_load_pdptes +ffffffff82532330 T vmx_handle_cr0_write +ffffffff82532540 T vmx_handle_cr4_write +ffffffff825325e0 T vmm_handle_xsetbv +ffffffff825326d0 T vmx_handle_misc_enable_msr +ffffffff82532730 T vmm_pat_is_valid +ffffffff82532810 T vmm_gpa_is_valid +ffffffff82532880 T vmx_exit_reason_decode +ffffffff825328c0 T svm_exit_reason_decode +ffffffff825336d0 T vcpu_state_decode +ffffffff82534000 T vmm_dispatch_intr +ffffffff82534020 T vmxon +ffffffff82534050 T vmxoff +ffffffff82534080 T vmclear +ffffffff825340b0 T vmptrld +ffffffff825340e0 T vmptrst +ffffffff82534110 T vmwrite +ffffffff82534140 T vmread +ffffffff82534170 T invvpid +ffffffff825341a0 T invept +ffffffff825341d0 T vmx_enter_guest +ffffffff825341fb t skip_init +ffffffff825342c8 t no_l1df_msr +ffffffff825342cb t l1df_tlb_loop +ffffffff825342e4 t l1df_tlb_done +ffffffff825342ec t l1df_load_cache +ffffffff82534303 t done_flush +ffffffff82534396 t do_resume +ffffffff8253441b t fail_launch_or_resume +ffffffff8253445d t fail_launch_unknown +ffffffff8253446a t fail_launch_invalid_vmcs +ffffffff82534477 t fail_launch_valid_vmcs +ffffffff82534494 t vmx_exit_handler_asm +ffffffff82534559 t restore_host +ffffffff825345f0 T svm_enter_guest +ffffffff82534780 t restore_host_svm +ffffffff82535000 T sdmmc_match +ffffffff82535050 T sdmmc_attach +ffffffff82535390 T sdmmc_detach +ffffffff82535440 T sdmmc_activate +ffffffff82535510 T sdmmc_discover_task +ffffffff825355d0 T sdmmc_create_thread +ffffffff82535640 T sdmmc_holds_root_device +ffffffff825356a0 T sdmmc_task_thread +ffffffff82535890 T sdmmc_needs_discover +ffffffff82535940 T sdmmc_del_task +ffffffff825359f0 T sdmmc_card_detach +ffffffff82535ad0 T sdmmc_add_task +ffffffff82535b50 T sdmmc_card_attach +ffffffff82535c60 T sdmmc_enable +ffffffff82535db0 T sdmmc_scan +ffffffff82535e40 T sdmmc_init +ffffffff82535f40 T sdmmc_disable +ffffffff825360a0 T sdmmc_function_free +ffffffff825360c0 T sdmmc_delay +ffffffff82536110 T sdmmc_select_card +ffffffff82536290 T sdmmc_set_bus_power +ffffffff82536450 T sdmmc_function_alloc +ffffffff825364e0 T sdmmc_app_command +ffffffff82536670 T sdmmc_mmc_command +ffffffff825366f0 T sdmmc_go_idle_state +ffffffff82536810 T sdmmc_send_if_cond +ffffffff82536960 T sdmmc_set_relative_addr +ffffffff82537000 T sdmmc_cisptr +ffffffff825370a0 T sdmmc_read_cis +ffffffff825373b0 T sdmmc_print_cis +ffffffff82537520 T sdmmc_check_cis_quirks +ffffffff82538000 T sdmmc_io_enable +ffffffff825382a0 T sdmmc_io_reset +ffffffff825383d0 T sdmmc_io_send_op_cond +ffffffff82538540 T sdmmc_io_scan +ffffffff82538690 T sdmmc_io_init +ffffffff825387c0 T sdmmc_io_set_highspeed +ffffffff82538a70 T sdmmc_io_set_bus_width +ffffffff82538d00 T sdmmc_io_function_ready +ffffffff82538e80 T sdmmc_io_read_1 +ffffffff82538fd0 T sdmmc_io_function_enable +ffffffff825393a0 T sdmmc_io_write_1 +ffffffff82539520 T sdmmc_io_function_disable +ffffffff825397a0 T sdmmc_io_attach +ffffffff82539890 T sdmmc_print +ffffffff82539ae0 T sdmmc_submatch +ffffffff82539b60 T sdmmc_io_detach +ffffffff82539c10 T sdmmc_io_rw_direct +ffffffff82539db0 T sdmmc_io_rw_extended_subr +ffffffff82539f50 T sdmmc_io_rw_extended +ffffffff8253a340 T sdmmc_io_read_2 +ffffffff8253a4a0 T sdmmc_io_write_2 +ffffffff8253a600 T sdmmc_io_read_4 +ffffffff8253a760 T sdmmc_io_write_4 +ffffffff8253a8c0 T sdmmc_io_read_multi_1 +ffffffff8253a9b0 T sdmmc_io_write_multi_1 +ffffffff8253aaa0 T sdmmc_io_read_region_1 +ffffffff8253ab90 T sdmmc_io_write_region_1 +ffffffff8253ac80 T sdmmc_io_xchg +ffffffff8253ae10 T sdmmc_intr_enable +ffffffff8253b080 T sdmmc_intr_disable +ffffffff8253b2f0 T sdmmc_intr_establish +ffffffff8253b3f0 T sdmmc_intr_disestablish +ffffffff8253b4e0 T sdmmc_card_intr +ffffffff8253b530 T sdmmc_intr_task +ffffffff8253b5c0 T sdmmc_io_set_blocklen +ffffffff8253c000 T sdmmc_mem_enable +ffffffff8253c4e0 T sdmmc_mem_send_op_cond +ffffffff8253c690 T sdmmc_mem_signal_voltage +ffffffff8253c750 T sdmmc_mem_scan +ffffffff8253ca60 T sdmmc_decode_csd +ffffffff8253ce70 T sdmmc_decode_cid +ffffffff8253d2b0 T sdmmc_mem_send_scr +ffffffff8253d3f0 T sdmmc_mem_decode_scr +ffffffff8253d470 T sdmmc_mem_send_cxd_data +ffffffff8253d5e0 T sdmmc_mem_set_bus_width +ffffffff8253d700 T sdmmc_mem_sd_switch +ffffffff8253d9b0 T sdmmc_be512_to_bitfield512 +ffffffff8253da60 T sdmmc_mem_mmc_switch +ffffffff8253db50 T sdmmc_mem_init +ffffffff8253dca0 T sdmmc_mem_set_blocklen +ffffffff8253dda0 T sdmmc_mem_sd_init +ffffffff8253e350 T sdmmc_mem_mmc_init +ffffffff8253ec70 T sdmmc_mem_select_transfer_mode +ffffffff8253ecf0 T sdmmc_mem_execute_tuning +ffffffff8253ed80 T sdmmc_mem_read_block_subr +ffffffff8253f0e0 T sdmmc_mem_single_read_block +ffffffff8253f1b0 T sdmmc_mem_read_block +ffffffff8253f370 T sdmmc_mem_write_block_subr +ffffffff8253f6c0 T sdmmc_mem_single_write_block +ffffffff8253f790 T sdmmc_mem_write_block +ffffffff8253f950 T sdmmc_mem_hibernate_write +ffffffff82540000 T sdmmc_scsi_cmd +ffffffff825401f0 T sdmmc_minphys +ffffffff82540270 T sdmmc_scsi_attach +ffffffff82540460 T sdmmc_alloc_ccbs +ffffffff825405a0 T sdmmc_free_ccbs +ffffffff82540600 T sdmmc_scsi_detach +ffffffff82540760 T sdmmc_stimeout +ffffffff825407e0 T sdmmc_ccb_alloc +ffffffff82540890 T sdmmc_ccb_free +ffffffff82540970 T sdmmc_inquiry +ffffffff82540be0 T sdmmc_start_xs +ffffffff82540cd0 T sdmmc_complete_xs +ffffffff82540da0 T sdmmc_done_xs +ffffffff82540df0 T sdmmc_scsi_hibernate_io +ffffffff82541000 T bwfm_sdio_preinit +ffffffff825414f0 T bwfm_sdio_txcheck +ffffffff82541530 T bwfm_sdio_txdata +ffffffff825415a0 T bwfm_sdio_txctl +ffffffff825416f0 T bwfm_sdio_buscore_read +ffffffff82541700 T bwfm_sdio_buscore_write +ffffffff82541720 T bwfm_sdio_buscore_prepare +ffffffff82541860 T bwfm_sdio_buscore_activate +ffffffff825418e0 T bwfm_sdio_match +ffffffff825419b0 T bwfm_sdio_attach +ffffffff82541c70 T bwfm_sdio_detach +ffffffff82541cd0 T bwfm_sdio_task +ffffffff82541e30 T bwfm_sdio_write_1 +ffffffff82541e60 T bwfm_sdio_read_1 +ffffffff82541e90 T bwfm_sdio_write_4 +ffffffff82541f40 T bwfm_sdio_read_4 +ffffffff82541ff0 T bwfm_sdio_load_microcode +ffffffff82542250 T bwfm_sdio_clkctl +ffffffff82542380 T bwfm_sdio_dev_write +ffffffff825423d0 T bwfm_sdio_intr +ffffffff82542410 T bwfm_sdio_ram_read_write +ffffffff82542640 T bwfm_sdio_htclk +ffffffff825428a0 T bwfm_sdio_readshared +ffffffff82542970 T bwfm_sdio_dev_read +ffffffff825429b0 T bwfm_sdio_rx_frames +ffffffff82542d40 T bwfm_sdio_tx_frames +ffffffff82542e20 T bwfm_sdio_backplane +ffffffff82542ed0 T bwfm_sdio_buf_read +ffffffff82542fb0 T bwfm_sdio_buf_write +ffffffff82543060 T bwfm_sdio_frame_read_write +ffffffff825431e0 T bwfm_sdio_newbuf +ffffffff82543260 T bwfm_sdio_tx_ok +ffffffff825432b0 T bwfm_sdio_tx_ctrlframe +ffffffff825433b0 T bwfm_sdio_tx_dataframe +ffffffff82543500 T bwfm_sdio_rx_glom +ffffffff82544000 T onewire_match +ffffffff82544050 T onewire_attach +ffffffff825440f0 T onewire_detach +ffffffff82544160 T onewire_activate +ffffffff82544180 T onewire_scan +ffffffff82544390 T onewire_createthread +ffffffff82544400 T onewire_print +ffffffff825444d0 T onewirebus_print +ffffffff82544520 T onewire_lock +ffffffff82544540 T onewire_unlock +ffffffff82544560 T onewire_reset +ffffffff82544580 T onewire_bit +ffffffff825445a0 T onewire_read_byte +ffffffff825446e0 T onewire_write_byte +ffffffff825447c0 T onewire_read_block +ffffffff82544860 T onewire_write_block +ffffffff82544900 T onewire_triplet +ffffffff825449e0 T onewire_matchrom +ffffffff82544b30 T onewire_search +ffffffff82544ec0 T onewire_thread +ffffffff82545000 T onewire_crc +ffffffff825450e0 T onewire_crc16 +ffffffff825451c0 T onewire_famname +ffffffff82545200 T onewire_matchbyfam +ffffffff82546000 T owid_match +ffffffff82546030 T owid_attach +ffffffff82546100 T owid_detach +ffffffff82546140 T owid_activate +ffffffff82547000 T owsbm_match +ffffffff82547030 T owsbm_attach +ffffffff825471d0 T owsbm_detach +ffffffff82547240 T owsbm_activate +ffffffff82547270 T owsbm_update +ffffffff82548000 T owtemp_match +ffffffff82548030 T owtemp_attach +ffffffff82548130 T owtemp_detach +ffffffff825481a0 T owtemp_activate +ffffffff825481d0 T owtemp_update +ffffffff82549000 T owctr_match +ffffffff82549030 T owctr_attach +ffffffff82549180 T owctr_detach +ffffffff825491f0 T owctr_activate +ffffffff82549220 T owctr_update +ffffffff82549250 T owctr_update_counter +ffffffff8254a000 A __text_page_start +ffffffff8254a000 T Xsyscall_meltdown +ffffffff8254a00c T Xsyscall +ffffffff8254a26e t Xsyscall_trampback +ffffffff8254a280 T intr_user_exit +ffffffff8254a2c2 t intr_user_exit_post_ast +ffffffff8254a3ee t Xiretq_trampback +ffffffff8254a3fa T doreti_iret +ffffffff8254b000 T alltraps +ffffffff8254b138 T recall_trap +ffffffff8254b150 T alltraps_kern +ffffffff8254b153 T alltraps_kern_meltdown +ffffffff8254c000 ? Xsyscall32 +ffffffff8254c000 A __kutext_start +ffffffff8254c000 A __text_page_end +ffffffff8254d000 ? Xtrap00 +ffffffff8254d010 ? Xtrap01 +ffffffff8254d020 ? Xtrap02 +ffffffff8254d028 c calltrap_specstk +ffffffff8254d0f0 ? calltrap_specstk_tramp +ffffffff8254d110 ? Xtrap03 +ffffffff8254d120 ? Xtrap04 +ffffffff8254d130 ? Xtrap05 +ffffffff8254d140 ? Xtrap06 +ffffffff8254d150 ? Xtrap07 +ffffffff8254d160 ? Xtrap08 +ffffffff8254d170 ? Xtrap09 +ffffffff8254d180 ? Xtrap0a +ffffffff8254d190 ? Xtrap0b +ffffffff8254d1a0 ? Xtrap0c +ffffffff8254d1b0 ? Xtrap0d +ffffffff8254d240 ? Xtrap0e +ffffffff8254d250 ? Xintrspurious +ffffffff8254d250 ? Xtrap0f +ffffffff8254d260 ? Xtrap10 +ffffffff8254d270 ? Xtrap11 +ffffffff8254d280 ? Xtrap12 +ffffffff8254d290 ? Xtrap13 +ffffffff8254d2a0 ? Xtrap14 +ffffffff8254d2b0 ? Xtrap15 +ffffffff8254d2c0 ? Xtrap16 +ffffffff8254d2c0 ? Xtrap17 +ffffffff8254d2c0 ? Xtrap18 +ffffffff8254d2c0 ? Xtrap19 +ffffffff8254d2c0 ? Xtrap1a +ffffffff8254d2c0 ? Xtrap1b +ffffffff8254d2c0 ? Xtrap1c +ffffffff8254d2c0 ? Xtrap1d +ffffffff8254d2c0 ? Xtrap1e +ffffffff8254d2c0 ? Xtrap1f +ffffffff8254d2d0 ? x2apic_eoi +ffffffff8254d2f0 ? Xintr_lapic_ipi +ffffffff8254d330 ? Xipi_invltlb +ffffffff8254d360 ? Xipi_invlpg +ffffffff8254d390 ? Xipi_invlrange +ffffffff8254d3d0 ? Xipi_invltlb_pcid +ffffffff8254d410 ? Xipi_invlpg_pcid +ffffffff8254d460 ? Xipi_invlrange_pcid +ffffffff8254d4d0 ? Xintr_lapic_ltimer +ffffffff8254d510 ? Xintr_xen_upcall +ffffffff8254d550 ? Xintr_hyperv_upcall +ffffffff8254d590 ? Xintr_legacy0 +ffffffff8254d5d0 ? Xintr_legacy1 +ffffffff8254d610 ? Xintr_legacy2 +ffffffff8254d650 ? Xintr_legacy3 +ffffffff8254d690 ? Xintr_legacy4 +ffffffff8254d6d0 ? Xintr_legacy5 +ffffffff8254d710 ? Xintr_legacy6 +ffffffff8254d750 ? Xintr_legacy7 +ffffffff8254d790 ? Xintr_legacy8 +ffffffff8254d7d0 ? Xintr_legacy9 +ffffffff8254d810 ? Xintr_legacy10 +ffffffff8254d850 ? Xintr_legacy11 +ffffffff8254d890 ? Xintr_legacy12 +ffffffff8254d8d0 ? Xintr_legacy13 +ffffffff8254d910 ? Xintr_legacy14 +ffffffff8254d950 ? Xintr_legacy15 +ffffffff8254d990 ? Xintr_ioapic_edge0 +ffffffff8254d9d0 ? Xintr_ioapic_edge1 +ffffffff8254da10 ? Xintr_ioapic_edge2 +ffffffff8254da50 ? Xintr_ioapic_edge3 +ffffffff8254da90 ? Xintr_ioapic_edge4 +ffffffff8254dad0 ? Xintr_ioapic_edge5 +ffffffff8254db10 ? Xintr_ioapic_edge6 +ffffffff8254db50 ? Xintr_ioapic_edge7 +ffffffff8254db90 ? Xintr_ioapic_edge8 +ffffffff8254dbd0 ? Xintr_ioapic_edge9 +ffffffff8254dc10 ? Xintr_ioapic_edge10 +ffffffff8254dc50 ? Xintr_ioapic_edge11 +ffffffff8254dc90 ? Xintr_ioapic_edge12 +ffffffff8254dcd0 ? Xintr_ioapic_edge13 +ffffffff8254dd10 ? Xintr_ioapic_edge14 +ffffffff8254dd50 ? Xintr_ioapic_edge15 +ffffffff8254dd90 ? Xintr_ioapic_edge16 +ffffffff8254ddd0 ? Xintr_ioapic_edge17 +ffffffff8254de10 ? Xintr_ioapic_edge18 +ffffffff8254de50 ? Xintr_ioapic_edge19 +ffffffff8254de90 ? Xintr_ioapic_edge20 +ffffffff8254ded0 ? Xintr_ioapic_edge21 +ffffffff8254df10 ? Xintr_ioapic_edge22 +ffffffff8254df50 ? Xintr_ioapic_edge23 +ffffffff8254df90 ? Xintr_ioapic_edge24 +ffffffff8254dfd0 ? Xintr_ioapic_edge25 +ffffffff8254e010 ? Xintr_ioapic_edge26 +ffffffff8254e050 ? Xintr_ioapic_edge27 +ffffffff8254e090 ? Xintr_ioapic_edge28 +ffffffff8254e0d0 ? Xintr_ioapic_edge29 +ffffffff8254e110 ? Xintr_ioapic_edge30 +ffffffff8254e150 ? Xintr_ioapic_edge31 +ffffffff8254e190 ? Xintr_ioapic_edge32 +ffffffff8254e1d0 ? Xintr_ioapic_edge33 +ffffffff8254e210 ? Xintr_ioapic_edge34 +ffffffff8254e250 ? Xintr_ioapic_edge35 +ffffffff8254e290 ? Xintr_ioapic_edge36 +ffffffff8254e2d0 ? Xintr_ioapic_edge37 +ffffffff8254e310 ? Xintr_ioapic_edge38 +ffffffff8254e350 ? Xintr_ioapic_edge39 +ffffffff8254e390 ? Xintr_ioapic_edge40 +ffffffff8254e3d0 ? Xintr_ioapic_edge41 +ffffffff8254e410 ? Xintr_ioapic_edge42 +ffffffff8254e450 ? Xintr_ioapic_edge43 +ffffffff8254e490 ? Xintr_ioapic_edge44 +ffffffff8254e4d0 ? Xintr_ioapic_edge45 +ffffffff8254e510 ? Xintr_ioapic_edge46 +ffffffff8254e550 ? Xintr_ioapic_edge47 +ffffffff8254e590 ? Xintr_ioapic_edge48 +ffffffff8254e5d0 ? Xintr_ioapic_edge49 +ffffffff8254e610 ? Xintr_ioapic_edge50 +ffffffff8254e650 ? Xintr_ioapic_edge51 +ffffffff8254e690 ? Xintr_ioapic_edge52 +ffffffff8254e6d0 ? Xintr_ioapic_edge53 +ffffffff8254e710 ? Xintr_ioapic_edge54 +ffffffff8254e750 ? Xintr_ioapic_edge55 +ffffffff8254e790 ? Xintr_ioapic_edge56 +ffffffff8254e7d0 ? Xintr_ioapic_edge57 +ffffffff8254e810 ? Xintr_ioapic_edge58 +ffffffff8254e850 ? Xintr_ioapic_edge59 +ffffffff8254e890 ? Xintr_ioapic_edge60 +ffffffff8254e8d0 ? Xintr_ioapic_edge61 +ffffffff8254e910 ? Xintr_ioapic_edge62 +ffffffff8254e950 ? Xintr_ioapic_edge63 +ffffffff8254e990 ? Xintr_ioapic_level0 +ffffffff8254e9d0 ? Xintr_ioapic_level1 +ffffffff8254ea10 ? Xintr_ioapic_level2 +ffffffff8254ea50 ? Xintr_ioapic_level3 +ffffffff8254ea90 ? Xintr_ioapic_level4 +ffffffff8254ead0 ? Xintr_ioapic_level5 +ffffffff8254eb10 ? Xintr_ioapic_level6 +ffffffff8254eb50 ? Xintr_ioapic_level7 +ffffffff8254eb90 ? Xintr_ioapic_level8 +ffffffff8254ebd0 ? Xintr_ioapic_level9 +ffffffff8254ec10 ? Xintr_ioapic_level10 +ffffffff8254ec50 ? Xintr_ioapic_level11 +ffffffff8254ec90 ? Xintr_ioapic_level12 +ffffffff8254ecd0 ? Xintr_ioapic_level13 +ffffffff8254ed10 ? Xintr_ioapic_level14 +ffffffff8254ed50 ? Xintr_ioapic_level15 +ffffffff8254ed90 ? Xintr_ioapic_level16 +ffffffff8254edd0 ? Xintr_ioapic_level17 +ffffffff8254ee10 ? Xintr_ioapic_level18 +ffffffff8254ee50 ? Xintr_ioapic_level19 +ffffffff8254ee90 ? Xintr_ioapic_level20 +ffffffff8254eed0 ? Xintr_ioapic_level21 +ffffffff8254ef10 ? Xintr_ioapic_level22 +ffffffff8254ef50 ? Xintr_ioapic_level23 +ffffffff8254ef90 ? Xintr_ioapic_level24 +ffffffff8254efd0 ? Xintr_ioapic_level25 +ffffffff8254f010 ? Xintr_ioapic_level26 +ffffffff8254f050 ? Xintr_ioapic_level27 +ffffffff8254f090 ? Xintr_ioapic_level28 +ffffffff8254f0d0 ? Xintr_ioapic_level29 +ffffffff8254f110 ? Xintr_ioapic_level30 +ffffffff8254f150 ? Xintr_ioapic_level31 +ffffffff8254f190 ? Xintr_ioapic_level32 +ffffffff8254f1d0 ? Xintr_ioapic_level33 +ffffffff8254f210 ? Xintr_ioapic_level34 +ffffffff8254f250 ? Xintr_ioapic_level35 +ffffffff8254f290 ? Xintr_ioapic_level36 +ffffffff8254f2d0 ? Xintr_ioapic_level37 +ffffffff8254f310 ? Xintr_ioapic_level38 +ffffffff8254f350 ? Xintr_ioapic_level39 +ffffffff8254f390 ? Xintr_ioapic_level40 +ffffffff8254f3d0 ? Xintr_ioapic_level41 +ffffffff8254f410 ? Xintr_ioapic_level42 +ffffffff8254f450 ? Xintr_ioapic_level43 +ffffffff8254f490 ? Xintr_ioapic_level44 +ffffffff8254f4d0 ? Xintr_ioapic_level45 +ffffffff8254f510 ? Xintr_ioapic_level46 +ffffffff8254f550 ? Xintr_ioapic_level47 +ffffffff8254f590 ? Xintr_ioapic_level48 +ffffffff8254f5d0 ? Xintr_ioapic_level49 +ffffffff8254f610 ? Xintr_ioapic_level50 +ffffffff8254f650 ? Xintr_ioapic_level51 +ffffffff8254f690 ? Xintr_ioapic_level52 +ffffffff8254f6d0 ? Xintr_ioapic_level53 +ffffffff8254f710 ? Xintr_ioapic_level54 +ffffffff8254f750 ? Xintr_ioapic_level55 +ffffffff8254f790 ? Xintr_ioapic_level56 +ffffffff8254f7d0 ? Xintr_ioapic_level57 +ffffffff8254f810 ? Xintr_ioapic_level58 +ffffffff8254f850 ? Xintr_ioapic_level59 +ffffffff8254f890 ? Xintr_ioapic_level60 +ffffffff8254f8d0 ? Xintr_ioapic_level61 +ffffffff8254f910 ? Xintr_ioapic_level62 +ffffffff8254f950 ? Xintr_ioapic_level63 +ffffffff82550000 ? codepatch_fill_nop +ffffffff82550000 A __cptext_start +ffffffff82550000 A __kutext_end +ffffffff825500b0 ? codepatch_maprw +ffffffff82550190 ? codepatch_unmaprw +ffffffff82550200 ? codepatch_nop +ffffffff82550360 ? codepatch_replace +ffffffff82550510 ? codepatch_call +ffffffff82550530 ? codepatch_jmp +ffffffff82551000 A __cptext_end +ffffffff82551000 A __rodata_start +ffffffff82551000 C _etext +ffffffff82551000 C etext +ffffffff82552000 r seeprom_read +ffffffff82552004 r icl_mg_pll_find_divisors.div1_vals +ffffffff82552028 r gen9bc_tgp_ddc_pin_map +ffffffff82552038 r athn_ac2qid +ffffffff82552038 r athn_ac2qid +ffffffff82552038 r athn_ac2qid +ffffffff82552044 r rtwn_get_rssi.cckoff +ffffffff8255206c r rsu_ac2qid +ffffffff8255207c r pckbc_portcmd +ffffffff82552080 r tht_fifo_write_pad.pad +ffffffff82552088 r rsu_get_rssi.cckoff +ffffffff8255209c r adlp_n_revids +ffffffff825520ec r apple_iso_trans +ffffffff825520f0 r dg2_g12_revid_step_tbl +ffffffff825520f8 r wihap_check_tx.txratetable +ffffffff825520fc r dmamode +ffffffff82552124 r gen9_edram_size_mb.sets +ffffffff82553000 r isomappings +ffffffff82553080 r unimappings +ffffffff82553230 r replacements +ffffffff82556b18 r cmd0646_9_tim_udma +ffffffff825aa5a3 r pp_r600_decoded_lanes +ffffffff825c5906 r cmd680_setup_channel.udma_tbl +ffffffff825cd596 r apollo_udma33_tim +ffffffff825d3683 r substchar +ffffffff825d576a r apollo_udma100_tim +ffffffff825fd061 r apollo_udma66_tim +ffffffff826044f4 r apollo_pio_rec +ffffffff826138ce r cy_pio_rec +ffffffff82642dd9 r apollo_udma133_tim +ffffffff8264f980 R drm_ca +ffffffff8264f9a8 R drm_filtops +ffffffff8264f9d8 R drmread_filtops +ffffffff82650000 r vga_emulops +ffffffff82650048 R vga_stdscreen +ffffffff82650078 R vga_stdscreen_mono +ffffffff826500a8 R vga_stdscreen_bf +ffffffff826500d8 R vga_40lscreen +ffffffff82650108 R vga_40lscreen_mono +ffffffff82650138 R vga_40lscreen_bf +ffffffff82650168 R vga_50lscreen +ffffffff82650198 R vga_50lscreen_mono +ffffffff826501c8 R vga_50lscreen_bf +ffffffff826501f8 R vga_screenlist +ffffffff82650208 R vga_screenlist_mono +ffffffff82650218 R vga_accessops +ffffffff82650278 r i945_wm_info +ffffffff826502b0 r bgansitopc +ffffffff826502b8 r pctoansi +ffffffff826502f8 r sdma_offsets +ffffffff826502f8 r sdma_offsets +ffffffff82650328 r iha_rate_tbl +ffffffff82650360 r i830_a_wm_info +ffffffff82650398 r gen9_edram_size_mb.ways +ffffffff82650400 r aggr_periodic_times +ffffffff82650480 r jsl_ehl_revids +ffffffff826504f8 r michael_final.pad +ffffffff82650520 r rt_copysa.maskarray +ffffffff82650528 r i915_wm_info +ffffffff82650530 r amdgpu_ih_clientid_jpeg +ffffffff82650530 r amdgpu_ih_clientid_uvds +ffffffff82650530 r amdgpu_ih_clientid_vcns +ffffffff82650530 r amdgpu_ih_clientid_vcns +ffffffff82650530 r amdgpu_ih_clientid_vcns +ffffffff82650568 r vga_setfontset.cmaptabb +ffffffff82650580 r tgl_revids +ffffffff826505d8 r i830_bc_wm_info +ffffffff82650648 r hsw_activate_psr2.map +ffffffff82650688 r __drm_universal_plane_init.default_modifiers +ffffffff82650698 r iwn_tid2fifo +ffffffff826506b0 r vga_setfontset.cmaptaba +ffffffff826506b8 r crtc_offsets +ffffffff826506b8 r crtc_offsets +ffffffff826506b8 r crtc_offsets +ffffffff826506d8 r link_speed +ffffffff826506d8 r link_speed +ffffffff826506d8 r link_speed +ffffffff82650750 r rtwn_r88e_get_rssi.cckoff +ffffffff82651000 R edid_vendors +ffffffff826512c0 R edid_nvendors +ffffffff826512d0 R edid_products +ffffffff82651330 R edid_nproducts +ffffffff82651340 r _edid_modes +ffffffff82652000 R videomode_list +ffffffff82653080 R videomode_count +ffffffff82654000 r ahc_hard_errors +ffffffff82654080 r critical_sections +ffffffff826540b0 r patches +ffffffff82654d50 r seqprog +ffffffff82656000 r ahc_switch +ffffffff82657000 r termstat_strings +ffffffff82657020 r critical_sections +ffffffff82657060 r seqprog +ffffffff82657d50 r patches +ffffffff82659000 r ahd_switch +ffffffff8265a000 R aic_switch +ffffffff8265b000 R adw_switch +ffffffff8265c000 R gdt_switch +ffffffff8265d000 R twe_switch +ffffffff8265e000 R ciss_switch +ffffffff8265e030 R ciss_level +ffffffff8265e050 R ciss_stat +ffffffff8265f000 R ami_switch +ffffffff8265f028 R ami_raw_switch +ffffffff82660000 R mfi_switch +ffffffff82660028 R mfi_pd_switch +ffffffff82660050 r mfi_iop_xscale +ffffffff82660080 r mfi_iop_ppc +ffffffff826600b0 r mfi_iop_gen2 +ffffffff826600e0 r mfi_iop_skinny +ffffffff82660110 r mfi_bbu_indicators +ffffffff826601c0 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs +ffffffff826601f0 r chv_oa_mux_regs +ffffffff82660210 r fiji_clock_stretcher_lookup_table +ffffffff82660210 r tonga_clock_stretcher_lookup_table +ffffffff82660230 r iosf_pci_devices +ffffffff82660250 r link_speed +ffffffff82660250 r link_speed +ffffffff82660250 r link_speed +ffffffff82660290 r drm_fb_xfrm.default_dst_pitch +ffffffff82660290 r non_supported_protection +ffffffff82660390 r tgl_uy_revids +ffffffff826603e0 r bwi_phy_noise_11g_rev1 +ffffffff82660460 r cardslot_process_event.antonym_ev +ffffffff826604f0 r gen11_oa_mux_regs +ffffffff826605e0 r ddr2_cycle_tenths +ffffffff82660650 r rtw_intr_rx.ratetbl +ffffffff826606d0 r abm_config +ffffffff82660740 r getbootinfo.ports.30 +ffffffff82660790 r reg_offsets +ffffffff826607a0 r bwi_rf_lo_measure_11g.rf_lo_adjust +ffffffff826607b0 r init_non_clock_fields.look_up +ffffffff826607c0 r uftdi_8u232am_getrate.roundoff +ffffffff82660810 r zyd_rx_data.rates +ffffffff82660820 r ieee80211_ra_valid_tx_mcs.max_mcs +ffffffff82660860 r mmio_invalidate_full.gen8_regs +ffffffff82660890 r bwi_phy_noise_11g +ffffffff826608a0 r hpt366_pio +ffffffff826608d0 r glk_revids +ffffffff82660920 r bwi_rf_calc_nrssi_slope_11g.save_phy3_regs +ffffffff82660940 r ether_crc32_be_update.rev +ffffffff82660940 r rtw_grf5101_mac_crypt.caesar +ffffffff82660990 r snb_b_fdi_train_param +ffffffff82661000 R qlw_switch +ffffffff82662000 R isp_2100_risc_code +ffffffff82674bf0 R isp_2200_risc_code +ffffffff82687990 R isp_2300_risc_code +ffffffff826a1408 R qla_switch +ffffffff826a1430 r qla_regs_2100 +ffffffff826a1460 r qla_regs_2200 +ffffffff826a1490 r qla_regs_23XX +ffffffff826a2000 R ahci_atascsi_methods +ffffffff826a3000 R nvme_switch +ffffffff826a3028 r nvme_ops +ffffffff826a4000 R mpi_switch +ffffffff826a4100 r intel_hpll_vco.elk_vco +ffffffff826a4160 r pin_offsets +ffffffff826a41c0 r firmware_list +ffffffff826a4220 r atom_arg_shift +ffffffff826a4220 r atom_arg_shift +ffffffff826a4260 r pf_syncookie_wstab +ffffffff826a4280 r ieee80211_media_init.mopts +ffffffff826a42e0 r add_entropy_words.twist_table +ffffffff826a4380 r urtw_8225v2_txpwr_cck +ffffffff826a43a0 r bwfm_pci_prio2fifo +ffffffff826a43a0 r ieee80211_up_to_ac.up_to_ac +ffffffff826a4460 r paritytab +ffffffff826a4460 r x86emu_parity_tab +ffffffff826a4480 r legacy_connector_convert +ffffffff826a44c0 r gen7_oa_mux_regs +ffffffff826a44e0 r hsw_oa_mux_regs +ffffffff826a4500 r notetab +ffffffff826a4520 r urtw_8225v2_txpwr_cck_ch14 +ffffffff826a4540 r bwi_rf_calibval.rf_calibvals +ffffffff826a45e0 r pf_syncookie_msstab +ffffffff826a4640 r xgmi3x16_pcs_err_status_reg_aldebaran +ffffffff826a46a0 r uath_wme_init.uath_wme_11g +ffffffff826a46c0 r gen7_oa_b_counters +ffffffff826a4820 r icl_revids +ffffffff826a48e0 r rtwn_iq_calib_run.reg_adda +ffffffff826a4920 r atom_def_dst +ffffffff826a4920 r atom_def_dst +ffffffff826a4960 r sha256_initial_hash_value +ffffffff826a49c0 r otus_edca_def +ffffffff826a49e0 r intel_hpll_vco.blb_vco +ffffffff826a4aa0 r epic_pci_subsys_info +ffffffff826a4ac0 r atom_arg_mask +ffffffff826a4ac0 r atom_arg_mask +ffffffff826a4b20 r butmap +ffffffff826a4b60 r GFX_RLC_SRM_INDEX_CNTL_DATA_OFFSETS +ffffffff826a4ba0 r comsoft.lsrmap +ffffffff826a4be0 r tulip_mii_phy_readspecific.table +ffffffff826a4c00 r kbl_revids +ffffffff826a4ca0 r intel_hpll_vco.pnv_vco +ffffffff826a4d00 r dmapageport +ffffffff826a4dc0 r intel_hpll_vco.ctg_vco +ffffffff826a4e80 r drm_calculate_luminance_range.pre_computed_values +ffffffff826a5000 R sili_atascsi_methods +ffffffff826a6000 R ncr53c9x_switch +ffffffff826a7000 r scf_period +ffffffff826a8000 R siop_script +ffffffff826a85a0 R lun_switch +ffffffff826a85d0 R tag_switch +ffffffff826a8660 R load_dsa +ffffffff826a86c4 R siop_led_on +ffffffff826a86cc R siop_led_off +ffffffff826a86d8 R siop_switch +ffffffff826a9000 R ep_vortex_media +ffffffff826a9100 R ep_default_to_media +ffffffff826aa000 R wi_card_ident +ffffffff826ac000 R ucode_table +ffffffff826ad000 r re_revisions +ffffffff826ad290 r re_kstats_tpl +ffffffff826af000 R smc91cxx_media +ffffffff826af010 R smc91cxx_mii_bitbang_ops +ffffffff826b0000 R dl10019_mii_bitbang_ops +ffffffff826b0028 R dl10022_mii_bitbang_ops +ffffffff826b1000 R ax88190_mii_bitbang_ops +ffffffff826b3000 R ac97_audio_default +ffffffff826b3020 R ac97_on_off +ffffffff826b3324 R ac97_mic_select +ffffffff826b3628 R ac97_mono_select +ffffffff826b392c R ac97_source +ffffffff826b3c30 R ac97_volume_stereo +ffffffff826b3c4c R ac97_volume_mono +ffffffff826b3c70 R source_info +ffffffff826b4470 R ac97_ad +ffffffff826b4580 R ac97_ak +ffffffff826b4610 R ac97_av +ffffffff826b4750 R ac97_rl +ffffffff826b47a0 R ac97_cm +ffffffff826b4820 R ac97_cr +ffffffff826b4840 R ac97_cs +ffffffff826b4920 R ac97_cx +ffffffff826b4980 R ac97_dt +ffffffff826b49a0 R ac97_em +ffffffff826b49d0 R ac97_es +ffffffff826b49f0 R ac97_is +ffffffff826b4a10 R ac97_ic +ffffffff826b4a90 R ac97_it +ffffffff826b4ac0 R ac97_ns +ffffffff826b4b80 R ac97_ps +ffffffff826b4bb0 R ac97_sl +ffffffff826b4bd0 R ac97_st +ffffffff826b4d20 R ac97_vi +ffffffff826b4d50 R ac97_tt +ffffffff826b4dd0 R ac97_ti +ffffffff826b4df0 R ac97_wb +ffffffff826b4e10 R ac97_wo +ffffffff826b4ea0 R ac97_ym +ffffffff826b4ef0 R ac97_vendors +ffffffff826b51f0 R ac97enhancement +ffffffff826b52f0 R ac97feature +ffffffff826b6000 R lm_chips +ffffffff826b6020 R lm78_sensors +ffffffff826b61a0 R w83627hf_sensors +ffffffff826b63a0 R w83627ehf_sensors +ffffffff826b65c0 R w83627dhg_sensors +ffffffff826b67c0 R nct6776f_sensors +ffffffff826b6a00 R nct6779d_sensors +ffffffff826b6d60 R w83637hf_sensors +ffffffff826b6f20 R w83697hf_sensors +ffffffff826b70c0 R w83781d_sensors +ffffffff826b7280 R w83782d_sensors +ffffffff826b7480 R w83783s_sensors +ffffffff826b7600 R w83791d_sensors +ffffffff826b7860 R w83792d_sensors +ffffffff826b7ae0 R as99127f_sensors +ffffffff826b8000 r ar5k_known_products +ffffffff826b8110 r ar5111_gain_opt +ffffffff826b81e0 r ar5112_gain_opt +ffffffff826b82b0 r ar5k_5ghz_channels +ffffffff826b8a00 r ar5k_2ghz_channels +ffffffff826b8f10 r ar5111_rf +ffffffff826b9350 r ar5112a_rf +ffffffff826b9890 r ar5112_rf +ffffffff826b9da0 r ar5413_rf +ffffffff826ba1b0 r ar2413_rf +ffffffff826ba4d0 r ar2425_rf +ffffffff826ba830 r ar5111_rfg +ffffffff826bab30 r ar5112_rfg +ffffffff826bae30 r ar5413_rfg +ffffffff826bb130 r ar2413_rfg +ffffffff826bb430 r ar5k_rt_11a +ffffffff826bb552 r ar5k_rt_11b +ffffffff826bb674 r ar5k_rt_11g +ffffffff826bb796 r ar5k_rt_xr +ffffffff826bc000 r ar5210_ini +ffffffff826bd000 r ar5211_mode +ffffffff826bd2c0 r ar5211_ini +ffffffff826bdad0 r ar5211_rf +ffffffff826be000 r ar5212_pcie +ffffffff826be080 r ar5212_mode +ffffffff826be310 r ar5212_ini +ffffffff826bec80 r ar5212_ar5111_mode +ffffffff826bef20 r ar5212_ar5112_mode +ffffffff826bf1b0 r ar5413_mode +ffffffff826bfb10 r ar2413_mode +ffffffff826c0430 r ar2425_mode +ffffffff826c0d90 r ar5111_bbgain +ffffffff826c1090 r ar5112_bbgain +ffffffff826c2000 r athn_5ghz_chans +ffffffff826c2020 r athn_rates +ffffffff826c3000 r athn_rates +ffffffff826c4000 r ar9160_ini +ffffffff826c4068 r ar5416_ini +ffffffff826c40d0 r ar5416_serdes +ffffffff826c40e8 r ar9160_1_1_addac +ffffffff826c40f8 r ar9160_1_0_addac +ffffffff826c4108 r ar5416_2_2_addac +ffffffff826c4118 r ar5416_2_1_addac +ffffffff826c4128 r ar5416_set_power_calib.chainoffset +ffffffff826c4140 r ar9160_bank6tpc_vals +ffffffff826c41c0 r ar5416_bank6tpc_vals +ffffffff826c4240 r ar5416_bb_rfgain_vals_2g +ffffffff826c4340 r ar5416_bb_rfgain_vals_5g +ffffffff826c4440 r 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ar9380_2_2_vals_5g20 +ffffffff826cfed0 r ar9380_2_2_vals_5g40 +ffffffff826cfff0 r ar9380_2_2_vals_2g40 +ffffffff826d0110 r ar9380_2_2_vals_2g20 +ffffffff826d0230 r ar9380_2_2_cm_regs +ffffffff826d05d0 r ar9380_2_2_cm_vals +ffffffff826d0d00 r ar9380_2_2_fast_clock_regs +ffffffff826d0d20 r ar9380_2_2_fast_clock_vals_5g20 +ffffffff826d0d50 r ar9380_2_2_fast_clock_vals_5g40 +ffffffff826d0d74 r ar9380_2_2_serdes_regs +ffffffff826d0d80 r ar9380_2_2_serdes_vals +ffffffff826d0d90 r ar9380_2_2_rx_gain_regs +ffffffff826d0f90 r ar9380_2_2_rx_gain_wo_xlna_vals +ffffffff826d1390 r ar9380_2_2_rx_gain_vals +ffffffff826d1790 r ar9485_1_1_rx_gain_regs +ffffffff826d1890 r ar9485_1_1_rx_gain_vals +ffffffff826d1a90 r ar9380_2_2_tx_gain_regs +ffffffff826d1b60 r ar9380_2_2_tx_gain_high_ob_db_vals_5g +ffffffff826d1d00 r ar9380_2_2_tx_gain_high_ob_db_vals_2g +ffffffff826d1ea0 r ar9380_2_2_tx_gain_low_ob_db_vals_5g +ffffffff826d2040 r ar9380_2_2_tx_gain_low_ob_db_vals_2g +ffffffff826d21e0 r ar9380_2_2_tx_gain_high_power_vals_5g +ffffffff826d2380 r ar9380_2_2_tx_gain_high_power_vals_2g +ffffffff826d2520 r ar9380_2_2_tx_gain_vals_5g +ffffffff826d26c0 r ar9380_2_2_tx_gain_vals_2g +ffffffff826d2860 r ar9485_1_1_tx_gain_regs +ffffffff826d28f0 r ar9485_1_1_tx_gain_vals_2g +ffffffff826d2a10 r ar9380_def_rom +ffffffff826d2e50 r ar9380_def_rom_h112 +ffffffff826d3290 r ar9380_def_rom_h116 +ffffffff826d36d0 r ar9380_def_rom_x112 +ffffffff826d3b10 r ar9380_def_rom_x113 +ffffffff826d4000 R atw_txthresh_tab_lo +ffffffff826d4050 R atw_txthresh_tab_hi +ffffffff826d40a0 r atw_attach.empty_macaddr +ffffffff826d40b0 r atw_attach.type_strings +ffffffff826d40d0 r atw_rfmd2958_ifn +ffffffff826d4110 r atw_rfmd2958_rf1r +ffffffff826d4150 r atw_rxintr.rate_tbl +ffffffff826d5000 r rtw_identify_sta.empty_macaddr +ffffffff826d6000 r rtwn_set_key.etherzeroaddr +ffffffff826d6010 r rtl8188eu_rf_prog +ffffffff826d6030 r rtl8192e_rf_prog +ffffffff826d6060 r rtl8188ce_rf_prog +ffffffff826d6080 r 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r month_days +ffffffff82703000 R execsw +ffffffff82704000 r shstrtab +ffffffff82705000 R copyright +ffffffff827050c0 r initpaths +ffffffff82706000 R sysent +ffffffff82708000 R bufq_impls +ffffffff82709000 R kqueueops +ffffffff82709038 R kqread_filtops +ffffffff82709068 R proc_filtops +ffffffff82709098 R file_filtops +ffffffff827090c8 R timer_filtops +ffffffff82709100 R sysfilt_ops +ffffffff82709148 R seltrue_filtops +ffffffff82709178 R dead_filtops +ffffffff827091a8 R badfd_filtops +ffffffff827091d8 r mutex_klistops +ffffffff827091f0 r rwlock_klistops +ffffffff8270a000 R kv_exec +ffffffff8270b000 R addrmask +ffffffff8270c000 r rw_ops +ffffffff8270d000 r proc_printit.pstat +ffffffff8270e000 R pledge_syscalls +ffffffff8270ea60 r pledgenames +ffffffff8270ecb0 r pledgereq +ffffffff8270f000 r unvname_rbt_RBT_INFO +ffffffff8270f018 R unvname_rbt_RBT_TYPE +ffffffff82710000 R sig_filtops +ffffffff82710030 R sigprop +ffffffff82711000 R kern_vars +ffffffff827112f0 R hw_vars +ffffffff82712000 R tc_vars +ffffffff82713000 r sys_gettimeofday.zerotz +ffffffff82714000 r taskq_sys_name +ffffffff82714006 r taskq_sys_mp_name +ffffffff82714010 R systq +ffffffff82714018 R systqmp +ffffffff82716000 r gpt_get_fstype.gpt_uuid_openbsd +ffffffff82716010 r gpt_get_fstype.gpt_uuid_msdos +ffffffff82716020 r gpt_get_fstype.gpt_uuid_chromerootfs +ffffffff82716030 r gpt_get_fstype.gpt_uuid_linux +ffffffff82716040 r gpt_get_fstype.gpt_uuid_hfs +ffffffff82716050 r gpt_get_fstype.gpt_uuid_unused +ffffffff82716060 r gpt_get_fstype.gpt_uuid_efi_system +ffffffff82716070 r gpt_get_fstype.gpt_uuid_bios_boot +ffffffff82717000 r hiballoc_addr_RBT_INFO +ffffffff82717018 R hiballoc_addr_RBT_TYPE +ffffffff82718000 R logread_filtops +ffffffff82719000 r phtree_RBT_INFO +ffffffff82719018 R phtree_RBT_TYPE +ffffffff82719020 r pool_lock_ops_rw +ffffffff82719058 r pool_lock_ops_mtx +ffffffff8271a000 r pselregister.evf +ffffffff8271a00c r pselregister.evff +ffffffff8271b000 R pipe_rfiltops +ffffffff8271b030 R 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egre_tree_RBT_INFO +ffffffff82743068 R egre_tree_RBT_TYPE +ffffffff82743070 r nvgre_ucast_tree_RBT_INFO +ffffffff82743088 R nvgre_ucast_tree_RBT_TYPE +ffffffff82743090 r nvgre_mcast_tree_RBT_INFO +ffffffff827430a8 R nvgre_mcast_tree_RBT_TYPE +ffffffff827430b0 r eoip_tree_RBT_INFO +ffffffff827430c8 R eoip_tree_RBT_TYPE +ffffffff827430d0 r nvgre_etherbridge_ops +ffffffff82744000 r trunk_protos +ffffffff82745000 R ethermulticastaddr_slowprotocols +ffffffff82745006 R lacp_info_tlv_template +ffffffff8274500e R marker_info_tlv_template +ffffffff82745012 R marker_response_tlv_template +ffffffff82745020 R lacp_timer_funcs +ffffffff82746000 r lacp_rxm_state_names +ffffffff82746040 r lacp_rxm_event_names +ffffffff82746090 r aggr_port_selected_names +ffffffff827460b0 r lacp_mux_state_names +ffffffff827460e0 r lacp_mux_event_names +ffffffff82746128 r lacp_address_slow +ffffffff82747000 r tpmr_pf_ipv4 +ffffffff82747018 r tpmr_pf_ipv6 +ffffffff82748000 r bpe_tree_RBT_INFO +ffffffff82748018 R bpe_tree_RBT_TYPE +ffffffff82748020 r bpe_etherbridge_ops +ffffffff82749000 R pppx_rd_filtops +ffffffff82749030 R pppx_wr_filtops +ffffffff82749060 r pppx_ifs_RBT_INFO +ffffffff82749078 R pppx_ifs_RBT_TYPE +ffffffff82749080 r pppac_rd_filtops +ffffffff827490b0 r pppac_wr_filtops +ffffffff8274a000 r vxlan_peers_RBT_INFO +ffffffff8274a018 R vxlan_peers_RBT_TYPE +ffffffff8274a020 r vxlan_etherbridge_ops +ffffffff8274b000 R stoeplitz_cache +ffffffff8274c000 R ieee80211_std_rateset_11a +ffffffff8274c010 R ieee80211_std_rateset_11b +ffffffff8274c020 R ieee80211_std_rateset_11g +ffffffff8274c030 R ieee80211_std_ratesets_11n +ffffffff8274c3b0 R ieee80211_std_ratesets_11ac +ffffffff8274c6b0 r ieee80211_setbasicrates.basic +ffffffff8274c710 r ieee80211_setmode.chanflags +ffffffff8274c730 r ieee80211_rate2media.rates +ffffffff8274c8c0 r ieee80211_media2rate.ieeerates +ffffffff8274d000 r Sbox +ffffffff8274f000 r ieee80211_ioctl.empty_macaddr +ffffffff82750000 r ieee80211_find_rxnode.zero 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auth_hash_hmac_sha2_256_128 +ffffffff827703a0 R auth_hash_hmac_sha2_384_192 +ffffffff827703e8 R auth_hash_hmac_sha2_512_256 +ffffffff82770430 R auth_hash_gmac_aes_128 +ffffffff82770478 R auth_hash_gmac_aes_192 +ffffffff827704c0 R auth_hash_gmac_aes_256 +ffffffff82770508 R auth_hash_chacha20_poly1305 +ffffffff82770550 R comp_algo_deflate +ffffffff82771000 r IV +ffffffff82772000 r idgen32_ftable +ffffffff82773000 r Chacha20_Poly1305_Update.zeroes +ffffffff82773010 r pad0 +ffffffff82774000 r null_point +ffffffff82774020 r base_point +ffffffff82775000 R mplsdomain +ffffffff82776000 R mplsctl_vars +ffffffff82777000 r nfs_nodetree_RBT_INFO +ffffffff82777018 R nfs_nodetree_RBT_TYPE +ffffffff82778000 r nfsread_filtops +ffffffff82778030 r nfswrite_filtops +ffffffff82778060 r nfsvnode_filtops +ffffffff82779000 r nfsrv_v3errmap +ffffffff827790b0 r nfsrv_v2errmap +ffffffff8277a000 R nfs_vfsops +ffffffff8277b000 R nfs_vops +ffffffff8277b110 R nfs_specvops +ffffffff8277b220 R nfs_fifovops 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uaddr_free_rbtree_RBT_TYPE +ffffffff82789000 R aobj_pager +ffffffff8278a000 R uvm_deviceops +ffffffff8278b000 R kv_any +ffffffff8278b018 R kv_intrsafe +ffffffff8278b030 R kv_page +ffffffff8278b048 R kp_dirty +ffffffff8278b070 R kp_dma +ffffffff8278b098 R kp_dma_contig +ffffffff8278b0c0 R kp_dma_zero +ffffffff8278b0e8 R kp_zero +ffffffff8278b110 R kp_pageable +ffffffff8278b138 R kp_none +ffffffff8278b160 R kd_waitok +ffffffff8278b178 R kd_nowait +ffffffff8278b190 R kd_trylock +ffffffff8278c000 R vmmapbsy +ffffffff8278c010 r page_flagbits +ffffffff8278c0a8 r uvm_map_addr_RBT_INFO +ffffffff8278c0c0 R uvm_map_addr_RBT_TYPE +ffffffff8278d000 R pmap_pager +ffffffff8278d048 R bufcache_pager +ffffffff8278e000 r uvm_objtree_RBT_INFO +ffffffff8278e018 R uvm_objtree_RBT_TYPE +ffffffff8278f000 r uvm_pmr_addr_RBT_INFO +ffffffff8278f018 R uvm_pmr_addr_RBT_TYPE +ffffffff8278f020 r uvm_pmr_size_RBT_INFO +ffffffff8278f038 R uvm_pmr_size_RBT_TYPE +ffffffff8278f040 r uvm_pmemrange_addr_RBT_INFO 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static_l_desc +ffffffff827a4320 r static_d_desc +ffffffff827a4340 r static_bl_desc +ffffffff827a4360 r static_ltree +ffffffff827a47e0 r static_dtree +ffffffff827a4860 r extra_lbits +ffffffff827a48e0 r extra_dbits +ffffffff827a4960 r extra_blbits +ffffffff827a49b0 r bl_order +ffffffff827a49d0 r base_length +ffffffff827a4a50 r base_dist +ffffffff827a5000 R nam2blk +ffffffff827a6000 R chrtoblktbl +ffffffff827a60c0 R nchrtoblktbl +ffffffff827a7000 R cpuctl_vars +ffffffff827a9000 R cpu_cpuid_features +ffffffff827a91d0 R cpu_ecpuid_features +ffffffff827a9260 R cpu_cpuid_ecxfeatures +ffffffff827a9450 R cpu_ecpuid_ecxfeatures +ffffffff827a95d0 R cpu_seff0_ebxfeatures +ffffffff827a97a0 R cpu_seff0_ecxfeatures +ffffffff827a9800 R cpu_seff0_edxfeatures +ffffffff827a98a0 R cpu_tpm_eaxfeatures +ffffffff827a98c0 R cpu_cpuid_perf_eax +ffffffff827a98d0 R cpu_cpuid_apmi_edx +ffffffff827a98e0 R cpu_amdspec_ebxfeatures +ffffffff827a9940 R cpu_xsave_extfeatures +ffffffff827aa000 R sigcode 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x86_soft_intr_to_ssir +ffffffff827b2000 R Xexceptions +ffffffff827b2100 r spl_lowered +ffffffff827b212d R i8259_stubs +ffffffff827b22ad R ioapic_edge_stubs +ffffffff827b28ad R ioapic_level_stubs +ffffffff827b3000 R _stac +ffffffff827b3003 R _clac +ffffffff827b4000 R x86_bus_space_io_ops +ffffffff827b4130 R x86_bus_space_mem_ops +ffffffff827b5000 ? cpu_spinup_trampoline +ffffffff827b50b6 R cpu_spinup_trampoline_end +ffffffff827b50b6 R mp_tramp_data_start +ffffffff827b50fc R mp_tramp_data_end +ffffffff827b7000 R db_acpi_cmds +ffffffff827b70a0 R db_machine_command_table +ffffffff827b8000 r i8254_delay.delaytab +ffffffff827b9000 R rasops_cmap +ffffffff827ba000 r reverse +ffffffff827ba100 r ibm437_level1 +ffffffff827ba230 r ibm437_level2_0 +ffffffff827ba248 r ibm437_level2_1 +ffffffff827ba260 r ibm437_level2_3 +ffffffff827ba278 r ibm437_level2_32 +ffffffff827ba290 r ibm437_level2_34 +ffffffff827ba2a8 r ibm437_level2_35 +ffffffff827ba2c0 r ibm437_level2_37 +ffffffff827ba2e0 r ibm437_chars_0 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rlphys +ffffffff827c5000 R lxtphy_ca +ffffffff827c5028 R lxtphy_funcs +ffffffff827c5040 R lxtphy971_funcs +ffffffff827c5060 r lxtphys +ffffffff827c6000 R luphy_ca +ffffffff827c6028 R luphy_funcs +ffffffff827c6040 r luphys +ffffffff827c7000 R mtdphy_ca +ffffffff827c7028 R mtdphy_funcs +ffffffff827c7040 r mtdphys +ffffffff827c8000 R icsphy_ca +ffffffff827c8028 R icsphy_funcs +ffffffff827c8040 r icsphys +ffffffff827c9000 R sqphy_ca +ffffffff827c9028 R sqphy_funcs +ffffffff827c9040 r sqphys +ffffffff827ca000 R tqphy_ca +ffffffff827ca028 R tqphy_funcs +ffffffff827ca040 r tqphys +ffffffff827cb000 R ukphy_ca +ffffffff827cb028 R ukphy_funcs +ffffffff827cc000 R dcphy_ca +ffffffff827cc028 R dcphy_funcs +ffffffff827cd000 R bmtphy_ca +ffffffff827cd028 R bmtphy_funcs +ffffffff827cd040 r bmtphys +ffffffff827ce000 R brgphy_ca +ffffffff827ce028 R brgphy_copper_funcs +ffffffff827ce040 R brgphy_fiber_funcs +ffffffff827ce058 R brgphy_5708s_funcs +ffffffff827ce070 R brgphy_5709s_funcs +ffffffff827ce090 r brgphys +ffffffff827ce300 r brgphy_bcm5401_dspcode.dspcode +ffffffff827cf000 R xmphy_ca +ffffffff827cf028 R xmphy_funcs +ffffffff827cf040 r xmphys +ffffffff827d0000 R amphy_ca +ffffffff827d0028 R amphy_funcs +ffffffff827d0040 r amphys +ffffffff827d1000 R acphy_ca +ffffffff827d1028 R acphy_funcs +ffffffff827d1040 r acphys +ffffffff827d2000 R nsgphy_ca +ffffffff827d2028 R nsgphy_funcs +ffffffff827d2040 r nsgphys +ffffffff827d3000 R urlphy_ca +ffffffff827d3028 R urlphy_funcs +ffffffff827d4000 R rgephy_ca +ffffffff827d4028 R rgephy_funcs +ffffffff827d4040 r rgephys +ffffffff827d5000 R ciphy_ca +ffffffff827d5028 R ciphy_funcs +ffffffff827d5040 r ciphys +ffffffff827d6000 R ipgphy_ca +ffffffff827d6028 R ipgphy_funcs +ffffffff827d6040 r ipgphys +ffffffff827d7000 R etphy_funcs +ffffffff827d7018 R etphy_ca +ffffffff827d7040 r etphys +ffffffff827d7060 r etphy_dspcode +ffffffff827d8000 R jmphy_funcs +ffffffff827d8018 R jmphy_ca +ffffffff827d8040 r jmphys +ffffffff827d9000 R atphy_funcs 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vio_ca +ffffffff82801030 r virtio_net_feature_names +ffffffff82802000 R vioblk_ca +ffffffff82802028 R vioblk_switch +ffffffff82803000 R viomb_ca +ffffffff82803030 r viomb_feature_names +ffffffff82804000 R viornd_ca +ffffffff82805000 R vioscsi_ca +ffffffff82805028 R vioscsi_switch +ffffffff82805050 R vioscsi_vq_names +ffffffff82806000 R vmmci_ca +ffffffff82807000 R pci_ca +ffffffff82808000 r pci_quirks +ffffffff82809000 R pci_subclass_prehistoric +ffffffff82809050 R pci_subclass_mass_storage +ffffffff82809160 R pci_subclass_network +ffffffff82809250 R pci_subclass_display +ffffffff828092d0 R pci_subclass_multimedia +ffffffff82809360 R pci_subclass_memory +ffffffff828093c0 R pci_subclass_bridge +ffffffff82809510 R pci_subclass_communications +ffffffff828095d0 R pci_subclass_system +ffffffff828096c0 R pci_subclass_input +ffffffff82809770 R pci_subclass_dock +ffffffff828097c0 R pci_subclass_processor +ffffffff82809880 R pci_subclass_serialbus +ffffffff82809990 R pci_subclass_wireless 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adw_asc38C0800_mcode_data +ffffffff828358a0 R adw_asc38C1600_mcode +ffffffff82837160 R adw_asc38C1600_mcode_data +ffffffff82838000 R twe_pci_ca +ffffffff82838028 R twe_pci_devices +ffffffff82839000 R arc_ca +ffffffff82839028 R arc_switch +ffffffff82839050 r arc_devices +ffffffff82839190 r arc_intel +ffffffff82839198 r arc_marvell +ffffffff828391a0 r arc_lsi +ffffffff828391a8 r arc_marvell2 +ffffffff8283a000 R jmb_ca +ffffffff8283a030 r jmb_devices +ffffffff8283b000 R ahci_pci_ca +ffffffff8283b028 R ahci_jmb_ca +ffffffff8283b050 r ahci_devices +ffffffff8283c000 R nvme_pci_ca +ffffffff8283c028 r nvme_msi_blacklist +ffffffff8283d000 R ami_pci_ca +ffffffff8283d030 r ami_pci_subsys +ffffffff8283d270 r ami_pci_vendors +ffffffff8283e000 R mfi_pci_ca +ffffffff8283e030 r mfi_pci_devices +ffffffff8283f000 R mfii_ca +ffffffff8283f028 R mfii_switch +ffffffff8283f050 R mfii_pd_switch +ffffffff8283f078 R mfii_iop_thunderbolt +ffffffff8283f088 R mfii_iop_25 +ffffffff8283f098 R mfii_iop_35 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qlw_pci_ca +ffffffff8284e030 r qlw_devices +ffffffff8284e050 r isp_1040_risc_code +ffffffff828539f0 r isp_1080_risc_code +ffffffff8285b470 r isp_12160_risc_code +ffffffff82863000 R qla_pci_ca +ffffffff82863030 r qla_devices +ffffffff82864000 R qle_ca +ffffffff82864028 R qle_switch +ffffffff82864050 r qle_devices +ffffffff82864070 r isp_2400_risc_code +ffffffff82893a50 r isp_2500_risc_code +ffffffff828c6000 R mpi_pci_ca +ffffffff828c6030 r mpi_devices +ffffffff828c7000 R mpii_ca +ffffffff828c7028 R mpii_switch +ffffffff828c7050 r mpii_devices +ffffffff828c8000 R sili_pci_ca +ffffffff828c8030 r sili_devices +ffffffff828c9000 R aq_devices +ffffffff828c9040 R aq_products +ffffffff828c9140 R aq_fw1x_ops +ffffffff828c9168 R aq_fw2x_ops +ffffffff828c9190 R aq_ca +ffffffff828ca000 R de_ca +ffffffff828ca030 r tulip_srom_conninfo +ffffffff828ca120 r tulip_mii_phy_attrlist +ffffffff828ca1e0 r tulip_21140_znyx_zx34x_boardsw +ffffffff828ca208 r tulip_21040_10baset_only_boardsw +ffffffff828ca230 r tulip_21040_boardsw +ffffffff828ca258 r tulip_2114x_isv_boardsw +ffffffff828ca280 r tulip_21140_smc9332_boardsw +ffffffff828ca2a8 r tulip_21040_auibnc_only_boardsw +ffffffff828ca2d0 r tulip_21140_cogent_em100_boardsw +ffffffff828ca2f8 r tulip_21140_accton_boardsw +ffffffff828ca320 r tulip_21140_eb_boardsw +ffffffff828ca348 r tulip_21041_boardsw +ffffffff828ca370 r tulip_srom_mediums +ffffffff828ca3c0 r tulip_read_macaddr.testpat +ffffffff828ca3d0 r tulip_vendors +ffffffff828ca480 r tulip_media_to_ifmedia +ffffffff828ca4e0 r tulip_chipdescs +ffffffff828cb000 R ep_pci_ca +ffffffff828cb030 R ep_pci_devices +ffffffff828cc000 R pcn_ca +ffffffff828cc028 R pcn_devices +ffffffff828cc030 r pcn_79c970_rcvfw +ffffffff828cc050 r pcn_79c970_xmtsp +ffffffff828cc070 r pcn_79c970_xmtfw +ffffffff828cc090 r pcn_79c971_rcvfw +ffffffff828cc0b0 r pcn_79c971_xmtsp_sram +ffffffff828cc0d0 r pcn_79c971_xmtsp +ffffffff828cc0f0 r pcn_79c971_xmtfw +ffffffff828cc110 r pcn_variants +ffffffff828cd000 R siop_products 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pciide_vendors +ffffffff828d0140 R pciide_pci_ca +ffffffff828d0168 R pciide_jmb_ca +ffffffff828d0190 r piix_isp_dma +ffffffff828d0193 r piix_rtc_dma +ffffffff828d0196 r apollo_pio_set +ffffffff828d019b r cmd0643_9_data_tim_pio +ffffffff828d01a0 r cmd0643_9_data_tim_dma +ffffffff828d01a3 r cmd680_channel_map.init_val +ffffffff828d01b1 r cmd680_setup_channel.udma2_tbl +ffffffff828d01b8 r cmd680_setup_channel.dma_tbl +ffffffff828d01be r cmd680_setup_channel.pio_tbl +ffffffff828d01d0 r satalink_ba5_regmap +ffffffff828d0690 r sii3114_chansetup.channel_names +ffffffff828d06b0 r cy_pio_pulse +ffffffff828d06c0 r sis_udma133new_tim +ffffffff828d06e0 r sis_pio133new_tim +ffffffff828d06f4 r sis_dma133new_tim +ffffffff828d0700 r sis_udma66_tim +ffffffff828d0706 r sis_udma100new_tim +ffffffff828d070c r sis_udma133old_tim +ffffffff828d0713 r sis_pio_act +ffffffff828d0718 r sis_pio_rec +ffffffff828d071d r natsemi_pio_pulse +ffffffff828d0722 r natsemi_pio_recover +ffffffff828d0727 r natsemi_dma_pulse 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nforce_pio +ffffffff828d08c3 r ixp_mdma_timings +ffffffff828d08c6 r ixp_pio_timings +ffffffff828d1000 R ppb_ca +ffffffff828d2000 R cy_pci_ca +ffffffff828d2030 R cy_pci_devices +ffffffff828d3000 R rl_pci_ca +ffffffff828d3030 R rl_pci_devices +ffffffff828d4000 R re_pci_devices +ffffffff828d4030 R re_pci_ca +ffffffff828d5000 R vr_ca +ffffffff828d6000 R txp_ca +ffffffff828d6030 R txp_devices +ffffffff828d7000 r cards +ffffffff828d8000 r format_params +ffffffff828d81a0 r pixfmt_table +ffffffff828d8320 r meteor_pixfmt_table +ffffffff828d9000 R bktr_ca +ffffffff828d9028 R bktr_hw_if +ffffffff828da000 r tuners +ffffffff828da170 r freqTable +ffffffff828da260 r nabcst +ffffffff828da2a0 r irccable +ffffffff828da310 r hrccable +ffffffff828da380 r weurope +ffffffff828da420 r jpnbcst +ffffffff828da460 r jpncable +ffffffff828da4c0 r xussr +ffffffff828da530 r australia +ffffffff828da590 r france +ffffffff828db000 R xl_pci_ca +ffffffff828db030 R xl_pci_devices +ffffffff828dc000 R fxp_pci_ca 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ixl_hmc_pack_rxq +ffffffff828e4830 r ixl_hmc_pack_txq +ffffffff828e48a0 r ixl_sfp_ops +ffffffff828e48b8 r ixl_qsfp_ops +ffffffff828e5000 R xge_ca +ffffffff828e5028 R xge_devices +ffffffff828e5030 r xge_fix_mac +ffffffff828e5110 r xge_xena_dtx_cfg +ffffffff828e5170 r xge_herc_dtx_cfg +ffffffff828e6000 R thtc_ca +ffffffff828e6028 R tht_ca +ffffffff828e6050 r thtc_devices +ffffffff828e6068 r tht_link_state.interval +ffffffff828e7000 R myx_ca +ffffffff828e7028 R myx_devices +ffffffff828e8000 R oce_ca +ffffffff828e8030 R oce_devices +ffffffff828e9000 R dc_pci_ca +ffffffff828ea000 R epic_pci_ca +ffffffff828ea028 R epic_pci_devices +ffffffff828eb000 R ti_pci_ca +ffffffff828eb030 R ti_devices +ffffffff828ec000 R ne_pci_ca +ffffffff828ec030 R ne_pci_prod +ffffffff828ed000 R gem_pci_ca +ffffffff828ed030 R gem_pci_devices +ffffffff828ed050 r gem_promhdr +ffffffff828ed052 r gem_promdat +ffffffff828ed05a r gem_promdat2 +ffffffff828ee000 R cas_ca +ffffffff828ee028 R cas_pci_devices +ffffffff828ee030 r cas_promhdr +ffffffff828ee032 r cas_promdat_sun +ffffffff828ee03a r cas_promdat_ns +ffffffff828ee042 r cas_promdat2 +ffffffff828ef000 R sf_pci_ca +ffffffff828ef028 R sf_pci_products +ffffffff828f0000 R sis_ca +ffffffff828f0028 R sis_devices +ffffffff828f1000 R se_devices +ffffffff828f1008 R se_ca +ffffffff828f2000 R uhci_pci_ca +ffffffff828f3000 R ohci_pci_ca +ffffffff828f4000 R ehci_pci_ca +ffffffff828f5000 R xhci_pci_ca +ffffffff828f6000 R cbb_pci_ca +ffffffff828f6028 r pccbb_pcmcia_do_io_map.pcic_iowidth +ffffffff828f7000 R skc_devices +ffffffff828f7030 R skc_ca +ffffffff828f7058 R sk_ca +ffffffff828f8000 R mskc_devices +ffffffff828f80a8 R mskc_ca +ffffffff828f80d0 R msk_ca +ffffffff828f8100 r msk_mib +ffffffff828f9000 R puc_pci_ca +ffffffff828fa000 R puc_devs +ffffffff828ff000 R com_puc_ca +ffffffff828ff030 r puc_port_types +ffffffff82900000 R lpt_puc_ca +ffffffff82901000 R wi_pci_ca +ffffffff82901030 r wi_pci_products +ffffffff82902000 R an_pci_ca +ffffffff82902030 R an_pci_devices +ffffffff82903000 R iwi_devices +ffffffff82903010 R iwi_ca +ffffffff82904000 R wpi_ca +ffffffff82904028 r wpi_devices +ffffffff82904030 r wpi_rates +ffffffff82904050 r wpi_rf_gain_5ghz +ffffffff829040a0 r wpi_dsp_gain_5ghz +ffffffff829040f0 r wpi_rf_gain_2ghz +ffffffff82904140 r wpi_dsp_gain_2ghz +ffffffff82904190 r wpi_pmgt +ffffffff82904310 r wpi_bands +ffffffff82905000 R iwn_mcs2ridx +ffffffff82905020 R iwn_ca +ffffffff82905050 r iwn_devices +ffffffff829050e8 r iwn4965_sensitivity_limits +ffffffff82905124 r iwn5000_sensitivity_limits +ffffffff82905160 r iwn5150_sensitivity_limits +ffffffff8290519c r iwn1000_sensitivity_limits +ffffffff829051d8 r iwn6000_sensitivity_limits +ffffffff82905214 r iwn2000_sensitivity_limits +ffffffff82905250 r iwn_fw_errmsg +ffffffff82905340 r iwn4965_set_txpower.tdiv +ffffffff82905360 r iwn4965_rf_gain_5ghz +ffffffff829053d0 r iwn4965_dsp_gain_5ghz +ffffffff82905440 r iwn4965_dsp_gain_2ghz +ffffffff829054b0 r iwn_pmgt +ffffffff829056f0 r iwn4965_post_alive.qid2fifo +ffffffff82905700 r iwn_bands +ffffffff82905770 r iwn_rates +ffffffff82905820 r iwn4965_rf_gain_2ghz +ffffffff82906000 R iwm_nvm_channels +ffffffff82906030 R iwm_nvm_channels_8000 +ffffffff82906070 R iwm_rates +ffffffff829060d0 R iwm_ht_mcs2ridx +ffffffff82906110 R iwm_tid_to_ac +ffffffff82906118 R iwm_ac_to_tx_fifo +ffffffff82906120 R iwm_nvm_to_read +ffffffff82906144 r iwm_set_hw_address_8000.reserved_mac +ffffffff82906180 r iwm_sf_full_timeout +ffffffff829061b0 r iwm_sf_full_timeout_def +ffffffff829061e0 r advanced_lookup +ffffffff82906320 r iwm_devices +ffffffff82906360 R iwm_ca +ffffffff82907000 R iwx_9560_quz_a0_jf_b0_cfg +ffffffff82907020 R iwx_9560_qu_c0_jf_b0_cfg +ffffffff82907040 R iwx_qu_b0_hr1_b0 +ffffffff82907060 R iwx_qu_b0_hr_b0 +ffffffff82907080 R iwx_ax201_cfg_qu_hr +ffffffff829070a0 R iwx_qu_c0_hr1_b0 +ffffffff829070c0 R iwx_qu_c0_hr_b0 +ffffffff829070e0 R iwx_ax201_cfg_qu_c0_hr_b0 +ffffffff82907100 R iwx_quz_a0_hr1_b0 +ffffffff82907120 R iwx_ax201_cfg_quz_hr +ffffffff82907140 R iwx_cfg_so_a0_hr_b0 +ffffffff82907160 R iwx_cfg_quz_a0_hr_b0 +ffffffff82907180 R iwx_2ax_cfg_so_gf_a0 +ffffffff829071a0 R iwx_2ax_cfg_so_gf_a0_long +ffffffff829071c0 R iwx_2ax_cfg_so_gf4_a0 +ffffffff829071e0 R iwx_2ax_cfg_so_gf4_a0_long +ffffffff82907200 R iwx_2ax_cfg_ty_gf_a0 +ffffffff82907220 R iwx_2ax_cfg_so_jf_b0 +ffffffff82907240 R iwx_nvm_channels_8000 +ffffffff82907280 R iwx_rates +ffffffff829072e0 R iwx_mcs2ridx +ffffffff82907320 R iwx_tid_to_ac +ffffffff82907328 R iwx_ac_to_tx_fifo +ffffffff82907330 r iwx_nvm_channels_uhb +ffffffff8290739e r iwx_is_valid_mac_addr.reserved_mac +ffffffff829073b0 r iwx_sf_full_timeout +ffffffff829073e0 r iwx_sf_full_timeout_def +ffffffff82907410 r advanced_lookup +ffffffff82907550 r iwx_devices +ffffffff82907590 r iwx_dev_info_table +ffffffff82907de8 R iwx_ca +ffffffff82908000 R cmpci_ca +ffffffff82908028 R cmpci_hw_if +ffffffff829080e0 r cmpci_rate_table +ffffffff82908120 R cmpci_devices +ffffffff82908130 r cmpci_query_devinfo.mixer_port_names +ffffffff82908160 r cmpci_query_devinfo.mixer_classes +ffffffff82909000 R iha_pci_ca +ffffffff82909028 R iha_switch +ffffffff8290a000 R pcscp_ca +ffffffff8290b000 R bge_ca +ffffffff8290b030 R bge_devices +ffffffff8290b1b0 r bge_revisions +ffffffff8290b610 r bge_majorrevs +ffffffff8290c000 R bnx_devices +ffffffff8290c020 R bnx_ca +ffffffff8290d000 R vge_ca +ffffffff8290d028 R vge_devices +ffffffff8290e000 R stge_ca +ffffffff8290e028 R stge_mii_bitbang_ops +ffffffff8290e050 R stge_devices +ffffffff8290f000 R nfe_ca +ffffffff8290f030 R nfe_devices +ffffffff82910000 R et_devices +ffffffff82910008 R et_ca +ffffffff82911000 R jme_devices +ffffffff82911008 R jme_ca +ffffffff82912000 R age_devices +ffffffff82912008 R age_ca +ffffffff82913000 R alc_devices +ffffffff82913038 R alc_ca +ffffffff82914000 R ale_devices +ffffffff82914008 R ale_ca +ffffffff82915000 R amdpm_ca +ffffffff82915030 R amdpm_ids +ffffffff82916000 R bce_ca +ffffffff82916028 R bce_devices +ffffffff82917000 R ath_pci_ca +ffffffff82918000 R athn_pci_ca +ffffffff82918030 r athn_pci_devices +ffffffff82919000 R atw_pci_ca +ffffffff82919028 R atw_pci_devices +ffffffff8291a000 R rtw_pci_ca +ffffffff8291a030 R rtw_pci_products +ffffffff8291b000 R rtwn_pci_ca +ffffffff8291b030 r rtwn_pci_devices +ffffffff8291b040 r rtl8188eu_mac +ffffffff8291b1b0 r rtl8192cu_mac +ffffffff8291b310 r rtl8192ce_mac +ffffffff8291b458 r rtl8188eu_bb_prog +ffffffff8291b480 r rtl8723a_bb_prog +ffffffff8291b4a8 r rtl8192ce_bb_prog_1t +ffffffff8291b4d0 r rtl8192ce_bb_prog_2t +ffffffff8291b500 r rtl8188eu_bb_regs +ffffffff8291b680 r rtl8188eu_bb_vals +ffffffff8291b980 r rtl8188eu_agc_vals +ffffffff8291bb80 r rtl8723a_bb_regs +ffffffff8291bd00 r rtl8723a_bb_vals +ffffffff8291bff0 r rtl8192ce_agc_vals +ffffffff8291c270 r rtl8192ce_bb_regs +ffffffff8291c3f0 r rtl8192ce_bb_vals_1t +ffffffff8291c6e0 r rtl8192ce_bb_vals_2t +ffffffff8291d000 R ral_pci_ca +ffffffff8291d030 R ral_pci_devices +ffffffff8291e000 R acx_pci_ca +ffffffff8291e028 R acx_pci_devices +ffffffff8291f000 R pgt_pci_ca +ffffffff8291f028 R pgt_pci_devices +ffffffff82920000 R malo_pci_ca +ffffffff82920028 R malo_pci_devices +ffffffff82921000 R bwi_pci_ca +ffffffff82921030 R bwi_pci_devices +ffffffff82922000 R piixpm_ca +ffffffff82922030 R piixpm_ids +ffffffff82923000 R vic_ca +ffffffff82923028 R vic_devices +ffffffff82924000 R vmx_devices +ffffffff82924008 R vmx_ca +ffffffff82924030 r vmx_tx_kstat_tpl +ffffffff829240d0 r vmx_kstat_rate +ffffffff829240e0 r vmx_rx_kstat_tpl +ffffffff82925000 R vmwpvs_ca +ffffffff82925028 R vmwpvs_switch +ffffffff82926000 R lii_ca +ffffffff82926028 R lii_devices +ffffffff82927000 R ichiic_ca +ffffffff82927030 R ichiic_ids +ffffffff82928000 R viapm_ca +ffffffff82928030 R viapm_ids +ffffffff82928070 r val_to_temp +ffffffff82928870 r val_to_uV.mult +ffffffff82929000 R amdiic_ca +ffffffff82929028 R amdiic_ids +ffffffff8292a000 R nviic_ca +ffffffff8292a030 R nviic_ids +ffffffff8292b000 R sdhc_pci_ca +ffffffff8292c000 R kate_ca +ffffffff8292c030 r kate_proc +ffffffff8292d000 R km_ca +ffffffff8292d030 r km_devices +ffffffff8292e000 R ksmn_ca +ffffffff8292e030 r ksmn_devices +ffffffff8292f000 R iosf_pci_ca +ffffffff82930000 R itherm_devices +ffffffff82930008 R itherm_ca +ffffffff82931000 R pchtemp_ca +ffffffff82931030 R pchtemp_devices +ffffffff82932000 R rtsx_pci_ca +ffffffff82933000 R xspd_ca +ffffffff82933028 R xspd_devices +ffffffff82934000 R virtio_pci_ca +ffffffff82935000 R dwiic_pci_ca +ffffffff82935030 R dwiic_pci_ids +ffffffff82936000 R bwfm_pci_ca +ffffffff82936030 r bwfm_pci_devices +ffffffff82937000 R ccp_pci_ca +ffffffff82937030 r ccp_pci_devices +ffffffff82938000 R bnxt_devices +ffffffff82938040 R bnxt_ca +ffffffff82939000 R mcx_ca +ffffffff82939030 r mcx_devices +ffffffff82939060 r mcx_rss_config +ffffffff829390d0 r mcx_eth_cap_map +ffffffff829392d0 r mcx_kstat_ppcnt_ieee8023 +ffffffff829392e8 r mcx_kstat_ppcnt_rfc2863 +ffffffff82939300 r mcx_kstat_ppcnt_rfc2819 +ffffffff82939318 r mcx_kstat_ppcnt_rfc3635 +ffffffff82939330 r mcx_ppcnt_ieee8023_tpl +ffffffff829394b0 r mcx_ppcnt_rfc2863_tpl +ffffffff829395c0 r mcx_ppcnt_rfc2819_tpl +ffffffff82939770 r mcx_ppcnt_rfc3635_tpl +ffffffff829398b0 r mcx_kstat_mtmp_tpl +ffffffff82939950 r mcx_kstat_mtmp_rate +ffffffff82939960 r mcx_queue_kstat_tpl +ffffffff8293a000 R iavf_ca +ffffffff8293a030 r iavf_devices +ffffffff8293a040 r iavf_aq_regs +ffffffff8293a0b0 r iavf_link_speeds +ffffffff8293b000 R rge_ca +ffffffff8293b028 R rge_devices +ffffffff8293b030 r rtl8125_mac_cfg2_ephy +ffffffff8293b090 r rge_phy_config_mac_cfg3.mac_cfg3_a438_value +ffffffff8293b0b0 r rge_phy_config_mac_cfg3.mac_cfg3_b88e_value +ffffffff8293b110 r rge_phy_config_mac_cfg4.mac_cfg4_b87c_value +ffffffff8293b170 r rtl8125_mac_cfg4_ephy +ffffffff8293b1e0 r rtl8125_mac_cfg2_mcu +ffffffff8293be80 r rtl8125_mac_cfg3_mcu +ffffffff8293c720 r rtl8125_mac_cfg4_mcu +ffffffff8293ed10 r rtl8125_mac_cfg5_mcu +ffffffff8293fc10 r rtl8125_mac_bps +ffffffff8293ff80 r rtl8125b_mac_bps +ffffffff82940120 r rge_kstats_tpl +ffffffff82941000 R igc_devices +ffffffff82941040 R igc_ca +ffffffff82942000 R ngbe_devices +ffffffff82942008 R ngbe_ca +ffffffff82943000 R com_pci_ca +ffffffff82943030 R com_pci_ids +ffffffff82944000 r agp_attach.agp_max +ffffffff82944048 R agp_ca +ffffffff82945000 R intagp_ca +ffffffff82946000 r drm_plane_create_rotation_property.props +ffffffff82947000 r drm_bridge_priv_state_funcs +ffffffff82949000 r color_encoding_name +ffffffff82949020 r color_range_name +ffffffff8294a000 r drm_subpixel_enum_list +ffffffff8294a060 r drm_dpms_enum_list +ffffffff8294a0a0 r drm_dvi_i_select_enum_list +ffffffff8294a0d0 r drm_dvi_i_subconnector_enum_list +ffffffff8294a100 r drm_tv_select_enum_list +ffffffff8294a150 r drm_tv_subconnector_enum_list +ffffffff8294a1a0 r drm_dp_subconnector_enum_list +ffffffff8294a210 r drm_link_status_enum_list +ffffffff8294a230 r drm_scaling_mode_enum_list +ffffffff8294a270 r drm_aspect_ratio_enum_list +ffffffff8294a2a0 r hdmi_colorspaces +ffffffff8294a370 r dp_colorspaces +ffffffff8294a450 r drm_content_type_enum_list +ffffffff8294a4a0 r drm_panel_orientation_enum_list +ffffffff8294a4e0 r privacy_screen_enum +ffffffff8294b000 r drm_crtc_fence_ops +ffffffff8294c000 r drm_dmt_modes +ffffffff8294e940 r edid_cea_modes_1 +ffffffff829524d0 r edid_cea_modes_193 +ffffffff82953180 r edid_quirk_list +ffffffff82953350 r edid_4k_modes +ffffffff829535b0 r edid_est_modes +ffffffff82953db0 r est3_modes +ffffffff82953f10 r stereo_mandatory_modes +ffffffff82953f90 r extra_modes +ffffffff82954000 r drm_encoder_enum_list +ffffffff82955000 r drm_fbdev_client_funcs +ffffffff82955020 r drm_fb_helper_generic_funcs +ffffffff82955028 r drm_fbdev_fb_ops +ffffffff82956000 r drm_fb_xrgb8888_to_rgb332.dst_pixsize +ffffffff82956004 r drm_fb_xrgb8888_to_rgb565.dst_pixsize +ffffffff82956008 r drm_fb_xrgb8888_to_rgb888.dst_pixsize +ffffffff8295600c r drm_fb_xrgb8888_to_xrgb2101010.dst_pixsize +ffffffff82956010 r drm_fb_xrgb8888_to_gray8.dst_pixsize +ffffffff82956014 r drm_fb_rgb888_to_xrgb8888.dst_pixsize +ffffffff82956018 r drm_fb_rgb565_to_xrgb8888.dst_pixsize +ffffffff82957000 r __drm_format_info.formats +ffffffff82958000 R drm_pgops +ffffffff82959000 r drm_ioctls +ffffffff8295b000 r dma_fence_stub_ops +ffffffff8295b038 R dma_fence_array_ops +ffffffff8295b070 R dma_fence_chain_ops +ffffffff8295b0a8 R dmabufops +ffffffff8295b0e0 R syncfileops +ffffffff8295c000 r drm_plane_type_enum_list +ffffffff8295d000 r drm_mode_status_names +ffffffff8295e000 r primary_plane_funcs +ffffffff8295e068 r safe_modeset_formats +ffffffff8295f000 r orientation_data +ffffffff829625c0 r lcd800x1280_rightside_up +ffffffff829625d8 r lcd720x1280_rightside_up +ffffffff829625f0 r lcd800x1280_leftside_up +ffffffff82962608 r lcd1080x1920_leftside_up +ffffffff82962620 r lcd1200x1920_rightside_up +ffffffff82962638 r gpd_micropc +ffffffff82962650 r gpd_pocket +ffffffff82962668 r gpd_pocket2 +ffffffff82962680 r gpd_win +ffffffff82962698 r gpd_win2 +ffffffff829626b0 r itworks_tw891 +ffffffff829626c8 r lcd1600x2560_rightside_up +ffffffff829626e0 r onegx1_pro +ffffffff829626f8 r lcd1600x2560_leftside_up +ffffffff82962710 r lcd1280x1920_rightside_up +ffffffff82962728 r .compoundliteral +ffffffff82962738 r .compoundliteral.5 +ffffffff82962760 r .compoundliteral.9 +ffffffff82962780 r .compoundliteral.17 +ffffffff829627c0 r .compoundliteral.21 +ffffffff829627e0 r .compoundliteral.23 +ffffffff829627f0 r .compoundliteral.25 +ffffffff82963000 r drm_gem_prime_dmabuf_ops +ffffffff82965000 r is_hdmi_adaptor.dp_dual_mode_hdmi_id +ffffffff82966000 r drm_dp_phy_name.phy_names +ffffffff82966048 r drm_dp_i2c_algo +ffffffff82966058 r drm_dp_i2c_lock_ops +ffffffff82966070 r dp_aux_bl_ops +ffffffff82966090 r dpcd_quirk_list +ffffffff82966320 r drm_dp_psr_setup_time.psr_setup_time_us +ffffffff82967000 R drm_dp_mst_topology_state_funcs +ffffffff82967020 r drm_dp_mst_req_type_str.req_type_str +ffffffff829671f0 r drm_dp_mst_sideband_tx_state_str.sideband_reason_str +ffffffff82967220 r drm_dp_mst_nak_reason_str.nak_reason_str +ffffffff82967278 r drm_dp_mst_i2c_algo +ffffffff82968000 r hdmi_colorimetry_val +ffffffff82969000 r ttm_bo_init_reserved.sys_mem +ffffffff8296a000 r ttm_bo_pipeline_gutting.sys_mem +ffffffff8296b018 R ttm_bo_vm_ops +ffffffff8296c000 r ttm_range_manager_func +ffffffff8296d018 r ttm_kmap_iter_io_ops +ffffffff8296d030 r ttm_kmap_iter_linear_io_ops +ffffffff8296e000 r ttm_sys_manager_func +ffffffff8296f000 r ttm_kmap_iter_tt_ops +ffffffff82970000 r drm_sched_fence_ops_scheduled +ffffffff82970038 r drm_sched_fence_ops_finished +ffffffff82971000 R ch7017_ops +ffffffff82972000 R ch7xxx_ops +ffffffff82972060 r ch7xxx_ids +ffffffff82973000 R ivch_ops +ffffffff82973060 r backup_addresses +ffffffff82974000 R ns2501_ops +ffffffff82974060 r mode_agnostic_values +ffffffff829740e0 r ns2501_modes +ffffffff82975000 R sil164_ops +ffffffff82976000 R tfp410_ops +ffffffff82977000 r chv_dpll +ffffffff82977050 r vlv_dpll +ffffffff829770a0 r g4x_dpll +ffffffff829770f0 r pch_dpll +ffffffff82977138 r intel_dp_enc_funcs +ffffffff82978000 r intel_hdmi_enc_funcs +ffffffff82979000 r vlv_primary_formats +ffffffff82979030 r ivb_primary_formats +ffffffff82979050 r i965_primary_formats +ffffffff82979070 r i8xx_primary_formats +ffffffff82979080 r i965_plane_funcs +ffffffff829790e8 r i8xx_plane_funcs +ffffffff8297a000 r gen11_dsi_encoder_funcs +ffffffff8297a020 r gen11_dsi_connector_funcs +ffffffff8297a098 r gen11_dsi_connector_helper_funcs +ffffffff8297a0e8 r gen11_dsi_host_ops +ffffffff8297b000 r intel_plane_helper_funcs +ffffffff8297c000 r g4x_audio_funcs +ffffffff8297c010 r ilk_audio_funcs +ffffffff8297c020 r hsw_audio_funcs +ffffffff8297c030 r hdmi_audio_clock +ffffffff8297c0a0 r dp_aud_n_m +ffffffff8297c250 r hdmi_aud_ncts_36bpp +ffffffff8297c330 r hdmi_aud_ncts_30bpp +ffffffff8297c410 r hdmi_aud_ncts_24bpp +ffffffff8297d000 r intel_backlight_device_ops +ffffffff8297d018 r bxt_pwm_funcs +ffffffff8297d048 r cnp_pwm_funcs +ffffffff8297d078 r lpt_pwm_funcs +ffffffff8297d0a8 r spt_pwm_funcs +ffffffff8297d0d8 r pch_pwm_funcs +ffffffff8297d108 r ext_pwm_funcs +ffffffff8297d138 r vlv_pwm_funcs +ffffffff8297d168 r i965_pwm_funcs +ffffffff8297d198 r i9xx_pwm_funcs +ffffffff8297d1c8 r pwm_bl_funcs +ffffffff8297e000 r bdb_blocks +ffffffff8297e160 r translate_iboost.mapping +ffffffff8297e163 r adlp_ddc_pin_map +ffffffff8297e16a r adls_ddc_pin_map +ffffffff8297e170 r rkl_pch_tgp_ddc_pin_map +ffffffff8297e175 r icp_ddc_pin_map +ffffffff8297e17f r cnp_ddc_pin_map +ffffffff8297f000 r mtl_sa_info +ffffffff8297f006 r adlp_sa_info +ffffffff8297f00c r adls_sa_info +ffffffff8297f012 r rkl_sa_info +ffffffff8297f018 r tgl_sa_info +ffffffff8297f020 r intel_bw_funcs +ffffffff82980000 r intel_cdclk_funcs +ffffffff82980010 r dg2_cdclk_table +ffffffff829800c0 r adlp_a_step_cdclk_table +ffffffff82980140 r adlp_cdclk_table +ffffffff82980200 r rkl_cdclk_table +ffffffff829802f0 r icl_cdclk_table +ffffffff829803e0 r glk_cdclk_table +ffffffff82980410 r bxt_cdclk_table +ffffffff82980458 r tgl_cdclk_funcs +ffffffff82980478 r ehl_cdclk_funcs +ffffffff82980498 r icl_cdclk_funcs +ffffffff829804b8 r bxt_cdclk_funcs +ffffffff829804d8 r skl_cdclk_funcs +ffffffff829804f8 r bdw_cdclk_funcs +ffffffff82980518 r hsw_cdclk_funcs +ffffffff82980538 r chv_cdclk_funcs +ffffffff82980558 r vlv_cdclk_funcs +ffffffff82980578 r fixed_400mhz_cdclk_funcs +ffffffff82980598 r ilk_cdclk_funcs +ffffffff829805b8 r gm45_cdclk_funcs +ffffffff829805d8 r g33_cdclk_funcs +ffffffff829805f8 r g33_get_cdclk.div_3200 +ffffffff829805fe r g33_get_cdclk.div_4000 +ffffffff82980604 r g33_get_cdclk.div_4800 +ffffffff8298060a r g33_get_cdclk.div_5333 +ffffffff82980610 r i965gm_cdclk_funcs +ffffffff82980630 r i965gm_get_cdclk.div_3200 +ffffffff82980633 r i965gm_get_cdclk.div_4000 +ffffffff82980636 r i965gm_get_cdclk.div_5333 +ffffffff82980640 r pnv_cdclk_funcs +ffffffff82980660 r i945gm_cdclk_funcs +ffffffff82980680 r i915gm_cdclk_funcs +ffffffff829806a0 r i915g_cdclk_funcs +ffffffff829806c0 r i865g_cdclk_funcs +ffffffff829806e0 r i85x_cdclk_funcs +ffffffff82980700 r i845g_cdclk_funcs +ffffffff82980720 r i830_cdclk_funcs +ffffffff82981000 r chv_color_funcs +ffffffff82981028 r i965_color_funcs +ffffffff82981050 r i9xx_color_funcs +ffffffff82981078 r icl_color_funcs +ffffffff829810a0 r glk_color_funcs +ffffffff829810c8 r skl_color_funcs +ffffffff829810f0 r bdw_color_funcs +ffffffff82981118 r hsw_color_funcs +ffffffff82981140 r ivb_color_funcs +ffffffff82981168 r ilk_color_funcs +ffffffff82981190 r ilk_csc_off_zero +ffffffff829811a0 r ilk_csc_coeff_rgb_to_ycbcr +ffffffff829811b2 r ilk_csc_postoff_rgb_to_ycbcr +ffffffff829811c0 r ilk_csc_coeff_limited_range +ffffffff829811d2 r ilk_csc_postoff_limited_range +ffffffff829811e0 r ilk_csc_coeff_identity +ffffffff82982000 r icl_procmon_values +ffffffff82983000 r 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ci_SECT_CONTEXT_def_2 +ffffffff82a07160 r ci_SECT_CONTEXT_def_7 +ffffffff82a07510 r cik_default_state +ffffffff82a09000 r dce3_2_afmt_write_sad_regs.eld_reg_to_type +ffffffff82a0a000 r dce6_afmt_write_sad_regs.eld_reg_to_type +ffffffff82a0b000 r ni_tx_offsets +ffffffff82a0b020 r evergreen_dp_offsets +ffffffff82a0b040 r evergreen_disp_int_status +ffffffff82a0b060 r evergreen_golden_registers +ffffffff82a0b260 r evergreen_golden_registers2 +ffffffff82a0b310 r cypress_mgcg_init +ffffffff82a0ba10 r juniper_mgcg_init +ffffffff82a0be80 r redwood_mgcg_init +ffffffff82a0c1b0 r cedar_golden_registers +ffffffff82a0c390 r cedar_mgcg_init +ffffffff82a0c5f0 r wrestler_golden_registers +ffffffff82a0c840 r supersumo_golden_registers +ffffffff82a0cba0 r sumo_golden_registers +ffffffff82a0cbe0 r barts_golden_registers +ffffffff82a0ce00 r turks_golden_registers +ffffffff82a0d040 r caicos_golden_registers +ffffffff82a0d280 r sumo_rlc_save_restore_register_list +ffffffff82a0d3d0 r evergreen_cs_data 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dvst_golden_registers2 +ffffffff82a16890 r scrapper_golden_registers +ffffffff82a16d70 r tn_rlc_save_restore_register_list +ffffffff82a16f60 r cayman_cs_data +ffffffff82a16fa0 r SECT_CONTEXT_defs +ffffffff82a17020 r SECT_CLEAR_defs +ffffffff82a17040 r SECT_CTRLCONST_defs +ffffffff82a17060 r SECT_CONTEXT_def_2 +ffffffff82a17080 r SECT_CONTEXT_def_4 +ffffffff82a17210 r SECT_CONTEXT_def_5 +ffffffff82a17230 r SECT_CONTEXT_def_1 +ffffffff82a179d0 r SECT_CONTEXT_def_3 +ffffffff82a17ab0 r SECT_CONTEXT_def_6 +ffffffff82a17b90 r SECT_CONTEXT_def_7 +ffffffff82a18018 r SECT_CLEAR_def_1 +ffffffff82a18024 r SECT_CTRLCONST_def_1 +ffffffff82a18030 r cayman_default_state +ffffffff82a19000 r cac_weights_cayman_xt +ffffffff82a19128 r cac_weights_cayman_pro +ffffffff82a19250 r cac_weights_cayman_le +ffffffff82a19380 r cayman_cgcg_cgls_default +ffffffff82a195c0 r cayman_mgcg_default +ffffffff82a19f20 r cayman_sysls_default +ffffffff82a19ff0 r cayman_cgcg_cgls_enable +ffffffff82a1a240 r cayman_cgcg_cgls_disable +ffffffff82a1a4a0 r cayman_mgcg_enable +ffffffff82a1a520 r cayman_mgcg_disable +ffffffff82a1a5a0 r cayman_sysls_enable +ffffffff82a1a670 r cayman_sysls_disable +ffffffff82a1b000 r rn50_reg_safe_bm +ffffffff82a1b1a0 r r100_reg_safe_bm +ffffffff82a1c000 r r200_reg_safe_bm +ffffffff82a1d000 r r300_reg_safe_bm +ffffffff82a1e000 r r420_reg_safe_bm +ffffffff82a20000 r color_formats_table +ffffffff82a20480 r r600_reg_safe_bm +ffffffff82a23000 R r600_utc +ffffffff82a23040 R r600_dtc +ffffffff82a23080 r r600_encode_pci_lane_width.encoded_lanes +ffffffff82a25000 r r100_gfx_ring +ffffffff82a25070 r r300_gfx_ring +ffffffff82a250e0 r rv515_gfx_ring +ffffffff82a25150 r r600_gfx_ring +ffffffff82a251c0 r r600_dma_ring +ffffffff82a25230 r rv6xx_uvd_ring +ffffffff82a252a0 r rv770_uvd_ring +ffffffff82a25310 r evergreen_gfx_ring +ffffffff82a25380 r evergreen_dma_ring +ffffffff82a253f0 r cayman_gfx_ring +ffffffff82a25460 r cayman_dma_ring +ffffffff82a254d0 r cayman_uvd_ring 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radeon_lvds_connector_helper_funcs +ffffffff82a2a190 r radeon_dp_connector_funcs +ffffffff82a2a298 r radeon_lvds_bridge_connector_funcs +ffffffff82a2a310 r radeon_vga_connector_funcs +ffffffff82a2a388 r radeon_dvi_connector_funcs +ffffffff82a2a400 r radeon_edp_connector_funcs +ffffffff82a2a478 r radeon_tv_connector_funcs +ffffffff82a2a4f0 r radeon_lvds_connector_funcs +ffffffff82a2b000 r radeon_family_name +ffffffff82a2b3f0 r radeon_px_quirk_list +ffffffff82a2c000 r radeon_fb_funcs +ffffffff82a2c018 r radeon_mode_funcs +ffffffff82a2c060 r radeon_tmds_pll_enum_list +ffffffff82a2c080 r radeon_tv_std_enum_list +ffffffff82a2c100 r radeon_underscan_enum_list +ffffffff82a2c130 r radeon_audio_enum_list +ffffffff82a2c160 r radeon_dither_enum_list +ffffffff82a2c180 r radeon_output_csc_enum_list +ffffffff82a2c1c0 r radeon_crtc_funcs +ffffffff82a2c280 r hpd_names +ffffffff82a2c2b0 r encoder_names +ffffffff82a2c3e0 r radeon_afmt_init.eg_offsets +ffffffff82a2d000 r aux_offset +ffffffff82a2e000 R radeondrm_ca +ffffffff82a2e030 r pciidlist +ffffffff82a321d0 r kms_driver +ffffffff82a322c0 r radeon_ioctls_kms +ffffffff82a33000 r radeon_fb_helper_funcs +ffffffff82a33008 r radeonfb_ops +ffffffff82a34000 R radeon_fence_ops +ffffffff82a36000 R radeon_gem_object_funcs +ffffffff82a36060 r radeon_gem_vm_ops +ffffffff82a37000 r radeon_i2c_algo +ffffffff82a37010 r radeon_atom_i2c_algo +ffffffff82a38000 r legacy_helper_funcs +ffffffff82a39000 r radeon_backlight_ops +ffffffff82a39018 r radeon_legacy_lvds_enc_funcs +ffffffff82a39038 r radeon_legacy_lvds_helper_funcs +ffffffff82a390a0 r radeon_legacy_tmds_int_enc_funcs +ffffffff82a390c0 r radeon_legacy_tmds_int_helper_funcs +ffffffff82a39128 r radeon_legacy_primary_dac_enc_funcs +ffffffff82a39148 r radeon_legacy_primary_dac_helper_funcs +ffffffff82a391b0 r radeon_legacy_tv_dac_enc_funcs +ffffffff82a391d0 r radeon_legacy_tv_dac_helper_funcs +ffffffff82a39238 r radeon_legacy_tmds_ext_enc_funcs +ffffffff82a39258 r radeon_legacy_tmds_ext_helper_funcs +ffffffff82a3a000 r SLOPE_value +ffffffff82a3a030 r YCOEF_EN_value +ffffffff82a3a060 r YCOEF_value +ffffffff82a3a090 r available_tv_modes +ffffffff82a3a110 r hor_timing_NTSC +ffffffff82a3a150 r vert_timing_NTSC +ffffffff82a3a190 r hor_timing_PAL +ffffffff82a3a1d0 r vert_timing_PAL +ffffffff82a3c000 r radeon_pm_state_type_name +ffffffff82a3d000 r radeon_evict_flags.placements +ffffffff82a40000 r rs600_reg_safe_bm +ffffffff82a42000 r rv515_reg_safe_bm +ffffffff82a43000 r dll_speed_table +ffffffff82a44000 r r7xx_golden_registers +ffffffff82a44090 r r7xx_golden_dyn_gpr_registers +ffffffff82a44100 r rv770ce_golden_registers +ffffffff82a44160 r rv770_golden_registers +ffffffff82a441b0 r rv770_mgcg_init +ffffffff82a448f0 r rv730_golden_registers +ffffffff82a44950 r rv730_mgcg_init +ffffffff82a44ee0 r rv710_golden_registers +ffffffff82a44f30 r rv710_mgcg_init +ffffffff82a451d0 r rv740_golden_registers +ffffffff82a45360 r rv740_mgcg_init +ffffffff82a47000 r rv730_smc_int_vectors +ffffffff82a47040 r rv710_smc_int_vectors +ffffffff82a47080 r rv740_smc_int_vectors +ffffffff82a470c0 r cypress_smc_int_vectors +ffffffff82a47100 r caicos_smc_int_vectors +ffffffff82a47140 r cayman_smc_int_vectors +ffffffff82a48000 r tahiti_io_mc_regs +ffffffff82a48120 r pitcairn_io_mc_regs +ffffffff82a48240 r verde_io_mc_regs +ffffffff82a48360 r oland_io_mc_regs +ffffffff82a48480 r hainan_io_mc_regs +ffffffff82a485a0 r crtc_offsets +ffffffff82a485c0 r si_disp_int_status +ffffffff82a485e0 r tahiti_golden_registers +ffffffff82a48760 r tahiti_golden_rlc_registers +ffffffff82a487b0 r tahiti_mgcg_cgcg_init +ffffffff82a48d98 r tahiti_golden_registers2 +ffffffff82a48db0 r pitcairn_golden_registers +ffffffff82a48f00 r pitcairn_golden_rlc_registers +ffffffff82a48f40 r pitcairn_mgcg_cgcg_init +ffffffff82a493b0 r verde_golden_registers +ffffffff82a49620 r verde_golden_rlc_registers +ffffffff82a49660 r verde_mgcg_cgcg_init +ffffffff82a49ae0 r oland_golden_registers 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lcac_pitcairn +ffffffff82a4d530 r cac_override_pitcairn +ffffffff82a4d544 r powertune_data_pitcairn +ffffffff82a4d580 r lcac_cape_verde +ffffffff82a4d9d0 r cac_override_cape_verde +ffffffff82a4d9e4 r powertune_data_cape_verde +ffffffff82a4da20 r cac_weights_cape_verde_pro +ffffffff82a4def0 r cac_weights_heathrow +ffffffff82a4e3c0 r cac_weights_chelsea_xt +ffffffff82a4e890 r cac_weights_chelsea_pro +ffffffff82a4ed60 r cac_weights_cape_verde +ffffffff82a4f230 r cac_weights_mars_pro +ffffffff82a4f700 r lcac_mars_pro +ffffffff82a4fa60 r cac_override_oland +ffffffff82a4fa74 r powertune_data_mars_pro +ffffffff82a4fab0 r cac_weights_mars_xt +ffffffff82a4ff80 r cac_weights_oland_pro +ffffffff82a50450 r cac_weights_oland_xt +ffffffff82a50920 r lcac_oland +ffffffff82a50c7c r powertune_data_oland +ffffffff82a50cb8 r dte_data_oland +ffffffff82a50d90 r cac_weights_hainan +ffffffff82a51254 r powertune_data_hainan +ffffffff82a51290 r dte_data_aruba_pro +ffffffff82a51360 r dte_data_tahiti_pro +ffffffff82a51430 r dte_data_curacao_pro +ffffffff82a51500 r dte_data_neptune_xt +ffffffff82a515d0 r dte_data_sun_xt +ffffffff82a516a0 r dte_data_venus_xtx +ffffffff82a51770 r dte_data_venus_xt +ffffffff82a51840 r dte_data_venus_pro +ffffffff82a51910 r dte_data_mars_pro +ffffffff82a52000 r si_program_jump_on_start.data +ffffffff82a53000 r sumo_dtc +ffffffff82a54000 r trinity_mgcg_shls_default +ffffffff82a54380 r trinity_sysls_enable +ffffffff82a54450 r trinity_sysls_disable +ffffffff82a56000 r GC_BASE +ffffffff82a560a8 r HDP_BASE +ffffffff82a56150 r MMHUB_BASE +ffffffff82a561f8 r ATHUB_BASE +ffffffff82a562a0 r NBIO_BASE +ffffffff82a56348 r MP0_BASE +ffffffff82a563f0 r MP1_BASE +ffffffff82a56498 r DF_BASE +ffffffff82a56540 r OSSSYS_BASE +ffffffff82a565e8 r SDMA0_BASE +ffffffff82a56690 r SDMA1_BASE +ffffffff82a56738 r SDMA2_BASE +ffffffff82a567e0 r SDMA3_BASE +ffffffff82a56888 r SDMA4_BASE +ffffffff82a56930 r SMUIO_BASE +ffffffff82a569d8 r THM_BASE +ffffffff82a56a80 r UMC_BASE +ffffffff82a56b28 r VCN_BASE +ffffffff82a57000 r amdgpu_afmt_predefined_acr +ffffffff82a58000 r atom_op_names +ffffffff82a583e0 r opcode_table +ffffffff82a58bd0 r atom_dst_to_src +ffffffff82a58c50 r atom_io_names +ffffffff82a58c80 r atom_table_names +ffffffff82a58ed0 r atom_iio_len +ffffffff82a59000 r object_connector_convert +ffffffff82a59058 R amdgpu_vbios_version_attr_group +ffffffff82a5a000 r voltage_names +ffffffff82a5a020 r pre_emph_names +ffffffff82a5b000 r amdgpu_atombios_encoder_backlight_ops +ffffffff82a5d000 r amdgpu_benchmark.common_modes +ffffffff82a5e000 r amdgpu_cgs_ops +ffffffff82a5f000 r amdgpu_connector_dp_helper_funcs +ffffffff82a5f050 r amdgpu_connector_vga_helper_funcs +ffffffff82a5f0a0 r amdgpu_connector_dvi_helper_funcs +ffffffff82a5f0f0 r amdgpu_connector_lvds_helper_funcs +ffffffff82a5f140 r amdgpu_connector_dp_funcs +ffffffff82a5f1c0 r amdgpu_connector_add_common_modes.common_modes +ffffffff82a5f248 r amdgpu_connector_edp_funcs +ffffffff82a5f2c0 r amdgpu_connector_vga_funcs +ffffffff82a5f338 r amdgpu_connector_dvi_funcs +ffffffff82a5f3b0 r amdgpu_connector_lvds_funcs +ffffffff82a61000 R amdgpu_ctx_num_entities +ffffffff82a62000 r amdgpu_kms_driver +ffffffff82a620f0 r amdgpu_device_ip_reinit_late_sriov.ip_order +ffffffff82a63000 r hw_id_map +ffffffff82a63090 r hw_id_names +ffffffff82a64000 r hpd_names +ffffffff82a64030 r encoder_names +ffffffff82a64180 r dcc_retile_formats +ffffffff82a64270 r dcc_formats +ffffffff82a64360 R amdgpu_mode_funcs +ffffffff82a643b0 r amdgpu_underscan_enum_list +ffffffff82a643e0 r amdgpu_audio_enum_list +ffffffff82a64410 r amdgpu_dither_enum_list +ffffffff82a64430 r amdgpu_fb_funcs +ffffffff82a65000 R amdgpu_dmabuf_ops +ffffffff82a66000 R amdgpu_ioctls_kms +ffffffff82a66210 R amdgpu_ca +ffffffff82a66240 r pciidlist +ffffffff82a67110 r amdgpu_unsupported_pciidlist +ffffffff82a67690 r amdgpu_kms_driver +ffffffff82a68000 r amdgpu_job_fence_ops +ffffffff82a68038 r amdgpu_fence_ops +ffffffff82a69000 r amdgpu_gem_object_funcs +ffffffff82a69060 r amdgpu_gem_vm_ops +ffffffff82a6b000 R amdgpu_gtt_mgr_attr_group +ffffffff82a6b018 r amdgpu_gtt_mgr_func +ffffffff82a6c000 r amdgpu_atombios_i2c_algo +ffffffff82a6d000 R amdgpu_sched_ops +ffffffff82a70000 r amdgpu_vram_names +ffffffff82a71000 r amdgpu_preempt_mgr_func +ffffffff82a72000 R psp_ip_funcs +ffffffff82a720a0 R psp_v3_1_ip_block +ffffffff82a720b8 R psp_v10_0_ip_block +ffffffff82a720d0 R psp_v11_0_ip_block +ffffffff82a720e8 R psp_v11_0_8_ip_block +ffffffff82a72100 R psp_v12_0_ip_block +ffffffff82a72118 R psp_v13_0_ip_block +ffffffff82a72130 R psp_v13_0_4_ip_block +ffffffff82a74000 r amdgpu_evict_flags.placements +ffffffff82a78000 R amdgpu_vkms_ip_block +ffffffff82a7a000 R amdgpu_vm_cpu_funcs +ffffffff82a7c000 R amdgpu_vm_sdma_funcs +ffffffff82a7d000 R amdgpu_vram_mgr_attr_group +ffffffff82a7d018 r amdgpu_vram_mgr_func +ffffffff82a7e000 r xgmi_pcs_err_status_reg_arct +ffffffff82a7f000 r GC_BASE +ffffffff82a7f0c0 r HDP_BASE +ffffffff82a7f180 r MMHUB_BASE +ffffffff82a7f240 r ATHUB_BASE +ffffffff82a7f300 r NBIF0_BASE +ffffffff82a7f3c0 r MP0_BASE +ffffffff82a7f480 r MP1_BASE +ffffffff82a7f540 r UVD_BASE +ffffffff82a7f600 r DF_BASE +ffffffff82a7f6c0 r OSSSYS_BASE +ffffffff82a7f780 r SDMA0_BASE +ffffffff82a7f840 r SDMA1_BASE +ffffffff82a7f900 r SDMA2_BASE +ffffffff82a7f9c0 r SDMA3_BASE +ffffffff82a7fa80 r SDMA4_BASE +ffffffff82a7fb40 r SDMA5_BASE +ffffffff82a7fc00 r SDMA6_BASE +ffffffff82a7fcc0 r SDMA7_BASE +ffffffff82a7fd80 r SMUIO_BASE +ffffffff82a7fe40 r THM_BASE +ffffffff82a7ff00 r UMC_BASE +ffffffff82a7ffc0 r RSMU_BASE +ffffffff82a81000 r cz_ih_ip_funcs +ffffffff82a810a0 R cz_ih_ip_block +ffffffff82a810b8 r cz_ih_funcs +ffffffff82a82000 r crtc_offsets +ffffffff82a82020 r dce_v10_0_ip_funcs +ffffffff82a820c0 R dce_v10_0_ip_block +ffffffff82a820d8 R dce_v10_1_ip_block +ffffffff82a820f0 r dce_v10_0_display_funcs +ffffffff82a82150 r hpd_offsets +ffffffff82a82168 r dce_v10_0_encoder_funcs +ffffffff82a82188 r dce_v10_0_dac_helper_funcs +ffffffff82a821f0 r dce_v10_0_dig_helper_funcs +ffffffff82a82258 r dce_v10_0_ext_helper_funcs +ffffffff82a822c0 r dce_v10_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82a822f0 r dce_v10_0_crtc_irq_funcs +ffffffff82a82300 r dce_v10_0_pageflip_irq_funcs +ffffffff82a82310 r dce_v10_0_hpd_irq_funcs +ffffffff82a82320 r interrupt_status_offsets +ffffffff82a82380 r dce_v10_0_crtc_funcs +ffffffff82a82440 r dce_v10_0_crtc_helper_funcs +ffffffff82a824c0 r vga_control_regs +ffffffff82a824e0 r dig_offsets +ffffffff82a82500 r pin_offsets +ffffffff82a82520 r fiji_mgcg_cgcg_init +ffffffff82a82540 r golden_settings_fiji_a10 +ffffffff82a82570 r tonga_mgcg_cgcg_init +ffffffff82a82590 r golden_settings_tonga_a11 +ffffffff82a83000 r crtc_offsets +ffffffff82a83020 r dce_v11_0_ip_funcs +ffffffff82a830c0 R dce_v11_0_ip_block +ffffffff82a830d8 R dce_v11_2_ip_block +ffffffff82a830f0 r dce_v11_0_display_funcs +ffffffff82a83150 r hpd_offsets +ffffffff82a83168 r dce_v11_0_encoder_funcs +ffffffff82a83188 r dce_v11_0_dac_helper_funcs +ffffffff82a831f0 r dce_v11_0_dig_helper_funcs +ffffffff82a83258 r dce_v11_0_ext_helper_funcs +ffffffff82a832c0 r dce_v11_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82a832f0 r dce_v11_0_crtc_irq_funcs +ffffffff82a83300 r dce_v11_0_pageflip_irq_funcs +ffffffff82a83310 r dce_v11_0_hpd_irq_funcs +ffffffff82a83320 r interrupt_status_offsets +ffffffff82a83380 r dce_v11_0_crtc_funcs +ffffffff82a83440 r dce_v11_0_crtc_helper_funcs +ffffffff82a834c0 r vga_control_regs +ffffffff82a834e0 r dig_offsets +ffffffff82a83510 r cz_mgcg_cgcg_init +ffffffff82a83530 r cz_golden_settings_a11 +ffffffff82a83550 r stoney_golden_settings_a11 +ffffffff82a83570 r polaris11_golden_settings_a11 +ffffffff82a835b0 r polaris10_golden_settings_a11 +ffffffff82a84000 R df_v1_7_funcs +ffffffff82a84070 r df_v1_7_channel_number +ffffffff82a85000 R df_v3_6_funcs +ffffffff82a85070 r df_v3_6_channel_number +ffffffff82a86000 r GC_BASE +ffffffff82a860a8 r HDP_BASE +ffffffff82a86150 r MMHUB_BASE +ffffffff82a861f8 r ATHUB_BASE +ffffffff82a862a0 r NBIO_BASE +ffffffff82a86348 r MP0_BASE +ffffffff82a863f0 r MP1_BASE +ffffffff82a86498 r VCN0_BASE +ffffffff82a86540 r DF_BASE +ffffffff82a865e8 r DCN_BASE +ffffffff82a86690 r OSSSYS_BASE +ffffffff82a86738 r SMUIO_BASE +ffffffff82a867e0 r THM_BASE +ffffffff82a87000 r gfx_v10_0_ip_funcs +ffffffff82a870a0 R gfx_v10_0_ip_block +ffffffff82a870b8 r gfx_v10_0_kiq_pm4_funcs +ffffffff82a870f8 r gfx_v10_0_ring_funcs_kiq +ffffffff82a87218 r gfx_v10_0_ring_funcs_gfx +ffffffff82a87338 r gfx_v10_0_ring_funcs_compute +ffffffff82a87458 r gfx_v10_0_eop_irq_funcs +ffffffff82a87468 r gfx_v10_0_kiq_irq_funcs +ffffffff82a87478 r gfx_v10_0_priv_reg_irq_funcs +ffffffff82a87488 r gfx_v10_0_priv_inst_irq_funcs +ffffffff82a87498 r gfx_v10_0_rlc_funcs +ffffffff82a87500 r gfx_v10_0_rlc_funcs_sriov +ffffffff82a87570 r gfx10_cs_data +ffffffff82a87590 r gfx10_SECT_CONTEXT_defs +ffffffff82a87620 r gfx10_SECT_CONTEXT_def_1 +ffffffff82a87980 r gfx10_SECT_CONTEXT_def_3 +ffffffff82a87990 r gfx10_SECT_CONTEXT_def_4 +ffffffff82a87c08 r gfx10_SECT_CONTEXT_def_5 +ffffffff82a87c10 r gfx10_SECT_CONTEXT_def_6 +ffffffff82a87c20 r gfx10_SECT_CONTEXT_def_2 +ffffffff82a88060 r gfx10_SECT_CONTEXT_def_7 +ffffffff82a88170 r gfx10_SECT_CONTEXT_def_8 +ffffffff82a884a0 r gfx_v10_0_gfx_funcs +ffffffff82a884e0 r golden_settings_gc_rlc_spm_10_0_nv10 +ffffffff82a8e780 r golden_settings_gc_rlc_spm_10_1_nv14 +ffffffff82a921a0 r golden_settings_gc_rlc_spm_10_1_2_nv12 +ffffffff82a98440 r golden_settings_gc_10_1 +ffffffff82a98800 r golden_settings_gc_10_0_nv10 +ffffffff82a98800 r golden_settings_gc_10_1_1 +ffffffff82a98b90 r golden_settings_gc_10_1_2 +ffffffff82a98b90 r golden_settings_gc_10_1_nv14 +ffffffff82a98f80 r golden_settings_gc_10_1_2_nv12 +ffffffff82a98f80 r golden_settings_gc_10_3 +ffffffff82a99388 r golden_settings_gc_10_3_sienna_cichlid +ffffffff82a99390 r golden_settings_gc_10_3_2 +ffffffff82a99780 r golden_settings_gc_10_3_vangogh +ffffffff82a999e0 r golden_settings_gc_10_3_3 +ffffffff82a99bc0 r golden_settings_gc_10_3_4 +ffffffff82a99f20 r golden_settings_gc_10_3_5 +ffffffff82a9a220 r golden_settings_gc_10_0_cyan_skillfish +ffffffff82a9a550 r golden_settings_gc_10_3_6 +ffffffff82a9a760 r golden_settings_gc_10_3_7 +ffffffff82a9b000 r gfx_v11_0_ip_funcs +ffffffff82a9b0a0 R gfx_v11_0_ip_block +ffffffff82a9b0b8 r gfx_v11_0_kiq_pm4_funcs +ffffffff82a9b0f8 r gfx_v11_0_ring_funcs_kiq +ffffffff82a9b218 r gfx_v11_0_ring_funcs_gfx +ffffffff82a9b338 r gfx_v11_0_ring_funcs_compute +ffffffff82a9b458 r gfx_v11_0_eop_irq_funcs +ffffffff82a9b468 r gfx_v11_0_priv_reg_irq_funcs +ffffffff82a9b478 r gfx_v11_0_priv_inst_irq_funcs +ffffffff82a9b488 r gfx_v11_0_rlc_funcs +ffffffff82a9b4f0 r gfx11_cs_data +ffffffff82a9b510 r gfx11_SECT_CONTEXT_defs +ffffffff82a9b590 r gfx11_SECT_CONTEXT_def_1 +ffffffff82a9b8f0 r gfx11_SECT_CONTEXT_def_3 +ffffffff82a9b900 r gfx11_SECT_CONTEXT_def_5 +ffffffff82a9b908 r gfx11_SECT_CONTEXT_def_6 +ffffffff82a9b910 r gfx11_SECT_CONTEXT_def_2 +ffffffff82a9bd50 r gfx11_SECT_CONTEXT_def_4 +ffffffff82a9bfd0 r gfx11_SECT_CONTEXT_def_7 +ffffffff82a9c438 r gfx_v11_0_gfx_funcs +ffffffff82a9c480 r golden_settings_gc_11_0_1 +ffffffff82a9d000 r gfx_v8_0_ip_funcs +ffffffff82a9d0a0 R gfx_v8_0_ip_block +ffffffff82a9d0b8 R gfx_v8_1_ip_block +ffffffff82a9d0d0 r gfx_v8_0_gfx_funcs +ffffffff82a9d110 r gfx_v8_0_ring_funcs_kiq +ffffffff82a9d230 r gfx_v8_0_ring_funcs_gfx +ffffffff82a9d350 r gfx_v8_0_ring_funcs_compute +ffffffff82a9d470 r amdgpu_gds_reg_offset +ffffffff82a9d570 r gfx_v8_0_eop_irq_funcs +ffffffff82a9d580 r gfx_v8_0_priv_reg_irq_funcs +ffffffff82a9d590 r gfx_v8_0_priv_inst_irq_funcs +ffffffff82a9d5a0 r gfx_v8_0_cp_ecc_error_irq_funcs +ffffffff82a9d5b0 r gfx_v8_0_sq_irq_funcs +ffffffff82a9d5c0 r sq_edc_source_names +ffffffff82a9d5f8 r iceland_rlc_funcs +ffffffff82a9d660 r vi_cs_data +ffffffff82a9d680 r vi_SECT_CONTEXT_defs +ffffffff82a9d700 r vi_SECT_CONTEXT_def_1 +ffffffff82a9da50 r vi_SECT_CONTEXT_def_3 +ffffffff82a9da70 r vi_SECT_CONTEXT_def_4 +ffffffff82a9dce4 r vi_SECT_CONTEXT_def_5 +ffffffff82a9dcec r vi_SECT_CONTEXT_def_6 +ffffffff82a9dcf0 r vi_SECT_CONTEXT_def_2 +ffffffff82a9e140 r vi_SECT_CONTEXT_def_7 +ffffffff82a9e4f0 r vgpr_init_compute_shader +ffffffff82a9e600 r vgpr_init_regs +ffffffff82a9e690 r sgpr1_init_regs +ffffffff82a9e720 r sgpr2_init_regs +ffffffff82a9e7b0 r sec_ded_counter_registers +ffffffff82a9e820 r iceland_mgcg_cgcg_init +ffffffff82a9eb20 r golden_settings_iceland_a11 +ffffffff82a9ebe0 r iceland_golden_common_all +ffffffff82a9ec40 r fiji_mgcg_cgcg_init +ffffffff82a9edf0 r golden_settings_fiji_a10 +ffffffff82a9ee80 r fiji_golden_common_all +ffffffff82a9ef00 r tonga_mgcg_cgcg_init +ffffffff82a9f290 r golden_settings_tonga_a11 +ffffffff82a9f350 r tonga_golden_common_all +ffffffff82a9f3b0 r golden_settings_vegam_a11 +ffffffff82a9f480 r vegam_golden_common_all +ffffffff82a9f4d0 r golden_settings_polaris11_a11 +ffffffff82a9f5a0 r polaris11_golden_common_all +ffffffff82a9f5f0 r golden_settings_polaris10_a11 +ffffffff82a9f6c0 r polaris10_golden_common_all +ffffffff82a9f720 r cz_mgcg_cgcg_init +ffffffff82a9fab0 r cz_golden_settings_a11 +ffffffff82a9fb40 r cz_golden_common_all +ffffffff82a9fba0 r stoney_mgcg_cgcg_init +ffffffff82a9fbe0 r stoney_golden_settings_a11 +ffffffff82a9fc60 r stoney_golden_common_all +ffffffff82aa0000 R gfx_v9_0_ras_ops +ffffffff82aa0040 r gfx_v9_0_ip_funcs +ffffffff82aa00e0 R gfx_v9_0_ip_block +ffffffff82aa0100 r ras_gfx_subblocks +ffffffff82aa0b80 r gfx_v9_0_edc_counter_regs +ffffffff82aa0f20 r gfx_v9_0_ras_fields +ffffffff82aa2000 r gfx_v9_0_kiq_pm4_funcs +ffffffff82aa2040 r gfx_v9_0_ring_funcs_kiq +ffffffff82aa2160 r gfx_v9_0_ring_funcs_gfx +ffffffff82aa2280 r gfx_v9_0_ring_funcs_compute +ffffffff82aa23a0 r gfx_v9_0_eop_irq_funcs +ffffffff82aa23b0 r gfx_v9_0_priv_reg_irq_funcs +ffffffff82aa23c0 r gfx_v9_0_priv_inst_irq_funcs +ffffffff82aa23d0 r gfx_v9_0_cp_ecc_error_irq_funcs +ffffffff82aa23e0 r gfx_v9_0_rlc_funcs +ffffffff82aa2450 r gfx9_cs_data +ffffffff82aa2470 r gfx9_SECT_CONTEXT_defs +ffffffff82aa2500 r gfx9_SECT_CONTEXT_def_1 +ffffffff82aa2850 r gfx9_SECT_CONTEXT_def_3 +ffffffff82aa2860 r gfx9_SECT_CONTEXT_def_4 +ffffffff82aa2ad4 r gfx9_SECT_CONTEXT_def_5 +ffffffff82aa2adc r gfx9_SECT_CONTEXT_def_6 +ffffffff82aa2ae0 r gfx9_SECT_CONTEXT_def_7 +ffffffff82aa2bf0 r gfx9_SECT_CONTEXT_def_2 +ffffffff82aa3060 r gfx9_SECT_CONTEXT_def_8 +ffffffff82aa32d0 r vgpr_init_compute_shader_arcturus +ffffffff82aa3b60 r vgpr_init_regs_arcturus +ffffffff82aa3cf0 r vgpr_init_regs +ffffffff82aa3e80 r sgpr1_init_regs +ffffffff82aa4010 r sgpr2_init_regs +ffffffff82aa4198 r gfx_v9_0_gfx_funcs +ffffffff82aa41e0 r golden_settings_gc_9_0 +ffffffff82aa43c0 r golden_settings_gc_9_0_vg10 +ffffffff82aa4570 r golden_settings_gc_9_2_1 +ffffffff82aa46f0 r golden_settings_gc_9_2_1_vg12 +ffffffff82aa4830 r golden_settings_gc_9_0_vg20 +ffffffff82aa4940 r golden_settings_gc_9_4_1_arct +ffffffff82aa4a50 r golden_settings_gc_9_1 +ffffffff82aa4c90 r golden_settings_gc_9_1_rv2 +ffffffff82aa4e60 r golden_settings_gc_9_1_rv1 +ffffffff82aa4f10 r golden_settings_gc_9_1_rn +ffffffff82aa5030 r golden_settings_gc_9_x_common +ffffffff82aa6000 R gfx_v9_4_ras_ops +ffffffff82aa6040 r gfx_v9_4_edc_counter_regs +ffffffff82aa6420 r gfx_v9_4_ras_fields +ffffffff82aa8000 R vgpr_init_regs_aldebaran +ffffffff82aa81b0 R sgpr112_init_regs_aldebaran +ffffffff82aa8360 R sgpr96_init_regs_aldebaran +ffffffff82aa8510 R sgpr64_init_regs_aldebaran +ffffffff82aa86c0 r golden_settings_gc_9_4_2_alde +ffffffff82aa8720 r golden_settings_gc_9_4_2_alde_die_0 +ffffffff82aa87b0 r golden_settings_gc_9_4_2_alde_die_1 +ffffffff82aa8840 r sgpr112_init_compute_shader_aldebaran +ffffffff82aa8a60 r sgpr96_init_compute_shader_aldebaran +ffffffff82aa8c50 r sgpr64_init_compute_shader_aldebaran +ffffffff82aa8dc0 r vgpr_init_compute_shader_aldebaran +ffffffff82aa96a0 r gfx_v9_4_2_edc_counter_regs +ffffffff82aa9a20 r gfx_v9_4_2_ras_fields +ffffffff82aab3c0 r gfx_v9_4_2_utc_blocks +ffffffff82aac000 R gfxhub_v1_0_funcs +ffffffff82aad000 R gfxhub_v2_0_funcs +ffffffff82aad060 r gfxhub_v2_0_vmhub_funcs +ffffffff82aad070 r gfxhub_client_ids +ffffffff82aae000 R gfxhub_v2_1_funcs +ffffffff82aae060 r gfxhub_v2_1_vmhub_funcs +ffffffff82aae070 r gfxhub_client_ids +ffffffff82aaf000 R gfxhub_v3_0_funcs +ffffffff82aaf060 r gfxhub_v3_0_vmhub_funcs +ffffffff82aaf070 r gfxhub_client_ids +ffffffff82ab0000 R gfxhub_v3_0_3_funcs +ffffffff82ab0060 r gfxhub_v3_0_3_vmhub_funcs +ffffffff82ab0070 r gfxhub_client_ids +ffffffff82ab1000 R gmc_v10_0_ip_funcs +ffffffff82ab10a0 R gmc_v10_0_ip_block +ffffffff82ab10b8 r gmc_v10_0_gmc_funcs +ffffffff82ab1100 r gmc_v10_0_irq_funcs +ffffffff82ab1110 r gmc_v10_0_ecc_funcs +ffffffff82ab2000 R gmc_v11_0_ip_funcs +ffffffff82ab20a0 R gmc_v11_0_ip_block +ffffffff82ab20b8 r gmc_v11_0_gmc_funcs +ffffffff82ab2100 r gmc_v11_0_irq_funcs +ffffffff82ab2110 r gmc_v11_0_ecc_funcs +ffffffff82ab3000 r gmc_v7_0_ip_funcs +ffffffff82ab30a0 R gmc_v7_0_ip_block +ffffffff82ab30b8 R gmc_v7_4_ip_block +ffffffff82ab30d0 r gmc_v7_0_gmc_funcs +ffffffff82ab3118 r gmc_v7_0_irq_funcs +ffffffff82ab3128 r iceland_mgcg_cgcg_init +ffffffff82ab3140 r golden_settings_iceland_a11 +ffffffff82ab3170 r mc_cg_registers +ffffffff82ab31a0 r mc_cg_en +ffffffff82ab31d0 r mc_cg_ls_en +ffffffff82ab4000 r gmc_v8_0_ip_funcs +ffffffff82ab40a0 R gmc_v8_0_ip_block +ffffffff82ab40b8 R gmc_v8_1_ip_block +ffffffff82ab40d0 R gmc_v8_5_ip_block +ffffffff82ab40e8 r gmc_v8_0_gmc_funcs +ffffffff82ab4130 r gmc_v8_0_irq_funcs +ffffffff82ab4140 r fiji_mgcg_cgcg_init +ffffffff82ab4150 r golden_settings_fiji_a10 +ffffffff82ab4180 r tonga_mgcg_cgcg_init +ffffffff82ab4190 r golden_settings_tonga_a11 +ffffffff82ab41f0 r golden_settings_polaris11_a11 +ffffffff82ab4220 r golden_settings_polaris10_a11 +ffffffff82ab425c r cz_mgcg_cgcg_init +ffffffff82ab4270 r stoney_mgcg_cgcg_init +ffffffff82ab4290 r golden_settings_stoney_common +ffffffff82ab5000 R gmc_v9_0_ip_funcs +ffffffff82ab50a0 R gmc_v9_0_ip_block +ffffffff82ab50b8 r gmc_v9_0_gmc_funcs +ffffffff82ab5100 r gmc_v9_0_irq_funcs +ffffffff82ab5110 r gmc_v9_0_ecc_funcs +ffffffff82ab5120 r gfxhub_client_ids +ffffffff82ab5190 r mmhub_client_ids_vega10 +ffffffff82ab5480 r mmhub_client_ids_vega12 +ffffffff82ab5780 r mmhub_client_ids_vega20 +ffffffff82ab5a70 r mmhub_client_ids_arcturus +ffffffff82ab7280 r mmhub_client_ids_raven +ffffffff82ab7440 r mmhub_client_ids_renoir +ffffffff82ab7630 r mmhub_client_ids_aldebaran +ffffffff82ab8e40 r ecc_umc_mcumc_ctrl_addrs +ffffffff82ab8ec0 r ecc_umc_mcumc_ctrl_mask_addrs +ffffffff82ab8f40 r golden_settings_mmhub_1_0_0 +ffffffff82ab8f70 r golden_settings_athub_1_0_0 +ffffffff82ab9000 R hdp_v4_0_funcs +ffffffff82aba000 R hdp_v5_0_funcs +ffffffff82abb000 R hdp_v5_2_funcs +ffffffff82abc000 R hdp_v6_0_funcs +ffffffff82abd000 r iceland_ih_ip_funcs +ffffffff82abd0a0 R iceland_ih_ip_block +ffffffff82abd0b8 r iceland_ih_funcs +ffffffff82abe000 r ih_v6_0_ip_funcs +ffffffff82abe0a0 R ih_v6_0_ip_block +ffffffff82abe0b8 r ih_v6_0_funcs +ffffffff82abe0d8 r ih_v6_0_self_irq_funcs +ffffffff82abf000 R gfx_v11_0_imu_funcs +ffffffff82abf030 r imu_rlc_ram_golden_11 +ffffffff82abf680 r imu_rlc_ram_golden_11_0_2 +ffffffff82ac0000 r imu_rlc_ram_golden_11_0_3 +ffffffff82ac1000 r jpeg_v1_0_decode_ring_vm_funcs +ffffffff82ac1120 r jpeg_v1_0_irq_funcs +ffffffff82ac2000 r jpeg_v2_0_ip_funcs +ffffffff82ac20a0 R jpeg_v2_0_ip_block +ffffffff82ac20b8 r jpeg_v2_0_dec_ring_vm_funcs +ffffffff82ac21d8 r jpeg_v2_0_irq_funcs +ffffffff82ac3000 r jpeg_v2_5_ip_funcs +ffffffff82ac30a0 R jpeg_v2_5_ip_block +ffffffff82ac30b8 r jpeg_v2_6_ip_funcs +ffffffff82ac3158 R jpeg_v2_6_ip_block +ffffffff82ac3170 R jpeg_v2_6_ras_hw_ops +ffffffff82ac31b0 r jpeg_v2_5_dec_ring_vm_funcs +ffffffff82ac32d0 r jpeg_v2_6_dec_ring_vm_funcs +ffffffff82ac33f0 r jpeg_v2_5_irq_funcs +ffffffff82ac4000 r jpeg_v3_0_ip_funcs +ffffffff82ac40a0 R jpeg_v3_0_ip_block +ffffffff82ac40b8 r jpeg_v3_0_dec_ring_vm_funcs +ffffffff82ac41d8 r jpeg_v3_0_irq_funcs +ffffffff82ac5000 r jpeg_v4_0_ip_funcs +ffffffff82ac50a0 R jpeg_v4_0_ip_block +ffffffff82ac50b8 r jpeg_v4_0_dec_ring_vm_funcs +ffffffff82ac51d8 r jpeg_v4_0_irq_funcs +ffffffff82ac6000 R lsdma_v6_0_funcs +ffffffff82ac7000 R mca_v3_0_mp0_hw_ops +ffffffff82ac7040 R mca_v3_0_mp1_hw_ops +ffffffff82ac7080 R mca_v3_0_mpio_hw_ops +ffffffff82ac70c0 R mca_v3_0_funcs +ffffffff82ac8000 r mes_v10_1_ip_funcs +ffffffff82ac80a0 R mes_v10_1_ip_block +ffffffff82ac80b8 r mes_v10_1_funcs +ffffffff82ac80e8 r mes_v10_1_ring_funcs +ffffffff82ac9000 r mes_v11_0_ip_funcs +ffffffff82ac90a0 R mes_v11_0_ip_block +ffffffff82ac90b8 r mes_v11_0_funcs +ffffffff82ac90e8 r mes_v11_0_ring_funcs +ffffffff82aca000 R mmhub_v1_0_funcs +ffffffff82aca050 r mmhub_v1_0_edc_cnt_regs +ffffffff82aca0c0 r mmhub_v1_0_ras_fields +ffffffff82acb000 R mmhub_v1_7_funcs +ffffffff82acb050 r mmhub_v1_7_edc_cnt_regs +ffffffff82acb250 r mmhub_v1_7_ras_fields +ffffffff82acc9c0 r mmhub_v1_7_ea_err_status_regs +ffffffff82acd000 R mmhub_v2_0_funcs +ffffffff82acd050 r mmhub_v2_0_vmhub_funcs +ffffffff82acd060 r mmhub_client_ids_navi1x +ffffffff82acd190 r mmhub_client_ids_sienna_cichlid +ffffffff82acd450 r mmhub_client_ids_beige_goby +ffffffff82ace000 R mmhub_v2_3_funcs +ffffffff82ace050 r mmhub_v2_3_vmhub_funcs +ffffffff82ace060 r mmhub_client_ids_vangogh +ffffffff82acf000 R mmhub_v3_0_funcs +ffffffff82acf050 r mmhub_v3_0_vmhub_funcs +ffffffff82acf060 r mmhub_client_ids_v3_0_0 +ffffffff82ad0000 R mmhub_v3_0_1_funcs +ffffffff82ad0050 r mmhub_v3_0_1_vmhub_funcs +ffffffff82ad0060 r mmhub_client_ids_v3_0_1 +ffffffff82ad1000 R mmhub_v3_0_2_funcs +ffffffff82ad1050 r mmhub_v3_0_2_vmhub_funcs +ffffffff82ad1060 r mmhub_client_ids_v3_0_2 +ffffffff82ad2000 R mmhub_v9_4_ras_hw_ops +ffffffff82ad2040 R mmhub_v9_4_funcs +ffffffff82ad2090 r mmhub_v9_4_edc_cnt_regs +ffffffff82ad2330 r mmhub_v9_4_ras_fields +ffffffff82ad43b0 r mmhub_v9_4_err_status_regs +ffffffff82ad5000 r xgpu_ai_mailbox_ack_irq_funcs +ffffffff82ad5010 r xgpu_ai_mailbox_rcv_irq_funcs +ffffffff82ad5020 R xgpu_ai_virt_ops +ffffffff82ad6000 r xgpu_nv_mailbox_ack_irq_funcs +ffffffff82ad6010 r xgpu_nv_mailbox_rcv_irq_funcs +ffffffff82ad6020 R xgpu_nv_virt_ops +ffffffff82ad7000 r xgpu_fiji_mgcg_cgcg_init +ffffffff82ad7240 r xgpu_fiji_golden_settings_a10 +ffffffff82ad7370 r xgpu_fiji_golden_common_all +ffffffff82ad73f0 r xgpu_tonga_mgcg_cgcg_init +ffffffff82ad7810 r xgpu_tonga_golden_settings_a11 +ffffffff82ad79d0 r xgpu_tonga_golden_common_all +ffffffff82ad7a28 r xgpu_vi_mailbox_ack_irq_funcs +ffffffff82ad7a38 r xgpu_vi_mailbox_rcv_irq_funcs +ffffffff82ad7a48 R xgpu_vi_virt_ops +ffffffff82ad8000 r navi10_ih_ip_funcs +ffffffff82ad80a0 R navi10_ih_ip_block +ffffffff82ad80b8 r navi10_ih_funcs +ffffffff82ad80d8 r navi10_ih_self_irq_funcs +ffffffff82ad9000 R nbio_v2_3_hdp_flush_reg +ffffffff82ad9048 R nbio_v2_3_funcs +ffffffff82ada000 R nbio_v4_3_hdp_flush_reg +ffffffff82ada048 R nbio_v4_3_funcs +ffffffff82ada130 R nbio_v4_3_sriov_funcs +ffffffff82adb000 R nbio_v6_1_hdp_flush_reg +ffffffff82adb048 R nbio_v6_1_funcs +ffffffff82adc000 R nbio_v7_0_hdp_flush_reg +ffffffff82adc048 R nbio_v7_0_funcs +ffffffff82add000 R nbio_v7_2_hdp_flush_reg +ffffffff82add048 R nbio_v7_2_funcs +ffffffff82ade000 R nbio_v7_4_hdp_flush_reg +ffffffff82ade048 R nbio_v7_4_ras_hw_ops +ffffffff82ade088 R nbio_v7_4_funcs +ffffffff82ade170 r nbio_v7_4_ras_controller_irq_funcs +ffffffff82ade180 r nbio_v7_4_ras_err_event_athub_irq_funcs +ffffffff82adf000 R nbio_v7_7_hdp_flush_reg +ffffffff82adf048 R nbio_v7_7_funcs +ffffffff82ae0000 r nv_common_ip_funcs +ffffffff82ae00a0 R nv_common_ip_block +ffffffff82ae00b8 r nv_asic_funcs +ffffffff82ae0170 r nv_allowed_read_registers +ffffffff82ae02f0 r nv_video_codecs_encode +ffffffff82ae0300 r sc_video_codecs_decode +ffffffff82ae0310 r yc_video_codecs_decode +ffffffff82ae0320 r bg_video_codecs_encode +ffffffff82ae0330 r bg_video_codecs_decode +ffffffff82ae0340 r nv_video_codecs_decode +ffffffff82ae0350 r nv_video_codecs_encode_array +ffffffff82ae0380 r sc_video_codecs_decode_array +ffffffff82ae0420 r yc_video_codecs_decode_array +ffffffff82ae0490 r bg_video_codecs_decode_array +ffffffff82ae04d0 r nv_video_codecs_decode_array +ffffffff82ae1000 r psp_v10_0_funcs +ffffffff82ae2000 r psp_v11_0_funcs +ffffffff82ae3000 r psp_v11_0_8_funcs +ffffffff82ae4000 r psp_v12_0_funcs +ffffffff82ae5000 r psp_v13_0_funcs +ffffffff82ae6000 r psp_v13_0_4_funcs +ffffffff82ae7000 r psp_v3_1_funcs +ffffffff82ae8000 r sdma_v2_4_ip_funcs +ffffffff82ae80a0 R sdma_v2_4_ip_block +ffffffff82ae80b8 r sdma_v2_4_ring_funcs +ffffffff82ae81d8 r sdma_v2_4_buffer_funcs +ffffffff82ae81f8 r sdma_v2_4_vm_pte_funcs +ffffffff82ae8218 r sdma_v2_4_trap_irq_funcs +ffffffff82ae8228 r sdma_v2_4_illegal_inst_irq_funcs +ffffffff82ae8240 r iceland_mgcg_cgcg_init +ffffffff82ae8260 r golden_settings_iceland_a11 +ffffffff82ae9000 r sdma_v3_0_ip_funcs +ffffffff82ae90a0 R sdma_v3_0_ip_block +ffffffff82ae90b8 R sdma_v3_1_ip_block +ffffffff82ae90d0 r sdma_v3_0_ring_funcs +ffffffff82ae91f0 r sdma_v3_0_buffer_funcs +ffffffff82ae9210 r sdma_v3_0_vm_pte_funcs +ffffffff82ae9230 r sdma_v3_0_trap_irq_funcs +ffffffff82ae9240 r sdma_v3_0_illegal_inst_irq_funcs +ffffffff82ae9250 r fiji_mgcg_cgcg_init +ffffffff82ae9270 r golden_settings_fiji_a10 +ffffffff82ae92d0 r tonga_mgcg_cgcg_init +ffffffff82ae92f0 r golden_settings_tonga_a11 +ffffffff82ae9370 r golden_settings_polaris11_a11 +ffffffff82ae93f0 r golden_settings_polaris10_a11 +ffffffff82ae9470 r cz_mgcg_cgcg_init +ffffffff82ae9490 r cz_golden_settings_a11 +ffffffff82ae9520 r stoney_mgcg_cgcg_init +ffffffff82ae9530 r stoney_golden_settings_a11 +ffffffff82aea000 R sdma_v4_0_ip_funcs +ffffffff82aea0a0 R sdma_v4_0_ras_hw_ops +ffffffff82aea0e0 R sdma_v4_0_ip_block +ffffffff82aea0f8 r sdma_v4_0_ring_funcs_2nd_mmhub +ffffffff82aea218 r sdma_v4_0_ring_funcs +ffffffff82aea338 r sdma_v4_0_page_ring_funcs_2nd_mmhub +ffffffff82aea458 r sdma_v4_0_page_ring_funcs +ffffffff82aea578 r sdma_v4_0_buffer_funcs +ffffffff82aea598 r sdma_v4_0_vm_pte_funcs +ffffffff82aea5b8 r sdma_v4_0_trap_irq_funcs +ffffffff82aea5c8 r sdma_v4_0_illegal_inst_irq_funcs +ffffffff82aea5d8 r sdma_v4_0_ecc_irq_funcs +ffffffff82aea5e8 r sdma_v4_0_vm_hole_irq_funcs +ffffffff82aea5f8 r sdma_v4_0_doorbell_invalid_irq_funcs +ffffffff82aea608 r sdma_v4_0_pool_timeout_irq_funcs +ffffffff82aea618 r sdma_v4_0_srbm_write_irq_funcs +ffffffff82aea630 r golden_settings_sdma_4 +ffffffff82aea890 r golden_settings_sdma_vg10 +ffffffff82aea940 r golden_settings_sdma_vg12 +ffffffff82aea9f0 r golden_settings_sdma0_4_2_init +ffffffff82aeaa10 r golden_settings_sdma0_4_2 +ffffffff82aeaca0 r golden_settings_sdma1_4_2 +ffffffff82aeaf30 r golden_settings_sdma_arct +ffffffff82aeb230 r golden_settings_sdma_aldebaran +ffffffff82aeb3a0 r golden_settings_sdma_4_1 +ffffffff82aeb4b0 r golden_settings_sdma_rv2 +ffffffff82aeb4e0 r golden_settings_sdma_rv1 +ffffffff82aeb510 r golden_settings_sdma_4_3 +ffffffff82aeb600 r sdma_v4_0_ras_fields +ffffffff82aec000 R sdma_v4_4_ras_hw_ops +ffffffff82aec040 r sdma_v4_4_ras_fields +ffffffff82aed000 R sdma_v5_0_ip_funcs +ffffffff82aed0a0 R sdma_v5_0_ip_block +ffffffff82aed0b8 r sdma_v5_0_ring_funcs +ffffffff82aed1d8 r sdma_v5_0_buffer_funcs +ffffffff82aed1f8 r sdma_v5_0_vm_pte_funcs +ffffffff82aed218 r sdma_v5_0_trap_irq_funcs +ffffffff82aed228 r sdma_v5_0_illegal_inst_irq_funcs +ffffffff82aed240 r golden_settings_sdma_5 +ffffffff82aed480 r golden_settings_sdma_nv10 +ffffffff82aed4b0 r golden_settings_sdma_nv14 +ffffffff82aed4e0 r golden_settings_sdma_5_sriov +ffffffff82aed6c0 r golden_settings_sdma_nv12 +ffffffff82aed750 r golden_settings_sdma_cyan_skillfish +ffffffff82aee000 R sdma_v5_2_ip_funcs +ffffffff82aee0a0 R sdma_v5_2_ip_block +ffffffff82aee0b8 r sdma_v5_2_ring_funcs +ffffffff82aee1d8 r sdma_v5_2_buffer_funcs +ffffffff82aee1f8 r sdma_v5_2_vm_pte_funcs +ffffffff82aee218 r sdma_v5_2_trap_irq_funcs +ffffffff82aee228 r sdma_v5_2_illegal_inst_irq_funcs +ffffffff82aef000 R sdma_v6_0_ip_funcs +ffffffff82aef0a0 R sdma_v6_0_ip_block +ffffffff82aef0b8 r sdma_v6_0_ring_funcs +ffffffff82aef1d8 r sdma_v6_0_buffer_funcs +ffffffff82aef1f8 r sdma_v6_0_vm_pte_funcs +ffffffff82aef218 r sdma_v6_0_trap_irq_funcs +ffffffff82aef228 r sdma_v6_0_illegal_inst_irq_funcs +ffffffff82af0000 r smu_v11_0_i2c_algo +ffffffff82af0010 r smu_v11_0_i2c_i2c_lock_ops +ffffffff82af0028 r smu_v11_0_i2c_control_quirks +ffffffff82af1000 R smuio_v11_0_funcs +ffffffff82af2000 R smuio_v11_0_6_funcs +ffffffff82af3000 R smuio_v13_0_funcs +ffffffff82af4000 R smuio_v13_0_6_funcs +ffffffff82af5000 R smuio_v9_0_funcs +ffffffff82af6000 r soc15_common_ip_funcs +ffffffff82af60a0 R vega10_common_ip_block +ffffffff82af60b8 r soc15_asic_funcs +ffffffff82af6170 r vega20_asic_funcs +ffffffff82af6230 r soc15_allowed_read_registers +ffffffff82af63c0 r vega_video_codecs_encode +ffffffff82af63d0 r vega_video_codecs_decode +ffffffff82af63e0 r rv_video_codecs_decode +ffffffff82af63f0 r rn_video_codecs_decode +ffffffff82af6400 r vega_video_codecs_encode_array +ffffffff82af6430 r vega_video_codecs_decode_array +ffffffff82af64b0 r rv_video_codecs_decode_array +ffffffff82af6540 r rn_video_codecs_decode_array +ffffffff82af7000 r soc21_common_ip_funcs +ffffffff82af70a0 R soc21_common_ip_block +ffffffff82af70b8 r soc21_asic_funcs +ffffffff82af7170 r soc21_allowed_read_registers +ffffffff82af72f0 r vcn_4_0_0_video_codecs_encode_vcn1 +ffffffff82af7300 r vcn_4_0_0_video_codecs_decode_vcn1 +ffffffff82af7310 r vcn_4_0_0_video_codecs_encode_vcn0 +ffffffff82af7320 r vcn_4_0_0_video_codecs_decode_vcn0 +ffffffff82af7330 r vcn_4_0_0_video_codecs_encode_array_vcn1 +ffffffff82af7360 r vcn_4_0_0_video_codecs_decode_array_vcn1 +ffffffff82af73b0 r vcn_4_0_0_video_codecs_encode_array_vcn0 +ffffffff82af73e0 r vcn_4_0_0_video_codecs_decode_array_vcn0 +ffffffff82af8000 r tonga_ih_ip_funcs +ffffffff82af80a0 R tonga_ih_ip_block +ffffffff82af80b8 r tonga_ih_funcs +ffffffff82af9000 R umc_v6_0_funcs +ffffffff82afa000 R umc_v6_1_channel_idx_tbl +ffffffff82afa080 R umc_v6_1_ras_hw_ops +ffffffff82afb000 R umc_v6_7_channel_idx_tbl_second +ffffffff82afb080 R umc_v6_7_channel_idx_tbl_first +ffffffff82afb100 R umc_v6_7_ras_hw_ops +ffffffff82afc000 R umc_v8_10_channelnum_map_colbit_table +ffffffff82afc040 R umc_v8_10_channel_idx_tbl +ffffffff82afc0a0 R umc_v8_10_ras_hw_ops +ffffffff82afd000 R umc_v8_7_channel_idx_tbl +ffffffff82afd040 R umc_v8_7_ras_hw_ops +ffffffff82afe000 r uvd_v5_0_ip_funcs +ffffffff82afe0a0 R uvd_v5_0_ip_block +ffffffff82afe0b8 r uvd_v5_0_ring_funcs +ffffffff82afe1d8 r uvd_v5_0_irq_funcs +ffffffff82aff000 r uvd_v6_0_ip_funcs +ffffffff82aff0a0 R uvd_v6_0_ip_block +ffffffff82aff0b8 R uvd_v6_2_ip_block +ffffffff82aff0d0 R uvd_v6_3_ip_block +ffffffff82aff0e8 r uvd_v6_0_ring_vm_funcs +ffffffff82aff208 r uvd_v6_0_ring_phys_funcs +ffffffff82aff328 r uvd_v6_0_enc_ring_vm_funcs +ffffffff82aff448 r uvd_v6_0_irq_funcs +ffffffff82b00000 R uvd_v7_0_ip_funcs +ffffffff82b000a0 R uvd_v7_0_ip_block +ffffffff82b000b8 r uvd_v7_0_ring_vm_funcs +ffffffff82b001d8 r uvd_v7_0_enc_ring_vm_funcs +ffffffff82b002f8 r uvd_v7_0_irq_funcs +ffffffff82b01000 r vce_v3_0_ip_funcs +ffffffff82b010a0 R vce_v3_0_ip_block +ffffffff82b010b8 R vce_v3_1_ip_block +ffffffff82b010d0 R vce_v3_4_ip_block +ffffffff82b010e8 r vce_v3_0_ring_vm_funcs +ffffffff82b01208 r vce_v3_0_ring_phys_funcs +ffffffff82b01328 r vce_v3_0_irq_funcs +ffffffff82b02000 R vce_v4_0_ip_funcs +ffffffff82b020a0 R vce_v4_0_ip_block +ffffffff82b020b8 r vce_v4_0_ring_vm_funcs +ffffffff82b021d8 r vce_v4_0_irq_funcs +ffffffff82b03000 r vcn_v1_0_ip_funcs +ffffffff82b030a0 R vcn_v1_0_ip_block +ffffffff82b030b8 r vcn_v1_0_dec_ring_vm_funcs +ffffffff82b031d8 r vcn_v1_0_enc_ring_vm_funcs +ffffffff82b032f8 r vcn_v1_0_irq_funcs +ffffffff82b04000 r vcn_v2_0_ip_funcs +ffffffff82b040a0 R vcn_v2_0_ip_block +ffffffff82b040b8 r vcn_v2_0_dec_ring_vm_funcs +ffffffff82b041d8 r vcn_v2_0_enc_ring_vm_funcs +ffffffff82b042f8 r vcn_v2_0_irq_funcs +ffffffff82b05000 r vcn_v2_5_ip_funcs +ffffffff82b050a0 R vcn_v2_5_ip_block +ffffffff82b050b8 r vcn_v2_6_ip_funcs +ffffffff82b05158 R vcn_v2_6_ip_block +ffffffff82b05170 R vcn_v2_6_ras_hw_ops +ffffffff82b051b0 r vcn_v2_5_dec_ring_vm_funcs +ffffffff82b052d0 r vcn_v2_6_dec_ring_vm_funcs +ffffffff82b053f0 r vcn_v2_5_enc_ring_vm_funcs +ffffffff82b05510 r vcn_v2_6_enc_ring_vm_funcs +ffffffff82b05630 r vcn_v2_5_irq_funcs +ffffffff82b06000 r vcn_v3_0_ip_funcs +ffffffff82b060a0 R vcn_v3_0_ip_block +ffffffff82b060b8 r vcn_v3_0_dec_ring_vm_funcs +ffffffff82b061d8 r vcn_v3_0_enc_ring_vm_funcs +ffffffff82b062f8 r vcn_v3_0_irq_funcs +ffffffff82b07000 r vcn_v4_0_ip_funcs +ffffffff82b070a0 R vcn_v4_0_ip_block +ffffffff82b070b8 r vcn_v4_0_unified_ring_vm_funcs +ffffffff82b071d8 r vcn_v4_0_irq_funcs +ffffffff82b08000 R vega10_ih_ip_funcs +ffffffff82b080a0 R vega10_ih_ip_block +ffffffff82b080b8 r vega10_ih_funcs +ffffffff82b080d8 r vega10_ih_self_irq_funcs +ffffffff82b09000 r GC_BASE +ffffffff82b09064 r HDP_BASE +ffffffff82b090c8 r MMHUB_BASE +ffffffff82b0912c r ATHUB_BASE +ffffffff82b09190 r NBIO_BASE +ffffffff82b091f4 r MP0_BASE +ffffffff82b09258 r MP1_BASE +ffffffff82b092bc r VCE_BASE +ffffffff82b09320 r VCN_BASE +ffffffff82b09384 r DF_BASE +ffffffff82b093e8 r DCE_BASE +ffffffff82b0944c r OSSSYS_BASE +ffffffff82b094b0 r SDMA0_BASE +ffffffff82b09514 r SDMA1_BASE +ffffffff82b09578 r SMUIO_BASE +ffffffff82b095dc r PWR_BASE +ffffffff82b09640 r NBIF_BASE +ffffffff82b096a4 r THM_BASE +ffffffff82b09708 r CLK_BASE +ffffffff82b0a000 R vega20_ih_ip_funcs +ffffffff82b0a0a0 R vega20_ih_ip_block +ffffffff82b0a0b8 r vega20_ih_funcs +ffffffff82b0a0d8 r vega20_ih_self_irq_funcs +ffffffff82b0b000 r GC_BASE +ffffffff82b0b090 r HDP_BASE +ffffffff82b0b120 r MMHUB_BASE +ffffffff82b0b1b0 r ATHUB_BASE +ffffffff82b0b240 r NBIO_BASE +ffffffff82b0b2d0 r MP0_BASE +ffffffff82b0b360 r MP1_BASE +ffffffff82b0b3f0 r UVD_BASE +ffffffff82b0b480 r VCE_BASE +ffffffff82b0b510 r DF_BASE +ffffffff82b0b5a0 r DCE_BASE +ffffffff82b0b630 r OSSSYS_BASE +ffffffff82b0b6c0 r SDMA0_BASE +ffffffff82b0b750 r SDMA1_BASE +ffffffff82b0b7e0 r SMUIO_BASE +ffffffff82b0b870 r THM_BASE +ffffffff82b0b900 r CLK_BASE +ffffffff82b0b990 r UMC_BASE +ffffffff82b0ba20 r RSMU_BASE +ffffffff82b0c000 r vi_common_ip_block +ffffffff82b0c018 r vi_common_ip_funcs +ffffffff82b0c0b8 r vi_asic_funcs +ffffffff82b0c170 r vi_allowed_read_registers +ffffffff82b0c3d0 r topaz_video_codecs_encode +ffffffff82b0c3e0 r topaz_video_codecs_decode +ffffffff82b0c3f0 r tonga_video_codecs_encode +ffffffff82b0c400 r tonga_video_codecs_decode +ffffffff82b0c410 r polaris_video_codecs_encode +ffffffff82b0c420 r cz_video_codecs_decode +ffffffff82b0c430 r tonga_video_codecs_encode_array +ffffffff82b0c450 r tonga_video_codecs_decode_array +ffffffff82b0c4a0 r polaris_video_codecs_encode_array +ffffffff82b0c4d0 r cz_video_codecs_decode_array +ffffffff82b0c550 r iceland_mgcg_cgcg_init +ffffffff82b0c590 r fiji_mgcg_cgcg_init +ffffffff82b0c5f0 r tonga_mgcg_cgcg_init +ffffffff82b0c650 r cz_mgcg_cgcg_init +ffffffff82b0c690 r stoney_mgcg_cgcg_init +ffffffff82b0d000 r amdgpu_dm_funcs +ffffffff82b0d0a0 R dm_ip_block +ffffffff82b0d0b8 R amdgpu_dm_encoder_helper_funcs +ffffffff82b0d120 r dm_display_funcs +ffffffff82b0d180 r hpd_disconnect_quirk_table +ffffffff82b0def0 r amdgpu_dm_mode_funcs +ffffffff82b0df38 r amdgpu_dm_encoder_funcs +ffffffff82b0df58 r amdgpu_dm_connector_funcs +ffffffff82b0dfd0 r amdgpu_dm_connector_helper_funcs +ffffffff82b0e020 r amdgpu_dm_i2c_algo +ffffffff82b0e1f0 r add_fs_modes.common_rates +ffffffff82b0e220 r amdgpu_dm_backlight_ops +ffffffff82b0f000 r amdgpu_dm_crtc_funcs +ffffffff82b0f0c0 r amdgpu_dm_crtc_helper_funcs +ffffffff82b10000 r dm_dtn_log_begin.msg +ffffffff82b1000d r dm_dtn_log_end.msg +ffffffff82b10018 r SYNAPTICS_DEVICE_ID +ffffffff82b11000 r dm_crtc_irq_funcs +ffffffff82b11010 r dm_vline0_irq_funcs +ffffffff82b11020 r dm_dmub_outbox_irq_funcs +ffffffff82b11030 r dm_vupdate_irq_funcs +ffffffff82b11040 r dm_dmub_trace_irq_funcs +ffffffff82b11050 r dm_pageflip_irq_funcs +ffffffff82b11060 r dm_hpd_irq_funcs +ffffffff82b12000 r amdgpu_dm_encoder_funcs +ffffffff82b12020 r dm_mst_cbs +ffffffff82b12030 r dm_dp_mst_connector_funcs +ffffffff82b120a8 r dm_dp_mst_connector_helper_funcs +ffffffff82b13000 r dm_plane_funcs +ffffffff82b13068 r dm_plane_helper_funcs +ffffffff82b15000 r vbios_funcs +ffffffff82b16000 r vbios_funcs +ffffffff82b1b000 r command_table_helper_funcs +ffffffff82b1c000 r command_table_helper_funcs +ffffffff82b1d000 r command_table_helper_funcs +ffffffff82b1e000 r command_table_helper_funcs +ffffffff82b1f000 r dce80_max_clks_by_state +ffffffff82b1f028 r disp_clk_regs +ffffffff82b1f07c r disp_clk_shift +ffffffff82b1f088 r disp_clk_mask +ffffffff82b20000 r dce110_max_clks_by_state +ffffffff82b20028 r disp_clk_regs +ffffffff82b2007c r disp_clk_shift +ffffffff82b20088 r disp_clk_mask +ffffffff82b21000 r dce112_max_clks_by_state +ffffffff82b21028 r disp_clk_regs +ffffffff82b2107c r disp_clk_shift +ffffffff82b21088 r disp_clk_mask +ffffffff82b22000 r dce120_max_clks_by_state +ffffffff82b23000 r clk_mgr_regs +ffffffff82b23054 r clk_mgr_shift +ffffffff82b23060 r clk_mgr_mask +ffffffff82b24000 r clk_mgr_regs +ffffffff82b24054 r clk_mgr_shift +ffffffff82b24060 r clk_mgr_mask +ffffffff82b25000 r clk_mgr_regs +ffffffff82b25054 r clk_mgr_shift +ffffffff82b25060 r clk_mgr_mask +ffffffff82b26000 r lpddr5_wm_table +ffffffff82b260c0 r ddr5_wm_table +ffffffff82b27000 r lpddr5_wm_table +ffffffff82b270c0 r ddr5_wm_table +ffffffff82b28000 r lpddr5_wm_table +ffffffff82b280c0 r ddr5_wm_table +ffffffff82b29000 r lpddr5_wm_table +ffffffff82b290c0 r ddr4_wm_table +ffffffff82b2a000 r clk_mgr_regs_dcn321 +ffffffff82b2a054 r clk_mgr_shift_dcn321 +ffffffff82b2a060 r clk_mgr_mask_dcn321 +ffffffff82b2a084 r clk_mgr_regs_dcn32 +ffffffff82b2a0d8 r clk_mgr_shift_dcn32 +ffffffff82b2a0e4 r clk_mgr_mask_dcn32 +ffffffff82b2b000 r DC_BUILD_ID +ffffffff82b2d000 r output_csc_matrix +ffffffff82b2d0e0 r black_color_format +ffffffff82b2e000 r DP_SINK_BRANCH_DEV_NAME_7580 +ffffffff82b2f000 r DP_VGA_DONGLE_BRANCH_DEV_NAME +ffffffff82b2f006 r DP_DVI_CONVERTER_ID_4 +ffffffff82b2f00d r DP_DVI_CONVERTER_ID_5 +ffffffff82b30000 r DP_VGA_LVDS_CONVERTER_ID_2 +ffffffff82b30007 r DP_VGA_LVDS_CONVERTER_ID_3 +ffffffff82b30010 r dp_lt_fallbacks +ffffffff82b31000 r mandatory_dpcd_partitions +ffffffff82b33000 r dce_funcs +ffffffff82b34000 r funcs +ffffffff82b35000 R video_optimized_pixel_rates +ffffffff82b351b0 r dce110_clk_src_funcs +ffffffff82b351d8 r dce112_clk_src_funcs +ffffffff82b35200 r dcn20_clk_src_funcs +ffffffff82b35228 r dcn3_clk_src_funcs +ffffffff82b35250 r dcn31_clk_src_funcs +ffffffff82b36000 r dce_funcs +ffffffff82b36068 r dcn10_funcs +ffffffff82b360d0 r dcn20_funcs +ffffffff82b36138 r dcn21_funcs +ffffffff82b37000 r dce_ipp_funcs +ffffffff82b38000 r dce110_lnk_enc_funcs +ffffffff82b39000 r dce_mi_funcs +ffffffff82b39090 r dce112_mi_funcs +ffffffff82b39120 r dce120_mi_funcs +ffffffff82b391b0 r pte_settings +ffffffff82b3a000 r funcs +ffffffff82b3b000 r dce_link_panel_cntl_funcs +ffffffff82b3c000 r filter_3tap_16p_upscale +ffffffff82b3c040 r filter_3tap_16p_116 +ffffffff82b3c080 r filter_3tap_16p_149 +ffffffff82b3c0c0 r filter_3tap_16p_183 +ffffffff82b3c100 r filter_3tap_64p_upscale +ffffffff82b3c1d0 r filter_3tap_64p_116 +ffffffff82b3c2a0 r filter_3tap_64p_149 +ffffffff82b3c370 r filter_3tap_64p_183 +ffffffff82b3c440 r filter_4tap_16p_upscale +ffffffff82b3c490 r filter_4tap_16p_116 +ffffffff82b3c4e0 r filter_4tap_16p_149 +ffffffff82b3c530 r filter_4tap_16p_183 +ffffffff82b3c580 r filter_4tap_64p_upscale +ffffffff82b3c690 r filter_4tap_64p_116 +ffffffff82b3c7a0 r filter_4tap_64p_149 +ffffffff82b3c8b0 r filter_4tap_64p_183 +ffffffff82b3c9c0 r filter_5tap_64p_upscale +ffffffff82b3cb10 r filter_5tap_64p_116 +ffffffff82b3cc60 r filter_5tap_64p_149 +ffffffff82b3cdb0 r filter_5tap_64p_183 +ffffffff82b3cf00 r filter_6tap_64p_upscale +ffffffff82b3d090 r filter_6tap_64p_116 +ffffffff82b3d220 r filter_6tap_64p_149 +ffffffff82b3d3b0 r filter_6tap_64p_183 +ffffffff82b3d540 r filter_7tap_64p_upscale +ffffffff82b3d710 r filter_7tap_64p_116 +ffffffff82b3d8e0 r filter_7tap_64p_149 +ffffffff82b3dab0 r filter_7tap_64p_183 +ffffffff82b3dc80 r filter_8tap_64p_upscale +ffffffff82b3de90 r filter_8tap_64p_116 +ffffffff82b3e0a0 r filter_8tap_64p_149 +ffffffff82b3e2b0 r filter_8tap_64p_183 +ffffffff82b3e4c0 r filter_2tap_16p +ffffffff82b3e4f0 r filter_2tap_64p +ffffffff82b3f000 r audio_clock_info_table_48bpc +ffffffff82b3f190 r audio_clock_info_table_36bpc +ffffffff82b3f320 r audio_clock_info_table +ffffffff82b3f4e0 r dce110_str_enc_funcs +ffffffff82b40000 r global_color_matrix +ffffffff82b400a8 r dce_transform_funcs +ffffffff82b41000 r abm_funcs +ffffffff82b42000 r psr_funcs +ffffffff82b42040 r DP_SINK_DEVICE_STR_ID_1 +ffffffff82b42045 r DP_SINK_DEVICE_STR_ID_2 ffffffff82b43000 r reg_offsets -ffffffff82b43018 r dce110_compressor_funcs -ffffffff82b44000 r dce110_funcs -ffffffff82b442c0 r dce110_private_funcs -ffffffff82b45000 r dce110_mem_input_v_funcs -ffffffff82b45090 r dvmm_Hw_Setting_1DTiling -ffffffff82b45120 r dvmm_Hw_Setting_2DTiling -ffffffff82b451b0 r dvmm_Hw_Setting_Linear -ffffffff82b46000 r global_color_matrix -ffffffff82b460b0 r input_csc_matrix -ffffffff82b47000 r funcs -ffffffff82b48000 r bios_regs -ffffffff82b48008 r dce110_res_pool_funcs -ffffffff82b480f0 r clk_src_regs -ffffffff82b481ec r dmcu_regs -ffffffff82b48248 r dmcu_shift -ffffffff82b4825c r dmcu_mask -ffffffff82b482a8 r abm_regs -ffffffff82b482e8 r abm_shift -ffffffff82b482fc r abm_mask -ffffffff82b48350 r dce110_tg_offsets -ffffffff82b48398 r res_create_funcs -ffffffff82b483c8 r plane_cap -ffffffff82b483f4 r underlay_plane_cap -ffffffff82b48420 r stoney_resource_cap -ffffffff82b4845c r carrizo_resource_cap -ffffffff82b484a0 r panel_cntl_regs -ffffffff82b484c0 r panel_cntl_shift -ffffffff82b484d0 r panel_cntl_mask -ffffffff82b48510 r link_enc_regs -ffffffff82b488d0 r link_enc_aux_regs -ffffffff82b48920 r link_enc_hpd_regs -ffffffff82b48938 r link_enc_feature -ffffffff82b48948 r cs_shift -ffffffff82b48954 r cs_mask -ffffffff82b48980 r mi_regs -ffffffff82b48b0c r mi_shifts -ffffffff82b48b54 r mi_masks -ffffffff82b48c70 r ipp_regs -ffffffff82b48d6c r ipp_shift -ffffffff82b48d94 r ipp_mask -ffffffff82b48e30 r xfm_regs -ffffffff82b49100 r xfm_shift -ffffffff82b49160 r xfm_mask -ffffffff82b492e0 r opp_regs -ffffffff82b49430 r opp_shift -ffffffff82b4945c r opp_mask -ffffffff82b49510 r aux_engine_regs -ffffffff82b49600 r aux_mask -ffffffff82b49660 r aux_shift -ffffffff82b49680 r i2c_hw_regs -ffffffff82b497d0 r i2c_shifts -ffffffff82b497fc r i2c_masks -ffffffff82b498a0 r audio_regs -ffffffff82b499d4 r audio_shift -ffffffff82b499ec r audio_mask -ffffffff82b49a30 r stream_enc_regs -ffffffff82b49d0c r se_shift -ffffffff82b49d90 r se_mask -ffffffff82b49f94 r hwseq_stoney_reg -ffffffff82b4a1b0 r hwseq_cz_reg -ffffffff82b4a3cc r hwseq_shift -ffffffff82b4a44c r hwseq_mask -ffffffff82b4b000 r dce110_tg_funcs -ffffffff82b4c000 r dce110_tg_v_funcs -ffffffff82b4d000 r dce110_xfmv_funcs -ffffffff82b4e000 r reg_offsets -ffffffff82b4f000 r reg_offsets -ffffffff82b50000 r bios_regs -ffffffff82b50010 r clk_src_regs -ffffffff82b50208 r dmcu_regs -ffffffff82b50264 r dmcu_shift -ffffffff82b50278 r dmcu_mask -ffffffff82b502c4 r abm_regs -ffffffff82b50304 r abm_shift -ffffffff82b50318 r abm_mask -ffffffff82b50360 r dce112_tg_offsets -ffffffff82b503a8 r res_create_funcs -ffffffff82b503d8 r plane_cap -ffffffff82b50404 r polaris_11_resource_cap -ffffffff82b50440 r polaris_10_resource_cap -ffffffff82b50480 r dce112_res_pool_funcs -ffffffff82b50560 r panel_cntl_regs -ffffffff82b50580 r panel_cntl_shift -ffffffff82b50590 r panel_cntl_mask -ffffffff82b505d0 r link_enc_regs -ffffffff82b50990 r link_enc_aux_regs -ffffffff82b509e0 r link_enc_hpd_regs -ffffffff82b509f8 r link_enc_feature -ffffffff82b50a08 r cs_shift -ffffffff82b50a14 r cs_mask -ffffffff82b50a40 r mi_regs -ffffffff82b50d58 r mi_shifts -ffffffff82b50da0 r mi_masks -ffffffff82b50ec0 r ipp_regs -ffffffff82b510b8 r ipp_shift -ffffffff82b510e0 r ipp_mask -ffffffff82b51180 r xfm_regs -ffffffff82b51720 r xfm_shift -ffffffff82b51780 r xfm_mask -ffffffff82b51900 r opp_regs -ffffffff82b51a50 r opp_shift -ffffffff82b51a7c r opp_mask -ffffffff82b51b30 r aux_engine_regs -ffffffff82b51c20 r aux_mask -ffffffff82b51c80 r aux_shift -ffffffff82b51ca0 r i2c_hw_regs -ffffffff82b51df0 r i2c_shifts -ffffffff82b51e1c r i2c_masks -ffffffff82b51ec0 r audio_regs -ffffffff82b51fc8 r audio_shift -ffffffff82b51fe0 r audio_mask -ffffffff82b52020 r stream_enc_regs -ffffffff82b525d8 r se_shift -ffffffff82b5265c r se_mask -ffffffff82b52860 r hwseq_reg -ffffffff82b52a7c r hwseq_shift -ffffffff82b52afc r hwseq_mask -ffffffff82b53000 r bios_regs -ffffffff82b53008 r res_cap -ffffffff82b53048 r dce120_res_pool_funcs -ffffffff82b53128 r debug_defaults -ffffffff82b532a0 r clk_src_regs -ffffffff82b53498 r dmcu_regs -ffffffff82b534f4 r dmcu_shift -ffffffff82b53508 r dmcu_mask -ffffffff82b53554 r abm_regs -ffffffff82b53594 r abm_shift -ffffffff82b535a8 r abm_mask -ffffffff82b535f0 r dce120_tg_offsets -ffffffff82b53638 r dce121_res_create_funcs -ffffffff82b53668 r res_create_funcs -ffffffff82b53698 r plane_cap -ffffffff82b536d0 r panel_cntl_regs -ffffffff82b536f0 r panel_cntl_shift -ffffffff82b53700 r panel_cntl_mask -ffffffff82b53740 r link_enc_regs -ffffffff82b53b00 r link_enc_aux_regs -ffffffff82b53b50 r link_enc_hpd_regs -ffffffff82b53b68 r link_enc_feature -ffffffff82b53b78 r cs_shift -ffffffff82b53b84 r cs_mask -ffffffff82b53bb0 r mi_regs -ffffffff82b53ec8 r mi_shifts -ffffffff82b53f10 r mi_masks -ffffffff82b54030 r ipp_regs -ffffffff82b54228 r ipp_shift -ffffffff82b54250 r ipp_mask -ffffffff82b542f0 r xfm_regs -ffffffff82b54890 r xfm_shift -ffffffff82b548f0 r xfm_mask -ffffffff82b54a70 r opp_regs -ffffffff82b54bc0 r opp_shift -ffffffff82b54bec r opp_mask -ffffffff82b54ca0 r aux_engine_regs -ffffffff82b54d90 r aux_mask -ffffffff82b54df0 r aux_shift -ffffffff82b54e10 r i2c_hw_regs -ffffffff82b54f60 r i2c_shifts -ffffffff82b54f8c r i2c_masks -ffffffff82b55030 r audio_regs -ffffffff82b55164 r audio_shift -ffffffff82b5517c r audio_mask -ffffffff82b551c0 r stream_enc_regs -ffffffff82b55778 r se_shift -ffffffff82b557fc r se_mask -ffffffff82b55a00 r dce121_hwseq_reg -ffffffff82b55c1c r dce121_hwseq_shift -ffffffff82b55c9c r dce121_hwseq_mask -ffffffff82b55e90 r hwseq_reg -ffffffff82b560ac r hwseq_shift -ffffffff82b5612c r hwseq_mask -ffffffff82b57000 r dce120_tg_funcs -ffffffff82b58000 r bios_regs -ffffffff82b58008 r res_cap -ffffffff82b58048 r dce80_res_pool_funcs -ffffffff82b58130 r clk_src_regs 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-ffffffff82c2e080 R qp_table_420_12bpc_max -ffffffff82c2e7c0 R qp_table_444_10bpc_min -ffffffff82c2f400 R qp_table_420_8bpc_max -ffffffff82c2f840 R qp_table_444_8bpc_min -ffffffff82c30180 R qp_table_444_12bpc_min -ffffffff82c310c0 R qp_table_420_12bpc_min -ffffffff82c31800 R qp_table_422_12bpc_min -ffffffff82c32140 R qp_table_422_12bpc_max -ffffffff82c32a80 R qp_table_444_12bpc_max -ffffffff82c339c0 R qp_table_420_8bpc_min -ffffffff82c33e00 R qp_table_422_8bpc_min -ffffffff82c34340 R qp_table_422_10bpc_max -ffffffff82c34a80 R qp_table_420_10bpc_max -ffffffff82c35040 R qp_table_420_10bpc_min -ffffffff82c35600 R qp_table_444_10bpc_max -ffffffff82c36240 R qp_table_422_8bpc_max -ffffffff82c38000 r funcs -ffffffff82c38050 r hpd_regs -ffffffff82c381a0 r hpd_shift -ffffffff82c381b0 r hpd_mask -ffffffff82c381c0 r ddc_data_regs -ffffffff82c383a0 r ddc_clk_regs -ffffffff82c38580 r ddc_shift -ffffffff82c385a8 r ddc_mask -ffffffff82c39000 r funcs -ffffffff82c3a000 r funcs -ffffffff82c3a050 r hpd_regs -ffffffff82c3a1a0 r hpd_shift -ffffffff82c3a1b0 r hpd_mask -ffffffff82c3a1c0 r ddc_data_regs -ffffffff82c3a3a0 r ddc_clk_regs -ffffffff82c3a580 r ddc_shift -ffffffff82c3a5a8 r ddc_mask -ffffffff82c3b000 r funcs +ffffffff82b44000 r bios_regs +ffffffff82b44008 r res_cap +ffffffff82b44050 r clk_src_regs +ffffffff82b4414c r dmcu_regs +ffffffff82b441a8 r dmcu_shift +ffffffff82b441bc r dmcu_mask +ffffffff82b44208 r abm_regs +ffffffff82b44248 r abm_shift +ffffffff82b4425c r abm_mask +ffffffff82b442b0 r dce100_tg_offsets +ffffffff82b442f8 r plane_cap +ffffffff82b44328 r res_create_funcs +ffffffff82b44358 r dce100_res_pool_funcs +ffffffff82b44440 r panel_cntl_regs +ffffffff82b44460 r panel_cntl_shift +ffffffff82b44470 r panel_cntl_mask +ffffffff82b444b0 r link_enc_regs +ffffffff82b44870 r link_enc_aux_regs +ffffffff82b448c0 r link_enc_hpd_regs +ffffffff82b448d8 r link_enc_feature +ffffffff82b448e8 r cs_shift +ffffffff82b448f4 r cs_mask +ffffffff82b44920 r mi_regs +ffffffff82b44c38 r mi_shifts +ffffffff82b44c80 r mi_masks +ffffffff82b44da0 r ipp_regs +ffffffff82b44f98 r ipp_shift +ffffffff82b44fc0 r ipp_mask +ffffffff82b45060 r xfm_regs +ffffffff82b45600 r xfm_shift +ffffffff82b45660 r xfm_mask +ffffffff82b457e0 r opp_regs +ffffffff82b45930 r opp_shift +ffffffff82b4595c r opp_mask +ffffffff82b45a10 r aux_engine_regs +ffffffff82b45b00 r aux_mask +ffffffff82b45b60 r aux_shift +ffffffff82b45b80 r i2c_hw_regs +ffffffff82b45cd0 r i2c_shifts +ffffffff82b45cfc r i2c_masks +ffffffff82b45da0 r audio_regs +ffffffff82b45ed4 r audio_shift +ffffffff82b45eec r audio_mask +ffffffff82b45f30 r stream_enc_regs +ffffffff82b465dc r se_shift +ffffffff82b46660 r se_mask +ffffffff82b46864 r hwseq_reg +ffffffff82b46a80 r hwseq_shift +ffffffff82b46b00 r hwseq_mask +ffffffff82b47000 r reg_offsets +ffffffff82b47018 r dce110_compressor_funcs +ffffffff82b48000 r dce110_funcs +ffffffff82b482c0 r dce110_private_funcs +ffffffff82b49000 r dce110_mem_input_v_funcs +ffffffff82b49090 r dvmm_Hw_Setting_1DTiling +ffffffff82b49120 r dvmm_Hw_Setting_2DTiling +ffffffff82b491b0 r dvmm_Hw_Setting_Linear +ffffffff82b4a000 r global_color_matrix +ffffffff82b4a0b0 r input_csc_matrix +ffffffff82b4b000 r funcs +ffffffff82b4c000 r bios_regs +ffffffff82b4c008 r dce110_res_pool_funcs +ffffffff82b4c0f0 r clk_src_regs +ffffffff82b4c1ec r dmcu_regs +ffffffff82b4c248 r dmcu_shift +ffffffff82b4c25c r dmcu_mask +ffffffff82b4c2a8 r abm_regs +ffffffff82b4c2e8 r abm_shift +ffffffff82b4c2fc r abm_mask +ffffffff82b4c350 r dce110_tg_offsets +ffffffff82b4c398 r res_create_funcs +ffffffff82b4c3c8 r plane_cap +ffffffff82b4c3f4 r underlay_plane_cap +ffffffff82b4c420 r stoney_resource_cap +ffffffff82b4c45c r carrizo_resource_cap +ffffffff82b4c4a0 r panel_cntl_regs +ffffffff82b4c4c0 r panel_cntl_shift +ffffffff82b4c4d0 r panel_cntl_mask +ffffffff82b4c510 r link_enc_regs +ffffffff82b4c8d0 r link_enc_aux_regs +ffffffff82b4c920 r link_enc_hpd_regs +ffffffff82b4c938 r link_enc_feature +ffffffff82b4c948 r cs_shift +ffffffff82b4c954 r cs_mask +ffffffff82b4c980 r mi_regs +ffffffff82b4cb0c r mi_shifts +ffffffff82b4cb54 r mi_masks +ffffffff82b4cc70 r ipp_regs +ffffffff82b4cd6c r ipp_shift +ffffffff82b4cd94 r ipp_mask +ffffffff82b4ce30 r xfm_regs +ffffffff82b4d100 r xfm_shift +ffffffff82b4d160 r xfm_mask +ffffffff82b4d2e0 r opp_regs +ffffffff82b4d430 r opp_shift +ffffffff82b4d45c r opp_mask +ffffffff82b4d510 r aux_engine_regs +ffffffff82b4d600 r aux_mask +ffffffff82b4d660 r aux_shift +ffffffff82b4d680 r i2c_hw_regs +ffffffff82b4d7d0 r i2c_shifts +ffffffff82b4d7fc r i2c_masks +ffffffff82b4d8a0 r audio_regs +ffffffff82b4d9d4 r audio_shift +ffffffff82b4d9ec r audio_mask +ffffffff82b4da30 r stream_enc_regs +ffffffff82b4dd0c r se_shift +ffffffff82b4dd90 r se_mask +ffffffff82b4df94 r hwseq_stoney_reg +ffffffff82b4e1b0 r hwseq_cz_reg +ffffffff82b4e3cc r hwseq_shift +ffffffff82b4e44c r hwseq_mask +ffffffff82b4f000 r dce110_tg_funcs +ffffffff82b50000 r dce110_tg_v_funcs +ffffffff82b51000 r dce110_xfmv_funcs +ffffffff82b52000 r reg_offsets +ffffffff82b53000 r reg_offsets +ffffffff82b54000 r bios_regs +ffffffff82b54010 r clk_src_regs +ffffffff82b54208 r dmcu_regs +ffffffff82b54264 r dmcu_shift +ffffffff82b54278 r dmcu_mask +ffffffff82b542c4 r abm_regs +ffffffff82b54304 r abm_shift +ffffffff82b54318 r abm_mask +ffffffff82b54360 r dce112_tg_offsets +ffffffff82b543a8 r res_create_funcs +ffffffff82b543d8 r plane_cap +ffffffff82b54404 r polaris_11_resource_cap +ffffffff82b54440 r polaris_10_resource_cap +ffffffff82b54480 r dce112_res_pool_funcs +ffffffff82b54560 r panel_cntl_regs +ffffffff82b54580 r panel_cntl_shift +ffffffff82b54590 r panel_cntl_mask +ffffffff82b545d0 r link_enc_regs +ffffffff82b54990 r link_enc_aux_regs +ffffffff82b549e0 r link_enc_hpd_regs +ffffffff82b549f8 r link_enc_feature +ffffffff82b54a08 r cs_shift +ffffffff82b54a14 r cs_mask +ffffffff82b54a40 r mi_regs +ffffffff82b54d58 r mi_shifts +ffffffff82b54da0 r mi_masks +ffffffff82b54ec0 r ipp_regs +ffffffff82b550b8 r ipp_shift +ffffffff82b550e0 r ipp_mask +ffffffff82b55180 r xfm_regs +ffffffff82b55720 r xfm_shift +ffffffff82b55780 r xfm_mask +ffffffff82b55900 r opp_regs +ffffffff82b55a50 r opp_shift +ffffffff82b55a7c r opp_mask +ffffffff82b55b30 r aux_engine_regs +ffffffff82b55c20 r aux_mask +ffffffff82b55c80 r aux_shift +ffffffff82b55ca0 r i2c_hw_regs +ffffffff82b55df0 r i2c_shifts +ffffffff82b55e1c r i2c_masks +ffffffff82b55ec0 r audio_regs +ffffffff82b55fc8 r audio_shift +ffffffff82b55fe0 r audio_mask +ffffffff82b56020 r stream_enc_regs +ffffffff82b565d8 r se_shift +ffffffff82b5665c r se_mask +ffffffff82b56860 r hwseq_reg +ffffffff82b56a7c r hwseq_shift +ffffffff82b56afc r hwseq_mask +ffffffff82b57000 r bios_regs +ffffffff82b57008 r res_cap +ffffffff82b57048 r dce120_res_pool_funcs +ffffffff82b57128 r debug_defaults +ffffffff82b572a0 r clk_src_regs +ffffffff82b57498 r dmcu_regs +ffffffff82b574f4 r dmcu_shift +ffffffff82b57508 r dmcu_mask +ffffffff82b57554 r abm_regs +ffffffff82b57594 r abm_shift +ffffffff82b575a8 r abm_mask +ffffffff82b575f0 r dce120_tg_offsets +ffffffff82b57638 r dce121_res_create_funcs +ffffffff82b57668 r res_create_funcs +ffffffff82b57698 r plane_cap +ffffffff82b576d0 r panel_cntl_regs +ffffffff82b576f0 r panel_cntl_shift +ffffffff82b57700 r panel_cntl_mask +ffffffff82b57740 r link_enc_regs +ffffffff82b57b00 r link_enc_aux_regs +ffffffff82b57b50 r link_enc_hpd_regs +ffffffff82b57b68 r link_enc_feature +ffffffff82b57b78 r cs_shift +ffffffff82b57b84 r cs_mask +ffffffff82b57bb0 r mi_regs +ffffffff82b57ec8 r mi_shifts +ffffffff82b57f10 r mi_masks +ffffffff82b58030 r ipp_regs +ffffffff82b58228 r ipp_shift +ffffffff82b58250 r ipp_mask +ffffffff82b582f0 r xfm_regs +ffffffff82b58890 r xfm_shift +ffffffff82b588f0 r xfm_mask +ffffffff82b58a70 r opp_regs +ffffffff82b58bc0 r opp_shift +ffffffff82b58bec r opp_mask +ffffffff82b58ca0 r aux_engine_regs +ffffffff82b58d90 r aux_mask +ffffffff82b58df0 r aux_shift +ffffffff82b58e10 r i2c_hw_regs +ffffffff82b58f60 r i2c_shifts +ffffffff82b58f8c r i2c_masks +ffffffff82b59030 r audio_regs +ffffffff82b59164 r audio_shift +ffffffff82b5917c r audio_mask +ffffffff82b591c0 r stream_enc_regs +ffffffff82b59778 r se_shift +ffffffff82b597fc r se_mask +ffffffff82b59a00 r dce121_hwseq_reg +ffffffff82b59c1c r dce121_hwseq_shift +ffffffff82b59c9c r dce121_hwseq_mask +ffffffff82b59e90 r hwseq_reg +ffffffff82b5a0ac r hwseq_shift +ffffffff82b5a12c r hwseq_mask +ffffffff82b5b000 r dce120_tg_funcs +ffffffff82b5c000 r bios_regs +ffffffff82b5c008 r res_cap +ffffffff82b5c048 r dce80_res_pool_funcs +ffffffff82b5c130 r clk_src_regs +ffffffff82b5c22c r dmcu_regs +ffffffff82b5c288 r dmcu_shift +ffffffff82b5c29c r dmcu_mask +ffffffff82b5c2e8 r abm_regs +ffffffff82b5c328 r abm_shift +ffffffff82b5c33c r abm_mask +ffffffff82b5c390 r dce80_tg_offsets +ffffffff82b5c3d8 r plane_cap +ffffffff82b5c408 r res_create_funcs +ffffffff82b5c440 r panel_cntl_regs +ffffffff82b5c460 r panel_cntl_shift +ffffffff82b5c470 r panel_cntl_mask +ffffffff82b5c4b0 r link_enc_regs +ffffffff82b5c870 r link_enc_aux_regs +ffffffff82b5c8c0 r link_enc_hpd_regs +ffffffff82b5c8d8 r link_enc_feature +ffffffff82b5c8e8 r cs_shift +ffffffff82b5c8f4 r cs_mask +ffffffff82b5c920 r mi_regs +ffffffff82b5cc38 r mi_shifts +ffffffff82b5cc80 r mi_masks +ffffffff82b5cda0 r ipp_regs +ffffffff82b5cf98 r ipp_shift +ffffffff82b5cfc0 r ipp_mask +ffffffff82b5d060 r xfm_regs +ffffffff82b5d600 r xfm_shift +ffffffff82b5d660 r xfm_mask +ffffffff82b5d7e0 r opp_regs +ffffffff82b5d930 r opp_shift +ffffffff82b5d95c r opp_mask +ffffffff82b5da10 r aux_engine_regs +ffffffff82b5db00 r aux_mask +ffffffff82b5db60 r aux_shift +ffffffff82b5db80 r i2c_hw_regs +ffffffff82b5dcd0 r i2c_shifts +ffffffff82b5dcfc r i2c_masks +ffffffff82b5dda0 r audio_regs +ffffffff82b5ded4 r audio_shift +ffffffff82b5deec r audio_mask +ffffffff82b5df30 r stream_enc_regs +ffffffff82b5e5dc r se_shift +ffffffff82b5e660 r se_mask +ffffffff82b5e864 r hwseq_reg +ffffffff82b5ea80 r hwseq_shift +ffffffff82b5eb00 r hwseq_mask +ffffffff82b5ecf4 r res_cap_81 +ffffffff82b5ed30 r res_cap_83 +ffffffff82b5f000 r reg_offsets +ffffffff82b5f048 r dce80_tg_funcs +ffffffff82b60000 r dcn10_dpp_funcs +ffffffff82b61000 r dpp_input_csc_matrix +ffffffff82b63000 r hubbub1_funcs +ffffffff82b64000 r dcn10_hubp_funcs +ffffffff82b65000 r reduceSizeAndFraction.prime_numbers +ffffffff82b67000 r dcn10_funcs +ffffffff82b672c0 r dcn10_private_funcs +ffffffff82b68000 r dcn10_ipp_funcs +ffffffff82b68048 r dcn20_ipp_funcs +ffffffff82b69000 r dcn10_lnk_enc_funcs +ffffffff82b6a000 r dcn10_mpc_funcs +ffffffff82b6b000 r dcn10_opp_funcs +ffffffff82b6c000 r dcn10_tg_funcs +ffffffff82b6d000 r bios_regs +ffffffff82b6d008 r rv2_res_cap +ffffffff82b6d044 r res_cap +ffffffff82b6d080 r debug_defaults_drv +ffffffff82b6d1f8 r debug_defaults_diags +ffffffff82b6d370 r clk_src_regs +ffffffff82b6d4c0 r dmcu_regs +ffffffff82b6d51c r dmcu_shift +ffffffff82b6d530 r dmcu_mask +ffffffff82b6d57c r abm_regs +ffffffff82b6d5bc r abm_shift +ffffffff82b6d5d0 r abm_mask +ffffffff82b6d618 r res_create_funcs +ffffffff82b6d648 r res_create_maximus_funcs +ffffffff82b6d678 r plane_cap +ffffffff82b6d6a8 r dcn10_res_pool_funcs +ffffffff82b6d790 r panel_cntl_regs +ffffffff82b6d7b0 r panel_cntl_shift +ffffffff82b6d7c0 r panel_cntl_mask +ffffffff82b6d800 r link_enc_regs +ffffffff82b6dd10 r link_enc_aux_regs +ffffffff82b6dd50 r link_enc_hpd_regs +ffffffff82b6dd60 r le_shift +ffffffff82b6de50 r le_mask +ffffffff82b6e208 r link_enc_feature +ffffffff82b6e218 r cs_shift +ffffffff82b6e224 r cs_mask +ffffffff82b6e250 r hubp_regs +ffffffff82b6e900 r hubp_shift +ffffffff82b6e9c4 r hubp_mask +ffffffff82b6ecd0 r ipp_regs +ffffffff82b6edb0 r ipp_shift +ffffffff82b6edcc r ipp_mask +ffffffff82b6ee40 r tf_regs +ffffffff82b6fda0 r tf_shift +ffffffff82b70008 r tf_mask +ffffffff82b709a0 r opp_regs +ffffffff82b70a70 r opp_shift +ffffffff82b70a90 r opp_mask +ffffffff82b70b10 r tg_regs +ffffffff82b71010 r tg_shift +ffffffff82b710d0 r tg_mask +ffffffff82b713d0 r aux_engine_regs +ffffffff82b714c0 r aux_mask +ffffffff82b71520 r aux_shift +ffffffff82b71540 r i2c_hw_regs +ffffffff82b71690 r i2c_shifts +ffffffff82b716bc r i2c_masks +ffffffff82b71760 r mpc_regs +ffffffff82b71880 r mpc_shift +ffffffff82b71898 r mpc_mask +ffffffff82b718f4 r hubbub_reg +ffffffff82b71a68 r hubbub_shift +ffffffff82b71af0 r hubbub_mask +ffffffff82b71d10 r audio_regs +ffffffff82b71dc0 r audio_shift +ffffffff82b71dd8 r audio_mask +ffffffff82b71e20 r stream_enc_regs +ffffffff82b72370 r se_shift +ffffffff82b7244c r se_mask +ffffffff82b727b8 r hwseq_reg +ffffffff82b729d4 r hwseq_shift +ffffffff82b72a54 r hwseq_mask +ffffffff82b73000 r audio_clock_info_table_48bpc +ffffffff82b73190 r audio_clock_info_table_36bpc +ffffffff82b73320 r audio_clock_info_table +ffffffff82b734e0 r dcn10_str_enc_funcs +ffffffff82b74000 r dccg2_funcs +ffffffff82b76000 r dpp_input_csc_matrix +ffffffff82b77000 R dcn20_dsc_funcs +ffffffff82b78000 R dcn20_dwbc_funcs +ffffffff82b79000 r filter_12tap_16p_upscale +ffffffff82b790e0 r filter_12tap_16p_117 +ffffffff82b791c0 r filter_12tap_16p_150 +ffffffff82b792a0 r filter_12tap_16p_183 +ffffffff82b79380 r filter_11tap_16p_upscale +ffffffff82b79450 r filter_11tap_16p_117 +ffffffff82b79520 r filter_11tap_16p_150 +ffffffff82b795f0 r filter_11tap_16p_183 +ffffffff82b796c0 r filter_10tap_16p_upscale +ffffffff82b79780 r filter_10tap_16p_117 +ffffffff82b79840 r filter_10tap_16p_150 +ffffffff82b79900 r filter_10tap_16p_183 +ffffffff82b799c0 r filter_9tap_16p_upscale +ffffffff82b79a70 r filter_9tap_16p_117 +ffffffff82b79b20 r filter_9tap_16p_150 +ffffffff82b79bd0 r filter_9tap_16p_183 +ffffffff82b79c80 r filter_8tap_16p_upscale +ffffffff82b79d10 r filter_8tap_16p_117 +ffffffff82b79da0 r filter_8tap_16p_150 +ffffffff82b79e30 r filter_8tap_16p_183 +ffffffff82b79ec0 r filter_7tap_16p_upscale +ffffffff82b79f40 r filter_7tap_16p_117 +ffffffff82b79fc0 r filter_7tap_16p_150 +ffffffff82b7a040 r filter_7tap_16p_183 +ffffffff82b7a0c0 r filter_6tap_16p_upscale +ffffffff82b7a130 r filter_6tap_16p_117 +ffffffff82b7a1a0 r filter_6tap_16p_150 +ffffffff82b7a210 r filter_6tap_16p_183 +ffffffff82b7a280 r filter_5tap_16p_upscale +ffffffff82b7a2e0 r filter_5tap_16p_117 +ffffffff82b7a340 r filter_5tap_16p_150 +ffffffff82b7a3a0 r filter_5tap_16p_183 +ffffffff82b7a400 r filter_4tap_16p_upscale +ffffffff82b7a450 r filter_4tap_16p_117 +ffffffff82b7a4a0 r filter_4tap_16p_150 +ffffffff82b7a4f0 r filter_4tap_16p_183 +ffffffff82b7a540 r filter_3tap_16p_upscale +ffffffff82b7a580 r filter_3tap_16p_117 +ffffffff82b7a5c0 r filter_3tap_16p_150 +ffffffff82b7a600 r filter_3tap_16p_183 +ffffffff82b7b000 r hubbub2_funcs +ffffffff82b7c000 r dcn20_funcs +ffffffff82b7c2c0 r dcn20_private_funcs +ffffffff82b7d000 r dcn2_mpll_cfg +ffffffff82b7d190 r dcn20_link_enc_funcs +ffffffff82b7e000 R dcn20_mmhubbub_funcs +ffffffff82b7f000 R dcn20_mpc_funcs +ffffffff82b80000 r tf_regs +ffffffff82b81920 r tf_shift +ffffffff82b81ba4 r tf_mask +ffffffff82b825c0 r ipp_regs +ffffffff82b82710 r ipp_shift +ffffffff82b8272c r ipp_mask +ffffffff82b827a0 r opp_regs +ffffffff82b829b0 r opp_shift +ffffffff82b829e8 r opp_mask +ffffffff82b82ac0 r aux_engine_regs +ffffffff82b82bb0 r aux_mask +ffffffff82b82c10 r aux_shift +ffffffff82b82c30 r i2c_hw_regs +ffffffff82b82d80 r i2c_shifts +ffffffff82b82dac r i2c_masks +ffffffff82b82e50 r mpc_regs +ffffffff82b83398 r mpc_shift +ffffffff82b833e0 r mpc_mask +ffffffff82b834f4 r hubbub_reg +ffffffff82b83668 r hubbub_shift +ffffffff82b836f0 r hubbub_mask +ffffffff82b8390c r res_cap_nv10 +ffffffff82b83950 r vmid_regs +ffffffff82b83b10 r vmid_shifts +ffffffff82b83b18 r vmid_masks +ffffffff82b83b40 r tg_regs +ffffffff82b842c0 r tg_shift +ffffffff82b84380 r tg_mask +ffffffff82b84680 r link_enc_regs +ffffffff82b84e20 r link_enc_aux_regs +ffffffff82b84e80 r link_enc_hpd_regs +ffffffff82b84e98 r le_shift +ffffffff82b84f88 r le_mask +ffffffff82b85340 r stream_enc_regs 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+ffffffff82b88fb4 r abm_shift +ffffffff82b88fc8 r abm_mask +ffffffff82b89010 r res_create_funcs +ffffffff82b89040 r res_create_maximus_funcs +ffffffff82b89070 r plane_cap +ffffffff82b890a0 r panel_cntl_regs +ffffffff82b890c0 r panel_cntl_shift +ffffffff82b890d0 r panel_cntl_mask +ffffffff82b8910c r cs_shift +ffffffff82b89118 r cs_mask +ffffffff82b89140 r audio_regs +ffffffff82b89274 r audio_shift +ffffffff82b8928c r audio_mask +ffffffff82b8a000 r dcn20_str_enc_funcs +ffffffff82b8b000 r dccg201_funcs +ffffffff82b8c000 r hubbub201_funcs +ffffffff82b8d000 r dcn201_funcs +ffffffff82b8d2c0 r dcn201_private_funcs +ffffffff82b8e000 r dcn201_link_enc_funcs +ffffffff82b8f000 R dcn201_mpc_funcs +ffffffff82b90000 r bios_regs +ffffffff82b90008 r res_cap_dnc201 +ffffffff82b90048 r debug_defaults_drv +ffffffff82b901c0 r clk_src_regs +ffffffff82b90268 r dccg_regs +ffffffff82b90354 r dccg_shift +ffffffff82b903ec r dccg_mask +ffffffff82b90648 r res_create_funcs +ffffffff82b90678 r res_create_maximus_funcs +ffffffff82b906a8 r plane_cap +ffffffff82b906e0 r link_enc_regs +ffffffff82b90970 r link_enc_aux_regs +ffffffff82b90990 r link_enc_hpd_regs +ffffffff82b90998 r le_shift +ffffffff82b90a88 r le_mask +ffffffff82b90e40 r link_enc_feature +ffffffff82b90e50 r cs_shift +ffffffff82b90e5c r cs_mask +ffffffff82b90e90 r hubp_regs +ffffffff82b91620 r hubp_shift +ffffffff82b916f8 r hubp_mask +ffffffff82b91a60 r ipp_regs +ffffffff82b91b40 r ipp_shift +ffffffff82b91b5c r ipp_mask +ffffffff82b91bd0 r tf_regs +ffffffff82b92c10 r tf_shift +ffffffff82b92e94 r tf_mask +ffffffff82b938b0 r opp_regs +ffffffff82b93960 r opp_shift +ffffffff82b93998 r opp_mask +ffffffff82b93a70 r aux_engine_regs +ffffffff82b93ac0 r aux_mask +ffffffff82b93b20 r aux_shift +ffffffff82b93b40 r i2c_hw_regs +ffffffff82b93bb0 r i2c_shifts +ffffffff82b93bdc r i2c_masks +ffffffff82b93c80 r tg_regs +ffffffff82b93f00 r tg_shift +ffffffff82b93fc0 r tg_mask +ffffffff82b942c0 r mpc_regs +ffffffff82b94808 r mpc_shift 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+ffffffff82b9aa14 r dmcu_mask +ffffffff82b9aa60 r abm_regs +ffffffff82b9aaa0 r abm_shift +ffffffff82b9aab4 r abm_mask +ffffffff82b9ab00 r res_create_funcs +ffffffff82b9ab30 r res_create_maximus_funcs +ffffffff82b9ab60 r plane_cap +ffffffff82b9ab90 r panel_cntl_regs +ffffffff82b9abb0 r panel_cntl_shift +ffffffff82b9abc0 r panel_cntl_mask +ffffffff82b9ac00 r link_enc_regs +ffffffff82b9b260 r link_enc_aux_regs +ffffffff82b9b2b0 r link_enc_hpd_regs +ffffffff82b9b2c4 r le_shift +ffffffff82b9b3b4 r le_mask +ffffffff82b9b76c r link_enc_feature +ffffffff82b9b77c r panel_config_defaults +ffffffff82b9b7b0 r cs_shift +ffffffff82b9b7bc r cs_mask +ffffffff82b9b7f0 r hubp_regs +ffffffff82b9c020 r hubp_shift +ffffffff82b9c11c r hubp_mask +ffffffff82b9c510 r ipp_regs +ffffffff82b9c5f0 r ipp_shift +ffffffff82b9c60c r ipp_mask +ffffffff82b9c680 r tf_regs +ffffffff82b9d740 r tf_shift +ffffffff82b9d9c4 r tf_mask +ffffffff82b9e3e0 r opp_regs +ffffffff82b9e5f0 r opp_shift +ffffffff82b9e628 r opp_mask +ffffffff82b9e700 r tg_regs +ffffffff82b9ec00 r tg_shift +ffffffff82b9ecc0 r tg_mask +ffffffff82b9efc0 r aux_engine_regs +ffffffff82b9f088 r aux_mask +ffffffff82b9f0e8 r aux_shift +ffffffff82b9f100 r i2c_hw_regs +ffffffff82b9f218 r i2c_shifts +ffffffff82b9f244 r i2c_masks +ffffffff82b9f2e8 r mpc_regs +ffffffff82b9f830 r mpc_shift +ffffffff82b9f878 r mpc_mask +ffffffff82b9f98c r hubbub_reg +ffffffff82b9fb00 r hubbub_shift +ffffffff82b9fb88 r hubbub_mask +ffffffff82b9fdb0 r vmid_regs +ffffffff82b9ff70 r vmid_shifts +ffffffff82b9ff78 r vmid_masks +ffffffff82b9ffa0 r dsc_regs +ffffffff82ba0438 r dsc_shift +ffffffff82ba04f0 r dsc_mask +ffffffff82ba07d0 r audio_regs +ffffffff82ba08d8 r audio_shift +ffffffff82ba08f0 r audio_mask +ffffffff82ba0930 r stream_enc_regs +ffffffff82ba0fd4 r se_shift +ffffffff82ba10b0 r se_mask +ffffffff82ba141c r hwseq_reg +ffffffff82ba1638 r hwseq_shift +ffffffff82ba16b8 r hwseq_mask +ffffffff82ba2000 r dccg3_funcs +ffffffff82ba3000 r dcn30_link_enc_funcs +ffffffff82ba4000 r dcn30_str_enc_funcs +ffffffff82ba5000 r dpp_input_csc_matrix +ffffffff82ba6000 R dcn30_dwbc_funcs +ffffffff82ba7000 r hubbub30_funcs +ffffffff82ba9000 r dcn30_funcs +ffffffff82ba92c0 r dcn30_private_funcs +ffffffff82baa000 R dcn30_mmhubbub_funcs +ffffffff82bab000 R dcn30_mpc_funcs +ffffffff82bac000 r bios_regs +ffffffff82bac008 r res_cap_dcn3 +ffffffff82bac048 r debug_defaults_drv +ffffffff82bac1c0 r debug_defaults_diags +ffffffff82bac340 r clk_src_regs +ffffffff82bac538 r dccg_regs +ffffffff82bac624 r dccg_shift +ffffffff82bac6bc r dccg_mask +ffffffff82bac920 r abm_regs +ffffffff82bacaa0 r abm_shift +ffffffff82bacab4 r abm_mask +ffffffff82bacb00 r res_create_funcs +ffffffff82bacb30 r res_create_maximus_funcs +ffffffff82bacb60 r plane_cap +ffffffff82bacb90 r dcn30_res_pool_funcs +ffffffff82bacc70 r panel_cntl_regs +ffffffff82bacc90 r panel_cntl_shift +ffffffff82bacca0 r panel_cntl_mask +ffffffff82bacce0 r link_enc_regs +ffffffff82bad480 r link_enc_aux_regs +ffffffff82bad4e0 r link_enc_hpd_regs +ffffffff82bad4f8 r le_shift +ffffffff82bad5e8 r le_mask +ffffffff82bad9a0 r link_enc_feature +ffffffff82bad9b0 r cs_shift +ffffffff82bad9bc r cs_mask +ffffffff82bad9e4 r hubbub_reg +ffffffff82badb58 r hubbub_shift +ffffffff82badbe0 r hubbub_mask +ffffffff82bade00 r vmid_regs +ffffffff82badfc0 r vmid_shifts +ffffffff82badfc8 r vmid_masks +ffffffff82badff0 r hubp_regs +ffffffff82baec38 r hubp_shift +ffffffff82baed34 r hubp_mask +ffffffff82baf130 r dpp_regs +ffffffff82bb10b0 r tf_shift +ffffffff82bb1380 r tf_mask +ffffffff82bb1ec0 r opp_regs +ffffffff82bb20d0 r opp_shift +ffffffff82bb2108 r opp_mask +ffffffff82bb21e0 r optc_regs +ffffffff82bb2960 r optc_shift +ffffffff82bb2a20 r optc_mask +ffffffff82bb2d20 r mpc_regs +ffffffff82bb450c r mpc_shift +ffffffff82bb45e8 r mpc_mask +ffffffff82bb4960 r dsc_regs +ffffffff82bb4df8 r dsc_shift +ffffffff82bb4eb0 r dsc_mask +ffffffff82bb5190 r dwbc30_regs +ffffffff82bb536c r dwbc30_shift +ffffffff82bb54a0 r dwbc30_mask +ffffffff82bb5970 r mcif_wb30_regs +ffffffff82bb5a6c r mcif_wb30_shift +ffffffff82bb5b18 r mcif_wb30_mask +ffffffff82bb5dd0 r aux_engine_regs +ffffffff82bb5ec0 r aux_mask +ffffffff82bb5f20 r aux_shift +ffffffff82bb5f40 r i2c_hw_regs +ffffffff82bb6090 r i2c_shifts +ffffffff82bb60bc r i2c_masks +ffffffff82bb6160 r audio_regs +ffffffff82bb6294 r audio_shift +ffffffff82bb62ac r audio_mask +ffffffff82bb62f0 r stream_enc_regs +ffffffff82bb6ae8 r se_shift +ffffffff82bb6bc4 r se_mask +ffffffff82bb6f30 r vpg_regs +ffffffff82bb6fbc r vpg_shift +ffffffff82bb6fe4 r vpg_mask +ffffffff82bb7080 r afmt_regs +ffffffff82bb717c r afmt_shift +ffffffff82bb7190 r afmt_mask +ffffffff82bb71d4 r hwseq_reg +ffffffff82bb73f0 r hwseq_shift +ffffffff82bb7470 r hwseq_mask +ffffffff82bb8000 r dccg301_funcs +ffffffff82bb9000 r dcn301_link_enc_funcs +ffffffff82bba000 r hubbub301_funcs +ffffffff82bbb000 r dcn301_funcs +ffffffff82bbb2c0 r dcn301_private_funcs +ffffffff82bbc000 r dcn301_link_panel_cntl_funcs +ffffffff82bbd000 r bios_regs +ffffffff82bbd008 r debug_defaults_drv +ffffffff82bbd180 r debug_defaults_diags +ffffffff82bbd300 r clk_src_regs +ffffffff82bbd450 r dccg_regs +ffffffff82bbd53c r dccg_shift +ffffffff82bbd5d4 r dccg_mask +ffffffff82bbd830 r abm_regs +ffffffff82bbd930 r abm_shift +ffffffff82bbd944 r abm_mask +ffffffff82bbd990 r res_create_funcs +ffffffff82bbd9c0 r res_create_maximus_funcs +ffffffff82bbd9f0 r plane_cap +ffffffff82bbda20 r panel_cntl_regs +ffffffff82bbda60 r panel_cntl_shift +ffffffff82bbda70 r panel_cntl_mask +ffffffff82bbdab0 r link_enc_regs +ffffffff82bbdfc0 r link_enc_aux_regs +ffffffff82bbe000 r link_enc_hpd_regs +ffffffff82bbe010 r le_shift +ffffffff82bbe100 r le_mask +ffffffff82bbe4b8 r link_enc_feature +ffffffff82bbe4c8 r cs_shift +ffffffff82bbe4d4 r cs_mask +ffffffff82bbe4fc r hubbub_reg +ffffffff82bbe670 r hubbub_shift +ffffffff82bbe6f8 r hubbub_mask +ffffffff82bbe920 r vmid_regs +ffffffff82bbeae0 r vmid_shifts +ffffffff82bbeae8 r vmid_masks +ffffffff82bbeb10 r hubp_regs +ffffffff82bbf340 r hubp_shift +ffffffff82bbf43c r hubp_mask +ffffffff82bbf830 r dpp_regs +ffffffff82bc0d30 r tf_shift +ffffffff82bc1000 r tf_mask +ffffffff82bc1b40 r opp_regs +ffffffff82bc1ca0 r opp_shift +ffffffff82bc1cd8 r opp_mask +ffffffff82bc1db0 r optc_regs +ffffffff82bc22b0 r optc_shift +ffffffff82bc2370 r optc_mask +ffffffff82bc2670 r mpc_regs +ffffffff82bc3e5c r mpc_shift +ffffffff82bc3f38 r mpc_mask +ffffffff82bc42b0 r dsc_regs +ffffffff82bc44fc r dsc_shift +ffffffff82bc45b4 r dsc_mask +ffffffff82bc4890 r dwbc30_regs +ffffffff82bc4a6c r dwbc30_shift +ffffffff82bc4ba0 r dwbc30_mask +ffffffff82bc5070 r mcif_wb30_regs +ffffffff82bc516c r mcif_wb30_shift +ffffffff82bc5218 r mcif_wb30_mask +ffffffff82bc54d0 r aux_engine_regs +ffffffff82bc5570 r aux_mask +ffffffff82bc55d0 r aux_shift +ffffffff82bc55f0 r i2c_hw_regs +ffffffff82bc56d0 r i2c_shifts +ffffffff82bc56fc r i2c_masks +ffffffff82bc57a0 r audio_regs +ffffffff82bc58d4 r audio_shift +ffffffff82bc58ec r audio_mask +ffffffff82bc5930 r stream_enc_regs +ffffffff82bc5e80 r se_shift +ffffffff82bc5f5c r se_mask +ffffffff82bc62d0 r vpg_regs +ffffffff82bc6320 r vpg_shift +ffffffff82bc6348 r vpg_mask +ffffffff82bc63e0 r afmt_regs +ffffffff82bc6470 r afmt_shift +ffffffff82bc6484 r afmt_mask +ffffffff82bc64c8 r hwseq_reg +ffffffff82bc66e4 r hwseq_shift +ffffffff82bc6764 r hwseq_mask +ffffffff82bc7000 r bios_regs +ffffffff82bc7008 r res_cap_dcn302 +ffffffff82bc7048 r debug_defaults_drv +ffffffff82bc71c0 r debug_defaults_diags +ffffffff82bc7340 r clk_src_regs +ffffffff82bc74e4 r dccg_regs +ffffffff82bc75d0 r dccg_shift +ffffffff82bc7668 r dccg_mask +ffffffff82bc78d0 r abm_regs +ffffffff82bc7a10 r abm_shift +ffffffff82bc7a24 r abm_mask +ffffffff82bc7a70 r res_create_funcs +ffffffff82bc7aa0 r res_create_maximus_funcs +ffffffff82bc7ad0 r plane_cap +ffffffff82bc7b00 r panel_cntl_regs +ffffffff82bc7b20 r panel_cntl_shift +ffffffff82bc7b30 r panel_cntl_mask +ffffffff82bc7b70 r link_enc_regs +ffffffff82bc81d0 r link_enc_aux_regs +ffffffff82bc8220 r link_enc_hpd_regs +ffffffff82bc8234 r le_shift +ffffffff82bc8324 r le_mask +ffffffff82bc86dc r link_enc_feature +ffffffff82bc86ec r cs_shift +ffffffff82bc86f8 r cs_mask +ffffffff82bc8720 r hubbub_reg +ffffffff82bc8894 r hubbub_shift +ffffffff82bc891c r hubbub_mask +ffffffff82bc8b40 r vmid_regs +ffffffff82bc8d00 r vmid_shifts +ffffffff82bc8d08 r vmid_masks +ffffffff82bc8d30 r hubp_regs +ffffffff82bc976c r hubp_shift +ffffffff82bc9868 r hubp_mask +ffffffff82bc9c60 r dpp_regs +ffffffff82bcb6a0 r tf_shift +ffffffff82bcb970 r tf_mask +ffffffff82bcc4b0 r opp_regs +ffffffff82bcc668 r opp_shift +ffffffff82bcc6a0 r opp_mask +ffffffff82bcc780 r optc_regs +ffffffff82bccdc0 r optc_shift +ffffffff82bcce80 r optc_mask +ffffffff82bcd180 r mpc_regs +ffffffff82bce96c r mpc_shift +ffffffff82bcea48 r mpc_mask +ffffffff82bcedc0 r dsc_regs +ffffffff82bcf194 r dsc_shift +ffffffff82bcf24c r dsc_mask +ffffffff82bcf530 r dwbc30_regs +ffffffff82bcf70c r dwbc30_shift +ffffffff82bcf840 r dwbc30_mask +ffffffff82bcfd10 r mcif_wb30_regs +ffffffff82bcfe0c r mcif_wb30_shift +ffffffff82bcfeb8 r mcif_wb30_mask +ffffffff82bd0170 r aux_engine_regs +ffffffff82bd0238 r aux_mask +ffffffff82bd0298 r aux_shift +ffffffff82bd02b0 r i2c_hw_regs +ffffffff82bd03c8 r i2c_shifts +ffffffff82bd03f4 r i2c_masks +ffffffff82bd04a0 r audio_regs +ffffffff82bd05d4 r audio_shift +ffffffff82bd05ec r audio_mask +ffffffff82bd0630 r stream_enc_regs +ffffffff82bd0cd4 r se_shift +ffffffff82bd0db0 r se_mask +ffffffff82bd1120 r vpg_regs +ffffffff82bd1198 r vpg_shift +ffffffff82bd11c0 r vpg_mask +ffffffff82bd1260 r afmt_regs +ffffffff82bd1338 r afmt_shift +ffffffff82bd134c r afmt_mask +ffffffff82bd1390 r hwseq_reg +ffffffff82bd15ac r hwseq_shift +ffffffff82bd162c r hwseq_mask +ffffffff82bd2000 r bios_regs +ffffffff82bd2008 r res_cap_dcn303 +ffffffff82bd2048 r debug_defaults_drv +ffffffff82bd21c0 r debug_defaults_diags +ffffffff82bd2340 r clk_src_regs +ffffffff82bd23e8 r dccg_regs +ffffffff82bd24d4 r dccg_shift +ffffffff82bd256c r dccg_mask +ffffffff82bd27d0 r abm_regs +ffffffff82bd2850 r abm_shift +ffffffff82bd2864 r abm_mask +ffffffff82bd28b0 r res_create_funcs +ffffffff82bd28e0 r res_create_maximus_funcs +ffffffff82bd2910 r plane_cap +ffffffff82bd2940 r panel_cntl_regs +ffffffff82bd2960 r panel_cntl_shift +ffffffff82bd2970 r panel_cntl_mask +ffffffff82bd29b0 r link_enc_regs +ffffffff82bd2c40 r link_enc_aux_regs +ffffffff82bd2c60 r link_enc_hpd_regs +ffffffff82bd2c68 r le_shift +ffffffff82bd2d58 r le_mask +ffffffff82bd3110 r link_enc_feature +ffffffff82bd3120 r cs_shift +ffffffff82bd312c r cs_mask +ffffffff82bd3154 r hubbub_reg +ffffffff82bd32c8 r hubbub_shift +ffffffff82bd3350 r hubbub_mask +ffffffff82bd3570 r vmid_regs +ffffffff82bd3730 r vmid_shifts +ffffffff82bd3738 r vmid_masks +ffffffff82bd3760 r hubp_regs +ffffffff82bd3b78 r hubp_shift +ffffffff82bd3c74 r hubp_mask +ffffffff82bd4070 r dpp_regs +ffffffff82bd4af0 r tf_shift +ffffffff82bd4dc0 r tf_mask +ffffffff82bd5900 r opp_regs +ffffffff82bd59b0 r opp_shift +ffffffff82bd59e8 r opp_mask +ffffffff82bd5ac0 r optc_regs +ffffffff82bd5d40 r optc_shift +ffffffff82bd5e00 r optc_mask +ffffffff82bd6100 r mpc_regs +ffffffff82bd78ec r mpc_shift +ffffffff82bd79c8 r mpc_mask +ffffffff82bd7d40 r dsc_regs +ffffffff82bd7ec8 r dsc_shift +ffffffff82bd7f80 r dsc_mask +ffffffff82bd8260 r dwbc30_regs +ffffffff82bd843c r dwbc30_shift +ffffffff82bd8570 r dwbc30_mask +ffffffff82bd8a40 r mcif_wb30_regs +ffffffff82bd8b3c r mcif_wb30_shift +ffffffff82bd8be8 r mcif_wb30_mask +ffffffff82bd8ea0 r aux_engine_regs +ffffffff82bd8ef0 r aux_mask +ffffffff82bd8f50 r aux_shift +ffffffff82bd8f70 r i2c_hw_regs +ffffffff82bd8fe0 r i2c_shifts +ffffffff82bd900c r i2c_masks +ffffffff82bd90b0 r audio_regs +ffffffff82bd91e4 r audio_shift +ffffffff82bd91fc r audio_mask +ffffffff82bd9240 r stream_enc_regs +ffffffff82bd94e8 r se_shift +ffffffff82bd95c4 r se_mask +ffffffff82bd9930 r vpg_regs +ffffffff82bd996c r vpg_shift +ffffffff82bd9994 r vpg_mask +ffffffff82bd9a30 r afmt_regs +ffffffff82bd9a9c r afmt_shift +ffffffff82bd9ab0 r afmt_mask +ffffffff82bd9af4 r hwseq_reg +ffffffff82bd9d10 r hwseq_shift +ffffffff82bd9d90 r hwseq_mask +ffffffff82bda000 r dccg31_funcs +ffffffff82bdb000 r dcn31_link_enc_funcs +ffffffff82bdc000 r dcn30_str_enc_funcs +ffffffff82bdd000 r hubbub31_funcs +ffffffff82bde000 r dcn31_funcs +ffffffff82bde2c0 r dcn31_private_funcs +ffffffff82bdf000 r dcn31_link_panel_cntl_funcs +ffffffff82be0000 r bios_regs +ffffffff82be0008 r res_cap_dcn31 +ffffffff82be0048 r debug_defaults_diags +ffffffff82be01c0 r clk_src_regs +ffffffff82be0370 r clk_src_regs_b0 +ffffffff82be0514 r dccg_regs +ffffffff82be0600 r dccg_shift +ffffffff82be0698 r dccg_mask +ffffffff82be0900 r abm_regs +ffffffff82be0a00 r abm_shift +ffffffff82be0a14 r abm_mask +ffffffff82be0a60 r res_create_funcs +ffffffff82be0a90 r res_create_maximus_funcs +ffffffff82be0ac0 r plane_cap +ffffffff82be0af0 r link_enc_regs +ffffffff82be1150 r link_enc_aux_regs +ffffffff82be11a0 r link_enc_hpd_regs +ffffffff82be11b4 r le_shift +ffffffff82be12a4 r le_mask +ffffffff82be165c r link_enc_feature +ffffffff82be166c r panel_config_defaults +ffffffff82be16a0 r debug_defaults_drv +ffffffff82be1818 r cs_shift +ffffffff82be1824 r cs_mask +ffffffff82be184c r hubbub_reg +ffffffff82be19c0 r hubbub_shift +ffffffff82be1a48 r hubbub_mask +ffffffff82be1c70 r vmid_regs +ffffffff82be1e30 r vmid_shifts +ffffffff82be1e38 r vmid_masks +ffffffff82be1e60 r hubp_regs +ffffffff82be2690 r hubp_shift +ffffffff82be278c r hubp_mask +ffffffff82be2b80 r dpp_regs +ffffffff82be4080 r tf_shift +ffffffff82be4350 r tf_mask +ffffffff82be4e90 r opp_regs +ffffffff82be4ff0 r opp_shift +ffffffff82be5028 r opp_mask +ffffffff82be5100 r optc_regs +ffffffff82be5600 r optc_shift +ffffffff82be56c0 r optc_mask +ffffffff82be59c0 r mpc_regs +ffffffff82be71ac r mpc_shift +ffffffff82be7288 r mpc_mask +ffffffff82be7600 r dsc_regs +ffffffff82be784c r dsc_shift +ffffffff82be7904 r dsc_mask +ffffffff82be7be0 r dwbc30_regs +ffffffff82be7dbc r dwbc30_shift +ffffffff82be7ef0 r dwbc30_mask +ffffffff82be83c0 r mcif_wb30_regs +ffffffff82be84bc r mcif_wb30_shift +ffffffff82be8568 r mcif_wb30_mask +ffffffff82be8820 r aux_engine_regs +ffffffff82be88e8 r aux_mask +ffffffff82be8948 r aux_shift +ffffffff82be8960 r i2c_hw_regs +ffffffff82be8a78 r i2c_shifts +ffffffff82be8aa4 r i2c_masks +ffffffff82be8b50 r audio_regs +ffffffff82be8c84 r audio_shift +ffffffff82be8c9c r audio_mask +ffffffff82be8cd8 r se_shift +ffffffff82be8db4 r se_mask +ffffffff82be9120 r vpg_regs +ffffffff82be9210 r vpg_shift +ffffffff82be9238 r vpg_mask +ffffffff82be92e0 r afmt_regs +ffffffff82be93b8 r afmt_shift +ffffffff82be93cc r afmt_mask +ffffffff82be9420 r stream_enc_regs +ffffffff82beaac0 r hpo_dp_stream_enc_regs +ffffffff82beacf0 r hpo_dp_se_shift +ffffffff82bead18 r hpo_dp_se_mask +ffffffff82beadc0 r apg_regs +ffffffff82beae00 r apg_shift +ffffffff82beae08 r apg_mask +ffffffff82beae20 r hpo_dp_link_enc_regs +ffffffff82beaf30 r hpo_dp_le_shift +ffffffff82beaf4c r hpo_dp_le_mask +ffffffff82beafb0 r hwseq_reg +ffffffff82beb1cc r hwseq_shift +ffffffff82beb24c r hwseq_mask +ffffffff82bec000 r dccg314_funcs +ffffffff82bed000 r dcn314_str_enc_funcs +ffffffff82bee000 r dcn314_funcs +ffffffff82bee2c0 r dcn314_private_funcs +ffffffff82bef000 r bios_regs +ffffffff82bef008 r res_cap_dcn314 +ffffffff82bef048 r debug_defaults_diags +ffffffff82bef1c0 r clk_src_regs +ffffffff82bef364 r dccg_regs +ffffffff82bef450 r dccg_shift +ffffffff82bef4e8 r dccg_mask +ffffffff82bef750 r abm_regs +ffffffff82bef850 r abm_shift +ffffffff82bef864 r abm_mask +ffffffff82bef8b0 r res_create_funcs +ffffffff82bef8e0 r res_create_maximus_funcs +ffffffff82bef910 r plane_cap +ffffffff82bef940 r link_enc_regs +ffffffff82beffa0 r link_enc_aux_regs +ffffffff82befff0 r link_enc_hpd_regs +ffffffff82bf0004 r le_shift +ffffffff82bf00f4 r le_mask +ffffffff82bf04ac r link_enc_feature +ffffffff82bf04bc r panel_config_defaults +ffffffff82bf04f0 r debug_defaults_drv +ffffffff82bf0668 r cs_shift +ffffffff82bf0674 r cs_mask +ffffffff82bf069c r hubbub_reg +ffffffff82bf0810 r hubbub_shift +ffffffff82bf0898 r hubbub_mask +ffffffff82bf0ac0 r vmid_regs +ffffffff82bf0c80 r vmid_shifts +ffffffff82bf0c88 r vmid_masks +ffffffff82bf0cb0 r hubp_regs +ffffffff82bf14e0 r hubp_shift +ffffffff82bf15dc r hubp_mask +ffffffff82bf19d0 r dpp_regs +ffffffff82bf2ed0 r tf_shift +ffffffff82bf31a0 r tf_mask +ffffffff82bf3ce0 r opp_regs +ffffffff82bf3e40 r opp_shift +ffffffff82bf3e78 r opp_mask +ffffffff82bf3f50 r optc_regs +ffffffff82bf4450 r optc_shift +ffffffff82bf4510 r optc_mask +ffffffff82bf4810 r mpc_regs +ffffffff82bf5ffc r mpc_shift +ffffffff82bf60d8 r mpc_mask +ffffffff82bf6450 r dsc_regs +ffffffff82bf6760 r dsc_shift +ffffffff82bf6818 r dsc_mask +ffffffff82bf6af0 r dwbc30_regs +ffffffff82bf6ccc r dwbc30_shift +ffffffff82bf6e00 r dwbc30_mask +ffffffff82bf72d0 r mcif_wb30_regs +ffffffff82bf73cc r mcif_wb30_shift +ffffffff82bf7478 r mcif_wb30_mask +ffffffff82bf7730 r aux_engine_regs +ffffffff82bf77f8 r aux_mask +ffffffff82bf7858 r aux_shift +ffffffff82bf7870 r i2c_hw_regs +ffffffff82bf7988 r i2c_shifts +ffffffff82bf79b4 r i2c_masks +ffffffff82bf7a60 r audio_regs +ffffffff82bf7b94 r audio_shift +ffffffff82bf7bac r audio_mask +ffffffff82bf7bf0 r stream_enc_regs +ffffffff82bf8294 r se_shift +ffffffff82bf8370 r se_mask +ffffffff82bf86e0 r vpg_regs +ffffffff82bf87d0 r vpg_shift +ffffffff82bf87f8 r vpg_mask +ffffffff82bf88a0 r afmt_regs +ffffffff82bf8978 r afmt_shift +ffffffff82bf898c r afmt_mask +ffffffff82bf89e0 r hpo_dp_stream_enc_regs +ffffffff82bf8c10 r hpo_dp_se_shift +ffffffff82bf8c38 r hpo_dp_se_mask +ffffffff82bf8ce0 r apg_regs +ffffffff82bf8d20 r apg_shift +ffffffff82bf8d28 r apg_mask +ffffffff82bf8d40 r hpo_dp_link_enc_regs +ffffffff82bf8e50 r hpo_dp_le_shift +ffffffff82bf8e6c r hpo_dp_le_mask +ffffffff82bf8ed0 r hwseq_reg +ffffffff82bf90ec r hwseq_shift +ffffffff82bf916c r hwseq_mask +ffffffff82bfa000 r bios_regs +ffffffff82bfa008 r res_cap_dcn31 +ffffffff82bfa048 r debug_defaults_diags +ffffffff82bfa1c0 r clk_src_regs +ffffffff82bfa364 r dccg_regs +ffffffff82bfa450 r dccg_shift +ffffffff82bfa4e8 r dccg_mask +ffffffff82bfa750 r abm_regs +ffffffff82bfa850 r abm_shift +ffffffff82bfa864 r abm_mask +ffffffff82bfa8b0 r res_create_funcs +ffffffff82bfa8e0 r res_create_maximus_funcs +ffffffff82bfa910 r plane_cap +ffffffff82bfa940 r link_enc_regs +ffffffff82bfafa0 r link_enc_aux_regs +ffffffff82bfaff0 r link_enc_hpd_regs +ffffffff82bfb004 r le_shift +ffffffff82bfb0f4 r le_mask +ffffffff82bfb4ac r link_enc_feature +ffffffff82bfb4bc r panel_config_defaults +ffffffff82bfb4f0 r debug_defaults_drv +ffffffff82bfb668 r cs_shift +ffffffff82bfb674 r cs_mask +ffffffff82bfb69c r hubbub_reg +ffffffff82bfb810 r hubbub_shift +ffffffff82bfb898 r hubbub_mask +ffffffff82bfbac0 r vmid_regs +ffffffff82bfbc80 r vmid_shifts +ffffffff82bfbc88 r vmid_masks +ffffffff82bfbcb0 r hubp_regs +ffffffff82bfc4e0 r hubp_shift +ffffffff82bfc5dc r hubp_mask +ffffffff82bfc9d0 r dpp_regs +ffffffff82bfded0 r tf_shift +ffffffff82bfe1a0 r tf_mask +ffffffff82bfece0 r opp_regs +ffffffff82bfee40 r opp_shift +ffffffff82bfee78 r opp_mask +ffffffff82bfef50 r optc_regs +ffffffff82bff450 r optc_shift +ffffffff82bff510 r optc_mask +ffffffff82bff810 r mpc_regs +ffffffff82c00ffc r mpc_shift +ffffffff82c010d8 r mpc_mask +ffffffff82c01450 r dsc_regs +ffffffff82c0169c r dsc_shift +ffffffff82c01754 r dsc_mask +ffffffff82c01a30 r dwbc30_regs +ffffffff82c01c0c r dwbc30_shift +ffffffff82c01d40 r dwbc30_mask +ffffffff82c02210 r mcif_wb30_regs +ffffffff82c0230c r mcif_wb30_shift +ffffffff82c023b8 r mcif_wb30_mask +ffffffff82c02670 r aux_engine_regs +ffffffff82c02738 r aux_mask +ffffffff82c02798 r aux_shift +ffffffff82c027b0 r i2c_hw_regs +ffffffff82c028c8 r i2c_shifts +ffffffff82c028f4 r i2c_masks +ffffffff82c029a0 r audio_regs +ffffffff82c02ad4 r audio_shift +ffffffff82c02aec r audio_mask +ffffffff82c02b30 r stream_enc_regs +ffffffff82c031d4 r se_shift +ffffffff82c032b0 r se_mask +ffffffff82c03620 r vpg_regs +ffffffff82c03710 r vpg_shift +ffffffff82c03738 r vpg_mask +ffffffff82c037e0 r afmt_regs +ffffffff82c038b8 r afmt_shift +ffffffff82c038cc r afmt_mask +ffffffff82c03920 r hpo_dp_stream_enc_regs +ffffffff82c03b50 r hpo_dp_se_shift +ffffffff82c03b78 r hpo_dp_se_mask +ffffffff82c03c20 r apg_regs +ffffffff82c03c60 r apg_shift +ffffffff82c03c68 r apg_mask +ffffffff82c03c80 r hpo_dp_link_enc_regs +ffffffff82c03d90 r hpo_dp_le_shift +ffffffff82c03dac r hpo_dp_le_mask +ffffffff82c03e10 r hwseq_reg +ffffffff82c0402c r hwseq_shift +ffffffff82c040ac r hwseq_mask +ffffffff82c05000 r bios_regs +ffffffff82c05008 r res_cap_dcn31 +ffffffff82c05048 r debug_defaults_diags +ffffffff82c051c0 r clk_src_regs +ffffffff82c05364 r dccg_regs +ffffffff82c05450 r dccg_shift +ffffffff82c054e8 r dccg_mask +ffffffff82c05750 r abm_regs +ffffffff82c05850 r abm_shift +ffffffff82c05864 r abm_mask +ffffffff82c058b0 r res_create_funcs +ffffffff82c058e0 r res_create_maximus_funcs +ffffffff82c05910 r plane_cap +ffffffff82c05940 r link_enc_regs +ffffffff82c05fa0 r link_enc_aux_regs +ffffffff82c05ff0 r link_enc_hpd_regs +ffffffff82c06004 r le_shift +ffffffff82c060f4 r le_mask +ffffffff82c064ac r link_enc_feature +ffffffff82c064bc r panel_config_defaults +ffffffff82c064f0 r debug_defaults_drv +ffffffff82c06668 r cs_shift +ffffffff82c06674 r cs_mask +ffffffff82c0669c r hubbub_reg +ffffffff82c06810 r hubbub_shift +ffffffff82c06898 r hubbub_mask +ffffffff82c06ac0 r vmid_regs +ffffffff82c06c80 r vmid_shifts +ffffffff82c06c88 r vmid_masks +ffffffff82c06cb0 r hubp_regs +ffffffff82c074e0 r hubp_shift +ffffffff82c075dc r hubp_mask +ffffffff82c079d0 r dpp_regs +ffffffff82c08ed0 r tf_shift +ffffffff82c091a0 r tf_mask +ffffffff82c09ce0 r opp_regs +ffffffff82c09e40 r opp_shift +ffffffff82c09e78 r opp_mask +ffffffff82c09f50 r optc_regs +ffffffff82c0a450 r optc_shift +ffffffff82c0a510 r optc_mask +ffffffff82c0a810 r mpc_regs +ffffffff82c0bffc r mpc_shift +ffffffff82c0c0d8 r mpc_mask +ffffffff82c0c450 r dsc_regs +ffffffff82c0c69c r dsc_shift +ffffffff82c0c754 r dsc_mask +ffffffff82c0ca30 r dwbc30_regs +ffffffff82c0cc0c r dwbc30_shift +ffffffff82c0cd40 r dwbc30_mask +ffffffff82c0d210 r mcif_wb30_regs +ffffffff82c0d30c r mcif_wb30_shift +ffffffff82c0d3b8 r mcif_wb30_mask +ffffffff82c0d670 r aux_engine_regs +ffffffff82c0d738 r aux_mask +ffffffff82c0d798 r aux_shift +ffffffff82c0d7b0 r i2c_hw_regs +ffffffff82c0d8c8 r i2c_shifts +ffffffff82c0d8f4 r i2c_masks +ffffffff82c0d9a0 r audio_regs +ffffffff82c0dad4 r audio_shift +ffffffff82c0daec r audio_mask +ffffffff82c0db30 r stream_enc_regs +ffffffff82c0e1d4 r se_shift +ffffffff82c0e2b0 r se_mask +ffffffff82c0e620 r vpg_regs +ffffffff82c0e710 r vpg_shift +ffffffff82c0e738 r vpg_mask +ffffffff82c0e7e0 r afmt_regs +ffffffff82c0e8b8 r afmt_shift +ffffffff82c0e8cc r afmt_mask +ffffffff82c0e920 r hpo_dp_stream_enc_regs +ffffffff82c0eb50 r hpo_dp_se_shift +ffffffff82c0eb78 r hpo_dp_se_mask +ffffffff82c0ec20 r apg_regs +ffffffff82c0ec60 r apg_shift +ffffffff82c0ec68 r apg_mask +ffffffff82c0ec80 r hpo_dp_link_enc_regs +ffffffff82c0ed90 r hpo_dp_le_shift +ffffffff82c0edac r hpo_dp_le_mask +ffffffff82c0ee10 r hwseq_reg +ffffffff82c0f02c r hwseq_shift +ffffffff82c0f0ac r hwseq_mask +ffffffff82c10000 r dccg32_funcs +ffffffff82c11000 r dcn32_link_enc_funcs +ffffffff82c12000 r dcn32_str_enc_funcs +ffffffff82c13000 r hubbub32_funcs +ffffffff82c14000 r dcn32_funcs +ffffffff82c142c0 r dcn32_private_funcs +ffffffff82c15000 R dcn32_mmhubbub_funcs +ffffffff82c16000 R dcn32_mpc_funcs +ffffffff82c17000 r res_cap_dcn32 +ffffffff82c17040 r debug_defaults_diags +ffffffff82c171b8 r dccg_shift +ffffffff82c17250 r dccg_mask +ffffffff82c174ac r abm_shift +ffffffff82c174c0 r abm_mask +ffffffff82c17508 r res_create_funcs +ffffffff82c17538 r res_create_maximus_funcs +ffffffff82c17568 r plane_cap +ffffffff82c17594 r le_shift +ffffffff82c17684 r le_mask +ffffffff82c17a3c r link_enc_feature +ffffffff82c17a50 r debug_defaults_drv +ffffffff82c17bc8 r cs_shift +ffffffff82c17bd4 r cs_mask +ffffffff82c17bfc r hubbub_shift +ffffffff82c17c84 r hubbub_mask +ffffffff82c17ea0 r vmid_shifts +ffffffff82c17ea8 r vmid_masks +ffffffff82c17ec8 r hubp_shift +ffffffff82c17fc4 r hubp_mask +ffffffff82c183b4 r tf_shift +ffffffff82c18684 r tf_mask +ffffffff82c191c4 r opp_shift +ffffffff82c191fc r opp_mask +ffffffff82c192d0 r optc_shift +ffffffff82c19390 r optc_mask +ffffffff82c19690 r mpc_shift +ffffffff82c1976c r mpc_mask +ffffffff82c19ad8 r dsc_shift +ffffffff82c19b90 r dsc_mask +ffffffff82c19e68 r dwbc30_shift +ffffffff82c19f9c r dwbc30_mask +ffffffff82c1a464 r mcif_wb30_shift +ffffffff82c1a510 r mcif_wb30_mask +ffffffff82c1a7bc r aux_mask +ffffffff82c1a81c r aux_shift +ffffffff82c1a834 r i2c_shifts +ffffffff82c1a860 r i2c_masks +ffffffff82c1a904 r audio_shift +ffffffff82c1a91c r audio_mask +ffffffff82c1a958 r se_shift +ffffffff82c1aa34 r se_mask +ffffffff82c1ada0 r vpg_shift +ffffffff82c1adc8 r vpg_mask +ffffffff82c1ae5c r afmt_shift +ffffffff82c1ae70 r afmt_mask +ffffffff82c1aeb4 r hpo_dp_se_shift +ffffffff82c1aedc r hpo_dp_se_mask +ffffffff82c1af7c r apg_shift +ffffffff82c1af84 r apg_mask +ffffffff82c1af9c r hpo_dp_le_shift +ffffffff82c1afb8 r hpo_dp_le_mask +ffffffff82c1b01c r hwseq_shift +ffffffff82c1b09c r hwseq_mask +ffffffff82c1c000 r dcn321_link_enc_funcs +ffffffff82c1d000 r res_cap_dcn321 +ffffffff82c1d040 r debug_defaults_diags +ffffffff82c1d1b8 r dccg_shift +ffffffff82c1d250 r dccg_mask +ffffffff82c1d4ac r abm_shift +ffffffff82c1d4c0 r abm_mask +ffffffff82c1d508 r res_create_funcs +ffffffff82c1d538 r res_create_maximus_funcs +ffffffff82c1d568 r plane_cap +ffffffff82c1d594 r le_shift +ffffffff82c1d684 r le_mask +ffffffff82c1da3c r link_enc_feature +ffffffff82c1da50 r debug_defaults_drv +ffffffff82c1dbc8 r cs_shift +ffffffff82c1dbd4 r cs_mask +ffffffff82c1dbfc r hubbub_shift +ffffffff82c1dc84 r hubbub_mask +ffffffff82c1dea0 r vmid_shifts +ffffffff82c1dea8 r vmid_masks +ffffffff82c1dec8 r hubp_shift +ffffffff82c1dfc4 r hubp_mask +ffffffff82c1e3b4 r tf_shift +ffffffff82c1e684 r tf_mask +ffffffff82c1f1c4 r opp_shift +ffffffff82c1f1fc r opp_mask +ffffffff82c1f2d0 r optc_shift +ffffffff82c1f390 r optc_mask +ffffffff82c1f690 r mpc_shift +ffffffff82c1f76c r mpc_mask +ffffffff82c1fad8 r dsc_shift +ffffffff82c1fb90 r dsc_mask +ffffffff82c1fe68 r dwbc30_shift +ffffffff82c1ff9c r dwbc30_mask +ffffffff82c20464 r mcif_wb30_shift +ffffffff82c20510 r mcif_wb30_mask +ffffffff82c207bc r aux_mask +ffffffff82c2081c r aux_shift +ffffffff82c20834 r i2c_shifts +ffffffff82c20860 r i2c_masks +ffffffff82c20904 r audio_shift +ffffffff82c2091c r audio_mask +ffffffff82c20958 r se_shift +ffffffff82c20a34 r se_mask +ffffffff82c20da0 r vpg_shift +ffffffff82c20dc8 r vpg_mask +ffffffff82c20e5c r afmt_shift +ffffffff82c20e70 r afmt_mask +ffffffff82c20eb4 r hpo_dp_se_shift +ffffffff82c20edc r hpo_dp_se_mask +ffffffff82c20f7c r apg_shift +ffffffff82c20f84 r apg_mask +ffffffff82c20f9c r hpo_dp_le_shift +ffffffff82c20fb8 r hpo_dp_le_mask +ffffffff82c2101c r hwseq_shift +ffffffff82c2109c r hwseq_mask +ffffffff82c23000 R dcn10_soc_defaults +ffffffff82c2308c R dcn10_ip_defaults +ffffffff82c2e000 R dml20_funcs +ffffffff82c2e030 R dml20v2_funcs +ffffffff82c2e060 R dml21_funcs +ffffffff82c2e090 R dml30_funcs +ffffffff82c2e0c0 R dml31_funcs +ffffffff82c2e0f0 R dml314_funcs +ffffffff82c2e120 R dml32_funcs +ffffffff82c31000 R qp_table_422_10bpc_min +ffffffff82c31740 R qp_table_444_8bpc_max +ffffffff82c32080 R qp_table_420_12bpc_max +ffffffff82c327c0 R qp_table_444_10bpc_min +ffffffff82c33400 R qp_table_420_8bpc_max +ffffffff82c33840 R qp_table_444_8bpc_min +ffffffff82c34180 R qp_table_444_12bpc_min +ffffffff82c350c0 R qp_table_420_12bpc_min +ffffffff82c35800 R qp_table_422_12bpc_min +ffffffff82c36140 R qp_table_422_12bpc_max +ffffffff82c36a80 R qp_table_444_12bpc_max +ffffffff82c379c0 R qp_table_420_8bpc_min +ffffffff82c37e00 R qp_table_422_8bpc_min +ffffffff82c38340 R qp_table_422_10bpc_max +ffffffff82c38a80 R qp_table_420_10bpc_max +ffffffff82c39040 R qp_table_420_10bpc_min +ffffffff82c39600 R qp_table_444_10bpc_max +ffffffff82c3a240 R qp_table_422_8bpc_max ffffffff82c3c000 r funcs ffffffff82c3c050 r hpd_regs ffffffff82c3c1a0 r hpd_shift @@ -45137,33 +45140,27 @@ ffffffff82c3e1c0 r ddc_data_regs ffffffff82c3e3a0 r ddc_clk_regs ffffffff82c3e580 r ddc_shift ffffffff82c3e5a8 r ddc_mask -ffffffff82c3e5d0 r generic_regs -ffffffff82c3e640 r generic_shift -ffffffff82c3e650 r generic_mask ffffffff82c3f000 r funcs ffffffff82c40000 r funcs ffffffff82c40050 r hpd_regs ffffffff82c401a0 r hpd_shift ffffffff82c401b0 r hpd_mask -ffffffff82c401c0 r ddc_data_regs_dcn -ffffffff82c40370 r ddc_clk_regs_dcn -ffffffff82c40520 r ddc_shift -ffffffff82c40640 r ddc_mask -ffffffff82c40760 r generic_regs -ffffffff82c407d0 r generic_shift -ffffffff82c407e0 r generic_mask +ffffffff82c401c0 r ddc_data_regs +ffffffff82c403a0 r ddc_clk_regs +ffffffff82c40580 r ddc_shift +ffffffff82c405a8 r ddc_mask ffffffff82c41000 r funcs ffffffff82c42000 r funcs ffffffff82c42050 r hpd_regs -ffffffff82c42168 r hpd_shift -ffffffff82c42178 r hpd_mask -ffffffff82c42190 r ddc_data_regs_dcn -ffffffff82c422c0 r ddc_clk_regs_dcn -ffffffff82c423f0 r ddc_shift -ffffffff82c424e0 r ddc_mask +ffffffff82c421a0 r hpd_shift +ffffffff82c421b0 r hpd_mask +ffffffff82c421c0 r ddc_data_regs +ffffffff82c423a0 r ddc_clk_regs +ffffffff82c42580 r ddc_shift +ffffffff82c425a8 r ddc_mask ffffffff82c425d0 r generic_regs -ffffffff82c42604 r generic_shift -ffffffff82c4260c r generic_mask +ffffffff82c42640 r generic_shift +ffffffff82c42650 r generic_mask ffffffff82c43000 r funcs ffffffff82c44000 r funcs ffffffff82c44050 r hpd_regs @@ -45182,75 +45179,81 @@ ffffffff82c46050 r hpd_regs ffffffff82c46168 r hpd_shift ffffffff82c46178 r hpd_mask ffffffff82c46190 r ddc_data_regs_dcn -ffffffff82c46300 r ddc_clk_regs_dcn -ffffffff82c46470 r ddc_shift -ffffffff82c46560 r ddc_mask -ffffffff82c46650 r generic_regs -ffffffff82c466c0 r generic_shift -ffffffff82c466d0 r generic_mask +ffffffff82c462c0 r ddc_clk_regs_dcn +ffffffff82c463f0 r ddc_shift +ffffffff82c464e0 r ddc_mask +ffffffff82c465d0 r generic_regs +ffffffff82c46604 r generic_shift +ffffffff82c4660c r generic_mask ffffffff82c47000 r funcs ffffffff82c48000 r funcs ffffffff82c48050 r hpd_regs -ffffffff82c48168 r hpd_shift -ffffffff82c48178 r hpd_mask -ffffffff82c48190 r ddc_data_regs_dcn -ffffffff82c48340 r ddc_clk_regs_dcn -ffffffff82c484f0 r ddc_shift -ffffffff82c48610 r ddc_mask -ffffffff82c48730 r generic_regs -ffffffff82c487a0 r generic_shift -ffffffff82c487b0 r generic_mask +ffffffff82c481a0 r hpd_shift +ffffffff82c481b0 r hpd_mask +ffffffff82c481c0 r ddc_data_regs_dcn +ffffffff82c48370 r ddc_clk_regs_dcn +ffffffff82c48520 r ddc_shift +ffffffff82c48640 r ddc_mask +ffffffff82c48760 r generic_regs +ffffffff82c487d0 r generic_shift +ffffffff82c487e0 r generic_mask ffffffff82c49000 r funcs ffffffff82c4a000 r funcs +ffffffff82c4a050 r hpd_regs +ffffffff82c4a168 r hpd_shift +ffffffff82c4a178 r hpd_mask +ffffffff82c4a190 r ddc_data_regs_dcn +ffffffff82c4a300 r ddc_clk_regs_dcn +ffffffff82c4a470 r ddc_shift +ffffffff82c4a560 r ddc_mask +ffffffff82c4a650 r generic_regs +ffffffff82c4a6c0 r generic_shift +ffffffff82c4a6d0 r generic_mask ffffffff82c4b000 r funcs ffffffff82c4c000 r funcs -ffffffff82c4d000 r hdmi_14_protection -ffffffff82c4d010 r dp_11_protection -ffffffff82c4d020 r hdcp_i2c_offsets -ffffffff82c4d050 r hdcp_dpcd_addrs -ffffffff82c4e000 r irq_service_funcs_dce110 -ffffffff82c4e010 r irq_source_info_dce110 -ffffffff82c4f2a0 r dummy_irq_info_funcs -ffffffff82c4f2b0 r hpd_irq_info_funcs -ffffffff82c4f2c0 r hpd_rx_irq_info_funcs -ffffffff82c4f2d0 r pflip_irq_info_funcs -ffffffff82c4f2e0 r vupdate_irq_info_funcs -ffffffff82c4f2f0 r vblank_irq_info_funcs -ffffffff82c50000 r irq_service_funcs_dce120 -ffffffff82c50008 r dummy_irq_info_funcs -ffffffff82c50018 r hpd_irq_info_funcs -ffffffff82c50028 r hpd_rx_irq_info_funcs -ffffffff82c50038 r pflip_irq_info_funcs -ffffffff82c50048 r vupdate_irq_info_funcs -ffffffff82c50058 r vblank_irq_info_funcs -ffffffff82c50070 r irq_source_info_dce120 -ffffffff82c52000 r irq_service_funcs_dce80 -ffffffff82c52008 r dummy_irq_info_funcs -ffffffff82c52018 r hpd_irq_info_funcs -ffffffff82c52028 r hpd_rx_irq_info_funcs -ffffffff82c52038 r pflip_irq_info_funcs -ffffffff82c52048 r vupdate_irq_info_funcs -ffffffff82c52058 r vblank_irq_info_funcs -ffffffff82c52070 r irq_source_info_dce80 -ffffffff82c54000 r irq_service_funcs_dcn10 +ffffffff82c4c050 r hpd_regs +ffffffff82c4c168 r hpd_shift +ffffffff82c4c178 r hpd_mask +ffffffff82c4c190 r ddc_data_regs_dcn +ffffffff82c4c340 r ddc_clk_regs_dcn +ffffffff82c4c4f0 r ddc_shift +ffffffff82c4c610 r ddc_mask +ffffffff82c4c730 r generic_regs +ffffffff82c4c7a0 r generic_shift +ffffffff82c4c7b0 r generic_mask +ffffffff82c4d000 r funcs +ffffffff82c4e000 r funcs +ffffffff82c4f000 r funcs +ffffffff82c50000 r funcs +ffffffff82c51000 r hdmi_14_protection +ffffffff82c51010 r dp_11_protection +ffffffff82c51020 r hdcp_i2c_offsets +ffffffff82c51050 r hdcp_dpcd_addrs +ffffffff82c52000 r irq_service_funcs_dce110 +ffffffff82c52010 r irq_source_info_dce110 +ffffffff82c532a0 r dummy_irq_info_funcs +ffffffff82c532b0 r hpd_irq_info_funcs +ffffffff82c532c0 r hpd_rx_irq_info_funcs +ffffffff82c532d0 r pflip_irq_info_funcs +ffffffff82c532e0 r vupdate_irq_info_funcs +ffffffff82c532f0 r vblank_irq_info_funcs +ffffffff82c54000 r irq_service_funcs_dce120 ffffffff82c54008 r dummy_irq_info_funcs ffffffff82c54018 r hpd_irq_info_funcs ffffffff82c54028 r hpd_rx_irq_info_funcs ffffffff82c54038 r pflip_irq_info_funcs -ffffffff82c54048 r vupdate_no_lock_irq_info_funcs +ffffffff82c54048 r vupdate_irq_info_funcs ffffffff82c54058 r vblank_irq_info_funcs -ffffffff82c54068 r vline0_irq_info_funcs -ffffffff82c54080 r irq_source_info_dcn10 -ffffffff82c56000 r irq_service_funcs_dcn20 +ffffffff82c54070 r irq_source_info_dce120 +ffffffff82c56000 r irq_service_funcs_dce80 ffffffff82c56008 r dummy_irq_info_funcs ffffffff82c56018 r hpd_irq_info_funcs ffffffff82c56028 r hpd_rx_irq_info_funcs ffffffff82c56038 r pflip_irq_info_funcs -ffffffff82c56048 r vupdate_no_lock_irq_info_funcs +ffffffff82c56048 r vupdate_irq_info_funcs ffffffff82c56058 r vblank_irq_info_funcs -ffffffff82c56068 r vline0_irq_info_funcs -ffffffff82c56080 r irq_source_info_dcn20 -ffffffff82c58000 r irq_service_funcs_dcn201 +ffffffff82c56070 r irq_source_info_dce80 +ffffffff82c58000 r irq_service_funcs_dcn10 ffffffff82c58008 r dummy_irq_info_funcs ffffffff82c58018 r hpd_irq_info_funcs ffffffff82c58028 r hpd_rx_irq_info_funcs @@ -45258,29 +45261,27 @@ ffffffff82c58038 r pflip_irq_info_funcs ffffffff82c58048 r vupdate_no_lock_irq_info_funcs ffffffff82c58058 r vblank_irq_info_funcs ffffffff82c58068 r vline0_irq_info_funcs -ffffffff82c58080 r irq_source_info_dcn201 -ffffffff82c5a000 r irq_source_info_dcn21 -ffffffff82c5b290 r irq_service_funcs_dcn21 -ffffffff82c5b298 r dummy_irq_info_funcs -ffffffff82c5b2a8 r hpd_irq_info_funcs -ffffffff82c5b2b8 r hpd_rx_irq_info_funcs -ffffffff82c5b2c8 r pflip_irq_info_funcs -ffffffff82c5b2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c5b2e8 r vblank_irq_info_funcs -ffffffff82c5b2f8 r vline0_irq_info_funcs -ffffffff82c5b308 r dmub_outbox_irq_info_funcs -ffffffff82c5c000 r irq_source_info_dcn30 -ffffffff82c5d290 r irq_service_funcs_dcn30 -ffffffff82c5d298 r dummy_irq_info_funcs -ffffffff82c5d2a8 r hpd_irq_info_funcs -ffffffff82c5d2b8 r hpd_rx_irq_info_funcs -ffffffff82c5d2c8 r pflip_irq_info_funcs -ffffffff82c5d2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c5d2e8 r vblank_irq_info_funcs -ffffffff82c5d2f8 r vline0_irq_info_funcs -ffffffff82c5d308 r dmub_trace_irq_info_funcs -ffffffff82c5e000 r irq_source_info_dcn302 -ffffffff82c5f290 r irq_service_funcs_dcn302 +ffffffff82c58080 r irq_source_info_dcn10 +ffffffff82c5a000 r irq_service_funcs_dcn20 +ffffffff82c5a008 r dummy_irq_info_funcs +ffffffff82c5a018 r hpd_irq_info_funcs +ffffffff82c5a028 r hpd_rx_irq_info_funcs +ffffffff82c5a038 r pflip_irq_info_funcs +ffffffff82c5a048 r vupdate_no_lock_irq_info_funcs +ffffffff82c5a058 r vblank_irq_info_funcs +ffffffff82c5a068 r vline0_irq_info_funcs +ffffffff82c5a080 r irq_source_info_dcn20 +ffffffff82c5c000 r irq_service_funcs_dcn201 +ffffffff82c5c008 r dummy_irq_info_funcs +ffffffff82c5c018 r hpd_irq_info_funcs +ffffffff82c5c028 r hpd_rx_irq_info_funcs +ffffffff82c5c038 r pflip_irq_info_funcs +ffffffff82c5c048 r vupdate_no_lock_irq_info_funcs +ffffffff82c5c058 r vblank_irq_info_funcs +ffffffff82c5c068 r vline0_irq_info_funcs +ffffffff82c5c080 r irq_source_info_dcn201 +ffffffff82c5e000 r irq_source_info_dcn21 +ffffffff82c5f290 r irq_service_funcs_dcn21 ffffffff82c5f298 r dummy_irq_info_funcs ffffffff82c5f2a8 r hpd_irq_info_funcs ffffffff82c5f2b8 r hpd_rx_irq_info_funcs @@ -45288,18 +45289,19 @@ ffffffff82c5f2c8 r pflip_irq_info_funcs ffffffff82c5f2d8 r vupdate_no_lock_irq_info_funcs ffffffff82c5f2e8 r vblank_irq_info_funcs ffffffff82c5f2f8 r vline0_irq_info_funcs -ffffffff82c5f308 r dmub_trace_irq_info_funcs -ffffffff82c60000 r irq_service_funcs_dcn303 -ffffffff82c60008 r dummy_irq_info_funcs -ffffffff82c60018 r hpd_irq_info_funcs -ffffffff82c60028 r hpd_rx_irq_info_funcs -ffffffff82c60038 r pflip_irq_info_funcs -ffffffff82c60048 r vupdate_no_lock_irq_info_funcs -ffffffff82c60058 r vblank_irq_info_funcs -ffffffff82c60068 r vline0_irq_info_funcs -ffffffff82c60080 r irq_source_info_dcn303 -ffffffff82c62000 r irq_source_info_dcn31 -ffffffff82c63290 r irq_service_funcs_dcn31 +ffffffff82c5f308 r dmub_outbox_irq_info_funcs +ffffffff82c60000 r irq_source_info_dcn30 +ffffffff82c61290 r irq_service_funcs_dcn30 +ffffffff82c61298 r dummy_irq_info_funcs +ffffffff82c612a8 r hpd_irq_info_funcs +ffffffff82c612b8 r hpd_rx_irq_info_funcs +ffffffff82c612c8 r pflip_irq_info_funcs +ffffffff82c612d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c612e8 r vblank_irq_info_funcs +ffffffff82c612f8 r vline0_irq_info_funcs +ffffffff82c61308 r dmub_trace_irq_info_funcs +ffffffff82c62000 r irq_source_info_dcn302 +ffffffff82c63290 r irq_service_funcs_dcn302 ffffffff82c63298 r dummy_irq_info_funcs ffffffff82c632a8 r hpd_irq_info_funcs ffffffff82c632b8 r hpd_rx_irq_info_funcs @@ -45307,19 +45309,18 @@ ffffffff82c632c8 r pflip_irq_info_funcs ffffffff82c632d8 r vupdate_no_lock_irq_info_funcs ffffffff82c632e8 r vblank_irq_info_funcs ffffffff82c632f8 r vline0_irq_info_funcs -ffffffff82c63308 r outbox_irq_info_funcs -ffffffff82c64000 r irq_source_info_dcn314 -ffffffff82c65290 r irq_service_funcs_dcn314 -ffffffff82c65298 r dummy_irq_info_funcs -ffffffff82c652a8 r hpd_irq_info_funcs -ffffffff82c652b8 r hpd_rx_irq_info_funcs -ffffffff82c652c8 r pflip_irq_info_funcs -ffffffff82c652d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c652e8 r vblank_irq_info_funcs -ffffffff82c652f8 r vline0_irq_info_funcs -ffffffff82c65308 r outbox_irq_info_funcs -ffffffff82c66000 r irq_source_info_dcn315 -ffffffff82c67290 r irq_service_funcs_dcn315 +ffffffff82c63308 r dmub_trace_irq_info_funcs +ffffffff82c64000 r irq_service_funcs_dcn303 +ffffffff82c64008 r dummy_irq_info_funcs +ffffffff82c64018 r hpd_irq_info_funcs +ffffffff82c64028 r hpd_rx_irq_info_funcs +ffffffff82c64038 r pflip_irq_info_funcs +ffffffff82c64048 r vupdate_no_lock_irq_info_funcs +ffffffff82c64058 r vblank_irq_info_funcs +ffffffff82c64068 r vline0_irq_info_funcs +ffffffff82c64080 r irq_source_info_dcn303 +ffffffff82c66000 r irq_source_info_dcn31 +ffffffff82c67290 r irq_service_funcs_dcn31 ffffffff82c67298 r dummy_irq_info_funcs ffffffff82c672a8 r hpd_irq_info_funcs ffffffff82c672b8 r hpd_rx_irq_info_funcs @@ -45328,8 +45329,8 @@ ffffffff82c672d8 r vupdate_no_lock_irq_info_funcs ffffffff82c672e8 r vblank_irq_info_funcs ffffffff82c672f8 r vline0_irq_info_funcs ffffffff82c67308 r outbox_irq_info_funcs -ffffffff82c68000 r irq_source_info_dcn32 -ffffffff82c69290 r irq_service_funcs_dcn32 +ffffffff82c68000 r irq_source_info_dcn314 +ffffffff82c69290 r irq_service_funcs_dcn314 ffffffff82c69298 r dummy_irq_info_funcs ffffffff82c692a8 r hpd_irq_info_funcs ffffffff82c692b8 r hpd_rx_irq_info_funcs @@ -45338,9457 +45339,9483 @@ ffffffff82c692d8 r vupdate_no_lock_irq_info_funcs ffffffff82c692e8 r vblank_irq_info_funcs ffffffff82c692f8 r vline0_irq_info_funcs ffffffff82c69308 r outbox_irq_info_funcs -ffffffff82c6a000 r dio_link_hwss -ffffffff82c6b000 r dpia_link_hwss -ffffffff82c6c000 r hpo_dp_link_hwss -ffffffff82c6d000 r virtual_lnk_enc_funcs -ffffffff82c6e000 r virtual_link_hwss -ffffffff82c6f000 r virtual_str_enc_funcs -ffffffff82c70000 R dmub_srv_dcn20_regs -ffffffff82c71000 R dmub_srv_dcn21_regs -ffffffff82c72000 R dmub_srv_dcn30_regs -ffffffff82c73000 R dmub_srv_dcn301_regs -ffffffff82c74000 R dmub_srv_dcn302_regs -ffffffff82c75000 R dmub_srv_dcn303_regs -ffffffff82c76000 R dmub_srv_dcn31_regs -ffffffff82c77000 R dmub_srv_dcn315_regs -ffffffff82c78000 R dmub_srv_dcn316_regs -ffffffff82c79000 R dmub_srv_dcn32_regs -ffffffff82c7a000 r numerator01 -ffffffff82c7a020 r numerator02 -ffffffff82c7a040 r numerator04 -ffffffff82c7a060 r numerator05 -ffffffff82c7c000 r abm_settings -ffffffff82c7c010 r abm_settings_config0 -ffffffff82c7c050 r abm_settings_config1 -ffffffff82c7c088 r min_reduction_table_v_2_2 -ffffffff82c7c095 r max_reduction_table_v_2_2 -ffffffff82c7c0a2 r min_reduction_table -ffffffff82c7c0af r max_reduction_table -ffffffff82c7d000 R amdgpu_pp_profile_name -ffffffff82c7e000 r pp_lib_thermal_controller_names -ffffffff82c7f000 r pp_ip_funcs -ffffffff82c7f0a0 R pp_smu_ip_block -ffffffff82c7f0b8 r pp_dpm_funcs -ffffffff82c80000 r gpio_tbl -ffffffff82c800f0 r enable_fb_req_rej_tbl -ffffffff82c80140 r use_bclk_tbl -ffffffff82c80310 r turn_off_plls_tbl -ffffffff82c80640 r enter_baco_tbl -ffffffff82c80730 r exit_baco_tbl -ffffffff82c80850 r clean_baco_tbl -ffffffff82c81000 r gpio_tbl -ffffffff82c810f0 r enable_fb_req_rej_tbl -ffffffff82c81140 r use_bclk_tbl -ffffffff82c812e0 r turn_off_plls_tbl -ffffffff82c81370 r clk_req_b_tbl -ffffffff82c81490 r enter_baco_tbl -ffffffff82c815b0 r exit_baco_tbl -ffffffff82c816d0 r clean_baco_tbl -ffffffff82c82000 r gpio_tbl -ffffffff82c820f0 r enable_fb_req_rej_tbl -ffffffff82c82140 r use_bclk_tbl_vg -ffffffff82c82200 r turn_off_plls_tbl_vg -ffffffff82c82350 r use_bclk_tbl -ffffffff82c82440 r turn_off_plls_tbl -ffffffff82c825f0 r clk_req_b_tbl -ffffffff82c82710 r enter_baco_tbl -ffffffff82c82830 r exit_baco_tbl -ffffffff82c82950 r clean_baco_tbl -ffffffff82c83000 r vega10_fuses_default -ffffffff82c92000 r pp_r600_encode_lanes -ffffffff82c93000 R pptable_v1_0_funcs -ffffffff82c94000 R pptable_funcs -ffffffff82c94020 r soft_dummy_pp_table -ffffffff82c95000 r smu10_hwmgr_funcs -ffffffff82c96000 r smu7_hwmgr_funcs -ffffffff82c962f8 r smu7_irq_funcs -ffffffff82c96310 r SMU7ThermalPolicy -ffffffff82c97000 r GCCACConfig_Polaris10 -ffffffff82c971b0 r DIDTConfig_Polaris10 -ffffffff82c97a50 r GCCACConfig_Polaris11 -ffffffff82c97c00 r DIDTConfig_Polaris11_Kicker -ffffffff82c984a0 r DIDTConfig_Polaris11 -ffffffff82c98d40 r DIDTConfig_Polaris12 -ffffffff82c995e0 r GCCACConfig_VegaM -ffffffff82c99790 r DIDTConfig_VegaM -ffffffff82c9b000 r smu8_hwmgr_funcs -ffffffff82c9b2f0 r SMU7ThermalPolicy -ffffffff82c9c000 r smu9_irq_funcs -ffffffff82c9d000 r gpio_tbl_iceland -ffffffff82c9d060 r gpio_tbl -ffffffff82c9d150 r enable_fb_req_rej_tbl -ffffffff82c9d1a0 r use_bclk_tbl -ffffffff82c9d370 r turn_off_plls_tbl -ffffffff82c9d610 r enter_baco_tbl -ffffffff82c9d730 r exit_baco_tbl_iceland -ffffffff82c9d870 r clean_baco_tbl_iceland -ffffffff82c9d890 r exit_baco_tbl -ffffffff82c9d9b0 r clean_baco_tbl -ffffffff82c9e000 r pre_baco_tbl -ffffffff82c9e090 r enter_baco_tbl -ffffffff82c9e2b0 r exit_baco_tbl -ffffffff82c9e520 r clean_baco_tbl -ffffffff82c9f000 r vega10_hwmgr_funcs -ffffffff82c9f2f0 r channel_number -ffffffff82c9f320 r SMU7ThermalWithDelayPolicy -ffffffff82ca0000 r SEDiDtStallCtrlConfig_vega10 -ffffffff82ca0110 r SEDiDtStallPatternConfig_vega10 -ffffffff82ca02e0 r SEDiDtWeightConfig_Vega10 -ffffffff82ca03b0 r SEDiDtCtrl1Config_Vega10 -ffffffff82ca0440 r SEDiDtCtrl2Config_Vega10 -ffffffff82ca0510 r SEDiDtCtrl3Config_vega10 -ffffffff82ca0820 r SEDiDtTuningCtrlConfig_Vega10 -ffffffff82ca08b0 r SELCacConfig_Vega10 -ffffffff82ca0a40 r SEDiDtCtrl0Config_Vega10 -ffffffff82ca0d10 r AvfsPSMInitConfig_vega10 -ffffffff82ca0d90 r SEEDCStallPatternConfig_Vega10 -ffffffff82ca0ea0 r SEEDCStallDelayConfig_Vega10 -ffffffff82ca0f80 r SEEDCCtrlConfig_Vega10 -ffffffff82ca1040 r PSMSEEDCStallPatternConfig_Vega10 -ffffffff82ca10c0 r PSMSEEDCStallDelayConfig_Vega10 -ffffffff82ca11d0 r PSMSEEDCCtrlResetConfig_Vega10 -ffffffff82ca1290 r PSMSEEDCCtrlConfig_Vega10 -ffffffff82ca1350 r SEEDCForceStallPatternConfig_Vega10 -ffffffff82ca13e0 r SEEDCCtrlForceStallConfig_Vega10 -ffffffff82ca2000 R vega10_pptable_funcs -ffffffff82ca3000 r pre_baco_tbl -ffffffff82ca3090 r enter_baco_tbl -ffffffff82ca32b0 r exit_baco_tbl -ffffffff82ca3520 r clean_baco_tbl -ffffffff82ca4000 r vega12_hwmgr_funcs -ffffffff82ca42f0 r SMU7ThermalWithDelayPolicy -ffffffff82ca4340 r link_width -ffffffff82ca5000 R vega12_pptable_funcs -ffffffff82ca6000 r clean_baco_tbl -ffffffff82ca7000 r vega20_hwmgr_funcs -ffffffff82ca72f0 r SMU7ThermalWithDelayPolicy -ffffffff82ca7340 r link_width -ffffffff82ca8000 R vega20_pptable_funcs -ffffffff82ca9000 R ci_smu_funcs -ffffffff82ca90e0 r defaults_hawaii_pro -ffffffff82ca912c r defaults_hawaii_xt -ffffffff82ca9178 r defaults_saturn_xt -ffffffff82ca91c4 r defaults_bonaire_xt -ffffffff82ca9210 r ci_program_jump_on_start.data -ffffffff82caa000 R fiji_smu_funcs -ffffffff82caa0e0 r avfs_graphics_level -ffffffff82caa240 r fiji_power_tune_data_set_array -ffffffff82caa246 r fiji_clock_stretch_amount_conversion -ffffffff82caa260 r fiji_clock_stretcher_ddt_table -ffffffff82cab000 R iceland_smu_funcs -ffffffff82cab0e0 r defaults_icelandxt -ffffffff82cab12c r defaults_icelandpro -ffffffff82cab178 r defaults_iceland -ffffffff82cac000 R polaris10_smu_funcs -ffffffff82cac0e0 r avfs_graphics_level_polaris10 -ffffffff82cac2a0 r avfs_memory_level_polaris10 -ffffffff82cac2c0 r polaris10_power_tune_data_set_array -ffffffff82cac310 r Range_Table -ffffffff82cad000 R smu10_smu_funcs -ffffffff82cae000 r smu7_program_jump_on_start.data -ffffffff82cae010 r pwr_virus_table_pre -ffffffff82cae680 r pwr_virus_table_post -ffffffff82caef80 r pwr_virus_section1 -ffffffff82caf610 r pwr_virus_section2 -ffffffff82caf660 r pwr_virus_section3 -ffffffff82cb6ab0 r pwr_virus_section4 -ffffffff82cb6e80 r pwr_virus_section5 -ffffffff82cb7490 r pwr_virus_section6 -ffffffff82cb9000 R smu8_smu_funcs -ffffffff82cba000 R tonga_smu_funcs -ffffffff82cba0e0 r tonga_power_tune_data_set_array -ffffffff82cba12c r tonga_clock_stretch_amount_conversion -ffffffff82cba140 r tonga_clock_stretcher_ddt_table -ffffffff82cbb000 R vega10_smu_funcs -ffffffff82cbc000 R vega12_smu_funcs -ffffffff82cbd000 R vega20_smu_funcs -ffffffff82cbe000 R vegam_smu_funcs -ffffffff82cbe0e0 r vegam_power_tune_data_set_array -ffffffff82cbe130 r Range_Table -ffffffff82cbf000 R smu_ip_funcs -ffffffff82cbf0a0 R smu_v11_0_ip_block -ffffffff82cbf0b8 R smu_v12_0_ip_block -ffffffff82cbf0d0 R smu_v13_0_ip_block -ffffffff82cbf0e8 r swsmu_pm_funcs -ffffffff82cc0000 r arcturus_table_map -ffffffff82cc0080 r arcturus_pwr_src_map -ffffffff82cc0090 r arcturus_workload_map -ffffffff82cc00d0 r arcturus_ppt_funcs -ffffffff82cc04a0 r smu11_thermal_policy -ffffffff82cc04f0 r arcturus_i2c_algo -ffffffff82cc0500 r arcturus_i2c_control_quirks -ffffffff82cc0510 r arcturus_throttler_map -ffffffff82cc0530 r arcturus_message_map -ffffffff82cc0f80 r arcturus_clk_map -ffffffff82cc1040 r arcturus_feature_mask_map -ffffffff82cc2000 r cyan_skillfish_ppt_funcs -ffffffff82cc3000 r navi10_ppt_funcs -ffffffff82cc33d0 r smu11_thermal_policy -ffffffff82cc3420 r navi10_i2c_algo -ffffffff82cc3430 r navi10_i2c_control_quirks -ffffffff82cc3440 r navi1x_throttler_map -ffffffff82cc3460 r NoDbiPrbs7 -ffffffff82cc4460 r DbiPrbs7 -ffffffff82cc6000 r sienna_cichlid_ppt_funcs -ffffffff82cc63d0 r smu11_thermal_policy -ffffffff82cc6420 r sienna_cichlid_i2c_algo -ffffffff82cc6430 r sienna_cichlid_i2c_control_quirks -ffffffff82cc6440 r sienna_cichlid_throttler_map -ffffffff82cc7000 r smu_v11_0_irq_funcs -ffffffff82cc7010 r link_width -ffffffff82cc8000 r vangogh_ppt_funcs -ffffffff82cc83d0 r vangogh_throttler_map -ffffffff82cc9000 r renoir_ppt_funcs -ffffffff82cc93d0 r renoir_throttler_map -ffffffff82cca000 r aldebaran_clk_map -ffffffff82cca0c0 r aldebaran_table_map -ffffffff82cca140 r aldebaran_ppt_funcs -ffffffff82cca510 r smu13_thermal_policy -ffffffff82cca560 r aldebaran_i2c_algo -ffffffff82cca570 r aldebaran_i2c_control_quirks -ffffffff82cca580 r aldebaran_throttler_map -ffffffff82cca5a0 r aldebaran_message_map -ffffffff82ccaff0 r aldebaran_feature_mask_map -ffffffff82ccc000 r smu_v13_0_irq_funcs -ffffffff82ccc010 r link_width -ffffffff82ccd000 r smu_v13_0_0_ppt_funcs -ffffffff82ccd3d0 r smu13_thermal_policy -ffffffff82ccd420 r smu_v13_0_0_i2c_algo -ffffffff82ccd430 r smu_v13_0_0_i2c_control_quirks -ffffffff82ccd440 r smu_v13_0_0_throttler_map -ffffffff82cce000 r smu_v13_0_4_ppt_funcs -ffffffff82ccf000 r smu_v13_0_5_ppt_funcs -ffffffff82cd0000 r smu_v13_0_7_ppt_funcs -ffffffff82cd03d0 r smu13_thermal_policy -ffffffff82cd0420 r smu_v13_0_7_throttler_map -ffffffff82cd1000 r yellow_carp_ppt_funcs -ffffffff82cd2000 r __smu_message_names -ffffffff82cd3000 R pchb_ca -ffffffff82cd4000 R amas_ca -ffffffff82cd4028 R amas_devices -ffffffff82cd4040 r amas_feature -ffffffff82cd5000 R cardslot_ca -ffffffff82cd6000 R cardbus_ca -ffffffff82cd7000 R com_cardbus_ca -ffffffff82cd8000 R xl_cardbus_ca -ffffffff82cd8030 R xl_cardbus_products -ffffffff82cd9000 R dc_cardbus_ca -ffffffff82cd9030 R dc_cardbus_devices -ffffffff82cda000 R fxp_cardbus_ca -ffffffff82cda028 R fxp_cardbus_devices -ffffffff82cdb000 R rl_cardbus_devices -ffffffff82cdb028 R rl_cardbus_ca -ffffffff82cdc000 R re_cardbus_ca -ffffffff82cdc028 R re_cardbus_devices -ffffffff82cdd000 R ath_cardbus_ca -ffffffff82cde000 R athn_cardbus_ca -ffffffff82cde030 r athn_cardbus_devices -ffffffff82cdf000 R atw_cardbus_ca -ffffffff82cdf028 R atw_cardbus_devices -ffffffff82ce0000 R rtw_cardbus_ca -ffffffff82ce0028 R rtw_cardbus_devices -ffffffff82ce1000 R ral_cardbus_ca -ffffffff82ce1030 r ral_cardbus_devices -ffffffff82ce2000 R acx_cardbus_ca -ffffffff82ce2028 r acx_cardbus_devices -ffffffff82ce3000 R pgt_cardbus_ca -ffffffff82ce3028 R pgt_cardbus_devices -ffffffff82ce4000 R ehci_cardbus_ca -ffffffff82ce5000 R ohci_cardbus_ca -ffffffff82ce6000 R uhci_cardbus_ca -ffffffff82ce7000 R malo_cardbus_ca -ffffffff82ce7028 r malo_cardbus_devices -ffffffff82ce8000 R bwi_cardbus_ca -ffffffff82ce8030 r bwi_cardbus_devices -ffffffff82ce9000 R pcmcia_ca -ffffffff82cea000 r pcmcia_parse_cis_tuple.init_cfe -ffffffff82ceb000 r pcmcia_cis_quirks -ffffffff82cec000 R ep_pcmcia_ca -ffffffff82ced000 R ne_pcmcia_ca -ffffffff82ced030 R ne2000devs -ffffffff82cef000 R aic_pcmcia_ca -ffffffff82cf0000 R com_pcmcia_ca -ffffffff82cf1000 R wdc_pcmcia_ca -ffffffff82cf2000 R sm_pcmcia_ca -ffffffff82cf3000 R xe_pcmcia_ca -ffffffff82cf4000 R wi_pcmcia_ca -ffffffff82cf4030 r wi_pcmcia_products -ffffffff82cf5000 R malo_pcmcia_ca -ffffffff82cf6000 R an_pcmcia_ca -ffffffff82cf7000 R pcib_ca -ffffffff82cf8000 R amdpcib_ca -ffffffff82cf8028 R amdpcib_devices -ffffffff82cf9000 R tcpcib_ca -ffffffff82cf9028 R tcpcib_devices -ffffffff82cfa000 R aapic_ca -ffffffff82cfb000 R hme_pci_ca -ffffffff82cfb028 r hme_promhdr -ffffffff82cfb02a r hme_promdat -ffffffff82cfc000 R isa_ca -ffffffff82cfd000 R isadma_ca -ffffffff82cfe000 R fdc_ca -ffffffff82cff000 R fd_ca -ffffffff82d00000 R com_isa_ca -ffffffff82d01000 R pckbc_isa_ca -ffffffff82d02000 R vga_isa_ca -ffffffff82d03000 R wdc_isa_ca -ffffffff82d04000 R mpu_midi_hw_if -ffffffff82d05000 R mpu_isa_ca -ffffffff82d06000 R pcppi_ca -ffffffff82d07000 R spkr_ca -ffffffff82d07030 r pitchtab -ffffffff82d08000 R lpt_isa_ca -ffffffff82d09000 R wbsio_ca -ffffffff82d0a000 R schsio_ca -ffffffff82d0b000 R lm_isa_ca -ffffffff82d0b028 R lm_wbsio_ca -ffffffff82d0c000 R it_sensors -ffffffff82d0c110 R it_vrfact -ffffffff82d0c140 R it_fan_regs -ffffffff82d0c160 R it_fan_ext_regs -ffffffff82d0c178 R it_ca -ffffffff82d0d000 R abitkv_sensors -ffffffff82d0d200 R abitaa_sensors -ffffffff82d0d480 R abitav_sensors -ffffffff82d0d700 R abitas_sensors -ffffffff82d0d980 R abitax_sensors -ffffffff82d0dbc0 R abitm4_sensors -ffffffff82d0de80 R abitan_sensors -ffffffff82d0e120 R abital_sensors -ffffffff82d0e3a0 R abitaw_sensors -ffffffff82d0e700 R abitni_sensors -ffffffff82d0e9a0 R abitat_sensors -ffffffff82d0ecc0 R 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rnd_timeout -ffffffff83120050 D rndlock -ffffffff83120060 D rndreinit_timeout -ffffffff831200a8 D rnd_task -ffffffff83121000 D video_cd -ffffffff83122000 d rrip_table_analyze -ffffffff831220e0 d rrip_table_getname -ffffffff831221e0 d rrip_table_getsymname -ffffffff83122280 d rrip_table_extref -ffffffff83123000 D nexecs -ffffffff83124000 D elf_note_names -ffffffff83125000 D ncpus -ffffffff83125004 D ncpusfound -ffffffff83126000 D acct_lock -ffffffff83126010 D acctsuspend -ffffffff83126014 D acctresume -ffffffff83126018 D acctrate -ffffffff83127000 D ticks -ffffffff83127008 D jiffies -ffffffff83128000 D clockintr_mtx -ffffffff83128010 D statclock_gen -ffffffff83129000 D fhdlk -ffffffff8312a000 D kqueue_klist_lock -ffffffff8312a010 D kq_timeoutmax -ffffffff8312b000 D stackgap_random -ffffffff8312c000 D nprocesses -ffffffff8312c004 D nthreads -ffffffff8312c008 D fork_tfmrate -ffffffff8312d000 D kthread_q -ffffffff8312e000 D malloc_mtx -ffffffff8312e010 D memname -ffffffff8312e4a0 D sysctl_kmemlock -ffffffff8312e4b0 D malloc_errintvl -ffffffff8312f000 D maxdmap -ffffffff8312f008 D maxsmap -ffffffff8312f010 D rlimit_lock -ffffffff83130000 D sched_cost_load -ffffffff83130004 D sched_cost_priority -ffffffff83130008 D sched_cost_runnable -ffffffff8313000c D sched_cost_resident -ffffffff83131000 D intrmap_lock -ffffffff83132000 D nosuidcoredump -ffffffff83132008 D sigio_lock -ffffffff83133000 D smr_lock -ffffffff83133010 D smr_logintvl -ffffffff83134000 D startuphook_list -ffffffff83135000 D sysctl_lock -ffffffff83135010 D sysctl_disklock -ffffffff83135020 d openbsd -ffffffff83135024 d arg_max -ffffffff83135028 d posix_version -ffffffff8313502c d ngroups_max -ffffffff83135030 d int_one -ffffffff83135034 d maxpartitions -ffffffff83135038 d raw_part -ffffffff8313503c D allowpowerdown -ffffffff83135040 D hw_power -ffffffff83135044 d byte_order -ffffffff83135048 d page_size -ffffffff83136000 d thrsleep_queue -ffffffff83136010 d thrsleep_lock -ffffffff83137000 D tc_lock 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ipsec_soft_first_use -ffffffff83185014 D ipsec_exp_first_use -ffffffff83185018 D ipsec_expire_acquire -ffffffff8318501c D esp_enable -ffffffff83185020 D ah_enable -ffffffff83186000 D udpencap_enable -ffffffff83186004 D udpencap_port -ffffffff83187000 D carp_vh_rc -ffffffff83187020 D carp_sc_rc -ffffffff83187040 D carp_opts -ffffffff83187058 D carp_cloner -ffffffff83187088 d carp_send_na.mcast -ffffffff83188000 d PADDING -ffffffff83189000 d PADDING -ffffffff8318a000 d weak_keys -ffffffff8318b000 D swcr_id -ffffffff8318c000 D window_inflate -ffffffff8318c004 D window_deflate -ffffffff8318d000 D ghash_update -ffffffff8318e000 D mpls_defttl -ffffffff8318e004 D mpls_mapttl_ip -ffffffff8318f000 D nfskevq_lock -ffffffff83190000 D nfs_backoff -ffffffff83190020 D nfs_ptimers -ffffffff83191000 D desirednfsrvcache -ffffffff83191010 D nonidempotent -ffffffff83191070 D nfsv2_repstat -ffffffff83192000 D nfsv2_type -ffffffff83192030 D nfsv3_type -ffffffff83192060 D nv2tov_type -ffffffff83192080 D nv3tov_type -ffffffff831920a0 D nfsv3_procid -ffffffff83192100 D nfsv2_procid -ffffffff8319215c d nfsv3err_getattr -ffffffff83192170 d nfsv3err_setattr -ffffffff83192190 d nfsv3err_lookup -ffffffff831921a4 d nfsv3err_access -ffffffff831921b0 d nfsv3err_readlink -ffffffff831921d0 d nfsv3err_read -ffffffff831921f0 d nfsv3err_write -ffffffff83192210 d nfsv3err_create -ffffffff83192230 d nfsv3err_mkdir -ffffffff83192250 d nfsv3err_symlink -ffffffff83192270 d nfsv3err_mknod -ffffffff83192290 d nfsv3err_remove -ffffffff831922b0 d nfsv3err_rmdir -ffffffff831922d0 d nfsv3err_rename -ffffffff83192300 d nfsv3err_link -ffffffff83192330 d nfsv3err_readdir -ffffffff83192350 d nfsv3err_readdirplus -ffffffff83192366 d nfsv3err_fsstat -ffffffff83192372 d nfsv3err_fsinfo -ffffffff8319237c d nfsv3err_pathconf -ffffffff83192386 d nfsv3err_commit -ffffffff83193000 D nfsrv3_procs -ffffffff831930b8 D nfs_niothreads -ffffffff83194000 D fragtbl -ffffffff83195000 D ffs_vtbl -ffffffff83196000 D softdep_typenames -ffffffff83196070 D tickdelay -ffffffff83197000 D dirchk -ffffffff83198000 D desireddquot -ffffffff83199000 D amap_list_lock -ffffffff8319a000 d uao_list_lock -ffffffff8319b000 d uvmexp_countersboot_boot_cpumem -ffffffff8319b0c0 D uvmexp_counters -ffffffff8319b0c8 D vm_min_kernel_address -ffffffff8319c000 D no_constraint -ffffffff8319d000 d uvm_kmapent_warn_rate -ffffffff8319e000 D maxslp -ffffffff8319f000 D uvmpagerops -ffffffff831a0000 D uvm_swap_data_lock -ffffffff831a0010 D swap_syscall_lock -ffffffff831a0020 D oommtx -ffffffff831a1000 D uvm_doswapencrypt -ffffffff831a2000 D gif_list -ffffffff831a2010 D gif_cloner -ffffffff831a3000 D divert6_sendspace -ffffffff831a3004 D divert6_recvspace -ffffffff831a3008 D divb6hashsize -ffffffff831a4000 d in6_get_hw_ifid.allone -ffffffff831a5000 D ip6_sendredirects -ffffffff831a5004 D ip6_defhlim -ffffffff831a5008 D ip6_defmcasthlim -ffffffff831a500c D ip6_maxfragpackets -ffffffff831a5010 D ip6_maxfrags -ffffffff831a5014 D ip6_log_interval -ffffffff831a5018 D ip6_hdrnestlimit -ffffffff831a501c D ip6_dad_count -ffffffff831a5020 D ip6_auto_flowlabel -ffffffff831a5024 D ip6_use_deprecated -ffffffff831a5028 D ip6_neighborgcthresh -ffffffff831a502c D ip6_maxdynroutes -ffffffff831a5030 D rip6_sendspace -ffffffff831a5038 D rip6_recvspace -ffffffff831a5040 D icmp6_redirtimeout -ffffffff831a5044 D icmp6errppslim -ffffffff831a5048 D ip6_mtudisc_timeout -ffffffff831a6000 D frag6_mutex -ffffffff831a7000 d icmp6_mtudisc_hiwat -ffffffff831a7004 d icmp6_mtudisc_lowat -ffffffff831a8000 d randomtab_20 -ffffffff831a9000 D ip6intrq -ffffffff831a9038 d ip6send_task -ffffffff831aa000 D nd6_timer_next -ffffffff831aa008 D nd6_expire_next -ffffffff831aa010 D nd6_delay -ffffffff831aa014 D nd6_umaxtries -ffffffff831aa018 D nd6_mmaxtries -ffffffff831aa01c D nd6_gctimer -ffffffff831aa020 D nd6_maxndopt -ffffffff831ab000 d dadq -ffffffff831ac000 D pfkeyv2_mtx -ffffffff831ac010 d pfkeyv2_seq -ffffffff831ad000 D sadb_exts_allowed_in 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mem_owner_bios -ffffffff831b8008 D mrops -ffffffff831b8028 D mtrrmask -ffffffff831b8030 D mtrrtomrt -ffffffff831b9000 D pmap_pg_wc -ffffffff831b9008 D pmaps_lock -ffffffff831b9018 d pmap_maxkvaddr -ffffffff831ba000 D kv_physwait -ffffffff831bb000 D fpu_save_len -ffffffff831bc000 D i8259_pic -ffffffff831bd000 D softintr_pic -ffffffff831be000 D ipifunc -ffffffff831bf000 D setperf_mp_mutex -ffffffff831c0000 D db_Grp6 -ffffffff831c0040 D db_Grp7 -ffffffff831c0100 D db_Grp8 -ffffffff831c0140 D db_Grp9 -ffffffff831c0200 D db_GrpA -ffffffff831c0240 D db_GrpB -ffffffff831c0280 D db_GrpC -ffffffff831c02c0 D db_inst_0f0x -ffffffff831c0440 D db_inst_0f2x -ffffffff831c05c0 D db_inst_0f3x -ffffffff831c0740 D db_inst_0f8x -ffffffff831c08c0 D db_inst_0f9x -ffffffff831c0a40 D db_inst_0fax -ffffffff831c0bc0 D db_inst_0fbx -ffffffff831c0d40 D db_inst_0fcx -ffffffff831c0ec0 D db_inst_0f -ffffffff831c0f40 D db_Esc92 -ffffffff831c0f80 D db_Esc94 -ffffffff831c0fc0 D db_Esc95 -ffffffff831c1000 D db_Esc96 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uhub_cd -ffffffff8333b000 D uaudio_cd -ffffffff8333c000 D uvideo_ctrls -ffffffff8333c2d8 D uvideo_cd -ffffffff8333d000 D utvfu_norm_params -ffffffff8333d030 D utvfu_cd -ffffffff8333e000 D udl_reg_vals_640x480_60 -ffffffff8333e020 D udl_reg_vals_640x480_67 -ffffffff8333e040 D udl_reg_vals_640x480_72 -ffffffff8333e060 D udl_reg_vals_640x480_75 -ffffffff8333e080 D udl_reg_vals_800x480_61 -ffffffff8333e0a0 D udl_reg_vals_800x600_56 -ffffffff8333e0c0 D udl_reg_vals_800x600_60 -ffffffff8333e0e0 D udl_reg_vals_800x600_72 -ffffffff8333e100 D udl_reg_vals_800x600_74 -ffffffff8333e120 D udl_reg_vals_800x600_75 -ffffffff8333e140 D udl_reg_vals_1024x768_60 -ffffffff8333e160 D udl_reg_vals_1024x768_70 -ffffffff8333e180 D udl_reg_vals_1024x768_75 -ffffffff8333e1a0 D udl_reg_vals_1280x800_60 -ffffffff8333e1c0 D udl_reg_vals_1280x960_60 -ffffffff8333e1e0 D udl_reg_vals_1280x1024_60 -ffffffff8333e200 D udl_reg_vals_1280x1024_75 -ffffffff8333e220 D udl_reg_vals_1366x768_60 -ffffffff8333e240 D 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+ffffffff82ca4110 r SEDiDtStallPatternConfig_vega10 +ffffffff82ca42e0 r SEDiDtWeightConfig_Vega10 +ffffffff82ca43b0 r SEDiDtCtrl1Config_Vega10 +ffffffff82ca4440 r SEDiDtCtrl2Config_Vega10 +ffffffff82ca4510 r SEDiDtCtrl3Config_vega10 +ffffffff82ca4820 r SEDiDtTuningCtrlConfig_Vega10 +ffffffff82ca48b0 r SELCacConfig_Vega10 +ffffffff82ca4a40 r SEDiDtCtrl0Config_Vega10 +ffffffff82ca4d10 r AvfsPSMInitConfig_vega10 +ffffffff82ca4d90 r SEEDCStallPatternConfig_Vega10 +ffffffff82ca4ea0 r SEEDCStallDelayConfig_Vega10 +ffffffff82ca4f80 r SEEDCCtrlConfig_Vega10 +ffffffff82ca5040 r PSMSEEDCStallPatternConfig_Vega10 +ffffffff82ca50c0 r PSMSEEDCStallDelayConfig_Vega10 +ffffffff82ca51d0 r PSMSEEDCCtrlResetConfig_Vega10 +ffffffff82ca5290 r PSMSEEDCCtrlConfig_Vega10 +ffffffff82ca5350 r SEEDCForceStallPatternConfig_Vega10 +ffffffff82ca53e0 r SEEDCCtrlForceStallConfig_Vega10 +ffffffff82ca6000 R vega10_pptable_funcs +ffffffff82ca7000 r pre_baco_tbl +ffffffff82ca7090 r enter_baco_tbl +ffffffff82ca72b0 r exit_baco_tbl +ffffffff82ca7520 r clean_baco_tbl +ffffffff82ca8000 r vega12_hwmgr_funcs +ffffffff82ca82f0 r SMU7ThermalWithDelayPolicy +ffffffff82ca8340 r link_width +ffffffff82ca9000 R vega12_pptable_funcs +ffffffff82caa000 r clean_baco_tbl +ffffffff82cab000 r vega20_hwmgr_funcs +ffffffff82cab2f0 r SMU7ThermalWithDelayPolicy +ffffffff82cab340 r link_width +ffffffff82cac000 R vega20_pptable_funcs +ffffffff82cad000 R ci_smu_funcs +ffffffff82cad0e0 r defaults_hawaii_pro +ffffffff82cad12c r defaults_hawaii_xt +ffffffff82cad178 r defaults_saturn_xt +ffffffff82cad1c4 r defaults_bonaire_xt +ffffffff82cad210 r ci_program_jump_on_start.data +ffffffff82cae000 R fiji_smu_funcs +ffffffff82cae0e0 r avfs_graphics_level +ffffffff82cae240 r fiji_power_tune_data_set_array +ffffffff82cae246 r fiji_clock_stretch_amount_conversion +ffffffff82cae260 r fiji_clock_stretcher_ddt_table +ffffffff82caf000 R iceland_smu_funcs +ffffffff82caf0e0 r defaults_icelandxt +ffffffff82caf12c r defaults_icelandpro +ffffffff82caf178 r defaults_iceland +ffffffff82cb0000 R polaris10_smu_funcs +ffffffff82cb00e0 r avfs_graphics_level_polaris10 +ffffffff82cb02a0 r avfs_memory_level_polaris10 +ffffffff82cb02c0 r polaris10_power_tune_data_set_array +ffffffff82cb0310 r Range_Table +ffffffff82cb1000 R smu10_smu_funcs +ffffffff82cb2000 r smu7_program_jump_on_start.data +ffffffff82cb2010 r pwr_virus_table_pre +ffffffff82cb2680 r pwr_virus_table_post +ffffffff82cb2f80 r pwr_virus_section1 +ffffffff82cb3610 r pwr_virus_section2 +ffffffff82cb3660 r pwr_virus_section3 +ffffffff82cbaab0 r pwr_virus_section4 +ffffffff82cbae80 r pwr_virus_section5 +ffffffff82cbb490 r pwr_virus_section6 +ffffffff82cbd000 R smu8_smu_funcs +ffffffff82cbe000 R tonga_smu_funcs +ffffffff82cbe0e0 r tonga_power_tune_data_set_array +ffffffff82cbe12c r tonga_clock_stretch_amount_conversion +ffffffff82cbe140 r tonga_clock_stretcher_ddt_table +ffffffff82cbf000 R vega10_smu_funcs +ffffffff82cc0000 R vega12_smu_funcs +ffffffff82cc1000 R vega20_smu_funcs +ffffffff82cc2000 R vegam_smu_funcs +ffffffff82cc20e0 r vegam_power_tune_data_set_array +ffffffff82cc2130 r Range_Table +ffffffff82cc3000 R smu_ip_funcs +ffffffff82cc30a0 R smu_v11_0_ip_block +ffffffff82cc30b8 R smu_v12_0_ip_block +ffffffff82cc30d0 R smu_v13_0_ip_block +ffffffff82cc30e8 r swsmu_pm_funcs +ffffffff82cc4000 r arcturus_table_map +ffffffff82cc4080 r arcturus_pwr_src_map +ffffffff82cc4090 r arcturus_workload_map +ffffffff82cc40d0 r arcturus_ppt_funcs +ffffffff82cc44a0 r smu11_thermal_policy +ffffffff82cc44f0 r arcturus_i2c_algo +ffffffff82cc4500 r arcturus_i2c_control_quirks +ffffffff82cc4510 r arcturus_throttler_map +ffffffff82cc4530 r arcturus_message_map +ffffffff82cc4f80 r arcturus_clk_map +ffffffff82cc5040 r arcturus_feature_mask_map +ffffffff82cc6000 r cyan_skillfish_ppt_funcs +ffffffff82cc7000 r navi10_ppt_funcs +ffffffff82cc73d0 r smu11_thermal_policy +ffffffff82cc7420 r navi10_i2c_algo +ffffffff82cc7430 r navi10_i2c_control_quirks +ffffffff82cc7440 r navi1x_throttler_map +ffffffff82cc7460 r NoDbiPrbs7 +ffffffff82cc8460 r DbiPrbs7 +ffffffff82cca000 r sienna_cichlid_ppt_funcs +ffffffff82cca3d0 r smu11_thermal_policy +ffffffff82cca420 r sienna_cichlid_i2c_algo +ffffffff82cca430 r sienna_cichlid_i2c_control_quirks +ffffffff82cca440 r sienna_cichlid_throttler_map +ffffffff82ccb000 r smu_v11_0_irq_funcs +ffffffff82ccb010 r link_width +ffffffff82ccc000 r vangogh_ppt_funcs +ffffffff82ccc3d0 r vangogh_throttler_map +ffffffff82ccd000 r renoir_ppt_funcs +ffffffff82ccd3d0 r renoir_throttler_map +ffffffff82cce000 r aldebaran_clk_map +ffffffff82cce0c0 r aldebaran_table_map +ffffffff82cce140 r aldebaran_ppt_funcs +ffffffff82cce510 r smu13_thermal_policy +ffffffff82cce560 r aldebaran_i2c_algo +ffffffff82cce570 r aldebaran_i2c_control_quirks +ffffffff82cce580 r aldebaran_throttler_map +ffffffff82cce5a0 r aldebaran_message_map +ffffffff82cceff0 r aldebaran_feature_mask_map +ffffffff82cd0000 r smu_v13_0_irq_funcs +ffffffff82cd0010 r link_width +ffffffff82cd1000 r smu_v13_0_0_ppt_funcs +ffffffff82cd13d0 r smu13_thermal_policy +ffffffff82cd1420 r smu_v13_0_0_i2c_algo +ffffffff82cd1430 r smu_v13_0_0_i2c_control_quirks +ffffffff82cd1440 r smu_v13_0_0_throttler_map +ffffffff82cd2000 r smu_v13_0_4_ppt_funcs +ffffffff82cd3000 r smu_v13_0_5_ppt_funcs +ffffffff82cd4000 r smu_v13_0_7_ppt_funcs +ffffffff82cd43d0 r smu13_thermal_policy +ffffffff82cd4420 r smu_v13_0_7_throttler_map +ffffffff82cd5000 r yellow_carp_ppt_funcs +ffffffff82cd6000 r __smu_message_names +ffffffff82cd7000 R pchb_ca +ffffffff82cd8000 R amas_ca +ffffffff82cd8028 R amas_devices +ffffffff82cd8040 r amas_feature +ffffffff82cd9000 R cardslot_ca +ffffffff82cda000 R cardbus_ca +ffffffff82cdb000 R com_cardbus_ca +ffffffff82cdc000 R xl_cardbus_ca +ffffffff82cdc030 R xl_cardbus_products +ffffffff82cdd000 R dc_cardbus_ca +ffffffff82cdd030 R dc_cardbus_devices +ffffffff82cde000 R fxp_cardbus_ca +ffffffff82cde028 R fxp_cardbus_devices +ffffffff82cdf000 R rl_cardbus_devices +ffffffff82cdf028 R rl_cardbus_ca +ffffffff82ce0000 R re_cardbus_ca +ffffffff82ce0028 R re_cardbus_devices +ffffffff82ce1000 R ath_cardbus_ca +ffffffff82ce2000 R athn_cardbus_ca +ffffffff82ce2030 r athn_cardbus_devices +ffffffff82ce3000 R atw_cardbus_ca +ffffffff82ce3028 R atw_cardbus_devices +ffffffff82ce4000 R rtw_cardbus_ca +ffffffff82ce4028 R rtw_cardbus_devices +ffffffff82ce5000 R ral_cardbus_ca +ffffffff82ce5030 r ral_cardbus_devices +ffffffff82ce6000 R acx_cardbus_ca +ffffffff82ce6028 r acx_cardbus_devices +ffffffff82ce7000 R pgt_cardbus_ca +ffffffff82ce7028 R pgt_cardbus_devices +ffffffff82ce8000 R ehci_cardbus_ca +ffffffff82ce9000 R ohci_cardbus_ca +ffffffff82cea000 R uhci_cardbus_ca +ffffffff82ceb000 R malo_cardbus_ca +ffffffff82ceb028 r malo_cardbus_devices +ffffffff82cec000 R bwi_cardbus_ca +ffffffff82cec030 r bwi_cardbus_devices +ffffffff82ced000 R pcmcia_ca +ffffffff82cee000 r pcmcia_parse_cis_tuple.init_cfe +ffffffff82cef000 r pcmcia_cis_quirks +ffffffff82cf0000 R ep_pcmcia_ca +ffffffff82cf1000 R ne_pcmcia_ca +ffffffff82cf1030 R ne2000devs +ffffffff82cf3000 R aic_pcmcia_ca +ffffffff82cf4000 R com_pcmcia_ca +ffffffff82cf5000 R wdc_pcmcia_ca +ffffffff82cf6000 R sm_pcmcia_ca +ffffffff82cf7000 R xe_pcmcia_ca +ffffffff82cf8000 R wi_pcmcia_ca +ffffffff82cf8030 r wi_pcmcia_products +ffffffff82cf9000 R malo_pcmcia_ca +ffffffff82cfa000 R an_pcmcia_ca +ffffffff82cfb000 R pcib_ca +ffffffff82cfc000 R amdpcib_ca +ffffffff82cfc028 R amdpcib_devices +ffffffff82cfd000 R tcpcib_ca +ffffffff82cfd028 R tcpcib_devices +ffffffff82cfe000 R aapic_ca +ffffffff82cff000 R hme_pci_ca +ffffffff82cff028 r hme_promhdr +ffffffff82cff02a r hme_promdat +ffffffff82d00000 R isa_ca +ffffffff82d01000 R isadma_ca +ffffffff82d02000 R fdc_ca +ffffffff82d03000 R fd_ca +ffffffff82d04000 R com_isa_ca +ffffffff82d05000 R pckbc_isa_ca +ffffffff82d06000 R vga_isa_ca +ffffffff82d07000 R wdc_isa_ca +ffffffff82d08000 R mpu_midi_hw_if +ffffffff82d09000 R mpu_isa_ca +ffffffff82d0a000 R pcppi_ca +ffffffff82d0b000 R spkr_ca +ffffffff82d0b030 r pitchtab +ffffffff82d0c000 R lpt_isa_ca +ffffffff82d0d000 R wbsio_ca +ffffffff82d0e000 R schsio_ca +ffffffff82d0f000 R lm_isa_ca +ffffffff82d0f028 R lm_wbsio_ca +ffffffff82d10000 R it_sensors +ffffffff82d10110 R it_vrfact +ffffffff82d10140 R it_fan_regs +ffffffff82d10160 R it_fan_ext_regs +ffffffff82d10178 R it_ca +ffffffff82d11000 R abitkv_sensors +ffffffff82d11200 R abitaa_sensors +ffffffff82d11480 R abitav_sensors +ffffffff82d11700 R abitas_sensors +ffffffff82d11980 R abitax_sensors +ffffffff82d11bc0 R abitm4_sensors +ffffffff82d11e80 R abitan_sensors +ffffffff82d12120 R abital_sensors +ffffffff82d123a0 R abitaw_sensors +ffffffff82d12700 R abitni_sensors +ffffffff82d129a0 R abitat_sensors +ffffffff82d12cc0 R abitan2_sensors +ffffffff82d12f60 R abitab_sensors +ffffffff82d13220 R abitan3_sensors +ffffffff82d13500 R abitaw2_sensors +ffffffff82d13860 R abitat2_sensors +ffffffff82d13b60 R abitab2_sensors +ffffffff82d13ea0 R abitin_sensors +ffffffff82d141e0 R uguru_ca +ffffffff82d15000 R aps_ca +ffffffff82d16000 R wsdisplay_emul_ca +ffffffff82d16030 r charClass +ffffffff82d17000 r usl_syncops +ffffffff82d18000 R wsevent_filtops +ffffffff82d19000 R wskbd_ca +ffffffff82d1a000 r latin1_to_upper +ffffffff82d1b000 R wsmouse_ca +ffffffff82d1c000 R cyrillic_to_koi8 +ffffffff82d1c060 R unicode_to_latin2 +ffffffff82d1c0e0 R unicode_to_latin7 +ffffffff82d1d000 R wsemul_vt100_ops +ffffffff82d1e000 r decspcgr2uni +ffffffff82d1e100 r dectech2uni +ffffffff82d1e200 r nrctable +ffffffff82d1e320 r nrcovlpos +ffffffff82d1f000 r vt100_fkeys +ffffffff82d1f0c0 r vt100_pfkeys +ffffffff82d1f0e0 r vt100_numpad +ffffffff82d20000 R pckbd_ca +ffffffff82d20028 R pckbd_accessops +ffffffff82d20040 R pckbd_consops +ffffffff82d20060 R pckbd_keymapdata +ffffffff82d20070 R pckbd_xtbl +ffffffff82d20100 R pckbd_xtbl_ext +ffffffff82d21000 r pckbd_keydesc_us +ffffffff82d21250 r pckbd_keydesc_de +ffffffff82d212f0 r pckbd_keydesc_de_nodead +ffffffff82d21310 r pckbd_keydesc_fr +ffffffff82d213d0 r pckbd_keydesc_fr_dvorak_bepo +ffffffff82d21510 r pckbd_keydesc_dk +ffffffff82d215a0 r pckbd_keydesc_dk_nodead +ffffffff82d215b0 r pckbd_keydesc_it +ffffffff82d21640 r pckbd_keydesc_uk +ffffffff82d216e0 r pckbd_keydesc_jp +ffffffff82d21750 r pckbd_keydesc_sv +ffffffff82d21780 r pckbd_keydesc_sv_nodead +ffffffff82d21790 r pckbd_keydesc_no +ffffffff82d217c0 r pckbd_keydesc_no_nodead +ffffffff82d217d0 r pckbd_keydesc_us_declk +ffffffff82d21860 r pckbd_keydesc_us_dvorak +ffffffff82d21900 r pckbd_keydesc_us_colemak +ffffffff82d21948 r pckbd_keydesc_swapctrlcaps +ffffffff82d21960 r pckbd_keydesc_iopener +ffffffff82d219b0 r pckbd_keydesc_es +ffffffff82d21a50 r pckbd_keydesc_be +ffffffff82d21b10 r pckbd_keydesc_ru +ffffffff82d21c80 r pckbd_keydesc_ua +ffffffff82d21e10 r pckbd_keydesc_sg +ffffffff82d21ec0 r pckbd_keydesc_sg_nodead +ffffffff82d21ee0 r pckbd_keydesc_sf +ffffffff82d21f00 r pckbd_keydesc_pt +ffffffff82d21f90 r pckbd_keydesc_lt +ffffffff82d22070 r pckbd_keydesc_la +ffffffff82d22100 r pckbd_keydesc_br +ffffffff82d22180 r pckbd_keydesc_tr +ffffffff82d22230 r pckbd_keydesc_tr_nodead +ffffffff82d22250 r pckbd_keydesc_pl +ffffffff82d222b0 r pckbd_keydesc_hu +ffffffff82d223c0 r pckbd_keydesc_si +ffffffff82d224d0 r pckbd_keydesc_cf +ffffffff82d225a0 r pckbd_keydesc_cf_nodead +ffffffff82d225c0 r pckbd_keydesc_lv +ffffffff82d22640 r pckbd_keydesc_nl +ffffffff82d22720 r pckbd_keydesc_nl_nodead +ffffffff82d22740 r pckbd_keydesc_is +ffffffff82d227cc r pckbd_keydesc_is_nodead +ffffffff82d227e0 r pckbd_keydesc_ee +ffffffff82d22890 r pckbd_keydesc_ee_nodead +ffffffff82d228b0 R pckbd_keydesctab +ffffffff82d23000 R pms_ca +ffffffff82d23028 R pms_accessops +ffffffff82d23040 R pms_sec_accessops +ffffffff82d23060 R pms_protocols +ffffffff82d231e0 r alps_models +ffffffff82d24000 R skgpio_led_offset +ffffffff82d24008 R skgpio_ca +ffffffff82d25000 R hidkbd_trtab +ffffffff82d25100 r apple_fn_trans +ffffffff82d25120 r apple_tb_trans +ffffffff82d25140 r apple_mba_trans +ffffffff82d26000 r hidcc_attach_wskbd.accessops +ffffffff82d26020 r hidcc_keysyms +ffffffff82d27000 R usb_ca +ffffffff82d28000 R usb_known_products +ffffffff82d33f40 R usb_known_vendors +ffffffff82d36740 R usbd_error_strs +ffffffff82d37000 R usb_quirks +ffffffff82d37390 R usb_dev_quirks +ffffffff82d37398 R usbd_no_quirk +ffffffff82d38000 R uhub_ca +ffffffff82d38028 R uhub_uhub_ca +ffffffff82d39000 R uaudio_ca +ffffffff82d39028 R uaudio_hw_if +ffffffff82d390e0 R uaudio_rates +ffffffff82d39120 r uaudio_clkname.names +ffffffff82d39140 r uaudio_feature_addent.features +ffffffff82d3a000 R uvideo_ca +ffffffff82d3a028 R uvideo_hw_if +ffffffff82d3a100 R uvideo_devs +ffffffff82d3b000 r utvfu_select_norm.pal +ffffffff82d3b040 r utvfu_select_norm.ntsc +ffffffff82d3b080 r utvfu_setup_capture.setup +ffffffff82d3b180 r utvfu_audio_start_chip.setup +ffffffff82d3b1c8 r utvfu_audio_stop_chip.setup +ffffffff82d3b1d8 R utvfu_ca +ffffffff82d3b200 R utvfu_vid_hw_if +ffffffff82d3b2d0 R utvfu_au_hw_if +ffffffff82d3c000 R udl_ca +ffffffff82d3c030 r udl_devs +ffffffff82d3c0b0 r udl_modes +ffffffff82d3d000 R umidi_hw_if +ffffffff82d3d030 R umidi_ca +ffffffff82d3d060 r umidi_evlen +ffffffff82d3d080 r packet_length +ffffffff82d3e000 r quirk_name +ffffffff82d3f000 R ucom_ca +ffffffff82d40000 R ugen_ca +ffffffff82d40028 R ugenread_intr_filtops +ffffffff82d40058 R ugenread_isoc_filtops +ffffffff82d41000 R uhidev_ca +ffffffff82d41030 r uhid_graphire_report_descr +ffffffff82d410b0 r uhid_graphire3_4x5_report_descr +ffffffff82d41160 r uhid_xb360gp_report_descr +ffffffff82d41210 r uhid_xbonegp_report_descr +ffffffff82d42000 R uhid_ca +ffffffff82d42028 R uhidread_filtops +ffffffff82d43000 R fido_ca +ffffffff82d44000 R ujoy_ca +ffffffff82d45000 r ukbd_keydesc_us +ffffffff82d45290 r ukbd_keydesc_de +ffffffff82d45340 r ukbd_keydesc_de_nodead +ffffffff82d45360 r ukbd_keydesc_fr +ffffffff82d45420 r ukbd_keydesc_fr_apple +ffffffff82d45560 r ukbd_keydesc_fr_dvorak_bepo +ffffffff82d456a0 r ukbd_keydesc_dk +ffffffff82d45740 r ukbd_keydesc_dk_nodead +ffffffff82d45750 r ukbd_keydesc_it +ffffffff82d457f0 r ukbd_keydesc_uk +ffffffff82d458a0 r ukbd_keydesc_jp +ffffffff82d45910 r ukbd_keydesc_sv +ffffffff82d45940 r ukbd_keydesc_sv_nodead +ffffffff82d45950 r ukbd_keydesc_no +ffffffff82d45980 r ukbd_keydesc_no_nodead +ffffffff82d45990 r ukbd_keydesc_us_dvorak +ffffffff82d45a30 r ukbd_keydesc_us_colemak +ffffffff82d45a78 r ukbd_keydesc_swapctrlcaps +ffffffff82d45a90 r ukbd_keydesc_iopener +ffffffff82d45ae0 r ukbd_keydesc_es +ffffffff82d45b80 r ukbd_keydesc_be +ffffffff82d45c40 r ukbd_keydesc_ru +ffffffff82d45db0 r ukbd_keydesc_ua +ffffffff82d45f50 r ukbd_keydesc_sg +ffffffff82d46010 r ukbd_keydesc_sg_nodead +ffffffff82d46030 r ukbd_keydesc_sf +ffffffff82d46050 r ukbd_keydesc_pt +ffffffff82d460e0 r ukbd_keydesc_pt_apple +ffffffff82d46100 r ukbd_keydesc_lt +ffffffff82d461e0 r ukbd_keydesc_la +ffffffff82d46280 r ukbd_keydesc_br +ffffffff82d46310 r ukbd_keydesc_tr +ffffffff82d463d0 r ukbd_keydesc_tr_nodead +ffffffff82d463f0 r ukbd_keydesc_pl +ffffffff82d46450 r ukbd_keydesc_hu +ffffffff82d46560 r ukbd_keydesc_si +ffffffff82d46680 r ukbd_keydesc_cf +ffffffff82d46760 r ukbd_keydesc_cf_nodead +ffffffff82d46780 r ukbd_keydesc_lv +ffffffff82d46800 r ukbd_keydesc_nl +ffffffff82d468e0 r ukbd_keydesc_nl_nodead +ffffffff82d46900 r ukbd_keydesc_is +ffffffff82d46994 r ukbd_keydesc_is_nodead +ffffffff82d469a0 r ukbd_keydesc_ee +ffffffff82d46a50 r ukbd_keydesc_ee_nodead +ffffffff82d46a70 R ukbd_keydesctab +ffffffff82d47000 R ukbd_countrylayout +ffffffff82d47090 R ukbd_consops +ffffffff82d470b0 R ukbd_accessops +ffffffff82d470c8 R ukbd_ca +ffffffff82d48000 R ums_accessops +ffffffff82d48018 R ums_ca +ffffffff82d49000 R umt_accessops +ffffffff82d49018 R umt_ca +ffffffff82d4a000 R uts_devs +ffffffff82d4a010 R uts_accessops +ffffffff82d4a028 R uts_ca +ffffffff82d4b000 R ubcmtp_accessops +ffffffff82d4b018 R ubcmtp_ca +ffffffff82d4b040 r ubcmtp_devices +ffffffff82d4c000 R ucycom_methods +ffffffff82d4c040 R ucycom_devs +ffffffff82d4c050 R ucycom_ca +ffffffff82d4d000 R uslhcom_methods +ffffffff82d4d040 R uslhcom_ca +ffffffff82d4d068 r uslhcom_devs +ffffffff82d4e000 R ulpt_ca +ffffffff82d4f000 R umass_ca +ffffffff82d4f028 R umass_bbb_methods +ffffffff82d4f040 R umass_cbi_methods +ffffffff82d50000 R umass_quirks +ffffffff82d51000 R umass_scsi_switch +ffffffff82d52000 R uthum_devs +ffffffff82d52008 R uthum_ca +ffffffff82d52030 r uthum_sensor_type_s +ffffffff82d53000 R ugold_devs +ffffffff82d53010 R ugold_ca +ffffffff82d54000 R utrh_devs +ffffffff82d54008 R utrh_ca +ffffffff82d55000 R uoakrh_devs +ffffffff82d55008 R uoakrh_ca +ffffffff82d55030 R uoakrh_methods +ffffffff82d56000 R uoaklux_devs +ffffffff82d56008 R uoaklux_ca +ffffffff82d56030 R uoaklux_methods +ffffffff82d57000 R uoakv_devs +ffffffff82d57008 R uoakv_ca +ffffffff82d57030 R uoakv_methods +ffffffff82d58000 R uonerng_ca +ffffffff82d59000 R urng_ca +ffffffff82d59030 r urng_devs +ffffffff82d5a000 R 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zyd_al2210_init.phyini +ffffffff82d888f0 r zyd_al2210_init.rfini +ffffffff82d88920 r zyd_al2210_set_channel.rfprog +ffffffff82d88960 r zyd_gct_init.phyini +ffffffff82d889b0 r zyd_gct_init.rfini +ffffffff82d88a50 r zyd_gct_set_channel.rfprog +ffffffff82d88a90 r zyd_maxim_set_channel.phyini +ffffffff82d88ba0 r zyd_maxim_set_channel.rfini +ffffffff82d88be0 r zyd_maxim_set_channel.rfprog +ffffffff82d88c50 r zyd_maxim2_set_channel.phyini +ffffffff82d88d70 r zyd_maxim2_set_channel.rfini +ffffffff82d88db0 r zyd_maxim2_set_channel.rfprog +ffffffff82d88e20 r zyd_rf_name.zyd_rfs +ffffffff82d88ea0 r zyd_def_phyB +ffffffff82d890d0 r zyd_def_phy +ffffffff82d8a000 R upgt_ca +ffffffff82d8a028 r upgt_devs_1 +ffffffff82d8a030 r upgt_devs_2 +ffffffff82d8b000 R urtw_ca +ffffffff82d8b030 r urtw_devs +ffffffff82d8b090 r urtw_ratetable +ffffffff82d8b0f0 r urtw_8225_gain +ffffffff82d8b110 r urtw_8225_txpwr_cck_ch14 +ffffffff82d8b140 r urtw_8225_txpwr_cck +ffffffff82d8b170 r urtw_8225_tx_gain_cck_ofdm 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r rtl8188ru_bb_prog +ffffffff82d8c838 r rtl8188cu_bb_prog +ffffffff82d8c860 r rtl8192ce_bb_prog +ffffffff82d8c888 r rtl8192cu_bb_prog +ffffffff82d8c8b0 r rtl8188eu_bb_regs +ffffffff82d8ca30 r rtl8188eu_bb_vals +ffffffff82d8cd30 r rtl8188eu_agc_vals +ffffffff82d8cf30 r rtl8192e_bb_regs +ffffffff82d8d0d0 r rtl8192e_bb_vals +ffffffff82d8d410 r rtl8192eu_agc_vals +ffffffff82d8d610 r rtl8192ce_bb_regs +ffffffff82d8d790 r rtl8188ce_bb_vals +ffffffff82d8da80 r rtl8188ce_agc_vals +ffffffff82d8dd00 r rtl8188ru_bb_regs +ffffffff82d8de80 r rtl8188ru_bb_vals +ffffffff82d8e180 r rtl8188ru_agc_vals +ffffffff82d8e400 r rtl8188cu_bb_vals +ffffffff82d8e6f0 r rtl8192ce_bb_vals +ffffffff82d8e9e0 r rtl8192ce_agc_vals +ffffffff82d8ec60 r rtl8192cu_bb_vals +ffffffff82d8f000 R rsu_ca +ffffffff82d8f030 r rsu_devs +ffffffff82d8f0c8 r rsu_devs_noht +ffffffff82d8f0d0 r rsu_qid2idx_4ep +ffffffff82d8f0da r rsu_qid2idx_6ep +ffffffff82d8f0e4 r rsu_qid2idx_11ep +ffffffff82d8f0ee r r92s_epaddr +ffffffff82d90000 R otus_ca +ffffffff82d90030 r otus_devs +ffffffff82d90090 r ar_chans +ffffffff82d900c0 r otus_rates +ffffffff82d900e0 r ar5416_phy_regs +ffffffff82d90380 r ar5416_phy_vals_2ghz_20mhz +ffffffff82d908b0 r ar5416_phy_vals_5ghz_20mhz +ffffffff82d90de0 r ar5416_banks_vals_5ghz +ffffffff82d90ef0 r ar5416_banks_vals_2ghz +ffffffff82d91000 r ar5416_banks_regs +ffffffff82d92000 R umb_regstates +ffffffff82d92080 R umb_dataclasses +ffffffff82d92190 R umb_simstate +ffffffff82d92210 R umb_messages +ffffffff82d922b0 R umb_status +ffffffff82d92570 R umb_cids +ffffffff82d926e0 R umb_pktstate +ffffffff82d92740 R umb_actstate +ffffffff82d927a0 R umb_error +ffffffff82d92830 R umb_pintype +ffffffff82d92960 R umb_istate +ffffffff82d929f0 R umb_ca +ffffffff82d92a20 R umb_quirks +ffffffff82d93000 R uath_ca +ffffffff82d93030 r uath_devs +ffffffff82d94000 R athn_usb_ca +ffffffff82d94030 r athn_usb_devs +ffffffff82d95000 R uow_ca +ffffffff82d95028 r uow_devs +ffffffff82d96000 R uberry_devices +ffffffff82d96008 R uberry_ca +ffffffff82d97000 R upd_ca +ffffffff82d98000 R uwacom_devs +ffffffff82d98010 R uwacom_ca +ffffffff82d98038 R uwacom_accessops +ffffffff82d99000 R bwfm_usb_ca +ffffffff82d99030 r bwfm_usbdevs +ffffffff82d9a000 R umstc_ca +ffffffff82d9a028 r umstc_devs +ffffffff82d9b000 R uhidpp_ca +ffffffff82d9b028 r uhidpp_devs +ffffffff82d9c000 R ucc_ca +ffffffff82d9d000 R iic_ca +ffffffff82d9e000 r probes +ffffffff82d9f000 R lmtemp_ca +ffffffff82da0000 R lmn_ca +ffffffff82da1000 R lmenv_ca +ffffffff82da2000 R maxtmp_ca +ffffffff82da3000 R adc_ca +ffffffff82da4000 R admtemp_ca +ffffffff82da5000 R admlc_ca +ffffffff82da6000 R admtm_ca +ffffffff82da7000 R admtmp_ca +ffffffff82da8000 R admtt_ca +ffffffff82da9000 R maxds_ca +ffffffff82daa000 R adt_ca +ffffffff82dab000 R lm_i2c_ca +ffffffff82dac000 R admcts_ca +ffffffff82dad000 R wbng_ca +ffffffff82dae000 R nvt_ca +ffffffff82dae030 r nvt_volt_desc +ffffffff82daf000 R adl_ca +ffffffff82db0000 R andl_ca +ffffffff82db0030 r andl_temp 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version +ffffffff82dfd000 A __nofault_start +ffffffff82dfd018 A __nofault_end +ffffffff82dfe000 R codepatch_begin +ffffffff82e06000 R codepatch_end +ffffffff82e06000 c XUsyscall_meltdown +ffffffff82e063fa c doreti_iret_meltdown +ffffffff82e07000 c Xalltraps +ffffffff82e08000 A __retguard_start +ffffffff82e08000 r __retguard_366 +ffffffff82e08008 r __retguard_1072 +ffffffff82e08010 r __retguard_1444 +ffffffff82e08018 r __retguard_3081 +ffffffff82e08020 r __retguard_3384 +ffffffff82e08028 r __retguard_297 +ffffffff82e09000 r __retguard_2535 +ffffffff82e09008 r __retguard_2245 +ffffffff82e09010 r __retguard_1236 +ffffffff82e09018 r __retguard_2615 +ffffffff82e09020 r __retguard_3871 +ffffffff82e09028 r __retguard_1394 +ffffffff82e09030 r __retguard_659 +ffffffff82e09038 r __retguard_871 +ffffffff82e09040 r __retguard_1529 +ffffffff82e09048 r __retguard_1839 +ffffffff82e09050 r __retguard_357 +ffffffff82e09058 r __retguard_2628 +ffffffff82e09060 r __retguard_1353 +ffffffff82e09068 r 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wi_cd +ffffffff830e2020 D wi_func_io +ffffffff830e3000 D an_cd +ffffffff830e4000 D xl_cd +ffffffff830e5000 D fxp_int_delay +ffffffff830e5004 D fxp_bundle_max +ffffffff830e5008 D fxp_min_size_mask +ffffffff830e5010 D fxp_cd +ffffffff830e5030 d tx_threshold +ffffffff830e5040 d fxp_cb_config_template +ffffffff830e6000 D rl_cd +ffffffff830e7000 D re_cd +ffffffff830e8000 D dc_cd +ffffffff830e9000 D smc91cxx_idstrs +ffffffff830e9080 D sm_cd +ffffffff830ea000 D epic_cd +ffffffff830eb000 D ne_cd +ffffffff830eb020 d ne2000_detect.test_pattern +ffffffff830ec000 D gem_cd +ffffffff830ed000 D ti_cd +ffffffff830ee000 D com_cd +ffffffff830ee020 D comdefaultrate +ffffffff830ee024 D comconsrate +ffffffff830ee028 D comconscflag +ffffffff830ee030 d comcnattach.comcons +ffffffff830ef000 D pckbc_slot_names +ffffffff830ef010 D pckbc_cd +ffffffff830f0000 D ac97civ +ffffffff830f1000 D cy_cd +ffffffff830f2000 D lpt_cd +ffffffff830f3000 D lm_cd +ffffffff830f4000 D ath_dwelltime +ffffffff830f4004 D ath_calinterval +ffffffff830f4008 D ath_outdoor +ffffffff830f400c D ath_xchanmode +ffffffff830f4010 D ath_softcrypto +ffffffff830f4018 D ath_cd +ffffffff830f5000 D athn_cd +ffffffff830f6000 D bwfm_2ghz_channels +ffffffff830f6010 D bwfm_5ghz_channels +ffffffff830f6030 D bwfm_proto_bcdc_ops +ffffffff830f6050 D bwfm_cd +ffffffff830f7000 D atw_bbp_io_enable_delay +ffffffff830f7004 D atw_bbp_io_disable_delay +ffffffff830f7008 D atw_writewep_delay +ffffffff830f700c D atw_beacon_len_adjust +ffffffff830f7010 D atw_dwelltime +ffffffff830f7018 D atw_cd +ffffffff830f8000 D rtw_dwelltime +ffffffff830f8004 D rtw_macbangbits_timeout +ffffffff830f8008 D rtw_cd +ffffffff830f9000 D ral_cd +ffffffff830fa000 D rt3090_freqs +ffffffff830fb000 D acx_beacon_intvl +ffffffff830fb008 D acx_cd +ffffffff830fc000 D pgt_cd +ffffffff830fd000 D sf_cd +ffffffff830fe000 D malo_cd +ffffffff830ff000 D bwi_cd +ffffffff830ff020 D bwi_constraint +ffffffff830ff030 D bwi_pa_mode +ffffffff83100000 D iosf_cd +ffffffff83100020 d iosf_lock +ffffffff83100030 d iosf_mbi_mtx +ffffffff83101000 D uhci_cd +ffffffff83102000 D ohci_cd +ffffffff83103000 D ehci_cd +ffffffff83104000 D xhci_cd +ffffffff83105000 D ccp_cd +ffffffff83106000 D sdhc_functions +ffffffff83106068 D sdhc_cd +ffffffff83107000 D rtsx_functions +ffffffff83107068 D rtsx_cd +ffffffff83108000 D radio_cd +ffffffff83109000 D kcs_if +ffffffff83109040 D smic_if +ffffffff83109080 D bt_if +ffffffff831090c0 D ipmi_cd +ffffffff831090e0 D maxsdrlen +ffffffff8310a000 D vscsi_cd +ffffffff8310b000 D mpath_cd +ffffffff8310c000 D softraid_cd +ffffffff8310c020 D smd +ffffffff8310d000 D spdmem_cd +ffffffff8310e000 D dwiic_cd +ffffffff8310f000 D kstat_lock +ffffffff8310f010 D kstat_next_id +ffffffff8310f018 D kstat_default_lock +ffffffff83110000 D pf_hdr_limit +ffffffff83110008 D pf_purge_task +ffffffff83110038 D pf_purge_to +ffffffff83110080 D pf_pool_limits +ffffffff831100f0 D pf_state_list +ffffffff83111000 D pf_tags +ffffffff83111010 D pf_qids +ffffffff83111020 D pf_lock +ffffffff83111030 D pf_state_lock +ffffffff83111040 D pfioctl_rw +ffffffff83112000 D pfi_update +ffffffff83113000 D pflog_cloner +ffffffff83114000 D pfsync_qs +ffffffff83114078 D pfsync_cloner +ffffffff831140a8 d pfsync_task +ffffffff83115000 D pflow_cloner +ffffffff83116000 D pppoe_cloner +ffffffff83116030 D pppoediscinq +ffffffff83116060 D pppoeinq +ffffffff83117000 D dt_lock +ffffffff83118000 D dt_prov_profile +ffffffff83118030 D dt_prov_interval +ffffffff83119000 D dtps_nsysent +ffffffff83119008 D dt_prov_syscall +ffffffff8311a000 D dt_prov_static +ffffffff8311a030 D dt_static_sched_dequeue +ffffffff8311a0a0 D dt_static_sched_enqueue +ffffffff8311a110 D dt_static_sched_off__cpu +ffffffff8311a180 D dt_static_sched_on__cpu +ffffffff8311a1f0 D dt_static_sched_remain__cpu +ffffffff8311a260 D dt_static_sched_sleep +ffffffff8311a2d0 D dt_static_sched_wakeup +ffffffff8311a340 D dt_static_raw_syscalls_sys_enter +ffffffff8311a3b0 D dt_static_raw_syscalls_sys_exit +ffffffff8311a420 D dt_static_uvm_fault +ffffffff8311a490 D dt_static_uvm_map_insert +ffffffff8311a500 D dt_static_uvm_map_remove +ffffffff8311a570 D dt_static_uvm_malloc +ffffffff8311a5e0 D dt_static_uvm_free +ffffffff8311a650 D dt_static_uvm_pool_get +ffffffff8311a6c0 D dt_static_uvm_pool_put +ffffffff8311a730 D dt_static_vfs_bufcache_rel +ffffffff8311a7a0 D dt_static_vfs_bufcache_take +ffffffff8311a810 D dt_static_vfs_cleaner +ffffffff8311a880 D dt_static_vmm_guest_enter +ffffffff8311a8f0 D dt_static_vmm_guest_exit +ffffffff8311a960 D dt_static_vmm_inout +ffffffff8311a9d0 D dt_static_smr_call +ffffffff8311aa40 D dt_static_smr_called +ffffffff8311aab0 D dt_static_smr_barrier_enter +ffffffff8311ab20 D dt_static_smr_barrier_exit +ffffffff8311ab90 D dt_static_smr_wakeup +ffffffff8311ac00 D dt_static_smr_thread +ffffffff8311ac70 D dt_static_refcnt_none +ffffffff8311ace0 D dt_static_refcnt_ifaddr +ffffffff8311ad50 D dt_static_refcnt_inpcb +ffffffff8311adc0 D dt_static_refcnt_tdb +ffffffff8311b000 D db_next_free_breakpoint +ffffffff8311b008 D db_breakpoints_inserted +ffffffff8311c000 D db_ed_style +ffffffff8311d000 D db_examine_format +ffffffff8311d078 D db_print_format +ffffffff8311e000 D db_history_size +ffffffff8311e008 D db_history_curr +ffffffff8311e010 D db_history_last +ffffffff8311f000 D db_tab_stop_width +ffffffff8311f004 D db_max_line +ffffffff8311f008 D db_max_width +ffffffff8311f00c D db_radix +ffffffff83120000 D db_lastsym +ffffffff83120008 D db_maxoff +ffffffff83121000 D db_vars +ffffffff83121090 D db_evars +ffffffff83122000 D db_watchpoints_inserted +ffffffff83122008 D db_next_free_watchpoint +ffffffff83123000 D db_log +ffffffff83124000 D audio_cd +ffffffff83124020 D audio_lock +ffffffff83125000 D midi_cd +ffffffff83126000 D rnd_cold +ffffffff83126004 D rnd_slowextract +ffffffff83126008 D rnd_timeout +ffffffff83126050 D rndlock +ffffffff83126060 D rndreinit_timeout +ffffffff831260a8 D rnd_task +ffffffff83127000 D video_cd +ffffffff83128000 d rrip_table_analyze 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m_extref_mtx +ffffffff8314e0c0 D m_pool_allocator +ffffffff8314f000 D somaxconn +ffffffff8314f004 D sominconn +ffffffff8314f008 D sosplice_lock +ffffffff83150000 D sb_max +ffffffff83151000 D unp_df_lock +ffffffff83151010 D unp_gc_lock +ffffffff83151020 D unp_rights_mtx +ffffffff83151030 D unp_ino_mtx +ffffffff83151040 D unp_gc_task +ffffffff83151070 D unpst_sendspace +ffffffff83151074 D unpst_recvspace +ffffffff83151078 D unpsq_sendspace +ffffffff8315107c D unpsq_recvspace +ffffffff83151080 D unpdg_sendspace +ffffffff83151084 D unpdg_recvspace +ffffffff83152000 D doingcache +ffffffff83153000 D maxvfsconf +ffffffff83153010 d vfsconflist +ffffffff83154000 D lockf_lock +ffffffff83154010 D maxlocksperuid +ffffffff83155000 D iftovt_tab +ffffffff83155040 D vttoif_tab +ffffffff83155064 D suid_clear +ffffffff83155068 D vnode_mtx +ffffffff83155078 D vfs_stall_lock +ffffffff83155090 D vtypes +ffffffff831550e0 D vtags +ffffffff83156000 D syncer_maxdelay +ffffffff83156004 D syncdelay +ffffffff83157000 D dosdirtemplate +ffffffff83158000 D ntfs_hashlock +ffffffff83159000 D ntfs_toupper_lock +ffffffff8315a000 D art_table_gc_mtx +ffffffff8315a010 D art_table_gc_task +ffffffff8315a040 D art_node_gc_mtx +ffffffff8315a050 D art_node_gc_task +ffffffff8315b000 D bpf_bufsize +ffffffff8315b004 D bpf_maxbufsize +ffffffff8315b008 D bpf_sysctl_lk +ffffffff8315c000 D ifg_head +ffffffff8315c010 D if_cloners_lock +ffffffff8315c020 D if_input_task_locked +ffffffff8315c050 D netlock +ffffffff8315c060 D ifnetlist +ffffffff8315d000 D ifiq_maxlen_drop +ffffffff8315d004 D ifiq_maxlen_return +ffffffff8315e000 D etherbroadcastaddr +ffffffff8315e006 D ether_ipmulticast_min +ffffffff8315e00c D ether_ipmulticast_max +ffffffff8315e012 D ether_ip6multicast_min +ffffffff8315e018 D ether_ip6multicast_max +ffffffff8315f000 D etherip_cloner +ffffffff8315f030 D etherip_list +ffffffff83160000 D loop_cloner +ffffffff83161000 D ifmedia_mtx +ffffffff83162000 D ppp_compressors +ffffffff83162020 D ppp_cloner +ffffffff83163000 D ppp_pkt_init +ffffffff83164000 D ppp_bsd_compress +ffffffff83165000 D ppp_deflate +ffffffff83165070 D ppp_deflate_draft +ffffffff83166000 D tun_cloner +ffffffff83166030 D tap_cloner +ffffffff83167000 D bridgeintrq +ffffffff83167038 D bridge_cloner +ffffffff83168000 d veb_cloner +ffffffff83168030 d vport_cloner +ffffffff83169000 D vlan_tagh_lk +ffffffff83169010 D vlan_cloner +ffffffff83169040 D svlan_cloner +ffffffff8316a000 D pipex_list_mtx +ffffffff8316a010 D pipex_prune +ffffffff8316a018 D pipexoutq +ffffffff8316a050 d SHAPad2 +ffffffff8316b000 D rtmap_gc +ffffffff8316b018 D rt_rc +ffffffff8316c000 D rt_labels +ffffffff8316d000 D enc_cloner +ffffffff8316e000 D gre_cloner +ffffffff8316e030 D gre_list +ffffffff8316e040 D mgre_cloner +ffffffff8316e070 D egre_cloner +ffffffff8316e0a0 D nvgre_cloner +ffffffff8316e0d0 D eoip_cloner +ffffffff8316f000 D trunk_cloner +ffffffff83170000 d aggr_cloner +ffffffff83171000 d tpmr_cloner +ffffffff83172000 D mpe_cloner +ffffffff83173000 D mpw_cloner +ffffffff83174000 D mpip_cloner +ffffffff83175000 d bpe_cloner +ffffffff83175030 d bpe_lock +ffffffff83176000 D vether_cloner +ffffffff83177000 D pair_cloner +ffffffff83178000 d vxlan_cloner +ffffffff83178030 d vxlan_lock +ffffffff83178040 d vxlan_teps +ffffffff83179000 D underload_interval +ffffffff83179010 D wg_cloner +ffffffff8317a000 d stoeplitz_keyseed +ffffffff8317b000 D ieee80211_cache_size +ffffffff8317c000 D arpt_prune +ffffffff8317c004 D arpt_keep +ffffffff8317c008 D arpt_down +ffffffff8317c010 D arpinq +ffffffff8317c048 D arp_mtx +ffffffff8317c058 D arp_maxtries +ffffffff8317d000 D ipport_firstauto +ffffffff8317d004 D ipport_lastauto +ffffffff8317d008 D ipport_hifirstauto +ffffffff8317d00c D ipport_hilastauto +ffffffff8317e000 D divert_sendspace +ffffffff8317e004 D divert_recvspace +ffffffff8317e008 D divbhashsize +ffffffff8317f000 D icmptstamprepl +ffffffff8317f004 D icmperrppslim +ffffffff8317f008 D icmp_redirtimeout +ffffffff83180000 D ipsendredirects +ffffffff83180004 D ip_defttl +ffffffff83180008 D ip_mtudisc +ffffffff8318000c D ip_mtudisc_timeout +ffffffff83180010 D ipq_mutex +ffffffff83180020 D ip_maxqueue +ffffffff83180028 D ipintrq +ffffffff83180060 d ipsend_task +ffffffff83180090 d ipsendraw_task +ffffffff83181000 D ip_mrtproto +ffffffff83181004 d sin +ffffffff83182000 D rip_sendspace +ffffffff83182008 D rip_recvspace +ffffffff83183000 D tcprexmtthresh +ffffffff83183004 D tcptv_keep_init +ffffffff83183008 D tcp_rst_ppslim +ffffffff8318300c D tcp_ackdrop_ppslim +ffffffff83183010 D tcp_syn_hash_size +ffffffff83183014 D tcp_syn_cache_limit +ffffffff83183018 D tcp_syn_bucket_limit +ffffffff8318301c D tcp_syn_use_limit +ffffffff83184000 D tcp_outflags +ffffffff83185000 D tcp_timer_mtx +ffffffff83185010 D tcp_mssdflt +ffffffff83185014 D tcp_rttdflt +ffffffff83185018 D tcp_do_rfc1323 +ffffffff8318501c D tcp_do_sack +ffffffff83185020 D tcp_do_rfc3390 +ffffffff83185024 D tcp_reass_limit +ffffffff83185028 D tcp_sackhole_limit +ffffffff83186000 D tcp_backoff +ffffffff83186034 D tcp_totbackoff +ffffffff83187000 D tcp_sendspace +ffffffff83187004 D tcp_recvspace +ffffffff83187008 D tcp_autorcvbuf_inc +ffffffff83188000 D udpcksum +ffffffff83188004 D udp_sendspace +ffffffff83188008 D udp_recvspace +ffffffff83189000 D ipsec_flows_mtx +ffffffff83189010 D ipsec_ids_idle +ffffffff83189014 D ipsec_ids_next_flow +ffffffff83189018 D ipsec_policy_head +ffffffff83189028 D ipsp_ids_gc_timeout +ffffffff83189070 D tdb_sadb_mtx +ffffffff83189080 d tdb_hashmask +ffffffff8318a000 D ipo_tdb_mtx +ffffffff8318a010 D ipsec_acquire_mtx +ffffffff8318a020 D ipsec_acquire_head +ffffffff8318b000 D ipsec_keep_invalid +ffffffff8318b004 D ipsec_require_pfs +ffffffff8318b008 D ipsec_soft_timeout +ffffffff8318b00c D ipsec_exp_timeout +ffffffff8318b010 D ipsec_soft_first_use +ffffffff8318b014 D ipsec_exp_first_use +ffffffff8318b018 D ipsec_expire_acquire +ffffffff8318b01c D esp_enable +ffffffff8318b020 D ah_enable +ffffffff8318c000 D udpencap_enable +ffffffff8318c004 D udpencap_port +ffffffff8318d000 D carp_vh_rc +ffffffff8318d020 D carp_sc_rc +ffffffff8318d040 D carp_opts +ffffffff8318d058 D carp_cloner +ffffffff8318d088 d carp_send_na.mcast +ffffffff8318e000 d PADDING +ffffffff8318f000 d PADDING +ffffffff83190000 d weak_keys +ffffffff83191000 D swcr_id +ffffffff83192000 D window_inflate +ffffffff83192004 D window_deflate +ffffffff83193000 D ghash_update +ffffffff83194000 D mpls_defttl +ffffffff83194004 D mpls_mapttl_ip +ffffffff83195000 D nfskevq_lock +ffffffff83196000 D nfs_backoff +ffffffff83196020 D nfs_ptimers +ffffffff83197000 D desirednfsrvcache +ffffffff83197010 D nonidempotent +ffffffff83197070 D nfsv2_repstat +ffffffff83198000 D nfsv2_type +ffffffff83198030 D nfsv3_type +ffffffff83198060 D nv2tov_type +ffffffff83198080 D nv3tov_type +ffffffff831980a0 D nfsv3_procid +ffffffff83198100 D nfsv2_procid +ffffffff8319815c d nfsv3err_getattr +ffffffff83198170 d nfsv3err_setattr +ffffffff83198190 d nfsv3err_lookup +ffffffff831981a4 d nfsv3err_access +ffffffff831981b0 d nfsv3err_readlink +ffffffff831981d0 d nfsv3err_read +ffffffff831981f0 d nfsv3err_write +ffffffff83198210 d nfsv3err_create +ffffffff83198230 d nfsv3err_mkdir +ffffffff83198250 d nfsv3err_symlink +ffffffff83198270 d nfsv3err_mknod +ffffffff83198290 d nfsv3err_remove +ffffffff831982b0 d nfsv3err_rmdir +ffffffff831982d0 d nfsv3err_rename +ffffffff83198300 d nfsv3err_link +ffffffff83198330 d nfsv3err_readdir +ffffffff83198350 d nfsv3err_readdirplus +ffffffff83198366 d nfsv3err_fsstat +ffffffff83198372 d nfsv3err_fsinfo +ffffffff8319837c d nfsv3err_pathconf +ffffffff83198386 d nfsv3err_commit +ffffffff83199000 D nfsrv3_procs +ffffffff831990b8 D nfs_niothreads +ffffffff8319a000 D fragtbl +ffffffff8319b000 D ffs_vtbl +ffffffff8319c000 D softdep_typenames +ffffffff8319c070 D tickdelay +ffffffff8319d000 D dirchk +ffffffff8319e000 D desireddquot +ffffffff8319f000 D amap_list_lock +ffffffff831a0000 d uao_list_lock +ffffffff831a1000 d uvmexp_countersboot_boot_cpumem +ffffffff831a10c0 D uvmexp_counters +ffffffff831a10c8 D vm_min_kernel_address +ffffffff831a2000 D no_constraint +ffffffff831a3000 d uvm_kmapent_warn_rate +ffffffff831a4000 D maxslp +ffffffff831a5000 D uvmpagerops +ffffffff831a6000 D uvm_swap_data_lock +ffffffff831a6010 D swap_syscall_lock +ffffffff831a6020 D oommtx +ffffffff831a7000 D uvm_doswapencrypt +ffffffff831a8000 D gif_list +ffffffff831a8010 D gif_cloner +ffffffff831a9000 D divert6_sendspace +ffffffff831a9004 D divert6_recvspace +ffffffff831a9008 D divb6hashsize +ffffffff831aa000 d in6_get_hw_ifid.allone +ffffffff831ab000 D ip6_sendredirects +ffffffff831ab004 D ip6_defhlim +ffffffff831ab008 D ip6_defmcasthlim +ffffffff831ab00c D ip6_maxfragpackets +ffffffff831ab010 D ip6_maxfrags +ffffffff831ab014 D ip6_log_interval +ffffffff831ab018 D ip6_hdrnestlimit +ffffffff831ab01c D ip6_dad_count +ffffffff831ab020 D ip6_auto_flowlabel +ffffffff831ab024 D ip6_use_deprecated +ffffffff831ab028 D ip6_neighborgcthresh +ffffffff831ab02c D ip6_maxdynroutes +ffffffff831ab030 D rip6_sendspace +ffffffff831ab038 D rip6_recvspace +ffffffff831ab040 D icmp6_redirtimeout +ffffffff831ab044 D icmp6errppslim +ffffffff831ab048 D ip6_mtudisc_timeout +ffffffff831ac000 D frag6_mutex +ffffffff831ad000 d icmp6_mtudisc_hiwat +ffffffff831ad004 d icmp6_mtudisc_lowat +ffffffff831ae000 d randomtab_20 +ffffffff831af000 D ip6intrq +ffffffff831af038 d ip6send_task +ffffffff831b0000 D nd6_timer_next +ffffffff831b0008 D nd6_expire_next +ffffffff831b0010 D nd6_delay +ffffffff831b0014 D nd6_umaxtries +ffffffff831b0018 D nd6_mmaxtries +ffffffff831b001c D nd6_gctimer +ffffffff831b0020 D nd6_maxndopt +ffffffff831b1000 d dadq +ffffffff831b2000 D pfkeyv2_mtx +ffffffff831b2010 d pfkeyv2_seq +ffffffff831b3000 D sadb_exts_allowed_in +ffffffff831b3090 D sadb_exts_required_in +ffffffff831b4000 D cold +ffffffff831b5000 D bdevsw +ffffffff831b5460 D nblkdev +ffffffff831b5470 D cdevsw +ffffffff831b7400 D nchrdev +ffffffff831b7404 D mem_no +ffffffff831b7408 D swapdev +ffffffff831b7410 D constab +ffffffff831b8000 D machine +ffffffff831b8008 D lid_action +ffffffff831b800c D pwr_action +ffffffff831b8010 D isa_constraint +ffffffff831b8020 D dma_constraint +ffffffff831b8030 D uvm_md_constraints +ffffffff831b8048 D delay_func +ffffffff831b8050 D initclock_func +ffffffff831b8058 D bootinfo_size +ffffffff831b805c D waittime +ffffffff831b8060 D dumpmag +ffffffff831b9000 D tsc_rdtsc +ffffffff831b9008 D tsc_timecounter +ffffffff831b9058 D tsc_is_synchronized +ffffffff831ba000 D local_apic +ffffffff831ba020 D lapic_id +ffffffff831ba080 D lapic_tpr +ffffffff831ba0a0 d lapic_ppr +ffffffff831ba100 d lapic_isr +ffffffff831bb000 D warn_once +ffffffff831bc000 d errata +ffffffff831bd000 D cpu_ucode_intel_mtx +ffffffff831be000 D mem_owner_bios +ffffffff831be008 D mrops +ffffffff831be028 D mtrrmask +ffffffff831be030 D mtrrtomrt +ffffffff831bf000 D pmap_pg_wc +ffffffff831bf008 D pmaps_lock +ffffffff831bf018 d pmap_maxkvaddr +ffffffff831c0000 D kv_physwait +ffffffff831c1000 D fpu_save_len +ffffffff831c2000 D i8259_pic +ffffffff831c3000 D softintr_pic +ffffffff831c4000 D ipifunc +ffffffff831c5000 D setperf_mp_mutex +ffffffff831c6000 D db_Grp6 +ffffffff831c6040 D db_Grp7 +ffffffff831c6100 D db_Grp8 +ffffffff831c6140 D db_Grp9 +ffffffff831c6200 D db_GrpA +ffffffff831c6240 D db_GrpB +ffffffff831c6280 D db_GrpC +ffffffff831c62c0 D db_inst_0f0x +ffffffff831c6440 D db_inst_0f2x +ffffffff831c65c0 D db_inst_0f3x +ffffffff831c6740 D db_inst_0f8x +ffffffff831c68c0 D db_inst_0f9x +ffffffff831c6a40 D db_inst_0fax +ffffffff831c6bc0 D db_inst_0fbx +ffffffff831c6d40 D db_inst_0fcx +ffffffff831c6ec0 D db_inst_0f +ffffffff831c6f40 D db_Esc92 +ffffffff831c6f80 D db_Esc94 +ffffffff831c6fc0 D db_Esc95 +ffffffff831c7000 D db_Esc96 +ffffffff831c7040 D db_Esc97 +ffffffff831c7080 D db_Esca5 +ffffffff831c70c0 D db_Escb4 +ffffffff831c7100 D db_Esce3 +ffffffff831c7140 D db_Escf4 +ffffffff831c7180 D db_Esc8 +ffffffff831c7240 D db_Esc9 +ffffffff831c7300 D db_Esca +ffffffff831c73c0 D db_Escb +ffffffff831c7480 D db_Escc +ffffffff831c7540 D db_Escd +ffffffff831c7600 D db_Esce +ffffffff831c76c0 D db_Escf +ffffffff831c7780 D db_Esc_inst +ffffffff831c77c0 D db_Grp1 +ffffffff831c7800 D db_Grp2 +ffffffff831c7840 D db_Grp3 +ffffffff831c7900 D db_Grp4 +ffffffff831c79c0 D db_Grp5 +ffffffff831c7a80 D db_inst_table +ffffffff831c9280 D db_bad_inst +ffffffff831c92a0 D db_index_reg_16 +ffffffff831c92e0 D db_reg +ffffffff831c94e0 D db_seg_reg +ffffffff831c9520 D db_lengths +ffffffff831ca000 D db_regs +ffffffff831ca1e0 D db_eregs +ffffffff831ca1f0 D db_reg_args +ffffffff831cb000 D timer_mutex +ffffffff831cb010 d i8254_timecounter +ffffffff831cc000 D spleen8x16 +ffffffff831cc058 D spleen12x24 +ffffffff831cc0b0 D spleen16x32 +ffffffff831cc108 D spleen32x64 +ffffffff831cc160 d builtin_fonts +ffffffff831cc1e0 d wsfont_add.cookiegen +ffffffff831cc1f0 d spleen8x16_data +ffffffff831ccff0 d spleen12x24_data +ffffffff831cf9f0 d spleen16x32_data +ffffffff831d31f0 d spleen32x64_data +ffffffff831e2000 D nsphy_cd +ffffffff831e3000 D nsphyter_cd +ffffffff831e4000 D gentbi_cd +ffffffff831e5000 D qsphy_cd +ffffffff831e6000 D inphy_cd +ffffffff831e7000 D iophy_cd +ffffffff831e8000 D eephy_cd +ffffffff831e9000 D exphy_cd +ffffffff831ea000 D rlphy_cd +ffffffff831eb000 D lxtphy_cd +ffffffff831ec000 D luphy_cd +ffffffff831ed000 D mtdphy_cd +ffffffff831ee000 D icsphy_cd +ffffffff831ef000 D sqphy_cd +ffffffff831f0000 D tqphy_cd +ffffffff831f1000 D ukphy_cd +ffffffff831f2000 D dcphy_cd +ffffffff831f3000 D bmtphy_cd +ffffffff831f4000 D brgphy_cd +ffffffff831f5000 D xmphy_cd +ffffffff831f6000 D amphy_cd +ffffffff831f7000 D acphy_cd +ffffffff831f8000 D nsgphy_cd +ffffffff831f9000 D urlphy_cd +ffffffff831fa000 D rgephy_cd +ffffffff831fb000 D ciphy_cd +ffffffff831fc000 D ipgphy_cd +ffffffff831fd000 D etphy_cd +ffffffff831fe000 D jmphy_cd +ffffffff831ff000 D atphy_cd +ffffffff83200000 D scsi_autoconf +ffffffff83200008 D scsibus_cd +ffffffff83201000 D cd_cd +ffffffff83202000 D ch_cd +ffffffff83202020 D chquirks +ffffffff83203000 D sd_cd +ffffffff83204000 D st_cd +ffffffff83205000 D uk_cd +ffffffff83206000 D safte_cd +ffffffff83207000 D ses_cd +ffffffff83208000 D sym_cd +ffffffff83208020 D sym_devices +ffffffff83208070 D asym_devices +ffffffff83209000 D rdac_cd +ffffffff83209020 D rdac_devices +ffffffff8320a000 D emc_cd +ffffffff8320a020 D emc_devices +ffffffff8320b000 D hds_cd +ffffffff8320b020 D hds_devices +ffffffff8320c000 D atapiscsi_cd +ffffffff8320d000 D wd_cd +ffffffff8320d020 d wddumpmulti +ffffffff8320e000 D mainbus_cd +ffffffff8320e020 D mba_iba +ffffffff8320f000 D bios_cd +ffffffff8320f020 D smbios_uninfo +ffffffff83210000 D mpbios_cd +ffffffff83210020 d mp_conf +ffffffff83210070 d extint_bus +ffffffff832100a0 d smi_bus +ffffffff832100d0 d nmi_bus +ffffffff83211000 D cpu_info_full_primary +ffffffff83214000 D cpu_info_list +ffffffff83214008 D mp_cpu_funcs +ffffffff83214020 D cpu_cd +ffffffff83214040 D cpu_info +ffffffff83215000 D local_pic +ffffffff83215090 D lapic_readreg +ffffffff83215098 D lapic_writereg +ffffffff832150a0 D x86_ipi +ffffffff83216000 D ioapic_cold +ffffffff83216008 D ioapic_cd +ffffffff83217000 D efifb_std_descr +ffffffff83217030 D efifb_descrs +ffffffff83217038 D efifb_accessops +ffffffff83217098 D efifb_cd +ffffffff83218000 D pvbus_cd +ffffffff83218020 D pvbus_types +ffffffff832180e0 D pvbus_dma_tag +ffffffff83219000 D pvclock_cd +ffffffff83219020 D pvclock_timecounter +ffffffff8321a000 D vmt_tclo_rpc +ffffffff8321a0d0 D vmt_cd +ffffffff8321b000 D xen_cd +ffffffff8321b020 D xen_bus_dma_tag +ffffffff8321c000 D xnf_cd +ffffffff8321d000 D xbf_cd +ffffffff8321e000 D hv_msg_dispatch +ffffffff8321e110 D hv_timecounter +ffffffff8321e160 D hyperv_cd +ffffffff8321f000 d hv_ic_devs +ffffffff83220000 D hvn_cd +ffffffff83221000 D hvs_cd +ffffffff83222000 D virtio_cd +ffffffff83223000 D vio_cd +ffffffff83224000 D vioblk_cd +ffffffff83225000 D viomb_cd +ffffffff83226000 D viornd_cd +ffffffff83227000 D vioscsi_cd +ffffffff83228000 D vmmci_cd +ffffffff83229000 D pci_cd +ffffffff8322a000 D arc_fw_hdr +ffffffff8322a008 D arc_cd +ffffffff8322b000 D jmb_cd +ffffffff8322c000 D mfii_cd +ffffffff8322d000 D ips_cd +ffffffff8322e000 D eap_cd +ffffffff8322f000 D auacer_cd +ffffffff83230000 D auich_cd +ffffffff83231000 D azalia_cd +ffffffff83232000 D envy_cd +ffffffff83232020 D envy_matchids +ffffffff83232030 D envy_rates +ffffffff832320b0 D ak4524_dac +ffffffff832320d8 D ak4524_adc +ffffffff83232100 D ak4358_dac +ffffffff83232128 D ak5365_adc +ffffffff83232150 D unkenvy_codec +ffffffff83232180 D envy_cards +ffffffff832323f0 D envy_cards_ht +ffffffff83232600 d julia_eeprom +ffffffff83233000 D emu_cd +ffffffff83234000 D auixp_cd +ffffffff83235000 D clcs_cd +ffffffff83236000 D yds_cd +ffffffff83237000 D auvia_cd +ffffffff83238000 D qle_cd +ffffffff83239000 D mpii_cd +ffffffff8323a000 D aq_cd +ffffffff8323b000 D de_cd +ffffffff8323c000 D pcn_cd +ffffffff8323d000 D wdc_sii3114_vtbl +ffffffff8323d038 D wdc_pdc203xx_vtbl +ffffffff8323d070 D wdc_svwsata_vtbl +ffffffff8323d0a8 D pciide_cd +ffffffff8323d0d0 d sis_hostbr_type +ffffffff8323e000 D ppb_cd +ffffffff8323f000 D vr_cd +ffffffff8323f020 D vr_devices +ffffffff83240000 D txp_cd +ffffffff83241000 D bt848_card_signature +ffffffff83242000 D bktr_cd +ffffffff83243000 D em_cd +ffffffff83244000 D ixgb_cd +ffffffff83245000 D ix_cd +ffffffff83245020 D ixgbe_smart_speed +ffffffff83245024 D ixgbe_enable_msix +ffffffff83246000 D ixl_cd +ffffffff83246020 d ixl_sff_lock +ffffffff83247000 D xge_cd +ffffffff83248000 D thtc_cd +ffffffff83248020 D tht_cd +ffffffff83248040 D tht_txt_desc +ffffffff83248068 D tht_rxf_desc +ffffffff83248090 D tht_rxd_desc +ffffffff832480b8 D tht_txf_desc +ffffffff83249000 D myx_cd +ffffffff8324a000 D oce_cd +ffffffff8324b000 D dc_devs +ffffffff8324c000 D cas_cd +ffffffff8324d000 D sis_cd +ffffffff8324e000 D se_cd +ffffffff8324f000 D cbb_cd +ffffffff8324f020 D yc_chipsets +ffffffff8324f1b0 d pccbb_funcs +ffffffff8324f1e0 d pccbb_pcmcia_funcs +ffffffff83250000 D skc_cd +ffffffff83250020 D sk_cd +ffffffff83251000 D mskc_cd +ffffffff83251020 D msk_cd +ffffffff83252000 D puc_cd +ffffffff83253000 D puc_ndevs +ffffffff83254000 D iwi_cd +ffffffff83255000 D wpi_cd +ffffffff83256000 D iwn_cd +ffffffff83257000 D iwm_cd +ffffffff83258000 D iwx_cd +ffffffff83259000 D cmpci_cd +ffffffff8325a000 D iha_cd +ffffffff8325b000 D pcscp_cd +ffffffff8325b020 D pcscp_glue +ffffffff8325c000 D bge_cd +ffffffff8325d000 D bnx_firmwares +ffffffff8325d160 D bnx_rv2ps +ffffffff8325d1c0 D bnx_cd +ffffffff8325d1e0 d flash_5709 +ffffffff8325d210 d flash_table +ffffffff8325e000 D vge_cd +ffffffff8325f000 D stge_cd +ffffffff83260000 D nfe_cd +ffffffff83261000 D et_cd +ffffffff83262000 D jme_cd +ffffffff83263000 D age_cd +ffffffff83264000 D alc_dma_burst +ffffffff83264020 D alc_cd +ffffffff83265000 D ale_cd +ffffffff83266000 D amdpm_cd +ffffffff83266020 d amdpm_timecounter +ffffffff83267000 D bce_cd +ffffffff83268000 D rtwn_cd +ffffffff83269000 d ral_rt2560_opns +ffffffff83269028 d ral_rt2661_opns +ffffffff83269050 d ral_rt2860_opns +ffffffff8326a000 D piixpm_cd +ffffffff8326b000 D vic_cd +ffffffff8326c000 D vmx_cd +ffffffff8326d000 D vmwpvs_cd +ffffffff8326e000 D lii_cd +ffffffff8326f000 D ichiic_cd +ffffffff83270000 D viapm_cd +ffffffff83270020 d viapm_timecounter +ffffffff83271000 D amdiic_cd +ffffffff83272000 D nviic_cd +ffffffff83273000 D kate_cd +ffffffff83274000 D km_cd +ffffffff83275000 D cpu_model_offsets +ffffffff83275070 D ksmn_cd +ffffffff83276000 D itherm_cd +ffffffff83277000 D pchtemp_cd +ffffffff83278000 D xspd_cd +ffffffff83279000 D virtio_pci_ops +ffffffff8327a000 D bwfm_pci_buscore_ops +ffffffff8327a030 D bwfm_pci_bus_ops +ffffffff8327a058 D bwfm_pci_msgbuf_ops +ffffffff8327b000 D bnxt_cd +ffffffff8327c000 D mcx_cd +ffffffff8327d000 D iavf_cd +ffffffff8327e000 D rge_cd +ffffffff8327f000 D igc_cd +ffffffff83280000 D ngbe_cd +ffffffff83281000 D agp_cd +ffffffff83282000 D intagp_cd +ffffffff83282020 D agp_i810_methods +ffffffff83283000 D reservation_ww_class +ffffffff83284000 d bridge_lock +ffffffff83284010 d bridge_list +ffffffff83285000 d drm_connector_enum_list +ffffffff832851f8 d connector_list_lock +ffffffff83285208 d connector_list +ffffffff83286000 d kernel_fb_helper_list +ffffffff83286010 d kernel_fb_helper_lock +ffffffff83287000 D drm_global_mutex +ffffffff83288000 D sch_mtx +ffffffff83288010 D i2c_bit_algo +ffffffff83288020 d drm_fence_context_count +ffffffff83288028 d dma_fence_stub_mtx +ffffffff83288038 D wait_bit_mtx +ffffffff83288048 D shrinkers +ffffffff83289000 d crtc_ww_class +ffffffff8328a000 d panel_lock +ffffffff8328a010 d panel_list +ffffffff8328b000 d ttm_global_mutex +ffffffff8328c000 D intel_bbops +ffffffff8328d000 d i915_sys_placement +ffffffff8328d020 d i915_ttm_bo_driver +ffffffff8328e000 d mchdev_lock +ffffffff8328f000 D inteldrm_stdscreen +ffffffff8328f030 D inteldrm_scrlist +ffffffff8328f038 D inteldrm_screenlist +ffffffff8328f048 D inteldrm_accessops +ffffffff8328f0a8 D inteldrm_cd +ffffffff83290000 d capture_mutex +ffffffff83291000 d mitigations +ffffffff83292000 D i915_modparams +ffffffff83293000 d schedule_lock +ffffffff83294000 d unbind_fence_ops +ffffffff83295000 D intel_graphics_stolen_res +ffffffff83296000 D btc_valid_sclk +ffffffff83297000 d evergreen_cs_packet_parse_vline.vline_start_end +ffffffff83297020 d evergreen_cs_packet_parse_vline.vline_status +ffffffff83298000 d r600_cs_packet_parse_vline.vline_start_end +ffffffff83298008 d r600_cs_packet_parse_vline.vline_status +ffffffff83299000 d r100_asic +ffffffff832992e0 d r200_asic +ffffffff832995c0 d r300_asic_pcie +ffffffff832998a0 d r300_asic +ffffffff83299b80 d r420_asic +ffffffff83299e60 d rs400_asic +ffffffff8329a140 d rs600_asic +ffffffff8329a420 d rs690_asic +ffffffff8329a700 d rv515_asic +ffffffff8329a9e0 d r520_asic +ffffffff8329acc0 d r600_asic +ffffffff8329afa0 d rv6xx_asic +ffffffff8329b280 d rs780_asic +ffffffff8329b560 d rv770_asic +ffffffff8329b840 d evergreen_asic +ffffffff8329bb20 d sumo_asic +ffffffff8329be00 d btc_asic +ffffffff8329c0e0 d cayman_asic +ffffffff8329c3c0 d trinity_asic +ffffffff8329c6a0 d si_asic +ffffffff8329c980 d ci_asic +ffffffff8329cc60 d kv_asic +ffffffff8329d000 d dce6_funcs +ffffffff8329d018 d dce6_hdmi_funcs +ffffffff8329d088 d dce6_dp_funcs +ffffffff8329d0f8 d dce4_funcs +ffffffff8329d110 d dce4_hdmi_funcs +ffffffff8329d180 d dce4_dp_funcs +ffffffff8329d1f0 d dce32_funcs +ffffffff8329d208 d dce32_hdmi_funcs +ffffffff8329d278 d dce32_dp_funcs +ffffffff8329d2e8 d r600_funcs +ffffffff8329d300 d r600_hdmi_funcs +ffffffff8329e000 D radeon_modeset +ffffffff8329e004 D radeon_dynclks +ffffffff8329e008 D radeon_agpmode +ffffffff8329e00c D radeon_gart_size +ffffffff8329e010 D radeon_tv +ffffffff8329e014 D radeon_audio +ffffffff8329e018 D radeon_pcie_gen2 +ffffffff8329e01c D radeon_msi +ffffffff8329e020 D radeon_lockup_timeout +ffffffff8329e024 D radeon_dpm +ffffffff8329e028 D radeon_aspm +ffffffff8329e02c D radeon_runtime_pm +ffffffff8329e030 D radeon_vm_size +ffffffff8329e034 D radeon_vm_block_size +ffffffff8329e038 D radeon_use_pflipirq +ffffffff8329e03c D radeon_bapm +ffffffff8329e040 D radeon_backlight +ffffffff8329e044 D radeon_auxch +ffffffff8329e048 D radeon_uvd +ffffffff8329e04c D radeon_vce +ffffffff8329e050 D radeon_si_support +ffffffff8329e054 D radeon_cik_support +ffffffff8329e058 D radeondrm_cd +ffffffff8329e078 D radeondrm_stdscreen +ffffffff8329e0a8 D radeondrm_scrlist +ffffffff8329e0b0 D radeondrm_screenlist +ffffffff8329e0c0 D radeondrm_accessops +ffffffff8329f000 D radeon_bbops +ffffffff832a0000 d radeon_bo_driver +ffffffff832a1000 d verde_pg_init +ffffffff832a2000 d cac_weights_pitcairn +ffffffff832a24d0 d cac_weights_oland +ffffffff832a3000 d aldebaran_mode2_handler +ffffffff832a4000 d amdgpu_vbios_version_attrs +ffffffff832a5000 D amdgpu_asic_name +ffffffff832a6000 D amdgpu_gart_size +ffffffff832a6004 D amdgpu_gtt_size +ffffffff832a6008 D amdgpu_moverate +ffffffff832a600c D amdgpu_audio +ffffffff832a6010 D amdgpu_pcie_gen2 +ffffffff832a6014 D amdgpu_msi +ffffffff832a6018 D amdgpu_dpm +ffffffff832a601c D amdgpu_fw_load_type +ffffffff832a6020 D amdgpu_aspm +ffffffff832a6024 D amdgpu_runtime_pm +ffffffff832a6028 D amdgpu_ip_block_mask +ffffffff832a602c D amdgpu_bapm +ffffffff832a6030 D amdgpu_vm_size +ffffffff832a6034 D amdgpu_vm_fragment_size +ffffffff832a6038 D amdgpu_vm_block_size +ffffffff832a603c D amdgpu_vm_update_mode +ffffffff832a6040 D amdgpu_dc +ffffffff832a6044 D amdgpu_sched_jobs +ffffffff832a6048 D amdgpu_sched_hw_submission +ffffffff832a6050 D amdgpu_cg_mask +ffffffff832a6058 D amdgpu_pg_mask +ffffffff832a605c D amdgpu_sdma_phase_quantum +ffffffff832a6060 D amdgpu_pp_feature_mask +ffffffff832a6064 D amdgpu_lbpw +ffffffff832a6068 D amdgpu_compute_multipipe +ffffffff832a606c D amdgpu_gpu_recovery +ffffffff832a6070 D amdgpu_smu_pptable_id +ffffffff832a6074 D amdgpu_dc_feature_mask +ffffffff832a6078 D amdgpu_async_gfx_ring +ffffffff832a607c D amdgpu_discovery +ffffffff832a6080 D amdgpu_noretry +ffffffff832a6084 D amdgpu_force_asic_type +ffffffff832a6088 D amdgpu_tmz +ffffffff832a608c D amdgpu_reset_method +ffffffff832a6090 D amdgpu_num_kcq +ffffffff832a6094 D amdgpu_use_xgmi_p2p +ffffffff832a6098 D mgpu_info +ffffffff832a6248 D amdgpu_ras_enable +ffffffff832a624c D amdgpu_ras_mask +ffffffff832a6250 D amdgpu_bad_page_threshold +ffffffff832a6254 D amdgpu_backlight +ffffffff832a6258 D amdgpu_cd +ffffffff832a6278 D amdgpu_stdscreen +ffffffff832a62a8 D amdgpu_scrlist +ffffffff832a62b0 D amdgpu_screenlist +ffffffff832a62c0 D amdgpu_accessops +ffffffff832a7000 d amdgpu_gtt_mgr_attributes +ffffffff832a8000 D amdgpu_bbops +ffffffff832a9000 D soc15_ih_clientid_name +ffffffff832aa000 D ras_error_string +ffffffff832aa030 D ras_block_string +ffffffff832aa0c0 D ras_mca_block_string +ffffffff832ab000 d amdgpu_bo_driver +ffffffff832ac000 d amdgpu_vram_mgr_attributes +ffffffff832ad000 D amdgpu_xgmi_hive_type +ffffffff832ad008 d xgmi_mutex +ffffffff832ad018 D xgmi_ras_hw_ops +ffffffff832ad058 D xgmi_ras +ffffffff832ae000 d gfx_v9_0_ras +ffffffff832af000 D gfx_v9_4_ras +ffffffff832b0000 D gfx_v9_4_2_ras_ops +ffffffff832b0040 D gfx_v9_4_2_ras +ffffffff832b1000 D hdp_v4_0_ras_hw_ops +ffffffff832b1040 D hdp_v4_0_ras +ffffffff832b2000 d jpeg_v2_6_ras +ffffffff832b3000 D mca_v3_0_mp0_ras +ffffffff832b3058 D mca_v3_0_mp1_ras +ffffffff832b30b0 D mca_v3_0_mpio_ras +ffffffff832b4000 D mmhub_v1_0_ras_hw_ops +ffffffff832b4040 D mmhub_v1_0_ras +ffffffff832b5000 D mmhub_v1_7_ras_hw_ops +ffffffff832b5040 D mmhub_v1_7_ras +ffffffff832b6000 D mmhub_v9_4_ras +ffffffff832b7000 D nbio_v7_4_ras +ffffffff832b8000 d sriov_sc_video_codecs_encode +ffffffff832b8010 d sriov_sc_video_codecs_decode +ffffffff832b8020 d sriov_sc_video_codecs_encode_array +ffffffff832b8050 d sriov_sc_video_codecs_decode_array +ffffffff832b9000 d sdma_v4_0_ras +ffffffff832ba000 D sdma_v4_4_ras +ffffffff832bb000 d sienna_cichlid_mode2_handler +ffffffff832bc000 D umc_v6_1_ras +ffffffff832bd000 D umc_v6_7_ras +ffffffff832be000 D umc_v8_10_ras +ffffffff832bf000 D umc_v8_7_ras +ffffffff832c0000 d vcn_v2_6_ras +ffffffff832c1000 d amdgpu_dm_mode_config_helperfuncs +ffffffff832c1010 d dm_atomic_state_funcs +ffffffff832c2000 d construct_integrated_info.result +ffffffff832c2004 d bios_parser_get_firmware_info.result +ffffffff832c3000 d dce_funcs +ffffffff832c4000 d dce110_funcs +ffffffff832c5000 d dce112_funcs +ffffffff832c6000 d dce120_funcs +ffffffff832c7000 d rv1_clk_funcs +ffffffff832c7088 d rv1_clk_internal_funcs +ffffffff832c8000 d rv2_clk_internal_funcs +ffffffff832c9000 d dcn2_funcs +ffffffff832ca000 D dcn201_funcs +ffffffff832cb000 d dcn21_funcs +ffffffff832cb088 d rn_bw_params +ffffffff832cc000 D dcn3_fpga_funcs +ffffffff832cc088 d dcn3_funcs +ffffffff832cd000 d vg_funcs +ffffffff832cd088 d dummy_clocks +ffffffff832cd1b8 d vg_bw_params +ffffffff832ce000 d dcn31_bw_params +ffffffff832ce2a0 d dcn31_funcs +ffffffff832cf000 d dcn314_bw_params +ffffffff832cf2a0 d dcn314_funcs +ffffffff832d0000 d dcn315_funcs +ffffffff832d0088 d dcn315_bw_params +ffffffff832d1000 d dcn316_funcs +ffffffff832d1088 d dcn316_bw_params +ffffffff832d2000 d dcn32_funcs +ffffffff832d3000 d dcn10_dpp_cap +ffffffff832d4000 D aperture_default_system +ffffffff832d5000 d dcn20_dpp_cap +ffffffff832d5010 d dcn20_dpp_funcs +ffffffff832d6000 d dcn20_hubp_funcs +ffffffff832d7000 d dcn20_opp_funcs +ffffffff832d8000 d dcn20_tg_funcs +ffffffff832d9000 d dcn201_dpp_funcs +ffffffff832d9110 d dcn201_dpp_cap +ffffffff832da000 d dcn201_hubp_funcs +ffffffff832db000 d dcn201_opp_funcs +ffffffff832dc000 d dcn201_tg_funcs +ffffffff832dd000 D dcn201_ip +ffffffff832dd1b8 D dcn201_soc +ffffffff832ddb88 d dcn201_res_pool_funcs +ffffffff832de000 d dcn21_hubp_funcs +ffffffff832df000 d dcn30_afmt_funcs +ffffffff832e0000 d dcn30_dpp_cap +ffffffff832e0010 d dcn30_dpp_funcs +ffffffff832e1000 d dcn30_hubp_funcs +ffffffff832e2000 d dcn30_tg_funcs +ffffffff832e3000 d dcn30_vpg_funcs +ffffffff832e4000 d res_cap_dcn301 +ffffffff832e4040 d dcn301_res_pool_funcs +ffffffff832e5000 d dcn302_res_pool_funcs +ffffffff832e6000 d dcn303_res_pool_funcs +ffffffff832e7000 d dcn31_afmt_funcs +ffffffff832e8000 d dcn31_apg_funcs +ffffffff832e9000 d dcn31_hpo_dp_link_encoder_funcs +ffffffff832ea000 d dcn31_hubp_funcs +ffffffff832eb000 d dcn31_tg_funcs +ffffffff832ec000 d dcn31_res_pool_funcs +ffffffff832ed000 d dcn31_vpg_funcs +ffffffff832ee000 d dcn314_tg_funcs +ffffffff832ef000 d dcn314_res_pool_funcs +ffffffff832f0000 d dcn315_res_pool_funcs +ffffffff832f1000 d dcn316_res_pool_funcs +ffffffff832f2000 d dcn32_dpp_funcs +ffffffff832f2110 d dcn32_dpp_cap +ffffffff832f3000 d dcn32_hpo_dp_link_encoder_funcs +ffffffff832f4000 d dcn32_hubp_funcs +ffffffff832f5000 d dcn32_tg_funcs +ffffffff832f6000 d dcn32_res_pool_funcs +ffffffff832f7000 d dcn321_res_pool_funcs +ffffffff832f8000 D dcn1_0_ip +ffffffff832f81b8 D dcn1_0_soc +ffffffff832f9000 D dcn2_0_ip +ffffffff832f91b8 D dcn2_0_nv14_ip +ffffffff832f9370 D dcn2_0_soc +ffffffff832f9d40 D dcn2_0_nv14_soc +ffffffff832fa710 D dcn2_1_ip +ffffffff832fa8c8 D dcn2_1_soc +ffffffff832fb298 D ddr4_wm_table_gs +ffffffff832fb358 D lpddr4_wm_table_gs +ffffffff832fb418 D lpddr4_wm_table_with_disabled_ppt +ffffffff832fb4d8 D ddr4_wm_table_rn +ffffffff832fb598 D ddr4_1R_wm_table_rn +ffffffff832fb658 D lpddr4_wm_table_rn +ffffffff832fc000 D dcn3_0_ip +ffffffff832fc1b8 D dcn3_0_soc +ffffffff832fd000 D dcn3_01_ip +ffffffff832fd1b8 D dcn3_01_soc +ffffffff832fdb88 D ddr4_wm_table +ffffffff832fdc48 D lpddr5_wm_table +ffffffff832fe000 D dcn3_02_ip +ffffffff832fe1b8 D dcn3_02_soc +ffffffff832ff000 D dcn3_03_ip +ffffffff832ff1b8 D dcn3_03_soc +ffffffff83300000 D dcn3_1_ip +ffffffff833001b8 D dcn3_15_ip +ffffffff83300370 D dcn3_16_ip +ffffffff83300528 d dcn3_15_soc +ffffffff83300ef8 d dcn3_1_soc +ffffffff833018c8 d dcn3_16_soc +ffffffff83303000 D dcn3_14_ip +ffffffff833031b8 D dcn3_14_soc +ffffffff83304000 D dcn3_2_ip +ffffffff833041b8 D dcn3_2_soc +ffffffff83305000 D dcn3_21_ip +ffffffff833051b8 D dcn3_21_soc +ffffffff83306000 d dsc_policy_max_target_bpp_limit +ffffffff83307000 D DIDTEDCConfig_P12 +ffffffff83307070 d smu7_profiling +ffffffff83308000 d cyan_skillfish_table_map +ffffffff83308080 d cyan_skillfish_message_map +ffffffff83309000 d navi10_table_map +ffffffff83309080 d navi10_pwr_src_map +ffffffff83309090 d navi10_workload_map +ffffffff833090d0 d navi10_message_map +ffffffff83309b20 d navi10_clk_map +ffffffff83309be0 d navi10_feature_mask_map +ffffffff8330a000 d sienna_cichlid_message_map +ffffffff8330aa50 d sienna_cichlid_table_map +ffffffff8330aad0 d sienna_cichlid_pwr_src_map +ffffffff8330aae0 d sienna_cichlid_workload_map +ffffffff8330ab20 d sienna_cichlid_clk_map +ffffffff8330abe0 d sienna_cichlid_feature_mask_map +ffffffff8330b000 d vangogh_message_map +ffffffff8330ba50 d vangogh_table_map +ffffffff8330bad0 d vangogh_workload_map +ffffffff8330bb10 d vangogh_feature_mask_map +ffffffff8330c000 d renoir_table_map +ffffffff8330c080 d renoir_workload_map +ffffffff8330c0c0 d renoir_message_map +ffffffff8330cb10 d renoir_clk_map +ffffffff8330d000 d smu_v13_0_0_message_map +ffffffff8330da50 d smu_v13_0_0_feature_mask_map +ffffffff8330de20 d smu_v13_0_0_table_map +ffffffff8330dea0 d smu_v13_0_0_pwr_src_map +ffffffff8330deb0 d smu_v13_0_0_workload_map +ffffffff8330def0 d smu_v13_0_0_clk_map +ffffffff8330e000 d smu_v13_0_4_message_map +ffffffff8330ea50 d smu_v13_0_4_table_map +ffffffff8330ead0 d smu_v13_0_4_feature_mask_map +ffffffff8330f000 d smu_v13_0_5_table_map +ffffffff8330f080 d smu_v13_0_5_message_map +ffffffff8330fad0 d smu_v13_0_5_feature_mask_map +ffffffff83310000 d smu_v13_0_7_message_map +ffffffff83310a50 d smu_v13_0_7_feature_mask_map +ffffffff83310e20 d smu_v13_0_7_table_map +ffffffff83310ea0 d smu_v13_0_7_pwr_src_map +ffffffff83310eb0 d smu_v13_0_7_workload_map +ffffffff83310ef0 d smu_v13_0_7_clk_map +ffffffff83311000 d yellow_carp_table_map +ffffffff83311080 d yellow_carp_message_map +ffffffff83311ad0 d yellow_carp_feature_mask_map +ffffffff83312000 D pci_conf_lock +ffffffff83312010 D pci_bus_dma_tag +ffffffff83312088 D msi_pic +ffffffff83312118 D msix_pic +ffffffff83313000 D pchb_cd +ffffffff83314000 D amas_cd +ffffffff83315000 D cardslot_cd +ffffffff83316000 D cardbus_cd +ffffffff83317000 d csdevs +ffffffff83318000 d ral_rt2560_opns +ffffffff83318028 d ral_rt2661_opns +ffffffff83318050 d ral_rt2860_opns +ffffffff83319000 D pcmcia_cd +ffffffff8331a000 D pcmcia_3cxem556_func0 +ffffffff8331a0b8 D pcmcia_3cxem556_func0_cfe0 +ffffffff8331a158 D pcmcia_megahertz_xjem1144_func0 +ffffffff8331a210 D pcmcia_megahertz_xjem1144_func0_cfe0 +ffffffff8331a2b0 d pcmcia_3cxem556_func1 +ffffffff8331a368 d pcmcia_3cxem556_func1_cfe0 +ffffffff8331a408 d pcmcia_megahertz_xjem1144_func1 +ffffffff8331a4c0 d pcmcia_megahertz_xjem1144_func1_cfe0 +ffffffff8331a560 d pcmcia_sierra_a555_func1 +ffffffff8331a618 d pcmcia_sierra_a555_func1_cfe0 +ffffffff8331a6b8 d pcmcia_sveclancard_func0 +ffffffff8331a770 d pcmcia_sveclancard_func0_cfe0 +ffffffff8331b000 D ep_pcmcia_prod +ffffffff8331c000 D aic_pcmcia_prod +ffffffff8331d000 D com_pcmcia_prod +ffffffff8331e000 D wdc_pcmcia_pr +ffffffff8331f000 D sm_pcmcia_prod +ffffffff83320000 D xe_cd +ffffffff83321000 D pcib_cd +ffffffff83322000 D amdpcib_cd +ffffffff83323000 D tcpcib_cd +ffffffff83324000 D aapic_cd +ffffffff83325000 D hme_cd +ffffffff83326000 D isa_cd +ffffffff83327000 D isadma_cd +ffffffff83328000 D fdc_cd +ffffffff83329000 D fd_types +ffffffff833291f8 D fd_cd +ffffffff8332a000 D mpu_cd +ffffffff8332b000 D pcppi_cd +ffffffff8332c000 D spkr_cd +ffffffff8332d000 D wbsio_cd +ffffffff8332e000 D schsio_cd +ffffffff8332f000 D it_cd +ffffffff83330000 D uguru_cd +ffffffff83331000 D aps_cd +ffffffff83332000 D isa_bus_dma_tag +ffffffff83333000 D wsdisplay_cd +ffffffff83333020 D wsdisplay_cons +ffffffff83333058 D wsdisplay_defaultscreens +ffffffff83334000 D wskbd_cd +ffffffff83334020 D wskbd_default_bell_data +ffffffff83334030 D wskbd_default_keyrepeat_data +ffffffff83334040 D wskbd_srcops +ffffffff83335000 d compose_tab +ffffffff83336000 D wsmouse_cd +ffffffff83336020 D wsmouse_srcops +ffffffff83337000 D wsmux_srcops +ffffffff83337030 D wsmux_tree_lock +ffffffff83338000 D vt100_output +ffffffff83339000 D pckbd_cd +ffffffff8333a000 D pms_cd +ffffffff8333a020 d synaptics_params +ffffffff8333a030 d alps_params +ffffffff8333b000 D skgpio_cd +ffffffff8333c000 D pctr_conf_lock +ffffffff8333d000 D ukbd_keymapdata +ffffffff8333e000 D usbrev_str +ffffffff8333e030 D usb_cd +ffffffff8333f000 d usbd_ratecheck.errinterval +ffffffff83340000 D uhub_cd +ffffffff83341000 D uaudio_cd +ffffffff83342000 D uvideo_ctrls +ffffffff833422d8 D uvideo_cd +ffffffff83343000 D utvfu_norm_params +ffffffff83343030 D utvfu_cd +ffffffff83344000 D udl_reg_vals_640x480_60 +ffffffff83344020 D udl_reg_vals_640x480_67 +ffffffff83344040 D udl_reg_vals_640x480_72 +ffffffff83344060 D udl_reg_vals_640x480_75 +ffffffff83344080 D udl_reg_vals_800x480_61 +ffffffff833440a0 D udl_reg_vals_800x600_56 +ffffffff833440c0 D udl_reg_vals_800x600_60 +ffffffff833440e0 D udl_reg_vals_800x600_72 +ffffffff83344100 D udl_reg_vals_800x600_74 +ffffffff83344120 D udl_reg_vals_800x600_75 +ffffffff83344140 D udl_reg_vals_1024x768_60 +ffffffff83344160 D udl_reg_vals_1024x768_70 +ffffffff83344180 D udl_reg_vals_1024x768_75 +ffffffff833441a0 D udl_reg_vals_1280x800_60 +ffffffff833441c0 D udl_reg_vals_1280x960_60 +ffffffff833441e0 D udl_reg_vals_1280x1024_60 +ffffffff83344200 D udl_reg_vals_1280x1024_75 +ffffffff83344220 D udl_reg_vals_1366x768_60 +ffffffff83344240 D udl_reg_vals_1440x900_60 +ffffffff83344260 D udl_reg_vals_1440x900_59 +ffffffff83344280 D udl_reg_vals_1440x900_75 +ffffffff833442a0 D udl_reg_vals_1680x1050_60 +ffffffff833442c0 D udl_reg_vals_1600x1200_60 +ffffffff833442e0 D udl_reg_vals_1920x1080_60 +ffffffff83344300 D udl_null_key_1 +ffffffff83344310 D udl_decomp_table +ffffffff83345510 D udl_cd +ffffffff83345530 D udl_stdscreen +ffffffff83345560 D udl_scrlist +ffffffff83345568 D udl_screenlist +ffffffff83345578 D udl_accessops +ffffffff83346000 D umidi_cd +ffffffff83347000 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE +ffffffff83347020 d umq_ROLAND_ROLAND_UM1_2 +ffffffff83347040 d umq_ROLAND_ROLAND_SC8850_2 +ffffffff83347060 d umq_ROLAND_ROLAND_SD90_2 +ffffffff83347080 d umq_ROLAND_ROLAND_UM880N_0 +ffffffff833470a0 d umq_ROLAND_ROLAND_UA100_2 +ffffffff833470c0 d umq_ROLAND_ROLAND_UM4_2 +ffffffff833470e0 d umq_ROLAND_ROLAND_U8_2 +ffffffff83347100 d umq_ROLAND_ROLAND_UM2_2 +ffffffff83347120 d umq_ROLAND_ROLAND_SC8820_2 +ffffffff83347140 d umq_ROLAND_ROLAND_PC300_2 +ffffffff83347160 d umq_ROLAND_ROLAND_SK500_2 +ffffffff83347180 d umq_ROLAND_ROLAND_SCD70_2 +ffffffff833471a0 d umq_ROLAND_ROLAND_UM550_0 +ffffffff833471c0 d umq_ROLAND_ROLAND_SD20_0 +ffffffff833471e0 d umq_ROLAND_ROLAND_SD80_0 +ffffffff83347200 d umq_ROLAND_ROLAND_UA700_3 +ffffffff83347220 d umq_ROLAND_ROLAND_UMONE_ANYIFACE +ffffffff83347240 D umidi_quirklist +ffffffff833474a0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_desc +ffffffff833474c0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_endpoints +ffffffff833474d0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_desc +ffffffff833474f0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_endpoints +ffffffff83347500 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_desc +ffffffff83347520 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_endpoints +ffffffff83347530 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_desc +ffffffff83347550 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_endpoints +ffffffff83347560 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_desc +ffffffff83347580 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_endpoints +ffffffff83347590 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_desc +ffffffff833475b0 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_endpoints +ffffffff833475c0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_desc +ffffffff833475e0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_endpoints +ffffffff833475f0 d umq_ROLAND_ROLAND_U8_2_fixed_ep_desc +ffffffff83347610 d umq_ROLAND_ROLAND_U8_2_fixed_ep_endpoints +ffffffff83347620 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_desc +ffffffff83347640 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_endpoints +ffffffff83347650 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_desc +ffffffff83347670 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_endpoints +ffffffff83347680 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_desc +ffffffff833476a0 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_endpoints +ffffffff833476b0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_desc +ffffffff833476d0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_endpoints +ffffffff833476e0 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_desc +ffffffff83347700 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_endpoints +ffffffff83347710 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_desc +ffffffff83347730 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_endpoints +ffffffff83347740 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_desc +ffffffff83347760 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_endpoints +ffffffff83347770 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_desc +ffffffff83347790 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_endpoints +ffffffff833477a0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_desc +ffffffff833477c0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_endpoints +ffffffff833477d0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_desc +ffffffff833477f0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_endpoints +ffffffff83348000 D ucom_cd +ffffffff83349000 D ugen_cd +ffffffff8334a000 D uhidev_cd +ffffffff8334a020 d uhidev_use_rdesc.reportbuf +ffffffff8334b000 D uhid_cd +ffffffff8334c000 D fido_cd +ffffffff8334d000 D ujoy_cd +ffffffff8334e000 D ukbd_cd +ffffffff8334f000 D ums_cd +ffffffff8334f020 d ums_fix_elecom_descriptor.match +ffffffff83350000 D umt_cd +ffffffff83351000 D def_scale +ffffffff83351020 D uts_cd +ffffffff83352000 D ubcmtp_cd +ffffffff83353000 D ucycom_cd +ffffffff83354000 D uslhcom_cd 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pckbd_bell_fn +ffffffff83712040 B pckbd_bell_fn_arg +ffffffff83713000 b wscninit.initted +ffffffff83714000 B pctr_isamd +ffffffff83714004 B pctr_isintel +ffffffff83714008 B pctr_intel_cap +ffffffff83714010 B pctr_fn +ffffffff83715000 b nvram_initialized +ffffffff83716000 B hidkbd_is_console +ffffffff83716008 B hidkbd_bell_fn +ffffffff83716010 B hidkbd_bell_fn_arg +ffffffff83717000 B usb_task_thread_proc +ffffffff83717008 B usb_abort_task_thread_proc +ffffffff83717010 b usb_nbuses +ffffffff83717018 B usbpalock +ffffffff83717028 B usb_abort_tasks +ffffffff83717038 B usb_explore_tasks +ffffffff83717048 B usb_generic_tasks +ffffffff83717058 b usb_run_abort_tasks +ffffffff8371705c b usb_run_tasks +ffffffff83717060 B explore_pending +ffffffff83718000 B usb_blk_freelist +ffffffff83718008 B usb_blk_nfree +ffffffff83718010 B usb_frag_freelist +ffffffff83719000 b usbd_errstr.buffer +ffffffff83719008 b usb_delay_ms.usb_delay_wchan +ffffffff83719010 b usbd_probe_and_attach.cookie +ffffffff8371a000 b t_wait +ffffffff8371a004 b t_trust +ffffffff8371b000 B umb_session_id +ffffffff8371b010 b umb_val2descr.sval +ffffffff8371c000 b probe_ic +ffffffff8371c008 b probe_addr +ffffffff8371c010 b probe_val +ffffffff8371c110 B skip_fc +ffffffff8371c118 B ignore_addrs +ffffffff8371c120 b iic_dump.iicvalcnt +ffffffff8371d000 B acpi_softc +ffffffff8371d008 B acpiwqpool +ffffffff8371d1b0 B acpi_enabled +ffffffff8371d1b4 b acpi_maptable.tblid +ffffffff8371d1b8 b acpi_add_device.nacpicpus +ffffffff8371d1bc B acpi_force_bm +ffffffff8371d1c0 B mouse_has_softbtn +ffffffff8371d1c4 B acpi_evindex +ffffffff8371d1c8 B acpi_poll_enabled +ffffffff8371d1cc B acpi_hasprocfvs +ffffffff8371d1d0 B acpi_haspci +ffffffff8371e000 B aml_root +ffffffff8371e060 B aml_lastscope +ffffffff8371e068 B aml_ophash +ffffffff8371e070 b aml_mnem.mnemstr +ffffffff8371e090 B aml_notify_list +ffffffff8371e098 B acpi_nalloc +ffffffff8371e0a0 b acpi_sleep.acpinowait +ffffffff8371e0b0 b aml_nodename.namebuf +ffffffff8371e130 b aml_getname.namebuf +ffffffff8371e1b0 b aml_getname.p +ffffffff8371e1b8 b global_lock_count +ffffffff8371e1c0 b aml_eisaid.id +ffffffff8371e1c8 B aml_global_lock +ffffffff8371e1d0 b aml_mapresource.map +ffffffff8371e210 b aml_val_to_string.buffer +ffffffff8371e310 B aml_error +ffffffff8371e314 B odp +ffffffff8371e318 B maxdp +ffffffff8371e31c B aml_busy +ffffffff8371f000 B scope +ffffffff83720000 B acpibtn_lids +ffffffff83721000 B cst_stats +ffffffff83722000 B acpihpet_attached +ffffffff83723000 b acpiec_wait.acpiecnowait +ffffffff83724000 B acpitz_cpu_setperf +ffffffff83725000 B acpimadt_busses +ffffffff83728000 B acpimadt_isa_bus +ffffffff83728030 b lapic_map +ffffffff83729000 B acpidmar_ddb +ffffffff83729010 b dmar_bdf.bdf +ffffffff83729030 B acpidmar_sc +ffffffff83729038 B domain_map_page +ffffffff83729040 b dom_bdf.mmm +ffffffff83729070 b iommu_init.niommu +ffffffff83729078 b acpidmar_pci_attach.dom +ffffffff83729080 b sid_flag +ffffffff83769080 b ivhd_showpage.show +ffffffff83769084 b ivhd_iommu_init.niommu +ffffffff83769088 b acpidmar_intr.ofe.0 +ffffffff83769090 b acpidmar_intr.ofe.1 +ffffffff8376a000 b dwiic_i2c_intr_string.irqstr +ffffffff8376b000 B acpihve_attached +ffffffff8376c000 B efi_jmpbuf +ffffffff8376d000 B l1tf_flush_region +ffffffff8376d008 B vm_pool +ffffffff8376d1b0 B vcpu_pool +ffffffff8376d358 B vmm_softc +ffffffff8376e000 B sdmmc_verbose +ffffffff8376f000 B utc_offset +ffffffff8376f008 B bufpages +ffffffff8376f010 B utsname +ffffffff83770000 B mountroot +ffffffff83771000 B __kernel_bss_end ffffffff83800000 B _end ffffffff83800000 B end