--- 7.3/2023-05-18T04:43:55Z/2023-04-21T00:00:00Z/nm-bsd-ot14.txt	Sat May 20 02:29:28 2023
+++ 7.3/2023-05-18T04:43:55Z/2023-04-22T00:00:00Z/nm-bsd-ot14.txt	Sat May 20 05:04:08 2023
@@ -2,14 +2,14 @@
 00011006 A mp_pdirpa
 0001419d A acpi_pdirpa
 01000000 A __kernel_phys_base
-02548000 T __kernel_kutext_phys
-0254c000 C __kernel_cptext_phys
-0254d000 C __kernel_rodata_phys
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-02e02000 C __kernel_randomdata_phys
-030c3000 R __kernel_data_phys
-033f4000 D __kernel_kudata_phys
-033f5000 C __kernel_bss_phys
+02549000 T __kernel_kutext_phys
+0254d000 C __kernel_cptext_phys
+0254e000 C __kernel_rodata_phys
+02e01000 R __kernel_kutext_page_phys
+02e03000 C __kernel_randomdata_phys
+030c4000 R __kernel_data_phys
+033f5000 D __kernel_kudata_phys
+033f6000 C __kernel_bss_phys
 03800000 B __kernel_phys_end
 80000000 A __kernel_virt_to_phys
 ffffffff80000000 A __kernel_base
@@ -5467,23873 +5467,23865 @@ ffffffff81296000 T clockintr_init
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-ffffffff81755000 T writeEEProm
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-ffffffff81755100 T signCard
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-ffffffff81757950 T video_open
-ffffffff81757e10 t set_fps
-ffffffff81757f50 T vbi_open
-ffffffff81757ff0 T tuner_open
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-ffffffff81762000 T xl_pci_match
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-ffffffff81763000 T fxp_pci_match
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-ffffffff81764000 T em_probe
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-ffffffff818b7e80 T val_to_uK
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-ffffffff818c3ed0 T virtio_pci_attach_10
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-ffffffff818c4450 T virtio_pci_adjust_config_region
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-ffffffff818c4e10 T virtio_pci_msix_establish
-ffffffff818c4ee0 T virtio_pci_set_msix_queue_vector
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-ffffffff818ca690 T bwfm_pci_intmask
-ffffffff818ca6d0 T bwfm_pci_pktid_avail
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-ffffffff818cb8f0 T bwfm_pci_ring_rx
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-ffffffff818cc0e0 T bwfm_pci_flowring_delete_cb
-ffffffff818cc190 T bwfm_pci_msgbuf_rxioctl
-ffffffff818cc280 T bwfm_pci_intr_status
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-ffffffff818cc300 T bwfm_pci_flowring_lookup
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-ffffffff818cc5a0 T bwfm_pci_flowring_create_cb
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-ffffffff818ccbc0 T bwfm_pci_msgbuf_h2d_mb_write
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-ffffffff818cd000 T ccp_pci_match
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-ffffffff818ce000 T bnxt_match
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-ffffffff818cf4c0 T bnxt_hwrm_ver_get
-ffffffff818cf610 T bnxt_hwrm_nvm_get_dev_info
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-ffffffff818cf880 T bnxt_hwrm_func_rgtr_async_events
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-ffffffff818d02d0 T bnxt_hwrm_func_reset
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-ffffffff818d06d0 T bnxt_set_cp_ring_aggint
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-ffffffff818d1050 T bnxt_hwrm_port_phy_qcfg
-ffffffff818d14f0 T bnxt_free_slots
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-ffffffff818d2680 T bnxt_write_tx_doorbell
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-ffffffff818d3f70 T bnxt_hwrm_vnic_rss_cfg
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-ffffffff818d4820 T bnxt_hwrm_cfa_l2_set_rx_mask
-ffffffff818d4900 T bnxt_rxrinfo
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-ffffffff818d4e10 T bnxt_handle_async_event
-ffffffff818d4e60 T bnxt_cpr_next_cmpl
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-ffffffff818d4f30 T bnxt_write_cp_doorbell_index
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-ffffffff818d53c0 T bnxt_get_media_type
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-ffffffff818d5af0 T _hwrm_send_message
-ffffffff818d89a0 T bnxt_rx_fill_slots
-ffffffff818d8b60 T bnxt_hwrm_err_map
-ffffffff818d8ba0 T _bnxt_hwrm_set_async_event_bit
-ffffffff818d9000 t mcx_match
-ffffffff818d9030 t mcx_attach
-ffffffff818dc110 T mcx_rx_fill
-ffffffff818dc360 T mcx_load_mbuf
-ffffffff818dc410 t mcx_dmamem_alloc
-ffffffff818dc570 t mcx_pages
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-ffffffff818dd290 t mcx_alloc_uar
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-ffffffff81c46500 T ni_set_uvd_clock_before_set_eng_clock
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-ffffffff81c56000 T r200_copy_dma
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-ffffffff81c58000 T rv370_pcie_rreg
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-ffffffff81c580f0 T rv370_pcie_gart_tlb_flush
-ffffffff81c582f0 T rv370_pcie_gart_get_page_entry
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-ffffffff81c599b0 T r300_asic_reset
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-ffffffff81c59c80 T rv370_set_pcie_lanes
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-ffffffff81c5c0f0 T r420_pipes_init
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-ffffffff81c5e0f0 T r600_uvd_ctx_rreg
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-ffffffff81c5e1e0 T r600_get_allowed_info_register
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-ffffffff81c5e290 T r600_set_uvd_clocks
-ffffffff81c5e7f0 T dce3_program_fmt
-ffffffff81c5e910 T rv6xx_get_temp
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-ffffffff81c5ed60 T rs780_pm_init_profile
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-ffffffff81c5f1f0 T r600_gui_idle
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-ffffffff81c5f350 T r600_hpd_set_polarity
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-ffffffff81c5fc00 T rs780_mc_rreg
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-ffffffff81c60b00 T r6xx_remap_render_backend
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-ffffffff81c68f20 T r600_get_gpu_clock_counter
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-ffffffff81c69040 T r600_fmt_is_valid_texture
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-ffffffff81c6e0a0 T r600_dma_set_wptr
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-ffffffff81c6e400 T r600_dma_is_lockup
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-ffffffff81c70760 T r600_dynamicpm_enable
-ffffffff81c707c0 T r600_enable_thermal_protection
-ffffffff81c70820 T r600_enable_acpi_pm
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-ffffffff81c70f20 T r600_set_ctxcgtt3d_rphc
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-ffffffff81c71100 T r600_set_mpll_lock_time
-ffffffff81c71150 T r600_set_mpll_reset_time
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-ffffffff81c713a0 T r600_engine_clock_entry_enable_post_divider
-ffffffff81c714a0 T r600_engine_clock_entry_set_post_divider
-ffffffff81c71560 T r600_engine_clock_entry_set_reference_divider
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-ffffffff81c717a0 T r600_vid_rt_set_ssu
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+ffffffff81ebbf40 t vega20_get_pcie_usage
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+ffffffff81f47d10 t bios_parser_get_ss_entry_number
+ffffffff81f47d40 t bios_parser_get_embedded_panel_info
+ffffffff81f47f40 t bios_parser_get_gpio_pin_info
+ffffffff81f48060 t bios_parser_get_encoder_cap_info
+ffffffff81f481d0 t bios_parser_is_accelerated_mode
+ffffffff81f481e0 t bios_parser_set_scratch_critical_state
+ffffffff81f481f0 t bios_parser_is_device_id_supported
+ffffffff81f48270 t bios_parser_encoder_control
+ffffffff81f482b0 t bios_parser_transmitter_control
+ffffffff81f482f0 t bios_parser_enable_crtc
+ffffffff81f48340 t bios_parser_set_pixel_clock
+ffffffff81f48380 t bios_parser_set_dce_clock
+ffffffff81f483c0 t bios_parser_program_crtc_timing
+ffffffff81f48400 t bios_parser_enable_disp_power_gating
+ffffffff81f48440 t firmware_parser_destroy
+ffffffff81f48500 t bios_get_board_layout_info
+ffffffff81f489b0 t bios_parser_pack_data_tables
+ffffffff81f489e0 t bios_get_atom_dc_golden_table
+ffffffff81f48b20 t bios_parser_enable_lvtma_control
+ffffffff81f48b70 t bios_parser_get_soc_bb_info
+ffffffff81f48c80 t bios_parser_get_disp_connector_caps_info
+ffffffff81f48de0 t bios_parser_get_lttpr_caps
+ffffffff81f48f30 t bios_parser_get_lttpr_interop
+ffffffff81f49070 t bios_parser_get_connector_speed_cap_info
+ffffffff81f491c0 t get_bios_object
+ffffffff81f49320 t get_bios_object_from_path_v3
+ffffffff81f4a000 T object_id_from_bios_object_id
+ffffffff81f4b000 T bios_get_image
+ffffffff81f4b050 T bios_is_accelerated_mode
+ffffffff81f4b0b0 T bios_set_scratch_acc_mode_change
+ffffffff81f4b0f0 T bios_set_scratch_critical_state
+ffffffff81f4b130 T bios_get_vga_enabled_displays
+ffffffff81f4c000 T dal_bios_parser_create
+ffffffff81f4c070 T dal_bios_parser_destroy
+ffffffff81f4d000 T dal_bios_parser_init_cmd_tbl
+ffffffff81f4d800 t encoder_control_digx_v3
+ffffffff81f4d900 t encoder_control_digx_v4
+ffffffff81f4da00 t encoder_control_digx_v5
+ffffffff81f4db50 t encoder_control_dig1_v1
+ffffffff81f4dbd0 t encoder_control_dig2_v1
+ffffffff81f4dc50 t encoder_control_dig_v1
+ffffffff81f4dcb0 t transmitter_control_v2
+ffffffff81f4de50 t transmitter_control_v3
+ffffffff81f4e010 t transmitter_control_v4
+ffffffff81f4e1c0 t transmitter_control_v1_5
+ffffffff81f4e340 t transmitter_control_v1_6
+ffffffff81f4e4b0 t set_pixel_clock_v3
+ffffffff81f4e620 t set_pixel_clock_v5
+ffffffff81f4e7c0 t set_pixel_clock_v6
+ffffffff81f4e970 t set_pixel_clock_v7
+ffffffff81f4eb40 t enable_spread_spectrum_on_ppll_v1
+ffffffff81f4ec60 t enable_spread_spectrum_on_ppll_v2
+ffffffff81f4ed90 t enable_spread_spectrum_on_ppll_v3
+ffffffff81f4eea0 t adjust_display_pll_v2
+ffffffff81f4eff0 t adjust_display_pll_v3
+ffffffff81f4f160 t dac1_encoder_control_v1
+ffffffff81f4f1e0 t dac2_encoder_control_v1
+ffffffff81f4f260 t dac1_output_control_v1
+ffffffff81f4f2c0 t dac2_output_control_v1
+ffffffff81f4f320 t set_crtc_using_dtd_timing_v3
+ffffffff81f4f490 t set_crtc_timing_v1
+ffffffff81f4f630 t enable_crtc_v1
+ffffffff81f4f6d0 t enable_crtc_mem_req_v1
+ffffffff81f4f770 t program_clock_v5
+ffffffff81f4f870 t program_clock_v6
+ffffffff81f4f990 t external_encoder_control_v3
+ffffffff81f4fb40 t enable_disp_power_gating_v2_1
+ffffffff81f4fc00 t set_dce_clock_v2_1
+ffffffff81f50000 T dal_firmware_parser_init_cmd_tbl
+ffffffff81f503d0 t encoder_control_digx_v1_5
+ffffffff81f505b0 t encoder_control_fallback
+ffffffff81f50610 t transmitter_control_v1_6
+ffffffff81f507c0 t transmitter_control_v1_7
+ffffffff81f509b0 t transmitter_control_fallback
+ffffffff81f50a10 t set_pixel_clock_v7
+ffffffff81f50c70 t set_pixel_clock_fallback
+ffffffff81f50cd0 t set_crtc_using_dtd_timing_v3
+ffffffff81f50e40 t enable_crtc_v1
+ffffffff81f50ee0 t external_encoder_control_v3
+ffffffff81f50f10 t enable_disp_power_gating_v2_1
+ffffffff81f51070 t enable_disp_power_gating_fallback
+ffffffff81f510d0 t set_dce_clock_v2_1
+ffffffff81f511f0 t get_smu_clock_info_v3_1
+ffffffff81f51260 t enable_lvtma_control
+ffffffff81f52000 T dal_bios_parser_init_cmd_tbl_helper
+ffffffff81f520a0 T dal_cmd_table_helper_controller_id_to_atom
+ffffffff81f521c0 T dal_cmd_table_helper_transmitter_bp_to_atom
+ffffffff81f52240 T dal_cmd_table_helper_encoder_mode_bp_to_atom
+ffffffff81f522d0 T dal_cmd_table_helper_assign_control_parameter
+ffffffff81f52390 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src
+ffffffff81f52470 T dal_cmd_table_helper_encoder_id_to_atom
+ffffffff81f53000 T dal_bios_parser_init_cmd_tbl_helper2
+ffffffff81f530b0 T dal_cmd_table_helper_controller_id_to_atom2
+ffffffff81f531c0 T dal_cmd_table_helper_transmitter_bp_to_atom2
+ffffffff81f53240 T dal_cmd_table_helper_encoder_mode_bp_to_atom2
+ffffffff81f532d0 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src2
+ffffffff81f533b0 T dal_cmd_table_helper_encoder_id_to_atom2
+ffffffff81f54000 T dal_cmd_tbl_helper_dce110_get_table
 ffffffff81f54030 t encoder_action_to_atom
 ffffffff81f540b0 t engine_bp_to_atom
 ffffffff81f54100 t clock_source_id_to_atom
-ffffffff81f541d0 t clock_source_id_to_atom_phy_clk_src_id
-ffffffff81f54220 t signal_type_to_atom_dig_mode
-ffffffff81f54280 t hpd_sel_to_atom
-ffffffff81f542c0 t dig_encoder_sel_to_atom
-ffffffff81f542f0 t phy_id_to_atom
-ffffffff81f54330 t disp_power_gating_action_to_atom
-ffffffff81f543a0 t dc_clock_type_to_atom
-ffffffff81f54420 t transmitter_color_depth_to_atom
-ffffffff81f55000 T dal_cmd_tbl_helper_dce112_get_table
+ffffffff81f541a0 t clock_source_id_to_atom_phy_clk_src_id
+ffffffff81f541f0 t signal_type_to_atom_dig_mode
+ffffffff81f54250 t hpd_sel_to_atom
+ffffffff81f54290 t dig_encoder_sel_to_atom
+ffffffff81f542c0 t phy_id_to_atom
+ffffffff81f54300 t disp_power_gating_action_to_atom
+ffffffff81f55000 T dal_cmd_tbl_helper_dce112_get_table2
 ffffffff81f55030 t encoder_action_to_atom
 ffffffff81f550b0 t engine_bp_to_atom
 ffffffff81f55100 t clock_source_id_to_atom
@@ -29345,7 +29337,7 @@ ffffffff81f552f0 t phy_id_to_atom
 ffffffff81f55330 t disp_power_gating_action_to_atom
 ffffffff81f553a0 t dc_clock_type_to_atom
 ffffffff81f55420 t transmitter_color_depth_to_atom
-ffffffff81f56000 T dal_cmd_tbl_helper_dce80_get_table
+ffffffff81f56000 T dal_cmd_tbl_helper_dce112_get_table
 ffffffff81f56030 t encoder_action_to_atom
 ffffffff81f560b0 t engine_bp_to_atom
 ffffffff81f56100 t clock_source_id_to_atom
@@ -29353,25437 +29345,25451 @@ ffffffff81f561d0 t clock_source_id_to_atom_phy_clk_src
 ffffffff81f56220 t signal_type_to_atom_dig_mode
 ffffffff81f56280 t hpd_sel_to_atom
 ffffffff81f562c0 t dig_encoder_sel_to_atom
-ffffffff81f56310 t phy_id_to_atom
-ffffffff81f56350 t disp_power_gating_action_to_atom
-ffffffff81f57000 T clk_mgr_helper_get_active_display_cnt
-ffffffff81f570e0 T clk_mgr_helper_get_active_plane_cnt
-ffffffff81f57190 T clk_mgr_exit_optimized_pwr_state
-ffffffff81f57290 T clk_mgr_optimize_pwr_state
-ffffffff81f573a0 T dc_clk_mgr_create
-ffffffff81f57a80 T dc_destroy_clk_mgr
-ffffffff81f58000 T dentist_get_divider_from_did
-ffffffff81f58070 T dce_adjust_dp_ref_freq_for_ss
-ffffffff81f58180 T dce_get_dp_ref_freq_khz
-ffffffff81f582b0 T dce12_get_dp_ref_freq_khz
-ffffffff81f582d0 T dce_get_max_pixel_clock_for_all_paths
-ffffffff81f584e0 T dce_get_required_clocks_state
-ffffffff81f58590 T dce_set_clock
-ffffffff81f586f0 T dce_clock_read_ss_info
-ffffffff81f58830 T dce_clk_mgr_construct
-ffffffff81f58a20 t dce_update_clocks
-ffffffff81f59000 T dce110_get_min_vblank_time_us
-ffffffff81f59080 T dce110_fill_display_configs
-ffffffff81f592e0 T dce11_pplib_apply_display_requirements
-ffffffff81f595d0 T dce110_clk_mgr_construct
-ffffffff81f59680 t dce11_update_clocks
-ffffffff81f5a000 T dce112_set_clock
-ffffffff81f5a1a0 T dce112_set_dispclk
-ffffffff81f5a2d0 T dce112_set_dprefclk
-ffffffff81f5a340 T dce112_clk_mgr_construct
-ffffffff81f5a3f0 t dce112_update_clocks
-ffffffff81f5b000 T dce120_clk_mgr_construct
-ffffffff81f5b090 T dce121_clk_mgr_construct
-ffffffff81f5b1c0 t dce12_update_clocks
-ffffffff81f5c000 T rv1_clk_mgr_construct
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-ffffffff81f5d000 T rv1_vbios_smu_set_dispclk
-ffffffff81f5d0f0 t rv1_vbios_smu_send_msg_with_param
-ffffffff81f5d200 T rv1_vbios_smu_set_dprefclk
-ffffffff81f5e000 T rv2_clk_mgr_construct
-ffffffff81f5f000 T dentist_get_did_from_divider
-ffffffff81f5f090 T dcn20_update_clocks_update_dpp_dto
-ffffffff81f5f160 T dcn20_update_clocks_update_dentist
-ffffffff81f5f680 T dcn2_update_clocks
-ffffffff81f5fbf0 T dcn2_read_clocks_from_hw_dentist
-ffffffff81f5fcc0 T dcn2_update_clocks_fpga
-ffffffff81f5fe40 T dcn2_init_clocks
-ffffffff81f5fee0 T dcn2_get_clock
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-ffffffff81f600a0 t dcn2_enable_pme_wa
-ffffffff81f600f0 t dcn2_are_clock_states_equal
-ffffffff81f60160 t dcn2_notify_link_rate_change
-ffffffff81f61000 t dcn201_update_clocks
-ffffffff81f61240 t dcn201_init_clocks
-ffffffff81f612e0 T dcn201_clk_mgr_construct
-ffffffff81f62000 T rn_clk_mgr_construct
-ffffffff81f628e0 t rn_update_clocks
-ffffffff81f62e80 t rn_set_low_power_state
-ffffffff81f63050 t rn_init_clocks
-ffffffff81f630f0 t rn_enable_pme_wa
-ffffffff81f63100 t rn_are_clock_states_equal
-ffffffff81f63150 t rn_notify_wm_ranges
-ffffffff81f634e0 t rn_notify_link_rate_change
-ffffffff81f64000 T rn_vbios_smu_get_smu_version
-ffffffff81f64020 t rn_vbios_smu_send_msg_with_param
-ffffffff81f641b0 T rn_vbios_smu_set_dispclk
-ffffffff81f642f0 T rn_vbios_smu_set_dprefclk
-ffffffff81f64360 T rn_vbios_smu_set_hard_min_dcfclk
-ffffffff81f643e0 T rn_vbios_smu_set_min_deep_sleep_dcfclk
-ffffffff81f64460 T rn_vbios_smu_set_phyclk
-ffffffff81f644a0 T rn_vbios_smu_set_dppclk
-ffffffff81f64560 T rn_vbios_smu_set_dcn_low_power_state
-ffffffff81f64580 T rn_vbios_smu_enable_48mhz_tmdp_refclk_pwrdwn
-ffffffff81f645a0 T rn_vbios_smu_enable_pme_wa
-ffffffff81f645c0 T rn_vbios_smu_is_periodic_retraining_disabled
-ffffffff81f65000 T dcn3_init_clocks
-ffffffff81f653d0 t dcn3_init_clocks_fpga
-ffffffff81f653e0 T dcn3_clk_mgr_construct
-ffffffff81f65540 T dcn3_clk_mgr_destroy
-ffffffff81f655b0 t dcn3_update_clocks
-ffffffff81f65a10 t dcn3_enable_pme_wa
-ffffffff81f65a50 t dcn3_are_clock_states_equal
-ffffffff81f65ab0 t dcn3_notify_wm_ranges
-ffffffff81f65d40 t dcn30_notify_link_rate_change
-ffffffff81f65e60 t dcn3_set_hard_min_memclk
-ffffffff81f65f00 t dcn3_set_hard_max_memclk
-ffffffff81f65f60 t dcn3_set_max_memclk
-ffffffff81f65fa0 t dcn3_set_min_memclk
-ffffffff81f65fe0 t dcn3_get_memclk_states_from_smu
-ffffffff81f66120 t dcn3_is_smu_present
-ffffffff81f67000 T dcn30_smu_test_message
-ffffffff81f67070 t dcn30_smu_send_msg_with_param
-ffffffff81f671d0 T dcn30_smu_get_smu_version
-ffffffff81f671f0 T dcn30_smu_check_driver_if_version
-ffffffff81f67240 T dcn30_smu_check_msg_header_version
-ffffffff81f67290 T dcn30_smu_set_dram_addr_high
-ffffffff81f672b0 T dcn30_smu_set_dram_addr_low
-ffffffff81f672d0 T dcn30_smu_transfer_wm_table_smu_2_dram
-ffffffff81f672f0 T dcn30_smu_transfer_wm_table_dram_2_smu
-ffffffff81f67310 T dcn30_smu_set_hard_min_by_freq
-ffffffff81f67360 T dcn30_smu_set_hard_max_by_freq
-ffffffff81f673b0 T dcn30_smu_get_dpm_freq_by_index
-ffffffff81f67400 T dcn30_smu_get_dc_mode_max_dpm_freq
-ffffffff81f67450 T dcn30_smu_set_min_deep_sleep_dcef_clk
-ffffffff81f67470 T dcn30_smu_set_num_of_displays
-ffffffff81f67490 T dcn30_smu_set_display_refresh_from_mall
-ffffffff81f674c0 T dcn30_smu_set_external_client_df_cstate_allow
-ffffffff81f674e0 T dcn30_smu_set_pme_workaround
-ffffffff81f68000 T dcn301_smu_get_smu_version
-ffffffff81f68070 t dcn301_smu_send_msg_with_param
-ffffffff81f681f0 T dcn301_smu_set_dispclk
-ffffffff81f68290 T dcn301_smu_set_dprefclk
-ffffffff81f68340 T dcn301_smu_set_hard_min_dcfclk
-ffffffff81f683e0 T dcn301_smu_set_min_deep_sleep_dcfclk
-ffffffff81f68480 T dcn301_smu_set_dppclk
-ffffffff81f68520 T dcn301_smu_set_display_idle_optimization
-ffffffff81f68570 T dcn301_smu_enable_phy_refclk_pwrdwn
-ffffffff81f685c0 T dcn301_smu_enable_pme_wa
-ffffffff81f685e0 T dcn301_smu_set_dram_addr_high
-ffffffff81f68630 T dcn301_smu_set_dram_addr_low
-ffffffff81f68680 T dcn301_smu_transfer_dpm_table_smu_2_dram
-ffffffff81f686a0 T dcn301_smu_transfer_wm_table_dram_2_smu
-ffffffff81f69000 T vg_clk_mgr_construct
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-ffffffff81f69840 t vg_update_clocks
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-ffffffff81f69c70 t vg_enable_pme_wa
-ffffffff81f69c80 t vg_are_clock_states_equal
-ffffffff81f69cd0 t vg_notify_wm_ranges
-ffffffff81f6b000 T dcn31_update_clocks
-ffffffff81f6b620 T dcn31_init_clocks
-ffffffff81f6b6d0 T dcn31_are_clock_states_equal
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-ffffffff81f6b760 T dcn31_clk_mgr_construct
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-ffffffff81f6be20 t dcn31_set_low_power_state
-ffffffff81f6c000 t dcn31_enable_pme_wa
-ffffffff81f6c010 t dcn31_notify_wm_ranges
-ffffffff81f6c3b0 t find_clk_for_voltage
-ffffffff81f6d000 T dcn31_smu_get_smu_version
-ffffffff81f6d020 t dcn31_smu_send_msg_with_param
-ffffffff81f6d220 T dcn31_smu_set_dispclk
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-ffffffff81f6d300 T dcn31_smu_set_hard_min_dcfclk
-ffffffff81f6d380 T dcn31_smu_set_min_deep_sleep_dcfclk
-ffffffff81f6d400 T dcn31_smu_set_dppclk
-ffffffff81f6d470 T dcn31_smu_set_display_idle_optimization
-ffffffff81f6d4c0 T dcn31_smu_enable_phy_refclk_pwrdwn
-ffffffff81f6d510 T dcn31_smu_enable_pme_wa
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-ffffffff81f6d610 T dcn31_smu_transfer_wm_table_dram_2_smu
-ffffffff81f6d650 T dcn31_smu_set_zstate_support
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-ffffffff81f6e000 T dcn314_update_clocks
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-ffffffff81f70000 T dcn314_smu_get_smu_version
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-ffffffff81f70240 T dcn314_smu_set_dispclk
-ffffffff81f702b0 T dcn314_smu_set_dprefclk
-ffffffff81f70320 T dcn314_smu_set_hard_min_dcfclk
-ffffffff81f703a0 T dcn314_smu_set_min_deep_sleep_dcfclk
-ffffffff81f70420 T dcn314_smu_set_dppclk
-ffffffff81f70490 T dcn314_smu_set_display_idle_optimization
-ffffffff81f704e0 T dcn314_smu_enable_phy_refclk_pwrdwn
-ffffffff81f70530 T dcn314_smu_enable_pme_wa
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-ffffffff81f705b0 T dcn314_smu_set_dram_addr_low
-ffffffff81f705f0 T dcn314_smu_transfer_dpm_table_smu_2_dram
-ffffffff81f70630 T dcn314_smu_transfer_wm_table_dram_2_smu
-ffffffff81f70670 T dcn314_smu_set_zstate_support
-ffffffff81f706c0 T dcn314_smu_set_dtbclk
-ffffffff81f71000 T dcn315_clk_mgr_construct
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-ffffffff81f73000 T dcn315_smu_get_smu_version
-ffffffff81f73020 t dcn315_smu_send_msg_with_param
-ffffffff81f731b0 T dcn315_smu_set_dispclk
-ffffffff81f73220 T dcn315_smu_set_hard_min_dcfclk
-ffffffff81f732a0 T dcn315_smu_set_min_deep_sleep_dcfclk
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-ffffffff81f73390 T dcn315_smu_set_display_idle_optimization
-ffffffff81f733e0 T dcn315_smu_enable_phy_refclk_pwrdwn
-ffffffff81f73430 T dcn315_smu_enable_pme_wa
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-ffffffff81f73530 T dcn315_smu_transfer_wm_table_dram_2_smu
-ffffffff81f73570 T dcn315_smu_get_dpref_clk
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-ffffffff81f761b0 T dcn316_smu_set_dispclk
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-ffffffff81f791d0 T dcn32_smu_set_hard_min_by_freq
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+ffffffff821f7b60 T Calculate256BBlockSizes
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+ffffffff822012d0 T dc_dsc_stream_bandwidth_in_kbps
+ffffffff82201430 T dc_dsc_stream_bandwidth_overhead_in_kbps
+ffffffff82201580 T dc_dsc_get_policy_for_timing
+ffffffff82201620 T dc_dsc_policy_set_max_target_bpp_limit
+ffffffff82201650 T dc_dsc_policy_set_enable_dsc_when_not_needed
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 ffffffff82221080 t hpd_ack
-ffffffff82222000 T dal_irq_service_dcn10_create
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 ffffffff82222080 t hpd_ack
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 ffffffff82223080 t hpd_ack
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-ffffffff82224000 T dal_irq_service_dcn201_create
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 ffffffff82224080 t hpd_ack
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-ffffffff82225000 T dal_irq_service_dcn21_create
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 ffffffff82225080 t hpd_ack
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-ffffffff82226000 T dal_irq_service_dcn30_create
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 ffffffff82226080 t hpd_ack
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 ffffffff82227080 t hpd_ack
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 ffffffff82228080 t hpd_ack
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-ffffffff82229000 T dal_irq_service_dcn31_create
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 ffffffff82229080 t hpd_ack
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-ffffffff8222a000 T dal_irq_service_dcn314_create
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 ffffffff8222a080 t hpd_ack
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-ffffffff8222b000 T dal_irq_service_dcn315_create
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 ffffffff8222b080 t hpd_ack
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-ffffffff8222c000 T dal_irq_service_dcn32_create
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 ffffffff8222c080 t hpd_ack
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-ffffffff8222e5e0 T dp_trace_set_edp_power_timestamp
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-ffffffff8222f000 T set_dio_throttled_vcp_size
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-ffffffff82233030 T virtual_setup_stream_attribute
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-ffffffff82466ce0 T urtw_set_macaddr
-ffffffff82466d90 T urtw_set_multi
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-ffffffff82472b00 T rsu_site_survey
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-ffffffff8247bf10 T otus_set_board_values
-ffffffff8247c660 T otus_program_phy
-ffffffff8247cb50 T otus_set_rf_bank4
-ffffffff8247cd20 T otus_get_delta_slope
-ffffffff8247cde0 T otus_set_macaddr
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-ffffffff8247d000 T umb_match
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-ffffffff8247dee0 T umb_ncm_setup
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-ffffffff8247e7a0 T umb_rtrequest
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-ffffffff8247eb20 T umb_input
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-ffffffff8252e730 T vmm_pat_is_valid
-ffffffff8252e810 T vmm_gpa_is_valid
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-ffffffff8252e8c0 T svm_exit_reason_decode
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-ffffffff8253c000 T sdmmc_scsi_cmd
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-ffffffff8253d000 T bwfm_sdio_preinit
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-ffffffff8253dff0 T bwfm_sdio_load_microcode
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-ffffffff825411c0 T onewire_famname
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-ffffffff825462c2 t intr_user_exit_post_ast
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-ffffffff825463fa T doreti_iret
-ffffffff82547000 T alltraps
-ffffffff82547138 T recall_trap
-ffffffff82547150 T alltraps_kern
-ffffffff82547153 T alltraps_kern_meltdown
-ffffffff82548000 ? Xsyscall32
-ffffffff82548000 A __kutext_start
-ffffffff82548000 A __text_page_end
-ffffffff82549000 ? Xtrap00
-ffffffff82549010 ? Xtrap01
-ffffffff82549020 ? Xtrap02
-ffffffff82549028 c calltrap_specstk
-ffffffff825490f0 ? calltrap_specstk_tramp
-ffffffff82549110 ? Xtrap03
-ffffffff82549120 ? Xtrap04
-ffffffff82549130 ? Xtrap05
-ffffffff82549140 ? Xtrap06
-ffffffff82549150 ? Xtrap07
-ffffffff82549160 ? Xtrap08
-ffffffff82549170 ? Xtrap09
-ffffffff82549180 ? Xtrap0a
-ffffffff82549190 ? Xtrap0b
-ffffffff825491a0 ? Xtrap0c
-ffffffff825491b0 ? Xtrap0d
-ffffffff82549240 ? Xtrap0e
-ffffffff82549250 ? Xintrspurious
-ffffffff82549250 ? Xtrap0f
-ffffffff82549260 ? Xtrap10
-ffffffff82549270 ? Xtrap11
-ffffffff82549280 ? Xtrap12
-ffffffff82549290 ? Xtrap13
-ffffffff825492a0 ? Xtrap14
-ffffffff825492b0 ? Xtrap15
-ffffffff825492c0 ? Xtrap16
-ffffffff825492c0 ? Xtrap17
-ffffffff825492c0 ? Xtrap18
-ffffffff825492c0 ? Xtrap19
-ffffffff825492c0 ? Xtrap1a
-ffffffff825492c0 ? Xtrap1b
-ffffffff825492c0 ? Xtrap1c
-ffffffff825492c0 ? Xtrap1d
-ffffffff825492c0 ? Xtrap1e
-ffffffff825492c0 ? Xtrap1f
-ffffffff825492d0 ? x2apic_eoi
-ffffffff825492f0 ? Xintr_lapic_ipi
-ffffffff82549330 ? Xipi_invltlb
-ffffffff82549360 ? Xipi_invlpg
-ffffffff82549390 ? Xipi_invlrange
-ffffffff825493d0 ? Xipi_invltlb_pcid
-ffffffff82549410 ? Xipi_invlpg_pcid
-ffffffff82549460 ? Xipi_invlrange_pcid
-ffffffff825494d0 ? Xintr_lapic_ltimer
-ffffffff82549510 ? Xintr_xen_upcall
-ffffffff82549550 ? Xintr_hyperv_upcall
-ffffffff82549590 ? Xintr_legacy0
-ffffffff825495d0 ? Xintr_legacy1
-ffffffff82549610 ? Xintr_legacy2
-ffffffff82549650 ? Xintr_legacy3
-ffffffff82549690 ? Xintr_legacy4
-ffffffff825496d0 ? Xintr_legacy5
-ffffffff82549710 ? Xintr_legacy6
-ffffffff82549750 ? Xintr_legacy7
-ffffffff82549790 ? Xintr_legacy8
-ffffffff825497d0 ? Xintr_legacy9
-ffffffff82549810 ? Xintr_legacy10
-ffffffff82549850 ? Xintr_legacy11
-ffffffff82549890 ? Xintr_legacy12
-ffffffff825498d0 ? Xintr_legacy13
-ffffffff82549910 ? Xintr_legacy14
-ffffffff82549950 ? Xintr_legacy15
-ffffffff82549990 ? Xintr_ioapic_edge0
-ffffffff825499d0 ? Xintr_ioapic_edge1
-ffffffff82549a10 ? Xintr_ioapic_edge2
-ffffffff82549a50 ? Xintr_ioapic_edge3
-ffffffff82549a90 ? Xintr_ioapic_edge4
-ffffffff82549ad0 ? Xintr_ioapic_edge5
-ffffffff82549b10 ? Xintr_ioapic_edge6
-ffffffff82549b50 ? Xintr_ioapic_edge7
-ffffffff82549b90 ? Xintr_ioapic_edge8
-ffffffff82549bd0 ? Xintr_ioapic_edge9
-ffffffff82549c10 ? Xintr_ioapic_edge10
-ffffffff82549c50 ? Xintr_ioapic_edge11
-ffffffff82549c90 ? Xintr_ioapic_edge12
-ffffffff82549cd0 ? Xintr_ioapic_edge13
-ffffffff82549d10 ? Xintr_ioapic_edge14
-ffffffff82549d50 ? Xintr_ioapic_edge15
-ffffffff82549d90 ? Xintr_ioapic_edge16
-ffffffff82549dd0 ? Xintr_ioapic_edge17
-ffffffff82549e10 ? Xintr_ioapic_edge18
-ffffffff82549e50 ? Xintr_ioapic_edge19
-ffffffff82549e90 ? Xintr_ioapic_edge20
-ffffffff82549ed0 ? Xintr_ioapic_edge21
-ffffffff82549f10 ? Xintr_ioapic_edge22
-ffffffff82549f50 ? Xintr_ioapic_edge23
-ffffffff82549f90 ? Xintr_ioapic_edge24
-ffffffff82549fd0 ? Xintr_ioapic_edge25
-ffffffff8254a010 ? Xintr_ioapic_edge26
-ffffffff8254a050 ? Xintr_ioapic_edge27
-ffffffff8254a090 ? Xintr_ioapic_edge28
-ffffffff8254a0d0 ? Xintr_ioapic_edge29
-ffffffff8254a110 ? Xintr_ioapic_edge30
-ffffffff8254a150 ? Xintr_ioapic_edge31
-ffffffff8254a190 ? Xintr_ioapic_edge32
-ffffffff8254a1d0 ? Xintr_ioapic_edge33
-ffffffff8254a210 ? Xintr_ioapic_edge34
-ffffffff8254a250 ? Xintr_ioapic_edge35
-ffffffff8254a290 ? Xintr_ioapic_edge36
-ffffffff8254a2d0 ? Xintr_ioapic_edge37
-ffffffff8254a310 ? Xintr_ioapic_edge38
-ffffffff8254a350 ? Xintr_ioapic_edge39
-ffffffff8254a390 ? Xintr_ioapic_edge40
-ffffffff8254a3d0 ? Xintr_ioapic_edge41
-ffffffff8254a410 ? Xintr_ioapic_edge42
-ffffffff8254a450 ? Xintr_ioapic_edge43
-ffffffff8254a490 ? Xintr_ioapic_edge44
-ffffffff8254a4d0 ? Xintr_ioapic_edge45
-ffffffff8254a510 ? Xintr_ioapic_edge46
-ffffffff8254a550 ? Xintr_ioapic_edge47
-ffffffff8254a590 ? Xintr_ioapic_edge48
-ffffffff8254a5d0 ? Xintr_ioapic_edge49
-ffffffff8254a610 ? Xintr_ioapic_edge50
-ffffffff8254a650 ? Xintr_ioapic_edge51
-ffffffff8254a690 ? Xintr_ioapic_edge52
-ffffffff8254a6d0 ? Xintr_ioapic_edge53
-ffffffff8254a710 ? Xintr_ioapic_edge54
-ffffffff8254a750 ? Xintr_ioapic_edge55
-ffffffff8254a790 ? Xintr_ioapic_edge56
-ffffffff8254a7d0 ? Xintr_ioapic_edge57
-ffffffff8254a810 ? Xintr_ioapic_edge58
-ffffffff8254a850 ? Xintr_ioapic_edge59
-ffffffff8254a890 ? Xintr_ioapic_edge60
-ffffffff8254a8d0 ? Xintr_ioapic_edge61
-ffffffff8254a910 ? Xintr_ioapic_edge62
-ffffffff8254a950 ? Xintr_ioapic_edge63
-ffffffff8254a990 ? Xintr_ioapic_level0
-ffffffff8254a9d0 ? Xintr_ioapic_level1
-ffffffff8254aa10 ? Xintr_ioapic_level2
-ffffffff8254aa50 ? Xintr_ioapic_level3
-ffffffff8254aa90 ? Xintr_ioapic_level4
-ffffffff8254aad0 ? Xintr_ioapic_level5
-ffffffff8254ab10 ? Xintr_ioapic_level6
-ffffffff8254ab50 ? Xintr_ioapic_level7
-ffffffff8254ab90 ? Xintr_ioapic_level8
-ffffffff8254abd0 ? Xintr_ioapic_level9
-ffffffff8254ac10 ? Xintr_ioapic_level10
-ffffffff8254ac50 ? Xintr_ioapic_level11
-ffffffff8254ac90 ? Xintr_ioapic_level12
-ffffffff8254acd0 ? Xintr_ioapic_level13
-ffffffff8254ad10 ? Xintr_ioapic_level14
-ffffffff8254ad50 ? Xintr_ioapic_level15
-ffffffff8254ad90 ? Xintr_ioapic_level16
-ffffffff8254add0 ? Xintr_ioapic_level17
-ffffffff8254ae10 ? Xintr_ioapic_level18
-ffffffff8254ae50 ? Xintr_ioapic_level19
-ffffffff8254ae90 ? Xintr_ioapic_level20
-ffffffff8254aed0 ? Xintr_ioapic_level21
-ffffffff8254af10 ? Xintr_ioapic_level22
-ffffffff8254af50 ? Xintr_ioapic_level23
-ffffffff8254af90 ? Xintr_ioapic_level24
-ffffffff8254afd0 ? Xintr_ioapic_level25
-ffffffff8254b010 ? Xintr_ioapic_level26
-ffffffff8254b050 ? Xintr_ioapic_level27
-ffffffff8254b090 ? Xintr_ioapic_level28
-ffffffff8254b0d0 ? Xintr_ioapic_level29
-ffffffff8254b110 ? Xintr_ioapic_level30
-ffffffff8254b150 ? Xintr_ioapic_level31
-ffffffff8254b190 ? Xintr_ioapic_level32
-ffffffff8254b1d0 ? Xintr_ioapic_level33
-ffffffff8254b210 ? Xintr_ioapic_level34
-ffffffff8254b250 ? Xintr_ioapic_level35
-ffffffff8254b290 ? Xintr_ioapic_level36
-ffffffff8254b2d0 ? Xintr_ioapic_level37
-ffffffff8254b310 ? Xintr_ioapic_level38
-ffffffff8254b350 ? Xintr_ioapic_level39
-ffffffff8254b390 ? Xintr_ioapic_level40
-ffffffff8254b3d0 ? Xintr_ioapic_level41
-ffffffff8254b410 ? Xintr_ioapic_level42
-ffffffff8254b450 ? Xintr_ioapic_level43
-ffffffff8254b490 ? Xintr_ioapic_level44
-ffffffff8254b4d0 ? Xintr_ioapic_level45
-ffffffff8254b510 ? Xintr_ioapic_level46
-ffffffff8254b550 ? Xintr_ioapic_level47
-ffffffff8254b590 ? Xintr_ioapic_level48
-ffffffff8254b5d0 ? Xintr_ioapic_level49
-ffffffff8254b610 ? Xintr_ioapic_level50
-ffffffff8254b650 ? Xintr_ioapic_level51
-ffffffff8254b690 ? Xintr_ioapic_level52
-ffffffff8254b6d0 ? Xintr_ioapic_level53
-ffffffff8254b710 ? Xintr_ioapic_level54
-ffffffff8254b750 ? Xintr_ioapic_level55
-ffffffff8254b790 ? Xintr_ioapic_level56
-ffffffff8254b7d0 ? Xintr_ioapic_level57
-ffffffff8254b810 ? Xintr_ioapic_level58
-ffffffff8254b850 ? Xintr_ioapic_level59
-ffffffff8254b890 ? Xintr_ioapic_level60
-ffffffff8254b8d0 ? Xintr_ioapic_level61
-ffffffff8254b910 ? Xintr_ioapic_level62
-ffffffff8254b950 ? Xintr_ioapic_level63
-ffffffff8254c000 ? codepatch_fill_nop
-ffffffff8254c000 A __cptext_start
-ffffffff8254c000 A __kutext_end
-ffffffff8254c0b0 ? codepatch_maprw
-ffffffff8254c190 ? codepatch_unmaprw
-ffffffff8254c200 ? codepatch_nop
-ffffffff8254c360 ? codepatch_replace
-ffffffff8254c510 ? codepatch_call
-ffffffff8254c530 ? codepatch_jmp
-ffffffff8254d000 A __cptext_end
-ffffffff8254d000 A __rodata_start
-ffffffff8254d000 C _etext
-ffffffff8254d000 C etext
-ffffffff8254e000 r seeprom_read
-ffffffff8254e004 r icl_mg_pll_find_divisors.div1_vals
-ffffffff8254e028 r gen9bc_tgp_ddc_pin_map
-ffffffff8254e038 r athn_ac2qid
-ffffffff8254e038 r athn_ac2qid
-ffffffff8254e038 r athn_ac2qid
-ffffffff8254e044 r rtwn_get_rssi.cckoff
-ffffffff8254e06c r rsu_ac2qid
-ffffffff8254e07c r pckbc_portcmd
-ffffffff8254e080 r tht_fifo_write_pad.pad
-ffffffff8254e088 r rsu_get_rssi.cckoff
-ffffffff8254e09c r adlp_n_revids
-ffffffff8254e0ec r apple_iso_trans
-ffffffff8254e0f0 r dg2_g12_revid_step_tbl
-ffffffff8254e0f8 r wihap_check_tx.txratetable
-ffffffff8254e0fc r dmamode
-ffffffff8254e124 r gen9_edram_size_mb.sets
-ffffffff8254f000 r isomappings
-ffffffff8254f080 r unimappings
-ffffffff8254f230 r replacements
-ffffffff82552b06 r cmd0646_9_tim_udma
-ffffffff825a6532 r pp_r600_decoded_lanes
-ffffffff825c185c r cmd680_setup_channel.udma_tbl
-ffffffff825c94c8 r apollo_udma33_tim
-ffffffff825cf5b5 r substchar
-ffffffff825d1663 r apollo_udma100_tim
-ffffffff825f8f7a r apollo_udma66_tim
-ffffffff8260040d r apollo_pio_rec
-ffffffff8260f7f7 r cy_pio_rec
-ffffffff8263ecb4 r apollo_udma133_tim
-ffffffff8264b858 R drm_ca
-ffffffff8264b880 R drm_filtops
-ffffffff8264b8b0 R drmread_filtops
-ffffffff8264c000 r vga_emulops
-ffffffff8264c048 R vga_stdscreen
-ffffffff8264c078 R vga_stdscreen_mono
-ffffffff8264c0a8 R vga_stdscreen_bf
-ffffffff8264c0d8 R vga_40lscreen
-ffffffff8264c108 R vga_40lscreen_mono
-ffffffff8264c138 R vga_40lscreen_bf
-ffffffff8264c168 R vga_50lscreen
-ffffffff8264c198 R vga_50lscreen_mono
-ffffffff8264c1c8 R vga_50lscreen_bf
-ffffffff8264c1f8 R vga_screenlist
-ffffffff8264c208 R vga_screenlist_mono
-ffffffff8264c218 R vga_accessops
-ffffffff8264c278 r i945_wm_info
-ffffffff8264c2b0 r bgansitopc
-ffffffff8264c2b8 r pctoansi
-ffffffff8264c2f8 r sdma_offsets
-ffffffff8264c2f8 r sdma_offsets
-ffffffff8264c328 r iha_rate_tbl
-ffffffff8264c360 r i830_a_wm_info
-ffffffff8264c398 r gen9_edram_size_mb.ways
-ffffffff8264c400 r aggr_periodic_times
-ffffffff8264c480 r jsl_ehl_revids
-ffffffff8264c4f8 r michael_final.pad
-ffffffff8264c520 r rt_copysa.maskarray
-ffffffff8264c528 r i915_wm_info
-ffffffff8264c530 r amdgpu_ih_clientid_jpeg
-ffffffff8264c530 r amdgpu_ih_clientid_uvds
-ffffffff8264c530 r amdgpu_ih_clientid_vcns
-ffffffff8264c530 r amdgpu_ih_clientid_vcns
-ffffffff8264c530 r amdgpu_ih_clientid_vcns
-ffffffff8264c568 r vga_setfontset.cmaptabb
-ffffffff8264c580 r tgl_revids
-ffffffff8264c5d8 r i830_bc_wm_info
-ffffffff8264c648 r hsw_activate_psr2.map
-ffffffff8264c688 r __drm_universal_plane_init.default_modifiers
-ffffffff8264c698 r iwn_tid2fifo
-ffffffff8264c6b0 r vga_setfontset.cmaptaba
-ffffffff8264c6b8 r crtc_offsets
-ffffffff8264c6b8 r crtc_offsets
-ffffffff8264c6b8 r crtc_offsets
-ffffffff8264c6d8 r link_speed
-ffffffff8264c6d8 r link_speed
-ffffffff8264c6d8 r link_speed
-ffffffff8264c750 r rtwn_r88e_get_rssi.cckoff
-ffffffff8264d000 R edid_vendors
-ffffffff8264d2c0 R edid_nvendors
-ffffffff8264d2d0 R edid_products
-ffffffff8264d330 R edid_nproducts
-ffffffff8264d340 r _edid_modes
-ffffffff8264e000 R videomode_list
-ffffffff8264f080 R videomode_count
-ffffffff82650000 r ahc_hard_errors
-ffffffff82650080 r critical_sections
-ffffffff826500b0 r patches
-ffffffff82650d50 r seqprog
-ffffffff82652000 r ahc_switch
-ffffffff82653000 r termstat_strings
-ffffffff82653020 r critical_sections
-ffffffff82653060 r seqprog
-ffffffff82653d50 r patches
-ffffffff82655000 r ahd_switch
-ffffffff82656000 R aic_switch
-ffffffff82657000 R adw_switch
-ffffffff82658000 R gdt_switch
-ffffffff82659000 R twe_switch
-ffffffff8265a000 R ciss_switch
-ffffffff8265a030 R ciss_level
-ffffffff8265a050 R ciss_stat
-ffffffff8265b000 R ami_switch
-ffffffff8265b028 R ami_raw_switch
-ffffffff8265c000 R mfi_switch
-ffffffff8265c028 R mfi_pd_switch
-ffffffff8265c050 r mfi_iop_xscale
-ffffffff8265c080 r mfi_iop_ppc
-ffffffff8265c0b0 r mfi_iop_gen2
-ffffffff8265c0e0 r mfi_iop_skinny
-ffffffff8265c110 r mfi_bbu_indicators
-ffffffff8265c1c0 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs
-ffffffff8265c1f0 r chv_oa_mux_regs
-ffffffff8265c210 r fiji_clock_stretcher_lookup_table
-ffffffff8265c210 r tonga_clock_stretcher_lookup_table
-ffffffff8265c240 r link_speed
-ffffffff8265c240 r link_speed
-ffffffff8265c240 r link_speed
-ffffffff8265c280 r drm_fb_xfrm.default_dst_pitch
-ffffffff8265c280 r non_supported_protection
-ffffffff8265c380 r tgl_uy_revids
-ffffffff8265c3d0 r bwi_phy_noise_11g_rev1
-ffffffff8265c450 r cardslot_process_event.antonym_ev
-ffffffff8265c4e0 r gen11_oa_mux_regs
-ffffffff8265c5d0 r ddr2_cycle_tenths
-ffffffff8265c640 r rtw_intr_rx.ratetbl
-ffffffff8265c6c0 r abm_config
-ffffffff8265c730 r getbootinfo.ports.30
-ffffffff8265c780 r reg_offsets
-ffffffff8265c790 r bwi_rf_lo_measure_11g.rf_lo_adjust
-ffffffff8265c7a0 r init_non_clock_fields.look_up
-ffffffff8265c7b0 r uftdi_8u232am_getrate.roundoff
-ffffffff8265c800 r zyd_rx_data.rates
-ffffffff8265c810 r ieee80211_ra_valid_tx_mcs.max_mcs
-ffffffff8265c850 r mmio_invalidate_full.gen8_regs
-ffffffff8265c880 r bwi_phy_noise_11g
-ffffffff8265c890 r hpt366_pio
-ffffffff8265c8c0 r glk_revids
-ffffffff8265c910 r bwi_rf_calc_nrssi_slope_11g.save_phy3_regs
-ffffffff8265c930 r ether_crc32_be_update.rev
-ffffffff8265c930 r rtw_grf5101_mac_crypt.caesar
-ffffffff8265c980 r snb_b_fdi_train_param
-ffffffff8265d000 R qlw_switch
-ffffffff8265e000 R isp_2100_risc_code
-ffffffff82670bf0 R isp_2200_risc_code
-ffffffff82683990 R isp_2300_risc_code
-ffffffff8269d408 R qla_switch
-ffffffff8269d430 r qla_regs_2100
-ffffffff8269d460 r qla_regs_2200
-ffffffff8269d490 r qla_regs_23XX
-ffffffff8269e000 R ahci_atascsi_methods
-ffffffff8269f000 R nvme_switch
-ffffffff8269f028 r nvme_ops
-ffffffff826a0000 R mpi_switch
-ffffffff826a0100 r intel_hpll_vco.elk_vco
-ffffffff826a0160 r pin_offsets
-ffffffff826a01c0 r firmware_list
-ffffffff826a0220 r atom_arg_shift
-ffffffff826a0220 r atom_arg_shift
-ffffffff826a0260 r pf_syncookie_wstab
-ffffffff826a0280 r ieee80211_media_init.mopts
-ffffffff826a02e0 r add_entropy_words.twist_table
-ffffffff826a0380 r urtw_8225v2_txpwr_cck
-ffffffff826a03a0 r bwfm_pci_prio2fifo
-ffffffff826a03a0 r ieee80211_up_to_ac.up_to_ac
-ffffffff826a0460 r paritytab
-ffffffff826a0460 r x86emu_parity_tab
-ffffffff826a0480 r legacy_connector_convert
-ffffffff826a04c0 r gen7_oa_mux_regs
-ffffffff826a04e0 r hsw_oa_mux_regs
-ffffffff826a0500 r notetab
-ffffffff826a0520 r urtw_8225v2_txpwr_cck_ch14
-ffffffff826a0540 r bwi_rf_calibval.rf_calibvals
-ffffffff826a05e0 r pf_syncookie_msstab
-ffffffff826a0640 r xgmi3x16_pcs_err_status_reg_aldebaran
-ffffffff826a06a0 r uath_wme_init.uath_wme_11g
-ffffffff826a06c0 r gen7_oa_b_counters
-ffffffff826a0820 r icl_revids
-ffffffff826a08e0 r rtwn_iq_calib_run.reg_adda
-ffffffff826a0920 r atom_def_dst
-ffffffff826a0920 r atom_def_dst
-ffffffff826a0960 r sha256_initial_hash_value
-ffffffff826a09c0 r otus_edca_def
-ffffffff826a09e0 r intel_hpll_vco.blb_vco
-ffffffff826a0aa0 r epic_pci_subsys_info
-ffffffff826a0ac0 r atom_arg_mask
-ffffffff826a0ac0 r atom_arg_mask
-ffffffff826a0b20 r butmap
-ffffffff826a0b60 r GFX_RLC_SRM_INDEX_CNTL_DATA_OFFSETS
-ffffffff826a0ba0 r comsoft.lsrmap
-ffffffff826a0be0 r tulip_mii_phy_readspecific.table
-ffffffff826a0c00 r kbl_revids
-ffffffff826a0ca0 r intel_hpll_vco.pnv_vco
-ffffffff826a0d00 r dmapageport
-ffffffff826a0dc0 r intel_hpll_vco.ctg_vco
-ffffffff826a0e80 r drm_calculate_luminance_range.pre_computed_values
-ffffffff826a1000 R sili_atascsi_methods
-ffffffff826a2000 R ncr53c9x_switch
-ffffffff826a3000 r scf_period
-ffffffff826a4000 R siop_script
-ffffffff826a45a0 R lun_switch
-ffffffff826a45d0 R tag_switch
-ffffffff826a4660 R load_dsa
-ffffffff826a46c4 R siop_led_on
-ffffffff826a46cc R siop_led_off
-ffffffff826a46d8 R siop_switch
-ffffffff826a5000 R ep_vortex_media
-ffffffff826a5100 R ep_default_to_media
-ffffffff826a6000 R wi_card_ident
-ffffffff826a8000 R ucode_table
-ffffffff826a9000 r re_revisions
-ffffffff826a9290 r re_kstats_tpl
-ffffffff826ab000 R smc91cxx_media
-ffffffff826ab010 R smc91cxx_mii_bitbang_ops
-ffffffff826ac000 R dl10019_mii_bitbang_ops
-ffffffff826ac028 R dl10022_mii_bitbang_ops
-ffffffff826ad000 R ax88190_mii_bitbang_ops
-ffffffff826af000 R ac97_audio_default
-ffffffff826af020 R ac97_on_off
-ffffffff826af324 R ac97_mic_select
-ffffffff826af628 R ac97_mono_select
-ffffffff826af92c R ac97_source
-ffffffff826afc30 R ac97_volume_stereo
-ffffffff826afc4c R ac97_volume_mono
-ffffffff826afc70 R source_info
-ffffffff826b0470 R ac97_ad
-ffffffff826b0580 R ac97_ak
-ffffffff826b0610 R ac97_av
-ffffffff826b0750 R ac97_rl
-ffffffff826b07a0 R ac97_cm
-ffffffff826b0820 R ac97_cr
-ffffffff826b0840 R ac97_cs
-ffffffff826b0920 R ac97_cx
-ffffffff826b0980 R ac97_dt
-ffffffff826b09a0 R ac97_em
-ffffffff826b09d0 R ac97_es
-ffffffff826b09f0 R ac97_is
-ffffffff826b0a10 R ac97_ic
-ffffffff826b0a90 R ac97_it
-ffffffff826b0ac0 R ac97_ns
-ffffffff826b0b80 R ac97_ps
-ffffffff826b0bb0 R ac97_sl
-ffffffff826b0bd0 R ac97_st
-ffffffff826b0d20 R ac97_vi
-ffffffff826b0d50 R ac97_tt
-ffffffff826b0dd0 R ac97_ti
-ffffffff826b0df0 R ac97_wb
-ffffffff826b0e10 R ac97_wo
-ffffffff826b0ea0 R ac97_ym
-ffffffff826b0ef0 R ac97_vendors
-ffffffff826b11f0 R ac97enhancement
-ffffffff826b12f0 R ac97feature
-ffffffff826b2000 R lm_chips
-ffffffff826b2020 R lm78_sensors
-ffffffff826b21a0 R w83627hf_sensors
-ffffffff826b23a0 R w83627ehf_sensors
-ffffffff826b25c0 R w83627dhg_sensors
-ffffffff826b27c0 R nct6776f_sensors
-ffffffff826b2a00 R nct6779d_sensors
-ffffffff826b2d60 R w83637hf_sensors
-ffffffff826b2f20 R w83697hf_sensors
-ffffffff826b30c0 R w83781d_sensors
-ffffffff826b3280 R w83782d_sensors
-ffffffff826b3480 R w83783s_sensors
-ffffffff826b3600 R w83791d_sensors
-ffffffff826b3860 R w83792d_sensors
-ffffffff826b3ae0 R as99127f_sensors
-ffffffff826b4000 r ar5k_known_products
-ffffffff826b4110 r ar5111_gain_opt
-ffffffff826b41e0 r ar5112_gain_opt
-ffffffff826b42b0 r ar5k_5ghz_channels
-ffffffff826b4a00 r ar5k_2ghz_channels
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-ffffffff826b5350 r ar5112a_rf
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+ffffffff8222f5e0 T dp_trace_set_edp_power_timestamp
+ffffffff8222f6c0 T dp_trace_get_edp_poweron_timestamp
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+ffffffff82230000 T set_dio_throttled_vcp_size
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+ffffffff82232160 t enable_hpo_dp_link_output
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+ffffffff82548000 T alltraps
+ffffffff82548138 T recall_trap
+ffffffff82548150 T alltraps_kern
+ffffffff82548153 T alltraps_kern_meltdown
+ffffffff82549000 ? Xsyscall32
+ffffffff82549000 A __kutext_start
+ffffffff82549000 A __text_page_end
+ffffffff8254a000 ? Xtrap00
+ffffffff8254a010 ? Xtrap01
+ffffffff8254a020 ? Xtrap02
+ffffffff8254a028 c calltrap_specstk
+ffffffff8254a0f0 ? calltrap_specstk_tramp
+ffffffff8254a110 ? Xtrap03
+ffffffff8254a120 ? Xtrap04
+ffffffff8254a130 ? Xtrap05
+ffffffff8254a140 ? Xtrap06
+ffffffff8254a150 ? Xtrap07
+ffffffff8254a160 ? Xtrap08
+ffffffff8254a170 ? Xtrap09
+ffffffff8254a180 ? Xtrap0a
+ffffffff8254a190 ? Xtrap0b
+ffffffff8254a1a0 ? Xtrap0c
+ffffffff8254a1b0 ? Xtrap0d
+ffffffff8254a240 ? Xtrap0e
+ffffffff8254a250 ? Xintrspurious
+ffffffff8254a250 ? Xtrap0f
+ffffffff8254a260 ? Xtrap10
+ffffffff8254a270 ? Xtrap11
+ffffffff8254a280 ? Xtrap12
+ffffffff8254a290 ? Xtrap13
+ffffffff8254a2a0 ? Xtrap14
+ffffffff8254a2b0 ? Xtrap15
+ffffffff8254a2c0 ? Xtrap16
+ffffffff8254a2c0 ? Xtrap17
+ffffffff8254a2c0 ? Xtrap18
+ffffffff8254a2c0 ? Xtrap19
+ffffffff8254a2c0 ? Xtrap1a
+ffffffff8254a2c0 ? Xtrap1b
+ffffffff8254a2c0 ? Xtrap1c
+ffffffff8254a2c0 ? Xtrap1d
+ffffffff8254a2c0 ? Xtrap1e
+ffffffff8254a2c0 ? Xtrap1f
+ffffffff8254a2d0 ? x2apic_eoi
+ffffffff8254a2f0 ? Xintr_lapic_ipi
+ffffffff8254a330 ? Xipi_invltlb
+ffffffff8254a360 ? Xipi_invlpg
+ffffffff8254a390 ? Xipi_invlrange
+ffffffff8254a3d0 ? Xipi_invltlb_pcid
+ffffffff8254a410 ? Xipi_invlpg_pcid
+ffffffff8254a460 ? Xipi_invlrange_pcid
+ffffffff8254a4d0 ? Xintr_lapic_ltimer
+ffffffff8254a510 ? Xintr_xen_upcall
+ffffffff8254a550 ? Xintr_hyperv_upcall
+ffffffff8254a590 ? Xintr_legacy0
+ffffffff8254a5d0 ? Xintr_legacy1
+ffffffff8254a610 ? Xintr_legacy2
+ffffffff8254a650 ? Xintr_legacy3
+ffffffff8254a690 ? Xintr_legacy4
+ffffffff8254a6d0 ? Xintr_legacy5
+ffffffff8254a710 ? Xintr_legacy6
+ffffffff8254a750 ? Xintr_legacy7
+ffffffff8254a790 ? Xintr_legacy8
+ffffffff8254a7d0 ? Xintr_legacy9
+ffffffff8254a810 ? Xintr_legacy10
+ffffffff8254a850 ? Xintr_legacy11
+ffffffff8254a890 ? Xintr_legacy12
+ffffffff8254a8d0 ? Xintr_legacy13
+ffffffff8254a910 ? Xintr_legacy14
+ffffffff8254a950 ? Xintr_legacy15
+ffffffff8254a990 ? Xintr_ioapic_edge0
+ffffffff8254a9d0 ? Xintr_ioapic_edge1
+ffffffff8254aa10 ? Xintr_ioapic_edge2
+ffffffff8254aa50 ? Xintr_ioapic_edge3
+ffffffff8254aa90 ? Xintr_ioapic_edge4
+ffffffff8254aad0 ? Xintr_ioapic_edge5
+ffffffff8254ab10 ? Xintr_ioapic_edge6
+ffffffff8254ab50 ? Xintr_ioapic_edge7
+ffffffff8254ab90 ? Xintr_ioapic_edge8
+ffffffff8254abd0 ? Xintr_ioapic_edge9
+ffffffff8254ac10 ? Xintr_ioapic_edge10
+ffffffff8254ac50 ? Xintr_ioapic_edge11
+ffffffff8254ac90 ? Xintr_ioapic_edge12
+ffffffff8254acd0 ? Xintr_ioapic_edge13
+ffffffff8254ad10 ? Xintr_ioapic_edge14
+ffffffff8254ad50 ? Xintr_ioapic_edge15
+ffffffff8254ad90 ? Xintr_ioapic_edge16
+ffffffff8254add0 ? Xintr_ioapic_edge17
+ffffffff8254ae10 ? Xintr_ioapic_edge18
+ffffffff8254ae50 ? Xintr_ioapic_edge19
+ffffffff8254ae90 ? Xintr_ioapic_edge20
+ffffffff8254aed0 ? Xintr_ioapic_edge21
+ffffffff8254af10 ? Xintr_ioapic_edge22
+ffffffff8254af50 ? Xintr_ioapic_edge23
+ffffffff8254af90 ? Xintr_ioapic_edge24
+ffffffff8254afd0 ? Xintr_ioapic_edge25
+ffffffff8254b010 ? Xintr_ioapic_edge26
+ffffffff8254b050 ? Xintr_ioapic_edge27
+ffffffff8254b090 ? Xintr_ioapic_edge28
+ffffffff8254b0d0 ? Xintr_ioapic_edge29
+ffffffff8254b110 ? Xintr_ioapic_edge30
+ffffffff8254b150 ? Xintr_ioapic_edge31
+ffffffff8254b190 ? Xintr_ioapic_edge32
+ffffffff8254b1d0 ? Xintr_ioapic_edge33
+ffffffff8254b210 ? Xintr_ioapic_edge34
+ffffffff8254b250 ? Xintr_ioapic_edge35
+ffffffff8254b290 ? Xintr_ioapic_edge36
+ffffffff8254b2d0 ? Xintr_ioapic_edge37
+ffffffff8254b310 ? Xintr_ioapic_edge38
+ffffffff8254b350 ? Xintr_ioapic_edge39
+ffffffff8254b390 ? Xintr_ioapic_edge40
+ffffffff8254b3d0 ? Xintr_ioapic_edge41
+ffffffff8254b410 ? Xintr_ioapic_edge42
+ffffffff8254b450 ? Xintr_ioapic_edge43
+ffffffff8254b490 ? Xintr_ioapic_edge44
+ffffffff8254b4d0 ? Xintr_ioapic_edge45
+ffffffff8254b510 ? Xintr_ioapic_edge46
+ffffffff8254b550 ? Xintr_ioapic_edge47
+ffffffff8254b590 ? Xintr_ioapic_edge48
+ffffffff8254b5d0 ? Xintr_ioapic_edge49
+ffffffff8254b610 ? Xintr_ioapic_edge50
+ffffffff8254b650 ? Xintr_ioapic_edge51
+ffffffff8254b690 ? Xintr_ioapic_edge52
+ffffffff8254b6d0 ? Xintr_ioapic_edge53
+ffffffff8254b710 ? Xintr_ioapic_edge54
+ffffffff8254b750 ? Xintr_ioapic_edge55
+ffffffff8254b790 ? Xintr_ioapic_edge56
+ffffffff8254b7d0 ? Xintr_ioapic_edge57
+ffffffff8254b810 ? Xintr_ioapic_edge58
+ffffffff8254b850 ? Xintr_ioapic_edge59
+ffffffff8254b890 ? Xintr_ioapic_edge60
+ffffffff8254b8d0 ? Xintr_ioapic_edge61
+ffffffff8254b910 ? Xintr_ioapic_edge62
+ffffffff8254b950 ? Xintr_ioapic_edge63
+ffffffff8254b990 ? Xintr_ioapic_level0
+ffffffff8254b9d0 ? Xintr_ioapic_level1
+ffffffff8254ba10 ? Xintr_ioapic_level2
+ffffffff8254ba50 ? Xintr_ioapic_level3
+ffffffff8254ba90 ? Xintr_ioapic_level4
+ffffffff8254bad0 ? Xintr_ioapic_level5
+ffffffff8254bb10 ? Xintr_ioapic_level6
+ffffffff8254bb50 ? Xintr_ioapic_level7
+ffffffff8254bb90 ? Xintr_ioapic_level8
+ffffffff8254bbd0 ? Xintr_ioapic_level9
+ffffffff8254bc10 ? Xintr_ioapic_level10
+ffffffff8254bc50 ? Xintr_ioapic_level11
+ffffffff8254bc90 ? Xintr_ioapic_level12
+ffffffff8254bcd0 ? Xintr_ioapic_level13
+ffffffff8254bd10 ? Xintr_ioapic_level14
+ffffffff8254bd50 ? Xintr_ioapic_level15
+ffffffff8254bd90 ? Xintr_ioapic_level16
+ffffffff8254bdd0 ? Xintr_ioapic_level17
+ffffffff8254be10 ? Xintr_ioapic_level18
+ffffffff8254be50 ? Xintr_ioapic_level19
+ffffffff8254be90 ? Xintr_ioapic_level20
+ffffffff8254bed0 ? Xintr_ioapic_level21
+ffffffff8254bf10 ? Xintr_ioapic_level22
+ffffffff8254bf50 ? Xintr_ioapic_level23
+ffffffff8254bf90 ? Xintr_ioapic_level24
+ffffffff8254bfd0 ? Xintr_ioapic_level25
+ffffffff8254c010 ? Xintr_ioapic_level26
+ffffffff8254c050 ? Xintr_ioapic_level27
+ffffffff8254c090 ? Xintr_ioapic_level28
+ffffffff8254c0d0 ? Xintr_ioapic_level29
+ffffffff8254c110 ? Xintr_ioapic_level30
+ffffffff8254c150 ? Xintr_ioapic_level31
+ffffffff8254c190 ? Xintr_ioapic_level32
+ffffffff8254c1d0 ? Xintr_ioapic_level33
+ffffffff8254c210 ? Xintr_ioapic_level34
+ffffffff8254c250 ? Xintr_ioapic_level35
+ffffffff8254c290 ? Xintr_ioapic_level36
+ffffffff8254c2d0 ? Xintr_ioapic_level37
+ffffffff8254c310 ? Xintr_ioapic_level38
+ffffffff8254c350 ? Xintr_ioapic_level39
+ffffffff8254c390 ? Xintr_ioapic_level40
+ffffffff8254c3d0 ? Xintr_ioapic_level41
+ffffffff8254c410 ? Xintr_ioapic_level42
+ffffffff8254c450 ? Xintr_ioapic_level43
+ffffffff8254c490 ? Xintr_ioapic_level44
+ffffffff8254c4d0 ? Xintr_ioapic_level45
+ffffffff8254c510 ? Xintr_ioapic_level46
+ffffffff8254c550 ? Xintr_ioapic_level47
+ffffffff8254c590 ? Xintr_ioapic_level48
+ffffffff8254c5d0 ? Xintr_ioapic_level49
+ffffffff8254c610 ? Xintr_ioapic_level50
+ffffffff8254c650 ? Xintr_ioapic_level51
+ffffffff8254c690 ? Xintr_ioapic_level52
+ffffffff8254c6d0 ? Xintr_ioapic_level53
+ffffffff8254c710 ? Xintr_ioapic_level54
+ffffffff8254c750 ? Xintr_ioapic_level55
+ffffffff8254c790 ? Xintr_ioapic_level56
+ffffffff8254c7d0 ? Xintr_ioapic_level57
+ffffffff8254c810 ? Xintr_ioapic_level58
+ffffffff8254c850 ? Xintr_ioapic_level59
+ffffffff8254c890 ? Xintr_ioapic_level60
+ffffffff8254c8d0 ? Xintr_ioapic_level61
+ffffffff8254c910 ? Xintr_ioapic_level62
+ffffffff8254c950 ? Xintr_ioapic_level63
+ffffffff8254d000 ? codepatch_fill_nop
+ffffffff8254d000 A __cptext_start
+ffffffff8254d000 A __kutext_end
+ffffffff8254d0b0 ? codepatch_maprw
+ffffffff8254d190 ? codepatch_unmaprw
+ffffffff8254d200 ? codepatch_nop
+ffffffff8254d360 ? codepatch_replace
+ffffffff8254d510 ? codepatch_call
+ffffffff8254d530 ? codepatch_jmp
+ffffffff8254e000 A __cptext_end
+ffffffff8254e000 A __rodata_start
+ffffffff8254e000 C _etext
+ffffffff8254e000 C etext
+ffffffff8254f000 r seeprom_read
+ffffffff8254f004 r icl_mg_pll_find_divisors.div1_vals
+ffffffff8254f028 r gen9bc_tgp_ddc_pin_map
+ffffffff8254f038 r athn_ac2qid
+ffffffff8254f038 r athn_ac2qid
+ffffffff8254f038 r athn_ac2qid
+ffffffff8254f044 r rtwn_get_rssi.cckoff
+ffffffff8254f06c r rsu_ac2qid
+ffffffff8254f07c r pckbc_portcmd
+ffffffff8254f080 r tht_fifo_write_pad.pad
+ffffffff8254f088 r rsu_get_rssi.cckoff
+ffffffff8254f09c r adlp_n_revids
+ffffffff8254f0ec r apple_iso_trans
+ffffffff8254f0f0 r dg2_g12_revid_step_tbl
+ffffffff8254f0f8 r wihap_check_tx.txratetable
+ffffffff8254f0fc r dmamode
+ffffffff8254f124 r gen9_edram_size_mb.sets
+ffffffff82550000 r isomappings
+ffffffff82550080 r unimappings
+ffffffff82550230 r replacements
+ffffffff82553b06 r cmd0646_9_tim_udma
+ffffffff825a7591 r pp_r600_decoded_lanes
+ffffffff825c28bb r cmd680_setup_channel.udma_tbl
+ffffffff825ca527 r apollo_udma33_tim
+ffffffff825d0614 r substchar
+ffffffff825d26c2 r apollo_udma100_tim
+ffffffff825f9fd9 r apollo_udma66_tim
+ffffffff8260146c r apollo_pio_rec
+ffffffff82610856 r cy_pio_rec
+ffffffff8263fd3b r apollo_udma133_tim
+ffffffff8264c8e0 R drm_ca
+ffffffff8264c908 R drm_filtops
+ffffffff8264c938 R drmread_filtops
+ffffffff8264d000 r vga_emulops
+ffffffff8264d048 R vga_stdscreen
+ffffffff8264d078 R vga_stdscreen_mono
+ffffffff8264d0a8 R vga_stdscreen_bf
+ffffffff8264d0d8 R vga_40lscreen
+ffffffff8264d108 R vga_40lscreen_mono
+ffffffff8264d138 R vga_40lscreen_bf
+ffffffff8264d168 R vga_50lscreen
+ffffffff8264d198 R vga_50lscreen_mono
+ffffffff8264d1c8 R vga_50lscreen_bf
+ffffffff8264d1f8 R vga_screenlist
+ffffffff8264d208 R vga_screenlist_mono
+ffffffff8264d218 R vga_accessops
+ffffffff8264d278 r i945_wm_info
+ffffffff8264d2b0 r bgansitopc
+ffffffff8264d2b8 r pctoansi
+ffffffff8264d2f8 r sdma_offsets
+ffffffff8264d2f8 r sdma_offsets
+ffffffff8264d328 r iha_rate_tbl
+ffffffff8264d360 r i830_a_wm_info
+ffffffff8264d398 r gen9_edram_size_mb.ways
+ffffffff8264d400 r aggr_periodic_times
+ffffffff8264d480 r jsl_ehl_revids
+ffffffff8264d4f8 r michael_final.pad
+ffffffff8264d520 r rt_copysa.maskarray
+ffffffff8264d528 r i915_wm_info
+ffffffff8264d530 r amdgpu_ih_clientid_jpeg
+ffffffff8264d530 r amdgpu_ih_clientid_uvds
+ffffffff8264d530 r amdgpu_ih_clientid_vcns
+ffffffff8264d530 r amdgpu_ih_clientid_vcns
+ffffffff8264d530 r amdgpu_ih_clientid_vcns
+ffffffff8264d568 r vga_setfontset.cmaptabb
+ffffffff8264d580 r tgl_revids
+ffffffff8264d5d8 r i830_bc_wm_info
+ffffffff8264d648 r hsw_activate_psr2.map
+ffffffff8264d688 r __drm_universal_plane_init.default_modifiers
+ffffffff8264d698 r iwn_tid2fifo
+ffffffff8264d6b0 r vga_setfontset.cmaptaba
+ffffffff8264d6b8 r crtc_offsets
+ffffffff8264d6b8 r crtc_offsets
+ffffffff8264d6b8 r crtc_offsets
+ffffffff8264d6d8 r link_speed
+ffffffff8264d6d8 r link_speed
+ffffffff8264d6d8 r link_speed
+ffffffff8264d750 r rtwn_r88e_get_rssi.cckoff
+ffffffff8264e000 R edid_vendors
+ffffffff8264e2c0 R edid_nvendors
+ffffffff8264e2d0 R edid_products
+ffffffff8264e330 R edid_nproducts
+ffffffff8264e340 r _edid_modes
+ffffffff8264f000 R videomode_list
+ffffffff82650080 R videomode_count
+ffffffff82651000 r ahc_hard_errors
+ffffffff82651080 r critical_sections
+ffffffff826510b0 r patches
+ffffffff82651d50 r seqprog
+ffffffff82653000 r ahc_switch
+ffffffff82654000 r termstat_strings
+ffffffff82654020 r critical_sections
+ffffffff82654060 r seqprog
+ffffffff82654d50 r patches
+ffffffff82656000 r ahd_switch
+ffffffff82657000 R aic_switch
+ffffffff82658000 R adw_switch
+ffffffff82659000 R gdt_switch
+ffffffff8265a000 R twe_switch
+ffffffff8265b000 R ciss_switch
+ffffffff8265b030 R ciss_level
+ffffffff8265b050 R ciss_stat
+ffffffff8265c000 R ami_switch
+ffffffff8265c028 R ami_raw_switch
+ffffffff8265d000 R mfi_switch
+ffffffff8265d028 R mfi_pd_switch
+ffffffff8265d050 r mfi_iop_xscale
+ffffffff8265d080 r mfi_iop_ppc
+ffffffff8265d0b0 r mfi_iop_gen2
+ffffffff8265d0e0 r mfi_iop_skinny
+ffffffff8265d110 r mfi_bbu_indicators
+ffffffff8265d1c0 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs
+ffffffff8265d1f0 r chv_oa_mux_regs
+ffffffff8265d210 r fiji_clock_stretcher_lookup_table
+ffffffff8265d210 r tonga_clock_stretcher_lookup_table
+ffffffff8265d240 r link_speed
+ffffffff8265d240 r link_speed
+ffffffff8265d240 r link_speed
+ffffffff8265d280 r drm_fb_xfrm.default_dst_pitch
+ffffffff8265d280 r non_supported_protection
+ffffffff8265d380 r tgl_uy_revids
+ffffffff8265d3d0 r bwi_phy_noise_11g_rev1
+ffffffff8265d450 r cardslot_process_event.antonym_ev
+ffffffff8265d4e0 r gen11_oa_mux_regs
+ffffffff8265d5d0 r ddr2_cycle_tenths
+ffffffff8265d640 r rtw_intr_rx.ratetbl
+ffffffff8265d6c0 r abm_config
+ffffffff8265d730 r getbootinfo.ports.30
+ffffffff8265d780 r reg_offsets
+ffffffff8265d790 r bwi_rf_lo_measure_11g.rf_lo_adjust
+ffffffff8265d7a0 r init_non_clock_fields.look_up
+ffffffff8265d7b0 r uftdi_8u232am_getrate.roundoff
+ffffffff8265d800 r zyd_rx_data.rates
+ffffffff8265d810 r ieee80211_ra_valid_tx_mcs.max_mcs
+ffffffff8265d850 r mmio_invalidate_full.gen8_regs
+ffffffff8265d880 r bwi_phy_noise_11g
+ffffffff8265d890 r hpt366_pio
+ffffffff8265d8c0 r glk_revids
+ffffffff8265d910 r bwi_rf_calc_nrssi_slope_11g.save_phy3_regs
+ffffffff8265d930 r ether_crc32_be_update.rev
+ffffffff8265d930 r rtw_grf5101_mac_crypt.caesar
+ffffffff8265d980 r snb_b_fdi_train_param
+ffffffff8265e000 R qlw_switch
+ffffffff8265f000 R isp_2100_risc_code
+ffffffff82671bf0 R isp_2200_risc_code
+ffffffff82684990 R isp_2300_risc_code
+ffffffff8269e408 R qla_switch
+ffffffff8269e430 r qla_regs_2100
+ffffffff8269e460 r qla_regs_2200
+ffffffff8269e490 r qla_regs_23XX
+ffffffff8269f000 R ahci_atascsi_methods
+ffffffff826a0000 R nvme_switch
+ffffffff826a0028 r nvme_ops
+ffffffff826a1000 R mpi_switch
+ffffffff826a1100 r intel_hpll_vco.elk_vco
+ffffffff826a1160 r pin_offsets
+ffffffff826a11c0 r firmware_list
+ffffffff826a1220 r atom_arg_shift
+ffffffff826a1220 r atom_arg_shift
+ffffffff826a1260 r pf_syncookie_wstab
+ffffffff826a1280 r ieee80211_media_init.mopts
+ffffffff826a12e0 r add_entropy_words.twist_table
+ffffffff826a1380 r urtw_8225v2_txpwr_cck
+ffffffff826a13a0 r bwfm_pci_prio2fifo
+ffffffff826a13a0 r ieee80211_up_to_ac.up_to_ac
+ffffffff826a1460 r paritytab
+ffffffff826a1460 r x86emu_parity_tab
+ffffffff826a1480 r legacy_connector_convert
+ffffffff826a14c0 r gen7_oa_mux_regs
+ffffffff826a14e0 r hsw_oa_mux_regs
+ffffffff826a1500 r notetab
+ffffffff826a1520 r urtw_8225v2_txpwr_cck_ch14
+ffffffff826a1540 r bwi_rf_calibval.rf_calibvals
+ffffffff826a15e0 r pf_syncookie_msstab
+ffffffff826a1640 r xgmi3x16_pcs_err_status_reg_aldebaran
+ffffffff826a16a0 r uath_wme_init.uath_wme_11g
+ffffffff826a16c0 r gen7_oa_b_counters
+ffffffff826a1820 r icl_revids
+ffffffff826a18e0 r rtwn_iq_calib_run.reg_adda
+ffffffff826a1920 r atom_def_dst
+ffffffff826a1920 r atom_def_dst
+ffffffff826a1960 r sha256_initial_hash_value
+ffffffff826a19c0 r otus_edca_def
+ffffffff826a19e0 r intel_hpll_vco.blb_vco
+ffffffff826a1aa0 r epic_pci_subsys_info
+ffffffff826a1ac0 r atom_arg_mask
+ffffffff826a1ac0 r atom_arg_mask
+ffffffff826a1b20 r butmap
+ffffffff826a1b60 r GFX_RLC_SRM_INDEX_CNTL_DATA_OFFSETS
+ffffffff826a1ba0 r comsoft.lsrmap
+ffffffff826a1be0 r tulip_mii_phy_readspecific.table
+ffffffff826a1c00 r kbl_revids
+ffffffff826a1ca0 r intel_hpll_vco.pnv_vco
+ffffffff826a1d00 r dmapageport
+ffffffff826a1dc0 r intel_hpll_vco.ctg_vco
+ffffffff826a1e80 r drm_calculate_luminance_range.pre_computed_values
+ffffffff826a2000 R sili_atascsi_methods
+ffffffff826a3000 R ncr53c9x_switch
+ffffffff826a4000 r scf_period
+ffffffff826a5000 R siop_script
+ffffffff826a55a0 R lun_switch
+ffffffff826a55d0 R tag_switch
+ffffffff826a5660 R load_dsa
+ffffffff826a56c4 R siop_led_on
+ffffffff826a56cc R siop_led_off
+ffffffff826a56d8 R siop_switch
+ffffffff826a6000 R ep_vortex_media
+ffffffff826a6100 R ep_default_to_media
+ffffffff826a7000 R wi_card_ident
+ffffffff826a9000 R ucode_table
+ffffffff826aa000 r re_revisions
+ffffffff826aa290 r re_kstats_tpl
+ffffffff826ac000 R smc91cxx_media
+ffffffff826ac010 R smc91cxx_mii_bitbang_ops
+ffffffff826ad000 R dl10019_mii_bitbang_ops
+ffffffff826ad028 R dl10022_mii_bitbang_ops
+ffffffff826ae000 R ax88190_mii_bitbang_ops
+ffffffff826b0000 R ac97_audio_default
+ffffffff826b0020 R ac97_on_off
+ffffffff826b0324 R ac97_mic_select
+ffffffff826b0628 R ac97_mono_select
+ffffffff826b092c R ac97_source
+ffffffff826b0c30 R ac97_volume_stereo
+ffffffff826b0c4c R ac97_volume_mono
+ffffffff826b0c70 R source_info
+ffffffff826b1470 R ac97_ad
+ffffffff826b1580 R ac97_ak
+ffffffff826b1610 R ac97_av
+ffffffff826b1750 R ac97_rl
+ffffffff826b17a0 R ac97_cm
+ffffffff826b1820 R ac97_cr
+ffffffff826b1840 R ac97_cs
+ffffffff826b1920 R ac97_cx
+ffffffff826b1980 R ac97_dt
+ffffffff826b19a0 R ac97_em
+ffffffff826b19d0 R ac97_es
+ffffffff826b19f0 R ac97_is
+ffffffff826b1a10 R ac97_ic
+ffffffff826b1a90 R ac97_it
+ffffffff826b1ac0 R ac97_ns
+ffffffff826b1b80 R ac97_ps
+ffffffff826b1bb0 R ac97_sl
+ffffffff826b1bd0 R ac97_st
+ffffffff826b1d20 R ac97_vi
+ffffffff826b1d50 R ac97_tt
+ffffffff826b1dd0 R ac97_ti
+ffffffff826b1df0 R ac97_wb
+ffffffff826b1e10 R ac97_wo
+ffffffff826b1ea0 R ac97_ym
+ffffffff826b1ef0 R ac97_vendors
+ffffffff826b21f0 R ac97enhancement
+ffffffff826b22f0 R ac97feature
+ffffffff826b3000 R lm_chips
+ffffffff826b3020 R lm78_sensors
+ffffffff826b31a0 R w83627hf_sensors
+ffffffff826b33a0 R w83627ehf_sensors
+ffffffff826b35c0 R w83627dhg_sensors
+ffffffff826b37c0 R nct6776f_sensors
+ffffffff826b3a00 R nct6779d_sensors
+ffffffff826b3d60 R w83637hf_sensors
+ffffffff826b3f20 R w83697hf_sensors
+ffffffff826b40c0 R w83781d_sensors
+ffffffff826b4280 R w83782d_sensors
+ffffffff826b4480 R w83783s_sensors
+ffffffff826b4600 R w83791d_sensors
+ffffffff826b4860 R w83792d_sensors
+ffffffff826b4ae0 R as99127f_sensors
+ffffffff826b5000 r ar5k_known_products
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+ffffffff826b51e0 r ar5112_gain_opt
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-ffffffff828052d0 R pci_subclass_multimedia
-ffffffff82805360 R pci_subclass_memory
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-ffffffff828055d0 R pci_subclass_system
-ffffffff828056c0 R pci_subclass_input
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-ffffffff82805b20 R pci_subclass_crypto
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-ffffffff8283d1d0 R eap_devices
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-ffffffff8283e008 R auacer_ca
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-ffffffff82844000 R auixp_pci_devices
-ffffffff82844010 R auixp_ca
-ffffffff82844038 R auixp_hw_if
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-ffffffff82845028 R cs4280_hw_if
-ffffffff828450e0 R cs4280_devices
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-ffffffff82847000 R auvia_ca
-ffffffff82847028 R auvia_hw_if
-ffffffff828470e0 R auvia_devices
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-ffffffff82848000 R gdt_pci_ca
-ffffffff82849000 R ciss_pci_ca
-ffffffff82849030 R ciss_pci_devices
-ffffffff8284a000 R qlw_pci_ca
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-ffffffff8284f9f0 r isp_1080_risc_code
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-ffffffff828c3000 R mpii_ca
-ffffffff828c3028 R mpii_switch
-ffffffff828c3050 r mpii_devices
-ffffffff828c4000 R sili_pci_ca
-ffffffff828c4030 r sili_devices
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-ffffffff828c5120 R aq_fw2x_ops
-ffffffff828c5140 R aq_ca
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-ffffffff828c8000 R pcn_ca
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-ffffffff828cb630 R pciide_amd_products
-ffffffff828cb690 R pciide_cmd_products
-ffffffff828cb730 R pciide_via_products
-ffffffff828cb810 R pciide_cypress_products
-ffffffff828cb820 R pciide_sis_products
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-ffffffff828cb890 R pciide_acer_products
-ffffffff828cb8a0 R pciide_triones_products
-ffffffff828cb8f0 R pciide_promise_products
-ffffffff828cbac0 R pciide_acard_products
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-ffffffff828cbbb0 R pciide_nvidia_products
-ffffffff828cbe80 R pciide_ite_products
-ffffffff828cbea0 R pciide_ati_products
-ffffffff828cbf20 R pciide_jmicron_products
-ffffffff828cbf70 R pciide_phison_products
-ffffffff828cbf80 R pciide_rdc_products
-ffffffff828cbf90 R pciide_vendors
-ffffffff828cc140 R pciide_pci_ca
-ffffffff828cc168 R pciide_jmb_ca
-ffffffff828cc190 r piix_isp_dma
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-ffffffff828cd000 R ppb_ca
-ffffffff828ce000 R cy_pci_ca
-ffffffff828ce030 R cy_pci_devices
-ffffffff828cf000 R rl_pci_ca
-ffffffff828cf030 R rl_pci_devices
-ffffffff828d0000 R re_pci_devices
-ffffffff828d0030 R re_pci_ca
-ffffffff828d1000 R vr_ca
-ffffffff828d2000 R txp_ca
-ffffffff828d2030 R txp_devices
-ffffffff828d3000 r cards
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-ffffffff828d41a0 r pixfmt_table
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-ffffffff828d5000 R bktr_ca
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-ffffffff828d6000 r tuners
-ffffffff828d6170 r freqTable
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-ffffffff828d6310 r hrccable
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-ffffffff828d8000 R fxp_pci_ca
-ffffffff828d8030 R fxp_pci_devices
-ffffffff828d9000 R em_devices
-ffffffff828d92e0 R em_ca
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-ffffffff828db000 R ixgb_devices
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-ffffffff828dc0b8 R ix_ca
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-ffffffff828dc3e0 r ix_rxq_kstats_tpl
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-ffffffff828e0000 R ixl_ca
-ffffffff828e0030 R ixl_port_counters
-ffffffff828e02c0 R ixl_vsi_counters
-ffffffff828e0380 r ixl_devices
-ffffffff828e04c0 r ixl_710
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-ffffffff828e1000 R xge_ca
-ffffffff828e1028 R xge_devices
-ffffffff828e1030 r xge_fix_mac
-ffffffff828e1110 r xge_xena_dtx_cfg
-ffffffff828e1170 r xge_herc_dtx_cfg
-ffffffff828e2000 R thtc_ca
-ffffffff828e2028 R tht_ca
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-ffffffff828e2068 r tht_link_state.interval
-ffffffff828e3000 R myx_ca
-ffffffff828e3028 R myx_devices
-ffffffff828e4000 R oce_ca
-ffffffff828e4030 R oce_devices
-ffffffff828e5000 R dc_pci_ca
-ffffffff828e6000 R epic_pci_ca
-ffffffff828e6028 R epic_pci_devices
-ffffffff828e7000 R ti_pci_ca
-ffffffff828e7030 R ti_devices
-ffffffff828e8000 R ne_pci_ca
-ffffffff828e8030 R ne_pci_prod
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-ffffffff828e9030 R gem_pci_devices
-ffffffff828e9050 r gem_promhdr
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-ffffffff828ea028 R cas_pci_devices
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-ffffffff828eb000 R sf_pci_ca
-ffffffff828eb028 R sf_pci_products
-ffffffff828ec000 R sis_ca
-ffffffff828ec028 R sis_devices
-ffffffff828ed000 R se_devices
-ffffffff828ed008 R se_ca
-ffffffff828ee000 R uhci_pci_ca
-ffffffff828ef000 R ohci_pci_ca
-ffffffff828f0000 R ehci_pci_ca
-ffffffff828f1000 R xhci_pci_ca
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-ffffffff828f40d0 R msk_ca
-ffffffff828f4100 r msk_mib
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-ffffffff82901360 r iwn4965_rf_gain_5ghz
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-ffffffff82903020 R iwx_9560_qu_c0_jf_b0_cfg
-ffffffff82903040 R iwx_qu_b0_hr1_b0
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-ffffffff829030c0 R iwx_qu_c0_hr_b0
-ffffffff829030e0 R iwx_ax201_cfg_qu_c0_hr_b0
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-ffffffff82903160 R iwx_cfg_quz_a0_hr_b0
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-ffffffff829031a0 R iwx_2ax_cfg_so_gf_a0_long
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-ffffffff82903220 R iwx_2ax_cfg_so_jf_b0
-ffffffff82903240 R iwx_nvm_channels_8000
-ffffffff82903280 R iwx_rates
-ffffffff829032e0 R iwx_mcs2ridx
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-ffffffff82903328 R iwx_ac_to_tx_fifo
-ffffffff82903330 r iwx_nvm_channels_uhb
-ffffffff8290339e r iwx_is_valid_mac_addr.reserved_mac
-ffffffff829033b0 r iwx_sf_full_timeout
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-ffffffff82904120 R cmpci_devices
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-ffffffff82904160 r cmpci_query_devinfo.mixer_classes
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-ffffffff82907030 R bge_devices
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-ffffffff82908020 R bnx_ca
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-ffffffff82909028 R vge_devices
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-ffffffff8290a028 R stge_mii_bitbang_ops
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-ffffffff8290d008 R jme_ca
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-ffffffff8290f038 R alc_ca
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-ffffffff82911030 R amdpm_ids
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-ffffffff82915028 R atw_pci_devices
-ffffffff82916000 R rtw_pci_ca
-ffffffff82916030 R rtw_pci_products
-ffffffff82917000 R rtwn_pci_ca
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-ffffffff8291b000 R pgt_pci_ca
-ffffffff8291b028 R pgt_pci_devices
-ffffffff8291c000 R malo_pci_ca
-ffffffff8291c028 R malo_pci_devices
-ffffffff8291d000 R bwi_pci_ca
-ffffffff8291d030 R bwi_pci_devices
-ffffffff8291e000 R piixpm_ca
-ffffffff8291e030 R piixpm_ids
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-ffffffff82922028 R lii_devices
-ffffffff82923000 R ichiic_ca
-ffffffff82923030 R ichiic_ids
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-ffffffff82924030 R viapm_ids
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-ffffffff82925028 R amdiic_ids
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-ffffffff82926030 R nviic_ids
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-ffffffff8292b008 R itherm_ca
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-ffffffff8292f000 R virtio_pci_ca
-ffffffff82930000 R dwiic_pci_ca
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-ffffffff82933040 R bnxt_ca
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-ffffffff82936090 r rge_phy_config_mac_cfg3.mac_cfg3_a438_value
-ffffffff829360b0 r rge_phy_config_mac_cfg3.mac_cfg3_b88e_value
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-ffffffff829361e0 r rtl8125_mac_cfg2_mcu
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-ffffffff8293c040 R igc_ca
-ffffffff8293d000 R ngbe_devices
-ffffffff8293d008 R ngbe_ca
-ffffffff8293e000 R com_pci_ca
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-ffffffff8293f048 R agp_ca
-ffffffff82940000 R intagp_ca
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-ffffffff82942000 r drm_bridge_priv_state_funcs
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-ffffffff82956070 R dma_fence_chain_ops
-ffffffff829560a8 R dmabufops
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 ffffffff82a7e000 r crtc_offsets
-ffffffff82a7e020 r dce_v11_0_ip_funcs
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-ffffffff82a7e0d8 R dce_v11_2_ip_block
-ffffffff82a7e0f0 r dce_v11_0_display_funcs
+ffffffff82a7e020 r dce_v10_0_ip_funcs
+ffffffff82a7e0c0 R dce_v10_0_ip_block
+ffffffff82a7e0d8 R dce_v10_1_ip_block
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 ffffffff82a7e150 r hpd_offsets
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-ffffffff82a7e310 r dce_v11_0_hpd_irq_funcs
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 ffffffff82a7e320 r interrupt_status_offsets
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 ffffffff82a7e4c0 r vga_control_regs
 ffffffff82a7e4e0 r dig_offsets
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-ffffffff82a82218 r gfx_v10_0_ring_funcs_gfx
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-ffffffff82a960f8 r gfx_v11_0_ring_funcs_kiq
-ffffffff82a96218 r gfx_v11_0_ring_funcs_gfx
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-ffffffff82a980b8 R gfx_v8_1_ip_block
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-ffffffff82a98110 r gfx_v8_0_ring_funcs_kiq
-ffffffff82a98230 r gfx_v8_0_ring_funcs_gfx
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-ffffffff82a9b100 r ras_gfx_subblocks
-ffffffff82a9bb80 r gfx_v9_0_edc_counter_regs
-ffffffff82a9bf20 r gfx_v9_0_ras_fields
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-ffffffff82aa1420 r gfx_v9_4_ras_fields
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-ffffffff82aa9060 r gfxhub_v2_1_vmhub_funcs
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+ffffffff82a7f0d8 R dce_v11_2_ip_block
+ffffffff82a7f0f0 r dce_v11_0_display_funcs
+ffffffff82a7f150 r hpd_offsets
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+ffffffff82a7f5b0 r polaris10_golden_settings_a11
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+ffffffff82a81000 R df_v3_6_funcs
+ffffffff82a81070 r df_v3_6_channel_number
+ffffffff82a82000 r GC_BASE
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+ffffffff82a83000 r gfx_v10_0_ip_funcs
+ffffffff82a830a0 R gfx_v10_0_ip_block
+ffffffff82a830b8 r gfx_v10_0_kiq_pm4_funcs
+ffffffff82a830f8 r gfx_v10_0_ring_funcs_kiq
+ffffffff82a83218 r gfx_v10_0_ring_funcs_gfx
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+ffffffff82a83478 r gfx_v10_0_priv_reg_irq_funcs
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+ffffffff82a83498 r gfx_v10_0_rlc_funcs
+ffffffff82a83500 r gfx_v10_0_rlc_funcs_sriov
+ffffffff82a83570 r gfx10_cs_data
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+ffffffff82a844a0 r gfx_v10_0_gfx_funcs
+ffffffff82a844e0 r golden_settings_gc_rlc_spm_10_0_nv10
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+ffffffff82a8e1a0 r golden_settings_gc_rlc_spm_10_1_2_nv12
+ffffffff82a94440 r golden_settings_gc_10_1
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+ffffffff82a97000 r gfx_v11_0_ip_funcs
+ffffffff82a970a0 R gfx_v11_0_ip_block
+ffffffff82a970b8 r gfx_v11_0_kiq_pm4_funcs
+ffffffff82a970f8 r gfx_v11_0_ring_funcs_kiq
+ffffffff82a97218 r gfx_v11_0_ring_funcs_gfx
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+ffffffff82a990d0 r gfx_v8_0_gfx_funcs
+ffffffff82a99110 r gfx_v8_0_ring_funcs_kiq
+ffffffff82a99230 r gfx_v8_0_ring_funcs_gfx
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+ffffffff82a99590 r gfx_v8_0_priv_inst_irq_funcs
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+ffffffff82a99660 r vi_cs_data
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+ffffffff82a99cec r vi_SECT_CONTEXT_def_6
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+ffffffff82ae53f0 r golden_settings_polaris10_a11
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+ffffffff82ae60f8 r sdma_v4_0_ring_funcs_2nd_mmhub
+ffffffff82ae6218 r sdma_v4_0_ring_funcs
+ffffffff82ae6338 r sdma_v4_0_page_ring_funcs_2nd_mmhub
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+ffffffff82ae65b8 r sdma_v4_0_trap_irq_funcs
+ffffffff82ae65c8 r sdma_v4_0_illegal_inst_irq_funcs
+ffffffff82ae65d8 r sdma_v4_0_ecc_irq_funcs
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+ffffffff82ae6618 r sdma_v4_0_srbm_write_irq_funcs
+ffffffff82ae6630 r golden_settings_sdma_4
+ffffffff82ae6890 r golden_settings_sdma_vg10
+ffffffff82ae6940 r golden_settings_sdma_vg12
+ffffffff82ae69f0 r golden_settings_sdma0_4_2_init
+ffffffff82ae6a10 r golden_settings_sdma0_4_2
+ffffffff82ae6ca0 r golden_settings_sdma1_4_2
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+ffffffff82ae74e0 r golden_settings_sdma_rv1
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+ffffffff82ae91d8 r sdma_v5_0_buffer_funcs
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+ffffffff82ae9218 r sdma_v5_0_trap_irq_funcs
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+ffffffff82ae9240 r golden_settings_sdma_5
+ffffffff82ae9480 r golden_settings_sdma_nv10
+ffffffff82ae94b0 r golden_settings_sdma_nv14
+ffffffff82ae94e0 r golden_settings_sdma_5_sriov
+ffffffff82ae96c0 r golden_settings_sdma_nv12
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+ffffffff82aea0b8 r sdma_v5_2_ring_funcs
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+ffffffff82aea1f8 r sdma_v5_2_vm_pte_funcs
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+ffffffff82aea228 r sdma_v5_2_illegal_inst_irq_funcs
+ffffffff82aeb000 R sdma_v6_0_ip_funcs
+ffffffff82aeb0a0 R sdma_v6_0_ip_block
+ffffffff82aeb0b8 r sdma_v6_0_ring_funcs
+ffffffff82aeb1d8 r sdma_v6_0_buffer_funcs
+ffffffff82aeb1f8 r sdma_v6_0_vm_pte_funcs
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+ffffffff82aeb228 r sdma_v6_0_illegal_inst_irq_funcs
+ffffffff82aec000 r smu_v11_0_i2c_algo
+ffffffff82aec010 r smu_v11_0_i2c_i2c_lock_ops
+ffffffff82aec028 r smu_v11_0_i2c_control_quirks
+ffffffff82aed000 R smuio_v11_0_funcs
+ffffffff82aee000 R smuio_v11_0_6_funcs
+ffffffff82aef000 R smuio_v13_0_funcs
+ffffffff82af0000 R smuio_v13_0_6_funcs
+ffffffff82af1000 R smuio_v9_0_funcs
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+ffffffff82af20a0 R vega10_common_ip_block
+ffffffff82af20b8 r soc15_asic_funcs
+ffffffff82af2170 r vega20_asic_funcs
+ffffffff82af2230 r soc15_allowed_read_registers
+ffffffff82af23c0 r vega_video_codecs_encode
+ffffffff82af23d0 r vega_video_codecs_decode
+ffffffff82af23e0 r rv_video_codecs_decode
+ffffffff82af23f0 r rn_video_codecs_decode
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+ffffffff82af24b0 r rv_video_codecs_decode_array
+ffffffff82af2540 r rn_video_codecs_decode_array
+ffffffff82af3000 r soc21_common_ip_funcs
+ffffffff82af30a0 R soc21_common_ip_block
+ffffffff82af30b8 r soc21_asic_funcs
+ffffffff82af3170 r soc21_allowed_read_registers
+ffffffff82af32f0 r vcn_4_0_0_video_codecs_encode_vcn1
+ffffffff82af3300 r vcn_4_0_0_video_codecs_decode_vcn1
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+ffffffff82af3320 r vcn_4_0_0_video_codecs_decode_vcn0
+ffffffff82af3330 r vcn_4_0_0_video_codecs_encode_array_vcn1
+ffffffff82af3360 r vcn_4_0_0_video_codecs_decode_array_vcn1
+ffffffff82af33b0 r vcn_4_0_0_video_codecs_encode_array_vcn0
+ffffffff82af33e0 r vcn_4_0_0_video_codecs_decode_array_vcn0
+ffffffff82af4000 r tonga_ih_ip_funcs
+ffffffff82af40a0 R tonga_ih_ip_block
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+ffffffff82af5000 R umc_v6_0_funcs
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+ffffffff82af6080 R umc_v6_1_ras_hw_ops
+ffffffff82af7000 R umc_v6_7_channel_idx_tbl_second
+ffffffff82af7080 R umc_v6_7_channel_idx_tbl_first
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+ffffffff82af8000 R umc_v8_10_channelnum_map_colbit_table
+ffffffff82af8040 R umc_v8_10_channel_idx_tbl
+ffffffff82af80a0 R umc_v8_10_ras_hw_ops
+ffffffff82af9000 R umc_v8_7_channel_idx_tbl
+ffffffff82af9040 R umc_v8_7_ras_hw_ops
+ffffffff82afa000 r uvd_v5_0_ip_funcs
+ffffffff82afa0a0 R uvd_v5_0_ip_block
+ffffffff82afa0b8 r uvd_v5_0_ring_funcs
+ffffffff82afa1d8 r uvd_v5_0_irq_funcs
+ffffffff82afb000 r uvd_v6_0_ip_funcs
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+ffffffff82afb0b8 R uvd_v6_2_ip_block
+ffffffff82afb0d0 R uvd_v6_3_ip_block
+ffffffff82afb0e8 r uvd_v6_0_ring_vm_funcs
+ffffffff82afb208 r uvd_v6_0_ring_phys_funcs
+ffffffff82afb328 r uvd_v6_0_enc_ring_vm_funcs
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+ffffffff82afc0a0 R uvd_v7_0_ip_block
+ffffffff82afc0b8 r uvd_v7_0_ring_vm_funcs
+ffffffff82afc1d8 r uvd_v7_0_enc_ring_vm_funcs
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+ffffffff82afd000 r vce_v3_0_ip_funcs
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+ffffffff82afd0b8 R vce_v3_1_ip_block
+ffffffff82afd0d0 R vce_v3_4_ip_block
+ffffffff82afd0e8 r vce_v3_0_ring_vm_funcs
+ffffffff82afd208 r vce_v3_0_ring_phys_funcs
+ffffffff82afd328 r vce_v3_0_irq_funcs
+ffffffff82afe000 R vce_v4_0_ip_funcs
+ffffffff82afe0a0 R vce_v4_0_ip_block
+ffffffff82afe0b8 r vce_v4_0_ring_vm_funcs
+ffffffff82afe1d8 r vce_v4_0_irq_funcs
+ffffffff82aff000 r vcn_v1_0_ip_funcs
+ffffffff82aff0a0 R vcn_v1_0_ip_block
+ffffffff82aff0b8 r vcn_v1_0_dec_ring_vm_funcs
+ffffffff82aff1d8 r vcn_v1_0_enc_ring_vm_funcs
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+ffffffff82b021d8 r vcn_v3_0_enc_ring_vm_funcs
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+ffffffff82b030b8 r vcn_v4_0_unified_ring_vm_funcs
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+ffffffff82b04000 R vega10_ih_ip_funcs
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+ffffffff82b060a0 R vega20_ih_ip_block
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+ffffffff82b060d8 r vega20_ih_self_irq_funcs
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+ffffffff82b07090 r HDP_BASE
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+ffffffff82b083e0 r topaz_video_codecs_decode
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+ffffffff82b08550 r iceland_mgcg_cgcg_init
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+ffffffff82b090a0 R dm_ip_block
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+ffffffff82b09120 r dm_display_funcs
+ffffffff82b09180 r hpd_disconnect_quirk_table
+ffffffff82b09ef0 r amdgpu_dm_mode_funcs
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+ffffffff82b0e030 r dm_dp_mst_connector_funcs
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 ffffffff82b11000 r vbios_funcs
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-ffffffff82b1a088 r disp_clk_mask
-ffffffff82b1b000 r dce110_max_clks_by_state
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+ffffffff82b1b000 r dce80_max_clks_by_state
 ffffffff82b1b028 r disp_clk_regs
 ffffffff82b1b07c r disp_clk_shift
 ffffffff82b1b088 r disp_clk_mask
-ffffffff82b1c000 r dce112_max_clks_by_state
+ffffffff82b1c000 r dce110_max_clks_by_state
 ffffffff82b1c028 r disp_clk_regs
 ffffffff82b1c07c r disp_clk_shift
 ffffffff82b1c088 r disp_clk_mask
-ffffffff82b1d000 r dce120_max_clks_by_state
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-ffffffff82b1e054 r clk_mgr_shift
-ffffffff82b1e060 r clk_mgr_mask
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 ffffffff82b1f000 r clk_mgr_regs
 ffffffff82b1f054 r clk_mgr_shift
 ffffffff82b1f060 r clk_mgr_mask
 ffffffff82b20000 r clk_mgr_regs
 ffffffff82b20054 r clk_mgr_shift
 ffffffff82b20060 r clk_mgr_mask
-ffffffff82b21000 r lpddr5_wm_table
-ffffffff82b210c0 r ddr5_wm_table
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 ffffffff82b22000 r lpddr5_wm_table
 ffffffff82b220c0 r ddr5_wm_table
 ffffffff82b23000 r lpddr5_wm_table
 ffffffff82b230c0 r ddr5_wm_table
 ffffffff82b24000 r lpddr5_wm_table
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-ffffffff82b25060 r clk_mgr_mask_dcn321
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-ffffffff82b250d8 r clk_mgr_shift_dcn32
-ffffffff82b250e4 r clk_mgr_mask_dcn32
-ffffffff82b26000 r DC_BUILD_ID
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-ffffffff82b29000 r DP_SINK_BRANCH_DEV_NAME_7580
-ffffffff82b2a000 r DP_VGA_DONGLE_BRANCH_DEV_NAME
-ffffffff82b2a006 r DP_DVI_CONVERTER_ID_4
-ffffffff82b2a00d r DP_DVI_CONVERTER_ID_5
-ffffffff82b2b000 r DP_VGA_LVDS_CONVERTER_ID_2
-ffffffff82b2b007 r DP_VGA_LVDS_CONVERTER_ID_3
-ffffffff82b2b010 r dp_lt_fallbacks
-ffffffff82b2c000 r mandatory_dpcd_partitions
-ffffffff82b2e000 r dce_funcs
-ffffffff82b2f000 r funcs
-ffffffff82b30000 R video_optimized_pixel_rates
-ffffffff82b301b0 r dce110_clk_src_funcs
-ffffffff82b301d8 r dce112_clk_src_funcs
-ffffffff82b30200 r dcn20_clk_src_funcs
-ffffffff82b30228 r dcn3_clk_src_funcs
-ffffffff82b30250 r dcn31_clk_src_funcs
-ffffffff82b31000 r dce_funcs
-ffffffff82b31068 r dcn10_funcs
-ffffffff82b310d0 r dcn20_funcs
-ffffffff82b31138 r dcn21_funcs
-ffffffff82b32000 r dce_ipp_funcs
-ffffffff82b33000 r dce110_lnk_enc_funcs
-ffffffff82b34000 r dce_mi_funcs
-ffffffff82b34090 r dce112_mi_funcs
-ffffffff82b34120 r dce120_mi_funcs
-ffffffff82b341b0 r pte_settings
-ffffffff82b35000 r funcs
-ffffffff82b36000 r dce_link_panel_cntl_funcs
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-ffffffff82b37040 r filter_3tap_16p_116
-ffffffff82b37080 r filter_3tap_16p_149
-ffffffff82b370c0 r filter_3tap_16p_183
-ffffffff82b37100 r filter_3tap_64p_upscale
-ffffffff82b371d0 r filter_3tap_64p_116
-ffffffff82b372a0 r filter_3tap_64p_149
-ffffffff82b37370 r filter_3tap_64p_183
-ffffffff82b37440 r filter_4tap_16p_upscale
-ffffffff82b37490 r filter_4tap_16p_116
-ffffffff82b374e0 r filter_4tap_16p_149
-ffffffff82b37530 r filter_4tap_16p_183
-ffffffff82b37580 r filter_4tap_64p_upscale
-ffffffff82b37690 r filter_4tap_64p_116
-ffffffff82b377a0 r filter_4tap_64p_149
-ffffffff82b378b0 r filter_4tap_64p_183
-ffffffff82b379c0 r filter_5tap_64p_upscale
-ffffffff82b37b10 r filter_5tap_64p_116
-ffffffff82b37c60 r filter_5tap_64p_149
-ffffffff82b37db0 r filter_5tap_64p_183
-ffffffff82b37f00 r filter_6tap_64p_upscale
-ffffffff82b38090 r filter_6tap_64p_116
-ffffffff82b38220 r filter_6tap_64p_149
-ffffffff82b383b0 r filter_6tap_64p_183
-ffffffff82b38540 r filter_7tap_64p_upscale
-ffffffff82b38710 r filter_7tap_64p_116
-ffffffff82b388e0 r filter_7tap_64p_149
-ffffffff82b38ab0 r filter_7tap_64p_183
-ffffffff82b38c80 r filter_8tap_64p_upscale
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-ffffffff82b390a0 r filter_8tap_64p_149
-ffffffff82b392b0 r filter_8tap_64p_183
-ffffffff82b394c0 r filter_2tap_16p
-ffffffff82b394f0 r filter_2tap_64p
-ffffffff82b3a000 r audio_clock_info_table_48bpc
-ffffffff82b3a190 r audio_clock_info_table_36bpc
-ffffffff82b3a320 r audio_clock_info_table
-ffffffff82b3a4e0 r dce110_str_enc_funcs
-ffffffff82b3b000 r global_color_matrix
-ffffffff82b3b0a8 r dce_transform_funcs
-ffffffff82b3c000 r abm_funcs
-ffffffff82b3d000 r psr_funcs
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-ffffffff82b3d045 r DP_SINK_DEVICE_STR_ID_2
-ffffffff82b3e000 r reg_offsets
-ffffffff82b3f000 r bios_regs
-ffffffff82b3f008 r res_cap
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-ffffffff82b3f208 r abm_regs
-ffffffff82b3f248 r abm_shift
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-ffffffff82b3f2b0 r dce100_tg_offsets
-ffffffff82b3f2f8 r plane_cap
-ffffffff82b3f328 r res_create_funcs
-ffffffff82b3f358 r dce100_res_pool_funcs
-ffffffff82b3f440 r panel_cntl_regs
-ffffffff82b3f460 r panel_cntl_shift
-ffffffff82b3f470 r panel_cntl_mask
-ffffffff82b3f4b0 r link_enc_regs
-ffffffff82b3f870 r link_enc_aux_regs
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-ffffffff82b3f8d8 r link_enc_feature
-ffffffff82b3f8e8 r cs_shift
-ffffffff82b3f8f4 r cs_mask
-ffffffff82b3f920 r mi_regs
-ffffffff82b3fc38 r mi_shifts
-ffffffff82b3fc80 r mi_masks
-ffffffff82b3fda0 r ipp_regs
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-ffffffff82c10000 R dcn32_mmhubbub_funcs
-ffffffff82c11000 R dcn32_mpc_funcs
-ffffffff82c12000 r res_cap_dcn32
-ffffffff82c12040 r debug_defaults_diags
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-ffffffff82c1e000 R dcn10_soc_defaults
-ffffffff82c1e08c R dcn10_ip_defaults
-ffffffff82c29000 R dml20_funcs
-ffffffff82c29030 R dml20v2_funcs
-ffffffff82c29060 R dml21_funcs
-ffffffff82c29090 R dml30_funcs
-ffffffff82c290c0 R dml31_funcs
-ffffffff82c290f0 R dml314_funcs
-ffffffff82c29120 R dml32_funcs
-ffffffff82c2c000 R qp_table_422_10bpc_min
-ffffffff82c2c740 R qp_table_444_8bpc_max
-ffffffff82c2d080 R qp_table_420_12bpc_max
-ffffffff82c2d7c0 R qp_table_444_10bpc_min
-ffffffff82c2e400 R qp_table_420_8bpc_max
-ffffffff82c2e840 R qp_table_444_8bpc_min
-ffffffff82c2f180 R qp_table_444_12bpc_min
-ffffffff82c300c0 R qp_table_420_12bpc_min
-ffffffff82c30800 R qp_table_422_12bpc_min
-ffffffff82c31140 R qp_table_422_12bpc_max
-ffffffff82c31a80 R qp_table_444_12bpc_max
-ffffffff82c329c0 R qp_table_420_8bpc_min
-ffffffff82c32e00 R qp_table_422_8bpc_min
-ffffffff82c33340 R qp_table_422_10bpc_max
-ffffffff82c33a80 R qp_table_420_10bpc_max
-ffffffff82c34040 R qp_table_420_10bpc_min
-ffffffff82c34600 R qp_table_444_10bpc_max
-ffffffff82c35240 R qp_table_422_8bpc_max
-ffffffff82c37000 r funcs
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+ffffffff82c11000 R dcn32_mmhubbub_funcs
+ffffffff82c12000 R dcn32_mpc_funcs
+ffffffff82c13000 r res_cap_dcn32
+ffffffff82c13040 r debug_defaults_diags
+ffffffff82c131b8 r dccg_shift
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+ffffffff82c1a684 r tf_mask
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+ffffffff82c1b1fc r opp_mask
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+ffffffff82c1bad8 r dsc_shift
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+ffffffff82c1c904 r audio_shift
+ffffffff82c1c91c r audio_mask
+ffffffff82c1c958 r se_shift
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+ffffffff82c1cfb8 r hpo_dp_le_mask
+ffffffff82c1d01c r hwseq_shift
+ffffffff82c1d09c r hwseq_mask
+ffffffff82c1f000 R dcn10_soc_defaults
+ffffffff82c1f08c R dcn10_ip_defaults
+ffffffff82c2a000 R dml20_funcs
+ffffffff82c2a030 R dml20v2_funcs
+ffffffff82c2a060 R dml21_funcs
+ffffffff82c2a090 R dml30_funcs
+ffffffff82c2a0c0 R dml31_funcs
+ffffffff82c2a0f0 R dml314_funcs
+ffffffff82c2a120 R dml32_funcs
+ffffffff82c2d000 R qp_table_422_10bpc_min
+ffffffff82c2d740 R qp_table_444_8bpc_max
+ffffffff82c2e080 R qp_table_420_12bpc_max
+ffffffff82c2e7c0 R qp_table_444_10bpc_min
+ffffffff82c2f400 R qp_table_420_8bpc_max
+ffffffff82c2f840 R qp_table_444_8bpc_min
+ffffffff82c30180 R qp_table_444_12bpc_min
+ffffffff82c310c0 R qp_table_420_12bpc_min
+ffffffff82c31800 R qp_table_422_12bpc_min
+ffffffff82c32140 R qp_table_422_12bpc_max
+ffffffff82c32a80 R qp_table_444_12bpc_max
+ffffffff82c339c0 R qp_table_420_8bpc_min
+ffffffff82c33e00 R qp_table_422_8bpc_min
+ffffffff82c34340 R qp_table_422_10bpc_max
+ffffffff82c34a80 R qp_table_420_10bpc_max
+ffffffff82c35040 R qp_table_420_10bpc_min
+ffffffff82c35600 R qp_table_444_10bpc_max
+ffffffff82c36240 R qp_table_422_8bpc_max
 ffffffff82c38000 r funcs
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 ffffffff82c39000 r funcs
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-ffffffff82c391c0 r ddc_data_regs
-ffffffff82c393a0 r ddc_clk_regs
-ffffffff82c39580 r ddc_shift
-ffffffff82c395a8 r ddc_mask
 ffffffff82c3a000 r funcs
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 ffffffff82c3b000 r funcs
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-ffffffff82c3b3a0 r ddc_clk_regs
-ffffffff82c3b580 r ddc_shift
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 ffffffff82c3c000 r funcs
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 ffffffff82c3d000 r funcs
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 ffffffff82c3e000 r funcs
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 ffffffff82c3f000 r funcs
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-ffffffff82c3f520 r ddc_shift
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 ffffffff82c40000 r funcs
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 ffffffff82c41000 r funcs
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-ffffffff82c413f0 r ddc_shift
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 ffffffff82c42000 r funcs
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 ffffffff82c43000 r funcs
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-ffffffff82c43520 r ddc_shift
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 ffffffff82c44000 r funcs
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 ffffffff82c45000 r funcs
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 ffffffff82c46000 r funcs
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 ffffffff82c47000 r funcs
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-ffffffff82c474f0 r ddc_shift
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 ffffffff82c48000 r funcs
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 ffffffff82c49000 r funcs
 ffffffff82c4a000 r funcs
 ffffffff82c4b000 r funcs
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-ffffffff82c4d000 r irq_service_funcs_dce110
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-ffffffff82c4e2d0 r pflip_irq_info_funcs
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-ffffffff82c4f038 r pflip_irq_info_funcs
-ffffffff82c4f048 r vupdate_irq_info_funcs
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-ffffffff82c4f070 r irq_source_info_dce120
-ffffffff82c51000 r irq_service_funcs_dce80
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-ffffffff82c51028 r hpd_rx_irq_info_funcs
-ffffffff82c51038 r pflip_irq_info_funcs
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-ffffffff82c51070 r irq_source_info_dce80
-ffffffff82c53000 r irq_service_funcs_dcn10
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-ffffffff82c53028 r hpd_rx_irq_info_funcs
-ffffffff82c53038 r pflip_irq_info_funcs
-ffffffff82c53048 r vupdate_no_lock_irq_info_funcs
-ffffffff82c53058 r vblank_irq_info_funcs
-ffffffff82c53068 r vline0_irq_info_funcs
-ffffffff82c53080 r irq_source_info_dcn10
-ffffffff82c55000 r irq_service_funcs_dcn20
-ffffffff82c55008 r dummy_irq_info_funcs
-ffffffff82c55018 r hpd_irq_info_funcs
-ffffffff82c55028 r hpd_rx_irq_info_funcs
-ffffffff82c55038 r pflip_irq_info_funcs
-ffffffff82c55048 r vupdate_no_lock_irq_info_funcs
-ffffffff82c55058 r vblank_irq_info_funcs
-ffffffff82c55068 r vline0_irq_info_funcs
-ffffffff82c55080 r irq_source_info_dcn20
-ffffffff82c57000 r irq_service_funcs_dcn201
-ffffffff82c57008 r dummy_irq_info_funcs
-ffffffff82c57018 r hpd_irq_info_funcs
-ffffffff82c57028 r hpd_rx_irq_info_funcs
-ffffffff82c57038 r pflip_irq_info_funcs
-ffffffff82c57048 r vupdate_no_lock_irq_info_funcs
-ffffffff82c57058 r vblank_irq_info_funcs
-ffffffff82c57068 r vline0_irq_info_funcs
-ffffffff82c57080 r irq_source_info_dcn201
-ffffffff82c59000 r irq_source_info_dcn21
-ffffffff82c5a290 r irq_service_funcs_dcn21
-ffffffff82c5a298 r dummy_irq_info_funcs
-ffffffff82c5a2a8 r hpd_irq_info_funcs
-ffffffff82c5a2b8 r hpd_rx_irq_info_funcs
-ffffffff82c5a2c8 r pflip_irq_info_funcs
-ffffffff82c5a2d8 r vupdate_no_lock_irq_info_funcs
-ffffffff82c5a2e8 r vblank_irq_info_funcs
-ffffffff82c5a2f8 r vline0_irq_info_funcs
-ffffffff82c5a308 r dmub_outbox_irq_info_funcs
-ffffffff82c5b000 r irq_source_info_dcn30
-ffffffff82c5c290 r irq_service_funcs_dcn30
-ffffffff82c5c298 r dummy_irq_info_funcs
-ffffffff82c5c2a8 r hpd_irq_info_funcs
-ffffffff82c5c2b8 r hpd_rx_irq_info_funcs
-ffffffff82c5c2c8 r pflip_irq_info_funcs
-ffffffff82c5c2d8 r vupdate_no_lock_irq_info_funcs
-ffffffff82c5c2e8 r vblank_irq_info_funcs
-ffffffff82c5c2f8 r vline0_irq_info_funcs
-ffffffff82c5c308 r dmub_trace_irq_info_funcs
-ffffffff82c5d000 r irq_source_info_dcn302
-ffffffff82c5e290 r irq_service_funcs_dcn302
-ffffffff82c5e298 r dummy_irq_info_funcs
-ffffffff82c5e2a8 r hpd_irq_info_funcs
-ffffffff82c5e2b8 r hpd_rx_irq_info_funcs
-ffffffff82c5e2c8 r pflip_irq_info_funcs
-ffffffff82c5e2d8 r vupdate_no_lock_irq_info_funcs
-ffffffff82c5e2e8 r vblank_irq_info_funcs
-ffffffff82c5e2f8 r vline0_irq_info_funcs
-ffffffff82c5e308 r dmub_trace_irq_info_funcs
-ffffffff82c5f000 r irq_service_funcs_dcn303
-ffffffff82c5f008 r dummy_irq_info_funcs
-ffffffff82c5f018 r hpd_irq_info_funcs
-ffffffff82c5f028 r hpd_rx_irq_info_funcs
-ffffffff82c5f038 r pflip_irq_info_funcs
-ffffffff82c5f048 r vupdate_no_lock_irq_info_funcs
-ffffffff82c5f058 r vblank_irq_info_funcs
-ffffffff82c5f068 r vline0_irq_info_funcs
-ffffffff82c5f080 r irq_source_info_dcn303
-ffffffff82c61000 r irq_source_info_dcn31
-ffffffff82c62290 r irq_service_funcs_dcn31
-ffffffff82c62298 r dummy_irq_info_funcs
-ffffffff82c622a8 r hpd_irq_info_funcs
-ffffffff82c622b8 r hpd_rx_irq_info_funcs
-ffffffff82c622c8 r pflip_irq_info_funcs
-ffffffff82c622d8 r vupdate_no_lock_irq_info_funcs
-ffffffff82c622e8 r vblank_irq_info_funcs
-ffffffff82c622f8 r vline0_irq_info_funcs
-ffffffff82c62308 r outbox_irq_info_funcs
-ffffffff82c63000 r irq_source_info_dcn314
-ffffffff82c64290 r irq_service_funcs_dcn314
-ffffffff82c64298 r dummy_irq_info_funcs
-ffffffff82c642a8 r hpd_irq_info_funcs
-ffffffff82c642b8 r hpd_rx_irq_info_funcs
-ffffffff82c642c8 r pflip_irq_info_funcs
-ffffffff82c642d8 r vupdate_no_lock_irq_info_funcs
-ffffffff82c642e8 r vblank_irq_info_funcs
-ffffffff82c642f8 r vline0_irq_info_funcs
-ffffffff82c64308 r outbox_irq_info_funcs
-ffffffff82c65000 r irq_source_info_dcn315
-ffffffff82c66290 r irq_service_funcs_dcn315
-ffffffff82c66298 r dummy_irq_info_funcs
-ffffffff82c662a8 r hpd_irq_info_funcs
-ffffffff82c662b8 r hpd_rx_irq_info_funcs
-ffffffff82c662c8 r pflip_irq_info_funcs
-ffffffff82c662d8 r vupdate_no_lock_irq_info_funcs
-ffffffff82c662e8 r vblank_irq_info_funcs
-ffffffff82c662f8 r vline0_irq_info_funcs
-ffffffff82c66308 r outbox_irq_info_funcs
-ffffffff82c67000 r irq_source_info_dcn32
-ffffffff82c68290 r irq_service_funcs_dcn32
-ffffffff82c68298 r dummy_irq_info_funcs
-ffffffff82c682a8 r hpd_irq_info_funcs
-ffffffff82c682b8 r hpd_rx_irq_info_funcs
-ffffffff82c682c8 r pflip_irq_info_funcs
-ffffffff82c682d8 r vupdate_no_lock_irq_info_funcs
-ffffffff82c682e8 r vblank_irq_info_funcs
-ffffffff82c682f8 r vline0_irq_info_funcs
-ffffffff82c68308 r outbox_irq_info_funcs
-ffffffff82c69000 r dio_link_hwss
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-ffffffff82c6f000 R dmub_srv_dcn20_regs
-ffffffff82c70000 R dmub_srv_dcn21_regs
-ffffffff82c71000 R dmub_srv_dcn30_regs
-ffffffff82c72000 R dmub_srv_dcn301_regs
-ffffffff82c73000 R dmub_srv_dcn302_regs
-ffffffff82c74000 R dmub_srv_dcn303_regs
-ffffffff82c75000 R dmub_srv_dcn31_regs
-ffffffff82c76000 R dmub_srv_dcn315_regs
-ffffffff82c77000 R dmub_srv_dcn316_regs
-ffffffff82c78000 R dmub_srv_dcn32_regs
-ffffffff82c79000 r numerator01
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-ffffffff82c7c000 R amdgpu_pp_profile_name
-ffffffff82c7d000 r pp_lib_thermal_controller_names
-ffffffff82c7e000 r pp_ip_funcs
-ffffffff82c7e0a0 R pp_smu_ip_block
-ffffffff82c7e0b8 r pp_dpm_funcs
-ffffffff82c7f000 r gpio_tbl
-ffffffff82c7f0f0 r enable_fb_req_rej_tbl
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-ffffffff82c7f640 r enter_baco_tbl
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+ffffffff82c72000 R dmub_srv_dcn30_regs
+ffffffff82c73000 R dmub_srv_dcn301_regs
+ffffffff82c74000 R dmub_srv_dcn302_regs
+ffffffff82c75000 R dmub_srv_dcn303_regs
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+ffffffff82c7f0a0 R pp_smu_ip_block
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 ffffffff82c80000 r gpio_tbl
 ffffffff82c800f0 r enable_fb_req_rej_tbl
 ffffffff82c80140 r use_bclk_tbl
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 ffffffff82c81000 r gpio_tbl
 ffffffff82c810f0 r enable_fb_req_rej_tbl
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-ffffffff82c95000 r smu7_hwmgr_funcs
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-ffffffff82c95310 r SMU7ThermalPolicy
-ffffffff82c96000 r GCCACConfig_Polaris10
-ffffffff82c961b0 r DIDTConfig_Polaris10
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-ffffffff82c9f110 r SEDiDtStallPatternConfig_vega10
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-ffffffff82c9f3b0 r SEDiDtCtrl1Config_Vega10
-ffffffff82c9f440 r SEDiDtCtrl2Config_Vega10
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-ffffffff82ca0290 r PSMSEEDCCtrlConfig_Vega10
-ffffffff82ca0350 r SEEDCForceStallPatternConfig_Vega10
-ffffffff82ca03e0 r SEEDCCtrlForceStallConfig_Vega10
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-ffffffff82ca6340 r link_width
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-ffffffff82cf3000 R wi_pcmcia_ca
-ffffffff82cf3030 r wi_pcmcia_products
-ffffffff82cf4000 R malo_pcmcia_ca
-ffffffff82cf5000 R an_pcmcia_ca
-ffffffff82cf6000 R pcib_ca
-ffffffff82cf7000 R amdpcib_ca
-ffffffff82cf7028 R amdpcib_devices
-ffffffff82cf8000 R tcpcib_ca
-ffffffff82cf8028 R tcpcib_devices
-ffffffff82cf9000 R aapic_ca
-ffffffff82cfa000 R hme_pci_ca
-ffffffff82cfa028 r hme_promhdr
-ffffffff82cfa02a r hme_promdat
-ffffffff82cfb000 R isa_ca
-ffffffff82cfc000 R isadma_ca
-ffffffff82cfd000 R fdc_ca
-ffffffff82cfe000 R fd_ca
-ffffffff82cff000 R com_isa_ca
-ffffffff82d00000 R pckbc_isa_ca
-ffffffff82d01000 R vga_isa_ca
-ffffffff82d02000 R wdc_isa_ca
-ffffffff82d03000 R mpu_midi_hw_if
-ffffffff82d04000 R mpu_isa_ca
-ffffffff82d05000 R pcppi_ca
-ffffffff82d06000 R spkr_ca
-ffffffff82d06030 r pitchtab
-ffffffff82d07000 R lpt_isa_ca
-ffffffff82d08000 R wbsio_ca
-ffffffff82d09000 R schsio_ca
-ffffffff82d0a000 R lm_isa_ca
-ffffffff82d0a028 R lm_wbsio_ca
-ffffffff82d0b000 R it_sensors
-ffffffff82d0b110 R it_vrfact
-ffffffff82d0b140 R it_fan_regs
-ffffffff82d0b160 R it_fan_ext_regs
-ffffffff82d0b178 R it_ca
-ffffffff82d0c000 R abitkv_sensors
-ffffffff82d0c200 R abitaa_sensors
-ffffffff82d0c480 R abitav_sensors
-ffffffff82d0c700 R abitas_sensors
-ffffffff82d0c980 R abitax_sensors
-ffffffff82d0cbc0 R abitm4_sensors
-ffffffff82d0ce80 R abitan_sensors
-ffffffff82d0d120 R abital_sensors
-ffffffff82d0d3a0 R abitaw_sensors
-ffffffff82d0d700 R abitni_sensors
-ffffffff82d0d9a0 R abitat_sensors
-ffffffff82d0dcc0 R abitan2_sensors
-ffffffff82d0df60 R abitab_sensors
-ffffffff82d0e220 R abitan3_sensors
-ffffffff82d0e500 R abitaw2_sensors
-ffffffff82d0e860 R abitat2_sensors
-ffffffff82d0eb60 R abitab2_sensors
-ffffffff82d0eea0 R abitin_sensors
-ffffffff82d0f1e0 R uguru_ca
-ffffffff82d10000 R aps_ca
-ffffffff82d11000 R wsdisplay_emul_ca
-ffffffff82d11030 r charClass
-ffffffff82d12000 r usl_syncops
-ffffffff82d13000 R wsevent_filtops
-ffffffff82d14000 R wskbd_ca
-ffffffff82d15000 r latin1_to_upper
-ffffffff82d16000 R wsmouse_ca
-ffffffff82d17000 R cyrillic_to_koi8
-ffffffff82d17060 R unicode_to_latin2
-ffffffff82d170e0 R unicode_to_latin7
-ffffffff82d18000 R wsemul_vt100_ops
-ffffffff82d19000 r decspcgr2uni
-ffffffff82d19100 r dectech2uni
-ffffffff82d19200 r nrctable
-ffffffff82d19320 r nrcovlpos
-ffffffff82d1a000 r vt100_fkeys
-ffffffff82d1a0c0 r vt100_pfkeys
-ffffffff82d1a0e0 r vt100_numpad
-ffffffff82d1b000 R pckbd_ca
-ffffffff82d1b028 R pckbd_accessops
-ffffffff82d1b040 R pckbd_consops
-ffffffff82d1b060 R pckbd_keymapdata
-ffffffff82d1b070 R pckbd_xtbl
-ffffffff82d1b100 R pckbd_xtbl_ext
-ffffffff82d1c000 r pckbd_keydesc_us
-ffffffff82d1c250 r pckbd_keydesc_de
-ffffffff82d1c2f0 r pckbd_keydesc_de_nodead
-ffffffff82d1c310 r pckbd_keydesc_fr
-ffffffff82d1c3d0 r pckbd_keydesc_fr_dvorak_bepo
-ffffffff82d1c510 r pckbd_keydesc_dk
-ffffffff82d1c5a0 r pckbd_keydesc_dk_nodead
-ffffffff82d1c5b0 r pckbd_keydesc_it
-ffffffff82d1c640 r pckbd_keydesc_uk
-ffffffff82d1c6e0 r pckbd_keydesc_jp
-ffffffff82d1c750 r pckbd_keydesc_sv
-ffffffff82d1c780 r pckbd_keydesc_sv_nodead
-ffffffff82d1c790 r pckbd_keydesc_no
-ffffffff82d1c7c0 r pckbd_keydesc_no_nodead
-ffffffff82d1c7d0 r pckbd_keydesc_us_declk
-ffffffff82d1c860 r pckbd_keydesc_us_dvorak
-ffffffff82d1c900 r pckbd_keydesc_us_colemak
-ffffffff82d1c948 r pckbd_keydesc_swapctrlcaps
-ffffffff82d1c960 r pckbd_keydesc_iopener
-ffffffff82d1c9b0 r pckbd_keydesc_es
-ffffffff82d1ca50 r pckbd_keydesc_be
-ffffffff82d1cb10 r pckbd_keydesc_ru
-ffffffff82d1cc80 r pckbd_keydesc_ua
-ffffffff82d1ce10 r pckbd_keydesc_sg
-ffffffff82d1cec0 r pckbd_keydesc_sg_nodead
-ffffffff82d1cee0 r pckbd_keydesc_sf
-ffffffff82d1cf00 r pckbd_keydesc_pt
-ffffffff82d1cf90 r pckbd_keydesc_lt
-ffffffff82d1d070 r pckbd_keydesc_la
-ffffffff82d1d100 r pckbd_keydesc_br
-ffffffff82d1d180 r pckbd_keydesc_tr
-ffffffff82d1d230 r pckbd_keydesc_tr_nodead
-ffffffff82d1d250 r pckbd_keydesc_pl
-ffffffff82d1d2b0 r pckbd_keydesc_hu
-ffffffff82d1d3c0 r pckbd_keydesc_si
-ffffffff82d1d4d0 r pckbd_keydesc_cf
-ffffffff82d1d5a0 r pckbd_keydesc_cf_nodead
-ffffffff82d1d5c0 r pckbd_keydesc_lv
-ffffffff82d1d640 r pckbd_keydesc_nl
-ffffffff82d1d720 r pckbd_keydesc_nl_nodead
-ffffffff82d1d740 r pckbd_keydesc_is
-ffffffff82d1d7cc r pckbd_keydesc_is_nodead
-ffffffff82d1d7e0 r pckbd_keydesc_ee
-ffffffff82d1d890 r pckbd_keydesc_ee_nodead
-ffffffff82d1d8b0 R pckbd_keydesctab
-ffffffff82d1e000 R pms_ca
-ffffffff82d1e028 R pms_accessops
-ffffffff82d1e040 R pms_sec_accessops
-ffffffff82d1e060 R pms_protocols
-ffffffff82d1e1e0 r alps_models
-ffffffff82d1f000 R skgpio_led_offset
-ffffffff82d1f008 R skgpio_ca
-ffffffff82d20000 R hidkbd_trtab
-ffffffff82d20100 r apple_fn_trans
-ffffffff82d20120 r apple_tb_trans
-ffffffff82d20140 r apple_mba_trans
-ffffffff82d21000 r hidcc_attach_wskbd.accessops
-ffffffff82d21020 r hidcc_keysyms
-ffffffff82d22000 R usb_ca
-ffffffff82d23000 R usb_known_products
-ffffffff82d2ef40 R usb_known_vendors
-ffffffff82d31740 R usbd_error_strs
-ffffffff82d32000 R usb_quirks
-ffffffff82d32390 R usb_dev_quirks
-ffffffff82d32398 R usbd_no_quirk
-ffffffff82d33000 R uhub_ca
-ffffffff82d33028 R uhub_uhub_ca
-ffffffff82d34000 R uaudio_ca
-ffffffff82d34028 R uaudio_hw_if
-ffffffff82d340e0 R uaudio_rates
-ffffffff82d34120 r uaudio_clkname.names
-ffffffff82d34140 r uaudio_feature_addent.features
-ffffffff82d35000 R uvideo_ca
-ffffffff82d35028 R uvideo_hw_if
-ffffffff82d35100 R uvideo_devs
-ffffffff82d36000 r utvfu_select_norm.pal
-ffffffff82d36040 r utvfu_select_norm.ntsc
-ffffffff82d36080 r utvfu_setup_capture.setup
-ffffffff82d36180 r utvfu_audio_start_chip.setup
-ffffffff82d361c8 r utvfu_audio_stop_chip.setup
-ffffffff82d361d8 R utvfu_ca
-ffffffff82d36200 R utvfu_vid_hw_if
-ffffffff82d362d0 R utvfu_au_hw_if
-ffffffff82d37000 R udl_ca
-ffffffff82d37030 r udl_devs
-ffffffff82d370b0 r udl_modes
-ffffffff82d38000 R umidi_hw_if
-ffffffff82d38030 R umidi_ca
-ffffffff82d38060 r umidi_evlen
-ffffffff82d38080 r packet_length
-ffffffff82d39000 r quirk_name
-ffffffff82d3a000 R ucom_ca
-ffffffff82d3b000 R ugen_ca
-ffffffff82d3b028 R ugenread_intr_filtops
-ffffffff82d3b058 R ugenread_isoc_filtops
-ffffffff82d3c000 R uhidev_ca
-ffffffff82d3c030 r uhid_graphire_report_descr
-ffffffff82d3c0b0 r uhid_graphire3_4x5_report_descr
-ffffffff82d3c160 r uhid_xb360gp_report_descr
-ffffffff82d3c210 r uhid_xbonegp_report_descr
-ffffffff82d3d000 R uhid_ca
-ffffffff82d3d028 R uhidread_filtops
-ffffffff82d3e000 R fido_ca
-ffffffff82d3f000 R ujoy_ca
-ffffffff82d40000 r ukbd_keydesc_us
-ffffffff82d40290 r ukbd_keydesc_de
-ffffffff82d40340 r ukbd_keydesc_de_nodead
-ffffffff82d40360 r ukbd_keydesc_fr
-ffffffff82d40420 r ukbd_keydesc_fr_apple
-ffffffff82d40560 r ukbd_keydesc_fr_dvorak_bepo
-ffffffff82d406a0 r ukbd_keydesc_dk
-ffffffff82d40740 r ukbd_keydesc_dk_nodead
-ffffffff82d40750 r ukbd_keydesc_it
-ffffffff82d407f0 r ukbd_keydesc_uk
-ffffffff82d408a0 r ukbd_keydesc_jp
-ffffffff82d40910 r ukbd_keydesc_sv
-ffffffff82d40940 r ukbd_keydesc_sv_nodead
-ffffffff82d40950 r ukbd_keydesc_no
-ffffffff82d40980 r ukbd_keydesc_no_nodead
-ffffffff82d40990 r ukbd_keydesc_us_dvorak
-ffffffff82d40a30 r ukbd_keydesc_us_colemak
-ffffffff82d40a78 r ukbd_keydesc_swapctrlcaps
-ffffffff82d40a90 r ukbd_keydesc_iopener
-ffffffff82d40ae0 r ukbd_keydesc_es
-ffffffff82d40b80 r ukbd_keydesc_be
-ffffffff82d40c40 r ukbd_keydesc_ru
-ffffffff82d40db0 r ukbd_keydesc_ua
-ffffffff82d40f50 r ukbd_keydesc_sg
-ffffffff82d41010 r ukbd_keydesc_sg_nodead
-ffffffff82d41030 r ukbd_keydesc_sf
-ffffffff82d41050 r ukbd_keydesc_pt
-ffffffff82d410e0 r ukbd_keydesc_pt_apple
-ffffffff82d41100 r ukbd_keydesc_lt
-ffffffff82d411e0 r ukbd_keydesc_la
-ffffffff82d41280 r ukbd_keydesc_br
-ffffffff82d41310 r ukbd_keydesc_tr
-ffffffff82d413d0 r ukbd_keydesc_tr_nodead
-ffffffff82d413f0 r ukbd_keydesc_pl
-ffffffff82d41450 r ukbd_keydesc_hu
-ffffffff82d41560 r ukbd_keydesc_si
-ffffffff82d41680 r ukbd_keydesc_cf
-ffffffff82d41760 r ukbd_keydesc_cf_nodead
-ffffffff82d41780 r ukbd_keydesc_lv
-ffffffff82d41800 r ukbd_keydesc_nl
-ffffffff82d418e0 r ukbd_keydesc_nl_nodead
-ffffffff82d41900 r ukbd_keydesc_is
-ffffffff82d41994 r ukbd_keydesc_is_nodead
-ffffffff82d419a0 r ukbd_keydesc_ee
-ffffffff82d41a50 r ukbd_keydesc_ee_nodead
-ffffffff82d41a70 R ukbd_keydesctab
-ffffffff82d42000 R ukbd_countrylayout
-ffffffff82d42090 R ukbd_consops
-ffffffff82d420b0 R ukbd_accessops
-ffffffff82d420c8 R ukbd_ca
-ffffffff82d43000 R ums_accessops
-ffffffff82d43018 R ums_ca
-ffffffff82d44000 R umt_accessops
-ffffffff82d44018 R umt_ca
-ffffffff82d45000 R uts_devs
-ffffffff82d45010 R uts_accessops
-ffffffff82d45028 R uts_ca
-ffffffff82d46000 R ubcmtp_accessops
-ffffffff82d46018 R ubcmtp_ca
-ffffffff82d46040 r ubcmtp_devices
-ffffffff82d47000 R ucycom_methods
-ffffffff82d47040 R ucycom_devs
-ffffffff82d47050 R ucycom_ca
-ffffffff82d48000 R uslhcom_methods
-ffffffff82d48040 R uslhcom_ca
-ffffffff82d48068 r uslhcom_devs
-ffffffff82d49000 R ulpt_ca
-ffffffff82d4a000 R umass_ca
-ffffffff82d4a028 R umass_bbb_methods
-ffffffff82d4a040 R umass_cbi_methods
-ffffffff82d4b000 R umass_quirks
-ffffffff82d4c000 R umass_scsi_switch
-ffffffff82d4d000 R uthum_devs
-ffffffff82d4d008 R uthum_ca
-ffffffff82d4d030 r uthum_sensor_type_s
-ffffffff82d4e000 R ugold_devs
-ffffffff82d4e010 R ugold_ca
-ffffffff82d4f000 R utrh_devs
-ffffffff82d4f008 R utrh_ca
-ffffffff82d50000 R uoakrh_devs
-ffffffff82d50008 R uoakrh_ca
-ffffffff82d50030 R uoakrh_methods
-ffffffff82d51000 R uoaklux_devs
-ffffffff82d51008 R uoaklux_ca
-ffffffff82d51030 R uoaklux_methods
-ffffffff82d52000 R uoakv_devs
-ffffffff82d52008 R uoakv_ca
-ffffffff82d52030 R uoakv_methods
-ffffffff82d53000 R uonerng_ca
-ffffffff82d54000 R urng_ca
-ffffffff82d54030 r urng_devs
-ffffffff82d55000 R udcf_ca
-ffffffff82d55028 r udcf_devs
-ffffffff82d56000 R umbg_ca
-ffffffff82d57000 R uvisor_methods
-ffffffff82d57040 R uvisor_ca
-ffffffff82d57070 r uvisor_devs
-ffffffff82d58000 R udsbr_hw_if
-ffffffff82d58028 R udsbr_ca
-ffffffff82d59000 R utwitch_devs
-ffffffff82d59008 R utwitch_ca
-ffffffff82d5a000 R aue_devs
-ffffffff82d5a1b0 R aue_ca
-ffffffff82d5b000 R axe_devs
-ffffffff82d5b0d0 R axe_ca
-ffffffff82d5c000 R axen_devs
-ffffffff82d5c020 R axen_ca
-ffffffff82d5d000 R smsc_ca
-ffffffff82d5d030 r smsc_devs
-ffffffff82d5e000 R cue_ca
-ffffffff82d5f000 R kue_devs
-ffffffff82d5f088 R kue_ca
-ffffffff82d60000 R cdce_devs
-ffffffff82d60048 R cdce_ca
-ffffffff82d61000 R urndis_ca
-ffffffff82d61030 R urndis_class
-ffffffff82d62000 R mos_devs
-ffffffff82d62018 R mos_ca
-ffffffff82d63000 R mue_devs
-ffffffff82d63020 R mue_ca
-ffffffff82d64000 R udav_ca
-ffffffff82d64030 r udav_devs
-ffffffff82d65000 R upl_ca
-ffffffff82d66000 R ugl_ca
-ffffffff82d67000 R url_ca
-ffffffff82d67030 r url_devs
-ffffffff82d68000 R ure_devs
-ffffffff82d680f0 R ure_ca
-ffffffff82d69000 R uaq_devs
-ffffffff82d69018 R uaq_ca
-ffffffff82d6a000 R umodem_methods
-ffffffff82d6a040 R umodem_ca
-ffffffff82d6b000 R uftdi_methods
-ffffffff82d6b040 R uftdi_ca
-ffffffff82d6b070 r uftdi_devs
-ffffffff82d6c000 R uplcom_methods
-ffffffff82d6c040 R uplcom_ca
-ffffffff82d6c070 r uplcom_devs
-ffffffff82d6d000 R umct_methods
-ffffffff82d6d040 R umct_ca
-ffffffff82d6d070 r umct_devs
-ffffffff82d6e000 R uvscom_methods
-ffffffff82d6e040 R uvscom_ca
-ffffffff82d6e070 r uvscom_devs
-ffffffff82d6f000 R ubsa_methods
-ffffffff82d6f040 R ubsa_devs
-ffffffff82d6f060 R ubsa_ca
-ffffffff82d70000 R ukspan_ca
-ffffffff82d70028 r ukspan_devs
-ffffffff82d70030 r ukspan_methods
-ffffffff82d71000 R uslcom_methods
-ffffffff82d71040 R uslcom_ca
-ffffffff82d71070 r uslcom_devs
-ffffffff82d72000 R uark_methods
-ffffffff82d72040 R uark_ca
-ffffffff82d72068 r uark_devs
-ffffffff82d73000 R moscom_methods
-ffffffff82d73040 R moscom_ca
-ffffffff82d73068 r moscom_devs
-ffffffff82d74000 R umcs_methods
-ffffffff82d74040 R umcs_devs
-ffffffff82d74050 R umcs_ca
-ffffffff82d75000 R uscom_methods
-ffffffff82d75040 R uscom_ca
-ffffffff82d75068 r uscom_devs
-ffffffff82d76000 R ucrcom_methods
-ffffffff82d76040 R ucrcom_ca
-ffffffff82d77000 R uxrcom_methods
-ffffffff82d77040 R uxrcom_ca
-ffffffff82d77068 r uxrcom_devs
-ffffffff82d78000 R uipaq_methods
-ffffffff82d78040 R uipaq_ca
-ffffffff82d78070 r uipaq_devs
-ffffffff82d79000 R umsm_methods
-ffffffff82d79040 R umsm_ca
-ffffffff82d79070 r umsm_devs
-ffffffff82d7a000 R uchcom_methods
-ffffffff82d7a040 R uchcom_ca
-ffffffff82d7a068 r uchcom_devs
-ffffffff82d7a080 r dividers
-ffffffff82d7b000 R uticom_methods
-ffffffff82d7b040 R uticom_ca
-ffffffff82d7b070 r uticom_devs
-ffffffff82d7c000 R wi_usb_devs
-ffffffff82d7c0f0 R wi_usb_ca
-ffffffff82d7d000 R atu_ca
-ffffffff82d7e000 R ural_ca
-ffffffff82d7e030 r ural_devs
-ffffffff82d7e0a0 r ural_rf2522_r2
-ffffffff82d7e0e0 r ural_rf2524_r2
-ffffffff82d7e120 r ural_rf2525_hi_r2
-ffffffff82d7e160 r ural_rf2525_r2
-ffffffff82d7e1a0 r ural_rf2525e_r2
-ffffffff82d7e1e0 r ural_rf2526_hi_r2
-ffffffff82d7e220 r ural_rf2526_r2
-ffffffff82d7e260 r ural_def_bbp
-ffffffff82d7e2a0 r ural_def_mac
-ffffffff82d7f000 R rum_ca
-ffffffff82d7f030 r rum_devs
-ffffffff82d7f110 r rum_rf5225
-ffffffff82d7f460 r rum_rf5226
-ffffffff82d7f7b0 r rum_def_bbp
-ffffffff82d7f7f0 r rum_def_mac
-ffffffff82d80000 R run_ca
-ffffffff82d80030 r run_devs
-ffffffff82d80430 r rt2860_rf2850
-ffffffff82d80860 r rt2860_rates
-ffffffff82d80920 r rt5592_freqs_40mhz
-ffffffff82d80a60 r rt5592_freqs_20mhz
-ffffffff82d80ba0 r rt5592_2ghz_def_rf
-ffffffff82d80be0 r rt5592_chan_5ghz
-ffffffff82d80e30 r rt5592_def_bbp
-ffffffff82d80e70 r rt5592_bbp_r196
-ffffffff82d80ed0 r rt5390_def_bbp
-ffffffff82d80f00 r rt3572_def_rf
-ffffffff82d80f40 r rt3070_def_rf
-ffffffff82d80f70 r rt3593_def_rf
-ffffffff82d80fb0 r rt5592_def_rf
-ffffffff82d80fe0 r rt5392_def_rf
-ffffffff82d81060 r rt5390_def_rf
-ffffffff82d810e0 r rt2870_def_mac
-ffffffff82d82000 R mtw_ca
-ffffffff82d82030 r mtw_devs
-ffffffff82d82070 r rt2860_rates
-ffffffff82d82130 r mt7601_rf_chan
-ffffffff82d821a0 r mt7601_def_bbp
-ffffffff82d822d0 r mt7601_rf_bank0
-ffffffff82d82330 r mt7601_rf_bank4
-ffffffff82d823b0 r mt7601_rf_bank5
-ffffffff82d82430 r mt7601_def_mac
-ffffffff82d83000 R zyd_ca
-ffffffff82d83030 r zyd_devs
-ffffffff82d831b0 r zyd_rfmd_init.phyini
-ffffffff82d832e0 r zyd_rfmd_init.rfini
-ffffffff82d83330 r zyd_rfmd_set_channel.rfprog
-ffffffff82d833a0 r zyd_al2230_init.phyini
-ffffffff82d83480 r zyd_al2230_init.rfini
-ffffffff82d834e0 r zyd_al2230_init_b.phyini
-ffffffff82d835d0 r zyd_al2230_init_b.rfini
-ffffffff82d83620 r zyd_al2230_set_channel.rfprog
-ffffffff82d836d0 r zyd_al7230B_init.phyini_1
-ffffffff82d837b0 r zyd_al7230B_init.rfini_1
-ffffffff82d837f0 r zyd_al7230B_set_channel.rfprog
-ffffffff82d83860 r zyd_al7230B_set_channel.rfsc
-ffffffff82d83890 r zyd_al2210_init.phyini
-ffffffff82d838f0 r zyd_al2210_init.rfini
-ffffffff82d83920 r zyd_al2210_set_channel.rfprog
-ffffffff82d83960 r zyd_gct_init.phyini
-ffffffff82d839b0 r zyd_gct_init.rfini
-ffffffff82d83a50 r zyd_gct_set_channel.rfprog
-ffffffff82d83a90 r zyd_maxim_set_channel.phyini
-ffffffff82d83ba0 r zyd_maxim_set_channel.rfini
-ffffffff82d83be0 r zyd_maxim_set_channel.rfprog
-ffffffff82d83c50 r zyd_maxim2_set_channel.phyini
-ffffffff82d83d70 r zyd_maxim2_set_channel.rfini
-ffffffff82d83db0 r zyd_maxim2_set_channel.rfprog
-ffffffff82d83e20 r zyd_rf_name.zyd_rfs
-ffffffff82d83ea0 r zyd_def_phyB
-ffffffff82d840d0 r zyd_def_phy
-ffffffff82d85000 R upgt_ca
-ffffffff82d85028 r upgt_devs_1
-ffffffff82d85030 r upgt_devs_2
-ffffffff82d86000 R urtw_ca
-ffffffff82d86030 r urtw_devs
-ffffffff82d86090 r urtw_ratetable
-ffffffff82d860f0 r urtw_8225_gain
-ffffffff82d86110 r urtw_8225_txpwr_cck_ch14
-ffffffff82d86140 r urtw_8225_txpwr_cck
-ffffffff82d86170 r urtw_8225_tx_gain_cck_ofdm
-ffffffff82d86176 r urtw_8225_txpwr_ofdm
-ffffffff82d86180 r urtw_8225_rf_part1
-ffffffff82d86200 r urtw_8225_rxgain
-ffffffff82d862c0 r urtw_8225_agc
-ffffffff82d86340 r urtw_8225_rf_part2
-ffffffff82d86470 r urtw_8225_rf_part3
-ffffffff82d86550 r urtw_8225_channel
-ffffffff82d8658c r urtw_8225_threshold
-ffffffff82d865a0 r urtw_8225v2_gain_bg
-ffffffff82d865c0 r urtw_8225v2_tx_gain_cck_ofdm
-ffffffff82d865f0 r urtw_8225v2_rf_part1
-ffffffff82d86670 r urtw_8225v2_rxgain
-ffffffff82d86730 r urtw_8225v2_rf_part2
-ffffffff82d86870 r urtw_8225v2_rf_part3
-ffffffff82d86970 r urtw_8187b_regtbl
-ffffffff82d86a90 r urtw_8225v2_b_rf
-ffffffff82d86b20 r urtw_8225v2_agc
-ffffffff82d86ba0 r urtw_8225v2_ofdm
-ffffffff82d87000 R urtwn_ca
-ffffffff82d87030 r urtwn_devs
-ffffffff82d87330 r rtl8188eu_mac
-ffffffff82d874a0 r rtl8192eu_mac
-ffffffff82d87640 r rtl8192cu_mac
-ffffffff82d87798 r rtl8188eu_bb_prog
-ffffffff82d877c0 r rtl8192eu_bb_prog
-ffffffff82d877e8 r rtl8188ce_bb_prog
-ffffffff82d87810 r rtl8188ru_bb_prog
-ffffffff82d87838 r rtl8188cu_bb_prog
-ffffffff82d87860 r rtl8192ce_bb_prog
-ffffffff82d87888 r rtl8192cu_bb_prog
-ffffffff82d878b0 r rtl8188eu_bb_regs
-ffffffff82d87a30 r rtl8188eu_bb_vals
-ffffffff82d87d30 r rtl8188eu_agc_vals
-ffffffff82d87f30 r rtl8192e_bb_regs
-ffffffff82d880d0 r rtl8192e_bb_vals
-ffffffff82d88410 r rtl8192eu_agc_vals
-ffffffff82d88610 r rtl8192ce_bb_regs
-ffffffff82d88790 r rtl8188ce_bb_vals
-ffffffff82d88a80 r rtl8188ce_agc_vals
-ffffffff82d88d00 r rtl8188ru_bb_regs
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-ffffffff83281028 d dma_fence_stub_mtx
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-ffffffff8329700c D radeon_gart_size
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-ffffffff83297018 D radeon_pcie_gen2
-ffffffff8329701c D radeon_msi
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-ffffffff83297024 D radeon_dpm
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-ffffffff8329702c D radeon_runtime_pm
-ffffffff83297030 D radeon_vm_size
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-ffffffff83297038 D radeon_use_pflipirq
-ffffffff8329703c D radeon_bapm
-ffffffff83297040 D radeon_backlight
-ffffffff83297044 D radeon_auxch
-ffffffff83297048 D radeon_uvd
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-ffffffff83297050 D radeon_si_support
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-ffffffff83297058 D radeondrm_cd
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 ffffffff83800000 B _end
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