--- 7.3/2023-05-18T04:43:55Z/2023-04-17T00:00:00Z/nm-bsd-ot14.txt Fri May 19 17:50:15 2023 +++ 7.3/2023-05-18T04:43:55Z/2023-04-18T00:00:00Z/nm-bsd-ot14.txt Fri May 19 20:06:44 2023 @@ -2,14 +2,14 @@ 00011006 A mp_pdirpa 0001419d A acpi_pdirpa 01000000 A __kernel_phys_base -02547000 T __kernel_kutext_phys -0254b000 C __kernel_cptext_phys -0254c000 C __kernel_rodata_phys -02dff000 R __kernel_kutext_page_phys -02e01000 C __kernel_randomdata_phys -030c2000 R __kernel_data_phys -033f3000 D __kernel_kudata_phys -033f4000 C __kernel_bss_phys +02548000 T __kernel_kutext_phys +0254c000 C __kernel_cptext_phys +0254d000 C __kernel_rodata_phys +02e00000 R __kernel_kutext_page_phys +02e02000 C __kernel_randomdata_phys +030c3000 R __kernel_data_phys +033f4000 D __kernel_kudata_phys +033f5000 C __kernel_bss_phys 03800000 B __kernel_phys_end 80000000 A __kernel_virt_to_phys ffffffff80000000 A __kernel_base @@ -11426,29 +11426,29 @@ ffffffff815be000 T lgdt ffffffff815be040 T setjmp ffffffff815be090 T longjmp ffffffff815be0e0 T cpu_switchto -ffffffff815be16e t switch_exited -ffffffff815be1ac t restore_saved -ffffffff815be28e t switch_restored -ffffffff815be2d0 T cpu_idle_enter -ffffffff815be2e0 T cpu_idle_leave -ffffffff815be2f0 T retpoline_rax -ffffffff815be310 T cpu_idle_cycle -ffffffff815be350 T savectx -ffffffff815be410 T proc_trampoline -ffffffff815be500 T intr_fast_exit -ffffffff815be590 T xrstor_user -ffffffff815be5a4 T xrstor_fault -ffffffff815be5c0 T xrstor_resume -ffffffff815be5e0 T fpusave -ffffffff815be610 T fpusavereset -ffffffff815be650 T xsetbv_user -ffffffff815be666 T xsetbv_fault -ffffffff815be680 T xsetbv_resume -ffffffff815be6a0 T pagezero -ffffffff815be6f0 T pku_xonly -ffffffff815be720 T rdmsr_safe -ffffffff815be72d T rdmsr_safe_fault -ffffffff815be760 T rdmsr_resume +ffffffff815be172 t switch_exited +ffffffff815be1b0 t restore_saved +ffffffff815be29e t switch_restored +ffffffff815be2e0 T cpu_idle_enter +ffffffff815be2f0 T cpu_idle_leave +ffffffff815be300 T retpoline_rax +ffffffff815be320 T cpu_idle_cycle +ffffffff815be360 T savectx +ffffffff815be420 T proc_trampoline +ffffffff815be510 T intr_fast_exit +ffffffff815be5a0 T xrstor_user +ffffffff815be5b8 T xrstor_fault +ffffffff815be5e0 T xrstor_resume +ffffffff815be600 T fpusave +ffffffff815be640 T fpusavereset +ffffffff815be680 T xsetbv_user +ffffffff815be69a T xsetbv_fault +ffffffff815be6c0 T xsetbv_resume +ffffffff815be6e0 T pagezero +ffffffff815be730 T pku_xonly +ffffffff815be760 T rdmsr_safe +ffffffff815be771 T rdmsr_safe_fault +ffffffff815be7a0 T rdmsr_resume ffffffff815bf000 T xen_hypercall_page ffffffff815c0000 T hv_hypercall_page ffffffff815c1000 t _key_expansion_128 @@ -11458,23 +11458,23 @@ ffffffff815c10b0 t _key_expansion_192b ffffffff815c1110 t _key_expansion_256b ffffffff815c1150 T aesni_set_key ffffffff815c1340 T aesni_enc -ffffffff815c1370 t _aesni_enc1 -ffffffff815c1440 t _aesni_enc4 -ffffffff815c15f0 T aesni_dec -ffffffff815c1630 t _aesni_dec1 -ffffffff815c1700 t _aesni_dec4 -ffffffff815c18b0 T aesni_cbc_enc -ffffffff815c1910 T aesni_cbc_dec -ffffffff815c19e0 t _aesni_inc_init -ffffffff815c1a30 t _aesni_inc -ffffffff815c1a80 T aesni_ctr_enc -ffffffff815c1b70 t _aesni_gmac_gfmul -ffffffff815c1c80 T aesni_gmac_update -ffffffff815c1d00 T aesni_gmac_final -ffffffff815c1d40 T aesni_xts_enc -ffffffff815c1da0 T aesni_xts_dec -ffffffff815c1e10 t _aesni_xts_tweak -ffffffff815c1e60 t _aesni_xts_tweak_exp +ffffffff815c1380 t _aesni_enc1 +ffffffff815c1450 t _aesni_enc4 +ffffffff815c1600 T aesni_dec +ffffffff815c1640 t _aesni_dec1 +ffffffff815c1710 t _aesni_dec4 +ffffffff815c18c0 T aesni_cbc_enc +ffffffff815c1920 T aesni_cbc_dec +ffffffff815c1a00 t _aesni_inc_init +ffffffff815c1a50 t _aesni_inc +ffffffff815c1aa0 T aesni_ctr_enc +ffffffff815c1b90 t _aesni_gmac_gfmul +ffffffff815c1ca0 T aesni_gmac_update +ffffffff815c1d20 T aesni_gmac_final +ffffffff815c1d60 T aesni_xts_enc +ffffffff815c1dd0 T aesni_xts_dec +ffffffff815c1e40 t _aesni_xts_tweak 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rtwn_llt_init -ffffffff818a02f0 T rtwn_92c_power_on -ffffffff818a0770 T rtwn_88e_power_on -ffffffff818a0b70 T rtwn_23a_power_on -ffffffff818a0fe0 T rtwn_tx_report -ffffffff818a2000 T ral_pci_match -ffffffff818a2030 T ral_pci_attach -ffffffff818a2210 T ral_pci_detach -ffffffff818a22b0 T ral_pci_activate -ffffffff818a2340 T ral_pci_wakeup -ffffffff818a3000 T acx_pci_match -ffffffff818a3030 T acx_pci_attach -ffffffff818a3260 T acx_pci_detach -ffffffff818a4000 T pgt_pci_match -ffffffff818a4030 T pgt_pci_attach -ffffffff818a4200 T pgt_pci_detach -ffffffff818a5000 T malo_pci_match -ffffffff818a5030 T malo_pci_attach -ffffffff818a51e0 T malo_pci_detach -ffffffff818a5230 T malo_pci_activate -ffffffff818a5290 T malo_pci_wakeup -ffffffff818a6000 T bwi_pci_match -ffffffff818a6070 T bwi_pci_attach -ffffffff818a6290 T bwi_pci_detach -ffffffff818a62e0 T bwi_pci_activate -ffffffff818a6350 T bwi_reset_bcm4331 -ffffffff818a6470 T bwi_pci_conf_write -ffffffff818a64a0 T bwi_pci_conf_read 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lii_txintr -ffffffff818b5000 T ichiic_match -ffffffff818b5030 T ichiic_attach -ffffffff818b5220 T ichiic_intr -ffffffff818b5330 T ichiic_i2c_acquire_bus -ffffffff818b5380 T ichiic_i2c_release_bus -ffffffff818b53d0 T ichiic_i2c_exec -ffffffff818b6000 T viapm_match -ffffffff818b6030 T viapm_attach -ffffffff818b6650 T viapm_intr -ffffffff818b6760 T viapm_i2c_acquire_bus -ffffffff818b67b0 T viapm_i2c_release_bus -ffffffff818b6800 T viapm_i2c_exec -ffffffff818b6b20 T viapm_refresh_sensor_data -ffffffff818b6e50 T viapm_refresh -ffffffff818b6e80 T val_to_uK -ffffffff818b6f20 T val_to_rpm -ffffffff818b6f60 T val_to_uV -ffffffff818b7000 T viapm_get_timecount -ffffffff818b8000 T amdiic_match -ffffffff818b8030 T amdiic_attach -ffffffff818b8200 T amdiic_intr -ffffffff818b82d0 T amdiic_i2c_acquire_bus -ffffffff818b8320 T amdiic_i2c_release_bus -ffffffff818b8370 T amdiic_i2c_exec -ffffffff818b85d0 T amdiic_read -ffffffff818b8740 T amdiic_wait -ffffffff818b87e0 T amdiic_write -ffffffff818b9000 T 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softintr +ffffffff815fc000 T x86_bus_space_io_read_1 +ffffffff815fc030 T x86_bus_space_io_read_2 +ffffffff815fc060 T x86_bus_space_io_read_4 +ffffffff815fc090 T x86_bus_space_io_read_8 +ffffffff815fc0b0 T x86_bus_space_io_read_multi_1 +ffffffff815fc0f0 T x86_bus_space_io_read_multi_2 +ffffffff815fc130 T x86_bus_space_io_read_multi_4 +ffffffff815fc170 T x86_bus_space_io_read_multi_8 +ffffffff815fc190 T x86_bus_space_io_read_region_1 +ffffffff815fc1d0 T x86_bus_space_io_read_region_2 +ffffffff815fc210 T x86_bus_space_io_read_region_4 +ffffffff815fc250 T x86_bus_space_io_read_region_8 +ffffffff815fc270 T x86_bus_space_io_write_1 +ffffffff815fc2a0 T x86_bus_space_io_write_2 +ffffffff815fc2d0 T x86_bus_space_io_write_4 +ffffffff815fc300 T x86_bus_space_io_write_8 +ffffffff815fc320 T x86_bus_space_io_write_multi_1 +ffffffff815fc360 T x86_bus_space_io_write_multi_2 +ffffffff815fc3a0 T x86_bus_space_io_write_multi_4 +ffffffff815fc3e0 T x86_bus_space_io_write_multi_8 +ffffffff815fc400 T x86_bus_space_io_write_region_1 +ffffffff815fc440 T x86_bus_space_io_write_region_2 +ffffffff815fc480 T x86_bus_space_io_write_region_4 +ffffffff815fc4c0 T x86_bus_space_io_write_region_8 +ffffffff815fc4e0 T x86_bus_space_io_set_multi_1 +ffffffff815fc530 T x86_bus_space_io_set_multi_2 +ffffffff815fc580 T x86_bus_space_io_set_multi_4 +ffffffff815fc5d0 T x86_bus_space_io_set_multi_8 +ffffffff815fc5f0 T x86_bus_space_io_set_region_1 +ffffffff815fc650 T x86_bus_space_io_set_region_2 +ffffffff815fc6b0 T x86_bus_space_io_set_region_4 +ffffffff815fc710 T x86_bus_space_io_set_region_8 +ffffffff815fc730 T x86_bus_space_io_copy_1 +ffffffff815fc7c0 T x86_bus_space_io_copy_2 +ffffffff815fc850 T x86_bus_space_io_copy_4 +ffffffff815fc8e0 T x86_bus_space_io_copy_8 +ffffffff815fc900 T x86_bus_space_io_vaddr +ffffffff815fc930 T x86_bus_space_io_mmap +ffffffff815fc960 T x86_bus_space_mem_read_1 +ffffffff815fc990 T x86_bus_space_mem_read_2 +ffffffff815fc9c0 T x86_bus_space_mem_read_4 +ffffffff815fc9f0 T x86_bus_space_mem_read_8 +ffffffff815fca20 T x86_bus_space_mem_read_multi_1 +ffffffff815fca60 T x86_bus_space_mem_read_multi_2 +ffffffff815fcaa0 T x86_bus_space_mem_read_multi_4 +ffffffff815fcae0 T x86_bus_space_mem_read_multi_8 +ffffffff815fcb20 T x86_bus_space_mem_read_region_1 +ffffffff815fcb50 T x86_bus_space_mem_read_region_2 +ffffffff815fcb90 T x86_bus_space_mem_read_region_4 +ffffffff815fcbc0 T x86_bus_space_mem_read_region_8 +ffffffff815fcc00 T x86_bus_space_mem_write_1 +ffffffff815fcc30 T x86_bus_space_mem_write_2 +ffffffff815fcc60 T x86_bus_space_mem_write_4 +ffffffff815fcc90 T x86_bus_space_mem_write_8 +ffffffff815fccc0 T x86_bus_space_mem_write_multi_1 +ffffffff815fcd00 T x86_bus_space_mem_write_multi_2 +ffffffff815fcd40 T x86_bus_space_mem_write_multi_4 +ffffffff815fcd80 T x86_bus_space_mem_write_multi_8 +ffffffff815fcdc0 T x86_bus_space_mem_write_region_1 +ffffffff815fcdf0 T x86_bus_space_mem_write_region_2 +ffffffff815fce30 T x86_bus_space_mem_write_region_4 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x86_64_ipi_wbinvd +ffffffff81602000 T x86_send_ipi +ffffffff81602060 T x86_fast_ipi +ffffffff816020c0 T x86_broadcast_ipi +ffffffff81602150 T x86_ipi_handler +ffffffff81603000 T mp_setperf +ffffffff81603060 T x86_setperf_ipi +ffffffff81603080 T mp_setperf_init +ffffffff81604000 T apic_format_redir +ffffffff81605000 T consinit +ffffffff81606000 T cninit +ffffffff81607000 T dkcsumattach +ffffffff81608000 T db_read_address +ffffffff816081b0 T db_print_address +ffffffff816082b0 T db_disasm_3dnow +ffffffff81608340 T db_disasm_esc +ffffffff81608540 T db_disasm +ffffffff8160a000 T db_printtrap +ffffffff8160a080 T db_ktrap +ffffffff8160a260 T db_enter_ddb +ffffffff8160a570 T db_sysregs_cmd +ffffffff8160a690 T db_cpuinfo_cmd +ffffffff8160a7d0 T db_startproc_cmd +ffffffff8160a930 T db_startcpu +ffffffff8160a9b0 T db_stopproc_cmd +ffffffff8160ab60 T db_stopcpu +ffffffff8160abf0 T db_ddbproc_cmd +ffffffff8160ad10 T x86_ipi_db +ffffffff8160ad40 T db_enter +ffffffff8160ad70 T db_machine_init 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rasops_pack_mattr +ffffffff81616a30 T rasops_pack_cattr +ffffffff81616ab0 T rasops_copycols_rotated +ffffffff81616e80 T rasops_copyrows_rotated +ffffffff81617290 T rasops_erasecols_rotated +ffffffff81617490 T rasops_eraserows_rotated +ffffffff81617690 T rasops_putchar_rotated +ffffffff81617820 T rasops_copychar +ffffffff816179b0 T rasops_free_screen +ffffffff81617a40 T rasops_show_screen +ffffffff81617ac0 T rasops_getchar +ffffffff81617b20 T rasops_scrollback +ffffffff81617ce0 T rasops_add_font +ffffffff81617d60 T rasops_use_font +ffffffff81617e30 T rasops_load_font +ffffffff81617ed0 T rasops_list_font_cb +ffffffff81617f10 T rasops_list_font +ffffffff81617fc0 T rasops_claim_framebuffer +ffffffff81618040 T rasops_check_framebuffer +ffffffff81619000 T rasops8_init +ffffffff81619070 T rasops8_putchar8 +ffffffff81619310 T rasops8_putchar12 +ffffffff81619560 T rasops8_putchar16 +ffffffff81619730 T rasops8_putchar +ffffffff81619a60 T rasops8_makestamp +ffffffff8161a000 T rasops15_init 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aq_init_rss +ffffffff817191b0 T aq_hw_init +ffffffff817193c0 T aq_ifmedia_change +ffffffff81719490 T aq_ifmedia_status +ffffffff81719580 T aq_ioctl +ffffffff817197c0 T aq_start +ffffffff81719b00 T aq_watchdog +ffffffff81719b30 T aq_set_linkmode +ffffffff81719b60 T aq_refill +ffffffff81719bd0 T aq_intr_queue +ffffffff81719cb0 T aq_enable_intr +ffffffff81719dc0 T aq_fw_read_version +ffffffff81719e60 T aq_mac_soft_reset +ffffffff81719e90 T aq_mac_soft_reset_rbl +ffffffff8171a130 T aq_global_software_reset +ffffffff8171a250 T aq_mac_soft_reset_flb +ffffffff8171a610 T aq_fw_downld_dwords +ffffffff8171a930 T aq_hw_l3_filter_set +ffffffff8171ab40 T aq_hw_init_tx_path +ffffffff8171ad50 T aq_hw_init_rx_path +ffffffff8171b290 T aq_set_mac_addr +ffffffff8171b470 T aq_hw_qos_set +ffffffff8171ba90 T aq_get_linkmode +ffffffff8171bb00 T aq_txring_reset +ffffffff8171bea0 T aq_rxring_reset +ffffffff8171c390 T aq_rx_fill +ffffffff8171c590 T aq_rxeof +ffffffff8171c910 T aq_txeof +ffffffff8171cae0 T aq_update_link_status +ffffffff8171cb80 T aq_free_slots +ffffffff8171cc30 T aq_queue_up +ffffffff8171d0a0 T aq_dmamem_alloc +ffffffff8171d1f0 T aq_dmamem_free +ffffffff8171d260 T aq_queue_down +ffffffff8171d540 T aq_invalidate_rx_desc_cache +ffffffff8171d5c0 T aq_up +ffffffff8171da00 T aq_down +ffffffff8171db50 T aq_rxrinfo +ffffffff8171dc40 T aq_iff +ffffffff8171e000 T tulip_probe +ffffffff8171e060 T tulip_attach +ffffffff8171eab0 T tulip_timeout_callback +ffffffff8171eb00 T tulip_timeout +ffffffff8171eb70 T tulip_txprobe +ffffffff8171ecb0 T tulip_txput +ffffffff8171f230 T tulip_media_set +ffffffff8171f820 T tulip_reset +ffffffff8171fbe0 T tulip_mii_autonegotiate +ffffffff8171fee0 T tulip_mii_readreg +ffffffff81720090 T tulip_mii_writereg +ffffffff81720250 T tulip_linkup +ffffffff81720320 T tulip_init +ffffffff817204a0 T tulip_media_print +ffffffff817204f0 T tulip_media_link_monitor +ffffffff81720760 T tulip_mii_map_abilities +ffffffff817207f0 T tulip_media_poll +ffffffff81720ce0 T tulip_mii_phy_readspecific +ffffffff81720ea0 T tulip_media_select +ffffffff81720fb0 T tulip_21040_mediainfo_init +ffffffff817210b0 T tulip_21040_media_probe +ffffffff817211a0 T tulip_21040_10baset_only_media_probe +ffffffff81721260 T tulip_21040_10baset_only_media_select +ffffffff817212c0 T tulip_21040_auibnc_only_media_probe +ffffffff81721350 T tulip_21040_auibnc_only_media_select +ffffffff817213a0 T tulip_21041_mediainfo_init +ffffffff81721460 T tulip_21041_media_probe +ffffffff81721540 T tulip_21041_media_poll +ffffffff81721850 T tulip_mii_get_phyaddr +ffffffff81721910 T tulip_2114x_media_preset +ffffffff81721b30 T tulip_null_media_poll +ffffffff81721b60 T tulip_21140_mediainit +ffffffff81721bb0 T tulip_21140_evalboard_media_probe +ffffffff81721d90 T tulip_21140_accton_media_probe +ffffffff81721fb0 T tulip_21140_smc9332_media_probe +ffffffff817221e0 T tulip_21140_cogent_em100_media_probe +ffffffff81722350 T tulip_21140_znyx_zx34x_media_probe +ffffffff81722590 T tulip_2114x_media_probe +ffffffff817225c0 T tulip_delay_300ns +ffffffff817226d0 T tulip_srom_idle +ffffffff81723070 T tulip_srom_read +ffffffff81723e10 T tulip_mii_writebits +ffffffff817243a0 T tulip_mii_turnaround +ffffffff81724b70 T tulip_mii_readbits +ffffffff81724f50 T tulip_identify_dec_nic +ffffffff81725000 T tulip_identify_znyx_nic +ffffffff817252d0 T tulip_identify_smc_nic +ffffffff817254b0 T tulip_identify_cogent_nic +ffffffff817255a0 T tulip_identify_accton_nic +ffffffff817256d0 T tulip_identify_asante_nic +ffffffff817259a0 T tulip_identify_compex_nic +ffffffff81725af0 T tulip_srom_decode +ffffffff81726740 T tulip_read_macaddr +ffffffff81727100 T tulip_ifmedia_add +ffffffff817271f0 T tulip_ifmedia_change +ffffffff817273d0 T tulip_ifmedia_status +ffffffff81727440 T tulip_alloc_rxmap +ffffffff81727480 T tulip_free_rxmap +ffffffff817274c0 T tulip_alloc_txmap +ffffffff81727500 T tulip_free_txmap +ffffffff81727540 T tulip_addr_filter +ffffffff81727850 T tulip_rx_intr +ffffffff81727e60 T tulip_txput_setup +ffffffff817280f0 T tulip_tx_intr +ffffffff81728510 T tulip_print_abnormal_interrupt +ffffffff81728540 T tulip_intr_handler +ffffffff817288f0 T tulip_ifstart +ffffffff817289c0 T tulip_intr_shared +ffffffff81728a30 T tulip_intr_normal +ffffffff81728a80 T tulip_ifioctl +ffffffff81728b70 T tulip_ifwatchdog +ffffffff81728c70 T tulip_busdma_allocmem +ffffffff81728e00 T tulip_busdma_init +ffffffff81729020 T tulip_initcsrs +ffffffff81729120 T tulip_initring +ffffffff8172a000 T ep_pci_match +ffffffff8172a030 T ep_pci_attach +ffffffff8172b000 T pcn_match +ffffffff8172b070 T pcn_attach +ffffffff8172b7e0 T pcn_tick +ffffffff8172b830 T pcn_reset +ffffffff8172b8a0 T pcn_intr +ffffffff8172bae0 T pcn_ioctl +ffffffff8172bc40 T pcn_start +ffffffff8172c090 T pcn_watchdog +ffffffff8172c100 T pcn_txintr +ffffffff8172c5c0 T pcn_init +ffffffff8172ce80 T pcn_stop +ffffffff8172d000 T pcn_rxintr +ffffffff8172d520 T pcn_spnd +ffffffff8172d620 T pcn_add_rxbuf +ffffffff8172d810 T pcn_rxdrain +ffffffff8172d8b0 T pcn_set_filter +ffffffff8172da10 T pcn_79c970_mediainit +ffffffff8172db20 T pcn_79c970_mediachange +ffffffff8172dce0 T pcn_79c970_mediastatus +ffffffff8172dd20 T pcn_79c971_mediainit +ffffffff8172ddf0 T pcn_mii_readreg +ffffffff8172deb0 T pcn_mii_writereg +ffffffff8172df50 T pcn_mii_statchg +ffffffff8172dfb0 T pcn_79c971_mediachange +ffffffff8172e000 T pcn_79c971_mediastatus +ffffffff8172f000 T siop_lookup_product +ffffffff8172f0a0 T siop_pci_attach_common +ffffffff8172f530 T siop_pci_reset +ffffffff81730000 T siop_pci_match +ffffffff81730050 T siop_pci_attach +ffffffff81731000 T sii3114_read_reg +ffffffff81731060 T sii3114_write_reg +ffffffff817310d0 T pdc203xx_read_reg +ffffffff81731130 T pdc203xx_write_reg +ffffffff817311a0 T svwsata_read_reg +ffffffff81731200 T svwsata_write_reg +ffffffff81731240 T svwsata_lba48_write_reg +ffffffff81731280 T pciide_pci_read +ffffffff817312d0 T pciide_pci_write +ffffffff81731340 T default_chip_map +ffffffff81731990 T artisea_chip_map +ffffffff81731bf0 T piix_chip_map +ffffffff817321e0 T piixsata_chip_map +ffffffff81732700 T sch_chip_map +ffffffff81732a20 T amd756_chip_map +ffffffff81732e30 T ixp_chip_map +ffffffff817331a0 T cmd_chip_map +ffffffff81733300 T cmd0643_9_chip_map +ffffffff81733600 T cmd680_chip_map +ffffffff817337e0 T sii3112_chip_map +ffffffff81733b60 T sii3114_chip_map +ffffffff81733f60 T apollo_chip_map +ffffffff817345c0 T sata_chip_map +ffffffff817347e0 T cy693_chip_map +ffffffff81734ba0 T sis_chip_map +ffffffff817352e0 T natsemi_chip_map +ffffffff81735740 T ns_scx200_chip_map +ffffffff81735ad0 T acer_chip_map +ffffffff81736150 T hpt_chip_map +ffffffff81736630 T pdc202xx_chip_map +ffffffff81736ff0 T pdcsata_chip_map +ffffffff81737770 T acard_chip_map +ffffffff817379e0 T serverworks_chip_map +ffffffff81737cf0 T svwsata_chip_map +ffffffff817380d0 T nforce_chip_map +ffffffff817384f0 T ite_chip_map +ffffffff817387b0 T jmicron_chip_map +ffffffff81738bc0 T phison_chip_map +ffffffff81738ee0 T rdc_chip_map +ffffffff81739330 T pciide_match +ffffffff817393d0 T pciide_attach +ffffffff817394b0 T pciide_detach +ffffffff81739510 T pciide_activate +ffffffff81739c40 T pciide_lookup_product +ffffffff81739ea0 T pciide_dmacmd_read +ffffffff81739ed0 T pciide_dmacmd_write +ffffffff81739f00 T pciide_dmactl_read +ffffffff81739f30 T pciide_dmactl_write +ffffffff81739f60 T pciide_dmatbl_write +ffffffff81739f90 T pciide_mapregs_compat +ffffffff8173a110 T pciide_unmapregs_compat +ffffffff8173a1a0 T pciide_mapregs_native +ffffffff8173a490 T pciide_unmapregs_native +ffffffff8173a520 T pciide_mapreg_dma +ffffffff8173a6b0 T pciide_dma_init +ffffffff8173a980 T pciide_dma_start +ffffffff8173aa00 T pciide_dma_finish +ffffffff8173abd0 T pciide_unmapreg_dma +ffffffff8173ac00 T pciide_intr_flag +ffffffff8173ae10 T pciide_compat_intr +ffffffff8173ae90 T pciide_pci_intr +ffffffff8173af50 T pciide_channel_dma_setup +ffffffff8173b020 T pciide_dma_table_setup +ffffffff8173b260 T pciide_irqack +ffffffff8173b2b0 T pciide_chansetup +ffffffff8173b390 T pciide_chanfree +ffffffff8173b3e0 T pciide_mapchan +ffffffff8173b470 T pciide_unmap_chan +ffffffff8173b540 T pciide_chan_candisable +ffffffff8173b5b0 T pciide_map_compat_intr +ffffffff8173b650 T pciide_unmap_compat_intr +ffffffff8173b6b0 T pciide_print_channels +ffffffff8173b780 T pciide_print_modes +ffffffff8173b790 T default_chip_unmap +ffffffff8173b870 T sata_setup_channel +ffffffff8173b990 T piix_timing_debug +ffffffff8173b9c0 T piix_setup_channel +ffffffff8173be50 T piix3_4_setup_channel +ffffffff8173c5f0 T piix_setup_idetim_timings +ffffffff8173c660 T piix_setup_idetim_drvs +ffffffff8173c780 T piix_setup_sidetim_timings +ffffffff8173c7f0 T amd756_setup_channel +ffffffff8173cba0 T apollo_setup_channel +ffffffff8173cf20 T cmd_channel_map +ffffffff8173d290 T cmd_pci_intr +ffffffff8173d390 T cmd646_9_irqack +ffffffff8173d490 T cmd0643_9_setup_channel +ffffffff8173d8b0 T cmd680_setup_channel +ffffffff8173ddb0 T cmd680_channel_map +ffffffff8173e0e0 T sii_fixup_cacheline +ffffffff8173e3b0 T sii3112_setup_channel +ffffffff8173e570 T sii3112_drv_probe +ffffffff8173e990 T sii3114_mapreg_dma +ffffffff8173ec70 T sii3114_chansetup +ffffffff8173ed40 T sii3114_mapchan +ffffffff8173f060 T sii3114_dmacmd_read +ffffffff8173f0a0 T sii3114_dmacmd_write +ffffffff8173f0e0 T sii3114_dmactl_read +ffffffff8173f120 T sii3114_dmactl_write +ffffffff8173f160 T sii3114_dmatbl_write +ffffffff8173f1a0 T cy693_setup_channel +ffffffff8173f3c0 T sis_hostbr_match +ffffffff8173f490 T sis_south_match +ffffffff8173f4d0 T sis_setup_channel +ffffffff8173f810 T sis96x_setup_channel +ffffffff8173faf0 T natsemi_irqack +ffffffff8173fb90 T natsemi_setup_channel +ffffffff8173ff80 T natsemi_pci_intr +ffffffff81740080 T ns_scx200_setup_channel +ffffffff81740380 T acer_dma_init +ffffffff817403c0 T acer_setup_channel +ffffffff817407c0 T acer_pci_intr +ffffffff817408b0 T hpt_setup_channel +ffffffff81740c00 T hpt_pci_intr +ffffffff81740d10 T pdc268_config_read +ffffffff81740d80 T pdc20268_setup_channel +ffffffff81740f50 T pdc202xx_setup_channel +ffffffff817413a0 T pdc20262_dma_start +ffffffff81741510 T pdc20262_dma_finish +ffffffff817415e0 T pdc20265_pci_intr +ffffffff81741790 T pdc202xx_pci_intr +ffffffff817418a0 T pdc203xx_pci_intr +ffffffff81741990 T pdc205xx_pci_intr +ffffffff81741ac0 T pdc203xx_irqack +ffffffff81741b50 T pdc203xx_setup_channel +ffffffff81741c50 T pdc205xx_do_reset +ffffffff81741cf0 T pdc205xx_drv_probe +ffffffff81741f70 T pdc203xx_dma_start +ffffffff81742030 T pdc203xx_dma_finish +ffffffff81742120 T serverworks_setup_channel +ffffffff81742550 T serverworks_pci_intr +ffffffff81742660 T svwsata_mapreg_dma +ffffffff81742710 T svwsata_drv_probe +ffffffff817429f0 T svwsata_mapchan +ffffffff81742ae0 T svwsata_dmacmd_read +ffffffff81742b10 T svwsata_dmacmd_write +ffffffff81742b40 T svwsata_dmactl_read +ffffffff81742b70 T svwsata_dmactl_write +ffffffff81742ba0 T svwsata_dmatbl_write +ffffffff81742bd0 T acard_setup_channel +ffffffff81742ff0 T nforce_setup_channel +ffffffff81743340 T nforce_pci_intr +ffffffff81743430 T ite_setup_channel +ffffffff817437b0 T ixp_setup_channel +ffffffff81743b50 T jmicron_setup_channel +ffffffff81743db0 T phison_setup_channel +ffffffff81743fc0 T sch_setup_channel +ffffffff817441c0 T rdc_setup_channel +ffffffff81745000 T ppbmatch +ffffffff81745050 T ppbattach +ffffffff817457d0 T ppbdetach +ffffffff817458f0 T ppbactivate +ffffffff81745d70 T ppb_alloc_busrange +ffffffff81745f20 T ppb_hotplug_insert +ffffffff81745f80 T ppb_hotplug_rescan +ffffffff81745fc0 T ppb_hotplug_remove +ffffffff81746120 T ppb_hotplug_insert_finish +ffffffff81746150 T ppb_intr +ffffffff81746210 T ppb_alloc_resources +ffffffff81746920 T ppbprint +ffffffff81747000 T cy_pci_match +ffffffff81747030 T cy_pci_attach +ffffffff81748000 T rl_pci_match +ffffffff81748060 T rl_pci_attach +ffffffff81748220 T rl_pci_detach +ffffffff81749000 T re_pci_probe +ffffffff817490a0 T re_pci_attach +ffffffff817493d0 T re_pci_detach +ffffffff81749490 T re_pci_activate +ffffffff8174a000 T vr_probe +ffffffff8174a0f0 T vr_attach +ffffffff8174a880 T vr_activate +ffffffff8174a900 T vr_mii_readreg +ffffffff8174aa70 T vr_mii_writereg +ffffffff8174abd0 T vr_miibus_readreg +ffffffff8174ac40 T vr_miibus_writereg +ffffffff8174aca0 T vr_miibus_statchg +ffffffff8174acc0 T vr_setcfg +ffffffff8174aee0 T vr_iff +ffffffff8174b060 T vr_reset +ffffffff8174b170 T vr_quirks +ffffffff8174b270 T vr_dmamem_alloc +ffffffff8174b3d0 T vr_dmamem_free +ffffffff8174b440 T vr_intr +ffffffff8174b670 T vr_chipinit +ffffffff8174b750 T vr_ioctl +ffffffff8174b8f0 T vr_start +ffffffff8174bac0 T vr_watchdog +ffffffff8174bb50 T vr_wol +ffffffff8174bd00 T vr_ifmedia_upd +ffffffff8174bd50 T vr_ifmedia_sts +ffffffff8174bdb0 T vr_tick +ffffffff8174be30 T vr_rxtick +ffffffff8174bf10 T vr_stop +ffffffff8174c1a0 T vr_init +ffffffff8174c740 T vr_list_tx_init +ffffffff8174c840 T vr_list_rx_init +ffffffff8174ca00 T vr_fill_rx_ring +ffffffff8174cad0 T vr_alloc_mbuf +ffffffff8174cc40 T vr_rxeof +ffffffff8174cec0 T vr_rxeoc +ffffffff8174d050 T vr_txeof +ffffffff8174d210 T vr_encap +ffffffff8174e000 T txp_probe +ffffffff8174e030 T txp_attach +ffffffff8174e1a0 T txp_attachhook +ffffffff8174e4c0 T txp_chip_init +ffffffff8174e680 T txp_download_fw +ffffffff8174eb20 T txp_alloc_rings +ffffffff8174f960 T txp_command +ffffffff8174fa30 T txp_ifmedia_upd +ffffffff8174fb40 T txp_ifmedia_sts +ffffffff8174fe30 T txp_ioctl +ffffffff8174ff50 T txp_start +ffffffff81750310 T txp_watchdog +ffffffff81750340 T txp_capabilities +ffffffff817504f0 T txp_tick +ffffffff81750640 T txp_intr +ffffffff817508b0 T txp_reset_adapter +ffffffff817509b0 T txp_download_fw_wait +ffffffff81750aa0 T txp_download_fw_section +ffffffff81750e10 T txp_dma_malloc +ffffffff81750fb0 T txp_dma_free +ffffffff81751030 T txp_rx_reclaim +ffffffff81751310 T txp_rxbuf_reclaim +ffffffff81751590 T txp_tx_reclaim +ffffffff81751740 T txp_init +ffffffff81751880 T txp_stop +ffffffff81751980 T txp_set_filter +ffffffff81751b10 T txp_command2 +ffffffff81751df0 T txp_cmd_desc_numfree +ffffffff81751e50 T txp_response +ffffffff81752120 T txp_rsp_fixup +ffffffff81752210 T txp_show_descriptor +ffffffff81753000 T init_audio_devices +ffffffff81753120 T init_BTSC +ffffffff817531e0 T set_audio +ffffffff81753570 T set_bctv_audio +ffffffff817538b0 T msp_autodetect +ffffffff81753ce0 T temp_mute +ffffffff81753d80 T set_BTSC +ffffffff81753da0 T bctv_gpio_write +ffffffff81753f10 T msp_read_id +ffffffff81753fd0 T dpl_read_id +ffffffff81754090 T dpl_autodetect +ffffffff81755000 T writeEEProm +ffffffff81755030 T readEEProm +ffffffff81755100 T signCard +ffffffff817551b0 T probeCard +ffffffff81757000 T bktr_name +ffffffff81757030 T common_bktr_attach +ffffffff81757330 T common_bktr_intr +ffffffff81757950 T video_open +ffffffff81757e10 t set_fps +ffffffff81757f50 T vbi_open +ffffffff81757ff0 T tuner_open +ffffffff81758040 T video_close +ffffffff81758130 T tuner_close +ffffffff81758160 T vbi_close +ffffffff81758190 T video_read +ffffffff81758350 t start_capture +ffffffff8175b290 T vbi_read +ffffffff8175b3b0 T video_ioctl +ffffffff8175c850 T bktr_common_ioctl +ffffffff8175d020 T tuner_ioctl +ffffffff8175df70 T i2cWrite +ffffffff8175e090 T i2cRead +ffffffff8175e1b0 T msp_dpl_read +ffffffff8175e480 T msp_dpl_write +ffffffff8175e640 T msp_dpl_reset +ffffffff8175e940 t i2c_write_byte +ffffffff8175eb20 t i2c_read_byte +ffffffff8175ed40 t split +ffffffff8175ef40 t getline +ffffffff81760000 t bktr_probe +ffffffff81760060 t bktr_attach +ffffffff817602e0 T bktr_get_info +ffffffff817603c0 T bktr_set_info +ffffffff81760520 T get_bktr_mem +ffffffff81760750 T free_bktr_mem +ffffffff817607b0 T bktropen +ffffffff81760870 T bktrclose +ffffffff81760900 T bktrread +ffffffff81760990 T bktrwrite +ffffffff817609c0 T bktrioctl +ffffffff81760a70 T bktrmmap +ffffffff81760b10 t bktr_intr +ffffffff81761000 T select_tuner +ffffffff81761050 T tv_freq +ffffffff817612a0 T do_afc +ffffffff817613d0 T get_tuner_status +ffffffff817613f0 T tv_channel +ffffffff817614b0 T tuner_getchnlset +ffffffff81762000 T xl_pci_match +ffffffff81762030 T xl_pci_attach +ffffffff81762390 T xl_pci_detach +ffffffff81762420 T xl_pci_wol_power +ffffffff81762470 T xl_pci_intr_ack +ffffffff81763000 T fxp_pci_match +ffffffff81763030 T fxp_pci_attach +ffffffff81763360 T fxp_pci_detach +ffffffff81764000 T em_probe +ffffffff81764030 T em_attach +ffffffff81764530 T em_detach +ffffffff817645c0 T em_activate +ffffffff81764640 T em_defer_attach +ffffffff817646e0 T em_stop +ffffffff817647d0 T em_free_pci_resources +ffffffff81764a90 T em_setup_interface +ffffffff81764c80 T em_update_link_status +ffffffff81764e70 T em_local_timer +ffffffff81764f20 T em_82547_move_tail +ffffffff81764f60 T em_identify_hardware +ffffffff81765070 T em_allocate_pci_resources +ffffffff81765470 T em_allocate_desc_rings +ffffffff81765580 T em_hardware_init +ffffffff81765820 T em_kstat_attach +ffffffff81765970 T em_start +ffffffff81765c60 T em_encap +ffffffff81766140 T em_82547_move_tail_locked +ffffffff81766370 T em_82547_update_fifo_head +ffffffff817663c0 T em_ioctl +ffffffff817666b0 T em_init +ffffffff81766a10 T em_get_sffpage +ffffffff81766ad0 T em_disable_intr +ffffffff81766bd0 T em_iff +ffffffff81766ee0 T em_initialize_receive_unit +ffffffff81767670 T em_enable_intr +ffffffff817677d0 T em_watchdog +ffffffff81767980 T em_enable_hw_vlans +ffffffff81767a20 T em_setup_transmit_structures +ffffffff81767c20 T em_initialize_transmit_unit +ffffffff81768240 T em_setup_receive_structures +ffffffff81768380 T em_setup_queues_msix +ffffffff81768a40 T em_intr +ffffffff81768b40 T em_txeof +ffffffff81768d10 T em_rxeof +ffffffff817691d0 T em_rxrefill +ffffffff817692e0 T em_media_status +ffffffff81769520 T em_flowstatus +ffffffff81769630 T em_media_change +ffffffff81769790 T em_tx_ctx_setup +ffffffff81769920 T em_transmit_checksum_setup +ffffffff81769a00 T em_fill_descriptors +ffffffff81769a80 T em_82547_fifo_workaround +ffffffff81769af0 T em_82547_tx_fifo_reset +ffffffff81769f60 T em_pci_clear_mwi +ffffffff81769f90 T em_pci_set_mwi +ffffffff81769fc0 T em_smartspeed +ffffffff8176a1c0 T em_kstat_read +ffffffff8176a5e0 T em_flush_desc_rings +ffffffff8176a710 T em_free_transmit_structures +ffffffff8176a8e0 T em_free_receive_structures +ffffffff8176aaf0 T em_legacy_irq_quirk_spt +ffffffff8176abd0 T em_allocate_msix +ffffffff8176ade0 T em_allocate_legacy +ffffffff8176af00 T em_dma_free +ffffffff8176af70 T em_disable_aspm +ffffffff8176b040 T em_dma_malloc +ffffffff8176b1d0 T em_allocate_transmit_structures +ffffffff8176b2c0 T em_get_buf +ffffffff8176b420 T em_allocate_receive_structures +ffffffff8176b5f0 T em_rxfill +ffffffff8176b740 T em_tbi_adjust_stats +ffffffff8176b910 T em_receive_checksum +ffffffff8176b980 T em_write_pci_cfg +ffffffff8176ba00 T em_read_pci_cfg +ffffffff8176ba70 T em_read_pcie_cap_reg +ffffffff8176baa0 T em_flush_tx_ring +ffffffff8176bc10 T em_flush_rx_ring +ffffffff8176bdd0 T em_queue_intr_msix +ffffffff8176be80 T em_link_intr_msix +ffffffff8176bfb0 T em_enable_queue_intr_msix +ffffffff8176d000 T em_set_mac_type +ffffffff8176da00 T em_set_sfp_media_type_82575 +ffffffff8176dd50 T em_translate_82542_register +ffffffff8176df80 T em_read_sfp_data_byte +ffffffff8176e070 T em_set_media_type +ffffffff8176e2e0 T em_reset_hw +ffffffff8176eeb0 T em_disable_pciex_master +ffffffff8176ef80 T em_check_phy_reset_block +ffffffff8176f040 T em_gate_hw_phy_config_ich8lan +ffffffff8176f0e0 t em_get_software_flag +ffffffff8176f260 T em_hv_phy_workarounds_ich8lan +ffffffff8176f5f0 T em_lv_phy_workarounds_ich8lan +ffffffff8176f6f0 t em_phy_init_script +ffffffff8176f960 T em_read_eeprom +ffffffff81770040 T em_set_eee_i350 +ffffffff81770160 T em_init_hw +ffffffff81771e00 T em_phy_reset +ffffffff81772040 T em_clear_vfta_i350 +ffffffff81772220 T em_read_phy_reg +ffffffff817723c0 T em_setup_link +ffffffff81774c60 T em_enable_tx_pkt_filtering +ffffffff81775030 T em_clear_hw_cntrs +ffffffff81775920 T em_write_phy_reg +ffffffff81775ab0 T em_power_up_serdes_link_82575 +ffffffff81775ba0 T em_copper_link_autoneg +ffffffff81775cd0 T em_phy_setup_autoneg +ffffffff81775e40 T em_copper_link_postconfig +ffffffff81775f10 T em_config_collision_dist +ffffffff81775fa0 t em_config_mac_to_phy +ffffffff81776110 t em_config_fc_after_link_up +ffffffff81776410 t em_config_dsp_after_link_change +ffffffff81776d00 T em_force_mac_fc +ffffffff81776dd0 T em_check_for_link +ffffffff817775c0 T em_get_pcs_speed_and_duplex_82575 +ffffffff81777680 T em_k1_gig_workaround_hv +ffffffff817777b0 T em_link_stall_workaround_hv +ffffffff81777890 T em_k1_workaround_lv +ffffffff81777950 T em_k1_workaround_lpt_lp +ffffffff81777c10 T em_set_eee_pchlan +ffffffff81777cb0 t em_polarity_reversal_workaround +ffffffff81777ef0 T em_get_speed_and_duplex +ffffffff817783b0 T em_access_phy_wakeup_reg_bm +ffffffff81778510 t em_write_phy_reg_ex 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ixgb_local_timer +ffffffff8177f4f0 T ixgb_identify_hardware +ffffffff8177f5f0 T ixgb_allocate_pci_resources +ffffffff8177f780 T ixgb_dma_malloc +ffffffff8177f980 T ixgb_hardware_init +ffffffff8177fa40 T ixgb_setup_interface +ffffffff8177fb70 T ixgb_update_stats_counters +ffffffff81780470 T ixgb_update_link_status +ffffffff817804f0 T ixgb_dma_free +ffffffff817805a0 T ixgb_free_pci_resources +ffffffff81780630 T ixgb_start +ffffffff81780820 T ixgb_encap +ffffffff81780a10 T ixgb_ioctl +ffffffff81780cb0 T ixgb_init +ffffffff81781150 T ixgb_set_promisc +ffffffff817811d0 T ixgb_stop +ffffffff81781250 T ixgb_disable_intr +ffffffff81781280 T ixgb_set_multi +ffffffff81781390 T ixgb_enable_intr +ffffffff817813e0 T ixgb_watchdog +ffffffff81781470 T ixgb_enable_hw_vlans +ffffffff817814c0 T ixgb_setup_transmit_structures +ffffffff81781690 T ixgb_initialize_transmit_unit +ffffffff81781800 T ixgb_setup_receive_structures +ffffffff81781880 T ixgb_initialize_receive_unit +ffffffff81781b10 T ixgb_intr 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+ffffffff8178bce0 T ixgbe_enable_queue +ffffffff8178bdb0 T ixgbe_disable_queue +ffffffff8178be80 T ixgbe_link_intr +ffffffff8178be90 T ixgbe_intr +ffffffff8178c360 T ixgbe_queue_intr +ffffffff8178c4b0 T ixgbe_rxeof +ffffffff8178c880 T ixgbe_txeof +ffffffff8178ca20 T ixgbe_rxrefill +ffffffff8178cae0 T ixgbe_legacy_intr +ffffffff8178cca0 T ixgbe_update_link_status +ffffffff8178cdf0 T ixgbe_handle_mod +ffffffff8178cf10 T ixgbe_handle_msf +ffffffff8178cfe0 T ixgbe_handle_phy +ffffffff8178d070 T ixgbe_media_status +ffffffff8178d280 T ixgbe_media_change +ffffffff8178d330 T ixgbe_mc_array_itr +ffffffff8178d370 T ixgbe_setup_msix +ffffffff8178d400 T ixgbe_add_media_types +ffffffff8178d6a0 T ixgbe_dma_malloc +ffffffff8178d890 T ixgbe_dma_free +ffffffff8178d940 T ixgbe_allocate_transmit_buffers +ffffffff8178dab0 T ixgbe_setup_transmit_ring +ffffffff8178dc50 T ixgbe_free_transmit_buffers +ffffffff8178dd80 T ixgbe_get_buf +ffffffff8178dec0 T ixgbe_allocate_receive_buffers +ffffffff8178e000 T ixgbe_setup_receive_ring +ffffffff8178e0e0 T ixgbe_rxfill +ffffffff8178e210 T ixgbe_initialize_rss_mapping +ffffffff8178e480 T ixgbe_map_queue_statistics +ffffffff8178e580 T ixgbe_free_receive_buffers +ffffffff8178e6c0 T ixgbe_rx_checksum +ffffffff8178e710 T ixgbe_read_pci_cfg +ffffffff8178e770 T ixgbe_write_pci_cfg +ffffffff8178e7f0 t ix_kstats_read +ffffffff8178e9b0 t ix_rxq_kstats_read +ffffffff8178eb10 t ix_txq_kstats_read +ffffffff8178f000 T ixgbe_init_ops_generic +ffffffff8178f270 T ixgbe_init_eeprom_params_generic +ffffffff8178f320 T ixgbe_read_eerd_generic +ffffffff8178f420 T ixgbe_read_eeprom_bit_bang_generic +ffffffff8178f6c0 T ixgbe_write_eeprom_generic +ffffffff8178fb10 T ixgbe_validate_eeprom_checksum_generic +ffffffff8178fbc0 T ixgbe_update_eeprom_checksum_generic +ffffffff8178fc40 T ixgbe_calc_eeprom_checksum_generic +ffffffff8178fde0 T ixgbe_init_hw_generic +ffffffff8178fe40 T ixgbe_start_hw_generic +ffffffff8178ff60 T ixgbe_clear_hw_cntrs_generic +ffffffff81790940 T ixgbe_enable_rx_dma_generic +ffffffff817909a0 T ixgbe_get_mac_addr_generic +ffffffff81790a30 T ixgbe_stop_adapter_generic +ffffffff81790bb0 T ixgbe_get_bus_info_generic +ffffffff81790c60 T ixgbe_set_lan_id_multi_port_pcie +ffffffff81790d30 T ixgbe_acquire_swfw_sync +ffffffff81790f60 T ixgbe_release_swfw_sync +ffffffff81791010 T prot_autoc_read_generic +ffffffff81791070 T prot_autoc_write_generic +ffffffff817910c0 T ixgbe_led_on_generic +ffffffff81791180 T ixgbe_led_off_generic +ffffffff81791230 T ixgbe_blink_led_start_generic +ffffffff817913a0 T ixgbe_blink_led_stop_generic +ffffffff817914c0 T ixgbe_set_rar_generic +ffffffff817915e0 T ixgbe_clear_rar_generic +ffffffff817916e0 T ixgbe_init_rx_addrs_generic +ffffffff817918e0 T ixgbe_update_mc_addr_list_generic +ffffffff81791ae0 T ixgbe_enable_mc_generic +ffffffff81791b50 T ixgbe_disable_mc_generic +ffffffff81791bb0 T ixgbe_enable_rx_generic +ffffffff81791c70 T ixgbe_disable_rx_generic +ffffffff81791d50 T ixgbe_fc_enable_generic +ffffffff81792180 T ixgbe_setup_fc_generic +ffffffff81792450 T ixgbe_fc_autoneg +ffffffff81792620 T ixgbe_device_supports_autoneg_fc +ffffffff81792720 T ixgbe_start_hw_gen2 +ffffffff81792900 T ixgbe_identify_phy +ffffffff81792960 T ixgbe_set_pci_config_data_generic +ffffffff817929e0 T ixgbe_disable_rx +ffffffff81792a20 T ixgbe_disable_pcie_master +ffffffff81792b70 T ixgbe_read_eerd_buffer_generic +ffffffff81792cb0 T ixgbe_poll_eerd_eewr_done +ffffffff81792d50 T ixgbe_write_eewr_buffer_generic +ffffffff81792ed0 T ixgbe_write_eewr_generic +ffffffff81792f20 T ixgbe_acquire_eeprom +ffffffff817930a0 T ixgbe_get_eeprom_semaphore +ffffffff817932b0 T ixgbe_release_eeprom_semaphore +ffffffff81793320 T ixgbe_ready_eeprom +ffffffff81793490 T ixgbe_shift_out_eeprom_bits +ffffffff81793650 T ixgbe_shift_in_eeprom_bits +ffffffff817937b0 T ixgbe_standby_eeprom +ffffffff81793890 T ixgbe_raise_eeprom_clk +ffffffff81793900 T ixgbe_lower_eeprom_clk +ffffffff81793970 T ixgbe_release_eeprom +ffffffff81793a50 T ixgbe_validate_mac_addr +ffffffff81793ab0 T ixgbe_init_uta_tables +ffffffff81793af0 T ixgbe_add_uc_addr +ffffffff81793b60 T ixgbe_mta_vector +ffffffff81793c10 T ixgbe_set_mta +ffffffff81793cd0 T ixgbe_negotiate_fc +ffffffff81793d80 T ixgbe_fc_autoneg_fiber +ffffffff81793eb0 T ixgbe_fc_autoneg_backplane +ffffffff81794010 T ixgbe_fc_autoneg_copper +ffffffff81794140 T ixgbe_disable_sec_rx_path_generic +ffffffff81794200 T ixgbe_enable_sec_rx_path_generic +ffffffff81794290 T ixgbe_enable_rx +ffffffff817942d0 T ixgbe_get_pcie_msix_count_generic +ffffffff81794350 T ixgbe_insert_mac_addr_generic +ffffffff81794560 T ixgbe_set_vmdq +ffffffff817945a0 T ixgbe_set_rar +ffffffff817945f0 T ixgbe_clear_vmdq +ffffffff81794630 T ixgbe_clear_vmdq_generic +ffffffff817947d0 T ixgbe_set_vmdq_generic +ffffffff81794880 T ixgbe_init_uta_tables_generic +ffffffff81794900 T ixgbe_find_vlvf_slot +ffffffff817949c0 T ixgbe_set_vfta_generic +ffffffff81794ad0 T ixgbe_set_vlvf_generic +ffffffff81794d60 T ixgbe_clear_vfta_generic +ffffffff81794e60 T ixgbe_need_crosstalk_fix +ffffffff81794eb0 T ixgbe_check_mac_link_generic +ffffffff817950a0 T ixgbe_get_device_caps_generic +ffffffff817950f0 T ixgbe_calculate_checksum +ffffffff817951b0 T ixgbe_hic_unlocked +ffffffff81795390 T ixgbe_host_interface_command +ffffffff81795560 T ixgbe_clear_tx_pending +ffffffff81795750 T ixgbe_mng_present +ffffffff817957c0 T ixgbe_mng_enabled +ffffffff81795880 T ixgbe_setup_mac_link_multispeed_fiber +ffffffff81795c40 T ixgbe_flap_tx_laser +ffffffff81795c80 T ixgbe_check_link +ffffffff81795cd0 T ixgbe_set_soft_rate_select_speed +ffffffff81795dc0 T ixgbe_init_shared_code +ffffffff81795e70 T ixgbe_set_mac_type +ffffffff81796030 T ixgbe_init_hw +ffffffff81796070 T ixgbe_get_media_type +ffffffff817960b0 T ixgbe_read_mbx +ffffffff81796110 T ixgbe_write_mbx +ffffffff81796160 T ixgbe_check_for_msg +ffffffff817961a0 T ixgbe_check_for_ack +ffffffff817961e0 T ixgbe_check_for_rst +ffffffff81796220 T ixgbe_poll_for_msg +ffffffff817962e0 T ixgbe_poll_for_ack +ffffffff817963a0 T ixgbe_read_posted_mbx +ffffffff81796480 T ixgbe_write_posted_mbx +ffffffff81796550 T ixgbe_init_mbx_ops_generic +ffffffff81796590 T ixgbe_read_v2p_mailbox +ffffffff81796600 T ixgbe_check_for_bit_pf +ffffffff81796690 T ixgbe_check_for_msg_pf +ffffffff81796740 T ixgbe_check_for_ack_pf +ffffffff817967e0 T ixgbe_check_for_rst_pf +ffffffff817968e0 T ixgbe_obtain_mbx_lock_pf +ffffffff81796970 T ixgbe_write_mbx_pf +ffffffff81796b40 T ixgbe_read_mbx_pf +ffffffff81796c50 T ixgbe_init_mbx_params_pf +ffffffff81797000 T ixgbe_set_pcie_completion_timeout +ffffffff81797090 T ixgbe_init_ops_82598 +ffffffff817971e0 T ixgbe_init_phy_ops_82598 +ffffffff817972d0 T ixgbe_start_hw_82598 +ffffffff81797480 T ixgbe_reset_hw_82598 +ffffffff81797950 T ixgbe_get_media_type_82598 +ffffffff81797a20 T ixgbe_get_supported_physical_layer_82598 +ffffffff81797bf0 T ixgbe_read_analog_reg8_82598 +ffffffff81797cb0 T ixgbe_write_analog_reg8_82598 +ffffffff81797d30 T ixgbe_set_lan_id_multi_port_pcie_82598 +ffffffff81797dd0 T ixgbe_enable_rx_dma_82598 +ffffffff81797e20 T ixgbe_set_vmdq_82598 +ffffffff81797ed0 T ixgbe_clear_vmdq_82598 +ffffffff81797f80 T ixgbe_set_vfta_82598 +ffffffff817980b0 T ixgbe_clear_vfta_82598 +ffffffff81798260 T ixgbe_fc_enable_82598 +ffffffff817986c0 T ixgbe_read_i2c_eeprom_82598 +ffffffff817986e0 T ixgbe_check_mac_link_82598 +ffffffff81798980 T ixgbe_setup_mac_link_82598 +ffffffff81798b40 T ixgbe_get_link_capabilities_82598 +ffffffff81798c10 T ixgbe_setup_copper_link_82598 +ffffffff81798d20 T ixgbe_start_mac_link_82598 +ffffffff81798e40 T ixgbe_validate_link_ready +ffffffff81798ef0 T ixgbe_read_i2c_phy_82598 +ffffffff8179a000 T ixgbe_init_mac_link_ops_82599 +ffffffff8179a190 T ixgbe_disable_tx_laser_multispeed_fiber +ffffffff8179a260 T ixgbe_enable_tx_laser_multispeed_fiber +ffffffff8179a2e0 T ixgbe_flap_tx_laser_multispeed_fiber +ffffffff8179a420 T ixgbe_setup_mac_link_82599 +ffffffff8179a6b0 T ixgbe_set_hard_rate_select_speed +ffffffff8179a770 T ixgbe_verify_lesm_fw_enabled_82599 +ffffffff8179a830 T ixgbe_setup_mac_link_smartspeed +ffffffff8179abb0 T ixgbe_init_phy_ops_82599 +ffffffff8179ad00 T ixgbe_read_i2c_byte_82599 +ffffffff8179ae80 T ixgbe_write_i2c_byte_82599 +ffffffff8179b000 T ixgbe_setup_copper_link_82599 +ffffffff8179b060 T ixgbe_setup_sfp_modules_82599 +ffffffff8179b220 T prot_autoc_read_82599 +ffffffff8179b330 T prot_autoc_write_82599 +ffffffff8179b4a0 T ixgbe_reset_pipeline_82599 +ffffffff8179b7e0 T ixgbe_init_ops_82599 +ffffffff8179b9c0 T ixgbe_identify_phy_82599 +ffffffff8179ba50 T ixgbe_reset_hw_82599 +ffffffff8179bfa0 T ixgbe_get_media_type_82599 +ffffffff8179c0d0 T ixgbe_get_supported_physical_layer_82599 +ffffffff8179c2a0 T ixgbe_enable_rx_dma_82599 +ffffffff8179c310 T ixgbe_read_analog_reg8_82599 +ffffffff8179c3d0 T ixgbe_write_analog_reg8_82599 +ffffffff8179c450 T ixgbe_start_hw_82599 +ffffffff8179c550 T ixgbe_get_link_capabilities_82599 +ffffffff8179c690 T ixgbe_stop_mac_link_on_d3_82599 +ffffffff8179c750 T ixgbe_read_eeprom_82599 +ffffffff8179c780 T ixgbe_start_mac_link_82599 +ffffffff8179c960 T ixgbe_verify_fw_version_82599 +ffffffff8179d000 T ixgbe_init_ops_X540 +ffffffff8179d220 T ixgbe_init_eeprom_params_X540 +ffffffff8179d2b0 T ixgbe_read_eerd_X540 +ffffffff8179d340 T ixgbe_write_eewr_X540 +ffffffff8179d3d0 T ixgbe_update_eeprom_checksum_X540 +ffffffff8179d4a0 T ixgbe_validate_eeprom_checksum_X540 +ffffffff8179d590 T ixgbe_calc_eeprom_checksum_X540 +ffffffff8179d730 T ixgbe_reset_hw_X540 +ffffffff8179dac0 T ixgbe_get_media_type_X540 +ffffffff8179daf0 T ixgbe_get_supported_physical_layer_X540 +ffffffff8179db70 T ixgbe_start_hw_X540 +ffffffff8179dbc0 T ixgbe_acquire_swfw_sync_X540 +ffffffff8179e010 T ixgbe_release_swfw_sync_X540 +ffffffff8179e140 T ixgbe_init_swfw_sync_X540 +ffffffff8179e220 T ixgbe_setup_mac_link_X540 +ffffffff8179e240 T ixgbe_blink_led_start_X540 +ffffffff8179e360 T ixgbe_blink_led_stop_X540 +ffffffff8179e460 T ixgbe_get_link_capabilities_X540 +ffffffff8179e4a0 T ixgbe_update_flash_X540 +ffffffff8179e680 T ixgbe_poll_flash_update_done_X540 +ffffffff8179e710 T ixgbe_get_swfw_sync_semaphore +ffffffff8179e8a0 T ixgbe_release_swfw_sync_semaphore +ffffffff8179f000 T ixgbe_init_ops_X550 +ffffffff8179f110 T ixgbe_dmac_config_X550 +ffffffff8179f1f0 T ixgbe_dmac_config_tcs_X550 +ffffffff8179f340 T ixgbe_dmac_update_tcs_X550 +ffffffff8179f400 T ixgbe_set_source_address_pruning_X550 +ffffffff8179f4f0 T ixgbe_init_eeprom_params_X550 +ffffffff8179f570 T ixgbe_calc_eeprom_checksum_X550 +ffffffff8179f590 T ixgbe_read_ee_hostif_X550 +ffffffff8179f660 T ixgbe_write_ee_hostif_X550 +ffffffff8179f720 T ixgbe_update_eeprom_checksum_X550 +ffffffff8179f8b0 T ixgbe_validate_eeprom_checksum_X550 +ffffffff8179fa00 T ixgbe_disable_rx_x550 +ffffffff8179fb20 T ixgbe_led_on_t_X550em +ffffffff8179fbe0 T ixgbe_led_off_t_X550em +ffffffff8179fca0 T ixgbe_read_cs4227 +ffffffff8179fcd0 T ixgbe_write_cs4227 +ffffffff8179fd00 T ixgbe_read_pe +ffffffff8179fd50 T ixgbe_write_pe +ffffffff8179fdb0 T ixgbe_reset_cs4227 +ffffffff817a0040 T ixgbe_check_cs4227 +ffffffff817a01f0 T ixgbe_setup_mux_ctl +ffffffff817a0280 T ixgbe_identify_phy_x550em +ffffffff817a04a0 T ixgbe_read_mng_if_sel_x550em +ffffffff817a0520 T ixgbe_fw_phy_activity +ffffffff817a0640 T ixgbe_get_phy_id_fw +ffffffff817a0750 T ixgbe_identify_phy_fw +ffffffff817a07a0 T ixgbe_shutdown_fw_phy +ffffffff817a0800 T ixgbe_read_phy_reg_x550em +ffffffff817a0830 T ixgbe_write_phy_reg_x550em +ffffffff817a0860 T ixgbe_init_ops_X550EM +ffffffff817a0b10 T ixgbe_get_bus_info_X550em +ffffffff817a0b60 T ixgbe_get_media_type_X550em +ffffffff817a0c50 T ixgbe_setup_sfp_modules_X550em +ffffffff817a0de0 T ixgbe_get_link_capabilities_X550em +ffffffff817a0eb0 T ixgbe_reset_hw_X550em +ffffffff817a1530 T ixgbe_get_supported_physical_layer_X550em +ffffffff817a16b0 T ixgbe_setup_fc_X550em +ffffffff817a1810 T ixgbe_init_phy_ops_X550em +ffffffff817a1ce0 T ixgbe_setup_fw_link +ffffffff817a1e10 T ixgbe_fc_autoneg_fw +ffffffff817a1e40 T ixgbe_setup_eee_fw +ffffffff817a1ea0 T ixgbe_init_ops_X550EM_a +ffffffff817a1fd0 T ixgbe_read_iosf_sb_reg_x550 +ffffffff817a2150 T ixgbe_write_iosf_sb_reg_x550 +ffffffff817a22d0 T ixgbe_read_iosf_sb_reg_x550a +ffffffff817a2370 T ixgbe_write_iosf_sb_reg_x550a +ffffffff817a2400 T ixgbe_acquire_swfw_sync_X550a +ffffffff817a2540 T ixgbe_release_swfw_sync_X550a +ffffffff817a25e0 T ixgbe_fc_autoneg_fiber_x550em_a +ffffffff817a2620 T ixgbe_fc_autoneg_backplane_x550em_a +ffffffff817a2780 T ixgbe_setup_fc_backplane_x550em_a +ffffffff817a2970 T ixgbe_fc_autoneg_sgmii_x550em_a +ffffffff817a2a60 T ixgbe_init_ops_X550EM_x +ffffffff817a2b20 T ixgbe_acquire_swfw_sync_X550em +ffffffff817a2be0 T ixgbe_release_swfw_sync_X550em +ffffffff817a2c70 T ixgbe_iosf_wait +ffffffff817a2d20 T ixgbe_get_phy_token +ffffffff817a2da0 T ixgbe_put_phy_token +ffffffff817a2e20 T ixgbe_supported_sfp_modules_X550em +ffffffff817a2ea0 T ixgbe_identify_sfp_module_X550em +ffffffff817a2f20 T ixgbe_init_mac_link_ops_X550em +ffffffff817a3060 T ixgbe_restart_an_internal_phy_x550em +ffffffff817a3170 T ixgbe_setup_sgmii +ffffffff817a3410 T ixgbe_setup_sgmii_fw +ffffffff817a36f0 T ixgbe_setup_mac_link_sfp_x550a +ffffffff817a38e0 T ixgbe_setup_mac_link_sfp_x550em +ffffffff817a39a0 T ixgbe_setup_mac_link_t_X550em +ffffffff817a3a50 T ixgbe_check_link_t_X550em +ffffffff817a3b30 T ixgbe_get_lasi_ext_t_x550em +ffffffff817a3cb0 T ixgbe_enable_lasi_ext_t_x550em +ffffffff817a3e40 T ixgbe_setup_kr_speed_x550em +ffffffff817a4050 T ixgbe_reset_phy_fw +ffffffff817a4120 T ixgbe_check_overtemp_fw +ffffffff817a41b0 T ixgbe_read_phy_reg_x550a +ffffffff817a4250 T ixgbe_write_phy_reg_x550a +ffffffff817a4300 T ixgbe_setup_kr_x550em +ffffffff817a4370 T ixgbe_setup_internal_phy_t_x550em +ffffffff817a4500 T ixgbe_enter_lplu_t_x550em +ffffffff817a47f0 T ixgbe_handle_lasi_ext_t_x550em +ffffffff817a4870 T ixgbe_reset_phy_t_X550em +ffffffff817a48c0 T ixgbe_set_mdio_speed +ffffffff817a49a0 T ixgbe_init_ext_t_x550em +ffffffff817a4a50 T ixgbe_setup_sfi_x550a +ffffffff817a4c00 T ixgbe_setup_ixfi_x550em_x +ffffffff817a4de0 T ixgbe_setup_ixfi_x550em +ffffffff817a4fc0 T ixgbe_ext_phy_t_x550em_get_link +ffffffff817a5050 T ixgbe_setup_phy_loopback_x550em +ffffffff817a5240 T ixgbe_read_ee_hostif_buffer_X550 +ffffffff817a53d0 T ixgbe_write_ee_hostif_data_X550 +ffffffff817a5440 T ixgbe_checksum_ptr_x550 +ffffffff817a55d0 T ixgbe_calc_checksum_X550 +ffffffff817a5760 T ixgbe_update_flash_X550 +ffffffff817a57b0 T ixgbe_get_lcd_t_x550em +ffffffff817a5870 T ixgbe_set_mux +ffffffff817a6000 T ixgbe_read_i2c_combined_generic_int +ffffffff817a6260 T ixgbe_i2c_start +ffffffff817a63c0 T ixgbe_clock_in_i2c_byte +ffffffff817a64b0 T ixgbe_clock_out_i2c_bit +ffffffff817a65c0 T ixgbe_i2c_stop +ffffffff817a6750 T ixgbe_i2c_bus_clear +ffffffff817a6870 T ixgbe_read_i2c_combined_generic +ffffffff817a6890 T ixgbe_read_i2c_combined_generic_unlocked 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ixgbe_write_i2c_byte_generic_unlocked +ffffffff817a7b00 T ixgbe_tn_check_overtemp +ffffffff817a7b70 T ixgbe_check_reset_blocked +ffffffff817a7bd0 T ixgbe_validate_phy_addr +ffffffff817a7c40 T ixgbe_get_phy_id +ffffffff817a7cf0 T ixgbe_get_phy_type_from_id +ffffffff817a7db0 T ixgbe_get_copper_link_capabilities_generic +ffffffff817a7ea0 T ixgbe_get_copper_speeds_supported +ffffffff817a7f60 T ixgbe_check_phy_link_tnx +ffffffff817a8220 T ixgbe_setup_phy_link_tnx +ffffffff817a84d0 T ixgbe_get_phy_firmware_version_tnx +ffffffff817a8500 T ixgbe_reset_phy_nl +ffffffff817a87a0 T ixgbe_get_sfp_init_sequence_offsets +ffffffff817a8980 T ixgbe_is_sfp +ffffffff817a89d0 T ixgbe_identify_sfp_module_generic +ffffffff817a8dc0 T ixgbe_identify_qsfp_module_generic +ffffffff817a90b0 T ixgbe_get_supported_phy_sfp_layer_generic +ffffffff817a9250 T ixgbe_is_sfp_probe +ffffffff817a92a0 T ixgbe_read_i2c_byte_generic_int +ffffffff817a94a0 T ixgbe_clock_out_i2c_byte +ffffffff817a9600 T ixgbe_get_i2c_ack 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oce_dma_free +ffffffff817c2ab0 T oce_get_link_status +ffffffff817c2c30 T oce_first_mcc +ffffffff817c2d20 T oce_media_change +ffffffff817c2d50 T oce_media_status +ffffffff817c2e80 T oce_ioctl +ffffffff817c3020 T oce_start +ffffffff817c3120 T oce_watchdog +ffffffff817c3180 T oce_init +ffffffff817c3660 T oce_stop +ffffffff817c39a0 T oce_rxrinfo +ffffffff817c3ae0 T oce_iff +ffffffff817c3c20 T oce_update_mcast +ffffffff817c3d90 T oce_set_promisc +ffffffff817c3e30 T oce_link_status +ffffffff817c3ed0 T oce_update_stats +ffffffff817c3fb0 T oce_macaddr_set +ffffffff817c4210 T oce_config_vlan +ffffffff817c4430 T oce_set_flow_control +ffffffff817c4650 T oce_new_rq +ffffffff817c49c0 T oce_alloc_rx_bufs +ffffffff817c4b10 T oce_drain_eq +ffffffff817c4c30 T oce_cmd +ffffffff817c4e80 T oce_drain_rq +ffffffff817c4fa0 T oce_free_posted_rxbuf +ffffffff817c5080 T oce_drain_wq +ffffffff817c51a0 T oce_encap +ffffffff817c5580 T oce_intr_wq +ffffffff817c5720 T oce_txeof +ffffffff817c5820 T oce_intr_rq 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puc_port_type_name +ffffffff817f1c50 T puc_print +ffffffff817f1cd0 T puc_submatch +ffffffff817f2000 T com_puc_match +ffffffff817f2040 T com_puc_attach +ffffffff817f2150 T com_puc_detach +ffffffff817f3000 T lpt_puc_probe +ffffffff817f3040 T lpt_puc_attach +ffffffff817f3110 T lpt_puc_detach +ffffffff817f4000 T wi_pci_match +ffffffff817f4050 T wi_pci_attach +ffffffff817f40e0 T wi_pci_activate +ffffffff817f41e0 T wi_pci_lookup +ffffffff817f43f0 T wi_pci_wakeup +ffffffff817f44a0 T wi_pci_acex_attach +ffffffff817f47a0 T wi_pci_common_attach +ffffffff817f4900 T wi_pci_plx_attach +ffffffff817f4bf0 T wi_pci_plx_print_cis +ffffffff817f4df0 T wi_pci_tmd_attach +ffffffff817f4f50 T wi_pci_native_attach +ffffffff817f6000 T an_pci_match +ffffffff817f6030 T an_pci_attach +ffffffff817f7000 T iwi_match +ffffffff817f7030 T iwi_attach +ffffffff817f7960 T iwi_activate +ffffffff817f79c0 T iwi_intr +ffffffff817f7c40 T iwi_reset +ffffffff817f7e20 T iwi_alloc_cmd_ring +ffffffff817f8010 T iwi_alloc_tx_ring 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T wpi_tx +ffffffff81803490 T wpi_set_pslevel +ffffffff81803620 T wpi_cmd +ffffffff81803950 T wpi_mrr_setup +ffffffff81803d30 T wpi_set_timing +ffffffff81803ed0 T wpi_set_txpower +ffffffff81804070 T wpi_get_power_index +ffffffff81804200 T wpi_config +ffffffff818048d0 T wpi_post_alive +ffffffff81804ae0 T wpi_load_bootcode +ffffffff81804e90 T wpi_load_firmware +ffffffff81805460 T wpi_read_firmware +ffffffff81805620 T wpi_clock_wait +ffffffff818056f0 T wpi_apm_stop_master +ffffffff81805800 T wpi_nic_config +ffffffff818059b0 T wpi_hw_init +ffffffff81806230 T wpi_hw_stop +ffffffff81807000 T iwn_match +ffffffff81807030 T iwn_attach +ffffffff81807c20 T iwn_detach +ffffffff81808010 T iwn_activate +ffffffff818080d0 T iwn_intr +ffffffff818085b0 T iwn4965_attach +ffffffff81808700 T iwn5000_attach +ffffffff81808a40 T iwn_hw_prepare +ffffffff81808da0 T iwn_read_eeprom +ffffffff81809050 T iwn_alloc_fwmem +ffffffff81809080 T iwn_alloc_kw +ffffffff818090b0 T iwn_alloc_ict +ffffffff818090f0 T iwn_alloc_sched +ffffffff81809130 T iwn_alloc_tx_ring +ffffffff818092a0 T iwn_alloc_rx_ring +ffffffff818094c0 T iwn_ioctl +ffffffff81809760 T iwn_start +ffffffff818098f0 T iwn_watchdog +ffffffff818099e0 T iwn_node_alloc +ffffffff81809a00 T iwn_bgscan +ffffffff81809a80 T iwn_newassoc +ffffffff81809b70 T iwn_updateedca +ffffffff81809e70 T iwn_set_key +ffffffff81809fa0 T iwn_delete_key +ffffffff8180a0a0 T iwn_updatechan +ffffffff8180a1a0 T iwn_updateprot +ffffffff8180a230 T iwn_updateslot +ffffffff8180a2b0 T iwn_ampdu_rx_start +ffffffff8180a390 T iwn_ampdu_rx_stop +ffffffff8180a460 T iwn_ampdu_tx_start +ffffffff8180a700 T iwn_ampdu_tx_stop +ffffffff8180a980 T iwn_newstate +ffffffff8180ac40 T iwn_media_change +ffffffff8180ada0 T iwn_radiotap_attach +ffffffff8180ae30 T iwn_calib_timeout +ffffffff8180b060 T iwn_init_task +ffffffff8180b0d0 T iwn_free_tx_ring +ffffffff8180b2c0 T iwn_free_sched +ffffffff8180b3b0 T iwn_free_ict +ffffffff8180b4a0 T iwn_free_kw +ffffffff8180b590 T iwn_free_fwmem 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iwn5000_crystal_calib +ffffffff81818d80 T iwn_hw_stop +ffffffff81819170 T iwn_hw_init +ffffffff81819890 T iwn4965_load_bootcode +ffffffff81819c40 T iwn5000_load_firmware_section +ffffffff81819e90 T iwn_read_firmware_leg +ffffffff81819fa0 T iwn_read_firmware_tlv +ffffffff8181a220 T iwn_read_firmware +ffffffff8181a450 T iwn_apm_stop_master +ffffffff8181b000 T iwm_lookup_cmd_ver +ffffffff8181b070 T iwm_is_mimo_ht_plcp +ffffffff8181b0b0 T iwm_is_mimo_ht_mcs +ffffffff8181b0f0 T iwm_store_cscheme +ffffffff8181b140 T iwm_firmware_store_section +ffffffff8181b1e0 T iwm_set_default_calib +ffffffff8181b230 T iwm_fw_info_free +ffffffff8181b280 T iwm_fw_version_str +ffffffff8181b2c0 T iwm_read_firmware +ffffffff8181bc10 T iwm_read_prph_unlocked +ffffffff8181bc70 T iwm_read_prph +ffffffff8181bcf0 T iwm_nic_assert_locked +ffffffff8181bd50 T iwm_write_prph_unlocked +ffffffff8181bdc0 T iwm_write_prph +ffffffff8181be50 T iwm_write_prph64 +ffffffff8181bf50 T iwm_read_mem +ffffffff8181c080 T iwm_nic_lock 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iwm_prepare_card_hw +ffffffff8181e1d0 T iwm_apm_config +ffffffff8181e2b0 T iwm_apm_init +ffffffff8181e9a0 T iwm_apm_stop +ffffffff8181ed60 T iwm_init_msix_hw +ffffffff8181ee00 T iwm_conf_msix_hw +ffffffff8181f350 T iwm_clear_persistence_bit +ffffffff8181f4a0 T iwm_start_hw +ffffffff8181f6c0 T iwm_stop_device +ffffffff8181fce0 T iwm_nic_config +ffffffff8181fdc0 T iwm_nic_rx_init +ffffffff8181fde0 T iwm_nic_rx_mq_init +ffffffff818201e0 T iwm_nic_rx_legacy_init +ffffffff81820420 T iwm_nic_tx_init +ffffffff818205f0 T iwm_nic_init +ffffffff81820750 T iwm_enable_ac_txq +ffffffff81820bd0 T iwm_enable_txq +ffffffff81820db0 T iwm_send_cmd_pdu +ffffffff81820e30 T iwm_disable_txq +ffffffff81820f10 T iwm_post_alive +ffffffff81821490 T iwm_phy_db_get_section +ffffffff81821540 T iwm_phy_db_set_section +ffffffff81821690 T iwm_is_valid_channel +ffffffff81821700 T iwm_ch_id_to_ch_index +ffffffff81821780 T iwm_channel_id_to_papd +ffffffff81821820 T iwm_channel_id_to_txp +ffffffff818219c0 T iwm_phy_db_get_section_data +ffffffff81821b50 T iwm_send_phy_db_cmd +ffffffff81821bf0 T iwm_send_cmd +ffffffff818222d0 T iwm_phy_db_send_all_channel_groups +ffffffff818224a0 T iwm_send_phy_db_data +ffffffff81822790 T iwm_send_time_event_cmd +ffffffff818228a0 T iwm_free_resp +ffffffff81822920 T iwm_protect_session +ffffffff818229d0 T iwm_unprotect_session +ffffffff81822a80 T iwm_nvm_read_chunk +ffffffff81822be0 T iwm_nvm_read_section +ffffffff81822ca0 T iwm_fw_valid_tx_ant +ffffffff81822ce0 T iwm_fw_valid_rx_ant +ffffffff81822d30 T iwm_valid_siso_ant_rate_mask +ffffffff81822d90 T iwm_init_channel_map +ffffffff81822f10 T iwm_mimo_enabled +ffffffff81822f50 T iwm_setup_ht_rates +ffffffff81823000 T iwm_setup_vht_rates +ffffffff81823090 T iwm_init_reorder_buffer +ffffffff818230f0 T iwm_clear_reorder_buffer +ffffffff818231b0 T iwm_rx_ba_session_expired +ffffffff818232b0 T iwm_reorder_timer_expired +ffffffff81823470 T iwm_release_frames +ffffffff81823660 T iwm_sta_rx_agg +ffffffff81823b60 T iwm_send_cmd_pdu_status +ffffffff81823bf0 T iwm_mac_ctxt_task +ffffffff81823d50 T iwm_mac_ctxt_cmd +ffffffff81823f50 T iwm_updateprot +ffffffff81824010 T iwm_add_task +ffffffff81824080 T iwm_updateslot +ffffffff81824140 T iwm_updateedca +ffffffff81824200 T iwm_phy_ctxt_task +ffffffff818243d0 T iwm_phy_ctxt_update +ffffffff81824540 T iwm_setrates +ffffffff818246d0 T iwm_updatechan +ffffffff81824790 T iwm_updatedtim +ffffffff81824850 T iwm_sta_tx_agg +ffffffff81824d60 T iwm_flush_sta +ffffffff81824f00 T iwm_txq_advance +ffffffff818250f0 T iwm_clear_oactive +ffffffff81825170 T iwm_ba_task +ffffffff818253c0 T iwm_ampdu_rx_start +ffffffff818254a0 T iwm_ampdu_rx_stop +ffffffff81825580 T iwm_ampdu_tx_start +ffffffff818256a0 T iwm_ampdu_tx_stop +ffffffff81825780 T iwm_set_hw_address_8000 +ffffffff81825a00 T iwm_parse_nvm_data +ffffffff81825c50 T iwm_parse_nvm_sections +ffffffff81825d50 T iwm_nvm_init +ffffffff81826010 T iwm_firmware_load_sect +ffffffff818260c0 T iwm_firmware_load_chunk +ffffffff81826370 T iwm_load_firmware_7000 +ffffffff818265c0 T iwm_load_cpu_sections_8000 +ffffffff81826960 T iwm_load_firmware_8000 +ffffffff81826b70 T iwm_load_firmware +ffffffff81826c50 T iwm_start_fw +ffffffff81826e20 T iwm_send_tx_ant_cfg +ffffffff81826eb0 T iwm_send_phy_cfg_cmd +ffffffff81826f60 T iwm_send_dqa_cmd +ffffffff81826ff0 T iwm_load_ucode_wait_alive +ffffffff81827230 T iwm_save_fw_paging +ffffffff818272a0 T iwm_send_paging_cmd +ffffffff818273f0 T iwm_free_fw_paging +ffffffff81827560 T iwm_run_init_mvm_ucode +ffffffff818279b0 T iwm_send_bt_init_conf +ffffffff81827a50 T iwm_sf_config +ffffffff81827ca0 T iwm_config_ltr +ffffffff81827d60 T iwm_get_signal_strength +ffffffff81827dc0 T iwm_rxmq_get_signal_strength +ffffffff81827e10 T iwm_rx_rx_phy_cmd +ffffffff81827e70 T iwm_get_noise +ffffffff81827ee0 T iwm_ccmp_decap +ffffffff81827fe0 T iwm_rx_hwdecrypt +ffffffff818280b0 T iwm_rx_frame +ffffffff818283e0 T iwm_rx_mpdu +ffffffff818285f0 T iwm_flip_address +ffffffff81828640 T iwm_detect_duplicate +ffffffff81828740 T iwm_is_sn_less +ffffffff818287a0 T iwm_oldsn_workaround +ffffffff81828860 T iwm_rx_reorder +ffffffff81828e90 T iwm_rx_mpdu_mq +ffffffff818292a0 T iwm_ra_choose +ffffffff81829360 T iwm_ht_single_rate_control +ffffffff81829590 T iwm_vht_single_rate_control +ffffffff818297e0 T iwm_rx_tx_cmd_single +ffffffff818299b0 T iwm_txd_done +ffffffff81829a80 T iwm_reset_sched +ffffffff81829b30 T iwm_ampdu_tx_done +ffffffff81829e80 T iwm_rx_tx_cmd +ffffffff8182a050 T iwm_ampdu_rate_control +ffffffff8182a210 T iwm_rx_compressed_ba +ffffffff8182a3f0 T iwm_rx_bmiss +ffffffff8182a4e0 T iwm_binding_cmd +ffffffff8182a680 T iwm_phy_ctxt_cmd_hdr +ffffffff8182a6f0 T iwm_phy_ctxt_cmd_data +ffffffff8182a870 T iwm_get_vht_ctrl_pos +ffffffff8182a8e0 T iwm_phy_ctxt_cmd_uhb +ffffffff8182ab10 T iwm_phy_ctxt_cmd +ffffffff8182ac60 T iwm_update_sched +ffffffff8182ad30 T iwm_send_cmd_status +ffffffff8182ae50 T iwm_cmd_done +ffffffff8182aff0 T iwm_tx_fill_cmd +ffffffff8182b420 T iwm_rval2ridx +ffffffff8182b4b0 T iwm_tx +ffffffff8182bed0 T iwm_flush_tx_path +ffffffff8182bfa0 T iwm_wait_tx_queues_empty +ffffffff8182c060 T iwm_led_enable +ffffffff8182c090 T iwm_led_disable +ffffffff8182c0c0 T iwm_led_is_enabled +ffffffff8182c120 T iwm_led_blink_timeout +ffffffff8182c1a0 T iwm_led_blink_start +ffffffff8182c1f0 T iwm_led_blink_stop +ffffffff8182c240 T iwm_beacon_filter_send_cmd +ffffffff8182c2d0 T iwm_beacon_filter_set_cqm_params +ffffffff8182c310 T iwm_update_beacon_abort +ffffffff8182c400 T iwm_power_build_cmd +ffffffff8182c490 T iwm_power_mac_update_mode +ffffffff8182c6a0 T iwm_power_update_device +ffffffff8182c740 T iwm_enable_beacon_filter +ffffffff8182c830 T iwm_disable_beacon_filter +ffffffff8182c910 T iwm_add_sta_cmd +ffffffff8182cd10 T iwm_add_aux_sta +ffffffff8182ceb0 T iwm_drain_sta +ffffffff8182d060 T iwm_rm_sta_cmd +ffffffff8182d120 T iwm_scan_rx_chain +ffffffff8182d190 T iwm_scan_rate_n_flags +ffffffff8182d290 T iwm_lmac_scan_fill_channels +ffffffff8182d370 T iwm_umac_scan_fill_channels +ffffffff8182d460 T iwm_fill_probe_req_v1 +ffffffff8182d500 T iwm_fill_probe_req +ffffffff8182d740 T iwm_lmac_scan +ffffffff8182dc40 T iwm_config_umac_scan +ffffffff8182de50 T iwm_umac_scan_size +ffffffff8182dec0 T iwm_get_scan_req_umac_chan_param +ffffffff8182df10 T iwm_get_scan_req_umac_data +ffffffff8182df60 T iwm_umac_scan +ffffffff8182e3d0 T iwm_mcc_update +ffffffff8182e460 T iwm_ridx2rate +ffffffff8182e4d0 T iwm_ack_rates +ffffffff8182e790 T iwm_mac_ctxt_cmd_common +ffffffff8182eaa0 T iwm_mac_ctxt_cmd_fill_sta +ffffffff8182eb50 T iwm_update_quotas +ffffffff8182ef40 T iwm_del_task +ffffffff8182efa0 T iwm_scan +ffffffff8182f210 T iwm_scan_abort +ffffffff8182f330 T iwm_bgscan +ffffffff8182f3d0 T iwm_bgscan_done +ffffffff8182f470 T iwm_bgscan_done_task +ffffffff8182f6d0 T iwm_umac_scan_abort +ffffffff8182f760 T iwm_lmac_scan_abort +ffffffff8182f800 T iwm_auth +ffffffff8182fc00 T iwm_deauth +ffffffff8182ff60 T iwm_run +ffffffff81830640 T iwm_allow_mcast +ffffffff81830740 T iwm_run_stop +ffffffff81830db0 T iwm_node_alloc +ffffffff81830dd0 T iwm_set_key_v1 +ffffffff81830f10 T iwm_set_key +ffffffff81831180 T iwm_delete_key_v1 +ffffffff818312b0 T iwm_delete_key +ffffffff81831520 T iwm_calib_timeout +ffffffff818315e0 T iwm_set_rate_table_vht +ffffffff81831900 T iwm_set_rate_table +ffffffff81831d00 T iwm_media_change +ffffffff81831ef0 T iwm_stop +ffffffff81832390 T iwm_init +ffffffff81832650 T iwm_newstate_task +ffffffff818327d0 T iwm_newstate +ffffffff81832930 T iwm_endscan +ffffffff81832980 T iwm_fill_sf_command +ffffffff81832a80 T iwm_send_soc_conf +ffffffff81832bc0 T iwm_send_update_mcc_cmd +ffffffff81832d80 T iwm_send_temp_report_ths_cmd +ffffffff81832e50 T iwm_tt_tx_backoff +ffffffff81832ee0 T iwm_fill_paging_mem +ffffffff81833110 T iwm_alloc_fw_paging_mem +ffffffff818332b0 T iwm_init_hw +ffffffff81833c80 T iwm_preinit +ffffffff81833ea0 T iwm_start +ffffffff81834070 T iwm_watchdog +ffffffff81834210 T iwm_nic_error +ffffffff81834700 T iwm_dump_driver_status +ffffffff818347a0 T iwm_ioctl +ffffffff81834910 T iwm_nic_umac_error +ffffffff81834d50 T iwm_desc_lookup +ffffffff81834ee0 T iwm_rx_pkt_valid +ffffffff81834f30 T iwm_rx_pkt +ffffffff81835cd0 T iwm_notif_intr +ffffffff81835e30 T iwm_intr +ffffffff81836260 T iwm_intr_msix +ffffffff81836500 T iwm_match +ffffffff81836530 T iwm_attach_hook +ffffffff81836570 T iwm_attach +ffffffff81837640 T iwm_radiotap_attach +ffffffff818376d0 T iwm_init_task +ffffffff81837790 T iwm_resume +ffffffff818378c0 T iwm_wakeup +ffffffff81837970 T iwm_activate +ffffffff81838000 T iwx_lookup_cmd_ver +ffffffff81838070 T iwx_lookup_notif_ver +ffffffff818380e0 T iwx_is_mimo_ht_plcp +ffffffff81838120 T iwx_store_cscheme +ffffffff81838170 T iwx_ctxt_info_alloc_dma +ffffffff81838210 T iwx_dma_contig_alloc +ffffffff818383f0 T iwx_ctxt_info_free_paging +ffffffff81838550 T iwx_dma_contig_free +ffffffff81838610 T iwx_get_num_sections +ffffffff81838690 T iwx_init_fw_sec +ffffffff81838b40 T iwx_fw_version_str +ffffffff81838b80 T iwx_alloc_fw_monitor_block +ffffffff81838c30 T iwx_alloc_fw_monitor +ffffffff81838cf0 T iwx_apply_debug_destination +ffffffff81839230 T iwx_nic_lock +ffffffff81839380 T iwx_write_prph +ffffffff81839420 T iwx_set_bits_prph +ffffffff81839440 T iwx_clear_bits_prph +ffffffff81839460 T iwx_read_prph +ffffffff81839500 T iwx_nic_unlock +ffffffff818395b0 T iwx_set_ltr +ffffffff81839700 T iwx_ctxt_info_init +ffffffff818399c0 T iwx_ctxt_info_free_fw_img +ffffffff81839b40 T iwx_ctxt_info_gen3_init +ffffffff8183a130 T iwx_write_umac_prph +ffffffff8183a1e0 T iwx_firmware_store_section +ffffffff8183a280 T iwx_set_default_calib +ffffffff8183a2d0 T iwx_fw_info_free +ffffffff8183a360 T iwx_read_firmware +ffffffff8183aef0 T iwx_prph_addr_mask +ffffffff8183af30 T iwx_read_prph_unlocked +ffffffff8183afb0 T iwx_nic_assert_locked +ffffffff8183b010 T iwx_write_prph_unlocked +ffffffff8183b090 T iwx_write_prph64 +ffffffff8183b1c0 T iwx_read_umac_prph_unlocked +ffffffff8183b240 T iwx_read_umac_prph +ffffffff8183b2e0 T iwx_write_umac_prph_unlocked +ffffffff8183b360 T iwx_read_mem +ffffffff8183b490 T iwx_write_mem +ffffffff8183b5d0 T iwx_write_mem32 +ffffffff8183b6e0 T iwx_poll_bit +ffffffff8183b7b0 T iwx_set_bits_mask_prph +ffffffff8183b990 T iwx_alloc_rx_ring +ffffffff8183bb70 T iwx_rx_addbuf +ffffffff8183bd80 T iwx_free_rx_ring +ffffffff8183c030 T iwx_disable_rx_dma +ffffffff8183c290 T iwx_reset_rx_ring +ffffffff8183c330 T iwx_alloc_tx_ring +ffffffff8183c540 T iwx_free_tx_ring +ffffffff8183c7d0 T iwx_reset_tx_ring +ffffffff8183ca30 T iwx_enable_rfkill_int +ffffffff8183cb10 T iwx_check_rfkill +ffffffff8183cb90 T iwx_enable_interrupts +ffffffff8183cc40 T iwx_enable_fwload_interrupt +ffffffff8183cd20 T iwx_restore_interrupts +ffffffff8183cd50 T iwx_disable_interrupts +ffffffff8183ce10 T iwx_ict_reset +ffffffff8183cfd0 T iwx_set_hw_ready +ffffffff8183d1b0 T iwx_prepare_card_hw +ffffffff8183d2f0 T iwx_force_power_gating +ffffffff8183d3a0 T iwx_apm_config +ffffffff8183d470 T iwx_apm_init +ffffffff8183d6d0 T iwx_apm_stop +ffffffff8183da90 T iwx_init_msix_hw +ffffffff8183db30 T iwx_conf_msix_hw +ffffffff8183e0d0 T iwx_clear_persistence_bit +ffffffff8183e250 T iwx_start_hw +ffffffff8183e650 T iwx_stop_device +ffffffff8183ebc0 T iwx_nic_config +ffffffff8183ec50 T iwx_nic_rx_init +ffffffff8183ecb0 T iwx_nic_init +ffffffff8183edd0 T iwx_enable_txq +ffffffff8183f0a0 T iwx_send_cmd +ffffffff8183f680 T iwx_free_resp +ffffffff8183f700 T iwx_disable_txq +ffffffff8183f960 T iwx_post_alive +ffffffff8183f9f0 T iwx_schedule_session_protection +ffffffff8183fac0 T iwx_send_cmd_pdu +ffffffff8183fb40 T iwx_unprotect_session +ffffffff8183fc10 T iwx_fw_valid_tx_ant +ffffffff8183fc50 T iwx_fw_valid_rx_ant +ffffffff8183fca0 T iwx_init_channel_map +ffffffff8183fea0 T iwx_mimo_enabled +ffffffff8183fee0 T iwx_setup_ht_rates +ffffffff8183ff90 T iwx_setup_vht_rates +ffffffff81840020 T iwx_init_reorder_buffer +ffffffff81840080 T iwx_clear_reorder_buffer +ffffffff81840140 T iwx_rx_ba_session_expired +ffffffff81840240 T iwx_rx_bar_frame_release +ffffffff818402f0 T iwx_release_frames +ffffffff818404e0 T iwx_reorder_timer_expired +ffffffff818406a0 T iwx_find_rxba_data +ffffffff81840730 T iwx_sta_rx_agg_baid_cfg_cmd +ffffffff81840980 T iwx_send_cmd_pdu_status +ffffffff81840a10 T iwx_sta_rx_agg_sta_cmd +ffffffff81840c60 T iwx_sta_rx_agg +ffffffff81840f30 T iwx_mac_ctxt_task +ffffffff818410c0 T iwx_mac_ctxt_cmd +ffffffff818412a0 T iwx_phy_ctxt_task +ffffffff81841460 T iwx_phy_ctxt_update +ffffffff818418c0 T iwx_updatechan +ffffffff81841980 T iwx_add_task +ffffffff818419f0 T iwx_updateprot +ffffffff81841ab0 T iwx_updateslot +ffffffff81841b70 T iwx_updateedca +ffffffff81841c30 T iwx_updatedtim +ffffffff81841cf0 T iwx_sta_tx_agg_start +ffffffff81841ee0 T iwx_ba_task +ffffffff81842030 T iwx_ampdu_rx_start +ffffffff81842110 T iwx_ampdu_rx_stop +ffffffff818421f0 T iwx_ampdu_tx_start +ffffffff81842300 T iwx_set_mac_addr_from_csr +ffffffff81842520 T iwx_flip_hw_address +ffffffff81842570 T iwx_is_valid_mac_addr +ffffffff81842610 T iwx_nvm_get +ffffffff818428e0 T iwx_load_firmware +ffffffff81842ac0 T iwx_start_fw +ffffffff81842ca0 T iwx_pnvm_handle_section +ffffffff81842f90 T iwx_ctxt_info_gen3_set_pnvm +ffffffff81842fe0 T iwx_pnvm_parse +ffffffff818430d0 T iwx_load_pnvm +ffffffff81843470 T iwx_send_tx_ant_cfg +ffffffff81843500 T iwx_send_phy_cfg_cmd +ffffffff818435b0 T iwx_send_dqa_cmd +ffffffff81843640 T iwx_load_ucode_wait_alive +ffffffff81843700 T iwx_run_init_mvm_ucode +ffffffff81843950 T iwx_config_ltr +ffffffff81843a10 T iwx_update_rx_desc +ffffffff81843ab0 T iwx_rxmq_get_signal_strength +ffffffff81843b00 T iwx_rx_rx_phy_cmd +ffffffff81843b60 T iwx_get_noise +ffffffff81843bd0 T iwx_ccmp_decap +ffffffff81843d10 T iwx_rx_hwdecrypt +ffffffff81843e10 T iwx_rx_frame +ffffffff818440d0 T iwx_detect_duplicate +ffffffff818441d0 T iwx_is_sn_less +ffffffff81844230 T iwx_oldsn_workaround +ffffffff818442f0 T iwx_rx_reorder +ffffffff81844920 T iwx_rx_mpdu_mq +ffffffff81844c70 T iwx_clear_tx_desc +ffffffff81844df0 T iwx_txd_done +ffffffff81844eb0 T iwx_txq_advance +ffffffff818451f0 T iwx_tx_update_byte_tbl +ffffffff81845290 T iwx_rx_tx_cmd +ffffffff818453f0 T iwx_clear_oactive +ffffffff81845470 T iwx_rx_compressed_ba +ffffffff818455f0 T iwx_rx_bmiss +ffffffff818456e0 T iwx_binding_cmd +ffffffff81845870 T iwx_get_vht_ctrl_pos +ffffffff818458e0 T iwx_phy_ctxt_cmd_uhb_v3_v4 +ffffffff81845b30 T iwx_phy_ctxt_cmd_v3_v4 +ffffffff81845d80 T iwx_phy_ctxt_cmd +ffffffff81845e80 T iwx_send_cmd_status +ffffffff81845fa0 T iwx_cmd_done +ffffffff81846080 T iwx_fw_rateidx_ofdm +ffffffff818460e0 T iwx_fw_rateidx_cck +ffffffff81846140 T iwx_tx_fill_cmd +ffffffff818463f0 T iwx_rval2ridx +ffffffff81846480 T iwx_tx +ffffffff81846b80 T iwx_flush_sta_tids +ffffffff81846d30 T iwx_wait_tx_queues_empty +ffffffff81846df0 T iwx_drain_sta +ffffffff81846f90 T iwx_flush_sta +ffffffff818472f0 T iwx_beacon_filter_send_cmd +ffffffff81847380 T iwx_update_beacon_abort +ffffffff81847490 T iwx_power_build_cmd +ffffffff81847520 T iwx_power_mac_update_mode +ffffffff81847740 T iwx_power_update_device +ffffffff818477e0 T iwx_enable_beacon_filter +ffffffff818478f0 T iwx_disable_beacon_filter +ffffffff818479e0 T iwx_add_sta_cmd +ffffffff81847ce0 T iwx_rm_sta_cmd +ffffffff81847da0 T iwx_rm_sta +ffffffff81848210 T iwx_disable_mgmt_queue +ffffffff818482f0 T iwx_umac_scan_fill_channels +ffffffff81848430 T iwx_fill_probe_req +ffffffff81848670 T iwx_config_umac_scan_reduced +ffffffff818487d0 T iwx_scan_umac_flags_v2 +ffffffff81848810 T iwx_scan_umac_dwell_v10 +ffffffff81848880 T iwx_scan_umac_fill_general_p_v10 +ffffffff81848910 T iwx_scan_umac_fill_ch_p_v6 +ffffffff81848a50 T iwx_umac_scan_v14 +ffffffff81848d40 T iwx_mcc_update +ffffffff81848dd0 T iwx_ridx2rate +ffffffff81848e40 T iwx_ack_rates +ffffffff81849100 T iwx_mac_ctxt_cmd_common +ffffffff81849410 T iwx_mac_ctxt_cmd_fill_sta +ffffffff818494a0 T iwx_clear_statistics +ffffffff81849580 T iwx_del_task +ffffffff818495e0 T iwx_scan +ffffffff81849780 T iwx_scan_abort +ffffffff81849830 T iwx_bgscan +ffffffff818498b0 T iwx_bgscan_done +ffffffff81849950 T iwx_bgscan_done_task +ffffffff81849ac0 T iwx_umac_scan_abort +ffffffff81849b50 T iwx_enable_mgmt_queue +ffffffff81849be0 T iwx_rs_rval2idx +ffffffff81849c50 T iwx_rs_ht_rates +ffffffff81849d20 T iwx_rs_vht_rates +ffffffff81849de0 T iwx_rs_init_v3 +ffffffff8184a210 T iwx_rs_init_v4 +ffffffff8184a650 T iwx_rs_init +ffffffff8184a6b0 T iwx_rs_update +ffffffff8184a950 T iwx_phy_send_rlc +ffffffff8184aa40 T iwx_auth +ffffffff8184b030 T iwx_deauth +ffffffff8184b2d0 T iwx_run +ffffffff8184b960 T iwx_sf_config +ffffffff8184bbb0 T iwx_allow_mcast +ffffffff8184bcb0 T iwx_run_stop +ffffffff8184c010 T iwx_node_alloc +ffffffff8184c030 T iwx_set_key +ffffffff8184c160 T iwx_add_sta_key +ffffffff8184c3d0 T iwx_setkey_task +ffffffff8184c4b0 T iwx_delete_key +ffffffff8184c640 T iwx_media_change +ffffffff8184c6b0 T iwx_stop +ffffffff8184cb60 T iwx_init +ffffffff8184ce20 T iwx_newstate_task +ffffffff8184cf60 T iwx_newstate +ffffffff8184d130 T iwx_endscan +ffffffff8184d180 T iwx_fill_sf_command +ffffffff8184d280 T iwx_send_bt_init_conf +ffffffff8184d310 T iwx_send_soc_conf +ffffffff8184d450 T iwx_send_update_mcc_cmd +ffffffff8184d5f0 T iwx_send_temp_report_ths_cmd +ffffffff8184d6c0 T iwx_init_hw +ffffffff8184def0 T iwx_preinit +ffffffff8184e1a0 T iwx_start +ffffffff8184e370 T iwx_watchdog +ffffffff8184e590 T iwx_nic_error +ffffffff8184ea80 T iwx_dump_driver_status +ffffffff8184ecb0 T iwx_ioctl +ffffffff8184ee20 T iwx_nic_umac_error +ffffffff8184f260 T iwx_desc_lookup +ffffffff8184f3f0 T iwx_rx_pkt_valid +ffffffff8184f440 T iwx_rx_pkt +ffffffff81850450 T iwx_notif_intr +ffffffff818505a0 T iwx_intr +ffffffff81850a40 T iwx_intr_msix +ffffffff81850d50 T iwx_match +ffffffff81850d80 T iwx_attach_hook +ffffffff81850dc0 T iwx_find_device_cfg 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rtwn_setup_rx_desc +ffffffff8189f910 T rtwn_reset_rx_list +ffffffff8189f9b0 T rtwn_reset_tx_list +ffffffff8189fb00 T rtwn_rx_frame +ffffffff8189ff60 T rtwn_tx_done +ffffffff818a00f0 T rtwn_poll_c2h_events +ffffffff818a02b0 T rtwn_pci_92c_stop +ffffffff818a0490 T rtwn_pci_88e_stop +ffffffff818a0870 T rtwn_pci_23a_stop +ffffffff818a0c10 T rtwn_88e_intr +ffffffff818a0f60 T rtwn_llt_write +ffffffff818a1020 T rtwn_llt_init +ffffffff818a12f0 T rtwn_92c_power_on +ffffffff818a1770 T rtwn_88e_power_on +ffffffff818a1b70 T rtwn_23a_power_on +ffffffff818a1fe0 T rtwn_tx_report +ffffffff818a3000 T ral_pci_match +ffffffff818a3030 T ral_pci_attach +ffffffff818a3210 T ral_pci_detach +ffffffff818a32b0 T ral_pci_activate +ffffffff818a3340 T ral_pci_wakeup +ffffffff818a4000 T acx_pci_match +ffffffff818a4030 T acx_pci_attach +ffffffff818a4260 T acx_pci_detach +ffffffff818a5000 T pgt_pci_match +ffffffff818a5030 T pgt_pci_attach +ffffffff818a5200 T pgt_pci_detach +ffffffff818a6000 T malo_pci_match +ffffffff818a6030 T malo_pci_attach +ffffffff818a61e0 T malo_pci_detach +ffffffff818a6230 T malo_pci_activate +ffffffff818a6290 T malo_pci_wakeup +ffffffff818a7000 T bwi_pci_match +ffffffff818a7070 T bwi_pci_attach +ffffffff818a7290 T bwi_pci_detach +ffffffff818a72e0 T bwi_pci_activate +ffffffff818a7350 T bwi_reset_bcm4331 +ffffffff818a7470 T bwi_pci_conf_write +ffffffff818a74a0 T bwi_pci_conf_read +ffffffff818a74d0 T bwi_pci_wakeup +ffffffff818a8000 T piixpm_match +ffffffff818a8030 T piixpm_attach +ffffffff818a84c0 T piixpm_intr +ffffffff818a85d0 T piixpm_i2c_acquire_bus +ffffffff818a86b0 T piixpm_i2c_release_bus +ffffffff818a8790 T piixpm_i2c_exec +ffffffff818a9000 T vic_match +ffffffff818a90a0 T vic_attach +ffffffff818a9440 T vic_intr +ffffffff818a94c0 T vic_query +ffffffff818a9720 T vic_alloc_data +ffffffff818a9a20 T vic_tick +ffffffff818a9a90 T vic_ioctl +ffffffff818a9cc0 T vic_start +ffffffff818aa000 T vic_watchdog +ffffffff818aa030 T vic_media_change +ffffffff818aa060 T vic_media_status +ffffffff818aa120 T vic_read +ffffffff818aa140 T vic_read_cmd +ffffffff818aa190 T vic_getlladdr +ffffffff818aa240 T vic_alloc_dmamem +ffffffff818aa3b0 T vic_rx_fill +ffffffff818aa590 T vic_alloc_mbuf +ffffffff818aa650 T vic_init_data +ffffffff818aaa00 T vic_uninit_data +ffffffff818aabd0 T vic_link_state +ffffffff818aac50 T vic_write +ffffffff818aaca0 T vic_rx_proc +ffffffff818aaf00 T vic_tx_proc +ffffffff818ab080 T vic_iff +ffffffff818ab1c0 T vic_setlladdr +ffffffff818ab220 T vic_load_txb +ffffffff818ab2d0 T vic_init +ffffffff818ab470 T vic_stop +ffffffff818ab5b0 T vic_rxrinfo +ffffffff818ab680 T vic_free_dmamem +ffffffff818ac000 T vmxnet3_match +ffffffff818ac030 T vmxnet3_attach +ffffffff818ac900 T vmxnet3_intr +ffffffff818ac9a0 T vmxnet3_intr_event +ffffffff818aca20 T vmxnet3_intr_intx +ffffffff818aca90 T vmxnet3_intr_queue +ffffffff818acb20 T vmxnet3_dma_init +ffffffff818aced0 T vmxnet3_ioctl +ffffffff818ad160 T vmxnet3_start +ffffffff818ad480 T vmxnet3_watchdog +ffffffff818ad4d0 T vmxnet3_media_change +ffffffff818ad500 T vmxnet3_media_status +ffffffff818ad610 T vmxnet3_link_state +ffffffff818ad6d0 T vmxnet3_dma_allocmem +ffffffff818ad820 T vmxnet3_alloc_txring +ffffffff818ad990 T vmxnet3_alloc_rxring +ffffffff818adc40 T vmxnet3_rxfill_tick +ffffffff818adcb0 T vmxnet3_txinit +ffffffff818add20 T vmxnet3_rxfill +ffffffff818adf70 T vmxnet3_rxinit +ffffffff818ae040 T vmxnet3_txstop +ffffffff818ae0d0 T vmxnet3_rxstop +ffffffff818ae1d0 T vmxnet3_enable_all_intrs +ffffffff818ae2a0 T vmxnet3_disable_all_intrs +ffffffff818ae370 T vmxnet3_evintr +ffffffff818ae540 T vmxnet3_rxintr +ffffffff818ae8d0 T vmxnet3_txintr +ffffffff818aea70 T vmxnet3_init +ffffffff818aee80 T vmxnet3_rx_csum +ffffffff818aeee0 T vmxnet3_iff +ffffffff818af020 T vmxnet3_stop +ffffffff818af270 T vmxnet3_reset +ffffffff818af2b0 t vmx_kstat_create +ffffffff818af490 t vmx_kstat_read +ffffffff818b0000 T vmwpvs_match +ffffffff818b0040 T vmwpvs_attach +ffffffff818b0df0 T vmwpvs_scsi_cmd +ffffffff818b1260 T vmwpvs_intx +ffffffff818b12e0 T vmwpvs_msg_task +ffffffff818b1560 T vmwpvs_intr +ffffffff818b1740 T vmwpvs_get_config +ffffffff818b1940 T vmwpvs_dmamem_zalloc +ffffffff818b19a0 T vmwpvs_dmamem_alloc +ffffffff818b1b20 T vmwpvs_ccb_put +ffffffff818b1b80 T vmwpvs_setup_rings +ffffffff818b1cb0 T vmwpvs_setup_msg_ring +ffffffff818b1da0 T vmwpvs_ccb_get +ffffffff818b1e20 T vmwpvs_dmamem_free +ffffffff818b1ea0 T vmwpvs_cmd +ffffffff818b1f50 T vmwpvs_scsi_cmd_done +ffffffff818b2130 T vmwpvs_scsi_cmd_poll +ffffffff818b3000 T lii_match +ffffffff818b3030 T lii_attach +ffffffff818b3440 T lii_activate +ffffffff818b3540 T lii_reset +ffffffff818b3810 T lii_spi_configure +ffffffff818b3900 T lii_eeprom_present +ffffffff818b3990 T lii_eeprom_read +ffffffff818b39c0 T lii_spi_read +ffffffff818b3c80 T lii_read_macaddr +ffffffff818b3df0 T lii_intr +ffffffff818b3f00 T lii_alloc_rings +ffffffff818b4110 T lii_tick +ffffffff818b4160 T lii_mii_readreg +ffffffff818b4400 T lii_mii_writereg +ffffffff818b46a0 T lii_mii_statchg +ffffffff818b4710 T lii_media_change +ffffffff818b4760 T lii_media_status +ffffffff818b47c0 T lii_ioctl +ffffffff818b4950 T lii_start +ffffffff818b4b00 T lii_watchdog +ffffffff818b4b40 T lii_stop +ffffffff818b4bb0 T lii_init +ffffffff818b50b0 T lii_iff +ffffffff818b51f0 T lii_tx_put +ffffffff818b5300 T lii_free_tx_space +ffffffff818b5340 T lii_rxintr +ffffffff818b54f0 T lii_txintr +ffffffff818b6000 T ichiic_match +ffffffff818b6030 T ichiic_attach +ffffffff818b6220 T ichiic_intr +ffffffff818b6330 T ichiic_i2c_acquire_bus +ffffffff818b6380 T ichiic_i2c_release_bus +ffffffff818b63d0 T ichiic_i2c_exec +ffffffff818b7000 T viapm_match +ffffffff818b7030 T viapm_attach +ffffffff818b7650 T viapm_intr +ffffffff818b7760 T viapm_i2c_acquire_bus +ffffffff818b77b0 T viapm_i2c_release_bus +ffffffff818b7800 T viapm_i2c_exec +ffffffff818b7b20 T viapm_refresh_sensor_data +ffffffff818b7e50 T viapm_refresh +ffffffff818b7e80 T val_to_uK +ffffffff818b7f20 T val_to_rpm +ffffffff818b7f60 T val_to_uV +ffffffff818b8000 T viapm_get_timecount +ffffffff818b9000 T amdiic_match +ffffffff818b9030 T amdiic_attach +ffffffff818b9200 T amdiic_intr +ffffffff818b92d0 T amdiic_i2c_acquire_bus +ffffffff818b9320 T amdiic_i2c_release_bus +ffffffff818b9370 T amdiic_i2c_exec +ffffffff818b95d0 T amdiic_read +ffffffff818b9740 T amdiic_wait +ffffffff818b97e0 T amdiic_write +ffffffff818ba000 T nviic_match +ffffffff818ba030 T nviic_attach +ffffffff818ba280 T nviic_i2c_acquire_bus +ffffffff818ba2d0 T nviic_i2c_release_bus +ffffffff818ba310 T nviic_i2c_exec +ffffffff818ba530 T nviic_write +ffffffff818ba580 T nviic_read +ffffffff818bb000 T sdhc_pci_match +ffffffff818bb060 T sdhc_pci_attach +ffffffff818bb3a0 T sdhc_pci_activate +ffffffff818bb400 T sdhc_takecontroller +ffffffff818bb4a0 T sdhc_ricohfix +ffffffff818bb610 T sdhc_pci_conf_write +ffffffff818bc000 T kate_match +ffffffff818bc170 T kate_attach +ffffffff818bc420 T kate_refresh +ffffffff818bd000 T km_match +ffffffff818bd050 T km_attach +ffffffff818bd0f0 T km_refresh +ffffffff818be000 T ksmn_match +ffffffff818be050 T ksmn_attach +ffffffff818be230 T ksmn_ccd_attach +ffffffff818be380 T ksmn_refresh +ffffffff818be4d0 T ksmn_read_reg +ffffffff818bf000 T itherm_probe +ffffffff818bf030 T itherm_attach +ffffffff818bf380 T itherm_activate +ffffffff818bf400 T itherm_enable +ffffffff818bf460 T itherm_refresh +ffffffff818bf470 T itherm_refresh_sensor_data +ffffffff818bf860 T itherm_bias_temperature_sensor +ffffffff818c0000 T pchtemp_match +ffffffff818c0030 T pchtemp_attach +ffffffff818c0190 T pchtemp_refresh +ffffffff818c1000 T rtsx_pci_match +ffffffff818c1090 T rtsx_pci_attach +ffffffff818c2000 T xspd_match +ffffffff818c2030 T xspd_attach +ffffffff818c21f0 T xspd_intr +ffffffff818c3000 T virtio_pci_match +ffffffff818c3080 T virtio_pci_attach +ffffffff818c3430 T virtio_pci_detach +ffffffff818c3510 T virtio_pci_kick +ffffffff818c3570 T virtio_pci_read_device_config_1 +ffffffff818c35a0 T virtio_pci_read_device_config_2 +ffffffff818c35d0 T virtio_pci_read_device_config_4 +ffffffff818c3600 T virtio_pci_read_device_config_8 +ffffffff818c3680 T virtio_pci_write_device_config_1 +ffffffff818c36b0 T virtio_pci_write_device_config_2 +ffffffff818c36e0 T virtio_pci_write_device_config_4 +ffffffff818c3710 T virtio_pci_write_device_config_8 +ffffffff818c3780 T virtio_pci_read_queue_size +ffffffff818c37f0 T virtio_pci_setup_queue +ffffffff818c3ae0 T virtio_pci_set_status +ffffffff818c3b60 T virtio_pci_negotiate_features +ffffffff818c3ca0 T virtio_pci_poll_intr +ffffffff818c3d10 T virtio_pci_find_cap +ffffffff818c3ed0 T virtio_pci_attach_10 +ffffffff818c4310 T virtio_pci_attach_09 +ffffffff818c4450 T virtio_pci_adjust_config_region +ffffffff818c44f0 T virtio_pci_setup_msix +ffffffff818c4850 T virtio_pci_legacy_intr +ffffffff818c48f0 T virtio_pci_legacy_intr_mpsafe +ffffffff818c4980 T virtio_pci_free_irqs +ffffffff818c4bd0 T virtio_pci_negotiate_features_10 +ffffffff818c4e10 T virtio_pci_msix_establish +ffffffff818c4ee0 T virtio_pci_set_msix_queue_vector +ffffffff818c4f60 T virtio_pci_set_msix_config_vector +ffffffff818c4fa0 T virtio_pci_config_intr +ffffffff818c4fe0 T virtio_pci_shared_queue_intr +ffffffff818c4ff0 T virtio_pci_queue_intr +ffffffff818c6000 T dwiic_pci_match +ffffffff818c6030 T dwiic_pci_attach +ffffffff818c6350 T dwiic_pci_activate +ffffffff818c63c0 T dwiic_pci_bus_scan +ffffffff818c7000 T bwfm_pci_buscore_read +ffffffff818c7060 T bwfm_pci_buscore_write +ffffffff818c70d0 T bwfm_pci_buscore_prepare +ffffffff818c7100 T bwfm_pci_buscore_reset +ffffffff818c72f0 T bwfm_pci_buscore_activate +ffffffff818c7320 T bwfm_pci_preinit +ffffffff818c8440 T bwfm_pci_stop +ffffffff818c84d0 T bwfm_pci_txcheck +ffffffff818c8590 T bwfm_pci_txdata +ffffffff818c88f0 T bwfm_pci_msgbuf_query_dcmd +ffffffff818c8d30 T bwfm_pci_msgbuf_set_dcmd +ffffffff818c8d80 T bwfm_pci_match +ffffffff818c8db0 T bwfm_pci_attach +ffffffff818c9020 T bwfm_pci_detach +ffffffff818c9060 T bwfm_pci_activate +ffffffff818c9210 T bwfm_pci_intr +ffffffff818c9470 T bwfm_pci_select_core +ffffffff818c9550 T bwfm_pci_load_microcode +ffffffff818c99d0 T bwfm_pci_dmamem_alloc +ffffffff818c9b70 T bwfm_pci_setup_ring +ffffffff818c9d80 T bwfm_pci_intr_enable +ffffffff818c9dd0 T bwfm_pci_hostready +ffffffff818c9e40 T bwfm_pci_fill_rx_rings +ffffffff818c9e90 T bwfm_pci_dmamem_free +ffffffff818c9f00 T bwfm_pci_cleanup +ffffffff818ca570 T bwfm_pci_send_mb_data +ffffffff818ca690 T bwfm_pci_intmask +ffffffff818ca6d0 T bwfm_pci_pktid_avail +ffffffff818ca740 T bwfm_pci_pktid_new +ffffffff818ca8a0 T bwfm_pci_pktid_free +ffffffff818ca950 T bwfm_pci_fill_rx_buf_ring +ffffffff818cacb0 T bwfm_pci_fill_rx_ioctl_ring +ffffffff818cb030 T bwfm_pci_ring_write_reserve +ffffffff818cb120 T bwfm_pci_ring_write_cancel +ffffffff818cb160 T bwfm_pci_ring_write_commit +ffffffff818cb240 T bwfm_pci_ring_write_rptr +ffffffff818cb2c0 T bwfm_pci_ring_write_wptr +ffffffff818cb340 T bwfm_pci_setup_flowring +ffffffff818cb4a0 T bwfm_pci_ring_bell +ffffffff818cb4e0 T bwfm_pci_ring_update_rptr +ffffffff818cb590 T bwfm_pci_ring_update_wptr +ffffffff818cb640 T bwfm_pci_ring_write_reserve_multi +ffffffff818cb760 T bwfm_pci_ring_read_avail +ffffffff818cb860 T bwfm_pci_ring_read_commit +ffffffff818cb8f0 T bwfm_pci_ring_rx +ffffffff818cbb00 T bwfm_pci_msg_rx +ffffffff818cc0e0 T bwfm_pci_flowring_delete_cb +ffffffff818cc190 T bwfm_pci_msgbuf_rxioctl +ffffffff818cc280 T bwfm_pci_intr_status +ffffffff818cc2c0 T bwfm_pci_intr_ack +ffffffff818cc300 T bwfm_pci_flowring_lookup +ffffffff818cc470 T bwfm_pci_flowring_create +ffffffff818cc5a0 T bwfm_pci_flowring_create_cb +ffffffff818cc8f0 T bwfm_pci_flowring_delete +ffffffff818ccbc0 T bwfm_pci_msgbuf_h2d_mb_write +ffffffff818ccde0 T bwfm_pci_handle_mb_data +ffffffff818cceb0 T bwfm_pci_intr_disable +ffffffff818cd000 T ccp_pci_match +ffffffff818cd030 T ccp_pci_attach +ffffffff818ce000 T bnxt_match +ffffffff818ce030 T bnxt_attach +ffffffff818cf2a0 T bnxt_dmamem_alloc +ffffffff818cf430 T bnxt_dmamem_free +ffffffff818cf4c0 T bnxt_hwrm_ver_get +ffffffff818cf610 T bnxt_hwrm_nvm_get_dev_info +ffffffff818cf760 T bnxt_hwrm_func_drv_rgtr +ffffffff818cf880 T bnxt_hwrm_func_rgtr_async_events +ffffffff818cf9a0 T bnxt_hwrm_func_qcaps +ffffffff818cfa80 T bnxt_admin_intr +ffffffff818cfc80 T bnxt_intr +ffffffff818d0150 T bnxt_hwrm_func_qcfg +ffffffff818d0200 T bnxt_hwrm_queue_qportcfg +ffffffff818d02d0 T bnxt_hwrm_func_reset +ffffffff818d0380 T bnxt_mark_cpr_invalid +ffffffff818d03e0 T bnxt_hwrm_ring_alloc +ffffffff818d0590 T bnxt_cfg_async_cr +ffffffff818d0690 T bnxt_write_cp_doorbell +ffffffff818d06d0 T bnxt_set_cp_ring_aggint +ffffffff818d07b0 T bnxt_ioctl +ffffffff818d0940 T bnxt_start +ffffffff818d0d60 T bnxt_watchdog +ffffffff818d0d90 T bnxt_media_change +ffffffff818d0ee0 T bnxt_media_status +ffffffff818d0f00 T bnxt_refill +ffffffff818d0f60 T bnxt_media_autonegotiate +ffffffff818d1050 T bnxt_hwrm_port_phy_qcfg +ffffffff818d14f0 T bnxt_free_slots +ffffffff818d1580 T bnxt_hwrm_cmd_hdr_init +ffffffff818d15d0 T hwrm_send_message +ffffffff818d1650 T bnxt_queue_up +ffffffff818d2580 T bnxt_hwrm_stat_ctx_alloc +ffffffff818d2680 T bnxt_write_tx_doorbell +ffffffff818d26f0 T bnxt_write_rx_doorbell +ffffffff818d2770 T bnxt_hwrm_ring_grp_alloc +ffffffff818d2870 T bnxt_rx_fill +ffffffff818d2980 T bnxt_hwrm_ring_grp_free +ffffffff818d2a60 T bnxt_hwrm_ring_free +ffffffff818d2b50 T bnxt_hwrm_stat_ctx_free +ffffffff818d2c40 T bnxt_queue_down +ffffffff818d3320 T bnxt_up +ffffffff818d39f0 T bnxt_hwrm_vnic_ctx_alloc +ffffffff818d3ad0 T bnxt_hwrm_vnic_alloc +ffffffff818d3bd0 T bnxt_hwrm_vnic_cfg +ffffffff818d3d10 T bnxt_hwrm_vnic_cfg_placement +ffffffff818d3de0 T bnxt_hwrm_set_filter +ffffffff818d3f70 T bnxt_hwrm_vnic_rss_cfg +ffffffff818d4050 T bnxt_iff +ffffffff818d41c0 T bnxt_hwrm_vnic_free +ffffffff818d42b0 T bnxt_hwrm_vnic_ctx_free +ffffffff818d43a0 T bnxt_down +ffffffff818d4740 T bnxt_hwrm_free_filter +ffffffff818d4820 T bnxt_hwrm_cfa_l2_set_rx_mask +ffffffff818d4900 T bnxt_rxrinfo +ffffffff818d4a50 T bnxt_get_sffpage +ffffffff818d4d60 T bnxt_load_mbuf +ffffffff818d4e10 T bnxt_handle_async_event +ffffffff818d4e60 T bnxt_cpr_next_cmpl +ffffffff818d4ed0 T bnxt_cpr_commit +ffffffff818d4f00 T bnxt_cpr_rollback +ffffffff818d4f30 T bnxt_write_cp_doorbell_index +ffffffff818d4fb0 T bnxt_rx +ffffffff818d5290 T bnxt_txeof +ffffffff818d53c0 T bnxt_get_media_type +ffffffff818d5920 T bnxt_add_media_type +ffffffff818d5af0 T _hwrm_send_message +ffffffff818d89a0 T bnxt_rx_fill_slots +ffffffff818d8b60 T bnxt_hwrm_err_map +ffffffff818d8ba0 T _bnxt_hwrm_set_async_event_bit +ffffffff818d9000 t mcx_match +ffffffff818d9030 t mcx_attach +ffffffff818dc110 T mcx_rx_fill +ffffffff818dc360 T mcx_load_mbuf +ffffffff818dc410 t mcx_dmamem_alloc +ffffffff818dc570 t mcx_pages +ffffffff818dce50 t mcx_iff +ffffffff818dd290 t mcx_alloc_uar +ffffffff818dd480 t mcx_admin_intr +ffffffff818dd630 t mcx_create_eq +ffffffff818ddbc0 t mcx_ioctl +ffffffff818de6a0 t mcx_start +ffffffff818deba0 t mcx_watchdog +ffffffff818debd0 t mcx_media_change +ffffffff818dee90 t mcx_media_status +ffffffff818defd0 t mcx_refill +ffffffff818df040 t mcx_cq_intr +ffffffff818df560 t mcx_calibrate +ffffffff818df720 t mcx_port_change +ffffffff818df860 t mcx_cmdq_post +ffffffff818df940 t mcx_set_flow_table_entry_mac +ffffffff818dfe10 t mcx_delete_flow_table_entry +ffffffff818e0290 t mcx_access_hca_reg +ffffffff818e06c0 t mcx_cmdq_exec +ffffffff818e08c0 t mcx_up +ffffffff818e3bc0 t mcx_down +ffffffff818e4c20 t mcx_create_flow_table +ffffffff818e4fd0 t mcx_create_flow_group +ffffffff818e54b0 t mcx_destroy_sq +ffffffff818e5760 t mcx_destroy_cq +ffffffff818e5a20 t mcx_arm_cq +ffffffff818e5b40 t mcx_destroy_flow_table +ffffffff818e5ea0 t mcx_kstat_attach_ppcnt +ffffffff818e5fd0 t mcx_kstat_ppcnt_read +ffffffff818e60f0 t mcx_kstat_mtmp_read +ffffffff818e6280 t mcx_kstat_queue_read +ffffffff818e7710 t mcx_timecounter_read +ffffffff818e8000 t iavf_match +ffffffff818e8030 t iavf_attach +ffffffff818e8900 t iavf_reset +ffffffff818e8bd0 t iavf_dmamem_alloc +ffffffff818e8d30 t iavf_arq_fill +ffffffff818e8fe0 t iavf_arq_timeout +ffffffff818e9010 t iavf_init_admin_queue +ffffffff818e91c0 t iavf_get_version +ffffffff818e93e0 t iavf_get_vf_resources +ffffffff818e95b0 t iavf_config_irq_map +ffffffff818e97a0 t iavf_intr +ffffffff818e9e20 t iavf_ioctl +ffffffff818ea9d0 t iavf_start +ffffffff818ead20 t iavf_watchdog +ffffffff818ead50 t iavf_media_change +ffffffff818ead80 t iavf_media_status +ffffffff818eae10 t iavf_arq_unfill +ffffffff818eaf10 t iavf_down +ffffffff818eb470 t iavf_up +ffffffff818ec0e0 t iavf_queue_select +ffffffff818ec2e0 t iavf_rxfill +ffffffff818ec4e0 t iavf_rxrefill +ffffffff818ec500 t iavf_process_arq +ffffffff818ed000 T rge_match +ffffffff818ed030 T rge_attach +ffffffff818ed520 T rge_activate +ffffffff818ed660 T rge_intr +ffffffff818ed950 T rge_config_imtype +ffffffff818ed9c0 T rge_exit_oob +ffffffff818ee1e0 T rge_hw_init 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drm_atomic_helper_async_commit +ffffffff81925af0 T drm_atomic_helper_commit +ffffffff81925db0 T drm_atomic_helper_prepare_planes +ffffffff81925f60 T drm_atomic_helper_setup_commit +ffffffff819267f0 t commit_work +ffffffff81926810 T drm_atomic_helper_swap_state +ffffffff81926e80 t commit_tail +ffffffff81927160 t release_crtc_commit +ffffffff819271a0 T drm_atomic_helper_wait_for_dependencies +ffffffff819273a0 T drm_atomic_helper_commit_cleanup_done +ffffffff81927610 T drm_atomic_helper_commit_planes_on_crtc +ffffffff81927840 T drm_atomic_helper_disable_planes_on_crtc +ffffffff819279a0 T drm_atomic_helper_update_plane +ffffffff81927ad0 T drm_atomic_helper_disable_plane +ffffffff81927b90 T drm_atomic_helper_set_config +ffffffff81927c40 T drm_atomic_helper_disable_all +ffffffff81927df0 T drm_atomic_helper_shutdown +ffffffff81927f40 T drm_atomic_helper_duplicate_state +ffffffff819280b0 T drm_atomic_helper_suspend +ffffffff81928200 T drm_atomic_helper_commit_duplicated_state +ffffffff81928340 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drm_atomic_helper_plane_duplicate_state +ffffffff81929760 T drm_atomic_helper_plane_destroy_state +ffffffff819297e0 T __drm_atomic_helper_connector_state_reset +ffffffff81929810 T __drm_atomic_helper_connector_reset +ffffffff81929850 T drm_atomic_helper_connector_reset +ffffffff81929920 T __drm_atomic_helper_connector_destroy_state +ffffffff81929980 T drm_atomic_helper_connector_tv_reset +ffffffff819299e0 T __drm_atomic_helper_connector_duplicate_state +ffffffff81929a70 T drm_atomic_helper_connector_duplicate_state +ffffffff81929b50 T drm_atomic_helper_connector_destroy_state +ffffffff81929bc0 T __drm_atomic_helper_private_obj_duplicate_state +ffffffff81929c00 T __drm_atomic_helper_bridge_duplicate_state +ffffffff81929c40 T drm_atomic_helper_bridge_duplicate_state +ffffffff81929cf0 T drm_atomic_helper_bridge_destroy_state +ffffffff81929d10 T __drm_atomic_helper_bridge_reset +ffffffff81929d60 T drm_atomic_helper_bridge_reset +ffffffff8192a000 T drm_atomic_set_mode_for_crtc +ffffffff8192a200 T drm_atomic_set_mode_prop_for_crtc +ffffffff8192a490 T drm_atomic_set_crtc_for_plane +ffffffff8192a600 T drm_atomic_set_fb_for_plane +ffffffff8192a6e0 T drm_atomic_set_crtc_for_connector +ffffffff8192a840 T drm_atomic_get_property +ffffffff8192af80 T drm_atomic_connector_commit_dpms +ffffffff8192b0e0 T drm_atomic_set_property +ffffffff8192bb90 T drm_mode_atomic_ioctl +ffffffff8192d000 T drm_is_current_master +ffffffff8192d060 T drm_getmagic +ffffffff8192d130 T drm_authmagic +ffffffff8192d1f0 T drm_master_create +ffffffff8192d290 T drm_setmaster_ioctl +ffffffff8192d350 t drm_new_set_master +ffffffff8192d4e0 T drm_dropmaster_ioctl +ffffffff8192d630 T drm_master_open +ffffffff8192d6e0 T drm_master_get +ffffffff8192d710 T drm_master_release +ffffffff8192d860 T drm_master_put +ffffffff8192d8f0 T drm_file_get_master +ffffffff8192d950 T drm_master_internal_acquire +ffffffff8192d9c0 T drm_master_internal_release +ffffffff8192e000 T drm_plane_create_alpha_property +ffffffff8192e0a0 T drm_plane_create_rotation_property +ffffffff8192e1e0 T drm_rotation_simplify +ffffffff8192e260 T drm_plane_create_zpos_property +ffffffff8192e320 T drm_plane_create_zpos_immutable_property +ffffffff8192e3d0 T drm_atomic_normalize_zpos +ffffffff8192e6d0 T drm_plane_create_blend_mode_property +ffffffff8192e870 t drm_atomic_state_zpos_cmp +ffffffff8192f000 T drm_bridge_add +ffffffff8192f070 T devm_drm_bridge_add +ffffffff8192f110 T drm_bridge_remove +ffffffff8192f170 T drm_bridge_attach +ffffffff8192f2f0 T drm_bridge_detach +ffffffff8192f3e0 T drm_bridge_chain_mode_fixup +ffffffff8192f480 T drm_bridge_chain_mode_valid +ffffffff8192f520 T drm_bridge_chain_disable +ffffffff8192f5b0 T drm_bridge_chain_post_disable +ffffffff8192f630 T drm_bridge_chain_mode_set +ffffffff8192f6c0 T drm_bridge_chain_pre_enable +ffffffff8192f750 T drm_bridge_chain_enable +ffffffff8192f7d0 T drm_atomic_bridge_chain_disable +ffffffff8192f8d0 T drm_atomic_bridge_chain_post_disable +ffffffff8192f9e0 T drm_atomic_bridge_chain_pre_enable +ffffffff8192fae0 T drm_atomic_bridge_chain_enable +ffffffff8192fbf0 T drm_atomic_bridge_chain_check +ffffffff8192ff50 T drm_bridge_detect +ffffffff8192ffb0 T drm_bridge_get_modes +ffffffff81930010 T drm_bridge_get_edid +ffffffff81930070 T drm_bridge_hpd_enable +ffffffff81930140 T drm_bridge_hpd_disable +ffffffff819301e0 T drm_bridge_hpd_notify +ffffffff81930240 t drm_bridge_atomic_duplicate_priv_state +ffffffff81930260 t drm_bridge_atomic_destroy_priv_state +ffffffff81930280 t select_bus_fmt_recursive +ffffffff81931000 T drm_buddy_init +ffffffff81931460 T drm_buddy_fini +ffffffff81931560 T drm_get_buddy +ffffffff819315a0 T drm_buddy_free_block +ffffffff81931740 T drm_buddy_free_list +ffffffff819317d0 T drm_buddy_block_trim +ffffffff81931a20 t __alloc_range +ffffffff81931df0 T drm_buddy_alloc_blocks +ffffffff81932690 T drm_buddy_block_print +ffffffff819326d0 T drm_buddy_print +ffffffff81932840 T drm_buddy_module_exit +ffffffff81932860 T drm_buddy_module_init +ffffffff819328c0 t split_block +ffffffff81933000 T drm_clflush_pages +ffffffff81933120 T drm_clflush_sg +ffffffff81933270 T drm_clflush_virt_range +ffffffff81933340 T drm_need_swiotlb +ffffffff81933370 T drm_memcpy_from_wc +ffffffff81933710 T drm_memcpy_init_early +ffffffff81934000 T drm_client_init +ffffffff81934110 T drm_client_register +ffffffff81934180 T drm_client_release +ffffffff81934220 T drm_client_dev_unregister +ffffffff81934310 T drm_client_dev_hotplug +ffffffff819343f0 T drm_client_dev_restore +ffffffff819344d0 T drm_client_buffer_vmap +ffffffff81934540 T drm_client_buffer_vunmap +ffffffff81934560 T drm_client_framebuffer_create +ffffffff81934840 T drm_client_framebuffer_delete +ffffffff81934950 T drm_client_framebuffer_flush +ffffffff81935000 T drm_client_modeset_create +ffffffff81935140 T drm_client_modeset_free +ffffffff81935260 T drm_client_modeset_probe +ffffffff81936a30 t drm_client_pick_crtcs +ffffffff81936d20 T drm_client_rotation +ffffffff81936ec0 T drm_client_modeset_check +ffffffff81936f60 t drm_client_modeset_commit_atomic +ffffffff81937160 T drm_client_modeset_commit_locked +ffffffff81937300 T drm_client_modeset_commit +ffffffff81937370 T drm_client_modeset_dpms +ffffffff819375c0 t drm_connector_pick_cmdline_mode +ffffffff81938000 T drm_color_ctm_s31_32_to_qm_n +ffffffff819380e0 T drm_crtc_enable_color_mgmt +ffffffff819381c0 T drm_mode_crtc_set_gamma_size +ffffffff819382e0 T drm_mode_gamma_set_ioctl +ffffffff819387d0 T drm_mode_gamma_get_ioctl +ffffffff81938910 T drm_get_color_encoding_name +ffffffff81938980 T drm_get_color_range_name +ffffffff819389f0 T drm_plane_create_color_properties +ffffffff81938c50 T drm_color_lut_check +ffffffff81939000 T drm_connector_ida_init +ffffffff81939110 T drm_connector_ida_destroy +ffffffff81939220 T drm_get_connector_type_name +ffffffff81939260 T drm_connector_free_work_fn +ffffffff81939320 T drm_connector_init +ffffffff819393a0 t __drm_connector_init +ffffffff819398b0 T drm_connector_init_with_ddc +ffffffff81939940 T drmm_connector_init +ffffffff81939a00 t drm_connector_cleanup_action +ffffffff81939a20 T drm_connector_attach_edid_property +ffffffff81939a40 T drm_connector_attach_encoder +ffffffff81939ac0 T drm_connector_has_possible_encoder +ffffffff81939b00 T drm_connector_cleanup +ffffffff81939e30 T drm_connector_unregister +ffffffff81939ed0 T drm_mode_put_tile_group +ffffffff81939f60 T drm_connector_register +ffffffff8193a050 T drm_connector_unregister_all +ffffffff8193a1f0 T drm_connector_list_iter_begin +ffffffff8193a230 T drm_connector_list_iter_next +ffffffff8193a340 T drm_connector_list_iter_end +ffffffff8193a410 T drm_connector_register_all +ffffffff8193a5a0 T drm_get_connector_status_name +ffffffff8193a5f0 T drm_get_connector_force_name +ffffffff8193a630 T drm_get_subpixel_order_name +ffffffff8193a670 T drm_get_dpms_name +ffffffff8193a6b0 T drm_display_info_set_bus_formats +ffffffff8193a780 T drm_get_dvi_i_select_name +ffffffff8193a7e0 T drm_get_dvi_i_subconnector_name +ffffffff8193a840 T drm_get_tv_select_name +ffffffff8193a8a0 T drm_get_tv_subconnector_name +ffffffff8193a900 T drm_get_dp_subconnector_name +ffffffff8193a990 T drm_connector_create_standard_properties +ffffffff8193ab10 T drm_mode_create_dvi_i_properties +ffffffff8193abb0 T drm_connector_attach_dp_subconnector_property +ffffffff8193ac20 T drm_connector_attach_content_type_property +ffffffff8193acc0 T drm_mode_create_content_type_property +ffffffff8193ad40 T drm_connector_attach_tv_margin_properties +ffffffff8193adb0 T drm_mode_create_tv_margin_properties +ffffffff8193aed0 T drm_mode_create_tv_properties +ffffffff8193b130 T drm_mode_create_scaling_mode_property +ffffffff8193b1a0 T drm_connector_attach_vrr_capable_property +ffffffff8193b230 T drm_connector_attach_scaling_mode_property +ffffffff8193b400 T drm_mode_create_aspect_ratio_property +ffffffff8193b480 T drm_mode_create_hdmi_colorspace_property +ffffffff8193b500 T drm_mode_create_dp_colorspace_property +ffffffff8193b580 T drm_mode_create_suggested_offset_properties +ffffffff8193b650 T drm_connector_set_path_property +ffffffff8193b6b0 T drm_connector_set_tile_property +ffffffff8193b800 T drm_connector_set_link_status_property +ffffffff8193b850 T drm_connector_attach_max_bpc_property +ffffffff8193b910 T drm_connector_attach_hdr_output_metadata_property +ffffffff8193b960 T drm_connector_attach_colorspace_property +ffffffff8193b9b0 T drm_connector_atomic_hdr_metadata_equal +ffffffff8193ba20 T drm_connector_set_vrr_capable_property +ffffffff8193ba70 T drm_connector_set_panel_orientation +ffffffff8193bb30 T drm_connector_set_panel_orientation_with_quirk +ffffffff8193bc10 T drm_connector_set_orientation_from_panel +ffffffff8193bd00 T drm_connector_create_privacy_screen_properties +ffffffff8193bda0 T drm_connector_attach_privacy_screen_properties +ffffffff8193be10 T drm_connector_attach_privacy_screen_provider +ffffffff8193bf20 t drm_connector_privacy_screen_notifier +ffffffff8193bfc0 T drm_connector_update_privacy_screen +ffffffff8193c030 T drm_connector_set_obj_prop +ffffffff8193c110 T drm_connector_property_set_ioctl +ffffffff8193c170 T drm_mode_getconnector +ffffffff8193c6b0 T drm_connector_find_by_fwnode +ffffffff8193c760 T drm_connector_oob_hotplug_event +ffffffff8193c850 T drm_mode_get_tile_group +ffffffff8193c920 T drm_mode_create_tile_group +ffffffff8193c9f0 t drm_connector_free +ffffffff8193ca30 t kasprintf +ffffffff8193d000 T drm_crtc_from_index +ffffffff8193d060 T drm_crtc_force_disable +ffffffff8193d180 T drm_mode_set_config_internal +ffffffff8193d200 T drm_crtc_register_all +ffffffff8193d290 T drm_crtc_unregister_all +ffffffff8193d300 T drm_crtc_create_fence +ffffffff8193d390 T drm_crtc_init_with_planes +ffffffff8193d460 t __drm_crtc_init_with_planes +ffffffff8193d850 T drmm_crtc_init_with_planes +ffffffff8193d950 T __drmm_crtc_alloc_with_planes +ffffffff8193dac0 T drm_crtc_cleanup +ffffffff8193dbe0 T drm_mode_getcrtc +ffffffff8193dd80 t __drm_mode_set_config_internal +ffffffff8193df20 T drm_crtc_check_viewport +ffffffff8193dfd0 T drm_mode_setcrtc +ffffffff8193e730 T drm_mode_crtc_set_obj_prop +ffffffff8193e7b0 T drm_crtc_create_scaling_filter_property +ffffffff8193e820 t drm_crtc_fence_get_driver_name +ffffffff8193e8a0 t drm_crtc_fence_get_timeline_name +ffffffff8193e910 t kasprintf +ffffffff8193e9e0 t drmm_crtc_init_with_planes_cleanup +ffffffff8193f000 T drm_helper_encoder_in_use +ffffffff8193f180 T drm_helper_crtc_in_use +ffffffff8193f2b0 T drm_helper_disable_unused_functions +ffffffff8193f330 t __drm_helper_disable_unused_functions +ffffffff8193f430 T drm_crtc_helper_set_mode +ffffffff8193f8e0 T drm_connector_get_single_encoder +ffffffff8193f9e0 T drm_crtc_helper_set_config +ffffffff81940600 T drm_helper_connector_dpms +ffffffff819408f0 T drm_helper_resume_force_mode +ffffffff81940be0 T drm_helper_force_disable_all +ffffffff81940cb0 t drm_encoder_disable +ffffffff81941000 T drm_atomic_helper_check_plane_damage +ffffffff819410a0 T drm_atomic_helper_dirtyfb +ffffffff81941350 T drm_atomic_helper_damage_iter_init +ffffffff819414a0 T drm_atomic_helper_damage_iter_next +ffffffff81941540 T drm_atomic_helper_damage_merged +ffffffff81942000 T displayid_iter_edid_begin +ffffffff81942050 T __displayid_iter_next +ffffffff819422e0 T displayid_iter_end +ffffffff81943000 T drm_mode_create_dumb +ffffffff819430c0 T drm_mode_create_dumb_ioctl +ffffffff81943180 T drm_mode_mmap_dumb_ioctl +ffffffff819431f0 T drm_mode_destroy_dumb +ffffffff81943260 T drm_mode_destroy_dumb_ioctl +ffffffff81944000 T drm_edid_header_is_valid +ffffffff81944080 T drm_edid_are_equal +ffffffff819440f0 T drm_edid_block_valid +ffffffff81944300 t edid_block_check +ffffffff81944430 t edid_block_status_print +ffffffff81944530 T drm_edid_is_valid +ffffffff819445b0 T drm_edid_override_set +ffffffff81944620 T drm_connector_update_edid_property +ffffffff819447d0 T drm_edid_override_reset +ffffffff81944900 T drm_add_override_edid_modes +ffffffff81944ae0 T drm_add_edid_modes +ffffffff81944bd0 T drm_do_get_edid +ffffffff81944bf0 t _drm_do_get_edid +ffffffff81945100 T drm_edid_raw +ffffffff81945190 T drm_edid_alloc +ffffffff81945260 T drm_edid_dup +ffffffff81945340 T drm_edid_free +ffffffff819453a0 T drm_probe_ddc +ffffffff819454a0 t drm_do_probe_ddc_edid +ffffffff819455f0 T drm_get_edid +ffffffff81945730 T drm_edid_read_custom +ffffffff81945820 T drm_edid_read_ddc +ffffffff81945950 T drm_edid_read +ffffffff819459d0 T drm_edid_get_panel_id +ffffffff81945ab0 t edid_block_read +ffffffff81945d20 T drm_get_edid_switcheroo +ffffffff81945d70 T drm_edid_duplicate +ffffffff81945df0 T drm_mode_find_dmt +ffffffff81945f10 T drm_mode_fixup_1366x768 +ffffffff81945f70 T drm_find_edid_extension +ffffffff81946180 T drm_match_cea_mode +ffffffff819463d0 T drm_display_mode_from_cea_vic +ffffffff81946440 T drm_edid_get_monitor_name +ffffffff819464f0 t get_monitor_name +ffffffff81946850 T drm_edid_to_sad +ffffffff81946a60 T drm_edid_to_speaker_allocation +ffffffff81946c10 T drm_av_sync_delay +ffffffff81946cc0 T drm_detect_hdmi_monitor +ffffffff81946de0 T drm_detect_monitor_audio +ffffffff81946ff0 T drm_default_rgb_quant_range +ffffffff81947030 T drm_edid_connector_update +ffffffff81947090 t _drm_edid_connector_update +ffffffff81948f40 t _drm_update_tile_info +ffffffff819491d0 t _drm_edid_connector_property_update +ffffffff81949380 T drm_add_modes_noedid +ffffffff81949470 T drm_set_preferred_mode +ffffffff819494d0 T drm_hdmi_avi_infoframe_from_display_mode +ffffffff81949750 T drm_hdmi_avi_infoframe_quant_range +ffffffff819497f0 T drm_hdmi_vendor_infoframe_from_display_mode +ffffffff819498b0 t connector_bad_edid +ffffffff81949a70 t drm_for_each_detailed_block +ffffffff81949cc0 t __cea_db_iter_next +ffffffff81949f60 t update_display_info +ffffffff8194ade0 t get_monitor_range +ffffffff8194ae80 t do_detailed_mode +ffffffff8194b7a0 t hdmi_mode_alternate_clock +ffffffff8194b850 t do_cvt_mode +ffffffff8194baa0 t drm_mode_std +ffffffff8194c7b0 t do_standard_modes +ffffffff8194c900 t drm_monitor_supports_rb +ffffffff8194cbf0 t drm_gtf2_hbreak +ffffffff8194ce80 t do_established_modes +ffffffff8194d080 t drm_match_hdmi_mode +ffffffff8194d2c0 t do_inferred_modes +ffffffff8194d830 t mode_in_range +ffffffff8194e000 T drm_encoder_register_all +ffffffff8194e090 T drm_encoder_unregister_all +ffffffff8194e100 T drm_encoder_init +ffffffff8194e1d0 t __drm_encoder_init +ffffffff8194e390 T drm_encoder_cleanup +ffffffff8194e4c0 T __drmm_encoder_alloc +ffffffff8194e5e0 T drmm_encoder_init +ffffffff8194e6c0 T drm_mode_getencoder +ffffffff8194e820 t kasprintf +ffffffff8194e8f0 t drmm_encoder_alloc_release +ffffffff8194f000 T drm_i2c_encoder_dpms +ffffffff8194f020 T drm_i2c_encoder_mode_fixup +ffffffff8194f060 T drm_i2c_encoder_prepare +ffffffff8194f080 T drm_i2c_encoder_commit +ffffffff8194f0a0 T drm_i2c_encoder_mode_set +ffffffff8194f0c0 T drm_i2c_encoder_detect +ffffffff8194f0e0 T drm_i2c_encoder_save +ffffffff8194f100 T drm_i2c_encoder_restore +ffffffff81950000 T drm_fb_helper_debug_enter +ffffffff81950100 T drm_fb_helper_debug_leave +ffffffff81950270 T drm_fb_helper_restore_fbdev_mode_unlocked +ffffffff81950310 T drm_fb_helper_blank +ffffffff819503a0 T drm_fb_helper_prepare +ffffffff81950480 t drm_fb_helper_resume_worker +ffffffff819504b0 t drm_fb_helper_damage_work +ffffffff81950830 T drm_fb_helper_init +ffffffff819508a0 T drm_fb_helper_alloc_fbi +ffffffff81950900 T drm_fb_helper_unregister_fbi +ffffffff81950930 T drm_fb_helper_fini +ffffffff81950a30 T drm_fb_helper_set_suspend +ffffffff81950a60 T drm_fb_helper_set_suspend_unlocked +ffffffff81950a90 T drm_fb_helper_set_par +ffffffff81950b80 T drm_fb_helper_pan_display +ffffffff81950c50 T drm_fb_helper_fill_info +ffffffff81950d10 T drm_fb_helper_initial_config +ffffffff81950d40 t __drm_fb_helper_initial_config_and_unlock +ffffffff81951290 T drm_fb_helper_hotplug_event +ffffffff81951490 t drm_setup_crtcs_fb +ffffffff819515d0 T drm_fb_helper_lastclose +ffffffff81951680 T drm_fb_helper_output_poll_changed +ffffffff819516a0 T drm_fbdev_generic_setup +ffffffff81951850 t drm_fbdev_client_hotplug +ffffffff81951a80 t drm_fbdev_client_unregister +ffffffff81951af0 t drm_fbdev_client_restore +ffffffff81951b90 t drm_fbdev_cleanup +ffffffff81951c30 t drm_fbdev_use_shadow_fb +ffffffff81951c80 t drm_fb_helper_generic_probe +ffffffff81952000 T drm_dev_needs_global_mutex +ffffffff81952060 T drm_file_alloc +ffffffff819522d0 T drm_file_free +ffffffff81952500 T drm_lastclose +ffffffff81952570 T drm_release +ffffffff819525c0 T drm_release_noglobal +ffffffff81952610 T drm_read +ffffffff81952660 T drm_event_reserve_init_locked +ffffffff819526e0 T drm_event_reserve_init +ffffffff819527a0 T drm_event_cancel_free +ffffffff81952820 T drm_send_event_timestamp_locked +ffffffff81952830 t drm_send_event_helper +ffffffff81952a10 T drm_send_event_locked +ffffffff81952a30 T drm_send_event +ffffffff81952a80 T mock_drm_getfile +ffffffff81953000 T drm_flip_work_allocate_task +ffffffff81953060 T drm_flip_work_queue_task +ffffffff819530b0 T drm_flip_work_queue +ffffffff81953150 T drm_flip_work_commit +ffffffff819531d0 T drm_flip_work_init +ffffffff81953240 t flip_worker +ffffffff81953320 T drm_flip_work_cleanup +ffffffff81954000 T drm_fb_clip_offset +ffffffff81954040 T drm_fb_memcpy +ffffffff819542c0 T drm_fb_swab +ffffffff819543c0 t drm_fb_swab32_line +ffffffff81954420 t drm_fb_swab16_line +ffffffff81954480 t drm_fb_xfrm +ffffffff81954740 T drm_fb_xrgb8888_to_rgb332 +ffffffff819547a0 t drm_fb_xrgb8888_to_rgb332_line +ffffffff81954890 T drm_fb_xrgb8888_to_rgb565 +ffffffff81954910 t drm_fb_xrgb8888_to_rgb565_swab_line +ffffffff81954990 t drm_fb_xrgb8888_to_rgb565_line +ffffffff81954a80 T drm_fb_xrgb8888_to_rgb888 +ffffffff81954ae0 t drm_fb_xrgb8888_to_rgb888_line +ffffffff81954b70 T drm_fb_xrgb8888_to_xrgb2101010 +ffffffff81954bd0 t drm_fb_xrgb8888_to_xrgb2101010_line +ffffffff81954c50 T drm_fb_xrgb8888_to_gray8 +ffffffff81954cb0 t drm_fb_xrgb8888_to_gray8_line +ffffffff81954d30 T drm_fb_blit +ffffffff81955180 T drm_fb_xrgb8888_to_mono +ffffffff81955510 T drm_fb_build_fourcc_list +ffffffff81955840 t drm_fb_rgb888_to_xrgb8888_line +ffffffff81955910 t drm_fb_rgb565_to_xrgb8888_line +ffffffff81956000 T drm_mode_legacy_fb_format +ffffffff819560f0 T drm_driver_legacy_fb_format +ffffffff819561f0 T __drm_format_info +ffffffff81956270 T drm_format_info +ffffffff81956330 T drm_get_format_info +ffffffff81956410 T drm_format_info_block_width +ffffffff81956460 T drm_format_info_block_height +ffffffff819564b0 T drm_format_info_bpp +ffffffff81956530 T drm_format_info_min_pitch +ffffffff81957000 T drm_framebuffer_check_src_coords +ffffffff81957120 T drm_mode_addfb +ffffffff81957330 T drm_mode_addfb2 +ffffffff81957420 T drm_mode_addfb_ioctl +ffffffff81957440 T drm_internal_framebuffer_create +ffffffff81957960 T drm_mode_addfb2_ioctl +ffffffff81957a50 T drm_mode_rmfb +ffffffff81957c20 T drm_framebuffer_lookup +ffffffff81957c70 t drm_mode_rmfb_work_fn +ffffffff81957d30 T drm_mode_rmfb_ioctl +ffffffff81957d50 T drm_mode_getfb +ffffffff81957eb0 T drm_mode_getfb2_ioctl +ffffffff81958260 T drm_mode_dirtyfb_ioctl +ffffffff81958400 T drm_fb_release +ffffffff81958510 T drm_framebuffer_free +ffffffff81958550 T drm_framebuffer_init +ffffffff819586b0 T drm_framebuffer_unregister_private +ffffffff819586f0 T drm_framebuffer_cleanup +ffffffff81958750 T drm_framebuffer_remove +ffffffff81958c00 T drm_framebuffer_plane_width +ffffffff81958c50 T drm_framebuffer_plane_height +ffffffff81958ca0 T drm_framebuffer_print_info +ffffffff81959000 T drm_ref +ffffffff81959030 T drm_unref +ffffffff819590b0 T drm_fault +ffffffff81959270 T drm_flush +ffffffff819592a0 T udv_attach_drm +ffffffff819594c0 T drm_gem_init +ffffffff81959570 t drm_gem_init_release +ffffffff81959590 T drm_gem_object_init +ffffffff819596f0 T drm_gem_private_object_init +ffffffff819597f0 T drm_gem_handle_delete +ffffffff819598e0 t drm_gem_object_release_handle +ffffffff81959970 T drm_gem_dumb_map_offset +ffffffff81959aa0 T drm_gem_object_lookup +ffffffff81959b20 T drm_gem_create_mmap_offset +ffffffff81959b50 T drm_gem_dumb_destroy +ffffffff81959b70 T drm_gem_handle_create_tail +ffffffff81959ce0 t drm_gem_object_handle_put_unlocked +ffffffff81959e30 T drm_gem_handle_create +ffffffff81959e80 T drm_gem_free_mmap_offset +ffffffff81959eb0 T drm_gem_create_mmap_offset_size +ffffffff81959ee0 T drm_gem_get_pages +ffffffff81959f30 T drm_gem_put_pages +ffffffff81959f60 T drm_gem_objects_lookup +ffffffff8195a0d0 T drm_gem_dma_resv_wait +ffffffff8195a210 T drm_gem_close_ioctl +ffffffff8195a260 T drm_gem_flink_ioctl +ffffffff8195a3d0 T drm_gem_open_ioctl +ffffffff8195a500 T drm_gem_open +ffffffff8195a530 T drm_gem_release +ffffffff8195a570 T drm_gem_object_release +ffffffff8195a6c0 T drm_gem_lru_remove +ffffffff8195a7a0 T drm_gem_object_free +ffffffff8195a7f0 T drm_gem_mmap_obj +ffffffff8195a900 T drm_gem_mmap +ffffffff8195ab80 T drm_gem_print_info +ffffffff8195aca0 T drm_gem_pin +ffffffff8195ace0 T drm_gem_unpin +ffffffff8195ad20 T drm_gem_vmap +ffffffff8195ad80 T drm_gem_vunmap +ffffffff8195adf0 T drm_gem_lock_reservations +ffffffff8195b060 T drm_gem_unlock_reservations +ffffffff8195b160 T drm_gem_lru_init +ffffffff8195b1a0 T drm_gem_lru_move_tail +ffffffff8195b290 T drm_gem_lru_scan +ffffffff8195b680 t __ww_mutex_lock +ffffffff8195c000 T drm_gem_plane_helper_prepare_fb +ffffffff8195d000 T drm_gem_fb_destroy +ffffffff8195d0c0 T drm_gem_fb_create_handle +ffffffff8195e000 T drm_ht_create +ffffffff8195e080 T drm_ht_verbose_list +ffffffff8195e140 T drm_ht_insert_item +ffffffff8195e190 T drm_ht_just_insert_please +ffffffff8195e260 T drm_ht_find_item +ffffffff8195e2b0 T drm_ht_remove_key +ffffffff8195e300 T drm_ht_remove_item +ffffffff8195e350 T drm_ht_remove +ffffffff8195f000 T drm_getunique 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dma_fence_get_rcu_safe +ffffffff81964740 T dma_fence_release +ffffffff81964770 T dma_fence_put +ffffffff819647e0 T dma_fence_signal_timestamp_locked +ffffffff819648b0 T dma_fence_signal +ffffffff819649f0 T dma_fence_signal_locked +ffffffff81964b20 T dma_fence_signal_timestamp +ffffffff81964c10 T dma_fence_is_signaled +ffffffff81964c80 T dma_fence_is_signaled_locked +ffffffff81964dd0 T dma_fence_wait_timeout +ffffffff81964e30 T dma_fence_default_wait +ffffffff819650e0 T dma_fence_wait +ffffffff81965140 T dma_fence_enable_sw_signaling +ffffffff819652c0 T dma_fence_init +ffffffff81965320 T dma_fence_add_callback +ffffffff81965520 T dma_fence_remove_callback +ffffffff819655a0 T dma_fence_context_alloc +ffffffff819655e0 t dma_fence_default_wait_cb +ffffffff81965610 T dma_fence_wait_any_timeout +ffffffff81965950 T dma_fence_get_stub +ffffffff81965b00 T dma_fence_allocate_private_stub +ffffffff81965ba0 T dma_fence_array_create +ffffffff81965cc0 t irq_dma_fence_array_work +ffffffff81965d50 T dma_fence_array_first +ffffffff81965db0 T dma_fence_array_next +ffffffff81965e10 t dma_fence_array_get_driver_name +ffffffff81965e40 t dma_fence_array_get_timeline_name +ffffffff81965e70 t dma_fence_array_enable_signaling +ffffffff81965f70 t dma_fence_array_signaled +ffffffff81965fc0 t dma_fence_array_release +ffffffff81966080 T dma_fence_chain_find_seqno +ffffffff819661a0 T dma_fence_chain_walk +ffffffff819663e0 T dma_fence_chain_init +ffffffff819664f0 t dma_fence_chain_get_driver_name +ffffffff81966520 t dma_fence_chain_get_timeline_name +ffffffff81966550 t dma_fence_chain_enable_signaling +ffffffff81966700 t dma_fence_chain_signaled +ffffffff819667f0 t dma_fence_chain_release +ffffffff81966930 T dma_fence_is_container +ffffffff81966980 T dmabuf_read +ffffffff819669b0 T dmabuf_write +ffffffff819669e0 T dmabuf_ioctl +ffffffff81966a10 T dmabuf_kqfilter +ffffffff81966a40 T dmabuf_stat +ffffffff81966b00 T dmabuf_close +ffffffff81966b70 T dmabuf_seek +ffffffff81966c00 T dma_buf_export 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mipi_dsi_dcs_set_display_off +ffffffff8196af40 T mipi_dsi_dcs_set_display_on +ffffffff8196aff0 T mipi_dsi_dcs_set_column_address +ffffffff8196b0b0 T mipi_dsi_dcs_set_page_address +ffffffff8196b170 T mipi_dsi_dcs_set_tear_off +ffffffff8196b220 T mipi_dsi_dcs_set_tear_on +ffffffff8196b2d0 T mipi_dsi_dcs_set_pixel_format +ffffffff8196c000 T __drm_mm_interval_first +ffffffff8196c0c0 T drm_mm_reserve_node +ffffffff8196c370 t add_hole +ffffffff8196c4d0 T drm_mm_insert_node_in_range +ffffffff8196cac0 T drm_mm_remove_node +ffffffff8196cbf0 T drm_mm_replace_node +ffffffff8196cdd0 T drm_mm_scan_init_with_range +ffffffff8196ce50 T drm_mm_scan_add_block +ffffffff8196cfc0 T drm_mm_scan_remove_block +ffffffff8196d040 T drm_mm_scan_color_evict +ffffffff8196d120 T drm_mm_init +ffffffff8196d1d0 T drm_mm_takedown +ffffffff8196d210 T drm_mm_print +ffffffff8196e000 T drm_modeset_register_all +ffffffff8196e0a0 T drm_modeset_unregister_all +ffffffff8196e0e0 T drm_mode_getresources +ffffffff8196e390 T drm_mode_config_reset +ffffffff8196e4f0 T drmm_mode_config_init +ffffffff8196eb70 T drm_mode_config_cleanup +ffffffff8196eeb0 t drm_mode_config_init_release +ffffffff8196eec0 T drm_mode_config_validate +ffffffff81970000 T __drm_mode_object_add +ffffffff81970100 T drm_mode_object_add +ffffffff819701e0 T drm_mode_object_register +ffffffff81970230 T drm_mode_object_unregister +ffffffff819702d0 T drm_mode_object_lease_required +ffffffff81970320 T __drm_mode_object_find +ffffffff819703d0 T drm_mode_object_find +ffffffff81970480 T drm_mode_object_put +ffffffff81970500 T drm_mode_object_get +ffffffff81970560 T drm_object_attach_property +ffffffff81970670 T drm_object_property_set_value +ffffffff81970750 T drm_object_property_get_value +ffffffff819707e0 t __drm_object_property_get_value +ffffffff819708c0 T drm_object_property_get_default_value +ffffffff81970990 T drm_mode_object_get_properties +ffffffff81970ae0 T drm_mode_obj_get_properties_ioctl +ffffffff81970d30 T drm_mode_obj_find_prop_id +ffffffff81970d90 T drm_mode_obj_set_property_ioctl +ffffffff81972000 T drm_mode_debug_printmodeline +ffffffff81972140 T drm_mode_vrefresh +ffffffff819721e0 T drm_mode_create +ffffffff81972200 T drm_mode_destroy +ffffffff81972240 T drm_mode_probed_add +ffffffff819722e0 T drm_cvt_mode +ffffffff81972790 T drm_mode_set_name +ffffffff819727e0 T drm_gtf_mode_complex +ffffffff81972ae0 T drm_gtf_mode +ffffffff81972b30 T drm_mode_get_hv_timing +ffffffff81972b80 T drm_mode_init +ffffffff81972c50 T drm_mode_set_crtcinfo +ffffffff81972e00 T drm_mode_copy +ffffffff81972e60 T drm_mode_duplicate +ffffffff81972ee0 T drm_mode_match +ffffffff81973080 T drm_mode_equal +ffffffff819730a0 T drm_mode_equal_no_clocks +ffffffff819730c0 T drm_mode_equal_no_clocks_no_stereo +ffffffff81973180 T drm_mode_validate_driver +ffffffff81973270 T drm_mode_validate_size +ffffffff819732c0 T drm_mode_validate_ycbcr420 +ffffffff81973330 T drm_mode_is_420_only +ffffffff81973380 T drm_get_mode_status_name +ffffffff81973400 T drm_mode_prune_invalid +ffffffff819736a0 T drm_mode_sort +ffffffff819736d0 t drm_mode_compare +ffffffff81973860 T drm_connector_list_update +ffffffff81973a30 T drm_mode_parse_command_line_for_connector +ffffffff81973a60 T drm_mode_create_from_cmdline_mode +ffffffff81973b50 T drm_mode_convert_to_umode +ffffffff81973ce0 T drm_mode_convert_umode +ffffffff81973f00 T drm_mode_is_420_also +ffffffff81973f50 T drm_mode_is_420 +ffffffff81974000 T drm_helper_move_panel_connectors_to_head +ffffffff819740f0 T drm_helper_mode_fill_fb_struct +ffffffff819741b0 T drm_crtc_init +ffffffff81974280 T drm_mode_config_helper_suspend +ffffffff81974310 T drm_mode_config_helper_resume +ffffffff81975000 T drm_modeset_lock_all +ffffffff819751e0 T drm_modeset_acquire_init +ffffffff81975270 T drm_modeset_lock_all_ctx +ffffffff819753e0 T drm_modeset_backoff +ffffffff819754b0 T drm_modeset_acquire_fini +ffffffff819754e0 T drm_warn_on_modeset_not_all_locked +ffffffff81975630 T drm_modeset_unlock_all +ffffffff81975710 T drm_modeset_drop_locks +ffffffff819757a0 T drm_modeset_unlock +ffffffff81975870 t modeset_lock +ffffffff81975b00 T drm_modeset_lock_init +ffffffff81975b60 T drm_modeset_lock +ffffffff81975bc0 T drm_modeset_lock_single_interruptible +ffffffff81975be0 t __ww_mutex_lock +ffffffff81976000 T drm_mtrr_add +ffffffff81976070 T drm_mtrr_del +ffffffff81977000 T drm_panel_init +ffffffff81977040 T drm_panel_add +ffffffff81977090 T drm_panel_remove +ffffffff819770f0 T drm_panel_prepare +ffffffff81977140 T drm_panel_unprepare +ffffffff81977190 T drm_panel_enable +ffffffff81977230 T drm_panel_disable +ffffffff819772c0 T drm_panel_get_modes +ffffffff81977310 T drm_panel_of_backlight +ffffffff81978000 T drm_get_panel_orientation_quirk +ffffffff81979000 T drm_pci_set_busid +ffffffff81979090 t kasprintf +ffffffff8197a000 T drm_universal_plane_init +ffffffff8197a0f0 t __drm_universal_plane_init +ffffffff8197a7e0 T __drmm_universal_plane_alloc +ffffffff8197a920 t drmm_universal_plane_alloc_release +ffffffff8197a970 T __drm_universal_plane_alloc +ffffffff8197aab0 T drm_plane_register_all +ffffffff8197aba0 T drm_plane_unregister_all +ffffffff8197ac10 T drm_plane_cleanup +ffffffff8197ad60 T drm_plane_from_index +ffffffff8197adc0 T drm_plane_force_disable +ffffffff8197aed0 T drm_mode_plane_set_obj_prop +ffffffff8197af50 T drm_mode_getplane_res +ffffffff8197b050 T drm_mode_getplane +ffffffff8197b1b0 T drm_plane_check_pixel_format +ffffffff8197b270 T drm_any_plane_has_format +ffffffff8197b3b0 T drm_mode_setplane +ffffffff8197b710 T drm_mode_cursor_ioctl +ffffffff8197b780 t drm_mode_cursor_common +ffffffff8197be00 T drm_mode_cursor2_ioctl +ffffffff8197be20 T drm_mode_page_flip_ioctl +ffffffff8197c390 T drm_plane_enable_fb_damage_clips +ffffffff8197c3b0 T drm_plane_get_damage_clips_count +ffffffff8197c3f0 T __drm_plane_get_damage_clips +ffffffff8197c430 T drm_plane_get_damage_clips +ffffffff8197c4d0 T drm_create_scaling_filter_prop +ffffffff8197c620 T drm_plane_create_scaling_filter_property +ffffffff8197c690 t kasprintf +ffffffff8197c760 t __setplane_internal +ffffffff8197c950 t __setplane_check +ffffffff8197d000 T drm_plane_helper_update_primary +ffffffff8197d4b0 t get_connectors_for_crtc +ffffffff8197d5c0 T drm_plane_helper_disable_primary +ffffffff8197d670 T drm_plane_helper_destroy +ffffffff8197d6a0 T drm_plane_helper_atomic_check +ffffffff8197e000 T drm_prime_remove_buf_handle +ffffffff8197e090 T drm_prime_init_file_private +ffffffff8197e0f0 T drm_prime_destroy_file_private +ffffffff8197e150 T drm_gem_dmabuf_export +ffffffff8197e1b0 T drm_gem_dmabuf_release +ffffffff8197e1f0 T drm_gem_prime_fd_to_handle +ffffffff8197e400 T drm_gem_prime_import +ffffffff8197e460 t drm_prime_add_buf_handle +ffffffff8197e5b0 T drm_prime_fd_to_handle_ioctl +ffffffff8197e600 T drm_gem_prime_handle_to_fd +ffffffff8197e830 T drm_prime_handle_to_fd_ioctl +ffffffff8197e890 T drm_gem_map_attach +ffffffff8197e8b0 T drm_gem_map_detach +ffffffff8197e8d0 T drm_gem_dmabuf_vmap +ffffffff8197e8f0 T drm_gem_dmabuf_vunmap +ffffffff8197e910 T drm_gem_prime_mmap +ffffffff8197e960 T drm_prime_pages_to_sg +ffffffff8197e9b0 T drm_prime_get_contiguous_size +ffffffff8197ea00 T drm_gem_prime_export +ffffffff8197ea90 T drm_gem_prime_import_dev +ffffffff8197eaf0 T drm_prime_sg_to_page_array +ffffffff8197eb40 T drm_prime_sg_to_dma_addr_array +ffffffff8197eb90 T drm_prime_gem_destroy +ffffffff8197f000 T __drm_puts_coredump +ffffffff8197f0f0 T __drm_printfn_coredump +ffffffff8197f210 T __drm_puts_seq_file +ffffffff8197f240 T __drm_printfn_seq_file +ffffffff8197f270 T __drm_printfn_info +ffffffff8197f2a0 T __drm_printfn_debug +ffffffff8197f2d0 T __drm_printfn_err +ffffffff8197f310 T drm_puts +ffffffff8197f340 T drm_printf +ffffffff8197f3c0 T drm_print_bits +ffffffff8197f5e0 T drm_dev_printk +ffffffff8197f680 T __drm_dev_dbg +ffffffff8197f710 T ___drm_dbg +ffffffff8197f7a0 T __drm_err +ffffffff8197f830 T drm_print_regset32 +ffffffff81980000 T drm_crtc_mode_valid +ffffffff81980050 T drm_encoder_mode_valid +ffffffff81980090 T drm_connector_mode_valid +ffffffff81980110 T drm_kms_helper_poll_enable +ffffffff81980200 T drm_helper_probe_detect +ffffffff819803f0 T drm_helper_probe_single_connector_modes +ffffffff819809b0 t __drm_helper_update_and_validate +ffffffff81980d60 T drm_kms_helper_hotplug_event +ffffffff81980da0 T drm_kms_helper_connector_hotplug_event +ffffffff81980de0 T drm_kms_helper_is_poll_worker +ffffffff81980e10 T drm_kms_helper_poll_disable +ffffffff81980e90 T drm_kms_helper_poll_init +ffffffff81980ef0 t output_poll_execute +ffffffff81981180 T drm_kms_helper_poll_fini +ffffffff81981200 T drm_connector_helper_hpd_irq_event +ffffffff819812d0 t check_connector_changed +ffffffff819814b0 T drm_helper_hpd_irq_event +ffffffff81981600 T drm_crtc_helper_mode_valid_fixed +ffffffff81981650 T drm_connector_helper_get_modes_from_ddc +ffffffff819816e0 T drm_connector_helper_get_modes_fixed +ffffffff81981850 T drm_connector_helper_get_modes +ffffffff819818b0 t __delayed_work_tick +ffffffff81982000 T drm_property_create +ffffffff81982200 T drm_property_create_enum +ffffffff819822b0 T drm_property_add_enum +ffffffff819824d0 T drm_property_destroy +ffffffff81982580 T drm_property_create_bitmask +ffffffff819826b0 T drm_property_create_range +ffffffff81982720 T drm_property_create_signed_range +ffffffff81982790 T drm_property_create_object +ffffffff81982830 T drm_property_create_bool +ffffffff81982890 T drm_mode_getproperty_ioctl +ffffffff81982aa0 T drm_property_create_blob +ffffffff81982be0 t drm_property_free_blob +ffffffff81982c60 T drm_property_blob_put +ffffffff81982ca0 T drm_property_destroy_user_blobs +ffffffff81982d20 T drm_property_blob_get +ffffffff81982d60 T drm_property_lookup_blob +ffffffff81982d80 T drm_property_replace_global_blob +ffffffff81982ed0 T drm_property_replace_blob +ffffffff81982f40 T drm_mode_getblob_ioctl +ffffffff81983000 T drm_mode_createblob_ioctl +ffffffff81983100 T drm_mode_destroyblob_ioctl +ffffffff81983210 T drm_property_change_valid_get +ffffffff81983460 T drm_property_change_valid_put +ffffffff81984000 T drm_rect_intersect +ffffffff81984080 T drm_rect_clip_scaled +ffffffff819842f0 T drm_rect_calc_hscale +ffffffff819843c0 T drm_rect_calc_vscale +ffffffff81984490 T drm_rect_debug_print +ffffffff819845b0 T drm_rect_rotate +ffffffff81984670 T drm_rect_rotate_inv +ffffffff81985000 T drm_self_refresh_helper_update_avg_times +ffffffff81985140 T drm_self_refresh_helper_alter_state +ffffffff819852d0 T drm_self_refresh_helper_init +ffffffff81985480 t drm_self_refresh_helper_entry_work +ffffffff819855e0 T drm_self_refresh_helper_cleanup +ffffffff81985660 t __delayed_work_tick +ffffffff81986000 T drm_syncobj_find +ffffffff81986070 T drm_syncobj_add_point +ffffffff81986160 t syncobj_wait_syncobj_func +ffffffff81986210 T drm_syncobj_replace_fence +ffffffff819862a0 T drm_syncobj_find_fence +ffffffff81986600 t drm_syncobj_fence_add_wait +ffffffff819866d0 T drm_syncobj_free +ffffffff81986760 T drm_syncobj_create +ffffffff81986970 T drm_syncobj_get_handle +ffffffff81986a90 T drm_syncobj_get_fd +ffffffff81986ae0 T drm_syncobj_open +ffffffff81986b10 T drm_syncobj_release +ffffffff81986b50 t drm_syncobj_release_handle +ffffffff81986c00 T drm_syncobj_create_ioctl +ffffffff81986d30 T drm_syncobj_destroy_ioctl +ffffffff81986e50 T drm_syncobj_handle_to_fd_ioctl +ffffffff81987040 T drm_syncobj_fd_to_handle_ioctl +ffffffff81987230 T drm_syncobj_transfer_ioctl +ffffffff81987650 T drm_timeout_abs_to_jiffies +ffffffff81987730 T drm_syncobj_wait_ioctl +ffffffff819878c0 t drm_syncobj_array_find +ffffffff81987af0 t drm_syncobj_array_free +ffffffff81987bd0 T drm_syncobj_timeline_wait_ioctl +ffffffff81987d60 T drm_syncobj_reset_ioctl +ffffffff81987ec0 T drm_syncobj_signal_ioctl +ffffffff81988050 T drm_syncobj_timeline_signal_ioctl +ffffffff81988280 T drm_syncobj_query_ioctl +ffffffff81988480 t drm_syncobj_array_wait_timeout +ffffffff819888f0 t syncobj_wait_fence_func +ffffffff81989000 T drm_vblank_count +ffffffff81989090 T drm_crtc_accurate_vblank_count +ffffffff819891a0 t drm_update_vblank_count +ffffffff819895f0 T drm_vblank_disable_and_save +ffffffff81989740 T drm_vblank_init +ffffffff819898c0 t vblank_disable_fn +ffffffff81989940 t drm_vblank_init_release +ffffffff819899d0 T drm_dev_has_vblank +ffffffff81989a00 T drm_crtc_vblank_waitqueue +ffffffff81989a50 T drm_calc_timestamping_constants +ffffffff81989c80 T drm_crtc_vblank_helper_get_vblank_timestamp_internal +ffffffff8198a1b0 T drm_crtc_vblank_helper_get_vblank_timestamp +ffffffff8198a1d0 T drm_crtc_vblank_count +ffffffff8198a260 T drm_crtc_vblank_count_and_time +ffffffff8198a320 T drm_crtc_arm_vblank_event +ffffffff8198a400 T drm_crtc_send_vblank_event +ffffffff8198a5b0 T drm_vblank_get +ffffffff8198a6d0 t drm_vblank_enable +ffffffff8198a890 T drm_crtc_vblank_get +ffffffff8198a9a0 T drm_vblank_put +ffffffff8198aad0 T drm_crtc_vblank_put +ffffffff8198aaf0 T drm_wait_one_vblank +ffffffff8198af40 T drm_crtc_wait_one_vblank +ffffffff8198af60 T drm_crtc_vblank_off +ffffffff8198b350 T drm_crtc_vblank_reset +ffffffff8198b480 T drm_crtc_set_max_vblank_count +ffffffff8198b560 T drm_crtc_vblank_on +ffffffff8198b6b0 t drm_reset_vblank_timestamp +ffffffff8198b8b0 T drm_crtc_vblank_restore +ffffffff8198bc90 T drm_legacy_modeset_ctl_ioctl +ffffffff8198beb0 T drm_wait_vblank_ioctl +ffffffff8198c8f0 T drm_handle_vblank +ffffffff8198cbe0 t drm_handle_vblank_events +ffffffff8198ce70 T drm_crtc_handle_vblank +ffffffff8198ce90 T drm_crtc_get_sequence_ioctl +ffffffff8198d080 T drm_crtc_queue_sequence_ioctl +ffffffff8198d450 t __get_vblank_counter +ffffffff8198e000 T drm_handle_vblank_works +ffffffff8198e1b0 T drm_vblank_cancel_pending_works +ffffffff8198e2f0 T drm_vblank_work_schedule +ffffffff8198e570 T drm_vblank_work_cancel_sync +ffffffff8198e6d0 T drm_vblank_work_flush +ffffffff8198e7a0 T drm_vblank_work_init +ffffffff8198e810 T drm_vblank_worker_init +ffffffff8198f000 T drm_vma_offset_manager_init +ffffffff8198f040 T drm_vma_offset_manager_destroy +ffffffff8198f060 T drm_vma_offset_lookup_locked +ffffffff8198f0f0 T drm_vma_offset_add +ffffffff8198f180 T drm_vma_offset_remove +ffffffff8198f1d0 T drm_vma_node_allow +ffffffff8198f1f0 t vma_node_allow +ffffffff8198f320 T drm_vma_node_allow_once +ffffffff8198f340 T drm_vma_node_revoke +ffffffff8198f3c0 T drm_vma_node_is_allowed +ffffffff81990000 T hdmi_avi_infoframe_init +ffffffff81990080 T hdmi_avi_infoframe_check +ffffffff819900d0 T hdmi_avi_infoframe_pack_only +ffffffff819902d0 T hdmi_avi_infoframe_pack +ffffffff81990330 T hdmi_spd_infoframe_init +ffffffff819903f0 T hdmi_spd_infoframe_check +ffffffff81990440 T hdmi_spd_infoframe_pack_only +ffffffff81990570 T hdmi_spd_infoframe_pack +ffffffff819906d0 T hdmi_audio_infoframe_init +ffffffff81990720 T hdmi_audio_infoframe_check +ffffffff81990770 T hdmi_audio_infoframe_pack_only +ffffffff819908c0 T hdmi_audio_infoframe_pack +ffffffff81990910 T hdmi_audio_infoframe_pack_for_dp +ffffffff81990a00 T hdmi_vendor_infoframe_init +ffffffff81990a60 T hdmi_vendor_infoframe_check +ffffffff81990b00 T hdmi_vendor_infoframe_pack_only +ffffffff81990cd0 T hdmi_vendor_infoframe_pack +ffffffff81990d70 T hdmi_drm_infoframe_init +ffffffff81990dd0 T hdmi_drm_infoframe_check +ffffffff81990e20 T hdmi_drm_infoframe_pack_only +ffffffff81990ff0 T hdmi_drm_infoframe_pack +ffffffff81991040 T hdmi_infoframe_check +ffffffff819911a0 T hdmi_infoframe_pack_only +ffffffff819913c0 T hdmi_infoframe_pack +ffffffff81991530 T hdmi_infoframe_log +ffffffff819924d0 T hdmi_drm_infoframe_unpack_only +ffffffff819925b0 T hdmi_infoframe_unpack +ffffffff81993000 T list_sort +ffffffff81994000 T radix_tree_lookup +ffffffff819940b0 T radix_tree_iter_find +ffffffff819941a0 T radix_tree_delete +ffffffff81994340 T radix_tree_iter_delete +ffffffff81994360 T radix_tree_insert +ffffffff81995000 T sort +ffffffff81995040 t qsort +ffffffff81997000 T drm_dp_dual_mode_read +ffffffff81997110 T drm_dp_dual_mode_write +ffffffff819971f0 T drm_dp_dual_mode_detect +ffffffff819974a0 T drm_dp_dual_mode_max_tmds_clock +ffffffff819975d0 T drm_dp_dual_mode_get_tmds_output +ffffffff81997700 T drm_dp_dual_mode_set_tmds_output +ffffffff81997990 T drm_dp_get_dual_mode_type_name +ffffffff81997a00 T drm_lspcon_get_mode +ffffffff81997bb0 T drm_lspcon_set_mode +ffffffff81998000 T drm_dp_channel_eq_ok +ffffffff81998080 T drm_dp_clock_recovery_ok +ffffffff81998100 T drm_dp_get_adjust_request_voltage +ffffffff81998140 T drm_dp_get_adjust_request_pre_emphasis +ffffffff81998190 T drm_dp_get_adjust_tx_ffe_preset +ffffffff819981d0 T drm_dp_128b132b_lane_channel_eq_done +ffffffff81998250 T drm_dp_128b132b_lane_symbol_locked +ffffffff819982c0 T drm_dp_128b132b_eq_interlane_align_done +ffffffff819982f0 T drm_dp_128b132b_cds_interlane_align_done +ffffffff81998320 T drm_dp_128b132b_link_training_failed +ffffffff81998350 T drm_dp_read_clock_recovery_delay +ffffffff81998450 T drm_dp_read_channel_eq_delay +ffffffff81998550 T drm_dp_128b132b_read_aux_rd_interval +ffffffff81998600 T drm_dp_link_train_clock_recovery_delay +ffffffff81998690 t __8b10b_clock_recovery_delay_us +ffffffff81998710 T drm_dp_link_train_channel_eq_delay +ffffffff81998790 T drm_dp_phy_name +ffffffff819987d0 T drm_dp_lttpr_link_train_clock_recovery_delay +ffffffff819987f0 T drm_dp_lttpr_link_train_channel_eq_delay +ffffffff81998860 T drm_dp_link_rate_to_bw_code +ffffffff819988d0 T drm_dp_bw_code_to_link_rate +ffffffff81998930 T drm_dp_dpcd_probe +ffffffff81998a70 t drm_dp_dpcd_access +ffffffff81998ba0 T drm_dp_dpcd_read +ffffffff81998cd0 T drm_dp_dpcd_write +ffffffff81998de0 T drm_dp_dpcd_read_link_status +ffffffff81998e00 T drm_dp_dpcd_read_phy_link_status +ffffffff81998f00 T drm_dp_downstream_is_type +ffffffff81998f40 T drm_dp_downstream_is_tmds +ffffffff81998fb0 T drm_dp_send_real_edid_checksum +ffffffff81999210 T drm_dp_read_dpcd_caps +ffffffff819993a0 T drm_dp_read_downstream_info +ffffffff819994a0 T drm_dp_downstream_max_dotclock +ffffffff819994f0 T drm_dp_downstream_max_tmds_clock +ffffffff81999590 T drm_dp_downstream_min_tmds_clock +ffffffff81999610 T drm_dp_downstream_max_bpc +ffffffff819996b0 T drm_dp_downstream_420_passthrough +ffffffff81999710 T drm_dp_downstream_444_to_420_conversion +ffffffff81999770 T drm_dp_downstream_rgb_to_ycbcr_conversion +ffffffff819997d0 T drm_dp_downstream_mode +ffffffff81999860 T drm_dp_downstream_id +ffffffff81999880 T drm_dp_downstream_debug +ffffffff81999920 T drm_dp_subconnector_type +ffffffff81999990 T drm_dp_set_subconnector_property +ffffffff81999a00 T drm_dp_read_sink_count_cap +ffffffff81999a50 T drm_dp_read_sink_count +ffffffff81999ab0 T drm_dp_remote_aux_init +ffffffff81999ae0 t drm_dp_aux_crc_work +ffffffff81999c60 T drm_dp_aux_init +ffffffff81999d10 T drm_dp_aux_register +ffffffff81999e30 T drm_dp_aux_unregister +ffffffff81999e60 T drm_dp_psr_setup_time +ffffffff81999eb0 T drm_dp_start_crc +ffffffff81999f60 T drm_dp_stop_crc +ffffffff81999ff0 T drm_dp_read_desc +ffffffff8199a1b0 T drm_dp_dsc_sink_max_slice_count +ffffffff8199a240 T drm_dp_dsc_sink_line_buf_depth +ffffffff8199a280 T drm_dp_dsc_sink_supported_input_bpcs +ffffffff8199a2f0 T drm_dp_read_lttpr_common_caps +ffffffff8199a3b0 T drm_dp_read_lttpr_phy_caps +ffffffff8199a470 T drm_dp_lttpr_count +ffffffff8199a500 T drm_dp_lttpr_max_link_rate +ffffffff8199a560 T drm_dp_lttpr_max_lane_count +ffffffff8199a590 T drm_dp_lttpr_voltage_swing_level_3_supported +ffffffff8199a5c0 T drm_dp_lttpr_pre_emphasis_level_3_supported +ffffffff8199a5f0 T drm_dp_get_phy_test_pattern +ffffffff8199a710 T drm_dp_set_phy_test_pattern +ffffffff8199a7e0 T drm_dp_vsc_sdp_log +ffffffff8199ab10 T drm_dp_get_pcon_max_frl_bw +ffffffff8199ab60 T drm_dp_pcon_frl_prepare +ffffffff8199abb0 T drm_dp_pcon_is_frl_ready +ffffffff8199ac00 T drm_dp_pcon_frl_configure_1 +ffffffff8199ad00 T drm_dp_pcon_frl_configure_2 +ffffffff8199ad60 T drm_dp_pcon_reset_frl_config +ffffffff8199adb0 T drm_dp_pcon_frl_enable +ffffffff8199ae70 T drm_dp_pcon_hdmi_link_active +ffffffff8199aec0 T drm_dp_pcon_hdmi_link_mode +ffffffff8199af30 T drm_dp_pcon_hdmi_frl_link_error_count +ffffffff8199b030 T drm_dp_pcon_enc_is_dsc_1_2 +ffffffff8199b060 T drm_dp_pcon_dsc_max_slices +ffffffff8199b0f0 T drm_dp_pcon_dsc_max_slice_width +ffffffff8199b120 T drm_dp_pcon_dsc_bpp_incr +ffffffff8199b160 T drm_dp_pcon_pps_default +ffffffff8199b1f0 T drm_dp_pcon_pps_override_buf +ffffffff8199b2a0 T drm_dp_pcon_pps_override_param +ffffffff8199b380 T drm_dp_pcon_convert_rgb_to_ycbcr +ffffffff8199b420 T drm_edp_backlight_set_level +ffffffff8199b500 T drm_edp_backlight_enable +ffffffff8199b710 t drm_edp_backlight_set_enable +ffffffff8199b850 T drm_edp_backlight_disable +ffffffff8199b890 T drm_edp_backlight_init +ffffffff8199bde0 T drm_panel_dp_aux_backlight +ffffffff8199bf70 t __128b132b_channel_eq_delay_us +ffffffff8199bff0 t __8b10b_channel_eq_delay_us +ffffffff8199c070 t drm_dp_aux_get_crc +ffffffff8199c140 t drm_dp_i2c_xfer +ffffffff8199c390 t drm_dp_i2c_functionality +ffffffff8199c3c0 t drm_dp_i2c_do_msg +ffffffff8199c7a0 t lock_bus +ffffffff8199c7c0 t trylock_bus +ffffffff8199c810 t unlock_bus +ffffffff8199c830 t dp_aux_backlight_update_status +ffffffff8199d000 T drm_dp_encode_sideband_req +ffffffff8199d420 T drm_dp_decode_sideband_req +ffffffff8199d970 T drm_dp_dump_sideband_msg_req_body +ffffffff8199dd30 T drm_dp_mst_get_port_malloc +ffffffff8199dd80 T drm_dp_mst_put_port_malloc +ffffffff8199de80 t kref_put +ffffffff8199dec0 T drm_atomic_get_mst_payload_state +ffffffff8199df20 T drm_dp_mst_dpcd_read +ffffffff8199e1e0 T drm_dp_mst_dpcd_write +ffffffff8199e230 t drm_dp_send_dpcd_write +ffffffff8199e470 T drm_dp_mst_connector_late_register +ffffffff8199e4f0 T drm_dp_mst_connector_early_unregister +ffffffff8199e530 T drm_dp_send_power_updown_phy +ffffffff8199e770 t drm_dp_mst_topology_put_port +ffffffff8199e8a0 t drm_dp_mst_wait_tx_reply +ffffffff8199ebf0 T drm_dp_send_query_stream_enc_status +ffffffff8199eeb0 T drm_dp_add_payload_part1 +ffffffff8199f060 T drm_dp_remove_payload +ffffffff8199f200 T drm_dp_add_payload_part2 +ffffffff8199f3c0 T drm_dp_get_vc_payload_bw +ffffffff8199f460 T drm_dp_read_mst_cap +ffffffff8199f4c0 T drm_dp_mst_topology_mgr_set_mst +ffffffff8199f780 t drm_dp_dpcd_write_payload +ffffffff8199f910 t drm_dp_mst_topology_put_mstb +ffffffff8199fa10 T drm_dp_mst_topology_mgr_suspend +ffffffff8199fad0 t drm_dp_mst_topology_mgr_invalidate_mstb +ffffffff8199fb40 T drm_dp_mst_topology_mgr_resume +ffffffff8199fd80 T drm_dp_mst_hpd_irq +ffffffff819a0bf0 T drm_dp_mst_detect_port +ffffffff819a0d70 T drm_dp_mst_get_edid +ffffffff819a0e80 T drm_dp_atomic_find_time_slots +ffffffff819a1150 T drm_atomic_get_mst_topology_state +ffffffff819a1160 T drm_dp_atomic_release_time_slots +ffffffff819a1380 T drm_dp_mst_atomic_setup_commit +ffffffff819a1510 T drm_dp_mst_atomic_wait_for_dependencies +ffffffff819a1690 T drm_dp_mst_root_conn_atomic_check +ffffffff819a17b0 T drm_dp_mst_update_slots +ffffffff819a1810 T drm_dp_check_act_status +ffffffff819a19c0 T drm_dp_calc_pbn_mode +ffffffff819a1a30 T drm_dp_mst_dump_topology +ffffffff819a1c80 t drm_dp_mst_dump_mstb +ffffffff819a1cf0 T drm_dp_mst_add_affected_dsc_crtcs +ffffffff819a1e20 T drm_dp_mst_dsc_aux_for_port +ffffffff819a2050 T drm_dp_mst_atomic_enable_dsc +ffffffff819a21f0 T drm_dp_mst_atomic_check +ffffffff819a24e0 t drm_dp_mst_atomic_check_mstb_bw_limit +ffffffff819a27b0 t drm_dp_mst_duplicate_state +ffffffff819a2980 t drm_dp_mst_destroy_state +ffffffff819a2a40 T drm_atomic_get_old_mst_topology_state +ffffffff819a2a50 T drm_atomic_get_new_mst_topology_state +ffffffff819a2a60 T drm_dp_mst_topology_mgr_init +ffffffff819a2cd0 t drm_dp_mst_link_probe_work +ffffffff819a2f70 t drm_dp_tx_work +ffffffff819a2fc0 t drm_dp_delayed_destroy_work +ffffffff819a33e0 t drm_dp_mst_up_req_work +ffffffff819a38f0 T drm_dp_mst_topology_mgr_destroy +ffffffff819a3980 t drm_dp_mst_is_virtual_dpcd +ffffffff819a3a60 t drm_dp_free_mst_branch_device +ffffffff819a3aa0 t drm_dp_mst_topology_get_port_validated_locked +ffffffff819a3b20 t drm_dp_mst_dump_sideband_msg_tx +ffffffff819a3d30 t process_single_down_tx_qlock +ffffffff819a3ea0 t process_single_tx_qlock +ffffffff819a4380 t drm_dp_msg_data_crc4 +ffffffff819a44a0 t drm_dp_payload_send_msg +ffffffff819a48f0 t drm_dp_mst_topology_get_mstb_validated_locked +ffffffff819a4970 t drm_dp_get_one_sb_msg +ffffffff819a5090 t drm_dp_get_mst_branch_device +ffffffff819a5200 t drm_dp_check_and_send_link_address +ffffffff819a52d0 t drm_dp_send_link_address +ffffffff819a5f80 t drm_dp_send_enum_path_resources +ffffffff819a61e0 t drm_dp_port_set_pdt +ffffffff819a64c0 t drm_dp_mst_port_add_connector +ffffffff819a66a0 t drm_dp_mst_i2c_xfer +ffffffff819a6da0 t drm_dp_mst_i2c_functionality +ffffffff819a6dd0 t get_mst_branch_device_by_guid_helper +ffffffff819a7000 T drm_dsc_dp_pps_header_init +ffffffff819a7030 T drm_dsc_dp_rc_buffer_size +ffffffff819a7090 T drm_dsc_pps_payload_pack +ffffffff819a7330 T drm_dsc_compute_rc_parameters +ffffffff819a8000 T drm_connector_attach_content_protection_property +ffffffff819a8030 T drm_hdcp_check_ksvs_revoked +ffffffff819a8080 T drm_hdcp_update_content_protection +ffffffff819a9000 T drm_hdmi_infoframe_set_hdr_metadata +ffffffff819a9120 T drm_hdmi_avi_infoframe_colorimetry +ffffffff819a9170 T drm_hdmi_avi_infoframe_bars +ffffffff819a91c0 T drm_hdmi_avi_infoframe_content_type +ffffffff819aa000 T drm_scdc_read +ffffffff819aa090 T drm_scdc_write +ffffffff819aa170 T drm_scdc_get_scrambling_status +ffffffff819aa230 T drm_scdc_set_scrambling +ffffffff819aa380 T drm_scdc_set_high_tmds_clock_ratio +ffffffff819ab000 T drm_gem_ttm_mmap +ffffffff819ab070 T drm_gem_ttm_vmap +ffffffff819ab080 T drm_gem_ttm_vunmap +ffffffff819ac000 T ttm_agp_bind +ffffffff819ac050 T ttm_agp_unbind +ffffffff819ac070 T ttm_agp_is_bound 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intel_crt_get_config +ffffffff819faf90 t intel_crt_get_hw_state +ffffffff819fb050 t intel_enable_crt +ffffffff819fb140 t intel_spurious_crt_detect_dmi_callback +ffffffff819fb1a0 t intel_crt_get_modes +ffffffff819fb2b0 t intel_crt_detect +ffffffff819fbda0 t intel_crt_mode_valid +ffffffff819fbe90 t intel_crt_get_edid +ffffffff819fbf30 t intel_crt_detect_ddc +ffffffff819fc000 T intel_first_crtc +ffffffff819fc020 T intel_crtc_for_pipe +ffffffff819fc080 T intel_crtc_wait_for_next_vblank +ffffffff819fc090 T intel_wait_for_vblank_if_active +ffffffff819fc100 T intel_crtc_get_vblank_counter +ffffffff819fc180 T intel_crtc_max_vblank_count +ffffffff819fc220 T intel_crtc_vblank_on +ffffffff819fc300 T intel_crtc_vblank_off +ffffffff819fc3a0 T intel_crtc_state_alloc +ffffffff819fc440 T intel_crtc_state_reset +ffffffff819fc4c0 T intel_crtc_init +ffffffff819fc800 T intel_wait_for_vblank_workers +ffffffff819fc8c0 T intel_usecs_to_scanlines +ffffffff819fc910 T intel_pipe_update_start +ffffffff819fce10 T intel_pipe_update_end +ffffffff819fd110 t intel_crtc_destroy +ffffffff819fd140 t intel_crtc_late_register +ffffffff819fd170 t intel_crtc_vblank_work +ffffffff819fe000 T intel_crtc_state_dump +ffffffff81a00000 T intel_cursor_plane_create +ffffffff81a00200 t i845_cursor_max_stride +ffffffff81a00230 t i845_cursor_update_arm +ffffffff81a00480 t i845_cursor_disable_arm +ffffffff81a004a0 t i845_cursor_get_hw_state +ffffffff81a00540 t i845_check_cursor +ffffffff81a006d0 t i9xx_cursor_max_stride +ffffffff81a00710 t i9xx_cursor_update_arm +ffffffff81a00ad0 t i9xx_cursor_disable_arm +ffffffff81a00af0 t i9xx_cursor_get_hw_state +ffffffff81a00bd0 t i9xx_check_cursor +ffffffff81a00e50 t intel_check_cursor +ffffffff81a01060 t intel_legacy_cursor_update +ffffffff81a01430 t intel_cursor_format_mod_supported +ffffffff81a02000 T hsw_prepare_dp_ddi_buffers +ffffffff81a021b0 T intel_wait_ddi_buf_idle +ffffffff81a023d0 T intel_ddi_set_dp_msa +ffffffff81a025c0 T intel_ddi_enable_transcoder_func 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icl_combo_phy_set_signal_levels +ffffffff81a0a000 t tgl_dkl_phy_set_signal_levels +ffffffff81a0a300 t icl_mg_phy_set_signal_levels +ffffffff81a0ac30 t hsw_set_signal_levels +ffffffff81a0afa0 t intel_ddi_update_prepare +ffffffff81a0b120 t intel_ddi_update_complete +ffffffff81a0b160 t lpt_digital_port_connected +ffffffff81a0b1d0 t bdw_digital_port_connected +ffffffff81a0b240 t hsw_digital_port_connected +ffffffff81a0b2b0 t intel_ddi_encoder_reset +ffffffff81a0b2f0 t intel_ddi_encoder_destroy +ffffffff81a0b3a0 t icl_program_mg_dp_mode +ffffffff81a0b630 t intel_ddi_init_dp_buf_reg +ffffffff81a0b7f0 t intel_disable_ddi_buf +ffffffff81a0bb10 t intel_ddi_prepare_link_retrain +ffffffff81a0c180 t intel_ddi_set_link_train +ffffffff81a0c2e0 t intel_ddi_set_idle_link_train +ffffffff81a0c500 t intel_ddi_dp_voltage_max +ffffffff81a0c5c0 t intel_ddi_dp_preemph_max +ffffffff81a0d000 T is_hobl_buf_trans +ffffffff81a0d040 T intel_ddi_buf_trans_init +ffffffff81a0d300 t dg2_get_snps_buf_trans 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i9xx_set_pipeconf +ffffffff81a11e40 T ilk_set_pipeconf +ffffffff81a12020 T bdw_get_pipemisc_bpp +ffffffff81a12110 T ilk_get_lanes_required +ffffffff81a12170 T intel_get_m_n +ffffffff81a12280 T intel_cpu_transcoder_get_m1_n1 +ffffffff81a12420 T intel_cpu_transcoder_get_m2_n2 +ffffffff81a12590 T intel_crtc_get_pipe_config +ffffffff81a12600 T intel_get_load_detect_pipe +ffffffff81a12a20 T intel_release_load_detect_pipe +ffffffff81a12af0 T i9xx_crtc_clock_get +ffffffff81a12d80 T intel_dotclock_calculate +ffffffff81a12de0 T intel_crtc_dotclock +ffffffff81a12eb0 T intel_encoder_current_mode +ffffffff81a13060 T intel_fuzzy_clock_check +ffffffff81a130b0 T intel_pipe_config_compare +ffffffff81a15ba0 t pipe_config_mismatch +ffffffff81a15c90 t pipe_config_infoframe_mismatch +ffffffff81a15e40 T intel_modeset_all_pipes +ffffffff81a15fe0 T intel_atomic_add_affected_planes +ffffffff81a160b0 T intel_crtc_update_active_timings +ffffffff81a161b0 T intel_calc_active_pipes +ffffffff81a16240 T intel_crtc_arm_fifo_underrun +ffffffff81a162e0 T intel_plane_destroy +ffffffff81a16310 T intel_get_pipe_from_crtc_id_ioctl +ffffffff81a16380 T intel_mode_valid_max_plane_size +ffffffff81a16400 T intel_init_display_hooks +ffffffff81a164e0 T intel_modeset_init_noirq +ffffffff81a167a0 t intel_atomic_helper_free_state_worker +ffffffff81a16810 T intel_modeset_init_nogem +ffffffff81a17940 T intel_modeset_init +ffffffff81a17b60 T i830_enable_pipe +ffffffff81a18190 T i830_disable_pipe +ffffffff81a184c0 T intel_display_resume +ffffffff81a18600 T intel_modeset_driver_remove +ffffffff81a186b0 T intel_modeset_driver_remove_noirq +ffffffff81a18820 T intel_modeset_driver_remove_nogem +ffffffff81a18860 T intel_modeset_probe_defer +ffffffff81a18890 T intel_display_driver_register +ffffffff81a188f0 T intel_display_driver_unregister +ffffffff81a18970 T intel_scanout_needs_vtd_wa +ffffffff81a189b0 t wait_for_pipe_scanline_moving +ffffffff81a18c10 t hsw_get_pipe_config +ffffffff81a199f0 t hsw_crtc_enable +ffffffff81a1a420 t hsw_crtc_disable +ffffffff81a1a5d0 t skl_commit_modeset_enables +ffffffff81a1ab90 t intel_get_transcoder_timings +ffffffff81a1ae60 t ilk_get_pfit_config +ffffffff81a1afe0 t enabled_bigjoiner_pipes +ffffffff81a1b1f0 t bdw_set_pipemisc +ffffffff81a1b330 t ilk_pfit_enable +ffffffff81a1b440 t intel_set_transcoder_timings +ffffffff81a1b800 t intel_update_crtc +ffffffff81a1be20 t intel_pre_plane_update +ffffffff81a1c330 t intel_commit_modeset_enables +ffffffff81a1c450 t ilk_get_pipe_config +ffffffff81a1c7a0 t ilk_crtc_enable +ffffffff81a1ce50 t ilk_crtc_disable +ffffffff81a1d0e0 t i9xx_get_pipe_config +ffffffff81a1da10 t valleyview_crtc_enable +ffffffff81a1de20 t i9xx_crtc_disable +ffffffff81a1e1b0 t i9xx_pfit_enable +ffffffff81a1e310 t i9xx_crtc_enable +ffffffff81a1e690 t intel_mode_valid +ffffffff81a1e840 t intel_atomic_check +ffffffff81a21b50 t intel_atomic_commit +ffffffff81a21ec0 t copy_bigjoiner_crtc_state_nomodeset +ffffffff81a21fc0 t intel_crtc_copy_uapi_to_hw_state_modeset +ffffffff81a22120 t intel_atomic_commit_ready +ffffffff81a221c0 t intel_atomic_commit_work +ffffffff81a221e0 t intel_atomic_commit_tail +ffffffff81a235c0 t intel_atomic_cleanup_work +ffffffff81a24000 T intel_display_power_domain_str +ffffffff81a24060 T __intel_display_power_is_enabled +ffffffff81a24130 T intel_display_power_is_enabled +ffffffff81a24240 T intel_display_power_set_target_dc_state +ffffffff81a24360 T intel_display_power_get +ffffffff81a243e0 t __intel_display_power_get_domain +ffffffff81a245c0 T intel_display_power_get_if_enabled +ffffffff81a246f0 T __intel_display_power_put_async +ffffffff81a248c0 t __intel_display_power_put_domain +ffffffff81a24a40 T intel_display_power_flush_work +ffffffff81a24b60 t release_async_put_domains +ffffffff81a24c40 T intel_display_power_put_unchecked +ffffffff81a24ca0 T intel_display_power_get_in_set +ffffffff81a24d80 T intel_display_power_get_in_set_if_enabled +ffffffff81a24e30 T intel_display_power_put_mask_in_set +ffffffff81a24f00 T intel_power_domains_init +ffffffff81a25150 t intel_display_power_put_async_work +ffffffff81a253c0 T intel_power_domains_cleanup +ffffffff81a253e0 T gen9_dbuf_slices_update +ffffffff81a25600 T intel_power_domains_init_hw +ffffffff81a25da0 t icl_display_core_init +ffffffff81a26690 t bxt_display_core_init +ffffffff81a267c0 T intel_power_domains_driver_remove +ffffffff81a268b0 T intel_power_domains_sanitize_state +ffffffff81a269a0 T intel_power_domains_enable +ffffffff81a26a00 T intel_power_domains_disable +ffffffff81a26ab0 T intel_power_domains_suspend +ffffffff81a26c40 t icl_display_core_uninit +ffffffff81a26ce0 t bxt_display_core_uninit +ffffffff81a26d90 T intel_power_domains_resume +ffffffff81a26e60 T intel_display_power_suspend_late +ffffffff81a26f50 t hsw_enable_pc8 +ffffffff81a278f0 T intel_display_power_resume_early +ffffffff81a279e0 t hsw_disable_pc8 +ffffffff81a27e60 T intel_display_power_suspend +ffffffff81a27ee0 T intel_display_power_resume +ffffffff81a27fc0 T intel_display_power_debug +ffffffff81a28090 T intel_display_power_ddi_io_domain +ffffffff81a28170 T intel_display_power_ddi_lanes_domain +ffffffff81a28250 T intel_display_power_legacy_aux_domain +ffffffff81a28360 T intel_display_power_tbt_aux_domain +ffffffff81a28470 t __delayed_work_tick +ffffffff81a29000 T intel_display_power_map_init +ffffffff81a29170 t __set_power_wells +ffffffff81a29550 T intel_display_power_map_cleanup +ffffffff81a2a000 T lookup_power_well +ffffffff81a2a0c0 T intel_power_well_enable +ffffffff81a2a150 T intel_power_well_name +ffffffff81a2a190 T intel_power_well_disable +ffffffff81a2a200 T intel_power_well_sync_hw +ffffffff81a2a270 T intel_power_well_get +ffffffff81a2a310 T intel_power_well_put +ffffffff81a2a410 T intel_power_well_is_enabled +ffffffff81a2a430 T intel_power_well_is_enabled_cached +ffffffff81a2a460 T intel_display_power_well_is_enabled +ffffffff81a2a520 T intel_power_well_is_always_on +ffffffff81a2a560 T intel_power_well_domains +ffffffff81a2a590 T intel_power_well_refcount +ffffffff81a2a5c0 T gen9_sanitize_dc_state +ffffffff81a2a6a0 T gen9_set_dc_state +ffffffff81a2aa00 T gen9_enable_dc5 +ffffffff81a2ac60 T skl_enable_dc6 +ffffffff81a2adb0 T bxt_enable_dc9 +ffffffff81a2af60 T bxt_disable_dc9 +ffffffff81a2b050 T gen9_disable_dc_states +ffffffff81a2b420 T chv_phy_powergate_ch +ffffffff81a2b530 t assert_chv_phy_status +ffffffff81a2b8d0 T chv_phy_powergate_lanes +ffffffff81a2bb90 t i9xx_power_well_sync_hw_noop +ffffffff81a2bbc0 t i9xx_always_on_power_well_noop +ffffffff81a2bbf0 t i9xx_always_on_power_well_enabled +ffffffff81a2bc20 t chv_pipe_power_well_sync_hw +ffffffff81a2bc50 t chv_pipe_power_well_enable +ffffffff81a2bc80 t chv_pipe_power_well_disable +ffffffff81a2bce0 t chv_pipe_power_well_enabled +ffffffff81a2bde0 t chv_dpio_cmn_power_well_enable +ffffffff81a2bff0 t chv_dpio_cmn_power_well_disable +ffffffff81a2c120 t vlv_power_well_enabled +ffffffff81a2c230 t i830_pipes_power_well_sync_hw +ffffffff81a2c320 t i830_pipes_power_well_enable +ffffffff81a2c3e0 t i830_pipes_power_well_disable +ffffffff81a2c410 t i830_pipes_power_well_enabled +ffffffff81a2c4b0 t hsw_power_well_sync_hw +ffffffff81a2c5a0 t hsw_power_well_enable +ffffffff81a2c820 t hsw_power_well_disable +ffffffff81a2c8d0 t hsw_power_well_enabled +ffffffff81a2c9b0 t gen9_dc_off_power_well_enable +ffffffff81a2c9c0 t gen9_dc_off_power_well_disable +ffffffff81a2ca60 t gen9_dc_off_power_well_enabled +ffffffff81a2caf0 t bxt_dpio_cmn_power_well_enable +ffffffff81a2cb20 t bxt_dpio_cmn_power_well_disable +ffffffff81a2cb50 t bxt_dpio_cmn_power_well_enabled +ffffffff81a2cb80 t vlv_display_power_well_enable +ffffffff81a2cbb0 t vlv_display_power_well_disable +ffffffff81a2cc20 t vlv_dpio_cmn_power_well_enable +ffffffff81a2cca0 t vlv_dpio_cmn_power_well_disable +ffffffff81a2cda0 t vlv_power_well_enable +ffffffff81a2cdc0 t vlv_power_well_disable +ffffffff81a2cde0 t icl_aux_power_well_enable +ffffffff81a2d460 t icl_aux_power_well_disable +ffffffff81a2d700 t tgl_tc_cold_off_power_well_sync_hw +ffffffff81a2d720 t tgl_tc_cold_off_power_well_enable +ffffffff81a2d740 t tgl_tc_cold_off_power_well_disable +ffffffff81a2d760 t tgl_tc_cold_off_power_well_is_enabled +ffffffff81a2d790 t xelpdp_aux_power_well_enable +ffffffff81a2d870 t xelpdp_aux_power_well_disable +ffffffff81a2d950 t xelpdp_aux_power_well_enabled +ffffffff81a2da00 t chv_set_pipe_power_well +ffffffff81a2dc00 t vlv_display_power_well_init +ffffffff81a2de90 t vlv_set_power_well +ffffffff81a2e0a0 t hsw_wait_for_power_well_enable +ffffffff81a2e1e0 t hsw_wait_for_power_well_disable +ffffffff81a2e470 t tgl_tc_cold_request +ffffffff81a2f000 T intel_dkl_phy_read +ffffffff81a2f100 T intel_dkl_phy_write +ffffffff81a2f1f0 T intel_dkl_phy_rmw +ffffffff81a2f310 T intel_dkl_phy_posting_read +ffffffff81a30000 T intel_dmc_has_payload +ffffffff81a30040 T intel_dmc_load_program +ffffffff81a30820 t pipedmc_clock_gating_wa +ffffffff81a30a10 T intel_dmc_disable_program +ffffffff81a30c30 T assert_dmc_loaded +ffffffff81a30d80 T intel_dmc_ucode_init +ffffffff81a31050 t dmc_load_work_fn +ffffffff81a318b0 T intel_dmc_ucode_suspend +ffffffff81a31920 T intel_dmc_ucode_resume +ffffffff81a319c0 T intel_dmc_ucode_fini +ffffffff81a31af0 T intel_dmc_print_error_state +ffffffff81a31ba0 T intel_dmc_debugfs_register +ffffffff81a32000 T intel_dp_is_edp +ffffffff81a32030 T intel_dp_is_uhbr +ffffffff81a32070 T intel_dp_max_lane_count +ffffffff81a320e0 T intel_dp_link_required +ffffffff81a32120 T intel_dp_max_data_rate +ffffffff81a32190 T intel_dp_can_bigjoiner +ffffffff81a321e0 T intel_dp_get_link_train_fallback_values +ffffffff81a325c0 T intel_dp_mode_to_fec_clock +ffffffff81a32610 T intel_dp_min_bpp +ffffffff81a32650 T intel_dp_source_supports_tps3 +ffffffff81a326a0 T intel_dp_source_supports_tps4 +ffffffff81a326d0 T intel_dp_max_link_rate +ffffffff81a32790 T intel_dp_rate_select +ffffffff81a32830 T intel_dp_compute_rate +ffffffff81a32900 T intel_dp_adjust_compliance_config +ffffffff81a32a40 T intel_dp_limited_color_range +ffffffff81a32ab0 T intel_dp_compute_psr_vsc_sdp +ffffffff81a32b30 T intel_dp_needs_vsc_sdp +ffffffff81a32b80 t intel_dp_compute_vsc_colorimetry +ffffffff81a32d00 T intel_dp_compute_config +ffffffff81a33390 t intel_dp_compute_output_format +ffffffff81a335c0 T intel_dp_set_link_params +ffffffff81a33600 T intel_edp_backlight_on +ffffffff81a336b0 T intel_edp_backlight_off +ffffffff81a33760 T intel_dp_sink_set_decompression_state +ffffffff81a33800 T intel_dp_wait_source_oui +ffffffff81a338d0 T intel_dp_set_power +ffffffff81a33ae0 T intel_dp_sync_state +ffffffff81a33b60 t intel_dp_get_dpcd +ffffffff81a33cc0 t intel_dp_reset_max_link_params +ffffffff81a33dd0 T intel_dp_initial_fastset_check +ffffffff81a33ed0 T intel_dp_check_frl_training +ffffffff81a34460 T intel_dp_pcon_dsc_configure +ffffffff81a34630 T intel_dp_configure_protocol_converter +ffffffff81a347a0 T intel_dp_get_colorimetry_status +ffffffff81a34800 T intel_edp_fixup_vbt_bpp +ffffffff81a348a0 T intel_write_dp_vsc_sdp +ffffffff81a34a30 T intel_dp_set_infoframes +ffffffff81a34b60 t intel_write_dp_sdp +ffffffff81a34e50 T intel_read_dp_sdp +ffffffff81a35180 T intel_dp_retrain_link +ffffffff81a35840 T intel_dp_phy_test +ffffffff81a35f20 T intel_digital_port_connected +ffffffff81a35fc0 T intel_dp_encoder_flush_work +ffffffff81a36010 T intel_dp_encoder_suspend +ffffffff81a36050 T intel_dp_encoder_shutdown +ffffffff81a36090 T intel_dp_hpd_pulse +ffffffff81a367e0 T intel_dp_is_port_edp +ffffffff81a36830 T intel_dp_init_connector +ffffffff81a37990 t intel_dp_modeset_retry_work_fn +ffffffff81a37a10 t intel_dp_set_common_rates +ffffffff81a37bb0 T intel_dp_mst_suspend +ffffffff81a37c50 T intel_dp_mst_resume +ffffffff81a37d00 t intel_dp_compute_link_config +ffffffff81a38a20 t intel_dp_dsc_get_slice_count +ffffffff81a38b90 t intel_dp_set_sink_rates +ffffffff81a38dc0 t intel_dp_check_device_service_irq +ffffffff81a39390 t intel_dp_force +ffffffff81a394d0 t intel_dp_connector_register +ffffffff81a395b0 t intel_dp_connector_unregister +ffffffff81a39610 t intel_dp_oob_hotplug_event +ffffffff81a39690 t intel_dp_set_edid +ffffffff81a39ac0 t intel_dp_get_modes +ffffffff81a39bc0 t intel_dp_detect +ffffffff81a3a4b0 t intel_dp_mode_valid +ffffffff81a3ac40 t intel_dp_connector_atomic_check +ffffffff81a3af80 t intel_dp_get_dsc_sink_cap +ffffffff81a3c000 T intel_dp_aux_fini +ffffffff81a3c020 T intel_dp_aux_init +ffffffff81a3c200 t xelpdp_aux_ctl_reg +ffffffff81a3c2c0 t xelpdp_aux_data_reg +ffffffff81a3c390 t tgl_aux_ctl_reg +ffffffff81a3c410 t tgl_aux_data_reg +ffffffff81a3c4a0 t skl_aux_ctl_reg +ffffffff81a3c520 t skl_aux_data_reg +ffffffff81a3c5b0 t ilk_aux_ctl_reg +ffffffff81a3c630 t ilk_aux_data_reg +ffffffff81a3c6c0 t g4x_aux_ctl_reg +ffffffff81a3c740 t g4x_aux_data_reg +ffffffff81a3c7d0 t skl_get_aux_clock_divider +ffffffff81a3c800 t hsw_get_aux_clock_divider +ffffffff81a3c8a0 t ilk_get_aux_clock_divider +ffffffff81a3c900 t g4x_get_aux_clock_divider +ffffffff81a3c950 t skl_get_aux_send_ctl +ffffffff81a3c9d0 t g4x_get_aux_send_ctl +ffffffff81a3ca20 t kasprintf +ffffffff81a3caf0 t intel_dp_aux_transfer +ffffffff81a3cd40 t intel_dp_aux_xfer +ffffffff81a3e000 T intel_dp_aux_init_backlight_funcs +ffffffff81a3e270 t intel_dp_aux_hdr_setup_backlight +ffffffff81a3e3c0 t intel_dp_aux_hdr_get_backlight +ffffffff81a3e530 t intel_dp_aux_hdr_set_backlight +ffffffff81a3e620 t intel_dp_aux_hdr_disable_backlight +ffffffff81a3e6a0 t intel_dp_aux_hdr_enable_backlight +ffffffff81a3e8f0 t intel_dp_aux_vesa_setup_backlight +ffffffff81a3eab0 t intel_dp_aux_vesa_get_backlight +ffffffff81a3eae0 t intel_dp_aux_vesa_set_backlight +ffffffff81a3eb80 t intel_dp_aux_vesa_disable_backlight +ffffffff81a3ec30 t intel_dp_aux_vesa_enable_backlight +ffffffff81a3f000 T intel_dp_hdcp_init +ffffffff81a3f0b0 t intel_dp_hdcp_write_an_aksv +ffffffff81a3f1a0 t intel_dp_hdcp_read_bksv +ffffffff81a3f230 t intel_dp_hdcp_read_bstatus +ffffffff81a3f2c0 t intel_dp_hdcp_repeater_present +ffffffff81a3f370 t intel_dp_hdcp_read_ri_prime +ffffffff81a3f400 t intel_dp_hdcp_read_ksv_ready +ffffffff81a3f4a0 t intel_dp_hdcp_read_ksv_fifo +ffffffff81a3f590 t intel_dp_hdcp_read_v_prime_part +ffffffff81a3f630 t intel_dp_hdcp_toggle_signalling +ffffffff81a3f660 t intel_dp_mst_hdcp_stream_encryption +ffffffff81a3f870 t intel_dp_hdcp_check_link +ffffffff81a3f900 t intel_dp_hdcp_capable +ffffffff81a3f9b0 t intel_dp_hdcp2_capable +ffffffff81a3fa30 t intel_dp_hdcp2_write_msg +ffffffff81a3faf0 t intel_dp_hdcp2_read_msg +ffffffff81a401c0 t intel_dp_hdcp2_config_stream_type +ffffffff81a40270 t intel_dp_mst_hdcp2_stream_encryption +ffffffff81a40500 t intel_dp_mst_hdcp2_check_link +ffffffff81a405c0 t get_hdcp2_dp_msg_data +ffffffff81a40700 t intel_dp_hdcp2_check_link +ffffffff81a41000 T intel_dp_init_lttpr_and_dprx_caps +ffffffff81a412c0 T intel_dp_get_adjust_train +ffffffff81a41980 T intel_dp_program_link_training_pattern +ffffffff81a41a80 T intel_dp_set_signal_levels +ffffffff81a41de0 T intel_dp_dump_link_status +ffffffff81a41eb0 T intel_dp_stop_link_train +ffffffff81a420e0 T intel_dp_start_link_train +ffffffff81a43220 t intel_dp_link_train_phy +ffffffff81a45000 T intel_dp_mst_encoder_active_links +ffffffff81a45030 T intel_dp_mst_encoder_init +ffffffff81a45270 T intel_dp_mst_source_support +ffffffff81a452b0 T intel_dp_mst_encoder_cleanup +ffffffff81a45310 T intel_dp_mst_is_master_trans +ffffffff81a45350 T intel_dp_mst_is_slave_trans +ffffffff81a45390 T intel_dp_mst_add_topology_state_for_crtc +ffffffff81a45460 t intel_dp_add_mst_connector +ffffffff81a45670 t intel_dp_mst_poll_hpd_irq +ffffffff81a45690 t intel_dp_mst_get_hw_state +ffffffff81a456f0 t intel_dp_mst_connector_late_register +ffffffff81a45760 t intel_dp_mst_connector_early_unregister +ffffffff81a45790 t intel_dp_mst_get_modes +ffffffff81a45830 t intel_dp_mst_detect +ffffffff81a45930 t intel_dp_mst_mode_valid_ctx +ffffffff81a45a90 t intel_mst_atomic_best_encoder +ffffffff81a45af0 t intel_dp_mst_atomic_check +ffffffff81a45c70 t intel_dp_mst_compute_config +ffffffff81a45f80 t intel_dp_mst_compute_config_late +ffffffff81a46080 t intel_mst_disable_dp +ffffffff81a46170 t intel_mst_post_disable_dp +ffffffff81a46430 t intel_mst_pre_pll_enable_dp +ffffffff81a46480 t intel_mst_pre_enable_dp +ffffffff81a466a0 t intel_mst_enable_dp +ffffffff81a46a90 t intel_dp_mst_enc_get_hw_state +ffffffff81a46ad0 t intel_dp_mst_enc_get_config +ffffffff81a46af0 t intel_dp_mst_initial_fastset_check +ffffffff81a46b10 t intel_dp_mst_encoder_destroy +ffffffff81a47000 T bxt_port_to_phy_channel +ffffffff81a47130 T bxt_ddi_phy_set_signal_levels +ffffffff81a47650 T bxt_ddi_phy_is_enabled +ffffffff81a477a0 T bxt_ddi_phy_uninit +ffffffff81a478a0 T bxt_ddi_phy_init +ffffffff81a47ad0 t _bxt_ddi_phy_init +ffffffff81a480f0 T bxt_ddi_phy_verify_state +ffffffff81a48430 t __phy_reg_verify_state +ffffffff81a48530 T bxt_ddi_phy_calc_lane_lat_optim_mask +ffffffff81a485a0 T bxt_ddi_phy_set_lane_optim_mask +ffffffff81a488d0 T bxt_ddi_phy_get_lane_lat_optim_mask +ffffffff81a48b20 T chv_set_phy_signal_level +ffffffff81a48e80 T chv_data_lane_soft_reset +ffffffff81a49060 T chv_phy_pre_pll_enable +ffffffff81a49300 T chv_phy_pre_encoder_enable +ffffffff81a49590 T chv_phy_release_cl2_override +ffffffff81a49620 T chv_phy_post_pll_disable +ffffffff81a496d0 T vlv_set_phy_signal_level +ffffffff81a49850 T vlv_phy_pre_pll_enable +ffffffff81a49970 T vlv_phy_pre_encoder_enable +ffffffff81a49a90 T vlv_phy_reset_lanes +ffffffff81a4a000 T pnv_calc_dpll_params +ffffffff81a4a0c0 T i9xx_calc_dpll_params +ffffffff81a4a190 T vlv_calc_dpll_params +ffffffff81a4a250 T chv_calc_dpll_params +ffffffff81a4a320 T bxt_find_best_dpll +ffffffff81a4a340 t chv_find_best_dpll +ffffffff81a4a680 T i9xx_dpll_compute_fp +ffffffff81a4a6c0 T vlv_compute_dpll +ffffffff81a4a740 T chv_compute_dpll +ffffffff81a4a7c0 T intel_dpll_crtc_compute_clock +ffffffff81a4a8c0 T intel_dpll_crtc_get_shared_dpll +ffffffff81a4aa10 T intel_dpll_init_clock_hook +ffffffff81a4ab00 T i9xx_enable_pll +ffffffff81a4aeb0 T vlv_enable_pll +ffffffff81a4b410 T chv_enable_pll +ffffffff81a4ba90 T vlv_force_pll_on +ffffffff81a4bbe0 T vlv_disable_pll +ffffffff81a4bca0 T chv_disable_pll +ffffffff81a4bdd0 T i9xx_disable_pll +ffffffff81a4bed0 T vlv_force_pll_off +ffffffff81a4bfc0 T assert_pll_enabled +ffffffff81a4c0a0 T assert_pll_disabled +ffffffff81a4c180 t intel_pll_is_valid +ffffffff81a4c250 t dg2_crtc_compute_clock +ffffffff81a4c2d0 t hsw_crtc_compute_clock +ffffffff81a4c390 t hsw_crtc_get_shared_dpll +ffffffff81a4c430 t ilk_crtc_compute_clock +ffffffff81a4c730 t ilk_crtc_get_shared_dpll +ffffffff81a4c780 t g4x_find_best_dpll +ffffffff81a4cac0 t chv_crtc_compute_clock +ffffffff81a4cbd0 t vlv_crtc_compute_clock +ffffffff81a4d090 t g4x_crtc_compute_clock +ffffffff81a4d1e0 t i9xx_compute_dpll +ffffffff81a4d460 t pnv_crtc_compute_clock +ffffffff81a4d820 t i9xx_crtc_compute_clock +ffffffff81a4d940 t i9xx_find_best_dpll +ffffffff81a4dc70 t i8xx_crtc_compute_clock +ffffffff81a4e000 T intel_get_shared_dpll_by_id +ffffffff81a4e040 T intel_get_shared_dpll_id +ffffffff81a4e0d0 T assert_shared_dpll +ffffffff81a4e1f0 T intel_dpll_get_hw_state +ffffffff81a4e220 T icl_tc_port_to_pll_id +ffffffff81a4e250 T intel_enable_shared_dpll +ffffffff81a4e540 T intel_disable_shared_dpll +ffffffff81a4e780 T intel_shared_dpll_swap_state +ffffffff81a4e860 T icl_set_active_port_dpll +ffffffff81a4e8a0 T intel_shared_dpll_init +ffffffff81a4eab0 T intel_compute_shared_dplls +ffffffff81a4eb40 T intel_reserve_shared_dplls +ffffffff81a4ebd0 T intel_release_shared_dplls +ffffffff81a4ec10 T intel_update_active_dpll +ffffffff81a4ec70 T intel_dpll_get_freq +ffffffff81a4ed00 T intel_dpll_update_ref_clks +ffffffff81a4ed50 T intel_dpll_readout_hw_state +ffffffff81a4eed0 T intel_dpll_sanitize_state +ffffffff81a4efb0 T intel_dpll_dump_hw_state +ffffffff81a4f030 T intel_shared_dpll_state_verify +ffffffff81a4f150 t verify_single_dpll_state +ffffffff81a4f470 T intel_shared_dpll_verify_disabled +ffffffff81a4f4f0 t icl_compute_dplls +ffffffff81a502d0 t icl_get_dplls +ffffffff81a50a50 t icl_put_dplls +ffffffff81a50b10 t icl_update_active_dpll +ffffffff81a50bc0 t icl_update_dpll_ref_clks +ffffffff81a50c00 t icl_dump_hw_state +ffffffff81a50cc0 t combo_pll_enable +ffffffff81a50ef0 t combo_pll_disable +ffffffff81a50fe0 t combo_pll_get_hw_state +ffffffff81a51070 t icl_ddi_combo_pll_get_freq +ffffffff81a51240 t icl_dpll_write +ffffffff81a514e0 t adlp_cmtg_clock_gating_wa +ffffffff81a51640 t icl_pll_disable +ffffffff81a517e0 t icl_pll_get_hw_state +ffffffff81a51b20 t tbt_pll_enable +ffffffff81a51ce0 t tbt_pll_disable +ffffffff81a51d00 t tbt_pll_get_hw_state +ffffffff81a51d20 t icl_ddi_tbt_pll_get_freq +ffffffff81a51d90 t mg_pll_enable +ffffffff81a52340 t mg_pll_disable +ffffffff81a52380 t dkl_pll_get_hw_state +ffffffff81a52550 t icl_ddi_mg_pll_get_freq +ffffffff81a52630 t intel_find_shared_dpll +ffffffff81a52960 t intel_unreference_shared_dpll +ffffffff81a52ac0 t mg_pll_get_hw_state +ffffffff81a52d10 t bxt_compute_dpll +ffffffff81a53030 t bxt_get_dpll +ffffffff81a53290 t intel_put_dpll +ffffffff81a532f0 t bxt_update_dpll_ref_clks +ffffffff81a53330 t bxt_dump_hw_state +ffffffff81a533e0 t bxt_ddi_pll_enable +ffffffff81a53ef0 t bxt_ddi_pll_disable +ffffffff81a54100 t bxt_ddi_pll_get_hw_state +ffffffff81a54590 t bxt_ddi_pll_get_freq +ffffffff81a54620 t bxt_ddi_set_dpll_hw_state +ffffffff81a547e0 t skl_compute_dpll +ffffffff81a54f60 t skl_get_dpll +ffffffff81a55190 t skl_update_dpll_ref_clks +ffffffff81a551d0 t skl_dump_hw_state +ffffffff81a55230 t skl_ddi_dpll0_enable +ffffffff81a552f0 t skl_ddi_dpll0_disable +ffffffff81a55320 t skl_ddi_dpll0_get_hw_state +ffffffff81a55420 t skl_ddi_pll_get_freq +ffffffff81a554b0 t skl_ddi_wrpll_get_freq +ffffffff81a55610 t skl_ddi_pll_enable +ffffffff81a55830 t skl_ddi_pll_disable +ffffffff81a558c0 t skl_ddi_pll_get_hw_state +ffffffff81a559e0 t hsw_compute_dpll +ffffffff81a56230 t hsw_get_dpll +ffffffff81a564f0 t hsw_update_dpll_ref_clks +ffffffff81a56560 t hsw_dump_hw_state +ffffffff81a56590 t hsw_ddi_wrpll_enable +ffffffff81a56610 t hsw_ddi_wrpll_disable +ffffffff81a566f0 t hsw_ddi_wrpll_get_hw_state +ffffffff81a56790 t hsw_ddi_wrpll_get_freq +ffffffff81a56880 t hsw_ddi_spll_enable +ffffffff81a568e0 t hsw_ddi_spll_disable +ffffffff81a569b0 t hsw_ddi_spll_get_hw_state +ffffffff81a56a40 t hsw_ddi_spll_get_freq +ffffffff81a56ae0 t hsw_ddi_lcpll_enable +ffffffff81a56b10 t hsw_ddi_lcpll_disable +ffffffff81a56b40 t hsw_ddi_lcpll_get_hw_state +ffffffff81a56b70 t hsw_ddi_lcpll_get_freq +ffffffff81a56bf0 t ibx_compute_dpll +ffffffff81a56c20 t ibx_get_dpll +ffffffff81a56ea0 t ibx_dump_hw_state +ffffffff81a56f00 t ibx_pch_dpll_enable +ffffffff81a570b0 t ibx_pch_dpll_disable +ffffffff81a57130 t ibx_pch_dpll_get_hw_state +ffffffff81a58000 T intel_dpt_pin +ffffffff81a581d0 T intel_dpt_unpin +ffffffff81a58240 T intel_dpt_resume +ffffffff81a58310 T intel_dpt_suspend +ffffffff81a583e0 T intel_dpt_create +ffffffff81a58710 t dpt_insert_page +ffffffff81a58780 t dpt_clear_range +ffffffff81a587b0 t dpt_insert_entries +ffffffff81a588b0 t dpt_cleanup +ffffffff81a58900 t dpt_bind_vma +ffffffff81a58990 t dpt_unbind_vma +ffffffff81a589c0 T intel_dpt_destroy +ffffffff81a58a10 t __ww_mutex_lock +ffffffff81a59000 T intel_drrs_type_str +ffffffff81a59040 T intel_drrs_is_active +ffffffff81a59070 T intel_drrs_activate +ffffffff81a59270 T intel_drrs_deactivate +ffffffff81a59350 t intel_drrs_set_state +ffffffff81a594a0 T intel_drrs_invalidate +ffffffff81a594c0 t intel_drrs_frontbuffer_update +ffffffff81a59620 T intel_drrs_flush +ffffffff81a59640 T intel_crtc_drrs_init +ffffffff81a596e0 t intel_drrs_downclock_work +ffffffff81a59740 t __delayed_work_tick +ffffffff81a5a000 T intel_dsb_indexed_reg_write +ffffffff81a5a140 T intel_dsb_reg_write +ffffffff81a5a230 T intel_dsb_commit +ffffffff81a5a680 T intel_dsb_prepare +ffffffff81a5a810 T intel_dsb_cleanup +ffffffff81a5b000 T intel_dsi_bitrate +ffffffff81a5b0a0 T intel_dsi_tlpx_ns +ffffffff81a5b0f0 T intel_dsi_get_modes +ffffffff81a5b100 T intel_dsi_mode_valid +ffffffff81a5b1c0 T intel_dsi_host_init +ffffffff81a5b270 T intel_dsi_get_panel_orientation +ffffffff81a5c000 T intel_dsi_dcs_init_backlight_funcs +ffffffff81a5c0a0 t dcs_setup_backlight +ffffffff81a5c100 t dcs_get_backlight +ffffffff81a5c200 t dcs_set_backlight +ffffffff81a5c2f0 t dcs_disable_backlight +ffffffff81a5c670 t dcs_enable_backlight +ffffffff81a5d000 T intel_dsi_vbt_exec_sequence +ffffffff81a5d020 T intel_dsi_msleep +ffffffff81a5d090 T intel_dsi_log_params +ffffffff81a5d410 T intel_dsi_vbt_init +ffffffff81a5d8a0 T intel_dsi_vbt_gpio_init +ffffffff81a5d8c0 T intel_dsi_vbt_gpio_cleanup +ffffffff81a5e000 T intel_dvo_init +ffffffff81a5e4f0 t intel_disable_dvo +ffffffff81a5e5a0 t intel_enable_dvo +ffffffff81a5e690 t intel_dvo_get_hw_state +ffffffff81a5e700 t intel_dvo_get_config +ffffffff81a5e7b0 t intel_dvo_compute_config +ffffffff81a5e840 t intel_dvo_pre_enable +ffffffff81a5e930 t intel_dvo_connector_get_hw_state +ffffffff81a5e9b0 t intel_dvo_enc_destroy +ffffffff81a5e9f0 t intel_dvo_detect +ffffffff81a5eaf0 t intel_dvo_get_modes +ffffffff81a5eb60 t intel_dvo_mode_valid +ffffffff81a5f000 T intel_fb_get_format_info +ffffffff81a5f240 T intel_fb_is_ccs_modifier +ffffffff81a5f410 T intel_fb_is_rc_ccs_cc_modifier +ffffffff81a5f5e0 T intel_fb_is_mc_ccs_modifier +ffffffff81a5f7b0 T intel_fb_plane_get_modifiers +ffffffff81a5f8f0 T intel_fb_plane_supports_modifier +ffffffff81a5f960 T intel_format_info_is_yuv_semiplanar +ffffffff81a5fc00 T intel_fb_is_ccs_aux_plane +ffffffff81a5fe40 T intel_fb_rc_ccs_cc_plane +ffffffff81a600a0 T is_surface_linear +ffffffff81a603d0 T main_to_ccs_plane +ffffffff81a606b0 T skl_ccs_to_main_plane +ffffffff81a609a0 T skl_main_to_aux_plane +ffffffff81a60c00 T intel_tile_size +ffffffff81a60c40 T intel_tile_width_bytes +ffffffff81a60e90 T intel_tile_height +ffffffff81a60ef0 T intel_tile_row_size +ffffffff81a60f70 T intel_fb_align_height +ffffffff81a60ff0 T intel_fb_uses_dpt +ffffffff81a61040 T intel_cursor_alignment +ffffffff81a610a0 T intel_surf_alignment +ffffffff81a612c0 T intel_fb_plane_get_subsampling +ffffffff81a61690 T intel_plane_adjust_aligned_offset +ffffffff81a61700 t intel_adjust_aligned_offset +ffffffff81a618b0 T intel_plane_compute_aligned_offset +ffffffff81a619b0 t intel_compute_aligned_offset +ffffffff81a61b70 T intel_fb_needs_pot_stride_remap +ffffffff81a61bc0 T intel_fb_supports_90_270_rotation +ffffffff81a61c10 T intel_fill_fb_info +ffffffff81a62850 t calc_plane_remap_info +ffffffff81a632b0 T intel_fb_fill_view +ffffffff81a63300 T intel_plane_compute_gtt +ffffffff81a63bd0 t intel_plane_check_stride +ffffffff81a63f40 T intel_framebuffer_init +ffffffff81a65350 T intel_user_framebuffer_create +ffffffff81a65490 T intel_framebuffer_create +ffffffff81a65520 t intel_adjust_tile_offset +ffffffff81a65660 t intel_user_framebuffer_destroy +ffffffff81a656c0 t intel_user_framebuffer_create_handle +ffffffff81a656e0 t intel_user_framebuffer_dirty +ffffffff81a66000 T intel_pin_and_fence_fb_obj +ffffffff81a66320 t i915_gem_object_lock +ffffffff81a66530 T intel_unpin_fb_vma +ffffffff81a665a0 T intel_plane_pin_fb +ffffffff81a668d0 T intel_plane_unpin_fb +ffffffff81a67000 T intel_fbc_cleanup +ffffffff81a671c0 T intel_fbc_pre_update +ffffffff81a67810 T intel_fbc_post_update +ffffffff81a67a60 T intel_fbc_invalidate +ffffffff81a67c80 T intel_fbc_flush +ffffffff81a67f10 T intel_fbc_atomic_check +ffffffff81a68480 T intel_fbc_disable +ffffffff81a68540 t __intel_fbc_disable +ffffffff81a686d0 T intel_fbc_update +ffffffff81a68d90 T intel_fbc_reset_underrun +ffffffff81a68ef0 T intel_fbc_handle_fifo_underrun_irq +ffffffff81a68fa0 T intel_fbc_add_plane +ffffffff81a68fd0 T intel_fbc_init +ffffffff81a69260 T intel_fbc_sanitize +ffffffff81a69330 T intel_fbc_crtc_debugfs_add +ffffffff81a69360 T intel_fbc_debugfs_register +ffffffff81a69390 t intel_fbc_is_ok +ffffffff81a694b0 t intel_fbc_update_state +ffffffff81a69820 t intel_fbc_underrun_work_fn +ffffffff81a69940 t ivb_fbc_activate +ffffffff81a69ba0 t ilk_fbc_deactivate +ffffffff81a69c50 t ilk_fbc_is_active +ffffffff81a69cb0 t ivb_fbc_is_compressing +ffffffff81a69d20 t snb_fbc_nuke +ffffffff81a69da0 t ilk_fbc_program_cfb +ffffffff81a69de0 t ivb_fbc_set_false_color +ffffffff81a69ea0 t snb_fbc_activate +ffffffff81a69f30 t ilk_fbc_is_compressing +ffffffff81a69fa0 t ilk_fbc_activate +ffffffff81a6a0d0 t i965_fbc_nuke +ffffffff81a6a170 t g4x_fbc_activate +ffffffff81a6a280 t g4x_fbc_deactivate +ffffffff81a6a310 t g4x_fbc_is_active +ffffffff81a6a370 t g4x_fbc_is_compressing +ffffffff81a6a3d0 t g4x_fbc_program_cfb +ffffffff81a6a400 t i8xx_fbc_activate +ffffffff81a6a570 t i8xx_fbc_deactivate +ffffffff81a6a640 t i8xx_fbc_is_active +ffffffff81a6a6a0 t i8xx_fbc_is_compressing +ffffffff81a6a700 t i8xx_fbc_program_cfb +ffffffff81a6a780 t i8xx_fbc_nuke +ffffffff81a6b000 T intel_fbdev_init +ffffffff81a6b4d0 t intel_fbdev_suspend_worker +ffffffff81a6b500 T intel_fbdev_initial_config_async +ffffffff81a6b570 T intel_fbdev_unregister +ffffffff81a6b5b0 T intel_fbdev_set_suspend +ffffffff81a6b5e0 T intel_fbdev_fini +ffffffff81a6b670 T intel_fbdev_output_poll_changed +ffffffff81a6b710 T intel_fbdev_restore_mode +ffffffff81a6b790 T intel_fbdev_framebuffer +ffffffff81a6b7d0 t intelfb_create +ffffffff81a6bdd0 t intel_fbdev_set_par +ffffffff81a6c000 T assert_fdi_tx_enabled +ffffffff81a6c0e0 T assert_fdi_tx_disabled +ffffffff81a6c1c0 T assert_fdi_rx_enabled +ffffffff81a6c280 T assert_fdi_rx_disabled +ffffffff81a6c340 T assert_fdi_tx_pll_enabled +ffffffff81a6c3f0 T assert_fdi_rx_pll_enabled +ffffffff81a6c4b0 T assert_fdi_rx_pll_disabled +ffffffff81a6c570 T intel_fdi_link_train +ffffffff81a6c590 T intel_fdi_pll_freq_update +ffffffff81a6c640 T intel_fdi_link_freq +ffffffff81a6c690 T ilk_fdi_compute_config +ffffffff81a6c9d0 T intel_fdi_normal_train +ffffffff81a6cb60 T hsw_fdi_link_train +ffffffff81a6d060 T hsw_fdi_disable +ffffffff81a6d1c0 T ilk_fdi_pll_enable +ffffffff81a6d3d0 T ilk_fdi_pll_disable +ffffffff81a6d500 T ilk_fdi_disable +ffffffff81a6d770 T intel_fdi_init_hook +ffffffff81a6d7d0 t ilk_fdi_link_train +ffffffff81a6de40 t gen6_fdi_link_train +ffffffff81a6e670 t ivb_manual_fdi_link_train +ffffffff81a6ef10 t cpt_set_fdi_bc_bifurcation +ffffffff81a70000 T intel_set_cpu_fifo_underrun_reporting +ffffffff81a703f0 T intel_set_pch_fifo_underrun_reporting +ffffffff81a70620 T intel_cpu_fifo_underrun_irq_handler +ffffffff81a70810 T intel_pch_fifo_underrun_irq_handler +ffffffff81a70890 T intel_check_cpu_fifo_underruns +ffffffff81a70ab0 T intel_check_pch_fifo_underruns +ffffffff81a71000 T intel_frontbuffer_flip_prepare +ffffffff81a71050 T intel_frontbuffer_flip_complete +ffffffff81a71130 T intel_frontbuffer_flip +ffffffff81a71200 T __intel_fb_invalidate +ffffffff81a71290 T __intel_fb_flush +ffffffff81a71380 T intel_frontbuffer_get +ffffffff81a714c0 t frontbuffer_active +ffffffff81a714f0 t frontbuffer_retire +ffffffff81a71530 T intel_frontbuffer_put +ffffffff81a716c0 T intel_frontbuffer_track +ffffffff81a72000 T intel_atomic_global_obj_init +ffffffff81a72070 T intel_atomic_global_obj_cleanup +ffffffff81a72170 T intel_atomic_get_global_obj_state +ffffffff81a723e0 T intel_atomic_get_old_global_obj_state +ffffffff81a72440 T intel_atomic_get_new_global_obj_state +ffffffff81a724a0 T intel_atomic_swap_global_state +ffffffff81a725f0 T intel_atomic_clear_global_state +ffffffff81a72720 T intel_atomic_lock_global_state +ffffffff81a727a0 T intel_atomic_serialize_global_state +ffffffff81a73000 T intel_gmbus_is_valid_pin +ffffffff81a73110 T intel_gmbus_reset +ffffffff81a73170 T intel_bb_set_bits +ffffffff81a732a0 T intel_bb_set_dir +ffffffff81a732d0 T intel_bb_read_bits +ffffffff81a73450 T intel_acquire_bus +ffffffff81a73650 T intel_release_bus +ffffffff81a737f0 T intel_send_start +ffffffff81a73810 T intel_send_stop +ffffffff81a73830 T intel_initiate_xfer +ffffffff81a73850 T intel_read_byte +ffffffff81a73870 T intel_write_byte +ffffffff81a73890 T intel_gmbus_output_aksv +ffffffff81a73960 t do_gmbus_xfer +ffffffff81a73f60 T intel_gmbus_setup +ffffffff81a742f0 T intel_gmbus_teardown +ffffffff81a74370 T intel_gmbus_get_adapter +ffffffff81a743f0 T intel_gmbus_force_bit +ffffffff81a74490 T intel_gmbus_is_forced_bit +ffffffff81a744c0 t gmbus_xfer_read +ffffffff81a74790 t gmbus_xfer_write +ffffffff81a749e0 t gmbus_wait +ffffffff81a74dc0 t gmbus_wait_idle +ffffffff81a74f60 t gmbus_xfer +ffffffff81a75040 t gmbus_func +ffffffff81a75080 t gmbus_lock_bus +ffffffff81a750a0 t gmbus_trylock_bus +ffffffff81a75100 t gmbus_unlock_bus +ffffffff81a76000 T intel_hdcp_capable +ffffffff81a760a0 t intel_hdcp_read_valid_bksv +ffffffff81a76320 T intel_hdcp2_capable +ffffffff81a76400 T is_hdcp_supported +ffffffff81a76450 T intel_hdcp_component_init +ffffffff81a76480 T intel_hdcp_init +ffffffff81a765c0 t intel_hdcp_check_work +ffffffff81a7a4c0 t intel_hdcp_prop_work +ffffffff81a7a540 T intel_hdcp_enable +ffffffff81a7a590 T intel_hdcp_disable +ffffffff81a7a6c0 t intel_hdcp_update_value +ffffffff81a7a880 t _intel_hdcp2_disable +ffffffff81a7ac80 t _intel_hdcp_disable +ffffffff81a7af80 T intel_hdcp_update_pipe +ffffffff81a7b0f0 T intel_hdcp_component_fini +ffffffff81a7b130 T intel_hdcp_cleanup +ffffffff81a7b270 T intel_hdcp_atomic_check +ffffffff81a7b300 T intel_hdcp_handle_cp_irq +ffffffff81a7b400 t __delayed_work_tick +ffffffff81a7b420 t hdcp2_authenticate_repeater_topology +ffffffff81a7b700 t intel_hdcp_get_repeater_ctl +ffffffff81a7c000 T hsw_write_infoframe +ffffffff81a7c410 t hsw_dip_data_reg +ffffffff81a7c5d0 T hsw_read_infoframe +ffffffff81a7c690 T intel_hdmi_infoframe_enable +ffffffff81a7c730 T intel_hdmi_infoframes_enabled +ffffffff81a7c850 T intel_read_infoframe +ffffffff81a7c9e0 T intel_hdmi_read_gcp_infoframe +ffffffff81a7cad0 T intel_dp_dual_mode_set_tmds_output +ffffffff81a7cba0 T intel_hdmi_tmds_clock +ffffffff81a7cbf0 T intel_hdmi_bpc_possible +ffffffff81a7cd20 T intel_hdmi_limited_color_range +ffffffff81a7cd90 T intel_hdmi_compute_config +ffffffff81a7d4e0 t intel_hdmi_compute_output_format +ffffffff81a7d610 T intel_hdmi_encoder_shutdown +ffffffff81a7d6e0 T intel_hdmi_handle_sink_scrambling +ffffffff81a7d800 T intel_infoframe_init +ffffffff81a7d980 t vlv_write_infoframe +ffffffff81a7dce0 t vlv_read_infoframe +ffffffff81a7deb0 t vlv_set_infoframes +ffffffff81a7e250 t vlv_infoframes_enabled +ffffffff81a7e2f0 t g4x_write_infoframe +ffffffff81a7e5b0 t g4x_read_infoframe +ffffffff81a7e700 t g4x_set_infoframes +ffffffff81a7e9a0 t g4x_infoframes_enabled +ffffffff81a7ea20 t hsw_set_infoframes +ffffffff81a7ecc0 t hsw_infoframes_enabled +ffffffff81a7ed50 t ibx_write_infoframe +ffffffff81a7f070 t ibx_read_infoframe +ffffffff81a7f1f0 t ibx_set_infoframes +ffffffff81a7f560 t ibx_infoframes_enabled +ffffffff81a7f5f0 t cpt_write_infoframe +ffffffff81a7f8f0 t cpt_read_infoframe +ffffffff81a7fa70 t cpt_set_infoframes +ffffffff81a7fd80 t cpt_infoframes_enabled +ffffffff81a7fdf0 T intel_hdmi_init_connector +ffffffff81a80480 T intel_hdmi_dsc_get_slice_height +ffffffff81a804e0 T intel_hdmi_dsc_get_num_slices +ffffffff81a80660 T intel_hdmi_dsc_get_bpp +ffffffff81a80750 t intel_hdmi_compute_clock +ffffffff81a80a10 t hdmi_port_clock_valid +ffffffff81a80c40 t intel_write_infoframe +ffffffff81a80e10 t intel_hdmi_detect +ffffffff81a80fd0 t intel_hdmi_force +ffffffff81a810b0 t intel_hdmi_connector_register +ffffffff81a810c0 t intel_hdmi_connector_unregister +ffffffff81a810d0 t intel_hdmi_set_edid +ffffffff81a81370 t intel_hdmi_get_modes +ffffffff81a813b0 t intel_hdmi_mode_valid +ffffffff81a81550 t intel_hdmi_mode_clock_valid +ffffffff81a816e0 t intel_hdmi_hdcp_write_an_aksv +ffffffff81a81830 t intel_hdmi_hdcp_read_bksv +ffffffff81a81900 t intel_hdmi_hdcp_read_bstatus +ffffffff81a819d0 t intel_hdmi_hdcp_repeater_present +ffffffff81a81ab0 t intel_hdmi_hdcp_read_ri_prime +ffffffff81a81b80 t intel_hdmi_hdcp_read_ksv_ready +ffffffff81a81c60 t intel_hdmi_hdcp_read_ksv_fifo +ffffffff81a81d30 t intel_hdmi_hdcp_read_v_prime_part +ffffffff81a81e20 t intel_hdmi_hdcp_toggle_signalling +ffffffff81a820b0 t intel_hdmi_hdcp_check_link +ffffffff81a82400 t intel_hdmi_hdcp2_capable +ffffffff81a824c0 t intel_hdmi_hdcp2_write_msg +ffffffff81a825b0 t intel_hdmi_hdcp2_read_msg +ffffffff81a82a50 t intel_hdmi_hdcp2_check_link +ffffffff81a83000 T intel_hpd_pin_default +ffffffff81a83030 T intel_encoder_hotplug +ffffffff81a83160 T intel_hpd_trigger_irq +ffffffff81a831d0 T intel_hpd_irq_handler +ffffffff81a835b0 T intel_hpd_init +ffffffff81a836c0 T intel_hpd_poll_enable +ffffffff81a83740 T intel_hpd_poll_disable +ffffffff81a837a0 T intel_hpd_init_work +ffffffff81a83870 t i915_hotplug_work_func +ffffffff81a83bc0 t i915_digport_work_func +ffffffff81a83d50 t i915_hpd_poll_init_work +ffffffff81a83e60 t intel_hpd_irq_storm_reenable_work +ffffffff81a841b0 T intel_hpd_cancel_work +ffffffff81a842d0 T intel_hpd_disable +ffffffff81a84360 T intel_hpd_enable +ffffffff81a843d0 t __delayed_work_tick +ffffffff81a85000 T intel_lpe_audio_irq_handler +ffffffff81a85020 T intel_lpe_audio_init +ffffffff81a85050 T intel_lpe_audio_teardown +ffffffff81a85070 T intel_lpe_audio_notify +ffffffff81a86000 T lspcon_detect_hdr_capability +ffffffff81a860b0 T lspcon_write_infoframe +ffffffff81a86830 T lspcon_read_infoframe +ffffffff81a86870 T lspcon_set_infoframes +ffffffff81a86ae0 T lspcon_infoframes_enabled +ffffffff81a86cd0 T lspcon_wait_pcon_mode +ffffffff81a86cf0 t lspcon_wait_mode +ffffffff81a86fb0 T lspcon_init +ffffffff81a873c0 T intel_lspcon_infoframes_enabled +ffffffff81a87400 T lspcon_resume +ffffffff81a876b0 t lspcon_change_mode +ffffffff81a88000 T intel_lvds_port_enabled +ffffffff81a88080 T intel_get_lvds_encoder +ffffffff81a880e0 T intel_is_dual_link_lvds +ffffffff81a88150 T intel_lvds_init +ffffffff81a888c0 t intel_enable_lvds +ffffffff81a88a10 t intel_pre_enable_lvds +ffffffff81a88ce0 t intel_lvds_compute_config +ffffffff81a88e40 t pch_disable_lvds +ffffffff81a88e60 t pch_post_disable_lvds +ffffffff81a88e80 t gmch_disable_lvds +ffffffff81a88eb0 t intel_lvds_get_hw_state +ffffffff81a88f70 t intel_lvds_get_config +ffffffff81a89070 t intel_lvds_shutdown +ffffffff81a89110 t intel_no_lvds_dmi_callback +ffffffff81a89160 t intel_disable_lvds +ffffffff81a89290 t intel_lvds_get_modes +ffffffff81a892c0 t intel_lvds_mode_valid +ffffffff81a89340 t intel_dual_link_lvds_callback +ffffffff81a8a000 T intel_modeset_setup_hw_state +ffffffff81a8c000 T intel_modeset_verify_crtc +ffffffff81a8c3b0 t verify_connector_state +ffffffff81a8c660 T intel_modeset_verify_disabled +ffffffff81a8d000 T intel_opregion_notify_encoder +ffffffff81a8d170 t swsci +ffffffff81a8d4a0 T intel_opregion_notify_adapter +ffffffff81a8d500 T intel_opregion_asle_intr +ffffffff81a8d550 T intel_opregion_setup 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t intel_overlay_off_tail +ffffffff81a91510 t intel_overlay_flip_prepare +ffffffff81a92000 T intel_panel_use_ssc +ffffffff81a92060 T intel_panel_preferred_fixed_mode +ffffffff81a920b0 T intel_panel_fixed_mode +ffffffff81a92170 T intel_panel_downclock_mode +ffffffff81a92260 T intel_panel_highest_mode +ffffffff81a922c0 T intel_panel_get_modes +ffffffff81a92350 T intel_panel_drrs_type +ffffffff81a923a0 T intel_panel_compute_config +ffffffff81a92520 T intel_panel_add_edid_fixed_modes +ffffffff81a92a50 T intel_panel_add_vbt_lfp_fixed_mode +ffffffff81a92ab0 t intel_panel_add_fixed_mode +ffffffff81a92c30 T intel_panel_add_vbt_sdvo_fixed_mode +ffffffff81a92ca0 T intel_panel_add_encoder_fixed_mode +ffffffff81a92ce0 T intel_panel_fitting +ffffffff81a93330 T intel_panel_detect +ffffffff81a933c0 T intel_panel_mode_valid +ffffffff81a934d0 T intel_panel_init_alloc +ffffffff81a93520 T intel_panel_init +ffffffff81a935e0 T intel_panel_fini +ffffffff81a94000 T intel_has_pch_trancoder +ffffffff81a94060 T intel_crtc_pch_transcoder +ffffffff81a940a0 T intel_pch_transcoder_get_m1_n1 +ffffffff81a940f0 T intel_pch_transcoder_get_m2_n2 +ffffffff81a94140 T ilk_pch_pre_enable +ffffffff81a94170 T ilk_pch_enable +ffffffff81a94720 t ilk_pch_transcoder_set_timings +ffffffff81a949a0 T ilk_pch_disable +ffffffff81a949c0 T ilk_pch_post_disable +ffffffff81a94d00 T ilk_pch_get_config +ffffffff81a94ec0 T lpt_pch_enable +ffffffff81a950f0 T lpt_pch_disable +ffffffff81a95200 T lpt_pch_get_config +ffffffff81a952d0 T intel_pch_sanitize +ffffffff81a955b0 t assert_pch_dp_disabled +ffffffff81a956a0 t assert_pch_hdmi_disabled +ffffffff81a96000 T lpt_disable_iclkip +ffffffff81a96070 T lpt_iclkip +ffffffff81a96100 T lpt_program_iclkip +ffffffff81a96380 T lpt_get_iclkip +ffffffff81a96490 T lpt_disable_clkout_dp +ffffffff81a96570 T intel_init_pch_refclk +ffffffff81a98000 T intel_crtc_initial_plane_config +ffffffff81a99000 T intel_pps_lock +ffffffff81a99060 T intel_pps_unlock +ffffffff81a990c0 T intel_pps_reset_all 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intel_psr2_sel_fetch_update +ffffffff81aa0ff0 T intel_psr_pre_plane_update +ffffffff81aa11c0 T intel_psr_post_plane_update +ffffffff81aa1c50 T intel_psr_wait_for_idle_locked +ffffffff81aa1e30 T intel_psr_debug_set +ffffffff81aa2060 t psr_irq_control +ffffffff81aa21b0 T intel_psr_invalidate +ffffffff81aa2470 T intel_psr_flush +ffffffff81aa2940 T intel_psr_init +ffffffff81aa2a70 t intel_psr_work +ffffffff81aa2c20 t tgl_dc3co_disable_work +ffffffff81aa2c70 T intel_psr_short_pulse +ffffffff81aa3030 T intel_psr_enabled +ffffffff81aa30b0 T intel_psr_lock +ffffffff81aa31a0 T intel_psr_unlock +ffffffff81aa3290 t tgl_psr2_disable_dc3co +ffffffff81aa33c0 t __delayed_work_tick +ffffffff81aa4000 T intel_lookup_range_min_qp +ffffffff81aa40b0 T intel_lookup_range_max_qp +ffffffff81aa5000 T intel_init_quirks +ffffffff81aa50f0 T intel_has_quirk +ffffffff81aa5130 t quirk_ssc_force_disable +ffffffff81aa5160 t quirk_invert_brightness +ffffffff81aa5190 t quirk_backlight_present +ffffffff81aa51c0 t quirk_increase_t12_delay +ffffffff81aa51f0 t quirk_increase_ddi_disabled_time +ffffffff81aa5220 t intel_dmi_reverse_brightness +ffffffff81aa5270 t intel_dmi_no_pps_backlight +ffffffff81aa6000 T intel_sdvo_port_enabled +ffffffff81aa60a0 T intel_sdvo_init +ffffffff81aa6c70 t intel_sdvo_compute_config +ffffffff81aa71d0 t pch_disable_sdvo +ffffffff81aa7200 t pch_post_disable_sdvo +ffffffff81aa7210 t intel_disable_sdvo +ffffffff81aa7380 t intel_sdvo_pre_enable +ffffffff81aa7d00 t intel_enable_sdvo +ffffffff81aa7f00 t intel_sdvo_get_hw_state +ffffffff81aa7ff0 t intel_sdvo_get_config +ffffffff81aa8560 t intel_sdvo_ddc_proxy_xfer +ffffffff81aa8610 t intel_sdvo_ddc_proxy_func +ffffffff81aa8640 t __intel_sdvo_write_cmd +ffffffff81aa8b00 t proxy_lock_bus +ffffffff81aa8b30 t proxy_trylock_bus +ffffffff81aa8b60 t proxy_unlock_bus +ffffffff81aa8b90 t intel_sdvo_enc_destroy +ffffffff81aa8ba0 t intel_sdvo_get_preferred_input_mode +ffffffff81aa8f30 t intel_sdvo_get_dtd_from_mode +ffffffff81aa90a0 t intel_sdvo_read_response +ffffffff81aa9540 t intel_sdvo_write_sdvox +ffffffff81aa9730 t intel_sdvo_write_infoframe +ffffffff81aa9900 t intel_sdvo_dvi_init +ffffffff81aa9b90 t intel_sdvo_tv_init +ffffffff81aa9eb0 t intel_sdvo_lvds_init +ffffffff81aaa0a0 t intel_sdvo_hotplug +ffffffff81aaa0e0 t intel_sdvo_connector_get_hw_state +ffffffff81aaa170 t intel_sdvo_detect +ffffffff81aaa4f0 t intel_sdvo_connector_register +ffffffff81aaa500 t intel_sdvo_connector_unregister +ffffffff81aaa510 t intel_sdvo_connector_duplicate_state +ffffffff81aaa590 t intel_sdvo_connector_atomic_set_property +ffffffff81aaa760 t intel_sdvo_connector_atomic_get_property +ffffffff81aaa980 t intel_sdvo_get_modes +ffffffff81aaac40 t intel_sdvo_mode_valid +ffffffff81aaad10 t intel_sdvo_atomic_check +ffffffff81aaadc0 t intel_sdvo_create_enhance_property +ffffffff81aac000 T intel_snps_phy_wait_for_calibration +ffffffff81aac0d0 T intel_snps_phy_update_psr_power_state +ffffffff81aac1a0 T intel_snps_phy_set_signal_levels +ffffffff81aac3f0 T intel_mpllb_calc_state +ffffffff81aac560 T intel_snps_phy_check_hdmi_link_rate +ffffffff81aac5c0 T intel_mpllb_enable +ffffffff81aac820 T intel_mpllb_disable +ffffffff81aac9b0 T intel_mpllb_calc_port_clock +ffffffff81aaca70 T intel_mpllb_readout_hw_state +ffffffff81aacbe0 T intel_mpllb_state_verify +ffffffff81aae000 T intel_plane_check_src_coordinates +ffffffff81aae1d0 T vlv_plane_min_cdclk +ffffffff81aae2c0 T ivb_plane_min_cdclk +ffffffff81aae380 T hsw_plane_min_cdclk +ffffffff81aae420 T chv_plane_check_rotation +ffffffff81aae490 T intel_sprite_set_colorkey_ioctl +ffffffff81aae760 T intel_sprite_plane_create +ffffffff81aaeab0 t vlv_sprite_update_noarm +ffffffff81aaeba0 t vlv_sprite_update_arm +ffffffff81aaf260 t vlv_sprite_disable_arm +ffffffff81aaf2f0 t vlv_sprite_get_hw_state +ffffffff81aaf3b0 t vlv_sprite_check +ffffffff81aaf640 t ivb_sprite_update_noarm +ffffffff81aaf7b0 t ivb_sprite_update_arm +ffffffff81aafb90 t ivb_sprite_disable_arm +ffffffff81aafc40 t ivb_sprite_get_hw_state +ffffffff81aafcf0 t g4x_sprite_check +ffffffff81ab02c0 t hsw_sprite_max_stride +ffffffff81ab0310 t g4x_sprite_max_stride +ffffffff81ab0380 t ivb_sprite_min_cdclk +ffffffff81ab04b0 t g4x_sprite_update_noarm +ffffffff81ab0620 t g4x_sprite_update_arm +ffffffff81ab0a70 t g4x_sprite_disable_arm +ffffffff81ab0b20 t g4x_sprite_get_hw_state +ffffffff81ab0bd0 t g4x_sprite_min_cdclk +ffffffff81ab0c90 t vlv_sprite_format_mod_supported +ffffffff81ab0dc0 t snb_sprite_format_mod_supported +ffffffff81ab0eb0 t g4x_sprite_format_mod_supported +ffffffff81ab1000 T intel_tc_port_in_tbt_alt_mode +ffffffff81ab1070 T intel_tc_port_in_dp_alt_mode +ffffffff81ab10e0 T intel_tc_port_in_legacy_mode +ffffffff81ab1150 T intel_tc_cold_requires_aux_pw +ffffffff81ab11a0 T intel_tc_port_get_lane_mask +ffffffff81ab1300 T intel_tc_port_get_pin_assignment_mask +ffffffff81ab1460 T intel_tc_port_fia_max_lane_count +ffffffff81ab15a0 T intel_tc_port_set_fia_lane_count +ffffffff81ab17b0 T intel_tc_port_sanitize +ffffffff81ab1e40 T intel_tc_port_connected +ffffffff81ab1f30 T intel_tc_port_lock +ffffffff81ab1f50 t tc_port_live_status_mask +ffffffff81ab2220 T intel_tc_port_unlock +ffffffff81ab22a0 t __intel_tc_port_lock +ffffffff81ab24a0 T intel_tc_port_flush_work +ffffffff81ab24c0 T intel_tc_port_ref_held +ffffffff81ab2510 T intel_tc_port_get_link +ffffffff81ab2590 T intel_tc_port_put_link +ffffffff81ab2620 T intel_tc_port_init +ffffffff81ab28c0 t intel_tc_port_disconnect_phy_work +ffffffff81ab2910 t tc_phy_status_complete +ffffffff81ab2a20 t tc_phy_take_ownership +ffffffff81ab2bc0 t intel_tc_port_update_mode +ffffffff81ab30e0 t __delayed_work_tick +ffffffff81ab4000 T intel_tv_init +ffffffff81ab4420 t intel_tv_compute_config +ffffffff81ab48c0 t intel_tv_get_config +ffffffff81ab4e70 t intel_tv_pre_enable +ffffffff81ab57a0 t intel_enable_tv +ffffffff81ab5800 t intel_disable_tv +ffffffff81ab5860 t intel_tv_get_hw_state +ffffffff81ab58c0 t intel_tv_connector_duplicate_state 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intel_vrr_vmax_vblank_start +ffffffff81abb1f0 T intel_vrr_compute_config +ffffffff81abb380 T intel_vrr_enable +ffffffff81abb560 T intel_vrr_send_push +ffffffff81abb5e0 T intel_vrr_is_push_sent +ffffffff81abb670 T intel_vrr_disable +ffffffff81abb740 T intel_vrr_get_config +ffffffff81abc000 T skl_update_scaler_crtc +ffffffff81abc0c0 t skl_update_scaler +ffffffff81abc370 T skl_update_scaler_plane +ffffffff81abc760 T skl_pfit_enable +ffffffff81abcc40 T skl_program_plane_scaler +ffffffff81abd300 T skl_detach_scalers +ffffffff81abd440 T skl_scaler_disable +ffffffff81abe000 T skl_format_to_fourcc +ffffffff81abe180 T icl_is_nv12_y_plane +ffffffff81abe1f0 T icl_is_hdr_plane +ffffffff81abe230 T skl_calc_main_surface_offset +ffffffff81abe470 T skl_universal_plane_create +ffffffff81abeb60 t icl_plane_min_width +ffffffff81abecf0 t icl_hdr_plane_max_width +ffffffff81abed40 t icl_sdr_plane_max_width +ffffffff81abed70 t icl_plane_max_height +ffffffff81abeda0 t icl_plane_min_cdclk +ffffffff81abede0 t glk_plane_max_width +ffffffff81abee90 t skl_plane_max_height +ffffffff81abeec0 t glk_plane_min_cdclk +ffffffff81abef40 t skl_plane_max_width +ffffffff81abf010 t skl_plane_min_cdclk +ffffffff81abf080 t skl_plane_max_stride +ffffffff81abf120 t icl_plane_update_noarm +ffffffff81abfaf0 t icl_plane_update_arm +ffffffff81abfc60 t icl_plane_disable_arm +ffffffff81abfd70 t skl_plane_update_noarm +ffffffff81abff10 t skl_plane_update_arm +ffffffff81ac0310 t skl_plane_disable_arm +ffffffff81ac03c0 t skl_plane_get_hw_state +ffffffff81ac0480 t skl_plane_check +ffffffff81ac18b0 t skl_plane_async_flip +ffffffff81ac19e0 t skl_plane_enable_flip_done +ffffffff81ac1a40 t skl_plane_disable_flip_done +ffffffff81ac1aa0 T skl_get_initial_plane_config +ffffffff81ac2140 t skl_surf_address +ffffffff81ac2260 t skl_check_main_ccs_coordinates +ffffffff81ac2400 t gen12_plane_format_mod_supported +ffffffff81ac2650 t skl_plane_format_mod_supported +ffffffff81ac3000 T intel_enabled_dbuf_slices_mask +ffffffff81ac3130 T intel_sagv_pre_plane_update +ffffffff81ac32a0 T intel_sagv_post_plane_update +ffffffff81ac34f0 T intel_can_enable_sagv +ffffffff81ac3560 T skl_ddb_dbuf_slice_mask +ffffffff81ac3610 T skl_write_plane_wm +ffffffff81ac39f0 T skl_write_cursor_wm +ffffffff81ac3d50 T skl_ddb_allocation_overlaps +ffffffff81ac3df0 T skl_wm_get_hw_state +ffffffff81ac43e0 t skl_pipe_wm_get_hw_state +ffffffff81ac4770 t skl_compute_dbuf_slices +ffffffff81ac4ca0 T skl_wm_sanitize +ffffffff81ac4ef0 T intel_wm_state_verify +ffffffff81ac5820 T skl_watermark_ipc_enabled +ffffffff81ac5850 T skl_watermark_ipc_update +ffffffff81ac5900 T skl_watermark_ipc_init +ffffffff81ac5a00 T skl_wm_init +ffffffff81ac6030 T intel_atomic_get_dbuf_state +ffffffff81ac6050 T intel_dbuf_init +ffffffff81ac60c0 T intel_dbuf_pre_plane_update +ffffffff81ac63a0 T intel_dbuf_post_plane_update +ffffffff81ac6470 T intel_mbus_dbox_update +ffffffff81ac66e0 T skl_watermark_ipc_debugfs_register +ffffffff81ac6710 t skl_sagv_disable +ffffffff81ac6830 t skl_ddb_entry_for_slices +ffffffff81ac6970 t skl_compute_wm +ffffffff81ac97b0 t skl_build_plane_wm_single +ffffffff81ac9ae0 t skl_compute_wm_params +ffffffff81ac9ed0 t skl_compute_plane_wm +ffffffff81aca3b0 t intel_dbuf_duplicate_state +ffffffff81aca440 t intel_dbuf_destroy_state +ffffffff81acb000 T pixel_format_from_register_bits +ffffffff81acb060 T vlv_dsi_wait_for_fifo_empty +ffffffff81acb120 T vlv_dsi_init +ffffffff81acb980 t intel_dsi_compute_config +ffffffff81acbad0 t intel_dsi_pre_enable +ffffffff81acd750 t bxt_dsi_enable +ffffffff81acd7b0 t intel_dsi_disable +ffffffff81acda60 t intel_dsi_post_disable +ffffffff81ace740 t intel_dsi_get_hw_state +ffffffff81ace9f0 t intel_dsi_get_config +ffffffff81acf1b0 t intel_dsi_shutdown +ffffffff81acf2a0 t intel_dsi_encoder_destroy +ffffffff81acf2d0 t intel_dsi_prepare +ffffffff81acff20 t dpi_send_cmd +ffffffff81ad00b0 t intel_dsi_host_attach +ffffffff81ad00e0 t intel_dsi_host_detach +ffffffff81ad0110 t intel_dsi_host_transfer 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intel_gt_chipset_flush +ffffffff81b1de30 T intel_gt_driver_register +ffffffff81b1de80 T intel_gt_wait_for_idle +ffffffff81b1df90 T intel_gt_init +ffffffff81b1e4a0 T intel_gt_driver_remove +ffffffff81b1e500 T intel_gt_driver_unregister +ffffffff81b1e590 T intel_gt_driver_release +ffffffff81b1e640 T intel_gt_driver_late_release_all +ffffffff81b1e760 T intel_gt_probe_all +ffffffff81b1ea50 t intel_gt_tile_setup +ffffffff81b1eb20 T intel_gt_release_all +ffffffff81b1eba0 T intel_gt_tiles_init +ffffffff81b1ee90 T intel_gt_info_print +ffffffff81b1eed0 T intel_gt_invalidate_tlb +ffffffff81b20000 T intel_gt_buffer_pool_mark_used +ffffffff81b20060 T intel_gt_get_buffer_pool +ffffffff81b20270 T intel_gt_init_buffer_pool +ffffffff81b20330 t pool_free_work +ffffffff81b203d0 T intel_gt_flush_buffer_pool +ffffffff81b20470 t pool_free_older_than +ffffffff81b20600 T intel_gt_fini_buffer_pool +ffffffff81b20630 t pool_retire +ffffffff81b20760 t __delayed_work_tick +ffffffff81b21000 T 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gen6_rps_irq_handler +ffffffff81b457d0 T gen5_rps_irq_handler +ffffffff81b459f0 T intel_rps_init_early +ffffffff81b45a90 t rps_work +ffffffff81b45e30 t rps_timer +ffffffff81b46050 T intel_rps_init +ffffffff81b46d30 T intel_rps_sanitize +ffffffff81b46d90 T intel_rps_get_cagf +ffffffff81b46e20 T intel_rps_read_actual_frequency +ffffffff81b47050 T intel_rps_read_punit_req +ffffffff81b470d0 T intel_rps_read_punit_req_frequency +ffffffff81b471f0 T intel_rps_get_requested_frequency +ffffffff81b473b0 T intel_rps_get_max_frequency +ffffffff81b474a0 T intel_rps_get_max_raw_freq +ffffffff81b47520 T intel_rps_get_rp0_frequency +ffffffff81b47610 T intel_rps_get_rp1_frequency +ffffffff81b47700 T intel_rps_get_rpn_frequency +ffffffff81b477f0 T intel_rps_set_max_frequency +ffffffff81b47a60 T intel_rps_get_min_frequency +ffffffff81b47b50 T intel_rps_get_min_raw_freq +ffffffff81b47bd0 T intel_rps_set_min_frequency +ffffffff81b47d50 T intel_rps_raise_unslice +ffffffff81b47e30 T intel_rps_lower_unslice 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intel_guc_slpc_set_boost_freq +ffffffff81b67e50 t slpc_force_min_freq +ffffffff81b67f70 T intel_guc_slpc_dec_waiters +ffffffff81b67fb0 T intel_guc_slpc_print_info +ffffffff81b681c0 T intel_guc_slpc_fini +ffffffff81b69000 T intel_guc_wait_for_pending_msg +ffffffff81b692a0 T intel_guc_wait_for_idle +ffffffff81b692f0 T intel_guc_busyness_park +ffffffff81b694f0 T intel_guc_busyness_unpark +ffffffff81b69660 T intel_guc_submission_reset_prepare +ffffffff81b69df0 t guc_flush_destroyed_contexts +ffffffff81b69f60 T intel_guc_submission_reset +ffffffff81b6a080 t __guc_reset_context +ffffffff81b6a380 T intel_guc_submission_cancel_requests +ffffffff81b6a620 T intel_guc_submission_reset_finish +ffffffff81b6a700 T intel_guc_submission_init +ffffffff81b6a870 T intel_guc_submission_fini +ffffffff81b6a910 T intel_guc_submission_setup +ffffffff81b6ad10 t guc_sched_engine_disabled +ffffffff81b6ad40 t guc_sched_engine_destroy +ffffffff81b6ada0 t guc_bump_inflight_request_prio +ffffffff81b6ae90 t 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i915_gem_sw_finish_ioctl +ffffffff81b852a0 T i915_gem_runtime_suspend +ffffffff81b853a0 T i915_gem_object_ggtt_pin_ww +ffffffff81b85650 T i915_gem_object_ggtt_pin +ffffffff81b857c0 T i915_gem_madvise_ioctl +ffffffff81b85af0 T i915_gem_drain_freed_objects +ffffffff81b85b70 T i915_gem_drain_workqueue +ffffffff81b85c50 T i915_gem_init +ffffffff81b85fd0 T i915_gem_driver_register +ffffffff81b86000 T i915_gem_driver_unregister +ffffffff81b86010 T i915_gem_driver_remove +ffffffff81b860f0 T i915_gem_driver_release +ffffffff81b86240 T i915_gem_init_early +ffffffff81b862c0 T i915_gem_cleanup_early +ffffffff81b86380 T i915_gem_open +ffffffff81b864a0 t i915_gem_gtt_prepare +ffffffff81b867a0 t __ww_mutex_lock +ffffffff81b87000 T i915_gem_evict_something +ffffffff81b87880 T i915_gem_evict_for_node +ffffffff81b87c50 T i915_gem_evict_vm +ffffffff81b89000 T i915_gem_gtt_prepare_pages +ffffffff81b89030 T i915_gem_gtt_finish_pages +ffffffff81b89090 T i915_gem_gtt_reserve +ffffffff81b89140 T i915_gem_gtt_insert +ffffffff81b8a000 T i915_gem_ww_ctx_init +ffffffff81b8a060 T i915_gem_ww_unlock_single +ffffffff81b8a1a0 T i915_gem_ww_ctx_fini +ffffffff81b8a210 t i915_gem_ww_ctx_unlock_all +ffffffff81b8a370 T i915_gem_ww_ctx_backoff +ffffffff81b8b000 T i915_getparam_ioctl +ffffffff81b8c000 T intel_gpu_error_find_batch +ffffffff81b8c070 T i915_error_printf +ffffffff81b8c130 T intel_gpu_error_print_vma +ffffffff81b8c160 T i915_gpu_coredump_copy_to_buffer +ffffffff81b8c1b0 T __i915_gpu_coredump_free +ffffffff81b8c340 T intel_engine_coredump_alloc +ffffffff81b8cba0 T intel_engine_coredump_add_request +ffffffff81b8cf10 T intel_engine_coredump_add_vma +ffffffff81b8d030 T i915_gpu_coredump_alloc +ffffffff81b8d290 T intel_gt_coredump_alloc +ffffffff81b8dad0 T i915_vma_capture_prepare +ffffffff81b8db80 T i915_vma_capture_finish +ffffffff81b8dbe0 T i915_gpu_coredump +ffffffff81b8e360 T i915_error_state_store +ffffffff81b8e3c0 T i915_capture_error_state +ffffffff81b8e480 T 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intel_hpd_irq_setup +ffffffff81b92cd0 T intel_irq_init +ffffffff81b92f80 t ivb_parity_work +ffffffff81b93320 T intel_irq_fini +ffffffff81b93360 T intel_irq_install +ffffffff81b93470 t intel_irq_reset +ffffffff81b93fd0 t intel_irq_postinstall +ffffffff81b94cd0 T intel_irq_uninstall +ffffffff81b94d40 T intel_runtime_pm_disable_interrupts +ffffffff81b94d70 T intel_runtime_pm_enable_interrupts +ffffffff81b94da0 T intel_synchronize_hardirq +ffffffff81b94dc0 t i9xx_pipestat_irq_reset +ffffffff81b94f50 t kasprintf +ffffffff81b95020 t i915_hpd_irq_setup +ffffffff81b95130 t icp_hpd_irq_setup +ffffffff81b95320 t dg1_hpd_irq_setup +ffffffff81b95380 t gen11_hpd_irq_setup +ffffffff81b955d0 t bxt_hpd_irq_setup +ffffffff81b95760 t bdw_update_port_irq +ffffffff81b958a0 t spt_hpd_irq_setup +ffffffff81b95ac0 t ilk_hpd_irq_setup +ffffffff81b95d20 t gen11_display_irq_reset +ffffffff81b962a0 t ibx_irq_reset +ffffffff81b963e0 t cherryview_irq_handler +ffffffff81b966b0 t valleyview_irq_handler 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oa_configure_all_contexts +ffffffff81ba88d0 t gen8_modify_self +ffffffff81ba8aa0 t gen8_modify_context +ffffffff81ba8c40 t gen12_configure_oar_context +ffffffff81ba9000 T i915_query_ioctl +ffffffff81ba9110 t query_topology_info +ffffffff81ba9160 t query_engine_info +ffffffff81ba93a0 t query_perf_config +ffffffff81ba96a0 t query_memregion_info +ffffffff81ba9920 t query_hwconfig_blob +ffffffff81ba99a0 t query_geometry_subslices +ffffffff81ba9a30 t fill_topology_info +ffffffff81ba9bd0 t query_perf_config_data +ffffffff81bab000 T i915_request_slab_cache +ffffffff81bab030 t i915_fence_get_driver_name +ffffffff81bab060 t i915_fence_get_timeline_name +ffffffff81bab0c0 t i915_fence_enable_signaling +ffffffff81bab0d0 t i915_fence_signaled +ffffffff81bab120 t i915_fence_wait +ffffffff81bab140 t i915_fence_release +ffffffff81bab230 T i915_request_notify_execute_cb_imm +ffffffff81bab2a0 T i915_request_active_engine +ffffffff81bab380 T i915_request_free_capture_list +ffffffff81bab3f0 T i915_request_retire +ffffffff81bab5b0 T i915_request_retire_upto +ffffffff81bab620 T __i915_request_skip +ffffffff81bab6c0 T i915_request_set_error_once +ffffffff81bab730 T i915_request_mark_eio +ffffffff81bab7c0 T __i915_request_submit +ffffffff81baba10 T i915_request_submit +ffffffff81baba60 T __i915_request_unsubmit +ffffffff81babad0 T i915_request_unsubmit +ffffffff81babb50 T i915_request_cancel +ffffffff81babbd0 T __i915_request_create +ffffffff81babef0 t request_alloc_slow +ffffffff81bac040 T i915_request_create +ffffffff81bac140 T i915_request_await_execution +ffffffff81bac250 t __i915_request_await_execution +ffffffff81bac3e0 t i915_request_await_external +ffffffff81bac520 T i915_request_await_dma_fence +ffffffff81bac8a0 T i915_request_await_deps +ffffffff81bac910 T i915_request_await_object +ffffffff81bac9c0 T __i915_request_commit +ffffffff81bacc20 T __i915_request_queue_bh +ffffffff81bacc60 T __i915_request_queue +ffffffff81baccc0 T i915_request_add +ffffffff81bacd70 T i915_request_wait_timeout +ffffffff81bad0b0 t request_wait_wake +ffffffff81bad0d0 T i915_request_wait +ffffffff81bad130 T i915_request_show +ffffffff81bad360 T i915_test_request_state +ffffffff81bad4d0 T i915_request_module_exit +ffffffff81bad500 T i915_request_module_init +ffffffff81bad590 t submit_notify +ffffffff81bad670 t semaphore_notify +ffffffff81bad6c0 t __rq_watchdog_expired +ffffffff81bad770 t __await_execution +ffffffff81bad8f0 t i915_request_await_start +ffffffff81bada20 t irq_execute_cb +ffffffff81bae000 T i915_sg_trim +ffffffff81bae100 T i915_refct_sgt_init +ffffffff81bae140 T i915_rsgt_from_mm_node +ffffffff81bae3b0 T i915_rsgt_from_buddy_resource +ffffffff81bae640 t i915_refct_sgt_release +ffffffff81baf000 T i915_sched_lookup_priolist +ffffffff81baf120 T __i915_priolist_free +ffffffff81baf140 T i915_schedule +ffffffff81baf620 T i915_sched_node_init +ffffffff81baf680 T i915_sched_node_reinit +ffffffff81baf6c0 T __i915_sched_node_add_dependency +ffffffff81baf7d0 T i915_sched_node_add_dependency +ffffffff81baf910 T i915_sched_node_fini +ffffffff81baf9f0 T i915_request_show_with_schedule +ffffffff81bafad0 T i915_sched_engine_create +ffffffff81bafb80 t default_destroy +ffffffff81bafbd0 t default_disabled +ffffffff81bafc00 T i915_scheduler_module_exit +ffffffff81bafc30 T i915_scheduler_module_init +ffffffff81bb0000 T i915_save_display +ffffffff81bb0360 T i915_restore_display +ffffffff81bb1000 T i915_sw_fence_complete +ffffffff81bb1040 t __i915_sw_fence_complete +ffffffff81bb11c0 T i915_sw_fence_await +ffffffff81bb1240 T __i915_sw_fence_init +ffffffff81bb12b0 T i915_sw_fence_reinit +ffffffff81bb12f0 T i915_sw_fence_commit +ffffffff81bb1330 T i915_sw_fence_await_sw_fence +ffffffff81bb1350 t __i915_sw_fence_await_sw_fence +ffffffff81bb15f0 T i915_sw_fence_await_sw_fence_gfp +ffffffff81bb1610 T i915_sw_fence_await_dma_fence +ffffffff81bb1840 t dma_i915_sw_fence_wake +ffffffff81bb18c0 t irq_i915_sw_fence_work +ffffffff81bb1900 t timer_i915_sw_fence_wake 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i915_ttm_buddy_man_reserve +ffffffff81bb64d0 T i915_ttm_buddy_man_visible_size +ffffffff81bb6500 T i915_ttm_buddy_man_avail +ffffffff81bb6560 t i915_ttm_buddy_man_alloc +ffffffff81bb6890 t i915_ttm_buddy_man_free +ffffffff81bb6900 t i915_ttm_buddy_man_intersects +ffffffff81bb69b0 t i915_ttm_buddy_man_compatible +ffffffff81bb6a60 t i915_ttm_buddy_man_debug +ffffffff81bb7000 T i915_user_extensions +ffffffff81bb8000 T __i915_printk +ffffffff81bb80c0 T add_taint_for_CI +ffffffff81bb80f0 T cancel_timer +ffffffff81bb8140 T set_timer_ms +ffffffff81bb81f0 T i915_vtd_active +ffffffff81bb9000 T intel_vgpu_detect +ffffffff81bb9030 T intel_vgpu_register +ffffffff81bb9090 T intel_vgpu_active +ffffffff81bb90c0 T intel_vgpu_has_full_ppgtt +ffffffff81bb9100 T intel_vgpu_has_hwsp_emulation +ffffffff81bb9140 T intel_vgpu_has_huge_gtt +ffffffff81bb9180 T intel_vgt_deballoon +ffffffff81bb93c0 T intel_vgt_balloon +ffffffff81bba000 T i915_vma_instance +ffffffff81bba5b0 T i915_vma_work +ffffffff81bba620 T i915_vma_wait_for_bind +ffffffff81bba6a0 T i915_vma_bind +ffffffff81bba9f0 T i915_vma_pin_iomap +ffffffff81bbabc0 T i915_vma_flush_writes +ffffffff81bbac30 T i915_vma_unpin_iomap +ffffffff81bbacc0 T i915_vma_unpin_and_release +ffffffff81bbad30 T i915_vma_misplaced +ffffffff81bbadd0 T __i915_vma_set_map_and_fenceable +ffffffff81bbae50 T i915_gem_valid_gtt_space +ffffffff81bbaee0 T vma_invalidate_tlb +ffffffff81bbaf20 T i915_vma_pin_ww +ffffffff81bbb940 T i915_ggtt_pin +ffffffff81bbba20 t __i915_ggtt_pin +ffffffff81bbbb80 t i915_gem_object_lock +ffffffff81bbbd90 T i915_vma_close +ffffffff81bbbe60 T i915_vma_reopen +ffffffff81bbbee0 T i915_vma_destroy_locked +ffffffff81bbbfd0 t release_references +ffffffff81bbc100 T i915_vma_destroy +ffffffff81bbc240 T i915_vma_parked +ffffffff81bbc520 T i915_vma_revoke_mmap +ffffffff81bbc620 T _i915_vma_move_to_active +ffffffff81bbc850 T __i915_vma_evict +ffffffff81bbcbc0 T __i915_vma_unbind +ffffffff81bbcc60 T i915_vma_unbind +ffffffff81bbcdb0 T i915_vma_unbind_async +ffffffff81bbcfa0 T i915_vma_unbind_unlocked +ffffffff81bbd0b0 T i915_vma_make_unshrinkable +ffffffff81bbd0f0 T i915_vma_make_shrinkable +ffffffff81bbd110 T i915_vma_make_purgeable +ffffffff81bbd130 T i915_vma_module_exit +ffffffff81bbd150 T i915_vma_module_init +ffffffff81bbd1b0 t __i915_vma_active +ffffffff81bbd200 t __i915_vma_retire +ffffffff81bbd250 t __vma_bind +ffffffff81bbd2f0 t __vma_release +ffffffff81bbd370 t intel_rotate_pages +ffffffff81bbd6b0 t intel_remap_pages +ffffffff81bbda70 t intel_partial_pages +ffffffff81bbe000 T i915_vma_resource_alloc +ffffffff81bbe050 T i915_vma_resource_free +ffffffff81bbe090 T i915_vma_resource_unhold +ffffffff81bbe0a0 t __i915_vma_resource_unhold +ffffffff81bbe190 T i915_vma_resource_hold +ffffffff81bbe1e0 T i915_vma_resource_unbind +ffffffff81bbe310 T __i915_vma_resource_init +ffffffff81bbe370 t i915_vma_resource_fence_notify +ffffffff81bbe440 T i915_vma_resource_bind_dep_sync +ffffffff81bbe5c0 T i915_vma_resource_bind_dep_sync_all +ffffffff81bbe660 T i915_vma_resource_bind_dep_await +ffffffff81bbe800 T i915_vma_resource_module_exit +ffffffff81bbe820 T i915_vma_resource_module_init +ffffffff81bbe880 t get_driver_name +ffffffff81bbe8b0 t get_timeline_name +ffffffff81bbe8e0 t unbind_fence_release +ffffffff81bbe920 t i915_vma_resource_unbind_work +ffffffff81bbf000 T intel_platform_name +ffffffff81bbf0a0 T intel_device_info_print +ffffffff81bbfd30 T intel_device_info_subplatform_init +ffffffff81bc0090 T intel_device_info_runtime_init +ffffffff81bc0770 T intel_driver_caps_print +ffffffff81bc1000 T intel_dram_detect +ffffffff81bc1480 t skl_get_dram_info +ffffffff81bc1660 T intel_dram_edram_detect +ffffffff81bc16f0 t icl_pcode_read_mem_global_info +ffffffff81bc17d0 t skl_dram_get_channel_info +ffffffff81bc19a0 t skl_dram_get_dimm_info +ffffffff81bc2000 T intel_memory_region_lookup +ffffffff81bc20e0 T intel_memory_region_by_type +ffffffff81bc21a0 T intel_memory_region_reserve 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T intel_runtime_pm_get_raw +ffffffff81bd3090 T intel_runtime_pm_get +ffffffff81bd3140 T intel_runtime_pm_get_if_in_use +ffffffff81bd31f0 T intel_runtime_pm_get_if_active +ffffffff81bd32a0 T intel_runtime_pm_get_noresume +ffffffff81bd33d0 T intel_runtime_pm_put_raw +ffffffff81bd3460 T intel_runtime_pm_put_unchecked +ffffffff81bd3520 T intel_runtime_pm_enable +ffffffff81bd3550 T intel_runtime_pm_disable +ffffffff81bd3580 T intel_runtime_pm_driver_release +ffffffff81bd3610 T intel_runtime_pm_init_early +ffffffff81bd4000 T intel_sbi_read +ffffffff81bd4050 t intel_sbi_rw +ffffffff81bd4240 T intel_sbi_write +ffffffff81bd5000 T intel_step_init +ffffffff81bd5400 T intel_step_name +ffffffff81bd5440 t pvc_step_lookup +ffffffff81bd6000 T gen3_stolen_base +ffffffff81bd6050 T gen11_stolen_base +ffffffff81bd60d0 T i830_stolen_size +ffffffff81bd6150 T gen3_stolen_size +ffffffff81bd61c0 T gen6_stolen_size +ffffffff81bd6210 T chv_stolen_size +ffffffff81bd6280 T gen8_stolen_size +ffffffff81bd62e0 T gen9_stolen_size +ffffffff81bd6350 T intel_init_stolen_res +ffffffff81bd7000 T intel_uncore_mmio_debug_init_early +ffffffff81bd7060 T intel_uncore_forcewake_domain_to_str +ffffffff81bd70d0 T intel_uncore_fw_release_timer +ffffffff81bd71f0 T intel_uncore_suspend +ffffffff81bd7240 t intel_uncore_forcewake_reset +ffffffff81bd7520 T intel_uncore_resume_early +ffffffff81bd7650 T intel_uncore_unclaimed_mmio +ffffffff81bd76c0 T intel_uncore_runtime_resume +ffffffff81bd76f0 T intel_uncore_forcewake_get +ffffffff81bd7860 T intel_uncore_forcewake_user_get +ffffffff81bd7980 T intel_uncore_forcewake_get__locked +ffffffff81bd7a50 T intel_uncore_forcewake_user_put +ffffffff81bd7b90 T intel_uncore_forcewake_put__locked +ffffffff81bd7c90 T intel_uncore_forcewake_put +ffffffff81bd7db0 T intel_uncore_forcewake_put_delayed +ffffffff81bd7f00 T intel_uncore_forcewake_flush +ffffffff81bd7fb0 T assert_forcewakes_inactive +ffffffff81bd8020 T assert_forcewakes_active +ffffffff81bd8050 T intel_uncore_setup_mmio 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vlv_cck_write +ffffffff81be04c0 T vlv_ccu_read +ffffffff81be0510 T vlv_ccu_write +ffffffff81be0560 T vlv_dpio_read +ffffffff81be0630 T vlv_dpio_write +ffffffff81be06a0 T vlv_flisdsi_read +ffffffff81be06f0 T vlv_flisdsi_write +ffffffff81be1000 T vlv_suspend_complete +ffffffff81be1a50 T vlv_resume_prepare +ffffffff81be2490 T vlv_suspend_init +ffffffff81be2500 T vlv_suspend_cleanup +ffffffff81be2560 t vlv_wait_for_pw_status +ffffffff81be3000 T atom_execute_table_scratch_unlocked +ffffffff81be30a0 t atom_execute_table_locked +ffffffff81be33d0 T atom_execute_table +ffffffff81be3480 T atom_parse +ffffffff81be3660 T atom_destroy +ffffffff81be36a0 T atom_asic_init +ffffffff81be38b0 T atom_parse_data_header +ffffffff81be3950 T atom_parse_cmd_header +ffffffff81be39d0 T atom_allocate_fb_scratch +ffffffff81be3aa0 t atom_op_move +ffffffff81be3c80 t atom_op_and +ffffffff81be3e60 t atom_op_or +ffffffff81be4040 t atom_op_shift_left +ffffffff81be4230 t atom_op_shift_right +ffffffff81be4420 t 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atombios_set_edp_panel_power +ffffffff81befa80 T radeon_atom_release_dig_encoder +ffffffff81befac0 T radeon_atom_pick_dig_encoder +ffffffff81befd00 T radeon_atom_encoder_init +ffffffff81befdd0 t atombios_external_encoder_setup +ffffffff81bf0030 T radeon_atom_ext_encoder_setup_ddc +ffffffff81bf0080 T radeon_enc_destroy +ffffffff81bf0130 T radeon_add_atom_encoder +ffffffff81bf0570 t radeon_atom_backlight_update_status +ffffffff81bf05d0 t radeon_atom_encoder_dpms +ffffffff81bf08e0 t radeon_atom_mode_fixup +ffffffff81bf0a20 t radeon_atom_encoder_prepare +ffffffff81bf0f00 t radeon_atom_encoder_commit +ffffffff81bf0f30 t radeon_atom_encoder_mode_set +ffffffff81bf14e0 t radeon_atom_dig_detect +ffffffff81bf15f0 t radeon_atom_encoder_disable +ffffffff81bf1890 t radeon_atom_encoder_dpms_avivo +ffffffff81bf1ac0 t radeon_atom_encoder_dpms_dig +ffffffff81bf1fc0 t radeon_atom_dac_detect +ffffffff81bf21b0 t radeon_atom_ext_dpms +ffffffff81bf21e0 t radeon_atom_ext_prepare +ffffffff81bf2210 t radeon_atom_ext_commit +ffffffff81bf2240 t radeon_atom_ext_mode_set +ffffffff81bf2270 t radeon_atom_ext_disable +ffffffff81bf3000 T radeon_atom_hw_i2c_xfer +ffffffff81bf3160 t radeon_process_i2c_ch +ffffffff81bf3330 T radeon_atom_hw_i2c_func +ffffffff81bf4000 T btc_get_max_clock_from_voltage_dependency_table +ffffffff81bf40d0 T btc_apply_voltage_dependency_rules +ffffffff81bf4140 T btc_skip_blacklist_clocks +ffffffff81bf4240 T btc_adjust_clock_combinations +ffffffff81bf4350 T btc_apply_voltage_delta_rules +ffffffff81bf4480 T btc_program_mgcg_hw_sequence +ffffffff81bf4580 T btc_dpm_enabled +ffffffff81bf4590 T btc_notify_uvd_to_smc +ffffffff81bf4600 T btc_reset_to_default +ffffffff81bf4650 T btc_read_arb_registers +ffffffff81bf46e0 T btc_dpm_vblank_too_short +ffffffff81bf4750 T btc_dpm_pre_set_power_state +ffffffff81bf5630 T btc_dpm_set_power_state +ffffffff81bf5a40 T btc_dpm_post_set_power_state +ffffffff81bf5b60 T btc_dpm_enable +ffffffff81bf6d70 T btc_dpm_disable +ffffffff81bf72a0 T btc_dpm_setup_asic +ffffffff81bf7380 T btc_dpm_init +ffffffff81bf7780 T btc_dpm_fini +ffffffff81bf7830 T btc_dpm_debugfs_print_current_performance_level +ffffffff81bf7880 T btc_dpm_get_current_sclk +ffffffff81bf7900 T btc_dpm_get_current_mclk +ffffffff81bf7980 T btc_dpm_get_sclk +ffffffff81bf79d0 T btc_dpm_get_mclk +ffffffff81bf8000 T ci_dpm_powergate_uvd +ffffffff81bf8380 T ci_dpm_vblank_too_short +ffffffff81bf8410 T ci_fan_ctrl_get_fan_speed_percent +ffffffff81bf84b0 T ci_fan_ctrl_set_fan_speed_percent +ffffffff81bf8580 T ci_fan_ctrl_set_mode +ffffffff81bf8710 t ci_fan_ctrl_set_static_mode +ffffffff81bf87d0 t ci_thermal_start_smc_fan_control +ffffffff81bf8a10 T ci_fan_ctrl_get_mode +ffffffff81bf8a70 T ci_dpm_force_performance_level +ffffffff81bf9330 t ci_upload_dpm_level_enable_mask +ffffffff81bf9660 T ci_dpm_pre_set_power_state +ffffffff81bf9960 T ci_dpm_post_set_power_state +ffffffff81bf9a30 T ci_dpm_setup_asic +ffffffff81bf9c30 T ci_dpm_enable +ffffffff81bfda60 t ci_enable_didt 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ci_stop_smc_clock +ffffffff81c03340 T ci_start_smc_clock +ffffffff81c03380 T ci_is_smc_running +ffffffff81c033f0 T ci_load_smc_ucode +ffffffff81c03580 T ci_read_smc_sram_dword +ffffffff81c03650 T ci_write_smc_sram_dword +ffffffff81c04000 T cik_get_allowed_info_register +ffffffff81c040a0 T cik_didt_rreg +ffffffff81c04140 T cik_didt_wreg +ffffffff81c041c0 T ci_get_temp +ffffffff81c04210 T kv_get_temp +ffffffff81c04260 T cik_pciep_rreg +ffffffff81c042e0 T cik_pciep_wreg +ffffffff81c04350 T cik_get_xclk +ffffffff81c043c0 T cik_mm_rdoorbell +ffffffff81c04420 T cik_mm_wdoorbell +ffffffff81c04470 T ci_mc_load_microcode +ffffffff81c047c0 T cik_ring_test +ffffffff81c04a70 T cik_fence_gfx_ring_emit +ffffffff81c04e70 T cik_fence_compute_ring_emit +ffffffff81c05100 T cik_semaphore_ring_emit +ffffffff81c052d0 T cik_copy_cpdma +ffffffff81c056d0 T cik_ring_ib_execute +ffffffff81c05cb0 T cik_ib_test +ffffffff81c05f90 T cik_gfx_get_rptr +ffffffff81c05ff0 T cik_gfx_get_wptr +ffffffff81c06030 T cik_gfx_set_wptr +ffffffff81c06070 T cik_compute_get_rptr +ffffffff81c06150 T cik_compute_get_wptr +ffffffff81c06230 T cik_compute_set_wptr +ffffffff81c062b0 T cik_gpu_check_soft_reset +ffffffff81c06420 T cik_asic_reset +ffffffff81c06830 t cik_gpu_pci_config_reset +ffffffff81c07050 T cik_gfx_is_lockup +ffffffff81c070c0 T cik_pcie_gart_tlb_flush +ffffffff81c07110 T cik_ib_parse +ffffffff81c07140 T cik_vm_init +ffffffff81c071a0 T cik_vm_fini +ffffffff81c071d0 T cik_vm_flush +ffffffff81c07f20 T cik_enter_rlc_safe_mode +ffffffff81c08010 T cik_exit_rlc_safe_mode +ffffffff81c08050 T cik_update_cg +ffffffff81c08520 t cik_enable_mgcg +ffffffff81c08a40 t cik_enable_cgcg +ffffffff81c08db0 T cik_init_cp_pg_table +ffffffff81c09070 T cik_get_csb_size +ffffffff81c09100 T cik_get_csb_buffer +ffffffff81c092a0 T cik_irq_set +ffffffff81c0a040 t cik_disable_interrupt_state +ffffffff81c0a500 T cik_irq_process +ffffffff81c0bcb0 t cik_irq_ack +ffffffff81c0c630 T cik_resume +ffffffff81c0c6c0 t cik_init_golden_registers +ffffffff81c0c880 t cik_startup +ffffffff81c125d0 T cik_suspend +ffffffff81c129c0 T cik_init +ffffffff81c131b0 t cik_init_microcode +ffffffff81c141c0 t cik_pcie_gart_fini +ffffffff81c142c0 T cik_fini +ffffffff81c14660 T dce8_program_fmt +ffffffff81c14790 T dce8_bandwidth_update +ffffffff81c153b0 T cik_get_gpu_clock_counter +ffffffff81c15480 T cik_set_uvd_clocks +ffffffff81c15500 t cik_set_uvd_clock +ffffffff81c15670 T cik_set_vce_clocks +ffffffff81c158b0 t cik_wait_for_rlc_serdes +ffffffff81c15a80 t radeon_bo_reserve +ffffffff81c15c00 t radeon_bo_unreserve +ffffffff81c15ce0 t cik_update_gfx_pg +ffffffff81c15e80 t cik_compute_stop +ffffffff81c15ff0 t cik_cp_compute_fini +ffffffff81c16190 t dce8_latency_watermark +ffffffff81c17000 T cik_sdma_get_rptr +ffffffff81c17070 T cik_sdma_get_wptr +ffffffff81c170c0 T cik_sdma_set_wptr +ffffffff81c17110 T cik_sdma_ring_ib_execute +ffffffff81c174f0 T cik_sdma_fence_ring_emit +ffffffff81c176d0 t cik_sdma_hdp_flush_ring_emit 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+ffffffff81c1a5c0 T cypress_get_strobe_mode_settings +ffffffff81c1a6c0 T cypress_get_mclk_frequency_ratio +ffffffff81c1a770 T cypress_map_clkf_to_ibias +ffffffff81c1a830 T cypress_convert_power_level_to_smc +ffffffff81c1abf0 t cypress_populate_mclk_value +ffffffff81c1afc0 T cypress_upload_sw_state +ffffffff81c1b140 T cypress_upload_mc_reg_table +ffffffff81c1b200 t cypress_convert_mc_reg_table_to_smc +ffffffff81c1b4a0 T cypress_calculate_burst_time +ffffffff81c1b530 T cypress_program_memory_timing_parameters +ffffffff81c1b6e0 T cypress_populate_smc_initial_state +ffffffff81c1ba80 T cypress_populate_smc_acpi_state +ffffffff81c1be10 T cypress_construct_voltage_tables +ffffffff81c1bec0 t cypress_trim_voltage_table_to_fit_state_table +ffffffff81c1c0b0 T cypress_populate_smc_voltage_tables +ffffffff81c1c200 T cypress_get_mvdd_configuration +ffffffff81c1c2c0 T cypress_populate_mc_reg_table +ffffffff81c1c520 T cypress_get_table_locations +ffffffff81c1c600 T cypress_enable_display_gap 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dce6_audio_get_pin +ffffffff81c20340 T dce6_afmt_select_pin +ffffffff81c203d0 T dce6_afmt_write_latency_fields +ffffffff81c20490 T dce6_afmt_hdmi_write_speaker_allocation +ffffffff81c20560 T dce6_afmt_dp_write_speaker_allocation +ffffffff81c20630 T dce6_afmt_write_sad_regs +ffffffff81c20770 T dce6_audio_enable +ffffffff81c207c0 T dce6_hdmi_audio_set_dto +ffffffff81c20830 T dce6_dp_audio_set_dto +ffffffff81c21000 T eg_cg_rreg +ffffffff81c21080 t r100_mm_rreg +ffffffff81c210d0 T eg_cg_wreg +ffffffff81c21140 T eg_pif_phy0_rreg +ffffffff81c211c0 T eg_pif_phy0_wreg +ffffffff81c21220 T eg_pif_phy1_rreg +ffffffff81c212a0 T eg_pif_phy1_wreg +ffffffff81c21300 T evergreen_get_allowed_info_register +ffffffff81c21390 T evergreen_tiling_fields +ffffffff81c21430 T sumo_set_uvd_clocks +ffffffff81c21510 t sumo_set_uvd_clock +ffffffff81c216d0 T evergreen_set_uvd_clocks +ffffffff81c21c70 T evergreen_fix_pci_max_read_req_size +ffffffff81c21e20 T dce4_program_fmt +ffffffff81c21f40 T dce4_wait_for_vblank +ffffffff81c221c0 T evergreen_page_flip +ffffffff81c22350 T evergreen_page_flip_pending +ffffffff81c223c0 T evergreen_get_temp +ffffffff81c22490 T sumo_get_temp +ffffffff81c224e0 T sumo_pm_init_profile +ffffffff81c22620 T btc_pm_init_profile +ffffffff81c22730 T evergreen_pm_misc +ffffffff81c228d0 T evergreen_pm_prepare +ffffffff81c229d0 T evergreen_pm_finish +ffffffff81c22ad0 T evergreen_hpd_sense +ffffffff81c22b40 T evergreen_hpd_set_polarity +ffffffff81c22c80 T evergreen_hpd_init +ffffffff81c22d50 T evergreen_hpd_fini +ffffffff81c22df0 T evergreen_get_number_of_dram_channels +ffffffff81c22e40 T evergreen_bandwidth_update +ffffffff81c23000 t evergreen_line_buffer_adjust +ffffffff81c23200 t evergreen_program_watermarks +ffffffff81c23cb0 T evergreen_mc_wait_for_idle +ffffffff81c23d50 T evergreen_pcie_gart_tlb_flush +ffffffff81c23e30 T evergreen_mc_stop +ffffffff81c24920 T evergreen_mc_resume +ffffffff81c25030 T evergreen_mc_program +ffffffff81c25440 T evergreen_ring_ib_execute +ffffffff81c258e0 T evergreen_mc_init +ffffffff81c25a20 T evergreen_print_gpu_status_regs +ffffffff81c25a50 T evergreen_is_display_hung +ffffffff81c25c60 T evergreen_gpu_check_soft_reset +ffffffff81c25dc0 T evergreen_gpu_pci_config_reset +ffffffff81c25f40 T evergreen_asic_reset +ffffffff81c26260 T evergreen_gfx_is_lockup +ffffffff81c262d0 T sumo_rlc_fini +ffffffff81c26490 t radeon_bo_reserve +ffffffff81c26610 t radeon_bo_unreserve +ffffffff81c266f0 T sumo_rlc_init +ffffffff81c26ee0 T evergreen_rlc_resume +ffffffff81c27250 T evergreen_get_vblank_counter +ffffffff81c272c0 T evergreen_disable_interrupt_state +ffffffff81c27590 T evergreen_irq_set +ffffffff81c27b50 T evergreen_irq_suspend +ffffffff81c27ba0 T evergreen_irq_process +ffffffff81c286a0 t evergreen_irq_ack +ffffffff81c28da0 T evergreen_resume +ffffffff81c28e80 t evergreen_init_golden_registers +ffffffff81c29090 t evergreen_startup +ffffffff81c2b720 T evergreen_suspend +ffffffff81c2b8c0 T evergreen_init +ffffffff81c2bde0 T evergreen_fini +ffffffff81c2bfd0 T evergreen_pcie_gen2_enable +ffffffff81c2c200 T evergreen_program_aspm +ffffffff81c2c8a0 t evergreen_latency_watermark +ffffffff81c2d000 T evergreen_cs_parse +ffffffff81c2f8c0 T evergreen_dma_cs_parse +ffffffff81c30b00 T evergreen_ib_parse +ffffffff81c30fb0 T evergreen_dma_ib_parse +ffffffff81c31170 t evergreen_cs_track_check +ffffffff81c32190 t evergreen_cs_handle_reg +ffffffff81c340d0 t evergreen_surface_value_conv_check +ffffffff81c343b0 t evergreen_surface_check +ffffffff81c34850 t evergreen_cs_track_validate_htile +ffffffff81c34af0 t evergreen_vm_reg_valid +ffffffff81c35000 T evergreen_dma_fence_ring_emit +ffffffff81c352c0 T evergreen_dma_ring_ib_execute +ffffffff81c35600 T evergreen_copy_dma +ffffffff81c359b0 T evergreen_dma_is_lockup +ffffffff81c36000 T dce4_audio_enable +ffffffff81c36080 T evergreen_hdmi_update_acr +ffffffff81c362a0 T dce4_afmt_write_latency_fields +ffffffff81c36310 T dce4_afmt_hdmi_write_speaker_allocation +ffffffff81c36380 T dce4_afmt_dp_write_speaker_allocation +ffffffff81c363f0 T evergreen_hdmi_write_sad_regs +ffffffff81c36510 T evergreen_set_avi_packet +ffffffff81c366b0 T dce4_hdmi_audio_set_dto +ffffffff81c36790 T dce4_dp_audio_set_dto +ffffffff81c36880 T dce4_set_vbi_packet +ffffffff81c368f0 T dce4_hdmi_set_color_depth +ffffffff81c36a40 T dce4_set_audio_packet +ffffffff81c36c50 T dce4_set_mute +ffffffff81c36d60 T evergreen_hdmi_enable +ffffffff81c37090 T evergreen_dp_enable +ffffffff81c38000 T kv_dpm_enable_bapm +ffffffff81c38070 T kv_dpm_enable +ffffffff81c395c0 t kv_enable_didt +ffffffff81c39860 T kv_dpm_late_enable +ffffffff81c39a50 T kv_dpm_powergate_uvd +ffffffff81c39bc0 T kv_dpm_disable +ffffffff81c39f30 T kv_dpm_force_performance_level +ffffffff81c3a0c0 t kv_force_dpm_lowest +ffffffff81c3a190 T kv_dpm_pre_set_power_state +ffffffff81c3a720 T kv_dpm_set_power_state +ffffffff81c3aed0 t kv_set_valid_clock_range +ffffffff81c3b090 t kv_calculate_ds_divider +ffffffff81c3b200 t kv_calculate_nbps_level_settings +ffffffff81c3b390 t kv_update_vce_dpm +ffffffff81c3b570 T kv_dpm_post_set_power_state +ffffffff81c3b610 T kv_dpm_setup_asic +ffffffff81c3b670 T kv_dpm_init +ffffffff81c3bf10 T kv_dpm_debugfs_print_current_performance_level +ffffffff81c3bf80 T kv_dpm_get_current_sclk +ffffffff81c3bff0 T kv_dpm_get_current_mclk +ffffffff81c3c020 T kv_dpm_print_power_state +ffffffff81c3c0c0 T kv_dpm_fini +ffffffff81c3c160 T kv_dpm_display_configuration_changed +ffffffff81c3c190 T kv_dpm_get_sclk +ffffffff81c3c1e0 T kv_dpm_get_mclk +ffffffff81c3d000 T kv_notify_message_to_smu +ffffffff81c3d0c0 T kv_dpm_get_enable_mask +ffffffff81c3d1a0 T kv_send_msg_to_smc_with_parameter +ffffffff81c3d270 T kv_read_smc_sram_dword +ffffffff81c3d300 T kv_smc_dpm_enable +ffffffff81c3d430 T kv_smc_bapm_enable +ffffffff81c3d560 T kv_copy_bytes_to_smc +ffffffff81c3e000 T tn_smc_rreg +ffffffff81c3e080 T tn_smc_wreg +ffffffff81c3e0f0 T ni_mc_load_microcode +ffffffff81c3e2e0 T ni_init_microcode +ffffffff81c3e820 T cayman_get_allowed_info_register +ffffffff81c3e8b0 T tn_get_temp +ffffffff81c3e940 T cayman_pcie_gart_tlb_flush +ffffffff81c3e990 T cayman_cp_int_cntl_setup +ffffffff81c3e9e0 T cayman_fence_ring_emit +ffffffff81c3ed90 T cayman_ring_ib_execute +ffffffff81c3f210 T cayman_gfx_get_rptr +ffffffff81c3f2a0 T cayman_gfx_get_wptr +ffffffff81c3f310 T cayman_gfx_set_wptr +ffffffff81c3f390 T cayman_gpu_check_soft_reset +ffffffff81c3f510 T cayman_asic_reset +ffffffff81c3f810 T cayman_gfx_is_lockup +ffffffff81c3f880 T cayman_resume +ffffffff81c3f910 t ni_init_golden_registers +ffffffff81c3f9f0 t cayman_startup +ffffffff81c42120 T cayman_suspend +ffffffff81c42310 T cayman_init +ffffffff81c42910 T cayman_fini +ffffffff81c42b90 T cayman_vm_init +ffffffff81c42bf0 T cayman_vm_fini +ffffffff81c42c20 T cayman_vm_decode_fault +ffffffff81c42cb0 T cayman_vm_flush +ffffffff81c43130 T tn_set_vce_clocks +ffffffff81c44000 T cayman_dma_get_rptr +ffffffff81c44070 T cayman_dma_get_wptr +ffffffff81c440c0 T cayman_dma_set_wptr +ffffffff81c44110 T cayman_dma_ring_ib_execute +ffffffff81c444a0 T cayman_dma_stop +ffffffff81c44550 T cayman_dma_resume +ffffffff81c447a0 T cayman_dma_fini +ffffffff81c44860 T cayman_dma_is_lockup +ffffffff81c448e0 T cayman_dma_vm_copy_pages +ffffffff81c449d0 T cayman_dma_vm_write_pages +ffffffff81c44b30 T cayman_dma_vm_set_pages +ffffffff81c44c90 T cayman_dma_vm_pad_ib +ffffffff81c44ce0 T cayman_dma_vm_flush +ffffffff81c46000 T ni_get_pi +ffffffff81c46030 T ni_get_ps +ffffffff81c46060 T ni_dpm_vblank_too_short +ffffffff81c460d0 T ni_dpm_force_performance_level +ffffffff81c46220 T ni_copy_and_switch_arb_sets +ffffffff81c46500 T ni_set_uvd_clock_before_set_eng_clock +ffffffff81c46580 T ni_set_uvd_clock_after_set_eng_clock +ffffffff81c46600 T ni_dpm_setup_asic +ffffffff81c46810 T ni_update_current_ps +ffffffff81c468d0 T ni_update_requested_ps +ffffffff81c46990 T ni_dpm_enable +ffffffff81c49bd0 t ni_populate_smc_tdp_limits +ffffffff81c49d90 T ni_dpm_disable +ffffffff81c4a150 T ni_dpm_pre_set_power_state +ffffffff81c4a730 T ni_dpm_set_power_state +ffffffff81c4b850 T ni_dpm_post_set_power_state +ffffffff81c4b920 T ni_dpm_init +ffffffff81c4c2f0 T ni_dpm_fini +ffffffff81c4c3a0 T ni_dpm_print_power_state +ffffffff81c4c470 T ni_dpm_debugfs_print_current_performance_level +ffffffff81c4c4b0 T ni_dpm_get_current_sclk +ffffffff81c4c520 T ni_dpm_get_current_mclk +ffffffff81c4c590 T ni_dpm_get_sclk +ffffffff81c4c5f0 T ni_dpm_get_mclk +ffffffff81c4c650 t ni_do_program_memory_timing_parameters +ffffffff81c4c780 t ni_calculate_sclk_params +ffffffff81c4c9a0 t ni_calculate_power_boost_limit +ffffffff81c4cb50 t ni_populate_mclk_value +ffffffff81c4d000 T r100_wait_for_vblank +ffffffff81c4d1a0 T r100_page_flip +ffffffff81c4d450 T r100_page_flip_pending +ffffffff81c4d500 T r100_pm_get_dynpm_state +ffffffff81c4d720 T r100_pm_init_profile +ffffffff81c4d800 T r100_pm_misc +ffffffff81c4dc40 T r100_pm_prepare +ffffffff81c4dd00 T r100_pm_finish +ffffffff81c4ddc0 T r100_gui_idle +ffffffff81c4de00 T r100_hpd_sense +ffffffff81c4de60 T r100_hpd_set_polarity +ffffffff81c4df20 T r100_hpd_init +ffffffff81c4dfc0 T r100_hpd_fini +ffffffff81c4e020 T r100_pci_gart_tlb_flush +ffffffff81c4e050 T r100_pci_gart_init +ffffffff81c4e120 T r100_pci_gart_get_page_entry +ffffffff81c4e150 T r100_pci_gart_set_page +ffffffff81c4e190 T r100_pci_gart_enable +ffffffff81c4e280 T r100_pci_gart_disable +ffffffff81c4e300 T r100_pci_gart_fini +ffffffff81c4e380 T r100_irq_set +ffffffff81c4e460 T r100_irq_disable +ffffffff81c4e4d0 T r100_irq_process +ffffffff81c4e7d0 T r100_get_vblank_counter +ffffffff81c4e820 T r100_fence_ring_emit +ffffffff81c4ec90 T r100_semaphore_ring_emit +ffffffff81c4ecc0 T r100_copy_blit +ffffffff81c4f360 T r100_ring_start +ffffffff81c4f450 T r100_gfx_get_rptr +ffffffff81c4f4b0 T r100_gfx_get_wptr +ffffffff81c4f4f0 T r100_gfx_set_wptr +ffffffff81c4f530 T r100_cp_init +ffffffff81c4fa60 T r100_debugfs_cp_init +ffffffff81c4fa90 T r100_cp_fini +ffffffff81c4fb30 T r100_cp_disable +ffffffff81c4fc70 T r100_gui_wait_for_idle +ffffffff81c4fd60 T r100_reloc_pitch_offset +ffffffff81c4fe90 T r100_packet3_load_vbpntr +ffffffff81c50130 T r100_cs_parse_packet0 +ffffffff81c50240 T r100_cs_packet_parse_vline +ffffffff81c50430 T r100_cs_track_check_pkt3_indx_buffer +ffffffff81c504b0 T r100_cs_parse +ffffffff81c51970 T r100_cs_track_clear +ffffffff81c51d00 T r100_cs_track_check +ffffffff81c526f0 T r100_mc_wait_for_idle +ffffffff81c52790 T r100_gpu_is_lockup +ffffffff81c527f0 T r100_enable_bm +ffffffff81c52840 T r100_bm_disable +ffffffff81c528f0 T r100_asic_reset +ffffffff81c52c20 T r100_mc_stop +ffffffff81c52de0 T r100_mc_resume +ffffffff81c52ea0 T r100_set_common_regs +ffffffff81c53050 T r100_vram_init_sizes +ffffffff81c53240 T r100_vga_set_state +ffffffff81c532a0 T r100_pll_errata_after_index +ffffffff81c532e0 T r100_pll_rreg +ffffffff81c53410 T r100_pll_wreg +ffffffff81c53520 T r100_debugfs_rbbm_init +ffffffff81c53550 T r100_debugfs_mc_info_init +ffffffff81c53580 T r100_set_surface_reg +ffffffff81c53790 T r100_clear_surface_reg +ffffffff81c53840 T r100_bandwidth_update +ffffffff81c542f0 T r100_ring_test +ffffffff81c545b0 T r100_ring_ib_execute +ffffffff81c54810 T r100_ib_test +ffffffff81c54b50 T r100_vga_render_disable +ffffffff81c54bb0 T r100_resume +ffffffff81c54db0 t r100_startup +ffffffff81c552e0 T r100_suspend +ffffffff81c553c0 T r100_fini +ffffffff81c554d0 T r100_restore_sanity +ffffffff81c55570 T r100_init +ffffffff81c55af0 T r100_mm_rreg_slow +ffffffff81c55b70 T r100_mm_wreg_slow +ffffffff81c55bd0 T r100_io_rreg +ffffffff81c55c70 T r100_io_wreg +ffffffff81c55ce0 t r100_cs_track_texture_print +ffffffff81c56000 T r200_copy_dma +ffffffff81c56470 T r200_packet0_check +ffffffff81c57490 T r200_set_safe_registers +ffffffff81c58000 T rv370_pcie_rreg +ffffffff81c58080 T rv370_pcie_wreg +ffffffff81c580f0 T rv370_pcie_gart_tlb_flush +ffffffff81c582f0 T rv370_pcie_gart_get_page_entry +ffffffff81c58350 T rv370_pcie_gart_set_page +ffffffff81c58390 T rv370_pcie_gart_init +ffffffff81c58460 T rv370_pcie_gart_enable +ffffffff81c587c0 T rv370_pcie_gart_disable +ffffffff81c58940 T rv370_pcie_gart_fini +ffffffff81c58970 T r300_fence_ring_emit +ffffffff81c58f00 T r300_ring_start +ffffffff81c59910 T r300_mc_wait_for_idle +ffffffff81c599b0 T r300_asic_reset +ffffffff81c59bd0 T r300_mc_init +ffffffff81c59c80 T rv370_set_pcie_lanes +ffffffff81c59e40 T rv370_get_pcie_lanes +ffffffff81c59ef0 T r300_cs_parse +ffffffff81c5a260 t r300_packet0_check +ffffffff81c5b0c0 T r300_set_reg_safe +ffffffff81c5b100 T r300_mc_program +ffffffff81c5b280 T r300_clock_startup +ffffffff81c5b310 T r300_resume +ffffffff81c5b4e0 t r300_startup +ffffffff81c5b840 T r300_suspend +ffffffff81c5b8c0 T r300_fini +ffffffff81c5b9a0 T r300_init +ffffffff81c5c000 T r420_pm_init_profile +ffffffff81c5c0f0 T r420_pipes_init +ffffffff81c5c2d0 T r420_mc_rreg +ffffffff81c5c350 T r420_mc_wreg +ffffffff81c5c3c0 T r420_resume +ffffffff81c5c5a0 t r420_startup +ffffffff81c5c940 T r420_suspend +ffffffff81c5cae0 T r420_fini +ffffffff81c5cbc0 T r420_init +ffffffff81c5ce40 T r420_debugfs_pipes_info_init +ffffffff81c5d000 T r520_mc_wait_for_idle +ffffffff81c5d0a0 T r520_resume +ffffffff81c5d1a0 t r520_startup +ffffffff81c5d590 T r520_init +ffffffff81c5e000 T r600_rcu_rreg +ffffffff81c5e080 T r600_rcu_wreg +ffffffff81c5e0f0 T r600_uvd_ctx_rreg +ffffffff81c5e170 T r600_uvd_ctx_wreg +ffffffff81c5e1e0 T r600_get_allowed_info_register +ffffffff81c5e260 T r600_get_xclk +ffffffff81c5e290 T r600_set_uvd_clocks +ffffffff81c5e7f0 T dce3_program_fmt +ffffffff81c5e910 T rv6xx_get_temp +ffffffff81c5e960 T r600_pm_get_dynpm_state +ffffffff81c5ed60 T rs780_pm_init_profile +ffffffff81c5ee70 T r600_pm_init_profile +ffffffff81c5f110 T r600_pm_misc +ffffffff81c5f1f0 T r600_gui_idle +ffffffff81c5f230 T r600_hpd_sense +ffffffff81c5f350 T r600_hpd_set_polarity +ffffffff81c5f5c0 T r600_hpd_init +ffffffff81c5f7d0 T r600_hpd_fini +ffffffff81c5f980 T r600_pcie_gart_tlb_flush +ffffffff81c5fac0 T r600_pcie_gart_init +ffffffff81c5fb60 T r600_mc_wait_for_idle +ffffffff81c5fc00 T rs780_mc_rreg +ffffffff81c5fca0 T rs780_mc_wreg +ffffffff81c5fd30 T r600_vram_scratch_init +ffffffff81c5fe30 t radeon_bo_reserve +ffffffff81c5ffb0 t radeon_bo_unreserve +ffffffff81c60090 T r600_vram_scratch_fini +ffffffff81c60110 T r600_set_bios_scratch_engine_hung +ffffffff81c60160 T r600_gpu_check_soft_reset +ffffffff81c604e0 T r600_asic_reset +ffffffff81c60870 t r600_gpu_pci_config_reset +ffffffff81c60a90 T r600_gfx_is_lockup +ffffffff81c60b00 T r6xx_remap_render_backend +ffffffff81c60cf0 T r600_count_pipe_bits +ffffffff81c60d60 T r600_pciep_rreg +ffffffff81c60de0 T r600_pciep_wreg +ffffffff81c60e50 T r600_cp_stop +ffffffff81c60ed0 T r600_init_microcode +ffffffff81c613a0 T r600_gfx_get_rptr +ffffffff81c61400 T r600_gfx_get_wptr +ffffffff81c61440 T r600_gfx_set_wptr +ffffffff81c61480 T r600_cp_start +ffffffff81c61800 T r600_cp_resume +ffffffff81c61b60 T r600_ring_init +ffffffff81c61c00 T r600_cp_fini +ffffffff81c61c90 T r600_scratch_init +ffffffff81c61d00 T r600_ring_test +ffffffff81c61fb0 T r600_fence_ring_emit +ffffffff81c62870 T r600_semaphore_ring_emit +ffffffff81c62a60 T r600_copy_cpdma +ffffffff81c63020 T r600_set_surface_reg +ffffffff81c63050 T r600_clear_surface_reg +ffffffff81c63080 T r600_vga_set_state +ffffffff81c630e0 T r600_resume +ffffffff81c63170 t r600_startup +ffffffff81c65180 T r600_suspend +ffffffff81c652f0 T r600_irq_suspend +ffffffff81c653b0 t r600_pcie_gart_disable +ffffffff81c655b0 T r600_init +ffffffff81c65da0 T r600_ih_ring_init +ffffffff81c65e10 T r600_irq_fini +ffffffff81c65f50 T r600_fini +ffffffff81c660e0 T r600_ring_ib_execute +ffffffff81c66560 T r600_ib_test +ffffffff81c66810 T r600_ih_ring_alloc +ffffffff81c66930 T r600_ih_ring_fini +ffffffff81c669c0 T r600_rlc_stop +ffffffff81c66b50 T r600_disable_interrupts +ffffffff81c66c00 T r600_irq_init +ffffffff81c67070 t r600_disable_interrupt_state +ffffffff81c67360 T r600_irq_disable +ffffffff81c67420 T r600_irq_set +ffffffff81c67ba0 t r600_irq_ack +ffffffff81c68090 T r600_irq_process +ffffffff81c68c90 T r600_mmio_hdp_flush +ffffffff81c68d10 T r600_set_pcie_lanes +ffffffff81c68e40 T r600_get_pcie_lanes +ffffffff81c68f20 T r600_get_gpu_clock_counter +ffffffff81c69000 T r600_fmt_is_valid_color +ffffffff81c69040 T r600_fmt_is_valid_texture +ffffffff81c69090 T r600_fmt_get_blocksize +ffffffff81c690d0 T r600_fmt_get_nblocksx +ffffffff81c69130 T r600_fmt_get_nblocksy +ffffffff81c69190 T r600_cs_common_vline_parse +ffffffff81c69460 T r600_mip_minify +ffffffff81c694c0 T r600_cs_parse +ffffffff81c6b450 T r600_dma_cs_next_reloc +ffffffff81c6b4d0 T r600_dma_cs_parse +ffffffff81c6bc00 t r600_cs_track_check +ffffffff81c6cd40 t r600_cs_check_reg +ffffffff81c6e000 T r600_dma_get_rptr +ffffffff81c6e060 T r600_dma_get_wptr +ffffffff81c6e0a0 T r600_dma_set_wptr +ffffffff81c6e0e0 T r600_dma_stop +ffffffff81c6e170 T r600_dma_resume +ffffffff81c6e380 T r600_dma_fini +ffffffff81c6e400 T r600_dma_is_lockup +ffffffff81c6e470 T r600_dma_ring_test +ffffffff81c6e6d0 T r600_dma_fence_ring_emit +ffffffff81c6e8c0 T r600_dma_semaphore_ring_emit +ffffffff81c6e9e0 T r600_dma_ib_test +ffffffff81c6ebf0 T r600_dma_ring_ib_execute +ffffffff81c6ef30 T r600_copy_dma +ffffffff81c70000 T r600_dpm_print_class_info +ffffffff81c702b0 T r600_dpm_print_cap_info +ffffffff81c70340 T r600_dpm_print_ps_status +ffffffff81c703d0 T r600_dpm_get_vblank_time +ffffffff81c70490 T r600_dpm_get_vrefresh +ffffffff81c70520 T r600_calculate_u_and_p +ffffffff81c705a0 T r600_calculate_at +ffffffff81c70650 T r600_gfx_clockgating_enable +ffffffff81c70760 T r600_dynamicpm_enable +ffffffff81c707c0 T r600_enable_thermal_protection +ffffffff81c70820 T r600_enable_acpi_pm +ffffffff81c70870 T r600_enable_dynamic_pcie_gen2 +ffffffff81c708d0 T r600_dynamicpm_enabled +ffffffff81c70910 T r600_enable_sclk_control +ffffffff81c70970 T r600_enable_mclk_control +ffffffff81c709d0 T r600_enable_spll_bypass +ffffffff81c70a30 T r600_wait_for_spll_change +ffffffff81c70ab0 T r600_set_bsp +ffffffff81c70af0 T r600_set_at +ffffffff81c70b50 T r600_set_tc +ffffffff81c70bb0 T r600_select_td +ffffffff81c70c70 T r600_set_vrc +ffffffff81c70cb0 T r600_set_tpu +ffffffff81c70d10 T r600_set_tpc +ffffffff81c70d70 T r600_set_sstu +ffffffff81c70dd0 T r600_set_sst +ffffffff81c70e20 T r600_set_git +ffffffff81c70e70 T r600_set_fctu +ffffffff81c70ed0 T r600_set_fct +ffffffff81c70f20 T r600_set_ctxcgtt3d_rphc +ffffffff81c70f80 T r600_set_ctxcgtt3d_rsdc +ffffffff81c70fe0 T r600_set_vddc3d_oorsu +ffffffff81c71040 T r600_set_vddc3d_oorphc +ffffffff81c710a0 T r600_set_vddc3d_oorsdc +ffffffff81c71100 T r600_set_mpll_lock_time +ffffffff81c71150 T r600_set_mpll_reset_time +ffffffff81c711a0 T r600_engine_clock_entry_enable +ffffffff81c712a0 T r600_engine_clock_entry_enable_pulse_skipping +ffffffff81c713a0 T r600_engine_clock_entry_enable_post_divider +ffffffff81c714a0 T r600_engine_clock_entry_set_post_divider +ffffffff81c71560 T r600_engine_clock_entry_set_reference_divider +ffffffff81c71620 T r600_engine_clock_entry_set_feedback_divider +ffffffff81c716e0 T r600_engine_clock_entry_set_step_time +ffffffff81c717a0 T r600_vid_rt_set_ssu +ffffffff81c71800 T r600_vid_rt_set_vru +ffffffff81c71860 T r600_vid_rt_set_vrt +ffffffff81c718c0 T r600_voltage_control_enable_pins +ffffffff81c71910 T r600_voltage_control_program_voltages +ffffffff81c719a0 T r600_voltage_control_deactivate_static_control +ffffffff81c71a30 T r600_power_level_enable +ffffffff81c71aa0 T r600_power_level_set_voltage_index +ffffffff81c71b10 T r600_power_level_set_mem_clock_index +ffffffff81c71b70 T r600_power_level_set_eng_clock_index +ffffffff81c71be0 T r600_power_level_set_watermark_id +ffffffff81c71c50 T r600_power_level_set_pcie_gen2 +ffffffff81c71cb0 T r600_power_level_get_current_index +ffffffff81c71cf0 T r600_power_level_get_target_index +ffffffff81c71d30 T r600_power_level_set_enter_index +ffffffff81c71d90 T r600_wait_for_power_level_unequal +ffffffff81c71e80 T r600_wait_for_power_level +ffffffff81c71f70 T r600_start_dpm +ffffffff81c72250 T r600_stop_dpm +ffffffff81c722a0 T r600_dpm_pre_set_power_state +ffffffff81c722d0 T r600_dpm_post_set_power_state +ffffffff81c72300 T r600_is_uvd_state +ffffffff81c72340 T r600_is_internal_thermal_sensor +ffffffff81c72380 T r600_dpm_late_enable +ffffffff81c72490 T r600_get_platform_caps +ffffffff81c72530 T r600_parse_extended_power_table +ffffffff81c734a0 T r600_free_extended_power_table +ffffffff81c735a0 T r600_get_pcie_gen_support +ffffffff81c735f0 T r600_get_pcie_lane_support +ffffffff81c73650 T r600_encode_pci_lane_width +ffffffff81c74000 T r600_audio_update_hdmi +ffffffff81c74180 t r600_audio_status +ffffffff81c742a0 T r600_hdmi_buffer_status_changed +ffffffff81c74340 T r600_hdmi_update_audio_settings +ffffffff81c74710 T r600_audio_enable +ffffffff81c74790 T r600_audio_get_pin +ffffffff81c747c0 T r600_hdmi_update_acr +ffffffff81c74b60 T r600_set_avi_packet +ffffffff81c74d60 T r600_hdmi_audio_workaround +ffffffff81c74e30 T r600_hdmi_audio_set_dto +ffffffff81c74ef0 T r600_set_vbi_packet +ffffffff81c74fb0 T r600_set_audio_packet +ffffffff81c75280 T r600_set_mute +ffffffff81c75390 T r600_hdmi_enable +ffffffff81c76000 T radeon_acpi_is_pcie_performance_request_supported +ffffffff81c76050 T radeon_acpi_pcie_notify_device_ready +ffffffff81c76180 T radeon_acpi_pcie_performance_request +ffffffff81c763a0 T radeon_acpi_init +ffffffff81c76af0 t radeon_acpi_event +ffffffff81c76e40 T radeon_acpi_fini +ffffffff81c77000 T radeon_agp_head_init +ffffffff81c77050 T radeon_agp_init +ffffffff81c770a0 T radeon_agp_resume +ffffffff81c77140 T radeon_agp_fini +ffffffff81c77190 T radeon_agp_suspend +ffffffff81c78000 T radeon_agp_disable +ffffffff81c78120 T radeon_asic_init +ffffffff81c789b0 t radeon_invalid_rreg +ffffffff81c789f0 t radeon_invalid_wreg +ffffffff81c78a30 t radeon_invalid_get_allowed_info_register +ffffffff81c79000 T radeon_atombios_i2c_init +ffffffff81c793b0 T radeon_atombios_lookup_gpio +ffffffff81c794b0 T radeon_get_atom_connector_info_from_object_table +ffffffff81c79e10 t radeon_lookup_i2c_gpio +ffffffff81c7a110 t radeon_atom_apply_quirks +ffffffff81c7a540 T radeon_get_atom_connector_info_from_supported_devices_table +ffffffff81c7aa40 T radeon_atom_get_clock_info +ffffffff81c7adc0 T radeon_atombios_sideport_present +ffffffff81c7ae70 T radeon_atombios_get_tmds_info +ffffffff81c7afb0 T radeon_atombios_get_ppll_ss_info +ffffffff81c7b0d0 T radeon_atombios_get_asic_ss_info +ffffffff81c7b440 T radeon_atombios_get_lvds_info +ffffffff81c7b7b0 T radeon_atombios_get_primary_dac_info +ffffffff81c7b860 T radeon_atom_get_tv_timings +ffffffff81c7bab0 T radeon_atombios_get_tv_info +ffffffff81c7bb60 T radeon_atombios_get_tv_dac_info +ffffffff81c7bc60 T radeon_atombios_get_default_voltages +ffffffff81c7bd20 T radeon_atombios_get_power_modes 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radeon_atombios_parse_pplib_non_clock_info +ffffffff81c81000 T radeon_audio_init +ffffffff81c81290 T radeon_audio_endpoint_rreg +ffffffff81c812d0 T radeon_audio_endpoint_wreg +ffffffff81c81310 T radeon_audio_get_pin +ffffffff81c81360 T radeon_audio_detect +ffffffff81c81690 T radeon_audio_fini +ffffffff81c817d0 T radeon_audio_mode_set +ffffffff81c81820 T radeon_audio_dpms +ffffffff81c81870 T radeon_audio_decode_dfs_div +ffffffff81c818d0 t radeon_audio_hdmi_mode_set +ffffffff81c82000 t radeon_audio_write_speaker_allocation +ffffffff81c820b0 t radeon_audio_write_sad_regs +ffffffff81c82180 t radeon_audio_set_avi_packet +ffffffff81c822c0 t radeon_audio_dp_mode_set +ffffffff81c82440 t radeon_audio_rreg +ffffffff81c82490 t radeon_audio_wreg +ffffffff81c83000 T radeon_benchmark +ffffffff81c83940 t radeon_benchmark_move +ffffffff81c83e00 t radeon_bo_reserve +ffffffff81c83f80 t radeon_bo_unreserve +ffffffff81c85000 T radeon_get_bios +ffffffff81c86000 t igp_read_bios_from_vram +ffffffff81c86110 t radeon_read_bios +ffffffff81c87000 T radeon_legacy_get_engine_clock +ffffffff81c870d0 T radeon_legacy_get_memory_clock +ffffffff81c871a0 T radeon_get_clock_info +ffffffff81c87730 T radeon_legacy_set_engine_clock +ffffffff81c87a80 T radeon_legacy_set_clock_gating +ffffffff81c89000 T radeon_combios_check_hardcoded_edid +ffffffff81c89100 T radeon_bios_get_hardcoded_edid +ffffffff81c89180 T radeon_combios_i2c_init +ffffffff81c89940 t combios_setup_i2c_bus +ffffffff81c89c40 T radeon_combios_get_clock_info +ffffffff81c89e30 T radeon_combios_sideport_present +ffffffff81c89eb0 T radeon_combios_get_primary_dac_info +ffffffff81c89ff0 T radeon_combios_get_tv_info +ffffffff81c8a0f0 T radeon_combios_get_tv_dac_info +ffffffff81c8a3a0 T radeon_combios_get_lvds_info +ffffffff81c8a9f0 T radeon_legacy_get_tmds_info_from_table +ffffffff81c8aac0 T radeon_legacy_get_tmds_info_from_combios +ffffffff81c8acd0 T radeon_legacy_get_ext_tmds_info_from_table +ffffffff81c8af10 T radeon_legacy_get_ext_tmds_info_from_combios +ffffffff81c8b2a0 T radeon_get_legacy_connector_info_from_table +ffffffff81c8d660 T radeon_get_legacy_connector_info_from_bios +ffffffff81c8e3f0 T radeon_combios_get_power_modes +ffffffff81c8eca0 T radeon_external_tmds_setup +ffffffff81c8ed70 T radeon_combios_external_tmds_setup +ffffffff81c8f330 T radeon_combios_asic_init +ffffffff81c8f950 t combios_parse_mmio_table +ffffffff81c8fb70 t combios_parse_pll_table +ffffffff81c8fe40 T radeon_combios_initialize_bios_scratch_regs +ffffffff81c8fed0 T radeon_combios_output_lock +ffffffff81c8ff30 T radeon_combios_connected_scratch_regs +ffffffff81c90290 T radeon_combios_encoder_crtc_scratch_regs +ffffffff81c90370 T radeon_combios_encoder_dpms_scratch_regs +ffffffff81c91000 T radeon_connector_hotplug +ffffffff81c91100 T radeon_get_monitor_bpc +ffffffff81c91530 T radeon_connector_edid +ffffffff81c915e0 T radeon_connector_encoder_get_dp_bridge_encoder_id +ffffffff81c91660 T radeon_connector_is_dp12_capable +ffffffff81c91700 T radeon_add_atom_connector +ffffffff81c92550 T radeon_add_legacy_connector +ffffffff81c92a90 t radeon_dp_detect +ffffffff81c92e50 t radeon_dvi_force +ffffffff81c92ea0 t radeon_connector_set_property +ffffffff81c936e0 t radeon_connector_unregister +ffffffff81c93740 t radeon_connector_destroy +ffffffff81c937b0 t radeon_best_single_encoder +ffffffff81c93830 t radeon_connector_get_edid +ffffffff81c93990 t radeon_dp_get_modes +ffffffff81c93cc0 t radeon_dp_mode_valid +ffffffff81c93e90 t radeon_dvi_encoder +ffffffff81c93f70 t radeon_fixup_lvds_native_mode +ffffffff81c940a0 t radeon_add_common_modes +ffffffff81c94190 t radeon_fp_native_mode +ffffffff81c94260 t radeon_lvds_set_property +ffffffff81c94350 t radeon_vga_detect +ffffffff81c94600 t radeon_connector_analog_encoder_conflict_solve +ffffffff81c94820 t radeon_vga_get_modes +ffffffff81c94910 t radeon_vga_mode_valid +ffffffff81c94970 t radeon_dvi_detect +ffffffff81c95010 t radeon_dvi_mode_valid +ffffffff81c951a0 t radeon_tv_detect +ffffffff81c953e0 t radeon_tv_get_modes +ffffffff81c954b0 t radeon_tv_mode_valid +ffffffff81c95500 t radeon_lvds_detect +ffffffff81c956a0 t radeon_lvds_get_modes +ffffffff81c95810 t radeon_lvds_mode_valid +ffffffff81c96000 T radeon_cs_parser_init +ffffffff81c96480 T radeon_cs_ioctl +ffffffff81c96fb0 t radeon_cs_parser_fini +ffffffff81c97140 T radeon_cs_packet_parse +ffffffff81c972f0 T radeon_cs_packet_next_is_pkt3_nop +ffffffff81c97350 T radeon_cs_dump_packet +ffffffff81c973d0 T radeon_cs_packet_next_reloc +ffffffff81c975a0 t cmp_size_smaller_first +ffffffff81c98000 T radeon_crtc_cursor_move +ffffffff81c98070 t radeon_lock_cursor +ffffffff81c98230 t radeon_cursor_move_locked +ffffffff81c98780 T radeon_crtc_cursor_set2 +ffffffff81c98a00 t radeon_hide_cursor +ffffffff81c98ac0 t radeon_bo_reserve +ffffffff81c98c40 t radeon_bo_unreserve +ffffffff81c98d20 t radeon_show_cursor +ffffffff81c98f70 T radeon_cursor_reset +ffffffff81c99000 T radeon_is_px +ffffffff81c99040 T radeon_program_register_sequence +ffffffff81c99170 T radeon_pci_config_reset +ffffffff81c991a0 T radeon_surface_init +ffffffff81c99360 T radeon_scratch_init +ffffffff81c993e0 T radeon_scratch_get +ffffffff81c99460 T radeon_scratch_free +ffffffff81c994c0 T radeon_doorbell_get +ffffffff81c99570 T radeon_doorbell_free +ffffffff81c995c0 T radeon_wb_disable +ffffffff81c995f0 T radeon_wb_fini +ffffffff81c99690 t radeon_bo_reserve +ffffffff81c99810 t radeon_bo_unreserve +ffffffff81c998f0 T radeon_wb_init +ffffffff81c99be0 T radeon_vram_location +ffffffff81c99d10 T radeon_gtt_location +ffffffff81c99e40 T radeon_device_is_virtual +ffffffff81c99e70 T radeon_card_posted +ffffffff81c9a090 T radeon_update_bandwidth_info +ffffffff81c9a110 T radeon_boot_test_post_card +ffffffff81c9a1d0 T radeon_dummy_page_init +ffffffff81c9a290 T radeon_dummy_page_fini +ffffffff81c9a2f0 T radeon_atombios_init +ffffffff81c9a480 t cail_reg_read +ffffffff81c9a4e0 t cail_reg_write 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radeon_crtc_scaling_mode_fixup +ffffffff81c9f310 T radeon_get_crtc_scanout_position +ffffffff81c9f380 t radeon_user_framebuffer_create +ffffffff81c9f520 t radeon_crtc_gamma_set +ffffffff81c9f560 t radeon_crtc_destroy +ffffffff81c9f5a0 t radeon_crtc_set_config +ffffffff81c9f660 t radeon_crtc_page_flip_target +ffffffff81c9faf0 t radeon_flip_work_func +ffffffff81c9fd10 t radeon_unpin_work_func +ffffffff81c9fd90 t radeon_bo_reserve +ffffffff81c9ff10 t radeon_bo_unreserve +ffffffff81ca0000 T radeon_dp_aux_transfer_native +ffffffff81ca1000 T radeondrm_probe +ffffffff81ca1060 T radeondrm_attach_kms +ffffffff81ca17a0 T radeondrm_detach_kms +ffffffff81ca1830 T radeondrm_activate_kms +ffffffff81ca18f0 T radeondrm_wsioctl +ffffffff81ca19a0 T radeondrm_wsmmap +ffffffff81ca19d0 T radeondrm_alloc_screen +ffffffff81ca1a00 T radeondrm_free_screen +ffffffff81ca1a10 T radeondrm_show_screen +ffffffff81ca1af0 T radeondrm_enter_ddb +ffffffff81ca1b50 T radeondrm_doswitch +ffffffff81ca1be0 T radeondrm_setpal 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radeon_fence_get_timeline_name +ffffffff81ca68a0 t radeon_fence_enable_signaling +ffffffff81ca6ac0 t radeon_fence_is_signaled +ffffffff81ca6b80 t radeon_fence_default_wait +ffffffff81ca6d30 t radeon_fence_any_seq_signaled +ffffffff81ca6f30 t radeon_fence_check_lockup +ffffffff81ca7180 t __delayed_work_tick +ffffffff81ca71a0 t radeon_fence_check_signaled +ffffffff81ca7230 t radeon_fence_wait_cb +ffffffff81ca8000 T radeon_gart_table_ram_alloc +ffffffff81ca80c0 T radeon_gart_table_ram_free +ffffffff81ca8130 T radeon_gart_table_vram_alloc +ffffffff81ca81b0 T radeon_gart_table_vram_pin +ffffffff81ca82f0 t radeon_bo_reserve +ffffffff81ca8470 t radeon_bo_unreserve +ffffffff81ca8550 T radeon_gart_table_vram_unpin +ffffffff81ca85d0 T radeon_gart_table_vram_free +ffffffff81ca8610 T radeon_gart_unbind +ffffffff81ca8730 T radeon_gart_bind +ffffffff81ca8880 T radeon_gart_init +ffffffff81ca89b0 T radeon_gart_fini +ffffffff81ca9000 T radeon_gem_fault +ffffffff81ca9180 T radeon_gem_vm_reference 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+ffffffff81cad280 t radeon_hw_i2c_func +ffffffff81cad2b0 t r100_hw_i2c_xfer +ffffffff81cad990 t radeon_get_i2c_prescale +ffffffff81cae000 T radeon_ib_get +ffffffff81cae100 T radeon_ib_free +ffffffff81cae150 T radeon_ib_schedule +ffffffff81cae3e0 T radeon_ib_pool_init +ffffffff81cae480 T radeon_ib_pool_fini +ffffffff81cae4f0 T radeon_ib_ring_tests +ffffffff81caf000 T radeon_driver_irq_handler_kms +ffffffff81caf050 T radeon_msi_ok +ffffffff81caf150 T radeon_irq_kms_init +ffffffff81caf3e0 t radeon_hotplug_work_func +ffffffff81caf490 t radeon_dp_work_func +ffffffff81caf4c0 T radeon_irq_kms_fini +ffffffff81caf660 T radeon_irq_kms_sw_irq_get +ffffffff81caf700 T radeon_irq_kms_sw_irq_get_delayed +ffffffff81caf740 T radeon_irq_kms_sw_irq_put +ffffffff81caf7d0 T radeon_irq_kms_pflip_irq_get +ffffffff81caf880 T radeon_irq_kms_pflip_irq_put +ffffffff81caf920 T radeon_irq_kms_enable_afmt +ffffffff81caf9b0 T radeon_irq_kms_disable_afmt +ffffffff81cafa40 T radeon_irq_kms_enable_hpd +ffffffff81cafb30 T radeon_irq_kms_disable_hpd +ffffffff81cafc10 T radeon_irq_kms_set_irq_n_enabled +ffffffff81cafd80 t __delayed_work_tick +ffffffff81cb0000 T radeon_info_ioctl +ffffffff81cb0bf0 T radeon_driver_lastclose_kms +ffffffff81cb0c00 T radeon_driver_open_kms +ffffffff81cb0d30 t radeon_bo_reserve +ffffffff81cb0eb0 T radeon_driver_postclose_kms +ffffffff81cb10d0 T radeon_get_vblank_counter_kms +ffffffff81cb1270 T radeon_enable_vblank_kms +ffffffff81cb1320 T radeon_disable_vblank_kms +ffffffff81cb2000 T radeon_crtc_set_base +ffffffff81cb2020 T radeon_crtc_do_set_base +ffffffff81cb25c0 T radeon_crtc_set_base_atomic +ffffffff81cb25e0 t radeon_bo_reserve +ffffffff81cb2760 t radeon_bo_unreserve +ffffffff81cb2840 T radeon_legacy_init_crtc +ffffffff81cb2890 t radeon_crtc_dpms +ffffffff81cb2a90 t radeon_crtc_prepare +ffffffff81cb2b10 t radeon_crtc_commit +ffffffff81cb2b80 t radeon_crtc_mode_fixup +ffffffff81cb2ba0 t radeon_crtc_mode_set +ffffffff81cb3ff0 t radeon_crtc_disable +ffffffff81cb5000 T radeon_legacy_get_backlight_level +ffffffff81cb5040 T radeon_legacy_set_backlight_level +ffffffff81cb5080 t radeon_legacy_lvds_update +ffffffff81cb53e0 T radeon_legacy_backlight_init +ffffffff81cb55b0 t radeon_legacy_backlight_get_brightness +ffffffff81cb5610 T radeon_add_legacy_encoder +ffffffff81cb5990 t radeon_legacy_backlight_update_status +ffffffff81cb5a20 t radeon_lvds_enc_destroy +ffffffff81cb5ab0 t radeon_legacy_lvds_dpms +ffffffff81cb5b00 t radeon_legacy_mode_fixup +ffffffff81cb5b70 t radeon_legacy_lvds_prepare +ffffffff81cb5c00 t radeon_legacy_lvds_commit +ffffffff81cb5c80 t radeon_legacy_lvds_mode_set +ffffffff81cb5e90 t radeon_legacy_encoder_disable +ffffffff81cb5ee0 t radeon_legacy_tmds_int_dpms +ffffffff81cb5fa0 t radeon_legacy_tmds_int_prepare +ffffffff81cb6070 t radeon_legacy_tmds_int_commit +ffffffff81cb6140 t radeon_legacy_tmds_int_mode_set +ffffffff81cb63b0 t radeon_legacy_primary_dac_dpms +ffffffff81cb64f0 t radeon_legacy_primary_dac_prepare +ffffffff81cb6550 t radeon_legacy_primary_dac_commit +ffffffff81cb65a0 t radeon_legacy_primary_dac_mode_set +ffffffff81cb6750 t radeon_legacy_primary_dac_detect +ffffffff81cb6940 t radeon_legacy_tv_dac_dpms +ffffffff81cb6b40 t radeon_legacy_tv_dac_prepare +ffffffff81cb6ba0 t radeon_legacy_tv_dac_commit +ffffffff81cb6bf0 t radeon_legacy_tv_dac_mode_set +ffffffff81cb6f90 t radeon_legacy_tv_dac_detect +ffffffff81cb7bc0 t radeon_ext_tmds_enc_destroy +ffffffff81cb7c10 t radeon_legacy_tmds_ext_dpms +ffffffff81cb7ce0 t radeon_legacy_tmds_ext_prepare +ffffffff81cb7db0 t radeon_legacy_tmds_ext_commit +ffffffff81cb7e80 t radeon_legacy_tmds_ext_mode_set +ffffffff81cb9000 T radeon_legacy_tv_mode_set +ffffffff81cba0b0 T radeon_legacy_tv_adjust_crtc_reg +ffffffff81cba1c0 T radeon_legacy_tv_adjust_pll1 +ffffffff81cba2b0 T radeon_legacy_tv_adjust_pll2 +ffffffff81cbb000 T radeon_ttm_bo_is_radeon_bo +ffffffff81cbb040 t radeon_ttm_bo_destroy +ffffffff81cbb170 T radeon_ttm_placement_from_domain +ffffffff81cbb2e0 T radeon_bo_create +ffffffff81cbb4a0 T radeon_bo_kmap +ffffffff81cbb580 T radeon_bo_check_tiling +ffffffff81cbb660 T radeon_bo_kunmap +ffffffff81cbb6f0 T radeon_bo_ref +ffffffff81cbb730 T radeon_bo_unref +ffffffff81cbb780 T radeon_bo_pin_restricted +ffffffff81cbbab0 T radeon_bo_pin +ffffffff81cbbad0 T radeon_bo_unpin +ffffffff81cbbb40 T radeon_bo_evict_vram +ffffffff81cbbba0 T radeon_bo_force_delete +ffffffff81cbbd10 T radeon_bo_init +ffffffff81cbbdf0 T radeon_bo_fini +ffffffff81cbbe30 T radeon_bo_list_validate +ffffffff81cbc120 T radeon_bo_get_surface_reg +ffffffff81cbc3c0 T radeon_bo_set_tiling_flags +ffffffff81cbc6e0 T radeon_bo_get_tiling_flags +ffffffff81cbc730 T radeon_bo_move_notify +ffffffff81cbc7f0 T radeon_bo_fault_reserve_notify +ffffffff81cbcaf0 T radeon_bo_fence +ffffffff81cbd000 T radeon_pm_get_type_index +ffffffff81cbd080 T radeon_pm_acpi_event_handler +ffffffff81cbd160 t radeon_pm_update_profile +ffffffff81cbd280 t radeon_pm_set_clocks +ffffffff81cbdc20 T radeon_dpm_enable_uvd +ffffffff81cbdce0 T radeon_pm_compute_clocks +ffffffff81cbe720 T radeon_dpm_enable_vce +ffffffff81cbe790 T radeon_pm_suspend +ffffffff81cbe890 T radeon_pm_resume +ffffffff81cbeb80 T radeon_pm_init +ffffffff81cbf280 T radeon_pm_late_init +ffffffff81cbf340 T radeon_pm_fini +ffffffff81cbf450 t radeon_dpm_thermal_work_handler +ffffffff81cbf530 t radeon_dynpm_idle_work_handler +ffffffff81cbf820 t __delayed_work_tick +ffffffff81cc0000 T radeon_gem_prime_get_sg_table +ffffffff81cc0030 T radeon_gem_prime_pin +ffffffff81cc00c0 t radeon_bo_reserve +ffffffff81cc0240 t radeon_bo_unreserve +ffffffff81cc0320 T radeon_gem_prime_unpin +ffffffff81cc0390 T radeon_gem_prime_export +ffffffff81cc1000 T radeon_ring_supports_scratch_reg +ffffffff81cc1030 T radeon_ring_free_size +ffffffff81cc10e0 T radeon_ring_lockup_update +ffffffff81cc1140 T radeon_ring_alloc +ffffffff81cc12c0 T radeon_ring_lock +ffffffff81cc1340 T radeon_ring_commit +ffffffff81cc1440 T radeon_ring_unlock_commit +ffffffff81cc1470 T radeon_ring_undo +ffffffff81cc14a0 T radeon_ring_unlock_undo +ffffffff81cc14c0 T radeon_ring_test_lockup +ffffffff81cc15e0 T radeon_ring_backup +ffffffff81cc17a0 T radeon_ring_restore +ffffffff81cc1960 T radeon_ring_init +ffffffff81cc1b50 t radeon_bo_reserve +ffffffff81cc1cd0 t radeon_bo_unreserve +ffffffff81cc1db0 T radeon_ring_fini +ffffffff81cc2000 T radeon_sa_bo_manager_init +ffffffff81cc2190 T radeon_sa_bo_manager_fini +ffffffff81cc2380 T radeon_sa_bo_manager_start +ffffffff81cc24c0 t radeon_bo_reserve +ffffffff81cc2640 t radeon_bo_unreserve +ffffffff81cc2720 T radeon_sa_bo_manager_suspend +ffffffff81cc27c0 T radeon_sa_bo_new +ffffffff81cc2ff0 T radeon_sa_bo_free +ffffffff81cc4000 T radeon_semaphore_create +ffffffff81cc40f0 T radeon_semaphore_emit_signal +ffffffff81cc4180 T radeon_semaphore_emit_wait +ffffffff81cc4210 T radeon_semaphore_free +ffffffff81cc5000 T radeon_sync_create +ffffffff81cc5090 T radeon_sync_fence +ffffffff81cc5140 T radeon_sync_resv +ffffffff81cc5270 T radeon_sync_rings +ffffffff81cc5430 T radeon_sync_free +ffffffff81cc6000 T radeon_test_moves +ffffffff81cc6070 t radeon_do_test_moves +ffffffff81cc6660 T radeon_test_ring_sync +ffffffff81cc6930 t radeon_test_create_and_emit_fence +ffffffff81cc6aa0 T radeon_test_syncing +ffffffff81cc6d60 t radeon_test_ring_sync2 +ffffffff81cc70d0 t radeon_bo_reserve +ffffffff81cc7250 t radeon_bo_unreserve +ffffffff81cc8000 T radeon_get_rdev +ffffffff81cc8030 T radeon_ttm_tt_set_userptr +ffffffff81cc8080 T radeon_ttm_tt_is_bound +ffffffff81cc80d0 T radeon_ttm_tt_has_userptr +ffffffff81cc8110 T radeon_ttm_tt_is_readonly +ffffffff81cc8150 T radeon_ttm_init +ffffffff81cc8370 T radeon_ttm_set_active_vram_size +ffffffff81cc83b0 t radeon_bo_reserve +ffffffff81cc8530 t radeon_bo_unreserve +ffffffff81cc8610 T radeon_ttm_fini +ffffffff81cc86e0 t radeon_ttm_tt_create +ffffffff81cc87d0 t radeon_ttm_tt_populate +ffffffff81cc8880 t radeon_ttm_tt_unpopulate +ffffffff81cc8980 t radeon_ttm_tt_destroy +ffffffff81cc89d0 t radeon_evict_flags +ffffffff81cc8b20 t radeon_bo_move +ffffffff81cc8fa0 t radeon_ttm_io_mem_reserve +ffffffff81cca000 T radeon_ucode_print_mc_hdr +ffffffff81cca0b0 t radeon_ucode_print_common_hdr +ffffffff81cca1e0 T radeon_ucode_print_smc_hdr +ffffffff81cca270 T radeon_ucode_print_gfx_hdr +ffffffff81cca340 T radeon_ucode_print_rlc_hdr +ffffffff81cca440 T radeon_ucode_print_sdma_hdr +ffffffff81cca520 T radeon_ucode_validate +ffffffff81ccb000 T radeon_uvd_init +ffffffff81ccb4f0 t radeon_uvd_idle_work_handler +ffffffff81ccb660 t radeon_bo_reserve +ffffffff81ccb870 t radeon_bo_unreserve +ffffffff81ccb950 T radeon_uvd_fini +ffffffff81ccba20 T radeon_uvd_suspend +ffffffff81ccbbe0 T radeon_uvd_note_usage +ffffffff81ccbe20 T radeon_uvd_get_destroy_msg +ffffffff81ccbf30 T radeon_uvd_resume +ffffffff81ccbfc0 T radeon_uvd_force_into_uvd_segment +ffffffff81ccc060 T radeon_uvd_free_handles +ffffffff81ccc220 T radeon_uvd_cs_parse +ffffffff81ccc940 T radeon_uvd_get_create_msg +ffffffff81cccac0 t radeon_uvd_send_msg +ffffffff81cccc60 T radeon_uvd_calc_upll_dividers +ffffffff81ccce00 T radeon_uvd_send_upll_ctlreq +ffffffff81ccd140 t __delayed_work_tick +ffffffff81cce000 T radeon_vce_init +ffffffff81cce610 t radeon_vce_idle_work_handler +ffffffff81cce6e0 t radeon_bo_reserve +ffffffff81cce860 t radeon_bo_unreserve +ffffffff81cce940 T radeon_vce_fini +ffffffff81cce9c0 T radeon_vce_suspend +ffffffff81cceaa0 T radeon_vce_resume +ffffffff81ccebf0 T radeon_vce_note_usage +ffffffff81cced10 T radeon_vce_free_handles +ffffffff81ccedd0 T radeon_vce_get_destroy_msg +ffffffff81ccf070 T radeon_vce_get_create_msg +ffffffff81ccf430 T radeon_vce_cs_reloc +ffffffff81ccf530 T radeon_vce_cs_parse +ffffffff81ccfd60 T radeon_vce_semaphore_emit +ffffffff81ccff30 T radeon_vce_ib_execute +ffffffff81cd00d0 T radeon_vce_fence_emit +ffffffff81cd0310 T radeon_vce_ring_test +ffffffff81cd0460 T radeon_vce_ib_test +ffffffff81cd0580 t __delayed_work_tick +ffffffff81cd1000 T radeon_vm_manager_init +ffffffff81cd1060 T radeon_vm_manager_fini +ffffffff81cd1180 T radeon_vm_get_bos +ffffffff81cd12b0 T radeon_vm_grab_id +ffffffff81cd1440 T radeon_vm_flush +ffffffff81cd15d0 T radeon_vm_fence +ffffffff81cd1680 T radeon_vm_bo_find +ffffffff81cd16e0 T radeon_vm_bo_add +ffffffff81cd17c0 T radeon_vm_bo_set_addr +ffffffff81cd1c20 t radeon_bo_unreserve +ffffffff81cd1d00 t radeon_vm_clear_bo +ffffffff81cd1ef0 T radeon_vm_map_gart +ffffffff81cd1f30 T radeon_vm_update_page_directory +ffffffff81cd22e0 T radeon_vm_bo_update +ffffffff81cd29c0 T radeon_vm_clear_freed +ffffffff81cd2aa0 T radeon_vm_clear_invalids +ffffffff81cd2b40 T radeon_vm_bo_rmv +ffffffff81cd2c30 T radeon_vm_bo_invalidate +ffffffff81cd2ce0 T radeon_vm_init +ffffffff81cd2f40 T radeon_vm_fini +ffffffff81cd3210 t radeon_bo_reserve +ffffffff81cd3390 t radeon_vm_frag_ptes +ffffffff81cd4000 T rs400_gart_adjust_size +ffffffff81cd40c0 T rs400_gart_tlb_flush +ffffffff81cd4140 T rs400_gart_init +ffffffff81cd4240 T rs400_gart_enable +ffffffff81cd45a0 T rs400_gart_disable +ffffffff81cd4600 T rs400_gart_fini +ffffffff81cd4670 T rs400_gart_get_page_entry +ffffffff81cd46d0 T rs400_gart_set_page +ffffffff81cd4710 T rs400_mc_wait_for_idle +ffffffff81cd47b0 T rs400_mc_rreg +ffffffff81cd4840 T rs400_mc_wreg +ffffffff81cd48c0 T rs400_resume +ffffffff81cd49f0 t rs400_mc_program +ffffffff81cd4af0 t rs400_startup +ffffffff81cd4ce0 T rs400_suspend +ffffffff81cd4d80 T rs400_fini +ffffffff81cd4e70 T rs400_init +ffffffff81cd6000 T avivo_wait_for_vblank +ffffffff81cd6280 T rs600_page_flip +ffffffff81cd6540 T rs600_page_flip_pending +ffffffff81cd65b0 T avivo_program_fmt +ffffffff81cd66d0 T rs600_pm_misc +ffffffff81cd6a10 T rs600_pm_prepare +ffffffff81cd6b10 T rs600_pm_finish +ffffffff81cd6c10 T rs600_hpd_sense +ffffffff81cd6c70 T rs600_hpd_set_polarity +ffffffff81cd6d30 T rs600_hpd_init +ffffffff81cd6e10 T rs600_hpd_fini +ffffffff81cd6eb0 T rs600_asic_reset +ffffffff81cd7120 T rs600_gart_tlb_flush +ffffffff81cd71e0 T rs600_gart_get_page_entry +ffffffff81cd7240 T rs600_gart_set_page +ffffffff81cd7280 T rs600_irq_set +ffffffff81cd7450 T rs600_irq_disable +ffffffff81cd74d0 t rs600_irq_ack +ffffffff81cd7680 T rs600_irq_process +ffffffff81cd79f0 T rs600_get_vblank_counter +ffffffff81cd7a40 T rs600_mc_wait_for_idle +ffffffff81cd7ae0 T rs600_bandwidth_update +ffffffff81cd7bd0 T rs600_mc_rreg +ffffffff81cd7c50 T rs600_mc_wreg +ffffffff81cd7cc0 T rs600_set_safe_registers +ffffffff81cd7d00 T rs600_resume +ffffffff81cd7e30 t rs600_startup +ffffffff81cd8670 T rs600_suspend +ffffffff81cd8770 T rs600_fini +ffffffff81cd8870 T rs600_init +ffffffff81cd9000 T rs690_mc_wait_for_idle +ffffffff81cd90a0 T rs690_pm_info +ffffffff81cd9330 T rs690_line_buffer_adjust +ffffffff81cd9430 T rs690_bandwidth_update +ffffffff81cd9750 t rs690_crtc_bandwidth_compute +ffffffff81cd9b80 t rs690_compute_mode_priority +ffffffff81cda000 T rs690_mc_rreg +ffffffff81cda090 T rs690_mc_wreg +ffffffff81cda110 T rs690_resume +ffffffff81cda200 t rs690_startup +ffffffff81cda4f0 T rs690_suspend +ffffffff81cda550 T rs690_fini +ffffffff81cda600 T rs690_init +ffffffff81cdb000 T rs780_dpm_enable +ffffffff81cdbbe0 T rs780_dpm_disable +ffffffff81cdbcc0 T rs780_dpm_set_power_state +ffffffff81cdc0a0 t rs780_force_voltage +ffffffff81cdc1e0 t rs780_enable_voltage_scaling +ffffffff81cdc390 T rs780_dpm_setup_asic +ffffffff81cdc3c0 T rs780_dpm_display_configuration_changed +ffffffff81cdc510 T rs780_dpm_init +ffffffff81cdca80 T rs780_dpm_print_power_state +ffffffff81cdcb10 T rs780_dpm_fini +ffffffff81cdcba0 T rs780_dpm_get_sclk +ffffffff81cdcbe0 T rs780_dpm_get_mclk +ffffffff81cdcc10 T rs780_dpm_debugfs_print_current_performance_level +ffffffff81cdcc40 T rs780_dpm_get_current_sclk +ffffffff81cdccd0 T rs780_dpm_get_current_mclk +ffffffff81cdcd00 T rs780_dpm_force_performance_level +ffffffff81cdcef0 t rs780_force_fbdiv +ffffffff81cde000 T rv515_ring_start +ffffffff81cdeb30 T rv515_mc_wait_for_idle +ffffffff81cdebd0 T rv515_vga_render_disable +ffffffff81cdec20 T rv515_mc_rreg +ffffffff81cdecb0 T rv515_mc_wreg +ffffffff81cded30 T rv515_debugfs +ffffffff81cded40 T rv515_mc_stop +ffffffff81cdf2d0 T rv515_mc_resume +ffffffff81cdf8e0 T rv515_clock_startup +ffffffff81cdf9b0 T rv515_resume +ffffffff81cdfbf0 t rv515_startup +ffffffff81ce00d0 T rv515_suspend +ffffffff81ce0140 T rv515_set_safe_registers +ffffffff81ce0180 T rv515_fini +ffffffff81ce0230 T rv515_init +ffffffff81ce0520 T atom_rv515_force_tv_scaler +ffffffff81ce3bc0 T rv515_bandwidth_avivo_update +ffffffff81ce3d60 t rv515_crtc_bandwidth_compute +ffffffff81ce40a0 t rv515_compute_mode_priority +ffffffff81ce4550 T rv515_bandwidth_update +ffffffff81ce5000 T rv6xx_dpm_enable +ffffffff81ce57f0 t rv6xx_calculate_stepping_parameters +ffffffff81ce59c0 t rv6xx_program_stepping_parameters_except_lowest_entry +ffffffff81ce5fb0 t rv6xx_program_stepping_parameters_lowest_entry +ffffffff81ce6090 T rv6xx_dpm_disable +ffffffff81ce6410 T rv6xx_dpm_set_power_state +ffffffff81ce6e10 T rv6xx_setup_asic +ffffffff81ce6f50 T rv6xx_dpm_display_configuration_changed +ffffffff81ce6fd0 T rv6xx_dpm_init +ffffffff81ce7520 T rv6xx_dpm_print_power_state +ffffffff81ce75e0 T rv6xx_dpm_debugfs_print_current_performance_level +ffffffff81ce7610 T rv6xx_dpm_get_current_sclk +ffffffff81ce7680 T rv6xx_dpm_get_current_mclk +ffffffff81ce76f0 T rv6xx_dpm_fini +ffffffff81ce7780 T rv6xx_dpm_get_sclk +ffffffff81ce77c0 T rv6xx_dpm_get_mclk +ffffffff81ce7800 T rv6xx_dpm_force_performance_level +ffffffff81ce7990 t rv6xx_generate_steps +ffffffff81ce7ca0 t rv6xx_output_stepping +ffffffff81ce7dc0 t rv6xx_program_mclk_stepping_entry +ffffffff81ce8030 t rv6xx_program_engine_spread_spectrum +ffffffff81ce8310 t rv6xx_step_sw_voltage +ffffffff81ce9000 T rv730_populate_sclk_value +ffffffff81ce9240 T rv730_populate_mclk_value +ffffffff81ce9460 T rv730_read_clock_registers +ffffffff81ce9580 T rv730_populate_smc_acpi_state +ffffffff81ce9730 T rv730_populate_smc_initial_state +ffffffff81ce98f0 T rv730_program_memory_timing_parameters +ffffffff81ce9ad0 T rv730_start_dpm +ffffffff81ce9b60 T rv730_stop_dpm +ffffffff81ce9c20 T rv730_program_dcodt +ffffffff81ce9cf0 T rv730_get_odt_values +ffffffff81cea000 T rv740_get_decoded_reference_divider +ffffffff81cea0a0 T rv740_get_dll_speed +ffffffff81cea1d0 T rv740_populate_sclk_value +ffffffff81cea3e0 T rv740_populate_mclk_value +ffffffff81cea820 T rv740_read_clock_registers +ffffffff81cea950 T rv740_populate_smc_acpi_state +ffffffff81ceab80 T rv740_enable_mclk_spread_spectrum +ffffffff81ceabe0 T rv740_get_mclk_frequency_ratio +ffffffff81ceb000 T rv770_set_uvd_clocks +ffffffff81ceb570 T rv770_get_xclk +ffffffff81ceb5d0 T rv770_page_flip +ffffffff81ceb8e0 T rv770_page_flip_pending +ffffffff81ceb950 T rv770_get_temp +ffffffff81ceb9b0 T rv770_pm_misc +ffffffff81ceba90 T r700_cp_stop +ffffffff81cebb10 T r700_cp_fini +ffffffff81cebba0 T rv770_set_clk_bypass_mode +ffffffff81cebcc0 T r700_vram_gtt_location +ffffffff81cebe50 T rv770_resume +ffffffff81cebee0 t rv770_init_golden_registers +ffffffff81cec070 t rv770_startup +ffffffff81cee060 T rv770_suspend +ffffffff81cee280 T rv770_init +ffffffff81cee850 T rv770_fini +ffffffff81cef000 T rv770_copy_dma +ffffffff81cf0000 T rv770_get_ps +ffffffff81cf0030 T rv770_get_pi +ffffffff81cf0060 T evergreen_get_pi +ffffffff81cf0090 T rv770_restore_cgcg +ffffffff81cf0110 T rv770_stop_dpm +ffffffff81cf01d0 T rv770_dpm_enabled +ffffffff81cf0210 T rv770_enable_thermal_protection +ffffffff81cf0270 T rv770_enable_acpi_pm +ffffffff81cf02c0 T rv770_get_seq_value +ffffffff81cf0300 T rv770_write_smc_soft_register +ffffffff81cf0330 T rv770_populate_smc_t +ffffffff81cf04d0 T rv770_populate_smc_sp +ffffffff81cf0530 T rv770_map_clkf_to_ibias +ffffffff81cf0590 T rv770_populate_vddc_value +ffffffff81cf0640 T rv770_populate_mvdd_value +ffffffff81cf0690 T rv770_calculate_memory_refresh_rate +ffffffff81cf0700 T rv770_enable_backbias +ffffffff81cf0760 T rv770_setup_bsp +ffffffff81cf0850 T rv770_program_git +ffffffff81cf08a0 T rv770_program_tp +ffffffff81cf0920 T rv770_program_tpp +ffffffff81cf0960 T rv770_program_sstp +ffffffff81cf09a0 T rv770_program_engine_speed_parameters +ffffffff81cf09f0 T rv770_program_vc +ffffffff81cf0a40 T rv770_clear_vc +ffffffff81cf0a80 T rv770_upload_firmware +ffffffff81cf0ac0 T rv770_populate_initial_mvdd_value +ffffffff81cf0b10 T rv770_get_memory_module_index +ffffffff81cf0b50 T rv770_enable_voltage_control +ffffffff81cf0bb0 T rv770_halt_smc +ffffffff81cf0c10 T rv770_resume_smc +ffffffff81cf0c60 T rv770_set_sw_state +ffffffff81cf0cc0 T rv770_set_boot_state +ffffffff81cf0d10 T rv770_set_uvd_clock_before_set_eng_clock +ffffffff81cf0d80 T rv770_set_uvd_clock_after_set_eng_clock +ffffffff81cf0df0 T rv770_restrict_performance_levels_before_switch +ffffffff81cf0e50 T rv770_dpm_force_performance_level +ffffffff81cf0f10 T r7xx_start_smc +ffffffff81cf0f40 T r7xx_stop_smc +ffffffff81cf0f70 T rv770_read_voltage_smio_registers +ffffffff81cf0fb0 T rv770_reset_smio_status +ffffffff81cf1070 T rv770_get_memory_type +ffffffff81cf10c0 T rv770_get_pcie_gen2_status +ffffffff81cf1130 T rv770_get_max_vddc +ffffffff81cf1190 T rv770_program_response_times +ffffffff81cf12e0 T rv770_enable_auto_throttle_source +ffffffff81cf1460 T rv770_dpm_enable +ffffffff81cf24e0 T rv770_dpm_late_enable +ffffffff81cf2610 T rv770_dpm_disable +ffffffff81cf2970 T rv770_dpm_set_power_state +ffffffff81cf2f70 T rv770_dpm_setup_asic +ffffffff81cf32d0 T rv770_dpm_display_configuration_changed +ffffffff81cf3350 T rv7xx_parse_power_table +ffffffff81cf3890 T rv770_get_engine_memory_ss +ffffffff81cf3920 T rv770_dpm_init +ffffffff81cf3b60 T rv770_dpm_print_power_state +ffffffff81cf3c80 T rv770_dpm_debugfs_print_current_performance_level +ffffffff81cf3cb0 T rv770_dpm_get_current_sclk +ffffffff81cf3d20 T rv770_dpm_get_current_mclk +ffffffff81cf3d90 T rv770_dpm_fini +ffffffff81cf3e20 T rv770_dpm_get_sclk +ffffffff81cf3e60 T rv770_dpm_get_mclk +ffffffff81cf3eb0 T rv770_dpm_vblank_too_short +ffffffff81cf3f20 t rv770_convert_power_level_to_smc +ffffffff81cf5000 T rv770_copy_bytes_to_smc +ffffffff81cf5240 T rv770_start_smc +ffffffff81cf5290 T rv770_reset_smc +ffffffff81cf52e0 T rv770_stop_smc_clock +ffffffff81cf5330 T rv770_start_smc_clock +ffffffff81cf5380 T rv770_is_smc_running +ffffffff81cf53c0 T rv770_send_msg_to_smc +ffffffff81cf54a0 T rv770_wait_for_smc_inactive +ffffffff81cf5540 T rv770_load_smc_ucode +ffffffff81cf56d0 T rv770_read_smc_sram_dword +ffffffff81cf5790 T rv770_write_smc_sram_dword +ffffffff81cf6000 T si_get_allowed_info_register +ffffffff81cf6090 T si_get_xclk +ffffffff81cf6100 T si_get_temp +ffffffff81cf6150 T si_mc_load_microcode +ffffffff81cf6420 T dce6_bandwidth_update +ffffffff81cf6820 t dce6_program_watermarks +ffffffff81cf72d0 T si_fence_ring_emit +ffffffff81cf7750 T si_ring_ib_execute +ffffffff81cf7f30 T si_gpu_check_soft_reset +ffffffff81cf80d0 T si_asic_reset +ffffffff81cf84f0 t si_gpu_pci_config_reset +ffffffff81cf88a0 T si_gfx_is_lockup +ffffffff81cf8910 T si_vram_gtt_location +ffffffff81cf89b0 T si_pcie_gart_tlb_flush +ffffffff81cf8a00 T si_ib_parse +ffffffff81cf90b0 T si_vm_init +ffffffff81cf90f0 T si_vm_fini +ffffffff81cf9120 T si_vm_flush +ffffffff81cf9800 T si_init_uvd_internal_cg +ffffffff81cf9850 T si_get_csb_size +ffffffff81cf98e0 T si_get_csb_buffer +ffffffff81cf9a70 T si_rlc_reset +ffffffff81cf9af0 T si_irq_set +ffffffff81cfa000 t si_disable_interrupt_state +ffffffff81cfa280 T si_irq_process +ffffffff81cfb480 t si_irq_ack +ffffffff81cfba80 T si_resume +ffffffff81cfbb10 t si_init_golden_registers +ffffffff81cfbcd0 t si_startup +ffffffff81d00500 T si_suspend +ffffffff81d00880 T si_init +ffffffff81d01d50 t si_cp_fini +ffffffff81d01e40 t si_pcie_gart_fini +ffffffff81d01f40 T si_fini +ffffffff81d021f0 T si_get_gpu_clock_counter +ffffffff81d022c0 T si_set_uvd_clocks +ffffffff81d02830 T si_set_vce_clocks +ffffffff81d02d70 t si_vce_send_vcepll_ctlreq +ffffffff81d02fb0 t dce6_latency_watermark +ffffffff81d031e0 t si_rlc_stop +ffffffff81d03390 t si_vm_reg_valid +ffffffff81d034f0 t si_vm_packet3_cp_dma_check +ffffffff81d03670 t si_update_cg +ffffffff81d03bc0 t si_enable_mgcg +ffffffff81d03fe0 t si_enable_cgcg +ffffffff81d05000 T si_dma_is_lockup +ffffffff81d05080 T si_dma_vm_copy_pages +ffffffff81d05160 T si_dma_vm_write_pages +ffffffff81d052c0 T si_dma_vm_set_pages +ffffffff81d05420 T si_dma_vm_flush +ffffffff81d058b0 T si_copy_dma +ffffffff81d06000 T si_dpm_force_performance_level +ffffffff81d06160 T si_get_ddr3_mclk_frequency_ratio +ffffffff81d061c0 T si_get_mclk_frequency_ratio +ffffffff81d06240 T si_trim_voltage_table_to_fit_state_table +ffffffff81d06340 T si_dpm_setup_asic +ffffffff81d06510 T si_fan_ctrl_get_fan_speed_percent +ffffffff81d065a0 T si_fan_ctrl_set_fan_speed_percent +ffffffff81d06660 T si_fan_ctrl_set_mode +ffffffff81d068b0 T si_fan_ctrl_get_mode +ffffffff81d06900 T si_dpm_enable +ffffffff81d0bc00 t si_populate_smc_tdp_limits +ffffffff81d0be10 T si_dpm_late_enable +ffffffff81d0bf60 T si_dpm_disable +ffffffff81d0c2e0 T si_dpm_pre_set_power_state +ffffffff81d0cee0 T si_dpm_set_power_state +ffffffff81d0e460 T si_dpm_post_set_power_state +ffffffff81d0e490 T si_dpm_display_configuration_changed +ffffffff81d0e570 T si_dpm_init +ffffffff81d10020 T si_dpm_fini +ffffffff81d100d0 T si_dpm_debugfs_print_current_performance_level +ffffffff81d10120 T si_dpm_get_current_sclk +ffffffff81d10190 T si_dpm_get_current_mclk +ffffffff81d10200 t si_get_std_voltage_value +ffffffff81d10330 t si_convert_power_level_to_smc +ffffffff81d10bd0 t si_calculate_sclk_params +ffffffff81d10df0 t si_convert_mc_reg_table_to_smc +ffffffff81d10f50 t si_program_cac_config_registers +ffffffff81d12000 T si_copy_bytes_to_smc +ffffffff81d12250 T si_start_smc +ffffffff81d12290 T si_reset_smc +ffffffff81d122d0 T si_program_jump_on_start +ffffffff81d12300 T si_stop_smc_clock +ffffffff81d12340 T si_start_smc_clock +ffffffff81d12380 T si_is_smc_running +ffffffff81d123e0 T si_send_msg_to_smc +ffffffff81d124b0 T si_wait_for_smc_inactive +ffffffff81d12550 T si_load_smc_ucode +ffffffff81d126f0 T si_read_smc_sram_dword +ffffffff81d127c0 T si_write_smc_sram_dword +ffffffff81d13000 T sumo_get_pi +ffffffff81d13030 T sumo_gfx_clockgating_initialize +ffffffff81d13110 T sumo_program_vc +ffffffff81d13150 T sumo_clear_vc +ffffffff81d13190 T sumo_program_sstp +ffffffff81d13210 T sumo_take_smu_control +ffffffff81d13240 T sumo_get_sleep_divider_from_id +ffffffff81d13270 T sumo_get_sleep_divider_id_from_clock +ffffffff81d13320 T sumo_dpm_enable +ffffffff81d139c0 T sumo_dpm_late_enable +ffffffff81d13f80 T sumo_dpm_disable +ffffffff81d142d0 T sumo_dpm_pre_set_power_state +ffffffff81d14790 T sumo_dpm_set_power_state +ffffffff81d152d0 T sumo_dpm_post_set_power_state +ffffffff81d15370 T sumo_dpm_setup_asic +ffffffff81d15470 T sumo_dpm_display_configuration_changed +ffffffff81d154a0 T sumo_convert_vid2_to_vid7 +ffffffff81d15500 T sumo_construct_sclk_voltage_mapping_table +ffffffff81d155c0 T sumo_construct_vid_mapping_table +ffffffff81d15740 T sumo_dpm_init +ffffffff81d16000 T sumo_dpm_print_power_state +ffffffff81d16120 T sumo_dpm_debugfs_print_current_performance_level +ffffffff81d16150 T sumo_dpm_get_current_sclk +ffffffff81d161c0 T sumo_dpm_get_current_mclk +ffffffff81d161f0 T sumo_dpm_get_current_vddc +ffffffff81d162c0 T sumo_dpm_fini +ffffffff81d16350 T sumo_dpm_get_sclk +ffffffff81d163a0 T sumo_dpm_get_mclk +ffffffff81d163d0 T sumo_dpm_force_performance_level +ffffffff81d167f0 t sumo_power_level_enable +ffffffff81d16a20 t sumo_program_power_level +ffffffff81d17000 T sumo_initialize_m3_arb +ffffffff81d172c0 T sumo_smu_notify_alt_vddnb_change +ffffffff81d17360 t sumo_send_msg_to_smu +ffffffff81d17500 T sumo_smu_pg_init +ffffffff81d17520 T sumo_enable_boost_timer +ffffffff81d17660 T sumo_set_tdp_limit +ffffffff81d176e0 T sumo_boost_state_enable +ffffffff81d17730 T sumo_get_running_fw_version +ffffffff81d18000 T trinity_dpm_enable_bapm +ffffffff81d18080 T trinity_dpm_enable +ffffffff81d18520 T trinity_dpm_late_enable +ffffffff81d18a80 T trinity_dpm_disable +ffffffff81d18e90 T trinity_dpm_force_performance_level +ffffffff81d18f50 T trinity_dpm_pre_set_power_state +ffffffff81d19520 T trinity_dpm_set_power_state +ffffffff81d19ab0 T trinity_dpm_post_set_power_state +ffffffff81d19b50 T trinity_dpm_setup_asic +ffffffff81d19bb0 T trinity_dpm_display_configuration_changed +ffffffff81d19c40 T trinity_dpm_init +ffffffff81d1a540 T trinity_dpm_print_power_state +ffffffff81d1a650 T trinity_dpm_debugfs_print_current_performance_level +ffffffff81d1a6e0 T trinity_dpm_get_current_sclk +ffffffff81d1a740 T trinity_dpm_get_current_mclk +ffffffff81d1a770 T trinity_dpm_fini +ffffffff81d1a810 T trinity_dpm_get_sclk +ffffffff81d1a860 T trinity_dpm_get_mclk +ffffffff81d1a890 t trinity_program_power_level +ffffffff81d1b000 T trinity_dpm_bapm_enable +ffffffff81d1b150 T trinity_dpm_config +ffffffff81d1b230 T trinity_dpm_force_state +ffffffff81d1b310 T trinity_dpm_n_levels_disabled +ffffffff81d1b3f0 T trinity_uvd_dpm_config +ffffffff81d1b4c0 T trinity_dpm_no_forced_level +ffffffff81d1b590 T trinity_dce_enable_voltage_adjustment +ffffffff81d1b6e0 T trinity_gfx_dynamic_mgpg_config +ffffffff81d1b7b0 T trinity_acquire_mutex +ffffffff81d1b840 T trinity_release_mutex +ffffffff81d1c000 T uvd_v1_0_get_rptr +ffffffff81d1c040 T uvd_v1_0_get_wptr +ffffffff81d1c080 T uvd_v1_0_set_wptr +ffffffff81d1c0c0 T uvd_v1_0_fence_emit +ffffffff81d1c4b0 T uvd_v1_0_resume +ffffffff81d1c610 T uvd_v1_0_init +ffffffff81d1cba0 T uvd_v1_0_start +ffffffff81d1d320 T uvd_v1_0_fini +ffffffff81d1d490 T uvd_v1_0_stop +ffffffff81d1d600 T uvd_v1_0_ring_test +ffffffff81d1d7d0 T uvd_v1_0_semaphore_emit +ffffffff81d1d800 T uvd_v1_0_ib_execute +ffffffff81d1d9a0 T uvd_v1_0_ib_test +ffffffff81d1e000 T uvd_v2_2_fence_emit +ffffffff81d1e470 T uvd_v2_2_semaphore_emit +ffffffff81d1e680 T uvd_v2_2_resume +ffffffff81d1f000 T uvd_v3_1_semaphore_emit +ffffffff81d20000 T uvd_v4_2_resume +ffffffff81d21000 T vce_v1_0_get_rptr +ffffffff81d21090 T vce_v1_0_get_wptr +ffffffff81d21120 T vce_v1_0_set_wptr +ffffffff81d211b0 T vce_v1_0_enable_mgcg +ffffffff81d21470 T vce_v1_0_load_fw +ffffffff81d21640 T vce_v1_0_bo_size +ffffffff81d216b0 T vce_v1_0_resume +ffffffff81d22020 T vce_v1_0_start +ffffffff81d227e0 T vce_v1_0_init +ffffffff81d23000 T vce_v2_0_enable_mgcg +ffffffff81d23070 t vce_v2_0_set_dyn_cg +ffffffff81d23260 T vce_v2_0_bo_size +ffffffff81d232d0 T vce_v2_0_resume +ffffffff81d24000 T aldebaran_reset_init +ffffffff81d240c0 t aldebaran_async_reset +ffffffff81d24120 t aldebaran_get_reset_handler +ffffffff81d241d0 T aldebaran_reset_fini +ffffffff81d24230 t aldebaran_mode2_prepare_hwcontext +ffffffff81d24350 t aldebaran_mode2_perform_reset +ffffffff81d24530 t aldebaran_mode2_restore_hwcontext +ffffffff81d24a10 t aldebaran_mode2_reset +ffffffff81d25000 T aldebaran_reg_base_init +ffffffff81d26000 T amdgpu_acpi_is_pcie_performance_request_supported +ffffffff81d26040 T amdgpu_acpi_is_power_shift_control_supported +ffffffff81d26070 T amdgpu_acpi_pcie_notify_device_ready +ffffffff81d26190 t amdgpu_atcs_call +ffffffff81d26280 T amdgpu_acpi_pcie_performance_request +ffffffff81d264d0 T amdgpu_acpi_power_shift_control +ffffffff81d26580 T amdgpu_acpi_smart_shift_update +ffffffff81d266d0 T amdgpu_acpi_init +ffffffff81d26790 t amdgpu_acpi_event +ffffffff81d26ad0 T amdgpu_acpi_get_backlight_caps +ffffffff81d26b20 T amdgpu_acpi_fini +ffffffff81d26b40 T amdgpu_acpi_should_gpu_reset +ffffffff81d26b90 T amdgpu_acpi_detect +ffffffff81d28000 T amdgpu_afmt_acr +ffffffff81d29000 T amdgpu_amdkfd_init +ffffffff81d29040 T amdgpu_amdkfd_fini +ffffffff81d29070 T amdgpu_amdkfd_device_probe +ffffffff81d290a0 T amdgpu_amdkfd_device_init +ffffffff81d29270 t amdgpu_amdkfd_reset_work +ffffffff81d292f0 T amdgpu_amdkfd_device_fini_sw +ffffffff81d29340 T amdgpu_amdkfd_interrupt +ffffffff81d29370 T amdgpu_amdkfd_suspend +ffffffff81d293a0 T amdgpu_amdkfd_resume_iommu +ffffffff81d293d0 T amdgpu_amdkfd_resume +ffffffff81d29400 T amdgpu_amdkfd_pre_reset +ffffffff81d29430 T amdgpu_amdkfd_post_reset +ffffffff81d29460 T amdgpu_amdkfd_gpu_reset +ffffffff81d294c0 T amdgpu_amdkfd_alloc_gtt_mem +ffffffff81d29770 t amdgpu_bo_reserve +ffffffff81d298d0 t amdgpu_bo_unreserve +ffffffff81d299b0 T amdgpu_amdkfd_free_gtt_mem +ffffffff81d29a20 T amdgpu_amdkfd_alloc_gws +ffffffff81d29b00 T amdgpu_amdkfd_free_gws +ffffffff81d29b40 T amdgpu_amdkfd_get_fw_version +ffffffff81d29bf0 T amdgpu_amdkfd_get_local_mem_info +ffffffff81d29cc0 T amdgpu_amdkfd_get_gpu_clock_counter +ffffffff81d29d00 T amdgpu_amdkfd_get_max_engine_clock_in_mhz +ffffffff81d29d80 T amdgpu_amdkfd_get_cu_info +ffffffff81d29ed0 T amdgpu_amdkfd_get_dmabuf_info +ffffffff81d2a010 T amdgpu_amdkfd_get_xgmi_hops_count +ffffffff81d2a080 T amdgpu_amdkfd_get_xgmi_bandwidth_mbytes +ffffffff81d2a110 T amdgpu_amdkfd_get_pcie_bandwidth_mbytes +ffffffff81d2a280 T amdgpu_amdkfd_submit_ib +ffffffff81d2a3e0 T amdgpu_amdkfd_set_compute_idle +ffffffff81d2a430 T amdgpu_amdkfd_is_kfd_vmid +ffffffff81d2a470 T amdgpu_amdkfd_flush_gpu_tlb_vmid +ffffffff81d2a510 T amdgpu_amdkfd_flush_gpu_tlb_pasid +ffffffff81d2a540 T amdgpu_amdkfd_have_atomics_support +ffffffff81d2a570 T amdgpu_amdkfd_ras_poison_consumption_handler +ffffffff81d2a5d0 T amdgpu_amdkfd_ras_query_utcl2_poison_status +ffffffff81d2b000 T amdgpu_atom_execute_table +ffffffff81d2b0a0 t amdgpu_atom_execute_table_locked +ffffffff81d2b3f0 T amdgpu_atom_parse +ffffffff81d2b940 T amdgpu_atom_destroy +ffffffff81d2b980 T amdgpu_atom_asic_init +ffffffff81d2baa0 T amdgpu_atom_parse_data_header +ffffffff81d2bb40 T amdgpu_atom_parse_cmd_header +ffffffff81d2bbc0 t atom_op_move +ffffffff81d2bda0 t atom_op_and +ffffffff81d2bf80 t atom_op_or +ffffffff81d2c160 t atom_op_shift_left +ffffffff81d2c350 t atom_op_shift_right +ffffffff81d2c540 t atom_op_mul +ffffffff81d2c690 t atom_op_div +ffffffff81d2c800 t atom_op_add +ffffffff81d2c9e0 t atom_op_sub +ffffffff81d2cbc0 t atom_op_setport +ffffffff81d2cd40 t atom_op_setregblock +ffffffff81d2ce00 t atom_op_setfbbase +ffffffff81d2ced0 t atom_op_compare +ffffffff81d2d0c0 t atom_op_switch +ffffffff81d2d310 t atom_op_jump +ffffffff81d2d590 t atom_op_test +ffffffff81d2d750 t atom_op_delay +ffffffff81d2d830 t atom_op_calltable +ffffffff81d2d980 t atom_op_repeat +ffffffff81d2d9b0 t atom_op_clear +ffffffff81d2dac0 t atom_op_nop +ffffffff81d2daf0 t atom_op_eot +ffffffff81d2db20 t atom_op_mask +ffffffff81d2ddf0 t atom_op_postcard +ffffffff81d2dea0 t atom_op_beep +ffffffff81d2dec0 t atom_op_savereg +ffffffff81d2def0 t atom_op_restorereg +ffffffff81d2df20 t atom_op_setdatablock +ffffffff81d2e060 t atom_op_xor +ffffffff81d2e240 t atom_op_shl +ffffffff81d2e460 t atom_op_shr +ffffffff81d2e680 t atom_op_debug +ffffffff81d2e730 t atom_op_processds +ffffffff81d2e7f0 t atom_op_mul32 +ffffffff81d2e950 t atom_op_div32 +ffffffff81d2eae0 t atom_put_dst +ffffffff81d2efb0 t atom_get_src_int +ffffffff81d2f660 t atom_iio_execute +ffffffff81d30000 T amdgpu_atombios_lookup_i2c_gpio +ffffffff81d30260 T amdgpu_atombios_i2c_init +ffffffff81d30540 T amdgpu_atombios_lookup_gpio +ffffffff81d30640 T amdgpu_atombios_has_dce_engine_info +ffffffff81d306c0 T amdgpu_atombios_get_connector_info_from_object_table +ffffffff81d30f10 T amdgpu_atombios_get_clock_info +ffffffff81d31250 T amdgpu_atombios_get_gfx_info +ffffffff81d31310 T amdgpu_atombios_get_vram_width +ffffffff81d313a0 T amdgpu_atombios_get_asic_ss_info +ffffffff81d31710 T amdgpu_atombios_get_clock_dividers +ffffffff81d31930 T amdgpu_atombios_has_gpu_virtualization_table +ffffffff81d31980 T amdgpu_atombios_scratch_regs_lock +ffffffff81d319e0 T amdgpu_atombios_scratch_regs_engine_hung +ffffffff81d31a30 T amdgpu_atombios_scratch_regs_set_backlight_level +ffffffff81d31a90 T amdgpu_atombios_scratch_need_asic_init +ffffffff81d31ae0 T amdgpu_atombios_copy_swap +ffffffff81d31b00 T amdgpu_atombios_fini +ffffffff81d31ba0 T amdgpu_atombios_init +ffffffff81d31e40 t cail_reg_read +ffffffff81d31e60 t cail_reg_write +ffffffff81d31e80 t cail_mc_read +ffffffff81d31eb0 t cail_mc_write +ffffffff81d31ee0 t cail_pll_read +ffffffff81d31f10 t cail_pll_write +ffffffff81d31f40 T amdgpu_atombios_get_data_table +ffffffff81d32000 T amdgpu_atombios_crtc_overscan_setup +ffffffff81d32150 T amdgpu_atombios_crtc_scaler_setup +ffffffff81d321d0 T amdgpu_atombios_crtc_lock +ffffffff81d32230 T amdgpu_atombios_crtc_enable +ffffffff81d32290 T amdgpu_atombios_crtc_blank +ffffffff81d322f0 T amdgpu_atombios_crtc_powergate +ffffffff81d32360 T amdgpu_atombios_crtc_powergate_init +ffffffff81d323d0 T amdgpu_atombios_crtc_set_dtd_timing +ffffffff81d324e0 T amdgpu_atombios_crtc_set_disp_eng_pll +ffffffff81d325d0 T amdgpu_atombios_crtc_set_dce_clock +ffffffff81d326c0 T amdgpu_atombios_crtc_program_pll +ffffffff81d329d0 T amdgpu_atombios_crtc_prepare_pll +ffffffff81d32ed0 T amdgpu_atombios_crtc_set_pll +ffffffff81d34000 T amdgpu_atombios_dp_aux_init +ffffffff81d34090 t amdgpu_atombios_dp_aux_transfer +ffffffff81d34200 T amdgpu_atombios_dp_get_sinktype +ffffffff81d34270 T amdgpu_atombios_dp_get_dpcd +ffffffff81d34420 T amdgpu_atombios_dp_get_panel_mode +ffffffff81d34510 T amdgpu_atombios_dp_set_link_config +ffffffff81d34590 t amdgpu_atombios_dp_get_dp_link_config +ffffffff81d34710 T amdgpu_atombios_dp_mode_valid_helper +ffffffff81d34790 T amdgpu_atombios_dp_needs_link_train +ffffffff81d34800 T amdgpu_atombios_dp_set_rx_power_state +ffffffff81d34880 T amdgpu_atombios_dp_link_train +ffffffff81d34dd0 t amdgpu_atombios_dp_process_aux_ch +ffffffff81d34f40 t amdgpu_atombios_dp_get_adjust_train +ffffffff81d36000 T amdgpu_atombios_encoder_get_backlight_level_from_reg +ffffffff81d36050 T amdgpu_atombios_encoder_set_backlight_level_to_reg +ffffffff81d360a0 T amdgpu_atombios_encoder_get_backlight_level +ffffffff81d36100 T amdgpu_atombios_encoder_set_backlight_level +ffffffff81d36210 T amdgpu_atombios_encoder_setup_dig_transmitter +ffffffff81d36be0 T amdgpu_atombios_encoder_init_backlight +ffffffff81d36d80 t amdgpu_atombios_encoder_get_backlight_brightness +ffffffff81d36de0 T amdgpu_atombios_encoder_fini_backlight +ffffffff81d36e70 T amdgpu_atombios_encoder_is_digital +ffffffff81d36ec0 T amdgpu_atombios_encoder_mode_fixup +ffffffff81d36fa0 T amdgpu_atombios_encoder_get_encoder_mode +ffffffff81d37140 T amdgpu_atombios_encoder_setup_dig_encoder +ffffffff81d37600 T amdgpu_atombios_encoder_set_edp_panel_power +ffffffff81d37700 T amdgpu_atombios_encoder_dpms +ffffffff81d37870 t amdgpu_atombios_encoder_setup_dig +ffffffff81d37be0 t amdgpu_atombios_encoder_setup_dvo +ffffffff81d37d80 T amdgpu_atombios_encoder_set_crtc_source +ffffffff81d38160 T amdgpu_atombios_encoder_init_dig +ffffffff81d38230 t amdgpu_atombios_encoder_setup_external_encoder +ffffffff81d38490 T amdgpu_atombios_encoder_dac_detect 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amdgpu_atomfirmware_dynamic_boot_config_supported +ffffffff81d3bae0 T amdgpu_atomfirmware_ras_rom_addr +ffffffff81d3bb80 T amdgpu_atomfirmware_get_clock_info +ffffffff81d3bda0 T amdgpu_atomfirmware_get_gfx_info +ffffffff81d3bf40 T amdgpu_atomfirmware_mem_training_supported +ffffffff81d3bf80 T amdgpu_atomfirmware_get_fw_reserved_fb_size +ffffffff81d3c010 T amdgpu_atomfirmware_asic_init +ffffffff81d3d000 T amdgpu_benchmark +ffffffff81d3d7a0 t amdgpu_benchmark_move +ffffffff81d3e000 T amdgpu_read_bios +ffffffff81d3e190 t check_atom_bios +ffffffff81d3e2a0 T amdgpu_get_bios +ffffffff81d3e850 t igp_read_bios_from_vram +ffffffff81d3e990 T amdgpu_soc15_read_bios_from_rom +ffffffff81d3f000 T amdgpu_bo_list_create +ffffffff81d3f290 T amdgpu_bo_list_get +ffffffff81d3f2f0 T amdgpu_bo_list_get_list +ffffffff81d3f450 T amdgpu_bo_list_put +ffffffff81d3f500 T amdgpu_bo_create_list_entry_array +ffffffff81d3f650 T amdgpu_bo_list_ioctl +ffffffff81d40000 T amdgpu_cgs_create_device +ffffffff81d40080 T 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dce_v11_0_set_crtc_vline_interrupt_state +ffffffff81dcac60 t dce_v11_0_set_pageflip_irq_state +ffffffff81dcad10 t dce_v11_0_pageflip_irq +ffffffff81dcae70 t dce_v11_0_set_hpd_irq_state +ffffffff81dcaf40 t dce_v11_0_hpd_irq +ffffffff81dcb060 t dce_v11_0_crtc_cursor_set2 +ffffffff81dcb3d0 t dce_v11_0_crtc_cursor_move +ffffffff81dcb4b0 t dce_v11_0_crtc_gamma_set +ffffffff81dcb4f0 t dce_v11_0_crtc_destroy +ffffffff81dcb520 t amdgpu_bo_reserve +ffffffff81dcb730 t amdgpu_bo_unreserve +ffffffff81dcb810 t dce_v11_0_cursor_move_locked +ffffffff81dcb960 t dce_v11_0_crtc_load_lut +ffffffff81dcbcd0 t dce_v11_0_crtc_dpms +ffffffff81dcbea0 t dce_v11_0_crtc_prepare +ffffffff81dcbee0 t dce_v11_0_crtc_commit +ffffffff81dcbf10 t dce_v11_0_crtc_mode_fixup +ffffffff81dcc180 t dce_v11_0_crtc_mode_set +ffffffff81dcc3e0 t dce_v11_0_crtc_set_base +ffffffff81dcc400 t dce_v11_0_crtc_set_base_atomic +ffffffff81dcc420 t dce_v11_0_crtc_disable +ffffffff81dcc5c0 t dce_v11_0_crtc_do_set_base +ffffffff81dcd000 t df_v1_7_sw_init +ffffffff81dcd040 t df_v1_7_sw_fini +ffffffff81dcd070 t df_v1_7_enable_broadcast_mode +ffffffff81dcd190 t df_v1_7_get_fb_channel_number +ffffffff81dcd210 t df_v1_7_get_hbm_channel_number +ffffffff81dcd260 t df_v1_7_update_medium_grain_clock_gating +ffffffff81dcd3d0 t df_v1_7_get_clockgating_state +ffffffff81dcd460 t df_v1_7_enable_ecc_force_par_wr_rmw +ffffffff81dce000 t df_v3_6_sw_init +ffffffff81dce160 t df_v3_6_sw_fini +ffffffff81dce190 t df_v3_6_enable_broadcast_mode +ffffffff81dce2b0 t df_v3_6_get_fb_channel_number +ffffffff81dce390 t df_v3_6_get_hbm_channel_number +ffffffff81dce3e0 t df_v3_6_update_medium_grain_clock_gating +ffffffff81dce580 t df_v3_6_get_clockgating_state +ffffffff81dce610 t df_v3_6_pmc_start +ffffffff81dce990 t df_v3_6_pmc_stop +ffffffff81dcec30 t df_v3_6_pmc_get_count +ffffffff81dcedc0 t df_v3_6_get_fica +ffffffff81dceed0 t df_v3_6_set_fica +ffffffff81dcefb0 t df_v3_6_query_ras_poison_mode +ffffffff81dcf120 t df_v3_6_perfmon_arm_with_status +ffffffff81dd0000 T dimgrey_cavefish_reg_base_init +ffffffff81dd1000 T emu_soc_asic_init +ffffffff81dd2000 t gfx_v10_0_early_init +ffffffff81dd2420 t gfx_v10_0_late_init +ffffffff81dd2490 t gfx_v10_0_sw_init +ffffffff81dd3840 t gfx_v10_0_sw_fini +ffffffff81dd3b80 t gfx_v10_0_hw_init +ffffffff81dd6730 t gfx_v10_0_hw_fini +ffffffff81dd6a20 t gfx_v10_0_suspend +ffffffff81dd6a60 t gfx_v10_0_resume +ffffffff81dd6a70 t gfx_v10_0_is_idle +ffffffff81dd6b00 t gfx_v10_0_wait_for_idle +ffffffff81dd6be0 t gfx_v10_0_soft_reset +ffffffff81dd6f30 t gfx_v10_0_set_clockgating_state +ffffffff81dd71d0 t gfx_v10_0_set_powergating_state +ffffffff81dd73f0 t gfx_v10_0_get_clockgating_state +ffffffff81dd7500 t gfx10_kiq_set_resources +ffffffff81dd7830 t gfx10_kiq_map_queues +ffffffff81dd7bc0 t gfx10_kiq_unmap_queues +ffffffff81dd7fc0 t gfx10_kiq_query_status +ffffffff81dd82c0 t gfx10_kiq_invalidate_tlbs +ffffffff81dd83e0 t gfx_v10_0_ring_get_rptr_compute +ffffffff81dd8410 t gfx_v10_0_ring_get_wptr_compute +ffffffff81dd8480 t gfx_v10_0_ring_set_wptr_compute +ffffffff81dd85c0 t gfx_v10_0_ring_emit_ib_compute +ffffffff81dd8910 t gfx_v10_0_ring_emit_fence_kiq +ffffffff81dd8d50 t gfx_v10_0_ring_test_ring +ffffffff81dd8fc0 t gfx_v10_0_ring_test_ib +ffffffff81dd9270 t gfx_v10_0_ring_emit_rreg +ffffffff81dd9510 t gfx_v10_0_ring_emit_wreg +ffffffff81dd9750 t gfx_v10_0_ring_emit_reg_wait +ffffffff81dd97a0 t gfx_v10_0_ring_emit_reg_write_reg_wait +ffffffff81dd9830 t gfx_v10_0_wait_reg_mem +ffffffff81dd9b60 t gfx_v10_0_ring_get_rptr_gfx +ffffffff81dd9b90 t gfx_v10_0_ring_get_wptr_gfx +ffffffff81dd9ca0 t gfx_v10_0_ring_set_wptr_gfx +ffffffff81dd9eb0 t gfx_v10_0_ring_emit_ib_gfx +ffffffff81dda560 t gfx_v10_0_ring_emit_fence +ffffffff81dda930 t gfx_v10_0_ring_emit_pipeline_sync +ffffffff81dda990 t gfx_v10_0_ring_emit_vm_flush +ffffffff81ddab60 t gfx_v10_0_ring_emit_hdp_flush +ffffffff81ddac30 t gfx_v10_0_ring_emit_gds_switch +ffffffff81ddad10 t gfx_v10_0_ring_emit_init_cond_exec +ffffffff81ddaf40 t gfx_v10_0_ring_emit_patch_cond_exec +ffffffff81ddb000 t gfx_v10_0_ring_emit_sb +ffffffff81ddb0f0 t gfx_v10_0_ring_emit_cntxcntl +ffffffff81ddb5e0 t gfx_v10_0_ring_emit_frame_cntl +ffffffff81ddb6f0 t gfx_v10_0_ring_soft_recovery +ffffffff81ddb760 t gfx_v10_0_ring_preempt_ib +ffffffff81ddb8d0 t gfx_v10_0_emit_mem_sync +ffffffff81ddbc10 t gfx_v10_0_write_data_to_reg +ffffffff81ddbe20 t gfx_v10_0_set_eop_interrupt_state +ffffffff81ddbf00 t gfx_v10_0_eop_irq +ffffffff81ddc0d0 t gfx_v10_0_set_gfx_eop_interrupt_state +ffffffff81ddc260 t gfx_v10_0_set_compute_eop_interrupt_state +ffffffff81ddc410 t gfx_v10_0_kiq_set_interrupt_state +ffffffff81ddc6f0 t gfx_v10_0_kiq_irq +ffffffff81ddc770 t gfx_v10_0_set_priv_reg_fault_state +ffffffff81ddc890 t gfx_v10_0_priv_reg_irq +ffffffff81ddc8f0 t gfx_v10_0_handle_priv_fault +ffffffff81ddca80 t gfx_v10_0_set_priv_inst_fault_state +ffffffff81ddcba0 t gfx_v10_0_priv_inst_irq +ffffffff81ddcc00 t gfx_v10_0_is_rlc_enabled +ffffffff81ddcc80 t gfx_v10_0_set_safe_mode +ffffffff81ddcf20 t gfx_v10_0_unset_safe_mode +ffffffff81ddcfd0 t gfx_v10_0_rlc_init +ffffffff81ddd050 t gfx_v10_0_get_csb_size +ffffffff81ddd0b0 t gfx_v10_0_get_csb_buffer +ffffffff81ddd230 t gfx_v10_0_rlc_resume +ffffffff81dddd30 t gfx_v10_0_rlc_stop +ffffffff81ddde10 t gfx_v10_0_rlc_reset +ffffffff81dddfb0 t gfx_v10_0_rlc_start +ffffffff81dde150 t gfx_v10_0_update_spm_vmid +ffffffff81dde280 t gfx_v10_0_wait_for_rlc_autoload_complete +ffffffff81ddee10 t gfx_v10_0_init_csb +ffffffff81ddf0e0 t gfx_v10_0_is_rlcg_access_range +ffffffff81ddf110 t gfx_v10_0_gfx_mqd_init +ffffffff81ddf4f0 t gfx_v10_0_compute_mqd_init +ffffffff81ddf990 t amdgpu_bo_unreserve +ffffffff81ddfa70 t gfx_v10_0_get_gpu_clock_counter +ffffffff81ddff70 t gfx_v10_0_select_se_sh +ffffffff81de0010 t gfx_v10_0_read_wave_data +ffffffff81de0270 t gfx_v10_0_read_wave_vgprs +ffffffff81de02a0 t gfx_v10_0_read_wave_sgprs +ffffffff81de0320 t gfx_v10_0_select_me_pipe_q +ffffffff81de0340 t gfx_v10_0_init_spm_golden_registers +ffffffff81de03b0 t gfx_v10_0_update_perfmon_mgcg +ffffffff81de04d0 t wave_read_ind +ffffffff81de05b0 t wave_read_regs +ffffffff81de0710 t gfx_v10_0_cp_resume +ffffffff81de3350 t gfx_v10_3_get_disabled_sa +ffffffff81de3460 t gfx_v10_0_get_rb_active_bitmap +ffffffff81de3580 t gfx_v10_0_get_wgp_active_bitmap_per_sh +ffffffff81de3690 t gfx_v10_0_enable_gui_idle_interrupt +ffffffff81de37a0 t gfx_v10_0_cp_gfx_enable +ffffffff81de39e0 t gfx_v10_0_cp_compute_enable +ffffffff81de3b70 t amdgpu_bo_reserve +ffffffff81de3cf0 t gfx_v10_0_kiq_init_register +ffffffff81de4b60 t gfx_v10_0_cp_gfx_switch_pipe +ffffffff81de4c60 t gfx_v10_0_cp_gfx_set_doorbell +ffffffff81de4f30 t gfx_v10_0_cp_gfx_start +ffffffff81de5910 t gfx_v10_0_update_fine_grain_clock_gating +ffffffff81de5c30 t gfx_v10_0_update_medium_grain_clock_gating +ffffffff81de6350 t gfx_v10_0_update_3d_clock_gating +ffffffff81de6710 t gfx_v10_0_update_coarse_grain_clock_gating +ffffffff81de7000 t gfx_v11_0_early_init +ffffffff81de73a0 t gfx_v11_0_late_init +ffffffff81de7410 t gfx_v11_0_sw_init +ffffffff81de8310 t gfx_v11_0_sw_fini +ffffffff81de85f0 t gfx_v11_0_hw_init +ffffffff81deca70 t gfx_v11_0_hw_fini +ffffffff81deccf0 t gfx_v11_0_suspend +ffffffff81decd30 t gfx_v11_0_resume +ffffffff81decd40 t gfx_v11_0_is_idle +ffffffff81decdd0 t gfx_v11_0_wait_for_idle +ffffffff81deceb0 t gfx_v11_0_check_soft_reset +ffffffff81decfe0 t gfx_v11_0_soft_reset +ffffffff81dedcc0 t gfx_v11_0_set_clockgating_state +ffffffff81dee8a0 t gfx_v11_0_set_powergating_state +ffffffff81deea90 t gfx_v11_0_get_clockgating_state +ffffffff81deec60 t gfx11_kiq_set_resources +ffffffff81deef90 t gfx11_kiq_map_queues +ffffffff81def320 t gfx11_kiq_unmap_queues +ffffffff81def720 t gfx11_kiq_query_status +ffffffff81defa20 t gfx11_kiq_invalidate_tlbs +ffffffff81defb40 t gfx_v11_0_ring_get_rptr_compute +ffffffff81defb70 t gfx_v11_0_ring_get_wptr_compute +ffffffff81defbe0 t gfx_v11_0_ring_set_wptr_compute +ffffffff81defd20 t gfx_v11_0_ring_emit_ib_compute +ffffffff81df0070 t gfx_v11_0_ring_emit_fence_kiq +ffffffff81df04b0 t gfx_v11_0_ring_test_ring +ffffffff81df0740 t gfx_v11_0_ring_test_ib +ffffffff81df0a00 t gfx_v11_0_ring_emit_rreg +ffffffff81df0ca0 t gfx_v11_0_ring_emit_wreg +ffffffff81df0ee0 t gfx_v11_0_ring_emit_reg_wait +ffffffff81df0f30 t gfx_v11_0_ring_emit_reg_write_reg_wait +ffffffff81df0fa0 t gfx_v11_0_wait_reg_mem +ffffffff81df12d0 t gfx_v11_0_ring_get_rptr_gfx +ffffffff81df1300 t gfx_v11_0_ring_get_wptr_gfx +ffffffff81df1410 t gfx_v11_0_ring_set_wptr_gfx +ffffffff81df1620 t gfx_v11_0_ring_emit_ib_gfx +ffffffff81df1cc0 t gfx_v11_0_ring_emit_fence +ffffffff81df2090 t gfx_v11_0_ring_emit_pipeline_sync +ffffffff81df20f0 t gfx_v11_0_ring_emit_vm_flush +ffffffff81df22c0 t gfx_v11_0_ring_emit_hdp_flush +ffffffff81df2390 t gfx_v11_0_ring_emit_gds_switch +ffffffff81df2470 t gfx_v11_0_ring_emit_init_cond_exec +ffffffff81df26a0 t gfx_v11_0_ring_emit_patch_cond_exec +ffffffff81df2760 t gfx_v11_0_ring_emit_cntxcntl +ffffffff81df28c0 t gfx_v11_0_ring_emit_frame_cntl +ffffffff81df29d0 t gfx_v11_0_ring_soft_recovery +ffffffff81df2a40 t gfx_v11_0_ring_preempt_ib +ffffffff81df2bb0 t gfx_v11_0_emit_mem_sync +ffffffff81df2ef0 t gfx_v11_0_write_data_to_reg +ffffffff81df3100 t gfx_v11_0_set_eop_interrupt_state +ffffffff81df3190 t gfx_v11_0_eop_irq +ffffffff81df3360 t gfx_v11_0_set_gfx_eop_interrupt_state +ffffffff81df34f0 t gfx_v11_0_set_compute_eop_interrupt_state +ffffffff81df3680 t gfx_v11_0_set_priv_reg_fault_state +ffffffff81df37a0 t gfx_v11_0_priv_reg_irq +ffffffff81df3800 t gfx_v11_0_handle_priv_fault +ffffffff81df3990 t gfx_v11_0_set_priv_inst_fault_state +ffffffff81df3ab0 t gfx_v11_0_priv_inst_irq +ffffffff81df3b10 t gfx_v11_0_is_rlc_enabled +ffffffff81df3b90 t gfx_v11_0_set_safe_mode +ffffffff81df3ce0 t gfx_v11_0_unset_safe_mode +ffffffff81df3d50 t gfx_v11_0_rlc_init +ffffffff81df3dd0 t gfx_v11_0_get_csb_size +ffffffff81df3e30 t gfx_v11_0_get_csb_buffer +ffffffff81df3fb0 t gfx_v11_0_rlc_resume +ffffffff81df4cd0 t gfx_v11_0_rlc_stop +ffffffff81df4db0 t gfx_v11_0_rlc_reset +ffffffff81df4f50 t gfx_v11_0_rlc_start +ffffffff81df50f0 t gfx_v11_0_update_spm_vmid +ffffffff81df51f0 t gfx_v11_0_init_csb +ffffffff81df5370 t gfx_v11_0_gfx_mqd_init +ffffffff81df5740 t gfx_v11_0_compute_mqd_init +ffffffff81df5c60 t amdgpu_bo_unreserve +ffffffff81df5d40 t gfx_v11_0_get_gpu_clock_counter +ffffffff81df5e70 t gfx_v11_0_select_se_sh +ffffffff81df5f10 t gfx_v11_0_read_wave_data +ffffffff81df6150 t gfx_v11_0_read_wave_vgprs +ffffffff81df6180 t gfx_v11_0_read_wave_sgprs +ffffffff81df6200 t gfx_v11_0_select_me_pipe_q +ffffffff81df6220 t gfx_v11_0_update_perf_clk +ffffffff81df6350 t wave_read_ind +ffffffff81df6430 t wave_read_regs +ffffffff81df6590 t gfx_v11_0_disable_gpa_mode +ffffffff81df6720 t gfx_v11_0_cp_resume +ffffffff81dfa7c0 t gfx_v11_0_config_me_cache +ffffffff81dfab60 t gfx_v11_0_config_pfp_cache +ffffffff81dfaf00 t gfx_v11_0_config_mec_cache +ffffffff81dfb2a0 t gfx_v11_0_enable_gui_idle_interrupt +ffffffff81dfb3b0 t gfx_v11_0_cp_compute_enable +ffffffff81dfb580 t gfx_v11_0_cp_gfx_enable +ffffffff81dfb770 t amdgpu_bo_reserve +ffffffff81dfb8f0 t gfx_v11_0_kiq_init_register +ffffffff81dfc760 t gfx_v11_0_cp_gfx_switch_pipe +ffffffff81dfc840 t gfx_v11_0_cp_gfx_set_doorbell +ffffffff81dfca20 t gfx_v11_0_cp_gfx_start +ffffffff81dfe000 t gfx_v8_0_early_init +ffffffff81dfe320 t gfx_v8_0_late_init +ffffffff81dfea20 t gfx_v8_0_sw_init +ffffffff81e000f0 t gfx_v8_0_sw_fini +ffffffff81e003b0 t gfx_v8_0_hw_init +ffffffff81e025e0 t gfx_v8_0_hw_fini +ffffffff81e02ad0 t gfx_v8_0_suspend +ffffffff81e02b10 t gfx_v8_0_resume +ffffffff81e02b20 t gfx_v8_0_is_idle +ffffffff81e02b90 t gfx_v8_0_wait_for_idle +ffffffff81e02c40 t gfx_v8_0_check_soft_reset +ffffffff81e02d20 t gfx_v8_0_pre_soft_reset +ffffffff81e02ea0 t gfx_v8_0_soft_reset +ffffffff81e03060 t gfx_v8_0_post_soft_reset +ffffffff81e03220 t gfx_v8_0_set_clockgating_state +ffffffff81e034e0 t gfx_v8_0_set_powergating_state +ffffffff81e038a0 t gfx_v8_0_get_clockgating_state +ffffffff81e03980 t gfx_v8_0_get_gpu_clock_counter +ffffffff81e03a20 t gfx_v8_0_select_se_sh +ffffffff81e03a80 t gfx_v8_0_read_wave_data +ffffffff81e03f20 t gfx_v8_0_read_wave_sgprs +ffffffff81e03fd0 t gfx_v8_0_select_me_pipe_q +ffffffff81e03ff0 t gfx_v8_0_ring_get_rptr +ffffffff81e04020 t gfx_v8_0_ring_get_wptr_compute +ffffffff81e04050 t gfx_v8_0_ring_set_wptr_compute +ffffffff81e04090 t gfx_v8_0_ring_emit_fence_kiq +ffffffff81e044c0 t gfx_v8_0_ring_test_ring +ffffffff81e046c0 t gfx_v8_0_ring_emit_rreg +ffffffff81e04960 t gfx_v8_0_ring_emit_wreg +ffffffff81e04ba0 t gfx_v8_0_ring_get_wptr_gfx +ffffffff81e04c00 t gfx_v8_0_ring_set_wptr_gfx +ffffffff81e04c70 t gfx_v8_0_ring_emit_ib_gfx +ffffffff81e051d0 t gfx_v8_0_ring_emit_fence_gfx +ffffffff81e056d0 t gfx_v8_0_ring_emit_pipeline_sync +ffffffff81e059c0 t gfx_v8_0_ring_emit_vm_flush +ffffffff81e05d70 t gfx_v8_0_ring_emit_hdp_flush +ffffffff81e06090 t gfx_v8_0_ring_emit_gds_switch +ffffffff81e06860 t gfx_v8_0_ring_test_ib +ffffffff81e06a10 t gfx_v8_0_ring_emit_init_cond_exec +ffffffff81e06c40 t gfx_v8_0_ring_emit_patch_cond_exec +ffffffff81e06cf0 t gfx_v8_ring_emit_sb +ffffffff81e06de0 t gfx_v8_ring_emit_cntxcntl +ffffffff81e07380 t gfx_v8_0_ring_soft_recovery +ffffffff81e073b0 t gfx_v8_0_emit_mem_sync +ffffffff81e075c0 t gfx_v8_0_ring_emit_ib_compute +ffffffff81e078d0 t gfx_v8_0_ring_emit_fence_compute +ffffffff81e07bd0 t gfx_v8_0_emit_mem_sync_compute +ffffffff81e07e90 t gfx_v8_0_emit_wave_limit +ffffffff81e08040 t gfx_v8_0_set_eop_interrupt_state +ffffffff81e08250 t gfx_v8_0_eop_irq +ffffffff81e08380 t gfx_v8_0_set_priv_reg_fault_state +ffffffff81e08400 t gfx_v8_0_priv_reg_irq +ffffffff81e08520 t gfx_v8_0_set_priv_inst_fault_state +ffffffff81e085a0 t gfx_v8_0_priv_inst_irq +ffffffff81e086c0 t gfx_v8_0_set_cp_ecc_int_state +ffffffff81e08930 t gfx_v8_0_cp_ecc_error_irq +ffffffff81e08980 t gfx_v8_0_set_sq_int_state +ffffffff81e08a10 t gfx_v8_0_sq_irq +ffffffff81e08ab0 t gfx_v8_0_parse_sq_irq +ffffffff81e08d00 t gfx_v8_0_is_rlc_enabled +ffffffff81e08d40 t gfx_v8_0_set_safe_mode +ffffffff81e08e40 t gfx_v8_0_unset_safe_mode +ffffffff81e08ee0 t gfx_v8_0_rlc_init +ffffffff81e08f90 t gfx_v8_0_get_csb_size +ffffffff81e08ff0 t gfx_v8_0_get_csb_buffer +ffffffff81e09170 t gfx_v8_0_cp_jump_table_num +ffffffff81e091b0 t gfx_v8_0_rlc_resume +ffffffff81e09540 t gfx_v8_0_rlc_stop +ffffffff81e095b0 t gfx_v8_0_rlc_reset +ffffffff81e09630 t gfx_v8_0_rlc_start +ffffffff81e096b0 t gfx_v8_0_update_spm_vmid +ffffffff81e09720 t gfx_v8_0_init_save_restore_list +ffffffff81e09b40 t gfx_v8_0_wait_for_rlc_serdes +ffffffff81e09d60 t gfx_v8_0_sq_irq_work_func +ffffffff81e09d80 t amdgpu_bo_unreserve +ffffffff81e09e60 t gfx_v8_0_kiq_resume +ffffffff81e0a0c0 t gfx_v8_0_cp_gfx_resume +ffffffff81e0abe0 t gfx_v8_0_kcq_resume +ffffffff81e0b610 t amdgpu_bo_reserve +ffffffff81e0b790 t gfx_v8_0_mqd_commit +ffffffff81e0b970 t gfx_v8_0_mqd_init +ffffffff81e0bd90 t gfx_v8_0_deactivate_hqd +ffffffff81e0be50 t gfx_v8_0_update_medium_grain_clock_gating +ffffffff81e0c180 t gfx_v8_0_update_coarse_grain_clock_gating +ffffffff81e0d000 t gfx_v9_0_ras_error_inject +ffffffff81e0d1a0 t gfx_v9_0_query_ras_error_count +ffffffff81e0dd40 t gfx_v9_0_reset_ras_error_count +ffffffff81e0e780 T gfx_v9_0_select_se_sh +ffffffff81e0e820 t gfx_v9_0_early_init +ffffffff81e0ec80 t gfx_v9_0_late_init +ffffffff81e0f990 t gfx_v9_0_sw_init +ffffffff81e11000 t gfx_v9_0_sw_fini +ffffffff81e112b0 t gfx_v9_0_hw_init +ffffffff81e14360 t gfx_v9_0_hw_fini +ffffffff81e14ac0 t gfx_v9_0_suspend +ffffffff81e14b00 t gfx_v9_0_resume +ffffffff81e14b10 t gfx_v9_0_is_idle +ffffffff81e14b90 t gfx_v9_0_wait_for_idle +ffffffff81e14c70 t gfx_v9_0_soft_reset +ffffffff81e15000 t gfx_v9_0_set_clockgating_state +ffffffff81e150d0 t gfx_v9_0_set_powergating_state +ffffffff81e154d0 t gfx_v9_0_get_clockgating_state +ffffffff81e155e0 t gfx_v9_0_kiq_set_resources +ffffffff81e15910 t gfx_v9_0_kiq_map_queues +ffffffff81e15c50 t gfx_v9_0_kiq_unmap_queues +ffffffff81e15fd0 t gfx_v9_0_kiq_query_status +ffffffff81e162d0 t gfx_v9_0_kiq_invalidate_tlbs +ffffffff81e163f0 t gfx_v9_0_ring_get_rptr_compute +ffffffff81e16420 t gfx_v9_0_ring_get_wptr_compute +ffffffff81e16490 t gfx_v9_0_ring_set_wptr_compute +ffffffff81e164f0 t gfx_v9_0_ring_emit_fence_kiq +ffffffff81e16930 t gfx_v9_0_ring_test_ring +ffffffff81e16b60 t gfx_v9_0_ring_emit_rreg +ffffffff81e16e00 t gfx_v9_0_ring_emit_wreg +ffffffff81e17040 t gfx_v9_0_ring_emit_reg_wait +ffffffff81e17090 t gfx_v9_0_ring_emit_reg_write_reg_wait +ffffffff81e17130 t gfx_v9_0_wait_reg_mem +ffffffff81e17460 t gfx_v9_0_ring_get_rptr_gfx +ffffffff81e17490 t gfx_v9_0_ring_get_wptr_gfx +ffffffff81e175a0 t gfx_v9_0_ring_set_wptr_gfx +ffffffff81e176d0 t gfx_v9_0_ring_emit_ib_gfx +ffffffff81e17bf0 t gfx_v9_0_ring_emit_fence +ffffffff81e17fb0 t gfx_v9_0_ring_emit_pipeline_sync +ffffffff81e18010 t gfx_v9_0_ring_emit_vm_flush +ffffffff81e18120 t gfx_v9_0_ring_emit_hdp_flush +ffffffff81e181f0 t gfx_v9_0_ring_emit_gds_switch +ffffffff81e182d0 t gfx_v9_0_ring_test_ib +ffffffff81e18480 t gfx_v9_0_ring_emit_init_cond_exec +ffffffff81e186b0 t gfx_v9_0_ring_emit_patch_cond_exec +ffffffff81e18780 t gfx_v9_ring_emit_sb +ffffffff81e18870 t gfx_v9_ring_emit_cntxcntl +ffffffff81e18c70 t gfx_v9_0_ring_emit_frame_cntl +ffffffff81e18d80 t gfx_v9_0_ring_soft_recovery +ffffffff81e18df0 t gfx_v9_0_emit_mem_sync +ffffffff81e190b0 t gfx_v9_0_write_data_to_reg +ffffffff81e192c0 t gfx_v9_0_ring_emit_ib_compute +ffffffff81e195f0 t gfx_v9_0_emit_wave_limit +ffffffff81e197c0 t gfx_v9_0_set_eop_interrupt_state +ffffffff81e19990 t gfx_v9_0_eop_irq +ffffffff81e19ac0 t gfx_v9_0_set_compute_eop_interrupt_state +ffffffff81e19c70 t gfx_v9_0_set_priv_reg_fault_state +ffffffff81e19d90 t gfx_v9_0_priv_reg_irq +ffffffff81e19eb0 t gfx_v9_0_set_priv_inst_fault_state +ffffffff81e19fd0 t gfx_v9_0_priv_inst_irq +ffffffff81e1a0f0 t gfx_v9_0_set_cp_ecc_error_state +ffffffff81e1a920 t gfx_v9_0_is_rlc_enabled +ffffffff81e1a9a0 t gfx_v9_0_set_safe_mode +ffffffff81e1aaf0 t gfx_v9_0_unset_safe_mode +ffffffff81e1ab60 t gfx_v9_0_rlc_init +ffffffff81e1b370 t gfx_v9_0_get_csb_size +ffffffff81e1b3d0 t gfx_v9_0_get_csb_buffer +ffffffff81e1b520 t gfx_v9_0_cp_jump_table_num +ffffffff81e1b570 t gfx_v9_0_rlc_resume +ffffffff81e1c310 t gfx_v9_0_rlc_stop +ffffffff81e1c7b0 t gfx_v9_0_rlc_reset +ffffffff81e1c940 t gfx_v9_0_rlc_start +ffffffff81e1ca80 t gfx_v9_0_update_spm_vmid +ffffffff81e1cbb0 t gfx_v9_0_is_rlcg_access_range +ffffffff81e1cc00 t gfx_v9_0_init_always_on_cu_mask +ffffffff81e1cf60 t gfx_v9_0_init_csb +ffffffff81e1d0f0 t gfx_v9_0_enable_lbpw +ffffffff81e1d1e0 t gfx_v9_0_enable_gui_idle_interrupt +ffffffff81e1d2e0 t amdgpu_bo_unreserve +ffffffff81e1d3c0 t gfx_v9_0_get_gpu_clock_counter +ffffffff81e1db40 t gfx_v9_0_read_wave_data +ffffffff81e1dd80 t gfx_v9_0_read_wave_vgprs +ffffffff81e1dda0 t gfx_v9_0_read_wave_sgprs +ffffffff81e1ddf0 t gfx_v9_0_select_me_pipe_q +ffffffff81e1de10 t wave_read_ind +ffffffff81e1df20 t wave_read_regs +ffffffff81e1e090 t gfx_v9_0_cp_gfx_enable +ffffffff81e1e170 t amdgpu_bo_reserve +ffffffff81e1e2f0 t gfx_v9_0_kiq_init_register +ffffffff81e1ef70 t gfx_v9_0_mqd_init +ffffffff81e1f4b0 t gfx_v9_0_update_medium_grain_clock_gating +ffffffff81e1f9c0 t gfx_v9_0_update_3d_clock_gating +ffffffff81e1fda0 t gfx_v9_0_update_coarse_grain_clock_gating +ffffffff81e21000 t gfx_v9_4_ras_error_inject +ffffffff81e21130 t gfx_v9_4_query_ras_error_count +ffffffff81e21ef0 t gfx_v9_4_query_ras_error_status +ffffffff81e220c0 t gfx_v9_4_reset_ras_error_count +ffffffff81e23000 T gfx_v9_4_2_do_edc_gpr_workarounds +ffffffff81e23790 T gfx_v9_4_2_init_golden_registers +ffffffff81e23830 T gfx_v9_4_2_debug_trap_config_init +ffffffff81e238d0 T gfx_v9_4_2_set_power_brake_sequence +ffffffff81e23aa0 t gfx_v9_4_2_ras_error_inject +ffffffff81e23bd0 t gfx_v9_4_2_query_ras_error_count +ffffffff81e23c80 t gfx_v9_4_2_query_ras_error_status +ffffffff81e244d0 t gfx_v9_4_2_reset_ras_error_count +ffffffff81e24530 t gfx_v9_4_2_reset_ras_error_status +ffffffff81e249f0 t gfx_v9_4_2_enable_watchdog_timer +ffffffff81e24c10 t gfx_v9_4_2_query_uctl2_poison_status +ffffffff81e24c90 t gfx_v9_4_2_run_shader +ffffffff81e25010 t gfx_v9_4_2_wait_for_waves_assigned +ffffffff81e25650 t gfx_v9_4_2_query_sram_edc_count +ffffffff81e259a0 t gfx_v9_4_2_query_utc_edc_count +ffffffff81e25b80 t wave_read_ind +ffffffff81e26000 t gfxhub_v1_0_get_mc_fb_offset +ffffffff81e26090 t gfxhub_v1_0_setup_vm_pt_regs +ffffffff81e261d0 t gfxhub_v1_0_gart_enable +ffffffff81e276c0 t gfxhub_v1_0_gart_disable +ffffffff81e27950 t gfxhub_v1_0_set_fault_enable_default +ffffffff81e27a40 t gfxhub_v1_0_init +ffffffff81e28000 T gfxhub_v1_1_get_xgmi_info +ffffffff81e29000 t gfxhub_v2_0_get_fb_location +ffffffff81e29090 t gfxhub_v2_0_get_mc_fb_offset +ffffffff81e29120 t gfxhub_v2_0_setup_vm_pt_regs +ffffffff81e29260 t gfxhub_v2_0_gart_enable +ffffffff81e2a460 t gfxhub_v2_0_gart_disable +ffffffff81e2a6a0 t gfxhub_v2_0_set_fault_enable_default +ffffffff81e2a790 t gfxhub_v2_0_init +ffffffff81e2a860 t gfxhub_v2_0_print_l2_protection_fault_status +ffffffff81e2aa40 t gfxhub_v2_0_get_invalidate_req +ffffffff81e2b000 t gfxhub_v2_1_get_fb_location +ffffffff81e2b090 t gfxhub_v2_1_get_mc_fb_offset +ffffffff81e2b120 t gfxhub_v2_1_setup_vm_pt_regs +ffffffff81e2b260 t gfxhub_v2_1_gart_enable +ffffffff81e2c540 t gfxhub_v2_1_gart_disable +ffffffff81e2c7c0 t gfxhub_v2_1_set_fault_enable_default +ffffffff81e2c8d0 t gfxhub_v2_1_init +ffffffff81e2c9a0 t gfxhub_v2_1_get_xgmi_info +ffffffff81e2cad0 t gfxhub_v2_1_utcl2_harvest +ffffffff81e2ccb0 t gfxhub_v2_1_save_regs +ffffffff81e2d6e0 t gfxhub_v2_1_restore_regs +ffffffff81e2e2c0 t gfxhub_v2_1_halt +ffffffff81e2e680 t gfxhub_v2_1_print_l2_protection_fault_status +ffffffff81e2e860 t gfxhub_v2_1_get_invalidate_req +ffffffff81e2f000 t gfxhub_v3_0_get_fb_location +ffffffff81e2f090 t gfxhub_v3_0_get_mc_fb_offset +ffffffff81e2f120 t gfxhub_v3_0_setup_vm_pt_regs +ffffffff81e2f260 t gfxhub_v3_0_gart_enable +ffffffff81e304e0 t gfxhub_v3_0_gart_disable +ffffffff81e30760 t gfxhub_v3_0_set_fault_enable_default +ffffffff81e30b00 t gfxhub_v3_0_init +ffffffff81e30bd0 t gfxhub_v3_0_print_l2_protection_fault_status +ffffffff81e30db0 t gfxhub_v3_0_get_invalidate_req +ffffffff81e31000 t gfxhub_v3_0_3_get_fb_location +ffffffff81e31090 t gfxhub_v3_0_3_get_mc_fb_offset +ffffffff81e31120 t gfxhub_v3_0_3_setup_vm_pt_regs +ffffffff81e31260 t gfxhub_v3_0_3_gart_enable +ffffffff81e324f0 t gfxhub_v3_0_3_gart_disable +ffffffff81e32790 t gfxhub_v3_0_3_set_fault_enable_default +ffffffff81e328a0 t gfxhub_v3_0_3_init +ffffffff81e32970 t gfxhub_v3_0_3_print_l2_protection_fault_status +ffffffff81e32b50 t gfxhub_v3_0_3_get_invalidate_req +ffffffff81e33000 t gmc_v10_0_early_init +ffffffff81e331f0 t gmc_v10_0_late_init +ffffffff81e33260 t gmc_v10_0_sw_init +ffffffff81e33680 t gmc_v10_0_sw_fini +ffffffff81e336d0 t gmc_v10_0_hw_init +ffffffff81e338a0 t gmc_v10_0_hw_fini +ffffffff81e33940 t gmc_v10_0_suspend +ffffffff81e339e0 t gmc_v10_0_resume +ffffffff81e33a40 t gmc_v10_0_is_idle +ffffffff81e33a70 t gmc_v10_0_wait_for_idle +ffffffff81e33aa0 t gmc_v10_0_soft_reset +ffffffff81e33ad0 t gmc_v10_0_set_clockgating_state +ffffffff81e33b80 t gmc_v10_0_set_powergating_state +ffffffff81e33bb0 t gmc_v10_0_get_clockgating_state +ffffffff81e33c50 t gmc_v10_0_flush_gpu_tlb +ffffffff81e33f00 t gmc_v10_0_flush_gpu_tlb_pasid +ffffffff81e34120 t gmc_v10_0_emit_flush_gpu_tlb +ffffffff81e342d0 t gmc_v10_0_emit_pasid_mapping +ffffffff81e34340 t gmc_v10_0_map_mtype +ffffffff81e34390 t gmc_v10_0_get_vm_pde +ffffffff81e34480 t gmc_v10_0_get_vm_pte +ffffffff81e34530 t gmc_v10_0_get_vbios_fb_size +ffffffff81e346a0 t gmc_v10_0_flush_vm_hub +ffffffff81e34b00 t gmc_v10_0_vm_fault_interrupt_state +ffffffff81e34b70 t gmc_v10_0_process_interrupt +ffffffff81e34e30 t gmc_v10_0_ecc_interrupt_state +ffffffff81e35000 t gmc_v11_0_early_init +ffffffff81e35230 t gmc_v11_0_late_init +ffffffff81e352a0 t gmc_v11_0_sw_init +ffffffff81e355c0 t gmc_v11_0_sw_fini +ffffffff81e35610 t gmc_v11_0_hw_init +ffffffff81e35750 t gmc_v11_0_hw_fini +ffffffff81e357e0 t gmc_v11_0_suspend +ffffffff81e35870 t gmc_v11_0_resume +ffffffff81e358d0 t gmc_v11_0_is_idle +ffffffff81e35900 t gmc_v11_0_wait_for_idle +ffffffff81e35930 t gmc_v11_0_soft_reset +ffffffff81e35960 t gmc_v11_0_set_clockgating_state +ffffffff81e359e0 t gmc_v11_0_set_powergating_state +ffffffff81e35a10 t gmc_v11_0_get_clockgating_state +ffffffff81e35a50 t gmc_v11_0_flush_gpu_tlb +ffffffff81e35f20 t gmc_v11_0_flush_gpu_tlb_pasid +ffffffff81e36110 t gmc_v11_0_emit_flush_gpu_tlb +ffffffff81e362c0 t gmc_v11_0_emit_pasid_mapping +ffffffff81e36330 t gmc_v11_0_map_mtype +ffffffff81e36380 t gmc_v11_0_get_vm_pde +ffffffff81e36480 t gmc_v11_0_get_vm_pte +ffffffff81e36530 t gmc_v11_0_get_vbios_fb_size +ffffffff81e36560 t gmc_v11_0_vm_fault_interrupt_state +ffffffff81e365d0 t gmc_v11_0_process_interrupt +ffffffff81e367f0 t gmc_v11_0_ecc_interrupt_state +ffffffff81e37000 t gmc_v7_0_early_init +ffffffff81e37090 t gmc_v7_0_late_init +ffffffff81e370e0 t gmc_v7_0_sw_init +ffffffff81e375e0 t gmc_v7_0_sw_fini +ffffffff81e37690 t gmc_v7_0_hw_init +ffffffff81e38040 t gmc_v7_0_hw_fini +ffffffff81e38100 t gmc_v7_0_suspend +ffffffff81e38140 t gmc_v7_0_resume +ffffffff81e381a0 t gmc_v7_0_is_idle +ffffffff81e381f0 t gmc_v7_0_wait_for_idle +ffffffff81e38290 t gmc_v7_0_soft_reset +ffffffff81e384f0 t gmc_v7_0_set_clockgating_state +ffffffff81e38750 t gmc_v7_0_set_powergating_state +ffffffff81e38780 t gmc_v7_0_flush_gpu_tlb +ffffffff81e387b0 t gmc_v7_0_flush_gpu_tlb_pasid +ffffffff81e38870 t gmc_v7_0_emit_flush_gpu_tlb +ffffffff81e38900 t gmc_v7_0_emit_pasid_mapping +ffffffff81e38930 t gmc_v7_0_set_prt +ffffffff81e38af0 t gmc_v7_0_get_vm_pde +ffffffff81e38b50 t gmc_v7_0_get_vm_pte +ffffffff81e38b90 t gmc_v7_0_get_vbios_fb_size +ffffffff81e38c00 t gmc_v7_0_vm_fault_interrupt_state +ffffffff81e38cd0 t gmc_v7_0_process_interrupt +ffffffff81e39000 t gmc_v8_0_early_init +ffffffff81e39090 t gmc_v8_0_late_init +ffffffff81e390e0 t gmc_v8_0_sw_init +ffffffff81e39760 t gmc_v8_0_sw_fini +ffffffff81e39810 t gmc_v8_0_hw_init +ffffffff81e3a4c0 t gmc_v8_0_hw_fini +ffffffff81e3a580 t gmc_v8_0_suspend +ffffffff81e3a5c0 t gmc_v8_0_resume +ffffffff81e3a620 t gmc_v8_0_is_idle +ffffffff81e3a670 t gmc_v8_0_wait_for_idle +ffffffff81e3a710 t gmc_v8_0_check_soft_reset +ffffffff81e3a780 t gmc_v8_0_pre_soft_reset +ffffffff81e3a8f0 t gmc_v8_0_soft_reset +ffffffff81e3a9c0 t gmc_v8_0_post_soft_reset +ffffffff81e3aa30 t gmc_v8_0_set_clockgating_state +ffffffff81e3aff0 t gmc_v8_0_set_powergating_state +ffffffff81e3b020 t gmc_v8_0_get_clockgating_state +ffffffff81e3b090 t gmc_v8_0_flush_gpu_tlb +ffffffff81e3b0c0 t gmc_v8_0_flush_gpu_tlb_pasid +ffffffff81e3b180 t gmc_v8_0_emit_flush_gpu_tlb +ffffffff81e3b210 t gmc_v8_0_emit_pasid_mapping +ffffffff81e3b240 t gmc_v8_0_set_prt +ffffffff81e3b400 t gmc_v8_0_get_vm_pde +ffffffff81e3b460 t gmc_v8_0_get_vm_pte +ffffffff81e3b4b0 t gmc_v8_0_get_vbios_fb_size +ffffffff81e3b520 t gmc_v8_0_vm_fault_interrupt_state +ffffffff81e3b5f0 t gmc_v8_0_process_interrupt +ffffffff81e3c000 T gmc_v9_0_restore_registers +ffffffff81e3c150 t gmc_v9_0_early_init +ffffffff81e3c500 t gmc_v9_0_late_init +ffffffff81e3c610 t gmc_v9_0_sw_init +ffffffff81e3ccc0 t gmc_v9_0_sw_fini +ffffffff81e3cd30 t gmc_v9_0_hw_init +ffffffff81e3d130 t gmc_v9_0_hw_fini +ffffffff81e3d1f0 t gmc_v9_0_suspend +ffffffff81e3d2b0 t gmc_v9_0_resume +ffffffff81e3d310 t gmc_v9_0_is_idle +ffffffff81e3d340 t gmc_v9_0_wait_for_idle +ffffffff81e3d370 t gmc_v9_0_soft_reset +ffffffff81e3d3a0 t gmc_v9_0_set_clockgating_state +ffffffff81e3d400 t gmc_v9_0_set_powergating_state +ffffffff81e3d430 t gmc_v9_0_get_clockgating_state +ffffffff81e3d470 t gmc_v9_0_flush_gpu_tlb +ffffffff81e3dab0 t gmc_v9_0_flush_gpu_tlb_pasid +ffffffff81e3dd80 t gmc_v9_0_emit_flush_gpu_tlb +ffffffff81e3df50 t gmc_v9_0_emit_pasid_mapping +ffffffff81e3dfc0 t gmc_v9_0_map_mtype +ffffffff81e3e000 t gmc_v9_0_get_vm_pde +ffffffff81e3e100 t gmc_v9_0_get_vm_pte +ffffffff81e3e1d0 t gmc_v9_0_get_vbios_fb_size +ffffffff81e3e360 t gmc_v9_0_vm_fault_interrupt_state +ffffffff81e3e6e0 t gmc_v9_0_process_interrupt +ffffffff81e3ed20 t gmc_v9_0_ecc_interrupt_state +ffffffff81e3f000 t hdp_v4_0_query_ras_error_count +ffffffff81e3f0c0 t hdp_v4_0_reset_ras_error_count +ffffffff81e3f1e0 t hdp_v4_0_flush_hdp +ffffffff81e3f230 t hdp_v4_0_invalidate_hdp +ffffffff81e3f300 t hdp_v4_0_update_clock_gating +ffffffff81e3f400 t hdp_v4_0_get_clockgating_state +ffffffff81e3f450 t hdp_v4_0_init_registers +ffffffff81e40000 t hdp_v5_0_flush_hdp +ffffffff81e40050 t hdp_v5_0_invalidate_hdp +ffffffff81e400f0 t hdp_v5_0_update_clock_gating +ffffffff81e404e0 t hdp_v5_0_get_clockgating_state +ffffffff81e40600 t hdp_v5_0_init_registers +ffffffff81e41000 t hdp_v5_2_flush_hdp +ffffffff81e41050 t hdp_v5_2_update_clock_gating +ffffffff81e41440 t hdp_v5_2_get_clockgating_state +ffffffff81e42000 t hdp_v6_0_flush_hdp +ffffffff81e42050 t hdp_v6_0_update_clock_gating +ffffffff81e42360 t hdp_v6_0_get_clockgating_state +ffffffff81e43000 t iceland_ih_early_init +ffffffff81e43050 t iceland_ih_sw_init +ffffffff81e430b0 t iceland_ih_sw_fini +ffffffff81e430f0 t iceland_ih_hw_init +ffffffff81e43320 t iceland_ih_hw_fini +ffffffff81e433f0 t iceland_ih_suspend +ffffffff81e434c0 t iceland_ih_resume +ffffffff81e43500 t iceland_ih_is_idle +ffffffff81e43550 t iceland_ih_wait_for_idle +ffffffff81e435f0 t iceland_ih_soft_reset +ffffffff81e436d0 t iceland_ih_set_clockgating_state +ffffffff81e43700 t iceland_ih_set_powergating_state +ffffffff81e43730 t iceland_ih_get_wptr +ffffffff81e43820 t iceland_ih_decode_iv +ffffffff81e438a0 t iceland_ih_set_rptr +ffffffff81e44000 t ih_v6_0_early_init +ffffffff81e44050 t ih_v6_0_sw_init +ffffffff81e441b0 t ih_v6_0_sw_fini +ffffffff81e441f0 t ih_v6_0_hw_init +ffffffff81e447a0 t ih_v6_0_hw_fini +ffffffff81e44800 t ih_v6_0_suspend +ffffffff81e44860 t ih_v6_0_resume +ffffffff81e44870 t ih_v6_0_is_idle +ffffffff81e448a0 t ih_v6_0_wait_for_idle +ffffffff81e448d0 t ih_v6_0_soft_reset +ffffffff81e44900 t ih_v6_0_set_clockgating_state +ffffffff81e44a20 t ih_v6_0_set_powergating_state +ffffffff81e44b90 t ih_v6_0_get_clockgating_state +ffffffff81e44c20 t ih_v6_0_get_wptr +ffffffff81e44d10 t ih_v6_0_set_rptr +ffffffff81e44de0 t ih_v6_0_self_irq +ffffffff81e44e50 t ih_v6_0_toggle_interrupts +ffffffff81e45030 t force_update_wptr_for_self_int +ffffffff81e46000 t imu_v11_0_init_microcode +ffffffff81e461f0 t imu_v11_0_load_microcode +ffffffff81e46550 t imu_v11_0_setup +ffffffff81e467d0 t imu_v11_0_start +ffffffff81e468c0 t imu_v11_0_program_rlc_ram +ffffffff81e46a70 t imu_v11_0_wait_for_reset_status +ffffffff81e46bc0 t program_imu_rlc_ram +ffffffff81e47000 T imu_v11_0_3_program_rlc_ram +ffffffff81e48000 T jpeg_v1_0_early_init +ffffffff81e48060 T jpeg_v1_0_sw_init +ffffffff81e48130 T jpeg_v1_0_sw_fini +ffffffff81e48150 T jpeg_v1_0_start +ffffffff81e48bc0 t jpeg_v1_0_decode_ring_get_rptr +ffffffff81e48c50 t jpeg_v1_0_decode_ring_get_wptr +ffffffff81e48ce0 t jpeg_v1_0_decode_ring_set_wptr +ffffffff81e48d50 t jpeg_v1_0_decode_ring_emit_ib +ffffffff81e49660 t jpeg_v1_0_decode_ring_emit_fence +ffffffff81e49fc0 t jpeg_v1_0_decode_ring_emit_vm_flush +ffffffff81e4a030 t jpeg_v1_0_decode_ring_nop +ffffffff81e4a190 t jpeg_v1_0_decode_ring_insert_start +ffffffff81e4a360 t jpeg_v1_0_decode_ring_insert_end +ffffffff81e4a530 t jpeg_v1_0_ring_begin_use +ffffffff81e4a630 t jpeg_v1_0_decode_ring_emit_wreg +ffffffff81e4a890 t jpeg_v1_0_decode_ring_emit_reg_wait +ffffffff81e4acb0 t jpeg_v1_0_set_interrupt_state +ffffffff81e4ace0 t jpeg_v1_0_process_interrupt +ffffffff81e4b000 T jpeg_v2_0_dec_ring_insert_start +ffffffff81e4b1b0 T jpeg_v2_0_dec_ring_insert_end +ffffffff81e4b360 T jpeg_v2_0_dec_ring_emit_fence +ffffffff81e4ba50 T jpeg_v2_0_dec_ring_emit_ib +ffffffff81e4c240 T jpeg_v2_0_dec_ring_emit_reg_wait +ffffffff81e4c600 T jpeg_v2_0_dec_ring_emit_vm_flush +ffffffff81e4c670 T jpeg_v2_0_dec_ring_emit_wreg +ffffffff81e4c8b0 T jpeg_v2_0_dec_ring_nop +ffffffff81e4ca10 t jpeg_v2_0_early_init +ffffffff81e4ca80 t jpeg_v2_0_sw_init +ffffffff81e4cb90 t jpeg_v2_0_sw_fini +ffffffff81e4cbe0 t jpeg_v2_0_hw_init +ffffffff81e4cc60 t jpeg_v2_0_hw_fini +ffffffff81e4cd40 t jpeg_v2_0_suspend +ffffffff81e4cd70 t jpeg_v2_0_resume +ffffffff81e4ce00 t jpeg_v2_0_is_idle +ffffffff81e4ce80 t jpeg_v2_0_wait_for_idle +ffffffff81e4cf70 t jpeg_v2_0_set_clockgating_state +ffffffff81e4d020 t jpeg_v2_0_set_powergating_state +ffffffff81e4d820 t jpeg_v2_0_dec_ring_get_rptr +ffffffff81e4d8b0 t jpeg_v2_0_dec_ring_get_wptr +ffffffff81e4d950 t jpeg_v2_0_dec_ring_set_wptr +ffffffff81e4d9f0 t jpeg_v2_0_set_interrupt_state +ffffffff81e4da20 t jpeg_v2_0_process_interrupt +ffffffff81e4dab0 t jpeg_v2_0_enable_clock_gating +ffffffff81e4dc50 t jpeg_v2_0_disable_clock_gating +ffffffff81e4e000 t jpeg_v2_6_query_ras_poison_status +ffffffff81e4e140 t jpeg_v2_5_early_init +ffffffff81e4e410 t jpeg_v2_5_sw_init +ffffffff81e4e630 t jpeg_v2_5_sw_fini +ffffffff81e4e680 t jpeg_v2_5_hw_init +ffffffff81e4e770 t jpeg_v2_5_hw_fini +ffffffff81e4e8b0 t jpeg_v2_5_suspend +ffffffff81e4e8e0 t jpeg_v2_5_resume +ffffffff81e4e9e0 t jpeg_v2_5_is_idle +ffffffff81e4eae0 t jpeg_v2_5_wait_for_idle +ffffffff81e4ec10 t jpeg_v2_5_set_clockgating_state +ffffffff81e4ed80 t jpeg_v2_5_set_powergating_state +ffffffff81e4f470 t jpeg_v2_5_dec_ring_get_rptr +ffffffff81e4f510 t jpeg_v2_5_dec_ring_get_wptr +ffffffff81e4f5c0 t jpeg_v2_5_dec_ring_set_wptr +ffffffff81e4f670 t jpeg_v2_6_dec_ring_insert_start +ffffffff81e4f830 t jpeg_v2_6_dec_ring_insert_end +ffffffff81e4f9f0 t jpeg_v2_5_set_interrupt_state +ffffffff81e4fa20 t jpeg_v2_5_process_interrupt +ffffffff81e4fb00 t jpeg_v2_5_enable_clock_gating +ffffffff81e4fbd0 t jpeg_v2_5_disable_clock_gating +ffffffff81e50000 t jpeg_v3_0_early_init +ffffffff81e500e0 t jpeg_v3_0_sw_init +ffffffff81e501f0 t jpeg_v3_0_sw_fini +ffffffff81e50240 t jpeg_v3_0_hw_init +ffffffff81e502c0 t jpeg_v3_0_hw_fini +ffffffff81e503a0 t jpeg_v3_0_suspend +ffffffff81e503d0 t jpeg_v3_0_resume +ffffffff81e50460 t jpeg_v3_0_is_idle +ffffffff81e504e0 t jpeg_v3_0_wait_for_idle +ffffffff81e505d0 t jpeg_v3_0_set_clockgating_state +ffffffff81e50680 t jpeg_v3_0_set_powergating_state +ffffffff81e50f30 t jpeg_v3_0_dec_ring_get_rptr +ffffffff81e50fc0 t jpeg_v3_0_dec_ring_get_wptr +ffffffff81e51060 t jpeg_v3_0_dec_ring_set_wptr +ffffffff81e51100 t jpeg_v3_0_set_interrupt_state +ffffffff81e51130 t jpeg_v3_0_process_interrupt +ffffffff81e511c0 t jpeg_v3_0_enable_clock_gating +ffffffff81e51290 t jpeg_v3_0_disable_clock_gating +ffffffff81e52000 t jpeg_v4_0_early_init +ffffffff81e52080 t jpeg_v4_0_sw_init +ffffffff81e52190 t jpeg_v4_0_sw_fini +ffffffff81e521e0 t jpeg_v4_0_hw_init +ffffffff81e52300 t jpeg_v4_0_hw_fini +ffffffff81e523e0 t jpeg_v4_0_suspend +ffffffff81e52410 t jpeg_v4_0_resume +ffffffff81e52460 t jpeg_v4_0_is_idle +ffffffff81e524e0 t jpeg_v4_0_wait_for_idle +ffffffff81e525d0 t jpeg_v4_0_set_clockgating_state +ffffffff81e52680 t jpeg_v4_0_set_powergating_state +ffffffff81e52e90 t jpeg_v4_0_dec_ring_get_rptr +ffffffff81e52f20 t jpeg_v4_0_dec_ring_get_wptr +ffffffff81e52fc0 t jpeg_v4_0_dec_ring_set_wptr +ffffffff81e53060 t jpeg_v4_0_set_interrupt_state +ffffffff81e53090 t jpeg_v4_0_process_interrupt +ffffffff81e53130 t jpeg_v4_0_enable_clock_gating +ffffffff81e532e0 t jpeg_v4_0_disable_clock_gating +ffffffff81e54000 t lsdma_v6_0_copy_mem +ffffffff81e54360 t lsdma_v6_0_fill_mem +ffffffff81e54640 t lsdma_v6_0_update_memory_power_gating +ffffffff81e55000 t mca_v3_0_mp0_query_ras_error_count +ffffffff81e55020 t mca_v3_0_ras_block_match +ffffffff81e55070 t mca_v3_0_mp1_query_ras_error_count +ffffffff81e55090 t mca_v3_0_mpio_query_ras_error_count +ffffffff81e550b0 t mca_v3_0_init +ffffffff81e56000 t mes_v10_0_late_init +ffffffff81e56050 t mes_v10_1_sw_init +ffffffff81e56660 t mes_v10_1_sw_fini +ffffffff81e567e0 t mes_v10_1_hw_init +ffffffff81e57080 t mes_v10_1_hw_fini +ffffffff81e57140 t mes_v10_1_suspend +ffffffff81e57220 t mes_v10_1_resume +ffffffff81e57270 t mes_v10_1_kiq_hw_init +ffffffff81e57680 t mes_v10_1_add_hw_queue +ffffffff81e57800 t mes_v10_1_remove_hw_queue +ffffffff81e57890 t mes_v10_1_unmap_legacy_queue +ffffffff81e57980 t mes_v10_1_suspend_gang +ffffffff81e579b0 t mes_v10_1_resume_gang +ffffffff81e579e0 t mes_v10_1_submit_pkt_and_poll_completion +ffffffff81e57be0 t mes_v10_1_load_microcode +ffffffff81e583d0 t mes_v10_1_enable +ffffffff81e58840 t mes_v10_1_queue_init +ffffffff81e58ae0 t amdgpu_bo_unreserve +ffffffff81e58bc0 t mes_v10_1_ring_get_rptr +ffffffff81e58bf0 t mes_v10_1_ring_get_wptr +ffffffff81e58c60 t mes_v10_1_ring_set_wptr +ffffffff81e59000 t mes_v11_0_late_init +ffffffff81e59070 t mes_v11_0_sw_init +ffffffff81e59650 t mes_v11_0_sw_fini +ffffffff81e59840 t mes_v11_0_hw_init +ffffffff81e5a050 t mes_v11_0_hw_fini +ffffffff81e5a080 t mes_v11_0_suspend +ffffffff81e5a090 t mes_v11_0_resume +ffffffff81e5a0e0 t mes_v11_0_kiq_hw_init +ffffffff81e5a2e0 t mes_v11_0_kiq_hw_fini +ffffffff81e5a720 t mes_v11_0_add_hw_queue +ffffffff81e5a920 t mes_v11_0_remove_hw_queue +ffffffff81e5a9b0 t mes_v11_0_unmap_legacy_queue +ffffffff81e5aab0 t mes_v11_0_suspend_gang +ffffffff81e5aae0 t mes_v11_0_resume_gang +ffffffff81e5ab10 t mes_v11_0_misc_op +ffffffff81e5ac80 t mes_v11_0_submit_pkt_and_poll_completion +ffffffff81e5aea0 t mes_v11_0_load_microcode +ffffffff81e5b600 t mes_v11_0_enable +ffffffff81e5baf0 t mes_v11_0_queue_init +ffffffff81e5c580 t amdgpu_bo_unreserve +ffffffff81e5c660 t mes_v11_0_mqd_init +ffffffff81e5c860 t mes_v11_0_ring_get_rptr +ffffffff81e5c890 t mes_v11_0_ring_get_wptr +ffffffff81e5c900 t mes_v11_0_ring_set_wptr +ffffffff81e5d000 t mmhub_v1_0_query_ras_error_count +ffffffff81e5d150 t mmhub_v1_0_reset_ras_error_count +ffffffff81e5d200 t mmhub_v1_0_get_fb_location +ffffffff81e5d310 t mmhub_v1_0_init +ffffffff81e5d3c0 t mmhub_v1_0_gart_enable +ffffffff81e5e6f0 t mmhub_v1_0_set_fault_enable_default +ffffffff81e5e800 t mmhub_v1_0_gart_disable +ffffffff81e5ea90 t mmhub_v1_0_set_clockgating +ffffffff81e5ef10 t mmhub_v1_0_get_clockgating +ffffffff81e5f030 t mmhub_v1_0_setup_vm_pt_regs +ffffffff81e5f170 t mmhub_v1_0_update_power_gating +ffffffff81e60000 t mmhub_v1_7_query_ras_error_count +ffffffff81e60150 t mmhub_v1_7_query_ras_error_status +ffffffff81e60230 t mmhub_v1_7_reset_ras_error_count +ffffffff81e602d0 t mmhub_v1_7_reset_ras_error_status +ffffffff81e603c0 t mmhub_v1_7_get_fb_location +ffffffff81e604d0 t mmhub_v1_7_init +ffffffff81e60570 t mmhub_v1_7_gart_enable +ffffffff81e61a50 t mmhub_v1_7_set_fault_enable_default +ffffffff81e61b60 t mmhub_v1_7_gart_disable +ffffffff81e61df0 t mmhub_v1_7_set_clockgating +ffffffff81e62170 t mmhub_v1_7_get_clockgating +ffffffff81e62290 t mmhub_v1_7_setup_vm_pt_regs +ffffffff81e63000 t mmhub_v2_0_init +ffffffff81e630d0 t mmhub_v2_0_gart_enable +ffffffff81e64250 t mmhub_v2_0_set_fault_enable_default +ffffffff81e64360 t mmhub_v2_0_gart_disable +ffffffff81e645e0 t mmhub_v2_0_set_clockgating +ffffffff81e64920 t mmhub_v2_0_get_clockgating +ffffffff81e64ab0 t mmhub_v2_0_setup_vm_pt_regs +ffffffff81e64bf0 t mmhub_v2_0_print_l2_protection_fault_status +ffffffff81e64e50 t mmhub_v2_0_get_invalidate_req +ffffffff81e65000 t mmhub_v2_3_init +ffffffff81e650e0 t mmhub_v2_3_gart_enable +ffffffff81e66470 t mmhub_v2_3_set_fault_enable_default +ffffffff81e66570 t mmhub_v2_3_gart_disable +ffffffff81e66800 t mmhub_v2_3_set_clockgating +ffffffff81e66c80 t mmhub_v2_3_get_clockgating +ffffffff81e66e70 t mmhub_v2_3_setup_vm_pt_regs +ffffffff81e66fb0 t mmhub_v2_3_print_l2_protection_fault_status +ffffffff81e671d0 t mmhub_v2_3_get_invalidate_req +ffffffff81e68000 t mmhub_v3_0_get_fb_location +ffffffff81e68090 t mmhub_v3_0_get_mc_fb_offset +ffffffff81e68120 t mmhub_v3_0_init +ffffffff81e681f0 t mmhub_v3_0_gart_enable +ffffffff81e69380 t mmhub_v3_0_set_fault_enable_default +ffffffff81e69490 t mmhub_v3_0_gart_disable +ffffffff81e69710 t mmhub_v3_0_set_clockgating +ffffffff81e698e0 t mmhub_v3_0_get_clockgating +ffffffff81e69990 t mmhub_v3_0_setup_vm_pt_regs +ffffffff81e69ad0 t mmhub_v3_0_print_l2_protection_fault_status +ffffffff81e69cf0 t mmhub_v3_0_get_invalidate_req +ffffffff81e6a000 t mmhub_v3_0_1_get_fb_location +ffffffff81e6a090 t mmhub_v3_0_1_get_mc_fb_offset +ffffffff81e6a120 t mmhub_v3_0_1_init +ffffffff81e6a1f0 t mmhub_v3_0_1_gart_enable +ffffffff81e6b470 t mmhub_v3_0_1_set_fault_enable_default +ffffffff81e6b570 t mmhub_v3_0_1_gart_disable +ffffffff81e6b800 t mmhub_v3_0_1_set_clockgating +ffffffff81e6b9c0 t mmhub_v3_0_1_get_clockgating +ffffffff81e6ba70 t mmhub_v3_0_1_setup_vm_pt_regs +ffffffff81e6bbb0 t mmhub_v3_0_1_print_l2_protection_fault_status +ffffffff81e6bdc0 t mmhub_v3_0_1_get_invalidate_req +ffffffff81e6c000 t mmhub_v3_0_2_get_fb_location +ffffffff81e6c090 t mmhub_v3_0_2_get_mc_fb_offset +ffffffff81e6c120 t mmhub_v3_0_2_init +ffffffff81e6c1f0 t mmhub_v3_0_2_gart_enable +ffffffff81e6d370 t mmhub_v3_0_2_set_fault_enable_default +ffffffff81e6d480 t mmhub_v3_0_2_gart_disable +ffffffff81e6d700 t mmhub_v3_0_2_set_clockgating +ffffffff81e6d730 t mmhub_v3_0_2_get_clockgating +ffffffff81e6d760 t mmhub_v3_0_2_setup_vm_pt_regs +ffffffff81e6d8a0 t mmhub_v3_0_2_print_l2_protection_fault_status +ffffffff81e6daa0 t mmhub_v3_0_2_get_invalidate_req +ffffffff81e6e000 t mmhub_v9_4_query_ras_error_count +ffffffff81e6e150 t mmhub_v9_4_query_ras_error_status +ffffffff81e6e230 t mmhub_v9_4_reset_ras_error_count +ffffffff81e6e300 t mmhub_v9_4_get_fb_location +ffffffff81e6e410 t mmhub_v9_4_init +ffffffff81e6e560 t mmhub_v9_4_gart_enable +ffffffff81e6f9f0 t mmhub_v9_4_set_fault_enable_default +ffffffff81e6fbd0 t mmhub_v9_4_gart_disable +ffffffff81e6ff30 t mmhub_v9_4_set_clockgating +ffffffff81e703f0 t mmhub_v9_4_get_clockgating +ffffffff81e70520 t mmhub_v9_4_setup_vm_pt_regs +ffffffff81e70570 t mmhub_v9_4_setup_hubid_vm_pt_regs +ffffffff81e71000 T xgpu_ai_mailbox_set_irq_funcs +ffffffff81e71050 T xgpu_ai_mailbox_add_irq_id +ffffffff81e710e0 T xgpu_ai_mailbox_get_irq +ffffffff81e71190 t xgpu_ai_mailbox_flr_work +ffffffff81e713a0 T xgpu_ai_mailbox_put_irq +ffffffff81e713e0 t xgpu_ai_request_full_gpu_access +ffffffff81e71400 t xgpu_ai_release_full_gpu_access +ffffffff81e71420 t xgpu_ai_request_init_data +ffffffff81e71480 t xgpu_ai_request_reset +ffffffff81e71530 t xgpu_ai_mailbox_trans_msg +ffffffff81e71760 t xgpu_ai_set_mailbox_ack_irq +ffffffff81e717f0 t xgpu_ai_mailbox_ack_irq +ffffffff81e71840 t xgpu_ai_set_mailbox_rcv_irq +ffffffff81e718d0 t xgpu_ai_mailbox_rcv_irq +ffffffff81e719b0 t xgpu_ai_send_access_requests +ffffffff81e71aa0 t xgpu_ai_poll_msg +ffffffff81e72000 T xgpu_nv_mailbox_set_irq_funcs +ffffffff81e72050 T xgpu_nv_mailbox_add_irq_id +ffffffff81e720e0 T xgpu_nv_mailbox_get_irq +ffffffff81e72190 t xgpu_nv_mailbox_flr_work +ffffffff81e723b0 T xgpu_nv_mailbox_put_irq +ffffffff81e723f0 t xgpu_nv_request_full_gpu_access +ffffffff81e72410 t xgpu_nv_release_full_gpu_access +ffffffff81e72430 t xgpu_nv_request_init_data +ffffffff81e72450 t xgpu_nv_request_reset +ffffffff81e72550 t xgpu_nv_mailbox_trans_msg +ffffffff81e726f0 t xgpu_nv_set_mailbox_ack_irq +ffffffff81e72770 t xgpu_nv_mailbox_ack_irq +ffffffff81e727c0 t xgpu_nv_set_mailbox_rcv_irq +ffffffff81e72840 t xgpu_nv_mailbox_rcv_irq +ffffffff81e728f0 t xgpu_nv_send_access_requests +ffffffff81e73000 T xgpu_vi_init_golden_registers +ffffffff81e730c0 T xgpu_vi_mailbox_set_irq_funcs +ffffffff81e73110 T xgpu_vi_mailbox_add_irq_id +ffffffff81e731a0 T xgpu_vi_mailbox_get_irq +ffffffff81e73250 t xgpu_vi_mailbox_flr_work +ffffffff81e733a0 T xgpu_vi_mailbox_put_irq +ffffffff81e733e0 t xgpu_vi_request_full_gpu_access +ffffffff81e73400 t xgpu_vi_release_full_gpu_access +ffffffff81e73420 t xgpu_vi_request_reset +ffffffff81e73440 t xgpu_vi_wait_reset_cmpl +ffffffff81e73520 t xgpu_vi_set_mailbox_ack_irq +ffffffff81e735a0 t xgpu_vi_mailbox_ack_irq +ffffffff81e735f0 t xgpu_vi_set_mailbox_rcv_irq +ffffffff81e73670 t xgpu_vi_mailbox_rcv_irq +ffffffff81e73720 t xgpu_vi_mailbox_rcv_msg +ffffffff81e73840 t xgpu_vi_send_access_requests +ffffffff81e74000 t navi10_ih_early_init +ffffffff81e74060 t navi10_ih_sw_init +ffffffff81e741d0 t navi10_ih_sw_fini +ffffffff81e74210 t navi10_ih_hw_init +ffffffff81e74640 t navi10_ih_hw_fini +ffffffff81e746a0 t navi10_ih_suspend +ffffffff81e74700 t navi10_ih_resume +ffffffff81e74710 t navi10_ih_is_idle +ffffffff81e74740 t navi10_ih_wait_for_idle +ffffffff81e74770 t navi10_ih_soft_reset +ffffffff81e747a0 t navi10_ih_set_clockgating_state +ffffffff81e748c0 t navi10_ih_set_powergating_state +ffffffff81e748f0 t navi10_ih_get_clockgating_state +ffffffff81e74980 t navi10_ih_get_wptr +ffffffff81e74a90 t navi10_ih_set_rptr +ffffffff81e74b60 t navi10_ih_self_irq +ffffffff81e74be0 t navi10_ih_toggle_interrupts +ffffffff81e74d70 t force_update_wptr_for_self_int +ffffffff81e76000 t nbio_v2_3_get_hdp_flush_req_offset +ffffffff81e76040 t nbio_v2_3_get_hdp_flush_done_offset +ffffffff81e76080 t nbio_v2_3_get_pcie_index_offset +ffffffff81e760c0 t nbio_v2_3_get_pcie_data_offset +ffffffff81e76100 t nbio_v2_3_get_rev_id +ffffffff81e76160 t nbio_v2_3_mc_access_enable +ffffffff81e76210 t nbio_v2_3_get_memsize +ffffffff81e76280 t nbio_v2_3_sdma_doorbell_range +ffffffff81e76320 t nbio_v2_3_vcn_doorbell_range +ffffffff81e763a0 t nbio_v2_3_enable_doorbell_aperture +ffffffff81e76490 t nbio_v2_3_enable_doorbell_selfring_aperture +ffffffff81e765f0 t nbio_v2_3_ih_doorbell_range +ffffffff81e76700 t nbio_v2_3_update_medium_grain_clock_gating +ffffffff81e767a0 t nbio_v2_3_update_medium_grain_light_sleep +ffffffff81e76840 t nbio_v2_3_get_clockgating_state +ffffffff81e768c0 t nbio_v2_3_ih_control +ffffffff81e76a10 t nbio_v2_3_init_registers +ffffffff81e76aa0 t nbio_v2_3_remap_hdp_registers +ffffffff81e76bb0 t nbio_v2_3_enable_aspm +ffffffff81e76c50 t nbio_v2_3_program_aspm +ffffffff81e772e0 t nbio_v2_3_apply_lc_spc_mode_wa +ffffffff81e77370 t nbio_v2_3_apply_l1_link_width_reconfig_wa +ffffffff81e773e0 t nbio_v2_3_clear_doorbell_interrupt +ffffffff81e78000 t nbio_v4_3_get_hdp_flush_req_offset +ffffffff81e78040 t nbio_v4_3_get_hdp_flush_done_offset +ffffffff81e78080 t nbio_v4_3_get_pcie_index_offset +ffffffff81e780b0 t nbio_v4_3_get_pcie_data_offset +ffffffff81e780f0 t nbio_v4_3_get_rev_id +ffffffff81e78170 t nbio_v4_3_mc_access_enable +ffffffff81e78220 t nbio_v4_3_get_memsize +ffffffff81e78290 t nbio_v4_3_sdma_doorbell_range +ffffffff81e78400 t nbio_v4_3_vcn_doorbell_range +ffffffff81e785b0 t nbio_v4_3_gc_doorbell_init +ffffffff81e786a0 t nbio_v4_3_enable_doorbell_aperture +ffffffff81e78790 t nbio_v4_3_enable_doorbell_selfring_aperture +ffffffff81e788f0 t nbio_v4_3_ih_doorbell_range +ffffffff81e78a10 t nbio_v4_3_update_medium_grain_clock_gating +ffffffff81e78b50 t nbio_v4_3_update_medium_grain_light_sleep +ffffffff81e78c80 t nbio_v4_3_get_clockgating_state +ffffffff81e78d90 t nbio_v4_3_ih_control +ffffffff81e78ee0 t nbio_v4_3_init_registers +ffffffff81e78ff0 t nbio_v4_3_remap_hdp_registers +ffffffff81e79100 t nbio_v4_3_program_aspm +ffffffff81e79da0 t nbio_v4_3_get_rom_offset +ffffffff81e79e30 t nbio_v4_3_sriov_sdma_doorbell_range +ffffffff81e79e60 t nbio_v4_3_sriov_vcn_doorbell_range +ffffffff81e79e90 t nbio_v4_3_sriov_gc_doorbell_init +ffffffff81e79ec0 t nbio_v4_3_sriov_ih_doorbell_range +ffffffff81e7a000 t nbio_v6_1_get_hdp_flush_req_offset +ffffffff81e7a040 t nbio_v6_1_get_hdp_flush_done_offset +ffffffff81e7a080 t nbio_v6_1_get_pcie_index_offset +ffffffff81e7a0c0 t nbio_v6_1_get_pcie_data_offset +ffffffff81e7a100 t nbio_v6_1_get_rev_id +ffffffff81e7a180 t nbio_v6_1_mc_access_enable +ffffffff81e7a230 t nbio_v6_1_get_memsize +ffffffff81e7a2a0 t nbio_v6_1_sdma_doorbell_range +ffffffff81e7a330 t nbio_v6_1_enable_doorbell_aperture +ffffffff81e7a420 t nbio_v6_1_enable_doorbell_selfring_aperture +ffffffff81e7a580 t nbio_v6_1_ih_doorbell_range +ffffffff81e7a690 t nbio_v6_1_update_medium_grain_clock_gating +ffffffff81e7a730 t nbio_v6_1_update_medium_grain_light_sleep +ffffffff81e7a7d0 t nbio_v6_1_get_clockgating_state +ffffffff81e7a850 t nbio_v6_1_ih_control +ffffffff81e7a9a0 t nbio_v6_1_init_registers +ffffffff81e7aa70 t nbio_v6_1_remap_hdp_registers +ffffffff81e7ab80 t nbio_v6_1_program_aspm +ffffffff81e7b000 t nbio_v7_0_get_hdp_flush_req_offset +ffffffff81e7b040 t nbio_v7_0_get_hdp_flush_done_offset +ffffffff81e7b080 t nbio_v7_0_get_pcie_index_offset +ffffffff81e7b0c0 t nbio_v7_0_get_pcie_data_offset +ffffffff81e7b100 t nbio_v7_0_get_rev_id +ffffffff81e7b180 t nbio_v7_0_mc_access_enable +ffffffff81e7b230 t nbio_v7_0_get_memsize +ffffffff81e7b2a0 t nbio_v7_0_sdma_doorbell_range +ffffffff81e7b330 t nbio_v7_0_vcn_doorbell_range +ffffffff81e7b3b0 t nbio_v7_0_enable_doorbell_aperture +ffffffff81e7b4a0 t nbio_v7_0_enable_doorbell_selfring_aperture +ffffffff81e7b4d0 t nbio_v7_0_ih_doorbell_range +ffffffff81e7b5e0 t nbio_v7_0_update_medium_grain_clock_gating +ffffffff81e7b710 t nbio_v7_0_update_medium_grain_light_sleep +ffffffff81e7b7b0 t nbio_v7_0_get_clockgating_state +ffffffff81e7b830 t nbio_v7_0_ih_control +ffffffff81e7b980 t nbio_v7_0_init_registers +ffffffff81e7b9d0 t nbio_v7_0_remap_hdp_registers +ffffffff81e7bae0 t nbio_7_0_read_syshub_ind_mmr +ffffffff81e7bbb0 t nbio_7_0_write_syshub_ind_mmr +ffffffff81e7c000 t nbio_v7_2_get_hdp_flush_req_offset +ffffffff81e7c040 t nbio_v7_2_get_hdp_flush_done_offset +ffffffff81e7c080 t nbio_v7_2_get_pcie_index_offset +ffffffff81e7c0c0 t nbio_v7_2_get_pcie_data_offset +ffffffff81e7c100 t nbio_v7_2_get_pcie_port_index_offset +ffffffff81e7c130 t nbio_v7_2_get_pcie_port_data_offset +ffffffff81e7c170 t nbio_v7_2_get_rev_id +ffffffff81e7c250 t nbio_v7_2_mc_access_enable +ffffffff81e7c390 t nbio_v7_2_get_memsize +ffffffff81e7c400 t nbio_v7_2_sdma_doorbell_range +ffffffff81e7c4a0 t nbio_v7_2_vcn_doorbell_range +ffffffff81e7c520 t nbio_v7_2_enable_doorbell_aperture +ffffffff81e7c600 t nbio_v7_2_enable_doorbell_selfring_aperture +ffffffff81e7c760 t nbio_v7_2_ih_doorbell_range +ffffffff81e7c7f0 t nbio_v7_2_update_medium_grain_clock_gating +ffffffff81e7c8b0 t nbio_v7_2_update_medium_grain_light_sleep +ffffffff81e7ca40 t nbio_v7_2_get_clockgating_state +ffffffff81e7cad0 t nbio_v7_2_ih_control +ffffffff81e7cc20 t nbio_v7_2_init_registers +ffffffff81e7cde0 t nbio_v7_2_remap_hdp_registers +ffffffff81e7d000 t nbio_v7_4_query_ras_error_count +ffffffff81e7d1a0 t nbio_v7_4_handle_ras_controller_intr_no_bifring +ffffffff81e7d3e0 t nbio_v7_4_handle_ras_err_event_athub_intr_no_bifring +ffffffff81e7d590 t nbio_v7_4_init_ras_controller_interrupt +ffffffff81e7d5d0 t nbio_v7_4_init_ras_err_event_athub_interrupt +ffffffff81e7d610 t nbio_v7_4_get_hdp_flush_req_offset +ffffffff81e7d650 t nbio_v7_4_get_hdp_flush_done_offset +ffffffff81e7d690 t nbio_v7_4_get_pcie_index_offset +ffffffff81e7d6d0 t nbio_v7_4_get_pcie_data_offset +ffffffff81e7d710 t nbio_v7_4_get_rev_id +ffffffff81e7d7d0 t nbio_v7_4_mc_access_enable +ffffffff81e7d880 t nbio_v7_4_get_memsize +ffffffff81e7d8f0 t nbio_v7_4_sdma_doorbell_range +ffffffff81e7d9c0 t nbio_v7_4_vcn_doorbell_range +ffffffff81e7da60 t nbio_v7_4_enable_doorbell_aperture +ffffffff81e7db50 t nbio_v7_4_enable_doorbell_selfring_aperture +ffffffff81e7dcb0 t nbio_v7_4_ih_doorbell_range +ffffffff81e7ddc0 t nbio_v7_4_enable_doorbell_interrupt +ffffffff81e7df00 t nbio_v7_4_update_medium_grain_clock_gating +ffffffff81e7df30 t nbio_v7_4_update_medium_grain_light_sleep +ffffffff81e7dfd0 t nbio_v7_4_get_clockgating_state +ffffffff81e7e050 t nbio_v7_4_ih_control +ffffffff81e7e1a0 t nbio_v7_4_init_registers +ffffffff81e7e290 t nbio_v7_4_remap_hdp_registers +ffffffff81e7e3a0 t nbio_v7_4_program_aspm +ffffffff81e7e7b0 t nbio_v7_4_set_ras_controller_irq_state +ffffffff81e7e940 t nbio_v7_4_process_ras_controller_irq +ffffffff81e7e970 t nbio_v7_4_set_ras_err_event_athub_irq_state +ffffffff81e7eb00 t nbio_v7_4_process_err_event_athub_irq +ffffffff81e7f000 t nbio_v7_7_get_hdp_flush_req_offset +ffffffff81e7f040 t nbio_v7_7_get_hdp_flush_done_offset +ffffffff81e7f080 t nbio_v7_7_get_pcie_index_offset +ffffffff81e7f0c0 t nbio_v7_7_get_pcie_data_offset +ffffffff81e7f100 t nbio_v7_7_get_pcie_port_index_offset +ffffffff81e7f130 t nbio_v7_7_get_pcie_port_data_offset +ffffffff81e7f170 t nbio_v7_7_get_rev_id +ffffffff81e7f1f0 t nbio_v7_7_mc_access_enable +ffffffff81e7f2a0 t nbio_v7_7_get_memsize +ffffffff81e7f310 t nbio_v7_7_sdma_doorbell_range +ffffffff81e7f3a0 t nbio_v7_7_vcn_doorbell_range +ffffffff81e7f420 t nbio_v7_7_enable_doorbell_aperture +ffffffff81e7f500 t nbio_v7_7_enable_doorbell_selfring_aperture +ffffffff81e7f660 t nbio_v7_7_ih_doorbell_range +ffffffff81e7f770 t nbio_v7_7_update_medium_grain_clock_gating +ffffffff81e7f8b0 t nbio_v7_7_update_medium_grain_light_sleep +ffffffff81e7fac0 t nbio_v7_7_get_clockgating_state +ffffffff81e7fbd0 t nbio_v7_7_ih_control +ffffffff81e7fd20 t nbio_v7_7_init_registers +ffffffff81e7fe20 t nbio_v7_7_remap_hdp_registers +ffffffff81e80000 T nv_grbm_select +ffffffff81e800a0 T nv_set_virt_ops +ffffffff81e800e0 t nv_common_early_init +ffffffff81e804d0 t nv_common_late_init +ffffffff81e80540 t nv_common_sw_init +ffffffff81e80580 t nv_common_sw_fini +ffffffff81e805b0 t nv_common_hw_init +ffffffff81e806c0 t nv_common_hw_fini +ffffffff81e80720 t nv_common_suspend +ffffffff81e80780 t nv_common_resume +ffffffff81e807c0 t nv_common_is_idle +ffffffff81e807f0 t nv_common_wait_for_idle +ffffffff81e80820 t nv_common_soft_reset +ffffffff81e80850 t nv_common_set_clockgating_state +ffffffff81e80920 t nv_common_set_powergating_state +ffffffff81e80950 t nv_common_get_clockgating_state +ffffffff81e809c0 t nv_pcie_rreg +ffffffff81e80a20 t nv_pcie_wreg +ffffffff81e80a80 t nv_pcie_rreg64 +ffffffff81e80ae0 t nv_pcie_wreg64 +ffffffff81e80b40 t nv_didt_rreg +ffffffff81e80be0 t nv_didt_wreg +ffffffff81e80c60 t nv_read_disabled_bios +ffffffff81e80c90 t nv_read_register +ffffffff81e80d70 t nv_vga_set_state +ffffffff81e80da0 t nv_asic_reset +ffffffff81e80ee0 t nv_asic_reset_method +ffffffff81e80fd0 t nv_get_xclk +ffffffff81e81000 t nv_set_uvd_clocks +ffffffff81e81030 t nv_set_vce_clocks +ffffffff81e81060 t nv_get_config_memsize +ffffffff81e81080 t nv_need_full_reset +ffffffff81e810b0 t nv_init_doorbell_index +ffffffff81e811e0 t nv_need_reset_on_init +ffffffff81e81270 t nv_get_pcie_replay_count +ffffffff81e812a0 t nv_pre_asic_init +ffffffff81e812d0 t nv_update_umd_stable_pstate +ffffffff81e81390 t nv_query_video_codecs +ffffffff81e82000 T psp_v10_0_set_psp_funcs +ffffffff81e82030 t psp_v10_0_init_microcode +ffffffff81e822a0 t psp_v10_0_ring_init +ffffffff81e82320 t psp_v10_0_ring_create +ffffffff81e82630 t psp_v10_0_ring_stop +ffffffff81e82820 t psp_v10_0_ring_destroy +ffffffff81e828a0 t psp_v10_0_mode1_reset +ffffffff81e828f0 t psp_v10_0_ring_get_wptr +ffffffff81e82950 t psp_v10_0_ring_set_wptr +ffffffff81e83000 T psp_v11_0_set_psp_funcs +ffffffff81e83030 t psp_v11_0_init_microcode +ffffffff81e83450 t psp_v11_0_bootloader_load_kdb +ffffffff81e83470 t psp_v11_0_bootloader_load_spl +ffffffff81e83490 t psp_v11_0_bootloader_load_sysdrv +ffffffff81e834b0 t psp_v11_0_bootloader_load_sos +ffffffff81e83800 t psp_v11_0_ring_init +ffffffff81e83880 t psp_v11_0_ring_create +ffffffff81e83f10 t psp_v11_0_ring_stop +ffffffff81e84130 t psp_v11_0_ring_destroy +ffffffff81e841b0 t psp_v11_0_mode1_reset +ffffffff81e842b0 t psp_v11_0_memory_training +ffffffff81e84730 t psp_v11_0_ring_get_wptr +ffffffff81e84780 t psp_v11_0_ring_set_wptr +ffffffff81e848c0 t psp_v11_0_load_usbc_pd_fw +ffffffff81e84ab0 t psp_v11_0_read_usbc_pd_fw +ffffffff81e84bd0 t psp_v11_0_bootloader_load_component +ffffffff81e84d90 t psp_v11_0_wait_for_bootloader +ffffffff81e84f60 t psp_v11_0_memory_training_send_msg +ffffffff81e86000 T psp_v11_0_8_set_psp_funcs +ffffffff81e86030 t psp_v11_0_8_ring_init +ffffffff81e860b0 t psp_v11_0_8_ring_create +ffffffff81e86740 t psp_v11_0_8_ring_stop +ffffffff81e86ad0 t psp_v11_0_8_ring_destroy +ffffffff81e86b50 t psp_v11_0_8_ring_get_wptr +ffffffff81e86bc0 t psp_v11_0_8_ring_set_wptr +ffffffff81e87000 T psp_v12_0_set_psp_funcs +ffffffff81e87030 t psp_v12_0_init_microcode +ffffffff81e872a0 t psp_v12_0_bootloader_load_sysdrv +ffffffff81e875c0 t psp_v12_0_bootloader_load_sos +ffffffff81e87920 t psp_v12_0_ring_init +ffffffff81e87f00 t psp_v12_0_ring_create +ffffffff81e88460 t psp_v12_0_ring_stop +ffffffff81e88680 t psp_v12_0_ring_destroy +ffffffff81e88700 t psp_v12_0_mode1_reset +ffffffff81e88800 t psp_v12_0_ring_get_wptr +ffffffff81e88870 t psp_v12_0_ring_set_wptr +ffffffff81e89000 T psp_v13_0_set_psp_funcs +ffffffff81e89030 t psp_v13_0_init_microcode +ffffffff81e89160 t psp_v13_0_bootloader_load_kdb +ffffffff81e89180 t psp_v13_0_bootloader_load_spl +ffffffff81e891a0 t psp_v13_0_bootloader_load_sysdrv +ffffffff81e891c0 t psp_v13_0_bootloader_load_soc_drv +ffffffff81e891e0 t psp_v13_0_bootloader_load_intf_drv +ffffffff81e89200 t psp_v13_0_bootloader_load_dbg_drv +ffffffff81e89220 t psp_v13_0_bootloader_load_ras_drv +ffffffff81e89240 t psp_v13_0_bootloader_load_sos +ffffffff81e895a0 t psp_v13_0_ring_init +ffffffff81e89620 t psp_v13_0_ring_create +ffffffff81e89cb0 t psp_v13_0_ring_stop +ffffffff81e8a040 t psp_v13_0_ring_destroy +ffffffff81e8a0c0 t psp_v13_0_memory_training +ffffffff81e8a500 t psp_v13_0_ring_get_wptr +ffffffff81e8a570 t psp_v13_0_ring_set_wptr +ffffffff81e8a670 t psp_v13_0_load_usbc_pd_fw +ffffffff81e8a860 t psp_v13_0_read_usbc_pd_fw +ffffffff81e8a980 t psp_v13_0_update_spirom +ffffffff81e8ab60 t psp_v13_0_vbflash_status +ffffffff81e8abc0 t psp_v13_0_bootloader_load_component +ffffffff81e8ad90 t psp_v13_0_wait_for_bootloader +ffffffff81e8af60 t psp_v13_0_memory_training_send_msg +ffffffff81e8b0c0 t psp_v13_0_exec_spi_cmd +ffffffff81e8c000 T psp_v13_0_4_set_psp_funcs +ffffffff81e8c030 t psp_v13_0_4_init_microcode +ffffffff81e8c100 t psp_v13_0_4_bootloader_load_kdb +ffffffff81e8c120 t psp_v13_0_4_bootloader_load_spl +ffffffff81e8c140 t psp_v13_0_4_bootloader_load_sysdrv +ffffffff81e8c160 t psp_v13_0_4_bootloader_load_soc_drv +ffffffff81e8c180 t psp_v13_0_4_bootloader_load_intf_drv +ffffffff81e8c1a0 t psp_v13_0_4_bootloader_load_dbg_drv +ffffffff81e8c1c0 t psp_v13_0_4_bootloader_load_sos +ffffffff81e8c530 t psp_v13_0_4_ring_init +ffffffff81e8c5b0 t psp_v13_0_4_ring_create +ffffffff81e8cc50 t psp_v13_0_4_ring_stop +ffffffff81e8cfe0 t psp_v13_0_4_ring_destroy +ffffffff81e8d060 t psp_v13_0_4_ring_get_wptr +ffffffff81e8d0d0 t psp_v13_0_4_ring_set_wptr +ffffffff81e8d1d0 t psp_v13_0_4_bootloader_load_component +ffffffff81e8d3a0 t psp_v13_0_4_wait_for_bootloader +ffffffff81e8e000 T psp_v3_1_set_psp_funcs +ffffffff81e8e030 t psp_v3_1_init_microcode +ffffffff81e8e0f0 t psp_v3_1_bootloader_load_sysdrv +ffffffff81e8e410 t psp_v3_1_bootloader_load_sos +ffffffff81e8e770 t psp_v3_1_ring_init +ffffffff81e8e7f0 t psp_v3_1_ring_create +ffffffff81e8f2f0 t psp_v3_1_ring_stop +ffffffff81e8f510 t psp_v3_1_ring_destroy +ffffffff81e8f590 t psp_v3_1_smu_reload_quirk +ffffffff81e8f5e0 t psp_v3_1_mode1_reset +ffffffff81e8f6e0 t psp_v3_1_ring_get_wptr +ffffffff81e8f730 t psp_v3_1_ring_set_wptr +ffffffff81e90000 t sdma_v2_4_early_init +ffffffff81e900e0 t sdma_v2_4_sw_init +ffffffff81e90470 t sdma_v2_4_sw_fini +ffffffff81e90550 t sdma_v2_4_hw_init +ffffffff81e90910 t sdma_v2_4_hw_fini +ffffffff81e90950 t sdma_v2_4_suspend +ffffffff81e90990 t sdma_v2_4_resume +ffffffff81e909a0 t sdma_v2_4_is_idle +ffffffff81e909e0 t sdma_v2_4_wait_for_idle +ffffffff81e90a80 t sdma_v2_4_soft_reset +ffffffff81e90bc0 t sdma_v2_4_set_clockgating_state +ffffffff81e90bf0 t sdma_v2_4_set_powergating_state +ffffffff81e90c20 t sdma_v2_4_ring_get_rptr +ffffffff81e90c60 t sdma_v2_4_ring_get_wptr +ffffffff81e90cc0 t sdma_v2_4_ring_set_wptr +ffffffff81e90d00 t sdma_v2_4_ring_emit_ib +ffffffff81e90fb0 t sdma_v2_4_ring_emit_fence +ffffffff81e913b0 t sdma_v2_4_ring_emit_pipeline_sync +ffffffff81e91630 t sdma_v2_4_ring_emit_vm_flush +ffffffff81e918b0 t sdma_v2_4_ring_emit_hdp_flush +ffffffff81e91b30 t sdma_v2_4_ring_test_ring +ffffffff81e91e10 t sdma_v2_4_ring_test_ib +ffffffff81e91ff0 t sdma_v2_4_ring_insert_nop +ffffffff81e92120 t sdma_v2_4_ring_pad_ib +ffffffff81e92250 t sdma_v2_4_ring_emit_wreg +ffffffff81e923a0 t sdma_v2_4_emit_copy_buffer +ffffffff81e92460 t sdma_v2_4_emit_fill_buffer +ffffffff81e924f0 t sdma_v2_4_vm_copy_pte +ffffffff81e925b0 t sdma_v2_4_vm_write_pte +ffffffff81e92680 t sdma_v2_4_vm_set_pte_pde +ffffffff81e92780 t sdma_v2_4_set_trap_irq_state +ffffffff81e92840 t sdma_v2_4_process_trap_irq +ffffffff81e928e0 t sdma_v2_4_process_illegal_inst_irq +ffffffff81e92960 t sdma_v2_4_enable +ffffffff81e93000 t sdma_v3_0_early_init +ffffffff81e93150 t sdma_v3_0_sw_init +ffffffff81e93500 t sdma_v3_0_sw_fini +ffffffff81e935e0 t sdma_v3_0_hw_init +ffffffff81e93710 t sdma_v3_0_hw_fini +ffffffff81e93760 t sdma_v3_0_suspend +ffffffff81e937b0 t sdma_v3_0_resume +ffffffff81e937c0 t sdma_v3_0_is_idle +ffffffff81e93800 t sdma_v3_0_wait_for_idle +ffffffff81e938a0 t sdma_v3_0_check_soft_reset +ffffffff81e93900 t sdma_v3_0_pre_soft_reset +ffffffff81e93950 t sdma_v3_0_soft_reset +ffffffff81e93a20 t sdma_v3_0_post_soft_reset +ffffffff81e93a70 t sdma_v3_0_set_clockgating_state +ffffffff81e93cd0 t sdma_v3_0_set_powergating_state +ffffffff81e93d00 t sdma_v3_0_get_clockgating_state +ffffffff81e93d80 t sdma_v3_0_ring_get_rptr +ffffffff81e93dc0 t sdma_v3_0_ring_get_wptr +ffffffff81e93e40 t sdma_v3_0_ring_set_wptr +ffffffff81e93ef0 t sdma_v3_0_ring_emit_ib +ffffffff81e941a0 t sdma_v3_0_ring_emit_fence +ffffffff81e945a0 t sdma_v3_0_ring_emit_pipeline_sync +ffffffff81e94820 t sdma_v3_0_ring_emit_vm_flush +ffffffff81e94aa0 t sdma_v3_0_ring_emit_hdp_flush +ffffffff81e94d20 t sdma_v3_0_ring_test_ring +ffffffff81e95000 t sdma_v3_0_ring_test_ib +ffffffff81e951e0 t sdma_v3_0_ring_insert_nop +ffffffff81e95310 t sdma_v3_0_ring_pad_ib +ffffffff81e95440 t sdma_v3_0_ring_emit_wreg +ffffffff81e95590 t sdma_v3_0_emit_copy_buffer +ffffffff81e95650 t sdma_v3_0_emit_fill_buffer +ffffffff81e956e0 t sdma_v3_0_vm_copy_pte +ffffffff81e957a0 t sdma_v3_0_vm_write_pte +ffffffff81e95870 t sdma_v3_0_vm_set_pte_pde +ffffffff81e95970 t sdma_v3_0_set_trap_irq_state +ffffffff81e95a30 t sdma_v3_0_process_trap_irq +ffffffff81e95ad0 t sdma_v3_0_process_illegal_inst_irq +ffffffff81e95b50 t sdma_v3_0_ctx_switch_enable +ffffffff81e95ce0 t sdma_v3_0_enable +ffffffff81e95e50 t sdma_v3_0_gfx_resume +ffffffff81e97000 t sdma_v4_0_early_init +ffffffff81e97580 t sdma_v4_0_late_init +ffffffff81e97820 t sdma_v4_0_sw_init +ffffffff81e97ba0 t sdma_v4_0_sw_fini +ffffffff81e97c60 t sdma_v4_0_hw_init +ffffffff81e9ac00 t sdma_v4_0_hw_fini +ffffffff81e9acb0 t sdma_v4_0_suspend +ffffffff81e9ad00 t sdma_v4_0_resume +ffffffff81e9ad80 t sdma_v4_0_is_idle +ffffffff81e9aeb0 t sdma_v4_0_wait_for_idle +ffffffff81e9b050 t sdma_v4_0_soft_reset +ffffffff81e9b080 t sdma_v4_0_set_clockgating_state +ffffffff81e9b580 t sdma_v4_0_set_powergating_state +ffffffff81e9b640 t sdma_v4_0_get_clockgating_state +ffffffff81e9b6e0 t sdma_v4_0_query_ras_error_count +ffffffff81e9b8b0 t sdma_v4_0_reset_ras_error_count +ffffffff81e9ba00 t sdma_v4_0_ring_get_rptr +ffffffff81e9ba60 t sdma_v4_0_ring_get_wptr +ffffffff81e9bc50 t sdma_v4_0_ring_set_wptr +ffffffff81e9bed0 t sdma_v4_0_ring_emit_ib +ffffffff81e9c180 t sdma_v4_0_ring_emit_fence +ffffffff81e9c5b0 t sdma_v4_0_ring_emit_pipeline_sync +ffffffff81e9c610 t sdma_v4_0_ring_emit_vm_flush +ffffffff81e9c630 t sdma_v4_0_ring_emit_hdp_flush +ffffffff81e9c6d0 t sdma_v4_0_ring_test_ring +ffffffff81e9c9b0 t sdma_v4_0_ring_test_ib +ffffffff81e9cb90 t sdma_v4_0_ring_insert_nop +ffffffff81e9ccc0 t sdma_v4_0_ring_pad_ib +ffffffff81e9cdf0 t sdma_v4_0_ring_emit_wreg +ffffffff81e9cf40 t sdma_v4_0_ring_emit_reg_wait +ffffffff81e9cf90 t sdma_v4_0_wait_reg_mem +ffffffff81e9d2c0 t sdma_v4_0_page_ring_get_wptr +ffffffff81e9d470 t sdma_v4_0_page_ring_set_wptr +ffffffff81e9d630 t sdma_v4_0_emit_copy_buffer +ffffffff81e9d6f0 t sdma_v4_0_emit_fill_buffer +ffffffff81e9d780 t sdma_v4_0_vm_copy_pte +ffffffff81e9d840 t sdma_v4_0_vm_write_pte +ffffffff81e9d910 t sdma_v4_0_vm_set_pte_pde +ffffffff81e9da10 t sdma_v4_0_set_trap_irq_state +ffffffff81e9dbb0 t sdma_v4_0_process_trap_irq +ffffffff81e9dcf0 t sdma_v4_0_process_illegal_inst_irq +ffffffff81e9de10 t sdma_v4_0_set_ecc_irq_state +ffffffff81e9dfb0 t sdma_v4_0_process_vm_hole_irq +ffffffff81e9e0f0 t sdma_v4_0_process_doorbell_invalid_irq +ffffffff81e9e230 t sdma_v4_0_process_pool_timeout_irq +ffffffff81e9e370 t sdma_v4_0_process_srbm_write_irq +ffffffff81e9e4b0 t sdma_v4_0_process_ras_data_cb +ffffffff81e9e530 t sdma_v4_0_ctx_switch_enable +ffffffff81e9ebe0 t sdma_v4_0_enable +ffffffff81e9f180 t sdma_v4_0_gfx_enable +ffffffff81ea0000 t sdma_v4_4_query_ras_error_count +ffffffff81ea0270 t sdma_v4_4_reset_ras_error_count +ffffffff81ea1000 t sdma_v5_0_early_init +ffffffff81ea1170 t sdma_v5_0_sw_init +ffffffff81ea1410 t sdma_v5_0_sw_fini +ffffffff81ea14a0 t sdma_v5_0_hw_init +ffffffff81ea2750 t sdma_v5_0_hw_fini +ffffffff81ea27b0 t sdma_v5_0_suspend +ffffffff81ea2810 t sdma_v5_0_resume +ffffffff81ea2820 t sdma_v5_0_is_idle +ffffffff81ea28b0 t sdma_v5_0_wait_for_idle +ffffffff81ea2970 t sdma_v5_0_soft_reset +ffffffff81ea29a0 t sdma_v5_0_set_clockgating_state +ffffffff81ea2ba0 t sdma_v5_0_set_powergating_state +ffffffff81ea2bd0 t sdma_v5_0_get_clockgating_state +ffffffff81ea2c70 t sdma_v5_0_ring_get_rptr +ffffffff81ea2cd0 t sdma_v5_0_ring_get_wptr +ffffffff81ea2e70 t sdma_v5_0_ring_set_wptr +ffffffff81ea31d0 t sdma_v5_0_ring_emit_ib +ffffffff81ea3490 t sdma_v5_0_ring_emit_fence +ffffffff81ea3900 t sdma_v5_0_ring_emit_pipeline_sync +ffffffff81ea3b80 t sdma_v5_0_ring_emit_vm_flush +ffffffff81ea3ba0 t sdma_v5_0_ring_emit_hdp_flush +ffffffff81ea3e40 t sdma_v5_0_ring_test_ring +ffffffff81ea4210 t sdma_v5_0_ring_test_ib +ffffffff81ea4540 t sdma_v5_0_ring_insert_nop +ffffffff81ea4670 t sdma_v5_0_ring_pad_ib +ffffffff81ea47a0 t sdma_v5_0_ring_init_cond_exec +ffffffff81ea49d0 t sdma_v5_0_ring_patch_cond_exec +ffffffff81ea4a90 t sdma_v5_0_ring_emit_wreg +ffffffff81ea4be0 t sdma_v5_0_ring_emit_reg_wait +ffffffff81ea4e60 t sdma_v5_0_ring_emit_reg_write_reg_wait +ffffffff81ea4ee0 t sdma_v5_0_ring_preempt_ib +ffffffff81ea5020 t sdma_v5_0_ring_emit_mem_sync +ffffffff81ea5230 t sdma_v5_0_emit_copy_buffer +ffffffff81ea52f0 t sdma_v5_0_emit_fill_buffer +ffffffff81ea5380 t sdma_v5_0_vm_copy_pte +ffffffff81ea5440 t sdma_v5_0_vm_write_pte +ffffffff81ea5510 t sdma_v5_0_vm_set_pte_pde +ffffffff81ea5610 t sdma_v5_0_set_trap_irq_state +ffffffff81ea56a0 t sdma_v5_0_process_trap_irq +ffffffff81ea57b0 t sdma_v5_0_process_illegal_inst_irq +ffffffff81ea57e0 t sdma_v5_0_mqd_init +ffffffff81ea58c0 t sdma_v5_0_ctx_switch_enable +ffffffff81ea5bc0 t sdma_v5_0_enable +ffffffff81ea6000 t sdma_v5_2_early_init +ffffffff81ea6170 t sdma_v5_2_sw_init +ffffffff81ea63a0 t sdma_v5_2_sw_fini +ffffffff81ea6430 t sdma_v5_2_hw_init +ffffffff81ea6770 t sdma_v5_2_hw_fini +ffffffff81ea67d0 t sdma_v5_2_suspend +ffffffff81ea6830 t sdma_v5_2_resume +ffffffff81ea6840 t sdma_v5_2_is_idle +ffffffff81ea6900 t sdma_v5_2_wait_for_idle +ffffffff81ea6a00 t sdma_v5_2_soft_reset +ffffffff81ea6ca0 t sdma_v5_2_set_clockgating_state +ffffffff81ea6fc0 t sdma_v5_2_set_powergating_state +ffffffff81ea6ff0 t sdma_v5_2_get_clockgating_state +ffffffff81ea7080 t sdma_v5_2_ring_get_rptr +ffffffff81ea70e0 t sdma_v5_2_ring_get_wptr +ffffffff81ea7220 t sdma_v5_2_ring_set_wptr +ffffffff81ea73e0 t sdma_v5_2_ring_emit_ib +ffffffff81ea76a0 t sdma_v5_2_ring_emit_fence +ffffffff81ea7b10 t sdma_v5_2_ring_emit_pipeline_sync +ffffffff81ea7d90 t sdma_v5_2_ring_emit_vm_flush +ffffffff81ea7db0 t sdma_v5_2_ring_emit_hdp_flush +ffffffff81ea8050 t sdma_v5_2_ring_test_ring +ffffffff81ea8420 t sdma_v5_2_ring_test_ib +ffffffff81ea8750 t sdma_v5_2_ring_insert_nop +ffffffff81ea8880 t sdma_v5_2_ring_pad_ib +ffffffff81ea89b0 t sdma_v5_2_ring_init_cond_exec +ffffffff81ea8be0 t sdma_v5_2_ring_patch_cond_exec +ffffffff81ea8ca0 t sdma_v5_2_ring_emit_wreg +ffffffff81ea8df0 t sdma_v5_2_ring_emit_reg_wait +ffffffff81ea9070 t sdma_v5_2_ring_emit_reg_write_reg_wait +ffffffff81ea90f0 t sdma_v5_2_ring_preempt_ib +ffffffff81ea9260 t sdma_v5_2_ring_emit_mem_sync +ffffffff81ea9470 t sdma_v5_2_emit_copy_buffer +ffffffff81ea9530 t sdma_v5_2_emit_fill_buffer +ffffffff81ea95c0 t sdma_v5_2_vm_copy_pte +ffffffff81ea9680 t sdma_v5_2_vm_write_pte +ffffffff81ea9750 t sdma_v5_2_vm_set_pte_pde +ffffffff81ea9850 t sdma_v5_2_set_trap_irq_state +ffffffff81ea9910 t sdma_v5_2_process_trap_irq +ffffffff81ea9a50 t sdma_v5_2_process_illegal_inst_irq +ffffffff81ea9a80 t sdma_v5_2_mqd_init +ffffffff81ea9b60 t sdma_v5_2_ctx_switch_enable +ffffffff81ea9f60 t sdma_v5_2_enable +ffffffff81eaa370 t sdma_v5_2_gfx_resume +ffffffff81eac000 t sdma_v6_0_early_init +ffffffff81eac140 t sdma_v6_0_sw_init +ffffffff81eac320 t sdma_v6_0_sw_fini +ffffffff81eac3b0 t sdma_v6_0_hw_init +ffffffff81eac3c0 t sdma_v6_0_hw_fini +ffffffff81eac410 t sdma_v6_0_suspend +ffffffff81eac460 t sdma_v6_0_resume +ffffffff81eac470 t sdma_v6_0_is_idle +ffffffff81eac500 t sdma_v6_0_wait_for_idle +ffffffff81eac5c0 t sdma_v6_0_check_soft_reset +ffffffff81eac680 t sdma_v6_0_soft_reset +ffffffff81eacb20 t sdma_v6_0_set_clockgating_state +ffffffff81eacb50 t sdma_v6_0_set_powergating_state +ffffffff81eacb80 t sdma_v6_0_get_clockgating_state +ffffffff81eacbb0 t sdma_v6_0_ring_get_rptr +ffffffff81eacc10 t sdma_v6_0_ring_get_wptr +ffffffff81eacc80 t sdma_v6_0_ring_set_wptr +ffffffff81eacfe0 t sdma_v6_0_ring_emit_ib +ffffffff81ead2a0 t sdma_v6_0_ring_emit_fence +ffffffff81ead710 t sdma_v6_0_ring_emit_pipeline_sync +ffffffff81ead990 t sdma_v6_0_ring_emit_vm_flush +ffffffff81ead9b0 t sdma_v6_0_ring_emit_hdp_flush +ffffffff81eadc50 t sdma_v6_0_ring_test_ring +ffffffff81eae020 t sdma_v6_0_ring_test_ib +ffffffff81eae350 t sdma_v6_0_ring_insert_nop +ffffffff81eae480 t sdma_v6_0_ring_pad_ib +ffffffff81eae5b0 t sdma_v6_0_ring_init_cond_exec +ffffffff81eae7e0 t sdma_v6_0_ring_patch_cond_exec +ffffffff81eae8a0 t sdma_v6_0_ring_emit_wreg +ffffffff81eae9f0 t sdma_v6_0_ring_emit_reg_wait +ffffffff81eaec70 t sdma_v6_0_ring_emit_reg_write_reg_wait +ffffffff81eaecf0 t sdma_v6_0_ring_preempt_ib +ffffffff81eaee40 t sdma_v6_0_ring_emit_mem_sync +ffffffff81eaf050 t sdma_v6_0_emit_copy_buffer +ffffffff81eaf110 t sdma_v6_0_emit_fill_buffer +ffffffff81eaf1a0 t sdma_v6_0_vm_copy_pte +ffffffff81eaf260 t sdma_v6_0_vm_write_pte +ffffffff81eaf330 t sdma_v6_0_vm_set_pte_pde +ffffffff81eaf430 t sdma_v6_0_set_trap_irq_state +ffffffff81eaf4c0 t sdma_v6_0_process_trap_irq +ffffffff81eaf5f0 t sdma_v6_0_process_illegal_inst_irq +ffffffff81eaf620 t sdma_v6_0_mqd_init +ffffffff81eaf740 t sdma_v6_0_start +ffffffff81eaf9c0 t sdma_v6_0_enable +ffffffff81eafb40 t sdma_v6_0_gfx_resume +ffffffff81eb0bc0 t sdma_v6_0_gfx_stop +ffffffff81eb1000 T sienna_cichlid_reset_init +ffffffff81eb10c0 t sienna_cichlid_async_reset +ffffffff81eb1120 t sienna_cichlid_get_reset_handler +ffffffff81eb1180 T sienna_cichlid_reset_fini +ffffffff81eb11e0 t sienna_cichlid_mode2_prepare_hwcontext +ffffffff81eb1330 t sienna_cichlid_mode2_perform_reset +ffffffff81eb13b0 t sienna_cichlid_mode2_restore_hwcontext +ffffffff81eb16b0 t sienna_cichlid_mode2_reset +ffffffff81eb2000 T smu_v11_0_i2c_control_init +ffffffff81eb20d0 T smu_v11_0_i2c_control_fini +ffffffff81eb2110 t smu_v11_0_i2c_xfer +ffffffff81eb31f0 t smu_v11_0_i2c_func +ffffffff81eb3220 t smu_v11_0_i2c_enable +ffffffff81eb3360 t smu_v11_0_i2c_abort +ffffffff81eb3460 t lock_bus +ffffffff81eb3500 t trylock_bus +ffffffff81eb3550 t unlock_bus +ffffffff81eb4000 t smuio_v11_0_get_rom_index_offset +ffffffff81eb4040 t smuio_v11_0_get_rom_data_offset +ffffffff81eb4080 t smuio_v11_0_update_rom_clock_gating +ffffffff81eb41c0 t smuio_v11_0_get_clock_gating_state +ffffffff81eb5000 t smuio_v11_0_6_get_rom_index_offset +ffffffff81eb5040 t smuio_v11_0_6_get_rom_data_offset +ffffffff81eb5080 t smuio_v11_0_6_update_rom_clock_gating +ffffffff81eb51c0 t smuio_v11_0_6_get_clock_gating_state +ffffffff81eb6000 t smuio_v13_0_get_rom_index_offset +ffffffff81eb6040 t smuio_v13_0_get_rom_data_offset +ffffffff81eb6080 t smuio_v13_0_update_rom_clock_gating +ffffffff81eb61c0 t smuio_v13_0_get_clock_gating_state +ffffffff81eb6260 t smuio_v13_0_get_die_id +ffffffff81eb62e0 t smuio_v13_0_get_socket_id +ffffffff81eb6360 t smuio_v13_0_is_host_gpu_xgmi_supported +ffffffff81eb7000 t smuio_v13_0_6_get_rom_index_offset +ffffffff81eb7040 t smuio_v13_0_6_get_rom_data_offset +ffffffff81eb8000 t smuio_v9_0_get_rom_index_offset +ffffffff81eb8040 t smuio_v9_0_get_rom_data_offset +ffffffff81eb8080 t smuio_v9_0_update_rom_clock_gating +ffffffff81eb81c0 t smuio_v9_0_get_clock_gating_state +ffffffff81eb9000 T soc15_grbm_select +ffffffff81eb9080 T soc15_program_register_sequence +ffffffff81eb9280 T soc15_set_virt_ops +ffffffff81eb92f0 t soc15_common_early_init +ffffffff81eb9680 t soc15_common_late_init +ffffffff81eb96c0 t soc15_common_sw_init +ffffffff81eb9720 t soc15_common_sw_fini +ffffffff81eb9770 t soc15_common_hw_init +ffffffff81eb98a0 t soc15_common_hw_fini +ffffffff81eb9970 t soc15_common_suspend +ffffffff81eb99b0 t soc15_common_resume +ffffffff81eb99f0 t soc15_common_is_idle +ffffffff81eb9a20 t soc15_common_wait_for_idle +ffffffff81eb9a50 t soc15_common_soft_reset +ffffffff81eb9a80 t soc15_common_set_clockgating_state +ffffffff81eb9dc0 t soc15_common_set_powergating_state +ffffffff81eb9df0 t soc15_common_get_clockgating_state +ffffffff81eb9ed0 t soc15_pcie_rreg +ffffffff81eb9f30 t soc15_pcie_wreg +ffffffff81eb9f90 t soc15_pcie_rreg64 +ffffffff81eb9ff0 t soc15_pcie_wreg64 +ffffffff81eba050 t soc15_uvd_ctx_rreg +ffffffff81eba0f0 t soc15_uvd_ctx_wreg +ffffffff81eba180 t soc15_didt_rreg +ffffffff81eba220 t soc15_didt_wreg +ffffffff81eba2a0 t soc15_gc_cac_rreg +ffffffff81eba3c0 t soc15_gc_cac_wreg +ffffffff81eba4d0 t soc15_se_cac_rreg +ffffffff81eba5f0 t soc15_se_cac_wreg +ffffffff81eba700 t soc15_read_disabled_bios +ffffffff81eba730 t soc15_read_register +ffffffff81eba830 t soc15_vga_set_state +ffffffff81eba860 t soc15_asic_reset +ffffffff81eba960 t soc15_asic_reset_method +ffffffff81ebaae0 t soc15_get_xclk +ffffffff81ebab30 t soc15_set_uvd_clocks +ffffffff81ebab60 t soc15_set_vce_clocks +ffffffff81ebab90 t soc15_get_config_memsize +ffffffff81ebabb0 t soc15_need_full_reset +ffffffff81ebabe0 t soc15_get_pcie_usage +ffffffff81ebad10 t soc15_need_reset_on_init +ffffffff81ebadb0 t soc15_get_pcie_replay_count +ffffffff81ebae20 t soc15_supports_baco +ffffffff81ebae80 t soc15_pre_asic_init +ffffffff81ebae90 t soc15_query_video_codecs +ffffffff81ebaf40 t vega20_get_pcie_usage +ffffffff81ebc000 T soc21_grbm_select +ffffffff81ebc080 t soc21_common_early_init +ffffffff81ebc2a0 t soc21_common_late_init +ffffffff81ebc2d0 t soc21_common_sw_init +ffffffff81ebc300 t soc21_common_sw_fini +ffffffff81ebc330 t soc21_common_hw_init +ffffffff81ebc400 t soc21_common_hw_fini +ffffffff81ebc460 t soc21_common_suspend +ffffffff81ebc4c0 t soc21_common_resume +ffffffff81ebc590 t soc21_common_is_idle +ffffffff81ebc5c0 t soc21_common_wait_for_idle +ffffffff81ebc5f0 t soc21_common_soft_reset +ffffffff81ebc620 t soc21_common_set_clockgating_state +ffffffff81ebc6d0 t soc21_common_set_powergating_state +ffffffff81ebc730 t soc21_common_get_clockgating_state +ffffffff81ebc780 t soc21_pcie_rreg +ffffffff81ebc7e0 t soc21_pcie_wreg +ffffffff81ebc840 t soc21_pcie_rreg64 +ffffffff81ebc8a0 t soc21_pcie_wreg64 +ffffffff81ebc900 t soc21_didt_rreg +ffffffff81ebc9a0 t soc21_didt_wreg +ffffffff81ebca20 t soc21_read_disabled_bios +ffffffff81ebca50 t soc21_read_register +ffffffff81ebcb40 t soc21_vga_set_state +ffffffff81ebcb70 t soc21_asic_reset +ffffffff81ebcc50 t soc21_asic_reset_method +ffffffff81ebcd10 t soc21_get_xclk +ffffffff81ebcd40 t soc21_set_uvd_clocks +ffffffff81ebcd70 t soc21_set_vce_clocks +ffffffff81ebcda0 t soc21_get_config_memsize +ffffffff81ebcdc0 t soc21_need_full_reset +ffffffff81ebce20 t soc21_init_doorbell_index +ffffffff81ebcf40 t soc21_need_reset_on_init +ffffffff81ebcfd0 t soc21_get_pcie_replay_count +ffffffff81ebd000 t soc21_pre_asic_init +ffffffff81ebd030 t soc21_update_umd_stable_pstate +ffffffff81ebd0a0 t soc21_query_video_codecs +ffffffff81ebe000 t tonga_ih_early_init +ffffffff81ebe050 t tonga_ih_sw_init +ffffffff81ebe0d0 t tonga_ih_sw_fini +ffffffff81ebe110 t tonga_ih_hw_init +ffffffff81ebe300 t tonga_ih_hw_fini +ffffffff81ebe3a0 t tonga_ih_suspend +ffffffff81ebe440 t tonga_ih_resume +ffffffff81ebe480 t tonga_ih_is_idle +ffffffff81ebe4d0 t tonga_ih_wait_for_idle +ffffffff81ebe570 t tonga_ih_check_soft_reset +ffffffff81ebe5d0 t tonga_ih_pre_soft_reset +ffffffff81ebe680 t tonga_ih_soft_reset +ffffffff81ebe750 t tonga_ih_post_soft_reset +ffffffff81ebe790 t tonga_ih_set_clockgating_state +ffffffff81ebe7c0 t tonga_ih_set_powergating_state +ffffffff81ebe7f0 t tonga_ih_get_wptr +ffffffff81ebe8e0 t tonga_ih_decode_iv +ffffffff81ebe960 t tonga_ih_set_rptr +ffffffff81ebf000 t umc_v6_0_init_registers +ffffffff81ec0000 t umc_v6_1_query_ras_error_count +ffffffff81ec04e0 t umc_v6_1_query_ras_error_address +ffffffff81ec07c0 t umc_v6_1_err_cnt_init +ffffffff81ec1000 t umc_v6_7_query_ras_error_count +ffffffff81ec1410 t umc_v6_7_query_ras_error_address +ffffffff81ec1590 t umc_v6_7_query_ras_poison_mode +ffffffff81ec15f0 t umc_v6_7_convert_error_address +ffffffff81ec18f0 t umc_v6_7_ecc_info_query_ras_error_count +ffffffff81ec1b30 t umc_v6_7_ecc_info_query_ras_error_address +ffffffff81ec2000 t umc_v8_10_query_ras_error_count +ffffffff81ec2280 t umc_v8_10_query_ras_error_address +ffffffff81ec25b0 t umc_v8_10_err_cnt_init +ffffffff81ec2730 t umc_v8_10_query_ras_poison_mode +ffffffff81ec3000 t umc_v8_7_query_ras_error_count +ffffffff81ec3310 t umc_v8_7_query_ras_error_address +ffffffff81ec34c0 t umc_v8_7_err_cnt_init +ffffffff81ec3610 t umc_v8_7_ecc_info_query_ras_error_count +ffffffff81ec3740 t umc_v8_7_ecc_info_query_ras_error_address +ffffffff81ec4000 t uvd_v5_0_early_init +ffffffff81ec4050 t uvd_v5_0_sw_init +ffffffff81ec4140 t uvd_v5_0_sw_fini +ffffffff81ec4190 t uvd_v5_0_hw_init +ffffffff81ec46a0 t uvd_v5_0_hw_fini +ffffffff81ec4720 t uvd_v5_0_suspend +ffffffff81ec4820 t uvd_v5_0_resume +ffffffff81ec4870 t uvd_v5_0_is_idle +ffffffff81ec48c0 t uvd_v5_0_wait_for_idle +ffffffff81ec4950 t uvd_v5_0_soft_reset +ffffffff81ec49f0 t uvd_v5_0_set_clockgating_state +ffffffff81ec4b90 t uvd_v5_0_set_powergating_state +ffffffff81ec4bd0 t uvd_v5_0_get_clockgating_state +ffffffff81ec4c50 t uvd_v5_0_ring_get_rptr +ffffffff81ec4c90 t uvd_v5_0_ring_get_wptr +ffffffff81ec4cd0 t uvd_v5_0_ring_set_wptr +ffffffff81ec4d00 t uvd_v5_0_ring_emit_ib +ffffffff81ec4f70 t uvd_v5_0_ring_emit_fence +ffffffff81ec5520 t uvd_v5_0_ring_test_ring +ffffffff81ec56c0 t uvd_v5_0_ring_insert_nop +ffffffff81ec5820 t uvd_v5_0_set_interrupt_state +ffffffff81ec5850 t uvd_v5_0_process_interrupt +ffffffff81ec58b0 t uvd_v5_0_stop +ffffffff81ec59c0 t uvd_v5_0_start +ffffffff81ec7000 t uvd_v6_0_early_init +ffffffff81ec7140 t uvd_v6_0_sw_init +ffffffff81ec7460 t uvd_v6_0_sw_fini +ffffffff81ec7520 t uvd_v6_0_hw_init +ffffffff81ec7ae0 t uvd_v6_0_hw_fini +ffffffff81ec7b60 t uvd_v6_0_suspend +ffffffff81ec7c60 t uvd_v6_0_resume +ffffffff81ec7cb0 t uvd_v6_0_is_idle +ffffffff81ec7d00 t uvd_v6_0_wait_for_idle +ffffffff81ec7d90 t uvd_v6_0_check_soft_reset +ffffffff81ec7e10 t uvd_v6_0_pre_soft_reset +ffffffff81ec7e50 t uvd_v6_0_soft_reset +ffffffff81ec7f20 t uvd_v6_0_post_soft_reset +ffffffff81ec7fc0 t uvd_v6_0_set_clockgating_state +ffffffff81ec8150 t uvd_v6_0_set_powergating_state +ffffffff81ec81c0 t uvd_v6_0_get_clockgating_state +ffffffff81ec8250 t uvd_v6_0_ring_get_rptr +ffffffff81ec8290 t uvd_v6_0_ring_get_wptr +ffffffff81ec82d0 t uvd_v6_0_ring_set_wptr +ffffffff81ec8300 t uvd_v6_0_ring_emit_ib +ffffffff81ec8660 t uvd_v6_0_ring_emit_fence +ffffffff81ec8c10 t uvd_v6_0_ring_emit_pipeline_sync +ffffffff81ec9010 t uvd_v6_0_ring_emit_vm_flush +ffffffff81ec9370 t uvd_v6_0_ring_emit_hdp_flush +ffffffff81ec93a0 t uvd_v6_0_ring_test_ring +ffffffff81ec9540 t uvd_v6_0_ring_insert_nop +ffffffff81ec96a0 t uvd_v6_0_ring_emit_wreg +ffffffff81ec9920 t uvd_v6_0_enc_ring_get_rptr +ffffffff81ec9980 t uvd_v6_0_enc_ring_get_wptr +ffffffff81ec99e0 t uvd_v6_0_enc_ring_set_wptr +ffffffff81ec9a20 t uvd_v6_0_enc_ring_emit_ib +ffffffff81ec9c60 t uvd_v6_0_enc_ring_emit_fence +ffffffff81ec9ea0 t uvd_v6_0_enc_ring_emit_pipeline_sync +ffffffff81eca050 t uvd_v6_0_enc_ring_emit_vm_flush +ffffffff81eca260 t uvd_v6_0_enc_ring_test_ring +ffffffff81eca3b0 t uvd_v6_0_enc_ring_test_ib +ffffffff81eca970 t uvd_v6_0_enc_ring_insert_end +ffffffff81ecaa00 t uvd_v6_0_set_interrupt_state +ffffffff81ecaa30 t uvd_v6_0_process_interrupt +ffffffff81ecab20 t uvd_v6_0_stop +ffffffff81ecac30 t uvd_v6_0_start +ffffffff81ecc000 t uvd_v7_0_early_init +ffffffff81ecc270 t uvd_v7_0_sw_init +ffffffff81ecc5f0 t uvd_v7_0_sw_fini +ffffffff81ecc700 t uvd_v7_0_hw_init +ffffffff81ecf620 t uvd_v7_0_hw_fini +ffffffff81ecf930 t uvd_v7_0_suspend +ffffffff81ecf9e0 t uvd_v7_0_resume +ffffffff81ecfa30 t uvd_v7_0_set_clockgating_state +ffffffff81ecfa60 t uvd_v7_0_ring_get_rptr +ffffffff81ecfb00 t uvd_v7_0_ring_get_wptr +ffffffff81ecfba0 t uvd_v7_0_ring_set_wptr +ffffffff81ecfc20 t uvd_v7_0_ring_patch_cs_in_place +ffffffff81ecfca0 t uvd_v7_0_ring_emit_ib +ffffffff81ed0050 t uvd_v7_0_ring_emit_fence +ffffffff81ed06b0 t uvd_v7_0_ring_emit_vm_flush +ffffffff81ed0720 t uvd_v7_0_ring_emit_hdp_flush +ffffffff81ed0750 t uvd_v7_0_ring_test_ring +ffffffff81ed09e0 t uvd_v7_0_ring_insert_nop +ffffffff81ed0b80 t uvd_v7_0_ring_emit_wreg +ffffffff81ed0e50 t uvd_v7_0_ring_emit_reg_wait +ffffffff81ed11f0 t uvd_v7_0_enc_ring_get_rptr +ffffffff81ed12e0 t uvd_v7_0_enc_ring_get_wptr +ffffffff81ed13e0 t uvd_v7_0_enc_ring_set_wptr +ffffffff81ed14e0 t uvd_v7_0_enc_ring_emit_ib +ffffffff81ed1720 t uvd_v7_0_enc_ring_emit_fence +ffffffff81ed1960 t uvd_v7_0_enc_ring_emit_vm_flush +ffffffff81ed19d0 t uvd_v7_0_enc_ring_test_ring +ffffffff81ed1b30 t uvd_v7_0_enc_ring_test_ib +ffffffff81ed20f0 t uvd_v7_0_enc_ring_insert_end +ffffffff81ed2180 t uvd_v7_0_enc_ring_emit_wreg +ffffffff81ed22e0 t uvd_v7_0_enc_ring_emit_reg_wait +ffffffff81ed24a0 t uvd_v7_0_set_interrupt_state +ffffffff81ed24d0 t uvd_v7_0_process_interrupt +ffffffff81ed3000 t vce_v3_0_early_init +ffffffff81ed3180 t vce_v3_0_sw_init +ffffffff81ed32d0 t vce_v3_0_sw_fini +ffffffff81ed3320 t vce_v3_0_hw_init +ffffffff81ed3400 t vce_v3_0_hw_fini +ffffffff81ed34f0 t vce_v3_0_suspend +ffffffff81ed35c0 t vce_v3_0_resume +ffffffff81ed3610 t vce_v3_0_is_idle +ffffffff81ed3680 t vce_v3_0_wait_for_idle +ffffffff81ed3730 t vce_v3_0_check_soft_reset +ffffffff81ed3830 t vce_v3_0_pre_soft_reset +ffffffff81ed38d0 t vce_v3_0_soft_reset +ffffffff81ed39a0 t vce_v3_0_post_soft_reset +ffffffff81ed3b00 t vce_v3_0_set_clockgating_state +ffffffff81ed3df0 t vce_v3_0_set_powergating_state +ffffffff81ed4640 t vce_v3_0_get_clockgating_state +ffffffff81ed4700 t vce_v3_0_ring_get_rptr +ffffffff81ed47d0 t vce_v3_0_ring_get_wptr +ffffffff81ed48a0 t vce_v3_0_ring_set_wptr +ffffffff81ed4960 t vce_v3_0_ring_emit_ib +ffffffff81ed4ba0 t vce_v3_0_emit_pipeline_sync +ffffffff81ed4d50 t vce_v3_0_emit_vm_flush +ffffffff81ed4fc0 t vce_v3_0_set_interrupt_state +ffffffff81ed5030 t vce_v3_0_process_interrupt +ffffffff81ed50f0 t vce_v3_0_stop +ffffffff81ed6000 t vce_v4_0_early_init +ffffffff81ed60b0 t vce_v4_0_sw_init +ffffffff81ed62e0 t vce_v4_0_sw_fini +ffffffff81ed6360 t vce_v4_0_hw_init +ffffffff81ed6b40 t vce_v4_0_hw_fini +ffffffff81ed6be0 t vce_v4_0_suspend +ffffffff81ed6e00 t vce_v4_0_resume +ffffffff81ed6eb0 t vce_v4_0_set_clockgating_state +ffffffff81ed6ee0 t vce_v4_0_set_powergating_state +ffffffff81ed6fc0 t vce_v4_0_ring_get_rptr +ffffffff81ed7030 t vce_v4_0_ring_get_wptr +ffffffff81ed70c0 t vce_v4_0_ring_set_wptr +ffffffff81ed7150 t vce_v4_0_ring_emit_ib +ffffffff81ed7390 t vce_v4_0_ring_emit_fence +ffffffff81ed75d0 t vce_v4_0_emit_vm_flush +ffffffff81ed7640 t vce_v4_0_ring_insert_end +ffffffff81ed76d0 t vce_v4_0_emit_wreg +ffffffff81ed7830 t vce_v4_0_emit_reg_wait +ffffffff81ed79f0 t vce_v4_0_set_interrupt_state +ffffffff81ed7a80 t vce_v4_0_process_interrupt +ffffffff81ed7b20 t vce_v4_0_start +ffffffff81ed8500 t vce_v4_0_stop +ffffffff81ed9000 T vcn_dec_sw_ring_emit_fence +ffffffff81ed9240 T vcn_dec_sw_ring_insert_end +ffffffff81ed92d0 T vcn_dec_sw_ring_emit_ib +ffffffff81ed9510 T vcn_dec_sw_ring_emit_reg_wait +ffffffff81ed96d0 T vcn_dec_sw_ring_emit_vm_flush +ffffffff81ed9740 T vcn_dec_sw_ring_emit_wreg +ffffffff81eda000 T vcn_v1_0_set_pg_for_begin_use +ffffffff81eda150 T vcn_v1_0_ring_end_use +ffffffff81eda1c0 t vcn_v1_0_early_init +ffffffff81eda340 t vcn_v1_0_sw_init +ffffffff81eda5e0 t vcn_v1_0_sw_fini +ffffffff81eda640 t vcn_v1_0_hw_init +ffffffff81eda720 t vcn_v1_0_hw_fini +ffffffff81eda820 t vcn_v1_0_suspend +ffffffff81eda890 t vcn_v1_0_resume +ffffffff81eda980 t vcn_v1_0_is_idle +ffffffff81edaa10 t vcn_v1_0_wait_for_idle +ffffffff81edab00 t vcn_v1_0_set_clockgating_state +ffffffff81edabb0 t vcn_v1_0_set_powergating_state +ffffffff81edb540 t vcn_v1_0_dec_ring_get_rptr +ffffffff81edb5d0 t vcn_v1_0_dec_ring_get_wptr +ffffffff81edb660 t vcn_v1_0_dec_ring_set_wptr +ffffffff81edb770 t vcn_v1_0_ring_patch_cs_in_place +ffffffff81edb940 t vcn_v1_0_dec_ring_emit_ib +ffffffff81edbcd0 t vcn_v1_0_dec_ring_emit_fence +ffffffff81edc300 t vcn_v1_0_dec_ring_emit_vm_flush +ffffffff81edc370 t vcn_v1_0_dec_ring_insert_nop +ffffffff81edc500 t vcn_v1_0_dec_ring_insert_start +ffffffff81edc6e0 t vcn_v1_0_dec_ring_insert_end +ffffffff81edc7f0 t vcn_v1_0_ring_begin_use +ffffffff81edc890 t vcn_v1_0_dec_ring_emit_wreg +ffffffff81edcb40 t vcn_v1_0_dec_ring_emit_reg_wait +ffffffff81edcec0 t vcn_v1_0_enc_ring_get_rptr +ffffffff81edcf90 t vcn_v1_0_enc_ring_get_wptr +ffffffff81edd060 t vcn_v1_0_enc_ring_set_wptr +ffffffff81edd120 t vcn_v1_0_enc_ring_emit_ib +ffffffff81edd360 t vcn_v1_0_enc_ring_emit_fence +ffffffff81edd5a0 t vcn_v1_0_enc_ring_emit_vm_flush +ffffffff81edd610 t vcn_v1_0_enc_ring_insert_end +ffffffff81edd6a0 t vcn_v1_0_enc_ring_emit_wreg +ffffffff81edd800 t vcn_v1_0_enc_ring_emit_reg_wait +ffffffff81edd9c0 t vcn_v1_0_set_interrupt_state +ffffffff81edd9f0 t vcn_v1_0_process_interrupt +ffffffff81eddaa0 t vcn_v1_0_idle_work_handler +ffffffff81eddc30 t vcn_v1_0_pause_dpg_mode +ffffffff81eded50 t vcn_v1_0_enable_clock_gating +ffffffff81edf160 t vcn_v1_0_disable_clock_gating +ffffffff81edf6f0 t vcn_1_0_enable_static_power_gating +ffffffff81edf910 t vcn_v1_0_start_dpg_mode +ffffffff81ee3540 t vcn_v1_0_start_spg_mode +ffffffff81ee5760 t vcn_v1_0_clock_gating_dpg_mode +ffffffff81ee6000 T vcn_v2_0_dec_ring_insert_start +ffffffff81ee61c0 T vcn_v2_0_dec_ring_insert_end +ffffffff81ee62c0 T vcn_v2_0_dec_ring_insert_nop +ffffffff81ee6430 T vcn_v2_0_dec_ring_emit_fence +ffffffff81ee69f0 T vcn_v2_0_dec_ring_emit_ib +ffffffff81ee6d50 T vcn_v2_0_dec_ring_emit_reg_wait +ffffffff81ee70a0 T vcn_v2_0_dec_ring_emit_vm_flush +ffffffff81ee7110 T vcn_v2_0_dec_ring_emit_wreg +ffffffff81ee73a0 T vcn_v2_0_enc_ring_emit_fence +ffffffff81ee75e0 T vcn_v2_0_enc_ring_insert_end +ffffffff81ee7670 T vcn_v2_0_enc_ring_emit_ib +ffffffff81ee78b0 T vcn_v2_0_enc_ring_emit_reg_wait +ffffffff81ee7a70 T vcn_v2_0_enc_ring_emit_vm_flush +ffffffff81ee7ae0 T vcn_v2_0_enc_ring_emit_wreg +ffffffff81ee7c40 T vcn_v2_0_dec_ring_test_ring +ffffffff81ee7ee0 t vcn_v2_0_early_init +ffffffff81ee8060 t vcn_v2_0_sw_init +ffffffff81ee8370 t vcn_v2_0_sw_fini +ffffffff81ee83f0 t vcn_v2_0_hw_init +ffffffff81ee8da0 t vcn_v2_0_hw_fini +ffffffff81ee8ea0 t vcn_v2_0_suspend +ffffffff81ee8ed0 t vcn_v2_0_resume +ffffffff81ee8f20 t vcn_v2_0_is_idle +ffffffff81ee8fb0 t vcn_v2_0_wait_for_idle +ffffffff81ee90a0 t vcn_v2_0_set_clockgating_state +ffffffff81ee9130 t vcn_v2_0_set_powergating_state +ffffffff81eeb3f0 t vcn_v2_0_dec_ring_get_rptr +ffffffff81eeb480 t vcn_v2_0_dec_ring_get_wptr +ffffffff81eeb520 t vcn_v2_0_dec_ring_set_wptr +ffffffff81eeb650 t vcn_v2_0_enc_ring_get_rptr +ffffffff81eeb720 t vcn_v2_0_enc_ring_get_wptr +ffffffff81eeb810 t vcn_v2_0_enc_ring_set_wptr +ffffffff81eeb900 t vcn_v2_0_set_interrupt_state +ffffffff81eeb930 t vcn_v2_0_process_interrupt +ffffffff81eeb9e0 t vcn_v2_0_pause_dpg_mode +ffffffff81eec340 t vcn_v2_0_enable_clock_gating +ffffffff81eec5c0 t vcn_v2_0_disable_clock_gating +ffffffff81eec9c0 t vcn_v2_0_enable_static_power_gating +ffffffff81eecba0 t vcn_v2_0_start_dpg_mode +ffffffff81ef1660 t vcn_v2_0_clock_gating_dpg_mode +ffffffff81ef2000 t vcn_v2_6_query_poison_status +ffffffff81ef20d0 t vcn_v2_5_early_init +ffffffff81ef2410 t vcn_v2_5_sw_init +ffffffff81ef2890 t vcn_v2_5_sw_fini +ffffffff81ef2960 t vcn_v2_5_hw_init +ffffffff81ef3420 t vcn_v2_5_hw_fini +ffffffff81ef3560 t vcn_v2_5_suspend +ffffffff81ef3590 t vcn_v2_5_resume +ffffffff81ef35e0 t vcn_v2_5_is_idle +ffffffff81ef36d0 t vcn_v2_5_wait_for_idle +ffffffff81ef3800 t vcn_v2_5_set_clockgating_state +ffffffff81ef3880 t vcn_v2_5_set_powergating_state +ffffffff81ef4160 t vcn_v2_5_dec_ring_get_rptr +ffffffff81ef4200 t vcn_v2_5_dec_ring_get_wptr +ffffffff81ef42b0 t vcn_v2_5_dec_ring_set_wptr +ffffffff81ef4360 t vcn_v2_5_enc_ring_get_rptr +ffffffff81ef4450 t vcn_v2_5_enc_ring_get_wptr +ffffffff81ef4550 t vcn_v2_5_enc_ring_set_wptr +ffffffff81ef4650 t vcn_v2_5_set_interrupt_state +ffffffff81ef4680 t vcn_v2_5_process_interrupt +ffffffff81ef47a0 t vcn_v2_5_pause_dpg_mode +ffffffff81ef5110 t vcn_v2_5_enable_clock_gating +ffffffff81ef5410 t vcn_v2_5_disable_clock_gating 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vcn_v3_0_process_interrupt +ffffffff81f01a50 t vcn_v3_0_pause_dpg_mode +ffffffff81f023c0 t vcn_v3_0_enable_clock_gating +ffffffff81f02640 t vcn_v3_0_disable_clock_gating +ffffffff81f02be0 t vcn_v3_0_start_dpg_mode +ffffffff81f07980 t vcn_v3_0_clock_gating_dpg_mode +ffffffff81f09000 t vcn_v4_0_early_init +ffffffff81f09120 t vcn_v4_0_sw_init +ffffffff81f09360 t vcn_v4_0_sw_fini +ffffffff81f09440 t vcn_v4_0_hw_init +ffffffff81f09e80 t vcn_v4_0_hw_fini +ffffffff81f09f90 t vcn_v4_0_suspend +ffffffff81f09fc0 t vcn_v4_0_resume +ffffffff81f0a010 t vcn_v4_0_is_idle +ffffffff81f0a110 t vcn_v4_0_wait_for_idle +ffffffff81f0a240 t vcn_v4_0_set_clockgating_state +ffffffff81f0a350 t vcn_v4_0_set_powergating_state +ffffffff81f0c900 t vcn_v4_0_unified_ring_get_rptr +ffffffff81f0c9e0 t vcn_v4_0_unified_ring_get_wptr +ffffffff81f0cad0 t vcn_v4_0_unified_ring_set_wptr +ffffffff81f0cbd0 t vcn_v4_0_ring_patch_cs_in_place +ffffffff81f0ce50 t vcn_v4_0_set_interrupt_state +ffffffff81f0ce80 t vcn_v4_0_process_interrupt +ffffffff81f0cf40 t vcn_v4_0_pause_dpg_mode +ffffffff81f0d300 t vcn_v4_0_enable_clock_gating +ffffffff81f0d5f0 t vcn_v4_0_disable_clock_gating +ffffffff81f0db40 t vcn_v4_0_start_dpg_mode +ffffffff81f121d0 t vcn_v4_0_disable_clock_gating_dpg_mode +ffffffff81f13000 t vega10_ih_early_init +ffffffff81f13050 t vega10_ih_sw_init +ffffffff81f13300 t vega10_ih_sw_fini +ffffffff81f13340 t vega10_ih_hw_init +ffffffff81f136d0 t vega10_ih_hw_fini +ffffffff81f13720 t vega10_ih_suspend +ffffffff81f13770 t vega10_ih_resume +ffffffff81f13780 t vega10_ih_is_idle +ffffffff81f137b0 t vega10_ih_wait_for_idle +ffffffff81f137e0 t vega10_ih_soft_reset +ffffffff81f13810 t vega10_ih_set_clockgating_state +ffffffff81f13950 t vega10_ih_set_powergating_state +ffffffff81f13980 t vega10_ih_get_wptr +ffffffff81f13a90 t vega10_ih_set_rptr +ffffffff81f13b60 t vega10_ih_self_irq +ffffffff81f13be0 t vega10_ih_toggle_interrupts +ffffffff81f14000 T vega10_reg_base_init +ffffffff81f14150 T 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dm_pp_apply_power_level_change_request +ffffffff81f36920 T dm_pp_apply_clock_for_voltage_request +ffffffff81f369c0 T dm_pp_get_static_clocks +ffffffff81f36a80 T dm_pp_get_funcs +ffffffff81f36b90 t pp_rv_set_wm_ranges +ffffffff81f36ce0 t pp_rv_set_pme_wa_enable +ffffffff81f36d00 t pp_rv_set_active_display_count +ffffffff81f36d20 t pp_rv_set_min_deep_sleep_dcfclk +ffffffff81f36d40 t pp_rv_set_hard_min_dcefclk_by_freq +ffffffff81f36d60 t pp_rv_set_hard_min_fclk_by_freq +ffffffff81f36d80 t pp_nv_set_display_count +ffffffff81f36de0 t pp_nv_set_hard_min_dcefclk_by_freq +ffffffff81f36e50 t pp_nv_set_min_deep_sleep_dcfclk +ffffffff81f36eb0 t pp_nv_set_voltage_by_freq +ffffffff81f36f40 t pp_nv_set_wm_ranges +ffffffff81f36f90 t pp_nv_set_hard_min_uclk_by_freq +ffffffff81f37000 t pp_nv_get_maximum_sustainable_clocks +ffffffff81f37060 t pp_nv_get_uclk_dpm_states +ffffffff81f370c0 t pp_nv_set_pstate_handshake_support +ffffffff81f37110 t pp_rn_set_wm_ranges +ffffffff81f37160 t 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dc_fixpt_s4d19 +ffffffff81f40000 T bios_parser_create +ffffffff81f413b0 t bios_parser_get_connectors_number +ffffffff81f41410 t bios_parser_get_connector_id +ffffffff81f414a0 t bios_parser_get_src_obj +ffffffff81f415b0 t bios_parser_get_i2c_info +ffffffff81f417d0 t bios_parser_get_hpd_info +ffffffff81f418b0 t bios_parser_get_device_tag +ffffffff81f41ab0 t bios_parser_get_spread_spectrum_info +ffffffff81f41db0 t bios_parser_get_ss_entry_number +ffffffff81f41fe0 t bios_parser_get_embedded_panel_info +ffffffff81f42530 t bios_parser_get_gpio_pin_info +ffffffff81f42650 t bios_parser_get_encoder_cap_info +ffffffff81f42750 t bios_parser_set_scratch_critical_state +ffffffff81f42760 t bios_parser_is_device_id_supported +ffffffff81f42820 t bios_parser_encoder_control +ffffffff81f42860 t bios_parser_transmitter_control +ffffffff81f428a0 t bios_parser_enable_crtc +ffffffff81f428f0 t bios_parser_adjust_pixel_clock +ffffffff81f42930 t bios_parser_set_pixel_clock +ffffffff81f42970 t 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+ffffffff81f47f30 t bios_parser_get_lttpr_interop +ffffffff81f48070 t bios_parser_get_connector_speed_cap_info +ffffffff81f481c0 t get_bios_object +ffffffff81f48320 t get_bios_object_from_path_v3 +ffffffff81f49000 T object_id_from_bios_object_id +ffffffff81f4a000 T bios_get_image +ffffffff81f4a050 T bios_is_accelerated_mode +ffffffff81f4a0b0 T bios_set_scratch_acc_mode_change +ffffffff81f4a0f0 T bios_set_scratch_critical_state +ffffffff81f4a130 T bios_get_vga_enabled_displays +ffffffff81f4b000 T dal_bios_parser_create +ffffffff81f4b070 T dal_bios_parser_destroy +ffffffff81f4c000 T dal_bios_parser_init_cmd_tbl +ffffffff81f4c800 t encoder_control_digx_v3 +ffffffff81f4c900 t encoder_control_digx_v4 +ffffffff81f4ca00 t encoder_control_digx_v5 +ffffffff81f4cb50 t encoder_control_dig1_v1 +ffffffff81f4cbd0 t encoder_control_dig2_v1 +ffffffff81f4cc50 t encoder_control_dig_v1 +ffffffff81f4ccb0 t transmitter_control_v2 +ffffffff81f4ce50 t transmitter_control_v3 +ffffffff81f4d010 t transmitter_control_v4 +ffffffff81f4d1c0 t transmitter_control_v1_5 +ffffffff81f4d340 t transmitter_control_v1_6 +ffffffff81f4d4b0 t set_pixel_clock_v3 +ffffffff81f4d620 t set_pixel_clock_v5 +ffffffff81f4d7c0 t set_pixel_clock_v6 +ffffffff81f4d970 t set_pixel_clock_v7 +ffffffff81f4db40 t enable_spread_spectrum_on_ppll_v1 +ffffffff81f4dc60 t enable_spread_spectrum_on_ppll_v2 +ffffffff81f4dd90 t enable_spread_spectrum_on_ppll_v3 +ffffffff81f4dea0 t adjust_display_pll_v2 +ffffffff81f4dff0 t adjust_display_pll_v3 +ffffffff81f4e160 t dac1_encoder_control_v1 +ffffffff81f4e1e0 t dac2_encoder_control_v1 +ffffffff81f4e260 t dac1_output_control_v1 +ffffffff81f4e2c0 t dac2_output_control_v1 +ffffffff81f4e320 t set_crtc_using_dtd_timing_v3 +ffffffff81f4e490 t set_crtc_timing_v1 +ffffffff81f4e630 t enable_crtc_v1 +ffffffff81f4e6d0 t enable_crtc_mem_req_v1 +ffffffff81f4e770 t program_clock_v5 +ffffffff81f4e870 t program_clock_v6 +ffffffff81f4e990 t external_encoder_control_v3 +ffffffff81f4eb40 t enable_disp_power_gating_v2_1 +ffffffff81f4ec00 t set_dce_clock_v2_1 +ffffffff81f4f000 T dal_firmware_parser_init_cmd_tbl +ffffffff81f4f3d0 t encoder_control_digx_v1_5 +ffffffff81f4f5b0 t encoder_control_fallback +ffffffff81f4f610 t transmitter_control_v1_6 +ffffffff81f4f7c0 t transmitter_control_v1_7 +ffffffff81f4f9b0 t transmitter_control_fallback +ffffffff81f4fa10 t set_pixel_clock_v7 +ffffffff81f4fc70 t set_pixel_clock_fallback +ffffffff81f4fcd0 t set_crtc_using_dtd_timing_v3 +ffffffff81f4fe40 t enable_crtc_v1 +ffffffff81f4fee0 t external_encoder_control_v3 +ffffffff81f4ff10 t enable_disp_power_gating_v2_1 +ffffffff81f50070 t enable_disp_power_gating_fallback +ffffffff81f500d0 t set_dce_clock_v2_1 +ffffffff81f501f0 t get_smu_clock_info_v3_1 +ffffffff81f50260 t enable_lvtma_control +ffffffff81f51000 T dal_bios_parser_init_cmd_tbl_helper +ffffffff81f510a0 T dal_cmd_table_helper_controller_id_to_atom +ffffffff81f511c0 T dal_cmd_table_helper_transmitter_bp_to_atom +ffffffff81f51240 T dal_cmd_table_helper_encoder_mode_bp_to_atom +ffffffff81f512d0 T dal_cmd_table_helper_assign_control_parameter +ffffffff81f51390 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src +ffffffff81f51470 T dal_cmd_table_helper_encoder_id_to_atom +ffffffff81f52000 T dal_bios_parser_init_cmd_tbl_helper2 +ffffffff81f520b0 T dal_cmd_table_helper_controller_id_to_atom2 +ffffffff81f521c0 T dal_cmd_table_helper_transmitter_bp_to_atom2 +ffffffff81f52240 T dal_cmd_table_helper_encoder_mode_bp_to_atom2 +ffffffff81f522d0 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src2 +ffffffff81f523b0 T dal_cmd_table_helper_encoder_id_to_atom2 +ffffffff81f53000 T dal_cmd_tbl_helper_dce110_get_table ffffffff81f53030 t encoder_action_to_atom ffffffff81f530b0 t engine_bp_to_atom ffffffff81f53100 t clock_source_id_to_atom -ffffffff81f531d0 t clock_source_id_to_atom_phy_clk_src_id -ffffffff81f53220 t signal_type_to_atom_dig_mode -ffffffff81f53280 t hpd_sel_to_atom -ffffffff81f532c0 t dig_encoder_sel_to_atom -ffffffff81f532f0 t phy_id_to_atom -ffffffff81f53330 t disp_power_gating_action_to_atom -ffffffff81f533a0 t dc_clock_type_to_atom -ffffffff81f53420 t transmitter_color_depth_to_atom -ffffffff81f54000 T dal_cmd_tbl_helper_dce112_get_table +ffffffff81f531a0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff81f531f0 t signal_type_to_atom_dig_mode +ffffffff81f53250 t hpd_sel_to_atom +ffffffff81f53290 t dig_encoder_sel_to_atom +ffffffff81f532c0 t phy_id_to_atom +ffffffff81f53300 t disp_power_gating_action_to_atom +ffffffff81f54000 T dal_cmd_tbl_helper_dce112_get_table2 ffffffff81f54030 t encoder_action_to_atom ffffffff81f540b0 t engine_bp_to_atom ffffffff81f54100 t clock_source_id_to_atom @@ -29344,7 +29333,7 @@ ffffffff81f542f0 t phy_id_to_atom ffffffff81f54330 t disp_power_gating_action_to_atom ffffffff81f543a0 t dc_clock_type_to_atom ffffffff81f54420 t transmitter_color_depth_to_atom -ffffffff81f55000 T dal_cmd_tbl_helper_dce80_get_table +ffffffff81f55000 T dal_cmd_tbl_helper_dce112_get_table ffffffff81f55030 t encoder_action_to_atom ffffffff81f550b0 t engine_bp_to_atom ffffffff81f55100 t clock_source_id_to_atom @@ -29352,25437 +29341,25449 @@ ffffffff81f551d0 t clock_source_id_to_atom_phy_clk_src ffffffff81f55220 t signal_type_to_atom_dig_mode ffffffff81f55280 t hpd_sel_to_atom ffffffff81f552c0 t dig_encoder_sel_to_atom -ffffffff81f55310 t phy_id_to_atom -ffffffff81f55350 t disp_power_gating_action_to_atom -ffffffff81f56000 T clk_mgr_helper_get_active_display_cnt -ffffffff81f560e0 T clk_mgr_helper_get_active_plane_cnt -ffffffff81f56190 T clk_mgr_exit_optimized_pwr_state -ffffffff81f56290 T clk_mgr_optimize_pwr_state -ffffffff81f563a0 T dc_clk_mgr_create -ffffffff81f56a80 T dc_destroy_clk_mgr -ffffffff81f57000 T dentist_get_divider_from_did -ffffffff81f57070 T dce_adjust_dp_ref_freq_for_ss -ffffffff81f57180 T dce_get_dp_ref_freq_khz -ffffffff81f572b0 T dce12_get_dp_ref_freq_khz -ffffffff81f572d0 T dce_get_max_pixel_clock_for_all_paths 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rv1_vbios_smu_send_msg_with_param -ffffffff81f5c200 T rv1_vbios_smu_set_dprefclk -ffffffff81f5d000 T rv2_clk_mgr_construct -ffffffff81f5e000 T dentist_get_did_from_divider -ffffffff81f5e090 T dcn20_update_clocks_update_dpp_dto -ffffffff81f5e160 T dcn20_update_clocks_update_dentist -ffffffff81f5e680 T dcn2_update_clocks -ffffffff81f5ebf0 T dcn2_read_clocks_from_hw_dentist -ffffffff81f5ecc0 T dcn2_update_clocks_fpga -ffffffff81f5ee40 T dcn2_init_clocks -ffffffff81f5eee0 T dcn2_get_clock -ffffffff81f5ef50 T dcn20_clk_mgr_construct -ffffffff81f5f0a0 t dcn2_enable_pme_wa -ffffffff81f5f0f0 t dcn2_are_clock_states_equal -ffffffff81f5f160 t dcn2_notify_link_rate_change -ffffffff81f60000 t dcn201_update_clocks -ffffffff81f60240 t dcn201_init_clocks -ffffffff81f602e0 T dcn201_clk_mgr_construct -ffffffff81f61000 T rn_clk_mgr_construct -ffffffff81f618e0 t rn_update_clocks -ffffffff81f61e80 t rn_set_low_power_state -ffffffff81f62050 t rn_init_clocks -ffffffff81f620f0 t rn_enable_pme_wa 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dcn30_smu_get_dpm_freq_by_index -ffffffff81f66400 T dcn30_smu_get_dc_mode_max_dpm_freq -ffffffff81f66450 T dcn30_smu_set_min_deep_sleep_dcef_clk -ffffffff81f66470 T dcn30_smu_set_num_of_displays -ffffffff81f66490 T dcn30_smu_set_display_refresh_from_mall -ffffffff81f664c0 T dcn30_smu_set_external_client_df_cstate_allow -ffffffff81f664e0 T dcn30_smu_set_pme_workaround -ffffffff81f67000 T dcn301_smu_get_smu_version -ffffffff81f67070 t dcn301_smu_send_msg_with_param -ffffffff81f671f0 T dcn301_smu_set_dispclk -ffffffff81f67290 T dcn301_smu_set_dprefclk -ffffffff81f67340 T dcn301_smu_set_hard_min_dcfclk -ffffffff81f673e0 T dcn301_smu_set_min_deep_sleep_dcfclk -ffffffff81f67480 T dcn301_smu_set_dppclk -ffffffff81f67520 T dcn301_smu_set_display_idle_optimization -ffffffff81f67570 T dcn301_smu_enable_phy_refclk_pwrdwn -ffffffff81f675c0 T dcn301_smu_enable_pme_wa -ffffffff81f675e0 T dcn301_smu_set_dram_addr_high -ffffffff81f67630 T dcn301_smu_set_dram_addr_low -ffffffff81f67680 T dcn301_smu_transfer_dpm_table_smu_2_dram -ffffffff81f676a0 T dcn301_smu_transfer_wm_table_dram_2_smu -ffffffff81f68000 T vg_clk_mgr_construct -ffffffff81f687f0 T vg_clk_mgr_destroy -ffffffff81f68840 t vg_update_clocks -ffffffff81f68bd0 t vg_init_clocks -ffffffff81f68c70 t vg_enable_pme_wa -ffffffff81f68c80 t vg_are_clock_states_equal -ffffffff81f68cd0 t vg_notify_wm_ranges -ffffffff81f6a000 T dcn31_update_clocks -ffffffff81f6a620 T dcn31_init_clocks -ffffffff81f6a6d0 T dcn31_are_clock_states_equal -ffffffff81f6a730 T dcn31_get_dtb_ref_freq_khz -ffffffff81f6a760 T dcn31_clk_mgr_construct -ffffffff81f6add0 T dcn31_clk_mgr_destroy -ffffffff81f6ae20 t dcn31_set_low_power_state -ffffffff81f6b000 t dcn31_enable_pme_wa -ffffffff81f6b010 t dcn31_notify_wm_ranges -ffffffff81f6b3b0 t find_clk_for_voltage -ffffffff81f6c000 T dcn31_smu_get_smu_version -ffffffff81f6c020 t dcn31_smu_send_msg_with_param -ffffffff81f6c220 T dcn31_smu_set_dispclk -ffffffff81f6c290 T dcn31_smu_set_dprefclk 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dcn314_smu_set_dispclk -ffffffff81f6f2b0 T dcn314_smu_set_dprefclk -ffffffff81f6f320 T dcn314_smu_set_hard_min_dcfclk -ffffffff81f6f3a0 T dcn314_smu_set_min_deep_sleep_dcfclk -ffffffff81f6f420 T dcn314_smu_set_dppclk -ffffffff81f6f490 T dcn314_smu_set_display_idle_optimization -ffffffff81f6f4e0 T dcn314_smu_enable_phy_refclk_pwrdwn -ffffffff81f6f530 T dcn314_smu_enable_pme_wa -ffffffff81f6f570 T dcn314_smu_set_dram_addr_high -ffffffff81f6f5b0 T dcn314_smu_set_dram_addr_low -ffffffff81f6f5f0 T dcn314_smu_transfer_dpm_table_smu_2_dram -ffffffff81f6f630 T dcn314_smu_transfer_wm_table_dram_2_smu -ffffffff81f6f670 T dcn314_smu_set_zstate_support -ffffffff81f6f6c0 T dcn314_smu_set_dtbclk -ffffffff81f70000 T dcn315_clk_mgr_construct -ffffffff81f709c0 T dcn315_clk_mgr_destroy -ffffffff81f70a10 t dcn315_update_clocks -ffffffff81f71000 t dcn315_enable_pme_wa -ffffffff81f71010 t dcn315_notify_wm_ranges -ffffffff81f72000 T dcn315_smu_get_smu_version -ffffffff81f72020 t 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dcn314_smu_set_display_idle_optimization +ffffffff81f704e0 T dcn314_smu_enable_phy_refclk_pwrdwn +ffffffff81f70530 T dcn314_smu_enable_pme_wa +ffffffff81f70570 T dcn314_smu_set_dram_addr_high +ffffffff81f705b0 T dcn314_smu_set_dram_addr_low +ffffffff81f705f0 T dcn314_smu_transfer_dpm_table_smu_2_dram +ffffffff81f70630 T dcn314_smu_transfer_wm_table_dram_2_smu +ffffffff81f70670 T dcn314_smu_set_zstate_support +ffffffff81f706c0 T dcn314_smu_set_dtbclk +ffffffff81f71000 T dcn315_clk_mgr_construct +ffffffff81f719c0 T dcn315_clk_mgr_destroy +ffffffff81f71a10 t dcn315_update_clocks +ffffffff81f72000 t dcn315_enable_pme_wa +ffffffff81f72010 t dcn315_notify_wm_ranges +ffffffff81f73000 T dcn315_smu_get_smu_version +ffffffff81f73020 t dcn315_smu_send_msg_with_param +ffffffff81f731b0 T dcn315_smu_set_dispclk +ffffffff81f73220 T dcn315_smu_set_hard_min_dcfclk +ffffffff81f732a0 T dcn315_smu_set_min_deep_sleep_dcfclk +ffffffff81f73320 T dcn315_smu_set_dppclk +ffffffff81f73390 T dcn315_smu_set_display_idle_optimization +ffffffff81f733e0 T dcn315_smu_enable_phy_refclk_pwrdwn +ffffffff81f73430 T dcn315_smu_enable_pme_wa +ffffffff81f73470 T dcn315_smu_set_dram_addr_high +ffffffff81f734b0 T dcn315_smu_set_dram_addr_low +ffffffff81f734f0 T dcn315_smu_transfer_dpm_table_smu_2_dram +ffffffff81f73530 T dcn315_smu_transfer_wm_table_dram_2_smu +ffffffff81f73570 T dcn315_smu_get_dpref_clk +ffffffff81f735d0 T dcn315_smu_get_dtbclk +ffffffff81f73630 T dcn315_smu_set_dtbclk +ffffffff81f74000 T dcn316_clk_mgr_construct +ffffffff81f746a0 T dcn316_clk_mgr_destroy +ffffffff81f746f0 t dcn316_update_clocks +ffffffff81f74d20 t dcn316_enable_pme_wa +ffffffff81f74d30 t dcn316_notify_wm_ranges +ffffffff81f750c0 t find_clk_for_voltage +ffffffff81f76000 T dcn316_smu_get_smu_version +ffffffff81f76020 t dcn316_smu_send_msg_with_param +ffffffff81f761b0 T dcn316_smu_set_dispclk +ffffffff81f76220 T dcn316_smu_set_hard_min_dcfclk +ffffffff81f762a0 T dcn316_smu_set_min_deep_sleep_dcfclk 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dc_commit_updates_for_stream +ffffffff81f81fc0 t copy_surface_update_to_plane +ffffffff81f823c0 t copy_stream_update_to_stream +ffffffff81f829f0 T dc_get_current_stream_count +ffffffff81f82a30 T dc_get_stream_at_index +ffffffff81f82a80 T dc_interrupt_to_irq_source +ffffffff81f82aa0 T dc_interrupt_set +ffffffff81f82af0 T dc_interrupt_ack +ffffffff81f82b10 T dc_power_down_on_boot +ffffffff81f82b60 T dc_set_power_state +ffffffff81f82d50 T dc_resume +ffffffff81f82dc0 T dc_is_dmcu_initialized +ffffffff81f82e10 T dc_is_oem_i2c_device_present +ffffffff81f82e60 T dc_submit_i2c +ffffffff81f82e90 T dc_submit_i2c_oem +ffffffff81f82ee0 T dc_link_add_remote_sink +ffffffff81f83070 T dc_link_remove_remote_sink +ffffffff81f83160 T get_clock_requirements_for_state +ffffffff81f831e0 T dc_set_clock +ffffffff81f83220 T dc_get_clock +ffffffff81f83260 T dc_set_psr_allow_active +ffffffff81f83360 T dc_allow_idle_optimizations +ffffffff81f83400 T dc_unlock_memory_clock_frequency +ffffffff81f83470 T dc_lock_memory_clock_frequency +ffffffff81f83500 T dc_enable_dcmode_clk_limit +ffffffff81f83610 t blank_and_force_memclk +ffffffff81f837f0 T dc_is_plane_eligible_for_idle_optimizations +ffffffff81f83840 T dc_hardware_release +ffffffff81f83890 T dc_mclk_switch_using_fw_based_vblank_stretch_shut_down +ffffffff81f838d0 T dc_is_dmub_outbox_supported +ffffffff81f83930 T dc_enable_dmub_notifications +ffffffff81f83990 T dc_enable_dmub_outbox +ffffffff81f839d0 T dc_process_dmub_aux_transfer_async +ffffffff81f83b70 T get_link_index_from_dpia_port_index +ffffffff81f83c20 T dc_process_dmub_set_config_async +ffffffff81f83d10 T dc_process_dmub_set_mst_slots +ffffffff81f83e00 T dc_process_dmub_dpia_hpd_int_enable +ffffffff81f83ed0 T dc_disable_accelerated_mode +ffffffff81f83ef0 T dc_notify_vsync_int_state +ffffffff81f84120 T dc_extended_blank_supported +ffffffff81f85000 T pre_surface_trace +ffffffff81f85030 T update_surface_trace +ffffffff81f85060 T post_surface_trace +ffffffff81f85090 T context_timing_trace +ffffffff81f85240 T context_clock_trace +ffffffff81f85270 T dc_status_to_str +ffffffff81f86000 T find_color_matrix +ffffffff81f860b0 T color_space_to_black_color +ffffffff81f86140 T hwss_wait_for_blank_complete +ffffffff81f861f0 T get_mpctree_visual_confirm_color +ffffffff81f86250 T get_surface_visual_confirm_color +ffffffff81f86300 T get_hdr_visual_confirm_color +ffffffff81f863b0 T get_subvp_visual_confirm_color +ffffffff81f864a0 T get_surface_tile_visual_confirm_color +ffffffff81f87000 T get_hpd_gpio +ffffffff81f870e0 T dc_link_wait_for_t12 +ffffffff81f87140 T dc_link_detect_sink +ffffffff81f872f0 T dc_link_is_dp_sink_present +ffffffff81f87570 T reset_cur_dp_mst_topology +ffffffff81f875d0 T dc_link_detect +ffffffff81f88940 T dc_link_get_hpd_state +ffffffff81f889b0 T link_create +ffffffff81f89ad0 T link_destroy +ffffffff81f89c30 T dc_link_blank_all_dp_displays +ffffffff81f89d00 T dc_link_blank_dp_stream +ffffffff81f89e10 T dc_link_blank_all_edp_displays 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dp_decide_128b_132b_lttpr_mode +ffffffff81f9bbd0 T dp_get_lttpr_mode_override +ffffffff81f9bca0 T dp_overwrite_extended_receiver_cap +ffffffff81f9bdb0 t get_active_converter_info +ffffffff81f9c220 T detect_dp_sink_caps +ffffffff81f9c230 t retrieve_link_cap +ffffffff81f9d3d0 T detect_edp_sink_caps +ffffffff81f9d690 T dc_link_set_default_brightness_aux +ffffffff81f9d790 T dc_link_dp_enable_hpd +ffffffff81f9d7e0 T dc_link_dp_disable_hpd +ffffffff81f9d830 T dc_link_dp_set_test_pattern +ffffffff81f9e230 t set_crtc_test_pattern +ffffffff81f9e6c0 T dp_enable_mst_on_sink +ffffffff81f9e740 T dp_set_fec_enable +ffffffff81f9e850 T dpcd_set_source_specific_data +ffffffff81f9e990 T dpcd_write_cable_id_to_dprx +ffffffff81f9ea00 T dc_link_set_backlight_level_nits +ffffffff81f9eab0 T dc_link_get_backlight_level_nits +ffffffff81f9eb50 T dc_link_backlight_enable_aux +ffffffff81f9ebc0 T dc_link_read_default_bl_aux +ffffffff81f9ec20 T is_edp_ilr_optimization_required +ffffffff81f9ee90 T dc_link_dp_mst_decide_link_encoding_format +ffffffff81f9ef10 T dpcd_write_128b_132b_sst_payload_allocation_table +ffffffff81f9f200 T calculate_sst_avg_time_slots_per_mtp +ffffffff81f9f260 T dpcd_poll_for_allocation_change_trigger +ffffffff81f9f610 T is_dp_128b_132b_signal +ffffffff81f9f6e0 T edp_panel_backlight_power_on +ffffffff81f9f790 T dc_link_clear_dprx_states +ffffffff81f9f7c0 T dp_receiver_power_ctrl +ffffffff81f9f810 T dp_source_sequence_trace +ffffffff81f9f870 T edp_add_delay_for_T9 +ffffffff81f9f8c0 T edp_receiver_ready_T9 +ffffffff81f9f990 T edp_receiver_ready_T7 +ffffffff81f9fb30 T dp_disable_link_phy_mst +ffffffff81f9fc40 T dp_retrain_link_dp_test +ffffffff81f9fe60 T dp_set_dsc_on_rx +ffffffff81f9fed0 T dp_set_dsc_on_stream +ffffffff81fa04a0 T dp_set_dsc_enable +ffffffff81fa0550 T dp_set_dsc_pps_sdp +ffffffff81fa09f0 T dp_update_dsc_config +ffffffff81fa0a60 t dpcd_set_lt_pattern_and_lane_settings +ffffffff81fa1000 T core_link_read_dpcd +ffffffff81fa11a0 T core_link_write_dpcd +ffffffff81fa2000 T dpcd_get_tunneling_device_data +ffffffff81fa20d0 T dc_link_dpia_query_hpd_status +ffffffff81fa21f0 T dc_link_dpia_perform_link_training +ffffffff81fa3010 t dpia_training_end +ffffffff81fa4000 T link_enc_cfg_init +ffffffff81fa41b0 T link_enc_cfg_copy +ffffffff81fa41e0 T link_enc_cfg_link_encs_assign +ffffffff81fa5260 t add_link_enc_assignment +ffffffff81fa53a0 T link_enc_cfg_validate +ffffffff81fa5b10 T link_enc_cfg_link_enc_unassign +ffffffff81fa5dc0 T link_enc_cfg_is_transmitter_mappable +ffffffff81fa5ee0 T link_enc_cfg_get_stream_using_link_enc +ffffffff81fa5fe0 T link_enc_cfg_get_link_using_link_enc +ffffffff81fa60f0 T link_enc_cfg_get_link_enc_used_by_link +ffffffff81fa6280 T link_enc_cfg_get_next_avail_link_enc +ffffffff81fa6400 T link_enc_cfg_get_link_enc_used_by_stream +ffffffff81fa6420 T link_enc_cfg_get_link_enc +ffffffff81fa64b0 T link_enc_cfg_get_link_enc_used_by_stream_current +ffffffff81fa65e0 T link_enc_cfg_is_link_enc_avail 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dc_dmub_srv_wait_idle +ffffffff81fb4290 T dc_dmub_srv_log_diagnostic_data +ffffffff81fb45e0 T dc_dmub_srv_clear_inbox0_ack +ffffffff81fb4640 T dc_dmub_srv_wait_for_inbox0_ack +ffffffff81fb46a0 T dc_dmub_srv_send_inbox0_cmd +ffffffff81fb4700 T dc_dmub_srv_cmd_with_reply_data +ffffffff81fb4780 T dc_dmub_srv_wait_phy_init +ffffffff81fb4840 T dc_dmub_srv_notify_stream_mask +ffffffff81fb48a0 T dc_dmub_srv_is_restore_required +ffffffff81fb4920 T dc_dmub_srv_get_dmub_outbox0_msg +ffffffff81fb4950 T dc_dmub_trace_event_control +ffffffff81fb4970 T dc_dmub_srv_drr_update_cmd +ffffffff81fb4a70 T dc_dmub_srv_set_drr_manual_trigger_cmd +ffffffff81fb4b80 T dc_dmub_srv_p_state_delegate +ffffffff81fb4ed0 T dc_dmub_srv_query_caps_cmd +ffffffff81fb4fc0 T dc_dmub_srv_get_visual_confirm_color_cmd +ffffffff81fb5190 T dc_dmub_setup_subvp_dmub_command +ffffffff81fb5af0 T dc_dmub_srv_get_diagnostic_data +ffffffff81fb5b30 T dc_send_update_cursor_info_to_dmu +ffffffff81fb6000 T dc_edid_parser_send_cea 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dce_aux_transfer_with_retries +ffffffff81fbe000 T look_up_in_video_optimized_rate_tlb +ffffffff81fbe070 T dce110_clk_src_construct +ffffffff81fbe280 t calc_pll_max_vco_construct +ffffffff81fbe420 T dce112_clk_src_construct +ffffffff81fbe4b0 T dcn20_clk_src_construct +ffffffff81fbe550 T dcn3_clk_src_construct +ffffffff81fbe5f0 T dcn31_clk_src_construct +ffffffff81fbe690 T dcn301_clk_src_construct +ffffffff81fbe730 t dce110_clock_source_power_down +ffffffff81fbe7c0 t dce110_program_pix_clk +ffffffff81fbee50 t dce110_get_pix_clk_dividers +ffffffff81fbf4a0 t get_pixel_clk_frequency_100hz +ffffffff81fbf5b0 t get_ss_info_from_atombios +ffffffff81fbf870 t dce112_program_pix_clk +ffffffff81fbfb00 t dce112_get_pix_clk_dividers +ffffffff81fbfc10 t dcn20_program_pix_clk +ffffffff81fbfca0 t dcn20_override_dp_pix_clk +ffffffff81fbfd90 t dcn3_program_pix_clk +ffffffff81fbff20 t dcn3_get_pix_clk_dividers +ffffffff81fbfff0 t dcn31_program_pix_clk +ffffffff81fc1000 T dce_dmcu_create +ffffffff81fc10c0 T dcn10_dmcu_create +ffffffff81fc1180 T dcn20_dmcu_create +ffffffff81fc1240 T dcn21_dmcu_create +ffffffff81fc1340 T dce_dmcu_destroy +ffffffff81fc1390 t dce_dmcu_init +ffffffff81fc13c0 t dce_dmcu_load_iram +ffffffff81fc1520 t dce_dmcu_set_psr_enable +ffffffff81fc1660 t dce_dmcu_setup_psr +ffffffff81fc1990 t dce_get_dmcu_psr_state +ffffffff81fc1a70 t dce_psr_wait_loop +ffffffff81fc1ba0 t dce_get_psr_wait_loop +ffffffff81fc1bd0 t dce_is_dmcu_initialized +ffffffff81fc1c30 t dcn10_dmcu_init +ffffffff81fc2170 t dcn10_dmcu_load_iram +ffffffff81fc23c0 t dcn10_dmcu_set_psr_enable +ffffffff81fc2550 t dcn10_dmcu_setup_psr +ffffffff81fc2910 t dcn10_get_dmcu_psr_state +ffffffff81fc2a30 t dcn10_psr_wait_loop +ffffffff81fc2b40 t dcn10_get_psr_wait_loop +ffffffff81fc2b70 t dcn10_is_dmcu_initialized +ffffffff81fc2ba0 t dcn10_send_edid_cea +ffffffff81fc2d40 t dcn10_recv_amd_vsdb +ffffffff81fc2df0 t dcn10_recv_edid_cea_ack +ffffffff81fc2e70 t dcn10_get_scp_results +ffffffff81fc2f90 t dcn20_lock_phy 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dce110_link_encoder_enable_lvds_output +ffffffff81fcac80 T dce110_link_encoder_enable_dp_output +ffffffff81fcae00 T dce110_link_encoder_enable_dp_mst_output +ffffffff81fcaf80 T dce110_link_encoder_disable_output +ffffffff81fcb1a0 T dce110_link_encoder_dp_set_lane_settings +ffffffff81fcb340 T dce110_link_encoder_dp_set_phy_pattern +ffffffff81fcbb40 t set_dp_phy_pattern_hbr2_compliance_cp2520_2 +ffffffff81fcbd50 T dce110_link_encoder_update_mst_stream_allocation_table +ffffffff81fcbfd0 T dce110_link_encoder_connect_dig_be_to_fe +ffffffff81fcc100 T dce110_link_encoder_enable_hpd +ffffffff81fcc130 T dce110_link_encoder_disable_hpd +ffffffff81fcc160 T dce110_link_encoder_get_max_link_cap +ffffffff81fcd000 T dce_mem_input_construct +ffffffff81fcd060 T dce112_mem_input_construct +ffffffff81fcd0c0 T dce120_mem_input_construct +ffffffff81fcd120 t dce_mi_program_display_marks +ffffffff81fcd3f0 t dce_mi_allocate_dmif +ffffffff81fcd630 t dce_mi_free_dmif +ffffffff81fcd790 t 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dce110_opp_set_csc_adjustment +ffffffff81fd73c0 t program_color_matrix +ffffffff81fd75f0 T dce110_opp_set_csc_default +ffffffff81fd7730 T dce110_opp_program_regamma_pwl +ffffffff81fd7ff0 T dce110_opp_power_on_regamma_lut +ffffffff81fd80b0 T dce110_opp_set_regamma_mode +ffffffff81fd8120 T dce_transform_construct +ffffffff81fd81a0 t dce_transform_reset +ffffffff81fd81e0 t dce_transform_set_scaler +ffffffff81fd8c80 t dce_transform_set_pixel_storage_depth +ffffffff81fd9140 t dce_transform_set_gamut_remap +ffffffff81fd9480 t program_multi_taps_filter +ffffffff81fda000 T dmub_abm_create +ffffffff81fda0c0 T dmub_abm_destroy +ffffffff81fda110 t dmub_abm_init +ffffffff81fda4f0 t dmub_abm_set_level +ffffffff81fda6b0 t dmub_abm_get_current_backlight +ffffffff81fda6e0 t dmub_abm_get_target_backlight +ffffffff81fda710 t dmub_abm_init_config +ffffffff81fda840 t dmub_abm_set_pause +ffffffff81fdb000 T dmub_hw_lock_mgr_cmd +ffffffff81fdb0b0 T dmub_hw_lock_mgr_inbox0_cmd +ffffffff81fdb0f0 T should_use_dmub_lock +ffffffff81fdc000 T dmub_enable_outbox_notification +ffffffff81fdd000 T dmub_psr_create +ffffffff81fdd0a0 T dmub_psr_destroy +ffffffff81fdd0f0 t dmub_psr_copy_settings +ffffffff81fdd5a0 t dmub_psr_enable +ffffffff81fdd730 t dmub_psr_get_state +ffffffff81fdda20 t dmub_psr_set_level +ffffffff81fddb10 t dmub_psr_force_static +ffffffff81fddbc0 t dmub_psr_get_residency +ffffffff81fddc10 t dmub_psr_set_sink_vtotal_in_psr_active +ffffffff81fddcd0 t dmub_psr_set_power_opt +ffffffff81fde000 T dce100_enable_display_power_gating +ffffffff81fde0a0 T dce100_prepare_bandwidth +ffffffff81fde0f0 T dce100_optimize_bandwidth +ffffffff81fde140 T dce100_hw_sequencer_construct +ffffffff81fdf000 T dce100_add_stream_to_ctx +ffffffff81fdf0a0 T dce100_validate_plane +ffffffff81fdf0e0 T dce100_find_first_free_match_stream_enc_for_link +ffffffff81fdf190 T dce100_create_resource_pool +ffffffff81fdff40 t dce100_resource_destruct +ffffffff81fe0210 t dce100_destroy_resource_pool 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dcn10_setup_vupdate_interrupt +ffffffff8201a450 T dcn10_unblank_stream +ffffffff8201a560 T dcn10_send_immediate_sdp_message +ffffffff8201a5c0 T dcn10_set_clock +ffffffff8201a6d0 T dcn10_get_clock +ffffffff8201a730 T dcn10_get_dcc_en_bits +ffffffff8201b000 T snprintf_count +ffffffff8201b090 T dcn10_clear_status_bits +ffffffff8201b240 T dcn10_get_hw_state +ffffffff8201d000 T dcn10_hw_sequencer_construct +ffffffff8201e000 T dcn10_ipp_construct +ffffffff8201e050 T dcn20_ipp_construct +ffffffff8201e0a0 t dcn10_ipp_destroy +ffffffff8201f000 T dcn10_link_encoder_set_dp_phy_pattern_training_pattern +ffffffff8201f0b0 T dcn10_get_dig_frontend +ffffffff8201f170 T enc1_configure_encoder +ffffffff8201f1f0 T dcn10_psr_program_dp_dphy_fast_training +ffffffff8201f270 T dcn10_psr_program_secondary_packet +ffffffff8201f2f0 T dcn10_is_dig_enabled +ffffffff8201f350 T dcn10_link_encoder_validate_dvi_output +ffffffff8201f400 T dcn10_link_encoder_validate_dp_output +ffffffff8201f440 T dcn10_link_encoder_construct +ffffffff8201f630 T dcn10_link_encoder_validate_output_with_stream +ffffffff8201f820 T dcn10_link_encoder_hw_init +ffffffff8201fa20 T dcn10_aux_initialize +ffffffff8201fab0 T dcn10_link_encoder_destroy +ffffffff8201fb00 T dcn10_link_encoder_setup +ffffffff8201fc50 T dcn10_link_encoder_enable_tmds_output +ffffffff8201fd40 T dcn10_link_encoder_enable_tmds_output_with_clk_pattern_wa +ffffffff8201fe60 T dcn10_link_encoder_enable_dp_output +ffffffff8201ffe0 T dcn10_link_encoder_enable_dp_mst_output +ffffffff82020160 T dcn10_link_encoder_disable_output +ffffffff82020340 T dcn10_link_encoder_dp_set_lane_settings +ffffffff820204e0 T dcn10_link_encoder_dp_set_phy_pattern +ffffffff82020c00 t set_dp_phy_pattern_hbr2_compliance_cp2520_2 +ffffffff82020e00 T dcn10_link_encoder_update_mst_stream_allocation_table +ffffffff820210e0 T dcn10_link_encoder_connect_dig_be_to_fe +ffffffff82021220 T dcn10_link_encoder_enable_hpd +ffffffff82021260 T dcn10_link_encoder_disable_hpd +ffffffff820212a0 T dcn10_get_dig_mode +ffffffff82021310 T dcn10_link_encoder_get_max_link_cap +ffffffff82021390 t program_pattern_symbols +ffffffff82022000 T mpc1_set_bg_color +ffffffff820221e0 T mpc1_get_mpcc +ffffffff82022270 T mpc1_update_stereo_mix +ffffffff820223a0 T mpc1_assert_idle_mpcc +ffffffff82022470 T mpc1_get_mpcc_for_dpp +ffffffff82022520 T mpc1_is_mpcc_idle +ffffffff82022610 T mpc1_assert_mpcc_idle_before_connect +ffffffff82022750 T mpc1_insert_plane +ffffffff82022ca0 T mpc1_remove_mpcc +ffffffff82023060 T mpc1_mpc_init +ffffffff82023380 T mpc1_mpc_init_single_inst +ffffffff82023570 T mpc1_init_mpcc_list_from_hw +ffffffff82023840 T mpc1_read_mpcc_state +ffffffff820239d0 T mpc1_cursor_lock +ffffffff82023a50 T mpc1_get_mpc_out_mux +ffffffff82023ad0 T dcn10_mpc_construct +ffffffff82023c50 t mpc1_update_blending +ffffffff82024000 T opp1_program_bit_depth_reduction +ffffffff82024400 T opp1_set_dyn_expansion +ffffffff82024570 T opp1_program_fmt +ffffffff82024870 T opp1_program_stereo +ffffffff820249a0 T opp1_pipe_clock_control +ffffffff820249e0 T opp1_destroy +ffffffff82024a30 T dcn10_opp_construct +ffffffff82025000 T optc1_program_global_sync +ffffffff82025150 T optc1_setup_vertical_interrupt0 +ffffffff820251e0 T optc1_setup_vertical_interrupt1 +ffffffff82025250 T optc1_setup_vertical_interrupt2 +ffffffff820252c0 T optc1_program_timing +ffffffff82025970 T optc1_is_two_pixels_per_containter +ffffffff820259c0 T optc1_set_vtg_params +ffffffff82025b00 T optc1_set_blank_data_double_buffer +ffffffff82025b40 T optc1_set_timing_double_buffer +ffffffff82025b80 T optc1_set_blank +ffffffff82025c60 T optc1_is_blanked +ffffffff82025ce0 T optc1_enable_optc_clock +ffffffff82025f00 T optc1_disable_crtc +ffffffff82025ff0 T optc1_program_blank_color +ffffffff820260a0 T optc1_validate_timing +ffffffff820261a0 T optc1_get_vblank_counter +ffffffff82026200 T optc1_lock +ffffffff820262f0 T optc1_unlock +ffffffff82026360 T optc1_get_position +ffffffff820263e0 T optc1_is_counter_moving +ffffffff82026460 T optc1_did_triggered_reset_occur +ffffffff82026500 T optc1_disable_reset_trigger +ffffffff820265c0 T optc1_enable_reset_trigger +ffffffff820266d0 T optc1_enable_crtc_reset +ffffffff82026830 T optc1_wait_for_state +ffffffff82026900 T optc1_set_early_control +ffffffff82026930 T optc1_set_static_screen_control +ffffffff820269d0 T optc1_set_drr +ffffffff82026c00 T optc1_set_vtotal_min_max +ffffffff82026ca0 T optc1_get_crtc_scanoutpos +ffffffff82026db0 T optc1_program_stereo +ffffffff82026fb0 T optc1_is_stereo_left_eye +ffffffff82027020 T optc1_get_hw_timing +ffffffff82027140 T optc1_read_otg_state +ffffffff82027450 T optc1_get_otg_active_size +ffffffff82027560 T optc1_clear_optc_underflow +ffffffff820275b0 T optc1_tg_init +ffffffff82027660 T optc1_is_tg_enabled +ffffffff820276d0 T optc1_is_optc_underflow_occurred +ffffffff82027740 T optc1_configure_crc +ffffffff820279d0 T optc1_get_crc +ffffffff82027ae0 T dcn10_timing_generator_init +ffffffff82027b50 t optc1_enable_crtc +ffffffff82027c50 t optc1_set_test_pattern +ffffffff82028330 t optc1_program_manual_trigger +ffffffff820283e0 t optc1_setup_manual_trigger +ffffffff82029000 T dcn10_find_first_free_match_stream_enc_for_link +ffffffff820290b0 T dcn10_create_resource_pool +ffffffff8202a260 t dcn10_resource_construct_fp +ffffffff8202a3e0 t dcn10_resource_destruct +ffffffff8202a6f0 t dcn10_destroy_resource_pool +ffffffff8202a750 t dcn10_panel_cntl_create +ffffffff8202a7e0 t dcn10_link_encoder_create +ffffffff8202a8e0 t dcn10_validate_bandwidth +ffffffff8202a960 t dcn10_validate_global +ffffffff8202ab40 t dcn10_acquire_idle_pipe_for_layer +ffffffff8202ac80 t dcn10_validate_plane +ffffffff8202acd0 t dcn10_add_stream_to_ctx +ffffffff8202ae90 t dcn10_patch_unknown_plane_state +ffffffff8202aef0 t read_dce_straps +ffffffff8202af20 t create_audio +ffffffff8202af50 t dcn10_stream_encoder_create +ffffffff8202aff0 t dcn10_hwseq_create +ffffffff8202b0a0 t dcn10_get_dcc_compression_cap +ffffffff8202c000 T enc1_update_generic_info_packet +ffffffff8202c430 T enc1_stream_encoder_dp_set_stream_attribute +ffffffff8202c900 T enc1_stream_encoder_set_stream_attribute_helper +ffffffff8202c980 T enc1_stream_encoder_hdmi_set_stream_attribute +ffffffff8202cf70 T enc1_stream_encoder_dvi_set_stream_attribute +ffffffff8202d100 T enc1_stream_encoder_set_throttled_vcp_size +ffffffff8202d320 T enc1_stream_encoder_update_dp_info_packets +ffffffff8202d4c0 T enc1_stream_encoder_send_immediate_sdp_message +ffffffff8202d8d0 T enc1_stream_encoder_stop_dp_info_packets +ffffffff8202daa0 T enc1_stream_encoder_dp_blank +ffffffff8202dc10 T enc1_stream_encoder_dp_unblank +ffffffff8202de20 T enc1_stream_encoder_set_avmute +ffffffff8202de60 T enc1_reset_hdmi_stream_attribute +ffffffff8202df30 T get_audio_clock_info +ffffffff8202e020 T enc1_se_enable_audio_clock +ffffffff8202e080 T enc1_se_enable_dp_audio +ffffffff8202e150 T enc1_se_audio_mute_control +ffffffff8202e1a0 T enc1_se_dp_audio_setup +ffffffff8202e1b0 t enc1_se_audio_setup +ffffffff8202e340 T enc1_se_dp_audio_enable +ffffffff8202e590 T enc1_se_dp_audio_disable +ffffffff8202e700 T enc1_se_hdmi_audio_setup +ffffffff8202ebd0 T enc1_se_hdmi_audio_disable +ffffffff8202ec60 T enc1_setup_stereo_sync +ffffffff8202ece0 T enc1_dig_connect_to_otg +ffffffff8202ed20 T enc1_dig_source_otg +ffffffff8202ed90 T enc1_stream_encoder_dp_get_pixel_format +ffffffff8202ee80 T dcn10_stream_encoder_construct +ffffffff8202eee0 t enc1_stream_encoder_update_hdmi_info_packets +ffffffff8202f290 t enc1_stream_encoder_stop_hdmi_info_packets +ffffffff82030000 T dccg2_update_dpp_dto +ffffffff82030160 T dccg2_get_dccg_ref_freq +ffffffff82030220 T dccg2_set_fifo_errdet_ovr_en +ffffffff82030260 T dccg2_otg_add_pixel +ffffffff82030300 T dccg2_otg_drop_pixel +ffffffff820303a0 T dccg2_init +ffffffff820303d0 T dccg2_create +ffffffff82030480 T dcn_dccg_destroy +ffffffff82031000 T dpp20_read_state +ffffffff820311d0 T dpp2_power_on_obuf +ffffffff820312a0 T dpp2_dummy_program_input_lut +ffffffff820312d0 T dscl2_calc_lb_num_partitions +ffffffff820313f0 T dpp2_cnv_set_alpha_keyer +ffffffff82031670 T dpp2_set_cursor_attributes +ffffffff820317d0 T oppn20_dummy_program_regamma_pwl +ffffffff82031800 T dpp2_construct +ffffffff82031880 t dpp2_cnv_setup +ffffffff82033000 T dpp2_set_degamma_pwl +ffffffff820333b0 T dpp2_set_degamma +ffffffff82033560 T dpp2_cm_set_gamut_remap +ffffffff82033790 T dpp2_program_input_csc +ffffffff820339c0 T dpp20_program_blnd_lut +ffffffff82034110 T dpp20_program_shaper +ffffffff820360a0 T dpp20_program_3dlut +ffffffff820367a0 t dpp20_set3dlut_ram12 +ffffffff82036970 T dpp2_set_hdr_multiplier +ffffffff82037000 t dsc2_get_enc_caps +ffffffff82037080 t dsc2_read_state +ffffffff82037230 t dsc2_validate_stream +ffffffff82037290 t dsc2_set_config +ffffffff82038620 t dsc2_get_packed_pps +ffffffff820387c0 t dsc2_enable +ffffffff82038970 t dsc2_disable +ffffffff82038af0 t dsc2_disconnect +ffffffff82038b60 T dsc2_construct +ffffffff82038bb0 t dsc_prepare_config +ffffffff82039270 t dsc_log_pps +ffffffff8203a000 T dwb2_config_dwb_cnv +ffffffff8203a1f0 T dwb2_disable +ffffffff8203a300 T dwb2_is_enabled +ffffffff8203a3a0 T dwb2_set_stereo +ffffffff8203a490 T dwb2_set_new_content +ffffffff8203a500 T dwb2_set_scaler +ffffffff8203a890 t dwb2_get_caps +ffffffff8203a970 t dwb2_enable +ffffffff8203aad0 t dwb2_update +ffffffff8203ac30 t dwb2_set_warmup +ffffffff8203ada0 T dcn20_dwbc_construct +ffffffff8203b000 T dwb_program_horz_scalar +ffffffff8203b4c0 t wbscl_get_filter_coeffs_16p +ffffffff8203b990 t wbscl_set_scaler_filter +ffffffff8203bba0 T dwb_program_vert_scalar +ffffffff8203d000 T hubbub2_dcc_support_swizzle +ffffffff8203d0c0 T hubbub2_dcc_support_pixel_format +ffffffff8203d110 T hubbub2_get_dcc_compression_cap +ffffffff8203d350 T hubbub2_init_vm_ctx +ffffffff8203d4a0 T hubbub2_init_dchub_sys_ctx +ffffffff8203d6f0 T hubbub2_update_dchub +ffffffff8203d8f0 T hubbub2_wm_read_state +ffffffff8203dc80 T hubbub2_get_dchub_ref_freq +ffffffff8203dd60 T hubbub2_read_state +ffffffff8203deb0 T hubbub2_construct +ffffffff8203df10 t hubbub2_program_watermarks +ffffffff8203f000 T hubp2_set_vm_system_aperture_settings +ffffffff8203f1e0 T hubp2_program_deadline +ffffffff8203f930 T hubp2_vready_at_or_After_vsync +ffffffff8203f9d0 T hubp2_setup_interdependent +ffffffff8203fe40 T hubp2_program_size +ffffffff8203ffd0 T hubp2_program_rotation +ffffffff82040140 T hubp2_dcc_control +ffffffff82040200 T hubp2_program_pixel_format +ffffffff820407d0 T hubp2_program_surface_config +ffffffff82040a10 T hubp2_get_lines_per_chunk +ffffffff82040ad0 T hubp2_cursor_set_attributes +ffffffff82040e90 T hubp2_dmdata_set_attributes +ffffffff82041270 T hubp2_dmdata_load +ffffffff82041300 T hubp2_dmdata_status_done +ffffffff82041370 T hubp2_program_surface_flip_and_addr +ffffffff82041ac0 T hubp2_enable_triplebuffer +ffffffff82041b90 T hubp2_is_triplebuffer_enabled +ffffffff82041c10 T hubp2_set_flip_control_surface_gsl +ffffffff82041c60 T hubp2_is_flip_pending +ffffffff82041d70 T hubp2_set_blank +ffffffff82041dd0 T hubp2_set_blank_regs +ffffffff82041ed0 T hubp2_cursor_set_position +ffffffff820422f0 T hubp2_clk_cntl +ffffffff82042340 T hubp2_vtg_sel +ffffffff82042380 T hubp2_clear_underflow +ffffffff820423d0 T hubp2_read_state_common +ffffffff82042fd0 T hubp2_read_state +ffffffff820432a0 T hubp2_construct +ffffffff82043310 t hubp2_setup +ffffffff820437c0 t hubp2_validate_dml_output +ffffffff82045000 T dcn20_set_flip_control_gsl +ffffffff82045050 T dcn20_enable_power_gating_plane +ffffffff82045410 T dcn20_dccg_init +ffffffff82045490 T dcn20_disable_vga +ffffffff82045550 T dcn20_program_triple_buffer +ffffffff820455a0 T dcn20_init_blank +ffffffff82045790 T dcn20_dsc_pg_control +ffffffff82045ba0 T dcn20_dpp_pg_control +ffffffff82045e50 T dcn20_hubp_pg_control +ffffffff82046100 T dcn20_plane_atomic_disable +ffffffff82046250 t dcn20_setup_gsl_group_as_lock +ffffffff820464d0 T dcn20_disable_plane +ffffffff82046670 T dcn20_disable_pixel_data +ffffffff82046690 T dcn20_blank_pixel_data +ffffffff82046870 T dcn20_enable_stream_timing +ffffffff82046e50 T dcn20_program_output_csc +ffffffff82046f40 T dcn20_set_output_transfer_func +ffffffff820470b0 T dcn20_set_blend_lut +ffffffff82047120 T dcn20_set_shaper_3dlut +ffffffff820471e0 T dcn20_set_input_transfer_func +ffffffff820473a0 T dcn20_update_odm +ffffffff82047490 T dcn20_pipe_control_lock +ffffffff820477d0 T dcn20_program_front_end_for_ctx +ffffffff820483a0 t dcn20_program_pipe +ffffffff82048e40 T dcn20_post_unlock_program_front_end +ffffffff820491d0 T dcn20_prepare_bandwidth +ffffffff82049320 T dcn20_optimize_bandwidth +ffffffff82049500 T dcn20_update_bandwidth +ffffffff820497c0 T dcn20_enable_writeback +ffffffff82049910 T dcn20_disable_writeback +ffffffff820499a0 T dcn20_wait_for_blank_complete +ffffffff82049a30 T dcn20_dmdata_status_done +ffffffff82049a80 T dcn20_disable_stream_gating +ffffffff82049b30 T dcn20_enable_stream_gating +ffffffff82049bd0 T dcn20_set_dmdata_attributes +ffffffff82049c90 T dcn20_init_vm_ctx +ffffffff82049d50 T dcn20_init_sys_ctx +ffffffff82049e00 T dcn20_update_plane_addr +ffffffff82049f40 T dcn20_unblank_stream +ffffffff8204a0c0 T dcn20_setup_vupdate_interrupt +ffffffff8204a130 T dcn20_reset_hw_ctx_wrap +ffffffff8204a4d0 T dcn20_update_visual_confirm_color +ffffffff8204a5e0 T dcn20_update_mpcc +ffffffff8204a860 T dcn20_enable_stream +ffffffff8204aa30 T dcn20_program_dmdata_engine +ffffffff8204aad0 T dcn20_fpga_init_hw +ffffffff8204b0d0 T dcn20_optimize_timing_for_fsft +ffffffff8204b110 T dcn20_set_disp_pattern_generator +ffffffff8204c000 T dcn20_hw_sequencer_construct +ffffffff8204d000 T enc2_fec_set_enable +ffffffff8204d090 T enc2_fec_set_ready +ffffffff8204d0d0 T enc2_fec_is_active +ffffffff8204d140 T link_enc2_read_state +ffffffff8204d1f0 T dcn20_link_encoder_enable_dp_output +ffffffff8204d300 T dcn20_link_encoder_get_max_link_cap +ffffffff8204d3b0 T dcn20_link_encoder_is_in_alt_mode +ffffffff8204d430 T enc2_hw_init +ffffffff8204d510 T dcn20_link_encoder_construct +ffffffff8204e000 T mmhubbub2_config_mcif_irq +ffffffff8204e130 T mmhubbub2_enable_mcif +ffffffff8204e170 T mmhubbub2_disable_mcif +ffffffff8204e1b0 T mcifwb2_dump_frame +ffffffff8204e2c0 t mmhubbub2_config_mcif_buf +ffffffff8204e910 t mmhubbub2_config_mcif_arb +ffffffff8204ed20 T dcn20_mmhubbub_construct +ffffffff8204f000 T mpc2_update_blending +ffffffff8204f2a0 T mpc2_set_denorm +ffffffff8204f310 T mpc2_set_denorm_clamp +ffffffff8204f460 T mpc2_set_output_csc +ffffffff8204f650 T mpc2_set_ocsc_default +ffffffff8204f830 T mpc20_power_on_ogam_lut +ffffffff8204f8b0 T mpc2_set_output_gamma +ffffffff82050070 T mpc2_assert_idle_mpcc +ffffffff82050180 T mpc2_assert_mpcc_idle_before_connect +ffffffff820503d0 t mpc2_get_mpcc_for_dpp +ffffffff82050490 T dcn20_mpc_construct +ffffffff82051000 T opp2_set_disp_pattern_generator +ffffffff82051810 T opp2_dpg_set_blank_color +ffffffff82051990 T opp2_program_dpg_dimensions +ffffffff82051a20 T opp2_dpg_is_blanked +ffffffff82051ae0 T opp2_program_left_edge_extra_pixel +ffffffff82051b30 T dcn20_opp_construct +ffffffff82052000 T optc2_enable_crtc +ffffffff82052100 T optc2_set_gsl +ffffffff820521f0 T optc2_set_gsl_source_select +ffffffff820522b0 T optc2_set_dsc_config +ffffffff82052380 T optc2_get_dsc_status +ffffffff820523c0 T optc2_is_two_pixels_per_containter +ffffffff820523d0 T optc2_set_odm_bypass +ffffffff82052510 T optc2_set_odm_combine +ffffffff82052700 T optc2_get_optc_source +ffffffff820527d0 T optc2_triplebuffer_lock +ffffffff820528f0 T optc2_triplebuffer_unlock +ffffffff820529a0 T optc2_lock_doublebuffer_enable +ffffffff82052b80 T optc2_lock_doublebuffer_disable +ffffffff82052c60 T optc2_setup_manual_trigger +ffffffff82052d80 T optc2_program_manual_trigger +ffffffff82052df0 T optc2_configure_crc +ffffffff82052e80 T optc2_get_last_used_drr_vtotal +ffffffff82052ec0 T dcn20_timing_generator_init +ffffffff82052f30 t optc2_set_dwb_source +ffffffff82052fc0 t optc2_align_vblanks +ffffffff82054000 T dcn20_dpp_destroy +ffffffff82054050 T dcn20_dpp_create +ffffffff82054120 T dcn20_ipp_create +ffffffff820541e0 T dcn20_opp_create +ffffffff820542a0 T dcn20_aux_engine_create +ffffffff82054340 T dcn20_i2c_hw_create +ffffffff820543d0 T dcn20_mpc_create +ffffffff82054460 T dcn20_hubbub_create +ffffffff82054530 T dcn20_timing_generator_create +ffffffff820545d0 T dcn20_link_encoder_create +ffffffff820546d0 T dcn20_stream_encoder_create +ffffffff82054790 T dcn20_hwseq_create +ffffffff82054800 T dcn20_clock_source_destroy +ffffffff82054850 T dcn20_dsc_create +ffffffff82054910 T dcn20_dsc_destroy +ffffffff82054960 T dcn20_hubp_create +ffffffff82054a30 T dcn20_build_mapped_resource +ffffffff82054c50 T dcn20_acquire_dsc +ffffffff82054d90 T dcn20_release_dsc +ffffffff82054e00 T dcn20_add_dsc_to_stream_resource +ffffffff82054f50 T dcn20_add_stream_to_ctx +ffffffff820550e0 T dcn20_remove_stream_from_ctx +ffffffff820551e0 T dcn20_split_stream_for_odm +ffffffff82055690 T dcn20_split_stream_for_mpc +ffffffff82055810 T dcn20_calc_max_scaled_time +ffffffff82055890 T dcn20_set_mcif_arb_params +ffffffff82055a00 T dcn20_validate_dsc +ffffffff82055b90 T dcn20_find_secondary_pipe +ffffffff82055d70 T dcn20_merge_pipes_for_validate +ffffffff82056010 T dcn20_validate_apply_pipe_split_flags +ffffffff82056800 T dcn20_fast_validate_bw +ffffffff82056d10 T dcn20_validate_bandwidth +ffffffff82056d90 T dcn20_acquire_idle_pipe_for_layer +ffffffff82056ea0 T dcn20_get_dcc_compression_cap +ffffffff82056ed0 T dcn20_patch_unknown_plane_state +ffffffff82056f30 T dcn20_dwbc_create +ffffffff82057050 T dcn20_mmhubbub_create +ffffffff820571b0 T dcn20_create_resource_pool +ffffffff82058a00 t dcn20_resource_destruct +ffffffff82058ea0 t dcn20_destroy_resource_pool +ffffffff82058f00 t dcn20_panel_cntl_create +ffffffff82058f90 t read_dce_straps +ffffffff82058fc0 t dcn20_create_audio +ffffffff82059000 T enc2_set_dynamic_metadata +ffffffff82059280 T enc2_stream_encoder_dp_unblank +ffffffff820595b0 T enc2_stream_encoder_dp_set_stream_attribute +ffffffff82059610 T enc2_get_fifo_cal_average_level +ffffffff82059670 T dcn20_stream_encoder_construct +ffffffff820596d0 t enc2_stream_encoder_update_hdmi_info_packets +ffffffff820597a0 t enc2_stream_encoder_stop_hdmi_info_packets +ffffffff82059aa0 t enc2_stream_encoder_update_dp_info_packets +ffffffff82059b50 t enc2_read_state +ffffffff82059cd0 t enc2_dp_set_dsc_config +ffffffff82059da0 t enc2_dp_set_dsc_pps_info_packet +ffffffff8205a270 t enc2_dp_set_odm_combine +ffffffff8205a2b0 t enc2_update_hdmi_info_packet +ffffffff8205b000 T dcn20_vmid_setup +ffffffff8205c000 T dccg201_create +ffffffff8205c0b0 t dccg201_update_dpp_dto +ffffffff8205d000 T dpp201_construct +ffffffff8205d080 t dpp201_get_optimal_number_of_taps +ffffffff8205d460 t dpp201_cnv_setup +ffffffff8205e000 T hubbub201_construct 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dcn201_timing_generator_init +ffffffff82066080 t optc201_validate_timing +ffffffff82066180 t optc201_triplebuffer_unlock +ffffffff82066230 t optc201_triplebuffer_lock +ffffffff82066350 t optc201_get_optc_source +ffffffff82067000 T dcn201_create_resource_pool +ffffffff82067a40 t dcn201_resource_destruct +ffffffff82067d30 t dcn201_destroy_resource_pool +ffffffff82067d90 t dcn201_link_init +ffffffff82067de0 t dcn201_link_encoder_create +ffffffff82067ea0 t dcn201_acquire_idle_pipe_for_layer +ffffffff82067fb0 t dcn201_populate_dml_writeback_from_context +ffffffff82068010 t read_dce_straps +ffffffff82068040 t dcn201_create_audio +ffffffff82068070 t dcn201_stream_encoder_create +ffffffff82068110 t dcn201_hwseq_create +ffffffff82068180 t dcn201_get_dcc_compression_cap +ffffffff82069000 T dccg21_update_dpp_dto +ffffffff82069120 T dccg21_create +ffffffff8206a000 T dcn21_dchvm_init +ffffffff8206a200 T hubbub21_init_dchub +ffffffff8206a3e0 T hubbub21_program_urgent_watermarks +ffffffff8206abd0 T hubbub21_program_stutter_watermarks +ffffffff8206b0c0 T hubbub21_program_pstate_watermarks +ffffffff8206b360 T hubbub21_program_watermarks +ffffffff8206b4c0 T hubbub21_wm_read_state +ffffffff8206b7c0 T hubbub21_construct +ffffffff8206b820 t hubbub21_apply_DEDCN21_147_wa +ffffffff8206c000 T apply_DEDCN21_142_wa_for_hostvm_deadline +ffffffff8206c2e0 T hubp21_program_deadline +ffffffff8206c310 T hubp21_program_requestor +ffffffff8206c6b0 T hubp21_construct +ffffffff8206c720 t hubp21_setup +ffffffff8206c780 t hubp21_set_viewport +ffffffff8206ca70 t hubp21_program_surface_flip_and_addr +ffffffff8206d390 t hubp21_set_vm_system_aperture_settings +ffffffff8206d4c0 t hubp21_init +ffffffff8206d4f0 t hubp21_validate_dml_output +ffffffff8206f000 T dcn21_init_sys_ctx +ffffffff8206f110 T dcn21_s0i3_golden_init_wa +ffffffff8206f170 T dcn21_exit_optimized_pwr_state +ffffffff8206f190 T dcn21_optimize_pwr_state +ffffffff8206f1c0 T dcn21_PLAT_58856_wa +ffffffff8206f220 T dcn21_set_abm_immediate_disable +ffffffff8206f340 T dcn21_set_pipe +ffffffff8206f450 T dcn21_set_backlight_level +ffffffff8206f620 T dcn21_is_abm_supported +ffffffff82070000 T dcn21_hw_sequencer_construct +ffffffff82071000 T dcn21_link_encoder_enable_dp_output +ffffffff82071140 t dcn21_link_encoder_acquire_phy +ffffffff82071320 T dcn21_link_encoder_construct +ffffffff82071510 t dcn21_link_encoder_enable_dp_mst_output +ffffffff82071580 t dcn21_link_encoder_disable_output +ffffffff82072000 T dcn21_fast_validate_bw +ffffffff82072660 T dcn21_create_resource_pool +ffffffff820739c0 t dcn21_resource_destruct +ffffffff82073e60 t dcn21_destroy_resource_pool +ffffffff82073ec0 t dcn21_panel_cntl_create +ffffffff82073f50 t dcn21_link_encoder_create +ffffffff82074050 t dcn21_validate_bandwidth +ffffffff820740e0 t dcn21_patch_unknown_plane_state +ffffffff82074130 t dcn21_get_panel_config_defaults +ffffffff820741a0 t read_dce_straps +ffffffff820741d0 t dcn21_create_audio +ffffffff82074200 t dcn21_stream_encoder_create +ffffffff820742a0 t dcn21_hwseq_create +ffffffff82075000 T afmt3_setup_hdmi_audio +ffffffff820751d0 T afmt3_se_audio_setup +ffffffff82075390 T afmt3_audio_mute_control +ffffffff82075400 T afmt3_audio_info_immediate_update +ffffffff82075440 T afmt3_setup_dp_audio +ffffffff82075530 T afmt3_construct +ffffffff82076000 T cm_helper_program_gamcor_xfer_func +ffffffff820763a0 T cm3_helper_translate_curve_to_hw_format +ffffffff82076fa0 T cm3_helper_convert_to_custom_float +ffffffff820773f0 T cm3_helper_translate_curve_to_degamma_hw_format +ffffffff82077c60 T is_rgb_equal +ffffffff82078000 T dccg3_create +ffffffff820780b0 T dccg30_create +ffffffff82079000 T dcn30_link_encoder_validate_output_with_stream +ffffffff82079010 T dcn30_link_encoder_construct +ffffffff82079230 T enc3_hw_init +ffffffff8207a000 T enc3_stream_encoder_update_hdmi_info_packets +ffffffff8207a100 t enc3_update_hdmi_info_packet +ffffffff8207a4f0 T enc3_stream_encoder_stop_hdmi_info_packets +ffffffff8207aab0 T enc3_dp_set_dsc_pps_info_packet +ffffffff8207add0 T enc3_stream_encoder_update_dp_info_packets +ffffffff8207b010 T enc3_audio_mute_control +ffffffff8207b080 T enc3_se_dp_audio_setup +ffffffff8207b100 T enc3_se_dp_audio_enable +ffffffff8207b1f0 T enc3_se_hdmi_audio_setup +ffffffff8207b500 T dcn30_dio_stream_encoder_construct +ffffffff8207b570 t enc3_stream_encoder_hdmi_set_stream_attribute +ffffffff8207bb60 t enc3_stream_encoder_dvi_set_stream_attribute +ffffffff8207bd60 t enc3_read_state +ffffffff8207bef0 t enc3_dp_set_dsc_config +ffffffff8207bfc0 t enc3_dp_set_odm_combine +ffffffff8207c000 T dpp30_read_state +ffffffff8207c050 T dpp3_program_post_csc +ffffffff8207c230 T dpp3_set_pre_degam +ffffffff8207c2e0 T dpp3_cnv_setup +ffffffff8207cba0 T dpp3_set_cursor_attributes +ffffffff8207cd20 T dpp3_get_optimal_number_of_taps +ffffffff8207d790 T dpp3_construct +ffffffff8207d7f0 t dpp3_deferred_update +ffffffff8207dbc0 t dpp3_program_blnd_lut +ffffffff8207e630 t dpp3_program_shaper +ffffffff82080680 t dpp3_program_3dlut +ffffffff82080e50 t dpp3_set3dlut_ram12 +ffffffff82082000 T dpp3_program_cm_dealpha +ffffffff820820a0 T dpp3_program_cm_bias +ffffffff82082190 T dpp3_program_gamcor_lut +ffffffff82082bd0 t dpp3_power_on_gamcor_lut +ffffffff82082d00 T dpp3_set_hdr_multiplier +ffffffff82082d50 T dpp3_cm_set_gamut_remap +ffffffff82083000 T dwb3_config_fc +ffffffff820831b0 T dwb3_set_stereo +ffffffff82083270 T dwb3_enable +ffffffff820833a0 T dwb3_set_denorm +ffffffff820834c0 T dwb3_disable +ffffffff82083570 T dwb3_update +ffffffff820836a0 T dwb3_is_enabled +ffffffff82083740 T dwb3_set_new_content +ffffffff82083780 t dwb3_get_caps +ffffffff82083820 T dcn30_dwbc_construct +ffffffff82083870 T dwb3_set_host_read_rate_control +ffffffff82084000 T dwb3_ogam_set_input_transfer_func +ffffffff820849d0 T dwb3_set_gamut_remap +ffffffff82084b30 t dwb3_program_gamut_remap +ffffffff82084cc0 T dwb3_program_hdr_mult +ffffffff82085000 T hubbub3_init_dchub_sys_ctx +ffffffff820851e0 T hubbub3_program_watermarks +ffffffff820852f0 T hubbub3_dcc_support_swizzle +ffffffff820853c0 T hubbub3_get_dcc_compression_cap +ffffffff820855b0 T hubbub3_force_wm_propagate_to_pipes +ffffffff82085660 T hubbub3_force_pstate_change_control +ffffffff820856e0 T hubbub3_init_watermarks +ffffffff82085a20 T hubbub3_construct +ffffffff82086000 T hubp3_set_vm_system_aperture_settings +ffffffff82086130 T hubp3_program_surface_flip_and_addr +ffffffff82086b60 T hubp3_dcc_control +ffffffff82086c20 T hubp3_dcc_control_sienna_cichlid +ffffffff82086d30 T hubp3_dmdata_set_attributes +ffffffff82086f30 T hubp3_program_surface_config +ffffffff82087230 T hubp3_read_state +ffffffff820874a0 T hubp3_setup +ffffffff82087530 T hubp3_init +ffffffff82087560 T hubp3_construct +ffffffff82088000 T dcn30_set_blend_lut +ffffffff82088070 T dcn30_set_input_transfer_func +ffffffff820881d0 T dcn30_set_output_transfer_func +ffffffff820884f0 T dcn30_update_writeback +ffffffff82088580 t dcn30_set_writeback +ffffffff82088730 T dcn30_mmhubbub_warmup +ffffffff820889e0 T dcn30_enable_writeback +ffffffff82088ab0 T dcn30_disable_writeback +ffffffff82088b90 T dcn30_program_all_writeback_pipes_in_tree +ffffffff82088e80 T dcn30_init_hw +ffffffff82089770 T dcn30_set_avmute +ffffffff820897d0 T dcn30_update_info_frame +ffffffff820898a0 T dcn30_program_dmdata_engine +ffffffff82089940 T dcn30_apply_idle_power_optimizations +ffffffff82089ec0 T dcn30_does_plane_fit_in_mall +ffffffff82089f70 T dcn30_hardware_release +ffffffff8208a080 T dcn30_set_disp_pattern_generator +ffffffff8208a0f0 T dcn30_prepare_bandwidth +ffffffff8208b000 T dcn30_hw_sequencer_construct +ffffffff8208c000 t mmhubbub3_warmup_mcif +ffffffff8208c210 t mmhubbub3_config_mcif_buf +ffffffff8208c6c0 t mmhubbub3_config_mcif_arb +ffffffff8208cb10 T dcn30_mmhubbub_construct +ffffffff8208d000 T mpc3_is_dwb_idle +ffffffff8208d070 T mpc3_set_dwb_mux +ffffffff8208d0f0 T mpc3_disable_dwb_mux +ffffffff8208d170 T mpc3_set_out_rate_control +ffffffff8208d280 T mpc3_get_ogam_current +ffffffff8208d320 T mpc3_power_on_ogam_lut +ffffffff8208d3f0 T mpc3_set_output_gamma +ffffffff8208df90 T mpc3_set_denorm +ffffffff8208e000 T mpc3_set_denorm_clamp +ffffffff8208e150 T mpc3_program_shaper +ffffffff820903c0 t mpc3_power_on_shaper_3dlut +ffffffff82090740 T mpc3_init_mpcc +ffffffff820907c0 T mpc3_set_gamut_remap +ffffffff82090a10 T mpc3_program_3dlut +ffffffff820911a0 t mpc3_set3dlut_ram12 +ffffffff82091380 T mpc3_set_output_csc +ffffffff820914f0 T mpc3_set_ocsc_default +ffffffff82091660 T mpc3_set_rmu_mux +ffffffff82091700 T mpc3_get_rmu_mux_status +ffffffff820917b0 T mpcc3_acquire_rmu +ffffffff82091910 t mpcc3_release_rmu +ffffffff82091a80 t mpc3_set_mpc_mem_lp_mode +ffffffff82091c10 T dcn30_mpc_construct +ffffffff82092000 T optc3_triplebuffer_lock +ffffffff82092120 T optc3_lock_doublebuffer_enable +ffffffff820923b0 T optc3_lock_doublebuffer_disable +ffffffff820924c0 T optc3_lock +ffffffff82092590 T optc3_set_out_mux +ffffffff820925d0 T optc3_program_blank_color +ffffffff82092710 T optc3_set_drr_trigger_window +ffffffff820927a0 T optc3_set_vtotal_change_limit +ffffffff82092810 T optc3_set_dsc_config +ffffffff82092860 T optc3_set_odm_bypass +ffffffff820929e0 T optc3_wait_drr_doublebuffer_pending_clear +ffffffff82092a60 T optc3_set_vtotal_min_max +ffffffff82092a80 T optc3_tg_init +ffffffff82092ae0 T dcn30_timing_generator_init +ffffffff82092b50 t optc3_set_odm_combine +ffffffff82093000 T dcn30_add_stream_to_ctx +ffffffff82093020 T dcn30_populate_dml_pipes_from_context +ffffffff82093110 T dcn30_populate_dml_writeback_from_context +ffffffff82093170 T dcn30_calc_max_scaled_time +ffffffff820931d0 T dcn30_set_mcif_arb_params +ffffffff82093340 T dcn30_acquire_post_bldn_3dlut +ffffffff820934c0 T dcn30_release_post_bldn_3dlut +ffffffff82093570 T dcn30_internal_validate_bw +ffffffff82094350 t dcn30_split_stream_for_mpc_or_odm +ffffffff82094670 T dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff82094790 T dcn30_setup_mclk_switch_using_fw_based_vblank_stretch +ffffffff82094830 T dcn30_update_soc_for_wm_a +ffffffff82094880 T dcn30_calculate_wm_and_dlg +ffffffff820948f0 T dcn30_validate_bandwidth +ffffffff82094d20 T dcn30_update_bw_bounding_box +ffffffff82095500 T dcn30_create_resource_pool +ffffffff82096ac0 t dcn30_resource_destruct +ffffffff82097030 t dcn30_destroy_resource_pool +ffffffff82097090 t dcn30_panel_cntl_create +ffffffff82097120 t dcn30_link_encoder_create +ffffffff820971e0 t read_dce_straps +ffffffff82097210 t dcn30_create_audio +ffffffff82097240 t dcn30_stream_encoder_create +ffffffff820973c0 t dcn30_hwseq_create +ffffffff82098000 T vpg3_update_generic_info_packet +ffffffff820989a0 T vpg3_construct +ffffffff82099000 T dccg301_create +ffffffff8209a000 T dcn301_link_encoder_construct +ffffffff8209b000 T hubbub301_construct +ffffffff8209c000 T dcn301_hw_sequencer_construct +ffffffff8209d000 T dcn301_panel_cntl_construct +ffffffff8209d050 t dcn301_panel_cntl_destroy +ffffffff8209d0a0 t dcn301_panel_cntl_hw_init +ffffffff8209d2b0 t dcn301_is_panel_backlight_on +ffffffff8209d310 t dcn301_is_panel_powered_on +ffffffff8209d3c0 t dcn301_store_backlight_level +ffffffff8209d460 t dcn301_get_16_bit_backlight_from_pwm +ffffffff8209e000 T dcn301_create_resource_pool +ffffffff8209f5a0 t dcn301_destruct +ffffffff8209fae0 t dcn301_destroy_resource_pool +ffffffff8209fb40 t dcn301_panel_cntl_create +ffffffff8209fbd0 t dcn301_link_encoder_create +ffffffff8209fc90 t dcn301_calculate_wm_and_dlg +ffffffff8209fd00 t read_dce_straps +ffffffff8209fd30 t dcn301_create_audio +ffffffff8209fd60 t dcn301_stream_encoder_create +ffffffff8209fee0 t dcn301_hwseq_create +ffffffff820a0000 T dcn302_dpp_pg_control +ffffffff820a02a0 T dcn302_hubp_pg_control +ffffffff820a0550 T dcn302_dsc_pg_control +ffffffff820a1000 T dcn302_hw_sequencer_construct +ffffffff820a2000 T dcn302_update_bw_bounding_box +ffffffff820a2050 T dcn302_create_resource_pool +ffffffff820a33e0 t dcn302_resource_destruct +ffffffff820a38f0 t dcn302_destroy_resource_pool +ffffffff820a3940 t dcn302_panel_cntl_create +ffffffff820a39d0 t dcn302_link_encoder_create +ffffffff820a3a90 t read_dce_straps +ffffffff820a3ac0 t dcn302_create_audio +ffffffff820a3af0 t dcn302_stream_encoder_create +ffffffff820a3c70 t dcn302_hwseq_create +ffffffff820a4000 T dcn303_dpp_pg_control +ffffffff820a4030 T dcn303_hubp_pg_control +ffffffff820a4060 T dcn303_dsc_pg_control +ffffffff820a4090 T dcn303_enable_power_gating_plane +ffffffff820a5000 T dcn303_hw_sequencer_construct +ffffffff820a6000 T dcn303_update_bw_bounding_box +ffffffff820a6050 T dcn303_create_resource_pool +ffffffff820a7290 t dcn303_resource_destruct +ffffffff820a77b0 t dcn303_destroy_resource_pool +ffffffff820a7800 t dcn303_panel_cntl_create +ffffffff820a7890 t dcn303_link_encoder_create +ffffffff820a7950 t read_dce_straps +ffffffff820a7980 t dcn303_create_audio +ffffffff820a79b0 t dcn303_stream_encoder_create +ffffffff820a7b30 t dcn303_hwseq_create +ffffffff820a8000 T afmt31_powerdown +ffffffff820a8090 T afmt31_poweron +ffffffff820a8120 T afmt31_construct +ffffffff820a9000 T apg31_construct +ffffffff820a9050 t apg31_se_audio_setup +ffffffff820a9160 t apg31_audio_mute_control +ffffffff820a91a0 t apg31_enable +ffffffff820a92b0 t apg31_disable +ffffffff820aa000 T dccg31_update_dpp_dto +ffffffff820aa1c0 T dccg31_set_dpstreamclk +ffffffff820aa350 t dccg31_disable_dpstreamclk +ffffffff820aa4a0 T dccg31_enable_symclk32_se +ffffffff820aa790 T dccg31_disable_symclk32_se +ffffffff820aaa60 T dccg31_enable_symclk32_le +ffffffff820aac30 T dccg31_disable_symclk32_le +ffffffff820aadd0 T dccg31_disable_dscclk +ffffffff820aaf90 T dccg31_enable_dscclk +ffffffff820ab160 T dccg31_set_physymclk +ffffffff820ab680 T dccg31_set_dtbclk_dto +ffffffff820ab930 T dccg31_set_audio_dtbclk_dto +ffffffff820aba40 T dccg31_get_dccg_ref_freq +ffffffff820aba70 T dccg31_set_dispclk_change_mode +ffffffff820abac0 T dccg31_init +ffffffff820ac020 T dccg31_otg_add_pixel +ffffffff820ac060 T dccg31_otg_drop_pixel +ffffffff820ac0a0 T dccg31_create +ffffffff820ad000 T dcn31_link_encoder_set_dio_phy_mux +ffffffff820ad390 T dcn31_link_encoder_construct +ffffffff820ad590 T dcn31_link_encoder_construct_minimal +ffffffff820ad610 T dcn31_link_encoder_enable_dp_output +ffffffff820ad850 T dcn31_link_encoder_enable_dp_mst_output +ffffffff820ada90 T dcn31_link_encoder_disable_output +ffffffff820add20 T dcn31_link_encoder_is_in_alt_mode +ffffffff820ade60 T dcn31_link_encoder_get_max_link_cap +ffffffff820adfd0 t enc31_hw_init +ffffffff820af000 T dcn31_hpo_dp_link_enc_enable +ffffffff820af160 T dcn31_hpo_dp_link_enc_disable +ffffffff820af1d0 T dcn31_hpo_dp_link_enc_set_link_test_pattern +ffffffff820afb00 T dcn31_hpo_dp_link_enc_update_stream_allocation_table +ffffffff820afd90 T dcn31_hpo_dp_link_enc_set_throttled_vcp_size +ffffffff820b0030 T dcn31_hpo_dp_link_enc_read_state +ffffffff820b02e0 T dcn31_hpo_dp_link_enc_enable_dp_output +ffffffff820b03e0 T dcn31_hpo_dp_link_enc_disable_output +ffffffff820b0520 T dcn31_hpo_dp_link_enc_set_ffe +ffffffff820b0610 T hpo_dp_link_encoder31_construct +ffffffff820b0670 t dcn31_hpo_dp_link_enc_is_in_alt_mode +ffffffff820b1000 T dcn31_hpo_dp_stream_encoder_construct +ffffffff820b1070 t dcn31_hpo_dp_stream_enc_enable_stream +ffffffff820b11b0 t dcn31_hpo_dp_stream_enc_dp_unblank +ffffffff820b1460 t dcn31_hpo_dp_stream_enc_dp_blank +ffffffff820b1560 t dcn31_hpo_dp_stream_enc_disable +ffffffff820b15d0 t dcn31_hpo_dp_stream_enc_set_stream_attribute +ffffffff820b1e80 t dcn31_hpo_dp_stream_enc_update_dp_info_packets +ffffffff820b2040 t dcn31_hpo_dp_stream_enc_stop_dp_info_packets +ffffffff820b21d0 t dcn31_hpo_dp_stream_enc_set_dsc_pps_info_packet +ffffffff820b2470 t dcn31_hpo_dp_stream_enc_map_stream_to_link +ffffffff820b2570 t dcn31_hpo_dp_stream_enc_mute_control +ffffffff820b25e0 t dcn31_hpo_dp_stream_enc_audio_setup +ffffffff820b2690 t dcn31_hpo_dp_stream_enc_audio_enable +ffffffff820b2760 t dcn31_hpo_dp_stream_enc_audio_disable +ffffffff820b2910 t dcn31_hpo_dp_stream_enc_read_state +ffffffff820b2aa0 t dcn31_set_hblank_min_symbol_width +ffffffff820b3000 T hubbub31_init_dchub_sys_ctx +ffffffff820b31f0 T hubbub31_construct +ffffffff820b3290 t hubbub31_get_dcc_compression_cap +ffffffff820b3480 t hubbub31_get_dchub_ref_freq +ffffffff820b3560 t hubbub31_program_watermarks +ffffffff820b4e20 t hubbub31_verify_allow_pstate_change_high +ffffffff820b4fe0 t dcn31_program_det_size +ffffffff820b51a0 t dcn31_program_compbuf_size +ffffffff820b5420 t dcn31_init_crb +ffffffff820b6000 T hubp31_set_unbounded_requesting +ffffffff820b6090 T hubp31_soft_reset +ffffffff820b60e0 T hubp31_construct +ffffffff820b6150 t hubp31_program_extended_blank +ffffffff820b7000 T dcn31_init_hw +ffffffff820b7960 T dcn31_dsc_pg_control +ffffffff820b7cb0 T dcn31_enable_power_gating_plane +ffffffff820b7f10 T dcn31_update_info_frame +ffffffff820b7fe0 T dcn31_z10_save_init +ffffffff820b80a0 T dcn31_z10_restore +ffffffff820b8180 T dcn31_hubp_pg_control +ffffffff820b84a0 T dcn31_init_sys_ctx +ffffffff820b8550 T dcn31_reset_hw_ctx_wrap +ffffffff820b88c0 T dcn31_setup_hpo_hw_control +ffffffff820b9000 T dcn31_hw_sequencer_construct +ffffffff820ba000 T optc31_immediate_disable_crtc +ffffffff820ba100 T optc31_set_drr +ffffffff820ba320 T optc3_init_odm +ffffffff820ba490 T dcn31_timing_generator_init +ffffffff820ba500 t optc31_enable_crtc +ffffffff820ba600 t optc31_disable_crtc +ffffffff820ba6e0 t optc31_set_odm_combine +ffffffff820bb000 T dcn31_panel_cntl_construct +ffffffff820bb040 t dcn31_panel_cntl_destroy +ffffffff820bb090 t dcn31_panel_cntl_hw_init +ffffffff820bb180 t dcn31_is_panel_backlight_on +ffffffff820bb220 t dcn31_is_panel_powered_on +ffffffff820bb2d0 t dcn31_store_backlight_level +ffffffff820bb390 t dcn31_get_16_bit_backlight_from_pwm +ffffffff820bc000 T dcn31_populate_dml_pipes_from_context +ffffffff820bc350 T dcn31_calculate_wm_and_dlg +ffffffff820bc3d0 T dcn31_populate_dml_writeback_from_context +ffffffff820bc430 T dcn31_set_mcif_arb_params +ffffffff820bc490 T dcn31_validate_bandwidth +ffffffff820bc870 T dcn31_create_resource_pool +ffffffff820bdc10 t dcn31_resource_destruct +ffffffff820be270 t dcn31_destroy_resource_pool +ffffffff820be2d0 t dcn31_panel_cntl_create +ffffffff820be340 t dcn31_link_encoder_create +ffffffff820be400 t dcn31_link_enc_create_minimal +ffffffff820be4a0 t dcn31_get_panel_config_defaults +ffffffff820be510 t read_dce_straps +ffffffff820be540 t dcn31_create_audio +ffffffff820be570 t dcn31_stream_encoder_create +ffffffff820be6f0 t dcn31_hpo_dp_stream_encoder_create +ffffffff820be8b0 t dcn31_hpo_dp_link_encoder_create +ffffffff820be940 t dcn31_hwseq_create +ffffffff820bf000 T vpg31_powerdown +ffffffff820bf090 T vpg31_poweron +ffffffff820bf120 T vpg31_construct +ffffffff820c0000 T dccg314_create +ffffffff820c00b0 t dccg314_set_dpstreamclk +ffffffff820c0480 t dccg314_set_dtbclk_dto +ffffffff820c0670 t dccg314_set_pixel_rate_div +ffffffff820c09e0 t dccg314_set_valid_pixel_rate +ffffffff820c1000 T dcn314_dio_stream_encoder_construct +ffffffff820c1070 t enc314_stream_encoder_hdmi_set_stream_attribute +ffffffff820c1660 t enc314_stream_encoder_dvi_set_stream_attribute +ffffffff820c1870 t enc314_stream_encoder_dp_blank +ffffffff820c18c0 t enc314_stream_encoder_dp_unblank +ffffffff820c1c00 t enc314_read_state +ffffffff820c1d60 t enc314_dp_set_dsc_config +ffffffff820c1db0 t enc314_dp_set_odm_combine +ffffffff820c1df0 t enc314_set_dig_input_mode +ffffffff820c1e40 t enc314_enable_fifo +ffffffff820c1ee0 t enc314_disable_fifo +ffffffff820c1f30 t enc314_reset_fifo +ffffffff820c3000 T dcn314_update_odm +ffffffff820c3610 T dcn314_dsc_pg_control +ffffffff820c39e0 T dcn314_enable_power_gating_plane +ffffffff820c3c70 T dcn314_calculate_dccg_k1_k2_values +ffffffff820c3e00 T dcn314_set_pixels_per_cycle +ffffffff820c3ef0 T dcn314_hubp_pg_control +ffffffff820c5000 T dcn314_hw_sequencer_construct +ffffffff820c6000 T dcn314_timing_generator_init +ffffffff820c6070 t optc314_enable_crtc +ffffffff820c6170 t optc314_disable_crtc +ffffffff820c6250 t optc314_phantom_crtc_post_enable +ffffffff820c6310 t optc314_set_odm_bypass +ffffffff820c6480 t optc314_set_odm_combine +ffffffff820c6780 t optc314_set_h_timing_div_manual_mode +ffffffff820c7000 T dcn314_create_resource_pool +ffffffff820c82d0 t dcn314_resource_destruct +ffffffff820c8930 t dcn314_destroy_resource_pool +ffffffff820c8990 t dcn31_panel_cntl_create +ffffffff820c8a00 t dcn31_link_encoder_create +ffffffff820c8ac0 t dcn31_link_enc_create_minimal +ffffffff820c8b60 t dcn314_populate_dml_pipes_from_context +ffffffff820c8bf0 t dcn314_update_bw_bounding_box +ffffffff820c8c40 t dcn314_get_panel_config_defaults +ffffffff820c8cb0 t read_dce_straps +ffffffff820c8ce0 t dcn31_create_audio +ffffffff820c8d10 t dcn314_stream_encoder_create +ffffffff820c8e90 t dcn31_hpo_dp_stream_encoder_create +ffffffff820c9050 t dcn31_hpo_dp_link_encoder_create +ffffffff820c90e0 t dcn314_hwseq_create +ffffffff820ca000 T dcn315_create_resource_pool +ffffffff820cb270 t dcn315_resource_destruct +ffffffff820cb8d0 t dcn315_destroy_resource_pool +ffffffff820cb930 t dcn31_panel_cntl_create +ffffffff820cb9a0 t dcn31_link_encoder_create +ffffffff820cba60 t dcn31_link_enc_create_minimal +ffffffff820cbb00 t dcn315_populate_dml_pipes_from_context +ffffffff820cbe50 t dcn315_get_panel_config_defaults +ffffffff820cbec0 t read_dce_straps +ffffffff820cbef0 t dcn31_create_audio +ffffffff820cbf20 t dcn315_stream_encoder_create +ffffffff820cc0a0 t dcn31_hpo_dp_stream_encoder_create +ffffffff820cc260 t dcn31_hpo_dp_link_encoder_create +ffffffff820cc2f0 t dcn31_hwseq_create +ffffffff820cd000 T dcn316_create_resource_pool +ffffffff820ce2b0 t dcn316_resource_destruct +ffffffff820ce910 t dcn316_destroy_resource_pool +ffffffff820ce970 t dcn31_panel_cntl_create +ffffffff820ce9e0 t dcn31_link_encoder_create +ffffffff820ceaa0 t dcn31_link_enc_create_minimal +ffffffff820ceb40 t dcn316_populate_dml_pipes_from_context +ffffffff820cee70 t dcn316_get_panel_config_defaults +ffffffff820ceee0 t read_dce_straps +ffffffff820cef10 t dcn31_create_audio +ffffffff820cef40 t dcn316_stream_encoder_create +ffffffff820cf0c0 t dcn31_hpo_dp_stream_encoder_create +ffffffff820cf280 t dcn31_hpo_dp_link_encoder_create +ffffffff820cf310 t dcn31_hwseq_create +ffffffff820d0000 T dccg32_create +ffffffff820d00b0 t dccg32_get_dccg_ref_freq +ffffffff820d00e0 t dccg32_otg_add_pixel +ffffffff820d0120 t dccg32_otg_drop_pixel +ffffffff820d0160 t dccg32_set_dpstreamclk +ffffffff820d0530 t dccg32_set_dtbclk_dto +ffffffff820d0730 t dccg32_set_pixel_rate_div +ffffffff820d0aa0 t dccg32_set_valid_pixel_rate +ffffffff820d1000 T enc32_hw_init +ffffffff820d1090 T dcn32_link_encoder_enable_dp_output +ffffffff820d10e0 T dcn32_link_encoder_construct +ffffffff820d12c0 t dcn32_link_encoder_is_in_alt_mode +ffffffff820d1340 t dcn32_link_encoder_get_max_link_cap +ffffffff820d2000 T dcn32_dio_stream_encoder_construct +ffffffff820d2070 t enc32_stream_encoder_hdmi_set_stream_attribute +ffffffff820d25a0 t enc32_stream_encoder_dvi_set_stream_attribute +ffffffff820d2720 t enc32_stream_encoder_dp_unblank +ffffffff820d2be0 t enc32_read_state +ffffffff820d2d40 t enc32_dp_set_dsc_config +ffffffff820d2d90 t enc32_dp_set_odm_combine +ffffffff820d2dd0 t enc32_set_dig_input_mode +ffffffff820d3000 T dpp32_construct +ffffffff820d3060 t dscl32_calc_lb_num_partitions +ffffffff820d4000 T hpo_dp_link_encoder32_construct +ffffffff820d4060 t dcn32_hpo_dp_link_enc_is_in_alt_mode +ffffffff820d5000 T dcn32_program_det_size +ffffffff820d51a0 T hubbub32_program_urgent_watermarks +ffffffff820d5910 T hubbub32_program_stutter_watermarks +ffffffff820d5d60 T hubbub32_program_pstate_watermarks +ffffffff820d61f0 T hubbub32_program_usr_watermarks +ffffffff820d6440 T hubbub32_force_usr_retraining_allow +ffffffff820d64c0 T hubbub32_force_wm_propagate_to_pipes +ffffffff820d6560 T hubbub32_construct +ffffffff820d65e0 t hubbub32_wm_read_state +ffffffff820d6a60 t hubbub32_program_watermarks +ffffffff820d6b70 t hubbub32_init_watermarks +ffffffff820d6fb0 t dcn32_program_compbuf_size +ffffffff820d7230 t dcn32_init_crb +ffffffff820d8000 T hubp32_update_force_pstate_disallow +ffffffff820d8090 T hubp32_update_mall_sel +ffffffff820d8120 T hubp32_prepare_subvp_buffering +ffffffff820d81c0 T hubp32_phantom_hubp_post_enable +ffffffff820d82d0 T hubp32_cursor_set_attributes +ffffffff820d8590 T hubp32_construct +ffffffff820d9000 T dcn32_dsc_pg_control +ffffffff820d9310 T dcn32_enable_power_gating_plane +ffffffff820d94b0 T dcn32_hubp_pg_control +ffffffff820d9720 T dcn32_apply_idle_power_optimizations +ffffffff820d9990 t dcn32_calculate_cab_allocation +ffffffff820d9d40 T dcn32_commit_subvp_config +ffffffff820d9df0 T dcn32_subvp_pipe_control_lock +ffffffff820d9fc0 T dcn32_set_mcm_luts +ffffffff820da150 T dcn32_set_input_transfer_func +ffffffff820da290 T dcn32_set_output_transfer_func +ffffffff820da4a0 T dcn32_subvp_update_force_pstate +ffffffff820da610 T dcn32_update_mall_sel +ffffffff820da790 T dcn32_program_mall_pipe_config +ffffffff820da870 T dcn32_init_hw +ffffffff820db060 T dcn32_update_odm +ffffffff820db670 T dcn32_calculate_dccg_k1_k2_values +ffffffff820db870 T dcn32_is_dp_dig_pixel_rate_div_policy +ffffffff820db900 T dcn32_set_pixels_per_cycle +ffffffff820dba40 T dcn32_unblank_stream +ffffffff820dbc10 T dcn32_disable_link_output +ffffffff820dbea0 T dcn32_update_phantom_vp_position +ffffffff820dbfc0 T dcn32_dsc_pg_status +ffffffff820dc0a0 T dcn32_update_dsc_pg +ffffffff820dd000 T dcn32_hw_sequencer_init_functions +ffffffff820de000 t mmhubbub32_warmup_mcif +ffffffff820de210 t mmhubbub32_config_mcif_buf +ffffffff820de6c0 t mmhubbub32_config_mcif_arb +ffffffff820dead0 T dcn32_mmhubbub_construct +ffffffff820df000 t mpc32_mpc_init +ffffffff820df220 t mpc32_program_post1dlut +ffffffff820dfd00 t mpc32_program_shaper +ffffffff820e1fb0 t mpc32_program_3dlut +ffffffff820e28a0 T dcn32_mpc_construct +ffffffff820e2960 t mpc32_power_on_shaper_3dlut +ffffffff820e2b90 t mpc32_set3dlut_ram12 +ffffffff820e3000 T dcn32_timing_generator_init +ffffffff820e3070 t optc32_enable_crtc +ffffffff820e3170 t optc32_disable_crtc +ffffffff820e3250 t optc32_phantom_crtc_post_enable +ffffffff820e3310 t optc32_set_drr +ffffffff820e3560 t optc32_set_odm_bypass +ffffffff820e36d0 t optc32_set_odm_combine +ffffffff820e39d0 t optc32_set_h_timing_div_manual_mode +ffffffff820e4000 T dcn32_panel_cntl_create +ffffffff820e4070 T dcn32_acquire_post_bldn_3dlut +ffffffff820e4160 T dcn32_release_post_bldn_3dlut +ffffffff820e4210 T dcn32_remove_phantom_pipes +ffffffff820e4380 T dcn32_add_phantom_pipes +ffffffff820e47c0 T dcn32_validate_bandwidth +ffffffff820e4c80 T dcn32_populate_dml_pipes_from_context +ffffffff820e5040 T dcn32_calculate_wm_and_dlg +ffffffff820e50b0 T dcn32_create_resource_pool +ffffffff820e5160 t dcn32_resource_construct +ffffffff820f15d0 T dcn32_acquire_idle_pipe_for_head_pipe_in_layer +ffffffff820f1810 T dcn32_calc_num_avail_chans_for_mall +ffffffff820f1880 t dcn32_mpc_create +ffffffff820f6240 t dcn32_resource_destruct +ffffffff820f68b0 t dcn32_destroy_resource_pool +ffffffff820f6910 t dcn32_link_encoder_create +ffffffff820f7870 t dcn32_update_bw_bounding_box +ffffffff820f78c0 t read_dce_straps +ffffffff820f78f0 t dcn32_create_audio +ffffffff820f7c30 t dcn32_stream_encoder_create +ffffffff820f9ab0 t dcn32_hpo_dp_stream_encoder_create +ffffffff820fa790 t dcn32_hpo_dp_link_encoder_create +ffffffff820fac10 t dcn32_hwseq_create +ffffffff820fb0b0 t dcn32_vpg_create +ffffffff820fc000 T dcn32_helper_calculate_num_ways_for_subvp +ffffffff820fc1e0 T dcn32_merge_pipes_for_subvp +ffffffff820fc3b0 T dcn32_all_pipes_have_stream_and_plane +ffffffff820fc440 T dcn32_subvp_in_use +ffffffff820fc4d0 T dcn32_mpo_in_use +ffffffff820fc540 T dcn32_any_surfaces_rotated +ffffffff820fc5d0 T dcn32_determine_det_override +ffffffff820fc910 T dcn32_set_det_allocations +ffffffff820fca90 T dcn32_save_mall_state +ffffffff820fcb40 T dcn32_restore_mall_state +ffffffff820fd000 T dcn321_link_encoder_construct +ffffffff820fe000 T dcn321_create_resource_pool +ffffffff820fe0b0 t dcn321_resource_construct +ffffffff8210a4c0 t dcn321_mpc_create +ffffffff8210ee80 t dcn321_resource_destruct +ffffffff8210f4f0 t dcn321_destroy_resource_pool +ffffffff8210f550 t dcn321_link_encoder_create +ffffffff821104b0 t dcn321_update_bw_bounding_box +ffffffff82110500 t read_dce_straps +ffffffff82110530 t dcn321_create_audio +ffffffff82110870 t dcn321_stream_encoder_create +ffffffff821126f0 t dcn321_hpo_dp_stream_encoder_create +ffffffff821133d0 t dcn321_hpo_dp_link_encoder_create +ffffffff82113850 t dcn321_hwseq_create +ffffffff82113cf0 t dcn321_vpg_create +ffffffff82115000 T bw_int_to_fixed_nonconst +ffffffff82115090 T bw_frc_to_fixed +ffffffff82115260 T bw_floor2 +ffffffff82115310 T bw_ceil2 +ffffffff82115390 T bw_mul +ffffffff82116000 T convert_to_custom_float_format +ffffffff82117000 T bw_calcs_init +ffffffff82117e30 T bw_calcs +ffffffff82119760 t calculate_bandwidth +ffffffff82121000 T scaler_settings_calculation +ffffffff82121380 T mode_support_and_system_configuration +ffffffff82127160 T display_pipe_configuration +ffffffff821279a0 T dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation +ffffffff8212d000 T dcn_bw_mod +ffffffff8212d060 T dcn_bw_min2 +ffffffff8212d0a0 T dcn_bw_max +ffffffff8212d0d0 T dcn_bw_max2 +ffffffff8212d110 T dcn_bw_floor2 +ffffffff8212d1b0 T dcn_bw_floor +ffffffff8212d1e0 T dcn_bw_ceil +ffffffff8212d220 T dcn_bw_ceil2 +ffffffff8212d2d0 T dcn_bw_max3 +ffffffff8212d370 T dcn_bw_max5 +ffffffff8212d4e0 T dcn_bw_pow +ffffffff8212d570 T dcn_bw_fabs +ffffffff8212d5d0 T dcn_bw_log +ffffffff8212e000 T swizzle_mode_to_macro_tile_size +ffffffff8212e090 T dcn_validate_bandwidth +ffffffff82130330 T dcn_bw_sync_calcs_and_dml +ffffffff82130580 t dcn_bw_calc_rq_dlg_ttu +ffffffff82130f00 T dcn_find_dcfclk_suits_all +ffffffff82131360 T dcn_bw_update_from_pplib_fclks +ffffffff821314f0 T dcn_bw_update_from_pplib_dcfclks +ffffffff821315c0 T dcn_get_soc_clks +ffffffff82131640 T dcn_bw_notify_pplib_of_wm_ranges +ffffffff82132000 T dcn20_populate_dml_writeback_from_context +ffffffff82132180 T dcn20_fpu_set_wb_arb_params +ffffffff82132330 T dcn20_calculate_dlg_params +ffffffff82132b10 T dcn20_populate_dml_pipes_from_context +ffffffff82133a10 T dcn20_calculate_wm +ffffffff821341b0 T dcn20_update_bounding_box +ffffffff82134430 T dcn20_cap_soc_clocks +ffffffff821347b0 T dcn20_patch_bounding_box +ffffffff82134920 T dcn20_validate_bandwidth_fp +ffffffff82134ab0 t dcn20_validate_bandwidth_internal +ffffffff82134e90 T dcn20_fpu_set_wm_ranges +ffffffff82134f30 T dcn20_fpu_adjust_dppclk +ffffffff82134fd0 T dcn21_populate_dml_pipes_from_context +ffffffff821350d0 T dcn21_validate_bandwidth_fp +ffffffff82135b50 T dcn21_update_bw_bounding_box +ffffffff82136040 T dcn21_clk_mgr_set_bw_params_wm_table +ffffffff821360a0 T dcn201_populate_dml_writeback_from_context_fpu +ffffffff821363b0 t calculate_wm_set_for_vlevel +ffffffff82137000 T dml20_recalculate +ffffffff82137740 t dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff8213cda0 T dml20_ModeSupportAndSystemConfigurationFull +ffffffff82143d30 t TruncToValidBPP +ffffffff82143f10 t CalculateVMAndRowBytes +ffffffff821445a0 t CalculatePrefetchSourceLines +ffffffff82144760 t CalculateWriteBackDelay +ffffffff82144a30 t CalculatePrefetchSchedule +ffffffff821458f0 t CalculateFlipSchedule +ffffffff82145ca0 t adjust_ReturnBW +ffffffff82146000 T dml20v2_recalculate +ffffffff82146740 t dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff8214be50 T dml20v2_ModeSupportAndSystemConfigurationFull +ffffffff82152cd0 t TruncToValidBPP +ffffffff82153260 t CalculateVMAndRowBytes +ffffffff821538f0 t CalculatePrefetchSourceLines +ffffffff82153ab0 t CalculateWriteBackDelay +ffffffff82153d80 t CalculateDelayAfterScaler +ffffffff821540d0 t CalculatePrefetchSchedule +ffffffff82154e40 t CalculateFlipSchedule +ffffffff821551f0 t adjust_ReturnBW +ffffffff82156000 T dml20_rq_dlg_get_rq_reg +ffffffff82156490 t dml20_rq_dlg_get_rq_params +ffffffff82156660 T dml20_rq_dlg_get_dlg_reg +ffffffff821585b0 t get_surf_rq_param +ffffffff82158e30 t calculate_ttu_cursor +ffffffff8215a000 T dml20v2_rq_dlg_get_rq_reg +ffffffff8215a490 t dml20v2_rq_dlg_get_rq_params +ffffffff8215a660 T dml20v2_rq_dlg_get_dlg_reg +ffffffff8215c5b0 t get_surf_rq_param +ffffffff8215ce30 t calculate_ttu_cursor +ffffffff8215e000 T dml21_recalculate +ffffffff8215e700 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff821640b0 T dml21_ModeSupportAndSystemConfigurationFull +ffffffff8216a190 t TruncToValidBPP +ffffffff8216a720 t CalculateDCFCLKDeepSleep +ffffffff8216aa60 t CalculateVMAndRowBytes +ffffffff8216b2d0 t CalculatePrefetchSourceLines +ffffffff8216b490 t CalculateWriteBackDelay +ffffffff8216b760 t CalculatePrefetchSchedulePerPlane +ffffffff8216bf70 t CalculateUrgentBurstFactor +ffffffff8216c380 t CalculateFlipSchedule +ffffffff8216c870 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff8216d8d0 t CalculatePrefetchSchedule +ffffffff8216f000 T dml21_rq_dlg_get_rq_reg +ffffffff8216f490 t dml_rq_dlg_get_rq_params +ffffffff8216f660 T dml21_rq_dlg_get_dlg_reg +ffffffff821719c0 t get_surf_rq_param +ffffffff82172300 t calculate_ttu_cursor +ffffffff82173000 T optc3_fpu_set_vrr_m_const +ffffffff821734a0 T dcn30_fpu_populate_dml_writeback_from_context +ffffffff821737f0 T dcn30_fpu_set_mcif_arb_params +ffffffff82173960 T dcn30_fpu_update_soc_for_wm_a +ffffffff82173a10 T dcn30_fpu_calculate_wm_and_dlg +ffffffff821742f0 T dcn30_fpu_update_dram_channel_width_bytes +ffffffff82174350 T dcn30_fpu_update_max_clk +ffffffff82174400 T dcn30_fpu_get_optimal_dcfclk_fclk_for_uclk +ffffffff82174500 T dcn30_fpu_update_bw_bounding_box +ffffffff821746e0 T dcn30_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff821748a0 T dcn3_fpu_build_wm_range_table +ffffffff82174b80 T patch_dcn30_soc_bounding_box +ffffffff82175000 T dml30_recalculate +ffffffff82175600 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff8217bc50 T dml30_CalculateBytePerPixelAnd256BBlockSizes +ffffffff8217bec0 T dml30_CalculateWriteBackDISPCLK +ffffffff8217c040 T dml30_ModeSupportAndSystemConfigurationFull +ffffffff82183440 t CalculateSwathAndDETConfiguration +ffffffff82183ab0 t TruncToValidBPP +ffffffff82183d30 t dscceComputeDelay +ffffffff82183e70 t CalculateVMAndRowBytes +ffffffff82184520 t CalculatePrefetchSourceLines +ffffffff821846e0 t CalculateUrgentBurstFactor +ffffffff82184970 t CalculateDCFCLKDeepSleep +ffffffff82184c90 t UseMinimumDCFCLK +ffffffff82185e90 t CalculatePrefetchSchedule +ffffffff821873f0 t CalculateFlipSchedule +ffffffff821878e0 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff82188700 t CalculateSwathWidth +ffffffff82189000 T dml30_rq_dlg_get_rq_reg +ffffffff821894b0 t dml_rq_dlg_get_rq_params +ffffffff82189720 T dml30_rq_dlg_get_dlg_reg +ffffffff8218bed0 t get_surf_rq_param +ffffffff8218c870 t calculate_ttu_cursor +ffffffff8218d000 T dcn301_update_bw_bounding_box +ffffffff8218d320 T dcn301_fpu_set_wm_ranges +ffffffff8218d3c0 T dcn301_fpu_init_soc_bounding_box +ffffffff8218d460 T dcn301_calculate_wm_and_dlg_fp +ffffffff8218d790 t calculate_wm_set_for_vlevel +ffffffff8218e000 T dcn302_fpu_update_bw_bounding_box +ffffffff8218eac0 T dcn302_fpu_init_soc_bounding_box +ffffffff8218f000 T dcn303_fpu_update_bw_bounding_box +ffffffff8218fb00 T dcn303_fpu_init_soc_bounding_box +ffffffff82190000 T dcn31_zero_pipe_dcc_fraction +ffffffff82190060 T dcn31_update_soc_for_wm_a +ffffffff82190110 T dcn315_update_soc_for_wm_a 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CalculatePrefetchSchedule +ffffffff821a5ef0 t CalculateVupdateAndDynamicMetadataParameters +ffffffff821a7000 T dml31_rq_dlg_get_rq_reg +ffffffff821a74b0 t dml_rq_dlg_get_rq_params +ffffffff821a7720 T dml31_rq_dlg_get_dlg_reg +ffffffff821aa1f0 t get_surf_rq_param +ffffffff821ab000 T dcn314_update_bw_bounding_box_fpu +ffffffff821ab480 T dcn314_populate_dml_pipes_from_context_fpu +ffffffff821ac000 T dml314_recalculate +ffffffff821ac280 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff821b2f60 T dml314_CalculateWriteBackDISPCLK +ffffffff821b30e0 T dml314_ModeSupportAndSystemConfigurationFull +ffffffff821bb280 t CalculateBytePerPixelAnd256BBlockSizes +ffffffff821bb4f0 t CalculateSwathAndDETConfiguration +ffffffff821bbaf0 t TruncToValidBPP +ffffffff821bbd70 t dscceComputeDelay +ffffffff821bbeb0 t CalculateDCFCLKDeepSleep +ffffffff821bc1f0 t CalculateVMAndRowBytes +ffffffff821bc840 t CalculatePrefetchSourceLines +ffffffff821bca00 t CalculateUrgentBurstFactor +ffffffff821bcc90 t CalculateMaxVStartup +ffffffff821bcdd0 t CalculatePrefetchSchedulePerPlane +ffffffff821bd500 t CalculateFlipSchedule +ffffffff821bda80 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff821be6e0 t CalculateSwathWidth +ffffffff821bebf0 t CalculatePrefetchSchedule +ffffffff821c0080 t CalculateVupdateAndDynamicMetadataParameters +ffffffff821c1000 T dml314_rq_dlg_get_rq_reg +ffffffff821c14b0 t dml_rq_dlg_get_rq_params +ffffffff821c1720 T dml314_rq_dlg_get_dlg_reg +ffffffff821c4270 t get_surf_rq_param +ffffffff821c5000 T dcn32_build_wm_range_table_fpu +ffffffff821c5390 T dcn32_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff821c55c0 T dcn32_internal_validate_bw +ffffffff821c72f0 T dcn32_helper_populate_phantom_dlg_params +ffffffff821c7490 T dcn32_predict_pipe_split +ffffffff821c76c0 T insert_entry_into_table_sorted +ffffffff821c7af0 T dcn32_set_phantom_stream_timing +ffffffff821c7d90 t dcn32_split_stream_for_mpc_or_odm +ffffffff821c8120 T dcn32_calculate_wm_and_dlg_fpu +ffffffff821c9640 T dcn32_patch_dpm_table +ffffffff821c9850 T dcn32_update_bw_bounding_box_fpu +ffffffff821cb250 T dcn32_zero_pipe_dcc_fraction +ffffffff821cb2b0 T dcn32_allow_subvp_with_active_margin +ffffffff821cb380 t subvp_drr_schedulable +ffffffff821cc000 T dml32_recalculate +ffffffff821d0320 T dml32_ModeSupportAndSystemConfigurationFull +ffffffff821d8000 T dml32_dscceComputeDelay +ffffffff821d8140 T dml32_dscComputeDelay +ffffffff821d8180 T IsVertical +ffffffff821d81b0 T dml32_CalculateSinglePipeDPPCLKAndSCLThroughput +ffffffff821d84d0 T dml32_CalculateBytePerPixelAndBlockSizes +ffffffff821d8800 T dml32_CalculateSwathAndDETConfiguration +ffffffff821d9020 T dml32_CalculateSwathWidth +ffffffff821d98c0 T dml32_UnboundedRequest +ffffffff821d9930 T dml32_CalculateDETBufferSize +ffffffff821d9f70 T dml32_CalculateODMMode +ffffffff821da6d0 T dml32_CalculateRequiredDispclk +ffffffff821da890 T dml32_RoundToDFSGranularity +ffffffff821da920 T dml32_CalculateOutputLink +ffffffff821db450 T dml32_TruncToValidBPP +ffffffff821db7a0 T dml32_CalculateDPPCLK +ffffffff821db950 T dml32_RequiredDTBCLK +ffffffff821dbba0 T dml32_DSCDelayRequirement +ffffffff821dc070 T dml32_CalculateSurfaceSizeInMall +ffffffff821dcb80 T dml32_CalculateVMRowAndSwath +ffffffff821dd9b0 T dml32_CalculateVMAndRowBytes +ffffffff821de5f0 T dml32_CalculatePrefetchSourceLines +ffffffff821de840 T dml32_CalculateMALLUseForStaticScreen +ffffffff821de990 T dml32_CalculateRowBandwidth +ffffffff821deaf0 T dml32_CalculateUrgentLatency +ffffffff821deb90 T dml32_CalculateUrgentBurstFactor +ffffffff821dee40 T dml32_CalculateDCFCLKDeepSleep +ffffffff821df190 T dml32_CalculateWriteBackDelay +ffffffff821df2f0 T dml32_UseMinimumDCFCLK +ffffffff821e01b0 T dml32_CalculateExtraLatencyBytes +ffffffff821e0380 T dml32_CalculateTWait +ffffffff821e0460 T dml32_CalculateVUpdateAndDynamicMetadataParameters +ffffffff821e06c0 T dml32_get_return_bw_mbps +ffffffff821e0880 T dml32_get_return_bw_mbps_vm_only +ffffffff821e0960 T dml32_CalculateExtraLatency +ffffffff821e0b90 T dml32_CalculatePrefetchSchedule +ffffffff821e2140 T dml32_CalculateFlipSchedule +ffffffff821e26c0 T dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport +ffffffff821e3820 T dml32_CalculateWriteBackDISPCLK +ffffffff821e39e0 T dml32_CalculateMinAndMaxPrefetchMode +ffffffff821e3a20 T dml32_CalculatePixelDeliveryTimes +ffffffff821e3e90 T dml32_CalculateMetaAndPTETimes +ffffffff821e45d0 T dml32_CalculateVMGroupAndRequestTimes +ffffffff821e4ac0 T dml32_CalculateDCCConfiguration +ffffffff821e50e0 T dml32_CalculateStutterEfficiency +ffffffff821e6030 T dml32_CalculateMaxDETAndMinCompressedBufferSize +ffffffff821e6120 T dml32_CalculateVActiveBandwithSupport +ffffffff821e62b0 T dml32_CalculatePrefetchBandwithSupport +ffffffff821e6550 T dml32_CalculateBandwidthAvailableForImmediateFlip +ffffffff821e66a0 T dml32_CalculateImmediateFlipBandwithSupport +ffffffff821e68f0 T dml32_CalculateDETSwathFillLatencyHiding +ffffffff821e7000 T dml32_rq_dlg_get_rq_reg +ffffffff821e76a0 T dml32_rq_dlg_get_dlg_reg +ffffffff821ea000 T dcn321_insert_entry_into_table_sorted +ffffffff821ea430 T dcn321_update_bw_bounding_box_fpu +ffffffff821ec000 T dml_init_instance +ffffffff821ec310 T dml_get_status_message +ffffffff821ec350 T dml_log_pipe_params +ffffffff821ec380 T dml_log_mode_support_params +ffffffff821ed000 T dml_get_voltage_level +ffffffff821ed1f0 t fetch_socbb_params +ffffffff821ed700 t fetch_ip_params +ffffffff821edba0 t fetch_pipe_params +ffffffff821eeca0 T PixelClockAdjustmentForProgressiveToInterlaceUnit +ffffffff821eed20 T get_clk_dcf_deepsleep +ffffffff821eee30 T get_wm_urgent +ffffffff821eef40 T get_wm_memory_trip +ffffffff821ef050 T get_wm_writeback_urgent +ffffffff821ef160 T get_wm_stutter_exit +ffffffff821ef270 T get_wm_stutter_enter_exit +ffffffff821ef380 T get_wm_z8_stutter_exit +ffffffff821ef490 T get_wm_z8_stutter_enter_exit +ffffffff821ef5a0 T get_stutter_efficiency_z8 +ffffffff821ef6b0 T get_stutter_num_bursts_z8 +ffffffff821ef7c0 T get_wm_dram_clock_change +ffffffff821ef8d0 T get_wm_writeback_dram_clock_change +ffffffff821ef9e0 T get_stutter_efficiency +ffffffff821efaf0 T get_stutter_efficiency_no_vblank +ffffffff821efc00 T get_stutter_period +ffffffff821efd10 T get_urgent_latency +ffffffff821efe20 T get_urgent_extra_latency +ffffffff821eff30 T get_nonurgent_latency +ffffffff821f0040 T get_dram_clock_change_latency +ffffffff821f0150 T get_dispclk_calculated +ffffffff821f0260 T get_total_data_read_bw +ffffffff821f0370 T get_return_bw +ffffffff821f0480 T get_tcalc +ffffffff821f0590 T get_fraction_of_urgent_bandwidth +ffffffff821f06a0 T get_fraction_of_urgent_bandwidth_imm_flip +ffffffff821f07b0 T get_cstate_max_cap_mode +ffffffff821f08d0 T get_comp_buffer_size_kbytes +ffffffff821f09e0 T get_pixel_chunk_size_in_kbyte +ffffffff821f0b00 T get_alpha_pixel_chunk_size_in_kbyte +ffffffff821f0c20 T get_meta_chunk_size_in_kbyte +ffffffff821f0d40 T get_min_pixel_chunk_size_in_byte +ffffffff821f0e50 T get_min_meta_chunk_size_in_byte +ffffffff821f0f70 T get_fclk_watermark +ffffffff821f1080 T get_usr_retraining_watermark +ffffffff821f1190 T get_comp_buffer_reserved_space_kbytes +ffffffff821f12b0 T get_comp_buffer_reserved_space_64bytes +ffffffff821f13d0 T get_comp_buffer_reserved_space_zs +ffffffff821f14f0 T get_unbounded_request_enabled +ffffffff821f1610 T get_dsc_delay +ffffffff821f1740 T get_dppclk_calculated +ffffffff821f1860 T get_dscclk_calculated +ffffffff821f1980 T get_min_ttu_vblank +ffffffff821f1aa0 T get_min_ttu_vblank_in_us +ffffffff821f1bc0 T get_vratio_prefetch_l +ffffffff821f1ce0 T get_vratio_prefetch_c +ffffffff821f1e00 T get_dst_x_after_scaler +ffffffff821f1f20 T get_dst_y_after_scaler +ffffffff821f2040 T get_dst_y_per_vm_vblank +ffffffff821f2160 T get_dst_y_per_row_vblank +ffffffff821f2280 T get_dst_y_prefetch +ffffffff821f23a0 T get_dst_y_per_vm_flip +ffffffff821f24c0 T get_dst_y_per_row_flip +ffffffff821f25e0 T get_refcyc_per_vm_group_vblank +ffffffff821f2700 T get_refcyc_per_vm_group_flip +ffffffff821f2820 T get_refcyc_per_vm_req_vblank +ffffffff821f2940 T get_refcyc_per_vm_req_flip +ffffffff821f2a60 T get_refcyc_per_vm_group_vblank_in_us +ffffffff821f2b80 T get_refcyc_per_vm_group_flip_in_us +ffffffff821f2ca0 T get_refcyc_per_vm_req_vblank_in_us +ffffffff821f2dc0 T get_refcyc_per_vm_req_flip_in_us +ffffffff821f2ee0 T get_refcyc_per_vm_dmdata_in_us +ffffffff821f3000 T get_dmdata_dl_delta_in_us +ffffffff821f3120 T get_refcyc_per_line_delivery_l_in_us +ffffffff821f3240 T get_refcyc_per_line_delivery_c_in_us +ffffffff821f3360 T get_refcyc_per_line_delivery_pre_l_in_us +ffffffff821f3480 T get_refcyc_per_line_delivery_pre_c_in_us +ffffffff821f35a0 T get_refcyc_per_req_delivery_l_in_us +ffffffff821f36c0 T get_refcyc_per_req_delivery_c_in_us +ffffffff821f37e0 T get_refcyc_per_req_delivery_pre_l_in_us +ffffffff821f3900 T get_refcyc_per_req_delivery_pre_c_in_us +ffffffff821f3a20 T get_refcyc_per_cursor_req_delivery_in_us +ffffffff821f3b40 T get_refcyc_per_cursor_req_delivery_pre_in_us +ffffffff821f3c60 T get_refcyc_per_meta_chunk_nom_l_in_us +ffffffff821f3d80 T get_refcyc_per_meta_chunk_nom_c_in_us +ffffffff821f3ea0 T get_refcyc_per_meta_chunk_vblank_l_in_us +ffffffff821f3fc0 T get_refcyc_per_meta_chunk_vblank_c_in_us +ffffffff821f40e0 T get_refcyc_per_meta_chunk_flip_l_in_us +ffffffff821f4200 T get_refcyc_per_meta_chunk_flip_c_in_us +ffffffff821f4320 T get_vstartup +ffffffff821f4450 T get_vupdate_offset +ffffffff821f4580 T get_vupdate_width +ffffffff821f46a0 T get_vready_offset +ffffffff821f47c0 T get_vready_at_or_after_vsync +ffffffff821f48f0 T get_min_dst_y_next_start +ffffffff821f4a20 T get_dst_y_per_pte_row_nom_l +ffffffff821f4b40 T get_dst_y_per_pte_row_nom_c +ffffffff821f4c60 T get_dst_y_per_meta_row_nom_l +ffffffff821f4d80 T get_dst_y_per_meta_row_nom_c +ffffffff821f4ea0 T get_refcyc_per_pte_group_nom_l_in_us +ffffffff821f4fc0 T get_refcyc_per_pte_group_nom_c_in_us +ffffffff821f50e0 T get_refcyc_per_pte_group_vblank_l_in_us +ffffffff821f5200 T get_refcyc_per_pte_group_vblank_c_in_us +ffffffff821f5320 T get_refcyc_per_pte_group_flip_l_in_us +ffffffff821f5440 T get_refcyc_per_pte_group_flip_c_in_us +ffffffff821f5560 T get_vstartup_calculated +ffffffff821f5690 T get_dpte_row_height_linear_c +ffffffff821f57c0 T get_swath_height_l +ffffffff821f58f0 T get_swath_height_c +ffffffff821f5a20 T get_det_stored_buffer_size_l_bytes +ffffffff821f5b50 T get_det_stored_buffer_size_c_bytes +ffffffff821f5c80 T get_dpte_group_size_in_bytes +ffffffff821f5db0 T get_vm_group_size_in_bytes +ffffffff821f5ee0 T get_dpte_row_height_linear_l +ffffffff821f6010 T get_pte_buffer_mode +ffffffff821f6140 T get_subviewport_lines_needed_in_mall +ffffffff821f6270 T get_total_immediate_flip_bytes +ffffffff821f6390 T get_total_immediate_flip_bw +ffffffff821f6570 T get_total_prefetch_bw +ffffffff821f6750 T get_total_surface_size_in_mall_bytes +ffffffff821f6900 T get_det_buffer_size_kbytes +ffffffff821f6a30 T get_is_phantom_pipe +ffffffff821f6b60 T Calculate256BBlockSizes +ffffffff821f6c50 T CalculateMinAndMaxPrefetchMode +ffffffff821f6cd0 T ModeSupportAndSystemConfiguration +ffffffff821f6ff0 T CalculateWriteBackDISPCLK +ffffffff821f8000 T print__rq_params_st +ffffffff821f8030 T print__data_rq_sizing_params_st +ffffffff821f8060 T print__data_rq_dlg_params_st +ffffffff821f8090 T print__data_rq_misc_params_st +ffffffff821f80c0 T print__rq_dlg_params_st +ffffffff821f80f0 T print__dlg_sys_params_st +ffffffff821f8120 T print__data_rq_regs_st +ffffffff821f8150 T print__rq_regs_st +ffffffff821f8180 T print__dlg_regs_st +ffffffff821f81b0 T print__ttu_regs_st +ffffffff821f9000 T dml1_extract_rq_regs +ffffffff821f9330 T dml1_rq_dlg_get_rq_params +ffffffff821f9500 t get_surf_rq_param +ffffffff821fa200 T dml1_rq_dlg_get_dlg_params +ffffffff821fd000 T _do_calc_rc_params +ffffffff821fe040 t get_qp_set +ffffffff821ff000 T dc_dsc_parse_dsc_dpcd +ffffffff821ff2a0 t dsc_throughput_from_dpcd +ffffffff821ff460 T dc_dsc_compute_bandwidth_range +ffffffff821ff640 t intersect_dsc_caps +ffffffff821ff800 t setup_dsc_config +ffffffff822001d0 T dc_dsc_compute_config +ffffffff822002d0 T dc_dsc_stream_bandwidth_in_kbps +ffffffff82200430 T dc_dsc_stream_bandwidth_overhead_in_kbps +ffffffff82200580 T dc_dsc_get_policy_for_timing +ffffffff82200620 T dc_dsc_policy_set_max_target_bpp_limit +ffffffff82200650 T dc_dsc_policy_set_enable_dsc_when_not_needed +ffffffff82200680 T dc_dsc_policy_set_disable_dsc_stream_overhead +ffffffff82201000 T calc_rc_params +ffffffff82202000 T dscc_compute_dsc_parameters +ffffffff82203000 T dal_hw_factory_dce110_init +ffffffff82203060 t define_hpd_registers +ffffffff822030b0 t define_ddc_registers +ffffffff82204000 T dal_hw_translate_dce110_init +ffffffff82204030 t offset_to_id +ffffffff82204390 t id_to_offset +ffffffff82205000 T dal_hw_factory_dce120_init +ffffffff82205060 t define_hpd_registers +ffffffff822050b0 t define_ddc_registers +ffffffff82206000 T dal_hw_translate_dce120_init +ffffffff82206030 t offset_to_id +ffffffff822063a0 t id_to_offset +ffffffff82207000 T dal_hw_factory_dce80_init +ffffffff82207060 t define_hpd_registers +ffffffff822070b0 t define_ddc_registers +ffffffff82208000 T dal_hw_translate_dce80_init +ffffffff82208030 t offset_to_id +ffffffff822087b0 t id_to_offset +ffffffff82209000 T dal_hw_factory_dcn10_init +ffffffff82209060 t define_hpd_registers +ffffffff822090b0 t define_ddc_registers +ffffffff82209150 t define_generic_registers +ffffffff8220a000 T dal_hw_translate_dcn10_init +ffffffff8220a030 t offset_to_id +ffffffff8220a390 t id_to_offset +ffffffff8220b000 T dal_hw_factory_dcn20_init +ffffffff8220b060 t define_hpd_registers +ffffffff8220b0b0 t define_ddc_registers +ffffffff8220b160 t define_generic_registers +ffffffff8220c000 T dal_hw_translate_dcn20_init +ffffffff8220c030 t offset_to_id +ffffffff8220c2b0 t id_to_offset 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dal_gpio_service_create_irq +ffffffff82216320 T dal_gpio_create_irq +ffffffff822163a0 T dal_gpio_service_create_generic_mux +ffffffff82216440 T dal_gpio_destroy_generic_mux +ffffffff822164d0 T dal_gpio_get_generic_pin_info +ffffffff82216530 T dal_gpio_service_destroy +ffffffff82216660 T dal_mux_setup_config +ffffffff822166c0 T dal_gpio_service_lock +ffffffff82216740 T dal_gpio_service_unlock +ffffffff822167c0 T dal_gpio_service_open +ffffffff82216a00 T dal_gpio_service_close +ffffffff82216aa0 T dal_irq_get_source +ffffffff82216b10 T dal_irq_get_rx_source +ffffffff82216b60 T dal_irq_setup_hpd_filter +ffffffff82216bc0 T dal_gpio_destroy_irq +ffffffff82216c50 T dal_gpio_create_ddc +ffffffff82216dc0 T dal_gpio_destroy_ddc +ffffffff82216e90 T dal_ddc_close +ffffffff82216ee0 T dal_ddc_open +ffffffff82217040 T dal_ddc_change_mode +ffffffff822170e0 T dal_ddc_get_line +ffffffff82217100 T dal_ddc_set_config +ffffffff82218000 T dal_hw_ddc_init +ffffffff82218100 T dal_hw_ddc_get_pin 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sdmmc_cisptr -ffffffff825320a0 T sdmmc_read_cis -ffffffff825323b0 T sdmmc_print_cis -ffffffff82532520 T sdmmc_check_cis_quirks -ffffffff82533000 T sdmmc_io_enable -ffffffff825332a0 T sdmmc_io_reset -ffffffff825333d0 T sdmmc_io_send_op_cond -ffffffff82533540 T sdmmc_io_scan -ffffffff82533690 T sdmmc_io_init -ffffffff825337c0 T sdmmc_io_set_highspeed -ffffffff82533a70 T sdmmc_io_set_bus_width -ffffffff82533d00 T sdmmc_io_function_ready -ffffffff82533e80 T sdmmc_io_read_1 -ffffffff82533fd0 T sdmmc_io_function_enable -ffffffff825343a0 T sdmmc_io_write_1 -ffffffff82534520 T sdmmc_io_function_disable -ffffffff825347a0 T sdmmc_io_attach -ffffffff82534890 T sdmmc_print -ffffffff82534ae0 T sdmmc_submatch -ffffffff82534b60 T sdmmc_io_detach -ffffffff82534c10 T sdmmc_io_rw_direct -ffffffff82534db0 T sdmmc_io_rw_extended_subr -ffffffff82534f50 T sdmmc_io_rw_extended -ffffffff82535340 T sdmmc_io_read_2 -ffffffff825354a0 T sdmmc_io_write_2 -ffffffff82535600 T sdmmc_io_read_4 -ffffffff82535760 T sdmmc_io_write_4 -ffffffff825358c0 T sdmmc_io_read_multi_1 -ffffffff825359b0 T sdmmc_io_write_multi_1 -ffffffff82535aa0 T sdmmc_io_read_region_1 -ffffffff82535b90 T sdmmc_io_write_region_1 -ffffffff82535c80 T sdmmc_io_xchg -ffffffff82535e10 T sdmmc_intr_enable -ffffffff82536080 T sdmmc_intr_disable -ffffffff825362f0 T sdmmc_intr_establish -ffffffff825363f0 T sdmmc_intr_disestablish -ffffffff825364e0 T sdmmc_card_intr -ffffffff82536530 T sdmmc_intr_task -ffffffff825365c0 T sdmmc_io_set_blocklen -ffffffff82537000 T sdmmc_mem_enable -ffffffff825374e0 T sdmmc_mem_send_op_cond -ffffffff82537690 T sdmmc_mem_signal_voltage -ffffffff82537750 T sdmmc_mem_scan -ffffffff82537a60 T sdmmc_decode_csd -ffffffff82537e70 T sdmmc_decode_cid -ffffffff825382b0 T sdmmc_mem_send_scr -ffffffff825383f0 T sdmmc_mem_decode_scr -ffffffff82538470 T sdmmc_mem_send_cxd_data -ffffffff825385e0 T sdmmc_mem_set_bus_width -ffffffff82538700 T sdmmc_mem_sd_switch -ffffffff825389b0 T sdmmc_be512_to_bitfield512 -ffffffff82538a60 T sdmmc_mem_mmc_switch -ffffffff82538b50 T sdmmc_mem_init -ffffffff82538ca0 T sdmmc_mem_set_blocklen -ffffffff82538da0 T sdmmc_mem_sd_init -ffffffff82539350 T sdmmc_mem_mmc_init -ffffffff82539c70 T sdmmc_mem_select_transfer_mode -ffffffff82539cf0 T sdmmc_mem_execute_tuning -ffffffff82539d80 T sdmmc_mem_read_block_subr -ffffffff8253a0e0 T sdmmc_mem_single_read_block -ffffffff8253a1b0 T sdmmc_mem_read_block -ffffffff8253a370 T sdmmc_mem_write_block_subr -ffffffff8253a6c0 T sdmmc_mem_single_write_block -ffffffff8253a790 T sdmmc_mem_write_block -ffffffff8253a950 T sdmmc_mem_hibernate_write -ffffffff8253b000 T sdmmc_scsi_cmd -ffffffff8253b1f0 T sdmmc_minphys -ffffffff8253b270 T sdmmc_scsi_attach -ffffffff8253b460 T sdmmc_alloc_ccbs -ffffffff8253b5a0 T sdmmc_free_ccbs -ffffffff8253b600 T sdmmc_scsi_detach -ffffffff8253b760 T sdmmc_stimeout -ffffffff8253b7e0 T sdmmc_ccb_alloc -ffffffff8253b890 T sdmmc_ccb_free -ffffffff8253b970 T sdmmc_inquiry -ffffffff8253bba0 T sdmmc_start_xs -ffffffff8253bc90 T sdmmc_complete_xs -ffffffff8253bd60 T sdmmc_done_xs -ffffffff8253bdb0 T sdmmc_scsi_hibernate_io -ffffffff8253c000 T bwfm_sdio_preinit -ffffffff8253c4f0 T bwfm_sdio_txcheck -ffffffff8253c530 T bwfm_sdio_txdata -ffffffff8253c5a0 T bwfm_sdio_txctl -ffffffff8253c6f0 T bwfm_sdio_buscore_read -ffffffff8253c700 T bwfm_sdio_buscore_write -ffffffff8253c720 T bwfm_sdio_buscore_prepare -ffffffff8253c860 T bwfm_sdio_buscore_activate -ffffffff8253c8e0 T bwfm_sdio_match -ffffffff8253c9b0 T bwfm_sdio_attach -ffffffff8253cc70 T bwfm_sdio_detach -ffffffff8253ccd0 T bwfm_sdio_task -ffffffff8253ce30 T bwfm_sdio_write_1 -ffffffff8253ce60 T bwfm_sdio_read_1 -ffffffff8253ce90 T bwfm_sdio_write_4 -ffffffff8253cf40 T bwfm_sdio_read_4 -ffffffff8253cff0 T bwfm_sdio_load_microcode -ffffffff8253d250 T bwfm_sdio_clkctl -ffffffff8253d380 T bwfm_sdio_dev_write -ffffffff8253d3d0 T bwfm_sdio_intr -ffffffff8253d410 T bwfm_sdio_ram_read_write -ffffffff8253d640 T bwfm_sdio_htclk -ffffffff8253d8a0 T bwfm_sdio_readshared -ffffffff8253d970 T bwfm_sdio_dev_read -ffffffff8253d9b0 T bwfm_sdio_rx_frames -ffffffff8253dd40 T bwfm_sdio_tx_frames -ffffffff8253de20 T bwfm_sdio_backplane -ffffffff8253ded0 T bwfm_sdio_buf_read -ffffffff8253dfb0 T bwfm_sdio_buf_write -ffffffff8253e060 T bwfm_sdio_frame_read_write -ffffffff8253e1e0 T bwfm_sdio_newbuf -ffffffff8253e260 T bwfm_sdio_tx_ok -ffffffff8253e2b0 T bwfm_sdio_tx_ctrlframe -ffffffff8253e3b0 T bwfm_sdio_tx_dataframe -ffffffff8253e500 T bwfm_sdio_rx_glom -ffffffff8253f000 T onewire_match -ffffffff8253f050 T onewire_attach -ffffffff8253f0f0 T onewire_detach -ffffffff8253f160 T onewire_activate -ffffffff8253f180 T onewire_scan -ffffffff8253f390 T onewire_createthread -ffffffff8253f400 T onewire_print -ffffffff8253f4d0 T onewirebus_print -ffffffff8253f520 T onewire_lock -ffffffff8253f540 T onewire_unlock -ffffffff8253f560 T onewire_reset -ffffffff8253f580 T onewire_bit -ffffffff8253f5a0 T onewire_read_byte -ffffffff8253f6e0 T onewire_write_byte -ffffffff8253f7c0 T onewire_read_block -ffffffff8253f860 T onewire_write_block -ffffffff8253f900 T onewire_triplet -ffffffff8253f9e0 T onewire_matchrom -ffffffff8253fb30 T onewire_search -ffffffff8253fec0 T onewire_thread -ffffffff82540000 T onewire_crc -ffffffff825400e0 T onewire_crc16 -ffffffff825401c0 T onewire_famname -ffffffff82540200 T onewire_matchbyfam -ffffffff82541000 T owid_match -ffffffff82541030 T owid_attach -ffffffff82541100 T owid_detach -ffffffff82541140 T owid_activate -ffffffff82542000 T owsbm_match -ffffffff82542030 T owsbm_attach -ffffffff825421d0 T owsbm_detach -ffffffff82542240 T owsbm_activate -ffffffff82542270 T owsbm_update -ffffffff82543000 T owtemp_match -ffffffff82543030 T owtemp_attach -ffffffff82543130 T owtemp_detach -ffffffff825431a0 T owtemp_activate -ffffffff825431d0 T owtemp_update -ffffffff82544000 T owctr_match -ffffffff82544030 T owctr_attach -ffffffff82544180 T owctr_detach -ffffffff825441f0 T owctr_activate -ffffffff82544220 T owctr_update -ffffffff82544250 T owctr_update_counter -ffffffff82545000 A __text_page_start -ffffffff82545000 T Xsyscall_meltdown -ffffffff8254500c T Xsyscall -ffffffff8254526e t Xsyscall_trampback -ffffffff82545280 T intr_user_exit -ffffffff825452c2 t intr_user_exit_post_ast -ffffffff825453ee t Xiretq_trampback -ffffffff825453fa T doreti_iret -ffffffff82546000 T alltraps -ffffffff82546138 T recall_trap -ffffffff82546150 T alltraps_kern -ffffffff82546153 T alltraps_kern_meltdown -ffffffff82547000 ? Xsyscall32 -ffffffff82547000 A __kutext_start -ffffffff82547000 A __text_page_end -ffffffff82548000 ? Xtrap00 -ffffffff82548010 ? Xtrap01 -ffffffff82548020 ? Xtrap02 -ffffffff82548024 c calltrap_specstk -ffffffff825480f0 ? calltrap_specstk_tramp -ffffffff82548110 ? Xtrap03 -ffffffff82548120 ? Xtrap04 -ffffffff82548130 ? Xtrap05 -ffffffff82548140 ? Xtrap06 -ffffffff82548150 ? Xtrap07 -ffffffff82548160 ? Xtrap08 -ffffffff82548170 ? Xtrap09 -ffffffff82548180 ? Xtrap0a -ffffffff82548190 ? Xtrap0b -ffffffff825481a0 ? Xtrap0c -ffffffff825481b0 ? Xtrap0d -ffffffff82548230 ? Xtrap0e -ffffffff82548240 ? Xintrspurious -ffffffff82548240 ? Xtrap0f -ffffffff82548250 ? Xtrap10 -ffffffff82548260 ? Xtrap11 -ffffffff82548270 ? Xtrap12 -ffffffff82548280 ? Xtrap13 -ffffffff82548290 ? Xtrap14 -ffffffff825482a0 ? Xtrap15 -ffffffff825482b0 ? Xtrap16 -ffffffff825482b0 ? Xtrap17 -ffffffff825482b0 ? Xtrap18 -ffffffff825482b0 ? Xtrap19 -ffffffff825482b0 ? Xtrap1a -ffffffff825482b0 ? Xtrap1b -ffffffff825482b0 ? Xtrap1c -ffffffff825482b0 ? Xtrap1d -ffffffff825482b0 ? Xtrap1e -ffffffff825482b0 ? Xtrap1f -ffffffff825482c0 ? x2apic_eoi -ffffffff825482e0 ? Xintr_lapic_ipi -ffffffff82548310 ? Xipi_invltlb -ffffffff82548330 ? Xipi_invlpg -ffffffff82548360 ? Xipi_invlrange -ffffffff825483a0 ? Xipi_invltlb_pcid -ffffffff825483e0 ? Xipi_invlpg_pcid -ffffffff82548430 ? Xipi_invlrange_pcid -ffffffff825484a0 ? Xintr_lapic_ltimer -ffffffff825484d0 ? Xintr_xen_upcall -ffffffff82548500 ? Xintr_hyperv_upcall -ffffffff82548530 ? Xintr_legacy0 -ffffffff82548560 ? Xintr_legacy1 -ffffffff82548590 ? Xintr_legacy2 -ffffffff825485c0 ? Xintr_legacy3 -ffffffff825485f0 ? Xintr_legacy4 -ffffffff82548620 ? Xintr_legacy5 -ffffffff82548650 ? Xintr_legacy6 -ffffffff82548680 ? Xintr_legacy7 -ffffffff825486b0 ? Xintr_legacy8 -ffffffff825486e0 ? Xintr_legacy9 -ffffffff82548710 ? Xintr_legacy10 -ffffffff82548740 ? Xintr_legacy11 -ffffffff82548770 ? Xintr_legacy12 -ffffffff825487a0 ? Xintr_legacy13 -ffffffff825487d0 ? Xintr_legacy14 -ffffffff82548800 ? Xintr_legacy15 -ffffffff82548830 ? Xintr_ioapic_edge0 -ffffffff82548860 ? Xintr_ioapic_edge1 -ffffffff82548890 ? Xintr_ioapic_edge2 -ffffffff825488c0 ? Xintr_ioapic_edge3 -ffffffff825488f0 ? Xintr_ioapic_edge4 -ffffffff82548920 ? Xintr_ioapic_edge5 -ffffffff82548950 ? Xintr_ioapic_edge6 -ffffffff82548980 ? Xintr_ioapic_edge7 -ffffffff825489b0 ? Xintr_ioapic_edge8 -ffffffff825489e0 ? Xintr_ioapic_edge9 -ffffffff82548a10 ? Xintr_ioapic_edge10 -ffffffff82548a40 ? Xintr_ioapic_edge11 -ffffffff82548a70 ? Xintr_ioapic_edge12 -ffffffff82548aa0 ? Xintr_ioapic_edge13 -ffffffff82548ad0 ? Xintr_ioapic_edge14 -ffffffff82548b00 ? Xintr_ioapic_edge15 -ffffffff82548b30 ? Xintr_ioapic_edge16 -ffffffff82548b60 ? Xintr_ioapic_edge17 -ffffffff82548b90 ? Xintr_ioapic_edge18 -ffffffff82548bc0 ? Xintr_ioapic_edge19 -ffffffff82548bf0 ? Xintr_ioapic_edge20 -ffffffff82548c20 ? Xintr_ioapic_edge21 -ffffffff82548c50 ? Xintr_ioapic_edge22 -ffffffff82548c80 ? Xintr_ioapic_edge23 -ffffffff82548cb0 ? Xintr_ioapic_edge24 -ffffffff82548ce0 ? Xintr_ioapic_edge25 -ffffffff82548d10 ? Xintr_ioapic_edge26 -ffffffff82548d40 ? Xintr_ioapic_edge27 -ffffffff82548d70 ? Xintr_ioapic_edge28 -ffffffff82548da0 ? Xintr_ioapic_edge29 -ffffffff82548dd0 ? Xintr_ioapic_edge30 -ffffffff82548e00 ? Xintr_ioapic_edge31 -ffffffff82548e30 ? Xintr_ioapic_edge32 -ffffffff82548e60 ? Xintr_ioapic_edge33 -ffffffff82548e90 ? Xintr_ioapic_edge34 -ffffffff82548ec0 ? Xintr_ioapic_edge35 -ffffffff82548ef0 ? Xintr_ioapic_edge36 -ffffffff82548f20 ? Xintr_ioapic_edge37 -ffffffff82548f50 ? Xintr_ioapic_edge38 -ffffffff82548f80 ? Xintr_ioapic_edge39 -ffffffff82548fb0 ? Xintr_ioapic_edge40 -ffffffff82548fe0 ? Xintr_ioapic_edge41 -ffffffff82549010 ? Xintr_ioapic_edge42 -ffffffff82549040 ? Xintr_ioapic_edge43 -ffffffff82549070 ? Xintr_ioapic_edge44 -ffffffff825490a0 ? Xintr_ioapic_edge45 -ffffffff825490d0 ? Xintr_ioapic_edge46 -ffffffff82549100 ? Xintr_ioapic_edge47 -ffffffff82549130 ? Xintr_ioapic_edge48 -ffffffff82549160 ? Xintr_ioapic_edge49 -ffffffff82549190 ? Xintr_ioapic_edge50 -ffffffff825491c0 ? Xintr_ioapic_edge51 -ffffffff825491f0 ? Xintr_ioapic_edge52 -ffffffff82549220 ? Xintr_ioapic_edge53 -ffffffff82549250 ? Xintr_ioapic_edge54 -ffffffff82549280 ? Xintr_ioapic_edge55 -ffffffff825492b0 ? Xintr_ioapic_edge56 -ffffffff825492e0 ? Xintr_ioapic_edge57 -ffffffff82549310 ? Xintr_ioapic_edge58 -ffffffff82549340 ? Xintr_ioapic_edge59 -ffffffff82549370 ? Xintr_ioapic_edge60 -ffffffff825493a0 ? Xintr_ioapic_edge61 -ffffffff825493d0 ? Xintr_ioapic_edge62 -ffffffff82549400 ? Xintr_ioapic_edge63 -ffffffff82549430 ? Xintr_ioapic_level0 -ffffffff82549460 ? Xintr_ioapic_level1 -ffffffff82549490 ? Xintr_ioapic_level2 -ffffffff825494c0 ? Xintr_ioapic_level3 -ffffffff825494f0 ? Xintr_ioapic_level4 -ffffffff82549520 ? Xintr_ioapic_level5 -ffffffff82549550 ? Xintr_ioapic_level6 -ffffffff82549580 ? Xintr_ioapic_level7 -ffffffff825495b0 ? Xintr_ioapic_level8 -ffffffff825495e0 ? Xintr_ioapic_level9 -ffffffff82549610 ? Xintr_ioapic_level10 -ffffffff82549640 ? Xintr_ioapic_level11 -ffffffff82549670 ? Xintr_ioapic_level12 -ffffffff825496a0 ? Xintr_ioapic_level13 -ffffffff825496d0 ? Xintr_ioapic_level14 -ffffffff82549700 ? Xintr_ioapic_level15 -ffffffff82549730 ? Xintr_ioapic_level16 -ffffffff82549760 ? Xintr_ioapic_level17 -ffffffff82549790 ? Xintr_ioapic_level18 -ffffffff825497c0 ? Xintr_ioapic_level19 -ffffffff825497f0 ? Xintr_ioapic_level20 -ffffffff82549820 ? Xintr_ioapic_level21 -ffffffff82549850 ? Xintr_ioapic_level22 -ffffffff82549880 ? Xintr_ioapic_level23 -ffffffff825498b0 ? Xintr_ioapic_level24 -ffffffff825498e0 ? Xintr_ioapic_level25 -ffffffff82549910 ? Xintr_ioapic_level26 -ffffffff82549940 ? Xintr_ioapic_level27 -ffffffff82549970 ? Xintr_ioapic_level28 -ffffffff825499a0 ? Xintr_ioapic_level29 -ffffffff825499d0 ? Xintr_ioapic_level30 -ffffffff82549a00 ? Xintr_ioapic_level31 -ffffffff82549a30 ? Xintr_ioapic_level32 -ffffffff82549a60 ? Xintr_ioapic_level33 -ffffffff82549a90 ? Xintr_ioapic_level34 -ffffffff82549ac0 ? Xintr_ioapic_level35 -ffffffff82549af0 ? Xintr_ioapic_level36 -ffffffff82549b20 ? Xintr_ioapic_level37 -ffffffff82549b50 ? Xintr_ioapic_level38 -ffffffff82549b80 ? Xintr_ioapic_level39 -ffffffff82549bb0 ? Xintr_ioapic_level40 -ffffffff82549be0 ? Xintr_ioapic_level41 -ffffffff82549c10 ? Xintr_ioapic_level42 -ffffffff82549c40 ? Xintr_ioapic_level43 -ffffffff82549c70 ? Xintr_ioapic_level44 -ffffffff82549ca0 ? Xintr_ioapic_level45 -ffffffff82549cd0 ? Xintr_ioapic_level46 -ffffffff82549d00 ? Xintr_ioapic_level47 -ffffffff82549d30 ? Xintr_ioapic_level48 -ffffffff82549d60 ? Xintr_ioapic_level49 -ffffffff82549d90 ? Xintr_ioapic_level50 -ffffffff82549dc0 ? Xintr_ioapic_level51 -ffffffff82549df0 ? Xintr_ioapic_level52 -ffffffff82549e20 ? Xintr_ioapic_level53 -ffffffff82549e50 ? Xintr_ioapic_level54 -ffffffff82549e80 ? Xintr_ioapic_level55 -ffffffff82549eb0 ? Xintr_ioapic_level56 -ffffffff82549ee0 ? Xintr_ioapic_level57 -ffffffff82549f10 ? Xintr_ioapic_level58 -ffffffff82549f40 ? Xintr_ioapic_level59 -ffffffff82549f70 ? Xintr_ioapic_level60 -ffffffff82549fa0 ? Xintr_ioapic_level61 -ffffffff82549fd0 ? Xintr_ioapic_level62 -ffffffff8254a000 ? Xintr_ioapic_level63 -ffffffff8254b000 ? codepatch_fill_nop -ffffffff8254b000 A __cptext_start -ffffffff8254b000 A __kutext_end -ffffffff8254b0b0 ? codepatch_maprw -ffffffff8254b190 ? codepatch_unmaprw -ffffffff8254b200 ? codepatch_nop -ffffffff8254b360 ? codepatch_replace -ffffffff8254b510 ? codepatch_call -ffffffff8254b530 ? codepatch_jmp -ffffffff8254c000 A __cptext_end -ffffffff8254c000 A __rodata_start -ffffffff8254c000 C _etext -ffffffff8254c000 C etext -ffffffff8254d000 r seeprom_read -ffffffff8254d004 r icl_mg_pll_find_divisors.div1_vals -ffffffff8254d028 r gen9bc_tgp_ddc_pin_map -ffffffff8254d038 r athn_ac2qid -ffffffff8254d038 r athn_ac2qid -ffffffff8254d038 r athn_ac2qid -ffffffff8254d044 r rtwn_get_rssi.cckoff -ffffffff8254d06c r rsu_ac2qid -ffffffff8254d07c r pckbc_portcmd -ffffffff8254d080 r tht_fifo_write_pad.pad -ffffffff8254d088 r rsu_get_rssi.cckoff -ffffffff8254d09c r adlp_n_revids -ffffffff8254d0ec r apple_iso_trans -ffffffff8254d0f0 r dg2_g12_revid_step_tbl -ffffffff8254d0f8 r wihap_check_tx.txratetable -ffffffff8254d0fc r dmamode -ffffffff8254d124 r gen9_edram_size_mb.sets -ffffffff8254e000 r isomappings -ffffffff8254e080 r unimappings -ffffffff8254e230 r replacements -ffffffff82551b06 r cmd0646_9_tim_udma -ffffffff825a551a r pp_r600_decoded_lanes -ffffffff825c0844 r cmd680_setup_channel.udma_tbl -ffffffff825c84b0 r apollo_udma33_tim -ffffffff825ce59d r substchar -ffffffff825d0643 r apollo_udma100_tim -ffffffff825f7f6a r apollo_udma66_tim -ffffffff825ff3fd r apollo_pio_rec -ffffffff8260e7d8 r cy_pio_rec -ffffffff8263dc75 r apollo_udma133_tim -ffffffff8264a800 R drm_ca -ffffffff8264a828 R drm_filtops -ffffffff8264a858 R drmread_filtops -ffffffff8264b000 r vga_emulops -ffffffff8264b048 R vga_stdscreen -ffffffff8264b078 R vga_stdscreen_mono -ffffffff8264b0a8 R vga_stdscreen_bf -ffffffff8264b0d8 R vga_40lscreen -ffffffff8264b108 R vga_40lscreen_mono -ffffffff8264b138 R vga_40lscreen_bf -ffffffff8264b168 R vga_50lscreen -ffffffff8264b198 R vga_50lscreen_mono -ffffffff8264b1c8 R vga_50lscreen_bf -ffffffff8264b1f8 R vga_screenlist -ffffffff8264b208 R vga_screenlist_mono -ffffffff8264b218 R vga_accessops -ffffffff8264b278 r i945_wm_info -ffffffff8264b2b0 r bgansitopc -ffffffff8264b2b8 r pctoansi -ffffffff8264b2f8 r sdma_offsets -ffffffff8264b2f8 r sdma_offsets -ffffffff8264b328 r iha_rate_tbl -ffffffff8264b360 r i830_a_wm_info -ffffffff8264b398 r gen9_edram_size_mb.ways -ffffffff8264b400 r aggr_periodic_times -ffffffff8264b480 r jsl_ehl_revids -ffffffff8264b4f8 r michael_final.pad -ffffffff8264b520 r rt_copysa.maskarray -ffffffff8264b528 r i915_wm_info -ffffffff8264b530 r amdgpu_ih_clientid_jpeg -ffffffff8264b530 r amdgpu_ih_clientid_uvds -ffffffff8264b530 r amdgpu_ih_clientid_vcns -ffffffff8264b530 r amdgpu_ih_clientid_vcns -ffffffff8264b530 r amdgpu_ih_clientid_vcns -ffffffff8264b568 r vga_setfontset.cmaptabb -ffffffff8264b580 r tgl_revids -ffffffff8264b5d8 r i830_bc_wm_info -ffffffff8264b648 r hsw_activate_psr2.map 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+ffffffff8222d390 T dal_irq_service_ack_generic +ffffffff8222d400 T dal_irq_service_to_irq_source +ffffffff8222e000 T dp_trace_init +ffffffff8222e0a0 T dp_trace_reset +ffffffff8222e130 T dc_dp_trace_is_initialized +ffffffff8222e160 T dp_trace_detect_lt_init +ffffffff8222e1b0 T dp_trace_commit_lt_init +ffffffff8222e200 T dp_trace_link_loss_increment +ffffffff8222e230 T dp_trace_lt_fail_count_update +ffffffff8222e270 T dp_trace_lt_total_count_increment +ffffffff8222e2b0 T dc_dp_trace_set_is_logged_flag +ffffffff8222e2f0 T dc_dp_trace_is_logged +ffffffff8222e330 T dp_trace_lt_result_update +ffffffff8222e370 T dp_trace_set_lt_start_timestamp +ffffffff8222e450 T dp_trace_set_lt_end_timestamp +ffffffff8222e530 T dc_dp_trace_get_lt_end_timestamp +ffffffff8222e570 T dc_dp_trace_get_lt_counts +ffffffff8222e5b0 T dc_dp_trace_get_link_loss_count +ffffffff8222e5e0 T dp_trace_set_edp_power_timestamp +ffffffff8222e6c0 T dp_trace_get_edp_poweron_timestamp +ffffffff8222e6f0 T dp_trace_get_edp_poweroff_timestamp +ffffffff8222f000 T set_dio_throttled_vcp_size +ffffffff8222f020 T setup_dio_stream_encoder +ffffffff8222f0e0 T reset_dio_stream_encoder +ffffffff8222f1a0 T setup_dio_stream_attribute +ffffffff8222f320 T enable_dio_dp_link_output +ffffffff8222f390 T disable_dio_link_output +ffffffff8222f3d0 T set_dio_dp_link_test_pattern +ffffffff8222f410 T set_dio_dp_lane_settings +ffffffff8222f450 T can_use_dio_link_hwss +ffffffff8222f490 T get_dio_link_hwss +ffffffff8222f4c0 t update_dio_stream_allocation_table +ffffffff82230000 T can_use_dpia_link_hwss +ffffffff82230050 T get_dpia_link_hwss +ffffffff82230080 t update_dpia_stream_allocation_table +ffffffff82231000 T can_use_hpo_dp_link_hwss +ffffffff82231030 T get_hpo_dp_link_hwss +ffffffff82231060 t set_hpo_dp_hblank_min_symbol_width +ffffffff82231130 t set_hpo_dp_throttled_vcp_size +ffffffff82231160 t enable_hpo_dp_link_output +ffffffff82231290 t set_hpo_dp_link_test_pattern +ffffffff822312d0 t set_hpo_dp_lane_settings +ffffffff82231300 t update_hpo_dp_stream_allocation_table +ffffffff82231320 t setup_hpo_dp_stream_encoder +ffffffff822314a0 t reset_hpo_dp_stream_encoder +ffffffff82231590 t setup_hpo_dp_stream_attribute +ffffffff822315f0 t disable_hpo_dp_link_output +ffffffff82232000 T virtual_link_encoder_construct +ffffffff82232060 t virtual_link_encoder_validate_output_with_stream +ffffffff82232090 t virtual_link_encoder_hw_init +ffffffff822320c0 t virtual_link_encoder_setup +ffffffff822320f0 t virtual_link_encoder_enable_tmds_output +ffffffff82232120 t virtual_link_encoder_enable_dp_output +ffffffff82232150 t virtual_link_encoder_enable_dp_mst_output +ffffffff82232180 t virtual_link_encoder_disable_output +ffffffff822321b0 t virtual_link_encoder_dp_set_lane_settings +ffffffff822321e0 t virtual_link_encoder_dp_set_phy_pattern +ffffffff82232210 t virtual_link_encoder_update_mst_stream_allocation_table +ffffffff82232240 t virtual_link_encoder_connect_dig_be_to_fe +ffffffff82232270 t virtual_link_encoder_destroy +ffffffff822322c0 t virtual_link_encoder_get_max_link_cap +ffffffff82233000 T virtual_setup_stream_encoder +ffffffff82233030 T virtual_setup_stream_attribute +ffffffff82233060 T virtual_reset_stream_encoder +ffffffff82233090 T get_virtual_link_hwss +ffffffff822330c0 t virtual_disable_link_output +ffffffff82234000 T virtual_stream_encoder_construct +ffffffff82234050 T virtual_stream_encoder_create +ffffffff82234110 t virtual_stream_encoder_dp_set_stream_attribute +ffffffff82234140 t virtual_stream_encoder_hdmi_set_stream_attribute +ffffffff82234170 t virtual_stream_encoder_dvi_set_stream_attribute +ffffffff822341a0 t virtual_stream_encoder_set_throttled_vcp_size +ffffffff822341d0 t virtual_stream_encoder_update_hdmi_info_packets +ffffffff82234200 t virtual_stream_encoder_stop_hdmi_info_packets +ffffffff82234230 t virtual_stream_encoder_update_dp_info_packets +ffffffff82234260 t virtual_stream_encoder_stop_dp_info_packets +ffffffff82234290 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dmub_dcn20_setup_outbox0 +ffffffff82235cd0 T dmub_dcn20_get_outbox0_wptr +ffffffff82235d00 T dmub_dcn20_set_outbox0_rptr +ffffffff82235d30 T dmub_dcn20_is_hw_init +ffffffff82235d90 T dmub_dcn20_is_supported +ffffffff82235df0 T dmub_dcn20_set_gpint +ffffffff82235e20 T dmub_dcn20_is_gpint_acked +ffffffff82235e80 T dmub_dcn20_get_gpint_response +ffffffff82235eb0 T dmub_dcn20_get_fw_boot_status +ffffffff82235ee0 T dmub_dcn20_enable_dmub_boot_options +ffffffff82235f10 T dmub_dcn20_skip_dmub_panel_power_sequence +ffffffff82235f70 T dmub_dcn20_get_current_time +ffffffff82235fa0 T dmub_dcn20_get_diagnostic_data +ffffffff82237000 T dmub_dcn21_is_phy_init +ffffffff82238000 T dmub_dcn30_backdoor_load +ffffffff82238260 T dmub_dcn30_setup_windows +ffffffff82239000 T dmub_dcn31_reset +ffffffff82239280 T dmub_dcn31_reset_release +ffffffff82239350 T dmub_dcn31_backdoor_load +ffffffff822395b0 T dmub_dcn31_setup_windows +ffffffff822398f0 T dmub_dcn31_setup_mailbox +ffffffff82239940 T dmub_dcn31_get_inbox1_rptr +ffffffff82239970 T dmub_dcn31_set_inbox1_wptr +ffffffff822399a0 T dmub_dcn31_setup_out_mailbox +ffffffff822399f0 T dmub_dcn31_get_outbox1_wptr +ffffffff82239a20 T dmub_dcn31_set_outbox1_rptr +ffffffff82239a50 T dmub_dcn31_is_hw_init +ffffffff82239ad0 T dmub_dcn31_is_supported +ffffffff82239b30 T dmub_dcn31_set_gpint +ffffffff82239b60 T dmub_dcn31_is_gpint_acked +ffffffff82239bc0 T dmub_dcn31_get_gpint_response +ffffffff82239bf0 T dmub_dcn31_get_gpint_dataout +ffffffff82239d10 T dmub_dcn31_get_fw_boot_status +ffffffff82239d40 T dmub_dcn31_enable_dmub_boot_options +ffffffff82239dc0 T dmub_dcn31_skip_dmub_panel_power_sequence +ffffffff82239e20 T dmub_dcn31_setup_outbox0 +ffffffff82239e70 T dmub_dcn31_get_outbox0_wptr +ffffffff82239ea0 T dmub_dcn31_set_outbox0_rptr +ffffffff82239ed0 T dmub_dcn31_get_current_time +ffffffff82239f00 T dmub_dcn31_get_diagnostic_data +ffffffff8223a3a0 T dmub_dcn31_should_detect +ffffffff8223b000 T dmub_dcn32_reset +ffffffff8223b1d0 T dmub_dcn32_reset_release +ffffffff8223b2c0 T dmub_dcn32_backdoor_load +ffffffff8223b520 T dmub_dcn32_backdoor_load_zfb_mode +ffffffff8223b710 T dmub_dcn32_setup_windows +ffffffff8223ba50 T dmub_dcn32_setup_mailbox +ffffffff8223baa0 T dmub_dcn32_get_inbox1_rptr +ffffffff8223bad0 T dmub_dcn32_set_inbox1_wptr +ffffffff8223bb00 T dmub_dcn32_setup_out_mailbox +ffffffff8223bb50 T dmub_dcn32_get_outbox1_wptr +ffffffff8223bb80 T dmub_dcn32_set_outbox1_rptr +ffffffff8223bbb0 T dmub_dcn32_is_hw_init +ffffffff8223bc30 T dmub_dcn32_is_supported +ffffffff8223bc90 T dmub_dcn32_set_gpint +ffffffff8223bcc0 T dmub_dcn32_is_gpint_acked +ffffffff8223bd20 T dmub_dcn32_get_gpint_response +ffffffff8223bd50 T dmub_dcn32_get_gpint_dataout +ffffffff8223be70 T dmub_dcn32_get_fw_boot_status +ffffffff8223bea0 T dmub_dcn32_enable_dmub_boot_options +ffffffff8223bed0 T dmub_dcn32_skip_dmub_panel_power_sequence +ffffffff8223bf30 T dmub_dcn32_setup_outbox0 +ffffffff8223bf80 T dmub_dcn32_get_outbox0_wptr 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dmub_srv_wait_for_phy_init +ffffffff8223f280 T dmub_srv_wait_for_idle +ffffffff8223f330 T dmub_srv_send_gpint_command +ffffffff8223f420 T dmub_srv_get_gpint_response +ffffffff8223f480 T dmub_srv_get_gpint_dataout +ffffffff8223f4e0 T dmub_srv_get_fw_boot_status +ffffffff8223f550 T dmub_srv_cmd_with_reply_data +ffffffff8223f7c0 T dmub_srv_get_outbox0_msg +ffffffff8223f860 T dmub_srv_get_diagnostic_data +ffffffff8223f8c0 T dmub_srv_should_detect +ffffffff8223f910 T dmub_srv_clear_inbox0_ack +ffffffff8223f960 T dmub_srv_wait_for_inbox0_ack +ffffffff8223f9f0 T dmub_srv_send_inbox0_cmd +ffffffff82240000 T dmub_srv_stat_get_notification +ffffffff82241000 T setup_x_points_distribution +ffffffff82241170 T log_x_points_distribution +ffffffff822411a0 T precompute_pq +ffffffff82241370 t compute_pq +ffffffff82241580 T precompute_de_pq +ffffffff822416e0 t compute_de_pq +ffffffff822419a0 T calculate_user_regamma_coeff +ffffffff82241d70 t apply_lut_1d +ffffffff822420a0 T calculate_user_regamma_ramp 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mod_freesync_calc_nominal_field_rate +ffffffff82248d30 T mod_freesync_handle_preflip +ffffffff82249150 T mod_freesync_handle_v_update +ffffffff82249610 T mod_freesync_get_settings +ffffffff82249680 T mod_freesync_calc_field_rate_from_timing +ffffffff822496d0 T mod_freesync_get_freesync_enabled +ffffffff82249700 T mod_freesync_is_valid_range +ffffffff8224a000 T mod_build_vsc_infopacket +ffffffff8224a200 T mod_build_hf_vsif_infopacket +ffffffff8224b000 T dmub_init_abm_config +ffffffff8224b540 t fill_iram_v_2_3 +ffffffff8224b9a0 T dmcu_load_iram +ffffffff8224c180 T is_psr_su_specific_panel +ffffffff8224c210 T mod_power_calc_psr_configs +ffffffff8224c310 T mod_power_only_edp +ffffffff8224d000 T mod_vmid_get_for_ptb +ffffffff8224d230 T mod_vmid_reset +ffffffff8224d2f0 T mod_vmid_create +ffffffff8224d430 T mod_vmid_destroy +ffffffff8224e000 T amdgpu_dpm_get_sclk +ffffffff8224e090 T amdgpu_dpm_get_mclk +ffffffff8224e120 T amdgpu_dpm_set_powergating_by_smu +ffffffff8224e200 T amdgpu_dpm_set_gfx_power_up_by_imu +ffffffff8224e310 T amdgpu_dpm_baco_enter +ffffffff8224e3a0 T amdgpu_dpm_baco_exit +ffffffff8224e430 T amdgpu_dpm_set_mp1_state +ffffffff8224e4d0 T amdgpu_dpm_is_baco_supported +ffffffff8224e580 T amdgpu_dpm_mode2_reset +ffffffff8224e610 T amdgpu_dpm_baco_reset +ffffffff8224e6c0 T amdgpu_dpm_is_mode1_reset_supported +ffffffff8224e730 T amdgpu_dpm_mode1_reset +ffffffff8224e7b0 T amdgpu_dpm_switch_power_profile +ffffffff8224e860 T amdgpu_dpm_set_xgmi_pstate +ffffffff8224e900 T amdgpu_dpm_set_df_cstate +ffffffff8224e9a0 T amdgpu_dpm_allow_xgmi_power_down +ffffffff8224ea20 T amdgpu_dpm_enable_mgpu_fan_boost +ffffffff8224eab0 T amdgpu_dpm_set_clockgating_by_smu +ffffffff8224eb50 T amdgpu_dpm_smu_i2c_bus_access +ffffffff8224ebf0 T amdgpu_pm_acpi_event_handler +ffffffff8224ecb0 T amdgpu_dpm_read_sensor +ffffffff8224ed70 T amdgpu_dpm_compute_clocks +ffffffff8224ee50 T amdgpu_dpm_enable_uvd +ffffffff8224f040 T amdgpu_dpm_enable_vce +ffffffff8224f230 T amdgpu_dpm_enable_jpeg +ffffffff8224f330 T amdgpu_pm_load_smu_firmware +ffffffff8224f3e0 T amdgpu_dpm_handle_passthrough_sbr +ffffffff8224f460 T amdgpu_dpm_send_hbm_bad_pages_num +ffffffff8224f4e0 T amdgpu_dpm_send_hbm_bad_channel_flag +ffffffff8224f560 T amdgpu_dpm_get_dpm_freq_range +ffffffff8224f600 T amdgpu_dpm_set_soft_freq_range +ffffffff8224f6a0 T amdgpu_dpm_write_watermarks_table +ffffffff8224f720 T amdgpu_dpm_wait_for_event +ffffffff8224f7b0 T amdgpu_dpm_set_residency_gfxoff +ffffffff8224f830 T amdgpu_dpm_get_residency_gfxoff +ffffffff8224f8b0 T amdgpu_dpm_get_entrycount_gfxoff +ffffffff8224f930 T amdgpu_dpm_get_status_gfxoff +ffffffff8224f9b0 T amdgpu_dpm_get_thermal_throttling_counter +ffffffff8224fa00 T amdgpu_dpm_gfx_state_change +ffffffff8224fa70 T amdgpu_dpm_get_ecc_info +ffffffff8224faf0 T amdgpu_dpm_get_vce_clock_state +ffffffff8224fb80 T amdgpu_dpm_get_current_power_state +ffffffff8224fbf0 T amdgpu_dpm_set_power_state +ffffffff8224fd50 T amdgpu_dpm_dispatch_task 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amdgpu_dpm_set_watermarks_for_clocks_ranges +ffffffff82251710 T amdgpu_dpm_display_clock_voltage_request +ffffffff822517a0 T amdgpu_dpm_get_current_clocks +ffffffff82251830 T amdgpu_dpm_notify_smu_enable_pwe +ffffffff822518b0 T amdgpu_dpm_set_active_display_count +ffffffff82251940 T amdgpu_dpm_set_min_deep_sleep_dcefclk +ffffffff822519d0 T amdgpu_dpm_set_hard_min_dcefclk_by_freq +ffffffff82251a70 T amdgpu_dpm_set_hard_min_fclk_by_freq +ffffffff82251b10 T amdgpu_dpm_display_disable_memory_clock_switch +ffffffff82251ba0 T amdgpu_dpm_get_max_sustainable_clocks_by_dc +ffffffff82251c30 T amdgpu_dpm_get_uclk_dpm_states +ffffffff82251cd0 T amdgpu_dpm_get_dpm_clock_table +ffffffff82252000 T amdgpu_dpm_get_active_displays +ffffffff822520a0 T amdgpu_dpm_get_vblank_time +ffffffff82252150 T amdgpu_dpm_get_vrefresh +ffffffff82253000 T amdgpu_pm_sysfs_init +ffffffff82253030 T amdgpu_pm_sysfs_fini +ffffffff82253060 T amdgpu_debugfs_pm_init +ffffffff82254000 T amdgpu_dpm_print_class_info +ffffffff822542b0 T amdgpu_dpm_print_cap_info +ffffffff82254340 T amdgpu_dpm_print_ps_status +ffffffff822543d0 T amdgpu_pm_print_power_states +ffffffff82254490 T amdgpu_get_platform_caps +ffffffff82254530 T amdgpu_parse_extended_power_table +ffffffff82255540 T amdgpu_free_extended_power_table +ffffffff82255650 T amdgpu_add_thermal_controller +ffffffff82255a80 T amdgpu_get_vce_clock_state +ffffffff82255ac0 T amdgpu_legacy_dpm_compute_clocks +ffffffff82255f30 T amdgpu_dpm_thermal_work_handler +ffffffff82257000 t pp_early_init +ffffffff82257100 t pp_late_init +ffffffff82257220 t pp_sw_init +ffffffff82257240 t pp_sw_fini +ffffffff822572d0 t pp_hw_init +ffffffff82257330 t pp_hw_fini +ffffffff82257370 t pp_late_fini +ffffffff822573d0 t pp_suspend +ffffffff822573f0 t pp_resume +ffffffff82257410 t pp_is_idle +ffffffff82257440 t pp_wait_for_idle +ffffffff82257470 t pp_sw_reset +ffffffff822574a0 t pp_set_clockgating_state +ffffffff822574d0 t pp_set_powergating_state +ffffffff82257500 t pp_dpm_set_fan_control_mode +ffffffff82257570 t pp_dpm_get_fan_control_mode +ffffffff822575e0 t pp_dpm_set_fan_speed_pwm +ffffffff82257640 t pp_dpm_get_fan_speed_pwm +ffffffff822576a0 t pp_dpm_force_clock_level +ffffffff82257700 t pp_dpm_print_clock_levels +ffffffff82257760 t pp_dpm_emit_clock_levels +ffffffff822577c0 t pp_dpm_force_performance_level +ffffffff82257860 t pp_dpm_get_sclk_od +ffffffff822578c0 t pp_dpm_set_sclk_od +ffffffff82257920 t pp_dpm_get_mclk_od +ffffffff82257980 t pp_dpm_set_mclk_od +ffffffff822579e0 t pp_dpm_read_sensor +ffffffff82257a80 t pp_dpm_get_performance_level +ffffffff82257ac0 t pp_dpm_get_current_power_state +ffffffff82257b40 t pp_dpm_get_fan_speed_rpm +ffffffff82257ba0 t pp_dpm_set_fan_speed_rpm +ffffffff82257c00 t pp_dpm_get_pp_num_states +ffffffff82257d40 t pp_dpm_get_pp_table +ffffffff82257d90 t pp_dpm_set_pp_table +ffffffff82257ec0 t pp_dpm_switch_power_profile +ffffffff82258000 t pp_dpm_get_vce_clock_state +ffffffff82258050 t pp_dpm_dispatch_tasks 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pp_display_clock_voltage_request +ffffffff82258ae0 t pp_get_display_mode_validation_clocks +ffffffff82258b40 t pp_notify_smu_enable_pwe +ffffffff82258ba0 t pp_enable_mgpu_fan_boost +ffffffff82258c00 t pp_set_active_display_count +ffffffff82258c40 t pp_set_hard_min_dcefclk_by_freq +ffffffff82258ca0 t pp_set_hard_min_fclk_by_freq +ffffffff82258d00 t pp_set_min_deep_sleep_dcefclk +ffffffff82258d60 t pp_get_asic_baco_capability +ffffffff82258dd0 t pp_get_asic_baco_state +ffffffff82258e30 t pp_set_asic_baco_state +ffffffff82258ea0 t pp_get_ppfeature_status +ffffffff82258f00 t pp_set_ppfeature_status +ffffffff82258f50 t pp_asic_reset_mode_2 +ffffffff82258fb0 t pp_set_df_cstate +ffffffff82259010 t pp_set_xgmi_pstate +ffffffff82259070 t pp_get_gpu_metrics +ffffffff822590d0 t pp_get_prv_buffer_details +ffffffff82259150 t pp_pm_compute_clocks +ffffffff8225a000 T ci_baco_set_state +ffffffff8225b000 T baco_program_registers +ffffffff8225b0d0 t baco_cmd_handler +ffffffff8225b250 T soc15_baco_program_registers +ffffffff8225c000 T fiji_baco_set_state +ffffffff8225d000 T phm_setup_asic +ffffffff8225d050 T phm_power_down_asic +ffffffff8225d0a0 T phm_set_power_state +ffffffff8225d110 T phm_enable_dynamic_state_management +ffffffff8225d1c0 T phm_disable_dynamic_state_management +ffffffff8225d260 T phm_force_dpm_levels +ffffffff8225d2b0 T phm_apply_state_adjust_rules +ffffffff8225d300 T phm_apply_clock_adjust_rules +ffffffff8225d350 T phm_powerdown_uvd +ffffffff8225d3a0 T phm_disable_clock_power_gatings +ffffffff8225d3f0 T phm_pre_display_configuration_changed +ffffffff8225d450 T phm_display_configuration_changed +ffffffff8225d4b0 T phm_notify_smc_display_config_after_ps_adjustment +ffffffff8225d510 T phm_stop_thermal_controller +ffffffff8225d570 T phm_register_irq_handlers +ffffffff8225d5c0 T phm_start_thermal_controller +ffffffff8225d700 T phm_check_smc_update_required_for_display_configuration +ffffffff8225d760 T phm_check_states_equal +ffffffff8225d7b0 T phm_store_dal_configuration_data +ffffffff8225d900 T phm_get_dal_power_level +ffffffff8225d960 T phm_set_cpu_power_state +ffffffff8225d9b0 T phm_get_performance_level +ffffffff8225da10 T phm_get_clock_info +ffffffff8225db90 T phm_get_current_shallow_sleep_clocks +ffffffff8225dbe0 T phm_get_clock_by_type +ffffffff8225dc30 T phm_get_clock_by_type_with_latency +ffffffff8225dc80 T phm_get_clock_by_type_with_voltage +ffffffff8225dcd0 T phm_set_watermarks_for_clocks_ranges +ffffffff8225dd20 T phm_display_clock_voltage_request +ffffffff8225dd70 T phm_get_max_high_clocks +ffffffff8225ddc0 T phm_disable_smc_firmware_ctf +ffffffff8225de20 T phm_set_active_display_count +ffffffff8225e000 T hwmgr_early_init +ffffffff8225e470 T hwmgr_sw_init +ffffffff8225e4e0 T hwmgr_sw_fini +ffffffff8225e530 T hwmgr_hw_init +ffffffff8225e6f0 T hwmgr_hw_fini +ffffffff8225e7b0 T hwmgr_suspend +ffffffff8225e830 T hwmgr_resume +ffffffff8225e8d0 T hwmgr_handle_task +ffffffff8225f000 T polaris_baco_set_state +ffffffff82260000 T pp_override_get_default_fuse_value +ffffffff82261000 T psm_init_power_state_table +ffffffff822612a0 T psm_fini_power_state_table +ffffffff82261360 T psm_set_boot_states +ffffffff82261420 T psm_set_performance_states +ffffffff822614e0 T psm_set_user_performance_state +ffffffff82261580 T psm_adjust_power_state_dynamic +ffffffff82262000 T atomctrl_initialize_mc_reg_table +ffffffff82262210 T atomctrl_initialize_mc_reg_table_v2_2 +ffffffff82262420 T atomctrl_set_engine_dram_timings_rv770 +ffffffff82262490 T atomctrl_get_memory_pll_dividers_si +ffffffff82262570 T atomctrl_get_memory_pll_dividers_vi +ffffffff822625f0 T atomctrl_get_memory_pll_dividers_ai +ffffffff822626a0 T atomctrl_get_engine_pll_dividers_kong +ffffffff82262720 T atomctrl_get_engine_pll_dividers_vi +ffffffff822627e0 T atomctrl_get_engine_pll_dividers_ai +ffffffff822628c0 T atomctrl_get_dfs_pll_dividers_vi +ffffffff82262980 T atomctrl_get_reference_clock +ffffffff822629e0 T atomctrl_is_voltage_controlled_by_gpio_v3 +ffffffff82262aa0 T atomctrl_get_voltage_table_v3 +ffffffff82262c00 T atomctrl_get_pp_assign_pin +ffffffff82262cf0 T atomctrl_calculate_voltage_evv_on_sclk +ffffffff82263070 T atomctrl_get_voltage_evv_on_sclk +ffffffff822630f0 T atomctrl_get_voltage_evv +ffffffff822631a0 T atomctrl_get_mpll_reference_clock +ffffffff82263210 T atomctrl_is_asic_internal_ss_supported +ffffffff82263260 T atomctrl_get_memory_clock_spread_spectrum +ffffffff82263360 T atomctrl_get_engine_clock_spread_spectrum +ffffffff82263460 T atomctrl_read_efuse +ffffffff82263510 T atomctrl_set_ac_timing_ai +ffffffff82263570 T atomctrl_get_voltage_evv_on_sclk_ai +ffffffff822635f0 T atomctrl_get_smc_sclk_range_table +ffffffff822636b0 T atomctrl_get_vddc_shared_railinfo +ffffffff82263720 T atomctrl_get_avfs_information +ffffffff822638a0 T atomctrl_get_svi2_info +ffffffff82263980 T atomctrl_get_leakage_id_from_efuse +ffffffff822639e0 T atomctrl_get_leakage_vddc_base_on_leakage +ffffffff82263b80 T atomctrl_get_voltage_range +ffffffff82263c40 T atomctrl_get_edc_hilo_leakage_offset_table +ffffffff82263cc0 T atomctrl_get_edc_leakage_table +ffffffff82264000 T pp_atomfwctrl_is_voltage_controlled_by_gpio_v4 +ffffffff822640d0 T pp_atomfwctrl_get_voltage_table_v4 +ffffffff82264290 T pp_atomfwctrl_get_pp_assign_pin +ffffffff82264370 T pp_atomfwctrl_enter_self_refresh +ffffffff822643a0 T pp_atomfwctrl_get_gpu_pll_dividers_vega10 +ffffffff82264450 T pp_atomfwctrl_get_avfs_information +ffffffff82264780 T pp_atomfwctrl_get_gpio_information +ffffffff82264820 T pp_atomfwctrl_get_clk_information_by_clkid +ffffffff822648a0 T pp_atomfwctrl_get_vbios_bootup_values +ffffffff82264c20 T pp_atomfwctrl_get_smc_dpm_information +ffffffff82265000 T encode_pcie_lane_width +ffffffff82265030 T decode_pcie_lane_width +ffffffff82266000 t pp_tables_v1_0_initialize +ffffffff82267430 t pp_tables_v1_0_uninitialize +ffffffff822675e0 T get_number_of_powerplay_table_entries_v1_0 +ffffffff82267690 T get_powerplay_table_entry_v1_0 +ffffffff82268000 T pp_tables_get_response_times +ffffffff822680d0 T pp_tables_get_num_of_entries +ffffffff82268190 T pp_tables_get_entry +ffffffff822684f0 t init_non_clock_fields +ffffffff82268670 t pp_tables_initialize +ffffffff82269ad0 t pp_tables_uninitialize +ffffffff82269cd0 t get_number_of_vce_state_table_entries +ffffffff82269dd0 t get_vce_state_table_entry +ffffffff8226a000 T smu10_init_function_pointers +ffffffff8226a040 t smu10_hwmgr_backend_init +ffffffff8226a710 t smu10_hwmgr_backend_fini +ffffffff8226a850 t smu10_setup_asic_task +ffffffff8226a8c0 t smu10_get_power_state_size +ffffffff8226a8f0 t smu10_apply_state_adjust_rules +ffffffff8226a920 t smu10_dpm_force_dpm_level +ffffffff8226aea0 t smu10_enable_dpm_tasks +ffffffff8226af20 t smu10_disable_dpm_tasks +ffffffff8226af50 t smu10_dpm_patch_boot_state +ffffffff8226af80 t smu10_dpm_get_pp_table_entry +ffffffff8226afe0 t smu10_dpm_get_num_of_pp_table_entries +ffffffff8226b030 t smu10_powergate_vcn +ffffffff8226b0d0 t smu10_dpm_get_mclk +ffffffff8226b130 t smu10_dpm_get_sclk +ffffffff8226b180 t smu10_set_power_state_tasks +ffffffff8226b1f0 t smu10_set_cpu_power_state +ffffffff8226b220 t smu10_store_cc6_data +ffffffff8226b290 t smu10_get_dal_power_level +ffffffff8226b2c0 t smu10_get_performance_level +ffffffff8226b350 t smu10_get_current_shallow_sleep_clocks +ffffffff8226b3b0 t smu10_get_clock_by_type_with_latency +ffffffff8226b500 t smu10_get_clock_by_type_with_voltage +ffffffff8226b610 t smu10_set_watermarks_for_clocks_ranges +ffffffff8226b6e0 t smu10_display_clock_voltage_request +ffffffff8226b780 t smu10_get_max_high_clocks +ffffffff8226b7b0 t smu10_power_off_asic +ffffffff8226b800 t smu10_force_clock_level +ffffffff8226b9c0 t smu10_print_clock_levels +ffffffff8226bd60 t smu10_gfx_off_control +ffffffff8226be70 t smu10_read_sensor +ffffffff8226bff0 t smu10_set_active_display_count +ffffffff8226c050 t smu10_set_min_deep_sleep_dcefclk +ffffffff8226c0b0 t smu10_get_power_profile_mode +ffffffff8226c0f0 t smu10_set_power_profile_mode +ffffffff8226c240 t smu10_set_fine_grain_clk_vol +ffffffff8226c450 t smu10_powergate_mmhub +ffffffff8226c470 t smu10_smus_notify_pwe +ffffffff8226c490 t smu10_powergate_sdma +ffffffff8226c4b0 t smu10_set_hard_min_dcefclk_by_freq +ffffffff8226c510 t smu10_set_hard_min_fclk_by_freq +ffffffff8226c570 t smu10_set_hard_min_gfxclk_by_freq +ffffffff8226c5d0 t smu10_set_soft_max_gfxclk_by_freq +ffffffff8226c630 t smu10_asic_reset +ffffffff8226c650 t smu10_gfx_state_change +ffffffff8226c690 t smu10_dpm_get_pp_table_entry_callback +ffffffff8226d000 T smu7_baco_get_capability +ffffffff8226d060 T smu7_baco_get_state +ffffffff8226d0b0 T smu7_baco_set_state +ffffffff8226e000 T smu7_powerdown_uvd +ffffffff8226e050 T smu7_disable_clock_power_gating +ffffffff8226e0e0 T smu7_powergate_uvd +ffffffff8226e1d0 T smu7_powergate_vce +ffffffff8226e2c0 T smu7_update_clock_gatings +ffffffff8226e670 T smu7_powergate_gfx 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smu7_set_fan_control_mode +ffffffff82276210 t smu7_get_fan_control_mode +ffffffff82276250 t smu7_register_irq_handlers +ffffffff82276300 t smu7_check_smc_update_required_for_display_configuration +ffffffff822763c0 t smu7_check_states_equal +ffffffff82276560 t smu7_get_performance_level +ffffffff82276600 t smu7_get_clock_by_type +ffffffff822767c0 t smu7_get_clock_by_type_with_latency +ffffffff82276960 t smu7_set_watermarks_for_clocks_ranges +ffffffff82276ba0 t smu7_get_max_high_clocks +ffffffff82276c20 t smu7_power_off_asic +ffffffff82276c80 t smu7_force_clock_level +ffffffff82276d90 t smu7_print_clock_levels +ffffffff82277370 t smu7_get_sclk_od +ffffffff822773e0 t smu7_set_sclk_od +ffffffff822774a0 t smu7_get_mclk_od +ffffffff82277510 t smu7_set_mclk_od +ffffffff822775d0 t smu7_read_sensor +ffffffff822778a0 t smu7_avfs_control +ffffffff82277970 t smu7_notify_cac_buffer_info +ffffffff82277b10 t smu7_get_thermal_temperature_range +ffffffff82277ba0 t smu7_get_power_profile_mode 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phm_get_svi2_vdd_voltage_table +ffffffff82281ca0 T phm_trim_voltage_table_to_fit_state_table +ffffffff82281d80 T phm_reset_single_dpm_table +ffffffff82281e50 T phm_setup_pcie_table_entry +ffffffff82281e90 T phm_get_dpm_level_enable_mask_value +ffffffff82281fb0 T phm_get_voltage_index +ffffffff82282030 T phm_get_voltage_id +ffffffff822820b0 T phm_find_closest_vddci +ffffffff82282110 T phm_find_boot_level +ffffffff82282180 T phm_get_sclk_for_voltage_evv +ffffffff82282230 T phm_initializa_dynamic_state_adjustment_rule_settings +ffffffff82282340 T phm_get_lowest_enabled_level +ffffffff82282380 T phm_apply_dal_min_voltage_request +ffffffff82282450 T phm_get_voltage_evv_on_sclk +ffffffff82282500 T phm_irq_process +ffffffff82282700 t orderly_poweroff +ffffffff82282710 T smu9_register_irq_handlers +ffffffff822827c0 T smu_atom_get_data_table +ffffffff82282830 T smu_get_voltage_dependency_table_ppt_v1 +ffffffff82282910 T smu_set_watermarks_for_clocks_ranges +ffffffff82283000 T tonga_baco_set_state +ffffffff82284000 T vega10_baco_set_state +ffffffff82285000 T vega10_enable_disable_vce_dpm +ffffffff82285090 T vega10_hwmgr_init +ffffffff822850f0 t vega10_hwmgr_backend_init +ffffffff82285ef0 t vega10_hwmgr_backend_fini +ffffffff82285f60 t vega10_setup_asic_task +ffffffff82286090 t vega10_get_power_state_size +ffffffff822860c0 t vega10_apply_state_adjust_rules +ffffffff82286450 t vega10_dpm_force_dpm_level +ffffffff82286980 t vega10_enable_dpm_tasks +ffffffff822892f0 t vega10_disable_dpm_tasks +ffffffff822898d0 t vega10_patch_boot_state +ffffffff82289900 t vega10_get_pp_table_entry +ffffffff82289970 t vega10_power_gate_vce +ffffffff82289a10 t vega10_power_gate_uvd +ffffffff82289ab0 t vega10_dpm_get_mclk +ffffffff82289b50 t vega10_dpm_get_sclk +ffffffff82289bf0 t vega10_set_power_state_tasks +ffffffff8228a680 t vega10_notify_smc_display_config_after_ps_adjustment +ffffffff8228a830 t vega10_display_configuration_changed_task +ffffffff8228a900 t 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vega10_odn_update_power_state +ffffffff8228e000 T vega10_enable_didt_config +ffffffff8228f870 T vega10_disable_didt_config +ffffffff8228fab0 T vega10_initialize_power_tune_defaults +ffffffff8228fbe0 T vega10_set_power_limit +ffffffff8228fc30 T vega10_enable_power_containment +ffffffff8228fd50 T vega10_disable_power_containment +ffffffff8228fe20 T vega10_power_control_set_level +ffffffff8228fe80 t vega10_didt_set_mask +ffffffff82291000 t vega10_pp_tables_initialize +ffffffff822929a0 t vega10_pp_tables_uninitialize +ffffffff82292b50 T vega10_get_number_of_powerplay_table_entries +ffffffff82292c00 T vega10_get_powerplay_table_entry +ffffffff82292d80 T vega10_baco_set_cap +ffffffff82293000 T vega10_fan_ctrl_get_fan_speed_info +ffffffff82293080 T vega10_fan_ctrl_get_fan_speed_pwm +ffffffff822931a0 T vega10_fan_ctrl_get_fan_speed_rpm +ffffffff822932a0 T vega10_fan_ctrl_set_static_mode +ffffffff82293550 T vega10_fan_ctrl_set_default_mode +ffffffff82293760 T vega10_fan_ctrl_start_smc_fan_control +ffffffff82293820 T vega10_fan_ctrl_stop_smc_fan_control +ffffffff822938e0 T vega10_fan_ctrl_set_fan_speed_pwm +ffffffff82293b00 T vega10_fan_ctrl_reset_fan_speed_to_default +ffffffff82293bc0 T vega10_fan_ctrl_set_fan_speed_rpm +ffffffff82293d90 T vega10_thermal_get_temperature +ffffffff82293e20 T vega10_thermal_disable_alert +ffffffff82293f30 T vega10_thermal_stop_thermal_controller +ffffffff82293f90 T vega10_enable_mgpu_fan_boost +ffffffff822940a0 T vega10_start_thermal_controller +ffffffff82294640 T vega10_thermal_ctrl_uninitialize_thermal_controller +ffffffff82295000 T vega12_baco_set_state +ffffffff82296000 T vega12_enable_disable_vce_dpm +ffffffff82296090 T vega12_hwmgr_init +ffffffff822960d0 t vega12_hwmgr_backend_init +ffffffff82296930 t vega12_hwmgr_backend_fini +ffffffff82296990 t vega12_setup_asic_task +ffffffff822969d0 t vega12_apply_clocks_adjust_rules +ffffffff82296dc0 t vega12_dpm_force_dpm_level +ffffffff82297210 t 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t vega12_power_off_asic +ffffffff822988b0 t vega12_force_clock_level +ffffffff82298b00 t vega12_print_clock_levels +ffffffff822992f0 t vega12_gfx_off_control +ffffffff82299340 t vega12_read_sensor +ffffffff82299710 t vega12_notify_cac_buffer_info +ffffffff822997c0 t vega12_get_thermal_temperature_range +ffffffff822998a0 t vega12_get_ppfeature_status +ffffffff82299920 t vega12_set_ppfeature_status +ffffffff822999c0 t vega12_set_mp1_state +ffffffff82299a30 t vega12_get_gpu_metrics +ffffffff82299cc0 t vega12_upload_dpm_min_level +ffffffff82299f00 t vega12_upload_dpm_max_level +ffffffff8229a0d0 t vega12_setup_single_dpm_table +ffffffff8229b000 t vega12_pp_tables_initialize +ffffffff8229b5f0 t vega12_pp_tables_uninitialize +ffffffff8229c000 T vega12_fan_ctrl_get_fan_speed_info +ffffffff8229c040 T vega12_fan_ctrl_get_fan_speed_rpm +ffffffff8229c0b0 T vega12_fan_ctrl_start_smc_fan_control +ffffffff8229c0e0 T vega12_fan_ctrl_stop_smc_fan_control +ffffffff8229c110 T vega12_fan_ctrl_reset_fan_speed_to_default +ffffffff8229c140 T vega12_thermal_get_temperature +ffffffff8229c1d0 T vega12_thermal_disable_alert +ffffffff8229c260 T vega12_thermal_stop_thermal_controller +ffffffff8229c2f0 T vega12_start_thermal_controller +ffffffff8229d000 T vega20_baco_get_capability +ffffffff8229d0c0 T vega20_baco_get_state +ffffffff8229d150 T vega20_baco_set_state +ffffffff8229d350 T vega20_baco_apply_vdci_flush_workaround +ffffffff8229e000 T vega20_hwmgr_init +ffffffff8229e040 t vega20_hwmgr_backend_init +ffffffff8229e980 t vega20_hwmgr_backend_fini +ffffffff8229e9e0 t vega20_setup_asic_task +ffffffff8229ead0 t vega20_apply_clocks_adjust_rules +ffffffff8229efc0 t vega20_dpm_force_dpm_level +ffffffff8229f730 t vega20_enable_dpm_tasks +ffffffff822a0ba0 t vega20_disable_dpm_tasks +ffffffff822a0d40 t vega20_power_gate_vce +ffffffff822a0e70 t vega20_power_gate_uvd +ffffffff822a0f20 t vega20_dpm_get_mclk +ffffffff822a1020 t vega20_dpm_get_sclk +ffffffff822a1120 t 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vega20_read_sensor +ffffffff822a3900 t vega20_notify_cac_buffer_info +ffffffff822a39b0 t vega20_get_thermal_temperature_range +ffffffff822a3a90 t vega20_get_power_profile_mode +ffffffff822a3be0 t vega20_set_power_profile_mode +ffffffff822a3f80 t vega20_odn_edit_dpm_table +ffffffff822a4450 t vega20_enable_mgpu_fan_boost +ffffffff822a44b0 t vega20_get_ppfeature_status +ffffffff822a4530 t vega20_set_ppfeature_status +ffffffff822a4630 t vega20_set_mp1_state +ffffffff822a46c0 t vega20_smu_i2c_bus_access +ffffffff822a4750 t vega20_set_df_cstate +ffffffff822a47c0 t vega20_set_xgmi_pstate +ffffffff822a4820 t vega20_get_gpu_metrics +ffffffff822a4ac0 t vega20_upload_dpm_min_level +ffffffff822a4d40 t vega20_upload_dpm_max_level +ffffffff822a4f70 t vega20_setup_single_dpm_table +ffffffff822a6000 T vega20_set_power_limit +ffffffff822a6050 T vega20_validate_power_level_request +ffffffff822a6080 T vega20_power_control_set_level +ffffffff822a7000 t vega20_pp_tables_initialize +ffffffff822a7740 t vega20_pp_tables_uninitialize +ffffffff822a8000 T vega20_fan_ctrl_stop_smc_fan_control +ffffffff822a8090 T vega20_fan_ctrl_start_smc_fan_control +ffffffff822a8120 T vega20_fan_ctrl_get_fan_speed_pwm +ffffffff822a8240 T vega20_fan_ctrl_set_fan_speed_pwm +ffffffff822a8430 t vega20_fan_ctrl_set_static_mode +ffffffff822a85e0 T vega20_fan_ctrl_get_fan_speed_info +ffffffff822a8620 T vega20_fan_ctrl_get_fan_speed_rpm +ffffffff822a8680 T vega20_fan_ctrl_set_fan_speed_rpm +ffffffff822a8820 T vega20_thermal_get_temperature +ffffffff822a88b0 T vega20_thermal_disable_alert +ffffffff822a8940 T vega20_thermal_stop_thermal_controller +ffffffff822a89d0 T vega20_start_thermal_controller +ffffffff822a9000 t ci_smu_init +ffffffff822a9060 t ci_smu_fini +ffffffff822a90c0 t ci_start_smu +ffffffff822a90f0 t ci_send_msg_to_smc +ffffffff822a9190 t ci_send_msg_to_smc_with_parameter +ffffffff822a9240 t ci_update_smc_table +ffffffff822a9490 t ci_process_firmware_header +ffffffff822a99a0 t ci_update_sclk_threshold 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tonga_update_sclk_threshold +ffffffff822c2940 t tonga_thermal_setup_fan_table +ffffffff822c2bc0 t tonga_init_smc_table +ffffffff822c4a10 t tonga_populate_all_graphic_levels +ffffffff822c4ff0 t tonga_populate_all_memory_levels +ffffffff822c56d0 t tonga_initialize_mc_reg_table +ffffffff822c6250 t tonga_get_offsetof +ffffffff822c62e0 t tonga_get_mac_definition +ffffffff822c6340 t tonga_is_dpm_running +ffffffff822c6390 t tonga_update_dpm_settings +ffffffff822c6790 t tonga_program_memory_timing_parameters +ffffffff822c6950 t tonga_get_dependency_volt_by_clk +ffffffff822c7000 T vega10_enable_smc_features +ffffffff822c7040 T vega10_get_enabled_smc_features +ffffffff822c70a0 t vega10_smu_init +ffffffff822c73f0 t vega10_smu_fini +ffffffff822c74d0 t vega10_start_smu +ffffffff822c7610 t vega10_is_dpm_running +ffffffff822c7660 t vega10_smc_table_manager +ffffffff822c8000 T vega12_enable_smc_features +ffffffff822c80d0 T vega12_get_enabled_smc_features +ffffffff822c8190 t vega12_smu_init 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arcturus_get_fan_speed_rpm +ffffffff822d6380 t arcturus_get_thermal_temperature_range +ffffffff822d6470 t arcturus_set_performance_level +ffffffff822d6580 t arcturus_dump_pptable +ffffffff822d65b0 t arcturus_get_power_limit +ffffffff822d66c0 t arcturus_set_df_cstate +ffffffff822d67e0 t arcturus_allow_xgmi_power_down +ffffffff822d68e0 t arcturus_i2c_control_init +ffffffff822d6a10 t arcturus_i2c_control_fini +ffffffff822d6a50 t arcturus_get_unique_id +ffffffff822d6b70 t arcturus_init_smc_tables +ffffffff822d6ce0 t arcturus_setup_pptable +ffffffff822d6e20 t arcturus_set_fan_speed_pwm +ffffffff822d6fc0 t arcturus_set_fan_speed_rpm +ffffffff822d70e0 t arcturus_log_thermal_throttling_event +ffffffff822d74e0 t arcturus_get_gpu_metrics +ffffffff822d76f0 t arcturus_get_fan_parameters +ffffffff822d7730 t arcturus_get_current_clk_freq_by_table +ffffffff822d7870 t arcturus_get_smu_metrics_data +ffffffff822d7ae0 t arcturus_upload_dpm_level +ffffffff822d7bd0 t arcturus_i2c_xfer +ffffffff822d7e90 t arcturus_i2c_func +ffffffff822d7ec0 t arcturus_set_fan_static_mode +ffffffff822d9000 T cyan_skillfish_set_ppt_funcs +ffffffff822d9030 t cyan_skillfish_print_clk_levels +ffffffff822d9150 t cyan_skillfish_od_edit_dpm_table +ffffffff822d9440 t cyan_skillfish_read_sensor +ffffffff822d95f0 t cyan_skillfish_is_dpm_running +ffffffff822d9690 t cyan_skillfish_init_smc_tables +ffffffff822d9770 t cyan_skillfish_get_enabled_mask +ffffffff822d97b0 t cyan_skillfish_get_dpm_ultimate_freq +ffffffff822d9870 t cyan_skillfish_get_gpu_metrics +ffffffff822d9b10 t cyan_skillfish_get_smu_metrics_data +ffffffff822da000 T navi10_set_ppt_funcs +ffffffff822da050 t navi10_run_btc +ffffffff822da0d0 t navi10_get_allowed_feature_mask +ffffffff822da3a0 t navi10_set_default_dpm_table +ffffffff822da810 t navi10_populate_umd_state_clk +ffffffff822da990 t navi10_print_clk_levels +ffffffff822dab20 t navi10_emit_clk_levels +ffffffff822dad60 t navi10_force_clk_levels +ffffffff822dae90 t navi10_od_edit_dpm_table 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navi10_init_smc_tables +ffffffff822dce10 t navi10_setup_pptable +ffffffff822dd030 t navi10_baco_enter +ffffffff822dd080 t navi10_baco_exit +ffffffff822dd180 t navi1x_get_gpu_metrics +ffffffff822ddb20 t navi10_enable_mgpu_fan_boost +ffffffff822ddba0 t navi10_get_fan_parameters +ffffffff822ddbe0 t navi10_post_smu_init +ffffffff822dded0 t navi10_get_default_config_table_settings +ffffffff822ddf20 t navi10_set_config_table +ffffffff822ddfd0 t navi1x_get_smu_metrics_data +ffffffff822de430 t navi10_get_smu_metrics_data +ffffffff822de660 t navi10_i2c_xfer +ffffffff822de920 t navi10_i2c_func +ffffffff822de950 t navi10_umc_hybrid_cdr_workaround +ffffffff822df000 T sienna_cichlid_set_ppt_funcs +ffffffff822df050 t sienna_cichlid_run_btc +ffffffff822df0d0 t sienna_cichlid_get_allowed_feature_mask +ffffffff822df350 t sienna_cichlid_set_default_dpm_table +ffffffff822df920 t sienna_cichlid_populate_umd_state_clk +ffffffff822df9e0 t sienna_cichlid_print_clk_levels +ffffffff822dfbc0 t sienna_cichlid_force_clk_levels +ffffffff822dfcf0 t sienna_cichlid_od_edit_dpm_table +ffffffff822e0290 t sienna_cichlid_restore_user_od_settings +ffffffff822e0320 t sienna_cichlid_get_power_profile_mode +ffffffff822e0570 t sienna_cichlid_set_power_profile_mode +ffffffff822e0840 t sienna_cichlid_dpm_set_vcn_enable +ffffffff822e0900 t sienna_cichlid_dpm_set_jpeg_enable +ffffffff822e0980 t sienna_cichlid_read_sensor +ffffffff822e0c80 t sienna_cichlid_pre_display_config_changed +ffffffff822e0cb0 t sienna_cichlid_display_config_changed +ffffffff822e0d10 t sienna_cichlid_notify_smc_display_config +ffffffff822e0ea0 t sienna_cichlid_is_dpm_running +ffffffff822e0ef0 t sienna_cichlid_get_fan_speed_rpm +ffffffff822e1000 t sienna_cichlid_set_watermarks_table +ffffffff822e11a0 t sienna_cichlid_get_thermal_temperature_range +ffffffff822e1270 t sienna_cichlid_get_uclk_dpm_states +ffffffff822e1390 t sienna_cichlid_set_default_od_settings +ffffffff822e1540 t sienna_cichlid_display_disable_memory_clock_switch +ffffffff822e15c0 t sienna_cichlid_dump_pptable +ffffffff822e15f0 t sienna_cichlid_get_power_limit +ffffffff822e16c0 t sienna_cichlid_update_pcie_parameters +ffffffff822e1820 t sienna_cichlid_i2c_control_init +ffffffff822e1950 t sienna_cichlid_i2c_control_fini +ffffffff822e1990 t sienna_cichlid_get_unique_id +ffffffff822e1ae0 t sienna_cichlid_init_smc_tables +ffffffff822e1e00 t sienna_cichlid_set_mp1_state +ffffffff822e1e40 t sienna_cichlid_setup_pptable +ffffffff822e22b0 t sienna_cichlid_system_features_control +ffffffff822e2340 t sienna_cichlid_baco_enter +ffffffff822e2390 t sienna_cichlid_baco_exit +ffffffff822e2490 t sienna_cichlid_is_mode1_reset_supported +ffffffff822e2510 t sienna_cichlid_is_mode2_reset_supported +ffffffff822e2540 t sienna_cichlid_mode2_reset +ffffffff822e2670 t sienna_cichlid_get_dpm_ultimate_freq +ffffffff822e2690 t sienna_cichlid_get_gpu_metrics +ffffffff822e2b10 t sienna_cichlid_enable_mgpu_fan_boost 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smu_v11_0_init_power +ffffffff822e4bd0 T smu_v11_0_fini_power +ffffffff822e4c30 T smu_v11_0_get_vbios_bootup_values +ffffffff822e4f90 T smu_v11_0_notify_memory_pool_location +ffffffff822e5080 T smu_v11_0_set_min_deep_sleep_dcefclk +ffffffff822e5100 T smu_v11_0_set_driver_table_location +ffffffff822e5170 T smu_v11_0_set_tool_table_location +ffffffff822e51e0 T smu_v11_0_init_display_count +ffffffff822e5240 T smu_v11_0_set_allowed_mask +ffffffff822e5310 T smu_v11_0_system_features_control +ffffffff822e5330 T smu_v11_0_notify_display_change +ffffffff822e53a0 T smu_v11_0_init_max_sustainable_clocks +ffffffff822e5610 t smu_v11_0_get_max_sustainable_clock +ffffffff822e5730 T smu_v11_0_get_current_power_limit +ffffffff822e5800 T smu_v11_0_set_power_limit +ffffffff822e5940 T smu_v11_0_interrupt_work +ffffffff822e59c0 T smu_v11_0_enable_thermal_alert +ffffffff822e5a60 T smu_v11_0_disable_thermal_alert +ffffffff822e5a80 T smu_v11_0_get_gfx_vdd +ffffffff822e5b40 T smu_v11_0_display_clock_voltage_request +ffffffff822e5c80 T smu_v11_0_set_hard_freq_limited_range +ffffffff822e5d60 T smu_v11_0_gfx_off_control +ffffffff822e5dd0 T smu_v11_0_get_fan_control_mode +ffffffff822e5e20 T smu_v11_0_set_fan_speed_pwm +ffffffff822e5fc0 t smu_v11_0_set_fan_static_mode +ffffffff822e6170 T smu_v11_0_set_fan_speed_rpm +ffffffff822e6290 T smu_v11_0_get_fan_speed_pwm +ffffffff822e63d0 T smu_v11_0_get_fan_speed_rpm +ffffffff822e64d0 T smu_v11_0_set_fan_control_mode +ffffffff822e6670 T smu_v11_0_set_xgmi_pstate +ffffffff822e6690 T smu_v11_0_register_irq_handler +ffffffff822e6750 T smu_v11_0_get_max_sustainable_clocks_by_dc +ffffffff822e67e0 T smu_v11_0_set_azalia_d3_pme +ffffffff822e6800 T smu_v11_0_baco_set_armd3_sequence +ffffffff822e6820 T smu_v11_0_baco_is_support +ffffffff822e68b0 T smu_v11_0_baco_get_state +ffffffff822e68e0 T smu_v11_0_baco_set_state +ffffffff822e6b90 T smu_v11_0_baco_enter +ffffffff822e6c80 T smu_v11_0_baco_exit +ffffffff822e6d20 T smu_v11_0_mode1_reset +ffffffff822e6da0 T smu_v11_0_handle_passthrough_sbr +ffffffff822e6dc0 T smu_v11_0_get_dpm_ultimate_freq +ffffffff822e6f00 T smu_v11_0_set_soft_freq_limited_range +ffffffff822e6fe0 T smu_v11_0_set_performance_level +ffffffff822e7330 T smu_v11_0_set_power_source +ffffffff822e7390 T smu_v11_0_get_dpm_freq_by_index +ffffffff822e7440 T smu_v11_0_get_dpm_level_count +ffffffff822e74e0 T smu_v11_0_set_single_dpm_table +ffffffff822e76c0 T smu_v11_0_get_dpm_level_range +ffffffff822e7820 T smu_v11_0_get_current_pcie_link_width_level +ffffffff822e7870 T smu_v11_0_get_current_pcie_link_width +ffffffff822e78d0 T smu_v11_0_get_current_pcie_link_speed_level +ffffffff822e7920 T smu_v11_0_get_current_pcie_link_speed +ffffffff822e7980 T smu_v11_0_gfx_ulv_control +ffffffff822e79f0 T smu_v11_0_deep_sleep_control +ffffffff822e7ba0 T smu_v11_0_restore_user_od_settings +ffffffff822e7c30 T smu_v11_0_set_smu_mailbox_registers +ffffffff822e7ca0 t smu_v11_0_set_irq_state +ffffffff822e8220 t smu_v11_0_irq_process +ffffffff822e8520 t orderly_poweroff +ffffffff822e9000 T vangogh_set_ppt_funcs +ffffffff822e9040 t vangogh_set_default_dpm_tables +ffffffff822e9070 t vangogh_common_print_clk_levels +ffffffff822e94c0 t vangogh_force_clk_levels +ffffffff822e96f0 t vangogh_od_edit_dpm_table +ffffffff822e9c50 t vangogh_get_power_profile_mode +ffffffff822e9d20 t vangogh_set_power_profile_mode +ffffffff822e9e50 t vangogh_dpm_set_vcn_enable +ffffffff822e9ea0 t vangogh_dpm_set_jpeg_enable +ffffffff822e9ef0 t vangogh_read_sensor +ffffffff822ea020 t vangogh_is_dpm_running +ffffffff822ea080 t vangogh_set_watermarks_table +ffffffff822ea210 t vangogh_set_performance_level +ffffffff822eab40 t vangogh_get_power_limit +ffffffff822eacc0 t vangogh_get_ppt_limit +ffffffff822ead30 t vangogh_get_dpm_clock_table +ffffffff822eaea0 t vangogh_init_smc_tables +ffffffff822eb0f0 t vangogh_system_features_control +ffffffff822eb140 t vangogh_set_power_limit +ffffffff822eb2a0 t vangogh_get_gfxoff_status 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renoir_read_sensor +ffffffff822edfb0 t renoir_is_dpm_running +ffffffff822edff0 t renoir_set_watermarks_table +ffffffff822ee1a0 t renoir_set_performance_level +ffffffff822ee6e0 t renoir_get_dpm_clock_table +ffffffff822eea30 t renoir_init_smc_tables +ffffffff822eeba0 t renoir_get_enabled_mask +ffffffff822eebe0 t renoir_get_dpm_ultimate_freq +ffffffff822eee80 t renoir_get_gpu_metrics +ffffffff822ef0a0 t renoir_gfx_state_change_set +ffffffff822ef0d0 t renoir_set_fine_grain_gfx_freq_parameters +ffffffff822ef170 t renoir_force_dpm_limit_value +ffffffff822f0000 T smu_v12_0_check_fw_status +ffffffff822f0050 T smu_v12_0_check_fw_version +ffffffff822f0110 T smu_v12_0_powergate_sdma +ffffffff822f0150 T smu_v12_0_set_gfx_cgpg +ffffffff822f01b0 T smu_v12_0_get_gfxoff_status +ffffffff822f0240 T smu_v12_0_gfx_off_control +ffffffff822f0360 T smu_v12_0_fini_smc_tables +ffffffff822f0410 T smu_v12_0_set_default_dpm_tables +ffffffff822f0440 T smu_v12_0_mode2_reset +ffffffff822f0460 T smu_v12_0_set_soft_freq_limited_range +ffffffff822f05a0 T smu_v12_0_set_driver_table_location +ffffffff822f0610 T smu_v12_0_get_vbios_bootup_values +ffffffff822f1000 T aldebaran_set_ppt_funcs +ffffffff822f1040 t aldebaran_get_allowed_feature_mask +ffffffff822f1090 t aldebaran_set_default_dpm_table +ffffffff822f1290 t aldebaran_populate_umd_state_clk +ffffffff822f1390 t aldebaran_print_clk_levels +ffffffff822f1550 t aldebaran_force_clk_levels +ffffffff822f1700 t aldebaran_usr_edit_dpm_table +ffffffff822f1920 t aldebaran_read_sensor +ffffffff822f1bc0 t aldebaran_is_dpm_running +ffffffff822f1c10 t aldebaran_get_thermal_temperature_range +ffffffff822f1ce0 t aldebaran_set_performance_level +ffffffff822f1d90 t aldebaran_get_power_limit +ffffffff822f1f20 t aldebaran_set_df_cstate +ffffffff822f1fa0 t aldebaran_allow_xgmi_power_down +ffffffff822f2040 t aldebaran_i2c_control_init +ffffffff822f2100 t aldebaran_i2c_control_fini +ffffffff822f2140 t aldebaran_get_unique_id +ffffffff822f2220 t aldebaran_init_smc_tables +ffffffff822f23b0 t aldebaran_set_mp1_state +ffffffff822f23f0 t aldebaran_setup_pptable +ffffffff822f24c0 t aldebaran_system_features_control +ffffffff822f2620 t aldebaran_set_power_limit +ffffffff822f26b0 t aldebaran_is_baco_supported +ffffffff822f26e0 t aldebaran_is_mode1_reset_supported +ffffffff822f2710 t aldebaran_is_mode2_reset_supported +ffffffff822f2740 t aldebaran_mode1_reset +ffffffff822f2820 t aldebaran_mode2_reset +ffffffff822f29e0 t aldebaran_set_soft_freq_limited_range +ffffffff822f2bf0 t aldebaran_log_thermal_throttling_event +ffffffff822f2f00 t aldebaran_get_gpu_metrics +ffffffff822f3190 t aldebaran_smu_handle_passthrough_sbr +ffffffff822f31b0 t aldebaran_smu_send_hbm_bad_page_num +ffffffff822f3240 t aldebaran_get_ecc_info +ffffffff822f33a0 t aldebaran_send_hbm_bad_channel_flag +ffffffff822f3480 t aldebaran_get_current_clk_freq_by_table +ffffffff822f35c0 t aldebaran_get_smu_metrics_data +ffffffff822f3810 t aldebaran_upload_dpm_level +ffffffff822f3900 t aldebaran_i2c_xfer +ffffffff822f3bb0 t aldebaran_i2c_func +ffffffff822f4000 T smu_v13_0_init_microcode +ffffffff822f41d0 T smu_v13_0_fini_microcode +ffffffff822f4250 T smu_v13_0_load_microcode +ffffffff822f4280 T smu_v13_0_init_pptable_microcode +ffffffff822f4430 T smu_v13_0_get_pptable_from_firmware +ffffffff822f4560 T smu_v13_0_check_fw_status +ffffffff822f45d0 T smu_v13_0_check_fw_version +ffffffff822f4700 T smu_v13_0_setup_pptable +ffffffff822f48a0 T smu_v13_0_init_smc_tables +ffffffff822f49f0 T smu_v13_0_fini_smc_tables +ffffffff822f4be0 T smu_v13_0_init_power +ffffffff822f4c60 T smu_v13_0_fini_power +ffffffff822f4ce0 T smu_v13_0_get_vbios_bootup_values +ffffffff822f4f90 T smu_v13_0_notify_memory_pool_location +ffffffff822f5050 T smu_v13_0_set_min_deep_sleep_dcefclk +ffffffff822f50d0 T smu_v13_0_set_driver_table_location +ffffffff822f5140 T smu_v13_0_set_tool_table_location +ffffffff822f51b0 T smu_v13_0_init_display_count +ffffffff822f51f0 T smu_v13_0_set_allowed_mask +ffffffff822f52c0 T smu_v13_0_gfx_off_control +ffffffff822f5330 T smu_v13_0_system_features_control +ffffffff822f5350 T smu_v13_0_notify_display_change +ffffffff822f53c0 T smu_v13_0_init_max_sustainable_clocks +ffffffff822f5630 t smu_v13_0_get_max_sustainable_clock +ffffffff822f5750 T smu_v13_0_get_current_power_limit +ffffffff822f5820 T smu_v13_0_set_power_limit +ffffffff822f5940 T smu_v13_0_enable_thermal_alert +ffffffff822f59d0 T smu_v13_0_disable_thermal_alert +ffffffff822f5a10 T smu_v13_0_get_gfx_vdd +ffffffff822f5ad0 T smu_v13_0_display_clock_voltage_request +ffffffff822f5c10 T smu_v13_0_set_hard_freq_limited_range +ffffffff822f5cf0 T smu_v13_0_get_fan_control_mode +ffffffff822f5d40 T smu_v13_0_set_fan_speed_pwm +ffffffff822f5f50 t smu_v13_0_set_fan_static_mode +ffffffff822f6110 T smu_v13_0_set_fan_control_mode +ffffffff822f6270 T smu_v13_0_set_fan_speed_rpm +ffffffff822f6410 T smu_v13_0_set_xgmi_pstate +ffffffff822f6430 T smu_v13_0_register_irq_handler +ffffffff822f6500 T smu_v13_0_get_max_sustainable_clocks_by_dc +ffffffff822f6590 T smu_v13_0_set_azalia_d3_pme +ffffffff822f65b0 T smu_v13_0_wait_for_event +ffffffff822f6610 T smu_v13_0_get_dpm_ultimate_freq +ffffffff822f6770 T smu_v13_0_set_soft_freq_limited_range +ffffffff822f6850 T smu_v13_0_set_performance_level +ffffffff822f6fe0 T smu_v13_0_set_power_source +ffffffff822f7040 T smu_v13_0_set_single_dpm_table +ffffffff822f72d0 T smu_v13_0_get_dpm_level_range +ffffffff822f7450 T smu_v13_0_get_current_pcie_link_width_level +ffffffff822f74a0 T smu_v13_0_get_current_pcie_link_width +ffffffff822f7500 T smu_v13_0_get_current_pcie_link_speed_level +ffffffff822f7550 T smu_v13_0_get_current_pcie_link_speed +ffffffff822f75a0 T smu_v13_0_set_vcn_enable +ffffffff822f7650 T smu_v13_0_set_jpeg_enable +ffffffff822f7670 T smu_v13_0_run_btc +ffffffff822f76f0 T smu_v13_0_gpo_control +ffffffff822f7780 T smu_v13_0_deep_sleep_control +ffffffff822f79f0 T smu_v13_0_gfx_ulv_control +ffffffff822f7a60 T smu_v13_0_baco_set_armd3_sequence +ffffffff822f7a80 T smu_v13_0_baco_is_support +ffffffff822f7b10 T smu_v13_0_baco_get_state +ffffffff822f7b40 T smu_v13_0_baco_set_state +ffffffff822f7c00 T smu_v13_0_baco_enter +ffffffff822f7d10 T smu_v13_0_baco_exit +ffffffff822f7db0 T smu_v13_0_set_gfx_power_up_by_imu +ffffffff822f7df0 T smu_v13_0_od_edit_dpm_table +ffffffff822f80b0 T smu_v13_0_set_default_dpm_tables +ffffffff822f80e0 T smu_v13_0_set_smu_mailbox_registers +ffffffff822f8150 T smu_v13_0_mode1_reset +ffffffff822f81d0 t smu_v13_0_set_irq_state +ffffffff822f8750 t smu_v13_0_irq_process +ffffffff822f8a50 t orderly_poweroff +ffffffff822f9000 T smu_v13_0_0_set_ppt_funcs +ffffffff822f90e0 t smu_v13_0_0_get_allowed_feature_mask +ffffffff822f9220 t smu_v13_0_0_set_default_dpm_table +ffffffff822f9650 t smu_v13_0_0_populate_umd_state_clk +ffffffff822f9780 t smu_v13_0_0_print_clk_levels +ffffffff822f98a0 t smu_v13_0_0_force_clk_levels +ffffffff822f9a20 t smu_v13_0_0_get_power_profile_mode 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+ffffffff822fd050 t smu_v13_0_4_mode2_reset +ffffffff822fd070 t smu_v13_0_4_get_dpm_ultimate_freq +ffffffff822fd490 t smu_v13_0_4_get_gpu_metrics +ffffffff822fd660 t smu_v13_0_4_set_fine_grain_gfx_freq_parameters +ffffffff822fd6c0 t smu_v13_0_4_get_smu_metrics_data +ffffffff822fe000 T smu_v13_0_5_set_ppt_funcs +ffffffff822fe090 t smu_v13_0_5_set_default_dpm_tables +ffffffff822fe0c0 t smu_v13_0_5_print_clk_levels +ffffffff822fe170 t smu_v13_0_5_force_clk_levels +ffffffff822fe2d0 t smu_v13_0_5_od_edit_dpm_table +ffffffff822fe590 t smu_v13_0_5_dpm_set_vcn_enable +ffffffff822fe5b0 t smu_v13_0_5_dpm_set_jpeg_enable +ffffffff822fe5d0 t smu_v13_0_5_read_sensor +ffffffff822fe7f0 t smu_v13_0_5_is_dpm_running +ffffffff822fe840 t smu_v13_0_5_set_watermarks_table +ffffffff822fe9d0 t smu_v13_0_5_set_performance_level +ffffffff822febb0 t smu_v13_0_5_init_smc_tables +ffffffff822fed20 t smu_v13_0_5_fini_smc_tables +ffffffff822fedd0 t smu_v13_0_5_system_features_control +ffffffff822fee20 t smu_v13_0_5_mode2_reset +ffffffff822feea0 t smu_v13_0_5_get_dpm_ultimate_freq +ffffffff822ff2e0 t smu_v13_0_5_get_gpu_metrics +ffffffff822ff420 t smu_v13_0_5_set_fine_grain_gfx_freq_parameters +ffffffff822ff480 t smu_v13_0_5_get_smu_metrics_data +ffffffff82300000 T smu_v13_0_7_set_ppt_funcs +ffffffff82300050 t smu_v13_0_7_get_allowed_feature_mask +ffffffff823001c0 t smu_v13_0_7_set_default_dpm_table +ffffffff823005c0 t smu_v13_0_7_populate_umd_state_clk +ffffffff823006c0 t smu_v13_0_7_print_clk_levels +ffffffff823007e0 t smu_v13_0_7_force_clk_levels +ffffffff82300960 t smu_v13_0_7_get_power_profile_mode +ffffffff82300c40 t smu_v13_0_7_set_power_profile_mode +ffffffff82300e80 t smu_v13_0_7_read_sensor +ffffffff82301090 t smu_v13_0_7_is_dpm_running +ffffffff823010e0 t smu_v13_0_7_get_fan_speed_pwm +ffffffff823011c0 t smu_v13_0_7_get_fan_speed_rpm +ffffffff82301230 t smu_v13_0_7_get_thermal_temperature_range +ffffffff82301320 t smu_v13_0_7_dump_pptable +ffffffff82301350 t smu_v13_0_7_get_power_limit +ffffffff82301430 t smu_v13_0_7_set_df_cstate +ffffffff82301450 t smu_v13_0_7_update_pcie_parameters +ffffffff82301540 t smu_v13_0_7_init_smc_tables +ffffffff82301730 t smu_v13_0_7_check_fw_status +ffffffff82301780 t smu_v13_0_7_set_mp1_state +ffffffff823017c0 t smu_v13_0_7_setup_pptable +ffffffff82301920 t smu_v13_0_7_baco_enter +ffffffff82301970 t smu_v13_0_7_baco_exit +ffffffff823019d0 t smu_v13_0_7_is_mode1_reset_supported +ffffffff82301a10 t smu_v13_0_7_get_gpu_metrics +ffffffff82301e20 t smu_v13_0_7_enable_mgpu_fan_boost +ffffffff82301e70 t smu_v13_0_7_get_smu_metrics_data +ffffffff823021c0 t smu_v13_0_7_get_throttler_status +ffffffff82303000 T yellow_carp_set_ppt_funcs +ffffffff82303040 t yellow_carp_set_default_dpm_tables +ffffffff82303070 t yellow_carp_print_clk_levels +ffffffff82303130 t yellow_carp_force_clk_levels +ffffffff823033d0 t yellow_carp_od_edit_dpm_table +ffffffff82303690 t yellow_carp_dpm_set_vcn_enable +ffffffff823036b0 t yellow_carp_dpm_set_jpeg_enable +ffffffff823036d0 t yellow_carp_read_sensor +ffffffff82303a70 t yellow_carp_is_dpm_running +ffffffff82303ac0 t yellow_carp_set_watermarks_table +ffffffff82303c50 t yellow_carp_set_performance_level +ffffffff82304190 t yellow_carp_init_smc_tables +ffffffff82304300 t yellow_carp_fini_smc_tables +ffffffff823043b0 t yellow_carp_system_features_control +ffffffff82304400 t yellow_carp_get_gfxoff_status +ffffffff82304490 t yellow_carp_mode2_reset +ffffffff82304510 t yellow_carp_get_dpm_ultimate_freq +ffffffff82304960 t yellow_carp_get_gpu_metrics +ffffffff82304b20 t yellow_carp_post_smu_init +ffffffff82304ba0 t yellow_carp_set_fine_grain_gfx_freq_parameters +ffffffff82304c00 t yellow_carp_get_smu_metrics_data +ffffffff82305000 T smu_cmn_send_msg_without_waiting +ffffffff82305170 T smu_cmn_wait_for_response +ffffffff823052b0 T smu_cmn_send_smc_msg_with_param +ffffffff823055d0 T smu_cmn_to_asic_specific_index +ffffffff823056e0 t __smu_cmn_reg_print_error +ffffffff82305930 T smu_cmn_send_smc_msg +ffffffff82305950 T smu_cmn_send_debug_smc_msg +ffffffff823059d0 T smu_cmn_feature_is_supported +ffffffff82305a80 T smu_cmn_feature_is_enabled +ffffffff82305b80 T smu_cmn_clk_dpm_is_enabled +ffffffff82305c80 T smu_cmn_get_enabled_mask +ffffffff82305d70 T smu_cmn_get_indep_throttler_status +ffffffff82305e20 T smu_cmn_feature_update_enable_state +ffffffff82305ec0 T smu_cmn_feature_set_enabled +ffffffff82305f90 T smu_cmn_get_pp_feature_mask +ffffffff82306140 T smu_cmn_set_pp_feature_mask +ffffffff82306240 T smu_cmn_disable_all_features_with_exception +ffffffff823062f0 T smu_cmn_get_smc_version +ffffffff823063c0 T smu_cmn_update_table +ffffffff82306520 T smu_cmn_write_watermarks_table +ffffffff823065f0 T smu_cmn_write_pptable +ffffffff823066b0 T smu_cmn_get_metrics_table +ffffffff82306810 T smu_cmn_get_combo_pptable +ffffffff823068e0 T smu_cmn_init_soft_gpu_metrics +ffffffff823069c0 T smu_cmn_set_mp1_state +ffffffff82306a60 T smu_cmn_is_audio_func_enabled +ffffffff82307000 T pci_mcfg_init +ffffffff82307050 T pci_lookup_segment +ffffffff823070b0 T pci_attach_hook +ffffffff823070e0 T pci_bus_maxdevs +ffffffff82307110 T pci_make_tag +ffffffff82307180 T pci_decompose_tag +ffffffff823071e0 T pci_conf_size +ffffffff82307240 T pci_mcfg_map_bus +ffffffff823072c0 T pci_conf_read +ffffffff82307410 T pci_conf_write +ffffffff82307550 T pci_msix_table_map +ffffffff82307670 T pci_msix_table_unmap +ffffffff82307710 T msi_hwmask +ffffffff82307740 T msi_hwunmask +ffffffff82307770 T msi_addroute +ffffffff82307870 T msi_delroute +ffffffff823078e0 T pci_intr_map_msi +ffffffff82307960 T msix_hwmask +ffffffff82307990 T msix_hwunmask +ffffffff823079c0 T msix_addroute +ffffffff82307bc0 T msix_delroute +ffffffff82307d20 T pci_intr_map_msix +ffffffff82307df0 T pci_intr_map +ffffffff82308010 T pci_intr_string +ffffffff823080f0 T pci_intr_establish +ffffffff82308140 T pci_intr_establish_cpu +ffffffff823082a0 T pci_intr_disestablish +ffffffff823082c0 T pci_init_extents +ffffffff823084a0 T pci_probe_device_hook +ffffffff823084e0 T pci_dev_postattach +ffffffff823084f0 T pci_min_powerstate +ffffffff82308500 T pci_set_powerstate_md +ffffffff82309000 T pciide_machdep_compat_intr_establish +ffffffff82309060 T pciide_machdep_compat_intr_disestablish +ffffffff8230a000 T vga_post_init +ffffffff8230a310 t vm86_emu_inb +ffffffff8230a360 t vm86_emu_inw +ffffffff8230a3a0 t vm86_emu_inl +ffffffff8230a3e0 t vm86_emu_outb +ffffffff8230a430 t vm86_emu_outw +ffffffff8230a470 t vm86_emu_outl +ffffffff8230a4b0 T vga_post_call +ffffffff8230a520 T vga_post_free +ffffffff8230a590 T ddb_vgapost +ffffffff8230b000 T pchbmatch +ffffffff8230b040 T pchbattach +ffffffff8230b4b0 T pchbactivate +ffffffff8230b520 T pchb_amd64ht_attach +ffffffff8230b670 T pchb_rnd +ffffffff8230b6f0 T pchb_print +ffffffff8230c000 T amas_match +ffffffff8230c050 T amas_attach +ffffffff8230c0b0 T amas_intl_nodes +ffffffff8230c140 T amas_get_pagerange +ffffffff8230d000 T agp_flush_cache +ffffffff8230d030 T agp_flush_cache_range +ffffffff8230d040 T agp_init_map +ffffffff8230d110 T agp_destroy_map +ffffffff8230d150 T agp_map_subregion +ffffffff8230d180 T agp_unmap_subregion +ffffffff8230d1b0 T agp_map_atomic +ffffffff8230d1e0 T agp_unmap_atomic +ffffffff8230e000 T cardslotmatch +ffffffff8230e050 T cardslotattach +ffffffff8230e2a0 T cardslot_event +ffffffff8230e300 T cardslot_cb_print +ffffffff8230e350 T cardslot_16_print +ffffffff8230e3a0 T cardslot_16_submatch +ffffffff8230e3f0 T cardslot_event_throw +ffffffff8230e490 T cardslot_process_event +ffffffff8230f000 T cardbusmatch +ffffffff8230f050 T cardbusattach +ffffffff8230f130 T cardbus_read_tuples +ffffffff8230f4e0 T parse_tuple +ffffffff8230f760 T cardbus_attach_card +ffffffff8230fee0 T enable_function +ffffffff8230ff80 T decode_tuples +ffffffff82310050 T cardbusprint +ffffffff82310140 T cardbussubmatch +ffffffff823101a0 T disable_function +ffffffff82310200 T cardbus_detach_card +ffffffff823102e0 T cardbus_intr_establish +ffffffff82310310 T cardbus_intr_disestablish +ffffffff82310330 T cardbus_function_enable +ffffffff82310410 T cardbus_function_disable +ffffffff82310470 T cardbus_matchbyid +ffffffff823104e0 T decode_tuple +ffffffff82311000 T cardbus_mapreg_map +ffffffff823111b0 T cardbus_mapreg_unmap +ffffffff82312000 T cardbus_read_exrom +ffffffff82313000 T rbus_space_alloc +ffffffff82313060 T rbus_space_alloc_subregion +ffffffff82313240 T rbus_space_free +ffffffff823132d0 T rbus_new_body +ffffffff82313360 T rbus_new_root_delegate +ffffffff82313430 T rbus_new_root_share +ffffffff82314000 T com_cardbus_match +ffffffff82314070 T com_cardbus_attach +ffffffff82314220 T com_cardbus_detach +ffffffff823142c0 T com_cardbus_find_csdev +ffffffff82314440 T com_cardbus_gofigure +ffffffff82314900 T com_cardbus_enable +ffffffff823149d0 T com_cardbus_disable +ffffffff82314a20 T com_cardbus_setup +ffffffff82315000 T xl_cardbus_match +ffffffff82315090 T xl_cardbus_attach +ffffffff82315420 T xl_cardbus_detach +ffffffff823154e0 T xl_cardbus_lookup +ffffffff823155a0 T xl_cardbus_intr_ack +ffffffff82316000 T dc_cardbus_match +ffffffff82316030 T dc_cardbus_attach +ffffffff823163c0 T dc_cardbus_detach +ffffffff82316460 T dc_cardbus_setup +ffffffff82317000 T fxp_cardbus_match +ffffffff82317030 T fxp_cardbus_attach +ffffffff82317240 T fxp_cardbus_detach +ffffffff823172d0 T fxp_cardbus_setup +ffffffff82318000 t rl_cardbus_match +ffffffff82318030 t rl_cardbus_attach +ffffffff823181d0 t rl_cardbus_detach +ffffffff82318290 T rl_cardbus_setup +ffffffff82319000 T re_cardbus_probe +ffffffff82319030 T re_cardbus_attach +ffffffff82319230 T re_cardbus_detach +ffffffff82319310 T re_cardbus_setup +ffffffff8231a000 T ath_cardbus_match +ffffffff8231a050 T ath_cardbus_attach +ffffffff8231a180 T ath_cardbus_detach +ffffffff8231a250 T ath_cardbus_enable +ffffffff8231a320 T ath_cardbus_disable +ffffffff8231a370 T ath_cardbus_power +ffffffff8231a3b0 T ath_cardbus_setup +ffffffff8231b000 T athn_cardbus_match +ffffffff8231b030 T athn_cardbus_attach +ffffffff8231b170 T athn_cardbus_detach +ffffffff8231b210 T athn_cardbus_enable +ffffffff8231b2e0 T athn_cardbus_disable +ffffffff8231b330 T athn_cardbus_power +ffffffff8231b370 T athn_cardbus_read +ffffffff8231b3a0 T athn_cardbus_write +ffffffff8231b3d0 T athn_cardbus_write_barrier +ffffffff8231b400 T athn_cardbus_setup +ffffffff8231c000 T atw_cardbus_match +ffffffff8231c030 T atw_cardbus_attach +ffffffff8231c220 T atw_cardbus_detach +ffffffff8231c2e0 T atw_cardbus_enable +ffffffff8231c3b0 T atw_cardbus_disable +ffffffff8231c400 T atw_cardbus_power +ffffffff8231c440 T atw_cardbus_setup +ffffffff8231d000 T rtw_cardbus_match +ffffffff8231d030 T rtw_cardbus_attach +ffffffff8231d280 T rtw_cardbus_detach +ffffffff8231d3a0 T rtw_cardbus_intr_ack +ffffffff8231d3c0 T rtw_cardbus_funcregen +ffffffff8231d420 T rtw_cardbus_enable +ffffffff8231d580 T rtw_cardbus_disable +ffffffff8231d660 T rtw_cardbus_power +ffffffff8231d6a0 T rtw_cardbus_setup +ffffffff8231e000 T ral_cardbus_match +ffffffff8231e030 T ral_cardbus_attach +ffffffff8231e230 T ral_cardbus_detach +ffffffff8231e2e0 T ral_cardbus_activate +ffffffff8231e370 T ral_cardbus_enable +ffffffff8231e4d0 T ral_cardbus_disable +ffffffff8231e520 T ral_cardbus_setup +ffffffff8231e5c0 T ral_cardbus_wakeup +ffffffff8231f000 T acx_cardbus_match +ffffffff8231f030 T acx_cardbus_attach +ffffffff8231f260 T acx_cardbus_detach +ffffffff8231f380 T acx_cardbus_enable +ffffffff8231f450 T acx_cardbus_disable +ffffffff8231f4a0 T acx_cardbus_power +ffffffff8231f4e0 T acx_cardbus_setup +ffffffff82320000 T pgt_cardbus_match +ffffffff82320030 T pgt_cardbus_attach +ffffffff82320230 T pgt_cardbus_detach +ffffffff823202e0 T pgt_cardbus_enable +ffffffff82320440 T pgt_cardbus_disable +ffffffff82320490 T pgt_cardbus_power +ffffffff823204f0 T pgt_cardbus_setup +ffffffff82321000 T ehci_cardbus_match +ffffffff82321040 T ehci_cardbus_attach +ffffffff823212e0 T ehci_cardbus_detach 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T pcmcia_activate +ffffffff82327180 T pcmcia_ccr_read +ffffffff823271d0 T pcmcia_ccr_write +ffffffff82327240 T pcmcia_card_attach +ffffffff82327450 T pcmcia_print +ffffffff823276b0 T pcmcia_submatch +ffffffff82327700 T pcmcia_card_detach +ffffffff823277b0 T pcmcia_card_deactivate +ffffffff82327820 T pcmcia_card_gettype +ffffffff82327880 T pcmcia_function_init +ffffffff823278d0 T pcmcia_function_enable +ffffffff82327d00 T pcmcia_function_disable +ffffffff82327e20 T pcmcia_io_map +ffffffff82328060 T pcmcia_intr_establish +ffffffff823282d0 T pcmcia_card_intr +ffffffff823283f0 T pcmcia_intr_disestablish +ffffffff82328610 T pcmcia_intr_string +ffffffff82329000 T pcmcia_cis_read_1 +ffffffff823290f0 T pcmcia_read_cis +ffffffff823291e0 T pcmcia_scan_cis +ffffffff8232acc0 T pcmcia_parse_cis_tuple +ffffffff8232be60 T pcmcia_print_cis +ffffffff8232d000 T pcmcia_check_cis_quirks +ffffffff8232e000 T ep_pcmcia_match +ffffffff8232e110 T ep_pcmcia_attach +ffffffff8232e560 T ep_pcmcia_detach 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wdc_pcmcia_activate +ffffffff82332760 T wdc_pcmcia_disk_device_interface_callback +ffffffff82332800 T wdc_pcmcia_disk_device_interface +ffffffff82332860 T wdc_pcmcia_lookup +ffffffff82333000 T sm_pcmcia_match +ffffffff82333100 T sm_pcmcia_attach +ffffffff82333320 T sm_pcmcia_detach +ffffffff823333c0 T sm_pcmcia_activate +ffffffff82333450 T sm_pcmcia_funce_enaddr +ffffffff82333470 T sm_pcmcia_ascii_enaddr +ffffffff82333570 T sm_pcmcia_lannid_ciscallback +ffffffff82333680 T sm_pcmcia_enable +ffffffff82333720 T sm_pcmcia_disable +ffffffff82334000 T xe_pcmcia_match +ffffffff82334050 T xe_pcmcia_attach +ffffffff823347a0 T xe_pcmcia_detach +ffffffff82334860 T xe_pcmcia_activate +ffffffff82334b50 T xe_pcmcia_interpret_manfid +ffffffff82334bf0 T xe_pcmcia_funce_enaddr +ffffffff82334c10 T xe_ioctl +ffffffff82334f70 T xe_start +ffffffff82335210 T xe_watchdog +ffffffff82335250 T xe_intr +ffffffff82335620 T xe_full_reset +ffffffff82335bf0 T xe_mdi_read +ffffffff82336580 T xe_mdi_write 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hme_eint +ffffffff82345290 T hme_intr +ffffffff82345390 T hme_newbuf +ffffffff82346000 T hmematch_pci +ffffffff82346040 T hmeattach_pci +ffffffff82346310 T hmedetach_pci +ffffffff82346390 T hme_pci_enaddr +ffffffff82347000 T isamatch +ffffffff82347050 T isaattach +ffffffff82347180 T isascan +ffffffff823475a0 T isaprint +ffffffff82347760 T isa_intr_typename +ffffffff82348000 T isadmamatch +ffffffff82348040 T isadmaattach +ffffffff82348230 T isa_dmacascade +ffffffff82348320 T isa_dmamap_create +ffffffff82348400 T isa_dmamap_destroy +ffffffff82348470 T isa_dmastart +ffffffff823488e0 T isa_dmaabort +ffffffff823489e0 T isa_dmacount +ffffffff82348ba0 T isa_dmafinished +ffffffff82348c60 T isa_dmadone +ffffffff82348df0 T isa_dmamem_alloc +ffffffff82348ec0 T isa_dmamem_free +ffffffff82348f40 T isa_dmamem_map +ffffffff82348fc0 T isa_dmamem_unmap +ffffffff82349000 T isa_dmamem_mmap +ffffffff823490a0 T isa_drq_isfree +ffffffff82349110 T isa_malloc +ffffffff823492c0 T isa_free +ffffffff823493f0 T isa_mappage +ffffffff8234a000 T fdcprobe +ffffffff8234a280 T fdcattach +ffffffff8234a3c0 T out_fdc +ffffffff8234a490 T fdcintr +ffffffff8234a4a0 T fdc_create_kthread +ffffffff8234a510 T fdcattach_deferred +ffffffff8234a5d0 T fdcpseudointr +ffffffff8234a610 T fddprint +ffffffff8234a660 T fdcresult +ffffffff8234a740 T fdcstart +ffffffff8234a770 T fdcstatus +ffffffff8234b000 T fdprobe +ffffffff8234b190 T fdattach +ffffffff8234b2d0 T fdactivate +ffffffff8234b370 T fdgetdisklabel +ffffffff8234b490 T fdstrategy +ffffffff8234b6c0 T fd_motor_on +ffffffff8234b720 T fd_motor_off +ffffffff8234b800 T fdtimeout +ffffffff8234b880 T fd_nvtotype +ffffffff8234b8f0 T fdstart +ffffffff8234b9a0 T fdfinish +ffffffff8234baf0 T fdread +ffffffff8234bb20 T fdwrite +ffffffff8234bb50 T fd_set_motor +ffffffff8234bc10 T fdintr +ffffffff8234c980 T fdopen +ffffffff8234cbd0 T fdclose +ffffffff8234cc60 T fdsize +ffffffff8234cc90 T fddump +ffffffff8234ccc0 T fdretry +ffffffff8234ce60 T fdioctl +ffffffff8234d310 T fdformat +ffffffff8234e000 T com_isa_probe +ffffffff8234e0d0 T com_isa_attach +ffffffff8234f000 T pckbc_isa_match +ffffffff8234f1e0 T pckbc_isa_attach +ffffffff8234f390 T pckbc_isa_activate +ffffffff82350000 T vga_isa_match +ffffffff823500f0 T vga_isa_attach +ffffffff82350130 T vga_isa_cnattach +ffffffff82351000 T wdc_isa_probe +ffffffff82351130 T wdc_isa_attach +ffffffff82351350 t wdc_isa_dma_init +ffffffff823513c0 t wdc_isa_dma_start +ffffffff823513f0 t wdc_isa_dma_finish +ffffffff82352000 T mpu_open +ffffffff82352180 T mpu_close +ffffffff823522b0 T mpu_output +ffffffff823523c0 T mpu_getinfo +ffffffff82352400 T mpu_find +ffffffff82352560 T mpu_reset +ffffffff82352680 T mpu_readinput +ffffffff82352710 T mpu_intr +ffffffff82353000 T mpu_isa_match +ffffffff82353060 T mpu_isa_attach +ffffffff823530f0 T mpu_test +ffffffff82354000 T pcppi_match +ffffffff823541d0 T pcppi_attach +ffffffff823542e0 t pcppi_bell_stop +ffffffff82354370 T pcppi_kbd_bell +ffffffff823543a0 T pcppi_bell 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it_match +ffffffff8235a2d0 T it_enter +ffffffff8235a360 T it_readreg +ffffffff8235a3a0 T it_writereg +ffffffff8235a3f0 T it_exit +ffffffff8235a440 T it_attach +ffffffff8235aaa0 T it_wdog_cb +ffffffff8235ad40 T it_ec_refresh +ffffffff8235b360 T it_ec_writereg +ffffffff8235b3b0 T it_ec_readreg +ffffffff8235b400 T it_activate +ffffffff8235c000 T uguru_refresh_temp +ffffffff8235c0d0 T uguru_refresh_volt +ffffffff8235c180 T uguru_refresh_fan +ffffffff8235c250 T uguru_match +ffffffff8235c3e0 T uguru_attach +ffffffff8235c970 T uguru_read_multi +ffffffff8235ca50 T uguru_ac5_read +ffffffff8235ccc0 T uguru_read_sensor +ffffffff8235cfe0 T uguru_ac5_read_sensor +ffffffff8235d070 T uguru_refresh +ffffffff8235d100 T uguru_write_multi +ffffffff8235e000 T aps_match +ffffffff8235e100 T aps_attach +ffffffff8235e380 T aps_activate +ffffffff8235e420 T aps_do_io +ffffffff8235e5f0 T aps_init +ffffffff8235e750 T aps_refresh +ffffffff8235e780 T aps_read_data +ffffffff8235e860 T aps_refresh_sensor_data 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wsdisplay_internal_ioctl +ffffffff82362700 T wsdisplayread +ffffffff82362780 T wsdisplaywrite +ffffffff82362800 T wsdisplaytty +ffffffff82362870 T wsdisplayioctl +ffffffff82362a10 T wsdisplay_cfg_ioctl +ffffffff82362d90 T wsdisplay_param +ffffffff82362e60 T wsdisplay_driver_ioctl +ffffffff82362f30 T wsdisplay_burner_setup +ffffffff82363090 T wsdisplay_switch +ffffffff82363320 T wsmoused +ffffffff82363430 T wsdisplaymmap +ffffffff823634b0 T wsdisplaykqfilter +ffffffff82363510 T mouse_remove +ffffffff823635d0 T wsdisplaystop +ffffffff82363640 T wsdisplay_emulbell +ffffffff82363690 T wsdisplay_emulinput +ffffffff82363730 T wsdisplay_kbdinput +ffffffff82363830 T wsdisplay_rawkbdinput +ffffffff823638d0 T wsdisplay_switch3 +ffffffff82363a80 T wsdisplay_switch1 +ffffffff82363bd0 T wsdisplay_switch2 +ffffffff82363d70 T wsdisplay_reset +ffffffff82363de0 T wsscreen_attach_sync +ffffffff82363e50 T wsscreen_detach_sync +ffffffff82363e90 T wsscreen_lookup_sync +ffffffff82363ee0 T wsdisplay_maxscreenidx +ffffffff82363f10 T wsdisplay_screenstate +ffffffff82363f60 T wsdisplay_getactivescreen +ffffffff82363fa0 T wsscreen_switchwait +ffffffff823640c0 T wsdisplay_kbdholdscreen +ffffffff82364130 T wsdisplay_set_console_kbd +ffffffff823641a0 T wsdisplay_set_cons_kbd +ffffffff823641e0 T wsdisplay_unset_cons_kbd +ffffffff82364230 T wsdisplay_enter_ddb +ffffffff823642c0 T wsdisplay_suspend +ffffffff82364330 T wsdisplay_suspend_device +ffffffff82364570 T wsdisplay_resume +ffffffff82364650 T wsdisplay_resume_device +ffffffff823646f0 T wsscrollback +ffffffff82364770 T wsdisplay_get_param +ffffffff823648b0 T wsdisplay_set_param +ffffffff823649b0 T wsdisplay_brightness_step +ffffffff82364b50 T wsdisplay_brightness_zero +ffffffff82364c60 T wsdisplay_brightness_cycle +ffffffff82364cd0 T motion_event +ffffffff82364d90 T button_event +ffffffff82364f20 T ctrl_event +ffffffff82365130 T mouse_moverel +ffffffff82365260 T mouse_zaxis +ffffffff823652f0 T mouse_copy_end +ffffffff82365360 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wsemul_vt100_detach +ffffffff8237b8e0 T wsemul_vt100_resetop +ffffffff8237ba90 T wsemul_vt100_output_esc +ffffffff8237c110 T wsemul_vt100_output_csi +ffffffff8237c240 T wsemul_vt100_output_scs94 +ffffffff8237c300 T wsemul_vt100_output_scs94_percent +ffffffff8237c350 T wsemul_vt100_output_scs96 +ffffffff8237c4a0 T wsemul_vt100_output_scs96_percent +ffffffff8237c4f0 T wsemul_vt100_output_esc_hash +ffffffff8237c850 T wsemul_vt100_output_esc_spc +ffffffff8237c880 T wsemul_vt100_output_string +ffffffff8237c8f0 T wsemul_vt100_output_string_esc +ffffffff8237c940 T wsemul_vt100_output_dcs +ffffffff8237c9e0 T wsemul_vt100_output_dcs_dollar +ffffffff8237ca40 T wsemul_vt100_output_esc_percent +ffffffff8237caa0 T wsemul_vt100_init +ffffffff8237cb00 T wsemul_vt100_reset +ffffffff8237cc20 T wsemul_vt100_nextline +ffffffff8237ccb0 T wsemul_vt100_output_normal +ffffffff8237cef0 T wsemul_vt100_output_c0c1 +ffffffff8237d170 T wsemul_vt100_jump_scroll +ffffffff8237e000 T wsemul_vt100_scrollup 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T pmsprobe +ffffffff823830a0 T pmsattach +ffffffff82383280 T pmsactivate +ffffffff823832e0 T pms_enable +ffffffff82383350 T pms_ioctl +ffffffff823833a0 T pms_disable +ffffffff823833e0 T pms_sec_enable +ffffffff82383450 T pms_sec_ioctl +ffffffff823834a0 T pms_sec_disable +ffffffff823834e0 T pms_ioctl_mouse +ffffffff82383600 T pms_sync_mouse +ffffffff82383660 T pms_proc_mouse +ffffffff82383700 T pms_enable_synaptics +ffffffff82383b30 T pms_ioctl_synaptics +ffffffff82383c00 T pms_sync_synaptics +ffffffff82383c60 T pms_proc_synaptics +ffffffff82383fb0 T pms_disable_synaptics +ffffffff82384090 T pms_enable_alps +ffffffff82384b10 T pms_ioctl_alps +ffffffff82384bc0 T pms_sync_alps +ffffffff82384c60 T pms_proc_alps +ffffffff82384eb0 T pms_enable_elantech_v1 +ffffffff823850c0 T pms_ioctl_elantech +ffffffff82385180 T pms_sync_elantech_v1 +ffffffff82385260 T pms_proc_elantech_v1 +ffffffff823853d0 T pms_enable_elantech_v2 +ffffffff82385570 T pms_sync_elantech_v2 +ffffffff82385670 T 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iommu_flush_write_buffer +ffffffff824f3680 T iommu_set_rtaddr +ffffffff824f37b0 T iommu_write_8 +ffffffff824f37e0 T iommu_write_4 +ffffffff824f3810 T iommu_read_4 +ffffffff824f3830 T iommu_alloc_hwdte +ffffffff824f3980 T iommu_issue_qi +ffffffff824f39b0 T iommu_flush_tlb_qi +ffffffff824f39e0 T iommu_flush_ctx_qi +ffffffff824f3a10 T ivhd_invalidate_domain +ffffffff824f3a70 T iommu_read_8 +ffffffff824f3a90 T iommu_flush_ctx +ffffffff824f3bb0 T iommu_enable_qi +ffffffff824f3cd0 T iommu_showcfg +ffffffff824f3ef0 T iommu_init +ffffffff824f4230 T acpidmar_intr_establish +ffffffff824f4340 T acpidmar_intr +ffffffff824f44e0 T acpidmar_match_devscope +ffffffff824f4620 T domain_create +ffffffff824f4860 t dmar_dmamap_create +ffffffff824f4880 t dmar_dmamap_destroy +ffffffff824f4890 t dmar_dmamap_load +ffffffff824f4900 t dmar_dmamap_load_mbuf +ffffffff824f4960 t dmar_dmamap_load_uio +ffffffff824f49c0 t dmar_dmamap_load_raw +ffffffff824f4a30 t dmar_dmamap_unload +ffffffff824f4a60 t dmar_dmamap_sync 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ivhd_issue_command +ffffffff824f7350 T ivhd_invalidate_iommu_all +ffffffff824f7440 T ivhd_invalidate_interrupt_table +ffffffff824f7530 T ivhd_showreg +ffffffff824f7670 T ivhd_checkerr +ffffffff824f78c0 T ivhd_iommu_init +ffffffff824f7d90 T acpiivrs_ivhd +ffffffff824f7e00 T acpiivrs_init +ffffffff824f7f30 T acpidmar_msi_hwmask +ffffffff824f7fa0 T acpidmar_msi_hwunmask +ffffffff824f8010 T acpidmar_msi_addroute +ffffffff824f80d0 T acpidmar_msi_delroute +ffffffff824f80f0 T iommu_showfault +ffffffff824f82b0 T iommu_showpte +ffffffff824f9000 T acpidock_match +ffffffff824f9070 T acpidock_attach +ffffffff824f9390 T acpidock_status +ffffffff824f9420 T acpidock_docklock +ffffffff824f9500 T acpidock_dockctl +ffffffff824f95e0 T acpidock_foundejd +ffffffff824f9690 T acpidock_notify +ffffffff824f9b80 T acpidock_eject +ffffffff824f9c70 T acpidock_walkchildren +ffffffff824fa000 T abl_match +ffffffff824fa030 T abl_attach +ffffffff824fa220 T abl_get_brightness +ffffffff824fa2a0 T abl_get_param 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acpivideo_attach +ffffffff825031d0 T acpivideo_getpcibus +ffffffff82503210 T acpivideo_notify +ffffffff82503270 T acpivideo_set_policy +ffffffff82503340 T acpi_foundvout +ffffffff82503410 T acpivideo_print +ffffffff82504000 T acpivout_match +ffffffff82504070 T acpivout_attach +ffffffff825041c0 T acpivout_notify +ffffffff82504270 T acpivout_get_bcl +ffffffff82504390 T acpivout_get_brightness +ffffffff82504430 T acpivout_get_param +ffffffff825044e0 T acpivout_set_param +ffffffff82504650 T acpivout_select_brightness +ffffffff82504720 T acpivout_find_brightness +ffffffff825047b0 T acpivout_set_brightness +ffffffff82505000 T acpipwrres_match +ffffffff82505070 T acpipwrres_attach +ffffffff825052b0 T acpipwrres_foundcons +ffffffff82505440 T acpipwrres_ref_incr +ffffffff825054d0 T acpipwrres_hascons +ffffffff82505520 T acpipwrres_ref_decr +ffffffff825055b0 T acpipwrres_addcons +ffffffff82506000 T aibs_match +ffffffff82506030 T aibs_attach +ffffffff82506140 T aibs_probe +ffffffff825062a0 T aibs_attach_new +ffffffff825063c0 T aibs_attach_sif +ffffffff82506590 T aibs_notify +ffffffff82506600 T aibs_add_sensor +ffffffff82506850 T aibs_getpack +ffffffff825068d0 T aibs_refresh +ffffffff82506930 T aibs_refresh_r +ffffffff82506a70 T aibs_getvalue +ffffffff82506bc0 T aibs_find_cb +ffffffff82507000 T aplgpio_match +ffffffff82507060 T aplgpio_attach +ffffffff82507300 T aplgpio_intr +ffffffff82507440 T aplgpio_read_pin +ffffffff82507490 T aplgpio_write_pin +ffffffff82507500 T aplgpio_intr_establish +ffffffff82507620 T aplgpio_intr_enable +ffffffff825076b0 T aplgpio_intr_disable +ffffffff82508000 T bytgpio_match +ffffffff82508060 T bytgpio_attach +ffffffff82508320 T bytgpio_intr +ffffffff82508450 T bytgpio_read_pin +ffffffff825084b0 T bytgpio_write_pin +ffffffff82508530 T bytgpio_intr_establish +ffffffff825085a0 T bytgpio_intr_enable +ffffffff82508690 T bytgpio_intr_disable +ffffffff82509000 T chvgpio_match +ffffffff82509060 T chvgpio_attach +ffffffff82509300 T chvgpio_intr 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T com_acpi_attach +ffffffff825103a0 T com_acpi_is_designware +ffffffff82510400 T com_acpi_intr_designware +ffffffff82510430 T com_acpi_is_console +ffffffff82511000 T sdhc_acpi_match +ffffffff82511060 T sdhc_acpi_attach +ffffffff82511360 T sdhc_acpi_parse_resources +ffffffff82511420 T sdhc_acpi_card_detect_gpio +ffffffff82511480 T sdhc_acpi_card_detect_intr +ffffffff825114c0 T sdhc_acpi_power_on +ffffffff82511540 T sdhc_acpi_explore +ffffffff82511570 T sdhc_acpi_card_detect_nonremovable +ffffffff825115a0 T sdhc_acpi_do_explore +ffffffff82512000 T dwiic_acpi_match +ffffffff82512050 T dwiic_acpi_attach +ffffffff825123b0 T dwiic_acpi_parse_crs +ffffffff825124e0 T dwiic_acpi_power +ffffffff825125f0 T dwiic_acpi_get_params +ffffffff82512730 T dwiic_i2c_intr_establish +ffffffff825127b0 T dwiic_i2c_intr_disestablish +ffffffff825127d0 T dwiic_i2c_intr_string +ffffffff82512860 T dwiic_acpi_bus_scan +ffffffff825128a0 T dwiic_acpi_found_hid +ffffffff82512bd0 T dwiic_matchhids +ffffffff82512c60 T dwiic_acpi_found_ihidev +ffffffff82512ee0 T dwiic_acpi_found_iatp +ffffffff82514000 T acpicbkbd_match +ffffffff82514030 T acpicbkbd_attach +ffffffff825140d0 T acpicbkbd_activate +ffffffff82514120 T acpicbkbd_get_backlight +ffffffff825141a0 T acpicbkbd_set_backlight +ffffffff82514240 T acpicbkbd_write_backlight +ffffffff82515000 T acpials_match +ffffffff82515090 T acpials_attach +ffffffff82515230 T acpials_read +ffffffff825152b0 T acpials_addtask +ffffffff825152f0 T acpials_notify +ffffffff82515380 T acpials_update +ffffffff82516000 T tpm_match +ffffffff82516050 T tpm_attach +ffffffff82516320 T tpm_activate +ffffffff82516430 T tpm2_start_method +ffffffff825164b0 T tpm_probe +ffffffff82516560 T tpm_init_tis +ffffffff825167d0 T tpm_init_crb +ffffffff82516b10 T tpm_suspend +ffffffff82516c00 T tpm_resume +ffffffff82516c30 T tpm_write_tis +ffffffff82516fb0 T tpm_read_tis +ffffffff82517190 T tpm_write_crb +ffffffff825175a0 T tpm_read_crb +ffffffff825178a0 T tpm_request_locality_tis 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+ffffffff8251e730 T acpi_release_glk +ffffffff8251e780 T acpi_attach_machdep +ffffffff8251e910 T acpi_sleep_cpu +ffffffff8251eab0 T acpi_resume_cpu +ffffffff8251ebb0 T sleep_mp +ffffffff8251ecb0 T resume_mp +ffffffff8251eda0 T acpi_iommu_device_map +ffffffff8251f000 T hibernate_resume_machdep +ffffffff8251f050 T hibernate_drop_to_real_mode +ffffffff8251f060 T hibernate_activate_resume_pt_machdep +ffffffff8251f0a0 T hibernate_switch_stack_machdep +ffffffff8251f0e0 T hibernate_flush +ffffffff8251f110 T acpi_savecpu +ffffffff82520000 T sleep_showstate +ffffffff82520100 T sleep_setstate +ffffffff82520160 T gosleep +ffffffff82520220 T sleep_abort +ffffffff82520250 T sleep_resume +ffffffff825202c0 T suspend_finish +ffffffff82521000 T acpipci_match +ffffffff82521030 T acpipci_attach +ffffffff825212f0 T acpipci_osc +ffffffff82521430 T acpipci_parse_resources +ffffffff82521540 T acpipci_attach_bus +ffffffff82521710 T acpipci_print +ffffffff82521780 T acpipci_attach_busses +ffffffff82522000 T efiopen +ffffffff82522040 T eficlose +ffffffff82522070 T efiioctl +ffffffff82522110 T efiioc_get_table +ffffffff82522270 T efiioc_var_get +ffffffff825224f0 T efiioc_var_next +ffffffff82522710 T efiioc_var_set +ffffffff825229c0 T efi_adapt_error +ffffffff82523000 T efi_match +ffffffff82523060 T efi_attach +ffffffff82523420 T efi_map_runtime +ffffffff825235a0 T efi_enter +ffffffff82523630 T efi_leave +ffffffff82523690 T efi_gettime +ffffffff82523860 T efi_settime +ffffffff825239c0 T efi_fault +ffffffff82524000 T vmm_probe +ffffffff82524050 T vmm_attach +ffffffff825243e0 T vmm_activate +ffffffff82524600 T vmm_enabled +ffffffff82524690 T vmm_quiesce_vmx +ffffffff82524860 T vmm_stop +ffffffff825249b0 T vmm_start +ffffffff82524aa0 T vmmopen +ffffffff82524af0 T vmmioctl +ffffffff82524f00 T vm_create +ffffffff82525330 T vm_run +ffffffff82525520 T vm_get_info +ffffffff82525770 T vm_terminate +ffffffff825258e0 T vm_resetcpu +ffffffff82525a40 T vm_intr_pending +ffffffff82525b10 T vm_rwregs +ffffffff82525c60 T vm_mprotect_ept +ffffffff82525f10 T vm_rwvmparams +ffffffff825260d0 T pledge_ioctl_vmm +ffffffff825261b0 T vmmclose +ffffffff825261e0 T vm_find +ffffffff82526300 T vcpu_reset_regs +ffffffff82526350 T vmm_init_pvclock +ffffffff82526430 T vcpu_readregs_vmx +ffffffff82526860 T vcpu_writeregs_vmx +ffffffff82526cd0 T vcpu_readregs_svm +ffffffff82527180 T vcpu_writeregs_svm +ffffffff82527650 T vmm_get_guest_memtype +ffffffff825276d0 T vmx_mprotect_ept +ffffffff82527950 T vmx_pmap_find_pte_ept +ffffffff82527a20 T start_vmm_on_cpu +ffffffff82527b00 T stop_vmm_on_cpu +ffffffff82527ba0 T vmclear_on_cpu +ffffffff82527c20 T vm_create_check_mem_ranges +ffffffff82527d80 T vm_impl_init +ffffffff82527e30 T vm_teardown +ffffffff82527fe0 T vcpu_init +ffffffff825280b0 T vm_impl_init_vmx +ffffffff825281d0 T vm_impl_init_svm +ffffffff825282f0 T vm_impl_deinit_vmx +ffffffff82528320 T vm_impl_deinit_svm +ffffffff82528350 T vm_impl_deinit +ffffffff825283c0 T vcpu_reload_vmcs_vmx +ffffffff82528500 T vcpu_reset_regs_svm +ffffffff825288a0 T svm_setmsrbrw +ffffffff82528a10 T svm_setmsrbr +ffffffff82528ae0 T vmm_alloc_vpid +ffffffff82528c00 T svm_setmsrbw +ffffffff82528ce0 T vmx_setmsrbr +ffffffff82528d90 T vmx_setmsrbw +ffffffff82528e40 T vmx_setmsrbrw +ffffffff82528f50 T svm_set_clean +ffffffff82528fa0 T svm_set_dirty +ffffffff82528ff0 T vcpu_reset_regs_vmx +ffffffff82529b80 T vcpu_vmx_check_cap +ffffffff82529c80 T vcpu_vmx_compute_ctrl +ffffffff82529e60 T vcpu_init_vmx +ffffffff8252a200 T vcpu_deinit_vmx +ffffffff8252a380 T vcpu_init_svm +ffffffff8252a510 T vcpu_deinit_svm +ffffffff8252a650 T vmm_free_vpid +ffffffff8252a6c0 T vcpu_deinit +ffffffff8252a710 T vcpu_run_vmx +ffffffff8252af20 T vcpu_run_svm +ffffffff8252b510 T vcpu_must_stop +ffffffff8252b580 T vmm_fpurestore +ffffffff8252b650 T vmm_fpusave +ffffffff8252b6d0 T vmm_translate_gva +ffffffff8252ba00 T vmm_update_pvclock +ffffffff8252bb00 T vmx_get_exit_info +ffffffff8252bb60 T vmx_handle_exit +ffffffff8252bf50 T vmx_instruction_error_decode +ffffffff8252c120 T vmm_get_guest_cpu_cpl +ffffffff8252c1d0 T vmx_handle_intr +ffffffff8252c260 T svm_handle_hlt +ffffffff8252c2b0 T vmx_handle_hlt +ffffffff8252c360 T svm_handle_exit +ffffffff8252c640 T svm_handle_np_fault +ffffffff8252c7f0 T vmm_handle_cpuid +ffffffff8252ce70 T svm_handle_msr +ffffffff8252d130 T svm_handle_xsetbv +ffffffff8252d180 T svm_handle_inout +ffffffff8252d2a0 T vmm_inject_ud +ffffffff8252d2d0 T vmm_inject_db +ffffffff8252d300 T vmx_handle_np_fault +ffffffff8252d480 T vmx_handle_inout +ffffffff8252d620 T vmx_handle_cr +ffffffff8252d890 T vmx_handle_rdmsr +ffffffff8252d960 T vmx_handle_wrmsr +ffffffff8252dbc0 T vmx_handle_xsetbv +ffffffff8252dc50 T vmm_inject_gp +ffffffff8252dc80 T vmx_get_exit_qualification +ffffffff8252dce0 T vmx_get_guest_faulttype +ffffffff8252dd80 T svm_get_guest_faulttype +ffffffff8252ddb0 T svm_fault_page +ffffffff8252de40 T vmx_fault_page +ffffffff8252dfa0 T vmm_get_guest_cpu_mode +ffffffff8252e0b0 T vmx_load_pdptes +ffffffff8252e330 T vmx_handle_cr0_write +ffffffff8252e540 T vmx_handle_cr4_write +ffffffff8252e5e0 T vmm_handle_xsetbv +ffffffff8252e6d0 T vmx_handle_misc_enable_msr +ffffffff8252e730 T vmm_pat_is_valid +ffffffff8252e810 T vmm_gpa_is_valid +ffffffff8252e880 T vmx_exit_reason_decode +ffffffff8252e8c0 T svm_exit_reason_decode +ffffffff8252f6d0 T vcpu_state_decode +ffffffff82530000 T vmm_dispatch_intr +ffffffff82530020 T vmxon +ffffffff82530050 T vmxoff +ffffffff82530080 T vmclear +ffffffff825300b0 T vmptrld +ffffffff825300e0 T vmptrst +ffffffff82530110 T vmwrite +ffffffff82530140 T vmread +ffffffff82530170 T invvpid +ffffffff825301a0 T invept +ffffffff825301d0 T vmx_enter_guest +ffffffff825301fb t skip_init +ffffffff825302c8 t no_l1df_msr +ffffffff825302cb t l1df_tlb_loop +ffffffff825302e4 t l1df_tlb_done +ffffffff825302ec t l1df_load_cache +ffffffff82530303 t done_flush +ffffffff82530396 t do_resume +ffffffff8253041b t fail_launch_or_resume +ffffffff8253045d t fail_launch_unknown +ffffffff8253046a t fail_launch_invalid_vmcs +ffffffff82530477 t fail_launch_valid_vmcs +ffffffff82530494 t vmx_exit_handler_asm +ffffffff82530559 t restore_host +ffffffff825305f0 T svm_enter_guest +ffffffff82530780 t restore_host_svm +ffffffff82531000 T sdmmc_match +ffffffff82531050 T sdmmc_attach +ffffffff82531390 T sdmmc_detach +ffffffff82531440 T sdmmc_activate +ffffffff82531510 T sdmmc_discover_task +ffffffff825315d0 T sdmmc_create_thread +ffffffff82531640 T sdmmc_holds_root_device +ffffffff825316a0 T sdmmc_task_thread +ffffffff82531890 T sdmmc_needs_discover +ffffffff82531940 T sdmmc_del_task +ffffffff825319f0 T sdmmc_card_detach +ffffffff82531ad0 T sdmmc_add_task +ffffffff82531b50 T sdmmc_card_attach +ffffffff82531c60 T sdmmc_enable +ffffffff82531db0 T sdmmc_scan +ffffffff82531e40 T sdmmc_init +ffffffff82531f40 T sdmmc_disable +ffffffff825320a0 T sdmmc_function_free +ffffffff825320c0 T sdmmc_delay +ffffffff82532110 T sdmmc_select_card +ffffffff82532290 T sdmmc_set_bus_power +ffffffff82532450 T sdmmc_function_alloc +ffffffff825324e0 T sdmmc_app_command +ffffffff82532670 T sdmmc_mmc_command +ffffffff825326f0 T sdmmc_go_idle_state +ffffffff82532810 T sdmmc_send_if_cond +ffffffff82532960 T sdmmc_set_relative_addr +ffffffff82533000 T sdmmc_cisptr +ffffffff825330a0 T sdmmc_read_cis +ffffffff825333b0 T sdmmc_print_cis +ffffffff82533520 T sdmmc_check_cis_quirks +ffffffff82534000 T sdmmc_io_enable +ffffffff825342a0 T sdmmc_io_reset +ffffffff825343d0 T sdmmc_io_send_op_cond +ffffffff82534540 T sdmmc_io_scan +ffffffff82534690 T sdmmc_io_init +ffffffff825347c0 T sdmmc_io_set_highspeed +ffffffff82534a70 T sdmmc_io_set_bus_width +ffffffff82534d00 T sdmmc_io_function_ready +ffffffff82534e80 T sdmmc_io_read_1 +ffffffff82534fd0 T sdmmc_io_function_enable +ffffffff825353a0 T sdmmc_io_write_1 +ffffffff82535520 T sdmmc_io_function_disable +ffffffff825357a0 T sdmmc_io_attach +ffffffff82535890 T sdmmc_print +ffffffff82535ae0 T sdmmc_submatch +ffffffff82535b60 T sdmmc_io_detach +ffffffff82535c10 T sdmmc_io_rw_direct +ffffffff82535db0 T sdmmc_io_rw_extended_subr +ffffffff82535f50 T sdmmc_io_rw_extended +ffffffff82536340 T sdmmc_io_read_2 +ffffffff825364a0 T sdmmc_io_write_2 +ffffffff82536600 T sdmmc_io_read_4 +ffffffff82536760 T sdmmc_io_write_4 +ffffffff825368c0 T sdmmc_io_read_multi_1 +ffffffff825369b0 T sdmmc_io_write_multi_1 +ffffffff82536aa0 T sdmmc_io_read_region_1 +ffffffff82536b90 T sdmmc_io_write_region_1 +ffffffff82536c80 T sdmmc_io_xchg +ffffffff82536e10 T sdmmc_intr_enable +ffffffff82537080 T sdmmc_intr_disable +ffffffff825372f0 T sdmmc_intr_establish +ffffffff825373f0 T sdmmc_intr_disestablish +ffffffff825374e0 T sdmmc_card_intr +ffffffff82537530 T sdmmc_intr_task +ffffffff825375c0 T sdmmc_io_set_blocklen +ffffffff82538000 T sdmmc_mem_enable +ffffffff825384e0 T sdmmc_mem_send_op_cond +ffffffff82538690 T sdmmc_mem_signal_voltage +ffffffff82538750 T sdmmc_mem_scan +ffffffff82538a60 T sdmmc_decode_csd +ffffffff82538e70 T sdmmc_decode_cid +ffffffff825392b0 T sdmmc_mem_send_scr +ffffffff825393f0 T sdmmc_mem_decode_scr +ffffffff82539470 T sdmmc_mem_send_cxd_data +ffffffff825395e0 T sdmmc_mem_set_bus_width +ffffffff82539700 T sdmmc_mem_sd_switch +ffffffff825399b0 T sdmmc_be512_to_bitfield512 +ffffffff82539a60 T sdmmc_mem_mmc_switch +ffffffff82539b50 T sdmmc_mem_init +ffffffff82539ca0 T sdmmc_mem_set_blocklen +ffffffff82539da0 T sdmmc_mem_sd_init +ffffffff8253a350 T sdmmc_mem_mmc_init +ffffffff8253ac70 T sdmmc_mem_select_transfer_mode +ffffffff8253acf0 T sdmmc_mem_execute_tuning +ffffffff8253ad80 T sdmmc_mem_read_block_subr +ffffffff8253b0e0 T sdmmc_mem_single_read_block +ffffffff8253b1b0 T sdmmc_mem_read_block +ffffffff8253b370 T sdmmc_mem_write_block_subr +ffffffff8253b6c0 T sdmmc_mem_single_write_block +ffffffff8253b790 T sdmmc_mem_write_block +ffffffff8253b950 T sdmmc_mem_hibernate_write +ffffffff8253c000 T sdmmc_scsi_cmd +ffffffff8253c1f0 T sdmmc_minphys +ffffffff8253c270 T sdmmc_scsi_attach +ffffffff8253c460 T sdmmc_alloc_ccbs +ffffffff8253c5a0 T sdmmc_free_ccbs +ffffffff8253c600 T sdmmc_scsi_detach +ffffffff8253c760 T sdmmc_stimeout +ffffffff8253c7e0 T sdmmc_ccb_alloc +ffffffff8253c890 T sdmmc_ccb_free +ffffffff8253c970 T sdmmc_inquiry +ffffffff8253cba0 T sdmmc_start_xs +ffffffff8253cc90 T sdmmc_complete_xs +ffffffff8253cd60 T sdmmc_done_xs +ffffffff8253cdb0 T sdmmc_scsi_hibernate_io +ffffffff8253d000 T bwfm_sdio_preinit +ffffffff8253d4f0 T bwfm_sdio_txcheck +ffffffff8253d530 T bwfm_sdio_txdata +ffffffff8253d5a0 T bwfm_sdio_txctl +ffffffff8253d6f0 T bwfm_sdio_buscore_read +ffffffff8253d700 T bwfm_sdio_buscore_write +ffffffff8253d720 T bwfm_sdio_buscore_prepare +ffffffff8253d860 T bwfm_sdio_buscore_activate +ffffffff8253d8e0 T bwfm_sdio_match +ffffffff8253d9b0 T bwfm_sdio_attach +ffffffff8253dc70 T bwfm_sdio_detach +ffffffff8253dcd0 T bwfm_sdio_task +ffffffff8253de30 T bwfm_sdio_write_1 +ffffffff8253de60 T bwfm_sdio_read_1 +ffffffff8253de90 T bwfm_sdio_write_4 +ffffffff8253df40 T bwfm_sdio_read_4 +ffffffff8253dff0 T bwfm_sdio_load_microcode +ffffffff8253e250 T bwfm_sdio_clkctl +ffffffff8253e380 T bwfm_sdio_dev_write +ffffffff8253e3d0 T bwfm_sdio_intr +ffffffff8253e410 T bwfm_sdio_ram_read_write +ffffffff8253e640 T bwfm_sdio_htclk +ffffffff8253e8a0 T bwfm_sdio_readshared +ffffffff8253e970 T bwfm_sdio_dev_read +ffffffff8253e9b0 T bwfm_sdio_rx_frames +ffffffff8253ed40 T bwfm_sdio_tx_frames +ffffffff8253ee20 T bwfm_sdio_backplane +ffffffff8253eed0 T bwfm_sdio_buf_read +ffffffff8253efb0 T bwfm_sdio_buf_write +ffffffff8253f060 T bwfm_sdio_frame_read_write +ffffffff8253f1e0 T bwfm_sdio_newbuf +ffffffff8253f260 T bwfm_sdio_tx_ok +ffffffff8253f2b0 T bwfm_sdio_tx_ctrlframe +ffffffff8253f3b0 T bwfm_sdio_tx_dataframe +ffffffff8253f500 T bwfm_sdio_rx_glom +ffffffff82540000 T onewire_match +ffffffff82540050 T onewire_attach +ffffffff825400f0 T onewire_detach +ffffffff82540160 T onewire_activate +ffffffff82540180 T onewire_scan +ffffffff82540390 T onewire_createthread +ffffffff82540400 T onewire_print +ffffffff825404d0 T onewirebus_print +ffffffff82540520 T onewire_lock +ffffffff82540540 T onewire_unlock +ffffffff82540560 T onewire_reset +ffffffff82540580 T onewire_bit +ffffffff825405a0 T onewire_read_byte +ffffffff825406e0 T onewire_write_byte +ffffffff825407c0 T onewire_read_block +ffffffff82540860 T onewire_write_block +ffffffff82540900 T onewire_triplet +ffffffff825409e0 T onewire_matchrom +ffffffff82540b30 T onewire_search +ffffffff82540ec0 T onewire_thread +ffffffff82541000 T onewire_crc +ffffffff825410e0 T onewire_crc16 +ffffffff825411c0 T onewire_famname +ffffffff82541200 T onewire_matchbyfam +ffffffff82542000 T owid_match +ffffffff82542030 T owid_attach +ffffffff82542100 T owid_detach +ffffffff82542140 T owid_activate +ffffffff82543000 T owsbm_match +ffffffff82543030 T owsbm_attach +ffffffff825431d0 T owsbm_detach +ffffffff82543240 T owsbm_activate +ffffffff82543270 T owsbm_update +ffffffff82544000 T owtemp_match +ffffffff82544030 T owtemp_attach +ffffffff82544130 T owtemp_detach +ffffffff825441a0 T owtemp_activate +ffffffff825441d0 T owtemp_update +ffffffff82545000 T owctr_match +ffffffff82545030 T owctr_attach +ffffffff82545180 T owctr_detach +ffffffff825451f0 T owctr_activate +ffffffff82545220 T owctr_update +ffffffff82545250 T owctr_update_counter +ffffffff82546000 A __text_page_start +ffffffff82546000 T Xsyscall_meltdown +ffffffff8254600c T Xsyscall +ffffffff8254626e t Xsyscall_trampback +ffffffff82546280 T intr_user_exit +ffffffff825462c2 t intr_user_exit_post_ast +ffffffff825463ee t Xiretq_trampback +ffffffff825463fa T doreti_iret +ffffffff82547000 T alltraps +ffffffff82547138 T recall_trap +ffffffff82547150 T alltraps_kern +ffffffff82547153 T alltraps_kern_meltdown +ffffffff82548000 ? Xsyscall32 +ffffffff82548000 A __kutext_start +ffffffff82548000 A __text_page_end +ffffffff82549000 ? Xtrap00 +ffffffff82549010 ? Xtrap01 +ffffffff82549020 ? Xtrap02 +ffffffff82549028 c calltrap_specstk +ffffffff825490f0 ? calltrap_specstk_tramp +ffffffff82549110 ? Xtrap03 +ffffffff82549120 ? Xtrap04 +ffffffff82549130 ? Xtrap05 +ffffffff82549140 ? Xtrap06 +ffffffff82549150 ? Xtrap07 +ffffffff82549160 ? Xtrap08 +ffffffff82549170 ? Xtrap09 +ffffffff82549180 ? Xtrap0a +ffffffff82549190 ? Xtrap0b +ffffffff825491a0 ? Xtrap0c +ffffffff825491b0 ? Xtrap0d +ffffffff82549240 ? Xtrap0e +ffffffff82549250 ? Xintrspurious +ffffffff82549250 ? Xtrap0f +ffffffff82549260 ? Xtrap10 +ffffffff82549270 ? Xtrap11 +ffffffff82549280 ? Xtrap12 +ffffffff82549290 ? Xtrap13 +ffffffff825492a0 ? Xtrap14 +ffffffff825492b0 ? Xtrap15 +ffffffff825492c0 ? Xtrap16 +ffffffff825492c0 ? Xtrap17 +ffffffff825492c0 ? Xtrap18 +ffffffff825492c0 ? Xtrap19 +ffffffff825492c0 ? Xtrap1a +ffffffff825492c0 ? Xtrap1b +ffffffff825492c0 ? Xtrap1c +ffffffff825492c0 ? Xtrap1d +ffffffff825492c0 ? Xtrap1e +ffffffff825492c0 ? Xtrap1f +ffffffff825492d0 ? x2apic_eoi +ffffffff825492f0 ? Xintr_lapic_ipi +ffffffff82549330 ? Xipi_invltlb +ffffffff82549360 ? Xipi_invlpg +ffffffff82549390 ? Xipi_invlrange +ffffffff825493d0 ? Xipi_invltlb_pcid +ffffffff82549410 ? Xipi_invlpg_pcid +ffffffff82549460 ? Xipi_invlrange_pcid +ffffffff825494d0 ? Xintr_lapic_ltimer +ffffffff82549510 ? Xintr_xen_upcall +ffffffff82549550 ? Xintr_hyperv_upcall +ffffffff82549590 ? Xintr_legacy0 +ffffffff825495d0 ? Xintr_legacy1 +ffffffff82549610 ? Xintr_legacy2 +ffffffff82549650 ? Xintr_legacy3 +ffffffff82549690 ? Xintr_legacy4 +ffffffff825496d0 ? Xintr_legacy5 +ffffffff82549710 ? Xintr_legacy6 +ffffffff82549750 ? Xintr_legacy7 +ffffffff82549790 ? Xintr_legacy8 +ffffffff825497d0 ? Xintr_legacy9 +ffffffff82549810 ? Xintr_legacy10 +ffffffff82549850 ? Xintr_legacy11 +ffffffff82549890 ? Xintr_legacy12 +ffffffff825498d0 ? Xintr_legacy13 +ffffffff82549910 ? Xintr_legacy14 +ffffffff82549950 ? Xintr_legacy15 +ffffffff82549990 ? Xintr_ioapic_edge0 +ffffffff825499d0 ? Xintr_ioapic_edge1 +ffffffff82549a10 ? Xintr_ioapic_edge2 +ffffffff82549a50 ? Xintr_ioapic_edge3 +ffffffff82549a90 ? Xintr_ioapic_edge4 +ffffffff82549ad0 ? Xintr_ioapic_edge5 +ffffffff82549b10 ? Xintr_ioapic_edge6 +ffffffff82549b50 ? Xintr_ioapic_edge7 +ffffffff82549b90 ? Xintr_ioapic_edge8 +ffffffff82549bd0 ? Xintr_ioapic_edge9 +ffffffff82549c10 ? Xintr_ioapic_edge10 +ffffffff82549c50 ? Xintr_ioapic_edge11 +ffffffff82549c90 ? Xintr_ioapic_edge12 +ffffffff82549cd0 ? Xintr_ioapic_edge13 +ffffffff82549d10 ? Xintr_ioapic_edge14 +ffffffff82549d50 ? Xintr_ioapic_edge15 +ffffffff82549d90 ? Xintr_ioapic_edge16 +ffffffff82549dd0 ? Xintr_ioapic_edge17 +ffffffff82549e10 ? Xintr_ioapic_edge18 +ffffffff82549e50 ? Xintr_ioapic_edge19 +ffffffff82549e90 ? Xintr_ioapic_edge20 +ffffffff82549ed0 ? Xintr_ioapic_edge21 +ffffffff82549f10 ? Xintr_ioapic_edge22 +ffffffff82549f50 ? Xintr_ioapic_edge23 +ffffffff82549f90 ? Xintr_ioapic_edge24 +ffffffff82549fd0 ? Xintr_ioapic_edge25 +ffffffff8254a010 ? Xintr_ioapic_edge26 +ffffffff8254a050 ? Xintr_ioapic_edge27 +ffffffff8254a090 ? Xintr_ioapic_edge28 +ffffffff8254a0d0 ? Xintr_ioapic_edge29 +ffffffff8254a110 ? Xintr_ioapic_edge30 +ffffffff8254a150 ? Xintr_ioapic_edge31 +ffffffff8254a190 ? Xintr_ioapic_edge32 +ffffffff8254a1d0 ? Xintr_ioapic_edge33 +ffffffff8254a210 ? Xintr_ioapic_edge34 +ffffffff8254a250 ? Xintr_ioapic_edge35 +ffffffff8254a290 ? Xintr_ioapic_edge36 +ffffffff8254a2d0 ? Xintr_ioapic_edge37 +ffffffff8254a310 ? Xintr_ioapic_edge38 +ffffffff8254a350 ? Xintr_ioapic_edge39 +ffffffff8254a390 ? Xintr_ioapic_edge40 +ffffffff8254a3d0 ? Xintr_ioapic_edge41 +ffffffff8254a410 ? Xintr_ioapic_edge42 +ffffffff8254a450 ? Xintr_ioapic_edge43 +ffffffff8254a490 ? Xintr_ioapic_edge44 +ffffffff8254a4d0 ? Xintr_ioapic_edge45 +ffffffff8254a510 ? Xintr_ioapic_edge46 +ffffffff8254a550 ? Xintr_ioapic_edge47 +ffffffff8254a590 ? Xintr_ioapic_edge48 +ffffffff8254a5d0 ? Xintr_ioapic_edge49 +ffffffff8254a610 ? Xintr_ioapic_edge50 +ffffffff8254a650 ? Xintr_ioapic_edge51 +ffffffff8254a690 ? Xintr_ioapic_edge52 +ffffffff8254a6d0 ? Xintr_ioapic_edge53 +ffffffff8254a710 ? Xintr_ioapic_edge54 +ffffffff8254a750 ? Xintr_ioapic_edge55 +ffffffff8254a790 ? Xintr_ioapic_edge56 +ffffffff8254a7d0 ? Xintr_ioapic_edge57 +ffffffff8254a810 ? Xintr_ioapic_edge58 +ffffffff8254a850 ? Xintr_ioapic_edge59 +ffffffff8254a890 ? Xintr_ioapic_edge60 +ffffffff8254a8d0 ? Xintr_ioapic_edge61 +ffffffff8254a910 ? Xintr_ioapic_edge62 +ffffffff8254a950 ? Xintr_ioapic_edge63 +ffffffff8254a990 ? Xintr_ioapic_level0 +ffffffff8254a9d0 ? Xintr_ioapic_level1 +ffffffff8254aa10 ? Xintr_ioapic_level2 +ffffffff8254aa50 ? Xintr_ioapic_level3 +ffffffff8254aa90 ? Xintr_ioapic_level4 +ffffffff8254aad0 ? Xintr_ioapic_level5 +ffffffff8254ab10 ? Xintr_ioapic_level6 +ffffffff8254ab50 ? Xintr_ioapic_level7 +ffffffff8254ab90 ? Xintr_ioapic_level8 +ffffffff8254abd0 ? Xintr_ioapic_level9 +ffffffff8254ac10 ? Xintr_ioapic_level10 +ffffffff8254ac50 ? Xintr_ioapic_level11 +ffffffff8254ac90 ? Xintr_ioapic_level12 +ffffffff8254acd0 ? Xintr_ioapic_level13 +ffffffff8254ad10 ? Xintr_ioapic_level14 +ffffffff8254ad50 ? Xintr_ioapic_level15 +ffffffff8254ad90 ? Xintr_ioapic_level16 +ffffffff8254add0 ? Xintr_ioapic_level17 +ffffffff8254ae10 ? Xintr_ioapic_level18 +ffffffff8254ae50 ? Xintr_ioapic_level19 +ffffffff8254ae90 ? Xintr_ioapic_level20 +ffffffff8254aed0 ? Xintr_ioapic_level21 +ffffffff8254af10 ? Xintr_ioapic_level22 +ffffffff8254af50 ? Xintr_ioapic_level23 +ffffffff8254af90 ? Xintr_ioapic_level24 +ffffffff8254afd0 ? Xintr_ioapic_level25 +ffffffff8254b010 ? Xintr_ioapic_level26 +ffffffff8254b050 ? Xintr_ioapic_level27 +ffffffff8254b090 ? Xintr_ioapic_level28 +ffffffff8254b0d0 ? Xintr_ioapic_level29 +ffffffff8254b110 ? Xintr_ioapic_level30 +ffffffff8254b150 ? Xintr_ioapic_level31 +ffffffff8254b190 ? Xintr_ioapic_level32 +ffffffff8254b1d0 ? Xintr_ioapic_level33 +ffffffff8254b210 ? Xintr_ioapic_level34 +ffffffff8254b250 ? Xintr_ioapic_level35 +ffffffff8254b290 ? Xintr_ioapic_level36 +ffffffff8254b2d0 ? Xintr_ioapic_level37 +ffffffff8254b310 ? Xintr_ioapic_level38 +ffffffff8254b350 ? Xintr_ioapic_level39 +ffffffff8254b390 ? Xintr_ioapic_level40 +ffffffff8254b3d0 ? Xintr_ioapic_level41 +ffffffff8254b410 ? Xintr_ioapic_level42 +ffffffff8254b450 ? Xintr_ioapic_level43 +ffffffff8254b490 ? Xintr_ioapic_level44 +ffffffff8254b4d0 ? Xintr_ioapic_level45 +ffffffff8254b510 ? Xintr_ioapic_level46 +ffffffff8254b550 ? Xintr_ioapic_level47 +ffffffff8254b590 ? Xintr_ioapic_level48 +ffffffff8254b5d0 ? Xintr_ioapic_level49 +ffffffff8254b610 ? Xintr_ioapic_level50 +ffffffff8254b650 ? Xintr_ioapic_level51 +ffffffff8254b690 ? Xintr_ioapic_level52 +ffffffff8254b6d0 ? Xintr_ioapic_level53 +ffffffff8254b710 ? Xintr_ioapic_level54 +ffffffff8254b750 ? Xintr_ioapic_level55 +ffffffff8254b790 ? Xintr_ioapic_level56 +ffffffff8254b7d0 ? Xintr_ioapic_level57 +ffffffff8254b810 ? Xintr_ioapic_level58 +ffffffff8254b850 ? Xintr_ioapic_level59 +ffffffff8254b890 ? Xintr_ioapic_level60 +ffffffff8254b8d0 ? Xintr_ioapic_level61 +ffffffff8254b910 ? Xintr_ioapic_level62 +ffffffff8254b950 ? Xintr_ioapic_level63 +ffffffff8254c000 ? codepatch_fill_nop +ffffffff8254c000 A __cptext_start +ffffffff8254c000 A __kutext_end +ffffffff8254c0b0 ? codepatch_maprw +ffffffff8254c190 ? codepatch_unmaprw +ffffffff8254c200 ? codepatch_nop +ffffffff8254c360 ? codepatch_replace +ffffffff8254c510 ? codepatch_call +ffffffff8254c530 ? codepatch_jmp +ffffffff8254d000 A __cptext_end +ffffffff8254d000 A __rodata_start +ffffffff8254d000 C _etext +ffffffff8254d000 C etext +ffffffff8254e000 r seeprom_read +ffffffff8254e004 r icl_mg_pll_find_divisors.div1_vals +ffffffff8254e028 r gen9bc_tgp_ddc_pin_map +ffffffff8254e038 r athn_ac2qid +ffffffff8254e038 r athn_ac2qid +ffffffff8254e038 r athn_ac2qid +ffffffff8254e044 r rtwn_get_rssi.cckoff +ffffffff8254e06c r rsu_ac2qid +ffffffff8254e07c r pckbc_portcmd +ffffffff8254e080 r tht_fifo_write_pad.pad +ffffffff8254e088 r rsu_get_rssi.cckoff +ffffffff8254e09c r adlp_n_revids +ffffffff8254e0ec r apple_iso_trans +ffffffff8254e0f0 r dg2_g12_revid_step_tbl +ffffffff8254e0f8 r wihap_check_tx.txratetable +ffffffff8254e0fc r dmamode +ffffffff8254e124 r gen9_edram_size_mb.sets +ffffffff8254f000 r isomappings +ffffffff8254f080 r unimappings +ffffffff8254f230 r replacements +ffffffff82552b06 r cmd0646_9_tim_udma +ffffffff825a651a r pp_r600_decoded_lanes +ffffffff825c1844 r cmd680_setup_channel.udma_tbl +ffffffff825c94b0 r apollo_udma33_tim +ffffffff825cf59d r substchar +ffffffff825d1643 r apollo_udma100_tim +ffffffff825f8f6a r apollo_udma66_tim +ffffffff826003fd r apollo_pio_rec +ffffffff8260f7d8 r cy_pio_rec +ffffffff8263ec75 r apollo_udma133_tim +ffffffff8264b800 R drm_ca +ffffffff8264b828 R drm_filtops +ffffffff8264b858 R drmread_filtops +ffffffff8264c000 r vga_emulops +ffffffff8264c048 R vga_stdscreen +ffffffff8264c078 R vga_stdscreen_mono +ffffffff8264c0a8 R vga_stdscreen_bf +ffffffff8264c0d8 R vga_40lscreen +ffffffff8264c108 R vga_40lscreen_mono +ffffffff8264c138 R vga_40lscreen_bf +ffffffff8264c168 R vga_50lscreen +ffffffff8264c198 R vga_50lscreen_mono +ffffffff8264c1c8 R vga_50lscreen_bf +ffffffff8264c1f8 R vga_screenlist +ffffffff8264c208 R vga_screenlist_mono +ffffffff8264c218 R vga_accessops +ffffffff8264c278 r i945_wm_info +ffffffff8264c2b0 r bgansitopc +ffffffff8264c2b8 r pctoansi +ffffffff8264c2f8 r sdma_offsets +ffffffff8264c2f8 r sdma_offsets +ffffffff8264c328 r iha_rate_tbl +ffffffff8264c360 r i830_a_wm_info +ffffffff8264c398 r gen9_edram_size_mb.ways +ffffffff8264c400 r aggr_periodic_times +ffffffff8264c480 r jsl_ehl_revids +ffffffff8264c4f8 r michael_final.pad +ffffffff8264c520 r rt_copysa.maskarray +ffffffff8264c528 r i915_wm_info +ffffffff8264c530 r amdgpu_ih_clientid_jpeg +ffffffff8264c530 r amdgpu_ih_clientid_uvds +ffffffff8264c530 r amdgpu_ih_clientid_vcns +ffffffff8264c530 r amdgpu_ih_clientid_vcns +ffffffff8264c530 r amdgpu_ih_clientid_vcns +ffffffff8264c568 r vga_setfontset.cmaptabb +ffffffff8264c580 r tgl_revids +ffffffff8264c5d8 r i830_bc_wm_info +ffffffff8264c648 r hsw_activate_psr2.map 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adw_switch +ffffffff82658000 R gdt_switch +ffffffff82659000 R twe_switch +ffffffff8265a000 R ciss_switch +ffffffff8265a030 R ciss_level +ffffffff8265a050 R ciss_stat +ffffffff8265b000 R ami_switch +ffffffff8265b028 R ami_raw_switch +ffffffff8265c000 R mfi_switch +ffffffff8265c028 R mfi_pd_switch +ffffffff8265c050 r mfi_iop_xscale +ffffffff8265c080 r mfi_iop_ppc +ffffffff8265c0b0 r mfi_iop_gen2 +ffffffff8265c0e0 r mfi_iop_skinny +ffffffff8265c110 r mfi_bbu_indicators +ffffffff8265c1c0 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs +ffffffff8265c1f0 r chv_oa_mux_regs +ffffffff8265c210 r fiji_clock_stretcher_lookup_table +ffffffff8265c210 r tonga_clock_stretcher_lookup_table +ffffffff8265c240 r link_speed +ffffffff8265c240 r link_speed +ffffffff8265c240 r link_speed +ffffffff8265c280 r drm_fb_xfrm.default_dst_pitch +ffffffff8265c280 r non_supported_protection +ffffffff8265c380 r tgl_uy_revids +ffffffff8265c3d0 r bwi_phy_noise_11g_rev1 +ffffffff8265c450 r cardslot_process_event.antonym_ev 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+ffffffff8269d430 r qla_regs_2100 +ffffffff8269d460 r qla_regs_2200 +ffffffff8269d490 r qla_regs_23XX +ffffffff8269e000 R ahci_atascsi_methods +ffffffff8269f000 R nvme_switch +ffffffff8269f028 r nvme_ops +ffffffff826a0000 R mpi_switch +ffffffff826a0100 r intel_hpll_vco.elk_vco +ffffffff826a0160 r pin_offsets +ffffffff826a01c0 r firmware_list +ffffffff826a0220 r atom_arg_shift +ffffffff826a0220 r atom_arg_shift +ffffffff826a0260 r pf_syncookie_wstab +ffffffff826a0280 r ieee80211_media_init.mopts +ffffffff826a02e0 r add_entropy_words.twist_table +ffffffff826a0380 r urtw_8225v2_txpwr_cck +ffffffff826a03a0 r bwfm_pci_prio2fifo +ffffffff826a03a0 r ieee80211_up_to_ac.up_to_ac +ffffffff826a0460 r paritytab +ffffffff826a0460 r x86emu_parity_tab +ffffffff826a0480 r legacy_connector_convert +ffffffff826a04c0 r gen7_oa_mux_regs +ffffffff826a04e0 r hsw_oa_mux_regs +ffffffff826a0500 r notetab +ffffffff826a0520 r urtw_8225v2_txpwr_cck_ch14 +ffffffff826a0540 r bwi_rf_calibval.rf_calibvals +ffffffff826a05e0 r pf_syncookie_msstab +ffffffff826a0640 r xgmi3x16_pcs_err_status_reg_aldebaran +ffffffff826a06a0 r uath_wme_init.uath_wme_11g +ffffffff826a06c0 r gen7_oa_b_counters +ffffffff826a0820 r icl_revids +ffffffff826a08e0 r rtwn_iq_calib_run.reg_adda +ffffffff826a0920 r atom_def_dst +ffffffff826a0920 r atom_def_dst +ffffffff826a0960 r sha256_initial_hash_value +ffffffff826a09c0 r otus_edca_def +ffffffff826a09e0 r intel_hpll_vco.blb_vco +ffffffff826a0aa0 r epic_pci_subsys_info +ffffffff826a0ac0 r atom_arg_mask +ffffffff826a0ac0 r atom_arg_mask +ffffffff826a0b20 r butmap +ffffffff826a0b60 r GFX_RLC_SRM_INDEX_CNTL_DATA_OFFSETS +ffffffff826a0ba0 r comsoft.lsrmap +ffffffff826a0be0 r tulip_mii_phy_readspecific.table +ffffffff826a0c00 r kbl_revids +ffffffff826a0ca0 r intel_hpll_vco.pnv_vco +ffffffff826a0d00 r dmapageport +ffffffff826a0dc0 r intel_hpll_vco.ctg_vco +ffffffff826a0e80 r drm_calculate_luminance_range.pre_computed_values +ffffffff826a1000 R sili_atascsi_methods +ffffffff826a2000 R ncr53c9x_switch +ffffffff826a3000 r scf_period +ffffffff826a4000 R siop_script +ffffffff826a45a0 R lun_switch +ffffffff826a45d0 R tag_switch +ffffffff826a4660 R load_dsa +ffffffff826a46c4 R siop_led_on +ffffffff826a46cc R siop_led_off +ffffffff826a46d8 R siop_switch +ffffffff826a5000 R ep_vortex_media +ffffffff826a5100 R ep_default_to_media +ffffffff826a6000 R wi_card_ident +ffffffff826a8000 R ucode_table +ffffffff826a9000 r re_revisions +ffffffff826a9290 r re_kstats_tpl +ffffffff826ab000 R smc91cxx_media +ffffffff826ab010 R smc91cxx_mii_bitbang_ops +ffffffff826ac000 R dl10019_mii_bitbang_ops +ffffffff826ac028 R dl10022_mii_bitbang_ops +ffffffff826ad000 R ax88190_mii_bitbang_ops +ffffffff826af000 R ac97_audio_default +ffffffff826af020 R ac97_on_off +ffffffff826af324 R ac97_mic_select +ffffffff826af628 R ac97_mono_select +ffffffff826af92c R ac97_source +ffffffff826afc30 R ac97_volume_stereo +ffffffff826afc4c R ac97_volume_mono +ffffffff826afc70 R source_info +ffffffff826b0470 R ac97_ad +ffffffff826b0580 R ac97_ak +ffffffff826b0610 R ac97_av +ffffffff826b0750 R ac97_rl +ffffffff826b07a0 R ac97_cm +ffffffff826b0820 R ac97_cr +ffffffff826b0840 R ac97_cs +ffffffff826b0920 R ac97_cx +ffffffff826b0980 R ac97_dt +ffffffff826b09a0 R ac97_em +ffffffff826b09d0 R ac97_es +ffffffff826b09f0 R ac97_is +ffffffff826b0a10 R ac97_ic +ffffffff826b0a90 R ac97_it +ffffffff826b0ac0 R ac97_ns +ffffffff826b0b80 R ac97_ps +ffffffff826b0bb0 R ac97_sl +ffffffff826b0bd0 R ac97_st +ffffffff826b0d20 R ac97_vi +ffffffff826b0d50 R ac97_tt +ffffffff826b0dd0 R ac97_ti +ffffffff826b0df0 R ac97_wb +ffffffff826b0e10 R ac97_wo +ffffffff826b0ea0 R ac97_ym +ffffffff826b0ef0 R ac97_vendors +ffffffff826b11f0 R ac97enhancement +ffffffff826b12f0 R ac97feature +ffffffff826b2000 R lm_chips +ffffffff826b2020 R lm78_sensors +ffffffff826b21a0 R w83627hf_sensors +ffffffff826b23a0 R w83627ehf_sensors +ffffffff826b25c0 R w83627dhg_sensors +ffffffff826b27c0 R nct6776f_sensors +ffffffff826b2a00 R nct6779d_sensors +ffffffff826b2d60 R w83637hf_sensors +ffffffff826b2f20 R w83697hf_sensors +ffffffff826b30c0 R w83781d_sensors +ffffffff826b3280 R w83782d_sensors +ffffffff826b3480 R w83783s_sensors +ffffffff826b3600 R w83791d_sensors +ffffffff826b3860 R w83792d_sensors +ffffffff826b3ae0 R as99127f_sensors +ffffffff826b4000 r ar5k_known_products +ffffffff826b4110 r ar5111_gain_opt +ffffffff826b41e0 r ar5112_gain_opt +ffffffff826b42b0 r ar5k_5ghz_channels +ffffffff826b4a00 r ar5k_2ghz_channels +ffffffff826b4f10 r ar5111_rf +ffffffff826b5350 r ar5112a_rf +ffffffff826b5890 r ar5112_rf +ffffffff826b5da0 r ar5413_rf +ffffffff826b61b0 r ar2413_rf +ffffffff826b64d0 r ar2425_rf +ffffffff826b6830 r ar5111_rfg +ffffffff826b6b30 r ar5112_rfg +ffffffff826b6e30 r ar5413_rfg +ffffffff826b7130 r ar2413_rfg +ffffffff826b7430 r ar5k_rt_11a +ffffffff826b7552 r ar5k_rt_11b +ffffffff826b7674 r ar5k_rt_11g +ffffffff826b7796 r ar5k_rt_xr +ffffffff826b8000 r ar5210_ini +ffffffff826b9000 r ar5211_mode +ffffffff826b92c0 r ar5211_ini +ffffffff826b9ad0 r ar5211_rf +ffffffff826ba000 r ar5212_pcie +ffffffff826ba080 r ar5212_mode +ffffffff826ba310 r ar5212_ini +ffffffff826bac80 r ar5212_ar5111_mode +ffffffff826baf20 r ar5212_ar5112_mode +ffffffff826bb1b0 r ar5413_mode +ffffffff826bbb10 r ar2413_mode +ffffffff826bc430 r ar2425_mode +ffffffff826bcd90 r ar5111_bbgain +ffffffff826bd090 r ar5112_bbgain +ffffffff826be000 r athn_5ghz_chans +ffffffff826be020 r athn_rates +ffffffff826bf000 r athn_rates +ffffffff826c0000 r ar9160_ini +ffffffff826c0068 r ar5416_ini +ffffffff826c00d0 r ar5416_serdes +ffffffff826c00e8 r ar9160_1_1_addac +ffffffff826c00f8 r ar9160_1_0_addac +ffffffff826c0108 r ar5416_2_2_addac +ffffffff826c0118 r ar5416_2_1_addac +ffffffff826c0128 r ar5416_set_power_calib.chainoffset +ffffffff826c0140 r ar9160_bank6tpc_vals +ffffffff826c01c0 r ar5416_bank6tpc_vals +ffffffff826c0240 r ar5416_bb_rfgain_vals_2g +ffffffff826c0340 r ar5416_bb_rfgain_vals_5g +ffffffff826c0440 r ar5416_bank6_vals +ffffffff826c04c0 r ar9160_regs +ffffffff826c0540 r ar9160_vals_5g20 +ffffffff826c0640 r ar9160_vals_5g40 +ffffffff826c0740 r ar9160_vals_2g40 +ffffffff826c0840 r ar9160_vals_2g20 +ffffffff826c0940 r ar9160_cm_regs +ffffffff826c0c30 r ar9160_cm_vals +ffffffff826c1210 r ar5416_regs +ffffffff826c1290 r ar5416_vals_5g20 +ffffffff826c1390 r ar5416_vals_5g40 +ffffffff826c1490 r ar5416_vals_2g40 +ffffffff826c1590 r ar5416_vals_2g20 +ffffffff826c1690 r ar5416_cm_regs +ffffffff826c1980 r ar5416_cm_vals +ffffffff826c1f60 r ar5416_serdes_regs +ffffffff826c1f90 r ar5416_serdes_vals +ffffffff826c1fc0 r ar9160_1_1_addac_vals +ffffffff826c2040 r ar9160_1_0_addac_vals +ffffffff826c20c0 r ar5416_2_2_addac_vals +ffffffff826c2150 r ar5416_2_1_addac_vals +ffffffff826c3000 r ar9280_2_0_ini +ffffffff826c3068 r ar9280_2_0_serdes +ffffffff826c3080 r ar9280_2_0_rx_gain_23db_backoff +ffffffff826c30a0 r ar9280_2_0_rx_gain_13db_backoff +ffffffff826c30c0 r ar9280_2_0_rx_gain +ffffffff826c30e0 r ar9280_2_0_tx_gain_high_power +ffffffff826c3100 r ar9280_2_0_tx_gain +ffffffff826c3120 r ar9280_init_from_rom.chainoffset +ffffffff826c3130 r ar9280_2_0_regs +ffffffff826c3190 r ar9280_2_0_vals_5g20 +ffffffff826c3250 r ar9280_2_0_vals_5g40 +ffffffff826c3310 r ar9280_2_0_vals_2g40 +ffffffff826c33d0 r ar9280_2_0_vals_2g20 +ffffffff826c3490 r ar9280_2_0_cm_regs +ffffffff826c3740 r ar9280_2_0_cm_vals +ffffffff826c3c90 r ar9280_2_0_fast_clock_regs +ffffffff826c3cb0 r ar9280_2_0_fast_clock_vals_5g20 +ffffffff826c3cf0 r ar9280_2_0_fast_clock_vals_5g40 +ffffffff826c3d30 r ar9280_2_0_serdes_regs +ffffffff826c3d60 r ar9280_2_0_serdes_vals +ffffffff826c3d90 r ar9280_2_0_rx_gain_regs +ffffffff826c3ea0 r ar9280_2_0_rx_gain_23db_backoff_vals_5g +ffffffff826c40b0 r ar9280_2_0_rx_gain_23db_backoff_vals_2g +ffffffff826c42c0 r ar9280_2_0_rx_gain_13db_backoff_vals_5g +ffffffff826c44d0 r ar9280_2_0_rx_gain_13db_backoff_vals_2g +ffffffff826c46e0 r ar9280_2_0_rx_gain_vals_5g +ffffffff826c48f0 r ar9280_2_0_rx_gain_vals_2g +ffffffff826c4b00 r ar9280_2_0_tx_gain_regs +ffffffff826c4b40 r ar9280_2_0_tx_gain_high_power_vals_5g +ffffffff826c4bc0 r ar9280_2_0_tx_gain_high_power_vals_2g +ffffffff826c4c40 r ar9280_2_0_tx_gain_vals_5g +ffffffff826c4cc0 r ar9280_2_0_tx_gain_vals_2g +ffffffff826c5000 r ar9271_ini +ffffffff826c5068 r ar9285_1_2_ini +ffffffff826c50d0 r ar9280_2_0_serdes +ffffffff826c50e8 r ar9271_tx_gain_high_power +ffffffff826c5108 r ar9271_tx_gain +ffffffff826c5128 r ar9285_2_0_tx_gain_high_power +ffffffff826c5148 r ar9285_2_0_tx_gain +ffffffff826c5168 r ar9285_1_2_tx_gain_high_power +ffffffff826c5188 r ar9285_1_2_tx_gain +ffffffff826c51b0 r ar9271_regs +ffffffff826c5410 r ar9271_vals_2g40 +ffffffff826c58d0 r ar9271_vals_2g20 +ffffffff826c5d90 r ar9271_cm_regs +ffffffff826c6020 r ar9271_cm_vals +ffffffff826c6540 r ar9285_1_2_regs +ffffffff826c67a0 r ar9285_1_2_vals_2g40 +ffffffff826c6c60 r ar9285_1_2_vals_2g20 +ffffffff826c7120 r ar9285_1_2_cm_regs +ffffffff826c73a0 r ar9285_1_2_cm_vals +ffffffff826c7890 r ar9280_2_0_serdes_regs +ffffffff826c78c0 r ar9280_2_0_serdes_vals +ffffffff826c78f0 r ar9271_tx_gain_regs +ffffffff826c7940 r ar9271_tx_gain_high_power_vals_2g +ffffffff826c79d0 r ar9271_tx_gain_vals_2g +ffffffff826c7a60 r ar9285_1_2_tx_gain_regs +ffffffff826c7ab0 r ar9285_2_0_tx_gain_high_power_vals_2g +ffffffff826c7b50 r ar9285_2_0_tx_gain_vals_2g +ffffffff826c7bf0 r ar9285_1_2_tx_gain_high_power_vals_2g +ffffffff826c7c90 r ar9285_1_2_tx_gain_vals_2g +ffffffff826c8000 r ar9287_1_1_ini +ffffffff826c8068 r ar9280_2_0_serdes +ffffffff826c8080 r ar9287_1_1_rx_gain +ffffffff826c80a0 r ar9287_1_1_tx_gain +ffffffff826c80c0 r ar9287_1_1_regs +ffffffff826c8120 r ar9287_1_1_vals_2g40 +ffffffff826c81d0 r ar9287_1_1_vals_2g20 +ffffffff826c8280 r ar9287_1_1_cm_regs +ffffffff826c8560 r ar9287_1_1_cm_vals +ffffffff826c8b20 r ar9280_2_0_serdes_regs +ffffffff826c8b50 r ar9280_2_0_serdes_vals +ffffffff826c8b80 r ar9287_1_1_rx_gain_regs +ffffffff826c8d90 r ar9287_1_1_rx_gain_vals_2g +ffffffff826c91a0 r ar9287_1_1_tx_gain_regs +ffffffff826c9200 r ar9287_1_1_tx_gain_vals_2g +ffffffff826ca000 r athn_rates +ffffffff826cb000 r ar9485_1_1_ini +ffffffff826cb068 r ar9485_1_1_serdes +ffffffff826cb080 r ar9380_2_2_ini +ffffffff826cb0e8 r ar9380_2_2_serdes +ffffffff826cb100 r ar9380_2_2_rx_gain_wo_xlna +ffffffff826cb120 r ar9380_2_2_rx_gain +ffffffff826cb140 r ar9485_1_1_rx_gain +ffffffff826cb160 r ar9380_2_2_tx_gain_high_ob_db +ffffffff826cb180 r ar9380_2_2_tx_gain_low_ob_db +ffffffff826cb1a0 r ar9380_2_2_tx_gain_high_power +ffffffff826cb1c0 r ar9380_2_2_tx_gain +ffffffff826cb1e0 r ar9485_1_1_tx_gain +ffffffff826cb200 r ar9485_1_1_regs +ffffffff826cb270 r ar9485_1_1_vals_2g40 +ffffffff826cb350 r ar9485_1_1_vals_2g20 +ffffffff826cb430 r ar9485_1_1_cm_regs +ffffffff826cb720 r ar9485_1_1_cm_vals +ffffffff826cbd00 r ar9485_1_1_serdes_regs +ffffffff826cbd0c r ar9485_1_1_serdes_vals +ffffffff826cbd20 r ar9380_2_2_regs +ffffffff826cbdb0 r ar9380_2_2_vals_5g20 +ffffffff826cbed0 r ar9380_2_2_vals_5g40 +ffffffff826cbff0 r ar9380_2_2_vals_2g40 +ffffffff826cc110 r ar9380_2_2_vals_2g20 +ffffffff826cc230 r ar9380_2_2_cm_regs +ffffffff826cc5d0 r ar9380_2_2_cm_vals +ffffffff826ccd00 r ar9380_2_2_fast_clock_regs +ffffffff826ccd20 r ar9380_2_2_fast_clock_vals_5g20 +ffffffff826ccd50 r ar9380_2_2_fast_clock_vals_5g40 +ffffffff826ccd74 r ar9380_2_2_serdes_regs +ffffffff826ccd80 r ar9380_2_2_serdes_vals +ffffffff826ccd90 r ar9380_2_2_rx_gain_regs +ffffffff826ccf90 r ar9380_2_2_rx_gain_wo_xlna_vals +ffffffff826cd390 r ar9380_2_2_rx_gain_vals +ffffffff826cd790 r ar9485_1_1_rx_gain_regs +ffffffff826cd890 r ar9485_1_1_rx_gain_vals +ffffffff826cda90 r ar9380_2_2_tx_gain_regs +ffffffff826cdb60 r ar9380_2_2_tx_gain_high_ob_db_vals_5g +ffffffff826cdd00 r ar9380_2_2_tx_gain_high_ob_db_vals_2g +ffffffff826cdea0 r ar9380_2_2_tx_gain_low_ob_db_vals_5g +ffffffff826ce040 r ar9380_2_2_tx_gain_low_ob_db_vals_2g +ffffffff826ce1e0 r ar9380_2_2_tx_gain_high_power_vals_5g +ffffffff826ce380 r ar9380_2_2_tx_gain_high_power_vals_2g +ffffffff826ce520 r ar9380_2_2_tx_gain_vals_5g +ffffffff826ce6c0 r ar9380_2_2_tx_gain_vals_2g +ffffffff826ce860 r ar9485_1_1_tx_gain_regs +ffffffff826ce8f0 r ar9485_1_1_tx_gain_vals_2g +ffffffff826cea10 r ar9380_def_rom +ffffffff826cee50 r ar9380_def_rom_h112 +ffffffff826cf290 r ar9380_def_rom_h116 +ffffffff826cf6d0 r ar9380_def_rom_x112 +ffffffff826cfb10 r ar9380_def_rom_x113 +ffffffff826d0000 R atw_txthresh_tab_lo +ffffffff826d0050 R atw_txthresh_tab_hi +ffffffff826d00a0 r atw_attach.empty_macaddr +ffffffff826d00b0 r atw_attach.type_strings +ffffffff826d00d0 r atw_rfmd2958_ifn +ffffffff826d0110 r atw_rfmd2958_rf1r +ffffffff826d0150 r atw_rxintr.rate_tbl +ffffffff826d1000 r rtw_identify_sta.empty_macaddr +ffffffff826d2000 r rtwn_set_key.etherzeroaddr +ffffffff826d2010 r rtl8188eu_rf_prog +ffffffff826d2030 r rtl8192e_rf_prog +ffffffff826d2060 r rtl8188ce_rf_prog +ffffffff826d2080 r rtl8188ru_rf_prog +ffffffff826d20a0 r rtl8188cu_rf_prog +ffffffff826d20c0 r rtl8192ce_rf_prog +ffffffff826d20f0 r rtl8188ru_txagc +ffffffff826d2150 r rtl8188eu_rf_regs +ffffffff826d21b0 r rtl8188eu_rf_vals +ffffffff826d2330 r rtl8192e_rf_regs +ffffffff826d23a0 r rtl8192e_rf_vals +ffffffff826d2540 r rtl8192e_rf2_regs +ffffffff826d2590 r rtl8192e_rf2_vals +ffffffff826d26d0 r rtl8192ce_rf1_regs +ffffffff826d2760 r rtl8188ce_rf_vals +ffffffff826d29a0 r rtl8188ru_rf_vals +ffffffff826d2be0 r rtl8188cu_rf_vals +ffffffff826d2e20 r rtl8192ce_rf1_vals +ffffffff826d3060 r rtl8192ce_rf2_regs +ffffffff826d3090 r rtl8192ce_rf2_vals +ffffffff826d3130 r rtl8192cu_txagc +ffffffff826d4000 r rt2560_rf2522_r2 +ffffffff826d4040 r rt2560_rf2524_r2 +ffffffff826d4080 r rt2560_rf2525_hi_r2 +ffffffff826d40c0 r rt2560_rf2525_r2 +ffffffff826d4100 r rt2560_rf2525e_r2 +ffffffff826d4140 r rt2560_rf2526_hi_r2 +ffffffff826d4180 r rt2560_rf2526_r2 +ffffffff826d41c0 r rt2560_def_bbp +ffffffff826d4200 r rt2560_def_mac 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intel_hpll_vco.cl_vco +ffffffff826da020 r sgpr_init_compute_shader +ffffffff826da0d0 r trinity_override_mgpg_sequences +ffffffff826da490 r vgpr_init_compute_shader +ffffffff826da550 r voltage_swing_to_pre_emphasis +ffffffff826db000 r malo_cmd_string.cmds +ffffffff826db0b0 r malo_cmd_string_result.results +ffffffff826dc000 R bwi_vendor_led_act +ffffffff826dc00c R bwi_default_led_act +ffffffff826dc010 R bwi_led_duration +ffffffff826dc380 r bwi_sup_bphy +ffffffff826dc3c0 r bwi_phy_freq_11g_rev1 +ffffffff826dc5c0 r bwi_phy_rotor_11g_rev1 +ffffffff826dc6a0 r bwi_phy_noise_scale_11g_rev2 +ffffffff826dc6e0 r bwi_phy_noise_scale_11g_rev7 +ffffffff826dc720 r bwi_phy_noise_scale_11g +ffffffff826dc760 r bwi_phy_sigma_sq_11g_rev2 +ffffffff826dc7d0 r bwi_phy_sigma_sq_11g_rev7 +ffffffff826dc840 r bwi_phy_delay_11g_rev1 +ffffffff826dc920 r bwi_rf_get_gains.save_phy_regs +ffffffff826dc940 r bwi_rf_lo_find.map +ffffffff826dc960 r bwi_txpower_map_11b +ffffffff826dc9a0 r bwi_txpower_map_11g +ffffffff826dc9e0 r _bwi_rf_lo_update_11g.rf_atten_list +ffffffff826dca20 r _bwi_rf_lo_update_11g.rf_atten_init_list +ffffffff826dca60 r _bwi_rf_lo_update_11g.rf_lo_measure_order +ffffffff826dcaa0 r bwi_rf_set_nrssi_ofs_11g.save_phy_comm_regs +ffffffff826dcac0 r bwi_bbpid_map +ffffffff826dcaf0 r bwi_regwin_count +ffffffff826dcb40 r bwi_clkfreq +ffffffff826dcb58 r bwi_zero_addr +ffffffff826dd000 R uhci_bus_methods +ffffffff826dd030 R uhci_root_ctrl_methods +ffffffff826dd060 R uhci_root_intr_methods +ffffffff826dd090 R uhci_device_ctrl_methods +ffffffff826dd0c0 R uhci_device_intr_methods +ffffffff826dd0f0 R uhci_device_bulk_methods +ffffffff826dd120 R uhci_device_isoc_methods +ffffffff826dd150 R uhci_devd +ffffffff826dd162 R uhci_confd +ffffffff826dd16b R uhci_ifcd +ffffffff826dd174 R uhci_endpd +ffffffff826dd17b R uhci_hubd_piix +ffffffff826de000 R revbits +ffffffff826de020 R ohci_bus_methods +ffffffff826de050 R ohci_root_ctrl_methods +ffffffff826de080 R ohci_root_intr_methods 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+ffffffff826e00c0 R xhci_device_intr_methods +ffffffff826e00f0 R xhci_device_bulk_methods +ffffffff826e0120 R xhci_device_isoc_methods +ffffffff826e0150 R xhci_devd +ffffffff826e0162 R xhci_confd +ffffffff826e016b R xhci_ifcd +ffffffff826e0174 R xhci_endpd +ffffffff826e017b R xhci_endpcd +ffffffff826e0181 R xhci_hubd +ffffffff826e3000 R radio_ca +ffffffff826e4000 R ipmi_ca +ffffffff826e5000 R vscsi_ca +ffffffff826e5028 R vscsi_switch +ffffffff826e5050 R vscsi_filtops +ffffffff826e6000 R mpath_ca +ffffffff826e6028 R mpath_switch +ffffffff826e7000 R softraid_ca +ffffffff826e7028 R sr_switch +ffffffff826e8000 r spdmem_basic_types +ffffffff826e80a0 r spdmem_parity_types +ffffffff826e80e0 r spdmem_ddr4_decode.ddr4_chipsize +ffffffff826e9000 R kstat_rlock_ops +ffffffff826e9010 R kstat_wlock_ops +ffffffff826e9020 R kstat_mutex_ops +ffffffff826e9030 R kstat_cpu_ops +ffffffff826e9040 r kstat_id_tree_RBT_INFO +ffffffff826e9058 R kstat_id_tree_RBT_TYPE +ffffffff826e9060 r kstat_pv_tree_RBT_INFO +ffffffff826e9078 R kstat_pv_tree_RBT_TYPE +ffffffff826e9080 r kstat_nm_tree_RBT_INFO +ffffffff826e9098 R kstat_nm_tree_RBT_TYPE +ffffffff826ea000 r fuse_rd_filtops +ffffffff826eb000 R fusefs_vfsops +ffffffff826eb070 R fusefs_vars +ffffffff826ec000 R fusefs_vops +ffffffff826ec110 R fusefsread_filtops +ffffffff826ec140 R fusefswrite_filtops +ffffffff826ec170 R fusefsvnode_filtops +ffffffff826ed000 r pf_state_tree_RBT_INFO +ffffffff826ed018 R pf_state_tree_RBT_TYPE +ffffffff826ed020 r pf_state_tree_id_RBT_INFO +ffffffff826ed038 R pf_state_tree_id_RBT_TYPE +ffffffff826ed040 r pf_translate_af.zero +ffffffff826ee000 R hfsc_ops +ffffffff826ee038 R ifq_hfsc_ops +ffffffff826ee040 R hfsc_pf_ops +ffffffff826ee088 R pfq_hfsc_ops +ffffffff826ef000 r fqcodel_ops +ffffffff826ef038 R ifq_fqcodel_ops +ffffffff826ef040 r fqcodel_pf_ops +ffffffff826ef088 R pfq_fqcodel_ops +ffffffff826ef090 r codel_intervals +ffffffff826f0000 R pfsync_acts +ffffffff826f1000 R hotplugread_filtops +ffffffff826f2000 R dtps_static +ffffffff826f3000 R db_show_all_cmds +ffffffff826f3180 R db_show_cmds +ffffffff826f34c0 R db_boot_cmds +ffffffff826f35a0 R db_command_table +ffffffff826f4000 R ddb_vars +ffffffff826f5000 R audio_ca +ffffffff826f5028 R audioctlread_filtops +ffffffff826f5058 R audiowrite_filtops +ffffffff826f5088 R audioread_filtops +ffffffff826f6000 R midi_ca +ffffffff826f6028 R midiwrite_filtops +ffffffff826f6058 R midiread_filtops +ffffffff826f7000 r mulawtolin16 +ffffffff826f7200 r lintomulaw +ffffffff826f8000 R randomread_filtops +ffffffff826f8030 R randomwrite_filtops +ffffffff826f9000 R video_ca +ffffffff826f9028 R video_filtops +ffffffff826fa000 R cd9660_vfsops +ffffffff826fb000 R cd9660_vops +ffffffff826fb110 R cd9660_specvops +ffffffff826fb220 R cd9660_fifovops +ffffffff826fb330 R cd9660read_filtops +ffffffff826fb360 R cd9660write_filtops +ffffffff826fb390 R cd9660vnode_filtops +ffffffff826fc000 R udf_vfsops +ffffffff826fd000 R udf_vops +ffffffff826fd110 r mon_lens +ffffffff826fe000 r month_days +ffffffff826ff000 R execsw +ffffffff82700000 r shstrtab +ffffffff82701000 R copyright +ffffffff827010c0 r initpaths +ffffffff82702000 R sysent +ffffffff82704000 R bufq_impls +ffffffff82705000 R kqueueops +ffffffff82705038 R kqread_filtops +ffffffff82705068 R proc_filtops +ffffffff82705098 R file_filtops +ffffffff827050c8 R timer_filtops +ffffffff82705100 R sysfilt_ops +ffffffff82705148 R seltrue_filtops +ffffffff82705178 R dead_filtops +ffffffff827051a8 R badfd_filtops +ffffffff827051d8 r mutex_klistops +ffffffff827051f0 r rwlock_klistops +ffffffff82706000 R kv_exec +ffffffff82707000 R addrmask +ffffffff82708000 r rw_ops +ffffffff82709000 r proc_printit.pstat +ffffffff8270a000 R pledge_syscalls +ffffffff8270aa60 r pledgenames +ffffffff8270acb0 r pledgereq +ffffffff8270b000 r unvname_rbt_RBT_INFO +ffffffff8270b018 R unvname_rbt_RBT_TYPE +ffffffff8270c000 R sig_filtops +ffffffff8270c030 R sigprop +ffffffff8270d000 R kern_vars +ffffffff8270d2f0 R hw_vars +ffffffff8270e000 R tc_vars +ffffffff8270f000 r sys_gettimeofday.zerotz +ffffffff82710000 r taskq_sys_name +ffffffff82710006 r taskq_sys_mp_name +ffffffff82710010 R systq +ffffffff82710018 R systqmp +ffffffff82712000 r gpt_get_fstype.gpt_uuid_openbsd +ffffffff82712010 r gpt_get_fstype.gpt_uuid_msdos +ffffffff82712020 r gpt_get_fstype.gpt_uuid_chromerootfs +ffffffff82712030 r gpt_get_fstype.gpt_uuid_linux +ffffffff82712040 r gpt_get_fstype.gpt_uuid_hfs +ffffffff82712050 r gpt_get_fstype.gpt_uuid_unused +ffffffff82712060 r gpt_get_fstype.gpt_uuid_efi_system +ffffffff82712070 r gpt_get_fstype.gpt_uuid_bios_boot +ffffffff82713000 r hiballoc_addr_RBT_INFO +ffffffff82713018 R hiballoc_addr_RBT_TYPE +ffffffff82714000 R logread_filtops +ffffffff82715000 r phtree_RBT_INFO +ffffffff82715018 R phtree_RBT_TYPE +ffffffff82715020 r pool_lock_ops_rw +ffffffff82715058 r pool_lock_ops_mtx +ffffffff82716000 r pselregister.evf +ffffffff8271600c r pselregister.evff +ffffffff82717000 R pipe_rfiltops +ffffffff82717030 R pipe_wfiltops +ffffffff82717060 R pipe_efiltops +ffffffff82717090 r pipeops +ffffffff82718000 R socketops +ffffffff82719000 R sysvsem_vars +ffffffff8271a000 R char_type +ffffffff8271a100 R ttyread_filtops +ffffffff8271a130 R ttywrite_filtops +ffffffff8271a160 R ttyexcept_filtops +ffffffff8271b000 R ptcread_filtops +ffffffff8271b030 R ptcwrite_filtops +ffffffff8271b060 R ptcexcept_filtops +ffffffff8271d000 R domains +ffffffff8271e000 R unixdomain +ffffffff8271e050 R unixsw +ffffffff8271f000 R solisten_filtops +ffffffff8271f030 R soread_filtops +ffffffff8271f060 R sowrite_filtops +ffffffff8271f090 R soexcept_filtops +ffffffff8271f0c0 R socket_klistops +ffffffff82720000 R sun_noname +ffffffff82720010 R uipc_usrreqs +ffffffff827200b0 R uipc_dgram_usrreqs +ffffffff82720150 R unpstctl_vars +ffffffff82720180 R unpsqctl_vars +ffffffff827201b0 R unpdgctl_vars +ffffffff82721000 r namecache_rb_cache_RBT_INFO +ffffffff82721018 R namecache_rb_cache_RBT_TYPE +ffffffff82722000 R generic_filtops +ffffffff82723000 r buf_rb_bufs_RBT_INFO +ffffffff82723018 R buf_rb_bufs_RBT_TYPE +ffffffff82723020 r typename +ffffffff82724000 R sync_vops +ffffffff82725000 R vnops +ffffffff82726000 R spec_vops +ffffffff82727000 R dead_vops +ffffffff82728000 R fifo_vops +ffffffff82728110 R fiforead_filtops +ffffffff82728140 R fifowrite_filtops +ffffffff82728170 R fifoexcept_filtops +ffffffff82729000 R regyear +ffffffff82729020 R leapyear +ffffffff82729040 r dos2unix +ffffffff82729140 r u2l +ffffffff82729240 r unix2dos +ffffffff8272a008 R msdosfs_vfsops +ffffffff8272b000 R msdosfs_vops +ffffffff8272b110 R msdosfsread_filtops +ffffffff8272b140 R msdosfswrite_filtops +ffffffff8272b170 R msdosfsvnode_filtops +ffffffff8272c000 r _utf_count +ffffffff8272d000 R ntfs_vfsops +ffffffff8272e000 R ntfs_vops +ffffffff8272f000 R bpfread_filtops +ffffffff8272f030 R bpf_mbuf_ops +ffffffff82730000 r bpf_mem_ops +ffffffff82731000 R priq_ops +ffffffff82731038 R ifq_priq_ops +ffffffff82731040 r ifq_kstat_tpl +ffffffff82731158 r ifiq_kstat_tpl +ffffffff82732000 r ether_crc32_le_update.crctab +ffffffff82732040 r ether_crc32_be_update.crctab +ffffffff82733000 r lcp +ffffffff82733078 r ipcp +ffffffff827330f0 r ipv6cp +ffffffff82733168 r chap +ffffffff827331e0 r pap +ffffffff82734000 R ifmedia_baudrate_descriptions +ffffffff82735000 r fcstab +ffffffff82737000 R tunread_filtops +ffffffff82737030 R tunwrite_filtops +ffffffff82738000 R bridge_brport +ffffffff82739000 R bstp_etheraddr +ffffffff8273a000 r eb_tree_RBT_INFO +ffffffff8273a018 R eb_tree_RBT_TYPE +ffffffff8273b000 r veb_etherbridge_ops +ffffffff8273b028 r veb_pf_ipv4 +ffffffff8273b040 r veb_pf_ipv6 +ffffffff8273c000 r pipex_pppoe_padding +ffffffff8273d000 r rn_addmask.normal_chars +ffffffff8273e000 R route_src +ffffffff8273e010 R route_usrreqs +ffffffff8273e0b0 R routedomain +ffffffff8273e100 R routesw +ffffffff8273f000 R gre_vars +ffffffff8273f030 r mgre_tree_RBT_INFO +ffffffff8273f048 R mgre_tree_RBT_TYPE +ffffffff8273f050 r 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bpe_tree_RBT_TYPE +ffffffff82744020 r bpe_etherbridge_ops +ffffffff82745000 R pppx_rd_filtops +ffffffff82745030 R pppx_wr_filtops +ffffffff82745060 r pppx_ifs_RBT_INFO +ffffffff82745078 R pppx_ifs_RBT_TYPE +ffffffff82745080 r pppac_rd_filtops +ffffffff827450b0 r pppac_wr_filtops +ffffffff82746000 r vxlan_peers_RBT_INFO +ffffffff82746018 R vxlan_peers_RBT_TYPE +ffffffff82746020 r vxlan_etherbridge_ops +ffffffff82747000 R stoeplitz_cache +ffffffff82748000 R ieee80211_std_rateset_11a +ffffffff82748010 R ieee80211_std_rateset_11b +ffffffff82748020 R ieee80211_std_rateset_11g +ffffffff82748030 R ieee80211_std_ratesets_11n +ffffffff827483b0 R ieee80211_std_ratesets_11ac +ffffffff827486b0 r ieee80211_setbasicrates.basic +ffffffff82748710 r ieee80211_setmode.chanflags +ffffffff82748730 r ieee80211_rate2media.rates +ffffffff827488c0 r ieee80211_media2rate.ieeerates +ffffffff82749000 r Sbox +ffffffff8274b000 r ieee80211_ioctl.empty_macaddr +ffffffff8274c000 r ieee80211_find_rxnode.zero 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+ffffffff828c4030 r sili_devices +ffffffff828c5000 R aq_devices +ffffffff828c5040 R aq_products +ffffffff828c5100 R aq_fw1x_ops +ffffffff828c5120 R aq_fw2x_ops +ffffffff828c5140 R aq_ca +ffffffff828c6000 R de_ca +ffffffff828c6030 r tulip_srom_conninfo +ffffffff828c6120 r tulip_mii_phy_attrlist +ffffffff828c61e0 r tulip_21140_znyx_zx34x_boardsw +ffffffff828c6208 r tulip_21040_10baset_only_boardsw +ffffffff828c6230 r tulip_21040_boardsw +ffffffff828c6258 r tulip_2114x_isv_boardsw +ffffffff828c6280 r tulip_21140_smc9332_boardsw +ffffffff828c62a8 r tulip_21040_auibnc_only_boardsw +ffffffff828c62d0 r tulip_21140_cogent_em100_boardsw +ffffffff828c62f8 r tulip_21140_accton_boardsw +ffffffff828c6320 r tulip_21140_eb_boardsw +ffffffff828c6348 r tulip_21041_boardsw +ffffffff828c6370 r tulip_srom_mediums +ffffffff828c63c0 r tulip_read_macaddr.testpat +ffffffff828c63d0 r tulip_vendors +ffffffff828c6480 r tulip_media_to_ifmedia +ffffffff828c64e0 r tulip_chipdescs +ffffffff828c7000 R ep_pci_ca +ffffffff828c7030 R ep_pci_devices +ffffffff828c8000 R pcn_ca +ffffffff828c8028 R pcn_devices +ffffffff828c8030 r pcn_79c970_rcvfw +ffffffff828c8050 r pcn_79c970_xmtsp +ffffffff828c8070 r pcn_79c970_xmtfw +ffffffff828c8090 r pcn_79c971_rcvfw +ffffffff828c80b0 r pcn_79c971_xmtsp_sram +ffffffff828c80d0 r pcn_79c971_xmtsp +ffffffff828c80f0 r pcn_79c971_xmtfw +ffffffff828c8110 r pcn_variants +ffffffff828c9000 R siop_products +ffffffff828ca000 R siop_pci_ca +ffffffff828cb000 R rdcide_setup +ffffffff828cb005 R rdcide_hold +ffffffff828cb00a R rdcide_udmatim +ffffffff828cb010 R rdcide_udmaclk +ffffffff828cb028 R default_product_desc +ffffffff828cb040 R pciide_intel_products +ffffffff828cb630 R pciide_amd_products +ffffffff828cb690 R pciide_cmd_products +ffffffff828cb730 R pciide_via_products +ffffffff828cb810 R pciide_cypress_products +ffffffff828cb820 R pciide_sis_products +ffffffff828cb870 R pciide_natsemi_products +ffffffff828cb890 R pciide_acer_products +ffffffff828cb8a0 R pciide_triones_products +ffffffff828cb8f0 R pciide_promise_products +ffffffff828cbac0 R pciide_acard_products +ffffffff828cbb10 R pciide_serverworks_products +ffffffff828cbbb0 R pciide_nvidia_products +ffffffff828cbe80 R pciide_ite_products +ffffffff828cbea0 R pciide_ati_products +ffffffff828cbf20 R pciide_jmicron_products +ffffffff828cbf70 R pciide_phison_products +ffffffff828cbf80 R pciide_rdc_products +ffffffff828cbf90 R pciide_vendors +ffffffff828cc140 R pciide_pci_ca +ffffffff828cc168 R pciide_jmb_ca +ffffffff828cc190 r piix_isp_dma +ffffffff828cc193 r piix_rtc_dma +ffffffff828cc196 r apollo_pio_set +ffffffff828cc19b r cmd0643_9_data_tim_pio +ffffffff828cc1a0 r cmd0643_9_data_tim_dma +ffffffff828cc1a3 r cmd680_channel_map.init_val +ffffffff828cc1b1 r cmd680_setup_channel.udma2_tbl +ffffffff828cc1b8 r cmd680_setup_channel.dma_tbl +ffffffff828cc1be r cmd680_setup_channel.pio_tbl +ffffffff828cc1d0 r satalink_ba5_regmap +ffffffff828cc690 r sii3114_chansetup.channel_names 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bktr_ca +ffffffff828d5028 R bktr_hw_if +ffffffff828d6000 r tuners +ffffffff828d6170 r freqTable +ffffffff828d6260 r nabcst +ffffffff828d62a0 r irccable +ffffffff828d6310 r hrccable +ffffffff828d6380 r weurope +ffffffff828d6420 r jpnbcst +ffffffff828d6460 r jpncable +ffffffff828d64c0 r xussr +ffffffff828d6530 r australia +ffffffff828d6590 r france +ffffffff828d7000 R xl_pci_ca +ffffffff828d7030 R xl_pci_devices +ffffffff828d8000 R fxp_pci_ca +ffffffff828d8030 R fxp_pci_devices +ffffffff828d9000 R em_devices +ffffffff828d92e0 R em_ca +ffffffff828d9310 r em_counters +ffffffff828da000 r em_igp_cable_length_table +ffffffff828da100 r em_igp_2_cable_length_table +ffffffff828db000 R ixgb_devices +ffffffff828db010 R ixgb_ca +ffffffff828dc000 R ixgbe_devices +ffffffff828dc0b8 R ix_ca +ffffffff828dc0e0 r ix_counters +ffffffff828dc3e0 r ix_rxq_kstats_tpl +ffffffff828dc458 r ix_txq_kstats_tpl +ffffffff828dd000 r ixgbe_mvals_base +ffffffff828dd060 r ixgbe_mvals_X540 +ffffffff828dd0c0 r ixgbe_mvals_X550 +ffffffff828dd120 r ixgbe_mvals_X550EM_x +ffffffff828dd180 r ixgbe_mvals_X550EM_a +ffffffff828e0000 R ixl_ca +ffffffff828e0030 R ixl_port_counters +ffffffff828e02c0 R ixl_vsi_counters +ffffffff828e0380 r ixl_devices +ffffffff828e04c0 r ixl_710 +ffffffff828e04e8 r ixl_722 +ffffffff828e0510 r ixl_pf_aq_regs +ffffffff828e0578 r ixl_710_decrepit +ffffffff828e05a0 r ixl_phy_type_map +ffffffff828e0770 r ixl_speed_type_map +ffffffff828e07b0 r ixl_hmc_pack_rxq +ffffffff828e0830 r ixl_hmc_pack_txq +ffffffff828e08a0 r ixl_sfp_ops +ffffffff828e08b8 r ixl_qsfp_ops +ffffffff828e1000 R xge_ca +ffffffff828e1028 R xge_devices +ffffffff828e1030 r xge_fix_mac +ffffffff828e1110 r xge_xena_dtx_cfg +ffffffff828e1170 r xge_herc_dtx_cfg +ffffffff828e2000 R thtc_ca +ffffffff828e2028 R tht_ca +ffffffff828e2050 r thtc_devices +ffffffff828e2068 r tht_link_state.interval +ffffffff828e3000 R myx_ca +ffffffff828e3028 R myx_devices +ffffffff828e4000 R oce_ca +ffffffff828e4030 R oce_devices +ffffffff828e5000 R dc_pci_ca +ffffffff828e6000 R epic_pci_ca +ffffffff828e6028 R epic_pci_devices +ffffffff828e7000 R ti_pci_ca +ffffffff828e7030 R ti_devices +ffffffff828e8000 R ne_pci_ca +ffffffff828e8030 R ne_pci_prod +ffffffff828e9000 R gem_pci_ca +ffffffff828e9030 R gem_pci_devices +ffffffff828e9050 r gem_promhdr +ffffffff828e9052 r gem_promdat +ffffffff828e905a r gem_promdat2 +ffffffff828ea000 R cas_ca +ffffffff828ea028 R cas_pci_devices +ffffffff828ea030 r cas_promhdr +ffffffff828ea032 r cas_promdat_sun +ffffffff828ea03a r cas_promdat_ns +ffffffff828ea042 r cas_promdat2 +ffffffff828eb000 R sf_pci_ca +ffffffff828eb028 R sf_pci_products +ffffffff828ec000 R sis_ca +ffffffff828ec028 R sis_devices +ffffffff828ed000 R se_devices +ffffffff828ed008 R se_ca +ffffffff828ee000 R uhci_pci_ca +ffffffff828ef000 R ohci_pci_ca +ffffffff828f0000 R ehci_pci_ca +ffffffff828f1000 R xhci_pci_ca +ffffffff828f2000 R cbb_pci_ca +ffffffff828f2028 r pccbb_pcmcia_do_io_map.pcic_iowidth +ffffffff828f3000 R skc_devices +ffffffff828f3030 R skc_ca +ffffffff828f3058 R sk_ca +ffffffff828f4000 R mskc_devices +ffffffff828f40a8 R mskc_ca +ffffffff828f40d0 R msk_ca +ffffffff828f4100 r msk_mib +ffffffff828f5000 R puc_pci_ca +ffffffff828f6000 R puc_devs +ffffffff828fb000 R com_puc_ca +ffffffff828fb030 r puc_port_types +ffffffff828fc000 R lpt_puc_ca +ffffffff828fd000 R wi_pci_ca +ffffffff828fd030 r wi_pci_products +ffffffff828fe000 R an_pci_ca +ffffffff828fe030 R an_pci_devices +ffffffff828ff000 R iwi_devices +ffffffff828ff010 R iwi_ca +ffffffff82900000 R wpi_ca +ffffffff82900028 r wpi_devices +ffffffff82900030 r wpi_rates +ffffffff82900050 r wpi_rf_gain_5ghz +ffffffff829000a0 r wpi_dsp_gain_5ghz +ffffffff829000f0 r wpi_rf_gain_2ghz +ffffffff82900140 r wpi_dsp_gain_2ghz +ffffffff82900190 r wpi_pmgt +ffffffff82900310 r wpi_bands +ffffffff82901000 R iwn_mcs2ridx +ffffffff82901020 R iwn_ca +ffffffff82901050 r iwn_devices +ffffffff829010e8 r iwn4965_sensitivity_limits +ffffffff82901124 r iwn5000_sensitivity_limits +ffffffff82901160 r iwn5150_sensitivity_limits +ffffffff8290119c r iwn1000_sensitivity_limits +ffffffff829011d8 r iwn6000_sensitivity_limits +ffffffff82901214 r iwn2000_sensitivity_limits +ffffffff82901250 r iwn_fw_errmsg +ffffffff82901340 r iwn4965_set_txpower.tdiv +ffffffff82901360 r iwn4965_rf_gain_5ghz +ffffffff829013d0 r iwn4965_dsp_gain_5ghz +ffffffff82901440 r iwn4965_dsp_gain_2ghz +ffffffff829014b0 r iwn_pmgt +ffffffff829016f0 r iwn4965_post_alive.qid2fifo +ffffffff82901700 r iwn_bands +ffffffff82901770 r iwn_rates +ffffffff82901820 r iwn4965_rf_gain_2ghz +ffffffff82902000 R iwm_nvm_channels +ffffffff82902030 R iwm_nvm_channels_8000 +ffffffff82902070 R iwm_rates +ffffffff829020d0 R iwm_ht_mcs2ridx +ffffffff82902110 R iwm_tid_to_ac +ffffffff82902118 R iwm_ac_to_tx_fifo +ffffffff82902120 R iwm_nvm_to_read +ffffffff82902144 r iwm_set_hw_address_8000.reserved_mac +ffffffff82902180 r iwm_sf_full_timeout +ffffffff829021b0 r iwm_sf_full_timeout_def +ffffffff829021e0 r advanced_lookup +ffffffff82902320 r iwm_devices +ffffffff82902360 R iwm_ca +ffffffff82903000 R iwx_9560_quz_a0_jf_b0_cfg +ffffffff82903020 R iwx_9560_qu_c0_jf_b0_cfg +ffffffff82903040 R iwx_qu_b0_hr1_b0 +ffffffff82903060 R iwx_qu_b0_hr_b0 +ffffffff82903080 R iwx_ax201_cfg_qu_hr +ffffffff829030a0 R iwx_qu_c0_hr1_b0 +ffffffff829030c0 R iwx_qu_c0_hr_b0 +ffffffff829030e0 R iwx_ax201_cfg_qu_c0_hr_b0 +ffffffff82903100 R iwx_quz_a0_hr1_b0 +ffffffff82903120 R iwx_ax201_cfg_quz_hr +ffffffff82903140 R iwx_cfg_so_a0_hr_b0 +ffffffff82903160 R iwx_cfg_quz_a0_hr_b0 +ffffffff82903180 R iwx_2ax_cfg_so_gf_a0 +ffffffff829031a0 R iwx_2ax_cfg_so_gf_a0_long +ffffffff829031c0 R iwx_2ax_cfg_so_gf4_a0 +ffffffff829031e0 R iwx_2ax_cfg_so_gf4_a0_long +ffffffff82903200 R iwx_2ax_cfg_ty_gf_a0 +ffffffff82903220 R iwx_2ax_cfg_so_jf_b0 +ffffffff82903240 R iwx_nvm_channels_8000 +ffffffff82903280 R iwx_rates +ffffffff829032e0 R iwx_mcs2ridx +ffffffff82903320 R iwx_tid_to_ac +ffffffff82903328 R iwx_ac_to_tx_fifo +ffffffff82903330 r iwx_nvm_channels_uhb +ffffffff8290339e r iwx_is_valid_mac_addr.reserved_mac +ffffffff829033b0 r iwx_sf_full_timeout +ffffffff829033e0 r iwx_sf_full_timeout_def +ffffffff82903410 r advanced_lookup +ffffffff82903550 r iwx_devices +ffffffff82903590 r iwx_dev_info_table +ffffffff82903de8 R iwx_ca +ffffffff82904000 R cmpci_ca +ffffffff82904028 R cmpci_hw_if +ffffffff829040e0 r cmpci_rate_table +ffffffff82904120 R cmpci_devices +ffffffff82904130 r cmpci_query_devinfo.mixer_port_names +ffffffff82904160 r cmpci_query_devinfo.mixer_classes +ffffffff82905000 R iha_pci_ca +ffffffff82905028 R iha_switch +ffffffff82906000 R pcscp_ca +ffffffff82907000 R bge_ca +ffffffff82907030 R bge_devices +ffffffff829071b0 r bge_revisions +ffffffff82907610 r bge_majorrevs +ffffffff82908000 R bnx_devices +ffffffff82908020 R bnx_ca +ffffffff82909000 R vge_ca +ffffffff82909028 R vge_devices +ffffffff8290a000 R stge_ca +ffffffff8290a028 R stge_mii_bitbang_ops +ffffffff8290a050 R stge_devices +ffffffff8290b000 R nfe_ca +ffffffff8290b030 R nfe_devices +ffffffff8290c000 R et_devices +ffffffff8290c008 R et_ca +ffffffff8290d000 R jme_devices +ffffffff8290d008 R jme_ca +ffffffff8290e000 R age_devices +ffffffff8290e008 R age_ca +ffffffff8290f000 R alc_devices +ffffffff8290f038 R alc_ca +ffffffff82910000 R ale_devices +ffffffff82910008 R ale_ca +ffffffff82911000 R amdpm_ca +ffffffff82911030 R amdpm_ids +ffffffff82912000 R bce_ca +ffffffff82912028 R bce_devices +ffffffff82913000 R ath_pci_ca +ffffffff82914000 R athn_pci_ca +ffffffff82914030 r athn_pci_devices +ffffffff82915000 R atw_pci_ca +ffffffff82915028 R atw_pci_devices +ffffffff82916000 R rtw_pci_ca +ffffffff82916030 R rtw_pci_products +ffffffff82917000 R rtwn_pci_ca +ffffffff82917030 r rtwn_pci_devices +ffffffff82917040 r rtl8188eu_mac +ffffffff829171b0 r rtl8192cu_mac +ffffffff82917310 r rtl8192ce_mac +ffffffff82917458 r rtl8188eu_bb_prog +ffffffff82917480 r rtl8723a_bb_prog +ffffffff829174a8 r rtl8192ce_bb_prog_1t +ffffffff829174d0 r rtl8192ce_bb_prog_2t +ffffffff82917500 r rtl8188eu_bb_regs +ffffffff82917680 r rtl8188eu_bb_vals +ffffffff82917980 r rtl8188eu_agc_vals +ffffffff82917b80 r rtl8723a_bb_regs +ffffffff82917d00 r rtl8723a_bb_vals +ffffffff82917ff0 r rtl8192ce_agc_vals +ffffffff82918270 r rtl8192ce_bb_regs +ffffffff829183f0 r rtl8192ce_bb_vals_1t +ffffffff829186e0 r rtl8192ce_bb_vals_2t +ffffffff82919000 R ral_pci_ca +ffffffff82919030 R ral_pci_devices +ffffffff8291a000 R acx_pci_ca +ffffffff8291a028 R acx_pci_devices +ffffffff8291b000 R pgt_pci_ca +ffffffff8291b028 R pgt_pci_devices +ffffffff8291c000 R malo_pci_ca +ffffffff8291c028 R malo_pci_devices +ffffffff8291d000 R bwi_pci_ca +ffffffff8291d030 R bwi_pci_devices +ffffffff8291e000 R piixpm_ca +ffffffff8291e030 R piixpm_ids +ffffffff8291f000 R vic_ca +ffffffff8291f028 R vic_devices +ffffffff82920000 R vmx_devices +ffffffff82920008 R vmx_ca +ffffffff82920030 r vmx_tx_kstat_tpl +ffffffff829200d0 r vmx_kstat_rate +ffffffff829200e0 r vmx_rx_kstat_tpl +ffffffff82921000 R vmwpvs_ca +ffffffff82921028 R vmwpvs_switch +ffffffff82922000 R lii_ca +ffffffff82922028 R lii_devices +ffffffff82923000 R ichiic_ca +ffffffff82923030 R ichiic_ids +ffffffff82924000 R viapm_ca +ffffffff82924030 R viapm_ids +ffffffff82924070 r val_to_temp +ffffffff82924870 r val_to_uV.mult +ffffffff82925000 R amdiic_ca +ffffffff82925028 R amdiic_ids +ffffffff82926000 R nviic_ca +ffffffff82926030 R nviic_ids +ffffffff82927000 R sdhc_pci_ca +ffffffff82928000 R kate_ca +ffffffff82928030 r kate_proc +ffffffff82929000 R km_ca +ffffffff82929030 r km_devices +ffffffff8292a000 R ksmn_ca +ffffffff8292a030 r ksmn_devices +ffffffff8292b000 R itherm_devices +ffffffff8292b008 R itherm_ca +ffffffff8292c000 R pchtemp_ca +ffffffff8292c030 R pchtemp_devices +ffffffff8292d000 R rtsx_pci_ca +ffffffff8292e000 R xspd_ca +ffffffff8292e028 R xspd_devices +ffffffff8292f000 R virtio_pci_ca +ffffffff82930000 R dwiic_pci_ca +ffffffff82930030 R dwiic_pci_ids +ffffffff82931000 R bwfm_pci_ca +ffffffff82931030 r bwfm_pci_devices +ffffffff82932000 R ccp_pci_ca +ffffffff82932030 r ccp_pci_devices +ffffffff82933000 R bnxt_devices +ffffffff82933040 R bnxt_ca +ffffffff82934000 R mcx_ca +ffffffff82934030 r mcx_devices +ffffffff82934060 r mcx_rss_config +ffffffff829340d0 r mcx_eth_cap_map +ffffffff829342d0 r mcx_kstat_ppcnt_ieee8023 +ffffffff829342e8 r mcx_kstat_ppcnt_rfc2863 +ffffffff82934300 r mcx_kstat_ppcnt_rfc2819 +ffffffff82934318 r mcx_kstat_ppcnt_rfc3635 +ffffffff82934330 r mcx_ppcnt_ieee8023_tpl +ffffffff829344b0 r mcx_ppcnt_rfc2863_tpl +ffffffff829345c0 r mcx_ppcnt_rfc2819_tpl +ffffffff82934770 r mcx_ppcnt_rfc3635_tpl +ffffffff829348b0 r mcx_kstat_mtmp_tpl +ffffffff82934950 r mcx_kstat_mtmp_rate +ffffffff82934960 r mcx_queue_kstat_tpl +ffffffff82935000 R iavf_ca +ffffffff82935030 r iavf_devices +ffffffff82935040 r iavf_aq_regs +ffffffff829350b0 r iavf_link_speeds +ffffffff82936000 R rge_ca +ffffffff82936028 R rge_devices +ffffffff82936030 r rtl8125_mac_cfg2_ephy +ffffffff82936090 r rge_phy_config_mac_cfg3.mac_cfg3_a438_value +ffffffff829360b0 r rge_phy_config_mac_cfg3.mac_cfg3_b88e_value +ffffffff82936110 r rge_phy_config_mac_cfg4.mac_cfg4_b87c_value +ffffffff82936170 r rtl8125_mac_cfg4_ephy +ffffffff829361e0 r rtl8125_mac_cfg2_mcu +ffffffff82936e80 r rtl8125_mac_cfg3_mcu +ffffffff82937720 r rtl8125_mac_cfg4_mcu +ffffffff82939d10 r rtl8125_mac_cfg5_mcu +ffffffff8293ac10 r rtl8125_mac_bps +ffffffff8293af80 r rtl8125b_mac_bps +ffffffff8293b120 r rge_kstats_tpl +ffffffff8293c000 R igc_devices +ffffffff8293c040 R igc_ca +ffffffff8293d000 R ngbe_devices +ffffffff8293d008 R ngbe_ca +ffffffff8293e000 R com_pci_ca +ffffffff8293e030 R com_pci_ids +ffffffff8293f000 r agp_attach.agp_max +ffffffff8293f048 R agp_ca +ffffffff82940000 R intagp_ca +ffffffff82941000 r drm_plane_create_rotation_property.props +ffffffff82942000 r drm_bridge_priv_state_funcs +ffffffff82944000 r color_encoding_name +ffffffff82944020 r color_range_name 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stereo_mandatory_modes +ffffffff8294ef90 r extra_modes +ffffffff8294f000 r drm_encoder_enum_list +ffffffff82950000 r drm_fbdev_client_funcs +ffffffff82950020 r drm_fb_helper_generic_funcs +ffffffff82950028 r drm_fbdev_fb_ops +ffffffff82951000 r drm_fb_xrgb8888_to_rgb332.dst_pixsize +ffffffff82951004 r drm_fb_xrgb8888_to_rgb565.dst_pixsize +ffffffff82951008 r drm_fb_xrgb8888_to_rgb888.dst_pixsize +ffffffff8295100c r drm_fb_xrgb8888_to_xrgb2101010.dst_pixsize +ffffffff82951010 r drm_fb_xrgb8888_to_gray8.dst_pixsize +ffffffff82951014 r drm_fb_rgb888_to_xrgb8888.dst_pixsize +ffffffff82951018 r drm_fb_rgb565_to_xrgb8888.dst_pixsize +ffffffff82952000 r __drm_format_info.formats +ffffffff82953000 R drm_pgops +ffffffff82954000 r drm_ioctls +ffffffff82956000 r dma_fence_stub_ops +ffffffff82956038 R dma_fence_array_ops +ffffffff82956070 R dma_fence_chain_ops +ffffffff829560a8 R dmabufops +ffffffff829560e0 R syncfileops +ffffffff82957000 r drm_plane_type_enum_list +ffffffff82958000 r drm_mode_status_names +ffffffff82959000 r primary_plane_funcs +ffffffff82959068 r safe_modeset_formats +ffffffff8295a000 r orientation_data +ffffffff8295d468 r lcd800x1280_rightside_up +ffffffff8295d480 r lcd720x1280_rightside_up +ffffffff8295d498 r lcd800x1280_leftside_up +ffffffff8295d4b0 r lcd1080x1920_leftside_up +ffffffff8295d4c8 r lcd1200x1920_rightside_up +ffffffff8295d4e0 r gpd_micropc +ffffffff8295d4f8 r gpd_pocket +ffffffff8295d510 r gpd_pocket2 +ffffffff8295d528 r gpd_win +ffffffff8295d540 r gpd_win2 +ffffffff8295d558 r itworks_tw891 +ffffffff8295d570 r lcd1600x2560_rightside_up +ffffffff8295d588 r onegx1_pro +ffffffff8295d5a0 r lcd1600x2560_leftside_up +ffffffff8295d5b8 r lcd1280x1920_rightside_up +ffffffff8295d5d0 r .compoundliteral +ffffffff8295d5e0 r .compoundliteral.5 +ffffffff8295d608 r .compoundliteral.9 +ffffffff8295d628 r .compoundliteral.17 +ffffffff8295d668 r .compoundliteral.21 +ffffffff8295d688 r .compoundliteral.23 +ffffffff8295d698 r .compoundliteral.25 +ffffffff8295e000 r drm_gem_prime_dmabuf_ops +ffffffff82960000 r is_hdmi_adaptor.dp_dual_mode_hdmi_id +ffffffff82961000 r drm_dp_phy_name.phy_names +ffffffff82961048 r drm_dp_i2c_algo +ffffffff82961058 r drm_dp_i2c_lock_ops +ffffffff82961070 r dp_aux_bl_ops +ffffffff82961090 r dpcd_quirk_list +ffffffff82961320 r drm_dp_psr_setup_time.psr_setup_time_us +ffffffff82962000 R drm_dp_mst_topology_state_funcs +ffffffff82962020 r drm_dp_mst_req_type_str.req_type_str +ffffffff829621f0 r drm_dp_mst_sideband_tx_state_str.sideband_reason_str +ffffffff82962220 r drm_dp_mst_nak_reason_str.nak_reason_str +ffffffff82962278 r drm_dp_mst_i2c_algo +ffffffff82963000 r hdmi_colorimetry_val +ffffffff82964000 r ttm_bo_init_reserved.sys_mem +ffffffff82965000 r ttm_bo_pipeline_gutting.sys_mem +ffffffff82966018 R ttm_bo_vm_ops +ffffffff82967000 r ttm_range_manager_func +ffffffff82968018 r ttm_kmap_iter_io_ops +ffffffff82968030 r ttm_kmap_iter_linear_io_ops +ffffffff82969000 r ttm_sys_manager_func +ffffffff8296a000 r ttm_kmap_iter_tt_ops +ffffffff8296b000 r drm_sched_fence_ops_scheduled +ffffffff8296b038 r drm_sched_fence_ops_finished +ffffffff8296c000 R ch7017_ops +ffffffff8296d000 R ch7xxx_ops +ffffffff8296d060 r ch7xxx_ids +ffffffff8296e000 R ivch_ops +ffffffff8296e060 r backup_addresses +ffffffff8296f000 R ns2501_ops +ffffffff8296f060 r mode_agnostic_values +ffffffff8296f0e0 r ns2501_modes +ffffffff82970000 R sil164_ops +ffffffff82971000 R tfp410_ops +ffffffff82972000 r chv_dpll +ffffffff82972050 r vlv_dpll +ffffffff829720a0 r g4x_dpll +ffffffff829720f0 r pch_dpll +ffffffff82972138 r intel_dp_enc_funcs +ffffffff82973000 r intel_hdmi_enc_funcs +ffffffff82974000 r vlv_primary_formats +ffffffff82974030 r ivb_primary_formats +ffffffff82974050 r i965_primary_formats +ffffffff82974070 r i8xx_primary_formats +ffffffff82974080 r i965_plane_funcs +ffffffff829740e8 r i8xx_plane_funcs +ffffffff82975000 r gen11_dsi_encoder_funcs +ffffffff82975020 r gen11_dsi_connector_funcs +ffffffff82975098 r gen11_dsi_connector_helper_funcs +ffffffff829750e8 r gen11_dsi_host_ops +ffffffff82976000 r intel_plane_helper_funcs +ffffffff82977000 r g4x_audio_funcs +ffffffff82977010 r ilk_audio_funcs +ffffffff82977020 r hsw_audio_funcs +ffffffff82977030 r hdmi_audio_clock +ffffffff829770a0 r dp_aud_n_m +ffffffff82977250 r hdmi_aud_ncts_36bpp +ffffffff82977330 r hdmi_aud_ncts_30bpp +ffffffff82977410 r hdmi_aud_ncts_24bpp +ffffffff82978000 r intel_backlight_device_ops +ffffffff82978018 r bxt_pwm_funcs +ffffffff82978048 r cnp_pwm_funcs +ffffffff82978078 r lpt_pwm_funcs +ffffffff829780a8 r spt_pwm_funcs +ffffffff829780d8 r pch_pwm_funcs +ffffffff82978108 r ext_pwm_funcs +ffffffff82978138 r vlv_pwm_funcs +ffffffff82978168 r i965_pwm_funcs +ffffffff82978198 r i9xx_pwm_funcs +ffffffff829781c8 r pwm_bl_funcs +ffffffff82979000 r bdb_blocks +ffffffff82979160 r translate_iboost.mapping +ffffffff82979163 r adlp_ddc_pin_map +ffffffff8297916a r adls_ddc_pin_map +ffffffff82979170 r rkl_pch_tgp_ddc_pin_map +ffffffff82979175 r icp_ddc_pin_map +ffffffff8297917f r cnp_ddc_pin_map +ffffffff8297a000 r mtl_sa_info +ffffffff8297a006 r adlp_sa_info +ffffffff8297a00c r adls_sa_info +ffffffff8297a012 r rkl_sa_info +ffffffff8297a018 r tgl_sa_info +ffffffff8297a020 r intel_bw_funcs +ffffffff8297b000 r intel_cdclk_funcs +ffffffff8297b010 r dg2_cdclk_table +ffffffff8297b0c0 r adlp_a_step_cdclk_table +ffffffff8297b140 r adlp_cdclk_table +ffffffff8297b200 r rkl_cdclk_table +ffffffff8297b2f0 r icl_cdclk_table +ffffffff8297b3e0 r glk_cdclk_table +ffffffff8297b410 r bxt_cdclk_table +ffffffff8297b458 r tgl_cdclk_funcs +ffffffff8297b478 r ehl_cdclk_funcs +ffffffff8297b498 r icl_cdclk_funcs +ffffffff8297b4b8 r bxt_cdclk_funcs +ffffffff8297b4d8 r skl_cdclk_funcs +ffffffff8297b4f8 r bdw_cdclk_funcs +ffffffff8297b518 r hsw_cdclk_funcs +ffffffff8297b538 r chv_cdclk_funcs +ffffffff8297b558 r vlv_cdclk_funcs +ffffffff8297b578 r fixed_400mhz_cdclk_funcs +ffffffff8297b598 r ilk_cdclk_funcs +ffffffff8297b5b8 r gm45_cdclk_funcs +ffffffff8297b5d8 r g33_cdclk_funcs +ffffffff8297b5f8 r g33_get_cdclk.div_3200 +ffffffff8297b5fe r g33_get_cdclk.div_4000 +ffffffff8297b604 r g33_get_cdclk.div_4800 +ffffffff8297b60a r g33_get_cdclk.div_5333 +ffffffff8297b610 r i965gm_cdclk_funcs +ffffffff8297b630 r i965gm_get_cdclk.div_3200 +ffffffff8297b633 r i965gm_get_cdclk.div_4000 +ffffffff8297b636 r i965gm_get_cdclk.div_5333 +ffffffff8297b640 r pnv_cdclk_funcs +ffffffff8297b660 r i945gm_cdclk_funcs +ffffffff8297b680 r i915gm_cdclk_funcs +ffffffff8297b6a0 r i915g_cdclk_funcs +ffffffff8297b6c0 r i865g_cdclk_funcs +ffffffff8297b6e0 r i85x_cdclk_funcs +ffffffff8297b700 r i845g_cdclk_funcs +ffffffff8297b720 r i830_cdclk_funcs +ffffffff8297c000 r chv_color_funcs +ffffffff8297c028 r i965_color_funcs +ffffffff8297c050 r i9xx_color_funcs +ffffffff8297c078 r icl_color_funcs +ffffffff8297c0a0 r glk_color_funcs +ffffffff8297c0c8 r skl_color_funcs +ffffffff8297c0f0 r bdw_color_funcs +ffffffff8297c118 r hsw_color_funcs +ffffffff8297c140 r ivb_color_funcs +ffffffff8297c168 r ilk_color_funcs +ffffffff8297c190 r ilk_csc_off_zero +ffffffff8297c1a0 r ilk_csc_coeff_rgb_to_ycbcr +ffffffff8297c1b2 r ilk_csc_postoff_rgb_to_ycbcr +ffffffff8297c1c0 r ilk_csc_coeff_limited_range +ffffffff8297c1d2 r ilk_csc_postoff_limited_range +ffffffff8297c1e0 r ilk_csc_coeff_identity +ffffffff8297d000 r icl_procmon_values +ffffffff8297e000 r force_audio_names +ffffffff8297e040 r broadcast_rgb_names +ffffffff8297f000 r intel_crt_connector_funcs +ffffffff8297f078 r intel_crt_enc_funcs +ffffffff8297f098 r intel_crt_connector_helper_funcs +ffffffff8297f0f0 r intel_spurious_crt_detect +ffffffff82980000 r g4x_crtc_funcs +ffffffff829800c0 r i965_crtc_funcs +ffffffff82980180 r i915gm_crtc_funcs +ffffffff82980240 r i915_crtc_funcs +ffffffff82980300 r i8xx_crtc_funcs +ffffffff829803c0 r bdw_crtc_funcs +ffffffff82980480 r ilk_crtc_funcs +ffffffff82981000 r output_type_str +ffffffff82981060 r output_format_str +ffffffff82982000 r intel_cursor_plane_funcs +ffffffff82982068 r intel_cursor_formats +ffffffff82983000 r intel_ddi_funcs +ffffffff82983020 r index_to_dp_signal_levels +ffffffff82983030 r gen9_chicken_trans_reg_by_port.trans +ffffffff82984000 r tgl_combo_phy_trans_edp_hbr2_hobl +ffffffff82984010 r _tgl_combo_phy_trans_edp_hbr2_hobl +ffffffff82984080 r dg2_snps_trans_uhbr +ffffffff82984090 r dg2_snps_trans +ffffffff829840a0 r _dg2_snps_trans_uhbr +ffffffff82984160 r _dg2_snps_trans +ffffffff829841d8 r icl_combo_phy_trans_hdmi +ffffffff829841f0 r _icl_combo_phy_trans_hdmi +ffffffff82984248 r adlp_combo_phy_trans_edp_hbr3 +ffffffff82984258 r adlp_combo_phy_trans_edp_up_to_hbr2 +ffffffff82984270 r _adlp_combo_phy_trans_dp_hbr2_edp_hbr3 +ffffffff829842f0 r _adlp_combo_phy_trans_edp_hbr2 +ffffffff82984368 r adlp_combo_phy_trans_dp_hbr2_hbr3 +ffffffff82984378 r adlp_combo_phy_trans_dp_hbr +ffffffff82984390 r _adlp_combo_phy_trans_dp_hbr2_hbr3 +ffffffff82984410 r _adlp_combo_phy_trans_dp_hbr +ffffffff82984488 r tgl_dkl_phy_trans_hdmi +ffffffff829844a0 r _tgl_dkl_phy_trans_hdmi +ffffffff82984518 r adlp_dkl_phy_trans_dp_hbr2_hbr3 +ffffffff82984528 r adlp_dkl_phy_trans_dp_hbr +ffffffff82984540 r _adlp_dkl_phy_trans_dp_hbr2_hbr3 +ffffffff829845c0 r _adlp_dkl_phy_trans_dp_hbr +ffffffff82984638 r adls_combo_phy_trans_edp_hbr3 +ffffffff82984648 r adls_combo_phy_trans_edp_hbr2 +ffffffff82984660 r _adls_combo_phy_trans_edp_hbr3 +ffffffff829846e0 r _adls_combo_phy_trans_edp_hbr2 +ffffffff82984758 r adls_combo_phy_trans_dp_hbr2_hbr3 +ffffffff82984768 r tgl_combo_phy_trans_dp_hbr +ffffffff82984780 r _adls_combo_phy_trans_dp_hbr2_hbr3 +ffffffff82984800 r _tgl_combo_phy_trans_dp_hbr +ffffffff82984878 r icl_combo_phy_trans_dp_hbr2_edp_hbr3 +ffffffff82984888 r icl_combo_phy_trans_edp_hbr2 +ffffffff829848a0 r _icl_combo_phy_trans_dp_hbr2_edp_hbr3 +ffffffff82984920 r _icl_combo_phy_trans_edp_hbr2 +ffffffff82984998 r rkl_combo_phy_trans_dp_hbr2_hbr3 +ffffffff829849a8 r rkl_combo_phy_trans_dp_hbr +ffffffff829849c0 r _rkl_combo_phy_trans_dp_hbr2_hbr3 +ffffffff82984a40 r _rkl_combo_phy_trans_dp_hbr +ffffffff82984ab8 r dg1_combo_phy_trans_dp_hbr2_hbr3 +ffffffff82984ac8 r dg1_combo_phy_trans_dp_rbr_hbr +ffffffff82984ae0 r _dg1_combo_phy_trans_dp_hbr2_hbr3 +ffffffff82984b60 r _dg1_combo_phy_trans_dp_rbr_hbr +ffffffff82984bd8 r tgl_uy_combo_phy_trans_dp_hbr2 +ffffffff82984be8 r tgl_combo_phy_trans_dp_hbr2 +ffffffff82984c00 r _tgl_uy_combo_phy_trans_dp_hbr2 +ffffffff82984c80 r _tgl_combo_phy_trans_dp_hbr2 +ffffffff82984cf8 r tgl_dkl_phy_trans_dp_hbr2 +ffffffff82984d08 r tgl_dkl_phy_trans_dp_hbr +ffffffff82984d20 r _tgl_dkl_phy_trans_dp_hbr2 +ffffffff82984da0 r _tgl_dkl_phy_trans_dp_hbr +ffffffff82984e18 r jsl_combo_phy_trans_edp_hbr2 +ffffffff82984e28 r jsl_combo_phy_trans_edp_hbr +ffffffff82984e40 r _jsl_combo_phy_trans_edp_hbr2 +ffffffff82984ec0 r _jsl_combo_phy_trans_edp_hbr +ffffffff82984f38 r ehl_combo_phy_trans_dp +ffffffff82984f48 r ehl_combo_phy_trans_edp_hbr2 +ffffffff82984f60 r _ehl_combo_phy_trans_edp_hbr2 +ffffffff82984fe0 r _ehl_combo_phy_trans_dp +ffffffff82985058 r icl_mg_phy_trans_hdmi +ffffffff82985070 r _icl_mg_phy_trans_hdmi +ffffffff829850e8 r icl_mg_phy_trans_hbr2_hbr3 +ffffffff829850f8 r icl_mg_phy_trans_rbr_hbr +ffffffff82985110 r _icl_mg_phy_trans_hbr2_hbr3 +ffffffff82985190 r _icl_mg_phy_trans_rbr_hbr +ffffffff82985208 r bxt_trans_hdmi +ffffffff82985218 r bxt_trans_edp +ffffffff82985228 r bxt_trans_dp +ffffffff82985240 r _bxt_trans_hdmi +ffffffff829852c0 r _bxt_trans_edp +ffffffff82985340 r _bxt_trans_dp +ffffffff829853b8 r skl_y_trans_hdmi +ffffffff829853c8 r skl_y_trans_edp +ffffffff829853d8 r kbl_y_trans_dp +ffffffff829853f0 r _skl_y_trans_hdmi +ffffffff82985480 r _skl_y_trans_edp +ffffffff82985500 r _kbl_y_trans_dp +ffffffff82985570 r skl_trans_hdmi +ffffffff82985580 r skl_u_trans_edp +ffffffff82985590 r kbl_u_trans_dp +ffffffff829855a0 r _skl_trans_hdmi +ffffffff82985630 r _skl_u_trans_edp +ffffffff829856b0 r _kbl_u_trans_dp +ffffffff82985720 r skl_trans_edp +ffffffff82985730 r kbl_trans_dp +ffffffff82985740 r _skl_trans_edp +ffffffff829857c0 r _kbl_trans_dp +ffffffff82985830 r skl_y_trans_dp +ffffffff82985840 r _skl_y_trans_dp +ffffffff829858b0 r skl_u_trans_dp +ffffffff829858c0 r _skl_u_trans_dp +ffffffff82985930 r skl_trans_dp +ffffffff82985940 r _skl_trans_dp +ffffffff829859b0 r bdw_trans_fdi +ffffffff829859c0 r bdw_trans_hdmi +ffffffff829859d0 r bdw_trans_edp +ffffffff829859e0 r bdw_trans_dp +ffffffff829859f0 r _bdw_trans_fdi +ffffffff82985a60 r _bdw_trans_hdmi +ffffffff82985ae0 r _bdw_trans_edp +ffffffff82985b50 r _bdw_trans_dp +ffffffff82985bc0 r hsw_trans_fdi +ffffffff82985bd0 r hsw_trans_hdmi +ffffffff82985be0 r hsw_trans_dp +ffffffff82985bf0 r _hsw_trans_fdi +ffffffff82985c60 r _hsw_trans_hdmi +ffffffff82985cf0 r _hsw_trans_dp +ffffffff82986000 r load_detect_mode +ffffffff82986078 r skl_display_funcs +ffffffff829860a0 r ddi_display_funcs +ffffffff829860c8 r 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tonga_mgcg_cgcg_init -ffffffff82a7c590 r golden_settings_tonga_a11 +ffffffff829b4010 r set_proto_ctx_engines_extensions +ffffffff829b5000 r create_extensions +ffffffff829b6000 r i915_dmabuf_ops +ffffffff829b8000 r execbuf_extensions +ffffffff829b8010 r user_ring_map +ffffffff829b9000 r i915_gem_object_internal_ops +ffffffff829ba000 r i915_gem_object_funcs +ffffffff829bb000 R i915_gem_shmem_ops +ffffffff829bb080 r shmem_region_ops +ffffffff829bc000 r i915_region_stolen_lmem_ops +ffffffff829bc020 r i915_region_stolen_smem_ops +ffffffff829bc040 r i915_gem_object_stolen_ops +ffffffff829bd000 r ttm_system_region_ops +ffffffff829bd020 r sys_placement_flags +ffffffff829bd030 r tt_rsgt_ops +ffffffff829bd038 r i915_gem_ttm_obj_ops +ffffffff829be000 r dma_fence_memcpy_ops +ffffffff829bf000 r i915_ttm_recover_region.recover_ops +ffffffff829bf020 r i915_ttm_backup_region.backup_ops +ffffffff829bf028 r i915_ttm_restore_region.restore_ops +ffffffff829c0000 r pd_dummy_obj_ops +ffffffff829c0080 r pd_vma_ops +ffffffff829c1000 r gen6_null_state_relocs +ffffffff829c1020 r gen6_null_state_batch +ffffffff829c1470 R gen6_null_state +ffffffff829c2000 r hsw_clear_kernel +ffffffff829c2340 r ivb_clear_kernel +ffffffff829c3000 r gen7_null_state_relocs +ffffffff829c3018 R gen7_null_state +ffffffff829c3030 r gen7_null_state_batch +ffffffff829c4000 r gen8_null_state_relocs +ffffffff829c4018 R gen8_null_state +ffffffff829c4030 r gen8_null_state_batch +ffffffff829c5000 r gen9_null_state_relocs +ffffffff829c5018 R gen9_null_state +ffffffff829c5030 r gen9_null_state_batch +ffffffff829c6000 r intel_engines +ffffffff829c61a0 r get_reset_domain.engine_reset_domains +ffffffff829c6210 r get_reset_domain.engine_reset_domains.39 +ffffffff829c625c r engine_class_guc_class_map +ffffffff829c6270 r __cs_pending_mi_force_wakes._reg +ffffffff829c7000 r wf_ops +ffffffff829c8000 r intel_engine_class_repr.uabi_names +ffffffff829c8030 r uabi_classes +ffffffff829c8036 r legacy_ring_idx.map +ffffffff829c9000 r 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uncore_get_normal +ffffffff829f6268 r uncore_get_thread_status +ffffffff829f7000 r atom_op_names +ffffffff829f73e0 r opcode_table +ffffffff829f7b90 r atom_dst_to_src +ffffffff829f7c10 r atom_io_names +ffffffff829f7c40 r atom_table_names +ffffffff829f7e90 r atom_iio_len +ffffffff829f8000 r vga_control_regs +ffffffff829f8018 r atombios_helper_funcs +ffffffff829f9000 r voltage_names +ffffffff829f9020 r pre_emph_names +ffffffff829fa000 r radeon_atom_backlight_ops +ffffffff829fa018 r radeon_atom_enc_funcs +ffffffff829fa038 r radeon_atom_dig_helper_funcs +ffffffff829fa0a0 r radeon_atom_dac_helper_funcs +ffffffff829fa108 r radeon_atom_ext_helper_funcs +ffffffff829fb000 r caicos_cgcg_cgls_default +ffffffff829fb240 r barts_mgcg_default +ffffffff829fb900 r turks_mgcg_default +ffffffff829fbd80 r caicos_mgcg_default +ffffffff829fc110 r turks_sysls_default +ffffffff829fc1d0 r caicos_sysls_default +ffffffff829fc280 r caicos_cgcg_cgls_enable +ffffffff829fc4d0 r caicos_cgcg_cgls_disable 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SECT_CTRLCONST_defs +ffffffff82a084d0 r SECT_CONTEXT_def_2 +ffffffff82a084f0 r SECT_CONTEXT_def_4 +ffffffff82a08680 r SECT_CONTEXT_def_5 +ffffffff82a086a0 r SECT_CONTEXT_def_6 +ffffffff82a08780 r SECT_CONTEXT_def_1 +ffffffff82a08f20 r SECT_CONTEXT_def_3 +ffffffff82a09000 r SECT_CONTEXT_def_7 +ffffffff82a09488 r SECT_CLEAR_def_1 +ffffffff82a09494 r SECT_CTRLCONST_def_1 +ffffffff82a094a0 r evergreen_default_state +ffffffff82a0a000 r cayman_reg_safe_bm +ffffffff82a0c000 r evergreen_reg_safe_bm +ffffffff82a0f000 r evergreen_hdmi_write_sad_regs.eld_reg_to_type +ffffffff82a10000 r didt_config_kv +ffffffff82a11000 r barts_io_mc_regs +ffffffff82a110f0 r turks_io_mc_regs +ffffffff82a111e0 r caicos_io_mc_regs +ffffffff82a112d0 r cayman_io_mc_regs +ffffffff82a113c0 r cayman_golden_registers +ffffffff82a11580 r cayman_golden_registers2 +ffffffff82a115d0 r dvst_golden_registers +ffffffff82a11860 r dvst_golden_registers2 +ffffffff82a11890 r scrapper_golden_registers +ffffffff82a11d70 r tn_rlc_save_restore_register_list +ffffffff82a11f60 r cayman_cs_data +ffffffff82a11fa0 r SECT_CONTEXT_defs +ffffffff82a12020 r SECT_CLEAR_defs +ffffffff82a12040 r SECT_CTRLCONST_defs +ffffffff82a12060 r SECT_CONTEXT_def_2 +ffffffff82a12080 r SECT_CONTEXT_def_4 +ffffffff82a12210 r SECT_CONTEXT_def_5 +ffffffff82a12230 r SECT_CONTEXT_def_1 +ffffffff82a129d0 r SECT_CONTEXT_def_3 +ffffffff82a12ab0 r SECT_CONTEXT_def_6 +ffffffff82a12b90 r SECT_CONTEXT_def_7 +ffffffff82a13018 r SECT_CLEAR_def_1 +ffffffff82a13024 r SECT_CTRLCONST_def_1 +ffffffff82a13030 r cayman_default_state +ffffffff82a14000 r cac_weights_cayman_xt +ffffffff82a14128 r cac_weights_cayman_pro +ffffffff82a14250 r cac_weights_cayman_le +ffffffff82a14380 r cayman_cgcg_cgls_default +ffffffff82a145c0 r cayman_mgcg_default +ffffffff82a14f20 r cayman_sysls_default +ffffffff82a14ff0 r cayman_cgcg_cgls_enable +ffffffff82a15240 r cayman_cgcg_cgls_disable +ffffffff82a154a0 r cayman_mgcg_enable +ffffffff82a15520 r cayman_mgcg_disable +ffffffff82a155a0 r cayman_sysls_enable +ffffffff82a15670 r cayman_sysls_disable +ffffffff82a16000 r rn50_reg_safe_bm +ffffffff82a161a0 r r100_reg_safe_bm +ffffffff82a17000 r r200_reg_safe_bm +ffffffff82a18000 r r300_reg_safe_bm +ffffffff82a19000 r r420_reg_safe_bm +ffffffff82a1b000 r color_formats_table +ffffffff82a1b480 r r600_reg_safe_bm +ffffffff82a1e000 R r600_utc +ffffffff82a1e040 R r600_dtc +ffffffff82a1e080 r r600_encode_pci_lane_width.encoded_lanes +ffffffff82a20000 r r100_gfx_ring +ffffffff82a20070 r r300_gfx_ring +ffffffff82a200e0 r rv515_gfx_ring +ffffffff82a20150 r r600_gfx_ring +ffffffff82a201c0 r r600_dma_ring +ffffffff82a20230 r rv6xx_uvd_ring +ffffffff82a202a0 r rv770_uvd_ring +ffffffff82a20310 r evergreen_gfx_ring +ffffffff82a20380 r evergreen_dma_ring +ffffffff82a203f0 r cayman_gfx_ring +ffffffff82a20460 r cayman_dma_ring +ffffffff82a204d0 r cayman_uvd_ring +ffffffff82a20540 r trinity_vce_ring +ffffffff82a205b0 r si_gfx_ring +ffffffff82a20620 r si_dma_ring +ffffffff82a20690 r ci_gfx_ring +ffffffff82a20700 r ci_cp_ring +ffffffff82a20770 r ci_dma_ring +ffffffff82a207e0 r ci_vce_ring +ffffffff82a21000 r object_connector_convert +ffffffff82a21060 r supported_devices_connector_convert +ffffffff82a210a0 r supported_devices_connector_object_id_convert +ffffffff82a210c0 r thermal_controller_names +ffffffff82a21100 r pp_lib_thermal_controller_names +ffffffff82a22000 r pin_offsets +ffffffff82a22020 r radeon_audio_acr.hdmi_predefined_acr +ffffffff82a24000 r thermal_controller_names +ffffffff82a24020 r default_primarydac_adj +ffffffff82a24120 r default_tvdac_adj +ffffffff82a24220 r default_tmds_pll +ffffffff82a25000 r radeon_dp_connector_helper_funcs +ffffffff82a25050 r radeon_vga_connector_helper_funcs +ffffffff82a250a0 r radeon_dvi_connector_helper_funcs +ffffffff82a250f0 r radeon_tv_connector_helper_funcs +ffffffff82a25140 r radeon_lvds_connector_helper_funcs +ffffffff82a25190 r radeon_dp_connector_funcs +ffffffff82a25298 r radeon_lvds_bridge_connector_funcs +ffffffff82a25310 r radeon_vga_connector_funcs +ffffffff82a25388 r radeon_dvi_connector_funcs +ffffffff82a25400 r radeon_edp_connector_funcs +ffffffff82a25478 r radeon_tv_connector_funcs +ffffffff82a254f0 r radeon_lvds_connector_funcs +ffffffff82a26000 r radeon_family_name +ffffffff82a263f0 r radeon_px_quirk_list +ffffffff82a27000 r radeon_fb_funcs +ffffffff82a27018 r radeon_mode_funcs +ffffffff82a27060 r radeon_tmds_pll_enum_list +ffffffff82a27080 r radeon_tv_std_enum_list +ffffffff82a27100 r radeon_underscan_enum_list +ffffffff82a27130 r radeon_audio_enum_list +ffffffff82a27160 r radeon_dither_enum_list +ffffffff82a27180 r radeon_output_csc_enum_list +ffffffff82a271c0 r radeon_crtc_funcs +ffffffff82a27280 r hpd_names +ffffffff82a272b0 r encoder_names +ffffffff82a273e0 r radeon_afmt_init.eg_offsets +ffffffff82a28000 r aux_offset +ffffffff82a29000 R radeondrm_ca +ffffffff82a29030 r pciidlist +ffffffff82a2d1d0 r kms_driver +ffffffff82a2d2c0 r radeon_ioctls_kms +ffffffff82a2e000 r radeon_fb_helper_funcs +ffffffff82a2e008 r radeonfb_ops +ffffffff82a2f000 R radeon_fence_ops +ffffffff82a31000 R radeon_gem_object_funcs +ffffffff82a31060 r radeon_gem_vm_ops +ffffffff82a32000 r radeon_i2c_algo +ffffffff82a32010 r radeon_atom_i2c_algo +ffffffff82a33000 r legacy_helper_funcs +ffffffff82a34000 r radeon_backlight_ops +ffffffff82a34018 r radeon_legacy_lvds_enc_funcs +ffffffff82a34038 r radeon_legacy_lvds_helper_funcs +ffffffff82a340a0 r radeon_legacy_tmds_int_enc_funcs +ffffffff82a340c0 r radeon_legacy_tmds_int_helper_funcs +ffffffff82a34128 r radeon_legacy_primary_dac_enc_funcs +ffffffff82a34148 r radeon_legacy_primary_dac_helper_funcs +ffffffff82a341b0 r radeon_legacy_tv_dac_enc_funcs +ffffffff82a341d0 r radeon_legacy_tv_dac_helper_funcs +ffffffff82a34238 r radeon_legacy_tmds_ext_enc_funcs +ffffffff82a34258 r radeon_legacy_tmds_ext_helper_funcs +ffffffff82a35000 r SLOPE_value +ffffffff82a35030 r YCOEF_EN_value +ffffffff82a35060 r YCOEF_value +ffffffff82a35090 r available_tv_modes +ffffffff82a35110 r hor_timing_NTSC +ffffffff82a35150 r vert_timing_NTSC +ffffffff82a35190 r hor_timing_PAL +ffffffff82a351d0 r vert_timing_PAL +ffffffff82a37000 r radeon_pm_state_type_name +ffffffff82a38000 r radeon_evict_flags.placements +ffffffff82a3b000 r rs600_reg_safe_bm +ffffffff82a3d000 r rv515_reg_safe_bm +ffffffff82a3e000 r dll_speed_table +ffffffff82a3f000 r r7xx_golden_registers +ffffffff82a3f090 r r7xx_golden_dyn_gpr_registers +ffffffff82a3f100 r rv770ce_golden_registers +ffffffff82a3f160 r rv770_golden_registers +ffffffff82a3f1b0 r rv770_mgcg_init +ffffffff82a3f8f0 r rv730_golden_registers +ffffffff82a3f950 r rv730_mgcg_init +ffffffff82a3fee0 r rv710_golden_registers +ffffffff82a3ff30 r rv710_mgcg_init +ffffffff82a401d0 r rv740_golden_registers +ffffffff82a40360 r rv740_mgcg_init +ffffffff82a42000 r rv730_smc_int_vectors +ffffffff82a42040 r rv710_smc_int_vectors +ffffffff82a42080 r rv740_smc_int_vectors +ffffffff82a420c0 r cypress_smc_int_vectors +ffffffff82a42100 r caicos_smc_int_vectors +ffffffff82a42140 r cayman_smc_int_vectors +ffffffff82a43000 r tahiti_io_mc_regs +ffffffff82a43120 r pitcairn_io_mc_regs +ffffffff82a43240 r verde_io_mc_regs +ffffffff82a43360 r oland_io_mc_regs +ffffffff82a43480 r hainan_io_mc_regs +ffffffff82a435a0 r crtc_offsets +ffffffff82a435c0 r si_disp_int_status +ffffffff82a435e0 r tahiti_golden_registers +ffffffff82a43760 r tahiti_golden_rlc_registers +ffffffff82a437b0 r tahiti_mgcg_cgcg_init +ffffffff82a43d98 r tahiti_golden_registers2 +ffffffff82a43db0 r pitcairn_golden_registers +ffffffff82a43f00 r pitcairn_golden_rlc_registers +ffffffff82a43f40 r pitcairn_mgcg_cgcg_init +ffffffff82a443b0 r verde_golden_registers +ffffffff82a44620 r verde_golden_rlc_registers +ffffffff82a44660 r verde_mgcg_cgcg_init +ffffffff82a44ae0 r oland_golden_registers +ffffffff82a44c30 r oland_golden_rlc_registers +ffffffff82a44c70 r oland_mgcg_cgcg_init +ffffffff82a45000 r hainan_golden_registers +ffffffff82a4512c r hainan_golden_registers2 +ffffffff82a45140 r hainan_mgcg_cgcg_init +ffffffff82a454b0 r verde_rlc_save_restore_register_list +ffffffff82a45820 r si_cs_data +ffffffff82a45840 r si_SECT_CONTEXT_defs +ffffffff82a458c0 r si_SECT_CONTEXT_def_1 +ffffffff82a45c10 r si_SECT_CONTEXT_def_3 +ffffffff82a45c30 r si_SECT_CONTEXT_def_4 +ffffffff82a45ea4 r si_SECT_CONTEXT_def_5 +ffffffff82a45ea8 r si_SECT_CONTEXT_def_6 +ffffffff82a45eb0 r si_SECT_CONTEXT_def_2 +ffffffff82a462f0 r si_SECT_CONTEXT_def_7 +ffffffff82a466a0 r mc_cg_registers +ffffffff82a466d0 r si_default_state +ffffffff82a47000 r cac_weights_tahiti +ffffffff82a474d0 r lcac_tahiti +ffffffff82a47ba0 r cac_override_tahiti +ffffffff82a47bb4 r powertune_data_tahiti +ffffffff82a47bf0 r dte_data_tahiti +ffffffff82a47cc0 r dte_data_new_zealand +ffffffff82a47d90 r dte_data_malta +ffffffff82a47e60 r lcac_pitcairn +ffffffff82a48530 r cac_override_pitcairn +ffffffff82a48544 r powertune_data_pitcairn +ffffffff82a48580 r lcac_cape_verde +ffffffff82a489d0 r cac_override_cape_verde +ffffffff82a489e4 r powertune_data_cape_verde +ffffffff82a48a20 r cac_weights_cape_verde_pro +ffffffff82a48ef0 r cac_weights_heathrow +ffffffff82a493c0 r cac_weights_chelsea_xt +ffffffff82a49890 r cac_weights_chelsea_pro +ffffffff82a49d60 r cac_weights_cape_verde +ffffffff82a4a230 r cac_weights_mars_pro +ffffffff82a4a700 r lcac_mars_pro +ffffffff82a4aa60 r cac_override_oland +ffffffff82a4aa74 r powertune_data_mars_pro +ffffffff82a4aab0 r cac_weights_mars_xt +ffffffff82a4af80 r cac_weights_oland_pro +ffffffff82a4b450 r cac_weights_oland_xt +ffffffff82a4b920 r lcac_oland +ffffffff82a4bc7c r powertune_data_oland +ffffffff82a4bcb8 r dte_data_oland +ffffffff82a4bd90 r cac_weights_hainan +ffffffff82a4c254 r powertune_data_hainan +ffffffff82a4c290 r dte_data_aruba_pro +ffffffff82a4c360 r dte_data_tahiti_pro +ffffffff82a4c430 r dte_data_curacao_pro +ffffffff82a4c500 r dte_data_neptune_xt +ffffffff82a4c5d0 r dte_data_sun_xt +ffffffff82a4c6a0 r dte_data_venus_xtx +ffffffff82a4c770 r dte_data_venus_xt +ffffffff82a4c840 r dte_data_venus_pro +ffffffff82a4c910 r dte_data_mars_pro +ffffffff82a4d000 r si_program_jump_on_start.data +ffffffff82a4e000 r sumo_dtc +ffffffff82a4f000 r trinity_mgcg_shls_default +ffffffff82a4f380 r trinity_sysls_enable +ffffffff82a4f450 r trinity_sysls_disable +ffffffff82a51000 r GC_BASE +ffffffff82a510a8 r HDP_BASE +ffffffff82a51150 r MMHUB_BASE +ffffffff82a511f8 r ATHUB_BASE +ffffffff82a512a0 r NBIO_BASE +ffffffff82a51348 r MP0_BASE +ffffffff82a513f0 r MP1_BASE +ffffffff82a51498 r DF_BASE +ffffffff82a51540 r OSSSYS_BASE +ffffffff82a515e8 r SDMA0_BASE +ffffffff82a51690 r SDMA1_BASE +ffffffff82a51738 r SDMA2_BASE +ffffffff82a517e0 r SDMA3_BASE +ffffffff82a51888 r SDMA4_BASE +ffffffff82a51930 r SMUIO_BASE +ffffffff82a519d8 r THM_BASE +ffffffff82a51a80 r UMC_BASE +ffffffff82a51b28 r VCN_BASE +ffffffff82a52000 r amdgpu_afmt_predefined_acr +ffffffff82a53000 r atom_op_names +ffffffff82a533e0 r opcode_table +ffffffff82a53bd0 r atom_dst_to_src +ffffffff82a53c50 r atom_io_names +ffffffff82a53c80 r atom_table_names +ffffffff82a53ed0 r atom_iio_len +ffffffff82a54000 r object_connector_convert +ffffffff82a54058 R amdgpu_vbios_version_attr_group +ffffffff82a55000 r voltage_names +ffffffff82a55020 r pre_emph_names +ffffffff82a56000 r amdgpu_atombios_encoder_backlight_ops +ffffffff82a58000 r amdgpu_benchmark.common_modes +ffffffff82a59000 r amdgpu_cgs_ops +ffffffff82a5a000 r amdgpu_connector_dp_helper_funcs +ffffffff82a5a050 r amdgpu_connector_vga_helper_funcs +ffffffff82a5a0a0 r amdgpu_connector_dvi_helper_funcs +ffffffff82a5a0f0 r amdgpu_connector_lvds_helper_funcs +ffffffff82a5a140 r amdgpu_connector_dp_funcs +ffffffff82a5a1c0 r amdgpu_connector_add_common_modes.common_modes +ffffffff82a5a248 r amdgpu_connector_edp_funcs +ffffffff82a5a2c0 r amdgpu_connector_vga_funcs +ffffffff82a5a338 r amdgpu_connector_dvi_funcs +ffffffff82a5a3b0 r amdgpu_connector_lvds_funcs +ffffffff82a5c000 R amdgpu_ctx_num_entities +ffffffff82a5d000 r amdgpu_kms_driver +ffffffff82a5d0f0 r amdgpu_device_ip_reinit_late_sriov.ip_order +ffffffff82a5e000 r hw_id_map +ffffffff82a5e090 r hw_id_names +ffffffff82a5f000 r hpd_names +ffffffff82a5f030 r encoder_names +ffffffff82a5f180 r dcc_retile_formats +ffffffff82a5f270 r dcc_formats +ffffffff82a5f360 R amdgpu_mode_funcs +ffffffff82a5f3b0 r amdgpu_underscan_enum_list +ffffffff82a5f3e0 r amdgpu_audio_enum_list +ffffffff82a5f410 r amdgpu_dither_enum_list +ffffffff82a5f430 r amdgpu_fb_funcs +ffffffff82a60000 R amdgpu_dmabuf_ops +ffffffff82a61000 R amdgpu_ioctls_kms +ffffffff82a61210 R amdgpu_ca +ffffffff82a61240 r pciidlist +ffffffff82a62110 r amdgpu_unsupported_pciidlist +ffffffff82a62690 r amdgpu_kms_driver +ffffffff82a63000 r amdgpu_job_fence_ops +ffffffff82a63038 r amdgpu_fence_ops +ffffffff82a64000 r amdgpu_gem_object_funcs +ffffffff82a64060 r amdgpu_gem_vm_ops +ffffffff82a66000 R amdgpu_gtt_mgr_attr_group +ffffffff82a66018 r amdgpu_gtt_mgr_func +ffffffff82a67000 r amdgpu_atombios_i2c_algo +ffffffff82a68000 R amdgpu_sched_ops +ffffffff82a6b000 r amdgpu_vram_names +ffffffff82a6c000 r amdgpu_preempt_mgr_func +ffffffff82a6d000 R psp_ip_funcs +ffffffff82a6d0a0 R psp_v3_1_ip_block +ffffffff82a6d0b8 R psp_v10_0_ip_block +ffffffff82a6d0d0 R psp_v11_0_ip_block +ffffffff82a6d0e8 R psp_v11_0_8_ip_block +ffffffff82a6d100 R psp_v12_0_ip_block +ffffffff82a6d118 R psp_v13_0_ip_block +ffffffff82a6d130 R psp_v13_0_4_ip_block +ffffffff82a6f000 r amdgpu_evict_flags.placements +ffffffff82a73000 R amdgpu_vkms_ip_block +ffffffff82a75000 R amdgpu_vm_cpu_funcs +ffffffff82a77000 R amdgpu_vm_sdma_funcs +ffffffff82a78000 R amdgpu_vram_mgr_attr_group +ffffffff82a78018 r amdgpu_vram_mgr_func +ffffffff82a79000 r xgmi_pcs_err_status_reg_arct +ffffffff82a7a000 r GC_BASE +ffffffff82a7a0c0 r HDP_BASE +ffffffff82a7a180 r MMHUB_BASE +ffffffff82a7a240 r ATHUB_BASE +ffffffff82a7a300 r NBIF0_BASE +ffffffff82a7a3c0 r MP0_BASE +ffffffff82a7a480 r MP1_BASE +ffffffff82a7a540 r UVD_BASE +ffffffff82a7a600 r DF_BASE +ffffffff82a7a6c0 r OSSSYS_BASE +ffffffff82a7a780 r SDMA0_BASE +ffffffff82a7a840 r SDMA1_BASE +ffffffff82a7a900 r SDMA2_BASE +ffffffff82a7a9c0 r SDMA3_BASE +ffffffff82a7aa80 r SDMA4_BASE +ffffffff82a7ab40 r SDMA5_BASE +ffffffff82a7ac00 r SDMA6_BASE +ffffffff82a7acc0 r SDMA7_BASE +ffffffff82a7ad80 r SMUIO_BASE +ffffffff82a7ae40 r THM_BASE +ffffffff82a7af00 r UMC_BASE +ffffffff82a7afc0 r RSMU_BASE +ffffffff82a7c000 r cz_ih_ip_funcs +ffffffff82a7c0a0 R cz_ih_ip_block +ffffffff82a7c0b8 r cz_ih_funcs ffffffff82a7d000 r crtc_offsets -ffffffff82a7d020 r dce_v11_0_ip_funcs -ffffffff82a7d0c0 R dce_v11_0_ip_block -ffffffff82a7d0d8 R dce_v11_2_ip_block -ffffffff82a7d0f0 r dce_v11_0_display_funcs +ffffffff82a7d020 r dce_v10_0_ip_funcs +ffffffff82a7d0c0 R dce_v10_0_ip_block +ffffffff82a7d0d8 R dce_v10_1_ip_block +ffffffff82a7d0f0 r dce_v10_0_display_funcs ffffffff82a7d150 r hpd_offsets -ffffffff82a7d168 r dce_v11_0_encoder_funcs -ffffffff82a7d188 r dce_v11_0_dac_helper_funcs -ffffffff82a7d1f0 r dce_v11_0_dig_helper_funcs -ffffffff82a7d258 r dce_v11_0_ext_helper_funcs -ffffffff82a7d2c0 r dce_v11_0_audio_write_sad_regs.eld_reg_to_type -ffffffff82a7d2f0 r dce_v11_0_crtc_irq_funcs -ffffffff82a7d300 r dce_v11_0_pageflip_irq_funcs -ffffffff82a7d310 r dce_v11_0_hpd_irq_funcs +ffffffff82a7d168 r dce_v10_0_encoder_funcs +ffffffff82a7d188 r dce_v10_0_dac_helper_funcs +ffffffff82a7d1f0 r dce_v10_0_dig_helper_funcs +ffffffff82a7d258 r dce_v10_0_ext_helper_funcs +ffffffff82a7d2c0 r dce_v10_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82a7d2f0 r dce_v10_0_crtc_irq_funcs +ffffffff82a7d300 r dce_v10_0_pageflip_irq_funcs +ffffffff82a7d310 r dce_v10_0_hpd_irq_funcs ffffffff82a7d320 r interrupt_status_offsets -ffffffff82a7d380 r dce_v11_0_crtc_funcs -ffffffff82a7d440 r dce_v11_0_crtc_helper_funcs +ffffffff82a7d380 r dce_v10_0_crtc_funcs +ffffffff82a7d440 r dce_v10_0_crtc_helper_funcs ffffffff82a7d4c0 r vga_control_regs ffffffff82a7d4e0 r dig_offsets -ffffffff82a7d510 r cz_mgcg_cgcg_init -ffffffff82a7d530 r cz_golden_settings_a11 -ffffffff82a7d550 r stoney_golden_settings_a11 -ffffffff82a7d570 r polaris11_golden_settings_a11 -ffffffff82a7d5b0 r polaris10_golden_settings_a11 -ffffffff82a7e000 R df_v1_7_funcs -ffffffff82a7e070 r df_v1_7_channel_number -ffffffff82a7f000 R df_v3_6_funcs -ffffffff82a7f070 r df_v3_6_channel_number -ffffffff82a80000 r GC_BASE -ffffffff82a800a8 r HDP_BASE -ffffffff82a80150 r MMHUB_BASE -ffffffff82a801f8 r ATHUB_BASE -ffffffff82a802a0 r NBIO_BASE -ffffffff82a80348 r MP0_BASE -ffffffff82a803f0 r MP1_BASE -ffffffff82a80498 r VCN0_BASE -ffffffff82a80540 r DF_BASE -ffffffff82a805e8 r DCN_BASE -ffffffff82a80690 r OSSSYS_BASE -ffffffff82a80738 r SMUIO_BASE -ffffffff82a807e0 r THM_BASE -ffffffff82a81000 r gfx_v10_0_ip_funcs -ffffffff82a810a0 R gfx_v10_0_ip_block -ffffffff82a810b8 r gfx_v10_0_kiq_pm4_funcs -ffffffff82a810f8 r gfx_v10_0_ring_funcs_kiq -ffffffff82a81218 r gfx_v10_0_ring_funcs_gfx -ffffffff82a81338 r gfx_v10_0_ring_funcs_compute -ffffffff82a81458 r gfx_v10_0_eop_irq_funcs -ffffffff82a81468 r gfx_v10_0_kiq_irq_funcs -ffffffff82a81478 r gfx_v10_0_priv_reg_irq_funcs -ffffffff82a81488 r gfx_v10_0_priv_inst_irq_funcs -ffffffff82a81498 r gfx_v10_0_rlc_funcs -ffffffff82a81500 r gfx_v10_0_rlc_funcs_sriov -ffffffff82a81570 r gfx10_cs_data -ffffffff82a81590 r gfx10_SECT_CONTEXT_defs -ffffffff82a81620 r gfx10_SECT_CONTEXT_def_1 -ffffffff82a81980 r gfx10_SECT_CONTEXT_def_3 -ffffffff82a81990 r gfx10_SECT_CONTEXT_def_4 -ffffffff82a81c08 r gfx10_SECT_CONTEXT_def_5 -ffffffff82a81c10 r gfx10_SECT_CONTEXT_def_6 -ffffffff82a81c20 r gfx10_SECT_CONTEXT_def_2 -ffffffff82a82060 r gfx10_SECT_CONTEXT_def_7 -ffffffff82a82170 r gfx10_SECT_CONTEXT_def_8 -ffffffff82a824a0 r gfx_v10_0_gfx_funcs -ffffffff82a824e0 r golden_settings_gc_rlc_spm_10_0_nv10 -ffffffff82a88780 r golden_settings_gc_rlc_spm_10_1_nv14 -ffffffff82a8c1a0 r golden_settings_gc_rlc_spm_10_1_2_nv12 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-ffffffff82a95338 r gfx_v11_0_ring_funcs_compute -ffffffff82a95458 r gfx_v11_0_eop_irq_funcs -ffffffff82a95468 r gfx_v11_0_priv_reg_irq_funcs -ffffffff82a95478 r gfx_v11_0_priv_inst_irq_funcs -ffffffff82a95488 r gfx_v11_0_rlc_funcs -ffffffff82a954f0 r gfx11_cs_data -ffffffff82a95510 r gfx11_SECT_CONTEXT_defs -ffffffff82a95590 r gfx11_SECT_CONTEXT_def_1 -ffffffff82a958f0 r gfx11_SECT_CONTEXT_def_3 -ffffffff82a95900 r gfx11_SECT_CONTEXT_def_5 -ffffffff82a95908 r gfx11_SECT_CONTEXT_def_6 -ffffffff82a95910 r gfx11_SECT_CONTEXT_def_2 -ffffffff82a95d50 r gfx11_SECT_CONTEXT_def_4 -ffffffff82a95fd0 r gfx11_SECT_CONTEXT_def_7 -ffffffff82a96438 r gfx_v11_0_gfx_funcs -ffffffff82a96480 r golden_settings_gc_11_0_1 -ffffffff82a97000 r gfx_v8_0_ip_funcs -ffffffff82a970a0 R gfx_v8_0_ip_block -ffffffff82a970b8 R gfx_v8_1_ip_block -ffffffff82a970d0 r gfx_v8_0_gfx_funcs -ffffffff82a97110 r gfx_v8_0_ring_funcs_kiq -ffffffff82a97230 r gfx_v8_0_ring_funcs_gfx -ffffffff82a97350 r gfx_v8_0_ring_funcs_compute -ffffffff82a97470 r amdgpu_gds_reg_offset -ffffffff82a97570 r gfx_v8_0_eop_irq_funcs -ffffffff82a97580 r gfx_v8_0_priv_reg_irq_funcs -ffffffff82a97590 r gfx_v8_0_priv_inst_irq_funcs -ffffffff82a975a0 r gfx_v8_0_cp_ecc_error_irq_funcs -ffffffff82a975b0 r gfx_v8_0_sq_irq_funcs -ffffffff82a975c0 r sq_edc_source_names -ffffffff82a975f8 r iceland_rlc_funcs -ffffffff82a97660 r vi_cs_data -ffffffff82a97680 r vi_SECT_CONTEXT_defs -ffffffff82a97700 r vi_SECT_CONTEXT_def_1 -ffffffff82a97a50 r vi_SECT_CONTEXT_def_3 -ffffffff82a97a70 r vi_SECT_CONTEXT_def_4 -ffffffff82a97ce4 r vi_SECT_CONTEXT_def_5 -ffffffff82a97cec r vi_SECT_CONTEXT_def_6 -ffffffff82a97cf0 r vi_SECT_CONTEXT_def_2 -ffffffff82a98140 r vi_SECT_CONTEXT_def_7 -ffffffff82a984f0 r vgpr_init_compute_shader -ffffffff82a98600 r vgpr_init_regs -ffffffff82a98690 r sgpr1_init_regs -ffffffff82a98720 r sgpr2_init_regs -ffffffff82a987b0 r sec_ded_counter_registers -ffffffff82a98820 r iceland_mgcg_cgcg_init -ffffffff82a98b20 r golden_settings_iceland_a11 -ffffffff82a98be0 r iceland_golden_common_all -ffffffff82a98c40 r fiji_mgcg_cgcg_init -ffffffff82a98df0 r golden_settings_fiji_a10 -ffffffff82a98e80 r fiji_golden_common_all -ffffffff82a98f00 r tonga_mgcg_cgcg_init -ffffffff82a99290 r golden_settings_tonga_a11 -ffffffff82a99350 r tonga_golden_common_all -ffffffff82a993b0 r golden_settings_vegam_a11 -ffffffff82a99480 r vegam_golden_common_all -ffffffff82a994d0 r golden_settings_polaris11_a11 -ffffffff82a995a0 r polaris11_golden_common_all -ffffffff82a995f0 r golden_settings_polaris10_a11 -ffffffff82a996c0 r polaris10_golden_common_all -ffffffff82a99720 r cz_mgcg_cgcg_init -ffffffff82a99ab0 r cz_golden_settings_a11 -ffffffff82a99b40 r cz_golden_common_all -ffffffff82a99ba0 r stoney_mgcg_cgcg_init -ffffffff82a99be0 r stoney_golden_settings_a11 -ffffffff82a99c60 r stoney_golden_common_all -ffffffff82a9a000 R gfx_v9_0_ras_ops -ffffffff82a9a040 r gfx_v9_0_ip_funcs -ffffffff82a9a0e0 R gfx_v9_0_ip_block -ffffffff82a9a100 r ras_gfx_subblocks -ffffffff82a9ab80 r gfx_v9_0_edc_counter_regs -ffffffff82a9af20 r gfx_v9_0_ras_fields -ffffffff82a9c000 r gfx_v9_0_kiq_pm4_funcs -ffffffff82a9c040 r gfx_v9_0_ring_funcs_kiq -ffffffff82a9c160 r gfx_v9_0_ring_funcs_gfx -ffffffff82a9c280 r gfx_v9_0_ring_funcs_compute -ffffffff82a9c3a0 r gfx_v9_0_eop_irq_funcs -ffffffff82a9c3b0 r gfx_v9_0_priv_reg_irq_funcs -ffffffff82a9c3c0 r gfx_v9_0_priv_inst_irq_funcs -ffffffff82a9c3d0 r gfx_v9_0_cp_ecc_error_irq_funcs -ffffffff82a9c3e0 r gfx_v9_0_rlc_funcs -ffffffff82a9c450 r gfx9_cs_data -ffffffff82a9c470 r gfx9_SECT_CONTEXT_defs -ffffffff82a9c500 r gfx9_SECT_CONTEXT_def_1 -ffffffff82a9c850 r gfx9_SECT_CONTEXT_def_3 -ffffffff82a9c860 r gfx9_SECT_CONTEXT_def_4 -ffffffff82a9cad4 r gfx9_SECT_CONTEXT_def_5 -ffffffff82a9cadc r gfx9_SECT_CONTEXT_def_6 -ffffffff82a9cae0 r gfx9_SECT_CONTEXT_def_7 -ffffffff82a9cbf0 r gfx9_SECT_CONTEXT_def_2 -ffffffff82a9d060 r gfx9_SECT_CONTEXT_def_8 -ffffffff82a9d2d0 r vgpr_init_compute_shader_arcturus -ffffffff82a9db60 r vgpr_init_regs_arcturus -ffffffff82a9dcf0 r vgpr_init_regs -ffffffff82a9de80 r sgpr1_init_regs -ffffffff82a9e010 r sgpr2_init_regs -ffffffff82a9e198 r gfx_v9_0_gfx_funcs -ffffffff82a9e1e0 r golden_settings_gc_9_0 -ffffffff82a9e3c0 r golden_settings_gc_9_0_vg10 -ffffffff82a9e570 r golden_settings_gc_9_2_1 -ffffffff82a9e6f0 r golden_settings_gc_9_2_1_vg12 -ffffffff82a9e830 r golden_settings_gc_9_0_vg20 -ffffffff82a9e940 r golden_settings_gc_9_4_1_arct -ffffffff82a9ea50 r golden_settings_gc_9_1 -ffffffff82a9ec90 r golden_settings_gc_9_1_rv2 -ffffffff82a9ee60 r golden_settings_gc_9_1_rv1 -ffffffff82a9ef10 r golden_settings_gc_9_1_rn -ffffffff82a9f030 r golden_settings_gc_9_x_common -ffffffff82aa0000 R gfx_v9_4_ras_ops -ffffffff82aa0040 r gfx_v9_4_edc_counter_regs -ffffffff82aa0420 r gfx_v9_4_ras_fields -ffffffff82aa2000 R vgpr_init_regs_aldebaran -ffffffff82aa21b0 R sgpr112_init_regs_aldebaran -ffffffff82aa2360 R sgpr96_init_regs_aldebaran -ffffffff82aa2510 R sgpr64_init_regs_aldebaran -ffffffff82aa26c0 r golden_settings_gc_9_4_2_alde -ffffffff82aa2720 r golden_settings_gc_9_4_2_alde_die_0 -ffffffff82aa27b0 r golden_settings_gc_9_4_2_alde_die_1 -ffffffff82aa2840 r sgpr112_init_compute_shader_aldebaran -ffffffff82aa2a60 r sgpr96_init_compute_shader_aldebaran -ffffffff82aa2c50 r sgpr64_init_compute_shader_aldebaran -ffffffff82aa2dc0 r vgpr_init_compute_shader_aldebaran -ffffffff82aa36a0 r gfx_v9_4_2_edc_counter_regs -ffffffff82aa3a20 r gfx_v9_4_2_ras_fields -ffffffff82aa53c0 r gfx_v9_4_2_utc_blocks -ffffffff82aa6000 R gfxhub_v1_0_funcs -ffffffff82aa7000 R gfxhub_v2_0_funcs -ffffffff82aa7060 r gfxhub_v2_0_vmhub_funcs -ffffffff82aa7070 r gfxhub_client_ids -ffffffff82aa8000 R gfxhub_v2_1_funcs -ffffffff82aa8060 r gfxhub_v2_1_vmhub_funcs +ffffffff82a7d500 r pin_offsets +ffffffff82a7d520 r fiji_mgcg_cgcg_init +ffffffff82a7d540 r golden_settings_fiji_a10 +ffffffff82a7d570 r tonga_mgcg_cgcg_init +ffffffff82a7d590 r golden_settings_tonga_a11 +ffffffff82a7e000 r crtc_offsets +ffffffff82a7e020 r dce_v11_0_ip_funcs +ffffffff82a7e0c0 R dce_v11_0_ip_block +ffffffff82a7e0d8 R dce_v11_2_ip_block +ffffffff82a7e0f0 r dce_v11_0_display_funcs +ffffffff82a7e150 r hpd_offsets +ffffffff82a7e168 r dce_v11_0_encoder_funcs +ffffffff82a7e188 r dce_v11_0_dac_helper_funcs +ffffffff82a7e1f0 r dce_v11_0_dig_helper_funcs +ffffffff82a7e258 r dce_v11_0_ext_helper_funcs +ffffffff82a7e2c0 r dce_v11_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82a7e2f0 r dce_v11_0_crtc_irq_funcs +ffffffff82a7e300 r dce_v11_0_pageflip_irq_funcs +ffffffff82a7e310 r dce_v11_0_hpd_irq_funcs +ffffffff82a7e320 r interrupt_status_offsets +ffffffff82a7e380 r dce_v11_0_crtc_funcs +ffffffff82a7e440 r dce_v11_0_crtc_helper_funcs +ffffffff82a7e4c0 r vga_control_regs +ffffffff82a7e4e0 r dig_offsets +ffffffff82a7e510 r cz_mgcg_cgcg_init +ffffffff82a7e530 r cz_golden_settings_a11 +ffffffff82a7e550 r stoney_golden_settings_a11 +ffffffff82a7e570 r polaris11_golden_settings_a11 +ffffffff82a7e5b0 r polaris10_golden_settings_a11 +ffffffff82a7f000 R df_v1_7_funcs +ffffffff82a7f070 r df_v1_7_channel_number +ffffffff82a80000 R df_v3_6_funcs +ffffffff82a80070 r df_v3_6_channel_number +ffffffff82a81000 r GC_BASE +ffffffff82a810a8 r HDP_BASE +ffffffff82a81150 r MMHUB_BASE +ffffffff82a811f8 r ATHUB_BASE +ffffffff82a812a0 r NBIO_BASE +ffffffff82a81348 r MP0_BASE +ffffffff82a813f0 r MP1_BASE +ffffffff82a81498 r VCN0_BASE +ffffffff82a81540 r DF_BASE +ffffffff82a815e8 r DCN_BASE +ffffffff82a81690 r OSSSYS_BASE +ffffffff82a81738 r SMUIO_BASE +ffffffff82a817e0 r THM_BASE +ffffffff82a82000 r gfx_v10_0_ip_funcs +ffffffff82a820a0 R gfx_v10_0_ip_block +ffffffff82a820b8 r gfx_v10_0_kiq_pm4_funcs +ffffffff82a820f8 r gfx_v10_0_ring_funcs_kiq +ffffffff82a82218 r gfx_v10_0_ring_funcs_gfx +ffffffff82a82338 r gfx_v10_0_ring_funcs_compute +ffffffff82a82458 r gfx_v10_0_eop_irq_funcs +ffffffff82a82468 r gfx_v10_0_kiq_irq_funcs +ffffffff82a82478 r gfx_v10_0_priv_reg_irq_funcs +ffffffff82a82488 r gfx_v10_0_priv_inst_irq_funcs +ffffffff82a82498 r gfx_v10_0_rlc_funcs +ffffffff82a82500 r gfx_v10_0_rlc_funcs_sriov +ffffffff82a82570 r gfx10_cs_data +ffffffff82a82590 r gfx10_SECT_CONTEXT_defs +ffffffff82a82620 r gfx10_SECT_CONTEXT_def_1 +ffffffff82a82980 r gfx10_SECT_CONTEXT_def_3 +ffffffff82a82990 r gfx10_SECT_CONTEXT_def_4 +ffffffff82a82c08 r gfx10_SECT_CONTEXT_def_5 +ffffffff82a82c10 r gfx10_SECT_CONTEXT_def_6 +ffffffff82a82c20 r gfx10_SECT_CONTEXT_def_2 +ffffffff82a83060 r gfx10_SECT_CONTEXT_def_7 +ffffffff82a83170 r gfx10_SECT_CONTEXT_def_8 +ffffffff82a834a0 r gfx_v10_0_gfx_funcs +ffffffff82a834e0 r golden_settings_gc_rlc_spm_10_0_nv10 +ffffffff82a89780 r golden_settings_gc_rlc_spm_10_1_nv14 +ffffffff82a8d1a0 r golden_settings_gc_rlc_spm_10_1_2_nv12 +ffffffff82a93440 r golden_settings_gc_10_1 +ffffffff82a93800 r golden_settings_gc_10_0_nv10 +ffffffff82a93800 r golden_settings_gc_10_1_1 +ffffffff82a93b90 r golden_settings_gc_10_1_2 +ffffffff82a93b90 r golden_settings_gc_10_1_nv14 +ffffffff82a93f80 r golden_settings_gc_10_1_2_nv12 +ffffffff82a93f80 r golden_settings_gc_10_3 +ffffffff82a94388 r golden_settings_gc_10_3_sienna_cichlid +ffffffff82a94390 r golden_settings_gc_10_3_2 +ffffffff82a94780 r golden_settings_gc_10_3_vangogh +ffffffff82a949e0 r golden_settings_gc_10_3_3 +ffffffff82a94bc0 r golden_settings_gc_10_3_4 +ffffffff82a94f20 r golden_settings_gc_10_3_5 +ffffffff82a95220 r golden_settings_gc_10_0_cyan_skillfish +ffffffff82a95550 r golden_settings_gc_10_3_6 +ffffffff82a95760 r golden_settings_gc_10_3_7 +ffffffff82a96000 r gfx_v11_0_ip_funcs +ffffffff82a960a0 R gfx_v11_0_ip_block +ffffffff82a960b8 r gfx_v11_0_kiq_pm4_funcs +ffffffff82a960f8 r gfx_v11_0_ring_funcs_kiq +ffffffff82a96218 r gfx_v11_0_ring_funcs_gfx +ffffffff82a96338 r gfx_v11_0_ring_funcs_compute +ffffffff82a96458 r gfx_v11_0_eop_irq_funcs +ffffffff82a96468 r gfx_v11_0_priv_reg_irq_funcs +ffffffff82a96478 r gfx_v11_0_priv_inst_irq_funcs +ffffffff82a96488 r gfx_v11_0_rlc_funcs +ffffffff82a964f0 r gfx11_cs_data +ffffffff82a96510 r gfx11_SECT_CONTEXT_defs +ffffffff82a96590 r gfx11_SECT_CONTEXT_def_1 +ffffffff82a968f0 r gfx11_SECT_CONTEXT_def_3 +ffffffff82a96900 r gfx11_SECT_CONTEXT_def_5 +ffffffff82a96908 r gfx11_SECT_CONTEXT_def_6 +ffffffff82a96910 r gfx11_SECT_CONTEXT_def_2 +ffffffff82a96d50 r gfx11_SECT_CONTEXT_def_4 +ffffffff82a96fd0 r gfx11_SECT_CONTEXT_def_7 +ffffffff82a97438 r gfx_v11_0_gfx_funcs +ffffffff82a97480 r golden_settings_gc_11_0_1 +ffffffff82a98000 r gfx_v8_0_ip_funcs +ffffffff82a980a0 R gfx_v8_0_ip_block +ffffffff82a980b8 R gfx_v8_1_ip_block +ffffffff82a980d0 r gfx_v8_0_gfx_funcs +ffffffff82a98110 r gfx_v8_0_ring_funcs_kiq +ffffffff82a98230 r gfx_v8_0_ring_funcs_gfx +ffffffff82a98350 r gfx_v8_0_ring_funcs_compute +ffffffff82a98470 r amdgpu_gds_reg_offset +ffffffff82a98570 r gfx_v8_0_eop_irq_funcs +ffffffff82a98580 r gfx_v8_0_priv_reg_irq_funcs +ffffffff82a98590 r gfx_v8_0_priv_inst_irq_funcs +ffffffff82a985a0 r gfx_v8_0_cp_ecc_error_irq_funcs +ffffffff82a985b0 r gfx_v8_0_sq_irq_funcs +ffffffff82a985c0 r sq_edc_source_names +ffffffff82a985f8 r iceland_rlc_funcs +ffffffff82a98660 r vi_cs_data +ffffffff82a98680 r vi_SECT_CONTEXT_defs +ffffffff82a98700 r vi_SECT_CONTEXT_def_1 +ffffffff82a98a50 r vi_SECT_CONTEXT_def_3 +ffffffff82a98a70 r vi_SECT_CONTEXT_def_4 +ffffffff82a98ce4 r vi_SECT_CONTEXT_def_5 +ffffffff82a98cec r vi_SECT_CONTEXT_def_6 +ffffffff82a98cf0 r vi_SECT_CONTEXT_def_2 +ffffffff82a99140 r vi_SECT_CONTEXT_def_7 +ffffffff82a994f0 r vgpr_init_compute_shader +ffffffff82a99600 r vgpr_init_regs +ffffffff82a99690 r sgpr1_init_regs +ffffffff82a99720 r sgpr2_init_regs +ffffffff82a997b0 r sec_ded_counter_registers +ffffffff82a99820 r iceland_mgcg_cgcg_init +ffffffff82a99b20 r golden_settings_iceland_a11 +ffffffff82a99be0 r iceland_golden_common_all +ffffffff82a99c40 r fiji_mgcg_cgcg_init +ffffffff82a99df0 r golden_settings_fiji_a10 +ffffffff82a99e80 r fiji_golden_common_all +ffffffff82a99f00 r tonga_mgcg_cgcg_init +ffffffff82a9a290 r golden_settings_tonga_a11 +ffffffff82a9a350 r tonga_golden_common_all +ffffffff82a9a3b0 r golden_settings_vegam_a11 +ffffffff82a9a480 r vegam_golden_common_all +ffffffff82a9a4d0 r golden_settings_polaris11_a11 +ffffffff82a9a5a0 r polaris11_golden_common_all +ffffffff82a9a5f0 r golden_settings_polaris10_a11 +ffffffff82a9a6c0 r polaris10_golden_common_all +ffffffff82a9a720 r cz_mgcg_cgcg_init +ffffffff82a9aab0 r cz_golden_settings_a11 +ffffffff82a9ab40 r cz_golden_common_all +ffffffff82a9aba0 r stoney_mgcg_cgcg_init +ffffffff82a9abe0 r stoney_golden_settings_a11 +ffffffff82a9ac60 r stoney_golden_common_all +ffffffff82a9b000 R gfx_v9_0_ras_ops +ffffffff82a9b040 r gfx_v9_0_ip_funcs +ffffffff82a9b0e0 R gfx_v9_0_ip_block +ffffffff82a9b100 r ras_gfx_subblocks +ffffffff82a9bb80 r gfx_v9_0_edc_counter_regs +ffffffff82a9bf20 r gfx_v9_0_ras_fields +ffffffff82a9d000 r gfx_v9_0_kiq_pm4_funcs +ffffffff82a9d040 r gfx_v9_0_ring_funcs_kiq +ffffffff82a9d160 r gfx_v9_0_ring_funcs_gfx +ffffffff82a9d280 r gfx_v9_0_ring_funcs_compute +ffffffff82a9d3a0 r gfx_v9_0_eop_irq_funcs +ffffffff82a9d3b0 r gfx_v9_0_priv_reg_irq_funcs +ffffffff82a9d3c0 r gfx_v9_0_priv_inst_irq_funcs +ffffffff82a9d3d0 r gfx_v9_0_cp_ecc_error_irq_funcs +ffffffff82a9d3e0 r gfx_v9_0_rlc_funcs +ffffffff82a9d450 r gfx9_cs_data +ffffffff82a9d470 r gfx9_SECT_CONTEXT_defs +ffffffff82a9d500 r gfx9_SECT_CONTEXT_def_1 +ffffffff82a9d850 r gfx9_SECT_CONTEXT_def_3 +ffffffff82a9d860 r gfx9_SECT_CONTEXT_def_4 +ffffffff82a9dad4 r gfx9_SECT_CONTEXT_def_5 +ffffffff82a9dadc r gfx9_SECT_CONTEXT_def_6 +ffffffff82a9dae0 r gfx9_SECT_CONTEXT_def_7 +ffffffff82a9dbf0 r gfx9_SECT_CONTEXT_def_2 +ffffffff82a9e060 r gfx9_SECT_CONTEXT_def_8 +ffffffff82a9e2d0 r vgpr_init_compute_shader_arcturus +ffffffff82a9eb60 r vgpr_init_regs_arcturus +ffffffff82a9ecf0 r vgpr_init_regs +ffffffff82a9ee80 r sgpr1_init_regs +ffffffff82a9f010 r sgpr2_init_regs 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golden_settings_gc_9_4_2_alde_die_1 +ffffffff82aa3840 r sgpr112_init_compute_shader_aldebaran +ffffffff82aa3a60 r sgpr96_init_compute_shader_aldebaran +ffffffff82aa3c50 r sgpr64_init_compute_shader_aldebaran +ffffffff82aa3dc0 r vgpr_init_compute_shader_aldebaran +ffffffff82aa46a0 r gfx_v9_4_2_edc_counter_regs +ffffffff82aa4a20 r gfx_v9_4_2_ras_fields +ffffffff82aa63c0 r gfx_v9_4_2_utc_blocks +ffffffff82aa7000 R gfxhub_v1_0_funcs +ffffffff82aa8000 R gfxhub_v2_0_funcs +ffffffff82aa8060 r gfxhub_v2_0_vmhub_funcs ffffffff82aa8070 r gfxhub_client_ids -ffffffff82aa9000 R gfxhub_v3_0_funcs -ffffffff82aa9060 r gfxhub_v3_0_vmhub_funcs +ffffffff82aa9000 R gfxhub_v2_1_funcs +ffffffff82aa9060 r gfxhub_v2_1_vmhub_funcs ffffffff82aa9070 r gfxhub_client_ids -ffffffff82aaa000 R gfxhub_v3_0_3_funcs -ffffffff82aaa060 r gfxhub_v3_0_3_vmhub_funcs +ffffffff82aaa000 R gfxhub_v3_0_funcs +ffffffff82aaa060 r gfxhub_v3_0_vmhub_funcs ffffffff82aaa070 r gfxhub_client_ids -ffffffff82aab000 R gmc_v10_0_ip_funcs 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CLK_BASE -ffffffff82b04000 R vega20_ih_ip_funcs -ffffffff82b040a0 R vega20_ih_ip_block -ffffffff82b040b8 r vega20_ih_funcs -ffffffff82b040d8 r vega20_ih_self_irq_funcs -ffffffff82b05000 r GC_BASE -ffffffff82b05090 r HDP_BASE -ffffffff82b05120 r MMHUB_BASE -ffffffff82b051b0 r ATHUB_BASE -ffffffff82b05240 r NBIO_BASE -ffffffff82b052d0 r MP0_BASE -ffffffff82b05360 r MP1_BASE -ffffffff82b053f0 r UVD_BASE -ffffffff82b05480 r VCE_BASE -ffffffff82b05510 r DF_BASE -ffffffff82b055a0 r DCE_BASE -ffffffff82b05630 r OSSSYS_BASE -ffffffff82b056c0 r SDMA0_BASE -ffffffff82b05750 r SDMA1_BASE -ffffffff82b057e0 r SMUIO_BASE -ffffffff82b05870 r THM_BASE -ffffffff82b05900 r CLK_BASE -ffffffff82b05990 r UMC_BASE -ffffffff82b05a20 r RSMU_BASE -ffffffff82b06000 r vi_common_ip_block -ffffffff82b06018 r vi_common_ip_funcs -ffffffff82b060b8 r vi_asic_funcs -ffffffff82b06170 r vi_allowed_read_registers -ffffffff82b063d0 r topaz_video_codecs_encode -ffffffff82b063e0 r topaz_video_codecs_decode -ffffffff82b063f0 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gfxhub_client_ids +ffffffff82aac000 R gmc_v10_0_ip_funcs +ffffffff82aac0a0 R gmc_v10_0_ip_block +ffffffff82aac0b8 r gmc_v10_0_gmc_funcs +ffffffff82aac100 r gmc_v10_0_irq_funcs +ffffffff82aac110 r gmc_v10_0_ecc_funcs +ffffffff82aad000 R gmc_v11_0_ip_funcs +ffffffff82aad0a0 R gmc_v11_0_ip_block +ffffffff82aad0b8 r gmc_v11_0_gmc_funcs +ffffffff82aad100 r gmc_v11_0_irq_funcs +ffffffff82aad110 r gmc_v11_0_ecc_funcs +ffffffff82aae000 r gmc_v7_0_ip_funcs +ffffffff82aae0a0 R gmc_v7_0_ip_block +ffffffff82aae0b8 R gmc_v7_4_ip_block +ffffffff82aae0d0 r gmc_v7_0_gmc_funcs +ffffffff82aae118 r gmc_v7_0_irq_funcs +ffffffff82aae128 r iceland_mgcg_cgcg_init +ffffffff82aae140 r golden_settings_iceland_a11 +ffffffff82aae170 r mc_cg_registers +ffffffff82aae1a0 r mc_cg_en +ffffffff82aae1d0 r mc_cg_ls_en +ffffffff82aaf000 r gmc_v8_0_ip_funcs +ffffffff82aaf0a0 R gmc_v8_0_ip_block +ffffffff82aaf0b8 R gmc_v8_1_ip_block +ffffffff82aaf0d0 R gmc_v8_5_ip_block +ffffffff82aaf0e8 r gmc_v8_0_gmc_funcs +ffffffff82aaf130 r gmc_v8_0_irq_funcs +ffffffff82aaf140 r fiji_mgcg_cgcg_init +ffffffff82aaf150 r golden_settings_fiji_a10 +ffffffff82aaf180 r tonga_mgcg_cgcg_init +ffffffff82aaf190 r golden_settings_tonga_a11 +ffffffff82aaf1f0 r golden_settings_polaris11_a11 +ffffffff82aaf220 r golden_settings_polaris10_a11 +ffffffff82aaf25c r cz_mgcg_cgcg_init +ffffffff82aaf270 r stoney_mgcg_cgcg_init +ffffffff82aaf290 r golden_settings_stoney_common +ffffffff82ab0000 R gmc_v9_0_ip_funcs +ffffffff82ab00a0 R gmc_v9_0_ip_block +ffffffff82ab00b8 r gmc_v9_0_gmc_funcs +ffffffff82ab0100 r gmc_v9_0_irq_funcs +ffffffff82ab0110 r gmc_v9_0_ecc_funcs +ffffffff82ab0120 r gfxhub_client_ids +ffffffff82ab0190 r mmhub_client_ids_vega10 +ffffffff82ab0480 r mmhub_client_ids_vega12 +ffffffff82ab0780 r mmhub_client_ids_vega20 +ffffffff82ab0a70 r mmhub_client_ids_arcturus +ffffffff82ab2280 r mmhub_client_ids_raven +ffffffff82ab2440 r mmhub_client_ids_renoir +ffffffff82ab2630 r mmhub_client_ids_aldebaran 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+ffffffff82abd1d8 r jpeg_v2_0_irq_funcs +ffffffff82abe000 r jpeg_v2_5_ip_funcs +ffffffff82abe0a0 R jpeg_v2_5_ip_block +ffffffff82abe0b8 r jpeg_v2_6_ip_funcs +ffffffff82abe158 R jpeg_v2_6_ip_block +ffffffff82abe170 R jpeg_v2_6_ras_hw_ops +ffffffff82abe1b0 r jpeg_v2_5_dec_ring_vm_funcs +ffffffff82abe2d0 r jpeg_v2_6_dec_ring_vm_funcs +ffffffff82abe3f0 r jpeg_v2_5_irq_funcs +ffffffff82abf000 r jpeg_v3_0_ip_funcs +ffffffff82abf0a0 R jpeg_v3_0_ip_block +ffffffff82abf0b8 r jpeg_v3_0_dec_ring_vm_funcs +ffffffff82abf1d8 r jpeg_v3_0_irq_funcs +ffffffff82ac0000 r jpeg_v4_0_ip_funcs +ffffffff82ac00a0 R jpeg_v4_0_ip_block +ffffffff82ac00b8 r jpeg_v4_0_dec_ring_vm_funcs +ffffffff82ac01d8 r jpeg_v4_0_irq_funcs +ffffffff82ac1000 R lsdma_v6_0_funcs +ffffffff82ac2000 R mca_v3_0_mp0_hw_ops +ffffffff82ac2040 R mca_v3_0_mp1_hw_ops +ffffffff82ac2080 R mca_v3_0_mpio_hw_ops +ffffffff82ac20c0 R mca_v3_0_funcs +ffffffff82ac3000 r mes_v10_1_ip_funcs +ffffffff82ac30a0 R mes_v10_1_ip_block +ffffffff82ac30b8 r mes_v10_1_funcs +ffffffff82ac30e8 r mes_v10_1_ring_funcs +ffffffff82ac4000 r mes_v11_0_ip_funcs +ffffffff82ac40a0 R mes_v11_0_ip_block +ffffffff82ac40b8 r mes_v11_0_funcs +ffffffff82ac40e8 r mes_v11_0_ring_funcs +ffffffff82ac5000 R mmhub_v1_0_funcs +ffffffff82ac5050 r mmhub_v1_0_edc_cnt_regs +ffffffff82ac50c0 r mmhub_v1_0_ras_fields +ffffffff82ac6000 R mmhub_v1_7_funcs +ffffffff82ac6050 r mmhub_v1_7_edc_cnt_regs +ffffffff82ac6250 r mmhub_v1_7_ras_fields +ffffffff82ac79c0 r mmhub_v1_7_ea_err_status_regs +ffffffff82ac8000 R mmhub_v2_0_funcs +ffffffff82ac8050 r mmhub_v2_0_vmhub_funcs +ffffffff82ac8060 r mmhub_client_ids_navi1x +ffffffff82ac8190 r mmhub_client_ids_sienna_cichlid +ffffffff82ac8450 r mmhub_client_ids_beige_goby +ffffffff82ac9000 R mmhub_v2_3_funcs +ffffffff82ac9050 r mmhub_v2_3_vmhub_funcs +ffffffff82ac9060 r mmhub_client_ids_vangogh +ffffffff82aca000 R mmhub_v3_0_funcs +ffffffff82aca050 r mmhub_v3_0_vmhub_funcs +ffffffff82aca060 r mmhub_client_ids_v3_0_0 +ffffffff82acb000 R mmhub_v3_0_1_funcs +ffffffff82acb050 r mmhub_v3_0_1_vmhub_funcs +ffffffff82acb060 r mmhub_client_ids_v3_0_1 +ffffffff82acc000 R mmhub_v3_0_2_funcs +ffffffff82acc050 r mmhub_v3_0_2_vmhub_funcs +ffffffff82acc060 r mmhub_client_ids_v3_0_2 +ffffffff82acd000 R mmhub_v9_4_ras_hw_ops +ffffffff82acd040 R mmhub_v9_4_funcs +ffffffff82acd090 r mmhub_v9_4_edc_cnt_regs +ffffffff82acd330 r mmhub_v9_4_ras_fields +ffffffff82acf3b0 r mmhub_v9_4_err_status_regs +ffffffff82ad0000 r xgpu_ai_mailbox_ack_irq_funcs +ffffffff82ad0010 r xgpu_ai_mailbox_rcv_irq_funcs +ffffffff82ad0020 R xgpu_ai_virt_ops +ffffffff82ad1000 r xgpu_nv_mailbox_ack_irq_funcs +ffffffff82ad1010 r xgpu_nv_mailbox_rcv_irq_funcs +ffffffff82ad1020 R xgpu_nv_virt_ops +ffffffff82ad2000 r xgpu_fiji_mgcg_cgcg_init +ffffffff82ad2240 r xgpu_fiji_golden_settings_a10 +ffffffff82ad2370 r xgpu_fiji_golden_common_all +ffffffff82ad23f0 r xgpu_tonga_mgcg_cgcg_init +ffffffff82ad2810 r xgpu_tonga_golden_settings_a11 +ffffffff82ad29d0 r xgpu_tonga_golden_common_all +ffffffff82ad2a28 r xgpu_vi_mailbox_ack_irq_funcs +ffffffff82ad2a38 r xgpu_vi_mailbox_rcv_irq_funcs +ffffffff82ad2a48 R xgpu_vi_virt_ops +ffffffff82ad3000 r navi10_ih_ip_funcs +ffffffff82ad30a0 R navi10_ih_ip_block +ffffffff82ad30b8 r navi10_ih_funcs +ffffffff82ad30d8 r navi10_ih_self_irq_funcs +ffffffff82ad4000 R nbio_v2_3_hdp_flush_reg +ffffffff82ad4048 R nbio_v2_3_funcs +ffffffff82ad5000 R nbio_v4_3_hdp_flush_reg +ffffffff82ad5048 R nbio_v4_3_funcs +ffffffff82ad5130 R nbio_v4_3_sriov_funcs +ffffffff82ad6000 R nbio_v6_1_hdp_flush_reg +ffffffff82ad6048 R nbio_v6_1_funcs +ffffffff82ad7000 R nbio_v7_0_hdp_flush_reg +ffffffff82ad7048 R nbio_v7_0_funcs +ffffffff82ad8000 R nbio_v7_2_hdp_flush_reg +ffffffff82ad8048 R nbio_v7_2_funcs +ffffffff82ad9000 R nbio_v7_4_hdp_flush_reg +ffffffff82ad9048 R nbio_v7_4_ras_hw_ops +ffffffff82ad9088 R nbio_v7_4_funcs +ffffffff82ad9170 r nbio_v7_4_ras_controller_irq_funcs +ffffffff82ad9180 r nbio_v7_4_ras_err_event_athub_irq_funcs +ffffffff82ada000 R nbio_v7_7_hdp_flush_reg +ffffffff82ada048 R nbio_v7_7_funcs +ffffffff82adb000 r nv_common_ip_funcs +ffffffff82adb0a0 R nv_common_ip_block +ffffffff82adb0b8 r nv_asic_funcs +ffffffff82adb170 r nv_allowed_read_registers +ffffffff82adb2f0 r nv_video_codecs_encode +ffffffff82adb300 r sc_video_codecs_decode +ffffffff82adb310 r yc_video_codecs_decode +ffffffff82adb320 r bg_video_codecs_encode +ffffffff82adb330 r bg_video_codecs_decode +ffffffff82adb340 r nv_video_codecs_decode +ffffffff82adb350 r nv_video_codecs_encode_array +ffffffff82adb380 r sc_video_codecs_decode_array +ffffffff82adb420 r yc_video_codecs_decode_array +ffffffff82adb490 r bg_video_codecs_decode_array +ffffffff82adb4d0 r nv_video_codecs_decode_array +ffffffff82adc000 r psp_v10_0_funcs +ffffffff82add000 r psp_v11_0_funcs +ffffffff82ade000 r psp_v11_0_8_funcs +ffffffff82adf000 r psp_v12_0_funcs +ffffffff82ae0000 r psp_v13_0_funcs +ffffffff82ae1000 r psp_v13_0_4_funcs +ffffffff82ae2000 r psp_v3_1_funcs +ffffffff82ae3000 r sdma_v2_4_ip_funcs +ffffffff82ae30a0 R sdma_v2_4_ip_block +ffffffff82ae30b8 r sdma_v2_4_ring_funcs +ffffffff82ae31d8 r sdma_v2_4_buffer_funcs +ffffffff82ae31f8 r sdma_v2_4_vm_pte_funcs +ffffffff82ae3218 r sdma_v2_4_trap_irq_funcs +ffffffff82ae3228 r sdma_v2_4_illegal_inst_irq_funcs +ffffffff82ae3240 r iceland_mgcg_cgcg_init +ffffffff82ae3260 r golden_settings_iceland_a11 +ffffffff82ae4000 r sdma_v3_0_ip_funcs +ffffffff82ae40a0 R sdma_v3_0_ip_block +ffffffff82ae40b8 R sdma_v3_1_ip_block +ffffffff82ae40d0 r sdma_v3_0_ring_funcs +ffffffff82ae41f0 r sdma_v3_0_buffer_funcs +ffffffff82ae4210 r sdma_v3_0_vm_pte_funcs +ffffffff82ae4230 r sdma_v3_0_trap_irq_funcs +ffffffff82ae4240 r sdma_v3_0_illegal_inst_irq_funcs +ffffffff82ae4250 r fiji_mgcg_cgcg_init +ffffffff82ae4270 r golden_settings_fiji_a10 +ffffffff82ae42d0 r tonga_mgcg_cgcg_init +ffffffff82ae42f0 r golden_settings_tonga_a11 +ffffffff82ae4370 r golden_settings_polaris11_a11 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golden_settings_sdma_4 +ffffffff82ae5890 r golden_settings_sdma_vg10 +ffffffff82ae5940 r golden_settings_sdma_vg12 +ffffffff82ae59f0 r golden_settings_sdma0_4_2_init +ffffffff82ae5a10 r golden_settings_sdma0_4_2 +ffffffff82ae5ca0 r golden_settings_sdma1_4_2 +ffffffff82ae5f30 r golden_settings_sdma_arct +ffffffff82ae6230 r golden_settings_sdma_aldebaran +ffffffff82ae63a0 r golden_settings_sdma_4_1 +ffffffff82ae64b0 r golden_settings_sdma_rv2 +ffffffff82ae64e0 r golden_settings_sdma_rv1 +ffffffff82ae6510 r golden_settings_sdma_4_3 +ffffffff82ae6600 r sdma_v4_0_ras_fields +ffffffff82ae7000 R sdma_v4_4_ras_hw_ops +ffffffff82ae7040 r sdma_v4_4_ras_fields +ffffffff82ae8000 R sdma_v5_0_ip_funcs +ffffffff82ae80a0 R sdma_v5_0_ip_block +ffffffff82ae80b8 r sdma_v5_0_ring_funcs +ffffffff82ae81d8 r sdma_v5_0_buffer_funcs +ffffffff82ae81f8 r sdma_v5_0_vm_pte_funcs +ffffffff82ae8218 r sdma_v5_0_trap_irq_funcs +ffffffff82ae8228 r sdma_v5_0_illegal_inst_irq_funcs +ffffffff82ae8240 r golden_settings_sdma_5 +ffffffff82ae8480 r golden_settings_sdma_nv10 +ffffffff82ae84b0 r golden_settings_sdma_nv14 +ffffffff82ae84e0 r golden_settings_sdma_5_sriov +ffffffff82ae86c0 r golden_settings_sdma_nv12 +ffffffff82ae8750 r golden_settings_sdma_cyan_skillfish +ffffffff82ae9000 R sdma_v5_2_ip_funcs +ffffffff82ae90a0 R sdma_v5_2_ip_block +ffffffff82ae90b8 r sdma_v5_2_ring_funcs +ffffffff82ae91d8 r sdma_v5_2_buffer_funcs +ffffffff82ae91f8 r sdma_v5_2_vm_pte_funcs +ffffffff82ae9218 r sdma_v5_2_trap_irq_funcs +ffffffff82ae9228 r sdma_v5_2_illegal_inst_irq_funcs +ffffffff82aea000 R sdma_v6_0_ip_funcs +ffffffff82aea0a0 R sdma_v6_0_ip_block +ffffffff82aea0b8 r sdma_v6_0_ring_funcs +ffffffff82aea1d8 r sdma_v6_0_buffer_funcs +ffffffff82aea1f8 r sdma_v6_0_vm_pte_funcs +ffffffff82aea218 r sdma_v6_0_trap_irq_funcs +ffffffff82aea228 r sdma_v6_0_illegal_inst_irq_funcs +ffffffff82aeb000 r smu_v11_0_i2c_algo +ffffffff82aeb010 r smu_v11_0_i2c_i2c_lock_ops +ffffffff82aeb028 r smu_v11_0_i2c_control_quirks +ffffffff82aec000 R smuio_v11_0_funcs +ffffffff82aed000 R smuio_v11_0_6_funcs +ffffffff82aee000 R smuio_v13_0_funcs +ffffffff82aef000 R smuio_v13_0_6_funcs +ffffffff82af0000 R smuio_v9_0_funcs +ffffffff82af1000 r soc15_common_ip_funcs +ffffffff82af10a0 R vega10_common_ip_block +ffffffff82af10b8 r soc15_asic_funcs +ffffffff82af1170 r vega20_asic_funcs +ffffffff82af1230 r soc15_allowed_read_registers +ffffffff82af13c0 r vega_video_codecs_encode +ffffffff82af13d0 r vega_video_codecs_decode +ffffffff82af13e0 r rv_video_codecs_decode +ffffffff82af13f0 r rn_video_codecs_decode +ffffffff82af1400 r vega_video_codecs_encode_array +ffffffff82af1430 r vega_video_codecs_decode_array +ffffffff82af14b0 r rv_video_codecs_decode_array +ffffffff82af1540 r rn_video_codecs_decode_array +ffffffff82af2000 r soc21_common_ip_funcs +ffffffff82af20a0 R soc21_common_ip_block +ffffffff82af20b8 r soc21_asic_funcs +ffffffff82af2170 r soc21_allowed_read_registers +ffffffff82af22f0 r vcn_4_0_0_video_codecs_encode_vcn1 +ffffffff82af2300 r vcn_4_0_0_video_codecs_decode_vcn1 +ffffffff82af2310 r vcn_4_0_0_video_codecs_encode_vcn0 +ffffffff82af2320 r vcn_4_0_0_video_codecs_decode_vcn0 +ffffffff82af2330 r vcn_4_0_0_video_codecs_encode_array_vcn1 +ffffffff82af2360 r vcn_4_0_0_video_codecs_decode_array_vcn1 +ffffffff82af23b0 r vcn_4_0_0_video_codecs_encode_array_vcn0 +ffffffff82af23e0 r vcn_4_0_0_video_codecs_decode_array_vcn0 +ffffffff82af3000 r tonga_ih_ip_funcs +ffffffff82af30a0 R tonga_ih_ip_block +ffffffff82af30b8 r tonga_ih_funcs +ffffffff82af4000 R umc_v6_0_funcs +ffffffff82af5000 R umc_v6_1_channel_idx_tbl +ffffffff82af5080 R umc_v6_1_ras_hw_ops +ffffffff82af6000 R umc_v6_7_channel_idx_tbl_second +ffffffff82af6080 R umc_v6_7_channel_idx_tbl_first +ffffffff82af6100 R umc_v6_7_ras_hw_ops +ffffffff82af7000 R umc_v8_10_channelnum_map_colbit_table +ffffffff82af7040 R umc_v8_10_channel_idx_tbl +ffffffff82af70a0 R umc_v8_10_ras_hw_ops +ffffffff82af8000 R umc_v8_7_channel_idx_tbl +ffffffff82af8040 R umc_v8_7_ras_hw_ops +ffffffff82af9000 r uvd_v5_0_ip_funcs +ffffffff82af90a0 R uvd_v5_0_ip_block +ffffffff82af90b8 r uvd_v5_0_ring_funcs +ffffffff82af91d8 r uvd_v5_0_irq_funcs +ffffffff82afa000 r uvd_v6_0_ip_funcs +ffffffff82afa0a0 R uvd_v6_0_ip_block +ffffffff82afa0b8 R uvd_v6_2_ip_block +ffffffff82afa0d0 R uvd_v6_3_ip_block +ffffffff82afa0e8 r uvd_v6_0_ring_vm_funcs +ffffffff82afa208 r uvd_v6_0_ring_phys_funcs +ffffffff82afa328 r uvd_v6_0_enc_ring_vm_funcs +ffffffff82afa448 r uvd_v6_0_irq_funcs +ffffffff82afb000 R uvd_v7_0_ip_funcs +ffffffff82afb0a0 R uvd_v7_0_ip_block +ffffffff82afb0b8 r uvd_v7_0_ring_vm_funcs +ffffffff82afb1d8 r uvd_v7_0_enc_ring_vm_funcs +ffffffff82afb2f8 r uvd_v7_0_irq_funcs +ffffffff82afc000 r vce_v3_0_ip_funcs +ffffffff82afc0a0 R vce_v3_0_ip_block +ffffffff82afc0b8 R vce_v3_1_ip_block +ffffffff82afc0d0 R vce_v3_4_ip_block +ffffffff82afc0e8 r vce_v3_0_ring_vm_funcs +ffffffff82afc208 r vce_v3_0_ring_phys_funcs +ffffffff82afc328 r vce_v3_0_irq_funcs +ffffffff82afd000 R vce_v4_0_ip_funcs +ffffffff82afd0a0 R vce_v4_0_ip_block +ffffffff82afd0b8 r vce_v4_0_ring_vm_funcs +ffffffff82afd1d8 r vce_v4_0_irq_funcs +ffffffff82afe000 r vcn_v1_0_ip_funcs +ffffffff82afe0a0 R vcn_v1_0_ip_block +ffffffff82afe0b8 r vcn_v1_0_dec_ring_vm_funcs +ffffffff82afe1d8 r vcn_v1_0_enc_ring_vm_funcs +ffffffff82afe2f8 r vcn_v1_0_irq_funcs +ffffffff82aff000 r vcn_v2_0_ip_funcs +ffffffff82aff0a0 R vcn_v2_0_ip_block +ffffffff82aff0b8 r vcn_v2_0_dec_ring_vm_funcs +ffffffff82aff1d8 r vcn_v2_0_enc_ring_vm_funcs +ffffffff82aff2f8 r vcn_v2_0_irq_funcs +ffffffff82b00000 r vcn_v2_5_ip_funcs +ffffffff82b000a0 R vcn_v2_5_ip_block +ffffffff82b000b8 r vcn_v2_6_ip_funcs +ffffffff82b00158 R vcn_v2_6_ip_block +ffffffff82b00170 R vcn_v2_6_ras_hw_ops +ffffffff82b001b0 r vcn_v2_5_dec_ring_vm_funcs +ffffffff82b002d0 r vcn_v2_6_dec_ring_vm_funcs +ffffffff82b003f0 r vcn_v2_5_enc_ring_vm_funcs +ffffffff82b00510 r vcn_v2_6_enc_ring_vm_funcs +ffffffff82b00630 r vcn_v2_5_irq_funcs +ffffffff82b01000 r vcn_v3_0_ip_funcs +ffffffff82b010a0 R vcn_v3_0_ip_block +ffffffff82b010b8 r vcn_v3_0_dec_ring_vm_funcs +ffffffff82b011d8 r vcn_v3_0_enc_ring_vm_funcs +ffffffff82b012f8 r vcn_v3_0_irq_funcs +ffffffff82b02000 r vcn_v4_0_ip_funcs +ffffffff82b020a0 R vcn_v4_0_ip_block +ffffffff82b020b8 r vcn_v4_0_unified_ring_vm_funcs +ffffffff82b021d8 r vcn_v4_0_irq_funcs +ffffffff82b03000 R vega10_ih_ip_funcs +ffffffff82b030a0 R vega10_ih_ip_block +ffffffff82b030b8 r vega10_ih_funcs +ffffffff82b030d8 r vega10_ih_self_irq_funcs +ffffffff82b04000 r GC_BASE +ffffffff82b04064 r HDP_BASE +ffffffff82b040c8 r MMHUB_BASE +ffffffff82b0412c r ATHUB_BASE +ffffffff82b04190 r NBIO_BASE +ffffffff82b041f4 r MP0_BASE +ffffffff82b04258 r MP1_BASE +ffffffff82b042bc r VCE_BASE +ffffffff82b04320 r VCN_BASE +ffffffff82b04384 r DF_BASE +ffffffff82b043e8 r DCE_BASE +ffffffff82b0444c r OSSSYS_BASE +ffffffff82b044b0 r SDMA0_BASE +ffffffff82b04514 r SDMA1_BASE +ffffffff82b04578 r SMUIO_BASE +ffffffff82b045dc r PWR_BASE +ffffffff82b04640 r NBIF_BASE +ffffffff82b046a4 r THM_BASE +ffffffff82b04708 r CLK_BASE +ffffffff82b05000 R vega20_ih_ip_funcs +ffffffff82b050a0 R vega20_ih_ip_block +ffffffff82b050b8 r vega20_ih_funcs +ffffffff82b050d8 r vega20_ih_self_irq_funcs +ffffffff82b06000 r GC_BASE +ffffffff82b06090 r HDP_BASE +ffffffff82b06120 r MMHUB_BASE +ffffffff82b061b0 r ATHUB_BASE +ffffffff82b06240 r NBIO_BASE +ffffffff82b062d0 r MP0_BASE +ffffffff82b06360 r MP1_BASE +ffffffff82b063f0 r UVD_BASE +ffffffff82b06480 r VCE_BASE +ffffffff82b06510 r DF_BASE +ffffffff82b065a0 r DCE_BASE +ffffffff82b06630 r OSSSYS_BASE +ffffffff82b066c0 r SDMA0_BASE +ffffffff82b06750 r SDMA1_BASE +ffffffff82b067e0 r SMUIO_BASE +ffffffff82b06870 r THM_BASE +ffffffff82b06900 r CLK_BASE +ffffffff82b06990 r UMC_BASE +ffffffff82b06a20 r RSMU_BASE +ffffffff82b07000 r vi_common_ip_block +ffffffff82b07018 r vi_common_ip_funcs +ffffffff82b070b8 r vi_asic_funcs +ffffffff82b07170 r vi_allowed_read_registers +ffffffff82b073d0 r topaz_video_codecs_encode +ffffffff82b073e0 r topaz_video_codecs_decode +ffffffff82b073f0 r tonga_video_codecs_encode +ffffffff82b07400 r tonga_video_codecs_decode +ffffffff82b07410 r polaris_video_codecs_encode +ffffffff82b07420 r cz_video_codecs_decode +ffffffff82b07430 r tonga_video_codecs_encode_array +ffffffff82b07450 r tonga_video_codecs_decode_array +ffffffff82b074a0 r polaris_video_codecs_encode_array +ffffffff82b074d0 r cz_video_codecs_decode_array +ffffffff82b07550 r iceland_mgcg_cgcg_init +ffffffff82b07590 r fiji_mgcg_cgcg_init +ffffffff82b075f0 r tonga_mgcg_cgcg_init +ffffffff82b07650 r cz_mgcg_cgcg_init +ffffffff82b07690 r stoney_mgcg_cgcg_init +ffffffff82b08000 r amdgpu_dm_funcs +ffffffff82b080a0 R dm_ip_block +ffffffff82b080b8 R amdgpu_dm_encoder_helper_funcs +ffffffff82b08120 r dm_display_funcs +ffffffff82b08180 r hpd_disconnect_quirk_table +ffffffff82b08ef0 r amdgpu_dm_mode_funcs +ffffffff82b08f38 r amdgpu_dm_encoder_funcs +ffffffff82b08f58 r amdgpu_dm_connector_funcs +ffffffff82b08fd0 r amdgpu_dm_connector_helper_funcs +ffffffff82b09020 r amdgpu_dm_i2c_algo +ffffffff82b091f0 r add_fs_modes.common_rates +ffffffff82b09220 r amdgpu_dm_backlight_ops +ffffffff82b0a000 r amdgpu_dm_crtc_funcs +ffffffff82b0a0c0 r amdgpu_dm_crtc_helper_funcs +ffffffff82b0b000 r dm_dtn_log_begin.msg +ffffffff82b0b00d r dm_dtn_log_end.msg +ffffffff82b0b018 r SYNAPTICS_DEVICE_ID +ffffffff82b0c000 r dm_crtc_irq_funcs +ffffffff82b0c010 r dm_vline0_irq_funcs +ffffffff82b0c020 r dm_dmub_outbox_irq_funcs +ffffffff82b0c030 r dm_vupdate_irq_funcs +ffffffff82b0c040 r dm_dmub_trace_irq_funcs +ffffffff82b0c050 r dm_pageflip_irq_funcs +ffffffff82b0c060 r dm_hpd_irq_funcs +ffffffff82b0d000 r amdgpu_dm_encoder_funcs +ffffffff82b0d020 r dm_mst_cbs +ffffffff82b0d030 r dm_dp_mst_connector_funcs +ffffffff82b0d0a8 r dm_dp_mst_connector_helper_funcs +ffffffff82b0e000 r dm_plane_funcs +ffffffff82b0e068 r dm_plane_helper_funcs ffffffff82b10000 r vbios_funcs -ffffffff82b15000 r command_table_helper_funcs +ffffffff82b11000 r vbios_funcs ffffffff82b16000 r command_table_helper_funcs ffffffff82b17000 r command_table_helper_funcs ffffffff82b18000 r command_table_helper_funcs -ffffffff82b19000 r dce80_max_clks_by_state -ffffffff82b19028 r disp_clk_regs -ffffffff82b1907c r disp_clk_shift -ffffffff82b19088 r disp_clk_mask -ffffffff82b1a000 r dce110_max_clks_by_state +ffffffff82b19000 r command_table_helper_funcs +ffffffff82b1a000 r dce80_max_clks_by_state ffffffff82b1a028 r disp_clk_regs ffffffff82b1a07c r disp_clk_shift ffffffff82b1a088 r disp_clk_mask -ffffffff82b1b000 r dce112_max_clks_by_state +ffffffff82b1b000 r dce110_max_clks_by_state ffffffff82b1b028 r disp_clk_regs ffffffff82b1b07c r disp_clk_shift ffffffff82b1b088 r disp_clk_mask -ffffffff82b1c000 r dce120_max_clks_by_state -ffffffff82b1d000 r clk_mgr_regs -ffffffff82b1d054 r clk_mgr_shift -ffffffff82b1d060 r clk_mgr_mask +ffffffff82b1c000 r dce112_max_clks_by_state +ffffffff82b1c028 r disp_clk_regs +ffffffff82b1c07c r disp_clk_shift +ffffffff82b1c088 r disp_clk_mask +ffffffff82b1d000 r dce120_max_clks_by_state ffffffff82b1e000 r clk_mgr_regs ffffffff82b1e054 r clk_mgr_shift ffffffff82b1e060 r clk_mgr_mask ffffffff82b1f000 r clk_mgr_regs ffffffff82b1f054 r clk_mgr_shift ffffffff82b1f060 r clk_mgr_mask -ffffffff82b20000 r lpddr5_wm_table -ffffffff82b200c0 r ddr5_wm_table +ffffffff82b20000 r clk_mgr_regs +ffffffff82b20054 r clk_mgr_shift +ffffffff82b20060 r clk_mgr_mask ffffffff82b21000 r lpddr5_wm_table ffffffff82b210c0 r ddr5_wm_table ffffffff82b22000 r lpddr5_wm_table ffffffff82b220c0 r ddr5_wm_table ffffffff82b23000 r lpddr5_wm_table -ffffffff82b230c0 r ddr4_wm_table -ffffffff82b24000 r clk_mgr_regs_dcn321 -ffffffff82b24054 r clk_mgr_shift_dcn321 -ffffffff82b24060 r clk_mgr_mask_dcn321 -ffffffff82b24084 r clk_mgr_regs_dcn32 -ffffffff82b240d8 r clk_mgr_shift_dcn32 -ffffffff82b240e4 r clk_mgr_mask_dcn32 -ffffffff82b25000 r DC_BUILD_ID -ffffffff82b27000 r output_csc_matrix -ffffffff82b270e0 r black_color_format -ffffffff82b28000 r DP_SINK_BRANCH_DEV_NAME_7580 -ffffffff82b29000 r DP_VGA_DONGLE_BRANCH_DEV_NAME -ffffffff82b29006 r DP_DVI_CONVERTER_ID_4 -ffffffff82b2900d r DP_DVI_CONVERTER_ID_5 -ffffffff82b2a000 r DP_VGA_LVDS_CONVERTER_ID_2 -ffffffff82b2a007 r DP_VGA_LVDS_CONVERTER_ID_3 -ffffffff82b2a010 r dp_lt_fallbacks -ffffffff82b2b000 r mandatory_dpcd_partitions -ffffffff82b2d000 r dce_funcs -ffffffff82b2e000 r funcs -ffffffff82b2f000 R video_optimized_pixel_rates -ffffffff82b2f1b0 r dce110_clk_src_funcs -ffffffff82b2f1d8 r dce112_clk_src_funcs -ffffffff82b2f200 r dcn20_clk_src_funcs -ffffffff82b2f228 r dcn3_clk_src_funcs -ffffffff82b2f250 r dcn31_clk_src_funcs -ffffffff82b30000 r dce_funcs -ffffffff82b30068 r dcn10_funcs -ffffffff82b300d0 r dcn20_funcs -ffffffff82b30138 r dcn21_funcs -ffffffff82b31000 r dce_ipp_funcs -ffffffff82b32000 r dce110_lnk_enc_funcs -ffffffff82b33000 r dce_mi_funcs -ffffffff82b33090 r dce112_mi_funcs -ffffffff82b33120 r dce120_mi_funcs -ffffffff82b331b0 r pte_settings -ffffffff82b34000 r funcs -ffffffff82b35000 r dce_link_panel_cntl_funcs -ffffffff82b36000 r filter_3tap_16p_upscale -ffffffff82b36040 r filter_3tap_16p_116 -ffffffff82b36080 r filter_3tap_16p_149 -ffffffff82b360c0 r filter_3tap_16p_183 -ffffffff82b36100 r filter_3tap_64p_upscale -ffffffff82b361d0 r filter_3tap_64p_116 -ffffffff82b362a0 r filter_3tap_64p_149 -ffffffff82b36370 r filter_3tap_64p_183 -ffffffff82b36440 r filter_4tap_16p_upscale -ffffffff82b36490 r filter_4tap_16p_116 -ffffffff82b364e0 r filter_4tap_16p_149 -ffffffff82b36530 r filter_4tap_16p_183 -ffffffff82b36580 r filter_4tap_64p_upscale -ffffffff82b36690 r filter_4tap_64p_116 -ffffffff82b367a0 r filter_4tap_64p_149 -ffffffff82b368b0 r filter_4tap_64p_183 -ffffffff82b369c0 r filter_5tap_64p_upscale -ffffffff82b36b10 r filter_5tap_64p_116 -ffffffff82b36c60 r filter_5tap_64p_149 -ffffffff82b36db0 r filter_5tap_64p_183 -ffffffff82b36f00 r filter_6tap_64p_upscale -ffffffff82b37090 r filter_6tap_64p_116 -ffffffff82b37220 r filter_6tap_64p_149 -ffffffff82b373b0 r filter_6tap_64p_183 -ffffffff82b37540 r filter_7tap_64p_upscale -ffffffff82b37710 r filter_7tap_64p_116 -ffffffff82b378e0 r filter_7tap_64p_149 -ffffffff82b37ab0 r filter_7tap_64p_183 -ffffffff82b37c80 r filter_8tap_64p_upscale -ffffffff82b37e90 r filter_8tap_64p_116 -ffffffff82b380a0 r filter_8tap_64p_149 -ffffffff82b382b0 r filter_8tap_64p_183 -ffffffff82b384c0 r filter_2tap_16p -ffffffff82b384f0 r filter_2tap_64p -ffffffff82b39000 r audio_clock_info_table_48bpc -ffffffff82b39190 r audio_clock_info_table_36bpc -ffffffff82b39320 r audio_clock_info_table -ffffffff82b394e0 r dce110_str_enc_funcs -ffffffff82b3a000 r global_color_matrix -ffffffff82b3a0a8 r dce_transform_funcs -ffffffff82b3b000 r abm_funcs -ffffffff82b3c000 r psr_funcs -ffffffff82b3c040 r DP_SINK_DEVICE_STR_ID_1 -ffffffff82b3c045 r DP_SINK_DEVICE_STR_ID_2 -ffffffff82b3d000 r reg_offsets -ffffffff82b3e000 r bios_regs -ffffffff82b3e008 r res_cap -ffffffff82b3e050 r clk_src_regs -ffffffff82b3e14c r dmcu_regs -ffffffff82b3e1a8 r dmcu_shift -ffffffff82b3e1bc r dmcu_mask -ffffffff82b3e208 r abm_regs -ffffffff82b3e248 r abm_shift -ffffffff82b3e25c r abm_mask -ffffffff82b3e2b0 r dce100_tg_offsets -ffffffff82b3e2f8 r plane_cap -ffffffff82b3e328 r res_create_funcs -ffffffff82b3e358 r dce100_res_pool_funcs -ffffffff82b3e440 r panel_cntl_regs -ffffffff82b3e460 r panel_cntl_shift -ffffffff82b3e470 r panel_cntl_mask -ffffffff82b3e4b0 r link_enc_regs -ffffffff82b3e870 r link_enc_aux_regs -ffffffff82b3e8c0 r link_enc_hpd_regs -ffffffff82b3e8d8 r link_enc_feature -ffffffff82b3e8e8 r cs_shift -ffffffff82b3e8f4 r cs_mask -ffffffff82b3e920 r mi_regs -ffffffff82b3ec38 r mi_shifts -ffffffff82b3ec80 r mi_masks -ffffffff82b3eda0 r ipp_regs -ffffffff82b3ef98 r ipp_shift -ffffffff82b3efc0 r ipp_mask -ffffffff82b3f060 r xfm_regs -ffffffff82b3f600 r xfm_shift -ffffffff82b3f660 r xfm_mask -ffffffff82b3f7e0 r opp_regs -ffffffff82b3f930 r opp_shift -ffffffff82b3f95c r opp_mask -ffffffff82b3fa10 r aux_engine_regs -ffffffff82b3fb00 r aux_mask -ffffffff82b3fb60 r aux_shift -ffffffff82b3fb80 r i2c_hw_regs -ffffffff82b3fcd0 r i2c_shifts -ffffffff82b3fcfc r i2c_masks -ffffffff82b3fda0 r audio_regs -ffffffff82b3fed4 r audio_shift -ffffffff82b3feec r audio_mask -ffffffff82b3ff30 r stream_enc_regs -ffffffff82b405dc r se_shift -ffffffff82b40660 r se_mask -ffffffff82b40864 r hwseq_reg -ffffffff82b40a80 r hwseq_shift -ffffffff82b40b00 r hwseq_mask -ffffffff82b41000 r reg_offsets -ffffffff82b41018 r dce110_compressor_funcs -ffffffff82b42000 r dce110_funcs -ffffffff82b422c0 r dce110_private_funcs -ffffffff82b43000 r dce110_mem_input_v_funcs -ffffffff82b43090 r dvmm_Hw_Setting_1DTiling -ffffffff82b43120 r dvmm_Hw_Setting_2DTiling -ffffffff82b431b0 r dvmm_Hw_Setting_Linear -ffffffff82b44000 r global_color_matrix -ffffffff82b440b0 r input_csc_matrix -ffffffff82b45000 r funcs -ffffffff82b46000 r bios_regs -ffffffff82b46008 r dce110_res_pool_funcs -ffffffff82b460f0 r clk_src_regs -ffffffff82b461ec r dmcu_regs -ffffffff82b46248 r dmcu_shift -ffffffff82b4625c r dmcu_mask -ffffffff82b462a8 r abm_regs -ffffffff82b462e8 r abm_shift -ffffffff82b462fc r abm_mask -ffffffff82b46350 r dce110_tg_offsets -ffffffff82b46398 r res_create_funcs -ffffffff82b463c8 r plane_cap -ffffffff82b463f4 r underlay_plane_cap -ffffffff82b46420 r stoney_resource_cap -ffffffff82b4645c r carrizo_resource_cap -ffffffff82b464a0 r panel_cntl_regs -ffffffff82b464c0 r panel_cntl_shift -ffffffff82b464d0 r panel_cntl_mask -ffffffff82b46510 r link_enc_regs -ffffffff82b468d0 r link_enc_aux_regs -ffffffff82b46920 r link_enc_hpd_regs -ffffffff82b46938 r link_enc_feature -ffffffff82b46948 r cs_shift -ffffffff82b46954 r cs_mask -ffffffff82b46980 r mi_regs -ffffffff82b46b0c r mi_shifts -ffffffff82b46b54 r mi_masks -ffffffff82b46c70 r ipp_regs -ffffffff82b46d6c r ipp_shift -ffffffff82b46d94 r ipp_mask -ffffffff82b46e30 r xfm_regs -ffffffff82b47100 r xfm_shift -ffffffff82b47160 r xfm_mask -ffffffff82b472e0 r opp_regs -ffffffff82b47430 r opp_shift -ffffffff82b4745c r opp_mask -ffffffff82b47510 r aux_engine_regs -ffffffff82b47600 r aux_mask -ffffffff82b47660 r aux_shift -ffffffff82b47680 r i2c_hw_regs -ffffffff82b477d0 r i2c_shifts -ffffffff82b477fc r i2c_masks -ffffffff82b478a0 r audio_regs -ffffffff82b479d4 r audio_shift -ffffffff82b479ec r audio_mask -ffffffff82b47a30 r stream_enc_regs -ffffffff82b47d0c r se_shift -ffffffff82b47d90 r se_mask -ffffffff82b47f94 r hwseq_stoney_reg -ffffffff82b481b0 r hwseq_cz_reg -ffffffff82b483cc r hwseq_shift -ffffffff82b4844c r hwseq_mask -ffffffff82b49000 r dce110_tg_funcs -ffffffff82b4a000 r dce110_tg_v_funcs -ffffffff82b4b000 r dce110_xfmv_funcs -ffffffff82b4c000 r reg_offsets +ffffffff82b230c0 r ddr5_wm_table +ffffffff82b24000 r lpddr5_wm_table +ffffffff82b240c0 r ddr4_wm_table +ffffffff82b25000 r clk_mgr_regs_dcn321 +ffffffff82b25054 r clk_mgr_shift_dcn321 +ffffffff82b25060 r clk_mgr_mask_dcn321 +ffffffff82b25084 r clk_mgr_regs_dcn32 +ffffffff82b250d8 r clk_mgr_shift_dcn32 +ffffffff82b250e4 r clk_mgr_mask_dcn32 +ffffffff82b26000 r DC_BUILD_ID +ffffffff82b28000 r output_csc_matrix +ffffffff82b280e0 r black_color_format +ffffffff82b29000 r DP_SINK_BRANCH_DEV_NAME_7580 +ffffffff82b2a000 r DP_VGA_DONGLE_BRANCH_DEV_NAME +ffffffff82b2a006 r DP_DVI_CONVERTER_ID_4 +ffffffff82b2a00d r DP_DVI_CONVERTER_ID_5 +ffffffff82b2b000 r DP_VGA_LVDS_CONVERTER_ID_2 +ffffffff82b2b007 r DP_VGA_LVDS_CONVERTER_ID_3 +ffffffff82b2b010 r dp_lt_fallbacks +ffffffff82b2c000 r mandatory_dpcd_partitions +ffffffff82b2e000 r dce_funcs +ffffffff82b2f000 r funcs +ffffffff82b30000 R video_optimized_pixel_rates +ffffffff82b301b0 r dce110_clk_src_funcs +ffffffff82b301d8 r dce112_clk_src_funcs +ffffffff82b30200 r dcn20_clk_src_funcs +ffffffff82b30228 r dcn3_clk_src_funcs +ffffffff82b30250 r dcn31_clk_src_funcs +ffffffff82b31000 r dce_funcs +ffffffff82b31068 r dcn10_funcs +ffffffff82b310d0 r dcn20_funcs +ffffffff82b31138 r dcn21_funcs +ffffffff82b32000 r dce_ipp_funcs +ffffffff82b33000 r dce110_lnk_enc_funcs +ffffffff82b34000 r dce_mi_funcs +ffffffff82b34090 r dce112_mi_funcs +ffffffff82b34120 r dce120_mi_funcs +ffffffff82b341b0 r pte_settings +ffffffff82b35000 r funcs +ffffffff82b36000 r dce_link_panel_cntl_funcs +ffffffff82b37000 r filter_3tap_16p_upscale +ffffffff82b37040 r filter_3tap_16p_116 +ffffffff82b37080 r filter_3tap_16p_149 +ffffffff82b370c0 r filter_3tap_16p_183 +ffffffff82b37100 r filter_3tap_64p_upscale +ffffffff82b371d0 r filter_3tap_64p_116 +ffffffff82b372a0 r filter_3tap_64p_149 +ffffffff82b37370 r filter_3tap_64p_183 +ffffffff82b37440 r filter_4tap_16p_upscale +ffffffff82b37490 r filter_4tap_16p_116 +ffffffff82b374e0 r filter_4tap_16p_149 +ffffffff82b37530 r filter_4tap_16p_183 +ffffffff82b37580 r filter_4tap_64p_upscale +ffffffff82b37690 r filter_4tap_64p_116 +ffffffff82b377a0 r filter_4tap_64p_149 +ffffffff82b378b0 r filter_4tap_64p_183 +ffffffff82b379c0 r filter_5tap_64p_upscale +ffffffff82b37b10 r filter_5tap_64p_116 +ffffffff82b37c60 r filter_5tap_64p_149 +ffffffff82b37db0 r filter_5tap_64p_183 +ffffffff82b37f00 r filter_6tap_64p_upscale +ffffffff82b38090 r filter_6tap_64p_116 +ffffffff82b38220 r filter_6tap_64p_149 +ffffffff82b383b0 r filter_6tap_64p_183 +ffffffff82b38540 r filter_7tap_64p_upscale +ffffffff82b38710 r filter_7tap_64p_116 +ffffffff82b388e0 r filter_7tap_64p_149 +ffffffff82b38ab0 r filter_7tap_64p_183 +ffffffff82b38c80 r filter_8tap_64p_upscale +ffffffff82b38e90 r filter_8tap_64p_116 +ffffffff82b390a0 r filter_8tap_64p_149 +ffffffff82b392b0 r filter_8tap_64p_183 +ffffffff82b394c0 r filter_2tap_16p +ffffffff82b394f0 r filter_2tap_64p +ffffffff82b3a000 r audio_clock_info_table_48bpc +ffffffff82b3a190 r audio_clock_info_table_36bpc +ffffffff82b3a320 r audio_clock_info_table +ffffffff82b3a4e0 r dce110_str_enc_funcs +ffffffff82b3b000 r global_color_matrix +ffffffff82b3b0a8 r dce_transform_funcs +ffffffff82b3c000 r abm_funcs +ffffffff82b3d000 r psr_funcs +ffffffff82b3d040 r DP_SINK_DEVICE_STR_ID_1 +ffffffff82b3d045 r DP_SINK_DEVICE_STR_ID_2 +ffffffff82b3e000 r reg_offsets +ffffffff82b3f000 r bios_regs +ffffffff82b3f008 r res_cap +ffffffff82b3f050 r clk_src_regs +ffffffff82b3f14c r dmcu_regs +ffffffff82b3f1a8 r dmcu_shift +ffffffff82b3f1bc r dmcu_mask +ffffffff82b3f208 r abm_regs +ffffffff82b3f248 r abm_shift +ffffffff82b3f25c r abm_mask +ffffffff82b3f2b0 r dce100_tg_offsets +ffffffff82b3f2f8 r plane_cap +ffffffff82b3f328 r res_create_funcs +ffffffff82b3f358 r dce100_res_pool_funcs +ffffffff82b3f440 r panel_cntl_regs +ffffffff82b3f460 r panel_cntl_shift +ffffffff82b3f470 r panel_cntl_mask +ffffffff82b3f4b0 r link_enc_regs +ffffffff82b3f870 r link_enc_aux_regs +ffffffff82b3f8c0 r link_enc_hpd_regs +ffffffff82b3f8d8 r link_enc_feature +ffffffff82b3f8e8 r cs_shift +ffffffff82b3f8f4 r cs_mask +ffffffff82b3f920 r mi_regs +ffffffff82b3fc38 r mi_shifts +ffffffff82b3fc80 r mi_masks +ffffffff82b3fda0 r ipp_regs +ffffffff82b3ff98 r ipp_shift +ffffffff82b3ffc0 r ipp_mask +ffffffff82b40060 r xfm_regs +ffffffff82b40600 r xfm_shift +ffffffff82b40660 r xfm_mask +ffffffff82b407e0 r opp_regs +ffffffff82b40930 r opp_shift +ffffffff82b4095c r opp_mask +ffffffff82b40a10 r aux_engine_regs +ffffffff82b40b00 r aux_mask +ffffffff82b40b60 r aux_shift +ffffffff82b40b80 r i2c_hw_regs +ffffffff82b40cd0 r i2c_shifts +ffffffff82b40cfc r i2c_masks +ffffffff82b40da0 r audio_regs +ffffffff82b40ed4 r audio_shift +ffffffff82b40eec r audio_mask +ffffffff82b40f30 r stream_enc_regs +ffffffff82b415dc r se_shift +ffffffff82b41660 r se_mask +ffffffff82b41864 r hwseq_reg +ffffffff82b41a80 r hwseq_shift +ffffffff82b41b00 r hwseq_mask +ffffffff82b42000 r reg_offsets +ffffffff82b42018 r dce110_compressor_funcs +ffffffff82b43000 r dce110_funcs +ffffffff82b432c0 r dce110_private_funcs +ffffffff82b44000 r dce110_mem_input_v_funcs +ffffffff82b44090 r dvmm_Hw_Setting_1DTiling +ffffffff82b44120 r dvmm_Hw_Setting_2DTiling +ffffffff82b441b0 r dvmm_Hw_Setting_Linear +ffffffff82b45000 r global_color_matrix +ffffffff82b450b0 r input_csc_matrix +ffffffff82b46000 r funcs +ffffffff82b47000 r bios_regs +ffffffff82b47008 r dce110_res_pool_funcs +ffffffff82b470f0 r clk_src_regs +ffffffff82b471ec r dmcu_regs +ffffffff82b47248 r dmcu_shift +ffffffff82b4725c r dmcu_mask +ffffffff82b472a8 r abm_regs +ffffffff82b472e8 r abm_shift +ffffffff82b472fc r abm_mask +ffffffff82b47350 r dce110_tg_offsets +ffffffff82b47398 r res_create_funcs +ffffffff82b473c8 r plane_cap +ffffffff82b473f4 r underlay_plane_cap +ffffffff82b47420 r stoney_resource_cap +ffffffff82b4745c r carrizo_resource_cap +ffffffff82b474a0 r panel_cntl_regs +ffffffff82b474c0 r panel_cntl_shift +ffffffff82b474d0 r panel_cntl_mask +ffffffff82b47510 r link_enc_regs +ffffffff82b478d0 r link_enc_aux_regs +ffffffff82b47920 r link_enc_hpd_regs +ffffffff82b47938 r link_enc_feature +ffffffff82b47948 r cs_shift +ffffffff82b47954 r cs_mask +ffffffff82b47980 r mi_regs +ffffffff82b47b0c r mi_shifts +ffffffff82b47b54 r mi_masks +ffffffff82b47c70 r ipp_regs +ffffffff82b47d6c r ipp_shift +ffffffff82b47d94 r ipp_mask +ffffffff82b47e30 r xfm_regs +ffffffff82b48100 r xfm_shift +ffffffff82b48160 r xfm_mask +ffffffff82b482e0 r opp_regs +ffffffff82b48430 r opp_shift +ffffffff82b4845c r opp_mask +ffffffff82b48510 r aux_engine_regs +ffffffff82b48600 r aux_mask +ffffffff82b48660 r aux_shift +ffffffff82b48680 r i2c_hw_regs +ffffffff82b487d0 r i2c_shifts +ffffffff82b487fc r i2c_masks +ffffffff82b488a0 r audio_regs +ffffffff82b489d4 r audio_shift +ffffffff82b489ec r audio_mask +ffffffff82b48a30 r stream_enc_regs +ffffffff82b48d0c r se_shift +ffffffff82b48d90 r se_mask +ffffffff82b48f94 r hwseq_stoney_reg +ffffffff82b491b0 r hwseq_cz_reg +ffffffff82b493cc r hwseq_shift +ffffffff82b4944c r hwseq_mask +ffffffff82b4a000 r dce110_tg_funcs +ffffffff82b4b000 r dce110_tg_v_funcs +ffffffff82b4c000 r dce110_xfmv_funcs ffffffff82b4d000 r reg_offsets -ffffffff82b4e000 r bios_regs -ffffffff82b4e010 r clk_src_regs -ffffffff82b4e208 r dmcu_regs -ffffffff82b4e264 r dmcu_shift -ffffffff82b4e278 r dmcu_mask -ffffffff82b4e2c4 r abm_regs -ffffffff82b4e304 r abm_shift -ffffffff82b4e318 r abm_mask -ffffffff82b4e360 r dce112_tg_offsets -ffffffff82b4e3a8 r res_create_funcs -ffffffff82b4e3d8 r plane_cap -ffffffff82b4e404 r polaris_11_resource_cap -ffffffff82b4e440 r polaris_10_resource_cap -ffffffff82b4e480 r dce112_res_pool_funcs -ffffffff82b4e560 r panel_cntl_regs -ffffffff82b4e580 r panel_cntl_shift -ffffffff82b4e590 r panel_cntl_mask -ffffffff82b4e5d0 r link_enc_regs -ffffffff82b4e990 r link_enc_aux_regs -ffffffff82b4e9e0 r link_enc_hpd_regs -ffffffff82b4e9f8 r link_enc_feature -ffffffff82b4ea08 r cs_shift -ffffffff82b4ea14 r cs_mask -ffffffff82b4ea40 r mi_regs -ffffffff82b4ed58 r mi_shifts -ffffffff82b4eda0 r mi_masks -ffffffff82b4eec0 r ipp_regs -ffffffff82b4f0b8 r ipp_shift -ffffffff82b4f0e0 r ipp_mask -ffffffff82b4f180 r xfm_regs -ffffffff82b4f720 r xfm_shift -ffffffff82b4f780 r xfm_mask -ffffffff82b4f900 r opp_regs -ffffffff82b4fa50 r opp_shift -ffffffff82b4fa7c r opp_mask -ffffffff82b4fb30 r aux_engine_regs -ffffffff82b4fc20 r aux_mask -ffffffff82b4fc80 r aux_shift -ffffffff82b4fca0 r i2c_hw_regs -ffffffff82b4fdf0 r i2c_shifts -ffffffff82b4fe1c r i2c_masks -ffffffff82b4fec0 r audio_regs -ffffffff82b4ffc8 r audio_shift -ffffffff82b4ffe0 r audio_mask -ffffffff82b50020 r stream_enc_regs -ffffffff82b505d8 r se_shift -ffffffff82b5065c r se_mask -ffffffff82b50860 r hwseq_reg -ffffffff82b50a7c r hwseq_shift -ffffffff82b50afc r hwseq_mask -ffffffff82b51000 r bios_regs -ffffffff82b51008 r res_cap -ffffffff82b51048 r dce120_res_pool_funcs -ffffffff82b51128 r debug_defaults -ffffffff82b512a0 r clk_src_regs -ffffffff82b51498 r dmcu_regs -ffffffff82b514f4 r dmcu_shift -ffffffff82b51508 r dmcu_mask -ffffffff82b51554 r abm_regs -ffffffff82b51594 r abm_shift -ffffffff82b515a8 r abm_mask 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abm_mask -ffffffff82b67618 r res_create_funcs -ffffffff82b67648 r res_create_maximus_funcs -ffffffff82b67678 r plane_cap -ffffffff82b676a8 r dcn10_res_pool_funcs -ffffffff82b67790 r panel_cntl_regs -ffffffff82b677b0 r panel_cntl_shift -ffffffff82b677c0 r panel_cntl_mask -ffffffff82b67800 r link_enc_regs -ffffffff82b67d10 r link_enc_aux_regs -ffffffff82b67d50 r link_enc_hpd_regs -ffffffff82b67d60 r le_shift -ffffffff82b67e50 r le_mask -ffffffff82b68208 r link_enc_feature -ffffffff82b68218 r cs_shift -ffffffff82b68224 r cs_mask -ffffffff82b68250 r hubp_regs -ffffffff82b68900 r hubp_shift -ffffffff82b689c4 r hubp_mask -ffffffff82b68cd0 r ipp_regs -ffffffff82b68db0 r ipp_shift -ffffffff82b68dcc r ipp_mask -ffffffff82b68e40 r tf_regs -ffffffff82b69da0 r tf_shift -ffffffff82b6a008 r tf_mask -ffffffff82b6a9a0 r opp_regs -ffffffff82b6aa70 r opp_shift -ffffffff82b6aa90 r opp_mask -ffffffff82b6ab10 r tg_regs -ffffffff82b6b010 r tg_shift -ffffffff82b6b0d0 r tg_mask -ffffffff82b6b3d0 r aux_engine_regs -ffffffff82b6b4c0 r aux_mask -ffffffff82b6b520 r aux_shift -ffffffff82b6b540 r i2c_hw_regs -ffffffff82b6b690 r i2c_shifts -ffffffff82b6b6bc r i2c_masks -ffffffff82b6b760 r mpc_regs -ffffffff82b6b880 r mpc_shift -ffffffff82b6b898 r mpc_mask -ffffffff82b6b8f4 r hubbub_reg -ffffffff82b6ba68 r hubbub_shift -ffffffff82b6baf0 r hubbub_mask -ffffffff82b6bd10 r audio_regs -ffffffff82b6bdc0 r audio_shift -ffffffff82b6bdd8 r audio_mask -ffffffff82b6be20 r stream_enc_regs -ffffffff82b6c370 r se_shift -ffffffff82b6c44c r se_mask -ffffffff82b6c7b8 r hwseq_reg -ffffffff82b6c9d4 r hwseq_shift -ffffffff82b6ca54 r hwseq_mask -ffffffff82b6d000 r audio_clock_info_table_48bpc -ffffffff82b6d190 r audio_clock_info_table_36bpc -ffffffff82b6d320 r audio_clock_info_table -ffffffff82b6d4e0 r dcn10_str_enc_funcs -ffffffff82b6e000 r dccg2_funcs -ffffffff82b70000 r dpp_input_csc_matrix -ffffffff82b71000 R dcn20_dsc_funcs -ffffffff82b72000 R dcn20_dwbc_funcs -ffffffff82b73000 r filter_12tap_16p_upscale -ffffffff82b730e0 r filter_12tap_16p_117 -ffffffff82b731c0 r filter_12tap_16p_150 -ffffffff82b732a0 r filter_12tap_16p_183 -ffffffff82b73380 r filter_11tap_16p_upscale -ffffffff82b73450 r filter_11tap_16p_117 -ffffffff82b73520 r filter_11tap_16p_150 -ffffffff82b735f0 r filter_11tap_16p_183 -ffffffff82b736c0 r filter_10tap_16p_upscale -ffffffff82b73780 r filter_10tap_16p_117 -ffffffff82b73840 r filter_10tap_16p_150 -ffffffff82b73900 r filter_10tap_16p_183 -ffffffff82b739c0 r filter_9tap_16p_upscale -ffffffff82b73a70 r filter_9tap_16p_117 -ffffffff82b73b20 r filter_9tap_16p_150 -ffffffff82b73bd0 r filter_9tap_16p_183 -ffffffff82b73c80 r filter_8tap_16p_upscale -ffffffff82b73d10 r filter_8tap_16p_117 -ffffffff82b73da0 r filter_8tap_16p_150 -ffffffff82b73e30 r filter_8tap_16p_183 -ffffffff82b73ec0 r filter_7tap_16p_upscale -ffffffff82b73f40 r filter_7tap_16p_117 -ffffffff82b73fc0 r filter_7tap_16p_150 -ffffffff82b74040 r filter_7tap_16p_183 -ffffffff82b740c0 r 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qp_table_420_8bpc_min -ffffffff82c31e00 R qp_table_422_8bpc_min -ffffffff82c32340 R qp_table_422_10bpc_max -ffffffff82c32a80 R qp_table_420_10bpc_max -ffffffff82c33040 R qp_table_420_10bpc_min -ffffffff82c33600 R qp_table_444_10bpc_max -ffffffff82c34240 R qp_table_422_8bpc_max -ffffffff82c36000 r funcs -ffffffff82c36050 r hpd_regs -ffffffff82c361a0 r hpd_shift -ffffffff82c361b0 r hpd_mask -ffffffff82c361c0 r ddc_data_regs -ffffffff82c363a0 r ddc_clk_regs -ffffffff82c36580 r ddc_shift -ffffffff82c365a8 r ddc_mask +ffffffff82b4e000 r reg_offsets +ffffffff82b4f000 r bios_regs +ffffffff82b4f010 r clk_src_regs +ffffffff82b4f208 r dmcu_regs +ffffffff82b4f264 r dmcu_shift +ffffffff82b4f278 r dmcu_mask +ffffffff82b4f2c4 r abm_regs +ffffffff82b4f304 r abm_shift +ffffffff82b4f318 r abm_mask +ffffffff82b4f360 r dce112_tg_offsets +ffffffff82b4f3a8 r res_create_funcs +ffffffff82b4f3d8 r plane_cap +ffffffff82b4f404 r polaris_11_resource_cap +ffffffff82b4f440 r polaris_10_resource_cap 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+ffffffff82b57008 r res_cap +ffffffff82b57048 r dce80_res_pool_funcs +ffffffff82b57130 r clk_src_regs +ffffffff82b5722c r dmcu_regs +ffffffff82b57288 r dmcu_shift +ffffffff82b5729c r dmcu_mask +ffffffff82b572e8 r abm_regs +ffffffff82b57328 r abm_shift +ffffffff82b5733c r abm_mask +ffffffff82b57390 r dce80_tg_offsets +ffffffff82b573d8 r plane_cap +ffffffff82b57408 r res_create_funcs +ffffffff82b57440 r panel_cntl_regs +ffffffff82b57460 r panel_cntl_shift +ffffffff82b57470 r panel_cntl_mask +ffffffff82b574b0 r link_enc_regs +ffffffff82b57870 r link_enc_aux_regs +ffffffff82b578c0 r link_enc_hpd_regs +ffffffff82b578d8 r link_enc_feature +ffffffff82b578e8 r cs_shift +ffffffff82b578f4 r cs_mask +ffffffff82b57920 r mi_regs +ffffffff82b57c38 r mi_shifts +ffffffff82b57c80 r mi_masks +ffffffff82b57da0 r ipp_regs +ffffffff82b57f98 r ipp_shift +ffffffff82b57fc0 r ipp_mask +ffffffff82b58060 r xfm_regs +ffffffff82b58600 r xfm_shift +ffffffff82b58660 r xfm_mask +ffffffff82b587e0 r opp_regs +ffffffff82b58930 r opp_shift +ffffffff82b5895c r opp_mask +ffffffff82b58a10 r aux_engine_regs +ffffffff82b58b00 r aux_mask +ffffffff82b58b60 r aux_shift +ffffffff82b58b80 r i2c_hw_regs +ffffffff82b58cd0 r i2c_shifts +ffffffff82b58cfc r i2c_masks +ffffffff82b58da0 r audio_regs +ffffffff82b58ed4 r audio_shift +ffffffff82b58eec r audio_mask +ffffffff82b58f30 r stream_enc_regs +ffffffff82b595dc r se_shift +ffffffff82b59660 r se_mask +ffffffff82b59864 r hwseq_reg +ffffffff82b59a80 r hwseq_shift +ffffffff82b59b00 r hwseq_mask +ffffffff82b59cf4 r res_cap_81 +ffffffff82b59d30 r res_cap_83 +ffffffff82b5a000 r reg_offsets +ffffffff82b5a048 r dce80_tg_funcs +ffffffff82b5b000 r dcn10_dpp_funcs +ffffffff82b5c000 r dpp_input_csc_matrix +ffffffff82b5e000 r hubbub1_funcs +ffffffff82b5f000 r dcn10_hubp_funcs +ffffffff82b60000 r reduceSizeAndFraction.prime_numbers +ffffffff82b62000 r dcn10_funcs +ffffffff82b622c0 r dcn10_private_funcs +ffffffff82b63000 r dcn10_ipp_funcs +ffffffff82b63048 r dcn20_ipp_funcs +ffffffff82b64000 r dcn10_lnk_enc_funcs +ffffffff82b65000 r dcn10_mpc_funcs +ffffffff82b66000 r dcn10_opp_funcs +ffffffff82b67000 r dcn10_tg_funcs +ffffffff82b68000 r bios_regs +ffffffff82b68008 r rv2_res_cap +ffffffff82b68044 r res_cap +ffffffff82b68080 r debug_defaults_drv +ffffffff82b681f8 r debug_defaults_diags +ffffffff82b68370 r clk_src_regs +ffffffff82b684c0 r dmcu_regs +ffffffff82b6851c r dmcu_shift +ffffffff82b68530 r dmcu_mask +ffffffff82b6857c r abm_regs +ffffffff82b685bc r abm_shift +ffffffff82b685d0 r abm_mask +ffffffff82b68618 r res_create_funcs +ffffffff82b68648 r res_create_maximus_funcs +ffffffff82b68678 r plane_cap +ffffffff82b686a8 r dcn10_res_pool_funcs +ffffffff82b68790 r panel_cntl_regs +ffffffff82b687b0 r panel_cntl_shift +ffffffff82b687c0 r panel_cntl_mask +ffffffff82b68800 r link_enc_regs +ffffffff82b68d10 r link_enc_aux_regs +ffffffff82b68d50 r link_enc_hpd_regs +ffffffff82b68d60 r le_shift +ffffffff82b68e50 r le_mask +ffffffff82b69208 r link_enc_feature +ffffffff82b69218 r cs_shift +ffffffff82b69224 r cs_mask +ffffffff82b69250 r hubp_regs +ffffffff82b69900 r hubp_shift +ffffffff82b699c4 r hubp_mask +ffffffff82b69cd0 r ipp_regs +ffffffff82b69db0 r ipp_shift +ffffffff82b69dcc r ipp_mask +ffffffff82b69e40 r tf_regs +ffffffff82b6ada0 r tf_shift +ffffffff82b6b008 r tf_mask +ffffffff82b6b9a0 r opp_regs +ffffffff82b6ba70 r opp_shift +ffffffff82b6ba90 r opp_mask +ffffffff82b6bb10 r tg_regs +ffffffff82b6c010 r tg_shift +ffffffff82b6c0d0 r tg_mask +ffffffff82b6c3d0 r aux_engine_regs +ffffffff82b6c4c0 r aux_mask +ffffffff82b6c520 r aux_shift +ffffffff82b6c540 r i2c_hw_regs +ffffffff82b6c690 r i2c_shifts +ffffffff82b6c6bc r i2c_masks +ffffffff82b6c760 r mpc_regs +ffffffff82b6c880 r mpc_shift +ffffffff82b6c898 r mpc_mask +ffffffff82b6c8f4 r hubbub_reg +ffffffff82b6ca68 r hubbub_shift +ffffffff82b6caf0 r hubbub_mask +ffffffff82b6cd10 r audio_regs +ffffffff82b6cdc0 r audio_shift +ffffffff82b6cdd8 r audio_mask +ffffffff82b6ce20 r stream_enc_regs +ffffffff82b6d370 r se_shift +ffffffff82b6d44c r se_mask +ffffffff82b6d7b8 r hwseq_reg +ffffffff82b6d9d4 r hwseq_shift +ffffffff82b6da54 r hwseq_mask +ffffffff82b6e000 r audio_clock_info_table_48bpc +ffffffff82b6e190 r audio_clock_info_table_36bpc +ffffffff82b6e320 r audio_clock_info_table +ffffffff82b6e4e0 r dcn10_str_enc_funcs +ffffffff82b6f000 r dccg2_funcs +ffffffff82b71000 r dpp_input_csc_matrix +ffffffff82b72000 R dcn20_dsc_funcs +ffffffff82b73000 R dcn20_dwbc_funcs +ffffffff82b74000 r filter_12tap_16p_upscale +ffffffff82b740e0 r filter_12tap_16p_117 +ffffffff82b741c0 r filter_12tap_16p_150 +ffffffff82b742a0 r filter_12tap_16p_183 +ffffffff82b74380 r filter_11tap_16p_upscale +ffffffff82b74450 r filter_11tap_16p_117 +ffffffff82b74520 r filter_11tap_16p_150 +ffffffff82b745f0 r filter_11tap_16p_183 +ffffffff82b746c0 r filter_10tap_16p_upscale +ffffffff82b74780 r filter_10tap_16p_117 +ffffffff82b74840 r filter_10tap_16p_150 +ffffffff82b74900 r filter_10tap_16p_183 +ffffffff82b749c0 r filter_9tap_16p_upscale +ffffffff82b74a70 r filter_9tap_16p_117 +ffffffff82b74b20 r filter_9tap_16p_150 +ffffffff82b74bd0 r filter_9tap_16p_183 +ffffffff82b74c80 r filter_8tap_16p_upscale +ffffffff82b74d10 r filter_8tap_16p_117 +ffffffff82b74da0 r filter_8tap_16p_150 +ffffffff82b74e30 r filter_8tap_16p_183 +ffffffff82b74ec0 r filter_7tap_16p_upscale +ffffffff82b74f40 r filter_7tap_16p_117 +ffffffff82b74fc0 r filter_7tap_16p_150 +ffffffff82b75040 r filter_7tap_16p_183 +ffffffff82b750c0 r filter_6tap_16p_upscale +ffffffff82b75130 r filter_6tap_16p_117 +ffffffff82b751a0 r filter_6tap_16p_150 +ffffffff82b75210 r filter_6tap_16p_183 +ffffffff82b75280 r filter_5tap_16p_upscale +ffffffff82b752e0 r filter_5tap_16p_117 +ffffffff82b75340 r filter_5tap_16p_150 +ffffffff82b753a0 r filter_5tap_16p_183 +ffffffff82b75400 r filter_4tap_16p_upscale +ffffffff82b75450 r filter_4tap_16p_117 +ffffffff82b754a0 r filter_4tap_16p_150 +ffffffff82b754f0 r filter_4tap_16p_183 +ffffffff82b75540 r filter_3tap_16p_upscale +ffffffff82b75580 r filter_3tap_16p_117 +ffffffff82b755c0 r filter_3tap_16p_150 +ffffffff82b75600 r filter_3tap_16p_183 +ffffffff82b76000 r hubbub2_funcs +ffffffff82b77000 r dcn20_funcs +ffffffff82b772c0 r dcn20_private_funcs +ffffffff82b78000 r dcn2_mpll_cfg +ffffffff82b78190 r dcn20_link_enc_funcs +ffffffff82b79000 R dcn20_mmhubbub_funcs +ffffffff82b7a000 R dcn20_mpc_funcs +ffffffff82b7b000 r tf_regs +ffffffff82b7c920 r tf_shift +ffffffff82b7cba4 r tf_mask +ffffffff82b7d5c0 r ipp_regs +ffffffff82b7d710 r ipp_shift +ffffffff82b7d72c r ipp_mask +ffffffff82b7d7a0 r opp_regs +ffffffff82b7d9b0 r opp_shift +ffffffff82b7d9e8 r opp_mask +ffffffff82b7dac0 r aux_engine_regs +ffffffff82b7dbb0 r aux_mask +ffffffff82b7dc10 r aux_shift +ffffffff82b7dc30 r i2c_hw_regs +ffffffff82b7dd80 r i2c_shifts +ffffffff82b7ddac r i2c_masks +ffffffff82b7de50 r mpc_regs +ffffffff82b7e398 r mpc_shift +ffffffff82b7e3e0 r mpc_mask +ffffffff82b7e4f4 r hubbub_reg +ffffffff82b7e668 r hubbub_shift +ffffffff82b7e6f0 r hubbub_mask +ffffffff82b7e90c r res_cap_nv10 +ffffffff82b7e950 r vmid_regs +ffffffff82b7eb10 r vmid_shifts +ffffffff82b7eb18 r vmid_masks +ffffffff82b7eb40 r tg_regs +ffffffff82b7f2c0 r tg_shift +ffffffff82b7f380 r tg_mask +ffffffff82b7f680 r link_enc_regs +ffffffff82b7fe20 r link_enc_aux_regs +ffffffff82b7fe80 r link_enc_hpd_regs +ffffffff82b7fe98 r le_shift +ffffffff82b7ff88 r le_mask +ffffffff82b80340 r stream_enc_regs +ffffffff82b80b38 r se_shift +ffffffff82b80c14 r se_mask +ffffffff82b80f80 r hwseq_reg +ffffffff82b8119c r hwseq_shift +ffffffff82b8121c r hwseq_mask +ffffffff82b81410 r dsc_regs +ffffffff82b818a8 r dsc_shift +ffffffff82b81960 r dsc_mask +ffffffff82b81c40 r hubp_regs +ffffffff82b82888 r hubp_shift +ffffffff82b82984 r hubp_mask +ffffffff82b82d80 r dwbc20_regs +ffffffff82b82e38 r dwbc20_shift +ffffffff82b82eb8 r dwbc20_mask +ffffffff82b830b0 r mcif_wb20_regs +ffffffff82b83190 r mcif_wb20_shift +ffffffff82b83230 r mcif_wb20_mask +ffffffff82b834b0 r link_enc_feature +ffffffff82b834c0 r bios_regs +ffffffff82b834c8 r dcn20_res_pool_funcs +ffffffff82b835a8 r res_cap_nv14 +ffffffff82b835e8 r debug_defaults_drv +ffffffff82b83760 r debug_defaults_diags +ffffffff82b838e0 r clk_src_regs +ffffffff82b83ad8 r dccg_regs +ffffffff82b83bc4 r dccg_shift +ffffffff82b83c5c r dccg_mask +ffffffff82b83eb8 r dmcu_regs +ffffffff82b83f14 r dmcu_shift +ffffffff82b83f28 r dmcu_mask +ffffffff82b83f74 r abm_regs +ffffffff82b83fb4 r abm_shift +ffffffff82b83fc8 r abm_mask +ffffffff82b84010 r res_create_funcs +ffffffff82b84040 r res_create_maximus_funcs +ffffffff82b84070 r plane_cap +ffffffff82b840a0 r panel_cntl_regs +ffffffff82b840c0 r panel_cntl_shift +ffffffff82b840d0 r panel_cntl_mask +ffffffff82b8410c r cs_shift +ffffffff82b84118 r cs_mask +ffffffff82b84140 r audio_regs +ffffffff82b84274 r audio_shift +ffffffff82b8428c r audio_mask +ffffffff82b85000 r dcn20_str_enc_funcs +ffffffff82b86000 r dccg201_funcs +ffffffff82b87000 r hubbub201_funcs +ffffffff82b88000 r dcn201_funcs +ffffffff82b882c0 r dcn201_private_funcs +ffffffff82b89000 r dcn201_link_enc_funcs +ffffffff82b8a000 R dcn201_mpc_funcs +ffffffff82b8b000 r bios_regs +ffffffff82b8b008 r res_cap_dnc201 +ffffffff82b8b048 r debug_defaults_drv +ffffffff82b8b1c0 r clk_src_regs +ffffffff82b8b268 r dccg_regs +ffffffff82b8b354 r dccg_shift +ffffffff82b8b3ec r dccg_mask +ffffffff82b8b648 r res_create_funcs +ffffffff82b8b678 r res_create_maximus_funcs +ffffffff82b8b6a8 r plane_cap +ffffffff82b8b6e0 r link_enc_regs +ffffffff82b8b970 r link_enc_aux_regs +ffffffff82b8b990 r link_enc_hpd_regs +ffffffff82b8b998 r le_shift +ffffffff82b8ba88 r le_mask +ffffffff82b8be40 r link_enc_feature +ffffffff82b8be50 r cs_shift +ffffffff82b8be5c r cs_mask +ffffffff82b8be90 r hubp_regs +ffffffff82b8c620 r hubp_shift +ffffffff82b8c6f8 r hubp_mask +ffffffff82b8ca60 r ipp_regs +ffffffff82b8cb40 r ipp_shift +ffffffff82b8cb5c r ipp_mask +ffffffff82b8cbd0 r tf_regs +ffffffff82b8dc10 r tf_shift +ffffffff82b8de94 r tf_mask +ffffffff82b8e8b0 r opp_regs +ffffffff82b8e960 r opp_shift +ffffffff82b8e998 r opp_mask +ffffffff82b8ea70 r aux_engine_regs +ffffffff82b8eac0 r aux_mask +ffffffff82b8eb20 r aux_shift +ffffffff82b8eb40 r i2c_hw_regs +ffffffff82b8ebb0 r i2c_shifts +ffffffff82b8ebdc r i2c_masks +ffffffff82b8ec80 r tg_regs +ffffffff82b8ef00 r tg_shift +ffffffff82b8efc0 r tg_mask +ffffffff82b8f2c0 r mpc_regs +ffffffff82b8f808 r mpc_shift +ffffffff82b8f854 r mpc_mask +ffffffff82b8f97c r hubbub_reg +ffffffff82b8faf0 r hubbub_shift +ffffffff82b8fb78 r hubbub_mask +ffffffff82b8fda0 r audio_regs +ffffffff82b8fdf8 r audio_shift +ffffffff82b8fe10 r audio_mask +ffffffff82b8fe50 r stream_enc_regs +ffffffff82b900f8 r se_shift +ffffffff82b901d4 r se_mask +ffffffff82b90540 r hwseq_reg +ffffffff82b9075c r hwseq_shift +ffffffff82b907dc r hwseq_mask +ffffffff82b91000 r dccg21_funcs +ffffffff82b92000 r hubbub21_funcs +ffffffff82b93000 r dcn21_funcs +ffffffff82b932c0 r dcn21_private_funcs +ffffffff82b94000 r dcn21_mpll_cfg_ref +ffffffff82b94190 r dcn21_link_enc_funcs +ffffffff82b95000 r bios_regs +ffffffff82b95008 r res_cap_rn +ffffffff82b95048 r dcn21_res_pool_funcs +ffffffff82b95128 r debug_defaults_drv +ffffffff82b952a0 r debug_defaults_diags +ffffffff82b95420 r clk_src_regs +ffffffff82b955c4 r dccg_regs +ffffffff82b956b0 r dccg_shift +ffffffff82b95748 r dccg_mask +ffffffff82b959a4 r dmcu_regs +ffffffff82b95a00 r dmcu_shift +ffffffff82b95a14 r dmcu_mask +ffffffff82b95a60 r abm_regs +ffffffff82b95aa0 r abm_shift +ffffffff82b95ab4 r abm_mask +ffffffff82b95b00 r res_create_funcs +ffffffff82b95b30 r res_create_maximus_funcs +ffffffff82b95b60 r plane_cap +ffffffff82b95b90 r panel_cntl_regs +ffffffff82b95bb0 r panel_cntl_shift +ffffffff82b95bc0 r panel_cntl_mask +ffffffff82b95c00 r link_enc_regs +ffffffff82b96260 r link_enc_aux_regs +ffffffff82b962b0 r link_enc_hpd_regs +ffffffff82b962c4 r le_shift +ffffffff82b963b4 r le_mask +ffffffff82b9676c r link_enc_feature +ffffffff82b9677c r panel_config_defaults +ffffffff82b967b0 r cs_shift +ffffffff82b967bc r cs_mask +ffffffff82b967f0 r hubp_regs +ffffffff82b97020 r hubp_shift +ffffffff82b9711c r hubp_mask +ffffffff82b97510 r ipp_regs +ffffffff82b975f0 r ipp_shift +ffffffff82b9760c r ipp_mask +ffffffff82b97680 r tf_regs +ffffffff82b98740 r tf_shift +ffffffff82b989c4 r tf_mask +ffffffff82b993e0 r opp_regs +ffffffff82b995f0 r opp_shift +ffffffff82b99628 r opp_mask +ffffffff82b99700 r tg_regs +ffffffff82b99c00 r tg_shift +ffffffff82b99cc0 r tg_mask +ffffffff82b99fc0 r aux_engine_regs +ffffffff82b9a088 r aux_mask +ffffffff82b9a0e8 r aux_shift +ffffffff82b9a100 r i2c_hw_regs +ffffffff82b9a218 r i2c_shifts +ffffffff82b9a244 r i2c_masks +ffffffff82b9a2e8 r mpc_regs +ffffffff82b9a830 r mpc_shift +ffffffff82b9a878 r mpc_mask +ffffffff82b9a98c r hubbub_reg +ffffffff82b9ab00 r hubbub_shift +ffffffff82b9ab88 r hubbub_mask +ffffffff82b9adb0 r vmid_regs +ffffffff82b9af70 r vmid_shifts +ffffffff82b9af78 r vmid_masks +ffffffff82b9afa0 r dsc_regs +ffffffff82b9b438 r dsc_shift +ffffffff82b9b4f0 r dsc_mask +ffffffff82b9b7d0 r audio_regs +ffffffff82b9b8d8 r audio_shift +ffffffff82b9b8f0 r audio_mask +ffffffff82b9b930 r stream_enc_regs +ffffffff82b9bfd4 r se_shift +ffffffff82b9c0b0 r se_mask +ffffffff82b9c41c r hwseq_reg +ffffffff82b9c638 r hwseq_shift +ffffffff82b9c6b8 r hwseq_mask +ffffffff82b9d000 r dccg3_funcs +ffffffff82b9e000 r dcn30_link_enc_funcs +ffffffff82b9f000 r dcn30_str_enc_funcs +ffffffff82ba0000 r dpp_input_csc_matrix +ffffffff82ba1000 R dcn30_dwbc_funcs +ffffffff82ba2000 r hubbub30_funcs +ffffffff82ba4000 r dcn30_funcs +ffffffff82ba42c0 r dcn30_private_funcs +ffffffff82ba5000 R dcn30_mmhubbub_funcs +ffffffff82ba6000 R dcn30_mpc_funcs +ffffffff82ba7000 r bios_regs +ffffffff82ba7008 r res_cap_dcn3 +ffffffff82ba7048 r debug_defaults_drv +ffffffff82ba71c0 r debug_defaults_diags +ffffffff82ba7340 r clk_src_regs +ffffffff82ba7538 r dccg_regs +ffffffff82ba7624 r dccg_shift +ffffffff82ba76bc r dccg_mask +ffffffff82ba7920 r abm_regs +ffffffff82ba7aa0 r abm_shift +ffffffff82ba7ab4 r abm_mask +ffffffff82ba7b00 r res_create_funcs +ffffffff82ba7b30 r res_create_maximus_funcs +ffffffff82ba7b60 r plane_cap +ffffffff82ba7b90 r dcn30_res_pool_funcs +ffffffff82ba7c70 r panel_cntl_regs +ffffffff82ba7c90 r panel_cntl_shift +ffffffff82ba7ca0 r panel_cntl_mask +ffffffff82ba7ce0 r link_enc_regs +ffffffff82ba8480 r link_enc_aux_regs +ffffffff82ba84e0 r link_enc_hpd_regs +ffffffff82ba84f8 r le_shift +ffffffff82ba85e8 r le_mask +ffffffff82ba89a0 r link_enc_feature +ffffffff82ba89b0 r cs_shift +ffffffff82ba89bc r cs_mask +ffffffff82ba89e4 r hubbub_reg +ffffffff82ba8b58 r hubbub_shift +ffffffff82ba8be0 r hubbub_mask +ffffffff82ba8e00 r vmid_regs +ffffffff82ba8fc0 r vmid_shifts +ffffffff82ba8fc8 r vmid_masks +ffffffff82ba8ff0 r hubp_regs +ffffffff82ba9c38 r hubp_shift +ffffffff82ba9d34 r hubp_mask +ffffffff82baa130 r dpp_regs +ffffffff82bac0b0 r tf_shift +ffffffff82bac380 r tf_mask +ffffffff82bacec0 r opp_regs +ffffffff82bad0d0 r opp_shift +ffffffff82bad108 r opp_mask +ffffffff82bad1e0 r optc_regs +ffffffff82bad960 r optc_shift +ffffffff82bada20 r optc_mask +ffffffff82badd20 r mpc_regs +ffffffff82baf50c r mpc_shift +ffffffff82baf5e8 r mpc_mask +ffffffff82baf960 r dsc_regs +ffffffff82bafdf8 r dsc_shift +ffffffff82bafeb0 r dsc_mask +ffffffff82bb0190 r dwbc30_regs +ffffffff82bb036c r dwbc30_shift +ffffffff82bb04a0 r dwbc30_mask +ffffffff82bb0970 r mcif_wb30_regs +ffffffff82bb0a6c r mcif_wb30_shift +ffffffff82bb0b18 r mcif_wb30_mask +ffffffff82bb0dd0 r aux_engine_regs +ffffffff82bb0ec0 r aux_mask +ffffffff82bb0f20 r aux_shift +ffffffff82bb0f40 r i2c_hw_regs +ffffffff82bb1090 r i2c_shifts +ffffffff82bb10bc r i2c_masks +ffffffff82bb1160 r audio_regs +ffffffff82bb1294 r audio_shift +ffffffff82bb12ac r audio_mask +ffffffff82bb12f0 r stream_enc_regs +ffffffff82bb1ae8 r se_shift +ffffffff82bb1bc4 r se_mask +ffffffff82bb1f30 r vpg_regs +ffffffff82bb1fbc r vpg_shift +ffffffff82bb1fe4 r vpg_mask +ffffffff82bb2080 r afmt_regs +ffffffff82bb217c r afmt_shift +ffffffff82bb2190 r afmt_mask +ffffffff82bb21d4 r hwseq_reg +ffffffff82bb23f0 r hwseq_shift +ffffffff82bb2470 r hwseq_mask +ffffffff82bb3000 r dccg301_funcs +ffffffff82bb4000 r dcn301_link_enc_funcs +ffffffff82bb5000 r hubbub301_funcs +ffffffff82bb6000 r dcn301_funcs +ffffffff82bb62c0 r dcn301_private_funcs +ffffffff82bb7000 r dcn301_link_panel_cntl_funcs +ffffffff82bb8000 r bios_regs +ffffffff82bb8008 r debug_defaults_drv +ffffffff82bb8180 r debug_defaults_diags +ffffffff82bb8300 r clk_src_regs +ffffffff82bb8450 r dccg_regs +ffffffff82bb853c r dccg_shift +ffffffff82bb85d4 r dccg_mask +ffffffff82bb8830 r abm_regs +ffffffff82bb8930 r abm_shift +ffffffff82bb8944 r abm_mask +ffffffff82bb8990 r res_create_funcs +ffffffff82bb89c0 r res_create_maximus_funcs +ffffffff82bb89f0 r plane_cap +ffffffff82bb8a20 r panel_cntl_regs +ffffffff82bb8a60 r panel_cntl_shift +ffffffff82bb8a70 r panel_cntl_mask +ffffffff82bb8ab0 r link_enc_regs +ffffffff82bb8fc0 r link_enc_aux_regs +ffffffff82bb9000 r link_enc_hpd_regs +ffffffff82bb9010 r le_shift +ffffffff82bb9100 r le_mask +ffffffff82bb94b8 r link_enc_feature +ffffffff82bb94c8 r cs_shift +ffffffff82bb94d4 r cs_mask +ffffffff82bb94fc r hubbub_reg +ffffffff82bb9670 r hubbub_shift +ffffffff82bb96f8 r hubbub_mask +ffffffff82bb9920 r vmid_regs +ffffffff82bb9ae0 r vmid_shifts +ffffffff82bb9ae8 r vmid_masks +ffffffff82bb9b10 r hubp_regs +ffffffff82bba340 r hubp_shift +ffffffff82bba43c r hubp_mask +ffffffff82bba830 r dpp_regs +ffffffff82bbbd30 r tf_shift +ffffffff82bbc000 r tf_mask +ffffffff82bbcb40 r opp_regs +ffffffff82bbcca0 r opp_shift +ffffffff82bbccd8 r opp_mask +ffffffff82bbcdb0 r optc_regs +ffffffff82bbd2b0 r optc_shift +ffffffff82bbd370 r optc_mask +ffffffff82bbd670 r mpc_regs +ffffffff82bbee5c r mpc_shift +ffffffff82bbef38 r mpc_mask +ffffffff82bbf2b0 r dsc_regs +ffffffff82bbf4fc r dsc_shift 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r debug_defaults_diags +ffffffff82bc2340 r clk_src_regs +ffffffff82bc24e4 r dccg_regs +ffffffff82bc25d0 r dccg_shift +ffffffff82bc2668 r dccg_mask +ffffffff82bc28d0 r abm_regs +ffffffff82bc2a10 r abm_shift +ffffffff82bc2a24 r abm_mask +ffffffff82bc2a70 r res_create_funcs +ffffffff82bc2aa0 r res_create_maximus_funcs +ffffffff82bc2ad0 r plane_cap +ffffffff82bc2b00 r panel_cntl_regs +ffffffff82bc2b20 r panel_cntl_shift +ffffffff82bc2b30 r panel_cntl_mask +ffffffff82bc2b70 r link_enc_regs +ffffffff82bc31d0 r link_enc_aux_regs +ffffffff82bc3220 r link_enc_hpd_regs +ffffffff82bc3234 r le_shift +ffffffff82bc3324 r le_mask +ffffffff82bc36dc r link_enc_feature +ffffffff82bc36ec r cs_shift +ffffffff82bc36f8 r cs_mask +ffffffff82bc3720 r hubbub_reg +ffffffff82bc3894 r hubbub_shift +ffffffff82bc391c r hubbub_mask +ffffffff82bc3b40 r vmid_regs +ffffffff82bc3d00 r vmid_shifts +ffffffff82bc3d08 r vmid_masks +ffffffff82bc3d30 r hubp_regs +ffffffff82bc476c r hubp_shift +ffffffff82bc4868 r hubp_mask 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+ffffffff82bcdc68 r le_shift +ffffffff82bcdd58 r le_mask +ffffffff82bce110 r link_enc_feature +ffffffff82bce120 r cs_shift +ffffffff82bce12c r cs_mask +ffffffff82bce154 r hubbub_reg +ffffffff82bce2c8 r hubbub_shift +ffffffff82bce350 r hubbub_mask +ffffffff82bce570 r vmid_regs +ffffffff82bce730 r vmid_shifts +ffffffff82bce738 r vmid_masks +ffffffff82bce760 r hubp_regs +ffffffff82bceb78 r hubp_shift +ffffffff82bcec74 r hubp_mask +ffffffff82bcf070 r dpp_regs +ffffffff82bcfaf0 r tf_shift +ffffffff82bcfdc0 r tf_mask +ffffffff82bd0900 r opp_regs +ffffffff82bd09b0 r opp_shift +ffffffff82bd09e8 r opp_mask +ffffffff82bd0ac0 r optc_regs +ffffffff82bd0d40 r optc_shift +ffffffff82bd0e00 r optc_mask +ffffffff82bd1100 r mpc_regs +ffffffff82bd28ec r mpc_shift +ffffffff82bd29c8 r mpc_mask +ffffffff82bd2d40 r dsc_regs +ffffffff82bd2ec8 r dsc_shift +ffffffff82bd2f80 r dsc_mask +ffffffff82bd3260 r dwbc30_regs +ffffffff82bd343c r dwbc30_shift +ffffffff82bd3570 r dwbc30_mask +ffffffff82bd3a40 r mcif_wb30_regs +ffffffff82bd3b3c r mcif_wb30_shift +ffffffff82bd3be8 r mcif_wb30_mask +ffffffff82bd3ea0 r aux_engine_regs +ffffffff82bd3ef0 r aux_mask +ffffffff82bd3f50 r aux_shift +ffffffff82bd3f70 r i2c_hw_regs +ffffffff82bd3fe0 r i2c_shifts +ffffffff82bd400c r i2c_masks +ffffffff82bd40b0 r audio_regs +ffffffff82bd41e4 r audio_shift +ffffffff82bd41fc r audio_mask +ffffffff82bd4240 r stream_enc_regs +ffffffff82bd44e8 r se_shift +ffffffff82bd45c4 r se_mask +ffffffff82bd4930 r vpg_regs +ffffffff82bd496c r vpg_shift +ffffffff82bd4994 r vpg_mask +ffffffff82bd4a30 r afmt_regs +ffffffff82bd4a9c r afmt_shift +ffffffff82bd4ab0 r afmt_mask +ffffffff82bd4af4 r hwseq_reg +ffffffff82bd4d10 r hwseq_shift +ffffffff82bd4d90 r hwseq_mask +ffffffff82bd5000 r dccg31_funcs +ffffffff82bd6000 r dcn31_link_enc_funcs +ffffffff82bd7000 r dcn30_str_enc_funcs +ffffffff82bd8000 r hubbub31_funcs +ffffffff82bd9000 r dcn31_funcs +ffffffff82bd92c0 r dcn31_private_funcs +ffffffff82bda000 r dcn31_link_panel_cntl_funcs +ffffffff82bdb000 r bios_regs +ffffffff82bdb008 r res_cap_dcn31 +ffffffff82bdb048 r debug_defaults_diags +ffffffff82bdb1c0 r clk_src_regs +ffffffff82bdb370 r clk_src_regs_b0 +ffffffff82bdb514 r dccg_regs +ffffffff82bdb600 r dccg_shift +ffffffff82bdb698 r dccg_mask +ffffffff82bdb900 r abm_regs +ffffffff82bdba00 r abm_shift +ffffffff82bdba14 r abm_mask +ffffffff82bdba60 r res_create_funcs +ffffffff82bdba90 r res_create_maximus_funcs +ffffffff82bdbac0 r plane_cap +ffffffff82bdbaf0 r link_enc_regs +ffffffff82bdc150 r link_enc_aux_regs +ffffffff82bdc1a0 r link_enc_hpd_regs +ffffffff82bdc1b4 r le_shift +ffffffff82bdc2a4 r le_mask +ffffffff82bdc65c r link_enc_feature +ffffffff82bdc66c r panel_config_defaults +ffffffff82bdc6a0 r debug_defaults_drv +ffffffff82bdc818 r cs_shift +ffffffff82bdc824 r cs_mask +ffffffff82bdc84c r hubbub_reg +ffffffff82bdc9c0 r hubbub_shift +ffffffff82bdca48 r hubbub_mask +ffffffff82bdcc70 r vmid_regs +ffffffff82bdce30 r vmid_shifts +ffffffff82bdce38 r vmid_masks +ffffffff82bdce60 r hubp_regs +ffffffff82bdd690 r hubp_shift +ffffffff82bdd78c r hubp_mask +ffffffff82bddb80 r dpp_regs +ffffffff82bdf080 r tf_shift +ffffffff82bdf350 r tf_mask +ffffffff82bdfe90 r opp_regs +ffffffff82bdfff0 r opp_shift +ffffffff82be0028 r opp_mask +ffffffff82be0100 r optc_regs +ffffffff82be0600 r optc_shift +ffffffff82be06c0 r optc_mask +ffffffff82be09c0 r mpc_regs +ffffffff82be21ac r mpc_shift +ffffffff82be2288 r mpc_mask +ffffffff82be2600 r dsc_regs +ffffffff82be284c r dsc_shift +ffffffff82be2904 r dsc_mask +ffffffff82be2be0 r dwbc30_regs +ffffffff82be2dbc r dwbc30_shift +ffffffff82be2ef0 r dwbc30_mask +ffffffff82be33c0 r mcif_wb30_regs +ffffffff82be34bc r mcif_wb30_shift +ffffffff82be3568 r mcif_wb30_mask +ffffffff82be3820 r aux_engine_regs +ffffffff82be38e8 r aux_mask +ffffffff82be3948 r aux_shift +ffffffff82be3960 r i2c_hw_regs +ffffffff82be3a78 r i2c_shifts +ffffffff82be3aa4 r i2c_masks +ffffffff82be3b50 r audio_regs +ffffffff82be3c84 r audio_shift +ffffffff82be3c9c r audio_mask +ffffffff82be3cd8 r se_shift +ffffffff82be3db4 r se_mask +ffffffff82be4120 r vpg_regs +ffffffff82be4210 r vpg_shift +ffffffff82be4238 r vpg_mask +ffffffff82be42e0 r afmt_regs +ffffffff82be43b8 r afmt_shift +ffffffff82be43cc r afmt_mask +ffffffff82be4420 r stream_enc_regs +ffffffff82be5ac0 r hpo_dp_stream_enc_regs +ffffffff82be5cf0 r hpo_dp_se_shift +ffffffff82be5d18 r hpo_dp_se_mask +ffffffff82be5dc0 r apg_regs +ffffffff82be5e00 r apg_shift +ffffffff82be5e08 r apg_mask +ffffffff82be5e20 r hpo_dp_link_enc_regs +ffffffff82be5f30 r hpo_dp_le_shift +ffffffff82be5f4c r hpo_dp_le_mask +ffffffff82be5fb0 r hwseq_reg +ffffffff82be61cc r hwseq_shift +ffffffff82be624c r hwseq_mask +ffffffff82be7000 r dccg314_funcs +ffffffff82be8000 r dcn314_str_enc_funcs +ffffffff82be9000 r dcn314_funcs +ffffffff82be92c0 r dcn314_private_funcs +ffffffff82bea000 r bios_regs +ffffffff82bea008 r res_cap_dcn314 +ffffffff82bea048 r debug_defaults_diags +ffffffff82bea1c0 r clk_src_regs +ffffffff82bea364 r dccg_regs +ffffffff82bea450 r dccg_shift +ffffffff82bea4e8 r dccg_mask +ffffffff82bea750 r abm_regs +ffffffff82bea850 r abm_shift +ffffffff82bea864 r abm_mask +ffffffff82bea8b0 r res_create_funcs +ffffffff82bea8e0 r res_create_maximus_funcs +ffffffff82bea910 r plane_cap +ffffffff82bea940 r link_enc_regs +ffffffff82beafa0 r link_enc_aux_regs +ffffffff82beaff0 r link_enc_hpd_regs +ffffffff82beb004 r le_shift +ffffffff82beb0f4 r le_mask +ffffffff82beb4ac r link_enc_feature +ffffffff82beb4bc r panel_config_defaults +ffffffff82beb4f0 r debug_defaults_drv +ffffffff82beb668 r cs_shift +ffffffff82beb674 r cs_mask +ffffffff82beb69c r hubbub_reg +ffffffff82beb810 r hubbub_shift +ffffffff82beb898 r hubbub_mask +ffffffff82bebac0 r vmid_regs +ffffffff82bebc80 r vmid_shifts +ffffffff82bebc88 r vmid_masks +ffffffff82bebcb0 r hubp_regs +ffffffff82bec4e0 r hubp_shift +ffffffff82bec5dc r hubp_mask +ffffffff82bec9d0 r dpp_regs +ffffffff82beded0 r tf_shift +ffffffff82bee1a0 r tf_mask +ffffffff82beece0 r opp_regs +ffffffff82beee40 r opp_shift +ffffffff82beee78 r opp_mask +ffffffff82beef50 r optc_regs +ffffffff82bef450 r optc_shift +ffffffff82bef510 r optc_mask +ffffffff82bef810 r mpc_regs +ffffffff82bf0ffc r mpc_shift +ffffffff82bf10d8 r mpc_mask +ffffffff82bf1450 r dsc_regs +ffffffff82bf1760 r dsc_shift +ffffffff82bf1818 r dsc_mask +ffffffff82bf1af0 r dwbc30_regs +ffffffff82bf1ccc r dwbc30_shift +ffffffff82bf1e00 r dwbc30_mask +ffffffff82bf22d0 r mcif_wb30_regs +ffffffff82bf23cc r mcif_wb30_shift +ffffffff82bf2478 r mcif_wb30_mask +ffffffff82bf2730 r aux_engine_regs +ffffffff82bf27f8 r aux_mask +ffffffff82bf2858 r aux_shift +ffffffff82bf2870 r i2c_hw_regs +ffffffff82bf2988 r i2c_shifts +ffffffff82bf29b4 r i2c_masks +ffffffff82bf2a60 r audio_regs +ffffffff82bf2b94 r audio_shift +ffffffff82bf2bac r audio_mask +ffffffff82bf2bf0 r stream_enc_regs +ffffffff82bf3294 r se_shift +ffffffff82bf3370 r se_mask +ffffffff82bf36e0 r vpg_regs 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+ffffffff82bf5940 r link_enc_regs +ffffffff82bf5fa0 r link_enc_aux_regs +ffffffff82bf5ff0 r link_enc_hpd_regs +ffffffff82bf6004 r le_shift +ffffffff82bf60f4 r le_mask +ffffffff82bf64ac r link_enc_feature +ffffffff82bf64bc r panel_config_defaults +ffffffff82bf64f0 r debug_defaults_drv +ffffffff82bf6668 r cs_shift +ffffffff82bf6674 r cs_mask +ffffffff82bf669c r hubbub_reg +ffffffff82bf6810 r hubbub_shift +ffffffff82bf6898 r hubbub_mask +ffffffff82bf6ac0 r vmid_regs +ffffffff82bf6c80 r vmid_shifts +ffffffff82bf6c88 r vmid_masks +ffffffff82bf6cb0 r hubp_regs +ffffffff82bf74e0 r hubp_shift +ffffffff82bf75dc r hubp_mask +ffffffff82bf79d0 r dpp_regs +ffffffff82bf8ed0 r tf_shift +ffffffff82bf91a0 r tf_mask +ffffffff82bf9ce0 r opp_regs +ffffffff82bf9e40 r opp_shift +ffffffff82bf9e78 r opp_mask +ffffffff82bf9f50 r optc_regs +ffffffff82bfa450 r optc_shift +ffffffff82bfa510 r optc_mask +ffffffff82bfa810 r mpc_regs +ffffffff82bfbffc r mpc_shift +ffffffff82bfc0d8 r mpc_mask +ffffffff82bfc450 r dsc_regs +ffffffff82bfc69c r dsc_shift +ffffffff82bfc754 r dsc_mask +ffffffff82bfca30 r dwbc30_regs +ffffffff82bfcc0c r dwbc30_shift +ffffffff82bfcd40 r dwbc30_mask +ffffffff82bfd210 r mcif_wb30_regs +ffffffff82bfd30c r mcif_wb30_shift +ffffffff82bfd3b8 r mcif_wb30_mask +ffffffff82bfd670 r aux_engine_regs +ffffffff82bfd738 r aux_mask +ffffffff82bfd798 r aux_shift +ffffffff82bfd7b0 r i2c_hw_regs +ffffffff82bfd8c8 r i2c_shifts +ffffffff82bfd8f4 r i2c_masks +ffffffff82bfd9a0 r audio_regs +ffffffff82bfdad4 r audio_shift +ffffffff82bfdaec r audio_mask +ffffffff82bfdb30 r stream_enc_regs +ffffffff82bfe1d4 r se_shift +ffffffff82bfe2b0 r se_mask +ffffffff82bfe620 r vpg_regs +ffffffff82bfe710 r vpg_shift +ffffffff82bfe738 r vpg_mask +ffffffff82bfe7e0 r afmt_regs +ffffffff82bfe8b8 r afmt_shift +ffffffff82bfe8cc r afmt_mask +ffffffff82bfe920 r hpo_dp_stream_enc_regs +ffffffff82bfeb50 r hpo_dp_se_shift +ffffffff82bfeb78 r hpo_dp_se_mask +ffffffff82bfec20 r apg_regs +ffffffff82bfec60 r apg_shift +ffffffff82bfec68 r apg_mask +ffffffff82bfec80 r hpo_dp_link_enc_regs +ffffffff82bfed90 r hpo_dp_le_shift +ffffffff82bfedac r hpo_dp_le_mask +ffffffff82bfee10 r hwseq_reg +ffffffff82bff02c r hwseq_shift +ffffffff82bff0ac r hwseq_mask +ffffffff82c00000 r bios_regs +ffffffff82c00008 r res_cap_dcn31 +ffffffff82c00048 r debug_defaults_diags +ffffffff82c001c0 r clk_src_regs +ffffffff82c00364 r dccg_regs +ffffffff82c00450 r dccg_shift +ffffffff82c004e8 r dccg_mask +ffffffff82c00750 r abm_regs +ffffffff82c00850 r abm_shift +ffffffff82c00864 r abm_mask +ffffffff82c008b0 r res_create_funcs +ffffffff82c008e0 r res_create_maximus_funcs +ffffffff82c00910 r plane_cap +ffffffff82c00940 r link_enc_regs +ffffffff82c00fa0 r link_enc_aux_regs +ffffffff82c00ff0 r link_enc_hpd_regs +ffffffff82c01004 r le_shift +ffffffff82c010f4 r le_mask +ffffffff82c014ac r link_enc_feature +ffffffff82c014bc r panel_config_defaults +ffffffff82c014f0 r debug_defaults_drv +ffffffff82c01668 r cs_shift +ffffffff82c01674 r cs_mask +ffffffff82c0169c r hubbub_reg +ffffffff82c01810 r hubbub_shift +ffffffff82c01898 r hubbub_mask +ffffffff82c01ac0 r vmid_regs +ffffffff82c01c80 r vmid_shifts +ffffffff82c01c88 r vmid_masks +ffffffff82c01cb0 r hubp_regs +ffffffff82c024e0 r hubp_shift +ffffffff82c025dc r hubp_mask +ffffffff82c029d0 r dpp_regs +ffffffff82c03ed0 r tf_shift +ffffffff82c041a0 r tf_mask +ffffffff82c04ce0 r opp_regs +ffffffff82c04e40 r opp_shift +ffffffff82c04e78 r opp_mask +ffffffff82c04f50 r optc_regs +ffffffff82c05450 r optc_shift +ffffffff82c05510 r optc_mask +ffffffff82c05810 r mpc_regs +ffffffff82c06ffc r mpc_shift +ffffffff82c070d8 r mpc_mask +ffffffff82c07450 r dsc_regs +ffffffff82c0769c r dsc_shift +ffffffff82c07754 r dsc_mask +ffffffff82c07a30 r dwbc30_regs +ffffffff82c07c0c r dwbc30_shift +ffffffff82c07d40 r dwbc30_mask +ffffffff82c08210 r mcif_wb30_regs +ffffffff82c0830c r mcif_wb30_shift +ffffffff82c083b8 r mcif_wb30_mask +ffffffff82c08670 r aux_engine_regs +ffffffff82c08738 r aux_mask +ffffffff82c08798 r aux_shift +ffffffff82c087b0 r i2c_hw_regs +ffffffff82c088c8 r i2c_shifts +ffffffff82c088f4 r i2c_masks +ffffffff82c089a0 r audio_regs +ffffffff82c08ad4 r audio_shift +ffffffff82c08aec r audio_mask +ffffffff82c08b30 r stream_enc_regs +ffffffff82c091d4 r se_shift +ffffffff82c092b0 r se_mask +ffffffff82c09620 r vpg_regs +ffffffff82c09710 r vpg_shift +ffffffff82c09738 r vpg_mask +ffffffff82c097e0 r afmt_regs +ffffffff82c098b8 r afmt_shift +ffffffff82c098cc r afmt_mask +ffffffff82c09920 r hpo_dp_stream_enc_regs +ffffffff82c09b50 r hpo_dp_se_shift +ffffffff82c09b78 r hpo_dp_se_mask +ffffffff82c09c20 r apg_regs +ffffffff82c09c60 r apg_shift +ffffffff82c09c68 r apg_mask +ffffffff82c09c80 r hpo_dp_link_enc_regs +ffffffff82c09d90 r hpo_dp_le_shift +ffffffff82c09dac r hpo_dp_le_mask +ffffffff82c09e10 r hwseq_reg +ffffffff82c0a02c r hwseq_shift +ffffffff82c0a0ac r hwseq_mask +ffffffff82c0b000 r dccg32_funcs +ffffffff82c0c000 r dcn32_link_enc_funcs +ffffffff82c0d000 r dcn32_str_enc_funcs +ffffffff82c0e000 r hubbub32_funcs +ffffffff82c0f000 r dcn32_funcs +ffffffff82c0f2c0 r dcn32_private_funcs +ffffffff82c10000 R dcn32_mmhubbub_funcs +ffffffff82c11000 R dcn32_mpc_funcs +ffffffff82c12000 r res_cap_dcn32 +ffffffff82c12040 r debug_defaults_diags +ffffffff82c121b8 r dccg_shift +ffffffff82c12250 r dccg_mask +ffffffff82c124ac r abm_shift +ffffffff82c124c0 r abm_mask +ffffffff82c12508 r res_create_funcs +ffffffff82c12538 r res_create_maximus_funcs +ffffffff82c12568 r plane_cap +ffffffff82c12594 r le_shift +ffffffff82c12684 r le_mask +ffffffff82c12a3c r link_enc_feature +ffffffff82c12a50 r debug_defaults_drv +ffffffff82c12bc8 r cs_shift +ffffffff82c12bd4 r cs_mask +ffffffff82c12bfc r hubbub_shift +ffffffff82c12c84 r hubbub_mask +ffffffff82c12ea0 r vmid_shifts +ffffffff82c12ea8 r vmid_masks +ffffffff82c12ec8 r hubp_shift +ffffffff82c12fc4 r hubp_mask +ffffffff82c133b4 r tf_shift +ffffffff82c13684 r tf_mask +ffffffff82c141c4 r opp_shift +ffffffff82c141fc r opp_mask +ffffffff82c142d0 r optc_shift +ffffffff82c14390 r optc_mask +ffffffff82c14690 r mpc_shift +ffffffff82c1476c r mpc_mask +ffffffff82c14ad8 r dsc_shift +ffffffff82c14b90 r dsc_mask +ffffffff82c14e68 r dwbc30_shift +ffffffff82c14f9c r dwbc30_mask +ffffffff82c15464 r mcif_wb30_shift +ffffffff82c15510 r mcif_wb30_mask +ffffffff82c157bc r aux_mask +ffffffff82c1581c r aux_shift +ffffffff82c15834 r i2c_shifts +ffffffff82c15860 r i2c_masks +ffffffff82c15904 r audio_shift +ffffffff82c1591c r audio_mask +ffffffff82c15958 r se_shift +ffffffff82c15a34 r se_mask +ffffffff82c15da0 r vpg_shift +ffffffff82c15dc8 r vpg_mask +ffffffff82c15e5c r afmt_shift +ffffffff82c15e70 r afmt_mask +ffffffff82c15eb4 r hpo_dp_se_shift +ffffffff82c15edc r hpo_dp_se_mask +ffffffff82c15f7c r apg_shift +ffffffff82c15f84 r apg_mask +ffffffff82c15f9c r hpo_dp_le_shift +ffffffff82c15fb8 r hpo_dp_le_mask +ffffffff82c1601c r hwseq_shift +ffffffff82c1609c r hwseq_mask +ffffffff82c17000 r dcn321_link_enc_funcs +ffffffff82c18000 r res_cap_dcn321 +ffffffff82c18040 r debug_defaults_diags +ffffffff82c181b8 r dccg_shift +ffffffff82c18250 r dccg_mask +ffffffff82c184ac r abm_shift +ffffffff82c184c0 r abm_mask +ffffffff82c18508 r res_create_funcs +ffffffff82c18538 r res_create_maximus_funcs +ffffffff82c18568 r plane_cap +ffffffff82c18594 r le_shift +ffffffff82c18684 r le_mask +ffffffff82c18a3c r link_enc_feature +ffffffff82c18a50 r debug_defaults_drv +ffffffff82c18bc8 r cs_shift +ffffffff82c18bd4 r cs_mask +ffffffff82c18bfc r hubbub_shift +ffffffff82c18c84 r hubbub_mask +ffffffff82c18ea0 r vmid_shifts +ffffffff82c18ea8 r vmid_masks +ffffffff82c18ec8 r hubp_shift +ffffffff82c18fc4 r hubp_mask +ffffffff82c193b4 r tf_shift +ffffffff82c19684 r tf_mask +ffffffff82c1a1c4 r opp_shift +ffffffff82c1a1fc r opp_mask +ffffffff82c1a2d0 r optc_shift +ffffffff82c1a390 r optc_mask +ffffffff82c1a690 r mpc_shift +ffffffff82c1a76c r mpc_mask +ffffffff82c1aad8 r dsc_shift +ffffffff82c1ab90 r dsc_mask +ffffffff82c1ae68 r dwbc30_shift +ffffffff82c1af9c r dwbc30_mask +ffffffff82c1b464 r mcif_wb30_shift +ffffffff82c1b510 r mcif_wb30_mask +ffffffff82c1b7bc r aux_mask +ffffffff82c1b81c r aux_shift +ffffffff82c1b834 r i2c_shifts +ffffffff82c1b860 r i2c_masks +ffffffff82c1b904 r audio_shift +ffffffff82c1b91c r audio_mask +ffffffff82c1b958 r se_shift +ffffffff82c1ba34 r se_mask +ffffffff82c1bda0 r vpg_shift +ffffffff82c1bdc8 r vpg_mask +ffffffff82c1be5c r afmt_shift +ffffffff82c1be70 r afmt_mask +ffffffff82c1beb4 r hpo_dp_se_shift +ffffffff82c1bedc r hpo_dp_se_mask +ffffffff82c1bf7c r apg_shift +ffffffff82c1bf84 r apg_mask +ffffffff82c1bf9c r hpo_dp_le_shift +ffffffff82c1bfb8 r hpo_dp_le_mask +ffffffff82c1c01c r hwseq_shift +ffffffff82c1c09c r hwseq_mask +ffffffff82c1e000 R dcn10_soc_defaults +ffffffff82c1e08c R dcn10_ip_defaults +ffffffff82c29000 R dml20_funcs +ffffffff82c29030 R dml20v2_funcs +ffffffff82c29060 R dml21_funcs +ffffffff82c29090 R dml30_funcs +ffffffff82c290c0 R dml31_funcs +ffffffff82c290f0 R dml314_funcs +ffffffff82c29120 R dml32_funcs +ffffffff82c2c000 R qp_table_422_10bpc_min +ffffffff82c2c740 R qp_table_444_8bpc_max +ffffffff82c2d080 R qp_table_420_12bpc_max +ffffffff82c2d7c0 R qp_table_444_10bpc_min +ffffffff82c2e400 R qp_table_420_8bpc_max +ffffffff82c2e840 R qp_table_444_8bpc_min +ffffffff82c2f180 R qp_table_444_12bpc_min +ffffffff82c300c0 R qp_table_420_12bpc_min +ffffffff82c30800 R qp_table_422_12bpc_min +ffffffff82c31140 R qp_table_422_12bpc_max +ffffffff82c31a80 R qp_table_444_12bpc_max +ffffffff82c329c0 R qp_table_420_8bpc_min +ffffffff82c32e00 R qp_table_422_8bpc_min +ffffffff82c33340 R qp_table_422_10bpc_max +ffffffff82c33a80 R qp_table_420_10bpc_max +ffffffff82c34040 R qp_table_420_10bpc_min +ffffffff82c34600 R qp_table_444_10bpc_max +ffffffff82c35240 R qp_table_422_8bpc_max ffffffff82c37000 r funcs +ffffffff82c37050 r hpd_regs +ffffffff82c371a0 r hpd_shift +ffffffff82c371b0 r hpd_mask +ffffffff82c371c0 r ddc_data_regs +ffffffff82c373a0 r ddc_clk_regs +ffffffff82c37580 r ddc_shift +ffffffff82c375a8 r ddc_mask ffffffff82c38000 r funcs -ffffffff82c38050 r hpd_regs -ffffffff82c381a0 r hpd_shift -ffffffff82c381b0 r hpd_mask -ffffffff82c381c0 r ddc_data_regs -ffffffff82c383a0 r ddc_clk_regs -ffffffff82c38580 r ddc_shift -ffffffff82c385a8 r ddc_mask ffffffff82c39000 r funcs +ffffffff82c39050 r hpd_regs +ffffffff82c391a0 r hpd_shift +ffffffff82c391b0 r hpd_mask +ffffffff82c391c0 r ddc_data_regs +ffffffff82c393a0 r ddc_clk_regs +ffffffff82c39580 r ddc_shift +ffffffff82c395a8 r ddc_mask ffffffff82c3a000 r funcs -ffffffff82c3a050 r hpd_regs -ffffffff82c3a1a0 r hpd_shift -ffffffff82c3a1b0 r hpd_mask -ffffffff82c3a1c0 r ddc_data_regs -ffffffff82c3a3a0 r ddc_clk_regs -ffffffff82c3a580 r ddc_shift -ffffffff82c3a5a8 r ddc_mask ffffffff82c3b000 r funcs +ffffffff82c3b050 r hpd_regs +ffffffff82c3b1a0 r hpd_shift +ffffffff82c3b1b0 r hpd_mask +ffffffff82c3b1c0 r ddc_data_regs +ffffffff82c3b3a0 r ddc_clk_regs +ffffffff82c3b580 r ddc_shift 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-ffffffff82c3e7d0 r generic_shift -ffffffff82c3e7e0 r generic_mask ffffffff82c3f000 r funcs +ffffffff82c3f050 r hpd_regs +ffffffff82c3f1a0 r hpd_shift +ffffffff82c3f1b0 r hpd_mask +ffffffff82c3f1c0 r ddc_data_regs_dcn +ffffffff82c3f370 r ddc_clk_regs_dcn +ffffffff82c3f520 r ddc_shift +ffffffff82c3f640 r ddc_mask +ffffffff82c3f760 r generic_regs +ffffffff82c3f7d0 r generic_shift +ffffffff82c3f7e0 r generic_mask ffffffff82c40000 r funcs -ffffffff82c40050 r hpd_regs -ffffffff82c40168 r hpd_shift -ffffffff82c40178 r hpd_mask -ffffffff82c40190 r ddc_data_regs_dcn -ffffffff82c402c0 r ddc_clk_regs_dcn -ffffffff82c403f0 r ddc_shift -ffffffff82c404e0 r ddc_mask -ffffffff82c405d0 r generic_regs -ffffffff82c40604 r generic_shift -ffffffff82c4060c r generic_mask ffffffff82c41000 r funcs +ffffffff82c41050 r hpd_regs +ffffffff82c41168 r hpd_shift +ffffffff82c41178 r hpd_mask +ffffffff82c41190 r ddc_data_regs_dcn +ffffffff82c412c0 r ddc_clk_regs_dcn +ffffffff82c413f0 r ddc_shift +ffffffff82c414e0 r ddc_mask +ffffffff82c415d0 r generic_regs +ffffffff82c41604 r generic_shift +ffffffff82c4160c r generic_mask ffffffff82c42000 r funcs -ffffffff82c42050 r hpd_regs -ffffffff82c421a0 r hpd_shift -ffffffff82c421b0 r hpd_mask -ffffffff82c421c0 r ddc_data_regs_dcn -ffffffff82c42370 r ddc_clk_regs_dcn -ffffffff82c42520 r ddc_shift -ffffffff82c42640 r ddc_mask -ffffffff82c42760 r generic_regs -ffffffff82c427d0 r generic_shift -ffffffff82c427e0 r generic_mask ffffffff82c43000 r funcs +ffffffff82c43050 r hpd_regs +ffffffff82c431a0 r hpd_shift +ffffffff82c431b0 r hpd_mask +ffffffff82c431c0 r ddc_data_regs_dcn +ffffffff82c43370 r ddc_clk_regs_dcn +ffffffff82c43520 r ddc_shift +ffffffff82c43640 r ddc_mask +ffffffff82c43760 r generic_regs +ffffffff82c437d0 r generic_shift +ffffffff82c437e0 r generic_mask ffffffff82c44000 r funcs -ffffffff82c44050 r hpd_regs -ffffffff82c44168 r hpd_shift -ffffffff82c44178 r hpd_mask -ffffffff82c44190 r ddc_data_regs_dcn -ffffffff82c44300 r ddc_clk_regs_dcn -ffffffff82c44470 r ddc_shift -ffffffff82c44560 r ddc_mask -ffffffff82c44650 r generic_regs -ffffffff82c446c0 r generic_shift -ffffffff82c446d0 r generic_mask ffffffff82c45000 r funcs +ffffffff82c45050 r hpd_regs +ffffffff82c45168 r hpd_shift +ffffffff82c45178 r hpd_mask +ffffffff82c45190 r ddc_data_regs_dcn +ffffffff82c45300 r ddc_clk_regs_dcn +ffffffff82c45470 r ddc_shift +ffffffff82c45560 r ddc_mask +ffffffff82c45650 r generic_regs +ffffffff82c456c0 r generic_shift +ffffffff82c456d0 r generic_mask ffffffff82c46000 r funcs -ffffffff82c46050 r hpd_regs -ffffffff82c46168 r hpd_shift -ffffffff82c46178 r hpd_mask -ffffffff82c46190 r ddc_data_regs_dcn -ffffffff82c46340 r ddc_clk_regs_dcn -ffffffff82c464f0 r ddc_shift -ffffffff82c46610 r ddc_mask -ffffffff82c46730 r generic_regs -ffffffff82c467a0 r generic_shift -ffffffff82c467b0 r generic_mask ffffffff82c47000 r funcs +ffffffff82c47050 r hpd_regs +ffffffff82c47168 r hpd_shift +ffffffff82c47178 r hpd_mask +ffffffff82c47190 r ddc_data_regs_dcn +ffffffff82c47340 r ddc_clk_regs_dcn +ffffffff82c474f0 r ddc_shift +ffffffff82c47610 r ddc_mask +ffffffff82c47730 r generic_regs +ffffffff82c477a0 r generic_shift +ffffffff82c477b0 r generic_mask ffffffff82c48000 r funcs ffffffff82c49000 r funcs ffffffff82c4a000 r funcs -ffffffff82c4b000 r hdmi_14_protection -ffffffff82c4b010 r dp_11_protection -ffffffff82c4b020 r hdcp_i2c_offsets -ffffffff82c4b050 r hdcp_dpcd_addrs -ffffffff82c4c000 r irq_service_funcs_dce110 -ffffffff82c4c010 r irq_source_info_dce110 -ffffffff82c4d2a0 r dummy_irq_info_funcs -ffffffff82c4d2b0 r hpd_irq_info_funcs -ffffffff82c4d2c0 r hpd_rx_irq_info_funcs -ffffffff82c4d2d0 r pflip_irq_info_funcs -ffffffff82c4d2e0 r vupdate_irq_info_funcs -ffffffff82c4d2f0 r vblank_irq_info_funcs -ffffffff82c4e000 r irq_service_funcs_dce120 -ffffffff82c4e008 r dummy_irq_info_funcs -ffffffff82c4e018 r hpd_irq_info_funcs -ffffffff82c4e028 r hpd_rx_irq_info_funcs -ffffffff82c4e038 r pflip_irq_info_funcs -ffffffff82c4e048 r vupdate_irq_info_funcs -ffffffff82c4e058 r vblank_irq_info_funcs -ffffffff82c4e070 r irq_source_info_dce120 -ffffffff82c50000 r irq_service_funcs_dce80 -ffffffff82c50008 r dummy_irq_info_funcs -ffffffff82c50018 r hpd_irq_info_funcs -ffffffff82c50028 r hpd_rx_irq_info_funcs -ffffffff82c50038 r pflip_irq_info_funcs -ffffffff82c50048 r vupdate_irq_info_funcs -ffffffff82c50058 r vblank_irq_info_funcs -ffffffff82c50070 r irq_source_info_dce80 -ffffffff82c52000 r irq_service_funcs_dcn10 -ffffffff82c52008 r dummy_irq_info_funcs -ffffffff82c52018 r hpd_irq_info_funcs -ffffffff82c52028 r hpd_rx_irq_info_funcs -ffffffff82c52038 r pflip_irq_info_funcs -ffffffff82c52048 r vupdate_no_lock_irq_info_funcs -ffffffff82c52058 r vblank_irq_info_funcs -ffffffff82c52068 r vline0_irq_info_funcs -ffffffff82c52080 r irq_source_info_dcn10 -ffffffff82c54000 r irq_service_funcs_dcn20 -ffffffff82c54008 r dummy_irq_info_funcs -ffffffff82c54018 r hpd_irq_info_funcs -ffffffff82c54028 r hpd_rx_irq_info_funcs -ffffffff82c54038 r pflip_irq_info_funcs -ffffffff82c54048 r vupdate_no_lock_irq_info_funcs -ffffffff82c54058 r vblank_irq_info_funcs -ffffffff82c54068 r vline0_irq_info_funcs -ffffffff82c54080 r irq_source_info_dcn20 -ffffffff82c56000 r irq_service_funcs_dcn201 -ffffffff82c56008 r dummy_irq_info_funcs -ffffffff82c56018 r hpd_irq_info_funcs -ffffffff82c56028 r hpd_rx_irq_info_funcs -ffffffff82c56038 r pflip_irq_info_funcs -ffffffff82c56048 r vupdate_no_lock_irq_info_funcs -ffffffff82c56058 r vblank_irq_info_funcs -ffffffff82c56068 r vline0_irq_info_funcs -ffffffff82c56080 r irq_source_info_dcn201 -ffffffff82c58000 r irq_source_info_dcn21 -ffffffff82c59290 r irq_service_funcs_dcn21 -ffffffff82c59298 r dummy_irq_info_funcs -ffffffff82c592a8 r hpd_irq_info_funcs -ffffffff82c592b8 r hpd_rx_irq_info_funcs -ffffffff82c592c8 r pflip_irq_info_funcs -ffffffff82c592d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c592e8 r vblank_irq_info_funcs -ffffffff82c592f8 r vline0_irq_info_funcs -ffffffff82c59308 r dmub_outbox_irq_info_funcs -ffffffff82c5a000 r irq_source_info_dcn30 -ffffffff82c5b290 r irq_service_funcs_dcn30 -ffffffff82c5b298 r dummy_irq_info_funcs -ffffffff82c5b2a8 r hpd_irq_info_funcs -ffffffff82c5b2b8 r hpd_rx_irq_info_funcs -ffffffff82c5b2c8 r pflip_irq_info_funcs -ffffffff82c5b2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c5b2e8 r vblank_irq_info_funcs -ffffffff82c5b2f8 r vline0_irq_info_funcs -ffffffff82c5b308 r dmub_trace_irq_info_funcs -ffffffff82c5c000 r irq_source_info_dcn302 -ffffffff82c5d290 r irq_service_funcs_dcn302 -ffffffff82c5d298 r dummy_irq_info_funcs -ffffffff82c5d2a8 r hpd_irq_info_funcs -ffffffff82c5d2b8 r hpd_rx_irq_info_funcs -ffffffff82c5d2c8 r pflip_irq_info_funcs -ffffffff82c5d2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c5d2e8 r vblank_irq_info_funcs -ffffffff82c5d2f8 r vline0_irq_info_funcs -ffffffff82c5d308 r dmub_trace_irq_info_funcs -ffffffff82c5e000 r irq_service_funcs_dcn303 -ffffffff82c5e008 r dummy_irq_info_funcs -ffffffff82c5e018 r hpd_irq_info_funcs -ffffffff82c5e028 r hpd_rx_irq_info_funcs -ffffffff82c5e038 r pflip_irq_info_funcs -ffffffff82c5e048 r vupdate_no_lock_irq_info_funcs -ffffffff82c5e058 r vblank_irq_info_funcs -ffffffff82c5e068 r vline0_irq_info_funcs -ffffffff82c5e080 r irq_source_info_dcn303 -ffffffff82c60000 r irq_source_info_dcn31 -ffffffff82c61290 r irq_service_funcs_dcn31 -ffffffff82c61298 r dummy_irq_info_funcs -ffffffff82c612a8 r hpd_irq_info_funcs -ffffffff82c612b8 r hpd_rx_irq_info_funcs -ffffffff82c612c8 r pflip_irq_info_funcs -ffffffff82c612d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c612e8 r vblank_irq_info_funcs -ffffffff82c612f8 r vline0_irq_info_funcs -ffffffff82c61308 r outbox_irq_info_funcs -ffffffff82c62000 r irq_source_info_dcn314 -ffffffff82c63290 r irq_service_funcs_dcn314 -ffffffff82c63298 r dummy_irq_info_funcs -ffffffff82c632a8 r hpd_irq_info_funcs -ffffffff82c632b8 r hpd_rx_irq_info_funcs -ffffffff82c632c8 r pflip_irq_info_funcs -ffffffff82c632d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c632e8 r vblank_irq_info_funcs -ffffffff82c632f8 r vline0_irq_info_funcs -ffffffff82c63308 r outbox_irq_info_funcs -ffffffff82c64000 r irq_source_info_dcn315 -ffffffff82c65290 r irq_service_funcs_dcn315 -ffffffff82c65298 r dummy_irq_info_funcs -ffffffff82c652a8 r hpd_irq_info_funcs -ffffffff82c652b8 r hpd_rx_irq_info_funcs -ffffffff82c652c8 r pflip_irq_info_funcs -ffffffff82c652d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c652e8 r vblank_irq_info_funcs -ffffffff82c652f8 r vline0_irq_info_funcs -ffffffff82c65308 r outbox_irq_info_funcs -ffffffff82c66000 r irq_source_info_dcn32 -ffffffff82c67290 r irq_service_funcs_dcn32 -ffffffff82c67298 r dummy_irq_info_funcs -ffffffff82c672a8 r hpd_irq_info_funcs -ffffffff82c672b8 r hpd_rx_irq_info_funcs -ffffffff82c672c8 r pflip_irq_info_funcs -ffffffff82c672d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c672e8 r vblank_irq_info_funcs -ffffffff82c672f8 r vline0_irq_info_funcs -ffffffff82c67308 r outbox_irq_info_funcs -ffffffff82c68000 r dio_link_hwss -ffffffff82c69000 r dpia_link_hwss -ffffffff82c6a000 r hpo_dp_link_hwss -ffffffff82c6b000 r virtual_lnk_enc_funcs -ffffffff82c6c000 r virtual_link_hwss -ffffffff82c6d000 r virtual_str_enc_funcs -ffffffff82c6e000 R dmub_srv_dcn20_regs -ffffffff82c6f000 R dmub_srv_dcn21_regs -ffffffff82c70000 R dmub_srv_dcn30_regs -ffffffff82c71000 R dmub_srv_dcn301_regs -ffffffff82c72000 R dmub_srv_dcn302_regs -ffffffff82c73000 R dmub_srv_dcn303_regs -ffffffff82c74000 R dmub_srv_dcn31_regs -ffffffff82c75000 R dmub_srv_dcn315_regs -ffffffff82c76000 R dmub_srv_dcn316_regs -ffffffff82c77000 R dmub_srv_dcn32_regs -ffffffff82c78000 r numerator01 -ffffffff82c78020 r numerator02 -ffffffff82c78040 r numerator04 -ffffffff82c78060 r numerator05 -ffffffff82c7a000 r abm_settings -ffffffff82c7a010 r abm_settings_config0 -ffffffff82c7a050 r abm_settings_config1 -ffffffff82c7a088 r min_reduction_table_v_2_2 -ffffffff82c7a095 r max_reduction_table_v_2_2 -ffffffff82c7a0a2 r min_reduction_table -ffffffff82c7a0af r max_reduction_table -ffffffff82c7b000 R amdgpu_pp_profile_name -ffffffff82c7c000 r pp_lib_thermal_controller_names -ffffffff82c7d000 r pp_ip_funcs -ffffffff82c7d0a0 R pp_smu_ip_block -ffffffff82c7d0b8 r pp_dpm_funcs -ffffffff82c7e000 r gpio_tbl -ffffffff82c7e0f0 r enable_fb_req_rej_tbl -ffffffff82c7e140 r use_bclk_tbl -ffffffff82c7e310 r turn_off_plls_tbl -ffffffff82c7e640 r enter_baco_tbl -ffffffff82c7e730 r exit_baco_tbl -ffffffff82c7e850 r clean_baco_tbl +ffffffff82c4b000 r funcs +ffffffff82c4c000 r hdmi_14_protection +ffffffff82c4c010 r dp_11_protection +ffffffff82c4c020 r hdcp_i2c_offsets +ffffffff82c4c050 r hdcp_dpcd_addrs +ffffffff82c4d000 r irq_service_funcs_dce110 +ffffffff82c4d010 r irq_source_info_dce110 +ffffffff82c4e2a0 r dummy_irq_info_funcs +ffffffff82c4e2b0 r hpd_irq_info_funcs +ffffffff82c4e2c0 r hpd_rx_irq_info_funcs +ffffffff82c4e2d0 r pflip_irq_info_funcs +ffffffff82c4e2e0 r vupdate_irq_info_funcs +ffffffff82c4e2f0 r vblank_irq_info_funcs +ffffffff82c4f000 r irq_service_funcs_dce120 +ffffffff82c4f008 r dummy_irq_info_funcs +ffffffff82c4f018 r hpd_irq_info_funcs +ffffffff82c4f028 r hpd_rx_irq_info_funcs +ffffffff82c4f038 r pflip_irq_info_funcs +ffffffff82c4f048 r vupdate_irq_info_funcs +ffffffff82c4f058 r vblank_irq_info_funcs +ffffffff82c4f070 r irq_source_info_dce120 +ffffffff82c51000 r irq_service_funcs_dce80 +ffffffff82c51008 r dummy_irq_info_funcs +ffffffff82c51018 r hpd_irq_info_funcs +ffffffff82c51028 r hpd_rx_irq_info_funcs +ffffffff82c51038 r pflip_irq_info_funcs +ffffffff82c51048 r vupdate_irq_info_funcs +ffffffff82c51058 r vblank_irq_info_funcs +ffffffff82c51070 r irq_source_info_dce80 +ffffffff82c53000 r irq_service_funcs_dcn10 +ffffffff82c53008 r dummy_irq_info_funcs +ffffffff82c53018 r hpd_irq_info_funcs +ffffffff82c53028 r hpd_rx_irq_info_funcs +ffffffff82c53038 r pflip_irq_info_funcs +ffffffff82c53048 r vupdate_no_lock_irq_info_funcs +ffffffff82c53058 r vblank_irq_info_funcs +ffffffff82c53068 r vline0_irq_info_funcs +ffffffff82c53080 r irq_source_info_dcn10 +ffffffff82c55000 r irq_service_funcs_dcn20 +ffffffff82c55008 r dummy_irq_info_funcs +ffffffff82c55018 r hpd_irq_info_funcs +ffffffff82c55028 r hpd_rx_irq_info_funcs +ffffffff82c55038 r pflip_irq_info_funcs +ffffffff82c55048 r vupdate_no_lock_irq_info_funcs +ffffffff82c55058 r vblank_irq_info_funcs +ffffffff82c55068 r vline0_irq_info_funcs +ffffffff82c55080 r irq_source_info_dcn20 +ffffffff82c57000 r irq_service_funcs_dcn201 +ffffffff82c57008 r dummy_irq_info_funcs +ffffffff82c57018 r hpd_irq_info_funcs +ffffffff82c57028 r hpd_rx_irq_info_funcs +ffffffff82c57038 r pflip_irq_info_funcs +ffffffff82c57048 r vupdate_no_lock_irq_info_funcs +ffffffff82c57058 r vblank_irq_info_funcs +ffffffff82c57068 r vline0_irq_info_funcs +ffffffff82c57080 r irq_source_info_dcn201 +ffffffff82c59000 r irq_source_info_dcn21 +ffffffff82c5a290 r irq_service_funcs_dcn21 +ffffffff82c5a298 r dummy_irq_info_funcs +ffffffff82c5a2a8 r hpd_irq_info_funcs +ffffffff82c5a2b8 r hpd_rx_irq_info_funcs +ffffffff82c5a2c8 r pflip_irq_info_funcs +ffffffff82c5a2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c5a2e8 r vblank_irq_info_funcs +ffffffff82c5a2f8 r vline0_irq_info_funcs +ffffffff82c5a308 r dmub_outbox_irq_info_funcs +ffffffff82c5b000 r irq_source_info_dcn30 +ffffffff82c5c290 r irq_service_funcs_dcn30 +ffffffff82c5c298 r dummy_irq_info_funcs +ffffffff82c5c2a8 r hpd_irq_info_funcs +ffffffff82c5c2b8 r hpd_rx_irq_info_funcs +ffffffff82c5c2c8 r pflip_irq_info_funcs +ffffffff82c5c2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c5c2e8 r vblank_irq_info_funcs +ffffffff82c5c2f8 r vline0_irq_info_funcs +ffffffff82c5c308 r dmub_trace_irq_info_funcs +ffffffff82c5d000 r irq_source_info_dcn302 +ffffffff82c5e290 r irq_service_funcs_dcn302 +ffffffff82c5e298 r dummy_irq_info_funcs +ffffffff82c5e2a8 r hpd_irq_info_funcs +ffffffff82c5e2b8 r hpd_rx_irq_info_funcs +ffffffff82c5e2c8 r pflip_irq_info_funcs +ffffffff82c5e2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c5e2e8 r vblank_irq_info_funcs +ffffffff82c5e2f8 r vline0_irq_info_funcs +ffffffff82c5e308 r dmub_trace_irq_info_funcs +ffffffff82c5f000 r irq_service_funcs_dcn303 +ffffffff82c5f008 r dummy_irq_info_funcs +ffffffff82c5f018 r hpd_irq_info_funcs +ffffffff82c5f028 r hpd_rx_irq_info_funcs +ffffffff82c5f038 r pflip_irq_info_funcs +ffffffff82c5f048 r vupdate_no_lock_irq_info_funcs +ffffffff82c5f058 r vblank_irq_info_funcs +ffffffff82c5f068 r vline0_irq_info_funcs +ffffffff82c5f080 r irq_source_info_dcn303 +ffffffff82c61000 r irq_source_info_dcn31 +ffffffff82c62290 r irq_service_funcs_dcn31 +ffffffff82c62298 r dummy_irq_info_funcs +ffffffff82c622a8 r hpd_irq_info_funcs +ffffffff82c622b8 r hpd_rx_irq_info_funcs +ffffffff82c622c8 r pflip_irq_info_funcs +ffffffff82c622d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c622e8 r vblank_irq_info_funcs +ffffffff82c622f8 r vline0_irq_info_funcs +ffffffff82c62308 r outbox_irq_info_funcs +ffffffff82c63000 r irq_source_info_dcn314 +ffffffff82c64290 r irq_service_funcs_dcn314 +ffffffff82c64298 r dummy_irq_info_funcs +ffffffff82c642a8 r hpd_irq_info_funcs +ffffffff82c642b8 r hpd_rx_irq_info_funcs +ffffffff82c642c8 r pflip_irq_info_funcs +ffffffff82c642d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c642e8 r vblank_irq_info_funcs +ffffffff82c642f8 r vline0_irq_info_funcs +ffffffff82c64308 r outbox_irq_info_funcs +ffffffff82c65000 r irq_source_info_dcn315 +ffffffff82c66290 r irq_service_funcs_dcn315 +ffffffff82c66298 r dummy_irq_info_funcs +ffffffff82c662a8 r hpd_irq_info_funcs +ffffffff82c662b8 r hpd_rx_irq_info_funcs +ffffffff82c662c8 r pflip_irq_info_funcs +ffffffff82c662d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c662e8 r vblank_irq_info_funcs +ffffffff82c662f8 r vline0_irq_info_funcs +ffffffff82c66308 r outbox_irq_info_funcs +ffffffff82c67000 r irq_source_info_dcn32 +ffffffff82c68290 r irq_service_funcs_dcn32 +ffffffff82c68298 r dummy_irq_info_funcs +ffffffff82c682a8 r hpd_irq_info_funcs +ffffffff82c682b8 r hpd_rx_irq_info_funcs +ffffffff82c682c8 r pflip_irq_info_funcs +ffffffff82c682d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c682e8 r vblank_irq_info_funcs +ffffffff82c682f8 r vline0_irq_info_funcs +ffffffff82c68308 r outbox_irq_info_funcs +ffffffff82c69000 r dio_link_hwss +ffffffff82c6a000 r dpia_link_hwss +ffffffff82c6b000 r hpo_dp_link_hwss +ffffffff82c6c000 r virtual_lnk_enc_funcs +ffffffff82c6d000 r virtual_link_hwss +ffffffff82c6e000 r virtual_str_enc_funcs +ffffffff82c6f000 R dmub_srv_dcn20_regs +ffffffff82c70000 R dmub_srv_dcn21_regs +ffffffff82c71000 R dmub_srv_dcn30_regs +ffffffff82c72000 R dmub_srv_dcn301_regs +ffffffff82c73000 R dmub_srv_dcn302_regs +ffffffff82c74000 R dmub_srv_dcn303_regs +ffffffff82c75000 R dmub_srv_dcn31_regs +ffffffff82c76000 R dmub_srv_dcn315_regs +ffffffff82c77000 R dmub_srv_dcn316_regs +ffffffff82c78000 R dmub_srv_dcn32_regs +ffffffff82c79000 r numerator01 +ffffffff82c79020 r numerator02 +ffffffff82c79040 r numerator04 +ffffffff82c79060 r numerator05 +ffffffff82c7b000 r abm_settings +ffffffff82c7b010 r abm_settings_config0 +ffffffff82c7b050 r abm_settings_config1 +ffffffff82c7b088 r min_reduction_table_v_2_2 +ffffffff82c7b095 r max_reduction_table_v_2_2 +ffffffff82c7b0a2 r min_reduction_table +ffffffff82c7b0af r max_reduction_table +ffffffff82c7c000 R amdgpu_pp_profile_name +ffffffff82c7d000 r pp_lib_thermal_controller_names +ffffffff82c7e000 r pp_ip_funcs +ffffffff82c7e0a0 R pp_smu_ip_block +ffffffff82c7e0b8 r pp_dpm_funcs ffffffff82c7f000 r gpio_tbl ffffffff82c7f0f0 r enable_fb_req_rej_tbl ffffffff82c7f140 r use_bclk_tbl -ffffffff82c7f2e0 r turn_off_plls_tbl -ffffffff82c7f370 r clk_req_b_tbl -ffffffff82c7f490 r enter_baco_tbl -ffffffff82c7f5b0 r exit_baco_tbl -ffffffff82c7f6d0 r clean_baco_tbl +ffffffff82c7f310 r turn_off_plls_tbl +ffffffff82c7f640 r enter_baco_tbl +ffffffff82c7f730 r exit_baco_tbl +ffffffff82c7f850 r clean_baco_tbl ffffffff82c80000 r gpio_tbl ffffffff82c800f0 r enable_fb_req_rej_tbl -ffffffff82c80140 r use_bclk_tbl_vg -ffffffff82c80200 r turn_off_plls_tbl_vg -ffffffff82c80350 r use_bclk_tbl -ffffffff82c80440 r turn_off_plls_tbl -ffffffff82c805f0 r clk_req_b_tbl -ffffffff82c80710 r enter_baco_tbl -ffffffff82c80830 r exit_baco_tbl -ffffffff82c80950 r clean_baco_tbl -ffffffff82c81000 r vega10_fuses_default -ffffffff82c90000 r pp_r600_encode_lanes -ffffffff82c91000 R pptable_v1_0_funcs -ffffffff82c92000 R pptable_funcs -ffffffff82c92020 r soft_dummy_pp_table -ffffffff82c93000 r smu10_hwmgr_funcs -ffffffff82c94000 r smu7_hwmgr_funcs -ffffffff82c942f8 r smu7_irq_funcs -ffffffff82c94310 r SMU7ThermalPolicy -ffffffff82c95000 r GCCACConfig_Polaris10 -ffffffff82c951b0 r DIDTConfig_Polaris10 -ffffffff82c95a50 r GCCACConfig_Polaris11 -ffffffff82c95c00 r DIDTConfig_Polaris11_Kicker -ffffffff82c964a0 r DIDTConfig_Polaris11 -ffffffff82c96d40 r DIDTConfig_Polaris12 -ffffffff82c975e0 r GCCACConfig_VegaM -ffffffff82c97790 r DIDTConfig_VegaM -ffffffff82c99000 r smu8_hwmgr_funcs -ffffffff82c992f0 r SMU7ThermalPolicy -ffffffff82c9a000 r smu9_irq_funcs -ffffffff82c9b000 r gpio_tbl_iceland -ffffffff82c9b060 r gpio_tbl -ffffffff82c9b150 r enable_fb_req_rej_tbl -ffffffff82c9b1a0 r use_bclk_tbl -ffffffff82c9b370 r turn_off_plls_tbl -ffffffff82c9b610 r enter_baco_tbl -ffffffff82c9b730 r exit_baco_tbl_iceland -ffffffff82c9b870 r clean_baco_tbl_iceland -ffffffff82c9b890 r exit_baco_tbl -ffffffff82c9b9b0 r clean_baco_tbl -ffffffff82c9c000 r pre_baco_tbl -ffffffff82c9c090 r enter_baco_tbl -ffffffff82c9c2b0 r exit_baco_tbl -ffffffff82c9c520 r clean_baco_tbl -ffffffff82c9d000 r vega10_hwmgr_funcs -ffffffff82c9d2f0 r channel_number -ffffffff82c9d320 r SMU7ThermalWithDelayPolicy -ffffffff82c9e000 r SEDiDtStallCtrlConfig_vega10 -ffffffff82c9e110 r SEDiDtStallPatternConfig_vega10 -ffffffff82c9e2e0 r SEDiDtWeightConfig_Vega10 -ffffffff82c9e3b0 r SEDiDtCtrl1Config_Vega10 -ffffffff82c9e440 r SEDiDtCtrl2Config_Vega10 -ffffffff82c9e510 r SEDiDtCtrl3Config_vega10 -ffffffff82c9e820 r SEDiDtTuningCtrlConfig_Vega10 -ffffffff82c9e8b0 r SELCacConfig_Vega10 -ffffffff82c9ea40 r SEDiDtCtrl0Config_Vega10 -ffffffff82c9ed10 r AvfsPSMInitConfig_vega10 -ffffffff82c9ed90 r SEEDCStallPatternConfig_Vega10 -ffffffff82c9eea0 r SEEDCStallDelayConfig_Vega10 -ffffffff82c9ef80 r SEEDCCtrlConfig_Vega10 -ffffffff82c9f040 r PSMSEEDCStallPatternConfig_Vega10 -ffffffff82c9f0c0 r PSMSEEDCStallDelayConfig_Vega10 -ffffffff82c9f1d0 r PSMSEEDCCtrlResetConfig_Vega10 -ffffffff82c9f290 r PSMSEEDCCtrlConfig_Vega10 -ffffffff82c9f350 r SEEDCForceStallPatternConfig_Vega10 -ffffffff82c9f3e0 r SEEDCCtrlForceStallConfig_Vega10 -ffffffff82ca0000 R vega10_pptable_funcs -ffffffff82ca1000 r pre_baco_tbl -ffffffff82ca1090 r enter_baco_tbl -ffffffff82ca12b0 r exit_baco_tbl -ffffffff82ca1520 r clean_baco_tbl -ffffffff82ca2000 r vega12_hwmgr_funcs -ffffffff82ca22f0 r SMU7ThermalWithDelayPolicy -ffffffff82ca2340 r link_width -ffffffff82ca3000 R vega12_pptable_funcs -ffffffff82ca4000 r clean_baco_tbl -ffffffff82ca5000 r vega20_hwmgr_funcs -ffffffff82ca52f0 r SMU7ThermalWithDelayPolicy -ffffffff82ca5340 r link_width -ffffffff82ca6000 R vega20_pptable_funcs -ffffffff82ca7000 R ci_smu_funcs -ffffffff82ca70e0 r defaults_hawaii_pro -ffffffff82ca712c r defaults_hawaii_xt -ffffffff82ca7178 r defaults_saturn_xt -ffffffff82ca71c4 r defaults_bonaire_xt -ffffffff82ca7210 r ci_program_jump_on_start.data -ffffffff82ca8000 R fiji_smu_funcs -ffffffff82ca80e0 r avfs_graphics_level -ffffffff82ca8240 r fiji_power_tune_data_set_array -ffffffff82ca8246 r fiji_clock_stretch_amount_conversion -ffffffff82ca8260 r fiji_clock_stretcher_ddt_table -ffffffff82ca9000 R iceland_smu_funcs -ffffffff82ca90e0 r defaults_icelandxt -ffffffff82ca912c r defaults_icelandpro -ffffffff82ca9178 r defaults_iceland -ffffffff82caa000 R polaris10_smu_funcs -ffffffff82caa0e0 r avfs_graphics_level_polaris10 -ffffffff82caa2a0 r avfs_memory_level_polaris10 -ffffffff82caa2c0 r polaris10_power_tune_data_set_array -ffffffff82caa310 r Range_Table -ffffffff82cab000 R smu10_smu_funcs -ffffffff82cac000 r smu7_program_jump_on_start.data -ffffffff82cac010 r pwr_virus_table_pre -ffffffff82cac680 r pwr_virus_table_post -ffffffff82cacf80 r pwr_virus_section1 -ffffffff82cad610 r pwr_virus_section2 -ffffffff82cad660 r pwr_virus_section3 -ffffffff82cb4ab0 r pwr_virus_section4 -ffffffff82cb4e80 r pwr_virus_section5 -ffffffff82cb5490 r pwr_virus_section6 -ffffffff82cb7000 R smu8_smu_funcs -ffffffff82cb8000 R tonga_smu_funcs -ffffffff82cb80e0 r tonga_power_tune_data_set_array -ffffffff82cb812c r tonga_clock_stretch_amount_conversion -ffffffff82cb8140 r tonga_clock_stretcher_ddt_table -ffffffff82cb9000 R vega10_smu_funcs -ffffffff82cba000 R vega12_smu_funcs -ffffffff82cbb000 R vega20_smu_funcs -ffffffff82cbc000 R vegam_smu_funcs -ffffffff82cbc0e0 r vegam_power_tune_data_set_array -ffffffff82cbc130 r Range_Table -ffffffff82cbd000 R smu_ip_funcs -ffffffff82cbd0a0 R smu_v11_0_ip_block -ffffffff82cbd0b8 R smu_v12_0_ip_block -ffffffff82cbd0d0 R smu_v13_0_ip_block -ffffffff82cbd0e8 r swsmu_pm_funcs -ffffffff82cbe000 r arcturus_table_map -ffffffff82cbe080 r arcturus_pwr_src_map -ffffffff82cbe090 r arcturus_workload_map -ffffffff82cbe0d0 r arcturus_ppt_funcs -ffffffff82cbe4a0 r smu11_thermal_policy -ffffffff82cbe4f0 r arcturus_i2c_algo -ffffffff82cbe500 r arcturus_i2c_control_quirks -ffffffff82cbe510 r arcturus_throttler_map -ffffffff82cbe530 r arcturus_message_map -ffffffff82cbef80 r arcturus_clk_map -ffffffff82cbf040 r arcturus_feature_mask_map -ffffffff82cc0000 r cyan_skillfish_ppt_funcs -ffffffff82cc1000 r navi10_ppt_funcs -ffffffff82cc13d0 r smu11_thermal_policy -ffffffff82cc1420 r navi10_i2c_algo -ffffffff82cc1430 r navi10_i2c_control_quirks -ffffffff82cc1440 r navi1x_throttler_map -ffffffff82cc1460 r NoDbiPrbs7 -ffffffff82cc2460 r DbiPrbs7 -ffffffff82cc4000 r sienna_cichlid_ppt_funcs -ffffffff82cc43d0 r smu11_thermal_policy -ffffffff82cc4420 r sienna_cichlid_i2c_algo -ffffffff82cc4430 r sienna_cichlid_i2c_control_quirks -ffffffff82cc4440 r sienna_cichlid_throttler_map -ffffffff82cc5000 r smu_v11_0_irq_funcs -ffffffff82cc5010 r link_width -ffffffff82cc6000 r vangogh_ppt_funcs -ffffffff82cc63d0 r vangogh_throttler_map -ffffffff82cc7000 r renoir_ppt_funcs -ffffffff82cc73d0 r renoir_throttler_map -ffffffff82cc8000 r aldebaran_clk_map -ffffffff82cc80c0 r aldebaran_table_map -ffffffff82cc8140 r aldebaran_ppt_funcs -ffffffff82cc8510 r smu13_thermal_policy -ffffffff82cc8560 r aldebaran_i2c_algo -ffffffff82cc8570 r aldebaran_i2c_control_quirks -ffffffff82cc8580 r aldebaran_throttler_map -ffffffff82cc85a0 r aldebaran_message_map -ffffffff82cc8ff0 r aldebaran_feature_mask_map -ffffffff82cca000 r smu_v13_0_irq_funcs -ffffffff82cca010 r link_width -ffffffff82ccb000 r smu_v13_0_0_ppt_funcs -ffffffff82ccb3d0 r smu13_thermal_policy -ffffffff82ccb420 r smu_v13_0_0_i2c_algo -ffffffff82ccb430 r smu_v13_0_0_i2c_control_quirks -ffffffff82ccb440 r smu_v13_0_0_throttler_map -ffffffff82ccc000 r smu_v13_0_4_ppt_funcs -ffffffff82ccd000 r smu_v13_0_5_ppt_funcs -ffffffff82cce000 r smu_v13_0_7_ppt_funcs -ffffffff82cce3d0 r smu13_thermal_policy -ffffffff82cce420 r smu_v13_0_7_throttler_map -ffffffff82ccf000 r yellow_carp_ppt_funcs -ffffffff82cd0000 r __smu_message_names -ffffffff82cd1000 R pchb_ca -ffffffff82cd2000 R amas_ca -ffffffff82cd2028 R amas_devices -ffffffff82cd2040 r amas_feature -ffffffff82cd3000 R cardslot_ca -ffffffff82cd4000 R cardbus_ca -ffffffff82cd5000 R com_cardbus_ca -ffffffff82cd6000 R xl_cardbus_ca -ffffffff82cd6030 R xl_cardbus_products -ffffffff82cd7000 R dc_cardbus_ca -ffffffff82cd7030 R dc_cardbus_devices -ffffffff82cd8000 R fxp_cardbus_ca -ffffffff82cd8028 R fxp_cardbus_devices -ffffffff82cd9000 R rl_cardbus_devices -ffffffff82cd9028 R rl_cardbus_ca -ffffffff82cda000 R re_cardbus_ca -ffffffff82cda028 R re_cardbus_devices -ffffffff82cdb000 R ath_cardbus_ca -ffffffff82cdc000 R athn_cardbus_ca -ffffffff82cdc030 r athn_cardbus_devices -ffffffff82cdd000 R atw_cardbus_ca -ffffffff82cdd028 R atw_cardbus_devices -ffffffff82cde000 R rtw_cardbus_ca -ffffffff82cde028 R rtw_cardbus_devices -ffffffff82cdf000 R ral_cardbus_ca -ffffffff82cdf030 r ral_cardbus_devices -ffffffff82ce0000 R acx_cardbus_ca -ffffffff82ce0028 r acx_cardbus_devices -ffffffff82ce1000 R pgt_cardbus_ca -ffffffff82ce1028 R pgt_cardbus_devices -ffffffff82ce2000 R ehci_cardbus_ca -ffffffff82ce3000 R ohci_cardbus_ca -ffffffff82ce4000 R uhci_cardbus_ca -ffffffff82ce5000 R malo_cardbus_ca -ffffffff82ce5028 r malo_cardbus_devices -ffffffff82ce6000 R bwi_cardbus_ca -ffffffff82ce6030 r bwi_cardbus_devices -ffffffff82ce7000 R pcmcia_ca -ffffffff82ce8000 r pcmcia_parse_cis_tuple.init_cfe -ffffffff82ce9000 r pcmcia_cis_quirks -ffffffff82cea000 R ep_pcmcia_ca -ffffffff82ceb000 R ne_pcmcia_ca -ffffffff82ceb030 R ne2000devs -ffffffff82ced000 R aic_pcmcia_ca -ffffffff82cee000 R com_pcmcia_ca -ffffffff82cef000 R wdc_pcmcia_ca -ffffffff82cf0000 R sm_pcmcia_ca -ffffffff82cf1000 R xe_pcmcia_ca -ffffffff82cf2000 R wi_pcmcia_ca -ffffffff82cf2030 r wi_pcmcia_products -ffffffff82cf3000 R malo_pcmcia_ca -ffffffff82cf4000 R an_pcmcia_ca -ffffffff82cf5000 R pcib_ca -ffffffff82cf6000 R amdpcib_ca -ffffffff82cf6028 R amdpcib_devices -ffffffff82cf7000 R tcpcib_ca -ffffffff82cf7028 R tcpcib_devices -ffffffff82cf8000 R aapic_ca -ffffffff82cf9000 R hme_pci_ca -ffffffff82cf9028 r hme_promhdr -ffffffff82cf902a r hme_promdat -ffffffff82cfa000 R isa_ca -ffffffff82cfb000 R isadma_ca -ffffffff82cfc000 R fdc_ca -ffffffff82cfd000 R fd_ca -ffffffff82cfe000 R com_isa_ca -ffffffff82cff000 R pckbc_isa_ca -ffffffff82d00000 R vga_isa_ca -ffffffff82d01000 R wdc_isa_ca -ffffffff82d02000 R mpu_midi_hw_if -ffffffff82d03000 R mpu_isa_ca -ffffffff82d04000 R pcppi_ca -ffffffff82d05000 R spkr_ca -ffffffff82d05030 r pitchtab -ffffffff82d06000 R lpt_isa_ca -ffffffff82d07000 R wbsio_ca -ffffffff82d08000 R schsio_ca -ffffffff82d09000 R lm_isa_ca -ffffffff82d09028 R lm_wbsio_ca -ffffffff82d0a000 R it_sensors -ffffffff82d0a110 R it_vrfact -ffffffff82d0a140 R it_fan_regs -ffffffff82d0a160 R it_fan_ext_regs -ffffffff82d0a178 R it_ca -ffffffff82d0b000 R abitkv_sensors -ffffffff82d0b200 R abitaa_sensors -ffffffff82d0b480 R abitav_sensors -ffffffff82d0b700 R abitas_sensors -ffffffff82d0b980 R abitax_sensors -ffffffff82d0bbc0 R abitm4_sensors -ffffffff82d0be80 R abitan_sensors -ffffffff82d0c120 R abital_sensors -ffffffff82d0c3a0 R abitaw_sensors -ffffffff82d0c700 R abitni_sensors -ffffffff82d0c9a0 R abitat_sensors -ffffffff82d0ccc0 R abitan2_sensors -ffffffff82d0cf60 R abitab_sensors -ffffffff82d0d220 R abitan3_sensors -ffffffff82d0d500 R abitaw2_sensors -ffffffff82d0d860 R abitat2_sensors -ffffffff82d0db60 R abitab2_sensors -ffffffff82d0dea0 R abitin_sensors -ffffffff82d0e1e0 R uguru_ca -ffffffff82d0f000 R aps_ca -ffffffff82d10000 R wsdisplay_emul_ca -ffffffff82d10030 r charClass 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ppsratecheck_mtx -ffffffff83136030 D resettodr_to -ffffffff83136078 D resettodr_task -ffffffff83137000 D timeout_mutex -ffffffff83138000 D wdog_auto -ffffffff83139000 D taskq_sys -ffffffff83139050 D taskq_sys_mp -ffffffff8313a000 D ccpu -ffffffff8313a004 D perflevel -ffffffff8313a008 D perfpolicy -ffffffff8313a010 D setperf_to -ffffffff8313b000 D autoconf_attdet_mtx -ffffffff8313b010 D msgs -ffffffff8313c000 d evcount_list -ffffffff8313c010 d evcount_percpu_init_list -ffffffff8313d000 D syslogf_rwlock -ffffffff8313d010 D log_mtx -ffffffff8313d020 D logstash_in -ffffffff8313d028 D logstash_out -ffffffff8313d030 D logstash_rwlock -ffffffff8313e000 D pool_head -ffffffff8313e010 D pool_lock -ffffffff8313e020 D pool_debug -ffffffff8313e028 D pool_allocator_single -ffffffff8313e040 D pool_allocator_multi -ffffffff8313e058 D pool_allocator_multi_ni -ffffffff8313e070 D pool_gc_tick -ffffffff8313e0b8 D pool_gc_task -ffffffff8313f000 D kprintf_mutex -ffffffff8313f010 D db_panic -ffffffff8313f014 D splassert_ctl -ffffffff8313f018 D v_putc -ffffffff8313f020 D printf_flags -ffffffff83140000 D userconf_base -ffffffff83140004 D userconf_maxdev -ffffffff83140008 D userconf_totdev -ffffffff8314000c D userconf_maxlocnames -ffffffff83140010 D userconf_cnt -ffffffff83140014 D userconf_lines -ffffffff83140018 D userconf_histsz -ffffffff83140020 D userconf_cmds -ffffffff83141000 D ftlock -ffffffff83142000 d ppollcollect.poll_errintvl -ffffffff83143000 D ttydefchars -ffffffff83143014 D ttclos -ffffffff8314301b D ttopen -ffffffff83143022 D ttybg -ffffffff83143028 D ttyin -ffffffff8314302e D ttyout -ffffffff83143038 D ttylist_lock -ffffffff83144000 D linesw -ffffffff83144280 D nlinesw -ffffffff83145000 D pt_softc_lock -ffffffff83146000 d mbstat_boot_boot_cpumem -ffffffff83146080 D mbstat -ffffffff83146090 D mclsizes -ffffffff831460b0 D m_extref_mtx -ffffffff831460c0 D m_pool_allocator -ffffffff83147000 D somaxconn -ffffffff83147004 D sominconn -ffffffff83147008 D sosplice_lock -ffffffff83148000 D sb_max -ffffffff83149000 D unp_df_lock -ffffffff83149010 D unp_gc_lock -ffffffff83149020 D unp_rights_mtx -ffffffff83149030 D unp_ino_mtx -ffffffff83149040 D unp_gc_task -ffffffff83149070 D unpst_sendspace -ffffffff83149074 D unpst_recvspace -ffffffff83149078 D unpsq_sendspace -ffffffff8314907c D unpsq_recvspace -ffffffff83149080 D unpdg_sendspace -ffffffff83149084 D unpdg_recvspace -ffffffff8314a000 D doingcache -ffffffff8314b000 D maxvfsconf -ffffffff8314b010 d vfsconflist -ffffffff8314c000 D lockf_lock -ffffffff8314c010 D maxlocksperuid -ffffffff8314d000 D iftovt_tab -ffffffff8314d040 D vttoif_tab -ffffffff8314d064 D suid_clear -ffffffff8314d068 D vnode_mtx -ffffffff8314d078 D vfs_stall_lock -ffffffff8314d090 D vtypes -ffffffff8314d0e0 D vtags -ffffffff8314e000 D syncer_maxdelay -ffffffff8314e004 D syncdelay -ffffffff8314f000 D dosdirtemplate -ffffffff83150000 D ntfs_hashlock -ffffffff83151000 D ntfs_toupper_lock -ffffffff83152000 D art_table_gc_mtx -ffffffff83152010 D art_table_gc_task -ffffffff83152040 D art_node_gc_mtx -ffffffff83152050 D art_node_gc_task -ffffffff83153000 D bpf_bufsize -ffffffff83153004 D bpf_maxbufsize -ffffffff83153008 D bpf_sysctl_lk -ffffffff83154000 D ifg_head -ffffffff83154010 D if_cloners_lock -ffffffff83154020 D if_input_task_locked -ffffffff83154050 D netlock -ffffffff83154060 D ifnetlist -ffffffff83155000 D ifiq_maxlen_drop -ffffffff83155004 D ifiq_maxlen_return -ffffffff83156000 D etherbroadcastaddr -ffffffff83156006 D ether_ipmulticast_min -ffffffff8315600c D ether_ipmulticast_max -ffffffff83156012 D ether_ip6multicast_min -ffffffff83156018 D ether_ip6multicast_max -ffffffff83157000 D etherip_cloner -ffffffff83157030 D etherip_list -ffffffff83158000 D loop_cloner -ffffffff83159000 D ifmedia_mtx -ffffffff8315a000 D ppp_compressors -ffffffff8315a020 D ppp_cloner -ffffffff8315b000 D ppp_pkt_init -ffffffff8315c000 D ppp_bsd_compress -ffffffff8315d000 D ppp_deflate -ffffffff8315d070 D ppp_deflate_draft -ffffffff8315e000 D tun_cloner -ffffffff8315e030 D tap_cloner -ffffffff8315f000 D bridgeintrq -ffffffff8315f038 D bridge_cloner -ffffffff83160000 d veb_cloner -ffffffff83160030 d vport_cloner -ffffffff83161000 D vlan_tagh_lk -ffffffff83161010 D vlan_cloner -ffffffff83161040 D svlan_cloner -ffffffff83162000 D pipex_list_mtx -ffffffff83162010 D pipex_prune -ffffffff83162018 D pipexoutq -ffffffff83162050 d SHAPad2 -ffffffff83163000 D rtmap_gc -ffffffff83163018 D rt_rc -ffffffff83164000 D rt_labels -ffffffff83165000 D enc_cloner -ffffffff83166000 D gre_cloner -ffffffff83166030 D gre_list -ffffffff83166040 D mgre_cloner -ffffffff83166070 D egre_cloner -ffffffff831660a0 D nvgre_cloner -ffffffff831660d0 D eoip_cloner -ffffffff83167000 D trunk_cloner -ffffffff83168000 d aggr_cloner -ffffffff83169000 d tpmr_cloner -ffffffff8316a000 D mpe_cloner -ffffffff8316b000 D mpw_cloner -ffffffff8316c000 D mpip_cloner -ffffffff8316d000 d bpe_cloner -ffffffff8316d030 d bpe_lock -ffffffff8316e000 D vether_cloner -ffffffff8316f000 D pair_cloner -ffffffff83170000 d vxlan_cloner -ffffffff83170030 d vxlan_lock -ffffffff83170040 d vxlan_teps -ffffffff83171000 D underload_interval -ffffffff83171010 D wg_cloner -ffffffff83172000 d stoeplitz_keyseed -ffffffff83173000 D ieee80211_cache_size -ffffffff83174000 D arpt_prune -ffffffff83174004 D arpt_keep -ffffffff83174008 D arpt_down -ffffffff83174010 D arpinq -ffffffff83174048 D arp_mtx -ffffffff83174058 D arp_maxtries -ffffffff83175000 D ipport_firstauto -ffffffff83175004 D ipport_lastauto -ffffffff83175008 D ipport_hifirstauto -ffffffff8317500c D ipport_hilastauto -ffffffff83176000 D divert_sendspace -ffffffff83176004 D divert_recvspace -ffffffff83176008 D divbhashsize -ffffffff83177000 D icmptstamprepl -ffffffff83177004 D icmperrppslim -ffffffff83177008 D icmp_redirtimeout -ffffffff83178000 D ipsendredirects -ffffffff83178004 D ip_defttl -ffffffff83178008 D ip_mtudisc -ffffffff8317800c D ip_mtudisc_timeout -ffffffff83178010 D ipq_mutex -ffffffff83178020 D ip_maxqueue -ffffffff83178028 D ipintrq -ffffffff83178060 d ipsend_task -ffffffff83178090 d ipsendraw_task -ffffffff83179000 D ip_mrtproto -ffffffff83179004 d sin -ffffffff8317a000 D rip_sendspace -ffffffff8317a008 D rip_recvspace -ffffffff8317b000 D tcprexmtthresh -ffffffff8317b004 D tcptv_keep_init -ffffffff8317b008 D tcp_rst_ppslim -ffffffff8317b00c D tcp_ackdrop_ppslim -ffffffff8317b010 D tcp_syn_hash_size -ffffffff8317b014 D tcp_syn_cache_limit -ffffffff8317b018 D tcp_syn_bucket_limit -ffffffff8317b01c D tcp_syn_use_limit -ffffffff8317c000 D tcp_outflags -ffffffff8317d000 D tcp_timer_mtx -ffffffff8317d010 D tcp_mssdflt -ffffffff8317d014 D tcp_rttdflt -ffffffff8317d018 D tcp_do_rfc1323 -ffffffff8317d01c D tcp_do_sack -ffffffff8317d020 D tcp_do_rfc3390 -ffffffff8317d024 D tcp_reass_limit -ffffffff8317d028 D tcp_sackhole_limit -ffffffff8317e000 D tcp_backoff -ffffffff8317e034 D tcp_totbackoff -ffffffff8317f000 D tcp_sendspace -ffffffff8317f004 D tcp_recvspace -ffffffff8317f008 D tcp_autorcvbuf_inc -ffffffff83180000 D udpcksum -ffffffff83180004 D udp_sendspace -ffffffff83180008 D udp_recvspace -ffffffff83181000 D ipsec_flows_mtx -ffffffff83181010 D ipsec_ids_idle -ffffffff83181014 D ipsec_ids_next_flow -ffffffff83181018 D ipsec_policy_head -ffffffff83181028 D ipsp_ids_gc_timeout -ffffffff83181070 D tdb_sadb_mtx -ffffffff83181080 d tdb_hashmask -ffffffff83182000 D ipo_tdb_mtx -ffffffff83182010 D ipsec_acquire_mtx -ffffffff83182020 D ipsec_acquire_head -ffffffff83183000 D ipsec_keep_invalid -ffffffff83183004 D ipsec_require_pfs -ffffffff83183008 D ipsec_soft_timeout -ffffffff8318300c D ipsec_exp_timeout -ffffffff83183010 D ipsec_soft_first_use -ffffffff83183014 D ipsec_exp_first_use -ffffffff83183018 D ipsec_expire_acquire -ffffffff8318301c D esp_enable -ffffffff83183020 D ah_enable -ffffffff83184000 D udpencap_enable -ffffffff83184004 D udpencap_port -ffffffff83185000 D carp_vh_rc -ffffffff83185020 D carp_sc_rc -ffffffff83185040 D carp_opts -ffffffff83185058 D carp_cloner -ffffffff83185088 d carp_send_na.mcast -ffffffff83186000 d PADDING +ffffffff82c80140 r use_bclk_tbl +ffffffff82c802e0 r turn_off_plls_tbl +ffffffff82c80370 r clk_req_b_tbl +ffffffff82c80490 r enter_baco_tbl +ffffffff82c805b0 r exit_baco_tbl +ffffffff82c806d0 r clean_baco_tbl +ffffffff82c81000 r gpio_tbl +ffffffff82c810f0 r enable_fb_req_rej_tbl +ffffffff82c81140 r use_bclk_tbl_vg +ffffffff82c81200 r turn_off_plls_tbl_vg +ffffffff82c81350 r use_bclk_tbl +ffffffff82c81440 r turn_off_plls_tbl +ffffffff82c815f0 r clk_req_b_tbl +ffffffff82c81710 r enter_baco_tbl +ffffffff82c81830 r exit_baco_tbl +ffffffff82c81950 r clean_baco_tbl +ffffffff82c82000 r vega10_fuses_default +ffffffff82c91000 r pp_r600_encode_lanes +ffffffff82c92000 R pptable_v1_0_funcs +ffffffff82c93000 R pptable_funcs +ffffffff82c93020 r soft_dummy_pp_table +ffffffff82c94000 r smu10_hwmgr_funcs +ffffffff82c95000 r smu7_hwmgr_funcs +ffffffff82c952f8 r smu7_irq_funcs +ffffffff82c95310 r SMU7ThermalPolicy +ffffffff82c96000 r GCCACConfig_Polaris10 +ffffffff82c961b0 r DIDTConfig_Polaris10 +ffffffff82c96a50 r GCCACConfig_Polaris11 +ffffffff82c96c00 r DIDTConfig_Polaris11_Kicker +ffffffff82c974a0 r DIDTConfig_Polaris11 +ffffffff82c97d40 r DIDTConfig_Polaris12 +ffffffff82c985e0 r GCCACConfig_VegaM +ffffffff82c98790 r DIDTConfig_VegaM +ffffffff82c9a000 r smu8_hwmgr_funcs +ffffffff82c9a2f0 r SMU7ThermalPolicy +ffffffff82c9b000 r smu9_irq_funcs +ffffffff82c9c000 r gpio_tbl_iceland +ffffffff82c9c060 r gpio_tbl +ffffffff82c9c150 r enable_fb_req_rej_tbl +ffffffff82c9c1a0 r use_bclk_tbl +ffffffff82c9c370 r turn_off_plls_tbl +ffffffff82c9c610 r enter_baco_tbl +ffffffff82c9c730 r exit_baco_tbl_iceland +ffffffff82c9c870 r clean_baco_tbl_iceland +ffffffff82c9c890 r exit_baco_tbl +ffffffff82c9c9b0 r clean_baco_tbl +ffffffff82c9d000 r pre_baco_tbl +ffffffff82c9d090 r enter_baco_tbl +ffffffff82c9d2b0 r exit_baco_tbl +ffffffff82c9d520 r clean_baco_tbl +ffffffff82c9e000 r vega10_hwmgr_funcs +ffffffff82c9e2f0 r channel_number +ffffffff82c9e320 r SMU7ThermalWithDelayPolicy +ffffffff82c9f000 r SEDiDtStallCtrlConfig_vega10 +ffffffff82c9f110 r SEDiDtStallPatternConfig_vega10 +ffffffff82c9f2e0 r SEDiDtWeightConfig_Vega10 +ffffffff82c9f3b0 r SEDiDtCtrl1Config_Vega10 +ffffffff82c9f440 r SEDiDtCtrl2Config_Vega10 +ffffffff82c9f510 r SEDiDtCtrl3Config_vega10 +ffffffff82c9f820 r SEDiDtTuningCtrlConfig_Vega10 +ffffffff82c9f8b0 r SELCacConfig_Vega10 +ffffffff82c9fa40 r SEDiDtCtrl0Config_Vega10 +ffffffff82c9fd10 r AvfsPSMInitConfig_vega10 +ffffffff82c9fd90 r SEEDCStallPatternConfig_Vega10 +ffffffff82c9fea0 r SEEDCStallDelayConfig_Vega10 +ffffffff82c9ff80 r SEEDCCtrlConfig_Vega10 +ffffffff82ca0040 r PSMSEEDCStallPatternConfig_Vega10 +ffffffff82ca00c0 r PSMSEEDCStallDelayConfig_Vega10 +ffffffff82ca01d0 r PSMSEEDCCtrlResetConfig_Vega10 +ffffffff82ca0290 r PSMSEEDCCtrlConfig_Vega10 +ffffffff82ca0350 r SEEDCForceStallPatternConfig_Vega10 +ffffffff82ca03e0 r SEEDCCtrlForceStallConfig_Vega10 +ffffffff82ca1000 R vega10_pptable_funcs +ffffffff82ca2000 r pre_baco_tbl +ffffffff82ca2090 r enter_baco_tbl +ffffffff82ca22b0 r exit_baco_tbl +ffffffff82ca2520 r clean_baco_tbl +ffffffff82ca3000 r vega12_hwmgr_funcs +ffffffff82ca32f0 r SMU7ThermalWithDelayPolicy +ffffffff82ca3340 r link_width +ffffffff82ca4000 R vega12_pptable_funcs +ffffffff82ca5000 r clean_baco_tbl +ffffffff82ca6000 r vega20_hwmgr_funcs +ffffffff82ca62f0 r SMU7ThermalWithDelayPolicy +ffffffff82ca6340 r link_width +ffffffff82ca7000 R vega20_pptable_funcs +ffffffff82ca8000 R ci_smu_funcs +ffffffff82ca80e0 r defaults_hawaii_pro +ffffffff82ca812c r defaults_hawaii_xt +ffffffff82ca8178 r defaults_saturn_xt +ffffffff82ca81c4 r defaults_bonaire_xt +ffffffff82ca8210 r ci_program_jump_on_start.data +ffffffff82ca9000 R fiji_smu_funcs +ffffffff82ca90e0 r avfs_graphics_level +ffffffff82ca9240 r fiji_power_tune_data_set_array +ffffffff82ca9246 r fiji_clock_stretch_amount_conversion +ffffffff82ca9260 r fiji_clock_stretcher_ddt_table +ffffffff82caa000 R iceland_smu_funcs +ffffffff82caa0e0 r defaults_icelandxt +ffffffff82caa12c r defaults_icelandpro +ffffffff82caa178 r defaults_iceland +ffffffff82cab000 R polaris10_smu_funcs +ffffffff82cab0e0 r avfs_graphics_level_polaris10 +ffffffff82cab2a0 r avfs_memory_level_polaris10 +ffffffff82cab2c0 r polaris10_power_tune_data_set_array +ffffffff82cab310 r Range_Table +ffffffff82cac000 R smu10_smu_funcs +ffffffff82cad000 r smu7_program_jump_on_start.data +ffffffff82cad010 r pwr_virus_table_pre +ffffffff82cad680 r pwr_virus_table_post +ffffffff82cadf80 r pwr_virus_section1 +ffffffff82cae610 r pwr_virus_section2 +ffffffff82cae660 r pwr_virus_section3 +ffffffff82cb5ab0 r pwr_virus_section4 +ffffffff82cb5e80 r pwr_virus_section5 +ffffffff82cb6490 r pwr_virus_section6 +ffffffff82cb8000 R smu8_smu_funcs +ffffffff82cb9000 R tonga_smu_funcs +ffffffff82cb90e0 r tonga_power_tune_data_set_array +ffffffff82cb912c r tonga_clock_stretch_amount_conversion +ffffffff82cb9140 r tonga_clock_stretcher_ddt_table +ffffffff82cba000 R vega10_smu_funcs +ffffffff82cbb000 R vega12_smu_funcs +ffffffff82cbc000 R vega20_smu_funcs +ffffffff82cbd000 R vegam_smu_funcs +ffffffff82cbd0e0 r vegam_power_tune_data_set_array +ffffffff82cbd130 r Range_Table +ffffffff82cbe000 R smu_ip_funcs +ffffffff82cbe0a0 R smu_v11_0_ip_block +ffffffff82cbe0b8 R smu_v12_0_ip_block +ffffffff82cbe0d0 R smu_v13_0_ip_block +ffffffff82cbe0e8 r swsmu_pm_funcs +ffffffff82cbf000 r arcturus_table_map +ffffffff82cbf080 r arcturus_pwr_src_map +ffffffff82cbf090 r arcturus_workload_map +ffffffff82cbf0d0 r arcturus_ppt_funcs +ffffffff82cbf4a0 r smu11_thermal_policy +ffffffff82cbf4f0 r arcturus_i2c_algo +ffffffff82cbf500 r arcturus_i2c_control_quirks +ffffffff82cbf510 r arcturus_throttler_map +ffffffff82cbf530 r arcturus_message_map +ffffffff82cbff80 r arcturus_clk_map +ffffffff82cc0040 r arcturus_feature_mask_map +ffffffff82cc1000 r cyan_skillfish_ppt_funcs +ffffffff82cc2000 r navi10_ppt_funcs +ffffffff82cc23d0 r smu11_thermal_policy +ffffffff82cc2420 r navi10_i2c_algo +ffffffff82cc2430 r navi10_i2c_control_quirks +ffffffff82cc2440 r navi1x_throttler_map +ffffffff82cc2460 r NoDbiPrbs7 +ffffffff82cc3460 r DbiPrbs7 +ffffffff82cc5000 r sienna_cichlid_ppt_funcs +ffffffff82cc53d0 r smu11_thermal_policy +ffffffff82cc5420 r sienna_cichlid_i2c_algo +ffffffff82cc5430 r sienna_cichlid_i2c_control_quirks +ffffffff82cc5440 r sienna_cichlid_throttler_map +ffffffff82cc6000 r smu_v11_0_irq_funcs +ffffffff82cc6010 r link_width +ffffffff82cc7000 r vangogh_ppt_funcs +ffffffff82cc73d0 r vangogh_throttler_map +ffffffff82cc8000 r renoir_ppt_funcs +ffffffff82cc83d0 r renoir_throttler_map +ffffffff82cc9000 r aldebaran_clk_map +ffffffff82cc90c0 r aldebaran_table_map +ffffffff82cc9140 r aldebaran_ppt_funcs +ffffffff82cc9510 r smu13_thermal_policy +ffffffff82cc9560 r aldebaran_i2c_algo +ffffffff82cc9570 r aldebaran_i2c_control_quirks +ffffffff82cc9580 r aldebaran_throttler_map +ffffffff82cc95a0 r aldebaran_message_map +ffffffff82cc9ff0 r aldebaran_feature_mask_map +ffffffff82ccb000 r smu_v13_0_irq_funcs +ffffffff82ccb010 r link_width +ffffffff82ccc000 r smu_v13_0_0_ppt_funcs +ffffffff82ccc3d0 r smu13_thermal_policy +ffffffff82ccc420 r smu_v13_0_0_i2c_algo +ffffffff82ccc430 r smu_v13_0_0_i2c_control_quirks +ffffffff82ccc440 r smu_v13_0_0_throttler_map +ffffffff82ccd000 r smu_v13_0_4_ppt_funcs +ffffffff82cce000 r smu_v13_0_5_ppt_funcs +ffffffff82ccf000 r smu_v13_0_7_ppt_funcs +ffffffff82ccf3d0 r smu13_thermal_policy +ffffffff82ccf420 r smu_v13_0_7_throttler_map +ffffffff82cd0000 r yellow_carp_ppt_funcs +ffffffff82cd1000 r __smu_message_names +ffffffff82cd2000 R pchb_ca +ffffffff82cd3000 R amas_ca +ffffffff82cd3028 R amas_devices +ffffffff82cd3040 r amas_feature +ffffffff82cd4000 R cardslot_ca +ffffffff82cd5000 R cardbus_ca +ffffffff82cd6000 R com_cardbus_ca +ffffffff82cd7000 R xl_cardbus_ca +ffffffff82cd7030 R xl_cardbus_products +ffffffff82cd8000 R dc_cardbus_ca +ffffffff82cd8030 R dc_cardbus_devices +ffffffff82cd9000 R fxp_cardbus_ca +ffffffff82cd9028 R fxp_cardbus_devices +ffffffff82cda000 R rl_cardbus_devices +ffffffff82cda028 R rl_cardbus_ca +ffffffff82cdb000 R re_cardbus_ca +ffffffff82cdb028 R re_cardbus_devices +ffffffff82cdc000 R ath_cardbus_ca +ffffffff82cdd000 R athn_cardbus_ca +ffffffff82cdd030 r athn_cardbus_devices +ffffffff82cde000 R atw_cardbus_ca +ffffffff82cde028 R atw_cardbus_devices +ffffffff82cdf000 R rtw_cardbus_ca +ffffffff82cdf028 R rtw_cardbus_devices +ffffffff82ce0000 R ral_cardbus_ca +ffffffff82ce0030 r ral_cardbus_devices +ffffffff82ce1000 R acx_cardbus_ca +ffffffff82ce1028 r acx_cardbus_devices +ffffffff82ce2000 R pgt_cardbus_ca +ffffffff82ce2028 R pgt_cardbus_devices +ffffffff82ce3000 R ehci_cardbus_ca +ffffffff82ce4000 R ohci_cardbus_ca +ffffffff82ce5000 R uhci_cardbus_ca +ffffffff82ce6000 R malo_cardbus_ca +ffffffff82ce6028 r malo_cardbus_devices +ffffffff82ce7000 R bwi_cardbus_ca +ffffffff82ce7030 r bwi_cardbus_devices +ffffffff82ce8000 R pcmcia_ca +ffffffff82ce9000 r pcmcia_parse_cis_tuple.init_cfe +ffffffff82cea000 r pcmcia_cis_quirks +ffffffff82ceb000 R ep_pcmcia_ca +ffffffff82cec000 R ne_pcmcia_ca +ffffffff82cec030 R ne2000devs +ffffffff82cee000 R aic_pcmcia_ca +ffffffff82cef000 R com_pcmcia_ca +ffffffff82cf0000 R wdc_pcmcia_ca +ffffffff82cf1000 R sm_pcmcia_ca +ffffffff82cf2000 R xe_pcmcia_ca +ffffffff82cf3000 R wi_pcmcia_ca +ffffffff82cf3030 r wi_pcmcia_products +ffffffff82cf4000 R malo_pcmcia_ca +ffffffff82cf5000 R an_pcmcia_ca +ffffffff82cf6000 R pcib_ca +ffffffff82cf7000 R amdpcib_ca +ffffffff82cf7028 R amdpcib_devices +ffffffff82cf8000 R tcpcib_ca +ffffffff82cf8028 R tcpcib_devices +ffffffff82cf9000 R aapic_ca +ffffffff82cfa000 R hme_pci_ca +ffffffff82cfa028 r hme_promhdr +ffffffff82cfa02a r hme_promdat +ffffffff82cfb000 R isa_ca +ffffffff82cfc000 R isadma_ca +ffffffff82cfd000 R fdc_ca +ffffffff82cfe000 R fd_ca +ffffffff82cff000 R com_isa_ca +ffffffff82d00000 R pckbc_isa_ca +ffffffff82d01000 R vga_isa_ca +ffffffff82d02000 R wdc_isa_ca +ffffffff82d03000 R mpu_midi_hw_if +ffffffff82d04000 R mpu_isa_ca +ffffffff82d05000 R pcppi_ca +ffffffff82d06000 R spkr_ca +ffffffff82d06030 r pitchtab +ffffffff82d07000 R lpt_isa_ca +ffffffff82d08000 R wbsio_ca +ffffffff82d09000 R schsio_ca +ffffffff82d0a000 R lm_isa_ca +ffffffff82d0a028 R lm_wbsio_ca +ffffffff82d0b000 R it_sensors +ffffffff82d0b110 R it_vrfact +ffffffff82d0b140 R it_fan_regs +ffffffff82d0b160 R it_fan_ext_regs +ffffffff82d0b178 R it_ca +ffffffff82d0c000 R abitkv_sensors +ffffffff82d0c200 R abitaa_sensors +ffffffff82d0c480 R abitav_sensors +ffffffff82d0c700 R abitas_sensors +ffffffff82d0c980 R abitax_sensors +ffffffff82d0cbc0 R abitm4_sensors +ffffffff82d0ce80 R abitan_sensors +ffffffff82d0d120 R abital_sensors +ffffffff82d0d3a0 R abitaw_sensors +ffffffff82d0d700 R abitni_sensors +ffffffff82d0d9a0 R abitat_sensors +ffffffff82d0dcc0 R abitan2_sensors +ffffffff82d0df60 R abitab_sensors +ffffffff82d0e220 R abitan3_sensors +ffffffff82d0e500 R abitaw2_sensors +ffffffff82d0e860 R abitat2_sensors +ffffffff82d0eb60 R abitab2_sensors +ffffffff82d0eea0 R abitin_sensors +ffffffff82d0f1e0 R uguru_ca +ffffffff82d10000 R aps_ca +ffffffff82d11000 R wsdisplay_emul_ca +ffffffff82d11030 r charClass +ffffffff82d12000 r usl_syncops +ffffffff82d13000 R wsevent_filtops +ffffffff82d14000 R wskbd_ca +ffffffff82d15000 r latin1_to_upper +ffffffff82d16000 R wsmouse_ca +ffffffff82d17000 R cyrillic_to_koi8 +ffffffff82d17060 R unicode_to_latin2 +ffffffff82d170e0 R unicode_to_latin7 +ffffffff82d18000 R wsemul_vt100_ops +ffffffff82d19000 r decspcgr2uni +ffffffff82d19100 r dectech2uni +ffffffff82d19200 r nrctable +ffffffff82d19320 r nrcovlpos +ffffffff82d1a000 r vt100_fkeys +ffffffff82d1a0c0 r vt100_pfkeys +ffffffff82d1a0e0 r vt100_numpad +ffffffff82d1b000 R pckbd_ca +ffffffff82d1b028 R pckbd_accessops +ffffffff82d1b040 R pckbd_consops +ffffffff82d1b060 R pckbd_keymapdata +ffffffff82d1b070 R pckbd_xtbl +ffffffff82d1b100 R pckbd_xtbl_ext +ffffffff82d1c000 r pckbd_keydesc_us +ffffffff82d1c250 r pckbd_keydesc_de +ffffffff82d1c2f0 r pckbd_keydesc_de_nodead +ffffffff82d1c310 r pckbd_keydesc_fr +ffffffff82d1c3d0 r pckbd_keydesc_fr_dvorak_bepo +ffffffff82d1c510 r pckbd_keydesc_dk +ffffffff82d1c5a0 r pckbd_keydesc_dk_nodead +ffffffff82d1c5b0 r pckbd_keydesc_it +ffffffff82d1c640 r pckbd_keydesc_uk +ffffffff82d1c6e0 r pckbd_keydesc_jp +ffffffff82d1c750 r pckbd_keydesc_sv +ffffffff82d1c780 r pckbd_keydesc_sv_nodead +ffffffff82d1c790 r pckbd_keydesc_no +ffffffff82d1c7c0 r pckbd_keydesc_no_nodead +ffffffff82d1c7d0 r pckbd_keydesc_us_declk +ffffffff82d1c860 r pckbd_keydesc_us_dvorak +ffffffff82d1c900 r pckbd_keydesc_us_colemak +ffffffff82d1c948 r pckbd_keydesc_swapctrlcaps +ffffffff82d1c960 r pckbd_keydesc_iopener +ffffffff82d1c9b0 r pckbd_keydesc_es +ffffffff82d1ca50 r pckbd_keydesc_be +ffffffff82d1cb10 r pckbd_keydesc_ru +ffffffff82d1cc80 r pckbd_keydesc_ua +ffffffff82d1ce10 r pckbd_keydesc_sg +ffffffff82d1cec0 r pckbd_keydesc_sg_nodead +ffffffff82d1cee0 r pckbd_keydesc_sf +ffffffff82d1cf00 r pckbd_keydesc_pt +ffffffff82d1cf90 r pckbd_keydesc_lt +ffffffff82d1d070 r pckbd_keydesc_la +ffffffff82d1d100 r pckbd_keydesc_br +ffffffff82d1d180 r pckbd_keydesc_tr +ffffffff82d1d230 r pckbd_keydesc_tr_nodead +ffffffff82d1d250 r pckbd_keydesc_pl +ffffffff82d1d2b0 r pckbd_keydesc_hu +ffffffff82d1d3c0 r pckbd_keydesc_si +ffffffff82d1d4d0 r pckbd_keydesc_cf +ffffffff82d1d5a0 r pckbd_keydesc_cf_nodead +ffffffff82d1d5c0 r pckbd_keydesc_lv +ffffffff82d1d640 r pckbd_keydesc_nl +ffffffff82d1d720 r pckbd_keydesc_nl_nodead +ffffffff82d1d740 r pckbd_keydesc_is +ffffffff82d1d7cc r pckbd_keydesc_is_nodead +ffffffff82d1d7e0 r pckbd_keydesc_ee +ffffffff82d1d890 r pckbd_keydesc_ee_nodead +ffffffff82d1d8b0 R pckbd_keydesctab +ffffffff82d1e000 R pms_ca +ffffffff82d1e028 R pms_accessops +ffffffff82d1e040 R pms_sec_accessops +ffffffff82d1e060 R pms_protocols +ffffffff82d1e1e0 r alps_models +ffffffff82d1f000 R skgpio_led_offset +ffffffff82d1f008 R skgpio_ca +ffffffff82d20000 R hidkbd_trtab +ffffffff82d20100 r apple_fn_trans +ffffffff82d20120 r apple_tb_trans +ffffffff82d20140 r apple_mba_trans +ffffffff82d21000 r hidcc_attach_wskbd.accessops +ffffffff82d21020 r hidcc_keysyms +ffffffff82d22000 R usb_ca +ffffffff82d23000 R usb_known_products +ffffffff82d2ef40 R usb_known_vendors +ffffffff82d31740 R usbd_error_strs +ffffffff82d32000 R usb_quirks +ffffffff82d32390 R usb_dev_quirks +ffffffff82d32398 R usbd_no_quirk +ffffffff82d33000 R uhub_ca +ffffffff82d33028 R uhub_uhub_ca +ffffffff82d34000 R uaudio_ca +ffffffff82d34028 R uaudio_hw_if +ffffffff82d340e0 R uaudio_rates +ffffffff82d34120 r uaudio_clkname.names +ffffffff82d34140 r uaudio_feature_addent.features +ffffffff82d35000 R uvideo_ca +ffffffff82d35028 R uvideo_hw_if +ffffffff82d35100 R uvideo_devs +ffffffff82d36000 r utvfu_select_norm.pal +ffffffff82d36040 r utvfu_select_norm.ntsc +ffffffff82d36080 r utvfu_setup_capture.setup +ffffffff82d36180 r utvfu_audio_start_chip.setup +ffffffff82d361c8 r utvfu_audio_stop_chip.setup +ffffffff82d361d8 R utvfu_ca +ffffffff82d36200 R utvfu_vid_hw_if +ffffffff82d362d0 R utvfu_au_hw_if +ffffffff82d37000 R udl_ca +ffffffff82d37030 r udl_devs +ffffffff82d370b0 r udl_modes +ffffffff82d38000 R umidi_hw_if +ffffffff82d38030 R umidi_ca +ffffffff82d38060 r umidi_evlen +ffffffff82d38080 r packet_length +ffffffff82d39000 r quirk_name +ffffffff82d3a000 R ucom_ca +ffffffff82d3b000 R ugen_ca +ffffffff82d3b028 R ugenread_intr_filtops +ffffffff82d3b058 R ugenread_isoc_filtops +ffffffff82d3c000 R uhidev_ca +ffffffff82d3c030 r uhid_graphire_report_descr +ffffffff82d3c0b0 r uhid_graphire3_4x5_report_descr +ffffffff82d3c160 r uhid_xb360gp_report_descr +ffffffff82d3c210 r uhid_xbonegp_report_descr +ffffffff82d3d000 R uhid_ca +ffffffff82d3d028 R uhidread_filtops +ffffffff82d3e000 R fido_ca +ffffffff82d3f000 R ujoy_ca +ffffffff82d40000 r ukbd_keydesc_us +ffffffff82d40290 r ukbd_keydesc_de +ffffffff82d40340 r ukbd_keydesc_de_nodead +ffffffff82d40360 r ukbd_keydesc_fr +ffffffff82d40420 r ukbd_keydesc_fr_apple +ffffffff82d40560 r ukbd_keydesc_fr_dvorak_bepo +ffffffff82d406a0 r ukbd_keydesc_dk +ffffffff82d40740 r ukbd_keydesc_dk_nodead +ffffffff82d40750 r ukbd_keydesc_it +ffffffff82d407f0 r ukbd_keydesc_uk +ffffffff82d408a0 r ukbd_keydesc_jp +ffffffff82d40910 r ukbd_keydesc_sv +ffffffff82d40940 r ukbd_keydesc_sv_nodead +ffffffff82d40950 r ukbd_keydesc_no +ffffffff82d40980 r ukbd_keydesc_no_nodead +ffffffff82d40990 r ukbd_keydesc_us_dvorak +ffffffff82d40a30 r ukbd_keydesc_us_colemak +ffffffff82d40a78 r ukbd_keydesc_swapctrlcaps +ffffffff82d40a90 r ukbd_keydesc_iopener +ffffffff82d40ae0 r ukbd_keydesc_es +ffffffff82d40b80 r ukbd_keydesc_be +ffffffff82d40c40 r ukbd_keydesc_ru +ffffffff82d40db0 r ukbd_keydesc_ua +ffffffff82d40f50 r ukbd_keydesc_sg +ffffffff82d41010 r ukbd_keydesc_sg_nodead +ffffffff82d41030 r ukbd_keydesc_sf +ffffffff82d41050 r ukbd_keydesc_pt +ffffffff82d410e0 r ukbd_keydesc_pt_apple +ffffffff82d41100 r ukbd_keydesc_lt +ffffffff82d411e0 r ukbd_keydesc_la +ffffffff82d41280 r ukbd_keydesc_br +ffffffff82d41310 r ukbd_keydesc_tr +ffffffff82d413d0 r ukbd_keydesc_tr_nodead +ffffffff82d413f0 r ukbd_keydesc_pl +ffffffff82d41450 r ukbd_keydesc_hu +ffffffff82d41560 r ukbd_keydesc_si +ffffffff82d41680 r ukbd_keydesc_cf +ffffffff82d41760 r ukbd_keydesc_cf_nodead +ffffffff82d41780 r ukbd_keydesc_lv +ffffffff82d41800 r ukbd_keydesc_nl +ffffffff82d418e0 r ukbd_keydesc_nl_nodead +ffffffff82d41900 r ukbd_keydesc_is +ffffffff82d41994 r ukbd_keydesc_is_nodead +ffffffff82d419a0 r ukbd_keydesc_ee +ffffffff82d41a50 r ukbd_keydesc_ee_nodead +ffffffff82d41a70 R ukbd_keydesctab +ffffffff82d42000 R ukbd_countrylayout +ffffffff82d42090 R ukbd_consops +ffffffff82d420b0 R ukbd_accessops +ffffffff82d420c8 R ukbd_ca +ffffffff82d43000 R ums_accessops +ffffffff82d43018 R ums_ca +ffffffff82d44000 R umt_accessops +ffffffff82d44018 R umt_ca +ffffffff82d45000 R uts_devs +ffffffff82d45010 R uts_accessops +ffffffff82d45028 R uts_ca +ffffffff82d46000 R ubcmtp_accessops +ffffffff82d46018 R ubcmtp_ca +ffffffff82d46040 r ubcmtp_devices +ffffffff82d47000 R ucycom_methods +ffffffff82d47040 R ucycom_devs +ffffffff82d47050 R ucycom_ca +ffffffff82d48000 R uslhcom_methods +ffffffff82d48040 R uslhcom_ca +ffffffff82d48068 r uslhcom_devs +ffffffff82d49000 R ulpt_ca +ffffffff82d4a000 R umass_ca +ffffffff82d4a028 R umass_bbb_methods +ffffffff82d4a040 R umass_cbi_methods +ffffffff82d4b000 R umass_quirks +ffffffff82d4c000 R umass_scsi_switch +ffffffff82d4d000 R uthum_devs +ffffffff82d4d008 R uthum_ca +ffffffff82d4d030 r uthum_sensor_type_s +ffffffff82d4e000 R ugold_devs +ffffffff82d4e010 R ugold_ca +ffffffff82d4f000 R utrh_devs +ffffffff82d4f008 R utrh_ca +ffffffff82d50000 R uoakrh_devs +ffffffff82d50008 R uoakrh_ca +ffffffff82d50030 R uoakrh_methods +ffffffff82d51000 R uoaklux_devs +ffffffff82d51008 R uoaklux_ca +ffffffff82d51030 R uoaklux_methods +ffffffff82d52000 R uoakv_devs +ffffffff82d52008 R uoakv_ca +ffffffff82d52030 R uoakv_methods +ffffffff82d53000 R uonerng_ca +ffffffff82d54000 R urng_ca +ffffffff82d54030 r urng_devs +ffffffff82d55000 R udcf_ca +ffffffff82d55028 r udcf_devs +ffffffff82d56000 R umbg_ca +ffffffff82d57000 R uvisor_methods +ffffffff82d57040 R uvisor_ca +ffffffff82d57070 r uvisor_devs +ffffffff82d58000 R udsbr_hw_if +ffffffff82d58028 R udsbr_ca +ffffffff82d59000 R utwitch_devs +ffffffff82d59008 R utwitch_ca +ffffffff82d5a000 R aue_devs +ffffffff82d5a1b0 R aue_ca +ffffffff82d5b000 R axe_devs +ffffffff82d5b0d0 R axe_ca +ffffffff82d5c000 R axen_devs +ffffffff82d5c020 R axen_ca +ffffffff82d5d000 R smsc_ca +ffffffff82d5d030 r smsc_devs +ffffffff82d5e000 R cue_ca +ffffffff82d5f000 R kue_devs +ffffffff82d5f088 R kue_ca +ffffffff82d60000 R cdce_devs +ffffffff82d60048 R cdce_ca +ffffffff82d61000 R urndis_ca +ffffffff82d61030 R urndis_class +ffffffff82d62000 R mos_devs +ffffffff82d62018 R mos_ca +ffffffff82d63000 R mue_devs +ffffffff82d63020 R mue_ca +ffffffff82d64000 R udav_ca +ffffffff82d64030 r udav_devs +ffffffff82d65000 R upl_ca +ffffffff82d66000 R ugl_ca +ffffffff82d67000 R url_ca +ffffffff82d67030 r url_devs +ffffffff82d68000 R ure_devs +ffffffff82d680f0 R ure_ca +ffffffff82d69000 R uaq_devs +ffffffff82d69018 R uaq_ca +ffffffff82d6a000 R umodem_methods +ffffffff82d6a040 R umodem_ca +ffffffff82d6b000 R uftdi_methods +ffffffff82d6b040 R uftdi_ca +ffffffff82d6b070 r uftdi_devs +ffffffff82d6c000 R uplcom_methods +ffffffff82d6c040 R uplcom_ca +ffffffff82d6c070 r uplcom_devs +ffffffff82d6d000 R umct_methods +ffffffff82d6d040 R umct_ca +ffffffff82d6d070 r umct_devs +ffffffff82d6e000 R uvscom_methods +ffffffff82d6e040 R uvscom_ca +ffffffff82d6e070 r uvscom_devs +ffffffff82d6f000 R ubsa_methods +ffffffff82d6f040 R ubsa_devs +ffffffff82d6f060 R ubsa_ca +ffffffff82d70000 R ukspan_ca +ffffffff82d70028 r ukspan_devs +ffffffff82d70030 r ukspan_methods +ffffffff82d71000 R uslcom_methods +ffffffff82d71040 R uslcom_ca +ffffffff82d71070 r uslcom_devs +ffffffff82d72000 R uark_methods +ffffffff82d72040 R uark_ca +ffffffff82d72068 r uark_devs +ffffffff82d73000 R moscom_methods +ffffffff82d73040 R moscom_ca +ffffffff82d73068 r moscom_devs +ffffffff82d74000 R umcs_methods +ffffffff82d74040 R umcs_devs +ffffffff82d74050 R umcs_ca +ffffffff82d75000 R uscom_methods +ffffffff82d75040 R uscom_ca +ffffffff82d75068 r uscom_devs +ffffffff82d76000 R ucrcom_methods +ffffffff82d76040 R ucrcom_ca +ffffffff82d77000 R uxrcom_methods +ffffffff82d77040 R uxrcom_ca +ffffffff82d77068 r uxrcom_devs +ffffffff82d78000 R uipaq_methods +ffffffff82d78040 R uipaq_ca +ffffffff82d78070 r uipaq_devs +ffffffff82d79000 R umsm_methods +ffffffff82d79040 R umsm_ca +ffffffff82d79070 r umsm_devs +ffffffff82d7a000 R uchcom_methods +ffffffff82d7a040 R uchcom_ca +ffffffff82d7a068 r uchcom_devs +ffffffff82d7a080 r dividers +ffffffff82d7b000 R uticom_methods +ffffffff82d7b040 R uticom_ca +ffffffff82d7b070 r uticom_devs +ffffffff82d7c000 R wi_usb_devs +ffffffff82d7c0f0 R wi_usb_ca +ffffffff82d7d000 R atu_ca +ffffffff82d7e000 R ural_ca +ffffffff82d7e030 r ural_devs +ffffffff82d7e0a0 r ural_rf2522_r2 +ffffffff82d7e0e0 r ural_rf2524_r2 +ffffffff82d7e120 r ural_rf2525_hi_r2 +ffffffff82d7e160 r ural_rf2525_r2 +ffffffff82d7e1a0 r ural_rf2525e_r2 +ffffffff82d7e1e0 r ural_rf2526_hi_r2 +ffffffff82d7e220 r ural_rf2526_r2 +ffffffff82d7e260 r ural_def_bbp +ffffffff82d7e2a0 r ural_def_mac +ffffffff82d7f000 R rum_ca +ffffffff82d7f030 r rum_devs +ffffffff82d7f110 r rum_rf5225 +ffffffff82d7f460 r rum_rf5226 +ffffffff82d7f7b0 r rum_def_bbp +ffffffff82d7f7f0 r rum_def_mac +ffffffff82d80000 R run_ca +ffffffff82d80030 r run_devs +ffffffff82d80430 r rt2860_rf2850 +ffffffff82d80860 r rt2860_rates +ffffffff82d80920 r rt5592_freqs_40mhz +ffffffff82d80a60 r rt5592_freqs_20mhz +ffffffff82d80ba0 r rt5592_2ghz_def_rf +ffffffff82d80be0 r rt5592_chan_5ghz +ffffffff82d80e30 r rt5592_def_bbp +ffffffff82d80e70 r rt5592_bbp_r196 +ffffffff82d80ed0 r rt5390_def_bbp +ffffffff82d80f00 r rt3572_def_rf +ffffffff82d80f40 r rt3070_def_rf +ffffffff82d80f70 r rt3593_def_rf +ffffffff82d80fb0 r rt5592_def_rf +ffffffff82d80fe0 r rt5392_def_rf +ffffffff82d81060 r rt5390_def_rf +ffffffff82d810e0 r rt2870_def_mac +ffffffff82d82000 R mtw_ca +ffffffff82d82030 r mtw_devs +ffffffff82d82070 r rt2860_rates +ffffffff82d82130 r mt7601_rf_chan +ffffffff82d821a0 r mt7601_def_bbp +ffffffff82d822d0 r mt7601_rf_bank0 +ffffffff82d82330 r mt7601_rf_bank4 +ffffffff82d823b0 r mt7601_rf_bank5 +ffffffff82d82430 r mt7601_def_mac +ffffffff82d83000 R zyd_ca +ffffffff82d83030 r zyd_devs +ffffffff82d831b0 r zyd_rfmd_init.phyini +ffffffff82d832e0 r zyd_rfmd_init.rfini +ffffffff82d83330 r zyd_rfmd_set_channel.rfprog +ffffffff82d833a0 r zyd_al2230_init.phyini +ffffffff82d83480 r zyd_al2230_init.rfini +ffffffff82d834e0 r zyd_al2230_init_b.phyini +ffffffff82d835d0 r zyd_al2230_init_b.rfini +ffffffff82d83620 r zyd_al2230_set_channel.rfprog +ffffffff82d836d0 r zyd_al7230B_init.phyini_1 +ffffffff82d837b0 r zyd_al7230B_init.rfini_1 +ffffffff82d837f0 r zyd_al7230B_set_channel.rfprog +ffffffff82d83860 r zyd_al7230B_set_channel.rfsc +ffffffff82d83890 r zyd_al2210_init.phyini +ffffffff82d838f0 r zyd_al2210_init.rfini +ffffffff82d83920 r zyd_al2210_set_channel.rfprog +ffffffff82d83960 r zyd_gct_init.phyini +ffffffff82d839b0 r zyd_gct_init.rfini +ffffffff82d83a50 r zyd_gct_set_channel.rfprog +ffffffff82d83a90 r zyd_maxim_set_channel.phyini +ffffffff82d83ba0 r zyd_maxim_set_channel.rfini +ffffffff82d83be0 r zyd_maxim_set_channel.rfprog +ffffffff82d83c50 r zyd_maxim2_set_channel.phyini +ffffffff82d83d70 r zyd_maxim2_set_channel.rfini +ffffffff82d83db0 r zyd_maxim2_set_channel.rfprog +ffffffff82d83e20 r zyd_rf_name.zyd_rfs +ffffffff82d83ea0 r zyd_def_phyB +ffffffff82d840d0 r zyd_def_phy +ffffffff82d85000 R upgt_ca +ffffffff82d85028 r upgt_devs_1 +ffffffff82d85030 r upgt_devs_2 +ffffffff82d86000 R urtw_ca +ffffffff82d86030 r urtw_devs +ffffffff82d86090 r urtw_ratetable +ffffffff82d860f0 r urtw_8225_gain +ffffffff82d86110 r urtw_8225_txpwr_cck_ch14 +ffffffff82d86140 r urtw_8225_txpwr_cck +ffffffff82d86170 r urtw_8225_tx_gain_cck_ofdm +ffffffff82d86176 r urtw_8225_txpwr_ofdm +ffffffff82d86180 r urtw_8225_rf_part1 +ffffffff82d86200 r urtw_8225_rxgain +ffffffff82d862c0 r urtw_8225_agc +ffffffff82d86340 r urtw_8225_rf_part2 +ffffffff82d86470 r urtw_8225_rf_part3 +ffffffff82d86550 r urtw_8225_channel +ffffffff82d8658c r urtw_8225_threshold +ffffffff82d865a0 r urtw_8225v2_gain_bg +ffffffff82d865c0 r urtw_8225v2_tx_gain_cck_ofdm +ffffffff82d865f0 r urtw_8225v2_rf_part1 +ffffffff82d86670 r urtw_8225v2_rxgain +ffffffff82d86730 r urtw_8225v2_rf_part2 +ffffffff82d86870 r urtw_8225v2_rf_part3 +ffffffff82d86970 r urtw_8187b_regtbl +ffffffff82d86a90 r urtw_8225v2_b_rf +ffffffff82d86b20 r urtw_8225v2_agc +ffffffff82d86ba0 r urtw_8225v2_ofdm +ffffffff82d87000 R urtwn_ca +ffffffff82d87030 r urtwn_devs +ffffffff82d87330 r rtl8188eu_mac +ffffffff82d874a0 r rtl8192eu_mac +ffffffff82d87640 r rtl8192cu_mac +ffffffff82d87798 r rtl8188eu_bb_prog +ffffffff82d877c0 r rtl8192eu_bb_prog +ffffffff82d877e8 r rtl8188ce_bb_prog +ffffffff82d87810 r rtl8188ru_bb_prog +ffffffff82d87838 r rtl8188cu_bb_prog +ffffffff82d87860 r rtl8192ce_bb_prog +ffffffff82d87888 r rtl8192cu_bb_prog +ffffffff82d878b0 r rtl8188eu_bb_regs +ffffffff82d87a30 r rtl8188eu_bb_vals +ffffffff82d87d30 r rtl8188eu_agc_vals +ffffffff82d87f30 r rtl8192e_bb_regs +ffffffff82d880d0 r rtl8192e_bb_vals +ffffffff82d88410 r rtl8192eu_agc_vals +ffffffff82d88610 r rtl8192ce_bb_regs +ffffffff82d88790 r rtl8188ce_bb_vals +ffffffff82d88a80 r rtl8188ce_agc_vals +ffffffff82d88d00 r rtl8188ru_bb_regs +ffffffff82d88e80 r rtl8188ru_bb_vals +ffffffff82d89180 r rtl8188ru_agc_vals +ffffffff82d89400 r rtl8188cu_bb_vals +ffffffff82d896f0 r rtl8192ce_bb_vals +ffffffff82d899e0 r rtl8192ce_agc_vals +ffffffff82d89c60 r rtl8192cu_bb_vals +ffffffff82d8a000 R rsu_ca +ffffffff82d8a030 r rsu_devs +ffffffff82d8a0c8 r rsu_devs_noht +ffffffff82d8a0d0 r rsu_qid2idx_4ep +ffffffff82d8a0da r rsu_qid2idx_6ep +ffffffff82d8a0e4 r rsu_qid2idx_11ep +ffffffff82d8a0ee r r92s_epaddr +ffffffff82d8b000 R otus_ca +ffffffff82d8b030 r otus_devs +ffffffff82d8b090 r ar_chans +ffffffff82d8b0c0 r otus_rates +ffffffff82d8b0e0 r ar5416_phy_regs +ffffffff82d8b380 r ar5416_phy_vals_2ghz_20mhz +ffffffff82d8b8b0 r ar5416_phy_vals_5ghz_20mhz +ffffffff82d8bde0 r ar5416_banks_vals_5ghz +ffffffff82d8bef0 r ar5416_banks_vals_2ghz +ffffffff82d8c000 r ar5416_banks_regs +ffffffff82d8d000 R umb_regstates +ffffffff82d8d080 R umb_dataclasses +ffffffff82d8d190 R umb_simstate +ffffffff82d8d210 R umb_messages +ffffffff82d8d2b0 R umb_status +ffffffff82d8d570 R umb_cids +ffffffff82d8d6e0 R umb_pktstate +ffffffff82d8d740 R umb_actstate +ffffffff82d8d7a0 R umb_error +ffffffff82d8d830 R umb_pintype +ffffffff82d8d960 R umb_istate +ffffffff82d8d9f0 R umb_ca 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sysctl_kmemlock +ffffffff8312d4b0 D malloc_errintvl +ffffffff8312e000 D maxdmap +ffffffff8312e008 D maxsmap +ffffffff8312e010 D rlimit_lock +ffffffff8312f000 D sched_cost_load +ffffffff8312f004 D sched_cost_priority +ffffffff8312f008 D sched_cost_runnable +ffffffff8312f00c D sched_cost_resident +ffffffff83130000 D intrmap_lock +ffffffff83131000 D nosuidcoredump +ffffffff83131008 D sigio_lock +ffffffff83132000 D smr_lock +ffffffff83132010 D smr_logintvl +ffffffff83133000 D startuphook_list +ffffffff83134000 D sysctl_lock +ffffffff83134010 D sysctl_disklock +ffffffff83134020 d openbsd +ffffffff83134024 d arg_max +ffffffff83134028 d posix_version +ffffffff8313402c d ngroups_max +ffffffff83134030 d int_one +ffffffff83134034 d maxpartitions +ffffffff83134038 d raw_part +ffffffff8313403c D allowpowerdown +ffffffff83134040 D hw_power +ffffffff83134044 d byte_order +ffffffff83134048 d page_size +ffffffff83135000 d thrsleep_queue +ffffffff83135010 d thrsleep_lock +ffffffff83136000 D tc_lock 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+ffffffff8313f020 D pool_debug +ffffffff8313f028 D pool_allocator_single +ffffffff8313f040 D pool_allocator_multi +ffffffff8313f058 D pool_allocator_multi_ni +ffffffff8313f070 D pool_gc_tick +ffffffff8313f0b8 D pool_gc_task +ffffffff83140000 D kprintf_mutex +ffffffff83140010 D db_panic +ffffffff83140014 D splassert_ctl +ffffffff83140018 D v_putc +ffffffff83140020 D printf_flags +ffffffff83141000 D userconf_base +ffffffff83141004 D userconf_maxdev +ffffffff83141008 D userconf_totdev +ffffffff8314100c D userconf_maxlocnames +ffffffff83141010 D userconf_cnt +ffffffff83141014 D userconf_lines +ffffffff83141018 D userconf_histsz +ffffffff83141020 D userconf_cmds +ffffffff83142000 D ftlock +ffffffff83143000 d ppollcollect.poll_errintvl +ffffffff83144000 D ttydefchars +ffffffff83144014 D ttclos +ffffffff8314401b D ttopen +ffffffff83144022 D ttybg +ffffffff83144028 D ttyin +ffffffff8314402e D ttyout +ffffffff83144038 D ttylist_lock +ffffffff83145000 D linesw +ffffffff83145280 D nlinesw +ffffffff83146000 D pt_softc_lock +ffffffff83147000 d mbstat_boot_boot_cpumem +ffffffff83147080 D mbstat +ffffffff83147090 D mclsizes +ffffffff831470b0 D m_extref_mtx +ffffffff831470c0 D m_pool_allocator +ffffffff83148000 D somaxconn +ffffffff83148004 D sominconn +ffffffff83148008 D sosplice_lock +ffffffff83149000 D sb_max +ffffffff8314a000 D unp_df_lock +ffffffff8314a010 D unp_gc_lock +ffffffff8314a020 D unp_rights_mtx +ffffffff8314a030 D unp_ino_mtx +ffffffff8314a040 D unp_gc_task +ffffffff8314a070 D unpst_sendspace +ffffffff8314a074 D unpst_recvspace +ffffffff8314a078 D unpsq_sendspace +ffffffff8314a07c D unpsq_recvspace +ffffffff8314a080 D unpdg_sendspace +ffffffff8314a084 D unpdg_recvspace +ffffffff8314b000 D doingcache +ffffffff8314c000 D maxvfsconf +ffffffff8314c010 d vfsconflist +ffffffff8314d000 D lockf_lock +ffffffff8314d010 D maxlocksperuid +ffffffff8314e000 D iftovt_tab +ffffffff8314e040 D vttoif_tab +ffffffff8314e064 D suid_clear +ffffffff8314e068 D vnode_mtx +ffffffff8314e078 D vfs_stall_lock +ffffffff8314e090 D vtypes +ffffffff8314e0e0 D vtags +ffffffff8314f000 D syncer_maxdelay +ffffffff8314f004 D syncdelay +ffffffff83150000 D dosdirtemplate +ffffffff83151000 D ntfs_hashlock +ffffffff83152000 D ntfs_toupper_lock +ffffffff83153000 D art_table_gc_mtx +ffffffff83153010 D art_table_gc_task +ffffffff83153040 D art_node_gc_mtx +ffffffff83153050 D art_node_gc_task +ffffffff83154000 D bpf_bufsize +ffffffff83154004 D bpf_maxbufsize +ffffffff83154008 D bpf_sysctl_lk +ffffffff83155000 D ifg_head +ffffffff83155010 D if_cloners_lock +ffffffff83155020 D if_input_task_locked +ffffffff83155050 D netlock +ffffffff83155060 D ifnetlist +ffffffff83156000 D ifiq_maxlen_drop +ffffffff83156004 D ifiq_maxlen_return +ffffffff83157000 D etherbroadcastaddr +ffffffff83157006 D ether_ipmulticast_min +ffffffff8315700c D ether_ipmulticast_max +ffffffff83157012 D ether_ip6multicast_min +ffffffff83157018 D ether_ip6multicast_max +ffffffff83158000 D etherip_cloner +ffffffff83158030 D etherip_list +ffffffff83159000 D loop_cloner +ffffffff8315a000 D ifmedia_mtx +ffffffff8315b000 D ppp_compressors +ffffffff8315b020 D ppp_cloner +ffffffff8315c000 D ppp_pkt_init +ffffffff8315d000 D ppp_bsd_compress +ffffffff8315e000 D ppp_deflate +ffffffff8315e070 D ppp_deflate_draft +ffffffff8315f000 D tun_cloner +ffffffff8315f030 D tap_cloner +ffffffff83160000 D bridgeintrq +ffffffff83160038 D bridge_cloner +ffffffff83161000 d veb_cloner +ffffffff83161030 d vport_cloner +ffffffff83162000 D vlan_tagh_lk +ffffffff83162010 D vlan_cloner +ffffffff83162040 D svlan_cloner +ffffffff83163000 D pipex_list_mtx +ffffffff83163010 D pipex_prune +ffffffff83163018 D pipexoutq +ffffffff83163050 d SHAPad2 +ffffffff83164000 D rtmap_gc +ffffffff83164018 D rt_rc +ffffffff83165000 D rt_labels +ffffffff83166000 D enc_cloner +ffffffff83167000 D gre_cloner +ffffffff83167030 D gre_list +ffffffff83167040 D mgre_cloner +ffffffff83167070 D egre_cloner +ffffffff831670a0 D nvgre_cloner +ffffffff831670d0 D eoip_cloner +ffffffff83168000 D trunk_cloner +ffffffff83169000 d aggr_cloner +ffffffff8316a000 d tpmr_cloner +ffffffff8316b000 D mpe_cloner +ffffffff8316c000 D mpw_cloner +ffffffff8316d000 D mpip_cloner +ffffffff8316e000 d bpe_cloner +ffffffff8316e030 d bpe_lock +ffffffff8316f000 D vether_cloner +ffffffff83170000 D pair_cloner +ffffffff83171000 d vxlan_cloner +ffffffff83171030 d vxlan_lock +ffffffff83171040 d vxlan_teps +ffffffff83172000 D underload_interval +ffffffff83172010 D wg_cloner +ffffffff83173000 d stoeplitz_keyseed +ffffffff83174000 D ieee80211_cache_size +ffffffff83175000 D arpt_prune +ffffffff83175004 D arpt_keep +ffffffff83175008 D arpt_down +ffffffff83175010 D arpinq +ffffffff83175048 D arp_mtx +ffffffff83175058 D arp_maxtries +ffffffff83176000 D ipport_firstauto +ffffffff83176004 D ipport_lastauto +ffffffff83176008 D ipport_hifirstauto +ffffffff8317600c D ipport_hilastauto +ffffffff83177000 D divert_sendspace +ffffffff83177004 D divert_recvspace +ffffffff83177008 D divbhashsize +ffffffff83178000 D icmptstamprepl +ffffffff83178004 D icmperrppslim +ffffffff83178008 D icmp_redirtimeout +ffffffff83179000 D ipsendredirects +ffffffff83179004 D ip_defttl +ffffffff83179008 D ip_mtudisc +ffffffff8317900c D ip_mtudisc_timeout +ffffffff83179010 D ipq_mutex +ffffffff83179020 D ip_maxqueue +ffffffff83179028 D ipintrq +ffffffff83179060 d ipsend_task +ffffffff83179090 d ipsendraw_task +ffffffff8317a000 D ip_mrtproto +ffffffff8317a004 d sin +ffffffff8317b000 D rip_sendspace +ffffffff8317b008 D rip_recvspace +ffffffff8317c000 D tcprexmtthresh +ffffffff8317c004 D tcptv_keep_init +ffffffff8317c008 D tcp_rst_ppslim +ffffffff8317c00c D tcp_ackdrop_ppslim +ffffffff8317c010 D tcp_syn_hash_size +ffffffff8317c014 D tcp_syn_cache_limit +ffffffff8317c018 D tcp_syn_bucket_limit +ffffffff8317c01c D tcp_syn_use_limit +ffffffff8317d000 D tcp_outflags +ffffffff8317e000 D tcp_timer_mtx +ffffffff8317e010 D tcp_mssdflt +ffffffff8317e014 D tcp_rttdflt +ffffffff8317e018 D tcp_do_rfc1323 +ffffffff8317e01c D tcp_do_sack +ffffffff8317e020 D tcp_do_rfc3390 +ffffffff8317e024 D tcp_reass_limit +ffffffff8317e028 D tcp_sackhole_limit +ffffffff8317f000 D tcp_backoff +ffffffff8317f034 D tcp_totbackoff +ffffffff83180000 D tcp_sendspace +ffffffff83180004 D tcp_recvspace +ffffffff83180008 D tcp_autorcvbuf_inc +ffffffff83181000 D udpcksum +ffffffff83181004 D udp_sendspace +ffffffff83181008 D udp_recvspace +ffffffff83182000 D ipsec_flows_mtx +ffffffff83182010 D ipsec_ids_idle +ffffffff83182014 D ipsec_ids_next_flow +ffffffff83182018 D ipsec_policy_head +ffffffff83182028 D ipsp_ids_gc_timeout +ffffffff83182070 D tdb_sadb_mtx +ffffffff83182080 d tdb_hashmask +ffffffff83183000 D ipo_tdb_mtx +ffffffff83183010 D ipsec_acquire_mtx +ffffffff83183020 D ipsec_acquire_head +ffffffff83184000 D ipsec_keep_invalid +ffffffff83184004 D ipsec_require_pfs +ffffffff83184008 D ipsec_soft_timeout +ffffffff8318400c D ipsec_exp_timeout +ffffffff83184010 D ipsec_soft_first_use +ffffffff83184014 D ipsec_exp_first_use +ffffffff83184018 D ipsec_expire_acquire +ffffffff8318401c D esp_enable +ffffffff83184020 D ah_enable +ffffffff83185000 D udpencap_enable +ffffffff83185004 D udpencap_port +ffffffff83186000 D carp_vh_rc +ffffffff83186020 D carp_sc_rc +ffffffff83186040 D carp_opts +ffffffff83186058 D carp_cloner +ffffffff83186088 d carp_send_na.mcast ffffffff83187000 d PADDING -ffffffff83188000 d weak_keys -ffffffff83189000 D swcr_id -ffffffff8318a000 D window_inflate -ffffffff8318a004 D window_deflate -ffffffff8318b000 D ghash_update -ffffffff8318c000 D mpls_defttl -ffffffff8318c004 D mpls_mapttl_ip -ffffffff8318d000 D nfskevq_lock -ffffffff8318e000 D nfs_backoff -ffffffff8318e020 D nfs_ptimers -ffffffff8318f000 D desirednfsrvcache -ffffffff8318f010 D nonidempotent -ffffffff8318f070 D nfsv2_repstat -ffffffff83190000 D nfsv2_type -ffffffff83190030 D nfsv3_type -ffffffff83190060 D nv2tov_type -ffffffff83190080 D nv3tov_type -ffffffff831900a0 D nfsv3_procid -ffffffff83190100 D nfsv2_procid -ffffffff8319015c d nfsv3err_getattr -ffffffff83190170 d nfsv3err_setattr -ffffffff83190190 d nfsv3err_lookup -ffffffff831901a4 d nfsv3err_access -ffffffff831901b0 d nfsv3err_readlink -ffffffff831901d0 d nfsv3err_read -ffffffff831901f0 d nfsv3err_write -ffffffff83190210 d nfsv3err_create -ffffffff83190230 d nfsv3err_mkdir -ffffffff83190250 d nfsv3err_symlink -ffffffff83190270 d nfsv3err_mknod -ffffffff83190290 d nfsv3err_remove -ffffffff831902b0 d nfsv3err_rmdir -ffffffff831902d0 d nfsv3err_rename -ffffffff83190300 d nfsv3err_link -ffffffff83190330 d nfsv3err_readdir -ffffffff83190350 d nfsv3err_readdirplus -ffffffff83190366 d nfsv3err_fsstat -ffffffff83190372 d nfsv3err_fsinfo -ffffffff8319037c d nfsv3err_pathconf -ffffffff83190386 d nfsv3err_commit -ffffffff83191000 D nfsrv3_procs -ffffffff831910b8 D nfs_niothreads -ffffffff83192000 D fragtbl -ffffffff83193000 D ffs_vtbl -ffffffff83194000 D softdep_typenames -ffffffff83194070 D tickdelay -ffffffff83195000 D dirchk -ffffffff83196000 D desireddquot -ffffffff83197000 D amap_list_lock -ffffffff83198000 d uao_list_lock -ffffffff83199000 d uvmexp_countersboot_boot_cpumem -ffffffff831990c0 D uvmexp_counters -ffffffff831990c8 D vm_min_kernel_address -ffffffff8319a000 D no_constraint -ffffffff8319b000 d uvm_kmapent_warn_rate -ffffffff8319c000 D maxslp -ffffffff8319d000 D uvmpagerops -ffffffff8319e000 D uvm_swap_data_lock -ffffffff8319e010 D swap_syscall_lock -ffffffff8319e020 D oommtx -ffffffff8319f000 D uvm_doswapencrypt -ffffffff831a0000 D gif_list -ffffffff831a0010 D gif_cloner -ffffffff831a1000 D divert6_sendspace -ffffffff831a1004 D divert6_recvspace -ffffffff831a1008 D divb6hashsize -ffffffff831a2000 d in6_get_hw_ifid.allone -ffffffff831a3000 D ip6_sendredirects -ffffffff831a3004 D ip6_defhlim -ffffffff831a3008 D ip6_defmcasthlim -ffffffff831a300c D ip6_maxfragpackets -ffffffff831a3010 D ip6_maxfrags -ffffffff831a3014 D ip6_log_interval -ffffffff831a3018 D ip6_hdrnestlimit -ffffffff831a301c D ip6_dad_count -ffffffff831a3020 D ip6_auto_flowlabel -ffffffff831a3024 D ip6_use_deprecated -ffffffff831a3028 D ip6_neighborgcthresh -ffffffff831a302c D ip6_maxdynroutes -ffffffff831a3030 D rip6_sendspace -ffffffff831a3038 D rip6_recvspace -ffffffff831a3040 D icmp6_redirtimeout -ffffffff831a3044 D icmp6errppslim -ffffffff831a3048 D ip6_mtudisc_timeout -ffffffff831a4000 D frag6_mutex -ffffffff831a5000 d icmp6_mtudisc_hiwat -ffffffff831a5004 d icmp6_mtudisc_lowat -ffffffff831a6000 d randomtab_20 -ffffffff831a7000 D ip6intrq -ffffffff831a7038 d ip6send_task -ffffffff831a8000 D nd6_timer_next -ffffffff831a8008 D nd6_expire_next -ffffffff831a8010 D nd6_delay -ffffffff831a8014 D nd6_umaxtries -ffffffff831a8018 D nd6_mmaxtries -ffffffff831a801c D nd6_gctimer -ffffffff831a8020 D nd6_maxndopt -ffffffff831a9000 d dadq -ffffffff831aa000 D pfkeyv2_mtx -ffffffff831aa010 d pfkeyv2_seq -ffffffff831ab000 D sadb_exts_allowed_in -ffffffff831ab090 D sadb_exts_required_in -ffffffff831ac000 D cold -ffffffff831ad000 D bdevsw -ffffffff831ad460 D nblkdev -ffffffff831ad470 D cdevsw -ffffffff831af400 D nchrdev -ffffffff831af404 D mem_no -ffffffff831af408 D swapdev -ffffffff831af410 D constab -ffffffff831b0000 D machine -ffffffff831b0008 D lid_action -ffffffff831b000c D pwr_action -ffffffff831b0010 D isa_constraint -ffffffff831b0020 D dma_constraint -ffffffff831b0030 D uvm_md_constraints -ffffffff831b0048 D delay_func -ffffffff831b0050 D initclock_func -ffffffff831b0058 D bootinfo_size -ffffffff831b005c D waittime -ffffffff831b0060 D dumpmag -ffffffff831b1000 D tsc_rdtsc -ffffffff831b1008 D tsc_timecounter -ffffffff831b1058 D tsc_is_synchronized -ffffffff831b2000 D local_apic -ffffffff831b2020 D lapic_id -ffffffff831b2080 D lapic_tpr -ffffffff831b20a0 d lapic_ppr -ffffffff831b2100 d lapic_isr -ffffffff831b3000 D warn_once -ffffffff831b4000 d errata -ffffffff831b5000 D cpu_ucode_intel_mtx -ffffffff831b6000 D mem_owner_bios -ffffffff831b6008 D mrops -ffffffff831b6028 D mtrrmask -ffffffff831b6030 D mtrrtomrt -ffffffff831b7000 D pmap_pg_wc -ffffffff831b7008 D pmaps_lock -ffffffff831b7018 d pmap_maxkvaddr -ffffffff831b8000 D kv_physwait -ffffffff831b9000 D fpu_save_len -ffffffff831ba000 D i8259_pic -ffffffff831bb000 D softintr_pic -ffffffff831bc000 D ipifunc -ffffffff831bd000 D setperf_mp_mutex -ffffffff831be000 D db_Grp6 -ffffffff831be040 D db_Grp7 -ffffffff831be100 D db_Grp8 -ffffffff831be140 D db_Grp9 -ffffffff831be200 D db_GrpA -ffffffff831be240 D db_GrpB -ffffffff831be280 D db_GrpC -ffffffff831be2c0 D db_inst_0f0x -ffffffff831be440 D db_inst_0f2x -ffffffff831be5c0 D db_inst_0f3x -ffffffff831be740 D db_inst_0f8x -ffffffff831be8c0 D db_inst_0f9x -ffffffff831bea40 D db_inst_0fax -ffffffff831bebc0 D db_inst_0fbx -ffffffff831bed40 D db_inst_0fcx -ffffffff831beec0 D db_inst_0f -ffffffff831bef40 D db_Esc92 -ffffffff831bef80 D db_Esc94 -ffffffff831befc0 D db_Esc95 -ffffffff831bf000 D db_Esc96 -ffffffff831bf040 D db_Esc97 -ffffffff831bf080 D db_Esca5 -ffffffff831bf0c0 D db_Escb4 -ffffffff831bf100 D db_Esce3 -ffffffff831bf140 D db_Escf4 -ffffffff831bf180 D db_Esc8 -ffffffff831bf240 D db_Esc9 -ffffffff831bf300 D db_Esca -ffffffff831bf3c0 D db_Escb -ffffffff831bf480 D db_Escc -ffffffff831bf540 D db_Escd -ffffffff831bf600 D db_Esce -ffffffff831bf6c0 D db_Escf -ffffffff831bf780 D db_Esc_inst -ffffffff831bf7c0 D db_Grp1 -ffffffff831bf800 D db_Grp2 -ffffffff831bf840 D db_Grp3 -ffffffff831bf900 D db_Grp4 -ffffffff831bf9c0 D db_Grp5 -ffffffff831bfa80 D db_inst_table -ffffffff831c1280 D db_bad_inst -ffffffff831c12a0 D db_index_reg_16 -ffffffff831c12e0 D db_reg -ffffffff831c14e0 D db_seg_reg -ffffffff831c1520 D db_lengths -ffffffff831c2000 D db_regs -ffffffff831c21e0 D db_eregs -ffffffff831c21f0 D db_reg_args -ffffffff831c3000 D timer_mutex -ffffffff831c3010 d i8254_timecounter -ffffffff831c4000 D spleen8x16 -ffffffff831c4058 D spleen12x24 -ffffffff831c40b0 D spleen16x32 -ffffffff831c4108 D spleen32x64 -ffffffff831c4160 d builtin_fonts -ffffffff831c41e0 d wsfont_add.cookiegen -ffffffff831c41f0 d spleen8x16_data -ffffffff831c4ff0 d spleen12x24_data -ffffffff831c79f0 d spleen16x32_data -ffffffff831cb1f0 d spleen32x64_data -ffffffff831da000 D nsphy_cd -ffffffff831db000 D nsphyter_cd -ffffffff831dc000 D gentbi_cd -ffffffff831dd000 D qsphy_cd -ffffffff831de000 D inphy_cd -ffffffff831df000 D iophy_cd -ffffffff831e0000 D eephy_cd -ffffffff831e1000 D exphy_cd -ffffffff831e2000 D rlphy_cd -ffffffff831e3000 D lxtphy_cd -ffffffff831e4000 D luphy_cd -ffffffff831e5000 D mtdphy_cd -ffffffff831e6000 D icsphy_cd -ffffffff831e7000 D sqphy_cd -ffffffff831e8000 D tqphy_cd -ffffffff831e9000 D ukphy_cd -ffffffff831ea000 D dcphy_cd -ffffffff831eb000 D bmtphy_cd -ffffffff831ec000 D brgphy_cd -ffffffff831ed000 D xmphy_cd -ffffffff831ee000 D amphy_cd -ffffffff831ef000 D acphy_cd -ffffffff831f0000 D nsgphy_cd -ffffffff831f1000 D urlphy_cd -ffffffff831f2000 D rgephy_cd -ffffffff831f3000 D ciphy_cd -ffffffff831f4000 D ipgphy_cd -ffffffff831f5000 D etphy_cd -ffffffff831f6000 D jmphy_cd -ffffffff831f7000 D atphy_cd -ffffffff831f8000 D scsi_autoconf -ffffffff831f8008 D scsibus_cd -ffffffff831f9000 D cd_cd -ffffffff831fa000 D ch_cd -ffffffff831fa020 D chquirks -ffffffff831fb000 D sd_cd -ffffffff831fc000 D st_cd -ffffffff831fd000 D uk_cd -ffffffff831fe000 D safte_cd -ffffffff831ff000 D ses_cd -ffffffff83200000 D sym_cd -ffffffff83200020 D sym_devices -ffffffff83200070 D asym_devices -ffffffff83201000 D rdac_cd -ffffffff83201020 D rdac_devices -ffffffff83202000 D emc_cd -ffffffff83202020 D emc_devices -ffffffff83203000 D hds_cd -ffffffff83203020 D hds_devices -ffffffff83204000 D atapiscsi_cd -ffffffff83205000 D wd_cd -ffffffff83205020 d wddumpmulti -ffffffff83206000 D mainbus_cd -ffffffff83206020 D mba_iba -ffffffff83207000 D bios_cd -ffffffff83207020 D smbios_uninfo -ffffffff83208000 D mpbios_cd -ffffffff83208020 d mp_conf -ffffffff83208070 d extint_bus -ffffffff832080a0 d smi_bus -ffffffff832080d0 d nmi_bus -ffffffff83209000 D cpu_info_full_primary -ffffffff8320c000 D cpu_info_list -ffffffff8320c008 D mp_cpu_funcs -ffffffff8320c020 D cpu_cd -ffffffff8320c040 D cpu_info -ffffffff8320d000 D local_pic -ffffffff8320d090 D lapic_readreg -ffffffff8320d098 D lapic_writereg -ffffffff8320d0a0 D x86_ipi -ffffffff8320e000 D ioapic_cold -ffffffff8320e008 D ioapic_cd -ffffffff8320f000 D efifb_std_descr -ffffffff8320f030 D efifb_descrs -ffffffff8320f038 D efifb_accessops -ffffffff8320f098 D efifb_cd -ffffffff83210000 D pvbus_cd -ffffffff83210020 D pvbus_types -ffffffff832100e0 D pvbus_dma_tag -ffffffff83211000 D pvclock_cd -ffffffff83211020 D pvclock_timecounter -ffffffff83212000 D vmt_tclo_rpc -ffffffff832120d0 D vmt_cd -ffffffff83213000 D xen_cd -ffffffff83213020 D xen_bus_dma_tag -ffffffff83214000 D xnf_cd -ffffffff83215000 D xbf_cd -ffffffff83216000 D hv_msg_dispatch -ffffffff83216110 D hv_timecounter -ffffffff83216160 D hyperv_cd -ffffffff83217000 d hv_ic_devs -ffffffff83218000 D hvn_cd -ffffffff83219000 D hvs_cd -ffffffff8321a000 D virtio_cd -ffffffff8321b000 D vio_cd -ffffffff8321c000 D vioblk_cd -ffffffff8321d000 D viomb_cd -ffffffff8321e000 D viornd_cd -ffffffff8321f000 D vioscsi_cd -ffffffff83220000 D vmmci_cd -ffffffff83221000 D pci_cd -ffffffff83222000 D arc_fw_hdr -ffffffff83222008 D arc_cd -ffffffff83223000 D jmb_cd -ffffffff83224000 D mfii_cd -ffffffff83225000 D ips_cd -ffffffff83226000 D eap_cd -ffffffff83227000 D auacer_cd -ffffffff83228000 D auich_cd -ffffffff83229000 D azalia_cd -ffffffff8322a000 D envy_cd -ffffffff8322a020 D envy_matchids -ffffffff8322a030 D envy_rates -ffffffff8322a0b0 D ak4524_dac -ffffffff8322a0d8 D ak4524_adc -ffffffff8322a100 D ak4358_dac -ffffffff8322a128 D ak5365_adc -ffffffff8322a150 D unkenvy_codec -ffffffff8322a180 D envy_cards -ffffffff8322a3f0 D envy_cards_ht -ffffffff8322a600 d julia_eeprom -ffffffff8322b000 D emu_cd -ffffffff8322c000 D auixp_cd -ffffffff8322d000 D clcs_cd -ffffffff8322e000 D yds_cd -ffffffff8322f000 D auvia_cd -ffffffff83230000 D qle_cd -ffffffff83231000 D mpii_cd -ffffffff83232000 D aq_cd -ffffffff83233000 D de_cd -ffffffff83234000 D pcn_cd -ffffffff83235000 D wdc_sii3114_vtbl -ffffffff83235038 D wdc_pdc203xx_vtbl -ffffffff83235070 D wdc_svwsata_vtbl -ffffffff832350a8 D pciide_cd -ffffffff832350d0 d sis_hostbr_type -ffffffff83236000 D ppb_cd -ffffffff83237000 D vr_cd -ffffffff83237020 D vr_devices -ffffffff83238000 D txp_cd -ffffffff83239000 D bt848_card_signature -ffffffff8323a000 D bktr_cd -ffffffff8323b000 D em_cd -ffffffff8323c000 D ixgb_cd -ffffffff8323d000 D ix_cd -ffffffff8323d020 D ixgbe_smart_speed -ffffffff8323d024 D ixgbe_enable_msix -ffffffff8323e000 D ixl_cd -ffffffff8323e020 d ixl_sff_lock -ffffffff8323f000 D xge_cd -ffffffff83240000 D thtc_cd -ffffffff83240020 D tht_cd -ffffffff83240040 D tht_txt_desc -ffffffff83240068 D tht_rxf_desc -ffffffff83240090 D tht_rxd_desc -ffffffff832400b8 D tht_txf_desc -ffffffff83241000 D myx_cd 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no_constraint +ffffffff8319c000 d uvm_kmapent_warn_rate +ffffffff8319d000 D maxslp +ffffffff8319e000 D uvmpagerops +ffffffff8319f000 D uvm_swap_data_lock +ffffffff8319f010 D swap_syscall_lock +ffffffff8319f020 D oommtx +ffffffff831a0000 D uvm_doswapencrypt +ffffffff831a1000 D gif_list +ffffffff831a1010 D gif_cloner +ffffffff831a2000 D divert6_sendspace +ffffffff831a2004 D divert6_recvspace +ffffffff831a2008 D divb6hashsize +ffffffff831a3000 d in6_get_hw_ifid.allone +ffffffff831a4000 D ip6_sendredirects +ffffffff831a4004 D ip6_defhlim +ffffffff831a4008 D ip6_defmcasthlim +ffffffff831a400c D ip6_maxfragpackets +ffffffff831a4010 D ip6_maxfrags +ffffffff831a4014 D ip6_log_interval +ffffffff831a4018 D ip6_hdrnestlimit +ffffffff831a401c D ip6_dad_count +ffffffff831a4020 D ip6_auto_flowlabel +ffffffff831a4024 D ip6_use_deprecated +ffffffff831a4028 D ip6_neighborgcthresh +ffffffff831a402c D ip6_maxdynroutes +ffffffff831a4030 D rip6_sendspace +ffffffff831a4038 D rip6_recvspace +ffffffff831a4040 D icmp6_redirtimeout +ffffffff831a4044 D icmp6errppslim +ffffffff831a4048 D ip6_mtudisc_timeout +ffffffff831a5000 D frag6_mutex +ffffffff831a6000 d icmp6_mtudisc_hiwat +ffffffff831a6004 d icmp6_mtudisc_lowat +ffffffff831a7000 d randomtab_20 +ffffffff831a8000 D ip6intrq +ffffffff831a8038 d ip6send_task +ffffffff831a9000 D nd6_timer_next +ffffffff831a9008 D nd6_expire_next +ffffffff831a9010 D nd6_delay +ffffffff831a9014 D nd6_umaxtries +ffffffff831a9018 D nd6_mmaxtries +ffffffff831a901c D nd6_gctimer +ffffffff831a9020 D nd6_maxndopt +ffffffff831aa000 d dadq +ffffffff831ab000 D pfkeyv2_mtx +ffffffff831ab010 d pfkeyv2_seq +ffffffff831ac000 D sadb_exts_allowed_in +ffffffff831ac090 D sadb_exts_required_in +ffffffff831ad000 D cold +ffffffff831ae000 D bdevsw +ffffffff831ae460 D nblkdev +ffffffff831ae470 D cdevsw +ffffffff831b0400 D nchrdev +ffffffff831b0404 D mem_no +ffffffff831b0408 D swapdev +ffffffff831b0410 D constab +ffffffff831b1000 D machine +ffffffff831b1008 D lid_action +ffffffff831b100c D pwr_action +ffffffff831b1010 D isa_constraint +ffffffff831b1020 D dma_constraint +ffffffff831b1030 D uvm_md_constraints +ffffffff831b1048 D delay_func +ffffffff831b1050 D initclock_func +ffffffff831b1058 D bootinfo_size +ffffffff831b105c D waittime +ffffffff831b1060 D dumpmag +ffffffff831b2000 D tsc_rdtsc +ffffffff831b2008 D tsc_timecounter +ffffffff831b2058 D tsc_is_synchronized +ffffffff831b3000 D local_apic +ffffffff831b3020 D lapic_id +ffffffff831b3080 D lapic_tpr +ffffffff831b30a0 d lapic_ppr +ffffffff831b3100 d lapic_isr +ffffffff831b4000 D warn_once +ffffffff831b5000 d errata +ffffffff831b6000 D cpu_ucode_intel_mtx +ffffffff831b7000 D mem_owner_bios +ffffffff831b7008 D mrops +ffffffff831b7028 D mtrrmask +ffffffff831b7030 D mtrrtomrt +ffffffff831b8000 D pmap_pg_wc +ffffffff831b8008 D pmaps_lock +ffffffff831b8018 d pmap_maxkvaddr +ffffffff831b9000 D kv_physwait +ffffffff831ba000 D fpu_save_len +ffffffff831bb000 D i8259_pic +ffffffff831bc000 D softintr_pic +ffffffff831bd000 D ipifunc +ffffffff831be000 D setperf_mp_mutex +ffffffff831bf000 D db_Grp6 +ffffffff831bf040 D db_Grp7 +ffffffff831bf100 D db_Grp8 +ffffffff831bf140 D db_Grp9 +ffffffff831bf200 D db_GrpA +ffffffff831bf240 D db_GrpB +ffffffff831bf280 D db_GrpC +ffffffff831bf2c0 D db_inst_0f0x +ffffffff831bf440 D db_inst_0f2x +ffffffff831bf5c0 D db_inst_0f3x +ffffffff831bf740 D db_inst_0f8x +ffffffff831bf8c0 D db_inst_0f9x +ffffffff831bfa40 D db_inst_0fax +ffffffff831bfbc0 D db_inst_0fbx +ffffffff831bfd40 D db_inst_0fcx +ffffffff831bfec0 D db_inst_0f +ffffffff831bff40 D db_Esc92 +ffffffff831bff80 D db_Esc94 +ffffffff831bffc0 D db_Esc95 +ffffffff831c0000 D db_Esc96 +ffffffff831c0040 D db_Esc97 +ffffffff831c0080 D db_Esca5 +ffffffff831c00c0 D db_Escb4 +ffffffff831c0100 D db_Esce3 +ffffffff831c0140 D db_Escf4 +ffffffff831c0180 D db_Esc8 +ffffffff831c0240 D db_Esc9 +ffffffff831c0300 D db_Esca +ffffffff831c03c0 D db_Escb +ffffffff831c0480 D db_Escc +ffffffff831c0540 D db_Escd +ffffffff831c0600 D db_Esce +ffffffff831c06c0 D db_Escf +ffffffff831c0780 D db_Esc_inst +ffffffff831c07c0 D db_Grp1 +ffffffff831c0800 D db_Grp2 +ffffffff831c0840 D db_Grp3 +ffffffff831c0900 D db_Grp4 +ffffffff831c09c0 D db_Grp5 +ffffffff831c0a80 D db_inst_table +ffffffff831c2280 D db_bad_inst +ffffffff831c22a0 D db_index_reg_16 +ffffffff831c22e0 D db_reg +ffffffff831c24e0 D db_seg_reg +ffffffff831c2520 D db_lengths +ffffffff831c3000 D db_regs +ffffffff831c31e0 D db_eregs +ffffffff831c31f0 D db_reg_args +ffffffff831c4000 D timer_mutex +ffffffff831c4010 d i8254_timecounter +ffffffff831c5000 D spleen8x16 +ffffffff831c5058 D spleen12x24 +ffffffff831c50b0 D spleen16x32 +ffffffff831c5108 D spleen32x64 +ffffffff831c5160 d builtin_fonts +ffffffff831c51e0 d wsfont_add.cookiegen +ffffffff831c51f0 d spleen8x16_data +ffffffff831c5ff0 d spleen12x24_data +ffffffff831c89f0 d spleen16x32_data +ffffffff831cc1f0 d spleen32x64_data +ffffffff831db000 D nsphy_cd +ffffffff831dc000 D nsphyter_cd +ffffffff831dd000 D gentbi_cd +ffffffff831de000 D qsphy_cd +ffffffff831df000 D inphy_cd +ffffffff831e0000 D iophy_cd +ffffffff831e1000 D eephy_cd +ffffffff831e2000 D exphy_cd +ffffffff831e3000 D rlphy_cd +ffffffff831e4000 D lxtphy_cd +ffffffff831e5000 D luphy_cd +ffffffff831e6000 D mtdphy_cd +ffffffff831e7000 D icsphy_cd +ffffffff831e8000 D sqphy_cd +ffffffff831e9000 D tqphy_cd +ffffffff831ea000 D ukphy_cd +ffffffff831eb000 D dcphy_cd +ffffffff831ec000 D bmtphy_cd +ffffffff831ed000 D brgphy_cd +ffffffff831ee000 D xmphy_cd +ffffffff831ef000 D amphy_cd +ffffffff831f0000 D acphy_cd +ffffffff831f1000 D nsgphy_cd +ffffffff831f2000 D urlphy_cd +ffffffff831f3000 D rgephy_cd +ffffffff831f4000 D ciphy_cd +ffffffff831f5000 D ipgphy_cd +ffffffff831f6000 D etphy_cd +ffffffff831f7000 D jmphy_cd +ffffffff831f8000 D atphy_cd +ffffffff831f9000 D scsi_autoconf +ffffffff831f9008 D scsibus_cd +ffffffff831fa000 D cd_cd +ffffffff831fb000 D ch_cd +ffffffff831fb020 D chquirks +ffffffff831fc000 D sd_cd +ffffffff831fd000 D st_cd +ffffffff831fe000 D uk_cd +ffffffff831ff000 D safte_cd +ffffffff83200000 D ses_cd +ffffffff83201000 D sym_cd +ffffffff83201020 D sym_devices +ffffffff83201070 D asym_devices +ffffffff83202000 D rdac_cd +ffffffff83202020 D rdac_devices +ffffffff83203000 D emc_cd +ffffffff83203020 D emc_devices +ffffffff83204000 D hds_cd +ffffffff83204020 D hds_devices +ffffffff83205000 D atapiscsi_cd +ffffffff83206000 D wd_cd +ffffffff83206020 d wddumpmulti +ffffffff83207000 D mainbus_cd +ffffffff83207020 D mba_iba +ffffffff83208000 D bios_cd +ffffffff83208020 D smbios_uninfo +ffffffff83209000 D mpbios_cd +ffffffff83209020 d mp_conf +ffffffff83209070 d extint_bus +ffffffff832090a0 d smi_bus +ffffffff832090d0 d nmi_bus +ffffffff8320a000 D cpu_info_full_primary +ffffffff8320d000 D cpu_info_list +ffffffff8320d008 D mp_cpu_funcs +ffffffff8320d020 D cpu_cd +ffffffff8320d040 D cpu_info +ffffffff8320e000 D local_pic +ffffffff8320e090 D lapic_readreg +ffffffff8320e098 D lapic_writereg +ffffffff8320e0a0 D x86_ipi +ffffffff8320f000 D ioapic_cold +ffffffff8320f008 D ioapic_cd +ffffffff83210000 D efifb_std_descr +ffffffff83210030 D efifb_descrs +ffffffff83210038 D efifb_accessops +ffffffff83210098 D efifb_cd +ffffffff83211000 D pvbus_cd +ffffffff83211020 D pvbus_types +ffffffff832110e0 D pvbus_dma_tag +ffffffff83212000 D pvclock_cd +ffffffff83212020 D pvclock_timecounter +ffffffff83213000 D vmt_tclo_rpc +ffffffff832130d0 D vmt_cd +ffffffff83214000 D xen_cd +ffffffff83214020 D xen_bus_dma_tag +ffffffff83215000 D xnf_cd +ffffffff83216000 D xbf_cd +ffffffff83217000 D hv_msg_dispatch +ffffffff83217110 D hv_timecounter +ffffffff83217160 D hyperv_cd +ffffffff83218000 d hv_ic_devs +ffffffff83219000 D hvn_cd +ffffffff8321a000 D hvs_cd +ffffffff8321b000 D virtio_cd +ffffffff8321c000 D vio_cd +ffffffff8321d000 D vioblk_cd +ffffffff8321e000 D viomb_cd +ffffffff8321f000 D viornd_cd +ffffffff83220000 D vioscsi_cd +ffffffff83221000 D vmmci_cd +ffffffff83222000 D pci_cd +ffffffff83223000 D arc_fw_hdr +ffffffff83223008 D arc_cd +ffffffff83224000 D jmb_cd +ffffffff83225000 D mfii_cd +ffffffff83226000 D ips_cd +ffffffff83227000 D eap_cd +ffffffff83228000 D auacer_cd +ffffffff83229000 D auich_cd +ffffffff8322a000 D azalia_cd +ffffffff8322b000 D envy_cd +ffffffff8322b020 D envy_matchids +ffffffff8322b030 D envy_rates +ffffffff8322b0b0 D ak4524_dac +ffffffff8322b0d8 D ak4524_adc +ffffffff8322b100 D ak4358_dac +ffffffff8322b128 D ak5365_adc +ffffffff8322b150 D unkenvy_codec +ffffffff8322b180 D envy_cards +ffffffff8322b3f0 D envy_cards_ht +ffffffff8322b600 d julia_eeprom +ffffffff8322c000 D emu_cd +ffffffff8322d000 D auixp_cd +ffffffff8322e000 D clcs_cd +ffffffff8322f000 D yds_cd +ffffffff83230000 D auvia_cd +ffffffff83231000 D qle_cd +ffffffff83232000 D mpii_cd +ffffffff83233000 D aq_cd +ffffffff83234000 D de_cd +ffffffff83235000 D pcn_cd +ffffffff83236000 D wdc_sii3114_vtbl +ffffffff83236038 D wdc_pdc203xx_vtbl +ffffffff83236070 D wdc_svwsata_vtbl +ffffffff832360a8 D pciide_cd +ffffffff832360d0 d sis_hostbr_type +ffffffff83237000 D ppb_cd +ffffffff83238000 D vr_cd +ffffffff83238020 D vr_devices +ffffffff83239000 D txp_cd +ffffffff8323a000 D bt848_card_signature +ffffffff8323b000 D bktr_cd +ffffffff8323c000 D em_cd +ffffffff8323d000 D ixgb_cd +ffffffff8323e000 D ix_cd +ffffffff8323e020 D ixgbe_smart_speed +ffffffff8323e024 D ixgbe_enable_msix +ffffffff8323f000 D ixl_cd +ffffffff8323f020 d ixl_sff_lock +ffffffff83240000 D xge_cd +ffffffff83241000 D thtc_cd +ffffffff83241020 D tht_cd +ffffffff83241040 D tht_txt_desc +ffffffff83241068 D tht_rxf_desc +ffffffff83241090 D tht_rxd_desc +ffffffff832410b8 D tht_txf_desc +ffffffff83242000 D myx_cd +ffffffff83243000 D oce_cd +ffffffff83244000 D dc_devs +ffffffff83245000 D cas_cd +ffffffff83246000 D sis_cd +ffffffff83247000 D se_cd +ffffffff83248000 D cbb_cd +ffffffff83248020 D yc_chipsets +ffffffff832481b0 d pccbb_funcs +ffffffff832481e0 d pccbb_pcmcia_funcs +ffffffff83249000 D skc_cd +ffffffff83249020 D sk_cd +ffffffff8324a000 D mskc_cd +ffffffff8324a020 D msk_cd +ffffffff8324b000 D puc_cd +ffffffff8324c000 D puc_ndevs +ffffffff8324d000 D iwi_cd +ffffffff8324e000 D wpi_cd +ffffffff8324f000 D iwn_cd +ffffffff83250000 D iwm_cd +ffffffff83251000 D iwx_cd +ffffffff83252000 D cmpci_cd +ffffffff83253000 D iha_cd +ffffffff83254000 D pcscp_cd +ffffffff83254020 D pcscp_glue +ffffffff83255000 D bge_cd +ffffffff83256000 D bnx_firmwares +ffffffff83256160 D bnx_rv2ps +ffffffff832561c0 D bnx_cd +ffffffff832561e0 d flash_5709 +ffffffff83256210 d flash_table +ffffffff83257000 D vge_cd +ffffffff83258000 D stge_cd +ffffffff83259000 D nfe_cd +ffffffff8325a000 D et_cd +ffffffff8325b000 D jme_cd +ffffffff8325c000 D age_cd +ffffffff8325d000 D alc_dma_burst +ffffffff8325d020 D alc_cd +ffffffff8325e000 D ale_cd +ffffffff8325f000 D amdpm_cd +ffffffff8325f020 d amdpm_timecounter +ffffffff83260000 D bce_cd +ffffffff83261000 D rtwn_cd +ffffffff83262000 d ral_rt2560_opns +ffffffff83262028 d ral_rt2661_opns +ffffffff83262050 d ral_rt2860_opns +ffffffff83263000 D piixpm_cd +ffffffff83264000 D vic_cd +ffffffff83265000 D vmx_cd +ffffffff83266000 D vmwpvs_cd +ffffffff83267000 D lii_cd +ffffffff83268000 D ichiic_cd +ffffffff83269000 D viapm_cd +ffffffff83269020 d viapm_timecounter +ffffffff8326a000 D amdiic_cd +ffffffff8326b000 D nviic_cd +ffffffff8326c000 D kate_cd +ffffffff8326d000 D km_cd +ffffffff8326e000 D cpu_model_offsets +ffffffff8326e070 D ksmn_cd +ffffffff8326f000 D itherm_cd +ffffffff83270000 D pchtemp_cd +ffffffff83271000 D xspd_cd +ffffffff83272000 D virtio_pci_ops +ffffffff83273000 D bwfm_pci_buscore_ops +ffffffff83273030 D bwfm_pci_bus_ops +ffffffff83273058 D bwfm_pci_msgbuf_ops +ffffffff83274000 D bnxt_cd +ffffffff83275000 D mcx_cd +ffffffff83276000 D iavf_cd +ffffffff83277000 D rge_cd +ffffffff83278000 D igc_cd +ffffffff83279000 D ngbe_cd +ffffffff8327a000 D agp_cd +ffffffff8327b000 D intagp_cd +ffffffff8327b020 D agp_i810_methods +ffffffff8327c000 D reservation_ww_class +ffffffff8327d000 d bridge_lock +ffffffff8327d010 d bridge_list +ffffffff8327e000 d drm_connector_enum_list +ffffffff8327e1f8 d connector_list_lock +ffffffff8327e208 d connector_list +ffffffff8327f000 d kernel_fb_helper_list +ffffffff8327f010 d kernel_fb_helper_lock +ffffffff83280000 D drm_global_mutex +ffffffff83281000 D sch_mtx +ffffffff83281010 D i2c_bit_algo +ffffffff83281020 d drm_fence_context_count +ffffffff83281028 d dma_fence_stub_mtx +ffffffff83281038 D wait_bit_mtx +ffffffff83281048 D shrinkers +ffffffff83282000 d crtc_ww_class +ffffffff83283000 d panel_lock +ffffffff83283010 d panel_list +ffffffff83284000 d ttm_global_mutex +ffffffff83285000 D intel_bbops +ffffffff83286000 d i915_sys_placement +ffffffff83286020 d i915_ttm_bo_driver +ffffffff83287000 d mchdev_lock +ffffffff83288000 D inteldrm_stdscreen +ffffffff83288030 D inteldrm_scrlist +ffffffff83288038 D inteldrm_screenlist +ffffffff83288048 D inteldrm_accessops +ffffffff832880a8 D inteldrm_cd +ffffffff83289000 d capture_mutex +ffffffff8328a000 d mitigations +ffffffff8328b000 D i915_modparams +ffffffff8328c000 d schedule_lock +ffffffff8328d000 d unbind_fence_ops +ffffffff8328e000 D intel_graphics_stolen_res +ffffffff8328f000 D btc_valid_sclk +ffffffff83290000 d evergreen_cs_packet_parse_vline.vline_start_end +ffffffff83290020 d evergreen_cs_packet_parse_vline.vline_status +ffffffff83291000 d r600_cs_packet_parse_vline.vline_start_end +ffffffff83291008 d r600_cs_packet_parse_vline.vline_status +ffffffff83292000 d r100_asic +ffffffff832922e0 d r200_asic +ffffffff832925c0 d r300_asic_pcie +ffffffff832928a0 d r300_asic +ffffffff83292b80 d r420_asic +ffffffff83292e60 d rs400_asic +ffffffff83293140 d rs600_asic +ffffffff83293420 d rs690_asic +ffffffff83293700 d rv515_asic +ffffffff832939e0 d r520_asic +ffffffff83293cc0 d r600_asic +ffffffff83293fa0 d rv6xx_asic +ffffffff83294280 d rs780_asic +ffffffff83294560 d rv770_asic +ffffffff83294840 d evergreen_asic +ffffffff83294b20 d sumo_asic +ffffffff83294e00 d btc_asic +ffffffff832950e0 d cayman_asic +ffffffff832953c0 d trinity_asic +ffffffff832956a0 d si_asic +ffffffff83295980 d ci_asic +ffffffff83295c60 d kv_asic +ffffffff83296000 d dce6_funcs +ffffffff83296018 d dce6_hdmi_funcs +ffffffff83296088 d dce6_dp_funcs +ffffffff832960f8 d dce4_funcs +ffffffff83296110 d dce4_hdmi_funcs +ffffffff83296180 d dce4_dp_funcs +ffffffff832961f0 d dce32_funcs +ffffffff83296208 d dce32_hdmi_funcs +ffffffff83296278 d dce32_dp_funcs +ffffffff832962e8 d r600_funcs +ffffffff83296300 d r600_hdmi_funcs +ffffffff83297000 D radeon_modeset +ffffffff83297004 D radeon_dynclks +ffffffff83297008 D radeon_agpmode +ffffffff8329700c D radeon_gart_size +ffffffff83297010 D radeon_tv +ffffffff83297014 D radeon_audio +ffffffff83297018 D radeon_pcie_gen2 +ffffffff8329701c D radeon_msi +ffffffff83297020 D radeon_lockup_timeout +ffffffff83297024 D radeon_dpm +ffffffff83297028 D radeon_aspm +ffffffff8329702c D radeon_runtime_pm +ffffffff83297030 D radeon_vm_size +ffffffff83297034 D radeon_vm_block_size +ffffffff83297038 D radeon_use_pflipirq +ffffffff8329703c D radeon_bapm +ffffffff83297040 D radeon_backlight +ffffffff83297044 D radeon_auxch +ffffffff83297048 D radeon_uvd +ffffffff8329704c D radeon_vce +ffffffff83297050 D radeon_si_support +ffffffff83297054 D radeon_cik_support +ffffffff83297058 D radeondrm_cd +ffffffff83297078 D radeondrm_stdscreen +ffffffff832970a8 D radeondrm_scrlist +ffffffff832970b0 D radeondrm_screenlist +ffffffff832970c0 D radeondrm_accessops +ffffffff83298000 D radeon_bbops +ffffffff83299000 d radeon_bo_driver +ffffffff8329a000 d verde_pg_init +ffffffff8329b000 d cac_weights_pitcairn +ffffffff8329b4d0 d cac_weights_oland +ffffffff8329c000 d aldebaran_mode2_handler +ffffffff8329d000 d amdgpu_vbios_version_attrs +ffffffff8329e000 D amdgpu_asic_name +ffffffff8329f000 D amdgpu_gart_size +ffffffff8329f004 D amdgpu_gtt_size +ffffffff8329f008 D amdgpu_moverate +ffffffff8329f00c D amdgpu_audio +ffffffff8329f010 D amdgpu_pcie_gen2 +ffffffff8329f014 D amdgpu_msi +ffffffff8329f018 D amdgpu_dpm +ffffffff8329f01c D amdgpu_fw_load_type +ffffffff8329f020 D amdgpu_aspm +ffffffff8329f024 D amdgpu_runtime_pm +ffffffff8329f028 D amdgpu_ip_block_mask +ffffffff8329f02c D amdgpu_bapm +ffffffff8329f030 D amdgpu_vm_size +ffffffff8329f034 D amdgpu_vm_fragment_size +ffffffff8329f038 D amdgpu_vm_block_size +ffffffff8329f03c D amdgpu_vm_update_mode +ffffffff8329f040 D amdgpu_dc +ffffffff8329f044 D amdgpu_sched_jobs +ffffffff8329f048 D amdgpu_sched_hw_submission +ffffffff8329f050 D amdgpu_cg_mask +ffffffff8329f058 D amdgpu_pg_mask +ffffffff8329f05c D amdgpu_sdma_phase_quantum +ffffffff8329f060 D amdgpu_pp_feature_mask +ffffffff8329f064 D amdgpu_lbpw +ffffffff8329f068 D amdgpu_compute_multipipe +ffffffff8329f06c D amdgpu_gpu_recovery +ffffffff8329f070 D amdgpu_smu_pptable_id +ffffffff8329f074 D amdgpu_dc_feature_mask +ffffffff8329f078 D amdgpu_async_gfx_ring +ffffffff8329f07c D amdgpu_discovery +ffffffff8329f080 D amdgpu_noretry +ffffffff8329f084 D amdgpu_force_asic_type +ffffffff8329f088 D amdgpu_tmz +ffffffff8329f08c D amdgpu_reset_method +ffffffff8329f090 D amdgpu_num_kcq +ffffffff8329f094 D amdgpu_use_xgmi_p2p +ffffffff8329f098 D mgpu_info +ffffffff8329f248 D amdgpu_ras_enable +ffffffff8329f24c D amdgpu_ras_mask +ffffffff8329f250 D amdgpu_bad_page_threshold +ffffffff8329f254 D amdgpu_backlight +ffffffff8329f258 D amdgpu_cd +ffffffff8329f278 D amdgpu_stdscreen +ffffffff8329f2a8 D amdgpu_scrlist +ffffffff8329f2b0 D amdgpu_screenlist +ffffffff8329f2c0 D amdgpu_accessops +ffffffff832a0000 d amdgpu_gtt_mgr_attributes +ffffffff832a1000 D amdgpu_bbops +ffffffff832a2000 D soc15_ih_clientid_name +ffffffff832a3000 D ras_error_string +ffffffff832a3030 D ras_block_string +ffffffff832a30c0 D ras_mca_block_string +ffffffff832a4000 d amdgpu_bo_driver +ffffffff832a5000 d amdgpu_vram_mgr_attributes +ffffffff832a6000 D amdgpu_xgmi_hive_type +ffffffff832a6008 d xgmi_mutex +ffffffff832a6018 D xgmi_ras_hw_ops +ffffffff832a6058 D xgmi_ras +ffffffff832a7000 d gfx_v9_0_ras +ffffffff832a8000 D gfx_v9_4_ras +ffffffff832a9000 D gfx_v9_4_2_ras_ops +ffffffff832a9040 D gfx_v9_4_2_ras +ffffffff832aa000 D hdp_v4_0_ras_hw_ops +ffffffff832aa040 D hdp_v4_0_ras +ffffffff832ab000 d jpeg_v2_6_ras +ffffffff832ac000 D mca_v3_0_mp0_ras +ffffffff832ac058 D mca_v3_0_mp1_ras +ffffffff832ac0b0 D mca_v3_0_mpio_ras +ffffffff832ad000 D mmhub_v1_0_ras_hw_ops +ffffffff832ad040 D mmhub_v1_0_ras +ffffffff832ae000 D mmhub_v1_7_ras_hw_ops +ffffffff832ae040 D mmhub_v1_7_ras +ffffffff832af000 D mmhub_v9_4_ras +ffffffff832b0000 D nbio_v7_4_ras +ffffffff832b1000 d sriov_sc_video_codecs_encode +ffffffff832b1010 d sriov_sc_video_codecs_decode +ffffffff832b1020 d sriov_sc_video_codecs_encode_array +ffffffff832b1050 d sriov_sc_video_codecs_decode_array +ffffffff832b2000 d sdma_v4_0_ras +ffffffff832b3000 D sdma_v4_4_ras +ffffffff832b4000 d sienna_cichlid_mode2_handler +ffffffff832b5000 D umc_v6_1_ras +ffffffff832b6000 D umc_v6_7_ras +ffffffff832b7000 D umc_v8_10_ras +ffffffff832b8000 D umc_v8_7_ras +ffffffff832b9000 d vcn_v2_6_ras +ffffffff832ba000 d amdgpu_dm_mode_config_helperfuncs +ffffffff832ba010 d dm_atomic_state_funcs +ffffffff832bb000 d construct_integrated_info.result +ffffffff832bb004 d bios_parser_get_firmware_info.result +ffffffff832bc000 d dce_funcs +ffffffff832bd000 d dce110_funcs +ffffffff832be000 d dce112_funcs +ffffffff832bf000 d dce120_funcs +ffffffff832c0000 d rv1_clk_funcs +ffffffff832c0088 d rv1_clk_internal_funcs +ffffffff832c1000 d rv2_clk_internal_funcs +ffffffff832c2000 d dcn2_funcs +ffffffff832c3000 D dcn201_funcs +ffffffff832c4000 d dcn21_funcs +ffffffff832c4088 d rn_bw_params +ffffffff832c5000 D dcn3_fpga_funcs +ffffffff832c5088 d dcn3_funcs +ffffffff832c6000 d vg_funcs +ffffffff832c6088 d dummy_clocks +ffffffff832c61b8 d vg_bw_params +ffffffff832c7000 d dcn31_bw_params +ffffffff832c72a0 d dcn31_funcs +ffffffff832c8000 d dcn314_bw_params +ffffffff832c82a0 d dcn314_funcs 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+ffffffff832f2d40 D dcn2_0_nv14_soc +ffffffff832f3710 D dcn2_1_ip +ffffffff832f38c8 D dcn2_1_soc +ffffffff832f4298 D ddr4_wm_table_gs +ffffffff832f4358 D lpddr4_wm_table_gs +ffffffff832f4418 D lpddr4_wm_table_with_disabled_ppt +ffffffff832f44d8 D ddr4_wm_table_rn +ffffffff832f4598 D ddr4_1R_wm_table_rn +ffffffff832f4658 D lpddr4_wm_table_rn +ffffffff832f5000 D dcn3_0_ip +ffffffff832f51b8 D dcn3_0_soc +ffffffff832f6000 D dcn3_01_ip +ffffffff832f61b8 D dcn3_01_soc +ffffffff832f6b88 D ddr4_wm_table +ffffffff832f6c48 D lpddr5_wm_table +ffffffff832f7000 D dcn3_02_ip +ffffffff832f71b8 D dcn3_02_soc +ffffffff832f8000 D dcn3_03_ip +ffffffff832f81b8 D dcn3_03_soc +ffffffff832f9000 D dcn3_1_ip +ffffffff832f91b8 D dcn3_15_ip +ffffffff832f9370 D dcn3_16_ip +ffffffff832f9528 d dcn3_15_soc +ffffffff832f9ef8 d dcn3_1_soc +ffffffff832fa8c8 d dcn3_16_soc +ffffffff832fc000 D dcn3_14_ip +ffffffff832fc1b8 D dcn3_14_soc +ffffffff832fd000 D dcn3_2_ip +ffffffff832fd1b8 D dcn3_2_soc +ffffffff832fe000 D dcn3_21_ip +ffffffff832fe1b8 D dcn3_21_soc +ffffffff832ff000 d dsc_policy_max_target_bpp_limit +ffffffff83300000 D DIDTEDCConfig_P12 +ffffffff83300070 d smu7_profiling +ffffffff83301000 d cyan_skillfish_table_map +ffffffff83301080 d cyan_skillfish_message_map +ffffffff83302000 d navi10_table_map +ffffffff83302080 d navi10_pwr_src_map +ffffffff83302090 d navi10_workload_map +ffffffff833020d0 d navi10_message_map +ffffffff83302b20 d navi10_clk_map +ffffffff83302be0 d navi10_feature_mask_map +ffffffff83303000 d sienna_cichlid_message_map +ffffffff83303a50 d sienna_cichlid_table_map +ffffffff83303ad0 d sienna_cichlid_pwr_src_map +ffffffff83303ae0 d sienna_cichlid_workload_map +ffffffff83303b20 d sienna_cichlid_clk_map +ffffffff83303be0 d sienna_cichlid_feature_mask_map +ffffffff83304000 d vangogh_message_map +ffffffff83304a50 d vangogh_table_map +ffffffff83304ad0 d vangogh_workload_map +ffffffff83304b10 d vangogh_feature_mask_map +ffffffff83305000 d renoir_table_map +ffffffff83305080 d renoir_workload_map +ffffffff833050c0 d renoir_message_map +ffffffff83305b10 d renoir_clk_map +ffffffff83306000 d smu_v13_0_0_message_map +ffffffff83306a50 d smu_v13_0_0_feature_mask_map +ffffffff83306e20 d smu_v13_0_0_table_map +ffffffff83306ea0 d smu_v13_0_0_pwr_src_map +ffffffff83306eb0 d smu_v13_0_0_workload_map +ffffffff83306ef0 d smu_v13_0_0_clk_map +ffffffff83307000 d smu_v13_0_4_message_map +ffffffff83307a50 d smu_v13_0_4_table_map +ffffffff83307ad0 d smu_v13_0_4_feature_mask_map +ffffffff83308000 d smu_v13_0_5_table_map +ffffffff83308080 d smu_v13_0_5_message_map +ffffffff83308ad0 d smu_v13_0_5_feature_mask_map +ffffffff83309000 d smu_v13_0_7_message_map +ffffffff83309a50 d smu_v13_0_7_feature_mask_map +ffffffff83309e20 d smu_v13_0_7_table_map +ffffffff83309ea0 d smu_v13_0_7_pwr_src_map +ffffffff83309eb0 d smu_v13_0_7_workload_map +ffffffff83309ef0 d smu_v13_0_7_clk_map +ffffffff8330a000 d yellow_carp_table_map +ffffffff8330a080 d yellow_carp_message_map +ffffffff8330aad0 d yellow_carp_feature_mask_map +ffffffff8330b000 D pci_conf_lock +ffffffff8330b010 D pci_bus_dma_tag +ffffffff8330b088 D msi_pic +ffffffff8330b118 D msix_pic +ffffffff8330c000 D pchb_cd +ffffffff8330d000 D amas_cd +ffffffff8330e000 D cardslot_cd +ffffffff8330f000 D cardbus_cd +ffffffff83310000 d csdevs +ffffffff83311000 d ral_rt2560_opns +ffffffff83311028 d ral_rt2661_opns +ffffffff83311050 d ral_rt2860_opns +ffffffff83312000 D pcmcia_cd +ffffffff83313000 D pcmcia_3cxem556_func0 +ffffffff833130b8 D pcmcia_3cxem556_func0_cfe0 +ffffffff83313158 D pcmcia_megahertz_xjem1144_func0 +ffffffff83313210 D pcmcia_megahertz_xjem1144_func0_cfe0 +ffffffff833132b0 d pcmcia_3cxem556_func1 +ffffffff83313368 d pcmcia_3cxem556_func1_cfe0 +ffffffff83313408 d pcmcia_megahertz_xjem1144_func1 +ffffffff833134c0 d pcmcia_megahertz_xjem1144_func1_cfe0 +ffffffff83313560 d pcmcia_sierra_a555_func1 +ffffffff83313618 d pcmcia_sierra_a555_func1_cfe0 +ffffffff833136b8 d pcmcia_sveclancard_func0 +ffffffff83313770 d pcmcia_sveclancard_func0_cfe0 +ffffffff83314000 D ep_pcmcia_prod +ffffffff83315000 D aic_pcmcia_prod +ffffffff83316000 D com_pcmcia_prod +ffffffff83317000 D wdc_pcmcia_pr +ffffffff83318000 D sm_pcmcia_prod +ffffffff83319000 D xe_cd +ffffffff8331a000 D pcib_cd +ffffffff8331b000 D amdpcib_cd +ffffffff8331c000 D tcpcib_cd +ffffffff8331d000 D aapic_cd +ffffffff8331e000 D hme_cd +ffffffff8331f000 D isa_cd +ffffffff83320000 D isadma_cd +ffffffff83321000 D fdc_cd +ffffffff83322000 D fd_types +ffffffff833221f8 D fd_cd +ffffffff83323000 D mpu_cd +ffffffff83324000 D pcppi_cd +ffffffff83325000 D spkr_cd +ffffffff83326000 D wbsio_cd +ffffffff83327000 D schsio_cd +ffffffff83328000 D it_cd +ffffffff83329000 D uguru_cd +ffffffff8332a000 D aps_cd +ffffffff8332b000 D isa_bus_dma_tag +ffffffff8332c000 D wsdisplay_cd +ffffffff8332c020 D wsdisplay_cons +ffffffff8332c058 D wsdisplay_defaultscreens +ffffffff8332d000 D wskbd_cd +ffffffff8332d020 D wskbd_default_bell_data +ffffffff8332d030 D wskbd_default_keyrepeat_data +ffffffff8332d040 D wskbd_srcops +ffffffff8332e000 d compose_tab +ffffffff8332f000 D wsmouse_cd +ffffffff8332f020 D wsmouse_srcops +ffffffff83330000 D wsmux_srcops +ffffffff83330030 D wsmux_tree_lock +ffffffff83331000 D vt100_output +ffffffff83332000 D pckbd_cd +ffffffff83333000 D pms_cd +ffffffff83333020 d synaptics_params +ffffffff83333030 d alps_params +ffffffff83334000 D skgpio_cd +ffffffff83335000 D pctr_conf_lock +ffffffff83336000 D ukbd_keymapdata +ffffffff83337000 D usbrev_str +ffffffff83337030 D usb_cd +ffffffff83338000 d usbd_ratecheck.errinterval +ffffffff83339000 D uhub_cd +ffffffff8333a000 D uaudio_cd +ffffffff8333b000 D uvideo_ctrls +ffffffff8333b2d8 D uvideo_cd +ffffffff8333c000 D utvfu_norm_params +ffffffff8333c030 D utvfu_cd +ffffffff8333d000 D udl_reg_vals_640x480_60 +ffffffff8333d020 D udl_reg_vals_640x480_67 +ffffffff8333d040 D udl_reg_vals_640x480_72 +ffffffff8333d060 D udl_reg_vals_640x480_75 +ffffffff8333d080 D udl_reg_vals_800x480_61 +ffffffff8333d0a0 D udl_reg_vals_800x600_56 +ffffffff8333d0c0 D udl_reg_vals_800x600_60 +ffffffff8333d0e0 D udl_reg_vals_800x600_72 +ffffffff8333d100 D udl_reg_vals_800x600_74 +ffffffff8333d120 D udl_reg_vals_800x600_75 +ffffffff8333d140 D udl_reg_vals_1024x768_60 +ffffffff8333d160 D udl_reg_vals_1024x768_70 +ffffffff8333d180 D udl_reg_vals_1024x768_75 +ffffffff8333d1a0 D udl_reg_vals_1280x800_60 +ffffffff8333d1c0 D udl_reg_vals_1280x960_60 +ffffffff8333d1e0 D udl_reg_vals_1280x1024_60 +ffffffff8333d200 D udl_reg_vals_1280x1024_75 +ffffffff8333d220 D udl_reg_vals_1366x768_60 +ffffffff8333d240 D udl_reg_vals_1440x900_60 +ffffffff8333d260 D udl_reg_vals_1440x900_59 +ffffffff8333d280 D udl_reg_vals_1440x900_75 +ffffffff8333d2a0 D udl_reg_vals_1680x1050_60 +ffffffff8333d2c0 D udl_reg_vals_1600x1200_60 +ffffffff8333d2e0 D udl_reg_vals_1920x1080_60 +ffffffff8333d300 D udl_null_key_1 +ffffffff8333d310 D udl_decomp_table +ffffffff8333e510 D udl_cd +ffffffff8333e530 D udl_stdscreen +ffffffff8333e560 D udl_scrlist +ffffffff8333e568 D udl_screenlist +ffffffff8333e578 D udl_accessops +ffffffff8333f000 D umidi_cd +ffffffff83340000 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE +ffffffff83340020 d umq_ROLAND_ROLAND_UM1_2 +ffffffff83340040 d umq_ROLAND_ROLAND_SC8850_2 +ffffffff83340060 d umq_ROLAND_ROLAND_SD90_2 +ffffffff83340080 d umq_ROLAND_ROLAND_UM880N_0 +ffffffff833400a0 d umq_ROLAND_ROLAND_UA100_2 +ffffffff833400c0 d umq_ROLAND_ROLAND_UM4_2 +ffffffff833400e0 d umq_ROLAND_ROLAND_U8_2 +ffffffff83340100 d umq_ROLAND_ROLAND_UM2_2 +ffffffff83340120 d umq_ROLAND_ROLAND_SC8820_2 +ffffffff83340140 d umq_ROLAND_ROLAND_PC300_2 +ffffffff83340160 d umq_ROLAND_ROLAND_SK500_2 +ffffffff83340180 d umq_ROLAND_ROLAND_SCD70_2 +ffffffff833401a0 d umq_ROLAND_ROLAND_UM550_0 +ffffffff833401c0 d umq_ROLAND_ROLAND_SD20_0 +ffffffff833401e0 d umq_ROLAND_ROLAND_SD80_0 +ffffffff83340200 d umq_ROLAND_ROLAND_UA700_3 +ffffffff83340220 d umq_ROLAND_ROLAND_UMONE_ANYIFACE +ffffffff83340240 D umidi_quirklist +ffffffff833404a0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_desc +ffffffff833404c0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_endpoints +ffffffff833404d0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_desc +ffffffff833404f0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_endpoints +ffffffff83340500 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_desc +ffffffff83340520 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_endpoints +ffffffff83340530 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_desc +ffffffff83340550 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_endpoints +ffffffff83340560 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_desc +ffffffff83340580 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_endpoints +ffffffff83340590 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_desc +ffffffff833405b0 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_endpoints +ffffffff833405c0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_desc +ffffffff833405e0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_endpoints +ffffffff833405f0 d umq_ROLAND_ROLAND_U8_2_fixed_ep_desc +ffffffff83340610 d umq_ROLAND_ROLAND_U8_2_fixed_ep_endpoints +ffffffff83340620 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_desc +ffffffff83340640 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_endpoints +ffffffff83340650 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_desc +ffffffff83340670 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_endpoints +ffffffff83340680 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_desc +ffffffff833406a0 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_endpoints +ffffffff833406b0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_desc +ffffffff833406d0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_endpoints +ffffffff833406e0 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_desc +ffffffff83340700 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_endpoints +ffffffff83340710 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_desc +ffffffff83340730 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_endpoints +ffffffff83340740 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_desc +ffffffff83340760 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_endpoints +ffffffff83340770 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_desc +ffffffff83340790 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_endpoints +ffffffff833407a0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_desc +ffffffff833407c0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_endpoints +ffffffff833407d0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_desc +ffffffff833407f0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_endpoints +ffffffff83341000 D ucom_cd +ffffffff83342000 D ugen_cd +ffffffff83343000 D uhidev_cd +ffffffff83343020 d uhidev_use_rdesc.reportbuf +ffffffff83344000 D uhid_cd +ffffffff83345000 D fido_cd +ffffffff83346000 D ujoy_cd +ffffffff83347000 D ukbd_cd +ffffffff83348000 D ums_cd +ffffffff83348020 d ums_fix_elecom_descriptor.match +ffffffff83349000 D umt_cd +ffffffff8334a000 D def_scale +ffffffff8334a020 D uts_cd +ffffffff8334b000 D ubcmtp_cd +ffffffff8334c000 D ucycom_cd +ffffffff8334d000 D uslhcom_cd +ffffffff8334e000 D ulpt_fwdevs +ffffffff8334e060 D ulpt_cd +ffffffff8334e080 D ulptusein +ffffffff8334f000 D umass_cd +ffffffff8334f020 d umass_bbb_transfer.dCBWtag +ffffffff83350000 D uthum_cd +ffffffff83351000 D ugold_cd +ffffffff83351020 d cmd_init +ffffffff83351028 d cmd_type +ffffffff83351030 d cmd_data +ffffffff83352000 D utrh_cd +ffffffff83353000 D uoakrh_cd +ffffffff83354000 D uoaklux_cd +ffffffff83355000 D uoakv_cd +ffffffff83356000 D uonerng_cd +ffffffff83357000 D urng_cd +ffffffff83358000 D udcf_cd +ffffffff83359000 D umbg_cd +ffffffff8335a000 D uvisor_cd +ffffffff8335b000 D udsbr_cd +ffffffff8335c000 D utwitch_cd +ffffffff8335d000 D aue_cd +ffffffff8335e000 D axe_cd +ffffffff8335f000 D axen_cd +ffffffff83360000 D smsc_cd +ffffffff83361000 D cue_devs +ffffffff83361010 D cue_cd +ffffffff83362000 D kue_cd +ffffffff83363000 D cdce_cd +ffffffff83364000 D urndis_cd +ffffffff83365000 D mos_cd +ffffffff83366000 D mue_cd +ffffffff83367000 D udav_cd +ffffffff83368000 D upl_devs +ffffffff83368008 D upl_cd +ffffffff83369000 D ugl_devs +ffffffff83369008 D ugl_cd +ffffffff8336a000 D url_cd +ffffffff8336b000 D ure_cd +ffffffff8336c000 D uaq_cd +ffffffff8336d000 D umodem_cd +ffffffff8336e000 D uftdi_cd +ffffffff8336f000 D uplcom_cd +ffffffff83370000 D umct_cd +ffffffff83371000 D uvscom_cd +ffffffff83372000 D ubsa_cd +ffffffff83373000 D ukspan_cd +ffffffff83374000 D uslcom_cd +ffffffff83375000 D uark_cd +ffffffff83376000 D moscom_cd +ffffffff83377000 D umcs_cd +ffffffff83378000 D uscom_cd +ffffffff83379000 D ucrcom_cd +ffffffff8337a000 D uxrcom_cd +ffffffff8337b000 D uipaq_cd +ffffffff8337c000 D umsm_cd +ffffffff8337d000 D uchcom_cd +ffffffff8337e000 D uticom_cd +ffffffff8337f000 D wi_func_usb +ffffffff8337f060 D wi_usb_cd +ffffffff83380000 D atu_cd +ffffffff83380020 D atu_devs +ffffffff83380270 D atu_radfirm +ffffffff83381000 D ural_cd +ffffffff83382000 D rum_cd +ffffffff83383000 D run_cd +ffffffff83383020 D rt3070_freqs +ffffffff83384000 D mtw_cd +ffffffff83385000 D zyd_cd +ffffffff83386000 D upgt_cd +ffffffff83387000 D urtw_cd +ffffffff83388000 D urtwn_cd +ffffffff83389000 D rsu_cd +ffffffff8338a000 D otus_cd +ffffffff8338a020 d AR_PLCP_HDR_INTR +ffffffff8338b000 D umb_xfer_tout +ffffffff8338b010 D umb_uuid_basic_connect +ffffffff8338b020 D umb_uuid_context_internet +ffffffff8338b030 D umb_uuid_qmi_mbim +ffffffff8338b040 D umb_cd +ffffffff8338b060 D umb_delay +ffffffff8338b070 D umb_qmi_alloc_cid +ffffffff8338b080 D umb_qmi_fcc_auth +ffffffff8338c000 D uath_cd +ffffffff8338d000 D uow_cd +ffffffff8338e000 D uberry_cd +ffffffff8338f000 D upd_cd +ffffffff8338f020 d upd_usage_roots +ffffffff8338f0a0 d upd_usage_batdep +ffffffff83390000 D uwacom_cd +ffffffff83390020 d uwacom_attach.reportbuf +ffffffff83391000 D bwfm_usb_bus_ops +ffffffff83392000 D umstc_cd +ffffffff83393000 D uhidpp_cd +ffffffff83394000 D ucc_cd +ffffffff83395000 D iic_cd +ffffffff83396000 D probe_addrs_sensor +ffffffff83396008 D probe_addrs_eeprom +ffffffff83397000 D lmtemp_cd +ffffffff83398000 D lmn_worklist +ffffffff83398240 D lmn_cd +ffffffff83399000 D lmenv_cd +ffffffff8339a000 D maxtmp_cd +ffffffff8339b000 D adc_cd +ffffffff8339c000 D admtemp_cd +ffffffff8339d000 D admlc_cd +ffffffff8339e000 D admtm_cd +ffffffff8339f000 D admtmp_cd +ffffffff833a0000 D admtt_cd +ffffffff833a1000 D maxds_cd +ffffffff833a2000 D adt_chips +ffffffff833a2160 D worklist +ffffffff833a21a0 D adt_cd +ffffffff833a3000 D admcts_cd +ffffffff833a4000 D wbng_cd +ffffffff833a5000 D nvt_cd +ffffffff833a6000 D adl_worklist +ffffffff833a6138 D adl_cd +ffffffff833a7000 D andl_cd +ffffffff833a8000 D sdtemp_cd +ffffffff833a9000 D lisa_cd +ffffffff833aa000 D ihidev_cd +ffffffff833ab000 D ikbd_cd +ffffffff833ac000 D ims_cd +ffffffff833ad000 D imt_cd +ffffffff833ae000 D iatp_cd +ffffffff833af000 D bgw_cd +ffffffff833b0000 D icc_cd +ffffffff833b1000 D gpio_cd +ffffffff833b2000 D acpi_cd +ffffffff833b2020 D acpi_pcidevs +ffffffff833b2030 D acpi_pcirootdevs +ffffffff833b2040 D acpi_taskq +ffffffff833b2050 d acpi_indicator.save_led_state +ffffffff833b2060 d acpi_getprop.prop_guid +ffffffff833b2070 d acpi_getpropint.prop_guid +ffffffff833b2080 D acpi_skip_hids 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