--- 7.2/2023-04-07T00:19:23Z/2023-03-06T00:00:00Z/nm-bsd-ot14.txt Fri Apr 7 22:07:49 2023 +++ 7.2/2023-04-07T00:19:23Z/2023-03-07T00:00:00Z/nm-bsd-ot14.txt Sat Apr 8 00:42:16 2023 @@ -2,14 +2,14 @@ 00011006 A mp_pdirpa 0001419d A acpi_pdirpa 01000000 A __kernel_phys_base -02515000 T __kernel_kutext_phys -02519000 C __kernel_cptext_phys -0251a000 C __kernel_rodata_phys -02dcb000 R __kernel_kutext_page_phys -02dcd000 C __kernel_randomdata_phys -0308f000 R __kernel_data_phys -033bf000 D __kernel_kudata_phys -033c0000 C __kernel_bss_phys +02517000 T __kernel_kutext_phys +0251b000 C __kernel_cptext_phys +0251c000 C __kernel_rodata_phys +02dcd000 R __kernel_kutext_page_phys +02dcf000 C __kernel_randomdata_phys +03092000 R __kernel_data_phys +033c2000 D __kernel_kudata_phys +033c3000 C __kernel_bss_phys 03800000 B __kernel_phys_end 80000000 A __kernel_virt_to_phys ffffffff80000000 A __kernel_base @@ -11323,9 +11323,9 @@ ffffffff815a2070 T cpu_configure ffffffff815a21d0 T device_register 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drm_syncobj_get_handle -ffffffff81960a80 T drm_syncobj_get_fd -ffffffff81960ad0 T drm_syncobj_open -ffffffff81960b00 T drm_syncobj_release -ffffffff81960b30 t drm_syncobj_release_handle -ffffffff81960be0 T drm_syncobj_create_ioctl -ffffffff81960d00 T drm_syncobj_destroy_ioctl -ffffffff81960e20 T drm_syncobj_handle_to_fd_ioctl -ffffffff81961000 T drm_syncobj_fd_to_handle_ioctl -ffffffff819611e0 T drm_syncobj_transfer_ioctl -ffffffff819615f0 T drm_timeout_abs_to_jiffies -ffffffff819616d0 T drm_syncobj_wait_ioctl -ffffffff81961860 t drm_syncobj_array_find -ffffffff81961a90 t drm_syncobj_array_free -ffffffff81961b70 T drm_syncobj_timeline_wait_ioctl -ffffffff81961d00 T drm_syncobj_reset_ioctl -ffffffff81961e50 T drm_syncobj_signal_ioctl -ffffffff81961fd0 T drm_syncobj_timeline_signal_ioctl -ffffffff819621f0 T drm_syncobj_query_ioctl -ffffffff819623f0 t drm_syncobj_array_wait_timeout -ffffffff81962860 t syncobj_wait_fence_func -ffffffff81963000 T drm_vblank_count -ffffffff81963090 T drm_crtc_accurate_vblank_count -ffffffff819631a0 t drm_update_vblank_count -ffffffff819635f0 T drm_vblank_disable_and_save -ffffffff81963740 T drm_vblank_init -ffffffff819638c0 t vblank_disable_fn -ffffffff81963940 t drm_vblank_init_release -ffffffff819639c0 T drm_dev_has_vblank -ffffffff819639f0 T drm_crtc_vblank_waitqueue -ffffffff81963a30 T drm_calc_timestamping_constants -ffffffff81963c60 T drm_crtc_vblank_helper_get_vblank_timestamp_internal -ffffffff81964190 T drm_crtc_vblank_helper_get_vblank_timestamp -ffffffff819641b0 T drm_crtc_vblank_count -ffffffff81964240 T drm_crtc_vblank_count_and_time -ffffffff81964300 T drm_crtc_arm_vblank_event -ffffffff819643e0 T drm_crtc_send_vblank_event -ffffffff81964590 T drm_vblank_get -ffffffff819646a0 t drm_vblank_enable -ffffffff81964860 T drm_crtc_vblank_get -ffffffff81964960 T drm_vblank_put -ffffffff81964a90 T drm_crtc_vblank_put -ffffffff81964ab0 T drm_wait_one_vblank -ffffffff81964f00 T drm_crtc_wait_one_vblank -ffffffff81964f20 T drm_crtc_vblank_off -ffffffff81965300 T drm_crtc_vblank_reset -ffffffff81965430 T drm_crtc_set_max_vblank_count -ffffffff81965510 T drm_crtc_vblank_on -ffffffff81965660 t drm_reset_vblank_timestamp -ffffffff81965860 T drm_crtc_vblank_restore -ffffffff81965c40 T drm_legacy_modeset_ctl_ioctl -ffffffff81965e50 T drm_wait_vblank_ioctl -ffffffff81966890 T drm_handle_vblank -ffffffff81966b70 t drm_handle_vblank_events -ffffffff81966e00 T drm_crtc_handle_vblank -ffffffff81966e20 T drm_crtc_get_sequence_ioctl -ffffffff81967010 T drm_crtc_queue_sequence_ioctl -ffffffff819673e0 t __get_vblank_counter -ffffffff81968000 T drm_handle_vblank_works -ffffffff819681b0 T drm_vblank_cancel_pending_works -ffffffff819682f0 T drm_vblank_work_schedule -ffffffff81968570 T drm_vblank_work_cancel_sync -ffffffff819686d0 T drm_vblank_work_flush -ffffffff819687a0 T drm_vblank_work_init -ffffffff81968810 T drm_vblank_worker_init -ffffffff81969000 T drm_vma_offset_manager_init -ffffffff81969040 T drm_vma_offset_manager_destroy -ffffffff81969050 T drm_vma_offset_lookup_locked -ffffffff819690e0 T drm_vma_offset_add -ffffffff81969170 T drm_vma_offset_remove -ffffffff819691c0 T drm_vma_node_allow -ffffffff819691d0 t vma_node_allow -ffffffff81969300 T drm_vma_node_allow_once -ffffffff81969310 T drm_vma_node_revoke -ffffffff81969390 T drm_vma_node_is_allowed -ffffffff8196a000 T hdmi_avi_infoframe_init -ffffffff8196a070 T hdmi_avi_infoframe_check -ffffffff8196a0c0 T hdmi_avi_infoframe_pack_only -ffffffff8196a2c0 T hdmi_avi_infoframe_pack -ffffffff8196a320 T hdmi_spd_infoframe_init -ffffffff8196a3d0 T hdmi_spd_infoframe_check -ffffffff8196a420 T hdmi_spd_infoframe_pack_only -ffffffff8196a550 T hdmi_spd_infoframe_pack -ffffffff8196a6a0 T hdmi_audio_infoframe_init -ffffffff8196a6f0 T hdmi_audio_infoframe_check -ffffffff8196a740 T hdmi_audio_infoframe_pack_only -ffffffff8196a890 T hdmi_audio_infoframe_pack -ffffffff8196a8e0 T hdmi_audio_infoframe_pack_for_dp -ffffffff8196a9d0 T hdmi_vendor_infoframe_init -ffffffff8196aa30 T hdmi_vendor_infoframe_check -ffffffff8196aad0 T hdmi_vendor_infoframe_pack_only -ffffffff8196aca0 T hdmi_vendor_infoframe_pack -ffffffff8196ad40 T hdmi_drm_infoframe_init -ffffffff8196ada0 T hdmi_drm_infoframe_check -ffffffff8196adf0 T hdmi_drm_infoframe_pack_only -ffffffff8196afc0 T hdmi_drm_infoframe_pack -ffffffff8196b010 T hdmi_infoframe_check -ffffffff8196b160 T hdmi_infoframe_pack_only -ffffffff8196b370 T hdmi_infoframe_pack -ffffffff8196b4e0 T hdmi_infoframe_log -ffffffff8196c480 T hdmi_drm_infoframe_unpack_only -ffffffff8196c560 T hdmi_infoframe_unpack -ffffffff8196d000 T list_sort -ffffffff8196e000 T radix_tree_lookup -ffffffff8196e0b0 T radix_tree_iter_find -ffffffff8196e190 T radix_tree_delete -ffffffff8196e320 T radix_tree_iter_delete -ffffffff8196e340 T radix_tree_insert -ffffffff8196f000 T sort -ffffffff8196f040 t qsort -ffffffff81971000 T drm_dp_dual_mode_read -ffffffff81971110 T drm_dp_dual_mode_write -ffffffff819711f0 T drm_dp_dual_mode_detect -ffffffff81971490 T drm_dp_dual_mode_max_tmds_clock -ffffffff819715b0 T drm_dp_dual_mode_get_tmds_output -ffffffff819716e0 T drm_dp_dual_mode_set_tmds_output -ffffffff81971970 T drm_dp_get_dual_mode_type_name -ffffffff819719e0 T drm_lspcon_get_mode -ffffffff81971b90 T drm_lspcon_set_mode -ffffffff81972000 T drm_dp_channel_eq_ok -ffffffff81972080 T drm_dp_clock_recovery_ok -ffffffff81972100 T drm_dp_get_adjust_request_voltage -ffffffff81972140 T drm_dp_get_adjust_request_pre_emphasis -ffffffff81972180 T drm_dp_get_adjust_tx_ffe_preset -ffffffff819721c0 T drm_dp_128b132b_lane_channel_eq_done -ffffffff81972240 T drm_dp_128b132b_lane_symbol_locked -ffffffff819722b0 T drm_dp_128b132b_eq_interlane_align_done -ffffffff819722e0 T drm_dp_128b132b_cds_interlane_align_done -ffffffff81972310 T drm_dp_128b132b_link_training_failed -ffffffff81972340 T drm_dp_read_clock_recovery_delay -ffffffff81972440 T drm_dp_read_channel_eq_delay -ffffffff81972530 T drm_dp_128b132b_read_aux_rd_interval -ffffffff819725e0 T drm_dp_link_train_clock_recovery_delay -ffffffff81972660 t __8b10b_clock_recovery_delay_us -ffffffff819726e0 T drm_dp_link_train_channel_eq_delay -ffffffff81972750 T drm_dp_phy_name -ffffffff81972790 T drm_dp_lttpr_link_train_clock_recovery_delay -ffffffff819727b0 T drm_dp_lttpr_link_train_channel_eq_delay -ffffffff81972820 T drm_dp_link_rate_to_bw_code -ffffffff81972880 T drm_dp_bw_code_to_link_rate -ffffffff819728e0 T drm_dp_dpcd_probe -ffffffff81972a20 t drm_dp_dpcd_access -ffffffff81972b50 T drm_dp_dpcd_read -ffffffff81972c80 T drm_dp_dpcd_write -ffffffff81972d90 T drm_dp_dpcd_read_link_status -ffffffff81972db0 T drm_dp_dpcd_read_phy_link_status -ffffffff81972eb0 T drm_dp_downstream_is_type -ffffffff81972ef0 T drm_dp_downstream_is_tmds -ffffffff81972f60 T drm_dp_send_real_edid_checksum -ffffffff819731c0 T drm_dp_read_dpcd_caps -ffffffff81973350 T drm_dp_read_downstream_info -ffffffff81973450 T drm_dp_downstream_max_dotclock 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drm_dp_pcon_hdmi_link_active -ffffffff81974dc0 T drm_dp_pcon_hdmi_link_mode -ffffffff81974e30 T drm_dp_pcon_hdmi_frl_link_error_count -ffffffff81974f30 T drm_dp_pcon_enc_is_dsc_1_2 -ffffffff81974f60 T drm_dp_pcon_dsc_max_slices -ffffffff81974ff0 T drm_dp_pcon_dsc_max_slice_width -ffffffff81975020 T drm_dp_pcon_dsc_bpp_incr -ffffffff81975060 T drm_dp_pcon_pps_default -ffffffff819750e0 T drm_dp_pcon_pps_override_buf -ffffffff81975190 T drm_dp_pcon_pps_override_param -ffffffff81975270 T drm_dp_pcon_convert_rgb_to_ycbcr -ffffffff81975300 T drm_edp_backlight_set_level -ffffffff819753e0 T drm_edp_backlight_enable -ffffffff819755f0 t drm_edp_backlight_set_enable -ffffffff81975730 T drm_edp_backlight_disable -ffffffff81975770 T drm_edp_backlight_init -ffffffff81975cc0 T drm_panel_dp_aux_backlight -ffffffff81975e50 t __128b132b_channel_eq_delay_us -ffffffff81975ed0 t __8b10b_channel_eq_delay_us -ffffffff81975f50 t drm_dp_aux_get_crc -ffffffff81976020 t drm_dp_i2c_xfer -ffffffff81976270 t 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gfx_v10_0_set_clockgating_state -ffffffff81dad190 t gfx_v10_0_set_powergating_state -ffffffff81dad3b0 t gfx_v10_0_get_clockgating_state -ffffffff81dad4c0 t gfx10_kiq_set_resources -ffffffff81dad7f0 t gfx10_kiq_map_queues -ffffffff81dadb80 t gfx10_kiq_unmap_queues -ffffffff81dadf80 t gfx10_kiq_query_status -ffffffff81dae280 t gfx10_kiq_invalidate_tlbs -ffffffff81dae3a0 t gfx_v10_0_ring_get_rptr_compute -ffffffff81dae3d0 t gfx_v10_0_ring_get_wptr_compute -ffffffff81dae430 t gfx_v10_0_ring_set_wptr_compute -ffffffff81dae570 t gfx_v10_0_ring_emit_ib_compute -ffffffff81dae8c0 t gfx_v10_0_ring_emit_fence_kiq -ffffffff81daecf0 t gfx_v10_0_ring_test_ring -ffffffff81daef60 t gfx_v10_0_ring_test_ib -ffffffff81daf200 t gfx_v10_0_ring_emit_rreg -ffffffff81daf490 t gfx_v10_0_ring_emit_wreg -ffffffff81daf6c0 t gfx_v10_0_ring_emit_reg_wait -ffffffff81daf710 t gfx_v10_0_ring_emit_reg_write_reg_wait -ffffffff81daf7a0 t gfx_v10_0_wait_reg_mem -ffffffff81dafad0 t gfx_v10_0_ring_get_rptr_gfx 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t gfx_v11_0_ring_set_wptr_gfx -ffffffff81dc7580 t gfx_v11_0_ring_emit_ib_gfx -ffffffff81dc7c20 t gfx_v11_0_ring_emit_fence -ffffffff81dc7ff0 t gfx_v11_0_ring_emit_pipeline_sync -ffffffff81dc8050 t gfx_v11_0_ring_emit_vm_flush -ffffffff81dc8220 t gfx_v11_0_ring_emit_hdp_flush -ffffffff81dc82f0 t gfx_v11_0_ring_emit_gds_switch -ffffffff81dc83d0 t gfx_v11_0_ring_emit_init_cond_exec -ffffffff81dc8600 t gfx_v11_0_ring_emit_patch_cond_exec -ffffffff81dc86c0 t gfx_v11_0_ring_emit_cntxcntl -ffffffff81dc8820 t gfx_v11_0_ring_emit_frame_cntl -ffffffff81dc8930 t gfx_v11_0_ring_soft_recovery -ffffffff81dc89a0 t gfx_v11_0_ring_preempt_ib -ffffffff81dc8b10 t gfx_v11_0_emit_mem_sync -ffffffff81dc8e50 t gfx_v11_0_write_data_to_reg -ffffffff81dc9060 t gfx_v11_0_set_eop_interrupt_state -ffffffff81dc90f0 t gfx_v11_0_eop_irq -ffffffff81dc92c0 t gfx_v11_0_set_gfx_eop_interrupt_state -ffffffff81dc9450 t gfx_v11_0_set_compute_eop_interrupt_state -ffffffff81dc95e0 t gfx_v11_0_set_priv_reg_fault_state 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+ffffffff81892440 T vic_stop +ffffffff81892570 T vic_rxrinfo +ffffffff81892640 T vic_free_dmamem +ffffffff81893000 T vmxnet3_match +ffffffff81893020 T vmxnet3_attach +ffffffff818938f0 T vmxnet3_intr +ffffffff81893990 T vmxnet3_intr_event +ffffffff81893a00 T vmxnet3_intr_intx +ffffffff81893a60 T vmxnet3_intr_queue +ffffffff81893af0 T vmxnet3_dma_init +ffffffff81893ea0 T vmxnet3_ioctl +ffffffff81894130 T vmxnet3_start +ffffffff81894450 T vmxnet3_watchdog +ffffffff818944a0 T vmxnet3_media_change +ffffffff818944d0 T vmxnet3_media_status +ffffffff818945d0 T vmxnet3_link_state +ffffffff81894690 T vmxnet3_dma_allocmem +ffffffff818947e0 T vmxnet3_alloc_txring +ffffffff81894950 T vmxnet3_alloc_rxring +ffffffff81894c00 T vmxnet3_rxfill_tick +ffffffff81894c70 T vmxnet3_txinit +ffffffff81894cd0 T vmxnet3_rxfill +ffffffff81894f20 T vmxnet3_rxinit +ffffffff81894ff0 T vmxnet3_txstop +ffffffff81895080 T vmxnet3_rxstop +ffffffff81895180 T vmxnet3_enable_all_intrs +ffffffff81895240 T vmxnet3_disable_all_intrs +ffffffff81895310 T vmxnet3_evintr +ffffffff818954e0 T vmxnet3_rxintr +ffffffff81895870 T vmxnet3_txintr +ffffffff81895a10 T vmxnet3_init +ffffffff81895e20 T vmxnet3_rx_csum +ffffffff81895e80 T vmxnet3_iff +ffffffff81895fc0 T vmxnet3_stop +ffffffff81896200 T vmxnet3_reset +ffffffff81896240 t vmx_kstat_create +ffffffff81896420 t vmx_kstat_read +ffffffff81897000 T vmwpvs_match +ffffffff81897030 T vmwpvs_attach +ffffffff81897de0 T vmwpvs_scsi_cmd +ffffffff81898250 T vmwpvs_intx +ffffffff818982c0 T vmwpvs_msg_task +ffffffff81898540 T vmwpvs_intr +ffffffff81898720 T vmwpvs_get_config +ffffffff81898920 T vmwpvs_dmamem_zalloc +ffffffff81898980 T vmwpvs_dmamem_alloc +ffffffff81898b00 T vmwpvs_ccb_put +ffffffff81898b60 T vmwpvs_setup_rings +ffffffff81898c90 T vmwpvs_setup_msg_ring +ffffffff81898d80 T vmwpvs_ccb_get +ffffffff81898e00 T vmwpvs_dmamem_free +ffffffff81898e80 T vmwpvs_cmd +ffffffff81898f20 T vmwpvs_scsi_cmd_done +ffffffff81899100 T vmwpvs_scsi_cmd_poll +ffffffff8189a000 T lii_match +ffffffff8189a020 T lii_attach +ffffffff8189a420 T lii_activate +ffffffff8189a510 T lii_reset +ffffffff8189a7e0 T lii_spi_configure +ffffffff8189a8d0 T lii_eeprom_present +ffffffff8189a960 T lii_eeprom_read +ffffffff8189a990 T lii_spi_read +ffffffff8189ac40 T lii_read_macaddr +ffffffff8189adb0 T lii_intr +ffffffff8189aec0 T lii_alloc_rings +ffffffff8189b0d0 T lii_tick +ffffffff8189b120 T lii_mii_readreg +ffffffff8189b3c0 T lii_mii_writereg +ffffffff8189b650 T lii_mii_statchg +ffffffff8189b6c0 T lii_media_change +ffffffff8189b710 T lii_media_status +ffffffff8189b770 T lii_ioctl +ffffffff8189b900 T lii_start +ffffffff8189baa0 T lii_watchdog +ffffffff8189bae0 T lii_stop +ffffffff8189bb50 T lii_init +ffffffff8189c040 T lii_iff +ffffffff8189c180 T lii_tx_put +ffffffff8189c290 T lii_free_tx_space +ffffffff8189c2d0 T lii_rxintr +ffffffff8189c480 T lii_txintr +ffffffff8189d000 T ichiic_match +ffffffff8189d020 T ichiic_attach +ffffffff8189d210 T ichiic_intr +ffffffff8189d320 T ichiic_i2c_acquire_bus +ffffffff8189d370 T ichiic_i2c_release_bus +ffffffff8189d3b0 T ichiic_i2c_exec +ffffffff8189e000 T viapm_match +ffffffff8189e020 T viapm_attach +ffffffff8189e630 T viapm_intr +ffffffff8189e740 T viapm_i2c_acquire_bus +ffffffff8189e790 T viapm_i2c_release_bus +ffffffff8189e7d0 T viapm_i2c_exec +ffffffff8189eaf0 T viapm_refresh_sensor_data +ffffffff8189ee20 T viapm_refresh +ffffffff8189ee40 T val_to_uK +ffffffff8189eee0 T val_to_rpm +ffffffff8189ef20 T val_to_uV +ffffffff8189efc0 T viapm_get_timecount +ffffffff818a0000 T amdiic_match +ffffffff818a0020 T amdiic_attach +ffffffff818a01f0 T amdiic_intr +ffffffff818a02c0 T amdiic_i2c_acquire_bus +ffffffff818a0310 T amdiic_i2c_release_bus +ffffffff818a0350 T amdiic_i2c_exec +ffffffff818a05b0 T amdiic_read +ffffffff818a0720 T amdiic_wait +ffffffff818a07c0 T amdiic_write +ffffffff818a1000 T nviic_match +ffffffff818a1020 T nviic_attach +ffffffff818a1270 T nviic_i2c_acquire_bus +ffffffff818a12b0 T nviic_i2c_release_bus +ffffffff818a12f0 T nviic_i2c_exec +ffffffff818a1510 T nviic_write +ffffffff818a1560 T nviic_read +ffffffff818a2000 T sdhc_pci_match +ffffffff818a2060 T sdhc_pci_attach +ffffffff818a23a0 T sdhc_pci_activate +ffffffff818a23f0 T sdhc_takecontroller +ffffffff818a2490 T sdhc_ricohfix +ffffffff818a2600 T sdhc_pci_conf_write +ffffffff818a3000 T kate_match +ffffffff818a3160 T kate_attach +ffffffff818a3410 T kate_refresh +ffffffff818a4000 T km_match +ffffffff818a4050 T km_attach +ffffffff818a40e0 T km_refresh +ffffffff818a5000 T ksmn_match +ffffffff818a5050 T ksmn_attach +ffffffff818a5230 T ksmn_ccd_attach +ffffffff818a5380 T ksmn_refresh +ffffffff818a54d0 T ksmn_read_reg +ffffffff818a6000 T itherm_probe +ffffffff818a6020 T itherm_attach +ffffffff818a6370 T itherm_activate +ffffffff818a63f0 T itherm_enable +ffffffff818a6450 T itherm_refresh +ffffffff818a6460 T itherm_refresh_sensor_data +ffffffff818a6840 T itherm_bias_temperature_sensor +ffffffff818a7000 T pchtemp_match +ffffffff818a7020 T pchtemp_attach +ffffffff818a7180 T pchtemp_refresh +ffffffff818a8000 T rtsx_pci_match +ffffffff818a8090 T rtsx_pci_attach +ffffffff818a9000 T xspd_match +ffffffff818a9020 T xspd_attach +ffffffff818a91e0 T xspd_intr +ffffffff818aa000 T virtio_pci_match +ffffffff818aa070 T virtio_pci_attach +ffffffff818aa420 T virtio_pci_detach +ffffffff818aa4f0 T virtio_pci_kick +ffffffff818aa540 T virtio_pci_read_device_config_1 +ffffffff818aa560 T virtio_pci_read_device_config_2 +ffffffff818aa590 T virtio_pci_read_device_config_4 +ffffffff818aa5c0 T virtio_pci_read_device_config_8 +ffffffff818aa640 T virtio_pci_write_device_config_1 +ffffffff818aa670 T virtio_pci_write_device_config_2 +ffffffff818aa6a0 T virtio_pci_write_device_config_4 +ffffffff818aa6d0 T virtio_pci_write_device_config_8 +ffffffff818aa740 T virtio_pci_read_queue_size +ffffffff818aa7b0 T virtio_pci_setup_queue +ffffffff818aaa90 T virtio_pci_set_status +ffffffff818aab10 T virtio_pci_negotiate_features +ffffffff818aac50 T virtio_pci_poll_intr +ffffffff818aacb0 T virtio_pci_find_cap +ffffffff818aae60 T virtio_pci_attach_10 +ffffffff818ab290 T virtio_pci_attach_09 +ffffffff818ab3d0 T virtio_pci_adjust_config_region +ffffffff818ab470 T virtio_pci_setup_msix +ffffffff818ab7d0 T virtio_pci_legacy_intr +ffffffff818ab870 T virtio_pci_legacy_intr_mpsafe +ffffffff818ab900 T virtio_pci_free_irqs +ffffffff818abb40 T virtio_pci_negotiate_features_10 +ffffffff818abd70 T virtio_pci_msix_establish +ffffffff818abe30 T virtio_pci_set_msix_queue_vector +ffffffff818abeb0 T virtio_pci_set_msix_config_vector +ffffffff818abef0 T virtio_pci_config_intr +ffffffff818abf30 T virtio_pci_shared_queue_intr +ffffffff818abf40 T virtio_pci_queue_intr +ffffffff818ac000 T dwiic_pci_match +ffffffff818ac020 T dwiic_pci_attach +ffffffff818ac340 T dwiic_pci_activate +ffffffff818ac3b0 T dwiic_pci_bus_scan +ffffffff818ad000 T bwfm_pci_buscore_read +ffffffff818ad060 T bwfm_pci_buscore_write +ffffffff818ad0d0 T bwfm_pci_buscore_prepare +ffffffff818ad100 T bwfm_pci_buscore_reset +ffffffff818ad2f0 T bwfm_pci_buscore_activate +ffffffff818ad320 T bwfm_pci_preinit +ffffffff818ae440 T bwfm_pci_stop +ffffffff818ae4d0 T bwfm_pci_txcheck +ffffffff818ae590 T bwfm_pci_txdata +ffffffff818ae8f0 T bwfm_pci_msgbuf_query_dcmd +ffffffff818aed30 T bwfm_pci_msgbuf_set_dcmd +ffffffff818aed70 T bwfm_pci_match +ffffffff818aed90 T bwfm_pci_attach +ffffffff818aeff0 T bwfm_pci_detach +ffffffff818af030 T bwfm_pci_activate +ffffffff818af1e0 T bwfm_pci_intr +ffffffff818af440 T bwfm_pci_select_core +ffffffff818af510 T bwfm_pci_load_microcode +ffffffff818af990 T bwfm_pci_dmamem_alloc +ffffffff818afb30 T bwfm_pci_setup_ring +ffffffff818afd30 T bwfm_pci_intr_enable +ffffffff818afd80 T bwfm_pci_hostready +ffffffff818afde0 T bwfm_pci_fill_rx_rings +ffffffff818afe20 T bwfm_pci_dmamem_free +ffffffff818afe90 T bwfm_pci_cleanup +ffffffff818b0500 T bwfm_pci_send_mb_data +ffffffff818b0620 T bwfm_pci_intmask +ffffffff818b0660 T bwfm_pci_pktid_avail +ffffffff818b06d0 T bwfm_pci_pktid_new +ffffffff818b0830 T bwfm_pci_pktid_free +ffffffff818b08d0 T bwfm_pci_fill_rx_buf_ring +ffffffff818b0c20 T bwfm_pci_fill_rx_ioctl_ring +ffffffff818b0f90 T bwfm_pci_ring_write_reserve +ffffffff818b1080 T bwfm_pci_ring_write_cancel +ffffffff818b10c0 T bwfm_pci_ring_write_commit +ffffffff818b11a0 T bwfm_pci_ring_write_rptr +ffffffff818b1220 T bwfm_pci_ring_write_wptr +ffffffff818b12a0 T bwfm_pci_setup_flowring +ffffffff818b1400 T bwfm_pci_ring_bell +ffffffff818b1440 T bwfm_pci_ring_update_rptr +ffffffff818b14f0 T bwfm_pci_ring_update_wptr +ffffffff818b1590 T bwfm_pci_ring_write_reserve_multi +ffffffff818b16b0 T bwfm_pci_ring_read_avail +ffffffff818b17b0 T bwfm_pci_ring_read_commit +ffffffff818b1830 T bwfm_pci_ring_rx +ffffffff818b1a40 T bwfm_pci_msg_rx +ffffffff818b2020 T bwfm_pci_flowring_delete_cb +ffffffff818b20d0 T bwfm_pci_msgbuf_rxioctl +ffffffff818b21c0 T bwfm_pci_intr_status +ffffffff818b2200 T bwfm_pci_intr_ack +ffffffff818b2240 T bwfm_pci_flowring_lookup +ffffffff818b23b0 T bwfm_pci_flowring_create +ffffffff818b24e0 T bwfm_pci_flowring_create_cb +ffffffff818b2820 T bwfm_pci_flowring_delete +ffffffff818b2af0 T bwfm_pci_msgbuf_h2d_mb_write +ffffffff818b2d10 T bwfm_pci_handle_mb_data +ffffffff818b2de0 T bwfm_pci_intr_disable +ffffffff818b3000 T ccp_pci_match +ffffffff818b3020 T ccp_pci_attach +ffffffff818b4000 T bnxt_match +ffffffff818b4020 T bnxt_attach +ffffffff818b51f0 T bnxt_dmamem_alloc +ffffffff818b5380 T bnxt_dmamem_free +ffffffff818b5400 T bnxt_hwrm_ver_get +ffffffff818b5550 T bnxt_hwrm_nvm_get_dev_info +ffffffff818b5690 T bnxt_hwrm_func_drv_rgtr +ffffffff818b57b0 T bnxt_hwrm_func_rgtr_async_events +ffffffff818b58d0 T bnxt_hwrm_func_qcaps +ffffffff818b59b0 T bnxt_admin_intr +ffffffff818b5bb0 T bnxt_intr +ffffffff818b6080 T bnxt_hwrm_func_qcfg +ffffffff818b6130 T bnxt_hwrm_queue_qportcfg +ffffffff818b6200 T bnxt_hwrm_func_reset +ffffffff818b62b0 T bnxt_mark_cpr_invalid +ffffffff818b6300 T bnxt_hwrm_ring_alloc +ffffffff818b64b0 T bnxt_cfg_async_cr +ffffffff818b65b0 T bnxt_write_cp_doorbell +ffffffff818b65f0 T bnxt_set_cp_ring_aggint +ffffffff818b66c0 T bnxt_ioctl +ffffffff818b6850 T bnxt_start +ffffffff818b6c70 T bnxt_watchdog +ffffffff818b6ca0 T bnxt_media_change +ffffffff818b6df0 T bnxt_media_status +ffffffff818b6e00 T bnxt_refill +ffffffff818b6e60 T bnxt_media_autonegotiate +ffffffff818b6f50 T bnxt_hwrm_port_phy_qcfg +ffffffff818b73e0 T bnxt_free_slots +ffffffff818b7470 T bnxt_hwrm_cmd_hdr_init +ffffffff818b74c0 T hwrm_send_message +ffffffff818b7540 T bnxt_queue_up +ffffffff818b8470 T bnxt_hwrm_stat_ctx_alloc +ffffffff818b8570 T bnxt_write_tx_doorbell +ffffffff818b85e0 T bnxt_write_rx_doorbell +ffffffff818b8650 T bnxt_hwrm_ring_grp_alloc +ffffffff818b8750 T bnxt_rx_fill +ffffffff818b8860 T bnxt_hwrm_ring_grp_free +ffffffff818b8940 T bnxt_hwrm_ring_free +ffffffff818b8a30 T bnxt_hwrm_stat_ctx_free +ffffffff818b8b20 T bnxt_queue_down +ffffffff818b9200 T bnxt_up +ffffffff818b98d0 T bnxt_hwrm_vnic_ctx_alloc +ffffffff818b99a0 T bnxt_hwrm_vnic_alloc +ffffffff818b9a90 T bnxt_hwrm_vnic_cfg +ffffffff818b9bd0 T bnxt_hwrm_vnic_cfg_placement +ffffffff818b9ca0 T bnxt_hwrm_set_filter +ffffffff818b9e20 T bnxt_hwrm_vnic_rss_cfg +ffffffff818b9ef0 T bnxt_iff +ffffffff818ba060 T bnxt_hwrm_vnic_free +ffffffff818ba140 T bnxt_hwrm_vnic_ctx_free +ffffffff818ba220 T bnxt_down +ffffffff818ba5c0 T bnxt_hwrm_free_filter +ffffffff818ba6a0 T bnxt_hwrm_cfa_l2_set_rx_mask +ffffffff818ba770 T bnxt_rxrinfo +ffffffff818ba8c0 T bnxt_get_sffpage +ffffffff818babd0 T bnxt_load_mbuf +ffffffff818bac80 T bnxt_handle_async_event +ffffffff818bacc0 T bnxt_cpr_next_cmpl +ffffffff818bad30 T bnxt_cpr_commit +ffffffff818bad60 T bnxt_cpr_rollback +ffffffff818bad90 T bnxt_write_cp_doorbell_index +ffffffff818bae10 T bnxt_rx +ffffffff818bb0e0 T bnxt_txeof +ffffffff818bb200 T bnxt_get_media_type +ffffffff818bb750 T bnxt_add_media_type +ffffffff818bb910 T _hwrm_send_message +ffffffff818be7c0 T bnxt_rx_fill_slots +ffffffff818be970 T bnxt_hwrm_err_map +ffffffff818be9b0 T _bnxt_hwrm_set_async_event_bit +ffffffff818bf000 t mcx_match +ffffffff818bf020 t mcx_attach +ffffffff818c2100 T mcx_rx_fill +ffffffff818c2340 T mcx_load_mbuf +ffffffff818c23f0 t mcx_dmamem_alloc +ffffffff818c2550 t mcx_pages +ffffffff818c2e30 t mcx_iff +ffffffff818c3270 t mcx_alloc_uar +ffffffff818c3460 t mcx_admin_intr +ffffffff818c3610 t mcx_create_eq +ffffffff818c3ba0 t mcx_ioctl +ffffffff818c4670 t mcx_start +ffffffff818c4b70 t mcx_watchdog +ffffffff818c4ba0 t mcx_media_change +ffffffff818c4e60 t mcx_media_status +ffffffff818c4fa0 t mcx_refill +ffffffff818c5010 t mcx_cq_intr +ffffffff818c5520 t mcx_calibrate +ffffffff818c56e0 t mcx_port_change +ffffffff818c5820 t mcx_cmdq_post +ffffffff818c5900 t mcx_set_flow_table_entry_mac +ffffffff818c5dd0 t mcx_delete_flow_table_entry +ffffffff818c6250 t mcx_access_hca_reg +ffffffff818c6680 t mcx_cmdq_exec +ffffffff818c6880 t mcx_up +ffffffff818c9b80 t mcx_down +ffffffff818cabe0 t mcx_create_flow_table +ffffffff818caf90 t mcx_create_flow_group +ffffffff818cb470 t mcx_destroy_sq +ffffffff818cb720 t mcx_destroy_cq +ffffffff818cb9e0 t mcx_arm_cq +ffffffff818cbb00 t mcx_destroy_flow_table +ffffffff818cbe60 t mcx_kstat_attach_ppcnt +ffffffff818cbf90 t mcx_kstat_ppcnt_read +ffffffff818cc0b0 t mcx_kstat_mtmp_read +ffffffff818cc240 t mcx_kstat_queue_read +ffffffff818cd6d0 t mcx_timecounter_read +ffffffff818ce000 t iavf_match +ffffffff818ce020 t iavf_attach +ffffffff818ce8f0 t iavf_reset +ffffffff818cebc0 t iavf_dmamem_alloc +ffffffff818ced20 t iavf_arq_fill +ffffffff818cefd0 t iavf_arq_timeout +ffffffff818ceff0 t iavf_init_admin_queue +ffffffff818cf1a0 t iavf_get_version +ffffffff818cf3c0 t iavf_get_vf_resources +ffffffff818cf590 t iavf_config_irq_map +ffffffff818cf780 t iavf_intr +ffffffff818cfe00 t iavf_ioctl +ffffffff818d09b0 t iavf_start +ffffffff818d0d00 t iavf_watchdog +ffffffff818d0d30 t iavf_media_change +ffffffff818d0d60 t iavf_media_status +ffffffff818d0df0 t iavf_arq_unfill +ffffffff818d0ef0 t iavf_down +ffffffff818d1450 t iavf_up +ffffffff818d20c0 t iavf_queue_select +ffffffff818d22c0 t iavf_rxfill +ffffffff818d24c0 t iavf_rxrefill +ffffffff818d24e0 t iavf_process_arq +ffffffff818d3000 T rge_match +ffffffff818d3020 T rge_attach +ffffffff818d3510 T rge_activate +ffffffff818d3640 T rge_intr +ffffffff818d3930 T rge_config_imtype +ffffffff818d39a0 T rge_exit_oob +ffffffff818d41b0 T rge_hw_init +ffffffff818d45a0 T rge_get_macaddr +ffffffff818d4620 T rge_set_phy_power +ffffffff818d4880 T rge_phy_config +ffffffff818d51c0 T rge_allocmem +ffffffff818d55d0 T rge_ioctl +ffffffff818d5780 T rge_start +ffffffff818d5950 T rge_watchdog +ffffffff818d5990 T rge_wol +ffffffff818d5bb0 T rge_tick +ffffffff818d5c30 T rge_txstart +ffffffff818d5c60 T rge_ifmedia_upd +ffffffff818d6220 T rge_ifmedia_sts +ffffffff818d6300 T rge_add_media_types +ffffffff818d63b0 T rge_kstat_attach +ffffffff818d6680 T rge_wol_power +ffffffff818d6760 T rge_rxeof +ffffffff818d6b60 T rge_txeof +ffffffff818d6d60 T rge_init +ffffffff818d7f20 T rge_setup_intr +ffffffff818d8090 T rge_encap +ffffffff818d8330 T rge_stop +ffffffff818d8590 T rge_iff +ffffffff818d8700 T rge_set_macaddr +ffffffff818d87d0 T rge_rx_list_init +ffffffff818d8890 T rge_tx_list_init +ffffffff818d8950 T rge_read_csi +ffffffff818d8bc0 T rge_write_csi +ffffffff818d8e40 T rge_write_mac_ocp +ffffffff818d8e80 T rge_read_mac_ocp +ffffffff818d8ef0 T rge_reset +ffffffff818d90b0 T rge_write_phy_ocp +ffffffff818d9170 T rge_read_phy_ocp +ffffffff818d9220 T rge_read_phy +ffffffff818d92f0 T rge_write_phy +ffffffff818d93d0 T rge_get_link_status +ffffffff818d9420 T rge_newbuf +ffffffff818d95a0 T rge_discard_rxbuf +ffffffff818d9600 T rge_fill_rx_ring +ffffffff818d9680 T rge_phy_config_mac_cfg2 +ffffffff818db080 T rge_phy_config_mac_cfg3 +ffffffff818dcd30 T rge_phy_config_mac_cfg4 +ffffffff818e0da0 T rge_phy_config_mac_cfg5 +ffffffff818e1890 T rge_patch_phy_mcu +ffffffff818e1b00 T rge_write_ephy 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igc_free_receive_structures +ffffffff818e5a20 T igc_setup_msix +ffffffff818e5ab0 T igc_dma_malloc +ffffffff818e5c10 T igc_rxrefill +ffffffff818e5ce0 T igc_dma_free +ffffffff818e5d90 T igc_init_dmac +ffffffff818e6030 T igc_intr_queue +ffffffff818e6140 T igc_intr_link +ffffffff818e62c0 T igc_ioctl +ffffffff818e6590 T igc_start +ffffffff818e69b0 T igc_watchdog +ffffffff818e69e0 T igc_media_change +ffffffff818e6af0 T igc_media_status +ffffffff818e6c90 T igc_init +ffffffff818e7180 T igc_setup_transmit_structures +ffffffff818e7240 T igc_initialize_transmit_unit +ffffffff818e7460 T igc_setup_receive_structures +ffffffff818e75e0 T igc_initialize_receive_unit +ffffffff818e79b0 T igc_iff +ffffffff818e7af0 T igc_configure_queues +ffffffff818e7d00 T igc_rxfill +ffffffff818e7e30 T igc_enable_intr +ffffffff818e7ef0 T igc_tx_ctx_setup +ffffffff818e8000 T igc_txeof +ffffffff818e81c0 T igc_disable_intr +ffffffff818e8260 T igc_rxrinfo +ffffffff818e83a0 T igc_get_buf +ffffffff818e84e0 T igc_rxeof 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igc_read_phy_reg_mdic +ffffffff818f13f0 T igc_write_phy_reg_mdic +ffffffff818f14f0 T igc_phy_setup_autoneg +ffffffff818f16f0 T igc_copper_link_autoneg +ffffffff818f1840 T igc_wait_autoneg +ffffffff818f1910 T igc_setup_copper_link_generic +ffffffff818f1a20 T igc_phy_has_link_generic +ffffffff818f1b40 T igc_check_downshift_generic +ffffffff818f1b70 T igc_phy_hw_reset_generic +ffffffff818f1d00 T igc_power_up_phy_copper +ffffffff818f1d80 T igc_power_down_phy_copper +ffffffff818f1e10 T igc_write_phy_reg_gpy +ffffffff818f2000 T igc_write_xmdio_reg +ffffffff818f20f0 T igc_read_phy_reg_gpy +ffffffff818f22f0 T igc_read_xmdio_reg +ffffffff818f23e0 T __igc_access_xmdio_reg +ffffffff818f3000 T com_pci_match +ffffffff818f3020 T com_pci_attach +ffffffff818f32f0 T com_pci_detach +ffffffff818f3380 T com_pci_activate +ffffffff818f3470 T com_pci_intr_designware +ffffffff818f4000 T agpdev_print +ffffffff818f4050 T agpbus_probe +ffffffff818f40b0 T agpvga_match +ffffffff818f4110 T agp_attach_bus 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drm_atomic_helper_page_flip_target +ffffffff819036c0 T drm_atomic_helper_bridge_propagate_bus_fmt +ffffffff81903730 t set_best_encoder +ffffffff81904000 T __drm_atomic_helper_crtc_state_reset +ffffffff81904030 T __drm_atomic_helper_crtc_reset +ffffffff81904090 T drm_atomic_helper_crtc_reset +ffffffff81904120 T __drm_atomic_helper_crtc_duplicate_state +ffffffff819041f0 T drm_atomic_helper_crtc_duplicate_state +ffffffff81904290 T __drm_atomic_helper_crtc_destroy_state +ffffffff81904350 T drm_atomic_helper_crtc_destroy_state +ffffffff81904380 T __drm_atomic_helper_plane_state_reset +ffffffff81904440 T __drm_atomic_helper_plane_reset +ffffffff81904490 T drm_atomic_helper_plane_reset +ffffffff81904570 T __drm_atomic_helper_plane_destroy_state +ffffffff819045d0 T __drm_atomic_helper_plane_duplicate_state +ffffffff81904640 T drm_atomic_helper_plane_duplicate_state +ffffffff81904710 T drm_atomic_helper_plane_destroy_state +ffffffff81904780 T __drm_atomic_helper_connector_state_reset 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drm_atomic_set_crtc_for_connector +ffffffff81905830 T drm_atomic_get_property +ffffffff81905f70 T drm_atomic_connector_commit_dpms +ffffffff819060d0 T drm_atomic_set_property +ffffffff81906b80 T drm_mode_atomic_ioctl +ffffffff81908000 T drm_is_current_master +ffffffff81908050 T drm_getmagic +ffffffff81908120 T drm_authmagic +ffffffff819081e0 T drm_master_create +ffffffff81908280 T drm_setmaster_ioctl +ffffffff81908340 t drm_new_set_master +ffffffff819084d0 T drm_dropmaster_ioctl +ffffffff81908620 T drm_master_open +ffffffff819086d0 T drm_master_get +ffffffff81908700 T drm_master_release +ffffffff81908850 T drm_master_put +ffffffff819088e0 T drm_file_get_master +ffffffff81908940 T drm_master_internal_acquire +ffffffff819089a0 T drm_master_internal_release +ffffffff81909000 T drm_plane_create_alpha_property +ffffffff819090a0 T drm_plane_create_rotation_property +ffffffff819091d0 T drm_rotation_simplify +ffffffff81909250 T drm_plane_create_zpos_property +ffffffff81909300 T drm_plane_create_zpos_immutable_property +ffffffff819093b0 T drm_atomic_normalize_zpos +ffffffff819096b0 T drm_plane_create_blend_mode_property +ffffffff81909850 t drm_atomic_state_zpos_cmp +ffffffff8190a000 T drm_bridge_add +ffffffff8190a070 T devm_drm_bridge_add +ffffffff8190a110 T drm_bridge_remove +ffffffff8190a170 T drm_bridge_attach +ffffffff8190a2f0 T drm_bridge_detach +ffffffff8190a3d0 T drm_bridge_chain_mode_fixup +ffffffff8190a460 T drm_bridge_chain_mode_valid +ffffffff8190a4f0 T drm_bridge_chain_disable +ffffffff8190a580 T drm_bridge_chain_post_disable +ffffffff8190a600 T drm_bridge_chain_mode_set +ffffffff8190a690 T drm_bridge_chain_pre_enable +ffffffff8190a720 T drm_bridge_chain_enable +ffffffff8190a7a0 T drm_atomic_bridge_chain_disable +ffffffff8190a8a0 T drm_atomic_bridge_chain_post_disable +ffffffff8190a9b0 T drm_atomic_bridge_chain_pre_enable +ffffffff8190aab0 T drm_atomic_bridge_chain_enable +ffffffff8190abc0 T drm_atomic_bridge_chain_check +ffffffff8190af10 T drm_bridge_detect +ffffffff8190af60 T drm_bridge_get_modes +ffffffff8190afb0 T drm_bridge_get_edid +ffffffff8190b000 T drm_bridge_hpd_enable +ffffffff8190b0d0 T drm_bridge_hpd_disable +ffffffff8190b170 T drm_bridge_hpd_notify +ffffffff8190b1d0 t drm_bridge_atomic_duplicate_priv_state +ffffffff8190b1f0 t drm_bridge_atomic_destroy_priv_state +ffffffff8190b210 t select_bus_fmt_recursive +ffffffff8190c000 T drm_buddy_init +ffffffff8190c450 T drm_buddy_fini +ffffffff8190c550 T drm_get_buddy +ffffffff8190c590 T drm_buddy_free_block +ffffffff8190c720 T drm_buddy_free_list +ffffffff8190c7b0 T drm_buddy_block_trim +ffffffff8190ca00 t __alloc_range +ffffffff8190cdd0 T drm_buddy_alloc_blocks +ffffffff8190d670 T drm_buddy_block_print +ffffffff8190d6b0 T drm_buddy_print +ffffffff8190d810 T drm_buddy_module_exit +ffffffff8190d830 T drm_buddy_module_init +ffffffff8190d890 t split_block +ffffffff8190e000 T drm_clflush_pages +ffffffff8190e120 T drm_clflush_sg +ffffffff8190e270 T drm_clflush_virt_range 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drm_client_modeset_commit +ffffffff81912340 T drm_client_modeset_dpms +ffffffff81912590 t drm_connector_pick_cmdline_mode +ffffffff81913000 T drm_color_ctm_s31_32_to_qm_n +ffffffff819130d0 T drm_crtc_enable_color_mgmt +ffffffff819131b0 T drm_mode_crtc_set_gamma_size +ffffffff819132d0 T drm_mode_gamma_set_ioctl +ffffffff819137c0 T drm_mode_gamma_get_ioctl +ffffffff81913900 T drm_get_color_encoding_name +ffffffff81913970 T drm_get_color_range_name +ffffffff819139e0 T drm_plane_create_color_properties +ffffffff81913c30 T drm_color_lut_check +ffffffff81914000 T drm_connector_ida_init +ffffffff81914110 T drm_connector_ida_destroy +ffffffff81914220 T drm_get_connector_type_name +ffffffff81914260 T drm_connector_free_work_fn +ffffffff81914320 T drm_connector_init +ffffffff819143a0 t __drm_connector_init +ffffffff819148b0 T drm_connector_init_with_ddc +ffffffff81914930 T drmm_connector_init +ffffffff819149f0 t drm_connector_cleanup_action +ffffffff81914a00 T drm_connector_attach_edid_property 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drm_mode_getconnector +ffffffff819175b0 T drm_connector_find_by_fwnode +ffffffff81917660 T drm_connector_oob_hotplug_event +ffffffff81917740 T drm_mode_get_tile_group +ffffffff81917810 T drm_mode_create_tile_group +ffffffff819178d0 t drm_connector_free +ffffffff81917910 t kasprintf +ffffffff81918000 T drm_crtc_from_index +ffffffff81918060 T drm_crtc_force_disable +ffffffff81918170 T drm_mode_set_config_internal +ffffffff819181f0 T drm_crtc_register_all +ffffffff81918270 T drm_crtc_unregister_all +ffffffff819182e0 T drm_crtc_create_fence +ffffffff81918370 T drm_crtc_init_with_planes +ffffffff81918440 t __drm_crtc_init_with_planes +ffffffff81918830 T drmm_crtc_init_with_planes +ffffffff81918930 T __drmm_crtc_alloc_with_planes +ffffffff81918aa0 T drm_crtc_cleanup +ffffffff81918bc0 T drm_mode_getcrtc +ffffffff81918d50 t __drm_mode_set_config_internal +ffffffff81918ef0 T drm_crtc_check_viewport +ffffffff81918fa0 T drm_mode_setcrtc +ffffffff81919700 T drm_mode_crtc_set_obj_prop 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drm_edid_alloc +ffffffff81920210 T drm_edid_dup +ffffffff819202e0 T drm_edid_free +ffffffff81920340 T drm_probe_ddc +ffffffff81920430 t drm_do_probe_ddc_edid +ffffffff81920570 T drm_get_edid +ffffffff819206b0 T drm_edid_read_custom +ffffffff819207a0 T drm_edid_read_ddc +ffffffff819208d0 T drm_edid_read +ffffffff81920950 T drm_edid_get_panel_id +ffffffff81920a20 t edid_block_read +ffffffff81920c90 T drm_get_edid_switcheroo +ffffffff81920ce0 T drm_edid_duplicate +ffffffff81920d50 T drm_mode_find_dmt +ffffffff81920e70 T drm_mode_fixup_1366x768 +ffffffff81920ec0 T drm_find_edid_extension +ffffffff819210d0 T drm_match_cea_mode +ffffffff81921320 T drm_display_mode_from_cea_vic +ffffffff81921390 T drm_edid_get_monitor_name +ffffffff81921430 t get_monitor_name +ffffffff81921790 T drm_edid_to_sad +ffffffff819219a0 T drm_edid_to_speaker_allocation +ffffffff81921b40 T drm_av_sync_delay +ffffffff81921bf0 T drm_detect_hdmi_monitor +ffffffff81921d10 T drm_detect_monitor_audio +ffffffff81921f10 T drm_default_rgb_quant_range +ffffffff81921f50 T drm_edid_connector_update +ffffffff81921fb0 t _drm_edid_connector_update +ffffffff81923880 t _drm_update_tile_info +ffffffff81923b10 t _drm_edid_connector_property_update +ffffffff81923cc0 T drm_add_modes_noedid +ffffffff81923da0 T drm_set_preferred_mode +ffffffff81923e00 T drm_hdmi_avi_infoframe_from_display_mode +ffffffff81924070 T drm_hdmi_avi_infoframe_quant_range +ffffffff81924110 T drm_hdmi_vendor_infoframe_from_display_mode +ffffffff819241d0 t connector_bad_edid +ffffffff81924390 t drm_for_each_detailed_block +ffffffff819245e0 t __cea_db_iter_next +ffffffff81924880 t update_display_info +ffffffff81925700 t get_monitor_range +ffffffff819257a0 t do_detailed_mode +ffffffff819260c0 t hdmi_mode_alternate_clock +ffffffff81926170 t do_cvt_mode +ffffffff819263c0 t drm_mode_std +ffffffff819270d0 t do_standard_modes +ffffffff81927210 t drm_monitor_supports_rb +ffffffff81927500 t drm_gtf2_hbreak +ffffffff81927790 t do_established_modes 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drm_fb_helper_restore_fbdev_mode_unlocked +ffffffff8192b310 T drm_fb_helper_blank +ffffffff8192b3a0 T drm_fb_helper_prepare +ffffffff8192b470 t drm_fb_helper_resume_worker +ffffffff8192b4a0 t drm_fb_helper_damage_work +ffffffff8192b820 T drm_fb_helper_init +ffffffff8192b890 T drm_fb_helper_alloc_fbi +ffffffff8192b8f0 T drm_fb_helper_unregister_fbi +ffffffff8192b920 T drm_fb_helper_fini +ffffffff8192ba10 T drm_fb_helper_set_suspend +ffffffff8192ba40 T drm_fb_helper_set_suspend_unlocked +ffffffff8192ba70 T drm_fb_helper_set_par +ffffffff8192bb60 T drm_fb_helper_pan_display +ffffffff8192bc30 T drm_fb_helper_fill_info +ffffffff8192bcf0 T drm_fb_helper_initial_config +ffffffff8192bd20 t __drm_fb_helper_initial_config_and_unlock +ffffffff8192c270 T drm_fb_helper_hotplug_event +ffffffff8192c470 t drm_setup_crtcs_fb +ffffffff8192c5b0 T drm_fb_helper_lastclose +ffffffff8192c660 T drm_fb_helper_output_poll_changed +ffffffff8192c680 T drm_fbdev_generic_setup +ffffffff8192c830 t drm_fbdev_client_hotplug +ffffffff8192ca60 t drm_fbdev_client_unregister +ffffffff8192cad0 t drm_fbdev_client_restore +ffffffff8192cb70 t drm_fbdev_cleanup +ffffffff8192cc10 t drm_fbdev_use_shadow_fb +ffffffff8192cc60 t drm_fb_helper_generic_probe +ffffffff8192d000 T drm_dev_needs_global_mutex +ffffffff8192d060 T drm_file_alloc +ffffffff8192d2c0 T drm_file_free +ffffffff8192d4f0 T drm_lastclose +ffffffff8192d550 T drm_release +ffffffff8192d5a0 T drm_release_noglobal +ffffffff8192d5f0 T drm_read +ffffffff8192d640 T drm_event_reserve_init_locked +ffffffff8192d6b0 T drm_event_reserve_init +ffffffff8192d770 T drm_event_cancel_free +ffffffff8192d7f0 T drm_send_event_timestamp_locked +ffffffff8192d800 t drm_send_event_helper +ffffffff8192d9e0 T drm_send_event_locked +ffffffff8192d9f0 T drm_send_event +ffffffff8192da40 T mock_drm_getfile +ffffffff8192e000 T drm_flip_work_allocate_task +ffffffff8192e050 T drm_flip_work_queue_task +ffffffff8192e0a0 T drm_flip_work_queue +ffffffff8192e140 T drm_flip_work_commit +ffffffff8192e1c0 T drm_flip_work_init +ffffffff8192e230 t flip_worker +ffffffff8192e310 T drm_flip_work_cleanup +ffffffff8192f000 T drm_fb_clip_offset +ffffffff8192f040 T drm_fb_memcpy +ffffffff8192f2c0 T drm_fb_swab +ffffffff8192f3c0 t drm_fb_swab32_line +ffffffff8192f410 t drm_fb_swab16_line +ffffffff8192f460 t drm_fb_xfrm +ffffffff8192f720 T drm_fb_xrgb8888_to_rgb332 +ffffffff8192f780 t drm_fb_xrgb8888_to_rgb332_line +ffffffff8192f870 T drm_fb_xrgb8888_to_rgb565 +ffffffff8192f8e0 t drm_fb_xrgb8888_to_rgb565_swab_line +ffffffff8192f950 t drm_fb_xrgb8888_to_rgb565_line +ffffffff8192fa40 T drm_fb_xrgb8888_to_rgb888 +ffffffff8192faa0 t drm_fb_xrgb8888_to_rgb888_line +ffffffff8192fb30 T drm_fb_xrgb8888_to_xrgb2101010 +ffffffff8192fb90 t drm_fb_xrgb8888_to_xrgb2101010_line +ffffffff8192fc10 T drm_fb_xrgb8888_to_gray8 +ffffffff8192fc70 t drm_fb_xrgb8888_to_gray8_line +ffffffff8192fce0 T drm_fb_blit +ffffffff81930130 T drm_fb_xrgb8888_to_mono +ffffffff819304c0 T drm_fb_build_fourcc_list +ffffffff819307f0 t drm_fb_rgb888_to_xrgb8888_line +ffffffff819308b0 t drm_fb_rgb565_to_xrgb8888_line +ffffffff81931000 T drm_mode_legacy_fb_format +ffffffff819310e0 T drm_driver_legacy_fb_format +ffffffff819311e0 T __drm_format_info +ffffffff81931250 T drm_format_info +ffffffff81931310 T drm_get_format_info +ffffffff819313f0 T drm_format_info_block_width +ffffffff81931440 T drm_format_info_block_height +ffffffff81931490 T drm_format_info_bpp +ffffffff81931500 T drm_format_info_min_pitch +ffffffff81932000 T drm_framebuffer_check_src_coords +ffffffff81932120 T drm_mode_addfb +ffffffff81932330 T drm_mode_addfb2 +ffffffff81932420 T drm_mode_addfb_ioctl +ffffffff81932430 T drm_internal_framebuffer_create +ffffffff81932950 T drm_mode_addfb2_ioctl +ffffffff81932a40 T drm_mode_rmfb +ffffffff81932c10 T drm_framebuffer_lookup +ffffffff81932c60 t drm_mode_rmfb_work_fn +ffffffff81932d20 T drm_mode_rmfb_ioctl +ffffffff81932d30 T drm_mode_getfb +ffffffff81932e90 T drm_mode_getfb2_ioctl +ffffffff81933240 T drm_mode_dirtyfb_ioctl +ffffffff819333e0 T drm_fb_release +ffffffff819334f0 T drm_framebuffer_free +ffffffff81933530 T drm_framebuffer_init +ffffffff81933690 T drm_framebuffer_unregister_private +ffffffff819336d0 T drm_framebuffer_cleanup +ffffffff81933730 T drm_framebuffer_remove +ffffffff81933be0 T drm_framebuffer_plane_width +ffffffff81933c30 T drm_framebuffer_plane_height +ffffffff81933c80 T drm_framebuffer_print_info +ffffffff81934000 T drm_ref +ffffffff81934030 T drm_unref +ffffffff819340b0 T drm_fault +ffffffff81934260 T drm_flush +ffffffff81934290 T udv_attach_drm +ffffffff819344b0 T drm_gem_init +ffffffff81934560 t drm_gem_init_release +ffffffff81934580 T drm_gem_object_init +ffffffff819346d0 T drm_gem_private_object_init +ffffffff819347d0 T drm_gem_handle_delete +ffffffff819348b0 t drm_gem_object_release_handle +ffffffff81934930 T drm_gem_dumb_map_offset +ffffffff81934a60 T drm_gem_object_lookup +ffffffff81934ad0 T drm_gem_create_mmap_offset +ffffffff81934b00 T drm_gem_dumb_destroy +ffffffff81934b10 T drm_gem_handle_create_tail +ffffffff81934c80 t drm_gem_object_handle_put_unlocked +ffffffff81934dd0 T drm_gem_handle_create +ffffffff81934e10 T drm_gem_free_mmap_offset +ffffffff81934e30 T drm_gem_create_mmap_offset_size +ffffffff81934e60 T drm_gem_get_pages +ffffffff81934eb0 T drm_gem_put_pages +ffffffff81934ed0 T drm_gem_objects_lookup +ffffffff81935030 T drm_gem_dma_resv_wait +ffffffff81935170 T drm_gem_close_ioctl +ffffffff819351c0 T drm_gem_flink_ioctl +ffffffff81935330 T drm_gem_open_ioctl +ffffffff81935460 T drm_gem_open +ffffffff81935490 T drm_gem_release +ffffffff819354c0 T drm_gem_object_release +ffffffff81935610 T drm_gem_lru_remove +ffffffff819356f0 T drm_gem_object_free +ffffffff81935740 T drm_gem_mmap_obj +ffffffff81935850 T drm_gem_mmap +ffffffff81935ad0 T drm_gem_print_info +ffffffff81935bf0 T drm_gem_pin +ffffffff81935c30 T drm_gem_unpin +ffffffff81935c70 T drm_gem_vmap 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pcie_get_width_cap +ffffffff81941ff0 T pcie_aspm_enabled +ffffffff81942070 T autoremove_wake_function +ffffffff819420f0 T wait_on_bit +ffffffff819421b0 T wait_on_bit_timeout +ffffffff81942270 T wake_up_bit +ffffffff819422b0 T clear_and_wake_up_bit +ffffffff81942300 T bit_waitqueue +ffffffff81942330 T __var_waitqueue +ffffffff81942360 T drm_linux_init +ffffffff819424d0 T drm_linux_exit +ffffffff81942520 T pci_resize_resource +ffffffff81942660 T register_shrinker +ffffffff819426b0 T unregister_shrinker +ffffffff81942710 T drmbackoff +ffffffff819427a0 T bitmap_zalloc +ffffffff819427d0 T bitmap_free +ffffffff819427f0 T atomic_dec_and_mutex_lock +ffffffff81942860 T interval_tree_iter_first +ffffffff81942910 T interval_tree_remove +ffffffff81942930 T interval_tree_insert +ffffffff819429a0 T syncfile_read +ffffffff819429d0 T syncfile_write +ffffffff81942a00 T syncfile_ioctl +ffffffff81942a30 T syncfile_kqfilter +ffffffff81942a60 T syncfile_stat +ffffffff81942b10 T syncfile_close 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mipi_dsi_create_packet +ffffffff819452b0 T mipi_dsi_shutdown_peripheral +ffffffff81945350 T mipi_dsi_turn_on_peripheral +ffffffff819453f0 T mipi_dsi_set_maximum_return_packet_size +ffffffff81945490 T mipi_dsi_compression_mode +ffffffff81945540 T mipi_dsi_picture_parameter_set +ffffffff819455f0 T mipi_dsi_generic_write +ffffffff819456a0 T mipi_dsi_generic_read +ffffffff81945750 T mipi_dsi_dcs_write_buffer +ffffffff81945810 T mipi_dsi_dcs_write +ffffffff81945950 T mipi_dsi_dcs_read +ffffffff819459e0 T mipi_dsi_dcs_nop +ffffffff81945a90 T mipi_dsi_dcs_soft_reset +ffffffff81945b40 T mipi_dsi_dcs_get_power_mode +ffffffff81945c00 T mipi_dsi_dcs_get_pixel_format +ffffffff81945cc0 T mipi_dsi_dcs_enter_sleep_mode +ffffffff81945d70 T mipi_dsi_dcs_exit_sleep_mode +ffffffff81945e20 T mipi_dsi_dcs_set_display_off +ffffffff81945ed0 T mipi_dsi_dcs_set_display_on +ffffffff81945f80 T mipi_dsi_dcs_set_column_address +ffffffff81946040 T mipi_dsi_dcs_set_page_address +ffffffff81946100 T mipi_dsi_dcs_set_tear_off +ffffffff819461b0 T mipi_dsi_dcs_set_tear_on +ffffffff81946260 T mipi_dsi_dcs_set_pixel_format +ffffffff81947000 T __drm_mm_interval_first +ffffffff819470b0 T drm_mm_reserve_node +ffffffff81947350 t add_hole +ffffffff819474b0 T drm_mm_insert_node_in_range +ffffffff81947aa0 T drm_mm_remove_node +ffffffff81947bd0 T drm_mm_replace_node +ffffffff81947da0 T drm_mm_scan_init_with_range +ffffffff81947e20 T drm_mm_scan_add_block +ffffffff81947f90 T drm_mm_scan_remove_block +ffffffff81948000 T drm_mm_scan_color_evict +ffffffff819480e0 T drm_mm_init +ffffffff81948180 T drm_mm_takedown +ffffffff819481c0 T drm_mm_print +ffffffff81949000 T drm_modeset_register_all +ffffffff819490a0 T drm_modeset_unregister_all +ffffffff819490d0 T drm_mode_getresources +ffffffff81949380 T drm_mode_config_reset +ffffffff819494d0 T drmm_mode_config_init +ffffffff81949b00 t drm_mode_config_init_release +ffffffff81949b10 T drm_mode_config_cleanup +ffffffff81949e50 T drm_mode_config_validate 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drm_mode_destroy +ffffffff8194d230 T drm_mode_probed_add +ffffffff8194d2d0 T drm_cvt_mode +ffffffff8194d780 T drm_mode_set_name +ffffffff8194d7d0 T drm_gtf_mode_complex +ffffffff8194dac0 T drm_gtf_mode +ffffffff8194db10 T drm_mode_get_hv_timing +ffffffff8194db60 T drm_mode_init +ffffffff8194dc30 T drm_mode_set_crtcinfo +ffffffff8194dde0 T drm_mode_copy +ffffffff8194de40 T drm_mode_duplicate +ffffffff8194dec0 T drm_mode_match +ffffffff8194e060 T drm_mode_equal +ffffffff8194e080 T drm_mode_equal_no_clocks +ffffffff8194e0a0 T drm_mode_equal_no_clocks_no_stereo +ffffffff8194e160 T drm_mode_validate_driver +ffffffff8194e240 T drm_mode_validate_size +ffffffff8194e290 T drm_mode_validate_ycbcr420 +ffffffff8194e300 T drm_mode_is_420_only +ffffffff8194e350 T drm_get_mode_status_name +ffffffff8194e3c0 T drm_mode_prune_invalid +ffffffff8194e650 T drm_mode_sort +ffffffff8194e670 t drm_mode_compare +ffffffff8194e800 T drm_connector_list_update +ffffffff8194e9d0 T drm_mode_parse_command_line_for_connector +ffffffff8194ea00 T drm_mode_create_from_cmdline_mode +ffffffff8194eaf0 T drm_mode_convert_to_umode +ffffffff8194ec80 T drm_mode_convert_umode +ffffffff8194ee90 T drm_mode_is_420_also +ffffffff8194eee0 T drm_mode_is_420 +ffffffff8194f000 T drm_helper_move_panel_connectors_to_head +ffffffff8194f0f0 T drm_helper_mode_fill_fb_struct +ffffffff8194f1b0 T drm_crtc_init +ffffffff8194f280 T drm_mode_config_helper_suspend +ffffffff8194f310 T drm_mode_config_helper_resume +ffffffff81950000 T drm_modeset_lock_all +ffffffff819501d0 T drm_modeset_acquire_init +ffffffff81950260 T drm_modeset_lock_all_ctx +ffffffff819503d0 T drm_modeset_backoff +ffffffff819504a0 T drm_modeset_acquire_fini +ffffffff819504d0 T drm_warn_on_modeset_not_all_locked +ffffffff81950620 T drm_modeset_unlock_all +ffffffff81950700 T drm_modeset_drop_locks +ffffffff81950790 T drm_modeset_unlock +ffffffff81950850 t modeset_lock +ffffffff81950ae0 T drm_modeset_lock_init +ffffffff81950b40 T drm_modeset_lock +ffffffff81950b90 T drm_modeset_lock_single_interruptible +ffffffff81950bb0 t __ww_mutex_lock +ffffffff81951000 T drm_mtrr_add +ffffffff81951070 T drm_mtrr_del +ffffffff81952000 T drm_panel_init +ffffffff81952040 T drm_panel_add +ffffffff81952090 T drm_panel_remove +ffffffff819520e0 T drm_panel_prepare +ffffffff81952130 T drm_panel_unprepare +ffffffff81952180 T drm_panel_enable +ffffffff81952220 T drm_panel_disable +ffffffff819522b0 T drm_panel_get_modes +ffffffff81952300 T drm_panel_of_backlight +ffffffff81953000 T drm_get_panel_orientation_quirk +ffffffff81954000 T drm_pci_set_busid +ffffffff81954090 t kasprintf +ffffffff81955000 T drm_universal_plane_init +ffffffff819550f0 t __drm_universal_plane_init +ffffffff819557e0 T __drmm_universal_plane_alloc +ffffffff81955920 t drmm_universal_plane_alloc_release +ffffffff81955960 T __drm_universal_plane_alloc +ffffffff81955aa0 T drm_plane_register_all +ffffffff81955b90 T drm_plane_unregister_all +ffffffff81955c00 T drm_plane_cleanup +ffffffff81955d50 T drm_plane_from_index +ffffffff81955db0 T drm_plane_force_disable +ffffffff81955ec0 T drm_mode_plane_set_obj_prop +ffffffff81955f40 T drm_mode_getplane_res +ffffffff81956030 T drm_mode_getplane +ffffffff81956190 T drm_plane_check_pixel_format +ffffffff81956250 T drm_any_plane_has_format +ffffffff81956380 T drm_mode_setplane +ffffffff819566e0 T drm_mode_cursor_ioctl +ffffffff81956740 t drm_mode_cursor_common +ffffffff81956dc0 T drm_mode_cursor2_ioctl +ffffffff81956dd0 T drm_mode_page_flip_ioctl +ffffffff81957340 T drm_plane_enable_fb_damage_clips +ffffffff81957360 T drm_plane_get_damage_clips_count +ffffffff819573a0 T __drm_plane_get_damage_clips +ffffffff819573e0 T drm_plane_get_damage_clips +ffffffff81957480 T drm_create_scaling_filter_prop +ffffffff819575d0 T drm_plane_create_scaling_filter_property +ffffffff81957640 t kasprintf +ffffffff81957710 t __setplane_internal +ffffffff81957900 t __setplane_check +ffffffff81958000 T drm_plane_helper_update_primary +ffffffff819584b0 t get_connectors_for_crtc +ffffffff819585c0 T drm_plane_helper_disable_primary +ffffffff81958670 T drm_plane_helper_destroy +ffffffff819586a0 T drm_plane_helper_atomic_check +ffffffff81959000 T drm_prime_remove_buf_handle +ffffffff81959090 T drm_prime_init_file_private +ffffffff819590e0 T drm_prime_destroy_file_private +ffffffff81959140 T drm_gem_dmabuf_export +ffffffff819591a0 T drm_gem_dmabuf_release +ffffffff819591e0 T drm_gem_prime_fd_to_handle +ffffffff819593e0 T drm_gem_prime_import +ffffffff81959440 t drm_prime_add_buf_handle +ffffffff81959590 T drm_prime_fd_to_handle_ioctl +ffffffff819595e0 T drm_gem_prime_handle_to_fd +ffffffff81959810 T drm_prime_handle_to_fd_ioctl +ffffffff81959870 T drm_gem_map_attach +ffffffff81959880 T drm_gem_map_detach +ffffffff81959890 T drm_gem_dmabuf_vmap +ffffffff819598a0 T drm_gem_dmabuf_vunmap +ffffffff819598b0 T drm_gem_prime_mmap +ffffffff81959900 T drm_prime_pages_to_sg +ffffffff81959950 T drm_prime_get_contiguous_size +ffffffff819599a0 T drm_gem_prime_export +ffffffff81959a30 T drm_gem_prime_import_dev +ffffffff81959a90 T drm_prime_sg_to_page_array +ffffffff81959ae0 T drm_prime_sg_to_dma_addr_array +ffffffff81959b30 T drm_prime_gem_destroy +ffffffff8195a000 T __drm_puts_coredump +ffffffff8195a0e0 T __drm_printfn_coredump +ffffffff8195a200 T __drm_puts_seq_file +ffffffff8195a230 T __drm_printfn_seq_file +ffffffff8195a260 T __drm_printfn_info +ffffffff8195a290 T __drm_printfn_debug +ffffffff8195a2c0 T __drm_printfn_err +ffffffff8195a300 T drm_puts +ffffffff8195a330 T drm_printf +ffffffff8195a3b0 T drm_print_bits +ffffffff8195a5d0 T drm_dev_printk +ffffffff8195a660 T __drm_dev_dbg +ffffffff8195a6f0 T ___drm_dbg +ffffffff8195a780 T __drm_err +ffffffff8195a810 T drm_print_regset32 +ffffffff8195b000 T drm_crtc_mode_valid +ffffffff8195b040 T drm_encoder_mode_valid +ffffffff8195b080 T drm_connector_mode_valid +ffffffff8195b0f0 T drm_kms_helper_poll_enable +ffffffff8195b1e0 T drm_helper_probe_detect +ffffffff8195b3d0 T drm_helper_probe_single_connector_modes +ffffffff8195b990 t __drm_helper_update_and_validate +ffffffff8195bd40 T drm_kms_helper_hotplug_event +ffffffff8195bd80 T drm_kms_helper_connector_hotplug_event +ffffffff8195bdc0 T drm_kms_helper_is_poll_worker +ffffffff8195bdf0 T drm_kms_helper_poll_disable +ffffffff8195be60 T drm_kms_helper_poll_init +ffffffff8195bec0 t output_poll_execute +ffffffff8195c150 T drm_kms_helper_poll_fini +ffffffff8195c1d0 T drm_connector_helper_hpd_irq_event +ffffffff8195c290 t check_connector_changed +ffffffff8195c470 T drm_helper_hpd_irq_event +ffffffff8195c5c0 T drm_crtc_helper_mode_valid_fixed +ffffffff8195c610 T drm_connector_helper_get_modes_from_ddc +ffffffff8195c690 T drm_connector_helper_get_modes_fixed +ffffffff8195c7f0 T drm_connector_helper_get_modes +ffffffff8195c850 t __delayed_work_tick +ffffffff8195d000 T drm_property_create +ffffffff8195d1f0 T drm_property_create_enum +ffffffff8195d2a0 T drm_property_add_enum +ffffffff8195d4b0 T drm_property_destroy +ffffffff8195d560 T drm_property_create_bitmask +ffffffff8195d690 T drm_property_create_range +ffffffff8195d6f0 T drm_property_create_signed_range +ffffffff8195d760 T drm_property_create_object +ffffffff8195d7f0 T drm_property_create_bool +ffffffff8195d850 T drm_mode_getproperty_ioctl +ffffffff8195da60 T drm_property_create_blob +ffffffff8195db90 t drm_property_free_blob +ffffffff8195dc00 T drm_property_blob_put +ffffffff8195dc30 T drm_property_destroy_user_blobs +ffffffff8195dcb0 T drm_property_blob_get +ffffffff8195dcf0 T drm_property_lookup_blob +ffffffff8195dd10 T drm_property_replace_global_blob +ffffffff8195de60 T drm_property_replace_blob +ffffffff8195ded0 T drm_mode_getblob_ioctl +ffffffff8195df90 T drm_mode_createblob_ioctl +ffffffff8195e090 T drm_mode_destroyblob_ioctl +ffffffff8195e190 T drm_property_change_valid_get +ffffffff8195e3e0 T drm_property_change_valid_put +ffffffff8195f000 T drm_rect_intersect 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drm_syncobj_open +ffffffff81961b00 T drm_syncobj_release +ffffffff81961b30 t drm_syncobj_release_handle +ffffffff81961be0 T drm_syncobj_create_ioctl +ffffffff81961d00 T drm_syncobj_destroy_ioctl +ffffffff81961e20 T drm_syncobj_handle_to_fd_ioctl +ffffffff81962000 T drm_syncobj_fd_to_handle_ioctl +ffffffff819621e0 T drm_syncobj_transfer_ioctl +ffffffff819625f0 T drm_timeout_abs_to_jiffies +ffffffff819626d0 T drm_syncobj_wait_ioctl +ffffffff81962860 t drm_syncobj_array_find +ffffffff81962a90 t drm_syncobj_array_free +ffffffff81962b70 T drm_syncobj_timeline_wait_ioctl +ffffffff81962d00 T drm_syncobj_reset_ioctl +ffffffff81962e50 T drm_syncobj_signal_ioctl +ffffffff81962fd0 T drm_syncobj_timeline_signal_ioctl +ffffffff819631f0 T drm_syncobj_query_ioctl +ffffffff819633f0 t drm_syncobj_array_wait_timeout +ffffffff81963860 t syncobj_wait_fence_func +ffffffff81964000 T drm_vblank_count +ffffffff81964090 T drm_crtc_accurate_vblank_count +ffffffff819641a0 t drm_update_vblank_count +ffffffff819645f0 T drm_vblank_disable_and_save +ffffffff81964740 T drm_vblank_init +ffffffff819648c0 t vblank_disable_fn +ffffffff81964940 t drm_vblank_init_release +ffffffff819649c0 T drm_dev_has_vblank +ffffffff819649f0 T drm_crtc_vblank_waitqueue +ffffffff81964a30 T drm_calc_timestamping_constants +ffffffff81964c60 T drm_crtc_vblank_helper_get_vblank_timestamp_internal +ffffffff81965190 T drm_crtc_vblank_helper_get_vblank_timestamp +ffffffff819651b0 T drm_crtc_vblank_count +ffffffff81965240 T drm_crtc_vblank_count_and_time +ffffffff81965300 T drm_crtc_arm_vblank_event +ffffffff819653e0 T drm_crtc_send_vblank_event +ffffffff81965590 T drm_vblank_get +ffffffff819656a0 t drm_vblank_enable +ffffffff81965860 T drm_crtc_vblank_get +ffffffff81965960 T drm_vblank_put +ffffffff81965a90 T drm_crtc_vblank_put +ffffffff81965ab0 T drm_wait_one_vblank +ffffffff81965f00 T drm_crtc_wait_one_vblank +ffffffff81965f20 T drm_crtc_vblank_off +ffffffff81966300 T drm_crtc_vblank_reset +ffffffff81966430 T drm_crtc_set_max_vblank_count +ffffffff81966510 T drm_crtc_vblank_on +ffffffff81966660 t drm_reset_vblank_timestamp +ffffffff81966860 T drm_crtc_vblank_restore +ffffffff81966c40 T drm_legacy_modeset_ctl_ioctl +ffffffff81966e50 T drm_wait_vblank_ioctl +ffffffff81967890 T drm_handle_vblank +ffffffff81967b70 t drm_handle_vblank_events +ffffffff81967e00 T drm_crtc_handle_vblank +ffffffff81967e20 T drm_crtc_get_sequence_ioctl +ffffffff81968010 T drm_crtc_queue_sequence_ioctl +ffffffff819683e0 t __get_vblank_counter +ffffffff81969000 T drm_handle_vblank_works +ffffffff819691b0 T drm_vblank_cancel_pending_works +ffffffff819692f0 T drm_vblank_work_schedule +ffffffff81969570 T drm_vblank_work_cancel_sync +ffffffff819696d0 T drm_vblank_work_flush +ffffffff819697a0 T drm_vblank_work_init +ffffffff81969810 T drm_vblank_worker_init +ffffffff8196a000 T drm_vma_offset_manager_init +ffffffff8196a040 T drm_vma_offset_manager_destroy +ffffffff8196a050 T drm_vma_offset_lookup_locked +ffffffff8196a0e0 T drm_vma_offset_add +ffffffff8196a170 T drm_vma_offset_remove +ffffffff8196a1c0 T drm_vma_node_allow +ffffffff8196a1d0 t vma_node_allow +ffffffff8196a300 T drm_vma_node_allow_once +ffffffff8196a310 T drm_vma_node_revoke +ffffffff8196a390 T drm_vma_node_is_allowed +ffffffff8196b000 T hdmi_avi_infoframe_init +ffffffff8196b070 T hdmi_avi_infoframe_check +ffffffff8196b0c0 T hdmi_avi_infoframe_pack_only +ffffffff8196b2c0 T hdmi_avi_infoframe_pack +ffffffff8196b320 T hdmi_spd_infoframe_init +ffffffff8196b3d0 T hdmi_spd_infoframe_check +ffffffff8196b420 T hdmi_spd_infoframe_pack_only +ffffffff8196b550 T hdmi_spd_infoframe_pack +ffffffff8196b6a0 T hdmi_audio_infoframe_init +ffffffff8196b6f0 T hdmi_audio_infoframe_check +ffffffff8196b740 T hdmi_audio_infoframe_pack_only +ffffffff8196b890 T hdmi_audio_infoframe_pack +ffffffff8196b8e0 T hdmi_audio_infoframe_pack_for_dp +ffffffff8196b9d0 T hdmi_vendor_infoframe_init +ffffffff8196ba30 T hdmi_vendor_infoframe_check +ffffffff8196bad0 T hdmi_vendor_infoframe_pack_only +ffffffff8196bca0 T hdmi_vendor_infoframe_pack +ffffffff8196bd40 T hdmi_drm_infoframe_init +ffffffff8196bda0 T hdmi_drm_infoframe_check +ffffffff8196bdf0 T hdmi_drm_infoframe_pack_only +ffffffff8196bfc0 T hdmi_drm_infoframe_pack +ffffffff8196c010 T hdmi_infoframe_check +ffffffff8196c160 T hdmi_infoframe_pack_only +ffffffff8196c370 T hdmi_infoframe_pack +ffffffff8196c4e0 T hdmi_infoframe_log +ffffffff8196d480 T hdmi_drm_infoframe_unpack_only +ffffffff8196d560 T hdmi_infoframe_unpack +ffffffff8196e000 T list_sort +ffffffff8196f000 T radix_tree_lookup +ffffffff8196f0b0 T radix_tree_iter_find +ffffffff8196f190 T radix_tree_delete +ffffffff8196f320 T radix_tree_iter_delete +ffffffff8196f340 T radix_tree_insert +ffffffff81970000 T sort +ffffffff81970040 t qsort +ffffffff81972000 T drm_dp_dual_mode_read +ffffffff81972110 T drm_dp_dual_mode_write +ffffffff819721f0 T drm_dp_dual_mode_detect +ffffffff81972490 T drm_dp_dual_mode_max_tmds_clock +ffffffff819725b0 T drm_dp_dual_mode_get_tmds_output +ffffffff819726e0 T drm_dp_dual_mode_set_tmds_output +ffffffff81972970 T drm_dp_get_dual_mode_type_name +ffffffff819729e0 T drm_lspcon_get_mode +ffffffff81972b90 T drm_lspcon_set_mode +ffffffff81973000 T drm_dp_channel_eq_ok +ffffffff81973080 T drm_dp_clock_recovery_ok +ffffffff81973100 T drm_dp_get_adjust_request_voltage +ffffffff81973140 T drm_dp_get_adjust_request_pre_emphasis +ffffffff81973180 T drm_dp_get_adjust_tx_ffe_preset +ffffffff819731c0 T drm_dp_128b132b_lane_channel_eq_done +ffffffff81973240 T drm_dp_128b132b_lane_symbol_locked +ffffffff819732b0 T drm_dp_128b132b_eq_interlane_align_done +ffffffff819732e0 T drm_dp_128b132b_cds_interlane_align_done +ffffffff81973310 T drm_dp_128b132b_link_training_failed +ffffffff81973340 T drm_dp_read_clock_recovery_delay +ffffffff81973440 T drm_dp_read_channel_eq_delay +ffffffff81973530 T drm_dp_128b132b_read_aux_rd_interval +ffffffff819735e0 T drm_dp_link_train_clock_recovery_delay +ffffffff81973660 t __8b10b_clock_recovery_delay_us +ffffffff819736e0 T drm_dp_link_train_channel_eq_delay +ffffffff81973750 T drm_dp_phy_name +ffffffff81973790 T drm_dp_lttpr_link_train_clock_recovery_delay +ffffffff819737b0 T drm_dp_lttpr_link_train_channel_eq_delay +ffffffff81973820 T drm_dp_link_rate_to_bw_code +ffffffff81973880 T drm_dp_bw_code_to_link_rate +ffffffff819738e0 T drm_dp_dpcd_probe +ffffffff81973a20 t drm_dp_dpcd_access +ffffffff81973b50 T drm_dp_dpcd_read +ffffffff81973c80 T drm_dp_dpcd_write +ffffffff81973d90 T drm_dp_dpcd_read_link_status +ffffffff81973db0 T drm_dp_dpcd_read_phy_link_status +ffffffff81973eb0 T drm_dp_downstream_is_type +ffffffff81973ef0 T drm_dp_downstream_is_tmds +ffffffff81973f60 T drm_dp_send_real_edid_checksum +ffffffff819741c0 T drm_dp_read_dpcd_caps +ffffffff81974350 T drm_dp_read_downstream_info +ffffffff81974450 T drm_dp_downstream_max_dotclock +ffffffff819744a0 T drm_dp_downstream_max_tmds_clock +ffffffff81974540 T drm_dp_downstream_min_tmds_clock +ffffffff819745c0 T drm_dp_downstream_max_bpc +ffffffff81974660 T drm_dp_downstream_420_passthrough +ffffffff819746c0 T drm_dp_downstream_444_to_420_conversion +ffffffff81974720 T drm_dp_downstream_rgb_to_ycbcr_conversion +ffffffff81974780 T drm_dp_downstream_mode +ffffffff81974800 T drm_dp_downstream_id +ffffffff81974820 T drm_dp_downstream_debug +ffffffff819748c0 T drm_dp_subconnector_type +ffffffff81974920 T drm_dp_set_subconnector_property +ffffffff81974990 T drm_dp_read_sink_count_cap +ffffffff819749e0 T drm_dp_read_sink_count +ffffffff81974a40 T drm_dp_remote_aux_init +ffffffff81974a70 t drm_dp_aux_crc_work +ffffffff81974be0 T drm_dp_aux_init +ffffffff81974c90 T drm_dp_aux_register +ffffffff81974db0 T drm_dp_aux_unregister +ffffffff81974de0 T drm_dp_psr_setup_time +ffffffff81974e20 T drm_dp_start_crc +ffffffff81974ec0 T drm_dp_stop_crc +ffffffff81974f50 T drm_dp_read_desc +ffffffff81975110 T drm_dp_dsc_sink_max_slice_count +ffffffff819751a0 T drm_dp_dsc_sink_line_buf_depth +ffffffff819751e0 T drm_dp_dsc_sink_supported_input_bpcs +ffffffff81975240 T drm_dp_read_lttpr_common_caps +ffffffff81975300 T drm_dp_read_lttpr_phy_caps +ffffffff819753c0 T drm_dp_lttpr_count +ffffffff81975440 T drm_dp_lttpr_max_link_rate +ffffffff81975490 T drm_dp_lttpr_max_lane_count +ffffffff819754c0 T drm_dp_lttpr_voltage_swing_level_3_supported +ffffffff819754f0 T drm_dp_lttpr_pre_emphasis_level_3_supported +ffffffff81975520 T drm_dp_get_phy_test_pattern +ffffffff81975640 T drm_dp_set_phy_test_pattern +ffffffff81975710 T drm_dp_vsc_sdp_log +ffffffff81975a40 T drm_dp_get_pcon_max_frl_bw +ffffffff81975a80 T drm_dp_pcon_frl_prepare +ffffffff81975ad0 T drm_dp_pcon_is_frl_ready +ffffffff81975b20 T drm_dp_pcon_frl_configure_1 +ffffffff81975c10 T drm_dp_pcon_frl_configure_2 +ffffffff81975c70 T drm_dp_pcon_reset_frl_config +ffffffff81975cc0 T drm_dp_pcon_frl_enable +ffffffff81975d70 T drm_dp_pcon_hdmi_link_active +ffffffff81975dc0 T drm_dp_pcon_hdmi_link_mode +ffffffff81975e30 T drm_dp_pcon_hdmi_frl_link_error_count +ffffffff81975f30 T drm_dp_pcon_enc_is_dsc_1_2 +ffffffff81975f60 T drm_dp_pcon_dsc_max_slices +ffffffff81975ff0 T drm_dp_pcon_dsc_max_slice_width +ffffffff81976020 T drm_dp_pcon_dsc_bpp_incr +ffffffff81976060 T drm_dp_pcon_pps_default +ffffffff819760e0 T drm_dp_pcon_pps_override_buf +ffffffff81976190 T drm_dp_pcon_pps_override_param +ffffffff81976270 T drm_dp_pcon_convert_rgb_to_ycbcr +ffffffff81976300 T drm_edp_backlight_set_level +ffffffff819763e0 T drm_edp_backlight_enable +ffffffff819765f0 t drm_edp_backlight_set_enable +ffffffff81976730 T drm_edp_backlight_disable +ffffffff81976770 T drm_edp_backlight_init +ffffffff81976cc0 T drm_panel_dp_aux_backlight +ffffffff81976e50 t __128b132b_channel_eq_delay_us +ffffffff81976ed0 t __8b10b_channel_eq_delay_us +ffffffff81976f50 t drm_dp_aux_get_crc +ffffffff81977020 t drm_dp_i2c_xfer +ffffffff81977270 t drm_dp_i2c_functionality +ffffffff819772a0 t drm_dp_i2c_do_msg +ffffffff81977680 t lock_bus +ffffffff819776a0 t trylock_bus +ffffffff819776f0 t unlock_bus +ffffffff81977710 t dp_aux_backlight_update_status +ffffffff81978000 T drm_dp_encode_sideband_req +ffffffff81978410 T drm_dp_decode_sideband_req +ffffffff81978950 T drm_dp_dump_sideband_msg_req_body +ffffffff81978d00 T drm_dp_mst_get_port_malloc +ffffffff81978d40 T drm_dp_mst_put_port_malloc +ffffffff81978e30 t kref_put +ffffffff81978e70 T drm_atomic_get_mst_payload_state +ffffffff81978ec0 T drm_dp_mst_dpcd_read +ffffffff81979180 T drm_dp_mst_dpcd_write +ffffffff819791d0 t drm_dp_send_dpcd_write +ffffffff81979410 T drm_dp_mst_connector_late_register +ffffffff81979490 T drm_dp_mst_connector_early_unregister +ffffffff819794d0 T drm_dp_send_power_updown_phy +ffffffff81979710 t drm_dp_mst_topology_put_port +ffffffff81979840 t drm_dp_mst_wait_tx_reply +ffffffff81979b90 T drm_dp_send_query_stream_enc_status +ffffffff81979e50 T drm_dp_add_payload_part1 +ffffffff81979fd0 T drm_dp_remove_payload +ffffffff8197a160 T drm_dp_add_payload_part2 +ffffffff8197a310 T drm_dp_get_vc_payload_bw +ffffffff8197a3a0 T drm_dp_read_mst_cap +ffffffff8197a400 T drm_dp_mst_topology_mgr_set_mst +ffffffff8197a690 t drm_dp_dpcd_write_payload +ffffffff8197a820 t drm_dp_mst_topology_put_mstb +ffffffff8197a920 T drm_dp_mst_topology_mgr_suspend +ffffffff8197a9e0 t drm_dp_mst_topology_mgr_invalidate_mstb +ffffffff8197aa50 T drm_dp_mst_topology_mgr_resume +ffffffff8197ac90 T drm_dp_mst_hpd_irq +ffffffff8197bb10 T drm_dp_mst_detect_port +ffffffff8197bc80 T drm_dp_mst_get_edid +ffffffff8197bd80 T drm_dp_atomic_find_time_slots +ffffffff8197c050 T drm_atomic_get_mst_topology_state +ffffffff8197c060 T drm_dp_atomic_release_time_slots +ffffffff8197c280 T drm_dp_mst_atomic_setup_commit +ffffffff8197c410 T drm_dp_mst_atomic_wait_for_dependencies +ffffffff8197c590 T drm_dp_mst_root_conn_atomic_check +ffffffff8197c6a0 T drm_dp_mst_update_slots +ffffffff8197c6f0 T drm_dp_check_act_status +ffffffff8197c8a0 T drm_dp_calc_pbn_mode +ffffffff8197c910 T drm_dp_mst_dump_topology +ffffffff8197cb60 t drm_dp_mst_dump_mstb +ffffffff8197cbd0 T drm_dp_mst_add_affected_dsc_crtcs +ffffffff8197cd00 T drm_dp_mst_dsc_aux_for_port +ffffffff8197cf20 T drm_dp_mst_atomic_enable_dsc +ffffffff8197d0c0 T drm_dp_mst_atomic_check +ffffffff8197d3a0 t drm_dp_mst_atomic_check_mstb_bw_limit +ffffffff8197d670 t drm_dp_mst_duplicate_state +ffffffff8197d840 t drm_dp_mst_destroy_state +ffffffff8197d900 T drm_atomic_get_new_mst_topology_state +ffffffff8197d910 T drm_dp_mst_topology_mgr_init +ffffffff8197db70 t drm_dp_mst_link_probe_work +ffffffff8197de10 t drm_dp_tx_work +ffffffff8197de50 t drm_dp_delayed_destroy_work +ffffffff8197e270 t drm_dp_mst_up_req_work +ffffffff8197e770 T drm_dp_mst_topology_mgr_destroy +ffffffff8197e7f0 t drm_dp_mst_is_virtual_dpcd +ffffffff8197e8d0 t drm_dp_free_mst_branch_device +ffffffff8197e910 t drm_dp_mst_topology_get_port_validated_locked +ffffffff8197e990 t drm_dp_mst_dump_sideband_msg_tx +ffffffff8197eba0 t process_single_down_tx_qlock +ffffffff8197ed10 t process_single_tx_qlock +ffffffff8197f1f0 t drm_dp_msg_data_crc4 +ffffffff8197f310 t drm_dp_payload_send_msg +ffffffff8197f760 t drm_dp_mst_topology_get_mstb_validated_locked +ffffffff8197f7e0 t drm_dp_get_one_sb_msg +ffffffff8197ff00 t drm_dp_get_mst_branch_device +ffffffff81980070 t drm_dp_check_and_send_link_address +ffffffff81980140 t drm_dp_send_link_address +ffffffff81980df0 t drm_dp_send_enum_path_resources +ffffffff81981050 t drm_dp_port_set_pdt +ffffffff81981330 t drm_dp_mst_port_add_connector +ffffffff81981510 t drm_dp_mst_i2c_xfer +ffffffff81981c00 t drm_dp_mst_i2c_functionality +ffffffff81981c30 t get_mst_branch_device_by_guid_helper +ffffffff81982000 T drm_dsc_dp_pps_header_init +ffffffff81982030 T drm_dsc_dp_rc_buffer_size +ffffffff81982090 T drm_dsc_pps_payload_pack +ffffffff81982320 T drm_dsc_compute_rc_parameters +ffffffff81983000 T drm_connector_attach_content_protection_property +ffffffff81983030 T drm_hdcp_check_ksvs_revoked +ffffffff81983080 T drm_hdcp_update_content_protection +ffffffff81984000 T drm_hdmi_infoframe_set_hdr_metadata +ffffffff81984120 T drm_hdmi_avi_infoframe_colorimetry +ffffffff81984170 T drm_hdmi_avi_infoframe_bars +ffffffff819841c0 T drm_hdmi_avi_infoframe_content_type +ffffffff81985000 T drm_scdc_read +ffffffff81985090 T drm_scdc_write +ffffffff81985170 T drm_scdc_get_scrambling_status +ffffffff81985220 T drm_scdc_set_scrambling +ffffffff81985370 T drm_scdc_set_high_tmds_clock_ratio +ffffffff81986000 T drm_gem_ttm_mmap +ffffffff81986070 T drm_gem_ttm_vmap +ffffffff81986080 T drm_gem_ttm_vunmap +ffffffff81987000 T ttm_agp_bind +ffffffff81987050 T ttm_agp_unbind +ffffffff81987070 T ttm_agp_is_bound +ffffffff819870c0 T ttm_agp_destroy +ffffffff819870e0 T ttm_agp_tt_create +ffffffff81988000 T ttm_bo_move_to_lru_tail +ffffffff81988040 T ttm_bo_set_bulk_move +ffffffff81988100 T ttm_bo_delayed_delete +ffffffff819883f0 t ttm_bo_cleanup_refs +ffffffff819887a0 T ttm_bo_put +ffffffff81988ce0 T ttm_bo_lock_delayed_workqueue +ffffffff81988d60 T ttm_bo_unlock_delayed_workqueue +ffffffff81988dd0 T ttm_bo_eviction_valuable +ffffffff81988e20 T ttm_mem_evict_first +ffffffff819896e0 T ttm_bo_pin +ffffffff81989780 T ttm_bo_unpin +ffffffff81989890 T ttm_bo_mem_space +ffffffff81989ae0 t ttm_bo_add_move_fence +ffffffff81989ba0 T ttm_bo_validate +ffffffff81989d20 T ttm_bo_init_reserved +ffffffff81989fc0 T ttm_bo_init_validate +ffffffff8198a130 T ttm_bo_unmap_virtual +ffffffff8198a240 T ttm_bo_wait +ffffffff8198a2c0 T ttm_bo_swapout +ffffffff8198a6d0 t ttm_bo_handle_move_mem +ffffffff8198a840 T ttm_bo_tt_destroy +ffffffff8198b000 T ttm_mem_io_reserve +ffffffff8198b060 T ttm_mem_io_free +ffffffff8198b0d0 T ttm_move_memcpy +ffffffff8198b290 T ttm_bo_move_memcpy +ffffffff8198b4b0 T ttm_bo_move_sync_cleanup +ffffffff8198b5a0 T ttm_io_prot +ffffffff8198b5e0 T ttm_bo_kmap +ffffffff8198b890 T ttm_bo_kunmap +ffffffff8198b9d0 T ttm_bo_vmap +ffffffff8198bbc0 T ttm_bo_vunmap +ffffffff8198bca0 T ttm_bo_move_accel_cleanup +ffffffff8198bf60 T ttm_bo_pipeline_gutting +ffffffff8198c200 t ttm_buffer_object_transfer +ffffffff8198c450 t ttm_transfered_destroy +ffffffff8198d000 T ttm_bo_vm_reserve +ffffffff8198d250 T ttm_bo_vm_fault_reserved +ffffffff8198d560 T ttm_bo_vm_fault +ffffffff8198d6c0 T ttm_bo_vm_reference +ffffffff8198d6f0 T ttm_bo_vm_detach +ffffffff8198d700 T ttm_bo_mmap_obj +ffffffff8198e000 T ttm_global_swapout +ffffffff8198e100 T ttm_device_swapout +ffffffff8198e210 T ttm_device_init +ffffffff8198e460 t ttm_device_delayed_workqueue +ffffffff8198e500 T ttm_device_fini +ffffffff8198e6e0 T ttm_device_clear_dma_mappings +ffffffff8198e780 t ttm_device_clear_lru_dma_mappings +ffffffff8198e830 t __delayed_work_tick +ffffffff8198f000 T ttm_eu_backoff_reservation +ffffffff8198f130 T ttm_eu_reserve_buffers +ffffffff8198f520 T ttm_eu_fence_buffer_objects +ffffffff8198f670 t __ww_mutex_lock +ffffffff81990000 T ttm_prot_from_caching +ffffffff81991000 T ttm_pool_alloc +ffffffff819917b0 T ttm_pool_free +ffffffff81991bd0 T ttm_pool_init +ffffffff81991e80 T ttm_pool_fini +ffffffff81992050 t ttm_pool_type_fini +ffffffff81992290 T ttm_pool_mgr_init +ffffffff81992570 t ttm_pool_shrinker_count +ffffffff819925c0 t ttm_pool_shrinker_scan +ffffffff819927d0 T ttm_pool_mgr_fini +ffffffff81993000 T ttm_range_man_init_nocheck +ffffffff81993180 T ttm_range_man_fini_nocheck +ffffffff81993310 t ttm_range_man_alloc +ffffffff81993450 t ttm_range_man_free +ffffffff819934b0 t ttm_range_man_intersects +ffffffff81993510 t ttm_range_man_compatible +ffffffff81993570 t ttm_range_man_debug +ffffffff81994000 T ttm_lru_bulk_move_init +ffffffff81994020 T ttm_lru_bulk_move_tail +ffffffff819941e0 T ttm_resource_add_bulk_move +ffffffff819942a0 T ttm_resource_del_bulk_move +ffffffff81994390 T ttm_resource_move_to_lru_tail +ffffffff819944e0 T ttm_resource_init +ffffffff819945e0 T ttm_resource_fini +ffffffff81994650 T ttm_resource_alloc +ffffffff81994790 T ttm_resource_free +ffffffff81994900 T ttm_resource_intersects +ffffffff81994950 T ttm_resource_compatible +ffffffff819949a0 T ttm_resource_compat +ffffffff81994b30 T ttm_resource_set_bo +ffffffff81994b80 T ttm_resource_manager_init +ffffffff81994c20 T ttm_resource_manager_evict_all +ffffffff81994de0 T ttm_resource_manager_usage +ffffffff81994e40 T ttm_resource_manager_debug +ffffffff81994f20 T ttm_resource_manager_first +ffffffff81994fb0 T ttm_resource_manager_next +ffffffff819950f0 T ttm_kmap_iter_iomap_init +ffffffff81995150 T ttm_kmap_iter_linear_io_init +ffffffff81995320 T ttm_kmap_iter_linear_io_fini +ffffffff81995370 T ttm_resource_manager_create_debugfs +ffffffff819953a0 t ttm_kmap_iter_iomap_map_local +ffffffff819954d0 t ttm_kmap_iter_iomap_unmap_local +ffffffff819954f0 t ttm_kmap_iter_linear_io_map_local +ffffffff81996000 T ttm_sys_man_init +ffffffff81996130 t ttm_sys_man_alloc +ffffffff819961b0 t ttm_sys_man_free +ffffffff81997000 T ttm_tt_create +ffffffff81997100 T ttm_tt_destroy +ffffffff81997120 T ttm_tt_init +ffffffff819971f0 T ttm_tt_fini +ffffffff819972d0 T ttm_sg_tt_init +ffffffff819974f0 T ttm_tt_swapin +ffffffff81997600 T ttm_tt_swapout +ffffffff81997650 T ttm_tt_populate +ffffffff81997820 T ttm_tt_unpopulate +ffffffff819978c0 T ttm_tt_mgr_init +ffffffff81997920 T ttm_kmap_iter_tt_init +ffffffff81997980 t ttm_kmap_iter_tt_map_local +ffffffff819979d0 t ttm_kmap_iter_tt_unmap_local +ffffffff81998000 T drm_sched_entity_init +ffffffff81998180 T drm_sched_entity_modify_sched +ffffffff81998200 T drm_sched_entity_is_ready +ffffffff81998240 T drm_sched_entity_flush +ffffffff819985b0 T drm_sched_entity_fini +ffffffff819988c0 T drm_sched_entity_destroy +ffffffff81998910 T drm_sched_entity_set_priority +ffffffff81998950 T drm_sched_entity_pop_job +ffffffff81998b90 T drm_sched_entity_select_rq +ffffffff81998c70 T drm_sched_entity_push_job +ffffffff81998d70 t drm_sched_entity_kill_jobs_cb +ffffffff81998dc0 t drm_sched_entity_kill_jobs_work +ffffffff81998e30 t drm_sched_entity_clear_dep +ffffffff81998e50 t drm_sched_entity_wakeup +ffffffff81999000 T drm_sched_fence_slab_init +ffffffff81999060 T drm_sched_fence_slab_fini +ffffffff81999080 T drm_sched_fence_scheduled +ffffffff81999090 T drm_sched_fence_finished +ffffffff819990a0 T drm_sched_fence_free +ffffffff81999140 T to_drm_sched_fence +ffffffff819991a0 T drm_sched_fence_alloc +ffffffff81999220 T drm_sched_fence_init +ffffffff819992a0 t drm_sched_fence_get_driver_name +ffffffff819992d0 t drm_sched_fence_get_timeline_name +ffffffff81999320 t drm_sched_fence_release_scheduled +ffffffff81999420 t drm_sched_fence_release_finished +ffffffff8199a000 T drm_sched_rq_add_entity +ffffffff8199a090 T drm_sched_rq_remove_entity +ffffffff8199a120 T drm_sched_dependency_optimized +ffffffff8199a1b0 T drm_sched_fault +ffffffff8199a1e0 T drm_sched_suspend_timeout +ffffffff8199a260 T drm_sched_resume_timeout +ffffffff8199a300 T drm_sched_increase_karma +ffffffff8199a320 T drm_sched_increase_karma_ext +ffffffff8199a470 T drm_sched_reset_karma +ffffffff8199a480 T drm_sched_stop +ffffffff8199a650 T drm_sched_start +ffffffff8199a760 t drm_sched_job_done_cb +ffffffff8199a770 t drm_sched_job_done +ffffffff8199a840 T drm_sched_resubmit_jobs +ffffffff8199a990 T drm_sched_resubmit_jobs_ext +ffffffff8199aaf0 T drm_sched_job_init +ffffffff8199ab70 T drm_sched_job_arm +ffffffff8199ac00 T drm_sched_job_add_dependency +ffffffff8199ad60 T drm_sched_job_add_implicit_dependencies +ffffffff8199ae20 T drm_sched_job_cleanup +ffffffff8199aed0 T drm_sched_wakeup +ffffffff8199afa0 T drm_sched_pick_best +ffffffff8199b050 T drm_sched_init +ffffffff8199b2d0 t drm_sched_job_timedout +ffffffff8199b420 t drm_sched_main +ffffffff8199b840 T drm_sched_fini +ffffffff8199ba50 t __delayed_work_tick +ffffffff8199ba70 t drm_sched_get_cleanup_job +ffffffff8199bbb0 t drm_sched_select_entity +ffffffff8199c000 t ch7017_init +ffffffff8199c140 t ch7017_dpms +ffffffff8199c380 t ch7017_mode_valid +ffffffff8199c3c0 t ch7017_mode_set +ffffffff8199c670 t ch7017_detect +ffffffff8199c6a0 t ch7017_get_hw_state +ffffffff8199c720 t ch7017_destroy +ffffffff8199c770 t ch7017_dump_regs +ffffffff8199d000 t ch7xxx_init +ffffffff8199d290 t ch7xxx_dpms +ffffffff8199d360 t ch7xxx_mode_valid +ffffffff8199d3a0 t ch7xxx_mode_set +ffffffff8199d840 t ch7xxx_detect +ffffffff8199da90 t ch7xxx_get_hw_state +ffffffff8199db60 t ch7xxx_destroy +ffffffff8199dbb0 t ch7xxx_dump_regs +ffffffff8199e000 t ivch_init +ffffffff8199e380 t ivch_dpms +ffffffff8199e7a0 t ivch_mode_valid +ffffffff8199e7e0 t ivch_mode_set +ffffffff8199ebd0 t ivch_detect +ffffffff8199ec00 t ivch_get_hw_state +ffffffff8199ee20 t ivch_destroy +ffffffff8199ee70 t ivch_dump_regs +ffffffff819a0000 t ns2501_init +ffffffff819a0200 t ns2501_dpms +ffffffff819a0910 t ns2501_mode_valid +ffffffff819a09e0 t ns2501_mode_set +ffffffff819a1be0 t ns2501_detect +ffffffff819a1c10 t ns2501_get_hw_state +ffffffff819a1cf0 t ns2501_destroy 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vlv_disable_dp +ffffffff819a5dd0 t chv_post_disable_dp +ffffffff819a5e30 t chv_dp_post_pll_disable +ffffffff819a5e50 t vlv_dp_pre_pll_enable +ffffffff819a5e80 t vlv_pre_enable_dp +ffffffff819a5ec0 t vlv_post_disable_dp +ffffffff819a5ee0 t g4x_pre_enable_dp +ffffffff819a6180 t g4x_enable_dp +ffffffff819a61b0 t g4x_disable_dp +ffffffff819a6230 t g4x_post_disable_dp +ffffffff819a6430 t cpt_set_link_train +ffffffff819a64f0 t g4x_set_link_train +ffffffff819a65b0 t chv_set_signal_levels +ffffffff819a66c0 t vlv_set_signal_levels +ffffffff819a67c0 t ivb_cpu_edp_set_signal_levels +ffffffff819a68c0 t snb_cpu_edp_set_signal_levels +ffffffff819a69c0 t g4x_set_signal_levels +ffffffff819a6ac0 t intel_dp_preemph_max_3 +ffffffff819a6af0 t intel_dp_voltage_max_3 +ffffffff819a6b20 t intel_dp_preemph_max_2 +ffffffff819a6b50 t intel_dp_voltage_max_2 +ffffffff819a6b80 t gm45_digital_port_connected +ffffffff819a6c10 t g4x_digital_port_connected +ffffffff819a6ca0 t ilk_digital_port_connected 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intel_dotclock_calculate +ffffffff819edd00 T intel_crtc_dotclock +ffffffff819eddd0 T intel_encoder_current_mode +ffffffff819edf80 T intel_fuzzy_clock_check +ffffffff819edfd0 T intel_pipe_config_compare +ffffffff819f0ac0 t pipe_config_mismatch +ffffffff819f0bb0 t pipe_config_infoframe_mismatch +ffffffff819f0d60 T intel_modeset_all_pipes +ffffffff819f0ef0 T intel_atomic_add_affected_planes +ffffffff819f0fc0 T intel_crtc_update_active_timings +ffffffff819f10c0 T intel_calc_active_pipes +ffffffff819f1140 T intel_crtc_arm_fifo_underrun +ffffffff819f11e0 T intel_plane_destroy +ffffffff819f1210 T intel_get_pipe_from_crtc_id_ioctl +ffffffff819f1280 T intel_mode_valid_max_plane_size +ffffffff819f1300 T intel_init_display_hooks +ffffffff819f13e0 T intel_modeset_init_noirq +ffffffff819f1690 t intel_atomic_helper_free_state_worker +ffffffff819f1700 T intel_modeset_init_nogem +ffffffff819f2830 T intel_modeset_init +ffffffff819f2a50 T i830_enable_pipe +ffffffff819f3080 T i830_disable_pipe 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vlv_set_power_well +ffffffff81a08fc0 t hsw_wait_for_power_well_enable +ffffffff81a09100 t hsw_wait_for_power_well_disable +ffffffff81a09390 t tgl_tc_cold_request +ffffffff81a0a000 T intel_dkl_phy_read +ffffffff81a0a100 T intel_dkl_phy_write +ffffffff81a0a1f0 T intel_dkl_phy_rmw +ffffffff81a0a310 T intel_dkl_phy_posting_read +ffffffff81a0b000 T intel_dmc_has_payload +ffffffff81a0b030 T intel_dmc_load_program +ffffffff81a0b810 t pipedmc_clock_gating_wa +ffffffff81a0ba00 T intel_dmc_disable_program +ffffffff81a0bc20 T assert_dmc_loaded +ffffffff81a0bd70 T intel_dmc_ucode_init +ffffffff81a0c040 t dmc_load_work_fn +ffffffff81a0c8a0 T intel_dmc_ucode_suspend +ffffffff81a0c910 T intel_dmc_ucode_resume +ffffffff81a0c9a0 T intel_dmc_ucode_fini +ffffffff81a0cad0 T intel_dmc_print_error_state +ffffffff81a0cb70 T intel_dmc_debugfs_register +ffffffff81a0d000 T intel_dp_is_edp +ffffffff81a0d030 T intel_dp_is_uhbr +ffffffff81a0d060 T intel_dp_max_lane_count +ffffffff81a0d0c0 T intel_dp_link_required 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+ffffffff81a11770 T intel_dp_is_port_edp +ffffffff81a117c0 T intel_dp_init_connector +ffffffff81a12910 t intel_dp_modeset_retry_work_fn +ffffffff81a12990 t intel_dp_set_common_rates +ffffffff81a12b30 T intel_dp_mst_suspend +ffffffff81a12bd0 T intel_dp_mst_resume +ffffffff81a12c80 t intel_dp_compute_link_config +ffffffff81a139a0 t intel_dp_dsc_get_slice_count +ffffffff81a13b10 t intel_dp_set_sink_rates +ffffffff81a13d40 t intel_dp_check_device_service_irq +ffffffff81a14310 t intel_dp_force +ffffffff81a14450 t intel_dp_connector_register +ffffffff81a14530 t intel_dp_connector_unregister +ffffffff81a14580 t intel_dp_oob_hotplug_event +ffffffff81a145f0 t intel_dp_set_edid +ffffffff81a14a20 t intel_dp_get_modes +ffffffff81a14b20 t intel_dp_detect +ffffffff81a15410 t intel_dp_mode_valid +ffffffff81a15ba0 t intel_dp_connector_atomic_check +ffffffff81a15ed0 t intel_dp_get_dsc_sink_cap +ffffffff81a17000 T intel_dp_aux_fini +ffffffff81a17020 T intel_dp_aux_init +ffffffff81a171f0 t xelpdp_aux_ctl_reg +ffffffff81a172b0 t xelpdp_aux_data_reg +ffffffff81a17380 t tgl_aux_ctl_reg +ffffffff81a17400 t tgl_aux_data_reg +ffffffff81a17490 t skl_aux_ctl_reg +ffffffff81a17510 t skl_aux_data_reg +ffffffff81a175a0 t ilk_aux_ctl_reg +ffffffff81a17620 t ilk_aux_data_reg +ffffffff81a176a0 t g4x_aux_ctl_reg +ffffffff81a17720 t g4x_aux_data_reg +ffffffff81a177b0 t skl_get_aux_clock_divider +ffffffff81a177e0 t hsw_get_aux_clock_divider +ffffffff81a17880 t ilk_get_aux_clock_divider +ffffffff81a178e0 t g4x_get_aux_clock_divider +ffffffff81a17930 t skl_get_aux_send_ctl +ffffffff81a179a0 t g4x_get_aux_send_ctl +ffffffff81a179f0 t kasprintf +ffffffff81a17ac0 t intel_dp_aux_transfer +ffffffff81a17d10 t intel_dp_aux_xfer +ffffffff81a19000 T intel_dp_aux_init_backlight_funcs +ffffffff81a19270 t intel_dp_aux_hdr_setup_backlight +ffffffff81a193c0 t intel_dp_aux_hdr_get_backlight +ffffffff81a19530 t intel_dp_aux_hdr_set_backlight +ffffffff81a19620 t intel_dp_aux_hdr_disable_backlight +ffffffff81a196a0 t intel_dp_aux_hdr_enable_backlight +ffffffff81a198e0 t intel_dp_aux_vesa_setup_backlight +ffffffff81a19aa0 t intel_dp_aux_vesa_get_backlight +ffffffff81a19ad0 t intel_dp_aux_vesa_set_backlight +ffffffff81a19b70 t intel_dp_aux_vesa_disable_backlight +ffffffff81a19c20 t intel_dp_aux_vesa_enable_backlight +ffffffff81a1a000 T intel_dp_hdcp_init +ffffffff81a1a0b0 t intel_dp_hdcp_write_an_aksv +ffffffff81a1a1a0 t intel_dp_hdcp_read_bksv +ffffffff81a1a230 t intel_dp_hdcp_read_bstatus +ffffffff81a1a2c0 t intel_dp_hdcp_repeater_present +ffffffff81a1a360 t intel_dp_hdcp_read_ri_prime +ffffffff81a1a3f0 t intel_dp_hdcp_read_ksv_ready +ffffffff81a1a490 t intel_dp_hdcp_read_ksv_fifo +ffffffff81a1a580 t intel_dp_hdcp_read_v_prime_part +ffffffff81a1a620 t intel_dp_hdcp_toggle_signalling +ffffffff81a1a650 t intel_dp_mst_hdcp_stream_encryption +ffffffff81a1a850 t intel_dp_hdcp_check_link +ffffffff81a1a8d0 t intel_dp_hdcp_capable +ffffffff81a1a970 t intel_dp_hdcp2_capable +ffffffff81a1a9f0 t intel_dp_hdcp2_write_msg +ffffffff81a1aab0 t intel_dp_hdcp2_read_msg +ffffffff81a1b180 t intel_dp_hdcp2_config_stream_type +ffffffff81a1b230 t intel_dp_mst_hdcp2_stream_encryption +ffffffff81a1b4b0 t intel_dp_mst_hdcp2_check_link +ffffffff81a1b570 t get_hdcp2_dp_msg_data +ffffffff81a1b6b0 t intel_dp_hdcp2_check_link +ffffffff81a1c000 T intel_dp_init_lttpr_and_dprx_caps +ffffffff81a1c2a0 T intel_dp_get_adjust_train +ffffffff81a1c960 T intel_dp_program_link_training_pattern +ffffffff81a1ca50 T intel_dp_set_signal_levels +ffffffff81a1cdb0 T intel_dp_dump_link_status +ffffffff81a1ce80 T intel_dp_stop_link_train +ffffffff81a1d0b0 T intel_dp_start_link_train +ffffffff81a1e1f0 t intel_dp_link_train_phy +ffffffff81a20000 T intel_dp_mst_encoder_active_links +ffffffff81a20030 T intel_dp_mst_encoder_init +ffffffff81a20270 T intel_dp_mst_source_support +ffffffff81a202a0 T intel_dp_mst_encoder_cleanup +ffffffff81a202f0 T intel_dp_mst_is_master_trans +ffffffff81a20330 T intel_dp_mst_is_slave_trans +ffffffff81a20370 t intel_dp_add_mst_connector +ffffffff81a20580 t intel_dp_mst_poll_hpd_irq +ffffffff81a205a0 t intel_dp_mst_get_hw_state +ffffffff81a20600 t intel_dp_mst_connector_late_register +ffffffff81a20670 t intel_dp_mst_connector_early_unregister +ffffffff81a206a0 t intel_dp_mst_get_modes +ffffffff81a20740 t intel_dp_mst_detect +ffffffff81a20830 t intel_dp_mst_mode_valid_ctx +ffffffff81a20980 t intel_mst_atomic_best_encoder +ffffffff81a209d0 t intel_dp_mst_atomic_check +ffffffff81a20b50 t intel_dp_mst_compute_config +ffffffff81a20e60 t intel_dp_mst_compute_config_late +ffffffff81a20f50 t intel_mst_disable_dp +ffffffff81a21000 t intel_mst_post_disable_dp +ffffffff81a212c0 t intel_mst_pre_pll_enable_dp +ffffffff81a21310 t intel_mst_pre_enable_dp +ffffffff81a21530 t intel_mst_enable_dp +ffffffff81a21920 t intel_dp_mst_enc_get_hw_state +ffffffff81a21960 t intel_dp_mst_enc_get_config +ffffffff81a21980 t intel_dp_mst_initial_fastset_check +ffffffff81a219a0 t intel_dp_mst_encoder_destroy +ffffffff81a22000 T bxt_port_to_phy_channel +ffffffff81a22130 T bxt_ddi_phy_set_signal_levels +ffffffff81a22650 T bxt_ddi_phy_is_enabled +ffffffff81a227a0 T bxt_ddi_phy_uninit +ffffffff81a22890 T bxt_ddi_phy_init +ffffffff81a22ac0 t _bxt_ddi_phy_init +ffffffff81a230e0 T bxt_ddi_phy_verify_state +ffffffff81a23420 t __phy_reg_verify_state +ffffffff81a23520 T bxt_ddi_phy_calc_lane_lat_optim_mask +ffffffff81a23590 T bxt_ddi_phy_set_lane_optim_mask +ffffffff81a238b0 T bxt_ddi_phy_get_lane_lat_optim_mask +ffffffff81a23b00 T chv_set_phy_signal_level +ffffffff81a23e60 T chv_data_lane_soft_reset +ffffffff81a24040 T chv_phy_pre_pll_enable +ffffffff81a242d0 T chv_phy_pre_encoder_enable +ffffffff81a24560 T chv_phy_release_cl2_override +ffffffff81a245f0 T chv_phy_post_pll_disable +ffffffff81a246a0 T vlv_set_phy_signal_level +ffffffff81a24820 T vlv_phy_pre_pll_enable +ffffffff81a24930 T vlv_phy_pre_encoder_enable +ffffffff81a24a40 T vlv_phy_reset_lanes +ffffffff81a25000 T pnv_calc_dpll_params +ffffffff81a250b0 T i9xx_calc_dpll_params +ffffffff81a25180 T vlv_calc_dpll_params +ffffffff81a25230 T chv_calc_dpll_params +ffffffff81a25300 T bxt_find_best_dpll +ffffffff81a25320 t chv_find_best_dpll +ffffffff81a25660 T i9xx_dpll_compute_fp +ffffffff81a256a0 T vlv_compute_dpll +ffffffff81a25720 T chv_compute_dpll +ffffffff81a257a0 T intel_dpll_crtc_compute_clock +ffffffff81a25890 T intel_dpll_crtc_get_shared_dpll +ffffffff81a259e0 T intel_dpll_init_clock_hook +ffffffff81a25ad0 T i9xx_enable_pll +ffffffff81a25e80 T vlv_enable_pll +ffffffff81a263e0 T chv_enable_pll +ffffffff81a26a50 T vlv_force_pll_on +ffffffff81a26ba0 T vlv_disable_pll +ffffffff81a26c60 T chv_disable_pll +ffffffff81a26d90 T i9xx_disable_pll +ffffffff81a26e90 T vlv_force_pll_off +ffffffff81a26f80 T assert_pll_enabled +ffffffff81a27060 T assert_pll_disabled +ffffffff81a27140 t intel_pll_is_valid +ffffffff81a27210 t dg2_crtc_compute_clock +ffffffff81a27290 t hsw_crtc_compute_clock +ffffffff81a27350 t hsw_crtc_get_shared_dpll +ffffffff81a273f0 t ilk_crtc_compute_clock +ffffffff81a276e0 t ilk_crtc_get_shared_dpll +ffffffff81a27730 t g4x_find_best_dpll +ffffffff81a27a70 t chv_crtc_compute_clock +ffffffff81a27b70 t vlv_crtc_compute_clock +ffffffff81a28020 t g4x_crtc_compute_clock +ffffffff81a28170 t i9xx_compute_dpll +ffffffff81a283f0 t pnv_crtc_compute_clock +ffffffff81a287a0 t i9xx_crtc_compute_clock +ffffffff81a288c0 t i9xx_find_best_dpll +ffffffff81a28bf0 t i8xx_crtc_compute_clock +ffffffff81a29000 T intel_get_shared_dpll_by_id +ffffffff81a29040 T intel_get_shared_dpll_id +ffffffff81a290d0 T assert_shared_dpll +ffffffff81a291f0 T intel_dpll_get_hw_state +ffffffff81a29210 T icl_tc_port_to_pll_id +ffffffff81a29240 T intel_enable_shared_dpll +ffffffff81a29530 T intel_disable_shared_dpll +ffffffff81a29760 T intel_shared_dpll_swap_state +ffffffff81a29840 T icl_set_active_port_dpll +ffffffff81a29880 T intel_shared_dpll_init +ffffffff81a29a90 T intel_compute_shared_dplls +ffffffff81a29b20 T intel_reserve_shared_dplls +ffffffff81a29bb0 T intel_release_shared_dplls +ffffffff81a29bf0 T intel_update_active_dpll +ffffffff81a29c50 T intel_dpll_get_freq +ffffffff81a29ce0 T intel_dpll_update_ref_clks +ffffffff81a29d20 T intel_dpll_readout_hw_state +ffffffff81a29ea0 T intel_dpll_sanitize_state +ffffffff81a29f80 T intel_dpll_dump_hw_state +ffffffff81a2a000 T intel_shared_dpll_state_verify +ffffffff81a2a120 t verify_single_dpll_state +ffffffff81a2a440 T intel_shared_dpll_verify_disabled +ffffffff81a2a4b0 t icl_compute_dplls +ffffffff81a2b290 t icl_get_dplls +ffffffff81a2ba00 t icl_put_dplls +ffffffff81a2bac0 t icl_update_active_dpll +ffffffff81a2bb60 t icl_update_dpll_ref_clks +ffffffff81a2bb90 t icl_dump_hw_state +ffffffff81a2bc50 t combo_pll_enable +ffffffff81a2be70 t combo_pll_disable +ffffffff81a2bf60 t combo_pll_get_hw_state +ffffffff81a2bff0 t icl_ddi_combo_pll_get_freq +ffffffff81a2c1c0 t icl_dpll_write +ffffffff81a2c460 t adlp_cmtg_clock_gating_wa +ffffffff81a2c5c0 t icl_pll_disable +ffffffff81a2c760 t icl_pll_get_hw_state +ffffffff81a2caa0 t tbt_pll_enable +ffffffff81a2cc50 t tbt_pll_disable +ffffffff81a2cc70 t tbt_pll_get_hw_state +ffffffff81a2cc90 t icl_ddi_tbt_pll_get_freq +ffffffff81a2cd00 t mg_pll_enable +ffffffff81a2d2b0 t mg_pll_disable +ffffffff81a2d2f0 t dkl_pll_get_hw_state +ffffffff81a2d4c0 t icl_ddi_mg_pll_get_freq +ffffffff81a2d590 t intel_find_shared_dpll +ffffffff81a2d8c0 t intel_unreference_shared_dpll +ffffffff81a2da20 t mg_pll_get_hw_state +ffffffff81a2dc60 t bxt_compute_dpll +ffffffff81a2df80 t bxt_get_dpll +ffffffff81a2e1e0 t intel_put_dpll +ffffffff81a2e240 t bxt_update_dpll_ref_clks +ffffffff81a2e280 t bxt_dump_hw_state +ffffffff81a2e330 t bxt_ddi_pll_enable +ffffffff81a2ee30 t bxt_ddi_pll_disable +ffffffff81a2f040 t bxt_ddi_pll_get_hw_state +ffffffff81a2f4d0 t bxt_ddi_pll_get_freq +ffffffff81a2f560 t bxt_ddi_set_dpll_hw_state +ffffffff81a2f720 t skl_compute_dpll +ffffffff81a2fea0 t skl_get_dpll +ffffffff81a300d0 t skl_update_dpll_ref_clks +ffffffff81a30100 t skl_dump_hw_state +ffffffff81a30160 t skl_ddi_dpll0_enable +ffffffff81a30220 t skl_ddi_dpll0_disable +ffffffff81a30250 t skl_ddi_dpll0_get_hw_state +ffffffff81a30350 t skl_ddi_pll_get_freq +ffffffff81a303e0 t skl_ddi_wrpll_get_freq +ffffffff81a30540 t skl_ddi_pll_enable +ffffffff81a30750 t skl_ddi_pll_disable +ffffffff81a307e0 t skl_ddi_pll_get_hw_state +ffffffff81a30900 t hsw_compute_dpll +ffffffff81a31150 t hsw_get_dpll +ffffffff81a31410 t hsw_update_dpll_ref_clks +ffffffff81a31480 t hsw_dump_hw_state +ffffffff81a314b0 t hsw_ddi_wrpll_enable +ffffffff81a31530 t hsw_ddi_wrpll_disable +ffffffff81a31610 t hsw_ddi_wrpll_get_hw_state +ffffffff81a316b0 t hsw_ddi_wrpll_get_freq +ffffffff81a317a0 t hsw_ddi_spll_enable +ffffffff81a31800 t hsw_ddi_spll_disable +ffffffff81a318d0 t hsw_ddi_spll_get_hw_state +ffffffff81a31950 t hsw_ddi_spll_get_freq +ffffffff81a319e0 t hsw_ddi_lcpll_enable +ffffffff81a31a10 t hsw_ddi_lcpll_disable +ffffffff81a31a40 t hsw_ddi_lcpll_get_hw_state +ffffffff81a31a70 t hsw_ddi_lcpll_get_freq +ffffffff81a31af0 t ibx_compute_dpll +ffffffff81a31b20 t ibx_get_dpll +ffffffff81a31da0 t ibx_dump_hw_state +ffffffff81a31e00 t ibx_pch_dpll_enable +ffffffff81a31fb0 t ibx_pch_dpll_disable +ffffffff81a32030 t ibx_pch_dpll_get_hw_state +ffffffff81a33000 T intel_dpt_pin +ffffffff81a331d0 T intel_dpt_unpin +ffffffff81a33240 T intel_dpt_resume +ffffffff81a33310 T intel_dpt_suspend +ffffffff81a333e0 T intel_dpt_create +ffffffff81a33710 t dpt_insert_page +ffffffff81a33780 t dpt_clear_range +ffffffff81a337b0 t dpt_insert_entries +ffffffff81a338b0 t dpt_cleanup +ffffffff81a33900 t dpt_bind_vma +ffffffff81a33990 t dpt_unbind_vma +ffffffff81a339c0 T intel_dpt_destroy +ffffffff81a33a00 t __ww_mutex_lock +ffffffff81a34000 T intel_drrs_type_str +ffffffff81a34040 T intel_drrs_is_active +ffffffff81a34070 T intel_drrs_activate +ffffffff81a34270 T intel_drrs_deactivate +ffffffff81a34350 t intel_drrs_set_state +ffffffff81a344a0 T intel_drrs_invalidate +ffffffff81a344b0 t intel_drrs_frontbuffer_update +ffffffff81a34610 T intel_drrs_flush +ffffffff81a34620 T intel_crtc_drrs_init +ffffffff81a346c0 t intel_drrs_downclock_work +ffffffff81a34710 t __delayed_work_tick +ffffffff81a35000 T intel_dsb_indexed_reg_write +ffffffff81a35130 T intel_dsb_reg_write +ffffffff81a35210 T intel_dsb_commit +ffffffff81a35650 T intel_dsb_prepare +ffffffff81a357e0 T intel_dsb_cleanup +ffffffff81a36000 T intel_dsi_bitrate +ffffffff81a36090 T intel_dsi_tlpx_ns +ffffffff81a360e0 T intel_dsi_get_modes +ffffffff81a360f0 T intel_dsi_mode_valid +ffffffff81a361b0 T intel_dsi_host_init +ffffffff81a36260 T intel_dsi_get_panel_orientation +ffffffff81a37000 T intel_dsi_dcs_init_backlight_funcs +ffffffff81a37090 t dcs_setup_backlight +ffffffff81a370e0 t dcs_get_backlight +ffffffff81a371d0 t dcs_set_backlight +ffffffff81a372b0 t dcs_disable_backlight +ffffffff81a37620 t dcs_enable_backlight +ffffffff81a38000 T intel_dsi_vbt_exec_sequence +ffffffff81a38020 T intel_dsi_msleep +ffffffff81a38090 T intel_dsi_log_params +ffffffff81a38410 T intel_dsi_vbt_init +ffffffff81a388a0 T intel_dsi_vbt_gpio_init +ffffffff81a388c0 T intel_dsi_vbt_gpio_cleanup +ffffffff81a39000 T intel_dvo_init +ffffffff81a394f0 t intel_disable_dvo +ffffffff81a395a0 t intel_enable_dvo +ffffffff81a39680 t intel_dvo_get_hw_state +ffffffff81a396e0 t intel_dvo_get_config +ffffffff81a39780 t intel_dvo_compute_config +ffffffff81a39800 t intel_dvo_pre_enable +ffffffff81a398f0 t intel_dvo_connector_get_hw_state +ffffffff81a39970 t intel_dvo_enc_destroy +ffffffff81a399b0 t intel_dvo_detect +ffffffff81a39ab0 t intel_dvo_get_modes +ffffffff81a39b10 t intel_dvo_mode_valid +ffffffff81a3a000 T intel_fb_get_format_info +ffffffff81a3a230 T intel_fb_is_ccs_modifier +ffffffff81a3a400 T intel_fb_is_rc_ccs_cc_modifier +ffffffff81a3a5d0 T intel_fb_is_mc_ccs_modifier +ffffffff81a3a7a0 T intel_fb_plane_get_modifiers +ffffffff81a3a8e0 T intel_fb_plane_supports_modifier +ffffffff81a3a940 T intel_format_info_is_yuv_semiplanar +ffffffff81a3abe0 T intel_fb_is_ccs_aux_plane +ffffffff81a3ae20 T intel_fb_rc_ccs_cc_plane +ffffffff81a3b080 T is_surface_linear +ffffffff81a3b3b0 T main_to_ccs_plane +ffffffff81a3b690 T skl_ccs_to_main_plane +ffffffff81a3b970 T skl_main_to_aux_plane +ffffffff81a3bbd0 T intel_tile_size +ffffffff81a3bc10 T intel_tile_width_bytes +ffffffff81a3be60 T intel_tile_height +ffffffff81a3bec0 T intel_tile_row_size +ffffffff81a3bf40 T intel_fb_align_height +ffffffff81a3bfb0 T intel_fb_uses_dpt +ffffffff81a3c000 T intel_cursor_alignment +ffffffff81a3c060 T intel_surf_alignment +ffffffff81a3c270 T intel_fb_plane_get_subsampling +ffffffff81a3c640 T intel_plane_adjust_aligned_offset +ffffffff81a3c6b0 t intel_adjust_aligned_offset +ffffffff81a3c860 T intel_plane_compute_aligned_offset +ffffffff81a3c960 t intel_compute_aligned_offset +ffffffff81a3cb20 T intel_fb_needs_pot_stride_remap +ffffffff81a3cb60 T intel_fb_supports_90_270_rotation +ffffffff81a3cbb0 T intel_fill_fb_info +ffffffff81a3d7f0 t calc_plane_remap_info +ffffffff81a3e250 T intel_fb_fill_view +ffffffff81a3e2a0 T intel_plane_compute_gtt +ffffffff81a3eb70 t intel_plane_check_stride +ffffffff81a3eee0 T intel_framebuffer_init +ffffffff81a402f0 T intel_user_framebuffer_create +ffffffff81a40430 T intel_framebuffer_create +ffffffff81a404c0 t intel_adjust_tile_offset +ffffffff81a40600 t intel_user_framebuffer_destroy +ffffffff81a40660 t intel_user_framebuffer_create_handle +ffffffff81a40680 t intel_user_framebuffer_dirty +ffffffff81a41000 T intel_pin_and_fence_fb_obj +ffffffff81a41310 t i915_gem_object_lock +ffffffff81a41520 T intel_unpin_fb_vma +ffffffff81a41590 T intel_plane_pin_fb +ffffffff81a418c0 T intel_plane_unpin_fb +ffffffff81a42000 T intel_fbc_cleanup +ffffffff81a421c0 T intel_fbc_pre_update +ffffffff81a42810 T intel_fbc_post_update +ffffffff81a42a60 T intel_fbc_invalidate +ffffffff81a42c80 T intel_fbc_flush +ffffffff81a42f00 T intel_fbc_atomic_check +ffffffff81a43470 T intel_fbc_disable +ffffffff81a43530 t __intel_fbc_disable +ffffffff81a436c0 T intel_fbc_update +ffffffff81a43d80 T intel_fbc_reset_underrun +ffffffff81a43ee0 T intel_fbc_handle_fifo_underrun_irq +ffffffff81a43f90 T intel_fbc_add_plane +ffffffff81a43fc0 T intel_fbc_init +ffffffff81a44240 T intel_fbc_sanitize +ffffffff81a44310 T intel_fbc_crtc_debugfs_add +ffffffff81a44340 T intel_fbc_debugfs_register +ffffffff81a44370 t intel_fbc_is_ok +ffffffff81a44490 t intel_fbc_update_state +ffffffff81a44800 t intel_fbc_underrun_work_fn +ffffffff81a44920 t ivb_fbc_activate +ffffffff81a44b80 t ilk_fbc_deactivate +ffffffff81a44c30 t ilk_fbc_is_active +ffffffff81a44c90 t ivb_fbc_is_compressing +ffffffff81a44cf0 t snb_fbc_nuke +ffffffff81a44d60 t ilk_fbc_program_cfb +ffffffff81a44da0 t ivb_fbc_set_false_color +ffffffff81a44e60 t snb_fbc_activate +ffffffff81a44ee0 t ilk_fbc_is_compressing +ffffffff81a44f40 t ilk_fbc_activate +ffffffff81a45070 t i965_fbc_nuke +ffffffff81a45110 t g4x_fbc_activate +ffffffff81a45220 t g4x_fbc_deactivate +ffffffff81a452b0 t g4x_fbc_is_active +ffffffff81a45300 t g4x_fbc_is_compressing +ffffffff81a45360 t g4x_fbc_program_cfb +ffffffff81a45390 t i8xx_fbc_activate +ffffffff81a45500 t i8xx_fbc_deactivate +ffffffff81a455d0 t i8xx_fbc_is_active +ffffffff81a45620 t i8xx_fbc_is_compressing +ffffffff81a45680 t i8xx_fbc_program_cfb +ffffffff81a45700 t i8xx_fbc_nuke +ffffffff81a46000 T intel_fbdev_init +ffffffff81a464d0 t intel_fbdev_suspend_worker +ffffffff81a46500 T intel_fbdev_initial_config_async +ffffffff81a46570 T intel_fbdev_unregister +ffffffff81a465b0 T intel_fbdev_set_suspend +ffffffff81a465e0 T intel_fbdev_fini +ffffffff81a46670 T intel_fbdev_output_poll_changed +ffffffff81a46710 T intel_fbdev_restore_mode +ffffffff81a46790 T intel_fbdev_framebuffer +ffffffff81a467c0 t intelfb_create +ffffffff81a46dc0 t intel_fbdev_set_par +ffffffff81a47000 T assert_fdi_tx_enabled +ffffffff81a470e0 T assert_fdi_tx_disabled +ffffffff81a471c0 T assert_fdi_rx_enabled +ffffffff81a47270 T assert_fdi_rx_disabled +ffffffff81a47320 T assert_fdi_tx_pll_enabled +ffffffff81a473d0 T assert_fdi_rx_pll_enabled +ffffffff81a47490 T assert_fdi_rx_pll_disabled +ffffffff81a47550 T intel_fdi_link_train +ffffffff81a47570 T intel_fdi_pll_freq_update +ffffffff81a47620 T intel_fdi_link_freq +ffffffff81a47660 T ilk_fdi_compute_config +ffffffff81a47990 T intel_fdi_normal_train +ffffffff81a47b10 T hsw_fdi_link_train +ffffffff81a48010 T hsw_fdi_disable +ffffffff81a48170 T ilk_fdi_pll_enable +ffffffff81a48380 T ilk_fdi_pll_disable +ffffffff81a484b0 T ilk_fdi_disable +ffffffff81a48720 T intel_fdi_init_hook +ffffffff81a48780 t ilk_fdi_link_train +ffffffff81a48df0 t gen6_fdi_link_train +ffffffff81a49620 t ivb_manual_fdi_link_train +ffffffff81a49eb0 t cpt_set_fdi_bc_bifurcation +ffffffff81a4b000 T intel_set_cpu_fifo_underrun_reporting +ffffffff81a4b3e0 T intel_set_pch_fifo_underrun_reporting +ffffffff81a4b610 T intel_cpu_fifo_underrun_irq_handler +ffffffff81a4b800 T intel_pch_fifo_underrun_irq_handler +ffffffff81a4b880 T intel_check_cpu_fifo_underruns +ffffffff81a4baa0 T intel_check_pch_fifo_underruns +ffffffff81a4c000 T intel_frontbuffer_flip_prepare +ffffffff81a4c050 T intel_frontbuffer_flip_complete +ffffffff81a4c120 T intel_frontbuffer_flip +ffffffff81a4c1f0 T __intel_fb_invalidate +ffffffff81a4c280 T __intel_fb_flush +ffffffff81a4c370 T intel_frontbuffer_get +ffffffff81a4c4a0 t frontbuffer_active +ffffffff81a4c4d0 t frontbuffer_retire +ffffffff81a4c510 T intel_frontbuffer_put +ffffffff81a4c690 T intel_frontbuffer_track +ffffffff81a4d000 T intel_atomic_global_obj_init +ffffffff81a4d070 T intel_atomic_global_obj_cleanup +ffffffff81a4d170 T intel_atomic_get_global_obj_state +ffffffff81a4d3e0 T intel_atomic_get_old_global_obj_state +ffffffff81a4d440 T intel_atomic_get_new_global_obj_state +ffffffff81a4d4a0 T intel_atomic_swap_global_state +ffffffff81a4d5f0 T intel_atomic_clear_global_state +ffffffff81a4d720 T intel_atomic_lock_global_state +ffffffff81a4d7a0 T intel_atomic_serialize_global_state +ffffffff81a4e000 T intel_gmbus_is_valid_pin +ffffffff81a4e100 T intel_gmbus_reset +ffffffff81a4e160 T intel_bb_set_bits +ffffffff81a4e290 T intel_bb_set_dir +ffffffff81a4e2c0 T intel_bb_read_bits +ffffffff81a4e440 T intel_acquire_bus +ffffffff81a4e630 T intel_release_bus +ffffffff81a4e7d0 T intel_send_start +ffffffff81a4e7f0 T intel_send_stop +ffffffff81a4e810 T intel_initiate_xfer +ffffffff81a4e830 T intel_read_byte +ffffffff81a4e850 T intel_write_byte +ffffffff81a4e870 T intel_gmbus_output_aksv +ffffffff81a4e940 t do_gmbus_xfer +ffffffff81a4ef40 T intel_gmbus_setup +ffffffff81a4f2d0 T intel_gmbus_teardown +ffffffff81a4f340 T intel_gmbus_get_adapter +ffffffff81a4f3c0 T intel_gmbus_force_bit +ffffffff81a4f450 T intel_gmbus_is_forced_bit +ffffffff81a4f480 t gmbus_xfer_read +ffffffff81a4f750 t gmbus_xfer_write +ffffffff81a4f9a0 t gmbus_wait +ffffffff81a4fd80 t gmbus_wait_idle +ffffffff81a4ff20 t gmbus_xfer +ffffffff81a4fff0 t gmbus_func +ffffffff81a50030 t gmbus_lock_bus +ffffffff81a50050 t gmbus_trylock_bus +ffffffff81a500a0 t gmbus_unlock_bus +ffffffff81a51000 T intel_hdcp_capable +ffffffff81a510a0 t intel_hdcp_read_valid_bksv +ffffffff81a51320 T intel_hdcp2_capable +ffffffff81a51400 T is_hdcp_supported +ffffffff81a51450 T intel_hdcp_component_init +ffffffff81a51480 T intel_hdcp_init +ffffffff81a515b0 t intel_hdcp_check_work +ffffffff81a554b0 t intel_hdcp_prop_work +ffffffff81a55530 T intel_hdcp_enable +ffffffff81a55580 T intel_hdcp_disable +ffffffff81a556b0 t intel_hdcp_update_value +ffffffff81a55870 t _intel_hdcp2_disable +ffffffff81a55c70 t _intel_hdcp_disable +ffffffff81a55f70 T intel_hdcp_update_pipe +ffffffff81a560e0 T intel_hdcp_component_fini +ffffffff81a56120 T intel_hdcp_cleanup +ffffffff81a56260 T intel_hdcp_atomic_check +ffffffff81a562f0 T intel_hdcp_handle_cp_irq +ffffffff81a563f0 t __delayed_work_tick +ffffffff81a56410 t hdcp2_authenticate_repeater_topology +ffffffff81a566f0 t intel_hdcp_get_repeater_ctl +ffffffff81a57000 T hsw_write_infoframe +ffffffff81a57410 t hsw_dip_data_reg +ffffffff81a575d0 T hsw_read_infoframe +ffffffff81a57680 T intel_hdmi_infoframe_enable +ffffffff81a57720 T intel_hdmi_infoframes_enabled +ffffffff81a57830 T intel_read_infoframe +ffffffff81a579c0 T intel_hdmi_read_gcp_infoframe +ffffffff81a57ab0 T intel_dp_dual_mode_set_tmds_output +ffffffff81a57b80 T intel_hdmi_tmds_clock +ffffffff81a57bd0 T intel_hdmi_bpc_possible +ffffffff81a57d00 T intel_hdmi_limited_color_range +ffffffff81a57d70 T intel_hdmi_compute_config +ffffffff81a584c0 t intel_hdmi_compute_output_format +ffffffff81a585f0 T intel_hdmi_encoder_shutdown +ffffffff81a586c0 T intel_hdmi_handle_sink_scrambling +ffffffff81a587e0 T intel_infoframe_init +ffffffff81a58960 t vlv_write_infoframe +ffffffff81a58cc0 t vlv_read_infoframe +ffffffff81a58e90 t vlv_set_infoframes +ffffffff81a59230 t vlv_infoframes_enabled +ffffffff81a592d0 t g4x_write_infoframe +ffffffff81a59580 t g4x_read_infoframe +ffffffff81a596d0 t g4x_set_infoframes +ffffffff81a59970 t g4x_infoframes_enabled +ffffffff81a599e0 t hsw_set_infoframes +ffffffff81a59c80 t hsw_infoframes_enabled +ffffffff81a59d10 t ibx_write_infoframe +ffffffff81a5a020 t ibx_read_infoframe +ffffffff81a5a190 t ibx_set_infoframes +ffffffff81a5a500 t ibx_infoframes_enabled +ffffffff81a5a580 t cpt_write_infoframe +ffffffff81a5a880 t cpt_read_infoframe +ffffffff81a5a9f0 t cpt_set_infoframes +ffffffff81a5acf0 t cpt_infoframes_enabled +ffffffff81a5ad60 T intel_hdmi_init_connector +ffffffff81a5b3f0 T intel_hdmi_dsc_get_slice_height +ffffffff81a5b440 T intel_hdmi_dsc_get_num_slices +ffffffff81a5b5c0 T intel_hdmi_dsc_get_bpp +ffffffff81a5b6b0 t intel_hdmi_compute_clock +ffffffff81a5b970 t hdmi_port_clock_valid +ffffffff81a5bba0 t intel_write_infoframe +ffffffff81a5bd70 t intel_hdmi_detect +ffffffff81a5bf20 t intel_hdmi_force +ffffffff81a5c000 t intel_hdmi_connector_register +ffffffff81a5c010 t intel_hdmi_connector_unregister +ffffffff81a5c020 t intel_hdmi_set_edid +ffffffff81a5c2c0 t intel_hdmi_get_modes +ffffffff81a5c300 t intel_hdmi_mode_valid +ffffffff81a5c4a0 t intel_hdmi_mode_clock_valid +ffffffff81a5c630 t intel_hdmi_hdcp_write_an_aksv +ffffffff81a5c780 t intel_hdmi_hdcp_read_bksv +ffffffff81a5c850 t intel_hdmi_hdcp_read_bstatus +ffffffff81a5c920 t intel_hdmi_hdcp_repeater_present +ffffffff81a5ca00 t intel_hdmi_hdcp_read_ri_prime +ffffffff81a5cad0 t intel_hdmi_hdcp_read_ksv_ready +ffffffff81a5cbb0 t intel_hdmi_hdcp_read_ksv_fifo +ffffffff81a5cc80 t intel_hdmi_hdcp_read_v_prime_part +ffffffff81a5cd70 t intel_hdmi_hdcp_toggle_signalling +ffffffff81a5cff0 t intel_hdmi_hdcp_check_link +ffffffff81a5d340 t intel_hdmi_hdcp2_capable +ffffffff81a5d3f0 t intel_hdmi_hdcp2_write_msg +ffffffff81a5d4d0 t intel_hdmi_hdcp2_read_msg +ffffffff81a5d960 t intel_hdmi_hdcp2_check_link +ffffffff81a5e000 T intel_hpd_pin_default +ffffffff81a5e030 T intel_encoder_hotplug +ffffffff81a5e160 T intel_hpd_trigger_irq +ffffffff81a5e1d0 T intel_hpd_irq_handler +ffffffff81a5e5b0 T intel_hpd_init +ffffffff81a5e6c0 T intel_hpd_poll_enable +ffffffff81a5e740 T intel_hpd_poll_disable +ffffffff81a5e790 T intel_hpd_init_work +ffffffff81a5e860 t i915_hotplug_work_func +ffffffff81a5eba0 t i915_digport_work_func +ffffffff81a5ed30 t i915_hpd_poll_init_work +ffffffff81a5ee30 t intel_hpd_irq_storm_reenable_work +ffffffff81a5f170 T intel_hpd_cancel_work +ffffffff81a5f290 T intel_hpd_disable +ffffffff81a5f310 T intel_hpd_enable +ffffffff81a5f380 t __delayed_work_tick +ffffffff81a60000 T intel_lpe_audio_irq_handler +ffffffff81a60020 T intel_lpe_audio_init +ffffffff81a60050 T intel_lpe_audio_teardown +ffffffff81a60070 T intel_lpe_audio_notify +ffffffff81a61000 T lspcon_detect_hdr_capability +ffffffff81a610a0 T lspcon_write_infoframe +ffffffff81a61820 T lspcon_read_infoframe +ffffffff81a61860 T lspcon_set_infoframes +ffffffff81a61ad0 T lspcon_infoframes_enabled +ffffffff81a61cc0 T lspcon_wait_pcon_mode +ffffffff81a61cd0 t lspcon_wait_mode +ffffffff81a61f90 T lspcon_init +ffffffff81a623a0 T intel_lspcon_infoframes_enabled +ffffffff81a623e0 T lspcon_resume +ffffffff81a62690 t lspcon_change_mode +ffffffff81a63000 T intel_lvds_port_enabled +ffffffff81a63080 T intel_get_lvds_encoder +ffffffff81a630e0 T intel_is_dual_link_lvds +ffffffff81a63150 T intel_lvds_init +ffffffff81a638c0 t intel_enable_lvds +ffffffff81a63a00 t intel_pre_enable_lvds +ffffffff81a63cd0 t intel_lvds_compute_config +ffffffff81a63e30 t pch_disable_lvds +ffffffff81a63e50 t pch_post_disable_lvds +ffffffff81a63e70 t gmch_disable_lvds +ffffffff81a63ea0 t intel_lvds_get_hw_state +ffffffff81a63f60 t intel_lvds_get_config +ffffffff81a64060 t intel_lvds_shutdown +ffffffff81a64100 t intel_no_lvds_dmi_callback +ffffffff81a64150 t intel_disable_lvds +ffffffff81a64280 t intel_lvds_get_modes +ffffffff81a642b0 t intel_lvds_mode_valid +ffffffff81a64330 t intel_dual_link_lvds_callback +ffffffff81a65000 T intel_modeset_setup_hw_state +ffffffff81a67000 T intel_modeset_verify_crtc +ffffffff81a673b0 t verify_connector_state +ffffffff81a67660 T intel_modeset_verify_disabled +ffffffff81a68000 T intel_opregion_notify_encoder +ffffffff81a68160 t swsci +ffffffff81a68490 T intel_opregion_notify_adapter +ffffffff81a684e0 T intel_opregion_asle_intr +ffffffff81a68530 T intel_opregion_setup +ffffffff81a68d40 t asle_work +ffffffff81a691c0 T intel_opregion_get_panel_type +ffffffff81a692a0 T intel_opregion_get_edid +ffffffff81a69380 T intel_opregion_headless_sku +ffffffff81a693d0 T intel_opregion_register +ffffffff81a69460 T intel_opregion_resume +ffffffff81a694f0 T intel_opregion_suspend +ffffffff81a69590 T intel_opregion_unregister +ffffffff81a69710 t intel_no_opregion_vbt_callback +ffffffff81a69760 t intel_use_opregion_panel_type_callback +ffffffff81a6a000 T intel_overlay_reset +ffffffff81a6a050 T intel_overlay_switch_off +ffffffff81a6a240 t intel_overlay_release_old_vid +ffffffff81a6a3e0 T intel_overlay_put_image_ioctl +ffffffff81a6b5a0 T intel_overlay_attrs_ioctl +ffffffff81a6ba40 T intel_overlay_setup +ffffffff81a6bc90 t intel_overlay_last_flip_retire +ffffffff81a6bcd0 T intel_overlay_cleanup +ffffffff81a6bd90 T intel_overlay_capture_error_state +ffffffff81a6be70 T intel_overlay_print_error_state +ffffffff81a6c240 t intel_overlay_release_old_vid_tail +ffffffff81a6c310 t intel_overlay_off_tail +ffffffff81a6c4b0 t intel_overlay_flip_prepare +ffffffff81a6d000 T intel_panel_use_ssc +ffffffff81a6d060 T intel_panel_preferred_fixed_mode +ffffffff81a6d0a0 T intel_panel_fixed_mode +ffffffff81a6d160 T intel_panel_downclock_mode +ffffffff81a6d240 T intel_panel_highest_mode +ffffffff81a6d2a0 T intel_panel_get_modes +ffffffff81a6d330 T intel_panel_drrs_type +ffffffff81a6d380 T intel_panel_compute_config +ffffffff81a6d500 T intel_panel_add_edid_fixed_modes +ffffffff81a6da30 T intel_panel_add_vbt_lfp_fixed_mode +ffffffff81a6da90 t intel_panel_add_fixed_mode +ffffffff81a6dc10 T intel_panel_add_vbt_sdvo_fixed_mode +ffffffff81a6dc70 T intel_panel_add_encoder_fixed_mode +ffffffff81a6dcb0 T intel_panel_fitting +ffffffff81a6e300 T intel_panel_detect +ffffffff81a6e390 T intel_panel_mode_valid +ffffffff81a6e4a0 T intel_panel_init +ffffffff81a6e560 T intel_panel_fini +ffffffff81a6f000 T intel_has_pch_trancoder +ffffffff81a6f050 T intel_crtc_pch_transcoder +ffffffff81a6f090 T intel_pch_transcoder_get_m1_n1 +ffffffff81a6f0d0 T intel_pch_transcoder_get_m2_n2 +ffffffff81a6f110 T ilk_pch_pre_enable +ffffffff81a6f130 T ilk_pch_enable +ffffffff81a6f6d0 t ilk_pch_transcoder_set_timings +ffffffff81a6f950 T ilk_pch_disable +ffffffff81a6f960 T ilk_pch_post_disable +ffffffff81a6fc90 T ilk_pch_get_config +ffffffff81a6fe50 T lpt_pch_enable +ffffffff81a70080 T lpt_pch_disable +ffffffff81a70190 T lpt_pch_get_config +ffffffff81a70260 T intel_pch_sanitize +ffffffff81a70530 t assert_pch_dp_disabled +ffffffff81a70620 t assert_pch_hdmi_disabled +ffffffff81a71000 T lpt_disable_iclkip +ffffffff81a71070 T lpt_iclkip +ffffffff81a710f0 T lpt_program_iclkip +ffffffff81a71370 T lpt_get_iclkip +ffffffff81a71480 T lpt_disable_clkout_dp +ffffffff81a71550 T intel_init_pch_refclk +ffffffff81a73000 T intel_crtc_initial_plane_config +ffffffff81a74000 T intel_pps_lock +ffffffff81a74060 T intel_pps_unlock +ffffffff81a740b0 T intel_pps_reset_all +ffffffff81a74200 T intel_pps_check_power_unlocked +ffffffff81a743c0 T intel_pps_wait_power_cycle +ffffffff81a74580 T intel_pps_vdd_on_unlocked +ffffffff81a74ab0 T intel_pps_vdd_on +ffffffff81a74ba0 T intel_pps_vdd_off_sync +ffffffff81a74c70 t intel_pps_vdd_off_sync_unlocked +ffffffff81a74f50 T intel_pps_vdd_off_unlocked +ffffffff81a75060 T intel_pps_on_unlocked +ffffffff81a75460 T intel_pps_on +ffffffff81a75500 T intel_pps_off_unlocked +ffffffff81a75750 T intel_pps_off +ffffffff81a757f0 T intel_pps_backlight_on +ffffffff81a75a00 T intel_pps_backlight_off +ffffffff81a75c10 T intel_pps_backlight_power +ffffffff81a75de0 T vlv_pps_init +ffffffff81a75f40 t vlv_detach_power_sequencer +ffffffff81a760c0 t vlv_steal_power_sequencer +ffffffff81a761f0 t pps_init_delays +ffffffff81a76660 t pps_init_registers +ffffffff81a76a00 T intel_pps_have_panel_power_or_vdd +ffffffff81a76b50 T intel_pps_encoder_reset +ffffffff81a76ce0 t vlv_initial_power_sequencer_setup +ffffffff81a76f90 t pps_vdd_init +ffffffff81a770a0 T intel_pps_init +ffffffff81a77210 t edp_panel_vdd_work +ffffffff81a772c0 T intel_pps_init_late +ffffffff81a77430 T intel_pps_unlock_regs_wa +ffffffff81a77520 T intel_pps_setup +ffffffff81a77590 T assert_pps_unlocked +ffffffff81a777d0 t intel_pps_get_registers +ffffffff81a77eb0 t wait_panel_status +ffffffff81a78180 t intel_pps_readout_hw_state +ffffffff81a78340 t __delayed_work_tick +ffffffff81a79000 T intel_psr_irq_handler +ffffffff81a79680 T intel_psr_init_dpcd +ffffffff81a79910 T intel_psr_compute_config +ffffffff81a7a100 T intel_psr_get_config +ffffffff81a7a2b0 T intel_psr_disable +ffffffff81a7a3c0 t intel_psr_disable_locked +ffffffff81a7a830 T intel_psr_pause +ffffffff81a7aa20 t intel_psr_exit +ffffffff81a7ad00 T intel_psr_resume +ffffffff81a7ad90 t intel_psr_activate +ffffffff81a7b4a0 T intel_psr2_disable_plane_sel_fetch +ffffffff81a7b510 T intel_psr2_program_plane_sel_fetch +ffffffff81a7b6c0 T intel_psr2_program_trans_man_trk_ctl +ffffffff81a7b800 T intel_psr2_sel_fetch_update +ffffffff81a7be90 T intel_psr_pre_plane_update +ffffffff81a7c060 T intel_psr_post_plane_update +ffffffff81a7cae0 T intel_psr_wait_for_idle_locked +ffffffff81a7ccc0 T intel_psr_debug_set +ffffffff81a7cef0 t psr_irq_control +ffffffff81a7d040 T intel_psr_invalidate +ffffffff81a7d2f0 T intel_psr_flush +ffffffff81a7d7c0 T intel_psr_init +ffffffff81a7d8f0 t intel_psr_work +ffffffff81a7da90 t tgl_dc3co_disable_work +ffffffff81a7dae0 T intel_psr_short_pulse +ffffffff81a7dea0 T intel_psr_enabled +ffffffff81a7df20 T intel_psr_lock +ffffffff81a7e000 T intel_psr_unlock +ffffffff81a7e0e0 t tgl_psr2_disable_dc3co +ffffffff81a7e210 t __delayed_work_tick +ffffffff81a7f000 T intel_lookup_range_min_qp +ffffffff81a7f0b0 T intel_lookup_range_max_qp +ffffffff81a80000 T intel_init_quirks +ffffffff81a800f0 T intel_has_quirk +ffffffff81a80120 t quirk_ssc_force_disable +ffffffff81a80150 t quirk_invert_brightness +ffffffff81a80180 t quirk_backlight_present +ffffffff81a801b0 t quirk_increase_t12_delay +ffffffff81a801e0 t quirk_increase_ddi_disabled_time +ffffffff81a80210 t intel_dmi_reverse_brightness +ffffffff81a80260 t intel_dmi_no_pps_backlight +ffffffff81a81000 T intel_sdvo_port_enabled +ffffffff81a810a0 T intel_sdvo_init +ffffffff81a81c70 t intel_sdvo_compute_config +ffffffff81a821d0 t pch_disable_sdvo +ffffffff81a82200 t pch_post_disable_sdvo +ffffffff81a82210 t intel_disable_sdvo +ffffffff81a82380 t intel_sdvo_pre_enable +ffffffff81a82d00 t intel_enable_sdvo +ffffffff81a82f00 t intel_sdvo_get_hw_state +ffffffff81a82ff0 t intel_sdvo_get_config +ffffffff81a83560 t intel_sdvo_ddc_proxy_xfer +ffffffff81a83600 t intel_sdvo_ddc_proxy_func +ffffffff81a83630 t __intel_sdvo_write_cmd +ffffffff81a83af0 t proxy_lock_bus +ffffffff81a83b20 t proxy_trylock_bus +ffffffff81a83b50 t proxy_unlock_bus +ffffffff81a83b80 t intel_sdvo_enc_destroy +ffffffff81a83b90 t intel_sdvo_get_preferred_input_mode +ffffffff81a83f20 t intel_sdvo_get_dtd_from_mode +ffffffff81a84090 t intel_sdvo_read_response +ffffffff81a84530 t intel_sdvo_write_sdvox +ffffffff81a84720 t intel_sdvo_write_infoframe +ffffffff81a848f0 t intel_sdvo_dvi_init +ffffffff81a84b80 t intel_sdvo_tv_init +ffffffff81a84ea0 t intel_sdvo_lvds_init +ffffffff81a85090 t intel_sdvo_hotplug +ffffffff81a850d0 t intel_sdvo_connector_get_hw_state +ffffffff81a85160 t intel_sdvo_detect +ffffffff81a854d0 t intel_sdvo_connector_register +ffffffff81a854e0 t intel_sdvo_connector_unregister +ffffffff81a854f0 t intel_sdvo_connector_duplicate_state +ffffffff81a85570 t intel_sdvo_connector_atomic_set_property +ffffffff81a85740 t intel_sdvo_connector_atomic_get_property +ffffffff81a85960 t intel_sdvo_get_modes +ffffffff81a85c20 t intel_sdvo_mode_valid +ffffffff81a85cf0 t intel_sdvo_atomic_check +ffffffff81a85da0 t intel_sdvo_create_enhance_property +ffffffff81a87000 T intel_snps_phy_wait_for_calibration +ffffffff81a870d0 T intel_snps_phy_update_psr_power_state +ffffffff81a871a0 T intel_snps_phy_set_signal_levels +ffffffff81a873e0 T intel_mpllb_calc_state +ffffffff81a87590 T intel_snps_phy_check_hdmi_link_rate +ffffffff81a87610 T intel_mpllb_enable +ffffffff81a87870 T intel_mpllb_disable +ffffffff81a87a00 T intel_mpllb_calc_port_clock +ffffffff81a87ac0 T intel_mpllb_readout_hw_state +ffffffff81a87c20 T intel_mpllb_state_verify +ffffffff81a89000 T intel_plane_check_src_coordinates +ffffffff81a891c0 T vlv_plane_min_cdclk +ffffffff81a892a0 T ivb_plane_min_cdclk +ffffffff81a89360 T hsw_plane_min_cdclk +ffffffff81a893f0 T chv_plane_check_rotation +ffffffff81a89460 T intel_sprite_set_colorkey_ioctl +ffffffff81a89730 T intel_sprite_plane_create +ffffffff81a89a80 t vlv_sprite_update_noarm +ffffffff81a89b70 t vlv_sprite_update_arm +ffffffff81a8a230 t vlv_sprite_disable_arm +ffffffff81a8a2c0 t vlv_sprite_get_hw_state +ffffffff81a8a380 t vlv_sprite_check +ffffffff81a8a610 t ivb_sprite_update_noarm +ffffffff81a8a770 t ivb_sprite_update_arm +ffffffff81a8ab50 t ivb_sprite_disable_arm +ffffffff81a8ac00 t ivb_sprite_get_hw_state +ffffffff81a8acb0 t g4x_sprite_check +ffffffff81a8b270 t hsw_sprite_max_stride +ffffffff81a8b2c0 t g4x_sprite_max_stride +ffffffff81a8b330 t ivb_sprite_min_cdclk +ffffffff81a8b460 t g4x_sprite_update_noarm +ffffffff81a8b5d0 t g4x_sprite_update_arm +ffffffff81a8ba10 t g4x_sprite_disable_arm +ffffffff81a8bac0 t g4x_sprite_get_hw_state +ffffffff81a8bb70 t g4x_sprite_min_cdclk +ffffffff81a8bc30 t vlv_sprite_format_mod_supported +ffffffff81a8bd60 t snb_sprite_format_mod_supported +ffffffff81a8be40 t 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skl_watermark_ipc_enabled +ffffffff81aa0810 T skl_watermark_ipc_update +ffffffff81aa08c0 T skl_watermark_ipc_init +ffffffff81aa09c0 T skl_wm_init +ffffffff81aa0ff0 T intel_atomic_get_dbuf_state +ffffffff81aa1010 T intel_dbuf_init +ffffffff81aa1080 T intel_dbuf_pre_plane_update +ffffffff81aa1350 T intel_dbuf_post_plane_update +ffffffff81aa1420 T intel_mbus_dbox_update +ffffffff81aa1690 T skl_watermark_ipc_debugfs_register +ffffffff81aa16c0 t skl_sagv_disable +ffffffff81aa17e0 t skl_ddb_entry_for_slices +ffffffff81aa1920 t skl_compute_wm +ffffffff81aa4760 t skl_build_plane_wm_single +ffffffff81aa4a90 t skl_compute_wm_params +ffffffff81aa4e80 t skl_compute_plane_wm +ffffffff81aa5360 t intel_dbuf_duplicate_state +ffffffff81aa53f0 t intel_dbuf_destroy_state +ffffffff81aa6000 T pixel_format_from_register_bits +ffffffff81aa6060 T vlv_dsi_wait_for_fifo_empty +ffffffff81aa6120 T vlv_dsi_init +ffffffff81aa6980 t intel_dsi_compute_config +ffffffff81aa6ad0 t intel_dsi_pre_enable +ffffffff81aa8750 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assert_dsi_pll_disabled +ffffffff81aae000 T i915_gem_busy_ioctl +ffffffff81aaf000 T i915_gem_clflush_object +ffffffff81aaf200 t clflush_work +ffffffff81aaf260 t clflush_release +ffffffff81ab0000 T i915_lut_handle_alloc +ffffffff81ab0020 T i915_lut_handle_free +ffffffff81ab0040 T i915_gem_context_release +ffffffff81ab0070 T i915_gem_init__contexts +ffffffff81ab00c0 T i915_gem_context_open +ffffffff81ab0230 t i915_gem_create_context +ffffffff81ab0ac0 t proto_context_close +ffffffff81ab0b80 t gem_context_register +ffffffff81ab0d20 T i915_gem_context_close +ffffffff81ab0e70 t context_close +ffffffff81ab14f0 T i915_gem_vm_create_ioctl +ffffffff81ab1600 T i915_gem_vm_destroy_ioctl +ffffffff81ab16b0 T i915_gem_user_to_context_sseu +ffffffff81ab18d0 T i915_gem_context_lookup +ffffffff81ab1a00 T i915_gem_context_create_ioctl +ffffffff81ab1db0 T i915_gem_context_destroy_ioctl +ffffffff81ab1ee0 T i915_gem_context_getparam_ioctl +ffffffff81ab2300 T i915_gem_context_setparam_ioctl +ffffffff81ab2850 t set_proto_ctx_param +ffffffff81ab2f30 T i915_gem_context_reset_stats_ioctl +ffffffff81ab3030 T i915_gem_engines_iter_next +ffffffff81ab3080 T i915_gem_context_module_exit +ffffffff81ab30a0 T i915_gem_context_module_init +ffffffff81ab3100 t i915_gem_context_release_work +ffffffff81ab31d0 t intel_context_set_gem +ffffffff81ab32e0 t engines_notify +ffffffff81ab3460 t kill_engines +ffffffff81ab3600 t create_setparam +ffffffff81ab3670 t invalid_ext +ffffffff81ab36a0 t set_proto_ctx_engines_balance +ffffffff81ab3970 t set_proto_ctx_engines_bond +ffffffff81ab3cf0 t set_proto_ctx_engines_parallel_submit +ffffffff81ab5000 T __i915_gem_object_create_user +ffffffff81ab5010 t __i915_gem_object_create_user_ext +ffffffff81ab5490 T i915_gem_dumb_create +ffffffff81ab5600 T i915_gem_create_ioctl +ffffffff81ab56d0 T i915_gem_create_ext_ioctl +ffffffff81ab5890 t ext_set_placements +ffffffff81ab5ca0 t ext_set_protected +ffffffff81ab6000 T i915_gem_prime_export +ffffffff81ab6090 T i915_gem_prime_import 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i915_gem_object_release_mmap_gtt +ffffffff81ac0f10 T i915_gem_object_runtime_pm_release_mmap_offset +ffffffff81ac0f60 T i915_gem_object_release_mmap_offset +ffffffff81ac1060 T i915_gem_dumb_mmap_offset +ffffffff81ac10d0 t __assign_mmap_offset_handle +ffffffff81ac1530 T i915_gem_mmap_offset_ioctl +ffffffff81ac1630 T i915_gem_mmap +ffffffff81ac1760 t __ww_mutex_lock +ffffffff81ac2000 T i915_gem_object_alloc +ffffffff81ac2050 T i915_gem_object_free +ffffffff81ac2070 T i915_gem_object_init +ffffffff81ac2180 T __i915_gem_object_fini +ffffffff81ac21a0 T i915_gem_object_set_cache_coherency +ffffffff81ac2220 T i915_gem_object_can_bypass_llc +ffffffff81ac2270 T __i915_gem_free_object_rcu +ffffffff81ac22e0 T __i915_gem_object_pages_fini +ffffffff81ac2470 T __i915_gem_free_object +ffffffff81ac2520 T i915_gem_flush_free_objects +ffffffff81ac2610 T __i915_gem_object_flush_frontbuffer +ffffffff81ac26b0 T __i915_gem_object_invalidate_frontbuffer +ffffffff81ac2750 T i915_gem_object_read_from_page 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i915_gem_object_create_shmem +ffffffff81ac9a20 T i915_gem_object_create_shmem_from_data +ffffffff81ac9b90 T i915_gem_shmem_setup +ffffffff81ac9bf0 T i915_gem_object_is_shmem +ffffffff81ac9c30 t init_shmem +ffffffff81ac9c80 t release_shmem +ffffffff81ac9cc0 t shmem_object_init +ffffffff81aca000 T i915_gem_shrink +ffffffff81aca700 T i915_gem_shrink_all +ffffffff81aca780 T i915_gem_driver_register__shrinker +ffffffff81aca830 t i915_gem_shrinker_scan +ffffffff81aca8a0 t i915_gem_shrinker_count +ffffffff81aca910 T i915_gem_driver_unregister__shrinker +ffffffff81aca930 T i915_gem_shrinker_taints_mutex +ffffffff81aca960 T i915_gem_object_make_unshrinkable +ffffffff81acaa60 T __i915_gem_object_make_shrinkable +ffffffff81acab60 T __i915_gem_object_make_purgeable +ffffffff81acac60 T i915_gem_object_make_shrinkable +ffffffff81acad60 T i915_gem_object_make_purgeable +ffffffff81acb000 T i915_gem_stolen_insert_node_in_range +ffffffff81acb0d0 T i915_gem_stolen_insert_node +ffffffff81acb170 T i915_gem_stolen_remove_node +ffffffff81acb1b0 T i915_gem_object_create_stolen +ffffffff81acb1d0 T i915_gem_stolen_lmem_setup +ffffffff81acb410 T i915_gem_stolen_smem_setup +ffffffff81acb4a0 T i915_gem_object_is_stolen +ffffffff81acb4e0 t init_stolen_lmem +ffffffff81acb540 t release_stolen_lmem +ffffffff81acb5a0 t _i915_gem_object_stolen_init +ffffffff81acb9a0 t i915_gem_init_stolen +ffffffff81acc130 t init_stolen_smem +ffffffff81acc170 t release_stolen_smem +ffffffff81acc1c0 t i915_gem_object_get_pages_stolen +ffffffff81acc2b0 t i915_gem_object_put_pages_stolen +ffffffff81acc2e0 t i915_gem_object_release_stolen +ffffffff81acd000 T i915_gem_throttle_ioctl +ffffffff81ace000 T i915_gem_fence_size +ffffffff81ace080 T i915_gem_fence_alignment +ffffffff81ace0e0 T i915_gem_object_needs_bit17_swizzle +ffffffff81ace130 T i915_gem_object_set_tiling +ffffffff81ace7f0 T i915_gem_set_tiling_ioctl +ffffffff81acea60 T i915_gem_get_tiling_ioctl +ffffffff81acf000 T i915_ttm_sys_placement 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intel_sseu_copy_ssmask_to_user +ffffffff81b24720 T intel_sseu_info_init +ffffffff81b25ed0 T intel_sseu_make_rpcs +ffffffff81b26040 T intel_sseu_dump +ffffffff81b26240 T intel_sseu_print_topology +ffffffff81b26520 T intel_sseu_print_ss_info +ffffffff81b26580 T intel_slicemask_from_xehp_dssmask +ffffffff81b27000 T intel_sseu_status +ffffffff81b27820 T intel_sseu_debugfs_register +ffffffff81b28000 T intel_gt_init_timelines +ffffffff81b28050 T __intel_timeline_create +ffffffff81b28210 T intel_timeline_create_from_engine +ffffffff81b282d0 T __intel_timeline_pin +ffffffff81b28300 T intel_timeline_pin +ffffffff81b28410 T intel_timeline_reset_seqno +ffffffff81b28440 T intel_timeline_enter +ffffffff81b28530 T intel_timeline_exit +ffffffff81b285f0 T intel_timeline_get_seqno +ffffffff81b28650 t __intel_timeline_get_seqno +ffffffff81b286f0 T intel_timeline_read_hwsp +ffffffff81b287c0 T intel_timeline_unpin +ffffffff81b28810 T __intel_timeline_free +ffffffff81b288a0 T intel_gt_fini_timelines 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intel_guc_self_cfg32 +ffffffff81b32ab0 T intel_guc_self_cfg64 +ffffffff81b32b90 T intel_guc_load_status +ffffffff81b32d20 T intel_guc_write_barrier +ffffffff81b33000 T intel_guc_ads_print_policy_info +ffffffff81b33020 T intel_guc_global_policies_update +ffffffff81b33070 T intel_guc_ads_create +ffffffff81b33620 T intel_guc_ads_init_late +ffffffff81b33670 T intel_guc_ads_destroy +ffffffff81b336d0 T intel_guc_ads_reset +ffffffff81b33740 T intel_guc_engine_usage_offset +ffffffff81b33780 T intel_guc_engine_usage_record_map +ffffffff81b34000 T intel_guc_capture_getlistsize +ffffffff81b34020 t guc_capture_getlistsize +ffffffff81b34300 T intel_guc_capture_getlist +ffffffff81b34bb0 T intel_guc_capture_getnullheader +ffffffff81b34c60 T intel_guc_capture_print_engine_node +ffffffff81b35160 T intel_guc_capture_free_node +ffffffff81b351e0 T intel_guc_capture_get_matching_node +ffffffff81b35330 T intel_guc_capture_process +ffffffff81b36360 T intel_guc_capture_destroy +ffffffff81b366c0 T intel_guc_capture_init +ffffffff81b36ce0 t guc_capture_log_get_register +ffffffff81b37070 t guc_capture_alloc_steered_lists_xe_hpg +ffffffff81b38000 T intel_guc_ct_init_early +ffffffff81b38120 t ct_incoming_request_worker_func +ffffffff81b384a0 t ct_receive_tasklet_func +ffffffff81b384b0 T intel_guc_ct_init +ffffffff81b38650 T intel_guc_ct_fini +ffffffff81b386b0 T intel_guc_ct_enable +ffffffff81b389c0 T intel_guc_ct_disable +ffffffff81b38a70 T intel_guc_ct_send +ffffffff81b39440 T intel_guc_ct_event_handler +ffffffff81b39460 t ct_try_receive_message +ffffffff81b39c50 T intel_guc_ct_print_info +ffffffff81b39d60 t ct_write +ffffffff81b39f00 t ct_deadlocked +ffffffff81b3b000 T intel_guc_debugfs_register +ffffffff81b3c000 T intel_guc_fw_upload +ffffffff81b3d000 T intel_gt_init_hwconfig +ffffffff81b3d1d0 T intel_gt_fini_hwconfig +ffffffff81b3e000 T intel_guc_log_section_size_capture +ffffffff81b3e040 t guc_log_init_sizes +ffffffff81b3e260 T intel_guc_check_log_buf_overflow +ffffffff81b3e310 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intel_guc_context_reset_process_msg +ffffffff81b46f00 T intel_guc_error_capture_process_msg +ffffffff81b46fb0 T intel_guc_lookup_engine +ffffffff81b46ff0 T intel_guc_engine_failure_process_msg +ffffffff81b47170 T intel_guc_find_hung_context +ffffffff81b47340 T intel_guc_dump_active_requests +ffffffff81b474d0 T intel_guc_submission_print_info +ffffffff81b47610 T intel_guc_submission_print_context_info +ffffffff81b47a40 t emit_bb_start_parent_no_preempt_mid_batch +ffffffff81b47b60 T intel_guc_virtual_engine_has_heartbeat +ffffffff81b47bf0 t guc_virtual_get_sibling +ffffffff81b47c90 t update_context_prio +ffffffff81b47e80 t try_context_registration +ffffffff81b48300 t guc_wq_item_append +ffffffff81b48580 t guc_add_request +ffffffff81b487c0 t guc_context_policy_init_v70 +ffffffff81b48940 t guc_resume +ffffffff81b48a30 t guc_request_alloc +ffffffff81b48d20 t add_to_context +ffffffff81b48e20 t remove_from_context +ffffffff81b48ef0 t guc_engine_reset_prepare +ffffffff81b48f40 t guc_rewind_nop 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bdw_disable_vblank +ffffffff81b6c410 T gen8_irq_power_well_post_enable +ffffffff81b6c590 T gen8_irq_power_well_pre_disable +ffffffff81b6c720 T intel_synchronize_irq +ffffffff81b6c740 T valleyview_enable_display_irqs +ffffffff81b6c7b0 t vlv_display_irq_reset +ffffffff81b6c970 t vlv_display_irq_postinstall +ffffffff81b6cbc0 T valleyview_disable_display_irqs +ffffffff81b6cc10 T intel_hpd_irq_setup +ffffffff81b6cc50 T intel_irq_init +ffffffff81b6cf00 t ivb_parity_work +ffffffff81b6d290 T intel_irq_fini +ffffffff81b6d2d0 T intel_irq_install +ffffffff81b6d3d0 t intel_irq_reset +ffffffff81b6df30 t intel_irq_postinstall +ffffffff81b6ec30 T intel_irq_uninstall +ffffffff81b6ec90 T intel_runtime_pm_disable_interrupts +ffffffff81b6ecc0 T intel_runtime_pm_enable_interrupts +ffffffff81b6ecf0 T intel_synchronize_hardirq +ffffffff81b6ed10 t i9xx_pipestat_irq_reset +ffffffff81b6eea0 t kasprintf +ffffffff81b6ef70 t i915_hpd_irq_setup +ffffffff81b6f080 t icp_hpd_irq_setup +ffffffff81b6f270 t dg1_hpd_irq_setup +ffffffff81b6f2d0 t gen11_hpd_irq_setup +ffffffff81b6f520 t bxt_hpd_irq_setup +ffffffff81b6f6b0 t bdw_update_port_irq +ffffffff81b6f7f0 t spt_hpd_irq_setup +ffffffff81b6fa00 t ilk_hpd_irq_setup +ffffffff81b6fc60 t gen11_display_irq_reset +ffffffff81b701e0 t ibx_irq_reset +ffffffff81b70320 t cherryview_irq_handler +ffffffff81b705f0 t valleyview_irq_handler +ffffffff81b70950 t i965_irq_handler +ffffffff81b70ec0 t i915_irq_handler +ffffffff81b713a0 t i8xx_irq_handler +ffffffff81b717a0 t dg1_irq_handler +ffffffff81b71950 t gen11_irq_handler +ffffffff81b71aa0 t gen8_irq_handler +ffffffff81b71b80 t ilk_irq_handler +ffffffff81b72a40 t i9xx_pipestat_irq_ack +ffffffff81b72bc0 t i9xx_hpd_irq_handler +ffffffff81b72de0 t valleyview_pipestat_irq_handler +ffffffff81b72ff0 t i9xx_pipe_crc_irq_handler +ffffffff81b73140 t gen8_de_irq_handler +ffffffff81b74590 t cpt_irq_handler +ffffffff81b749d0 t ibx_hpd_irq_handler +ffffffff81b74b70 t gen8_de_irq_postinstall +ffffffff81b76000 T i915_memcpy_from_wc +ffffffff81b76120 T i915_unaligned_memcpy_from_wc +ffffffff81b76240 T i915_memcpy_init_early +ffffffff81b77000 T i915_mitigate_clear_residuals +ffffffff81b78000 T i915_init +ffffffff81b78240 t i915_check_nomodeset +ffffffff81b782c0 t i915_mock_selftests +ffffffff81b782f0 t i915_pmu_init +ffffffff81b78320 t i915_pmu_exit +ffffffff81b79000 T i915_params_dump +ffffffff81b7c120 T i915_params_copy +ffffffff81b7cff0 T i915_params_free +ffffffff81b7e000 T i915_pci_register_driver +ffffffff81b7e030 T i915_pci_unregister_driver +ffffffff81b7f000 T i915_oa_config_release +ffffffff81b7f060 T i915_perf_get_oa_config +ffffffff81b7f0b0 T i915_oa_init_reg_state +ffffffff81b7f1c0 T i915_perf_open_ioctl +ffffffff81b7f710 T i915_perf_register +ffffffff81b7f740 T i915_perf_unregister +ffffffff81b7f7b0 T i915_perf_add_config_ioctl +ffffffff81b7f800 T i915_perf_remove_config_ioctl +ffffffff81b7f880 T i915_perf_init +ffffffff81b7fc00 t gen7_is_valid_b_counter_addr +ffffffff81b7fc50 t hsw_is_valid_mux_addr +ffffffff81b7fcd0 t hsw_enable_metric_set +ffffffff81b7fdb0 t hsw_disable_metric_set +ffffffff81b7fec0 t gen7_oa_enable +ffffffff81b80020 t gen7_oa_disable +ffffffff81b800e0 t gen7_oa_read +ffffffff81b80640 t gen7_oa_hw_tail_read +ffffffff81b80690 t gen8_oa_read +ffffffff81b80cc0 t gen8_is_valid_mux_addr +ffffffff81b80d40 t gen8_is_valid_flex_addr +ffffffff81b80dc0 t chv_is_valid_mux_addr +ffffffff81b80e40 t gen8_oa_enable +ffffffff81b80f80 t gen8_oa_disable +ffffffff81b81040 t gen8_enable_metric_set +ffffffff81b810f0 t gen8_disable_metric_set +ffffffff81b81180 t gen8_oa_hw_tail_read +ffffffff81b811d0 t gen11_is_valid_mux_addr +ffffffff81b81290 t gen11_disable_metric_set +ffffffff81b81320 t gen12_is_valid_b_counter_addr +ffffffff81b81370 t gen12_is_valid_mux_addr +ffffffff81b813c0 t gen12_oa_enable +ffffffff81b81540 t gen12_oa_disable +ffffffff81b81680 t gen12_enable_metric_set +ffffffff81b817b0 t gen12_disable_metric_set +ffffffff81b81880 t gen12_oa_hw_tail_read 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intel_vgpu_register +ffffffff81b93080 T intel_vgpu_active +ffffffff81b930b0 T intel_vgpu_has_full_ppgtt +ffffffff81b930e0 T intel_vgpu_has_hwsp_emulation +ffffffff81b93110 T intel_vgpu_has_huge_gtt +ffffffff81b93140 T intel_vgt_deballoon +ffffffff81b93380 T intel_vgt_balloon +ffffffff81b94000 T i915_vma_instance +ffffffff81b945a0 T i915_vma_work +ffffffff81b94610 T i915_vma_wait_for_bind +ffffffff81b94680 T i915_vma_bind +ffffffff81b949d0 T i915_vma_pin_iomap +ffffffff81b94ba0 T i915_vma_flush_writes +ffffffff81b94c10 T i915_vma_unpin_iomap +ffffffff81b94c90 T i915_vma_unpin_and_release +ffffffff81b94d00 T i915_vma_misplaced +ffffffff81b94da0 T __i915_vma_set_map_and_fenceable +ffffffff81b94e20 T i915_gem_valid_gtt_space +ffffffff81b94ea0 T vma_invalidate_tlb +ffffffff81b94ee0 T i915_vma_pin_ww +ffffffff81b95900 T i915_ggtt_pin +ffffffff81b959d0 t __i915_ggtt_pin +ffffffff81b95b30 t i915_gem_object_lock +ffffffff81b95d40 T i915_vma_close +ffffffff81b95e10 T i915_vma_reopen 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i915_vma_resource_free +ffffffff81b98090 T i915_vma_resource_unhold +ffffffff81b980a0 t __i915_vma_resource_unhold +ffffffff81b98190 T i915_vma_resource_hold +ffffffff81b981e0 T i915_vma_resource_unbind +ffffffff81b98310 T __i915_vma_resource_init +ffffffff81b98370 t i915_vma_resource_fence_notify +ffffffff81b98440 T i915_vma_resource_bind_dep_sync +ffffffff81b985c0 T i915_vma_resource_bind_dep_sync_all +ffffffff81b98650 T i915_vma_resource_bind_dep_await +ffffffff81b987f0 T i915_vma_resource_module_exit +ffffffff81b98810 T i915_vma_resource_module_init +ffffffff81b98870 t get_driver_name +ffffffff81b988a0 t get_timeline_name +ffffffff81b988d0 t unbind_fence_release +ffffffff81b98910 t i915_vma_resource_unbind_work +ffffffff81b99000 T intel_platform_name +ffffffff81b99090 T intel_device_info_print +ffffffff81b99d10 T intel_device_info_subplatform_init +ffffffff81b9a070 T intel_device_info_runtime_init +ffffffff81b9a740 T intel_driver_caps_print +ffffffff81b9b000 T intel_dram_detect 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intel_pcode_init +ffffffff81b9e6d0 T snb_pcode_read_p +ffffffff81b9e7d0 T snb_pcode_write_p +ffffffff81b9f000 T intel_set_memory_cxsr +ffffffff81b9f090 t _intel_set_memory_cxsr +ffffffff81b9f340 T intel_wm_plane_visible +ffffffff81b9f390 T ilk_wm_max_level +ffffffff81b9f400 T intel_print_wm_latency +ffffffff81b9f550 T ilk_disable_lp_wm +ffffffff81b9f630 T g4x_wm_get_hw_state +ffffffff81b9fe00 T g4x_wm_sanitize +ffffffff81b9ff90 t g4x_program_watermarks +ffffffff81ba0330 T vlv_wm_get_hw_state +ffffffff81ba0ff0 t vlv_invalidate_wms +ffffffff81ba1150 T vlv_wm_sanitize +ffffffff81ba12a0 t vlv_program_watermarks +ffffffff81ba19f0 T ilk_wm_get_hw_state +ffffffff81ba1e60 T intel_init_clock_gating +ffffffff81ba1e80 T intel_suspend_hw +ffffffff81ba1f20 T intel_init_clock_gating_hooks +ffffffff81ba2170 T intel_init_pm +ffffffff81ba2c60 T intel_pm_setup +ffffffff81ba2ca0 t chv_set_memory_dvfs +ffffffff81ba2e60 t pvc_init_clock_gating +ffffffff81ba3000 t dg2_init_clock_gating +ffffffff81ba3150 t xehpsdv_init_clock_gating +ffffffff81ba3250 t adlp_init_clock_gating +ffffffff81ba3340 t gen12lp_init_clock_gating +ffffffff81ba34b0 t dg1_init_clock_gating +ffffffff81ba3590 t icl_init_clock_gating +ffffffff81ba3650 t cfl_init_clock_gating +ffffffff81ba3770 t gen9_init_clock_gating +ffffffff81ba3880 t skl_init_clock_gating +ffffffff81ba39c0 t kbl_init_clock_gating +ffffffff81ba3bd0 t bxt_init_clock_gating +ffffffff81ba3d30 t glk_init_clock_gating +ffffffff81ba3d90 t bdw_init_clock_gating +ffffffff81ba41d0 t chv_init_clock_gating +ffffffff81ba4380 t hsw_init_clock_gating +ffffffff81ba44d0 t ivb_init_clock_gating +ffffffff81ba46e0 t g4x_disable_trickle_feed +ffffffff81ba4840 t cpt_init_clock_gating +ffffffff81ba4b70 t vlv_init_clock_gating +ffffffff81ba4c80 t gen6_init_clock_gating +ffffffff81ba4e80 t ilk_init_clock_gating +ffffffff81ba5050 t g4x_init_clock_gating +ffffffff81ba5100 t i965gm_init_clock_gating +ffffffff81ba51d0 t i965g_init_clock_gating +ffffffff81ba5240 t gen3_init_clock_gating +ffffffff81ba5330 t i85x_init_clock_gating +ffffffff81ba53d0 t i830_init_clock_gating +ffffffff81ba5400 t nop_init_clock_gating +ffffffff81ba5420 t ilk_compute_pipe_wm +ffffffff81ba5890 t ilk_compute_intermediate_wm +ffffffff81ba5bb0 t ilk_initial_watermarks +ffffffff81ba5c20 t ilk_optimize_watermarks +ffffffff81ba5cd0 t ilk_compute_wm_level +ffffffff81ba6240 t ilk_validate_wm_level +ffffffff81ba6380 t ilk_program_watermarks +ffffffff81ba7140 t ilk_wm_merge +ffffffff81ba73b0 t vlv_compute_pipe_wm +ffffffff81ba81f0 t vlv_compute_intermediate_wm +ffffffff81ba84f0 t vlv_initial_watermarks +ffffffff81ba8560 t vlv_atomic_update_fifo +ffffffff81ba8870 t vlv_optimize_watermarks +ffffffff81ba8930 t g4x_compute_pipe_wm +ffffffff81ba9560 t g4x_compute_intermediate_wm +ffffffff81ba99a0 t g4x_initial_watermarks +ffffffff81ba9a40 t g4x_optimize_watermarks +ffffffff81ba9b20 t pnv_update_wm +ffffffff81baa1d0 t i965_update_wm +ffffffff81baa590 t i9xx_update_wm +ffffffff81baad40 t i845_update_wm +ffffffff81bab000 T intel_region_ttm_device_init +ffffffff81bab070 T intel_region_ttm_device_fini +ffffffff81bab090 T intel_region_to_ttm_type +ffffffff81bab0d0 T intel_region_ttm_init +ffffffff81bab170 T intel_region_ttm_fini +ffffffff81bab3d0 T intel_region_ttm_resource_to_rsgt +ffffffff81bab410 T intel_region_ttm_resource_free +ffffffff81bac000 T intel_runtime_pm_get_raw +ffffffff81bac080 T intel_runtime_pm_get +ffffffff81bac130 T intel_runtime_pm_get_if_in_use +ffffffff81bac1e0 T intel_runtime_pm_get_if_active +ffffffff81bac290 T intel_runtime_pm_get_noresume +ffffffff81bac3c0 T intel_runtime_pm_put_raw +ffffffff81bac450 T intel_runtime_pm_put_unchecked +ffffffff81bac510 T intel_runtime_pm_enable +ffffffff81bac540 T intel_runtime_pm_disable +ffffffff81bac570 T intel_runtime_pm_driver_release +ffffffff81bac600 T intel_runtime_pm_init_early +ffffffff81bad000 T intel_sbi_read +ffffffff81bad050 t intel_sbi_rw +ffffffff81bad240 T intel_sbi_write +ffffffff81bae000 T intel_step_init +ffffffff81bae3f0 T intel_step_name +ffffffff81bae430 t pvc_step_lookup +ffffffff81baf000 T gen3_stolen_base +ffffffff81baf050 T gen11_stolen_base +ffffffff81baf0d0 T i830_stolen_size +ffffffff81baf140 T gen3_stolen_size +ffffffff81baf1b0 T gen6_stolen_size +ffffffff81baf200 T chv_stolen_size +ffffffff81baf270 T gen8_stolen_size +ffffffff81baf2c0 T gen9_stolen_size +ffffffff81baf330 T intel_init_stolen_res +ffffffff81bb0000 T intel_uncore_mmio_debug_init_early +ffffffff81bb0060 T intel_uncore_forcewake_domain_to_str +ffffffff81bb00d0 T intel_uncore_fw_release_timer +ffffffff81bb01f0 T intel_uncore_suspend +ffffffff81bb0230 t intel_uncore_forcewake_reset +ffffffff81bb0510 T intel_uncore_resume_early +ffffffff81bb0640 T intel_uncore_unclaimed_mmio +ffffffff81bb06b0 T intel_uncore_runtime_resume +ffffffff81bb06e0 T intel_uncore_forcewake_get +ffffffff81bb0850 T intel_uncore_forcewake_user_get +ffffffff81bb0970 T intel_uncore_forcewake_get__locked +ffffffff81bb0a40 T intel_uncore_forcewake_user_put +ffffffff81bb0b80 T intel_uncore_forcewake_put__locked +ffffffff81bb0c80 T intel_uncore_forcewake_put +ffffffff81bb0da0 T intel_uncore_forcewake_put_delayed +ffffffff81bb0ef0 T intel_uncore_forcewake_flush +ffffffff81bb0fa0 T assert_forcewakes_inactive +ffffffff81bb1010 T assert_forcewakes_active +ffffffff81bb1040 T intel_uncore_setup_mmio +ffffffff81bb1060 t uncore_unmap_mmio +ffffffff81bb1090 T intel_uncore_init_early +ffffffff81bb10f0 T intel_uncore_init_mmio +ffffffff81bb2350 T intel_uncore_prune_engine_fw_domains +ffffffff81bb2520 t fw_domain_fini +ffffffff81bb2620 T intel_uncore_fini_mmio +ffffffff81bb26c0 T __intel_wait_for_register_fw +ffffffff81bb2970 T __intel_wait_for_register +ffffffff81bb2cf0 T intel_uncore_forcewake_for_reg +ffffffff81bb2e00 t check_for_unclaimed_mmio +ffffffff81bb2f60 T intel_uncore_arm_unclaimed_mmio_detection +ffffffff81bb3060 t vgpu_write8 +ffffffff81bb30a0 t vgpu_write16 +ffffffff81bb30e0 t vgpu_write32 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vlv_iosf_sb_get +ffffffff81bb9020 T vlv_iosf_sb_put +ffffffff81bb9040 T vlv_punit_read +ffffffff81bb9090 t vlv_sideband_rw +ffffffff81bb9240 T vlv_punit_write +ffffffff81bb9290 T vlv_bunit_read +ffffffff81bb92e0 T vlv_bunit_write +ffffffff81bb9330 T vlv_nc_read +ffffffff81bb9380 T vlv_iosf_sb_read +ffffffff81bb93d0 T vlv_iosf_sb_write +ffffffff81bb9420 T vlv_cck_read +ffffffff81bb9470 T vlv_cck_write +ffffffff81bb94c0 T vlv_ccu_read +ffffffff81bb9510 T vlv_ccu_write +ffffffff81bb9560 T vlv_dpio_read +ffffffff81bb9630 T vlv_dpio_write +ffffffff81bb96a0 T vlv_flisdsi_read +ffffffff81bb96f0 T vlv_flisdsi_write +ffffffff81bba000 T vlv_suspend_complete +ffffffff81bbaa50 T vlv_resume_prepare +ffffffff81bbb490 T vlv_suspend_init +ffffffff81bbb4f0 T vlv_suspend_cleanup +ffffffff81bbb540 t vlv_wait_for_pw_status +ffffffff81bbc000 T atom_execute_table_scratch_unlocked +ffffffff81bbc0a0 t atom_execute_table_locked +ffffffff81bbc3d0 T atom_execute_table +ffffffff81bbc480 T atom_parse +ffffffff81bbc650 T atom_destroy +ffffffff81bbc690 T atom_asic_init +ffffffff81bbc8a0 T atom_parse_data_header +ffffffff81bbc930 T atom_parse_cmd_header +ffffffff81bbc9a0 T atom_allocate_fb_scratch +ffffffff81bbca70 t atom_op_move +ffffffff81bbcc50 t atom_op_and +ffffffff81bbce30 t atom_op_or +ffffffff81bbd010 t atom_op_shift_left +ffffffff81bbd200 t atom_op_shift_right +ffffffff81bbd3f0 t atom_op_mul +ffffffff81bbd540 t atom_op_div +ffffffff81bbd6b0 t atom_op_add +ffffffff81bbd890 t atom_op_sub +ffffffff81bbda70 t atom_op_setport +ffffffff81bbdbf0 t atom_op_setregblock +ffffffff81bbdcb0 t atom_op_setfbbase +ffffffff81bbdd80 t atom_op_compare +ffffffff81bbdf70 t atom_op_switch +ffffffff81bbe1c0 t atom_op_jump +ffffffff81bbe440 t atom_op_test +ffffffff81bbe600 t atom_op_delay +ffffffff81bbe6e0 t atom_op_calltable +ffffffff81bbe820 t atom_op_repeat +ffffffff81bbe850 t atom_op_clear +ffffffff81bbe950 t atom_op_nop +ffffffff81bbe980 t atom_op_eot +ffffffff81bbe9b0 t atom_op_mask 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+ffffffff81bc3bb0 t atombios_crtc_prepare +ffffffff81bc3c60 t atombios_crtc_commit +ffffffff81bc3cd0 t atombios_crtc_mode_fixup +ffffffff81bc4a40 t atombios_crtc_disable +ffffffff81bc4ca0 t radeon_get_shared_nondp_ppll +ffffffff81bc5000 T radeon_atom_copy_swap +ffffffff81bc5010 T radeon_dp_aux_init +ffffffff81bc50f0 t radeon_dp_aux_transfer_atom +ffffffff81bc52c0 T radeon_dp_getsinktype +ffffffff81bc5330 T radeon_dp_getdpcd +ffffffff81bc54a0 T radeon_dp_get_panel_mode +ffffffff81bc55a0 T radeon_dp_set_link_config +ffffffff81bc5620 t radeon_dp_get_dp_link_config +ffffffff81bc57a0 T radeon_dp_mode_valid_helper +ffffffff81bc5850 T radeon_dp_needs_link_train +ffffffff81bc58c0 T radeon_dp_set_rx_power_state +ffffffff81bc5940 T radeon_dp_link_train +ffffffff81bc60c0 t radeon_process_aux_ch +ffffffff81bc6260 t dp_get_adjust_train +ffffffff81bc7000 T atombios_get_backlight_level +ffffffff81bc7060 T atombios_set_backlight_level +ffffffff81bc7210 T atombios_dig_transmitter_setup +ffffffff81bc7230 T radeon_atom_backlight_init +ffffffff81bc7400 t radeon_atom_backlight_get_brightness +ffffffff81bc7460 T atombios_dvo_setup +ffffffff81bc7620 T atombios_digital_setup +ffffffff81bc78c0 T atombios_get_encoder_mode +ffffffff81bc7b50 T atombios_dig_encoder_setup2 +ffffffff81bc7f90 T atombios_dig_encoder_setup +ffffffff81bc7fb0 T atombios_dig_transmitter_setup2 +ffffffff81bc8910 T atombios_set_edp_panel_power +ffffffff81bc8a30 T radeon_atom_release_dig_encoder +ffffffff81bc8a70 T radeon_atom_pick_dig_encoder +ffffffff81bc8c90 T radeon_atom_encoder_init +ffffffff81bc8d60 t atombios_external_encoder_setup +ffffffff81bc8fc0 T radeon_atom_ext_encoder_setup_ddc +ffffffff81bc9010 T radeon_enc_destroy +ffffffff81bc90c0 T radeon_add_atom_encoder +ffffffff81bc9500 t radeon_atom_backlight_update_status +ffffffff81bc9560 t radeon_atom_encoder_dpms +ffffffff81bc9870 t radeon_atom_mode_fixup +ffffffff81bc99b0 t radeon_atom_encoder_prepare +ffffffff81bc9e80 t radeon_atom_encoder_commit +ffffffff81bc9eb0 t radeon_atom_encoder_mode_set +ffffffff81bca460 t radeon_atom_dig_detect +ffffffff81bca570 t radeon_atom_encoder_disable +ffffffff81bca820 t radeon_atom_encoder_dpms_avivo +ffffffff81bcaa50 t radeon_atom_encoder_dpms_dig +ffffffff81bcaf50 t radeon_atom_dac_detect +ffffffff81bcb140 t radeon_atom_ext_dpms +ffffffff81bcb170 t radeon_atom_ext_prepare +ffffffff81bcb1a0 t radeon_atom_ext_commit +ffffffff81bcb1d0 t radeon_atom_ext_mode_set +ffffffff81bcb200 t radeon_atom_ext_disable +ffffffff81bcc000 T radeon_atom_hw_i2c_xfer +ffffffff81bcc160 t radeon_process_i2c_ch +ffffffff81bcc330 T radeon_atom_hw_i2c_func +ffffffff81bcd000 T btc_get_max_clock_from_voltage_dependency_table +ffffffff81bcd0d0 T btc_apply_voltage_dependency_rules +ffffffff81bcd140 T btc_skip_blacklist_clocks +ffffffff81bcd230 T btc_adjust_clock_combinations +ffffffff81bcd340 T btc_apply_voltage_delta_rules +ffffffff81bcd470 T btc_program_mgcg_hw_sequence +ffffffff81bcd570 T btc_dpm_enabled +ffffffff81bcd580 T btc_notify_uvd_to_smc +ffffffff81bcd5f0 T btc_reset_to_default +ffffffff81bcd640 T btc_read_arb_registers +ffffffff81bcd6d0 T btc_dpm_vblank_too_short +ffffffff81bcd730 T btc_dpm_pre_set_power_state +ffffffff81bce610 T btc_dpm_set_power_state +ffffffff81bcea20 T btc_dpm_post_set_power_state +ffffffff81bceb40 T btc_dpm_enable +ffffffff81bcfd50 T btc_dpm_disable +ffffffff81bd0280 T btc_dpm_setup_asic +ffffffff81bd0350 T btc_dpm_init +ffffffff81bd0750 T btc_dpm_fini +ffffffff81bd0800 T btc_dpm_debugfs_print_current_performance_level +ffffffff81bd0840 T btc_dpm_get_current_sclk +ffffffff81bd08c0 T btc_dpm_get_current_mclk +ffffffff81bd0940 T btc_dpm_get_sclk +ffffffff81bd0990 T btc_dpm_get_mclk +ffffffff81bd1000 T ci_dpm_powergate_uvd +ffffffff81bd1380 T ci_dpm_vblank_too_short +ffffffff81bd1400 T ci_fan_ctrl_get_fan_speed_percent +ffffffff81bd14a0 T ci_fan_ctrl_set_fan_speed_percent +ffffffff81bd1570 T ci_fan_ctrl_set_mode +ffffffff81bd1700 t ci_fan_ctrl_set_static_mode +ffffffff81bd17c0 t ci_thermal_start_smc_fan_control +ffffffff81bd1a00 T ci_fan_ctrl_get_mode +ffffffff81bd1a50 T ci_dpm_force_performance_level +ffffffff81bd2310 t ci_upload_dpm_level_enable_mask +ffffffff81bd2640 T ci_dpm_pre_set_power_state +ffffffff81bd2940 T ci_dpm_post_set_power_state +ffffffff81bd2a10 T ci_dpm_setup_asic +ffffffff81bd2c10 T ci_dpm_enable +ffffffff81bd6a40 t ci_enable_didt +ffffffff81bd6ce0 t ci_enable_power_containment +ffffffff81bd7180 T ci_dpm_late_enable +ffffffff81bd7370 T ci_dpm_disable +ffffffff81bd7a60 T ci_dpm_set_power_state +ffffffff81bd8be0 T ci_dpm_display_configuration_changed +ffffffff81bd8d80 T ci_dpm_fini +ffffffff81bd8e30 T ci_dpm_init +ffffffff81bda500 T ci_dpm_debugfs_print_current_performance_level +ffffffff81bda640 T ci_dpm_print_power_state +ffffffff81bda700 T ci_dpm_get_current_sclk +ffffffff81bda7d0 T ci_dpm_get_current_mclk +ffffffff81bda8a0 T ci_dpm_get_sclk +ffffffff81bda8f0 T ci_dpm_get_mclk +ffffffff81bda940 t ci_populate_all_graphic_levels +ffffffff81bdaec0 t ci_populate_all_memory_levels +ffffffff81bdb7d0 t ci_do_program_memory_timing_parameters +ffffffff81bdb9f0 t ci_populate_smc_voltage_table +ffffffff81bdbb50 t ci_enable_sclk_mclk_dpm +ffffffff81bdc000 T ci_copy_bytes_to_smc +ffffffff81bdc250 T ci_start_smc +ffffffff81bdc280 T ci_reset_smc +ffffffff81bdc2b0 T ci_program_jump_on_start +ffffffff81bdc2e0 T ci_stop_smc_clock +ffffffff81bdc310 T ci_start_smc_clock +ffffffff81bdc340 T ci_is_smc_running +ffffffff81bdc3b0 T ci_load_smc_ucode +ffffffff81bdc540 T ci_read_smc_sram_dword +ffffffff81bdc610 T ci_write_smc_sram_dword +ffffffff81bdd000 T cik_get_allowed_info_register +ffffffff81bdd0a0 T cik_didt_rreg +ffffffff81bdd140 T cik_didt_wreg +ffffffff81bdd1c0 T ci_get_temp +ffffffff81bdd210 T kv_get_temp +ffffffff81bdd260 T cik_pciep_rreg +ffffffff81bdd2e0 T cik_pciep_wreg +ffffffff81bdd340 T cik_get_xclk +ffffffff81bdd3b0 T cik_mm_rdoorbell +ffffffff81bdd410 T cik_mm_wdoorbell +ffffffff81bdd460 T ci_mc_load_microcode +ffffffff81bdd7b0 T cik_ring_test +ffffffff81bdda50 T cik_fence_gfx_ring_emit +ffffffff81bdde50 T cik_fence_compute_ring_emit +ffffffff81bde0e0 T cik_semaphore_ring_emit +ffffffff81bde2a0 T cik_copy_cpdma +ffffffff81bde6a0 T cik_ring_ib_execute +ffffffff81bdec70 T cik_ib_test +ffffffff81bdef50 T cik_gfx_get_rptr +ffffffff81bdefa0 T cik_gfx_get_wptr +ffffffff81bdefe0 T cik_gfx_set_wptr +ffffffff81bdf020 T cik_compute_get_rptr +ffffffff81bdf0f0 T cik_compute_get_wptr +ffffffff81bdf1d0 T cik_compute_set_wptr +ffffffff81bdf250 T cik_gpu_check_soft_reset +ffffffff81bdf3c0 T cik_asic_reset +ffffffff81bdf7d0 t cik_gpu_pci_config_reset +ffffffff81bdfff0 T cik_gfx_is_lockup +ffffffff81be0050 T cik_pcie_gart_tlb_flush +ffffffff81be00a0 T cik_ib_parse +ffffffff81be00d0 T cik_vm_init +ffffffff81be0130 T cik_vm_fini +ffffffff81be0160 T cik_vm_flush +ffffffff81be0eb0 T cik_enter_rlc_safe_mode +ffffffff81be0f90 T cik_exit_rlc_safe_mode +ffffffff81be0fd0 T cik_update_cg +ffffffff81be14a0 t cik_enable_mgcg +ffffffff81be19c0 t cik_enable_cgcg +ffffffff81be1d30 T cik_init_cp_pg_table +ffffffff81be1ff0 T cik_get_csb_size +ffffffff81be2080 T cik_get_csb_buffer +ffffffff81be2220 T cik_irq_set +ffffffff81be2fc0 t cik_disable_interrupt_state +ffffffff81be3480 T cik_irq_process +ffffffff81be4c20 t cik_irq_ack +ffffffff81be55a0 T cik_resume +ffffffff81be5630 t cik_init_golden_registers +ffffffff81be57f0 t cik_startup +ffffffff81beb540 T cik_suspend +ffffffff81beb920 T cik_init +ffffffff81bec110 t cik_init_microcode +ffffffff81bed120 t cik_pcie_gart_fini +ffffffff81bed220 T cik_fini +ffffffff81bed5c0 T dce8_program_fmt +ffffffff81bed6f0 T dce8_bandwidth_update +ffffffff81bee310 T cik_get_gpu_clock_counter +ffffffff81bee3d0 T cik_set_uvd_clocks +ffffffff81bee440 t cik_set_uvd_clock +ffffffff81bee5b0 T cik_set_vce_clocks +ffffffff81bee7f0 t cik_wait_for_rlc_serdes +ffffffff81bee9c0 t radeon_bo_reserve +ffffffff81beeb40 t radeon_bo_unreserve +ffffffff81beec20 t cik_update_gfx_pg +ffffffff81beedc0 t cik_compute_stop +ffffffff81beef30 t cik_cp_compute_fini +ffffffff81bef0d0 t dce8_latency_watermark +ffffffff81bf0000 T cik_sdma_get_rptr +ffffffff81bf0070 T cik_sdma_get_wptr +ffffffff81bf00c0 T cik_sdma_set_wptr +ffffffff81bf0110 T cik_sdma_ring_ib_execute +ffffffff81bf04f0 T cik_sdma_fence_ring_emit +ffffffff81bf06d0 t cik_sdma_hdp_flush_ring_emit +ffffffff81bf0910 T cik_sdma_semaphore_ring_emit +ffffffff81bf0a30 T cik_sdma_enable +ffffffff81bf0c10 T cik_sdma_resume +ffffffff81bf10e0 T cik_sdma_fini +ffffffff81bf1120 T cik_copy_dma +ffffffff81bf14f0 T cik_sdma_ring_test +ffffffff81bf1790 T cik_sdma_ib_test +ffffffff81bf19e0 T cik_sdma_is_lockup +ffffffff81bf1a60 T cik_sdma_vm_copy_pages +ffffffff81bf1b70 T cik_sdma_vm_write_pages +ffffffff81bf1ce0 T cik_sdma_vm_set_pages +ffffffff81bf1e50 T cik_sdma_vm_pad_ib +ffffffff81bf1ea0 T cik_dma_vm_flush +ffffffff81bf3000 T cypress_enable_spread_spectrum +ffffffff81bf3130 T cypress_start_dpm +ffffffff81bf3180 T cypress_enable_sclk_control +ffffffff81bf31e0 T cypress_enable_mclk_control +ffffffff81bf3240 T cypress_notify_smc_display_change +ffffffff81bf3280 T cypress_program_response_times +ffffffff81bf3340 T cypress_advertise_gen2_capability +ffffffff81bf3410 T cypress_notify_link_speed_change_after_state_change +ffffffff81bf34d0 T cypress_notify_link_speed_change_before_state_change +ffffffff81bf3580 T cypress_get_strobe_mode_settings +ffffffff81bf3680 T cypress_get_mclk_frequency_ratio +ffffffff81bf3730 T cypress_map_clkf_to_ibias +ffffffff81bf37f0 T cypress_convert_power_level_to_smc +ffffffff81bf3bb0 t cypress_populate_mclk_value +ffffffff81bf3f80 T cypress_upload_sw_state +ffffffff81bf4100 T cypress_upload_mc_reg_table +ffffffff81bf41b0 t cypress_convert_mc_reg_table_to_smc +ffffffff81bf4450 T cypress_calculate_burst_time +ffffffff81bf44d0 T cypress_program_memory_timing_parameters +ffffffff81bf4680 T cypress_populate_smc_initial_state +ffffffff81bf4a10 T cypress_populate_smc_acpi_state +ffffffff81bf4da0 T cypress_construct_voltage_tables +ffffffff81bf4e40 t cypress_trim_voltage_table_to_fit_state_table +ffffffff81bf5030 T cypress_populate_smc_voltage_tables +ffffffff81bf5170 T cypress_get_mvdd_configuration +ffffffff81bf5230 T cypress_populate_mc_reg_table +ffffffff81bf5490 T cypress_get_table_locations +ffffffff81bf5570 T cypress_enable_display_gap +ffffffff81bf55c0 T cypress_dpm_setup_asic +ffffffff81bf56b0 T cypress_dpm_enable +ffffffff81bf6190 t cypress_force_mc_use_s1 +ffffffff81bf6410 t cypress_gfx_clock_gating_enable +ffffffff81bf6720 t cypress_mg_clock_gating_enable +ffffffff81bf69a0 T cypress_dpm_disable +ffffffff81bf6bd0 T cypress_dpm_set_power_state +ffffffff81bf6e80 T cypress_dpm_display_configuration_changed +ffffffff81bf6f60 T cypress_dpm_init +ffffffff81bf71d0 T cypress_dpm_fini +ffffffff81bf7260 T cypress_dpm_vblank_too_short +ffffffff81bf72c0 t cypress_wait_for_mc_sequencer +ffffffff81bf8000 T dce3_2_afmt_hdmi_write_speaker_allocation +ffffffff81bf8070 T dce3_2_afmt_dp_write_speaker_allocation +ffffffff81bf80e0 T dce3_2_afmt_write_sad_regs +ffffffff81bf81f0 T dce3_2_audio_set_dto +ffffffff81bf8330 T dce3_2_hdmi_update_acr +ffffffff81bf8690 T dce3_2_set_audio_packet +ffffffff81bf8820 T dce3_2_set_mute +ffffffff81bf9000 T dce6_endpoint_rreg +ffffffff81bf90d0 T dce6_endpoint_wreg +ffffffff81bf91c0 T dce6_audio_get_pin +ffffffff81bf9330 T dce6_afmt_select_pin +ffffffff81bf93c0 T dce6_afmt_write_latency_fields +ffffffff81bf9470 T dce6_afmt_hdmi_write_speaker_allocation +ffffffff81bf9540 T dce6_afmt_dp_write_speaker_allocation +ffffffff81bf9610 T dce6_afmt_write_sad_regs +ffffffff81bf9750 T dce6_audio_enable +ffffffff81bf9790 T dce6_hdmi_audio_set_dto +ffffffff81bf9800 T dce6_dp_audio_set_dto +ffffffff81bfa000 T eg_cg_rreg +ffffffff81bfa080 t r100_mm_rreg +ffffffff81bfa0d0 T eg_cg_wreg +ffffffff81bfa130 T eg_pif_phy0_rreg +ffffffff81bfa1b0 T eg_pif_phy0_wreg +ffffffff81bfa210 T eg_pif_phy1_rreg +ffffffff81bfa290 T eg_pif_phy1_wreg +ffffffff81bfa2f0 T evergreen_get_allowed_info_register +ffffffff81bfa370 T evergreen_tiling_fields +ffffffff81bfa410 T sumo_set_uvd_clocks +ffffffff81bfa4e0 t sumo_set_uvd_clock +ffffffff81bfa6a0 T evergreen_set_uvd_clocks +ffffffff81bfac40 T evergreen_fix_pci_max_read_req_size +ffffffff81bfadf0 T dce4_program_fmt +ffffffff81bfaf00 T dce4_wait_for_vblank +ffffffff81bfb180 T evergreen_page_flip +ffffffff81bfb310 T evergreen_page_flip_pending +ffffffff81bfb380 T evergreen_get_temp +ffffffff81bfb450 T sumo_get_temp +ffffffff81bfb490 T sumo_pm_init_profile +ffffffff81bfb5d0 T btc_pm_init_profile +ffffffff81bfb6e0 T evergreen_pm_misc +ffffffff81bfb880 T evergreen_pm_prepare +ffffffff81bfb980 T evergreen_pm_finish +ffffffff81bfba80 T evergreen_hpd_sense +ffffffff81bfbaf0 T evergreen_hpd_set_polarity +ffffffff81bfbc30 T evergreen_hpd_init +ffffffff81bfbd00 T evergreen_hpd_fini +ffffffff81bfbda0 T evergreen_get_number_of_dram_channels +ffffffff81bfbde0 T evergreen_bandwidth_update +ffffffff81bfbfa0 t evergreen_line_buffer_adjust +ffffffff81bfc1a0 t evergreen_program_watermarks +ffffffff81bfcc50 T evergreen_mc_wait_for_idle +ffffffff81bfcce0 T evergreen_pcie_gart_tlb_flush +ffffffff81bfcdb0 T evergreen_mc_stop +ffffffff81bfd8a0 T evergreen_mc_resume +ffffffff81bfdfb0 T evergreen_mc_program +ffffffff81bfe3c0 T evergreen_ring_ib_execute +ffffffff81bfe850 T evergreen_mc_init +ffffffff81bfe990 T evergreen_print_gpu_status_regs +ffffffff81bfe9c0 T evergreen_is_display_hung +ffffffff81bfebc0 T evergreen_gpu_check_soft_reset +ffffffff81bfed20 T evergreen_gpu_pci_config_reset +ffffffff81bfee90 T evergreen_asic_reset +ffffffff81bff1a0 T evergreen_gfx_is_lockup +ffffffff81bff200 T sumo_rlc_fini +ffffffff81bff3c0 t radeon_bo_reserve +ffffffff81bff540 t radeon_bo_unreserve +ffffffff81bff620 T sumo_rlc_init +ffffffff81bffe00 T evergreen_rlc_resume +ffffffff81c00170 T evergreen_get_vblank_counter +ffffffff81c001d0 T evergreen_disable_interrupt_state +ffffffff81c004a0 T evergreen_irq_set +ffffffff81c00a60 T evergreen_irq_suspend +ffffffff81c00ab0 T evergreen_irq_process +ffffffff81c015a0 t evergreen_irq_ack +ffffffff81c01ca0 T evergreen_resume +ffffffff81c01d80 t evergreen_init_golden_registers +ffffffff81c01f90 t evergreen_startup +ffffffff81c04620 T evergreen_suspend +ffffffff81c047c0 T evergreen_init +ffffffff81c04cd0 T evergreen_fini +ffffffff81c04ec0 T evergreen_pcie_gen2_enable +ffffffff81c050f0 T evergreen_program_aspm +ffffffff81c05790 t evergreen_latency_watermark +ffffffff81c06000 T evergreen_cs_parse +ffffffff81c088b0 T evergreen_dma_cs_parse +ffffffff81c09af0 T evergreen_ib_parse +ffffffff81c09fa0 T evergreen_dma_ib_parse +ffffffff81c0a160 t evergreen_cs_track_check +ffffffff81c0b180 t evergreen_cs_handle_reg +ffffffff81c0d0c0 t evergreen_surface_value_conv_check +ffffffff81c0d3a0 t evergreen_surface_check +ffffffff81c0d840 t evergreen_cs_track_validate_htile +ffffffff81c0dae0 t evergreen_vm_reg_valid +ffffffff81c0e000 T evergreen_dma_fence_ring_emit +ffffffff81c0e2c0 T evergreen_dma_ring_ib_execute +ffffffff81c0e600 T evergreen_copy_dma +ffffffff81c0e9b0 T evergreen_dma_is_lockup +ffffffff81c0f000 T dce4_audio_enable +ffffffff81c0f080 T evergreen_hdmi_update_acr +ffffffff81c0f290 T dce4_afmt_write_latency_fields +ffffffff81c0f300 T dce4_afmt_hdmi_write_speaker_allocation +ffffffff81c0f370 T dce4_afmt_dp_write_speaker_allocation +ffffffff81c0f3e0 T evergreen_hdmi_write_sad_regs +ffffffff81c0f4f0 T evergreen_set_avi_packet +ffffffff81c0f680 T dce4_hdmi_audio_set_dto +ffffffff81c0f750 T dce4_dp_audio_set_dto +ffffffff81c0f840 T dce4_set_vbi_packet +ffffffff81c0f8a0 T dce4_hdmi_set_color_depth +ffffffff81c0f9f0 T dce4_set_audio_packet +ffffffff81c0fc00 T dce4_set_mute +ffffffff81c0fd00 T evergreen_hdmi_enable +ffffffff81c10030 T evergreen_dp_enable +ffffffff81c11000 T kv_dpm_enable_bapm +ffffffff81c11060 T kv_dpm_enable +ffffffff81c125a0 t kv_enable_didt +ffffffff81c12840 T kv_dpm_late_enable +ffffffff81c12a20 T kv_dpm_powergate_uvd +ffffffff81c12b90 T kv_dpm_disable +ffffffff81c12f00 T kv_dpm_force_performance_level +ffffffff81c13090 t kv_force_dpm_lowest +ffffffff81c13160 T kv_dpm_pre_set_power_state +ffffffff81c136f0 T kv_dpm_set_power_state +ffffffff81c13ea0 t kv_set_valid_clock_range +ffffffff81c14060 t kv_calculate_ds_divider +ffffffff81c141d0 t kv_calculate_nbps_level_settings +ffffffff81c14360 t kv_update_vce_dpm +ffffffff81c14540 T kv_dpm_post_set_power_state +ffffffff81c145e0 T kv_dpm_setup_asic +ffffffff81c14640 T kv_dpm_init +ffffffff81c14ee0 T kv_dpm_debugfs_print_current_performance_level +ffffffff81c14f50 T kv_dpm_get_current_sclk +ffffffff81c14fc0 T kv_dpm_get_current_mclk +ffffffff81c14ff0 T kv_dpm_print_power_state +ffffffff81c15090 T kv_dpm_fini +ffffffff81c15130 T kv_dpm_display_configuration_changed +ffffffff81c15160 T kv_dpm_get_sclk +ffffffff81c151b0 T kv_dpm_get_mclk +ffffffff81c16000 T kv_notify_message_to_smu +ffffffff81c160c0 T kv_dpm_get_enable_mask +ffffffff81c16190 T kv_send_msg_to_smc_with_parameter +ffffffff81c16260 T kv_read_smc_sram_dword +ffffffff81c162e0 T kv_smc_dpm_enable +ffffffff81c16400 T kv_smc_bapm_enable +ffffffff81c16520 T kv_copy_bytes_to_smc +ffffffff81c17000 T tn_smc_rreg +ffffffff81c17080 T tn_smc_wreg +ffffffff81c170e0 T ni_mc_load_microcode +ffffffff81c172d0 T ni_init_microcode +ffffffff81c17810 T cayman_get_allowed_info_register +ffffffff81c178a0 T tn_get_temp +ffffffff81c17930 T cayman_pcie_gart_tlb_flush +ffffffff81c17980 T cayman_cp_int_cntl_setup +ffffffff81c179d0 T cayman_fence_ring_emit +ffffffff81c17d70 T cayman_ring_ib_execute +ffffffff81c181e0 T cayman_gfx_get_rptr +ffffffff81c18270 T cayman_gfx_get_wptr +ffffffff81c182e0 T cayman_gfx_set_wptr +ffffffff81c18360 T cayman_gpu_check_soft_reset +ffffffff81c184e0 T cayman_asic_reset +ffffffff81c187e0 T cayman_gfx_is_lockup +ffffffff81c18840 T cayman_resume +ffffffff81c188d0 t ni_init_golden_registers +ffffffff81c189b0 t cayman_startup +ffffffff81c1b0e0 T cayman_suspend +ffffffff81c1b2d0 T cayman_init +ffffffff81c1b8d0 T cayman_fini +ffffffff81c1bb50 T cayman_vm_init +ffffffff81c1bbb0 T cayman_vm_fini +ffffffff81c1bbe0 T cayman_vm_decode_fault +ffffffff81c1bc70 T cayman_vm_flush +ffffffff81c1c0f0 T tn_set_vce_clocks +ffffffff81c1d000 T cayman_dma_get_rptr +ffffffff81c1d070 T cayman_dma_get_wptr +ffffffff81c1d0c0 T cayman_dma_set_wptr +ffffffff81c1d110 T cayman_dma_ring_ib_execute +ffffffff81c1d4a0 T cayman_dma_stop +ffffffff81c1d550 T cayman_dma_resume +ffffffff81c1d7a0 T cayman_dma_fini +ffffffff81c1d850 T cayman_dma_is_lockup +ffffffff81c1d8d0 T cayman_dma_vm_copy_pages +ffffffff81c1d9c0 T cayman_dma_vm_write_pages +ffffffff81c1db20 T cayman_dma_vm_set_pages +ffffffff81c1dc80 T cayman_dma_vm_pad_ib +ffffffff81c1dcd0 T cayman_dma_vm_flush +ffffffff81c1f000 T ni_get_pi +ffffffff81c1f030 T ni_get_ps +ffffffff81c1f060 T ni_dpm_vblank_too_short +ffffffff81c1f0c0 T ni_dpm_force_performance_level +ffffffff81c1f200 T ni_copy_and_switch_arb_sets +ffffffff81c1f4d0 T ni_set_uvd_clock_before_set_eng_clock +ffffffff81c1f550 T ni_set_uvd_clock_after_set_eng_clock +ffffffff81c1f5d0 T ni_dpm_setup_asic +ffffffff81c1f7e0 T ni_update_current_ps +ffffffff81c1f890 T ni_update_requested_ps +ffffffff81c1f940 T ni_dpm_enable +ffffffff81c22b80 t ni_populate_smc_tdp_limits +ffffffff81c22d40 T ni_dpm_disable +ffffffff81c23100 T ni_dpm_pre_set_power_state +ffffffff81c236e0 T ni_dpm_set_power_state +ffffffff81c247f0 T ni_dpm_post_set_power_state +ffffffff81c248c0 T ni_dpm_init +ffffffff81c25290 T ni_dpm_fini +ffffffff81c25340 T ni_dpm_print_power_state +ffffffff81c25410 T ni_dpm_debugfs_print_current_performance_level +ffffffff81c25450 T ni_dpm_get_current_sclk +ffffffff81c254b0 T ni_dpm_get_current_mclk +ffffffff81c25510 T ni_dpm_get_sclk +ffffffff81c25570 T ni_dpm_get_mclk +ffffffff81c255d0 t ni_do_program_memory_timing_parameters +ffffffff81c25700 t ni_calculate_sclk_params +ffffffff81c25920 t ni_calculate_power_boost_limit +ffffffff81c25ad0 t ni_populate_mclk_value +ffffffff81c26000 T r100_wait_for_vblank +ffffffff81c261a0 T r100_page_flip +ffffffff81c26450 T r100_page_flip_pending +ffffffff81c26500 T r100_pm_get_dynpm_state +ffffffff81c26720 T r100_pm_init_profile +ffffffff81c26800 T r100_pm_misc +ffffffff81c26c30 T r100_pm_prepare +ffffffff81c26ce0 T r100_pm_finish +ffffffff81c26d90 T r100_gui_idle +ffffffff81c26dd0 T r100_hpd_sense +ffffffff81c26e30 T r100_hpd_set_polarity +ffffffff81c26ee0 T r100_hpd_init +ffffffff81c26f70 T r100_hpd_fini +ffffffff81c26fd0 T r100_pci_gart_tlb_flush +ffffffff81c27000 T r100_pci_gart_init +ffffffff81c270d0 T r100_pci_gart_get_page_entry +ffffffff81c27100 T r100_pci_gart_set_page +ffffffff81c27130 T r100_pci_gart_enable +ffffffff81c27210 T r100_pci_gart_disable +ffffffff81c27280 T r100_pci_gart_fini +ffffffff81c272f0 T r100_irq_set +ffffffff81c273c0 T r100_irq_disable +ffffffff81c27430 T r100_irq_process +ffffffff81c27730 T r100_get_vblank_counter +ffffffff81c27780 T r100_fence_ring_emit +ffffffff81c27bf0 T r100_semaphore_ring_emit +ffffffff81c27c20 T r100_copy_blit +ffffffff81c282b0 T r100_ring_start +ffffffff81c283a0 T r100_gfx_get_rptr +ffffffff81c283f0 T r100_gfx_get_wptr +ffffffff81c28430 T r100_gfx_set_wptr +ffffffff81c28470 T r100_cp_init +ffffffff81c289a0 T r100_debugfs_cp_init +ffffffff81c289d0 T r100_cp_fini +ffffffff81c28a70 T r100_cp_disable +ffffffff81c28bb0 T r100_gui_wait_for_idle +ffffffff81c28ca0 T r100_reloc_pitch_offset +ffffffff81c28dd0 T r100_packet3_load_vbpntr +ffffffff81c29070 T r100_cs_parse_packet0 +ffffffff81c29180 T r100_cs_packet_parse_vline +ffffffff81c29370 T r100_cs_track_check_pkt3_indx_buffer +ffffffff81c293e0 T r100_cs_parse +ffffffff81c2a8a0 T r100_cs_track_clear +ffffffff81c2ac30 T r100_cs_track_check +ffffffff81c2b610 T r100_mc_wait_for_idle +ffffffff81c2b6a0 T r100_gpu_is_lockup +ffffffff81c2b700 T r100_enable_bm +ffffffff81c2b740 T r100_bm_disable +ffffffff81c2b7e0 T r100_asic_reset +ffffffff81c2bb10 T r100_mc_stop +ffffffff81c2bcc0 T r100_mc_resume +ffffffff81c2bd70 T r100_set_common_regs +ffffffff81c2bf20 T r100_vram_init_sizes +ffffffff81c2c100 T r100_vga_set_state +ffffffff81c2c160 T r100_pll_errata_after_index +ffffffff81c2c1a0 T r100_pll_rreg +ffffffff81c2c2c0 T r100_pll_wreg +ffffffff81c2c3d0 T r100_debugfs_rbbm_init +ffffffff81c2c400 T r100_debugfs_mc_info_init +ffffffff81c2c430 T r100_set_surface_reg +ffffffff81c2c640 T r100_clear_surface_reg +ffffffff81c2c6f0 T r100_bandwidth_update +ffffffff81c2d190 T r100_ring_test +ffffffff81c2d440 T r100_ring_ib_execute +ffffffff81c2d6a0 T r100_ib_test +ffffffff81c2d9e0 T r100_vga_render_disable +ffffffff81c2da40 T r100_resume +ffffffff81c2dc30 t r100_startup +ffffffff81c2e160 T r100_suspend +ffffffff81c2e240 T r100_fini +ffffffff81c2e340 T r100_restore_sanity +ffffffff81c2e3e0 T r100_init +ffffffff81c2e950 T r100_mm_rreg_slow +ffffffff81c2e9c0 T r100_mm_wreg_slow +ffffffff81c2ea20 T r100_io_rreg +ffffffff81c2eac0 T r100_io_wreg +ffffffff81c2eb30 t r100_cs_track_texture_print +ffffffff81c2f000 T r200_copy_dma +ffffffff81c2f460 T r200_packet0_check +ffffffff81c30470 T r200_set_safe_registers +ffffffff81c31000 T rv370_pcie_rreg +ffffffff81c31080 T rv370_pcie_wreg +ffffffff81c310e0 T rv370_pcie_gart_tlb_flush +ffffffff81c312d0 T rv370_pcie_gart_get_page_entry +ffffffff81c31330 T rv370_pcie_gart_set_page +ffffffff81c31370 T rv370_pcie_gart_init +ffffffff81c31440 T rv370_pcie_gart_enable +ffffffff81c317a0 T rv370_pcie_gart_disable +ffffffff81c31920 T rv370_pcie_gart_fini +ffffffff81c31950 T r300_fence_ring_emit +ffffffff81c31ee0 T r300_ring_start +ffffffff81c328f0 T r300_mc_wait_for_idle +ffffffff81c32980 T r300_asic_reset +ffffffff81c32b90 T r300_mc_init +ffffffff81c32c40 T rv370_set_pcie_lanes +ffffffff81c32e00 T rv370_get_pcie_lanes +ffffffff81c32eb0 T r300_cs_parse +ffffffff81c33210 t r300_packet0_check +ffffffff81c34070 T r300_set_reg_safe +ffffffff81c340b0 T r300_mc_program +ffffffff81c34230 T r300_clock_startup +ffffffff81c342b0 T r300_resume +ffffffff81c34480 t r300_startup +ffffffff81c347e0 T r300_suspend +ffffffff81c34860 T r300_fini +ffffffff81c34940 T r300_init +ffffffff81c35000 T r420_pm_init_profile +ffffffff81c350e0 T r420_pipes_init +ffffffff81c352c0 T r420_mc_rreg +ffffffff81c35340 T r420_mc_wreg +ffffffff81c353b0 T r420_resume +ffffffff81c35580 t r420_startup +ffffffff81c35920 T r420_suspend +ffffffff81c35ac0 T r420_fini +ffffffff81c35ba0 T r420_init +ffffffff81c35e20 T r420_debugfs_pipes_info_init +ffffffff81c36000 T r520_mc_wait_for_idle +ffffffff81c36090 T r520_resume +ffffffff81c36180 t r520_startup +ffffffff81c36570 T r520_init +ffffffff81c37000 T r600_rcu_rreg +ffffffff81c37080 T r600_rcu_wreg +ffffffff81c370f0 T r600_uvd_ctx_rreg +ffffffff81c37170 T r600_uvd_ctx_wreg +ffffffff81c371e0 T r600_get_allowed_info_register +ffffffff81c37250 T r600_get_xclk +ffffffff81c37280 T r600_set_uvd_clocks +ffffffff81c377e0 T dce3_program_fmt +ffffffff81c378f0 T rv6xx_get_temp +ffffffff81c37940 T r600_pm_get_dynpm_state +ffffffff81c37d40 T rs780_pm_init_profile +ffffffff81c37e40 T r600_pm_init_profile +ffffffff81c380d0 T r600_pm_misc +ffffffff81c381a0 T r600_gui_idle +ffffffff81c381e0 T r600_hpd_sense +ffffffff81c38300 T r600_hpd_set_polarity +ffffffff81c38570 T r600_hpd_init +ffffffff81c38780 T r600_hpd_fini +ffffffff81c38930 T r600_pcie_gart_tlb_flush +ffffffff81c38a70 T r600_pcie_gart_init +ffffffff81c38b10 T r600_mc_wait_for_idle +ffffffff81c38ba0 T rs780_mc_rreg +ffffffff81c38c30 T rs780_mc_wreg +ffffffff81c38cb0 T r600_vram_scratch_init +ffffffff81c38db0 t radeon_bo_reserve +ffffffff81c38f30 t radeon_bo_unreserve +ffffffff81c39010 T r600_vram_scratch_fini +ffffffff81c39080 T r600_set_bios_scratch_engine_hung +ffffffff81c390d0 T r600_gpu_check_soft_reset +ffffffff81c39450 T r600_asic_reset +ffffffff81c397e0 t r600_gpu_pci_config_reset +ffffffff81c39a00 T r600_gfx_is_lockup +ffffffff81c39a60 T r6xx_remap_render_backend +ffffffff81c39c40 T r600_count_pipe_bits +ffffffff81c39cb0 T r600_pciep_rreg +ffffffff81c39d30 T r600_pciep_wreg +ffffffff81c39d90 T r600_cp_stop +ffffffff81c39e10 T r600_init_microcode +ffffffff81c3a2e0 T r600_gfx_get_rptr +ffffffff81c3a330 T r600_gfx_get_wptr +ffffffff81c3a370 T r600_gfx_set_wptr +ffffffff81c3a3b0 T r600_cp_start +ffffffff81c3a730 T r600_cp_resume +ffffffff81c3aa90 T r600_ring_init +ffffffff81c3ab30 T r600_cp_fini +ffffffff81c3abb0 T r600_scratch_init +ffffffff81c3ac20 T r600_ring_test +ffffffff81c3aec0 T r600_fence_ring_emit +ffffffff81c3b780 T r600_semaphore_ring_emit +ffffffff81c3b970 T r600_copy_cpdma +ffffffff81c3bf20 T r600_set_surface_reg +ffffffff81c3bf50 T r600_clear_surface_reg +ffffffff81c3bf80 T r600_vga_set_state +ffffffff81c3bfe0 T r600_resume +ffffffff81c3c070 t r600_startup +ffffffff81c3e080 T r600_suspend +ffffffff81c3e1e0 T r600_irq_suspend +ffffffff81c3e2a0 t r600_pcie_gart_disable +ffffffff81c3e4a0 T r600_init +ffffffff81c3ec90 T r600_ih_ring_init +ffffffff81c3ed00 T r600_irq_fini +ffffffff81c3ee30 T r600_fini +ffffffff81c3efc0 T r600_ring_ib_execute +ffffffff81c3f440 T r600_ib_test +ffffffff81c3f6f0 T r600_ih_ring_alloc +ffffffff81c3f810 T r600_ih_ring_fini +ffffffff81c3f8a0 T r600_rlc_stop +ffffffff81c3fa20 T r600_disable_interrupts +ffffffff81c3fad0 T r600_irq_init +ffffffff81c3ff30 t r600_disable_interrupt_state +ffffffff81c40220 T r600_irq_disable +ffffffff81c402e0 T r600_irq_set +ffffffff81c40a50 t r600_irq_ack +ffffffff81c40f40 T r600_irq_process +ffffffff81c41b30 T r600_mmio_hdp_flush +ffffffff81c41ba0 T r600_set_pcie_lanes +ffffffff81c41cd0 T r600_get_pcie_lanes +ffffffff81c41da0 T r600_get_gpu_clock_counter +ffffffff81c42000 T r600_fmt_is_valid_color +ffffffff81c42040 T r600_fmt_is_valid_texture +ffffffff81c42090 T r600_fmt_get_blocksize +ffffffff81c420d0 T r600_fmt_get_nblocksx +ffffffff81c42120 T r600_fmt_get_nblocksy +ffffffff81c42170 T r600_cs_common_vline_parse +ffffffff81c42430 T r600_mip_minify +ffffffff81c42490 T r600_cs_parse +ffffffff81c44420 T r600_dma_cs_next_reloc +ffffffff81c444a0 T r600_dma_cs_parse +ffffffff81c44bd0 t r600_cs_track_check +ffffffff81c45d10 t r600_cs_check_reg +ffffffff81c47000 T r600_dma_get_rptr +ffffffff81c47060 T r600_dma_get_wptr +ffffffff81c470a0 T r600_dma_set_wptr +ffffffff81c470e0 T r600_dma_stop +ffffffff81c47170 T r600_dma_resume +ffffffff81c47370 T r600_dma_fini +ffffffff81c473e0 T r600_dma_is_lockup +ffffffff81c47440 T r600_dma_ring_test +ffffffff81c476a0 T r600_dma_fence_ring_emit +ffffffff81c47890 T r600_dma_semaphore_ring_emit +ffffffff81c479b0 T r600_dma_ib_test +ffffffff81c47bc0 T r600_dma_ring_ib_execute +ffffffff81c47f00 T r600_copy_dma +ffffffff81c49000 T r600_dpm_print_class_info +ffffffff81c492b0 T r600_dpm_print_cap_info +ffffffff81c49330 T r600_dpm_print_ps_status +ffffffff81c493c0 T r600_dpm_get_vblank_time +ffffffff81c49480 T r600_dpm_get_vrefresh +ffffffff81c49510 T r600_calculate_u_and_p +ffffffff81c49580 T r600_calculate_at +ffffffff81c49630 T r600_gfx_clockgating_enable +ffffffff81c49740 T r600_dynamicpm_enable +ffffffff81c497a0 T r600_enable_thermal_protection +ffffffff81c49800 T r600_enable_acpi_pm +ffffffff81c49850 T r600_enable_dynamic_pcie_gen2 +ffffffff81c498b0 T r600_dynamicpm_enabled +ffffffff81c498f0 T r600_enable_sclk_control +ffffffff81c49950 T r600_enable_mclk_control +ffffffff81c499b0 T r600_enable_spll_bypass +ffffffff81c49a10 T r600_wait_for_spll_change +ffffffff81c49a90 T r600_set_bsp +ffffffff81c49ad0 T r600_set_at +ffffffff81c49b30 T r600_set_tc +ffffffff81c49b90 T r600_select_td +ffffffff81c49c50 T r600_set_vrc +ffffffff81c49c90 T r600_set_tpu +ffffffff81c49ce0 T r600_set_tpc +ffffffff81c49d30 T r600_set_sstu +ffffffff81c49d80 T r600_set_sst +ffffffff81c49dd0 T r600_set_git +ffffffff81c49e20 T r600_set_fctu +ffffffff81c49e70 T r600_set_fct +ffffffff81c49ec0 T r600_set_ctxcgtt3d_rphc +ffffffff81c49f10 T r600_set_ctxcgtt3d_rsdc +ffffffff81c49f70 T r600_set_vddc3d_oorsu +ffffffff81c49fc0 T r600_set_vddc3d_oorphc +ffffffff81c4a010 T r600_set_vddc3d_oorsdc +ffffffff81c4a070 T r600_set_mpll_lock_time +ffffffff81c4a0c0 T r600_set_mpll_reset_time +ffffffff81c4a110 T r600_engine_clock_entry_enable +ffffffff81c4a210 T r600_engine_clock_entry_enable_pulse_skipping +ffffffff81c4a310 T r600_engine_clock_entry_enable_post_divider +ffffffff81c4a410 T r600_engine_clock_entry_set_post_divider +ffffffff81c4a4d0 T r600_engine_clock_entry_set_reference_divider +ffffffff81c4a590 T r600_engine_clock_entry_set_feedback_divider +ffffffff81c4a650 T r600_engine_clock_entry_set_step_time +ffffffff81c4a710 T r600_vid_rt_set_ssu +ffffffff81c4a760 T r600_vid_rt_set_vru +ffffffff81c4a7b0 T r600_vid_rt_set_vrt +ffffffff81c4a800 T r600_voltage_control_enable_pins +ffffffff81c4a850 T r600_voltage_control_program_voltages +ffffffff81c4a8e0 T r600_voltage_control_deactivate_static_control +ffffffff81c4a970 T r600_power_level_enable +ffffffff81c4a9e0 T r600_power_level_set_voltage_index +ffffffff81c4aa40 T r600_power_level_set_mem_clock_index +ffffffff81c4aaa0 T r600_power_level_set_eng_clock_index +ffffffff81c4ab10 T r600_power_level_set_watermark_id +ffffffff81c4ab80 T r600_power_level_set_pcie_gen2 +ffffffff81c4abe0 T r600_power_level_get_current_index +ffffffff81c4ac20 T r600_power_level_get_target_index +ffffffff81c4ac60 T r600_power_level_set_enter_index +ffffffff81c4acb0 T r600_wait_for_power_level_unequal +ffffffff81c4ad90 T r600_wait_for_power_level +ffffffff81c4ae70 T r600_start_dpm +ffffffff81c4b150 T r600_stop_dpm +ffffffff81c4b1a0 T r600_dpm_pre_set_power_state +ffffffff81c4b1d0 T r600_dpm_post_set_power_state +ffffffff81c4b200 T r600_is_uvd_state +ffffffff81c4b230 T r600_is_internal_thermal_sensor +ffffffff81c4b270 T r600_dpm_late_enable +ffffffff81c4b380 T r600_get_platform_caps +ffffffff81c4b420 T r600_parse_extended_power_table +ffffffff81c4c390 T r600_free_extended_power_table +ffffffff81c4c490 T r600_get_pcie_gen_support +ffffffff81c4c4e0 T r600_get_pcie_lane_support +ffffffff81c4c540 T r600_encode_pci_lane_width +ffffffff81c4d000 T r600_audio_update_hdmi +ffffffff81c4d170 t r600_audio_status +ffffffff81c4d290 T r600_hdmi_buffer_status_changed +ffffffff81c4d330 T r600_hdmi_update_audio_settings +ffffffff81c4d700 T r600_audio_enable +ffffffff81c4d780 T r600_audio_get_pin +ffffffff81c4d7b0 T r600_hdmi_update_acr +ffffffff81c4db50 T r600_set_avi_packet +ffffffff81c4dd40 T r600_hdmi_audio_workaround +ffffffff81c4de00 T r600_hdmi_audio_set_dto +ffffffff81c4dec0 T r600_set_vbi_packet +ffffffff81c4df70 T r600_set_audio_packet +ffffffff81c4e240 T r600_set_mute +ffffffff81c4e340 T r600_hdmi_enable +ffffffff81c4f000 T radeon_acpi_is_pcie_performance_request_supported +ffffffff81c4f040 T radeon_acpi_pcie_notify_device_ready +ffffffff81c4f170 T radeon_acpi_pcie_performance_request +ffffffff81c4f390 T radeon_acpi_init +ffffffff81c4fae0 t radeon_acpi_event +ffffffff81c4fe30 T radeon_acpi_fini +ffffffff81c50000 T radeon_agp_head_init +ffffffff81c50050 T radeon_agp_init +ffffffff81c500a0 T radeon_agp_resume +ffffffff81c50140 T radeon_agp_fini +ffffffff81c50190 T radeon_agp_suspend +ffffffff81c51000 T radeon_agp_disable +ffffffff81c51110 T radeon_asic_init +ffffffff81c519a0 t radeon_invalid_rreg +ffffffff81c519e0 t radeon_invalid_wreg +ffffffff81c51a20 t radeon_invalid_get_allowed_info_register +ffffffff81c52000 T radeon_atombios_i2c_init +ffffffff81c523a0 T radeon_atombios_lookup_gpio +ffffffff81c524a0 T radeon_get_atom_connector_info_from_object_table +ffffffff81c52e00 t radeon_lookup_i2c_gpio +ffffffff81c53100 t radeon_atom_apply_quirks +ffffffff81c53530 T radeon_get_atom_connector_info_from_supported_devices_table +ffffffff81c53a30 T radeon_atom_get_clock_info +ffffffff81c53db0 T radeon_atombios_sideport_present +ffffffff81c53e60 T radeon_atombios_get_tmds_info +ffffffff81c53fa0 T radeon_atombios_get_ppll_ss_info +ffffffff81c540c0 T radeon_atombios_get_asic_ss_info +ffffffff81c54430 T radeon_atombios_get_lvds_info +ffffffff81c54790 T radeon_atombios_get_primary_dac_info +ffffffff81c54840 T radeon_atom_get_tv_timings +ffffffff81c54a80 T radeon_atombios_get_tv_info +ffffffff81c54b30 T radeon_atombios_get_tv_dac_info +ffffffff81c54c30 T radeon_atombios_get_default_voltages +ffffffff81c54cf0 T radeon_atombios_get_power_modes +ffffffff81c55dc0 T radeon_atom_get_clock_dividers +ffffffff81c560b0 T radeon_atom_get_memory_pll_dividers +ffffffff81c561f0 T radeon_atom_set_clock_gating +ffffffff81c56240 T radeon_atom_get_engine_clock +ffffffff81c56290 T radeon_atom_get_memory_clock +ffffffff81c562e0 T radeon_atom_set_engine_clock +ffffffff81c56330 T radeon_atom_set_memory_clock +ffffffff81c56380 T radeon_atom_set_engine_dram_timings +ffffffff81c563f0 T radeon_atom_update_memory_dll +ffffffff81c56440 T radeon_atom_set_ac_timing +ffffffff81c56490 T radeon_atom_set_voltage +ffffffff81c56560 T radeon_atom_get_max_vddc +ffffffff81c56630 T radeon_atom_get_leakage_vddc_based_on_leakage_idx +ffffffff81c56700 T radeon_atom_get_leakage_id_from_vbios +ffffffff81c567c0 T radeon_atom_get_leakage_vddc_based_on_leakage_params +ffffffff81c569d0 T radeon_atom_get_voltage_evv +ffffffff81c56a80 T radeon_atom_get_voltage_gpio_settings +ffffffff81c56b80 T radeon_atom_is_voltage_gpio +ffffffff81c56d10 T radeon_atom_get_svi2_info +ffffffff81c56df0 T radeon_atom_get_max_voltage +ffffffff81c56f80 T radeon_atom_get_min_voltage +ffffffff81c570c0 T radeon_atom_get_voltage_step +ffffffff81c571b0 T radeon_atom_round_to_true_voltage +ffffffff81c57320 T radeon_atom_get_voltage_table +ffffffff81c57590 T radeon_atom_get_memory_info +ffffffff81c57740 T radeon_atom_get_mclk_range_table +ffffffff81c57990 T radeon_atom_init_mc_reg_table +ffffffff81c57c00 T radeon_atom_initialize_bios_scratch_regs +ffffffff81c57cd0 T radeon_save_bios_scratch_regs +ffffffff81c57db0 T radeon_restore_bios_scratch_regs +ffffffff81c57e90 T radeon_atom_output_lock +ffffffff81c57f20 T radeon_atombios_connected_scratch_regs +ffffffff81c586a0 T radeon_atombios_encoder_crtc_scratch_regs +ffffffff81c587e0 T radeon_atombios_encoder_dpms_scratch_regs +ffffffff81c589f0 t radeon_atombios_parse_misc_flags_1_3 +ffffffff81c58be0 t radeon_atombios_add_pplib_thermal_controller +ffffffff81c58fe0 t radeon_atombios_parse_pplib_clock_info +ffffffff81c592f0 t radeon_atombios_parse_pplib_non_clock_info +ffffffff81c5a000 T radeon_audio_init +ffffffff81c5a280 T radeon_audio_endpoint_rreg +ffffffff81c5a2c0 T radeon_audio_endpoint_wreg +ffffffff81c5a300 T radeon_audio_get_pin +ffffffff81c5a350 T radeon_audio_detect +ffffffff81c5a680 T radeon_audio_fini +ffffffff81c5a7b0 T radeon_audio_mode_set +ffffffff81c5a7f0 T radeon_audio_dpms +ffffffff81c5a840 T radeon_audio_decode_dfs_div +ffffffff81c5a8a0 t radeon_audio_hdmi_mode_set +ffffffff81c5afd0 t radeon_audio_write_speaker_allocation +ffffffff81c5b080 t radeon_audio_write_sad_regs +ffffffff81c5b150 t radeon_audio_set_avi_packet +ffffffff81c5b290 t radeon_audio_dp_mode_set +ffffffff81c5b410 t radeon_audio_rreg +ffffffff81c5b460 t radeon_audio_wreg +ffffffff81c5c000 T radeon_benchmark +ffffffff81c5c940 t radeon_benchmark_move +ffffffff81c5ce00 t radeon_bo_reserve +ffffffff81c5cf80 t radeon_bo_unreserve +ffffffff81c5e000 T radeon_get_bios +ffffffff81c5f000 t igp_read_bios_from_vram +ffffffff81c5f110 t radeon_read_bios +ffffffff81c60000 T radeon_legacy_get_engine_clock +ffffffff81c600d0 T radeon_legacy_get_memory_clock +ffffffff81c601a0 T radeon_get_clock_info +ffffffff81c60720 T radeon_legacy_set_engine_clock +ffffffff81c60a70 T radeon_legacy_set_clock_gating +ffffffff81c62000 T radeon_combios_check_hardcoded_edid +ffffffff81c62100 T radeon_bios_get_hardcoded_edid +ffffffff81c62180 T radeon_combios_i2c_init +ffffffff81c62940 t combios_setup_i2c_bus +ffffffff81c62c40 T radeon_combios_get_clock_info +ffffffff81c62e30 T radeon_combios_sideport_present +ffffffff81c62eb0 T radeon_combios_get_primary_dac_info +ffffffff81c62ff0 T radeon_combios_get_tv_info +ffffffff81c630f0 T radeon_combios_get_tv_dac_info +ffffffff81c63390 T radeon_combios_get_lvds_info +ffffffff81c639e0 T radeon_legacy_get_tmds_info_from_table +ffffffff81c63ab0 T radeon_legacy_get_tmds_info_from_combios +ffffffff81c63cb0 T radeon_legacy_get_ext_tmds_info_from_table +ffffffff81c63ef0 T radeon_legacy_get_ext_tmds_info_from_combios +ffffffff81c64280 T radeon_get_legacy_connector_info_from_table +ffffffff81c66640 T radeon_get_legacy_connector_info_from_bios +ffffffff81c673d0 T radeon_combios_get_power_modes +ffffffff81c67c80 T radeon_external_tmds_setup +ffffffff81c67d40 T radeon_combios_external_tmds_setup +ffffffff81c682f0 T radeon_combios_asic_init +ffffffff81c68910 t combios_parse_mmio_table +ffffffff81c68b30 t combios_parse_pll_table +ffffffff81c68e00 T radeon_combios_initialize_bios_scratch_regs +ffffffff81c68e90 T radeon_combios_output_lock +ffffffff81c68ee0 T radeon_combios_connected_scratch_regs +ffffffff81c69240 T radeon_combios_encoder_crtc_scratch_regs +ffffffff81c69310 T radeon_combios_encoder_dpms_scratch_regs +ffffffff81c6a000 T radeon_connector_hotplug +ffffffff81c6a100 T radeon_get_monitor_bpc +ffffffff81c6a530 T radeon_connector_edid +ffffffff81c6a5e0 T radeon_connector_encoder_get_dp_bridge_encoder_id +ffffffff81c6a650 T radeon_connector_is_dp12_capable +ffffffff81c6a6f0 T radeon_add_atom_connector +ffffffff81c6b540 T radeon_add_legacy_connector +ffffffff81c6ba80 t radeon_dp_detect +ffffffff81c6be40 t radeon_dvi_force +ffffffff81c6be80 t radeon_connector_set_property +ffffffff81c6c6c0 t radeon_connector_unregister +ffffffff81c6c720 t radeon_connector_destroy +ffffffff81c6c790 t radeon_best_single_encoder +ffffffff81c6c810 t radeon_connector_get_edid +ffffffff81c6c970 t radeon_dp_get_modes +ffffffff81c6cca0 t radeon_dp_mode_valid +ffffffff81c6ce60 t radeon_dvi_encoder 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+ffffffff81c70590 t cmp_size_smaller_first +ffffffff81c71000 T radeon_crtc_cursor_move +ffffffff81c71070 t radeon_lock_cursor +ffffffff81c71230 t radeon_cursor_move_locked +ffffffff81c71780 T radeon_crtc_cursor_set2 +ffffffff81c71a00 t radeon_hide_cursor +ffffffff81c71ac0 t radeon_bo_reserve +ffffffff81c71c40 t radeon_bo_unreserve +ffffffff81c71d20 t radeon_show_cursor +ffffffff81c71f70 T radeon_cursor_reset +ffffffff81c72000 T radeon_is_px +ffffffff81c72040 T radeon_program_register_sequence +ffffffff81c72170 T radeon_pci_config_reset +ffffffff81c721a0 T radeon_surface_init +ffffffff81c72360 T radeon_scratch_init +ffffffff81c723e0 T radeon_scratch_get +ffffffff81c72460 T radeon_scratch_free +ffffffff81c724b0 T radeon_doorbell_get +ffffffff81c72550 T radeon_doorbell_free +ffffffff81c72590 T radeon_wb_disable +ffffffff81c725c0 T radeon_wb_fini +ffffffff81c72650 t radeon_bo_reserve +ffffffff81c727d0 t radeon_bo_unreserve +ffffffff81c728b0 T radeon_wb_init +ffffffff81c72ba0 T radeon_vram_location +ffffffff81c72cd0 T radeon_gtt_location +ffffffff81c72e00 T radeon_device_is_virtual +ffffffff81c72e30 T radeon_card_posted +ffffffff81c73040 T radeon_update_bandwidth_info +ffffffff81c730c0 T radeon_boot_test_post_card +ffffffff81c73180 T radeon_dummy_page_init +ffffffff81c73230 T radeon_dummy_page_fini +ffffffff81c73290 T radeon_atombios_init +ffffffff81c73420 t cail_reg_read +ffffffff81c73480 t cail_reg_write +ffffffff81c734e0 t cail_ioreg_read +ffffffff81c73500 t cail_ioreg_write +ffffffff81c73520 t cail_mc_read +ffffffff81c73540 t cail_mc_write +ffffffff81c73560 t cail_pll_read +ffffffff81c73580 t cail_pll_write +ffffffff81c735a0 T radeon_atombios_fini +ffffffff81c73630 T radeon_combios_init +ffffffff81c73670 T radeon_combios_fini +ffffffff81c736a0 T radeon_device_init +ffffffff81c74180 T radeon_device_fini +ffffffff81c74280 T radeon_suspend_kms +ffffffff81c745f0 T radeon_resume_kms +ffffffff81c74840 T radeon_gpu_reset +ffffffff81c75000 T radeon_crtc_load_lut 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radeondrm_attach_kms +ffffffff81c7a7a0 T radeondrm_detach_kms +ffffffff81c7a830 T radeondrm_activate_kms +ffffffff81c7a8e0 T radeondrm_wsioctl +ffffffff81c7a990 T radeondrm_wsmmap +ffffffff81c7a9c0 T radeondrm_alloc_screen +ffffffff81c7a9e0 T radeondrm_free_screen +ffffffff81c7a9f0 T radeondrm_show_screen +ffffffff81c7aad0 T radeondrm_enter_ddb +ffffffff81c7ab30 T radeondrm_doswitch +ffffffff81c7abc0 T radeondrm_setpal +ffffffff81c7adc0 T radeondrm_attachhook +ffffffff81c7b0f0 T radeondrm_forcedetach +ffffffff81c7c000 T radeon_setup_encoder_clones +ffffffff81c7c0b0 T radeon_get_encoder_enum +ffffffff81c7c230 T radeon_link_encoder_connector +ffffffff81c7c370 T radeon_encoder_set_active_device +ffffffff81c7c430 T radeon_get_connector_for_encoder +ffffffff81c7c4b0 T radeon_get_connector_for_encoder_init +ffffffff81c7c530 T radeon_get_external_encoder +ffffffff81c7c5b0 T radeon_encoder_get_dp_bridge_encoder_id +ffffffff81c7c640 T radeon_panel_mode_fixup +ffffffff81c7c800 T radeon_dig_monitor_is_duallink +ffffffff81c7c920 T radeon_encoder_is_digital +ffffffff81c7d000 T radeon_align_pitch +ffffffff81c7d080 T radeon_fbdev_init +ffffffff81c7d1d0 T radeondrm_burner_cb +ffffffff81c7d1f0 T radeon_fbdev_fini +ffffffff81c7d260 T radeon_fbdev_set_suspend +ffffffff81c7d2a0 T radeon_fbdev_robj_is_fb +ffffffff81c7d2f0 T radeondrm_burner +ffffffff81c7d370 t radeonfb_create +ffffffff81c7d770 t radeon_bo_reserve +ffffffff81c7d8f0 t radeon_bo_unreserve +ffffffff81c7e000 T radeon_fence_emit +ffffffff81c7e120 T radeon_fence_process +ffffffff81c7e1f0 t radeon_fence_activity +ffffffff81c7e390 T radeon_fence_signaled +ffffffff81c7e420 T radeon_fence_wait_timeout +ffffffff81c7e560 t radeon_fence_wait_seq_timeout +ffffffff81c7e980 T radeon_fence_wait +ffffffff81c7eab0 T radeon_fence_wait_any +ffffffff81c7ec00 T radeon_fence_wait_next +ffffffff81c7ecc0 T radeon_fence_wait_empty +ffffffff81c7edd0 T radeon_fence_ref +ffffffff81c7ee10 T radeon_fence_unref +ffffffff81c7ee50 T radeon_fence_count_emitted +ffffffff81c7eed0 T radeon_fence_need_sync +ffffffff81c7ef20 T radeon_fence_note_sync +ffffffff81c7f0f0 T radeon_fence_driver_start_ring +ffffffff81c7f2d0 T radeon_fence_driver_init +ffffffff81c7f410 T radeon_debugfs_fence_init +ffffffff81c7f440 T radeon_fence_driver_fini +ffffffff81c7f690 T radeon_fence_driver_force_completion +ffffffff81c7f790 t radeon_fence_get_driver_name +ffffffff81c7f7c0 t radeon_fence_get_timeline_name +ffffffff81c7f850 t radeon_fence_enable_signaling +ffffffff81c7fa60 t radeon_fence_is_signaled +ffffffff81c7fb20 t radeon_fence_default_wait +ffffffff81c7fcc0 t radeon_fence_any_seq_signaled +ffffffff81c7fec0 t radeon_fence_check_lockup +ffffffff81c80110 t __delayed_work_tick +ffffffff81c80130 t radeon_fence_check_signaled +ffffffff81c801c0 t radeon_fence_wait_cb +ffffffff81c81000 T radeon_gart_table_ram_alloc +ffffffff81c810c0 T radeon_gart_table_ram_free +ffffffff81c81120 T radeon_gart_table_vram_alloc +ffffffff81c81190 T radeon_gart_table_vram_pin +ffffffff81c812d0 t radeon_bo_reserve +ffffffff81c81450 t radeon_bo_unreserve +ffffffff81c81530 T radeon_gart_table_vram_unpin +ffffffff81c815b0 T radeon_gart_table_vram_free +ffffffff81c815f0 T radeon_gart_unbind +ffffffff81c81710 T radeon_gart_bind +ffffffff81c81860 T radeon_gart_init +ffffffff81c81990 T radeon_gart_fini +ffffffff81c82000 T radeon_gem_fault +ffffffff81c82180 T radeon_gem_vm_reference +ffffffff81c821b0 T radeon_gem_vm_detach +ffffffff81c821c0 T radeon_gem_object_create +ffffffff81c82380 T radeon_gem_init +ffffffff81c823c0 T radeon_gem_fini +ffffffff81c823d0 t radeon_gem_object_free +ffffffff81c82410 t radeon_gem_object_open +ffffffff81c824b0 t radeon_gem_object_close +ffffffff81c825a0 t radeon_gem_object_mmap +ffffffff81c82630 T radeon_gem_info_ioctl +ffffffff81c826a0 T radeon_gem_pread_ioctl +ffffffff81c826f0 T radeon_gem_pwrite_ioctl +ffffffff81c82740 T radeon_gem_create_ioctl +ffffffff81c82860 T radeon_gem_userptr_ioctl +ffffffff81c82890 T radeon_gem_set_domain_ioctl +ffffffff81c829f0 T radeon_mode_dumb_mmap +ffffffff81c82aa0 T radeon_gem_mmap_ioctl +ffffffff81c82b50 T radeon_gem_busy_ioctl +ffffffff81c82c00 T radeon_gem_wait_idle_ioctl +ffffffff81c82d10 T radeon_gem_set_tiling_ioctl +ffffffff81c82dc0 T radeon_gem_get_tiling_ioctl +ffffffff81c82e90 t radeon_bo_reserve +ffffffff81c830a0 t radeon_bo_unreserve +ffffffff81c83180 T radeon_gem_va_ioctl +ffffffff81c83540 T radeon_gem_op_ioctl +ffffffff81c83630 T radeon_mode_dumb_create +ffffffff81c83730 T radeon_gem_debugfs_init +ffffffff81c84000 T radeon_ddc_probe +ffffffff81c840c0 T radeon_router_select_ddc_port +ffffffff81c84320 T radeon_bb_set_bits +ffffffff81c84490 T radeon_bb_set_dir +ffffffff81c844c0 T radeon_bb_read_bits +ffffffff81c84590 T radeon_acquire_bus +ffffffff81c849e0 T radeon_release_bus +ffffffff81c84b50 T radeon_send_start +ffffffff81c84b70 T radeon_send_stop +ffffffff81c84b90 T radeon_initiate_xfer +ffffffff81c84bb0 T radeon_read_byte +ffffffff81c84bd0 T radeon_write_byte +ffffffff81c84bf0 T radeon_i2c_create +ffffffff81c84df0 T radeon_i2c_destroy +ffffffff81c84e70 T radeon_i2c_init +ffffffff81c84ec0 T radeon_i2c_fini +ffffffff81c84f70 T radeon_i2c_add +ffffffff81c85120 T radeon_i2c_lookup +ffffffff81c852e0 T radeon_i2c_get_byte +ffffffff81c853a0 T radeon_i2c_put_byte +ffffffff81c85430 T radeon_router_select_cd_port +ffffffff81c85690 t radeon_hw_i2c_xfer +ffffffff81c86250 t radeon_hw_i2c_func +ffffffff81c86280 t r100_hw_i2c_xfer +ffffffff81c86960 t radeon_get_i2c_prescale +ffffffff81c87000 T radeon_ib_get +ffffffff81c87100 T radeon_ib_free +ffffffff81c87150 T radeon_ib_schedule +ffffffff81c873e0 T radeon_ib_pool_init +ffffffff81c87470 T radeon_ib_pool_fini +ffffffff81c874e0 T radeon_ib_ring_tests +ffffffff81c88000 T radeon_driver_irq_handler_kms +ffffffff81c88050 T radeon_msi_ok +ffffffff81c88150 T radeon_irq_kms_init +ffffffff81c883e0 t radeon_hotplug_work_func +ffffffff81c88480 t radeon_dp_work_func +ffffffff81c884b0 T radeon_irq_kms_fini +ffffffff81c88640 T radeon_irq_kms_sw_irq_get +ffffffff81c886e0 T radeon_irq_kms_sw_irq_get_delayed +ffffffff81c88720 T radeon_irq_kms_sw_irq_put +ffffffff81c887b0 T radeon_irq_kms_pflip_irq_get +ffffffff81c88860 T radeon_irq_kms_pflip_irq_put +ffffffff81c88900 T radeon_irq_kms_enable_afmt +ffffffff81c88990 T radeon_irq_kms_disable_afmt +ffffffff81c88a20 T radeon_irq_kms_enable_hpd +ffffffff81c88b00 T radeon_irq_kms_disable_hpd +ffffffff81c88bd0 T radeon_irq_kms_set_irq_n_enabled +ffffffff81c88d40 t __delayed_work_tick +ffffffff81c89000 T radeon_info_ioctl +ffffffff81c89be0 T radeon_driver_lastclose_kms +ffffffff81c89bf0 T radeon_driver_open_kms +ffffffff81c89d20 t radeon_bo_reserve +ffffffff81c89ea0 T radeon_driver_postclose_kms +ffffffff81c8a0c0 T radeon_get_vblank_counter_kms +ffffffff81c8a250 T radeon_enable_vblank_kms +ffffffff81c8a2f0 T radeon_disable_vblank_kms +ffffffff81c8b000 T radeon_crtc_set_base +ffffffff81c8b020 T radeon_crtc_do_set_base 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radeon_legacy_lvds_commit +ffffffff81c8ec70 t radeon_legacy_lvds_mode_set +ffffffff81c8ee80 t radeon_legacy_encoder_disable +ffffffff81c8eed0 t radeon_legacy_tmds_int_dpms +ffffffff81c8ef90 t radeon_legacy_tmds_int_prepare +ffffffff81c8f050 t radeon_legacy_tmds_int_commit +ffffffff81c8f120 t radeon_legacy_tmds_int_mode_set +ffffffff81c8f380 t radeon_legacy_primary_dac_dpms +ffffffff81c8f4b0 t radeon_legacy_primary_dac_prepare +ffffffff81c8f500 t radeon_legacy_primary_dac_commit +ffffffff81c8f550 t radeon_legacy_primary_dac_mode_set +ffffffff81c8f6f0 t radeon_legacy_primary_dac_detect +ffffffff81c8f8e0 t radeon_legacy_tv_dac_dpms +ffffffff81c8fad0 t radeon_legacy_tv_dac_prepare +ffffffff81c8fb20 t radeon_legacy_tv_dac_commit +ffffffff81c8fb70 t radeon_legacy_tv_dac_mode_set +ffffffff81c8ff10 t radeon_legacy_tv_dac_detect +ffffffff81c90b30 t radeon_ext_tmds_enc_destroy +ffffffff81c90b70 t radeon_legacy_tmds_ext_dpms +ffffffff81c90c40 t radeon_legacy_tmds_ext_prepare +ffffffff81c90d10 t radeon_legacy_tmds_ext_commit +ffffffff81c90de0 t radeon_legacy_tmds_ext_mode_set +ffffffff81c91000 T radeon_legacy_tv_mode_set +ffffffff81c920a0 T radeon_legacy_tv_adjust_crtc_reg +ffffffff81c921b0 T radeon_legacy_tv_adjust_pll1 +ffffffff81c922a0 T radeon_legacy_tv_adjust_pll2 +ffffffff81c93000 T radeon_ttm_bo_is_radeon_bo +ffffffff81c93040 t radeon_ttm_bo_destroy +ffffffff81c93170 T radeon_ttm_placement_from_domain +ffffffff81c932e0 T radeon_bo_create +ffffffff81c934a0 T radeon_bo_kmap +ffffffff81c93580 T radeon_bo_check_tiling +ffffffff81c93650 T radeon_bo_kunmap +ffffffff81c936d0 T radeon_bo_ref +ffffffff81c93710 T radeon_bo_unref +ffffffff81c93760 T radeon_bo_pin_restricted +ffffffff81c93a90 T radeon_bo_pin +ffffffff81c93ab0 T radeon_bo_unpin +ffffffff81c93b20 T radeon_bo_evict_vram +ffffffff81c93b70 T radeon_bo_force_delete +ffffffff81c93ce0 T radeon_bo_init +ffffffff81c93dc0 T radeon_bo_fini +ffffffff81c93e00 T radeon_bo_list_validate +ffffffff81c940f0 T radeon_bo_get_surface_reg +ffffffff81c94390 T radeon_bo_set_tiling_flags +ffffffff81c946b0 T radeon_bo_get_tiling_flags +ffffffff81c946f0 T radeon_bo_move_notify +ffffffff81c947b0 T radeon_bo_fault_reserve_notify +ffffffff81c94ab0 T radeon_bo_fence +ffffffff81c95000 T radeon_pm_get_type_index +ffffffff81c95070 T radeon_pm_acpi_event_handler +ffffffff81c95150 t radeon_pm_update_profile +ffffffff81c95270 t radeon_pm_set_clocks +ffffffff81c95c10 T radeon_dpm_enable_uvd +ffffffff81c95cd0 T radeon_pm_compute_clocks +ffffffff81c96700 T radeon_dpm_enable_vce +ffffffff81c96760 T radeon_pm_suspend +ffffffff81c96860 T radeon_pm_resume +ffffffff81c96b40 T radeon_pm_init +ffffffff81c97230 T radeon_pm_late_init +ffffffff81c972e0 T radeon_pm_fini +ffffffff81c973f0 t radeon_dpm_thermal_work_handler +ffffffff81c974d0 t radeon_dynpm_idle_work_handler +ffffffff81c977c0 t __delayed_work_tick +ffffffff81c98000 T radeon_gem_prime_get_sg_table +ffffffff81c98020 T radeon_gem_prime_pin +ffffffff81c980a0 t radeon_bo_reserve +ffffffff81c98220 t radeon_bo_unreserve +ffffffff81c98300 T radeon_gem_prime_unpin +ffffffff81c98370 T radeon_gem_prime_export +ffffffff81c99000 T radeon_ring_supports_scratch_reg +ffffffff81c99030 T radeon_ring_free_size +ffffffff81c990d0 T radeon_ring_lockup_update +ffffffff81c99130 T radeon_ring_alloc +ffffffff81c992b0 T radeon_ring_lock +ffffffff81c99330 T radeon_ring_commit +ffffffff81c99430 T radeon_ring_unlock_commit +ffffffff81c99460 T radeon_ring_undo +ffffffff81c99490 T radeon_ring_unlock_undo +ffffffff81c994b0 T radeon_ring_test_lockup +ffffffff81c995d0 T radeon_ring_backup +ffffffff81c99790 T radeon_ring_restore +ffffffff81c99950 T radeon_ring_init +ffffffff81c99b40 t radeon_bo_reserve +ffffffff81c99cc0 t radeon_bo_unreserve +ffffffff81c99da0 T radeon_ring_fini +ffffffff81c9a000 T radeon_sa_bo_manager_init +ffffffff81c9a190 T radeon_sa_bo_manager_fini +ffffffff81c9a370 T radeon_sa_bo_manager_start +ffffffff81c9a4a0 t radeon_bo_reserve +ffffffff81c9a620 t radeon_bo_unreserve +ffffffff81c9a700 T radeon_sa_bo_manager_suspend +ffffffff81c9a7a0 T radeon_sa_bo_new +ffffffff81c9afd0 T radeon_sa_bo_free +ffffffff81c9c000 T radeon_semaphore_create +ffffffff81c9c0e0 T radeon_semaphore_emit_signal +ffffffff81c9c160 T radeon_semaphore_emit_wait +ffffffff81c9c1f0 T radeon_semaphore_free +ffffffff81c9d000 T radeon_sync_create +ffffffff81c9d090 T radeon_sync_fence +ffffffff81c9d130 T radeon_sync_resv +ffffffff81c9d260 T radeon_sync_rings +ffffffff81c9d420 T radeon_sync_free +ffffffff81c9e000 T radeon_test_moves +ffffffff81c9e070 t radeon_do_test_moves +ffffffff81c9e660 T radeon_test_ring_sync +ffffffff81c9e920 t radeon_test_create_and_emit_fence +ffffffff81c9ea90 T radeon_test_syncing +ffffffff81c9ed50 t radeon_test_ring_sync2 +ffffffff81c9f0c0 t radeon_bo_reserve +ffffffff81c9f240 t radeon_bo_unreserve +ffffffff81ca0000 T radeon_get_rdev +ffffffff81ca0030 T radeon_ttm_tt_set_userptr +ffffffff81ca0080 T radeon_ttm_tt_is_bound +ffffffff81ca00c0 T radeon_ttm_tt_has_userptr +ffffffff81ca0100 T radeon_ttm_tt_is_readonly +ffffffff81ca0140 T radeon_ttm_init +ffffffff81ca0350 T radeon_ttm_set_active_vram_size +ffffffff81ca0390 t radeon_bo_reserve +ffffffff81ca0510 t radeon_bo_unreserve +ffffffff81ca05f0 T radeon_ttm_fini +ffffffff81ca06c0 t radeon_ttm_tt_create +ffffffff81ca07b0 t radeon_ttm_tt_populate +ffffffff81ca0860 t radeon_ttm_tt_unpopulate +ffffffff81ca0950 t radeon_ttm_tt_destroy +ffffffff81ca09a0 t radeon_evict_flags +ffffffff81ca0af0 t radeon_bo_move +ffffffff81ca0f70 t radeon_ttm_io_mem_reserve +ffffffff81ca2000 T radeon_ucode_print_mc_hdr +ffffffff81ca20b0 t radeon_ucode_print_common_hdr +ffffffff81ca21e0 T radeon_ucode_print_smc_hdr +ffffffff81ca2270 T radeon_ucode_print_gfx_hdr +ffffffff81ca2330 T radeon_ucode_print_rlc_hdr +ffffffff81ca2430 T radeon_ucode_print_sdma_hdr +ffffffff81ca2510 T radeon_ucode_validate +ffffffff81ca3000 T radeon_uvd_init +ffffffff81ca34f0 t radeon_uvd_idle_work_handler +ffffffff81ca3650 t radeon_bo_reserve +ffffffff81ca3860 t radeon_bo_unreserve +ffffffff81ca3940 T radeon_uvd_fini +ffffffff81ca3a00 T radeon_uvd_suspend +ffffffff81ca3bc0 T radeon_uvd_note_usage +ffffffff81ca3e00 T radeon_uvd_get_destroy_msg +ffffffff81ca3f10 T radeon_uvd_resume +ffffffff81ca3fa0 T radeon_uvd_force_into_uvd_segment +ffffffff81ca4040 T radeon_uvd_free_handles +ffffffff81ca4200 T radeon_uvd_cs_parse +ffffffff81ca4920 T radeon_uvd_get_create_msg +ffffffff81ca4a90 t radeon_uvd_send_msg +ffffffff81ca4c30 T radeon_uvd_calc_upll_dividers +ffffffff81ca4dd0 T radeon_uvd_send_upll_ctlreq +ffffffff81ca5100 t __delayed_work_tick +ffffffff81ca6000 T radeon_vce_init +ffffffff81ca6600 t radeon_vce_idle_work_handler +ffffffff81ca66d0 t radeon_bo_reserve +ffffffff81ca6850 t radeon_bo_unreserve +ffffffff81ca6930 T radeon_vce_fini +ffffffff81ca69b0 T radeon_vce_suspend +ffffffff81ca6a90 T radeon_vce_resume +ffffffff81ca6be0 T radeon_vce_note_usage +ffffffff81ca6d00 T radeon_vce_free_handles +ffffffff81ca6dc0 T radeon_vce_get_destroy_msg +ffffffff81ca7060 T radeon_vce_get_create_msg +ffffffff81ca7420 T radeon_vce_cs_reloc +ffffffff81ca7510 T radeon_vce_cs_parse +ffffffff81ca7d40 T radeon_vce_semaphore_emit +ffffffff81ca7f00 T radeon_vce_ib_execute +ffffffff81ca80a0 T radeon_vce_fence_emit +ffffffff81ca82e0 T radeon_vce_ring_test +ffffffff81ca8420 T radeon_vce_ib_test +ffffffff81ca8530 t __delayed_work_tick +ffffffff81ca9000 T radeon_vm_manager_init +ffffffff81ca9060 T radeon_vm_manager_fini +ffffffff81ca9180 T radeon_vm_get_bos +ffffffff81ca92b0 T radeon_vm_grab_id +ffffffff81ca9440 T radeon_vm_flush +ffffffff81ca95c0 T radeon_vm_fence +ffffffff81ca9670 T radeon_vm_bo_find +ffffffff81ca96d0 T radeon_vm_bo_add +ffffffff81ca97b0 T radeon_vm_bo_set_addr +ffffffff81ca9c10 t radeon_bo_unreserve +ffffffff81ca9cf0 t radeon_vm_clear_bo +ffffffff81ca9ee0 T radeon_vm_map_gart +ffffffff81ca9f20 T radeon_vm_update_page_directory +ffffffff81caa2c0 T radeon_vm_bo_update +ffffffff81caa9a0 T radeon_vm_clear_freed +ffffffff81caaa80 T radeon_vm_clear_invalids +ffffffff81caab20 T radeon_vm_bo_rmv +ffffffff81caac00 T radeon_vm_bo_invalidate +ffffffff81caacb0 T radeon_vm_init +ffffffff81caaf10 T radeon_vm_fini +ffffffff81cab1e0 t radeon_bo_reserve +ffffffff81cab360 t radeon_vm_frag_ptes +ffffffff81cac000 T rs400_gart_adjust_size +ffffffff81cac0c0 T rs400_gart_tlb_flush +ffffffff81cac140 T rs400_gart_init +ffffffff81cac230 T rs400_gart_enable +ffffffff81cac590 T rs400_gart_disable +ffffffff81cac5f0 T rs400_gart_fini +ffffffff81cac660 T rs400_gart_get_page_entry +ffffffff81cac6c0 T rs400_gart_set_page +ffffffff81cac6f0 T rs400_mc_wait_for_idle +ffffffff81cac780 T rs400_mc_rreg +ffffffff81cac810 T rs400_mc_wreg +ffffffff81cac890 T rs400_resume +ffffffff81cac9c0 t rs400_mc_program +ffffffff81cacac0 t rs400_startup +ffffffff81caccb0 T rs400_suspend +ffffffff81cacd40 T rs400_fini +ffffffff81cace30 T rs400_init +ffffffff81cae000 T avivo_wait_for_vblank +ffffffff81cae280 T rs600_page_flip +ffffffff81cae540 T rs600_page_flip_pending +ffffffff81cae5b0 T avivo_program_fmt +ffffffff81cae6d0 T rs600_pm_misc +ffffffff81caea10 T rs600_pm_prepare +ffffffff81caeb10 T rs600_pm_finish +ffffffff81caec10 T rs600_hpd_sense +ffffffff81caec70 T rs600_hpd_set_polarity +ffffffff81caed20 T rs600_hpd_init +ffffffff81caee00 T rs600_hpd_fini +ffffffff81caeea0 T rs600_asic_reset +ffffffff81caf110 T rs600_gart_tlb_flush +ffffffff81caf1d0 T rs600_gart_get_page_entry +ffffffff81caf230 T rs600_gart_set_page +ffffffff81caf270 T rs600_irq_set +ffffffff81caf440 T rs600_irq_disable +ffffffff81caf4c0 t rs600_irq_ack +ffffffff81caf670 T rs600_irq_process +ffffffff81caf9e0 T rs600_get_vblank_counter +ffffffff81cafa30 T rs600_mc_wait_for_idle +ffffffff81cafac0 T rs600_bandwidth_update +ffffffff81cafbb0 T rs600_mc_rreg +ffffffff81cafc30 T rs600_mc_wreg +ffffffff81cafc90 T rs600_set_safe_registers +ffffffff81cafcd0 T rs600_resume +ffffffff81cafe00 t rs600_startup +ffffffff81cb0640 T rs600_suspend +ffffffff81cb0740 T rs600_fini +ffffffff81cb0840 T rs600_init +ffffffff81cb1000 T rs690_mc_wait_for_idle +ffffffff81cb1090 T rs690_pm_info +ffffffff81cb1320 T rs690_line_buffer_adjust +ffffffff81cb1420 T rs690_bandwidth_update +ffffffff81cb1740 t rs690_crtc_bandwidth_compute +ffffffff81cb1b70 t rs690_compute_mode_priority +ffffffff81cb1ff0 T rs690_mc_rreg +ffffffff81cb2080 T rs690_mc_wreg +ffffffff81cb2100 T rs690_resume +ffffffff81cb21f0 t rs690_startup +ffffffff81cb24e0 T rs690_suspend +ffffffff81cb2540 T rs690_fini +ffffffff81cb25e0 T rs690_init +ffffffff81cb3000 T rs780_dpm_enable +ffffffff81cb3bd0 T rs780_dpm_disable +ffffffff81cb3cb0 T rs780_dpm_set_power_state +ffffffff81cb4090 t rs780_force_voltage +ffffffff81cb41d0 t rs780_enable_voltage_scaling +ffffffff81cb4380 T rs780_dpm_setup_asic +ffffffff81cb43b0 T rs780_dpm_display_configuration_changed +ffffffff81cb44f0 T rs780_dpm_init +ffffffff81cb4a50 T rs780_dpm_print_power_state +ffffffff81cb4ae0 T rs780_dpm_fini +ffffffff81cb4b70 T rs780_dpm_get_sclk +ffffffff81cb4bb0 T rs780_dpm_get_mclk +ffffffff81cb4be0 T rs780_dpm_debugfs_print_current_performance_level +ffffffff81cb4c10 T rs780_dpm_get_current_sclk +ffffffff81cb4c90 T rs780_dpm_get_current_mclk +ffffffff81cb4cc0 T rs780_dpm_force_performance_level +ffffffff81cb4ea0 t rs780_force_fbdiv +ffffffff81cb5000 T rv515_ring_start +ffffffff81cb5b30 T rv515_mc_wait_for_idle +ffffffff81cb5bc0 T rv515_vga_render_disable +ffffffff81cb5c10 T rv515_mc_rreg +ffffffff81cb5ca0 T rv515_mc_wreg +ffffffff81cb5d20 T rv515_debugfs +ffffffff81cb5d30 T rv515_mc_stop +ffffffff81cb62c0 T rv515_mc_resume +ffffffff81cb68c0 T rv515_clock_startup +ffffffff81cb6980 T rv515_resume +ffffffff81cb6bc0 t rv515_startup +ffffffff81cb70a0 T rv515_suspend +ffffffff81cb7100 T rv515_set_safe_registers +ffffffff81cb7140 T rv515_fini +ffffffff81cb71e0 T rv515_init +ffffffff81cb74d0 T atom_rv515_force_tv_scaler +ffffffff81cbab70 T rv515_bandwidth_avivo_update +ffffffff81cbad00 t rv515_crtc_bandwidth_compute +ffffffff81cbb040 t rv515_compute_mode_priority +ffffffff81cbb4f0 T rv515_bandwidth_update +ffffffff81cbc000 T rv6xx_dpm_enable +ffffffff81cbc7f0 t rv6xx_calculate_stepping_parameters +ffffffff81cbc9c0 t rv6xx_program_stepping_parameters_except_lowest_entry +ffffffff81cbcfb0 t rv6xx_program_stepping_parameters_lowest_entry +ffffffff81cbd090 T rv6xx_dpm_disable +ffffffff81cbd410 T rv6xx_dpm_set_power_state +ffffffff81cbde00 T rv6xx_setup_asic +ffffffff81cbdf40 T rv6xx_dpm_display_configuration_changed +ffffffff81cbdfc0 T rv6xx_dpm_init +ffffffff81cbe510 T rv6xx_dpm_print_power_state +ffffffff81cbe5c0 T rv6xx_dpm_debugfs_print_current_performance_level +ffffffff81cbe5f0 T rv6xx_dpm_get_current_sclk +ffffffff81cbe660 T rv6xx_dpm_get_current_mclk +ffffffff81cbe6d0 T rv6xx_dpm_fini +ffffffff81cbe760 T rv6xx_dpm_get_sclk +ffffffff81cbe7a0 T rv6xx_dpm_get_mclk +ffffffff81cbe7e0 T rv6xx_dpm_force_performance_level +ffffffff81cbe960 t rv6xx_generate_steps +ffffffff81cbec70 t rv6xx_output_stepping +ffffffff81cbed90 t rv6xx_program_mclk_stepping_entry +ffffffff81cbf000 t rv6xx_program_engine_spread_spectrum +ffffffff81cbf2e0 t rv6xx_step_sw_voltage +ffffffff81cc0000 T rv730_populate_sclk_value +ffffffff81cc0240 T rv730_populate_mclk_value +ffffffff81cc0460 T rv730_read_clock_registers +ffffffff81cc0580 T rv730_populate_smc_acpi_state +ffffffff81cc0730 T rv730_populate_smc_initial_state +ffffffff81cc08e0 T rv730_program_memory_timing_parameters +ffffffff81cc0ac0 T rv730_start_dpm +ffffffff81cc0b50 T rv730_stop_dpm +ffffffff81cc0c10 T rv730_program_dcodt +ffffffff81cc0ce0 T rv730_get_odt_values +ffffffff81cc1000 T rv740_get_decoded_reference_divider +ffffffff81cc10a0 T rv740_get_dll_speed +ffffffff81cc11d0 T rv740_populate_sclk_value +ffffffff81cc13e0 T rv740_populate_mclk_value +ffffffff81cc1820 T rv740_read_clock_registers +ffffffff81cc1950 T rv740_populate_smc_acpi_state +ffffffff81cc1b80 T rv740_enable_mclk_spread_spectrum +ffffffff81cc1be0 T rv740_get_mclk_frequency_ratio +ffffffff81cc2000 T rv770_set_uvd_clocks +ffffffff81cc2570 T rv770_get_xclk +ffffffff81cc25d0 T rv770_page_flip +ffffffff81cc28e0 T rv770_page_flip_pending +ffffffff81cc2950 T rv770_get_temp +ffffffff81cc29b0 T rv770_pm_misc +ffffffff81cc2a80 T r700_cp_stop +ffffffff81cc2b00 T r700_cp_fini +ffffffff81cc2b80 T rv770_set_clk_bypass_mode +ffffffff81cc2ca0 T r700_vram_gtt_location +ffffffff81cc2e30 T rv770_resume +ffffffff81cc2ec0 t rv770_init_golden_registers +ffffffff81cc3050 t rv770_startup +ffffffff81cc5040 T rv770_suspend +ffffffff81cc5260 T rv770_init +ffffffff81cc5820 T rv770_fini +ffffffff81cc6000 T rv770_copy_dma +ffffffff81cc7000 T rv770_get_ps +ffffffff81cc7030 T rv770_get_pi +ffffffff81cc7060 T evergreen_get_pi +ffffffff81cc7090 T rv770_restore_cgcg +ffffffff81cc7100 T rv770_stop_dpm +ffffffff81cc71c0 T rv770_dpm_enabled +ffffffff81cc7200 T rv770_enable_thermal_protection +ffffffff81cc7260 T rv770_enable_acpi_pm +ffffffff81cc72b0 T rv770_get_seq_value +ffffffff81cc72e0 T rv770_write_smc_soft_register +ffffffff81cc7310 T rv770_populate_smc_t +ffffffff81cc74a0 T rv770_populate_smc_sp +ffffffff81cc7500 T rv770_map_clkf_to_ibias +ffffffff81cc7560 T rv770_populate_vddc_value +ffffffff81cc7600 T rv770_populate_mvdd_value +ffffffff81cc7650 T rv770_calculate_memory_refresh_rate +ffffffff81cc76c0 T rv770_enable_backbias +ffffffff81cc7720 T rv770_setup_bsp +ffffffff81cc7800 T rv770_program_git +ffffffff81cc7850 T rv770_program_tp +ffffffff81cc78d0 T rv770_program_tpp +ffffffff81cc7910 T rv770_program_sstp +ffffffff81cc7950 T rv770_program_engine_speed_parameters +ffffffff81cc79a0 T rv770_program_vc +ffffffff81cc79e0 T rv770_clear_vc +ffffffff81cc7a20 T rv770_upload_firmware +ffffffff81cc7a60 T rv770_populate_initial_mvdd_value +ffffffff81cc7ab0 T rv770_get_memory_module_index +ffffffff81cc7af0 T rv770_enable_voltage_control +ffffffff81cc7b50 T rv770_halt_smc +ffffffff81cc7bb0 T rv770_resume_smc +ffffffff81cc7c00 T rv770_set_sw_state +ffffffff81cc7c60 T rv770_set_boot_state +ffffffff81cc7cb0 T rv770_set_uvd_clock_before_set_eng_clock +ffffffff81cc7d10 T rv770_set_uvd_clock_after_set_eng_clock +ffffffff81cc7d80 T rv770_restrict_performance_levels_before_switch +ffffffff81cc7de0 T rv770_dpm_force_performance_level +ffffffff81cc7ea0 T r7xx_start_smc +ffffffff81cc7ec0 T r7xx_stop_smc +ffffffff81cc7ee0 T rv770_read_voltage_smio_registers +ffffffff81cc7f20 T rv770_reset_smio_status +ffffffff81cc7fd0 T rv770_get_memory_type +ffffffff81cc8020 T rv770_get_pcie_gen2_status +ffffffff81cc8090 T rv770_get_max_vddc +ffffffff81cc80f0 T rv770_program_response_times +ffffffff81cc8230 T rv770_enable_auto_throttle_source +ffffffff81cc83a0 T rv770_dpm_enable +ffffffff81cc9420 T rv770_dpm_late_enable +ffffffff81cc9550 T rv770_dpm_disable +ffffffff81cc98b0 T rv770_dpm_set_power_state +ffffffff81cc9ea0 T rv770_dpm_setup_asic +ffffffff81cca200 T rv770_dpm_display_configuration_changed +ffffffff81cca280 T rv7xx_parse_power_table +ffffffff81cca7c0 T rv770_get_engine_memory_ss +ffffffff81cca850 T rv770_dpm_init +ffffffff81ccaa80 T rv770_dpm_print_power_state +ffffffff81ccaba0 T rv770_dpm_debugfs_print_current_performance_level +ffffffff81ccabd0 T rv770_dpm_get_current_sclk +ffffffff81ccac30 T rv770_dpm_get_current_mclk +ffffffff81ccac90 T rv770_dpm_fini +ffffffff81ccad20 T rv770_dpm_get_sclk +ffffffff81ccad60 T rv770_dpm_get_mclk +ffffffff81ccada0 T rv770_dpm_vblank_too_short +ffffffff81ccae00 t rv770_convert_power_level_to_smc +ffffffff81ccc000 T rv770_copy_bytes_to_smc +ffffffff81ccc230 T rv770_start_smc +ffffffff81ccc280 T rv770_reset_smc +ffffffff81ccc2d0 T rv770_stop_smc_clock +ffffffff81ccc320 T rv770_start_smc_clock +ffffffff81ccc370 T rv770_is_smc_running +ffffffff81ccc3b0 T rv770_send_msg_to_smc +ffffffff81ccc480 T rv770_wait_for_smc_inactive +ffffffff81ccc510 T rv770_load_smc_ucode +ffffffff81ccc690 T rv770_read_smc_sram_dword +ffffffff81ccc740 T rv770_write_smc_sram_dword +ffffffff81ccd000 T si_get_allowed_info_register +ffffffff81ccd090 T si_get_xclk +ffffffff81ccd100 T si_get_temp +ffffffff81ccd140 T si_mc_load_microcode +ffffffff81ccd410 T dce6_bandwidth_update +ffffffff81ccd810 t dce6_program_watermarks +ffffffff81cce2c0 T si_fence_ring_emit +ffffffff81cce730 T si_ring_ib_execute +ffffffff81ccef00 T si_gpu_check_soft_reset +ffffffff81ccf090 T si_asic_reset +ffffffff81ccf4a0 t si_gpu_pci_config_reset +ffffffff81ccf850 T si_gfx_is_lockup +ffffffff81ccf8b0 T si_vram_gtt_location +ffffffff81ccf950 T si_pcie_gart_tlb_flush +ffffffff81ccf9a0 T si_ib_parse +ffffffff81cd0050 T si_vm_init +ffffffff81cd0090 T si_vm_fini +ffffffff81cd00c0 T si_vm_flush +ffffffff81cd07a0 T si_init_uvd_internal_cg +ffffffff81cd07e0 T si_get_csb_size +ffffffff81cd0870 T si_get_csb_buffer +ffffffff81cd0a00 T si_rlc_reset +ffffffff81cd0a70 T si_irq_set +ffffffff81cd0f70 t si_disable_interrupt_state +ffffffff81cd11f0 T si_irq_process +ffffffff81cd23f0 t si_irq_ack +ffffffff81cd29f0 T si_resume +ffffffff81cd2a80 t si_init_golden_registers +ffffffff81cd2c40 t si_startup +ffffffff81cd7470 T si_suspend +ffffffff81cd77f0 T si_init +ffffffff81cd8cc0 t si_cp_fini +ffffffff81cd8db0 t si_pcie_gart_fini +ffffffff81cd8eb0 T si_fini +ffffffff81cd9150 T si_get_gpu_clock_counter +ffffffff81cd9210 T si_set_uvd_clocks +ffffffff81cd9780 T si_set_vce_clocks +ffffffff81cd9cc0 t si_vce_send_vcepll_ctlreq +ffffffff81cd9f00 t dce6_latency_watermark +ffffffff81cda130 t si_rlc_stop +ffffffff81cda2e0 t si_vm_reg_valid +ffffffff81cda440 t si_vm_packet3_cp_dma_check +ffffffff81cda5c0 t si_update_cg +ffffffff81cdab10 t si_enable_mgcg +ffffffff81cdaf30 t si_enable_cgcg +ffffffff81cdc000 T si_dma_is_lockup +ffffffff81cdc080 T si_dma_vm_copy_pages +ffffffff81cdc160 T si_dma_vm_write_pages +ffffffff81cdc2c0 T si_dma_vm_set_pages +ffffffff81cdc420 T si_dma_vm_flush +ffffffff81cdc8b0 T si_copy_dma +ffffffff81cdd000 T si_dpm_force_performance_level +ffffffff81cdd160 T si_get_ddr3_mclk_frequency_ratio +ffffffff81cdd1b0 T si_get_mclk_frequency_ratio +ffffffff81cdd230 T si_trim_voltage_table_to_fit_state_table +ffffffff81cdd330 T si_dpm_setup_asic +ffffffff81cdd4f0 T si_fan_ctrl_get_fan_speed_percent +ffffffff81cdd580 T si_fan_ctrl_set_fan_speed_percent +ffffffff81cdd630 T si_fan_ctrl_set_mode +ffffffff81cdd870 T si_fan_ctrl_get_mode +ffffffff81cdd8c0 T si_dpm_enable +ffffffff81ce2bc0 t si_populate_smc_tdp_limits +ffffffff81ce2dd0 T si_dpm_late_enable +ffffffff81ce2f20 T si_dpm_disable +ffffffff81ce3290 T si_dpm_pre_set_power_state +ffffffff81ce3e90 T si_dpm_set_power_state +ffffffff81ce5410 T si_dpm_post_set_power_state +ffffffff81ce5440 T si_dpm_display_configuration_changed +ffffffff81ce5520 T si_dpm_init +ffffffff81ce6fd0 T si_dpm_fini +ffffffff81ce7080 T si_dpm_debugfs_print_current_performance_level +ffffffff81ce70c0 T si_dpm_get_current_sclk +ffffffff81ce7130 T si_dpm_get_current_mclk +ffffffff81ce71a0 t si_get_std_voltage_value +ffffffff81ce72d0 t si_convert_power_level_to_smc +ffffffff81ce7b70 t si_calculate_sclk_params +ffffffff81ce7d90 t si_convert_mc_reg_table_to_smc +ffffffff81ce7ef0 t si_program_cac_config_registers +ffffffff81ce9000 T si_copy_bytes_to_smc +ffffffff81ce9250 T si_start_smc +ffffffff81ce9280 T si_reset_smc +ffffffff81ce92c0 T si_program_jump_on_start +ffffffff81ce92f0 T si_stop_smc_clock +ffffffff81ce9320 T si_start_smc_clock +ffffffff81ce9350 T si_is_smc_running +ffffffff81ce93b0 T si_send_msg_to_smc +ffffffff81ce9480 T si_wait_for_smc_inactive +ffffffff81ce9520 T si_load_smc_ucode +ffffffff81ce96c0 T si_read_smc_sram_dword +ffffffff81ce9790 T si_write_smc_sram_dword +ffffffff81cea000 T sumo_get_pi +ffffffff81cea030 T sumo_gfx_clockgating_initialize +ffffffff81cea110 T sumo_program_vc +ffffffff81cea150 T sumo_clear_vc +ffffffff81cea190 T sumo_program_sstp +ffffffff81cea210 T sumo_take_smu_control +ffffffff81cea240 T sumo_get_sleep_divider_from_id +ffffffff81cea270 T sumo_get_sleep_divider_id_from_clock +ffffffff81cea320 T sumo_dpm_enable +ffffffff81cea9c0 T sumo_dpm_late_enable +ffffffff81ceaf80 T sumo_dpm_disable +ffffffff81ceb2d0 T sumo_dpm_pre_set_power_state +ffffffff81ceb780 T sumo_dpm_set_power_state +ffffffff81cec2c0 T sumo_dpm_post_set_power_state +ffffffff81cec360 T sumo_dpm_setup_asic +ffffffff81cec460 T sumo_dpm_display_configuration_changed +ffffffff81cec490 T sumo_convert_vid2_to_vid7 +ffffffff81cec4f0 T sumo_construct_sclk_voltage_mapping_table +ffffffff81cec5b0 T sumo_construct_vid_mapping_table +ffffffff81cec730 T sumo_dpm_init +ffffffff81cecff0 T sumo_dpm_print_power_state +ffffffff81ced110 T sumo_dpm_debugfs_print_current_performance_level +ffffffff81ced140 T sumo_dpm_get_current_sclk +ffffffff81ced1b0 T sumo_dpm_get_current_mclk +ffffffff81ced1e0 T sumo_dpm_get_current_vddc +ffffffff81ced2b0 T sumo_dpm_fini +ffffffff81ced340 T sumo_dpm_get_sclk +ffffffff81ced390 T sumo_dpm_get_mclk +ffffffff81ced3c0 T sumo_dpm_force_performance_level +ffffffff81ced7e0 t sumo_power_level_enable +ffffffff81ceda10 t sumo_program_power_level +ffffffff81cee000 T sumo_initialize_m3_arb +ffffffff81cee2b0 T sumo_smu_notify_alt_vddnb_change +ffffffff81cee340 t sumo_send_msg_to_smu +ffffffff81cee4e0 T sumo_smu_pg_init +ffffffff81cee500 T sumo_enable_boost_timer +ffffffff81cee630 T sumo_set_tdp_limit +ffffffff81cee6b0 T sumo_boost_state_enable +ffffffff81cee6f0 T sumo_get_running_fw_version +ffffffff81cef000 T trinity_dpm_enable_bapm +ffffffff81cef070 T trinity_dpm_enable +ffffffff81cef510 T trinity_dpm_late_enable +ffffffff81cefa60 T trinity_dpm_disable +ffffffff81cefe70 T trinity_dpm_force_performance_level +ffffffff81ceff20 T trinity_dpm_pre_set_power_state +ffffffff81cf04e0 T trinity_dpm_set_power_state +ffffffff81cf0a70 T trinity_dpm_post_set_power_state +ffffffff81cf0b10 T trinity_dpm_setup_asic +ffffffff81cf0b70 T trinity_dpm_display_configuration_changed +ffffffff81cf0c00 T trinity_dpm_init +ffffffff81cf14f0 T trinity_dpm_print_power_state +ffffffff81cf1600 T trinity_dpm_debugfs_print_current_performance_level +ffffffff81cf1690 T trinity_dpm_get_current_sclk +ffffffff81cf16f0 T trinity_dpm_get_current_mclk +ffffffff81cf1720 T trinity_dpm_fini +ffffffff81cf17c0 T trinity_dpm_get_sclk +ffffffff81cf1810 T trinity_dpm_get_mclk +ffffffff81cf1840 t trinity_program_power_level +ffffffff81cf2000 T trinity_dpm_bapm_enable +ffffffff81cf2140 T trinity_dpm_config +ffffffff81cf2220 T trinity_dpm_force_state +ffffffff81cf2300 T trinity_dpm_n_levels_disabled +ffffffff81cf23e0 T trinity_uvd_dpm_config +ffffffff81cf24b0 T trinity_dpm_no_forced_level +ffffffff81cf2580 T trinity_dce_enable_voltage_adjustment +ffffffff81cf26c0 T trinity_gfx_dynamic_mgpg_config +ffffffff81cf2790 T trinity_acquire_mutex +ffffffff81cf2820 T trinity_release_mutex +ffffffff81cf3000 T uvd_v1_0_get_rptr +ffffffff81cf3040 T uvd_v1_0_get_wptr +ffffffff81cf3080 T uvd_v1_0_set_wptr +ffffffff81cf30c0 T uvd_v1_0_fence_emit +ffffffff81cf34b0 T uvd_v1_0_resume +ffffffff81cf3600 T uvd_v1_0_init +ffffffff81cf3b90 T uvd_v1_0_start +ffffffff81cf4310 T uvd_v1_0_fini +ffffffff81cf4480 T uvd_v1_0_stop +ffffffff81cf45e0 T uvd_v1_0_ring_test +ffffffff81cf47b0 T uvd_v1_0_semaphore_emit +ffffffff81cf47e0 T uvd_v1_0_ib_execute +ffffffff81cf4970 T uvd_v1_0_ib_test +ffffffff81cf5000 T uvd_v2_2_fence_emit +ffffffff81cf5470 T uvd_v2_2_semaphore_emit +ffffffff81cf5670 T uvd_v2_2_resume +ffffffff81cf6000 T uvd_v3_1_semaphore_emit +ffffffff81cf7000 T uvd_v4_2_resume +ffffffff81cf8000 T vce_v1_0_get_rptr +ffffffff81cf8090 T vce_v1_0_get_wptr +ffffffff81cf8120 T vce_v1_0_set_wptr +ffffffff81cf81b0 T vce_v1_0_enable_mgcg +ffffffff81cf8460 T vce_v1_0_load_fw +ffffffff81cf8620 T vce_v1_0_bo_size +ffffffff81cf8690 T vce_v1_0_resume +ffffffff81cf9000 T vce_v1_0_start +ffffffff81cf97c0 T vce_v1_0_init +ffffffff81cfa000 T vce_v2_0_enable_mgcg +ffffffff81cfa070 t vce_v2_0_set_dyn_cg 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amdgpu_acpi_get_backlight_caps +ffffffff81cfdaf0 T amdgpu_acpi_fini +ffffffff81cfdb10 T amdgpu_acpi_detect +ffffffff81cff000 T amdgpu_afmt_acr +ffffffff81d00000 T amdgpu_amdkfd_init +ffffffff81d00040 T amdgpu_amdkfd_fini +ffffffff81d00060 T amdgpu_amdkfd_device_probe +ffffffff81d00090 T amdgpu_amdkfd_device_init +ffffffff81d00260 t amdgpu_amdkfd_reset_work +ffffffff81d002e0 T amdgpu_amdkfd_device_fini_sw +ffffffff81d00330 T amdgpu_amdkfd_interrupt +ffffffff81d00360 T amdgpu_amdkfd_suspend +ffffffff81d00390 T amdgpu_amdkfd_resume_iommu +ffffffff81d003c0 T amdgpu_amdkfd_resume +ffffffff81d003f0 T amdgpu_amdkfd_pre_reset +ffffffff81d00420 T amdgpu_amdkfd_post_reset +ffffffff81d00450 T amdgpu_amdkfd_gpu_reset +ffffffff81d004b0 T amdgpu_amdkfd_alloc_gtt_mem +ffffffff81d00760 t amdgpu_bo_reserve +ffffffff81d008c0 t amdgpu_bo_unreserve +ffffffff81d009a0 T amdgpu_amdkfd_free_gtt_mem +ffffffff81d00a10 T amdgpu_amdkfd_alloc_gws +ffffffff81d00af0 T amdgpu_amdkfd_free_gws +ffffffff81d00b30 T amdgpu_amdkfd_get_fw_version +ffffffff81d00be0 T amdgpu_amdkfd_get_local_mem_info +ffffffff81d00cb0 T amdgpu_amdkfd_get_gpu_clock_counter +ffffffff81d00cf0 T amdgpu_amdkfd_get_max_engine_clock_in_mhz +ffffffff81d00d70 T amdgpu_amdkfd_get_cu_info +ffffffff81d00eb0 T amdgpu_amdkfd_get_dmabuf_info +ffffffff81d00ff0 T amdgpu_amdkfd_get_xgmi_hops_count +ffffffff81d01060 T amdgpu_amdkfd_get_xgmi_bandwidth_mbytes +ffffffff81d010f0 T amdgpu_amdkfd_get_pcie_bandwidth_mbytes +ffffffff81d01250 T amdgpu_amdkfd_submit_ib +ffffffff81d013b0 T amdgpu_amdkfd_set_compute_idle +ffffffff81d01400 T amdgpu_amdkfd_is_kfd_vmid +ffffffff81d01440 T amdgpu_amdkfd_flush_gpu_tlb_vmid +ffffffff81d014e0 T amdgpu_amdkfd_flush_gpu_tlb_pasid +ffffffff81d01510 T amdgpu_amdkfd_have_atomics_support +ffffffff81d01540 T amdgpu_amdkfd_ras_poison_consumption_handler +ffffffff81d015a0 T amdgpu_amdkfd_ras_query_utcl2_poison_status +ffffffff81d02000 T amdgpu_atom_execute_table +ffffffff81d020a0 t amdgpu_atom_execute_table_locked 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atom_op_mask +ffffffff81d04da0 t atom_op_postcard +ffffffff81d04e50 t atom_op_beep +ffffffff81d04e70 t atom_op_savereg +ffffffff81d04ea0 t atom_op_restorereg +ffffffff81d04ed0 t atom_op_setdatablock +ffffffff81d05010 t atom_op_xor +ffffffff81d051f0 t atom_op_shl +ffffffff81d05400 t atom_op_shr +ffffffff81d05610 t atom_op_debug +ffffffff81d056c0 t atom_op_processds +ffffffff81d05780 t atom_op_mul32 +ffffffff81d058e0 t atom_op_div32 +ffffffff81d05a70 t atom_put_dst +ffffffff81d05f40 t atom_get_src_int +ffffffff81d065f0 t atom_iio_execute +ffffffff81d07000 T amdgpu_atombios_lookup_i2c_gpio +ffffffff81d07260 T amdgpu_atombios_i2c_init +ffffffff81d07530 T amdgpu_atombios_lookup_gpio +ffffffff81d07630 T amdgpu_atombios_has_dce_engine_info +ffffffff81d076b0 T amdgpu_atombios_get_connector_info_from_object_table +ffffffff81d07f00 T amdgpu_atombios_get_clock_info +ffffffff81d08240 T amdgpu_atombios_get_gfx_info +ffffffff81d08300 T amdgpu_atombios_get_vram_width +ffffffff81d08380 T amdgpu_atombios_get_asic_ss_info +ffffffff81d086f0 T amdgpu_atombios_get_clock_dividers +ffffffff81d08910 T amdgpu_atombios_has_gpu_virtualization_table +ffffffff81d08960 T amdgpu_atombios_scratch_regs_lock +ffffffff81d089c0 T amdgpu_atombios_scratch_regs_engine_hung +ffffffff81d08a10 T amdgpu_atombios_scratch_regs_set_backlight_level +ffffffff81d08a60 T amdgpu_atombios_scratch_need_asic_init +ffffffff81d08ab0 T amdgpu_atombios_copy_swap +ffffffff81d08ac0 T amdgpu_atombios_fini +ffffffff81d08b60 T amdgpu_atombios_init +ffffffff81d08e00 t cail_reg_read +ffffffff81d08e20 t cail_reg_write +ffffffff81d08e40 t cail_mc_read +ffffffff81d08e70 t cail_mc_write +ffffffff81d08ea0 t cail_pll_read +ffffffff81d08ed0 t cail_pll_write +ffffffff81d08f00 T amdgpu_atombios_get_data_table +ffffffff81d09000 T amdgpu_atombios_crtc_overscan_setup +ffffffff81d09150 T amdgpu_atombios_crtc_scaler_setup +ffffffff81d091d0 T amdgpu_atombios_crtc_lock +ffffffff81d09230 T amdgpu_atombios_crtc_enable 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amdgpu_atombios_dp_set_rx_power_state +ffffffff81d0b870 T amdgpu_atombios_dp_link_train +ffffffff81d0bdc0 t amdgpu_atombios_dp_process_aux_ch +ffffffff81d0bf30 t amdgpu_atombios_dp_get_adjust_train +ffffffff81d0d000 T amdgpu_atombios_encoder_get_backlight_level_from_reg +ffffffff81d0d040 T amdgpu_atombios_encoder_set_backlight_level_to_reg +ffffffff81d0d090 T amdgpu_atombios_encoder_get_backlight_level +ffffffff81d0d0f0 T amdgpu_atombios_encoder_set_backlight_level +ffffffff81d0d200 T amdgpu_atombios_encoder_setup_dig_transmitter +ffffffff81d0dbd0 T amdgpu_atombios_encoder_init_backlight +ffffffff81d0dd60 t amdgpu_atombios_encoder_get_backlight_brightness +ffffffff81d0ddb0 T amdgpu_atombios_encoder_fini_backlight +ffffffff81d0de40 T amdgpu_atombios_encoder_is_digital +ffffffff81d0de90 T amdgpu_atombios_encoder_mode_fixup +ffffffff81d0df70 T amdgpu_atombios_encoder_get_encoder_mode +ffffffff81d0e110 T amdgpu_atombios_encoder_setup_dig_encoder +ffffffff81d0e5d0 T amdgpu_atombios_encoder_set_edp_panel_power +ffffffff81d0e6d0 T amdgpu_atombios_encoder_dpms +ffffffff81d0e840 t amdgpu_atombios_encoder_setup_dig +ffffffff81d0ebb0 t amdgpu_atombios_encoder_setup_dvo +ffffffff81d0ed50 T amdgpu_atombios_encoder_set_crtc_source +ffffffff81d0f130 T amdgpu_atombios_encoder_init_dig +ffffffff81d0f1f0 t amdgpu_atombios_encoder_setup_external_encoder +ffffffff81d0f450 T amdgpu_atombios_encoder_dac_detect +ffffffff81d0f630 T amdgpu_atombios_encoder_dig_detect +ffffffff81d0f730 T amdgpu_atombios_encoder_setup_ext_encoder_ddc +ffffffff81d0f780 T amdgpu_atombios_encoder_set_bios_scratch_regs +ffffffff81d0fd20 T amdgpu_atombios_encoder_get_lcd_info +ffffffff81d10080 T amdgpu_atombios_encoder_get_dig_info +ffffffff81d100f0 t amdgpu_atombios_encoder_update_backlight_status +ffffffff81d11000 T amdgpu_atombios_i2c_xfer +ffffffff81d113a0 T amdgpu_atombios_i2c_func +ffffffff81d113d0 T amdgpu_atombios_i2c_channel_trans +ffffffff81d12000 T amdgpu_atomfirmware_query_firmware_capability +ffffffff81d12090 T amdgpu_atomfirmware_gpu_virtualization_supported +ffffffff81d120c0 T amdgpu_atomfirmware_scratch_regs_init +ffffffff81d12130 T amdgpu_atomfirmware_allocate_fb_scratch +ffffffff81d12260 T amdgpu_atomfirmware_get_vram_info +ffffffff81d129c0 T amdgpu_atomfirmware_mem_ecc_supported +ffffffff81d12a70 T amdgpu_atomfirmware_sram_ecc_supported +ffffffff81d12aa0 T amdgpu_atomfirmware_dynamic_boot_config_supported +ffffffff81d12ad0 T amdgpu_atomfirmware_ras_rom_addr +ffffffff81d12b70 T amdgpu_atomfirmware_get_clock_info +ffffffff81d12d90 T amdgpu_atomfirmware_get_gfx_info +ffffffff81d12f20 T amdgpu_atomfirmware_mem_training_supported +ffffffff81d12f50 T amdgpu_atomfirmware_get_fw_reserved_fb_size +ffffffff81d12fe0 T amdgpu_atomfirmware_asic_init +ffffffff81d14000 T amdgpu_benchmark +ffffffff81d147a0 t amdgpu_benchmark_move +ffffffff81d15000 T amdgpu_read_bios +ffffffff81d15190 t check_atom_bios +ffffffff81d152a0 T amdgpu_get_bios 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amdgpu_connector_dvi_mode_valid +ffffffff81d1aed0 t amdgpu_connector_lvds_detect +ffffffff81d1b040 t amdgpu_connector_lvds_get_modes +ffffffff81d1b1a0 t amdgpu_connector_lvds_mode_valid +ffffffff81d1c000 T amdgpu_cs_report_moved_bytes +ffffffff81d1c070 T amdgpu_cs_ioctl +ffffffff81d1de40 t amdgpu_cs_parser_fini +ffffffff81d1dfd0 T amdgpu_cs_wait_ioctl +ffffffff81d1e110 T amdgpu_cs_fence_to_handle_ioctl +ffffffff81d1e2b0 t amdgpu_cs_get_fence +ffffffff81d1e360 T amdgpu_cs_wait_fences_ioctl +ffffffff81d1e650 T amdgpu_cs_find_mapping +ffffffff81d1e750 t amdgpu_cs_bo_validate +ffffffff81d1ea60 t amdgpu_cs_list_validate +ffffffff81d1f000 T amdgpu_csa_vaddr +ffffffff81d1f050 T amdgpu_allocate_static_csa +ffffffff81d1f0f0 T amdgpu_free_static_csa +ffffffff81d1f100 T amdgpu_map_static_csa +ffffffff81d20000 T amdgpu_ctx_priority_is_valid +ffffffff81d20060 T amdgpu_ctx_get_entity +ffffffff81d20370 T amdgpu_ctx_ioctl +ffffffff81d20a60 T amdgpu_ctx_get +ffffffff81d20ae0 T amdgpu_ctx_put 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amdgpu_device_invalidate_hdp +ffffffff81d23730 T amdgpu_device_vram_access +ffffffff81d237b0 T amdgpu_device_skip_hw_access +ffffffff81d237e0 T amdgpu_mm_rreg8 +ffffffff81d23850 T amdgpu_mm_wreg8 +ffffffff81d238c0 T amdgpu_mm_wreg_mmio_rlc +ffffffff81d239a0 T amdgpu_mm_rdoorbell +ffffffff81d23a10 T amdgpu_mm_wdoorbell +ffffffff81d23a70 T amdgpu_mm_rdoorbell64 +ffffffff81d23ae0 T amdgpu_mm_wdoorbell64 +ffffffff81d23b40 T amdgpu_device_indirect_rreg +ffffffff81d23bc0 T amdgpu_device_indirect_rreg64 +ffffffff81d23c70 T amdgpu_device_indirect_wreg +ffffffff81d23ce0 T amdgpu_device_indirect_wreg64 +ffffffff81d23d70 T amdgpu_device_program_register_sequence +ffffffff81d23fb0 T amdgpu_device_pci_config_reset +ffffffff81d23fe0 T amdgpu_device_pci_reset +ffffffff81d24030 T amdgpu_device_wb_get +ffffffff81d240d0 T amdgpu_device_wb_free +ffffffff81d24110 T amdgpu_device_resize_fb_bar +ffffffff81d24140 T amdgpu_device_need_post +ffffffff81d24270 T amdgpu_device_should_use_aspm +ffffffff81d242c0 T amdgpu_device_ip_set_clockgating_state +ffffffff81d243b0 T amdgpu_device_ip_set_powergating_state +ffffffff81d244a0 T amdgpu_device_ip_get_clockgating_state +ffffffff81d24540 T amdgpu_device_ip_wait_for_idle +ffffffff81d245c0 T amdgpu_device_ip_is_idle +ffffffff81d24630 T amdgpu_device_ip_get_ip_block +ffffffff81d24690 T amdgpu_device_ip_block_version_cmp +ffffffff81d24710 T amdgpu_device_ip_block_add +ffffffff81d247c0 T amdgpu_device_set_cg_state +ffffffff81d248e0 T amdgpu_device_set_pg_state +ffffffff81d24a00 T amdgpu_device_ip_suspend +ffffffff81d24a90 t amdgpu_device_ip_suspend_phase1 +ffffffff81d24d40 t amdgpu_device_ip_suspend_phase2 +ffffffff81d24eb0 T amdgpu_device_asic_has_dc_support +ffffffff81d24f10 T amdgpu_device_has_dc_support +ffffffff81d24fa0 T amdgpu_device_init +ffffffff81d270c0 t amdgpu_invalid_rreg +ffffffff81d270f0 t amdgpu_invalid_wreg +ffffffff81d27120 t amdgpu_invalid_rreg64 +ffffffff81d27150 t amdgpu_invalid_wreg64 +ffffffff81d27180 t amdgpu_block_invalid_rreg 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amdgpu_vram_mgr_new +ffffffff81d8ee60 t amdgpu_vram_mgr_del +ffffffff81d8ef30 t amdgpu_vram_mgr_intersects +ffffffff81d8efb0 t amdgpu_vram_mgr_compatible +ffffffff81d8f030 t amdgpu_vram_mgr_debug +ffffffff81d90000 t amdgpu_xgmi_hive_release +ffffffff81d90050 T amdgpu_get_xgmi_hive +ffffffff81d900a0 T amdgpu_put_xgmi_hive +ffffffff81d900f0 T amdgpu_xgmi_set_pstate +ffffffff81d90140 T amdgpu_xgmi_update_topology +ffffffff81d901f0 T amdgpu_xgmi_get_hops_count +ffffffff81d90260 T amdgpu_xgmi_get_num_links +ffffffff81d902d0 T amdgpu_xgmi_add_device +ffffffff81d904f0 T amdgpu_xgmi_remove_device +ffffffff81d90630 T amdgpu_xgmi_get_relative_phy_addr +ffffffff81d90670 t amdgpu_ras_error_inject_xgmi +ffffffff81d907e0 t amdgpu_xgmi_query_ras_error_count +ffffffff81d90ff0 t amdgpu_xgmi_reset_ras_error_count +ffffffff81d91310 t amdgpu_xgmi_ras_late_init +ffffffff81d92000 T arct_reg_base_init +ffffffff81d93000 T athub_v1_0_set_clockgating +ffffffff81d93210 T athub_v1_0_get_clockgating +ffffffff81d94000 T athub_v2_0_set_clockgating +ffffffff81d941e0 T athub_v2_0_get_clockgating +ffffffff81d95000 T athub_v2_1_set_clockgating +ffffffff81d951f0 T athub_v2_1_get_clockgating +ffffffff81d96000 T athub_v3_0_set_clockgating +ffffffff81d960d0 T athub_v3_0_get_clockgating +ffffffff81d96120 t athub_v3_0_get_cg_cntl +ffffffff81d961c0 t athub_v3_0_set_cg_cntl +ffffffff81d97000 t cz_ih_early_init +ffffffff81d97050 t cz_ih_sw_init +ffffffff81d970b0 t cz_ih_sw_fini +ffffffff81d970f0 t cz_ih_hw_init +ffffffff81d97310 t cz_ih_hw_fini +ffffffff81d973e0 t cz_ih_suspend +ffffffff81d974b0 t cz_ih_resume +ffffffff81d974f0 t cz_ih_is_idle +ffffffff81d97530 t cz_ih_wait_for_idle +ffffffff81d975c0 t cz_ih_soft_reset +ffffffff81d976a0 t cz_ih_set_clockgating_state +ffffffff81d976d0 t cz_ih_set_powergating_state +ffffffff81d97700 t cz_ih_get_wptr +ffffffff81d977f0 t cz_ih_decode_iv +ffffffff81d97860 t cz_ih_set_rptr +ffffffff81d98000 T dce_v10_0_disable_dce +ffffffff81d98170 t dce_v10_0_early_init +ffffffff81d98230 t dce_v10_0_sw_init +ffffffff81d986a0 t dce_v10_0_sw_fini +ffffffff81d987d0 t dce_v10_0_hw_init +ffffffff81d98b40 t dce_v10_0_hw_fini +ffffffff81d98cd0 t dce_v10_0_suspend +ffffffff81d98d30 t dce_v10_0_resume +ffffffff81d98da0 t dce_v10_0_is_idle +ffffffff81d98dd0 t dce_v10_0_wait_for_idle +ffffffff81d98e00 t dce_v10_0_check_soft_reset +ffffffff81d98e10 t dce_v10_0_soft_reset +ffffffff81d98ee0 t dce_v10_0_set_clockgating_state +ffffffff81d98f10 t dce_v10_0_set_powergating_state +ffffffff81d98f40 t dce_v10_0_audio_endpt_rreg +ffffffff81d98fd0 t dce_v10_0_audio_endpt_wreg +ffffffff81d99040 t dce_v10_0_bandwidth_update +ffffffff81d99aa0 t dce_v10_0_vblank_get_counter +ffffffff81d99af0 t dce_v10_0_hpd_sense +ffffffff81d99b50 t dce_v10_0_hpd_set_polarity +ffffffff81d99c20 t dce_v10_0_hpd_get_gpio_reg +ffffffff81d99c50 t dce_v10_0_page_flip +ffffffff81d99d40 t dce_v10_0_crtc_get_scanoutpos +ffffffff81d99de0 t dce_v10_0_encoder_add +ffffffff81d9a010 t dce_v10_0_latency_watermark +ffffffff81d9a230 t dce_v10_0_encoder_destroy +ffffffff81d9a280 t dce_v10_0_encoder_prepare +ffffffff81d9a480 t dce_v10_0_encoder_commit +ffffffff81d9a4b0 t dce_v10_0_encoder_mode_set +ffffffff81d9b350 t dce_v10_0_encoder_disable +ffffffff81d9b460 t dce_v10_0_ext_dpms +ffffffff81d9b490 t dce_v10_0_ext_prepare +ffffffff81d9b4c0 t dce_v10_0_ext_commit +ffffffff81d9b4f0 t dce_v10_0_ext_mode_set +ffffffff81d9b520 t dce_v10_0_ext_disable +ffffffff81d9b550 t dce_v10_0_set_crtc_irq_state +ffffffff81d9b630 t dce_v10_0_crtc_irq +ffffffff81d9b860 t dce_v10_0_set_crtc_vblank_interrupt_state +ffffffff81d9b930 t dce_v10_0_set_crtc_vline_interrupt_state +ffffffff81d9ba00 t dce_v10_0_set_pageflip_irq_state +ffffffff81d9bab0 t dce_v10_0_pageflip_irq +ffffffff81d9bc10 t dce_v10_0_set_hpd_irq_state +ffffffff81d9bcd0 t dce_v10_0_hpd_irq +ffffffff81d9bdf0 t dce_v10_0_crtc_cursor_set2 +ffffffff81d9c160 t dce_v10_0_crtc_cursor_move +ffffffff81d9c230 t dce_v10_0_crtc_gamma_set +ffffffff81d9c270 t dce_v10_0_crtc_destroy +ffffffff81d9c2a0 t amdgpu_bo_reserve +ffffffff81d9c4b0 t amdgpu_bo_unreserve +ffffffff81d9c590 t dce_v10_0_cursor_move_locked +ffffffff81d9c6e0 t dce_v10_0_crtc_load_lut +ffffffff81d9ca70 t dce_v10_0_crtc_dpms +ffffffff81d9cc40 t dce_v10_0_crtc_prepare +ffffffff81d9cc80 t dce_v10_0_crtc_commit +ffffffff81d9ccb0 t dce_v10_0_crtc_mode_fixup +ffffffff81d9ce70 t dce_v10_0_crtc_mode_set +ffffffff81d9d050 t dce_v10_0_crtc_set_base +ffffffff81d9d070 t dce_v10_0_crtc_set_base_atomic +ffffffff81d9d090 t dce_v10_0_crtc_disable +ffffffff81d9d230 t dce_v10_0_crtc_do_set_base +ffffffff81d9d8e0 t dce_v10_0_is_display_hung +ffffffff81d9e000 T dce_v11_0_disable_dce +ffffffff81d9e160 t dce_v11_0_early_init +ffffffff81d9e2a0 t dce_v11_0_sw_init +ffffffff81d9e720 t dce_v11_0_sw_fini +ffffffff81d9e850 t dce_v11_0_hw_init +ffffffff81d9ec20 t dce_v11_0_hw_fini +ffffffff81d9edb0 t dce_v11_0_suspend +ffffffff81d9ee10 t dce_v11_0_resume +ffffffff81d9ee80 t dce_v11_0_is_idle +ffffffff81d9eeb0 t dce_v11_0_wait_for_idle +ffffffff81d9eee0 t dce_v11_0_soft_reset +ffffffff81d9f100 t dce_v11_0_set_clockgating_state +ffffffff81d9f130 t dce_v11_0_set_powergating_state +ffffffff81d9f160 t dce_v11_0_audio_endpt_rreg +ffffffff81d9f1f0 t dce_v11_0_audio_endpt_wreg +ffffffff81d9f260 t dce_v11_0_bandwidth_update +ffffffff81d9fcc0 t dce_v11_0_vblank_get_counter +ffffffff81d9fd10 t dce_v11_0_hpd_sense +ffffffff81d9fd70 t dce_v11_0_hpd_set_polarity +ffffffff81d9fe40 t dce_v11_0_hpd_get_gpio_reg +ffffffff81d9fe70 t dce_v11_0_page_flip +ffffffff81d9ff60 t dce_v11_0_crtc_get_scanoutpos +ffffffff81da0000 t dce_v11_0_encoder_add +ffffffff81da0230 t dce_v11_0_latency_watermark +ffffffff81da0450 t dce_v11_0_encoder_destroy +ffffffff81da04a0 t dce_v11_0_encoder_prepare +ffffffff81da06a0 t dce_v11_0_encoder_commit +ffffffff81da06d0 t dce_v11_0_encoder_mode_set +ffffffff81da1570 t dce_v11_0_encoder_disable +ffffffff81da1680 t dce_v11_0_ext_dpms +ffffffff81da16b0 t dce_v11_0_ext_prepare +ffffffff81da16e0 t dce_v11_0_ext_commit +ffffffff81da1710 t dce_v11_0_ext_mode_set +ffffffff81da1740 t dce_v11_0_ext_disable +ffffffff81da1770 t dce_v11_0_set_crtc_irq_state +ffffffff81da1850 t dce_v11_0_crtc_irq +ffffffff81da1a70 t dce_v11_0_set_crtc_vblank_interrupt_state +ffffffff81da1b40 t dce_v11_0_set_crtc_vline_interrupt_state +ffffffff81da1c10 t dce_v11_0_set_pageflip_irq_state +ffffffff81da1cc0 t dce_v11_0_pageflip_irq +ffffffff81da1e20 t dce_v11_0_set_hpd_irq_state +ffffffff81da1ee0 t dce_v11_0_hpd_irq +ffffffff81da2000 t dce_v11_0_crtc_cursor_set2 +ffffffff81da2370 t dce_v11_0_crtc_cursor_move +ffffffff81da2440 t dce_v11_0_crtc_gamma_set +ffffffff81da2480 t dce_v11_0_crtc_destroy +ffffffff81da24b0 t amdgpu_bo_reserve +ffffffff81da26c0 t amdgpu_bo_unreserve +ffffffff81da27a0 t dce_v11_0_cursor_move_locked +ffffffff81da28f0 t dce_v11_0_crtc_load_lut +ffffffff81da2c60 t dce_v11_0_crtc_dpms +ffffffff81da2e30 t dce_v11_0_crtc_prepare +ffffffff81da2e70 t dce_v11_0_crtc_commit +ffffffff81da2ea0 t dce_v11_0_crtc_mode_fixup +ffffffff81da3110 t dce_v11_0_crtc_mode_set +ffffffff81da3370 t dce_v11_0_crtc_set_base +ffffffff81da3390 t dce_v11_0_crtc_set_base_atomic +ffffffff81da33b0 t dce_v11_0_crtc_disable +ffffffff81da3550 t dce_v11_0_crtc_do_set_base +ffffffff81da4000 t df_v1_7_sw_init +ffffffff81da4040 t df_v1_7_sw_fini +ffffffff81da4070 t df_v1_7_enable_broadcast_mode +ffffffff81da4190 t df_v1_7_get_fb_channel_number +ffffffff81da4210 t df_v1_7_get_hbm_channel_number +ffffffff81da4260 t df_v1_7_update_medium_grain_clock_gating +ffffffff81da43d0 t df_v1_7_get_clockgating_state +ffffffff81da4460 t df_v1_7_enable_ecc_force_par_wr_rmw +ffffffff81da5000 t df_v3_6_sw_init +ffffffff81da5160 t df_v3_6_sw_fini +ffffffff81da5190 t df_v3_6_enable_broadcast_mode +ffffffff81da52b0 t df_v3_6_get_fb_channel_number +ffffffff81da5380 t df_v3_6_get_hbm_channel_number +ffffffff81da53d0 t df_v3_6_update_medium_grain_clock_gating +ffffffff81da5570 t df_v3_6_get_clockgating_state +ffffffff81da5600 t df_v3_6_pmc_start +ffffffff81da5980 t df_v3_6_pmc_stop +ffffffff81da5c10 t df_v3_6_pmc_get_count +ffffffff81da5d90 t df_v3_6_get_fica +ffffffff81da5e90 t df_v3_6_set_fica +ffffffff81da5f60 t df_v3_6_query_ras_poison_mode +ffffffff81da60d0 t df_v3_6_perfmon_arm_with_status +ffffffff81da7000 T dimgrey_cavefish_reg_base_init +ffffffff81da8000 T emu_soc_asic_init +ffffffff81da9000 t gfx_v10_0_early_init +ffffffff81da9420 t gfx_v10_0_late_init +ffffffff81da9490 t gfx_v10_0_sw_init +ffffffff81daa830 t gfx_v10_0_sw_fini +ffffffff81daab60 t gfx_v10_0_hw_init +ffffffff81dad710 t gfx_v10_0_hw_fini +ffffffff81dad9f0 t gfx_v10_0_suspend +ffffffff81dada30 t gfx_v10_0_resume +ffffffff81dada40 t gfx_v10_0_is_idle +ffffffff81dadac0 t gfx_v10_0_wait_for_idle +ffffffff81dadba0 t gfx_v10_0_soft_reset +ffffffff81dadef0 t gfx_v10_0_set_clockgating_state +ffffffff81dae190 t gfx_v10_0_set_powergating_state +ffffffff81dae3b0 t gfx_v10_0_get_clockgating_state +ffffffff81dae4c0 t gfx10_kiq_set_resources +ffffffff81dae7f0 t gfx10_kiq_map_queues +ffffffff81daeb80 t gfx10_kiq_unmap_queues +ffffffff81daef80 t gfx10_kiq_query_status +ffffffff81daf280 t gfx10_kiq_invalidate_tlbs +ffffffff81daf3a0 t gfx_v10_0_ring_get_rptr_compute +ffffffff81daf3d0 t gfx_v10_0_ring_get_wptr_compute +ffffffff81daf430 t gfx_v10_0_ring_set_wptr_compute +ffffffff81daf570 t gfx_v10_0_ring_emit_ib_compute +ffffffff81daf8c0 t gfx_v10_0_ring_emit_fence_kiq +ffffffff81dafcf0 t gfx_v10_0_ring_test_ring +ffffffff81daff60 t gfx_v10_0_ring_test_ib +ffffffff81db0200 t gfx_v10_0_ring_emit_rreg +ffffffff81db0490 t gfx_v10_0_ring_emit_wreg +ffffffff81db06c0 t gfx_v10_0_ring_emit_reg_wait +ffffffff81db0710 t gfx_v10_0_ring_emit_reg_write_reg_wait +ffffffff81db07a0 t gfx_v10_0_wait_reg_mem +ffffffff81db0ad0 t gfx_v10_0_ring_get_rptr_gfx +ffffffff81db0b00 t gfx_v10_0_ring_get_wptr_gfx +ffffffff81db0c10 t gfx_v10_0_ring_set_wptr_gfx +ffffffff81db0e20 t gfx_v10_0_ring_emit_ib_gfx +ffffffff81db14d0 t gfx_v10_0_ring_emit_fence +ffffffff81db18a0 t gfx_v10_0_ring_emit_pipeline_sync +ffffffff81db1900 t gfx_v10_0_ring_emit_vm_flush +ffffffff81db1ad0 t gfx_v10_0_ring_emit_hdp_flush +ffffffff81db1ba0 t gfx_v10_0_ring_emit_gds_switch +ffffffff81db1c80 t gfx_v10_0_ring_emit_init_cond_exec +ffffffff81db1eb0 t gfx_v10_0_ring_emit_patch_cond_exec +ffffffff81db1f70 t gfx_v10_0_ring_emit_sb +ffffffff81db2050 t gfx_v10_0_ring_emit_cntxcntl +ffffffff81db2530 t gfx_v10_0_ring_emit_frame_cntl +ffffffff81db2640 t gfx_v10_0_ring_soft_recovery +ffffffff81db26b0 t gfx_v10_0_ring_preempt_ib +ffffffff81db2820 t gfx_v10_0_emit_mem_sync +ffffffff81db2b60 t gfx_v10_0_write_data_to_reg +ffffffff81db2d70 t gfx_v10_0_set_eop_interrupt_state +ffffffff81db2e50 t gfx_v10_0_eop_irq +ffffffff81db3020 t gfx_v10_0_set_gfx_eop_interrupt_state +ffffffff81db31b0 t gfx_v10_0_set_compute_eop_interrupt_state +ffffffff81db3360 t gfx_v10_0_kiq_set_interrupt_state +ffffffff81db3630 t gfx_v10_0_kiq_irq +ffffffff81db36b0 t gfx_v10_0_set_priv_reg_fault_state +ffffffff81db37d0 t gfx_v10_0_priv_reg_irq +ffffffff81db3830 t gfx_v10_0_handle_priv_fault +ffffffff81db39c0 t gfx_v10_0_set_priv_inst_fault_state +ffffffff81db3ae0 t gfx_v10_0_priv_inst_irq +ffffffff81db3b40 t gfx_v10_0_is_rlc_enabled +ffffffff81db3bc0 t gfx_v10_0_set_safe_mode +ffffffff81db3e50 t gfx_v10_0_unset_safe_mode +ffffffff81db3f00 t gfx_v10_0_rlc_init +ffffffff81db3f70 t gfx_v10_0_get_csb_size +ffffffff81db3fc0 t gfx_v10_0_get_csb_buffer +ffffffff81db4140 t gfx_v10_0_rlc_resume +ffffffff81db4c40 t gfx_v10_0_rlc_stop +ffffffff81db4d10 t gfx_v10_0_rlc_reset +ffffffff81db4ea0 t gfx_v10_0_rlc_start +ffffffff81db5040 t gfx_v10_0_update_spm_vmid +ffffffff81db5170 t gfx_v10_0_wait_for_rlc_autoload_complete +ffffffff81db5d00 t gfx_v10_0_init_csb +ffffffff81db5fd0 t gfx_v10_0_is_rlcg_access_range +ffffffff81db6000 t gfx_v10_0_gfx_mqd_init +ffffffff81db63e0 t gfx_v10_0_compute_mqd_init +ffffffff81db6880 t amdgpu_bo_unreserve +ffffffff81db6960 t gfx_v10_0_get_gpu_clock_counter +ffffffff81db6e50 t gfx_v10_0_select_se_sh +ffffffff81db6ee0 t gfx_v10_0_read_wave_data +ffffffff81db7140 t gfx_v10_0_read_wave_vgprs +ffffffff81db7170 t gfx_v10_0_read_wave_sgprs +ffffffff81db71f0 t gfx_v10_0_select_me_pipe_q +ffffffff81db7210 t gfx_v10_0_init_spm_golden_registers +ffffffff81db7280 t gfx_v10_0_update_perfmon_mgcg +ffffffff81db73a0 t wave_read_ind +ffffffff81db7480 t wave_read_regs +ffffffff81db75e0 t gfx_v10_0_cp_resume +ffffffff81dba220 t gfx_v10_3_get_disabled_sa +ffffffff81dba330 t gfx_v10_0_get_rb_active_bitmap +ffffffff81dba450 t gfx_v10_0_get_wgp_active_bitmap_per_sh +ffffffff81dba560 t gfx_v10_0_enable_gui_idle_interrupt +ffffffff81dba670 t gfx_v10_0_cp_gfx_enable +ffffffff81dba8b0 t gfx_v10_0_cp_compute_enable +ffffffff81dbaa40 t amdgpu_bo_reserve +ffffffff81dbabc0 t gfx_v10_0_kiq_init_register +ffffffff81dbba30 t gfx_v10_0_cp_gfx_switch_pipe +ffffffff81dbbb30 t gfx_v10_0_cp_gfx_set_doorbell +ffffffff81dbbe00 t gfx_v10_0_cp_gfx_start +ffffffff81dbc7e0 t gfx_v10_0_update_fine_grain_clock_gating +ffffffff81dbcb00 t gfx_v10_0_update_medium_grain_clock_gating +ffffffff81dbd220 t gfx_v10_0_update_3d_clock_gating +ffffffff81dbd5e0 t gfx_v10_0_update_coarse_grain_clock_gating +ffffffff81dbe000 t gfx_v11_0_early_init +ffffffff81dbe390 t gfx_v11_0_late_init +ffffffff81dbe400 t gfx_v11_0_sw_init +ffffffff81dbf300 t gfx_v11_0_sw_fini +ffffffff81dbf5d0 t gfx_v11_0_hw_init +ffffffff81dc3a40 t gfx_v11_0_hw_fini +ffffffff81dc3cb0 t gfx_v11_0_suspend +ffffffff81dc3cf0 t gfx_v11_0_resume +ffffffff81dc3d00 t gfx_v11_0_is_idle +ffffffff81dc3d80 t gfx_v11_0_wait_for_idle +ffffffff81dc3e60 t gfx_v11_0_check_soft_reset +ffffffff81dc3f90 t gfx_v11_0_soft_reset +ffffffff81dc4c70 t gfx_v11_0_set_clockgating_state +ffffffff81dc5850 t gfx_v11_0_set_powergating_state +ffffffff81dc5a40 t gfx_v11_0_get_clockgating_state +ffffffff81dc5c10 t gfx11_kiq_set_resources +ffffffff81dc5f40 t gfx11_kiq_map_queues +ffffffff81dc62d0 t gfx11_kiq_unmap_queues +ffffffff81dc66d0 t gfx11_kiq_query_status +ffffffff81dc69d0 t gfx11_kiq_invalidate_tlbs +ffffffff81dc6af0 t gfx_v11_0_ring_get_rptr_compute +ffffffff81dc6b20 t gfx_v11_0_ring_get_wptr_compute +ffffffff81dc6b80 t gfx_v11_0_ring_set_wptr_compute +ffffffff81dc6cc0 t gfx_v11_0_ring_emit_ib_compute +ffffffff81dc7010 t gfx_v11_0_ring_emit_fence_kiq +ffffffff81dc7440 t gfx_v11_0_ring_test_ring +ffffffff81dc76d0 t gfx_v11_0_ring_test_ib +ffffffff81dc7990 t gfx_v11_0_ring_emit_rreg +ffffffff81dc7c20 t gfx_v11_0_ring_emit_wreg +ffffffff81dc7e50 t gfx_v11_0_ring_emit_reg_wait +ffffffff81dc7ea0 t gfx_v11_0_ring_emit_reg_write_reg_wait +ffffffff81dc7f00 t gfx_v11_0_wait_reg_mem +ffffffff81dc8230 t gfx_v11_0_ring_get_rptr_gfx +ffffffff81dc8260 t gfx_v11_0_ring_get_wptr_gfx +ffffffff81dc8370 t gfx_v11_0_ring_set_wptr_gfx +ffffffff81dc8580 t gfx_v11_0_ring_emit_ib_gfx +ffffffff81dc8c20 t gfx_v11_0_ring_emit_fence +ffffffff81dc8ff0 t gfx_v11_0_ring_emit_pipeline_sync +ffffffff81dc9050 t gfx_v11_0_ring_emit_vm_flush +ffffffff81dc9220 t gfx_v11_0_ring_emit_hdp_flush +ffffffff81dc92f0 t gfx_v11_0_ring_emit_gds_switch +ffffffff81dc93d0 t gfx_v11_0_ring_emit_init_cond_exec +ffffffff81dc9600 t gfx_v11_0_ring_emit_patch_cond_exec +ffffffff81dc96c0 t gfx_v11_0_ring_emit_cntxcntl +ffffffff81dc9820 t gfx_v11_0_ring_emit_frame_cntl +ffffffff81dc9930 t gfx_v11_0_ring_soft_recovery +ffffffff81dc99a0 t gfx_v11_0_ring_preempt_ib +ffffffff81dc9b10 t gfx_v11_0_emit_mem_sync +ffffffff81dc9e50 t gfx_v11_0_write_data_to_reg +ffffffff81dca060 t gfx_v11_0_set_eop_interrupt_state +ffffffff81dca0f0 t gfx_v11_0_eop_irq +ffffffff81dca2c0 t gfx_v11_0_set_gfx_eop_interrupt_state +ffffffff81dca450 t gfx_v11_0_set_compute_eop_interrupt_state +ffffffff81dca5e0 t gfx_v11_0_set_priv_reg_fault_state +ffffffff81dca700 t gfx_v11_0_priv_reg_irq +ffffffff81dca760 t gfx_v11_0_handle_priv_fault +ffffffff81dca8f0 t gfx_v11_0_set_priv_inst_fault_state +ffffffff81dcaa10 t gfx_v11_0_priv_inst_irq +ffffffff81dcaa70 t gfx_v11_0_is_rlc_enabled +ffffffff81dcaaf0 t gfx_v11_0_set_safe_mode +ffffffff81dcac40 t gfx_v11_0_unset_safe_mode +ffffffff81dcaca0 t gfx_v11_0_rlc_init +ffffffff81dcad10 t gfx_v11_0_get_csb_size +ffffffff81dcad60 t gfx_v11_0_get_csb_buffer +ffffffff81dcaee0 t gfx_v11_0_rlc_resume +ffffffff81dcbc00 t gfx_v11_0_rlc_stop +ffffffff81dcbcd0 t gfx_v11_0_rlc_reset +ffffffff81dcbe60 t gfx_v11_0_rlc_start +ffffffff81dcc000 t gfx_v11_0_update_spm_vmid +ffffffff81dcc100 t gfx_v11_0_init_csb +ffffffff81dcc280 t gfx_v11_0_gfx_mqd_init +ffffffff81dcc650 t gfx_v11_0_compute_mqd_init +ffffffff81dccb70 t amdgpu_bo_unreserve +ffffffff81dccc50 t gfx_v11_0_get_gpu_clock_counter +ffffffff81dccd80 t gfx_v11_0_select_se_sh +ffffffff81dcce10 t gfx_v11_0_read_wave_data +ffffffff81dcd050 t gfx_v11_0_read_wave_vgprs +ffffffff81dcd080 t gfx_v11_0_read_wave_sgprs +ffffffff81dcd100 t gfx_v11_0_select_me_pipe_q +ffffffff81dcd120 t gfx_v11_0_update_perf_clk +ffffffff81dcd250 t wave_read_ind +ffffffff81dcd330 t wave_read_regs +ffffffff81dcd490 t gfx_v11_0_disable_gpa_mode +ffffffff81dcd620 t gfx_v11_0_cp_resume +ffffffff81dd16c0 t gfx_v11_0_config_me_cache +ffffffff81dd1a60 t gfx_v11_0_config_pfp_cache +ffffffff81dd1e00 t gfx_v11_0_config_mec_cache +ffffffff81dd21a0 t gfx_v11_0_enable_gui_idle_interrupt +ffffffff81dd22b0 t gfx_v11_0_cp_compute_enable +ffffffff81dd2480 t gfx_v11_0_cp_gfx_enable +ffffffff81dd2670 t amdgpu_bo_reserve +ffffffff81dd27f0 t gfx_v11_0_kiq_init_register +ffffffff81dd3660 t gfx_v11_0_cp_gfx_switch_pipe +ffffffff81dd3740 t gfx_v11_0_cp_gfx_set_doorbell +ffffffff81dd3920 t gfx_v11_0_cp_gfx_start +ffffffff81dd5000 t gfx_v8_0_early_init +ffffffff81dd5310 t gfx_v8_0_late_init +ffffffff81dd5a10 t gfx_v8_0_sw_init +ffffffff81dd70e0 t gfx_v8_0_sw_fini +ffffffff81dd7390 t gfx_v8_0_hw_init +ffffffff81dd95c0 t gfx_v8_0_hw_fini +ffffffff81dd9ab0 t gfx_v8_0_suspend +ffffffff81dd9af0 t gfx_v8_0_resume +ffffffff81dd9b00 t gfx_v8_0_is_idle +ffffffff81dd9b70 t gfx_v8_0_wait_for_idle +ffffffff81dd9c10 t gfx_v8_0_check_soft_reset +ffffffff81dd9cf0 t gfx_v8_0_pre_soft_reset +ffffffff81dd9e70 t gfx_v8_0_soft_reset +ffffffff81dda020 t gfx_v8_0_post_soft_reset +ffffffff81dda1d0 t gfx_v8_0_set_clockgating_state +ffffffff81dda490 t gfx_v8_0_set_powergating_state +ffffffff81dda840 t gfx_v8_0_get_clockgating_state +ffffffff81dda920 t gfx_v8_0_get_gpu_clock_counter +ffffffff81dda9b0 t gfx_v8_0_select_se_sh +ffffffff81ddaa10 t gfx_v8_0_read_wave_data +ffffffff81ddaeb0 t gfx_v8_0_read_wave_sgprs +ffffffff81ddaf60 t gfx_v8_0_select_me_pipe_q +ffffffff81ddaf80 t gfx_v8_0_ring_get_rptr +ffffffff81ddafb0 t gfx_v8_0_ring_get_wptr_compute +ffffffff81ddafe0 t gfx_v8_0_ring_set_wptr_compute +ffffffff81ddb010 t gfx_v8_0_ring_emit_fence_kiq +ffffffff81ddb440 t gfx_v8_0_ring_test_ring +ffffffff81ddb640 t gfx_v8_0_ring_emit_rreg +ffffffff81ddb8d0 t gfx_v8_0_ring_emit_wreg +ffffffff81ddbb00 t gfx_v8_0_ring_get_wptr_gfx +ffffffff81ddbb50 t gfx_v8_0_ring_set_wptr_gfx +ffffffff81ddbbc0 t gfx_v8_0_ring_emit_ib_gfx +ffffffff81ddc120 t gfx_v8_0_ring_emit_fence_gfx +ffffffff81ddc620 t gfx_v8_0_ring_emit_pipeline_sync +ffffffff81ddc910 t gfx_v8_0_ring_emit_vm_flush +ffffffff81ddccc0 t gfx_v8_0_ring_emit_hdp_flush +ffffffff81ddcfe0 t gfx_v8_0_ring_emit_gds_switch +ffffffff81ddd7a0 t gfx_v8_0_ring_test_ib +ffffffff81ddd950 t gfx_v8_0_ring_emit_init_cond_exec +ffffffff81dddb80 t gfx_v8_0_ring_emit_patch_cond_exec +ffffffff81dddc30 t gfx_v8_ring_emit_sb +ffffffff81dddd10 t gfx_v8_ring_emit_cntxcntl +ffffffff81dde2b0 t gfx_v8_0_ring_soft_recovery +ffffffff81dde2d0 t gfx_v8_0_emit_mem_sync +ffffffff81dde4d0 t gfx_v8_0_ring_emit_ib_compute +ffffffff81dde7d0 t gfx_v8_0_ring_emit_fence_compute +ffffffff81ddead0 t gfx_v8_0_emit_mem_sync_compute +ffffffff81dded90 t gfx_v8_0_emit_wave_limit +ffffffff81ddef40 t gfx_v8_0_set_eop_interrupt_state +ffffffff81ddf150 t gfx_v8_0_eop_irq +ffffffff81ddf280 t gfx_v8_0_set_priv_reg_fault_state +ffffffff81ddf2f0 t gfx_v8_0_priv_reg_irq +ffffffff81ddf410 t gfx_v8_0_set_priv_inst_fault_state +ffffffff81ddf480 t gfx_v8_0_priv_inst_irq +ffffffff81ddf5a0 t gfx_v8_0_set_cp_ecc_int_state +ffffffff81ddf810 t gfx_v8_0_cp_ecc_error_irq +ffffffff81ddf850 t gfx_v8_0_set_sq_int_state +ffffffff81ddf8d0 t gfx_v8_0_sq_irq +ffffffff81ddf960 t gfx_v8_0_parse_sq_irq +ffffffff81ddfbb0 t gfx_v8_0_is_rlc_enabled +ffffffff81ddfbf0 t gfx_v8_0_set_safe_mode +ffffffff81ddfce0 t gfx_v8_0_unset_safe_mode +ffffffff81ddfd80 t gfx_v8_0_rlc_init +ffffffff81ddfe20 t gfx_v8_0_get_csb_size +ffffffff81ddfe70 t gfx_v8_0_get_csb_buffer +ffffffff81ddfff0 t gfx_v8_0_cp_jump_table_num +ffffffff81de0030 t gfx_v8_0_rlc_resume +ffffffff81de03b0 t gfx_v8_0_rlc_stop +ffffffff81de0420 t gfx_v8_0_rlc_reset +ffffffff81de04a0 t gfx_v8_0_rlc_start +ffffffff81de0520 t gfx_v8_0_update_spm_vmid +ffffffff81de0590 t gfx_v8_0_init_save_restore_list +ffffffff81de09b0 t gfx_v8_0_wait_for_rlc_serdes +ffffffff81de0bd0 t gfx_v8_0_sq_irq_work_func +ffffffff81de0bf0 t amdgpu_bo_unreserve +ffffffff81de0cd0 t gfx_v8_0_kiq_resume +ffffffff81de0f30 t gfx_v8_0_cp_gfx_resume +ffffffff81de1a50 t gfx_v8_0_kcq_resume +ffffffff81de2480 t amdgpu_bo_reserve +ffffffff81de2600 t gfx_v8_0_mqd_commit +ffffffff81de27e0 t gfx_v8_0_mqd_init +ffffffff81de2c00 t gfx_v8_0_deactivate_hqd +ffffffff81de2cc0 t gfx_v8_0_update_medium_grain_clock_gating +ffffffff81de2ff0 t gfx_v8_0_update_coarse_grain_clock_gating +ffffffff81de4000 t gfx_v9_0_ras_error_inject +ffffffff81de41a0 t gfx_v9_0_query_ras_error_count +ffffffff81de4d40 t gfx_v9_0_reset_ras_error_count +ffffffff81de5780 T gfx_v9_0_select_se_sh +ffffffff81de5820 t gfx_v9_0_early_init +ffffffff81de5c70 t gfx_v9_0_late_init +ffffffff81de6980 t gfx_v9_0_sw_init +ffffffff81de7fe0 t gfx_v9_0_sw_fini +ffffffff81de8280 t gfx_v9_0_hw_init +ffffffff81deb320 t gfx_v9_0_hw_fini +ffffffff81deba80 t gfx_v9_0_suspend +ffffffff81debac0 t gfx_v9_0_resume +ffffffff81debad0 t gfx_v9_0_is_idle +ffffffff81debb50 t gfx_v9_0_wait_for_idle +ffffffff81debc30 t gfx_v9_0_soft_reset +ffffffff81debfb0 t gfx_v9_0_set_clockgating_state +ffffffff81dec070 t gfx_v9_0_set_powergating_state +ffffffff81dec460 t gfx_v9_0_get_clockgating_state +ffffffff81dec570 t gfx_v9_0_kiq_set_resources +ffffffff81dec8a0 t gfx_v9_0_kiq_map_queues +ffffffff81decbe0 t gfx_v9_0_kiq_unmap_queues +ffffffff81decf60 t gfx_v9_0_kiq_query_status +ffffffff81ded260 t gfx_v9_0_kiq_invalidate_tlbs +ffffffff81ded380 t gfx_v9_0_ring_get_rptr_compute +ffffffff81ded3b0 t gfx_v9_0_ring_get_wptr_compute +ffffffff81ded410 t gfx_v9_0_ring_set_wptr_compute +ffffffff81ded470 t gfx_v9_0_ring_emit_fence_kiq +ffffffff81ded8a0 t gfx_v9_0_ring_test_ring +ffffffff81dedad0 t gfx_v9_0_ring_emit_rreg +ffffffff81dedd60 t gfx_v9_0_ring_emit_wreg +ffffffff81dedf90 t gfx_v9_0_ring_emit_reg_wait +ffffffff81dedfe0 t gfx_v9_0_ring_emit_reg_write_reg_wait +ffffffff81dee080 t gfx_v9_0_wait_reg_mem +ffffffff81dee3b0 t gfx_v9_0_ring_get_rptr_gfx +ffffffff81dee3e0 t gfx_v9_0_ring_get_wptr_gfx +ffffffff81dee4f0 t gfx_v9_0_ring_set_wptr_gfx +ffffffff81dee610 t gfx_v9_0_ring_emit_ib_gfx +ffffffff81deeb30 t gfx_v9_0_ring_emit_fence +ffffffff81deeef0 t gfx_v9_0_ring_emit_pipeline_sync +ffffffff81deef50 t gfx_v9_0_ring_emit_vm_flush +ffffffff81def060 t gfx_v9_0_ring_emit_hdp_flush +ffffffff81def130 t gfx_v9_0_ring_emit_gds_switch +ffffffff81def210 t gfx_v9_0_ring_test_ib +ffffffff81def3c0 t gfx_v9_0_ring_emit_init_cond_exec +ffffffff81def5f0 t gfx_v9_0_ring_emit_patch_cond_exec +ffffffff81def6c0 t gfx_v9_ring_emit_sb +ffffffff81def7a0 t gfx_v9_ring_emit_cntxcntl +ffffffff81defb90 t gfx_v9_0_ring_emit_frame_cntl +ffffffff81defca0 t gfx_v9_0_ring_soft_recovery +ffffffff81defd10 t gfx_v9_0_emit_mem_sync +ffffffff81deffd0 t gfx_v9_0_write_data_to_reg +ffffffff81df01e0 t gfx_v9_0_ring_emit_ib_compute +ffffffff81df0510 t gfx_v9_0_emit_wave_limit +ffffffff81df06e0 t gfx_v9_0_set_eop_interrupt_state +ffffffff81df08b0 t gfx_v9_0_eop_irq +ffffffff81df09e0 t gfx_v9_0_set_compute_eop_interrupt_state +ffffffff81df0b90 t gfx_v9_0_set_priv_reg_fault_state +ffffffff81df0cb0 t gfx_v9_0_priv_reg_irq +ffffffff81df0dd0 t gfx_v9_0_set_priv_inst_fault_state +ffffffff81df0ef0 t gfx_v9_0_priv_inst_irq +ffffffff81df1010 t gfx_v9_0_set_cp_ecc_error_state +ffffffff81df1840 t gfx_v9_0_is_rlc_enabled +ffffffff81df18c0 t gfx_v9_0_set_safe_mode +ffffffff81df1a10 t gfx_v9_0_unset_safe_mode +ffffffff81df1a70 t gfx_v9_0_rlc_init +ffffffff81df2280 t gfx_v9_0_get_csb_size +ffffffff81df22d0 t gfx_v9_0_get_csb_buffer +ffffffff81df2420 t gfx_v9_0_cp_jump_table_num +ffffffff81df2470 t gfx_v9_0_rlc_resume +ffffffff81df3200 t gfx_v9_0_rlc_stop +ffffffff81df3690 t gfx_v9_0_rlc_reset +ffffffff81df3820 t gfx_v9_0_rlc_start +ffffffff81df3960 t gfx_v9_0_update_spm_vmid +ffffffff81df3a90 t gfx_v9_0_is_rlcg_access_range +ffffffff81df3ae0 t gfx_v9_0_init_always_on_cu_mask +ffffffff81df3e40 t gfx_v9_0_init_csb +ffffffff81df3fd0 t gfx_v9_0_enable_lbpw +ffffffff81df40c0 t gfx_v9_0_enable_gui_idle_interrupt +ffffffff81df41c0 t amdgpu_bo_unreserve +ffffffff81df42a0 t gfx_v9_0_get_gpu_clock_counter +ffffffff81df4a20 t gfx_v9_0_read_wave_data +ffffffff81df4c60 t gfx_v9_0_read_wave_vgprs +ffffffff81df4c80 t gfx_v9_0_read_wave_sgprs +ffffffff81df4cd0 t gfx_v9_0_select_me_pipe_q +ffffffff81df4cf0 t wave_read_ind +ffffffff81df4e00 t wave_read_regs +ffffffff81df4f70 t gfx_v9_0_cp_gfx_enable +ffffffff81df5050 t amdgpu_bo_reserve +ffffffff81df51d0 t gfx_v9_0_kiq_init_register +ffffffff81df5e50 t gfx_v9_0_mqd_init +ffffffff81df6390 t gfx_v9_0_update_medium_grain_clock_gating +ffffffff81df68a0 t gfx_v9_0_update_3d_clock_gating +ffffffff81df6c80 t gfx_v9_0_update_coarse_grain_clock_gating +ffffffff81df8000 t gfx_v9_4_ras_error_inject +ffffffff81df8130 t gfx_v9_4_query_ras_error_count +ffffffff81df8ef0 t gfx_v9_4_query_ras_error_status +ffffffff81df90b0 t gfx_v9_4_reset_ras_error_count +ffffffff81dfa000 T gfx_v9_4_2_do_edc_gpr_workarounds +ffffffff81dfa790 T gfx_v9_4_2_init_golden_registers +ffffffff81dfa820 T gfx_v9_4_2_debug_trap_config_init +ffffffff81dfa8c0 T gfx_v9_4_2_set_power_brake_sequence +ffffffff81dfaa90 t gfx_v9_4_2_ras_error_inject +ffffffff81dfabc0 t gfx_v9_4_2_query_ras_error_count +ffffffff81dfac70 t gfx_v9_4_2_query_ras_error_status +ffffffff81dfb4b0 t gfx_v9_4_2_reset_ras_error_count +ffffffff81dfb510 t gfx_v9_4_2_reset_ras_error_status +ffffffff81dfb9d0 t gfx_v9_4_2_enable_watchdog_timer +ffffffff81dfbbf0 t gfx_v9_4_2_query_uctl2_poison_status +ffffffff81dfbc70 t gfx_v9_4_2_run_shader +ffffffff81dfbff0 t gfx_v9_4_2_wait_for_waves_assigned +ffffffff81dfc630 t gfx_v9_4_2_query_sram_edc_count +ffffffff81dfc980 t gfx_v9_4_2_query_utc_edc_count +ffffffff81dfcb60 t wave_read_ind +ffffffff81dfd000 t gfxhub_v1_0_get_mc_fb_offset +ffffffff81dfd080 t gfxhub_v1_0_setup_vm_pt_regs +ffffffff81dfd1b0 t gfxhub_v1_0_gart_enable +ffffffff81dfe690 t gfxhub_v1_0_gart_disable +ffffffff81dfe910 t gfxhub_v1_0_set_fault_enable_default +ffffffff81dfea00 t gfxhub_v1_0_init +ffffffff81dff000 T gfxhub_v1_1_get_xgmi_info +ffffffff81e00000 t gfxhub_v2_0_get_fb_location +ffffffff81e00090 t gfxhub_v2_0_get_mc_fb_offset +ffffffff81e00110 t gfxhub_v2_0_setup_vm_pt_regs +ffffffff81e00240 t gfxhub_v2_0_gart_enable +ffffffff81e01440 t gfxhub_v2_0_gart_disable +ffffffff81e01670 t gfxhub_v2_0_set_fault_enable_default +ffffffff81e01760 t gfxhub_v2_0_init +ffffffff81e01820 t gfxhub_v2_0_print_l2_protection_fault_status +ffffffff81e01a00 t gfxhub_v2_0_get_invalidate_req +ffffffff81e02000 t gfxhub_v2_1_get_fb_location +ffffffff81e02090 t gfxhub_v2_1_get_mc_fb_offset +ffffffff81e02110 t gfxhub_v2_1_setup_vm_pt_regs +ffffffff81e02240 t gfxhub_v2_1_gart_enable +ffffffff81e03520 t gfxhub_v2_1_gart_disable +ffffffff81e037a0 t gfxhub_v2_1_set_fault_enable_default +ffffffff81e038b0 t gfxhub_v2_1_init +ffffffff81e03970 t gfxhub_v2_1_get_xgmi_info +ffffffff81e03aa0 t gfxhub_v2_1_utcl2_harvest +ffffffff81e03c70 t gfxhub_v2_1_save_regs +ffffffff81e046a0 t gfxhub_v2_1_restore_regs +ffffffff81e05270 t gfxhub_v2_1_halt +ffffffff81e05630 t gfxhub_v2_1_print_l2_protection_fault_status +ffffffff81e05810 t gfxhub_v2_1_get_invalidate_req +ffffffff81e06000 t gfxhub_v3_0_get_fb_location +ffffffff81e06090 t gfxhub_v3_0_get_mc_fb_offset +ffffffff81e06110 t gfxhub_v3_0_setup_vm_pt_regs +ffffffff81e06240 t gfxhub_v3_0_gart_enable +ffffffff81e074c0 t gfxhub_v3_0_gart_disable +ffffffff81e07740 t gfxhub_v3_0_set_fault_enable_default +ffffffff81e07ae0 t gfxhub_v3_0_init +ffffffff81e07ba0 t gfxhub_v3_0_print_l2_protection_fault_status +ffffffff81e07d80 t gfxhub_v3_0_get_invalidate_req +ffffffff81e08000 t gfxhub_v3_0_3_get_fb_location +ffffffff81e08090 t gfxhub_v3_0_3_get_mc_fb_offset +ffffffff81e08110 t gfxhub_v3_0_3_setup_vm_pt_regs +ffffffff81e08240 t gfxhub_v3_0_3_gart_enable +ffffffff81e094c0 t gfxhub_v3_0_3_gart_disable +ffffffff81e09760 t gfxhub_v3_0_3_set_fault_enable_default +ffffffff81e09870 t gfxhub_v3_0_3_init +ffffffff81e09930 t gfxhub_v3_0_3_print_l2_protection_fault_status +ffffffff81e09b10 t gfxhub_v3_0_3_get_invalidate_req +ffffffff81e0a000 t gmc_v10_0_early_init +ffffffff81e0a1f0 t gmc_v10_0_late_init +ffffffff81e0a260 t gmc_v10_0_sw_init +ffffffff81e0a680 t gmc_v10_0_sw_fini +ffffffff81e0a6d0 t gmc_v10_0_hw_init +ffffffff81e0a890 t gmc_v10_0_hw_fini +ffffffff81e0a930 t gmc_v10_0_suspend +ffffffff81e0a9d0 t gmc_v10_0_resume +ffffffff81e0aa20 t gmc_v10_0_is_idle +ffffffff81e0aa50 t gmc_v10_0_wait_for_idle +ffffffff81e0aa80 t gmc_v10_0_soft_reset +ffffffff81e0aab0 t gmc_v10_0_set_clockgating_state +ffffffff81e0ab60 t gmc_v10_0_set_powergating_state +ffffffff81e0ab90 t gmc_v10_0_get_clockgating_state +ffffffff81e0ac30 t gmc_v10_0_flush_gpu_tlb +ffffffff81e0aed0 t gmc_v10_0_flush_gpu_tlb_pasid +ffffffff81e0b0f0 t gmc_v10_0_emit_flush_gpu_tlb +ffffffff81e0b2a0 t gmc_v10_0_emit_pasid_mapping +ffffffff81e0b300 t gmc_v10_0_map_mtype +ffffffff81e0b350 t gmc_v10_0_get_vm_pde +ffffffff81e0b440 t gmc_v10_0_get_vm_pte +ffffffff81e0b4e0 t gmc_v10_0_get_vbios_fb_size +ffffffff81e0b640 t gmc_v10_0_flush_vm_hub +ffffffff81e0baa0 t gmc_v10_0_vm_fault_interrupt_state +ffffffff81e0bb10 t gmc_v10_0_process_interrupt +ffffffff81e0bdd0 t gmc_v10_0_ecc_interrupt_state +ffffffff81e0c000 t gmc_v11_0_early_init +ffffffff81e0c220 t gmc_v11_0_late_init +ffffffff81e0c290 t gmc_v11_0_sw_init +ffffffff81e0c5b0 t gmc_v11_0_sw_fini +ffffffff81e0c600 t gmc_v11_0_hw_init +ffffffff81e0c740 t gmc_v11_0_hw_fini +ffffffff81e0c7d0 t gmc_v11_0_suspend +ffffffff81e0c860 t gmc_v11_0_resume +ffffffff81e0c8b0 t gmc_v11_0_is_idle +ffffffff81e0c8e0 t gmc_v11_0_wait_for_idle +ffffffff81e0c910 t gmc_v11_0_soft_reset +ffffffff81e0c940 t gmc_v11_0_set_clockgating_state +ffffffff81e0c9b0 t gmc_v11_0_set_powergating_state +ffffffff81e0c9e0 t gmc_v11_0_get_clockgating_state +ffffffff81e0ca10 t gmc_v11_0_flush_gpu_tlb +ffffffff81e0cee0 t gmc_v11_0_flush_gpu_tlb_pasid +ffffffff81e0d0d0 t gmc_v11_0_emit_flush_gpu_tlb +ffffffff81e0d270 t gmc_v11_0_emit_pasid_mapping +ffffffff81e0d2d0 t gmc_v11_0_map_mtype +ffffffff81e0d320 t gmc_v11_0_get_vm_pde +ffffffff81e0d410 t gmc_v11_0_get_vm_pte +ffffffff81e0d4b0 t gmc_v11_0_get_vbios_fb_size +ffffffff81e0d4e0 t gmc_v11_0_vm_fault_interrupt_state +ffffffff81e0d550 t gmc_v11_0_process_interrupt +ffffffff81e0d770 t gmc_v11_0_ecc_interrupt_state +ffffffff81e0e000 t gmc_v7_0_early_init +ffffffff81e0e090 t gmc_v7_0_late_init +ffffffff81e0e0d0 t gmc_v7_0_sw_init +ffffffff81e0e5d0 t gmc_v7_0_sw_fini +ffffffff81e0e680 t gmc_v7_0_hw_init +ffffffff81e0f030 t gmc_v7_0_hw_fini +ffffffff81e0f0f0 t gmc_v7_0_suspend +ffffffff81e0f130 t gmc_v7_0_resume +ffffffff81e0f180 t gmc_v7_0_is_idle +ffffffff81e0f1c0 t gmc_v7_0_wait_for_idle +ffffffff81e0f250 t gmc_v7_0_soft_reset +ffffffff81e0f4b0 t gmc_v7_0_set_clockgating_state +ffffffff81e0f710 t gmc_v7_0_set_powergating_state +ffffffff81e0f740 t gmc_v7_0_flush_gpu_tlb +ffffffff81e0f760 t gmc_v7_0_flush_gpu_tlb_pasid +ffffffff81e0f820 t gmc_v7_0_emit_flush_gpu_tlb +ffffffff81e0f8b0 t gmc_v7_0_emit_pasid_mapping +ffffffff81e0f8d0 t gmc_v7_0_set_prt +ffffffff81e0fa80 t gmc_v7_0_get_vm_pde +ffffffff81e0fae0 t gmc_v7_0_get_vm_pte +ffffffff81e0fb20 t gmc_v7_0_get_vbios_fb_size +ffffffff81e0fb90 t gmc_v7_0_vm_fault_interrupt_state +ffffffff81e0fc60 t gmc_v7_0_process_interrupt +ffffffff81e10000 t gmc_v8_0_early_init +ffffffff81e10090 t gmc_v8_0_late_init +ffffffff81e100d0 t gmc_v8_0_sw_init +ffffffff81e10750 t gmc_v8_0_sw_fini +ffffffff81e10800 t gmc_v8_0_hw_init +ffffffff81e114b0 t gmc_v8_0_hw_fini +ffffffff81e11570 t gmc_v8_0_suspend +ffffffff81e115b0 t gmc_v8_0_resume +ffffffff81e11600 t gmc_v8_0_is_idle +ffffffff81e11640 t gmc_v8_0_wait_for_idle +ffffffff81e116d0 t gmc_v8_0_check_soft_reset +ffffffff81e11740 t gmc_v8_0_pre_soft_reset +ffffffff81e118b0 t gmc_v8_0_soft_reset +ffffffff81e11970 t gmc_v8_0_post_soft_reset +ffffffff81e119e0 t gmc_v8_0_set_clockgating_state +ffffffff81e11f90 t gmc_v8_0_set_powergating_state +ffffffff81e11fc0 t gmc_v8_0_get_clockgating_state +ffffffff81e12030 t gmc_v8_0_flush_gpu_tlb +ffffffff81e12050 t gmc_v8_0_flush_gpu_tlb_pasid +ffffffff81e12110 t gmc_v8_0_emit_flush_gpu_tlb +ffffffff81e121a0 t gmc_v8_0_emit_pasid_mapping +ffffffff81e121c0 t gmc_v8_0_set_prt +ffffffff81e12370 t gmc_v8_0_get_vm_pde +ffffffff81e123d0 t gmc_v8_0_get_vm_pte +ffffffff81e12420 t gmc_v8_0_get_vbios_fb_size +ffffffff81e12490 t gmc_v8_0_vm_fault_interrupt_state +ffffffff81e12560 t gmc_v8_0_process_interrupt +ffffffff81e13000 T gmc_v9_0_restore_registers +ffffffff81e13150 t gmc_v9_0_early_init +ffffffff81e13500 t gmc_v9_0_late_init +ffffffff81e13600 t gmc_v9_0_sw_init +ffffffff81e13cb0 t gmc_v9_0_sw_fini +ffffffff81e13d20 t gmc_v9_0_hw_init +ffffffff81e14110 t gmc_v9_0_hw_fini +ffffffff81e141d0 t gmc_v9_0_suspend +ffffffff81e14290 t gmc_v9_0_resume +ffffffff81e142e0 t gmc_v9_0_is_idle +ffffffff81e14310 t gmc_v9_0_wait_for_idle +ffffffff81e14340 t gmc_v9_0_soft_reset +ffffffff81e14370 t gmc_v9_0_set_clockgating_state +ffffffff81e143d0 t gmc_v9_0_set_powergating_state +ffffffff81e14400 t gmc_v9_0_get_clockgating_state +ffffffff81e14430 t gmc_v9_0_flush_gpu_tlb +ffffffff81e14a70 t gmc_v9_0_flush_gpu_tlb_pasid +ffffffff81e14d40 t gmc_v9_0_emit_flush_gpu_tlb +ffffffff81e14f10 t gmc_v9_0_emit_pasid_mapping +ffffffff81e14f80 t gmc_v9_0_map_mtype +ffffffff81e14fc0 t gmc_v9_0_get_vm_pde +ffffffff81e150c0 t gmc_v9_0_get_vm_pte +ffffffff81e15190 t gmc_v9_0_get_vbios_fb_size +ffffffff81e15320 t gmc_v9_0_vm_fault_interrupt_state +ffffffff81e156a0 t gmc_v9_0_process_interrupt +ffffffff81e15ce0 t gmc_v9_0_ecc_interrupt_state +ffffffff81e16000 t hdp_v4_0_query_ras_error_count +ffffffff81e160b0 t hdp_v4_0_reset_ras_error_count +ffffffff81e161c0 t hdp_v4_0_flush_hdp +ffffffff81e16210 t hdp_v4_0_invalidate_hdp +ffffffff81e162d0 t hdp_v4_0_update_clock_gating +ffffffff81e163d0 t hdp_v4_0_get_clockgating_state +ffffffff81e16420 t hdp_v4_0_init_registers +ffffffff81e17000 t hdp_v5_0_flush_hdp +ffffffff81e17050 t hdp_v5_0_invalidate_hdp +ffffffff81e170f0 t hdp_v5_0_update_clock_gating +ffffffff81e174e0 t hdp_v5_0_get_clockgating_state +ffffffff81e17600 t hdp_v5_0_init_registers +ffffffff81e18000 t hdp_v5_2_flush_hdp +ffffffff81e18050 t hdp_v5_2_update_clock_gating +ffffffff81e18440 t hdp_v5_2_get_clockgating_state +ffffffff81e19000 t hdp_v6_0_flush_hdp +ffffffff81e19050 t hdp_v6_0_update_clock_gating +ffffffff81e19360 t hdp_v6_0_get_clockgating_state +ffffffff81e1a000 t iceland_ih_early_init +ffffffff81e1a050 t iceland_ih_sw_init +ffffffff81e1a0b0 t iceland_ih_sw_fini +ffffffff81e1a0f0 t iceland_ih_hw_init +ffffffff81e1a310 t iceland_ih_hw_fini +ffffffff81e1a3e0 t iceland_ih_suspend +ffffffff81e1a4b0 t iceland_ih_resume +ffffffff81e1a4f0 t iceland_ih_is_idle +ffffffff81e1a530 t iceland_ih_wait_for_idle +ffffffff81e1a5c0 t iceland_ih_soft_reset +ffffffff81e1a6a0 t iceland_ih_set_clockgating_state +ffffffff81e1a6d0 t iceland_ih_set_powergating_state +ffffffff81e1a700 t iceland_ih_get_wptr +ffffffff81e1a7f0 t iceland_ih_decode_iv +ffffffff81e1a860 t iceland_ih_set_rptr +ffffffff81e1b000 t ih_v6_0_early_init +ffffffff81e1b050 t ih_v6_0_sw_init +ffffffff81e1b1b0 t ih_v6_0_sw_fini +ffffffff81e1b1f0 t ih_v6_0_hw_init +ffffffff81e1b7a0 t ih_v6_0_hw_fini +ffffffff81e1b800 t ih_v6_0_suspend +ffffffff81e1b860 t ih_v6_0_resume +ffffffff81e1b870 t ih_v6_0_is_idle +ffffffff81e1b8a0 t ih_v6_0_wait_for_idle +ffffffff81e1b8d0 t ih_v6_0_soft_reset +ffffffff81e1b900 t ih_v6_0_set_clockgating_state +ffffffff81e1ba20 t ih_v6_0_set_powergating_state +ffffffff81e1bb90 t ih_v6_0_get_clockgating_state +ffffffff81e1bc20 t ih_v6_0_get_wptr +ffffffff81e1bd10 t ih_v6_0_set_rptr +ffffffff81e1bdd0 t ih_v6_0_self_irq +ffffffff81e1be30 t ih_v6_0_toggle_interrupts +ffffffff81e1c010 t force_update_wptr_for_self_int +ffffffff81e1d000 t imu_v11_0_init_microcode +ffffffff81e1d1f0 t imu_v11_0_load_microcode +ffffffff81e1d550 t imu_v11_0_setup +ffffffff81e1d7d0 t imu_v11_0_start +ffffffff81e1d8c0 t imu_v11_0_program_rlc_ram +ffffffff81e1da70 t imu_v11_0_wait_for_reset_status +ffffffff81e1dbb0 t program_imu_rlc_ram +ffffffff81e1e000 T imu_v11_0_3_program_rlc_ram +ffffffff81e1f000 T jpeg_v1_0_early_init +ffffffff81e1f060 T jpeg_v1_0_sw_init +ffffffff81e1f130 T jpeg_v1_0_sw_fini +ffffffff81e1f150 T jpeg_v1_0_start +ffffffff81e1fbc0 t jpeg_v1_0_decode_ring_get_rptr +ffffffff81e1fc40 t jpeg_v1_0_decode_ring_get_wptr +ffffffff81e1fcc0 t jpeg_v1_0_decode_ring_set_wptr +ffffffff81e1fd30 t jpeg_v1_0_decode_ring_emit_ib +ffffffff81e20640 t jpeg_v1_0_decode_ring_emit_fence +ffffffff81e20f90 t jpeg_v1_0_decode_ring_emit_vm_flush +ffffffff81e21000 t jpeg_v1_0_decode_ring_nop +ffffffff81e21160 t jpeg_v1_0_decode_ring_insert_start +ffffffff81e21320 t jpeg_v1_0_decode_ring_insert_end +ffffffff81e214e0 t jpeg_v1_0_ring_begin_use +ffffffff81e215e0 t jpeg_v1_0_decode_ring_emit_wreg +ffffffff81e21840 t jpeg_v1_0_decode_ring_emit_reg_wait +ffffffff81e21c50 t jpeg_v1_0_set_interrupt_state +ffffffff81e21c80 t jpeg_v1_0_process_interrupt +ffffffff81e22000 T jpeg_v2_0_dec_ring_insert_start +ffffffff81e221a0 T jpeg_v2_0_dec_ring_insert_end +ffffffff81e22340 T jpeg_v2_0_dec_ring_emit_fence +ffffffff81e22a30 T jpeg_v2_0_dec_ring_emit_ib +ffffffff81e23210 T jpeg_v2_0_dec_ring_emit_reg_wait +ffffffff81e235d0 T jpeg_v2_0_dec_ring_emit_vm_flush +ffffffff81e23640 T jpeg_v2_0_dec_ring_emit_wreg +ffffffff81e23880 T jpeg_v2_0_dec_ring_nop +ffffffff81e239e0 t jpeg_v2_0_early_init +ffffffff81e23a50 t jpeg_v2_0_sw_init +ffffffff81e23b60 t jpeg_v2_0_sw_fini +ffffffff81e23bb0 t jpeg_v2_0_hw_init +ffffffff81e23c30 t jpeg_v2_0_hw_fini +ffffffff81e23d00 t jpeg_v2_0_suspend +ffffffff81e23d20 t jpeg_v2_0_resume +ffffffff81e23db0 t jpeg_v2_0_is_idle +ffffffff81e23e30 t jpeg_v2_0_wait_for_idle +ffffffff81e23f20 t jpeg_v2_0_set_clockgating_state +ffffffff81e23fd0 t jpeg_v2_0_set_powergating_state +ffffffff81e247d0 t jpeg_v2_0_dec_ring_get_rptr +ffffffff81e24850 t jpeg_v2_0_dec_ring_get_wptr +ffffffff81e248f0 t jpeg_v2_0_dec_ring_set_wptr +ffffffff81e24980 t jpeg_v2_0_set_interrupt_state +ffffffff81e249b0 t jpeg_v2_0_process_interrupt +ffffffff81e24a40 t jpeg_v2_0_enable_clock_gating +ffffffff81e24be0 t jpeg_v2_0_disable_clock_gating +ffffffff81e25000 t jpeg_v2_6_query_ras_poison_status +ffffffff81e25140 t jpeg_v2_5_early_init +ffffffff81e25410 t jpeg_v2_5_sw_init +ffffffff81e25630 t jpeg_v2_5_sw_fini +ffffffff81e25680 t jpeg_v2_5_hw_init +ffffffff81e25770 t jpeg_v2_5_hw_fini +ffffffff81e258b0 t jpeg_v2_5_suspend +ffffffff81e258d0 t jpeg_v2_5_resume +ffffffff81e259d0 t jpeg_v2_5_is_idle +ffffffff81e25ac0 t jpeg_v2_5_wait_for_idle +ffffffff81e25bf0 t jpeg_v2_5_set_clockgating_state +ffffffff81e25d60 t jpeg_v2_5_set_powergating_state +ffffffff81e26440 t jpeg_v2_5_dec_ring_get_rptr +ffffffff81e264d0 t jpeg_v2_5_dec_ring_get_wptr +ffffffff81e26580 t jpeg_v2_5_dec_ring_set_wptr +ffffffff81e26620 t jpeg_v2_6_dec_ring_insert_start +ffffffff81e267e0 t jpeg_v2_6_dec_ring_insert_end +ffffffff81e269a0 t jpeg_v2_5_set_interrupt_state +ffffffff81e269d0 t jpeg_v2_5_process_interrupt +ffffffff81e26ab0 t jpeg_v2_5_enable_clock_gating +ffffffff81e26b80 t jpeg_v2_5_disable_clock_gating +ffffffff81e27000 t jpeg_v3_0_early_init +ffffffff81e270e0 t jpeg_v3_0_sw_init +ffffffff81e271f0 t jpeg_v3_0_sw_fini +ffffffff81e27240 t jpeg_v3_0_hw_init +ffffffff81e272c0 t jpeg_v3_0_hw_fini +ffffffff81e27390 t jpeg_v3_0_suspend +ffffffff81e273b0 t jpeg_v3_0_resume +ffffffff81e27440 t jpeg_v3_0_is_idle +ffffffff81e274c0 t jpeg_v3_0_wait_for_idle +ffffffff81e275b0 t jpeg_v3_0_set_clockgating_state +ffffffff81e27660 t jpeg_v3_0_set_powergating_state +ffffffff81e27f10 t jpeg_v3_0_dec_ring_get_rptr +ffffffff81e27f90 t jpeg_v3_0_dec_ring_get_wptr +ffffffff81e28030 t jpeg_v3_0_dec_ring_set_wptr +ffffffff81e280c0 t jpeg_v3_0_set_interrupt_state +ffffffff81e280f0 t jpeg_v3_0_process_interrupt +ffffffff81e28180 t jpeg_v3_0_enable_clock_gating +ffffffff81e28250 t jpeg_v3_0_disable_clock_gating +ffffffff81e29000 t jpeg_v4_0_early_init +ffffffff81e29080 t jpeg_v4_0_sw_init +ffffffff81e29190 t jpeg_v4_0_sw_fini +ffffffff81e291e0 t jpeg_v4_0_hw_init +ffffffff81e292f0 t jpeg_v4_0_hw_fini +ffffffff81e293c0 t jpeg_v4_0_suspend +ffffffff81e293e0 t jpeg_v4_0_resume +ffffffff81e29430 t jpeg_v4_0_is_idle +ffffffff81e294b0 t jpeg_v4_0_wait_for_idle +ffffffff81e295a0 t jpeg_v4_0_set_clockgating_state +ffffffff81e29650 t jpeg_v4_0_set_powergating_state +ffffffff81e29e50 t jpeg_v4_0_dec_ring_get_rptr +ffffffff81e29ed0 t jpeg_v4_0_dec_ring_get_wptr +ffffffff81e29f70 t jpeg_v4_0_dec_ring_set_wptr +ffffffff81e2a010 t jpeg_v4_0_set_interrupt_state +ffffffff81e2a040 t jpeg_v4_0_process_interrupt +ffffffff81e2a0e0 t jpeg_v4_0_enable_clock_gating +ffffffff81e2a290 t jpeg_v4_0_disable_clock_gating +ffffffff81e2b000 t lsdma_v6_0_copy_mem +ffffffff81e2b350 t lsdma_v6_0_fill_mem +ffffffff81e2b630 t lsdma_v6_0_update_memory_power_gating +ffffffff81e2c000 t mca_v3_0_mp0_query_ras_error_count +ffffffff81e2c020 t mca_v3_0_ras_block_match +ffffffff81e2c060 t mca_v3_0_mp1_query_ras_error_count +ffffffff81e2c080 t mca_v3_0_mpio_query_ras_error_count +ffffffff81e2c0a0 t mca_v3_0_init +ffffffff81e2d000 t mes_v10_0_late_init +ffffffff81e2d040 t mes_v10_1_sw_init +ffffffff81e2d640 t mes_v10_1_sw_fini +ffffffff81e2d7c0 t mes_v10_1_hw_init +ffffffff81e2e060 t mes_v10_1_hw_fini +ffffffff81e2e120 t mes_v10_1_suspend +ffffffff81e2e1f0 t mes_v10_1_resume +ffffffff81e2e240 t mes_v10_1_kiq_hw_init +ffffffff81e2e640 t mes_v10_1_add_hw_queue +ffffffff81e2e7b0 t mes_v10_1_remove_hw_queue +ffffffff81e2e840 t mes_v10_1_unmap_legacy_queue +ffffffff81e2e920 t mes_v10_1_suspend_gang +ffffffff81e2e950 t mes_v10_1_resume_gang +ffffffff81e2e980 t mes_v10_1_submit_pkt_and_poll_completion +ffffffff81e2eb80 t mes_v10_1_load_microcode +ffffffff81e2f370 t mes_v10_1_enable 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mes_v11_0_queue_init +ffffffff81e33580 t amdgpu_bo_unreserve +ffffffff81e33660 t mes_v11_0_mqd_init +ffffffff81e33860 t mes_v11_0_ring_get_rptr +ffffffff81e33890 t mes_v11_0_ring_get_wptr +ffffffff81e338f0 t mes_v11_0_ring_set_wptr +ffffffff81e34000 t mmhub_v1_0_query_ras_error_count +ffffffff81e34150 t mmhub_v1_0_reset_ras_error_count +ffffffff81e341f0 t mmhub_v1_0_get_fb_location +ffffffff81e34300 t mmhub_v1_0_init +ffffffff81e343b0 t mmhub_v1_0_gart_enable +ffffffff81e356e0 t mmhub_v1_0_set_fault_enable_default +ffffffff81e357f0 t mmhub_v1_0_gart_disable +ffffffff81e35a70 t mmhub_v1_0_set_clockgating +ffffffff81e35ef0 t mmhub_v1_0_get_clockgating +ffffffff81e36010 t mmhub_v1_0_setup_vm_pt_regs +ffffffff81e36140 t mmhub_v1_0_update_power_gating +ffffffff81e37000 t mmhub_v1_7_query_ras_error_count +ffffffff81e37150 t mmhub_v1_7_query_ras_error_status +ffffffff81e37230 t mmhub_v1_7_reset_ras_error_count +ffffffff81e372d0 t mmhub_v1_7_reset_ras_error_status +ffffffff81e373c0 t mmhub_v1_7_get_fb_location +ffffffff81e374d0 t mmhub_v1_7_init +ffffffff81e37570 t mmhub_v1_7_gart_enable +ffffffff81e38a50 t mmhub_v1_7_set_fault_enable_default +ffffffff81e38b60 t mmhub_v1_7_gart_disable +ffffffff81e38de0 t mmhub_v1_7_set_clockgating +ffffffff81e39150 t mmhub_v1_7_get_clockgating +ffffffff81e39270 t mmhub_v1_7_setup_vm_pt_regs +ffffffff81e3a000 t mmhub_v2_0_init +ffffffff81e3a0c0 t mmhub_v2_0_gart_enable +ffffffff81e3b240 t mmhub_v2_0_set_fault_enable_default +ffffffff81e3b350 t mmhub_v2_0_gart_disable +ffffffff81e3b5d0 t mmhub_v2_0_set_clockgating +ffffffff81e3b910 t mmhub_v2_0_get_clockgating +ffffffff81e3baa0 t mmhub_v2_0_setup_vm_pt_regs +ffffffff81e3bbe0 t mmhub_v2_0_print_l2_protection_fault_status +ffffffff81e3be40 t mmhub_v2_0_get_invalidate_req +ffffffff81e3c000 t mmhub_v2_3_init +ffffffff81e3c0d0 t mmhub_v2_3_gart_enable +ffffffff81e3d460 t mmhub_v2_3_set_fault_enable_default +ffffffff81e3d550 t mmhub_v2_3_gart_disable +ffffffff81e3d7e0 t mmhub_v2_3_set_clockgating +ffffffff81e3dc60 t mmhub_v2_3_get_clockgating +ffffffff81e3de40 t mmhub_v2_3_setup_vm_pt_regs +ffffffff81e3df80 t mmhub_v2_3_print_l2_protection_fault_status +ffffffff81e3e1a0 t mmhub_v2_3_get_invalidate_req +ffffffff81e3f000 t mmhub_v3_0_get_fb_location +ffffffff81e3f090 t mmhub_v3_0_get_mc_fb_offset +ffffffff81e3f110 t mmhub_v3_0_init +ffffffff81e3f1e0 t mmhub_v3_0_gart_enable +ffffffff81e40370 t mmhub_v3_0_set_fault_enable_default +ffffffff81e40480 t mmhub_v3_0_gart_disable +ffffffff81e40700 t mmhub_v3_0_set_clockgating +ffffffff81e408c0 t mmhub_v3_0_get_clockgating +ffffffff81e40970 t mmhub_v3_0_setup_vm_pt_regs +ffffffff81e40aa0 t mmhub_v3_0_print_l2_protection_fault_status +ffffffff81e40cb0 t mmhub_v3_0_get_invalidate_req +ffffffff81e41000 t mmhub_v3_0_1_get_fb_location +ffffffff81e41090 t mmhub_v3_0_1_get_mc_fb_offset +ffffffff81e41110 t mmhub_v3_0_1_init +ffffffff81e411e0 t mmhub_v3_0_1_gart_enable +ffffffff81e42460 t mmhub_v3_0_1_set_fault_enable_default +ffffffff81e42550 t mmhub_v3_0_1_gart_disable +ffffffff81e427e0 t mmhub_v3_0_1_set_clockgating +ffffffff81e42990 t mmhub_v3_0_1_get_clockgating +ffffffff81e42a40 t mmhub_v3_0_1_setup_vm_pt_regs +ffffffff81e42b80 t mmhub_v3_0_1_print_l2_protection_fault_status +ffffffff81e42d90 t mmhub_v3_0_1_get_invalidate_req +ffffffff81e43000 t mmhub_v3_0_2_get_fb_location +ffffffff81e43090 t mmhub_v3_0_2_get_mc_fb_offset +ffffffff81e43110 t mmhub_v3_0_2_init +ffffffff81e431e0 t mmhub_v3_0_2_gart_enable +ffffffff81e44360 t mmhub_v3_0_2_set_fault_enable_default +ffffffff81e44470 t mmhub_v3_0_2_gart_disable +ffffffff81e446f0 t mmhub_v3_0_2_set_clockgating +ffffffff81e44720 t mmhub_v3_0_2_get_clockgating +ffffffff81e44750 t mmhub_v3_0_2_setup_vm_pt_regs +ffffffff81e44880 t mmhub_v3_0_2_print_l2_protection_fault_status +ffffffff81e44a70 t mmhub_v3_0_2_get_invalidate_req +ffffffff81e45000 t mmhub_v9_4_query_ras_error_count +ffffffff81e45150 t mmhub_v9_4_query_ras_error_status +ffffffff81e45230 t mmhub_v9_4_reset_ras_error_count +ffffffff81e452f0 t mmhub_v9_4_get_fb_location +ffffffff81e45400 t mmhub_v9_4_init +ffffffff81e45540 t mmhub_v9_4_gart_enable +ffffffff81e469d0 t mmhub_v9_4_set_fault_enable_default +ffffffff81e46bb0 t mmhub_v9_4_gart_disable +ffffffff81e46f10 t mmhub_v9_4_set_clockgating +ffffffff81e473d0 t mmhub_v9_4_get_clockgating +ffffffff81e474f0 t mmhub_v9_4_setup_vm_pt_regs +ffffffff81e47530 t mmhub_v9_4_setup_hubid_vm_pt_regs +ffffffff81e48000 T xgpu_ai_mailbox_set_irq_funcs +ffffffff81e48050 T xgpu_ai_mailbox_add_irq_id +ffffffff81e480e0 T xgpu_ai_mailbox_get_irq +ffffffff81e48190 t xgpu_ai_mailbox_flr_work +ffffffff81e48390 T xgpu_ai_mailbox_put_irq +ffffffff81e483d0 t xgpu_ai_request_full_gpu_access +ffffffff81e483f0 t xgpu_ai_release_full_gpu_access +ffffffff81e48410 t xgpu_ai_request_init_data +ffffffff81e48470 t xgpu_ai_request_reset +ffffffff81e48520 t xgpu_ai_mailbox_trans_msg +ffffffff81e48750 t xgpu_ai_set_mailbox_ack_irq +ffffffff81e487e0 t xgpu_ai_mailbox_ack_irq +ffffffff81e48830 t xgpu_ai_set_mailbox_rcv_irq +ffffffff81e488c0 t xgpu_ai_mailbox_rcv_irq +ffffffff81e489a0 t xgpu_ai_send_access_requests +ffffffff81e48a90 t xgpu_ai_poll_msg +ffffffff81e49000 T xgpu_nv_mailbox_set_irq_funcs +ffffffff81e49050 T xgpu_nv_mailbox_add_irq_id +ffffffff81e490e0 T xgpu_nv_mailbox_get_irq +ffffffff81e49190 t xgpu_nv_mailbox_flr_work +ffffffff81e493b0 T xgpu_nv_mailbox_put_irq +ffffffff81e493f0 t xgpu_nv_request_full_gpu_access +ffffffff81e49410 t xgpu_nv_release_full_gpu_access +ffffffff81e49430 t xgpu_nv_request_init_data +ffffffff81e49450 t xgpu_nv_request_reset +ffffffff81e49550 t xgpu_nv_mailbox_trans_msg +ffffffff81e496f0 t xgpu_nv_set_mailbox_ack_irq +ffffffff81e49760 t xgpu_nv_mailbox_ack_irq +ffffffff81e497b0 t xgpu_nv_set_mailbox_rcv_irq +ffffffff81e49830 t xgpu_nv_mailbox_rcv_irq +ffffffff81e498e0 t xgpu_nv_send_access_requests +ffffffff81e4a000 T xgpu_vi_init_golden_registers +ffffffff81e4a0c0 T xgpu_vi_mailbox_set_irq_funcs +ffffffff81e4a110 T xgpu_vi_mailbox_add_irq_id +ffffffff81e4a1a0 T xgpu_vi_mailbox_get_irq +ffffffff81e4a250 t xgpu_vi_mailbox_flr_work +ffffffff81e4a3a0 T xgpu_vi_mailbox_put_irq +ffffffff81e4a3e0 t xgpu_vi_request_full_gpu_access +ffffffff81e4a400 t xgpu_vi_release_full_gpu_access +ffffffff81e4a420 t xgpu_vi_request_reset +ffffffff81e4a440 t xgpu_vi_wait_reset_cmpl +ffffffff81e4a520 t xgpu_vi_set_mailbox_ack_irq +ffffffff81e4a590 t xgpu_vi_mailbox_ack_irq +ffffffff81e4a5e0 t xgpu_vi_set_mailbox_rcv_irq +ffffffff81e4a660 t xgpu_vi_mailbox_rcv_irq +ffffffff81e4a700 t xgpu_vi_mailbox_rcv_msg +ffffffff81e4a820 t xgpu_vi_send_access_requests +ffffffff81e4b000 t navi10_ih_early_init +ffffffff81e4b050 t navi10_ih_sw_init +ffffffff81e4b1c0 t navi10_ih_sw_fini +ffffffff81e4b200 t navi10_ih_hw_init +ffffffff81e4b630 t navi10_ih_hw_fini +ffffffff81e4b690 t navi10_ih_suspend +ffffffff81e4b6f0 t navi10_ih_resume +ffffffff81e4b700 t navi10_ih_is_idle +ffffffff81e4b730 t navi10_ih_wait_for_idle +ffffffff81e4b760 t navi10_ih_soft_reset +ffffffff81e4b790 t navi10_ih_set_clockgating_state +ffffffff81e4b8b0 t navi10_ih_set_powergating_state +ffffffff81e4b8e0 t navi10_ih_get_clockgating_state +ffffffff81e4b970 t navi10_ih_get_wptr +ffffffff81e4ba80 t navi10_ih_set_rptr +ffffffff81e4bb50 t navi10_ih_self_irq +ffffffff81e4bbc0 t navi10_ih_toggle_interrupts +ffffffff81e4bd50 t force_update_wptr_for_self_int +ffffffff81e4d000 t nbio_v2_3_get_hdp_flush_req_offset +ffffffff81e4d040 t nbio_v2_3_get_hdp_flush_done_offset +ffffffff81e4d080 t nbio_v2_3_get_pcie_index_offset +ffffffff81e4d0b0 t nbio_v2_3_get_pcie_data_offset +ffffffff81e4d0e0 t nbio_v2_3_get_rev_id +ffffffff81e4d130 t nbio_v2_3_mc_access_enable +ffffffff81e4d1e0 t nbio_v2_3_get_memsize +ffffffff81e4d240 t nbio_v2_3_sdma_doorbell_range +ffffffff81e4d2e0 t nbio_v2_3_vcn_doorbell_range +ffffffff81e4d360 t nbio_v2_3_enable_doorbell_aperture +ffffffff81e4d450 t nbio_v2_3_enable_doorbell_selfring_aperture +ffffffff81e4d5b0 t nbio_v2_3_ih_doorbell_range +ffffffff81e4d6c0 t nbio_v2_3_update_medium_grain_clock_gating +ffffffff81e4d760 t nbio_v2_3_update_medium_grain_light_sleep +ffffffff81e4d800 t nbio_v2_3_get_clockgating_state +ffffffff81e4d880 t nbio_v2_3_ih_control +ffffffff81e4d9d0 t nbio_v2_3_init_registers +ffffffff81e4da60 t nbio_v2_3_remap_hdp_registers +ffffffff81e4db60 t nbio_v2_3_enable_aspm +ffffffff81e4dbf0 t nbio_v2_3_program_aspm +ffffffff81e4e280 t nbio_v2_3_apply_lc_spc_mode_wa +ffffffff81e4e310 t nbio_v2_3_apply_l1_link_width_reconfig_wa +ffffffff81e4e380 t nbio_v2_3_clear_doorbell_interrupt +ffffffff81e4f000 t nbio_v4_3_get_hdp_flush_req_offset +ffffffff81e4f040 t nbio_v4_3_get_hdp_flush_done_offset +ffffffff81e4f080 t nbio_v4_3_get_pcie_index_offset +ffffffff81e4f0b0 t nbio_v4_3_get_pcie_data_offset +ffffffff81e4f0e0 t nbio_v4_3_get_rev_id +ffffffff81e4f160 t nbio_v4_3_mc_access_enable +ffffffff81e4f210 t nbio_v4_3_get_memsize +ffffffff81e4f270 t nbio_v4_3_sdma_doorbell_range +ffffffff81e4f3e0 t nbio_v4_3_vcn_doorbell_range +ffffffff81e4f590 t nbio_v4_3_gc_doorbell_init +ffffffff81e4f680 t nbio_v4_3_enable_doorbell_aperture +ffffffff81e4f770 t nbio_v4_3_enable_doorbell_selfring_aperture +ffffffff81e4f8d0 t nbio_v4_3_ih_doorbell_range +ffffffff81e4f9f0 t nbio_v4_3_update_medium_grain_clock_gating +ffffffff81e4fb20 t nbio_v4_3_update_medium_grain_light_sleep +ffffffff81e4fc50 t nbio_v4_3_get_clockgating_state +ffffffff81e4fd60 t nbio_v4_3_ih_control +ffffffff81e4feb0 t nbio_v4_3_init_registers +ffffffff81e4ffc0 t nbio_v4_3_remap_hdp_registers +ffffffff81e500c0 t nbio_v4_3_program_aspm +ffffffff81e50d50 t nbio_v4_3_get_rom_offset +ffffffff81e50dd0 t nbio_v4_3_sriov_sdma_doorbell_range +ffffffff81e50e00 t nbio_v4_3_sriov_vcn_doorbell_range +ffffffff81e50e30 t nbio_v4_3_sriov_gc_doorbell_init +ffffffff81e50e60 t nbio_v4_3_sriov_ih_doorbell_range +ffffffff81e51000 t nbio_v6_1_get_hdp_flush_req_offset +ffffffff81e51040 t nbio_v6_1_get_hdp_flush_done_offset +ffffffff81e51080 t nbio_v6_1_get_pcie_index_offset +ffffffff81e510b0 t nbio_v6_1_get_pcie_data_offset +ffffffff81e510e0 t nbio_v6_1_get_rev_id +ffffffff81e51160 t nbio_v6_1_mc_access_enable +ffffffff81e51210 t nbio_v6_1_get_memsize +ffffffff81e51270 t nbio_v6_1_sdma_doorbell_range +ffffffff81e51300 t nbio_v6_1_enable_doorbell_aperture +ffffffff81e513f0 t nbio_v6_1_enable_doorbell_selfring_aperture +ffffffff81e51550 t nbio_v6_1_ih_doorbell_range +ffffffff81e51660 t nbio_v6_1_update_medium_grain_clock_gating +ffffffff81e51700 t nbio_v6_1_update_medium_grain_light_sleep +ffffffff81e517a0 t nbio_v6_1_get_clockgating_state +ffffffff81e51820 t nbio_v6_1_ih_control +ffffffff81e51970 t nbio_v6_1_init_registers +ffffffff81e51a40 t nbio_v6_1_remap_hdp_registers +ffffffff81e51b40 t nbio_v6_1_program_aspm +ffffffff81e52000 t nbio_v7_0_get_hdp_flush_req_offset +ffffffff81e52040 t nbio_v7_0_get_hdp_flush_done_offset +ffffffff81e52080 t nbio_v7_0_get_pcie_index_offset +ffffffff81e520b0 t nbio_v7_0_get_pcie_data_offset +ffffffff81e520e0 t nbio_v7_0_get_rev_id +ffffffff81e52160 t nbio_v7_0_mc_access_enable +ffffffff81e52210 t nbio_v7_0_get_memsize +ffffffff81e52270 t nbio_v7_0_sdma_doorbell_range +ffffffff81e52300 t nbio_v7_0_vcn_doorbell_range +ffffffff81e52370 t nbio_v7_0_enable_doorbell_aperture +ffffffff81e52460 t nbio_v7_0_enable_doorbell_selfring_aperture +ffffffff81e52490 t nbio_v7_0_ih_doorbell_range +ffffffff81e525a0 t nbio_v7_0_update_medium_grain_clock_gating +ffffffff81e526e0 t nbio_v7_0_update_medium_grain_light_sleep +ffffffff81e52780 t nbio_v7_0_get_clockgating_state +ffffffff81e52800 t nbio_v7_0_ih_control +ffffffff81e52950 t nbio_v7_0_init_registers +ffffffff81e529a0 t nbio_v7_0_remap_hdp_registers +ffffffff81e52aa0 t nbio_7_0_read_syshub_ind_mmr +ffffffff81e52b70 t nbio_7_0_write_syshub_ind_mmr +ffffffff81e53000 t nbio_v7_2_get_hdp_flush_req_offset +ffffffff81e53040 t nbio_v7_2_get_hdp_flush_done_offset +ffffffff81e53080 t nbio_v7_2_get_pcie_index_offset +ffffffff81e530b0 t nbio_v7_2_get_pcie_data_offset +ffffffff81e530e0 t nbio_v7_2_get_pcie_port_index_offset +ffffffff81e53110 t nbio_v7_2_get_pcie_port_data_offset +ffffffff81e53140 t nbio_v7_2_get_rev_id +ffffffff81e53220 t nbio_v7_2_mc_access_enable +ffffffff81e53360 t nbio_v7_2_get_memsize +ffffffff81e533c0 t nbio_v7_2_sdma_doorbell_range +ffffffff81e53450 t nbio_v7_2_vcn_doorbell_range +ffffffff81e534d0 t nbio_v7_2_enable_doorbell_aperture +ffffffff81e535b0 t nbio_v7_2_enable_doorbell_selfring_aperture +ffffffff81e53710 t nbio_v7_2_ih_doorbell_range +ffffffff81e53790 t nbio_v7_2_update_medium_grain_clock_gating +ffffffff81e53840 t nbio_v7_2_update_medium_grain_light_sleep +ffffffff81e539d0 t nbio_v7_2_get_clockgating_state +ffffffff81e53a60 t nbio_v7_2_ih_control +ffffffff81e53bb0 t nbio_v7_2_init_registers +ffffffff81e53c90 t nbio_v7_2_remap_hdp_registers +ffffffff81e54000 t nbio_v7_4_query_ras_error_count +ffffffff81e541a0 t nbio_v7_4_handle_ras_controller_intr_no_bifring +ffffffff81e543d0 t nbio_v7_4_handle_ras_err_event_athub_intr_no_bifring +ffffffff81e54580 t nbio_v7_4_init_ras_controller_interrupt +ffffffff81e545c0 t nbio_v7_4_init_ras_err_event_athub_interrupt +ffffffff81e54600 t nbio_v7_4_get_hdp_flush_req_offset +ffffffff81e54640 t nbio_v7_4_get_hdp_flush_done_offset +ffffffff81e54680 t nbio_v7_4_get_pcie_index_offset +ffffffff81e546b0 t nbio_v7_4_get_pcie_data_offset +ffffffff81e546e0 t nbio_v7_4_get_rev_id +ffffffff81e547a0 t nbio_v7_4_mc_access_enable +ffffffff81e54850 t nbio_v7_4_get_memsize +ffffffff81e548b0 t nbio_v7_4_sdma_doorbell_range +ffffffff81e54970 t nbio_v7_4_vcn_doorbell_range +ffffffff81e54a10 t nbio_v7_4_enable_doorbell_aperture +ffffffff81e54b00 t nbio_v7_4_enable_doorbell_selfring_aperture +ffffffff81e54c60 t nbio_v7_4_ih_doorbell_range +ffffffff81e54d70 t nbio_v7_4_enable_doorbell_interrupt +ffffffff81e54eb0 t nbio_v7_4_update_medium_grain_clock_gating +ffffffff81e54ee0 t nbio_v7_4_update_medium_grain_light_sleep +ffffffff81e54f80 t nbio_v7_4_get_clockgating_state +ffffffff81e55000 t nbio_v7_4_ih_control +ffffffff81e55150 t nbio_v7_4_init_registers +ffffffff81e55230 t nbio_v7_4_remap_hdp_registers +ffffffff81e55330 t nbio_v7_4_program_aspm +ffffffff81e55730 t nbio_v7_4_set_ras_controller_irq_state +ffffffff81e558c0 t nbio_v7_4_process_ras_controller_irq +ffffffff81e558f0 t nbio_v7_4_set_ras_err_event_athub_irq_state +ffffffff81e55a80 t nbio_v7_4_process_err_event_athub_irq +ffffffff81e56000 t nbio_v7_7_get_hdp_flush_req_offset +ffffffff81e56040 t nbio_v7_7_get_hdp_flush_done_offset +ffffffff81e56080 t nbio_v7_7_get_pcie_index_offset +ffffffff81e560b0 t nbio_v7_7_get_pcie_data_offset +ffffffff81e560e0 t nbio_v7_7_get_pcie_port_index_offset +ffffffff81e56110 t nbio_v7_7_get_pcie_port_data_offset +ffffffff81e56140 t nbio_v7_7_get_rev_id +ffffffff81e561c0 t nbio_v7_7_mc_access_enable +ffffffff81e56270 t nbio_v7_7_get_memsize +ffffffff81e562d0 t nbio_v7_7_sdma_doorbell_range +ffffffff81e56360 t nbio_v7_7_vcn_doorbell_range +ffffffff81e563e0 t nbio_v7_7_enable_doorbell_aperture +ffffffff81e564c0 t nbio_v7_7_enable_doorbell_selfring_aperture +ffffffff81e56620 t nbio_v7_7_ih_doorbell_range +ffffffff81e56730 t nbio_v7_7_update_medium_grain_clock_gating +ffffffff81e56860 t nbio_v7_7_update_medium_grain_light_sleep +ffffffff81e56a60 t nbio_v7_7_get_clockgating_state +ffffffff81e56b70 t nbio_v7_7_ih_control +ffffffff81e56cc0 t nbio_v7_7_init_registers +ffffffff81e56dc0 t nbio_v7_7_remap_hdp_registers +ffffffff81e57000 T nv_grbm_select +ffffffff81e57090 T nv_set_virt_ops +ffffffff81e570c0 t nv_common_early_init +ffffffff81e574a0 t nv_common_late_init +ffffffff81e57500 t nv_common_sw_init +ffffffff81e57540 t nv_common_sw_fini +ffffffff81e57570 t nv_common_hw_init +ffffffff81e57680 t nv_common_hw_fini +ffffffff81e576e0 t nv_common_suspend +ffffffff81e57740 t nv_common_resume +ffffffff81e57780 t nv_common_is_idle +ffffffff81e577b0 t nv_common_wait_for_idle +ffffffff81e577e0 t nv_common_soft_reset +ffffffff81e57810 t nv_common_set_clockgating_state +ffffffff81e578e0 t nv_common_set_powergating_state +ffffffff81e57910 t nv_common_get_clockgating_state +ffffffff81e57980 t nv_pcie_rreg +ffffffff81e579e0 t nv_pcie_wreg +ffffffff81e57a40 t nv_pcie_rreg64 +ffffffff81e57aa0 t nv_pcie_wreg64 +ffffffff81e57b00 t nv_didt_rreg +ffffffff81e57b90 t nv_didt_wreg +ffffffff81e57c10 t nv_read_disabled_bios +ffffffff81e57c40 t nv_read_register +ffffffff81e57d20 t nv_vga_set_state +ffffffff81e57d50 t nv_asic_reset +ffffffff81e57e90 t nv_asic_reset_method +ffffffff81e57f80 t nv_get_xclk +ffffffff81e57fb0 t nv_set_uvd_clocks +ffffffff81e57fe0 t nv_set_vce_clocks +ffffffff81e58010 t nv_get_config_memsize +ffffffff81e58030 t nv_need_full_reset +ffffffff81e58060 t nv_init_doorbell_index +ffffffff81e58190 t nv_need_reset_on_init +ffffffff81e58220 t nv_get_pcie_replay_count +ffffffff81e58250 t nv_pre_asic_init +ffffffff81e58280 t nv_update_umd_stable_pstate +ffffffff81e58330 t nv_query_video_codecs +ffffffff81e59000 T psp_v10_0_set_psp_funcs +ffffffff81e59030 t psp_v10_0_init_microcode +ffffffff81e592a0 t psp_v10_0_ring_init +ffffffff81e59320 t psp_v10_0_ring_create +ffffffff81e59620 t psp_v10_0_ring_stop +ffffffff81e59810 t psp_v10_0_ring_destroy +ffffffff81e59880 t psp_v10_0_mode1_reset +ffffffff81e598c0 t psp_v10_0_ring_get_wptr +ffffffff81e59920 t psp_v10_0_ring_set_wptr +ffffffff81e5a000 T psp_v11_0_set_psp_funcs +ffffffff81e5a030 t psp_v11_0_init_microcode +ffffffff81e5a450 t psp_v11_0_bootloader_load_kdb +ffffffff81e5a470 t psp_v11_0_bootloader_load_spl +ffffffff81e5a490 t psp_v11_0_bootloader_load_sysdrv +ffffffff81e5a4b0 t psp_v11_0_bootloader_load_sos +ffffffff81e5a800 t psp_v11_0_ring_init +ffffffff81e5a880 t psp_v11_0_ring_create +ffffffff81e5af10 t psp_v11_0_ring_stop +ffffffff81e5b130 t psp_v11_0_ring_destroy +ffffffff81e5b1a0 t psp_v11_0_mode1_reset +ffffffff81e5b290 t psp_v11_0_memory_training +ffffffff81e5b710 t psp_v11_0_ring_get_wptr +ffffffff81e5b760 t psp_v11_0_ring_set_wptr +ffffffff81e5b8a0 t psp_v11_0_load_usbc_pd_fw +ffffffff81e5ba90 t psp_v11_0_read_usbc_pd_fw +ffffffff81e5bbb0 t psp_v11_0_bootloader_load_component +ffffffff81e5bd70 t psp_v11_0_wait_for_bootloader +ffffffff81e5bf40 t psp_v11_0_memory_training_send_msg +ffffffff81e5d000 T psp_v11_0_8_set_psp_funcs +ffffffff81e5d030 t psp_v11_0_8_ring_init +ffffffff81e5d0b0 t psp_v11_0_8_ring_create +ffffffff81e5d740 t psp_v11_0_8_ring_stop +ffffffff81e5dac0 t psp_v11_0_8_ring_destroy +ffffffff81e5db30 t psp_v11_0_8_ring_get_wptr +ffffffff81e5dba0 t psp_v11_0_8_ring_set_wptr +ffffffff81e5e000 T psp_v12_0_set_psp_funcs +ffffffff81e5e030 t psp_v12_0_init_microcode +ffffffff81e5e290 t psp_v12_0_bootloader_load_sysdrv +ffffffff81e5e5b0 t psp_v12_0_bootloader_load_sos +ffffffff81e5e910 t psp_v12_0_ring_init +ffffffff81e5eee0 t psp_v12_0_ring_create +ffffffff81e5f430 t psp_v12_0_ring_stop +ffffffff81e5f650 t psp_v12_0_ring_destroy +ffffffff81e5f6c0 t psp_v12_0_mode1_reset +ffffffff81e5f7b0 t psp_v12_0_ring_get_wptr +ffffffff81e5f820 t psp_v12_0_ring_set_wptr +ffffffff81e60000 T psp_v13_0_set_psp_funcs +ffffffff81e60030 t psp_v13_0_init_microcode +ffffffff81e60160 t psp_v13_0_bootloader_load_kdb +ffffffff81e60180 t psp_v13_0_bootloader_load_spl +ffffffff81e601a0 t psp_v13_0_bootloader_load_sysdrv +ffffffff81e601c0 t psp_v13_0_bootloader_load_soc_drv +ffffffff81e601e0 t psp_v13_0_bootloader_load_intf_drv +ffffffff81e60200 t psp_v13_0_bootloader_load_dbg_drv +ffffffff81e60220 t psp_v13_0_bootloader_load_ras_drv +ffffffff81e60240 t psp_v13_0_bootloader_load_sos +ffffffff81e605a0 t psp_v13_0_ring_init +ffffffff81e60620 t psp_v13_0_ring_create +ffffffff81e60cb0 t psp_v13_0_ring_stop +ffffffff81e61030 t psp_v13_0_ring_destroy +ffffffff81e610a0 t psp_v13_0_memory_training +ffffffff81e614e0 t psp_v13_0_ring_get_wptr +ffffffff81e61550 t psp_v13_0_ring_set_wptr +ffffffff81e61640 t psp_v13_0_load_usbc_pd_fw +ffffffff81e61830 t psp_v13_0_read_usbc_pd_fw +ffffffff81e61950 t psp_v13_0_update_spirom +ffffffff81e61b20 t psp_v13_0_vbflash_status +ffffffff81e61b80 t psp_v13_0_bootloader_load_component +ffffffff81e61d50 t psp_v13_0_wait_for_bootloader +ffffffff81e61f20 t psp_v13_0_memory_training_send_msg +ffffffff81e62080 t psp_v13_0_exec_spi_cmd +ffffffff81e63000 T psp_v13_0_4_set_psp_funcs +ffffffff81e63030 t psp_v13_0_4_init_microcode +ffffffff81e63100 t psp_v13_0_4_bootloader_load_kdb +ffffffff81e63120 t psp_v13_0_4_bootloader_load_spl +ffffffff81e63140 t psp_v13_0_4_bootloader_load_sysdrv +ffffffff81e63160 t psp_v13_0_4_bootloader_load_soc_drv +ffffffff81e63180 t psp_v13_0_4_bootloader_load_intf_drv +ffffffff81e631a0 t psp_v13_0_4_bootloader_load_dbg_drv +ffffffff81e631c0 t psp_v13_0_4_bootloader_load_sos +ffffffff81e63530 t psp_v13_0_4_ring_init +ffffffff81e635b0 t psp_v13_0_4_ring_create +ffffffff81e63c50 t psp_v13_0_4_ring_stop +ffffffff81e63fe0 t psp_v13_0_4_ring_destroy +ffffffff81e64050 t psp_v13_0_4_ring_get_wptr +ffffffff81e640c0 t psp_v13_0_4_ring_set_wptr +ffffffff81e641c0 t psp_v13_0_4_bootloader_load_component +ffffffff81e64390 t psp_v13_0_4_wait_for_bootloader +ffffffff81e65000 T psp_v3_1_set_psp_funcs +ffffffff81e65030 t psp_v3_1_init_microcode +ffffffff81e650e0 t psp_v3_1_bootloader_load_sysdrv +ffffffff81e65400 t psp_v3_1_bootloader_load_sos +ffffffff81e65760 t psp_v3_1_ring_init +ffffffff81e657e0 t psp_v3_1_ring_create +ffffffff81e662e0 t psp_v3_1_ring_stop +ffffffff81e66500 t psp_v3_1_ring_destroy +ffffffff81e66570 t psp_v3_1_smu_reload_quirk +ffffffff81e665c0 t psp_v3_1_mode1_reset +ffffffff81e666b0 t psp_v3_1_ring_get_wptr +ffffffff81e66700 t psp_v3_1_ring_set_wptr +ffffffff81e67000 t sdma_v2_4_early_init +ffffffff81e670e0 t sdma_v2_4_sw_init +ffffffff81e67470 t sdma_v2_4_sw_fini +ffffffff81e67550 t sdma_v2_4_hw_init +ffffffff81e67900 t sdma_v2_4_hw_fini +ffffffff81e67940 t sdma_v2_4_suspend +ffffffff81e67980 t sdma_v2_4_resume +ffffffff81e67990 t sdma_v2_4_is_idle +ffffffff81e679d0 t sdma_v2_4_wait_for_idle +ffffffff81e67a60 t sdma_v2_4_soft_reset +ffffffff81e67ba0 t sdma_v2_4_set_clockgating_state +ffffffff81e67bd0 t sdma_v2_4_set_powergating_state +ffffffff81e67c00 t sdma_v2_4_ring_get_rptr +ffffffff81e67c30 t sdma_v2_4_ring_get_wptr +ffffffff81e67c80 t sdma_v2_4_ring_set_wptr +ffffffff81e67cb0 t sdma_v2_4_ring_emit_ib +ffffffff81e67f60 t sdma_v2_4_ring_emit_fence +ffffffff81e68360 t sdma_v2_4_ring_emit_pipeline_sync +ffffffff81e685e0 t sdma_v2_4_ring_emit_vm_flush +ffffffff81e68860 t sdma_v2_4_ring_emit_hdp_flush +ffffffff81e68ae0 t sdma_v2_4_ring_test_ring +ffffffff81e68dc0 t sdma_v2_4_ring_test_ib +ffffffff81e68fa0 t sdma_v2_4_ring_insert_nop +ffffffff81e690c0 t sdma_v2_4_ring_pad_ib +ffffffff81e691e0 t sdma_v2_4_ring_emit_wreg +ffffffff81e69330 t sdma_v2_4_emit_copy_buffer +ffffffff81e693e0 t sdma_v2_4_emit_fill_buffer +ffffffff81e69470 t sdma_v2_4_vm_copy_pte +ffffffff81e69520 t sdma_v2_4_vm_write_pte +ffffffff81e695f0 t sdma_v2_4_vm_set_pte_pde +ffffffff81e696e0 t sdma_v2_4_set_trap_irq_state +ffffffff81e697a0 t sdma_v2_4_process_trap_irq +ffffffff81e69830 t sdma_v2_4_process_illegal_inst_irq +ffffffff81e698b0 t sdma_v2_4_enable +ffffffff81e6a000 t sdma_v3_0_early_init +ffffffff81e6a140 t sdma_v3_0_sw_init +ffffffff81e6a4f0 t sdma_v3_0_sw_fini +ffffffff81e6a5d0 t sdma_v3_0_hw_init +ffffffff81e6a700 t sdma_v3_0_hw_fini +ffffffff81e6a740 t sdma_v3_0_suspend +ffffffff81e6a780 t sdma_v3_0_resume +ffffffff81e6a790 t sdma_v3_0_is_idle +ffffffff81e6a7d0 t sdma_v3_0_wait_for_idle +ffffffff81e6a860 t sdma_v3_0_check_soft_reset +ffffffff81e6a8b0 t sdma_v3_0_pre_soft_reset +ffffffff81e6a900 t sdma_v3_0_soft_reset +ffffffff81e6a9c0 t sdma_v3_0_post_soft_reset +ffffffff81e6aa00 t sdma_v3_0_set_clockgating_state +ffffffff81e6ac60 t sdma_v3_0_set_powergating_state +ffffffff81e6ac90 t sdma_v3_0_get_clockgating_state +ffffffff81e6ad10 t sdma_v3_0_ring_get_rptr +ffffffff81e6ad40 t sdma_v3_0_ring_get_wptr +ffffffff81e6adc0 t sdma_v3_0_ring_set_wptr +ffffffff81e6ae70 t sdma_v3_0_ring_emit_ib +ffffffff81e6b120 t sdma_v3_0_ring_emit_fence +ffffffff81e6b520 t sdma_v3_0_ring_emit_pipeline_sync +ffffffff81e6b7a0 t sdma_v3_0_ring_emit_vm_flush +ffffffff81e6ba20 t sdma_v3_0_ring_emit_hdp_flush +ffffffff81e6bca0 t sdma_v3_0_ring_test_ring +ffffffff81e6bf80 t sdma_v3_0_ring_test_ib +ffffffff81e6c160 t sdma_v3_0_ring_insert_nop +ffffffff81e6c280 t sdma_v3_0_ring_pad_ib +ffffffff81e6c3a0 t sdma_v3_0_ring_emit_wreg +ffffffff81e6c4f0 t sdma_v3_0_emit_copy_buffer +ffffffff81e6c5a0 t sdma_v3_0_emit_fill_buffer +ffffffff81e6c630 t sdma_v3_0_vm_copy_pte +ffffffff81e6c6e0 t sdma_v3_0_vm_write_pte +ffffffff81e6c7b0 t sdma_v3_0_vm_set_pte_pde +ffffffff81e6c8a0 t sdma_v3_0_set_trap_irq_state +ffffffff81e6c960 t sdma_v3_0_process_trap_irq +ffffffff81e6c9f0 t sdma_v3_0_process_illegal_inst_irq +ffffffff81e6ca70 t sdma_v3_0_ctx_switch_enable +ffffffff81e6cc00 t sdma_v3_0_enable +ffffffff81e6cd70 t sdma_v3_0_gfx_resume +ffffffff81e6e000 t sdma_v4_0_early_init +ffffffff81e6e580 t sdma_v4_0_late_init +ffffffff81e6e820 t sdma_v4_0_sw_init +ffffffff81e6eb90 t sdma_v4_0_sw_fini +ffffffff81e6ec50 t sdma_v4_0_hw_init +ffffffff81e71bf0 t sdma_v4_0_hw_fini +ffffffff81e71ca0 t sdma_v4_0_suspend +ffffffff81e71cf0 t sdma_v4_0_resume +ffffffff81e71d60 t sdma_v4_0_is_idle +ffffffff81e71e90 t sdma_v4_0_wait_for_idle +ffffffff81e72030 t sdma_v4_0_soft_reset +ffffffff81e72060 t sdma_v4_0_set_clockgating_state +ffffffff81e72550 t sdma_v4_0_set_powergating_state +ffffffff81e72610 t sdma_v4_0_get_clockgating_state +ffffffff81e726a0 t sdma_v4_0_query_ras_error_count +ffffffff81e72870 t sdma_v4_0_reset_ras_error_count +ffffffff81e729c0 t sdma_v4_0_ring_get_rptr +ffffffff81e72a20 t sdma_v4_0_ring_get_wptr +ffffffff81e72c10 t sdma_v4_0_ring_set_wptr +ffffffff81e72e90 t sdma_v4_0_ring_emit_ib +ffffffff81e73140 t sdma_v4_0_ring_emit_fence +ffffffff81e73570 t sdma_v4_0_ring_emit_pipeline_sync +ffffffff81e735c0 t sdma_v4_0_ring_emit_vm_flush +ffffffff81e735e0 t sdma_v4_0_ring_emit_hdp_flush +ffffffff81e73680 t sdma_v4_0_ring_test_ring +ffffffff81e73960 t sdma_v4_0_ring_test_ib +ffffffff81e73b40 t sdma_v4_0_ring_insert_nop +ffffffff81e73c60 t sdma_v4_0_ring_pad_ib +ffffffff81e73d80 t sdma_v4_0_ring_emit_wreg +ffffffff81e73ed0 t sdma_v4_0_ring_emit_reg_wait +ffffffff81e73f20 t sdma_v4_0_wait_reg_mem +ffffffff81e74250 t sdma_v4_0_page_ring_get_wptr +ffffffff81e74400 t sdma_v4_0_page_ring_set_wptr +ffffffff81e745c0 t sdma_v4_0_emit_copy_buffer +ffffffff81e74680 t sdma_v4_0_emit_fill_buffer +ffffffff81e74710 t sdma_v4_0_vm_copy_pte +ffffffff81e747d0 t sdma_v4_0_vm_write_pte +ffffffff81e748a0 t sdma_v4_0_vm_set_pte_pde +ffffffff81e749a0 t sdma_v4_0_set_trap_irq_state +ffffffff81e74b40 t sdma_v4_0_process_trap_irq +ffffffff81e74c80 t sdma_v4_0_process_illegal_inst_irq +ffffffff81e74da0 t sdma_v4_0_set_ecc_irq_state +ffffffff81e74f40 t sdma_v4_0_process_vm_hole_irq +ffffffff81e75080 t sdma_v4_0_process_doorbell_invalid_irq +ffffffff81e751c0 t sdma_v4_0_process_pool_timeout_irq +ffffffff81e75300 t sdma_v4_0_process_srbm_write_irq +ffffffff81e75440 t sdma_v4_0_process_ras_data_cb +ffffffff81e754b0 t sdma_v4_0_ctx_switch_enable +ffffffff81e75b60 t sdma_v4_0_enable +ffffffff81e76100 t sdma_v4_0_gfx_enable +ffffffff81e77000 t sdma_v4_4_query_ras_error_count +ffffffff81e77270 t sdma_v4_4_reset_ras_error_count +ffffffff81e78000 t sdma_v5_0_early_init +ffffffff81e78170 t sdma_v5_0_sw_init +ffffffff81e78410 t sdma_v5_0_sw_fini +ffffffff81e78490 t sdma_v5_0_hw_init +ffffffff81e79740 t sdma_v5_0_hw_fini +ffffffff81e797a0 t sdma_v5_0_suspend +ffffffff81e79800 t sdma_v5_0_resume +ffffffff81e79810 t sdma_v5_0_is_idle +ffffffff81e798a0 t sdma_v5_0_wait_for_idle +ffffffff81e79960 t sdma_v5_0_soft_reset +ffffffff81e79990 t sdma_v5_0_set_clockgating_state +ffffffff81e79b90 t sdma_v5_0_set_powergating_state +ffffffff81e79bc0 t sdma_v5_0_get_clockgating_state +ffffffff81e79c50 t sdma_v5_0_ring_get_rptr +ffffffff81e79cb0 t sdma_v5_0_ring_get_wptr +ffffffff81e79e50 t sdma_v5_0_ring_set_wptr +ffffffff81e7a1b0 t sdma_v5_0_ring_emit_ib +ffffffff81e7a470 t sdma_v5_0_ring_emit_fence +ffffffff81e7a8d0 t sdma_v5_0_ring_emit_pipeline_sync +ffffffff81e7ab50 t sdma_v5_0_ring_emit_vm_flush +ffffffff81e7ab70 t sdma_v5_0_ring_emit_hdp_flush +ffffffff81e7ae10 t sdma_v5_0_ring_test_ring +ffffffff81e7b1e0 t sdma_v5_0_ring_test_ib +ffffffff81e7b500 t sdma_v5_0_ring_insert_nop +ffffffff81e7b620 t sdma_v5_0_ring_pad_ib +ffffffff81e7b740 t sdma_v5_0_ring_init_cond_exec +ffffffff81e7b970 t sdma_v5_0_ring_patch_cond_exec +ffffffff81e7ba30 t sdma_v5_0_ring_emit_wreg +ffffffff81e7bb80 t sdma_v5_0_ring_emit_reg_wait +ffffffff81e7be00 t sdma_v5_0_ring_emit_reg_write_reg_wait +ffffffff81e7be70 t sdma_v5_0_ring_preempt_ib +ffffffff81e7bfb0 t sdma_v5_0_ring_emit_mem_sync +ffffffff81e7c1c0 t sdma_v5_0_emit_copy_buffer +ffffffff81e7c280 t sdma_v5_0_emit_fill_buffer +ffffffff81e7c310 t sdma_v5_0_vm_copy_pte +ffffffff81e7c3d0 t sdma_v5_0_vm_write_pte +ffffffff81e7c4a0 t sdma_v5_0_vm_set_pte_pde +ffffffff81e7c5a0 t sdma_v5_0_set_trap_irq_state +ffffffff81e7c630 t sdma_v5_0_process_trap_irq +ffffffff81e7c740 t sdma_v5_0_process_illegal_inst_irq +ffffffff81e7c770 t sdma_v5_0_mqd_init +ffffffff81e7c850 t sdma_v5_0_ctx_switch_enable +ffffffff81e7cb50 t sdma_v5_0_enable +ffffffff81e7d000 t sdma_v5_2_early_init +ffffffff81e7d170 t sdma_v5_2_sw_init +ffffffff81e7d3a0 t sdma_v5_2_sw_fini +ffffffff81e7d420 t sdma_v5_2_hw_init +ffffffff81e7d750 t sdma_v5_2_hw_fini +ffffffff81e7d7b0 t sdma_v5_2_suspend +ffffffff81e7d810 t sdma_v5_2_resume +ffffffff81e7d820 t sdma_v5_2_is_idle +ffffffff81e7d8d0 t sdma_v5_2_wait_for_idle +ffffffff81e7d9d0 t sdma_v5_2_soft_reset +ffffffff81e7dc70 t sdma_v5_2_set_clockgating_state +ffffffff81e7df80 t sdma_v5_2_set_powergating_state +ffffffff81e7dfb0 t sdma_v5_2_get_clockgating_state +ffffffff81e7e040 t sdma_v5_2_ring_get_rptr +ffffffff81e7e0a0 t sdma_v5_2_ring_get_wptr +ffffffff81e7e1e0 t sdma_v5_2_ring_set_wptr +ffffffff81e7e3a0 t sdma_v5_2_ring_emit_ib +ffffffff81e7e660 t sdma_v5_2_ring_emit_fence +ffffffff81e7eac0 t sdma_v5_2_ring_emit_pipeline_sync +ffffffff81e7ed40 t sdma_v5_2_ring_emit_vm_flush +ffffffff81e7ed60 t sdma_v5_2_ring_emit_hdp_flush +ffffffff81e7f000 t sdma_v5_2_ring_test_ring +ffffffff81e7f3d0 t sdma_v5_2_ring_test_ib +ffffffff81e7f6f0 t sdma_v5_2_ring_insert_nop +ffffffff81e7f810 t sdma_v5_2_ring_pad_ib +ffffffff81e7f930 t sdma_v5_2_ring_init_cond_exec +ffffffff81e7fb60 t sdma_v5_2_ring_patch_cond_exec +ffffffff81e7fc20 t sdma_v5_2_ring_emit_wreg +ffffffff81e7fd70 t sdma_v5_2_ring_emit_reg_wait +ffffffff81e7fff0 t sdma_v5_2_ring_emit_reg_write_reg_wait +ffffffff81e80060 t sdma_v5_2_ring_preempt_ib +ffffffff81e801d0 t sdma_v5_2_ring_emit_mem_sync +ffffffff81e803e0 t sdma_v5_2_emit_copy_buffer +ffffffff81e804a0 t sdma_v5_2_emit_fill_buffer +ffffffff81e80530 t sdma_v5_2_vm_copy_pte +ffffffff81e805f0 t sdma_v5_2_vm_write_pte +ffffffff81e806c0 t sdma_v5_2_vm_set_pte_pde +ffffffff81e807c0 t sdma_v5_2_set_trap_irq_state +ffffffff81e80880 t sdma_v5_2_process_trap_irq +ffffffff81e809c0 t sdma_v5_2_process_illegal_inst_irq +ffffffff81e809f0 t sdma_v5_2_mqd_init +ffffffff81e80ad0 t sdma_v5_2_ctx_switch_enable +ffffffff81e80ed0 t sdma_v5_2_enable +ffffffff81e812e0 t sdma_v5_2_gfx_resume +ffffffff81e83000 t sdma_v6_0_early_init +ffffffff81e83140 t sdma_v6_0_sw_init +ffffffff81e83320 t sdma_v6_0_sw_fini +ffffffff81e833a0 t sdma_v6_0_hw_init +ffffffff81e833b0 t sdma_v6_0_hw_fini +ffffffff81e83400 t sdma_v6_0_suspend +ffffffff81e83450 t sdma_v6_0_resume +ffffffff81e83460 t sdma_v6_0_is_idle +ffffffff81e834f0 t sdma_v6_0_wait_for_idle +ffffffff81e835b0 t sdma_v6_0_check_soft_reset +ffffffff81e83670 t sdma_v6_0_soft_reset +ffffffff81e83b10 t sdma_v6_0_set_clockgating_state +ffffffff81e83b40 t sdma_v6_0_set_powergating_state +ffffffff81e83b70 t sdma_v6_0_get_clockgating_state +ffffffff81e83ba0 t sdma_v6_0_ring_get_rptr +ffffffff81e83c00 t sdma_v6_0_ring_get_wptr +ffffffff81e83c70 t sdma_v6_0_ring_set_wptr +ffffffff81e83fd0 t sdma_v6_0_ring_emit_ib +ffffffff81e84290 t sdma_v6_0_ring_emit_fence +ffffffff81e846f0 t sdma_v6_0_ring_emit_pipeline_sync +ffffffff81e84970 t sdma_v6_0_ring_emit_vm_flush +ffffffff81e84990 t sdma_v6_0_ring_emit_hdp_flush +ffffffff81e84c30 t sdma_v6_0_ring_test_ring +ffffffff81e85000 t sdma_v6_0_ring_test_ib +ffffffff81e85320 t sdma_v6_0_ring_insert_nop +ffffffff81e85440 t sdma_v6_0_ring_pad_ib +ffffffff81e85560 t sdma_v6_0_ring_init_cond_exec +ffffffff81e85790 t sdma_v6_0_ring_patch_cond_exec +ffffffff81e85850 t sdma_v6_0_ring_emit_wreg +ffffffff81e859a0 t sdma_v6_0_ring_emit_reg_wait +ffffffff81e85c20 t sdma_v6_0_ring_emit_reg_write_reg_wait +ffffffff81e85c90 t sdma_v6_0_ring_preempt_ib +ffffffff81e85de0 t sdma_v6_0_ring_emit_mem_sync +ffffffff81e85ff0 t sdma_v6_0_emit_copy_buffer +ffffffff81e860b0 t sdma_v6_0_emit_fill_buffer +ffffffff81e86140 t sdma_v6_0_vm_copy_pte +ffffffff81e86200 t sdma_v6_0_vm_write_pte +ffffffff81e862d0 t sdma_v6_0_vm_set_pte_pde +ffffffff81e863d0 t sdma_v6_0_set_trap_irq_state +ffffffff81e86460 t sdma_v6_0_process_trap_irq +ffffffff81e86590 t sdma_v6_0_process_illegal_inst_irq +ffffffff81e865c0 t sdma_v6_0_mqd_init +ffffffff81e866d0 t sdma_v6_0_start +ffffffff81e86950 t sdma_v6_0_enable +ffffffff81e86ad0 t sdma_v6_0_gfx_resume +ffffffff81e87b50 t sdma_v6_0_gfx_stop +ffffffff81e88000 T sienna_cichlid_reset_init +ffffffff81e880c0 t sienna_cichlid_async_reset +ffffffff81e88120 t sienna_cichlid_get_reset_handler +ffffffff81e88180 T sienna_cichlid_reset_fini +ffffffff81e881d0 t sienna_cichlid_mode2_prepare_hwcontext +ffffffff81e88320 t sienna_cichlid_mode2_perform_reset +ffffffff81e883a0 t sienna_cichlid_mode2_restore_hwcontext +ffffffff81e886a0 t sienna_cichlid_mode2_reset +ffffffff81e89000 T smu_v11_0_i2c_control_init +ffffffff81e890c0 T smu_v11_0_i2c_control_fini +ffffffff81e89100 t smu_v11_0_i2c_xfer +ffffffff81e8a1e0 t smu_v11_0_i2c_func +ffffffff81e8a210 t smu_v11_0_i2c_enable +ffffffff81e8a350 t smu_v11_0_i2c_abort +ffffffff81e8a450 t lock_bus +ffffffff81e8a4e0 t trylock_bus +ffffffff81e8a530 t unlock_bus +ffffffff81e8b000 t smuio_v11_0_get_rom_index_offset +ffffffff81e8b030 t smuio_v11_0_get_rom_data_offset +ffffffff81e8b060 t smuio_v11_0_update_rom_clock_gating +ffffffff81e8b1a0 t smuio_v11_0_get_clock_gating_state +ffffffff81e8c000 t smuio_v11_0_6_get_rom_index_offset +ffffffff81e8c030 t smuio_v11_0_6_get_rom_data_offset +ffffffff81e8c060 t smuio_v11_0_6_update_rom_clock_gating +ffffffff81e8c1a0 t smuio_v11_0_6_get_clock_gating_state +ffffffff81e8d000 t smuio_v13_0_get_rom_index_offset +ffffffff81e8d030 t smuio_v13_0_get_rom_data_offset +ffffffff81e8d060 t smuio_v13_0_update_rom_clock_gating +ffffffff81e8d1a0 t smuio_v13_0_get_clock_gating_state +ffffffff81e8d230 t smuio_v13_0_get_die_id +ffffffff81e8d2b0 t smuio_v13_0_get_socket_id +ffffffff81e8d330 t smuio_v13_0_is_host_gpu_xgmi_supported +ffffffff81e8e000 t smuio_v13_0_6_get_rom_index_offset +ffffffff81e8e030 t smuio_v13_0_6_get_rom_data_offset +ffffffff81e8f000 t smuio_v9_0_get_rom_index_offset +ffffffff81e8f030 t smuio_v9_0_get_rom_data_offset +ffffffff81e8f060 t smuio_v9_0_update_rom_clock_gating +ffffffff81e8f1a0 t smuio_v9_0_get_clock_gating_state +ffffffff81e90000 T soc15_grbm_select +ffffffff81e90080 T soc15_program_register_sequence +ffffffff81e90280 T soc15_set_virt_ops +ffffffff81e902f0 t soc15_common_early_init +ffffffff81e90680 t soc15_common_late_init +ffffffff81e906c0 t soc15_common_sw_init +ffffffff81e90720 t soc15_common_sw_fini +ffffffff81e90770 t soc15_common_hw_init +ffffffff81e908a0 t soc15_common_hw_fini +ffffffff81e90970 t soc15_common_suspend +ffffffff81e909b0 t soc15_common_resume +ffffffff81e909f0 t soc15_common_is_idle +ffffffff81e90a20 t soc15_common_wait_for_idle +ffffffff81e90a50 t soc15_common_soft_reset +ffffffff81e90a80 t soc15_common_set_clockgating_state +ffffffff81e90dc0 t soc15_common_set_powergating_state +ffffffff81e90df0 t soc15_common_get_clockgating_state +ffffffff81e90ed0 t soc15_pcie_rreg +ffffffff81e90f30 t soc15_pcie_wreg +ffffffff81e90f90 t soc15_pcie_rreg64 +ffffffff81e90ff0 t soc15_pcie_wreg64 +ffffffff81e91050 t soc15_uvd_ctx_rreg +ffffffff81e910f0 t soc15_uvd_ctx_wreg +ffffffff81e91170 t soc15_didt_rreg +ffffffff81e91200 t soc15_didt_wreg +ffffffff81e91280 t soc15_gc_cac_rreg +ffffffff81e91390 t soc15_gc_cac_wreg +ffffffff81e914a0 t soc15_se_cac_rreg +ffffffff81e915b0 t soc15_se_cac_wreg +ffffffff81e916c0 t soc15_read_disabled_bios +ffffffff81e916f0 t soc15_read_register +ffffffff81e917f0 t soc15_vga_set_state +ffffffff81e91820 t soc15_asic_reset +ffffffff81e91920 t soc15_asic_reset_method +ffffffff81e91aa0 t soc15_get_xclk +ffffffff81e91af0 t soc15_set_uvd_clocks +ffffffff81e91b20 t soc15_set_vce_clocks +ffffffff81e91b50 t soc15_get_config_memsize +ffffffff81e91b70 t soc15_need_full_reset +ffffffff81e91ba0 t soc15_get_pcie_usage +ffffffff81e91cd0 t soc15_need_reset_on_init +ffffffff81e91d70 t soc15_get_pcie_replay_count +ffffffff81e91de0 t soc15_supports_baco +ffffffff81e91e40 t soc15_pre_asic_init +ffffffff81e91e50 t soc15_query_video_codecs +ffffffff81e91ef0 t vega20_get_pcie_usage +ffffffff81e93000 T soc21_grbm_select +ffffffff81e93080 t soc21_common_early_init +ffffffff81e932a0 t soc21_common_late_init +ffffffff81e932d0 t soc21_common_sw_init +ffffffff81e93300 t soc21_common_sw_fini +ffffffff81e93330 t soc21_common_hw_init +ffffffff81e933f0 t soc21_common_hw_fini +ffffffff81e93450 t soc21_common_suspend +ffffffff81e934b0 t soc21_common_resume +ffffffff81e93570 t soc21_common_is_idle +ffffffff81e935a0 t soc21_common_wait_for_idle +ffffffff81e935d0 t soc21_common_soft_reset +ffffffff81e93600 t soc21_common_set_clockgating_state +ffffffff81e936b0 t soc21_common_set_powergating_state +ffffffff81e93710 t soc21_common_get_clockgating_state +ffffffff81e93750 t soc21_pcie_rreg +ffffffff81e937b0 t soc21_pcie_wreg +ffffffff81e93810 t soc21_pcie_rreg64 +ffffffff81e93870 t soc21_pcie_wreg64 +ffffffff81e938d0 t soc21_didt_rreg +ffffffff81e93960 t soc21_didt_wreg +ffffffff81e939e0 t soc21_read_disabled_bios +ffffffff81e93a10 t soc21_read_register +ffffffff81e93b00 t soc21_vga_set_state +ffffffff81e93b30 t soc21_asic_reset +ffffffff81e93c00 t soc21_asic_reset_method +ffffffff81e93cc0 t soc21_get_xclk +ffffffff81e93cf0 t soc21_set_uvd_clocks +ffffffff81e93d20 t soc21_set_vce_clocks +ffffffff81e93d50 t soc21_get_config_memsize +ffffffff81e93d70 t soc21_need_full_reset +ffffffff81e93dd0 t soc21_init_doorbell_index +ffffffff81e93ef0 t soc21_need_reset_on_init +ffffffff81e93f80 t soc21_get_pcie_replay_count +ffffffff81e93fb0 t soc21_pre_asic_init +ffffffff81e93fe0 t soc21_update_umd_stable_pstate +ffffffff81e94050 t soc21_query_video_codecs +ffffffff81e95000 t tonga_ih_early_init +ffffffff81e95050 t tonga_ih_sw_init +ffffffff81e950d0 t tonga_ih_sw_fini +ffffffff81e95110 t tonga_ih_hw_init +ffffffff81e952f0 t tonga_ih_hw_fini +ffffffff81e95390 t tonga_ih_suspend +ffffffff81e95430 t tonga_ih_resume +ffffffff81e95470 t tonga_ih_is_idle +ffffffff81e954b0 t tonga_ih_wait_for_idle +ffffffff81e95540 t tonga_ih_check_soft_reset +ffffffff81e95590 t tonga_ih_pre_soft_reset +ffffffff81e95630 t tonga_ih_soft_reset +ffffffff81e956f0 t tonga_ih_post_soft_reset +ffffffff81e95730 t tonga_ih_set_clockgating_state +ffffffff81e95760 t tonga_ih_set_powergating_state +ffffffff81e95790 t tonga_ih_get_wptr +ffffffff81e95880 t tonga_ih_decode_iv +ffffffff81e958f0 t tonga_ih_set_rptr +ffffffff81e96000 t umc_v6_0_init_registers +ffffffff81e97000 t umc_v6_1_query_ras_error_count +ffffffff81e974e0 t umc_v6_1_query_ras_error_address +ffffffff81e977c0 t umc_v6_1_err_cnt_init +ffffffff81e98000 t umc_v6_7_query_ras_error_count +ffffffff81e98410 t umc_v6_7_query_ras_error_address +ffffffff81e98580 t umc_v6_7_query_ras_poison_mode +ffffffff81e985d0 t umc_v6_7_convert_error_address +ffffffff81e988d0 t umc_v6_7_ecc_info_query_ras_error_count +ffffffff81e98b00 t umc_v6_7_ecc_info_query_ras_error_address +ffffffff81e99000 t umc_v8_10_query_ras_error_count +ffffffff81e99280 t umc_v8_10_query_ras_error_address +ffffffff81e995b0 t umc_v8_10_err_cnt_init +ffffffff81e99730 t umc_v8_10_query_ras_poison_mode +ffffffff81e9a000 t umc_v8_7_query_ras_error_count +ffffffff81e9a300 t umc_v8_7_query_ras_error_address +ffffffff81e9a4b0 t umc_v8_7_err_cnt_init +ffffffff81e9a600 t umc_v8_7_ecc_info_query_ras_error_count +ffffffff81e9a730 t umc_v8_7_ecc_info_query_ras_error_address +ffffffff81e9b000 t uvd_v5_0_early_init +ffffffff81e9b050 t uvd_v5_0_sw_init +ffffffff81e9b130 t uvd_v5_0_sw_fini +ffffffff81e9b180 t uvd_v5_0_hw_init +ffffffff81e9b690 t uvd_v5_0_hw_fini +ffffffff81e9b710 t uvd_v5_0_suspend +ffffffff81e9b800 t uvd_v5_0_resume +ffffffff81e9b850 t uvd_v5_0_is_idle +ffffffff81e9b890 t uvd_v5_0_wait_for_idle +ffffffff81e9b910 t uvd_v5_0_soft_reset +ffffffff81e9b9b0 t uvd_v5_0_set_clockgating_state +ffffffff81e9bb50 t uvd_v5_0_set_powergating_state +ffffffff81e9bb90 t uvd_v5_0_get_clockgating_state +ffffffff81e9bc10 t uvd_v5_0_ring_get_rptr +ffffffff81e9bc50 t uvd_v5_0_ring_get_wptr +ffffffff81e9bc90 t uvd_v5_0_ring_set_wptr +ffffffff81e9bcb0 t uvd_v5_0_ring_emit_ib +ffffffff81e9bf20 t uvd_v5_0_ring_emit_fence +ffffffff81e9c4d0 t uvd_v5_0_ring_test_ring +ffffffff81e9c670 t uvd_v5_0_ring_insert_nop +ffffffff81e9c7d0 t uvd_v5_0_set_interrupt_state +ffffffff81e9c800 t uvd_v5_0_process_interrupt +ffffffff81e9c860 t uvd_v5_0_stop +ffffffff81e9c970 t uvd_v5_0_start +ffffffff81e9e000 t uvd_v6_0_early_init +ffffffff81e9e140 t uvd_v6_0_sw_init +ffffffff81e9e450 t uvd_v6_0_sw_fini +ffffffff81e9e500 t uvd_v6_0_hw_init +ffffffff81e9eac0 t uvd_v6_0_hw_fini +ffffffff81e9eb40 t uvd_v6_0_suspend +ffffffff81e9ec30 t uvd_v6_0_resume +ffffffff81e9ec80 t uvd_v6_0_is_idle +ffffffff81e9ecc0 t uvd_v6_0_wait_for_idle +ffffffff81e9ed40 t uvd_v6_0_check_soft_reset +ffffffff81e9edb0 t uvd_v6_0_pre_soft_reset +ffffffff81e9edf0 t uvd_v6_0_soft_reset +ffffffff81e9eeb0 t uvd_v6_0_post_soft_reset +ffffffff81e9ef50 t uvd_v6_0_set_clockgating_state +ffffffff81e9f0e0 t uvd_v6_0_set_powergating_state +ffffffff81e9f150 t uvd_v6_0_get_clockgating_state +ffffffff81e9f1e0 t uvd_v6_0_ring_get_rptr +ffffffff81e9f220 t uvd_v6_0_ring_get_wptr +ffffffff81e9f260 t uvd_v6_0_ring_set_wptr +ffffffff81e9f280 t uvd_v6_0_ring_emit_ib +ffffffff81e9f5e0 t uvd_v6_0_ring_emit_fence +ffffffff81e9fb90 t uvd_v6_0_ring_emit_pipeline_sync +ffffffff81e9ff80 t uvd_v6_0_ring_emit_vm_flush +ffffffff81ea02e0 t uvd_v6_0_ring_emit_hdp_flush +ffffffff81ea0310 t uvd_v6_0_ring_test_ring +ffffffff81ea04b0 t uvd_v6_0_ring_insert_nop +ffffffff81ea0610 t uvd_v6_0_ring_emit_wreg +ffffffff81ea0890 t uvd_v6_0_enc_ring_get_rptr +ffffffff81ea08f0 t uvd_v6_0_enc_ring_get_wptr +ffffffff81ea0950 t uvd_v6_0_enc_ring_set_wptr +ffffffff81ea0990 t uvd_v6_0_enc_ring_emit_ib +ffffffff81ea0bd0 t uvd_v6_0_enc_ring_emit_fence +ffffffff81ea0e10 t uvd_v6_0_enc_ring_emit_pipeline_sync +ffffffff81ea0fc0 t uvd_v6_0_enc_ring_emit_vm_flush +ffffffff81ea11d0 t uvd_v6_0_enc_ring_test_ring +ffffffff81ea1320 t uvd_v6_0_enc_ring_test_ib +ffffffff81ea18d0 t uvd_v6_0_enc_ring_insert_end +ffffffff81ea1960 t uvd_v6_0_set_interrupt_state +ffffffff81ea1990 t uvd_v6_0_process_interrupt +ffffffff81ea1a80 t uvd_v6_0_stop +ffffffff81ea1b90 t uvd_v6_0_start +ffffffff81ea3000 t uvd_v7_0_early_init +ffffffff81ea3270 t uvd_v7_0_sw_init +ffffffff81ea35e0 t uvd_v7_0_sw_fini +ffffffff81ea36e0 t uvd_v7_0_hw_init +ffffffff81ea6600 t uvd_v7_0_hw_fini +ffffffff81ea6900 t uvd_v7_0_suspend +ffffffff81ea69b0 t uvd_v7_0_resume +ffffffff81ea6a00 t uvd_v7_0_set_clockgating_state +ffffffff81ea6a30 t uvd_v7_0_ring_get_rptr +ffffffff81ea6ac0 t uvd_v7_0_ring_get_wptr +ffffffff81ea6b50 t uvd_v7_0_ring_set_wptr +ffffffff81ea6bd0 t uvd_v7_0_ring_patch_cs_in_place +ffffffff81ea6c50 t uvd_v7_0_ring_emit_ib +ffffffff81ea6ff0 t uvd_v7_0_ring_emit_fence +ffffffff81ea7640 t uvd_v7_0_ring_emit_vm_flush +ffffffff81ea76b0 t uvd_v7_0_ring_emit_hdp_flush +ffffffff81ea76e0 t uvd_v7_0_ring_test_ring +ffffffff81ea7960 t uvd_v7_0_ring_insert_nop +ffffffff81ea7af0 t uvd_v7_0_ring_emit_wreg +ffffffff81ea7dc0 t uvd_v7_0_ring_emit_reg_wait +ffffffff81ea8160 t uvd_v7_0_enc_ring_get_rptr +ffffffff81ea8250 t uvd_v7_0_enc_ring_get_wptr +ffffffff81ea8350 t uvd_v7_0_enc_ring_set_wptr +ffffffff81ea8450 t uvd_v7_0_enc_ring_emit_ib +ffffffff81ea8690 t uvd_v7_0_enc_ring_emit_fence +ffffffff81ea88d0 t uvd_v7_0_enc_ring_emit_vm_flush +ffffffff81ea8940 t uvd_v7_0_enc_ring_test_ring +ffffffff81ea8aa0 t uvd_v7_0_enc_ring_test_ib +ffffffff81ea9050 t uvd_v7_0_enc_ring_insert_end +ffffffff81ea90e0 t uvd_v7_0_enc_ring_emit_wreg +ffffffff81ea9230 t uvd_v7_0_enc_ring_emit_reg_wait +ffffffff81ea93f0 t uvd_v7_0_set_interrupt_state +ffffffff81ea9420 t uvd_v7_0_process_interrupt +ffffffff81eaa000 t vce_v3_0_early_init +ffffffff81eaa180 t vce_v3_0_sw_init +ffffffff81eaa2d0 t vce_v3_0_sw_fini +ffffffff81eaa320 t vce_v3_0_hw_init +ffffffff81eaa400 t vce_v3_0_hw_fini +ffffffff81eaa4e0 t vce_v3_0_suspend +ffffffff81eaa5b0 t vce_v3_0_resume +ffffffff81eaa600 t vce_v3_0_is_idle +ffffffff81eaa660 t vce_v3_0_wait_for_idle +ffffffff81eaa710 t vce_v3_0_check_soft_reset +ffffffff81eaa800 t vce_v3_0_pre_soft_reset +ffffffff81eaa8a0 t vce_v3_0_soft_reset +ffffffff81eaa960 t vce_v3_0_post_soft_reset +ffffffff81eaaac0 t vce_v3_0_set_clockgating_state +ffffffff81eaada0 t vce_v3_0_set_powergating_state +ffffffff81eab5e0 t vce_v3_0_get_clockgating_state +ffffffff81eab6a0 t vce_v3_0_ring_get_rptr +ffffffff81eab770 t vce_v3_0_ring_get_wptr +ffffffff81eab840 t vce_v3_0_ring_set_wptr +ffffffff81eab8f0 t vce_v3_0_ring_emit_ib +ffffffff81eabb30 t vce_v3_0_emit_pipeline_sync +ffffffff81eabce0 t vce_v3_0_emit_vm_flush +ffffffff81eabf50 t vce_v3_0_set_interrupt_state +ffffffff81eabfc0 t vce_v3_0_process_interrupt +ffffffff81eac080 t vce_v3_0_stop +ffffffff81ead000 t vce_v4_0_early_init +ffffffff81ead0b0 t vce_v4_0_sw_init +ffffffff81ead2e0 t vce_v4_0_sw_fini +ffffffff81ead360 t vce_v4_0_hw_init +ffffffff81eadb30 t vce_v4_0_hw_fini +ffffffff81eadbd0 t vce_v4_0_suspend +ffffffff81eaddf0 t vce_v4_0_resume +ffffffff81eade90 t vce_v4_0_set_clockgating_state +ffffffff81eadec0 t vce_v4_0_set_powergating_state +ffffffff81eadfa0 t vce_v4_0_ring_get_rptr +ffffffff81eae000 t vce_v4_0_ring_get_wptr +ffffffff81eae090 t vce_v4_0_ring_set_wptr +ffffffff81eae110 t vce_v4_0_ring_emit_ib +ffffffff81eae350 t vce_v4_0_ring_emit_fence +ffffffff81eae590 t vce_v4_0_emit_vm_flush +ffffffff81eae600 t vce_v4_0_ring_insert_end +ffffffff81eae690 t vce_v4_0_emit_wreg +ffffffff81eae7e0 t vce_v4_0_emit_reg_wait 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vcn_v1_0_enc_ring_emit_wreg +ffffffff81eb4750 t vcn_v1_0_enc_ring_emit_reg_wait +ffffffff81eb4910 t vcn_v1_0_set_interrupt_state +ffffffff81eb4940 t vcn_v1_0_process_interrupt +ffffffff81eb49e0 t vcn_v1_0_idle_work_handler +ffffffff81eb4b60 t vcn_v1_0_pause_dpg_mode +ffffffff81eb5c80 t vcn_v1_0_enable_clock_gating +ffffffff81eb6090 t vcn_v1_0_disable_clock_gating +ffffffff81eb6620 t vcn_1_0_enable_static_power_gating +ffffffff81eb6840 t vcn_v1_0_start_dpg_mode +ffffffff81eba470 t vcn_v1_0_start_spg_mode +ffffffff81ebc690 t vcn_v1_0_clock_gating_dpg_mode +ffffffff81ebd000 T vcn_v2_0_dec_ring_insert_start +ffffffff81ebd1c0 T vcn_v2_0_dec_ring_insert_end +ffffffff81ebd2c0 T vcn_v2_0_dec_ring_insert_nop +ffffffff81ebd430 T vcn_v2_0_dec_ring_emit_fence +ffffffff81ebd9f0 T vcn_v2_0_dec_ring_emit_ib +ffffffff81ebdd50 T vcn_v2_0_dec_ring_emit_reg_wait +ffffffff81ebe0a0 T vcn_v2_0_dec_ring_emit_vm_flush +ffffffff81ebe110 T vcn_v2_0_dec_ring_emit_wreg +ffffffff81ebe3a0 T vcn_v2_0_enc_ring_emit_fence +ffffffff81ebe5e0 T vcn_v2_0_enc_ring_insert_end +ffffffff81ebe670 T vcn_v2_0_enc_ring_emit_ib +ffffffff81ebe8b0 T vcn_v2_0_enc_ring_emit_reg_wait +ffffffff81ebea70 T vcn_v2_0_enc_ring_emit_vm_flush +ffffffff81ebeae0 T vcn_v2_0_enc_ring_emit_wreg +ffffffff81ebec30 T vcn_v2_0_dec_ring_test_ring +ffffffff81ebeec0 t vcn_v2_0_early_init +ffffffff81ebf030 t vcn_v2_0_sw_init +ffffffff81ebf340 t vcn_v2_0_sw_fini +ffffffff81ebf3c0 t vcn_v2_0_hw_init +ffffffff81ebfd70 t vcn_v2_0_hw_fini +ffffffff81ebfe70 t vcn_v2_0_suspend +ffffffff81ebfe90 t vcn_v2_0_resume +ffffffff81ebfee0 t vcn_v2_0_is_idle +ffffffff81ebff60 t vcn_v2_0_wait_for_idle +ffffffff81ec0050 t vcn_v2_0_set_clockgating_state +ffffffff81ec00e0 t vcn_v2_0_set_powergating_state +ffffffff81ec23a0 t vcn_v2_0_dec_ring_get_rptr +ffffffff81ec2420 t vcn_v2_0_dec_ring_get_wptr +ffffffff81ec24c0 t vcn_v2_0_dec_ring_set_wptr +ffffffff81ec25f0 t vcn_v2_0_enc_ring_get_rptr +ffffffff81ec26c0 t vcn_v2_0_enc_ring_get_wptr +ffffffff81ec27b0 t vcn_v2_0_enc_ring_set_wptr +ffffffff81ec28a0 t vcn_v2_0_set_interrupt_state +ffffffff81ec28d0 t vcn_v2_0_process_interrupt +ffffffff81ec2970 t vcn_v2_0_pause_dpg_mode +ffffffff81ec32d0 t vcn_v2_0_enable_clock_gating +ffffffff81ec3550 t vcn_v2_0_disable_clock_gating +ffffffff81ec3950 t vcn_v2_0_enable_static_power_gating +ffffffff81ec3b30 t vcn_v2_0_start_dpg_mode +ffffffff81ec85f0 t vcn_v2_0_clock_gating_dpg_mode +ffffffff81ec9000 t vcn_v2_6_query_poison_status +ffffffff81ec90c0 t vcn_v2_5_early_init +ffffffff81ec9400 t vcn_v2_5_sw_init +ffffffff81ec9880 t vcn_v2_5_sw_fini +ffffffff81ec9950 t vcn_v2_5_hw_init +ffffffff81eca410 t vcn_v2_5_hw_fini +ffffffff81eca550 t vcn_v2_5_suspend +ffffffff81eca570 t vcn_v2_5_resume +ffffffff81eca5c0 t vcn_v2_5_is_idle +ffffffff81eca6b0 t vcn_v2_5_wait_for_idle +ffffffff81eca7e0 t vcn_v2_5_set_clockgating_state +ffffffff81eca850 t vcn_v2_5_set_powergating_state +ffffffff81ecb130 t vcn_v2_5_dec_ring_get_rptr +ffffffff81ecb1c0 t vcn_v2_5_dec_ring_get_wptr +ffffffff81ecb270 t vcn_v2_5_dec_ring_set_wptr +ffffffff81ecb310 t vcn_v2_5_enc_ring_get_rptr +ffffffff81ecb400 t vcn_v2_5_enc_ring_get_wptr +ffffffff81ecb500 t vcn_v2_5_enc_ring_set_wptr +ffffffff81ecb5f0 t vcn_v2_5_set_interrupt_state +ffffffff81ecb620 t vcn_v2_5_process_interrupt +ffffffff81ecb740 t vcn_v2_5_pause_dpg_mode +ffffffff81ecc0b0 t vcn_v2_5_enable_clock_gating +ffffffff81ecc3b0 t vcn_v2_5_disable_clock_gating +ffffffff81ecc8d0 t vcn_v2_5_start +ffffffff81ed04d0 t vcn_v2_5_clock_gating_dpg_mode +ffffffff81ed0e70 t vcn_v2_5_mc_resume_dpg_mode +ffffffff81ed4000 t vcn_v3_0_early_init +ffffffff81ed4210 t vcn_v3_0_sw_init +ffffffff81ed46b0 t vcn_v3_0_sw_fini +ffffffff81ed4790 t vcn_v3_0_hw_init +ffffffff81ed5330 t vcn_v3_0_hw_fini +ffffffff81ed5430 t vcn_v3_0_suspend +ffffffff81ed5450 t vcn_v3_0_resume +ffffffff81ed54a0 t vcn_v3_0_is_idle +ffffffff81ed5590 t vcn_v3_0_wait_for_idle +ffffffff81ed56c0 t vcn_v3_0_set_clockgating_state +ffffffff81ed57d0 t vcn_v3_0_set_powergating_state +ffffffff81ed8050 t vcn_v3_0_dec_ring_get_rptr +ffffffff81ed80e0 t vcn_v3_0_dec_ring_get_wptr +ffffffff81ed8190 t vcn_v3_0_dec_ring_set_wptr +ffffffff81ed8300 t vcn_v3_0_ring_patch_cs_in_place +ffffffff81ed85f0 t vcn_v3_0_enc_ring_get_rptr +ffffffff81ed86e0 t vcn_v3_0_enc_ring_get_wptr +ffffffff81ed87e0 t vcn_v3_0_enc_ring_set_wptr +ffffffff81ed88d0 t vcn_v3_0_set_interrupt_state +ffffffff81ed8900 t vcn_v3_0_process_interrupt +ffffffff81ed89f0 t vcn_v3_0_pause_dpg_mode +ffffffff81ed9360 t vcn_v3_0_enable_clock_gating +ffffffff81ed95e0 t vcn_v3_0_disable_clock_gating +ffffffff81ed9b80 t vcn_v3_0_start_dpg_mode +ffffffff81ede920 t vcn_v3_0_clock_gating_dpg_mode +ffffffff81ee0000 t vcn_v4_0_early_init +ffffffff81ee0120 t vcn_v4_0_sw_init +ffffffff81ee0350 t vcn_v4_0_sw_fini +ffffffff81ee0430 t vcn_v4_0_hw_init +ffffffff81ee0e60 t vcn_v4_0_hw_fini +ffffffff81ee0f60 t vcn_v4_0_suspend +ffffffff81ee0f80 t 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amdgpu_dm_update_plane_color_mgmt +ffffffff81f02000 T dm_crtc_handle_vblank +ffffffff81f02070 T modeset_required +ffffffff81f020b0 T amdgpu_dm_vrr_active_irq +ffffffff81f020f0 T dm_set_vupdate_irq +ffffffff81f02190 T amdgpu_dm_vrr_active +ffffffff81f021d0 T dm_enable_vblank +ffffffff81f021e0 t dm_set_vblank +ffffffff81f023d0 T dm_disable_vblank +ffffffff81f023e0 T amdgpu_dm_crtc_init +ffffffff81f025b0 t vblank_control_worker +ffffffff81f026c0 t dm_crtc_reset_state +ffffffff81f02760 t amdgpu_dm_crtc_destroy +ffffffff81f02790 t dm_crtc_duplicate_state +ffffffff81f02930 t dm_crtc_destroy_state +ffffffff81f02970 t dm_crtc_helper_mode_fixup +ffffffff81f029a0 t dm_crtc_helper_disable +ffffffff81f029d0 t dm_crtc_helper_atomic_check +ffffffff81f03000 T dm_helpers_parse_edid_caps +ffffffff81f03190 T dm_helpers_dp_update_branch_info +ffffffff81f031c0 T dm_helpers_dp_mst_write_payload_allocation_table +ffffffff81f03440 T dm_helpers_dp_mst_poll_pending_down_reply +ffffffff81f03470 T dm_helpers_dp_mst_clear_payload_allocation_table +ffffffff81f034a0 T dm_helpers_dp_mst_poll_for_allocation_change_trigger +ffffffff81f03510 T dm_helpers_dp_mst_send_payload_allocation +ffffffff81f035e0 T dm_dtn_log_begin +ffffffff81f03630 T dm_dtn_log_append_v +ffffffff81f03770 T dm_dtn_log_end +ffffffff81f037c0 T dm_helpers_dp_mst_start_top_mgr +ffffffff81f03860 T dm_helpers_dp_mst_stop_top_mgr +ffffffff81f038f0 T dm_helpers_dp_read_dpcd +ffffffff81f03970 T dm_helpers_dp_write_dpcd +ffffffff81f039e0 T dm_helpers_submit_i2c +ffffffff81f03b00 T dm_helpers_dp_write_dsc_enable +ffffffff81f04080 T dm_helpers_is_dp_sink_present +ffffffff81f04110 T dm_helpers_read_local_edid +ffffffff81f042b0 T dm_helper_dmub_aux_transfer_sync +ffffffff81f042d0 T dm_helpers_dmub_set_config_sync +ffffffff81f042f0 T dm_set_dcn_clocks +ffffffff81f04320 T dm_helpers_smu_timeout +ffffffff81f04350 T dm_helpers_init_panel_settings +ffffffff81f043c0 T dm_helpers_override_panel_settings +ffffffff81f043f0 T dm_helpers_allocate_gpu_mem +ffffffff81f044e0 T dm_helpers_free_gpu_mem +ffffffff81f04580 T dm_helpers_dmub_outbox_interrupt_control +ffffffff81f04600 T dm_helpers_mst_enable_stream_features +ffffffff81f04710 T dm_set_phyd32clk +ffffffff81f04740 T dm_helpers_enable_periodic_detection +ffffffff81f04770 t execute_synaptics_rc_command +ffffffff81f05000 T amdgpu_dm_irq_register_interrupt +ffffffff81f051a0 t dm_irq_work_func +ffffffff81f051c0 T amdgpu_dm_irq_unregister_interrupt +ffffffff81f053e0 T amdgpu_dm_irq_init +ffffffff81f054d0 T amdgpu_dm_irq_fini +ffffffff81f05660 T amdgpu_dm_irq_suspend +ffffffff81f05770 T amdgpu_dm_irq_resume_early +ffffffff81f05920 T amdgpu_dm_irq_resume_late +ffffffff81f05ad0 T amdgpu_dm_set_irq_funcs +ffffffff81f05b80 T amdgpu_dm_outbox_init +ffffffff81f05ba0 T amdgpu_dm_hpd_init +ffffffff81f05c60 T amdgpu_dm_hpd_fini +ffffffff81f05d20 t amdgpu_dm_set_crtc_irq_state +ffffffff81f05da0 t amdgpu_dm_irq_handler +ffffffff81f05f90 t amdgpu_dm_set_vline0_irq_state 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dm_dp_mst_connector_destroy +ffffffff81f08f80 t dm_dp_mst_get_modes +ffffffff81f09320 t dm_dp_mst_detect +ffffffff81f094b0 t dm_mst_atomic_best_encoder +ffffffff81f09510 t dm_dp_mst_atomic_check +ffffffff81f09540 t set_dsc_configs_from_fairness_vars +ffffffff81f0a000 T amd_get_format_info +ffffffff81f0a020 T fill_blending_from_plane_state +ffffffff81f0a0c0 T fill_plane_buffer_attributes +ffffffff81f0a630 T dm_plane_helper_check_state +ffffffff81f0a850 T fill_dc_scaling_info +ffffffff81f0aab0 T handle_cursor_update +ffffffff81f0ad30 T amdgpu_dm_plane_init +ffffffff81f0bab0 t dm_drm_plane_reset +ffffffff81f0bb40 t dm_drm_plane_duplicate_state +ffffffff81f0bbd0 t dm_drm_plane_destroy_state +ffffffff81f0bc10 t dm_plane_format_mod_supported +ffffffff81f0bd30 t dm_plane_helper_prepare_fb +ffffffff81f0bfe0 t dm_plane_helper_cleanup_fb +ffffffff81f0c080 t dm_plane_atomic_check +ffffffff81f0c150 t dm_plane_atomic_async_check +ffffffff81f0c190 t dm_plane_atomic_async_update +ffffffff81f0c240 t amdgpu_bo_reserve +ffffffff81f0c450 t amdgpu_bo_unreserve +ffffffff81f0d000 T dm_pp_apply_display_requirements +ffffffff81f0d1e0 T dm_pp_get_clock_levels_by_type +ffffffff81f0d520 T dm_pp_get_clock_levels_by_type_with_latency +ffffffff81f0d6e0 T dm_pp_get_clock_levels_by_type_with_voltage +ffffffff81f0d8a0 T dm_pp_notify_wm_clock_changes +ffffffff81f0d8f0 T dm_pp_apply_power_level_change_request +ffffffff81f0d920 T dm_pp_apply_clock_for_voltage_request +ffffffff81f0d9c0 T dm_pp_get_static_clocks +ffffffff81f0da70 T dm_pp_get_funcs +ffffffff81f0db80 t pp_rv_set_wm_ranges +ffffffff81f0dcd0 t pp_rv_set_pme_wa_enable +ffffffff81f0dcf0 t pp_rv_set_active_display_count +ffffffff81f0dd10 t pp_rv_set_min_deep_sleep_dcfclk +ffffffff81f0dd30 t pp_rv_set_hard_min_dcefclk_by_freq +ffffffff81f0dd50 t pp_rv_set_hard_min_fclk_by_freq +ffffffff81f0dd70 t pp_nv_set_display_count +ffffffff81f0ddc0 t pp_nv_set_hard_min_dcefclk_by_freq +ffffffff81f0de30 t pp_nv_set_min_deep_sleep_dcfclk +ffffffff81f0de80 t pp_nv_set_voltage_by_freq +ffffffff81f0df10 t pp_nv_set_wm_ranges +ffffffff81f0df50 t pp_nv_set_hard_min_uclk_by_freq +ffffffff81f0dfc0 t pp_nv_get_maximum_sustainable_clocks +ffffffff81f0e010 t pp_nv_get_uclk_dpm_states +ffffffff81f0e060 t pp_nv_set_pstate_handshake_support +ffffffff81f0e0b0 t pp_rn_set_wm_ranges +ffffffff81f0e0f0 t pp_rn_get_dpm_clock_table +ffffffff81f0f000 T amdgpu_dm_set_psr_caps +ffffffff81f0f110 T amdgpu_dm_link_setup_psr +ffffffff81f0f280 T amdgpu_dm_psr_enable +ffffffff81f0f370 T amdgpu_dm_psr_disable +ffffffff81f0f3f0 T amdgpu_dm_psr_disable_all +ffffffff81f10000 T dm_get_elapse_time_in_ns +ffffffff81f10030 T dm_perf_trace_timestamp +ffffffff81f11000 T dc_assert_fp_enabled +ffffffff81f11070 T dc_fpu_begin +ffffffff81f110c0 T dc_fpu_end +ffffffff81f12000 T dal_vector_construct +ffffffff81f120d0 T dal_vector_presized_create +ffffffff81f12350 T dal_vector_create +ffffffff81f12470 T dal_vector_destruct +ffffffff81f124c0 T dal_vector_destroy +ffffffff81f12530 T dal_vector_get_count +ffffffff81f12560 T dal_vector_at_index +ffffffff81f125a0 T dal_vector_remove_at_index +ffffffff81f12630 T dal_vector_set_at_index +ffffffff81f12690 T dal_vector_insert_at +ffffffff81f12780 T dal_vector_reserve +ffffffff81f12820 T dal_vector_append +ffffffff81f12920 T dal_vector_clone +ffffffff81f129d0 T dal_vector_capacity +ffffffff81f12a00 T dal_vector_clear +ffffffff81f13000 T fixed_point_to_int_frac +ffffffff81f13200 T convert_float_matrix +ffffffff81f132c0 T reduce_fraction +ffffffff81f14000 T is_rgb_cspace +ffffffff81f14080 T is_lower_pipe_tree_visible +ffffffff81f140e0 T is_upper_pipe_tree_visible +ffffffff81f14140 T is_pipe_tree_visible +ffffffff81f141c0 T build_prescale_params +ffffffff81f15000 T dc_fixpt_from_fraction +ffffffff81f151d0 T dc_fixpt_mul +ffffffff81f15370 T dc_fixpt_sqr +ffffffff81f154d0 T dc_fixpt_recip +ffffffff81f15540 T dc_fixpt_sinc +ffffffff81f15730 T dc_fixpt_sin +ffffffff81f15760 T dc_fixpt_cos +ffffffff81f15840 T dc_fixpt_exp +ffffffff81f15b30 t fixed31_32_exp_from_taylor_series +ffffffff81f15f10 T dc_fixpt_log +ffffffff81f16120 T dc_fixpt_u4d19 +ffffffff81f16160 T dc_fixpt_u3d19 +ffffffff81f161a0 T dc_fixpt_u2d19 +ffffffff81f161e0 T dc_fixpt_u0d19 +ffffffff81f16210 T dc_fixpt_clamp_u0d14 +ffffffff81f16250 T dc_fixpt_clamp_u0d10 +ffffffff81f16290 T dc_fixpt_s4d19 +ffffffff81f17000 T bios_parser_create +ffffffff81f183b0 t bios_parser_get_connectors_number +ffffffff81f18410 t bios_parser_get_connector_id +ffffffff81f184a0 t bios_parser_get_src_obj +ffffffff81f185a0 t bios_parser_get_i2c_info +ffffffff81f187b0 t bios_parser_get_hpd_info +ffffffff81f18880 t bios_parser_get_device_tag +ffffffff81f18a70 t bios_parser_get_spread_spectrum_info +ffffffff81f18d70 t bios_parser_get_ss_entry_number +ffffffff81f18fa0 t bios_parser_get_embedded_panel_info +ffffffff81f194e0 t bios_parser_get_gpio_pin_info +ffffffff81f19600 t bios_parser_get_encoder_cap_info +ffffffff81f19700 t bios_parser_set_scratch_critical_state +ffffffff81f19710 t bios_parser_is_device_id_supported +ffffffff81f197d0 t bios_parser_encoder_control +ffffffff81f19810 t bios_parser_transmitter_control +ffffffff81f19850 t bios_parser_enable_crtc +ffffffff81f19890 t bios_parser_adjust_pixel_clock +ffffffff81f198d0 t bios_parser_set_pixel_clock +ffffffff81f19910 t bios_parser_set_dce_clock +ffffffff81f19950 t bios_parser_enable_spread_spectrum_on_ppll +ffffffff81f19990 t bios_parser_program_crtc_timing +ffffffff81f199d0 t bios_parser_program_display_engine_pll +ffffffff81f19a10 t bios_parser_enable_disp_power_gating +ffffffff81f19a50 t bios_parser_destroy +ffffffff81f19b10 t bios_get_board_layout_info +ffffffff81f19d90 t get_bios_object +ffffffff81f19f60 t get_ss_info_from_ss_info_table +ffffffff81f1a120 t get_ss_entry_number_from_ss_info_tbl +ffffffff81f1b000 T firmware_parser_create +ffffffff81f1cde0 t bios_parser_get_connectors_number +ffffffff81f1cf60 t bios_parser_get_connector_id +ffffffff81f1cff0 t bios_parser_get_src_obj +ffffffff81f1d280 t bios_parser_get_i2c_info +ffffffff81f1d4f0 t bios_parser_get_hpd_info +ffffffff81f1d660 t bios_parser_get_device_tag +ffffffff81f1d930 t bios_parser_get_spread_spectrum_info +ffffffff81f1dcf0 t bios_parser_get_ss_entry_number +ffffffff81f1dd20 t bios_parser_get_embedded_panel_info +ffffffff81f1df10 t bios_parser_get_gpio_pin_info +ffffffff81f1e030 t bios_parser_get_encoder_cap_info +ffffffff81f1e1a0 t bios_parser_is_accelerated_mode +ffffffff81f1e1b0 t bios_parser_set_scratch_critical_state +ffffffff81f1e1c0 t bios_parser_is_device_id_supported +ffffffff81f1e240 t bios_parser_encoder_control +ffffffff81f1e280 t bios_parser_transmitter_control +ffffffff81f1e2c0 t bios_parser_enable_crtc +ffffffff81f1e300 t bios_parser_set_pixel_clock +ffffffff81f1e340 t bios_parser_set_dce_clock +ffffffff81f1e380 t bios_parser_program_crtc_timing +ffffffff81f1e3c0 t bios_parser_enable_disp_power_gating +ffffffff81f1e400 t firmware_parser_destroy +ffffffff81f1e4c0 t bios_get_board_layout_info +ffffffff81f1e970 t bios_parser_pack_data_tables +ffffffff81f1e9a0 t bios_get_atom_dc_golden_table +ffffffff81f1eae0 t bios_parser_enable_lvtma_control +ffffffff81f1eb30 t bios_parser_get_soc_bb_info +ffffffff81f1ec30 t bios_parser_get_disp_connector_caps_info +ffffffff81f1ed80 t bios_parser_get_lttpr_caps +ffffffff81f1eed0 t bios_parser_get_lttpr_interop +ffffffff81f1f010 t bios_parser_get_connector_speed_cap_info +ffffffff81f1f160 t get_bios_object +ffffffff81f1f2c0 t get_bios_object_from_path_v3 +ffffffff81f20000 T object_id_from_bios_object_id +ffffffff81f21000 T bios_get_image +ffffffff81f21040 T bios_is_accelerated_mode +ffffffff81f210a0 T bios_set_scratch_acc_mode_change +ffffffff81f210d0 T bios_set_scratch_critical_state +ffffffff81f21100 T bios_get_vga_enabled_displays +ffffffff81f22000 T dal_bios_parser_create +ffffffff81f22070 T dal_bios_parser_destroy +ffffffff81f23000 T dal_bios_parser_init_cmd_tbl +ffffffff81f23800 t encoder_control_digx_v3 +ffffffff81f23900 t encoder_control_digx_v4 +ffffffff81f23a00 t encoder_control_digx_v5 +ffffffff81f23b50 t encoder_control_dig1_v1 +ffffffff81f23bd0 t encoder_control_dig2_v1 +ffffffff81f23c50 t encoder_control_dig_v1 +ffffffff81f23cb0 t transmitter_control_v2 +ffffffff81f23e50 t transmitter_control_v3 +ffffffff81f24010 t transmitter_control_v4 +ffffffff81f241c0 t transmitter_control_v1_5 +ffffffff81f24340 t transmitter_control_v1_6 +ffffffff81f244b0 t set_pixel_clock_v3 +ffffffff81f24620 t set_pixel_clock_v5 +ffffffff81f247c0 t set_pixel_clock_v6 +ffffffff81f24960 t set_pixel_clock_v7 +ffffffff81f24b30 t enable_spread_spectrum_on_ppll_v1 +ffffffff81f24c40 t enable_spread_spectrum_on_ppll_v2 +ffffffff81f24d60 t enable_spread_spectrum_on_ppll_v3 +ffffffff81f24e60 t adjust_display_pll_v2 +ffffffff81f24fb0 t adjust_display_pll_v3 +ffffffff81f25120 t dac1_encoder_control_v1 +ffffffff81f25190 t dac2_encoder_control_v1 +ffffffff81f25200 t dac1_output_control_v1 +ffffffff81f25260 t dac2_output_control_v1 +ffffffff81f252c0 t set_crtc_using_dtd_timing_v3 +ffffffff81f25420 t set_crtc_timing_v1 +ffffffff81f255c0 t enable_crtc_v1 +ffffffff81f25660 t enable_crtc_mem_req_v1 +ffffffff81f25700 t program_clock_v5 +ffffffff81f25800 t program_clock_v6 +ffffffff81f25920 t external_encoder_control_v3 +ffffffff81f25ad0 t enable_disp_power_gating_v2_1 +ffffffff81f25b90 t set_dce_clock_v2_1 +ffffffff81f26000 T dal_firmware_parser_init_cmd_tbl +ffffffff81f263d0 t encoder_control_digx_v1_5 +ffffffff81f265a0 t encoder_control_fallback +ffffffff81f265f0 t transmitter_control_v1_6 +ffffffff81f26790 t transmitter_control_v1_7 +ffffffff81f26980 t transmitter_control_fallback +ffffffff81f269d0 t set_pixel_clock_v7 +ffffffff81f26c20 t set_pixel_clock_fallback +ffffffff81f26c70 t set_crtc_using_dtd_timing_v3 +ffffffff81f26dd0 t enable_crtc_v1 +ffffffff81f26e70 t external_encoder_control_v3 +ffffffff81f26ea0 t enable_disp_power_gating_v2_1 +ffffffff81f27000 t enable_disp_power_gating_fallback +ffffffff81f27050 t set_dce_clock_v2_1 +ffffffff81f27170 t get_smu_clock_info_v3_1 +ffffffff81f271d0 t enable_lvtma_control +ffffffff81f28000 T dal_bios_parser_init_cmd_tbl_helper +ffffffff81f280a0 T dal_cmd_table_helper_controller_id_to_atom +ffffffff81f281b0 T dal_cmd_table_helper_transmitter_bp_to_atom +ffffffff81f28230 T dal_cmd_table_helper_encoder_mode_bp_to_atom +ffffffff81f282c0 T dal_cmd_table_helper_assign_control_parameter +ffffffff81f28380 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src +ffffffff81f28460 T dal_cmd_table_helper_encoder_id_to_atom +ffffffff81f29000 T dal_bios_parser_init_cmd_tbl_helper2 +ffffffff81f290b0 T dal_cmd_table_helper_controller_id_to_atom2 +ffffffff81f291b0 T dal_cmd_table_helper_transmitter_bp_to_atom2 +ffffffff81f29230 T dal_cmd_table_helper_encoder_mode_bp_to_atom2 +ffffffff81f292c0 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src2 +ffffffff81f293a0 T dal_cmd_table_helper_encoder_id_to_atom2 +ffffffff81f2a000 T dal_cmd_tbl_helper_dce110_get_table ffffffff81f2a030 t encoder_action_to_atom ffffffff81f2a0a0 t engine_bp_to_atom ffffffff81f2a0e0 t clock_source_id_to_atom -ffffffff81f2a1b0 t clock_source_id_to_atom_phy_clk_src_id -ffffffff81f2a200 t signal_type_to_atom_dig_mode -ffffffff81f2a260 t hpd_sel_to_atom -ffffffff81f2a290 t dig_encoder_sel_to_atom -ffffffff81f2a2c0 t phy_id_to_atom -ffffffff81f2a300 t disp_power_gating_action_to_atom -ffffffff81f2a370 t dc_clock_type_to_atom -ffffffff81f2a3f0 t transmitter_color_depth_to_atom -ffffffff81f2b000 T dal_cmd_tbl_helper_dce80_get_table +ffffffff81f2a170 t clock_source_id_to_atom_phy_clk_src_id +ffffffff81f2a1c0 t signal_type_to_atom_dig_mode +ffffffff81f2a220 t hpd_sel_to_atom +ffffffff81f2a250 t dig_encoder_sel_to_atom +ffffffff81f2a280 t phy_id_to_atom +ffffffff81f2a2c0 t disp_power_gating_action_to_atom +ffffffff81f2b000 T dal_cmd_tbl_helper_dce112_get_table2 ffffffff81f2b030 t encoder_action_to_atom ffffffff81f2b0a0 t engine_bp_to_atom ffffffff81f2b0e0 t clock_source_id_to_atom @@ -29190,15744 +29175,15760 @@ ffffffff81f2b1b0 t clock_source_id_to_atom_phy_clk_src ffffffff81f2b200 t signal_type_to_atom_dig_mode ffffffff81f2b260 t hpd_sel_to_atom ffffffff81f2b290 t dig_encoder_sel_to_atom -ffffffff81f2b2e0 t phy_id_to_atom -ffffffff81f2b320 t disp_power_gating_action_to_atom -ffffffff81f2c000 T clk_mgr_helper_get_active_display_cnt -ffffffff81f2c0e0 T clk_mgr_helper_get_active_plane_cnt -ffffffff81f2c190 T clk_mgr_exit_optimized_pwr_state -ffffffff81f2c290 T clk_mgr_optimize_pwr_state -ffffffff81f2c3a0 T dc_clk_mgr_create -ffffffff81f2ca80 T dc_destroy_clk_mgr -ffffffff81f2d000 T dentist_get_divider_from_did -ffffffff81f2d070 T dce_adjust_dp_ref_freq_for_ss -ffffffff81f2d170 T dce_get_dp_ref_freq_khz -ffffffff81f2d2a0 T dce12_get_dp_ref_freq_khz -ffffffff81f2d2b0 T dce_get_max_pixel_clock_for_all_paths -ffffffff81f2d4c0 T dce_get_required_clocks_state -ffffffff81f2d560 T dce_set_clock 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-ffffffff81f33000 T rv2_clk_mgr_construct -ffffffff81f34000 T dentist_get_did_from_divider -ffffffff81f34090 T dcn20_update_clocks_update_dpp_dto -ffffffff81f34150 T dcn20_update_clocks_update_dentist -ffffffff81f34670 T dcn2_update_clocks -ffffffff81f34bd0 T dcn2_read_clocks_from_hw_dentist -ffffffff81f34ca0 T dcn2_update_clocks_fpga -ffffffff81f34e10 T dcn2_init_clocks -ffffffff81f34eb0 T dcn2_get_clock -ffffffff81f34f20 T dcn20_clk_mgr_construct -ffffffff81f35060 t dcn2_enable_pme_wa -ffffffff81f350b0 t dcn2_are_clock_states_equal -ffffffff81f35120 t dcn2_notify_link_rate_change -ffffffff81f36000 t dcn201_update_clocks -ffffffff81f36240 t dcn201_init_clocks -ffffffff81f362e0 T dcn201_clk_mgr_construct -ffffffff81f37000 T rn_clk_mgr_construct -ffffffff81f378e0 t rn_update_clocks -ffffffff81f37e80 t rn_set_low_power_state -ffffffff81f38050 t rn_init_clocks -ffffffff81f380f0 t rn_enable_pme_wa -ffffffff81f38100 t rn_are_clock_states_equal -ffffffff81f38150 t rn_notify_wm_ranges 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dcn30_smu_test_message +ffffffff81f3e060 t dcn30_smu_send_msg_with_param +ffffffff81f3e1c0 T dcn30_smu_get_smu_version +ffffffff81f3e1e0 T dcn30_smu_check_driver_if_version +ffffffff81f3e230 T dcn30_smu_check_msg_header_version +ffffffff81f3e280 T dcn30_smu_set_dram_addr_high +ffffffff81f3e2a0 T dcn30_smu_set_dram_addr_low +ffffffff81f3e2c0 T dcn30_smu_transfer_wm_table_smu_2_dram +ffffffff81f3e2e0 T dcn30_smu_transfer_wm_table_dram_2_smu +ffffffff81f3e300 T dcn30_smu_set_hard_min_by_freq +ffffffff81f3e350 T dcn30_smu_set_hard_max_by_freq +ffffffff81f3e3a0 T dcn30_smu_get_dpm_freq_by_index +ffffffff81f3e3f0 T dcn30_smu_get_dc_mode_max_dpm_freq +ffffffff81f3e440 T dcn30_smu_set_min_deep_sleep_dcef_clk +ffffffff81f3e460 T dcn30_smu_set_num_of_displays +ffffffff81f3e480 T dcn30_smu_set_display_refresh_from_mall +ffffffff81f3e4b0 T dcn30_smu_set_external_client_df_cstate_allow +ffffffff81f3e4d0 T dcn30_smu_set_pme_workaround +ffffffff81f3f000 T dcn301_smu_get_smu_version +ffffffff81f3f070 t dcn301_smu_send_msg_with_param +ffffffff81f3f1f0 T dcn301_smu_set_dispclk +ffffffff81f3f290 T dcn301_smu_set_dprefclk +ffffffff81f3f330 T dcn301_smu_set_hard_min_dcfclk +ffffffff81f3f3d0 T dcn301_smu_set_min_deep_sleep_dcfclk +ffffffff81f3f470 T dcn301_smu_set_dppclk +ffffffff81f3f510 T dcn301_smu_set_display_idle_optimization +ffffffff81f3f560 T dcn301_smu_enable_phy_refclk_pwrdwn +ffffffff81f3f5b0 T dcn301_smu_enable_pme_wa +ffffffff81f3f5d0 T dcn301_smu_set_dram_addr_high +ffffffff81f3f620 T dcn301_smu_set_dram_addr_low +ffffffff81f3f670 T dcn301_smu_transfer_dpm_table_smu_2_dram +ffffffff81f3f690 T dcn301_smu_transfer_wm_table_dram_2_smu +ffffffff81f40000 T vg_clk_mgr_construct +ffffffff81f40760 T vg_clk_mgr_destroy +ffffffff81f407b0 t vg_update_clocks +ffffffff81f40b40 t vg_init_clocks +ffffffff81f40be0 t vg_enable_pme_wa +ffffffff81f40bf0 t vg_are_clock_states_equal +ffffffff81f40c40 t vg_notify_wm_ranges +ffffffff81f41000 T dcn31_update_clocks +ffffffff81f41620 T dcn31_init_clocks +ffffffff81f416d0 T dcn31_are_clock_states_equal +ffffffff81f41730 T dcn31_get_dtb_ref_freq_khz +ffffffff81f41760 T dcn31_clk_mgr_construct +ffffffff81f41dd0 T dcn31_clk_mgr_destroy +ffffffff81f41e20 t dcn31_set_low_power_state +ffffffff81f42000 t dcn31_enable_pme_wa +ffffffff81f42010 t dcn31_notify_wm_ranges +ffffffff81f423b0 t find_clk_for_voltage +ffffffff81f43000 T dcn31_smu_get_smu_version +ffffffff81f43010 t dcn31_smu_send_msg_with_param +ffffffff81f43210 T dcn31_smu_set_dispclk +ffffffff81f43280 T dcn31_smu_set_dprefclk +ffffffff81f432f0 T dcn31_smu_set_hard_min_dcfclk +ffffffff81f43370 T dcn31_smu_set_min_deep_sleep_dcfclk +ffffffff81f433f0 T dcn31_smu_set_dppclk +ffffffff81f43460 T dcn31_smu_set_display_idle_optimization +ffffffff81f434b0 T dcn31_smu_enable_phy_refclk_pwrdwn +ffffffff81f434f0 T dcn31_smu_enable_pme_wa +ffffffff81f43530 T dcn31_smu_set_dram_addr_high +ffffffff81f43570 T dcn31_smu_set_dram_addr_low +ffffffff81f435b0 T dcn31_smu_transfer_dpm_table_smu_2_dram +ffffffff81f435f0 T dcn31_smu_transfer_wm_table_dram_2_smu +ffffffff81f43630 T dcn31_smu_set_zstate_support +ffffffff81f43690 T dcn31_smu_set_dtbclk +ffffffff81f44000 T dcn314_update_clocks +ffffffff81f446d0 T dcn314_are_clock_states_equal +ffffffff81f44730 T dcn314_clk_mgr_construct +ffffffff81f45430 T dcn314_clk_mgr_destroy +ffffffff81f45480 t dcn314_enable_pme_wa +ffffffff81f45490 t dcn314_notify_wm_ranges +ffffffff81f46000 T dcn314_smu_get_smu_version +ffffffff81f46010 t dcn314_smu_send_msg_with_param +ffffffff81f46210 T dcn314_smu_set_dispclk +ffffffff81f46280 T dcn314_smu_set_dprefclk +ffffffff81f462f0 T dcn314_smu_set_hard_min_dcfclk +ffffffff81f46370 T dcn314_smu_set_min_deep_sleep_dcfclk +ffffffff81f463f0 T dcn314_smu_set_dppclk +ffffffff81f46460 T dcn314_smu_set_display_idle_optimization +ffffffff81f464b0 T dcn314_smu_enable_phy_refclk_pwrdwn +ffffffff81f464f0 T dcn314_smu_enable_pme_wa +ffffffff81f46530 T dcn314_smu_set_dram_addr_high +ffffffff81f46570 T dcn314_smu_set_dram_addr_low +ffffffff81f465b0 T dcn314_smu_transfer_dpm_table_smu_2_dram +ffffffff81f465f0 T dcn314_smu_transfer_wm_table_dram_2_smu +ffffffff81f46630 T dcn314_smu_set_zstate_support +ffffffff81f46680 T dcn314_smu_set_dtbclk +ffffffff81f47000 T dcn315_clk_mgr_construct +ffffffff81f479c0 T dcn315_clk_mgr_destroy +ffffffff81f47a10 t dcn315_update_clocks +ffffffff81f47ff0 t dcn315_enable_pme_wa +ffffffff81f48000 t dcn315_notify_wm_ranges +ffffffff81f49000 T dcn315_smu_get_smu_version +ffffffff81f49010 t dcn315_smu_send_msg_with_param +ffffffff81f491a0 T dcn315_smu_set_dispclk +ffffffff81f49210 T dcn315_smu_set_hard_min_dcfclk +ffffffff81f49290 T dcn315_smu_set_min_deep_sleep_dcfclk +ffffffff81f49310 T dcn315_smu_set_dppclk +ffffffff81f49380 T dcn315_smu_set_display_idle_optimization +ffffffff81f493d0 T dcn315_smu_enable_phy_refclk_pwrdwn +ffffffff81f49410 T dcn315_smu_enable_pme_wa +ffffffff81f49450 T dcn315_smu_set_dram_addr_high +ffffffff81f49490 T dcn315_smu_set_dram_addr_low +ffffffff81f494d0 T dcn315_smu_transfer_dpm_table_smu_2_dram +ffffffff81f49510 T dcn315_smu_transfer_wm_table_dram_2_smu +ffffffff81f49550 T dcn315_smu_get_dpref_clk +ffffffff81f495a0 T dcn315_smu_get_dtbclk +ffffffff81f495f0 T dcn315_smu_set_dtbclk +ffffffff81f4a000 T dcn316_clk_mgr_construct +ffffffff81f4a6a0 T dcn316_clk_mgr_destroy +ffffffff81f4a6f0 t dcn316_update_clocks +ffffffff81f4ad20 t dcn316_enable_pme_wa +ffffffff81f4ad30 t dcn316_notify_wm_ranges +ffffffff81f4b0c0 t find_clk_for_voltage +ffffffff81f4c000 T dcn316_smu_get_smu_version +ffffffff81f4c010 t dcn316_smu_send_msg_with_param +ffffffff81f4c1a0 T dcn316_smu_set_dispclk +ffffffff81f4c210 T dcn316_smu_set_hard_min_dcfclk +ffffffff81f4c290 T dcn316_smu_set_min_deep_sleep_dcfclk +ffffffff81f4c310 T dcn316_smu_set_dppclk +ffffffff81f4c380 T dcn316_smu_set_display_idle_optimization +ffffffff81f4c3d0 T dcn316_smu_enable_phy_refclk_pwrdwn +ffffffff81f4c410 T dcn316_smu_set_dram_addr_high +ffffffff81f4c450 T dcn316_smu_set_dram_addr_low +ffffffff81f4c490 T dcn316_smu_transfer_dpm_table_smu_2_dram +ffffffff81f4c4d0 T dcn316_smu_transfer_wm_table_dram_2_smu +ffffffff81f4c510 T dcn316_smu_enable_pme_wa +ffffffff81f4c550 T dcn316_smu_set_dtbclk +ffffffff81f4c590 T dcn316_smu_get_dpref_clk +ffffffff81f4c5e0 T dcn316_smu_get_smu_fclk +ffffffff81f4d000 T dcn32_init_clocks +ffffffff81f4d4d0 T dcn32_clk_mgr_construct +ffffffff81f4d760 T dcn32_clk_mgr_destroy +ffffffff81f4d7c0 t dcn32_update_clocks +ffffffff81f4df00 t dcn32_dump_clk_registers +ffffffff81f4e120 t dcn32_enable_pme_wa +ffffffff81f4e160 t dcn32_are_clock_states_equal +ffffffff81f4e1c0 t dcn32_notify_wm_ranges +ffffffff81f4e340 t dcn32_set_hard_min_memclk +ffffffff81f4e3e0 t dcn32_set_hard_max_memclk +ffffffff81f4e430 t dcn32_get_memclk_states_from_smu +ffffffff81f4e620 t dcn32_is_smu_present +ffffffff81f4f000 T dcn32_smu_send_fclk_pstate_message +ffffffff81f4f020 t dcn32_smu_send_msg_with_param +ffffffff81f4f160 T dcn32_smu_send_cab_for_uclk_message +ffffffff81f4f180 T dcn32_smu_transfer_wm_table_dram_2_smu +ffffffff81f4f1a0 T dcn32_smu_set_pme_workaround +ffffffff81f4f1c0 T dcn32_smu_set_hard_min_by_freq +ffffffff81f50000 T dc_stream_adjust_vmin_vmax +ffffffff81f50180 T dc_stream_get_last_used_drr_vtotal +ffffffff81f502e0 T dc_stream_get_crtc_position +ffffffff81f50510 T dc_stream_configure_crc +ffffffff81f50750 T dc_stream_get_crc +ffffffff81f50830 T dc_stream_set_dyn_expansion +ffffffff81f50a90 T dc_stream_set_dither_option +ffffffff81f50c00 T dc_stream_set_gamut_remap +ffffffff81f50d80 T dc_stream_program_csc_matrix +ffffffff81f50fa0 T dc_stream_set_static_screen_params +ffffffff81f51130 T dc_create +ffffffff81f51ad0 t dc_construct_ctx +ffffffff81f51c30 t dc_destruct +ffffffff81f51f00 T dc_hardware_init +ffffffff81f52010 T dc_init_callbacks +ffffffff81f52040 T dc_deinit_callbacks +ffffffff81f52070 T dc_destroy +ffffffff81f520c0 T dc_validate_boot_timing +ffffffff81f52440 T dc_enable_stereo +ffffffff81f52540 T dc_trigger_sync +ffffffff81f52b50 T dc_z10_restore +ffffffff81f52b90 T dc_z10_save_init +ffffffff81f52bd0 T dc_commit_state +ffffffff81f52d00 t dc_commit_state_no_check +ffffffff81f54180 T dc_acquire_release_mpc_3dlut +ffffffff81f54260 T dc_post_update_surfaces_to_stream +ffffffff81f54670 T dc_create_state +ffffffff81f54700 T dc_copy_state +ffffffff81f548f0 T dc_retain_state +ffffffff81f54920 T dc_release_state +ffffffff81f54990 T dc_set_generic_gpio_for_stereo +ffffffff81f54aa0 T dc_check_update_surfaces_for_stream +ffffffff81f55710 T dc_dmub_update_dirty_rect +ffffffff81f559a0 T dc_update_planes_and_stream +ffffffff81f560f0 t commit_minimal_transition_state +ffffffff81f56480 t commit_planes_for_stream +ffffffff81f57b30 T dc_commit_updates_for_stream +ffffffff81f57f20 t copy_surface_update_to_plane +ffffffff81f58320 t copy_stream_update_to_stream +ffffffff81f58950 T dc_get_current_stream_count +ffffffff81f58980 T dc_get_stream_at_index +ffffffff81f589c0 T dc_interrupt_to_irq_source +ffffffff81f589e0 T dc_interrupt_set +ffffffff81f58a30 T dc_interrupt_ack +ffffffff81f58a50 T dc_power_down_on_boot +ffffffff81f58aa0 T dc_set_power_state +ffffffff81f58c90 T dc_resume +ffffffff81f58d00 T dc_is_dmcu_initialized +ffffffff81f58d50 T dc_is_oem_i2c_device_present +ffffffff81f58d90 T dc_submit_i2c +ffffffff81f58dc0 T dc_submit_i2c_oem +ffffffff81f58e10 T dc_link_add_remote_sink +ffffffff81f58fa0 T dc_link_remove_remote_sink +ffffffff81f59090 T get_clock_requirements_for_state +ffffffff81f59110 T dc_set_clock +ffffffff81f59150 T dc_get_clock +ffffffff81f59190 T dc_set_psr_allow_active +ffffffff81f59290 T dc_allow_idle_optimizations +ffffffff81f59330 T dc_unlock_memory_clock_frequency +ffffffff81f593a0 T dc_lock_memory_clock_frequency +ffffffff81f59430 T dc_enable_dcmode_clk_limit +ffffffff81f59530 t blank_and_force_memclk +ffffffff81f59710 T dc_is_plane_eligible_for_idle_optimizations +ffffffff81f59760 T dc_hardware_release +ffffffff81f597b0 T dc_mclk_switch_using_fw_based_vblank_stretch_shut_down +ffffffff81f597f0 T dc_is_dmub_outbox_supported +ffffffff81f59850 T dc_enable_dmub_notifications +ffffffff81f598b0 T dc_enable_dmub_outbox +ffffffff81f598f0 T dc_process_dmub_aux_transfer_async +ffffffff81f59a90 T get_link_index_from_dpia_port_index +ffffffff81f59b40 T dc_process_dmub_set_config_async +ffffffff81f59c20 T dc_process_dmub_set_mst_slots +ffffffff81f59d10 T dc_process_dmub_dpia_hpd_int_enable +ffffffff81f59de0 T dc_disable_accelerated_mode +ffffffff81f59e00 T dc_notify_vsync_int_state +ffffffff81f5a030 T dc_extended_blank_supported +ffffffff81f5b000 T pre_surface_trace +ffffffff81f5b030 T update_surface_trace +ffffffff81f5b060 T post_surface_trace +ffffffff81f5b090 T context_timing_trace +ffffffff81f5b240 T context_clock_trace +ffffffff81f5b270 T dc_status_to_str +ffffffff81f5c000 T find_color_matrix +ffffffff81f5c0a0 T color_space_to_black_color +ffffffff81f5c130 T hwss_wait_for_blank_complete +ffffffff81f5c1d0 T get_mpctree_visual_confirm_color +ffffffff81f5c230 T get_surface_visual_confirm_color +ffffffff81f5c2e0 T get_hdr_visual_confirm_color +ffffffff81f5c390 T get_subvp_visual_confirm_color +ffffffff81f5c480 T get_surface_tile_visual_confirm_color +ffffffff81f5d000 T get_hpd_gpio +ffffffff81f5d0e0 T dc_link_wait_for_t12 +ffffffff81f5d140 T dc_link_detect_sink +ffffffff81f5d300 T dc_link_is_dp_sink_present +ffffffff81f5d580 T reset_cur_dp_mst_topology +ffffffff81f5d5e0 T dc_link_detect +ffffffff81f5e900 T dc_link_get_hpd_state +ffffffff81f5e970 T link_create +ffffffff81f5fa90 T link_destroy +ffffffff81f5fbf0 T dc_link_blank_all_dp_displays +ffffffff81f5fcc0 T dc_link_blank_dp_stream +ffffffff81f5fdd0 T dc_link_blank_all_edp_displays +ffffffff81f5fe90 T dc_power_alpm_dpcd_enable +ffffffff81f5fef0 T dc_link_validate_mode_timing +ffffffff81f60410 T dc_link_get_backlight_level +ffffffff81f60580 T dc_link_get_target_backlight_pwm +ffffffff81f60690 T dc_link_set_backlight_level +ffffffff81f607f0 T dc_link_set_psr_allow_active +ffffffff81f60a60 T dc_link_get_psr_state +ffffffff81f60b90 T dc_link_setup_psr +ffffffff81f60ff0 T dc_link_get_psr_residency +ffffffff81f610e0 T dc_link_set_sink_vtotal_in_psr_active +ffffffff81f61160 T dc_link_get_status +ffffffff81f61190 T core_link_resume +ffffffff81f611d0 t program_hpd_filter +ffffffff81f61360 T dc_link_allocate_mst_payload +ffffffff81f61830 t update_mst_stream_alloc_table +ffffffff81f61ab0 t dc_log_vcp_x_y +ffffffff81f61c40 T dc_link_reduce_mst_payload +ffffffff81f620c0 T dc_link_increase_mst_payload +ffffffff81f62530 T core_link_enable_stream +ffffffff81f63210 t disable_link +ffffffff81f63330 t dc_link_update_sst_payload +ffffffff81f63570 T core_link_set_avmute +ffffffff81f635c0 T core_link_disable_stream +ffffffff81f63c30 t get_ext_hdmi_settings +ffffffff81f63e70 t write_i2c_retimer_setting +ffffffff81f64520 t write_i2c_default_retimer_setting +ffffffff81f64bc0 t write_i2c_redriver_setting +ffffffff81f64d00 T dc_link_enable_hpd_filter +ffffffff81f64e60 T dc_link_set_drive_settings +ffffffff81f64f30 T dc_link_get_cur_link_res +ffffffff81f65080 T dc_link_set_preferred_link_settings +ffffffff81f651d0 T dc_link_set_preferred_training_settings +ffffffff81f65310 T dc_link_enable_hpd +ffffffff81f65320 T dc_link_disable_hpd +ffffffff81f65330 T dc_link_set_test_pattern +ffffffff81f65370 T dc_link_bandwidth_kbps +ffffffff81f65410 T dc_link_should_enable_fec +ffffffff81f65530 T dc_link_get_link_cap +ffffffff81f65580 T dc_link_overwrite_extended_receiver_cap +ffffffff81f65590 T dc_link_is_fec_supported +ffffffff81f65650 T dc_bandwidth_in_kbps_from_timing +ffffffff81f657a0 T dc_get_cur_link_res_map +ffffffff81f65880 T dc_restore_link_res_map +ffffffff81f659a0 t read_current_link_settings_on_detect +ffffffff81f65bb0 t enable_link_dp +ffffffff81f66000 T dal_ddc_i2c_payloads_add +ffffffff81f660c0 T dal_ddc_service_create +ffffffff81f66230 T dal_ddc_service_destroy +ffffffff81f662c0 T dal_ddc_service_get_type +ffffffff81f662f0 T dal_ddc_service_set_transaction_type +ffffffff81f66320 T dal_ddc_service_is_in_aux_transaction_mode +ffffffff81f66350 T ddc_service_set_dongle_type +ffffffff81f66380 T get_defer_delay +ffffffff81f664a0 T dal_ddc_service_i2c_query_dp_dual_mode_adaptor +ffffffff81f668b0 T dal_ddc_service_query_ddc_data +ffffffff81f66c70 T dal_ddc_submit_aux_command +ffffffff81f66d60 T dc_link_aux_transfer_with_retries +ffffffff81f66d70 T dc_link_aux_transfer_raw +ffffffff81f66da0 T dc_link_aux_try_to_configure_timeout +ffffffff81f66e70 T dal_ddc_service_set_ddc_pin +ffffffff81f66ea0 T dal_ddc_service_get_ddc_pin +ffffffff81f66ed0 T dal_ddc_service_write_scdc_data +ffffffff81f66fc0 T dal_ddc_service_read_scdc_data +ffffffff81f68000 T dp_wait_for_training_aux_rd_interval +ffffffff81f68080 T dc_dp_training_pattern_to_dpcd_training_pattern +ffffffff81f68100 T dpcd_set_link_settings +ffffffff81f68280 T dc_dp_initialize_scrambling_data_symbols +ffffffff81f68310 T dp_is_cr_done +ffffffff81f68370 T dp_is_ch_eq_done +ffffffff81f68430 T dp_is_symbol_locked +ffffffff81f684f0 T dp_is_interlane_aligned +ffffffff81f68520 T dp_hw_to_dpcd_lane_settings +ffffffff81f685e0 T dp_get_link_encoding_format +ffffffff81f68630 T dp_decide_lane_settings +ffffffff81f68a70 T dp_get_lane_status_and_lane_adjust +ffffffff81f68ba0 T dpcd_set_lane_settings +ffffffff81f68be0 T dp_is_max_vs_reached +ffffffff81f68c70 T dp_translate_training_aux_read_interval +ffffffff81f68cb0 T dp_get_cr_failure +ffffffff81f68d20 T dp_check_link_loss_status +ffffffff81f68dc0 T dp_decide_training_settings +ffffffff81f69120 t decide_8b_10b_training_settings +ffffffff81f69430 T dp_convert_to_count +ffffffff81f694c0 T dc_link_dp_set_drive_settings +ffffffff81f69670 T dp_set_hw_lane_settings +ffffffff81f69820 T dc_link_dp_perform_link_training_skip_aux +ffffffff81f69c60 t override_training_settings +ffffffff81f69f10 T dp_set_hw_training_pattern +ffffffff81f69f60 T dp_set_hw_test_pattern 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dce110_timing_generator_program_timing_generator +ffffffff81fc43d0 T dce110_timing_generator_set_drr +ffffffff81fc4510 T dce110_timing_generator_set_static_screen_control +ffffffff81fc45a0 T dce110_timing_generator_get_vblank_counter +ffffffff81fc45f0 T dce110_timing_generator_get_position +ffffffff81fc4690 T dce110_timing_generator_get_crtc_scanoutpos +ffffffff81fc4770 T dce110_timing_generator_program_blanking +ffffffff81fc49e0 T dce110_timing_generator_set_test_pattern +ffffffff81fc4cd0 T dce110_timing_generator_validate_timing +ffffffff81fc4da0 T dce110_timing_generator_wait_for_vblank +ffffffff81fc4f10 T dce110_timing_generator_is_counter_moving +ffffffff81fc4f80 T dce110_timing_generator_wait_for_vactive +ffffffff81fc5060 T dce110_timing_generator_setup_global_swap_lock +ffffffff81fc51c0 T dce110_timing_generator_tear_down_global_swap_lock +ffffffff81fc5240 T dce110_timing_generator_enable_advanced_request +ffffffff81fc52e0 T dce110_timing_generator_set_lock_master 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dce112_compressor_program_compressed_surface_address_and_pitch +ffffffff81fc9b10 T dce112_compressor_program_lpt_control +ffffffff81fc9d80 T dce112_compressor_set_fbc_invalidation_triggers +ffffffff81fc9e00 T dce112_compressor_construct +ffffffff81fc9ec0 T dce112_compressor_create +ffffffff81fc9fb0 T dce112_compressor_destroy +ffffffff81fca000 T dce112_hw_sequencer_construct +ffffffff81fca050 t dce112_enable_display_power_gating +ffffffff81fcb000 T dce112_validate_bandwidth +ffffffff81fcb0c0 T resource_map_phy_clock_resources +ffffffff81fcb210 T dce112_add_stream_to_ctx +ffffffff81fcb2a0 T dce112_create_resource_pool +ffffffff81fcc640 t dce112_resource_destruct +ffffffff81fcc910 t dce112_destroy_resource_pool +ffffffff81fcc970 t dce112_panel_cntl_create +ffffffff81fcca00 t dce112_link_encoder_create +ffffffff81fccb10 t dce112_validate_global +ffffffff81fccb90 t read_dce_straps +ffffffff81fccbf0 t create_audio +ffffffff81fccc20 t dce112_stream_encoder_create +ffffffff81fcccc0 t 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dcn20_validate_apply_pipe_split_flags +ffffffff8202b7a0 T dcn20_fast_validate_bw +ffffffff8202bcb0 T dcn20_validate_bandwidth +ffffffff8202bd30 T dcn20_acquire_idle_pipe_for_layer +ffffffff8202be40 T dcn20_get_dcc_compression_cap +ffffffff8202be70 T dcn20_patch_unknown_plane_state +ffffffff8202bec0 T dcn20_dwbc_create +ffffffff8202bfe0 T dcn20_mmhubbub_create +ffffffff8202c140 T dcn20_create_resource_pool +ffffffff8202d980 t dcn20_resource_destruct +ffffffff8202de20 t dcn20_destroy_resource_pool +ffffffff8202de80 t dcn20_panel_cntl_create +ffffffff8202df10 t read_dce_straps +ffffffff8202df30 t dcn20_create_audio +ffffffff8202e000 T enc2_set_dynamic_metadata +ffffffff8202e270 T enc2_stream_encoder_dp_unblank +ffffffff8202e5a0 T enc2_stream_encoder_dp_set_stream_attribute +ffffffff8202e600 T enc2_get_fifo_cal_average_level +ffffffff8202e660 T dcn20_stream_encoder_construct +ffffffff8202e6b0 t enc2_stream_encoder_update_hdmi_info_packets +ffffffff8202e780 t enc2_stream_encoder_stop_hdmi_info_packets +ffffffff8202ea80 t enc2_stream_encoder_update_dp_info_packets +ffffffff8202eb30 t enc2_read_state +ffffffff8202ecb0 t enc2_dp_set_dsc_config +ffffffff8202ed80 t enc2_dp_set_dsc_pps_info_packet +ffffffff8202f250 t enc2_dp_set_odm_combine +ffffffff8202f290 t enc2_update_hdmi_info_packet +ffffffff82030000 T dcn20_vmid_setup +ffffffff82031000 T dccg201_create +ffffffff820310b0 t dccg201_update_dpp_dto +ffffffff82032000 T dpp201_construct +ffffffff82032070 t dpp201_get_optimal_number_of_taps +ffffffff82032450 t dpp201_cnv_setup +ffffffff82033000 T hubbub201_construct +ffffffff82033050 t hubbub201_program_watermarks +ffffffff82034000 T dcn201_hubp_construct +ffffffff82034070 t hubp201_setup +ffffffff82034350 t hubp201_program_surface_config +ffffffff82035000 T dcn201_update_plane_addr +ffffffff820352a0 T dcn201_init_blank +ffffffff820353e0 T dcn201_init_hw +ffffffff82035ca0 T dcn201_plane_atomic_disconnect +ffffffff82035e10 T dcn201_update_mpcc +ffffffff820360b0 T dcn201_pipe_control_lock +ffffffff820361b0 T dcn201_set_cursor_attribute +ffffffff82036240 T dcn201_set_dmdata_attributes +ffffffff82036350 T dcn201_unblank_stream +ffffffff82037000 T dcn201_hw_sequencer_construct +ffffffff82038000 T dcn201_link_encoder_construct +ffffffff820381a0 t dcn201_link_encoder_is_in_alt_mode +ffffffff82038210 t dcn201_link_encoder_get_max_link_cap +ffffffff82039000 t mpc201_set_out_rate_control +ffffffff82039120 T dcn201_mpc_construct +ffffffff8203a000 T dcn201_opp_construct +ffffffff8203b000 T optc201_is_two_pixels_per_containter +ffffffff8203b010 T dcn201_timing_generator_init +ffffffff8203b080 t optc201_validate_timing +ffffffff8203b170 t optc201_triplebuffer_unlock +ffffffff8203b210 t optc201_triplebuffer_lock +ffffffff8203b330 t optc201_get_optc_source +ffffffff8203c000 T dcn201_create_resource_pool +ffffffff8203ca30 t dcn201_resource_destruct +ffffffff8203cd20 t dcn201_destroy_resource_pool +ffffffff8203cd80 t dcn201_link_init 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dcn21_link_encoder_enable_dp_mst_output +ffffffff82046570 t dcn21_link_encoder_disable_output +ffffffff82047000 T dcn21_fast_validate_bw +ffffffff82047650 T dcn21_create_resource_pool +ffffffff820489b0 t dcn21_resource_destruct +ffffffff82048e50 t dcn21_destroy_resource_pool +ffffffff82048eb0 t dcn21_panel_cntl_create +ffffffff82048f40 t dcn21_link_encoder_create +ffffffff82049040 t dcn21_validate_bandwidth +ffffffff820490d0 t dcn21_patch_unknown_plane_state +ffffffff82049120 t dcn21_get_panel_config_defaults +ffffffff82049190 t read_dce_straps +ffffffff820491b0 t dcn21_create_audio +ffffffff820491e0 t dcn21_stream_encoder_create +ffffffff82049280 t dcn21_hwseq_create +ffffffff8204a000 T afmt3_setup_hdmi_audio +ffffffff8204a1c0 T afmt3_se_audio_setup +ffffffff8204a380 T afmt3_audio_mute_control +ffffffff8204a3f0 T afmt3_audio_info_immediate_update +ffffffff8204a430 T afmt3_setup_dp_audio +ffffffff8204a520 T afmt3_construct +ffffffff8204b000 T cm_helper_program_gamcor_xfer_func +ffffffff8204b3a0 T cm3_helper_translate_curve_to_hw_format +ffffffff8204bfa0 T cm3_helper_convert_to_custom_float +ffffffff8204c3f0 T cm3_helper_translate_curve_to_degamma_hw_format +ffffffff8204cc50 T is_rgb_equal +ffffffff8204d000 T dccg3_create +ffffffff8204d0b0 T dccg30_create +ffffffff8204e000 T dcn30_link_encoder_validate_output_with_stream +ffffffff8204e010 T dcn30_link_encoder_construct +ffffffff8204e230 T enc3_hw_init +ffffffff8204f000 T enc3_stream_encoder_update_hdmi_info_packets +ffffffff8204f100 t enc3_update_hdmi_info_packet +ffffffff8204f4f0 T enc3_stream_encoder_stop_hdmi_info_packets +ffffffff8204fab0 T enc3_dp_set_dsc_pps_info_packet +ffffffff8204fdd0 T enc3_stream_encoder_update_dp_info_packets +ffffffff82050000 T enc3_audio_mute_control +ffffffff82050070 T enc3_se_dp_audio_setup +ffffffff820500f0 T enc3_se_dp_audio_enable +ffffffff820501e0 T enc3_se_hdmi_audio_setup +ffffffff820504f0 T dcn30_dio_stream_encoder_construct +ffffffff82050560 t enc3_stream_encoder_hdmi_set_stream_attribute +ffffffff82050b40 t enc3_stream_encoder_dvi_set_stream_attribute +ffffffff82050d40 t enc3_read_state +ffffffff82050ec0 t enc3_dp_set_dsc_config +ffffffff82050f90 t enc3_dp_set_odm_combine +ffffffff82051000 T dpp30_read_state +ffffffff82051040 T dpp3_program_post_csc +ffffffff82051220 T dpp3_set_pre_degam +ffffffff820512d0 T dpp3_cnv_setup +ffffffff82051b90 T dpp3_set_cursor_attributes +ffffffff82051d00 T dpp3_get_optimal_number_of_taps +ffffffff82052770 T dpp3_construct +ffffffff820527d0 t dpp3_deferred_update +ffffffff82052ba0 t dpp3_program_blnd_lut +ffffffff82053610 t dpp3_program_shaper +ffffffff82055660 t dpp3_program_3dlut +ffffffff82055e30 t dpp3_set3dlut_ram12 +ffffffff82056000 T dpp3_program_cm_dealpha +ffffffff820560a0 T dpp3_program_cm_bias +ffffffff82056180 T dpp3_program_gamcor_lut +ffffffff82056bb0 t dpp3_power_on_gamcor_lut +ffffffff82056ce0 T dpp3_set_hdr_multiplier +ffffffff82056d30 T dpp3_cm_set_gamut_remap +ffffffff82057000 T dwb3_config_fc +ffffffff820571b0 T dwb3_set_stereo +ffffffff82057270 T dwb3_enable +ffffffff82057390 T dwb3_set_denorm +ffffffff820574b0 T dwb3_disable +ffffffff82057560 T dwb3_update +ffffffff82057690 T dwb3_is_enabled +ffffffff82057730 T dwb3_set_new_content +ffffffff82057770 t dwb3_get_caps +ffffffff82057810 T dcn30_dwbc_construct +ffffffff82057860 T dwb3_set_host_read_rate_control +ffffffff82058000 T dwb3_ogam_set_input_transfer_func +ffffffff820589d0 T dwb3_set_gamut_remap +ffffffff82058b30 t dwb3_program_gamut_remap +ffffffff82058cc0 T dwb3_program_hdr_mult +ffffffff82059000 T hubbub3_init_dchub_sys_ctx +ffffffff820591d0 T hubbub3_program_watermarks +ffffffff820592d0 T hubbub3_dcc_support_swizzle +ffffffff82059390 T hubbub3_get_dcc_compression_cap +ffffffff82059570 T hubbub3_force_wm_propagate_to_pipes +ffffffff82059620 T hubbub3_force_pstate_change_control +ffffffff820596a0 T hubbub3_init_watermarks +ffffffff820599e0 T hubbub3_construct +ffffffff8205a000 T hubp3_set_vm_system_aperture_settings +ffffffff8205a130 T hubp3_program_surface_flip_and_addr +ffffffff8205ab60 T hubp3_dcc_control +ffffffff8205ac20 T hubp3_dcc_control_sienna_cichlid +ffffffff8205ad30 T hubp3_dmdata_set_attributes +ffffffff8205af30 T hubp3_program_surface_config +ffffffff8205b230 T hubp3_read_state +ffffffff8205b4a0 T hubp3_setup +ffffffff8205b530 T hubp3_init +ffffffff8205b560 T hubp3_construct +ffffffff8205c000 T dcn30_set_blend_lut +ffffffff8205c060 T dcn30_set_input_transfer_func +ffffffff8205c1c0 T dcn30_set_output_transfer_func +ffffffff8205c4e0 T dcn30_update_writeback +ffffffff8205c570 t dcn30_set_writeback +ffffffff8205c720 T dcn30_mmhubbub_warmup +ffffffff8205c9d0 T dcn30_enable_writeback +ffffffff8205caa0 T dcn30_disable_writeback +ffffffff8205cb80 T dcn30_program_all_writeback_pipes_in_tree +ffffffff8205ce60 T dcn30_init_hw +ffffffff8205d750 T dcn30_set_avmute +ffffffff8205d7b0 T dcn30_update_info_frame +ffffffff8205d880 T dcn30_program_dmdata_engine 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mpc3_set_gamut_remap +ffffffff820649d0 T mpc3_program_3dlut +ffffffff82065150 t mpc3_set3dlut_ram12 +ffffffff82065330 T mpc3_set_output_csc +ffffffff820654a0 T mpc3_set_ocsc_default +ffffffff82065610 T mpc3_set_rmu_mux +ffffffff820656b0 T mpc3_get_rmu_mux_status +ffffffff82065750 T mpcc3_acquire_rmu +ffffffff820658b0 t mpcc3_release_rmu +ffffffff82065a20 t mpc3_set_mpc_mem_lp_mode +ffffffff82065bb0 T dcn30_mpc_construct +ffffffff82066000 T optc3_triplebuffer_lock +ffffffff82066120 T optc3_lock_doublebuffer_enable +ffffffff820663b0 T optc3_lock_doublebuffer_disable +ffffffff820664c0 T optc3_lock +ffffffff82066590 T optc3_set_out_mux +ffffffff820665d0 T optc3_program_blank_color +ffffffff82066700 T optc3_set_drr_trigger_window +ffffffff82066790 T optc3_set_vtotal_change_limit +ffffffff82066800 T optc3_set_dsc_config +ffffffff82066850 T optc3_set_odm_bypass +ffffffff820669c0 T optc3_set_vtotal_min_max +ffffffff820669d0 T optc3_tg_init +ffffffff82066a20 T dcn30_timing_generator_init +ffffffff82066a90 t optc3_set_odm_combine +ffffffff82067000 T dcn30_add_stream_to_ctx +ffffffff82067010 T dcn30_populate_dml_pipes_from_context +ffffffff82067100 T dcn30_populate_dml_writeback_from_context +ffffffff82067160 T dcn30_calc_max_scaled_time +ffffffff820671b0 T dcn30_set_mcif_arb_params +ffffffff82067320 T dcn30_acquire_post_bldn_3dlut +ffffffff82067490 T dcn30_release_post_bldn_3dlut +ffffffff82067530 T dcn30_internal_validate_bw +ffffffff82068300 t dcn30_split_stream_for_mpc_or_odm +ffffffff82068620 T dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff82068740 T dcn30_setup_mclk_switch_using_fw_based_vblank_stretch +ffffffff820687e0 T dcn30_update_soc_for_wm_a +ffffffff82068830 T dcn30_calculate_wm_and_dlg +ffffffff820688a0 T dcn30_validate_bandwidth +ffffffff82068cd0 T dcn30_update_bw_bounding_box +ffffffff820694b0 T dcn30_create_resource_pool +ffffffff8206aa70 t dcn30_resource_destruct +ffffffff8206afe0 t dcn30_destroy_resource_pool +ffffffff8206b040 t dcn30_panel_cntl_create +ffffffff8206b0d0 t dcn30_link_encoder_create +ffffffff8206b180 t read_dce_straps +ffffffff8206b1a0 t dcn30_create_audio +ffffffff8206b1d0 t dcn30_stream_encoder_create +ffffffff8206b350 t dcn30_hwseq_create +ffffffff8206c000 T vpg3_update_generic_info_packet +ffffffff8206c9a0 T vpg3_construct +ffffffff8206d000 T dccg301_create +ffffffff8206e000 T dcn301_link_encoder_construct +ffffffff8206f000 T hubbub301_construct +ffffffff82070000 T dcn301_hw_sequencer_construct +ffffffff82071000 T dcn301_panel_cntl_construct +ffffffff82071050 t dcn301_panel_cntl_destroy +ffffffff820710a0 t dcn301_panel_cntl_hw_init +ffffffff820712a0 t dcn301_is_panel_backlight_on +ffffffff82071300 t dcn301_is_panel_powered_on +ffffffff820713b0 t dcn301_store_backlight_level +ffffffff82071450 t dcn301_get_16_bit_backlight_from_pwm +ffffffff82072000 T dcn301_create_resource_pool +ffffffff82073590 t dcn301_destruct +ffffffff82073ad0 t dcn301_destroy_resource_pool +ffffffff82073b30 t dcn301_panel_cntl_create +ffffffff82073bc0 t dcn301_link_encoder_create +ffffffff82073c70 t dcn301_calculate_wm_and_dlg +ffffffff82073ce0 t read_dce_straps +ffffffff82073d00 t dcn301_create_audio +ffffffff82073d30 t dcn301_stream_encoder_create +ffffffff82073eb0 t dcn301_hwseq_create +ffffffff82074000 T dcn302_dpp_pg_control +ffffffff820742a0 T dcn302_hubp_pg_control +ffffffff82074550 T dcn302_dsc_pg_control +ffffffff82075000 T dcn302_hw_sequencer_construct +ffffffff82076000 T dcn302_update_bw_bounding_box +ffffffff82076050 T dcn302_create_resource_pool +ffffffff820773e0 t dcn302_resource_destruct +ffffffff820778f0 t dcn302_destroy_resource_pool +ffffffff82077940 t dcn302_panel_cntl_create +ffffffff820779d0 t dcn302_link_encoder_create +ffffffff82077a80 t read_dce_straps +ffffffff82077aa0 t dcn302_create_audio +ffffffff82077ad0 t dcn302_stream_encoder_create +ffffffff82077c50 t dcn302_hwseq_create +ffffffff82078000 T dcn303_dpp_pg_control +ffffffff82078030 T dcn303_hubp_pg_control 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dccg31_disable_dpstreamclk +ffffffff8207e480 T dccg31_enable_symclk32_se +ffffffff8207e770 T dccg31_disable_symclk32_se +ffffffff8207ea40 T dccg31_enable_symclk32_le +ffffffff8207ec10 T dccg31_disable_symclk32_le +ffffffff8207edb0 T dccg31_disable_dscclk +ffffffff8207ef70 T dccg31_enable_dscclk +ffffffff8207f140 T dccg31_set_physymclk +ffffffff8207f650 T dccg31_set_dtbclk_dto +ffffffff8207f900 T dccg31_set_audio_dtbclk_dto +ffffffff8207fa00 T dccg31_get_dccg_ref_freq +ffffffff8207fa30 T dccg31_set_dispclk_change_mode +ffffffff8207fa80 T dccg31_init +ffffffff8207ffe0 T dccg31_otg_add_pixel +ffffffff82080020 T dccg31_otg_drop_pixel +ffffffff82080060 T dccg31_create +ffffffff82081000 T dcn31_link_encoder_set_dio_phy_mux +ffffffff82081380 T dcn31_link_encoder_construct +ffffffff82081580 T dcn31_link_encoder_construct_minimal +ffffffff82081600 T dcn31_link_encoder_enable_dp_output +ffffffff82081840 T dcn31_link_encoder_enable_dp_mst_output +ffffffff82081a80 T dcn31_link_encoder_disable_output +ffffffff82081d10 T dcn31_link_encoder_is_in_alt_mode +ffffffff82081e50 T dcn31_link_encoder_get_max_link_cap +ffffffff82081fc0 t enc31_hw_init +ffffffff82083000 T dcn31_hpo_dp_link_enc_enable +ffffffff82083150 T dcn31_hpo_dp_link_enc_disable +ffffffff820831c0 T dcn31_hpo_dp_link_enc_set_link_test_pattern +ffffffff82083af0 T dcn31_hpo_dp_link_enc_update_stream_allocation_table +ffffffff82083d80 T dcn31_hpo_dp_link_enc_set_throttled_vcp_size +ffffffff82084020 T dcn31_hpo_dp_link_enc_read_state +ffffffff820842d0 T dcn31_hpo_dp_link_enc_enable_dp_output +ffffffff820843d0 T dcn31_hpo_dp_link_enc_disable_output +ffffffff82084500 T dcn31_hpo_dp_link_enc_set_ffe +ffffffff820845f0 T hpo_dp_link_encoder31_construct +ffffffff82084640 t dcn31_hpo_dp_link_enc_is_in_alt_mode +ffffffff82085000 T dcn31_hpo_dp_stream_encoder_construct +ffffffff82085070 t dcn31_hpo_dp_stream_enc_enable_stream +ffffffff820851b0 t dcn31_hpo_dp_stream_enc_dp_unblank +ffffffff82085460 t dcn31_hpo_dp_stream_enc_dp_blank +ffffffff82085560 t dcn31_hpo_dp_stream_enc_disable +ffffffff820855d0 t dcn31_hpo_dp_stream_enc_set_stream_attribute +ffffffff82085e80 t dcn31_hpo_dp_stream_enc_update_dp_info_packets +ffffffff82086030 t dcn31_hpo_dp_stream_enc_stop_dp_info_packets +ffffffff820861c0 t dcn31_hpo_dp_stream_enc_set_dsc_pps_info_packet +ffffffff82086460 t dcn31_hpo_dp_stream_enc_map_stream_to_link +ffffffff82086560 t dcn31_hpo_dp_stream_enc_mute_control +ffffffff820865d0 t dcn31_hpo_dp_stream_enc_audio_setup +ffffffff82086680 t dcn31_hpo_dp_stream_enc_audio_enable +ffffffff82086750 t dcn31_hpo_dp_stream_enc_audio_disable +ffffffff82086900 t dcn31_hpo_dp_stream_enc_read_state +ffffffff82086a90 t dcn31_set_hblank_min_symbol_width +ffffffff82087000 T hubbub31_init_dchub_sys_ctx +ffffffff820871f0 T hubbub31_construct +ffffffff82087280 t hubbub31_get_dcc_compression_cap +ffffffff82087460 t hubbub31_get_dchub_ref_freq +ffffffff82087530 t hubbub31_program_watermarks +ffffffff82088de0 t hubbub31_verify_allow_pstate_change_high +ffffffff82088fa0 t dcn31_program_det_size +ffffffff82089150 t dcn31_program_compbuf_size +ffffffff820893d0 t dcn31_init_crb +ffffffff8208a000 T hubp31_set_unbounded_requesting +ffffffff8208a090 T hubp31_soft_reset +ffffffff8208a0e0 T hubp31_construct +ffffffff8208a150 t hubp31_program_extended_blank +ffffffff8208b000 T dcn31_init_hw +ffffffff8208b960 T dcn31_dsc_pg_control +ffffffff8208bca0 T dcn31_enable_power_gating_plane +ffffffff8208bf00 T dcn31_update_info_frame +ffffffff8208bfd0 T dcn31_z10_save_init +ffffffff8208c090 T dcn31_z10_restore +ffffffff8208c170 T dcn31_hubp_pg_control +ffffffff8208c480 T dcn31_init_sys_ctx +ffffffff8208c530 T dcn31_reset_hw_ctx_wrap +ffffffff8208c8a0 T dcn31_setup_hpo_hw_control +ffffffff8208d000 T dcn31_hw_sequencer_construct +ffffffff8208e000 T optc31_immediate_disable_crtc +ffffffff8208e0f0 T optc31_set_drr +ffffffff8208e300 T optc3_init_odm +ffffffff8208e470 T dcn31_timing_generator_init +ffffffff8208e4e0 t optc31_enable_crtc +ffffffff8208e5e0 t optc31_disable_crtc +ffffffff8208e6c0 t optc31_set_odm_combine +ffffffff8208f000 T dcn31_panel_cntl_construct +ffffffff8208f040 t dcn31_panel_cntl_destroy +ffffffff8208f090 t dcn31_panel_cntl_hw_init +ffffffff8208f180 t dcn31_is_panel_backlight_on +ffffffff8208f220 t dcn31_is_panel_powered_on +ffffffff8208f2c0 t dcn31_store_backlight_level +ffffffff8208f380 t dcn31_get_16_bit_backlight_from_pwm +ffffffff82090000 T dcn31_populate_dml_pipes_from_context +ffffffff82090350 T dcn31_calculate_wm_and_dlg +ffffffff820903c0 T dcn31_populate_dml_writeback_from_context +ffffffff82090420 T dcn31_set_mcif_arb_params +ffffffff82090480 T dcn31_validate_bandwidth +ffffffff82090860 T dcn31_create_resource_pool +ffffffff82091c00 t dcn31_resource_destruct +ffffffff82092260 t dcn31_destroy_resource_pool +ffffffff820922c0 t dcn31_panel_cntl_create +ffffffff82092330 t dcn31_link_encoder_create +ffffffff820923e0 t dcn31_link_enc_create_minimal +ffffffff82092480 t dcn31_get_panel_config_defaults +ffffffff820924f0 t read_dce_straps +ffffffff82092510 t dcn31_create_audio +ffffffff82092540 t dcn31_stream_encoder_create +ffffffff820926c0 t dcn31_hpo_dp_stream_encoder_create +ffffffff82092880 t dcn31_hpo_dp_link_encoder_create +ffffffff82092910 t dcn31_hwseq_create +ffffffff82093000 T vpg31_powerdown +ffffffff82093090 T vpg31_poweron +ffffffff82093120 T vpg31_construct +ffffffff82094000 T dccg314_create +ffffffff820940b0 t dccg314_set_dpstreamclk +ffffffff82094480 t dccg314_set_dtbclk_dto +ffffffff82094670 t dccg314_set_pixel_rate_div +ffffffff820949e0 t dccg314_set_valid_pixel_rate +ffffffff82095000 T dcn314_dio_stream_encoder_construct +ffffffff82095070 t enc314_stream_encoder_hdmi_set_stream_attribute +ffffffff82095660 t enc314_stream_encoder_dvi_set_stream_attribute +ffffffff82095860 t enc314_stream_encoder_dp_blank +ffffffff820958c0 t enc314_stream_encoder_dp_unblank +ffffffff82095c00 t enc314_read_state +ffffffff82095d60 t enc314_dp_set_dsc_config +ffffffff82095db0 t enc314_dp_set_odm_combine +ffffffff82095df0 t enc314_set_dig_input_mode +ffffffff82095e40 t enc314_enable_fifo +ffffffff82095ee0 t enc314_disable_fifo +ffffffff82095f20 t enc314_reset_fifo +ffffffff82097000 T dcn314_update_odm +ffffffff82097610 T dcn314_dsc_pg_control +ffffffff820979d0 T dcn314_enable_power_gating_plane +ffffffff82097c60 T dcn314_calculate_dccg_k1_k2_values +ffffffff82097de0 T dcn314_set_pixels_per_cycle +ffffffff82097ed0 T dcn314_hubp_pg_control +ffffffff82098000 T dcn314_hw_sequencer_construct +ffffffff82099000 T dcn314_timing_generator_init +ffffffff82099070 t optc314_enable_crtc +ffffffff82099170 t optc314_disable_crtc +ffffffff82099240 t optc314_phantom_crtc_post_enable +ffffffff82099300 t optc314_set_odm_bypass +ffffffff82099470 t optc314_set_odm_combine +ffffffff82099770 t optc314_set_h_timing_div_manual_mode +ffffffff8209a000 T dcn314_create_resource_pool +ffffffff8209b2d0 t dcn314_resource_destruct +ffffffff8209b930 t dcn314_destroy_resource_pool +ffffffff8209b990 t dcn31_panel_cntl_create +ffffffff8209ba00 t dcn31_link_encoder_create +ffffffff8209bab0 t dcn31_link_enc_create_minimal +ffffffff8209bb50 t dcn314_populate_dml_pipes_from_context +ffffffff8209bbe0 t dcn314_update_bw_bounding_box +ffffffff8209bc30 t dcn314_get_panel_config_defaults +ffffffff8209bca0 t read_dce_straps +ffffffff8209bcc0 t dcn31_create_audio +ffffffff8209bcf0 t dcn314_stream_encoder_create +ffffffff8209be70 t dcn31_hpo_dp_stream_encoder_create +ffffffff8209c030 t dcn31_hpo_dp_link_encoder_create +ffffffff8209c0c0 t dcn314_hwseq_create +ffffffff8209d000 T dcn315_create_resource_pool +ffffffff8209e260 t dcn315_resource_destruct +ffffffff8209e8c0 t dcn315_destroy_resource_pool +ffffffff8209e920 t dcn31_panel_cntl_create +ffffffff8209e990 t dcn31_link_encoder_create +ffffffff8209ea40 t dcn31_link_enc_create_minimal +ffffffff8209eae0 t dcn315_populate_dml_pipes_from_context +ffffffff8209ee20 t dcn315_get_panel_config_defaults +ffffffff8209ee90 t read_dce_straps +ffffffff8209eeb0 t dcn31_create_audio +ffffffff8209eee0 t dcn315_stream_encoder_create +ffffffff8209f060 t dcn31_hpo_dp_stream_encoder_create +ffffffff8209f220 t dcn31_hpo_dp_link_encoder_create +ffffffff8209f2b0 t dcn31_hwseq_create +ffffffff820a0000 T dcn316_create_resource_pool +ffffffff820a12a0 t dcn316_resource_destruct +ffffffff820a1900 t dcn316_destroy_resource_pool +ffffffff820a1960 t dcn31_panel_cntl_create +ffffffff820a19d0 t dcn31_link_encoder_create +ffffffff820a1a80 t dcn31_link_enc_create_minimal +ffffffff820a1b20 t dcn316_populate_dml_pipes_from_context +ffffffff820a1e40 t dcn316_get_panel_config_defaults +ffffffff820a1eb0 t read_dce_straps +ffffffff820a1ed0 t dcn31_create_audio +ffffffff820a1f00 t dcn316_stream_encoder_create +ffffffff820a2080 t dcn31_hpo_dp_stream_encoder_create +ffffffff820a2240 t dcn31_hpo_dp_link_encoder_create +ffffffff820a22d0 t dcn31_hwseq_create +ffffffff820a3000 T dccg32_create +ffffffff820a30b0 t dccg32_get_dccg_ref_freq +ffffffff820a30e0 t dccg32_otg_add_pixel +ffffffff820a3120 t dccg32_otg_drop_pixel +ffffffff820a3160 t dccg32_set_dpstreamclk +ffffffff820a3550 t dccg32_set_dtbclk_dto +ffffffff820a3740 t dccg32_set_pixel_rate_div +ffffffff820a3ab0 t dccg32_set_valid_pixel_rate +ffffffff820a4000 T enc32_hw_init +ffffffff820a4090 T dcn32_link_encoder_enable_dp_output +ffffffff820a40e0 T dcn32_link_encoder_construct +ffffffff820a42c0 t dcn32_link_encoder_is_in_alt_mode +ffffffff820a4340 t dcn32_link_encoder_get_max_link_cap +ffffffff820a5000 T dcn32_dio_stream_encoder_construct +ffffffff820a5070 t enc32_stream_encoder_hdmi_set_stream_attribute +ffffffff820a55a0 t enc32_stream_encoder_dvi_set_stream_attribute +ffffffff820a5720 t enc32_stream_encoder_dp_unblank +ffffffff820a5bd0 t enc32_read_state +ffffffff820a5d30 t enc32_dp_set_dsc_config +ffffffff820a5d80 t enc32_dp_set_odm_combine +ffffffff820a5dc0 t enc32_set_dig_input_mode +ffffffff820a6000 T dpp32_construct +ffffffff820a6060 t dscl32_calc_lb_num_partitions +ffffffff820a7000 T hpo_dp_link_encoder32_construct +ffffffff820a7050 t dcn32_hpo_dp_link_enc_is_in_alt_mode +ffffffff820a8000 T dcn32_program_det_size +ffffffff820a81a0 T hubbub32_program_urgent_watermarks +ffffffff820a8900 T hubbub32_program_stutter_watermarks +ffffffff820a8d50 T hubbub32_program_pstate_watermarks +ffffffff820a91d0 T hubbub32_program_usr_watermarks +ffffffff820a9420 T hubbub32_force_usr_retraining_allow +ffffffff820a94a0 T hubbub32_force_wm_propagate_to_pipes +ffffffff820a9540 T hubbub32_construct +ffffffff820a95c0 t hubbub32_wm_read_state +ffffffff820a9a30 t hubbub32_program_watermarks +ffffffff820a9b40 t hubbub32_init_watermarks +ffffffff820a9f80 t dcn32_program_compbuf_size +ffffffff820aa200 t dcn32_init_crb +ffffffff820ab000 T hubp32_update_force_pstate_disallow +ffffffff820ab090 T hubp32_update_mall_sel +ffffffff820ab120 T hubp32_prepare_subvp_buffering +ffffffff820ab1b0 T hubp32_phantom_hubp_post_enable +ffffffff820ab2c0 T hubp32_cursor_set_attributes +ffffffff820ab580 T hubp32_construct +ffffffff820ac000 T dcn32_dsc_pg_control +ffffffff820ac310 T dcn32_enable_power_gating_plane +ffffffff820ac4b0 T dcn32_hubp_pg_control +ffffffff820ac720 T dcn32_apply_idle_power_optimizations +ffffffff820ac980 t dcn32_calculate_cab_allocation +ffffffff820acd30 T dcn32_commit_subvp_config +ffffffff820acdd0 T dcn32_subvp_pipe_control_lock +ffffffff820acfa0 T dcn32_set_mcm_luts +ffffffff820ad130 T dcn32_set_input_transfer_func +ffffffff820ad270 T dcn32_set_output_transfer_func +ffffffff820ad470 T dcn32_subvp_update_force_pstate +ffffffff820ad5d0 T dcn32_update_mall_sel +ffffffff820ad750 T dcn32_program_mall_pipe_config +ffffffff820ad830 T dcn32_init_hw +ffffffff820ae010 T dcn32_update_odm +ffffffff820ae620 T dcn32_calculate_dccg_k1_k2_values +ffffffff820ae830 T dcn32_is_dp_dig_pixel_rate_div_policy +ffffffff820ae8c0 T dcn32_set_pixels_per_cycle +ffffffff820aea00 T dcn32_unblank_stream +ffffffff820aebd0 T dcn32_disable_link_output +ffffffff820aee60 T dcn32_update_phantom_vp_position +ffffffff820aef80 T dcn32_dsc_pg_status +ffffffff820af060 T dcn32_update_dsc_pg +ffffffff820b0000 T dcn32_hw_sequencer_init_functions +ffffffff820b1000 t mmhubbub32_warmup_mcif +ffffffff820b1210 t mmhubbub32_config_mcif_buf +ffffffff820b16b0 t mmhubbub32_config_mcif_arb +ffffffff820b1ac0 T dcn32_mmhubbub_construct +ffffffff820b2000 t mpc32_mpc_init +ffffffff820b2220 t mpc32_program_post1dlut +ffffffff820b2d00 t mpc32_program_shaper +ffffffff820b4fa0 t mpc32_program_3dlut +ffffffff820b5890 T dcn32_mpc_construct +ffffffff820b5950 t mpc32_power_on_shaper_3dlut +ffffffff820b5b80 t mpc32_set3dlut_ram12 +ffffffff820b6000 T dcn32_timing_generator_init +ffffffff820b6070 t optc32_enable_crtc +ffffffff820b6170 t optc32_disable_crtc +ffffffff820b6240 t optc32_phantom_crtc_post_enable +ffffffff820b6300 t optc32_set_drr +ffffffff820b6550 t optc32_set_odm_bypass +ffffffff820b66c0 t optc32_set_odm_combine +ffffffff820b69c0 t optc32_set_h_timing_div_manual_mode +ffffffff820b7000 T dcn32_panel_cntl_create +ffffffff820b7070 T dcn32_acquire_post_bldn_3dlut +ffffffff820b7160 T dcn32_release_post_bldn_3dlut +ffffffff820b7200 T dcn32_remove_phantom_pipes +ffffffff820b7370 T dcn32_add_phantom_pipes +ffffffff820b77b0 T dcn32_validate_bandwidth +ffffffff820b7c60 T dcn32_populate_dml_pipes_from_context +ffffffff820b7fe0 T dcn32_calculate_wm_and_dlg +ffffffff820b8050 T dcn32_create_resource_pool +ffffffff820b8100 t dcn32_resource_construct +ffffffff820c4550 T dcn32_acquire_idle_pipe_for_head_pipe_in_layer +ffffffff820c4790 t dcn32_mpc_create +ffffffff820c9150 t dcn32_resource_destruct +ffffffff820c97c0 t dcn32_destroy_resource_pool +ffffffff820c9820 t dcn32_link_encoder_create +ffffffff820ca780 t dcn32_update_bw_bounding_box +ffffffff820ca7d0 t read_dce_straps +ffffffff820ca800 t dcn32_create_audio +ffffffff820cab40 t dcn32_stream_encoder_create +ffffffff820cc9b0 t dcn32_hpo_dp_stream_encoder_create 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read_dce_straps +ffffffff820e34d0 t dcn321_create_audio +ffffffff820e3810 t dcn321_stream_encoder_create +ffffffff820e5680 t dcn321_hpo_dp_stream_encoder_create +ffffffff820e6360 t dcn321_hpo_dp_link_encoder_create +ffffffff820e67e0 t dcn321_hwseq_create +ffffffff820e6c70 t dcn321_vpg_create +ffffffff820e8000 T bw_int_to_fixed_nonconst +ffffffff820e8090 T bw_frc_to_fixed +ffffffff820e8260 T bw_floor2 +ffffffff820e8310 T bw_ceil2 +ffffffff820e8390 T bw_mul +ffffffff820e9000 T convert_to_custom_float_format +ffffffff820ea000 T bw_calcs_init +ffffffff820eae30 T bw_calcs +ffffffff820ec760 t calculate_bandwidth +ffffffff820f4000 T scaler_settings_calculation +ffffffff820f4380 T mode_support_and_system_configuration +ffffffff820fa160 T display_pipe_configuration +ffffffff820fa9a0 T dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation +ffffffff82100000 T dcn_bw_mod +ffffffff82100050 T dcn_bw_min2 +ffffffff82100090 T dcn_bw_max +ffffffff821000c0 T dcn_bw_max2 +ffffffff82100100 T dcn_bw_floor2 +ffffffff821001a0 T dcn_bw_floor +ffffffff821001d0 T dcn_bw_ceil +ffffffff82100210 T dcn_bw_ceil2 +ffffffff821002c0 T dcn_bw_max3 +ffffffff82100360 T dcn_bw_max5 +ffffffff821004c0 T dcn_bw_pow +ffffffff82100550 T dcn_bw_fabs +ffffffff821005b0 T dcn_bw_log +ffffffff82101000 T swizzle_mode_to_macro_tile_size +ffffffff82101090 T dcn_validate_bandwidth +ffffffff82103330 T dcn_bw_sync_calcs_and_dml +ffffffff82103580 t dcn_bw_calc_rq_dlg_ttu +ffffffff82103f00 T dcn_find_dcfclk_suits_all +ffffffff82104360 T dcn_bw_update_from_pplib_fclks +ffffffff821044f0 T dcn_bw_update_from_pplib_dcfclks +ffffffff821045c0 T dcn_get_soc_clks +ffffffff82104640 T dcn_bw_notify_pplib_of_wm_ranges +ffffffff82105000 T dcn20_populate_dml_writeback_from_context +ffffffff82105180 T dcn20_fpu_set_wb_arb_params +ffffffff82105330 T dcn20_calculate_dlg_params +ffffffff82105b10 T dcn20_populate_dml_pipes_from_context +ffffffff82106a10 T dcn20_calculate_wm +ffffffff821071b0 T dcn20_update_bounding_box +ffffffff82107420 T dcn20_cap_soc_clocks +ffffffff821077a0 T dcn20_patch_bounding_box +ffffffff82107910 T dcn20_validate_bandwidth_fp +ffffffff82107aa0 t dcn20_validate_bandwidth_internal +ffffffff82107e80 T dcn20_fpu_set_wm_ranges +ffffffff82107f20 T dcn20_fpu_adjust_dppclk +ffffffff82107fc0 T dcn21_populate_dml_pipes_from_context +ffffffff821080b0 T dcn21_validate_bandwidth_fp +ffffffff82108b30 T dcn21_update_bw_bounding_box +ffffffff82109010 T dcn21_clk_mgr_set_bw_params_wm_table +ffffffff82109070 T dcn201_populate_dml_writeback_from_context_fpu +ffffffff82109380 t calculate_wm_set_for_vlevel +ffffffff8210a000 T dml20_recalculate +ffffffff8210a740 t dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff8210fda0 T dml20_ModeSupportAndSystemConfigurationFull +ffffffff82116d30 t TruncToValidBPP +ffffffff82116f10 t CalculateVMAndRowBytes +ffffffff821175a0 t CalculatePrefetchSourceLines +ffffffff82117760 t CalculateWriteBackDelay +ffffffff82117a30 t CalculatePrefetchSchedule +ffffffff821188f0 t CalculateFlipSchedule +ffffffff82118ca0 t adjust_ReturnBW +ffffffff82119000 T dml20v2_recalculate +ffffffff82119740 t dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff8211ee50 T dml20v2_ModeSupportAndSystemConfigurationFull +ffffffff82125cd0 t TruncToValidBPP +ffffffff82126260 t CalculateVMAndRowBytes +ffffffff821268f0 t CalculatePrefetchSourceLines +ffffffff82126ab0 t CalculateWriteBackDelay +ffffffff82126d80 t CalculateDelayAfterScaler +ffffffff821270d0 t CalculatePrefetchSchedule +ffffffff82127e40 t CalculateFlipSchedule +ffffffff821281f0 t adjust_ReturnBW +ffffffff82129000 T dml20_rq_dlg_get_rq_reg +ffffffff82129490 t dml20_rq_dlg_get_rq_params +ffffffff82129660 T dml20_rq_dlg_get_dlg_reg +ffffffff8212b5a0 t get_surf_rq_param +ffffffff8212be20 t calculate_ttu_cursor +ffffffff8212d000 T dml20v2_rq_dlg_get_rq_reg +ffffffff8212d490 t dml20v2_rq_dlg_get_rq_params +ffffffff8212d660 T dml20v2_rq_dlg_get_dlg_reg +ffffffff8212f5b0 t get_surf_rq_param +ffffffff8212fe30 t calculate_ttu_cursor +ffffffff82131000 T dml21_recalculate +ffffffff82131700 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff821370b0 T dml21_ModeSupportAndSystemConfigurationFull +ffffffff8213d190 t TruncToValidBPP +ffffffff8213d720 t CalculateDCFCLKDeepSleep +ffffffff8213da60 t CalculateVMAndRowBytes +ffffffff8213e2d0 t CalculatePrefetchSourceLines +ffffffff8213e490 t CalculateWriteBackDelay +ffffffff8213e760 t CalculatePrefetchSchedulePerPlane +ffffffff8213ef70 t CalculateUrgentBurstFactor +ffffffff8213f380 t CalculateFlipSchedule +ffffffff8213f870 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff821408d0 t CalculatePrefetchSchedule +ffffffff82142000 T dml21_rq_dlg_get_rq_reg +ffffffff82142490 t dml_rq_dlg_get_rq_params +ffffffff82142660 T dml21_rq_dlg_get_dlg_reg +ffffffff821449c0 t get_surf_rq_param +ffffffff82145300 t calculate_ttu_cursor +ffffffff82146000 T optc3_fpu_set_vrr_m_const +ffffffff821464a0 T dcn30_fpu_populate_dml_writeback_from_context +ffffffff821467f0 T dcn30_fpu_set_mcif_arb_params +ffffffff82146960 T dcn30_fpu_update_soc_for_wm_a +ffffffff82146a10 T dcn30_fpu_calculate_wm_and_dlg +ffffffff821472f0 T dcn30_fpu_update_dram_channel_width_bytes +ffffffff82147350 T dcn30_fpu_update_max_clk +ffffffff821473f0 T dcn30_fpu_get_optimal_dcfclk_fclk_for_uclk +ffffffff821474f0 T dcn30_fpu_update_bw_bounding_box +ffffffff821476d0 T dcn30_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff82147890 T dcn3_fpu_build_wm_range_table +ffffffff82147b70 T patch_dcn30_soc_bounding_box +ffffffff82148000 T dml30_recalculate +ffffffff82148600 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff8214ec40 T dml30_CalculateBytePerPixelAnd256BBlockSizes +ffffffff8214eeb0 T dml30_CalculateWriteBackDISPCLK +ffffffff8214f030 T dml30_ModeSupportAndSystemConfigurationFull +ffffffff82156430 t CalculateSwathAndDETConfiguration +ffffffff82156aa0 t TruncToValidBPP +ffffffff82156d20 t dscceComputeDelay +ffffffff82156e60 t CalculateVMAndRowBytes +ffffffff82157510 t CalculatePrefetchSourceLines +ffffffff821576d0 t CalculateUrgentBurstFactor +ffffffff82157960 t CalculateDCFCLKDeepSleep +ffffffff82157c80 t UseMinimumDCFCLK +ffffffff82158e80 t CalculatePrefetchSchedule +ffffffff8215a3e0 t CalculateFlipSchedule +ffffffff8215a8d0 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff8215b6f0 t CalculateSwathWidth +ffffffff8215c000 T dml30_rq_dlg_get_rq_reg +ffffffff8215c4b0 t dml_rq_dlg_get_rq_params +ffffffff8215c720 T dml30_rq_dlg_get_dlg_reg +ffffffff8215eed0 t get_surf_rq_param +ffffffff8215f870 t calculate_ttu_cursor +ffffffff82160000 T dcn301_update_bw_bounding_box +ffffffff82160320 T dcn301_fpu_set_wm_ranges +ffffffff821603c0 T dcn301_fpu_init_soc_bounding_box +ffffffff82160460 T dcn301_calculate_wm_and_dlg_fp +ffffffff82160790 t calculate_wm_set_for_vlevel +ffffffff82161000 T dcn302_fpu_update_bw_bounding_box +ffffffff82161ac0 T dcn302_fpu_init_soc_bounding_box +ffffffff82162000 T dcn303_fpu_update_bw_bounding_box +ffffffff82162b00 T dcn303_fpu_init_soc_bounding_box +ffffffff82163000 T dcn31_zero_pipe_dcc_fraction +ffffffff82163060 T dcn31_update_soc_for_wm_a +ffffffff82163110 T dcn315_update_soc_for_wm_a +ffffffff821631e0 T dcn31_calculate_wm_and_dlg_fp +ffffffff821636e0 T dcn31_update_bw_bounding_box +ffffffff82163ad0 T dcn315_update_bw_bounding_box +ffffffff82163dc0 T dcn316_update_bw_bounding_box +ffffffff82165000 T dml31_recalculate +ffffffff821652a0 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff8216c060 T dml31_CalculateWriteBackDISPCLK +ffffffff8216c1e0 T dml31_ModeSupportAndSystemConfigurationFull +ffffffff821744a0 t CalculateSwathAndDETConfiguration +ffffffff82174aa0 t TruncToValidBPP +ffffffff82174d20 t dscceComputeDelay +ffffffff82174e60 t CalculateDCFCLKDeepSleep +ffffffff821751a0 t CalculateVMAndRowBytes +ffffffff821757f0 t CalculatePrefetchSourceLines +ffffffff821759b0 t CalculateUrgentBurstFactor +ffffffff82175c40 t CalculatePrefetchSchedulePerPlane +ffffffff82176370 t CalculateFlipSchedule +ffffffff821768f0 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff82177550 t CalculateSwathWidth +ffffffff82177a60 t CalculatePrefetchSchedule +ffffffff82178ef0 t CalculateVupdateAndDynamicMetadataParameters +ffffffff8217a000 T dml31_rq_dlg_get_rq_reg +ffffffff8217a4b0 t dml_rq_dlg_get_rq_params +ffffffff8217a720 T dml31_rq_dlg_get_dlg_reg +ffffffff8217d1f0 t get_surf_rq_param +ffffffff8217e000 T dcn314_update_bw_bounding_box_fpu +ffffffff8217e480 T dcn314_populate_dml_pipes_from_context_fpu +ffffffff8217f000 T dml314_recalculate +ffffffff8217f280 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff82185f60 T dml314_CalculateWriteBackDISPCLK +ffffffff821860e0 T dml314_ModeSupportAndSystemConfigurationFull +ffffffff8218e280 t CalculateBytePerPixelAnd256BBlockSizes +ffffffff8218e4f0 t CalculateSwathAndDETConfiguration +ffffffff8218eaf0 t TruncToValidBPP +ffffffff8218ed70 t dscceComputeDelay +ffffffff8218eeb0 t CalculateDCFCLKDeepSleep +ffffffff8218f1f0 t CalculateVMAndRowBytes +ffffffff8218f840 t CalculatePrefetchSourceLines +ffffffff8218fa00 t CalculateUrgentBurstFactor +ffffffff8218fc90 t CalculateMaxVStartup +ffffffff8218fdd0 t CalculatePrefetchSchedulePerPlane +ffffffff82190500 t CalculateFlipSchedule +ffffffff82190a80 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff821916e0 t CalculateSwathWidth +ffffffff82191bf0 t CalculatePrefetchSchedule +ffffffff82193080 t CalculateVupdateAndDynamicMetadataParameters +ffffffff82194000 T dml314_rq_dlg_get_rq_reg +ffffffff821944b0 t dml_rq_dlg_get_rq_params +ffffffff82194720 T dml314_rq_dlg_get_dlg_reg +ffffffff82197270 t get_surf_rq_param +ffffffff82198000 T dcn32_build_wm_range_table_fpu +ffffffff82198390 T dcn32_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff821985c0 T dcn32_internal_validate_bw +ffffffff8219a250 T dcn32_helper_populate_phantom_dlg_params +ffffffff8219a3f0 T dcn32_predict_pipe_split +ffffffff8219a620 T insert_entry_into_table_sorted +ffffffff8219aa50 T dcn32_set_phantom_stream_timing +ffffffff8219acf0 t dcn32_split_stream_for_mpc_or_odm +ffffffff8219b080 T dcn32_calculate_wm_and_dlg_fpu +ffffffff8219c570 T dcn32_patch_dpm_table +ffffffff8219c780 T dcn32_update_bw_bounding_box_fpu +ffffffff8219e150 T dcn32_zero_pipe_dcc_fraction +ffffffff8219e1b0 t subvp_drr_schedulable +ffffffff8219f000 T dml32_recalculate +ffffffff821a3320 T dml32_ModeSupportAndSystemConfigurationFull +ffffffff821ab000 T dml32_dscceComputeDelay +ffffffff821ab140 T dml32_dscComputeDelay +ffffffff821ab180 T IsVertical +ffffffff821ab1b0 T dml32_CalculateSinglePipeDPPCLKAndSCLThroughput +ffffffff821ab4c0 T dml32_CalculateBytePerPixelAndBlockSizes +ffffffff821ab7f0 T dml32_CalculateSwathAndDETConfiguration +ffffffff821ac000 T dml32_CalculateSwathWidth +ffffffff821ac8a0 T dml32_UnboundedRequest +ffffffff821ac900 T dml32_CalculateDETBufferSize +ffffffff821acf40 T dml32_CalculateODMMode +ffffffff821ad6a0 T dml32_CalculateRequiredDispclk +ffffffff821ad850 T dml32_RoundToDFSGranularity +ffffffff821ad8e0 T dml32_CalculateOutputLink +ffffffff821ae400 T dml32_TruncToValidBPP +ffffffff821ae750 T dml32_CalculateDPPCLK +ffffffff821ae900 T dml32_RequiredDTBCLK +ffffffff821aeb50 T dml32_DSCDelayRequirement +ffffffff821af010 T dml32_CalculateSurfaceSizeInMall +ffffffff821afb20 T dml32_CalculateVMRowAndSwath +ffffffff821b0950 T dml32_CalculateVMAndRowBytes +ffffffff821b1590 T dml32_CalculatePrefetchSourceLines +ffffffff821b17e0 T dml32_CalculateMALLUseForStaticScreen +ffffffff821b1920 T dml32_CalculateRowBandwidth +ffffffff821b1a80 T dml32_CalculateUrgentLatency +ffffffff821b1b10 T dml32_CalculateUrgentBurstFactor +ffffffff821b1db0 T dml32_CalculateDCFCLKDeepSleep +ffffffff821b20f0 T dml32_CalculateWriteBackDelay +ffffffff821b2250 T dml32_UseMinimumDCFCLK +ffffffff821b3110 T dml32_CalculateExtraLatencyBytes +ffffffff821b32e0 T dml32_CalculateTWait +ffffffff821b33c0 T dml32_CalculateVUpdateAndDynamicMetadataParameters +ffffffff821b3620 T dml32_get_return_bw_mbps +ffffffff821b37d0 T dml32_get_return_bw_mbps_vm_only +ffffffff821b38b0 T dml32_CalculateExtraLatency +ffffffff821b3ad0 T dml32_CalculatePrefetchSchedule +ffffffff821b5080 T dml32_CalculateFlipSchedule +ffffffff821b5600 T dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport +ffffffff821b6750 T dml32_CalculateWriteBackDISPCLK +ffffffff821b6910 T dml32_CalculateMinAndMaxPrefetchMode +ffffffff821b6950 T dml32_CalculatePixelDeliveryTimes +ffffffff821b6dc0 T dml32_CalculateMetaAndPTETimes +ffffffff821b7500 T dml32_CalculateVMGroupAndRequestTimes +ffffffff821b79f0 T dml32_CalculateDCCConfiguration +ffffffff821b8000 T dml32_CalculateStutterEfficiency +ffffffff821b8f40 T dml32_CalculateMaxDETAndMinCompressedBufferSize +ffffffff821b9020 T dml32_CalculateVActiveBandwithSupport +ffffffff821b91b0 T dml32_CalculatePrefetchBandwithSupport +ffffffff821b9450 T dml32_CalculateBandwidthAvailableForImmediateFlip +ffffffff821b95a0 T dml32_CalculateImmediateFlipBandwithSupport +ffffffff821b97f0 T dml32_CalculateDETSwathFillLatencyHiding +ffffffff821ba000 T dml32_rq_dlg_get_rq_reg +ffffffff821ba6a0 T dml32_rq_dlg_get_dlg_reg +ffffffff821bd000 T dcn321_insert_entry_into_table_sorted +ffffffff821bd430 T dcn321_update_bw_bounding_box_fpu +ffffffff821bf000 T dml_init_instance +ffffffff821bf300 T dml_get_status_message +ffffffff821bf340 T dml_log_pipe_params +ffffffff821bf370 T dml_log_mode_support_params +ffffffff821c0000 T dml_get_voltage_level +ffffffff821c01e0 t fetch_socbb_params +ffffffff821c06f0 t fetch_ip_params +ffffffff821c0b90 t fetch_pipe_params +ffffffff821c1c90 T PixelClockAdjustmentForProgressiveToInterlaceUnit +ffffffff821c1d00 T get_clk_dcf_deepsleep +ffffffff821c1e10 T get_wm_urgent +ffffffff821c1f20 T get_wm_memory_trip +ffffffff821c2030 T get_wm_writeback_urgent +ffffffff821c2140 T get_wm_stutter_exit +ffffffff821c2250 T get_wm_stutter_enter_exit +ffffffff821c2360 T get_wm_z8_stutter_exit +ffffffff821c2470 T get_wm_z8_stutter_enter_exit +ffffffff821c2580 T get_stutter_efficiency_z8 +ffffffff821c2690 T get_stutter_num_bursts_z8 +ffffffff821c27a0 T get_wm_dram_clock_change +ffffffff821c28b0 T get_wm_writeback_dram_clock_change +ffffffff821c29c0 T get_stutter_efficiency +ffffffff821c2ad0 T get_stutter_efficiency_no_vblank +ffffffff821c2be0 T get_stutter_period +ffffffff821c2cf0 T get_urgent_latency +ffffffff821c2e00 T get_urgent_extra_latency +ffffffff821c2f10 T get_nonurgent_latency +ffffffff821c3020 T get_dram_clock_change_latency +ffffffff821c3130 T get_dispclk_calculated +ffffffff821c3240 T get_total_data_read_bw +ffffffff821c3350 T get_return_bw +ffffffff821c3460 T get_tcalc +ffffffff821c3570 T get_fraction_of_urgent_bandwidth +ffffffff821c3680 T get_fraction_of_urgent_bandwidth_imm_flip +ffffffff821c3790 T get_cstate_max_cap_mode +ffffffff821c38b0 T get_comp_buffer_size_kbytes +ffffffff821c39c0 T get_pixel_chunk_size_in_kbyte +ffffffff821c3ad0 T get_alpha_pixel_chunk_size_in_kbyte +ffffffff821c3be0 T get_meta_chunk_size_in_kbyte +ffffffff821c3cf0 T get_min_pixel_chunk_size_in_byte +ffffffff821c3e00 T get_min_meta_chunk_size_in_byte +ffffffff821c3f10 T get_fclk_watermark +ffffffff821c4020 T get_usr_retraining_watermark +ffffffff821c4130 T get_comp_buffer_reserved_space_kbytes +ffffffff821c4240 T get_comp_buffer_reserved_space_64bytes +ffffffff821c4350 T get_comp_buffer_reserved_space_zs +ffffffff821c4460 T get_unbounded_request_enabled +ffffffff821c4580 T get_dsc_delay +ffffffff821c46a0 T get_dppclk_calculated +ffffffff821c47c0 T get_dscclk_calculated +ffffffff821c48e0 T get_min_ttu_vblank +ffffffff821c4a00 T get_min_ttu_vblank_in_us +ffffffff821c4b20 T get_vratio_prefetch_l +ffffffff821c4c40 T get_vratio_prefetch_c +ffffffff821c4d60 T get_dst_x_after_scaler +ffffffff821c4e80 T get_dst_y_after_scaler +ffffffff821c4fa0 T get_dst_y_per_vm_vblank +ffffffff821c50c0 T get_dst_y_per_row_vblank +ffffffff821c51e0 T get_dst_y_prefetch +ffffffff821c5300 T get_dst_y_per_vm_flip +ffffffff821c5420 T get_dst_y_per_row_flip +ffffffff821c5540 T get_refcyc_per_vm_group_vblank +ffffffff821c5660 T get_refcyc_per_vm_group_flip +ffffffff821c5780 T get_refcyc_per_vm_req_vblank +ffffffff821c58a0 T get_refcyc_per_vm_req_flip +ffffffff821c59c0 T get_refcyc_per_vm_group_vblank_in_us +ffffffff821c5ae0 T get_refcyc_per_vm_group_flip_in_us +ffffffff821c5c00 T get_refcyc_per_vm_req_vblank_in_us +ffffffff821c5d20 T get_refcyc_per_vm_req_flip_in_us +ffffffff821c5e40 T get_refcyc_per_vm_dmdata_in_us +ffffffff821c5f60 T get_dmdata_dl_delta_in_us +ffffffff821c6080 T get_refcyc_per_line_delivery_l_in_us +ffffffff821c61a0 T get_refcyc_per_line_delivery_c_in_us +ffffffff821c62c0 T get_refcyc_per_line_delivery_pre_l_in_us +ffffffff821c63e0 T get_refcyc_per_line_delivery_pre_c_in_us +ffffffff821c6500 T get_refcyc_per_req_delivery_l_in_us +ffffffff821c6620 T get_refcyc_per_req_delivery_c_in_us +ffffffff821c6740 T get_refcyc_per_req_delivery_pre_l_in_us +ffffffff821c6860 T get_refcyc_per_req_delivery_pre_c_in_us +ffffffff821c6980 T get_refcyc_per_cursor_req_delivery_in_us +ffffffff821c6aa0 T get_refcyc_per_cursor_req_delivery_pre_in_us +ffffffff821c6bc0 T get_refcyc_per_meta_chunk_nom_l_in_us +ffffffff821c6ce0 T get_refcyc_per_meta_chunk_nom_c_in_us +ffffffff821c6e00 T get_refcyc_per_meta_chunk_vblank_l_in_us +ffffffff821c6f20 T get_refcyc_per_meta_chunk_vblank_c_in_us +ffffffff821c7040 T get_refcyc_per_meta_chunk_flip_l_in_us +ffffffff821c7160 T get_refcyc_per_meta_chunk_flip_c_in_us +ffffffff821c7280 T get_vstartup +ffffffff821c73a0 T get_vupdate_offset +ffffffff821c74c0 T get_vupdate_width +ffffffff821c75e0 T get_vready_offset +ffffffff821c7700 T get_vready_at_or_after_vsync +ffffffff821c7830 T get_min_dst_y_next_start +ffffffff821c7950 T get_dst_y_per_pte_row_nom_l +ffffffff821c7a70 T get_dst_y_per_pte_row_nom_c +ffffffff821c7b90 T get_dst_y_per_meta_row_nom_l +ffffffff821c7cb0 T get_dst_y_per_meta_row_nom_c +ffffffff821c7dd0 T get_refcyc_per_pte_group_nom_l_in_us +ffffffff821c7ef0 T get_refcyc_per_pte_group_nom_c_in_us +ffffffff821c8010 T get_refcyc_per_pte_group_vblank_l_in_us +ffffffff821c8130 T get_refcyc_per_pte_group_vblank_c_in_us +ffffffff821c8250 T get_refcyc_per_pte_group_flip_l_in_us +ffffffff821c8370 T get_refcyc_per_pte_group_flip_c_in_us +ffffffff821c8490 T get_vstartup_calculated +ffffffff821c85b0 T get_dpte_row_height_linear_c +ffffffff821c86d0 T get_swath_height_l +ffffffff821c87f0 T get_swath_height_c +ffffffff821c8910 T get_det_stored_buffer_size_l_bytes +ffffffff821c8a30 T get_det_stored_buffer_size_c_bytes +ffffffff821c8b50 T get_dpte_group_size_in_bytes +ffffffff821c8c70 T get_vm_group_size_in_bytes +ffffffff821c8d90 T get_dpte_row_height_linear_l +ffffffff821c8eb0 T get_pte_buffer_mode +ffffffff821c8fe0 T get_subviewport_lines_needed_in_mall +ffffffff821c9100 T get_total_immediate_flip_bytes +ffffffff821c9210 T get_total_immediate_flip_bw +ffffffff821c93f0 T get_total_prefetch_bw +ffffffff821c95d0 T get_total_surface_size_in_mall_bytes +ffffffff821c9770 T get_det_buffer_size_kbytes +ffffffff821c9890 T get_is_phantom_pipe +ffffffff821c99b0 T Calculate256BBlockSizes +ffffffff821c9aa0 T CalculateMinAndMaxPrefetchMode +ffffffff821c9b10 T ModeSupportAndSystemConfiguration +ffffffff821c9e20 T CalculateWriteBackDISPCLK +ffffffff821cb000 T print__rq_params_st +ffffffff821cb030 T print__data_rq_sizing_params_st +ffffffff821cb060 T print__data_rq_dlg_params_st +ffffffff821cb090 T print__data_rq_misc_params_st +ffffffff821cb0c0 T print__rq_dlg_params_st +ffffffff821cb0f0 T print__dlg_sys_params_st +ffffffff821cb120 T print__data_rq_regs_st +ffffffff821cb150 T print__rq_regs_st +ffffffff821cb180 T print__dlg_regs_st +ffffffff821cb1b0 T print__ttu_regs_st +ffffffff821cc000 T dml1_extract_rq_regs +ffffffff821cc330 T dml1_rq_dlg_get_rq_params +ffffffff821cc500 t get_surf_rq_param +ffffffff821cd200 T dml1_rq_dlg_get_dlg_params +ffffffff821d0000 T _do_calc_rc_params +ffffffff821d1040 t get_qp_set +ffffffff821d2000 T dc_dsc_parse_dsc_dpcd +ffffffff821d22a0 t dsc_throughput_from_dpcd +ffffffff821d2460 T dc_dsc_compute_bandwidth_range +ffffffff821d2640 t intersect_dsc_caps +ffffffff821d2800 t setup_dsc_config +ffffffff821d31d0 T dc_dsc_compute_config +ffffffff821d32c0 T dc_dsc_stream_bandwidth_in_kbps +ffffffff821d3410 T dc_dsc_stream_bandwidth_overhead_in_kbps +ffffffff821d3560 T dc_dsc_get_policy_for_timing +ffffffff821d3600 T dc_dsc_policy_set_max_target_bpp_limit +ffffffff821d3630 T dc_dsc_policy_set_enable_dsc_when_not_needed +ffffffff821d3660 T dc_dsc_policy_set_disable_dsc_stream_overhead +ffffffff821d4000 T calc_rc_params +ffffffff821d5000 T dscc_compute_dsc_parameters +ffffffff821d6000 T dal_hw_factory_dce110_init ffffffff821d6060 t define_hpd_registers ffffffff821d60b0 t define_ddc_registers -ffffffff821d7000 T dal_hw_translate_dce120_init +ffffffff821d7000 T dal_hw_translate_dce110_init ffffffff821d7030 t offset_to_id -ffffffff821d73a0 t id_to_offset -ffffffff821d8000 T dal_hw_factory_dce80_init +ffffffff821d7390 t id_to_offset +ffffffff821d8000 T dal_hw_factory_dce120_init ffffffff821d8060 t define_hpd_registers ffffffff821d80b0 t define_ddc_registers -ffffffff821d9000 T dal_hw_translate_dce80_init +ffffffff821d9000 T dal_hw_translate_dce120_init ffffffff821d9030 t offset_to_id -ffffffff821d97b0 t id_to_offset -ffffffff821da000 T dal_hw_factory_dcn10_init +ffffffff821d93a0 t id_to_offset +ffffffff821da000 T dal_hw_factory_dce80_init ffffffff821da060 t define_hpd_registers ffffffff821da0b0 t define_ddc_registers -ffffffff821da140 t define_generic_registers -ffffffff821db000 T dal_hw_translate_dcn10_init +ffffffff821db000 T dal_hw_translate_dce80_init ffffffff821db030 t offset_to_id -ffffffff821db390 t id_to_offset -ffffffff821dc000 T dal_hw_factory_dcn20_init +ffffffff821db7b0 t id_to_offset +ffffffff821dc000 T dal_hw_factory_dcn10_init ffffffff821dc060 t define_hpd_registers ffffffff821dc0b0 t define_ddc_registers -ffffffff821dc160 t define_generic_registers -ffffffff821dd000 T dal_hw_translate_dcn20_init +ffffffff821dc140 t define_generic_registers +ffffffff821dd000 T dal_hw_translate_dcn10_init ffffffff821dd030 t offset_to_id -ffffffff821dd2b0 t id_to_offset -ffffffff821de000 T dal_hw_factory_dcn21_init +ffffffff821dd390 t id_to_offset +ffffffff821de000 T dal_hw_factory_dcn20_init ffffffff821de060 t define_hpd_registers ffffffff821de0b0 t define_ddc_registers ffffffff821de160 t define_generic_registers -ffffffff821df000 T dal_hw_translate_dcn21_init +ffffffff821df000 T dal_hw_translate_dcn20_init ffffffff821df030 t offset_to_id -ffffffff821df2a0 t id_to_offset -ffffffff821e0000 T dal_hw_factory_dcn30_init +ffffffff821df2b0 t id_to_offset +ffffffff821e0000 T dal_hw_factory_dcn21_init ffffffff821e0060 t define_hpd_registers ffffffff821e00b0 t define_ddc_registers ffffffff821e0160 t define_generic_registers -ffffffff821e1000 T dal_hw_translate_dcn30_init +ffffffff821e1000 T dal_hw_translate_dcn21_init ffffffff821e1030 t offset_to_id -ffffffff821e12b0 t id_to_offset -ffffffff821e2000 T dal_hw_factory_dcn315_init +ffffffff821e12a0 t id_to_offset +ffffffff821e2000 T dal_hw_factory_dcn30_init ffffffff821e2060 t define_hpd_registers ffffffff821e20b0 t define_ddc_registers ffffffff821e2160 t define_generic_registers -ffffffff821e3000 T dal_hw_translate_dcn315_init +ffffffff821e3000 T dal_hw_translate_dcn30_init ffffffff821e3030 t offset_to_id -ffffffff821e32a0 t id_to_offset -ffffffff821e4000 T dal_hw_factory_dcn32_init +ffffffff821e32b0 t id_to_offset +ffffffff821e4000 T dal_hw_factory_dcn315_init ffffffff821e4060 t define_hpd_registers ffffffff821e40b0 t define_ddc_registers ffffffff821e4160 t define_generic_registers -ffffffff821e5000 T dal_hw_translate_dcn32_init +ffffffff821e5000 T dal_hw_translate_dcn315_init ffffffff821e5030 t offset_to_id -ffffffff821e5280 t id_to_offset -ffffffff821e6000 T dal_gpio_open -ffffffff821e60b0 T dal_gpio_open_ex -ffffffff821e6160 T dal_gpio_get_value -ffffffff821e61e0 T dal_gpio_set_value -ffffffff821e6260 T dal_gpio_get_mode -ffffffff821e6290 T dal_gpio_lock_pin -ffffffff821e62b0 T dal_gpio_unlock_pin -ffffffff821e62d0 T dal_gpio_change_mode -ffffffff821e6350 T dal_gpio_get_id -ffffffff821e6380 T dal_gpio_get_enum -ffffffff821e63b0 T dal_gpio_set_config -ffffffff821e6430 T dal_gpio_get_pin_info -ffffffff821e6480 T dal_gpio_get_sync_source -ffffffff821e6500 T dal_gpio_get_output_state -ffffffff821e6530 T dal_gpio_get_ddc -ffffffff821e6560 T dal_gpio_get_hpd -ffffffff821e6590 T dal_gpio_get_generic -ffffffff821e65c0 T dal_gpio_close -ffffffff821e6610 T dal_gpio_create -ffffffff821e67a0 T dal_gpio_destroy -ffffffff821e7000 T dal_gpio_service_create -ffffffff821e7250 T dal_gpio_service_create_irq -ffffffff821e7300 T dal_gpio_create_irq -ffffffff821e7380 T dal_gpio_service_create_generic_mux -ffffffff821e7420 T dal_gpio_destroy_generic_mux -ffffffff821e74b0 T dal_gpio_get_generic_pin_info -ffffffff821e7510 T dal_gpio_service_destroy -ffffffff821e7630 T dal_mux_setup_config -ffffffff821e7690 T dal_gpio_service_lock -ffffffff821e7700 T dal_gpio_service_unlock -ffffffff821e7770 T dal_gpio_service_open -ffffffff821e79a0 T dal_gpio_service_close -ffffffff821e7a30 T dal_irq_get_source -ffffffff821e7aa0 T dal_irq_get_rx_source -ffffffff821e7af0 T dal_irq_setup_hpd_filter -ffffffff821e7b50 T dal_gpio_destroy_irq -ffffffff821e7be0 T dal_gpio_create_ddc -ffffffff821e7d50 T dal_gpio_destroy_ddc -ffffffff821e7e10 T dal_ddc_close -ffffffff821e7e60 T dal_ddc_open -ffffffff821e7fc0 T dal_ddc_change_mode -ffffffff821e8060 T dal_ddc_get_line -ffffffff821e8070 T dal_ddc_set_config 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dal_gpio_get_enum +ffffffff821e83b0 T dal_gpio_set_config +ffffffff821e8430 T dal_gpio_get_pin_info +ffffffff821e8480 T dal_gpio_get_sync_source +ffffffff821e8500 T dal_gpio_get_output_state +ffffffff821e8530 T dal_gpio_get_ddc +ffffffff821e8560 T dal_gpio_get_hpd +ffffffff821e8590 T dal_gpio_get_generic +ffffffff821e85c0 T dal_gpio_close +ffffffff821e8610 T dal_gpio_create +ffffffff821e87a0 T dal_gpio_destroy +ffffffff821e9000 T dal_gpio_service_create +ffffffff821e9250 T dal_gpio_service_create_irq +ffffffff821e9300 T dal_gpio_create_irq +ffffffff821e9380 T dal_gpio_service_create_generic_mux +ffffffff821e9420 T dal_gpio_destroy_generic_mux +ffffffff821e94b0 T dal_gpio_get_generic_pin_info +ffffffff821e9510 T dal_gpio_service_destroy +ffffffff821e9630 T dal_mux_setup_config +ffffffff821e9690 T dal_gpio_service_lock +ffffffff821e9700 T dal_gpio_service_unlock +ffffffff821e9770 T dal_gpio_service_open +ffffffff821e99a0 T dal_gpio_service_close +ffffffff821e9a30 T dal_irq_get_source +ffffffff821e9aa0 T dal_irq_get_rx_source +ffffffff821e9af0 T dal_irq_setup_hpd_filter +ffffffff821e9b50 T dal_gpio_destroy_irq +ffffffff821e9be0 T dal_gpio_create_ddc +ffffffff821e9d50 T dal_gpio_destroy_ddc +ffffffff821e9e10 T dal_ddc_close +ffffffff821e9e60 T dal_ddc_open +ffffffff821e9fc0 T dal_ddc_change_mode +ffffffff821ea060 T dal_ddc_get_line +ffffffff821ea070 T dal_ddc_set_config +ffffffff821eb000 T dal_hw_ddc_init +ffffffff821eb100 T dal_hw_ddc_get_pin +ffffffff821eb110 t dal_hw_ddc_destroy ffffffff821eb170 t set_config -ffffffff821ec000 T dal_hw_gpio_open -ffffffff821ec0a0 T dal_hw_gpio_config_mode -ffffffff821ec180 T dal_hw_gpio_get_value -ffffffff821ec1e0 T dal_hw_gpio_set_value -ffffffff821ec260 T dal_hw_gpio_change_mode -ffffffff821ec270 T dal_hw_gpio_close -ffffffff821ec320 T dal_hw_gpio_construct -ffffffff821ec370 T dal_hw_gpio_destruct -ffffffff821ed000 T dal_hw_hpd_init -ffffffff821ed100 T dal_hw_hpd_get_pin -ffffffff821ed110 t dal_hw_hpd_destroy -ffffffff821ed170 t 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+ffffffff821ee1e0 T dal_hw_gpio_set_value +ffffffff821ee260 T dal_hw_gpio_change_mode +ffffffff821ee270 T dal_hw_gpio_close +ffffffff821ee320 T dal_hw_gpio_construct +ffffffff821ee370 T dal_hw_gpio_destruct +ffffffff821ef000 T dal_hw_hpd_init +ffffffff821ef100 T dal_hw_hpd_get_pin +ffffffff821ef110 t dal_hw_hpd_destroy +ffffffff821ef170 t get_value +ffffffff821ef200 t set_config +ffffffff821f0000 T dal_hw_translate_init +ffffffff821f1000 T dc_process_hdcp_msg +ffffffff821f1180 t hdmi_14_process_transaction +ffffffff821f12d0 t dp_11_process_transaction +ffffffff821f2000 T dal_irq_service_dummy_set +ffffffff821f2050 T dal_irq_service_dummy_ack +ffffffff821f20a0 T dce110_vblank_set +ffffffff821f2170 T to_dal_irq_source_dce110 +ffffffff821f22f0 T dal_irq_service_dce110_create +ffffffff821f2370 t hpd_ack +ffffffff821f3000 T dal_irq_service_dce120_create ffffffff821f3080 t hpd_ack -ffffffff821f3130 t to_dal_irq_source_dcn10 -ffffffff821f4000 T dal_irq_service_dcn20_create +ffffffff821f4000 T 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ipmi_acpi_parse_crs -ffffffff824e9000 T amdgpio_match -ffffffff824e9060 T amdgpio_attach -ffffffff824e9290 T amdgpio_activate -ffffffff824e9380 T amdgpio_intr -ffffffff824e9520 T amdgpio_read_pin -ffffffff824e9570 T amdgpio_write_pin -ffffffff824e95e0 T amdgpio_intr_establish -ffffffff824e96d0 T amdgpio_intr_enable -ffffffff824e9750 T amdgpio_intr_disable -ffffffff824e97d0 T amdgpio_save -ffffffff824e9850 T amdgpio_restore -ffffffff824e98e0 T amdgpio_save_pin -ffffffff824e9950 T amdgpio_restore_pin -ffffffff824e99c0 T amdgpio_pin_intr -ffffffff824ea000 T acpihid_match -ffffffff824ea020 T acpihid_attach -ffffffff824ea200 T acpihid_init_dsm -ffffffff824ea360 T acpihid_eval -ffffffff824ea580 T acpihid_notify -ffffffff824ea5e0 T acpihid_button_array_enable -ffffffff824eb000 T acpi_match -ffffffff824eb060 T acpi_attach -ffffffff824eb0a0 T acpi_probe -ffffffff824eb240 T acpi_map -ffffffff824eb330 T acpi_unmap -ffffffff824eb370 T acpi_bus_space_map -ffffffff824eb390 T acpi_bus_space_unmap -ffffffff824eb3a0 T acpi_intr_establish -ffffffff824eb4e0 T acpi_intr_disestablish -ffffffff824eb4f0 T acpi_scan -ffffffff824eb6a0 T acpi_acquire_glk -ffffffff824eb700 T acpi_release_glk -ffffffff824eb750 T acpi_attach_machdep -ffffffff824eb8e0 T acpi_sleep_cpu -ffffffff824eba80 T acpi_resume_cpu -ffffffff824ebb70 T sleep_mp -ffffffff824ebc70 T resume_mp -ffffffff824ebd60 T acpi_iommu_device_map -ffffffff824ec000 T hibernate_resume_machdep -ffffffff824ec050 T hibernate_drop_to_real_mode -ffffffff824ec060 T hibernate_activate_resume_pt_machdep -ffffffff824ec0a0 T hibernate_switch_stack_machdep -ffffffff824ec0e0 T hibernate_flush -ffffffff824ec110 T acpi_savecpu -ffffffff824ed000 T sleep_showstate -ffffffff824ed100 T sleep_setstate -ffffffff824ed160 T gosleep -ffffffff824ed220 T sleep_abort -ffffffff824ed250 T sleep_resume -ffffffff824ed2c0 T suspend_finish -ffffffff824ee000 T acpipci_match -ffffffff824ee020 T acpipci_attach -ffffffff824ee2e0 T acpipci_osc -ffffffff824ee420 T acpipci_parse_resources -ffffffff824ee530 T acpipci_attach_bus -ffffffff824ee700 T acpipci_print -ffffffff824ee760 T acpipci_attach_busses -ffffffff824ef000 T efiopen -ffffffff824ef040 T eficlose -ffffffff824ef070 T efiioctl -ffffffff824ef110 T efiioc_get_table -ffffffff824ef270 T efiioc_var_get -ffffffff824ef4e0 T efiioc_var_next -ffffffff824ef700 T efiioc_var_set -ffffffff824ef990 T efi_adapt_error -ffffffff824f0000 T efi_match -ffffffff824f0060 T efi_attach -ffffffff824f0410 T efi_map_runtime -ffffffff824f0590 T efi_enter -ffffffff824f0610 T efi_leave -ffffffff824f0670 T efi_gettime -ffffffff824f0840 T efi_settime -ffffffff824f09a0 T efi_fault -ffffffff824f1000 T vmm_probe -ffffffff824f1050 T vmm_attach -ffffffff824f13e0 T vmm_activate -ffffffff824f15f0 T vmm_enabled -ffffffff824f1680 T vmm_quiesce_vmx -ffffffff824f1850 T vmm_stop -ffffffff824f1990 T vmm_start -ffffffff824f1a70 T vmmopen -ffffffff824f1ac0 T vmmioctl -ffffffff824f1ed0 T vm_create -ffffffff824f2300 T vm_run -ffffffff824f24e0 T vm_get_info -ffffffff824f2730 T vm_terminate -ffffffff824f28a0 T vm_resetcpu -ffffffff824f2a00 T vm_intr_pending -ffffffff824f2ad0 T vm_rwregs -ffffffff824f2c20 T vm_mprotect_ept -ffffffff824f2ec0 T vm_rwvmparams -ffffffff824f3070 T pledge_ioctl_vmm -ffffffff824f3140 T vmmclose -ffffffff824f3170 T vm_find -ffffffff824f3280 T vcpu_reset_regs -ffffffff824f32d0 T vmm_init_pvclock -ffffffff824f33a0 T vcpu_readregs_vmx -ffffffff824f37c0 T vcpu_writeregs_vmx -ffffffff824f3c30 T vcpu_readregs_svm -ffffffff824f40d0 T vcpu_writeregs_svm -ffffffff824f4590 T vmm_get_guest_memtype -ffffffff824f4610 T vmx_mprotect_ept -ffffffff824f4880 T vmx_pmap_find_pte_ept -ffffffff824f4950 T start_vmm_on_cpu -ffffffff824f4a20 T stop_vmm_on_cpu -ffffffff824f4ac0 T vmclear_on_cpu -ffffffff824f4b30 T vm_create_check_mem_ranges -ffffffff824f4c90 T vm_impl_init -ffffffff824f4d30 T vm_teardown -ffffffff824f4ee0 T vcpu_init -ffffffff824f4fb0 T vm_impl_init_vmx -ffffffff824f50d0 T vm_impl_init_svm -ffffffff824f51f0 T vm_impl_deinit_vmx -ffffffff824f5220 T vm_impl_deinit_svm -ffffffff824f5250 T vm_impl_deinit -ffffffff824f52b0 T vcpu_reload_vmcs_vmx -ffffffff824f53e0 T vcpu_reset_regs_svm -ffffffff824f5780 T svm_setmsrbrw -ffffffff824f58f0 T svm_setmsrbr -ffffffff824f59c0 T vmm_alloc_vpid -ffffffff824f5ad0 T svm_setmsrbw -ffffffff824f5ba0 T vmx_setmsrbr -ffffffff824f5c50 T vmx_setmsrbw -ffffffff824f5d00 T vmx_setmsrbrw -ffffffff824f5e00 T svm_set_clean -ffffffff824f5e50 T svm_set_dirty -ffffffff824f5ea0 T vcpu_reset_regs_vmx -ffffffff824f69f0 T vcpu_vmx_check_cap -ffffffff824f6af0 T vcpu_vmx_compute_ctrl -ffffffff824f6cd0 T vcpu_init_vmx -ffffffff824f7070 T vcpu_deinit_vmx -ffffffff824f71f0 T vcpu_init_svm -ffffffff824f7370 T vcpu_deinit_svm -ffffffff824f74b0 T vmm_free_vpid -ffffffff824f7510 T vcpu_deinit -ffffffff824f7560 T vcpu_run_vmx -ffffffff824f7d70 T vcpu_run_svm -ffffffff824f8350 T vcpu_must_stop -ffffffff824f83b0 T vmm_fpurestore -ffffffff824f8480 T vmm_fpusave -ffffffff824f8500 T vmm_translate_gva -ffffffff824f8830 T vmm_update_pvclock -ffffffff824f8930 T vmx_get_exit_info -ffffffff824f8990 T vmx_handle_exit -ffffffff824f8d80 T vmx_instruction_error_decode -ffffffff824f8f50 T vmm_get_guest_cpu_cpl -ffffffff824f9000 T vmx_handle_intr -ffffffff824f9090 T svm_handle_hlt -ffffffff824f90e0 T vmx_handle_hlt -ffffffff824f9190 T svm_handle_exit -ffffffff824f9460 T svm_handle_np_fault -ffffffff824f9600 T vmm_handle_cpuid -ffffffff824f9c70 T svm_handle_msr -ffffffff824f9f20 T svm_handle_xsetbv -ffffffff824f9f70 T svm_handle_inout -ffffffff824fa080 T vmm_inject_ud -ffffffff824fa0b0 T vmm_inject_db -ffffffff824fa0e0 T vmx_handle_np_fault -ffffffff824fa250 T vmx_handle_inout -ffffffff824fa3f0 T vmx_handle_cr -ffffffff824fa660 T vmx_handle_rdmsr -ffffffff824fa730 T vmx_handle_wrmsr -ffffffff824fa980 T vmx_handle_xsetbv -ffffffff824faa10 T vmm_inject_gp -ffffffff824faa40 T vmx_get_exit_qualification -ffffffff824faaa0 T vmx_get_guest_faulttype -ffffffff824fab40 T svm_get_guest_faulttype -ffffffff824fab70 T svm_fault_page -ffffffff824fabf0 T vmx_fault_page -ffffffff824fad50 T vmm_get_guest_cpu_mode -ffffffff824fae50 T vmx_load_pdptes -ffffffff824fb0d0 T vmx_handle_cr0_write -ffffffff824fb2d0 T vmx_handle_cr4_write -ffffffff824fb370 T vmm_handle_xsetbv -ffffffff824fb450 T vmx_handle_misc_enable_msr -ffffffff824fb4b0 T vmm_pat_is_valid -ffffffff824fb590 T vmm_gpa_is_valid -ffffffff824fb600 T vmx_exit_reason_decode -ffffffff824fb640 T svm_exit_reason_decode -ffffffff824fc450 T vcpu_state_decode -ffffffff824fd000 T vmm_dispatch_intr -ffffffff824fd019 T vmxon -ffffffff824fd049 T vmxoff -ffffffff824fd079 T vmclear -ffffffff824fd0a9 T vmptrld -ffffffff824fd0d9 T vmptrst -ffffffff824fd109 T vmwrite -ffffffff824fd139 T vmread -ffffffff824fd169 T invvpid -ffffffff824fd199 T invept -ffffffff824fd1c9 T vmx_enter_guest -ffffffff824fd1f0 t skip_init -ffffffff824fd2bd t no_l1df_msr -ffffffff824fd2c0 t l1df_tlb_loop -ffffffff824fd2d9 t l1df_tlb_done -ffffffff824fd2e1 t l1df_load_cache -ffffffff824fd2f8 t done_flush -ffffffff824fd38b t do_resume -ffffffff824fd410 t fail_launch_or_resume -ffffffff824fd44d t fail_launch_unknown -ffffffff824fd45a t fail_launch_invalid_vmcs -ffffffff824fd467 t fail_launch_valid_vmcs -ffffffff824fd484 t vmx_exit_handler_asm -ffffffff824fd549 t restore_host -ffffffff824fd5e9 T svm_enter_guest -ffffffff824fd775 t restore_host_svm -ffffffff824fe000 T sdmmc_match -ffffffff824fe050 T sdmmc_attach -ffffffff824fe380 T sdmmc_detach -ffffffff824fe430 T sdmmc_activate -ffffffff824fe500 T sdmmc_discover_task -ffffffff824fe5c0 T sdmmc_create_thread -ffffffff824fe630 T sdmmc_holds_root_device -ffffffff824fe680 T sdmmc_task_thread -ffffffff824fe870 T sdmmc_needs_discover -ffffffff824fe920 T sdmmc_del_task -ffffffff824fe9d0 T sdmmc_card_detach -ffffffff824feab0 T sdmmc_add_task -ffffffff824feb30 T sdmmc_card_attach -ffffffff824fec40 T sdmmc_enable -ffffffff824fed90 T sdmmc_scan -ffffffff824fee10 T sdmmc_init -ffffffff824fef10 T sdmmc_disable -ffffffff824ff070 T sdmmc_function_free -ffffffff824ff090 T sdmmc_delay -ffffffff824ff0e0 T sdmmc_select_card -ffffffff824ff260 T sdmmc_set_bus_power -ffffffff824ff420 T sdmmc_function_alloc -ffffffff824ff4a0 T sdmmc_app_command -ffffffff824ff630 T sdmmc_mmc_command -ffffffff824ff6b0 T sdmmc_go_idle_state -ffffffff824ff7c0 T sdmmc_send_if_cond -ffffffff824ff910 T sdmmc_set_relative_addr -ffffffff82500000 T sdmmc_cisptr -ffffffff825000a0 T sdmmc_read_cis -ffffffff825003a0 T sdmmc_print_cis -ffffffff82500510 T sdmmc_check_cis_quirks -ffffffff82501000 T sdmmc_io_enable -ffffffff825012a0 T sdmmc_io_reset -ffffffff825013c0 T sdmmc_io_send_op_cond -ffffffff82501530 T sdmmc_io_scan -ffffffff82501680 T sdmmc_io_init -ffffffff825017a0 T sdmmc_io_set_highspeed -ffffffff82501a40 T sdmmc_io_set_bus_width -ffffffff82501cd0 T sdmmc_io_function_ready -ffffffff82501e40 T sdmmc_io_read_1 -ffffffff82501f90 T sdmmc_io_function_enable -ffffffff82502360 T sdmmc_io_write_1 -ffffffff825024e0 T sdmmc_io_function_disable -ffffffff82502760 T sdmmc_io_attach -ffffffff82502840 T sdmmc_print -ffffffff82502a90 T sdmmc_submatch -ffffffff82502b10 T sdmmc_io_detach -ffffffff82502bb0 T sdmmc_io_rw_direct -ffffffff82502d50 T sdmmc_io_rw_extended_subr -ffffffff82502ef0 T sdmmc_io_rw_extended -ffffffff825032e0 T sdmmc_io_read_2 -ffffffff82503430 T sdmmc_io_write_2 -ffffffff82503590 T sdmmc_io_read_4 -ffffffff825036e0 T sdmmc_io_write_4 -ffffffff82503840 T sdmmc_io_read_multi_1 -ffffffff82503930 T sdmmc_io_write_multi_1 -ffffffff82503a20 T sdmmc_io_read_region_1 -ffffffff82503b10 T sdmmc_io_write_region_1 -ffffffff82503c00 T sdmmc_io_xchg -ffffffff82503d90 T sdmmc_intr_enable -ffffffff82504000 T sdmmc_intr_disable -ffffffff82504270 T sdmmc_intr_establish -ffffffff82504370 T sdmmc_intr_disestablish -ffffffff82504450 T sdmmc_card_intr -ffffffff825044a0 T sdmmc_intr_task -ffffffff82504530 T sdmmc_io_set_blocklen -ffffffff82505000 T sdmmc_mem_enable -ffffffff825054e0 T sdmmc_mem_send_op_cond -ffffffff82505690 T sdmmc_mem_signal_voltage -ffffffff82505750 T sdmmc_mem_scan -ffffffff82505a50 T sdmmc_decode_csd -ffffffff82505e50 T sdmmc_decode_cid -ffffffff82506290 T sdmmc_mem_send_scr -ffffffff825063d0 T sdmmc_mem_decode_scr -ffffffff82506440 T sdmmc_mem_send_cxd_data -ffffffff825065b0 T sdmmc_mem_set_bus_width -ffffffff825066c0 T sdmmc_mem_sd_switch -ffffffff82506970 T sdmmc_be512_to_bitfield512 -ffffffff82506a20 T sdmmc_mem_mmc_switch -ffffffff82506b10 T sdmmc_mem_init -ffffffff82506c60 T sdmmc_mem_set_blocklen -ffffffff82506d60 T sdmmc_mem_sd_init -ffffffff82507310 T sdmmc_mem_mmc_init -ffffffff82507c30 T sdmmc_mem_select_transfer_mode -ffffffff82507cb0 T sdmmc_mem_execute_tuning -ffffffff82507d40 T sdmmc_mem_read_block_subr -ffffffff825080a0 T sdmmc_mem_single_read_block -ffffffff82508160 T sdmmc_mem_read_block -ffffffff82508320 T sdmmc_mem_write_block_subr -ffffffff82508670 T sdmmc_mem_single_write_block -ffffffff82508730 T sdmmc_mem_write_block -ffffffff825088f0 T sdmmc_mem_hibernate_write -ffffffff82509000 T sdmmc_scsi_cmd -ffffffff825091f0 T sdmmc_minphys -ffffffff82509260 T sdmmc_scsi_attach -ffffffff82509450 T sdmmc_alloc_ccbs -ffffffff82509590 T sdmmc_free_ccbs -ffffffff825095f0 T sdmmc_scsi_detach -ffffffff82509740 T sdmmc_stimeout -ffffffff825097c0 T sdmmc_ccb_alloc -ffffffff82509870 T sdmmc_ccb_free -ffffffff82509950 T sdmmc_inquiry -ffffffff82509b70 T sdmmc_start_xs -ffffffff82509c60 T sdmmc_complete_xs -ffffffff82509d20 T sdmmc_done_xs -ffffffff82509d60 T sdmmc_scsi_hibernate_io -ffffffff8250a000 T bwfm_sdio_preinit -ffffffff8250a4f0 T bwfm_sdio_txcheck -ffffffff8250a530 T bwfm_sdio_txdata -ffffffff8250a5a0 T bwfm_sdio_txctl -ffffffff8250a6f0 T bwfm_sdio_buscore_read -ffffffff8250a700 T bwfm_sdio_buscore_write -ffffffff8250a710 T bwfm_sdio_buscore_prepare -ffffffff8250a840 T bwfm_sdio_buscore_activate -ffffffff8250a8c0 T bwfm_sdio_match -ffffffff8250a980 T bwfm_sdio_attach -ffffffff8250ac40 T bwfm_sdio_detach -ffffffff8250aca0 T bwfm_sdio_task -ffffffff8250adf0 T bwfm_sdio_write_1 -ffffffff8250ae20 T bwfm_sdio_read_1 -ffffffff8250ae50 T bwfm_sdio_write_4 -ffffffff8250af00 T bwfm_sdio_read_4 -ffffffff8250afa0 T bwfm_sdio_load_microcode -ffffffff8250b200 T bwfm_sdio_clkctl -ffffffff8250b330 T bwfm_sdio_dev_write -ffffffff8250b370 T bwfm_sdio_intr -ffffffff8250b3b0 T bwfm_sdio_ram_read_write -ffffffff8250b5e0 T bwfm_sdio_htclk -ffffffff8250b840 T bwfm_sdio_readshared -ffffffff8250b900 T bwfm_sdio_dev_read -ffffffff8250b930 T bwfm_sdio_rx_frames -ffffffff8250bcc0 T bwfm_sdio_tx_frames -ffffffff8250bda0 T bwfm_sdio_backplane -ffffffff8250be50 T bwfm_sdio_buf_read -ffffffff8250bf20 T bwfm_sdio_buf_write -ffffffff8250bfd0 T bwfm_sdio_frame_read_write -ffffffff8250c150 T bwfm_sdio_newbuf -ffffffff8250c1d0 T bwfm_sdio_tx_ok -ffffffff8250c220 T bwfm_sdio_tx_ctrlframe -ffffffff8250c320 T bwfm_sdio_tx_dataframe -ffffffff8250c470 T bwfm_sdio_rx_glom -ffffffff8250d000 T onewire_match -ffffffff8250d050 T onewire_attach -ffffffff8250d0f0 T onewire_detach -ffffffff8250d160 T onewire_activate -ffffffff8250d180 T onewire_scan -ffffffff8250d390 T onewire_createthread -ffffffff8250d3f0 T onewire_print -ffffffff8250d4c0 T onewirebus_print -ffffffff8250d510 T onewire_lock -ffffffff8250d530 T onewire_unlock -ffffffff8250d540 T onewire_reset -ffffffff8250d560 T onewire_bit -ffffffff8250d580 T onewire_read_byte -ffffffff8250d6c0 T onewire_write_byte -ffffffff8250d790 T onewire_read_block -ffffffff8250d830 T onewire_write_block -ffffffff8250d8d0 T onewire_triplet -ffffffff8250d9b0 T onewire_matchrom -ffffffff8250db00 T onewire_search -ffffffff8250de90 T onewire_thread -ffffffff8250e000 T onewire_crc -ffffffff8250e0e0 T onewire_crc16 -ffffffff8250e1c0 T onewire_famname -ffffffff8250e200 T onewire_matchbyfam -ffffffff8250f000 T owid_match -ffffffff8250f020 T owid_attach -ffffffff8250f0f0 T owid_detach -ffffffff8250f130 T owid_activate -ffffffff82510000 T owsbm_match -ffffffff82510020 T owsbm_attach -ffffffff825101c0 T owsbm_detach -ffffffff82510230 T owsbm_activate -ffffffff82510260 T owsbm_update -ffffffff82511000 T owtemp_match -ffffffff82511020 T owtemp_attach -ffffffff82511110 T owtemp_detach -ffffffff82511180 T owtemp_activate -ffffffff825111b0 T owtemp_update -ffffffff82512000 T owctr_match -ffffffff82512020 T owctr_attach -ffffffff82512160 T owctr_detach -ffffffff825121d0 T owctr_activate -ffffffff82512200 T owctr_update -ffffffff82512230 T owctr_update_counter -ffffffff82513000 A __text_page_start -ffffffff82513000 T Xsyscall_meltdown -ffffffff8251300c T Xsyscall -ffffffff8251326e t Xsyscall_trampback -ffffffff82513280 T intr_user_exit -ffffffff825132c2 t intr_user_exit_post_ast -ffffffff825133ee t Xiretq_trampback -ffffffff825133fa T doreti_iret -ffffffff82514000 T alltraps -ffffffff82514138 T recall_trap -ffffffff82514150 T alltraps_kern -ffffffff82514153 T alltraps_kern_meltdown -ffffffff82515000 ? Xsyscall32 -ffffffff82515000 A __kutext_start -ffffffff82515000 A __text_page_end -ffffffff82516000 ? Xtrap00 -ffffffff82516010 ? Xtrap01 -ffffffff82516020 ? Xtrap02 -ffffffff82516024 c calltrap_specstk -ffffffff825160f0 ? calltrap_specstk_tramp -ffffffff82516110 ? Xtrap03 -ffffffff82516120 ? Xtrap04 -ffffffff82516130 ? Xtrap05 -ffffffff82516140 ? Xtrap06 -ffffffff82516150 ? Xtrap07 -ffffffff82516160 ? Xtrap08 -ffffffff82516170 ? Xtrap09 -ffffffff82516180 ? Xtrap0a -ffffffff82516190 ? Xtrap0b -ffffffff825161a0 ? Xtrap0c -ffffffff825161b0 ? Xtrap0d -ffffffff82516230 ? Xtrap0e -ffffffff82516240 ? Xintrspurious -ffffffff82516240 ? Xtrap0f -ffffffff82516250 ? Xtrap10 -ffffffff82516260 ? Xtrap11 -ffffffff82516270 ? Xtrap12 -ffffffff82516280 ? Xtrap13 -ffffffff82516290 ? Xtrap14 -ffffffff82516290 ? Xtrap15 -ffffffff82516290 ? Xtrap16 -ffffffff82516290 ? Xtrap17 -ffffffff82516290 ? Xtrap18 -ffffffff82516290 ? Xtrap19 -ffffffff82516290 ? Xtrap1a -ffffffff82516290 ? Xtrap1b -ffffffff82516290 ? Xtrap1c -ffffffff82516290 ? Xtrap1d -ffffffff82516290 ? Xtrap1e -ffffffff82516290 ? Xtrap1f -ffffffff825162a0 ? x2apic_eoi -ffffffff825162c0 ? Xintr_lapic_ipi -ffffffff825162f0 ? Xipi_invltlb -ffffffff82516310 ? Xipi_invlpg -ffffffff82516340 ? Xipi_invlrange -ffffffff82516380 ? Xipi_invltlb_pcid -ffffffff825163c0 ? Xipi_invlpg_pcid -ffffffff82516410 ? Xipi_invlrange_pcid -ffffffff82516480 ? Xintr_lapic_ltimer -ffffffff825164b0 ? Xintr_xen_upcall -ffffffff825164e0 ? Xintr_hyperv_upcall -ffffffff82516510 ? Xintr_legacy0 -ffffffff82516540 ? Xintr_legacy1 -ffffffff82516570 ? Xintr_legacy2 -ffffffff825165a0 ? Xintr_legacy3 -ffffffff825165d0 ? Xintr_legacy4 -ffffffff82516600 ? Xintr_legacy5 -ffffffff82516630 ? Xintr_legacy6 -ffffffff82516660 ? Xintr_legacy7 -ffffffff82516690 ? Xintr_legacy8 -ffffffff825166c0 ? Xintr_legacy9 -ffffffff825166f0 ? Xintr_legacy10 -ffffffff82516720 ? Xintr_legacy11 -ffffffff82516750 ? Xintr_legacy12 -ffffffff82516780 ? Xintr_legacy13 -ffffffff825167b0 ? Xintr_legacy14 -ffffffff825167e0 ? Xintr_legacy15 -ffffffff82516810 ? Xintr_ioapic_edge0 -ffffffff82516840 ? Xintr_ioapic_edge1 -ffffffff82516870 ? Xintr_ioapic_edge2 -ffffffff825168a0 ? Xintr_ioapic_edge3 -ffffffff825168d0 ? Xintr_ioapic_edge4 -ffffffff82516900 ? Xintr_ioapic_edge5 -ffffffff82516930 ? Xintr_ioapic_edge6 -ffffffff82516960 ? Xintr_ioapic_edge7 -ffffffff82516990 ? Xintr_ioapic_edge8 -ffffffff825169c0 ? Xintr_ioapic_edge9 -ffffffff825169f0 ? Xintr_ioapic_edge10 -ffffffff82516a20 ? Xintr_ioapic_edge11 -ffffffff82516a50 ? Xintr_ioapic_edge12 -ffffffff82516a80 ? Xintr_ioapic_edge13 -ffffffff82516ab0 ? Xintr_ioapic_edge14 -ffffffff82516ae0 ? Xintr_ioapic_edge15 -ffffffff82516b10 ? Xintr_ioapic_edge16 -ffffffff82516b40 ? Xintr_ioapic_edge17 -ffffffff82516b70 ? Xintr_ioapic_edge18 -ffffffff82516ba0 ? Xintr_ioapic_edge19 -ffffffff82516bd0 ? Xintr_ioapic_edge20 -ffffffff82516c00 ? Xintr_ioapic_edge21 -ffffffff82516c30 ? Xintr_ioapic_edge22 -ffffffff82516c60 ? Xintr_ioapic_edge23 -ffffffff82516c90 ? Xintr_ioapic_edge24 -ffffffff82516cc0 ? Xintr_ioapic_edge25 -ffffffff82516cf0 ? Xintr_ioapic_edge26 -ffffffff82516d20 ? Xintr_ioapic_edge27 -ffffffff82516d50 ? Xintr_ioapic_edge28 -ffffffff82516d80 ? Xintr_ioapic_edge29 -ffffffff82516db0 ? Xintr_ioapic_edge30 -ffffffff82516de0 ? Xintr_ioapic_edge31 -ffffffff82516e10 ? Xintr_ioapic_edge32 -ffffffff82516e40 ? Xintr_ioapic_edge33 -ffffffff82516e70 ? Xintr_ioapic_edge34 -ffffffff82516ea0 ? Xintr_ioapic_edge35 -ffffffff82516ed0 ? Xintr_ioapic_edge36 -ffffffff82516f00 ? Xintr_ioapic_edge37 -ffffffff82516f30 ? Xintr_ioapic_edge38 -ffffffff82516f60 ? Xintr_ioapic_edge39 -ffffffff82516f90 ? Xintr_ioapic_edge40 -ffffffff82516fc0 ? Xintr_ioapic_edge41 -ffffffff82516ff0 ? Xintr_ioapic_edge42 -ffffffff82517020 ? Xintr_ioapic_edge43 -ffffffff82517050 ? Xintr_ioapic_edge44 -ffffffff82517080 ? Xintr_ioapic_edge45 -ffffffff825170b0 ? Xintr_ioapic_edge46 -ffffffff825170e0 ? Xintr_ioapic_edge47 -ffffffff82517110 ? Xintr_ioapic_edge48 -ffffffff82517140 ? Xintr_ioapic_edge49 -ffffffff82517170 ? Xintr_ioapic_edge50 -ffffffff825171a0 ? Xintr_ioapic_edge51 -ffffffff825171d0 ? Xintr_ioapic_edge52 -ffffffff82517200 ? Xintr_ioapic_edge53 -ffffffff82517230 ? Xintr_ioapic_edge54 -ffffffff82517260 ? Xintr_ioapic_edge55 -ffffffff82517290 ? Xintr_ioapic_edge56 -ffffffff825172c0 ? Xintr_ioapic_edge57 -ffffffff825172f0 ? Xintr_ioapic_edge58 -ffffffff82517320 ? Xintr_ioapic_edge59 -ffffffff82517350 ? Xintr_ioapic_edge60 -ffffffff82517380 ? Xintr_ioapic_edge61 -ffffffff825173b0 ? Xintr_ioapic_edge62 -ffffffff825173e0 ? Xintr_ioapic_edge63 -ffffffff82517410 ? Xintr_ioapic_level0 -ffffffff82517440 ? Xintr_ioapic_level1 -ffffffff82517470 ? Xintr_ioapic_level2 -ffffffff825174a0 ? Xintr_ioapic_level3 -ffffffff825174d0 ? Xintr_ioapic_level4 -ffffffff82517500 ? Xintr_ioapic_level5 -ffffffff82517530 ? Xintr_ioapic_level6 -ffffffff82517560 ? Xintr_ioapic_level7 -ffffffff82517590 ? Xintr_ioapic_level8 -ffffffff825175c0 ? Xintr_ioapic_level9 -ffffffff825175f0 ? Xintr_ioapic_level10 -ffffffff82517620 ? Xintr_ioapic_level11 -ffffffff82517650 ? Xintr_ioapic_level12 -ffffffff82517680 ? Xintr_ioapic_level13 -ffffffff825176b0 ? Xintr_ioapic_level14 -ffffffff825176e0 ? Xintr_ioapic_level15 -ffffffff82517710 ? Xintr_ioapic_level16 -ffffffff82517740 ? Xintr_ioapic_level17 -ffffffff82517770 ? Xintr_ioapic_level18 -ffffffff825177a0 ? Xintr_ioapic_level19 -ffffffff825177d0 ? Xintr_ioapic_level20 -ffffffff82517800 ? Xintr_ioapic_level21 -ffffffff82517830 ? Xintr_ioapic_level22 -ffffffff82517860 ? Xintr_ioapic_level23 -ffffffff82517890 ? Xintr_ioapic_level24 -ffffffff825178c0 ? Xintr_ioapic_level25 -ffffffff825178f0 ? Xintr_ioapic_level26 -ffffffff82517920 ? Xintr_ioapic_level27 -ffffffff82517950 ? Xintr_ioapic_level28 -ffffffff82517980 ? Xintr_ioapic_level29 -ffffffff825179b0 ? Xintr_ioapic_level30 -ffffffff825179e0 ? Xintr_ioapic_level31 -ffffffff82517a10 ? Xintr_ioapic_level32 -ffffffff82517a40 ? Xintr_ioapic_level33 -ffffffff82517a70 ? Xintr_ioapic_level34 -ffffffff82517aa0 ? Xintr_ioapic_level35 -ffffffff82517ad0 ? Xintr_ioapic_level36 -ffffffff82517b00 ? Xintr_ioapic_level37 -ffffffff82517b30 ? Xintr_ioapic_level38 -ffffffff82517b60 ? Xintr_ioapic_level39 -ffffffff82517b90 ? Xintr_ioapic_level40 -ffffffff82517bc0 ? Xintr_ioapic_level41 -ffffffff82517bf0 ? Xintr_ioapic_level42 -ffffffff82517c20 ? Xintr_ioapic_level43 -ffffffff82517c50 ? Xintr_ioapic_level44 -ffffffff82517c80 ? Xintr_ioapic_level45 -ffffffff82517cb0 ? Xintr_ioapic_level46 -ffffffff82517ce0 ? Xintr_ioapic_level47 -ffffffff82517d10 ? Xintr_ioapic_level48 -ffffffff82517d40 ? Xintr_ioapic_level49 -ffffffff82517d70 ? Xintr_ioapic_level50 -ffffffff82517da0 ? Xintr_ioapic_level51 -ffffffff82517dd0 ? Xintr_ioapic_level52 -ffffffff82517e00 ? Xintr_ioapic_level53 -ffffffff82517e30 ? Xintr_ioapic_level54 -ffffffff82517e60 ? Xintr_ioapic_level55 -ffffffff82517e90 ? Xintr_ioapic_level56 -ffffffff82517ec0 ? Xintr_ioapic_level57 -ffffffff82517ef0 ? Xintr_ioapic_level58 -ffffffff82517f20 ? Xintr_ioapic_level59 -ffffffff82517f50 ? Xintr_ioapic_level60 -ffffffff82517f80 ? Xintr_ioapic_level61 -ffffffff82517fb0 ? Xintr_ioapic_level62 -ffffffff82517fe0 ? Xintr_ioapic_level63 -ffffffff82519000 ? codepatch_fill_nop -ffffffff82519000 A __cptext_start -ffffffff82519000 A __kutext_end -ffffffff825190b0 ? codepatch_maprw -ffffffff82519190 ? codepatch_unmaprw -ffffffff825191f0 ? codepatch_nop -ffffffff82519340 ? codepatch_replace -ffffffff825194e0 ? codepatch_call -ffffffff82519500 ? codepatch_jmp -ffffffff8251a000 A __cptext_end -ffffffff8251a000 A __rodata_start -ffffffff8251a000 C _etext -ffffffff8251a000 C etext -ffffffff8251b000 r seeprom_read -ffffffff8251b004 r icl_mg_pll_find_divisors.div1_vals -ffffffff8251b028 r gen9bc_tgp_ddc_pin_map -ffffffff8251b038 r athn_ac2qid -ffffffff8251b038 r athn_ac2qid -ffffffff8251b038 r athn_ac2qid -ffffffff8251b044 r rtwn_get_rssi.cckoff -ffffffff8251b06c r rsu_ac2qid -ffffffff8251b07c r pckbc_portcmd -ffffffff8251b080 r tht_fifo_write_pad.pad -ffffffff8251b088 r rsu_get_rssi.cckoff -ffffffff8251b09c r adlp_n_revids -ffffffff8251b0ec r apple_iso_trans -ffffffff8251b0f0 r dg2_g12_revid_step_tbl -ffffffff8251b0f8 r wihap_check_tx.txratetable -ffffffff8251b0fc r dmamode -ffffffff8251b124 r gen9_edram_size_mb.sets -ffffffff8251c000 r isomappings -ffffffff8251c080 r unimappings -ffffffff8251c230 r replacements -ffffffff8251faff r cmd0646_9_tim_udma -ffffffff825730ab r pp_r600_decoded_lanes -ffffffff8258e30e r cmd680_setup_channel.udma_tbl -ffffffff82595ef5 r apollo_udma33_tim -ffffffff8259bf98 r substchar -ffffffff8259e03e r apollo_udma100_tim -ffffffff825c587b r apollo_udma66_tim -ffffffff825ccca3 r apollo_pio_rec -ffffffff825dbf46 r cy_pio_rec -ffffffff8260b259 r apollo_udma133_tim -ffffffff82617d28 R drm_ca -ffffffff82617d50 R drm_filtops -ffffffff82617d80 R drmread_filtops -ffffffff82618000 r vga_emulops -ffffffff82618048 R vga_stdscreen -ffffffff82618078 R vga_stdscreen_mono -ffffffff826180a8 R vga_stdscreen_bf -ffffffff826180d8 R vga_40lscreen -ffffffff82618108 R vga_40lscreen_mono -ffffffff82618138 R vga_40lscreen_bf -ffffffff82618168 R vga_50lscreen -ffffffff82618198 R vga_50lscreen_mono -ffffffff826181c8 R vga_50lscreen_bf -ffffffff826181f8 R vga_screenlist -ffffffff82618208 R vga_screenlist_mono -ffffffff82618218 R vga_accessops -ffffffff82618278 r i945_wm_info -ffffffff826182b0 r bgansitopc -ffffffff826182b8 r pctoansi -ffffffff826182f8 r sdma_offsets -ffffffff826182f8 r sdma_offsets -ffffffff82618328 r iha_rate_tbl -ffffffff82618360 r i830_a_wm_info -ffffffff82618398 r gen9_edram_size_mb.ways -ffffffff82618400 r aggr_periodic_times -ffffffff82618480 r jsl_ehl_revids -ffffffff826184f8 r michael_final.pad -ffffffff82618520 r rt_copysa.maskarray -ffffffff82618528 r i915_wm_info -ffffffff82618530 r amdgpu_ih_clientid_jpeg -ffffffff82618530 r amdgpu_ih_clientid_uvds -ffffffff82618530 r amdgpu_ih_clientid_vcns -ffffffff82618530 r amdgpu_ih_clientid_vcns -ffffffff82618530 r amdgpu_ih_clientid_vcns -ffffffff82618568 r vga_setfontset.cmaptabb -ffffffff82618580 r tgl_revids -ffffffff826185d8 r i830_bc_wm_info -ffffffff82618680 r __drm_universal_plane_init.default_modifiers -ffffffff82618690 r iwn_tid2fifo -ffffffff826186a8 r vga_setfontset.cmaptaba -ffffffff826186b0 r crtc_offsets -ffffffff826186b0 r crtc_offsets -ffffffff826186b0 r crtc_offsets -ffffffff826186d0 r link_speed -ffffffff826186d0 r link_speed -ffffffff826186d0 r link_speed -ffffffff82618748 r rtwn_r88e_get_rssi.cckoff -ffffffff82619000 R edid_vendors -ffffffff826192c0 R edid_nvendors -ffffffff826192d0 R edid_products -ffffffff82619330 R edid_nproducts -ffffffff82619340 r _edid_modes -ffffffff8261a000 R videomode_list -ffffffff8261b080 R videomode_count -ffffffff8261c000 r ahc_hard_errors -ffffffff8261c080 r critical_sections -ffffffff8261c0b0 r patches -ffffffff8261cd50 r seqprog -ffffffff8261e000 r ahc_switch -ffffffff8261f000 r termstat_strings -ffffffff8261f020 r critical_sections -ffffffff8261f060 r seqprog -ffffffff8261fd50 r patches -ffffffff82621000 r ahd_switch -ffffffff82622000 R aic_switch -ffffffff82623000 R adw_switch -ffffffff82624000 R gdt_switch -ffffffff82625000 R twe_switch -ffffffff82626000 R ciss_switch -ffffffff82626030 R ciss_level -ffffffff82626050 R ciss_stat -ffffffff82627000 R ami_switch -ffffffff82627028 R ami_raw_switch -ffffffff82628000 R mfi_switch -ffffffff82628028 R mfi_pd_switch -ffffffff82628050 r mfi_iop_xscale -ffffffff82628080 r mfi_iop_ppc -ffffffff826280b0 r mfi_iop_gen2 -ffffffff826280e0 r mfi_iop_skinny -ffffffff82628110 r mfi_bbu_indicators -ffffffff826281c0 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs -ffffffff826281f0 r chv_oa_mux_regs -ffffffff82628210 r fiji_clock_stretcher_lookup_table -ffffffff82628210 r tonga_clock_stretcher_lookup_table -ffffffff82628240 r link_speed -ffffffff82628240 r link_speed -ffffffff82628240 r link_speed -ffffffff82628280 r drm_fb_xfrm.default_dst_pitch -ffffffff82628280 r non_supported_protection -ffffffff82628380 r tgl_uy_revids -ffffffff826283d0 r bwi_phy_noise_11g_rev1 -ffffffff82628450 r cardslot_process_event.antonym_ev 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-ffffffff82669430 r qla_regs_2100 -ffffffff82669460 r qla_regs_2200 -ffffffff82669490 r qla_regs_23XX -ffffffff8266a000 R ahci_atascsi_methods -ffffffff8266b000 R nvme_switch -ffffffff8266b028 r nvme_ops -ffffffff8266c000 R mpi_switch -ffffffff8266c100 r intel_hpll_vco.elk_vco -ffffffff8266c160 r pin_offsets -ffffffff8266c1c0 r firmware_list -ffffffff8266c220 r atom_arg_shift -ffffffff8266c220 r atom_arg_shift -ffffffff8266c260 r pf_syncookie_wstab -ffffffff8266c280 r ieee80211_media_init.mopts -ffffffff8266c2e0 r add_entropy_words.twist_table -ffffffff8266c380 r urtw_8225v2_txpwr_cck -ffffffff8266c3c0 r bwfm_pci_prio2fifo -ffffffff8266c3c0 r ieee80211_up_to_ac.up_to_ac -ffffffff8266c480 r paritytab -ffffffff8266c480 r x86emu_parity_tab -ffffffff8266c4a0 r legacy_connector_convert -ffffffff8266c4e0 r gen7_oa_mux_regs -ffffffff8266c500 r hsw_oa_mux_regs -ffffffff8266c520 r notetab -ffffffff8266c540 r urtw_8225v2_txpwr_cck_ch14 -ffffffff8266c560 r bwi_rf_calibval.rf_calibvals -ffffffff8266c600 r pf_syncookie_msstab -ffffffff8266c660 r xgmi3x16_pcs_err_status_reg_aldebaran -ffffffff8266c6c0 r uath_wme_init.uath_wme_11g -ffffffff8266c6e0 r gen7_oa_b_counters -ffffffff8266c840 r icl_revids -ffffffff8266c900 r rtwn_iq_calib_run.reg_adda -ffffffff8266c940 r atom_def_dst -ffffffff8266c940 r atom_def_dst -ffffffff8266c980 r sha256_initial_hash_value -ffffffff8266c9e0 r otus_edca_def -ffffffff8266ca00 r intel_hpll_vco.blb_vco -ffffffff8266cac0 r epic_pci_subsys_info -ffffffff8266cae0 r atom_arg_mask -ffffffff8266cae0 r atom_arg_mask -ffffffff8266cb40 r butmap -ffffffff8266cb80 r GFX_RLC_SRM_INDEX_CNTL_DATA_OFFSETS -ffffffff8266cbc0 r comsoft.lsrmap -ffffffff8266cc00 r tulip_mii_phy_readspecific.table -ffffffff8266cc20 r kbl_revids -ffffffff8266cce0 r intel_hpll_vco.pnv_vco -ffffffff8266cd40 r dmapageport -ffffffff8266ce00 r intel_hpll_vco.ctg_vco -ffffffff8266cec0 r drm_calculate_luminance_range.pre_computed_values -ffffffff8266d000 R sili_atascsi_methods -ffffffff8266e000 R ncr53c9x_switch -ffffffff8266f000 r scf_period -ffffffff82670000 R siop_script -ffffffff826705a0 R lun_switch -ffffffff826705d0 R tag_switch -ffffffff82670660 R load_dsa -ffffffff826706c4 R siop_led_on -ffffffff826706cc R siop_led_off -ffffffff826706d8 R siop_switch -ffffffff82671000 R ep_vortex_media -ffffffff82671100 R ep_default_to_media -ffffffff82672000 R wi_card_ident -ffffffff82674000 R ucode_table -ffffffff82675000 r re_revisions -ffffffff82675290 r re_kstats_tpl -ffffffff82677000 R smc91cxx_media -ffffffff82677010 R smc91cxx_mii_bitbang_ops -ffffffff82678000 R dl10019_mii_bitbang_ops -ffffffff82678028 R dl10022_mii_bitbang_ops -ffffffff82679000 R ax88190_mii_bitbang_ops -ffffffff8267b000 R ac97_audio_default -ffffffff8267b020 R ac97_on_off -ffffffff8267b324 R ac97_mic_select -ffffffff8267b628 R ac97_mono_select -ffffffff8267b92c R ac97_source -ffffffff8267bc30 R ac97_volume_stereo -ffffffff8267bc4c R ac97_volume_mono -ffffffff8267bc70 R source_info -ffffffff8267c470 R ac97_ad -ffffffff8267c580 R ac97_ak -ffffffff8267c610 R ac97_av -ffffffff8267c750 R ac97_rl -ffffffff8267c7a0 R ac97_cm -ffffffff8267c820 R ac97_cr -ffffffff8267c840 R ac97_cs -ffffffff8267c920 R ac97_cx -ffffffff8267c980 R ac97_dt -ffffffff8267c9a0 R ac97_em -ffffffff8267c9d0 R ac97_es -ffffffff8267c9f0 R ac97_is -ffffffff8267ca10 R ac97_ic -ffffffff8267ca90 R ac97_it -ffffffff8267cac0 R ac97_ns -ffffffff8267cb80 R ac97_ps -ffffffff8267cbb0 R ac97_sl -ffffffff8267cbd0 R ac97_st -ffffffff8267cd20 R ac97_vi -ffffffff8267cd50 R ac97_tt -ffffffff8267cdd0 R ac97_ti -ffffffff8267cdf0 R ac97_wb -ffffffff8267ce10 R ac97_wo -ffffffff8267cea0 R ac97_ym -ffffffff8267cef0 R ac97_vendors -ffffffff8267d1f0 R ac97enhancement -ffffffff8267d2f0 R ac97feature -ffffffff8267e000 R lm_chips -ffffffff8267e020 R lm78_sensors -ffffffff8267e1a0 R w83627hf_sensors -ffffffff8267e3a0 R w83627ehf_sensors -ffffffff8267e5c0 R w83627dhg_sensors -ffffffff8267e7c0 R nct6776f_sensors -ffffffff8267ea00 R nct6779d_sensors -ffffffff8267ed60 R w83637hf_sensors -ffffffff8267ef20 R w83697hf_sensors -ffffffff8267f0c0 R w83781d_sensors -ffffffff8267f280 R w83782d_sensors -ffffffff8267f480 R w83783s_sensors -ffffffff8267f600 R w83791d_sensors -ffffffff8267f860 R w83792d_sensors -ffffffff8267fae0 R as99127f_sensors -ffffffff82680000 r ar5k_known_products -ffffffff82680110 r ar5111_gain_opt -ffffffff826801e0 r ar5112_gain_opt -ffffffff826802b0 r ar5k_5ghz_channels -ffffffff82680a00 r ar5k_2ghz_channels -ffffffff82680f10 r ar5111_rf -ffffffff82681350 r ar5112a_rf -ffffffff82681890 r ar5112_rf -ffffffff82681da0 r ar5413_rf -ffffffff826821b0 r ar2413_rf -ffffffff826824d0 r ar2425_rf -ffffffff82682830 r ar5111_rfg -ffffffff82682b30 r ar5112_rfg -ffffffff82682e30 r ar5413_rfg -ffffffff82683130 r ar2413_rfg -ffffffff82683430 r ar5k_rt_11a -ffffffff82683552 r ar5k_rt_11b -ffffffff82683674 r ar5k_rt_11g -ffffffff82683796 r ar5k_rt_xr -ffffffff82684000 r ar5210_ini -ffffffff82685000 r ar5211_mode -ffffffff826852c0 r ar5211_ini -ffffffff82685ad0 r ar5211_rf -ffffffff82686000 r ar5212_pcie -ffffffff82686080 r ar5212_mode -ffffffff82686310 r ar5212_ini -ffffffff82686c80 r ar5212_ar5111_mode -ffffffff82686f20 r ar5212_ar5112_mode -ffffffff826871b0 r ar5413_mode -ffffffff82687b10 r ar2413_mode -ffffffff82688430 r ar2425_mode -ffffffff82688d90 r ar5111_bbgain -ffffffff82689090 r ar5112_bbgain -ffffffff8268a000 r athn_5ghz_chans -ffffffff8268a020 r athn_rates -ffffffff8268b000 r athn_rates -ffffffff8268c000 r ar9160_ini -ffffffff8268c068 r ar5416_ini -ffffffff8268c0d0 r ar5416_serdes -ffffffff8268c0e8 r ar9160_1_1_addac -ffffffff8268c0f8 r ar9160_1_0_addac -ffffffff8268c108 r ar5416_2_2_addac -ffffffff8268c118 r ar5416_2_1_addac -ffffffff8268c128 r ar5416_set_power_calib.chainoffset -ffffffff8268c140 r ar9160_bank6tpc_vals -ffffffff8268c1c0 r ar5416_bank6tpc_vals -ffffffff8268c240 r ar5416_bb_rfgain_vals_2g -ffffffff8268c340 r ar5416_bb_rfgain_vals_5g -ffffffff8268c440 r ar5416_bank6_vals -ffffffff8268c4c0 r ar9160_regs -ffffffff8268c540 r ar9160_vals_5g20 -ffffffff8268c640 r ar9160_vals_5g40 -ffffffff8268c740 r ar9160_vals_2g40 -ffffffff8268c840 r ar9160_vals_2g20 -ffffffff8268c940 r ar9160_cm_regs -ffffffff8268cc30 r ar9160_cm_vals -ffffffff8268d210 r ar5416_regs -ffffffff8268d290 r ar5416_vals_5g20 -ffffffff8268d390 r ar5416_vals_5g40 -ffffffff8268d490 r ar5416_vals_2g40 -ffffffff8268d590 r ar5416_vals_2g20 -ffffffff8268d690 r ar5416_cm_regs -ffffffff8268d980 r ar5416_cm_vals -ffffffff8268df60 r ar5416_serdes_regs -ffffffff8268df90 r ar5416_serdes_vals -ffffffff8268dfc0 r ar9160_1_1_addac_vals -ffffffff8268e040 r ar9160_1_0_addac_vals -ffffffff8268e0c0 r ar5416_2_2_addac_vals -ffffffff8268e150 r ar5416_2_1_addac_vals -ffffffff8268f000 r ar9280_2_0_ini -ffffffff8268f068 r ar9280_2_0_serdes -ffffffff8268f080 r ar9280_2_0_rx_gain_23db_backoff -ffffffff8268f0a0 r ar9280_2_0_rx_gain_13db_backoff -ffffffff8268f0c0 r ar9280_2_0_rx_gain -ffffffff8268f0e0 r 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dmub_dcn20_is_gpint_acked +ffffffff82208e10 T dmub_dcn20_get_gpint_response +ffffffff82208e40 T dmub_dcn20_get_fw_boot_status +ffffffff82208e70 T dmub_dcn20_enable_dmub_boot_options +ffffffff82208ea0 T dmub_dcn20_skip_dmub_panel_power_sequence +ffffffff82208ef0 T dmub_dcn20_get_current_time +ffffffff82208f20 T dmub_dcn20_get_diagnostic_data +ffffffff8220a000 T dmub_dcn21_is_phy_init +ffffffff8220b000 T dmub_dcn30_backdoor_load +ffffffff8220b260 T dmub_dcn30_setup_windows +ffffffff8220c000 T dmub_dcn31_reset +ffffffff8220c280 T dmub_dcn31_reset_release +ffffffff8220c350 T dmub_dcn31_backdoor_load +ffffffff8220c5b0 T dmub_dcn31_setup_windows +ffffffff8220c8e0 T dmub_dcn31_setup_mailbox +ffffffff8220c930 T dmub_dcn31_get_inbox1_rptr +ffffffff8220c950 T dmub_dcn31_set_inbox1_wptr +ffffffff8220c970 T dmub_dcn31_setup_out_mailbox +ffffffff8220c9c0 T dmub_dcn31_get_outbox1_wptr +ffffffff8220c9e0 T dmub_dcn31_set_outbox1_rptr +ffffffff8220ca00 T dmub_dcn31_is_hw_init +ffffffff8220ca80 T dmub_dcn31_is_supported +ffffffff8220cae0 T dmub_dcn31_set_gpint +ffffffff8220cb10 T dmub_dcn31_is_gpint_acked +ffffffff8220cb70 T dmub_dcn31_get_gpint_response +ffffffff8220cba0 T dmub_dcn31_get_gpint_dataout +ffffffff8220ccc0 T dmub_dcn31_get_fw_boot_status +ffffffff8220ccf0 T dmub_dcn31_enable_dmub_boot_options +ffffffff8220cd70 T dmub_dcn31_skip_dmub_panel_power_sequence +ffffffff8220cdc0 T dmub_dcn31_setup_outbox0 +ffffffff8220ce10 T dmub_dcn31_get_outbox0_wptr +ffffffff8220ce30 T dmub_dcn31_set_outbox0_rptr +ffffffff8220ce50 T dmub_dcn31_get_current_time +ffffffff8220ce80 T dmub_dcn31_get_diagnostic_data +ffffffff8220d320 T dmub_dcn31_should_detect +ffffffff8220e000 T dmub_dcn32_reset +ffffffff8220e1d0 T dmub_dcn32_reset_release +ffffffff8220e2c0 T dmub_dcn32_backdoor_load +ffffffff8220e520 T dmub_dcn32_backdoor_load_zfb_mode +ffffffff8220e700 T dmub_dcn32_setup_windows +ffffffff8220ea30 T dmub_dcn32_setup_mailbox +ffffffff8220ea80 T dmub_dcn32_get_inbox1_rptr +ffffffff8220eaa0 T dmub_dcn32_set_inbox1_wptr +ffffffff8220eac0 T dmub_dcn32_setup_out_mailbox +ffffffff8220eb10 T dmub_dcn32_get_outbox1_wptr +ffffffff8220eb30 T dmub_dcn32_set_outbox1_rptr +ffffffff8220eb50 T dmub_dcn32_is_hw_init +ffffffff8220ebd0 T dmub_dcn32_is_supported +ffffffff8220ec30 T dmub_dcn32_set_gpint +ffffffff8220ec60 T dmub_dcn32_is_gpint_acked +ffffffff8220ecc0 T dmub_dcn32_get_gpint_response +ffffffff8220ecf0 T dmub_dcn32_get_gpint_dataout +ffffffff8220ee10 T dmub_dcn32_get_fw_boot_status +ffffffff8220ee40 T dmub_dcn32_enable_dmub_boot_options +ffffffff8220ee70 T dmub_dcn32_skip_dmub_panel_power_sequence +ffffffff8220eec0 T dmub_dcn32_setup_outbox0 +ffffffff8220ef10 T dmub_dcn32_get_outbox0_wptr +ffffffff8220ef30 T dmub_dcn32_set_outbox0_rptr +ffffffff8220ef50 T dmub_dcn32_get_current_time +ffffffff8220ef80 T dmub_dcn32_get_diagnostic_data +ffffffff8220f420 T dmub_dcn32_configure_dmub_in_system_memory +ffffffff8220f450 T dmub_dcn32_send_inbox0_cmd +ffffffff8220f470 T dmub_dcn32_clear_inbox0_ack_register +ffffffff8220f4a0 T dmub_dcn32_read_inbox0_ack_register +ffffffff82210000 T dmub_reg_update +ffffffff82210170 T dmub_reg_set +ffffffff822102d0 T dmub_reg_get +ffffffff82211000 T dmub_flush_buffer_mem +ffffffff82211030 T dmub_srv_create +ffffffff82211550 T dmub_srv_destroy +ffffffff82211570 T dmub_srv_calc_region_info +ffffffff822117e0 T dmub_srv_calc_fb_info +ffffffff82211980 T dmub_srv_has_hw_support +ffffffff822119f0 T dmub_srv_is_hw_init +ffffffff82211a60 T dmub_srv_hw_init +ffffffff82211eb0 T dmub_srv_hw_reset +ffffffff82211f40 T dmub_srv_cmd_queue +ffffffff82212040 T dmub_srv_cmd_execute +ffffffff82212100 T dmub_srv_wait_for_auto_load +ffffffff822121a0 T dmub_srv_wait_for_phy_init +ffffffff82212250 T dmub_srv_wait_for_idle +ffffffff82212300 T dmub_srv_send_gpint_command +ffffffff822123e0 T dmub_srv_get_gpint_response +ffffffff82212440 T dmub_srv_get_gpint_dataout +ffffffff822124a0 T dmub_srv_get_fw_boot_status +ffffffff82212510 T dmub_srv_cmd_with_reply_data +ffffffff82212780 T dmub_srv_get_outbox0_msg +ffffffff82212820 T dmub_srv_get_diagnostic_data +ffffffff82212870 T dmub_srv_should_detect +ffffffff822128b0 T dmub_srv_clear_inbox0_ack +ffffffff82212900 T dmub_srv_wait_for_inbox0_ack +ffffffff82212990 T dmub_srv_send_inbox0_cmd +ffffffff82213000 T dmub_srv_stat_get_notification +ffffffff82214000 T setup_x_points_distribution +ffffffff82214160 T log_x_points_distribution +ffffffff82214190 T precompute_pq +ffffffff82214350 t compute_pq +ffffffff82214560 T precompute_de_pq +ffffffff822146b0 t compute_de_pq +ffffffff82214970 T calculate_user_regamma_coeff +ffffffff82214d40 t apply_lut_1d +ffffffff82215070 T calculate_user_regamma_ramp +ffffffff822159b0 T mod_color_calculate_degamma_params +ffffffff82215f80 t build_evenly_distributed_points +ffffffff82216100 t scale_gamma +ffffffff822162b0 t build_degamma +ffffffff82216680 t build_hlg_degamma +ffffffff822168a0 t map_regamma_hw_to_x_user +ffffffff82217000 T mod_color_calculate_regamma_params +ffffffff82219170 T mod_color_calculate_degamma_curve +ffffffff82219630 t translate_from_linear_space +ffffffff82219970 t build_coefficients +ffffffff82219af0 t calculate_mapped_value +ffffffff8221a000 T mod_color_is_table_init +ffffffff8221a050 T mod_color_get_table +ffffffff8221a090 T mod_color_set_table_init_state +ffffffff8221b000 T mod_freesync_create +ffffffff8221b070 T mod_freesync_destroy +ffffffff8221b0b0 T mod_freesync_calc_v_total_from_refresh +ffffffff8221b140 T mod_freesync_get_vmin_vmax +ffffffff8221b180 T mod_freesync_get_v_position +ffffffff8221b200 T mod_freesync_build_vrr_infopacket +ffffffff8221b950 T mod_freesync_build_vrr_params +ffffffff8221bcd0 T mod_freesync_calc_nominal_field_rate +ffffffff8221bd20 T mod_freesync_handle_preflip +ffffffff8221c140 T mod_freesync_handle_v_update +ffffffff8221c600 T mod_freesync_get_settings +ffffffff8221c660 T mod_freesync_calc_field_rate_from_timing +ffffffff8221c6b0 T mod_freesync_get_freesync_enabled +ffffffff8221c6e0 T mod_freesync_is_valid_range +ffffffff8221d000 T mod_build_vsc_infopacket +ffffffff8221d200 T mod_build_hf_vsif_infopacket +ffffffff8221e000 T dmub_init_abm_config +ffffffff8221e540 t fill_iram_v_2_3 +ffffffff8221e9a0 T dmcu_load_iram +ffffffff8221f180 T is_psr_su_specific_panel +ffffffff8221f210 T mod_power_calc_psr_configs +ffffffff8221f310 T mod_power_only_edp +ffffffff82220000 T mod_vmid_get_for_ptb +ffffffff82220230 T mod_vmid_reset +ffffffff822202f0 T mod_vmid_create +ffffffff82220430 T mod_vmid_destroy +ffffffff82221000 T amdgpu_dpm_get_sclk +ffffffff82221090 T amdgpu_dpm_get_mclk +ffffffff82221120 T amdgpu_dpm_set_powergating_by_smu +ffffffff82221200 T amdgpu_dpm_set_gfx_power_up_by_imu +ffffffff82221310 T amdgpu_dpm_baco_enter +ffffffff822213a0 T amdgpu_dpm_baco_exit +ffffffff82221430 T amdgpu_dpm_set_mp1_state +ffffffff822214c0 T amdgpu_dpm_is_baco_supported +ffffffff82221560 T amdgpu_dpm_mode2_reset +ffffffff822215f0 T amdgpu_dpm_baco_reset +ffffffff822216a0 T amdgpu_dpm_is_mode1_reset_supported +ffffffff82221710 T amdgpu_dpm_mode1_reset +ffffffff82221790 T amdgpu_dpm_switch_power_profile +ffffffff82221830 T amdgpu_dpm_set_xgmi_pstate +ffffffff822218c0 T amdgpu_dpm_set_df_cstate +ffffffff82221960 T amdgpu_dpm_allow_xgmi_power_down +ffffffff822219e0 T amdgpu_dpm_enable_mgpu_fan_boost +ffffffff82221a70 T amdgpu_dpm_set_clockgating_by_smu +ffffffff82221b10 T amdgpu_dpm_smu_i2c_bus_access +ffffffff82221bb0 T amdgpu_pm_acpi_event_handler +ffffffff82221c70 T amdgpu_dpm_read_sensor +ffffffff82221d20 T amdgpu_dpm_compute_clocks +ffffffff82221e00 T amdgpu_dpm_enable_uvd +ffffffff82221fe0 T amdgpu_dpm_enable_vce +ffffffff822221c0 T amdgpu_dpm_enable_jpeg +ffffffff822222b0 T amdgpu_pm_load_smu_firmware +ffffffff82222360 T amdgpu_dpm_handle_passthrough_sbr +ffffffff822223e0 T amdgpu_dpm_send_hbm_bad_pages_num +ffffffff82222460 T amdgpu_dpm_send_hbm_bad_channel_flag +ffffffff822224e0 T amdgpu_dpm_get_dpm_freq_range +ffffffff82222580 T amdgpu_dpm_set_soft_freq_range +ffffffff82222620 T amdgpu_dpm_write_watermarks_table +ffffffff82222690 T amdgpu_dpm_wait_for_event +ffffffff82222720 T amdgpu_dpm_set_residency_gfxoff +ffffffff822227a0 T amdgpu_dpm_get_residency_gfxoff +ffffffff82222820 T amdgpu_dpm_get_entrycount_gfxoff +ffffffff822228a0 T amdgpu_dpm_get_status_gfxoff +ffffffff82222920 T amdgpu_dpm_get_thermal_throttling_counter +ffffffff82222970 T amdgpu_dpm_gfx_state_change +ffffffff822229d0 T amdgpu_dpm_get_ecc_info +ffffffff82222a50 T amdgpu_dpm_get_vce_clock_state +ffffffff82222ae0 T amdgpu_dpm_get_current_power_state +ffffffff82222b50 T amdgpu_dpm_set_power_state +ffffffff82222ca0 T amdgpu_dpm_dispatch_task +ffffffff82222d40 T amdgpu_dpm_get_performance_level +ffffffff82222dd0 T amdgpu_dpm_force_performance_level +ffffffff82222fb0 T amdgpu_dpm_get_pp_num_states +ffffffff82223040 T amdgpu_dpm_get_pp_table +ffffffff822230d0 T amdgpu_dpm_set_fine_grain_clk_vol +ffffffff82223170 T amdgpu_dpm_odn_edit_dpm_table +ffffffff82223210 T amdgpu_dpm_print_clock_levels +ffffffff822232a0 T amdgpu_dpm_emit_clock_levels +ffffffff82223340 T amdgpu_dpm_set_ppfeature_status +ffffffff822233d0 T amdgpu_dpm_get_ppfeature_status +ffffffff82223460 T amdgpu_dpm_force_clock_level +ffffffff822234f0 T amdgpu_dpm_get_sclk_od +ffffffff82223570 T amdgpu_dpm_set_sclk_od +ffffffff822236f0 T amdgpu_dpm_get_mclk_od +ffffffff82223770 T amdgpu_dpm_set_mclk_od +ffffffff822238f0 T amdgpu_dpm_get_power_profile_mode +ffffffff82223980 T amdgpu_dpm_set_power_profile_mode +ffffffff82223a10 T amdgpu_dpm_get_gpu_metrics +ffffffff82223aa0 T amdgpu_dpm_get_fan_control_mode +ffffffff82223b30 T amdgpu_dpm_set_fan_speed_pwm +ffffffff82223bc0 T amdgpu_dpm_get_fan_speed_pwm +ffffffff82223c50 T amdgpu_dpm_get_fan_speed_rpm +ffffffff82223ce0 T amdgpu_dpm_set_fan_speed_rpm +ffffffff82223d70 T amdgpu_dpm_set_fan_control_mode +ffffffff82223e00 T amdgpu_dpm_get_power_limit +ffffffff82223ea0 T amdgpu_dpm_set_power_limit +ffffffff82223f30 T amdgpu_dpm_is_cclk_dpm_supported +ffffffff82223fa0 T amdgpu_dpm_debugfs_print_current_performance_level +ffffffff82224030 T amdgpu_dpm_get_smu_prv_buf_details +ffffffff822240d0 T amdgpu_dpm_is_overdrive_supported +ffffffff82224160 T amdgpu_dpm_set_pp_table +ffffffff82224200 T amdgpu_dpm_get_num_cpu_cores +ffffffff82224250 T amdgpu_dpm_stb_debug_fs_init +ffffffff822242a0 T amdgpu_dpm_display_configuration_change +ffffffff82224330 T amdgpu_dpm_get_clock_by_type +ffffffff822243c0 T amdgpu_dpm_get_display_mode_validation_clks +ffffffff82224450 T amdgpu_dpm_get_clock_by_type_with_latency +ffffffff822244e0 T amdgpu_dpm_get_clock_by_type_with_voltage +ffffffff82224570 T amdgpu_dpm_set_watermarks_for_clocks_ranges +ffffffff82224600 T amdgpu_dpm_display_clock_voltage_request +ffffffff82224690 T amdgpu_dpm_get_current_clocks +ffffffff82224720 T amdgpu_dpm_notify_smu_enable_pwe +ffffffff822247a0 T amdgpu_dpm_set_active_display_count +ffffffff82224830 T amdgpu_dpm_set_min_deep_sleep_dcefclk +ffffffff822248c0 T amdgpu_dpm_set_hard_min_dcefclk_by_freq +ffffffff82224950 T amdgpu_dpm_set_hard_min_fclk_by_freq +ffffffff822249e0 T amdgpu_dpm_display_disable_memory_clock_switch +ffffffff82224a70 T amdgpu_dpm_get_max_sustainable_clocks_by_dc +ffffffff82224b00 T amdgpu_dpm_get_uclk_dpm_states +ffffffff82224ba0 T amdgpu_dpm_get_dpm_clock_table +ffffffff82225000 T amdgpu_dpm_get_active_displays +ffffffff822250a0 T amdgpu_dpm_get_vblank_time +ffffffff82225150 T amdgpu_dpm_get_vrefresh +ffffffff82226000 T amdgpu_pm_sysfs_init +ffffffff82226030 T amdgpu_pm_sysfs_fini +ffffffff82226060 T amdgpu_debugfs_pm_init +ffffffff82227000 T amdgpu_dpm_print_class_info +ffffffff822272b0 T amdgpu_dpm_print_cap_info +ffffffff82227330 T amdgpu_dpm_print_ps_status +ffffffff822273c0 T amdgpu_pm_print_power_states +ffffffff82227470 T amdgpu_get_platform_caps +ffffffff82227510 T amdgpu_parse_extended_power_table +ffffffff82228520 T amdgpu_free_extended_power_table +ffffffff82228630 T amdgpu_add_thermal_controller +ffffffff82228a60 T amdgpu_get_vce_clock_state +ffffffff82228aa0 T amdgpu_legacy_dpm_compute_clocks +ffffffff82228f10 T amdgpu_dpm_thermal_work_handler +ffffffff82229000 t pp_early_init +ffffffff82229100 t pp_late_init +ffffffff82229210 t pp_sw_init +ffffffff82229230 t pp_sw_fini +ffffffff822292b0 t pp_hw_init +ffffffff82229300 t pp_hw_fini +ffffffff82229340 t pp_late_fini +ffffffff822293a0 t pp_suspend +ffffffff822293c0 t pp_resume +ffffffff822293e0 t pp_is_idle +ffffffff82229410 t pp_wait_for_idle +ffffffff82229440 t pp_sw_reset +ffffffff82229470 t pp_set_clockgating_state +ffffffff822294a0 t pp_set_powergating_state +ffffffff822294d0 t pp_dpm_set_fan_control_mode +ffffffff82229540 t pp_dpm_get_fan_control_mode +ffffffff822295b0 t pp_dpm_set_fan_speed_pwm +ffffffff82229610 t pp_dpm_get_fan_speed_pwm +ffffffff82229670 t pp_dpm_force_clock_level +ffffffff822296d0 t pp_dpm_print_clock_levels +ffffffff82229720 t pp_dpm_emit_clock_levels +ffffffff82229780 t pp_dpm_force_performance_level +ffffffff82229810 t pp_dpm_get_sclk_od +ffffffff82229860 t pp_dpm_set_sclk_od +ffffffff822298b0 t pp_dpm_get_mclk_od +ffffffff82229900 t pp_dpm_set_mclk_od +ffffffff82229950 t pp_dpm_read_sensor +ffffffff822299f0 t pp_dpm_get_performance_level +ffffffff82229a30 t pp_dpm_get_current_power_state +ffffffff82229aa0 t pp_dpm_get_fan_speed_rpm +ffffffff82229b00 t pp_dpm_set_fan_speed_rpm +ffffffff82229b60 t pp_dpm_get_pp_num_states +ffffffff82229ca0 t pp_dpm_get_pp_table +ffffffff82229cf0 t pp_dpm_set_pp_table +ffffffff82229e20 t pp_dpm_switch_power_profile +ffffffff82229f60 t pp_dpm_get_vce_clock_state +ffffffff82229fb0 t pp_dpm_dispatch_tasks +ffffffff82229ff0 t pp_dpm_load_fw +ffffffff8222a060 t pp_dpm_fw_loading_complete +ffffffff8222a090 t pp_set_powergating_by_smu +ffffffff8222a200 t pp_set_clockgating_by_smu +ffffffff8222a260 t pp_set_power_limit +ffffffff8222a320 t pp_get_power_limit +ffffffff8222a3b0 t pp_get_power_profile_mode +ffffffff8222a410 t pp_set_power_profile_mode +ffffffff8222a470 t pp_set_fine_grain_clk_vol +ffffffff8222a4c0 t pp_odn_edit_dpm_table +ffffffff8222a510 t pp_dpm_set_mp1_state +ffffffff8222a560 t pp_smu_i2c_bus_access +ffffffff8222a5b0 t pp_gfx_state_change_set +ffffffff8222a610 t pp_dpm_get_sclk +ffffffff8222a660 t pp_dpm_get_mclk +ffffffff8222a6b0 t pp_display_configuration_change +ffffffff8222a700 t pp_get_display_power_level +ffffffff8222a740 t pp_get_current_clocks +ffffffff8222a860 t pp_get_clock_by_type +ffffffff8222a8a0 t pp_get_clock_by_type_with_latency +ffffffff8222a8e0 t pp_get_clock_by_type_with_voltage +ffffffff8222a920 t pp_set_watermarks_for_clocks_ranges +ffffffff8222a960 t pp_display_clock_voltage_request +ffffffff8222a9a0 t pp_get_display_mode_validation_clocks +ffffffff8222aa00 t pp_notify_smu_enable_pwe +ffffffff8222aa60 t pp_enable_mgpu_fan_boost +ffffffff8222aac0 t pp_set_active_display_count +ffffffff8222ab00 t pp_set_hard_min_dcefclk_by_freq +ffffffff8222ab60 t pp_set_hard_min_fclk_by_freq +ffffffff8222abc0 t pp_set_min_deep_sleep_dcefclk +ffffffff8222ac20 t pp_get_asic_baco_capability +ffffffff8222ac90 t pp_get_asic_baco_state +ffffffff8222acf0 t pp_set_asic_baco_state +ffffffff8222ad60 t pp_get_ppfeature_status +ffffffff8222adb0 t pp_set_ppfeature_status +ffffffff8222ae00 t pp_asic_reset_mode_2 +ffffffff8222ae50 t pp_set_df_cstate +ffffffff8222aeb0 t pp_set_xgmi_pstate +ffffffff8222af10 t pp_get_gpu_metrics +ffffffff8222af70 t pp_get_prv_buffer_details +ffffffff8222aff0 t pp_pm_compute_clocks +ffffffff8222c000 T ci_baco_set_state +ffffffff8222d000 T baco_program_registers +ffffffff8222d0d0 t baco_cmd_handler +ffffffff8222d250 T soc15_baco_program_registers +ffffffff8222e000 T fiji_baco_set_state +ffffffff8222f000 T phm_setup_asic +ffffffff8222f050 T phm_power_down_asic +ffffffff8222f0a0 T phm_set_power_state +ffffffff8222f110 T phm_enable_dynamic_state_management +ffffffff8222f1c0 T phm_disable_dynamic_state_management +ffffffff8222f250 T phm_force_dpm_levels +ffffffff8222f2a0 T phm_apply_state_adjust_rules +ffffffff8222f2f0 T phm_apply_clock_adjust_rules +ffffffff8222f340 T phm_powerdown_uvd +ffffffff8222f390 T phm_disable_clock_power_gatings +ffffffff8222f3e0 T phm_pre_display_configuration_changed +ffffffff8222f440 T phm_display_configuration_changed +ffffffff8222f4a0 T phm_notify_smc_display_config_after_ps_adjustment +ffffffff8222f500 T phm_stop_thermal_controller +ffffffff8222f560 T phm_register_irq_handlers +ffffffff8222f5b0 T phm_start_thermal_controller +ffffffff8222f6e0 T phm_check_smc_update_required_for_display_configuration +ffffffff8222f740 T phm_check_states_equal +ffffffff8222f790 T phm_store_dal_configuration_data +ffffffff8222f8e0 T phm_get_dal_power_level +ffffffff8222f930 T phm_set_cpu_power_state +ffffffff8222f980 T phm_get_performance_level +ffffffff8222f9d0 T phm_get_clock_info +ffffffff8222fb50 T phm_get_current_shallow_sleep_clocks +ffffffff8222fba0 T phm_get_clock_by_type +ffffffff8222fbf0 T phm_get_clock_by_type_with_latency +ffffffff8222fc40 T phm_get_clock_by_type_with_voltage +ffffffff8222fc90 T phm_set_watermarks_for_clocks_ranges +ffffffff8222fce0 T phm_display_clock_voltage_request +ffffffff8222fd30 T phm_get_max_high_clocks +ffffffff8222fd80 T phm_disable_smc_firmware_ctf +ffffffff8222fde0 T phm_set_active_display_count +ffffffff82230000 T hwmgr_early_init +ffffffff82230470 T hwmgr_sw_init +ffffffff822304e0 T hwmgr_sw_fini +ffffffff82230530 T hwmgr_hw_init +ffffffff822306f0 T hwmgr_hw_fini +ffffffff822307a0 T hwmgr_suspend +ffffffff82230820 T hwmgr_resume +ffffffff822308c0 T hwmgr_handle_task +ffffffff82231000 T polaris_baco_set_state +ffffffff82232000 T pp_override_get_default_fuse_value +ffffffff82233000 T psm_init_power_state_table +ffffffff822332a0 T psm_fini_power_state_table +ffffffff82233360 T psm_set_boot_states +ffffffff82233420 T psm_set_performance_states +ffffffff822334e0 T psm_set_user_performance_state +ffffffff82233570 T psm_adjust_power_state_dynamic +ffffffff82234000 T atomctrl_initialize_mc_reg_table +ffffffff82234200 T atomctrl_initialize_mc_reg_table_v2_2 +ffffffff82234400 T atomctrl_set_engine_dram_timings_rv770 +ffffffff82234460 T atomctrl_get_memory_pll_dividers_si +ffffffff82234540 T atomctrl_get_memory_pll_dividers_vi +ffffffff822345b0 T atomctrl_get_memory_pll_dividers_ai +ffffffff82234660 T atomctrl_get_engine_pll_dividers_kong +ffffffff822346e0 T atomctrl_get_engine_pll_dividers_vi +ffffffff822347a0 T atomctrl_get_engine_pll_dividers_ai +ffffffff82234880 T atomctrl_get_dfs_pll_dividers_vi +ffffffff82234940 T atomctrl_get_reference_clock +ffffffff822349a0 T atomctrl_is_voltage_controlled_by_gpio_v3 +ffffffff82234a50 T atomctrl_get_voltage_table_v3 +ffffffff82234bb0 T atomctrl_get_pp_assign_pin +ffffffff82234ca0 T atomctrl_calculate_voltage_evv_on_sclk +ffffffff82235020 T atomctrl_get_voltage_evv_on_sclk +ffffffff822350a0 T atomctrl_get_voltage_evv +ffffffff82235150 T atomctrl_get_mpll_reference_clock +ffffffff822351c0 T atomctrl_is_asic_internal_ss_supported +ffffffff82235210 T atomctrl_get_memory_clock_spread_spectrum +ffffffff82235310 T atomctrl_get_engine_clock_spread_spectrum +ffffffff82235410 T atomctrl_read_efuse +ffffffff822354c0 T atomctrl_set_ac_timing_ai +ffffffff82235520 T atomctrl_get_voltage_evv_on_sclk_ai +ffffffff82235590 T atomctrl_get_smc_sclk_range_table +ffffffff82235650 T atomctrl_get_vddc_shared_railinfo +ffffffff822356c0 T atomctrl_get_avfs_information +ffffffff82235840 T atomctrl_get_svi2_info +ffffffff82235920 T atomctrl_get_leakage_id_from_efuse +ffffffff82235980 T atomctrl_get_leakage_vddc_base_on_leakage +ffffffff82235b10 T atomctrl_get_voltage_range +ffffffff82235bd0 T atomctrl_get_edc_hilo_leakage_offset_table +ffffffff82235c50 T atomctrl_get_edc_leakage_table +ffffffff82236000 T pp_atomfwctrl_is_voltage_controlled_by_gpio_v4 +ffffffff822360d0 T pp_atomfwctrl_get_voltage_table_v4 +ffffffff82236280 T pp_atomfwctrl_get_pp_assign_pin +ffffffff82236360 T pp_atomfwctrl_enter_self_refresh +ffffffff82236390 T pp_atomfwctrl_get_gpu_pll_dividers_vega10 +ffffffff82236430 T pp_atomfwctrl_get_avfs_information +ffffffff82236760 T pp_atomfwctrl_get_gpio_information +ffffffff82236800 T pp_atomfwctrl_get_clk_information_by_clkid +ffffffff82236880 T pp_atomfwctrl_get_vbios_bootup_values +ffffffff82236c00 T pp_atomfwctrl_get_smc_dpm_information +ffffffff82237000 T encode_pcie_lane_width +ffffffff82237030 T decode_pcie_lane_width +ffffffff82238000 t pp_tables_v1_0_initialize +ffffffff82239420 t pp_tables_v1_0_uninitialize +ffffffff822395c0 T get_number_of_powerplay_table_entries_v1_0 +ffffffff82239670 T get_powerplay_table_entry_v1_0 +ffffffff8223a000 T pp_tables_get_response_times +ffffffff8223a0d0 T pp_tables_get_num_of_entries +ffffffff8223a190 T pp_tables_get_entry +ffffffff8223a4f0 t init_non_clock_fields +ffffffff8223a670 t pp_tables_initialize +ffffffff8223bad0 t pp_tables_uninitialize +ffffffff8223bcd0 t get_number_of_vce_state_table_entries +ffffffff8223bdd0 t get_vce_state_table_entry +ffffffff8223c000 T smu10_init_function_pointers +ffffffff8223c040 t smu10_hwmgr_backend_init +ffffffff8223c710 t smu10_hwmgr_backend_fini +ffffffff8223c840 t smu10_setup_asic_task +ffffffff8223c8b0 t smu10_get_power_state_size +ffffffff8223c8e0 t smu10_apply_state_adjust_rules +ffffffff8223c910 t smu10_dpm_force_dpm_level +ffffffff8223ce90 t smu10_enable_dpm_tasks +ffffffff8223cf10 t smu10_disable_dpm_tasks +ffffffff8223cf40 t smu10_dpm_patch_boot_state +ffffffff8223cf70 t smu10_dpm_get_pp_table_entry +ffffffff8223cfd0 t smu10_dpm_get_num_of_pp_table_entries +ffffffff8223d020 t smu10_powergate_vcn +ffffffff8223d0c0 t smu10_dpm_get_mclk +ffffffff8223d110 t smu10_dpm_get_sclk +ffffffff8223d160 t smu10_set_power_state_tasks +ffffffff8223d1d0 t smu10_set_cpu_power_state +ffffffff8223d200 t smu10_store_cc6_data +ffffffff8223d270 t smu10_get_dal_power_level +ffffffff8223d2a0 t smu10_get_performance_level +ffffffff8223d330 t smu10_get_current_shallow_sleep_clocks +ffffffff8223d390 t smu10_get_clock_by_type_with_latency +ffffffff8223d4e0 t smu10_get_clock_by_type_with_voltage +ffffffff8223d5e0 t smu10_set_watermarks_for_clocks_ranges +ffffffff8223d6b0 t smu10_display_clock_voltage_request +ffffffff8223d750 t smu10_get_max_high_clocks +ffffffff8223d780 t smu10_power_off_asic +ffffffff8223d7d0 t smu10_force_clock_level +ffffffff8223d990 t smu10_print_clock_levels +ffffffff8223dd30 t smu10_gfx_off_control +ffffffff8223de40 t smu10_read_sensor +ffffffff8223dfb0 t smu10_set_active_display_count +ffffffff8223e000 t smu10_set_min_deep_sleep_dcefclk +ffffffff8223e060 t smu10_get_power_profile_mode +ffffffff8223e0a0 t smu10_set_power_profile_mode +ffffffff8223e1f0 t smu10_set_fine_grain_clk_vol +ffffffff8223e3f0 t smu10_powergate_mmhub +ffffffff8223e410 t smu10_smus_notify_pwe +ffffffff8223e430 t smu10_powergate_sdma +ffffffff8223e450 t smu10_set_hard_min_dcefclk_by_freq +ffffffff8223e4b0 t smu10_set_hard_min_fclk_by_freq +ffffffff8223e510 t smu10_set_hard_min_gfxclk_by_freq +ffffffff8223e570 t smu10_set_soft_max_gfxclk_by_freq +ffffffff8223e5d0 t smu10_asic_reset +ffffffff8223e5f0 t smu10_gfx_state_change +ffffffff8223e630 t smu10_dpm_get_pp_table_entry_callback +ffffffff8223f000 T smu7_baco_get_capability +ffffffff8223f060 T smu7_baco_get_state +ffffffff8223f0b0 T smu7_baco_set_state +ffffffff82240000 T smu7_powerdown_uvd +ffffffff82240050 T smu7_disable_clock_power_gating +ffffffff822400d0 T smu7_powergate_uvd +ffffffff822401c0 T smu7_powergate_vce +ffffffff822402b0 T smu7_update_clock_gatings +ffffffff82240660 T smu7_powergate_gfx +ffffffff82241000 T smu7_get_sleep_divider_id_from_clock +ffffffff822410a0 T smu7_init_function_pointers +ffffffff82241100 t smu7_hwmgr_backend_init +ffffffff82242f40 t smu7_hwmgr_backend_fini +ffffffff82242fb0 t smu7_setup_asic_task +ffffffff82243310 t smu7_get_power_state_size +ffffffff82243340 t smu7_apply_state_adjust_rules +ffffffff822437b0 t smu7_force_dpm_level +ffffffff82243be0 t smu7_enable_dpm_tasks +ffffffff82246340 t smu7_disable_dpm_tasks +ffffffff82246a80 t smu7_dpm_patch_boot_state +ffffffff82246bc0 t smu7_get_pp_table_entry +ffffffff82246fb0 t smu7_get_number_of_powerplay_table_entries +ffffffff82247020 t smu7_dpm_get_mclk +ffffffff822470c0 t smu7_dpm_get_sclk +ffffffff82247160 t smu7_set_power_state_tasks +ffffffff82247ee0 t smu7_notify_smc_display_config_after_ps_adjustment +ffffffff82247f10 t smu7_display_configuration_changed_task +ffffffff822480c0 t smu7_set_max_fan_rpm_output +ffffffff822480f0 t smu7_set_max_fan_pwm_output +ffffffff82248110 t smu7_set_fan_control_mode +ffffffff822481a0 t smu7_get_fan_control_mode +ffffffff822481e0 t smu7_register_irq_handlers +ffffffff82248280 t smu7_check_smc_update_required_for_display_configuration +ffffffff82248330 t smu7_check_states_equal +ffffffff822484d0 t smu7_get_performance_level +ffffffff82248560 t smu7_get_clock_by_type +ffffffff82248720 t smu7_get_clock_by_type_with_latency +ffffffff822488c0 t smu7_set_watermarks_for_clocks_ranges +ffffffff82248b00 t smu7_get_max_high_clocks +ffffffff82248b80 t smu7_power_off_asic +ffffffff82248bd0 t smu7_force_clock_level +ffffffff82248ce0 t smu7_print_clock_levels +ffffffff822492c0 t smu7_get_sclk_od +ffffffff82249320 t smu7_set_sclk_od +ffffffff822493e0 t smu7_get_mclk_od +ffffffff82249440 t smu7_set_mclk_od +ffffffff82249500 t smu7_read_sensor +ffffffff822497d0 t smu7_avfs_control +ffffffff822498a0 t smu7_notify_cac_buffer_info +ffffffff82249a40 t smu7_get_thermal_temperature_range +ffffffff82249ad0 t smu7_get_power_profile_mode +ffffffff82249b10 t smu7_set_power_profile_mode +ffffffff82249d70 t smu7_odn_edit_dpm_table +ffffffff82249f20 t phm_add_voltage +ffffffff8224a030 t smu7_get_profiling_clk +ffffffff8224a1f0 t smu7_check_dpm_table_updated +ffffffff8224a340 t smu7_odn_initial_default_setting +ffffffff8224a470 t smu7_set_dpm_event_sources +ffffffff8224a590 t smu7_get_pp_table_entry_callback_func_v0 +ffffffff8224aa90 t smu7_get_pp_table_entry_callback_func_v1 +ffffffff8224c000 T smu7_enable_didt_config +ffffffff8224c3c0 t smu7_program_pt_config_registers +ffffffff8224c5b0 t smu7_enable_didt +ffffffff8224c7a0 T smu7_disable_didt_config +ffffffff8224c860 T smu7_enable_smc_cac +ffffffff8224c8f0 T smu7_disable_smc_cac +ffffffff8224c980 T smu7_set_power_limit +ffffffff8224c9e0 T smu7_enable_power_containment +ffffffff8224cb60 T smu7_disable_power_containment +ffffffff8224cc80 T smu7_power_control_set_level +ffffffff8224d000 T smu7_fan_ctrl_get_fan_speed_info +ffffffff8224d080 T smu7_fan_ctrl_get_fan_speed_pwm +ffffffff8224d140 T smu7_fan_ctrl_get_fan_speed_rpm +ffffffff8224d1f0 T smu7_fan_ctrl_set_static_mode +ffffffff8224d320 T smu7_fan_ctrl_set_default_mode +ffffffff8224d400 T smu7_fan_ctrl_start_smc_fan_control +ffffffff8224d520 T smu7_fan_ctrl_stop_smc_fan_control +ffffffff8224d540 T smu7_fan_ctrl_set_fan_speed_pwm +ffffffff8224d720 T smu7_fan_ctrl_reset_fan_speed_to_default +ffffffff8224d900 T smu7_fan_ctrl_set_fan_speed_rpm +ffffffff8224dae0 T smu7_thermal_get_temperature +ffffffff8224db40 T smu7_thermal_disable_alert +ffffffff8224dbe0 T smu7_thermal_stop_thermal_controller +ffffffff8224dd60 T smu7_start_thermal_controller +ffffffff8224e110 T smu7_thermal_ctrl_uninitialize_thermal_controller +ffffffff8224f000 T smu8_init_function_pointers +ffffffff8224f040 t smu8_hwmgr_backend_init +ffffffff8224f520 t smu8_hwmgr_backend_fini +ffffffff8224f590 t smu8_setup_asic_task +ffffffff8224fab0 t smu8_get_power_state_size +ffffffff8224fae0 t smu8_apply_state_adjust_rules +ffffffff8224fc30 t smu8_dpm_force_dpm_level +ffffffff8224ff30 t smu8_enable_dpm_tasks +ffffffff82250080 t smu8_disable_dpm_tasks +ffffffff82250160 t smu8_dpm_patch_boot_state +ffffffff822501c0 t smu8_dpm_get_pp_table_entry +ffffffff82250220 t smu8_dpm_get_num_of_pp_table_entries +ffffffff82250270 t smu8_dpm_powerdown_uvd +ffffffff822502b0 t smu8_dpm_powergate_vce +ffffffff82250480 t smu8_dpm_powergate_uvd +ffffffff822506b0 t smu8_dpm_powergate_acp +ffffffff82250710 t smu8_dpm_get_mclk +ffffffff82250740 t smu8_dpm_get_sclk +ffffffff822507b0 t smu8_set_power_state_tasks +ffffffff82250af0 t smu8_set_cpu_power_state +ffffffff82250b60 t smu8_store_cc6_data +ffffffff82250be0 t smu8_get_dal_power_level +ffffffff82250c60 t smu8_get_performance_level +ffffffff82250d50 t smu8_get_current_shallow_sleep_clocks +ffffffff82250db0 t smu8_get_clock_by_type +ffffffff82250ef0 t smu8_get_max_high_clocks +ffffffff82250fb0 t smu8_power_off_asic +ffffffff82251030 t smu8_force_clock_level +ffffffff82251090 t smu8_print_clock_levels +ffffffff82251260 t smu8_read_sensor +ffffffff82251560 t smu8_notify_cac_buffer_info +ffffffff82251610 t smu8_get_thermal_temperature_range +ffffffff82251680 t smu8_dpm_get_pp_table_entry_callback +ffffffff82252000 T smu9_baco_get_capability +ffffffff822520d0 T smu9_baco_get_state +ffffffff82253000 T convert_to_vid +ffffffff82253050 T convert_to_vddc +ffffffff822530a0 T phm_copy_clock_limits_array +ffffffff82253180 T phm_copy_overdrive_settings_limits_array +ffffffff82253260 T phm_set_field_to_u32 +ffffffff822532c0 T phm_wait_on_register +ffffffff822533d0 T phm_wait_on_indirect_register +ffffffff82253500 T phm_wait_for_register_unequal +ffffffff82253600 T phm_wait_for_indirect_register_unequal +ffffffff82253730 T phm_cf_want_uvd_power_gating +ffffffff82253760 T phm_cf_want_vce_power_gating +ffffffff82253790 T phm_trim_voltage_table +ffffffff822538c0 T phm_get_svi2_mvdd_voltage_table +ffffffff82253a50 T phm_get_svi2_vddci_voltage_table +ffffffff82253be0 T phm_get_svi2_vdd_voltage_table +ffffffff82253c80 T phm_trim_voltage_table_to_fit_state_table +ffffffff82253d60 T phm_reset_single_dpm_table +ffffffff82253e30 T phm_setup_pcie_table_entry +ffffffff82253e70 T phm_get_dpm_level_enable_mask_value +ffffffff82253f90 T phm_get_voltage_index +ffffffff82254010 T phm_get_voltage_id +ffffffff82254090 T phm_find_closest_vddci +ffffffff822540f0 T phm_find_boot_level +ffffffff82254160 T phm_get_sclk_for_voltage_evv +ffffffff82254210 T phm_initializa_dynamic_state_adjustment_rule_settings +ffffffff82254320 T phm_get_lowest_enabled_level +ffffffff82254360 T phm_apply_dal_min_voltage_request +ffffffff82254430 T phm_get_voltage_evv_on_sclk +ffffffff822544d0 T phm_irq_process +ffffffff822546d0 t orderly_poweroff +ffffffff822546e0 T smu9_register_irq_handlers +ffffffff82254790 T smu_atom_get_data_table +ffffffff82254800 T smu_get_voltage_dependency_table_ppt_v1 +ffffffff822548e0 T smu_set_watermarks_for_clocks_ranges +ffffffff82255000 T tonga_baco_set_state +ffffffff82256000 T vega10_baco_set_state +ffffffff82257000 T vega10_enable_disable_vce_dpm +ffffffff82257090 T vega10_hwmgr_init +ffffffff822570f0 t vega10_hwmgr_backend_init +ffffffff82257ef0 t vega10_hwmgr_backend_fini +ffffffff82257f60 t vega10_setup_asic_task +ffffffff822580a0 t vega10_get_power_state_size +ffffffff822580d0 t vega10_apply_state_adjust_rules +ffffffff82258460 t vega10_dpm_force_dpm_level +ffffffff82258990 t vega10_enable_dpm_tasks +ffffffff8225b300 t vega10_disable_dpm_tasks +ffffffff8225b8e0 t vega10_patch_boot_state +ffffffff8225b910 t vega10_get_pp_table_entry +ffffffff8225b980 t vega10_power_gate_vce +ffffffff8225ba20 t vega10_power_gate_uvd +ffffffff8225bac0 t vega10_dpm_get_mclk +ffffffff8225bb60 t vega10_dpm_get_sclk +ffffffff8225bc00 t vega10_set_power_state_tasks +ffffffff8225c680 t vega10_notify_smc_display_config_after_ps_adjustment +ffffffff8225c830 t vega10_display_configuration_changed_task +ffffffff8225c8f0 t vega10_set_fan_control_mode +ffffffff8225c960 t vega10_get_fan_control_mode +ffffffff8225c9a0 t vega10_check_smc_update_required_for_display_configuration +ffffffff8225ca00 t vega10_check_states_equal +ffffffff8225cb60 t vega10_get_dal_power_level +ffffffff8225cba0 t vega10_get_performance_level +ffffffff8225cc30 t vega10_get_clock_by_type_with_latency +ffffffff8225ce60 t vega10_get_clock_by_type_with_voltage +ffffffff8225cf40 t vega10_set_watermarks_for_clocks_ranges +ffffffff8225cfa0 t vega10_display_clock_voltage_request +ffffffff8225d010 t vega10_power_off_asic +ffffffff8225d080 t vega10_force_clock_level +ffffffff8225d1b0 t vega10_emit_clock_levels +ffffffff8225d320 t vega10_print_clock_levels +ffffffff8225db00 t vega10_get_sclk_od +ffffffff8225db70 t vega10_set_sclk_od +ffffffff8225dc70 t vega10_get_mclk_od +ffffffff8225dce0 t vega10_set_mclk_od +ffffffff8225ddd0 t vega10_read_sensor +ffffffff8225e020 t vega10_avfs_enable +ffffffff8225e0e0 t vega10_notify_cac_buffer_info +ffffffff8225e190 t vega10_get_thermal_temperature_range +ffffffff8225e260 t vega10_get_power_profile_mode +ffffffff8225e2a0 t vega10_set_power_profile_mode +ffffffff8225e3c0 t vega10_odn_edit_dpm_table +ffffffff8225e980 t vega10_get_ppfeature_status +ffffffff8225ea00 t vega10_set_ppfeature_status +ffffffff8225eaa0 t vega10_set_mp1_state +ffffffff8225eb10 t vega10_disable_power_features_for_compute_performance +ffffffff8225ed00 t vega10_upload_dpm_bootup_level +ffffffff8225ee10 t vega10_upload_dpm_max_level +ffffffff8225eef0 t vega10_trim_voltage_table_to_fit_state_table +ffffffff8225eff0 t vega10_odn_initial_default_setting +ffffffff8225f1c0 t vega10_populate_all_graphic_levels +ffffffff8225f3c0 t vega10_populate_all_memory_levels +ffffffff8225f520 t vega10_populate_single_gfx_level +ffffffff8225f670 t vega10_populate_single_soc_level +ffffffff8225f7c0 t vega10_populate_single_memory_level +ffffffff8225f930 t vega10_get_pp_table_entry_callback_func +ffffffff8225fb50 t vega10_odn_update_power_state +ffffffff82260000 T vega10_enable_didt_config +ffffffff82261870 T vega10_disable_didt_config +ffffffff82261ab0 T vega10_initialize_power_tune_defaults +ffffffff82261be0 T vega10_set_power_limit +ffffffff82261c30 T vega10_enable_power_containment +ffffffff82261d50 T vega10_disable_power_containment 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vega10_thermal_disable_alert +ffffffff82265f00 T vega10_thermal_stop_thermal_controller +ffffffff82265f60 T vega10_enable_mgpu_fan_boost +ffffffff82266070 T vega10_start_thermal_controller +ffffffff822665f0 T vega10_thermal_ctrl_uninitialize_thermal_controller +ffffffff82267000 T vega12_baco_set_state +ffffffff82268000 T vega12_enable_disable_vce_dpm +ffffffff82268090 T vega12_hwmgr_init +ffffffff822680d0 t vega12_hwmgr_backend_init +ffffffff82268930 t vega12_hwmgr_backend_fini +ffffffff82268980 t vega12_setup_asic_task +ffffffff822689c0 t vega12_apply_clocks_adjust_rules +ffffffff82268da0 t vega12_dpm_force_dpm_level +ffffffff822691e0 t vega12_enable_dpm_tasks +ffffffff82269c50 t vega12_disable_dpm_tasks +ffffffff82269d40 t vega12_patch_boot_state +ffffffff82269d70 t vega12_power_gate_vce +ffffffff82269e10 t vega12_power_gate_uvd +ffffffff82269eb0 t vega12_dpm_get_mclk +ffffffff82269f00 t vega12_dpm_get_sclk +ffffffff82269f50 t vega12_notify_smc_display_config_after_ps_adjustment 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vega12_get_ppfeature_status +ffffffff8226b8a0 t vega12_set_ppfeature_status +ffffffff8226b940 t vega12_set_mp1_state +ffffffff8226b9b0 t vega12_get_gpu_metrics +ffffffff8226bc30 t vega12_upload_dpm_min_level +ffffffff8226be70 t vega12_upload_dpm_max_level +ffffffff8226c040 t vega12_setup_single_dpm_table +ffffffff8226d000 t vega12_pp_tables_initialize +ffffffff8226d5f0 t vega12_pp_tables_uninitialize +ffffffff8226e000 T vega12_fan_ctrl_get_fan_speed_info +ffffffff8226e040 T vega12_fan_ctrl_get_fan_speed_rpm +ffffffff8226e0a0 T vega12_fan_ctrl_start_smc_fan_control +ffffffff8226e0d0 T vega12_fan_ctrl_stop_smc_fan_control +ffffffff8226e100 T vega12_fan_ctrl_reset_fan_speed_to_default +ffffffff8226e130 T vega12_thermal_get_temperature +ffffffff8226e1c0 T vega12_thermal_disable_alert +ffffffff8226e240 T vega12_thermal_stop_thermal_controller +ffffffff8226e2c0 T vega12_start_thermal_controller +ffffffff8226f000 T vega20_baco_get_capability +ffffffff8226f0c0 T vega20_baco_get_state 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vega20_fan_ctrl_set_static_mode +ffffffff822795e0 T vega20_fan_ctrl_get_fan_speed_info +ffffffff82279620 T vega20_fan_ctrl_get_fan_speed_rpm +ffffffff82279680 T vega20_fan_ctrl_set_fan_speed_rpm +ffffffff82279810 T vega20_thermal_get_temperature +ffffffff822798a0 T vega20_thermal_disable_alert +ffffffff82279920 T vega20_thermal_stop_thermal_controller +ffffffff822799a0 T vega20_start_thermal_controller +ffffffff8227a000 t ci_smu_init +ffffffff8227a060 t ci_smu_fini +ffffffff8227a0b0 t ci_start_smu +ffffffff8227a0e0 t ci_send_msg_to_smc +ffffffff8227a180 t ci_send_msg_to_smc_with_parameter +ffffffff8227a230 t ci_update_smc_table +ffffffff8227a470 t ci_process_firmware_header +ffffffff8227a980 t ci_update_sclk_threshold +ffffffff8227abc0 t ci_thermal_setup_fan_table +ffffffff8227ae40 t ci_init_smc_table +ffffffff8227c8e0 t ci_populate_all_graphic_levels +ffffffff8227cdc0 t ci_populate_all_memory_levels +ffffffff8227d6b0 t ci_initialize_mc_reg_table +ffffffff8227e230 t ci_get_offsetof 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smum_upload_powerplay_table +ffffffff82292250 T smum_send_msg_to_smc +ffffffff82292310 T smum_send_msg_to_smc_with_parameter +ffffffff822923e0 T smum_init_smc_table +ffffffff82292420 T smum_populate_all_graphic_levels +ffffffff82292460 T smum_populate_all_memory_levels +ffffffff822924a0 T smum_initialize_mc_reg_table +ffffffff822924e0 T smum_is_dpm_running +ffffffff82292520 T smum_is_hw_avfs_present +ffffffff82292560 T smum_update_dpm_settings +ffffffff822925a0 T smum_smc_table_manager +ffffffff822925f0 T smum_stop_smc +ffffffff82293000 t tonga_smu_init +ffffffff82293090 t tonga_start_smu +ffffffff82293420 t tonga_update_smc_table +ffffffff822935c0 t tonga_process_firmware_header +ffffffff82293700 t tonga_update_sclk_threshold +ffffffff82293940 t tonga_thermal_setup_fan_table +ffffffff82293bc0 t tonga_init_smc_table +ffffffff82295a10 t tonga_populate_all_graphic_levels +ffffffff82295ff0 t tonga_populate_all_memory_levels +ffffffff822966d0 t tonga_initialize_mc_reg_table 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vega20_get_activity_monitor_coeff +ffffffff8229a2b0 T vega20_enable_smc_features +ffffffff8229a380 T vega20_get_enabled_smc_features +ffffffff8229a450 T vega20_set_pptable_driver_address +ffffffff8229a4e0 t vega20_smu_init +ffffffff8229a8a0 t vega20_smu_fini +ffffffff8229a9a0 t vega20_start_smu +ffffffff8229aa80 t vega20_get_argument +ffffffff8229aae0 t vega20_send_msg_to_smc +ffffffff8229ad30 t vega20_send_msg_to_smc_with_parameter +ffffffff8229afd0 t vega20_is_dpm_running +ffffffff8229b070 t vega20_smc_table_manager +ffffffff8229c000 t vegam_smu_init +ffffffff8229c090 t vegam_start_smu +ffffffff8229c460 t vegam_update_smc_table +ffffffff8229c6d0 t vegam_process_firmware_header +ffffffff8229c810 t vegam_update_sclk_threshold +ffffffff8229c8f0 t vegam_thermal_setup_fan_table +ffffffff8229c950 t vegam_thermal_avfs_enable +ffffffff8229c9e0 t vegam_init_smc_table +ffffffff8229e2c0 t vegam_populate_all_graphic_levels +ffffffff8229e9f0 t vegam_populate_all_memory_levels +ffffffff8229ed30 t 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smu_emit_ppclk_levels +ffffffff822a2a00 t smu_force_performance_level +ffffffff822a2c90 t smu_read_sensor +ffffffff822a2e80 t smu_get_performance_level +ffffffff822a2ef0 t smu_get_current_power_state +ffffffff822a2f50 t smu_get_fan_speed_rpm +ffffffff822a2fb0 t smu_set_fan_speed_rpm +ffffffff822a3060 t smu_get_power_num_states +ffffffff822a30e0 t smu_sys_get_pp_table +ffffffff822a3150 t smu_sys_set_pp_table +ffffffff822a3340 t smu_switch_power_profile +ffffffff822a3450 t smu_handle_dpm_task +ffffffff822a3500 t smu_load_microcode +ffffffff822a35e0 t smu_dpm_set_power_gate +ffffffff822a3960 t smu_set_power_limit +ffffffff822a3a90 t smu_get_power_profile_mode +ffffffff822a3af0 t smu_set_power_profile_mode +ffffffff822a3b50 t smu_od_edit_dpm_table +ffffffff822a3bb0 t smu_set_mp1_state +ffffffff822a3c00 t smu_gfx_state_change_set +ffffffff822a3c40 t smu_get_sclk +ffffffff822a3cb0 t smu_get_mclk +ffffffff822a3d30 t smu_display_configuration_change +ffffffff822a3dc0 t smu_get_clock_by_type_with_latency +ffffffff822a3e70 t smu_display_clock_voltage_request +ffffffff822a3ed0 t smu_enable_mgpu_fan_boost +ffffffff822a3f30 t smu_set_display_count +ffffffff822a3f90 t smu_set_deep_sleep_dcefclk +ffffffff822a3ff0 t smu_get_baco_capability +ffffffff822a4050 t smu_baco_set_state +ffffffff822a4130 t smu_sys_get_pp_feature_mask +ffffffff822a41a0 t smu_sys_set_pp_feature_mask +ffffffff822a4200 t smu_mode2_reset +ffffffff822a42a0 t smu_set_df_cstate +ffffffff822a4350 t smu_set_xgmi_pstate +ffffffff822a4400 t smu_sys_get_gpu_metrics +ffffffff822a4460 t smu_set_watermarks_for_clock_ranges +ffffffff822a44e0 t smu_display_disable_memory_clock_switch +ffffffff822a4540 t smu_get_max_sustainable_clocks_by_dc +ffffffff822a45a0 t smu_get_uclk_dpm_states +ffffffff822a4600 t smu_get_dpm_clock_table +ffffffff822a4660 t smu_get_prv_buffer_details +ffffffff822a46d0 t smu_adjust_power_state_dynamic +ffffffff822a4930 t smu_throttling_logging_work_fn +ffffffff822a4980 t smu_interrupt_work_fn +ffffffff822a49d0 t smu_smc_hw_setup +ffffffff822a5330 t smu_smc_hw_cleanup +ffffffff822a6000 T arcturus_set_ppt_funcs +ffffffff822a6050 t arcturus_run_btc +ffffffff822a6100 t arcturus_get_allowed_feature_mask +ffffffff822a6150 t arcturus_set_default_dpm_table +ffffffff822a6360 t arcturus_populate_umd_state_clk +ffffffff822a6420 t arcturus_print_clk_levels +ffffffff822a6670 t arcturus_force_clk_levels +ffffffff822a68b0 t arcturus_get_power_profile_mode +ffffffff822a6b40 t arcturus_set_power_profile_mode +ffffffff822a6e30 t arcturus_dpm_set_vcn_enable +ffffffff822a6f00 t arcturus_read_sensor +ffffffff822a70e0 t arcturus_is_dpm_running +ffffffff822a7130 t arcturus_get_fan_speed_pwm +ffffffff822a7270 t arcturus_get_fan_speed_rpm +ffffffff822a7370 t arcturus_get_thermal_temperature_range +ffffffff822a7460 t arcturus_set_performance_level +ffffffff822a7570 t arcturus_dump_pptable +ffffffff822a75a0 t arcturus_get_power_limit +ffffffff822a76a0 t arcturus_set_df_cstate +ffffffff822a77b0 t arcturus_allow_xgmi_power_down +ffffffff822a78b0 t arcturus_i2c_control_init +ffffffff822a79e0 t arcturus_i2c_control_fini +ffffffff822a7a20 t arcturus_get_unique_id +ffffffff822a7b40 t arcturus_init_smc_tables +ffffffff822a7cb0 t arcturus_setup_pptable +ffffffff822a7de0 t arcturus_set_fan_speed_pwm +ffffffff822a7f80 t arcturus_set_fan_speed_rpm +ffffffff822a8090 t arcturus_log_thermal_throttling_event +ffffffff822a8480 t arcturus_get_gpu_metrics +ffffffff822a8690 t arcturus_get_fan_parameters +ffffffff822a86d0 t arcturus_get_current_clk_freq_by_table +ffffffff822a8810 t arcturus_get_smu_metrics_data +ffffffff822a8a80 t arcturus_upload_dpm_level +ffffffff822a8b70 t arcturus_i2c_xfer +ffffffff822a8e20 t arcturus_i2c_func +ffffffff822a8e50 t arcturus_set_fan_static_mode +ffffffff822aa000 T cyan_skillfish_set_ppt_funcs +ffffffff822aa030 t cyan_skillfish_print_clk_levels +ffffffff822aa150 t cyan_skillfish_od_edit_dpm_table +ffffffff822aa440 t cyan_skillfish_read_sensor +ffffffff822aa5f0 t cyan_skillfish_is_dpm_running +ffffffff822aa690 t cyan_skillfish_init_smc_tables +ffffffff822aa760 t cyan_skillfish_get_enabled_mask +ffffffff822aa7a0 t cyan_skillfish_get_dpm_ultimate_freq +ffffffff822aa860 t cyan_skillfish_get_gpu_metrics +ffffffff822aab00 t cyan_skillfish_get_smu_metrics_data +ffffffff822ab000 T navi10_set_ppt_funcs +ffffffff822ab050 t navi10_run_btc +ffffffff822ab0d0 t navi10_get_allowed_feature_mask +ffffffff822ab390 t navi10_set_default_dpm_table +ffffffff822ab800 t navi10_populate_umd_state_clk +ffffffff822ab970 t navi10_print_clk_levels +ffffffff822abb00 t navi10_emit_clk_levels +ffffffff822abd40 t navi10_force_clk_levels +ffffffff822abe70 t navi10_od_edit_dpm_table +ffffffff822ac4f0 t navi10_get_clock_by_type_with_latency +ffffffff822ac5f0 t navi10_get_power_profile_mode +ffffffff822ac850 t navi10_set_power_profile_mode +ffffffff822acb10 t navi10_dpm_set_vcn_enable +ffffffff822acb90 t navi10_dpm_set_jpeg_enable +ffffffff822acc00 t navi10_read_sensor +ffffffff822acd80 t navi10_pre_display_config_changed +ffffffff822ace10 t navi10_display_config_changed +ffffffff822ace90 t navi10_notify_smc_display_config +ffffffff822ad020 t navi10_is_dpm_running +ffffffff822ad070 t navi10_get_fan_speed_rpm +ffffffff822ad100 t navi10_set_watermarks_table +ffffffff822ad2a0 t navi10_get_thermal_temperature_range +ffffffff822ad390 t navi10_get_uclk_dpm_states +ffffffff822ad4a0 t navi10_set_default_od_settings +ffffffff822ad700 t navi10_display_disable_memory_clock_switch +ffffffff822ad780 t navi10_get_power_limit +ffffffff822ad8a0 t navi10_update_pcie_parameters +ffffffff822ada00 t navi10_i2c_control_init +ffffffff822adb30 t navi10_i2c_control_fini +ffffffff822adb70 t navi10_init_smc_tables +ffffffff822adda0 t navi10_setup_pptable +ffffffff822adfb0 t navi10_baco_enter +ffffffff822ae000 t navi10_baco_exit +ffffffff822ae100 t navi1x_get_gpu_metrics +ffffffff822aeaa0 t navi10_enable_mgpu_fan_boost +ffffffff822aeb10 t navi10_get_fan_parameters +ffffffff822aeb50 t navi10_post_smu_init +ffffffff822aee40 t navi10_get_default_config_table_settings +ffffffff822aee90 t navi10_set_config_table +ffffffff822aef40 t navi1x_get_smu_metrics_data +ffffffff822af3a0 t navi10_get_smu_metrics_data +ffffffff822af5d0 t navi10_i2c_xfer +ffffffff822af880 t navi10_i2c_func +ffffffff822af8b0 t navi10_umc_hybrid_cdr_workaround +ffffffff822b0000 T sienna_cichlid_set_ppt_funcs +ffffffff822b0050 t sienna_cichlid_run_btc +ffffffff822b00d0 t sienna_cichlid_get_allowed_feature_mask +ffffffff822b0350 t sienna_cichlid_set_default_dpm_table +ffffffff822b0920 t sienna_cichlid_populate_umd_state_clk +ffffffff822b09d0 t sienna_cichlid_print_clk_levels +ffffffff822b0bb0 t sienna_cichlid_force_clk_levels +ffffffff822b0ce0 t sienna_cichlid_od_edit_dpm_table +ffffffff822b1270 t sienna_cichlid_get_power_profile_mode +ffffffff822b14d0 t sienna_cichlid_set_power_profile_mode +ffffffff822b1790 t sienna_cichlid_dpm_set_vcn_enable +ffffffff822b1850 t sienna_cichlid_dpm_set_jpeg_enable +ffffffff822b18d0 t sienna_cichlid_read_sensor +ffffffff822b1bd0 t sienna_cichlid_pre_display_config_changed +ffffffff822b1c00 t sienna_cichlid_display_config_changed +ffffffff822b1c60 t sienna_cichlid_notify_smc_display_config +ffffffff822b1df0 t sienna_cichlid_is_dpm_running +ffffffff822b1e40 t sienna_cichlid_get_fan_speed_rpm +ffffffff822b1f40 t sienna_cichlid_set_watermarks_table +ffffffff822b20d0 t sienna_cichlid_get_thermal_temperature_range +ffffffff822b21a0 t sienna_cichlid_get_uclk_dpm_states +ffffffff822b22c0 t sienna_cichlid_set_default_od_settings +ffffffff822b2410 t sienna_cichlid_display_disable_memory_clock_switch +ffffffff822b2490 t sienna_cichlid_dump_pptable +ffffffff822b24c0 t sienna_cichlid_get_power_limit +ffffffff822b2580 t sienna_cichlid_update_pcie_parameters +ffffffff822b26e0 t sienna_cichlid_i2c_control_init +ffffffff822b2810 t sienna_cichlid_i2c_control_fini +ffffffff822b2850 t sienna_cichlid_get_unique_id +ffffffff822b29a0 t sienna_cichlid_init_smc_tables +ffffffff822b2cb0 t sienna_cichlid_set_mp1_state +ffffffff822b2cf0 t sienna_cichlid_setup_pptable +ffffffff822b3150 t sienna_cichlid_system_features_control +ffffffff822b31e0 t sienna_cichlid_baco_enter +ffffffff822b3230 t sienna_cichlid_baco_exit +ffffffff822b3330 t sienna_cichlid_is_mode1_reset_supported +ffffffff822b33b0 t sienna_cichlid_is_mode2_reset_supported +ffffffff822b33e0 t sienna_cichlid_mode2_reset +ffffffff822b3510 t sienna_cichlid_get_dpm_ultimate_freq +ffffffff822b3520 t sienna_cichlid_get_gpu_metrics +ffffffff822b39a0 t sienna_cichlid_enable_mgpu_fan_boost +ffffffff822b39f0 t sienna_cichlid_get_fan_parameters +ffffffff822b3a30 t sienna_cichlid_gpo_control +ffffffff822b3ae0 t sienna_cichlid_get_ecc_info +ffffffff822b3bd0 t sienna_cichlid_stb_get_data_direct +ffffffff822b3c70 t sienna_cichlid_get_default_config_table_settings +ffffffff822b3cd0 t sienna_cichlid_set_config_table +ffffffff822b3da0 t sienna_cichlid_get_smu_metrics_data +ffffffff822b41e0 t sienna_cichlid_get_throttler_status_locked +ffffffff822b4360 t sienna_cichlid_get_smartshift_power_percentage +ffffffff822b4490 t sienna_cichlid_i2c_xfer +ffffffff822b4740 t sienna_cichlid_i2c_func +ffffffff822b5000 T smu_v11_0_init_microcode +ffffffff822b52a0 T smu_v11_0_fini_microcode +ffffffff822b5320 T smu_v11_0_load_microcode +ffffffff822b5460 T smu_v11_0_check_fw_status +ffffffff822b54b0 T smu_v11_0_check_fw_version +ffffffff822b5660 T smu_v11_0_setup_pptable +ffffffff822b5780 T smu_v11_0_init_smc_tables +ffffffff822b58d0 T smu_v11_0_fini_smc_tables +ffffffff822b5b00 T smu_v11_0_init_power +ffffffff822b5b80 T smu_v11_0_fini_power +ffffffff822b5be0 T smu_v11_0_get_vbios_bootup_values +ffffffff822b5f30 T smu_v11_0_notify_memory_pool_location +ffffffff822b6020 T smu_v11_0_set_min_deep_sleep_dcefclk +ffffffff822b60a0 T smu_v11_0_set_driver_table_location +ffffffff822b6110 T smu_v11_0_set_tool_table_location +ffffffff822b6180 T smu_v11_0_init_display_count +ffffffff822b61d0 T smu_v11_0_set_allowed_mask +ffffffff822b62a0 T smu_v11_0_system_features_control +ffffffff822b62c0 T smu_v11_0_notify_display_change +ffffffff822b6330 T smu_v11_0_init_max_sustainable_clocks +ffffffff822b65a0 t smu_v11_0_get_max_sustainable_clock +ffffffff822b66c0 T smu_v11_0_get_current_power_limit +ffffffff822b6790 T smu_v11_0_set_power_limit +ffffffff822b68d0 T smu_v11_0_interrupt_work +ffffffff822b6950 T smu_v11_0_enable_thermal_alert +ffffffff822b69e0 T smu_v11_0_disable_thermal_alert +ffffffff822b6a00 T smu_v11_0_get_gfx_vdd +ffffffff822b6ac0 T smu_v11_0_display_clock_voltage_request +ffffffff822b6c00 T smu_v11_0_set_hard_freq_limited_range +ffffffff822b6ce0 T smu_v11_0_gfx_off_control +ffffffff822b6d50 T smu_v11_0_get_fan_control_mode +ffffffff822b6da0 T smu_v11_0_set_fan_speed_pwm +ffffffff822b6f30 t smu_v11_0_set_fan_static_mode +ffffffff822b70e0 T smu_v11_0_set_fan_speed_rpm +ffffffff822b7200 T smu_v11_0_get_fan_speed_pwm +ffffffff822b7330 T smu_v11_0_get_fan_speed_rpm +ffffffff822b7430 T smu_v11_0_set_fan_control_mode +ffffffff822b75d0 T smu_v11_0_set_xgmi_pstate +ffffffff822b75f0 T smu_v11_0_register_irq_handler +ffffffff822b76b0 T smu_v11_0_get_max_sustainable_clocks_by_dc +ffffffff822b7740 T smu_v11_0_set_azalia_d3_pme +ffffffff822b7760 T smu_v11_0_baco_set_armd3_sequence +ffffffff822b7780 T smu_v11_0_baco_is_support +ffffffff822b7800 T smu_v11_0_baco_get_state +ffffffff822b7830 T smu_v11_0_baco_set_state +ffffffff822b7ae0 T smu_v11_0_baco_enter +ffffffff822b7bd0 T smu_v11_0_baco_exit +ffffffff822b7c70 T smu_v11_0_mode1_reset +ffffffff822b7cf0 T smu_v11_0_handle_passthrough_sbr +ffffffff822b7d10 T smu_v11_0_get_dpm_ultimate_freq +ffffffff822b7e50 T smu_v11_0_set_soft_freq_limited_range +ffffffff822b7f30 T smu_v11_0_set_performance_level +ffffffff822b8280 T smu_v11_0_set_power_source +ffffffff822b82e0 T smu_v11_0_get_dpm_freq_by_index +ffffffff822b8380 T smu_v11_0_get_dpm_level_count +ffffffff822b8410 T smu_v11_0_set_single_dpm_table +ffffffff822b85f0 T smu_v11_0_get_dpm_level_range +ffffffff822b8750 T smu_v11_0_get_current_pcie_link_width_level +ffffffff822b87a0 T smu_v11_0_get_current_pcie_link_width +ffffffff822b8800 T smu_v11_0_get_current_pcie_link_speed_level +ffffffff822b8850 T smu_v11_0_get_current_pcie_link_speed +ffffffff822b88a0 T smu_v11_0_gfx_ulv_control +ffffffff822b8910 T smu_v11_0_deep_sleep_control +ffffffff822b8ac0 T smu_v11_0_restore_user_od_settings +ffffffff822b8b50 T smu_v11_0_set_smu_mailbox_registers +ffffffff822b8bc0 t smu_v11_0_set_irq_state +ffffffff822b9140 t smu_v11_0_irq_process +ffffffff822b9440 t orderly_poweroff +ffffffff822ba000 T vangogh_set_ppt_funcs +ffffffff822ba040 t vangogh_set_default_dpm_tables +ffffffff822ba060 t vangogh_common_print_clk_levels +ffffffff822ba4b0 t vangogh_force_clk_levels +ffffffff822ba6e0 t vangogh_od_edit_dpm_table +ffffffff822bac30 t vangogh_get_power_profile_mode +ffffffff822bad00 t vangogh_set_power_profile_mode +ffffffff822bae20 t vangogh_dpm_set_vcn_enable +ffffffff822bae70 t vangogh_dpm_set_jpeg_enable +ffffffff822baec0 t vangogh_read_sensor +ffffffff822baff0 t vangogh_is_dpm_running +ffffffff822bb050 t vangogh_set_watermarks_table +ffffffff822bb1e0 t vangogh_set_performance_level +ffffffff822bbb00 t vangogh_get_power_limit +ffffffff822bbc80 t vangogh_get_ppt_limit +ffffffff822bbce0 t vangogh_get_dpm_clock_table +ffffffff822bbe50 t vangogh_init_smc_tables +ffffffff822bc0a0 t vangogh_system_features_control +ffffffff822bc0f0 t vangogh_set_power_limit +ffffffff822bc250 t vangogh_get_gfxoff_status +ffffffff822bc2d0 t vangogh_get_gfxoff_entrycount +ffffffff822bc340 t vangogh_set_gfxoff_residency +ffffffff822bc3b0 t vangogh_get_gfxoff_residency +ffffffff822bc3e0 t vangogh_mode2_reset +ffffffff822bc520 t vangogh_common_get_gpu_metrics +ffffffff822bcb60 t vangogh_post_smu_init +ffffffff822bcd00 t vangogh_set_fine_grain_gfx_freq_parameters +ffffffff822bcd70 t vangogh_common_get_smu_metrics_data +ffffffff822bd0c0 t vangogh_force_dpm_limit_value +ffffffff822bd200 t vangogh_get_dpm_ultimate_freq +ffffffff822bd5c0 t vangogh_set_soft_freq_limited_range +ffffffff822be000 T renoir_set_ppt_funcs +ffffffff822be0a0 t renoir_get_current_power_state +ffffffff822be110 t renoir_print_clk_levels +ffffffff822be370 t renoir_force_clk_levels +ffffffff822be5a0 t renoir_od_edit_dpm_table +ffffffff822be8a0 t renoir_get_power_profile_mode +ffffffff822be970 t renoir_set_power_profile_mode +ffffffff822bea90 t renoir_dpm_set_vcn_enable +ffffffff822beb10 t renoir_dpm_set_jpeg_enable +ffffffff822beb90 t renoir_read_sensor +ffffffff822bef80 t renoir_is_dpm_running +ffffffff822befb0 t renoir_set_watermarks_table +ffffffff822bf150 t renoir_set_performance_level +ffffffff822bf690 t renoir_get_dpm_clock_table +ffffffff822bf9d0 t renoir_init_smc_tables +ffffffff822bfb40 t renoir_get_enabled_mask +ffffffff822bfb80 t renoir_get_dpm_ultimate_freq +ffffffff822bfe20 t renoir_get_gpu_metrics +ffffffff822c0040 t renoir_gfx_state_change_set +ffffffff822c0070 t renoir_set_fine_grain_gfx_freq_parameters +ffffffff822c0100 t renoir_force_dpm_limit_value +ffffffff822c1000 T smu_v12_0_check_fw_status +ffffffff822c1050 T smu_v12_0_check_fw_version +ffffffff822c1110 T smu_v12_0_powergate_sdma +ffffffff822c1150 T smu_v12_0_set_gfx_cgpg +ffffffff822c11b0 T smu_v12_0_get_gfxoff_status +ffffffff822c1230 T smu_v12_0_gfx_off_control +ffffffff822c1340 T smu_v12_0_fini_smc_tables +ffffffff822c13f0 T smu_v12_0_set_default_dpm_tables +ffffffff822c1410 T smu_v12_0_mode2_reset +ffffffff822c1430 T smu_v12_0_set_soft_freq_limited_range +ffffffff822c1560 T smu_v12_0_set_driver_table_location +ffffffff822c15d0 T smu_v12_0_get_vbios_bootup_values +ffffffff822c2000 T aldebaran_set_ppt_funcs +ffffffff822c2040 t aldebaran_get_allowed_feature_mask +ffffffff822c2090 t aldebaran_set_default_dpm_table +ffffffff822c2290 t aldebaran_populate_umd_state_clk +ffffffff822c2390 t aldebaran_print_clk_levels +ffffffff822c2550 t aldebaran_force_clk_levels +ffffffff822c2700 t aldebaran_usr_edit_dpm_table +ffffffff822c2920 t aldebaran_read_sensor +ffffffff822c2bc0 t aldebaran_is_dpm_running +ffffffff822c2c10 t aldebaran_get_thermal_temperature_range +ffffffff822c2cd0 t aldebaran_set_performance_level +ffffffff822c2d70 t aldebaran_get_power_limit +ffffffff822c2f00 t aldebaran_set_df_cstate +ffffffff822c2f80 t aldebaran_allow_xgmi_power_down +ffffffff822c3010 t aldebaran_i2c_control_init +ffffffff822c30d0 t aldebaran_i2c_control_fini +ffffffff822c3110 t aldebaran_get_unique_id +ffffffff822c31f0 t aldebaran_init_smc_tables +ffffffff822c3380 t aldebaran_set_mp1_state +ffffffff822c33c0 t aldebaran_setup_pptable +ffffffff822c3480 t aldebaran_system_features_control +ffffffff822c35e0 t aldebaran_set_power_limit +ffffffff822c3670 t aldebaran_is_baco_supported +ffffffff822c36a0 t aldebaran_is_mode1_reset_supported +ffffffff822c36d0 t aldebaran_is_mode2_reset_supported +ffffffff822c3700 t aldebaran_mode1_reset +ffffffff822c37e0 t aldebaran_mode2_reset +ffffffff822c3990 t aldebaran_set_soft_freq_limited_range +ffffffff822c3b90 t aldebaran_log_thermal_throttling_event +ffffffff822c3ea0 t aldebaran_get_gpu_metrics +ffffffff822c4130 t aldebaran_smu_handle_passthrough_sbr +ffffffff822c4150 t aldebaran_smu_send_hbm_bad_page_num +ffffffff822c41d0 t aldebaran_get_ecc_info +ffffffff822c4330 t aldebaran_send_hbm_bad_channel_flag +ffffffff822c4410 t aldebaran_get_current_clk_freq_by_table +ffffffff822c4550 t aldebaran_get_smu_metrics_data +ffffffff822c47a0 t aldebaran_upload_dpm_level +ffffffff822c4890 t aldebaran_i2c_xfer +ffffffff822c4b40 t aldebaran_i2c_func +ffffffff822c5000 T smu_v13_0_init_microcode +ffffffff822c51d0 T smu_v13_0_fini_microcode +ffffffff822c5250 T smu_v13_0_load_microcode +ffffffff822c5280 T smu_v13_0_init_pptable_microcode +ffffffff822c5420 T smu_v13_0_get_pptable_from_firmware +ffffffff822c5540 T smu_v13_0_check_fw_status +ffffffff822c55b0 T smu_v13_0_check_fw_version +ffffffff822c56e0 T smu_v13_0_setup_pptable +ffffffff822c5880 T smu_v13_0_init_smc_tables +ffffffff822c59c0 T smu_v13_0_fini_smc_tables +ffffffff822c5bb0 T smu_v13_0_init_power +ffffffff822c5c30 T smu_v13_0_fini_power +ffffffff822c5cb0 T smu_v13_0_get_vbios_bootup_values +ffffffff822c5f50 T smu_v13_0_notify_memory_pool_location +ffffffff822c6010 T smu_v13_0_set_min_deep_sleep_dcefclk +ffffffff822c6090 T smu_v13_0_set_driver_table_location +ffffffff822c6100 T smu_v13_0_set_tool_table_location +ffffffff822c6170 T smu_v13_0_init_display_count +ffffffff822c61b0 T smu_v13_0_set_allowed_mask +ffffffff822c6280 T smu_v13_0_gfx_off_control +ffffffff822c62f0 T smu_v13_0_system_features_control +ffffffff822c6310 T smu_v13_0_notify_display_change +ffffffff822c6380 T smu_v13_0_init_max_sustainable_clocks +ffffffff822c65f0 t smu_v13_0_get_max_sustainable_clock +ffffffff822c6710 T smu_v13_0_get_current_power_limit +ffffffff822c67e0 T smu_v13_0_set_power_limit +ffffffff822c6900 T smu_v13_0_enable_thermal_alert +ffffffff822c6980 T smu_v13_0_disable_thermal_alert +ffffffff822c69c0 T smu_v13_0_get_gfx_vdd +ffffffff822c6a80 T smu_v13_0_display_clock_voltage_request +ffffffff822c6bc0 T smu_v13_0_set_hard_freq_limited_range +ffffffff822c6ca0 T smu_v13_0_get_fan_control_mode +ffffffff822c6ce0 T smu_v13_0_set_fan_speed_pwm +ffffffff822c6ef0 t smu_v13_0_set_fan_static_mode +ffffffff822c70b0 T smu_v13_0_set_fan_control_mode +ffffffff822c7210 T smu_v13_0_set_fan_speed_rpm +ffffffff822c73b0 T smu_v13_0_set_xgmi_pstate +ffffffff822c73d0 T smu_v13_0_register_irq_handler +ffffffff822c7490 T smu_v13_0_get_max_sustainable_clocks_by_dc +ffffffff822c7520 T smu_v13_0_set_azalia_d3_pme +ffffffff822c7540 T smu_v13_0_wait_for_event +ffffffff822c7590 T smu_v13_0_get_dpm_ultimate_freq +ffffffff822c76e0 T smu_v13_0_set_soft_freq_limited_range +ffffffff822c77c0 T smu_v13_0_set_performance_level +ffffffff822c7f50 T smu_v13_0_set_power_source +ffffffff822c7fb0 T smu_v13_0_set_single_dpm_table +ffffffff822c8240 T smu_v13_0_get_dpm_level_range +ffffffff822c83c0 T smu_v13_0_get_current_pcie_link_width_level +ffffffff822c8410 T smu_v13_0_get_current_pcie_link_width +ffffffff822c8470 T smu_v13_0_get_current_pcie_link_speed_level +ffffffff822c84c0 T smu_v13_0_get_current_pcie_link_speed +ffffffff822c8510 T smu_v13_0_set_vcn_enable +ffffffff822c85c0 T smu_v13_0_set_jpeg_enable +ffffffff822c85e0 T smu_v13_0_run_btc +ffffffff822c8660 T smu_v13_0_gpo_control +ffffffff822c86f0 T smu_v13_0_deep_sleep_control +ffffffff822c8950 T smu_v13_0_gfx_ulv_control +ffffffff822c89c0 T smu_v13_0_baco_set_armd3_sequence +ffffffff822c89e0 T smu_v13_0_baco_is_support +ffffffff822c8a60 T smu_v13_0_baco_get_state +ffffffff822c8a90 T smu_v13_0_baco_set_state +ffffffff822c8b50 T smu_v13_0_baco_enter +ffffffff822c8c60 T smu_v13_0_baco_exit +ffffffff822c8cf0 T smu_v13_0_set_gfx_power_up_by_imu +ffffffff822c8d20 T smu_v13_0_od_edit_dpm_table +ffffffff822c8ff0 T smu_v13_0_set_default_dpm_tables +ffffffff822c9010 T smu_v13_0_set_smu_mailbox_registers +ffffffff822c9080 T smu_v13_0_mode1_reset +ffffffff822c9100 t smu_v13_0_set_irq_state +ffffffff822c9680 t smu_v13_0_irq_process +ffffffff822c9970 t orderly_poweroff +ffffffff822ca000 T smu_v13_0_0_set_ppt_funcs +ffffffff822ca0e0 t smu_v13_0_0_get_allowed_feature_mask +ffffffff822ca220 t smu_v13_0_0_set_default_dpm_table +ffffffff822ca640 t smu_v13_0_0_populate_umd_state_clk +ffffffff822ca770 t smu_v13_0_0_print_clk_levels +ffffffff822ca890 t smu_v13_0_0_force_clk_levels +ffffffff822caa10 t smu_v13_0_0_get_power_profile_mode +ffffffff822cac70 t smu_v13_0_0_set_power_profile_mode +ffffffff822caec0 t smu_v13_0_0_read_sensor +ffffffff822cb0e0 t smu_v13_0_0_is_dpm_running +ffffffff822cb130 t smu_v13_0_0_get_fan_speed_pwm +ffffffff822cb210 t smu_v13_0_0_get_fan_speed_rpm +ffffffff822cb280 t smu_v13_0_0_get_thermal_temperature_range +ffffffff822cb380 t smu_v13_0_0_dump_pptable +ffffffff822cb3b0 t smu_v13_0_0_get_power_limit +ffffffff822cb490 t smu_v13_0_0_set_df_cstate +ffffffff822cb4b0 t smu_v13_0_0_update_pcie_parameters +ffffffff822cb590 t smu_v13_0_0_i2c_control_init +ffffffff822cb6c0 t smu_v13_0_0_i2c_control_fini +ffffffff822cb700 t smu_v13_0_0_get_unique_id +ffffffff822cb7b0 t smu_v13_0_0_init_smc_tables +ffffffff822cb9a0 t smu_v13_0_0_set_mp1_state +ffffffff822cb9e0 t smu_v13_0_0_setup_pptable +ffffffff822cbb20 t smu_v13_0_0_system_features_control +ffffffff822cbb30 t smu_v13_0_0_baco_enter +ffffffff822cbb80 t smu_v13_0_0_baco_exit +ffffffff822cbbe0 t smu_v13_0_0_is_mode1_reset_supported +ffffffff822cbc30 t smu_v13_0_0_mode1_reset +ffffffff822cbcc0 t smu_v13_0_0_get_dpm_ultimate_freq +ffffffff822cbdd0 t smu_v13_0_0_get_gpu_metrics +ffffffff822cc1f0 t smu_v13_0_0_enable_mgpu_fan_boost +ffffffff822cc240 t smu_v13_0_0_smu_send_bad_mem_page_num +ffffffff822cc2c0 t smu_v13_0_0_send_bad_mem_channel_flag +ffffffff822cc340 t smu_v13_0_0_get_smu_metrics_data +ffffffff822cc6b0 t smu_v13_0_get_throttler_status +ffffffff822cc870 t smu_v13_0_0_i2c_xfer +ffffffff822ccb20 t smu_v13_0_0_i2c_func +ffffffff822cd000 T smu_v13_0_4_set_ppt_funcs +ffffffff822cd0b0 t smu_v13_0_4_print_clk_levels +ffffffff822cd170 t smu_v13_0_4_force_clk_levels +ffffffff822cd410 t smu_v13_0_4_read_sensor +ffffffff822cd6c0 t smu_v13_0_4_is_dpm_running +ffffffff822cd710 t smu_v13_0_4_set_watermarks_table +ffffffff822cd8a0 t smu_v13_0_4_set_performance_level +ffffffff822cddd0 t smu_v13_0_4_init_smc_tables +ffffffff822cdf40 t smu_v13_0_4_fini_smc_tables +ffffffff822cdff0 t smu_v13_0_4_system_features_control +ffffffff822ce040 t smu_v13_0_4_mode2_reset +ffffffff822ce060 t smu_v13_0_4_get_dpm_ultimate_freq +ffffffff822ce480 t smu_v13_0_4_get_gpu_metrics +ffffffff822ce650 t smu_v13_0_4_set_fine_grain_gfx_freq_parameters +ffffffff822ce6a0 t smu_v13_0_4_get_smu_metrics_data +ffffffff822cf000 T smu_v13_0_5_set_ppt_funcs +ffffffff822cf090 t smu_v13_0_5_set_default_dpm_tables +ffffffff822cf0b0 t smu_v13_0_5_print_clk_levels +ffffffff822cf160 t smu_v13_0_5_force_clk_levels +ffffffff822cf2c0 t smu_v13_0_5_od_edit_dpm_table +ffffffff822cf590 t smu_v13_0_5_dpm_set_vcn_enable +ffffffff822cf5b0 t smu_v13_0_5_dpm_set_jpeg_enable +ffffffff822cf5d0 t smu_v13_0_5_read_sensor +ffffffff822cf7f0 t smu_v13_0_5_is_dpm_running +ffffffff822cf840 t smu_v13_0_5_set_watermarks_table +ffffffff822cf9d0 t smu_v13_0_5_set_performance_level +ffffffff822cfbb0 t smu_v13_0_5_init_smc_tables +ffffffff822cfd20 t smu_v13_0_5_fini_smc_tables +ffffffff822cfdd0 t smu_v13_0_5_system_features_control +ffffffff822cfe20 t smu_v13_0_5_mode2_reset +ffffffff822cfea0 t smu_v13_0_5_get_dpm_ultimate_freq +ffffffff822d02e0 t smu_v13_0_5_get_gpu_metrics +ffffffff822d0420 t smu_v13_0_5_set_fine_grain_gfx_freq_parameters +ffffffff822d0470 t smu_v13_0_5_get_smu_metrics_data +ffffffff822d1000 T smu_v13_0_7_set_ppt_funcs +ffffffff822d1050 t smu_v13_0_7_get_allowed_feature_mask +ffffffff822d11c0 t smu_v13_0_7_set_default_dpm_table +ffffffff822d15b0 t smu_v13_0_7_populate_umd_state_clk +ffffffff822d16b0 t smu_v13_0_7_print_clk_levels +ffffffff822d17d0 t smu_v13_0_7_force_clk_levels +ffffffff822d1950 t smu_v13_0_7_get_power_profile_mode +ffffffff822d1c30 t smu_v13_0_7_set_power_profile_mode +ffffffff822d1e70 t smu_v13_0_7_read_sensor +ffffffff822d2080 t smu_v13_0_7_is_dpm_running +ffffffff822d20d0 t smu_v13_0_7_get_fan_speed_pwm +ffffffff822d21b0 t smu_v13_0_7_get_fan_speed_rpm +ffffffff822d2220 t smu_v13_0_7_get_thermal_temperature_range +ffffffff822d2310 t smu_v13_0_7_dump_pptable +ffffffff822d2340 t smu_v13_0_7_get_power_limit +ffffffff822d2420 t smu_v13_0_7_set_df_cstate +ffffffff822d2440 t smu_v13_0_7_update_pcie_parameters +ffffffff822d2520 t smu_v13_0_7_init_smc_tables +ffffffff822d2710 t smu_v13_0_7_check_fw_status +ffffffff822d2760 t smu_v13_0_7_set_mp1_state +ffffffff822d27a0 t smu_v13_0_7_setup_pptable +ffffffff822d2900 t smu_v13_0_7_baco_enter +ffffffff822d2950 t smu_v13_0_7_baco_exit +ffffffff822d29b0 t smu_v13_0_7_is_mode1_reset_supported +ffffffff822d29e0 t smu_v13_0_7_get_gpu_metrics +ffffffff822d2df0 t smu_v13_0_7_enable_mgpu_fan_boost +ffffffff822d2e40 t smu_v13_0_7_get_smu_metrics_data +ffffffff822d3190 t smu_v13_0_7_get_throttler_status +ffffffff822d4000 T yellow_carp_set_ppt_funcs +ffffffff822d4040 t yellow_carp_set_default_dpm_tables +ffffffff822d4060 t yellow_carp_print_clk_levels +ffffffff822d4120 t yellow_carp_force_clk_levels +ffffffff822d43c0 t yellow_carp_od_edit_dpm_table +ffffffff822d4690 t yellow_carp_dpm_set_vcn_enable +ffffffff822d46b0 t yellow_carp_dpm_set_jpeg_enable +ffffffff822d46d0 t yellow_carp_read_sensor +ffffffff822d4a70 t yellow_carp_is_dpm_running +ffffffff822d4ac0 t yellow_carp_set_watermarks_table +ffffffff822d4c50 t yellow_carp_set_performance_level +ffffffff822d5180 t yellow_carp_init_smc_tables +ffffffff822d52f0 t yellow_carp_fini_smc_tables +ffffffff822d53a0 t yellow_carp_system_features_control +ffffffff822d53f0 t yellow_carp_get_gfxoff_status +ffffffff822d5470 t yellow_carp_mode2_reset +ffffffff822d54f0 t yellow_carp_get_dpm_ultimate_freq +ffffffff822d5930 t yellow_carp_get_gpu_metrics +ffffffff822d5ae0 t yellow_carp_post_smu_init +ffffffff822d5b60 t yellow_carp_set_fine_grain_gfx_freq_parameters +ffffffff822d5bb0 t yellow_carp_get_smu_metrics_data +ffffffff822d6000 T smu_cmn_send_msg_without_waiting +ffffffff822d6170 T smu_cmn_wait_for_response +ffffffff822d62a0 T smu_cmn_send_smc_msg_with_param +ffffffff822d65c0 T smu_cmn_to_asic_specific_index +ffffffff822d66c0 t __smu_cmn_reg_print_error +ffffffff822d6910 T smu_cmn_send_smc_msg +ffffffff822d6930 T smu_cmn_send_debug_smc_msg +ffffffff822d69b0 T smu_cmn_feature_is_supported +ffffffff822d6a50 T smu_cmn_feature_is_enabled +ffffffff822d6b40 T smu_cmn_clk_dpm_is_enabled +ffffffff822d6c40 T smu_cmn_get_enabled_mask +ffffffff822d6d30 T smu_cmn_get_indep_throttler_status +ffffffff822d6de0 T smu_cmn_feature_update_enable_state +ffffffff822d6e80 T smu_cmn_feature_set_enabled +ffffffff822d6f50 T smu_cmn_get_pp_feature_mask +ffffffff822d70f0 T smu_cmn_set_pp_feature_mask +ffffffff822d71f0 T smu_cmn_disable_all_features_with_exception +ffffffff822d72a0 T smu_cmn_get_smc_version +ffffffff822d7370 T smu_cmn_update_table +ffffffff822d74d0 T smu_cmn_write_watermarks_table +ffffffff822d7590 T smu_cmn_write_pptable +ffffffff822d7650 T smu_cmn_get_metrics_table +ffffffff822d77b0 T smu_cmn_get_combo_pptable +ffffffff822d7880 T smu_cmn_init_soft_gpu_metrics +ffffffff822d7960 T smu_cmn_set_mp1_state +ffffffff822d7a00 T smu_cmn_is_audio_func_enabled +ffffffff822d8000 T pci_mcfg_init +ffffffff822d8050 T pci_lookup_segment +ffffffff822d80b0 T pci_attach_hook +ffffffff822d80e0 T pci_bus_maxdevs +ffffffff822d8110 T pci_make_tag +ffffffff822d8180 T pci_decompose_tag +ffffffff822d81e0 T pci_conf_size +ffffffff822d8230 T pci_mcfg_map_bus +ffffffff822d82b0 T pci_conf_read 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sm_pcmcia_funce_enaddr +ffffffff82304450 T sm_pcmcia_ascii_enaddr +ffffffff82304550 T sm_pcmcia_lannid_ciscallback +ffffffff82304660 T sm_pcmcia_enable +ffffffff82304700 T sm_pcmcia_disable +ffffffff82305000 T xe_pcmcia_match +ffffffff82305050 T xe_pcmcia_attach +ffffffff823057a0 T xe_pcmcia_detach +ffffffff82305860 T xe_pcmcia_activate +ffffffff82305b50 T xe_pcmcia_interpret_manfid +ffffffff82305bf0 T xe_pcmcia_funce_enaddr +ffffffff82305c10 T xe_ioctl +ffffffff82305f60 T xe_start +ffffffff82306200 T xe_watchdog +ffffffff82306240 T xe_intr +ffffffff82306610 T xe_full_reset +ffffffff82306be0 T xe_mdi_read +ffffffff82307560 T xe_mdi_write +ffffffff82307e70 T xe_statchg +ffffffff82307ea0 T xe_mediachange +ffffffff82307f20 T xe_mediastatus +ffffffff82307f80 T xe_init +ffffffff82307fd0 T xe_stop +ffffffff82308100 T xe_reset +ffffffff82308270 T xe_pcmcia_lan_nid_ciscallback +ffffffff823083c0 T xe_pcmcia_manfid_ciscallback +ffffffff823084e0 T xe_get +ffffffff823087a0 T xe_set_address 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cmalo_parse_elements +ffffffff8230e710 T cmalo_cmd_rsp_assoc +ffffffff8230e750 T cmalo_cmd_set_80211d +ffffffff8230e840 T cmalo_cmd_set_bgscan_config +ffffffff8230e9a0 T cmalo_cmd_set_bgscan_query +ffffffff8230f000 T an_pcmcia_match +ffffffff8230f060 T an_pcmcia_attach +ffffffff8230f240 T an_pcmcia_detach +ffffffff8230f2d0 T an_pcmcia_activate +ffffffff82310000 T pcibmatch +ffffffff823100c0 T pcibattach +ffffffff82310100 T pcib_callback +ffffffff82310170 T pcib_print +ffffffff82311000 T amdpcib_match +ffffffff82311050 T amdpcib_attach +ffffffff82311170 T amdpcib_get_timecount +ffffffff82312000 T tcpcib_match +ffffffff82312050 T tcpcib_attach +ffffffff82312300 T tcpcib_activate +ffffffff823125b0 T tcpcib_wdt_init +ffffffff823126e0 T tcpcib_wdt_start +ffffffff82312710 T tcpcib_wdt_stop +ffffffff82312790 T tcpcib_hpet_get_timecount +ffffffff823127c0 T tcpcib_wdt_cb +ffffffff82313000 T aapic_match +ffffffff82313030 T aapic_attach +ffffffff82313110 t __llvm_retpoline_r11 +ffffffff82314000 T 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wsmousedoopen +ffffffff8233fa20 T wsmouseclose +ffffffff8233fb00 T wsmouse_input_reset +ffffffff8233fc40 T wsmouseread +ffffffff8233fd00 T wsmouseioctl +ffffffff8233fd80 T wsmouse_do_ioctl +ffffffff8233ff20 T wsmouse_param_ioctl +ffffffff82340040 T wsmouse_set_params +ffffffff82340360 T wsmouse_get_params +ffffffff823405c0 T wsmousekqfilter +ffffffff82340620 T wsmouse_add_mux +ffffffff82340690 T wsmouse_buttons +ffffffff823406d0 T wsmouse_motion +ffffffff82340730 T wsmouse_position +ffffffff82340830 T wsmouse_touch +ffffffff823408c0 T wsmouse_mtstate +ffffffff82340ab0 T wsmouse_set +ffffffff82340d80 T wsmouse_touch_update +ffffffff82340e20 T wsmouse_mt_update +ffffffff82340e60 T wsmouse_hysteresis +ffffffff82340eb0 T wsmouse_ptr_ctrl +ffffffff82340ff0 T wsmouse_mt_convert +ffffffff82341130 T wsmouse_evq_put +ffffffff823411c0 T wsmouse_btn_sync +ffffffff823412c0 T wsmouse_motion_sync +ffffffff823418d0 T wsmouse_touch_sync +ffffffff82341ac0 T wsmouse_log_input +ffffffff82341c80 T wsmouse_log_events +ffffffff82341dc0 T wsmouse_input_sync +ffffffff823423c0 T wsmouse_id_to_slot +ffffffff823424a0 T wsmouse_matching +ffffffff82342a30 T wsmouse_mtframe +ffffffff82342df0 T wsmouse_mt_init +ffffffff82342f60 T wsmouse_set_mode +ffffffff82342fb0 T wsmouse_get_hw +ffffffff82342fe0 T wsmouse_configure +ffffffff82344000 T wstpad_set_direction +ffffffff82344160 T wstpad_is_stable +ffffffff82344240 T wstpad_scroll_coords +ffffffff823443c0 T wstpad_scroll +ffffffff82344550 T wstpad_f2scroll +ffffffff82344880 T wstpad_edgescroll +ffffffff823449a0 T wstpad_get_sbtn +ffffffff82344b20 T wstpad_softbuttons +ffffffff82344bb0 T wstpad_is_tap +ffffffff82344c20 T wstpad_tap_filter +ffffffff82344cd0 T wstpad_tap_touch +ffffffff82344f20 T wstpad_tap_button +ffffffff82344f70 T wstpad_tap +ffffffff823453a0 T wstpad_tap_sync +ffffffff82345400 T wstpad_tap_timeout +ffffffff82345630 T wstpad_click +ffffffff823456d0 T wstpad_cmds +ffffffff82345940 T wstpad_mt_inputs +ffffffff82345cb0 T wstpad_mt_masks +ffffffff82346160 T wstpad_touch_inputs +ffffffff82346360 T wstpad_process_input +ffffffff82346600 T wstpad_track_interval +ffffffff82346890 T wstpad_init_deceleration +ffffffff82346960 T wstpad_decelerate +ffffffff82346ac0 T wstpad_filter +ffffffff82346d80 T wstpad_compat_convert +ffffffff82346e20 T wstpad_init +ffffffff82346f90 T wstpad_configure +ffffffff823476d0 T wstpad_reset +ffffffff82347740 T wstpad_cleanup +ffffffff823477d0 T wstpad_set_param +ffffffff82347aa0 T wstpad_get_param +ffffffff82348000 T wsmux_mux_open +ffffffff82348120 T wsmux_mux_close +ffffffff823481e0 T wsmux_do_ioctl +ffffffff82348810 T wsmux_do_displayioctl +ffffffff82348930 T wsmux_evsrc_set_display +ffffffff82348980 T wsmuxattach +ffffffff823489b0 T wsmux_getmux +ffffffff82348bf0 T wsmux_create +ffffffff82348cc0 T wsmuxopen +ffffffff82348e10 T wsmux_detach_sc +ffffffff82348f20 T wsmux_do_open +ffffffff82349010 T wsmuxclose +ffffffff82349110 T wsmux_do_close +ffffffff823491a0 T wsmuxread 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pms_spec_cmd +ffffffff82357650 T pms_set_scaling +ffffffff823576e0 T pms_set_resolution +ffffffff82357770 T pms_get_devid +ffffffff82357800 T pms_get_status +ffffffff82357890 T pms_set_rate +ffffffff82357920 T pms_reset +ffffffff823579b0 T pms_dev_enable +ffffffff82357a60 T pms_dev_disable +ffffffff82357b10 T pms_protocol_lookup +ffffffff82357c10 T pms_reset_detect +ffffffff82357c90 T pms_reset_timo +ffffffff82357ce0 T pms_reset_task +ffffffff82357da0 T pms_change_state +ffffffff82358120 T pmsinput +ffffffff823582c0 T synaptics_set_mode +ffffffff823583c0 T synaptics_query +ffffffff823584b0 T synaptics_get_hwinfo +ffffffff82358cc0 T synaptics_sec_proc +ffffffff82358d90 T synaptics_knock +ffffffff82358fe0 T alps_sec_proc +ffffffff82359100 T alps_get_hwinfo +ffffffff82359580 T elantech_set_absolute_mode_v1 +ffffffff823597d0 T elantech_set_absolute_mode_v2 +ffffffff82359fa0 T elantech_ps2_cmd +ffffffff8235a030 T elantech_set_absolute_mode_v3 +ffffffff8235a550 T elantech_set_absolute_mode_v4 +ffffffff8235a910 T elantech_get_hwinfo_v1 +ffffffff8235aaf0 T elantech_get_hwinfo_v2 +ffffffff8235ae90 T elantech_get_hwinfo_v3 +ffffffff8235b090 T elantech_get_hwinfo_v4 +ffffffff8235b340 T elantech_knock +ffffffff8235c000 T wscnprobe +ffffffff8235c0a0 T wscninit +ffffffff8235c150 T wscn_video_init +ffffffff8235c1c0 T wscn_input_init +ffffffff8235c220 T wscnputc +ffffffff8235c230 T wscngetc +ffffffff8235c240 T wscnpollc +ffffffff8235d000 T skgpio_match +ffffffff8235d100 T skgpio_attach +ffffffff8235d350 T skgpio_gpio_read +ffffffff8235d3a0 T skgpio_gpio_write +ffffffff8235d410 T skgpio_gpio_ctl +ffffffff8235d490 T skgpio_led_read +ffffffff8235d4e0 T skgpio_led_write +ffffffff8235d510 T skgpio_led_ctl +ffffffff8235e000 T pctrattach +ffffffff8235e080 T pctropen +ffffffff8235e0c0 T pctrclose +ffffffff8235e0f0 T pctrioctl +ffffffff8235e3c0 T pctr_reload +ffffffff8235e500 T pctr_resume +ffffffff8235f000 T nvramattach +ffffffff8235f0a0 T nvram_csum_valid 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usb_add_task +ffffffff82368cd0 T usb_rem_task +ffffffff82368d90 T usb_rem_wait_task +ffffffff82368ea0 T usbctlprint +ffffffff82368ef0 T usbopen +ffffffff82368f60 T usbclose +ffffffff82368f90 T usb_fill_udc_task +ffffffff82369030 T usb_fill_udf_task +ffffffff823690a0 T usbioctl +ffffffff82369650 T usb_needs_reattach +ffffffff823696a0 T usb_schedsoftintr +ffffffff82369760 T usb_tap +ffffffff8236a000 T usbd_is_dying +ffffffff8236a040 T usbd_deactivate +ffffffff8236a070 T usbd_ref_incr +ffffffff8236a0a0 T usbd_ref_decr +ffffffff8236a0e0 T usbd_ref_wait +ffffffff8236a150 T usbd_get_devcnt +ffffffff8236a180 T usbd_claim_iface +ffffffff8236a1c0 T usbd_iface_claimed +ffffffff8236a200 T usbd_open_pipe +ffffffff8236a2e0 T usbd_open_pipe_ival +ffffffff8236a3c0 T usbd_open_pipe_intr +ffffffff8236a600 T usbd_alloc_xfer +ffffffff8236a670 T usbd_setup_xfer +ffffffff8236a6e0 T usbd_transfer +ffffffff8236a970 T usbd_free_xfer +ffffffff8236a9f0 T usbd_close_pipe +ffffffff8236ab50 T usbd_abort_pipe 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otus_init +ffffffff8244a000 T otus_cmd_rxeof +ffffffff8244a100 T otus_sub_rxeof +ffffffff8244a5b0 T otus_txeof +ffffffff8244a640 T otus_tx +ffffffff8244a9f0 T otus_set_multi +ffffffff8244aba0 T otus_stop +ffffffff8244acc0 T otus_updateedca_cb +ffffffff8244b1b0 T otus_updateslot_cb +ffffffff8244b240 T otus_init_mac +ffffffff8244bd50 T otus_phy_get_def +ffffffff8244bdd0 T otus_set_board_values +ffffffff8244c520 T otus_program_phy +ffffffff8244ca10 T otus_set_rf_bank4 +ffffffff8244cbd0 T otus_get_delta_slope +ffffffff8244cc90 T otus_set_macaddr +ffffffff8244cdb0 T otus_led_newstate_type1 +ffffffff8244cde0 T otus_led_newstate_type2 +ffffffff8244d000 T umb_match +ffffffff8244d0c0 T umb_attach +ffffffff8244d960 T umb_detach +ffffffff8244dac0 T umb_state_task +ffffffff8244dc50 T umb_get_response_task +ffffffff8244dd60 T umb_statechg_timeout +ffffffff8244ddc0 T umb_intr +ffffffff8244deb0 T umb_ncm_setup +ffffffff8244e070 T umb_ncm_setup_format +ffffffff8244e140 T umb_ioctl +ffffffff8244e510 T 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athn_usb_alloc_rx_list +ffffffff8245c0a0 T athn_usb_alloc_tx_list +ffffffff8245c190 T athn_usb_do_async +ffffffff8245c2b0 T athn_usb_htc_msg +ffffffff8245c340 T athn_usb_htc_connect_svc +ffffffff8245c510 T athn_usb_wmi_xcmd +ffffffff8245c730 T athn_usb_read_rom +ffffffff8245c890 T athn_usb_stop +ffffffff8245cba0 T athn_usb_init +ffffffff8245cff0 T athn_usb_newstate_cb +ffffffff8245d2e0 T athn_usb_remove_node +ffffffff8245d3d0 T athn_usb_switch_chan +ffffffff8245d5b0 T athn_usb_create_node +ffffffff8245d820 T athn_usb_newassoc_cb +ffffffff8245d9b0 T athn_usb_node_set_rates +ffffffff8245dae0 T athn_usb_count_active_sta +ffffffff8245db30 T athn_usb_newauth_cb +ffffffff8245dc10 T athn_usb_node_free_cb +ffffffff8245dcd0 T athn_usb_ampdu_tx_start +ffffffff8245ddd0 T athn_usb_ampdu_tx_start_cb +ffffffff8245de30 T athn_usb_ampdu_tx_stop +ffffffff8245df10 T athn_usb_ampdu_tx_stop_cb +ffffffff8245df70 T athn_usb_clean_nodes +ffffffff8245e030 T athn_usb_updateedca_cb +ffffffff8245e070 T athn_usb_updateslot_cb +ffffffff8245e0b0 T athn_usb_set_key_cb +ffffffff8245e170 T athn_usb_delete_key_cb +ffffffff8245e1d0 T athn_usb_bcneof +ffffffff8245e230 T athn_usb_swba +ffffffff8245e390 T athn_usb_tx_status +ffffffff8245e400 T athn_usb_rx_wmi_ctrl +ffffffff8245e620 T athn_usb_rx_radiotap +ffffffff8245e7f0 T athn_usb_rx_frame +ffffffff8245ea60 T athn_usb_rxeof +ffffffff8245ed80 T athn_usb_txeof +ffffffff8245ee40 T athn_usb_tx +ffffffff82460000 T uow_match +ffffffff82460070 T uow_attach +ffffffff82460520 T uow_detach +ffffffff824605f0 T uow_activate +ffffffff82460660 T uow_intr +ffffffff824606b0 T uow_reset +ffffffff824606d0 T uow_ow_reset +ffffffff82460720 T uow_ow_bit +ffffffff824607a0 T uow_ow_read_byte +ffffffff82460820 T uow_ow_write_byte +ffffffff82460880 T uow_ow_read_block +ffffffff82460910 T uow_ow_write_block +ffffffff82460980 T uow_ow_matchrom +ffffffff82460a50 T uow_cmd +ffffffff82460b90 T uow_read +ffffffff82460c90 T uow_write +ffffffff82460d70 T uow_ow_search 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thinkpad_brightness_down +ffffffff824cf530 T thinkpad_toggle_bluetooth +ffffffff824cf640 T thinkpad_volume_mute +ffffffff824cf6f0 T thinkpad_volume_down +ffffffff824cf7a0 T thinkpad_volume_up +ffffffff824cf850 T thinkpad_get_thinklight +ffffffff824cf8a0 T thinkpad_adaptive_change +ffffffff824cf9c0 T thinkpad_get_brightness +ffffffff824cf9f0 T thinkpad_toggle_wan +ffffffff824cfb00 T thinkpad_cmos +ffffffff824cfbb0 T thinkpad_set_brightness +ffffffff824cfca0 T thinkpad_set_thinklight +ffffffff824d0000 T toshiba_match +ffffffff824d0090 T toshiba_attach +ffffffff824d0170 T get_param_brightness +ffffffff824d01c0 T acpitoshiba_get_param +ffffffff824d0220 T set_param_brightness +ffffffff824d02b0 T toshiba_update_brightness +ffffffff824d03b0 T acpitoshiba_set_param +ffffffff824d0440 T toshiba_set_brightness +ffffffff824d0560 T toshiba_enable_events +ffffffff824d05e0 T toshiba_read_events +ffffffff824d0740 T toshiba_hotkey +ffffffff824d0970 T toshiba_get_brightness +ffffffff824d0ae0 T toshiba_fn_key_brightness_up +ffffffff824d0c30 T toshiba_fn_key_brightness_down +ffffffff824d0d80 T toshiba_fn_key_video_output +ffffffff824d0ed0 T toshiba_get_video_output +ffffffff824d1040 T toshiba_set_video_output +ffffffff824d2000 T acpisony_match +ffffffff824d2070 T acpisony_attach +ffffffff824d20d0 T acpisony_activate +ffffffff824d2110 T acpisony_notify_setup +ffffffff824d2300 T acpisony_notify +ffffffff824d26a0 T acpisony_find_offset +ffffffff824d27b0 T acpisony_set_hotkey +ffffffff824d29a0 T acpisony_brightness_down +ffffffff824d2ab0 T acpisony_get_brightness +ffffffff824d2b30 T acpisony_set_brightness +ffffffff824d3000 T acpivideo_match +ffffffff824d3070 T acpivideo_attach +ffffffff824d31d0 T acpivideo_getpcibus +ffffffff824d3210 T acpivideo_notify +ffffffff824d3270 T acpivideo_set_policy +ffffffff824d3330 T acpi_foundvout +ffffffff824d3400 T acpivideo_print +ffffffff824d4000 T acpivout_match +ffffffff824d4070 T acpivout_attach +ffffffff824d41c0 T acpivout_notify +ffffffff824d4270 T acpivout_get_bcl +ffffffff824d4390 T acpivout_get_brightness +ffffffff824d4430 T acpivout_get_param +ffffffff824d44e0 T acpivout_set_param +ffffffff824d4650 T acpivout_select_brightness +ffffffff824d4720 T acpivout_find_brightness +ffffffff824d47b0 T acpivout_set_brightness +ffffffff824d5000 T acpipwrres_match +ffffffff824d5070 T acpipwrres_attach +ffffffff824d52b0 T acpipwrres_foundcons +ffffffff824d5430 T acpipwrres_ref_incr +ffffffff824d54c0 T acpipwrres_hascons +ffffffff824d5510 T acpipwrres_ref_decr +ffffffff824d55a0 T acpipwrres_addcons +ffffffff824d6000 T aibs_match +ffffffff824d6020 T aibs_attach +ffffffff824d6130 T aibs_probe +ffffffff824d6290 T aibs_attach_new +ffffffff824d63b0 T aibs_attach_sif +ffffffff824d6580 T aibs_notify +ffffffff824d65f0 T aibs_add_sensor +ffffffff824d6840 T aibs_getpack +ffffffff824d68b0 T aibs_refresh +ffffffff824d6910 T aibs_refresh_r +ffffffff824d6a50 T aibs_getvalue +ffffffff824d6ba0 T aibs_find_cb +ffffffff824d7000 T aplgpio_match +ffffffff824d7060 T aplgpio_attach +ffffffff824d7300 T aplgpio_intr +ffffffff824d7430 T aplgpio_read_pin +ffffffff824d7480 T aplgpio_write_pin +ffffffff824d74f0 T aplgpio_intr_establish +ffffffff824d7610 T aplgpio_intr_enable +ffffffff824d76a0 T aplgpio_intr_disable +ffffffff824d8000 T bytgpio_match +ffffffff824d8060 T bytgpio_attach +ffffffff824d8310 T bytgpio_intr +ffffffff824d8430 T bytgpio_read_pin +ffffffff824d8490 T bytgpio_write_pin +ffffffff824d8510 T bytgpio_intr_establish +ffffffff824d8580 T bytgpio_intr_enable +ffffffff824d8660 T bytgpio_intr_disable +ffffffff824d9000 T chvgpio_match +ffffffff824d9060 T chvgpio_attach +ffffffff824d9300 T chvgpio_intr +ffffffff824d93d0 T chvgpio_read_pin +ffffffff824d9470 T chvgpio_write_pin +ffffffff824d9530 T chvgpio_intr_establish +ffffffff824d9700 T chvgpio_intr_enable +ffffffff824d97c0 T chvgpio_intr_disable +ffffffff824d9880 T chvgpio_opreg_handler +ffffffff824d9900 T chvgpio_check_pin +ffffffff824da000 T glkgpio_match +ffffffff824da060 T glkgpio_attach +ffffffff824da300 T glkgpio_intr +ffffffff824da430 T glkgpio_read_pin +ffffffff824da480 T glkgpio_write_pin +ffffffff824da4f0 T glkgpio_intr_establish +ffffffff824da610 T glkgpio_intr_enable +ffffffff824da6a0 T glkgpio_intr_disable +ffffffff824db000 T pchgpio_match +ffffffff824db060 T pchgpio_attach +ffffffff824db4b0 T pchgpio_activate +ffffffff824db560 T pchgpio_intr +ffffffff824db780 T pchgpio_read_pin +ffffffff824db870 T pchgpio_write_pin +ffffffff824db980 T pchgpio_intr_establish +ffffffff824dbbb0 T pchgpio_intr_enable +ffffffff824dbcf0 T pchgpio_intr_disable +ffffffff824dbe30 T pchgpio_save +ffffffff824dbea0 T pchgpio_restore +ffffffff824dbf10 T pchgpio_find_group +ffffffff824dbf90 T pchgpio_intr_handle +ffffffff824dc070 T pchgpio_save_pin +ffffffff824dc230 T pchgpio_restore_pin +ffffffff824dd000 T tipmic_match +ffffffff824dd050 T tipmic_attach +ffffffff824dd250 T tipmic_write_1 +ffffffff824dd310 T tipmic_intr +ffffffff824dd470 T tipmic_get_lpat +ffffffff824dd5a0 T tipmic_read_pin +ffffffff824dd5d0 T tipmic_write_pin +ffffffff824dd600 T tipmic_thermal_opreg_handler +ffffffff824dde60 T tipmic_power_opreg_handler +ffffffff824de100 T tipmic_read_1 +ffffffff824de1c0 T tipmic_raw_to_temp +ffffffff824df000 T ccpmic_match +ffffffff824df050 T ccpmic_attach +ffffffff824df130 T ccpmic_get_lpat +ffffffff824df250 T ccpmic_read_pin +ffffffff824df3d0 T ccpmic_write_pin +ffffffff824df530 T ccpmic_thermal_opreg_handler +ffffffff824df760 T ccpmic_power_opreg_handler +ffffffff824df940 T ccpmic_read_1 +ffffffff824dfa00 T ccpmic_write_1 +ffffffff824dfac0 T ccpmic_raw_to_temp +ffffffff824e0000 T com_acpi_match +ffffffff824e0070 T com_acpi_attach +ffffffff824e02e0 T com_acpi_is_designware +ffffffff824e0340 T com_acpi_intr_designware +ffffffff824e0370 T com_acpi_is_console +ffffffff824e1000 T sdhc_acpi_match +ffffffff824e1060 T sdhc_acpi_attach +ffffffff824e1360 T sdhc_acpi_parse_resources +ffffffff824e1410 T sdhc_acpi_card_detect_gpio +ffffffff824e1470 T sdhc_acpi_card_detect_intr +ffffffff824e14b0 T sdhc_acpi_power_on +ffffffff824e1530 T sdhc_acpi_explore +ffffffff824e1560 T sdhc_acpi_card_detect_nonremovable +ffffffff824e1590 T sdhc_acpi_do_explore +ffffffff824e2000 T dwiic_acpi_match +ffffffff824e2050 T dwiic_acpi_attach +ffffffff824e23b0 T dwiic_acpi_parse_crs +ffffffff824e24e0 T dwiic_acpi_power +ffffffff824e25e0 T dwiic_acpi_get_params +ffffffff824e2710 T dwiic_i2c_intr_establish +ffffffff824e2790 T dwiic_i2c_intr_disestablish +ffffffff824e27a0 T dwiic_i2c_intr_string +ffffffff824e2830 T dwiic_acpi_bus_scan +ffffffff824e2860 T dwiic_acpi_found_hid +ffffffff824e2b80 T dwiic_matchhids +ffffffff824e2c10 T dwiic_acpi_found_ihidev +ffffffff824e2e90 T dwiic_acpi_found_iatp +ffffffff824e3000 T acpicbkbd_match +ffffffff824e3020 T acpicbkbd_attach +ffffffff824e30b0 T acpicbkbd_activate +ffffffff824e3100 T acpicbkbd_get_backlight +ffffffff824e3170 T acpicbkbd_set_backlight +ffffffff824e3210 T acpicbkbd_write_backlight +ffffffff824e4000 T acpials_match +ffffffff824e4080 T acpials_attach +ffffffff824e4210 T acpials_read +ffffffff824e4290 T acpials_addtask +ffffffff824e42d0 T acpials_notify +ffffffff824e4350 T acpials_update +ffffffff824e5000 T tpm_match +ffffffff824e5050 T tpm_attach +ffffffff824e5320 T tpm_activate +ffffffff824e5420 T tpm2_start_method +ffffffff824e54a0 T tpm_probe +ffffffff824e5550 T tpm_init_tis +ffffffff824e57b0 T tpm_init_crb +ffffffff824e5af0 T tpm_suspend +ffffffff824e5be0 T tpm_resume +ffffffff824e5c10 T tpm_write_tis +ffffffff824e5f90 T tpm_read_tis +ffffffff824e6170 T tpm_write_crb +ffffffff824e6580 T tpm_read_crb +ffffffff824e6870 T tpm_request_locality_tis +ffffffff824e6960 T tpm_request_locality_crb +ffffffff824e6a60 T tpm_release_locality_crb +ffffffff824e6ab0 T tpm_release_locality_tis +ffffffff824e6b20 T tpm_getburst +ffffffff824e6bd0 T tpm_status +ffffffff824e6bf0 T tpm_waitfor +ffffffff824e6cc0 T tpm_waitfor_status +ffffffff824e7000 T acpihve_match +ffffffff824e70b0 T acpihve_attach +ffffffff824e8000 T acpisbs_match +ffffffff824e8020 T acpisbs_attach +ffffffff824e8290 T acpisbs_activate +ffffffff824e8370 T acpisbs_read +ffffffff824e8430 T acpisbs_setup_sensors +ffffffff824e8550 T acpisbs_refresh_sensors +ffffffff824e86c0 T acpisbs_notify +ffffffff824e87f0 T acpi_smbus_read +ffffffff824e9000 T surface_match +ffffffff824e9050 T surface_attach +ffffffff824e90b0 T surface_hotkey +ffffffff824ea000 T ipmi_acpi_match +ffffffff824ea020 T ipmi_acpi_attach +ffffffff824ea240 T ipmi_acpi_parse_crs +ffffffff824eb000 T amdgpio_match +ffffffff824eb060 T amdgpio_attach +ffffffff824eb290 T amdgpio_activate +ffffffff824eb380 T amdgpio_intr +ffffffff824eb520 T amdgpio_read_pin +ffffffff824eb570 T amdgpio_write_pin +ffffffff824eb5e0 T amdgpio_intr_establish +ffffffff824eb6d0 T amdgpio_intr_enable +ffffffff824eb750 T amdgpio_intr_disable +ffffffff824eb7d0 T amdgpio_save +ffffffff824eb850 T amdgpio_restore +ffffffff824eb8e0 T amdgpio_save_pin +ffffffff824eb950 T amdgpio_restore_pin +ffffffff824eb9c0 T amdgpio_pin_intr +ffffffff824ec000 T acpihid_match +ffffffff824ec020 T acpihid_attach +ffffffff824ec200 T acpihid_init_dsm +ffffffff824ec360 T acpihid_eval +ffffffff824ec580 T acpihid_notify +ffffffff824ec5e0 T acpihid_button_array_enable +ffffffff824ed000 T acpi_match +ffffffff824ed060 T acpi_attach +ffffffff824ed0a0 T acpi_probe +ffffffff824ed240 T acpi_map +ffffffff824ed330 T acpi_unmap +ffffffff824ed370 T acpi_bus_space_map +ffffffff824ed390 T acpi_bus_space_unmap +ffffffff824ed3a0 T acpi_intr_establish +ffffffff824ed4e0 T acpi_intr_disestablish +ffffffff824ed4f0 T acpi_scan +ffffffff824ed6a0 T acpi_acquire_glk +ffffffff824ed700 T acpi_release_glk +ffffffff824ed750 T acpi_attach_machdep +ffffffff824ed8e0 T acpi_sleep_cpu +ffffffff824eda80 T acpi_resume_cpu +ffffffff824edb70 T sleep_mp +ffffffff824edc70 T resume_mp +ffffffff824edd60 T acpi_iommu_device_map +ffffffff824ee000 T hibernate_resume_machdep +ffffffff824ee050 T hibernate_drop_to_real_mode +ffffffff824ee060 T hibernate_activate_resume_pt_machdep +ffffffff824ee0a0 T hibernate_switch_stack_machdep +ffffffff824ee0e0 T hibernate_flush +ffffffff824ee110 T acpi_savecpu +ffffffff824ef000 T sleep_showstate +ffffffff824ef100 T sleep_setstate +ffffffff824ef160 T gosleep +ffffffff824ef220 T sleep_abort +ffffffff824ef250 T sleep_resume +ffffffff824ef2c0 T suspend_finish +ffffffff824f0000 T acpipci_match +ffffffff824f0020 T acpipci_attach +ffffffff824f02e0 T acpipci_osc +ffffffff824f0420 T acpipci_parse_resources +ffffffff824f0530 T acpipci_attach_bus +ffffffff824f0700 T acpipci_print +ffffffff824f0760 T acpipci_attach_busses +ffffffff824f1000 T efiopen +ffffffff824f1040 T eficlose +ffffffff824f1070 T efiioctl +ffffffff824f1110 T efiioc_get_table +ffffffff824f1270 T efiioc_var_get +ffffffff824f14e0 T efiioc_var_next +ffffffff824f1700 T efiioc_var_set +ffffffff824f1990 T efi_adapt_error +ffffffff824f2000 T efi_match +ffffffff824f2060 T efi_attach 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vcpu_writeregs_vmx +ffffffff824f5c30 T vcpu_readregs_svm +ffffffff824f60d0 T vcpu_writeregs_svm +ffffffff824f6590 T vmm_get_guest_memtype +ffffffff824f6610 T vmx_mprotect_ept +ffffffff824f6880 T vmx_pmap_find_pte_ept +ffffffff824f6950 T start_vmm_on_cpu +ffffffff824f6a20 T stop_vmm_on_cpu +ffffffff824f6ac0 T vmclear_on_cpu +ffffffff824f6b30 T vm_create_check_mem_ranges +ffffffff824f6c90 T vm_impl_init +ffffffff824f6d30 T vm_teardown +ffffffff824f6ee0 T vcpu_init +ffffffff824f6fb0 T vm_impl_init_vmx +ffffffff824f70d0 T vm_impl_init_svm +ffffffff824f71f0 T vm_impl_deinit_vmx +ffffffff824f7220 T vm_impl_deinit_svm +ffffffff824f7250 T vm_impl_deinit +ffffffff824f72b0 T vcpu_reload_vmcs_vmx +ffffffff824f73e0 T vcpu_reset_regs_svm +ffffffff824f7780 T svm_setmsrbrw +ffffffff824f78f0 T svm_setmsrbr +ffffffff824f79c0 T vmm_alloc_vpid +ffffffff824f7ad0 T svm_setmsrbw +ffffffff824f7ba0 T vmx_setmsrbr +ffffffff824f7c50 T vmx_setmsrbw +ffffffff824f7d00 T vmx_setmsrbrw +ffffffff824f7e00 T svm_set_clean +ffffffff824f7e50 T svm_set_dirty +ffffffff824f7ea0 T vcpu_reset_regs_vmx +ffffffff824f89f0 T vcpu_vmx_check_cap +ffffffff824f8af0 T vcpu_vmx_compute_ctrl +ffffffff824f8cd0 T vcpu_init_vmx +ffffffff824f9070 T vcpu_deinit_vmx +ffffffff824f91f0 T vcpu_init_svm +ffffffff824f9370 T vcpu_deinit_svm +ffffffff824f94b0 T vmm_free_vpid +ffffffff824f9510 T vcpu_deinit +ffffffff824f9560 T vcpu_run_vmx +ffffffff824f9d70 T vcpu_run_svm +ffffffff824fa350 T vcpu_must_stop +ffffffff824fa3b0 T vmm_fpurestore +ffffffff824fa480 T vmm_fpusave +ffffffff824fa500 T vmm_translate_gva +ffffffff824fa830 T vmm_update_pvclock +ffffffff824fa930 T vmx_get_exit_info +ffffffff824fa990 T vmx_handle_exit +ffffffff824fad80 T vmx_instruction_error_decode +ffffffff824faf50 T vmm_get_guest_cpu_cpl +ffffffff824fb000 T vmx_handle_intr +ffffffff824fb090 T svm_handle_hlt +ffffffff824fb0e0 T vmx_handle_hlt +ffffffff824fb190 T svm_handle_exit +ffffffff824fb460 T svm_handle_np_fault +ffffffff824fb600 T vmm_handle_cpuid +ffffffff824fbc70 T svm_handle_msr +ffffffff824fbf20 T svm_handle_xsetbv +ffffffff824fbf70 T svm_handle_inout +ffffffff824fc080 T vmm_inject_ud +ffffffff824fc0b0 T vmm_inject_db +ffffffff824fc0e0 T vmx_handle_np_fault +ffffffff824fc250 T vmx_handle_inout +ffffffff824fc3f0 T vmx_handle_cr +ffffffff824fc660 T vmx_handle_rdmsr +ffffffff824fc730 T vmx_handle_wrmsr +ffffffff824fc980 T vmx_handle_xsetbv +ffffffff824fca10 T vmm_inject_gp +ffffffff824fca40 T vmx_get_exit_qualification +ffffffff824fcaa0 T vmx_get_guest_faulttype +ffffffff824fcb40 T svm_get_guest_faulttype +ffffffff824fcb70 T svm_fault_page +ffffffff824fcbf0 T vmx_fault_page +ffffffff824fcd50 T vmm_get_guest_cpu_mode +ffffffff824fce50 T vmx_load_pdptes +ffffffff824fd0d0 T vmx_handle_cr0_write +ffffffff824fd2d0 T vmx_handle_cr4_write +ffffffff824fd370 T vmm_handle_xsetbv +ffffffff824fd450 T vmx_handle_misc_enable_msr +ffffffff824fd4b0 T vmm_pat_is_valid +ffffffff824fd590 T vmm_gpa_is_valid +ffffffff824fd600 T vmx_exit_reason_decode +ffffffff824fd640 T svm_exit_reason_decode +ffffffff824fe450 T vcpu_state_decode +ffffffff824ff000 T vmm_dispatch_intr +ffffffff824ff019 T vmxon +ffffffff824ff049 T vmxoff +ffffffff824ff079 T vmclear +ffffffff824ff0a9 T vmptrld +ffffffff824ff0d9 T vmptrst +ffffffff824ff109 T vmwrite +ffffffff824ff139 T vmread +ffffffff824ff169 T invvpid +ffffffff824ff199 T invept +ffffffff824ff1c9 T vmx_enter_guest +ffffffff824ff1f0 t skip_init +ffffffff824ff2bd t no_l1df_msr +ffffffff824ff2c0 t l1df_tlb_loop +ffffffff824ff2d9 t l1df_tlb_done +ffffffff824ff2e1 t l1df_load_cache +ffffffff824ff2f8 t done_flush +ffffffff824ff38b t do_resume +ffffffff824ff410 t fail_launch_or_resume +ffffffff824ff44d t fail_launch_unknown +ffffffff824ff45a t fail_launch_invalid_vmcs +ffffffff824ff467 t fail_launch_valid_vmcs +ffffffff824ff484 t vmx_exit_handler_asm +ffffffff824ff549 t restore_host +ffffffff824ff5e9 T svm_enter_guest +ffffffff824ff775 t restore_host_svm +ffffffff82500000 T sdmmc_match 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sdmmc_cisptr +ffffffff825020a0 T sdmmc_read_cis +ffffffff825023a0 T sdmmc_print_cis +ffffffff82502510 T sdmmc_check_cis_quirks +ffffffff82503000 T sdmmc_io_enable +ffffffff825032a0 T sdmmc_io_reset +ffffffff825033c0 T sdmmc_io_send_op_cond +ffffffff82503530 T sdmmc_io_scan +ffffffff82503680 T sdmmc_io_init +ffffffff825037a0 T sdmmc_io_set_highspeed +ffffffff82503a40 T sdmmc_io_set_bus_width +ffffffff82503cd0 T sdmmc_io_function_ready +ffffffff82503e40 T sdmmc_io_read_1 +ffffffff82503f90 T sdmmc_io_function_enable +ffffffff82504360 T sdmmc_io_write_1 +ffffffff825044e0 T sdmmc_io_function_disable +ffffffff82504760 T sdmmc_io_attach +ffffffff82504840 T sdmmc_print +ffffffff82504a90 T sdmmc_submatch +ffffffff82504b10 T sdmmc_io_detach +ffffffff82504bb0 T sdmmc_io_rw_direct +ffffffff82504d50 T sdmmc_io_rw_extended_subr +ffffffff82504ef0 T sdmmc_io_rw_extended +ffffffff825052e0 T sdmmc_io_read_2 +ffffffff82505430 T sdmmc_io_write_2 +ffffffff82505590 T sdmmc_io_read_4 +ffffffff825056e0 T sdmmc_io_write_4 +ffffffff82505840 T sdmmc_io_read_multi_1 +ffffffff82505930 T sdmmc_io_write_multi_1 +ffffffff82505a20 T sdmmc_io_read_region_1 +ffffffff82505b10 T sdmmc_io_write_region_1 +ffffffff82505c00 T sdmmc_io_xchg +ffffffff82505d90 T sdmmc_intr_enable +ffffffff82506000 T sdmmc_intr_disable +ffffffff82506270 T sdmmc_intr_establish +ffffffff82506370 T sdmmc_intr_disestablish +ffffffff82506450 T sdmmc_card_intr +ffffffff825064a0 T sdmmc_intr_task +ffffffff82506530 T sdmmc_io_set_blocklen +ffffffff82507000 T sdmmc_mem_enable +ffffffff825074e0 T sdmmc_mem_send_op_cond +ffffffff82507690 T sdmmc_mem_signal_voltage +ffffffff82507750 T sdmmc_mem_scan +ffffffff82507a50 T sdmmc_decode_csd +ffffffff82507e50 T sdmmc_decode_cid +ffffffff82508290 T sdmmc_mem_send_scr +ffffffff825083d0 T sdmmc_mem_decode_scr +ffffffff82508440 T sdmmc_mem_send_cxd_data +ffffffff825085b0 T sdmmc_mem_set_bus_width +ffffffff825086c0 T sdmmc_mem_sd_switch +ffffffff82508970 T sdmmc_be512_to_bitfield512 +ffffffff82508a20 T sdmmc_mem_mmc_switch +ffffffff82508b10 T sdmmc_mem_init +ffffffff82508c60 T sdmmc_mem_set_blocklen +ffffffff82508d60 T sdmmc_mem_sd_init +ffffffff82509310 T sdmmc_mem_mmc_init +ffffffff82509c30 T sdmmc_mem_select_transfer_mode +ffffffff82509cb0 T sdmmc_mem_execute_tuning +ffffffff82509d40 T sdmmc_mem_read_block_subr +ffffffff8250a0a0 T sdmmc_mem_single_read_block +ffffffff8250a160 T sdmmc_mem_read_block +ffffffff8250a320 T sdmmc_mem_write_block_subr +ffffffff8250a670 T sdmmc_mem_single_write_block +ffffffff8250a730 T sdmmc_mem_write_block +ffffffff8250a8f0 T sdmmc_mem_hibernate_write +ffffffff8250b000 T sdmmc_scsi_cmd +ffffffff8250b1f0 T sdmmc_minphys +ffffffff8250b260 T sdmmc_scsi_attach +ffffffff8250b450 T sdmmc_alloc_ccbs +ffffffff8250b590 T sdmmc_free_ccbs +ffffffff8250b5f0 T sdmmc_scsi_detach +ffffffff8250b740 T sdmmc_stimeout +ffffffff8250b7c0 T sdmmc_ccb_alloc +ffffffff8250b870 T sdmmc_ccb_free +ffffffff8250b950 T sdmmc_inquiry +ffffffff8250bb70 T sdmmc_start_xs +ffffffff8250bc60 T sdmmc_complete_xs +ffffffff8250bd20 T sdmmc_done_xs +ffffffff8250bd60 T sdmmc_scsi_hibernate_io +ffffffff8250c000 T bwfm_sdio_preinit +ffffffff8250c4f0 T bwfm_sdio_txcheck +ffffffff8250c530 T bwfm_sdio_txdata +ffffffff8250c5a0 T bwfm_sdio_txctl +ffffffff8250c6f0 T bwfm_sdio_buscore_read +ffffffff8250c700 T bwfm_sdio_buscore_write +ffffffff8250c710 T bwfm_sdio_buscore_prepare +ffffffff8250c840 T bwfm_sdio_buscore_activate +ffffffff8250c8c0 T bwfm_sdio_match +ffffffff8250c980 T bwfm_sdio_attach +ffffffff8250cc40 T bwfm_sdio_detach +ffffffff8250cca0 T bwfm_sdio_task +ffffffff8250cdf0 T bwfm_sdio_write_1 +ffffffff8250ce20 T bwfm_sdio_read_1 +ffffffff8250ce50 T bwfm_sdio_write_4 +ffffffff8250cf00 T bwfm_sdio_read_4 +ffffffff8250cfa0 T bwfm_sdio_load_microcode +ffffffff8250d200 T bwfm_sdio_clkctl +ffffffff8250d330 T bwfm_sdio_dev_write +ffffffff8250d370 T bwfm_sdio_intr +ffffffff8250d3b0 T bwfm_sdio_ram_read_write +ffffffff8250d5e0 T bwfm_sdio_htclk +ffffffff8250d840 T bwfm_sdio_readshared +ffffffff8250d900 T bwfm_sdio_dev_read +ffffffff8250d930 T bwfm_sdio_rx_frames +ffffffff8250dcc0 T bwfm_sdio_tx_frames +ffffffff8250dda0 T bwfm_sdio_backplane +ffffffff8250de50 T bwfm_sdio_buf_read +ffffffff8250df20 T bwfm_sdio_buf_write +ffffffff8250dfd0 T bwfm_sdio_frame_read_write +ffffffff8250e150 T bwfm_sdio_newbuf +ffffffff8250e1d0 T bwfm_sdio_tx_ok +ffffffff8250e220 T bwfm_sdio_tx_ctrlframe +ffffffff8250e320 T bwfm_sdio_tx_dataframe +ffffffff8250e470 T bwfm_sdio_rx_glom +ffffffff8250f000 T onewire_match +ffffffff8250f050 T onewire_attach +ffffffff8250f0f0 T onewire_detach +ffffffff8250f160 T onewire_activate +ffffffff8250f180 T onewire_scan +ffffffff8250f390 T onewire_createthread +ffffffff8250f3f0 T onewire_print +ffffffff8250f4c0 T onewirebus_print +ffffffff8250f510 T onewire_lock +ffffffff8250f530 T onewire_unlock +ffffffff8250f540 T onewire_reset +ffffffff8250f560 T onewire_bit +ffffffff8250f580 T onewire_read_byte +ffffffff8250f6c0 T onewire_write_byte +ffffffff8250f790 T onewire_read_block +ffffffff8250f830 T onewire_write_block +ffffffff8250f8d0 T onewire_triplet +ffffffff8250f9b0 T onewire_matchrom +ffffffff8250fb00 T onewire_search +ffffffff8250fe90 T onewire_thread +ffffffff82510000 T onewire_crc +ffffffff825100e0 T onewire_crc16 +ffffffff825101c0 T onewire_famname +ffffffff82510200 T onewire_matchbyfam +ffffffff82511000 T owid_match +ffffffff82511020 T owid_attach +ffffffff825110f0 T owid_detach +ffffffff82511130 T owid_activate +ffffffff82512000 T owsbm_match +ffffffff82512020 T owsbm_attach +ffffffff825121c0 T owsbm_detach +ffffffff82512230 T owsbm_activate +ffffffff82512260 T owsbm_update +ffffffff82513000 T owtemp_match +ffffffff82513020 T owtemp_attach +ffffffff82513110 T owtemp_detach +ffffffff82513180 T owtemp_activate +ffffffff825131b0 T owtemp_update +ffffffff82514000 T owctr_match +ffffffff82514020 T owctr_attach +ffffffff82514160 T owctr_detach +ffffffff825141d0 T owctr_activate +ffffffff82514200 T owctr_update +ffffffff82514230 T owctr_update_counter +ffffffff82515000 A __text_page_start +ffffffff82515000 T Xsyscall_meltdown +ffffffff8251500c T Xsyscall +ffffffff8251526e t Xsyscall_trampback +ffffffff82515280 T intr_user_exit +ffffffff825152c2 t intr_user_exit_post_ast +ffffffff825153ee t Xiretq_trampback +ffffffff825153fa T doreti_iret +ffffffff82516000 T alltraps +ffffffff82516138 T recall_trap +ffffffff82516150 T alltraps_kern +ffffffff82516153 T alltraps_kern_meltdown +ffffffff82517000 ? Xsyscall32 +ffffffff82517000 A __kutext_start +ffffffff82517000 A __text_page_end +ffffffff82518000 ? Xtrap00 +ffffffff82518010 ? Xtrap01 +ffffffff82518020 ? Xtrap02 +ffffffff82518024 c calltrap_specstk +ffffffff825180f0 ? calltrap_specstk_tramp +ffffffff82518110 ? Xtrap03 +ffffffff82518120 ? Xtrap04 +ffffffff82518130 ? Xtrap05 +ffffffff82518140 ? Xtrap06 +ffffffff82518150 ? Xtrap07 +ffffffff82518160 ? Xtrap08 +ffffffff82518170 ? Xtrap09 +ffffffff82518180 ? Xtrap0a +ffffffff82518190 ? Xtrap0b +ffffffff825181a0 ? Xtrap0c +ffffffff825181b0 ? Xtrap0d +ffffffff82518230 ? Xtrap0e +ffffffff82518240 ? Xintrspurious +ffffffff82518240 ? Xtrap0f +ffffffff82518250 ? Xtrap10 +ffffffff82518260 ? Xtrap11 +ffffffff82518270 ? Xtrap12 +ffffffff82518280 ? Xtrap13 +ffffffff82518290 ? Xtrap14 +ffffffff82518290 ? Xtrap15 +ffffffff82518290 ? Xtrap16 +ffffffff82518290 ? Xtrap17 +ffffffff82518290 ? Xtrap18 +ffffffff82518290 ? Xtrap19 +ffffffff82518290 ? Xtrap1a +ffffffff82518290 ? Xtrap1b +ffffffff82518290 ? Xtrap1c +ffffffff82518290 ? Xtrap1d +ffffffff82518290 ? Xtrap1e +ffffffff82518290 ? Xtrap1f +ffffffff825182a0 ? x2apic_eoi +ffffffff825182c0 ? Xintr_lapic_ipi +ffffffff825182f0 ? Xipi_invltlb +ffffffff82518310 ? Xipi_invlpg +ffffffff82518340 ? Xipi_invlrange +ffffffff82518380 ? Xipi_invltlb_pcid +ffffffff825183c0 ? Xipi_invlpg_pcid +ffffffff82518410 ? Xipi_invlrange_pcid +ffffffff82518480 ? Xintr_lapic_ltimer +ffffffff825184b0 ? Xintr_xen_upcall +ffffffff825184e0 ? Xintr_hyperv_upcall +ffffffff82518510 ? Xintr_legacy0 +ffffffff82518540 ? Xintr_legacy1 +ffffffff82518570 ? Xintr_legacy2 +ffffffff825185a0 ? Xintr_legacy3 +ffffffff825185d0 ? Xintr_legacy4 +ffffffff82518600 ? Xintr_legacy5 +ffffffff82518630 ? Xintr_legacy6 +ffffffff82518660 ? Xintr_legacy7 +ffffffff82518690 ? Xintr_legacy8 +ffffffff825186c0 ? Xintr_legacy9 +ffffffff825186f0 ? Xintr_legacy10 +ffffffff82518720 ? Xintr_legacy11 +ffffffff82518750 ? Xintr_legacy12 +ffffffff82518780 ? Xintr_legacy13 +ffffffff825187b0 ? Xintr_legacy14 +ffffffff825187e0 ? Xintr_legacy15 +ffffffff82518810 ? Xintr_ioapic_edge0 +ffffffff82518840 ? Xintr_ioapic_edge1 +ffffffff82518870 ? Xintr_ioapic_edge2 +ffffffff825188a0 ? Xintr_ioapic_edge3 +ffffffff825188d0 ? Xintr_ioapic_edge4 +ffffffff82518900 ? Xintr_ioapic_edge5 +ffffffff82518930 ? Xintr_ioapic_edge6 +ffffffff82518960 ? Xintr_ioapic_edge7 +ffffffff82518990 ? Xintr_ioapic_edge8 +ffffffff825189c0 ? Xintr_ioapic_edge9 +ffffffff825189f0 ? Xintr_ioapic_edge10 +ffffffff82518a20 ? Xintr_ioapic_edge11 +ffffffff82518a50 ? Xintr_ioapic_edge12 +ffffffff82518a80 ? Xintr_ioapic_edge13 +ffffffff82518ab0 ? Xintr_ioapic_edge14 +ffffffff82518ae0 ? Xintr_ioapic_edge15 +ffffffff82518b10 ? Xintr_ioapic_edge16 +ffffffff82518b40 ? Xintr_ioapic_edge17 +ffffffff82518b70 ? Xintr_ioapic_edge18 +ffffffff82518ba0 ? Xintr_ioapic_edge19 +ffffffff82518bd0 ? Xintr_ioapic_edge20 +ffffffff82518c00 ? Xintr_ioapic_edge21 +ffffffff82518c30 ? Xintr_ioapic_edge22 +ffffffff82518c60 ? Xintr_ioapic_edge23 +ffffffff82518c90 ? Xintr_ioapic_edge24 +ffffffff82518cc0 ? Xintr_ioapic_edge25 +ffffffff82518cf0 ? Xintr_ioapic_edge26 +ffffffff82518d20 ? Xintr_ioapic_edge27 +ffffffff82518d50 ? Xintr_ioapic_edge28 +ffffffff82518d80 ? Xintr_ioapic_edge29 +ffffffff82518db0 ? Xintr_ioapic_edge30 +ffffffff82518de0 ? Xintr_ioapic_edge31 +ffffffff82518e10 ? Xintr_ioapic_edge32 +ffffffff82518e40 ? Xintr_ioapic_edge33 +ffffffff82518e70 ? Xintr_ioapic_edge34 +ffffffff82518ea0 ? Xintr_ioapic_edge35 +ffffffff82518ed0 ? Xintr_ioapic_edge36 +ffffffff82518f00 ? Xintr_ioapic_edge37 +ffffffff82518f30 ? Xintr_ioapic_edge38 +ffffffff82518f60 ? Xintr_ioapic_edge39 +ffffffff82518f90 ? Xintr_ioapic_edge40 +ffffffff82518fc0 ? Xintr_ioapic_edge41 +ffffffff82518ff0 ? Xintr_ioapic_edge42 +ffffffff82519020 ? Xintr_ioapic_edge43 +ffffffff82519050 ? Xintr_ioapic_edge44 +ffffffff82519080 ? Xintr_ioapic_edge45 +ffffffff825190b0 ? Xintr_ioapic_edge46 +ffffffff825190e0 ? Xintr_ioapic_edge47 +ffffffff82519110 ? Xintr_ioapic_edge48 +ffffffff82519140 ? Xintr_ioapic_edge49 +ffffffff82519170 ? Xintr_ioapic_edge50 +ffffffff825191a0 ? Xintr_ioapic_edge51 +ffffffff825191d0 ? Xintr_ioapic_edge52 +ffffffff82519200 ? Xintr_ioapic_edge53 +ffffffff82519230 ? Xintr_ioapic_edge54 +ffffffff82519260 ? Xintr_ioapic_edge55 +ffffffff82519290 ? Xintr_ioapic_edge56 +ffffffff825192c0 ? Xintr_ioapic_edge57 +ffffffff825192f0 ? Xintr_ioapic_edge58 +ffffffff82519320 ? Xintr_ioapic_edge59 +ffffffff82519350 ? Xintr_ioapic_edge60 +ffffffff82519380 ? Xintr_ioapic_edge61 +ffffffff825193b0 ? Xintr_ioapic_edge62 +ffffffff825193e0 ? Xintr_ioapic_edge63 +ffffffff82519410 ? Xintr_ioapic_level0 +ffffffff82519440 ? Xintr_ioapic_level1 +ffffffff82519470 ? Xintr_ioapic_level2 +ffffffff825194a0 ? Xintr_ioapic_level3 +ffffffff825194d0 ? Xintr_ioapic_level4 +ffffffff82519500 ? Xintr_ioapic_level5 +ffffffff82519530 ? Xintr_ioapic_level6 +ffffffff82519560 ? Xintr_ioapic_level7 +ffffffff82519590 ? Xintr_ioapic_level8 +ffffffff825195c0 ? Xintr_ioapic_level9 +ffffffff825195f0 ? Xintr_ioapic_level10 +ffffffff82519620 ? Xintr_ioapic_level11 +ffffffff82519650 ? Xintr_ioapic_level12 +ffffffff82519680 ? Xintr_ioapic_level13 +ffffffff825196b0 ? Xintr_ioapic_level14 +ffffffff825196e0 ? Xintr_ioapic_level15 +ffffffff82519710 ? Xintr_ioapic_level16 +ffffffff82519740 ? Xintr_ioapic_level17 +ffffffff82519770 ? Xintr_ioapic_level18 +ffffffff825197a0 ? Xintr_ioapic_level19 +ffffffff825197d0 ? Xintr_ioapic_level20 +ffffffff82519800 ? Xintr_ioapic_level21 +ffffffff82519830 ? Xintr_ioapic_level22 +ffffffff82519860 ? Xintr_ioapic_level23 +ffffffff82519890 ? Xintr_ioapic_level24 +ffffffff825198c0 ? Xintr_ioapic_level25 +ffffffff825198f0 ? Xintr_ioapic_level26 +ffffffff82519920 ? Xintr_ioapic_level27 +ffffffff82519950 ? Xintr_ioapic_level28 +ffffffff82519980 ? Xintr_ioapic_level29 +ffffffff825199b0 ? Xintr_ioapic_level30 +ffffffff825199e0 ? Xintr_ioapic_level31 +ffffffff82519a10 ? Xintr_ioapic_level32 +ffffffff82519a40 ? Xintr_ioapic_level33 +ffffffff82519a70 ? Xintr_ioapic_level34 +ffffffff82519aa0 ? Xintr_ioapic_level35 +ffffffff82519ad0 ? Xintr_ioapic_level36 +ffffffff82519b00 ? Xintr_ioapic_level37 +ffffffff82519b30 ? Xintr_ioapic_level38 +ffffffff82519b60 ? Xintr_ioapic_level39 +ffffffff82519b90 ? Xintr_ioapic_level40 +ffffffff82519bc0 ? Xintr_ioapic_level41 +ffffffff82519bf0 ? Xintr_ioapic_level42 +ffffffff82519c20 ? Xintr_ioapic_level43 +ffffffff82519c50 ? Xintr_ioapic_level44 +ffffffff82519c80 ? Xintr_ioapic_level45 +ffffffff82519cb0 ? Xintr_ioapic_level46 +ffffffff82519ce0 ? Xintr_ioapic_level47 +ffffffff82519d10 ? Xintr_ioapic_level48 +ffffffff82519d40 ? Xintr_ioapic_level49 +ffffffff82519d70 ? Xintr_ioapic_level50 +ffffffff82519da0 ? Xintr_ioapic_level51 +ffffffff82519dd0 ? Xintr_ioapic_level52 +ffffffff82519e00 ? Xintr_ioapic_level53 +ffffffff82519e30 ? Xintr_ioapic_level54 +ffffffff82519e60 ? Xintr_ioapic_level55 +ffffffff82519e90 ? Xintr_ioapic_level56 +ffffffff82519ec0 ? Xintr_ioapic_level57 +ffffffff82519ef0 ? Xintr_ioapic_level58 +ffffffff82519f20 ? Xintr_ioapic_level59 +ffffffff82519f50 ? Xintr_ioapic_level60 +ffffffff82519f80 ? Xintr_ioapic_level61 +ffffffff82519fb0 ? Xintr_ioapic_level62 +ffffffff82519fe0 ? Xintr_ioapic_level63 +ffffffff8251b000 ? codepatch_fill_nop +ffffffff8251b000 A __cptext_start +ffffffff8251b000 A __kutext_end +ffffffff8251b0b0 ? codepatch_maprw +ffffffff8251b190 ? codepatch_unmaprw +ffffffff8251b1f0 ? codepatch_nop +ffffffff8251b340 ? codepatch_replace +ffffffff8251b4e0 ? codepatch_call +ffffffff8251b500 ? codepatch_jmp +ffffffff8251c000 A __cptext_end +ffffffff8251c000 A __rodata_start +ffffffff8251c000 C _etext +ffffffff8251c000 C etext +ffffffff8251d000 r seeprom_read +ffffffff8251d004 r icl_mg_pll_find_divisors.div1_vals +ffffffff8251d028 r gen9bc_tgp_ddc_pin_map +ffffffff8251d038 r athn_ac2qid +ffffffff8251d038 r athn_ac2qid +ffffffff8251d038 r athn_ac2qid +ffffffff8251d044 r rtwn_get_rssi.cckoff +ffffffff8251d06c r rsu_ac2qid +ffffffff8251d07c r pckbc_portcmd +ffffffff8251d080 r tht_fifo_write_pad.pad +ffffffff8251d088 r rsu_get_rssi.cckoff +ffffffff8251d09c r adlp_n_revids +ffffffff8251d0ec r apple_iso_trans +ffffffff8251d0f0 r dg2_g12_revid_step_tbl +ffffffff8251d0f8 r wihap_check_tx.txratetable +ffffffff8251d0fc r dmamode +ffffffff8251d124 r gen9_edram_size_mb.sets +ffffffff8251e000 r isomappings +ffffffff8251e080 r unimappings +ffffffff8251e230 r replacements +ffffffff82521aff r cmd0646_9_tim_udma +ffffffff82575167 r pp_r600_decoded_lanes +ffffffff8259039f r cmd680_setup_channel.udma_tbl +ffffffff82597f86 r apollo_udma33_tim +ffffffff8259e029 r substchar +ffffffff825a00cf r apollo_udma100_tim +ffffffff825c78e4 r apollo_udma66_tim +ffffffff825ced0c r apollo_pio_rec +ffffffff825ddfc2 r cy_pio_rec +ffffffff8260d350 r apollo_udma133_tim +ffffffff82619e38 R drm_ca +ffffffff82619e60 R drm_filtops +ffffffff82619e90 R drmread_filtops +ffffffff8261a000 r vga_emulops +ffffffff8261a048 R vga_stdscreen +ffffffff8261a078 R vga_stdscreen_mono +ffffffff8261a0a8 R vga_stdscreen_bf +ffffffff8261a0d8 R vga_40lscreen +ffffffff8261a108 R vga_40lscreen_mono +ffffffff8261a138 R vga_40lscreen_bf +ffffffff8261a168 R vga_50lscreen +ffffffff8261a198 R vga_50lscreen_mono +ffffffff8261a1c8 R vga_50lscreen_bf +ffffffff8261a1f8 R vga_screenlist +ffffffff8261a208 R vga_screenlist_mono +ffffffff8261a218 R vga_accessops +ffffffff8261a278 r i945_wm_info +ffffffff8261a2b0 r bgansitopc +ffffffff8261a2b8 r pctoansi +ffffffff8261a2f8 r sdma_offsets +ffffffff8261a2f8 r sdma_offsets +ffffffff8261a328 r iha_rate_tbl +ffffffff8261a360 r i830_a_wm_info +ffffffff8261a398 r gen9_edram_size_mb.ways +ffffffff8261a400 r aggr_periodic_times +ffffffff8261a480 r jsl_ehl_revids +ffffffff8261a4f8 r michael_final.pad +ffffffff8261a520 r rt_copysa.maskarray +ffffffff8261a528 r i915_wm_info +ffffffff8261a530 r amdgpu_ih_clientid_jpeg +ffffffff8261a530 r amdgpu_ih_clientid_uvds +ffffffff8261a530 r amdgpu_ih_clientid_vcns +ffffffff8261a530 r amdgpu_ih_clientid_vcns +ffffffff8261a530 r amdgpu_ih_clientid_vcns +ffffffff8261a568 r vga_setfontset.cmaptabb +ffffffff8261a580 r tgl_revids +ffffffff8261a5d8 r i830_bc_wm_info +ffffffff8261a680 r __drm_universal_plane_init.default_modifiers +ffffffff8261a690 r iwn_tid2fifo +ffffffff8261a6a8 r vga_setfontset.cmaptaba +ffffffff8261a6b0 r crtc_offsets +ffffffff8261a6b0 r crtc_offsets +ffffffff8261a6b0 r crtc_offsets +ffffffff8261a6d0 r link_speed +ffffffff8261a6d0 r link_speed +ffffffff8261a6d0 r link_speed +ffffffff8261a748 r rtwn_r88e_get_rssi.cckoff +ffffffff8261b000 R edid_vendors +ffffffff8261b2c0 R edid_nvendors +ffffffff8261b2d0 R edid_products +ffffffff8261b330 R edid_nproducts +ffffffff8261b340 r _edid_modes +ffffffff8261c000 R videomode_list +ffffffff8261d080 R videomode_count +ffffffff8261e000 r ahc_hard_errors +ffffffff8261e080 r critical_sections +ffffffff8261e0b0 r patches +ffffffff8261ed50 r seqprog +ffffffff82620000 r ahc_switch +ffffffff82621000 r termstat_strings +ffffffff82621020 r critical_sections +ffffffff82621060 r seqprog +ffffffff82621d50 r patches +ffffffff82623000 r ahd_switch +ffffffff82624000 R aic_switch +ffffffff82625000 R adw_switch +ffffffff82626000 R gdt_switch +ffffffff82627000 R twe_switch +ffffffff82628000 R ciss_switch +ffffffff82628030 R ciss_level +ffffffff82628050 R ciss_stat +ffffffff82629000 R ami_switch +ffffffff82629028 R ami_raw_switch +ffffffff8262a000 R mfi_switch +ffffffff8262a028 R mfi_pd_switch +ffffffff8262a050 r mfi_iop_xscale +ffffffff8262a080 r mfi_iop_ppc +ffffffff8262a0b0 r mfi_iop_gen2 +ffffffff8262a0e0 r mfi_iop_skinny +ffffffff8262a110 r mfi_bbu_indicators +ffffffff8262a1c0 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs +ffffffff8262a1f0 r chv_oa_mux_regs +ffffffff8262a210 r fiji_clock_stretcher_lookup_table +ffffffff8262a210 r tonga_clock_stretcher_lookup_table +ffffffff8262a240 r link_speed +ffffffff8262a240 r link_speed +ffffffff8262a240 r link_speed +ffffffff8262a280 r drm_fb_xfrm.default_dst_pitch +ffffffff8262a280 r non_supported_protection +ffffffff8262a380 r tgl_uy_revids +ffffffff8262a3d0 r bwi_phy_noise_11g_rev1 +ffffffff8262a450 r cardslot_process_event.antonym_ev +ffffffff8262a4e0 r gen11_oa_mux_regs +ffffffff8262a5d0 r ddr2_cycle_tenths +ffffffff8262a640 r rtw_intr_rx.ratetbl +ffffffff8262a6c0 r abm_config +ffffffff8262a730 r getbootinfo.ports.30 +ffffffff8262a780 r reg_offsets +ffffffff8262a790 r bwi_rf_lo_measure_11g.rf_lo_adjust +ffffffff8262a7a0 r init_non_clock_fields.look_up +ffffffff8262a7b0 r uftdi_8u232am_getrate.roundoff +ffffffff8262a800 r zyd_rx_data.rates +ffffffff8262a810 r ieee80211_ra_valid_tx_mcs.max_mcs +ffffffff8262a850 r mmio_invalidate_full.gen8_regs +ffffffff8262a880 r bwi_phy_noise_11g +ffffffff8262a890 r hpt366_pio +ffffffff8262a8c0 r glk_revids +ffffffff8262a910 r bwi_rf_calc_nrssi_slope_11g.save_phy3_regs +ffffffff8262a930 r ether_crc32_be_update.rev +ffffffff8262a930 r rtw_grf5101_mac_crypt.caesar +ffffffff8262a980 r snb_b_fdi_train_param +ffffffff8262b000 R qlw_switch +ffffffff8262c000 R isp_2100_risc_code +ffffffff8263ebf0 R isp_2200_risc_code +ffffffff82651990 R isp_2300_risc_code +ffffffff8266b408 R qla_switch +ffffffff8266b430 r qla_regs_2100 +ffffffff8266b460 r qla_regs_2200 +ffffffff8266b490 r qla_regs_23XX +ffffffff8266c000 R ahci_atascsi_methods +ffffffff8266d000 R nvme_switch +ffffffff8266d028 r nvme_ops +ffffffff8266e000 R mpi_switch +ffffffff8266e100 r intel_hpll_vco.elk_vco +ffffffff8266e160 r pin_offsets +ffffffff8266e1c0 r firmware_list +ffffffff8266e220 r atom_arg_shift +ffffffff8266e220 r atom_arg_shift +ffffffff8266e260 r pf_syncookie_wstab +ffffffff8266e280 r ieee80211_media_init.mopts +ffffffff8266e2e0 r add_entropy_words.twist_table +ffffffff8266e380 r urtw_8225v2_txpwr_cck +ffffffff8266e3c0 r bwfm_pci_prio2fifo +ffffffff8266e3c0 r ieee80211_up_to_ac.up_to_ac +ffffffff8266e480 r paritytab +ffffffff8266e480 r x86emu_parity_tab +ffffffff8266e4a0 r legacy_connector_convert +ffffffff8266e4e0 r gen7_oa_mux_regs +ffffffff8266e500 r hsw_oa_mux_regs +ffffffff8266e520 r notetab +ffffffff8266e540 r urtw_8225v2_txpwr_cck_ch14 +ffffffff8266e560 r bwi_rf_calibval.rf_calibvals +ffffffff8266e600 r pf_syncookie_msstab +ffffffff8266e660 r xgmi3x16_pcs_err_status_reg_aldebaran +ffffffff8266e6c0 r uath_wme_init.uath_wme_11g +ffffffff8266e6e0 r gen7_oa_b_counters +ffffffff8266e840 r icl_revids +ffffffff8266e900 r rtwn_iq_calib_run.reg_adda +ffffffff8266e940 r atom_def_dst +ffffffff8266e940 r atom_def_dst +ffffffff8266e980 r sha256_initial_hash_value +ffffffff8266e9e0 r otus_edca_def +ffffffff8266ea00 r intel_hpll_vco.blb_vco +ffffffff8266eac0 r epic_pci_subsys_info +ffffffff8266eae0 r atom_arg_mask +ffffffff8266eae0 r atom_arg_mask +ffffffff8266eb40 r butmap +ffffffff8266eb80 r GFX_RLC_SRM_INDEX_CNTL_DATA_OFFSETS +ffffffff8266ebc0 r comsoft.lsrmap +ffffffff8266ec00 r tulip_mii_phy_readspecific.table +ffffffff8266ec20 r kbl_revids +ffffffff8266ece0 r intel_hpll_vco.pnv_vco +ffffffff8266ed40 r dmapageport +ffffffff8266ee00 r intel_hpll_vco.ctg_vco +ffffffff8266eec0 r drm_calculate_luminance_range.pre_computed_values +ffffffff8266f000 R sili_atascsi_methods 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ar9380_2_2_vals_5g20 +ffffffff82699ed0 r ar9380_2_2_vals_5g40 +ffffffff82699ff0 r ar9380_2_2_vals_2g40 +ffffffff8269a110 r ar9380_2_2_vals_2g20 +ffffffff8269a230 r ar9380_2_2_cm_regs +ffffffff8269a5d0 r ar9380_2_2_cm_vals +ffffffff8269ad00 r ar9380_2_2_fast_clock_regs +ffffffff8269ad20 r ar9380_2_2_fast_clock_vals_5g20 +ffffffff8269ad50 r ar9380_2_2_fast_clock_vals_5g40 +ffffffff8269ad74 r ar9380_2_2_serdes_regs +ffffffff8269ad80 r ar9380_2_2_serdes_vals +ffffffff8269ad90 r ar9380_2_2_rx_gain_regs +ffffffff8269af90 r ar9380_2_2_rx_gain_wo_xlna_vals +ffffffff8269b390 r ar9380_2_2_rx_gain_vals +ffffffff8269b790 r ar9485_1_1_rx_gain_regs +ffffffff8269b890 r ar9485_1_1_rx_gain_vals +ffffffff8269ba90 r ar9380_2_2_tx_gain_regs +ffffffff8269bb60 r ar9380_2_2_tx_gain_high_ob_db_vals_5g +ffffffff8269bd00 r ar9380_2_2_tx_gain_high_ob_db_vals_2g +ffffffff8269bea0 r ar9380_2_2_tx_gain_low_ob_db_vals_5g +ffffffff8269c040 r ar9380_2_2_tx_gain_low_ob_db_vals_2g +ffffffff8269c1e0 r ar9380_2_2_tx_gain_high_power_vals_5g +ffffffff8269c380 r ar9380_2_2_tx_gain_high_power_vals_2g +ffffffff8269c520 r ar9380_2_2_tx_gain_vals_5g +ffffffff8269c6c0 r ar9380_2_2_tx_gain_vals_2g +ffffffff8269c860 r ar9485_1_1_tx_gain_regs +ffffffff8269c8f0 r ar9485_1_1_tx_gain_vals_2g +ffffffff8269ca10 r ar9380_def_rom +ffffffff8269ce50 r ar9380_def_rom_h112 +ffffffff8269d290 r ar9380_def_rom_h116 +ffffffff8269d6d0 r ar9380_def_rom_x112 +ffffffff8269db10 r ar9380_def_rom_x113 +ffffffff8269e000 R atw_txthresh_tab_lo +ffffffff8269e050 R atw_txthresh_tab_hi +ffffffff8269e0a0 r atw_attach.empty_macaddr +ffffffff8269e0b0 r atw_attach.type_strings +ffffffff8269e0d0 r atw_rfmd2958_ifn +ffffffff8269e110 r atw_rfmd2958_rf1r +ffffffff8269e150 r atw_rxintr.rate_tbl +ffffffff8269f000 r rtw_identify_sta.empty_macaddr +ffffffff826a0000 r rtwn_set_key.etherzeroaddr +ffffffff826a0010 r rtl8188eu_rf_prog +ffffffff826a0030 r rtl8192e_rf_prog +ffffffff826a0060 r rtl8188ce_rf_prog +ffffffff826a0080 r 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intel_hpll_vco.cl_vco +ffffffff826a8020 r sgpr_init_compute_shader +ffffffff826a80d0 r trinity_override_mgpg_sequences +ffffffff826a8490 r vgpr_init_compute_shader +ffffffff826a8550 r voltage_swing_to_pre_emphasis +ffffffff826a9000 r malo_cmd_string.cmds +ffffffff826a90b0 r malo_cmd_string_result.results +ffffffff826aa000 R bwi_vendor_led_act +ffffffff826aa00c R bwi_default_led_act +ffffffff826aa010 R bwi_led_duration +ffffffff826aa380 r bwi_sup_bphy +ffffffff826aa3c0 r bwi_phy_freq_11g_rev1 +ffffffff826aa5c0 r bwi_phy_rotor_11g_rev1 +ffffffff826aa6a0 r bwi_phy_noise_scale_11g_rev2 +ffffffff826aa6e0 r bwi_phy_noise_scale_11g_rev7 +ffffffff826aa720 r bwi_phy_noise_scale_11g +ffffffff826aa760 r bwi_phy_sigma_sq_11g_rev2 +ffffffff826aa7d0 r bwi_phy_sigma_sq_11g_rev7 +ffffffff826aa840 r bwi_phy_delay_11g_rev1 +ffffffff826aa920 r bwi_rf_get_gains.save_phy_regs +ffffffff826aa940 r bwi_rf_lo_find.map +ffffffff826aa960 r bwi_txpower_map_11b +ffffffff826aa9a0 r bwi_txpower_map_11g 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tc_vars +ffffffff826dd000 r sys_gettimeofday.zerotz +ffffffff826de000 r taskq_sys_name +ffffffff826de006 r taskq_sys_mp_name +ffffffff826de010 R systq +ffffffff826de018 R systqmp +ffffffff826e0000 r gpt_get_fstype.gpt_uuid_openbsd +ffffffff826e0010 r gpt_get_fstype.gpt_uuid_msdos +ffffffff826e0020 r gpt_get_fstype.gpt_uuid_chromerootfs +ffffffff826e0030 r gpt_get_fstype.gpt_uuid_linux +ffffffff826e0040 r gpt_get_fstype.gpt_uuid_hfs +ffffffff826e0050 r gpt_get_fstype.gpt_uuid_unused +ffffffff826e0060 r gpt_get_fstype.gpt_uuid_efi_system +ffffffff826e0070 r gpt_get_fstype.gpt_uuid_bios_boot +ffffffff826e1000 r hiballoc_addr_RBT_INFO +ffffffff826e1018 R hiballoc_addr_RBT_TYPE +ffffffff826e2000 R logread_filtops +ffffffff826e3000 r phtree_RBT_INFO +ffffffff826e3018 R phtree_RBT_TYPE +ffffffff826e3020 r pool_lock_ops_rw +ffffffff826e3058 r pool_lock_ops_mtx +ffffffff826e4000 r pselregister.evf +ffffffff826e400c r pselregister.evff +ffffffff826e5000 R pipe_rfiltops +ffffffff826e5030 R pipe_wfiltops +ffffffff826e5060 R pipe_efiltops +ffffffff826e5090 r pipeops +ffffffff826e6000 R socketops +ffffffff826e7000 R sysvsem_vars +ffffffff826e8000 R char_type +ffffffff826e8100 R ttyread_filtops +ffffffff826e8130 R ttywrite_filtops +ffffffff826e8160 R ttyexcept_filtops +ffffffff826e9000 R ptcread_filtops +ffffffff826e9030 R ptcwrite_filtops +ffffffff826e9060 R ptcexcept_filtops +ffffffff826eb000 R domains +ffffffff826ec000 R unixdomain +ffffffff826ec050 R unixsw +ffffffff826ed000 R solisten_filtops +ffffffff826ed030 R soread_filtops +ffffffff826ed060 R sowrite_filtops +ffffffff826ed090 R soexcept_filtops +ffffffff826ed0c0 R socket_klistops +ffffffff826ee000 R sun_noname +ffffffff826ee010 R uipc_usrreqs +ffffffff826ee0b0 R uipc_dgram_usrreqs +ffffffff826ee150 R unpstctl_vars +ffffffff826ee180 R unpsqctl_vars +ffffffff826ee1b0 R unpdgctl_vars +ffffffff826ef000 r namecache_rb_cache_RBT_INFO +ffffffff826ef018 R namecache_rb_cache_RBT_TYPE +ffffffff826f0000 R generic_filtops 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egre_tree_RBT_INFO +ffffffff8270d068 R egre_tree_RBT_TYPE +ffffffff8270d070 r nvgre_ucast_tree_RBT_INFO +ffffffff8270d088 R nvgre_ucast_tree_RBT_TYPE +ffffffff8270d090 r nvgre_mcast_tree_RBT_INFO +ffffffff8270d0a8 R nvgre_mcast_tree_RBT_TYPE +ffffffff8270d0b0 r eoip_tree_RBT_INFO +ffffffff8270d0c8 R eoip_tree_RBT_TYPE +ffffffff8270d0d0 r nvgre_etherbridge_ops +ffffffff8270e000 r trunk_protos +ffffffff8270f000 R ethermulticastaddr_slowprotocols +ffffffff8270f006 R lacp_info_tlv_template +ffffffff8270f00e R marker_info_tlv_template +ffffffff8270f012 R marker_response_tlv_template +ffffffff8270f020 R lacp_timer_funcs +ffffffff82710000 r lacp_rxm_state_names +ffffffff82710040 r lacp_rxm_event_names +ffffffff82710090 r aggr_port_selected_names +ffffffff827100b0 r lacp_mux_state_names +ffffffff827100e0 r lacp_mux_event_names +ffffffff82710128 r lacp_address_slow +ffffffff82711000 r tpmr_pf_ipv4 +ffffffff82711018 r tpmr_pf_ipv6 +ffffffff82712000 r bpe_tree_RBT_INFO +ffffffff82712018 R bpe_tree_RBT_TYPE +ffffffff82712020 r bpe_etherbridge_ops +ffffffff82713000 R pppx_rd_filtops +ffffffff82713030 R pppx_wr_filtops +ffffffff82713060 r pppx_ifs_RBT_INFO +ffffffff82713078 R pppx_ifs_RBT_TYPE +ffffffff82713080 r pppac_rd_filtops +ffffffff827130b0 r pppac_wr_filtops +ffffffff82714000 r vxlan_peers_RBT_INFO +ffffffff82714018 R vxlan_peers_RBT_TYPE +ffffffff82714020 r vxlan_etherbridge_ops +ffffffff82715000 R stoeplitz_cache +ffffffff82716000 R ieee80211_std_rateset_11a +ffffffff82716010 R ieee80211_std_rateset_11b +ffffffff82716020 R ieee80211_std_rateset_11g +ffffffff82716030 R ieee80211_std_ratesets_11n +ffffffff827163b0 R ieee80211_std_ratesets_11ac +ffffffff827166b0 r ieee80211_setbasicrates.basic +ffffffff82716710 r ieee80211_setmode.chanflags +ffffffff82716730 r ieee80211_rate2media.rates +ffffffff827168c0 r ieee80211_media2rate.ieeerates +ffffffff82717000 r Sbox +ffffffff82719000 r ieee80211_ioctl.empty_macaddr +ffffffff8271a000 r ieee80211_find_rxnode.zero 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auth_hash_hmac_sha2_256_128 +ffffffff8273a3a0 R auth_hash_hmac_sha2_384_192 +ffffffff8273a3e8 R auth_hash_hmac_sha2_512_256 +ffffffff8273a430 R auth_hash_gmac_aes_128 +ffffffff8273a478 R auth_hash_gmac_aes_192 +ffffffff8273a4c0 R auth_hash_gmac_aes_256 +ffffffff8273a508 R auth_hash_chacha20_poly1305 +ffffffff8273a550 R comp_algo_deflate +ffffffff8273b000 r IV +ffffffff8273c000 r idgen32_ftable +ffffffff8273d000 r Chacha20_Poly1305_Update.zeroes +ffffffff8273d010 r pad0 +ffffffff8273e000 r null_point +ffffffff8273e020 r base_point +ffffffff8273f000 R mplsdomain +ffffffff82740000 R mplsctl_vars +ffffffff82741000 r nfs_nodetree_RBT_INFO +ffffffff82741018 R nfs_nodetree_RBT_TYPE +ffffffff82742000 r nfsread_filtops +ffffffff82742030 r nfswrite_filtops +ffffffff82742060 r nfsvnode_filtops +ffffffff82743000 r nfsrv_v3errmap +ffffffff827430b0 r nfsrv_v2errmap +ffffffff82744000 R nfs_vfsops +ffffffff82745000 R nfs_vops +ffffffff82745110 R nfs_specvops +ffffffff82745220 R nfs_fifovops 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uaddr_free_rbtree_RBT_TYPE +ffffffff82753000 R aobj_pager +ffffffff82754000 R uvm_deviceops +ffffffff82755000 R kv_any +ffffffff82755018 R kv_intrsafe +ffffffff82755030 R kv_page +ffffffff82755048 R kp_dirty +ffffffff82755070 R kp_dma +ffffffff82755098 R kp_dma_contig +ffffffff827550c0 R kp_dma_zero +ffffffff827550e8 R kp_zero +ffffffff82755110 R kp_pageable +ffffffff82755138 R kp_none +ffffffff82755160 R kd_waitok +ffffffff82755178 R kd_nowait +ffffffff82755190 R kd_trylock +ffffffff82756000 R vmmapbsy +ffffffff82756010 r page_flagbits +ffffffff827560a8 r uvm_map_addr_RBT_INFO +ffffffff827560c0 R uvm_map_addr_RBT_TYPE +ffffffff82757000 R pmap_pager +ffffffff82757048 R bufcache_pager +ffffffff82758000 r uvm_objtree_RBT_INFO +ffffffff82758018 R uvm_objtree_RBT_TYPE +ffffffff82759000 r uvm_pmr_addr_RBT_INFO +ffffffff82759018 R uvm_pmr_addr_RBT_TYPE +ffffffff82759020 r uvm_pmr_size_RBT_INFO +ffffffff82759038 R uvm_pmr_size_RBT_TYPE +ffffffff82759040 r uvm_pmemrange_addr_RBT_INFO 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vio_ca +ffffffff827cb030 r virtio_net_feature_names +ffffffff827cc000 R vioblk_ca +ffffffff827cc028 R vioblk_switch +ffffffff827cd000 R viomb_ca +ffffffff827cd030 r viomb_feature_names +ffffffff827ce000 R viornd_ca +ffffffff827cf000 R vioscsi_ca +ffffffff827cf028 R vioscsi_switch +ffffffff827cf050 R vioscsi_vq_names +ffffffff827d0000 R vmmci_ca +ffffffff827d1000 R pci_ca +ffffffff827d2000 r pci_quirks +ffffffff827d3000 R pci_subclass_prehistoric +ffffffff827d3050 R pci_subclass_mass_storage +ffffffff827d3160 R pci_subclass_network +ffffffff827d3250 R pci_subclass_display +ffffffff827d32d0 R pci_subclass_multimedia +ffffffff827d3360 R pci_subclass_memory +ffffffff827d33c0 R pci_subclass_bridge +ffffffff827d3510 R pci_subclass_communications +ffffffff827d35d0 R pci_subclass_system +ffffffff827d36c0 R pci_subclass_input +ffffffff827d3770 R pci_subclass_dock +ffffffff827d37c0 R pci_subclass_processor +ffffffff827d3880 R pci_subclass_serialbus +ffffffff827d3990 R pci_subclass_wireless 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adw_asc38C0800_mcode_data +ffffffff827ff8a0 R adw_asc38C1600_mcode +ffffffff82801160 R adw_asc38C1600_mcode_data +ffffffff82802000 R twe_pci_ca +ffffffff82802028 R twe_pci_devices +ffffffff82803000 R arc_ca +ffffffff82803028 R arc_switch +ffffffff82803050 r arc_devices +ffffffff82803190 r arc_intel +ffffffff82803198 r arc_marvell +ffffffff828031a0 r arc_lsi +ffffffff828031a8 r arc_marvell2 +ffffffff82804000 R jmb_ca +ffffffff82804030 r jmb_devices +ffffffff82805000 R ahci_pci_ca +ffffffff82805028 R ahci_jmb_ca +ffffffff82805050 r ahci_devices +ffffffff82806000 R nvme_pci_ca +ffffffff82806028 r nvme_msi_blacklist +ffffffff82807000 R ami_pci_ca +ffffffff82807030 r ami_pci_subsys +ffffffff82807270 r ami_pci_vendors +ffffffff82808000 R mfi_pci_ca +ffffffff82808030 r mfi_pci_devices +ffffffff82809000 R mfii_ca +ffffffff82809028 R mfii_switch +ffffffff82809050 R mfii_pd_switch +ffffffff82809078 R mfii_iop_thunderbolt +ffffffff82809088 R mfii_iop_25 +ffffffff82809098 R mfii_iop_35 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qlw_pci_ca +ffffffff82818030 r qlw_devices +ffffffff82818050 r isp_1040_risc_code +ffffffff8281d9f0 r isp_1080_risc_code +ffffffff82825470 r isp_12160_risc_code +ffffffff8282d000 R qla_pci_ca +ffffffff8282d030 r qla_devices +ffffffff8282e000 R qle_ca +ffffffff8282e028 R qle_switch +ffffffff8282e050 r qle_devices +ffffffff8282e070 r isp_2400_risc_code +ffffffff8285da50 r isp_2500_risc_code +ffffffff82890000 R mpi_pci_ca +ffffffff82890030 r mpi_devices +ffffffff82891000 R mpii_ca +ffffffff82891028 R mpii_switch +ffffffff82891050 r mpii_devices +ffffffff82892000 R sili_pci_ca +ffffffff82892030 r sili_devices +ffffffff82893000 R aq_devices +ffffffff82893040 R aq_products +ffffffff82893100 R aq_fw1x_ops +ffffffff82893120 R aq_fw2x_ops +ffffffff82893140 R aq_ca +ffffffff82894000 R de_ca +ffffffff82894030 r tulip_srom_conninfo +ffffffff82894120 r tulip_mii_phy_attrlist +ffffffff828941e0 r tulip_21140_znyx_zx34x_boardsw +ffffffff82894208 r tulip_21040_10baset_only_boardsw +ffffffff82894230 r tulip_21040_boardsw +ffffffff82894258 r tulip_2114x_isv_boardsw +ffffffff82894280 r tulip_21140_smc9332_boardsw +ffffffff828942a8 r tulip_21040_auibnc_only_boardsw +ffffffff828942d0 r tulip_21140_cogent_em100_boardsw +ffffffff828942f8 r tulip_21140_accton_boardsw +ffffffff82894320 r tulip_21140_eb_boardsw +ffffffff82894348 r tulip_21041_boardsw +ffffffff82894370 r tulip_srom_mediums +ffffffff828943c0 r tulip_read_macaddr.testpat +ffffffff828943d0 r tulip_vendors +ffffffff82894480 r tulip_media_to_ifmedia +ffffffff828944e0 r tulip_chipdescs +ffffffff82895000 R ep_pci_ca +ffffffff82895030 R ep_pci_devices +ffffffff82896000 R pcn_ca +ffffffff82896028 R pcn_devices +ffffffff82896030 r pcn_79c970_rcvfw +ffffffff82896050 r pcn_79c970_xmtsp +ffffffff82896070 r pcn_79c970_xmtfw +ffffffff82896090 r pcn_79c971_rcvfw +ffffffff828960b0 r pcn_79c971_xmtsp_sram +ffffffff828960d0 r pcn_79c971_xmtsp +ffffffff828960f0 r pcn_79c971_xmtfw +ffffffff82896110 r pcn_variants +ffffffff82897000 R siop_products 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pciide_vendors +ffffffff8289a140 R pciide_pci_ca +ffffffff8289a168 R pciide_jmb_ca +ffffffff8289a190 r piix_isp_dma +ffffffff8289a193 r piix_rtc_dma +ffffffff8289a196 r apollo_pio_set +ffffffff8289a19b r cmd0643_9_data_tim_pio +ffffffff8289a1a0 r cmd0643_9_data_tim_dma +ffffffff8289a1a3 r cmd680_channel_map.init_val +ffffffff8289a1b1 r cmd680_setup_channel.udma2_tbl +ffffffff8289a1b8 r cmd680_setup_channel.dma_tbl +ffffffff8289a1be r cmd680_setup_channel.pio_tbl +ffffffff8289a1d0 r satalink_ba5_regmap +ffffffff8289a690 r sii3114_chansetup.channel_names +ffffffff8289a6b0 r cy_pio_pulse +ffffffff8289a6c0 r sis_udma133new_tim +ffffffff8289a6e0 r sis_pio133new_tim +ffffffff8289a6f4 r sis_dma133new_tim +ffffffff8289a700 r sis_udma66_tim +ffffffff8289a706 r sis_udma100new_tim +ffffffff8289a70c r sis_udma133old_tim +ffffffff8289a713 r sis_pio_act +ffffffff8289a718 r sis_pio_rec +ffffffff8289a71d r natsemi_pio_pulse +ffffffff8289a722 r natsemi_pio_recover +ffffffff8289a727 r natsemi_dma_pulse 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nforce_pio +ffffffff8289a8c3 r ixp_mdma_timings +ffffffff8289a8c6 r ixp_pio_timings +ffffffff8289b000 R ppb_ca +ffffffff8289c000 R cy_pci_ca +ffffffff8289c030 R cy_pci_devices +ffffffff8289d000 R rl_pci_ca +ffffffff8289d030 R rl_pci_devices +ffffffff8289e000 R re_pci_devices +ffffffff8289e030 R re_pci_ca +ffffffff8289f000 R vr_ca +ffffffff828a0000 R txp_ca +ffffffff828a0030 R txp_devices +ffffffff828a1000 r cards +ffffffff828a2000 r format_params +ffffffff828a21a0 r pixfmt_table +ffffffff828a2320 r meteor_pixfmt_table +ffffffff828a3000 R bktr_ca +ffffffff828a3028 R bktr_hw_if +ffffffff828a4000 r tuners +ffffffff828a4170 r freqTable +ffffffff828a4260 r nabcst +ffffffff828a42a0 r irccable +ffffffff828a4310 r hrccable +ffffffff828a4380 r weurope +ffffffff828a4420 r jpnbcst +ffffffff828a4460 r jpncable +ffffffff828a44c0 r xussr +ffffffff828a4530 r australia +ffffffff828a4590 r france +ffffffff828a5000 R xl_pci_ca +ffffffff828a5030 R xl_pci_devices +ffffffff828a6000 R fxp_pci_ca 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ixl_hmc_pack_rxq +ffffffff828ae830 r ixl_hmc_pack_txq +ffffffff828ae8a0 r ixl_sfp_ops +ffffffff828ae8b8 r ixl_qsfp_ops +ffffffff828af000 R xge_ca +ffffffff828af028 R xge_devices +ffffffff828af030 r xge_fix_mac +ffffffff828af110 r xge_xena_dtx_cfg +ffffffff828af170 r xge_herc_dtx_cfg +ffffffff828b0000 R thtc_ca +ffffffff828b0028 R tht_ca +ffffffff828b0050 r thtc_devices +ffffffff828b0068 r tht_link_state.interval +ffffffff828b1000 R myx_ca +ffffffff828b1028 R myx_devices +ffffffff828b2000 R oce_ca +ffffffff828b2030 R oce_devices +ffffffff828b3000 R dc_pci_ca +ffffffff828b4000 R epic_pci_ca +ffffffff828b4028 R epic_pci_devices +ffffffff828b5000 R ti_pci_ca +ffffffff828b5030 R ti_devices +ffffffff828b6000 R ne_pci_ca +ffffffff828b6030 R ne_pci_prod +ffffffff828b7000 R gem_pci_ca +ffffffff828b7030 R gem_pci_devices +ffffffff828b7050 r gem_promhdr +ffffffff828b7052 r gem_promdat +ffffffff828b705a r gem_promdat2 +ffffffff828b8000 R cas_ca +ffffffff828b8028 R cas_pci_devices +ffffffff828b8030 r cas_promhdr +ffffffff828b8032 r cas_promdat_sun +ffffffff828b803a r cas_promdat_ns +ffffffff828b8042 r cas_promdat2 +ffffffff828b9000 R sf_pci_ca +ffffffff828b9028 R sf_pci_products +ffffffff828ba000 R sis_ca +ffffffff828ba028 R sis_devices +ffffffff828bb000 R se_devices +ffffffff828bb008 R se_ca +ffffffff828bc000 R uhci_pci_ca +ffffffff828bd000 R ohci_pci_ca +ffffffff828be000 R ehci_pci_ca +ffffffff828bf000 R xhci_pci_ca +ffffffff828c0000 R cbb_pci_ca +ffffffff828c0028 r pccbb_pcmcia_do_io_map.pcic_iowidth +ffffffff828c1000 R skc_devices +ffffffff828c1030 R skc_ca +ffffffff828c1058 R sk_ca +ffffffff828c2000 R mskc_devices +ffffffff828c20a8 R mskc_ca +ffffffff828c20d0 R msk_ca +ffffffff828c2100 r msk_mib +ffffffff828c3000 R puc_pci_ca +ffffffff828c4000 R puc_devs +ffffffff828c9000 R com_puc_ca +ffffffff828c9030 r puc_port_types +ffffffff828ca000 R lpt_puc_ca +ffffffff828cb000 R wi_pci_ca +ffffffff828cb030 r wi_pci_products +ffffffff828cc000 R an_pci_ca +ffffffff828cc030 R an_pci_devices +ffffffff828cd000 R iwi_devices +ffffffff828cd010 R iwi_ca +ffffffff828ce000 R wpi_ca +ffffffff828ce028 r wpi_devices +ffffffff828ce030 r wpi_rates +ffffffff828ce050 r wpi_rf_gain_5ghz +ffffffff828ce0a0 r wpi_dsp_gain_5ghz +ffffffff828ce0f0 r wpi_rf_gain_2ghz +ffffffff828ce140 r wpi_dsp_gain_2ghz +ffffffff828ce190 r wpi_pmgt +ffffffff828ce310 r wpi_bands +ffffffff828cf000 R iwn_mcs2ridx +ffffffff828cf020 R iwn_ca +ffffffff828cf050 r iwn_devices +ffffffff828cf0e8 r iwn4965_sensitivity_limits +ffffffff828cf124 r iwn5000_sensitivity_limits +ffffffff828cf160 r iwn5150_sensitivity_limits +ffffffff828cf19c r iwn1000_sensitivity_limits +ffffffff828cf1d8 r iwn6000_sensitivity_limits +ffffffff828cf214 r iwn2000_sensitivity_limits +ffffffff828cf250 r iwn_fw_errmsg +ffffffff828cf340 r iwn4965_set_txpower.tdiv +ffffffff828cf360 r iwn4965_rf_gain_5ghz +ffffffff828cf3d0 r iwn4965_dsp_gain_5ghz +ffffffff828cf440 r iwn4965_dsp_gain_2ghz +ffffffff828cf4b0 r iwn_pmgt +ffffffff828cf6f0 r iwn4965_post_alive.qid2fifo +ffffffff828cf700 r iwn_bands +ffffffff828cf770 r iwn_rates +ffffffff828cf820 r iwn4965_rf_gain_2ghz +ffffffff828d0000 R iwm_nvm_channels +ffffffff828d0030 R iwm_nvm_channels_8000 +ffffffff828d0070 R iwm_rates +ffffffff828d00d0 R iwm_ht_mcs2ridx +ffffffff828d0110 R iwm_tid_to_ac +ffffffff828d0118 R iwm_ac_to_tx_fifo +ffffffff828d0120 R iwm_nvm_to_read +ffffffff828d0144 r iwm_set_hw_address_8000.reserved_mac +ffffffff828d0180 r iwm_sf_full_timeout +ffffffff828d01b0 r iwm_sf_full_timeout_def +ffffffff828d01e0 r advanced_lookup +ffffffff828d0320 r iwm_devices +ffffffff828d0360 R iwm_ca +ffffffff828d1000 R iwx_9560_quz_a0_jf_b0_cfg +ffffffff828d1020 R iwx_9560_qu_c0_jf_b0_cfg +ffffffff828d1040 R iwx_qu_b0_hr1_b0 +ffffffff828d1060 R iwx_qu_b0_hr_b0 +ffffffff828d1080 R iwx_ax201_cfg_qu_hr +ffffffff828d10a0 R iwx_qu_c0_hr1_b0 +ffffffff828d10c0 R iwx_qu_c0_hr_b0 +ffffffff828d10e0 R iwx_ax201_cfg_qu_c0_hr_b0 +ffffffff828d1100 R iwx_quz_a0_hr1_b0 +ffffffff828d1120 R iwx_ax201_cfg_quz_hr +ffffffff828d1140 R iwx_cfg_so_a0_hr_b0 +ffffffff828d1160 R iwx_cfg_quz_a0_hr_b0 +ffffffff828d1180 R iwx_2ax_cfg_so_gf_a0 +ffffffff828d11a0 R iwx_2ax_cfg_so_gf_a0_long +ffffffff828d11c0 R iwx_2ax_cfg_so_gf4_a0 +ffffffff828d11e0 R iwx_2ax_cfg_so_gf4_a0_long +ffffffff828d1200 R iwx_2ax_cfg_ty_gf_a0 +ffffffff828d1220 R iwx_2ax_cfg_so_jf_b0 +ffffffff828d1240 R iwx_nvm_channels_8000 +ffffffff828d1280 R iwx_rates +ffffffff828d12e0 R iwx_mcs2ridx +ffffffff828d1320 R iwx_tid_to_ac +ffffffff828d1328 R iwx_ac_to_tx_fifo +ffffffff828d1330 r iwx_nvm_channels_uhb +ffffffff828d139e r iwx_is_valid_mac_addr.reserved_mac +ffffffff828d13b0 r iwx_sf_full_timeout +ffffffff828d13e0 r iwx_sf_full_timeout_def +ffffffff828d1410 r advanced_lookup +ffffffff828d1550 r iwx_devices +ffffffff828d1590 r iwx_dev_info_table +ffffffff828d1de8 R iwx_ca +ffffffff828d2000 R cmpci_ca +ffffffff828d2028 R cmpci_hw_if +ffffffff828d20e0 r cmpci_rate_table +ffffffff828d2120 R cmpci_devices +ffffffff828d2130 r cmpci_query_devinfo.mixer_port_names +ffffffff828d2160 r cmpci_query_devinfo.mixer_classes +ffffffff828d3000 R iha_pci_ca +ffffffff828d3028 R iha_switch +ffffffff828d4000 R pcscp_ca +ffffffff828d5000 R bge_ca +ffffffff828d5030 R bge_devices +ffffffff828d51b0 r bge_revisions +ffffffff828d5610 r bge_majorrevs +ffffffff828d6000 R bnx_devices +ffffffff828d6020 R bnx_ca +ffffffff828d7000 R vge_ca +ffffffff828d7028 R vge_devices +ffffffff828d8000 R stge_ca +ffffffff828d8028 R stge_mii_bitbang_ops +ffffffff828d8050 R stge_devices +ffffffff828d9000 R nfe_ca +ffffffff828d9030 R nfe_devices +ffffffff828da000 R et_devices +ffffffff828da008 R et_ca +ffffffff828db000 R jme_devices +ffffffff828db008 R jme_ca +ffffffff828dc000 R age_devices +ffffffff828dc008 R age_ca +ffffffff828dd000 R alc_devices +ffffffff828dd038 R alc_ca +ffffffff828de000 R ale_devices +ffffffff828de008 R ale_ca +ffffffff828df000 R amdpm_ca +ffffffff828df030 R amdpm_ids +ffffffff828e0000 R bce_ca +ffffffff828e0028 R bce_devices +ffffffff828e1000 R ath_pci_ca +ffffffff828e2000 R athn_pci_ca +ffffffff828e2030 r athn_pci_devices +ffffffff828e3000 R atw_pci_ca +ffffffff828e3028 R atw_pci_devices +ffffffff828e4000 R rtw_pci_ca +ffffffff828e4030 R rtw_pci_products +ffffffff828e5000 R rtwn_pci_ca +ffffffff828e5030 r rtwn_pci_devices +ffffffff828e5040 r rtl8188eu_mac +ffffffff828e51b0 r rtl8192cu_mac +ffffffff828e5310 r rtl8192ce_mac +ffffffff828e5458 r rtl8188eu_bb_prog +ffffffff828e5480 r rtl8723a_bb_prog +ffffffff828e54a8 r rtl8192ce_bb_prog_1t +ffffffff828e54d0 r rtl8192ce_bb_prog_2t +ffffffff828e5500 r rtl8188eu_bb_regs +ffffffff828e5680 r rtl8188eu_bb_vals +ffffffff828e5980 r rtl8188eu_agc_vals +ffffffff828e5b80 r rtl8723a_bb_regs +ffffffff828e5d00 r rtl8723a_bb_vals +ffffffff828e5ff0 r rtl8192ce_agc_vals +ffffffff828e6270 r rtl8192ce_bb_regs +ffffffff828e63f0 r rtl8192ce_bb_vals_1t +ffffffff828e66e0 r rtl8192ce_bb_vals_2t +ffffffff828e7000 R ral_pci_ca +ffffffff828e7030 R ral_pci_devices +ffffffff828e8000 R acx_pci_ca +ffffffff828e8028 R acx_pci_devices +ffffffff828e9000 R pgt_pci_ca +ffffffff828e9028 R pgt_pci_devices +ffffffff828ea000 R malo_pci_ca +ffffffff828ea028 R malo_pci_devices +ffffffff828eb000 R bwi_pci_ca +ffffffff828eb030 R bwi_pci_devices +ffffffff828ec000 R piixpm_ca +ffffffff828ec030 R piixpm_ids +ffffffff828ed000 R vic_ca +ffffffff828ed028 R vic_devices +ffffffff828ee000 R vmx_devices +ffffffff828ee008 R vmx_ca +ffffffff828ee030 r vmx_tx_kstat_tpl +ffffffff828ee0d0 r vmx_kstat_rate +ffffffff828ee0e0 r vmx_rx_kstat_tpl +ffffffff828ef000 R vmwpvs_ca +ffffffff828ef028 R vmwpvs_switch +ffffffff828f0000 R lii_ca +ffffffff828f0028 R lii_devices +ffffffff828f1000 R ichiic_ca +ffffffff828f1030 R ichiic_ids +ffffffff828f2000 R viapm_ca +ffffffff828f2030 R viapm_ids +ffffffff828f2070 r val_to_temp +ffffffff828f2870 r val_to_uV.mult +ffffffff828f3000 R amdiic_ca +ffffffff828f3028 R amdiic_ids +ffffffff828f4000 R nviic_ca +ffffffff828f4030 R nviic_ids +ffffffff828f5000 R sdhc_pci_ca +ffffffff828f6000 R kate_ca +ffffffff828f6030 r kate_proc +ffffffff828f7000 R km_ca +ffffffff828f7030 r km_devices +ffffffff828f8000 R ksmn_ca +ffffffff828f8030 r ksmn_devices +ffffffff828f9000 R itherm_devices +ffffffff828f9008 R itherm_ca +ffffffff828fa000 R pchtemp_ca +ffffffff828fa030 R pchtemp_devices +ffffffff828fb000 R rtsx_pci_ca +ffffffff828fc000 R xspd_ca +ffffffff828fc028 R xspd_devices +ffffffff828fd000 R virtio_pci_ca +ffffffff828fe000 R dwiic_pci_ca +ffffffff828fe030 R dwiic_pci_ids +ffffffff828ff000 R bwfm_pci_ca +ffffffff828ff030 r bwfm_pci_devices +ffffffff82900000 R ccp_pci_ca +ffffffff82900030 r ccp_pci_devices +ffffffff82901000 R bnxt_devices +ffffffff82901040 R bnxt_ca +ffffffff82902000 R mcx_ca +ffffffff82902030 r mcx_devices +ffffffff82902060 r mcx_rss_config +ffffffff829020d0 r mcx_eth_cap_map +ffffffff829022d0 r mcx_kstat_ppcnt_ieee8023 +ffffffff829022e8 r mcx_kstat_ppcnt_rfc2863 +ffffffff82902300 r mcx_kstat_ppcnt_rfc2819 +ffffffff82902318 r mcx_kstat_ppcnt_rfc3635 +ffffffff82902330 r mcx_ppcnt_ieee8023_tpl +ffffffff829024b0 r mcx_ppcnt_rfc2863_tpl +ffffffff829025c0 r mcx_ppcnt_rfc2819_tpl +ffffffff82902770 r mcx_ppcnt_rfc3635_tpl +ffffffff829028b0 r mcx_kstat_mtmp_tpl +ffffffff82902950 r mcx_kstat_mtmp_rate +ffffffff82902960 r mcx_queue_kstat_tpl +ffffffff82903000 R iavf_ca +ffffffff82903030 r iavf_devices +ffffffff82903040 r iavf_aq_regs +ffffffff829030b0 r iavf_link_speeds +ffffffff82904000 R rge_ca +ffffffff82904028 R rge_devices +ffffffff82904030 r rtl8125_mac_cfg2_ephy +ffffffff82904090 r rge_phy_config_mac_cfg3.mac_cfg3_a438_value +ffffffff829040b0 r rge_phy_config_mac_cfg3.mac_cfg3_b88e_value +ffffffff82904110 r rge_phy_config_mac_cfg4.mac_cfg4_b87c_value +ffffffff82904170 r rtl8125_mac_cfg4_ephy +ffffffff829041e0 r rtl8125_mac_cfg2_mcu +ffffffff82904e80 r rtl8125_mac_cfg3_mcu +ffffffff82905720 r rtl8125_mac_cfg4_mcu +ffffffff82907d10 r rtl8125_mac_cfg5_mcu +ffffffff82908c10 r rtl8125_mac_bps +ffffffff82908f80 r rtl8125b_mac_bps +ffffffff82909120 r rge_kstats_tpl +ffffffff8290a000 R igc_devices +ffffffff8290a040 R igc_ca +ffffffff8290b000 R com_pci_ca +ffffffff8290b030 R com_pci_ids +ffffffff8290c000 r agp_attach.agp_max +ffffffff8290c048 R agp_ca +ffffffff8290d000 R intagp_ca +ffffffff8290e000 r drm_plane_create_rotation_property.props +ffffffff8290f000 r drm_bridge_priv_state_funcs +ffffffff82911000 r color_encoding_name +ffffffff82911020 r color_range_name +ffffffff82912000 r drm_subpixel_enum_list +ffffffff82912060 r drm_dpms_enum_list +ffffffff829120a0 r drm_dvi_i_select_enum_list +ffffffff829120d0 r drm_dvi_i_subconnector_enum_list +ffffffff82912100 r drm_tv_select_enum_list +ffffffff82912150 r drm_tv_subconnector_enum_list +ffffffff829121a0 r drm_dp_subconnector_enum_list +ffffffff82912210 r drm_link_status_enum_list +ffffffff82912230 r drm_scaling_mode_enum_list +ffffffff82912270 r drm_aspect_ratio_enum_list +ffffffff829122a0 r hdmi_colorspaces +ffffffff82912370 r dp_colorspaces +ffffffff82912450 r drm_content_type_enum_list +ffffffff829124a0 r drm_panel_orientation_enum_list +ffffffff829124e0 r privacy_screen_enum +ffffffff82913000 r drm_crtc_fence_ops +ffffffff82914000 r drm_dmt_modes +ffffffff82916940 r edid_cea_modes_1 +ffffffff8291a4d0 r edid_cea_modes_193 +ffffffff8291b180 r edid_quirk_list +ffffffff8291b350 r edid_4k_modes +ffffffff8291b5b0 r edid_est_modes +ffffffff8291bdb0 r est3_modes +ffffffff8291bf10 r stereo_mandatory_modes +ffffffff8291bf90 r extra_modes +ffffffff8291c000 r drm_encoder_enum_list +ffffffff8291d000 r drm_fbdev_client_funcs +ffffffff8291d020 r drm_fb_helper_generic_funcs +ffffffff8291d028 r drm_fbdev_fb_ops +ffffffff8291e000 r drm_fb_xrgb8888_to_rgb332.dst_pixsize +ffffffff8291e004 r drm_fb_xrgb8888_to_rgb565.dst_pixsize +ffffffff8291e008 r drm_fb_xrgb8888_to_rgb888.dst_pixsize +ffffffff8291e00c r drm_fb_xrgb8888_to_xrgb2101010.dst_pixsize +ffffffff8291e010 r drm_fb_xrgb8888_to_gray8.dst_pixsize +ffffffff8291e014 r drm_fb_rgb888_to_xrgb8888.dst_pixsize +ffffffff8291e018 r drm_fb_rgb565_to_xrgb8888.dst_pixsize +ffffffff8291f000 r __drm_format_info.formats +ffffffff82920000 R drm_pgops +ffffffff82921000 r drm_ioctls +ffffffff82923000 r dma_fence_stub_ops +ffffffff82923038 R dma_fence_array_ops +ffffffff82923070 R dma_fence_chain_ops +ffffffff829230a8 R dmabufops +ffffffff829230e0 R syncfileops +ffffffff82924000 r drm_plane_type_enum_list +ffffffff82925000 r drm_mode_status_names +ffffffff82926000 r primary_plane_funcs +ffffffff82926068 r safe_modeset_formats +ffffffff82927000 r orientation_data +ffffffff8292a060 r lcd800x1280_rightside_up +ffffffff8292a078 r lcd720x1280_rightside_up +ffffffff8292a090 r asus_t100ha +ffffffff8292a0a8 r lcd1080x1920_leftside_up +ffffffff8292a0c0 r lcd1200x1920_rightside_up +ffffffff8292a0d8 r gpd_micropc +ffffffff8292a0f0 r gpd_pocket +ffffffff8292a108 r gpd_pocket2 +ffffffff8292a120 r gpd_win +ffffffff8292a138 r gpd_win2 +ffffffff8292a150 r itworks_tw891 +ffffffff8292a168 r onegx1_pro +ffffffff8292a180 r lcd1600x2560_leftside_up +ffffffff8292a198 r lcd1280x1920_rightside_up +ffffffff8292a1b0 r .compoundliteral +ffffffff8292a1c0 r .compoundliteral.5 +ffffffff8292a1e8 r .compoundliteral.9 +ffffffff8292a208 r .compoundliteral.17 +ffffffff8292a248 r .compoundliteral.21 +ffffffff8292a268 r .compoundliteral.23 +ffffffff8292a278 r .compoundliteral.25 +ffffffff8292b000 r drm_gem_prime_dmabuf_ops +ffffffff8292d000 r is_hdmi_adaptor.dp_dual_mode_hdmi_id +ffffffff8292e000 r drm_dp_phy_name.phy_names +ffffffff8292e048 r drm_dp_i2c_algo +ffffffff8292e058 r drm_dp_i2c_lock_ops +ffffffff8292e070 r dp_aux_bl_ops +ffffffff8292e090 r dpcd_quirk_list +ffffffff8292e320 r drm_dp_psr_setup_time.psr_setup_time_us +ffffffff8292f000 R drm_dp_mst_topology_state_funcs +ffffffff8292f020 r drm_dp_mst_req_type_str.req_type_str +ffffffff8292f1f0 r drm_dp_mst_sideband_tx_state_str.sideband_reason_str +ffffffff8292f220 r drm_dp_mst_nak_reason_str.nak_reason_str +ffffffff8292f278 r drm_dp_mst_i2c_algo +ffffffff82930000 r hdmi_colorimetry_val +ffffffff82931000 r ttm_bo_init_reserved.sys_mem +ffffffff82932000 r ttm_bo_pipeline_gutting.sys_mem +ffffffff82933018 R ttm_bo_vm_ops +ffffffff82934000 r ttm_range_manager_func +ffffffff82935018 r ttm_kmap_iter_io_ops +ffffffff82935030 r ttm_kmap_iter_linear_io_ops +ffffffff82936000 r ttm_sys_manager_func +ffffffff82937000 r ttm_kmap_iter_tt_ops +ffffffff82938000 r drm_sched_fence_ops_scheduled +ffffffff82938038 r drm_sched_fence_ops_finished +ffffffff82939000 R ch7017_ops +ffffffff8293a000 R ch7xxx_ops +ffffffff8293a060 r ch7xxx_ids +ffffffff8293b000 R ivch_ops +ffffffff8293b060 r backup_addresses +ffffffff8293c000 R ns2501_ops +ffffffff8293c060 r mode_agnostic_values +ffffffff8293c0e0 r ns2501_modes +ffffffff8293d000 R sil164_ops +ffffffff8293e000 R tfp410_ops +ffffffff8293f000 r chv_dpll +ffffffff8293f050 r vlv_dpll +ffffffff8293f0a0 r g4x_dpll +ffffffff8293f0f0 r pch_dpll +ffffffff8293f138 r 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inteldrm_backlight_ops +ffffffff829ac018 R inteldrm_ca +ffffffff829ac040 r i915_drm_driver +ffffffff829ac130 r i915_ioctls +ffffffff829ad000 r i915_hpd_funcs +ffffffff829ad008 r icp_hpd_funcs +ffffffff829ad010 r dg1_hpd_funcs +ffffffff829ad018 r gen11_hpd_funcs +ffffffff829ad020 r bxt_hpd_funcs +ffffffff829ad028 r spt_hpd_funcs +ffffffff829ad030 r ilk_hpd_funcs +ffffffff829ad040 r hpd_status_g4x +ffffffff829ad080 r hpd_status_i915 +ffffffff829ad0c0 r hpd_gen11 +ffffffff829ad100 r hpd_sde_dg1 +ffffffff829ad140 r hpd_icp +ffffffff829ad180 r hpd_spt +ffffffff829ad1c0 r hpd_cpt +ffffffff829ad200 r hpd_ibx +ffffffff829ad240 r hpd_bxt +ffffffff829ad280 r hpd_bdw +ffffffff829ad2c0 r hpd_ivb +ffffffff829ad300 r hpd_ilk +ffffffff829ad340 r hpd_mask_i915 +ffffffff829ae000 r init_funcs +ffffffff829af000 R pciidlist +ffffffff829b10b8 r i830_info +ffffffff829b1178 r i845g_info +ffffffff829b1238 r i85x_info +ffffffff829b12f8 r i865g_info +ffffffff829b13b8 r i915g_info +ffffffff829b1478 r i915gm_info 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skl_gt2_info +ffffffff829b2c78 r skl_gt3_info +ffffffff829b2d38 r skl_gt4_info +ffffffff829b2df8 r bxt_info +ffffffff829b2eb8 r glk_info +ffffffff829b2f78 r kbl_gt1_info +ffffffff829b3038 r kbl_gt2_info +ffffffff829b30f8 r kbl_gt3_info +ffffffff829b31b8 r cfl_gt1_info +ffffffff829b3278 r cfl_gt2_info +ffffffff829b3338 r cfl_gt3_info +ffffffff829b33f8 r cml_gt1_info +ffffffff829b34b8 r cml_gt2_info +ffffffff829b3578 r icl_info +ffffffff829b3638 r ehl_info +ffffffff829b36f8 r jsl_info +ffffffff829b37b8 r tgl_info +ffffffff829b3878 r rkl_info +ffffffff829b3938 r adl_s_info +ffffffff829b39f8 r adl_p_info +ffffffff829b3ab8 r dg1_info +ffffffff829b3b78 r dg2_info +ffffffff829b3c38 r ats_m_info +ffffffff829b3d00 r xelpmp_extra_gt +ffffffff829b3d40 r mtl_info +ffffffff829b4000 r oa_formats +ffffffff829b4060 r gen8_update_reg_state_unlocked.flex_regs +ffffffff829b4080 r gen8_oa_mux_regs +ffffffff829b40a0 r gen12_oa_b_counters +ffffffff829b40e0 r gen12_oa_mux_regs +ffffffff829b5000 r i915_query_funcs +ffffffff829b6000 R i915_fence_ops +ffffffff829b7000 r rsgt_ops +ffffffff829b8000 r fence_ops +ffffffff829b9000 r i915_ttm_buddy_manager_func +ffffffff829ba000 r bind_ops +ffffffff829bb000 r platform_names +ffffffff829bb140 r subplatform_ult_ids +ffffffff829bc000 r intel_dram_type_str.str +ffffffff829bd000 r intel_region_map +ffffffff829bf000 r pvc_clock_gating_funcs +ffffffff829bf008 r dg2_clock_gating_funcs +ffffffff829bf010 r xehpsdv_clock_gating_funcs +ffffffff829bf018 r adlp_clock_gating_funcs +ffffffff829bf020 r dg1_clock_gating_funcs +ffffffff829bf028 r gen12lp_clock_gating_funcs +ffffffff829bf030 r icl_clock_gating_funcs +ffffffff829bf038 r cfl_clock_gating_funcs +ffffffff829bf040 r skl_clock_gating_funcs +ffffffff829bf048 r kbl_clock_gating_funcs +ffffffff829bf050 r bxt_clock_gating_funcs +ffffffff829bf058 r glk_clock_gating_funcs +ffffffff829bf060 r bdw_clock_gating_funcs +ffffffff829bf068 r chv_clock_gating_funcs +ffffffff829bf070 r hsw_clock_gating_funcs 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adls_revids +ffffffff829c0140 r rkl_revids +ffffffff829c0160 r bxt_revids +ffffffff829c01a0 r skl_revids +ffffffff829c01d0 r pvc_bd_subids +ffffffff829c01f0 r pvc_ct_subids +ffffffff829c2000 r forcewake_domain_names +ffffffff829c2080 r __pvc_fw_ranges +ffffffff829c2200 r pvc_shadowed_regs +ffffffff829c2320 r __dg2_fw_ranges +ffffffff829c25f0 r dg2_shadowed_regs +ffffffff829c2710 r __xehp_fw_ranges +ffffffff829c29e0 r gen12_shadowed_regs +ffffffff829c2b00 r __gen12_fw_ranges +ffffffff829c2d10 r __gen11_fw_ranges +ffffffff829c2ec0 r gen11_shadowed_regs +ffffffff829c2f80 r __gen9_fw_ranges +ffffffff829c3100 r gen8_shadowed_regs +ffffffff829c3130 r __chv_fw_ranges +ffffffff829c31f0 r __gen6_fw_ranges +ffffffff829c3200 r __vlv_fw_ranges +ffffffff829c3258 r uncore_get_fallback +ffffffff829c3260 r uncore_get_normal +ffffffff829c3268 r uncore_get_thread_status +ffffffff829c4000 r atom_op_names +ffffffff829c43e0 r opcode_table +ffffffff829c4b90 r atom_dst_to_src +ffffffff829c4c10 r atom_io_names +ffffffff829c4c40 r atom_table_names +ffffffff829c4e90 r atom_iio_len +ffffffff829c5000 r vga_control_regs +ffffffff829c5018 r atombios_helper_funcs +ffffffff829c6000 r voltage_names +ffffffff829c6020 r pre_emph_names +ffffffff829c7000 r radeon_atom_backlight_ops +ffffffff829c7018 r radeon_atom_enc_funcs +ffffffff829c7038 r radeon_atom_dig_helper_funcs +ffffffff829c70a0 r radeon_atom_dac_helper_funcs +ffffffff829c7108 r radeon_atom_ext_helper_funcs +ffffffff829c8000 r caicos_cgcg_cgls_default +ffffffff829c8240 r barts_mgcg_default +ffffffff829c8900 r turks_mgcg_default +ffffffff829c8d80 r caicos_mgcg_default +ffffffff829c9110 r turks_sysls_default +ffffffff829c91d0 r caicos_sysls_default +ffffffff829c9280 r caicos_cgcg_cgls_enable +ffffffff829c94d0 r caicos_cgcg_cgls_disable +ffffffff829c9730 r barts_mgcg_enable +ffffffff829c97b0 r turks_mgcg_enable +ffffffff829c9830 r caicos_mgcg_enable +ffffffff829c98b0 r caicos_mgcg_disable +ffffffff829c9930 r turks_sysls_enable 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evergreen_dp_offsets +ffffffff829d3040 r evergreen_disp_int_status +ffffffff829d3060 r evergreen_golden_registers +ffffffff829d3260 r evergreen_golden_registers2 +ffffffff829d3310 r cypress_mgcg_init +ffffffff829d3a10 r juniper_mgcg_init +ffffffff829d3e80 r redwood_mgcg_init +ffffffff829d41b0 r cedar_golden_registers +ffffffff829d4390 r cedar_mgcg_init +ffffffff829d45f0 r wrestler_golden_registers +ffffffff829d4840 r supersumo_golden_registers +ffffffff829d4ba0 r sumo_golden_registers +ffffffff829d4be0 r barts_golden_registers +ffffffff829d4e00 r turks_golden_registers +ffffffff829d5040 r caicos_golden_registers +ffffffff829d5280 r sumo_rlc_save_restore_register_list +ffffffff829d53d0 r evergreen_cs_data +ffffffff829d5410 r SECT_CONTEXT_defs +ffffffff829d5490 r SECT_CLEAR_defs +ffffffff829d54b0 r SECT_CTRLCONST_defs +ffffffff829d54d0 r SECT_CONTEXT_def_2 +ffffffff829d54f0 r SECT_CONTEXT_def_4 +ffffffff829d5680 r SECT_CONTEXT_def_5 +ffffffff829d56a0 r SECT_CONTEXT_def_6 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r200_reg_safe_bm +ffffffff829e5000 r r300_reg_safe_bm +ffffffff829e6000 r r420_reg_safe_bm +ffffffff829e8000 r color_formats_table +ffffffff829e8480 r r600_reg_safe_bm +ffffffff829eb000 R r600_utc +ffffffff829eb040 R r600_dtc +ffffffff829eb080 r r600_encode_pci_lane_width.encoded_lanes +ffffffff829ed000 r r100_gfx_ring +ffffffff829ed070 r r300_gfx_ring +ffffffff829ed0e0 r rv515_gfx_ring +ffffffff829ed150 r r600_gfx_ring +ffffffff829ed1c0 r r600_dma_ring +ffffffff829ed230 r rv6xx_uvd_ring +ffffffff829ed2a0 r rv770_uvd_ring +ffffffff829ed310 r evergreen_gfx_ring +ffffffff829ed380 r evergreen_dma_ring +ffffffff829ed3f0 r cayman_gfx_ring +ffffffff829ed460 r cayman_dma_ring +ffffffff829ed4d0 r cayman_uvd_ring +ffffffff829ed540 r trinity_vce_ring +ffffffff829ed5b0 r si_gfx_ring +ffffffff829ed620 r si_dma_ring +ffffffff829ed690 r ci_gfx_ring +ffffffff829ed700 r ci_cp_ring +ffffffff829ed770 r ci_dma_ring +ffffffff829ed7e0 r ci_vce_ring +ffffffff829ee000 r object_connector_convert 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r radeon_tv_connector_funcs +ffffffff829f24f0 r radeon_lvds_connector_funcs +ffffffff829f3000 r radeon_family_name +ffffffff829f33f0 r radeon_px_quirk_list +ffffffff829f4000 r radeon_fb_funcs +ffffffff829f4018 r radeon_mode_funcs +ffffffff829f4060 r radeon_tmds_pll_enum_list +ffffffff829f4080 r radeon_tv_std_enum_list +ffffffff829f4100 r radeon_underscan_enum_list +ffffffff829f4130 r radeon_audio_enum_list +ffffffff829f4160 r radeon_dither_enum_list +ffffffff829f4180 r radeon_output_csc_enum_list +ffffffff829f41c0 r radeon_crtc_funcs +ffffffff829f4280 r hpd_names +ffffffff829f42b0 r encoder_names +ffffffff829f43e0 r radeon_afmt_init.eg_offsets +ffffffff829f5000 r aux_offset +ffffffff829f6000 R radeondrm_ca +ffffffff829f6030 r pciidlist +ffffffff829fa1d0 r kms_driver +ffffffff829fa2c0 r radeon_ioctls_kms +ffffffff829fb000 r radeon_fb_helper_funcs +ffffffff829fb008 r radeonfb_ops +ffffffff829fc000 R radeon_fence_ops +ffffffff829fe000 R radeon_gem_object_funcs +ffffffff829fe060 r radeon_gem_vm_ops +ffffffff829ff000 r radeon_i2c_algo +ffffffff829ff010 r radeon_atom_i2c_algo +ffffffff82a00000 r legacy_helper_funcs +ffffffff82a01000 r radeon_backlight_ops +ffffffff82a01018 r radeon_legacy_lvds_enc_funcs +ffffffff82a01038 r radeon_legacy_lvds_helper_funcs +ffffffff82a010a0 r radeon_legacy_tmds_int_enc_funcs +ffffffff82a010c0 r radeon_legacy_tmds_int_helper_funcs +ffffffff82a01128 r radeon_legacy_primary_dac_enc_funcs +ffffffff82a01148 r radeon_legacy_primary_dac_helper_funcs +ffffffff82a011b0 r radeon_legacy_tv_dac_enc_funcs +ffffffff82a011d0 r radeon_legacy_tv_dac_helper_funcs +ffffffff82a01238 r radeon_legacy_tmds_ext_enc_funcs +ffffffff82a01258 r radeon_legacy_tmds_ext_helper_funcs +ffffffff82a02000 r SLOPE_value +ffffffff82a02030 r YCOEF_EN_value +ffffffff82a02060 r YCOEF_value +ffffffff82a02090 r available_tv_modes +ffffffff82a02110 r hor_timing_NTSC +ffffffff82a02150 r vert_timing_NTSC +ffffffff82a02190 r hor_timing_PAL +ffffffff82a021d0 r vert_timing_PAL +ffffffff82a04000 r radeon_pm_state_type_name +ffffffff82a05000 r radeon_evict_flags.placements +ffffffff82a08000 r rs600_reg_safe_bm +ffffffff82a0a000 r rv515_reg_safe_bm +ffffffff82a0b000 r dll_speed_table +ffffffff82a0c000 r r7xx_golden_registers +ffffffff82a0c090 r r7xx_golden_dyn_gpr_registers +ffffffff82a0c100 r rv770ce_golden_registers +ffffffff82a0c160 r rv770_golden_registers +ffffffff82a0c1b0 r rv770_mgcg_init +ffffffff82a0c8f0 r rv730_golden_registers +ffffffff82a0c950 r rv730_mgcg_init +ffffffff82a0cee0 r rv710_golden_registers +ffffffff82a0cf30 r rv710_mgcg_init +ffffffff82a0d1d0 r rv740_golden_registers +ffffffff82a0d360 r rv740_mgcg_init +ffffffff82a0f000 r rv730_smc_int_vectors +ffffffff82a0f040 r rv710_smc_int_vectors +ffffffff82a0f080 r rv740_smc_int_vectors +ffffffff82a0f0c0 r cypress_smc_int_vectors +ffffffff82a0f100 r caicos_smc_int_vectors +ffffffff82a0f140 r cayman_smc_int_vectors +ffffffff82a10000 r tahiti_io_mc_regs +ffffffff82a10120 r pitcairn_io_mc_regs +ffffffff82a10240 r verde_io_mc_regs +ffffffff82a10360 r oland_io_mc_regs +ffffffff82a10480 r hainan_io_mc_regs +ffffffff82a105a0 r crtc_offsets +ffffffff82a105c0 r si_disp_int_status +ffffffff82a105e0 r tahiti_golden_registers +ffffffff82a10760 r tahiti_golden_rlc_registers +ffffffff82a107b0 r tahiti_mgcg_cgcg_init +ffffffff82a10d98 r tahiti_golden_registers2 +ffffffff82a10db0 r pitcairn_golden_registers +ffffffff82a10f00 r pitcairn_golden_rlc_registers +ffffffff82a10f40 r pitcairn_mgcg_cgcg_init +ffffffff82a113b0 r verde_golden_registers +ffffffff82a11620 r verde_golden_rlc_registers +ffffffff82a11660 r verde_mgcg_cgcg_init +ffffffff82a11ae0 r oland_golden_registers +ffffffff82a11c30 r oland_golden_rlc_registers +ffffffff82a11c70 r oland_mgcg_cgcg_init +ffffffff82a12000 r hainan_golden_registers +ffffffff82a1212c r hainan_golden_registers2 +ffffffff82a12140 r hainan_mgcg_cgcg_init +ffffffff82a124b0 r verde_rlc_save_restore_register_list +ffffffff82a12820 r si_cs_data +ffffffff82a12840 r si_SECT_CONTEXT_defs +ffffffff82a128c0 r si_SECT_CONTEXT_def_1 +ffffffff82a12c10 r si_SECT_CONTEXT_def_3 +ffffffff82a12c30 r si_SECT_CONTEXT_def_4 +ffffffff82a12ea4 r si_SECT_CONTEXT_def_5 +ffffffff82a12ea8 r si_SECT_CONTEXT_def_6 +ffffffff82a12eb0 r si_SECT_CONTEXT_def_2 +ffffffff82a132f0 r si_SECT_CONTEXT_def_7 +ffffffff82a136a0 r mc_cg_registers +ffffffff82a136d0 r si_default_state +ffffffff82a14000 r cac_weights_tahiti +ffffffff82a144d0 r lcac_tahiti +ffffffff82a14ba0 r cac_override_tahiti +ffffffff82a14bb4 r powertune_data_tahiti +ffffffff82a14bf0 r dte_data_tahiti +ffffffff82a14cc0 r dte_data_new_zealand +ffffffff82a14d90 r dte_data_malta +ffffffff82a14e60 r lcac_pitcairn +ffffffff82a15530 r cac_override_pitcairn +ffffffff82a15544 r powertune_data_pitcairn +ffffffff82a15580 r lcac_cape_verde +ffffffff82a159d0 r cac_override_cape_verde +ffffffff82a159e4 r powertune_data_cape_verde +ffffffff82a15a20 r cac_weights_cape_verde_pro +ffffffff82a15ef0 r cac_weights_heathrow +ffffffff82a163c0 r cac_weights_chelsea_xt +ffffffff82a16890 r cac_weights_chelsea_pro +ffffffff82a16d60 r cac_weights_cape_verde +ffffffff82a17230 r cac_weights_mars_pro +ffffffff82a17700 r lcac_mars_pro +ffffffff82a17a60 r cac_override_oland +ffffffff82a17a74 r powertune_data_mars_pro +ffffffff82a17ab0 r cac_weights_mars_xt +ffffffff82a17f80 r cac_weights_oland_pro +ffffffff82a18450 r cac_weights_oland_xt +ffffffff82a18920 r lcac_oland +ffffffff82a18c7c r powertune_data_oland +ffffffff82a18cb8 r dte_data_oland +ffffffff82a18d90 r cac_weights_hainan +ffffffff82a19254 r powertune_data_hainan +ffffffff82a19290 r dte_data_aruba_pro +ffffffff82a19360 r dte_data_tahiti_pro +ffffffff82a19430 r dte_data_curacao_pro +ffffffff82a19500 r dte_data_neptune_xt +ffffffff82a195d0 r dte_data_sun_xt +ffffffff82a196a0 r dte_data_venus_xtx +ffffffff82a19770 r dte_data_venus_xt +ffffffff82a19840 r dte_data_venus_pro +ffffffff82a19910 r dte_data_mars_pro +ffffffff82a1a000 r si_program_jump_on_start.data +ffffffff82a1b000 r sumo_dtc +ffffffff82a1c000 r trinity_mgcg_shls_default +ffffffff82a1c380 r trinity_sysls_enable +ffffffff82a1c450 r trinity_sysls_disable +ffffffff82a1e000 r GC_BASE +ffffffff82a1e0a8 r HDP_BASE +ffffffff82a1e150 r MMHUB_BASE +ffffffff82a1e1f8 r ATHUB_BASE +ffffffff82a1e2a0 r NBIO_BASE +ffffffff82a1e348 r MP0_BASE +ffffffff82a1e3f0 r MP1_BASE +ffffffff82a1e498 r DF_BASE +ffffffff82a1e540 r OSSSYS_BASE +ffffffff82a1e5e8 r SDMA0_BASE +ffffffff82a1e690 r SDMA1_BASE +ffffffff82a1e738 r SDMA2_BASE +ffffffff82a1e7e0 r SDMA3_BASE +ffffffff82a1e888 r SDMA4_BASE +ffffffff82a1e930 r SMUIO_BASE +ffffffff82a1e9d8 r THM_BASE +ffffffff82a1ea80 r UMC_BASE +ffffffff82a1eb28 r VCN_BASE +ffffffff82a1f000 r amdgpu_afmt_predefined_acr +ffffffff82a20000 r atom_op_names +ffffffff82a203e0 r opcode_table +ffffffff82a20bd0 r atom_dst_to_src +ffffffff82a20c50 r atom_io_names +ffffffff82a20c80 r atom_table_names +ffffffff82a20ed0 r atom_iio_len +ffffffff82a21000 r object_connector_convert +ffffffff82a21058 R amdgpu_vbios_version_attr_group +ffffffff82a22000 r voltage_names +ffffffff82a22020 r pre_emph_names +ffffffff82a23000 r amdgpu_atombios_encoder_backlight_ops +ffffffff82a25000 r amdgpu_benchmark.common_modes +ffffffff82a26000 r amdgpu_cgs_ops +ffffffff82a27000 r amdgpu_connector_dp_helper_funcs +ffffffff82a27050 r amdgpu_connector_vga_helper_funcs +ffffffff82a270a0 r amdgpu_connector_dvi_helper_funcs +ffffffff82a270f0 r amdgpu_connector_lvds_helper_funcs +ffffffff82a27140 r amdgpu_connector_dp_funcs +ffffffff82a271c0 r amdgpu_connector_add_common_modes.common_modes +ffffffff82a27248 r amdgpu_connector_edp_funcs +ffffffff82a272c0 r amdgpu_connector_vga_funcs +ffffffff82a27338 r amdgpu_connector_dvi_funcs +ffffffff82a273b0 r amdgpu_connector_lvds_funcs +ffffffff82a29000 R amdgpu_ctx_num_entities +ffffffff82a2a000 r amdgpu_kms_driver +ffffffff82a2a0f0 r amdgpu_device_ip_reinit_late_sriov.ip_order +ffffffff82a2b000 r hw_id_map +ffffffff82a2b090 r hw_id_names +ffffffff82a2c000 r hpd_names +ffffffff82a2c030 r encoder_names +ffffffff82a2c180 r dcc_retile_formats +ffffffff82a2c270 r dcc_formats +ffffffff82a2c360 R amdgpu_mode_funcs +ffffffff82a2c3b0 r amdgpu_underscan_enum_list +ffffffff82a2c3e0 r amdgpu_audio_enum_list +ffffffff82a2c410 r amdgpu_dither_enum_list +ffffffff82a2c430 r amdgpu_fb_funcs +ffffffff82a2d000 R amdgpu_dmabuf_ops +ffffffff82a2e000 R amdgpu_ioctls_kms +ffffffff82a2e210 R amdgpu_ca +ffffffff82a2e240 r pciidlist +ffffffff82a2f110 r amdgpu_unsupported_pciidlist +ffffffff82a2f690 r amdgpu_kms_driver +ffffffff82a30000 r amdgpu_job_fence_ops +ffffffff82a30038 r amdgpu_fence_ops +ffffffff82a31000 r amdgpu_gem_object_funcs +ffffffff82a31060 r amdgpu_gem_vm_ops +ffffffff82a33000 R amdgpu_gtt_mgr_attr_group +ffffffff82a33018 r amdgpu_gtt_mgr_func +ffffffff82a34000 r amdgpu_atombios_i2c_algo +ffffffff82a35000 R amdgpu_sched_ops +ffffffff82a38000 r amdgpu_vram_names +ffffffff82a39000 r amdgpu_preempt_mgr_func +ffffffff82a3a000 R psp_ip_funcs +ffffffff82a3a0a0 R psp_v3_1_ip_block +ffffffff82a3a0b8 R psp_v10_0_ip_block +ffffffff82a3a0d0 R psp_v11_0_ip_block +ffffffff82a3a0e8 R psp_v11_0_8_ip_block +ffffffff82a3a100 R psp_v12_0_ip_block +ffffffff82a3a118 R psp_v13_0_ip_block +ffffffff82a3a130 R psp_v13_0_4_ip_block +ffffffff82a3c000 r amdgpu_evict_flags.placements +ffffffff82a40000 R amdgpu_vkms_ip_block +ffffffff82a42000 R amdgpu_vm_cpu_funcs +ffffffff82a44000 R amdgpu_vm_sdma_funcs +ffffffff82a45000 R amdgpu_vram_mgr_attr_group +ffffffff82a45018 r amdgpu_vram_mgr_func +ffffffff82a46000 r xgmi_pcs_err_status_reg_arct +ffffffff82a47000 r GC_BASE +ffffffff82a470c0 r HDP_BASE +ffffffff82a47180 r MMHUB_BASE +ffffffff82a47240 r ATHUB_BASE +ffffffff82a47300 r NBIF0_BASE +ffffffff82a473c0 r MP0_BASE +ffffffff82a47480 r MP1_BASE +ffffffff82a47540 r UVD_BASE +ffffffff82a47600 r DF_BASE +ffffffff82a476c0 r OSSSYS_BASE +ffffffff82a47780 r SDMA0_BASE +ffffffff82a47840 r SDMA1_BASE +ffffffff82a47900 r SDMA2_BASE +ffffffff82a479c0 r SDMA3_BASE +ffffffff82a47a80 r SDMA4_BASE +ffffffff82a47b40 r SDMA5_BASE +ffffffff82a47c00 r SDMA6_BASE +ffffffff82a47cc0 r SDMA7_BASE +ffffffff82a47d80 r SMUIO_BASE +ffffffff82a47e40 r THM_BASE +ffffffff82a47f00 r UMC_BASE +ffffffff82a47fc0 r RSMU_BASE +ffffffff82a49000 r cz_ih_ip_funcs +ffffffff82a490a0 R cz_ih_ip_block +ffffffff82a490b8 r cz_ih_funcs +ffffffff82a4a000 r crtc_offsets +ffffffff82a4a020 r dce_v10_0_ip_funcs +ffffffff82a4a0c0 R dce_v10_0_ip_block +ffffffff82a4a0d8 R dce_v10_1_ip_block +ffffffff82a4a0f0 r dce_v10_0_display_funcs +ffffffff82a4a150 r hpd_offsets +ffffffff82a4a168 r dce_v10_0_encoder_funcs +ffffffff82a4a188 r dce_v10_0_dac_helper_funcs +ffffffff82a4a1f0 r dce_v10_0_dig_helper_funcs +ffffffff82a4a258 r dce_v10_0_ext_helper_funcs +ffffffff82a4a2c0 r dce_v10_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82a4a2f0 r dce_v10_0_crtc_irq_funcs +ffffffff82a4a300 r dce_v10_0_pageflip_irq_funcs +ffffffff82a4a310 r dce_v10_0_hpd_irq_funcs +ffffffff82a4a320 r interrupt_status_offsets +ffffffff82a4a380 r dce_v10_0_crtc_funcs +ffffffff82a4a440 r dce_v10_0_crtc_helper_funcs +ffffffff82a4a4c0 r vga_control_regs +ffffffff82a4a4e0 r dig_offsets +ffffffff82a4a500 r pin_offsets +ffffffff82a4a520 r fiji_mgcg_cgcg_init +ffffffff82a4a540 r golden_settings_fiji_a10 +ffffffff82a4a570 r tonga_mgcg_cgcg_init +ffffffff82a4a590 r golden_settings_tonga_a11 +ffffffff82a4b000 r crtc_offsets +ffffffff82a4b020 r dce_v11_0_ip_funcs +ffffffff82a4b0c0 R dce_v11_0_ip_block +ffffffff82a4b0d8 R dce_v11_2_ip_block +ffffffff82a4b0f0 r dce_v11_0_display_funcs +ffffffff82a4b150 r hpd_offsets +ffffffff82a4b168 r dce_v11_0_encoder_funcs +ffffffff82a4b188 r dce_v11_0_dac_helper_funcs +ffffffff82a4b1f0 r dce_v11_0_dig_helper_funcs +ffffffff82a4b258 r dce_v11_0_ext_helper_funcs +ffffffff82a4b2c0 r dce_v11_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82a4b2f0 r dce_v11_0_crtc_irq_funcs +ffffffff82a4b300 r dce_v11_0_pageflip_irq_funcs +ffffffff82a4b310 r dce_v11_0_hpd_irq_funcs +ffffffff82a4b320 r interrupt_status_offsets +ffffffff82a4b380 r dce_v11_0_crtc_funcs +ffffffff82a4b440 r dce_v11_0_crtc_helper_funcs +ffffffff82a4b4c0 r vga_control_regs +ffffffff82a4b4e0 r dig_offsets +ffffffff82a4b510 r cz_mgcg_cgcg_init +ffffffff82a4b530 r cz_golden_settings_a11 +ffffffff82a4b550 r stoney_golden_settings_a11 +ffffffff82a4b570 r polaris11_golden_settings_a11 +ffffffff82a4b5b0 r polaris10_golden_settings_a11 +ffffffff82a4c000 R df_v1_7_funcs +ffffffff82a4c070 r df_v1_7_channel_number +ffffffff82a4d000 R df_v3_6_funcs +ffffffff82a4d070 r df_v3_6_channel_number +ffffffff82a4e000 r GC_BASE +ffffffff82a4e0a8 r HDP_BASE +ffffffff82a4e150 r MMHUB_BASE +ffffffff82a4e1f8 r ATHUB_BASE +ffffffff82a4e2a0 r NBIO_BASE +ffffffff82a4e348 r MP0_BASE +ffffffff82a4e3f0 r MP1_BASE +ffffffff82a4e498 r VCN0_BASE +ffffffff82a4e540 r DF_BASE +ffffffff82a4e5e8 r DCN_BASE +ffffffff82a4e690 r OSSSYS_BASE +ffffffff82a4e738 r SMUIO_BASE +ffffffff82a4e7e0 r THM_BASE +ffffffff82a4f000 r gfx_v10_0_ip_funcs +ffffffff82a4f0a0 R gfx_v10_0_ip_block +ffffffff82a4f0b8 r gfx_v10_0_kiq_pm4_funcs +ffffffff82a4f0f8 r gfx_v10_0_ring_funcs_kiq +ffffffff82a4f218 r gfx_v10_0_ring_funcs_gfx +ffffffff82a4f338 r gfx_v10_0_ring_funcs_compute +ffffffff82a4f458 r gfx_v10_0_eop_irq_funcs +ffffffff82a4f468 r gfx_v10_0_kiq_irq_funcs +ffffffff82a4f478 r gfx_v10_0_priv_reg_irq_funcs +ffffffff82a4f488 r gfx_v10_0_priv_inst_irq_funcs +ffffffff82a4f498 r gfx_v10_0_rlc_funcs +ffffffff82a4f500 r gfx_v10_0_rlc_funcs_sriov +ffffffff82a4f570 r gfx10_cs_data +ffffffff82a4f590 r gfx10_SECT_CONTEXT_defs +ffffffff82a4f620 r gfx10_SECT_CONTEXT_def_1 +ffffffff82a4f980 r gfx10_SECT_CONTEXT_def_3 +ffffffff82a4f990 r gfx10_SECT_CONTEXT_def_4 +ffffffff82a4fc08 r gfx10_SECT_CONTEXT_def_5 +ffffffff82a4fc10 r gfx10_SECT_CONTEXT_def_6 +ffffffff82a4fc20 r gfx10_SECT_CONTEXT_def_2 +ffffffff82a50060 r gfx10_SECT_CONTEXT_def_7 +ffffffff82a50170 r gfx10_SECT_CONTEXT_def_8 +ffffffff82a504a0 r gfx_v10_0_gfx_funcs +ffffffff82a504e0 r golden_settings_gc_rlc_spm_10_0_nv10 +ffffffff82a56780 r golden_settings_gc_rlc_spm_10_1_nv14 +ffffffff82a5a1a0 r golden_settings_gc_rlc_spm_10_1_2_nv12 +ffffffff82a60440 r golden_settings_gc_10_1 +ffffffff82a60800 r golden_settings_gc_10_0_nv10 +ffffffff82a60800 r golden_settings_gc_10_1_1 +ffffffff82a60b90 r golden_settings_gc_10_1_2 +ffffffff82a60b90 r golden_settings_gc_10_1_nv14 +ffffffff82a60f80 r golden_settings_gc_10_1_2_nv12 +ffffffff82a60f80 r golden_settings_gc_10_3 +ffffffff82a61388 r golden_settings_gc_10_3_sienna_cichlid +ffffffff82a61390 r golden_settings_gc_10_3_2 +ffffffff82a61780 r golden_settings_gc_10_3_vangogh +ffffffff82a619e0 r golden_settings_gc_10_3_3 +ffffffff82a61bc0 r golden_settings_gc_10_3_4 +ffffffff82a61f20 r golden_settings_gc_10_3_5 +ffffffff82a62220 r golden_settings_gc_10_0_cyan_skillfish +ffffffff82a62550 r golden_settings_gc_10_3_6 +ffffffff82a62760 r golden_settings_gc_10_3_7 +ffffffff82a63000 r gfx_v11_0_ip_funcs +ffffffff82a630a0 R gfx_v11_0_ip_block +ffffffff82a630b8 r gfx_v11_0_kiq_pm4_funcs +ffffffff82a630f8 r gfx_v11_0_ring_funcs_kiq +ffffffff82a63218 r gfx_v11_0_ring_funcs_gfx +ffffffff82a63338 r gfx_v11_0_ring_funcs_compute +ffffffff82a63458 r gfx_v11_0_eop_irq_funcs +ffffffff82a63468 r gfx_v11_0_priv_reg_irq_funcs +ffffffff82a63478 r gfx_v11_0_priv_inst_irq_funcs +ffffffff82a63488 r gfx_v11_0_rlc_funcs +ffffffff82a634f0 r gfx11_cs_data +ffffffff82a63510 r gfx11_SECT_CONTEXT_defs +ffffffff82a63590 r gfx11_SECT_CONTEXT_def_1 +ffffffff82a638f0 r gfx11_SECT_CONTEXT_def_3 +ffffffff82a63900 r gfx11_SECT_CONTEXT_def_5 +ffffffff82a63908 r gfx11_SECT_CONTEXT_def_6 +ffffffff82a63910 r gfx11_SECT_CONTEXT_def_2 +ffffffff82a63d50 r gfx11_SECT_CONTEXT_def_4 +ffffffff82a63fd0 r gfx11_SECT_CONTEXT_def_7 +ffffffff82a64438 r gfx_v11_0_gfx_funcs +ffffffff82a64480 r golden_settings_gc_11_0_1 +ffffffff82a65000 r gfx_v8_0_ip_funcs +ffffffff82a650a0 R gfx_v8_0_ip_block +ffffffff82a650b8 R gfx_v8_1_ip_block +ffffffff82a650d0 r gfx_v8_0_gfx_funcs +ffffffff82a65110 r gfx_v8_0_ring_funcs_kiq +ffffffff82a65230 r gfx_v8_0_ring_funcs_gfx +ffffffff82a65350 r gfx_v8_0_ring_funcs_compute +ffffffff82a65470 r amdgpu_gds_reg_offset +ffffffff82a65570 r gfx_v8_0_eop_irq_funcs +ffffffff82a65580 r gfx_v8_0_priv_reg_irq_funcs +ffffffff82a65590 r gfx_v8_0_priv_inst_irq_funcs +ffffffff82a655a0 r gfx_v8_0_cp_ecc_error_irq_funcs +ffffffff82a655b0 r gfx_v8_0_sq_irq_funcs +ffffffff82a655c0 r sq_edc_source_names +ffffffff82a655f8 r iceland_rlc_funcs +ffffffff82a65660 r vi_cs_data +ffffffff82a65680 r vi_SECT_CONTEXT_defs +ffffffff82a65700 r vi_SECT_CONTEXT_def_1 +ffffffff82a65a50 r vi_SECT_CONTEXT_def_3 +ffffffff82a65a70 r vi_SECT_CONTEXT_def_4 +ffffffff82a65ce4 r vi_SECT_CONTEXT_def_5 +ffffffff82a65cec r vi_SECT_CONTEXT_def_6 +ffffffff82a65cf0 r vi_SECT_CONTEXT_def_2 +ffffffff82a66140 r vi_SECT_CONTEXT_def_7 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cz_golden_common_all +ffffffff82a67ba0 r stoney_mgcg_cgcg_init +ffffffff82a67be0 r stoney_golden_settings_a11 +ffffffff82a67c60 r stoney_golden_common_all +ffffffff82a68000 R gfx_v9_0_ras_ops +ffffffff82a68040 r gfx_v9_0_ip_funcs +ffffffff82a680e0 R gfx_v9_0_ip_block +ffffffff82a68100 r ras_gfx_subblocks +ffffffff82a68b80 r gfx_v9_0_edc_counter_regs +ffffffff82a68f20 r gfx_v9_0_ras_fields +ffffffff82a6a000 r gfx_v9_0_kiq_pm4_funcs +ffffffff82a6a040 r gfx_v9_0_ring_funcs_kiq +ffffffff82a6a160 r gfx_v9_0_ring_funcs_gfx +ffffffff82a6a280 r gfx_v9_0_ring_funcs_compute +ffffffff82a6a3a0 r gfx_v9_0_eop_irq_funcs +ffffffff82a6a3b0 r gfx_v9_0_priv_reg_irq_funcs +ffffffff82a6a3c0 r gfx_v9_0_priv_inst_irq_funcs +ffffffff82a6a3d0 r gfx_v9_0_cp_ecc_error_irq_funcs +ffffffff82a6a3e0 r gfx_v9_0_rlc_funcs +ffffffff82a6a450 r gfx9_cs_data +ffffffff82a6a470 r gfx9_SECT_CONTEXT_defs +ffffffff82a6a500 r gfx9_SECT_CONTEXT_def_1 +ffffffff82a6a850 r gfx9_SECT_CONTEXT_def_3 +ffffffff82a6a860 r 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gmc_v7_0_irq_funcs +ffffffff82a7b128 r iceland_mgcg_cgcg_init +ffffffff82a7b140 r golden_settings_iceland_a11 +ffffffff82a7b170 r mc_cg_registers +ffffffff82a7b1a0 r mc_cg_en +ffffffff82a7b1d0 r mc_cg_ls_en +ffffffff82a7c000 r gmc_v8_0_ip_funcs +ffffffff82a7c0a0 R gmc_v8_0_ip_block +ffffffff82a7c0b8 R gmc_v8_1_ip_block +ffffffff82a7c0d0 R gmc_v8_5_ip_block +ffffffff82a7c0e8 r gmc_v8_0_gmc_funcs +ffffffff82a7c130 r gmc_v8_0_irq_funcs +ffffffff82a7c140 r fiji_mgcg_cgcg_init +ffffffff82a7c150 r golden_settings_fiji_a10 +ffffffff82a7c180 r tonga_mgcg_cgcg_init +ffffffff82a7c190 r golden_settings_tonga_a11 +ffffffff82a7c1f0 r golden_settings_polaris11_a11 +ffffffff82a7c220 r golden_settings_polaris10_a11 +ffffffff82a7c25c r cz_mgcg_cgcg_init +ffffffff82a7c270 r stoney_mgcg_cgcg_init +ffffffff82a7c290 r golden_settings_stoney_common +ffffffff82a7d000 R gmc_v9_0_ip_funcs +ffffffff82a7d0a0 R gmc_v9_0_ip_block +ffffffff82a7d0b8 r gmc_v9_0_gmc_funcs +ffffffff82a7d100 r gmc_v9_0_irq_funcs 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+ffffffff82a87000 R gfx_v11_0_imu_funcs +ffffffff82a87030 r imu_rlc_ram_golden_11 +ffffffff82a87680 r imu_rlc_ram_golden_11_0_2 +ffffffff82a88000 r imu_rlc_ram_golden_11_0_3 +ffffffff82a89000 r jpeg_v1_0_decode_ring_vm_funcs +ffffffff82a89120 r jpeg_v1_0_irq_funcs +ffffffff82a8a000 r jpeg_v2_0_ip_funcs +ffffffff82a8a0a0 R jpeg_v2_0_ip_block +ffffffff82a8a0b8 r jpeg_v2_0_dec_ring_vm_funcs +ffffffff82a8a1d8 r jpeg_v2_0_irq_funcs +ffffffff82a8b000 r jpeg_v2_5_ip_funcs +ffffffff82a8b0a0 R jpeg_v2_5_ip_block +ffffffff82a8b0b8 r jpeg_v2_6_ip_funcs +ffffffff82a8b158 R jpeg_v2_6_ip_block +ffffffff82a8b170 R jpeg_v2_6_ras_hw_ops +ffffffff82a8b1b0 r jpeg_v2_5_dec_ring_vm_funcs +ffffffff82a8b2d0 r jpeg_v2_6_dec_ring_vm_funcs +ffffffff82a8b3f0 r jpeg_v2_5_irq_funcs +ffffffff82a8c000 r jpeg_v3_0_ip_funcs +ffffffff82a8c0a0 R jpeg_v3_0_ip_block +ffffffff82a8c0b8 r jpeg_v3_0_dec_ring_vm_funcs +ffffffff82a8c1d8 r jpeg_v3_0_irq_funcs +ffffffff82a8d000 r jpeg_v4_0_ip_funcs +ffffffff82a8d0a0 R jpeg_v4_0_ip_block +ffffffff82a8d0b8 r jpeg_v4_0_dec_ring_vm_funcs +ffffffff82a8d1d8 r jpeg_v4_0_irq_funcs +ffffffff82a8e000 R lsdma_v6_0_funcs +ffffffff82a8f000 R mca_v3_0_mp0_hw_ops +ffffffff82a8f040 R mca_v3_0_mp1_hw_ops +ffffffff82a8f080 R mca_v3_0_mpio_hw_ops +ffffffff82a8f0c0 R mca_v3_0_funcs +ffffffff82a90000 r mes_v10_1_ip_funcs +ffffffff82a900a0 R mes_v10_1_ip_block +ffffffff82a900b8 r mes_v10_1_funcs +ffffffff82a900e8 r mes_v10_1_ring_funcs +ffffffff82a91000 r mes_v11_0_ip_funcs +ffffffff82a910a0 R mes_v11_0_ip_block +ffffffff82a910b8 r mes_v11_0_funcs +ffffffff82a910e8 r mes_v11_0_ring_funcs +ffffffff82a92000 R mmhub_v1_0_funcs +ffffffff82a92050 r mmhub_v1_0_edc_cnt_regs +ffffffff82a920c0 r mmhub_v1_0_ras_fields +ffffffff82a93000 R mmhub_v1_7_funcs +ffffffff82a93050 r mmhub_v1_7_edc_cnt_regs +ffffffff82a93250 r mmhub_v1_7_ras_fields +ffffffff82a949c0 r mmhub_v1_7_ea_err_status_regs +ffffffff82a95000 R mmhub_v2_0_funcs +ffffffff82a95050 r mmhub_v2_0_vmhub_funcs +ffffffff82a95060 r mmhub_client_ids_navi1x +ffffffff82a95190 r mmhub_client_ids_sienna_cichlid +ffffffff82a95450 r mmhub_client_ids_beige_goby +ffffffff82a96000 R mmhub_v2_3_funcs +ffffffff82a96050 r mmhub_v2_3_vmhub_funcs +ffffffff82a96060 r mmhub_client_ids_vangogh +ffffffff82a97000 R mmhub_v3_0_funcs +ffffffff82a97050 r mmhub_v3_0_vmhub_funcs +ffffffff82a97060 r mmhub_client_ids_v3_0_0 +ffffffff82a98000 R mmhub_v3_0_1_funcs +ffffffff82a98050 r mmhub_v3_0_1_vmhub_funcs +ffffffff82a98060 r mmhub_client_ids_v3_0_1 +ffffffff82a99000 R mmhub_v3_0_2_funcs +ffffffff82a99050 r mmhub_v3_0_2_vmhub_funcs +ffffffff82a99060 r mmhub_client_ids_v3_0_2 +ffffffff82a9a000 R mmhub_v9_4_ras_hw_ops +ffffffff82a9a040 R mmhub_v9_4_funcs +ffffffff82a9a090 r mmhub_v9_4_edc_cnt_regs +ffffffff82a9a330 r mmhub_v9_4_ras_fields +ffffffff82a9c3b0 r mmhub_v9_4_err_status_regs +ffffffff82a9d000 r xgpu_ai_mailbox_ack_irq_funcs +ffffffff82a9d010 r xgpu_ai_mailbox_rcv_irq_funcs +ffffffff82a9d020 R xgpu_ai_virt_ops +ffffffff82a9e000 r xgpu_nv_mailbox_ack_irq_funcs +ffffffff82a9e010 r xgpu_nv_mailbox_rcv_irq_funcs +ffffffff82a9e020 R xgpu_nv_virt_ops +ffffffff82a9f000 r xgpu_fiji_mgcg_cgcg_init +ffffffff82a9f240 r xgpu_fiji_golden_settings_a10 +ffffffff82a9f370 r xgpu_fiji_golden_common_all +ffffffff82a9f3f0 r xgpu_tonga_mgcg_cgcg_init +ffffffff82a9f810 r xgpu_tonga_golden_settings_a11 +ffffffff82a9f9d0 r xgpu_tonga_golden_common_all +ffffffff82a9fa28 r xgpu_vi_mailbox_ack_irq_funcs +ffffffff82a9fa38 r xgpu_vi_mailbox_rcv_irq_funcs +ffffffff82a9fa48 R xgpu_vi_virt_ops +ffffffff82aa0000 r navi10_ih_ip_funcs +ffffffff82aa00a0 R navi10_ih_ip_block +ffffffff82aa00b8 r navi10_ih_funcs +ffffffff82aa00d8 r navi10_ih_self_irq_funcs +ffffffff82aa1000 R nbio_v2_3_hdp_flush_reg +ffffffff82aa1048 R nbio_v2_3_funcs +ffffffff82aa2000 R nbio_v4_3_hdp_flush_reg +ffffffff82aa2048 R nbio_v4_3_funcs +ffffffff82aa2130 R nbio_v4_3_sriov_funcs +ffffffff82aa3000 R nbio_v6_1_hdp_flush_reg +ffffffff82aa3048 R nbio_v6_1_funcs +ffffffff82aa4000 R nbio_v7_0_hdp_flush_reg +ffffffff82aa4048 R nbio_v7_0_funcs +ffffffff82aa5000 R nbio_v7_2_hdp_flush_reg +ffffffff82aa5048 R nbio_v7_2_funcs +ffffffff82aa6000 R nbio_v7_4_hdp_flush_reg +ffffffff82aa6048 R nbio_v7_4_ras_hw_ops +ffffffff82aa6088 R nbio_v7_4_funcs +ffffffff82aa6170 r nbio_v7_4_ras_controller_irq_funcs +ffffffff82aa6180 r nbio_v7_4_ras_err_event_athub_irq_funcs +ffffffff82aa7000 R nbio_v7_7_hdp_flush_reg +ffffffff82aa7048 R nbio_v7_7_funcs +ffffffff82aa8000 r nv_common_ip_funcs +ffffffff82aa80a0 R nv_common_ip_block +ffffffff82aa80b8 r nv_asic_funcs +ffffffff82aa8170 r nv_allowed_read_registers +ffffffff82aa82f0 r nv_video_codecs_encode +ffffffff82aa8300 r sc_video_codecs_decode +ffffffff82aa8310 r yc_video_codecs_decode +ffffffff82aa8320 r bg_video_codecs_encode +ffffffff82aa8330 r bg_video_codecs_decode +ffffffff82aa8340 r nv_video_codecs_decode +ffffffff82aa8350 r nv_video_codecs_encode_array +ffffffff82aa8380 r sc_video_codecs_decode_array +ffffffff82aa8420 r yc_video_codecs_decode_array +ffffffff82aa8490 r bg_video_codecs_decode_array +ffffffff82aa84d0 r nv_video_codecs_decode_array +ffffffff82aa9000 r psp_v10_0_funcs +ffffffff82aaa000 r psp_v11_0_funcs +ffffffff82aab000 r psp_v11_0_8_funcs +ffffffff82aac000 r psp_v12_0_funcs +ffffffff82aad000 r psp_v13_0_funcs +ffffffff82aae000 r psp_v13_0_4_funcs +ffffffff82aaf000 r psp_v3_1_funcs +ffffffff82ab0000 r sdma_v2_4_ip_funcs +ffffffff82ab00a0 R sdma_v2_4_ip_block +ffffffff82ab00b8 r sdma_v2_4_ring_funcs +ffffffff82ab01d8 r sdma_v2_4_buffer_funcs +ffffffff82ab01f8 r sdma_v2_4_vm_pte_funcs +ffffffff82ab0218 r sdma_v2_4_trap_irq_funcs +ffffffff82ab0228 r sdma_v2_4_illegal_inst_irq_funcs +ffffffff82ab0240 r iceland_mgcg_cgcg_init +ffffffff82ab0260 r golden_settings_iceland_a11 +ffffffff82ab1000 r sdma_v3_0_ip_funcs +ffffffff82ab10a0 R sdma_v3_0_ip_block +ffffffff82ab10b8 R sdma_v3_1_ip_block +ffffffff82ab10d0 r sdma_v3_0_ring_funcs +ffffffff82ab11f0 r sdma_v3_0_buffer_funcs +ffffffff82ab1210 r sdma_v3_0_vm_pte_funcs +ffffffff82ab1230 r sdma_v3_0_trap_irq_funcs +ffffffff82ab1240 r sdma_v3_0_illegal_inst_irq_funcs +ffffffff82ab1250 r fiji_mgcg_cgcg_init +ffffffff82ab1270 r golden_settings_fiji_a10 +ffffffff82ab12d0 r tonga_mgcg_cgcg_init +ffffffff82ab12f0 r golden_settings_tonga_a11 +ffffffff82ab1370 r golden_settings_polaris11_a11 +ffffffff82ab13f0 r golden_settings_polaris10_a11 +ffffffff82ab1470 r cz_mgcg_cgcg_init +ffffffff82ab1490 r cz_golden_settings_a11 +ffffffff82ab1520 r stoney_mgcg_cgcg_init +ffffffff82ab1530 r stoney_golden_settings_a11 +ffffffff82ab2000 R sdma_v4_0_ip_funcs +ffffffff82ab20a0 R sdma_v4_0_ras_hw_ops +ffffffff82ab20e0 R sdma_v4_0_ip_block +ffffffff82ab20f8 r sdma_v4_0_ring_funcs_2nd_mmhub +ffffffff82ab2218 r sdma_v4_0_ring_funcs +ffffffff82ab2338 r sdma_v4_0_page_ring_funcs_2nd_mmhub +ffffffff82ab2458 r sdma_v4_0_page_ring_funcs +ffffffff82ab2578 r sdma_v4_0_buffer_funcs +ffffffff82ab2598 r sdma_v4_0_vm_pte_funcs +ffffffff82ab25b8 r sdma_v4_0_trap_irq_funcs +ffffffff82ab25c8 r sdma_v4_0_illegal_inst_irq_funcs +ffffffff82ab25d8 r sdma_v4_0_ecc_irq_funcs +ffffffff82ab25e8 r sdma_v4_0_vm_hole_irq_funcs +ffffffff82ab25f8 r sdma_v4_0_doorbell_invalid_irq_funcs +ffffffff82ab2608 r sdma_v4_0_pool_timeout_irq_funcs +ffffffff82ab2618 r sdma_v4_0_srbm_write_irq_funcs +ffffffff82ab2630 r golden_settings_sdma_4 +ffffffff82ab2890 r golden_settings_sdma_vg10 +ffffffff82ab2940 r golden_settings_sdma_vg12 +ffffffff82ab29f0 r golden_settings_sdma0_4_2_init +ffffffff82ab2a10 r golden_settings_sdma0_4_2 +ffffffff82ab2ca0 r golden_settings_sdma1_4_2 +ffffffff82ab2f30 r golden_settings_sdma_arct +ffffffff82ab3230 r golden_settings_sdma_aldebaran +ffffffff82ab33a0 r golden_settings_sdma_4_1 +ffffffff82ab34b0 r golden_settings_sdma_rv2 +ffffffff82ab34e0 r golden_settings_sdma_rv1 +ffffffff82ab3510 r golden_settings_sdma_4_3 +ffffffff82ab3600 r sdma_v4_0_ras_fields +ffffffff82ab4000 R sdma_v4_4_ras_hw_ops +ffffffff82ab4040 r sdma_v4_4_ras_fields +ffffffff82ab5000 R sdma_v5_0_ip_funcs +ffffffff82ab50a0 R sdma_v5_0_ip_block +ffffffff82ab50b8 r sdma_v5_0_ring_funcs +ffffffff82ab51d8 r sdma_v5_0_buffer_funcs +ffffffff82ab51f8 r sdma_v5_0_vm_pte_funcs +ffffffff82ab5218 r sdma_v5_0_trap_irq_funcs +ffffffff82ab5228 r sdma_v5_0_illegal_inst_irq_funcs +ffffffff82ab5240 r golden_settings_sdma_5 +ffffffff82ab5480 r golden_settings_sdma_nv10 +ffffffff82ab54b0 r golden_settings_sdma_nv14 +ffffffff82ab54e0 r golden_settings_sdma_5_sriov +ffffffff82ab56c0 r golden_settings_sdma_nv12 +ffffffff82ab5750 r golden_settings_sdma_cyan_skillfish +ffffffff82ab6000 R sdma_v5_2_ip_funcs +ffffffff82ab60a0 R sdma_v5_2_ip_block +ffffffff82ab60b8 r sdma_v5_2_ring_funcs +ffffffff82ab61d8 r sdma_v5_2_buffer_funcs +ffffffff82ab61f8 r sdma_v5_2_vm_pte_funcs +ffffffff82ab6218 r sdma_v5_2_trap_irq_funcs +ffffffff82ab6228 r sdma_v5_2_illegal_inst_irq_funcs +ffffffff82ab7000 R sdma_v6_0_ip_funcs +ffffffff82ab70a0 R sdma_v6_0_ip_block +ffffffff82ab70b8 r sdma_v6_0_ring_funcs +ffffffff82ab71d8 r sdma_v6_0_buffer_funcs +ffffffff82ab71f8 r sdma_v6_0_vm_pte_funcs +ffffffff82ab7218 r sdma_v6_0_trap_irq_funcs +ffffffff82ab7228 r sdma_v6_0_illegal_inst_irq_funcs +ffffffff82ab8000 r smu_v11_0_i2c_algo +ffffffff82ab8010 r smu_v11_0_i2c_i2c_lock_ops +ffffffff82ab8028 r smu_v11_0_i2c_control_quirks +ffffffff82ab9000 R smuio_v11_0_funcs +ffffffff82aba000 R smuio_v11_0_6_funcs +ffffffff82abb000 R smuio_v13_0_funcs +ffffffff82abc000 R smuio_v13_0_6_funcs +ffffffff82abd000 R smuio_v9_0_funcs +ffffffff82abe000 r soc15_common_ip_funcs +ffffffff82abe0a0 R vega10_common_ip_block +ffffffff82abe0b8 r soc15_asic_funcs +ffffffff82abe170 r vega20_asic_funcs +ffffffff82abe230 r soc15_allowed_read_registers +ffffffff82abe3c0 r vega_video_codecs_encode +ffffffff82abe3d0 r vega_video_codecs_decode +ffffffff82abe3e0 r rv_video_codecs_decode +ffffffff82abe3f0 r rn_video_codecs_decode +ffffffff82abe400 r vega_video_codecs_encode_array +ffffffff82abe430 r vega_video_codecs_decode_array +ffffffff82abe4b0 r rv_video_codecs_decode_array +ffffffff82abe540 r rn_video_codecs_decode_array +ffffffff82abf000 r soc21_common_ip_funcs +ffffffff82abf0a0 R soc21_common_ip_block +ffffffff82abf0b8 r soc21_asic_funcs +ffffffff82abf170 r soc21_allowed_read_registers +ffffffff82abf2f0 r vcn_4_0_0_video_codecs_encode +ffffffff82abf300 r vcn_4_0_0_video_codecs_decode +ffffffff82abf310 r vcn_4_0_0_video_codecs_encode_array +ffffffff82abf340 r vcn_4_0_0_video_codecs_decode_array +ffffffff82ac0000 r tonga_ih_ip_funcs +ffffffff82ac00a0 R tonga_ih_ip_block +ffffffff82ac00b8 r tonga_ih_funcs +ffffffff82ac1000 R umc_v6_0_funcs +ffffffff82ac2000 R umc_v6_1_channel_idx_tbl +ffffffff82ac2080 R umc_v6_1_ras_hw_ops +ffffffff82ac3000 R umc_v6_7_channel_idx_tbl_second +ffffffff82ac3080 R umc_v6_7_channel_idx_tbl_first +ffffffff82ac3100 R umc_v6_7_ras_hw_ops +ffffffff82ac4000 R umc_v8_10_channelnum_map_colbit_table +ffffffff82ac4040 R umc_v8_10_channel_idx_tbl +ffffffff82ac40a0 R umc_v8_10_ras_hw_ops +ffffffff82ac5000 R umc_v8_7_channel_idx_tbl +ffffffff82ac5040 R umc_v8_7_ras_hw_ops +ffffffff82ac6000 r uvd_v5_0_ip_funcs +ffffffff82ac60a0 R uvd_v5_0_ip_block +ffffffff82ac60b8 r uvd_v5_0_ring_funcs +ffffffff82ac61d8 r uvd_v5_0_irq_funcs +ffffffff82ac7000 r uvd_v6_0_ip_funcs +ffffffff82ac70a0 R uvd_v6_0_ip_block +ffffffff82ac70b8 R uvd_v6_2_ip_block +ffffffff82ac70d0 R uvd_v6_3_ip_block +ffffffff82ac70e8 r uvd_v6_0_ring_vm_funcs +ffffffff82ac7208 r uvd_v6_0_ring_phys_funcs +ffffffff82ac7328 r uvd_v6_0_enc_ring_vm_funcs +ffffffff82ac7448 r uvd_v6_0_irq_funcs +ffffffff82ac8000 R uvd_v7_0_ip_funcs +ffffffff82ac80a0 R uvd_v7_0_ip_block +ffffffff82ac80b8 r uvd_v7_0_ring_vm_funcs +ffffffff82ac81d8 r uvd_v7_0_enc_ring_vm_funcs +ffffffff82ac82f8 r uvd_v7_0_irq_funcs +ffffffff82ac9000 r vce_v3_0_ip_funcs +ffffffff82ac90a0 R vce_v3_0_ip_block +ffffffff82ac90b8 R vce_v3_1_ip_block +ffffffff82ac90d0 R vce_v3_4_ip_block +ffffffff82ac90e8 r vce_v3_0_ring_vm_funcs +ffffffff82ac9208 r vce_v3_0_ring_phys_funcs +ffffffff82ac9328 r vce_v3_0_irq_funcs +ffffffff82aca000 R vce_v4_0_ip_funcs +ffffffff82aca0a0 R vce_v4_0_ip_block +ffffffff82aca0b8 r vce_v4_0_ring_vm_funcs +ffffffff82aca1d8 r vce_v4_0_irq_funcs +ffffffff82acb000 r vcn_v1_0_ip_funcs +ffffffff82acb0a0 R vcn_v1_0_ip_block +ffffffff82acb0b8 r vcn_v1_0_dec_ring_vm_funcs +ffffffff82acb1d8 r vcn_v1_0_enc_ring_vm_funcs +ffffffff82acb2f8 r vcn_v1_0_irq_funcs +ffffffff82acc000 r vcn_v2_0_ip_funcs +ffffffff82acc0a0 R vcn_v2_0_ip_block +ffffffff82acc0b8 r vcn_v2_0_dec_ring_vm_funcs +ffffffff82acc1d8 r vcn_v2_0_enc_ring_vm_funcs +ffffffff82acc2f8 r vcn_v2_0_irq_funcs +ffffffff82acd000 r vcn_v2_5_ip_funcs +ffffffff82acd0a0 R vcn_v2_5_ip_block +ffffffff82acd0b8 r vcn_v2_6_ip_funcs +ffffffff82acd158 R vcn_v2_6_ip_block +ffffffff82acd170 R vcn_v2_6_ras_hw_ops +ffffffff82acd1b0 r vcn_v2_5_dec_ring_vm_funcs +ffffffff82acd2d0 r vcn_v2_6_dec_ring_vm_funcs +ffffffff82acd3f0 r vcn_v2_5_enc_ring_vm_funcs +ffffffff82acd510 r vcn_v2_6_enc_ring_vm_funcs +ffffffff82acd630 r vcn_v2_5_irq_funcs +ffffffff82ace000 r vcn_v3_0_ip_funcs +ffffffff82ace0a0 R vcn_v3_0_ip_block +ffffffff82ace0b8 r vcn_v3_0_dec_ring_vm_funcs +ffffffff82ace1d8 r vcn_v3_0_enc_ring_vm_funcs +ffffffff82ace2f8 r vcn_v3_0_irq_funcs +ffffffff82acf000 r vcn_v4_0_ip_funcs +ffffffff82acf0a0 R vcn_v4_0_ip_block +ffffffff82acf0b8 r vcn_v4_0_unified_ring_vm_funcs +ffffffff82acf1d8 r vcn_v4_0_irq_funcs +ffffffff82ad0000 R vega10_ih_ip_funcs +ffffffff82ad00a0 R vega10_ih_ip_block +ffffffff82ad00b8 r vega10_ih_funcs +ffffffff82ad00d8 r vega10_ih_self_irq_funcs ffffffff82ad1000 r GC_BASE -ffffffff82ad1090 r HDP_BASE -ffffffff82ad1120 r MMHUB_BASE -ffffffff82ad11b0 r ATHUB_BASE -ffffffff82ad1240 r NBIO_BASE -ffffffff82ad12d0 r MP0_BASE -ffffffff82ad1360 r MP1_BASE -ffffffff82ad13f0 r UVD_BASE -ffffffff82ad1480 r VCE_BASE -ffffffff82ad1510 r DF_BASE -ffffffff82ad15a0 r DCE_BASE -ffffffff82ad1630 r OSSSYS_BASE -ffffffff82ad16c0 r SDMA0_BASE -ffffffff82ad1750 r SDMA1_BASE -ffffffff82ad17e0 r SMUIO_BASE -ffffffff82ad1870 r THM_BASE -ffffffff82ad1900 r CLK_BASE -ffffffff82ad1990 r UMC_BASE -ffffffff82ad1a20 r RSMU_BASE -ffffffff82ad2000 r vi_common_ip_block -ffffffff82ad2018 r vi_common_ip_funcs -ffffffff82ad20b8 r vi_asic_funcs -ffffffff82ad2170 r vi_allowed_read_registers -ffffffff82ad23d0 r topaz_video_codecs_encode -ffffffff82ad23e0 r topaz_video_codecs_decode -ffffffff82ad23f0 r tonga_video_codecs_encode -ffffffff82ad2400 r tonga_video_codecs_decode -ffffffff82ad2410 r polaris_video_codecs_encode -ffffffff82ad2420 r cz_video_codecs_decode -ffffffff82ad2430 r tonga_video_codecs_encode_array -ffffffff82ad2450 r tonga_video_codecs_decode_array -ffffffff82ad24a0 r polaris_video_codecs_encode_array -ffffffff82ad24d0 r cz_video_codecs_decode_array -ffffffff82ad2550 r iceland_mgcg_cgcg_init -ffffffff82ad2590 r fiji_mgcg_cgcg_init -ffffffff82ad25f0 r tonga_mgcg_cgcg_init -ffffffff82ad2650 r cz_mgcg_cgcg_init -ffffffff82ad2690 r stoney_mgcg_cgcg_init -ffffffff82ad3000 r amdgpu_dm_funcs -ffffffff82ad30a0 R dm_ip_block -ffffffff82ad30b8 R amdgpu_dm_encoder_helper_funcs -ffffffff82ad3120 r dm_display_funcs -ffffffff82ad3180 r hpd_disconnect_quirk_table -ffffffff82ad3ef0 r amdgpu_dm_mode_funcs -ffffffff82ad3f38 r amdgpu_dm_encoder_funcs -ffffffff82ad3f58 r amdgpu_dm_connector_funcs -ffffffff82ad3fd0 r amdgpu_dm_connector_helper_funcs -ffffffff82ad4020 r amdgpu_dm_i2c_algo -ffffffff82ad41f0 r add_fs_modes.common_rates -ffffffff82ad4220 r amdgpu_dm_backlight_ops -ffffffff82ad5000 r amdgpu_dm_crtc_funcs -ffffffff82ad50c0 r amdgpu_dm_crtc_helper_funcs -ffffffff82ad6000 r dm_dtn_log_begin.msg -ffffffff82ad600d r dm_dtn_log_end.msg -ffffffff82ad6018 r SYNAPTICS_DEVICE_ID -ffffffff82ad7000 r dm_crtc_irq_funcs -ffffffff82ad7010 r dm_vline0_irq_funcs -ffffffff82ad7020 r dm_dmub_outbox_irq_funcs -ffffffff82ad7030 r dm_vupdate_irq_funcs -ffffffff82ad7040 r dm_dmub_trace_irq_funcs -ffffffff82ad7050 r dm_pageflip_irq_funcs -ffffffff82ad7060 r dm_hpd_irq_funcs -ffffffff82ad8000 r amdgpu_dm_encoder_funcs -ffffffff82ad8020 r dm_mst_cbs -ffffffff82ad8030 r dm_dp_mst_connector_funcs -ffffffff82ad80a8 r dm_dp_mst_connector_helper_funcs -ffffffff82ad9000 r dm_plane_funcs -ffffffff82ad9068 r dm_plane_helper_funcs -ffffffff82adb000 r vbios_funcs -ffffffff82adc000 r vbios_funcs -ffffffff82ae1000 r command_table_helper_funcs -ffffffff82ae2000 r command_table_helper_funcs +ffffffff82ad1064 r HDP_BASE +ffffffff82ad10c8 r MMHUB_BASE +ffffffff82ad112c r ATHUB_BASE +ffffffff82ad1190 r NBIO_BASE +ffffffff82ad11f4 r MP0_BASE +ffffffff82ad1258 r MP1_BASE +ffffffff82ad12bc r VCE_BASE +ffffffff82ad1320 r VCN_BASE +ffffffff82ad1384 r DF_BASE +ffffffff82ad13e8 r DCE_BASE +ffffffff82ad144c r OSSSYS_BASE +ffffffff82ad14b0 r SDMA0_BASE +ffffffff82ad1514 r SDMA1_BASE +ffffffff82ad1578 r SMUIO_BASE +ffffffff82ad15dc r PWR_BASE +ffffffff82ad1640 r NBIF_BASE +ffffffff82ad16a4 r THM_BASE +ffffffff82ad1708 r CLK_BASE +ffffffff82ad2000 R vega20_ih_ip_funcs +ffffffff82ad20a0 R vega20_ih_ip_block +ffffffff82ad20b8 r vega20_ih_funcs +ffffffff82ad20d8 r vega20_ih_self_irq_funcs +ffffffff82ad3000 r GC_BASE +ffffffff82ad3090 r HDP_BASE +ffffffff82ad3120 r MMHUB_BASE +ffffffff82ad31b0 r ATHUB_BASE +ffffffff82ad3240 r NBIO_BASE +ffffffff82ad32d0 r MP0_BASE +ffffffff82ad3360 r MP1_BASE +ffffffff82ad33f0 r UVD_BASE +ffffffff82ad3480 r VCE_BASE +ffffffff82ad3510 r DF_BASE +ffffffff82ad35a0 r DCE_BASE +ffffffff82ad3630 r OSSSYS_BASE +ffffffff82ad36c0 r SDMA0_BASE +ffffffff82ad3750 r SDMA1_BASE +ffffffff82ad37e0 r SMUIO_BASE +ffffffff82ad3870 r THM_BASE +ffffffff82ad3900 r CLK_BASE +ffffffff82ad3990 r UMC_BASE +ffffffff82ad3a20 r RSMU_BASE +ffffffff82ad4000 r vi_common_ip_block +ffffffff82ad4018 r vi_common_ip_funcs +ffffffff82ad40b8 r vi_asic_funcs +ffffffff82ad4170 r vi_allowed_read_registers +ffffffff82ad43d0 r topaz_video_codecs_encode +ffffffff82ad43e0 r topaz_video_codecs_decode +ffffffff82ad43f0 r tonga_video_codecs_encode +ffffffff82ad4400 r tonga_video_codecs_decode +ffffffff82ad4410 r polaris_video_codecs_encode +ffffffff82ad4420 r cz_video_codecs_decode +ffffffff82ad4430 r tonga_video_codecs_encode_array +ffffffff82ad4450 r tonga_video_codecs_decode_array +ffffffff82ad44a0 r polaris_video_codecs_encode_array +ffffffff82ad44d0 r cz_video_codecs_decode_array +ffffffff82ad4550 r iceland_mgcg_cgcg_init +ffffffff82ad4590 r fiji_mgcg_cgcg_init +ffffffff82ad45f0 r tonga_mgcg_cgcg_init +ffffffff82ad4650 r cz_mgcg_cgcg_init +ffffffff82ad4690 r stoney_mgcg_cgcg_init +ffffffff82ad5000 r amdgpu_dm_funcs +ffffffff82ad50a0 R dm_ip_block +ffffffff82ad50b8 R amdgpu_dm_encoder_helper_funcs +ffffffff82ad5120 r dm_display_funcs +ffffffff82ad5180 r hpd_disconnect_quirk_table +ffffffff82ad5ef0 r amdgpu_dm_mode_funcs +ffffffff82ad5f38 r amdgpu_dm_encoder_funcs +ffffffff82ad5f58 r amdgpu_dm_connector_funcs +ffffffff82ad5fd0 r amdgpu_dm_connector_helper_funcs +ffffffff82ad6020 r amdgpu_dm_i2c_algo +ffffffff82ad61f0 r add_fs_modes.common_rates +ffffffff82ad6220 r amdgpu_dm_backlight_ops +ffffffff82ad7000 r amdgpu_dm_crtc_funcs +ffffffff82ad70c0 r amdgpu_dm_crtc_helper_funcs +ffffffff82ad8000 r dm_dtn_log_begin.msg +ffffffff82ad800d r dm_dtn_log_end.msg +ffffffff82ad8018 r SYNAPTICS_DEVICE_ID +ffffffff82ad9000 r dm_crtc_irq_funcs +ffffffff82ad9010 r dm_vline0_irq_funcs +ffffffff82ad9020 r dm_dmub_outbox_irq_funcs +ffffffff82ad9030 r dm_vupdate_irq_funcs +ffffffff82ad9040 r dm_dmub_trace_irq_funcs +ffffffff82ad9050 r dm_pageflip_irq_funcs +ffffffff82ad9060 r dm_hpd_irq_funcs +ffffffff82ada000 r amdgpu_dm_encoder_funcs +ffffffff82ada020 r dm_mst_cbs +ffffffff82ada030 r dm_dp_mst_connector_funcs +ffffffff82ada0a8 r dm_dp_mst_connector_helper_funcs +ffffffff82adb000 r dm_plane_funcs +ffffffff82adb068 r dm_plane_helper_funcs +ffffffff82add000 r vbios_funcs +ffffffff82ade000 r vbios_funcs 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+ffffffff82ae807c r disp_clk_shift +ffffffff82ae8088 r disp_clk_mask +ffffffff82ae9000 r dce112_max_clks_by_state +ffffffff82ae9028 r disp_clk_regs +ffffffff82ae907c r disp_clk_shift +ffffffff82ae9088 r disp_clk_mask +ffffffff82aea000 r dce120_max_clks_by_state ffffffff82aeb000 r clk_mgr_regs ffffffff82aeb054 r clk_mgr_shift ffffffff82aeb060 r clk_mgr_mask -ffffffff82aec000 r lpddr5_wm_table -ffffffff82aec0c0 r ddr5_wm_table -ffffffff82aed000 r lpddr5_wm_table -ffffffff82aed0c0 r ddr5_wm_table +ffffffff82aec000 r clk_mgr_regs +ffffffff82aec054 r clk_mgr_shift +ffffffff82aec060 r clk_mgr_mask +ffffffff82aed000 r clk_mgr_regs +ffffffff82aed054 r clk_mgr_shift +ffffffff82aed060 r clk_mgr_mask ffffffff82aee000 r lpddr5_wm_table ffffffff82aee0c0 r ddr5_wm_table ffffffff82aef000 r lpddr5_wm_table -ffffffff82aef0c0 r ddr4_wm_table -ffffffff82af0000 r clk_mgr_regs_dcn321 -ffffffff82af0054 r clk_mgr_shift_dcn321 -ffffffff82af0060 r clk_mgr_mask_dcn321 -ffffffff82af0084 r clk_mgr_regs_dcn32 -ffffffff82af00d8 r clk_mgr_shift_dcn32 -ffffffff82af00e4 r clk_mgr_mask_dcn32 -ffffffff82af1000 r DC_BUILD_ID -ffffffff82af3000 r output_csc_matrix -ffffffff82af30e0 r black_color_format -ffffffff82af4000 r DP_SINK_BRANCH_DEV_NAME_7580 -ffffffff82af5000 r DP_VGA_DONGLE_BRANCH_DEV_NAME -ffffffff82af5006 r DP_DVI_CONVERTER_ID_4 -ffffffff82af500d r DP_DVI_CONVERTER_ID_5 -ffffffff82af6000 r DP_VGA_LVDS_CONVERTER_ID_2 -ffffffff82af6007 r DP_VGA_LVDS_CONVERTER_ID_3 -ffffffff82af6010 r dp_lt_fallbacks -ffffffff82af7000 r mandatory_dpcd_partitions -ffffffff82af9000 r dce_funcs -ffffffff82afa000 r funcs -ffffffff82afb000 R video_optimized_pixel_rates -ffffffff82afb1b0 r dce110_clk_src_funcs -ffffffff82afb1d8 r dce112_clk_src_funcs -ffffffff82afb200 r dcn20_clk_src_funcs -ffffffff82afb228 r dcn3_clk_src_funcs -ffffffff82afb250 r dcn31_clk_src_funcs -ffffffff82afc000 r dce_funcs -ffffffff82afc068 r dcn10_funcs -ffffffff82afc0d0 r dcn20_funcs -ffffffff82afc138 r dcn21_funcs -ffffffff82afd000 r dce_ipp_funcs -ffffffff82afe000 r dce110_lnk_enc_funcs -ffffffff82aff000 r dce_mi_funcs -ffffffff82aff090 r dce112_mi_funcs -ffffffff82aff120 r dce120_mi_funcs -ffffffff82aff1b0 r pte_settings -ffffffff82b00000 r funcs -ffffffff82b01000 r dce_link_panel_cntl_funcs -ffffffff82b02000 r filter_3tap_16p_upscale -ffffffff82b02040 r filter_3tap_16p_116 -ffffffff82b02080 r filter_3tap_16p_149 -ffffffff82b020c0 r filter_3tap_16p_183 -ffffffff82b02100 r filter_3tap_64p_upscale -ffffffff82b021d0 r filter_3tap_64p_116 -ffffffff82b022a0 r filter_3tap_64p_149 -ffffffff82b02370 r filter_3tap_64p_183 -ffffffff82b02440 r filter_4tap_16p_upscale -ffffffff82b02490 r filter_4tap_16p_116 -ffffffff82b024e0 r filter_4tap_16p_149 -ffffffff82b02530 r filter_4tap_16p_183 -ffffffff82b02580 r filter_4tap_64p_upscale -ffffffff82b02690 r filter_4tap_64p_116 -ffffffff82b027a0 r filter_4tap_64p_149 -ffffffff82b028b0 r filter_4tap_64p_183 -ffffffff82b029c0 r filter_5tap_64p_upscale -ffffffff82b02b10 r filter_5tap_64p_116 -ffffffff82b02c60 r filter_5tap_64p_149 -ffffffff82b02db0 r filter_5tap_64p_183 -ffffffff82b02f00 r filter_6tap_64p_upscale -ffffffff82b03090 r filter_6tap_64p_116 -ffffffff82b03220 r filter_6tap_64p_149 -ffffffff82b033b0 r filter_6tap_64p_183 -ffffffff82b03540 r filter_7tap_64p_upscale -ffffffff82b03710 r filter_7tap_64p_116 -ffffffff82b038e0 r filter_7tap_64p_149 -ffffffff82b03ab0 r filter_7tap_64p_183 -ffffffff82b03c80 r filter_8tap_64p_upscale -ffffffff82b03e90 r filter_8tap_64p_116 -ffffffff82b040a0 r filter_8tap_64p_149 -ffffffff82b042b0 r filter_8tap_64p_183 -ffffffff82b044c0 r filter_2tap_16p -ffffffff82b044f0 r filter_2tap_64p -ffffffff82b05000 r audio_clock_info_table_48bpc -ffffffff82b05190 r audio_clock_info_table_36bpc -ffffffff82b05320 r audio_clock_info_table -ffffffff82b054e0 r dce110_str_enc_funcs -ffffffff82b06000 r global_color_matrix -ffffffff82b060a8 r dce_transform_funcs -ffffffff82b07000 r abm_funcs -ffffffff82b08000 r psr_funcs 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dsc_regs -ffffffff82bd268c r dsc_shift -ffffffff82bd2744 r dsc_mask -ffffffff82bd2a20 r dwbc30_regs -ffffffff82bd2bfc r dwbc30_shift -ffffffff82bd2d30 r dwbc30_mask -ffffffff82bd3200 r mcif_wb30_regs -ffffffff82bd32fc r mcif_wb30_shift -ffffffff82bd33a8 r mcif_wb30_mask -ffffffff82bd3660 r aux_engine_regs -ffffffff82bd3728 r aux_mask -ffffffff82bd3788 r aux_shift -ffffffff82bd37a0 r i2c_hw_regs -ffffffff82bd38b8 r i2c_shifts -ffffffff82bd38e4 r i2c_masks -ffffffff82bd3990 r audio_regs -ffffffff82bd3ac4 r audio_shift -ffffffff82bd3adc r audio_mask -ffffffff82bd3b20 r stream_enc_regs -ffffffff82bd41c4 r se_shift -ffffffff82bd42a0 r se_mask -ffffffff82bd4610 r vpg_regs -ffffffff82bd4700 r vpg_shift -ffffffff82bd4728 r vpg_mask -ffffffff82bd47d0 r afmt_regs -ffffffff82bd48a8 r afmt_shift -ffffffff82bd48bc r afmt_mask -ffffffff82bd4910 r hpo_dp_stream_enc_regs -ffffffff82bd4b40 r hpo_dp_se_shift -ffffffff82bd4b68 r hpo_dp_se_mask -ffffffff82bd4c10 r apg_regs -ffffffff82bd4c50 r apg_shift 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afmt_mask -ffffffff82be0eb0 r hpo_dp_se_shift -ffffffff82be0ed8 r hpo_dp_se_mask -ffffffff82be0f78 r apg_shift -ffffffff82be0f80 r apg_mask -ffffffff82be0f98 r hpo_dp_le_shift -ffffffff82be0fb4 r hpo_dp_le_mask -ffffffff82be1018 r hwseq_shift -ffffffff82be1098 r hwseq_mask -ffffffff82be2000 r dcn321_link_enc_funcs -ffffffff82be3000 r res_cap_dcn321 -ffffffff82be3040 r debug_defaults_diags -ffffffff82be31b8 r dccg_shift -ffffffff82be3250 r dccg_mask -ffffffff82be34ac r abm_shift -ffffffff82be34c0 r abm_mask -ffffffff82be3508 r res_create_funcs -ffffffff82be3538 r res_create_maximus_funcs -ffffffff82be3568 r plane_cap -ffffffff82be3594 r le_shift -ffffffff82be3684 r le_mask -ffffffff82be3a3c r link_enc_feature -ffffffff82be3a50 r debug_defaults_drv -ffffffff82be3bc8 r cs_shift -ffffffff82be3bd4 r cs_mask -ffffffff82be3bfc r hubbub_shift -ffffffff82be3c84 r hubbub_mask -ffffffff82be3ea0 r vmid_shifts -ffffffff82be3ea8 r vmid_masks -ffffffff82be3ec8 r hubp_shift -ffffffff82be3fc4 r hubp_mask -ffffffff82be43b4 r tf_shift -ffffffff82be4684 r tf_mask -ffffffff82be51c4 r opp_shift -ffffffff82be51fc r opp_mask -ffffffff82be52d0 r optc_shift -ffffffff82be5390 r optc_mask -ffffffff82be568c r mpc_shift -ffffffff82be5768 r mpc_mask -ffffffff82be5ad4 r dsc_shift -ffffffff82be5b8c r dsc_mask -ffffffff82be5e64 r dwbc30_shift -ffffffff82be5f98 r dwbc30_mask -ffffffff82be6460 r mcif_wb30_shift -ffffffff82be650c r mcif_wb30_mask -ffffffff82be67b8 r aux_mask -ffffffff82be6818 r aux_shift -ffffffff82be6830 r i2c_shifts -ffffffff82be685c r i2c_masks -ffffffff82be6900 r audio_shift -ffffffff82be6918 r audio_mask -ffffffff82be6954 r se_shift -ffffffff82be6a30 r se_mask -ffffffff82be6d9c r vpg_shift -ffffffff82be6dc4 r vpg_mask -ffffffff82be6e58 r afmt_shift -ffffffff82be6e6c r afmt_mask -ffffffff82be6eb0 r hpo_dp_se_shift -ffffffff82be6ed8 r hpo_dp_se_mask -ffffffff82be6f78 r apg_shift -ffffffff82be6f80 r apg_mask -ffffffff82be6f98 r hpo_dp_le_shift -ffffffff82be6fb4 r hpo_dp_le_mask -ffffffff82be7018 r hwseq_shift -ffffffff82be7098 r hwseq_mask -ffffffff82be9000 R dcn10_soc_defaults -ffffffff82be908c R dcn10_ip_defaults -ffffffff82bf4000 R dml20_funcs -ffffffff82bf4030 R dml20v2_funcs -ffffffff82bf4060 R dml21_funcs -ffffffff82bf4090 R dml30_funcs -ffffffff82bf40c0 R dml31_funcs -ffffffff82bf40f0 R dml314_funcs -ffffffff82bf4120 R dml32_funcs -ffffffff82bf7000 R qp_table_422_10bpc_min -ffffffff82bf7740 R qp_table_444_8bpc_max -ffffffff82bf8080 R qp_table_420_12bpc_max -ffffffff82bf87c0 R qp_table_444_10bpc_min -ffffffff82bf9400 R qp_table_420_8bpc_max -ffffffff82bf9840 R qp_table_444_8bpc_min -ffffffff82bfa180 R qp_table_444_12bpc_min -ffffffff82bfb0c0 R qp_table_420_12bpc_min -ffffffff82bfb800 R qp_table_422_12bpc_min -ffffffff82bfc140 R qp_table_422_12bpc_max -ffffffff82bfca80 R qp_table_444_12bpc_max -ffffffff82bfd9c0 R qp_table_420_8bpc_min -ffffffff82bfde00 R qp_table_422_8bpc_min -ffffffff82bfe340 R qp_table_422_10bpc_max -ffffffff82bfea80 R qp_table_420_10bpc_max -ffffffff82bff040 R qp_table_420_10bpc_min -ffffffff82bff600 R qp_table_444_10bpc_max -ffffffff82c00240 R qp_table_422_8bpc_max -ffffffff82c02000 r funcs -ffffffff82c02050 r hpd_regs -ffffffff82c021a0 r hpd_shift -ffffffff82c021b0 r hpd_mask -ffffffff82c021c0 r ddc_data_regs -ffffffff82c023a0 r ddc_clk_regs -ffffffff82c02580 r ddc_shift -ffffffff82c025a8 r ddc_mask -ffffffff82c03000 r funcs +ffffffff82aef0c0 r ddr5_wm_table +ffffffff82af0000 r lpddr5_wm_table +ffffffff82af00c0 r ddr5_wm_table +ffffffff82af1000 r lpddr5_wm_table +ffffffff82af10c0 r ddr4_wm_table +ffffffff82af2000 r clk_mgr_regs_dcn321 +ffffffff82af2054 r clk_mgr_shift_dcn321 +ffffffff82af2060 r clk_mgr_mask_dcn321 +ffffffff82af2084 r clk_mgr_regs_dcn32 +ffffffff82af20d8 r clk_mgr_shift_dcn32 +ffffffff82af20e4 r clk_mgr_mask_dcn32 +ffffffff82af3000 r DC_BUILD_ID +ffffffff82af5000 r output_csc_matrix +ffffffff82af50e0 r black_color_format +ffffffff82af6000 r DP_SINK_BRANCH_DEV_NAME_7580 +ffffffff82af7000 r DP_VGA_DONGLE_BRANCH_DEV_NAME +ffffffff82af7006 r DP_DVI_CONVERTER_ID_4 +ffffffff82af700d r DP_DVI_CONVERTER_ID_5 +ffffffff82af8000 r DP_VGA_LVDS_CONVERTER_ID_2 +ffffffff82af8007 r DP_VGA_LVDS_CONVERTER_ID_3 +ffffffff82af8010 r dp_lt_fallbacks +ffffffff82af9000 r mandatory_dpcd_partitions +ffffffff82afb000 r dce_funcs +ffffffff82afc000 r funcs +ffffffff82afd000 R video_optimized_pixel_rates +ffffffff82afd1b0 r dce110_clk_src_funcs +ffffffff82afd1d8 r dce112_clk_src_funcs +ffffffff82afd200 r dcn20_clk_src_funcs +ffffffff82afd228 r dcn3_clk_src_funcs +ffffffff82afd250 r dcn31_clk_src_funcs +ffffffff82afe000 r dce_funcs +ffffffff82afe068 r dcn10_funcs +ffffffff82afe0d0 r dcn20_funcs +ffffffff82afe138 r dcn21_funcs +ffffffff82aff000 r dce_ipp_funcs +ffffffff82b00000 r dce110_lnk_enc_funcs +ffffffff82b01000 r dce_mi_funcs +ffffffff82b01090 r dce112_mi_funcs +ffffffff82b01120 r dce120_mi_funcs +ffffffff82b011b0 r pte_settings +ffffffff82b02000 r funcs +ffffffff82b03000 r dce_link_panel_cntl_funcs +ffffffff82b04000 r filter_3tap_16p_upscale +ffffffff82b04040 r filter_3tap_16p_116 +ffffffff82b04080 r filter_3tap_16p_149 +ffffffff82b040c0 r filter_3tap_16p_183 +ffffffff82b04100 r filter_3tap_64p_upscale +ffffffff82b041d0 r filter_3tap_64p_116 +ffffffff82b042a0 r filter_3tap_64p_149 +ffffffff82b04370 r filter_3tap_64p_183 +ffffffff82b04440 r filter_4tap_16p_upscale +ffffffff82b04490 r filter_4tap_16p_116 +ffffffff82b044e0 r filter_4tap_16p_149 +ffffffff82b04530 r filter_4tap_16p_183 +ffffffff82b04580 r filter_4tap_64p_upscale +ffffffff82b04690 r filter_4tap_64p_116 +ffffffff82b047a0 r filter_4tap_64p_149 +ffffffff82b048b0 r filter_4tap_64p_183 +ffffffff82b049c0 r filter_5tap_64p_upscale +ffffffff82b04b10 r filter_5tap_64p_116 +ffffffff82b04c60 r filter_5tap_64p_149 +ffffffff82b04db0 r filter_5tap_64p_183 +ffffffff82b04f00 r filter_6tap_64p_upscale +ffffffff82b05090 r filter_6tap_64p_116 +ffffffff82b05220 r filter_6tap_64p_149 +ffffffff82b053b0 r filter_6tap_64p_183 +ffffffff82b05540 r filter_7tap_64p_upscale +ffffffff82b05710 r filter_7tap_64p_116 +ffffffff82b058e0 r filter_7tap_64p_149 +ffffffff82b05ab0 r filter_7tap_64p_183 +ffffffff82b05c80 r filter_8tap_64p_upscale +ffffffff82b05e90 r filter_8tap_64p_116 +ffffffff82b060a0 r filter_8tap_64p_149 +ffffffff82b062b0 r filter_8tap_64p_183 +ffffffff82b064c0 r filter_2tap_16p +ffffffff82b064f0 r filter_2tap_64p +ffffffff82b07000 r audio_clock_info_table_48bpc +ffffffff82b07190 r audio_clock_info_table_36bpc +ffffffff82b07320 r audio_clock_info_table +ffffffff82b074e0 r dce110_str_enc_funcs +ffffffff82b08000 r global_color_matrix +ffffffff82b080a8 r dce_transform_funcs +ffffffff82b09000 r abm_funcs +ffffffff82b0a000 r psr_funcs +ffffffff82b0a040 r DP_SINK_DEVICE_STR_ID_1 +ffffffff82b0a045 r DP_SINK_DEVICE_STR_ID_2 +ffffffff82b0b000 r reg_offsets +ffffffff82b0c000 r bios_regs +ffffffff82b0c008 r res_cap +ffffffff82b0c050 r clk_src_regs +ffffffff82b0c14c r dmcu_regs +ffffffff82b0c1a8 r dmcu_shift +ffffffff82b0c1bc r dmcu_mask +ffffffff82b0c208 r abm_regs +ffffffff82b0c248 r abm_shift +ffffffff82b0c25c r abm_mask +ffffffff82b0c2b0 r dce100_tg_offsets +ffffffff82b0c2f8 r plane_cap +ffffffff82b0c328 r res_create_funcs +ffffffff82b0c358 r dce100_res_pool_funcs +ffffffff82b0c440 r panel_cntl_regs +ffffffff82b0c460 r panel_cntl_shift +ffffffff82b0c470 r panel_cntl_mask +ffffffff82b0c4b0 r link_enc_regs +ffffffff82b0c870 r link_enc_aux_regs +ffffffff82b0c8c0 r link_enc_hpd_regs +ffffffff82b0c8d8 r link_enc_feature +ffffffff82b0c8e8 r cs_shift +ffffffff82b0c8f4 r cs_mask +ffffffff82b0c920 r mi_regs +ffffffff82b0cc38 r mi_shifts +ffffffff82b0cc80 r mi_masks +ffffffff82b0cda0 r ipp_regs +ffffffff82b0cf98 r ipp_shift +ffffffff82b0cfc0 r ipp_mask +ffffffff82b0d060 r xfm_regs +ffffffff82b0d600 r xfm_shift +ffffffff82b0d660 r xfm_mask +ffffffff82b0d7e0 r opp_regs +ffffffff82b0d930 r opp_shift +ffffffff82b0d95c r opp_mask +ffffffff82b0da10 r aux_engine_regs +ffffffff82b0db00 r aux_mask +ffffffff82b0db60 r aux_shift +ffffffff82b0db80 r i2c_hw_regs +ffffffff82b0dcd0 r i2c_shifts +ffffffff82b0dcfc r i2c_masks +ffffffff82b0dda0 r audio_regs +ffffffff82b0ded4 r audio_shift +ffffffff82b0deec r audio_mask +ffffffff82b0df30 r stream_enc_regs +ffffffff82b0e5dc r se_shift +ffffffff82b0e660 r se_mask +ffffffff82b0e864 r hwseq_reg +ffffffff82b0ea80 r hwseq_shift +ffffffff82b0eb00 r hwseq_mask +ffffffff82b0f000 r reg_offsets +ffffffff82b0f018 r dce110_compressor_funcs +ffffffff82b10000 r dce110_funcs +ffffffff82b102c0 r dce110_private_funcs +ffffffff82b11000 r dce110_mem_input_v_funcs +ffffffff82b11090 r dvmm_Hw_Setting_1DTiling +ffffffff82b11120 r dvmm_Hw_Setting_2DTiling +ffffffff82b111b0 r dvmm_Hw_Setting_Linear +ffffffff82b12000 r global_color_matrix +ffffffff82b120b0 r input_csc_matrix +ffffffff82b13000 r funcs +ffffffff82b14000 r bios_regs +ffffffff82b14008 r dce110_res_pool_funcs +ffffffff82b140f0 r clk_src_regs +ffffffff82b141ec r dmcu_regs +ffffffff82b14248 r dmcu_shift +ffffffff82b1425c r dmcu_mask +ffffffff82b142a8 r abm_regs +ffffffff82b142e8 r abm_shift +ffffffff82b142fc r abm_mask +ffffffff82b14350 r dce110_tg_offsets +ffffffff82b14398 r res_create_funcs +ffffffff82b143c8 r plane_cap +ffffffff82b143f4 r underlay_plane_cap +ffffffff82b14420 r stoney_resource_cap +ffffffff82b1445c r carrizo_resource_cap +ffffffff82b144a0 r panel_cntl_regs +ffffffff82b144c0 r panel_cntl_shift +ffffffff82b144d0 r panel_cntl_mask +ffffffff82b14510 r link_enc_regs +ffffffff82b148d0 r link_enc_aux_regs +ffffffff82b14920 r link_enc_hpd_regs +ffffffff82b14938 r link_enc_feature +ffffffff82b14948 r cs_shift +ffffffff82b14954 r cs_mask +ffffffff82b14980 r mi_regs +ffffffff82b14b0c r mi_shifts +ffffffff82b14b54 r mi_masks +ffffffff82b14c70 r ipp_regs +ffffffff82b14d6c r ipp_shift +ffffffff82b14d94 r ipp_mask +ffffffff82b14e30 r xfm_regs +ffffffff82b15100 r xfm_shift +ffffffff82b15160 r xfm_mask +ffffffff82b152e0 r opp_regs +ffffffff82b15430 r opp_shift +ffffffff82b1545c r opp_mask +ffffffff82b15510 r aux_engine_regs +ffffffff82b15600 r aux_mask +ffffffff82b15660 r aux_shift +ffffffff82b15680 r i2c_hw_regs +ffffffff82b157d0 r i2c_shifts +ffffffff82b157fc r i2c_masks +ffffffff82b158a0 r audio_regs +ffffffff82b159d4 r audio_shift +ffffffff82b159ec r audio_mask +ffffffff82b15a30 r stream_enc_regs +ffffffff82b15d0c r se_shift +ffffffff82b15d90 r se_mask +ffffffff82b15f94 r hwseq_stoney_reg +ffffffff82b161b0 r hwseq_cz_reg +ffffffff82b163cc r hwseq_shift +ffffffff82b1644c r hwseq_mask +ffffffff82b17000 r dce110_tg_funcs +ffffffff82b18000 r dce110_tg_v_funcs +ffffffff82b19000 r dce110_xfmv_funcs +ffffffff82b1a000 r reg_offsets +ffffffff82b1b000 r reg_offsets +ffffffff82b1c000 r bios_regs +ffffffff82b1c010 r clk_src_regs +ffffffff82b1c208 r dmcu_regs +ffffffff82b1c264 r dmcu_shift +ffffffff82b1c278 r dmcu_mask +ffffffff82b1c2c4 r abm_regs +ffffffff82b1c304 r abm_shift +ffffffff82b1c318 r abm_mask +ffffffff82b1c360 r dce112_tg_offsets +ffffffff82b1c3a8 r res_create_funcs +ffffffff82b1c3d8 r plane_cap +ffffffff82b1c404 r polaris_11_resource_cap +ffffffff82b1c440 r polaris_10_resource_cap +ffffffff82b1c480 r dce112_res_pool_funcs +ffffffff82b1c560 r panel_cntl_regs +ffffffff82b1c580 r panel_cntl_shift +ffffffff82b1c590 r panel_cntl_mask +ffffffff82b1c5d0 r link_enc_regs +ffffffff82b1c990 r link_enc_aux_regs +ffffffff82b1c9e0 r link_enc_hpd_regs +ffffffff82b1c9f8 r link_enc_feature +ffffffff82b1ca08 r cs_shift +ffffffff82b1ca14 r cs_mask +ffffffff82b1ca40 r mi_regs +ffffffff82b1cd58 r mi_shifts +ffffffff82b1cda0 r mi_masks +ffffffff82b1cec0 r ipp_regs +ffffffff82b1d0b8 r ipp_shift +ffffffff82b1d0e0 r ipp_mask +ffffffff82b1d180 r xfm_regs +ffffffff82b1d720 r xfm_shift +ffffffff82b1d780 r xfm_mask +ffffffff82b1d900 r opp_regs +ffffffff82b1da50 r opp_shift +ffffffff82b1da7c r opp_mask +ffffffff82b1db30 r aux_engine_regs +ffffffff82b1dc20 r aux_mask +ffffffff82b1dc80 r aux_shift +ffffffff82b1dca0 r i2c_hw_regs +ffffffff82b1ddf0 r i2c_shifts +ffffffff82b1de1c r i2c_masks +ffffffff82b1dec0 r audio_regs +ffffffff82b1dfc8 r audio_shift +ffffffff82b1dfe0 r audio_mask +ffffffff82b1e020 r stream_enc_regs +ffffffff82b1e5d8 r se_shift +ffffffff82b1e65c r se_mask +ffffffff82b1e860 r hwseq_reg +ffffffff82b1ea7c r hwseq_shift +ffffffff82b1eafc r hwseq_mask +ffffffff82b1f000 r bios_regs +ffffffff82b1f008 r res_cap +ffffffff82b1f048 r dce120_res_pool_funcs +ffffffff82b1f128 r debug_defaults +ffffffff82b1f2a0 r clk_src_regs +ffffffff82b1f498 r dmcu_regs +ffffffff82b1f4f4 r dmcu_shift +ffffffff82b1f508 r dmcu_mask +ffffffff82b1f554 r abm_regs +ffffffff82b1f594 r abm_shift +ffffffff82b1f5a8 r abm_mask +ffffffff82b1f5f0 r dce120_tg_offsets +ffffffff82b1f638 r dce121_res_create_funcs +ffffffff82b1f668 r res_create_funcs +ffffffff82b1f698 r plane_cap +ffffffff82b1f6d0 r panel_cntl_regs +ffffffff82b1f6f0 r panel_cntl_shift +ffffffff82b1f700 r panel_cntl_mask +ffffffff82b1f740 r link_enc_regs +ffffffff82b1fb00 r link_enc_aux_regs +ffffffff82b1fb50 r link_enc_hpd_regs +ffffffff82b1fb68 r link_enc_feature +ffffffff82b1fb78 r cs_shift +ffffffff82b1fb84 r cs_mask +ffffffff82b1fbb0 r mi_regs +ffffffff82b1fec8 r mi_shifts +ffffffff82b1ff10 r mi_masks +ffffffff82b20030 r ipp_regs +ffffffff82b20228 r ipp_shift +ffffffff82b20250 r ipp_mask +ffffffff82b202f0 r xfm_regs +ffffffff82b20890 r xfm_shift +ffffffff82b208f0 r xfm_mask +ffffffff82b20a70 r opp_regs +ffffffff82b20bc0 r opp_shift +ffffffff82b20bec r opp_mask +ffffffff82b20ca0 r aux_engine_regs +ffffffff82b20d90 r aux_mask +ffffffff82b20df0 r aux_shift +ffffffff82b20e10 r i2c_hw_regs +ffffffff82b20f60 r i2c_shifts +ffffffff82b20f8c r i2c_masks +ffffffff82b21030 r audio_regs +ffffffff82b21164 r audio_shift +ffffffff82b2117c r audio_mask +ffffffff82b211c0 r stream_enc_regs +ffffffff82b21778 r se_shift +ffffffff82b217fc r se_mask +ffffffff82b21a00 r dce121_hwseq_reg +ffffffff82b21c1c r dce121_hwseq_shift +ffffffff82b21c9c r dce121_hwseq_mask +ffffffff82b21e90 r hwseq_reg +ffffffff82b220ac r hwseq_shift +ffffffff82b2212c r hwseq_mask +ffffffff82b23000 r dce120_tg_funcs +ffffffff82b24000 r bios_regs +ffffffff82b24008 r res_cap +ffffffff82b24048 r dce80_res_pool_funcs +ffffffff82b24130 r clk_src_regs +ffffffff82b2422c r dmcu_regs +ffffffff82b24288 r dmcu_shift +ffffffff82b2429c r dmcu_mask +ffffffff82b242e8 r abm_regs +ffffffff82b24328 r abm_shift +ffffffff82b2433c r abm_mask +ffffffff82b24390 r dce80_tg_offsets +ffffffff82b243d8 r plane_cap +ffffffff82b24408 r res_create_funcs +ffffffff82b24440 r panel_cntl_regs +ffffffff82b24460 r panel_cntl_shift +ffffffff82b24470 r panel_cntl_mask +ffffffff82b244b0 r link_enc_regs +ffffffff82b24870 r link_enc_aux_regs +ffffffff82b248c0 r link_enc_hpd_regs +ffffffff82b248d8 r link_enc_feature +ffffffff82b248e8 r cs_shift +ffffffff82b248f4 r cs_mask +ffffffff82b24920 r mi_regs +ffffffff82b24c38 r mi_shifts +ffffffff82b24c80 r mi_masks +ffffffff82b24da0 r ipp_regs +ffffffff82b24f98 r ipp_shift +ffffffff82b24fc0 r ipp_mask +ffffffff82b25060 r xfm_regs +ffffffff82b25600 r xfm_shift +ffffffff82b25660 r xfm_mask +ffffffff82b257e0 r opp_regs +ffffffff82b25930 r opp_shift +ffffffff82b2595c r opp_mask +ffffffff82b25a10 r aux_engine_regs +ffffffff82b25b00 r aux_mask +ffffffff82b25b60 r aux_shift +ffffffff82b25b80 r i2c_hw_regs +ffffffff82b25cd0 r i2c_shifts +ffffffff82b25cfc r i2c_masks +ffffffff82b25da0 r audio_regs +ffffffff82b25ed4 r audio_shift +ffffffff82b25eec r audio_mask +ffffffff82b25f30 r stream_enc_regs +ffffffff82b265dc r se_shift +ffffffff82b26660 r se_mask +ffffffff82b26864 r hwseq_reg +ffffffff82b26a80 r hwseq_shift +ffffffff82b26b00 r hwseq_mask +ffffffff82b26cf4 r res_cap_81 +ffffffff82b26d30 r res_cap_83 +ffffffff82b27000 r reg_offsets +ffffffff82b27048 r dce80_tg_funcs +ffffffff82b28000 r dcn10_dpp_funcs +ffffffff82b29000 r dpp_input_csc_matrix +ffffffff82b2b000 r hubbub1_funcs +ffffffff82b2c000 r dcn10_hubp_funcs +ffffffff82b2d000 r reduceSizeAndFraction.prime_numbers +ffffffff82b2f000 r dcn10_funcs +ffffffff82b2f2c0 r dcn10_private_funcs +ffffffff82b30000 r dcn10_ipp_funcs +ffffffff82b30048 r dcn20_ipp_funcs +ffffffff82b31000 r dcn10_lnk_enc_funcs +ffffffff82b32000 r dcn10_mpc_funcs +ffffffff82b33000 r dcn10_opp_funcs +ffffffff82b34000 r dcn10_tg_funcs +ffffffff82b35000 r bios_regs +ffffffff82b35008 r rv2_res_cap +ffffffff82b35044 r res_cap +ffffffff82b35080 r debug_defaults_drv +ffffffff82b351f8 r debug_defaults_diags +ffffffff82b35370 r clk_src_regs +ffffffff82b354c0 r dmcu_regs +ffffffff82b3551c r dmcu_shift +ffffffff82b35530 r dmcu_mask +ffffffff82b3557c r abm_regs +ffffffff82b355bc r abm_shift +ffffffff82b355d0 r abm_mask +ffffffff82b35618 r res_create_funcs +ffffffff82b35648 r res_create_maximus_funcs +ffffffff82b35678 r plane_cap +ffffffff82b356a8 r dcn10_res_pool_funcs +ffffffff82b35790 r panel_cntl_regs +ffffffff82b357b0 r panel_cntl_shift +ffffffff82b357c0 r panel_cntl_mask +ffffffff82b35800 r link_enc_regs +ffffffff82b35d10 r link_enc_aux_regs +ffffffff82b35d50 r link_enc_hpd_regs +ffffffff82b35d60 r le_shift +ffffffff82b35e50 r le_mask +ffffffff82b36208 r link_enc_feature +ffffffff82b36218 r cs_shift +ffffffff82b36224 r cs_mask +ffffffff82b36250 r hubp_regs +ffffffff82b36900 r hubp_shift +ffffffff82b369c4 r hubp_mask +ffffffff82b36cd0 r ipp_regs +ffffffff82b36db0 r ipp_shift +ffffffff82b36dcc r ipp_mask +ffffffff82b36e40 r tf_regs +ffffffff82b37da0 r tf_shift +ffffffff82b38008 r tf_mask +ffffffff82b389a0 r opp_regs +ffffffff82b38a70 r opp_shift +ffffffff82b38a90 r opp_mask +ffffffff82b38b10 r tg_regs +ffffffff82b39010 r tg_shift +ffffffff82b390d0 r tg_mask +ffffffff82b393d0 r aux_engine_regs +ffffffff82b394c0 r aux_mask +ffffffff82b39520 r aux_shift +ffffffff82b39540 r i2c_hw_regs +ffffffff82b39690 r i2c_shifts +ffffffff82b396bc r i2c_masks +ffffffff82b39760 r mpc_regs +ffffffff82b39880 r mpc_shift +ffffffff82b39898 r mpc_mask +ffffffff82b398f4 r hubbub_reg +ffffffff82b39a68 r hubbub_shift +ffffffff82b39af0 r hubbub_mask +ffffffff82b39d10 r audio_regs +ffffffff82b39dc0 r audio_shift +ffffffff82b39dd8 r audio_mask +ffffffff82b39e20 r stream_enc_regs +ffffffff82b3a370 r se_shift +ffffffff82b3a44c r se_mask +ffffffff82b3a7b8 r hwseq_reg +ffffffff82b3a9d4 r hwseq_shift +ffffffff82b3aa54 r hwseq_mask +ffffffff82b3b000 r audio_clock_info_table_48bpc +ffffffff82b3b190 r audio_clock_info_table_36bpc +ffffffff82b3b320 r audio_clock_info_table +ffffffff82b3b4e0 r dcn10_str_enc_funcs +ffffffff82b3c000 r dccg2_funcs +ffffffff82b3e000 r dpp_input_csc_matrix +ffffffff82b3f000 R dcn20_dsc_funcs +ffffffff82b40000 R dcn20_dwbc_funcs +ffffffff82b41000 r filter_12tap_16p_upscale +ffffffff82b410e0 r filter_12tap_16p_117 +ffffffff82b411c0 r filter_12tap_16p_150 +ffffffff82b412a0 r filter_12tap_16p_183 +ffffffff82b41380 r filter_11tap_16p_upscale +ffffffff82b41450 r filter_11tap_16p_117 +ffffffff82b41520 r filter_11tap_16p_150 +ffffffff82b415f0 r filter_11tap_16p_183 +ffffffff82b416c0 r filter_10tap_16p_upscale +ffffffff82b41780 r filter_10tap_16p_117 +ffffffff82b41840 r filter_10tap_16p_150 +ffffffff82b41900 r filter_10tap_16p_183 +ffffffff82b419c0 r filter_9tap_16p_upscale +ffffffff82b41a70 r filter_9tap_16p_117 +ffffffff82b41b20 r filter_9tap_16p_150 +ffffffff82b41bd0 r filter_9tap_16p_183 +ffffffff82b41c80 r filter_8tap_16p_upscale +ffffffff82b41d10 r filter_8tap_16p_117 +ffffffff82b41da0 r filter_8tap_16p_150 +ffffffff82b41e30 r filter_8tap_16p_183 +ffffffff82b41ec0 r filter_7tap_16p_upscale +ffffffff82b41f40 r filter_7tap_16p_117 +ffffffff82b41fc0 r filter_7tap_16p_150 +ffffffff82b42040 r filter_7tap_16p_183 +ffffffff82b420c0 r filter_6tap_16p_upscale +ffffffff82b42130 r filter_6tap_16p_117 +ffffffff82b421a0 r filter_6tap_16p_150 +ffffffff82b42210 r filter_6tap_16p_183 +ffffffff82b42280 r filter_5tap_16p_upscale +ffffffff82b422e0 r filter_5tap_16p_117 +ffffffff82b42340 r filter_5tap_16p_150 +ffffffff82b423a0 r filter_5tap_16p_183 +ffffffff82b42400 r filter_4tap_16p_upscale +ffffffff82b42450 r filter_4tap_16p_117 +ffffffff82b424a0 r filter_4tap_16p_150 +ffffffff82b424f0 r filter_4tap_16p_183 +ffffffff82b42540 r filter_3tap_16p_upscale +ffffffff82b42580 r filter_3tap_16p_117 +ffffffff82b425c0 r filter_3tap_16p_150 +ffffffff82b42600 r filter_3tap_16p_183 +ffffffff82b43000 r hubbub2_funcs +ffffffff82b44000 r dcn20_funcs +ffffffff82b442c0 r dcn20_private_funcs +ffffffff82b45000 r dcn2_mpll_cfg +ffffffff82b45190 r dcn20_link_enc_funcs +ffffffff82b46000 R dcn20_mmhubbub_funcs +ffffffff82b47000 R dcn20_mpc_funcs +ffffffff82b48000 r tf_regs +ffffffff82b49920 r tf_shift +ffffffff82b49ba4 r tf_mask +ffffffff82b4a5c0 r ipp_regs +ffffffff82b4a710 r ipp_shift +ffffffff82b4a72c r ipp_mask +ffffffff82b4a7a0 r opp_regs +ffffffff82b4a9b0 r opp_shift +ffffffff82b4a9e8 r opp_mask +ffffffff82b4aac0 r aux_engine_regs +ffffffff82b4abb0 r aux_mask +ffffffff82b4ac10 r aux_shift +ffffffff82b4ac30 r i2c_hw_regs +ffffffff82b4ad80 r i2c_shifts +ffffffff82b4adac r i2c_masks +ffffffff82b4ae50 r mpc_regs +ffffffff82b4b398 r mpc_shift +ffffffff82b4b3e0 r mpc_mask +ffffffff82b4b4f4 r hubbub_reg +ffffffff82b4b668 r hubbub_shift +ffffffff82b4b6f0 r hubbub_mask +ffffffff82b4b90c r res_cap_nv10 +ffffffff82b4b950 r vmid_regs +ffffffff82b4bb10 r vmid_shifts +ffffffff82b4bb18 r vmid_masks +ffffffff82b4bb40 r tg_regs +ffffffff82b4c2c0 r tg_shift +ffffffff82b4c380 r tg_mask +ffffffff82b4c680 r link_enc_regs +ffffffff82b4ce20 r link_enc_aux_regs +ffffffff82b4ce80 r link_enc_hpd_regs +ffffffff82b4ce98 r le_shift +ffffffff82b4cf88 r le_mask +ffffffff82b4d340 r stream_enc_regs +ffffffff82b4db38 r se_shift +ffffffff82b4dc14 r se_mask +ffffffff82b4df80 r hwseq_reg +ffffffff82b4e19c r hwseq_shift +ffffffff82b4e21c r hwseq_mask +ffffffff82b4e410 r dsc_regs +ffffffff82b4e8a8 r dsc_shift +ffffffff82b4e960 r dsc_mask +ffffffff82b4ec40 r hubp_regs +ffffffff82b4f888 r hubp_shift +ffffffff82b4f984 r hubp_mask +ffffffff82b4fd80 r dwbc20_regs +ffffffff82b4fe38 r dwbc20_shift +ffffffff82b4feb8 r dwbc20_mask +ffffffff82b500b0 r mcif_wb20_regs +ffffffff82b50190 r mcif_wb20_shift +ffffffff82b50230 r mcif_wb20_mask +ffffffff82b504b0 r link_enc_feature +ffffffff82b504c0 r bios_regs +ffffffff82b504c8 r dcn20_res_pool_funcs +ffffffff82b505a8 r res_cap_nv14 +ffffffff82b505e8 r debug_defaults_drv +ffffffff82b50760 r debug_defaults_diags +ffffffff82b508e0 r clk_src_regs +ffffffff82b50ad8 r dccg_regs +ffffffff82b50bc4 r dccg_shift +ffffffff82b50c5c r dccg_mask +ffffffff82b50eb8 r dmcu_regs +ffffffff82b50f14 r dmcu_shift +ffffffff82b50f28 r dmcu_mask +ffffffff82b50f74 r abm_regs +ffffffff82b50fb4 r abm_shift +ffffffff82b50fc8 r abm_mask +ffffffff82b51010 r res_create_funcs +ffffffff82b51040 r res_create_maximus_funcs +ffffffff82b51070 r plane_cap +ffffffff82b510a0 r panel_cntl_regs +ffffffff82b510c0 r panel_cntl_shift +ffffffff82b510d0 r panel_cntl_mask +ffffffff82b5110c r cs_shift +ffffffff82b51118 r cs_mask +ffffffff82b51140 r audio_regs +ffffffff82b51274 r audio_shift +ffffffff82b5128c r audio_mask +ffffffff82b52000 r dcn20_str_enc_funcs +ffffffff82b53000 r dccg201_funcs +ffffffff82b54000 r hubbub201_funcs +ffffffff82b55000 r dcn201_funcs +ffffffff82b552c0 r dcn201_private_funcs +ffffffff82b56000 r dcn201_link_enc_funcs +ffffffff82b57000 R dcn201_mpc_funcs +ffffffff82b58000 r bios_regs +ffffffff82b58008 r res_cap_dnc201 +ffffffff82b58048 r debug_defaults_drv +ffffffff82b581c0 r clk_src_regs +ffffffff82b58268 r dccg_regs +ffffffff82b58354 r dccg_shift +ffffffff82b583ec r dccg_mask +ffffffff82b58648 r res_create_funcs +ffffffff82b58678 r res_create_maximus_funcs +ffffffff82b586a8 r plane_cap +ffffffff82b586e0 r link_enc_regs +ffffffff82b58970 r link_enc_aux_regs +ffffffff82b58990 r link_enc_hpd_regs +ffffffff82b58998 r le_shift +ffffffff82b58a88 r le_mask +ffffffff82b58e40 r link_enc_feature +ffffffff82b58e50 r cs_shift +ffffffff82b58e5c r cs_mask +ffffffff82b58e90 r hubp_regs +ffffffff82b59620 r hubp_shift +ffffffff82b596f8 r hubp_mask +ffffffff82b59a60 r ipp_regs +ffffffff82b59b40 r ipp_shift +ffffffff82b59b5c r ipp_mask +ffffffff82b59bd0 r tf_regs +ffffffff82b5ac10 r tf_shift +ffffffff82b5ae94 r tf_mask +ffffffff82b5b8b0 r opp_regs +ffffffff82b5b960 r opp_shift +ffffffff82b5b998 r opp_mask +ffffffff82b5ba70 r aux_engine_regs +ffffffff82b5bac0 r aux_mask +ffffffff82b5bb20 r aux_shift +ffffffff82b5bb40 r i2c_hw_regs +ffffffff82b5bbb0 r i2c_shifts +ffffffff82b5bbdc r i2c_masks +ffffffff82b5bc80 r tg_regs +ffffffff82b5bf00 r tg_shift +ffffffff82b5bfc0 r tg_mask +ffffffff82b5c2bc r mpc_regs +ffffffff82b5c804 r mpc_shift +ffffffff82b5c850 r mpc_mask +ffffffff82b5c978 r hubbub_reg +ffffffff82b5caec r hubbub_shift +ffffffff82b5cb74 r hubbub_mask +ffffffff82b5cd90 r audio_regs +ffffffff82b5cde8 r audio_shift +ffffffff82b5ce00 r audio_mask +ffffffff82b5ce40 r stream_enc_regs +ffffffff82b5d0e8 r se_shift +ffffffff82b5d1c4 r se_mask +ffffffff82b5d530 r hwseq_reg +ffffffff82b5d74c r hwseq_shift +ffffffff82b5d7cc r hwseq_mask +ffffffff82b5e000 r dccg21_funcs +ffffffff82b5f000 r hubbub21_funcs +ffffffff82b60000 r dcn21_funcs +ffffffff82b602c0 r dcn21_private_funcs +ffffffff82b61000 r dcn21_mpll_cfg_ref +ffffffff82b61190 r dcn21_link_enc_funcs +ffffffff82b62000 r bios_regs +ffffffff82b62008 r res_cap_rn +ffffffff82b62048 r dcn21_res_pool_funcs +ffffffff82b62128 r debug_defaults_drv +ffffffff82b622a0 r debug_defaults_diags +ffffffff82b62420 r clk_src_regs +ffffffff82b625c4 r dccg_regs +ffffffff82b626b0 r dccg_shift +ffffffff82b62748 r dccg_mask +ffffffff82b629a4 r dmcu_regs +ffffffff82b62a00 r dmcu_shift +ffffffff82b62a14 r dmcu_mask +ffffffff82b62a60 r abm_regs +ffffffff82b62aa0 r abm_shift +ffffffff82b62ab4 r abm_mask +ffffffff82b62b00 r res_create_funcs +ffffffff82b62b30 r res_create_maximus_funcs +ffffffff82b62b60 r plane_cap +ffffffff82b62b90 r panel_cntl_regs +ffffffff82b62bb0 r panel_cntl_shift +ffffffff82b62bc0 r panel_cntl_mask +ffffffff82b62c00 r link_enc_regs +ffffffff82b63260 r link_enc_aux_regs +ffffffff82b632b0 r link_enc_hpd_regs +ffffffff82b632c4 r le_shift +ffffffff82b633b4 r le_mask +ffffffff82b6376c r link_enc_feature +ffffffff82b6377c r panel_config_defaults +ffffffff82b637b0 r cs_shift +ffffffff82b637bc r cs_mask +ffffffff82b637f0 r hubp_regs +ffffffff82b64020 r hubp_shift +ffffffff82b6411c r hubp_mask +ffffffff82b64510 r ipp_regs +ffffffff82b645f0 r ipp_shift +ffffffff82b6460c r ipp_mask +ffffffff82b64680 r tf_regs +ffffffff82b65740 r tf_shift +ffffffff82b659c4 r tf_mask +ffffffff82b663e0 r opp_regs +ffffffff82b665f0 r opp_shift +ffffffff82b66628 r opp_mask +ffffffff82b66700 r tg_regs +ffffffff82b66c00 r tg_shift +ffffffff82b66cc0 r tg_mask +ffffffff82b66fc0 r aux_engine_regs +ffffffff82b67088 r aux_mask +ffffffff82b670e8 r aux_shift +ffffffff82b67100 r i2c_hw_regs +ffffffff82b67218 r i2c_shifts +ffffffff82b67244 r i2c_masks +ffffffff82b672e8 r mpc_regs +ffffffff82b67830 r mpc_shift +ffffffff82b67878 r mpc_mask +ffffffff82b6798c r hubbub_reg +ffffffff82b67b00 r hubbub_shift +ffffffff82b67b88 r hubbub_mask +ffffffff82b67db0 r vmid_regs +ffffffff82b67f70 r vmid_shifts +ffffffff82b67f78 r vmid_masks +ffffffff82b67fa0 r dsc_regs +ffffffff82b68438 r dsc_shift +ffffffff82b684f0 r dsc_mask +ffffffff82b687d0 r audio_regs +ffffffff82b688d8 r audio_shift +ffffffff82b688f0 r audio_mask +ffffffff82b68930 r stream_enc_regs +ffffffff82b68fd4 r se_shift +ffffffff82b690b0 r se_mask +ffffffff82b6941c r hwseq_reg +ffffffff82b69638 r hwseq_shift +ffffffff82b696b8 r hwseq_mask +ffffffff82b6a000 r dccg3_funcs +ffffffff82b6b000 r dcn30_link_enc_funcs +ffffffff82b6c000 r dcn30_str_enc_funcs +ffffffff82b6d000 r dpp_input_csc_matrix +ffffffff82b6e000 R dcn30_dwbc_funcs +ffffffff82b6f000 r hubbub30_funcs +ffffffff82b71000 r dcn30_funcs +ffffffff82b712c0 r dcn30_private_funcs +ffffffff82b72000 R dcn30_mmhubbub_funcs +ffffffff82b73000 R dcn30_mpc_funcs +ffffffff82b74000 r bios_regs +ffffffff82b74008 r res_cap_dcn3 +ffffffff82b74048 r debug_defaults_drv +ffffffff82b741c0 r debug_defaults_diags +ffffffff82b74340 r clk_src_regs +ffffffff82b74538 r dccg_regs +ffffffff82b74624 r dccg_shift +ffffffff82b746bc r dccg_mask +ffffffff82b74920 r abm_regs +ffffffff82b74aa0 r abm_shift +ffffffff82b74ab4 r abm_mask +ffffffff82b74b00 r res_create_funcs +ffffffff82b74b30 r res_create_maximus_funcs +ffffffff82b74b60 r plane_cap +ffffffff82b74b90 r dcn30_res_pool_funcs +ffffffff82b74c70 r panel_cntl_regs +ffffffff82b74c90 r panel_cntl_shift +ffffffff82b74ca0 r panel_cntl_mask +ffffffff82b74ce0 r link_enc_regs +ffffffff82b75480 r link_enc_aux_regs +ffffffff82b754e0 r link_enc_hpd_regs +ffffffff82b754f8 r le_shift +ffffffff82b755e8 r le_mask +ffffffff82b759a0 r link_enc_feature +ffffffff82b759b0 r cs_shift +ffffffff82b759bc r cs_mask +ffffffff82b759e4 r hubbub_reg +ffffffff82b75b58 r hubbub_shift +ffffffff82b75be0 r hubbub_mask +ffffffff82b75e00 r vmid_regs +ffffffff82b75fc0 r vmid_shifts +ffffffff82b75fc8 r vmid_masks +ffffffff82b75ff0 r hubp_regs +ffffffff82b76c38 r hubp_shift +ffffffff82b76d34 r hubp_mask +ffffffff82b77130 r dpp_regs +ffffffff82b790b0 r tf_shift +ffffffff82b79380 r tf_mask +ffffffff82b79ec0 r opp_regs +ffffffff82b7a0d0 r opp_shift +ffffffff82b7a108 r opp_mask +ffffffff82b7a1e0 r optc_regs +ffffffff82b7a960 r optc_shift +ffffffff82b7aa20 r optc_mask +ffffffff82b7ad1c r mpc_regs +ffffffff82b7c508 r mpc_shift +ffffffff82b7c5e4 r mpc_mask +ffffffff82b7c950 r dsc_regs +ffffffff82b7cde8 r dsc_shift +ffffffff82b7cea0 r dsc_mask +ffffffff82b7d180 r dwbc30_regs +ffffffff82b7d35c r dwbc30_shift +ffffffff82b7d490 r dwbc30_mask +ffffffff82b7d960 r mcif_wb30_regs +ffffffff82b7da5c r mcif_wb30_shift +ffffffff82b7db08 r mcif_wb30_mask +ffffffff82b7ddc0 r aux_engine_regs +ffffffff82b7deb0 r aux_mask +ffffffff82b7df10 r aux_shift +ffffffff82b7df30 r i2c_hw_regs +ffffffff82b7e080 r i2c_shifts +ffffffff82b7e0ac r i2c_masks +ffffffff82b7e150 r audio_regs +ffffffff82b7e284 r audio_shift +ffffffff82b7e29c r audio_mask +ffffffff82b7e2e0 r stream_enc_regs +ffffffff82b7ead8 r se_shift +ffffffff82b7ebb4 r se_mask +ffffffff82b7ef20 r vpg_regs +ffffffff82b7efac r vpg_shift +ffffffff82b7efd4 r vpg_mask +ffffffff82b7f070 r afmt_regs +ffffffff82b7f16c r afmt_shift +ffffffff82b7f180 r afmt_mask +ffffffff82b7f1c4 r hwseq_reg +ffffffff82b7f3e0 r hwseq_shift +ffffffff82b7f460 r hwseq_mask +ffffffff82b80000 r dccg301_funcs +ffffffff82b81000 r dcn301_link_enc_funcs +ffffffff82b82000 r hubbub301_funcs +ffffffff82b83000 r dcn301_funcs +ffffffff82b832c0 r dcn301_private_funcs +ffffffff82b84000 r dcn301_link_panel_cntl_funcs +ffffffff82b85000 r bios_regs +ffffffff82b85008 r debug_defaults_drv +ffffffff82b85180 r debug_defaults_diags +ffffffff82b85300 r clk_src_regs +ffffffff82b85450 r dccg_regs +ffffffff82b8553c r dccg_shift +ffffffff82b855d4 r dccg_mask +ffffffff82b85830 r abm_regs +ffffffff82b85930 r abm_shift +ffffffff82b85944 r abm_mask +ffffffff82b85990 r res_create_funcs +ffffffff82b859c0 r res_create_maximus_funcs +ffffffff82b859f0 r plane_cap +ffffffff82b85a20 r panel_cntl_regs +ffffffff82b85a60 r panel_cntl_shift +ffffffff82b85a70 r panel_cntl_mask +ffffffff82b85ab0 r link_enc_regs +ffffffff82b85fc0 r link_enc_aux_regs +ffffffff82b86000 r link_enc_hpd_regs +ffffffff82b86010 r le_shift +ffffffff82b86100 r le_mask +ffffffff82b864b8 r link_enc_feature +ffffffff82b864c8 r cs_shift +ffffffff82b864d4 r cs_mask +ffffffff82b864fc r hubbub_reg +ffffffff82b86670 r hubbub_shift +ffffffff82b866f8 r hubbub_mask +ffffffff82b86920 r vmid_regs +ffffffff82b86ae0 r vmid_shifts +ffffffff82b86ae8 r vmid_masks +ffffffff82b86b10 r hubp_regs +ffffffff82b87340 r hubp_shift +ffffffff82b8743c r hubp_mask +ffffffff82b87830 r dpp_regs +ffffffff82b88d30 r tf_shift +ffffffff82b89000 r tf_mask +ffffffff82b89b40 r opp_regs +ffffffff82b89ca0 r opp_shift +ffffffff82b89cd8 r opp_mask +ffffffff82b89db0 r optc_regs +ffffffff82b8a2b0 r optc_shift +ffffffff82b8a370 r optc_mask +ffffffff82b8a66c r mpc_regs +ffffffff82b8be58 r mpc_shift +ffffffff82b8bf34 r mpc_mask +ffffffff82b8c2a0 r dsc_regs +ffffffff82b8c4ec r dsc_shift +ffffffff82b8c5a4 r dsc_mask +ffffffff82b8c880 r dwbc30_regs +ffffffff82b8ca5c r dwbc30_shift +ffffffff82b8cb90 r dwbc30_mask +ffffffff82b8d060 r mcif_wb30_regs +ffffffff82b8d15c r mcif_wb30_shift +ffffffff82b8d208 r mcif_wb30_mask +ffffffff82b8d4c0 r aux_engine_regs +ffffffff82b8d560 r aux_mask +ffffffff82b8d5c0 r aux_shift +ffffffff82b8d5e0 r i2c_hw_regs +ffffffff82b8d6c0 r i2c_shifts +ffffffff82b8d6ec r i2c_masks +ffffffff82b8d790 r audio_regs +ffffffff82b8d8c4 r audio_shift +ffffffff82b8d8dc r audio_mask +ffffffff82b8d920 r stream_enc_regs +ffffffff82b8de70 r se_shift +ffffffff82b8df4c r se_mask +ffffffff82b8e2c0 r vpg_regs +ffffffff82b8e310 r vpg_shift +ffffffff82b8e338 r vpg_mask +ffffffff82b8e3d0 r afmt_regs +ffffffff82b8e460 r afmt_shift +ffffffff82b8e474 r afmt_mask +ffffffff82b8e4b8 r hwseq_reg +ffffffff82b8e6d4 r hwseq_shift +ffffffff82b8e754 r hwseq_mask +ffffffff82b8f000 r bios_regs +ffffffff82b8f008 r res_cap_dcn302 +ffffffff82b8f048 r debug_defaults_drv +ffffffff82b8f1c0 r debug_defaults_diags +ffffffff82b8f340 r clk_src_regs +ffffffff82b8f4e4 r dccg_regs +ffffffff82b8f5d0 r dccg_shift +ffffffff82b8f668 r dccg_mask +ffffffff82b8f8d0 r abm_regs +ffffffff82b8fa10 r abm_shift +ffffffff82b8fa24 r abm_mask +ffffffff82b8fa70 r res_create_funcs +ffffffff82b8faa0 r res_create_maximus_funcs +ffffffff82b8fad0 r plane_cap +ffffffff82b8fb00 r panel_cntl_regs +ffffffff82b8fb20 r panel_cntl_shift +ffffffff82b8fb30 r panel_cntl_mask +ffffffff82b8fb70 r link_enc_regs +ffffffff82b901d0 r link_enc_aux_regs +ffffffff82b90220 r link_enc_hpd_regs +ffffffff82b90234 r le_shift +ffffffff82b90324 r le_mask +ffffffff82b906dc r link_enc_feature +ffffffff82b906ec r cs_shift +ffffffff82b906f8 r cs_mask +ffffffff82b90720 r hubbub_reg +ffffffff82b90894 r hubbub_shift +ffffffff82b9091c r hubbub_mask +ffffffff82b90b40 r vmid_regs +ffffffff82b90d00 r vmid_shifts +ffffffff82b90d08 r vmid_masks +ffffffff82b90d30 r hubp_regs +ffffffff82b9176c r hubp_shift +ffffffff82b91868 r hubp_mask +ffffffff82b91c60 r dpp_regs +ffffffff82b936a0 r tf_shift +ffffffff82b93970 r tf_mask +ffffffff82b944b0 r opp_regs +ffffffff82b94668 r opp_shift +ffffffff82b946a0 r opp_mask +ffffffff82b94780 r optc_regs +ffffffff82b94dc0 r optc_shift +ffffffff82b94e80 r optc_mask +ffffffff82b9517c r mpc_regs +ffffffff82b96968 r mpc_shift +ffffffff82b96a44 r mpc_mask +ffffffff82b96db0 r dsc_regs +ffffffff82b97184 r dsc_shift +ffffffff82b9723c r dsc_mask +ffffffff82b97520 r dwbc30_regs +ffffffff82b976fc r dwbc30_shift +ffffffff82b97830 r dwbc30_mask +ffffffff82b97d00 r mcif_wb30_regs +ffffffff82b97dfc r mcif_wb30_shift +ffffffff82b97ea8 r mcif_wb30_mask +ffffffff82b98160 r aux_engine_regs +ffffffff82b98228 r aux_mask +ffffffff82b98288 r aux_shift +ffffffff82b982a0 r i2c_hw_regs +ffffffff82b983b8 r i2c_shifts +ffffffff82b983e4 r i2c_masks +ffffffff82b98490 r audio_regs +ffffffff82b985c4 r audio_shift +ffffffff82b985dc r audio_mask +ffffffff82b98620 r stream_enc_regs +ffffffff82b98cc4 r se_shift +ffffffff82b98da0 r se_mask +ffffffff82b99110 r vpg_regs +ffffffff82b99188 r vpg_shift +ffffffff82b991b0 r vpg_mask +ffffffff82b99250 r afmt_regs +ffffffff82b99328 r afmt_shift +ffffffff82b9933c r afmt_mask +ffffffff82b99380 r hwseq_reg +ffffffff82b9959c r hwseq_shift +ffffffff82b9961c r hwseq_mask +ffffffff82b9a000 r bios_regs +ffffffff82b9a008 r res_cap_dcn303 +ffffffff82b9a048 r debug_defaults_drv +ffffffff82b9a1c0 r debug_defaults_diags +ffffffff82b9a340 r clk_src_regs +ffffffff82b9a3e8 r dccg_regs +ffffffff82b9a4d4 r dccg_shift +ffffffff82b9a56c r dccg_mask +ffffffff82b9a7d0 r abm_regs +ffffffff82b9a850 r abm_shift +ffffffff82b9a864 r abm_mask +ffffffff82b9a8b0 r res_create_funcs +ffffffff82b9a8e0 r res_create_maximus_funcs +ffffffff82b9a910 r plane_cap +ffffffff82b9a940 r panel_cntl_regs +ffffffff82b9a960 r panel_cntl_shift +ffffffff82b9a970 r panel_cntl_mask +ffffffff82b9a9b0 r link_enc_regs +ffffffff82b9ac40 r link_enc_aux_regs +ffffffff82b9ac60 r link_enc_hpd_regs +ffffffff82b9ac68 r le_shift +ffffffff82b9ad58 r le_mask +ffffffff82b9b110 r link_enc_feature +ffffffff82b9b120 r cs_shift +ffffffff82b9b12c r cs_mask +ffffffff82b9b154 r hubbub_reg +ffffffff82b9b2c8 r hubbub_shift +ffffffff82b9b350 r hubbub_mask +ffffffff82b9b570 r vmid_regs +ffffffff82b9b730 r vmid_shifts +ffffffff82b9b738 r vmid_masks +ffffffff82b9b760 r hubp_regs +ffffffff82b9bb78 r hubp_shift +ffffffff82b9bc74 r hubp_mask +ffffffff82b9c070 r dpp_regs +ffffffff82b9caf0 r tf_shift +ffffffff82b9cdc0 r tf_mask +ffffffff82b9d900 r opp_regs +ffffffff82b9d9b0 r opp_shift +ffffffff82b9d9e8 r opp_mask +ffffffff82b9dac0 r optc_regs +ffffffff82b9dd40 r optc_shift +ffffffff82b9de00 r optc_mask +ffffffff82b9e0fc r mpc_regs +ffffffff82b9f8e8 r mpc_shift +ffffffff82b9f9c4 r mpc_mask +ffffffff82b9fd30 r dsc_regs +ffffffff82b9feb8 r dsc_shift +ffffffff82b9ff70 r dsc_mask +ffffffff82ba0250 r dwbc30_regs +ffffffff82ba042c r dwbc30_shift +ffffffff82ba0560 r dwbc30_mask +ffffffff82ba0a30 r mcif_wb30_regs +ffffffff82ba0b2c r mcif_wb30_shift +ffffffff82ba0bd8 r mcif_wb30_mask +ffffffff82ba0e90 r aux_engine_regs +ffffffff82ba0ee0 r aux_mask +ffffffff82ba0f40 r aux_shift +ffffffff82ba0f60 r i2c_hw_regs +ffffffff82ba0fd0 r i2c_shifts +ffffffff82ba0ffc r i2c_masks +ffffffff82ba10a0 r audio_regs +ffffffff82ba11d4 r audio_shift +ffffffff82ba11ec r audio_mask +ffffffff82ba1230 r stream_enc_regs +ffffffff82ba14d8 r se_shift +ffffffff82ba15b4 r se_mask +ffffffff82ba1920 r vpg_regs +ffffffff82ba195c r vpg_shift +ffffffff82ba1984 r vpg_mask +ffffffff82ba1a20 r afmt_regs +ffffffff82ba1a8c r afmt_shift +ffffffff82ba1aa0 r afmt_mask +ffffffff82ba1ae4 r hwseq_reg +ffffffff82ba1d00 r hwseq_shift +ffffffff82ba1d80 r hwseq_mask +ffffffff82ba2000 r dccg31_funcs +ffffffff82ba3000 r dcn31_link_enc_funcs +ffffffff82ba4000 r dcn30_str_enc_funcs +ffffffff82ba5000 r hubbub31_funcs +ffffffff82ba6000 r dcn31_funcs +ffffffff82ba62c0 r dcn31_private_funcs +ffffffff82ba7000 r dcn31_link_panel_cntl_funcs +ffffffff82ba8000 r bios_regs +ffffffff82ba8008 r res_cap_dcn31 +ffffffff82ba8048 r debug_defaults_diags +ffffffff82ba81c0 r clk_src_regs +ffffffff82ba8370 r clk_src_regs_b0 +ffffffff82ba8514 r dccg_regs +ffffffff82ba8600 r dccg_shift +ffffffff82ba8698 r dccg_mask +ffffffff82ba8900 r abm_regs +ffffffff82ba8a00 r abm_shift +ffffffff82ba8a14 r abm_mask +ffffffff82ba8a60 r res_create_funcs +ffffffff82ba8a90 r res_create_maximus_funcs +ffffffff82ba8ac0 r plane_cap +ffffffff82ba8af0 r link_enc_regs +ffffffff82ba9150 r link_enc_aux_regs +ffffffff82ba91a0 r link_enc_hpd_regs +ffffffff82ba91b4 r le_shift +ffffffff82ba92a4 r le_mask +ffffffff82ba965c r link_enc_feature +ffffffff82ba966c r panel_config_defaults +ffffffff82ba96a0 r debug_defaults_drv +ffffffff82ba9818 r cs_shift +ffffffff82ba9824 r cs_mask +ffffffff82ba984c r hubbub_reg +ffffffff82ba99c0 r hubbub_shift +ffffffff82ba9a48 r hubbub_mask +ffffffff82ba9c70 r vmid_regs +ffffffff82ba9e30 r vmid_shifts +ffffffff82ba9e38 r vmid_masks +ffffffff82ba9e60 r hubp_regs +ffffffff82baa690 r hubp_shift +ffffffff82baa78c r hubp_mask +ffffffff82baab80 r dpp_regs +ffffffff82bac080 r tf_shift +ffffffff82bac350 r tf_mask +ffffffff82bace90 r opp_regs +ffffffff82bacff0 r opp_shift +ffffffff82bad028 r opp_mask +ffffffff82bad100 r optc_regs +ffffffff82bad600 r optc_shift +ffffffff82bad6c0 r optc_mask +ffffffff82bad9bc r mpc_regs +ffffffff82baf1a8 r mpc_shift +ffffffff82baf284 r mpc_mask +ffffffff82baf5f0 r dsc_regs +ffffffff82baf83c r dsc_shift +ffffffff82baf8f4 r dsc_mask +ffffffff82bafbd0 r dwbc30_regs +ffffffff82bafdac r dwbc30_shift +ffffffff82bafee0 r dwbc30_mask +ffffffff82bb03b0 r mcif_wb30_regs +ffffffff82bb04ac r mcif_wb30_shift +ffffffff82bb0558 r mcif_wb30_mask +ffffffff82bb0810 r aux_engine_regs +ffffffff82bb08d8 r aux_mask +ffffffff82bb0938 r aux_shift +ffffffff82bb0950 r i2c_hw_regs +ffffffff82bb0a68 r i2c_shifts +ffffffff82bb0a94 r i2c_masks +ffffffff82bb0b40 r audio_regs +ffffffff82bb0c74 r audio_shift +ffffffff82bb0c8c r audio_mask +ffffffff82bb0cc8 r se_shift +ffffffff82bb0da4 r se_mask +ffffffff82bb1110 r vpg_regs +ffffffff82bb1200 r vpg_shift +ffffffff82bb1228 r vpg_mask +ffffffff82bb12d0 r afmt_regs +ffffffff82bb13a8 r afmt_shift +ffffffff82bb13bc r afmt_mask +ffffffff82bb1410 r stream_enc_regs +ffffffff82bb2ab0 r hpo_dp_stream_enc_regs +ffffffff82bb2ce0 r hpo_dp_se_shift +ffffffff82bb2d08 r hpo_dp_se_mask +ffffffff82bb2db0 r apg_regs +ffffffff82bb2df0 r apg_shift +ffffffff82bb2df8 r apg_mask +ffffffff82bb2e10 r hpo_dp_link_enc_regs +ffffffff82bb2f20 r hpo_dp_le_shift +ffffffff82bb2f3c r hpo_dp_le_mask +ffffffff82bb2fa0 r hwseq_reg +ffffffff82bb31bc r hwseq_shift +ffffffff82bb323c r hwseq_mask +ffffffff82bb4000 r dccg314_funcs +ffffffff82bb5000 r dcn314_str_enc_funcs +ffffffff82bb6000 r dcn314_funcs +ffffffff82bb62c0 r dcn314_private_funcs +ffffffff82bb7000 r bios_regs +ffffffff82bb7008 r res_cap_dcn314 +ffffffff82bb7048 r debug_defaults_diags +ffffffff82bb71c0 r clk_src_regs +ffffffff82bb7364 r dccg_regs +ffffffff82bb7450 r dccg_shift +ffffffff82bb74e8 r dccg_mask +ffffffff82bb7750 r abm_regs +ffffffff82bb7850 r abm_shift +ffffffff82bb7864 r abm_mask +ffffffff82bb78b0 r res_create_funcs +ffffffff82bb78e0 r res_create_maximus_funcs +ffffffff82bb7910 r plane_cap +ffffffff82bb7940 r link_enc_regs +ffffffff82bb7fa0 r link_enc_aux_regs +ffffffff82bb7ff0 r link_enc_hpd_regs +ffffffff82bb8004 r le_shift +ffffffff82bb80f4 r le_mask +ffffffff82bb84ac r link_enc_feature +ffffffff82bb84bc r panel_config_defaults +ffffffff82bb84f0 r debug_defaults_drv +ffffffff82bb8668 r cs_shift +ffffffff82bb8674 r cs_mask +ffffffff82bb869c r hubbub_reg +ffffffff82bb8810 r hubbub_shift +ffffffff82bb8898 r hubbub_mask +ffffffff82bb8ac0 r vmid_regs +ffffffff82bb8c80 r vmid_shifts +ffffffff82bb8c88 r vmid_masks +ffffffff82bb8cb0 r hubp_regs +ffffffff82bb94e0 r hubp_shift +ffffffff82bb95dc r hubp_mask +ffffffff82bb99d0 r dpp_regs +ffffffff82bbaed0 r tf_shift +ffffffff82bbb1a0 r tf_mask +ffffffff82bbbce0 r opp_regs +ffffffff82bbbe40 r opp_shift +ffffffff82bbbe78 r opp_mask +ffffffff82bbbf50 r optc_regs +ffffffff82bbc450 r optc_shift +ffffffff82bbc510 r optc_mask +ffffffff82bbc80c r mpc_regs +ffffffff82bbdff8 r mpc_shift +ffffffff82bbe0d4 r mpc_mask +ffffffff82bbe440 r dsc_regs +ffffffff82bbe750 r dsc_shift +ffffffff82bbe808 r dsc_mask +ffffffff82bbeae0 r dwbc30_regs +ffffffff82bbecbc r dwbc30_shift +ffffffff82bbedf0 r dwbc30_mask +ffffffff82bbf2c0 r mcif_wb30_regs +ffffffff82bbf3bc r mcif_wb30_shift +ffffffff82bbf468 r mcif_wb30_mask +ffffffff82bbf720 r aux_engine_regs +ffffffff82bbf7e8 r aux_mask +ffffffff82bbf848 r aux_shift +ffffffff82bbf860 r i2c_hw_regs +ffffffff82bbf978 r i2c_shifts +ffffffff82bbf9a4 r i2c_masks +ffffffff82bbfa50 r audio_regs +ffffffff82bbfb84 r audio_shift +ffffffff82bbfb9c r audio_mask +ffffffff82bbfbe0 r stream_enc_regs +ffffffff82bc0284 r se_shift +ffffffff82bc0360 r se_mask +ffffffff82bc06d0 r vpg_regs +ffffffff82bc07c0 r vpg_shift +ffffffff82bc07e8 r vpg_mask +ffffffff82bc0890 r afmt_regs +ffffffff82bc0968 r afmt_shift +ffffffff82bc097c r afmt_mask +ffffffff82bc09d0 r hpo_dp_stream_enc_regs +ffffffff82bc0c00 r hpo_dp_se_shift +ffffffff82bc0c28 r hpo_dp_se_mask +ffffffff82bc0cd0 r apg_regs +ffffffff82bc0d10 r apg_shift +ffffffff82bc0d18 r apg_mask +ffffffff82bc0d30 r hpo_dp_link_enc_regs +ffffffff82bc0e40 r hpo_dp_le_shift +ffffffff82bc0e5c r hpo_dp_le_mask +ffffffff82bc0ec0 r hwseq_reg +ffffffff82bc10dc r hwseq_shift +ffffffff82bc115c r hwseq_mask +ffffffff82bc2000 r bios_regs +ffffffff82bc2008 r res_cap_dcn31 +ffffffff82bc2048 r debug_defaults_diags +ffffffff82bc21c0 r clk_src_regs +ffffffff82bc2364 r dccg_regs +ffffffff82bc2450 r dccg_shift +ffffffff82bc24e8 r dccg_mask +ffffffff82bc2750 r abm_regs +ffffffff82bc2850 r abm_shift +ffffffff82bc2864 r abm_mask +ffffffff82bc28b0 r res_create_funcs +ffffffff82bc28e0 r res_create_maximus_funcs +ffffffff82bc2910 r plane_cap +ffffffff82bc2940 r link_enc_regs +ffffffff82bc2fa0 r link_enc_aux_regs +ffffffff82bc2ff0 r link_enc_hpd_regs +ffffffff82bc3004 r le_shift +ffffffff82bc30f4 r le_mask +ffffffff82bc34ac r link_enc_feature +ffffffff82bc34bc r panel_config_defaults +ffffffff82bc34f0 r debug_defaults_drv +ffffffff82bc3668 r cs_shift +ffffffff82bc3674 r cs_mask +ffffffff82bc369c r hubbub_reg +ffffffff82bc3810 r hubbub_shift +ffffffff82bc3898 r hubbub_mask +ffffffff82bc3ac0 r vmid_regs +ffffffff82bc3c80 r vmid_shifts +ffffffff82bc3c88 r vmid_masks +ffffffff82bc3cb0 r hubp_regs +ffffffff82bc44e0 r hubp_shift +ffffffff82bc45dc r hubp_mask +ffffffff82bc49d0 r dpp_regs +ffffffff82bc5ed0 r tf_shift +ffffffff82bc61a0 r tf_mask +ffffffff82bc6ce0 r opp_regs +ffffffff82bc6e40 r opp_shift +ffffffff82bc6e78 r opp_mask +ffffffff82bc6f50 r optc_regs +ffffffff82bc7450 r optc_shift +ffffffff82bc7510 r optc_mask +ffffffff82bc780c r mpc_regs +ffffffff82bc8ff8 r mpc_shift +ffffffff82bc90d4 r mpc_mask +ffffffff82bc9440 r dsc_regs +ffffffff82bc968c r dsc_shift +ffffffff82bc9744 r dsc_mask +ffffffff82bc9a20 r dwbc30_regs +ffffffff82bc9bfc r dwbc30_shift +ffffffff82bc9d30 r dwbc30_mask +ffffffff82bca200 r mcif_wb30_regs +ffffffff82bca2fc r mcif_wb30_shift +ffffffff82bca3a8 r mcif_wb30_mask +ffffffff82bca660 r aux_engine_regs +ffffffff82bca728 r aux_mask +ffffffff82bca788 r aux_shift +ffffffff82bca7a0 r i2c_hw_regs +ffffffff82bca8b8 r i2c_shifts +ffffffff82bca8e4 r i2c_masks +ffffffff82bca990 r audio_regs +ffffffff82bcaac4 r audio_shift +ffffffff82bcaadc r audio_mask +ffffffff82bcab20 r stream_enc_regs +ffffffff82bcb1c4 r se_shift +ffffffff82bcb2a0 r se_mask +ffffffff82bcb610 r vpg_regs +ffffffff82bcb700 r vpg_shift +ffffffff82bcb728 r vpg_mask +ffffffff82bcb7d0 r afmt_regs +ffffffff82bcb8a8 r afmt_shift +ffffffff82bcb8bc r afmt_mask +ffffffff82bcb910 r hpo_dp_stream_enc_regs +ffffffff82bcbb40 r hpo_dp_se_shift +ffffffff82bcbb68 r hpo_dp_se_mask +ffffffff82bcbc10 r apg_regs +ffffffff82bcbc50 r apg_shift +ffffffff82bcbc58 r apg_mask +ffffffff82bcbc70 r hpo_dp_link_enc_regs +ffffffff82bcbd80 r hpo_dp_le_shift +ffffffff82bcbd9c r hpo_dp_le_mask +ffffffff82bcbe00 r hwseq_reg +ffffffff82bcc01c r hwseq_shift +ffffffff82bcc09c r hwseq_mask +ffffffff82bcd000 r bios_regs +ffffffff82bcd008 r res_cap_dcn31 +ffffffff82bcd048 r debug_defaults_diags +ffffffff82bcd1c0 r clk_src_regs +ffffffff82bcd364 r dccg_regs +ffffffff82bcd450 r dccg_shift +ffffffff82bcd4e8 r dccg_mask +ffffffff82bcd750 r abm_regs +ffffffff82bcd850 r abm_shift +ffffffff82bcd864 r abm_mask +ffffffff82bcd8b0 r res_create_funcs +ffffffff82bcd8e0 r res_create_maximus_funcs +ffffffff82bcd910 r plane_cap +ffffffff82bcd940 r link_enc_regs +ffffffff82bcdfa0 r link_enc_aux_regs +ffffffff82bcdff0 r link_enc_hpd_regs +ffffffff82bce004 r le_shift +ffffffff82bce0f4 r le_mask +ffffffff82bce4ac r link_enc_feature +ffffffff82bce4bc r panel_config_defaults +ffffffff82bce4f0 r debug_defaults_drv +ffffffff82bce668 r cs_shift +ffffffff82bce674 r cs_mask +ffffffff82bce69c r hubbub_reg +ffffffff82bce810 r hubbub_shift +ffffffff82bce898 r hubbub_mask +ffffffff82bceac0 r vmid_regs +ffffffff82bcec80 r vmid_shifts +ffffffff82bcec88 r vmid_masks +ffffffff82bcecb0 r hubp_regs +ffffffff82bcf4e0 r hubp_shift +ffffffff82bcf5dc r hubp_mask +ffffffff82bcf9d0 r dpp_regs +ffffffff82bd0ed0 r tf_shift +ffffffff82bd11a0 r tf_mask +ffffffff82bd1ce0 r opp_regs +ffffffff82bd1e40 r opp_shift +ffffffff82bd1e78 r opp_mask +ffffffff82bd1f50 r optc_regs +ffffffff82bd2450 r optc_shift +ffffffff82bd2510 r optc_mask +ffffffff82bd280c r mpc_regs +ffffffff82bd3ff8 r mpc_shift +ffffffff82bd40d4 r mpc_mask +ffffffff82bd4440 r dsc_regs +ffffffff82bd468c r dsc_shift +ffffffff82bd4744 r dsc_mask +ffffffff82bd4a20 r dwbc30_regs +ffffffff82bd4bfc r dwbc30_shift +ffffffff82bd4d30 r dwbc30_mask +ffffffff82bd5200 r mcif_wb30_regs +ffffffff82bd52fc r mcif_wb30_shift +ffffffff82bd53a8 r mcif_wb30_mask +ffffffff82bd5660 r aux_engine_regs +ffffffff82bd5728 r aux_mask +ffffffff82bd5788 r aux_shift +ffffffff82bd57a0 r i2c_hw_regs +ffffffff82bd58b8 r i2c_shifts +ffffffff82bd58e4 r i2c_masks +ffffffff82bd5990 r audio_regs +ffffffff82bd5ac4 r audio_shift +ffffffff82bd5adc r audio_mask +ffffffff82bd5b20 r stream_enc_regs +ffffffff82bd61c4 r se_shift +ffffffff82bd62a0 r se_mask +ffffffff82bd6610 r vpg_regs +ffffffff82bd6700 r vpg_shift +ffffffff82bd6728 r vpg_mask +ffffffff82bd67d0 r afmt_regs +ffffffff82bd68a8 r afmt_shift +ffffffff82bd68bc r afmt_mask +ffffffff82bd6910 r hpo_dp_stream_enc_regs +ffffffff82bd6b40 r hpo_dp_se_shift +ffffffff82bd6b68 r hpo_dp_se_mask +ffffffff82bd6c10 r apg_regs +ffffffff82bd6c50 r apg_shift +ffffffff82bd6c58 r apg_mask +ffffffff82bd6c70 r hpo_dp_link_enc_regs +ffffffff82bd6d80 r hpo_dp_le_shift +ffffffff82bd6d9c r hpo_dp_le_mask +ffffffff82bd6e00 r hwseq_reg +ffffffff82bd701c r hwseq_shift +ffffffff82bd709c r hwseq_mask +ffffffff82bd8000 r dccg32_funcs +ffffffff82bd9000 r dcn32_link_enc_funcs +ffffffff82bda000 r dcn32_str_enc_funcs +ffffffff82bdb000 r hubbub32_funcs +ffffffff82bdc000 r dcn32_funcs +ffffffff82bdc2c0 r dcn32_private_funcs +ffffffff82bdd000 R dcn32_mmhubbub_funcs +ffffffff82bde000 R dcn32_mpc_funcs +ffffffff82bdf000 r res_cap_dcn32 +ffffffff82bdf040 r debug_defaults_diags +ffffffff82bdf1b8 r dccg_shift +ffffffff82bdf250 r dccg_mask +ffffffff82bdf4ac r abm_shift +ffffffff82bdf4c0 r abm_mask +ffffffff82bdf508 r res_create_funcs +ffffffff82bdf538 r res_create_maximus_funcs +ffffffff82bdf568 r plane_cap +ffffffff82bdf594 r le_shift +ffffffff82bdf684 r le_mask +ffffffff82bdfa3c r link_enc_feature +ffffffff82bdfa50 r debug_defaults_drv +ffffffff82bdfbc8 r cs_shift +ffffffff82bdfbd4 r cs_mask +ffffffff82bdfbfc r hubbub_shift +ffffffff82bdfc84 r hubbub_mask +ffffffff82bdfea0 r vmid_shifts +ffffffff82bdfea8 r vmid_masks +ffffffff82bdfec8 r hubp_shift +ffffffff82bdffc4 r hubp_mask +ffffffff82be03b4 r tf_shift +ffffffff82be0684 r tf_mask +ffffffff82be11c4 r opp_shift +ffffffff82be11fc r opp_mask +ffffffff82be12d0 r optc_shift +ffffffff82be1390 r optc_mask +ffffffff82be168c r mpc_shift +ffffffff82be1768 r mpc_mask +ffffffff82be1ad4 r dsc_shift +ffffffff82be1b8c r dsc_mask +ffffffff82be1e64 r dwbc30_shift +ffffffff82be1f98 r dwbc30_mask +ffffffff82be2460 r mcif_wb30_shift +ffffffff82be250c r mcif_wb30_mask +ffffffff82be27b8 r aux_mask +ffffffff82be2818 r aux_shift +ffffffff82be2830 r i2c_shifts +ffffffff82be285c r i2c_masks +ffffffff82be2900 r audio_shift +ffffffff82be2918 r audio_mask +ffffffff82be2954 r se_shift +ffffffff82be2a30 r se_mask +ffffffff82be2d9c r vpg_shift +ffffffff82be2dc4 r vpg_mask +ffffffff82be2e58 r afmt_shift +ffffffff82be2e6c r afmt_mask +ffffffff82be2eb0 r hpo_dp_se_shift +ffffffff82be2ed8 r hpo_dp_se_mask +ffffffff82be2f78 r apg_shift +ffffffff82be2f80 r apg_mask +ffffffff82be2f98 r hpo_dp_le_shift +ffffffff82be2fb4 r hpo_dp_le_mask +ffffffff82be3018 r hwseq_shift +ffffffff82be3098 r hwseq_mask +ffffffff82be4000 r dcn321_link_enc_funcs +ffffffff82be5000 r res_cap_dcn321 +ffffffff82be5040 r debug_defaults_diags +ffffffff82be51b8 r dccg_shift +ffffffff82be5250 r dccg_mask +ffffffff82be54ac r abm_shift +ffffffff82be54c0 r abm_mask +ffffffff82be5508 r res_create_funcs +ffffffff82be5538 r res_create_maximus_funcs +ffffffff82be5568 r plane_cap +ffffffff82be5594 r le_shift +ffffffff82be5684 r le_mask +ffffffff82be5a3c r link_enc_feature +ffffffff82be5a50 r debug_defaults_drv +ffffffff82be5bc8 r cs_shift +ffffffff82be5bd4 r cs_mask +ffffffff82be5bfc r hubbub_shift +ffffffff82be5c84 r hubbub_mask +ffffffff82be5ea0 r vmid_shifts +ffffffff82be5ea8 r vmid_masks +ffffffff82be5ec8 r hubp_shift +ffffffff82be5fc4 r hubp_mask +ffffffff82be63b4 r tf_shift +ffffffff82be6684 r tf_mask +ffffffff82be71c4 r opp_shift +ffffffff82be71fc r opp_mask +ffffffff82be72d0 r optc_shift +ffffffff82be7390 r optc_mask +ffffffff82be768c r mpc_shift +ffffffff82be7768 r mpc_mask +ffffffff82be7ad4 r dsc_shift +ffffffff82be7b8c r dsc_mask +ffffffff82be7e64 r dwbc30_shift +ffffffff82be7f98 r dwbc30_mask +ffffffff82be8460 r mcif_wb30_shift +ffffffff82be850c r mcif_wb30_mask +ffffffff82be87b8 r aux_mask +ffffffff82be8818 r aux_shift +ffffffff82be8830 r i2c_shifts +ffffffff82be885c r i2c_masks +ffffffff82be8900 r audio_shift +ffffffff82be8918 r audio_mask +ffffffff82be8954 r se_shift +ffffffff82be8a30 r se_mask +ffffffff82be8d9c r vpg_shift +ffffffff82be8dc4 r vpg_mask +ffffffff82be8e58 r afmt_shift +ffffffff82be8e6c r afmt_mask +ffffffff82be8eb0 r hpo_dp_se_shift +ffffffff82be8ed8 r hpo_dp_se_mask +ffffffff82be8f78 r apg_shift +ffffffff82be8f80 r apg_mask +ffffffff82be8f98 r hpo_dp_le_shift +ffffffff82be8fb4 r hpo_dp_le_mask +ffffffff82be9018 r hwseq_shift +ffffffff82be9098 r hwseq_mask +ffffffff82beb000 R dcn10_soc_defaults +ffffffff82beb08c R dcn10_ip_defaults +ffffffff82bf6000 R dml20_funcs +ffffffff82bf6030 R dml20v2_funcs +ffffffff82bf6060 R dml21_funcs +ffffffff82bf6090 R dml30_funcs +ffffffff82bf60c0 R dml31_funcs +ffffffff82bf60f0 R dml314_funcs +ffffffff82bf6120 R dml32_funcs +ffffffff82bf9000 R qp_table_422_10bpc_min +ffffffff82bf9740 R qp_table_444_8bpc_max +ffffffff82bfa080 R qp_table_420_12bpc_max +ffffffff82bfa7c0 R qp_table_444_10bpc_min +ffffffff82bfb400 R qp_table_420_8bpc_max +ffffffff82bfb840 R qp_table_444_8bpc_min +ffffffff82bfc180 R qp_table_444_12bpc_min +ffffffff82bfd0c0 R qp_table_420_12bpc_min +ffffffff82bfd800 R qp_table_422_12bpc_min +ffffffff82bfe140 R qp_table_422_12bpc_max +ffffffff82bfea80 R qp_table_444_12bpc_max +ffffffff82bff9c0 R qp_table_420_8bpc_min +ffffffff82bffe00 R qp_table_422_8bpc_min +ffffffff82c00340 R qp_table_422_10bpc_max +ffffffff82c00a80 R qp_table_420_10bpc_max +ffffffff82c01040 R qp_table_420_10bpc_min +ffffffff82c01600 R qp_table_444_10bpc_max +ffffffff82c02240 R qp_table_422_8bpc_max ffffffff82c04000 r funcs ffffffff82c04050 r hpd_regs ffffffff82c041a0 r hpd_shift @@ -44954,111 +44955,111 @@ ffffffff82c081c0 r ddc_data_regs ffffffff82c083a0 r ddc_clk_regs ffffffff82c08580 r ddc_shift ffffffff82c085a8 r ddc_mask -ffffffff82c085d0 r generic_regs -ffffffff82c08640 r generic_shift -ffffffff82c08650 r generic_mask ffffffff82c09000 r funcs ffffffff82c0a000 r funcs ffffffff82c0a050 r hpd_regs ffffffff82c0a1a0 r hpd_shift ffffffff82c0a1b0 r hpd_mask -ffffffff82c0a1c0 r ddc_data_regs_dcn -ffffffff82c0a370 r ddc_clk_regs_dcn -ffffffff82c0a520 r ddc_shift -ffffffff82c0a610 r ddc_mask -ffffffff82c0a700 r generic_regs -ffffffff82c0a770 r generic_shift -ffffffff82c0a780 r generic_mask +ffffffff82c0a1c0 r ddc_data_regs +ffffffff82c0a3a0 r ddc_clk_regs +ffffffff82c0a580 r ddc_shift +ffffffff82c0a5a8 r ddc_mask +ffffffff82c0a5d0 r generic_regs +ffffffff82c0a640 r generic_shift +ffffffff82c0a650 r generic_mask ffffffff82c0b000 r funcs ffffffff82c0c000 r funcs ffffffff82c0c050 r hpd_regs -ffffffff82c0c168 r hpd_shift -ffffffff82c0c178 r hpd_mask -ffffffff82c0c190 r ddc_data_regs_dcn -ffffffff82c0c2c0 r ddc_clk_regs_dcn -ffffffff82c0c3f0 r ddc_shift -ffffffff82c0c4e0 r ddc_mask -ffffffff82c0c5d0 r generic_regs -ffffffff82c0c604 r generic_shift -ffffffff82c0c60c r generic_mask +ffffffff82c0c1a0 r hpd_shift +ffffffff82c0c1b0 r hpd_mask +ffffffff82c0c1c0 r ddc_data_regs_dcn +ffffffff82c0c370 r ddc_clk_regs_dcn +ffffffff82c0c520 r ddc_shift +ffffffff82c0c610 r ddc_mask +ffffffff82c0c700 r generic_regs +ffffffff82c0c770 r generic_shift +ffffffff82c0c780 r generic_mask ffffffff82c0d000 r funcs ffffffff82c0e000 r funcs ffffffff82c0e050 r hpd_regs -ffffffff82c0e1a0 r hpd_shift -ffffffff82c0e1b0 r hpd_mask -ffffffff82c0e1c0 r ddc_data_regs_dcn -ffffffff82c0e370 r ddc_clk_regs_dcn -ffffffff82c0e520 r ddc_shift -ffffffff82c0e610 r ddc_mask -ffffffff82c0e700 r generic_regs -ffffffff82c0e770 r generic_shift -ffffffff82c0e780 r generic_mask +ffffffff82c0e168 r hpd_shift +ffffffff82c0e178 r hpd_mask +ffffffff82c0e190 r ddc_data_regs_dcn +ffffffff82c0e2c0 r ddc_clk_regs_dcn +ffffffff82c0e3f0 r ddc_shift +ffffffff82c0e4e0 r ddc_mask +ffffffff82c0e5d0 r generic_regs +ffffffff82c0e604 r generic_shift +ffffffff82c0e60c r generic_mask ffffffff82c0f000 r funcs ffffffff82c10000 r funcs ffffffff82c10050 r hpd_regs -ffffffff82c10168 r hpd_shift -ffffffff82c10178 r hpd_mask -ffffffff82c10190 r ddc_data_regs_dcn -ffffffff82c10300 r ddc_clk_regs_dcn -ffffffff82c10470 r ddc_shift -ffffffff82c10560 r ddc_mask -ffffffff82c10650 r generic_regs -ffffffff82c106c0 r generic_shift -ffffffff82c106d0 r generic_mask +ffffffff82c101a0 r hpd_shift +ffffffff82c101b0 r hpd_mask +ffffffff82c101c0 r ddc_data_regs_dcn +ffffffff82c10370 r ddc_clk_regs_dcn +ffffffff82c10520 r ddc_shift +ffffffff82c10610 r ddc_mask +ffffffff82c10700 r generic_regs +ffffffff82c10770 r generic_shift +ffffffff82c10780 r generic_mask ffffffff82c11000 r funcs ffffffff82c12000 r funcs ffffffff82c12050 r hpd_regs ffffffff82c12168 r hpd_shift ffffffff82c12178 r hpd_mask ffffffff82c12190 r ddc_data_regs_dcn -ffffffff82c12340 r ddc_clk_regs_dcn -ffffffff82c124f0 r ddc_shift -ffffffff82c125e0 r ddc_mask -ffffffff82c126d0 r generic_regs -ffffffff82c12740 r generic_shift -ffffffff82c12750 r generic_mask +ffffffff82c12300 r ddc_clk_regs_dcn +ffffffff82c12470 r ddc_shift +ffffffff82c12560 r ddc_mask +ffffffff82c12650 r generic_regs +ffffffff82c126c0 r generic_shift +ffffffff82c126d0 r generic_mask ffffffff82c13000 r funcs ffffffff82c14000 r funcs +ffffffff82c14050 r hpd_regs +ffffffff82c14168 r hpd_shift +ffffffff82c14178 r hpd_mask +ffffffff82c14190 r ddc_data_regs_dcn +ffffffff82c14340 r ddc_clk_regs_dcn +ffffffff82c144f0 r ddc_shift +ffffffff82c145e0 r ddc_mask +ffffffff82c146d0 r generic_regs +ffffffff82c14740 r generic_shift +ffffffff82c14750 r generic_mask ffffffff82c15000 r funcs ffffffff82c16000 r funcs -ffffffff82c17000 r hdmi_14_protection -ffffffff82c17010 r dp_11_protection -ffffffff82c17020 r hdcp_i2c_offsets -ffffffff82c17050 r hdcp_dpcd_addrs -ffffffff82c18000 r irq_service_funcs_dce110 -ffffffff82c18010 r irq_source_info_dce110 -ffffffff82c192a0 r dummy_irq_info_funcs -ffffffff82c192b0 r hpd_irq_info_funcs -ffffffff82c192c0 r hpd_rx_irq_info_funcs -ffffffff82c192d0 r pflip_irq_info_funcs -ffffffff82c192e0 r vupdate_irq_info_funcs -ffffffff82c192f0 r vblank_irq_info_funcs -ffffffff82c1a000 r irq_service_funcs_dce120 -ffffffff82c1a008 r dummy_irq_info_funcs -ffffffff82c1a018 r hpd_irq_info_funcs -ffffffff82c1a028 r hpd_rx_irq_info_funcs -ffffffff82c1a038 r pflip_irq_info_funcs -ffffffff82c1a048 r vupdate_irq_info_funcs -ffffffff82c1a058 r vblank_irq_info_funcs -ffffffff82c1a070 r irq_source_info_dce120 -ffffffff82c1c000 r irq_service_funcs_dce80 +ffffffff82c17000 r funcs +ffffffff82c18000 r funcs +ffffffff82c19000 r hdmi_14_protection +ffffffff82c19010 r dp_11_protection +ffffffff82c19020 r hdcp_i2c_offsets +ffffffff82c19050 r hdcp_dpcd_addrs +ffffffff82c1a000 r irq_service_funcs_dce110 +ffffffff82c1a010 r irq_source_info_dce110 +ffffffff82c1b2a0 r dummy_irq_info_funcs +ffffffff82c1b2b0 r hpd_irq_info_funcs +ffffffff82c1b2c0 r hpd_rx_irq_info_funcs +ffffffff82c1b2d0 r pflip_irq_info_funcs +ffffffff82c1b2e0 r vupdate_irq_info_funcs +ffffffff82c1b2f0 r vblank_irq_info_funcs +ffffffff82c1c000 r irq_service_funcs_dce120 ffffffff82c1c008 r dummy_irq_info_funcs ffffffff82c1c018 r hpd_irq_info_funcs ffffffff82c1c028 r hpd_rx_irq_info_funcs ffffffff82c1c038 r pflip_irq_info_funcs ffffffff82c1c048 r vupdate_irq_info_funcs ffffffff82c1c058 r vblank_irq_info_funcs -ffffffff82c1c070 r irq_source_info_dce80 -ffffffff82c1e000 r irq_service_funcs_dcn10 +ffffffff82c1c070 r irq_source_info_dce120 +ffffffff82c1e000 r irq_service_funcs_dce80 ffffffff82c1e008 r dummy_irq_info_funcs ffffffff82c1e018 r hpd_irq_info_funcs ffffffff82c1e028 r hpd_rx_irq_info_funcs ffffffff82c1e038 r pflip_irq_info_funcs -ffffffff82c1e048 r vupdate_no_lock_irq_info_funcs +ffffffff82c1e048 r vupdate_irq_info_funcs ffffffff82c1e058 r vblank_irq_info_funcs -ffffffff82c1e068 r vline0_irq_info_funcs -ffffffff82c1e080 r irq_source_info_dcn10 -ffffffff82c20000 r irq_service_funcs_dcn20 +ffffffff82c1e070 r irq_source_info_dce80 +ffffffff82c20000 r irq_service_funcs_dcn10 ffffffff82c20008 r dummy_irq_info_funcs ffffffff82c20018 r hpd_irq_info_funcs ffffffff82c20028 r hpd_rx_irq_info_funcs @@ -45066,8 +45067,8 @@ ffffffff82c20038 r pflip_irq_info_funcs ffffffff82c20048 r vupdate_no_lock_irq_info_funcs ffffffff82c20058 r vblank_irq_info_funcs ffffffff82c20068 r vline0_irq_info_funcs -ffffffff82c20080 r irq_source_info_dcn20 -ffffffff82c22000 r irq_service_funcs_dcn201 +ffffffff82c20080 r irq_source_info_dcn10 +ffffffff82c22000 r irq_service_funcs_dcn20 ffffffff82c22008 r dummy_irq_info_funcs ffffffff82c22018 r hpd_irq_info_funcs ffffffff82c22028 r hpd_rx_irq_info_funcs @@ -45075,19 +45076,18 @@ ffffffff82c22038 r pflip_irq_info_funcs ffffffff82c22048 r vupdate_no_lock_irq_info_funcs ffffffff82c22058 r vblank_irq_info_funcs ffffffff82c22068 r vline0_irq_info_funcs -ffffffff82c22080 r irq_source_info_dcn201 -ffffffff82c24000 r irq_source_info_dcn21 -ffffffff82c25290 r irq_service_funcs_dcn21 -ffffffff82c25298 r dummy_irq_info_funcs -ffffffff82c252a8 r hpd_irq_info_funcs -ffffffff82c252b8 r hpd_rx_irq_info_funcs -ffffffff82c252c8 r pflip_irq_info_funcs -ffffffff82c252d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c252e8 r vblank_irq_info_funcs -ffffffff82c252f8 r vline0_irq_info_funcs -ffffffff82c25308 r dmub_outbox_irq_info_funcs -ffffffff82c26000 r irq_source_info_dcn30 -ffffffff82c27290 r irq_service_funcs_dcn30 +ffffffff82c22080 r irq_source_info_dcn20 +ffffffff82c24000 r irq_service_funcs_dcn201 +ffffffff82c24008 r dummy_irq_info_funcs +ffffffff82c24018 r hpd_irq_info_funcs +ffffffff82c24028 r hpd_rx_irq_info_funcs +ffffffff82c24038 r pflip_irq_info_funcs +ffffffff82c24048 r vupdate_no_lock_irq_info_funcs +ffffffff82c24058 r vblank_irq_info_funcs +ffffffff82c24068 r vline0_irq_info_funcs +ffffffff82c24080 r irq_source_info_dcn201 +ffffffff82c26000 r irq_source_info_dcn21 +ffffffff82c27290 r irq_service_funcs_dcn21 ffffffff82c27298 r dummy_irq_info_funcs ffffffff82c272a8 r hpd_irq_info_funcs ffffffff82c272b8 r hpd_rx_irq_info_funcs @@ -45095,9 +45095,9 @@ ffffffff82c272c8 r pflip_irq_info_funcs ffffffff82c272d8 r vupdate_no_lock_irq_info_funcs ffffffff82c272e8 r vblank_irq_info_funcs ffffffff82c272f8 r vline0_irq_info_funcs -ffffffff82c27308 r dmub_trace_irq_info_funcs -ffffffff82c28000 r irq_source_info_dcn302 -ffffffff82c29290 r irq_service_funcs_dcn302 +ffffffff82c27308 r dmub_outbox_irq_info_funcs +ffffffff82c28000 r irq_source_info_dcn30 +ffffffff82c29290 r irq_service_funcs_dcn30 ffffffff82c29298 r dummy_irq_info_funcs ffffffff82c292a8 r hpd_irq_info_funcs ffffffff82c292b8 r hpd_rx_irq_info_funcs @@ -45106,27 +45106,27 @@ ffffffff82c292d8 r vupdate_no_lock_irq_info_funcs ffffffff82c292e8 r vblank_irq_info_funcs ffffffff82c292f8 r vline0_irq_info_funcs ffffffff82c29308 r dmub_trace_irq_info_funcs -ffffffff82c2a000 r irq_service_funcs_dcn303 -ffffffff82c2a008 r dummy_irq_info_funcs -ffffffff82c2a018 r hpd_irq_info_funcs -ffffffff82c2a028 r hpd_rx_irq_info_funcs -ffffffff82c2a038 r pflip_irq_info_funcs -ffffffff82c2a048 r vupdate_no_lock_irq_info_funcs -ffffffff82c2a058 r vblank_irq_info_funcs -ffffffff82c2a068 r vline0_irq_info_funcs -ffffffff82c2a080 r irq_source_info_dcn303 -ffffffff82c2c000 r irq_source_info_dcn31 -ffffffff82c2d290 r irq_service_funcs_dcn31 -ffffffff82c2d298 r dummy_irq_info_funcs -ffffffff82c2d2a8 r hpd_irq_info_funcs -ffffffff82c2d2b8 r hpd_rx_irq_info_funcs -ffffffff82c2d2c8 r pflip_irq_info_funcs -ffffffff82c2d2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c2d2e8 r vblank_irq_info_funcs -ffffffff82c2d2f8 r vline0_irq_info_funcs -ffffffff82c2d308 r outbox_irq_info_funcs -ffffffff82c2e000 r irq_source_info_dcn314 -ffffffff82c2f290 r irq_service_funcs_dcn314 +ffffffff82c2a000 r irq_source_info_dcn302 +ffffffff82c2b290 r irq_service_funcs_dcn302 +ffffffff82c2b298 r dummy_irq_info_funcs +ffffffff82c2b2a8 r hpd_irq_info_funcs +ffffffff82c2b2b8 r hpd_rx_irq_info_funcs +ffffffff82c2b2c8 r pflip_irq_info_funcs +ffffffff82c2b2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c2b2e8 r vblank_irq_info_funcs +ffffffff82c2b2f8 r vline0_irq_info_funcs +ffffffff82c2b308 r dmub_trace_irq_info_funcs +ffffffff82c2c000 r irq_service_funcs_dcn303 +ffffffff82c2c008 r dummy_irq_info_funcs +ffffffff82c2c018 r hpd_irq_info_funcs +ffffffff82c2c028 r hpd_rx_irq_info_funcs +ffffffff82c2c038 r pflip_irq_info_funcs +ffffffff82c2c048 r vupdate_no_lock_irq_info_funcs +ffffffff82c2c058 r vblank_irq_info_funcs +ffffffff82c2c068 r vline0_irq_info_funcs +ffffffff82c2c080 r irq_source_info_dcn303 +ffffffff82c2e000 r irq_source_info_dcn31 +ffffffff82c2f290 r irq_service_funcs_dcn31 ffffffff82c2f298 r dummy_irq_info_funcs ffffffff82c2f2a8 r hpd_irq_info_funcs ffffffff82c2f2b8 r hpd_rx_irq_info_funcs @@ -45135,8 +45135,8 @@ ffffffff82c2f2d8 r vupdate_no_lock_irq_info_funcs ffffffff82c2f2e8 r vblank_irq_info_funcs ffffffff82c2f2f8 r vline0_irq_info_funcs ffffffff82c2f308 r outbox_irq_info_funcs -ffffffff82c30000 r irq_source_info_dcn315 -ffffffff82c31290 r irq_service_funcs_dcn315 +ffffffff82c30000 r irq_source_info_dcn314 +ffffffff82c31290 r irq_service_funcs_dcn314 ffffffff82c31298 r dummy_irq_info_funcs ffffffff82c312a8 r hpd_irq_info_funcs ffffffff82c312b8 r hpd_rx_irq_info_funcs @@ -45145,8 +45145,8 @@ ffffffff82c312d8 r vupdate_no_lock_irq_info_funcs ffffffff82c312e8 r vblank_irq_info_funcs ffffffff82c312f8 r vline0_irq_info_funcs ffffffff82c31308 r outbox_irq_info_funcs -ffffffff82c32000 r irq_source_info_dcn32 -ffffffff82c33290 r irq_service_funcs_dcn32 +ffffffff82c32000 r irq_source_info_dcn315 +ffffffff82c33290 r irq_service_funcs_dcn315 ffffffff82c33298 r dummy_irq_info_funcs ffffffff82c332a8 r hpd_irq_info_funcs ffffffff82c332b8 r hpd_rx_irq_info_funcs @@ -45155,9088 +45155,9067 @@ ffffffff82c332d8 r vupdate_no_lock_irq_info_funcs ffffffff82c332e8 r vblank_irq_info_funcs ffffffff82c332f8 r vline0_irq_info_funcs ffffffff82c33308 r outbox_irq_info_funcs -ffffffff82c34000 r dio_link_hwss -ffffffff82c35000 r dpia_link_hwss -ffffffff82c36000 r hpo_dp_link_hwss -ffffffff82c37000 r virtual_lnk_enc_funcs -ffffffff82c38000 r virtual_link_hwss -ffffffff82c39000 r virtual_str_enc_funcs -ffffffff82c3a000 R dmub_srv_dcn20_regs -ffffffff82c3b000 R dmub_srv_dcn21_regs -ffffffff82c3c000 R dmub_srv_dcn30_regs -ffffffff82c3d000 R dmub_srv_dcn301_regs -ffffffff82c3e000 R dmub_srv_dcn302_regs -ffffffff82c3f000 R dmub_srv_dcn303_regs -ffffffff82c40000 R dmub_srv_dcn31_regs -ffffffff82c41000 R dmub_srv_dcn315_regs -ffffffff82c42000 R dmub_srv_dcn316_regs -ffffffff82c43000 R dmub_srv_dcn32_regs -ffffffff82c44000 r numerator01 -ffffffff82c44020 r numerator02 -ffffffff82c44040 r numerator04 -ffffffff82c44060 r numerator05 -ffffffff82c46000 r abm_settings -ffffffff82c46010 r abm_settings_config0 -ffffffff82c46050 r abm_settings_config1 -ffffffff82c46088 r min_reduction_table_v_2_2 -ffffffff82c46095 r max_reduction_table_v_2_2 -ffffffff82c460a2 r min_reduction_table -ffffffff82c460af r max_reduction_table -ffffffff82c47000 R amdgpu_pp_profile_name -ffffffff82c48000 r pp_lib_thermal_controller_names -ffffffff82c49000 r pp_ip_funcs -ffffffff82c490a0 R pp_smu_ip_block -ffffffff82c490b8 r pp_dpm_funcs -ffffffff82c4a000 r gpio_tbl -ffffffff82c4a0f0 r enable_fb_req_rej_tbl -ffffffff82c4a140 r use_bclk_tbl -ffffffff82c4a310 r turn_off_plls_tbl -ffffffff82c4a640 r enter_baco_tbl -ffffffff82c4a730 r exit_baco_tbl -ffffffff82c4a850 r clean_baco_tbl -ffffffff82c4b000 r gpio_tbl -ffffffff82c4b0f0 r enable_fb_req_rej_tbl -ffffffff82c4b140 r use_bclk_tbl -ffffffff82c4b2e0 r turn_off_plls_tbl -ffffffff82c4b370 r clk_req_b_tbl -ffffffff82c4b490 r enter_baco_tbl -ffffffff82c4b5b0 r exit_baco_tbl -ffffffff82c4b6d0 r clean_baco_tbl +ffffffff82c34000 r irq_source_info_dcn32 +ffffffff82c35290 r irq_service_funcs_dcn32 +ffffffff82c35298 r dummy_irq_info_funcs +ffffffff82c352a8 r hpd_irq_info_funcs +ffffffff82c352b8 r hpd_rx_irq_info_funcs +ffffffff82c352c8 r pflip_irq_info_funcs +ffffffff82c352d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c352e8 r vblank_irq_info_funcs +ffffffff82c352f8 r vline0_irq_info_funcs +ffffffff82c35308 r outbox_irq_info_funcs +ffffffff82c36000 r dio_link_hwss +ffffffff82c37000 r dpia_link_hwss +ffffffff82c38000 r hpo_dp_link_hwss +ffffffff82c39000 r virtual_lnk_enc_funcs +ffffffff82c3a000 r virtual_link_hwss +ffffffff82c3b000 r virtual_str_enc_funcs +ffffffff82c3c000 R dmub_srv_dcn20_regs +ffffffff82c3d000 R dmub_srv_dcn21_regs +ffffffff82c3e000 R dmub_srv_dcn30_regs +ffffffff82c3f000 R dmub_srv_dcn301_regs +ffffffff82c40000 R dmub_srv_dcn302_regs +ffffffff82c41000 R dmub_srv_dcn303_regs +ffffffff82c42000 R dmub_srv_dcn31_regs +ffffffff82c43000 R dmub_srv_dcn315_regs +ffffffff82c44000 R dmub_srv_dcn316_regs +ffffffff82c45000 R dmub_srv_dcn32_regs +ffffffff82c46000 r numerator01 +ffffffff82c46020 r numerator02 +ffffffff82c46040 r numerator04 +ffffffff82c46060 r numerator05 +ffffffff82c48000 r abm_settings +ffffffff82c48010 r abm_settings_config0 +ffffffff82c48050 r abm_settings_config1 +ffffffff82c48088 r min_reduction_table_v_2_2 +ffffffff82c48095 r max_reduction_table_v_2_2 +ffffffff82c480a2 r min_reduction_table +ffffffff82c480af r max_reduction_table +ffffffff82c49000 R amdgpu_pp_profile_name +ffffffff82c4a000 r pp_lib_thermal_controller_names +ffffffff82c4b000 r pp_ip_funcs +ffffffff82c4b0a0 R pp_smu_ip_block +ffffffff82c4b0b8 r pp_dpm_funcs ffffffff82c4c000 r gpio_tbl ffffffff82c4c0f0 r enable_fb_req_rej_tbl -ffffffff82c4c140 r use_bclk_tbl_vg -ffffffff82c4c200 r turn_off_plls_tbl_vg -ffffffff82c4c350 r use_bclk_tbl -ffffffff82c4c440 r turn_off_plls_tbl -ffffffff82c4c5f0 r clk_req_b_tbl -ffffffff82c4c710 r enter_baco_tbl -ffffffff82c4c830 r exit_baco_tbl -ffffffff82c4c950 r clean_baco_tbl -ffffffff82c4d000 r vega10_fuses_default -ffffffff82c5c000 r pp_r600_encode_lanes -ffffffff82c5d000 R pptable_v1_0_funcs -ffffffff82c5e000 R pptable_funcs -ffffffff82c5e020 r soft_dummy_pp_table -ffffffff82c5f000 r smu10_hwmgr_funcs -ffffffff82c60000 r smu7_hwmgr_funcs -ffffffff82c602f8 r smu7_irq_funcs -ffffffff82c60310 r SMU7ThermalPolicy -ffffffff82c61000 r GCCACConfig_Polaris10 -ffffffff82c611b0 r DIDTConfig_Polaris10 -ffffffff82c61a50 r GCCACConfig_Polaris11 -ffffffff82c61c00 r DIDTConfig_Polaris11_Kicker -ffffffff82c624a0 r DIDTConfig_Polaris11 -ffffffff82c62d40 r DIDTConfig_Polaris12 -ffffffff82c635e0 r GCCACConfig_VegaM -ffffffff82c63790 r DIDTConfig_VegaM -ffffffff82c65000 r smu8_hwmgr_funcs -ffffffff82c652f0 r SMU7ThermalPolicy -ffffffff82c66000 r smu9_irq_funcs -ffffffff82c67000 r gpio_tbl_iceland -ffffffff82c67060 r gpio_tbl -ffffffff82c67150 r enable_fb_req_rej_tbl -ffffffff82c671a0 r use_bclk_tbl -ffffffff82c67370 r turn_off_plls_tbl -ffffffff82c67610 r enter_baco_tbl -ffffffff82c67730 r exit_baco_tbl_iceland -ffffffff82c67870 r clean_baco_tbl_iceland -ffffffff82c67890 r exit_baco_tbl -ffffffff82c679b0 r clean_baco_tbl -ffffffff82c68000 r pre_baco_tbl -ffffffff82c68090 r enter_baco_tbl -ffffffff82c682b0 r exit_baco_tbl -ffffffff82c68520 r clean_baco_tbl -ffffffff82c69000 r vega10_hwmgr_funcs -ffffffff82c692f0 r channel_number -ffffffff82c69320 r SMU7ThermalWithDelayPolicy -ffffffff82c6a000 r SEDiDtStallCtrlConfig_vega10 -ffffffff82c6a110 r SEDiDtStallPatternConfig_vega10 -ffffffff82c6a2e0 r SEDiDtWeightConfig_Vega10 -ffffffff82c6a3b0 r SEDiDtCtrl1Config_Vega10 -ffffffff82c6a440 r SEDiDtCtrl2Config_Vega10 -ffffffff82c6a510 r SEDiDtCtrl3Config_vega10 -ffffffff82c6a820 r SEDiDtTuningCtrlConfig_Vega10 -ffffffff82c6a8b0 r SELCacConfig_Vega10 -ffffffff82c6aa40 r SEDiDtCtrl0Config_Vega10 -ffffffff82c6ad10 r AvfsPSMInitConfig_vega10 -ffffffff82c6ad90 r SEEDCStallPatternConfig_Vega10 -ffffffff82c6aea0 r SEEDCStallDelayConfig_Vega10 -ffffffff82c6af80 r SEEDCCtrlConfig_Vega10 -ffffffff82c6b040 r PSMSEEDCStallPatternConfig_Vega10 -ffffffff82c6b0c0 r PSMSEEDCStallDelayConfig_Vega10 -ffffffff82c6b1d0 r PSMSEEDCCtrlResetConfig_Vega10 -ffffffff82c6b290 r PSMSEEDCCtrlConfig_Vega10 -ffffffff82c6b350 r SEEDCForceStallPatternConfig_Vega10 -ffffffff82c6b3e0 r SEEDCCtrlForceStallConfig_Vega10 -ffffffff82c6c000 R vega10_pptable_funcs -ffffffff82c6d000 r pre_baco_tbl -ffffffff82c6d090 r enter_baco_tbl -ffffffff82c6d2b0 r exit_baco_tbl -ffffffff82c6d520 r clean_baco_tbl -ffffffff82c6e000 r vega12_hwmgr_funcs -ffffffff82c6e2f0 r SMU7ThermalWithDelayPolicy -ffffffff82c6e340 r link_width -ffffffff82c6f000 R vega12_pptable_funcs -ffffffff82c70000 r clean_baco_tbl -ffffffff82c71000 r vega20_hwmgr_funcs -ffffffff82c712f0 r SMU7ThermalWithDelayPolicy -ffffffff82c71340 r link_width -ffffffff82c72000 R vega20_pptable_funcs -ffffffff82c73000 R ci_smu_funcs -ffffffff82c730e0 r defaults_hawaii_pro -ffffffff82c7312c r defaults_hawaii_xt -ffffffff82c73178 r defaults_saturn_xt -ffffffff82c731c4 r defaults_bonaire_xt -ffffffff82c73210 r ci_program_jump_on_start.data -ffffffff82c74000 R fiji_smu_funcs -ffffffff82c740e0 r avfs_graphics_level -ffffffff82c74240 r fiji_power_tune_data_set_array -ffffffff82c74246 r fiji_clock_stretch_amount_conversion -ffffffff82c74260 r fiji_clock_stretcher_ddt_table -ffffffff82c75000 R iceland_smu_funcs -ffffffff82c750e0 r defaults_icelandxt -ffffffff82c7512c r defaults_icelandpro -ffffffff82c75178 r defaults_iceland -ffffffff82c76000 R polaris10_smu_funcs -ffffffff82c760e0 r avfs_graphics_level_polaris10 -ffffffff82c762a0 r avfs_memory_level_polaris10 -ffffffff82c762c0 r polaris10_power_tune_data_set_array -ffffffff82c76310 r Range_Table -ffffffff82c77000 R smu10_smu_funcs -ffffffff82c78000 r smu7_program_jump_on_start.data -ffffffff82c78010 r pwr_virus_table_pre -ffffffff82c78680 r pwr_virus_table_post -ffffffff82c78f80 r pwr_virus_section1 -ffffffff82c79610 r pwr_virus_section2 -ffffffff82c79660 r pwr_virus_section3 -ffffffff82c80ab0 r pwr_virus_section4 -ffffffff82c80e80 r pwr_virus_section5 -ffffffff82c81490 r pwr_virus_section6 -ffffffff82c83000 R smu8_smu_funcs -ffffffff82c84000 R tonga_smu_funcs -ffffffff82c840e0 r tonga_power_tune_data_set_array -ffffffff82c8412c r tonga_clock_stretch_amount_conversion -ffffffff82c84140 r tonga_clock_stretcher_ddt_table -ffffffff82c85000 R vega10_smu_funcs -ffffffff82c86000 R vega12_smu_funcs -ffffffff82c87000 R vega20_smu_funcs -ffffffff82c88000 R vegam_smu_funcs -ffffffff82c880e0 r vegam_power_tune_data_set_array -ffffffff82c88130 r Range_Table -ffffffff82c89000 R smu_ip_funcs -ffffffff82c890a0 R smu_v11_0_ip_block -ffffffff82c890b8 R smu_v12_0_ip_block -ffffffff82c890d0 R smu_v13_0_ip_block -ffffffff82c890e8 r swsmu_pm_funcs -ffffffff82c8a000 r arcturus_table_map -ffffffff82c8a080 r arcturus_pwr_src_map -ffffffff82c8a090 r arcturus_workload_map -ffffffff82c8a0d0 r arcturus_ppt_funcs -ffffffff82c8a4a0 r smu11_thermal_policy -ffffffff82c8a4f0 r arcturus_i2c_algo -ffffffff82c8a500 r arcturus_i2c_control_quirks -ffffffff82c8a510 r arcturus_throttler_map -ffffffff82c8a530 r arcturus_message_map -ffffffff82c8af80 r arcturus_clk_map -ffffffff82c8b040 r arcturus_feature_mask_map -ffffffff82c8c000 r cyan_skillfish_ppt_funcs -ffffffff82c8d000 r navi10_ppt_funcs -ffffffff82c8d3d0 r smu11_thermal_policy -ffffffff82c8d420 r navi10_i2c_algo -ffffffff82c8d430 r navi10_i2c_control_quirks -ffffffff82c8d440 r navi1x_throttler_map -ffffffff82c8d460 r NoDbiPrbs7 -ffffffff82c8e460 r DbiPrbs7 -ffffffff82c90000 r sienna_cichlid_ppt_funcs -ffffffff82c903d0 r smu11_thermal_policy -ffffffff82c90420 r sienna_cichlid_i2c_algo -ffffffff82c90430 r sienna_cichlid_i2c_control_quirks -ffffffff82c90440 r sienna_cichlid_throttler_map -ffffffff82c91000 r smu_v11_0_irq_funcs -ffffffff82c91010 r link_width -ffffffff82c92000 r vangogh_ppt_funcs -ffffffff82c923d0 r vangogh_throttler_map -ffffffff82c93000 r renoir_ppt_funcs -ffffffff82c933d0 r renoir_throttler_map -ffffffff82c94000 r aldebaran_clk_map -ffffffff82c940c0 r aldebaran_table_map -ffffffff82c94140 r aldebaran_ppt_funcs -ffffffff82c94510 r smu13_thermal_policy -ffffffff82c94560 r aldebaran_i2c_algo -ffffffff82c94570 r aldebaran_i2c_control_quirks -ffffffff82c94580 r aldebaran_throttler_map -ffffffff82c945a0 r aldebaran_message_map -ffffffff82c94ff0 r aldebaran_feature_mask_map -ffffffff82c96000 r smu_v13_0_irq_funcs -ffffffff82c96010 r link_width -ffffffff82c97000 r smu_v13_0_0_ppt_funcs -ffffffff82c973d0 r smu13_thermal_policy -ffffffff82c97420 r smu_v13_0_0_i2c_algo -ffffffff82c97430 r smu_v13_0_0_i2c_control_quirks -ffffffff82c97440 r smu_v13_0_0_throttler_map -ffffffff82c98000 r smu_v13_0_4_ppt_funcs -ffffffff82c99000 r smu_v13_0_5_ppt_funcs -ffffffff82c9a000 r smu_v13_0_7_ppt_funcs -ffffffff82c9a3d0 r smu13_thermal_policy -ffffffff82c9a420 r smu_v13_0_7_throttler_map -ffffffff82c9b000 r yellow_carp_ppt_funcs -ffffffff82c9c000 r __smu_message_names -ffffffff82c9d000 R pchb_ca -ffffffff82c9e000 R amas_ca -ffffffff82c9e028 R amas_devices -ffffffff82c9e040 r amas_feature -ffffffff82c9f000 R cardslot_ca -ffffffff82ca0000 R cardbus_ca -ffffffff82ca1000 R com_cardbus_ca -ffffffff82ca2000 R xl_cardbus_ca -ffffffff82ca2030 R xl_cardbus_products -ffffffff82ca3000 R dc_cardbus_ca -ffffffff82ca3030 R dc_cardbus_devices -ffffffff82ca4000 R fxp_cardbus_ca -ffffffff82ca4028 R fxp_cardbus_devices -ffffffff82ca5000 R rl_cardbus_devices -ffffffff82ca5028 R rl_cardbus_ca -ffffffff82ca6000 R re_cardbus_ca -ffffffff82ca6028 R re_cardbus_devices -ffffffff82ca7000 R ath_cardbus_ca -ffffffff82ca8000 R athn_cardbus_ca -ffffffff82ca8030 r athn_cardbus_devices -ffffffff82ca9000 R atw_cardbus_ca -ffffffff82ca9028 R atw_cardbus_devices -ffffffff82caa000 R rtw_cardbus_ca -ffffffff82caa028 R rtw_cardbus_devices -ffffffff82cab000 R ral_cardbus_ca -ffffffff82cab030 r ral_cardbus_devices -ffffffff82cac000 R acx_cardbus_ca -ffffffff82cac028 r acx_cardbus_devices -ffffffff82cad000 R pgt_cardbus_ca -ffffffff82cad028 R pgt_cardbus_devices -ffffffff82cae000 R ehci_cardbus_ca -ffffffff82caf000 R ohci_cardbus_ca -ffffffff82cb0000 R uhci_cardbus_ca -ffffffff82cb1000 R malo_cardbus_ca -ffffffff82cb1028 r malo_cardbus_devices -ffffffff82cb2000 R bwi_cardbus_ca -ffffffff82cb2030 r bwi_cardbus_devices -ffffffff82cb3000 R pcmcia_ca -ffffffff82cb4000 r pcmcia_parse_cis_tuple.init_cfe -ffffffff82cb5000 r pcmcia_cis_quirks -ffffffff82cb6000 R ep_pcmcia_ca -ffffffff82cb7000 R ne_pcmcia_ca -ffffffff82cb7030 R ne2000devs -ffffffff82cb9000 R aic_pcmcia_ca -ffffffff82cba000 R com_pcmcia_ca -ffffffff82cbb000 R wdc_pcmcia_ca -ffffffff82cbc000 R sm_pcmcia_ca -ffffffff82cbd000 R xe_pcmcia_ca -ffffffff82cbe000 R wi_pcmcia_ca -ffffffff82cbe030 r wi_pcmcia_products -ffffffff82cbf000 R malo_pcmcia_ca -ffffffff82cc0000 R an_pcmcia_ca -ffffffff82cc1000 R pcib_ca -ffffffff82cc2000 R amdpcib_ca -ffffffff82cc2028 R amdpcib_devices -ffffffff82cc3000 R tcpcib_ca -ffffffff82cc3028 R tcpcib_devices -ffffffff82cc4000 R aapic_ca -ffffffff82cc5000 R hme_pci_ca -ffffffff82cc5028 r hme_promhdr -ffffffff82cc502a r hme_promdat -ffffffff82cc6000 R isa_ca -ffffffff82cc7000 R isadma_ca -ffffffff82cc8000 R fdc_ca -ffffffff82cc9000 R fd_ca -ffffffff82cca000 R com_isa_ca -ffffffff82ccb000 R pckbc_isa_ca -ffffffff82ccc000 R vga_isa_ca -ffffffff82ccd000 R wdc_isa_ca -ffffffff82cce000 R mpu_midi_hw_if -ffffffff82ccf000 R mpu_isa_ca -ffffffff82cd0000 R pcppi_ca -ffffffff82cd1000 R spkr_ca -ffffffff82cd1030 r pitchtab -ffffffff82cd2000 R lpt_isa_ca -ffffffff82cd3000 R wbsio_ca -ffffffff82cd4000 R schsio_ca -ffffffff82cd5000 R lm_isa_ca -ffffffff82cd5028 R lm_wbsio_ca -ffffffff82cd6000 R it_sensors -ffffffff82cd6110 R it_vrfact -ffffffff82cd6140 R it_fan_regs -ffffffff82cd6160 R it_fan_ext_regs -ffffffff82cd6178 R it_ca -ffffffff82cd7000 R abitkv_sensors -ffffffff82cd7200 R abitaa_sensors -ffffffff82cd7480 R abitav_sensors -ffffffff82cd7700 R abitas_sensors -ffffffff82cd7980 R abitax_sensors -ffffffff82cd7bc0 R abitm4_sensors -ffffffff82cd7e80 R abitan_sensors -ffffffff82cd8120 R abital_sensors -ffffffff82cd83a0 R abitaw_sensors -ffffffff82cd8700 R abitni_sensors -ffffffff82cd89a0 R abitat_sensors -ffffffff82cd8cc0 R abitan2_sensors -ffffffff82cd8f60 R abitab_sensors -ffffffff82cd9220 R abitan3_sensors -ffffffff82cd9500 R abitaw2_sensors -ffffffff82cd9860 R abitat2_sensors -ffffffff82cd9b60 R abitab2_sensors -ffffffff82cd9ea0 R abitin_sensors -ffffffff82cda1e0 R uguru_ca -ffffffff82cdb000 R aps_ca -ffffffff82cdc000 R wsdisplay_emul_ca -ffffffff82cdc030 r charClass -ffffffff82cdd000 r usl_syncops -ffffffff82cde000 R wsevent_filtops -ffffffff82cdf000 R wskbd_ca -ffffffff82ce0000 r latin1_to_upper -ffffffff82ce1000 R wsmouse_ca -ffffffff82ce2000 R cyrillic_to_koi8 -ffffffff82ce2060 R unicode_to_latin2 -ffffffff82ce20e0 R unicode_to_latin7 -ffffffff82ce3000 R wsemul_vt100_ops -ffffffff82ce4000 r decspcgr2uni -ffffffff82ce4100 r dectech2uni -ffffffff82ce4200 r nrctable -ffffffff82ce4320 r nrcovlpos -ffffffff82ce5000 r vt100_fkeys -ffffffff82ce50c0 r vt100_pfkeys -ffffffff82ce50e0 r vt100_numpad -ffffffff82ce6000 R pckbd_ca -ffffffff82ce6028 R pckbd_accessops -ffffffff82ce6040 R pckbd_consops -ffffffff82ce6060 R pckbd_keymapdata -ffffffff82ce6070 R pckbd_xtbl -ffffffff82ce6100 R pckbd_xtbl_ext -ffffffff82ce7000 r pckbd_keydesc_us -ffffffff82ce7250 r pckbd_keydesc_de -ffffffff82ce72f0 r pckbd_keydesc_de_nodead -ffffffff82ce7310 r pckbd_keydesc_fr -ffffffff82ce73d0 r pckbd_keydesc_fr_dvorak_bepo -ffffffff82ce7510 r pckbd_keydesc_dk -ffffffff82ce75a0 r pckbd_keydesc_dk_nodead -ffffffff82ce75b0 r pckbd_keydesc_it -ffffffff82ce7640 r pckbd_keydesc_uk -ffffffff82ce76e0 r pckbd_keydesc_jp -ffffffff82ce7750 r pckbd_keydesc_sv -ffffffff82ce7780 r pckbd_keydesc_sv_nodead -ffffffff82ce7790 r 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vlan_tagh_lk -ffffffff8312e010 D vlan_cloner -ffffffff8312e040 D svlan_cloner -ffffffff8312f000 D pipex_list_mtx -ffffffff8312f010 D pipex_prune -ffffffff8312f018 D pipexoutq -ffffffff8312f050 d SHAPad2 -ffffffff83130000 D rtmap_gc -ffffffff83130018 D rt_rc -ffffffff83131000 D rt_labels -ffffffff83132000 D enc_cloner -ffffffff83133000 D gre_cloner -ffffffff83133030 D gre_list -ffffffff83133040 D mgre_cloner -ffffffff83133070 D egre_cloner -ffffffff831330a0 D nvgre_cloner -ffffffff831330d0 D eoip_cloner -ffffffff83134000 D trunk_cloner -ffffffff83135000 d aggr_cloner -ffffffff83136000 d tpmr_cloner -ffffffff83137000 D mpe_cloner -ffffffff83138000 D mpw_cloner -ffffffff83139000 D mpip_cloner -ffffffff8313a000 d bpe_cloner -ffffffff8313a030 d bpe_lock -ffffffff8313b000 D vether_cloner -ffffffff8313c000 D pair_cloner -ffffffff8313d000 d vxlan_cloner -ffffffff8313d030 d vxlan_lock -ffffffff8313d040 d vxlan_teps -ffffffff8313e000 D underload_interval -ffffffff8313e010 D wg_cloner -ffffffff8313f000 d stoeplitz_keyseed -ffffffff83140000 D ieee80211_cache_size -ffffffff83141000 D arpt_prune -ffffffff83141004 D arpt_keep -ffffffff83141008 D arpt_down -ffffffff83141010 D arpinq -ffffffff83141048 D arp_mtx -ffffffff83141058 D arp_maxtries -ffffffff83142000 D ipport_firstauto -ffffffff83142004 D ipport_lastauto -ffffffff83142008 D ipport_hifirstauto -ffffffff8314200c D ipport_hilastauto -ffffffff83143000 D divert_sendspace -ffffffff83143004 D divert_recvspace -ffffffff83143008 D divbhashsize -ffffffff83144000 D icmptstamprepl -ffffffff83144004 D icmperrppslim -ffffffff83144008 D icmp_redirtimeout -ffffffff83145000 D ipsendredirects -ffffffff83145004 D ip_defttl -ffffffff83145008 D ip_mtudisc -ffffffff8314500c D ip_mtudisc_timeout -ffffffff83145010 D ipq_mutex -ffffffff83145020 D ip_maxqueue -ffffffff83145028 D ipintrq -ffffffff83145060 d ipsend_task -ffffffff83145090 d ipsendraw_task -ffffffff83146000 D ip_mrtproto -ffffffff83146004 d sin -ffffffff83147000 D rip_sendspace -ffffffff83147008 D rip_recvspace -ffffffff83148000 D tcprexmtthresh -ffffffff83148004 D tcptv_keep_init -ffffffff83148008 D tcp_rst_ppslim -ffffffff8314800c D tcp_ackdrop_ppslim -ffffffff83148010 D tcp_syn_hash_size -ffffffff83148014 D tcp_syn_cache_limit -ffffffff83148018 D tcp_syn_bucket_limit -ffffffff8314801c D tcp_syn_use_limit -ffffffff83149000 D tcp_outflags -ffffffff8314a000 D tcp_timer_mtx -ffffffff8314a010 D tcp_mssdflt -ffffffff8314a014 D tcp_rttdflt -ffffffff8314a018 D tcp_do_rfc1323 -ffffffff8314a01c D tcp_do_sack -ffffffff8314a020 D tcp_do_rfc3390 -ffffffff8314a024 D tcp_reass_limit -ffffffff8314a028 D tcp_sackhole_limit -ffffffff8314b000 D tcp_backoff -ffffffff8314b034 D tcp_totbackoff -ffffffff8314c000 D tcp_sendspace -ffffffff8314c004 D tcp_recvspace -ffffffff8314c008 D tcp_autorcvbuf_inc -ffffffff8314d000 D udpcksum -ffffffff8314d004 D udp_sendspace -ffffffff8314d008 D udp_recvspace -ffffffff8314e000 D ipsec_flows_mtx -ffffffff8314e010 D ipsec_ids_idle -ffffffff8314e014 D ipsec_ids_next_flow -ffffffff8314e018 D ipsec_policy_head -ffffffff8314e028 D ipsp_ids_gc_timeout -ffffffff8314e070 D tdb_sadb_mtx -ffffffff8314e080 d tdb_hashmask -ffffffff8314f000 D ipo_tdb_mtx -ffffffff8314f010 D ipsec_acquire_mtx -ffffffff8314f020 D ipsec_acquire_head -ffffffff83150000 D ipsec_keep_invalid -ffffffff83150004 D ipsec_require_pfs -ffffffff83150008 D ipsec_soft_timeout -ffffffff8315000c D ipsec_exp_timeout -ffffffff83150010 D ipsec_soft_first_use -ffffffff83150014 D ipsec_exp_first_use -ffffffff83150018 D ipsec_expire_acquire -ffffffff8315001c D esp_enable -ffffffff83150020 D ah_enable -ffffffff83151000 D udpencap_enable -ffffffff83151004 D udpencap_port -ffffffff83152000 D carp_vh_rc -ffffffff83152020 D carp_sc_rc -ffffffff83152040 D carp_opts -ffffffff83152058 D carp_cloner -ffffffff83152088 d carp_send_na.mcast -ffffffff83153000 d PADDING -ffffffff83154000 d PADDING -ffffffff83155000 d weak_keys -ffffffff83156000 D swcr_id -ffffffff83157000 D window_inflate -ffffffff83157004 D window_deflate -ffffffff83158000 D ghash_update -ffffffff83159000 D mpls_defttl -ffffffff83159004 D mpls_mapttl_ip -ffffffff8315a000 D nfskevq_lock -ffffffff8315b000 D nfs_backoff -ffffffff8315b020 D nfs_ptimers -ffffffff8315c000 D desirednfsrvcache -ffffffff8315c010 D nonidempotent -ffffffff8315c070 D nfsv2_repstat -ffffffff8315d000 D nfsv2_type -ffffffff8315d030 D nfsv3_type -ffffffff8315d060 D nv2tov_type -ffffffff8315d080 D nv3tov_type -ffffffff8315d0a0 D nfsv3_procid -ffffffff8315d100 D nfsv2_procid -ffffffff8315d15c d nfsv3err_getattr -ffffffff8315d170 d nfsv3err_setattr -ffffffff8315d190 d nfsv3err_lookup -ffffffff8315d1a4 d nfsv3err_access -ffffffff8315d1b0 d nfsv3err_readlink -ffffffff8315d1d0 d nfsv3err_read -ffffffff8315d1f0 d nfsv3err_write -ffffffff8315d210 d nfsv3err_create -ffffffff8315d230 d nfsv3err_mkdir -ffffffff8315d250 d nfsv3err_symlink -ffffffff8315d270 d nfsv3err_mknod -ffffffff8315d290 d nfsv3err_remove -ffffffff8315d2b0 d nfsv3err_rmdir -ffffffff8315d2d0 d nfsv3err_rename -ffffffff8315d300 d nfsv3err_link -ffffffff8315d330 d nfsv3err_readdir -ffffffff8315d350 d nfsv3err_readdirplus -ffffffff8315d366 d nfsv3err_fsstat -ffffffff8315d372 d nfsv3err_fsinfo -ffffffff8315d37c d nfsv3err_pathconf -ffffffff8315d386 d nfsv3err_commit -ffffffff8315e000 D nfsrv3_procs -ffffffff8315e0b8 D nfs_niothreads -ffffffff8315f000 D fragtbl -ffffffff83160000 D ffs_vtbl -ffffffff83161000 D softdep_typenames -ffffffff83161070 D tickdelay -ffffffff83162000 D dirchk -ffffffff83163000 D desireddquot -ffffffff83164000 D amap_list_lock -ffffffff83165000 d uao_list_lock -ffffffff83166000 d uvmexp_countersboot_boot_cpumem -ffffffff831660c0 D uvmexp_counters -ffffffff831660c8 D vm_min_kernel_address -ffffffff83167000 D no_constraint -ffffffff83168000 d uvm_kmapent_warn_rate -ffffffff83169000 D maxslp -ffffffff8316a000 D uvmpagerops -ffffffff8316b000 D uvm_swap_data_lock -ffffffff8316b010 D swap_syscall_lock -ffffffff8316b020 D oommtx -ffffffff8316c000 D uvm_doswapencrypt -ffffffff8316d000 D gif_list -ffffffff8316d010 D gif_cloner -ffffffff8316e000 D divert6_sendspace -ffffffff8316e004 D divert6_recvspace -ffffffff8316e008 D divb6hashsize -ffffffff8316f000 d in6_get_hw_ifid.allone -ffffffff83170000 D ip6_sendredirects -ffffffff83170004 D ip6_defhlim -ffffffff83170008 D ip6_defmcasthlim -ffffffff8317000c D ip6_maxfragpackets -ffffffff83170010 D ip6_maxfrags -ffffffff83170014 D ip6_log_interval -ffffffff83170018 D ip6_hdrnestlimit -ffffffff8317001c D ip6_dad_count -ffffffff83170020 D ip6_auto_flowlabel -ffffffff83170024 D ip6_use_deprecated -ffffffff83170028 D ip6_neighborgcthresh -ffffffff8317002c D ip6_maxdynroutes -ffffffff83170030 D rip6_sendspace -ffffffff83170038 D rip6_recvspace -ffffffff83170040 D icmp6_redirtimeout -ffffffff83170044 D icmp6errppslim -ffffffff83170048 D ip6_mtudisc_timeout -ffffffff83171000 D frag6_mutex -ffffffff83172000 d icmp6_mtudisc_hiwat -ffffffff83172004 d icmp6_mtudisc_lowat -ffffffff83173000 d randomtab_20 -ffffffff83174000 D ip6intrq -ffffffff83174038 d ip6send_task -ffffffff83175000 D nd6_timer_next -ffffffff83175008 D nd6_expire_next -ffffffff83175010 D nd6_delay -ffffffff83175014 D nd6_umaxtries -ffffffff83175018 D nd6_mmaxtries -ffffffff8317501c D nd6_gctimer -ffffffff83175020 D nd6_maxndopt -ffffffff83176000 d dadq -ffffffff83177000 D pfkeyv2_mtx -ffffffff83177010 d pfkeyv2_seq -ffffffff83178000 D sadb_exts_allowed_in -ffffffff83178090 D sadb_exts_required_in -ffffffff83179000 D cold -ffffffff8317a000 D bdevsw -ffffffff8317a460 D nblkdev -ffffffff8317a470 D cdevsw -ffffffff8317c400 D nchrdev -ffffffff8317c404 D mem_no -ffffffff8317c408 D swapdev -ffffffff8317c410 D constab -ffffffff8317d000 D machine -ffffffff8317d008 D lid_action -ffffffff8317d00c D pwr_action -ffffffff8317d010 D isa_constraint -ffffffff8317d020 D dma_constraint -ffffffff8317d030 D uvm_md_constraints -ffffffff8317d048 D delay_func -ffffffff8317d050 D initclock_func -ffffffff8317d058 D bootinfo_size -ffffffff8317d05c D waittime -ffffffff8317d060 D dumpmag -ffffffff8317e000 D tsc_rdtsc -ffffffff8317e008 D tsc_timecounter -ffffffff8317e058 D tsc_is_synchronized -ffffffff8317f000 D local_apic -ffffffff8317f020 D lapic_id -ffffffff8317f080 D lapic_tpr -ffffffff8317f0a0 d lapic_ppr -ffffffff8317f100 d lapic_isr -ffffffff83180000 D warn_once -ffffffff83181000 d errata -ffffffff83182000 D cpu_ucode_intel_mtx -ffffffff83183000 D mem_owner_bios -ffffffff83183008 D mrops -ffffffff83183028 D mtrrmask -ffffffff83183030 D mtrrtomrt -ffffffff83184000 D pmap_pg_wc -ffffffff83184008 D pmaps_lock -ffffffff83184018 d pmap_maxkvaddr -ffffffff83185000 D kv_physwait -ffffffff83186000 D fpu_save_len -ffffffff83187000 D i8259_pic -ffffffff83188000 D softintr_pic -ffffffff83189000 D ipifunc -ffffffff8318a000 D setperf_mp_mutex -ffffffff8318b000 D db_Grp6 -ffffffff8318b040 D db_Grp7 -ffffffff8318b100 D db_Grp8 -ffffffff8318b140 D db_Grp9 -ffffffff8318b200 D db_GrpA -ffffffff8318b240 D db_GrpB -ffffffff8318b280 D db_GrpC -ffffffff8318b2c0 D db_inst_0f0x -ffffffff8318b440 D db_inst_0f2x -ffffffff8318b5c0 D db_inst_0f3x -ffffffff8318b740 D db_inst_0f8x -ffffffff8318b8c0 D db_inst_0f9x -ffffffff8318ba40 D db_inst_0fax -ffffffff8318bbc0 D db_inst_0fbx -ffffffff8318bd40 D db_inst_0fcx -ffffffff8318bec0 D db_inst_0f -ffffffff8318bf40 D db_Esc92 -ffffffff8318bf80 D db_Esc94 -ffffffff8318bfc0 D db_Esc95 -ffffffff8318c000 D db_Esc96 -ffffffff8318c040 D db_Esc97 -ffffffff8318c080 D db_Esca5 -ffffffff8318c0c0 D db_Escb4 -ffffffff8318c100 D db_Esce3 -ffffffff8318c140 D db_Escf4 -ffffffff8318c180 D db_Esc8 -ffffffff8318c240 D db_Esc9 -ffffffff8318c300 D db_Esca -ffffffff8318c3c0 D db_Escb -ffffffff8318c480 D db_Escc -ffffffff8318c540 D db_Escd -ffffffff8318c600 D db_Esce -ffffffff8318c6c0 D db_Escf -ffffffff8318c780 D db_Esc_inst -ffffffff8318c7c0 D db_Grp1 -ffffffff8318c800 D db_Grp2 -ffffffff8318c840 D db_Grp3 -ffffffff8318c900 D db_Grp4 -ffffffff8318c9c0 D db_Grp5 -ffffffff8318ca80 D db_inst_table -ffffffff8318e280 D db_bad_inst -ffffffff8318e2a0 D db_index_reg_16 -ffffffff8318e2e0 D db_reg -ffffffff8318e4e0 D db_seg_reg -ffffffff8318e520 D db_lengths -ffffffff8318f000 D db_regs -ffffffff8318f1e0 D db_eregs -ffffffff8318f1f0 D db_reg_args -ffffffff83190000 D timer_mutex -ffffffff83190010 d i8254_timecounter -ffffffff83191000 D spleen8x16 -ffffffff83191058 D spleen12x24 -ffffffff831910b0 D spleen16x32 -ffffffff83191108 D spleen32x64 -ffffffff83191160 d builtin_fonts -ffffffff831911e0 d wsfont_add.cookiegen -ffffffff831911f0 d spleen8x16_data -ffffffff83191ff0 d spleen12x24_data -ffffffff831949f0 d spleen16x32_data -ffffffff831981f0 d spleen32x64_data -ffffffff831a7000 D nsphy_cd -ffffffff831a8000 D nsphyter_cd -ffffffff831a9000 D gentbi_cd -ffffffff831aa000 D qsphy_cd -ffffffff831ab000 D inphy_cd -ffffffff831ac000 D iophy_cd -ffffffff831ad000 D eephy_cd -ffffffff831ae000 D exphy_cd -ffffffff831af000 D rlphy_cd -ffffffff831b0000 D lxtphy_cd -ffffffff831b1000 D luphy_cd -ffffffff831b2000 D mtdphy_cd -ffffffff831b3000 D icsphy_cd -ffffffff831b4000 D sqphy_cd -ffffffff831b5000 D tqphy_cd -ffffffff831b6000 D ukphy_cd -ffffffff831b7000 D dcphy_cd -ffffffff831b8000 D bmtphy_cd -ffffffff831b9000 D brgphy_cd -ffffffff831ba000 D xmphy_cd -ffffffff831bb000 D amphy_cd -ffffffff831bc000 D acphy_cd -ffffffff831bd000 D nsgphy_cd -ffffffff831be000 D urlphy_cd -ffffffff831bf000 D rgephy_cd -ffffffff831c0000 D ciphy_cd -ffffffff831c1000 D ipgphy_cd -ffffffff831c2000 D etphy_cd -ffffffff831c3000 D jmphy_cd -ffffffff831c4000 D atphy_cd -ffffffff831c5000 D scsi_autoconf -ffffffff831c5008 D scsibus_cd -ffffffff831c6000 D cd_cd -ffffffff831c7000 D ch_cd -ffffffff831c7020 D chquirks -ffffffff831c8000 D sd_cd -ffffffff831c9000 D st_cd -ffffffff831ca000 D uk_cd -ffffffff831cb000 D safte_cd -ffffffff831cc000 D ses_cd -ffffffff831cd000 D sym_cd -ffffffff831cd020 D sym_devices -ffffffff831cd070 D asym_devices -ffffffff831ce000 D rdac_cd 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D bktr_cd -ffffffff83208000 D em_cd -ffffffff83209000 D ixgb_cd -ffffffff8320a000 D ix_cd -ffffffff8320a020 D ixgbe_smart_speed -ffffffff8320a024 D ixgbe_enable_msix -ffffffff8320b000 D ixl_cd -ffffffff8320b020 d ixl_sff_lock -ffffffff8320c000 D xge_cd -ffffffff8320d000 D thtc_cd -ffffffff8320d020 D tht_cd -ffffffff8320d040 D tht_txt_desc -ffffffff8320d068 D tht_rxf_desc -ffffffff8320d090 D tht_rxd_desc -ffffffff8320d0b8 D tht_txf_desc -ffffffff8320e000 D myx_cd -ffffffff8320f000 D oce_cd -ffffffff83210000 D dc_devs -ffffffff83211000 D cas_cd -ffffffff83212000 D sis_cd -ffffffff83213000 D se_cd -ffffffff83214000 D cbb_cd -ffffffff83214020 D yc_chipsets -ffffffff832141b0 d pccbb_funcs -ffffffff832141e0 d pccbb_pcmcia_funcs -ffffffff83215000 D skc_cd -ffffffff83215020 D sk_cd -ffffffff83216000 D mskc_cd -ffffffff83216020 D msk_cd -ffffffff83217000 D puc_cd -ffffffff83218000 D puc_ndevs -ffffffff83219000 D iwi_cd -ffffffff8321a000 D wpi_cd -ffffffff8321b000 D iwn_cd -ffffffff8321c000 D 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SEDiDtCtrl2Config_Vega10 +ffffffff82c6c510 r SEDiDtCtrl3Config_vega10 +ffffffff82c6c820 r SEDiDtTuningCtrlConfig_Vega10 +ffffffff82c6c8b0 r SELCacConfig_Vega10 +ffffffff82c6ca40 r SEDiDtCtrl0Config_Vega10 +ffffffff82c6cd10 r AvfsPSMInitConfig_vega10 +ffffffff82c6cd90 r SEEDCStallPatternConfig_Vega10 +ffffffff82c6cea0 r SEEDCStallDelayConfig_Vega10 +ffffffff82c6cf80 r SEEDCCtrlConfig_Vega10 +ffffffff82c6d040 r PSMSEEDCStallPatternConfig_Vega10 +ffffffff82c6d0c0 r PSMSEEDCStallDelayConfig_Vega10 +ffffffff82c6d1d0 r PSMSEEDCCtrlResetConfig_Vega10 +ffffffff82c6d290 r PSMSEEDCCtrlConfig_Vega10 +ffffffff82c6d350 r SEEDCForceStallPatternConfig_Vega10 +ffffffff82c6d3e0 r SEEDCCtrlForceStallConfig_Vega10 +ffffffff82c6e000 R vega10_pptable_funcs +ffffffff82c6f000 r pre_baco_tbl +ffffffff82c6f090 r enter_baco_tbl +ffffffff82c6f2b0 r exit_baco_tbl +ffffffff82c6f520 r clean_baco_tbl +ffffffff82c70000 r vega12_hwmgr_funcs +ffffffff82c702f0 r SMU7ThermalWithDelayPolicy +ffffffff82c70340 r link_width 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+ffffffff82c8b0a0 R smu_v11_0_ip_block +ffffffff82c8b0b8 R smu_v12_0_ip_block +ffffffff82c8b0d0 R smu_v13_0_ip_block +ffffffff82c8b0e8 r swsmu_pm_funcs +ffffffff82c8c000 r arcturus_table_map +ffffffff82c8c080 r arcturus_pwr_src_map +ffffffff82c8c090 r arcturus_workload_map +ffffffff82c8c0d0 r arcturus_ppt_funcs +ffffffff82c8c4a0 r smu11_thermal_policy +ffffffff82c8c4f0 r arcturus_i2c_algo +ffffffff82c8c500 r arcturus_i2c_control_quirks +ffffffff82c8c510 r arcturus_throttler_map +ffffffff82c8c530 r arcturus_message_map +ffffffff82c8cf80 r arcturus_clk_map +ffffffff82c8d040 r arcturus_feature_mask_map +ffffffff82c8e000 r cyan_skillfish_ppt_funcs +ffffffff82c8f000 r navi10_ppt_funcs +ffffffff82c8f3d0 r smu11_thermal_policy +ffffffff82c8f420 r navi10_i2c_algo +ffffffff82c8f430 r navi10_i2c_control_quirks +ffffffff82c8f440 r navi1x_throttler_map +ffffffff82c8f460 r NoDbiPrbs7 +ffffffff82c90460 r DbiPrbs7 +ffffffff82c92000 r sienna_cichlid_ppt_funcs +ffffffff82c923d0 r smu11_thermal_policy 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smu_v13_0_0_i2c_control_quirks +ffffffff82c99440 r smu_v13_0_0_throttler_map +ffffffff82c9a000 r smu_v13_0_4_ppt_funcs +ffffffff82c9b000 r smu_v13_0_5_ppt_funcs +ffffffff82c9c000 r smu_v13_0_7_ppt_funcs +ffffffff82c9c3d0 r smu13_thermal_policy +ffffffff82c9c420 r smu_v13_0_7_throttler_map +ffffffff82c9d000 r yellow_carp_ppt_funcs +ffffffff82c9e000 r __smu_message_names +ffffffff82c9f000 R pchb_ca +ffffffff82ca0000 R amas_ca +ffffffff82ca0028 R amas_devices +ffffffff82ca0040 r amas_feature +ffffffff82ca1000 R cardslot_ca +ffffffff82ca2000 R cardbus_ca +ffffffff82ca3000 R com_cardbus_ca +ffffffff82ca4000 R xl_cardbus_ca +ffffffff82ca4030 R xl_cardbus_products +ffffffff82ca5000 R dc_cardbus_ca +ffffffff82ca5030 R dc_cardbus_devices +ffffffff82ca6000 R fxp_cardbus_ca +ffffffff82ca6028 R fxp_cardbus_devices +ffffffff82ca7000 R rl_cardbus_devices +ffffffff82ca7028 R rl_cardbus_ca +ffffffff82ca8000 R re_cardbus_ca +ffffffff82ca8028 R re_cardbus_devices +ffffffff82ca9000 R ath_cardbus_ca +ffffffff82caa000 R athn_cardbus_ca +ffffffff82caa030 r athn_cardbus_devices +ffffffff82cab000 R atw_cardbus_ca +ffffffff82cab028 R atw_cardbus_devices +ffffffff82cac000 R rtw_cardbus_ca +ffffffff82cac028 R rtw_cardbus_devices +ffffffff82cad000 R ral_cardbus_ca +ffffffff82cad030 r ral_cardbus_devices +ffffffff82cae000 R acx_cardbus_ca +ffffffff82cae028 r acx_cardbus_devices +ffffffff82caf000 R pgt_cardbus_ca +ffffffff82caf028 R pgt_cardbus_devices +ffffffff82cb0000 R ehci_cardbus_ca +ffffffff82cb1000 R ohci_cardbus_ca +ffffffff82cb2000 R uhci_cardbus_ca +ffffffff82cb3000 R malo_cardbus_ca +ffffffff82cb3028 r malo_cardbus_devices +ffffffff82cb4000 R bwi_cardbus_ca +ffffffff82cb4030 r bwi_cardbus_devices +ffffffff82cb5000 R pcmcia_ca +ffffffff82cb6000 r pcmcia_parse_cis_tuple.init_cfe +ffffffff82cb7000 r pcmcia_cis_quirks +ffffffff82cb8000 R ep_pcmcia_ca +ffffffff82cb9000 R ne_pcmcia_ca +ffffffff82cb9030 R ne2000devs +ffffffff82cbb000 R aic_pcmcia_ca +ffffffff82cbc000 R com_pcmcia_ca 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schsio_ca +ffffffff82cd7000 R lm_isa_ca +ffffffff82cd7028 R lm_wbsio_ca +ffffffff82cd8000 R it_sensors +ffffffff82cd8110 R it_vrfact +ffffffff82cd8140 R it_fan_regs +ffffffff82cd8160 R it_fan_ext_regs +ffffffff82cd8178 R it_ca +ffffffff82cd9000 R abitkv_sensors +ffffffff82cd9200 R abitaa_sensors +ffffffff82cd9480 R abitav_sensors +ffffffff82cd9700 R abitas_sensors +ffffffff82cd9980 R abitax_sensors +ffffffff82cd9bc0 R abitm4_sensors +ffffffff82cd9e80 R abitan_sensors +ffffffff82cda120 R abital_sensors +ffffffff82cda3a0 R abitaw_sensors +ffffffff82cda700 R abitni_sensors +ffffffff82cda9a0 R abitat_sensors +ffffffff82cdacc0 R abitan2_sensors +ffffffff82cdaf60 R abitab_sensors +ffffffff82cdb220 R abitan3_sensors +ffffffff82cdb500 R abitaw2_sensors +ffffffff82cdb860 R abitat2_sensors +ffffffff82cdbb60 R abitab2_sensors +ffffffff82cdbea0 R abitin_sensors +ffffffff82cdc1e0 R uguru_ca +ffffffff82cdd000 R aps_ca +ffffffff82cde000 R wsdisplay_emul_ca +ffffffff82cde030 r charClass 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pckbd_keydesc_dk_nodead +ffffffff82ce95b0 r pckbd_keydesc_it +ffffffff82ce9640 r pckbd_keydesc_uk +ffffffff82ce96e0 r pckbd_keydesc_jp +ffffffff82ce9750 r pckbd_keydesc_sv +ffffffff82ce9780 r pckbd_keydesc_sv_nodead +ffffffff82ce9790 r pckbd_keydesc_no +ffffffff82ce97c0 r pckbd_keydesc_no_nodead +ffffffff82ce97d0 r pckbd_keydesc_us_declk +ffffffff82ce9860 r pckbd_keydesc_us_dvorak +ffffffff82ce9900 r pckbd_keydesc_us_colemak +ffffffff82ce9948 r pckbd_keydesc_swapctrlcaps +ffffffff82ce9960 r pckbd_keydesc_iopener +ffffffff82ce99b0 r pckbd_keydesc_es +ffffffff82ce9a50 r pckbd_keydesc_be +ffffffff82ce9b10 r pckbd_keydesc_ru +ffffffff82ce9c80 r pckbd_keydesc_ua +ffffffff82ce9e10 r pckbd_keydesc_sg +ffffffff82ce9ec0 r pckbd_keydesc_sg_nodead +ffffffff82ce9ee0 r pckbd_keydesc_sf +ffffffff82ce9f00 r pckbd_keydesc_pt +ffffffff82ce9f90 r pckbd_keydesc_lt +ffffffff82cea070 r pckbd_keydesc_la +ffffffff82cea100 r pckbd_keydesc_br +ffffffff82cea180 r pckbd_keydesc_tr +ffffffff82cea230 r pckbd_keydesc_tr_nodead +ffffffff82cea250 r pckbd_keydesc_pl +ffffffff82cea2b0 r pckbd_keydesc_hu +ffffffff82cea3c0 r pckbd_keydesc_si +ffffffff82cea4d0 r pckbd_keydesc_cf +ffffffff82cea5a0 r pckbd_keydesc_cf_nodead +ffffffff82cea5c0 r pckbd_keydesc_lv +ffffffff82cea640 r pckbd_keydesc_nl +ffffffff82cea720 r pckbd_keydesc_nl_nodead +ffffffff82cea740 r pckbd_keydesc_is +ffffffff82cea7cc r pckbd_keydesc_is_nodead +ffffffff82cea7e0 r pckbd_keydesc_ee +ffffffff82cea890 r pckbd_keydesc_ee_nodead +ffffffff82cea8b0 R pckbd_keydesctab +ffffffff82ceb000 R pms_ca +ffffffff82ceb028 R pms_accessops +ffffffff82ceb040 R pms_sec_accessops +ffffffff82ceb060 R pms_protocols +ffffffff82ceb1e0 r alps_models +ffffffff82cec000 R skgpio_led_offset +ffffffff82cec008 R skgpio_ca +ffffffff82ced000 R hidkbd_trtab +ffffffff82ced100 r apple_fn_trans +ffffffff82ced120 r apple_tb_trans +ffffffff82ced140 r apple_mba_trans +ffffffff82cee000 r hidcc_attach_wskbd.accessops +ffffffff82cee020 r hidcc_keysyms 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uslhcom_methods +ffffffff82d15040 R uslhcom_ca +ffffffff82d15068 r uslhcom_devs +ffffffff82d16000 R ulpt_ca +ffffffff82d17000 R umass_ca +ffffffff82d17028 R umass_bbb_methods +ffffffff82d17040 R umass_cbi_methods +ffffffff82d18000 R umass_quirks +ffffffff82d19000 R umass_scsi_switch +ffffffff82d1a000 R uthum_devs +ffffffff82d1a008 R uthum_ca +ffffffff82d1a030 r uthum_sensor_type_s +ffffffff82d1b000 R ugold_devs +ffffffff82d1b010 R ugold_ca +ffffffff82d1c000 R utrh_devs +ffffffff82d1c008 R utrh_ca +ffffffff82d1d000 R uoakrh_devs +ffffffff82d1d008 R uoakrh_ca +ffffffff82d1d030 R uoakrh_methods +ffffffff82d1e000 R uoaklux_devs +ffffffff82d1e008 R uoaklux_ca +ffffffff82d1e030 R uoaklux_methods +ffffffff82d1f000 R uoakv_devs +ffffffff82d1f008 R uoakv_ca +ffffffff82d1f030 R uoakv_methods +ffffffff82d20000 R uonerng_ca +ffffffff82d21000 R urng_ca +ffffffff82d21030 r urng_devs +ffffffff82d22000 R udcf_ca +ffffffff82d22028 r udcf_devs +ffffffff82d23000 R umbg_ca +ffffffff82d24000 R uvisor_methods +ffffffff82d24040 R uvisor_ca +ffffffff82d24070 r uvisor_devs +ffffffff82d25000 R udsbr_hw_if +ffffffff82d25028 R udsbr_ca +ffffffff82d26000 R utwitch_devs +ffffffff82d26008 R utwitch_ca +ffffffff82d27000 R aue_devs +ffffffff82d271b0 R aue_ca +ffffffff82d28000 R axe_devs +ffffffff82d280d0 R axe_ca +ffffffff82d29000 R axen_devs +ffffffff82d29020 R axen_ca +ffffffff82d2a000 R smsc_ca +ffffffff82d2a030 r smsc_devs +ffffffff82d2b000 R cue_ca +ffffffff82d2c000 R kue_devs +ffffffff82d2c088 R kue_ca +ffffffff82d2d000 R cdce_devs +ffffffff82d2d048 R cdce_ca +ffffffff82d2e000 R urndis_ca +ffffffff82d2e030 R urndis_class +ffffffff82d2f000 R mos_devs +ffffffff82d2f018 R mos_ca +ffffffff82d30000 R mue_devs +ffffffff82d30020 R mue_ca +ffffffff82d31000 R udav_ca +ffffffff82d31030 r udav_devs +ffffffff82d32000 R upl_ca +ffffffff82d33000 R ugl_ca +ffffffff82d34000 R url_ca +ffffffff82d34030 r url_devs +ffffffff82d35000 R ure_devs +ffffffff82d350f0 R ure_ca +ffffffff82d36000 R uaq_devs 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umcs_devs +ffffffff82d41050 R umcs_ca +ffffffff82d42000 R uscom_methods +ffffffff82d42040 R uscom_ca +ffffffff82d42068 r uscom_devs +ffffffff82d43000 R ucrcom_methods +ffffffff82d43040 R ucrcom_ca +ffffffff82d44000 R uxrcom_methods +ffffffff82d44040 R uxrcom_ca +ffffffff82d44068 r uxrcom_devs +ffffffff82d45000 R uipaq_methods +ffffffff82d45040 R uipaq_ca +ffffffff82d45070 r uipaq_devs +ffffffff82d46000 R umsm_methods +ffffffff82d46040 R umsm_ca +ffffffff82d46070 r umsm_devs +ffffffff82d47000 R uchcom_methods +ffffffff82d47040 R uchcom_ca +ffffffff82d47068 r uchcom_devs +ffffffff82d47080 r dividers +ffffffff82d48000 R uticom_methods +ffffffff82d48040 R uticom_ca +ffffffff82d48070 r uticom_devs +ffffffff82d49000 R wi_usb_devs +ffffffff82d490f0 R wi_usb_ca +ffffffff82d4a000 R atu_ca +ffffffff82d4b000 R ural_ca +ffffffff82d4b030 r ural_devs +ffffffff82d4b0a0 r ural_rf2522_r2 +ffffffff82d4b0e0 r ural_rf2524_r2 +ffffffff82d4b120 r ural_rf2525_hi_r2 +ffffffff82d4b160 r ural_rf2525_r2 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mtw_ca +ffffffff82d4f030 r mtw_devs +ffffffff82d4f070 r rt2860_rates +ffffffff82d4f130 r mt7601_rf_chan +ffffffff82d4f1a0 r mt7601_def_bbp +ffffffff82d4f2d0 r mt7601_rf_bank0 +ffffffff82d4f330 r mt7601_rf_bank4 +ffffffff82d4f3b0 r mt7601_rf_bank5 +ffffffff82d4f430 r mt7601_def_mac +ffffffff82d50000 R zyd_ca +ffffffff82d50030 r zyd_devs +ffffffff82d501b0 r zyd_rfmd_init.phyini +ffffffff82d502e0 r zyd_rfmd_init.rfini +ffffffff82d50330 r zyd_rfmd_set_channel.rfprog +ffffffff82d503a0 r zyd_al2230_init.phyini +ffffffff82d50480 r zyd_al2230_init.rfini +ffffffff82d504e0 r zyd_al2230_init_b.phyini +ffffffff82d505d0 r zyd_al2230_init_b.rfini +ffffffff82d50620 r zyd_al2230_set_channel.rfprog +ffffffff82d506d0 r zyd_al7230B_init.phyini_1 +ffffffff82d507b0 r zyd_al7230B_init.rfini_1 +ffffffff82d507f0 r zyd_al7230B_set_channel.rfprog +ffffffff82d50860 r zyd_al7230B_set_channel.rfsc +ffffffff82d50890 r zyd_al2210_init.phyini +ffffffff82d508f0 r zyd_al2210_init.rfini +ffffffff82d50920 r zyd_al2210_set_channel.rfprog +ffffffff82d50960 r zyd_gct_init.phyini +ffffffff82d509b0 r zyd_gct_init.rfini +ffffffff82d50a50 r zyd_gct_set_channel.rfprog +ffffffff82d50a90 r zyd_maxim_set_channel.phyini +ffffffff82d50ba0 r zyd_maxim_set_channel.rfini +ffffffff82d50be0 r zyd_maxim_set_channel.rfprog +ffffffff82d50c50 r zyd_maxim2_set_channel.phyini +ffffffff82d50d70 r zyd_maxim2_set_channel.rfini +ffffffff82d50db0 r zyd_maxim2_set_channel.rfprog +ffffffff82d50e20 r zyd_rf_name.zyd_rfs +ffffffff82d50ea0 r zyd_def_phyB +ffffffff82d510d0 r zyd_def_phy +ffffffff82d52000 R upgt_ca +ffffffff82d52028 r upgt_devs_1 +ffffffff82d52030 r upgt_devs_2 +ffffffff82d53000 R urtw_ca +ffffffff82d53030 r urtw_devs +ffffffff82d53090 r urtw_ratetable +ffffffff82d530f0 r urtw_8225_gain +ffffffff82d53110 r urtw_8225_txpwr_cck_ch14 +ffffffff82d53140 r urtw_8225_txpwr_cck +ffffffff82d53170 r urtw_8225_tx_gain_cck_ofdm +ffffffff82d53176 r urtw_8225_txpwr_ofdm +ffffffff82d53180 r urtw_8225_rf_part1 +ffffffff82d53200 r urtw_8225_rxgain +ffffffff82d532c0 r urtw_8225_agc +ffffffff82d53340 r urtw_8225_rf_part2 +ffffffff82d53470 r urtw_8225_rf_part3 +ffffffff82d53550 r urtw_8225_channel +ffffffff82d5358c r urtw_8225_threshold +ffffffff82d535a0 r urtw_8225v2_gain_bg +ffffffff82d535c0 r urtw_8225v2_tx_gain_cck_ofdm +ffffffff82d535f0 r urtw_8225v2_rf_part1 +ffffffff82d53670 r urtw_8225v2_rxgain +ffffffff82d53730 r urtw_8225v2_rf_part2 +ffffffff82d53870 r urtw_8225v2_rf_part3 +ffffffff82d53970 r urtw_8187b_regtbl +ffffffff82d53a90 r urtw_8225v2_b_rf +ffffffff82d53b20 r urtw_8225v2_agc +ffffffff82d53ba0 r urtw_8225v2_ofdm +ffffffff82d54000 R urtwn_ca +ffffffff82d54030 r urtwn_devs +ffffffff82d54330 r rtl8188eu_mac +ffffffff82d544a0 r rtl8192eu_mac +ffffffff82d54640 r rtl8192cu_mac +ffffffff82d54798 r rtl8188eu_bb_prog +ffffffff82d547c0 r rtl8192eu_bb_prog +ffffffff82d547e8 r rtl8188ce_bb_prog +ffffffff82d54810 r rtl8188ru_bb_prog +ffffffff82d54838 r rtl8188cu_bb_prog +ffffffff82d54860 r rtl8192ce_bb_prog +ffffffff82d54888 r rtl8192cu_bb_prog +ffffffff82d548b0 r rtl8188eu_bb_regs +ffffffff82d54a30 r rtl8188eu_bb_vals +ffffffff82d54d30 r rtl8188eu_agc_vals +ffffffff82d54f30 r rtl8192e_bb_regs +ffffffff82d550d0 r rtl8192e_bb_vals +ffffffff82d55410 r rtl8192eu_agc_vals +ffffffff82d55610 r rtl8192ce_bb_regs +ffffffff82d55790 r rtl8188ce_bb_vals +ffffffff82d55a80 r rtl8188ce_agc_vals +ffffffff82d55d00 r rtl8188ru_bb_regs +ffffffff82d55e80 r rtl8188ru_bb_vals +ffffffff82d56180 r rtl8188ru_agc_vals +ffffffff82d56400 r rtl8188cu_bb_vals +ffffffff82d566f0 r rtl8192ce_bb_vals +ffffffff82d569e0 r rtl8192ce_agc_vals +ffffffff82d56c60 r rtl8192cu_bb_vals +ffffffff82d57000 R rsu_ca +ffffffff82d57030 r rsu_devs +ffffffff82d570c8 r rsu_devs_noht +ffffffff82d570d0 r rsu_qid2idx_4ep +ffffffff82d570da r rsu_qid2idx_6ep +ffffffff82d570e4 r rsu_qid2idx_11ep +ffffffff82d570ee r r92s_epaddr +ffffffff82d58000 R otus_ca +ffffffff82d58030 r otus_devs +ffffffff82d58090 r ar_chans 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uwacom_devs +ffffffff82d60010 R uwacom_ca +ffffffff82d60038 R uwacom_accessops +ffffffff82d61000 R bwfm_usb_ca +ffffffff82d61030 r bwfm_usbdevs +ffffffff82d62000 R umstc_ca +ffffffff82d62028 r umstc_devs +ffffffff82d63000 R uhidpp_ca +ffffffff82d63028 r uhidpp_devs +ffffffff82d64000 R ucc_ca +ffffffff82d65000 R iic_ca +ffffffff82d66000 r probes +ffffffff82d67000 R lmtemp_ca +ffffffff82d68000 R lmn_ca +ffffffff82d69000 R lmenv_ca +ffffffff82d6a000 R maxtmp_ca +ffffffff82d6b000 R adc_ca +ffffffff82d6c000 R admtemp_ca +ffffffff82d6d000 R admlc_ca +ffffffff82d6e000 R admtm_ca +ffffffff82d6f000 R admtmp_ca +ffffffff82d70000 R admtt_ca +ffffffff82d71000 R maxds_ca +ffffffff82d72000 R adt_ca +ffffffff82d73000 R lm_i2c_ca +ffffffff82d74000 R admcts_ca +ffffffff82d75000 R wbng_ca +ffffffff82d76000 R nvt_ca +ffffffff82d76030 r nvt_volt_desc +ffffffff82d77000 R adl_ca +ffffffff82d78000 R andl_ca +ffffffff82d78030 r andl_temp +ffffffff82d79000 R spdmem_iic_ca +ffffffff82d7a000 R sdtemp_ca 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acpi_tramp_data_end +ffffffff82db5000 R acpipci_ca +ffffffff82db6000 R efi_ca +ffffffff82db7000 R vmm_kp_contig +ffffffff82db7028 R vmm_ca +ffffffff82db7050 R vmm_vmx_sreg_vmcs_fields +ffffffff82db8000 R sdmmc_ca +ffffffff82db9000 R switch_group0_functions +ffffffff82db9050 R sdmmc_mmc_timings +ffffffff82dba000 R sdmmc_switch +ffffffff82dbb000 R bwfm_sdio_ca +ffffffff82dbc000 R onewire_ca +ffffffff82dbd000 r crc8_table +ffffffff82dbd100 r crc16_table_high +ffffffff82dbd200 r crc16_table_low +ffffffff82dbe000 R owid_ca +ffffffff82dbe028 r owid_fams +ffffffff82dbf000 R owsbm_ca +ffffffff82dbf028 r owsbm_fams +ffffffff82dc0000 R owtemp_ca +ffffffff82dc0028 r owtemp_fams +ffffffff82dc1000 R owctr_ca +ffffffff82dc1028 r owctr_fams +ffffffff82dc2000 R textraloc +ffffffff82dc3000 R ostype +ffffffff82dc3008 R osrelease +ffffffff82dc3010 R osversion +ffffffff82dc3040 R sccs +ffffffff82dc30b0 R version +ffffffff82dc4000 A __nofault_start +ffffffff82dc4018 A __nofault_end +ffffffff82dc5000 R codepatch_begin +ffffffff82dcd000 R codepatch_end +ffffffff82dcd000 c XUsyscall_meltdown +ffffffff82dcd3fa c doreti_iret_meltdown +ffffffff82dce000 c Xalltraps +ffffffff82dcf000 A __retguard_start +ffffffff82dcf000 r __retguard_366 +ffffffff82dcf008 r __retguard_1072 +ffffffff82dcf010 r __retguard_1444 +ffffffff82dcf018 r __retguard_3081 +ffffffff82dcf020 r __retguard_3384 +ffffffff82dcf028 r __retguard_297 +ffffffff82dd0000 r __retguard_2535 +ffffffff82dd0008 r __retguard_2245 +ffffffff82dd0010 r __retguard_1236 +ffffffff82dd0018 r __retguard_2615 +ffffffff82dd0020 r __retguard_3871 +ffffffff82dd0028 r __retguard_1394 +ffffffff82dd0030 r __retguard_659 +ffffffff82dd0038 r __retguard_871 +ffffffff82dd0040 r __retguard_1529 +ffffffff82dd0048 r __retguard_1839 +ffffffff82dd0050 r __retguard_357 +ffffffff82dd0058 r __retguard_2628 +ffffffff82dd0060 r __retguard_1353 +ffffffff82dd0068 r __retguard_2076 +ffffffff82dd0070 r __retguard_3529 +ffffffff82dd0078 r __retguard_467 +ffffffff82dd0080 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A __data_start +ffffffff83092000 D gdt64 +ffffffff83092000 R _erodata +ffffffff83092000 R erodata +ffffffff83092040 d gdt64_start +ffffffff83092058 d farjmp64 +ffffffff83092058 d gdt64_end +ffffffff83092260 d tmpstk +ffffffff83094000 d drm_minor_lock +ffffffff83094010 D drm_cd +ffffffff83095000 D _vga_scrlist +ffffffff83095030 D _vga_scrlist_mono +ffffffff83095048 d vga_builtinfont +ffffffff83095080 D vga_cd +ffffffff83096000 D at_poll +ffffffff83096008 D wdc_cd +ffffffff83096028 D wdc_default_vtbl +ffffffff83097000 D ahc_tailq +ffffffff83097010 D ahc_chip_names +ffffffff83097080 d ahc_phase_table +ffffffff83097120 d ahc_syncrates +ffffffff83098000 D ahc_cd +ffffffff83099000 D ahd_tailq +ffffffff83099010 D ahd_attach_to_HostRAID_controllers +ffffffff83099020 D ahd_chip_names +ffffffff83099040 d ahd_phase_table +ffffffff8309a000 D ahd_cd +ffffffff8309b000 D aic_cd +ffffffff8309c000 D adw_cd +ffffffff8309d000 D gdt_cd +ffffffff8309e000 D twe_cd +ffffffff8309f000 D ciss_cd +ffffffff830a0000 D ami_cd +ffffffff830a1000 D mfi_cd +ffffffff830a2000 D qlwdebug +ffffffff830a2008 D qlw_cd +ffffffff830a3000 D qla_cd +ffffffff830a4000 D ahci_cd +ffffffff830a5000 D nvme_cd +ffffffff830a6000 D mpi_cd +ffffffff830a7000 D sili_error_test_inv_p +ffffffff830a7004 D sili_error_restart_type +ffffffff830a7008 D sili_cd +ffffffff830a8000 D esp_cd +ffffffff830a8020 D ncr53c9x_variant_names +ffffffff830a9000 D E_abs_script_sched_slot0_Used +ffffffff830a90a0 D E_abs_targ0_Used +ffffffff830a90dc D E_abs_msgin_Used +ffffffff830a90e8 D E_abs_lunsw_return_Used +ffffffff830a90f0 D E_abs_tag0_Used +ffffffff830a9130 D E_ldsa_abs_reselected_Used +ffffffff830a9134 D E_ldsa_abs_reselect_Used +ffffffff830a9138 D E_ldsa_abs_selected_Used +ffffffff830a913c D E_ldsa_abs_data_Used +ffffffff830a9140 D E_ldsa_abs_slot_Used +ffffffff830a9148 D siop_cd +ffffffff830aa000 D ep_isa_media +ffffffff830aa060 D ep_cd +ffffffff830ab000 D wi_cd +ffffffff830ab020 D wi_func_io +ffffffff830ac000 D an_cd +ffffffff830ad000 D xl_cd +ffffffff830ae000 D fxp_int_delay +ffffffff830ae004 D fxp_bundle_max +ffffffff830ae008 D fxp_min_size_mask +ffffffff830ae010 D fxp_cd +ffffffff830ae030 d tx_threshold +ffffffff830ae040 d fxp_cb_config_template +ffffffff830af000 D rl_cd +ffffffff830b0000 D re_cd +ffffffff830b1000 D dc_cd +ffffffff830b2000 D smc91cxx_idstrs +ffffffff830b2080 D sm_cd +ffffffff830b3000 D epic_cd +ffffffff830b4000 D ne_cd +ffffffff830b4020 d ne2000_detect.test_pattern +ffffffff830b5000 D gem_cd +ffffffff830b6000 D ti_cd +ffffffff830b7000 D com_cd +ffffffff830b7020 D comdefaultrate +ffffffff830b7024 D comconsrate +ffffffff830b7028 D comconscflag +ffffffff830b7030 d comcnattach.comcons +ffffffff830b8000 D pckbc_slot_names +ffffffff830b8010 D pckbc_cd +ffffffff830b9000 D ac97civ +ffffffff830ba000 D cy_cd +ffffffff830bb000 D lpt_cd +ffffffff830bc000 D lm_cd +ffffffff830bd000 D ath_dwelltime +ffffffff830bd004 D ath_calinterval +ffffffff830bd008 D ath_outdoor +ffffffff830bd00c D ath_xchanmode +ffffffff830bd010 D ath_softcrypto +ffffffff830bd018 D ath_cd +ffffffff830be000 D athn_cd +ffffffff830bf000 D bwfm_2ghz_channels +ffffffff830bf010 D bwfm_5ghz_channels +ffffffff830bf030 D bwfm_proto_bcdc_ops +ffffffff830bf050 D bwfm_cd +ffffffff830c0000 D atw_bbp_io_enable_delay +ffffffff830c0004 D atw_bbp_io_disable_delay +ffffffff830c0008 D atw_writewep_delay +ffffffff830c000c D atw_beacon_len_adjust +ffffffff830c0010 D atw_dwelltime +ffffffff830c0018 D atw_cd +ffffffff830c1000 D rtw_dwelltime +ffffffff830c1004 D rtw_macbangbits_timeout +ffffffff830c1008 D rtw_cd +ffffffff830c2000 D ral_cd +ffffffff830c3000 D rt3090_freqs +ffffffff830c4000 D acx_beacon_intvl +ffffffff830c4008 D acx_cd +ffffffff830c5000 D pgt_cd +ffffffff830c6000 D sf_cd +ffffffff830c7000 D malo_cd +ffffffff830c8000 D bwi_cd +ffffffff830c8020 D bwi_constraint +ffffffff830c8030 D bwi_pa_mode +ffffffff830c9000 D uhci_cd +ffffffff830ca000 D ohci_cd +ffffffff830cb000 D ehci_cd +ffffffff830cc000 D xhci_cd +ffffffff830cd000 D ccp_cd +ffffffff830ce000 D sdhc_functions +ffffffff830ce068 D sdhc_cd +ffffffff830cf000 D rtsx_functions +ffffffff830cf068 D rtsx_cd +ffffffff830d0000 D radio_cd +ffffffff830d1000 D kcs_if +ffffffff830d1040 D smic_if +ffffffff830d1080 D bt_if +ffffffff830d10c0 D ipmi_cd +ffffffff830d10e0 D maxsdrlen +ffffffff830d2000 D vscsi_cd +ffffffff830d3000 D mpath_cd +ffffffff830d4000 D softraid_cd +ffffffff830d4020 D smd +ffffffff830d5000 D spdmem_cd +ffffffff830d6000 D dwiic_cd +ffffffff830d7000 D kstat_lock +ffffffff830d7010 D kstat_next_id +ffffffff830d7018 D kstat_default_lock +ffffffff830d8000 D pf_hdr_limit +ffffffff830d8008 D pf_purge_task +ffffffff830d8038 D pf_purge_to +ffffffff830d8080 D pf_pool_limits +ffffffff830d80f0 D pf_state_list +ffffffff830d9000 D pf_tags +ffffffff830d9010 D pf_qids +ffffffff830d9020 D pf_lock +ffffffff830d9030 D pf_state_lock +ffffffff830d9040 D pfioctl_rw +ffffffff830da000 D pfi_update +ffffffff830db000 D pflog_cloner +ffffffff830dc000 D pfsync_qs +ffffffff830dc078 D pfsync_cloner +ffffffff830dc0a8 d pfsync_task +ffffffff830dd000 D pflow_cloner +ffffffff830de000 D pppoe_cloner +ffffffff830de030 D pppoediscinq +ffffffff830de060 D pppoeinq +ffffffff830df000 D dt_lock +ffffffff830e0000 D dt_prov_profile +ffffffff830e0030 D dt_prov_interval +ffffffff830e1000 D dtps_nsysent +ffffffff830e1008 D dt_prov_syscall +ffffffff830e2000 D dt_prov_static +ffffffff830e2030 D dt_static_sched_dequeue +ffffffff830e20a0 D dt_static_sched_enqueue +ffffffff830e2110 D dt_static_sched_off__cpu +ffffffff830e2180 D dt_static_sched_on__cpu +ffffffff830e21f0 D dt_static_sched_remain__cpu +ffffffff830e2260 D dt_static_sched_sleep +ffffffff830e22d0 D dt_static_sched_wakeup +ffffffff830e2340 D dt_static_raw_syscalls_sys_enter +ffffffff830e23b0 D dt_static_raw_syscalls_sys_exit +ffffffff830e2420 D dt_static_uvm_fault +ffffffff830e2490 D dt_static_uvm_map_insert +ffffffff830e2500 D dt_static_uvm_map_remove +ffffffff830e2570 D dt_static_uvm_malloc +ffffffff830e25e0 D dt_static_uvm_free +ffffffff830e2650 D dt_static_uvm_pool_get +ffffffff830e26c0 D dt_static_uvm_pool_put +ffffffff830e2730 D dt_static_vfs_bufcache_rel +ffffffff830e27a0 D dt_static_vfs_bufcache_take +ffffffff830e2810 D dt_static_vfs_cleaner +ffffffff830e2880 D dt_static_vmm_guest_enter +ffffffff830e28f0 D dt_static_vmm_guest_exit +ffffffff830e2960 D dt_static_vmm_inout +ffffffff830e29d0 D dt_static_smr_call +ffffffff830e2a40 D dt_static_smr_called +ffffffff830e2ab0 D dt_static_smr_barrier_enter +ffffffff830e2b20 D dt_static_smr_barrier_exit +ffffffff830e2b90 D dt_static_smr_wakeup +ffffffff830e2c00 D dt_static_smr_thread +ffffffff830e2c70 D dt_static_refcnt_none +ffffffff830e2ce0 D dt_static_refcnt_ifaddr +ffffffff830e2d50 D dt_static_refcnt_inpcb +ffffffff830e2dc0 D dt_static_refcnt_tdb +ffffffff830e3000 D db_next_free_breakpoint +ffffffff830e3008 D db_breakpoints_inserted +ffffffff830e4000 D db_ed_style +ffffffff830e5000 D db_examine_format +ffffffff830e5078 D db_print_format +ffffffff830e6000 D db_history_size +ffffffff830e6008 D db_history_curr +ffffffff830e6010 D db_history_last +ffffffff830e7000 D db_tab_stop_width +ffffffff830e7004 D db_max_line +ffffffff830e7008 D db_max_width +ffffffff830e700c D db_radix +ffffffff830e8000 D db_lastsym +ffffffff830e8008 D db_maxoff +ffffffff830e9000 D db_vars +ffffffff830e9090 D db_evars +ffffffff830ea000 D db_watchpoints_inserted +ffffffff830ea008 D db_next_free_watchpoint +ffffffff830eb000 D db_log +ffffffff830ec000 D audio_cd +ffffffff830ec020 D audio_lock +ffffffff830ed000 D midi_cd +ffffffff830ee000 D rnd_cold +ffffffff830ee004 D rnd_slowextract +ffffffff830ee008 D rnd_timeout +ffffffff830ee050 D rndlock +ffffffff830ee060 D rndreinit_timeout +ffffffff830ee0a8 D rnd_task +ffffffff830ef000 D video_cd +ffffffff830f0000 d rrip_table_analyze +ffffffff830f00e0 d rrip_table_getname +ffffffff830f01e0 d rrip_table_getsymname +ffffffff830f0280 d rrip_table_extref +ffffffff830f1000 D nexecs +ffffffff830f2000 D elf_note_names +ffffffff830f3000 D ncpus +ffffffff830f3004 D ncpusfound +ffffffff830f4000 D acct_lock +ffffffff830f4010 D acctsuspend +ffffffff830f4014 D acctresume +ffffffff830f4018 D acctrate +ffffffff830f5000 D ticks +ffffffff830f5008 D jiffies +ffffffff830f6000 D clockintr_mtx +ffffffff830f6010 D statclock_gen +ffffffff830f7000 D fhdlk +ffffffff830f8000 D kqueue_klist_lock +ffffffff830f8010 D kq_timeoutmax +ffffffff830f9000 D stackgap_random +ffffffff830fa000 D nprocesses +ffffffff830fa004 D nthreads +ffffffff830fa008 D fork_tfmrate +ffffffff830fb000 D kthread_q +ffffffff830fc000 D malloc_mtx +ffffffff830fc010 D memname +ffffffff830fc4a0 D sysctl_kmemlock +ffffffff830fc4b0 D malloc_errintvl +ffffffff830fd000 D maxdmap +ffffffff830fd008 D maxsmap +ffffffff830fd010 D rlimit_lock +ffffffff830fe000 D sched_cost_load +ffffffff830fe004 D sched_cost_priority +ffffffff830fe008 D sched_cost_runnable +ffffffff830fe00c D sched_cost_resident +ffffffff830ff000 D intrmap_lock +ffffffff83100000 D nosuidcoredump +ffffffff83100008 D sigio_lock +ffffffff83101000 D smr_lock +ffffffff83101010 D smr_logintvl +ffffffff83102000 D startuphook_list +ffffffff83103000 D sysctl_lock +ffffffff83103010 D sysctl_disklock +ffffffff83103020 d openbsd +ffffffff83103024 d arg_max +ffffffff83103028 d posix_version +ffffffff8310302c d ngroups_max +ffffffff83103030 d int_one +ffffffff83103034 d maxpartitions +ffffffff83103038 d raw_part +ffffffff8310303c D allowpowerdown +ffffffff83103040 D hw_power +ffffffff83103044 d byte_order +ffffffff83103048 d page_size +ffffffff83104000 d thrsleep_queue +ffffffff83104010 d thrsleep_lock +ffffffff83105000 D tc_lock +ffffffff83105010 D windup_mtx +ffffffff83105020 D timecounter +ffffffff83105028 D time_second +ffffffff83105030 d timehands +ffffffff83105038 d dummy_timecounter +ffffffff83105088 d th0 +ffffffff83105120 d th1 +ffffffff83106000 D itimer_mtx +ffffffff83106010 D ratecheck_mtx +ffffffff83106020 D ppsratecheck_mtx +ffffffff83106030 D resettodr_to +ffffffff83106078 D resettodr_task +ffffffff83107000 D timeout_mutex +ffffffff83108000 D wdog_auto +ffffffff83109000 D taskq_sys +ffffffff83109050 D taskq_sys_mp +ffffffff8310a000 D ccpu +ffffffff8310a004 D perflevel +ffffffff8310a008 D perfpolicy +ffffffff8310a010 D setperf_to +ffffffff8310b000 D autoconf_attdet_mtx +ffffffff8310b010 D msgs +ffffffff8310c000 d evcount_list +ffffffff8310c010 d evcount_percpu_init_list +ffffffff8310d000 D syslogf_rwlock +ffffffff8310d010 D log_mtx +ffffffff8310d020 D logstash_in +ffffffff8310d028 D logstash_out +ffffffff8310d030 D logstash_rwlock +ffffffff8310e000 D pool_head +ffffffff8310e010 D pool_lock +ffffffff8310e020 D pool_debug +ffffffff8310e028 D pool_allocator_single +ffffffff8310e040 D pool_allocator_multi +ffffffff8310e058 D pool_allocator_multi_ni +ffffffff8310e070 D pool_gc_tick +ffffffff8310e0b8 D pool_gc_task +ffffffff8310f000 D kprintf_mutex +ffffffff8310f010 D db_panic +ffffffff8310f014 D splassert_ctl +ffffffff8310f018 D v_putc +ffffffff8310f020 D printf_flags +ffffffff83110000 D userconf_base +ffffffff83110004 D userconf_maxdev +ffffffff83110008 D userconf_totdev +ffffffff8311000c D userconf_maxlocnames +ffffffff83110010 D userconf_cnt +ffffffff83110014 D userconf_lines +ffffffff83110018 D userconf_histsz +ffffffff83110020 D userconf_cmds +ffffffff83111000 D ftlock +ffffffff83112000 d ppollcollect.poll_errintvl +ffffffff83113000 D ttydefchars +ffffffff83113014 D ttclos +ffffffff8311301b D ttopen +ffffffff83113022 D ttybg +ffffffff83113028 D ttyin +ffffffff8311302e D ttyout +ffffffff83113038 D ttylist_lock +ffffffff83114000 D linesw +ffffffff83114280 D nlinesw +ffffffff83115000 D pt_softc_lock +ffffffff83116000 d mbstat_boot_boot_cpumem +ffffffff83116080 D mbstat +ffffffff83116090 D mclsizes +ffffffff831160b0 D m_extref_mtx +ffffffff831160c0 D m_pool_allocator +ffffffff83117000 D somaxconn +ffffffff83117004 D sominconn +ffffffff83117008 D sosplice_lock +ffffffff83118000 D sb_max +ffffffff83119000 D unp_lock +ffffffff83119010 D unp_df_lock +ffffffff83119020 D unp_gc_lock +ffffffff83119030 D unp_rights_mtx +ffffffff83119040 D unp_ino_mtx +ffffffff83119050 D unp_gc_task +ffffffff83119080 D unpst_sendspace +ffffffff83119084 D unpst_recvspace +ffffffff83119088 D unpsq_sendspace +ffffffff8311908c D unpsq_recvspace +ffffffff83119090 D unpdg_sendspace +ffffffff83119094 D unpdg_recvspace +ffffffff8311a000 D doingcache +ffffffff8311b000 D maxvfsconf +ffffffff8311b010 d vfsconflist +ffffffff8311c000 D lockf_lock +ffffffff8311c010 D maxlocksperuid +ffffffff8311d000 D iftovt_tab +ffffffff8311d040 D vttoif_tab +ffffffff8311d064 D suid_clear +ffffffff8311d068 D vnode_mtx +ffffffff8311d078 D vfs_stall_lock +ffffffff8311d090 D vtypes +ffffffff8311d0e0 D vtags +ffffffff8311e000 D syncer_maxdelay +ffffffff8311e004 D syncdelay +ffffffff8311f000 D dosdirtemplate +ffffffff83120000 D ntfs_hashlock +ffffffff83121000 D ntfs_toupper_lock +ffffffff83122000 D art_table_gc_mtx +ffffffff83122010 D art_table_gc_task +ffffffff83122040 D art_node_gc_mtx +ffffffff83122050 D art_node_gc_task +ffffffff83123000 D bpf_bufsize +ffffffff83123004 D bpf_maxbufsize +ffffffff83123008 D bpf_sysctl_lk +ffffffff83124000 D ifg_head +ffffffff83124010 D if_cloners_lock +ffffffff83124020 D if_input_task_locked +ffffffff83124050 D netlock +ffffffff83124060 D ifnetlist +ffffffff83125000 D ifiq_maxlen_drop +ffffffff83125004 D ifiq_maxlen_return +ffffffff83126000 D etherbroadcastaddr +ffffffff83126006 D ether_ipmulticast_min +ffffffff8312600c D ether_ipmulticast_max +ffffffff83126012 D ether_ip6multicast_min +ffffffff83126018 D ether_ip6multicast_max +ffffffff83127000 D etherip_cloner +ffffffff83127030 D etherip_list +ffffffff83128000 D loop_cloner +ffffffff83129000 D ifmedia_mtx +ffffffff8312a000 D ppp_compressors +ffffffff8312a020 D ppp_cloner +ffffffff8312b000 D ppp_pkt_init +ffffffff8312c000 D ppp_bsd_compress +ffffffff8312d000 D ppp_deflate +ffffffff8312d070 D ppp_deflate_draft +ffffffff8312e000 D tun_cloner +ffffffff8312e030 D tap_cloner +ffffffff8312f000 D bridgeintrq +ffffffff8312f038 D bridge_cloner +ffffffff83130000 d veb_cloner +ffffffff83130030 d vport_cloner +ffffffff83131000 D vlan_tagh_lk +ffffffff83131010 D vlan_cloner +ffffffff83131040 D svlan_cloner +ffffffff83132000 D pipex_list_mtx +ffffffff83132010 D pipex_prune +ffffffff83132018 D pipexoutq +ffffffff83132050 d SHAPad2 +ffffffff83133000 D rtmap_gc +ffffffff83133018 D rt_rc +ffffffff83134000 D rt_labels +ffffffff83135000 D enc_cloner +ffffffff83136000 D gre_cloner +ffffffff83136030 D gre_list +ffffffff83136040 D mgre_cloner +ffffffff83136070 D egre_cloner +ffffffff831360a0 D nvgre_cloner +ffffffff831360d0 D eoip_cloner +ffffffff83137000 D trunk_cloner +ffffffff83138000 d aggr_cloner +ffffffff83139000 d tpmr_cloner +ffffffff8313a000 D mpe_cloner +ffffffff8313b000 D mpw_cloner +ffffffff8313c000 D mpip_cloner +ffffffff8313d000 d bpe_cloner +ffffffff8313d030 d bpe_lock +ffffffff8313e000 D vether_cloner +ffffffff8313f000 D pair_cloner +ffffffff83140000 d vxlan_cloner +ffffffff83140030 d vxlan_lock +ffffffff83140040 d vxlan_teps +ffffffff83141000 D underload_interval +ffffffff83141010 D wg_cloner +ffffffff83142000 d stoeplitz_keyseed +ffffffff83143000 D ieee80211_cache_size +ffffffff83144000 D arpt_prune +ffffffff83144004 D arpt_keep +ffffffff83144008 D arpt_down +ffffffff83144010 D arpinq +ffffffff83144048 D arp_mtx +ffffffff83144058 D arp_maxtries +ffffffff83145000 D ipport_firstauto +ffffffff83145004 D ipport_lastauto +ffffffff83145008 D ipport_hifirstauto +ffffffff8314500c D ipport_hilastauto +ffffffff83146000 D divert_sendspace +ffffffff83146004 D divert_recvspace +ffffffff83146008 D divbhashsize +ffffffff83147000 D icmptstamprepl +ffffffff83147004 D icmperrppslim +ffffffff83147008 D icmp_redirtimeout +ffffffff83148000 D ipsendredirects +ffffffff83148004 D ip_defttl +ffffffff83148008 D ip_mtudisc +ffffffff8314800c D ip_mtudisc_timeout +ffffffff83148010 D ipq_mutex +ffffffff83148020 D ip_maxqueue +ffffffff83148028 D ipintrq +ffffffff83148060 d ipsend_task +ffffffff83148090 d ipsendraw_task +ffffffff83149000 D ip_mrtproto +ffffffff83149004 d sin +ffffffff8314a000 D rip_sendspace +ffffffff8314a008 D rip_recvspace +ffffffff8314b000 D tcprexmtthresh +ffffffff8314b004 D tcptv_keep_init +ffffffff8314b008 D tcp_rst_ppslim +ffffffff8314b00c D tcp_ackdrop_ppslim +ffffffff8314b010 D tcp_syn_hash_size +ffffffff8314b014 D tcp_syn_cache_limit +ffffffff8314b018 D tcp_syn_bucket_limit +ffffffff8314b01c D tcp_syn_use_limit +ffffffff8314c000 D tcp_outflags +ffffffff8314d000 D tcp_timer_mtx +ffffffff8314d010 D tcp_mssdflt +ffffffff8314d014 D tcp_rttdflt +ffffffff8314d018 D tcp_do_rfc1323 +ffffffff8314d01c D tcp_do_sack +ffffffff8314d020 D tcp_do_rfc3390 +ffffffff8314d024 D tcp_reass_limit +ffffffff8314d028 D tcp_sackhole_limit +ffffffff8314e000 D tcp_backoff +ffffffff8314e034 D tcp_totbackoff +ffffffff8314f000 D tcp_sendspace +ffffffff8314f004 D tcp_recvspace +ffffffff8314f008 D tcp_autorcvbuf_inc +ffffffff83150000 D udpcksum +ffffffff83150004 D udp_sendspace +ffffffff83150008 D udp_recvspace +ffffffff83151000 D ipsec_flows_mtx +ffffffff83151010 D ipsec_ids_idle +ffffffff83151014 D ipsec_ids_next_flow +ffffffff83151018 D ipsec_policy_head +ffffffff83151028 D ipsp_ids_gc_timeout +ffffffff83151070 D tdb_sadb_mtx +ffffffff83151080 d tdb_hashmask +ffffffff83152000 D ipo_tdb_mtx +ffffffff83152010 D ipsec_acquire_mtx +ffffffff83152020 D ipsec_acquire_head +ffffffff83153000 D ipsec_keep_invalid +ffffffff83153004 D ipsec_require_pfs +ffffffff83153008 D ipsec_soft_timeout +ffffffff8315300c D ipsec_exp_timeout +ffffffff83153010 D ipsec_soft_first_use +ffffffff83153014 D ipsec_exp_first_use +ffffffff83153018 D ipsec_expire_acquire +ffffffff8315301c D esp_enable +ffffffff83153020 D ah_enable +ffffffff83154000 D udpencap_enable +ffffffff83154004 D udpencap_port +ffffffff83155000 D carp_vh_rc +ffffffff83155020 D carp_sc_rc +ffffffff83155040 D carp_opts +ffffffff83155058 D carp_cloner +ffffffff83155088 d carp_send_na.mcast +ffffffff83156000 d PADDING +ffffffff83157000 d PADDING +ffffffff83158000 d weak_keys +ffffffff83159000 D swcr_id +ffffffff8315a000 D window_inflate +ffffffff8315a004 D window_deflate +ffffffff8315b000 D ghash_update +ffffffff8315c000 D mpls_defttl +ffffffff8315c004 D mpls_mapttl_ip +ffffffff8315d000 D nfskevq_lock +ffffffff8315e000 D nfs_backoff +ffffffff8315e020 D nfs_ptimers +ffffffff8315f000 D desirednfsrvcache +ffffffff8315f010 D nonidempotent +ffffffff8315f070 D nfsv2_repstat +ffffffff83160000 D nfsv2_type +ffffffff83160030 D nfsv3_type +ffffffff83160060 D nv2tov_type +ffffffff83160080 D nv3tov_type +ffffffff831600a0 D nfsv3_procid +ffffffff83160100 D nfsv2_procid +ffffffff8316015c d nfsv3err_getattr +ffffffff83160170 d nfsv3err_setattr +ffffffff83160190 d nfsv3err_lookup +ffffffff831601a4 d nfsv3err_access +ffffffff831601b0 d nfsv3err_readlink +ffffffff831601d0 d nfsv3err_read +ffffffff831601f0 d nfsv3err_write +ffffffff83160210 d nfsv3err_create +ffffffff83160230 d nfsv3err_mkdir +ffffffff83160250 d nfsv3err_symlink +ffffffff83160270 d nfsv3err_mknod +ffffffff83160290 d nfsv3err_remove +ffffffff831602b0 d nfsv3err_rmdir +ffffffff831602d0 d nfsv3err_rename +ffffffff83160300 d nfsv3err_link +ffffffff83160330 d nfsv3err_readdir +ffffffff83160350 d nfsv3err_readdirplus +ffffffff83160366 d nfsv3err_fsstat +ffffffff83160372 d nfsv3err_fsinfo +ffffffff8316037c d nfsv3err_pathconf +ffffffff83160386 d nfsv3err_commit +ffffffff83161000 D nfsrv3_procs +ffffffff831610b8 D nfs_niothreads +ffffffff83162000 D fragtbl +ffffffff83163000 D ffs_vtbl +ffffffff83164000 D softdep_typenames +ffffffff83164070 D tickdelay +ffffffff83165000 D dirchk +ffffffff83166000 D desireddquot +ffffffff83167000 D amap_list_lock +ffffffff83168000 d uao_list_lock +ffffffff83169000 d uvmexp_countersboot_boot_cpumem +ffffffff831690c0 D uvmexp_counters +ffffffff831690c8 D vm_min_kernel_address +ffffffff8316a000 D no_constraint +ffffffff8316b000 d uvm_kmapent_warn_rate +ffffffff8316c000 D maxslp +ffffffff8316d000 D uvmpagerops +ffffffff8316e000 D uvm_swap_data_lock +ffffffff8316e010 D swap_syscall_lock +ffffffff8316e020 D oommtx +ffffffff8316f000 D uvm_doswapencrypt +ffffffff83170000 D gif_list +ffffffff83170010 D gif_cloner +ffffffff83171000 D divert6_sendspace +ffffffff83171004 D divert6_recvspace +ffffffff83171008 D divb6hashsize +ffffffff83172000 d in6_get_hw_ifid.allone +ffffffff83173000 D ip6_sendredirects +ffffffff83173004 D ip6_defhlim +ffffffff83173008 D ip6_defmcasthlim +ffffffff8317300c D ip6_maxfragpackets +ffffffff83173010 D ip6_maxfrags +ffffffff83173014 D ip6_log_interval +ffffffff83173018 D ip6_hdrnestlimit +ffffffff8317301c D ip6_dad_count +ffffffff83173020 D ip6_auto_flowlabel +ffffffff83173024 D ip6_use_deprecated +ffffffff83173028 D ip6_neighborgcthresh +ffffffff8317302c D ip6_maxdynroutes +ffffffff83173030 D rip6_sendspace +ffffffff83173038 D rip6_recvspace +ffffffff83173040 D icmp6_redirtimeout +ffffffff83173044 D icmp6errppslim +ffffffff83173048 D ip6_mtudisc_timeout +ffffffff83174000 D frag6_mutex +ffffffff83175000 d icmp6_mtudisc_hiwat +ffffffff83175004 d icmp6_mtudisc_lowat +ffffffff83176000 d randomtab_20 +ffffffff83177000 D ip6intrq +ffffffff83177038 d ip6send_task +ffffffff83178000 D nd6_timer_next +ffffffff83178008 D nd6_expire_next +ffffffff83178010 D nd6_delay +ffffffff83178014 D nd6_umaxtries +ffffffff83178018 D nd6_mmaxtries +ffffffff8317801c D nd6_gctimer +ffffffff83178020 D nd6_maxndopt +ffffffff83179000 d dadq +ffffffff8317a000 D pfkeyv2_mtx +ffffffff8317a010 d pfkeyv2_seq +ffffffff8317b000 D sadb_exts_allowed_in +ffffffff8317b090 D sadb_exts_required_in +ffffffff8317c000 D cold +ffffffff8317d000 D bdevsw +ffffffff8317d460 D nblkdev +ffffffff8317d470 D cdevsw +ffffffff8317f400 D nchrdev +ffffffff8317f404 D mem_no +ffffffff8317f408 D swapdev +ffffffff8317f410 D constab +ffffffff83180000 D machine +ffffffff83180008 D lid_action +ffffffff8318000c D pwr_action +ffffffff83180010 D isa_constraint +ffffffff83180020 D dma_constraint +ffffffff83180030 D uvm_md_constraints +ffffffff83180048 D delay_func +ffffffff83180050 D initclock_func +ffffffff83180058 D bootinfo_size +ffffffff8318005c D waittime +ffffffff83180060 D dumpmag +ffffffff83181000 D tsc_rdtsc +ffffffff83181008 D tsc_timecounter +ffffffff83181058 D tsc_is_synchronized +ffffffff83182000 D local_apic +ffffffff83182020 D lapic_id +ffffffff83182080 D lapic_tpr +ffffffff831820a0 d lapic_ppr +ffffffff83182100 d lapic_isr +ffffffff83183000 D warn_once +ffffffff83184000 d errata +ffffffff83185000 D cpu_ucode_intel_mtx +ffffffff83186000 D mem_owner_bios +ffffffff83186008 D mrops +ffffffff83186028 D mtrrmask +ffffffff83186030 D mtrrtomrt +ffffffff83187000 D pmap_pg_wc +ffffffff83187008 D pmaps_lock +ffffffff83187018 d pmap_maxkvaddr +ffffffff83188000 D kv_physwait +ffffffff83189000 D fpu_save_len +ffffffff8318a000 D i8259_pic +ffffffff8318b000 D softintr_pic +ffffffff8318c000 D ipifunc +ffffffff8318d000 D setperf_mp_mutex +ffffffff8318e000 D db_Grp6 +ffffffff8318e040 D db_Grp7 +ffffffff8318e100 D db_Grp8 +ffffffff8318e140 D db_Grp9 +ffffffff8318e200 D db_GrpA +ffffffff8318e240 D db_GrpB +ffffffff8318e280 D db_GrpC +ffffffff8318e2c0 D db_inst_0f0x +ffffffff8318e440 D db_inst_0f2x +ffffffff8318e5c0 D db_inst_0f3x +ffffffff8318e740 D db_inst_0f8x +ffffffff8318e8c0 D db_inst_0f9x +ffffffff8318ea40 D db_inst_0fax +ffffffff8318ebc0 D db_inst_0fbx +ffffffff8318ed40 D db_inst_0fcx +ffffffff8318eec0 D db_inst_0f +ffffffff8318ef40 D db_Esc92 +ffffffff8318ef80 D db_Esc94 +ffffffff8318efc0 D db_Esc95 +ffffffff8318f000 D db_Esc96 +ffffffff8318f040 D db_Esc97 +ffffffff8318f080 D db_Esca5 +ffffffff8318f0c0 D db_Escb4 +ffffffff8318f100 D db_Esce3 +ffffffff8318f140 D db_Escf4 +ffffffff8318f180 D db_Esc8 +ffffffff8318f240 D db_Esc9 +ffffffff8318f300 D db_Esca +ffffffff8318f3c0 D db_Escb +ffffffff8318f480 D db_Escc +ffffffff8318f540 D db_Escd +ffffffff8318f600 D db_Esce +ffffffff8318f6c0 D db_Escf +ffffffff8318f780 D db_Esc_inst +ffffffff8318f7c0 D db_Grp1 +ffffffff8318f800 D db_Grp2 +ffffffff8318f840 D db_Grp3 +ffffffff8318f900 D db_Grp4 +ffffffff8318f9c0 D db_Grp5 +ffffffff8318fa80 D db_inst_table +ffffffff83191280 D db_bad_inst +ffffffff831912a0 D db_index_reg_16 +ffffffff831912e0 D db_reg +ffffffff831914e0 D db_seg_reg +ffffffff83191520 D db_lengths +ffffffff83192000 D db_regs +ffffffff831921e0 D db_eregs +ffffffff831921f0 D db_reg_args +ffffffff83193000 D timer_mutex +ffffffff83193010 d i8254_timecounter +ffffffff83194000 D spleen8x16 +ffffffff83194058 D spleen12x24 +ffffffff831940b0 D spleen16x32 +ffffffff83194108 D spleen32x64 +ffffffff83194160 d builtin_fonts +ffffffff831941e0 d wsfont_add.cookiegen +ffffffff831941f0 d spleen8x16_data +ffffffff83194ff0 d spleen12x24_data +ffffffff831979f0 d spleen16x32_data +ffffffff8319b1f0 d spleen32x64_data +ffffffff831aa000 D nsphy_cd +ffffffff831ab000 D nsphyter_cd +ffffffff831ac000 D gentbi_cd +ffffffff831ad000 D qsphy_cd +ffffffff831ae000 D inphy_cd +ffffffff831af000 D iophy_cd +ffffffff831b0000 D eephy_cd +ffffffff831b1000 D exphy_cd +ffffffff831b2000 D rlphy_cd +ffffffff831b3000 D lxtphy_cd +ffffffff831b4000 D luphy_cd +ffffffff831b5000 D mtdphy_cd +ffffffff831b6000 D icsphy_cd +ffffffff831b7000 D sqphy_cd +ffffffff831b8000 D tqphy_cd +ffffffff831b9000 D ukphy_cd +ffffffff831ba000 D dcphy_cd +ffffffff831bb000 D bmtphy_cd +ffffffff831bc000 D brgphy_cd +ffffffff831bd000 D xmphy_cd +ffffffff831be000 D amphy_cd +ffffffff831bf000 D acphy_cd +ffffffff831c0000 D nsgphy_cd +ffffffff831c1000 D urlphy_cd +ffffffff831c2000 D rgephy_cd +ffffffff831c3000 D ciphy_cd +ffffffff831c4000 D ipgphy_cd +ffffffff831c5000 D etphy_cd +ffffffff831c6000 D jmphy_cd +ffffffff831c7000 D atphy_cd +ffffffff831c8000 D scsi_autoconf +ffffffff831c8008 D scsibus_cd +ffffffff831c9000 D cd_cd +ffffffff831ca000 D ch_cd +ffffffff831ca020 D chquirks +ffffffff831cb000 D sd_cd +ffffffff831cc000 D st_cd +ffffffff831cd000 D uk_cd +ffffffff831ce000 D safte_cd +ffffffff831cf000 D ses_cd +ffffffff831d0000 D sym_cd +ffffffff831d0020 D sym_devices +ffffffff831d0070 D asym_devices +ffffffff831d1000 D rdac_cd +ffffffff831d1020 D rdac_devices +ffffffff831d2000 D emc_cd +ffffffff831d2020 D emc_devices +ffffffff831d3000 D hds_cd +ffffffff831d3020 D hds_devices +ffffffff831d4000 D atapiscsi_cd +ffffffff831d5000 D wd_cd +ffffffff831d5020 d wddumpmulti +ffffffff831d6000 D mainbus_cd +ffffffff831d6020 D mba_iba +ffffffff831d7000 D bios_cd +ffffffff831d7020 D smbios_uninfo +ffffffff831d8000 D mpbios_cd +ffffffff831d8020 d mp_conf +ffffffff831d8070 d extint_bus +ffffffff831d80a0 d smi_bus +ffffffff831d80d0 d nmi_bus +ffffffff831d9000 D cpu_info_full_primary +ffffffff831dc000 D cpu_info_list +ffffffff831dc008 D mp_cpu_funcs +ffffffff831dc020 D cpu_cd +ffffffff831dc040 D cpu_info +ffffffff831dd000 D local_pic +ffffffff831dd090 D lapic_readreg +ffffffff831dd098 D lapic_writereg +ffffffff831dd0a0 D x86_ipi +ffffffff831de000 D ioapic_cold +ffffffff831de008 D ioapic_cd +ffffffff831df000 D efifb_std_descr +ffffffff831df030 D efifb_descrs +ffffffff831df038 D efifb_accessops +ffffffff831df098 D efifb_cd +ffffffff831e0000 D pvbus_cd +ffffffff831e0020 D pvbus_types +ffffffff831e00e0 D pvbus_dma_tag +ffffffff831e1000 D pvclock_cd +ffffffff831e1020 D pvclock_timecounter +ffffffff831e2000 D vmt_tclo_rpc +ffffffff831e20d0 D vmt_cd +ffffffff831e3000 D xen_cd +ffffffff831e3020 D xen_bus_dma_tag +ffffffff831e4000 D xnf_cd +ffffffff831e5000 D xbf_cd +ffffffff831e6000 D hv_msg_dispatch +ffffffff831e6110 D hv_timecounter +ffffffff831e6160 D hyperv_cd +ffffffff831e7000 d hv_ic_devs +ffffffff831e8000 D hvn_cd +ffffffff831e9000 D hvs_cd +ffffffff831ea000 D virtio_cd +ffffffff831eb000 D vio_cd +ffffffff831ec000 D vioblk_cd +ffffffff831ed000 D viomb_cd +ffffffff831ee000 D viornd_cd +ffffffff831ef000 D vioscsi_cd +ffffffff831f0000 D vmmci_cd +ffffffff831f1000 D pci_cd +ffffffff831f2000 D arc_fw_hdr +ffffffff831f2008 D arc_cd +ffffffff831f3000 D jmb_cd +ffffffff831f4000 D mfii_cd +ffffffff831f5000 D ips_cd +ffffffff831f6000 D eap_cd +ffffffff831f7000 D auacer_cd +ffffffff831f8000 D auich_cd +ffffffff831f9000 D azalia_cd +ffffffff831fa000 D envy_cd +ffffffff831fa020 D envy_matchids +ffffffff831fa030 D envy_rates +ffffffff831fa0b0 D ak4524_dac +ffffffff831fa0d8 D ak4524_adc +ffffffff831fa100 D ak4358_dac +ffffffff831fa128 D ak5365_adc +ffffffff831fa150 D unkenvy_codec +ffffffff831fa180 D envy_cards +ffffffff831fa3f0 D envy_cards_ht +ffffffff831fa600 d julia_eeprom +ffffffff831fb000 D emu_cd +ffffffff831fc000 D auixp_cd +ffffffff831fd000 D clcs_cd +ffffffff831fe000 D yds_cd +ffffffff831ff000 D auvia_cd +ffffffff83200000 D qle_cd +ffffffff83201000 D mpii_cd +ffffffff83202000 D aq_cd +ffffffff83203000 D de_cd +ffffffff83204000 D pcn_cd +ffffffff83205000 D wdc_sii3114_vtbl +ffffffff83205038 D wdc_pdc203xx_vtbl +ffffffff83205070 D wdc_svwsata_vtbl +ffffffff832050a8 D pciide_cd +ffffffff832050d0 d sis_hostbr_type +ffffffff83206000 D ppb_cd +ffffffff83207000 D vr_cd +ffffffff83207020 D vr_devices +ffffffff83208000 D txp_cd +ffffffff83209000 D bt848_card_signature +ffffffff8320a000 D bktr_cd +ffffffff8320b000 D em_cd +ffffffff8320c000 D ixgb_cd +ffffffff8320d000 D ix_cd +ffffffff8320d020 D ixgbe_smart_speed +ffffffff8320d024 D ixgbe_enable_msix +ffffffff8320e000 D ixl_cd +ffffffff8320e020 d ixl_sff_lock +ffffffff8320f000 D xge_cd +ffffffff83210000 D thtc_cd +ffffffff83210020 D tht_cd +ffffffff83210040 D tht_txt_desc +ffffffff83210068 D tht_rxf_desc +ffffffff83210090 D tht_rxd_desc +ffffffff832100b8 D tht_txf_desc +ffffffff83211000 D myx_cd +ffffffff83212000 D oce_cd +ffffffff83213000 D dc_devs +ffffffff83214000 D cas_cd +ffffffff83215000 D sis_cd +ffffffff83216000 D se_cd +ffffffff83217000 D cbb_cd +ffffffff83217020 D yc_chipsets +ffffffff832171b0 d pccbb_funcs +ffffffff832171e0 d pccbb_pcmcia_funcs +ffffffff83218000 D skc_cd +ffffffff83218020 D sk_cd +ffffffff83219000 D mskc_cd +ffffffff83219020 D msk_cd +ffffffff8321a000 D puc_cd +ffffffff8321b000 D puc_ndevs +ffffffff8321c000 D iwi_cd +ffffffff8321d000 D wpi_cd +ffffffff8321e000 D iwn_cd +ffffffff8321f000 D iwm_cd +ffffffff83220000 D iwx_cd +ffffffff83221000 D cmpci_cd +ffffffff83222000 D iha_cd +ffffffff83223000 D pcscp_cd +ffffffff83223020 D pcscp_glue +ffffffff83224000 D bge_cd +ffffffff83225000 D bnx_firmwares +ffffffff83225160 D bnx_rv2ps +ffffffff832251c0 D bnx_cd +ffffffff832251e0 d flash_5709 +ffffffff83225210 d flash_table +ffffffff83226000 D vge_cd +ffffffff83227000 D stge_cd +ffffffff83228000 D nfe_cd +ffffffff83229000 D et_cd +ffffffff8322a000 D jme_cd +ffffffff8322b000 D age_cd +ffffffff8322c000 D alc_dma_burst +ffffffff8322c020 D alc_cd +ffffffff8322d000 D ale_cd +ffffffff8322e000 D amdpm_cd +ffffffff8322e020 d amdpm_timecounter +ffffffff8322f000 D bce_cd +ffffffff83230000 D rtwn_cd +ffffffff83231000 d ral_rt2560_opns +ffffffff83231028 d ral_rt2661_opns +ffffffff83231050 d ral_rt2860_opns +ffffffff83232000 D piixpm_cd +ffffffff83233000 D vic_cd +ffffffff83234000 D vmx_cd +ffffffff83235000 D vmwpvs_cd +ffffffff83236000 D lii_cd +ffffffff83237000 D ichiic_cd +ffffffff83238000 D viapm_cd +ffffffff83238020 d viapm_timecounter +ffffffff83239000 D amdiic_cd +ffffffff8323a000 D nviic_cd +ffffffff8323b000 D kate_cd +ffffffff8323c000 D km_cd +ffffffff8323d000 D cpu_model_offsets +ffffffff8323d070 D ksmn_cd +ffffffff8323e000 D itherm_cd +ffffffff8323f000 D pchtemp_cd +ffffffff83240000 D xspd_cd +ffffffff83241000 D virtio_pci_ops +ffffffff83242000 D bwfm_pci_buscore_ops +ffffffff83242030 D bwfm_pci_bus_ops +ffffffff83242058 D bwfm_pci_msgbuf_ops +ffffffff83243000 D bnxt_cd +ffffffff83244000 D mcx_cd +ffffffff83245000 D iavf_cd +ffffffff83246000 D rge_cd +ffffffff83247000 D igc_cd +ffffffff83248000 D agp_cd +ffffffff83249000 D intagp_cd +ffffffff83249020 D agp_i810_methods +ffffffff8324a000 D reservation_ww_class +ffffffff8324b000 d bridge_lock +ffffffff8324b010 d bridge_list +ffffffff8324c000 d drm_connector_enum_list +ffffffff8324c1f8 d connector_list_lock +ffffffff8324c208 d connector_list +ffffffff8324d000 d kernel_fb_helper_list +ffffffff8324d010 d kernel_fb_helper_lock +ffffffff8324e000 D drm_global_mutex +ffffffff8324f000 D sch_mtx +ffffffff8324f010 D i2c_bit_algo +ffffffff8324f020 d drm_fence_context_count +ffffffff8324f028 d dma_fence_stub_mtx +ffffffff8324f038 D wait_bit_mtx +ffffffff8324f048 D shrinkers +ffffffff83250000 d crtc_ww_class +ffffffff83251000 d panel_lock +ffffffff83251010 d panel_list +ffffffff83252000 d ttm_global_mutex +ffffffff83253000 D intel_bbops +ffffffff83254000 d i915_sys_placement +ffffffff83254020 d i915_ttm_bo_driver +ffffffff83255000 d mchdev_lock +ffffffff83256000 D inteldrm_stdscreen +ffffffff83256030 D inteldrm_scrlist +ffffffff83256038 D inteldrm_screenlist +ffffffff83256048 D inteldrm_accessops +ffffffff832560a8 D inteldrm_cd +ffffffff83257000 d capture_mutex +ffffffff83258000 d mitigations +ffffffff83259000 D i915_modparams +ffffffff8325a000 d schedule_lock +ffffffff8325b000 d unbind_fence_ops +ffffffff8325c000 D intel_graphics_stolen_res +ffffffff8325d000 D btc_valid_sclk +ffffffff8325e000 d evergreen_cs_packet_parse_vline.vline_start_end +ffffffff8325e020 d evergreen_cs_packet_parse_vline.vline_status +ffffffff8325f000 d r600_cs_packet_parse_vline.vline_start_end +ffffffff8325f008 d r600_cs_packet_parse_vline.vline_status +ffffffff83260000 d r100_asic +ffffffff832602e0 d r200_asic +ffffffff832605c0 d r300_asic_pcie +ffffffff832608a0 d r300_asic +ffffffff83260b80 d r420_asic +ffffffff83260e60 d rs400_asic +ffffffff83261140 d rs600_asic +ffffffff83261420 d rs690_asic +ffffffff83261700 d rv515_asic +ffffffff832619e0 d r520_asic +ffffffff83261cc0 d r600_asic +ffffffff83261fa0 d rv6xx_asic +ffffffff83262280 d rs780_asic +ffffffff83262560 d rv770_asic +ffffffff83262840 d evergreen_asic +ffffffff83262b20 d sumo_asic +ffffffff83262e00 d btc_asic +ffffffff832630e0 d cayman_asic +ffffffff832633c0 d trinity_asic +ffffffff832636a0 d si_asic +ffffffff83263980 d ci_asic +ffffffff83263c60 d kv_asic +ffffffff83264000 d dce6_funcs +ffffffff83264018 d dce6_hdmi_funcs +ffffffff83264088 d dce6_dp_funcs +ffffffff832640f8 d dce4_funcs +ffffffff83264110 d dce4_hdmi_funcs +ffffffff83264180 d dce4_dp_funcs +ffffffff832641f0 d dce32_funcs +ffffffff83264208 d dce32_hdmi_funcs +ffffffff83264278 d dce32_dp_funcs +ffffffff832642e8 d r600_funcs +ffffffff83264300 d r600_hdmi_funcs +ffffffff83265000 D radeon_modeset +ffffffff83265004 D radeon_dynclks +ffffffff83265008 D radeon_agpmode +ffffffff8326500c D radeon_gart_size +ffffffff83265010 D radeon_tv +ffffffff83265014 D radeon_audio +ffffffff83265018 D radeon_pcie_gen2 +ffffffff8326501c D radeon_msi +ffffffff83265020 D radeon_lockup_timeout +ffffffff83265024 D radeon_dpm +ffffffff83265028 D radeon_aspm +ffffffff8326502c D radeon_runtime_pm +ffffffff83265030 D radeon_vm_size +ffffffff83265034 D radeon_vm_block_size +ffffffff83265038 D radeon_use_pflipirq +ffffffff8326503c D radeon_bapm +ffffffff83265040 D radeon_backlight +ffffffff83265044 D radeon_auxch +ffffffff83265048 D radeon_uvd +ffffffff8326504c D radeon_vce +ffffffff83265050 D radeon_si_support +ffffffff83265054 D radeon_cik_support +ffffffff83265058 D radeondrm_cd +ffffffff83265078 D radeondrm_stdscreen +ffffffff832650a8 D radeondrm_scrlist +ffffffff832650b0 D radeondrm_screenlist +ffffffff832650c0 D radeondrm_accessops +ffffffff83266000 D radeon_bbops +ffffffff83267000 d radeon_bo_driver +ffffffff83268000 d verde_pg_init +ffffffff83269000 d cac_weights_pitcairn +ffffffff832694d0 d cac_weights_oland +ffffffff8326a000 d aldebaran_mode2_handler +ffffffff8326b000 d amdgpu_vbios_version_attrs +ffffffff8326c000 D amdgpu_asic_name +ffffffff8326d000 D amdgpu_gart_size +ffffffff8326d004 D amdgpu_gtt_size +ffffffff8326d008 D amdgpu_moverate +ffffffff8326d00c D amdgpu_audio +ffffffff8326d010 D amdgpu_pcie_gen2 +ffffffff8326d014 D amdgpu_msi +ffffffff8326d018 D amdgpu_dpm +ffffffff8326d01c D amdgpu_fw_load_type +ffffffff8326d020 D amdgpu_aspm +ffffffff8326d024 D amdgpu_runtime_pm +ffffffff8326d028 D amdgpu_ip_block_mask +ffffffff8326d02c D amdgpu_bapm +ffffffff8326d030 D amdgpu_vm_size +ffffffff8326d034 D amdgpu_vm_fragment_size +ffffffff8326d038 D amdgpu_vm_block_size +ffffffff8326d03c D amdgpu_vm_update_mode +ffffffff8326d040 D amdgpu_dc +ffffffff8326d044 D amdgpu_sched_jobs +ffffffff8326d048 D amdgpu_sched_hw_submission +ffffffff8326d050 D amdgpu_cg_mask +ffffffff8326d058 D amdgpu_pg_mask +ffffffff8326d05c D amdgpu_sdma_phase_quantum +ffffffff8326d060 D amdgpu_pp_feature_mask +ffffffff8326d064 D amdgpu_lbpw +ffffffff8326d068 D amdgpu_compute_multipipe +ffffffff8326d06c D amdgpu_gpu_recovery +ffffffff8326d070 D amdgpu_smu_pptable_id +ffffffff8326d074 D amdgpu_dc_feature_mask +ffffffff8326d078 D amdgpu_async_gfx_ring +ffffffff8326d07c D amdgpu_discovery +ffffffff8326d080 D amdgpu_noretry +ffffffff8326d084 D amdgpu_force_asic_type +ffffffff8326d088 D amdgpu_tmz +ffffffff8326d08c D amdgpu_reset_method +ffffffff8326d090 D amdgpu_num_kcq +ffffffff8326d094 D amdgpu_use_xgmi_p2p +ffffffff8326d098 D mgpu_info +ffffffff8326d248 D amdgpu_ras_enable +ffffffff8326d24c D amdgpu_ras_mask +ffffffff8326d250 D amdgpu_bad_page_threshold +ffffffff8326d254 D amdgpu_backlight +ffffffff8326d258 D amdgpu_cd +ffffffff8326d278 D amdgpu_stdscreen +ffffffff8326d2a8 D amdgpu_scrlist +ffffffff8326d2b0 D amdgpu_screenlist +ffffffff8326d2c0 D amdgpu_accessops +ffffffff8326e000 d amdgpu_gtt_mgr_attributes +ffffffff8326f000 D amdgpu_bbops +ffffffff83270000 D soc15_ih_clientid_name +ffffffff83271000 D ras_error_string +ffffffff83271030 D ras_block_string +ffffffff832710c0 D ras_mca_block_string +ffffffff83272000 d amdgpu_bo_driver +ffffffff83273000 d amdgpu_vram_mgr_attributes +ffffffff83274000 D amdgpu_xgmi_hive_type +ffffffff83274008 d xgmi_mutex +ffffffff83274018 D xgmi_ras_hw_ops +ffffffff83274058 D xgmi_ras +ffffffff83275000 d gfx_v9_0_ras +ffffffff83276000 D gfx_v9_4_ras +ffffffff83277000 D gfx_v9_4_2_ras_ops +ffffffff83277040 D gfx_v9_4_2_ras +ffffffff83278000 D hdp_v4_0_ras_hw_ops +ffffffff83278040 D hdp_v4_0_ras +ffffffff83279000 d jpeg_v2_6_ras +ffffffff8327a000 D mca_v3_0_mp0_ras +ffffffff8327a058 D mca_v3_0_mp1_ras +ffffffff8327a0b0 D mca_v3_0_mpio_ras +ffffffff8327b000 D mmhub_v1_0_ras_hw_ops +ffffffff8327b040 D mmhub_v1_0_ras +ffffffff8327c000 D mmhub_v1_7_ras_hw_ops +ffffffff8327c040 D mmhub_v1_7_ras +ffffffff8327d000 D mmhub_v9_4_ras +ffffffff8327e000 D nbio_v7_4_ras +ffffffff8327f000 d sriov_sc_video_codecs_encode +ffffffff8327f010 d sriov_sc_video_codecs_decode +ffffffff8327f020 d sriov_sc_video_codecs_encode_array +ffffffff8327f050 d sriov_sc_video_codecs_decode_array +ffffffff83280000 d sdma_v4_0_ras +ffffffff83281000 D sdma_v4_4_ras +ffffffff83282000 d sienna_cichlid_mode2_handler +ffffffff83283000 D umc_v6_1_ras +ffffffff83284000 D umc_v6_7_ras +ffffffff83285000 D umc_v8_10_ras +ffffffff83286000 D umc_v8_7_ras +ffffffff83287000 d vcn_v2_6_ras +ffffffff83288000 d amdgpu_dm_mode_config_helperfuncs +ffffffff83288010 d dm_atomic_state_funcs +ffffffff83289000 d construct_integrated_info.result +ffffffff83289004 d bios_parser_get_firmware_info.result +ffffffff8328a000 d dce_funcs +ffffffff8328b000 d dce110_funcs +ffffffff8328c000 d dce112_funcs +ffffffff8328d000 d dce120_funcs +ffffffff8328e000 d rv1_clk_funcs +ffffffff8328e088 d rv1_clk_internal_funcs +ffffffff8328f000 d rv2_clk_internal_funcs +ffffffff83290000 d dcn2_funcs +ffffffff83291000 D dcn201_funcs +ffffffff83292000 d dcn21_funcs +ffffffff83292088 d rn_bw_params +ffffffff83293000 D dcn3_fpga_funcs +ffffffff83293088 d dcn3_funcs +ffffffff83294000 d vg_funcs +ffffffff83294088 d dummy_clocks +ffffffff832941b8 d vg_bw_params +ffffffff83295000 d dcn31_bw_params +ffffffff832952a0 d dcn31_funcs +ffffffff83296000 d dcn314_bw_params +ffffffff832962a0 d dcn314_funcs +ffffffff83297000 d dcn315_funcs +ffffffff83297088 d dcn315_bw_params +ffffffff83298000 d dcn316_funcs +ffffffff83298088 d dcn316_bw_params +ffffffff83299000 d dcn32_funcs +ffffffff8329a000 d dcn10_dpp_cap +ffffffff8329b000 D aperture_default_system +ffffffff8329c000 d dcn20_dpp_cap +ffffffff8329c010 d dcn20_dpp_funcs +ffffffff8329d000 d dcn20_hubp_funcs +ffffffff8329e000 d dcn20_opp_funcs +ffffffff8329f000 d dcn20_tg_funcs +ffffffff832a0000 d dcn201_dpp_funcs +ffffffff832a0110 d dcn201_dpp_cap +ffffffff832a1000 d dcn201_hubp_funcs +ffffffff832a2000 d dcn201_opp_funcs +ffffffff832a3000 d dcn201_tg_funcs +ffffffff832a4000 D dcn201_ip +ffffffff832a41b8 D dcn201_soc +ffffffff832a4b88 d dcn201_res_pool_funcs +ffffffff832a5000 d dcn21_hubp_funcs +ffffffff832a6000 d dcn30_afmt_funcs +ffffffff832a7000 d dcn30_dpp_cap +ffffffff832a7010 d dcn30_dpp_funcs +ffffffff832a8000 d dcn30_hubp_funcs +ffffffff832a9000 d dcn30_tg_funcs +ffffffff832aa000 d dcn30_vpg_funcs +ffffffff832ab000 d res_cap_dcn301 +ffffffff832ab040 d dcn301_res_pool_funcs +ffffffff832ac000 d dcn302_res_pool_funcs +ffffffff832ad000 d dcn303_res_pool_funcs +ffffffff832ae000 d dcn31_afmt_funcs +ffffffff832af000 d dcn31_apg_funcs +ffffffff832b0000 d dcn31_hpo_dp_link_encoder_funcs +ffffffff832b1000 d dcn31_hubp_funcs +ffffffff832b2000 d dcn31_tg_funcs +ffffffff832b3000 d dcn31_res_pool_funcs +ffffffff832b4000 d dcn31_vpg_funcs +ffffffff832b5000 d dcn314_tg_funcs +ffffffff832b6000 d dcn314_res_pool_funcs +ffffffff832b7000 d dcn315_res_pool_funcs +ffffffff832b8000 d dcn316_res_pool_funcs +ffffffff832b9000 d dcn32_dpp_funcs +ffffffff832b9110 d dcn32_dpp_cap +ffffffff832ba000 d dcn32_hpo_dp_link_encoder_funcs +ffffffff832bb000 d dcn32_hubp_funcs +ffffffff832bc000 d dcn32_tg_funcs +ffffffff832bd000 d dcn32_res_pool_funcs +ffffffff832be000 d dcn321_res_pool_funcs +ffffffff832bf000 D dcn1_0_ip +ffffffff832bf1b8 D dcn1_0_soc +ffffffff832c0000 D dcn2_0_ip +ffffffff832c01b8 D dcn2_0_nv14_ip +ffffffff832c0370 D dcn2_0_soc +ffffffff832c0d40 D dcn2_0_nv14_soc +ffffffff832c1710 D dcn2_1_ip +ffffffff832c18c8 D dcn2_1_soc +ffffffff832c2298 D ddr4_wm_table_gs +ffffffff832c2358 D lpddr4_wm_table_gs +ffffffff832c2418 D lpddr4_wm_table_with_disabled_ppt +ffffffff832c24d8 D ddr4_wm_table_rn +ffffffff832c2598 D ddr4_1R_wm_table_rn +ffffffff832c2658 D lpddr4_wm_table_rn +ffffffff832c3000 D dcn3_0_ip +ffffffff832c31b8 D dcn3_0_soc +ffffffff832c4000 D dcn3_01_ip +ffffffff832c41b8 D dcn3_01_soc +ffffffff832c4b88 D ddr4_wm_table +ffffffff832c4c48 D lpddr5_wm_table +ffffffff832c5000 D dcn3_02_ip +ffffffff832c51b8 D dcn3_02_soc +ffffffff832c6000 D dcn3_03_ip +ffffffff832c61b8 D dcn3_03_soc +ffffffff832c7000 D dcn3_1_ip +ffffffff832c71b8 D dcn3_15_ip +ffffffff832c7370 D dcn3_16_ip +ffffffff832c7528 d dcn3_15_soc +ffffffff832c7ef8 d dcn3_1_soc +ffffffff832c88c8 d dcn3_16_soc +ffffffff832ca000 D dcn3_14_ip +ffffffff832ca1b8 D dcn3_14_soc +ffffffff832cb000 D dcn3_2_ip +ffffffff832cb1b8 D dcn3_2_soc +ffffffff832cc000 D dcn3_21_ip +ffffffff832cc1b8 D dcn3_21_soc +ffffffff832cd000 d dsc_policy_max_target_bpp_limit +ffffffff832ce000 D DIDTEDCConfig_P12 +ffffffff832ce070 d smu7_profiling +ffffffff832cf000 d cyan_skillfish_table_map +ffffffff832cf080 d cyan_skillfish_message_map +ffffffff832d0000 d navi10_table_map +ffffffff832d0080 d navi10_pwr_src_map +ffffffff832d0090 d navi10_workload_map +ffffffff832d00d0 d navi10_message_map +ffffffff832d0b20 d navi10_clk_map +ffffffff832d0be0 d navi10_feature_mask_map +ffffffff832d1000 d sienna_cichlid_message_map +ffffffff832d1a50 d sienna_cichlid_table_map +ffffffff832d1ad0 d sienna_cichlid_pwr_src_map +ffffffff832d1ae0 d sienna_cichlid_workload_map +ffffffff832d1b20 d sienna_cichlid_clk_map +ffffffff832d1be0 d sienna_cichlid_feature_mask_map +ffffffff832d2000 d vangogh_message_map +ffffffff832d2a50 d vangogh_table_map +ffffffff832d2ad0 d vangogh_workload_map +ffffffff832d2b10 d vangogh_feature_mask_map +ffffffff832d3000 d renoir_table_map +ffffffff832d3080 d renoir_workload_map +ffffffff832d30c0 d renoir_message_map +ffffffff832d3b10 d renoir_clk_map +ffffffff832d4000 d smu_v13_0_0_message_map +ffffffff832d4a50 d smu_v13_0_0_feature_mask_map +ffffffff832d4e20 d smu_v13_0_0_table_map +ffffffff832d4ea0 d smu_v13_0_0_pwr_src_map +ffffffff832d4eb0 d smu_v13_0_0_workload_map +ffffffff832d4ef0 d smu_v13_0_0_clk_map +ffffffff832d5000 d smu_v13_0_4_message_map +ffffffff832d5a50 d smu_v13_0_4_table_map +ffffffff832d5ad0 d smu_v13_0_4_feature_mask_map +ffffffff832d6000 d smu_v13_0_5_table_map +ffffffff832d6080 d smu_v13_0_5_message_map +ffffffff832d6ad0 d smu_v13_0_5_feature_mask_map +ffffffff832d7000 d smu_v13_0_7_message_map +ffffffff832d7a50 d smu_v13_0_7_feature_mask_map +ffffffff832d7e20 d smu_v13_0_7_table_map +ffffffff832d7ea0 d smu_v13_0_7_pwr_src_map +ffffffff832d7eb0 d smu_v13_0_7_workload_map +ffffffff832d7ef0 d smu_v13_0_7_clk_map +ffffffff832d8000 d yellow_carp_table_map +ffffffff832d8080 d yellow_carp_message_map +ffffffff832d8ad0 d yellow_carp_feature_mask_map +ffffffff832d9000 D pci_conf_lock +ffffffff832d9010 D pci_bus_dma_tag +ffffffff832d9088 D msi_pic +ffffffff832d9118 D msix_pic +ffffffff832da000 D pchb_cd +ffffffff832db000 D amas_cd +ffffffff832dc000 D cardslot_cd +ffffffff832dd000 D cardbus_cd +ffffffff832de000 d csdevs +ffffffff832df000 d ral_rt2560_opns +ffffffff832df028 d ral_rt2661_opns +ffffffff832df050 d ral_rt2860_opns +ffffffff832e0000 D pcmcia_cd +ffffffff832e1000 D pcmcia_3cxem556_func0 +ffffffff832e10b8 D pcmcia_3cxem556_func0_cfe0 +ffffffff832e1158 D pcmcia_megahertz_xjem1144_func0 +ffffffff832e1210 D pcmcia_megahertz_xjem1144_func0_cfe0 +ffffffff832e12b0 d pcmcia_3cxem556_func1 +ffffffff832e1368 d pcmcia_3cxem556_func1_cfe0 +ffffffff832e1408 d pcmcia_megahertz_xjem1144_func1 +ffffffff832e14c0 d pcmcia_megahertz_xjem1144_func1_cfe0 +ffffffff832e1560 d pcmcia_sierra_a555_func1 +ffffffff832e1618 d pcmcia_sierra_a555_func1_cfe0 +ffffffff832e16b8 d pcmcia_sveclancard_func0 +ffffffff832e1770 d pcmcia_sveclancard_func0_cfe0 +ffffffff832e2000 D ep_pcmcia_prod +ffffffff832e3000 D aic_pcmcia_prod +ffffffff832e4000 D com_pcmcia_prod +ffffffff832e5000 D wdc_pcmcia_pr +ffffffff832e6000 D sm_pcmcia_prod +ffffffff832e7000 D xe_cd +ffffffff832e8000 D pcib_cd +ffffffff832e9000 D amdpcib_cd +ffffffff832ea000 D tcpcib_cd +ffffffff832eb000 D aapic_cd +ffffffff832ec000 D hme_cd +ffffffff832ed000 D isa_cd +ffffffff832ee000 D isadma_cd +ffffffff832ef000 D fdc_cd +ffffffff832f0000 D fd_types +ffffffff832f01f8 D fd_cd +ffffffff832f1000 D mpu_cd +ffffffff832f2000 D pcppi_cd +ffffffff832f3000 D spkr_cd +ffffffff832f4000 D wbsio_cd +ffffffff832f5000 D schsio_cd +ffffffff832f6000 D it_cd +ffffffff832f7000 D uguru_cd +ffffffff832f8000 D aps_cd +ffffffff832f9000 D isa_bus_dma_tag +ffffffff832fa000 D wsdisplay_cd +ffffffff832fa020 D wsdisplay_cons +ffffffff832fa058 D wsdisplay_defaultscreens +ffffffff832fb000 D wskbd_cd +ffffffff832fb020 D wskbd_default_bell_data +ffffffff832fb030 D wskbd_default_keyrepeat_data +ffffffff832fb040 D wskbd_srcops +ffffffff832fc000 d compose_tab +ffffffff832fd000 D wsmouse_cd +ffffffff832fd020 D wsmouse_srcops +ffffffff832fe000 D wsmux_srcops +ffffffff832fe030 D wsmux_tree_lock +ffffffff832ff000 D vt100_output +ffffffff83300000 D pckbd_cd +ffffffff83301000 D pms_cd +ffffffff83301020 d synaptics_params +ffffffff83301030 d alps_params +ffffffff83302000 D skgpio_cd +ffffffff83303000 D pctr_conf_lock +ffffffff83304000 D ukbd_keymapdata +ffffffff83305000 D usbrev_str +ffffffff83305030 D usb_cd +ffffffff83306000 d usbd_ratecheck.errinterval +ffffffff83307000 D uhub_cd +ffffffff83308000 D uaudio_cd +ffffffff83309000 D uvideo_ctrls +ffffffff833092d8 D uvideo_cd +ffffffff8330a000 D utvfu_norm_params +ffffffff8330a030 D utvfu_cd +ffffffff8330b000 D udl_reg_vals_640x480_60 +ffffffff8330b020 D udl_reg_vals_640x480_67 +ffffffff8330b040 D udl_reg_vals_640x480_72 +ffffffff8330b060 D udl_reg_vals_640x480_75 +ffffffff8330b080 D udl_reg_vals_800x480_61 +ffffffff8330b0a0 D udl_reg_vals_800x600_56 +ffffffff8330b0c0 D udl_reg_vals_800x600_60 +ffffffff8330b0e0 D udl_reg_vals_800x600_72 +ffffffff8330b100 D udl_reg_vals_800x600_74 +ffffffff8330b120 D udl_reg_vals_800x600_75 +ffffffff8330b140 D udl_reg_vals_1024x768_60 +ffffffff8330b160 D udl_reg_vals_1024x768_70 +ffffffff8330b180 D udl_reg_vals_1024x768_75 +ffffffff8330b1a0 D udl_reg_vals_1280x800_60 +ffffffff8330b1c0 D udl_reg_vals_1280x960_60 +ffffffff8330b1e0 D udl_reg_vals_1280x1024_60 +ffffffff8330b200 D udl_reg_vals_1280x1024_75 +ffffffff8330b220 D udl_reg_vals_1366x768_60 +ffffffff8330b240 D udl_reg_vals_1440x900_60 +ffffffff8330b260 D udl_reg_vals_1440x900_59 +ffffffff8330b280 D udl_reg_vals_1440x900_75 +ffffffff8330b2a0 D udl_reg_vals_1680x1050_60 +ffffffff8330b2c0 D udl_reg_vals_1600x1200_60 +ffffffff8330b2e0 D udl_reg_vals_1920x1080_60 +ffffffff8330b300 D udl_null_key_1 +ffffffff8330b310 D udl_decomp_table +ffffffff8330c510 D udl_cd +ffffffff8330c530 D udl_stdscreen +ffffffff8330c560 D udl_scrlist +ffffffff8330c568 D udl_screenlist +ffffffff8330c578 D udl_accessops +ffffffff8330d000 D umidi_cd +ffffffff8330e000 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE +ffffffff8330e020 d umq_ROLAND_ROLAND_UM1_2 +ffffffff8330e040 d umq_ROLAND_ROLAND_SC8850_2 +ffffffff8330e060 d umq_ROLAND_ROLAND_SD90_2 +ffffffff8330e080 d umq_ROLAND_ROLAND_UM880N_0 +ffffffff8330e0a0 d umq_ROLAND_ROLAND_UA100_2 +ffffffff8330e0c0 d umq_ROLAND_ROLAND_UM4_2 +ffffffff8330e0e0 d umq_ROLAND_ROLAND_U8_2 +ffffffff8330e100 d umq_ROLAND_ROLAND_UM2_2 +ffffffff8330e120 d umq_ROLAND_ROLAND_SC8820_2 +ffffffff8330e140 d umq_ROLAND_ROLAND_PC300_2 +ffffffff8330e160 d umq_ROLAND_ROLAND_SK500_2 +ffffffff8330e180 d umq_ROLAND_ROLAND_SCD70_2 +ffffffff8330e1a0 d umq_ROLAND_ROLAND_UM550_0 +ffffffff8330e1c0 d umq_ROLAND_ROLAND_SD20_0 +ffffffff8330e1e0 d umq_ROLAND_ROLAND_SD80_0 +ffffffff8330e200 d umq_ROLAND_ROLAND_UA700_3 +ffffffff8330e220 d umq_ROLAND_ROLAND_UMONE_ANYIFACE +ffffffff8330e240 D umidi_quirklist +ffffffff8330e4a0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_desc +ffffffff8330e4c0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_endpoints +ffffffff8330e4d0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_desc +ffffffff8330e4f0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_endpoints +ffffffff8330e500 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_desc +ffffffff8330e520 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_endpoints +ffffffff8330e530 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_desc +ffffffff8330e550 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_endpoints +ffffffff8330e560 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_desc +ffffffff8330e580 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_endpoints +ffffffff8330e590 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_desc +ffffffff8330e5b0 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_endpoints +ffffffff8330e5c0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_desc +ffffffff8330e5e0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_endpoints +ffffffff8330e5f0 d umq_ROLAND_ROLAND_U8_2_fixed_ep_desc +ffffffff8330e610 d umq_ROLAND_ROLAND_U8_2_fixed_ep_endpoints +ffffffff8330e620 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_desc +ffffffff8330e640 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_endpoints +ffffffff8330e650 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_desc +ffffffff8330e670 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_endpoints +ffffffff8330e680 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_desc +ffffffff8330e6a0 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_endpoints +ffffffff8330e6b0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_desc +ffffffff8330e6d0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_endpoints +ffffffff8330e6e0 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_desc +ffffffff8330e700 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_endpoints +ffffffff8330e710 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_desc +ffffffff8330e730 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_endpoints +ffffffff8330e740 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_desc +ffffffff8330e760 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_endpoints +ffffffff8330e770 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_desc +ffffffff8330e790 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_endpoints +ffffffff8330e7a0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_desc +ffffffff8330e7c0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_endpoints +ffffffff8330e7d0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_desc +ffffffff8330e7f0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_endpoints +ffffffff8330f000 D ucom_cd +ffffffff83310000 D ugen_cd +ffffffff83311000 D uhidev_cd +ffffffff83311020 d uhidev_use_rdesc.reportbuf +ffffffff83312000 D uhid_cd +ffffffff83313000 D fido_cd +ffffffff83314000 D ujoy_cd +ffffffff83315000 D ukbd_cd +ffffffff83316000 D ums_cd +ffffffff83316020 d ums_fix_elecom_descriptor.match +ffffffff83317000 D umt_cd +ffffffff83318000 D def_scale +ffffffff83318020 D uts_cd +ffffffff83319000 D ubcmtp_cd +ffffffff8331a000 D ucycom_cd +ffffffff8331b000 D uslhcom_cd +ffffffff8331c000 D ulpt_fwdevs +ffffffff8331c060 D ulpt_cd +ffffffff8331c080 D ulptusein +ffffffff8331d000 D umass_cd +ffffffff8331d020 d umass_bbb_transfer.dCBWtag +ffffffff8331e000 D uthum_cd +ffffffff8331f000 D ugold_cd +ffffffff8331f020 d cmd_init +ffffffff8331f028 d cmd_type +ffffffff8331f030 d cmd_data +ffffffff83320000 D utrh_cd +ffffffff83321000 D uoakrh_cd +ffffffff83322000 D uoaklux_cd +ffffffff83323000 D uoakv_cd +ffffffff83324000 D uonerng_cd +ffffffff83325000 D urng_cd +ffffffff83326000 D udcf_cd +ffffffff83327000 D umbg_cd +ffffffff83328000 D uvisor_cd +ffffffff83329000 D udsbr_cd +ffffffff8332a000 D utwitch_cd +ffffffff8332b000 D aue_cd +ffffffff8332c000 D axe_cd +ffffffff8332d000 D axen_cd +ffffffff8332e000 D smsc_cd +ffffffff8332f000 D cue_devs +ffffffff8332f010 D cue_cd +ffffffff83330000 D kue_cd +ffffffff83331000 D cdce_cd +ffffffff83332000 D urndis_cd +ffffffff83333000 D mos_cd +ffffffff83334000 D mue_cd +ffffffff83335000 D udav_cd +ffffffff83336000 D upl_devs +ffffffff83336008 D upl_cd +ffffffff83337000 D ugl_devs +ffffffff83337008 D ugl_cd +ffffffff83338000 D url_cd +ffffffff83339000 D ure_cd +ffffffff8333a000 D uaq_cd +ffffffff8333b000 D umodem_cd +ffffffff8333c000 D uftdi_cd +ffffffff8333d000 D uplcom_cd +ffffffff8333e000 D umct_cd +ffffffff8333f000 D uvscom_cd +ffffffff83340000 D ubsa_cd +ffffffff83341000 D ukspan_cd +ffffffff83342000 D uslcom_cd +ffffffff83343000 D uark_cd +ffffffff83344000 D moscom_cd +ffffffff83345000 D umcs_cd +ffffffff83346000 D uscom_cd +ffffffff83347000 D ucrcom_cd +ffffffff83348000 D uxrcom_cd +ffffffff83349000 D uipaq_cd +ffffffff8334a000 D umsm_cd +ffffffff8334b000 D uchcom_cd +ffffffff8334c000 D uticom_cd +ffffffff8334d000 D wi_func_usb +ffffffff8334d060 D wi_usb_cd +ffffffff8334e000 D atu_cd +ffffffff8334e020 D atu_devs +ffffffff8334e270 D atu_radfirm +ffffffff8334f000 D ural_cd +ffffffff83350000 D rum_cd +ffffffff83351000 D run_cd +ffffffff83351020 D rt3070_freqs +ffffffff83352000 D mtw_cd +ffffffff83353000 D zyd_cd +ffffffff83354000 D upgt_cd +ffffffff83355000 D urtw_cd +ffffffff83356000 D urtwn_cd +ffffffff83357000 D rsu_cd +ffffffff83358000 D otus_cd +ffffffff83358020 d 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+ffffffff836c8820 b pci_intr_string.irqstr +ffffffff836c8860 B pciio_ex +ffffffff836c8868 B pcimem_ex +ffffffff836c8870 B pcibus_ex +ffffffff836c9000 b ddb_vgapostp +ffffffff836ca000 B cardsloteventpool +ffffffff836cb000 B rbus_null +ffffffff836cc000 B pcmcia_verbose +ffffffff836cd000 B isa_mem_head +ffffffff836cd008 B isa_dev +ffffffff836cd010 B isadma_dmam +ffffffff836ce000 b spkr_attached +ffffffff836ce008 b ppicookie +ffffffff836ce010 b spkr_active +ffffffff836ce018 b spkr_inbuf +ffffffff836ce020 b octave +ffffffff836ce024 b whole +ffffffff836ce028 b fill +ffffffff836ce02c b value +ffffffff836ce030 b octtrack +ffffffff836ce034 b octprefix +ffffffff836cf000 B it_softc_list +ffffffff836d0000 B aps_timeout +ffffffff836d1000 B intrtype +ffffffff836d1040 B intrhand +ffffffff836d10c0 B isa_dma_stats_loads +ffffffff836d10c8 B isa_dma_stats_bounces +ffffffff836d10d0 B isa_dma_stats_nbouncebufs +ffffffff836d10e0 B intrlevel +ffffffff836d2000 B wsdisplay_console_conf +ffffffff836d2028 B wsdisplay_console_initted +ffffffff836d2030 B wsdisplay_console_device +ffffffff836d2038 B wsdisplay_clearonclose +ffffffff836d203c B wsdisplay_cons_pollmode +ffffffff836d2040 B wsdisplay_cons_kbd_pollc +ffffffff836d2048 B ws_get_param +ffffffff836d2050 B ws_set_param +ffffffff836d3000 b wskbd_console_data +ffffffff836d3040 b wskbd_console_initted +ffffffff836d3048 b wskbd_console_device +ffffffff836d3050 B wskbd_get_backlight +ffffffff836d3058 B wskbd_set_backlight +ffffffff836d3060 b wskbd_cngetc.num +ffffffff836d3064 b wskbd_cngetc.pos +ffffffff836d4000 b compose_tab_inorder +ffffffff836d5000 B nwsmux +ffffffff836d5008 B wsmuxdevs +ffffffff836d6000 B wsemul_vt100_console_emuldata +ffffffff836d7000 B pckbd_consdata +ffffffff836d7038 B pckbd_bell_fn +ffffffff836d7040 B pckbd_bell_fn_arg +ffffffff836d8000 b wscninit.initted +ffffffff836d9000 B pctr_isamd +ffffffff836d9004 B pctr_isintel +ffffffff836d9008 B pctr_intel_cap +ffffffff836d9010 B pctr_fn +ffffffff836da000 b nvram_initialized +ffffffff836db000 B hidkbd_is_console +ffffffff836db008 B hidkbd_bell_fn +ffffffff836db010 B hidkbd_bell_fn_arg +ffffffff836dc000 B usb_task_thread_proc +ffffffff836dc008 B usb_abort_task_thread_proc +ffffffff836dc010 b usb_nbuses +ffffffff836dc018 B usbpalock +ffffffff836dc028 B usb_abort_tasks +ffffffff836dc038 B usb_explore_tasks +ffffffff836dc048 B usb_generic_tasks +ffffffff836dc058 b usb_run_abort_tasks +ffffffff836dc05c b usb_run_tasks +ffffffff836dc060 B explore_pending +ffffffff836dd000 B usb_blk_freelist +ffffffff836dd008 B usb_blk_nfree +ffffffff836dd010 B usb_frag_freelist +ffffffff836de000 b usbd_errstr.buffer +ffffffff836de008 b usb_delay_ms.usb_delay_wchan +ffffffff836de010 b usbd_probe_and_attach.cookie +ffffffff836df000 b t_wait +ffffffff836df004 b t_trust +ffffffff836e0000 B umb_session_id +ffffffff836e0010 b umb_val2descr.sval +ffffffff836e1000 b probe_ic +ffffffff836e1008 b probe_addr +ffffffff836e1010 b probe_val +ffffffff836e1110 B skip_fc +ffffffff836e1118 B ignore_addrs +ffffffff836e1120 b iic_dump.iicvalcnt +ffffffff836e2000 B acpi_softc +ffffffff836e2008 B acpiwqpool +ffffffff836e21b0 B acpi_enabled +ffffffff836e21b4 b acpi_maptable.tblid +ffffffff836e21b8 b acpi_add_device.nacpicpus +ffffffff836e21bc B acpi_force_bm +ffffffff836e21c0 B mouse_has_softbtn +ffffffff836e21c4 B acpi_evindex +ffffffff836e21c8 B acpi_poll_enabled +ffffffff836e21cc B acpi_hasprocfvs +ffffffff836e21d0 B acpi_haspci +ffffffff836e3000 B aml_root +ffffffff836e3060 B aml_lastscope +ffffffff836e3068 B aml_ophash +ffffffff836e3070 b aml_mnem.mnemstr +ffffffff836e3090 B aml_notify_list +ffffffff836e3098 B acpi_nalloc +ffffffff836e30a0 b acpi_sleep.acpinowait +ffffffff836e30b0 b aml_nodename.namebuf +ffffffff836e3130 b aml_getname.namebuf +ffffffff836e31b0 b aml_getname.p +ffffffff836e31b8 b global_lock_count +ffffffff836e31c0 b aml_eisaid.id +ffffffff836e31c8 B aml_global_lock +ffffffff836e31d0 b aml_mapresource.map +ffffffff836e3210 b aml_val_to_string.buffer +ffffffff836e3310 B aml_error +ffffffff836e3314 B odp +ffffffff836e3318 B maxdp +ffffffff836e331c B aml_busy +ffffffff836e4000 B scope +ffffffff836e5000 B acpibtn_lids +ffffffff836e6000 B cst_stats +ffffffff836e7000 B acpihpet_attached +ffffffff836e8000 b acpiec_wait.acpiecnowait +ffffffff836e9000 B acpitz_cpu_setperf +ffffffff836ea000 B acpimadt_busses +ffffffff836ed000 B acpimadt_isa_bus +ffffffff836ed030 b lapic_map +ffffffff836ee000 B acpidmar_ddb +ffffffff836ee010 b dmar_bdf.bdf +ffffffff836ee030 B acpidmar_sc +ffffffff836ee038 B domain_map_page +ffffffff836ee040 b dom_bdf.mmm +ffffffff836ee070 b iommu_init.niommu +ffffffff836ee078 b acpidmar_pci_attach.dom +ffffffff836ee080 b sid_flag +ffffffff8372e080 b ivhd_showpage.show +ffffffff8372e084 b ivhd_iommu_init.niommu +ffffffff8372e088 b acpidmar_intr.ofe.0 +ffffffff8372e090 b acpidmar_intr.ofe.1 +ffffffff8372f000 b dwiic_i2c_intr_string.irqstr +ffffffff83730000 B acpihve_attached +ffffffff83731000 B efi_jmpbuf +ffffffff83732000 B l1tf_flush_region +ffffffff83732008 B vm_pool +ffffffff837321b0 B vcpu_pool +ffffffff83732358 B vmm_softc +ffffffff83733000 B sdmmc_verbose +ffffffff83734000 B utc_offset +ffffffff83734008 B bufpages +ffffffff83734010 B utsname +ffffffff83735000 B mountroot +ffffffff83736000 B __kernel_bss_end ffffffff83800000 B _end ffffffff83800000 B end