--- 7.2/2023-03-07T08:37:51Z/2023-02-11T23:10:25Z/nm-bsd-ot14.txt Tue Mar 7 17:41:51 2023 +++ 7.2/2023-03-07T08:37:51Z/2023-02-11T23:22:19Z/nm-bsd-ot14.txt Tue Mar 7 19:38:38 2023 @@ -2,14 +2,14 @@ 00011006 A mp_pdirpa 0001419d A acpi_pdirpa 01000000 A __kernel_phys_base -02516000 T __kernel_kutext_phys -0251a000 C __kernel_cptext_phys -0251b000 C __kernel_rodata_phys -02dcc000 R __kernel_kutext_page_phys -02dce000 C __kernel_randomdata_phys -03090000 R __kernel_data_phys -033bf000 D __kernel_kudata_phys -033c0000 C __kernel_bss_phys +02515000 T __kernel_kutext_phys +02519000 C __kernel_cptext_phys +0251a000 C __kernel_rodata_phys +02dcb000 R __kernel_kutext_page_phys +02dcd000 C __kernel_randomdata_phys +0308f000 R __kernel_data_phys +033be000 D __kernel_kudata_phys +033bf000 C __kernel_bss_phys 03800000 B __kernel_phys_end 80000000 A __kernel_virt_to_phys ffffffff80000000 A __kernel_base @@ -7155,22009 +7155,22012 @@ ffffffff813441a0 T sys_unlink ffffffff813441c0 T dounlinkat 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drm_vma_offset_add -ffffffff8196a170 T drm_vma_offset_remove -ffffffff8196a1c0 T drm_vma_node_allow -ffffffff8196a1d0 t vma_node_allow -ffffffff8196a300 T drm_vma_node_allow_once -ffffffff8196a310 T drm_vma_node_revoke -ffffffff8196a390 T drm_vma_node_is_allowed -ffffffff8196b000 T hdmi_avi_infoframe_init -ffffffff8196b070 T hdmi_avi_infoframe_check -ffffffff8196b0c0 T hdmi_avi_infoframe_pack_only -ffffffff8196b2c0 T hdmi_avi_infoframe_pack -ffffffff8196b320 T hdmi_spd_infoframe_init -ffffffff8196b3d0 T hdmi_spd_infoframe_check -ffffffff8196b420 T hdmi_spd_infoframe_pack_only -ffffffff8196b550 T hdmi_spd_infoframe_pack -ffffffff8196b6a0 T hdmi_audio_infoframe_init -ffffffff8196b6f0 T hdmi_audio_infoframe_check -ffffffff8196b740 T hdmi_audio_infoframe_pack_only -ffffffff8196b890 T hdmi_audio_infoframe_pack -ffffffff8196b8e0 T hdmi_audio_infoframe_pack_for_dp -ffffffff8196b9d0 T hdmi_vendor_infoframe_init -ffffffff8196ba30 T hdmi_vendor_infoframe_check -ffffffff8196bad0 T hdmi_vendor_infoframe_pack_only -ffffffff8196bca0 T hdmi_vendor_infoframe_pack -ffffffff8196bd40 T hdmi_drm_infoframe_init -ffffffff8196bda0 T hdmi_drm_infoframe_check -ffffffff8196bdf0 T hdmi_drm_infoframe_pack_only -ffffffff8196bfc0 T hdmi_drm_infoframe_pack -ffffffff8196c010 T hdmi_infoframe_check -ffffffff8196c160 T hdmi_infoframe_pack_only -ffffffff8196c370 T hdmi_infoframe_pack -ffffffff8196c4e0 T hdmi_infoframe_log -ffffffff8196d480 T hdmi_drm_infoframe_unpack_only -ffffffff8196d560 T hdmi_infoframe_unpack -ffffffff8196e000 T list_sort -ffffffff8196f000 T radix_tree_lookup -ffffffff8196f0b0 T radix_tree_iter_find -ffffffff8196f190 T radix_tree_delete -ffffffff8196f320 T radix_tree_iter_delete -ffffffff8196f340 T radix_tree_insert -ffffffff81970000 T sort -ffffffff81970040 t qsort -ffffffff81972000 T drm_dp_dual_mode_read -ffffffff81972110 T drm_dp_dual_mode_write -ffffffff819721f0 T drm_dp_dual_mode_detect -ffffffff81972490 T drm_dp_dual_mode_max_tmds_clock -ffffffff819725b0 T drm_dp_dual_mode_get_tmds_output -ffffffff819726e0 T drm_dp_dual_mode_set_tmds_output -ffffffff81972970 T drm_dp_get_dual_mode_type_name -ffffffff819729e0 T drm_lspcon_get_mode -ffffffff81972b90 T drm_lspcon_set_mode -ffffffff81973000 T drm_dp_channel_eq_ok -ffffffff81973080 T drm_dp_clock_recovery_ok -ffffffff81973100 T drm_dp_get_adjust_request_voltage -ffffffff81973140 T drm_dp_get_adjust_request_pre_emphasis -ffffffff81973180 T drm_dp_get_adjust_tx_ffe_preset -ffffffff819731c0 T drm_dp_128b132b_lane_channel_eq_done -ffffffff81973240 T drm_dp_128b132b_lane_symbol_locked -ffffffff819732b0 T drm_dp_128b132b_eq_interlane_align_done -ffffffff819732e0 T drm_dp_128b132b_cds_interlane_align_done -ffffffff81973310 T drm_dp_128b132b_link_training_failed -ffffffff81973340 T drm_dp_read_clock_recovery_delay -ffffffff81973440 T drm_dp_read_channel_eq_delay -ffffffff81973530 T drm_dp_128b132b_read_aux_rd_interval -ffffffff819735e0 T drm_dp_link_train_clock_recovery_delay -ffffffff81973660 t __8b10b_clock_recovery_delay_us -ffffffff819736e0 T drm_dp_link_train_channel_eq_delay -ffffffff81973750 T drm_dp_phy_name -ffffffff81973790 T drm_dp_lttpr_link_train_clock_recovery_delay -ffffffff819737b0 T drm_dp_lttpr_link_train_channel_eq_delay -ffffffff81973820 T drm_dp_link_rate_to_bw_code -ffffffff81973880 T drm_dp_bw_code_to_link_rate -ffffffff819738e0 T drm_dp_dpcd_probe -ffffffff81973a20 t drm_dp_dpcd_access -ffffffff81973b50 T drm_dp_dpcd_read -ffffffff81973c80 T drm_dp_dpcd_write -ffffffff81973d90 T drm_dp_dpcd_read_link_status -ffffffff81973db0 T drm_dp_dpcd_read_phy_link_status -ffffffff81973eb0 T drm_dp_downstream_is_type -ffffffff81973ef0 T drm_dp_downstream_is_tmds -ffffffff81973f60 T drm_dp_send_real_edid_checksum -ffffffff819741c0 T drm_dp_read_dpcd_caps -ffffffff81974350 T drm_dp_read_downstream_info -ffffffff81974450 T drm_dp_downstream_max_dotclock -ffffffff819744a0 T drm_dp_downstream_max_tmds_clock -ffffffff81974540 T drm_dp_downstream_min_tmds_clock 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drm_dp_pcon_hdmi_frl_link_error_count -ffffffff81975f30 T drm_dp_pcon_enc_is_dsc_1_2 -ffffffff81975f60 T drm_dp_pcon_dsc_max_slices -ffffffff81975ff0 T drm_dp_pcon_dsc_max_slice_width -ffffffff81976020 T drm_dp_pcon_dsc_bpp_incr -ffffffff81976060 T drm_dp_pcon_pps_default -ffffffff819760e0 T drm_dp_pcon_pps_override_buf -ffffffff81976190 T drm_dp_pcon_pps_override_param -ffffffff81976270 T drm_dp_pcon_convert_rgb_to_ycbcr -ffffffff81976300 T drm_edp_backlight_set_level -ffffffff819763e0 T drm_edp_backlight_enable -ffffffff819765f0 t drm_edp_backlight_set_enable -ffffffff81976730 T drm_edp_backlight_disable -ffffffff81976770 T drm_edp_backlight_init -ffffffff81976cc0 T drm_panel_dp_aux_backlight -ffffffff81976e50 t __128b132b_channel_eq_delay_us -ffffffff81976ed0 t __8b10b_channel_eq_delay_us -ffffffff81976f50 t drm_dp_aux_get_crc -ffffffff81977020 t drm_dp_i2c_xfer -ffffffff81977270 t drm_dp_i2c_functionality -ffffffff819772a0 t drm_dp_i2c_do_msg -ffffffff81977680 t lock_bus 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drm_dp_add_payload_part2 -ffffffff8197a310 T drm_dp_get_vc_payload_bw -ffffffff8197a3a0 T drm_dp_read_mst_cap -ffffffff8197a400 T drm_dp_mst_topology_mgr_set_mst -ffffffff8197a690 t drm_dp_dpcd_write_payload -ffffffff8197a820 t drm_dp_mst_topology_put_mstb -ffffffff8197a920 T drm_dp_mst_topology_mgr_suspend -ffffffff8197a9e0 t drm_dp_mst_topology_mgr_invalidate_mstb -ffffffff8197aa50 T drm_dp_mst_topology_mgr_resume -ffffffff8197ac90 T drm_dp_mst_hpd_irq -ffffffff8197bb10 T drm_dp_mst_detect_port -ffffffff8197bc80 T drm_dp_mst_get_edid -ffffffff8197bd80 T drm_dp_atomic_find_time_slots -ffffffff8197c050 T drm_atomic_get_mst_topology_state -ffffffff8197c060 T drm_dp_atomic_release_time_slots -ffffffff8197c280 T drm_dp_mst_atomic_setup_commit -ffffffff8197c410 T drm_dp_mst_atomic_wait_for_dependencies -ffffffff8197c590 T drm_dp_mst_root_conn_atomic_check -ffffffff8197c6a0 T drm_dp_mst_update_slots -ffffffff8197c6f0 T drm_dp_check_act_status -ffffffff8197c8a0 T drm_dp_calc_pbn_mode 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process_single_down_tx_qlock -ffffffff8197ed10 t process_single_tx_qlock -ffffffff8197f1f0 t drm_dp_msg_data_crc4 -ffffffff8197f310 t drm_dp_payload_send_msg -ffffffff8197f760 t drm_dp_mst_topology_get_mstb_validated_locked -ffffffff8197f7e0 t drm_dp_get_one_sb_msg -ffffffff8197ff00 t drm_dp_get_mst_branch_device -ffffffff81980070 t drm_dp_check_and_send_link_address -ffffffff81980140 t drm_dp_send_link_address -ffffffff81980df0 t drm_dp_send_enum_path_resources -ffffffff81981050 t drm_dp_port_set_pdt -ffffffff81981330 t drm_dp_mst_port_add_connector -ffffffff81981510 t drm_dp_mst_i2c_xfer -ffffffff81981c00 t drm_dp_mst_i2c_functionality -ffffffff81981c30 t get_mst_branch_device_by_guid_helper -ffffffff81982000 T drm_dsc_dp_pps_header_init -ffffffff81982030 T drm_dsc_dp_rc_buffer_size -ffffffff81982090 T drm_dsc_pps_payload_pack -ffffffff81982320 T drm_dsc_compute_rc_parameters -ffffffff81983000 T drm_connector_attach_content_protection_property -ffffffff81983030 T drm_hdcp_check_ksvs_revoked -ffffffff81983080 T drm_hdcp_update_content_protection -ffffffff81984000 T drm_hdmi_infoframe_set_hdr_metadata -ffffffff81984120 T drm_hdmi_avi_infoframe_colorimetry -ffffffff81984170 T drm_hdmi_avi_infoframe_bars -ffffffff819841c0 T drm_hdmi_avi_infoframe_content_type -ffffffff81985000 T drm_scdc_read -ffffffff81985090 T drm_scdc_write -ffffffff81985170 T drm_scdc_get_scrambling_status -ffffffff81985220 T drm_scdc_set_scrambling -ffffffff81985370 T drm_scdc_set_high_tmds_clock_ratio -ffffffff81986000 T drm_gem_ttm_mmap -ffffffff81986070 T drm_gem_ttm_vmap -ffffffff81986080 T drm_gem_ttm_vunmap -ffffffff81987000 T ttm_agp_bind -ffffffff81987050 T ttm_agp_unbind -ffffffff81987070 T ttm_agp_is_bound -ffffffff819870c0 T ttm_agp_destroy -ffffffff819870e0 T ttm_agp_tt_create -ffffffff81988000 T ttm_bo_move_to_lru_tail -ffffffff81988040 T ttm_bo_set_bulk_move -ffffffff81988100 T ttm_bo_delayed_delete -ffffffff819883f0 t ttm_bo_cleanup_refs -ffffffff819887a0 T ttm_bo_put -ffffffff81988ce0 T ttm_bo_lock_delayed_workqueue -ffffffff81988d60 T ttm_bo_unlock_delayed_workqueue -ffffffff81988dd0 T ttm_bo_eviction_valuable -ffffffff81988e20 T ttm_mem_evict_first -ffffffff819896e0 T ttm_bo_pin -ffffffff81989780 T ttm_bo_unpin -ffffffff81989890 T ttm_bo_mem_space -ffffffff81989ae0 t ttm_bo_add_move_fence -ffffffff81989ba0 T ttm_bo_validate -ffffffff81989d20 T ttm_bo_init_reserved -ffffffff81989fc0 T ttm_bo_init_validate -ffffffff8198a130 T ttm_bo_unmap_virtual -ffffffff8198a240 T ttm_bo_wait -ffffffff8198a2c0 T ttm_bo_swapout -ffffffff8198a6d0 t ttm_bo_handle_move_mem -ffffffff8198a840 T ttm_bo_tt_destroy -ffffffff8198b000 T ttm_mem_io_reserve -ffffffff8198b060 T ttm_mem_io_free -ffffffff8198b0d0 T ttm_move_memcpy -ffffffff8198b290 T ttm_bo_move_memcpy -ffffffff8198b4b0 T ttm_bo_move_sync_cleanup -ffffffff8198b5a0 T ttm_io_prot -ffffffff8198b5e0 T ttm_bo_kmap -ffffffff8198b890 T ttm_bo_kunmap -ffffffff8198b9d0 T ttm_bo_vmap -ffffffff8198bbc0 T ttm_bo_vunmap -ffffffff8198bca0 T ttm_bo_move_accel_cleanup -ffffffff8198bf60 T ttm_bo_pipeline_gutting -ffffffff8198c200 t ttm_buffer_object_transfer -ffffffff8198c450 t ttm_transfered_destroy -ffffffff8198d000 T ttm_bo_vm_reserve -ffffffff8198d250 T ttm_bo_vm_fault_reserved -ffffffff8198d560 T ttm_bo_vm_fault -ffffffff8198d6c0 T ttm_bo_vm_reference -ffffffff8198d6f0 T ttm_bo_vm_detach -ffffffff8198d700 T ttm_bo_mmap_obj -ffffffff8198e000 T ttm_global_swapout -ffffffff8198e100 T ttm_device_swapout -ffffffff8198e210 T ttm_device_init -ffffffff8198e460 t ttm_device_delayed_workqueue -ffffffff8198e500 T ttm_device_fini -ffffffff8198e6e0 T ttm_device_clear_dma_mappings -ffffffff8198e780 t ttm_device_clear_lru_dma_mappings -ffffffff8198e830 t __delayed_work_tick -ffffffff8198f000 T ttm_eu_backoff_reservation -ffffffff8198f130 T ttm_eu_reserve_buffers -ffffffff8198f520 T ttm_eu_fence_buffer_objects -ffffffff8198f670 t __ww_mutex_lock -ffffffff81990000 T ttm_prot_from_caching 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+ffffffff813fa940 T ieee80211_recv_addba_req +ffffffff813fad60 T ieee80211_addba_req_refuse +ffffffff813fadf0 T ieee80211_addba_req_accept +ffffffff813fae80 T ieee80211_recv_addba_resp +ffffffff813fb020 T ieee80211_addba_resp_refuse +ffffffff813fb060 T ieee80211_addba_resp_accept +ffffffff813fb0e0 T ieee80211_recv_delba +ffffffff813fb260 T ieee80211_recv_sa_query_req +ffffffff813fb2d0 T ieee80211_recv_sa_query_resp +ffffffff813fb340 T ieee80211_recv_action +ffffffff813fb460 T ieee80211_recv_mgmt +ffffffff813fb5b0 T ieee80211_bar_tid +ffffffff813fc000 T ieee80211_node2req +ffffffff813fc370 T ieee80211_req2node +ffffffff813fc480 T ieee80211_disable_wep +ffffffff813fc590 T ieee80211_disable_rsn +ffffffff813fc5f0 T ieee80211_ioctl +ffffffff813fe000 T ieee80211_inact_timeout +ffffffff813fe0a0 T ieee80211_node_cache_timeout +ffffffff813fe0e0 T ieee80211_clean_nodes +ffffffff813fe400 T ieee80211_print_ess +ffffffff813fe5f0 T ieee80211_print_ess_list +ffffffff813fe660 T ieee80211_get_ess +ffffffff813fe6f0 T ieee80211_del_ess +ffffffff813fe850 T ieee80211_add_ess +ffffffff813feed0 T ieee80211_ess_adjust_rssi +ffffffff813fef40 T ieee80211_ess_calculate_score +ffffffff813ff0a0 T ieee80211_ess_is_better +ffffffff813ff1f0 T ieee80211_match_ess +ffffffff813ff2e0 T ieee80211_switch_ess +ffffffff813ff550 T ieee80211_set_ess +ffffffff813ff820 T ieee80211_deselect_ess +ffffffff813ff880 T ieee80211_node_attach +ffffffff813ffa50 T ieee80211_node_alloc +ffffffff813ffa70 T ieee80211_node_free +ffffffff813ffb10 T ieee80211_node_copy +ffffffff813ffcc0 T ieee80211_node_getrssi +ffffffff813ffcf0 T ieee80211_node_checkrssi +ffffffff813ffd70 T ieee80211_set_tim +ffffffff813ffde0 T ieee80211_alloc_node_helper +ffffffff813ffe50 T ieee80211_node_lateattach +ffffffff813fff00 T ieee80211_node_detach +ffffffff81400070 T ieee80211_free_allnodes +ffffffff81400190 T ieee80211_reset_scan +ffffffff81400210 T ieee80211_node_raise_inact +ffffffff81400250 T ieee80211_begin_scan +ffffffff81400400 T ieee80211_node_cleanup +ffffffff814004b0 T ieee80211_iterate_nodes +ffffffff81400540 T ieee80211_next_scan +ffffffff81400670 T ieee80211_end_scan +ffffffff81400bd0 T ieee80211_create_ibss +ffffffff814010a0 T ieee80211_match_bss +ffffffff81401500 T ieee80211_node_free_unref_cb +ffffffff81401570 T ieee80211_node_tx_stopped +ffffffff81401670 T ieee80211_node_switch_bss +ffffffff81401940 T ieee80211_node_tx_flushed +ffffffff81401ab0 T ieee80211_find_node +ffffffff81401b50 T ieee80211_node_join_bss +ffffffff81401d30 T ieee80211_choose_rsnparams +ffffffff81401e60 T ieee80211_node_choose_bss +ffffffff81402050 T ieee80211_free_node +ffffffff81402150 T ieee80211_node_cmp +ffffffff81402170 T ieee80211_clean_inactive_nodes +ffffffff81402230 T ieee80211_get_rate +ffffffff81402280 T ieee80211_ba_del +ffffffff81402360 T ieee80211_node_set_timeouts +ffffffff81402460 T ieee80211_node_addba_request_ac_be_to +ffffffff81402480 T ieee80211_node_addba_request_ac_bk_to +ffffffff814024a0 T ieee80211_node_addba_request_ac_vi_to +ffffffff814024c0 T ieee80211_node_addba_request_ac_vo_to +ffffffff814024e0 T ieee80211_setup_node +ffffffff81402660 T ieee80211_alloc_node +ffffffff81402700 T ieee80211_dup_bss +ffffffff814027d0 T ieee80211_find_txnode +ffffffff814029d0 T ieee80211_find_rxnode +ffffffff81402ce0 T ieee80211_node_tx_ba_clear +ffffffff81402d50 T ieee80211_release_node +ffffffff81402de0 T ieee80211_clean_cached +ffffffff81402e70 T ieee80211_node_leave +ffffffff814030d0 T ieee80211_setup_htcaps +ffffffff81403170 T ieee80211_clear_htcaps +ffffffff814031f0 T ieee80211_setup_htop +ffffffff81403270 T ieee80211_setup_vhtcaps +ffffffff814032f0 T ieee80211_setup_vhtop +ffffffff81403350 T ieee80211_clear_vhtcaps +ffffffff81403390 T ieee80211_setup_rates +ffffffff81403450 T ieee80211_node_trigger_addba_req +ffffffff814034b0 T ieee80211_node_addba_request +ffffffff814034e0 T ieee80211_iserp_sta +ffffffff81403690 T ieee80211_needs_auth +ffffffff814036c0 T ieee80211_node_join_ht +ffffffff81403710 T ieee80211_node_join_rsn +ffffffff81403820 T ieee80211_count_longslotsta +ffffffff81403860 T ieee80211_count_nonerpsta +ffffffff814038b0 T ieee80211_count_pssta +ffffffff81403900 T ieee80211_count_rekeysta +ffffffff81403950 T ieee80211_node_join_11g +ffffffff81403ae0 T ieee80211_node_join +ffffffff81403de0 T ieee80211_node_leave_ht +ffffffff81403f10 T ieee80211_node_leave_vht +ffffffff81403f50 T ieee80211_node_leave_rsn +ffffffff81404080 T ieee80211_node_leave_11g +ffffffff814043a0 T ieee80211_node_leave_pwrsave +ffffffff81404560 T ieee80211_ibss_merge +ffffffff81404860 T ieee80211_notify_dtim +ffffffff81404930 T ieee80211_ess_cmp +ffffffff81404950 t ieee80211_tree_RBT_COMPARE +ffffffff81404970 t ieee80211_ess_tree_RBT_COMPARE +ffffffff81405000 T ieee80211_output +ffffffff814050f0 T ieee80211_action_name +ffffffff81405140 T ieee80211_mgmt_output +ffffffff814053a0 T ieee80211_pwrsave +ffffffff814054c0 T ieee80211_up_to_ac +ffffffff81405580 T ieee80211_classify +ffffffff81405670 T ieee80211_can_use_ampdu +ffffffff814056d0 T ieee80211_tx_compressed_bar +ffffffff81405810 T ieee80211_get_compressed_bar +ffffffff814058e0 T ieee80211_encap +ffffffff81405d60 T ieee80211_add_capinfo +ffffffff81405df0 T ieee80211_add_ssid +ffffffff81405e50 T ieee80211_add_rates +ffffffff81405ec0 T ieee80211_add_ds_params +ffffffff81405f10 T ieee80211_add_tim +ffffffff81406060 T ieee80211_add_ibss_params +ffffffff81406090 T ieee80211_add_edca_params +ffffffff81406210 T ieee80211_add_erp +ffffffff814062b0 T ieee80211_add_qos_capability +ffffffff814062e0 T ieee80211_add_wme_info +ffffffff81406320 T ieee80211_add_wme_param +ffffffff814064b0 T ieee80211_add_rsn_body +ffffffff81406790 T ieee80211_add_rsn +ffffffff814067f0 T ieee80211_add_wpa +ffffffff81406850 T ieee80211_add_xrates +ffffffff814068d0 T ieee80211_add_htcaps +ffffffff814069a0 T ieee80211_add_htop +ffffffff81406a70 T ieee80211_add_vhtcaps +ffffffff81406b10 T ieee80211_add_tie +ffffffff81406b60 T ieee80211_getmgmt +ffffffff81406c20 T ieee80211_get_probe_req +ffffffff81406fd0 T ieee80211_get_probe_resp +ffffffff81407530 T ieee80211_get_auth +ffffffff814075c0 T ieee80211_get_deauth +ffffffff81407640 T ieee80211_get_assoc_req +ffffffff81407b30 T ieee80211_get_assoc_resp +ffffffff81407ef0 T ieee80211_get_disassoc +ffffffff81407f70 T ieee80211_get_addba_req +ffffffff81408060 T ieee80211_output_ba_move_window +ffffffff81408150 T ieee80211_output_ba_move_window_to_first_unacked +ffffffff814082e0 T ieee80211_output_ba_record_ack +ffffffff81408430 T ieee80211_get_addba_resp +ffffffff81408530 T ieee80211_get_delba +ffffffff814085d0 T ieee80211_get_sa_query +ffffffff81408660 T ieee80211_get_action +ffffffff814088f0 T ieee80211_send_mgmt +ffffffff81408c90 T ieee80211_get_rts +ffffffff81408d20 T ieee80211_get_cts_to_self +ffffffff81408da0 T ieee80211_beacon_alloc +ffffffff8140a000 T ieee80211_eapol_key_input +ffffffff8140a210 T ieee80211_recv_eapol_key_req +ffffffff8140a360 T ieee80211_recv_4way_msg3 +ffffffff8140ad00 T ieee80211_recv_4way_msg2or4 +ffffffff8140ae40 T ieee80211_recv_4way_msg1 +ffffffff8140b120 T ieee80211_recv_wpa_group_msg1 +ffffffff8140b450 T ieee80211_recv_rsn_group_msg1 +ffffffff8140b980 T ieee80211_recv_group_msg2 +ffffffff8140bad0 T ieee80211_recv_4way_msg2 +ffffffff8140bcd0 T ieee80211_must_update_group_key +ffffffff8140bd30 T ieee80211_recv_4way_msg4 +ffffffff8140c000 T ieee80211_send_eapol_key +ffffffff8140c210 T ieee80211_eapol_timeout +ffffffff8140c290 T ieee80211_send_4way_msg1 +ffffffff8140c550 T ieee80211_send_4way_msg3 +ffffffff8140ca90 T ieee80211_send_group_msg1 +ffffffff8140cfb0 T ieee80211_add_gtk_kde +ffffffff8140d060 T ieee80211_add_pmkid_kde +ffffffff8140d0b0 T ieee80211_add_igtk_kde +ffffffff8140d170 T ieee80211_get_eapol_key +ffffffff8140d230 T ieee80211_send_4way_msg2 +ffffffff8140d450 T ieee80211_send_4way_msg4 +ffffffff8140d630 T ieee80211_send_group_msg2 +ffffffff8140d810 T ieee80211_send_eapol_key_req +ffffffff8140e000 T ieee80211_proto_attach +ffffffff8140e0b0 T ieee80211_newstate +ffffffff8140ed80 T ieee80211_proto_detach +ffffffff8140edb0 T ieee80211_print_essid +ffffffff8140ef30 T ieee80211_fix_rate +ffffffff8140f370 T ieee80211_reset_erp +ffffffff8140f480 T ieee80211_set_shortslottime +ffffffff8140f4e0 T ieee80211_keyrun +ffffffff8140f640 T ieee80211_setkeys +ffffffff8140f880 t ieee80211_node_gtk_rekey +ffffffff8140f8e0 T ieee80211_setkeysdone +ffffffff8140f9e0 T ieee80211_gtk_rekey_timeout +ffffffff8140fa30 T ieee80211_sa_query_timeout +ffffffff8140fb00 T ieee80211_sa_query_request +ffffffff8140fb80 T ieee80211_ht_negotiate +ffffffff8140fd50 T ieee80211_vht_negotiate +ffffffff8140ff60 T ieee80211_tx_ba_timeout +ffffffff81410080 T ieee80211_delba_request +ffffffff814101f0 T ieee80211_rx_ba_timeout +ffffffff81410270 T ieee80211_addba_request +ffffffff81410440 T ieee80211_auth_open_confirm +ffffffff814104f0 T ieee80211_try_another_bss +ffffffff81410600 T ieee80211_auth_open +ffffffff81410900 T ieee80211_set_beacon_miss_threshold +ffffffff81410990 T ieee80211_stop_ampdu_tx +ffffffff81410aa0 T ieee80211_check_wpa_supplicant_failure +ffffffff81410b20 T ieee80211_set_link_state +ffffffff81410bb0 T ieee80211_rtm_80211info_task +ffffffff81411000 T ieee80211_ra_get_ht_rateset +ffffffff81411080 T ieee80211_ra_use_ht_sgi +ffffffff81411100 T ieee80211_ra_get_txrate +ffffffff81411190 T ieee80211_ra_next_lower_intra_rate +ffffffff81411320 T ieee80211_ra_next_intra_rate +ffffffff814114a0 T ieee80211_ra_next_rateset +ffffffff814116c0 T ieee80211_ra_best_mcs_in_rateset +ffffffff81411740 T ieee80211_ra_probe_next_rateset +ffffffff81411a00 T ieee80211_ra_next_mcs +ffffffff81411a40 T ieee80211_ra_probe_clear +ffffffff81411a80 T ieee80211_ra_probe_done +ffffffff81411ac0 T ieee80211_ra_intra_mode_ra_finished +ffffffff81411e30 T ieee80211_ra_trigger_next_rateset +ffffffff81411e90 T ieee80211_ra_inter_mode_ra_finished +ffffffff81411ec0 T ieee80211_ra_best_rate +ffffffff81411f60 T ieee80211_ra_probe_next_rate +ffffffff81411ff0 T ieee80211_ra_valid_tx_mcs +ffffffff81412070 T ieee80211_ra_valid_rates +ffffffff81412140 T ieee80211_ra_probe_valid +ffffffff81412190 T ieee80211_ra_add_stats_ht +ffffffff81412430 T ieee80211_ra_choose +ffffffff81412870 T ieee80211_ra_node_init +ffffffff81413000 T ieee80211_ra_vht_get_rateset +ffffffff814130a0 T ieee80211_ra_vht_use_sgi +ffffffff814131b0 T ieee80211_ra_vht_get_txrate +ffffffff81413250 T ieee80211_ra_vht_next_lower_intra_rate +ffffffff81413290 T ieee80211_ra_vht_get_max_mcs +ffffffff81413310 T ieee80211_ra_vht_next_intra_rate +ffffffff81413400 T ieee80211_ra_vht_next_rateset +ffffffff81413550 T ieee80211_ra_vht_best_mcs_in_rateset +ffffffff814135f0 T ieee80211_ra_vht_probe_next_rateset +ffffffff814138d0 T ieee80211_ra_vht_next_mcs +ffffffff81413950 T ieee80211_ra_vht_probe_clear +ffffffff81413980 T ieee80211_ra_vht_probe_done +ffffffff814139d0 T ieee80211_ra_vht_intra_mode_ra_finished +ffffffff81413d90 T ieee80211_ra_vht_trigger_next_rateset +ffffffff81413df0 T ieee80211_ra_vht_inter_mode_ra_finished +ffffffff81413e20 T ieee80211_ra_vht_best_rate +ffffffff814140e0 T ieee80211_ra_vht_probe_next_rate +ffffffff81414190 T ieee80211_ra_vht_init_valid_rates +ffffffff81414390 T ieee80211_ra_vht_probe_valid +ffffffff814143e0 T ieee80211_ra_vht_add_stats +ffffffff814146d0 T ieee80211_ra_vht_choose +ffffffff81414b00 T ieee80211_ra_vht_node_init +ffffffff81415000 T ieee80211_rssadapt_choose +ffffffff814150d0 T ieee80211_rssadapt_updatestats +ffffffff81415150 T ieee80211_rssadapt_input +ffffffff81415190 T ieee80211_rssadapt_lower_rate +ffffffff81415210 T ieee80211_rssadapt_raise_rate +ffffffff81416000 T bsearch +ffffffff814160b0 T ieee80211_regdomain_compare_cn +ffffffff814160d0 T ieee80211_regdomain_compare_rn +ffffffff814160f0 T ieee80211_name2countrycode +ffffffff81416190 T ieee80211_name2regdomain +ffffffff81416230 T ieee80211_countrycode2name +ffffffff814162c0 T ieee80211_regdomain2name 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igmp_leavegroup +ffffffff81419f30 T igmp_fasttimo +ffffffff81419fb0 T igmp_checktimer +ffffffff8141a090 T igmp_slowtimo +ffffffff8141a0f0 T igmp_sysctl +ffffffff8141a250 T igmp_sysctl_igmpstat +ffffffff8141b000 T in_canforward +ffffffff8141b060 T in_socktrim +ffffffff8141b0b0 T in_mask2len +ffffffff8141b180 T in_len2mask +ffffffff8141b240 T in_nam2sin +ffffffff8141b2a0 T in_sa2sin +ffffffff8141b2e0 T in_control +ffffffff8141b380 T in_ioctl +ffffffff8141b6f0 T in_ioctl_get +ffffffff8141b850 T in_ioctl_set_ifaddr +ffffffff8141ba40 T in_ioctl_change_ifaddr +ffffffff8141be60 T in_scrubhost +ffffffff8141be80 T in_addhost +ffffffff8141bea0 T in_ifscrub +ffffffff8141bf40 T in_ifinit +ffffffff8141c1e0 T in_purgeaddr +ffffffff8141c2e0 T in_remove_prefix +ffffffff8141c350 T in_insert_prefix +ffffffff8141c3d0 T in_addmulti +ffffffff8141c560 T in_delmulti +ffffffff8141c6b0 T in_broadcast +ffffffff8141c740 T in_hasmulti +ffffffff8141c7e0 T in_ifdetach +ffffffff8141c870 T in_prefixlen2mask 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in_pcbhash_lookup +ffffffff8141f340 T in_pcblookup_listen +ffffffff81420000 T inet_nat64_mask +ffffffff81420060 T inet_nat64 +ffffffff814201f0 T inet_nat64_inet +ffffffff814202b0 T inet_nat64_inet6 +ffffffff81420380 T inet_nat46 +ffffffff81420420 T inet_nat46_inet +ffffffff81420470 T inet_nat46_inet6 +ffffffff81421000 T inet_ntop +ffffffff814210c0 t inet_ntop6 +ffffffff814215b0 T sockaddr_ntop +ffffffff81422000 T divert_attach +ffffffff81422080 T divert_detach +ffffffff814220d0 T divert_lock +ffffffff81422130 T divert_unlock +ffffffff81422190 T divert_bind +ffffffff814221d0 T divert_shutdown +ffffffff81422210 T divert_send +ffffffff81422250 T divert_init +ffffffff814222a0 T divert_output +ffffffff81422560 T divert_packet +ffffffff814227e0 T divert_sysctl_divstat +ffffffff814228b0 T divert_sysctl +ffffffff81423000 T icmp_init +ffffffff81423070 T icmp_mtudisc_timeout +ffffffff81423170 T icmp_do_error +ffffffff814234f0 T icmp_ratelimit +ffffffff81423540 T icmp_error +ffffffff814235c0 T icmp_reflect +ffffffff81423900 T icmp_send +ffffffff814239e0 T icmp_input +ffffffff81423a80 T icmp_input_if +ffffffff814243f0 T iptime +ffffffff81424490 T icmp_sysctl +ffffffff81424640 T icmp_sysctl_icmpstat +ffffffff81424730 T icmp_mtudisc_clone +ffffffff814248e0 T icmp_mtudisc +ffffffff81424ab0 T icmp_do_exthdr +ffffffff81425000 T ip_randomid +ffffffff81426000 T ip_init +ffffffff81426280 T ip_ours +ffffffff81426300 T ip_fragcheck +ffffffff81426650 T ipintr +ffffffff81426700 T ip_deliver +ffffffff81426a80 T ipv4_input +ffffffff81426b00 T ip_input_if +ffffffff81426fc0 T ipv4_check +ffffffff814272e0 T ip_dooptions +ffffffff814278d0 T in_ouraddr +ffffffff81427c30 T ip_forward +ffffffff814280e0 T ip_flush +ffffffff814281e0 T ip_reass +ffffffff814287a0 T ip_freef +ffffffff814288a0 T ip_slowtimo +ffffffff81428930 T save_rte +ffffffff81428a10 T ip_srcroute +ffffffff81428b70 T ip_stripoptions +ffffffff81428c00 T ip_sysctl +ffffffff81428f40 T ip_sysctl_ipstat +ffffffff814291a0 T ip_savecontrol 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x86_bus_space_mem_write_multi_4 +ffffffff815ecc80 T x86_bus_space_mem_write_multi_8 +ffffffff815eccc0 T x86_bus_space_mem_write_region_1 +ffffffff815eccf0 T x86_bus_space_mem_write_region_2 +ffffffff815ecd20 T x86_bus_space_mem_write_region_4 +ffffffff815ecd50 T x86_bus_space_mem_write_region_8 +ffffffff815ecd80 T x86_bus_space_mem_set_multi_1 +ffffffff815ece00 T x86_bus_space_mem_set_multi_2 +ffffffff815ece90 T x86_bus_space_mem_set_multi_4 +ffffffff815ecf10 T x86_bus_space_mem_set_multi_8 +ffffffff815ecfa0 T x86_bus_space_mem_set_region_1 +ffffffff815ed030 T x86_bus_space_mem_set_region_2 +ffffffff815ed0c0 T x86_bus_space_mem_set_region_4 +ffffffff815ed150 T x86_bus_space_mem_set_region_8 +ffffffff815ed1e0 T x86_bus_space_mem_copy_1 +ffffffff815ed320 T x86_bus_space_mem_copy_2 +ffffffff815ed480 T x86_bus_space_mem_copy_4 +ffffffff815ed5c0 T x86_bus_space_mem_copy_8 +ffffffff815ed720 T x86_bus_space_mem_vaddr +ffffffff815ed750 T x86_bus_space_mem_mmap +ffffffff815ed780 T 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tulip_linkup +ffffffff8170d300 T tulip_init +ffffffff8170d480 T tulip_media_print +ffffffff8170d4d0 T tulip_media_link_monitor +ffffffff8170d730 T tulip_mii_map_abilities +ffffffff8170d7c0 T tulip_media_poll +ffffffff8170dcb0 T tulip_mii_phy_readspecific +ffffffff8170de70 T tulip_media_select +ffffffff8170df80 T tulip_21040_mediainfo_init +ffffffff8170e080 T tulip_21040_media_probe +ffffffff8170e170 T tulip_21040_10baset_only_media_probe +ffffffff8170e230 T tulip_21040_10baset_only_media_select +ffffffff8170e290 T tulip_21040_auibnc_only_media_probe +ffffffff8170e320 T tulip_21040_auibnc_only_media_select +ffffffff8170e360 T tulip_21041_mediainfo_init +ffffffff8170e420 T tulip_21041_media_probe +ffffffff8170e500 T tulip_21041_media_poll +ffffffff8170e810 T tulip_mii_get_phyaddr +ffffffff8170e8d0 T tulip_2114x_media_preset +ffffffff8170eaf0 T tulip_null_media_poll +ffffffff8170eb20 T tulip_21140_mediainit +ffffffff8170eb60 T tulip_21140_evalboard_media_probe +ffffffff8170ed40 T tulip_21140_accton_media_probe +ffffffff8170ef60 T tulip_21140_smc9332_media_probe +ffffffff8170f190 T tulip_21140_cogent_em100_media_probe +ffffffff8170f300 T tulip_21140_znyx_zx34x_media_probe +ffffffff8170f530 T tulip_2114x_media_probe +ffffffff8170f560 T tulip_delay_300ns +ffffffff8170f670 T tulip_srom_idle +ffffffff81710010 T tulip_srom_read +ffffffff81710da0 T tulip_mii_writebits +ffffffff81711320 T tulip_mii_turnaround +ffffffff81711af0 T tulip_mii_readbits +ffffffff81711ed0 T tulip_identify_dec_nic +ffffffff81711f80 T tulip_identify_znyx_nic +ffffffff81712250 T tulip_identify_smc_nic +ffffffff81712430 T tulip_identify_cogent_nic +ffffffff81712520 T tulip_identify_accton_nic +ffffffff81712650 T tulip_identify_asante_nic +ffffffff81712910 T tulip_identify_compex_nic +ffffffff81712a60 T tulip_srom_decode +ffffffff817136b0 T tulip_read_macaddr +ffffffff81714060 T tulip_ifmedia_add +ffffffff81714140 T tulip_ifmedia_change +ffffffff81714320 T tulip_ifmedia_status +ffffffff81714380 T tulip_alloc_rxmap +ffffffff817143c0 T tulip_free_rxmap +ffffffff81714400 T tulip_alloc_txmap +ffffffff81714440 T tulip_free_txmap +ffffffff81714480 T tulip_addr_filter +ffffffff81714790 T tulip_rx_intr +ffffffff81714d90 T tulip_txput_setup +ffffffff81715020 T tulip_tx_intr +ffffffff81715440 T tulip_print_abnormal_interrupt +ffffffff81715470 T tulip_intr_handler +ffffffff81715820 T tulip_ifstart +ffffffff817158e0 T tulip_intr_shared +ffffffff81715950 T tulip_intr_normal +ffffffff81715990 T tulip_ifioctl +ffffffff81715a80 T tulip_ifwatchdog +ffffffff81715b80 T tulip_busdma_allocmem +ffffffff81715d10 T tulip_busdma_init +ffffffff81715f30 T tulip_initcsrs +ffffffff81716030 T tulip_initring +ffffffff81717000 T ep_pci_match +ffffffff81717020 T ep_pci_attach +ffffffff81718000 T pcn_match +ffffffff81718060 T pcn_attach +ffffffff817187c0 T pcn_tick +ffffffff81718810 T pcn_reset +ffffffff81718880 T pcn_intr +ffffffff81718ac0 T pcn_ioctl +ffffffff81718c20 T pcn_start +ffffffff81719070 T pcn_watchdog +ffffffff817190d0 T pcn_txintr +ffffffff81719590 T pcn_init +ffffffff81719e40 T pcn_stop +ffffffff81719fb0 T pcn_rxintr +ffffffff8171a4c0 T pcn_spnd +ffffffff8171a5b0 T pcn_add_rxbuf +ffffffff8171a7a0 T pcn_rxdrain +ffffffff8171a830 T pcn_set_filter +ffffffff8171a990 T pcn_79c970_mediainit +ffffffff8171aa90 T pcn_79c970_mediachange +ffffffff8171ac40 T pcn_79c970_mediastatus +ffffffff8171ac70 T pcn_79c971_mediainit +ffffffff8171ad40 T pcn_mii_readreg +ffffffff8171ae00 T pcn_mii_writereg +ffffffff8171aea0 T pcn_mii_statchg +ffffffff8171af00 T pcn_79c971_mediachange +ffffffff8171af50 T pcn_79c971_mediastatus +ffffffff8171b000 T siop_lookup_product +ffffffff8171b0a0 T siop_pci_attach_common +ffffffff8171b530 T siop_pci_reset +ffffffff8171c000 T siop_pci_match +ffffffff8171c050 T siop_pci_attach +ffffffff8171d000 T sii3114_read_reg +ffffffff8171d060 T sii3114_write_reg +ffffffff8171d0d0 T pdc203xx_read_reg +ffffffff8171d130 T pdc203xx_write_reg +ffffffff8171d190 T svwsata_read_reg +ffffffff8171d1f0 T svwsata_write_reg +ffffffff8171d230 T svwsata_lba48_write_reg +ffffffff8171d270 T pciide_pci_read +ffffffff8171d2c0 T pciide_pci_write +ffffffff8171d330 T default_chip_map +ffffffff8171d970 T artisea_chip_map +ffffffff8171dbd0 T piix_chip_map +ffffffff8171e1c0 T piixsata_chip_map +ffffffff8171e6d0 T sch_chip_map +ffffffff8171e9e0 T amd756_chip_map +ffffffff8171edf0 T ixp_chip_map +ffffffff8171f150 T cmd_chip_map +ffffffff8171f2b0 T cmd0643_9_chip_map +ffffffff8171f5b0 T cmd680_chip_map +ffffffff8171f780 T sii3112_chip_map +ffffffff8171fb00 T sii3114_chip_map +ffffffff8171ff00 T apollo_chip_map +ffffffff81720560 T sata_chip_map +ffffffff81720770 T cy693_chip_map +ffffffff81720b30 T sis_chip_map +ffffffff81721270 T natsemi_chip_map +ffffffff817216d0 T ns_scx200_chip_map +ffffffff81721a60 T acer_chip_map +ffffffff817220e0 T hpt_chip_map +ffffffff817225c0 T pdc202xx_chip_map +ffffffff81722f80 T pdcsata_chip_map +ffffffff81723700 T acard_chip_map +ffffffff81723970 T serverworks_chip_map +ffffffff81723c80 T svwsata_chip_map +ffffffff81724060 T nforce_chip_map +ffffffff81724480 T ite_chip_map +ffffffff81724740 T jmicron_chip_map +ffffffff81724b50 T phison_chip_map +ffffffff81724e70 T rdc_chip_map +ffffffff817252c0 T pciide_match +ffffffff81725360 T pciide_attach +ffffffff81725430 T pciide_detach +ffffffff81725480 T pciide_activate +ffffffff81725bb0 T pciide_lookup_product +ffffffff81725e10 T pciide_dmacmd_read +ffffffff81725e40 T pciide_dmacmd_write +ffffffff81725e70 T pciide_dmactl_read +ffffffff81725ea0 T pciide_dmactl_write +ffffffff81725ed0 T pciide_dmatbl_write +ffffffff81725f00 T pciide_mapregs_compat +ffffffff81726080 T pciide_unmapregs_compat +ffffffff81726100 T pciide_mapregs_native +ffffffff817263f0 T pciide_unmapregs_native +ffffffff81726480 T pciide_mapreg_dma +ffffffff81726610 T pciide_dma_init +ffffffff817268d0 T pciide_dma_start +ffffffff81726950 T pciide_dma_finish +ffffffff81726b20 T pciide_unmapreg_dma +ffffffff81726b50 T pciide_intr_flag +ffffffff81726d50 T pciide_compat_intr +ffffffff81726dc0 T pciide_pci_intr +ffffffff81726e80 T pciide_channel_dma_setup +ffffffff81726f40 T pciide_dma_table_setup +ffffffff81727180 T pciide_irqack +ffffffff817271d0 T pciide_chansetup +ffffffff817272b0 T pciide_chanfree +ffffffff817272f0 T pciide_mapchan +ffffffff81727380 T pciide_unmap_chan +ffffffff81727450 T pciide_chan_candisable +ffffffff817274c0 T pciide_map_compat_intr +ffffffff81727560 T pciide_unmap_compat_intr +ffffffff817275c0 T pciide_print_channels +ffffffff81727690 T pciide_print_modes +ffffffff817276a0 T default_chip_unmap +ffffffff81727780 T sata_setup_channel +ffffffff817278a0 T piix_timing_debug +ffffffff817278d0 T piix_setup_channel +ffffffff81727d60 T piix3_4_setup_channel +ffffffff817284f0 T piix_setup_idetim_timings +ffffffff81728560 T piix_setup_idetim_drvs +ffffffff81728680 T piix_setup_sidetim_timings +ffffffff817286f0 T amd756_setup_channel +ffffffff81728a90 T apollo_setup_channel +ffffffff81728e10 T cmd_channel_map +ffffffff81729180 T cmd_pci_intr +ffffffff81729280 T cmd646_9_irqack +ffffffff81729380 T cmd0643_9_setup_channel +ffffffff817297a0 T cmd680_setup_channel +ffffffff81729ca0 T cmd680_channel_map +ffffffff81729fd0 T sii_fixup_cacheline +ffffffff8172a2a0 T sii3112_setup_channel +ffffffff8172a460 T sii3112_drv_probe +ffffffff8172a880 T sii3114_mapreg_dma +ffffffff8172ab60 T sii3114_chansetup +ffffffff8172ac20 T sii3114_mapchan +ffffffff8172af30 T sii3114_dmacmd_read +ffffffff8172af70 T sii3114_dmacmd_write +ffffffff8172afb0 T sii3114_dmactl_read +ffffffff8172aff0 T sii3114_dmactl_write +ffffffff8172b030 T sii3114_dmatbl_write +ffffffff8172b070 T cy693_setup_channel +ffffffff8172b290 T sis_hostbr_match +ffffffff8172b350 T sis_south_match +ffffffff8172b390 T sis_setup_channel +ffffffff8172b6d0 T sis96x_setup_channel +ffffffff8172b9b0 T natsemi_irqack +ffffffff8172ba40 T natsemi_setup_channel +ffffffff8172be20 T natsemi_pci_intr +ffffffff8172bf20 T ns_scx200_setup_channel +ffffffff8172c210 T acer_dma_init +ffffffff8172c250 T acer_setup_channel +ffffffff8172c650 T acer_pci_intr +ffffffff8172c730 T hpt_setup_channel +ffffffff8172ca80 T hpt_pci_intr +ffffffff8172cb90 T pdc268_config_read +ffffffff8172cbf0 T pdc20268_setup_channel +ffffffff8172cdb0 T pdc202xx_setup_channel +ffffffff8172d200 T pdc20262_dma_start +ffffffff8172d370 T pdc20262_dma_finish +ffffffff8172d440 T pdc20265_pci_intr +ffffffff8172d5f0 T pdc202xx_pci_intr +ffffffff8172d700 T pdc203xx_pci_intr +ffffffff8172d7f0 T pdc205xx_pci_intr +ffffffff8172d920 T pdc203xx_irqack +ffffffff8172d9b0 T pdc203xx_setup_channel +ffffffff8172dab0 T pdc205xx_do_reset +ffffffff8172db50 T pdc205xx_drv_probe +ffffffff8172ddd0 T pdc203xx_dma_start +ffffffff8172de90 T pdc203xx_dma_finish +ffffffff8172df80 T serverworks_setup_channel +ffffffff8172e3a0 T serverworks_pci_intr +ffffffff8172e4b0 T svwsata_mapreg_dma +ffffffff8172e560 T svwsata_drv_probe +ffffffff8172e840 T svwsata_mapchan +ffffffff8172e930 T svwsata_dmacmd_read +ffffffff8172e960 T svwsata_dmacmd_write +ffffffff8172e990 T svwsata_dmactl_read +ffffffff8172e9c0 T svwsata_dmactl_write +ffffffff8172e9f0 T svwsata_dmatbl_write +ffffffff8172ea20 T acard_setup_channel +ffffffff8172ee30 T nforce_setup_channel +ffffffff8172f180 T nforce_pci_intr +ffffffff8172f270 T ite_setup_channel +ffffffff8172f5f0 T ixp_setup_channel +ffffffff8172f990 T jmicron_setup_channel +ffffffff8172fbf0 T phison_setup_channel +ffffffff8172fdf0 T sch_setup_channel +ffffffff8172fff0 T rdc_setup_channel +ffffffff81731000 T ppbmatch +ffffffff81731050 T ppbattach +ffffffff817317d0 T ppbdetach +ffffffff817318f0 T ppbactivate +ffffffff81731d60 T ppb_alloc_busrange +ffffffff81731f00 T ppb_hotplug_insert +ffffffff81731f60 T ppb_hotplug_rescan +ffffffff81731fa0 T ppb_hotplug_remove +ffffffff81732100 T ppb_hotplug_insert_finish +ffffffff81732120 T ppb_intr +ffffffff817321e0 T ppb_alloc_resources +ffffffff817328b0 T ppbprint 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vr_ifmedia_sts +ffffffff81737d70 T vr_tick +ffffffff81737df0 T vr_rxtick +ffffffff81737ec0 T vr_stop +ffffffff81738150 T vr_init +ffffffff817386e0 T vr_list_tx_init +ffffffff817387e0 T vr_list_rx_init +ffffffff817389a0 T vr_fill_rx_ring +ffffffff81738a60 T vr_alloc_mbuf +ffffffff81738bc0 T vr_rxeof +ffffffff81738e40 T vr_rxeoc +ffffffff81738fd0 T vr_txeof +ffffffff81739190 T vr_encap +ffffffff8173a000 T txp_probe +ffffffff8173a020 T txp_attach +ffffffff8173a180 T txp_attachhook +ffffffff8173a4a0 T txp_chip_init +ffffffff8173a660 T txp_download_fw +ffffffff8173ab00 T txp_alloc_rings +ffffffff8173b930 T txp_command +ffffffff8173ba00 T txp_ifmedia_upd +ffffffff8173bb10 T txp_ifmedia_sts +ffffffff8173be00 T txp_ioctl +ffffffff8173bf10 T txp_start +ffffffff8173c2d0 T txp_watchdog +ffffffff8173c300 T txp_capabilities +ffffffff8173c4b0 T txp_tick +ffffffff8173c600 T txp_intr +ffffffff8173c870 T txp_reset_adapter +ffffffff8173c960 T txp_download_fw_wait +ffffffff8173ca50 T txp_download_fw_section +ffffffff8173cdb0 T txp_dma_malloc +ffffffff8173cf50 T txp_dma_free +ffffffff8173cfd0 T txp_rx_reclaim +ffffffff8173d2c0 T txp_rxbuf_reclaim +ffffffff8173d540 T txp_tx_reclaim +ffffffff8173d6f0 T txp_init +ffffffff8173d830 T txp_stop +ffffffff8173d930 T txp_set_filter +ffffffff8173dac0 T txp_command2 +ffffffff8173dda0 T txp_cmd_desc_numfree +ffffffff8173de00 T txp_response +ffffffff8173e0c0 T txp_rsp_fixup +ffffffff8173e1b0 T txp_show_descriptor +ffffffff8173f000 T init_audio_devices +ffffffff8173f120 T init_BTSC +ffffffff8173f1e0 T set_audio +ffffffff8173f560 T set_bctv_audio +ffffffff8173f8a0 T msp_autodetect +ffffffff8173fcd0 T temp_mute +ffffffff8173fd60 T set_BTSC +ffffffff8173fd80 T bctv_gpio_write +ffffffff8173fef0 T msp_read_id +ffffffff8173ffa0 T dpl_read_id +ffffffff81740050 T dpl_autodetect +ffffffff81741000 T writeEEProm +ffffffff81741030 T readEEProm +ffffffff81741100 T signCard +ffffffff817411b0 T probeCard +ffffffff81743000 T bktr_name +ffffffff81743030 T common_bktr_attach +ffffffff81743330 T common_bktr_intr +ffffffff81743950 T video_open +ffffffff81743e00 t set_fps +ffffffff81743f40 T vbi_open +ffffffff81743fe0 T tuner_open +ffffffff81744030 T video_close +ffffffff81744120 T tuner_close +ffffffff81744150 T vbi_close +ffffffff81744180 T video_read +ffffffff81744340 t start_capture +ffffffff81747280 T vbi_read +ffffffff817473a0 T video_ioctl +ffffffff81748830 T bktr_common_ioctl +ffffffff81749000 T tuner_ioctl +ffffffff81749f50 T i2cWrite +ffffffff8174a070 T i2cRead +ffffffff8174a180 T msp_dpl_read +ffffffff8174a440 T msp_dpl_write +ffffffff8174a600 T msp_dpl_reset +ffffffff8174a900 t i2c_write_byte +ffffffff8174aae0 t i2c_read_byte +ffffffff8174ad00 t split +ffffffff8174af00 t getline +ffffffff8174c000 t bktr_probe +ffffffff8174c060 t bktr_attach +ffffffff8174c2e0 T bktr_get_info +ffffffff8174c3c0 T bktr_set_info +ffffffff8174c520 T get_bktr_mem +ffffffff8174c750 T free_bktr_mem +ffffffff8174c7b0 T bktropen +ffffffff8174c870 T bktrclose +ffffffff8174c8f0 T bktrread +ffffffff8174c980 T bktrwrite +ffffffff8174c9b0 T bktrioctl +ffffffff8174ca50 T bktrmmap +ffffffff8174cae0 t bktr_intr +ffffffff8174d000 T select_tuner +ffffffff8174d050 T tv_freq +ffffffff8174d2a0 T do_afc +ffffffff8174d3c0 T get_tuner_status +ffffffff8174d3e0 T tv_channel +ffffffff8174d4a0 T tuner_getchnlset +ffffffff8174e000 T xl_pci_match +ffffffff8174e020 T xl_pci_attach +ffffffff8174e370 T xl_pci_detach +ffffffff8174e400 T xl_pci_wol_power +ffffffff8174e450 T xl_pci_intr_ack +ffffffff8174f000 T fxp_pci_match +ffffffff8174f020 T fxp_pci_attach +ffffffff8174f340 T fxp_pci_detach +ffffffff81750000 T em_probe +ffffffff81750020 T em_attach +ffffffff81750520 T em_detach +ffffffff817505b0 T em_activate +ffffffff81750630 T em_defer_attach +ffffffff817506d0 T em_stop +ffffffff817507c0 T em_free_pci_resources +ffffffff81750a80 T em_setup_interface +ffffffff81750c60 T em_update_link_status +ffffffff81750e40 T em_local_timer +ffffffff81750ee0 T em_82547_move_tail +ffffffff81750f10 T em_identify_hardware +ffffffff81751010 T em_allocate_pci_resources +ffffffff81751410 T em_allocate_desc_rings +ffffffff81751520 T em_hardware_init +ffffffff817517c0 T em_kstat_attach +ffffffff81751910 T em_start +ffffffff81751c00 T em_encap +ffffffff817520d0 T em_82547_move_tail_locked +ffffffff81752300 T em_82547_update_fifo_head +ffffffff81752350 T em_ioctl +ffffffff81752630 T em_init +ffffffff81752990 T em_get_sffpage +ffffffff81752a40 T em_disable_intr +ffffffff81752b40 T em_iff +ffffffff81752e50 T em_initialize_receive_unit +ffffffff817535d0 T em_enable_intr +ffffffff81753730 T em_watchdog +ffffffff817538e0 T em_enable_hw_vlans +ffffffff81753970 T em_setup_transmit_structures +ffffffff81753b70 T em_initialize_transmit_unit +ffffffff81754190 T em_setup_receive_structures +ffffffff817542d0 T em_setup_queues_msix +ffffffff81754980 T em_intr +ffffffff81754a80 T em_txeof +ffffffff81754c40 T em_rxeof +ffffffff81755100 T em_rxrefill +ffffffff81755210 T em_media_status +ffffffff81755440 T em_flowstatus +ffffffff81755550 T em_media_change +ffffffff817556a0 T em_tx_ctx_setup +ffffffff81755830 T em_transmit_checksum_setup +ffffffff81755910 T em_fill_descriptors +ffffffff81755990 T em_82547_fifo_workaround +ffffffff81755a00 T em_82547_tx_fifo_reset +ffffffff81755e60 T em_pci_clear_mwi +ffffffff81755e90 T em_pci_set_mwi +ffffffff81755ec0 T em_smartspeed +ffffffff817560b0 T em_kstat_read +ffffffff817564d0 T em_flush_desc_rings +ffffffff817565f0 T em_free_transmit_structures +ffffffff817567c0 T em_free_receive_structures +ffffffff817569d0 T em_legacy_irq_quirk_spt +ffffffff81756aa0 T em_allocate_msix +ffffffff81756cb0 T em_allocate_legacy +ffffffff81756dd0 T em_dma_free +ffffffff81756e40 T em_disable_aspm +ffffffff81756f10 T em_dma_malloc +ffffffff817570a0 T em_allocate_transmit_structures +ffffffff81757180 T em_get_buf +ffffffff817572e0 T em_allocate_receive_structures +ffffffff817574a0 T em_rxfill +ffffffff817575f0 T em_tbi_adjust_stats +ffffffff817577b0 T em_receive_checksum +ffffffff81757820 T em_write_pci_cfg +ffffffff81757890 T em_read_pci_cfg +ffffffff81757900 T em_read_pcie_cap_reg +ffffffff81757930 T em_flush_tx_ring +ffffffff81757aa0 T em_flush_rx_ring +ffffffff81757c60 T em_queue_intr_msix +ffffffff81757d00 T em_link_intr_msix +ffffffff81757e20 T em_enable_queue_intr_msix +ffffffff81758000 T em_set_mac_type +ffffffff81758a00 T em_set_sfp_media_type_82575 +ffffffff81758d50 T em_translate_82542_register +ffffffff81758f70 T em_read_sfp_data_byte +ffffffff81759060 T em_set_media_type +ffffffff817592d0 T em_reset_hw +ffffffff81759e90 T em_disable_pciex_master +ffffffff81759f50 T em_check_phy_reset_block +ffffffff8175a010 T em_gate_hw_phy_config_ich8lan +ffffffff8175a0b0 t em_get_software_flag +ffffffff8175a230 T em_hv_phy_workarounds_ich8lan +ffffffff8175a5c0 T em_lv_phy_workarounds_ich8lan +ffffffff8175a6c0 t em_phy_init_script +ffffffff8175a930 T em_read_eeprom +ffffffff8175b010 T em_set_eee_i350 +ffffffff8175b130 T em_init_hw +ffffffff8175cdc0 T em_phy_reset +ffffffff8175d000 T em_clear_vfta_i350 +ffffffff8175d1e0 T em_read_phy_reg +ffffffff8175d380 T em_setup_link +ffffffff8175fc10 T em_enable_tx_pkt_filtering +ffffffff8175ffe0 T em_clear_hw_cntrs +ffffffff817608c0 T em_write_phy_reg +ffffffff81760a50 T em_power_up_serdes_link_82575 +ffffffff81760b30 T em_copper_link_autoneg +ffffffff81760c60 T em_phy_setup_autoneg +ffffffff81760dc0 T em_copper_link_postconfig +ffffffff81760e90 T em_config_collision_dist +ffffffff81760f10 t em_config_mac_to_phy +ffffffff81761080 t em_config_fc_after_link_up +ffffffff81761380 t em_config_dsp_after_link_change +ffffffff81761c70 T em_force_mac_fc +ffffffff81761d30 T em_check_for_link +ffffffff81762520 T em_get_pcs_speed_and_duplex_82575 +ffffffff817625d0 T em_k1_gig_workaround_hv +ffffffff81762700 T em_link_stall_workaround_hv +ffffffff817627d0 T em_k1_workaround_lv +ffffffff81762880 T em_k1_workaround_lpt_lp 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em_shift_in_ee_bits +ffffffff81765c70 T em_validate_eeprom_checksum +ffffffff81765e10 T em_write_eeprom +ffffffff817663b0 T em_update_eeprom_checksum +ffffffff817664d0 t em_commit_shadow_ram +ffffffff81766a50 T em_read_part_num +ffffffff81766ae0 T em_read_mac_addr +ffffffff81766c60 T em_mc_addr_list_update +ffffffff81766e80 T em_hash_mc_addr +ffffffff81766f80 T em_rar_set +ffffffff81767070 T em_mta_set +ffffffff817671e0 T em_get_bus_info +ffffffff81767370 T em_check_mng_mode +ffffffff817673e0 T em_valid_nvm_bank_detect_ich8lan +ffffffff81767590 T em_read_eeprom_spt +ffffffff81767860 T em_read_ich8_data32 +ffffffff817679d0 t em_ich8_cycle_init +ffffffff81767b80 t em_ich8_flash_cycle +ffffffff81767cf0 T em_configure_k1_ich8lan +ffffffff81767f00 t em_get_hw_eeprom_semaphore +ffffffff81768070 t em_shift_out_mdi_bits +ffffffff817681f0 t em_erase_ich8_4k_segment +ffffffff81768430 t em_write_ich8_byte +ffffffff817685a0 t em_read_ich8_data +ffffffff81769000 T em_lookup_gcu +ffffffff81769030 T em_attach_miibus +ffffffff81769060 T gcu_miibus_readreg +ffffffff817691d0 T gcu_miibus_writereg +ffffffff81769310 T gcu_miibus_statchg +ffffffff8176a000 T ixgb_probe +ffffffff8176a020 T ixgb_attach +ffffffff8176a440 T ixgb_local_timer +ffffffff8176a4e0 T ixgb_identify_hardware +ffffffff8176a5e0 T ixgb_allocate_pci_resources +ffffffff8176a770 T ixgb_dma_malloc +ffffffff8176a970 T ixgb_hardware_init +ffffffff8176aa20 T ixgb_setup_interface +ffffffff8176ab40 T ixgb_update_stats_counters +ffffffff8176b440 T ixgb_update_link_status +ffffffff8176b4c0 T ixgb_dma_free +ffffffff8176b570 T ixgb_free_pci_resources +ffffffff8176b5f0 T ixgb_start +ffffffff8176b7d0 T ixgb_encap +ffffffff8176b9c0 T ixgb_ioctl +ffffffff8176bc60 T ixgb_init +ffffffff8176c100 T ixgb_set_promisc +ffffffff8176c170 T ixgb_stop +ffffffff8176c1f0 T ixgb_disable_intr +ffffffff8176c220 T ixgb_set_multi +ffffffff8176c330 T ixgb_enable_intr +ffffffff8176c380 T ixgb_watchdog +ffffffff8176c410 T ixgb_enable_hw_vlans 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ixgbe_allocate_pci_resources +ffffffff81772ab0 T ixgbe_allocate_queues +ffffffff81772fb0 T ixgbe_allocate_msix +ffffffff817731f0 T ixgbe_allocate_legacy +ffffffff81773310 T ixgbe_setup_interface +ffffffff81773650 T ixgbe_free_transmit_structures +ffffffff817736c0 T ixgbe_free_receive_structures +ffffffff81773780 T ixgbe_free_pci_resources +ffffffff81773860 T ixgbe_stop +ffffffff81773b80 T ixgbe_init +ffffffff817747b0 T ixgbe_start +ffffffff81774990 T ixgbe_encap +ffffffff81774c90 T ixgbe_ioctl +ffffffff81774ff0 T ixgbe_rxrinfo +ffffffff81775140 T ixgbe_get_sffpage +ffffffff817752e0 T ixgbe_disable_intr +ffffffff817753b0 T ixgbe_iff +ffffffff81775520 T ixgbe_enable_intr +ffffffff81775630 T ixgbe_enable_queues +ffffffff81775730 T ixgbe_watchdog +ffffffff81775940 T ixgbe_setup_transmit_structures +ffffffff81775a20 T ixgbe_initialize_transmit_units +ffffffff81775ce0 T ixgbe_setup_receive_structures +ffffffff81775e10 T ixgbe_initialize_receive_units +ffffffff817762f0 T ixgbe_config_gpie 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T ixgbe_update_eeprom_checksum_generic +ffffffff8177ac30 T ixgbe_calc_eeprom_checksum_generic +ffffffff8177add0 T ixgbe_init_hw_generic +ffffffff8177ae20 T ixgbe_start_hw_generic +ffffffff8177af40 T ixgbe_clear_hw_cntrs_generic +ffffffff8177b920 T ixgbe_enable_rx_dma_generic +ffffffff8177b980 T ixgbe_get_mac_addr_generic +ffffffff8177ba10 T ixgbe_stop_adapter_generic +ffffffff8177bb90 T ixgbe_get_bus_info_generic +ffffffff8177bc40 T ixgbe_set_lan_id_multi_port_pcie +ffffffff8177bd10 T ixgbe_acquire_swfw_sync +ffffffff8177bf40 T ixgbe_release_swfw_sync +ffffffff8177bff0 T prot_autoc_read_generic +ffffffff8177c050 T prot_autoc_write_generic +ffffffff8177c0a0 T ixgbe_led_on_generic +ffffffff8177c160 T ixgbe_led_off_generic +ffffffff8177c210 T ixgbe_blink_led_start_generic +ffffffff8177c380 T ixgbe_blink_led_stop_generic +ffffffff8177c490 T ixgbe_set_rar_generic +ffffffff8177c5b0 T ixgbe_clear_rar_generic +ffffffff8177c6b0 T ixgbe_init_rx_addrs_generic +ffffffff8177c8b0 T ixgbe_update_mc_addr_list_generic +ffffffff8177caa0 T ixgbe_enable_mc_generic +ffffffff8177cb10 T ixgbe_disable_mc_generic +ffffffff8177cb70 T ixgbe_enable_rx_generic +ffffffff8177cc30 T ixgbe_disable_rx_generic +ffffffff8177cd10 T ixgbe_fc_enable_generic +ffffffff8177d140 T ixgbe_setup_fc_generic +ffffffff8177d410 T ixgbe_fc_autoneg +ffffffff8177d5e0 T ixgbe_device_supports_autoneg_fc +ffffffff8177d6d0 T ixgbe_start_hw_gen2 +ffffffff8177d8b0 T ixgbe_identify_phy +ffffffff8177d900 T ixgbe_set_pci_config_data_generic +ffffffff8177d970 T ixgbe_disable_rx +ffffffff8177d9b0 T ixgbe_disable_pcie_master +ffffffff8177db00 T ixgbe_read_eerd_buffer_generic +ffffffff8177dc40 T ixgbe_poll_eerd_eewr_done +ffffffff8177dce0 T ixgbe_write_eewr_buffer_generic +ffffffff8177de50 T ixgbe_write_eewr_generic +ffffffff8177de90 T ixgbe_acquire_eeprom +ffffffff8177e010 T ixgbe_get_eeprom_semaphore +ffffffff8177e220 T ixgbe_release_eeprom_semaphore +ffffffff8177e290 T ixgbe_ready_eeprom +ffffffff8177e3f0 T ixgbe_shift_out_eeprom_bits +ffffffff8177e5b0 T ixgbe_shift_in_eeprom_bits +ffffffff8177e710 T ixgbe_standby_eeprom +ffffffff8177e7f0 T ixgbe_raise_eeprom_clk +ffffffff8177e860 T ixgbe_lower_eeprom_clk +ffffffff8177e8d0 T ixgbe_release_eeprom +ffffffff8177e9b0 T ixgbe_validate_mac_addr +ffffffff8177ea10 T ixgbe_init_uta_tables +ffffffff8177ea50 T ixgbe_add_uc_addr +ffffffff8177eac0 T ixgbe_mta_vector +ffffffff8177eb60 T ixgbe_set_mta +ffffffff8177ec20 T ixgbe_negotiate_fc +ffffffff8177ecd0 T ixgbe_fc_autoneg_fiber +ffffffff8177ee00 T ixgbe_fc_autoneg_backplane +ffffffff8177ef60 T ixgbe_fc_autoneg_copper +ffffffff8177f090 T ixgbe_disable_sec_rx_path_generic +ffffffff8177f150 T ixgbe_enable_sec_rx_path_generic +ffffffff8177f1e0 T ixgbe_enable_rx +ffffffff8177f220 T ixgbe_get_pcie_msix_count_generic +ffffffff8177f2a0 T ixgbe_insert_mac_addr_generic +ffffffff8177f4a0 T ixgbe_set_vmdq +ffffffff8177f4e0 T ixgbe_set_rar +ffffffff8177f520 T ixgbe_clear_vmdq +ffffffff8177f560 T ixgbe_clear_vmdq_generic +ffffffff8177f700 T ixgbe_set_vmdq_generic +ffffffff8177f7b0 T ixgbe_init_uta_tables_generic +ffffffff8177f830 T ixgbe_find_vlvf_slot +ffffffff8177f8f0 T ixgbe_set_vfta_generic +ffffffff8177fa00 T ixgbe_set_vlvf_generic +ffffffff8177fc80 T ixgbe_clear_vfta_generic +ffffffff8177fd70 T ixgbe_need_crosstalk_fix +ffffffff8177fdc0 T ixgbe_check_mac_link_generic +ffffffff8177ffb0 T ixgbe_get_device_caps_generic +ffffffff81780000 T ixgbe_calculate_checksum +ffffffff817800c0 T ixgbe_hic_unlocked +ffffffff817802a0 T ixgbe_host_interface_command +ffffffff81780470 T ixgbe_clear_tx_pending +ffffffff81780660 T ixgbe_mng_present +ffffffff817806c0 T ixgbe_mng_enabled +ffffffff81780780 T ixgbe_setup_mac_link_multispeed_fiber +ffffffff81780b30 T ixgbe_flap_tx_laser +ffffffff81780b70 T ixgbe_check_link +ffffffff81780bb0 T ixgbe_set_soft_rate_select_speed +ffffffff81780ca0 T ixgbe_init_shared_code +ffffffff81780d50 T ixgbe_set_mac_type +ffffffff81780f00 T ixgbe_init_hw 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ixgbe_start_hw_82598 +ffffffff81782480 T ixgbe_reset_hw_82598 +ffffffff81782950 T ixgbe_get_media_type_82598 +ffffffff81782a10 T ixgbe_get_supported_physical_layer_82598 +ffffffff81782be0 T ixgbe_read_analog_reg8_82598 +ffffffff81782c90 T ixgbe_write_analog_reg8_82598 +ffffffff81782d10 T ixgbe_set_lan_id_multi_port_pcie_82598 +ffffffff81782db0 T ixgbe_enable_rx_dma_82598 +ffffffff81782e00 T ixgbe_set_vmdq_82598 +ffffffff81782eb0 T ixgbe_clear_vmdq_82598 +ffffffff81782f60 T ixgbe_set_vfta_82598 +ffffffff81783090 T ixgbe_clear_vfta_82598 +ffffffff81783240 T ixgbe_fc_enable_82598 +ffffffff817836a0 T ixgbe_read_i2c_eeprom_82598 +ffffffff817836c0 T ixgbe_check_mac_link_82598 +ffffffff81783950 T ixgbe_setup_mac_link_82598 +ffffffff81783b10 T ixgbe_get_link_capabilities_82598 +ffffffff81783bd0 T ixgbe_setup_copper_link_82598 +ffffffff81783ce0 T ixgbe_start_mac_link_82598 +ffffffff81783e00 T ixgbe_validate_link_ready +ffffffff81783eb0 T ixgbe_read_i2c_phy_82598 +ffffffff81785000 T ixgbe_init_mac_link_ops_82599 +ffffffff81785190 T ixgbe_disable_tx_laser_multispeed_fiber +ffffffff81785250 T ixgbe_enable_tx_laser_multispeed_fiber +ffffffff817852d0 T ixgbe_flap_tx_laser_multispeed_fiber +ffffffff81785410 T ixgbe_setup_mac_link_82599 +ffffffff817856a0 T ixgbe_set_hard_rate_select_speed +ffffffff81785760 T ixgbe_verify_lesm_fw_enabled_82599 +ffffffff81785820 T ixgbe_setup_mac_link_smartspeed +ffffffff81785ba0 T ixgbe_init_phy_ops_82599 +ffffffff81785cf0 T ixgbe_read_i2c_byte_82599 +ffffffff81785e60 T ixgbe_write_i2c_byte_82599 +ffffffff81785fd0 T ixgbe_setup_copper_link_82599 +ffffffff81786030 T ixgbe_setup_sfp_modules_82599 +ffffffff817861f0 T prot_autoc_read_82599 +ffffffff81786300 T prot_autoc_write_82599 +ffffffff81786470 T ixgbe_reset_pipeline_82599 +ffffffff817867b0 T ixgbe_init_ops_82599 +ffffffff81786990 T ixgbe_identify_phy_82599 +ffffffff81786a20 T ixgbe_reset_hw_82599 +ffffffff81786f60 T ixgbe_get_media_type_82599 +ffffffff81787090 T ixgbe_get_supported_physical_layer_82599 +ffffffff81787250 T ixgbe_enable_rx_dma_82599 +ffffffff817872c0 T ixgbe_read_analog_reg8_82599 +ffffffff81787370 T ixgbe_write_analog_reg8_82599 +ffffffff817873f0 T ixgbe_start_hw_82599 +ffffffff817874f0 T ixgbe_get_link_capabilities_82599 +ffffffff81787630 T ixgbe_stop_mac_link_on_d3_82599 +ffffffff817876e0 T ixgbe_read_eeprom_82599 +ffffffff81787710 T ixgbe_start_mac_link_82599 +ffffffff817878f0 T ixgbe_verify_fw_version_82599 +ffffffff81788000 T ixgbe_init_ops_X540 +ffffffff81788220 T ixgbe_init_eeprom_params_X540 +ffffffff817882a0 T ixgbe_read_eerd_X540 +ffffffff81788330 T ixgbe_write_eewr_X540 +ffffffff817883c0 T ixgbe_update_eeprom_checksum_X540 +ffffffff81788490 T ixgbe_validate_eeprom_checksum_X540 +ffffffff81788580 T ixgbe_calc_eeprom_checksum_X540 +ffffffff81788720 T ixgbe_reset_hw_X540 +ffffffff81788ab0 T ixgbe_get_media_type_X540 +ffffffff81788ae0 T ixgbe_get_supported_physical_layer_X540 +ffffffff81788b50 T ixgbe_start_hw_X540 +ffffffff81788ba0 T ixgbe_acquire_swfw_sync_X540 +ffffffff81788ff0 T ixgbe_release_swfw_sync_X540 +ffffffff81789120 T ixgbe_init_swfw_sync_X540 +ffffffff81789200 T ixgbe_setup_mac_link_X540 +ffffffff81789220 T ixgbe_blink_led_start_X540 +ffffffff81789340 T ixgbe_blink_led_stop_X540 +ffffffff81789440 T ixgbe_get_link_capabilities_X540 +ffffffff81789480 T ixgbe_update_flash_X540 +ffffffff81789660 T ixgbe_poll_flash_update_done_X540 +ffffffff817896f0 T ixgbe_get_swfw_sync_semaphore +ffffffff81789880 T ixgbe_release_swfw_sync_semaphore +ffffffff8178a000 T ixgbe_init_ops_X550 +ffffffff8178a110 T ixgbe_dmac_config_X550 +ffffffff8178a1f0 T ixgbe_dmac_config_tcs_X550 +ffffffff8178a340 T ixgbe_dmac_update_tcs_X550 +ffffffff8178a3f0 T ixgbe_set_source_address_pruning_X550 +ffffffff8178a4d0 T ixgbe_init_eeprom_params_X550 +ffffffff8178a550 T ixgbe_calc_eeprom_checksum_X550 +ffffffff8178a560 T ixgbe_read_ee_hostif_X550 +ffffffff8178a630 T ixgbe_write_ee_hostif_X550 +ffffffff8178a6f0 T ixgbe_update_eeprom_checksum_X550 +ffffffff8178a880 T ixgbe_validate_eeprom_checksum_X550 +ffffffff8178a9c0 T ixgbe_disable_rx_x550 +ffffffff8178aae0 T ixgbe_led_on_t_X550em +ffffffff8178aba0 T ixgbe_led_off_t_X550em +ffffffff8178ac60 T ixgbe_read_cs4227 +ffffffff8178ac90 T ixgbe_write_cs4227 +ffffffff8178acb0 T ixgbe_read_pe +ffffffff8178ad00 T ixgbe_write_pe +ffffffff8178ad50 T ixgbe_reset_cs4227 +ffffffff8178afd0 T ixgbe_check_cs4227 +ffffffff8178b180 T ixgbe_setup_mux_ctl +ffffffff8178b200 T ixgbe_identify_phy_x550em +ffffffff8178b420 T ixgbe_read_mng_if_sel_x550em +ffffffff8178b490 T ixgbe_fw_phy_activity +ffffffff8178b5b0 T ixgbe_get_phy_id_fw +ffffffff8178b6b0 T ixgbe_identify_phy_fw +ffffffff8178b700 T ixgbe_shutdown_fw_phy +ffffffff8178b760 T ixgbe_read_phy_reg_x550em +ffffffff8178b790 T ixgbe_write_phy_reg_x550em +ffffffff8178b7c0 T ixgbe_init_ops_X550EM +ffffffff8178ba70 T ixgbe_get_bus_info_X550em +ffffffff8178bac0 T ixgbe_get_media_type_X550em +ffffffff8178bbb0 T ixgbe_setup_sfp_modules_X550em +ffffffff8178bd40 T ixgbe_get_link_capabilities_X550em +ffffffff8178be10 T ixgbe_reset_hw_X550em +ffffffff8178c480 T ixgbe_get_supported_physical_layer_X550em +ffffffff8178c600 T ixgbe_setup_fc_X550em +ffffffff8178c750 T ixgbe_init_phy_ops_X550em +ffffffff8178cc20 T ixgbe_setup_fw_link +ffffffff8178cd50 T ixgbe_fc_autoneg_fw +ffffffff8178cd70 T ixgbe_setup_eee_fw +ffffffff8178cdd0 T ixgbe_init_ops_X550EM_a +ffffffff8178cf00 T ixgbe_read_iosf_sb_reg_x550 +ffffffff8178d080 T ixgbe_write_iosf_sb_reg_x550 +ffffffff8178d200 T ixgbe_read_iosf_sb_reg_x550a +ffffffff8178d290 T ixgbe_write_iosf_sb_reg_x550a +ffffffff8178d320 T ixgbe_acquire_swfw_sync_X550a +ffffffff8178d450 T ixgbe_release_swfw_sync_X550a +ffffffff8178d4e0 T ixgbe_fc_autoneg_fiber_x550em_a +ffffffff8178d520 T ixgbe_fc_autoneg_backplane_x550em_a +ffffffff8178d680 T ixgbe_setup_fc_backplane_x550em_a +ffffffff8178d870 T ixgbe_fc_autoneg_sgmii_x550em_a +ffffffff8178d960 T ixgbe_init_ops_X550EM_x +ffffffff8178da20 T ixgbe_acquire_swfw_sync_X550em +ffffffff8178dad0 T ixgbe_release_swfw_sync_X550em +ffffffff8178db60 T ixgbe_iosf_wait +ffffffff8178dc10 T ixgbe_get_phy_token +ffffffff8178dc90 T ixgbe_put_phy_token +ffffffff8178dd10 T ixgbe_supported_sfp_modules_X550em +ffffffff8178dd90 T ixgbe_identify_sfp_module_X550em +ffffffff8178de00 T ixgbe_init_mac_link_ops_X550em +ffffffff8178df40 T ixgbe_restart_an_internal_phy_x550em +ffffffff8178e050 T ixgbe_setup_sgmii +ffffffff8178e2f0 T ixgbe_setup_sgmii_fw +ffffffff8178e5c0 T ixgbe_setup_mac_link_sfp_x550a +ffffffff8178e7b0 T ixgbe_setup_mac_link_sfp_x550em +ffffffff8178e870 T ixgbe_setup_mac_link_t_X550em +ffffffff8178e920 T ixgbe_check_link_t_X550em +ffffffff8178e9f0 T ixgbe_get_lasi_ext_t_x550em +ffffffff8178eb70 T ixgbe_enable_lasi_ext_t_x550em +ffffffff8178ed00 T ixgbe_setup_kr_speed_x550em +ffffffff8178ef10 T ixgbe_reset_phy_fw +ffffffff8178efe0 T ixgbe_check_overtemp_fw +ffffffff8178f070 T ixgbe_read_phy_reg_x550a +ffffffff8178f110 T ixgbe_write_phy_reg_x550a +ffffffff8178f1b0 T ixgbe_setup_kr_x550em +ffffffff8178f220 T ixgbe_setup_internal_phy_t_x550em +ffffffff8178f3b0 T ixgbe_enter_lplu_t_x550em +ffffffff8178f6a0 T ixgbe_handle_lasi_ext_t_x550em +ffffffff8178f720 T ixgbe_reset_phy_t_X550em +ffffffff8178f770 T ixgbe_set_mdio_speed +ffffffff8178f840 T ixgbe_init_ext_t_x550em +ffffffff8178f8f0 T ixgbe_setup_sfi_x550a +ffffffff8178faa0 T ixgbe_setup_ixfi_x550em_x +ffffffff8178fc80 T ixgbe_setup_ixfi_x550em +ffffffff8178fe60 T ixgbe_ext_phy_t_x550em_get_link +ffffffff8178fef0 T ixgbe_setup_phy_loopback_x550em +ffffffff817900e0 T ixgbe_read_ee_hostif_buffer_X550 +ffffffff81790270 T ixgbe_write_ee_hostif_data_X550 +ffffffff817902d0 T ixgbe_checksum_ptr_x550 +ffffffff81790450 T ixgbe_calc_checksum_X550 +ffffffff817905e0 T ixgbe_update_flash_X550 +ffffffff81790630 T ixgbe_get_lcd_t_x550em +ffffffff817906e0 T ixgbe_set_mux +ffffffff81791000 T ixgbe_read_i2c_combined_generic_int +ffffffff81791250 T ixgbe_i2c_start +ffffffff817913b0 T ixgbe_clock_in_i2c_byte +ffffffff817914a0 T ixgbe_clock_out_i2c_bit +ffffffff817915b0 T ixgbe_i2c_stop +ffffffff81791730 T ixgbe_i2c_bus_clear +ffffffff81791850 T ixgbe_read_i2c_combined_generic +ffffffff81791870 T ixgbe_read_i2c_combined_generic_unlocked +ffffffff81791890 T ixgbe_write_i2c_combined_generic_int +ffffffff81791a70 T ixgbe_write_i2c_combined_generic +ffffffff81791a90 T ixgbe_write_i2c_combined_generic_unlocked +ffffffff81791ab0 T ixgbe_init_phy_ops_generic +ffffffff81791be0 T ixgbe_identify_phy_generic +ffffffff817920b0 T ixgbe_reset_phy_generic +ffffffff81792240 T ixgbe_read_phy_reg_generic +ffffffff817922e0 T ixgbe_write_phy_reg_generic +ffffffff81792380 T ixgbe_read_phy_reg_mdi +ffffffff81792500 T ixgbe_write_phy_reg_mdi +ffffffff81792660 T ixgbe_setup_phy_link_generic +ffffffff81792910 T ixgbe_setup_phy_link_speed_generic +ffffffff81792960 T ixgbe_get_phy_firmware_version_generic +ffffffff81792980 T ixgbe_read_i2c_byte_generic +ffffffff817929a0 T ixgbe_write_i2c_byte_generic +ffffffff817929c0 T ixgbe_read_i2c_eeprom_generic +ffffffff817929e0 T ixgbe_write_i2c_eeprom_generic +ffffffff81792a00 T ixgbe_identify_module_generic +ffffffff81792a70 T ixgbe_read_i2c_byte_generic_unlocked +ffffffff81792a90 T ixgbe_write_i2c_byte_generic_unlocked +ffffffff81792ab0 T ixgbe_tn_check_overtemp +ffffffff81792b20 T ixgbe_check_reset_blocked +ffffffff81792b80 T ixgbe_validate_phy_addr +ffffffff81792be0 T ixgbe_get_phy_id +ffffffff81792c90 T ixgbe_get_phy_type_from_id +ffffffff81792d50 T ixgbe_get_copper_link_capabilities_generic +ffffffff81792e30 T ixgbe_get_copper_speeds_supported +ffffffff81792ee0 T ixgbe_check_phy_link_tnx +ffffffff81793190 T ixgbe_setup_phy_link_tnx +ffffffff81793440 T ixgbe_get_phy_firmware_version_tnx +ffffffff81793460 T ixgbe_reset_phy_nl +ffffffff81793700 T ixgbe_get_sfp_init_sequence_offsets +ffffffff817938e0 T ixgbe_is_sfp +ffffffff81793930 T ixgbe_identify_sfp_module_generic +ffffffff81793d10 T ixgbe_identify_qsfp_module_generic +ffffffff81794000 T ixgbe_get_supported_phy_sfp_layer_generic +ffffffff817941a0 T ixgbe_is_sfp_probe +ffffffff817941e0 T ixgbe_read_i2c_byte_generic_int +ffffffff817943d0 T ixgbe_clock_out_i2c_byte +ffffffff81794530 T ixgbe_get_i2c_ack +ffffffff81794730 T ixgbe_write_i2c_byte_generic_int +ffffffff81794860 T ixgbe_set_i2c_data +ffffffff81794a10 T ixgbe_raise_i2c_clk +ffffffff81794b20 T ixgbe_lower_i2c_clk +ffffffff81794bb0 T ixgbe_clock_in_i2c_bit +ffffffff81794d80 T ixgbe_get_i2c_data +ffffffff81794e30 T ixgbe_set_copper_phy_power +ffffffff81795000 t ixl_match +ffffffff817950a0 t ixl_attach +ffffffff81797c40 t ixl_710_rd_ctl +ffffffff81797dd0 t ixl_710_wr_ctl +ffffffff81797f80 t ixl_710_set_rss_key +ffffffff81798100 t ixl_710_set_rss_lut +ffffffff81798180 t ixl_wakeup +ffffffff81798190 t ixl_722_rd_ctl +ffffffff817981b0 t ixl_722_wr_ctl +ffffffff817981e0 t ixl_722_set_rss_key +ffffffff81798210 t ixl_722_set_rss_lut +ffffffff81798240 t ixl_dmamem_alloc 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tht_fifo_alloc +ffffffff817a28a0 T tht_fw_load +ffffffff817a2c00 T tht_fifo_free +ffffffff817a2cb0 T tht_link_state +ffffffff817a2d60 T tht_write +ffffffff817a2db0 T tht_read +ffffffff817a2dd0 T tht_rxd +ffffffff817a31d0 T tht_rxf_fill +ffffffff817a3770 T tht_txf +ffffffff817a3a70 T tht_up +ffffffff817a4140 T tht_down +ffffffff817a4770 T tht_iff +ffffffff817a4940 T tht_pkt_alloc +ffffffff817a4b90 T tht_lladdr_write +ffffffff817a4c40 T tht_pkt_free +ffffffff817a4d10 T tht_write_region +ffffffff817a4d60 T tht_fifo_writable +ffffffff817a4dd0 T tht_fifo_readable +ffffffff817a4e40 T tht_rxf_drain +ffffffff817a4f40 T tht_fifo_pre +ffffffff817a4f80 T tht_pkt_get +ffffffff817a5000 T tht_load_pkt +ffffffff817a5140 T tht_pkt_put +ffffffff817a51b0 T tht_fifo_write +ffffffff817a5260 T tht_fifo_write_dmap +ffffffff817a5390 T tht_fifo_write_pad +ffffffff817a5460 T tht_fifo_post +ffffffff817a5520 T tht_fifo_read +ffffffff817a55c0 T tht_pkt_used +ffffffff817a55f0 T tht_dmamem_alloc +ffffffff817a5770 T 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puc_find_description +ffffffff817dc5d0 T puc_pci_intr_string +ffffffff817dc600 T puc_pci_intr_establish +ffffffff817dc710 T puc_pci_xr17v35x_intr +ffffffff817dc870 T puc_print_ports +ffffffff817dca40 T puc_common_attach +ffffffff817dcbf0 T puc_port_type_name +ffffffff817dcc30 T puc_print +ffffffff817dcca0 T puc_submatch +ffffffff817dd000 T com_puc_match +ffffffff817dd030 T com_puc_attach +ffffffff817dd140 T com_puc_detach +ffffffff817de000 T lpt_puc_probe +ffffffff817de030 T lpt_puc_attach +ffffffff817de100 T lpt_puc_detach +ffffffff817df000 T wi_pci_match +ffffffff817df040 T wi_pci_attach +ffffffff817df0d0 T wi_pci_activate +ffffffff817df1d0 T wi_pci_lookup +ffffffff817df3e0 T wi_pci_wakeup +ffffffff817df490 T wi_pci_acex_attach +ffffffff817df790 T wi_pci_common_attach +ffffffff817df8f0 T wi_pci_plx_attach +ffffffff817dfbe0 T wi_pci_plx_print_cis +ffffffff817dfde0 T wi_pci_tmd_attach +ffffffff817dff40 T wi_pci_native_attach +ffffffff817e1000 T an_pci_match +ffffffff817e1020 T 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T wpi_newassoc +ffffffff817e9db0 T wpi_updateedca +ffffffff817ea080 T wpi_set_key +ffffffff817ea2f0 T wpi_delete_key +ffffffff817ea520 T wpi_newstate +ffffffff817ea7e0 T wpi_media_change +ffffffff817ea940 T wpi_radiotap_attach +ffffffff817ea9d0 T wpi_calib_timeout +ffffffff817eaad0 T wpi_init_task +ffffffff817eab40 T wpi_free_tx_ring +ffffffff817ead20 T wpi_free_shared +ffffffff817eae10 T wpi_free_fwmem +ffffffff817eaf00 T wpi_free_rx_ring +ffffffff817eb040 T wpi_stop +ffffffff817eb0a0 T wpi_wakeup +ffffffff817eb140 T wpi_init +ffffffff817eb290 T wpi_nic_lock +ffffffff817eb350 T wpi_read_prom_data +ffffffff817eb740 T wpi_dma_contig_alloc +ffffffff817eb930 T wpi_dma_contig_free +ffffffff817eb9e0 T wpi_reset_rx_ring +ffffffff817ebb50 T wpi_reset_tx_ring +ffffffff817ebc40 T wpi_read_eeprom_channels +ffffffff817ebd90 T wpi_read_eeprom_group +ffffffff817ebe90 T wpi_set_led +ffffffff817ebfe0 T wpi_scan +ffffffff817ec2b0 T wpi_auth +ffffffff817ec730 T wpi_run +ffffffff817ecf60 T wpi_iter_func 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iwn5000_post_alive +ffffffff817f9600 T iwn5000_nic_config +ffffffff817f99d0 T iwn5000_reset_sched +ffffffff817f9ac0 T iwn5000_update_sched +ffffffff817f9ba0 T iwn5000_update_rxon +ffffffff817f9e20 T iwn5000_get_temperature +ffffffff817f9e80 T iwn5000_get_rssi +ffffffff817f9ed0 T iwn5000_set_txpower +ffffffff817f9f20 T iwn5000_init_gains +ffffffff817fa0c0 T iwn5000_set_gains +ffffffff817fa360 T iwn5000_add_node +ffffffff817fa380 T iwn5000_tx_done +ffffffff817fa580 T iwn5000_ampdu_tx_start +ffffffff817fa9c0 T iwn5000_ampdu_tx_stop +ffffffff817fac40 T iwn_free_rx_ring +ffffffff817fae20 T iwn_stop +ffffffff817faea0 T iwn_wakeup +ffffffff817faf50 T iwn_init +ffffffff817fb250 T iwn_nic_lock +ffffffff817fb310 T iwn_eeprom_lock +ffffffff817fb3e0 T iwn_init_otprom +ffffffff817fb830 T iwn_clock_wait +ffffffff817fb900 T iwn_read_prom_data +ffffffff817fbce0 T iwn_dma_contig_alloc +ffffffff817fbed0 T iwn_dma_contig_free +ffffffff817fbf80 T iwn_reset_rx_ring +ffffffff817fc100 T iwn_reset_tx_ring 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iwn_get_passive_dwell_time +ffffffff81803630 T iwn_rxon_configure_ht40 +ffffffff818036e0 T iwn_update_rxon_restore_power +ffffffff818037a0 T iwn5000_query_calibration +ffffffff81803890 T iwn5000_send_calibration +ffffffff818039d0 T iwn5000_send_wimax_coex +ffffffff81803a60 T iwn5000_crystal_calib +ffffffff81803ac0 T iwn_hw_stop +ffffffff81803eb0 T iwn_hw_init +ffffffff818045d0 T iwn4965_load_bootcode +ffffffff81804980 T iwn5000_load_firmware_section +ffffffff81804bd0 T iwn_read_firmware_leg +ffffffff81804ce0 T iwn_read_firmware_tlv +ffffffff81804f60 T iwn_read_firmware +ffffffff81805190 T iwn_apm_stop_master +ffffffff81806000 T iwm_lookup_cmd_ver +ffffffff81806070 T iwm_is_mimo_ht_plcp +ffffffff818060b0 T iwm_is_mimo_ht_mcs +ffffffff818060f0 T iwm_store_cscheme +ffffffff81806140 T iwm_firmware_store_section +ffffffff818061e0 T iwm_set_default_calib +ffffffff81806230 T iwm_fw_info_free +ffffffff81806280 T iwm_fw_version_str +ffffffff818062c0 T iwm_read_firmware +ffffffff81806c10 T iwm_read_prph_unlocked +ffffffff81806c70 T iwm_read_prph +ffffffff81806cf0 T iwm_nic_assert_locked +ffffffff81806d50 T iwm_write_prph_unlocked +ffffffff81806dc0 T iwm_write_prph +ffffffff81806e50 T iwm_write_prph64 +ffffffff81806f50 T iwm_read_mem +ffffffff81807080 T iwm_nic_lock +ffffffff818071d0 T iwm_nic_unlock +ffffffff81807280 T iwm_write_mem +ffffffff818073c0 T iwm_write_mem32 +ffffffff818074c0 T iwm_poll_bit +ffffffff81807590 T iwm_set_bits_mask_prph +ffffffff81807730 T iwm_set_bits_prph +ffffffff81807750 T iwm_clear_bits_prph +ffffffff81807770 T iwm_dma_contig_alloc +ffffffff81807950 T iwm_dma_contig_free +ffffffff81807a00 T iwm_alloc_rx_ring +ffffffff81807be0 T iwm_rx_addbuf +ffffffff81807dc0 T iwm_free_rx_ring +ffffffff81808070 T iwm_disable_rx_dma +ffffffff81808280 T iwm_reset_rx_ring +ffffffff81808300 T iwm_alloc_tx_ring +ffffffff818084e0 T iwm_free_tx_ring +ffffffff818086d0 T iwm_reset_tx_ring +ffffffff81808890 T iwm_enable_rfkill_int +ffffffff818089b0 T iwm_check_rfkill +ffffffff81808a30 T iwm_enable_interrupts +ffffffff81808ae0 T iwm_enable_fwload_interrupt +ffffffff81808bb0 T iwm_restore_interrupts +ffffffff81808be0 T iwm_disable_interrupts +ffffffff81808c90 T iwm_ict_reset +ffffffff81808e50 T iwm_set_hw_ready +ffffffff81809020 T iwm_prepare_card_hw +ffffffff81809160 T iwm_apm_config +ffffffff81809240 T iwm_apm_init +ffffffff81809930 T iwm_apm_stop +ffffffff81809cf0 T iwm_init_msix_hw +ffffffff81809d90 T iwm_conf_msix_hw +ffffffff8180a2e0 T iwm_clear_persistence_bit +ffffffff8180a430 T iwm_start_hw +ffffffff8180a650 T iwm_stop_device +ffffffff8180ac70 T iwm_nic_config +ffffffff8180ad40 T iwm_nic_rx_init +ffffffff8180ad60 T iwm_nic_rx_mq_init +ffffffff8180b160 T iwm_nic_rx_legacy_init +ffffffff8180b3a0 T iwm_nic_tx_init +ffffffff8180b570 T iwm_nic_init +ffffffff8180b6d0 T iwm_enable_ac_txq +ffffffff8180bb50 T iwm_enable_txq +ffffffff8180bd20 T iwm_send_cmd_pdu +ffffffff8180bda0 T iwm_disable_txq +ffffffff8180be80 T iwm_post_alive +ffffffff8180c3f0 T iwm_phy_db_get_section +ffffffff8180c4a0 T iwm_phy_db_set_section +ffffffff8180c5f0 T iwm_is_valid_channel +ffffffff8180c660 T iwm_ch_id_to_ch_index +ffffffff8180c6e0 T iwm_channel_id_to_papd +ffffffff8180c780 T iwm_channel_id_to_txp +ffffffff8180c910 T iwm_phy_db_get_section_data +ffffffff8180ca90 T iwm_send_phy_db_cmd +ffffffff8180cb30 T iwm_send_cmd +ffffffff8180d210 T iwm_phy_db_send_all_channel_groups +ffffffff8180d3e0 T iwm_send_phy_db_data +ffffffff8180d6d0 T iwm_send_time_event_cmd +ffffffff8180d7e0 T iwm_free_resp +ffffffff8180d850 T iwm_protect_session +ffffffff8180d900 T iwm_unprotect_session +ffffffff8180d9b0 T iwm_nvm_read_chunk +ffffffff8180db10 T iwm_nvm_read_section +ffffffff8180dbd0 T iwm_fw_valid_tx_ant +ffffffff8180dc10 T iwm_fw_valid_rx_ant +ffffffff8180dc50 T iwm_valid_siso_ant_rate_mask +ffffffff8180dcb0 T iwm_init_channel_map +ffffffff8180de20 T iwm_mimo_enabled +ffffffff8180de60 T iwm_setup_ht_rates +ffffffff8180df00 T iwm_setup_vht_rates +ffffffff8180df80 T iwm_init_reorder_buffer +ffffffff8180dfe0 T iwm_clear_reorder_buffer +ffffffff8180e090 T iwm_rx_ba_session_expired +ffffffff8180e190 T iwm_reorder_timer_expired +ffffffff8180e340 T iwm_release_frames +ffffffff8180e530 T iwm_sta_rx_agg +ffffffff8180ea30 T iwm_send_cmd_pdu_status +ffffffff8180eac0 T iwm_mac_ctxt_task +ffffffff8180ec20 T iwm_mac_ctxt_cmd +ffffffff8180ee20 T iwm_updateprot +ffffffff8180eee0 T iwm_add_task +ffffffff8180ef50 T iwm_updateslot +ffffffff8180f010 T iwm_updateedca +ffffffff8180f0d0 T iwm_phy_ctxt_task +ffffffff8180f290 T iwm_phy_ctxt_update +ffffffff8180f400 T iwm_setrates +ffffffff8180f590 T iwm_updatechan +ffffffff8180f650 T iwm_updatedtim +ffffffff8180f710 T iwm_sta_tx_agg +ffffffff8180fc10 T iwm_flush_sta +ffffffff8180fdb0 T iwm_txq_advance +ffffffff8180ffa0 T iwm_clear_oactive +ffffffff81810020 T iwm_ba_task +ffffffff81810260 T iwm_ampdu_rx_start +ffffffff81810330 T iwm_ampdu_rx_stop +ffffffff81810400 T iwm_ampdu_tx_start +ffffffff81810510 T iwm_ampdu_tx_stop +ffffffff818105f0 T iwm_set_hw_address_8000 +ffffffff81810860 T iwm_parse_nvm_data +ffffffff81810ab0 T iwm_parse_nvm_sections +ffffffff81810bb0 T iwm_nvm_init +ffffffff81810e70 T iwm_firmware_load_sect +ffffffff81810f20 T iwm_firmware_load_chunk +ffffffff818111d0 T iwm_load_firmware_7000 +ffffffff81811420 T iwm_load_cpu_sections_8000 +ffffffff818117b0 T iwm_load_firmware_8000 +ffffffff818119c0 T iwm_load_firmware +ffffffff81811aa0 T iwm_start_fw +ffffffff81811c60 T iwm_send_tx_ant_cfg +ffffffff81811cf0 T iwm_send_phy_cfg_cmd +ffffffff81811da0 T iwm_send_dqa_cmd +ffffffff81811e30 T iwm_load_ucode_wait_alive +ffffffff81812060 T iwm_save_fw_paging +ffffffff818120d0 T iwm_send_paging_cmd +ffffffff81812220 T iwm_free_fw_paging +ffffffff81812380 T iwm_run_init_mvm_ucode +ffffffff818127d0 T iwm_send_bt_init_conf +ffffffff81812860 T iwm_sf_config +ffffffff81812ab0 T iwm_config_ltr +ffffffff81812b70 T iwm_get_signal_strength +ffffffff81812bd0 T iwm_rxmq_get_signal_strength +ffffffff81812c10 T iwm_rx_rx_phy_cmd +ffffffff81812c70 T iwm_get_noise +ffffffff81812ce0 T iwm_ccmp_decap +ffffffff81812de0 T iwm_rx_hwdecrypt +ffffffff81812eb0 T iwm_rx_frame +ffffffff818131d0 T iwm_rx_mpdu +ffffffff818133d0 T iwm_flip_address +ffffffff81813420 T iwm_detect_duplicate +ffffffff81813520 T iwm_is_sn_less +ffffffff81813570 T iwm_oldsn_workaround +ffffffff81813630 T iwm_rx_reorder +ffffffff81813c60 T iwm_rx_mpdu_mq +ffffffff81814070 T iwm_ra_choose +ffffffff81814120 T iwm_ht_single_rate_control +ffffffff81814350 T iwm_vht_single_rate_control +ffffffff818145a0 T iwm_rx_tx_cmd_single +ffffffff81814770 T iwm_txd_done +ffffffff81814840 T iwm_reset_sched +ffffffff818148f0 T iwm_ampdu_tx_done +ffffffff81814c40 T iwm_rx_tx_cmd +ffffffff81814e10 T iwm_ampdu_rate_control +ffffffff81814fc0 T iwm_rx_compressed_ba +ffffffff818151a0 T iwm_rx_bmiss +ffffffff81815290 T iwm_binding_cmd +ffffffff81815430 T iwm_phy_ctxt_cmd_hdr +ffffffff818154a0 T iwm_phy_ctxt_cmd_data +ffffffff81815610 T iwm_get_vht_ctrl_pos +ffffffff81815680 T iwm_phy_ctxt_cmd_uhb +ffffffff818158b0 T iwm_phy_ctxt_cmd +ffffffff81815a00 T iwm_update_sched +ffffffff81815ad0 T iwm_send_cmd_status +ffffffff81815be0 T iwm_cmd_done +ffffffff81815d80 T iwm_tx_fill_cmd +ffffffff818161b0 T iwm_rval2ridx +ffffffff81816240 T iwm_tx +ffffffff81816c60 T iwm_flush_tx_path +ffffffff81816d20 T iwm_wait_tx_queues_empty +ffffffff81816de0 T iwm_led_enable +ffffffff81816e10 T iwm_led_disable +ffffffff81816e40 T iwm_led_is_enabled +ffffffff81816ea0 T iwm_led_blink_timeout +ffffffff81816f20 T iwm_led_blink_start +ffffffff81816f70 T iwm_led_blink_stop +ffffffff81816fb0 T iwm_beacon_filter_send_cmd +ffffffff81817030 T iwm_beacon_filter_set_cqm_params +ffffffff81817060 T iwm_update_beacon_abort +ffffffff81817150 T iwm_power_build_cmd +ffffffff818171e0 T iwm_power_mac_update_mode +ffffffff818173f0 T iwm_power_update_device +ffffffff81817490 T iwm_enable_beacon_filter +ffffffff81817580 T iwm_disable_beacon_filter +ffffffff81817650 T iwm_add_sta_cmd +ffffffff81817a50 T iwm_add_aux_sta +ffffffff81817be0 T iwm_drain_sta +ffffffff81817d90 T iwm_rm_sta_cmd +ffffffff81817e50 T iwm_scan_rx_chain +ffffffff81817ec0 T iwm_scan_rate_n_flags +ffffffff81817fb0 T iwm_lmac_scan_fill_channels +ffffffff81818090 T iwm_umac_scan_fill_channels +ffffffff81818180 T iwm_fill_probe_req_v1 +ffffffff81818220 T iwm_fill_probe_req +ffffffff81818460 T iwm_lmac_scan +ffffffff81818950 T iwm_config_umac_scan +ffffffff81818b60 T iwm_umac_scan_size +ffffffff81818bc0 T iwm_get_scan_req_umac_chan_param +ffffffff81818c10 T iwm_get_scan_req_umac_data +ffffffff81818c60 T iwm_umac_scan +ffffffff818190d0 T iwm_mcc_update +ffffffff81819160 T iwm_ridx2rate +ffffffff818191d0 T iwm_ack_rates +ffffffff81819480 T iwm_mac_ctxt_cmd_common +ffffffff81819780 T iwm_mac_ctxt_cmd_fill_sta +ffffffff81819830 T iwm_update_quotas +ffffffff81819c20 T iwm_del_task +ffffffff81819c80 T iwm_scan +ffffffff81819ef0 T iwm_scan_abort +ffffffff8181a010 T iwm_bgscan +ffffffff8181a0b0 T iwm_bgscan_done +ffffffff8181a150 T iwm_bgscan_done_task +ffffffff8181a3a0 T iwm_umac_scan_abort +ffffffff8181a430 T iwm_lmac_scan_abort +ffffffff8181a4d0 T iwm_auth +ffffffff8181a8d0 T iwm_deauth +ffffffff8181ac30 T iwm_run +ffffffff8181b310 T iwm_allow_mcast +ffffffff8181b410 T iwm_run_stop +ffffffff8181ba80 T iwm_node_alloc +ffffffff8181baa0 T iwm_set_key_v1 +ffffffff8181bbe0 T iwm_set_key +ffffffff8181be50 T iwm_delete_key_v1 +ffffffff8181bf70 T iwm_delete_key +ffffffff8181c1e0 T iwm_calib_timeout +ffffffff8181c290 T iwm_set_rate_table_vht +ffffffff8181c5b0 T iwm_set_rate_table +ffffffff8181c9b0 T iwm_media_change +ffffffff8181cb90 T iwm_stop +ffffffff8181d020 T iwm_init +ffffffff8181d2e0 T iwm_newstate_task +ffffffff8181d450 T iwm_newstate +ffffffff8181d5b0 T iwm_endscan +ffffffff8181d600 T iwm_fill_sf_command +ffffffff8181d6f0 T iwm_send_soc_conf +ffffffff8181d820 T iwm_send_update_mcc_cmd +ffffffff8181d9d0 T iwm_send_temp_report_ths_cmd +ffffffff8181daa0 T iwm_tt_tx_backoff +ffffffff8181db30 T iwm_fill_paging_mem +ffffffff8181dd60 T iwm_alloc_fw_paging_mem +ffffffff8181df00 T iwm_init_hw +ffffffff8181e8d0 T iwm_preinit +ffffffff8181eae0 T iwm_start +ffffffff8181eca0 T iwm_watchdog +ffffffff8181ee40 T iwm_nic_error +ffffffff8181f330 T iwm_dump_driver_status +ffffffff8181f3d0 T iwm_ioctl +ffffffff8181f530 T iwm_nic_umac_error +ffffffff8181f970 T iwm_desc_lookup +ffffffff8181fb00 T iwm_rx_pkt_valid +ffffffff8181fb50 T iwm_rx_pkt +ffffffff818208f0 T iwm_notif_intr +ffffffff81820a50 T iwm_intr +ffffffff81820e80 T iwm_intr_msix +ffffffff81821120 T iwm_match +ffffffff81821140 T iwm_attach_hook +ffffffff81821180 T iwm_attach +ffffffff81822230 T iwm_radiotap_attach +ffffffff818222c0 T iwm_init_task +ffffffff81822380 T iwm_resume +ffffffff818224b0 T iwm_wakeup +ffffffff81822550 T iwm_activate +ffffffff81823000 T iwx_lookup_cmd_ver +ffffffff81823070 T iwx_lookup_notif_ver +ffffffff818230e0 T iwx_is_mimo_ht_plcp +ffffffff81823120 T iwx_is_mimo_mcs +ffffffff81823160 T iwx_store_cscheme +ffffffff818231b0 T iwx_ctxt_info_alloc_dma +ffffffff81823240 T iwx_dma_contig_alloc +ffffffff81823420 T iwx_ctxt_info_free_paging +ffffffff81823580 T iwx_dma_contig_free +ffffffff81823630 T iwx_get_num_sections +ffffffff818236b0 T iwx_init_fw_sec +ffffffff81823b50 T iwx_fw_version_str +ffffffff81823b90 T iwx_alloc_fw_monitor_block +ffffffff81823c30 T iwx_alloc_fw_monitor +ffffffff81823ce0 T iwx_apply_debug_destination +ffffffff81824220 T iwx_nic_lock +ffffffff81824360 T iwx_write_prph +ffffffff81824400 T iwx_set_bits_prph +ffffffff81824420 T iwx_clear_bits_prph +ffffffff81824440 T iwx_read_prph +ffffffff818244d0 T iwx_nic_unlock +ffffffff81824580 T iwx_set_ltr +ffffffff818246c0 T iwx_ctxt_info_init +ffffffff81824980 T iwx_ctxt_info_free_fw_img +ffffffff81824af0 T iwx_ctxt_info_gen3_init +ffffffff818250e0 T iwx_write_umac_prph +ffffffff81825180 T iwx_firmware_store_section +ffffffff81825220 T iwx_set_default_calib +ffffffff81825270 T iwx_fw_info_free +ffffffff81825300 T iwx_read_firmware +ffffffff81825e80 T iwx_prph_addr_mask +ffffffff81825ec0 T iwx_read_prph_unlocked +ffffffff81825f30 T iwx_nic_assert_locked +ffffffff81825f90 T iwx_write_prph_unlocked +ffffffff81826010 T iwx_write_prph64 +ffffffff81826130 T iwx_read_umac_prph_unlocked +ffffffff818261b0 T iwx_read_umac_prph +ffffffff81826250 T iwx_write_umac_prph_unlocked +ffffffff818262d0 T iwx_read_mem +ffffffff81826400 T iwx_write_mem +ffffffff81826540 T iwx_write_mem32 +ffffffff81826640 T iwx_poll_bit +ffffffff81826710 T iwx_set_bits_mask_prph +ffffffff818268f0 T iwx_alloc_rx_ring +ffffffff81826ad0 T iwx_rx_addbuf +ffffffff81826ce0 T iwx_free_rx_ring +ffffffff81826f90 T iwx_disable_rx_dma +ffffffff818271f0 T iwx_reset_rx_ring +ffffffff81827290 T iwx_alloc_tx_ring +ffffffff81827490 T iwx_free_tx_ring +ffffffff81827720 T iwx_reset_tx_ring +ffffffff81827980 T iwx_enable_rfkill_int +ffffffff81827a60 T iwx_check_rfkill +ffffffff81827ae0 T iwx_enable_interrupts +ffffffff81827b90 T iwx_enable_fwload_interrupt +ffffffff81827c70 T iwx_restore_interrupts +ffffffff81827ca0 T iwx_disable_interrupts +ffffffff81827d50 T iwx_ict_reset +ffffffff81827f10 T iwx_set_hw_ready +ffffffff818280e0 T iwx_prepare_card_hw +ffffffff81828220 T iwx_force_power_gating +ffffffff818282d0 T iwx_apm_config +ffffffff818283a0 T iwx_apm_init +ffffffff818285f0 T iwx_apm_stop +ffffffff818289b0 T iwx_init_msix_hw +ffffffff81828a50 T iwx_conf_msix_hw +ffffffff81828ff0 T iwx_clear_persistence_bit +ffffffff81829170 T iwx_start_hw +ffffffff81829560 T iwx_stop_device +ffffffff81829ad0 T iwx_nic_config +ffffffff81829b50 T iwx_nic_rx_init +ffffffff81829ba0 T iwx_nic_init +ffffffff81829cc0 T iwx_enable_txq +ffffffff81829e90 T iwx_send_cmd +ffffffff8182a470 T iwx_free_resp +ffffffff8182a4e0 T iwx_disable_txq +ffffffff8182a650 T iwx_post_alive +ffffffff8182a660 T iwx_schedule_session_protection +ffffffff8182a730 T iwx_send_cmd_pdu +ffffffff8182a7b0 T iwx_unprotect_session +ffffffff8182a880 T iwx_fw_valid_tx_ant +ffffffff8182a8c0 T iwx_fw_valid_rx_ant +ffffffff8182a900 T iwx_init_channel_map +ffffffff8182aaf0 T iwx_mimo_enabled +ffffffff8182ab30 T iwx_setup_ht_rates +ffffffff8182abd0 T iwx_setup_vht_rates +ffffffff8182ac50 T iwx_init_reorder_buffer +ffffffff8182acb0 T iwx_clear_reorder_buffer +ffffffff8182ad60 T iwx_rx_ba_session_expired +ffffffff8182ae60 T iwx_rx_bar_frame_release +ffffffff8182af00 T iwx_release_frames +ffffffff8182b0f0 T iwx_reorder_timer_expired +ffffffff8182b2a0 T iwx_sta_rx_agg +ffffffff8182b6e0 T iwx_send_cmd_pdu_status +ffffffff8182b770 T iwx_mac_ctxt_task +ffffffff8182b900 T iwx_mac_ctxt_cmd +ffffffff8182bb00 T iwx_phy_ctxt_task +ffffffff8182bcc0 T iwx_phy_ctxt_update +ffffffff8182bff0 T iwx_updatechan +ffffffff8182c0b0 T iwx_add_task +ffffffff8182c120 T iwx_updateprot +ffffffff8182c1e0 T iwx_updateslot +ffffffff8182c2a0 T iwx_updateedca +ffffffff8182c360 T iwx_updatedtim +ffffffff8182c420 T iwx_sta_tx_agg_start +ffffffff8182c610 T iwx_ba_task +ffffffff8182c760 T iwx_ampdu_rx_start +ffffffff8182c830 T iwx_ampdu_rx_stop +ffffffff8182c900 T iwx_ampdu_tx_start +ffffffff8182ca10 T iwx_set_mac_addr_from_csr +ffffffff8182cc30 T iwx_flip_hw_address +ffffffff8182cc80 T iwx_is_valid_mac_addr +ffffffff8182cd10 T iwx_nvm_get +ffffffff8182cfe0 T iwx_load_firmware +ffffffff8182d1b0 T iwx_start_fw +ffffffff8182d390 T iwx_pnvm_handle_section +ffffffff8182d680 T iwx_ctxt_info_gen3_set_pnvm +ffffffff8182d6d0 T iwx_pnvm_parse +ffffffff8182d7b0 T iwx_load_pnvm +ffffffff8182db50 T iwx_send_tx_ant_cfg +ffffffff8182dbe0 T iwx_send_phy_cfg_cmd +ffffffff8182dc80 T iwx_send_dqa_cmd +ffffffff8182dd10 T iwx_load_ucode_wait_alive +ffffffff8182dd80 T iwx_run_init_mvm_ucode +ffffffff8182e000 T iwx_config_ltr +ffffffff8182e0c0 T iwx_update_rx_desc +ffffffff8182e160 T iwx_rxmq_get_signal_strength +ffffffff8182e1b0 T iwx_rx_rx_phy_cmd +ffffffff8182e210 T iwx_get_noise +ffffffff8182e280 T iwx_ccmp_decap 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iwx_wait_tx_queues_empty +ffffffff81831420 T iwx_drain_sta +ffffffff818315b0 T iwx_flush_sta +ffffffff81831910 T iwx_beacon_filter_send_cmd +ffffffff81831990 T iwx_update_beacon_abort +ffffffff81831aa0 T iwx_power_build_cmd +ffffffff81831b30 T iwx_power_mac_update_mode +ffffffff81831d50 T iwx_power_update_device +ffffffff81831df0 T iwx_enable_beacon_filter +ffffffff81831f00 T iwx_disable_beacon_filter +ffffffff81831ff0 T iwx_add_sta_cmd +ffffffff818322f0 T iwx_rm_sta_cmd +ffffffff818323b0 T iwx_rm_sta +ffffffff818325a0 T iwx_umac_scan_fill_channels +ffffffff818326d0 T iwx_fill_probe_req +ffffffff81832910 T iwx_config_umac_scan_reduced +ffffffff81832a70 T iwx_scan_umac_flags_v2 +ffffffff81832ab0 T iwx_scan_umac_dwell_v10 +ffffffff81832b20 T iwx_scan_umac_fill_general_p_v10 +ffffffff81832bb0 T iwx_scan_umac_fill_ch_p_v6 +ffffffff81832ce0 T iwx_umac_scan_v14 +ffffffff81832fd0 T iwx_mcc_update +ffffffff81833060 T iwx_ridx2rate +ffffffff818330d0 T iwx_ack_rates +ffffffff81833380 T iwx_mac_ctxt_cmd_common +ffffffff81833690 T iwx_mac_ctxt_cmd_fill_sta +ffffffff81833740 T iwx_clear_statistics +ffffffff81833810 T iwx_del_task +ffffffff81833870 T iwx_scan +ffffffff81833a10 T iwx_scan_abort +ffffffff81833ab0 T iwx_bgscan +ffffffff81833b30 T iwx_bgscan_done +ffffffff81833bd0 T iwx_bgscan_done_task +ffffffff81833d40 T iwx_umac_scan_abort +ffffffff81833dd0 T iwx_enable_mgmt_queue +ffffffff81833e50 T iwx_rs_rval2idx +ffffffff81833ec0 T iwx_rs_ht_rates +ffffffff81833f90 T iwx_rs_vht_rates +ffffffff81834050 T iwx_rs_init +ffffffff81834480 T iwx_rs_update +ffffffff81834600 T iwx_auth +ffffffff81834c10 T iwx_deauth +ffffffff81834eb0 T iwx_run +ffffffff818354f0 T iwx_sf_config +ffffffff81835740 T iwx_allow_mcast +ffffffff81835840 T iwx_run_stop +ffffffff81835c10 T iwx_node_alloc +ffffffff81835c30 T iwx_set_key +ffffffff81835d60 T iwx_add_sta_key +ffffffff81835fd0 T iwx_setkey_task +ffffffff818360a0 T iwx_delete_key +ffffffff81836220 T iwx_media_change +ffffffff81836400 T iwx_stop +ffffffff818368a0 T iwx_init +ffffffff81836b60 T iwx_newstate_task +ffffffff81836ca0 T iwx_newstate +ffffffff81836e70 T iwx_endscan +ffffffff81836ec0 T iwx_fill_sf_command +ffffffff81836fb0 T iwx_send_bt_init_conf +ffffffff81837040 T iwx_send_soc_conf +ffffffff81837170 T iwx_send_update_mcc_cmd +ffffffff81837300 T iwx_send_temp_report_ths_cmd +ffffffff818373d0 T iwx_init_hw +ffffffff81837c70 T iwx_preinit +ffffffff81837f20 T iwx_start +ffffffff818380e0 T iwx_watchdog +ffffffff818382f0 T iwx_nic_error +ffffffff818387e0 T iwx_dump_driver_status +ffffffff81838a10 T iwx_ioctl +ffffffff81838b70 T iwx_nic_umac_error +ffffffff81838fb0 T iwx_desc_lookup +ffffffff81839140 T iwx_rx_pkt_valid +ffffffff81839190 T iwx_rx_pkt +ffffffff8183a060 T iwx_notif_intr +ffffffff8183a1b0 T iwx_intr +ffffffff8183a640 T iwx_intr_msix +ffffffff8183a950 T iwx_match +ffffffff8183a970 T iwx_attach_hook +ffffffff8183a9b0 T iwx_find_device_cfg +ffffffff8183ab40 T iwx_attach +ffffffff8183bab0 T iwx_radiotap_attach +ffffffff8183bb40 T iwx_init_task +ffffffff8183bc00 T iwx_resume +ffffffff8183bd30 T iwx_wakeup +ffffffff8183bdd0 T iwx_activate +ffffffff8183c000 T cmpci_match +ffffffff8183c020 T cmpci_attach +ffffffff8183c4f0 T cmpci_activate +ffffffff8183c570 T cmpci_open +ffffffff8183c5a0 T cmpci_close +ffffffff8183c5d0 T cmpci_set_params +ffffffff8183d030 T cmpci_round_blocksize +ffffffff8183d060 T cmpci_halt_output +ffffffff8183d210 T cmpci_halt_input +ffffffff8183d380 T cmpci_set_port +ffffffff8183d4d0 T cmpci_get_port +ffffffff8183d5a0 T cmpci_query_devinfo +ffffffff8183dd70 T cmpci_malloc +ffffffff8183ddc0 T cmpci_free +ffffffff8183de90 T cmpci_round_buffersize +ffffffff8183ded0 T cmpci_trigger_output +ffffffff8183e1c0 T cmpci_trigger_input +ffffffff8183e470 T cmpci_mixerreg_read +ffffffff8183e500 T cmpci_mixerreg_write +ffffffff8183e570 T cmpci_reg_partial_write_1 +ffffffff8183e600 T cmpci_reg_partial_write_4 +ffffffff8183e690 T cmpci_reg_set_1 +ffffffff8183e6f0 T cmpci_reg_clear_1 +ffffffff8183e760 T cmpci_reg_set_4 +ffffffff8183e7c0 T cmpci_reg_clear_4 +ffffffff8183e830 T cmpci_reg_set_reg_misc +ffffffff8183e870 T cmpci_reg_clear_reg_misc +ffffffff8183e8b0 T cmpci_rate_to_index +ffffffff8183e930 T cmpci_index_to_rate +ffffffff8183e960 T cmpci_index_to_divider +ffffffff8183e990 T cmpci_intr +ffffffff8183ec90 T cmpci_set_mixer_gain +ffffffff8183f3e0 T cmpci_resume +ffffffff8183f450 T cmpci_alloc_dmamem +ffffffff8183f620 T cmpci_free_dmamem +ffffffff8183f6e0 T cmpci_find_dmamem +ffffffff8183f730 T cmpci_adjust +ffffffff8183f770 T cmpci_set_out_ports +ffffffff8183fd60 T cmpci_set_in_ports +ffffffff81840000 T iha_pci_probe +ffffffff81840060 T iha_pci_attach +ffffffff81841000 T pcscp_match +ffffffff81841030 T pcscp_attach +ffffffff81841410 T pcscp_read_reg +ffffffff81841440 T pcscp_write_reg +ffffffff81841470 T pcscp_dma_isintr +ffffffff818414c0 T pcscp_dma_reset +ffffffff81841520 T pcscp_dma_intr +ffffffff81841a80 T pcscp_dma_setup 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vmxnet3_media_change +ffffffff818934d0 T vmxnet3_media_status +ffffffff818935d0 T vmxnet3_link_state +ffffffff81893690 T vmxnet3_dma_allocmem +ffffffff818937e0 T vmxnet3_alloc_txring +ffffffff81893950 T vmxnet3_alloc_rxring +ffffffff81893c00 T vmxnet3_rxfill_tick +ffffffff81893c70 T vmxnet3_txinit +ffffffff81893cd0 T vmxnet3_rxfill +ffffffff81893f20 T vmxnet3_rxinit +ffffffff81893ff0 T vmxnet3_txstop +ffffffff81894080 T vmxnet3_rxstop +ffffffff81894180 T vmxnet3_enable_all_intrs +ffffffff81894240 T vmxnet3_disable_all_intrs +ffffffff81894310 T vmxnet3_evintr +ffffffff818944e0 T vmxnet3_rxintr +ffffffff81894870 T vmxnet3_txintr +ffffffff81894a10 T vmxnet3_init +ffffffff81894e20 T vmxnet3_rx_csum +ffffffff81894e80 T vmxnet3_iff +ffffffff81894fc0 T vmxnet3_stop +ffffffff81895200 T vmxnet3_reset +ffffffff81895240 t vmx_kstat_create +ffffffff81895420 t vmx_kstat_read +ffffffff81896000 T vmwpvs_match +ffffffff81896030 T vmwpvs_attach +ffffffff81896de0 T vmwpvs_scsi_cmd +ffffffff81897250 T vmwpvs_intx +ffffffff818972c0 T vmwpvs_msg_task +ffffffff81897540 T vmwpvs_intr +ffffffff81897720 T vmwpvs_get_config +ffffffff81897920 T vmwpvs_dmamem_zalloc +ffffffff81897980 T vmwpvs_dmamem_alloc +ffffffff81897b00 T vmwpvs_ccb_put +ffffffff81897b60 T vmwpvs_setup_rings +ffffffff81897c90 T vmwpvs_setup_msg_ring +ffffffff81897d80 T vmwpvs_ccb_get +ffffffff81897e00 T vmwpvs_dmamem_free +ffffffff81897e80 T vmwpvs_cmd +ffffffff81897f20 T vmwpvs_scsi_cmd_done +ffffffff81898100 T vmwpvs_scsi_cmd_poll +ffffffff81899000 T lii_match +ffffffff81899020 T lii_attach +ffffffff81899420 T lii_activate +ffffffff81899510 T lii_reset +ffffffff818997e0 T lii_spi_configure +ffffffff818998d0 T lii_eeprom_present +ffffffff81899960 T lii_eeprom_read +ffffffff81899990 T lii_spi_read +ffffffff81899c40 T lii_read_macaddr +ffffffff81899db0 T lii_intr +ffffffff81899ec0 T lii_alloc_rings +ffffffff8189a0d0 T lii_tick +ffffffff8189a120 T lii_mii_readreg +ffffffff8189a3c0 T lii_mii_writereg +ffffffff8189a650 T lii_mii_statchg +ffffffff8189a6c0 T lii_media_change +ffffffff8189a710 T lii_media_status +ffffffff8189a770 T lii_ioctl +ffffffff8189a900 T lii_start +ffffffff8189aaa0 T lii_watchdog +ffffffff8189aae0 T lii_stop +ffffffff8189ab50 T lii_init +ffffffff8189b040 T lii_iff +ffffffff8189b180 T lii_tx_put +ffffffff8189b290 T lii_free_tx_space +ffffffff8189b2d0 T lii_rxintr +ffffffff8189b480 T lii_txintr +ffffffff8189c000 T ichiic_match +ffffffff8189c020 T ichiic_attach +ffffffff8189c210 T ichiic_intr +ffffffff8189c320 T ichiic_i2c_acquire_bus +ffffffff8189c370 T ichiic_i2c_release_bus +ffffffff8189c3b0 T ichiic_i2c_exec +ffffffff8189d000 T viapm_match +ffffffff8189d020 T viapm_attach +ffffffff8189d630 T viapm_intr +ffffffff8189d740 T viapm_i2c_acquire_bus +ffffffff8189d790 T viapm_i2c_release_bus +ffffffff8189d7d0 T viapm_i2c_exec +ffffffff8189daf0 T viapm_refresh_sensor_data +ffffffff8189de20 T viapm_refresh +ffffffff8189de40 T val_to_uK +ffffffff8189dee0 T val_to_rpm +ffffffff8189df20 T val_to_uV +ffffffff8189dfc0 T viapm_get_timecount +ffffffff8189f000 T amdiic_match +ffffffff8189f020 T amdiic_attach +ffffffff8189f1f0 T amdiic_intr +ffffffff8189f2c0 T amdiic_i2c_acquire_bus +ffffffff8189f310 T amdiic_i2c_release_bus +ffffffff8189f350 T amdiic_i2c_exec +ffffffff8189f5b0 T amdiic_read +ffffffff8189f720 T amdiic_wait +ffffffff8189f7c0 T amdiic_write +ffffffff818a0000 T nviic_match +ffffffff818a0020 T nviic_attach +ffffffff818a0270 T nviic_i2c_acquire_bus +ffffffff818a02b0 T nviic_i2c_release_bus +ffffffff818a02f0 T nviic_i2c_exec +ffffffff818a0510 T nviic_write +ffffffff818a0560 T nviic_read +ffffffff818a1000 T sdhc_pci_match +ffffffff818a1060 T sdhc_pci_attach +ffffffff818a13a0 T sdhc_pci_activate +ffffffff818a13f0 T sdhc_takecontroller +ffffffff818a1490 T sdhc_ricohfix +ffffffff818a1600 T sdhc_pci_conf_write +ffffffff818a2000 T kate_match +ffffffff818a2160 T kate_attach +ffffffff818a2410 T kate_refresh +ffffffff818a3000 T km_match +ffffffff818a3050 T km_attach +ffffffff818a30e0 T km_refresh +ffffffff818a4000 T ksmn_match +ffffffff818a4050 T ksmn_attach +ffffffff818a4230 T ksmn_ccd_attach +ffffffff818a4380 T ksmn_refresh +ffffffff818a44d0 T ksmn_read_reg +ffffffff818a5000 T itherm_probe +ffffffff818a5020 T itherm_attach +ffffffff818a5370 T itherm_activate +ffffffff818a53f0 T itherm_enable +ffffffff818a5450 T itherm_refresh +ffffffff818a5460 T itherm_refresh_sensor_data +ffffffff818a5840 T itherm_bias_temperature_sensor +ffffffff818a6000 T pchtemp_match +ffffffff818a6020 T pchtemp_attach +ffffffff818a6180 T pchtemp_refresh +ffffffff818a7000 T rtsx_pci_match +ffffffff818a7090 T rtsx_pci_attach +ffffffff818a8000 T xspd_match +ffffffff818a8020 T xspd_attach +ffffffff818a81e0 T xspd_intr +ffffffff818a9000 T virtio_pci_match +ffffffff818a9070 T virtio_pci_attach +ffffffff818a9420 T virtio_pci_detach +ffffffff818a94f0 T virtio_pci_kick +ffffffff818a9540 T virtio_pci_read_device_config_1 +ffffffff818a9560 T virtio_pci_read_device_config_2 +ffffffff818a9590 T virtio_pci_read_device_config_4 +ffffffff818a95c0 T virtio_pci_read_device_config_8 +ffffffff818a9640 T virtio_pci_write_device_config_1 +ffffffff818a9670 T virtio_pci_write_device_config_2 +ffffffff818a96a0 T virtio_pci_write_device_config_4 +ffffffff818a96d0 T virtio_pci_write_device_config_8 +ffffffff818a9740 T virtio_pci_read_queue_size +ffffffff818a97b0 T virtio_pci_setup_queue +ffffffff818a9a90 T virtio_pci_set_status +ffffffff818a9b10 T virtio_pci_negotiate_features +ffffffff818a9c50 T virtio_pci_poll_intr +ffffffff818a9cb0 T virtio_pci_find_cap +ffffffff818a9e60 T virtio_pci_attach_10 +ffffffff818aa290 T virtio_pci_attach_09 +ffffffff818aa3d0 T virtio_pci_adjust_config_region +ffffffff818aa470 T virtio_pci_setup_msix +ffffffff818aa7d0 T virtio_pci_legacy_intr +ffffffff818aa870 T virtio_pci_legacy_intr_mpsafe +ffffffff818aa900 T virtio_pci_free_irqs +ffffffff818aab40 T virtio_pci_negotiate_features_10 +ffffffff818aad70 T virtio_pci_msix_establish +ffffffff818aae30 T virtio_pci_set_msix_queue_vector +ffffffff818aaeb0 T virtio_pci_set_msix_config_vector +ffffffff818aaef0 T virtio_pci_config_intr +ffffffff818aaf30 T virtio_pci_shared_queue_intr +ffffffff818aaf40 T virtio_pci_queue_intr +ffffffff818ab000 T dwiic_pci_match +ffffffff818ab020 T dwiic_pci_attach +ffffffff818ab340 T dwiic_pci_activate +ffffffff818ab3b0 T dwiic_pci_bus_scan +ffffffff818ac000 T bwfm_pci_buscore_read +ffffffff818ac060 T bwfm_pci_buscore_write +ffffffff818ac0d0 T bwfm_pci_buscore_prepare +ffffffff818ac100 T bwfm_pci_buscore_reset +ffffffff818ac2f0 T bwfm_pci_buscore_activate +ffffffff818ac320 T bwfm_pci_preinit +ffffffff818ad440 T bwfm_pci_stop +ffffffff818ad4d0 T bwfm_pci_txcheck +ffffffff818ad590 T bwfm_pci_txdata +ffffffff818ad8f0 T bwfm_pci_msgbuf_query_dcmd +ffffffff818add30 T bwfm_pci_msgbuf_set_dcmd +ffffffff818add70 T bwfm_pci_match +ffffffff818add90 T bwfm_pci_attach +ffffffff818adff0 T bwfm_pci_detach +ffffffff818ae030 T bwfm_pci_activate +ffffffff818ae1e0 T bwfm_pci_intr +ffffffff818ae440 T bwfm_pci_select_core +ffffffff818ae510 T bwfm_pci_load_microcode +ffffffff818ae990 T bwfm_pci_dmamem_alloc +ffffffff818aeb30 T bwfm_pci_setup_ring +ffffffff818aed30 T bwfm_pci_intr_enable +ffffffff818aed80 T bwfm_pci_hostready +ffffffff818aede0 T bwfm_pci_fill_rx_rings +ffffffff818aee20 T bwfm_pci_dmamem_free +ffffffff818aee90 T bwfm_pci_cleanup +ffffffff818af500 T bwfm_pci_send_mb_data +ffffffff818af620 T bwfm_pci_intmask +ffffffff818af660 T bwfm_pci_pktid_avail +ffffffff818af6d0 T bwfm_pci_pktid_new +ffffffff818af830 T bwfm_pci_pktid_free +ffffffff818af8d0 T bwfm_pci_fill_rx_buf_ring +ffffffff818afc20 T bwfm_pci_fill_rx_ioctl_ring +ffffffff818aff90 T bwfm_pci_ring_write_reserve +ffffffff818b0080 T bwfm_pci_ring_write_cancel +ffffffff818b00c0 T bwfm_pci_ring_write_commit +ffffffff818b01a0 T bwfm_pci_ring_write_rptr +ffffffff818b0220 T bwfm_pci_ring_write_wptr +ffffffff818b02a0 T bwfm_pci_setup_flowring +ffffffff818b0400 T bwfm_pci_ring_bell +ffffffff818b0440 T bwfm_pci_ring_update_rptr +ffffffff818b04f0 T bwfm_pci_ring_update_wptr +ffffffff818b0590 T bwfm_pci_ring_write_reserve_multi +ffffffff818b06b0 T bwfm_pci_ring_read_avail +ffffffff818b07b0 T bwfm_pci_ring_read_commit +ffffffff818b0830 T bwfm_pci_ring_rx +ffffffff818b0a40 T bwfm_pci_msg_rx +ffffffff818b1020 T bwfm_pci_flowring_delete_cb +ffffffff818b10d0 T bwfm_pci_msgbuf_rxioctl +ffffffff818b11c0 T bwfm_pci_intr_status +ffffffff818b1200 T bwfm_pci_intr_ack +ffffffff818b1240 T bwfm_pci_flowring_lookup +ffffffff818b13b0 T bwfm_pci_flowring_create +ffffffff818b14e0 T bwfm_pci_flowring_create_cb +ffffffff818b1820 T bwfm_pci_flowring_delete +ffffffff818b1af0 T bwfm_pci_msgbuf_h2d_mb_write +ffffffff818b1d10 T bwfm_pci_handle_mb_data +ffffffff818b1de0 T bwfm_pci_intr_disable +ffffffff818b2000 T ccp_pci_match +ffffffff818b2020 T ccp_pci_attach +ffffffff818b3000 T bnxt_match +ffffffff818b3020 T bnxt_attach +ffffffff818b41f0 T bnxt_dmamem_alloc +ffffffff818b4380 T bnxt_dmamem_free +ffffffff818b4400 T bnxt_hwrm_ver_get +ffffffff818b4550 T bnxt_hwrm_nvm_get_dev_info +ffffffff818b4690 T bnxt_hwrm_func_drv_rgtr +ffffffff818b47b0 T bnxt_hwrm_func_rgtr_async_events +ffffffff818b48d0 T bnxt_hwrm_func_qcaps +ffffffff818b49b0 T bnxt_admin_intr +ffffffff818b4bb0 T bnxt_intr +ffffffff818b5080 T bnxt_hwrm_func_qcfg +ffffffff818b5130 T bnxt_hwrm_queue_qportcfg +ffffffff818b5200 T bnxt_hwrm_func_reset +ffffffff818b52b0 T bnxt_mark_cpr_invalid +ffffffff818b5300 T bnxt_hwrm_ring_alloc +ffffffff818b54b0 T bnxt_cfg_async_cr +ffffffff818b55b0 T bnxt_write_cp_doorbell +ffffffff818b55f0 T bnxt_set_cp_ring_aggint +ffffffff818b56c0 T bnxt_ioctl +ffffffff818b5850 T bnxt_start +ffffffff818b5c70 T bnxt_watchdog +ffffffff818b5ca0 T bnxt_media_change +ffffffff818b5df0 T bnxt_media_status +ffffffff818b5e00 T bnxt_refill +ffffffff818b5e60 T bnxt_media_autonegotiate +ffffffff818b5f50 T bnxt_hwrm_port_phy_qcfg +ffffffff818b63e0 T bnxt_free_slots +ffffffff818b6470 T bnxt_hwrm_cmd_hdr_init +ffffffff818b64c0 T hwrm_send_message +ffffffff818b6540 T bnxt_queue_up +ffffffff818b7470 T bnxt_hwrm_stat_ctx_alloc +ffffffff818b7570 T bnxt_write_tx_doorbell +ffffffff818b75e0 T bnxt_write_rx_doorbell +ffffffff818b7650 T bnxt_hwrm_ring_grp_alloc +ffffffff818b7750 T bnxt_rx_fill +ffffffff818b7860 T bnxt_hwrm_ring_grp_free +ffffffff818b7940 T bnxt_hwrm_ring_free +ffffffff818b7a30 T bnxt_hwrm_stat_ctx_free +ffffffff818b7b20 T bnxt_queue_down +ffffffff818b8200 T bnxt_up +ffffffff818b88d0 T bnxt_hwrm_vnic_ctx_alloc +ffffffff818b89a0 T bnxt_hwrm_vnic_alloc +ffffffff818b8a90 T bnxt_hwrm_vnic_cfg +ffffffff818b8bd0 T bnxt_hwrm_vnic_cfg_placement +ffffffff818b8ca0 T bnxt_hwrm_set_filter +ffffffff818b8e20 T bnxt_hwrm_vnic_rss_cfg +ffffffff818b8ef0 T bnxt_iff +ffffffff818b9060 T bnxt_hwrm_vnic_free +ffffffff818b9140 T bnxt_hwrm_vnic_ctx_free +ffffffff818b9220 T bnxt_down +ffffffff818b95c0 T bnxt_hwrm_free_filter +ffffffff818b96a0 T bnxt_hwrm_cfa_l2_set_rx_mask +ffffffff818b9770 T bnxt_rxrinfo +ffffffff818b98c0 T bnxt_get_sffpage +ffffffff818b9bd0 T bnxt_load_mbuf +ffffffff818b9c80 T bnxt_handle_async_event +ffffffff818b9cc0 T bnxt_cpr_next_cmpl +ffffffff818b9d30 T bnxt_cpr_commit +ffffffff818b9d60 T bnxt_cpr_rollback +ffffffff818b9d90 T bnxt_write_cp_doorbell_index +ffffffff818b9e10 T bnxt_rx +ffffffff818ba0e0 T bnxt_txeof +ffffffff818ba200 T bnxt_get_media_type +ffffffff818ba750 T bnxt_add_media_type +ffffffff818ba910 T _hwrm_send_message +ffffffff818bd7c0 T bnxt_rx_fill_slots +ffffffff818bd970 T bnxt_hwrm_err_map +ffffffff818bd9b0 T _bnxt_hwrm_set_async_event_bit +ffffffff818be000 t mcx_match +ffffffff818be020 t mcx_attach +ffffffff818c1100 T mcx_rx_fill +ffffffff818c1340 T mcx_load_mbuf +ffffffff818c13f0 t mcx_dmamem_alloc +ffffffff818c1550 t mcx_pages +ffffffff818c1e30 t mcx_iff +ffffffff818c2270 t mcx_alloc_uar +ffffffff818c2460 t mcx_admin_intr +ffffffff818c2610 t mcx_create_eq +ffffffff818c2ba0 t mcx_ioctl +ffffffff818c3670 t mcx_start +ffffffff818c3b70 t mcx_watchdog +ffffffff818c3ba0 t mcx_media_change +ffffffff818c3e60 t mcx_media_status +ffffffff818c3fa0 t mcx_refill +ffffffff818c4010 t mcx_cq_intr +ffffffff818c4520 t mcx_calibrate +ffffffff818c46e0 t mcx_port_change +ffffffff818c4820 t mcx_cmdq_post +ffffffff818c4900 t mcx_set_flow_table_entry_mac +ffffffff818c4dd0 t mcx_delete_flow_table_entry +ffffffff818c5250 t mcx_access_hca_reg +ffffffff818c5680 t mcx_cmdq_exec +ffffffff818c5880 t mcx_up +ffffffff818c8b80 t mcx_down +ffffffff818c9be0 t mcx_create_flow_table +ffffffff818c9f90 t mcx_create_flow_group +ffffffff818ca470 t mcx_destroy_sq +ffffffff818ca720 t mcx_destroy_cq +ffffffff818ca9e0 t mcx_arm_cq +ffffffff818cab00 t mcx_destroy_flow_table +ffffffff818cae60 t mcx_kstat_attach_ppcnt +ffffffff818caf90 t mcx_kstat_ppcnt_read +ffffffff818cb0b0 t mcx_kstat_mtmp_read +ffffffff818cb240 t mcx_kstat_queue_read +ffffffff818cc6d0 t mcx_timecounter_read +ffffffff818cd000 t iavf_match +ffffffff818cd020 t iavf_attach +ffffffff818cd8f0 t iavf_reset +ffffffff818cdbc0 t iavf_dmamem_alloc +ffffffff818cdd20 t iavf_arq_fill +ffffffff818cdfd0 t iavf_arq_timeout +ffffffff818cdff0 t iavf_init_admin_queue +ffffffff818ce1a0 t iavf_get_version +ffffffff818ce3c0 t iavf_get_vf_resources +ffffffff818ce590 t iavf_config_irq_map +ffffffff818ce780 t iavf_intr +ffffffff818cee00 t iavf_ioctl +ffffffff818cf9b0 t iavf_start +ffffffff818cfd00 t iavf_watchdog +ffffffff818cfd30 t iavf_media_change +ffffffff818cfd60 t iavf_media_status +ffffffff818cfdf0 t iavf_arq_unfill +ffffffff818cfef0 t iavf_down +ffffffff818d0450 t iavf_up +ffffffff818d10c0 t iavf_queue_select +ffffffff818d12c0 t iavf_rxfill +ffffffff818d14c0 t iavf_rxrefill +ffffffff818d14e0 t iavf_process_arq +ffffffff818d2000 T rge_match +ffffffff818d2020 T rge_attach +ffffffff818d2510 T rge_activate +ffffffff818d2640 T rge_intr +ffffffff818d2930 T rge_config_imtype +ffffffff818d29a0 T rge_exit_oob +ffffffff818d31b0 T rge_hw_init +ffffffff818d35a0 T rge_get_macaddr +ffffffff818d3620 T rge_set_phy_power +ffffffff818d3880 T rge_phy_config +ffffffff818d41c0 T rge_allocmem +ffffffff818d45d0 T rge_ioctl +ffffffff818d4780 T rge_start +ffffffff818d4950 T rge_watchdog +ffffffff818d4990 T rge_wol +ffffffff818d4bb0 T rge_tick +ffffffff818d4c30 T rge_txstart +ffffffff818d4c60 T rge_ifmedia_upd +ffffffff818d5220 T rge_ifmedia_sts +ffffffff818d5300 T rge_add_media_types +ffffffff818d53b0 T rge_kstat_attach +ffffffff818d5680 T rge_wol_power +ffffffff818d5760 T rge_rxeof +ffffffff818d5b60 T rge_txeof +ffffffff818d5d60 T rge_init +ffffffff818d6f20 T rge_setup_intr +ffffffff818d7090 T rge_encap +ffffffff818d7330 T rge_stop +ffffffff818d7590 T rge_iff +ffffffff818d7700 T rge_set_macaddr +ffffffff818d77d0 T rge_rx_list_init +ffffffff818d7890 T rge_tx_list_init +ffffffff818d7950 T rge_read_csi +ffffffff818d7bc0 T rge_write_csi +ffffffff818d7e40 T rge_write_mac_ocp +ffffffff818d7e80 T rge_read_mac_ocp +ffffffff818d7ef0 T rge_reset +ffffffff818d80b0 T rge_write_phy_ocp +ffffffff818d8170 T rge_read_phy_ocp +ffffffff818d8220 T rge_read_phy +ffffffff818d82f0 T rge_write_phy +ffffffff818d83d0 T rge_get_link_status +ffffffff818d8420 T rge_newbuf +ffffffff818d85a0 T rge_discard_rxbuf +ffffffff818d8600 T rge_fill_rx_ring +ffffffff818d8680 T rge_phy_config_mac_cfg2 +ffffffff818da080 T rge_phy_config_mac_cfg3 +ffffffff818dbd30 T rge_phy_config_mac_cfg4 +ffffffff818dfda0 T rge_phy_config_mac_cfg5 +ffffffff818e0890 T rge_patch_phy_mcu +ffffffff818e0b00 T rge_write_ephy +ffffffff818e0d60 T rge_phy_config_mcu +ffffffff818e1820 T rge_read_ephy +ffffffff818e1aa0 T rge_disable_phy_ocp_pwrsave +ffffffff818e1c70 T rge_disable_hw_im +ffffffff818e1ca0 T rge_disable_sim_im +ffffffff818e1d00 T rge_setup_sim_im +ffffffff818e1d80 T rge_link_state +ffffffff818e1e00 t rge_kstat_read +ffffffff818e1fa0 t rge_kstat_copy +ffffffff818e3000 T igc_match +ffffffff818e3020 T igc_attach +ffffffff818e3490 T igc_detach +ffffffff818e3690 T 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drm_client_buffer_vunmap +ffffffff8190e550 T drm_client_framebuffer_create +ffffffff8190e830 T drm_client_framebuffer_delete +ffffffff8190e930 T drm_client_framebuffer_flush +ffffffff8190f000 T drm_client_modeset_create +ffffffff8190f140 T drm_client_modeset_free +ffffffff8190f250 T drm_client_modeset_probe +ffffffff81910a10 t drm_client_pick_crtcs +ffffffff81910d00 T drm_client_rotation +ffffffff81910ea0 T drm_client_modeset_check +ffffffff81910f40 t drm_client_modeset_commit_atomic +ffffffff81911140 T drm_client_modeset_commit_locked +ffffffff819112d0 T drm_client_modeset_commit +ffffffff81911340 T drm_client_modeset_dpms +ffffffff81911590 t drm_connector_pick_cmdline_mode +ffffffff81912000 T drm_color_ctm_s31_32_to_qm_n +ffffffff819120d0 T drm_crtc_enable_color_mgmt +ffffffff819121b0 T drm_mode_crtc_set_gamma_size +ffffffff819122d0 T drm_mode_gamma_set_ioctl +ffffffff819127c0 T drm_mode_gamma_get_ioctl +ffffffff81912900 T drm_get_color_encoding_name +ffffffff81912970 T drm_get_color_range_name +ffffffff819129e0 T drm_plane_create_color_properties +ffffffff81912c30 T drm_color_lut_check +ffffffff81913000 T drm_connector_ida_init +ffffffff81913110 T drm_connector_ida_destroy +ffffffff81913220 T drm_get_connector_type_name +ffffffff81913260 T drm_connector_free_work_fn +ffffffff81913320 T drm_connector_init +ffffffff819133a0 t __drm_connector_init +ffffffff819138b0 T drm_connector_init_with_ddc +ffffffff81913930 T drmm_connector_init +ffffffff819139f0 t drm_connector_cleanup_action +ffffffff81913a00 T drm_connector_attach_edid_property +ffffffff81913a20 T drm_connector_attach_encoder +ffffffff81913aa0 T drm_connector_has_possible_encoder +ffffffff81913ae0 T drm_connector_cleanup +ffffffff81913e00 T drm_connector_unregister +ffffffff81913e90 T drm_mode_put_tile_group +ffffffff81913f20 T drm_connector_register +ffffffff81914010 T drm_connector_unregister_all +ffffffff819141b0 T drm_connector_list_iter_begin +ffffffff819141e0 T drm_connector_list_iter_next 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drm_connector_set_panel_orientation +ffffffff81915a30 T drm_connector_set_panel_orientation_with_quirk +ffffffff81915b10 T drm_connector_set_orientation_from_panel +ffffffff81915c00 T drm_connector_create_privacy_screen_properties +ffffffff81915ca0 T drm_connector_attach_privacy_screen_properties +ffffffff81915d10 T drm_connector_attach_privacy_screen_provider +ffffffff81915e20 t drm_connector_privacy_screen_notifier +ffffffff81915ec0 T drm_connector_update_privacy_screen +ffffffff81915f30 T drm_connector_set_obj_prop +ffffffff81916010 T drm_connector_property_set_ioctl +ffffffff81916070 T drm_mode_getconnector +ffffffff819165b0 T drm_connector_find_by_fwnode +ffffffff81916660 T drm_connector_oob_hotplug_event +ffffffff81916740 T drm_mode_get_tile_group +ffffffff81916810 T drm_mode_create_tile_group +ffffffff819168d0 t drm_connector_free +ffffffff81916910 t kasprintf +ffffffff81917000 T drm_crtc_from_index +ffffffff81917060 T drm_crtc_force_disable +ffffffff81917170 T drm_mode_set_config_internal +ffffffff819171f0 T drm_crtc_register_all +ffffffff81917270 T drm_crtc_unregister_all +ffffffff819172e0 T drm_crtc_create_fence +ffffffff81917370 T drm_crtc_init_with_planes +ffffffff81917440 t __drm_crtc_init_with_planes +ffffffff81917830 T drmm_crtc_init_with_planes +ffffffff81917930 T __drmm_crtc_alloc_with_planes +ffffffff81917aa0 T drm_crtc_cleanup +ffffffff81917bc0 T drm_mode_getcrtc +ffffffff81917d50 t __drm_mode_set_config_internal +ffffffff81917ef0 T drm_crtc_check_viewport +ffffffff81917fa0 T drm_mode_setcrtc +ffffffff81918700 T drm_mode_crtc_set_obj_prop +ffffffff81918780 T drm_crtc_create_scaling_filter_property +ffffffff819187f0 t drm_crtc_fence_get_driver_name +ffffffff81918860 t drm_crtc_fence_get_timeline_name +ffffffff819188c0 t kasprintf +ffffffff81918990 t drmm_crtc_init_with_planes_cleanup +ffffffff81919000 T drm_helper_encoder_in_use +ffffffff81919170 T drm_helper_crtc_in_use +ffffffff81919290 T drm_helper_disable_unused_functions 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drm_mode_destroy_dumb_ioctl +ffffffff8191e000 T drm_edid_header_is_valid +ffffffff8191e080 T drm_edid_are_equal +ffffffff8191e0f0 T drm_edid_block_valid +ffffffff8191e2f0 t edid_block_check +ffffffff8191e420 t edid_block_status_print +ffffffff8191e520 T drm_edid_is_valid +ffffffff8191e5a0 T drm_edid_override_set +ffffffff8191e610 T drm_connector_update_edid_property +ffffffff8191e7b0 T drm_edid_override_reset +ffffffff8191e8e0 T drm_add_override_edid_modes +ffffffff8191eac0 T drm_add_edid_modes +ffffffff8191ebb0 T drm_do_get_edid +ffffffff8191ebc0 t _drm_do_get_edid +ffffffff8191f0d0 T drm_edid_raw +ffffffff8191f150 T drm_edid_alloc +ffffffff8191f210 T drm_edid_dup +ffffffff8191f2e0 T drm_edid_free +ffffffff8191f340 T drm_probe_ddc +ffffffff8191f430 t drm_do_probe_ddc_edid +ffffffff8191f570 T drm_get_edid +ffffffff8191f6b0 T drm_edid_read_custom +ffffffff8191f7a0 T drm_edid_read_ddc +ffffffff8191f8d0 T drm_edid_read +ffffffff8191f950 T drm_edid_get_panel_id +ffffffff8191fa20 t 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drm_fb_helper_fini +ffffffff8192aa10 T drm_fb_helper_set_suspend +ffffffff8192aa40 T drm_fb_helper_set_suspend_unlocked +ffffffff8192aa70 T drm_fb_helper_set_par +ffffffff8192ab60 T drm_fb_helper_pan_display +ffffffff8192ac30 T drm_fb_helper_fill_info +ffffffff8192acf0 T drm_fb_helper_initial_config +ffffffff8192ad20 t __drm_fb_helper_initial_config_and_unlock +ffffffff8192b270 T drm_fb_helper_hotplug_event +ffffffff8192b470 t drm_setup_crtcs_fb +ffffffff8192b5b0 T drm_fb_helper_lastclose +ffffffff8192b660 T drm_fb_helper_output_poll_changed +ffffffff8192b680 T drm_fbdev_generic_setup +ffffffff8192b830 t drm_fbdev_client_hotplug +ffffffff8192ba60 t drm_fbdev_client_unregister +ffffffff8192bad0 t drm_fbdev_client_restore +ffffffff8192bb70 t drm_fbdev_cleanup +ffffffff8192bc10 t drm_fbdev_use_shadow_fb +ffffffff8192bc60 t drm_fb_helper_generic_probe +ffffffff8192c000 T drm_dev_needs_global_mutex +ffffffff8192c060 T drm_file_alloc +ffffffff8192c2c0 T drm_file_free +ffffffff8192c4f0 T drm_lastclose +ffffffff8192c550 T drm_release +ffffffff8192c5a0 T drm_release_noglobal +ffffffff8192c5f0 T drm_read +ffffffff8192c640 T drm_event_reserve_init_locked +ffffffff8192c6b0 T drm_event_reserve_init +ffffffff8192c770 T drm_event_cancel_free +ffffffff8192c7f0 T drm_send_event_timestamp_locked +ffffffff8192c800 t drm_send_event_helper +ffffffff8192c9e0 T drm_send_event_locked +ffffffff8192c9f0 T drm_send_event +ffffffff8192ca40 T mock_drm_getfile +ffffffff8192d000 T drm_flip_work_allocate_task +ffffffff8192d050 T drm_flip_work_queue_task +ffffffff8192d0a0 T drm_flip_work_queue +ffffffff8192d140 T drm_flip_work_commit +ffffffff8192d1c0 T drm_flip_work_init +ffffffff8192d230 t flip_worker +ffffffff8192d310 T drm_flip_work_cleanup +ffffffff8192e000 T drm_fb_clip_offset +ffffffff8192e040 T drm_fb_memcpy +ffffffff8192e2c0 T drm_fb_swab +ffffffff8192e3c0 t drm_fb_swab32_line +ffffffff8192e410 t drm_fb_swab16_line +ffffffff8192e460 t drm_fb_xfrm +ffffffff8192e720 T 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drm_format_info_block_width +ffffffff81930440 T drm_format_info_block_height +ffffffff81930490 T drm_format_info_bpp +ffffffff81930500 T drm_format_info_min_pitch +ffffffff81931000 T drm_framebuffer_check_src_coords +ffffffff81931120 T drm_mode_addfb +ffffffff81931330 T drm_mode_addfb2 +ffffffff81931420 T drm_mode_addfb_ioctl +ffffffff81931430 T drm_internal_framebuffer_create +ffffffff81931950 T drm_mode_addfb2_ioctl +ffffffff81931a40 T drm_mode_rmfb +ffffffff81931c10 T drm_framebuffer_lookup +ffffffff81931c60 t drm_mode_rmfb_work_fn +ffffffff81931d20 T drm_mode_rmfb_ioctl +ffffffff81931d30 T drm_mode_getfb +ffffffff81931e90 T drm_mode_getfb2_ioctl +ffffffff81932240 T drm_mode_dirtyfb_ioctl +ffffffff819323e0 T drm_fb_release +ffffffff819324f0 T drm_framebuffer_free +ffffffff81932530 T drm_framebuffer_init +ffffffff81932690 T drm_framebuffer_unregister_private +ffffffff819326d0 T drm_framebuffer_cleanup +ffffffff81932730 T drm_framebuffer_remove +ffffffff81932be0 T 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dma_fence_array_cb_func +ffffffff81942100 t dma_fence_chain_cb +ffffffff819421c0 t dma_fence_chain_timo +ffffffff81943000 T drmm_kzalloc +ffffffff81943100 T drmm_kcalloc +ffffffff81943210 T drmm_kstrdup +ffffffff81943340 T drmm_kfree +ffffffff81943440 T drmm_add_action +ffffffff81943500 T drmm_add_action_or_reset +ffffffff819435d0 T drm_managed_release +ffffffff81943680 T drmm_add_final_kfree +ffffffff81944000 T mipi_dsi_attach +ffffffff81944050 T mipi_dsi_detach +ffffffff819440a0 T devm_mipi_dsi_attach +ffffffff81944110 T mipi_dsi_packet_format_is_short +ffffffff81944160 T mipi_dsi_packet_format_is_long +ffffffff819441b0 T mipi_dsi_create_packet +ffffffff819442b0 T mipi_dsi_shutdown_peripheral +ffffffff81944350 T mipi_dsi_turn_on_peripheral +ffffffff819443f0 T mipi_dsi_set_maximum_return_packet_size +ffffffff81944490 T mipi_dsi_compression_mode +ffffffff81944540 T mipi_dsi_picture_parameter_set +ffffffff819445f0 T mipi_dsi_generic_write +ffffffff819446a0 T mipi_dsi_generic_read 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drm_mm_scan_init_with_range +ffffffff81946e20 T drm_mm_scan_add_block +ffffffff81946f90 T drm_mm_scan_remove_block +ffffffff81947000 T drm_mm_scan_color_evict +ffffffff819470e0 T drm_mm_init +ffffffff81947180 T drm_mm_takedown +ffffffff819471c0 T drm_mm_print +ffffffff81948000 T drm_modeset_register_all +ffffffff819480a0 T drm_modeset_unregister_all +ffffffff819480d0 T drm_mode_getresources +ffffffff81948380 T drm_mode_config_reset +ffffffff819484d0 T drmm_mode_config_init +ffffffff81948b00 t drm_mode_config_init_release +ffffffff81948b10 T drm_mode_config_cleanup +ffffffff81948e50 T drm_mode_config_validate +ffffffff8194a000 T __drm_mode_object_add +ffffffff8194a100 T drm_mode_object_add +ffffffff8194a1d0 T drm_mode_object_register +ffffffff8194a220 T drm_mode_object_unregister +ffffffff8194a2c0 T drm_mode_object_lease_required +ffffffff8194a300 T __drm_mode_object_find +ffffffff8194a3b0 T drm_mode_object_find +ffffffff8194a460 T drm_mode_object_put +ffffffff8194a4e0 T drm_mode_object_get +ffffffff8194a540 T drm_object_attach_property +ffffffff8194a650 T drm_object_property_set_value +ffffffff8194a720 T drm_object_property_get_value +ffffffff8194a7b0 t __drm_object_property_get_value +ffffffff8194a890 T drm_object_property_get_default_value +ffffffff8194a960 T drm_mode_object_get_properties +ffffffff8194aaa0 T drm_mode_obj_get_properties_ioctl +ffffffff8194ace0 T drm_mode_obj_find_prop_id +ffffffff8194ad30 T drm_mode_obj_set_property_ioctl +ffffffff8194c000 T drm_mode_debug_printmodeline +ffffffff8194c130 T drm_mode_vrefresh +ffffffff8194c1d0 T drm_mode_create +ffffffff8194c1f0 T drm_mode_destroy +ffffffff8194c230 T drm_mode_probed_add +ffffffff8194c2d0 T drm_cvt_mode +ffffffff8194c780 T drm_mode_set_name +ffffffff8194c7d0 T drm_gtf_mode_complex +ffffffff8194cac0 T drm_gtf_mode +ffffffff8194cb10 T drm_mode_get_hv_timing +ffffffff8194cb60 T drm_mode_init +ffffffff8194cc30 T drm_mode_set_crtcinfo +ffffffff8194cde0 T drm_mode_copy +ffffffff8194ce40 T drm_mode_duplicate +ffffffff8194cec0 T drm_mode_match +ffffffff8194d060 T drm_mode_equal +ffffffff8194d080 T drm_mode_equal_no_clocks +ffffffff8194d0a0 T drm_mode_equal_no_clocks_no_stereo +ffffffff8194d160 T drm_mode_validate_driver +ffffffff8194d240 T drm_mode_validate_size +ffffffff8194d290 T drm_mode_validate_ycbcr420 +ffffffff8194d300 T drm_mode_is_420_only +ffffffff8194d350 T drm_get_mode_status_name +ffffffff8194d3c0 T drm_mode_prune_invalid +ffffffff8194d650 T drm_mode_sort +ffffffff8194d670 t drm_mode_compare +ffffffff8194d800 T drm_connector_list_update +ffffffff8194d9d0 T drm_mode_parse_command_line_for_connector +ffffffff8194da00 T drm_mode_create_from_cmdline_mode +ffffffff8194daf0 T drm_mode_convert_to_umode +ffffffff8194dc80 T drm_mode_convert_umode +ffffffff8194de90 T drm_mode_is_420_also +ffffffff8194dee0 T drm_mode_is_420 +ffffffff8194e000 T drm_helper_move_panel_connectors_to_head +ffffffff8194e0f0 T drm_helper_mode_fill_fb_struct +ffffffff8194e1b0 T drm_crtc_init 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__drm_printfn_seq_file +ffffffff81959260 T __drm_printfn_info +ffffffff81959290 T __drm_printfn_debug +ffffffff819592c0 T __drm_printfn_err +ffffffff81959300 T drm_puts +ffffffff81959330 T drm_printf +ffffffff819593b0 T drm_print_bits +ffffffff819595d0 T drm_dev_printk +ffffffff81959660 T __drm_dev_dbg +ffffffff819596f0 T ___drm_dbg +ffffffff81959780 T __drm_err +ffffffff81959810 T drm_print_regset32 +ffffffff8195a000 T drm_crtc_mode_valid +ffffffff8195a040 T drm_encoder_mode_valid +ffffffff8195a080 T drm_connector_mode_valid +ffffffff8195a0f0 T drm_kms_helper_poll_enable +ffffffff8195a1e0 T drm_helper_probe_detect +ffffffff8195a3d0 T drm_helper_probe_single_connector_modes +ffffffff8195a990 t __drm_helper_update_and_validate +ffffffff8195ad40 T drm_kms_helper_hotplug_event +ffffffff8195ad80 T drm_kms_helper_connector_hotplug_event +ffffffff8195adc0 T drm_kms_helper_is_poll_worker +ffffffff8195adf0 T drm_kms_helper_poll_disable +ffffffff8195ae60 T drm_kms_helper_poll_init +ffffffff8195aec0 t output_poll_execute +ffffffff8195b150 T drm_kms_helper_poll_fini +ffffffff8195b1d0 T drm_connector_helper_hpd_irq_event +ffffffff8195b290 t check_connector_changed +ffffffff8195b470 T drm_helper_hpd_irq_event +ffffffff8195b5c0 T drm_crtc_helper_mode_valid_fixed +ffffffff8195b610 T drm_connector_helper_get_modes_from_ddc +ffffffff8195b690 T drm_connector_helper_get_modes_fixed +ffffffff8195b7f0 T drm_connector_helper_get_modes +ffffffff8195b850 t __delayed_work_tick +ffffffff8195c000 T drm_property_create +ffffffff8195c1f0 T drm_property_create_enum +ffffffff8195c2a0 T drm_property_add_enum +ffffffff8195c4b0 T drm_property_destroy +ffffffff8195c560 T drm_property_create_bitmask +ffffffff8195c690 T drm_property_create_range +ffffffff8195c6f0 T drm_property_create_signed_range +ffffffff8195c760 T drm_property_create_object +ffffffff8195c7f0 T drm_property_create_bool +ffffffff8195c850 T drm_mode_getproperty_ioctl +ffffffff8195ca60 T drm_property_create_blob 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drm_self_refresh_helper_init +ffffffff8195f470 t drm_self_refresh_helper_entry_work +ffffffff8195f5d0 T drm_self_refresh_helper_cleanup +ffffffff8195f650 t __delayed_work_tick +ffffffff81960000 T drm_syncobj_find +ffffffff81960070 T drm_syncobj_add_point +ffffffff81960160 t syncobj_wait_syncobj_func +ffffffff81960210 T drm_syncobj_replace_fence +ffffffff819602a0 T drm_syncobj_find_fence +ffffffff81960600 t drm_syncobj_fence_add_wait +ffffffff819606d0 T drm_syncobj_free +ffffffff81960750 T drm_syncobj_create +ffffffff81960960 T drm_syncobj_get_handle +ffffffff81960a80 T drm_syncobj_get_fd +ffffffff81960ad0 T drm_syncobj_open +ffffffff81960b00 T drm_syncobj_release +ffffffff81960b30 t drm_syncobj_release_handle +ffffffff81960be0 T drm_syncobj_create_ioctl +ffffffff81960d00 T drm_syncobj_destroy_ioctl +ffffffff81960e20 T drm_syncobj_handle_to_fd_ioctl +ffffffff81961000 T drm_syncobj_fd_to_handle_ioctl +ffffffff819611e0 T drm_syncobj_transfer_ioctl +ffffffff819615f0 T drm_timeout_abs_to_jiffies +ffffffff819616d0 T drm_syncobj_wait_ioctl +ffffffff81961860 t drm_syncobj_array_find +ffffffff81961a90 t drm_syncobj_array_free +ffffffff81961b70 T drm_syncobj_timeline_wait_ioctl +ffffffff81961d00 T drm_syncobj_reset_ioctl +ffffffff81961e50 T drm_syncobj_signal_ioctl +ffffffff81961fd0 T drm_syncobj_timeline_signal_ioctl +ffffffff819621f0 T drm_syncobj_query_ioctl +ffffffff819623f0 t drm_syncobj_array_wait_timeout +ffffffff81962860 t syncobj_wait_fence_func +ffffffff81963000 T drm_vblank_count +ffffffff81963090 T drm_crtc_accurate_vblank_count +ffffffff819631a0 t drm_update_vblank_count +ffffffff819635f0 T drm_vblank_disable_and_save +ffffffff81963740 T drm_vblank_init +ffffffff819638c0 t vblank_disable_fn +ffffffff81963940 t drm_vblank_init_release +ffffffff819639c0 T drm_dev_has_vblank +ffffffff819639f0 T drm_crtc_vblank_waitqueue +ffffffff81963a30 T drm_calc_timestamping_constants +ffffffff81963c60 T drm_crtc_vblank_helper_get_vblank_timestamp_internal +ffffffff81964190 T drm_crtc_vblank_helper_get_vblank_timestamp +ffffffff819641b0 T drm_crtc_vblank_count +ffffffff81964240 T drm_crtc_vblank_count_and_time +ffffffff81964300 T drm_crtc_arm_vblank_event +ffffffff819643e0 T drm_crtc_send_vblank_event +ffffffff81964590 T drm_vblank_get +ffffffff819646a0 t drm_vblank_enable +ffffffff81964860 T drm_crtc_vblank_get +ffffffff81964960 T drm_vblank_put +ffffffff81964a90 T drm_crtc_vblank_put +ffffffff81964ab0 T drm_wait_one_vblank +ffffffff81964f00 T drm_crtc_wait_one_vblank +ffffffff81964f20 T drm_crtc_vblank_off +ffffffff81965300 T drm_crtc_vblank_reset +ffffffff81965430 T drm_crtc_set_max_vblank_count +ffffffff81965510 T drm_crtc_vblank_on +ffffffff81965660 t drm_reset_vblank_timestamp +ffffffff81965860 T drm_crtc_vblank_restore +ffffffff81965c40 T drm_legacy_modeset_ctl_ioctl +ffffffff81965e50 T drm_wait_vblank_ioctl +ffffffff81966890 T drm_handle_vblank +ffffffff81966b70 t drm_handle_vblank_events +ffffffff81966e00 T drm_crtc_handle_vblank +ffffffff81966e20 T drm_crtc_get_sequence_ioctl +ffffffff81967010 T drm_crtc_queue_sequence_ioctl +ffffffff819673e0 t __get_vblank_counter +ffffffff81968000 T drm_handle_vblank_works +ffffffff819681b0 T drm_vblank_cancel_pending_works +ffffffff819682f0 T drm_vblank_work_schedule +ffffffff81968570 T drm_vblank_work_cancel_sync +ffffffff819686d0 T drm_vblank_work_flush +ffffffff819687a0 T drm_vblank_work_init +ffffffff81968810 T drm_vblank_worker_init +ffffffff81969000 T drm_vma_offset_manager_init +ffffffff81969040 T drm_vma_offset_manager_destroy +ffffffff81969050 T drm_vma_offset_lookup_locked +ffffffff819690e0 T drm_vma_offset_add +ffffffff81969170 T drm_vma_offset_remove +ffffffff819691c0 T drm_vma_node_allow +ffffffff819691d0 t vma_node_allow +ffffffff81969300 T drm_vma_node_allow_once +ffffffff81969310 T drm_vma_node_revoke +ffffffff81969390 T drm_vma_node_is_allowed +ffffffff8196a000 T hdmi_avi_infoframe_init +ffffffff8196a070 T hdmi_avi_infoframe_check +ffffffff8196a0c0 T hdmi_avi_infoframe_pack_only +ffffffff8196a2c0 T hdmi_avi_infoframe_pack +ffffffff8196a320 T hdmi_spd_infoframe_init +ffffffff8196a3d0 T hdmi_spd_infoframe_check +ffffffff8196a420 T hdmi_spd_infoframe_pack_only +ffffffff8196a550 T hdmi_spd_infoframe_pack +ffffffff8196a6a0 T hdmi_audio_infoframe_init +ffffffff8196a6f0 T hdmi_audio_infoframe_check +ffffffff8196a740 T hdmi_audio_infoframe_pack_only +ffffffff8196a890 T hdmi_audio_infoframe_pack +ffffffff8196a8e0 T hdmi_audio_infoframe_pack_for_dp +ffffffff8196a9d0 T hdmi_vendor_infoframe_init +ffffffff8196aa30 T hdmi_vendor_infoframe_check +ffffffff8196aad0 T hdmi_vendor_infoframe_pack_only +ffffffff8196aca0 T hdmi_vendor_infoframe_pack +ffffffff8196ad40 T hdmi_drm_infoframe_init +ffffffff8196ada0 T hdmi_drm_infoframe_check +ffffffff8196adf0 T hdmi_drm_infoframe_pack_only +ffffffff8196afc0 T hdmi_drm_infoframe_pack +ffffffff8196b010 T hdmi_infoframe_check +ffffffff8196b160 T hdmi_infoframe_pack_only +ffffffff8196b370 T hdmi_infoframe_pack +ffffffff8196b4e0 T hdmi_infoframe_log +ffffffff8196c480 T hdmi_drm_infoframe_unpack_only +ffffffff8196c560 T hdmi_infoframe_unpack +ffffffff8196d000 T list_sort +ffffffff8196e000 T radix_tree_lookup +ffffffff8196e0b0 T radix_tree_iter_find +ffffffff8196e190 T radix_tree_delete +ffffffff8196e320 T radix_tree_iter_delete +ffffffff8196e340 T radix_tree_insert +ffffffff8196f000 T sort +ffffffff8196f040 t qsort +ffffffff81971000 T drm_dp_dual_mode_read +ffffffff81971110 T drm_dp_dual_mode_write +ffffffff819711f0 T drm_dp_dual_mode_detect +ffffffff81971490 T drm_dp_dual_mode_max_tmds_clock +ffffffff819715b0 T drm_dp_dual_mode_get_tmds_output +ffffffff819716e0 T drm_dp_dual_mode_set_tmds_output +ffffffff81971970 T drm_dp_get_dual_mode_type_name +ffffffff819719e0 T drm_lspcon_get_mode +ffffffff81971b90 T drm_lspcon_set_mode +ffffffff81972000 T drm_dp_channel_eq_ok +ffffffff81972080 T drm_dp_clock_recovery_ok +ffffffff81972100 T drm_dp_get_adjust_request_voltage +ffffffff81972140 T drm_dp_get_adjust_request_pre_emphasis +ffffffff81972180 T drm_dp_get_adjust_tx_ffe_preset +ffffffff819721c0 T drm_dp_128b132b_lane_channel_eq_done +ffffffff81972240 T drm_dp_128b132b_lane_symbol_locked +ffffffff819722b0 T drm_dp_128b132b_eq_interlane_align_done +ffffffff819722e0 T drm_dp_128b132b_cds_interlane_align_done +ffffffff81972310 T drm_dp_128b132b_link_training_failed +ffffffff81972340 T drm_dp_read_clock_recovery_delay +ffffffff81972440 T drm_dp_read_channel_eq_delay +ffffffff81972530 T drm_dp_128b132b_read_aux_rd_interval +ffffffff819725e0 T drm_dp_link_train_clock_recovery_delay +ffffffff81972660 t __8b10b_clock_recovery_delay_us +ffffffff819726e0 T drm_dp_link_train_channel_eq_delay +ffffffff81972750 T drm_dp_phy_name +ffffffff81972790 T drm_dp_lttpr_link_train_clock_recovery_delay +ffffffff819727b0 T drm_dp_lttpr_link_train_channel_eq_delay +ffffffff81972820 T drm_dp_link_rate_to_bw_code +ffffffff81972880 T drm_dp_bw_code_to_link_rate +ffffffff819728e0 T drm_dp_dpcd_probe +ffffffff81972a20 t drm_dp_dpcd_access +ffffffff81972b50 T drm_dp_dpcd_read +ffffffff81972c80 T drm_dp_dpcd_write +ffffffff81972d90 T drm_dp_dpcd_read_link_status +ffffffff81972db0 T drm_dp_dpcd_read_phy_link_status +ffffffff81972eb0 T drm_dp_downstream_is_type +ffffffff81972ef0 T drm_dp_downstream_is_tmds +ffffffff81972f60 T drm_dp_send_real_edid_checksum +ffffffff819731c0 T drm_dp_read_dpcd_caps +ffffffff81973350 T drm_dp_read_downstream_info +ffffffff81973450 T drm_dp_downstream_max_dotclock +ffffffff819734a0 T drm_dp_downstream_max_tmds_clock +ffffffff81973540 T drm_dp_downstream_min_tmds_clock +ffffffff819735c0 T drm_dp_downstream_max_bpc +ffffffff81973660 T drm_dp_downstream_420_passthrough +ffffffff819736c0 T drm_dp_downstream_444_to_420_conversion +ffffffff81973720 T drm_dp_downstream_rgb_to_ycbcr_conversion +ffffffff81973780 T drm_dp_downstream_mode +ffffffff81973800 T drm_dp_downstream_id +ffffffff81973820 T drm_dp_downstream_debug +ffffffff819738c0 T drm_dp_subconnector_type +ffffffff81973920 T drm_dp_set_subconnector_property +ffffffff81973990 T drm_dp_read_sink_count_cap +ffffffff819739e0 T drm_dp_read_sink_count +ffffffff81973a40 T drm_dp_remote_aux_init +ffffffff81973a70 t drm_dp_aux_crc_work +ffffffff81973be0 T drm_dp_aux_init +ffffffff81973c90 T drm_dp_aux_register +ffffffff81973db0 T drm_dp_aux_unregister +ffffffff81973de0 T drm_dp_psr_setup_time +ffffffff81973e20 T drm_dp_start_crc +ffffffff81973ec0 T drm_dp_stop_crc +ffffffff81973f50 T drm_dp_read_desc +ffffffff81974110 T drm_dp_dsc_sink_max_slice_count +ffffffff819741a0 T drm_dp_dsc_sink_line_buf_depth +ffffffff819741e0 T drm_dp_dsc_sink_supported_input_bpcs +ffffffff81974240 T drm_dp_read_lttpr_common_caps +ffffffff81974300 T drm_dp_read_lttpr_phy_caps +ffffffff819743c0 T drm_dp_lttpr_count +ffffffff81974440 T drm_dp_lttpr_max_link_rate +ffffffff81974490 T drm_dp_lttpr_max_lane_count +ffffffff819744c0 T drm_dp_lttpr_voltage_swing_level_3_supported +ffffffff819744f0 T drm_dp_lttpr_pre_emphasis_level_3_supported +ffffffff81974520 T drm_dp_get_phy_test_pattern +ffffffff81974640 T drm_dp_set_phy_test_pattern +ffffffff81974710 T drm_dp_vsc_sdp_log +ffffffff81974a40 T drm_dp_get_pcon_max_frl_bw +ffffffff81974a80 T drm_dp_pcon_frl_prepare +ffffffff81974ad0 T drm_dp_pcon_is_frl_ready +ffffffff81974b20 T drm_dp_pcon_frl_configure_1 +ffffffff81974c10 T drm_dp_pcon_frl_configure_2 +ffffffff81974c70 T drm_dp_pcon_reset_frl_config +ffffffff81974cc0 T drm_dp_pcon_frl_enable +ffffffff81974d70 T drm_dp_pcon_hdmi_link_active +ffffffff81974dc0 T drm_dp_pcon_hdmi_link_mode +ffffffff81974e30 T drm_dp_pcon_hdmi_frl_link_error_count +ffffffff81974f30 T drm_dp_pcon_enc_is_dsc_1_2 +ffffffff81974f60 T drm_dp_pcon_dsc_max_slices +ffffffff81974ff0 T drm_dp_pcon_dsc_max_slice_width +ffffffff81975020 T drm_dp_pcon_dsc_bpp_incr +ffffffff81975060 T drm_dp_pcon_pps_default +ffffffff819750e0 T drm_dp_pcon_pps_override_buf +ffffffff81975190 T drm_dp_pcon_pps_override_param +ffffffff81975270 T drm_dp_pcon_convert_rgb_to_ycbcr +ffffffff81975300 T drm_edp_backlight_set_level +ffffffff819753e0 T drm_edp_backlight_enable +ffffffff819755f0 t drm_edp_backlight_set_enable +ffffffff81975730 T drm_edp_backlight_disable +ffffffff81975770 T drm_edp_backlight_init +ffffffff81975cc0 T drm_panel_dp_aux_backlight +ffffffff81975e50 t __128b132b_channel_eq_delay_us +ffffffff81975ed0 t __8b10b_channel_eq_delay_us +ffffffff81975f50 t drm_dp_aux_get_crc +ffffffff81976020 t drm_dp_i2c_xfer +ffffffff81976270 t drm_dp_i2c_functionality +ffffffff819762a0 t drm_dp_i2c_do_msg +ffffffff81976680 t lock_bus +ffffffff819766a0 t trylock_bus +ffffffff819766f0 t unlock_bus +ffffffff81976710 t dp_aux_backlight_update_status +ffffffff81977000 T drm_dp_encode_sideband_req +ffffffff81977410 T drm_dp_decode_sideband_req +ffffffff81977950 T drm_dp_dump_sideband_msg_req_body +ffffffff81977d00 T drm_dp_mst_get_port_malloc +ffffffff81977d40 T drm_dp_mst_put_port_malloc +ffffffff81977e30 t kref_put +ffffffff81977e70 T drm_atomic_get_mst_payload_state +ffffffff81977ec0 T drm_dp_mst_dpcd_read +ffffffff81978180 T drm_dp_mst_dpcd_write +ffffffff819781d0 t drm_dp_send_dpcd_write +ffffffff81978410 T drm_dp_mst_connector_late_register +ffffffff81978490 T drm_dp_mst_connector_early_unregister +ffffffff819784d0 T drm_dp_send_power_updown_phy +ffffffff81978710 t drm_dp_mst_topology_put_port +ffffffff81978840 t drm_dp_mst_wait_tx_reply +ffffffff81978b90 T drm_dp_send_query_stream_enc_status +ffffffff81978e50 T drm_dp_add_payload_part1 +ffffffff81978fd0 T drm_dp_remove_payload +ffffffff81979160 T drm_dp_add_payload_part2 +ffffffff81979310 T drm_dp_get_vc_payload_bw +ffffffff819793a0 T drm_dp_read_mst_cap +ffffffff81979400 T drm_dp_mst_topology_mgr_set_mst +ffffffff81979690 t drm_dp_dpcd_write_payload +ffffffff81979820 t drm_dp_mst_topology_put_mstb +ffffffff81979920 T drm_dp_mst_topology_mgr_suspend +ffffffff819799e0 t drm_dp_mst_topology_mgr_invalidate_mstb +ffffffff81979a50 T drm_dp_mst_topology_mgr_resume +ffffffff81979c90 T drm_dp_mst_hpd_irq +ffffffff8197ab10 T drm_dp_mst_detect_port +ffffffff8197ac80 T drm_dp_mst_get_edid +ffffffff8197ad80 T drm_dp_atomic_find_time_slots +ffffffff8197b050 T drm_atomic_get_mst_topology_state +ffffffff8197b060 T drm_dp_atomic_release_time_slots +ffffffff8197b280 T drm_dp_mst_atomic_setup_commit +ffffffff8197b410 T drm_dp_mst_atomic_wait_for_dependencies +ffffffff8197b590 T drm_dp_mst_root_conn_atomic_check +ffffffff8197b6a0 T drm_dp_mst_update_slots +ffffffff8197b6f0 T drm_dp_check_act_status +ffffffff8197b8a0 T drm_dp_calc_pbn_mode +ffffffff8197b910 T drm_dp_mst_dump_topology +ffffffff8197bb60 t drm_dp_mst_dump_mstb +ffffffff8197bbd0 T drm_dp_mst_add_affected_dsc_crtcs +ffffffff8197bd00 T drm_dp_mst_dsc_aux_for_port +ffffffff8197bf20 T drm_dp_mst_atomic_enable_dsc +ffffffff8197c0c0 T drm_dp_mst_atomic_check +ffffffff8197c3a0 t drm_dp_mst_atomic_check_mstb_bw_limit +ffffffff8197c670 t drm_dp_mst_duplicate_state +ffffffff8197c840 t drm_dp_mst_destroy_state +ffffffff8197c900 T drm_atomic_get_new_mst_topology_state +ffffffff8197c910 T drm_dp_mst_topology_mgr_init +ffffffff8197cb70 t drm_dp_mst_link_probe_work +ffffffff8197ce10 t drm_dp_tx_work +ffffffff8197ce50 t drm_dp_delayed_destroy_work +ffffffff8197d270 t drm_dp_mst_up_req_work +ffffffff8197d770 T drm_dp_mst_topology_mgr_destroy +ffffffff8197d7f0 t drm_dp_mst_is_virtual_dpcd +ffffffff8197d8d0 t drm_dp_free_mst_branch_device +ffffffff8197d910 t drm_dp_mst_topology_get_port_validated_locked +ffffffff8197d990 t drm_dp_mst_dump_sideband_msg_tx +ffffffff8197dba0 t process_single_down_tx_qlock +ffffffff8197dd10 t process_single_tx_qlock +ffffffff8197e1f0 t drm_dp_msg_data_crc4 +ffffffff8197e310 t drm_dp_payload_send_msg +ffffffff8197e760 t drm_dp_mst_topology_get_mstb_validated_locked +ffffffff8197e7e0 t drm_dp_get_one_sb_msg +ffffffff8197ef00 t drm_dp_get_mst_branch_device +ffffffff8197f070 t drm_dp_check_and_send_link_address +ffffffff8197f140 t drm_dp_send_link_address +ffffffff8197fdf0 t drm_dp_send_enum_path_resources +ffffffff81980050 t drm_dp_port_set_pdt +ffffffff81980330 t drm_dp_mst_port_add_connector +ffffffff81980510 t drm_dp_mst_i2c_xfer +ffffffff81980c00 t drm_dp_mst_i2c_functionality +ffffffff81980c30 t get_mst_branch_device_by_guid_helper +ffffffff81981000 T drm_dsc_dp_pps_header_init +ffffffff81981030 T drm_dsc_dp_rc_buffer_size +ffffffff81981090 T drm_dsc_pps_payload_pack +ffffffff81981320 T drm_dsc_compute_rc_parameters +ffffffff81982000 T drm_connector_attach_content_protection_property +ffffffff81982030 T drm_hdcp_check_ksvs_revoked +ffffffff81982080 T drm_hdcp_update_content_protection +ffffffff81983000 T drm_hdmi_infoframe_set_hdr_metadata +ffffffff81983120 T drm_hdmi_avi_infoframe_colorimetry +ffffffff81983170 T drm_hdmi_avi_infoframe_bars +ffffffff819831c0 T drm_hdmi_avi_infoframe_content_type +ffffffff81984000 T drm_scdc_read +ffffffff81984090 T drm_scdc_write +ffffffff81984170 T drm_scdc_get_scrambling_status +ffffffff81984220 T drm_scdc_set_scrambling +ffffffff81984370 T drm_scdc_set_high_tmds_clock_ratio +ffffffff81985000 T drm_gem_ttm_mmap +ffffffff81985070 T drm_gem_ttm_vmap +ffffffff81985080 T drm_gem_ttm_vunmap +ffffffff81986000 T ttm_agp_bind +ffffffff81986050 T ttm_agp_unbind +ffffffff81986070 T ttm_agp_is_bound +ffffffff819860c0 T ttm_agp_destroy +ffffffff819860e0 T ttm_agp_tt_create +ffffffff81987000 T ttm_bo_move_to_lru_tail +ffffffff81987040 T ttm_bo_set_bulk_move +ffffffff81987100 T ttm_bo_delayed_delete +ffffffff819873f0 t ttm_bo_cleanup_refs +ffffffff819877a0 T ttm_bo_put +ffffffff81987ce0 T ttm_bo_lock_delayed_workqueue +ffffffff81987d60 T ttm_bo_unlock_delayed_workqueue +ffffffff81987dd0 T ttm_bo_eviction_valuable +ffffffff81987e20 T ttm_mem_evict_first +ffffffff819886e0 T ttm_bo_pin +ffffffff81988780 T ttm_bo_unpin +ffffffff81988890 T ttm_bo_mem_space +ffffffff81988ae0 t ttm_bo_add_move_fence +ffffffff81988ba0 T ttm_bo_validate +ffffffff81988d20 T ttm_bo_init_reserved +ffffffff81988fc0 T ttm_bo_init_validate +ffffffff81989130 T ttm_bo_unmap_virtual +ffffffff81989240 T ttm_bo_wait +ffffffff819892c0 T ttm_bo_swapout +ffffffff819896d0 t ttm_bo_handle_move_mem +ffffffff81989840 T ttm_bo_tt_destroy +ffffffff8198a000 T ttm_mem_io_reserve +ffffffff8198a060 T ttm_mem_io_free +ffffffff8198a0d0 T ttm_move_memcpy +ffffffff8198a290 T ttm_bo_move_memcpy +ffffffff8198a4b0 T ttm_bo_move_sync_cleanup +ffffffff8198a5a0 T ttm_io_prot +ffffffff8198a5e0 T ttm_bo_kmap +ffffffff8198a890 T ttm_bo_kunmap +ffffffff8198a9d0 T ttm_bo_vmap +ffffffff8198abc0 T ttm_bo_vunmap +ffffffff8198aca0 T ttm_bo_move_accel_cleanup +ffffffff8198af60 T ttm_bo_pipeline_gutting +ffffffff8198b200 t ttm_buffer_object_transfer +ffffffff8198b450 t ttm_transfered_destroy +ffffffff8198c000 T ttm_bo_vm_reserve +ffffffff8198c250 T ttm_bo_vm_fault_reserved +ffffffff8198c560 T ttm_bo_vm_fault +ffffffff8198c6c0 T ttm_bo_vm_reference +ffffffff8198c6f0 T ttm_bo_vm_detach +ffffffff8198c700 T ttm_bo_mmap_obj +ffffffff8198d000 T ttm_global_swapout +ffffffff8198d100 T ttm_device_swapout +ffffffff8198d210 T ttm_device_init +ffffffff8198d460 t ttm_device_delayed_workqueue +ffffffff8198d500 T ttm_device_fini +ffffffff8198d6e0 T ttm_device_clear_dma_mappings +ffffffff8198d780 t ttm_device_clear_lru_dma_mappings +ffffffff8198d830 t __delayed_work_tick +ffffffff8198e000 T ttm_eu_backoff_reservation +ffffffff8198e130 T ttm_eu_reserve_buffers +ffffffff8198e520 T ttm_eu_fence_buffer_objects +ffffffff8198e670 t __ww_mutex_lock +ffffffff8198f000 T ttm_prot_from_caching +ffffffff81990000 T ttm_pool_alloc +ffffffff819907b0 T ttm_pool_free +ffffffff81990bd0 T ttm_pool_init +ffffffff81990e80 T ttm_pool_fini +ffffffff81991050 t ttm_pool_type_fini +ffffffff81991290 T ttm_pool_mgr_init +ffffffff81991570 t ttm_pool_shrinker_count +ffffffff819915c0 t ttm_pool_shrinker_scan +ffffffff819917d0 T ttm_pool_mgr_fini +ffffffff81992000 T ttm_range_man_init_nocheck +ffffffff81992180 T ttm_range_man_fini_nocheck +ffffffff81992310 t ttm_range_man_alloc +ffffffff81992450 t ttm_range_man_free +ffffffff819924b0 t ttm_range_man_intersects +ffffffff81992510 t ttm_range_man_compatible +ffffffff81992570 t ttm_range_man_debug +ffffffff81993000 T ttm_lru_bulk_move_init +ffffffff81993020 T ttm_lru_bulk_move_tail +ffffffff819931e0 T ttm_resource_add_bulk_move +ffffffff819932a0 T ttm_resource_del_bulk_move +ffffffff81993390 T ttm_resource_move_to_lru_tail +ffffffff819934e0 T ttm_resource_init +ffffffff819935e0 T ttm_resource_fini +ffffffff81993650 T ttm_resource_alloc +ffffffff81993790 T ttm_resource_free +ffffffff81993900 T ttm_resource_intersects +ffffffff81993950 T ttm_resource_compatible +ffffffff819939a0 T ttm_resource_compat +ffffffff81993b30 T ttm_resource_set_bo +ffffffff81993b80 T ttm_resource_manager_init +ffffffff81993c20 T ttm_resource_manager_evict_all +ffffffff81993de0 T ttm_resource_manager_usage +ffffffff81993e40 T ttm_resource_manager_debug +ffffffff81993f20 T ttm_resource_manager_first +ffffffff81993fb0 T ttm_resource_manager_next +ffffffff819940f0 T ttm_kmap_iter_iomap_init +ffffffff81994150 T ttm_kmap_iter_linear_io_init +ffffffff81994320 T ttm_kmap_iter_linear_io_fini +ffffffff81994370 T ttm_resource_manager_create_debugfs +ffffffff819943a0 t ttm_kmap_iter_iomap_map_local +ffffffff819944d0 t ttm_kmap_iter_iomap_unmap_local +ffffffff819944f0 t ttm_kmap_iter_linear_io_map_local +ffffffff81995000 T ttm_sys_man_init +ffffffff81995130 t ttm_sys_man_alloc +ffffffff819951b0 t ttm_sys_man_free +ffffffff81996000 T ttm_tt_create +ffffffff81996100 T ttm_tt_destroy +ffffffff81996120 T ttm_tt_init +ffffffff819961f0 T ttm_tt_fini +ffffffff819962d0 T ttm_sg_tt_init +ffffffff819964f0 T ttm_tt_swapin +ffffffff81996600 T ttm_tt_swapout +ffffffff81996650 T ttm_tt_populate +ffffffff81996820 T ttm_tt_unpopulate +ffffffff819968c0 T ttm_tt_mgr_init +ffffffff81996920 T ttm_kmap_iter_tt_init +ffffffff81996980 t ttm_kmap_iter_tt_map_local +ffffffff819969d0 t ttm_kmap_iter_tt_unmap_local +ffffffff81997000 T drm_sched_entity_init +ffffffff81997180 T drm_sched_entity_modify_sched +ffffffff81997200 T drm_sched_entity_is_ready +ffffffff81997240 T drm_sched_entity_flush +ffffffff819975b0 T drm_sched_entity_fini +ffffffff819978c0 T drm_sched_entity_destroy +ffffffff81997910 T drm_sched_entity_set_priority +ffffffff81997950 T drm_sched_entity_pop_job +ffffffff81997b90 T drm_sched_entity_select_rq +ffffffff81997c70 T drm_sched_entity_push_job +ffffffff81997d70 t drm_sched_entity_kill_jobs_cb +ffffffff81997dc0 t drm_sched_entity_kill_jobs_work +ffffffff81997e30 t drm_sched_entity_clear_dep +ffffffff81997e50 t drm_sched_entity_wakeup +ffffffff81998000 T drm_sched_fence_slab_init +ffffffff81998060 T drm_sched_fence_slab_fini +ffffffff81998080 T drm_sched_fence_scheduled +ffffffff81998090 T drm_sched_fence_finished +ffffffff819980a0 T drm_sched_fence_free +ffffffff81998140 T to_drm_sched_fence +ffffffff819981a0 T drm_sched_fence_alloc +ffffffff81998220 T drm_sched_fence_init +ffffffff819982a0 t drm_sched_fence_get_driver_name +ffffffff819982d0 t drm_sched_fence_get_timeline_name +ffffffff81998320 t drm_sched_fence_release_scheduled +ffffffff81998420 t drm_sched_fence_release_finished +ffffffff81999000 T drm_sched_rq_add_entity +ffffffff81999090 T drm_sched_rq_remove_entity +ffffffff81999120 T drm_sched_dependency_optimized +ffffffff819991b0 T drm_sched_fault +ffffffff819991e0 T drm_sched_suspend_timeout +ffffffff81999260 T drm_sched_resume_timeout +ffffffff81999300 T drm_sched_increase_karma +ffffffff81999320 T drm_sched_increase_karma_ext +ffffffff81999470 T drm_sched_reset_karma +ffffffff81999480 T drm_sched_stop +ffffffff81999650 T drm_sched_start +ffffffff81999760 t drm_sched_job_done_cb +ffffffff81999770 t drm_sched_job_done +ffffffff81999840 T drm_sched_resubmit_jobs +ffffffff81999990 T drm_sched_resubmit_jobs_ext +ffffffff81999af0 T drm_sched_job_init +ffffffff81999b70 T drm_sched_job_arm +ffffffff81999c00 T drm_sched_job_add_dependency +ffffffff81999d60 T drm_sched_job_add_implicit_dependencies +ffffffff81999e20 T drm_sched_job_cleanup +ffffffff81999ed0 T drm_sched_wakeup +ffffffff81999fa0 T drm_sched_pick_best +ffffffff8199a050 T drm_sched_init +ffffffff8199a2d0 t drm_sched_job_timedout +ffffffff8199a420 t drm_sched_main +ffffffff8199a840 T drm_sched_fini +ffffffff8199aa50 t __delayed_work_tick +ffffffff8199aa70 t drm_sched_get_cleanup_job +ffffffff8199abb0 t drm_sched_select_entity +ffffffff8199b000 t ch7017_init +ffffffff8199b140 t ch7017_dpms +ffffffff8199b380 t ch7017_mode_valid +ffffffff8199b3c0 t ch7017_mode_set +ffffffff8199b670 t ch7017_detect +ffffffff8199b6a0 t ch7017_get_hw_state +ffffffff8199b720 t ch7017_destroy +ffffffff8199b770 t ch7017_dump_regs +ffffffff8199c000 t ch7xxx_init +ffffffff8199c290 t ch7xxx_dpms +ffffffff8199c360 t ch7xxx_mode_valid +ffffffff8199c3a0 t ch7xxx_mode_set +ffffffff8199c840 t ch7xxx_detect +ffffffff8199ca90 t ch7xxx_get_hw_state +ffffffff8199cb60 t ch7xxx_destroy +ffffffff8199cbb0 t ch7xxx_dump_regs +ffffffff8199d000 t ivch_init +ffffffff8199d380 t ivch_dpms +ffffffff8199d7a0 t ivch_mode_valid +ffffffff8199d7e0 t ivch_mode_set +ffffffff8199dbd0 t ivch_detect +ffffffff8199dc00 t ivch_get_hw_state +ffffffff8199de20 t ivch_destroy +ffffffff8199de70 t ivch_dump_regs +ffffffff8199f000 t ns2501_init +ffffffff8199f200 t ns2501_dpms +ffffffff8199f910 t ns2501_mode_valid +ffffffff8199f9e0 t ns2501_mode_set +ffffffff819a0be0 t ns2501_detect +ffffffff819a0c10 t ns2501_get_hw_state +ffffffff819a0cf0 t ns2501_destroy +ffffffff819a1000 t sil164_init +ffffffff819a1200 t sil164_dpms +ffffffff819a1330 t sil164_mode_valid +ffffffff819a1360 t sil164_mode_set +ffffffff819a1390 t sil164_detect +ffffffff819a1480 t sil164_get_hw_state +ffffffff819a1550 t sil164_destroy +ffffffff819a15a0 t sil164_dump_regs +ffffffff819a2000 t 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dp_tp_ctl_reg +ffffffff819dd9f0 T dp_tp_status_reg +ffffffff819dda70 T intel_ddi_update_pipe +ffffffff819ddaf0 T intel_ddi_compute_min_voltage_level +ffffffff819ddb60 T intel_ddi_get_clock +ffffffff819ddc70 T hsw_ddi_get_config +ffffffff819ddd50 t intel_ddi_get_config +ffffffff819de5c0 T intel_ddi_init +ffffffff819df160 t intel_ddi_hotplug +ffffffff819df590 t intel_ddi_compute_output_type +ffffffff819df610 t intel_ddi_compute_config +ffffffff819df750 t intel_ddi_compute_config_late +ffffffff819dfa00 t intel_enable_ddi +ffffffff819e01e0 t intel_ddi_pre_pll_enable +ffffffff819e0350 t intel_ddi_pre_enable +ffffffff819e1020 t intel_disable_ddi +ffffffff819e11a0 t intel_ddi_post_disable +ffffffff819e16c0 t intel_ddi_sync_state +ffffffff819e1770 t intel_ddi_initial_fastset_check +ffffffff819e1830 t intel_ddi_encoder_suspend +ffffffff819e18e0 t intel_ddi_encoder_shutdown +ffffffff819e1990 t intel_ddi_get_power_domains +ffffffff819e1b40 t dg2_ddi_get_config +ffffffff819e1b90 t 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bdw_get_buf_trans +ffffffff819e81f0 t hsw_get_buf_trans +ffffffff819e9000 T intel_update_watermarks +ffffffff819e9040 T vlv_get_hpll_vco +ffffffff819e9090 T vlv_get_cck_clock +ffffffff819e9140 T vlv_get_cck_clock_hpll +ffffffff819e9240 T is_trans_port_sync_mode +ffffffff819e9280 T intel_crtc_bigjoiner_slave_pipes +ffffffff819e92e0 T intel_crtc_is_bigjoiner_slave +ffffffff819e9340 T intel_crtc_is_bigjoiner_master +ffffffff819e93a0 T intel_master_crtc +ffffffff819e9430 T assert_transcoder +ffffffff819e95e0 T vlv_wait_port_ready +ffffffff819e9730 T intel_enable_transcoder +ffffffff819e9a20 T intel_disable_transcoder +ffffffff819e9d20 T intel_rotation_info_size +ffffffff819e9d60 T intel_remapped_info_size +ffffffff819e9e80 T intel_plane_uses_fence +ffffffff819e9ed0 T intel_fb_xy_to_linear +ffffffff819e9f20 T intel_add_fb_offsets +ffffffff819e9f60 T intel_plane_fb_max_stride +ffffffff819e9fe0 T intel_set_plane_visible +ffffffff819ea030 T intel_plane_fixup_bitmasks +ffffffff819ea0d0 T intel_plane_disable_noatomic +ffffffff819ea2c0 T intel_plane_fence_y_offset +ffffffff819ea320 T intel_display_prepare_reset +ffffffff819ea500 T intel_display_finish_reset +ffffffff819ea700 t __intel_display_resume +ffffffff819ea810 T intel_modeset_init_hw +ffffffff819ea8b0 T intel_has_pending_fb_unpin +ffffffff819ea9a0 T intel_get_crtc_new_encoder +ffffffff819eab30 T ilk_pfit_disable +ffffffff819eabf0 T intel_phy_is_combo +ffffffff819eac70 T intel_phy_is_tc +ffffffff819eace0 T intel_phy_is_snps +ffffffff819ead20 T intel_port_to_phy +ffffffff819eadb0 T intel_port_to_tc +ffffffff819eaea0 T intel_aux_power_domain +ffffffff819eaee0 T intel_modeset_get_crtc_power_domains +ffffffff819eb0f0 T intel_modeset_put_crtc_power_domains +ffffffff819eb110 T intel_display_suspend +ffffffff819eb1b0 T intel_encoder_destroy +ffffffff819eb1e0 T intel_encoder_get_config +ffffffff819eb210 t intel_crtc_readout_derived_state +ffffffff819eb640 T intel_link_compute_m_n +ffffffff819eb760 T intel_zero_m_n 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intel_modeset_all_pipes +ffffffff819efef0 T intel_atomic_add_affected_planes +ffffffff819effc0 T intel_crtc_update_active_timings +ffffffff819f00c0 T intel_calc_active_pipes +ffffffff819f0140 T intel_crtc_arm_fifo_underrun +ffffffff819f01e0 T intel_plane_destroy +ffffffff819f0210 T intel_get_pipe_from_crtc_id_ioctl +ffffffff819f0280 T intel_mode_valid_max_plane_size +ffffffff819f0300 T intel_init_display_hooks +ffffffff819f03e0 T intel_modeset_init_noirq +ffffffff819f0690 t intel_atomic_helper_free_state_worker +ffffffff819f0700 T intel_modeset_init_nogem +ffffffff819f1830 T intel_modeset_init +ffffffff819f1a50 T i830_enable_pipe +ffffffff819f2080 T i830_disable_pipe +ffffffff819f23a0 T intel_display_resume +ffffffff819f24e0 T intel_modeset_driver_remove +ffffffff819f2590 T intel_modeset_driver_remove_noirq +ffffffff819f2700 T intel_modeset_driver_remove_nogem +ffffffff819f2730 T intel_modeset_probe_defer +ffffffff819f2760 T intel_display_driver_register +ffffffff819f27c0 T intel_display_driver_unregister +ffffffff819f2840 T intel_scanout_needs_vtd_wa +ffffffff819f2880 t wait_for_pipe_scanline_moving +ffffffff819f2ae0 t hsw_get_pipe_config +ffffffff819f38d0 t hsw_crtc_enable +ffffffff819f4300 t hsw_crtc_disable +ffffffff819f44b0 t skl_commit_modeset_enables +ffffffff819f4a70 t intel_get_transcoder_timings +ffffffff819f4d40 t ilk_get_pfit_config +ffffffff819f4ec0 t enabled_bigjoiner_pipes +ffffffff819f50d0 t bdw_set_pipemisc +ffffffff819f5210 t ilk_pfit_enable +ffffffff819f5320 t intel_set_transcoder_timings +ffffffff819f56e0 t intel_update_crtc +ffffffff819f5cd0 t intel_pre_plane_update +ffffffff819f61e0 t intel_commit_modeset_enables +ffffffff819f62f0 t ilk_get_pipe_config +ffffffff819f6630 t ilk_crtc_enable +ffffffff819f6ce0 t ilk_crtc_disable +ffffffff819f6f70 t i9xx_get_pipe_config +ffffffff819f78a0 t valleyview_crtc_enable +ffffffff819f7cb0 t i9xx_crtc_disable +ffffffff819f8030 t i9xx_pfit_enable +ffffffff819f8190 t i9xx_crtc_enable +ffffffff819f8510 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intel_display_power_put_unchecked +ffffffff819fec80 T intel_display_power_get_in_set +ffffffff819fed60 T intel_display_power_get_in_set_if_enabled +ffffffff819fee10 T intel_display_power_put_mask_in_set +ffffffff819feee0 T intel_power_domains_init +ffffffff819ff120 t intel_display_power_put_async_work +ffffffff819ff390 T intel_power_domains_cleanup +ffffffff819ff3b0 T gen9_dbuf_slices_update +ffffffff819ff5c0 T intel_power_domains_init_hw +ffffffff819ffd50 t icl_display_core_init +ffffffff81a00640 t bxt_display_core_init +ffffffff81a00770 T intel_power_domains_driver_remove +ffffffff81a00860 T intel_power_domains_sanitize_state +ffffffff81a00940 T intel_power_domains_enable +ffffffff81a00990 T intel_power_domains_disable +ffffffff81a00a40 T intel_power_domains_suspend +ffffffff81a00bd0 t icl_display_core_uninit +ffffffff81a00c70 t bxt_display_core_uninit +ffffffff81a00d20 T intel_power_domains_resume +ffffffff81a00df0 T intel_display_power_suspend_late +ffffffff81a00ee0 t hsw_enable_pc8 +ffffffff81a01880 T intel_display_power_resume_early +ffffffff81a01970 t hsw_disable_pc8 +ffffffff81a01df0 T intel_display_power_suspend +ffffffff81a01e70 T intel_display_power_resume +ffffffff81a01f50 T intel_display_power_debug +ffffffff81a02010 T intel_display_power_ddi_io_domain +ffffffff81a020f0 T intel_display_power_ddi_lanes_domain +ffffffff81a021d0 T intel_display_power_legacy_aux_domain +ffffffff81a022e0 T intel_display_power_tbt_aux_domain +ffffffff81a023f0 t __delayed_work_tick +ffffffff81a03000 T intel_display_power_map_init +ffffffff81a03170 t __set_power_wells +ffffffff81a03550 T intel_display_power_map_cleanup +ffffffff81a04000 T lookup_power_well +ffffffff81a040c0 T intel_power_well_enable +ffffffff81a04150 T intel_power_well_name +ffffffff81a04190 T intel_power_well_disable +ffffffff81a041f0 T intel_power_well_sync_hw +ffffffff81a04260 T intel_power_well_get +ffffffff81a042f0 T intel_power_well_put +ffffffff81a043e0 T intel_power_well_is_enabled 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intel_dkl_phy_posting_read +ffffffff81a0a000 T intel_dmc_has_payload +ffffffff81a0a030 T intel_dmc_load_program +ffffffff81a0a810 t pipedmc_clock_gating_wa +ffffffff81a0aa00 T intel_dmc_disable_program +ffffffff81a0ac20 T assert_dmc_loaded +ffffffff81a0ad70 T intel_dmc_ucode_init +ffffffff81a0b040 t dmc_load_work_fn +ffffffff81a0b8a0 T intel_dmc_ucode_suspend +ffffffff81a0b910 T intel_dmc_ucode_resume +ffffffff81a0b9a0 T intel_dmc_ucode_fini +ffffffff81a0bad0 T intel_dmc_print_error_state +ffffffff81a0bb70 T intel_dmc_debugfs_register +ffffffff81a0c000 T intel_dp_is_edp +ffffffff81a0c030 T intel_dp_is_uhbr +ffffffff81a0c060 T intel_dp_max_lane_count +ffffffff81a0c0c0 T intel_dp_link_required +ffffffff81a0c100 T intel_dp_max_data_rate +ffffffff81a0c160 T intel_dp_can_bigjoiner +ffffffff81a0c1b0 T intel_dp_get_link_train_fallback_values +ffffffff81a0c590 T intel_dp_mode_to_fec_clock +ffffffff81a0c5d0 T intel_dp_min_bpp +ffffffff81a0c610 T intel_dp_source_supports_tps3 +ffffffff81a0c660 T intel_dp_source_supports_tps4 +ffffffff81a0c690 T intel_dp_max_link_rate +ffffffff81a0c750 T intel_dp_rate_select +ffffffff81a0c7f0 T intel_dp_compute_rate +ffffffff81a0c8c0 T intel_dp_adjust_compliance_config +ffffffff81a0ca00 T intel_dp_limited_color_range +ffffffff81a0ca70 T intel_dp_compute_psr_vsc_sdp +ffffffff81a0cae0 T intel_dp_needs_vsc_sdp +ffffffff81a0cb30 t intel_dp_compute_vsc_colorimetry +ffffffff81a0ccb0 T intel_dp_compute_config +ffffffff81a0d340 t intel_dp_compute_output_format +ffffffff81a0d570 T intel_dp_set_link_params +ffffffff81a0d5b0 T intel_edp_backlight_on +ffffffff81a0d660 T intel_edp_backlight_off +ffffffff81a0d710 T intel_dp_sink_set_decompression_state +ffffffff81a0d7b0 T intel_dp_wait_source_oui +ffffffff81a0d880 T intel_dp_set_power +ffffffff81a0da90 T intel_dp_sync_state +ffffffff81a0db10 t intel_dp_get_dpcd +ffffffff81a0dc70 t intel_dp_reset_max_link_params +ffffffff81a0dd80 T intel_dp_initial_fastset_check +ffffffff81a0de80 T intel_dp_check_frl_training +ffffffff81a0e410 T intel_dp_pcon_dsc_configure +ffffffff81a0e5e0 T intel_dp_configure_protocol_converter +ffffffff81a0e750 T intel_dp_get_colorimetry_status +ffffffff81a0e7b0 T intel_edp_fixup_vbt_bpp +ffffffff81a0e850 T intel_write_dp_vsc_sdp +ffffffff81a0e9e0 T intel_dp_set_infoframes +ffffffff81a0eb00 t intel_write_dp_sdp +ffffffff81a0edf0 T intel_read_dp_sdp +ffffffff81a0f120 T intel_dp_retrain_link +ffffffff81a0f7d0 T intel_dp_phy_test +ffffffff81a0feb0 T intel_digital_port_connected +ffffffff81a0ff50 T intel_dp_encoder_flush_work +ffffffff81a0ffa0 T intel_dp_encoder_suspend +ffffffff81a0ffe0 T intel_dp_encoder_shutdown +ffffffff81a10020 T intel_dp_hpd_pulse +ffffffff81a10770 T intel_dp_is_port_edp +ffffffff81a107c0 T intel_dp_init_connector +ffffffff81a11910 t intel_dp_modeset_retry_work_fn +ffffffff81a11990 t intel_dp_set_common_rates +ffffffff81a11b30 T intel_dp_mst_suspend +ffffffff81a11bd0 T intel_dp_mst_resume +ffffffff81a11c80 t intel_dp_compute_link_config +ffffffff81a129a0 t intel_dp_dsc_get_slice_count +ffffffff81a12b10 t intel_dp_set_sink_rates +ffffffff81a12d40 t intel_dp_check_device_service_irq +ffffffff81a13310 t intel_dp_force +ffffffff81a13450 t intel_dp_connector_register +ffffffff81a13530 t intel_dp_connector_unregister +ffffffff81a13580 t intel_dp_oob_hotplug_event +ffffffff81a135f0 t intel_dp_set_edid +ffffffff81a13a20 t intel_dp_get_modes +ffffffff81a13b20 t intel_dp_detect +ffffffff81a14410 t intel_dp_mode_valid +ffffffff81a14ba0 t intel_dp_connector_atomic_check +ffffffff81a14ed0 t intel_dp_get_dsc_sink_cap +ffffffff81a16000 T intel_dp_aux_fini +ffffffff81a16020 T intel_dp_aux_init +ffffffff81a161f0 t xelpdp_aux_ctl_reg +ffffffff81a162b0 t xelpdp_aux_data_reg +ffffffff81a16380 t tgl_aux_ctl_reg +ffffffff81a16400 t tgl_aux_data_reg +ffffffff81a16490 t skl_aux_ctl_reg +ffffffff81a16510 t skl_aux_data_reg +ffffffff81a165a0 t ilk_aux_ctl_reg +ffffffff81a16620 t ilk_aux_data_reg +ffffffff81a166a0 t g4x_aux_ctl_reg +ffffffff81a16720 t g4x_aux_data_reg +ffffffff81a167b0 t skl_get_aux_clock_divider +ffffffff81a167e0 t hsw_get_aux_clock_divider +ffffffff81a16880 t ilk_get_aux_clock_divider +ffffffff81a168e0 t g4x_get_aux_clock_divider +ffffffff81a16930 t skl_get_aux_send_ctl +ffffffff81a169a0 t g4x_get_aux_send_ctl +ffffffff81a169f0 t kasprintf +ffffffff81a16ac0 t intel_dp_aux_transfer +ffffffff81a16d10 t intel_dp_aux_xfer +ffffffff81a18000 T intel_dp_aux_init_backlight_funcs +ffffffff81a18270 t intel_dp_aux_hdr_setup_backlight +ffffffff81a183c0 t intel_dp_aux_hdr_get_backlight +ffffffff81a18530 t intel_dp_aux_hdr_set_backlight +ffffffff81a18620 t intel_dp_aux_hdr_disable_backlight +ffffffff81a186a0 t intel_dp_aux_hdr_enable_backlight +ffffffff81a188e0 t intel_dp_aux_vesa_setup_backlight +ffffffff81a18aa0 t intel_dp_aux_vesa_get_backlight +ffffffff81a18ad0 t intel_dp_aux_vesa_set_backlight +ffffffff81a18b70 t intel_dp_aux_vesa_disable_backlight +ffffffff81a18c20 t intel_dp_aux_vesa_enable_backlight +ffffffff81a19000 T intel_dp_hdcp_init +ffffffff81a190b0 t intel_dp_hdcp_write_an_aksv +ffffffff81a191a0 t intel_dp_hdcp_read_bksv +ffffffff81a19230 t intel_dp_hdcp_read_bstatus +ffffffff81a192c0 t intel_dp_hdcp_repeater_present +ffffffff81a19360 t intel_dp_hdcp_read_ri_prime +ffffffff81a193f0 t intel_dp_hdcp_read_ksv_ready +ffffffff81a19490 t intel_dp_hdcp_read_ksv_fifo +ffffffff81a19580 t intel_dp_hdcp_read_v_prime_part +ffffffff81a19620 t intel_dp_hdcp_toggle_signalling +ffffffff81a19650 t intel_dp_mst_hdcp_stream_encryption +ffffffff81a19850 t intel_dp_hdcp_check_link +ffffffff81a198d0 t intel_dp_hdcp_capable +ffffffff81a19970 t intel_dp_hdcp2_capable +ffffffff81a199f0 t intel_dp_hdcp2_write_msg +ffffffff81a19ab0 t intel_dp_hdcp2_read_msg +ffffffff81a1a180 t intel_dp_hdcp2_config_stream_type +ffffffff81a1a230 t intel_dp_mst_hdcp2_stream_encryption +ffffffff81a1a4b0 t intel_dp_mst_hdcp2_check_link +ffffffff81a1a570 t get_hdcp2_dp_msg_data +ffffffff81a1a6b0 t intel_dp_hdcp2_check_link +ffffffff81a1b000 T intel_dp_init_lttpr_and_dprx_caps +ffffffff81a1b2a0 T intel_dp_get_adjust_train +ffffffff81a1b960 T intel_dp_program_link_training_pattern +ffffffff81a1ba50 T intel_dp_set_signal_levels +ffffffff81a1bdb0 T intel_dp_dump_link_status +ffffffff81a1be80 T intel_dp_stop_link_train +ffffffff81a1c0b0 T intel_dp_start_link_train +ffffffff81a1d1f0 t intel_dp_link_train_phy +ffffffff81a1f000 T intel_dp_mst_encoder_active_links +ffffffff81a1f030 T intel_dp_mst_encoder_init +ffffffff81a1f270 T intel_dp_mst_source_support +ffffffff81a1f2a0 T intel_dp_mst_encoder_cleanup +ffffffff81a1f2f0 T intel_dp_mst_is_master_trans +ffffffff81a1f330 T intel_dp_mst_is_slave_trans +ffffffff81a1f370 t intel_dp_add_mst_connector +ffffffff81a1f580 t intel_dp_mst_poll_hpd_irq +ffffffff81a1f5a0 t intel_dp_mst_get_hw_state +ffffffff81a1f600 t intel_dp_mst_connector_late_register +ffffffff81a1f670 t intel_dp_mst_connector_early_unregister +ffffffff81a1f6a0 t intel_dp_mst_get_modes +ffffffff81a1f740 t intel_dp_mst_detect +ffffffff81a1f830 t intel_dp_mst_mode_valid_ctx +ffffffff81a1f980 t intel_mst_atomic_best_encoder +ffffffff81a1f9d0 t intel_dp_mst_atomic_check +ffffffff81a1fb50 t intel_dp_mst_compute_config +ffffffff81a1fe60 t intel_dp_mst_compute_config_late +ffffffff81a1ff50 t intel_mst_disable_dp +ffffffff81a20000 t intel_mst_post_disable_dp +ffffffff81a202c0 t intel_mst_pre_pll_enable_dp +ffffffff81a20310 t intel_mst_pre_enable_dp +ffffffff81a20530 t intel_mst_enable_dp +ffffffff81a20920 t intel_dp_mst_enc_get_hw_state +ffffffff81a20960 t intel_dp_mst_enc_get_config +ffffffff81a20980 t intel_dp_mst_initial_fastset_check +ffffffff81a209a0 t intel_dp_mst_encoder_destroy +ffffffff81a21000 T bxt_port_to_phy_channel +ffffffff81a21130 T bxt_ddi_phy_set_signal_levels +ffffffff81a21650 T bxt_ddi_phy_is_enabled +ffffffff81a217a0 T bxt_ddi_phy_uninit +ffffffff81a21890 T bxt_ddi_phy_init +ffffffff81a21ac0 t _bxt_ddi_phy_init +ffffffff81a220e0 T bxt_ddi_phy_verify_state +ffffffff81a22420 t __phy_reg_verify_state +ffffffff81a22520 T bxt_ddi_phy_calc_lane_lat_optim_mask +ffffffff81a22590 T bxt_ddi_phy_set_lane_optim_mask +ffffffff81a228b0 T bxt_ddi_phy_get_lane_lat_optim_mask +ffffffff81a22b00 T chv_set_phy_signal_level +ffffffff81a22e60 T chv_data_lane_soft_reset +ffffffff81a23040 T chv_phy_pre_pll_enable +ffffffff81a232d0 T chv_phy_pre_encoder_enable +ffffffff81a23560 T chv_phy_release_cl2_override +ffffffff81a235f0 T chv_phy_post_pll_disable +ffffffff81a236a0 T vlv_set_phy_signal_level +ffffffff81a23820 T vlv_phy_pre_pll_enable +ffffffff81a23930 T vlv_phy_pre_encoder_enable +ffffffff81a23a40 T vlv_phy_reset_lanes +ffffffff81a24000 T pnv_calc_dpll_params +ffffffff81a240b0 T i9xx_calc_dpll_params +ffffffff81a24180 T vlv_calc_dpll_params +ffffffff81a24230 T chv_calc_dpll_params +ffffffff81a24300 T bxt_find_best_dpll +ffffffff81a24320 t chv_find_best_dpll +ffffffff81a24660 T i9xx_dpll_compute_fp +ffffffff81a246a0 T vlv_compute_dpll +ffffffff81a24720 T chv_compute_dpll +ffffffff81a247a0 T intel_dpll_crtc_compute_clock +ffffffff81a24890 T intel_dpll_crtc_get_shared_dpll +ffffffff81a249e0 T intel_dpll_init_clock_hook +ffffffff81a24ad0 T i9xx_enable_pll +ffffffff81a24e80 T vlv_enable_pll +ffffffff81a253e0 T chv_enable_pll +ffffffff81a25a50 T vlv_force_pll_on +ffffffff81a25ba0 T vlv_disable_pll +ffffffff81a25c60 T chv_disable_pll +ffffffff81a25d90 T i9xx_disable_pll +ffffffff81a25e90 T vlv_force_pll_off +ffffffff81a25f80 T assert_pll_enabled +ffffffff81a26060 T assert_pll_disabled +ffffffff81a26140 t intel_pll_is_valid +ffffffff81a26210 t dg2_crtc_compute_clock +ffffffff81a26290 t hsw_crtc_compute_clock +ffffffff81a26350 t hsw_crtc_get_shared_dpll +ffffffff81a263f0 t ilk_crtc_compute_clock +ffffffff81a266e0 t ilk_crtc_get_shared_dpll +ffffffff81a26730 t g4x_find_best_dpll +ffffffff81a26a70 t chv_crtc_compute_clock +ffffffff81a26b70 t vlv_crtc_compute_clock +ffffffff81a27020 t g4x_crtc_compute_clock +ffffffff81a27170 t i9xx_compute_dpll +ffffffff81a273f0 t pnv_crtc_compute_clock +ffffffff81a277a0 t i9xx_crtc_compute_clock +ffffffff81a278c0 t i9xx_find_best_dpll +ffffffff81a27bf0 t i8xx_crtc_compute_clock +ffffffff81a28000 T intel_get_shared_dpll_by_id +ffffffff81a28040 T intel_get_shared_dpll_id +ffffffff81a280d0 T assert_shared_dpll +ffffffff81a281f0 T intel_dpll_get_hw_state +ffffffff81a28210 T icl_tc_port_to_pll_id +ffffffff81a28240 T intel_enable_shared_dpll +ffffffff81a28530 T intel_disable_shared_dpll +ffffffff81a28760 T intel_shared_dpll_swap_state +ffffffff81a28840 T icl_set_active_port_dpll +ffffffff81a28880 T intel_shared_dpll_init +ffffffff81a28a90 T intel_compute_shared_dplls +ffffffff81a28b20 T intel_reserve_shared_dplls +ffffffff81a28bb0 T intel_release_shared_dplls +ffffffff81a28bf0 T intel_update_active_dpll +ffffffff81a28c50 T intel_dpll_get_freq +ffffffff81a28ce0 T intel_dpll_update_ref_clks +ffffffff81a28d20 T intel_dpll_readout_hw_state +ffffffff81a28ea0 T intel_dpll_sanitize_state +ffffffff81a28f80 T intel_dpll_dump_hw_state +ffffffff81a29000 T intel_shared_dpll_state_verify +ffffffff81a29120 t verify_single_dpll_state +ffffffff81a29440 T intel_shared_dpll_verify_disabled +ffffffff81a294b0 t icl_compute_dplls +ffffffff81a2a290 t icl_get_dplls +ffffffff81a2aa00 t icl_put_dplls +ffffffff81a2aac0 t icl_update_active_dpll +ffffffff81a2ab60 t icl_update_dpll_ref_clks +ffffffff81a2ab90 t icl_dump_hw_state +ffffffff81a2ac50 t combo_pll_enable +ffffffff81a2ae70 t combo_pll_disable +ffffffff81a2af60 t combo_pll_get_hw_state +ffffffff81a2aff0 t icl_ddi_combo_pll_get_freq +ffffffff81a2b1c0 t icl_dpll_write +ffffffff81a2b460 t adlp_cmtg_clock_gating_wa +ffffffff81a2b5c0 t icl_pll_disable +ffffffff81a2b760 t icl_pll_get_hw_state +ffffffff81a2baa0 t tbt_pll_enable +ffffffff81a2bc50 t tbt_pll_disable +ffffffff81a2bc70 t tbt_pll_get_hw_state +ffffffff81a2bc90 t icl_ddi_tbt_pll_get_freq +ffffffff81a2bd00 t mg_pll_enable +ffffffff81a2c2b0 t mg_pll_disable +ffffffff81a2c2f0 t dkl_pll_get_hw_state +ffffffff81a2c4c0 t icl_ddi_mg_pll_get_freq +ffffffff81a2c590 t intel_find_shared_dpll +ffffffff81a2c8c0 t intel_unreference_shared_dpll +ffffffff81a2ca20 t mg_pll_get_hw_state +ffffffff81a2cc60 t bxt_compute_dpll +ffffffff81a2cf80 t bxt_get_dpll +ffffffff81a2d1e0 t intel_put_dpll +ffffffff81a2d240 t bxt_update_dpll_ref_clks +ffffffff81a2d280 t bxt_dump_hw_state +ffffffff81a2d330 t bxt_ddi_pll_enable +ffffffff81a2de30 t bxt_ddi_pll_disable +ffffffff81a2e040 t bxt_ddi_pll_get_hw_state +ffffffff81a2e4d0 t bxt_ddi_pll_get_freq +ffffffff81a2e560 t bxt_ddi_set_dpll_hw_state +ffffffff81a2e720 t skl_compute_dpll +ffffffff81a2eea0 t skl_get_dpll +ffffffff81a2f0d0 t skl_update_dpll_ref_clks +ffffffff81a2f100 t skl_dump_hw_state +ffffffff81a2f160 t skl_ddi_dpll0_enable +ffffffff81a2f220 t skl_ddi_dpll0_disable +ffffffff81a2f250 t skl_ddi_dpll0_get_hw_state +ffffffff81a2f350 t skl_ddi_pll_get_freq +ffffffff81a2f3e0 t skl_ddi_wrpll_get_freq +ffffffff81a2f540 t skl_ddi_pll_enable +ffffffff81a2f750 t skl_ddi_pll_disable +ffffffff81a2f7e0 t skl_ddi_pll_get_hw_state +ffffffff81a2f900 t hsw_compute_dpll +ffffffff81a30150 t hsw_get_dpll +ffffffff81a30410 t hsw_update_dpll_ref_clks +ffffffff81a30480 t hsw_dump_hw_state +ffffffff81a304b0 t hsw_ddi_wrpll_enable +ffffffff81a30530 t hsw_ddi_wrpll_disable +ffffffff81a30610 t hsw_ddi_wrpll_get_hw_state +ffffffff81a306b0 t hsw_ddi_wrpll_get_freq +ffffffff81a307a0 t hsw_ddi_spll_enable +ffffffff81a30800 t hsw_ddi_spll_disable +ffffffff81a308d0 t hsw_ddi_spll_get_hw_state +ffffffff81a30950 t hsw_ddi_spll_get_freq +ffffffff81a309e0 t hsw_ddi_lcpll_enable +ffffffff81a30a10 t hsw_ddi_lcpll_disable +ffffffff81a30a40 t hsw_ddi_lcpll_get_hw_state +ffffffff81a30a70 t hsw_ddi_lcpll_get_freq +ffffffff81a30af0 t ibx_compute_dpll +ffffffff81a30b20 t ibx_get_dpll +ffffffff81a30da0 t ibx_dump_hw_state +ffffffff81a30e00 t ibx_pch_dpll_enable +ffffffff81a30fb0 t ibx_pch_dpll_disable +ffffffff81a31030 t ibx_pch_dpll_get_hw_state +ffffffff81a32000 T intel_dpt_pin +ffffffff81a321d0 T intel_dpt_unpin +ffffffff81a32240 T intel_dpt_resume +ffffffff81a32310 T intel_dpt_suspend +ffffffff81a323e0 T intel_dpt_create +ffffffff81a32710 t dpt_insert_page +ffffffff81a32780 t dpt_clear_range +ffffffff81a327b0 t dpt_insert_entries +ffffffff81a328b0 t dpt_cleanup +ffffffff81a32900 t dpt_bind_vma +ffffffff81a32990 t dpt_unbind_vma +ffffffff81a329c0 T intel_dpt_destroy +ffffffff81a32a00 t __ww_mutex_lock +ffffffff81a33000 T intel_drrs_type_str +ffffffff81a33040 T intel_drrs_is_active +ffffffff81a33070 T intel_drrs_activate +ffffffff81a33270 T intel_drrs_deactivate +ffffffff81a33350 t intel_drrs_set_state +ffffffff81a334a0 T intel_drrs_invalidate +ffffffff81a334b0 t intel_drrs_frontbuffer_update +ffffffff81a33610 T intel_drrs_flush +ffffffff81a33620 T intel_crtc_drrs_init +ffffffff81a336c0 t intel_drrs_downclock_work +ffffffff81a33710 t __delayed_work_tick +ffffffff81a34000 T intel_dsb_indexed_reg_write +ffffffff81a34130 T intel_dsb_reg_write +ffffffff81a34210 T intel_dsb_commit +ffffffff81a34650 T intel_dsb_prepare +ffffffff81a347e0 T intel_dsb_cleanup +ffffffff81a35000 T intel_dsi_bitrate +ffffffff81a35090 T intel_dsi_tlpx_ns +ffffffff81a350e0 T intel_dsi_get_modes +ffffffff81a350f0 T intel_dsi_mode_valid +ffffffff81a351b0 T intel_dsi_host_init +ffffffff81a35260 T intel_dsi_get_panel_orientation +ffffffff81a36000 T intel_dsi_dcs_init_backlight_funcs +ffffffff81a36090 t dcs_setup_backlight +ffffffff81a360e0 t dcs_get_backlight +ffffffff81a361d0 t dcs_set_backlight +ffffffff81a362b0 t dcs_disable_backlight +ffffffff81a36620 t dcs_enable_backlight +ffffffff81a37000 T intel_dsi_vbt_exec_sequence +ffffffff81a37020 T intel_dsi_msleep +ffffffff81a37090 T intel_dsi_log_params +ffffffff81a37410 T intel_dsi_vbt_init +ffffffff81a378a0 T intel_dsi_vbt_gpio_init +ffffffff81a378c0 T intel_dsi_vbt_gpio_cleanup +ffffffff81a38000 T intel_dvo_init +ffffffff81a384f0 t intel_disable_dvo +ffffffff81a385a0 t intel_enable_dvo +ffffffff81a38680 t intel_dvo_get_hw_state +ffffffff81a386e0 t intel_dvo_get_config +ffffffff81a38780 t intel_dvo_compute_config +ffffffff81a38800 t intel_dvo_pre_enable +ffffffff81a388f0 t intel_dvo_connector_get_hw_state +ffffffff81a38970 t intel_dvo_enc_destroy +ffffffff81a389b0 t intel_dvo_detect +ffffffff81a38ab0 t intel_dvo_get_modes +ffffffff81a38b10 t intel_dvo_mode_valid +ffffffff81a39000 T intel_fb_get_format_info +ffffffff81a39230 T intel_fb_is_ccs_modifier +ffffffff81a39400 T intel_fb_is_rc_ccs_cc_modifier +ffffffff81a395d0 T intel_fb_is_mc_ccs_modifier +ffffffff81a397a0 T intel_fb_plane_get_modifiers +ffffffff81a398e0 T intel_fb_plane_supports_modifier +ffffffff81a39940 T intel_format_info_is_yuv_semiplanar +ffffffff81a39be0 T intel_fb_is_ccs_aux_plane +ffffffff81a39e20 T intel_fb_rc_ccs_cc_plane +ffffffff81a3a080 T is_surface_linear +ffffffff81a3a3b0 T main_to_ccs_plane +ffffffff81a3a690 T skl_ccs_to_main_plane +ffffffff81a3a970 T skl_main_to_aux_plane +ffffffff81a3abd0 T intel_tile_size +ffffffff81a3ac10 T intel_tile_width_bytes +ffffffff81a3ae60 T intel_tile_height +ffffffff81a3aec0 T intel_tile_row_size +ffffffff81a3af40 T intel_fb_align_height +ffffffff81a3afb0 T intel_fb_uses_dpt +ffffffff81a3b000 T intel_cursor_alignment +ffffffff81a3b060 T intel_surf_alignment +ffffffff81a3b270 T intel_fb_plane_get_subsampling +ffffffff81a3b640 T intel_plane_adjust_aligned_offset +ffffffff81a3b6b0 t intel_adjust_aligned_offset +ffffffff81a3b860 T intel_plane_compute_aligned_offset +ffffffff81a3b960 t intel_compute_aligned_offset +ffffffff81a3bb20 T intel_fb_needs_pot_stride_remap +ffffffff81a3bb60 T intel_fb_supports_90_270_rotation +ffffffff81a3bbb0 T intel_fill_fb_info +ffffffff81a3c7f0 t calc_plane_remap_info +ffffffff81a3d250 T intel_fb_fill_view +ffffffff81a3d2a0 T intel_plane_compute_gtt +ffffffff81a3db70 t intel_plane_check_stride +ffffffff81a3dee0 T intel_framebuffer_init +ffffffff81a3f2f0 T intel_user_framebuffer_create +ffffffff81a3f430 T intel_framebuffer_create +ffffffff81a3f4c0 t intel_adjust_tile_offset +ffffffff81a3f600 t intel_user_framebuffer_destroy +ffffffff81a3f660 t intel_user_framebuffer_create_handle +ffffffff81a3f680 t intel_user_framebuffer_dirty +ffffffff81a40000 T intel_pin_and_fence_fb_obj +ffffffff81a40310 t i915_gem_object_lock +ffffffff81a40520 T intel_unpin_fb_vma +ffffffff81a40590 T intel_plane_pin_fb +ffffffff81a408c0 T intel_plane_unpin_fb +ffffffff81a41000 T intel_fbc_cleanup +ffffffff81a411c0 T intel_fbc_pre_update +ffffffff81a41810 T intel_fbc_post_update +ffffffff81a41a60 T intel_fbc_invalidate +ffffffff81a41c80 T intel_fbc_flush +ffffffff81a41f00 T intel_fbc_atomic_check +ffffffff81a42470 T intel_fbc_disable +ffffffff81a42530 t __intel_fbc_disable +ffffffff81a426c0 T intel_fbc_update +ffffffff81a42d80 T intel_fbc_reset_underrun +ffffffff81a42ee0 T intel_fbc_handle_fifo_underrun_irq +ffffffff81a42f90 T intel_fbc_add_plane +ffffffff81a42fc0 T intel_fbc_init +ffffffff81a43240 T intel_fbc_sanitize +ffffffff81a43310 T intel_fbc_crtc_debugfs_add +ffffffff81a43340 T intel_fbc_debugfs_register +ffffffff81a43370 t intel_fbc_is_ok +ffffffff81a43490 t intel_fbc_update_state +ffffffff81a43800 t intel_fbc_underrun_work_fn +ffffffff81a43920 t ivb_fbc_activate +ffffffff81a43b80 t ilk_fbc_deactivate +ffffffff81a43c30 t ilk_fbc_is_active +ffffffff81a43c90 t ivb_fbc_is_compressing +ffffffff81a43cf0 t snb_fbc_nuke +ffffffff81a43d60 t ilk_fbc_program_cfb +ffffffff81a43da0 t ivb_fbc_set_false_color +ffffffff81a43e60 t snb_fbc_activate +ffffffff81a43ee0 t ilk_fbc_is_compressing +ffffffff81a43f40 t ilk_fbc_activate +ffffffff81a44070 t i965_fbc_nuke +ffffffff81a44110 t g4x_fbc_activate +ffffffff81a44220 t g4x_fbc_deactivate +ffffffff81a442b0 t g4x_fbc_is_active +ffffffff81a44300 t g4x_fbc_is_compressing +ffffffff81a44360 t g4x_fbc_program_cfb +ffffffff81a44390 t i8xx_fbc_activate +ffffffff81a44500 t i8xx_fbc_deactivate +ffffffff81a445d0 t i8xx_fbc_is_active +ffffffff81a44620 t i8xx_fbc_is_compressing +ffffffff81a44680 t i8xx_fbc_program_cfb +ffffffff81a44700 t i8xx_fbc_nuke +ffffffff81a45000 T intel_fbdev_init +ffffffff81a454d0 t intel_fbdev_suspend_worker +ffffffff81a45500 T intel_fbdev_initial_config_async +ffffffff81a45570 T intel_fbdev_unregister +ffffffff81a455b0 T intel_fbdev_set_suspend +ffffffff81a455e0 T intel_fbdev_fini +ffffffff81a45670 T intel_fbdev_output_poll_changed +ffffffff81a45710 T intel_fbdev_restore_mode +ffffffff81a45790 T intel_fbdev_framebuffer +ffffffff81a457c0 t intelfb_create +ffffffff81a45dc0 t intel_fbdev_set_par +ffffffff81a46000 T assert_fdi_tx_enabled +ffffffff81a460e0 T assert_fdi_tx_disabled +ffffffff81a461c0 T assert_fdi_rx_enabled +ffffffff81a46270 T assert_fdi_rx_disabled +ffffffff81a46320 T assert_fdi_tx_pll_enabled +ffffffff81a463d0 T assert_fdi_rx_pll_enabled +ffffffff81a46490 T assert_fdi_rx_pll_disabled +ffffffff81a46550 T intel_fdi_link_train +ffffffff81a46570 T intel_fdi_pll_freq_update +ffffffff81a46620 T intel_fdi_link_freq +ffffffff81a46660 T ilk_fdi_compute_config +ffffffff81a46990 T intel_fdi_normal_train +ffffffff81a46b10 T hsw_fdi_link_train +ffffffff81a47010 T hsw_fdi_disable +ffffffff81a47170 T ilk_fdi_pll_enable +ffffffff81a47380 T ilk_fdi_pll_disable +ffffffff81a474b0 T ilk_fdi_disable +ffffffff81a47720 T intel_fdi_init_hook +ffffffff81a47780 t ilk_fdi_link_train +ffffffff81a47df0 t gen6_fdi_link_train +ffffffff81a48620 t ivb_manual_fdi_link_train +ffffffff81a48eb0 t cpt_set_fdi_bc_bifurcation +ffffffff81a4a000 T intel_set_cpu_fifo_underrun_reporting +ffffffff81a4a3e0 T intel_set_pch_fifo_underrun_reporting +ffffffff81a4a610 T intel_cpu_fifo_underrun_irq_handler +ffffffff81a4a800 T intel_pch_fifo_underrun_irq_handler +ffffffff81a4a880 T intel_check_cpu_fifo_underruns +ffffffff81a4aaa0 T intel_check_pch_fifo_underruns +ffffffff81a4b000 T intel_frontbuffer_flip_prepare +ffffffff81a4b050 T intel_frontbuffer_flip_complete +ffffffff81a4b120 T intel_frontbuffer_flip +ffffffff81a4b1f0 T __intel_fb_invalidate +ffffffff81a4b280 T __intel_fb_flush +ffffffff81a4b370 T intel_frontbuffer_get +ffffffff81a4b4a0 t frontbuffer_active +ffffffff81a4b4d0 t frontbuffer_retire +ffffffff81a4b510 T intel_frontbuffer_put +ffffffff81a4b690 T intel_frontbuffer_track +ffffffff81a4c000 T intel_atomic_global_obj_init +ffffffff81a4c070 T intel_atomic_global_obj_cleanup +ffffffff81a4c170 T intel_atomic_get_global_obj_state +ffffffff81a4c3e0 T intel_atomic_get_old_global_obj_state +ffffffff81a4c440 T intel_atomic_get_new_global_obj_state +ffffffff81a4c4a0 T intel_atomic_swap_global_state +ffffffff81a4c5f0 T intel_atomic_clear_global_state +ffffffff81a4c720 T intel_atomic_lock_global_state +ffffffff81a4c7a0 T intel_atomic_serialize_global_state +ffffffff81a4d000 T intel_gmbus_is_valid_pin +ffffffff81a4d100 T intel_gmbus_reset +ffffffff81a4d160 T intel_bb_set_bits +ffffffff81a4d290 T intel_bb_set_dir +ffffffff81a4d2c0 T intel_bb_read_bits +ffffffff81a4d440 T intel_acquire_bus +ffffffff81a4d630 T intel_release_bus +ffffffff81a4d7d0 T intel_send_start +ffffffff81a4d7f0 T intel_send_stop +ffffffff81a4d810 T intel_initiate_xfer +ffffffff81a4d830 T intel_read_byte +ffffffff81a4d850 T intel_write_byte +ffffffff81a4d870 T intel_gmbus_output_aksv +ffffffff81a4d940 t do_gmbus_xfer +ffffffff81a4df40 T intel_gmbus_setup +ffffffff81a4e2d0 T intel_gmbus_teardown +ffffffff81a4e340 T intel_gmbus_get_adapter +ffffffff81a4e3c0 T intel_gmbus_force_bit +ffffffff81a4e450 T intel_gmbus_is_forced_bit +ffffffff81a4e480 t gmbus_xfer_read +ffffffff81a4e750 t gmbus_xfer_write +ffffffff81a4e9a0 t gmbus_wait +ffffffff81a4ed80 t gmbus_wait_idle +ffffffff81a4ef20 t gmbus_xfer +ffffffff81a4eff0 t gmbus_func +ffffffff81a4f030 t gmbus_lock_bus +ffffffff81a4f050 t gmbus_trylock_bus +ffffffff81a4f0a0 t gmbus_unlock_bus +ffffffff81a50000 T intel_hdcp_capable +ffffffff81a500a0 t intel_hdcp_read_valid_bksv +ffffffff81a50320 T intel_hdcp2_capable +ffffffff81a50400 T is_hdcp_supported +ffffffff81a50450 T intel_hdcp_component_init +ffffffff81a50480 T intel_hdcp_init +ffffffff81a505b0 t intel_hdcp_check_work +ffffffff81a544b0 t intel_hdcp_prop_work +ffffffff81a54530 T intel_hdcp_enable +ffffffff81a54580 T intel_hdcp_disable +ffffffff81a546b0 t intel_hdcp_update_value +ffffffff81a54870 t _intel_hdcp2_disable +ffffffff81a54c70 t _intel_hdcp_disable +ffffffff81a54f70 T intel_hdcp_update_pipe +ffffffff81a550e0 T intel_hdcp_component_fini +ffffffff81a55120 T intel_hdcp_cleanup +ffffffff81a55260 T intel_hdcp_atomic_check +ffffffff81a552f0 T intel_hdcp_handle_cp_irq +ffffffff81a553f0 t __delayed_work_tick +ffffffff81a55410 t hdcp2_authenticate_repeater_topology +ffffffff81a556f0 t intel_hdcp_get_repeater_ctl +ffffffff81a56000 T hsw_write_infoframe +ffffffff81a56410 t hsw_dip_data_reg +ffffffff81a565d0 T hsw_read_infoframe +ffffffff81a56680 T intel_hdmi_infoframe_enable +ffffffff81a56720 T intel_hdmi_infoframes_enabled +ffffffff81a56830 T intel_read_infoframe +ffffffff81a569c0 T intel_hdmi_read_gcp_infoframe +ffffffff81a56ab0 T intel_dp_dual_mode_set_tmds_output +ffffffff81a56b80 T intel_hdmi_tmds_clock +ffffffff81a56bd0 T intel_hdmi_bpc_possible +ffffffff81a56d00 T intel_hdmi_limited_color_range +ffffffff81a56d70 T intel_hdmi_compute_config +ffffffff81a574c0 t intel_hdmi_compute_output_format +ffffffff81a575f0 T intel_hdmi_encoder_shutdown +ffffffff81a576c0 T intel_hdmi_handle_sink_scrambling +ffffffff81a577e0 T intel_infoframe_init +ffffffff81a57960 t vlv_write_infoframe +ffffffff81a57cc0 t vlv_read_infoframe +ffffffff81a57e90 t vlv_set_infoframes +ffffffff81a58230 t vlv_infoframes_enabled +ffffffff81a582d0 t g4x_write_infoframe +ffffffff81a58580 t g4x_read_infoframe +ffffffff81a586d0 t g4x_set_infoframes +ffffffff81a58970 t g4x_infoframes_enabled +ffffffff81a589e0 t hsw_set_infoframes +ffffffff81a58c80 t hsw_infoframes_enabled +ffffffff81a58d10 t ibx_write_infoframe +ffffffff81a59020 t ibx_read_infoframe +ffffffff81a59190 t ibx_set_infoframes +ffffffff81a59500 t ibx_infoframes_enabled +ffffffff81a59580 t cpt_write_infoframe +ffffffff81a59880 t cpt_read_infoframe +ffffffff81a599f0 t cpt_set_infoframes +ffffffff81a59cf0 t cpt_infoframes_enabled +ffffffff81a59d60 T intel_hdmi_init_connector +ffffffff81a5a3f0 T intel_hdmi_dsc_get_slice_height +ffffffff81a5a440 T intel_hdmi_dsc_get_num_slices +ffffffff81a5a5c0 T intel_hdmi_dsc_get_bpp +ffffffff81a5a6b0 t intel_hdmi_compute_clock +ffffffff81a5a970 t hdmi_port_clock_valid +ffffffff81a5aba0 t intel_write_infoframe +ffffffff81a5ad70 t intel_hdmi_detect +ffffffff81a5af20 t intel_hdmi_force +ffffffff81a5b000 t intel_hdmi_connector_register +ffffffff81a5b010 t intel_hdmi_connector_unregister +ffffffff81a5b020 t intel_hdmi_set_edid +ffffffff81a5b2c0 t intel_hdmi_get_modes +ffffffff81a5b300 t intel_hdmi_mode_valid +ffffffff81a5b4a0 t intel_hdmi_mode_clock_valid +ffffffff81a5b630 t intel_hdmi_hdcp_write_an_aksv +ffffffff81a5b780 t intel_hdmi_hdcp_read_bksv +ffffffff81a5b850 t intel_hdmi_hdcp_read_bstatus +ffffffff81a5b920 t intel_hdmi_hdcp_repeater_present +ffffffff81a5ba00 t intel_hdmi_hdcp_read_ri_prime +ffffffff81a5bad0 t intel_hdmi_hdcp_read_ksv_ready +ffffffff81a5bbb0 t intel_hdmi_hdcp_read_ksv_fifo +ffffffff81a5bc80 t intel_hdmi_hdcp_read_v_prime_part +ffffffff81a5bd70 t intel_hdmi_hdcp_toggle_signalling +ffffffff81a5bff0 t intel_hdmi_hdcp_check_link +ffffffff81a5c340 t intel_hdmi_hdcp2_capable +ffffffff81a5c3f0 t intel_hdmi_hdcp2_write_msg +ffffffff81a5c4d0 t intel_hdmi_hdcp2_read_msg +ffffffff81a5c960 t intel_hdmi_hdcp2_check_link +ffffffff81a5d000 T intel_hpd_pin_default +ffffffff81a5d030 T intel_encoder_hotplug +ffffffff81a5d160 T intel_hpd_trigger_irq +ffffffff81a5d1d0 T intel_hpd_irq_handler +ffffffff81a5d5b0 T intel_hpd_init +ffffffff81a5d6c0 T intel_hpd_poll_enable +ffffffff81a5d740 T intel_hpd_poll_disable +ffffffff81a5d790 T intel_hpd_init_work +ffffffff81a5d860 t i915_hotplug_work_func +ffffffff81a5dba0 t i915_digport_work_func +ffffffff81a5dd30 t i915_hpd_poll_init_work +ffffffff81a5de30 t intel_hpd_irq_storm_reenable_work +ffffffff81a5e170 T intel_hpd_cancel_work +ffffffff81a5e290 T intel_hpd_disable +ffffffff81a5e310 T intel_hpd_enable +ffffffff81a5e380 t __delayed_work_tick +ffffffff81a5f000 T intel_lpe_audio_irq_handler +ffffffff81a5f020 T intel_lpe_audio_init +ffffffff81a5f050 T intel_lpe_audio_teardown +ffffffff81a5f070 T intel_lpe_audio_notify +ffffffff81a60000 T lspcon_detect_hdr_capability +ffffffff81a600a0 T lspcon_write_infoframe +ffffffff81a60820 T lspcon_read_infoframe +ffffffff81a60860 T lspcon_set_infoframes +ffffffff81a60ad0 T lspcon_infoframes_enabled +ffffffff81a60cc0 T lspcon_wait_pcon_mode +ffffffff81a60cd0 t lspcon_wait_mode +ffffffff81a60f90 T lspcon_init +ffffffff81a613a0 T intel_lspcon_infoframes_enabled +ffffffff81a613e0 T lspcon_resume +ffffffff81a61690 t lspcon_change_mode +ffffffff81a62000 T intel_lvds_port_enabled +ffffffff81a62080 T intel_get_lvds_encoder +ffffffff81a620e0 T intel_is_dual_link_lvds +ffffffff81a62150 T intel_lvds_init +ffffffff81a628c0 t intel_enable_lvds +ffffffff81a62a00 t intel_pre_enable_lvds +ffffffff81a62cd0 t intel_lvds_compute_config +ffffffff81a62e30 t pch_disable_lvds +ffffffff81a62e50 t pch_post_disable_lvds +ffffffff81a62e70 t gmch_disable_lvds +ffffffff81a62ea0 t intel_lvds_get_hw_state +ffffffff81a62f60 t intel_lvds_get_config +ffffffff81a63060 t intel_lvds_shutdown +ffffffff81a63100 t intel_no_lvds_dmi_callback +ffffffff81a63150 t intel_disable_lvds +ffffffff81a63280 t intel_lvds_get_modes +ffffffff81a632b0 t intel_lvds_mode_valid +ffffffff81a63330 t intel_dual_link_lvds_callback +ffffffff81a64000 T intel_modeset_setup_hw_state +ffffffff81a66000 T intel_modeset_verify_crtc +ffffffff81a663b0 t verify_connector_state +ffffffff81a66660 T intel_modeset_verify_disabled +ffffffff81a67000 T intel_opregion_notify_encoder +ffffffff81a67160 t swsci +ffffffff81a67490 T intel_opregion_notify_adapter +ffffffff81a674e0 T intel_opregion_asle_intr +ffffffff81a67530 T intel_opregion_setup +ffffffff81a67d40 t asle_work +ffffffff81a681c0 T intel_opregion_get_panel_type +ffffffff81a682a0 T intel_opregion_get_edid +ffffffff81a68380 T intel_opregion_headless_sku +ffffffff81a683d0 T intel_opregion_register +ffffffff81a68460 T intel_opregion_resume +ffffffff81a684f0 T intel_opregion_suspend +ffffffff81a68590 T intel_opregion_unregister +ffffffff81a68710 t intel_no_opregion_vbt_callback +ffffffff81a68760 t intel_use_opregion_panel_type_callback +ffffffff81a69000 T intel_overlay_reset +ffffffff81a69050 T intel_overlay_switch_off +ffffffff81a69240 t intel_overlay_release_old_vid +ffffffff81a693e0 T intel_overlay_put_image_ioctl +ffffffff81a6a5a0 T intel_overlay_attrs_ioctl +ffffffff81a6aa40 T intel_overlay_setup +ffffffff81a6ac90 t intel_overlay_last_flip_retire +ffffffff81a6acd0 T intel_overlay_cleanup +ffffffff81a6ad90 T intel_overlay_capture_error_state +ffffffff81a6ae70 T intel_overlay_print_error_state +ffffffff81a6b240 t intel_overlay_release_old_vid_tail +ffffffff81a6b310 t intel_overlay_off_tail +ffffffff81a6b4b0 t intel_overlay_flip_prepare +ffffffff81a6c000 T intel_panel_use_ssc +ffffffff81a6c060 T intel_panel_preferred_fixed_mode +ffffffff81a6c0a0 T intel_panel_fixed_mode +ffffffff81a6c160 T intel_panel_downclock_mode +ffffffff81a6c240 T intel_panel_highest_mode +ffffffff81a6c2a0 T intel_panel_get_modes +ffffffff81a6c330 T intel_panel_drrs_type +ffffffff81a6c380 T intel_panel_compute_config +ffffffff81a6c500 T intel_panel_add_edid_fixed_modes +ffffffff81a6ca30 T intel_panel_add_vbt_lfp_fixed_mode +ffffffff81a6ca90 t intel_panel_add_fixed_mode +ffffffff81a6cc10 T intel_panel_add_vbt_sdvo_fixed_mode +ffffffff81a6cc70 T intel_panel_add_encoder_fixed_mode +ffffffff81a6ccb0 T intel_panel_fitting +ffffffff81a6d300 T intel_panel_detect +ffffffff81a6d390 T intel_panel_mode_valid +ffffffff81a6d4a0 T intel_panel_init +ffffffff81a6d560 T intel_panel_fini +ffffffff81a6e000 T intel_has_pch_trancoder +ffffffff81a6e050 T intel_crtc_pch_transcoder +ffffffff81a6e090 T intel_pch_transcoder_get_m1_n1 +ffffffff81a6e0d0 T intel_pch_transcoder_get_m2_n2 +ffffffff81a6e110 T ilk_pch_pre_enable +ffffffff81a6e130 T ilk_pch_enable +ffffffff81a6e6d0 t ilk_pch_transcoder_set_timings +ffffffff81a6e950 T ilk_pch_disable +ffffffff81a6e960 T ilk_pch_post_disable +ffffffff81a6ec90 T ilk_pch_get_config +ffffffff81a6ee50 T lpt_pch_enable +ffffffff81a6f080 T lpt_pch_disable +ffffffff81a6f190 T lpt_pch_get_config +ffffffff81a6f260 T intel_pch_sanitize +ffffffff81a6f530 t assert_pch_dp_disabled +ffffffff81a6f620 t assert_pch_hdmi_disabled +ffffffff81a70000 T lpt_disable_iclkip +ffffffff81a70070 T lpt_iclkip +ffffffff81a700f0 T lpt_program_iclkip +ffffffff81a70370 T lpt_get_iclkip +ffffffff81a70480 T lpt_disable_clkout_dp +ffffffff81a70550 T intel_init_pch_refclk +ffffffff81a72000 T intel_crtc_initial_plane_config +ffffffff81a73000 T intel_pps_lock +ffffffff81a73060 T intel_pps_unlock +ffffffff81a730b0 T intel_pps_reset_all +ffffffff81a73200 T intel_pps_check_power_unlocked +ffffffff81a733c0 T intel_pps_wait_power_cycle +ffffffff81a73580 T intel_pps_vdd_on_unlocked +ffffffff81a73ab0 T intel_pps_vdd_on +ffffffff81a73ba0 T intel_pps_vdd_off_sync +ffffffff81a73c70 t intel_pps_vdd_off_sync_unlocked +ffffffff81a73f50 T intel_pps_vdd_off_unlocked +ffffffff81a74060 T intel_pps_on_unlocked +ffffffff81a74460 T intel_pps_on +ffffffff81a74500 T intel_pps_off_unlocked +ffffffff81a74750 T intel_pps_off +ffffffff81a747f0 T intel_pps_backlight_on +ffffffff81a74a00 T intel_pps_backlight_off +ffffffff81a74c10 T intel_pps_backlight_power +ffffffff81a74de0 T vlv_pps_init +ffffffff81a74f40 t vlv_detach_power_sequencer +ffffffff81a750c0 t vlv_steal_power_sequencer +ffffffff81a751f0 t pps_init_delays +ffffffff81a75660 t pps_init_registers +ffffffff81a75a00 T intel_pps_have_panel_power_or_vdd +ffffffff81a75b50 T intel_pps_encoder_reset +ffffffff81a75ce0 t vlv_initial_power_sequencer_setup +ffffffff81a75f90 t pps_vdd_init +ffffffff81a760a0 T intel_pps_init +ffffffff81a76210 t edp_panel_vdd_work +ffffffff81a762c0 T intel_pps_init_late +ffffffff81a76430 T intel_pps_unlock_regs_wa +ffffffff81a76520 T intel_pps_setup +ffffffff81a76590 T assert_pps_unlocked +ffffffff81a767d0 t intel_pps_get_registers +ffffffff81a76eb0 t wait_panel_status +ffffffff81a77180 t intel_pps_readout_hw_state +ffffffff81a77340 t __delayed_work_tick +ffffffff81a78000 T intel_psr_irq_handler +ffffffff81a78680 T intel_psr_init_dpcd +ffffffff81a78910 T intel_psr_compute_config +ffffffff81a79100 T intel_psr_get_config +ffffffff81a792b0 T intel_psr_disable +ffffffff81a793c0 t intel_psr_disable_locked +ffffffff81a79830 T intel_psr_pause +ffffffff81a79a20 t intel_psr_exit +ffffffff81a79d00 T intel_psr_resume +ffffffff81a79d90 t intel_psr_activate +ffffffff81a7a4a0 T intel_psr2_disable_plane_sel_fetch +ffffffff81a7a510 T intel_psr2_program_plane_sel_fetch +ffffffff81a7a6c0 T intel_psr2_program_trans_man_trk_ctl +ffffffff81a7a800 T intel_psr2_sel_fetch_update +ffffffff81a7ae90 T intel_psr_pre_plane_update +ffffffff81a7b060 T intel_psr_post_plane_update +ffffffff81a7bae0 T intel_psr_wait_for_idle_locked +ffffffff81a7bcc0 T intel_psr_debug_set +ffffffff81a7bef0 t psr_irq_control +ffffffff81a7c040 T intel_psr_invalidate +ffffffff81a7c2f0 T intel_psr_flush +ffffffff81a7c7c0 T intel_psr_init +ffffffff81a7c8f0 t intel_psr_work +ffffffff81a7ca90 t tgl_dc3co_disable_work +ffffffff81a7cae0 T intel_psr_short_pulse +ffffffff81a7cea0 T intel_psr_enabled +ffffffff81a7cf20 T intel_psr_lock +ffffffff81a7d000 T intel_psr_unlock +ffffffff81a7d0e0 t tgl_psr2_disable_dc3co +ffffffff81a7d210 t __delayed_work_tick +ffffffff81a7e000 T intel_lookup_range_min_qp +ffffffff81a7e0b0 T intel_lookup_range_max_qp +ffffffff81a7f000 T intel_init_quirks +ffffffff81a7f0f0 T intel_has_quirk +ffffffff81a7f120 t quirk_ssc_force_disable +ffffffff81a7f150 t quirk_invert_brightness +ffffffff81a7f180 t quirk_backlight_present +ffffffff81a7f1b0 t quirk_increase_t12_delay +ffffffff81a7f1e0 t quirk_increase_ddi_disabled_time +ffffffff81a7f210 t intel_dmi_reverse_brightness +ffffffff81a7f260 t intel_dmi_no_pps_backlight +ffffffff81a80000 T intel_sdvo_port_enabled +ffffffff81a800a0 T intel_sdvo_init +ffffffff81a80c70 t intel_sdvo_compute_config +ffffffff81a811d0 t pch_disable_sdvo +ffffffff81a81200 t pch_post_disable_sdvo +ffffffff81a81210 t intel_disable_sdvo +ffffffff81a81380 t intel_sdvo_pre_enable +ffffffff81a81d00 t intel_enable_sdvo +ffffffff81a81f00 t intel_sdvo_get_hw_state +ffffffff81a81ff0 t intel_sdvo_get_config +ffffffff81a82560 t intel_sdvo_ddc_proxy_xfer +ffffffff81a82600 t intel_sdvo_ddc_proxy_func +ffffffff81a82630 t __intel_sdvo_write_cmd +ffffffff81a82af0 t proxy_lock_bus +ffffffff81a82b20 t proxy_trylock_bus +ffffffff81a82b50 t proxy_unlock_bus +ffffffff81a82b80 t intel_sdvo_enc_destroy +ffffffff81a82b90 t intel_sdvo_get_preferred_input_mode +ffffffff81a82f20 t intel_sdvo_get_dtd_from_mode +ffffffff81a83090 t intel_sdvo_read_response +ffffffff81a83530 t intel_sdvo_write_sdvox +ffffffff81a83720 t intel_sdvo_write_infoframe +ffffffff81a838f0 t intel_sdvo_dvi_init +ffffffff81a83b80 t intel_sdvo_tv_init +ffffffff81a83ea0 t intel_sdvo_lvds_init +ffffffff81a84090 t intel_sdvo_hotplug +ffffffff81a840d0 t intel_sdvo_connector_get_hw_state +ffffffff81a84160 t intel_sdvo_detect +ffffffff81a844d0 t intel_sdvo_connector_register +ffffffff81a844e0 t intel_sdvo_connector_unregister +ffffffff81a844f0 t intel_sdvo_connector_duplicate_state +ffffffff81a84570 t intel_sdvo_connector_atomic_set_property +ffffffff81a84740 t intel_sdvo_connector_atomic_get_property +ffffffff81a84960 t intel_sdvo_get_modes +ffffffff81a84c20 t intel_sdvo_mode_valid +ffffffff81a84cf0 t intel_sdvo_atomic_check +ffffffff81a84da0 t intel_sdvo_create_enhance_property +ffffffff81a86000 T intel_snps_phy_wait_for_calibration +ffffffff81a860d0 T intel_snps_phy_update_psr_power_state +ffffffff81a861a0 T intel_snps_phy_set_signal_levels +ffffffff81a863e0 T intel_mpllb_calc_state +ffffffff81a86590 T intel_snps_phy_check_hdmi_link_rate +ffffffff81a86610 T intel_mpllb_enable +ffffffff81a86870 T intel_mpllb_disable +ffffffff81a86a00 T intel_mpllb_calc_port_clock +ffffffff81a86ac0 T intel_mpllb_readout_hw_state +ffffffff81a86c20 T intel_mpllb_state_verify +ffffffff81a88000 T intel_plane_check_src_coordinates +ffffffff81a881c0 T vlv_plane_min_cdclk +ffffffff81a882a0 T ivb_plane_min_cdclk +ffffffff81a88360 T hsw_plane_min_cdclk +ffffffff81a883f0 T chv_plane_check_rotation +ffffffff81a88460 T intel_sprite_set_colorkey_ioctl +ffffffff81a88730 T intel_sprite_plane_create +ffffffff81a88a80 t vlv_sprite_update_noarm +ffffffff81a88b70 t vlv_sprite_update_arm +ffffffff81a89230 t vlv_sprite_disable_arm +ffffffff81a892c0 t vlv_sprite_get_hw_state +ffffffff81a89380 t vlv_sprite_check +ffffffff81a89610 t ivb_sprite_update_noarm +ffffffff81a89770 t ivb_sprite_update_arm +ffffffff81a89b50 t ivb_sprite_disable_arm +ffffffff81a89c00 t ivb_sprite_get_hw_state +ffffffff81a89cb0 t g4x_sprite_check +ffffffff81a8a270 t hsw_sprite_max_stride +ffffffff81a8a2c0 t g4x_sprite_max_stride +ffffffff81a8a330 t ivb_sprite_min_cdclk +ffffffff81a8a460 t g4x_sprite_update_noarm +ffffffff81a8a5d0 t g4x_sprite_update_arm +ffffffff81a8aa10 t g4x_sprite_disable_arm +ffffffff81a8aac0 t g4x_sprite_get_hw_state +ffffffff81a8ab70 t g4x_sprite_min_cdclk +ffffffff81a8ac30 t vlv_sprite_format_mod_supported +ffffffff81a8ad60 t snb_sprite_format_mod_supported +ffffffff81a8ae40 t g4x_sprite_format_mod_supported +ffffffff81a8b000 T intel_tc_port_in_tbt_alt_mode +ffffffff81a8b070 T intel_tc_port_in_dp_alt_mode +ffffffff81a8b0e0 T intel_tc_port_in_legacy_mode +ffffffff81a8b150 T intel_tc_cold_requires_aux_pw +ffffffff81a8b1a0 T intel_tc_port_get_lane_mask +ffffffff81a8b300 T intel_tc_port_get_pin_assignment_mask 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i915_gem_object_create_internal +ffffffff81abd170 t i915_gem_object_get_pages_internal +ffffffff81abd460 t i915_gem_object_put_pages_internal +ffffffff81abe000 T i915_gem_object_lmem_io_map +ffffffff81abe050 T i915_gem_object_is_lmem +ffffffff81abe090 T __i915_gem_object_is_lmem +ffffffff81abe0d0 T __i915_gem_object_create_lmem_with_ps +ffffffff81abe0f0 T i915_gem_object_create_lmem_from_data +ffffffff81abe1b0 T i915_gem_object_create_lmem +ffffffff81abf000 T i915_gem_mmap_ioctl +ffffffff81abf210 T i915_gem_mmap_gtt_version +ffffffff81abf240 T remap_io_mapping +ffffffff81abf300 T i915_gem_fault +ffffffff81abfdf0 T __i915_gem_object_release_mmap_gtt +ffffffff81abfe60 T i915_gem_object_release_mmap_gtt +ffffffff81abff10 T i915_gem_object_runtime_pm_release_mmap_offset +ffffffff81abff60 T i915_gem_object_release_mmap_offset +ffffffff81ac0060 T i915_gem_dumb_mmap_offset +ffffffff81ac00d0 t __assign_mmap_offset_handle +ffffffff81ac0530 T i915_gem_mmap_offset_ioctl +ffffffff81ac0630 T i915_gem_mmap +ffffffff81ac0760 t __ww_mutex_lock +ffffffff81ac1000 T i915_gem_object_alloc +ffffffff81ac1050 T i915_gem_object_free +ffffffff81ac1070 T i915_gem_object_init +ffffffff81ac1180 T __i915_gem_object_fini +ffffffff81ac11a0 T i915_gem_object_set_cache_coherency +ffffffff81ac1220 T i915_gem_object_can_bypass_llc +ffffffff81ac1270 T __i915_gem_free_object_rcu +ffffffff81ac12e0 T __i915_gem_object_pages_fini +ffffffff81ac1470 T __i915_gem_free_object +ffffffff81ac1520 T i915_gem_flush_free_objects +ffffffff81ac1610 T __i915_gem_object_flush_frontbuffer +ffffffff81ac16b0 T __i915_gem_object_invalidate_frontbuffer +ffffffff81ac1750 T i915_gem_object_read_from_page +ffffffff81ac1830 T i915_gem_object_has_struct_page +ffffffff81ac1860 T i915_gem_object_has_iomem +ffffffff81ac1890 T i915_gem_object_evictable +ffffffff81ac1940 T i915_gem_object_migratable +ffffffff81ac1980 T i915_gem_object_can_migrate +ffffffff81ac1af0 T i915_gem_object_migrate +ffffffff81ac1b90 T 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i915_gem_object_pin_map_unlocked +ffffffff81ac3ea0 T __i915_gem_object_flush_map +ffffffff81ac3f30 T __i915_gem_object_release_map +ffffffff81ac3fb0 T __i915_gem_object_get_sg +ffffffff81ac41c0 T i915_gem_object_get_page +ffffffff81ac4210 T i915_gem_object_get_dirty_page +ffffffff81ac4280 T i915_gem_object_get_dma_address_len +ffffffff81ac4300 T i915_gem_object_get_dma_address +ffffffff81ac5000 T i915_gem_object_put_pages_phys +ffffffff81ac51b0 T i915_gem_object_pwrite_phys +ffffffff81ac52c0 T i915_gem_object_pread_phys +ffffffff81ac5360 T i915_gem_object_attach_phys +ffffffff81ac6000 T i915_gem_suspend +ffffffff81ac6050 T i915_gem_backup_suspend +ffffffff81ac61b0 t lmem_suspend +ffffffff81ac62d0 T i915_gem_suspend_late +ffffffff81ac6400 T i915_gem_freeze +ffffffff81ac6440 T i915_gem_freeze_late +ffffffff81ac6510 T i915_gem_resume +ffffffff81ac6540 t lmem_restore +ffffffff81ac7000 T i915_gem_object_init_memory_region +ffffffff81ac7070 T i915_gem_object_release_memory_region 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intel_rps_set_min_frequency +ffffffff81b20cb0 T intel_rps_raise_unslice +ffffffff81b20d80 T intel_rps_lower_unslice +ffffffff81b20e50 T rps_read_mask_mmio +ffffffff81b20ee0 T intel_rps_driver_register +ffffffff81b20f20 T intel_rps_driver_unregister +ffffffff81b20f60 T i915_read_mch_val +ffffffff81b213e0 T i915_gpu_raise +ffffffff81b21470 T i915_gpu_lower +ffffffff81b21500 T i915_gpu_busy +ffffffff81b21560 T i915_gpu_turbo_disable +ffffffff81b22000 T intel_sa_mediagt_setup +ffffffff81b23000 T intel_sseu_set_info +ffffffff81b23040 T intel_sseu_subslice_total +ffffffff81b231b0 T intel_sseu_get_hsw_subslices +ffffffff81b23260 T intel_sseu_copy_eumask_to_user +ffffffff81b235c0 T intel_sseu_copy_ssmask_to_user +ffffffff81b23720 T intel_sseu_info_init +ffffffff81b24ed0 T intel_sseu_make_rpcs +ffffffff81b25040 T intel_sseu_dump +ffffffff81b25240 T intel_sseu_print_topology +ffffffff81b25520 T intel_sseu_print_ss_info +ffffffff81b25580 T intel_slicemask_from_xehp_dssmask +ffffffff81b26000 T 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intel_guc_slpc_enable +ffffffff81b40d90 T intel_guc_slpc_set_boost_freq +ffffffff81b40e30 t slpc_force_min_freq +ffffffff81b40f50 T intel_guc_slpc_dec_waiters +ffffffff81b40f90 T intel_guc_slpc_print_info +ffffffff81b411a0 T intel_guc_slpc_fini +ffffffff81b42000 T intel_guc_wait_for_pending_msg +ffffffff81b422a0 T intel_guc_wait_for_idle +ffffffff81b422f0 T intel_guc_busyness_park +ffffffff81b424f0 T intel_guc_busyness_unpark +ffffffff81b42660 T intel_guc_submission_reset_prepare +ffffffff81b42df0 t guc_flush_destroyed_contexts +ffffffff81b42f60 T intel_guc_submission_reset +ffffffff81b43080 t __guc_reset_context +ffffffff81b43380 T intel_guc_submission_cancel_requests +ffffffff81b43620 T intel_guc_submission_reset_finish +ffffffff81b43700 T intel_guc_submission_init +ffffffff81b43870 T intel_guc_submission_fini +ffffffff81b43910 T intel_guc_submission_setup +ffffffff81b43d00 t guc_sched_engine_disabled +ffffffff81b43d30 t guc_sched_engine_destroy +ffffffff81b43d90 t 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intel_guc_submission_print_context_info +ffffffff81b46a40 t emit_bb_start_parent_no_preempt_mid_batch +ffffffff81b46b60 T intel_guc_virtual_engine_has_heartbeat +ffffffff81b46bf0 t guc_virtual_get_sibling +ffffffff81b46c90 t update_context_prio +ffffffff81b46e80 t try_context_registration +ffffffff81b47300 t guc_wq_item_append +ffffffff81b47580 t guc_add_request +ffffffff81b477c0 t guc_context_policy_init_v70 +ffffffff81b47940 t guc_resume +ffffffff81b47a30 t guc_request_alloc +ffffffff81b47d20 t add_to_context +ffffffff81b47e20 t remove_from_context +ffffffff81b47ef0 t guc_engine_reset_prepare +ffffffff81b47f40 t guc_rewind_nop +ffffffff81b47f70 t guc_reset_nop +ffffffff81b47fa0 t guc_set_default_submission +ffffffff81b47fd0 t guc_engine_busyness +ffffffff81b48310 t guc_context_alloc +ffffffff81b48320 t guc_context_revoke +ffffffff81b48610 t guc_context_pre_pin +ffffffff81b48630 t guc_context_pin +ffffffff81b486e0 t guc_context_unpin +ffffffff81b48800 t guc_context_post_unpin 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intel_hpd_irq_setup +ffffffff81b6bc50 T intel_irq_init +ffffffff81b6bf00 t ivb_parity_work +ffffffff81b6c290 T intel_irq_fini +ffffffff81b6c2d0 T intel_irq_install +ffffffff81b6c3d0 t intel_irq_reset +ffffffff81b6cf30 t intel_irq_postinstall +ffffffff81b6dc30 T intel_irq_uninstall +ffffffff81b6dc90 T intel_runtime_pm_disable_interrupts +ffffffff81b6dcc0 T intel_runtime_pm_enable_interrupts +ffffffff81b6dcf0 T intel_synchronize_hardirq +ffffffff81b6dd10 t i9xx_pipestat_irq_reset +ffffffff81b6dea0 t kasprintf +ffffffff81b6df70 t i915_hpd_irq_setup +ffffffff81b6e080 t icp_hpd_irq_setup +ffffffff81b6e270 t dg1_hpd_irq_setup +ffffffff81b6e2d0 t gen11_hpd_irq_setup +ffffffff81b6e520 t bxt_hpd_irq_setup +ffffffff81b6e6b0 t bdw_update_port_irq +ffffffff81b6e7f0 t spt_hpd_irq_setup +ffffffff81b6ea00 t ilk_hpd_irq_setup +ffffffff81b6ec60 t gen11_display_irq_reset +ffffffff81b6f1e0 t ibx_irq_reset +ffffffff81b6f320 t cherryview_irq_handler +ffffffff81b6f5f0 t valleyview_irq_handler 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i915_vma_wait_for_bind +ffffffff81b93680 T i915_vma_bind +ffffffff81b939d0 T i915_vma_pin_iomap +ffffffff81b93ba0 T i915_vma_flush_writes +ffffffff81b93c10 T i915_vma_unpin_iomap +ffffffff81b93c90 T i915_vma_unpin_and_release +ffffffff81b93d00 T i915_vma_misplaced +ffffffff81b93da0 T __i915_vma_set_map_and_fenceable +ffffffff81b93e20 T i915_gem_valid_gtt_space +ffffffff81b93ea0 T vma_invalidate_tlb +ffffffff81b93ee0 T i915_vma_pin_ww +ffffffff81b94900 T i915_ggtt_pin +ffffffff81b949d0 t __i915_ggtt_pin +ffffffff81b94b30 t i915_gem_object_lock +ffffffff81b94d40 T i915_vma_close +ffffffff81b94e10 T i915_vma_reopen +ffffffff81b94e90 T i915_vma_destroy_locked +ffffffff81b94f80 t release_references +ffffffff81b950b0 T i915_vma_destroy +ffffffff81b951e0 T i915_vma_parked +ffffffff81b954b0 T i915_vma_revoke_mmap +ffffffff81b955b0 T _i915_vma_move_to_active +ffffffff81b957d0 T __i915_vma_evict +ffffffff81b95b30 T __i915_vma_unbind +ffffffff81b95bc0 T i915_vma_unbind +ffffffff81b95d10 T i915_vma_unbind_async +ffffffff81b95f00 T i915_vma_unbind_unlocked +ffffffff81b96010 T i915_vma_make_unshrinkable +ffffffff81b96050 T i915_vma_make_shrinkable +ffffffff81b96070 T i915_vma_make_purgeable +ffffffff81b96090 T i915_vma_module_exit +ffffffff81b960b0 T i915_vma_module_init +ffffffff81b96110 t __i915_vma_active +ffffffff81b96160 t __i915_vma_retire +ffffffff81b961a0 t __vma_bind +ffffffff81b96230 t __vma_release +ffffffff81b962b0 t intel_rotate_pages +ffffffff81b965f0 t intel_remap_pages +ffffffff81b969b0 t intel_partial_pages +ffffffff81b97000 T i915_vma_resource_alloc +ffffffff81b97050 T i915_vma_resource_free +ffffffff81b97090 T i915_vma_resource_unhold +ffffffff81b970a0 t __i915_vma_resource_unhold +ffffffff81b97190 T i915_vma_resource_hold +ffffffff81b971e0 T i915_vma_resource_unbind +ffffffff81b97310 T __i915_vma_resource_init +ffffffff81b97370 t i915_vma_resource_fence_notify +ffffffff81b97440 T i915_vma_resource_bind_dep_sync +ffffffff81b975c0 T i915_vma_resource_bind_dep_sync_all +ffffffff81b97650 T i915_vma_resource_bind_dep_await +ffffffff81b977f0 T i915_vma_resource_module_exit +ffffffff81b97810 T i915_vma_resource_module_init +ffffffff81b97870 t get_driver_name +ffffffff81b978a0 t get_timeline_name +ffffffff81b978d0 t unbind_fence_release +ffffffff81b97910 t i915_vma_resource_unbind_work +ffffffff81b98000 T intel_platform_name +ffffffff81b98090 T intel_device_info_print +ffffffff81b98d10 T intel_device_info_subplatform_init +ffffffff81b99070 T intel_device_info_runtime_init +ffffffff81b99740 T intel_driver_caps_print +ffffffff81b9a000 T intel_dram_detect +ffffffff81b9a480 t skl_get_dram_info +ffffffff81b9a660 T intel_dram_edram_detect +ffffffff81b9a6f0 t icl_pcode_read_mem_global_info +ffffffff81b9a7d0 t skl_dram_get_channel_info +ffffffff81b9a9a0 t skl_dram_get_dimm_info +ffffffff81b9b000 T intel_memory_region_lookup +ffffffff81b9b0e0 T intel_memory_region_by_type +ffffffff81b9b190 T intel_memory_region_reserve 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+ffffffff81b9ee00 T g4x_wm_sanitize +ffffffff81b9ef90 t g4x_program_watermarks +ffffffff81b9f330 T vlv_wm_get_hw_state +ffffffff81b9fff0 t vlv_invalidate_wms +ffffffff81ba0150 T vlv_wm_sanitize +ffffffff81ba02a0 t vlv_program_watermarks +ffffffff81ba09f0 T ilk_wm_get_hw_state +ffffffff81ba0e60 T intel_init_clock_gating +ffffffff81ba0e80 T intel_suspend_hw +ffffffff81ba0f20 T intel_init_clock_gating_hooks +ffffffff81ba1170 T intel_init_pm +ffffffff81ba1c60 T intel_pm_setup +ffffffff81ba1ca0 t chv_set_memory_dvfs +ffffffff81ba1e60 t pvc_init_clock_gating +ffffffff81ba2000 t dg2_init_clock_gating +ffffffff81ba2150 t xehpsdv_init_clock_gating +ffffffff81ba2250 t adlp_init_clock_gating +ffffffff81ba2340 t gen12lp_init_clock_gating +ffffffff81ba24b0 t dg1_init_clock_gating +ffffffff81ba2590 t icl_init_clock_gating +ffffffff81ba2650 t cfl_init_clock_gating +ffffffff81ba2770 t gen9_init_clock_gating +ffffffff81ba2880 t skl_init_clock_gating +ffffffff81ba29c0 t kbl_init_clock_gating +ffffffff81ba2bd0 t bxt_init_clock_gating +ffffffff81ba2d30 t glk_init_clock_gating +ffffffff81ba2d90 t bdw_init_clock_gating +ffffffff81ba31d0 t chv_init_clock_gating +ffffffff81ba3380 t hsw_init_clock_gating +ffffffff81ba34d0 t ivb_init_clock_gating +ffffffff81ba36e0 t g4x_disable_trickle_feed +ffffffff81ba3840 t cpt_init_clock_gating +ffffffff81ba3b70 t vlv_init_clock_gating +ffffffff81ba3c80 t gen6_init_clock_gating +ffffffff81ba3e80 t ilk_init_clock_gating +ffffffff81ba4050 t g4x_init_clock_gating +ffffffff81ba4100 t i965gm_init_clock_gating +ffffffff81ba41d0 t i965g_init_clock_gating +ffffffff81ba4240 t gen3_init_clock_gating +ffffffff81ba4330 t i85x_init_clock_gating +ffffffff81ba43d0 t i830_init_clock_gating +ffffffff81ba4400 t nop_init_clock_gating +ffffffff81ba4420 t ilk_compute_pipe_wm +ffffffff81ba4890 t ilk_compute_intermediate_wm +ffffffff81ba4bb0 t ilk_initial_watermarks +ffffffff81ba4c20 t ilk_optimize_watermarks +ffffffff81ba4cd0 t ilk_compute_wm_level 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T intel_runtime_pm_get_raw +ffffffff81bab080 T intel_runtime_pm_get +ffffffff81bab130 T intel_runtime_pm_get_if_in_use +ffffffff81bab1e0 T intel_runtime_pm_get_if_active +ffffffff81bab290 T intel_runtime_pm_get_noresume +ffffffff81bab3c0 T intel_runtime_pm_put_raw +ffffffff81bab450 T intel_runtime_pm_put_unchecked +ffffffff81bab510 T intel_runtime_pm_enable +ffffffff81bab540 T intel_runtime_pm_disable +ffffffff81bab570 T intel_runtime_pm_driver_release +ffffffff81bab600 T intel_runtime_pm_init_early +ffffffff81bac000 T intel_sbi_read +ffffffff81bac050 t intel_sbi_rw +ffffffff81bac240 T intel_sbi_write +ffffffff81bad000 T intel_step_init +ffffffff81bad3f0 T intel_step_name +ffffffff81bad430 t pvc_step_lookup +ffffffff81bae000 T gen3_stolen_base +ffffffff81bae050 T gen11_stolen_base +ffffffff81bae0d0 T i830_stolen_size +ffffffff81bae140 T gen3_stolen_size +ffffffff81bae1b0 T gen6_stolen_size +ffffffff81bae200 T chv_stolen_size +ffffffff81bae270 T gen8_stolen_size +ffffffff81bae2c0 T gen9_stolen_size +ffffffff81bae330 T intel_init_stolen_res +ffffffff81baf000 T intel_uncore_mmio_debug_init_early +ffffffff81baf060 T intel_uncore_forcewake_domain_to_str +ffffffff81baf0d0 T intel_uncore_fw_release_timer +ffffffff81baf1f0 T intel_uncore_suspend +ffffffff81baf230 t intel_uncore_forcewake_reset +ffffffff81baf510 T intel_uncore_resume_early +ffffffff81baf640 T intel_uncore_unclaimed_mmio +ffffffff81baf6b0 T intel_uncore_runtime_resume +ffffffff81baf6e0 T intel_uncore_forcewake_get +ffffffff81baf850 T intel_uncore_forcewake_user_get +ffffffff81baf970 T intel_uncore_forcewake_get__locked +ffffffff81bafa40 T intel_uncore_forcewake_user_put +ffffffff81bafb80 T intel_uncore_forcewake_put__locked +ffffffff81bafc80 T intel_uncore_forcewake_put +ffffffff81bafda0 T intel_uncore_forcewake_put_delayed +ffffffff81bafef0 T intel_uncore_forcewake_flush +ffffffff81baffa0 T assert_forcewakes_inactive +ffffffff81bb0010 T assert_forcewakes_active +ffffffff81bb0040 T intel_uncore_setup_mmio +ffffffff81bb0060 t uncore_unmap_mmio +ffffffff81bb0090 T intel_uncore_init_early +ffffffff81bb00f0 T intel_uncore_init_mmio +ffffffff81bb1350 T intel_uncore_prune_engine_fw_domains +ffffffff81bb1520 t fw_domain_fini +ffffffff81bb1620 T intel_uncore_fini_mmio +ffffffff81bb16c0 T __intel_wait_for_register_fw +ffffffff81bb1970 T __intel_wait_for_register +ffffffff81bb1cf0 T intel_uncore_forcewake_for_reg +ffffffff81bb1e00 t check_for_unclaimed_mmio +ffffffff81bb1f60 T intel_uncore_arm_unclaimed_mmio_detection +ffffffff81bb2060 t vgpu_write8 +ffffffff81bb20a0 t vgpu_write16 +ffffffff81bb20e0 t vgpu_write32 +ffffffff81bb2120 t vgpu_read8 +ffffffff81bb2160 t vgpu_read16 +ffffffff81bb21a0 t vgpu_read32 +ffffffff81bb21e0 t vgpu_read64 +ffffffff81bb2220 t gen5_write8 +ffffffff81bb2310 t gen5_write16 +ffffffff81bb2410 t gen5_write32 +ffffffff81bb2500 t gen5_read8 +ffffffff81bb25e0 t gen5_read16 +ffffffff81bb26c0 t gen5_read32 +ffffffff81bb27a0 t gen5_read64 +ffffffff81bb2880 t gen2_write8 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__gen6_gt_wait_for_fifo +ffffffff81bb6000 T __intel_wakeref_get_first +ffffffff81bb60a0 T __intel_wakeref_put_last +ffffffff81bb6100 t ____intel_wakeref_put_last +ffffffff81bb61e0 T __intel_wakeref_init +ffffffff81bb6260 t __intel_wakeref_put_work +ffffffff81bb62d0 T intel_wakeref_wait_for_idle +ffffffff81bb6410 T intel_wakeref_auto_init +ffffffff81bb6480 t wakeref_auto_timeout +ffffffff81bb6520 T intel_wakeref_auto +ffffffff81bb6710 T intel_wakeref_auto_fini +ffffffff81bb67c0 t __delayed_work_tick +ffffffff81bb7000 T intel_wopcm_init_early +ffffffff81bb7070 T intel_wopcm_init +ffffffff81bb8000 T vlv_iosf_sb_get +ffffffff81bb8020 T vlv_iosf_sb_put +ffffffff81bb8040 T vlv_punit_read +ffffffff81bb8090 t vlv_sideband_rw +ffffffff81bb8240 T vlv_punit_write +ffffffff81bb8290 T vlv_bunit_read +ffffffff81bb82e0 T vlv_bunit_write +ffffffff81bb8330 T vlv_nc_read +ffffffff81bb8380 T vlv_iosf_sb_read +ffffffff81bb83d0 T vlv_iosf_sb_write +ffffffff81bb8420 T vlv_cck_read +ffffffff81bb8470 T vlv_cck_write +ffffffff81bb84c0 T vlv_ccu_read +ffffffff81bb8510 T vlv_ccu_write +ffffffff81bb8560 T vlv_dpio_read +ffffffff81bb8630 T vlv_dpio_write +ffffffff81bb86a0 T vlv_flisdsi_read +ffffffff81bb86f0 T vlv_flisdsi_write +ffffffff81bb9000 T vlv_suspend_complete +ffffffff81bb9a50 T vlv_resume_prepare +ffffffff81bba490 T vlv_suspend_init +ffffffff81bba4f0 T vlv_suspend_cleanup +ffffffff81bba540 t vlv_wait_for_pw_status +ffffffff81bbb000 T atom_execute_table_scratch_unlocked +ffffffff81bbb0a0 t atom_execute_table_locked +ffffffff81bbb3d0 T atom_execute_table +ffffffff81bbb480 T atom_parse +ffffffff81bbb650 T atom_destroy +ffffffff81bbb690 T atom_asic_init +ffffffff81bbb8a0 T atom_parse_data_header +ffffffff81bbb930 T atom_parse_cmd_header +ffffffff81bbb9a0 T atom_allocate_fb_scratch +ffffffff81bbba70 t atom_op_move +ffffffff81bbbc50 t atom_op_and +ffffffff81bbbe30 t atom_op_or +ffffffff81bbc010 t atom_op_shift_left +ffffffff81bbc200 t atom_op_shift_right +ffffffff81bbc3f0 t atom_op_mul +ffffffff81bbc540 t atom_op_div +ffffffff81bbc6b0 t atom_op_add +ffffffff81bbc890 t atom_op_sub +ffffffff81bbca70 t atom_op_setport +ffffffff81bbcbf0 t atom_op_setregblock +ffffffff81bbccb0 t atom_op_setfbbase +ffffffff81bbcd80 t atom_op_compare +ffffffff81bbcf70 t atom_op_switch +ffffffff81bbd1c0 t atom_op_jump +ffffffff81bbd440 t atom_op_test +ffffffff81bbd600 t atom_op_delay +ffffffff81bbd6e0 t atom_op_calltable +ffffffff81bbd820 t atom_op_repeat +ffffffff81bbd850 t atom_op_clear +ffffffff81bbd950 t atom_op_nop +ffffffff81bbd980 t atom_op_eot +ffffffff81bbd9b0 t atom_op_mask +ffffffff81bbdc80 t atom_op_postcard +ffffffff81bbdd30 t atom_op_beep +ffffffff81bbdd50 t atom_op_savereg +ffffffff81bbdd80 t atom_op_restorereg +ffffffff81bbddb0 t atom_op_setdatablock +ffffffff81bbdef0 t atom_op_xor +ffffffff81bbe0d0 t atom_op_shl +ffffffff81bbe2e0 t atom_op_shr +ffffffff81bbe4f0 t atom_op_debug +ffffffff81bbe520 t atom_put_dst +ffffffff81bbe9f0 t atom_get_src_int +ffffffff81bbf0a0 t atom_iio_execute +ffffffff81bc0000 T atombios_crtc_dpms +ffffffff81bc02f0 T atombios_crtc_set_base +ffffffff81bc0340 t dce4_crtc_do_set_base +ffffffff81bc0e30 t avivo_crtc_do_set_base +ffffffff81bc16a0 T atombios_crtc_set_base_atomic +ffffffff81bc16e0 T radeon_atom_disp_eng_pll_init +ffffffff81bc17c0 t atombios_crtc_set_disp_eng_pll +ffffffff81bc18d0 t atombios_crtc_program_ss +ffffffff81bc1b80 T atombios_crtc_mode_set +ffffffff81bc25b0 T radeon_atombios_init_crtc +ffffffff81bc26a0 t radeon_bo_reserve +ffffffff81bc2820 t radeon_bo_unreserve +ffffffff81bc2900 t atombios_crtc_program_pll +ffffffff81bc2bb0 t atombios_crtc_prepare +ffffffff81bc2c60 t atombios_crtc_commit +ffffffff81bc2cd0 t atombios_crtc_mode_fixup +ffffffff81bc3a40 t atombios_crtc_disable +ffffffff81bc3ca0 t radeon_get_shared_nondp_ppll +ffffffff81bc4000 T radeon_atom_copy_swap +ffffffff81bc4010 T radeon_dp_aux_init +ffffffff81bc40f0 t radeon_dp_aux_transfer_atom +ffffffff81bc42c0 T radeon_dp_getsinktype +ffffffff81bc4330 T radeon_dp_getdpcd +ffffffff81bc44a0 T radeon_dp_get_panel_mode +ffffffff81bc45a0 T radeon_dp_set_link_config +ffffffff81bc4620 t radeon_dp_get_dp_link_config +ffffffff81bc47a0 T radeon_dp_mode_valid_helper +ffffffff81bc4850 T radeon_dp_needs_link_train +ffffffff81bc48c0 T radeon_dp_set_rx_power_state +ffffffff81bc4940 T radeon_dp_link_train +ffffffff81bc50c0 t radeon_process_aux_ch +ffffffff81bc5260 t dp_get_adjust_train +ffffffff81bc6000 T atombios_get_backlight_level +ffffffff81bc6060 T atombios_set_backlight_level +ffffffff81bc6210 T atombios_dig_transmitter_setup +ffffffff81bc6230 T radeon_atom_backlight_init +ffffffff81bc6400 t radeon_atom_backlight_get_brightness +ffffffff81bc6460 T atombios_dvo_setup +ffffffff81bc6620 T atombios_digital_setup +ffffffff81bc68c0 T atombios_get_encoder_mode +ffffffff81bc6b50 T atombios_dig_encoder_setup2 +ffffffff81bc6f90 T atombios_dig_encoder_setup +ffffffff81bc6fb0 T atombios_dig_transmitter_setup2 +ffffffff81bc7910 T atombios_set_edp_panel_power +ffffffff81bc7a30 T radeon_atom_release_dig_encoder +ffffffff81bc7a70 T radeon_atom_pick_dig_encoder +ffffffff81bc7c90 T radeon_atom_encoder_init +ffffffff81bc7d60 t atombios_external_encoder_setup +ffffffff81bc7fc0 T radeon_atom_ext_encoder_setup_ddc +ffffffff81bc8010 T radeon_enc_destroy +ffffffff81bc80c0 T radeon_add_atom_encoder +ffffffff81bc8500 t radeon_atom_backlight_update_status +ffffffff81bc8560 t radeon_atom_encoder_dpms +ffffffff81bc8870 t radeon_atom_mode_fixup +ffffffff81bc89b0 t radeon_atom_encoder_prepare +ffffffff81bc8e80 t radeon_atom_encoder_commit +ffffffff81bc8eb0 t radeon_atom_encoder_mode_set +ffffffff81bc9460 t radeon_atom_dig_detect +ffffffff81bc9570 t radeon_atom_encoder_disable +ffffffff81bc9820 t radeon_atom_encoder_dpms_avivo +ffffffff81bc9a50 t radeon_atom_encoder_dpms_dig +ffffffff81bc9f50 t radeon_atom_dac_detect +ffffffff81bca140 t radeon_atom_ext_dpms +ffffffff81bca170 t radeon_atom_ext_prepare +ffffffff81bca1a0 t radeon_atom_ext_commit +ffffffff81bca1d0 t radeon_atom_ext_mode_set +ffffffff81bca200 t radeon_atom_ext_disable +ffffffff81bcb000 T radeon_atom_hw_i2c_xfer +ffffffff81bcb160 t radeon_process_i2c_ch +ffffffff81bcb330 T radeon_atom_hw_i2c_func +ffffffff81bcc000 T btc_get_max_clock_from_voltage_dependency_table +ffffffff81bcc0d0 T btc_apply_voltage_dependency_rules +ffffffff81bcc140 T btc_skip_blacklist_clocks +ffffffff81bcc230 T btc_adjust_clock_combinations +ffffffff81bcc340 T btc_apply_voltage_delta_rules +ffffffff81bcc470 T btc_program_mgcg_hw_sequence +ffffffff81bcc570 T btc_dpm_enabled +ffffffff81bcc580 T btc_notify_uvd_to_smc +ffffffff81bcc5f0 T btc_reset_to_default +ffffffff81bcc640 T btc_read_arb_registers +ffffffff81bcc6d0 T btc_dpm_vblank_too_short +ffffffff81bcc730 T btc_dpm_pre_set_power_state +ffffffff81bcd610 T btc_dpm_set_power_state +ffffffff81bcda20 T btc_dpm_post_set_power_state +ffffffff81bcdb40 T btc_dpm_enable +ffffffff81bced50 T btc_dpm_disable +ffffffff81bcf280 T btc_dpm_setup_asic +ffffffff81bcf350 T btc_dpm_init +ffffffff81bcf750 T btc_dpm_fini +ffffffff81bcf800 T btc_dpm_debugfs_print_current_performance_level +ffffffff81bcf840 T btc_dpm_get_current_sclk +ffffffff81bcf8c0 T btc_dpm_get_current_mclk +ffffffff81bcf940 T btc_dpm_get_sclk +ffffffff81bcf990 T btc_dpm_get_mclk +ffffffff81bd0000 T ci_dpm_powergate_uvd +ffffffff81bd0380 T ci_dpm_vblank_too_short +ffffffff81bd0400 T ci_fan_ctrl_get_fan_speed_percent +ffffffff81bd04a0 T ci_fan_ctrl_set_fan_speed_percent +ffffffff81bd0570 T ci_fan_ctrl_set_mode +ffffffff81bd0700 t ci_fan_ctrl_set_static_mode +ffffffff81bd07c0 t ci_thermal_start_smc_fan_control +ffffffff81bd0a00 T ci_fan_ctrl_get_mode +ffffffff81bd0a50 T ci_dpm_force_performance_level +ffffffff81bd1310 t ci_upload_dpm_level_enable_mask +ffffffff81bd1640 T ci_dpm_pre_set_power_state +ffffffff81bd1940 T ci_dpm_post_set_power_state +ffffffff81bd1a10 T ci_dpm_setup_asic +ffffffff81bd1c10 T ci_dpm_enable +ffffffff81bd5a40 t ci_enable_didt +ffffffff81bd5ce0 t ci_enable_power_containment +ffffffff81bd6180 T ci_dpm_late_enable +ffffffff81bd6370 T ci_dpm_disable +ffffffff81bd6a60 T ci_dpm_set_power_state +ffffffff81bd7be0 T ci_dpm_display_configuration_changed +ffffffff81bd7d80 T ci_dpm_fini +ffffffff81bd7e30 T ci_dpm_init +ffffffff81bd9500 T ci_dpm_debugfs_print_current_performance_level +ffffffff81bd9640 T ci_dpm_print_power_state +ffffffff81bd9700 T ci_dpm_get_current_sclk +ffffffff81bd97d0 T ci_dpm_get_current_mclk +ffffffff81bd98a0 T ci_dpm_get_sclk +ffffffff81bd98f0 T ci_dpm_get_mclk +ffffffff81bd9940 t ci_populate_all_graphic_levels +ffffffff81bd9ec0 t ci_populate_all_memory_levels +ffffffff81bda7d0 t ci_do_program_memory_timing_parameters +ffffffff81bda9f0 t ci_populate_smc_voltage_table +ffffffff81bdab50 t ci_enable_sclk_mclk_dpm +ffffffff81bdb000 T ci_copy_bytes_to_smc +ffffffff81bdb250 T ci_start_smc +ffffffff81bdb280 T ci_reset_smc +ffffffff81bdb2b0 T ci_program_jump_on_start +ffffffff81bdb2e0 T ci_stop_smc_clock +ffffffff81bdb310 T ci_start_smc_clock +ffffffff81bdb340 T ci_is_smc_running +ffffffff81bdb3b0 T ci_load_smc_ucode +ffffffff81bdb540 T ci_read_smc_sram_dword +ffffffff81bdb610 T ci_write_smc_sram_dword +ffffffff81bdc000 T cik_get_allowed_info_register +ffffffff81bdc0a0 T cik_didt_rreg +ffffffff81bdc140 T cik_didt_wreg +ffffffff81bdc1c0 T ci_get_temp +ffffffff81bdc210 T kv_get_temp +ffffffff81bdc260 T cik_pciep_rreg +ffffffff81bdc2e0 T cik_pciep_wreg +ffffffff81bdc340 T cik_get_xclk +ffffffff81bdc3b0 T cik_mm_rdoorbell +ffffffff81bdc410 T cik_mm_wdoorbell +ffffffff81bdc460 T ci_mc_load_microcode +ffffffff81bdc7b0 T cik_ring_test +ffffffff81bdca50 T cik_fence_gfx_ring_emit +ffffffff81bdce50 T cik_fence_compute_ring_emit +ffffffff81bdd0e0 T cik_semaphore_ring_emit +ffffffff81bdd2a0 T cik_copy_cpdma +ffffffff81bdd6a0 T cik_ring_ib_execute +ffffffff81bddc70 T cik_ib_test +ffffffff81bddf50 T cik_gfx_get_rptr +ffffffff81bddfa0 T cik_gfx_get_wptr +ffffffff81bddfe0 T cik_gfx_set_wptr +ffffffff81bde020 T cik_compute_get_rptr +ffffffff81bde0f0 T cik_compute_get_wptr +ffffffff81bde1d0 T cik_compute_set_wptr +ffffffff81bde250 T cik_gpu_check_soft_reset +ffffffff81bde3c0 T cik_asic_reset +ffffffff81bde7d0 t cik_gpu_pci_config_reset +ffffffff81bdeff0 T cik_gfx_is_lockup +ffffffff81bdf050 T cik_pcie_gart_tlb_flush +ffffffff81bdf0a0 T cik_ib_parse +ffffffff81bdf0d0 T cik_vm_init +ffffffff81bdf130 T cik_vm_fini +ffffffff81bdf160 T cik_vm_flush +ffffffff81bdfeb0 T cik_enter_rlc_safe_mode +ffffffff81bdff90 T cik_exit_rlc_safe_mode +ffffffff81bdffd0 T cik_update_cg +ffffffff81be04a0 t cik_enable_mgcg +ffffffff81be09c0 t cik_enable_cgcg +ffffffff81be0d30 T cik_init_cp_pg_table +ffffffff81be0ff0 T cik_get_csb_size +ffffffff81be1080 T cik_get_csb_buffer +ffffffff81be1220 T cik_irq_set +ffffffff81be1fc0 t cik_disable_interrupt_state +ffffffff81be2480 T cik_irq_process +ffffffff81be3c20 t cik_irq_ack +ffffffff81be45a0 T cik_resume +ffffffff81be4630 t cik_init_golden_registers +ffffffff81be47f0 t cik_startup +ffffffff81bea540 T cik_suspend +ffffffff81bea920 T cik_init +ffffffff81beb110 t cik_init_microcode +ffffffff81bec120 t cik_pcie_gart_fini +ffffffff81bec220 T cik_fini +ffffffff81bec5c0 T dce8_program_fmt +ffffffff81bec6f0 T dce8_bandwidth_update +ffffffff81bed310 T cik_get_gpu_clock_counter +ffffffff81bed3d0 T cik_set_uvd_clocks +ffffffff81bed440 t cik_set_uvd_clock +ffffffff81bed5b0 T cik_set_vce_clocks +ffffffff81bed7f0 t cik_wait_for_rlc_serdes +ffffffff81bed9c0 t radeon_bo_reserve +ffffffff81bedb40 t radeon_bo_unreserve +ffffffff81bedc20 t cik_update_gfx_pg +ffffffff81beddc0 t cik_compute_stop +ffffffff81bedf30 t cik_cp_compute_fini +ffffffff81bee0d0 t dce8_latency_watermark +ffffffff81bef000 T cik_sdma_get_rptr +ffffffff81bef070 T cik_sdma_get_wptr +ffffffff81bef0c0 T cik_sdma_set_wptr +ffffffff81bef110 T cik_sdma_ring_ib_execute +ffffffff81bef4f0 T cik_sdma_fence_ring_emit +ffffffff81bef6d0 t cik_sdma_hdp_flush_ring_emit +ffffffff81bef910 T cik_sdma_semaphore_ring_emit +ffffffff81befa30 T cik_sdma_enable +ffffffff81befc10 T cik_sdma_resume +ffffffff81bf00e0 T cik_sdma_fini +ffffffff81bf0120 T cik_copy_dma +ffffffff81bf04f0 T cik_sdma_ring_test +ffffffff81bf0790 T cik_sdma_ib_test +ffffffff81bf09e0 T cik_sdma_is_lockup +ffffffff81bf0a60 T cik_sdma_vm_copy_pages +ffffffff81bf0b70 T cik_sdma_vm_write_pages +ffffffff81bf0ce0 T cik_sdma_vm_set_pages +ffffffff81bf0e50 T cik_sdma_vm_pad_ib +ffffffff81bf0ea0 T cik_dma_vm_flush +ffffffff81bf2000 T cypress_enable_spread_spectrum +ffffffff81bf2130 T cypress_start_dpm +ffffffff81bf2180 T cypress_enable_sclk_control +ffffffff81bf21e0 T cypress_enable_mclk_control +ffffffff81bf2240 T cypress_notify_smc_display_change +ffffffff81bf2280 T cypress_program_response_times +ffffffff81bf2340 T cypress_advertise_gen2_capability +ffffffff81bf2410 T cypress_notify_link_speed_change_after_state_change +ffffffff81bf24d0 T cypress_notify_link_speed_change_before_state_change +ffffffff81bf2580 T cypress_get_strobe_mode_settings +ffffffff81bf2680 T cypress_get_mclk_frequency_ratio +ffffffff81bf2730 T cypress_map_clkf_to_ibias +ffffffff81bf27f0 T cypress_convert_power_level_to_smc +ffffffff81bf2bb0 t cypress_populate_mclk_value +ffffffff81bf2f80 T cypress_upload_sw_state +ffffffff81bf3100 T cypress_upload_mc_reg_table +ffffffff81bf31b0 t cypress_convert_mc_reg_table_to_smc +ffffffff81bf3450 T cypress_calculate_burst_time +ffffffff81bf34d0 T cypress_program_memory_timing_parameters +ffffffff81bf3680 T cypress_populate_smc_initial_state +ffffffff81bf3a10 T cypress_populate_smc_acpi_state +ffffffff81bf3da0 T cypress_construct_voltage_tables +ffffffff81bf3e40 t cypress_trim_voltage_table_to_fit_state_table +ffffffff81bf4030 T cypress_populate_smc_voltage_tables +ffffffff81bf4170 T cypress_get_mvdd_configuration +ffffffff81bf4230 T cypress_populate_mc_reg_table +ffffffff81bf4490 T cypress_get_table_locations +ffffffff81bf4570 T cypress_enable_display_gap +ffffffff81bf45c0 T cypress_dpm_setup_asic +ffffffff81bf46b0 T cypress_dpm_enable +ffffffff81bf5190 t cypress_force_mc_use_s1 +ffffffff81bf5410 t cypress_gfx_clock_gating_enable +ffffffff81bf5720 t cypress_mg_clock_gating_enable +ffffffff81bf59a0 T cypress_dpm_disable +ffffffff81bf5bd0 T cypress_dpm_set_power_state +ffffffff81bf5e80 T cypress_dpm_display_configuration_changed +ffffffff81bf5f60 T cypress_dpm_init +ffffffff81bf61d0 T cypress_dpm_fini +ffffffff81bf6260 T cypress_dpm_vblank_too_short +ffffffff81bf62c0 t cypress_wait_for_mc_sequencer +ffffffff81bf7000 T dce3_2_afmt_hdmi_write_speaker_allocation +ffffffff81bf7070 T dce3_2_afmt_dp_write_speaker_allocation +ffffffff81bf70e0 T dce3_2_afmt_write_sad_regs +ffffffff81bf71f0 T dce3_2_audio_set_dto +ffffffff81bf7330 T dce3_2_hdmi_update_acr +ffffffff81bf7690 T dce3_2_set_audio_packet +ffffffff81bf7820 T dce3_2_set_mute +ffffffff81bf8000 T dce6_endpoint_rreg +ffffffff81bf80d0 T dce6_endpoint_wreg +ffffffff81bf81c0 T dce6_audio_get_pin +ffffffff81bf8330 T dce6_afmt_select_pin +ffffffff81bf83c0 T dce6_afmt_write_latency_fields +ffffffff81bf8470 T dce6_afmt_hdmi_write_speaker_allocation +ffffffff81bf8540 T dce6_afmt_dp_write_speaker_allocation +ffffffff81bf8610 T dce6_afmt_write_sad_regs +ffffffff81bf8750 T dce6_audio_enable +ffffffff81bf8790 T dce6_hdmi_audio_set_dto +ffffffff81bf8800 T dce6_dp_audio_set_dto +ffffffff81bf9000 T eg_cg_rreg +ffffffff81bf9080 t r100_mm_rreg +ffffffff81bf90d0 T eg_cg_wreg +ffffffff81bf9130 T eg_pif_phy0_rreg +ffffffff81bf91b0 T eg_pif_phy0_wreg +ffffffff81bf9210 T eg_pif_phy1_rreg +ffffffff81bf9290 T eg_pif_phy1_wreg +ffffffff81bf92f0 T evergreen_get_allowed_info_register +ffffffff81bf9370 T evergreen_tiling_fields +ffffffff81bf9410 T sumo_set_uvd_clocks +ffffffff81bf94e0 t sumo_set_uvd_clock +ffffffff81bf96a0 T evergreen_set_uvd_clocks +ffffffff81bf9c40 T evergreen_fix_pci_max_read_req_size +ffffffff81bf9df0 T dce4_program_fmt +ffffffff81bf9f00 T dce4_wait_for_vblank +ffffffff81bfa180 T evergreen_page_flip +ffffffff81bfa310 T evergreen_page_flip_pending +ffffffff81bfa380 T evergreen_get_temp +ffffffff81bfa450 T sumo_get_temp +ffffffff81bfa490 T sumo_pm_init_profile +ffffffff81bfa5d0 T btc_pm_init_profile +ffffffff81bfa6e0 T evergreen_pm_misc +ffffffff81bfa880 T evergreen_pm_prepare +ffffffff81bfa980 T evergreen_pm_finish +ffffffff81bfaa80 T evergreen_hpd_sense +ffffffff81bfaaf0 T evergreen_hpd_set_polarity +ffffffff81bfac30 T evergreen_hpd_init +ffffffff81bfad00 T evergreen_hpd_fini +ffffffff81bfada0 T evergreen_get_number_of_dram_channels +ffffffff81bfade0 T evergreen_bandwidth_update +ffffffff81bfafa0 t evergreen_line_buffer_adjust +ffffffff81bfb1a0 t evergreen_program_watermarks +ffffffff81bfbc50 T evergreen_mc_wait_for_idle +ffffffff81bfbce0 T evergreen_pcie_gart_tlb_flush +ffffffff81bfbdb0 T evergreen_mc_stop +ffffffff81bfc8a0 T evergreen_mc_resume +ffffffff81bfcfb0 T evergreen_mc_program +ffffffff81bfd3c0 T evergreen_ring_ib_execute +ffffffff81bfd850 T evergreen_mc_init +ffffffff81bfd990 T evergreen_print_gpu_status_regs +ffffffff81bfd9c0 T evergreen_is_display_hung +ffffffff81bfdbc0 T evergreen_gpu_check_soft_reset +ffffffff81bfdd20 T evergreen_gpu_pci_config_reset +ffffffff81bfde90 T evergreen_asic_reset +ffffffff81bfe1a0 T evergreen_gfx_is_lockup +ffffffff81bfe200 T sumo_rlc_fini +ffffffff81bfe3c0 t radeon_bo_reserve +ffffffff81bfe540 t radeon_bo_unreserve +ffffffff81bfe620 T sumo_rlc_init +ffffffff81bfee00 T evergreen_rlc_resume +ffffffff81bff170 T evergreen_get_vblank_counter +ffffffff81bff1d0 T evergreen_disable_interrupt_state +ffffffff81bff4a0 T evergreen_irq_set +ffffffff81bffa60 T evergreen_irq_suspend +ffffffff81bffab0 T evergreen_irq_process +ffffffff81c005a0 t evergreen_irq_ack +ffffffff81c00ca0 T evergreen_resume +ffffffff81c00d80 t evergreen_init_golden_registers +ffffffff81c00f90 t evergreen_startup +ffffffff81c03620 T evergreen_suspend +ffffffff81c037c0 T evergreen_init +ffffffff81c03cd0 T evergreen_fini +ffffffff81c03ec0 T evergreen_pcie_gen2_enable +ffffffff81c040f0 T evergreen_program_aspm +ffffffff81c04790 t evergreen_latency_watermark +ffffffff81c05000 T evergreen_cs_parse +ffffffff81c078b0 T evergreen_dma_cs_parse +ffffffff81c08af0 T evergreen_ib_parse +ffffffff81c08fa0 T evergreen_dma_ib_parse +ffffffff81c09160 t evergreen_cs_track_check +ffffffff81c0a180 t evergreen_cs_handle_reg +ffffffff81c0c0c0 t evergreen_surface_value_conv_check +ffffffff81c0c3a0 t evergreen_surface_check +ffffffff81c0c840 t evergreen_cs_track_validate_htile +ffffffff81c0cae0 t evergreen_vm_reg_valid +ffffffff81c0d000 T evergreen_dma_fence_ring_emit +ffffffff81c0d2c0 T evergreen_dma_ring_ib_execute +ffffffff81c0d600 T evergreen_copy_dma +ffffffff81c0d9b0 T evergreen_dma_is_lockup +ffffffff81c0e000 T dce4_audio_enable +ffffffff81c0e080 T evergreen_hdmi_update_acr +ffffffff81c0e290 T dce4_afmt_write_latency_fields +ffffffff81c0e300 T dce4_afmt_hdmi_write_speaker_allocation +ffffffff81c0e370 T dce4_afmt_dp_write_speaker_allocation +ffffffff81c0e3e0 T evergreen_hdmi_write_sad_regs +ffffffff81c0e4f0 T evergreen_set_avi_packet +ffffffff81c0e680 T dce4_hdmi_audio_set_dto +ffffffff81c0e750 T dce4_dp_audio_set_dto +ffffffff81c0e840 T dce4_set_vbi_packet +ffffffff81c0e8a0 T dce4_hdmi_set_color_depth +ffffffff81c0e9f0 T dce4_set_audio_packet +ffffffff81c0ec00 T dce4_set_mute +ffffffff81c0ed00 T evergreen_hdmi_enable +ffffffff81c0f030 T evergreen_dp_enable +ffffffff81c10000 T kv_dpm_enable_bapm +ffffffff81c10060 T kv_dpm_enable +ffffffff81c115a0 t kv_enable_didt +ffffffff81c11840 T kv_dpm_late_enable +ffffffff81c11a20 T kv_dpm_powergate_uvd +ffffffff81c11b90 T kv_dpm_disable +ffffffff81c11f00 T kv_dpm_force_performance_level +ffffffff81c12090 t kv_force_dpm_lowest +ffffffff81c12160 T kv_dpm_pre_set_power_state +ffffffff81c126f0 T kv_dpm_set_power_state +ffffffff81c12ea0 t kv_set_valid_clock_range +ffffffff81c13060 t kv_calculate_ds_divider +ffffffff81c131d0 t kv_calculate_nbps_level_settings +ffffffff81c13360 t kv_update_vce_dpm +ffffffff81c13540 T kv_dpm_post_set_power_state +ffffffff81c135e0 T kv_dpm_setup_asic +ffffffff81c13640 T kv_dpm_init +ffffffff81c13ee0 T kv_dpm_debugfs_print_current_performance_level +ffffffff81c13f50 T kv_dpm_get_current_sclk +ffffffff81c13fc0 T kv_dpm_get_current_mclk +ffffffff81c13ff0 T kv_dpm_print_power_state +ffffffff81c14090 T kv_dpm_fini +ffffffff81c14130 T kv_dpm_display_configuration_changed +ffffffff81c14160 T kv_dpm_get_sclk +ffffffff81c141b0 T kv_dpm_get_mclk +ffffffff81c15000 T kv_notify_message_to_smu +ffffffff81c150c0 T kv_dpm_get_enable_mask +ffffffff81c15190 T kv_send_msg_to_smc_with_parameter +ffffffff81c15260 T kv_read_smc_sram_dword +ffffffff81c152e0 T kv_smc_dpm_enable +ffffffff81c15400 T kv_smc_bapm_enable +ffffffff81c15520 T kv_copy_bytes_to_smc +ffffffff81c16000 T tn_smc_rreg +ffffffff81c16080 T tn_smc_wreg +ffffffff81c160e0 T ni_mc_load_microcode +ffffffff81c162d0 T ni_init_microcode +ffffffff81c16810 T cayman_get_allowed_info_register +ffffffff81c168a0 T tn_get_temp +ffffffff81c16930 T cayman_pcie_gart_tlb_flush +ffffffff81c16980 T cayman_cp_int_cntl_setup +ffffffff81c169d0 T cayman_fence_ring_emit +ffffffff81c16d70 T cayman_ring_ib_execute +ffffffff81c171e0 T cayman_gfx_get_rptr +ffffffff81c17270 T cayman_gfx_get_wptr +ffffffff81c172e0 T cayman_gfx_set_wptr +ffffffff81c17360 T cayman_gpu_check_soft_reset +ffffffff81c174e0 T cayman_asic_reset +ffffffff81c177e0 T cayman_gfx_is_lockup +ffffffff81c17840 T cayman_resume +ffffffff81c178d0 t ni_init_golden_registers +ffffffff81c179b0 t cayman_startup +ffffffff81c1a0e0 T cayman_suspend +ffffffff81c1a2d0 T cayman_init +ffffffff81c1a8d0 T cayman_fini +ffffffff81c1ab50 T cayman_vm_init +ffffffff81c1abb0 T cayman_vm_fini +ffffffff81c1abe0 T cayman_vm_decode_fault +ffffffff81c1ac70 T cayman_vm_flush +ffffffff81c1b0f0 T tn_set_vce_clocks +ffffffff81c1c000 T cayman_dma_get_rptr +ffffffff81c1c070 T cayman_dma_get_wptr +ffffffff81c1c0c0 T cayman_dma_set_wptr +ffffffff81c1c110 T cayman_dma_ring_ib_execute +ffffffff81c1c4a0 T cayman_dma_stop +ffffffff81c1c550 T cayman_dma_resume +ffffffff81c1c7a0 T cayman_dma_fini +ffffffff81c1c850 T cayman_dma_is_lockup +ffffffff81c1c8d0 T cayman_dma_vm_copy_pages +ffffffff81c1c9c0 T cayman_dma_vm_write_pages +ffffffff81c1cb20 T cayman_dma_vm_set_pages +ffffffff81c1cc80 T cayman_dma_vm_pad_ib +ffffffff81c1ccd0 T cayman_dma_vm_flush +ffffffff81c1e000 T ni_get_pi +ffffffff81c1e030 T ni_get_ps +ffffffff81c1e060 T ni_dpm_vblank_too_short +ffffffff81c1e0c0 T ni_dpm_force_performance_level +ffffffff81c1e200 T ni_copy_and_switch_arb_sets +ffffffff81c1e4d0 T ni_set_uvd_clock_before_set_eng_clock +ffffffff81c1e550 T ni_set_uvd_clock_after_set_eng_clock +ffffffff81c1e5d0 T ni_dpm_setup_asic +ffffffff81c1e7e0 T ni_update_current_ps +ffffffff81c1e890 T ni_update_requested_ps +ffffffff81c1e940 T ni_dpm_enable +ffffffff81c21b80 t ni_populate_smc_tdp_limits +ffffffff81c21d40 T ni_dpm_disable +ffffffff81c22100 T ni_dpm_pre_set_power_state +ffffffff81c226e0 T ni_dpm_set_power_state +ffffffff81c237f0 T ni_dpm_post_set_power_state +ffffffff81c238c0 T ni_dpm_init +ffffffff81c24290 T ni_dpm_fini +ffffffff81c24340 T ni_dpm_print_power_state +ffffffff81c24410 T ni_dpm_debugfs_print_current_performance_level +ffffffff81c24450 T ni_dpm_get_current_sclk +ffffffff81c244b0 T ni_dpm_get_current_mclk +ffffffff81c24510 T ni_dpm_get_sclk +ffffffff81c24570 T ni_dpm_get_mclk +ffffffff81c245d0 t ni_do_program_memory_timing_parameters +ffffffff81c24700 t ni_calculate_sclk_params +ffffffff81c24920 t ni_calculate_power_boost_limit +ffffffff81c24ad0 t ni_populate_mclk_value +ffffffff81c25000 T r100_wait_for_vblank +ffffffff81c251a0 T r100_page_flip +ffffffff81c25450 T r100_page_flip_pending +ffffffff81c25500 T r100_pm_get_dynpm_state +ffffffff81c25720 T r100_pm_init_profile +ffffffff81c25800 T r100_pm_misc +ffffffff81c25c30 T r100_pm_prepare +ffffffff81c25ce0 T r100_pm_finish +ffffffff81c25d90 T r100_gui_idle +ffffffff81c25dd0 T r100_hpd_sense +ffffffff81c25e30 T r100_hpd_set_polarity +ffffffff81c25ee0 T r100_hpd_init +ffffffff81c25f70 T r100_hpd_fini +ffffffff81c25fd0 T r100_pci_gart_tlb_flush +ffffffff81c26000 T r100_pci_gart_init +ffffffff81c260d0 T r100_pci_gart_get_page_entry +ffffffff81c26100 T r100_pci_gart_set_page +ffffffff81c26130 T r100_pci_gart_enable +ffffffff81c26210 T r100_pci_gart_disable +ffffffff81c26280 T r100_pci_gart_fini +ffffffff81c262f0 T r100_irq_set +ffffffff81c263c0 T r100_irq_disable +ffffffff81c26430 T r100_irq_process +ffffffff81c26730 T r100_get_vblank_counter +ffffffff81c26780 T r100_fence_ring_emit +ffffffff81c26bf0 T r100_semaphore_ring_emit +ffffffff81c26c20 T r100_copy_blit +ffffffff81c272b0 T r100_ring_start +ffffffff81c273a0 T r100_gfx_get_rptr +ffffffff81c273f0 T r100_gfx_get_wptr +ffffffff81c27430 T r100_gfx_set_wptr +ffffffff81c27470 T r100_cp_init +ffffffff81c279a0 T r100_debugfs_cp_init +ffffffff81c279d0 T r100_cp_fini +ffffffff81c27a70 T r100_cp_disable +ffffffff81c27bb0 T r100_gui_wait_for_idle +ffffffff81c27ca0 T r100_reloc_pitch_offset +ffffffff81c27dd0 T r100_packet3_load_vbpntr +ffffffff81c28070 T r100_cs_parse_packet0 +ffffffff81c28180 T r100_cs_packet_parse_vline +ffffffff81c28370 T r100_cs_track_check_pkt3_indx_buffer +ffffffff81c283e0 T r100_cs_parse +ffffffff81c298a0 T r100_cs_track_clear +ffffffff81c29c30 T r100_cs_track_check +ffffffff81c2a610 T r100_mc_wait_for_idle +ffffffff81c2a6a0 T r100_gpu_is_lockup +ffffffff81c2a700 T r100_enable_bm +ffffffff81c2a740 T r100_bm_disable +ffffffff81c2a7e0 T r100_asic_reset +ffffffff81c2ab10 T r100_mc_stop +ffffffff81c2acc0 T r100_mc_resume +ffffffff81c2ad70 T r100_set_common_regs +ffffffff81c2af20 T r100_vram_init_sizes +ffffffff81c2b100 T r100_vga_set_state +ffffffff81c2b160 T r100_pll_errata_after_index +ffffffff81c2b1a0 T r100_pll_rreg +ffffffff81c2b2c0 T r100_pll_wreg +ffffffff81c2b3d0 T r100_debugfs_rbbm_init +ffffffff81c2b400 T r100_debugfs_mc_info_init +ffffffff81c2b430 T r100_set_surface_reg +ffffffff81c2b640 T r100_clear_surface_reg +ffffffff81c2b6f0 T r100_bandwidth_update +ffffffff81c2c190 T r100_ring_test +ffffffff81c2c440 T r100_ring_ib_execute +ffffffff81c2c6a0 T r100_ib_test +ffffffff81c2c9e0 T r100_vga_render_disable +ffffffff81c2ca40 T r100_resume +ffffffff81c2cc30 t r100_startup +ffffffff81c2d160 T r100_suspend +ffffffff81c2d240 T r100_fini +ffffffff81c2d340 T r100_restore_sanity +ffffffff81c2d3e0 T r100_init +ffffffff81c2d950 T r100_mm_rreg_slow +ffffffff81c2d9c0 T r100_mm_wreg_slow +ffffffff81c2da20 T r100_io_rreg +ffffffff81c2dac0 T r100_io_wreg +ffffffff81c2db30 t r100_cs_track_texture_print +ffffffff81c2e000 T r200_copy_dma +ffffffff81c2e460 T r200_packet0_check +ffffffff81c2f470 T r200_set_safe_registers +ffffffff81c30000 T rv370_pcie_rreg +ffffffff81c30080 T rv370_pcie_wreg +ffffffff81c300e0 T rv370_pcie_gart_tlb_flush +ffffffff81c302d0 T rv370_pcie_gart_get_page_entry +ffffffff81c30330 T rv370_pcie_gart_set_page +ffffffff81c30370 T rv370_pcie_gart_init +ffffffff81c30440 T rv370_pcie_gart_enable +ffffffff81c307a0 T rv370_pcie_gart_disable +ffffffff81c30920 T rv370_pcie_gart_fini +ffffffff81c30950 T r300_fence_ring_emit +ffffffff81c30ee0 T r300_ring_start +ffffffff81c318f0 T r300_mc_wait_for_idle +ffffffff81c31980 T r300_asic_reset +ffffffff81c31b90 T r300_mc_init +ffffffff81c31c40 T rv370_set_pcie_lanes +ffffffff81c31e00 T rv370_get_pcie_lanes +ffffffff81c31eb0 T r300_cs_parse +ffffffff81c32210 t r300_packet0_check +ffffffff81c33070 T r300_set_reg_safe +ffffffff81c330b0 T r300_mc_program +ffffffff81c33230 T r300_clock_startup +ffffffff81c332b0 T r300_resume +ffffffff81c33480 t r300_startup +ffffffff81c337e0 T r300_suspend +ffffffff81c33860 T r300_fini +ffffffff81c33940 T r300_init +ffffffff81c34000 T r420_pm_init_profile +ffffffff81c340e0 T r420_pipes_init +ffffffff81c342c0 T r420_mc_rreg +ffffffff81c34340 T r420_mc_wreg +ffffffff81c343b0 T r420_resume +ffffffff81c34580 t r420_startup +ffffffff81c34920 T r420_suspend +ffffffff81c34ac0 T r420_fini +ffffffff81c34ba0 T r420_init +ffffffff81c34e20 T r420_debugfs_pipes_info_init +ffffffff81c35000 T r520_mc_wait_for_idle +ffffffff81c35090 T r520_resume +ffffffff81c35180 t r520_startup +ffffffff81c35570 T r520_init +ffffffff81c36000 T r600_rcu_rreg +ffffffff81c36080 T r600_rcu_wreg +ffffffff81c360f0 T r600_uvd_ctx_rreg +ffffffff81c36170 T r600_uvd_ctx_wreg +ffffffff81c361e0 T r600_get_allowed_info_register +ffffffff81c36250 T r600_get_xclk +ffffffff81c36280 T r600_set_uvd_clocks +ffffffff81c367e0 T dce3_program_fmt +ffffffff81c368f0 T rv6xx_get_temp +ffffffff81c36940 T r600_pm_get_dynpm_state +ffffffff81c36d40 T rs780_pm_init_profile +ffffffff81c36e40 T r600_pm_init_profile +ffffffff81c370d0 T r600_pm_misc +ffffffff81c371a0 T r600_gui_idle +ffffffff81c371e0 T r600_hpd_sense +ffffffff81c37300 T r600_hpd_set_polarity +ffffffff81c37570 T r600_hpd_init +ffffffff81c37780 T r600_hpd_fini +ffffffff81c37930 T r600_pcie_gart_tlb_flush +ffffffff81c37a70 T r600_pcie_gart_init +ffffffff81c37b10 T r600_mc_wait_for_idle +ffffffff81c37ba0 T rs780_mc_rreg +ffffffff81c37c30 T rs780_mc_wreg +ffffffff81c37cb0 T r600_vram_scratch_init +ffffffff81c37db0 t radeon_bo_reserve +ffffffff81c37f30 t radeon_bo_unreserve +ffffffff81c38010 T r600_vram_scratch_fini +ffffffff81c38080 T r600_set_bios_scratch_engine_hung +ffffffff81c380d0 T r600_gpu_check_soft_reset +ffffffff81c38450 T r600_asic_reset +ffffffff81c387e0 t r600_gpu_pci_config_reset +ffffffff81c38a00 T r600_gfx_is_lockup +ffffffff81c38a60 T r6xx_remap_render_backend +ffffffff81c38c40 T r600_count_pipe_bits +ffffffff81c38cb0 T r600_pciep_rreg +ffffffff81c38d30 T r600_pciep_wreg +ffffffff81c38d90 T r600_cp_stop +ffffffff81c38e10 T r600_init_microcode +ffffffff81c392e0 T r600_gfx_get_rptr +ffffffff81c39330 T r600_gfx_get_wptr +ffffffff81c39370 T r600_gfx_set_wptr +ffffffff81c393b0 T r600_cp_start +ffffffff81c39730 T r600_cp_resume +ffffffff81c39a90 T r600_ring_init +ffffffff81c39b30 T r600_cp_fini +ffffffff81c39bb0 T r600_scratch_init +ffffffff81c39c20 T r600_ring_test +ffffffff81c39ec0 T r600_fence_ring_emit +ffffffff81c3a780 T r600_semaphore_ring_emit +ffffffff81c3a970 T r600_copy_cpdma +ffffffff81c3af20 T r600_set_surface_reg +ffffffff81c3af50 T r600_clear_surface_reg +ffffffff81c3af80 T r600_vga_set_state +ffffffff81c3afe0 T r600_resume +ffffffff81c3b070 t r600_startup +ffffffff81c3d080 T r600_suspend +ffffffff81c3d1e0 T r600_irq_suspend +ffffffff81c3d2a0 t r600_pcie_gart_disable +ffffffff81c3d4a0 T r600_init +ffffffff81c3dc90 T r600_ih_ring_init +ffffffff81c3dd00 T r600_irq_fini +ffffffff81c3de30 T r600_fini +ffffffff81c3dfc0 T r600_ring_ib_execute +ffffffff81c3e440 T r600_ib_test +ffffffff81c3e6f0 T r600_ih_ring_alloc +ffffffff81c3e810 T r600_ih_ring_fini +ffffffff81c3e8a0 T r600_rlc_stop +ffffffff81c3ea20 T r600_disable_interrupts +ffffffff81c3ead0 T r600_irq_init +ffffffff81c3ef30 t r600_disable_interrupt_state +ffffffff81c3f220 T r600_irq_disable +ffffffff81c3f2e0 T r600_irq_set +ffffffff81c3fa50 t r600_irq_ack +ffffffff81c3ff40 T r600_irq_process +ffffffff81c40b30 T r600_mmio_hdp_flush +ffffffff81c40ba0 T r600_set_pcie_lanes +ffffffff81c40cd0 T r600_get_pcie_lanes +ffffffff81c40da0 T r600_get_gpu_clock_counter +ffffffff81c41000 T r600_fmt_is_valid_color +ffffffff81c41040 T r600_fmt_is_valid_texture +ffffffff81c41090 T r600_fmt_get_blocksize +ffffffff81c410d0 T r600_fmt_get_nblocksx +ffffffff81c41120 T r600_fmt_get_nblocksy +ffffffff81c41170 T r600_cs_common_vline_parse +ffffffff81c41430 T r600_mip_minify +ffffffff81c41490 T r600_cs_parse +ffffffff81c43420 T r600_dma_cs_next_reloc +ffffffff81c434a0 T r600_dma_cs_parse +ffffffff81c43bd0 t r600_cs_track_check +ffffffff81c44d10 t r600_cs_check_reg +ffffffff81c46000 T r600_dma_get_rptr +ffffffff81c46060 T r600_dma_get_wptr +ffffffff81c460a0 T r600_dma_set_wptr +ffffffff81c460e0 T r600_dma_stop +ffffffff81c46170 T r600_dma_resume +ffffffff81c46370 T r600_dma_fini +ffffffff81c463e0 T r600_dma_is_lockup +ffffffff81c46440 T r600_dma_ring_test +ffffffff81c466a0 T r600_dma_fence_ring_emit +ffffffff81c46890 T r600_dma_semaphore_ring_emit +ffffffff81c469b0 T r600_dma_ib_test +ffffffff81c46bc0 T r600_dma_ring_ib_execute +ffffffff81c46f00 T r600_copy_dma +ffffffff81c48000 T r600_dpm_print_class_info +ffffffff81c482b0 T r600_dpm_print_cap_info +ffffffff81c48330 T r600_dpm_print_ps_status +ffffffff81c483c0 T r600_dpm_get_vblank_time +ffffffff81c48480 T r600_dpm_get_vrefresh +ffffffff81c48510 T r600_calculate_u_and_p +ffffffff81c48580 T r600_calculate_at +ffffffff81c48630 T r600_gfx_clockgating_enable +ffffffff81c48740 T r600_dynamicpm_enable +ffffffff81c487a0 T r600_enable_thermal_protection +ffffffff81c48800 T r600_enable_acpi_pm +ffffffff81c48850 T r600_enable_dynamic_pcie_gen2 +ffffffff81c488b0 T r600_dynamicpm_enabled +ffffffff81c488f0 T r600_enable_sclk_control +ffffffff81c48950 T r600_enable_mclk_control +ffffffff81c489b0 T r600_enable_spll_bypass +ffffffff81c48a10 T r600_wait_for_spll_change +ffffffff81c48a90 T r600_set_bsp +ffffffff81c48ad0 T r600_set_at +ffffffff81c48b30 T r600_set_tc +ffffffff81c48b90 T r600_select_td +ffffffff81c48c50 T r600_set_vrc +ffffffff81c48c90 T r600_set_tpu +ffffffff81c48ce0 T r600_set_tpc +ffffffff81c48d30 T r600_set_sstu +ffffffff81c48d80 T r600_set_sst +ffffffff81c48dd0 T r600_set_git +ffffffff81c48e20 T r600_set_fctu +ffffffff81c48e70 T r600_set_fct +ffffffff81c48ec0 T r600_set_ctxcgtt3d_rphc +ffffffff81c48f10 T r600_set_ctxcgtt3d_rsdc +ffffffff81c48f70 T r600_set_vddc3d_oorsu +ffffffff81c48fc0 T r600_set_vddc3d_oorphc +ffffffff81c49010 T r600_set_vddc3d_oorsdc +ffffffff81c49070 T r600_set_mpll_lock_time +ffffffff81c490c0 T r600_set_mpll_reset_time +ffffffff81c49110 T r600_engine_clock_entry_enable +ffffffff81c49210 T r600_engine_clock_entry_enable_pulse_skipping +ffffffff81c49310 T r600_engine_clock_entry_enable_post_divider +ffffffff81c49410 T r600_engine_clock_entry_set_post_divider +ffffffff81c494d0 T r600_engine_clock_entry_set_reference_divider +ffffffff81c49590 T r600_engine_clock_entry_set_feedback_divider +ffffffff81c49650 T r600_engine_clock_entry_set_step_time +ffffffff81c49710 T r600_vid_rt_set_ssu +ffffffff81c49760 T r600_vid_rt_set_vru +ffffffff81c497b0 T r600_vid_rt_set_vrt +ffffffff81c49800 T r600_voltage_control_enable_pins +ffffffff81c49850 T r600_voltage_control_program_voltages +ffffffff81c498e0 T r600_voltage_control_deactivate_static_control +ffffffff81c49970 T r600_power_level_enable +ffffffff81c499e0 T r600_power_level_set_voltage_index +ffffffff81c49a40 T r600_power_level_set_mem_clock_index +ffffffff81c49aa0 T r600_power_level_set_eng_clock_index +ffffffff81c49b10 T r600_power_level_set_watermark_id +ffffffff81c49b80 T r600_power_level_set_pcie_gen2 +ffffffff81c49be0 T r600_power_level_get_current_index +ffffffff81c49c20 T r600_power_level_get_target_index +ffffffff81c49c60 T r600_power_level_set_enter_index +ffffffff81c49cb0 T r600_wait_for_power_level_unequal +ffffffff81c49d90 T r600_wait_for_power_level +ffffffff81c49e70 T r600_start_dpm +ffffffff81c4a150 T r600_stop_dpm +ffffffff81c4a1a0 T r600_dpm_pre_set_power_state +ffffffff81c4a1d0 T r600_dpm_post_set_power_state +ffffffff81c4a200 T r600_is_uvd_state +ffffffff81c4a230 T r600_is_internal_thermal_sensor +ffffffff81c4a270 T r600_dpm_late_enable +ffffffff81c4a380 T r600_get_platform_caps +ffffffff81c4a420 T r600_parse_extended_power_table +ffffffff81c4b390 T r600_free_extended_power_table +ffffffff81c4b490 T r600_get_pcie_gen_support +ffffffff81c4b4e0 T r600_get_pcie_lane_support +ffffffff81c4b540 T r600_encode_pci_lane_width +ffffffff81c4c000 T r600_audio_update_hdmi +ffffffff81c4c170 t r600_audio_status +ffffffff81c4c290 T r600_hdmi_buffer_status_changed +ffffffff81c4c330 T r600_hdmi_update_audio_settings +ffffffff81c4c700 T r600_audio_enable +ffffffff81c4c780 T r600_audio_get_pin +ffffffff81c4c7b0 T r600_hdmi_update_acr +ffffffff81c4cb50 T r600_set_avi_packet +ffffffff81c4cd40 T r600_hdmi_audio_workaround +ffffffff81c4ce00 T r600_hdmi_audio_set_dto +ffffffff81c4cec0 T r600_set_vbi_packet +ffffffff81c4cf70 T r600_set_audio_packet +ffffffff81c4d240 T r600_set_mute +ffffffff81c4d340 T r600_hdmi_enable +ffffffff81c4e000 T radeon_acpi_is_pcie_performance_request_supported +ffffffff81c4e040 T radeon_acpi_pcie_notify_device_ready +ffffffff81c4e170 T radeon_acpi_pcie_performance_request +ffffffff81c4e390 T radeon_acpi_init +ffffffff81c4eae0 t radeon_acpi_event +ffffffff81c4ee30 T radeon_acpi_fini +ffffffff81c4f000 T radeon_agp_head_init +ffffffff81c4f050 T radeon_agp_init +ffffffff81c4f0a0 T radeon_agp_resume +ffffffff81c4f140 T radeon_agp_fini +ffffffff81c4f190 T radeon_agp_suspend +ffffffff81c50000 T radeon_agp_disable +ffffffff81c50110 T radeon_asic_init +ffffffff81c509a0 t radeon_invalid_rreg +ffffffff81c509e0 t radeon_invalid_wreg +ffffffff81c50a20 t radeon_invalid_get_allowed_info_register +ffffffff81c51000 T radeon_atombios_i2c_init +ffffffff81c513a0 T radeon_atombios_lookup_gpio +ffffffff81c514a0 T radeon_get_atom_connector_info_from_object_table +ffffffff81c51e00 t radeon_lookup_i2c_gpio +ffffffff81c52100 t radeon_atom_apply_quirks +ffffffff81c52530 T radeon_get_atom_connector_info_from_supported_devices_table +ffffffff81c52a30 T radeon_atom_get_clock_info +ffffffff81c52db0 T radeon_atombios_sideport_present +ffffffff81c52e60 T radeon_atombios_get_tmds_info +ffffffff81c52fa0 T radeon_atombios_get_ppll_ss_info +ffffffff81c530c0 T radeon_atombios_get_asic_ss_info +ffffffff81c53430 T radeon_atombios_get_lvds_info +ffffffff81c53790 T radeon_atombios_get_primary_dac_info +ffffffff81c53840 T radeon_atom_get_tv_timings +ffffffff81c53a80 T radeon_atombios_get_tv_info +ffffffff81c53b30 T radeon_atombios_get_tv_dac_info +ffffffff81c53c30 T radeon_atombios_get_default_voltages +ffffffff81c53cf0 T radeon_atombios_get_power_modes +ffffffff81c54dc0 T radeon_atom_get_clock_dividers +ffffffff81c550b0 T radeon_atom_get_memory_pll_dividers +ffffffff81c551f0 T radeon_atom_set_clock_gating +ffffffff81c55240 T radeon_atom_get_engine_clock +ffffffff81c55290 T radeon_atom_get_memory_clock +ffffffff81c552e0 T radeon_atom_set_engine_clock +ffffffff81c55330 T radeon_atom_set_memory_clock +ffffffff81c55380 T radeon_atom_set_engine_dram_timings +ffffffff81c553f0 T radeon_atom_update_memory_dll +ffffffff81c55440 T radeon_atom_set_ac_timing +ffffffff81c55490 T radeon_atom_set_voltage +ffffffff81c55560 T radeon_atom_get_max_vddc +ffffffff81c55630 T radeon_atom_get_leakage_vddc_based_on_leakage_idx +ffffffff81c55700 T radeon_atom_get_leakage_id_from_vbios +ffffffff81c557c0 T radeon_atom_get_leakage_vddc_based_on_leakage_params +ffffffff81c559d0 T radeon_atom_get_voltage_evv +ffffffff81c55a80 T radeon_atom_get_voltage_gpio_settings +ffffffff81c55b80 T radeon_atom_is_voltage_gpio +ffffffff81c55d10 T radeon_atom_get_svi2_info +ffffffff81c55df0 T radeon_atom_get_max_voltage +ffffffff81c55f80 T radeon_atom_get_min_voltage +ffffffff81c560c0 T radeon_atom_get_voltage_step +ffffffff81c561b0 T radeon_atom_round_to_true_voltage +ffffffff81c56320 T radeon_atom_get_voltage_table +ffffffff81c56590 T radeon_atom_get_memory_info +ffffffff81c56740 T radeon_atom_get_mclk_range_table +ffffffff81c56990 T radeon_atom_init_mc_reg_table +ffffffff81c56c00 T radeon_atom_initialize_bios_scratch_regs +ffffffff81c56cd0 T radeon_save_bios_scratch_regs +ffffffff81c56db0 T radeon_restore_bios_scratch_regs +ffffffff81c56e90 T radeon_atom_output_lock +ffffffff81c56f20 T radeon_atombios_connected_scratch_regs +ffffffff81c576a0 T radeon_atombios_encoder_crtc_scratch_regs +ffffffff81c577e0 T radeon_atombios_encoder_dpms_scratch_regs +ffffffff81c579f0 t radeon_atombios_parse_misc_flags_1_3 +ffffffff81c57be0 t radeon_atombios_add_pplib_thermal_controller +ffffffff81c57fe0 t radeon_atombios_parse_pplib_clock_info +ffffffff81c582f0 t radeon_atombios_parse_pplib_non_clock_info +ffffffff81c59000 T radeon_audio_init +ffffffff81c59280 T radeon_audio_endpoint_rreg +ffffffff81c592c0 T radeon_audio_endpoint_wreg +ffffffff81c59300 T radeon_audio_get_pin +ffffffff81c59350 T radeon_audio_detect +ffffffff81c59680 T radeon_audio_fini +ffffffff81c597b0 T radeon_audio_mode_set +ffffffff81c597f0 T radeon_audio_dpms +ffffffff81c59840 T radeon_audio_decode_dfs_div +ffffffff81c598a0 t radeon_audio_hdmi_mode_set +ffffffff81c59fd0 t radeon_audio_write_speaker_allocation +ffffffff81c5a080 t radeon_audio_write_sad_regs +ffffffff81c5a150 t radeon_audio_set_avi_packet +ffffffff81c5a290 t radeon_audio_dp_mode_set +ffffffff81c5a410 t radeon_audio_rreg +ffffffff81c5a460 t radeon_audio_wreg +ffffffff81c5b000 T radeon_benchmark +ffffffff81c5b940 t radeon_benchmark_move +ffffffff81c5be00 t radeon_bo_reserve +ffffffff81c5bf80 t radeon_bo_unreserve +ffffffff81c5d000 T radeon_get_bios +ffffffff81c5e000 t igp_read_bios_from_vram +ffffffff81c5e110 t radeon_read_bios +ffffffff81c5f000 T radeon_legacy_get_engine_clock +ffffffff81c5f0d0 T radeon_legacy_get_memory_clock +ffffffff81c5f1a0 T radeon_get_clock_info +ffffffff81c5f720 T radeon_legacy_set_engine_clock +ffffffff81c5fa70 T radeon_legacy_set_clock_gating +ffffffff81c61000 T radeon_combios_check_hardcoded_edid +ffffffff81c61100 T radeon_bios_get_hardcoded_edid +ffffffff81c61180 T radeon_combios_i2c_init +ffffffff81c61940 t combios_setup_i2c_bus +ffffffff81c61c40 T radeon_combios_get_clock_info +ffffffff81c61e30 T radeon_combios_sideport_present +ffffffff81c61eb0 T radeon_combios_get_primary_dac_info +ffffffff81c61ff0 T radeon_combios_get_tv_info +ffffffff81c620f0 T radeon_combios_get_tv_dac_info +ffffffff81c62390 T radeon_combios_get_lvds_info +ffffffff81c629e0 T radeon_legacy_get_tmds_info_from_table +ffffffff81c62ab0 T radeon_legacy_get_tmds_info_from_combios +ffffffff81c62cb0 T radeon_legacy_get_ext_tmds_info_from_table +ffffffff81c62ef0 T radeon_legacy_get_ext_tmds_info_from_combios +ffffffff81c63280 T radeon_get_legacy_connector_info_from_table +ffffffff81c65640 T radeon_get_legacy_connector_info_from_bios +ffffffff81c663d0 T radeon_combios_get_power_modes +ffffffff81c66c80 T radeon_external_tmds_setup +ffffffff81c66d40 T radeon_combios_external_tmds_setup +ffffffff81c672f0 T radeon_combios_asic_init +ffffffff81c67910 t combios_parse_mmio_table +ffffffff81c67b30 t combios_parse_pll_table +ffffffff81c67e00 T radeon_combios_initialize_bios_scratch_regs +ffffffff81c67e90 T radeon_combios_output_lock +ffffffff81c67ee0 T radeon_combios_connected_scratch_regs +ffffffff81c68240 T radeon_combios_encoder_crtc_scratch_regs +ffffffff81c68310 T radeon_combios_encoder_dpms_scratch_regs +ffffffff81c69000 T radeon_connector_hotplug +ffffffff81c69100 T radeon_get_monitor_bpc +ffffffff81c69530 T radeon_connector_edid +ffffffff81c695e0 T radeon_connector_encoder_get_dp_bridge_encoder_id +ffffffff81c69650 T radeon_connector_is_dp12_capable +ffffffff81c696f0 T radeon_add_atom_connector +ffffffff81c6a540 T radeon_add_legacy_connector +ffffffff81c6aa80 t radeon_dp_detect +ffffffff81c6ae40 t radeon_dvi_force +ffffffff81c6ae80 t radeon_connector_set_property +ffffffff81c6b6c0 t radeon_connector_unregister +ffffffff81c6b720 t radeon_connector_destroy +ffffffff81c6b790 t radeon_best_single_encoder +ffffffff81c6b810 t radeon_connector_get_edid +ffffffff81c6b970 t radeon_dp_get_modes +ffffffff81c6bca0 t radeon_dp_mode_valid +ffffffff81c6be60 t radeon_dvi_encoder +ffffffff81c6bf30 t radeon_fixup_lvds_native_mode +ffffffff81c6c060 t radeon_add_common_modes +ffffffff81c6c150 t radeon_fp_native_mode +ffffffff81c6c220 t radeon_lvds_set_property +ffffffff81c6c310 t radeon_vga_detect +ffffffff81c6c5c0 t radeon_connector_analog_encoder_conflict_solve +ffffffff81c6c7e0 t radeon_vga_get_modes +ffffffff81c6c8d0 t radeon_vga_mode_valid +ffffffff81c6c930 t radeon_dvi_detect +ffffffff81c6cfd0 t radeon_dvi_mode_valid +ffffffff81c6d160 t radeon_tv_detect +ffffffff81c6d3a0 t radeon_tv_get_modes +ffffffff81c6d470 t radeon_tv_mode_valid +ffffffff81c6d4c0 t radeon_lvds_detect +ffffffff81c6d660 t radeon_lvds_get_modes +ffffffff81c6d7c0 t radeon_lvds_mode_valid +ffffffff81c6e000 T radeon_cs_parser_init +ffffffff81c6e480 T radeon_cs_ioctl +ffffffff81c6efb0 t radeon_cs_parser_fini +ffffffff81c6f140 T radeon_cs_packet_parse +ffffffff81c6f2f0 T radeon_cs_packet_next_is_pkt3_nop +ffffffff81c6f340 T radeon_cs_dump_packet +ffffffff81c6f3c0 T radeon_cs_packet_next_reloc +ffffffff81c6f590 t cmp_size_smaller_first +ffffffff81c70000 T radeon_crtc_cursor_move +ffffffff81c70070 t radeon_lock_cursor +ffffffff81c70230 t radeon_cursor_move_locked +ffffffff81c70780 T radeon_crtc_cursor_set2 +ffffffff81c70a00 t radeon_hide_cursor +ffffffff81c70ac0 t radeon_bo_reserve +ffffffff81c70c40 t radeon_bo_unreserve +ffffffff81c70d20 t radeon_show_cursor +ffffffff81c70f70 T radeon_cursor_reset +ffffffff81c71000 T radeon_is_px +ffffffff81c71040 T radeon_program_register_sequence +ffffffff81c71170 T radeon_pci_config_reset +ffffffff81c711a0 T radeon_surface_init +ffffffff81c71360 T radeon_scratch_init +ffffffff81c713e0 T radeon_scratch_get +ffffffff81c71460 T radeon_scratch_free +ffffffff81c714b0 T radeon_doorbell_get +ffffffff81c71550 T radeon_doorbell_free +ffffffff81c71590 T radeon_wb_disable +ffffffff81c715c0 T radeon_wb_fini +ffffffff81c71650 t radeon_bo_reserve +ffffffff81c717d0 t radeon_bo_unreserve +ffffffff81c718b0 T radeon_wb_init +ffffffff81c71ba0 T radeon_vram_location +ffffffff81c71cd0 T radeon_gtt_location +ffffffff81c71e00 T radeon_device_is_virtual +ffffffff81c71e30 T radeon_card_posted +ffffffff81c72040 T radeon_update_bandwidth_info +ffffffff81c720c0 T radeon_boot_test_post_card +ffffffff81c72180 T radeon_dummy_page_init +ffffffff81c72230 T radeon_dummy_page_fini +ffffffff81c72290 T radeon_atombios_init +ffffffff81c72420 t cail_reg_read +ffffffff81c72480 t cail_reg_write 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radeon_crtc_scaling_mode_fixup +ffffffff81c772e0 T radeon_get_crtc_scanout_position +ffffffff81c77340 t radeon_user_framebuffer_create +ffffffff81c774e0 t radeon_crtc_gamma_set +ffffffff81c77520 t radeon_crtc_destroy +ffffffff81c77560 t radeon_crtc_set_config +ffffffff81c77620 t radeon_crtc_page_flip_target +ffffffff81c77ab0 t radeon_flip_work_func +ffffffff81c77cd0 t radeon_unpin_work_func +ffffffff81c77d50 t radeon_bo_reserve +ffffffff81c77ed0 t radeon_bo_unreserve +ffffffff81c78000 T radeon_dp_aux_transfer_native +ffffffff81c79000 T radeondrm_probe +ffffffff81c79060 T radeondrm_attach_kms +ffffffff81c797a0 T radeondrm_detach_kms +ffffffff81c79830 T radeondrm_activate_kms +ffffffff81c798e0 T radeondrm_wsioctl +ffffffff81c79990 T radeondrm_wsmmap +ffffffff81c799c0 T radeondrm_alloc_screen +ffffffff81c799e0 T radeondrm_free_screen +ffffffff81c799f0 T radeondrm_show_screen +ffffffff81c79ad0 T radeondrm_enter_ddb +ffffffff81c79b30 T radeondrm_doswitch +ffffffff81c79bc0 T radeondrm_setpal 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radeon_fence_get_timeline_name +ffffffff81c7e850 t radeon_fence_enable_signaling +ffffffff81c7ea60 t radeon_fence_is_signaled +ffffffff81c7eb20 t radeon_fence_default_wait +ffffffff81c7ecc0 t radeon_fence_any_seq_signaled +ffffffff81c7eec0 t radeon_fence_check_lockup +ffffffff81c7f110 t __delayed_work_tick +ffffffff81c7f130 t radeon_fence_check_signaled +ffffffff81c7f1c0 t radeon_fence_wait_cb +ffffffff81c80000 T radeon_gart_table_ram_alloc +ffffffff81c800c0 T radeon_gart_table_ram_free +ffffffff81c80120 T radeon_gart_table_vram_alloc +ffffffff81c80190 T radeon_gart_table_vram_pin +ffffffff81c802d0 t radeon_bo_reserve +ffffffff81c80450 t radeon_bo_unreserve +ffffffff81c80530 T radeon_gart_table_vram_unpin +ffffffff81c805b0 T radeon_gart_table_vram_free +ffffffff81c805f0 T radeon_gart_unbind +ffffffff81c80710 T radeon_gart_bind +ffffffff81c80860 T radeon_gart_init +ffffffff81c80990 T radeon_gart_fini +ffffffff81c81000 T radeon_gem_fault +ffffffff81c81180 T radeon_gem_vm_reference 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T radeon_irq_kms_disable_hpd +ffffffff81c87bd0 T radeon_irq_kms_set_irq_n_enabled +ffffffff81c87d40 t __delayed_work_tick +ffffffff81c88000 T radeon_info_ioctl +ffffffff81c88be0 T radeon_driver_lastclose_kms +ffffffff81c88bf0 T radeon_driver_open_kms +ffffffff81c88d20 t radeon_bo_reserve +ffffffff81c88ea0 T radeon_driver_postclose_kms +ffffffff81c890c0 T radeon_get_vblank_counter_kms +ffffffff81c89250 T radeon_enable_vblank_kms +ffffffff81c892f0 T radeon_disable_vblank_kms +ffffffff81c8a000 T radeon_crtc_set_base +ffffffff81c8a020 T radeon_crtc_do_set_base +ffffffff81c8a5c0 T radeon_crtc_set_base_atomic +ffffffff81c8a5e0 t radeon_bo_reserve +ffffffff81c8a760 t radeon_bo_unreserve +ffffffff81c8a840 T radeon_legacy_init_crtc +ffffffff81c8a880 t radeon_crtc_dpms +ffffffff81c8aa80 t radeon_crtc_prepare +ffffffff81c8aaf0 t radeon_crtc_commit +ffffffff81c8ab60 t radeon_crtc_mode_fixup +ffffffff81c8ab70 t radeon_crtc_mode_set +ffffffff81c8bfc0 t radeon_crtc_disable +ffffffff81c8d000 T radeon_legacy_get_backlight_level +ffffffff81c8d040 T radeon_legacy_set_backlight_level +ffffffff81c8d080 t radeon_legacy_lvds_update +ffffffff81c8d3e0 T radeon_legacy_backlight_init +ffffffff81c8d5b0 t radeon_legacy_backlight_get_brightness +ffffffff81c8d610 T radeon_add_legacy_encoder +ffffffff81c8d990 t radeon_legacy_backlight_update_status +ffffffff81c8da20 t radeon_lvds_enc_destroy +ffffffff81c8dab0 t radeon_legacy_lvds_dpms +ffffffff81c8db00 t radeon_legacy_mode_fixup +ffffffff81c8db70 t radeon_legacy_lvds_prepare +ffffffff81c8dbf0 t radeon_legacy_lvds_commit +ffffffff81c8dc70 t radeon_legacy_lvds_mode_set +ffffffff81c8de80 t radeon_legacy_encoder_disable +ffffffff81c8ded0 t radeon_legacy_tmds_int_dpms +ffffffff81c8df90 t radeon_legacy_tmds_int_prepare +ffffffff81c8e050 t radeon_legacy_tmds_int_commit +ffffffff81c8e120 t radeon_legacy_tmds_int_mode_set +ffffffff81c8e380 t radeon_legacy_primary_dac_dpms +ffffffff81c8e4b0 t radeon_legacy_primary_dac_prepare +ffffffff81c8e500 t radeon_legacy_primary_dac_commit +ffffffff81c8e550 t radeon_legacy_primary_dac_mode_set +ffffffff81c8e6f0 t radeon_legacy_primary_dac_detect +ffffffff81c8e8e0 t radeon_legacy_tv_dac_dpms +ffffffff81c8ead0 t radeon_legacy_tv_dac_prepare +ffffffff81c8eb20 t radeon_legacy_tv_dac_commit +ffffffff81c8eb70 t radeon_legacy_tv_dac_mode_set +ffffffff81c8ef10 t radeon_legacy_tv_dac_detect +ffffffff81c8fb30 t radeon_ext_tmds_enc_destroy +ffffffff81c8fb70 t radeon_legacy_tmds_ext_dpms +ffffffff81c8fc40 t radeon_legacy_tmds_ext_prepare +ffffffff81c8fd10 t radeon_legacy_tmds_ext_commit +ffffffff81c8fde0 t radeon_legacy_tmds_ext_mode_set +ffffffff81c90000 T radeon_legacy_tv_mode_set +ffffffff81c910a0 T radeon_legacy_tv_adjust_crtc_reg +ffffffff81c911b0 T radeon_legacy_tv_adjust_pll1 +ffffffff81c912a0 T radeon_legacy_tv_adjust_pll2 +ffffffff81c92000 T radeon_ttm_bo_is_radeon_bo +ffffffff81c92040 t radeon_ttm_bo_destroy +ffffffff81c92170 T radeon_ttm_placement_from_domain +ffffffff81c922e0 T radeon_bo_create +ffffffff81c924a0 T radeon_bo_kmap +ffffffff81c92580 T radeon_bo_check_tiling +ffffffff81c92650 T radeon_bo_kunmap +ffffffff81c926d0 T radeon_bo_ref +ffffffff81c92710 T radeon_bo_unref +ffffffff81c92760 T radeon_bo_pin_restricted +ffffffff81c92a90 T radeon_bo_pin +ffffffff81c92ab0 T radeon_bo_unpin +ffffffff81c92b20 T radeon_bo_evict_vram +ffffffff81c92b70 T radeon_bo_force_delete +ffffffff81c92ce0 T radeon_bo_init +ffffffff81c92dc0 T radeon_bo_fini +ffffffff81c92e00 T radeon_bo_list_validate +ffffffff81c930f0 T radeon_bo_get_surface_reg +ffffffff81c93390 T radeon_bo_set_tiling_flags +ffffffff81c936b0 T radeon_bo_get_tiling_flags +ffffffff81c936f0 T radeon_bo_move_notify +ffffffff81c937b0 T radeon_bo_fault_reserve_notify +ffffffff81c93ab0 T radeon_bo_fence +ffffffff81c94000 T radeon_pm_get_type_index +ffffffff81c94070 T radeon_pm_acpi_event_handler +ffffffff81c94150 t radeon_pm_update_profile +ffffffff81c94270 t radeon_pm_set_clocks +ffffffff81c94c10 T radeon_dpm_enable_uvd +ffffffff81c94cd0 T radeon_pm_compute_clocks +ffffffff81c95700 T radeon_dpm_enable_vce +ffffffff81c95760 T radeon_pm_suspend +ffffffff81c95860 T radeon_pm_resume +ffffffff81c95b40 T radeon_pm_init +ffffffff81c96230 T radeon_pm_late_init +ffffffff81c962e0 T radeon_pm_fini +ffffffff81c963f0 t radeon_dpm_thermal_work_handler +ffffffff81c964d0 t radeon_dynpm_idle_work_handler +ffffffff81c967c0 t __delayed_work_tick +ffffffff81c97000 T radeon_gem_prime_get_sg_table +ffffffff81c97020 T radeon_gem_prime_pin +ffffffff81c970a0 t radeon_bo_reserve +ffffffff81c97220 t radeon_bo_unreserve +ffffffff81c97300 T radeon_gem_prime_unpin +ffffffff81c97370 T radeon_gem_prime_export +ffffffff81c98000 T radeon_ring_supports_scratch_reg +ffffffff81c98030 T radeon_ring_free_size +ffffffff81c980d0 T radeon_ring_lockup_update +ffffffff81c98130 T radeon_ring_alloc +ffffffff81c982b0 T radeon_ring_lock +ffffffff81c98330 T radeon_ring_commit +ffffffff81c98430 T radeon_ring_unlock_commit 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radeon_vm_manager_init +ffffffff81ca8060 T radeon_vm_manager_fini +ffffffff81ca8180 T radeon_vm_get_bos +ffffffff81ca82b0 T radeon_vm_grab_id +ffffffff81ca8440 T radeon_vm_flush +ffffffff81ca85c0 T radeon_vm_fence +ffffffff81ca8670 T radeon_vm_bo_find +ffffffff81ca86d0 T radeon_vm_bo_add +ffffffff81ca87b0 T radeon_vm_bo_set_addr +ffffffff81ca8c10 t radeon_bo_unreserve +ffffffff81ca8cf0 t radeon_vm_clear_bo +ffffffff81ca8ee0 T radeon_vm_map_gart +ffffffff81ca8f20 T radeon_vm_update_page_directory +ffffffff81ca92c0 T radeon_vm_bo_update +ffffffff81ca99a0 T radeon_vm_clear_freed +ffffffff81ca9a80 T radeon_vm_clear_invalids +ffffffff81ca9b20 T radeon_vm_bo_rmv +ffffffff81ca9c00 T radeon_vm_bo_invalidate +ffffffff81ca9cb0 T radeon_vm_init +ffffffff81ca9f10 T radeon_vm_fini +ffffffff81caa1e0 t radeon_bo_reserve +ffffffff81caa360 t radeon_vm_frag_ptes +ffffffff81cab000 T rs400_gart_adjust_size +ffffffff81cab0c0 T rs400_gart_tlb_flush +ffffffff81cab140 T rs400_gart_init +ffffffff81cab230 T rs400_gart_enable +ffffffff81cab590 T rs400_gart_disable +ffffffff81cab5f0 T rs400_gart_fini +ffffffff81cab660 T rs400_gart_get_page_entry +ffffffff81cab6c0 T rs400_gart_set_page +ffffffff81cab6f0 T rs400_mc_wait_for_idle +ffffffff81cab780 T rs400_mc_rreg +ffffffff81cab810 T rs400_mc_wreg +ffffffff81cab890 T rs400_resume +ffffffff81cab9c0 t rs400_mc_program +ffffffff81cabac0 t rs400_startup +ffffffff81cabcb0 T rs400_suspend +ffffffff81cabd40 T rs400_fini +ffffffff81cabe30 T rs400_init +ffffffff81cad000 T avivo_wait_for_vblank +ffffffff81cad280 T rs600_page_flip +ffffffff81cad540 T rs600_page_flip_pending +ffffffff81cad5b0 T avivo_program_fmt +ffffffff81cad6d0 T rs600_pm_misc +ffffffff81cada10 T rs600_pm_prepare +ffffffff81cadb10 T rs600_pm_finish +ffffffff81cadc10 T rs600_hpd_sense +ffffffff81cadc70 T rs600_hpd_set_polarity +ffffffff81cadd20 T rs600_hpd_init +ffffffff81cade00 T rs600_hpd_fini +ffffffff81cadea0 T rs600_asic_reset +ffffffff81cae110 T rs600_gart_tlb_flush +ffffffff81cae1d0 T rs600_gart_get_page_entry +ffffffff81cae230 T rs600_gart_set_page +ffffffff81cae270 T rs600_irq_set +ffffffff81cae440 T rs600_irq_disable +ffffffff81cae4c0 t rs600_irq_ack +ffffffff81cae670 T rs600_irq_process +ffffffff81cae9e0 T rs600_get_vblank_counter +ffffffff81caea30 T rs600_mc_wait_for_idle +ffffffff81caeac0 T rs600_bandwidth_update +ffffffff81caebb0 T rs600_mc_rreg +ffffffff81caec30 T rs600_mc_wreg +ffffffff81caec90 T rs600_set_safe_registers +ffffffff81caecd0 T rs600_resume +ffffffff81caee00 t rs600_startup +ffffffff81caf640 T rs600_suspend +ffffffff81caf740 T rs600_fini +ffffffff81caf840 T rs600_init +ffffffff81cb0000 T rs690_mc_wait_for_idle +ffffffff81cb0090 T rs690_pm_info +ffffffff81cb0320 T rs690_line_buffer_adjust +ffffffff81cb0420 T rs690_bandwidth_update +ffffffff81cb0740 t rs690_crtc_bandwidth_compute +ffffffff81cb0b70 t rs690_compute_mode_priority +ffffffff81cb0ff0 T rs690_mc_rreg +ffffffff81cb1080 T rs690_mc_wreg +ffffffff81cb1100 T rs690_resume +ffffffff81cb11f0 t rs690_startup +ffffffff81cb14e0 T rs690_suspend +ffffffff81cb1540 T rs690_fini +ffffffff81cb15e0 T rs690_init +ffffffff81cb2000 T rs780_dpm_enable +ffffffff81cb2bd0 T rs780_dpm_disable +ffffffff81cb2cb0 T rs780_dpm_set_power_state +ffffffff81cb3090 t rs780_force_voltage +ffffffff81cb31d0 t rs780_enable_voltage_scaling +ffffffff81cb3380 T rs780_dpm_setup_asic +ffffffff81cb33b0 T rs780_dpm_display_configuration_changed +ffffffff81cb34f0 T rs780_dpm_init +ffffffff81cb3a50 T rs780_dpm_print_power_state +ffffffff81cb3ae0 T rs780_dpm_fini +ffffffff81cb3b70 T rs780_dpm_get_sclk +ffffffff81cb3bb0 T rs780_dpm_get_mclk +ffffffff81cb3be0 T rs780_dpm_debugfs_print_current_performance_level +ffffffff81cb3c10 T rs780_dpm_get_current_sclk +ffffffff81cb3c90 T rs780_dpm_get_current_mclk +ffffffff81cb3cc0 T rs780_dpm_force_performance_level +ffffffff81cb3ea0 t rs780_force_fbdiv +ffffffff81cb4000 T rv515_ring_start +ffffffff81cb4b30 T rv515_mc_wait_for_idle +ffffffff81cb4bc0 T rv515_vga_render_disable +ffffffff81cb4c10 T rv515_mc_rreg +ffffffff81cb4ca0 T rv515_mc_wreg +ffffffff81cb4d20 T rv515_debugfs +ffffffff81cb4d30 T rv515_mc_stop +ffffffff81cb52c0 T rv515_mc_resume +ffffffff81cb58c0 T rv515_clock_startup +ffffffff81cb5980 T rv515_resume +ffffffff81cb5bc0 t rv515_startup +ffffffff81cb60a0 T rv515_suspend +ffffffff81cb6100 T rv515_set_safe_registers +ffffffff81cb6140 T rv515_fini +ffffffff81cb61e0 T rv515_init +ffffffff81cb64d0 T atom_rv515_force_tv_scaler +ffffffff81cb9b70 T rv515_bandwidth_avivo_update +ffffffff81cb9d00 t rv515_crtc_bandwidth_compute +ffffffff81cba040 t rv515_compute_mode_priority +ffffffff81cba4f0 T rv515_bandwidth_update +ffffffff81cbb000 T rv6xx_dpm_enable +ffffffff81cbb7f0 t rv6xx_calculate_stepping_parameters +ffffffff81cbb9c0 t rv6xx_program_stepping_parameters_except_lowest_entry +ffffffff81cbbfb0 t rv6xx_program_stepping_parameters_lowest_entry +ffffffff81cbc090 T rv6xx_dpm_disable +ffffffff81cbc410 T rv6xx_dpm_set_power_state +ffffffff81cbce00 T rv6xx_setup_asic +ffffffff81cbcf40 T rv6xx_dpm_display_configuration_changed +ffffffff81cbcfc0 T rv6xx_dpm_init +ffffffff81cbd510 T rv6xx_dpm_print_power_state +ffffffff81cbd5c0 T rv6xx_dpm_debugfs_print_current_performance_level +ffffffff81cbd5f0 T rv6xx_dpm_get_current_sclk +ffffffff81cbd660 T rv6xx_dpm_get_current_mclk +ffffffff81cbd6d0 T rv6xx_dpm_fini +ffffffff81cbd760 T rv6xx_dpm_get_sclk +ffffffff81cbd7a0 T rv6xx_dpm_get_mclk +ffffffff81cbd7e0 T rv6xx_dpm_force_performance_level +ffffffff81cbd960 t rv6xx_generate_steps +ffffffff81cbdc70 t rv6xx_output_stepping +ffffffff81cbdd90 t rv6xx_program_mclk_stepping_entry +ffffffff81cbe000 t rv6xx_program_engine_spread_spectrum +ffffffff81cbe2e0 t rv6xx_step_sw_voltage +ffffffff81cbf000 T rv730_populate_sclk_value +ffffffff81cbf240 T rv730_populate_mclk_value +ffffffff81cbf460 T rv730_read_clock_registers +ffffffff81cbf580 T rv730_populate_smc_acpi_state +ffffffff81cbf730 T rv730_populate_smc_initial_state +ffffffff81cbf8e0 T rv730_program_memory_timing_parameters +ffffffff81cbfac0 T rv730_start_dpm +ffffffff81cbfb50 T rv730_stop_dpm +ffffffff81cbfc10 T rv730_program_dcodt +ffffffff81cbfce0 T rv730_get_odt_values +ffffffff81cc0000 T rv740_get_decoded_reference_divider +ffffffff81cc00a0 T rv740_get_dll_speed +ffffffff81cc01d0 T rv740_populate_sclk_value +ffffffff81cc03e0 T rv740_populate_mclk_value +ffffffff81cc0820 T rv740_read_clock_registers +ffffffff81cc0950 T rv740_populate_smc_acpi_state +ffffffff81cc0b80 T rv740_enable_mclk_spread_spectrum +ffffffff81cc0be0 T rv740_get_mclk_frequency_ratio +ffffffff81cc1000 T rv770_set_uvd_clocks +ffffffff81cc1570 T rv770_get_xclk +ffffffff81cc15d0 T rv770_page_flip +ffffffff81cc18e0 T rv770_page_flip_pending +ffffffff81cc1950 T rv770_get_temp +ffffffff81cc19b0 T rv770_pm_misc +ffffffff81cc1a80 T r700_cp_stop +ffffffff81cc1b00 T r700_cp_fini +ffffffff81cc1b80 T rv770_set_clk_bypass_mode +ffffffff81cc1ca0 T r700_vram_gtt_location +ffffffff81cc1e30 T rv770_resume +ffffffff81cc1ec0 t rv770_init_golden_registers +ffffffff81cc2050 t rv770_startup +ffffffff81cc4040 T rv770_suspend +ffffffff81cc4260 T rv770_init +ffffffff81cc4820 T rv770_fini +ffffffff81cc5000 T rv770_copy_dma +ffffffff81cc6000 T rv770_get_ps +ffffffff81cc6030 T rv770_get_pi +ffffffff81cc6060 T evergreen_get_pi +ffffffff81cc6090 T rv770_restore_cgcg +ffffffff81cc6100 T rv770_stop_dpm +ffffffff81cc61c0 T rv770_dpm_enabled +ffffffff81cc6200 T rv770_enable_thermal_protection +ffffffff81cc6260 T rv770_enable_acpi_pm +ffffffff81cc62b0 T rv770_get_seq_value +ffffffff81cc62e0 T rv770_write_smc_soft_register +ffffffff81cc6310 T rv770_populate_smc_t +ffffffff81cc64a0 T rv770_populate_smc_sp +ffffffff81cc6500 T rv770_map_clkf_to_ibias +ffffffff81cc6560 T rv770_populate_vddc_value +ffffffff81cc6600 T rv770_populate_mvdd_value +ffffffff81cc6650 T rv770_calculate_memory_refresh_rate +ffffffff81cc66c0 T rv770_enable_backbias +ffffffff81cc6720 T rv770_setup_bsp +ffffffff81cc6800 T rv770_program_git +ffffffff81cc6850 T rv770_program_tp +ffffffff81cc68d0 T rv770_program_tpp +ffffffff81cc6910 T rv770_program_sstp +ffffffff81cc6950 T rv770_program_engine_speed_parameters +ffffffff81cc69a0 T rv770_program_vc +ffffffff81cc69e0 T rv770_clear_vc +ffffffff81cc6a20 T rv770_upload_firmware +ffffffff81cc6a60 T rv770_populate_initial_mvdd_value +ffffffff81cc6ab0 T rv770_get_memory_module_index +ffffffff81cc6af0 T rv770_enable_voltage_control +ffffffff81cc6b50 T rv770_halt_smc +ffffffff81cc6bb0 T rv770_resume_smc +ffffffff81cc6c00 T rv770_set_sw_state +ffffffff81cc6c60 T rv770_set_boot_state +ffffffff81cc6cb0 T rv770_set_uvd_clock_before_set_eng_clock +ffffffff81cc6d10 T rv770_set_uvd_clock_after_set_eng_clock +ffffffff81cc6d80 T rv770_restrict_performance_levels_before_switch +ffffffff81cc6de0 T rv770_dpm_force_performance_level +ffffffff81cc6ea0 T r7xx_start_smc +ffffffff81cc6ec0 T r7xx_stop_smc +ffffffff81cc6ee0 T rv770_read_voltage_smio_registers +ffffffff81cc6f20 T rv770_reset_smio_status +ffffffff81cc6fd0 T rv770_get_memory_type +ffffffff81cc7020 T rv770_get_pcie_gen2_status +ffffffff81cc7090 T rv770_get_max_vddc +ffffffff81cc70f0 T rv770_program_response_times +ffffffff81cc7230 T rv770_enable_auto_throttle_source +ffffffff81cc73a0 T rv770_dpm_enable +ffffffff81cc8420 T rv770_dpm_late_enable +ffffffff81cc8550 T rv770_dpm_disable +ffffffff81cc88b0 T rv770_dpm_set_power_state +ffffffff81cc8ea0 T rv770_dpm_setup_asic +ffffffff81cc9200 T rv770_dpm_display_configuration_changed +ffffffff81cc9280 T rv7xx_parse_power_table +ffffffff81cc97c0 T rv770_get_engine_memory_ss +ffffffff81cc9850 T rv770_dpm_init +ffffffff81cc9a80 T rv770_dpm_print_power_state +ffffffff81cc9ba0 T rv770_dpm_debugfs_print_current_performance_level +ffffffff81cc9bd0 T rv770_dpm_get_current_sclk +ffffffff81cc9c30 T rv770_dpm_get_current_mclk +ffffffff81cc9c90 T rv770_dpm_fini +ffffffff81cc9d20 T rv770_dpm_get_sclk +ffffffff81cc9d60 T rv770_dpm_get_mclk +ffffffff81cc9da0 T rv770_dpm_vblank_too_short +ffffffff81cc9e00 t rv770_convert_power_level_to_smc +ffffffff81ccb000 T rv770_copy_bytes_to_smc +ffffffff81ccb230 T rv770_start_smc +ffffffff81ccb280 T rv770_reset_smc +ffffffff81ccb2d0 T rv770_stop_smc_clock +ffffffff81ccb320 T rv770_start_smc_clock +ffffffff81ccb370 T rv770_is_smc_running +ffffffff81ccb3b0 T rv770_send_msg_to_smc +ffffffff81ccb480 T rv770_wait_for_smc_inactive +ffffffff81ccb510 T rv770_load_smc_ucode +ffffffff81ccb690 T rv770_read_smc_sram_dword +ffffffff81ccb740 T rv770_write_smc_sram_dword +ffffffff81ccc000 T si_get_allowed_info_register +ffffffff81ccc090 T si_get_xclk +ffffffff81ccc100 T si_get_temp +ffffffff81ccc140 T si_mc_load_microcode +ffffffff81ccc410 T dce6_bandwidth_update +ffffffff81ccc810 t dce6_program_watermarks +ffffffff81ccd2c0 T si_fence_ring_emit +ffffffff81ccd730 T si_ring_ib_execute +ffffffff81ccdf00 T si_gpu_check_soft_reset +ffffffff81cce090 T si_asic_reset +ffffffff81cce4a0 t si_gpu_pci_config_reset +ffffffff81cce850 T si_gfx_is_lockup +ffffffff81cce8b0 T si_vram_gtt_location +ffffffff81cce950 T si_pcie_gart_tlb_flush +ffffffff81cce9a0 T si_ib_parse +ffffffff81ccf050 T si_vm_init +ffffffff81ccf090 T si_vm_fini +ffffffff81ccf0c0 T si_vm_flush +ffffffff81ccf7a0 T si_init_uvd_internal_cg +ffffffff81ccf7e0 T si_get_csb_size +ffffffff81ccf870 T si_get_csb_buffer +ffffffff81ccfa00 T si_rlc_reset +ffffffff81ccfa70 T si_irq_set +ffffffff81ccff70 t si_disable_interrupt_state +ffffffff81cd01f0 T si_irq_process +ffffffff81cd13f0 t si_irq_ack +ffffffff81cd19f0 T si_resume +ffffffff81cd1a80 t si_init_golden_registers +ffffffff81cd1c40 t si_startup +ffffffff81cd6470 T si_suspend +ffffffff81cd67f0 T si_init +ffffffff81cd7cc0 t si_cp_fini +ffffffff81cd7db0 t si_pcie_gart_fini +ffffffff81cd7eb0 T si_fini +ffffffff81cd8150 T si_get_gpu_clock_counter +ffffffff81cd8210 T si_set_uvd_clocks +ffffffff81cd8780 T si_set_vce_clocks +ffffffff81cd8cc0 t si_vce_send_vcepll_ctlreq +ffffffff81cd8f00 t dce6_latency_watermark +ffffffff81cd9130 t si_rlc_stop +ffffffff81cd92e0 t si_vm_reg_valid +ffffffff81cd9440 t si_vm_packet3_cp_dma_check +ffffffff81cd95c0 t si_update_cg +ffffffff81cd9b10 t si_enable_mgcg +ffffffff81cd9f30 t si_enable_cgcg +ffffffff81cdb000 T si_dma_is_lockup +ffffffff81cdb080 T si_dma_vm_copy_pages +ffffffff81cdb160 T si_dma_vm_write_pages +ffffffff81cdb2c0 T si_dma_vm_set_pages +ffffffff81cdb420 T si_dma_vm_flush +ffffffff81cdb8b0 T si_copy_dma +ffffffff81cdc000 T si_dpm_force_performance_level +ffffffff81cdc160 T si_get_ddr3_mclk_frequency_ratio +ffffffff81cdc1b0 T si_get_mclk_frequency_ratio +ffffffff81cdc230 T si_trim_voltage_table_to_fit_state_table +ffffffff81cdc330 T si_dpm_setup_asic +ffffffff81cdc4f0 T si_fan_ctrl_get_fan_speed_percent +ffffffff81cdc580 T si_fan_ctrl_set_fan_speed_percent +ffffffff81cdc630 T si_fan_ctrl_set_mode +ffffffff81cdc870 T si_fan_ctrl_get_mode +ffffffff81cdc8c0 T si_dpm_enable +ffffffff81ce1bc0 t si_populate_smc_tdp_limits +ffffffff81ce1dd0 T si_dpm_late_enable +ffffffff81ce1f20 T si_dpm_disable +ffffffff81ce2290 T si_dpm_pre_set_power_state +ffffffff81ce2e90 T si_dpm_set_power_state +ffffffff81ce4410 T si_dpm_post_set_power_state +ffffffff81ce4440 T si_dpm_display_configuration_changed +ffffffff81ce4520 T si_dpm_init +ffffffff81ce5fd0 T si_dpm_fini +ffffffff81ce6080 T si_dpm_debugfs_print_current_performance_level +ffffffff81ce60c0 T si_dpm_get_current_sclk +ffffffff81ce6130 T si_dpm_get_current_mclk +ffffffff81ce61a0 t si_get_std_voltage_value +ffffffff81ce62d0 t si_convert_power_level_to_smc +ffffffff81ce6b70 t si_calculate_sclk_params +ffffffff81ce6d90 t si_convert_mc_reg_table_to_smc +ffffffff81ce6ef0 t si_program_cac_config_registers +ffffffff81ce8000 T si_copy_bytes_to_smc +ffffffff81ce8250 T si_start_smc +ffffffff81ce8280 T si_reset_smc +ffffffff81ce82c0 T si_program_jump_on_start +ffffffff81ce82f0 T si_stop_smc_clock +ffffffff81ce8320 T si_start_smc_clock +ffffffff81ce8350 T si_is_smc_running +ffffffff81ce83b0 T si_send_msg_to_smc +ffffffff81ce8480 T si_wait_for_smc_inactive +ffffffff81ce8520 T si_load_smc_ucode +ffffffff81ce86c0 T si_read_smc_sram_dword +ffffffff81ce8790 T si_write_smc_sram_dword +ffffffff81ce9000 T sumo_get_pi +ffffffff81ce9030 T sumo_gfx_clockgating_initialize +ffffffff81ce9110 T sumo_program_vc +ffffffff81ce9150 T sumo_clear_vc +ffffffff81ce9190 T sumo_program_sstp +ffffffff81ce9210 T sumo_take_smu_control +ffffffff81ce9240 T sumo_get_sleep_divider_from_id +ffffffff81ce9270 T sumo_get_sleep_divider_id_from_clock +ffffffff81ce9320 T sumo_dpm_enable +ffffffff81ce99c0 T sumo_dpm_late_enable +ffffffff81ce9f80 T sumo_dpm_disable +ffffffff81cea2d0 T sumo_dpm_pre_set_power_state +ffffffff81cea780 T sumo_dpm_set_power_state +ffffffff81ceb2c0 T sumo_dpm_post_set_power_state +ffffffff81ceb360 T sumo_dpm_setup_asic +ffffffff81ceb460 T sumo_dpm_display_configuration_changed +ffffffff81ceb490 T sumo_convert_vid2_to_vid7 +ffffffff81ceb4f0 T sumo_construct_sclk_voltage_mapping_table +ffffffff81ceb5b0 T sumo_construct_vid_mapping_table +ffffffff81ceb730 T sumo_dpm_init +ffffffff81cebff0 T sumo_dpm_print_power_state +ffffffff81cec110 T sumo_dpm_debugfs_print_current_performance_level +ffffffff81cec140 T sumo_dpm_get_current_sclk +ffffffff81cec1b0 T sumo_dpm_get_current_mclk +ffffffff81cec1e0 T sumo_dpm_get_current_vddc +ffffffff81cec2b0 T sumo_dpm_fini +ffffffff81cec340 T sumo_dpm_get_sclk +ffffffff81cec390 T sumo_dpm_get_mclk +ffffffff81cec3c0 T sumo_dpm_force_performance_level +ffffffff81cec7e0 t sumo_power_level_enable +ffffffff81ceca10 t sumo_program_power_level +ffffffff81ced000 T sumo_initialize_m3_arb +ffffffff81ced2b0 T sumo_smu_notify_alt_vddnb_change +ffffffff81ced340 t sumo_send_msg_to_smu +ffffffff81ced4e0 T sumo_smu_pg_init +ffffffff81ced500 T sumo_enable_boost_timer +ffffffff81ced630 T sumo_set_tdp_limit +ffffffff81ced6b0 T sumo_boost_state_enable +ffffffff81ced6f0 T sumo_get_running_fw_version +ffffffff81cee000 T trinity_dpm_enable_bapm +ffffffff81cee070 T trinity_dpm_enable +ffffffff81cee510 T trinity_dpm_late_enable +ffffffff81ceea60 T trinity_dpm_disable +ffffffff81ceee70 T trinity_dpm_force_performance_level +ffffffff81ceef20 T trinity_dpm_pre_set_power_state +ffffffff81cef4e0 T trinity_dpm_set_power_state +ffffffff81cefa70 T trinity_dpm_post_set_power_state +ffffffff81cefb10 T trinity_dpm_setup_asic +ffffffff81cefb70 T trinity_dpm_display_configuration_changed +ffffffff81cefc00 T trinity_dpm_init +ffffffff81cf04f0 T trinity_dpm_print_power_state +ffffffff81cf0600 T trinity_dpm_debugfs_print_current_performance_level +ffffffff81cf0690 T trinity_dpm_get_current_sclk +ffffffff81cf06f0 T trinity_dpm_get_current_mclk +ffffffff81cf0720 T trinity_dpm_fini +ffffffff81cf07c0 T trinity_dpm_get_sclk +ffffffff81cf0810 T trinity_dpm_get_mclk +ffffffff81cf0840 t trinity_program_power_level +ffffffff81cf1000 T trinity_dpm_bapm_enable +ffffffff81cf1140 T trinity_dpm_config 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+ffffffff81cf5000 T uvd_v3_1_semaphore_emit +ffffffff81cf6000 T uvd_v4_2_resume +ffffffff81cf7000 T vce_v1_0_get_rptr +ffffffff81cf7090 T vce_v1_0_get_wptr +ffffffff81cf7120 T vce_v1_0_set_wptr +ffffffff81cf71b0 T vce_v1_0_enable_mgcg +ffffffff81cf7460 T vce_v1_0_load_fw +ffffffff81cf7620 T vce_v1_0_bo_size +ffffffff81cf7690 T vce_v1_0_resume +ffffffff81cf8000 T vce_v1_0_start +ffffffff81cf87c0 T vce_v1_0_init +ffffffff81cf9000 T vce_v2_0_enable_mgcg +ffffffff81cf9070 t vce_v2_0_set_dyn_cg +ffffffff81cf9260 T vce_v2_0_bo_size +ffffffff81cf92d0 T vce_v2_0_resume +ffffffff81cfa000 T aldebaran_reset_init +ffffffff81cfa0c0 t aldebaran_async_reset +ffffffff81cfa120 t aldebaran_get_reset_handler +ffffffff81cfa1d0 T aldebaran_reset_fini +ffffffff81cfa220 t aldebaran_mode2_prepare_hwcontext +ffffffff81cfa340 t aldebaran_mode2_perform_reset +ffffffff81cfa510 t aldebaran_mode2_restore_hwcontext +ffffffff81cfa9f0 t aldebaran_mode2_reset +ffffffff81cfb000 T aldebaran_reg_base_init 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amdgpu_amdkfd_resume_iommu +ffffffff81cff3c0 T amdgpu_amdkfd_resume +ffffffff81cff3f0 T amdgpu_amdkfd_pre_reset +ffffffff81cff420 T amdgpu_amdkfd_post_reset +ffffffff81cff450 T amdgpu_amdkfd_gpu_reset +ffffffff81cff4b0 T amdgpu_amdkfd_alloc_gtt_mem +ffffffff81cff760 t amdgpu_bo_reserve +ffffffff81cff8c0 t amdgpu_bo_unreserve +ffffffff81cff9a0 T amdgpu_amdkfd_free_gtt_mem +ffffffff81cffa10 T amdgpu_amdkfd_alloc_gws +ffffffff81cffaf0 T amdgpu_amdkfd_free_gws +ffffffff81cffb30 T amdgpu_amdkfd_get_fw_version +ffffffff81cffbe0 T amdgpu_amdkfd_get_local_mem_info +ffffffff81cffcb0 T amdgpu_amdkfd_get_gpu_clock_counter +ffffffff81cffcf0 T amdgpu_amdkfd_get_max_engine_clock_in_mhz +ffffffff81cffd70 T amdgpu_amdkfd_get_cu_info +ffffffff81cffeb0 T amdgpu_amdkfd_get_dmabuf_info +ffffffff81cffff0 T amdgpu_amdkfd_get_xgmi_hops_count +ffffffff81d00060 T amdgpu_amdkfd_get_xgmi_bandwidth_mbytes +ffffffff81d000f0 T amdgpu_amdkfd_get_pcie_bandwidth_mbytes +ffffffff81d00250 T amdgpu_amdkfd_submit_ib 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atom_op_sub +ffffffff81d02b90 t atom_op_setport +ffffffff81d02d10 t atom_op_setregblock +ffffffff81d02dd0 t atom_op_setfbbase +ffffffff81d02ea0 t atom_op_compare +ffffffff81d03090 t atom_op_switch +ffffffff81d032e0 t atom_op_jump +ffffffff81d03560 t atom_op_test +ffffffff81d03720 t atom_op_delay +ffffffff81d03800 t atom_op_calltable +ffffffff81d03940 t atom_op_repeat +ffffffff81d03970 t atom_op_clear +ffffffff81d03a70 t atom_op_nop +ffffffff81d03aa0 t atom_op_eot +ffffffff81d03ad0 t atom_op_mask +ffffffff81d03da0 t atom_op_postcard +ffffffff81d03e50 t atom_op_beep +ffffffff81d03e70 t atom_op_savereg +ffffffff81d03ea0 t atom_op_restorereg +ffffffff81d03ed0 t atom_op_setdatablock +ffffffff81d04010 t atom_op_xor +ffffffff81d041f0 t atom_op_shl +ffffffff81d04400 t atom_op_shr +ffffffff81d04610 t atom_op_debug +ffffffff81d046c0 t atom_op_processds +ffffffff81d04780 t atom_op_mul32 +ffffffff81d048e0 t atom_op_div32 +ffffffff81d04a70 t atom_put_dst +ffffffff81d04f40 t atom_get_src_int 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amdgpu_atombios_init +ffffffff81d07e00 t cail_reg_read +ffffffff81d07e20 t cail_reg_write +ffffffff81d07e40 t cail_mc_read +ffffffff81d07e70 t cail_mc_write +ffffffff81d07ea0 t cail_pll_read +ffffffff81d07ed0 t cail_pll_write +ffffffff81d07f00 T amdgpu_atombios_get_data_table +ffffffff81d08000 T amdgpu_atombios_crtc_overscan_setup +ffffffff81d08150 T amdgpu_atombios_crtc_scaler_setup +ffffffff81d081d0 T amdgpu_atombios_crtc_lock +ffffffff81d08230 T amdgpu_atombios_crtc_enable +ffffffff81d08290 T amdgpu_atombios_crtc_blank +ffffffff81d082f0 T amdgpu_atombios_crtc_powergate +ffffffff81d08360 T amdgpu_atombios_crtc_powergate_init +ffffffff81d083c0 T amdgpu_atombios_crtc_set_dtd_timing +ffffffff81d084d0 T amdgpu_atombios_crtc_set_disp_eng_pll +ffffffff81d085c0 T amdgpu_atombios_crtc_set_dce_clock +ffffffff81d086a0 T amdgpu_atombios_crtc_program_pll +ffffffff81d089b0 T amdgpu_atombios_crtc_prepare_pll +ffffffff81d08eb0 T amdgpu_atombios_crtc_set_pll +ffffffff81d0a000 T amdgpu_atombios_dp_aux_init +ffffffff81d0a090 t amdgpu_atombios_dp_aux_transfer +ffffffff81d0a200 T amdgpu_atombios_dp_get_sinktype +ffffffff81d0a260 T amdgpu_atombios_dp_get_dpcd +ffffffff81d0a410 T amdgpu_atombios_dp_get_panel_mode +ffffffff81d0a500 T amdgpu_atombios_dp_set_link_config +ffffffff81d0a580 t amdgpu_atombios_dp_get_dp_link_config +ffffffff81d0a700 T amdgpu_atombios_dp_mode_valid_helper +ffffffff81d0a780 T amdgpu_atombios_dp_needs_link_train +ffffffff81d0a7f0 T amdgpu_atombios_dp_set_rx_power_state +ffffffff81d0a870 T amdgpu_atombios_dp_link_train +ffffffff81d0adc0 t amdgpu_atombios_dp_process_aux_ch +ffffffff81d0af30 t amdgpu_atombios_dp_get_adjust_train +ffffffff81d0c000 T amdgpu_atombios_encoder_get_backlight_level_from_reg +ffffffff81d0c040 T amdgpu_atombios_encoder_set_backlight_level_to_reg +ffffffff81d0c090 T amdgpu_atombios_encoder_get_backlight_level +ffffffff81d0c0f0 T amdgpu_atombios_encoder_set_backlight_level +ffffffff81d0c200 T amdgpu_atombios_encoder_setup_dig_transmitter +ffffffff81d0cbd0 T amdgpu_atombios_encoder_init_backlight +ffffffff81d0cd60 t amdgpu_atombios_encoder_get_backlight_brightness +ffffffff81d0cdb0 T amdgpu_atombios_encoder_fini_backlight +ffffffff81d0ce40 T amdgpu_atombios_encoder_is_digital +ffffffff81d0ce90 T amdgpu_atombios_encoder_mode_fixup +ffffffff81d0cf70 T amdgpu_atombios_encoder_get_encoder_mode +ffffffff81d0d110 T amdgpu_atombios_encoder_setup_dig_encoder +ffffffff81d0d5d0 T amdgpu_atombios_encoder_set_edp_panel_power +ffffffff81d0d6d0 T amdgpu_atombios_encoder_dpms +ffffffff81d0d840 t amdgpu_atombios_encoder_setup_dig +ffffffff81d0dbb0 t amdgpu_atombios_encoder_setup_dvo +ffffffff81d0dd50 T amdgpu_atombios_encoder_set_crtc_source +ffffffff81d0e130 T amdgpu_atombios_encoder_init_dig +ffffffff81d0e1f0 t amdgpu_atombios_encoder_setup_external_encoder +ffffffff81d0e450 T amdgpu_atombios_encoder_dac_detect +ffffffff81d0e630 T amdgpu_atombios_encoder_dig_detect +ffffffff81d0e730 T amdgpu_atombios_encoder_setup_ext_encoder_ddc +ffffffff81d0e780 T amdgpu_atombios_encoder_set_bios_scratch_regs +ffffffff81d0ed20 T amdgpu_atombios_encoder_get_lcd_info +ffffffff81d0f080 T amdgpu_atombios_encoder_get_dig_info +ffffffff81d0f0f0 t amdgpu_atombios_encoder_update_backlight_status +ffffffff81d10000 T amdgpu_atombios_i2c_xfer +ffffffff81d103a0 T amdgpu_atombios_i2c_func +ffffffff81d103d0 T amdgpu_atombios_i2c_channel_trans +ffffffff81d11000 T amdgpu_atomfirmware_query_firmware_capability +ffffffff81d11090 T amdgpu_atomfirmware_gpu_virtualization_supported +ffffffff81d110c0 T amdgpu_atomfirmware_scratch_regs_init +ffffffff81d11130 T amdgpu_atomfirmware_allocate_fb_scratch +ffffffff81d11260 T amdgpu_atomfirmware_get_vram_info +ffffffff81d119c0 T amdgpu_atomfirmware_mem_ecc_supported +ffffffff81d11a70 T amdgpu_atomfirmware_sram_ecc_supported +ffffffff81d11aa0 T amdgpu_atomfirmware_dynamic_boot_config_supported +ffffffff81d11ad0 T amdgpu_atomfirmware_ras_rom_addr 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amdgpu_cgs_write_register +ffffffff81d160e0 t amdgpu_cgs_read_ind_register +ffffffff81d161c0 t amdgpu_cgs_write_ind_register +ffffffff81d16260 t amdgpu_cgs_get_firmware_info +ffffffff81d17000 T amdgpu_connector_hotplug +ffffffff81d170f0 T amdgpu_connector_get_monitor_bpc +ffffffff81d17380 T amdgpu_connector_edid +ffffffff81d17430 T amdgpu_connector_encoder_get_dp_bridge_encoder_id +ffffffff81d174a0 T amdgpu_connector_is_dp12_capable +ffffffff81d17530 T amdgpu_connector_add +ffffffff81d18140 t amdgpu_connector_dp_detect +ffffffff81d184b0 t amdgpu_connector_dvi_force +ffffffff81d184f0 t amdgpu_connector_set_property +ffffffff81d18a60 t amdgpu_connector_late_register +ffffffff81d18ac0 t amdgpu_connector_unregister +ffffffff81d18b20 t amdgpu_connector_destroy +ffffffff81d18b90 t amdgpu_connector_best_single_encoder +ffffffff81d18c10 t amdgpu_connector_dp_get_modes +ffffffff81d18f40 t amdgpu_connector_dp_mode_valid +ffffffff81d19060 t amdgpu_connector_dvi_encoder +ffffffff81d19130 t amdgpu_connector_get_edid +ffffffff81d192b0 t amdgpu_connector_fixup_lcd_native_mode +ffffffff81d193e0 t amdgpu_connector_add_common_modes +ffffffff81d194d0 t amdgpu_connector_lcd_native_mode +ffffffff81d195a0 t amdgpu_connector_set_lcd_property +ffffffff81d19690 t amdgpu_connector_vga_detect +ffffffff81d198e0 t amdgpu_connector_vga_get_modes +ffffffff81d199d0 t amdgpu_connector_vga_mode_valid +ffffffff81d19a20 t amdgpu_connector_dvi_detect +ffffffff81d19e20 t amdgpu_connector_dvi_mode_valid +ffffffff81d19ed0 t amdgpu_connector_lvds_detect +ffffffff81d1a040 t amdgpu_connector_lvds_get_modes +ffffffff81d1a1a0 t amdgpu_connector_lvds_mode_valid +ffffffff81d1b000 T amdgpu_cs_report_moved_bytes +ffffffff81d1b070 T amdgpu_cs_ioctl +ffffffff81d1ce40 t amdgpu_cs_parser_fini +ffffffff81d1cfd0 T amdgpu_cs_wait_ioctl +ffffffff81d1d110 T amdgpu_cs_fence_to_handle_ioctl +ffffffff81d1d2b0 t amdgpu_cs_get_fence +ffffffff81d1d360 T amdgpu_cs_wait_fences_ioctl +ffffffff81d1d650 T amdgpu_cs_find_mapping +ffffffff81d1d750 t amdgpu_cs_bo_validate +ffffffff81d1da60 t amdgpu_cs_list_validate +ffffffff81d1e000 T amdgpu_csa_vaddr +ffffffff81d1e050 T amdgpu_allocate_static_csa +ffffffff81d1e0f0 T amdgpu_free_static_csa +ffffffff81d1e100 T amdgpu_map_static_csa +ffffffff81d1f000 T amdgpu_ctx_priority_is_valid +ffffffff81d1f060 T amdgpu_ctx_get_entity +ffffffff81d1f370 T amdgpu_ctx_ioctl +ffffffff81d1fa60 T amdgpu_ctx_get +ffffffff81d1fae0 T amdgpu_ctx_put +ffffffff81d1fcf0 T amdgpu_ctx_add_fence +ffffffff81d1fe60 T amdgpu_ctx_get_fence +ffffffff81d1ff10 T amdgpu_ctx_priority_override +ffffffff81d200f0 T amdgpu_ctx_wait_prev_fence +ffffffff81d201a0 T amdgpu_ctx_mgr_init +ffffffff81d20240 T amdgpu_ctx_mgr_entity_flush +ffffffff81d20350 T amdgpu_ctx_mgr_entity_fini +ffffffff81d20600 T amdgpu_ctx_mgr_fini +ffffffff81d206b0 t amdgpu_ctx_fini +ffffffff81d20890 T amdgpu_ctx_mgr_usage +ffffffff81d20ae0 t amdgpu_ctx_set_stable_pstate +ffffffff81d21000 T amdgpu_debugfs_init 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amdgpu_device_indirect_wreg +ffffffff81d22ce0 T amdgpu_device_indirect_wreg64 +ffffffff81d22d70 T amdgpu_device_program_register_sequence +ffffffff81d22fb0 T amdgpu_device_pci_config_reset +ffffffff81d22fe0 T amdgpu_device_pci_reset +ffffffff81d23030 T amdgpu_device_wb_get +ffffffff81d230d0 T amdgpu_device_wb_free +ffffffff81d23110 T amdgpu_device_resize_fb_bar +ffffffff81d23140 T amdgpu_device_need_post +ffffffff81d23270 T amdgpu_device_should_use_aspm +ffffffff81d232c0 T amdgpu_device_ip_set_clockgating_state +ffffffff81d233b0 T amdgpu_device_ip_set_powergating_state +ffffffff81d234a0 T amdgpu_device_ip_get_clockgating_state +ffffffff81d23540 T amdgpu_device_ip_wait_for_idle +ffffffff81d235c0 T amdgpu_device_ip_is_idle +ffffffff81d23630 T amdgpu_device_ip_get_ip_block +ffffffff81d23690 T amdgpu_device_ip_block_version_cmp +ffffffff81d23710 T amdgpu_device_ip_block_add +ffffffff81d237c0 T amdgpu_device_set_cg_state +ffffffff81d238e0 T amdgpu_device_set_pg_state +ffffffff81d23a00 T amdgpu_device_ip_suspend +ffffffff81d23a90 t amdgpu_device_ip_suspend_phase1 +ffffffff81d23d40 t amdgpu_device_ip_suspend_phase2 +ffffffff81d23eb0 T amdgpu_device_asic_has_dc_support +ffffffff81d23f10 T amdgpu_device_has_dc_support +ffffffff81d23fa0 T amdgpu_device_init +ffffffff81d260c0 t amdgpu_invalid_rreg +ffffffff81d260f0 t amdgpu_invalid_wreg +ffffffff81d26120 t amdgpu_invalid_rreg64 +ffffffff81d26150 t amdgpu_invalid_wreg64 +ffffffff81d26180 t amdgpu_block_invalid_rreg +ffffffff81d261c0 t amdgpu_block_invalid_wreg +ffffffff81d26200 t amdgpu_device_delayed_init_work_handler +ffffffff81d26260 t amdgpu_device_delay_enable_gfx_off +ffffffff81d26330 t amdgpu_device_xgmi_reset_func +ffffffff81d26630 t amdgpu_device_ip_late_init +ffffffff81d26a60 T amdgpu_device_cache_pci_state +ffffffff81d26a90 T amdgpu_device_fini_hw +ffffffff81d26f40 t amdgpu_device_unmap_mmio +ffffffff81d27040 T amdgpu_device_fini_sw +ffffffff81d27420 T amdgpu_device_suspend +ffffffff81d275c0 T amdgpu_device_resume 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amdgpu_device_pcie_port_rreg +ffffffff81d2a0c0 T amdgpu_device_pcie_port_wreg +ffffffff81d2a380 T amdgpu_device_switch_gang +ffffffff81d2a410 T amdgpu_device_has_display_hardware +ffffffff81d2a470 t __delayed_work_tick +ffffffff81d2b000 T amdgpu_discovery_fini +ffffffff81d2b050 T amdgpu_discovery_get_ip_version +ffffffff81d2b170 T amdgpu_discovery_set_ip_blocks +ffffffff81d2d950 t amdgpu_discovery_set_psp_ip_blocks +ffffffff81d2da90 t amdgpu_discovery_set_ih_ip_blocks +ffffffff81d2dba0 t amdgpu_discovery_set_smu_ip_blocks +ffffffff81d2e000 T amdgpu_display_crtc_page_flip_target +ffffffff81d2e400 t amdgpu_display_flip_work_func +ffffffff81d2e650 t amdgpu_display_unpin_work_func +ffffffff81d2e6d0 t amdgpu_bo_reserve +ffffffff81d2e8e0 T amdgpu_display_supported_domains +ffffffff81d2e950 t amdgpu_bo_unreserve +ffffffff81d2ea30 T amdgpu_display_crtc_set_config +ffffffff81d2eae0 T amdgpu_display_print_display_setup +ffffffff81d2eef0 T amdgpu_display_ddc_probe +ffffffff81d2efb0 T amdgpu_lookup_format_info +ffffffff81d2f210 T amdgpu_display_user_framebuffer_create +ffffffff81d30040 T amdgpu_display_modeset_create_props +ffffffff81d30210 T amdgpu_display_update_priority +ffffffff81d30250 T amdgpu_display_crtc_scaling_mode_fixup +ffffffff81d304e0 T amdgpu_display_get_crtc_scanoutpos +ffffffff81d30700 T amdgpu_display_crtc_idx_to_irq_type +ffffffff81d30740 T amdgpu_crtc_get_scanout_position +ffffffff81d307a0 T amdgpu_display_suspend_helper +ffffffff81d30930 T amdgpu_display_resume_helper +ffffffff81d30a90 t __delayed_work_tick +ffffffff81d30ab0 t amdgpu_display_flip_callback +ffffffff81d30af0 t amdgpu_display_verify_plane +ffffffff81d31000 T amdgpu_gem_prime_export +ffffffff81d31080 T amdgpu_gem_prime_import +ffffffff81d31350 T amdgpu_dmabuf_is_xgmi_accessible +ffffffff81d32000 t amdgpu_drv_delayed_reset_work_handler +ffffffff81d32350 t __delayed_work_tick +ffffffff81d32370 T amdgpu_file_to_fpriv +ffffffff81d323c0 T amdgpu_probe +ffffffff81d32500 T amdgpu_attach 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amdgpu_gfx_me_queue_to_bit +ffffffff81d3d130 T amdgpu_gfx_bit_to_me_queue +ffffffff81d3d190 T amdgpu_gfx_is_me_queue_enabled +ffffffff81d3d1e0 T amdgpu_gfx_parse_disable_cu +ffffffff81d3d200 T amdgpu_gfx_is_high_priority_graphics_queue +ffffffff81d3d290 T amdgpu_gfx_is_high_priority_compute_queue +ffffffff81d3d2e0 T amdgpu_gfx_compute_queue_acquire +ffffffff81d3d410 T amdgpu_gfx_graphics_queue_acquire +ffffffff81d3d650 T amdgpu_gfx_kiq_init_ring +ffffffff81d3d840 T amdgpu_gfx_kiq_free_ring +ffffffff81d3d850 T amdgpu_gfx_kiq_fini +ffffffff81d3d870 T amdgpu_gfx_kiq_init +ffffffff81d3db70 T amdgpu_gfx_mqd_sw_init +ffffffff81d3dee0 T amdgpu_gfx_mqd_sw_fini +ffffffff81d3e020 T amdgpu_gfx_disable_kcq +ffffffff81d3e170 T amdgpu_queue_mask_bit_to_set_resource_bit +ffffffff81d3e1b0 T amdgpu_gfx_enable_kcq +ffffffff81d3e3f0 T amdgpu_gfx_off_ctrl +ffffffff81d3e5c0 T amdgpu_set_gfx_off_residency +ffffffff81d3e620 T amdgpu_get_gfx_off_residency +ffffffff81d3e680 T amdgpu_get_gfx_off_entrycount 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amdgpu_gmc_ras_fini +ffffffff81d40b50 T amdgpu_gmc_allocate_vm_inv_eng +ffffffff81d40c90 T amdgpu_gmc_tmz_set +ffffffff81d40d40 T amdgpu_gmc_noretry_set +ffffffff81d40db0 T amdgpu_gmc_set_vm_fault_masks +ffffffff81d40f70 T amdgpu_gmc_get_vbios_allocations +ffffffff81d410d0 T amdgpu_gmc_init_pdb0 +ffffffff81d41230 T amdgpu_gmc_vram_pa +ffffffff81d41280 T amdgpu_gmc_vram_mc2pa +ffffffff81d412c0 T amdgpu_gmc_vram_cpu_pa +ffffffff81d41310 T amdgpu_gmc_vram_checking +ffffffff81d42000 T amdgpu_gtt_mgr_has_gart_addr +ffffffff81d42030 T amdgpu_gtt_mgr_recover +ffffffff81d420b0 T amdgpu_gtt_mgr_init +ffffffff81d42230 T amdgpu_gtt_mgr_fini +ffffffff81d423b0 t amdgpu_gtt_mgr_new +ffffffff81d42530 t amdgpu_gtt_mgr_del +ffffffff81d425a0 t amdgpu_gtt_mgr_intersects +ffffffff81d425e0 t amdgpu_gtt_mgr_compatible +ffffffff81d42620 t amdgpu_gtt_mgr_debug +ffffffff81d43000 T amdgpu_bb_set_bits +ffffffff81d430c0 T amdgpu_bb_set_dir +ffffffff81d430f0 T amdgpu_bb_read_bits +ffffffff81d43180 T amdgpu_acquire_bus +ffffffff81d43350 T amdgpu_release_bus +ffffffff81d43410 T amdgpu_send_start +ffffffff81d43430 T amdgpu_send_stop +ffffffff81d43450 T amdgpu_initiate_xfer +ffffffff81d43470 T amdgpu_read_byte +ffffffff81d43490 T amdgpu_write_byte +ffffffff81d434b0 T amdgpu_i2c_create +ffffffff81d43660 T amdgpu_i2c_destroy +ffffffff81d436e0 T amdgpu_i2c_init +ffffffff81d43720 T amdgpu_i2c_fini +ffffffff81d437d0 T amdgpu_i2c_add +ffffffff81d43980 T amdgpu_i2c_lookup +ffffffff81d43b40 T amdgpu_i2c_router_select_ddc_port +ffffffff81d43d90 T amdgpu_i2c_router_select_cd_port +ffffffff81d44000 T amdgpu_ib_get +ffffffff81d440f0 T amdgpu_ib_free +ffffffff81d44100 T amdgpu_ib_schedule +ffffffff81d447e0 T amdgpu_ib_pool_init +ffffffff81d44900 T amdgpu_ib_pool_fini +ffffffff81d44970 T amdgpu_ib_ring_tests +ffffffff81d44b30 T amdgpu_debugfs_sa_init +ffffffff81d45000 T amdgpu_pasid_alloc +ffffffff81d45090 T amdgpu_pasid_free +ffffffff81d450b0 T amdgpu_pasid_free_delayed +ffffffff81d451b0 t amdgpu_pasid_free_cb +ffffffff81d451f0 T amdgpu_vmid_had_gpu_reset +ffffffff81d45230 T amdgpu_vmid_grab +ffffffff81d45930 T amdgpu_vmid_alloc_reserved +ffffffff81d45a10 T amdgpu_vmid_free_reserved +ffffffff81d45ab0 T amdgpu_vmid_reset +ffffffff81d45b30 T amdgpu_vmid_reset_all +ffffffff81d45cc0 T amdgpu_vmid_mgr_init +ffffffff81d45e50 T amdgpu_vmid_mgr_fini +ffffffff81d46000 T amdgpu_ih_ring_init +ffffffff81d461f0 T amdgpu_ih_ring_fini +ffffffff81d462a0 T amdgpu_ih_ring_write +ffffffff81d463d0 T amdgpu_ih_wait_on_checkpoint_process_ts +ffffffff81d46680 T amdgpu_ih_process +ffffffff81d46830 T amdgpu_ih_decode_iv_helper +ffffffff81d46900 T amdgpu_ih_decode_iv_ts_helper +ffffffff81d47000 T amdgpu_irq_disable_all +ffffffff81d47110 T amdgpu_irq_handler +ffffffff81d47180 T amdgpu_msi_ok +ffffffff81d471b0 T amdgpu_irq_init +ffffffff81d47300 t amdgpu_hotplug_work_func +ffffffff81d473b0 t amdgpu_irq_handle_ih1 +ffffffff81d473d0 t amdgpu_irq_handle_ih2 +ffffffff81d473f0 t amdgpu_irq_handle_ih_soft +ffffffff81d47410 T amdgpu_irq_fini_hw +ffffffff81d47490 T amdgpu_irq_fini_sw +ffffffff81d47560 T amdgpu_irq_add_id +ffffffff81d47660 T amdgpu_irq_dispatch +ffffffff81d477e0 T amdgpu_irq_delegate +ffffffff81d47820 T amdgpu_irq_update +ffffffff81d478d0 T amdgpu_irq_enabled +ffffffff81d47930 T amdgpu_irq_gpu_reset_resume_helper +ffffffff81d47ab0 T amdgpu_irq_get +ffffffff81d47ba0 T amdgpu_irq_put +ffffffff81d47c90 T amdgpu_irq_add_domain +ffffffff81d47cc0 T amdgpu_irq_remove_domain +ffffffff81d47ce0 T amdgpu_irq_create_mapping +ffffffff81d48000 T amdgpu_job_alloc +ffffffff81d480e0 T amdgpu_job_alloc_with_ib +ffffffff81d481f0 T amdgpu_job_set_resources +ffffffff81d482c0 T amdgpu_job_free_resources +ffffffff81d48380 T amdgpu_job_set_gang_leader +ffffffff81d48410 T amdgpu_job_free +ffffffff81d48510 T amdgpu_job_submit +ffffffff81d48620 T amdgpu_job_submit_direct +ffffffff81d486a0 T amdgpu_job_stop_all_jobs_on_sched +ffffffff81d48800 t amdgpu_job_dependency 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amdgpu_driver_release_kms +ffffffff81d4ca50 T amdgpu_get_vblank_counter_kms +ffffffff81d4cbe0 T amdgpu_enable_vblank_kms +ffffffff81d4cc20 T amdgpu_disable_vblank_kms +ffffffff81d4cc60 T amdgpu_debugfs_firmware_init +ffffffff81d4d000 T amdgpu_lsdma_wait_for +ffffffff81d4d0a0 T amdgpu_lsdma_copy_mem +ffffffff81d4d130 T amdgpu_lsdma_fill_mem +ffffffff81d4e000 T amdgpu_mca_query_correctable_error_count +ffffffff81d4e060 T amdgpu_mca_query_uncorrectable_error_count +ffffffff81d4e0c0 T amdgpu_mca_reset_error_count +ffffffff81d4e0e0 T amdgpu_mca_query_ras_error_count +ffffffff81d4f000 T amdgpu_mes_doorbell_process_slice +ffffffff81d4f030 T amdgpu_mes_alloc_process_doorbells +ffffffff81d4f080 T amdgpu_mes_free_process_doorbells +ffffffff81d4f0c0 T amdgpu_mes_get_doorbell_dw_offset_in_bar +ffffffff81d4f0f0 T amdgpu_mes_init +ffffffff81d4f4b0 T amdgpu_mes_fini +ffffffff81d4f520 T amdgpu_mes_create_process +ffffffff81d4f780 T amdgpu_mes_destroy_process +ffffffff81d4fa50 T amdgpu_mes_add_gang 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amdgpu_bo_user_destroy +ffffffff81d53180 t amdgpu_bo_vm_destroy +ffffffff81d53270 T amdgpu_bo_placement_from_domain +ffffffff81d53440 T amdgpu_bo_create_reserved +ffffffff81d53810 T amdgpu_bo_unref +ffffffff81d53860 T amdgpu_bo_create +ffffffff81d53d10 t amdgpu_bo_reserve +ffffffff81d53f20 T amdgpu_bo_pin +ffffffff81d53f40 T amdgpu_bo_gpu_offset +ffffffff81d54110 T amdgpu_bo_kmap +ffffffff81d541c0 T amdgpu_bo_unpin +ffffffff81d54260 t amdgpu_bo_unreserve +ffffffff81d54340 T amdgpu_bo_create_kernel +ffffffff81d543a0 T amdgpu_bo_create_kernel_at +ffffffff81d545c0 T amdgpu_bo_kunmap +ffffffff81d54600 T amdgpu_bo_free_kernel +ffffffff81d54730 T amdgpu_bo_support_uswc +ffffffff81d54760 T amdgpu_bo_create_user +ffffffff81d547c0 T amdgpu_bo_create_vm +ffffffff81d54860 T amdgpu_bo_add_to_shadow_list +ffffffff81d548e0 T amdgpu_bo_restore_shadow +ffffffff81d54970 T amdgpu_bo_kptr +ffffffff81d549a0 T amdgpu_bo_ref +ffffffff81d549e0 T amdgpu_bo_pin_restricted +ffffffff81d54d70 T amdgpu_bo_get_preferred_domain +ffffffff81d54dd0 T amdgpu_bo_init +ffffffff81d54ea0 T amdgpu_bo_fini +ffffffff81d54f20 T amdgpu_bo_set_tiling_flags +ffffffff81d54fb0 T amdgpu_bo_get_tiling_flags +ffffffff81d55020 T amdgpu_bo_set_metadata +ffffffff81d55160 T amdgpu_bo_get_metadata +ffffffff81d55230 T amdgpu_bo_move_notify +ffffffff81d552f0 T amdgpu_bo_get_memory +ffffffff81d55340 T amdgpu_bo_release_notify +ffffffff81d55620 T amdgpu_bo_fence +ffffffff81d55690 T amdgpu_bo_fault_reserve_notify +ffffffff81d55860 T amdgpu_bo_sync_wait_resv +ffffffff81d55900 T amdgpu_bo_sync_wait +ffffffff81d559a0 T amdgpu_bo_gpu_offset_no_check +ffffffff81d56000 T amdgpu_pll_compute +ffffffff81d56570 T amdgpu_pll_get_use_mask +ffffffff81d565e0 T amdgpu_pll_get_shared_dp_ppll +ffffffff81d56690 T amdgpu_pll_get_shared_nondp_ppll +ffffffff81d57000 T amdgpu_preempt_mgr_init +ffffffff81d57150 T amdgpu_preempt_mgr_fini +ffffffff81d572b0 t amdgpu_preempt_mgr_new +ffffffff81d57330 t amdgpu_preempt_mgr_del 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amdgpu_vm_sdma_update +ffffffff81d8c5e0 t amdgpu_vm_sdma_commit +ffffffff81d8d000 T amdgpu_vram_mgr_bo_visible_size +ffffffff81d8d110 T amdgpu_vram_mgr_reserve_range +ffffffff81d8d1f0 t amdgpu_vram_mgr_do_reserve +ffffffff81d8d370 T amdgpu_vram_mgr_query_page_status +ffffffff81d8d450 T amdgpu_vram_mgr_alloc_sgt +ffffffff81d8d4a0 T amdgpu_vram_mgr_free_sgt +ffffffff81d8d4c0 T amdgpu_vram_mgr_vis_usage +ffffffff81d8d4f0 T amdgpu_vram_mgr_init +ffffffff81d8d6c0 T amdgpu_vram_mgr_fini +ffffffff81d8d8d0 t amdgpu_vram_mgr_new +ffffffff81d8de60 t amdgpu_vram_mgr_del +ffffffff81d8df30 t amdgpu_vram_mgr_intersects +ffffffff81d8dfb0 t amdgpu_vram_mgr_compatible +ffffffff81d8e030 t amdgpu_vram_mgr_debug +ffffffff81d8f000 t amdgpu_xgmi_hive_release +ffffffff81d8f050 T amdgpu_get_xgmi_hive +ffffffff81d8f0a0 T amdgpu_put_xgmi_hive +ffffffff81d8f0f0 T amdgpu_xgmi_set_pstate +ffffffff81d8f140 T amdgpu_xgmi_update_topology +ffffffff81d8f1f0 T amdgpu_xgmi_get_hops_count +ffffffff81d8f260 T amdgpu_xgmi_get_num_links +ffffffff81d8f2d0 T amdgpu_xgmi_add_device +ffffffff81d8f4f0 T amdgpu_xgmi_remove_device +ffffffff81d8f630 T amdgpu_xgmi_get_relative_phy_addr +ffffffff81d8f670 t amdgpu_ras_error_inject_xgmi +ffffffff81d8f7e0 t amdgpu_xgmi_query_ras_error_count +ffffffff81d8fff0 t amdgpu_xgmi_reset_ras_error_count +ffffffff81d90310 t amdgpu_xgmi_ras_late_init +ffffffff81d91000 T arct_reg_base_init +ffffffff81d92000 T athub_v1_0_set_clockgating +ffffffff81d92210 T athub_v1_0_get_clockgating +ffffffff81d93000 T athub_v2_0_set_clockgating +ffffffff81d931e0 T athub_v2_0_get_clockgating +ffffffff81d94000 T athub_v2_1_set_clockgating +ffffffff81d941f0 T athub_v2_1_get_clockgating +ffffffff81d95000 T athub_v3_0_set_clockgating +ffffffff81d950d0 T athub_v3_0_get_clockgating +ffffffff81d95120 t athub_v3_0_get_cg_cntl +ffffffff81d951c0 t athub_v3_0_set_cg_cntl +ffffffff81d96000 t cz_ih_early_init +ffffffff81d96050 t cz_ih_sw_init +ffffffff81d960b0 t cz_ih_sw_fini +ffffffff81d960f0 t cz_ih_hw_init +ffffffff81d96310 t cz_ih_hw_fini +ffffffff81d963e0 t cz_ih_suspend +ffffffff81d964b0 t cz_ih_resume +ffffffff81d964f0 t cz_ih_is_idle +ffffffff81d96530 t cz_ih_wait_for_idle +ffffffff81d965c0 t cz_ih_soft_reset +ffffffff81d966a0 t cz_ih_set_clockgating_state +ffffffff81d966d0 t cz_ih_set_powergating_state +ffffffff81d96700 t cz_ih_get_wptr +ffffffff81d967f0 t cz_ih_decode_iv +ffffffff81d96860 t cz_ih_set_rptr +ffffffff81d97000 T dce_v10_0_disable_dce +ffffffff81d97170 t dce_v10_0_early_init +ffffffff81d97230 t dce_v10_0_sw_init +ffffffff81d976a0 t dce_v10_0_sw_fini +ffffffff81d977d0 t dce_v10_0_hw_init +ffffffff81d97b40 t dce_v10_0_hw_fini +ffffffff81d97cd0 t dce_v10_0_suspend +ffffffff81d97d30 t dce_v10_0_resume +ffffffff81d97da0 t dce_v10_0_is_idle +ffffffff81d97dd0 t dce_v10_0_wait_for_idle +ffffffff81d97e00 t dce_v10_0_check_soft_reset +ffffffff81d97e10 t dce_v10_0_soft_reset +ffffffff81d97ee0 t dce_v10_0_set_clockgating_state +ffffffff81d97f10 t dce_v10_0_set_powergating_state +ffffffff81d97f40 t dce_v10_0_audio_endpt_rreg +ffffffff81d97fd0 t dce_v10_0_audio_endpt_wreg +ffffffff81d98040 t dce_v10_0_bandwidth_update +ffffffff81d98aa0 t dce_v10_0_vblank_get_counter +ffffffff81d98af0 t dce_v10_0_hpd_sense +ffffffff81d98b50 t dce_v10_0_hpd_set_polarity +ffffffff81d98c20 t dce_v10_0_hpd_get_gpio_reg +ffffffff81d98c50 t dce_v10_0_page_flip +ffffffff81d98d40 t dce_v10_0_crtc_get_scanoutpos +ffffffff81d98de0 t dce_v10_0_encoder_add +ffffffff81d99010 t dce_v10_0_latency_watermark +ffffffff81d99230 t dce_v10_0_encoder_destroy +ffffffff81d99280 t dce_v10_0_encoder_prepare +ffffffff81d99480 t dce_v10_0_encoder_commit +ffffffff81d994b0 t dce_v10_0_encoder_mode_set +ffffffff81d9a350 t dce_v10_0_encoder_disable +ffffffff81d9a460 t dce_v10_0_ext_dpms +ffffffff81d9a490 t dce_v10_0_ext_prepare +ffffffff81d9a4c0 t dce_v10_0_ext_commit +ffffffff81d9a4f0 t dce_v10_0_ext_mode_set +ffffffff81d9a520 t dce_v10_0_ext_disable +ffffffff81d9a550 t dce_v10_0_set_crtc_irq_state +ffffffff81d9a630 t dce_v10_0_crtc_irq +ffffffff81d9a860 t dce_v10_0_set_crtc_vblank_interrupt_state +ffffffff81d9a930 t dce_v10_0_set_crtc_vline_interrupt_state +ffffffff81d9aa00 t dce_v10_0_set_pageflip_irq_state +ffffffff81d9aab0 t dce_v10_0_pageflip_irq +ffffffff81d9ac10 t dce_v10_0_set_hpd_irq_state +ffffffff81d9acd0 t dce_v10_0_hpd_irq +ffffffff81d9adf0 t dce_v10_0_crtc_cursor_set2 +ffffffff81d9b160 t dce_v10_0_crtc_cursor_move +ffffffff81d9b230 t dce_v10_0_crtc_gamma_set +ffffffff81d9b270 t dce_v10_0_crtc_destroy +ffffffff81d9b2a0 t amdgpu_bo_reserve +ffffffff81d9b4b0 t amdgpu_bo_unreserve +ffffffff81d9b590 t dce_v10_0_cursor_move_locked +ffffffff81d9b6e0 t dce_v10_0_crtc_load_lut +ffffffff81d9ba70 t dce_v10_0_crtc_dpms +ffffffff81d9bc40 t dce_v10_0_crtc_prepare +ffffffff81d9bc80 t dce_v10_0_crtc_commit +ffffffff81d9bcb0 t dce_v10_0_crtc_mode_fixup +ffffffff81d9be70 t dce_v10_0_crtc_mode_set +ffffffff81d9c050 t dce_v10_0_crtc_set_base +ffffffff81d9c070 t dce_v10_0_crtc_set_base_atomic +ffffffff81d9c090 t dce_v10_0_crtc_disable +ffffffff81d9c230 t dce_v10_0_crtc_do_set_base +ffffffff81d9c8e0 t dce_v10_0_is_display_hung +ffffffff81d9d000 T dce_v11_0_disable_dce +ffffffff81d9d160 t dce_v11_0_early_init +ffffffff81d9d2a0 t dce_v11_0_sw_init +ffffffff81d9d720 t dce_v11_0_sw_fini +ffffffff81d9d850 t dce_v11_0_hw_init +ffffffff81d9dc20 t dce_v11_0_hw_fini +ffffffff81d9ddb0 t dce_v11_0_suspend +ffffffff81d9de10 t dce_v11_0_resume +ffffffff81d9de80 t dce_v11_0_is_idle +ffffffff81d9deb0 t dce_v11_0_wait_for_idle +ffffffff81d9dee0 t dce_v11_0_soft_reset +ffffffff81d9e100 t dce_v11_0_set_clockgating_state +ffffffff81d9e130 t dce_v11_0_set_powergating_state +ffffffff81d9e160 t dce_v11_0_audio_endpt_rreg +ffffffff81d9e1f0 t dce_v11_0_audio_endpt_wreg +ffffffff81d9e260 t dce_v11_0_bandwidth_update +ffffffff81d9ecc0 t dce_v11_0_vblank_get_counter +ffffffff81d9ed10 t dce_v11_0_hpd_sense +ffffffff81d9ed70 t dce_v11_0_hpd_set_polarity +ffffffff81d9ee40 t dce_v11_0_hpd_get_gpio_reg +ffffffff81d9ee70 t dce_v11_0_page_flip +ffffffff81d9ef60 t dce_v11_0_crtc_get_scanoutpos +ffffffff81d9f000 t dce_v11_0_encoder_add +ffffffff81d9f230 t dce_v11_0_latency_watermark +ffffffff81d9f450 t dce_v11_0_encoder_destroy +ffffffff81d9f4a0 t dce_v11_0_encoder_prepare +ffffffff81d9f6a0 t dce_v11_0_encoder_commit +ffffffff81d9f6d0 t dce_v11_0_encoder_mode_set +ffffffff81da0570 t dce_v11_0_encoder_disable +ffffffff81da0680 t dce_v11_0_ext_dpms +ffffffff81da06b0 t dce_v11_0_ext_prepare +ffffffff81da06e0 t dce_v11_0_ext_commit +ffffffff81da0710 t dce_v11_0_ext_mode_set +ffffffff81da0740 t dce_v11_0_ext_disable +ffffffff81da0770 t dce_v11_0_set_crtc_irq_state +ffffffff81da0850 t dce_v11_0_crtc_irq +ffffffff81da0a70 t dce_v11_0_set_crtc_vblank_interrupt_state +ffffffff81da0b40 t dce_v11_0_set_crtc_vline_interrupt_state +ffffffff81da0c10 t dce_v11_0_set_pageflip_irq_state +ffffffff81da0cc0 t dce_v11_0_pageflip_irq +ffffffff81da0e20 t dce_v11_0_set_hpd_irq_state +ffffffff81da0ee0 t dce_v11_0_hpd_irq +ffffffff81da1000 t dce_v11_0_crtc_cursor_set2 +ffffffff81da1370 t dce_v11_0_crtc_cursor_move +ffffffff81da1440 t dce_v11_0_crtc_gamma_set +ffffffff81da1480 t dce_v11_0_crtc_destroy +ffffffff81da14b0 t amdgpu_bo_reserve +ffffffff81da16c0 t amdgpu_bo_unreserve +ffffffff81da17a0 t dce_v11_0_cursor_move_locked +ffffffff81da18f0 t dce_v11_0_crtc_load_lut +ffffffff81da1c60 t dce_v11_0_crtc_dpms +ffffffff81da1e30 t dce_v11_0_crtc_prepare +ffffffff81da1e70 t dce_v11_0_crtc_commit +ffffffff81da1ea0 t dce_v11_0_crtc_mode_fixup +ffffffff81da2110 t dce_v11_0_crtc_mode_set +ffffffff81da2370 t dce_v11_0_crtc_set_base +ffffffff81da2390 t dce_v11_0_crtc_set_base_atomic +ffffffff81da23b0 t dce_v11_0_crtc_disable +ffffffff81da2550 t dce_v11_0_crtc_do_set_base +ffffffff81da3000 t df_v1_7_sw_init +ffffffff81da3040 t df_v1_7_sw_fini +ffffffff81da3070 t df_v1_7_enable_broadcast_mode +ffffffff81da3190 t df_v1_7_get_fb_channel_number +ffffffff81da3210 t df_v1_7_get_hbm_channel_number +ffffffff81da3260 t df_v1_7_update_medium_grain_clock_gating +ffffffff81da33d0 t df_v1_7_get_clockgating_state +ffffffff81da3460 t df_v1_7_enable_ecc_force_par_wr_rmw +ffffffff81da4000 t df_v3_6_sw_init +ffffffff81da4140 t df_v3_6_sw_fini +ffffffff81da4170 t df_v3_6_enable_broadcast_mode +ffffffff81da4290 t df_v3_6_get_fb_channel_number +ffffffff81da4360 t df_v3_6_get_hbm_channel_number +ffffffff81da43b0 t df_v3_6_update_medium_grain_clock_gating +ffffffff81da4550 t df_v3_6_get_clockgating_state +ffffffff81da45e0 t df_v3_6_pmc_start +ffffffff81da4960 t df_v3_6_pmc_stop +ffffffff81da4bf0 t df_v3_6_pmc_get_count +ffffffff81da4d70 t df_v3_6_get_fica +ffffffff81da4e70 t df_v3_6_set_fica +ffffffff81da4f40 t df_v3_6_query_ras_poison_mode +ffffffff81da50b0 t df_v3_6_perfmon_arm_with_status +ffffffff81da6000 T dimgrey_cavefish_reg_base_init +ffffffff81da7000 T emu_soc_asic_init +ffffffff81da8000 t gfx_v10_0_early_init +ffffffff81da8420 t gfx_v10_0_late_init +ffffffff81da8490 t gfx_v10_0_sw_init +ffffffff81da9830 t gfx_v10_0_sw_fini +ffffffff81da9b60 t gfx_v10_0_hw_init +ffffffff81dac710 t gfx_v10_0_hw_fini +ffffffff81dac9f0 t gfx_v10_0_suspend +ffffffff81daca30 t gfx_v10_0_resume +ffffffff81daca40 t gfx_v10_0_is_idle +ffffffff81dacac0 t gfx_v10_0_wait_for_idle +ffffffff81dacba0 t gfx_v10_0_soft_reset +ffffffff81dacef0 t gfx_v10_0_set_clockgating_state +ffffffff81dad190 t gfx_v10_0_set_powergating_state +ffffffff81dad3b0 t gfx_v10_0_get_clockgating_state +ffffffff81dad4c0 t gfx10_kiq_set_resources +ffffffff81dad7f0 t gfx10_kiq_map_queues +ffffffff81dadb80 t gfx10_kiq_unmap_queues +ffffffff81dadf80 t gfx10_kiq_query_status +ffffffff81dae280 t gfx10_kiq_invalidate_tlbs +ffffffff81dae3a0 t gfx_v10_0_ring_get_rptr_compute +ffffffff81dae3d0 t gfx_v10_0_ring_get_wptr_compute +ffffffff81dae430 t gfx_v10_0_ring_set_wptr_compute +ffffffff81dae570 t gfx_v10_0_ring_emit_ib_compute +ffffffff81dae8c0 t gfx_v10_0_ring_emit_fence_kiq +ffffffff81daecf0 t gfx_v10_0_ring_test_ring +ffffffff81daef60 t gfx_v10_0_ring_test_ib +ffffffff81daf200 t gfx_v10_0_ring_emit_rreg +ffffffff81daf490 t gfx_v10_0_ring_emit_wreg +ffffffff81daf6c0 t gfx_v10_0_ring_emit_reg_wait +ffffffff81daf710 t gfx_v10_0_ring_emit_reg_write_reg_wait +ffffffff81daf7a0 t gfx_v10_0_wait_reg_mem +ffffffff81dafad0 t gfx_v10_0_ring_get_rptr_gfx +ffffffff81dafb00 t gfx_v10_0_ring_get_wptr_gfx +ffffffff81dafc10 t gfx_v10_0_ring_set_wptr_gfx +ffffffff81dafe20 t gfx_v10_0_ring_emit_ib_gfx +ffffffff81db04d0 t gfx_v10_0_ring_emit_fence +ffffffff81db08a0 t gfx_v10_0_ring_emit_pipeline_sync +ffffffff81db0900 t gfx_v10_0_ring_emit_vm_flush +ffffffff81db0ad0 t gfx_v10_0_ring_emit_hdp_flush +ffffffff81db0ba0 t gfx_v10_0_ring_emit_gds_switch +ffffffff81db0c80 t gfx_v10_0_ring_emit_init_cond_exec +ffffffff81db0eb0 t gfx_v10_0_ring_emit_patch_cond_exec +ffffffff81db0f70 t gfx_v10_0_ring_emit_sb +ffffffff81db1050 t gfx_v10_0_ring_emit_cntxcntl +ffffffff81db1530 t gfx_v10_0_ring_emit_frame_cntl +ffffffff81db1640 t gfx_v10_0_ring_soft_recovery +ffffffff81db16b0 t gfx_v10_0_ring_preempt_ib +ffffffff81db1820 t gfx_v10_0_emit_mem_sync +ffffffff81db1b60 t gfx_v10_0_write_data_to_reg +ffffffff81db1d70 t gfx_v10_0_set_eop_interrupt_state +ffffffff81db1e50 t gfx_v10_0_eop_irq +ffffffff81db2020 t gfx_v10_0_set_gfx_eop_interrupt_state +ffffffff81db21b0 t gfx_v10_0_set_compute_eop_interrupt_state +ffffffff81db2360 t gfx_v10_0_kiq_set_interrupt_state +ffffffff81db2630 t gfx_v10_0_kiq_irq +ffffffff81db26b0 t gfx_v10_0_set_priv_reg_fault_state +ffffffff81db27d0 t gfx_v10_0_priv_reg_irq +ffffffff81db2830 t gfx_v10_0_handle_priv_fault +ffffffff81db29c0 t gfx_v10_0_set_priv_inst_fault_state +ffffffff81db2ae0 t gfx_v10_0_priv_inst_irq +ffffffff81db2b40 t gfx_v10_0_is_rlc_enabled +ffffffff81db2bc0 t gfx_v10_0_set_safe_mode +ffffffff81db2e50 t gfx_v10_0_unset_safe_mode +ffffffff81db2f00 t gfx_v10_0_rlc_init +ffffffff81db2f70 t gfx_v10_0_get_csb_size +ffffffff81db2fc0 t gfx_v10_0_get_csb_buffer +ffffffff81db3140 t gfx_v10_0_rlc_resume +ffffffff81db3c40 t gfx_v10_0_rlc_stop +ffffffff81db3d10 t gfx_v10_0_rlc_reset +ffffffff81db3ea0 t gfx_v10_0_rlc_start +ffffffff81db4040 t gfx_v10_0_update_spm_vmid +ffffffff81db4170 t gfx_v10_0_wait_for_rlc_autoload_complete +ffffffff81db4d00 t gfx_v10_0_init_csb +ffffffff81db4fd0 t gfx_v10_0_is_rlcg_access_range +ffffffff81db5000 t gfx_v10_0_gfx_mqd_init +ffffffff81db53e0 t gfx_v10_0_compute_mqd_init +ffffffff81db5880 t amdgpu_bo_unreserve +ffffffff81db5960 t gfx_v10_0_get_gpu_clock_counter +ffffffff81db5e50 t gfx_v10_0_select_se_sh +ffffffff81db5ee0 t gfx_v10_0_read_wave_data +ffffffff81db6140 t gfx_v10_0_read_wave_vgprs +ffffffff81db6170 t gfx_v10_0_read_wave_sgprs +ffffffff81db61f0 t gfx_v10_0_select_me_pipe_q +ffffffff81db6210 t gfx_v10_0_init_spm_golden_registers +ffffffff81db6280 t gfx_v10_0_update_perfmon_mgcg +ffffffff81db63a0 t wave_read_ind +ffffffff81db6480 t wave_read_regs +ffffffff81db65e0 t gfx_v10_0_cp_resume +ffffffff81db9220 t gfx_v10_3_get_disabled_sa +ffffffff81db9330 t gfx_v10_0_get_rb_active_bitmap +ffffffff81db9450 t gfx_v10_0_get_wgp_active_bitmap_per_sh +ffffffff81db9560 t gfx_v10_0_enable_gui_idle_interrupt +ffffffff81db9670 t gfx_v10_0_cp_gfx_enable +ffffffff81db98b0 t gfx_v10_0_cp_compute_enable +ffffffff81db9a40 t amdgpu_bo_reserve +ffffffff81db9bc0 t gfx_v10_0_kiq_init_register +ffffffff81dbaa30 t gfx_v10_0_cp_gfx_switch_pipe +ffffffff81dbab30 t gfx_v10_0_cp_gfx_set_doorbell +ffffffff81dbae00 t gfx_v10_0_cp_gfx_start +ffffffff81dbb7e0 t gfx_v10_0_update_fine_grain_clock_gating +ffffffff81dbbb00 t gfx_v10_0_update_medium_grain_clock_gating +ffffffff81dbc220 t gfx_v10_0_update_3d_clock_gating +ffffffff81dbc5e0 t gfx_v10_0_update_coarse_grain_clock_gating +ffffffff81dbd000 t gfx_v11_0_early_init +ffffffff81dbd390 t gfx_v11_0_late_init +ffffffff81dbd400 t gfx_v11_0_sw_init +ffffffff81dbe300 t gfx_v11_0_sw_fini +ffffffff81dbe5d0 t gfx_v11_0_hw_init +ffffffff81dc2a40 t gfx_v11_0_hw_fini +ffffffff81dc2cb0 t gfx_v11_0_suspend +ffffffff81dc2cf0 t gfx_v11_0_resume +ffffffff81dc2d00 t gfx_v11_0_is_idle +ffffffff81dc2d80 t gfx_v11_0_wait_for_idle +ffffffff81dc2e60 t gfx_v11_0_check_soft_reset +ffffffff81dc2f90 t gfx_v11_0_soft_reset +ffffffff81dc3c70 t gfx_v11_0_set_clockgating_state +ffffffff81dc4850 t gfx_v11_0_set_powergating_state +ffffffff81dc4a40 t gfx_v11_0_get_clockgating_state +ffffffff81dc4c10 t gfx11_kiq_set_resources +ffffffff81dc4f40 t gfx11_kiq_map_queues +ffffffff81dc52d0 t gfx11_kiq_unmap_queues +ffffffff81dc56d0 t gfx11_kiq_query_status +ffffffff81dc59d0 t gfx11_kiq_invalidate_tlbs +ffffffff81dc5af0 t gfx_v11_0_ring_get_rptr_compute +ffffffff81dc5b20 t gfx_v11_0_ring_get_wptr_compute +ffffffff81dc5b80 t gfx_v11_0_ring_set_wptr_compute +ffffffff81dc5cc0 t gfx_v11_0_ring_emit_ib_compute +ffffffff81dc6010 t gfx_v11_0_ring_emit_fence_kiq +ffffffff81dc6440 t gfx_v11_0_ring_test_ring +ffffffff81dc66d0 t gfx_v11_0_ring_test_ib +ffffffff81dc6990 t gfx_v11_0_ring_emit_rreg +ffffffff81dc6c20 t gfx_v11_0_ring_emit_wreg +ffffffff81dc6e50 t gfx_v11_0_ring_emit_reg_wait +ffffffff81dc6ea0 t gfx_v11_0_ring_emit_reg_write_reg_wait +ffffffff81dc6f00 t gfx_v11_0_wait_reg_mem +ffffffff81dc7230 t gfx_v11_0_ring_get_rptr_gfx +ffffffff81dc7260 t gfx_v11_0_ring_get_wptr_gfx +ffffffff81dc7370 t gfx_v11_0_ring_set_wptr_gfx +ffffffff81dc7580 t gfx_v11_0_ring_emit_ib_gfx +ffffffff81dc7c20 t gfx_v11_0_ring_emit_fence +ffffffff81dc7ff0 t gfx_v11_0_ring_emit_pipeline_sync +ffffffff81dc8050 t gfx_v11_0_ring_emit_vm_flush +ffffffff81dc8220 t gfx_v11_0_ring_emit_hdp_flush +ffffffff81dc82f0 t gfx_v11_0_ring_emit_gds_switch +ffffffff81dc83d0 t gfx_v11_0_ring_emit_init_cond_exec +ffffffff81dc8600 t gfx_v11_0_ring_emit_patch_cond_exec +ffffffff81dc86c0 t gfx_v11_0_ring_emit_cntxcntl +ffffffff81dc8820 t gfx_v11_0_ring_emit_frame_cntl +ffffffff81dc8930 t gfx_v11_0_ring_soft_recovery +ffffffff81dc89a0 t gfx_v11_0_ring_preempt_ib +ffffffff81dc8b10 t gfx_v11_0_emit_mem_sync +ffffffff81dc8e50 t gfx_v11_0_write_data_to_reg +ffffffff81dc9060 t gfx_v11_0_set_eop_interrupt_state +ffffffff81dc90f0 t gfx_v11_0_eop_irq +ffffffff81dc92c0 t gfx_v11_0_set_gfx_eop_interrupt_state +ffffffff81dc9450 t gfx_v11_0_set_compute_eop_interrupt_state +ffffffff81dc95e0 t gfx_v11_0_set_priv_reg_fault_state +ffffffff81dc9700 t gfx_v11_0_priv_reg_irq +ffffffff81dc9760 t gfx_v11_0_handle_priv_fault +ffffffff81dc98f0 t gfx_v11_0_set_priv_inst_fault_state +ffffffff81dc9a10 t gfx_v11_0_priv_inst_irq +ffffffff81dc9a70 t gfx_v11_0_is_rlc_enabled +ffffffff81dc9af0 t gfx_v11_0_set_safe_mode +ffffffff81dc9c40 t gfx_v11_0_unset_safe_mode +ffffffff81dc9ca0 t gfx_v11_0_rlc_init +ffffffff81dc9d10 t gfx_v11_0_get_csb_size +ffffffff81dc9d60 t gfx_v11_0_get_csb_buffer +ffffffff81dc9ee0 t gfx_v11_0_rlc_resume +ffffffff81dcac00 t gfx_v11_0_rlc_stop +ffffffff81dcacd0 t gfx_v11_0_rlc_reset +ffffffff81dcae60 t gfx_v11_0_rlc_start +ffffffff81dcb000 t gfx_v11_0_update_spm_vmid +ffffffff81dcb100 t gfx_v11_0_init_csb +ffffffff81dcb280 t gfx_v11_0_gfx_mqd_init +ffffffff81dcb650 t gfx_v11_0_compute_mqd_init +ffffffff81dcbb70 t amdgpu_bo_unreserve +ffffffff81dcbc50 t gfx_v11_0_get_gpu_clock_counter +ffffffff81dcbd80 t gfx_v11_0_select_se_sh +ffffffff81dcbe10 t gfx_v11_0_read_wave_data +ffffffff81dcc050 t gfx_v11_0_read_wave_vgprs +ffffffff81dcc080 t gfx_v11_0_read_wave_sgprs +ffffffff81dcc100 t gfx_v11_0_select_me_pipe_q +ffffffff81dcc120 t gfx_v11_0_update_perf_clk +ffffffff81dcc250 t wave_read_ind +ffffffff81dcc330 t wave_read_regs +ffffffff81dcc490 t gfx_v11_0_disable_gpa_mode +ffffffff81dcc620 t gfx_v11_0_cp_resume +ffffffff81dd06c0 t gfx_v11_0_config_me_cache +ffffffff81dd0a60 t gfx_v11_0_config_pfp_cache +ffffffff81dd0e00 t gfx_v11_0_config_mec_cache +ffffffff81dd11a0 t gfx_v11_0_enable_gui_idle_interrupt +ffffffff81dd12b0 t gfx_v11_0_cp_compute_enable +ffffffff81dd1480 t gfx_v11_0_cp_gfx_enable +ffffffff81dd1670 t amdgpu_bo_reserve +ffffffff81dd17f0 t gfx_v11_0_kiq_init_register +ffffffff81dd2660 t gfx_v11_0_cp_gfx_switch_pipe +ffffffff81dd2740 t gfx_v11_0_cp_gfx_set_doorbell +ffffffff81dd2920 t gfx_v11_0_cp_gfx_start +ffffffff81dd4000 t gfx_v8_0_early_init +ffffffff81dd4310 t gfx_v8_0_late_init +ffffffff81dd4a10 t gfx_v8_0_sw_init +ffffffff81dd60e0 t gfx_v8_0_sw_fini +ffffffff81dd6390 t gfx_v8_0_hw_init +ffffffff81dd85c0 t gfx_v8_0_hw_fini +ffffffff81dd8ab0 t gfx_v8_0_suspend +ffffffff81dd8af0 t gfx_v8_0_resume +ffffffff81dd8b00 t gfx_v8_0_is_idle +ffffffff81dd8b70 t gfx_v8_0_wait_for_idle +ffffffff81dd8c10 t gfx_v8_0_check_soft_reset +ffffffff81dd8cf0 t gfx_v8_0_pre_soft_reset +ffffffff81dd8e70 t gfx_v8_0_soft_reset +ffffffff81dd9020 t gfx_v8_0_post_soft_reset +ffffffff81dd91d0 t gfx_v8_0_set_clockgating_state +ffffffff81dd9490 t gfx_v8_0_set_powergating_state +ffffffff81dd9840 t gfx_v8_0_get_clockgating_state +ffffffff81dd9920 t gfx_v8_0_get_gpu_clock_counter +ffffffff81dd99b0 t gfx_v8_0_select_se_sh +ffffffff81dd9a10 t gfx_v8_0_read_wave_data +ffffffff81dd9eb0 t gfx_v8_0_read_wave_sgprs +ffffffff81dd9f60 t gfx_v8_0_select_me_pipe_q +ffffffff81dd9f80 t gfx_v8_0_ring_get_rptr +ffffffff81dd9fb0 t gfx_v8_0_ring_get_wptr_compute +ffffffff81dd9fe0 t gfx_v8_0_ring_set_wptr_compute +ffffffff81dda010 t gfx_v8_0_ring_emit_fence_kiq +ffffffff81dda440 t gfx_v8_0_ring_test_ring +ffffffff81dda640 t gfx_v8_0_ring_emit_rreg +ffffffff81dda8d0 t gfx_v8_0_ring_emit_wreg +ffffffff81ddab00 t gfx_v8_0_ring_get_wptr_gfx +ffffffff81ddab50 t gfx_v8_0_ring_set_wptr_gfx +ffffffff81ddabc0 t gfx_v8_0_ring_emit_ib_gfx +ffffffff81ddb120 t gfx_v8_0_ring_emit_fence_gfx +ffffffff81ddb620 t gfx_v8_0_ring_emit_pipeline_sync +ffffffff81ddb910 t gfx_v8_0_ring_emit_vm_flush +ffffffff81ddbcc0 t gfx_v8_0_ring_emit_hdp_flush +ffffffff81ddbfe0 t gfx_v8_0_ring_emit_gds_switch +ffffffff81ddc7a0 t gfx_v8_0_ring_test_ib +ffffffff81ddc950 t gfx_v8_0_ring_emit_init_cond_exec +ffffffff81ddcb80 t gfx_v8_0_ring_emit_patch_cond_exec +ffffffff81ddcc30 t gfx_v8_ring_emit_sb +ffffffff81ddcd10 t gfx_v8_ring_emit_cntxcntl +ffffffff81ddd2b0 t gfx_v8_0_ring_soft_recovery +ffffffff81ddd2d0 t gfx_v8_0_emit_mem_sync +ffffffff81ddd4d0 t gfx_v8_0_ring_emit_ib_compute +ffffffff81ddd7d0 t gfx_v8_0_ring_emit_fence_compute +ffffffff81dddad0 t gfx_v8_0_emit_mem_sync_compute +ffffffff81dddd90 t gfx_v8_0_emit_wave_limit +ffffffff81dddf40 t gfx_v8_0_set_eop_interrupt_state +ffffffff81dde150 t gfx_v8_0_eop_irq +ffffffff81dde280 t gfx_v8_0_set_priv_reg_fault_state +ffffffff81dde2f0 t gfx_v8_0_priv_reg_irq +ffffffff81dde410 t gfx_v8_0_set_priv_inst_fault_state +ffffffff81dde480 t gfx_v8_0_priv_inst_irq +ffffffff81dde5a0 t gfx_v8_0_set_cp_ecc_int_state +ffffffff81dde810 t gfx_v8_0_cp_ecc_error_irq +ffffffff81dde850 t gfx_v8_0_set_sq_int_state +ffffffff81dde8d0 t gfx_v8_0_sq_irq +ffffffff81dde960 t gfx_v8_0_parse_sq_irq +ffffffff81ddebb0 t gfx_v8_0_is_rlc_enabled +ffffffff81ddebf0 t gfx_v8_0_set_safe_mode +ffffffff81ddece0 t gfx_v8_0_unset_safe_mode +ffffffff81dded80 t gfx_v8_0_rlc_init +ffffffff81ddee20 t gfx_v8_0_get_csb_size +ffffffff81ddee70 t gfx_v8_0_get_csb_buffer +ffffffff81ddeff0 t gfx_v8_0_cp_jump_table_num +ffffffff81ddf030 t gfx_v8_0_rlc_resume +ffffffff81ddf3b0 t gfx_v8_0_rlc_stop +ffffffff81ddf420 t gfx_v8_0_rlc_reset +ffffffff81ddf4a0 t gfx_v8_0_rlc_start +ffffffff81ddf520 t gfx_v8_0_update_spm_vmid +ffffffff81ddf590 t gfx_v8_0_init_save_restore_list +ffffffff81ddf9b0 t gfx_v8_0_wait_for_rlc_serdes +ffffffff81ddfbd0 t gfx_v8_0_sq_irq_work_func +ffffffff81ddfbf0 t amdgpu_bo_unreserve +ffffffff81ddfcd0 t gfx_v8_0_kiq_resume +ffffffff81ddff30 t gfx_v8_0_cp_gfx_resume +ffffffff81de0a50 t gfx_v8_0_kcq_resume +ffffffff81de1480 t amdgpu_bo_reserve +ffffffff81de1600 t gfx_v8_0_mqd_commit +ffffffff81de17e0 t gfx_v8_0_mqd_init +ffffffff81de1c00 t gfx_v8_0_deactivate_hqd +ffffffff81de1cc0 t gfx_v8_0_update_medium_grain_clock_gating +ffffffff81de1ff0 t gfx_v8_0_update_coarse_grain_clock_gating +ffffffff81de3000 t gfx_v9_0_ras_error_inject +ffffffff81de31a0 t gfx_v9_0_query_ras_error_count +ffffffff81de3d40 t gfx_v9_0_reset_ras_error_count +ffffffff81de4780 T gfx_v9_0_select_se_sh +ffffffff81de4820 t gfx_v9_0_early_init +ffffffff81de4c70 t gfx_v9_0_late_init +ffffffff81de5980 t gfx_v9_0_sw_init +ffffffff81de6fe0 t gfx_v9_0_sw_fini +ffffffff81de7280 t gfx_v9_0_hw_init +ffffffff81dea310 t gfx_v9_0_hw_fini +ffffffff81deaa70 t gfx_v9_0_suspend +ffffffff81deaab0 t gfx_v9_0_resume +ffffffff81deaac0 t gfx_v9_0_is_idle +ffffffff81deab40 t gfx_v9_0_wait_for_idle +ffffffff81deac20 t gfx_v9_0_soft_reset +ffffffff81deafa0 t gfx_v9_0_set_clockgating_state +ffffffff81deb060 t gfx_v9_0_set_powergating_state +ffffffff81deb450 t gfx_v9_0_get_clockgating_state +ffffffff81deb560 t gfx_v9_0_kiq_set_resources +ffffffff81deb890 t gfx_v9_0_kiq_map_queues +ffffffff81debbd0 t gfx_v9_0_kiq_unmap_queues +ffffffff81debf50 t gfx_v9_0_kiq_query_status +ffffffff81dec250 t gfx_v9_0_kiq_invalidate_tlbs +ffffffff81dec370 t gfx_v9_0_ring_get_rptr_compute +ffffffff81dec3a0 t gfx_v9_0_ring_get_wptr_compute +ffffffff81dec400 t gfx_v9_0_ring_set_wptr_compute +ffffffff81dec460 t gfx_v9_0_ring_emit_fence_kiq +ffffffff81dec890 t gfx_v9_0_ring_test_ring +ffffffff81decac0 t gfx_v9_0_ring_emit_rreg +ffffffff81decd50 t gfx_v9_0_ring_emit_wreg +ffffffff81decf80 t gfx_v9_0_ring_emit_reg_wait +ffffffff81decfd0 t gfx_v9_0_ring_emit_reg_write_reg_wait +ffffffff81ded070 t gfx_v9_0_wait_reg_mem +ffffffff81ded3a0 t gfx_v9_0_ring_get_rptr_gfx +ffffffff81ded3d0 t gfx_v9_0_ring_get_wptr_gfx +ffffffff81ded4e0 t gfx_v9_0_ring_set_wptr_gfx +ffffffff81ded600 t gfx_v9_0_ring_emit_ib_gfx +ffffffff81dedb20 t gfx_v9_0_ring_emit_fence +ffffffff81dedee0 t gfx_v9_0_ring_emit_pipeline_sync +ffffffff81dedf40 t gfx_v9_0_ring_emit_vm_flush +ffffffff81dee050 t gfx_v9_0_ring_emit_hdp_flush +ffffffff81dee120 t gfx_v9_0_ring_emit_gds_switch +ffffffff81dee200 t gfx_v9_0_ring_test_ib +ffffffff81dee3b0 t gfx_v9_0_ring_emit_init_cond_exec +ffffffff81dee5e0 t gfx_v9_0_ring_emit_patch_cond_exec +ffffffff81dee6b0 t gfx_v9_ring_emit_sb +ffffffff81dee790 t gfx_v9_ring_emit_cntxcntl +ffffffff81deeb80 t gfx_v9_0_ring_emit_frame_cntl +ffffffff81deec90 t gfx_v9_0_ring_soft_recovery +ffffffff81deed00 t gfx_v9_0_emit_mem_sync +ffffffff81deefc0 t gfx_v9_0_write_data_to_reg +ffffffff81def1d0 t gfx_v9_0_ring_emit_ib_compute +ffffffff81def500 t gfx_v9_0_emit_wave_limit +ffffffff81def6d0 t gfx_v9_0_set_eop_interrupt_state +ffffffff81def8a0 t gfx_v9_0_eop_irq +ffffffff81def9d0 t gfx_v9_0_set_compute_eop_interrupt_state +ffffffff81defb80 t gfx_v9_0_set_priv_reg_fault_state +ffffffff81defca0 t gfx_v9_0_priv_reg_irq +ffffffff81defdc0 t gfx_v9_0_set_priv_inst_fault_state +ffffffff81defee0 t gfx_v9_0_priv_inst_irq +ffffffff81df0000 t gfx_v9_0_set_cp_ecc_error_state +ffffffff81df0830 t gfx_v9_0_is_rlc_enabled +ffffffff81df08b0 t gfx_v9_0_set_safe_mode +ffffffff81df0a00 t gfx_v9_0_unset_safe_mode +ffffffff81df0a60 t gfx_v9_0_rlc_init +ffffffff81df1270 t gfx_v9_0_get_csb_size +ffffffff81df12c0 t gfx_v9_0_get_csb_buffer +ffffffff81df1410 t gfx_v9_0_cp_jump_table_num +ffffffff81df1460 t gfx_v9_0_rlc_resume +ffffffff81df21f0 t gfx_v9_0_rlc_stop +ffffffff81df2680 t gfx_v9_0_rlc_reset +ffffffff81df2810 t gfx_v9_0_rlc_start +ffffffff81df2950 t gfx_v9_0_update_spm_vmid +ffffffff81df2a80 t gfx_v9_0_is_rlcg_access_range +ffffffff81df2ad0 t gfx_v9_0_init_always_on_cu_mask +ffffffff81df2e30 t gfx_v9_0_init_csb +ffffffff81df2fc0 t gfx_v9_0_enable_lbpw +ffffffff81df30b0 t gfx_v9_0_enable_gui_idle_interrupt +ffffffff81df31b0 t amdgpu_bo_unreserve +ffffffff81df3290 t gfx_v9_0_get_gpu_clock_counter +ffffffff81df3a10 t gfx_v9_0_read_wave_data +ffffffff81df3c50 t gfx_v9_0_read_wave_vgprs +ffffffff81df3c70 t gfx_v9_0_read_wave_sgprs +ffffffff81df3cc0 t gfx_v9_0_select_me_pipe_q +ffffffff81df3ce0 t wave_read_ind +ffffffff81df3df0 t wave_read_regs +ffffffff81df3f60 t gfx_v9_0_cp_gfx_enable +ffffffff81df4040 t amdgpu_bo_reserve +ffffffff81df41c0 t gfx_v9_0_kiq_init_register +ffffffff81df4e40 t gfx_v9_0_mqd_init +ffffffff81df5380 t gfx_v9_0_update_medium_grain_clock_gating +ffffffff81df5890 t gfx_v9_0_update_3d_clock_gating +ffffffff81df5c70 t gfx_v9_0_update_coarse_grain_clock_gating +ffffffff81df6000 t gfx_v9_4_ras_error_inject +ffffffff81df6130 t gfx_v9_4_query_ras_error_count +ffffffff81df6ef0 t gfx_v9_4_query_ras_error_status +ffffffff81df70b0 t gfx_v9_4_reset_ras_error_count +ffffffff81df8000 T gfx_v9_4_2_do_edc_gpr_workarounds +ffffffff81df8790 T gfx_v9_4_2_init_golden_registers +ffffffff81df8820 T gfx_v9_4_2_debug_trap_config_init +ffffffff81df88c0 T gfx_v9_4_2_set_power_brake_sequence +ffffffff81df8a90 t gfx_v9_4_2_ras_error_inject +ffffffff81df8bc0 t gfx_v9_4_2_query_ras_error_count +ffffffff81df8c70 t gfx_v9_4_2_query_ras_error_status +ffffffff81df94b0 t gfx_v9_4_2_reset_ras_error_count +ffffffff81df9510 t gfx_v9_4_2_reset_ras_error_status +ffffffff81df99d0 t gfx_v9_4_2_enable_watchdog_timer +ffffffff81df9bf0 t gfx_v9_4_2_query_uctl2_poison_status +ffffffff81df9c70 t gfx_v9_4_2_run_shader +ffffffff81df9ff0 t gfx_v9_4_2_wait_for_waves_assigned +ffffffff81dfa630 t gfx_v9_4_2_query_sram_edc_count +ffffffff81dfa980 t gfx_v9_4_2_query_utc_edc_count +ffffffff81dfab60 t wave_read_ind +ffffffff81dfb000 t gfxhub_v1_0_get_mc_fb_offset +ffffffff81dfb080 t gfxhub_v1_0_setup_vm_pt_regs +ffffffff81dfb1b0 t gfxhub_v1_0_gart_enable +ffffffff81dfc690 t gfxhub_v1_0_gart_disable +ffffffff81dfc910 t gfxhub_v1_0_set_fault_enable_default +ffffffff81dfca00 t gfxhub_v1_0_init +ffffffff81dfd000 T gfxhub_v1_1_get_xgmi_info +ffffffff81dfe000 t gfxhub_v2_0_get_fb_location +ffffffff81dfe090 t gfxhub_v2_0_get_mc_fb_offset +ffffffff81dfe110 t gfxhub_v2_0_setup_vm_pt_regs +ffffffff81dfe240 t gfxhub_v2_0_gart_enable +ffffffff81dff440 t gfxhub_v2_0_gart_disable +ffffffff81dff670 t gfxhub_v2_0_set_fault_enable_default +ffffffff81dff760 t gfxhub_v2_0_init +ffffffff81dff820 t gfxhub_v2_0_print_l2_protection_fault_status +ffffffff81dffa00 t gfxhub_v2_0_get_invalidate_req +ffffffff81e00000 t gfxhub_v2_1_get_fb_location +ffffffff81e00090 t gfxhub_v2_1_get_mc_fb_offset +ffffffff81e00110 t gfxhub_v2_1_setup_vm_pt_regs +ffffffff81e00240 t gfxhub_v2_1_gart_enable +ffffffff81e01520 t gfxhub_v2_1_gart_disable +ffffffff81e017a0 t gfxhub_v2_1_set_fault_enable_default +ffffffff81e018b0 t gfxhub_v2_1_init +ffffffff81e01970 t gfxhub_v2_1_get_xgmi_info +ffffffff81e01aa0 t gfxhub_v2_1_utcl2_harvest +ffffffff81e01c70 t gfxhub_v2_1_save_regs +ffffffff81e026a0 t gfxhub_v2_1_restore_regs +ffffffff81e03270 t gfxhub_v2_1_halt +ffffffff81e03630 t gfxhub_v2_1_print_l2_protection_fault_status +ffffffff81e03810 t gfxhub_v2_1_get_invalidate_req +ffffffff81e04000 t gfxhub_v3_0_get_fb_location +ffffffff81e04090 t gfxhub_v3_0_get_mc_fb_offset +ffffffff81e04110 t gfxhub_v3_0_setup_vm_pt_regs +ffffffff81e04240 t gfxhub_v3_0_gart_enable +ffffffff81e054c0 t gfxhub_v3_0_gart_disable +ffffffff81e05740 t gfxhub_v3_0_set_fault_enable_default +ffffffff81e05ae0 t gfxhub_v3_0_init +ffffffff81e05ba0 t gfxhub_v3_0_print_l2_protection_fault_status +ffffffff81e05d80 t gfxhub_v3_0_get_invalidate_req +ffffffff81e06000 t gfxhub_v3_0_3_get_fb_location +ffffffff81e06090 t gfxhub_v3_0_3_get_mc_fb_offset +ffffffff81e06110 t gfxhub_v3_0_3_setup_vm_pt_regs +ffffffff81e06240 t gfxhub_v3_0_3_gart_enable +ffffffff81e074c0 t gfxhub_v3_0_3_gart_disable +ffffffff81e07760 t gfxhub_v3_0_3_set_fault_enable_default +ffffffff81e07870 t gfxhub_v3_0_3_init +ffffffff81e07930 t gfxhub_v3_0_3_print_l2_protection_fault_status +ffffffff81e07b10 t gfxhub_v3_0_3_get_invalidate_req +ffffffff81e08000 t gmc_v10_0_early_init +ffffffff81e081f0 t gmc_v10_0_late_init +ffffffff81e08260 t gmc_v10_0_sw_init +ffffffff81e08680 t gmc_v10_0_sw_fini +ffffffff81e086d0 t gmc_v10_0_hw_init +ffffffff81e08890 t gmc_v10_0_hw_fini +ffffffff81e08930 t gmc_v10_0_suspend +ffffffff81e089d0 t gmc_v10_0_resume +ffffffff81e08a20 t gmc_v10_0_is_idle +ffffffff81e08a50 t gmc_v10_0_wait_for_idle +ffffffff81e08a80 t gmc_v10_0_soft_reset +ffffffff81e08ab0 t gmc_v10_0_set_clockgating_state +ffffffff81e08b60 t gmc_v10_0_set_powergating_state +ffffffff81e08b90 t gmc_v10_0_get_clockgating_state +ffffffff81e08c30 t gmc_v10_0_flush_gpu_tlb +ffffffff81e08ed0 t gmc_v10_0_flush_gpu_tlb_pasid +ffffffff81e090f0 t gmc_v10_0_emit_flush_gpu_tlb +ffffffff81e092a0 t gmc_v10_0_emit_pasid_mapping +ffffffff81e09300 t gmc_v10_0_map_mtype +ffffffff81e09350 t gmc_v10_0_get_vm_pde +ffffffff81e09440 t gmc_v10_0_get_vm_pte +ffffffff81e094e0 t gmc_v10_0_get_vbios_fb_size +ffffffff81e09640 t gmc_v10_0_flush_vm_hub +ffffffff81e09aa0 t gmc_v10_0_vm_fault_interrupt_state +ffffffff81e09b10 t gmc_v10_0_process_interrupt +ffffffff81e09dd0 t gmc_v10_0_ecc_interrupt_state +ffffffff81e0a000 t gmc_v11_0_early_init +ffffffff81e0a220 t gmc_v11_0_late_init +ffffffff81e0a290 t gmc_v11_0_sw_init +ffffffff81e0a5b0 t gmc_v11_0_sw_fini +ffffffff81e0a600 t gmc_v11_0_hw_init +ffffffff81e0a740 t gmc_v11_0_hw_fini +ffffffff81e0a7d0 t gmc_v11_0_suspend +ffffffff81e0a860 t gmc_v11_0_resume +ffffffff81e0a8b0 t gmc_v11_0_is_idle +ffffffff81e0a8e0 t gmc_v11_0_wait_for_idle +ffffffff81e0a910 t gmc_v11_0_soft_reset +ffffffff81e0a940 t gmc_v11_0_set_clockgating_state +ffffffff81e0a9b0 t gmc_v11_0_set_powergating_state +ffffffff81e0a9e0 t gmc_v11_0_get_clockgating_state +ffffffff81e0aa10 t gmc_v11_0_flush_gpu_tlb +ffffffff81e0aee0 t gmc_v11_0_flush_gpu_tlb_pasid +ffffffff81e0b0d0 t gmc_v11_0_emit_flush_gpu_tlb +ffffffff81e0b270 t gmc_v11_0_emit_pasid_mapping +ffffffff81e0b2d0 t gmc_v11_0_map_mtype +ffffffff81e0b320 t gmc_v11_0_get_vm_pde +ffffffff81e0b410 t gmc_v11_0_get_vm_pte +ffffffff81e0b4b0 t gmc_v11_0_get_vbios_fb_size +ffffffff81e0b4e0 t gmc_v11_0_vm_fault_interrupt_state +ffffffff81e0b550 t gmc_v11_0_process_interrupt +ffffffff81e0b770 t gmc_v11_0_ecc_interrupt_state +ffffffff81e0c000 t gmc_v7_0_early_init +ffffffff81e0c090 t gmc_v7_0_late_init +ffffffff81e0c0d0 t gmc_v7_0_sw_init +ffffffff81e0c5d0 t gmc_v7_0_sw_fini +ffffffff81e0c680 t gmc_v7_0_hw_init +ffffffff81e0d030 t gmc_v7_0_hw_fini +ffffffff81e0d0f0 t gmc_v7_0_suspend +ffffffff81e0d130 t gmc_v7_0_resume +ffffffff81e0d180 t gmc_v7_0_is_idle +ffffffff81e0d1c0 t gmc_v7_0_wait_for_idle +ffffffff81e0d250 t gmc_v7_0_soft_reset +ffffffff81e0d4b0 t gmc_v7_0_set_clockgating_state +ffffffff81e0d710 t gmc_v7_0_set_powergating_state +ffffffff81e0d740 t gmc_v7_0_flush_gpu_tlb +ffffffff81e0d760 t gmc_v7_0_flush_gpu_tlb_pasid +ffffffff81e0d820 t gmc_v7_0_emit_flush_gpu_tlb +ffffffff81e0d8b0 t gmc_v7_0_emit_pasid_mapping +ffffffff81e0d8d0 t gmc_v7_0_set_prt +ffffffff81e0da80 t gmc_v7_0_get_vm_pde +ffffffff81e0dae0 t gmc_v7_0_get_vm_pte +ffffffff81e0db20 t gmc_v7_0_get_vbios_fb_size +ffffffff81e0db90 t gmc_v7_0_vm_fault_interrupt_state +ffffffff81e0dc60 t gmc_v7_0_process_interrupt +ffffffff81e0e000 t gmc_v8_0_early_init +ffffffff81e0e090 t gmc_v8_0_late_init +ffffffff81e0e0d0 t gmc_v8_0_sw_init +ffffffff81e0e750 t gmc_v8_0_sw_fini +ffffffff81e0e800 t gmc_v8_0_hw_init +ffffffff81e0f4b0 t gmc_v8_0_hw_fini +ffffffff81e0f570 t gmc_v8_0_suspend +ffffffff81e0f5b0 t gmc_v8_0_resume +ffffffff81e0f600 t gmc_v8_0_is_idle +ffffffff81e0f640 t gmc_v8_0_wait_for_idle +ffffffff81e0f6d0 t gmc_v8_0_check_soft_reset +ffffffff81e0f740 t gmc_v8_0_pre_soft_reset +ffffffff81e0f8b0 t gmc_v8_0_soft_reset +ffffffff81e0f970 t gmc_v8_0_post_soft_reset +ffffffff81e0f9e0 t gmc_v8_0_set_clockgating_state +ffffffff81e0ff90 t gmc_v8_0_set_powergating_state +ffffffff81e0ffc0 t gmc_v8_0_get_clockgating_state +ffffffff81e10030 t gmc_v8_0_flush_gpu_tlb +ffffffff81e10050 t gmc_v8_0_flush_gpu_tlb_pasid +ffffffff81e10110 t gmc_v8_0_emit_flush_gpu_tlb +ffffffff81e101a0 t gmc_v8_0_emit_pasid_mapping +ffffffff81e101c0 t gmc_v8_0_set_prt +ffffffff81e10370 t gmc_v8_0_get_vm_pde +ffffffff81e103d0 t gmc_v8_0_get_vm_pte +ffffffff81e10420 t gmc_v8_0_get_vbios_fb_size +ffffffff81e10490 t gmc_v8_0_vm_fault_interrupt_state +ffffffff81e10560 t gmc_v8_0_process_interrupt +ffffffff81e11000 T gmc_v9_0_restore_registers +ffffffff81e11150 t gmc_v9_0_early_init +ffffffff81e11500 t gmc_v9_0_late_init +ffffffff81e11600 t gmc_v9_0_sw_init +ffffffff81e11cb0 t gmc_v9_0_sw_fini +ffffffff81e11d20 t gmc_v9_0_hw_init +ffffffff81e12110 t gmc_v9_0_hw_fini +ffffffff81e121d0 t gmc_v9_0_suspend +ffffffff81e12290 t gmc_v9_0_resume +ffffffff81e122e0 t gmc_v9_0_is_idle +ffffffff81e12310 t gmc_v9_0_wait_for_idle +ffffffff81e12340 t gmc_v9_0_soft_reset +ffffffff81e12370 t gmc_v9_0_set_clockgating_state +ffffffff81e123d0 t gmc_v9_0_set_powergating_state +ffffffff81e12400 t gmc_v9_0_get_clockgating_state +ffffffff81e12430 t gmc_v9_0_flush_gpu_tlb +ffffffff81e12a70 t gmc_v9_0_flush_gpu_tlb_pasid +ffffffff81e12d40 t gmc_v9_0_emit_flush_gpu_tlb +ffffffff81e12f10 t gmc_v9_0_emit_pasid_mapping +ffffffff81e12f80 t gmc_v9_0_map_mtype +ffffffff81e12fc0 t gmc_v9_0_get_vm_pde +ffffffff81e130c0 t gmc_v9_0_get_vm_pte +ffffffff81e13190 t gmc_v9_0_get_vbios_fb_size +ffffffff81e13320 t gmc_v9_0_vm_fault_interrupt_state +ffffffff81e136a0 t gmc_v9_0_process_interrupt +ffffffff81e13ce0 t gmc_v9_0_ecc_interrupt_state +ffffffff81e14000 t hdp_v4_0_query_ras_error_count +ffffffff81e140b0 t hdp_v4_0_reset_ras_error_count +ffffffff81e141c0 t hdp_v4_0_flush_hdp +ffffffff81e14210 t hdp_v4_0_invalidate_hdp +ffffffff81e142d0 t hdp_v4_0_update_clock_gating +ffffffff81e143d0 t hdp_v4_0_get_clockgating_state +ffffffff81e14420 t hdp_v4_0_init_registers +ffffffff81e15000 t hdp_v5_0_flush_hdp +ffffffff81e15050 t hdp_v5_0_invalidate_hdp +ffffffff81e150f0 t hdp_v5_0_update_clock_gating +ffffffff81e154e0 t hdp_v5_0_get_clockgating_state +ffffffff81e15600 t hdp_v5_0_init_registers +ffffffff81e16000 t hdp_v5_2_flush_hdp +ffffffff81e16050 t hdp_v5_2_update_clock_gating +ffffffff81e16440 t hdp_v5_2_get_clockgating_state +ffffffff81e17000 t hdp_v6_0_flush_hdp +ffffffff81e17050 t hdp_v6_0_update_clock_gating +ffffffff81e17360 t hdp_v6_0_get_clockgating_state +ffffffff81e18000 t iceland_ih_early_init +ffffffff81e18050 t iceland_ih_sw_init +ffffffff81e180b0 t iceland_ih_sw_fini +ffffffff81e180f0 t iceland_ih_hw_init +ffffffff81e18310 t iceland_ih_hw_fini +ffffffff81e183e0 t iceland_ih_suspend +ffffffff81e184b0 t iceland_ih_resume +ffffffff81e184f0 t iceland_ih_is_idle +ffffffff81e18530 t iceland_ih_wait_for_idle +ffffffff81e185c0 t iceland_ih_soft_reset +ffffffff81e186a0 t iceland_ih_set_clockgating_state +ffffffff81e186d0 t iceland_ih_set_powergating_state +ffffffff81e18700 t iceland_ih_get_wptr +ffffffff81e187f0 t iceland_ih_decode_iv +ffffffff81e18860 t iceland_ih_set_rptr +ffffffff81e19000 t ih_v6_0_early_init +ffffffff81e19050 t ih_v6_0_sw_init +ffffffff81e191b0 t ih_v6_0_sw_fini +ffffffff81e191f0 t ih_v6_0_hw_init +ffffffff81e197a0 t ih_v6_0_hw_fini +ffffffff81e19800 t ih_v6_0_suspend +ffffffff81e19860 t ih_v6_0_resume +ffffffff81e19870 t ih_v6_0_is_idle +ffffffff81e198a0 t ih_v6_0_wait_for_idle +ffffffff81e198d0 t ih_v6_0_soft_reset +ffffffff81e19900 t ih_v6_0_set_clockgating_state +ffffffff81e19a20 t ih_v6_0_set_powergating_state +ffffffff81e19b90 t ih_v6_0_get_clockgating_state +ffffffff81e19c20 t ih_v6_0_get_wptr +ffffffff81e19d10 t ih_v6_0_set_rptr +ffffffff81e19dd0 t ih_v6_0_self_irq +ffffffff81e19e30 t ih_v6_0_toggle_interrupts +ffffffff81e1a010 t force_update_wptr_for_self_int +ffffffff81e1b000 t imu_v11_0_init_microcode +ffffffff81e1b1f0 t imu_v11_0_load_microcode +ffffffff81e1b550 t imu_v11_0_setup +ffffffff81e1b7d0 t imu_v11_0_start +ffffffff81e1b8c0 t imu_v11_0_program_rlc_ram +ffffffff81e1ba70 t imu_v11_0_wait_for_reset_status +ffffffff81e1bbb0 t program_imu_rlc_ram +ffffffff81e1c000 T imu_v11_0_3_program_rlc_ram +ffffffff81e1d000 T jpeg_v1_0_early_init +ffffffff81e1d060 T jpeg_v1_0_sw_init +ffffffff81e1d130 T jpeg_v1_0_sw_fini +ffffffff81e1d150 T jpeg_v1_0_start +ffffffff81e1dbc0 t jpeg_v1_0_decode_ring_get_rptr +ffffffff81e1dc40 t jpeg_v1_0_decode_ring_get_wptr +ffffffff81e1dcc0 t jpeg_v1_0_decode_ring_set_wptr +ffffffff81e1dd30 t jpeg_v1_0_decode_ring_emit_ib +ffffffff81e1e640 t jpeg_v1_0_decode_ring_emit_fence +ffffffff81e1ef90 t jpeg_v1_0_decode_ring_emit_vm_flush +ffffffff81e1f000 t jpeg_v1_0_decode_ring_nop +ffffffff81e1f160 t jpeg_v1_0_decode_ring_insert_start +ffffffff81e1f320 t jpeg_v1_0_decode_ring_insert_end +ffffffff81e1f4e0 t jpeg_v1_0_ring_begin_use +ffffffff81e1f5e0 t jpeg_v1_0_decode_ring_emit_wreg +ffffffff81e1f840 t jpeg_v1_0_decode_ring_emit_reg_wait +ffffffff81e1fc50 t jpeg_v1_0_set_interrupt_state +ffffffff81e1fc80 t jpeg_v1_0_process_interrupt +ffffffff81e20000 T jpeg_v2_0_dec_ring_insert_start +ffffffff81e201a0 T jpeg_v2_0_dec_ring_insert_end +ffffffff81e20340 T jpeg_v2_0_dec_ring_emit_fence +ffffffff81e20a30 T jpeg_v2_0_dec_ring_emit_ib +ffffffff81e21210 T jpeg_v2_0_dec_ring_emit_reg_wait +ffffffff81e215d0 T jpeg_v2_0_dec_ring_emit_vm_flush +ffffffff81e21640 T jpeg_v2_0_dec_ring_emit_wreg +ffffffff81e21880 T jpeg_v2_0_dec_ring_nop +ffffffff81e219e0 t jpeg_v2_0_early_init +ffffffff81e21a50 t jpeg_v2_0_sw_init +ffffffff81e21b60 t jpeg_v2_0_sw_fini +ffffffff81e21bb0 t jpeg_v2_0_hw_init +ffffffff81e21c30 t jpeg_v2_0_hw_fini +ffffffff81e21d00 t jpeg_v2_0_suspend +ffffffff81e21d20 t jpeg_v2_0_resume +ffffffff81e21db0 t jpeg_v2_0_is_idle +ffffffff81e21e30 t jpeg_v2_0_wait_for_idle +ffffffff81e21f20 t jpeg_v2_0_set_clockgating_state +ffffffff81e21fd0 t jpeg_v2_0_set_powergating_state +ffffffff81e227d0 t jpeg_v2_0_dec_ring_get_rptr +ffffffff81e22850 t jpeg_v2_0_dec_ring_get_wptr +ffffffff81e228f0 t jpeg_v2_0_dec_ring_set_wptr +ffffffff81e22980 t jpeg_v2_0_set_interrupt_state +ffffffff81e229b0 t jpeg_v2_0_process_interrupt +ffffffff81e22a40 t jpeg_v2_0_enable_clock_gating +ffffffff81e22be0 t jpeg_v2_0_disable_clock_gating +ffffffff81e23000 t jpeg_v2_6_query_ras_poison_status +ffffffff81e23140 t jpeg_v2_5_early_init +ffffffff81e23410 t jpeg_v2_5_sw_init +ffffffff81e23630 t jpeg_v2_5_sw_fini +ffffffff81e23680 t jpeg_v2_5_hw_init +ffffffff81e23770 t jpeg_v2_5_hw_fini +ffffffff81e238b0 t jpeg_v2_5_suspend +ffffffff81e238d0 t jpeg_v2_5_resume +ffffffff81e239d0 t jpeg_v2_5_is_idle +ffffffff81e23ac0 t jpeg_v2_5_wait_for_idle +ffffffff81e23bf0 t jpeg_v2_5_set_clockgating_state +ffffffff81e23d60 t jpeg_v2_5_set_powergating_state +ffffffff81e24440 t jpeg_v2_5_dec_ring_get_rptr +ffffffff81e244d0 t jpeg_v2_5_dec_ring_get_wptr +ffffffff81e24580 t jpeg_v2_5_dec_ring_set_wptr +ffffffff81e24620 t jpeg_v2_6_dec_ring_insert_start +ffffffff81e247e0 t jpeg_v2_6_dec_ring_insert_end +ffffffff81e249a0 t jpeg_v2_5_set_interrupt_state +ffffffff81e249d0 t jpeg_v2_5_process_interrupt +ffffffff81e24ab0 t jpeg_v2_5_enable_clock_gating +ffffffff81e24b80 t jpeg_v2_5_disable_clock_gating +ffffffff81e25000 t jpeg_v3_0_early_init +ffffffff81e250e0 t jpeg_v3_0_sw_init +ffffffff81e251f0 t jpeg_v3_0_sw_fini +ffffffff81e25240 t jpeg_v3_0_hw_init +ffffffff81e252c0 t jpeg_v3_0_hw_fini +ffffffff81e25390 t jpeg_v3_0_suspend +ffffffff81e253b0 t jpeg_v3_0_resume +ffffffff81e25440 t jpeg_v3_0_is_idle +ffffffff81e254c0 t jpeg_v3_0_wait_for_idle +ffffffff81e255b0 t jpeg_v3_0_set_clockgating_state +ffffffff81e25660 t jpeg_v3_0_set_powergating_state +ffffffff81e25f10 t jpeg_v3_0_dec_ring_get_rptr +ffffffff81e25f90 t jpeg_v3_0_dec_ring_get_wptr +ffffffff81e26030 t jpeg_v3_0_dec_ring_set_wptr +ffffffff81e260c0 t jpeg_v3_0_set_interrupt_state +ffffffff81e260f0 t jpeg_v3_0_process_interrupt +ffffffff81e26180 t jpeg_v3_0_enable_clock_gating +ffffffff81e26250 t jpeg_v3_0_disable_clock_gating +ffffffff81e27000 t jpeg_v4_0_early_init +ffffffff81e27080 t jpeg_v4_0_sw_init +ffffffff81e27190 t jpeg_v4_0_sw_fini +ffffffff81e271e0 t jpeg_v4_0_hw_init +ffffffff81e272f0 t jpeg_v4_0_hw_fini +ffffffff81e273c0 t jpeg_v4_0_suspend +ffffffff81e273e0 t jpeg_v4_0_resume +ffffffff81e27430 t jpeg_v4_0_is_idle +ffffffff81e274b0 t jpeg_v4_0_wait_for_idle +ffffffff81e275a0 t jpeg_v4_0_set_clockgating_state +ffffffff81e27650 t jpeg_v4_0_set_powergating_state +ffffffff81e27e50 t jpeg_v4_0_dec_ring_get_rptr +ffffffff81e27ed0 t jpeg_v4_0_dec_ring_get_wptr +ffffffff81e27f70 t jpeg_v4_0_dec_ring_set_wptr +ffffffff81e28010 t jpeg_v4_0_set_interrupt_state +ffffffff81e28040 t jpeg_v4_0_process_interrupt +ffffffff81e280e0 t jpeg_v4_0_enable_clock_gating +ffffffff81e28290 t jpeg_v4_0_disable_clock_gating +ffffffff81e29000 t lsdma_v6_0_copy_mem +ffffffff81e29350 t lsdma_v6_0_fill_mem +ffffffff81e29630 t lsdma_v6_0_update_memory_power_gating +ffffffff81e2a000 t mca_v3_0_mp0_query_ras_error_count +ffffffff81e2a020 t mca_v3_0_ras_block_match +ffffffff81e2a060 t mca_v3_0_mp1_query_ras_error_count +ffffffff81e2a080 t mca_v3_0_mpio_query_ras_error_count +ffffffff81e2a0a0 t mca_v3_0_init +ffffffff81e2b000 t mes_v10_0_late_init +ffffffff81e2b040 t mes_v10_1_sw_init +ffffffff81e2b640 t mes_v10_1_sw_fini +ffffffff81e2b7c0 t mes_v10_1_hw_init +ffffffff81e2c060 t mes_v10_1_hw_fini +ffffffff81e2c120 t mes_v10_1_suspend +ffffffff81e2c1f0 t mes_v10_1_resume +ffffffff81e2c240 t mes_v10_1_kiq_hw_init +ffffffff81e2c640 t mes_v10_1_add_hw_queue +ffffffff81e2c7b0 t mes_v10_1_remove_hw_queue +ffffffff81e2c840 t mes_v10_1_unmap_legacy_queue +ffffffff81e2c920 t mes_v10_1_suspend_gang +ffffffff81e2c950 t mes_v10_1_resume_gang +ffffffff81e2c980 t mes_v10_1_submit_pkt_and_poll_completion +ffffffff81e2cb80 t mes_v10_1_load_microcode +ffffffff81e2d370 t mes_v10_1_enable +ffffffff81e2d7e0 t mes_v10_1_queue_init +ffffffff81e2da80 t amdgpu_bo_unreserve +ffffffff81e2db60 t mes_v10_1_ring_get_rptr +ffffffff81e2db90 t mes_v10_1_ring_get_wptr +ffffffff81e2dbf0 t mes_v10_1_ring_set_wptr +ffffffff81e2e000 t mes_v11_0_late_init +ffffffff81e2e060 t mes_v11_0_sw_init +ffffffff81e2e640 t mes_v11_0_sw_fini +ffffffff81e2e830 t mes_v11_0_hw_init +ffffffff81e2f040 t mes_v11_0_hw_fini +ffffffff81e2f070 t mes_v11_0_suspend +ffffffff81e2f080 t mes_v11_0_resume +ffffffff81e2f0d0 t mes_v11_0_kiq_hw_init +ffffffff81e2f2d0 t mes_v11_0_kiq_hw_fini +ffffffff81e2f710 t mes_v11_0_add_hw_queue +ffffffff81e2f910 t mes_v11_0_remove_hw_queue +ffffffff81e2f9a0 t mes_v11_0_unmap_legacy_queue +ffffffff81e2faa0 t mes_v11_0_suspend_gang +ffffffff81e2fad0 t mes_v11_0_resume_gang +ffffffff81e2fb00 t mes_v11_0_misc_op +ffffffff81e2fc70 t mes_v11_0_submit_pkt_and_poll_completion +ffffffff81e2fe90 t mes_v11_0_load_microcode +ffffffff81e305f0 t mes_v11_0_enable +ffffffff81e30ae0 t mes_v11_0_queue_init +ffffffff81e31570 t amdgpu_bo_unreserve +ffffffff81e31650 t mes_v11_0_mqd_init +ffffffff81e31850 t mes_v11_0_ring_get_rptr +ffffffff81e31880 t mes_v11_0_ring_get_wptr +ffffffff81e318e0 t mes_v11_0_ring_set_wptr +ffffffff81e32000 t mmhub_v1_0_query_ras_error_count +ffffffff81e32150 t mmhub_v1_0_reset_ras_error_count +ffffffff81e321f0 t mmhub_v1_0_get_fb_location +ffffffff81e32300 t mmhub_v1_0_init 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+ffffffff81e39240 t mmhub_v2_0_set_fault_enable_default +ffffffff81e39350 t mmhub_v2_0_gart_disable +ffffffff81e395d0 t mmhub_v2_0_set_clockgating +ffffffff81e39910 t mmhub_v2_0_get_clockgating +ffffffff81e39aa0 t mmhub_v2_0_setup_vm_pt_regs +ffffffff81e39be0 t mmhub_v2_0_print_l2_protection_fault_status +ffffffff81e39e40 t mmhub_v2_0_get_invalidate_req +ffffffff81e3a000 t mmhub_v2_3_init +ffffffff81e3a0d0 t mmhub_v2_3_gart_enable +ffffffff81e3b460 t mmhub_v2_3_set_fault_enable_default +ffffffff81e3b550 t mmhub_v2_3_gart_disable +ffffffff81e3b7e0 t mmhub_v2_3_set_clockgating +ffffffff81e3bc60 t mmhub_v2_3_get_clockgating +ffffffff81e3be40 t mmhub_v2_3_setup_vm_pt_regs +ffffffff81e3bf80 t mmhub_v2_3_print_l2_protection_fault_status +ffffffff81e3c1a0 t mmhub_v2_3_get_invalidate_req +ffffffff81e3d000 t mmhub_v3_0_get_fb_location +ffffffff81e3d090 t mmhub_v3_0_get_mc_fb_offset +ffffffff81e3d110 t mmhub_v3_0_init +ffffffff81e3d1e0 t mmhub_v3_0_gart_enable +ffffffff81e3e370 t mmhub_v3_0_set_fault_enable_default +ffffffff81e3e480 t mmhub_v3_0_gart_disable +ffffffff81e3e700 t mmhub_v3_0_set_clockgating +ffffffff81e3e8c0 t mmhub_v3_0_get_clockgating +ffffffff81e3e970 t mmhub_v3_0_setup_vm_pt_regs +ffffffff81e3eaa0 t mmhub_v3_0_print_l2_protection_fault_status +ffffffff81e3ecb0 t mmhub_v3_0_get_invalidate_req +ffffffff81e3f000 t mmhub_v3_0_1_get_fb_location +ffffffff81e3f090 t mmhub_v3_0_1_get_mc_fb_offset +ffffffff81e3f110 t mmhub_v3_0_1_init +ffffffff81e3f1e0 t mmhub_v3_0_1_gart_enable +ffffffff81e40460 t mmhub_v3_0_1_set_fault_enable_default +ffffffff81e40550 t mmhub_v3_0_1_gart_disable +ffffffff81e407e0 t mmhub_v3_0_1_set_clockgating +ffffffff81e40990 t mmhub_v3_0_1_get_clockgating +ffffffff81e40a40 t mmhub_v3_0_1_setup_vm_pt_regs +ffffffff81e40b80 t mmhub_v3_0_1_print_l2_protection_fault_status +ffffffff81e40d90 t mmhub_v3_0_1_get_invalidate_req +ffffffff81e41000 t mmhub_v3_0_2_get_fb_location +ffffffff81e41090 t mmhub_v3_0_2_get_mc_fb_offset +ffffffff81e41110 t mmhub_v3_0_2_init +ffffffff81e411e0 t mmhub_v3_0_2_gart_enable +ffffffff81e42360 t mmhub_v3_0_2_set_fault_enable_default +ffffffff81e42470 t mmhub_v3_0_2_gart_disable +ffffffff81e426f0 t mmhub_v3_0_2_set_clockgating +ffffffff81e42720 t mmhub_v3_0_2_get_clockgating +ffffffff81e42750 t mmhub_v3_0_2_setup_vm_pt_regs +ffffffff81e42880 t mmhub_v3_0_2_print_l2_protection_fault_status +ffffffff81e42a70 t mmhub_v3_0_2_get_invalidate_req +ffffffff81e43000 t mmhub_v9_4_query_ras_error_count +ffffffff81e43150 t mmhub_v9_4_query_ras_error_status +ffffffff81e43230 t mmhub_v9_4_reset_ras_error_count +ffffffff81e432f0 t mmhub_v9_4_get_fb_location +ffffffff81e43400 t mmhub_v9_4_init +ffffffff81e43540 t mmhub_v9_4_gart_enable +ffffffff81e449d0 t mmhub_v9_4_set_fault_enable_default +ffffffff81e44bb0 t mmhub_v9_4_gart_disable +ffffffff81e44f10 t mmhub_v9_4_set_clockgating +ffffffff81e453d0 t mmhub_v9_4_get_clockgating +ffffffff81e454f0 t mmhub_v9_4_setup_vm_pt_regs +ffffffff81e45530 t mmhub_v9_4_setup_hubid_vm_pt_regs +ffffffff81e46000 T xgpu_ai_mailbox_set_irq_funcs +ffffffff81e46050 T xgpu_ai_mailbox_add_irq_id +ffffffff81e460e0 T xgpu_ai_mailbox_get_irq +ffffffff81e46190 t xgpu_ai_mailbox_flr_work +ffffffff81e46390 T xgpu_ai_mailbox_put_irq +ffffffff81e463d0 t xgpu_ai_request_full_gpu_access +ffffffff81e463f0 t xgpu_ai_release_full_gpu_access +ffffffff81e46410 t xgpu_ai_request_init_data +ffffffff81e46470 t xgpu_ai_request_reset +ffffffff81e46520 t xgpu_ai_mailbox_trans_msg +ffffffff81e46750 t xgpu_ai_set_mailbox_ack_irq +ffffffff81e467e0 t xgpu_ai_mailbox_ack_irq +ffffffff81e46830 t xgpu_ai_set_mailbox_rcv_irq +ffffffff81e468c0 t xgpu_ai_mailbox_rcv_irq +ffffffff81e469a0 t xgpu_ai_send_access_requests +ffffffff81e46a90 t xgpu_ai_poll_msg +ffffffff81e47000 T xgpu_nv_mailbox_set_irq_funcs +ffffffff81e47050 T xgpu_nv_mailbox_add_irq_id +ffffffff81e470e0 T xgpu_nv_mailbox_get_irq +ffffffff81e47190 t xgpu_nv_mailbox_flr_work +ffffffff81e473b0 T xgpu_nv_mailbox_put_irq +ffffffff81e473f0 t xgpu_nv_request_full_gpu_access +ffffffff81e47410 t xgpu_nv_release_full_gpu_access +ffffffff81e47430 t xgpu_nv_request_init_data +ffffffff81e47450 t xgpu_nv_request_reset +ffffffff81e47550 t xgpu_nv_mailbox_trans_msg +ffffffff81e476f0 t xgpu_nv_set_mailbox_ack_irq +ffffffff81e47760 t xgpu_nv_mailbox_ack_irq +ffffffff81e477b0 t xgpu_nv_set_mailbox_rcv_irq +ffffffff81e47830 t xgpu_nv_mailbox_rcv_irq +ffffffff81e478e0 t xgpu_nv_send_access_requests +ffffffff81e48000 T xgpu_vi_init_golden_registers +ffffffff81e480c0 T xgpu_vi_mailbox_set_irq_funcs +ffffffff81e48110 T xgpu_vi_mailbox_add_irq_id +ffffffff81e481a0 T xgpu_vi_mailbox_get_irq +ffffffff81e48250 t xgpu_vi_mailbox_flr_work +ffffffff81e483a0 T xgpu_vi_mailbox_put_irq +ffffffff81e483e0 t xgpu_vi_request_full_gpu_access +ffffffff81e48400 t xgpu_vi_release_full_gpu_access +ffffffff81e48420 t xgpu_vi_request_reset +ffffffff81e48440 t xgpu_vi_wait_reset_cmpl +ffffffff81e48520 t xgpu_vi_set_mailbox_ack_irq +ffffffff81e48590 t xgpu_vi_mailbox_ack_irq +ffffffff81e485e0 t xgpu_vi_set_mailbox_rcv_irq +ffffffff81e48660 t xgpu_vi_mailbox_rcv_irq +ffffffff81e48700 t xgpu_vi_mailbox_rcv_msg +ffffffff81e48820 t xgpu_vi_send_access_requests +ffffffff81e49000 t navi10_ih_early_init +ffffffff81e49050 t navi10_ih_sw_init +ffffffff81e491c0 t navi10_ih_sw_fini +ffffffff81e49200 t navi10_ih_hw_init +ffffffff81e49630 t navi10_ih_hw_fini +ffffffff81e49690 t navi10_ih_suspend +ffffffff81e496f0 t navi10_ih_resume +ffffffff81e49700 t navi10_ih_is_idle +ffffffff81e49730 t navi10_ih_wait_for_idle +ffffffff81e49760 t navi10_ih_soft_reset +ffffffff81e49790 t navi10_ih_set_clockgating_state +ffffffff81e498b0 t navi10_ih_set_powergating_state +ffffffff81e498e0 t navi10_ih_get_clockgating_state +ffffffff81e49970 t navi10_ih_get_wptr +ffffffff81e49a80 t navi10_ih_set_rptr +ffffffff81e49b50 t navi10_ih_self_irq +ffffffff81e49bc0 t navi10_ih_toggle_interrupts +ffffffff81e49d50 t force_update_wptr_for_self_int +ffffffff81e4b000 t nbio_v2_3_get_hdp_flush_req_offset +ffffffff81e4b040 t nbio_v2_3_get_hdp_flush_done_offset +ffffffff81e4b080 t nbio_v2_3_get_pcie_index_offset +ffffffff81e4b0b0 t nbio_v2_3_get_pcie_data_offset +ffffffff81e4b0e0 t nbio_v2_3_get_rev_id +ffffffff81e4b130 t nbio_v2_3_mc_access_enable +ffffffff81e4b1e0 t nbio_v2_3_get_memsize +ffffffff81e4b240 t nbio_v2_3_sdma_doorbell_range +ffffffff81e4b2e0 t nbio_v2_3_vcn_doorbell_range +ffffffff81e4b360 t nbio_v2_3_enable_doorbell_aperture +ffffffff81e4b450 t nbio_v2_3_enable_doorbell_selfring_aperture +ffffffff81e4b5b0 t nbio_v2_3_ih_doorbell_range +ffffffff81e4b6c0 t nbio_v2_3_update_medium_grain_clock_gating +ffffffff81e4b760 t nbio_v2_3_update_medium_grain_light_sleep +ffffffff81e4b800 t nbio_v2_3_get_clockgating_state +ffffffff81e4b880 t nbio_v2_3_ih_control +ffffffff81e4b9d0 t nbio_v2_3_init_registers +ffffffff81e4ba60 t nbio_v2_3_remap_hdp_registers +ffffffff81e4bb60 t nbio_v2_3_enable_aspm +ffffffff81e4bbf0 t nbio_v2_3_program_aspm +ffffffff81e4c280 t nbio_v2_3_apply_lc_spc_mode_wa +ffffffff81e4c310 t nbio_v2_3_apply_l1_link_width_reconfig_wa +ffffffff81e4c380 t nbio_v2_3_clear_doorbell_interrupt +ffffffff81e4d000 t nbio_v4_3_get_hdp_flush_req_offset +ffffffff81e4d040 t nbio_v4_3_get_hdp_flush_done_offset +ffffffff81e4d080 t nbio_v4_3_get_pcie_index_offset +ffffffff81e4d0b0 t nbio_v4_3_get_pcie_data_offset +ffffffff81e4d0e0 t nbio_v4_3_get_rev_id +ffffffff81e4d160 t nbio_v4_3_mc_access_enable +ffffffff81e4d210 t nbio_v4_3_get_memsize +ffffffff81e4d270 t nbio_v4_3_sdma_doorbell_range +ffffffff81e4d3e0 t nbio_v4_3_vcn_doorbell_range +ffffffff81e4d590 t nbio_v4_3_gc_doorbell_init +ffffffff81e4d680 t nbio_v4_3_enable_doorbell_aperture +ffffffff81e4d770 t nbio_v4_3_enable_doorbell_selfring_aperture +ffffffff81e4d8d0 t nbio_v4_3_ih_doorbell_range +ffffffff81e4d9f0 t nbio_v4_3_update_medium_grain_clock_gating +ffffffff81e4db20 t nbio_v4_3_update_medium_grain_light_sleep +ffffffff81e4dc50 t nbio_v4_3_get_clockgating_state +ffffffff81e4dd60 t nbio_v4_3_ih_control +ffffffff81e4deb0 t nbio_v4_3_init_registers +ffffffff81e4dfc0 t nbio_v4_3_remap_hdp_registers +ffffffff81e4e0c0 t nbio_v4_3_program_aspm +ffffffff81e4ed50 t nbio_v4_3_get_rom_offset +ffffffff81e4edd0 t nbio_v4_3_sriov_sdma_doorbell_range +ffffffff81e4ee00 t nbio_v4_3_sriov_vcn_doorbell_range +ffffffff81e4ee30 t nbio_v4_3_sriov_gc_doorbell_init +ffffffff81e4ee60 t nbio_v4_3_sriov_ih_doorbell_range +ffffffff81e4f000 t nbio_v6_1_get_hdp_flush_req_offset +ffffffff81e4f040 t nbio_v6_1_get_hdp_flush_done_offset +ffffffff81e4f080 t nbio_v6_1_get_pcie_index_offset +ffffffff81e4f0b0 t nbio_v6_1_get_pcie_data_offset +ffffffff81e4f0e0 t nbio_v6_1_get_rev_id +ffffffff81e4f160 t nbio_v6_1_mc_access_enable +ffffffff81e4f210 t nbio_v6_1_get_memsize +ffffffff81e4f270 t nbio_v6_1_sdma_doorbell_range +ffffffff81e4f300 t nbio_v6_1_enable_doorbell_aperture +ffffffff81e4f3f0 t nbio_v6_1_enable_doorbell_selfring_aperture +ffffffff81e4f550 t nbio_v6_1_ih_doorbell_range +ffffffff81e4f660 t nbio_v6_1_update_medium_grain_clock_gating +ffffffff81e4f700 t nbio_v6_1_update_medium_grain_light_sleep +ffffffff81e4f7a0 t nbio_v6_1_get_clockgating_state +ffffffff81e4f820 t nbio_v6_1_ih_control +ffffffff81e4f970 t nbio_v6_1_init_registers +ffffffff81e4fa40 t nbio_v6_1_remap_hdp_registers +ffffffff81e4fb40 t nbio_v6_1_program_aspm +ffffffff81e50000 t nbio_v7_0_get_hdp_flush_req_offset +ffffffff81e50040 t nbio_v7_0_get_hdp_flush_done_offset +ffffffff81e50080 t nbio_v7_0_get_pcie_index_offset +ffffffff81e500b0 t nbio_v7_0_get_pcie_data_offset +ffffffff81e500e0 t nbio_v7_0_get_rev_id +ffffffff81e50160 t nbio_v7_0_mc_access_enable +ffffffff81e50210 t nbio_v7_0_get_memsize +ffffffff81e50270 t nbio_v7_0_sdma_doorbell_range +ffffffff81e50300 t nbio_v7_0_vcn_doorbell_range +ffffffff81e50370 t nbio_v7_0_enable_doorbell_aperture +ffffffff81e50460 t nbio_v7_0_enable_doorbell_selfring_aperture +ffffffff81e50490 t nbio_v7_0_ih_doorbell_range +ffffffff81e505a0 t nbio_v7_0_update_medium_grain_clock_gating +ffffffff81e506e0 t nbio_v7_0_update_medium_grain_light_sleep +ffffffff81e50780 t nbio_v7_0_get_clockgating_state +ffffffff81e50800 t nbio_v7_0_ih_control +ffffffff81e50950 t nbio_v7_0_init_registers +ffffffff81e509a0 t nbio_v7_0_remap_hdp_registers +ffffffff81e50aa0 t nbio_7_0_read_syshub_ind_mmr +ffffffff81e50b70 t nbio_7_0_write_syshub_ind_mmr +ffffffff81e51000 t nbio_v7_2_get_hdp_flush_req_offset +ffffffff81e51040 t nbio_v7_2_get_hdp_flush_done_offset +ffffffff81e51080 t nbio_v7_2_get_pcie_index_offset +ffffffff81e510b0 t nbio_v7_2_get_pcie_data_offset +ffffffff81e510e0 t nbio_v7_2_get_pcie_port_index_offset +ffffffff81e51110 t nbio_v7_2_get_pcie_port_data_offset +ffffffff81e51140 t nbio_v7_2_get_rev_id +ffffffff81e51220 t nbio_v7_2_mc_access_enable +ffffffff81e51360 t nbio_v7_2_get_memsize +ffffffff81e513c0 t nbio_v7_2_sdma_doorbell_range +ffffffff81e51450 t nbio_v7_2_vcn_doorbell_range +ffffffff81e514d0 t nbio_v7_2_enable_doorbell_aperture +ffffffff81e515b0 t nbio_v7_2_enable_doorbell_selfring_aperture +ffffffff81e51710 t nbio_v7_2_ih_doorbell_range +ffffffff81e51790 t nbio_v7_2_update_medium_grain_clock_gating +ffffffff81e51840 t nbio_v7_2_update_medium_grain_light_sleep +ffffffff81e519d0 t nbio_v7_2_get_clockgating_state +ffffffff81e51a60 t nbio_v7_2_ih_control +ffffffff81e51bb0 t nbio_v7_2_init_registers +ffffffff81e51c90 t nbio_v7_2_remap_hdp_registers +ffffffff81e52000 t nbio_v7_4_query_ras_error_count +ffffffff81e521a0 t nbio_v7_4_handle_ras_controller_intr_no_bifring +ffffffff81e523d0 t nbio_v7_4_handle_ras_err_event_athub_intr_no_bifring +ffffffff81e52580 t nbio_v7_4_init_ras_controller_interrupt +ffffffff81e525c0 t nbio_v7_4_init_ras_err_event_athub_interrupt +ffffffff81e52600 t nbio_v7_4_get_hdp_flush_req_offset +ffffffff81e52640 t nbio_v7_4_get_hdp_flush_done_offset +ffffffff81e52680 t nbio_v7_4_get_pcie_index_offset +ffffffff81e526b0 t nbio_v7_4_get_pcie_data_offset +ffffffff81e526e0 t nbio_v7_4_get_rev_id +ffffffff81e527a0 t nbio_v7_4_mc_access_enable +ffffffff81e52850 t nbio_v7_4_get_memsize +ffffffff81e528b0 t nbio_v7_4_sdma_doorbell_range +ffffffff81e52970 t nbio_v7_4_vcn_doorbell_range +ffffffff81e52a10 t nbio_v7_4_enable_doorbell_aperture +ffffffff81e52b00 t nbio_v7_4_enable_doorbell_selfring_aperture +ffffffff81e52c60 t nbio_v7_4_ih_doorbell_range +ffffffff81e52d70 t nbio_v7_4_enable_doorbell_interrupt +ffffffff81e52eb0 t nbio_v7_4_update_medium_grain_clock_gating +ffffffff81e52ee0 t nbio_v7_4_update_medium_grain_light_sleep +ffffffff81e52f80 t nbio_v7_4_get_clockgating_state +ffffffff81e53000 t nbio_v7_4_ih_control +ffffffff81e53150 t nbio_v7_4_init_registers +ffffffff81e53230 t nbio_v7_4_remap_hdp_registers +ffffffff81e53330 t nbio_v7_4_program_aspm +ffffffff81e53730 t nbio_v7_4_set_ras_controller_irq_state +ffffffff81e538c0 t nbio_v7_4_process_ras_controller_irq +ffffffff81e538f0 t nbio_v7_4_set_ras_err_event_athub_irq_state +ffffffff81e53a80 t nbio_v7_4_process_err_event_athub_irq +ffffffff81e54000 t nbio_v7_7_get_hdp_flush_req_offset +ffffffff81e54040 t nbio_v7_7_get_hdp_flush_done_offset +ffffffff81e54080 t nbio_v7_7_get_pcie_index_offset +ffffffff81e540b0 t nbio_v7_7_get_pcie_data_offset +ffffffff81e540e0 t nbio_v7_7_get_pcie_port_index_offset +ffffffff81e54110 t nbio_v7_7_get_pcie_port_data_offset +ffffffff81e54140 t nbio_v7_7_get_rev_id +ffffffff81e541c0 t nbio_v7_7_mc_access_enable +ffffffff81e54270 t nbio_v7_7_get_memsize +ffffffff81e542d0 t nbio_v7_7_sdma_doorbell_range +ffffffff81e54360 t nbio_v7_7_vcn_doorbell_range +ffffffff81e543e0 t nbio_v7_7_enable_doorbell_aperture +ffffffff81e544c0 t nbio_v7_7_enable_doorbell_selfring_aperture +ffffffff81e54620 t nbio_v7_7_ih_doorbell_range +ffffffff81e54730 t nbio_v7_7_update_medium_grain_clock_gating +ffffffff81e54860 t nbio_v7_7_update_medium_grain_light_sleep +ffffffff81e54a60 t nbio_v7_7_get_clockgating_state +ffffffff81e54b70 t nbio_v7_7_ih_control +ffffffff81e54cc0 t nbio_v7_7_init_registers +ffffffff81e54dc0 t nbio_v7_7_remap_hdp_registers +ffffffff81e55000 T nv_grbm_select +ffffffff81e55090 T nv_set_virt_ops +ffffffff81e550c0 t nv_common_early_init +ffffffff81e554a0 t nv_common_late_init +ffffffff81e55500 t nv_common_sw_init +ffffffff81e55540 t nv_common_sw_fini +ffffffff81e55570 t nv_common_hw_init +ffffffff81e55680 t nv_common_hw_fini +ffffffff81e556e0 t nv_common_suspend +ffffffff81e55740 t nv_common_resume +ffffffff81e55780 t nv_common_is_idle +ffffffff81e557b0 t nv_common_wait_for_idle +ffffffff81e557e0 t nv_common_soft_reset +ffffffff81e55810 t nv_common_set_clockgating_state +ffffffff81e558e0 t nv_common_set_powergating_state +ffffffff81e55910 t nv_common_get_clockgating_state +ffffffff81e55980 t nv_pcie_rreg +ffffffff81e559e0 t nv_pcie_wreg +ffffffff81e55a40 t nv_pcie_rreg64 +ffffffff81e55aa0 t nv_pcie_wreg64 +ffffffff81e55b00 t nv_didt_rreg +ffffffff81e55b90 t nv_didt_wreg +ffffffff81e55c10 t nv_read_disabled_bios +ffffffff81e55c40 t nv_read_register +ffffffff81e55d20 t nv_vga_set_state +ffffffff81e55d50 t nv_asic_reset +ffffffff81e55e90 t nv_asic_reset_method +ffffffff81e55f80 t nv_get_xclk +ffffffff81e55fb0 t nv_set_uvd_clocks +ffffffff81e55fe0 t nv_set_vce_clocks +ffffffff81e56010 t nv_get_config_memsize +ffffffff81e56030 t nv_need_full_reset +ffffffff81e56060 t nv_init_doorbell_index +ffffffff81e56190 t nv_need_reset_on_init +ffffffff81e56220 t nv_get_pcie_replay_count +ffffffff81e56250 t nv_pre_asic_init +ffffffff81e56280 t nv_update_umd_stable_pstate +ffffffff81e56330 t nv_query_video_codecs +ffffffff81e57000 T psp_v10_0_set_psp_funcs +ffffffff81e57030 t psp_v10_0_init_microcode +ffffffff81e572a0 t psp_v10_0_ring_init +ffffffff81e57320 t psp_v10_0_ring_create +ffffffff81e57620 t psp_v10_0_ring_stop +ffffffff81e57810 t psp_v10_0_ring_destroy +ffffffff81e57880 t psp_v10_0_mode1_reset +ffffffff81e578c0 t psp_v10_0_ring_get_wptr +ffffffff81e57920 t psp_v10_0_ring_set_wptr +ffffffff81e58000 T psp_v11_0_set_psp_funcs +ffffffff81e58030 t psp_v11_0_init_microcode +ffffffff81e58450 t psp_v11_0_bootloader_load_kdb +ffffffff81e58470 t psp_v11_0_bootloader_load_spl +ffffffff81e58490 t psp_v11_0_bootloader_load_sysdrv +ffffffff81e584b0 t psp_v11_0_bootloader_load_sos +ffffffff81e58800 t psp_v11_0_ring_init +ffffffff81e58880 t psp_v11_0_ring_create +ffffffff81e58f10 t psp_v11_0_ring_stop +ffffffff81e59130 t psp_v11_0_ring_destroy +ffffffff81e591a0 t psp_v11_0_mode1_reset +ffffffff81e59290 t psp_v11_0_memory_training +ffffffff81e59710 t psp_v11_0_ring_get_wptr +ffffffff81e59760 t psp_v11_0_ring_set_wptr +ffffffff81e598a0 t psp_v11_0_load_usbc_pd_fw +ffffffff81e59a90 t psp_v11_0_read_usbc_pd_fw +ffffffff81e59bb0 t psp_v11_0_bootloader_load_component +ffffffff81e59d70 t psp_v11_0_wait_for_bootloader +ffffffff81e59f40 t psp_v11_0_memory_training_send_msg +ffffffff81e5b000 T psp_v11_0_8_set_psp_funcs +ffffffff81e5b030 t psp_v11_0_8_ring_init +ffffffff81e5b0b0 t psp_v11_0_8_ring_create +ffffffff81e5b740 t psp_v11_0_8_ring_stop +ffffffff81e5bac0 t psp_v11_0_8_ring_destroy +ffffffff81e5bb30 t psp_v11_0_8_ring_get_wptr +ffffffff81e5bba0 t psp_v11_0_8_ring_set_wptr +ffffffff81e5c000 T psp_v12_0_set_psp_funcs +ffffffff81e5c030 t psp_v12_0_init_microcode +ffffffff81e5c290 t psp_v12_0_bootloader_load_sysdrv +ffffffff81e5c5b0 t psp_v12_0_bootloader_load_sos +ffffffff81e5c910 t psp_v12_0_ring_init +ffffffff81e5cee0 t psp_v12_0_ring_create +ffffffff81e5d430 t psp_v12_0_ring_stop +ffffffff81e5d650 t psp_v12_0_ring_destroy +ffffffff81e5d6c0 t psp_v12_0_mode1_reset +ffffffff81e5d7b0 t psp_v12_0_ring_get_wptr +ffffffff81e5d820 t psp_v12_0_ring_set_wptr +ffffffff81e5e000 T psp_v13_0_set_psp_funcs +ffffffff81e5e030 t psp_v13_0_init_microcode +ffffffff81e5e160 t psp_v13_0_bootloader_load_kdb +ffffffff81e5e180 t psp_v13_0_bootloader_load_spl +ffffffff81e5e1a0 t psp_v13_0_bootloader_load_sysdrv +ffffffff81e5e1c0 t psp_v13_0_bootloader_load_soc_drv +ffffffff81e5e1e0 t psp_v13_0_bootloader_load_intf_drv +ffffffff81e5e200 t psp_v13_0_bootloader_load_dbg_drv +ffffffff81e5e220 t psp_v13_0_bootloader_load_ras_drv +ffffffff81e5e240 t psp_v13_0_bootloader_load_sos +ffffffff81e5e5a0 t psp_v13_0_ring_init +ffffffff81e5e620 t psp_v13_0_ring_create +ffffffff81e5ecb0 t psp_v13_0_ring_stop +ffffffff81e5f030 t psp_v13_0_ring_destroy +ffffffff81e5f0a0 t psp_v13_0_memory_training +ffffffff81e5f4e0 t psp_v13_0_ring_get_wptr +ffffffff81e5f550 t psp_v13_0_ring_set_wptr +ffffffff81e5f640 t psp_v13_0_load_usbc_pd_fw +ffffffff81e5f830 t psp_v13_0_read_usbc_pd_fw +ffffffff81e5f950 t psp_v13_0_update_spirom +ffffffff81e5fb20 t psp_v13_0_vbflash_status +ffffffff81e5fb80 t psp_v13_0_bootloader_load_component +ffffffff81e5fd50 t psp_v13_0_wait_for_bootloader +ffffffff81e5ff20 t psp_v13_0_memory_training_send_msg +ffffffff81e60080 t psp_v13_0_exec_spi_cmd +ffffffff81e61000 T psp_v13_0_4_set_psp_funcs +ffffffff81e61030 t psp_v13_0_4_init_microcode +ffffffff81e61100 t psp_v13_0_4_bootloader_load_kdb +ffffffff81e61120 t psp_v13_0_4_bootloader_load_spl +ffffffff81e61140 t psp_v13_0_4_bootloader_load_sysdrv +ffffffff81e61160 t psp_v13_0_4_bootloader_load_soc_drv +ffffffff81e61180 t psp_v13_0_4_bootloader_load_intf_drv +ffffffff81e611a0 t psp_v13_0_4_bootloader_load_dbg_drv +ffffffff81e611c0 t psp_v13_0_4_bootloader_load_sos +ffffffff81e61530 t psp_v13_0_4_ring_init +ffffffff81e615b0 t psp_v13_0_4_ring_create +ffffffff81e61c50 t psp_v13_0_4_ring_stop +ffffffff81e61fe0 t psp_v13_0_4_ring_destroy +ffffffff81e62050 t psp_v13_0_4_ring_get_wptr +ffffffff81e620c0 t psp_v13_0_4_ring_set_wptr +ffffffff81e621c0 t psp_v13_0_4_bootloader_load_component +ffffffff81e62390 t psp_v13_0_4_wait_for_bootloader +ffffffff81e63000 T psp_v3_1_set_psp_funcs +ffffffff81e63030 t psp_v3_1_init_microcode +ffffffff81e630e0 t psp_v3_1_bootloader_load_sysdrv +ffffffff81e63400 t psp_v3_1_bootloader_load_sos +ffffffff81e63760 t psp_v3_1_ring_init +ffffffff81e637e0 t psp_v3_1_ring_create +ffffffff81e642e0 t psp_v3_1_ring_stop +ffffffff81e64500 t psp_v3_1_ring_destroy +ffffffff81e64570 t psp_v3_1_smu_reload_quirk +ffffffff81e645c0 t psp_v3_1_mode1_reset +ffffffff81e646b0 t psp_v3_1_ring_get_wptr +ffffffff81e64700 t psp_v3_1_ring_set_wptr +ffffffff81e65000 t sdma_v2_4_early_init +ffffffff81e650e0 t sdma_v2_4_sw_init +ffffffff81e65470 t sdma_v2_4_sw_fini +ffffffff81e65550 t sdma_v2_4_hw_init +ffffffff81e65900 t sdma_v2_4_hw_fini +ffffffff81e65940 t sdma_v2_4_suspend +ffffffff81e65980 t sdma_v2_4_resume +ffffffff81e65990 t sdma_v2_4_is_idle +ffffffff81e659d0 t sdma_v2_4_wait_for_idle +ffffffff81e65a60 t sdma_v2_4_soft_reset +ffffffff81e65ba0 t sdma_v2_4_set_clockgating_state +ffffffff81e65bd0 t sdma_v2_4_set_powergating_state +ffffffff81e65c00 t sdma_v2_4_ring_get_rptr +ffffffff81e65c30 t sdma_v2_4_ring_get_wptr +ffffffff81e65c80 t sdma_v2_4_ring_set_wptr +ffffffff81e65cb0 t sdma_v2_4_ring_emit_ib +ffffffff81e65f60 t sdma_v2_4_ring_emit_fence +ffffffff81e66360 t sdma_v2_4_ring_emit_pipeline_sync +ffffffff81e665e0 t sdma_v2_4_ring_emit_vm_flush +ffffffff81e66860 t sdma_v2_4_ring_emit_hdp_flush +ffffffff81e66ae0 t sdma_v2_4_ring_test_ring +ffffffff81e66dc0 t sdma_v2_4_ring_test_ib +ffffffff81e66fa0 t sdma_v2_4_ring_insert_nop +ffffffff81e670c0 t sdma_v2_4_ring_pad_ib +ffffffff81e671e0 t sdma_v2_4_ring_emit_wreg +ffffffff81e67330 t sdma_v2_4_emit_copy_buffer +ffffffff81e673e0 t sdma_v2_4_emit_fill_buffer +ffffffff81e67470 t sdma_v2_4_vm_copy_pte +ffffffff81e67520 t sdma_v2_4_vm_write_pte +ffffffff81e675f0 t sdma_v2_4_vm_set_pte_pde +ffffffff81e676e0 t sdma_v2_4_set_trap_irq_state +ffffffff81e677a0 t sdma_v2_4_process_trap_irq +ffffffff81e67830 t sdma_v2_4_process_illegal_inst_irq +ffffffff81e678b0 t sdma_v2_4_enable +ffffffff81e68000 t sdma_v3_0_early_init +ffffffff81e68140 t sdma_v3_0_sw_init +ffffffff81e684f0 t sdma_v3_0_sw_fini +ffffffff81e685d0 t sdma_v3_0_hw_init +ffffffff81e68700 t sdma_v3_0_hw_fini +ffffffff81e68740 t sdma_v3_0_suspend +ffffffff81e68780 t sdma_v3_0_resume +ffffffff81e68790 t sdma_v3_0_is_idle +ffffffff81e687d0 t sdma_v3_0_wait_for_idle +ffffffff81e68860 t sdma_v3_0_check_soft_reset +ffffffff81e688b0 t sdma_v3_0_pre_soft_reset +ffffffff81e68900 t sdma_v3_0_soft_reset +ffffffff81e689c0 t sdma_v3_0_post_soft_reset +ffffffff81e68a00 t sdma_v3_0_set_clockgating_state +ffffffff81e68c60 t sdma_v3_0_set_powergating_state +ffffffff81e68c90 t sdma_v3_0_get_clockgating_state +ffffffff81e68d10 t sdma_v3_0_ring_get_rptr +ffffffff81e68d40 t sdma_v3_0_ring_get_wptr +ffffffff81e68dc0 t sdma_v3_0_ring_set_wptr +ffffffff81e68e70 t sdma_v3_0_ring_emit_ib +ffffffff81e69120 t sdma_v3_0_ring_emit_fence +ffffffff81e69520 t sdma_v3_0_ring_emit_pipeline_sync +ffffffff81e697a0 t sdma_v3_0_ring_emit_vm_flush +ffffffff81e69a20 t sdma_v3_0_ring_emit_hdp_flush +ffffffff81e69ca0 t sdma_v3_0_ring_test_ring +ffffffff81e69f80 t sdma_v3_0_ring_test_ib +ffffffff81e6a160 t sdma_v3_0_ring_insert_nop +ffffffff81e6a280 t sdma_v3_0_ring_pad_ib +ffffffff81e6a3a0 t sdma_v3_0_ring_emit_wreg +ffffffff81e6a4f0 t sdma_v3_0_emit_copy_buffer +ffffffff81e6a5a0 t sdma_v3_0_emit_fill_buffer +ffffffff81e6a630 t sdma_v3_0_vm_copy_pte +ffffffff81e6a6e0 t sdma_v3_0_vm_write_pte +ffffffff81e6a7b0 t sdma_v3_0_vm_set_pte_pde +ffffffff81e6a8a0 t sdma_v3_0_set_trap_irq_state +ffffffff81e6a960 t sdma_v3_0_process_trap_irq +ffffffff81e6a9f0 t sdma_v3_0_process_illegal_inst_irq +ffffffff81e6aa70 t sdma_v3_0_ctx_switch_enable +ffffffff81e6ac00 t sdma_v3_0_enable +ffffffff81e6ad70 t sdma_v3_0_gfx_resume +ffffffff81e6c000 t sdma_v4_0_early_init +ffffffff81e6c580 t sdma_v4_0_late_init +ffffffff81e6c820 t sdma_v4_0_sw_init +ffffffff81e6cb90 t sdma_v4_0_sw_fini +ffffffff81e6cc50 t sdma_v4_0_hw_init +ffffffff81e6fbf0 t sdma_v4_0_hw_fini +ffffffff81e6fca0 t sdma_v4_0_suspend +ffffffff81e6fcf0 t sdma_v4_0_resume +ffffffff81e6fd60 t sdma_v4_0_is_idle +ffffffff81e6fe90 t sdma_v4_0_wait_for_idle +ffffffff81e70030 t sdma_v4_0_soft_reset +ffffffff81e70060 t sdma_v4_0_set_clockgating_state +ffffffff81e70550 t sdma_v4_0_set_powergating_state +ffffffff81e70610 t sdma_v4_0_get_clockgating_state +ffffffff81e706a0 t sdma_v4_0_query_ras_error_count +ffffffff81e70870 t sdma_v4_0_reset_ras_error_count +ffffffff81e709c0 t sdma_v4_0_ring_get_rptr +ffffffff81e70a20 t sdma_v4_0_ring_get_wptr +ffffffff81e70c10 t sdma_v4_0_ring_set_wptr +ffffffff81e70e90 t sdma_v4_0_ring_emit_ib +ffffffff81e71140 t sdma_v4_0_ring_emit_fence +ffffffff81e71570 t sdma_v4_0_ring_emit_pipeline_sync +ffffffff81e715c0 t sdma_v4_0_ring_emit_vm_flush +ffffffff81e715e0 t sdma_v4_0_ring_emit_hdp_flush +ffffffff81e71680 t sdma_v4_0_ring_test_ring +ffffffff81e71960 t sdma_v4_0_ring_test_ib +ffffffff81e71b40 t sdma_v4_0_ring_insert_nop +ffffffff81e71c60 t sdma_v4_0_ring_pad_ib +ffffffff81e71d80 t sdma_v4_0_ring_emit_wreg +ffffffff81e71ed0 t sdma_v4_0_ring_emit_reg_wait +ffffffff81e71f20 t sdma_v4_0_wait_reg_mem +ffffffff81e72250 t sdma_v4_0_page_ring_get_wptr +ffffffff81e72400 t sdma_v4_0_page_ring_set_wptr +ffffffff81e725c0 t sdma_v4_0_emit_copy_buffer +ffffffff81e72680 t sdma_v4_0_emit_fill_buffer +ffffffff81e72710 t sdma_v4_0_vm_copy_pte +ffffffff81e727d0 t sdma_v4_0_vm_write_pte +ffffffff81e728a0 t sdma_v4_0_vm_set_pte_pde +ffffffff81e729a0 t sdma_v4_0_set_trap_irq_state +ffffffff81e72b40 t sdma_v4_0_process_trap_irq +ffffffff81e72c80 t sdma_v4_0_process_illegal_inst_irq +ffffffff81e72da0 t sdma_v4_0_set_ecc_irq_state +ffffffff81e72f40 t sdma_v4_0_process_vm_hole_irq +ffffffff81e73080 t sdma_v4_0_process_doorbell_invalid_irq +ffffffff81e731c0 t sdma_v4_0_process_pool_timeout_irq +ffffffff81e73300 t sdma_v4_0_process_srbm_write_irq +ffffffff81e73440 t sdma_v4_0_process_ras_data_cb +ffffffff81e734b0 t sdma_v4_0_ctx_switch_enable +ffffffff81e73b60 t sdma_v4_0_enable +ffffffff81e74100 t sdma_v4_0_gfx_enable +ffffffff81e75000 t sdma_v4_4_query_ras_error_count +ffffffff81e75270 t sdma_v4_4_reset_ras_error_count +ffffffff81e76000 t sdma_v5_0_early_init +ffffffff81e76170 t sdma_v5_0_sw_init +ffffffff81e76410 t sdma_v5_0_sw_fini +ffffffff81e76490 t sdma_v5_0_hw_init +ffffffff81e77740 t sdma_v5_0_hw_fini +ffffffff81e777a0 t sdma_v5_0_suspend +ffffffff81e77800 t sdma_v5_0_resume +ffffffff81e77810 t sdma_v5_0_is_idle +ffffffff81e778a0 t sdma_v5_0_wait_for_idle +ffffffff81e77960 t sdma_v5_0_soft_reset +ffffffff81e77990 t sdma_v5_0_set_clockgating_state +ffffffff81e77b90 t sdma_v5_0_set_powergating_state +ffffffff81e77bc0 t sdma_v5_0_get_clockgating_state +ffffffff81e77c50 t sdma_v5_0_ring_get_rptr +ffffffff81e77cb0 t sdma_v5_0_ring_get_wptr +ffffffff81e77e50 t sdma_v5_0_ring_set_wptr +ffffffff81e781b0 t sdma_v5_0_ring_emit_ib +ffffffff81e78470 t sdma_v5_0_ring_emit_fence +ffffffff81e788d0 t sdma_v5_0_ring_emit_pipeline_sync +ffffffff81e78b50 t sdma_v5_0_ring_emit_vm_flush +ffffffff81e78b70 t sdma_v5_0_ring_emit_hdp_flush +ffffffff81e78e10 t sdma_v5_0_ring_test_ring +ffffffff81e791e0 t sdma_v5_0_ring_test_ib +ffffffff81e79500 t sdma_v5_0_ring_insert_nop +ffffffff81e79620 t sdma_v5_0_ring_pad_ib +ffffffff81e79740 t sdma_v5_0_ring_init_cond_exec +ffffffff81e79970 t sdma_v5_0_ring_patch_cond_exec +ffffffff81e79a30 t sdma_v5_0_ring_emit_wreg +ffffffff81e79b80 t sdma_v5_0_ring_emit_reg_wait +ffffffff81e79e00 t sdma_v5_0_ring_emit_reg_write_reg_wait +ffffffff81e79e70 t sdma_v5_0_ring_preempt_ib +ffffffff81e79fb0 t sdma_v5_0_ring_emit_mem_sync +ffffffff81e7a1c0 t sdma_v5_0_emit_copy_buffer +ffffffff81e7a280 t sdma_v5_0_emit_fill_buffer +ffffffff81e7a310 t sdma_v5_0_vm_copy_pte +ffffffff81e7a3d0 t sdma_v5_0_vm_write_pte +ffffffff81e7a4a0 t sdma_v5_0_vm_set_pte_pde +ffffffff81e7a5a0 t sdma_v5_0_set_trap_irq_state +ffffffff81e7a630 t sdma_v5_0_process_trap_irq +ffffffff81e7a740 t sdma_v5_0_process_illegal_inst_irq +ffffffff81e7a770 t sdma_v5_0_mqd_init +ffffffff81e7a850 t sdma_v5_0_ctx_switch_enable +ffffffff81e7ab50 t sdma_v5_0_enable +ffffffff81e7b000 t sdma_v5_2_early_init +ffffffff81e7b170 t sdma_v5_2_sw_init +ffffffff81e7b3a0 t sdma_v5_2_sw_fini +ffffffff81e7b420 t sdma_v5_2_hw_init +ffffffff81e7b750 t sdma_v5_2_hw_fini +ffffffff81e7b7b0 t sdma_v5_2_suspend +ffffffff81e7b810 t sdma_v5_2_resume +ffffffff81e7b820 t sdma_v5_2_is_idle +ffffffff81e7b8d0 t sdma_v5_2_wait_for_idle +ffffffff81e7b9d0 t sdma_v5_2_soft_reset +ffffffff81e7bc70 t sdma_v5_2_set_clockgating_state +ffffffff81e7bf80 t sdma_v5_2_set_powergating_state +ffffffff81e7bfb0 t sdma_v5_2_get_clockgating_state +ffffffff81e7c040 t sdma_v5_2_ring_get_rptr +ffffffff81e7c0a0 t sdma_v5_2_ring_get_wptr +ffffffff81e7c1e0 t sdma_v5_2_ring_set_wptr +ffffffff81e7c3a0 t sdma_v5_2_ring_emit_ib +ffffffff81e7c660 t sdma_v5_2_ring_emit_fence +ffffffff81e7cac0 t sdma_v5_2_ring_emit_pipeline_sync +ffffffff81e7cd40 t sdma_v5_2_ring_emit_vm_flush +ffffffff81e7cd60 t sdma_v5_2_ring_emit_hdp_flush +ffffffff81e7d000 t sdma_v5_2_ring_test_ring +ffffffff81e7d3d0 t sdma_v5_2_ring_test_ib +ffffffff81e7d6f0 t sdma_v5_2_ring_insert_nop +ffffffff81e7d810 t sdma_v5_2_ring_pad_ib +ffffffff81e7d930 t sdma_v5_2_ring_init_cond_exec +ffffffff81e7db60 t sdma_v5_2_ring_patch_cond_exec +ffffffff81e7dc20 t sdma_v5_2_ring_emit_wreg +ffffffff81e7dd70 t sdma_v5_2_ring_emit_reg_wait +ffffffff81e7dff0 t sdma_v5_2_ring_emit_reg_write_reg_wait +ffffffff81e7e060 t sdma_v5_2_ring_preempt_ib +ffffffff81e7e1d0 t sdma_v5_2_ring_emit_mem_sync +ffffffff81e7e3e0 t sdma_v5_2_emit_copy_buffer +ffffffff81e7e4a0 t sdma_v5_2_emit_fill_buffer +ffffffff81e7e530 t sdma_v5_2_vm_copy_pte +ffffffff81e7e5f0 t sdma_v5_2_vm_write_pte +ffffffff81e7e6c0 t sdma_v5_2_vm_set_pte_pde +ffffffff81e7e7c0 t sdma_v5_2_set_trap_irq_state +ffffffff81e7e880 t sdma_v5_2_process_trap_irq +ffffffff81e7e9c0 t sdma_v5_2_process_illegal_inst_irq +ffffffff81e7e9f0 t sdma_v5_2_mqd_init +ffffffff81e7ead0 t sdma_v5_2_ctx_switch_enable +ffffffff81e7eed0 t sdma_v5_2_enable +ffffffff81e7f2e0 t sdma_v5_2_gfx_resume +ffffffff81e81000 t sdma_v6_0_early_init +ffffffff81e81140 t sdma_v6_0_sw_init +ffffffff81e81320 t sdma_v6_0_sw_fini +ffffffff81e813a0 t sdma_v6_0_hw_init +ffffffff81e813b0 t sdma_v6_0_hw_fini +ffffffff81e81400 t sdma_v6_0_suspend +ffffffff81e81450 t sdma_v6_0_resume +ffffffff81e81460 t sdma_v6_0_is_idle +ffffffff81e814f0 t sdma_v6_0_wait_for_idle +ffffffff81e815b0 t sdma_v6_0_check_soft_reset +ffffffff81e81670 t sdma_v6_0_soft_reset +ffffffff81e81b10 t sdma_v6_0_set_clockgating_state +ffffffff81e81b40 t sdma_v6_0_set_powergating_state +ffffffff81e81b70 t sdma_v6_0_get_clockgating_state +ffffffff81e81ba0 t sdma_v6_0_ring_get_rptr +ffffffff81e81c00 t sdma_v6_0_ring_get_wptr +ffffffff81e81c70 t sdma_v6_0_ring_set_wptr +ffffffff81e81fd0 t sdma_v6_0_ring_emit_ib +ffffffff81e82290 t sdma_v6_0_ring_emit_fence +ffffffff81e826f0 t sdma_v6_0_ring_emit_pipeline_sync +ffffffff81e82970 t sdma_v6_0_ring_emit_vm_flush +ffffffff81e82990 t sdma_v6_0_ring_emit_hdp_flush +ffffffff81e82c30 t sdma_v6_0_ring_test_ring +ffffffff81e83000 t sdma_v6_0_ring_test_ib +ffffffff81e83320 t sdma_v6_0_ring_insert_nop +ffffffff81e83440 t sdma_v6_0_ring_pad_ib +ffffffff81e83560 t sdma_v6_0_ring_init_cond_exec +ffffffff81e83790 t sdma_v6_0_ring_patch_cond_exec +ffffffff81e83850 t sdma_v6_0_ring_emit_wreg +ffffffff81e839a0 t sdma_v6_0_ring_emit_reg_wait +ffffffff81e83c20 t sdma_v6_0_ring_emit_reg_write_reg_wait +ffffffff81e83c90 t sdma_v6_0_ring_preempt_ib +ffffffff81e83de0 t sdma_v6_0_ring_emit_mem_sync +ffffffff81e83ff0 t sdma_v6_0_emit_copy_buffer +ffffffff81e840b0 t sdma_v6_0_emit_fill_buffer +ffffffff81e84140 t sdma_v6_0_vm_copy_pte +ffffffff81e84200 t sdma_v6_0_vm_write_pte +ffffffff81e842d0 t sdma_v6_0_vm_set_pte_pde +ffffffff81e843d0 t sdma_v6_0_set_trap_irq_state +ffffffff81e84460 t sdma_v6_0_process_trap_irq +ffffffff81e84590 t sdma_v6_0_process_illegal_inst_irq +ffffffff81e845c0 t sdma_v6_0_mqd_init +ffffffff81e846d0 t sdma_v6_0_start +ffffffff81e84950 t sdma_v6_0_enable +ffffffff81e84ad0 t sdma_v6_0_gfx_resume +ffffffff81e85b50 t sdma_v6_0_gfx_stop +ffffffff81e86000 T sienna_cichlid_reset_init +ffffffff81e860c0 t sienna_cichlid_async_reset +ffffffff81e86120 t sienna_cichlid_get_reset_handler +ffffffff81e86180 T sienna_cichlid_reset_fini +ffffffff81e861d0 t sienna_cichlid_mode2_prepare_hwcontext +ffffffff81e86320 t sienna_cichlid_mode2_perform_reset +ffffffff81e863a0 t sienna_cichlid_mode2_restore_hwcontext +ffffffff81e866a0 t sienna_cichlid_mode2_reset +ffffffff81e87000 T smu_v11_0_i2c_control_init +ffffffff81e870c0 T smu_v11_0_i2c_control_fini +ffffffff81e87100 t smu_v11_0_i2c_xfer +ffffffff81e881e0 t smu_v11_0_i2c_func +ffffffff81e88210 t smu_v11_0_i2c_enable +ffffffff81e88350 t smu_v11_0_i2c_abort +ffffffff81e88450 t lock_bus +ffffffff81e884e0 t trylock_bus +ffffffff81e88530 t unlock_bus +ffffffff81e89000 t smuio_v11_0_get_rom_index_offset +ffffffff81e89030 t smuio_v11_0_get_rom_data_offset +ffffffff81e89060 t smuio_v11_0_update_rom_clock_gating +ffffffff81e891a0 t smuio_v11_0_get_clock_gating_state +ffffffff81e8a000 t smuio_v11_0_6_get_rom_index_offset +ffffffff81e8a030 t smuio_v11_0_6_get_rom_data_offset +ffffffff81e8a060 t smuio_v11_0_6_update_rom_clock_gating +ffffffff81e8a1a0 t smuio_v11_0_6_get_clock_gating_state +ffffffff81e8b000 t smuio_v13_0_get_rom_index_offset +ffffffff81e8b030 t smuio_v13_0_get_rom_data_offset +ffffffff81e8b060 t smuio_v13_0_update_rom_clock_gating +ffffffff81e8b1a0 t smuio_v13_0_get_clock_gating_state +ffffffff81e8b230 t smuio_v13_0_get_die_id +ffffffff81e8b2b0 t smuio_v13_0_get_socket_id +ffffffff81e8b330 t smuio_v13_0_is_host_gpu_xgmi_supported +ffffffff81e8c000 t smuio_v13_0_6_get_rom_index_offset +ffffffff81e8c030 t smuio_v13_0_6_get_rom_data_offset +ffffffff81e8d000 t smuio_v9_0_get_rom_index_offset +ffffffff81e8d030 t smuio_v9_0_get_rom_data_offset +ffffffff81e8d060 t smuio_v9_0_update_rom_clock_gating +ffffffff81e8d1a0 t smuio_v9_0_get_clock_gating_state +ffffffff81e8e000 T soc15_grbm_select +ffffffff81e8e080 T soc15_program_register_sequence +ffffffff81e8e280 T soc15_set_virt_ops +ffffffff81e8e2f0 t soc15_common_early_init +ffffffff81e8e680 t soc15_common_late_init +ffffffff81e8e6c0 t soc15_common_sw_init +ffffffff81e8e720 t soc15_common_sw_fini +ffffffff81e8e770 t soc15_common_hw_init +ffffffff81e8e8a0 t soc15_common_hw_fini +ffffffff81e8e970 t soc15_common_suspend +ffffffff81e8e9b0 t soc15_common_resume +ffffffff81e8e9f0 t soc15_common_is_idle +ffffffff81e8ea20 t soc15_common_wait_for_idle +ffffffff81e8ea50 t soc15_common_soft_reset +ffffffff81e8ea80 t soc15_common_set_clockgating_state +ffffffff81e8edc0 t soc15_common_set_powergating_state +ffffffff81e8edf0 t soc15_common_get_clockgating_state +ffffffff81e8eed0 t soc15_pcie_rreg +ffffffff81e8ef30 t soc15_pcie_wreg +ffffffff81e8ef90 t soc15_pcie_rreg64 +ffffffff81e8eff0 t soc15_pcie_wreg64 +ffffffff81e8f050 t soc15_uvd_ctx_rreg +ffffffff81e8f0f0 t soc15_uvd_ctx_wreg +ffffffff81e8f170 t soc15_didt_rreg +ffffffff81e8f200 t soc15_didt_wreg +ffffffff81e8f280 t soc15_gc_cac_rreg +ffffffff81e8f390 t soc15_gc_cac_wreg +ffffffff81e8f4a0 t soc15_se_cac_rreg +ffffffff81e8f5b0 t soc15_se_cac_wreg +ffffffff81e8f6c0 t soc15_read_disabled_bios +ffffffff81e8f6f0 t soc15_read_register +ffffffff81e8f7f0 t soc15_vga_set_state +ffffffff81e8f820 t soc15_asic_reset +ffffffff81e8f920 t soc15_asic_reset_method +ffffffff81e8faa0 t soc15_get_xclk +ffffffff81e8faf0 t soc15_set_uvd_clocks +ffffffff81e8fb20 t soc15_set_vce_clocks +ffffffff81e8fb50 t soc15_get_config_memsize +ffffffff81e8fb70 t soc15_need_full_reset +ffffffff81e8fba0 t soc15_get_pcie_usage +ffffffff81e8fcd0 t soc15_need_reset_on_init +ffffffff81e8fd70 t soc15_get_pcie_replay_count +ffffffff81e8fde0 t soc15_supports_baco +ffffffff81e8fe40 t soc15_pre_asic_init +ffffffff81e8fe50 t soc15_query_video_codecs +ffffffff81e8fef0 t vega20_get_pcie_usage +ffffffff81e91000 T soc21_grbm_select +ffffffff81e91080 t soc21_common_early_init +ffffffff81e912a0 t soc21_common_late_init +ffffffff81e912d0 t soc21_common_sw_init +ffffffff81e91300 t soc21_common_sw_fini +ffffffff81e91330 t soc21_common_hw_init +ffffffff81e913f0 t soc21_common_hw_fini +ffffffff81e91450 t soc21_common_suspend +ffffffff81e914b0 t soc21_common_resume +ffffffff81e91570 t soc21_common_is_idle +ffffffff81e915a0 t soc21_common_wait_for_idle +ffffffff81e915d0 t soc21_common_soft_reset +ffffffff81e91600 t soc21_common_set_clockgating_state +ffffffff81e916b0 t soc21_common_set_powergating_state +ffffffff81e91710 t soc21_common_get_clockgating_state +ffffffff81e91750 t soc21_pcie_rreg +ffffffff81e917b0 t soc21_pcie_wreg +ffffffff81e91810 t soc21_pcie_rreg64 +ffffffff81e91870 t soc21_pcie_wreg64 +ffffffff81e918d0 t soc21_didt_rreg +ffffffff81e91960 t soc21_didt_wreg +ffffffff81e919e0 t soc21_read_disabled_bios +ffffffff81e91a10 t soc21_read_register +ffffffff81e91b00 t soc21_vga_set_state +ffffffff81e91b30 t soc21_asic_reset +ffffffff81e91c00 t soc21_asic_reset_method +ffffffff81e91cc0 t soc21_get_xclk +ffffffff81e91cf0 t soc21_set_uvd_clocks +ffffffff81e91d20 t soc21_set_vce_clocks +ffffffff81e91d50 t soc21_get_config_memsize +ffffffff81e91d70 t soc21_need_full_reset +ffffffff81e91dd0 t soc21_init_doorbell_index +ffffffff81e91ef0 t soc21_need_reset_on_init +ffffffff81e91f80 t soc21_get_pcie_replay_count +ffffffff81e91fb0 t soc21_pre_asic_init +ffffffff81e91fe0 t soc21_update_umd_stable_pstate +ffffffff81e92050 t soc21_query_video_codecs +ffffffff81e93000 t tonga_ih_early_init +ffffffff81e93050 t tonga_ih_sw_init +ffffffff81e930d0 t tonga_ih_sw_fini +ffffffff81e93110 t tonga_ih_hw_init +ffffffff81e932f0 t tonga_ih_hw_fini +ffffffff81e93390 t tonga_ih_suspend +ffffffff81e93430 t tonga_ih_resume +ffffffff81e93470 t tonga_ih_is_idle +ffffffff81e934b0 t tonga_ih_wait_for_idle +ffffffff81e93540 t tonga_ih_check_soft_reset +ffffffff81e93590 t tonga_ih_pre_soft_reset +ffffffff81e93630 t tonga_ih_soft_reset +ffffffff81e936f0 t tonga_ih_post_soft_reset +ffffffff81e93730 t tonga_ih_set_clockgating_state +ffffffff81e93760 t tonga_ih_set_powergating_state +ffffffff81e93790 t tonga_ih_get_wptr +ffffffff81e93880 t tonga_ih_decode_iv +ffffffff81e938f0 t tonga_ih_set_rptr +ffffffff81e94000 t umc_v6_0_init_registers +ffffffff81e95000 t umc_v6_1_query_ras_error_count +ffffffff81e954e0 t umc_v6_1_query_ras_error_address +ffffffff81e957c0 t umc_v6_1_err_cnt_init +ffffffff81e96000 t umc_v6_7_query_ras_error_count +ffffffff81e96410 t umc_v6_7_query_ras_error_address +ffffffff81e96580 t umc_v6_7_query_ras_poison_mode +ffffffff81e965d0 t umc_v6_7_convert_error_address +ffffffff81e968c0 t umc_v6_7_ecc_info_query_ras_error_count +ffffffff81e96af0 t umc_v6_7_ecc_info_query_ras_error_address +ffffffff81e97000 t umc_v8_10_query_ras_error_count +ffffffff81e97280 t umc_v8_10_query_ras_error_address +ffffffff81e975b0 t umc_v8_10_err_cnt_init +ffffffff81e97730 t umc_v8_10_query_ras_poison_mode +ffffffff81e98000 t umc_v8_7_query_ras_error_count +ffffffff81e98300 t umc_v8_7_query_ras_error_address +ffffffff81e984b0 t umc_v8_7_err_cnt_init +ffffffff81e98600 t umc_v8_7_ecc_info_query_ras_error_count +ffffffff81e98730 t umc_v8_7_ecc_info_query_ras_error_address +ffffffff81e99000 t uvd_v5_0_early_init +ffffffff81e99050 t uvd_v5_0_sw_init +ffffffff81e99130 t uvd_v5_0_sw_fini +ffffffff81e99180 t uvd_v5_0_hw_init +ffffffff81e99690 t uvd_v5_0_hw_fini +ffffffff81e99710 t uvd_v5_0_suspend +ffffffff81e99800 t uvd_v5_0_resume +ffffffff81e99850 t uvd_v5_0_is_idle +ffffffff81e99890 t uvd_v5_0_wait_for_idle +ffffffff81e99910 t uvd_v5_0_soft_reset +ffffffff81e999b0 t uvd_v5_0_set_clockgating_state +ffffffff81e99b50 t uvd_v5_0_set_powergating_state +ffffffff81e99b90 t uvd_v5_0_get_clockgating_state +ffffffff81e99c10 t uvd_v5_0_ring_get_rptr +ffffffff81e99c50 t uvd_v5_0_ring_get_wptr +ffffffff81e99c90 t uvd_v5_0_ring_set_wptr +ffffffff81e99cb0 t uvd_v5_0_ring_emit_ib +ffffffff81e99f20 t uvd_v5_0_ring_emit_fence +ffffffff81e9a4d0 t uvd_v5_0_ring_test_ring +ffffffff81e9a670 t uvd_v5_0_ring_insert_nop +ffffffff81e9a7d0 t uvd_v5_0_set_interrupt_state +ffffffff81e9a800 t uvd_v5_0_process_interrupt +ffffffff81e9a860 t uvd_v5_0_stop +ffffffff81e9a970 t uvd_v5_0_start +ffffffff81e9c000 t uvd_v6_0_early_init +ffffffff81e9c140 t uvd_v6_0_sw_init +ffffffff81e9c450 t uvd_v6_0_sw_fini +ffffffff81e9c500 t uvd_v6_0_hw_init +ffffffff81e9cac0 t uvd_v6_0_hw_fini +ffffffff81e9cb40 t uvd_v6_0_suspend +ffffffff81e9cc30 t uvd_v6_0_resume +ffffffff81e9cc80 t uvd_v6_0_is_idle +ffffffff81e9ccc0 t uvd_v6_0_wait_for_idle +ffffffff81e9cd40 t uvd_v6_0_check_soft_reset +ffffffff81e9cdb0 t uvd_v6_0_pre_soft_reset +ffffffff81e9cdf0 t uvd_v6_0_soft_reset +ffffffff81e9ceb0 t uvd_v6_0_post_soft_reset +ffffffff81e9cf50 t uvd_v6_0_set_clockgating_state +ffffffff81e9d0e0 t uvd_v6_0_set_powergating_state +ffffffff81e9d150 t uvd_v6_0_get_clockgating_state +ffffffff81e9d1e0 t uvd_v6_0_ring_get_rptr +ffffffff81e9d220 t uvd_v6_0_ring_get_wptr +ffffffff81e9d260 t uvd_v6_0_ring_set_wptr +ffffffff81e9d280 t uvd_v6_0_ring_emit_ib +ffffffff81e9d5e0 t uvd_v6_0_ring_emit_fence +ffffffff81e9db90 t uvd_v6_0_ring_emit_pipeline_sync +ffffffff81e9df80 t uvd_v6_0_ring_emit_vm_flush +ffffffff81e9e2e0 t uvd_v6_0_ring_emit_hdp_flush +ffffffff81e9e310 t uvd_v6_0_ring_test_ring +ffffffff81e9e4b0 t uvd_v6_0_ring_insert_nop +ffffffff81e9e610 t uvd_v6_0_ring_emit_wreg +ffffffff81e9e890 t uvd_v6_0_enc_ring_get_rptr +ffffffff81e9e8f0 t uvd_v6_0_enc_ring_get_wptr +ffffffff81e9e950 t uvd_v6_0_enc_ring_set_wptr +ffffffff81e9e990 t uvd_v6_0_enc_ring_emit_ib +ffffffff81e9ebd0 t uvd_v6_0_enc_ring_emit_fence +ffffffff81e9ee10 t uvd_v6_0_enc_ring_emit_pipeline_sync +ffffffff81e9efc0 t uvd_v6_0_enc_ring_emit_vm_flush +ffffffff81e9f1d0 t uvd_v6_0_enc_ring_test_ring +ffffffff81e9f320 t uvd_v6_0_enc_ring_test_ib +ffffffff81e9f8d0 t uvd_v6_0_enc_ring_insert_end +ffffffff81e9f960 t uvd_v6_0_set_interrupt_state +ffffffff81e9f990 t uvd_v6_0_process_interrupt +ffffffff81e9fa80 t uvd_v6_0_stop +ffffffff81e9fb90 t uvd_v6_0_start +ffffffff81ea1000 t uvd_v7_0_early_init +ffffffff81ea1270 t uvd_v7_0_sw_init +ffffffff81ea15e0 t uvd_v7_0_sw_fini +ffffffff81ea16e0 t uvd_v7_0_hw_init +ffffffff81ea4600 t uvd_v7_0_hw_fini +ffffffff81ea4900 t uvd_v7_0_suspend +ffffffff81ea49b0 t uvd_v7_0_resume +ffffffff81ea4a00 t uvd_v7_0_set_clockgating_state +ffffffff81ea4a30 t uvd_v7_0_ring_get_rptr +ffffffff81ea4ac0 t uvd_v7_0_ring_get_wptr +ffffffff81ea4b50 t uvd_v7_0_ring_set_wptr +ffffffff81ea4bd0 t uvd_v7_0_ring_patch_cs_in_place +ffffffff81ea4c50 t uvd_v7_0_ring_emit_ib +ffffffff81ea4ff0 t uvd_v7_0_ring_emit_fence +ffffffff81ea5640 t uvd_v7_0_ring_emit_vm_flush +ffffffff81ea56b0 t uvd_v7_0_ring_emit_hdp_flush +ffffffff81ea56e0 t uvd_v7_0_ring_test_ring +ffffffff81ea5960 t uvd_v7_0_ring_insert_nop +ffffffff81ea5af0 t uvd_v7_0_ring_emit_wreg +ffffffff81ea5dc0 t uvd_v7_0_ring_emit_reg_wait +ffffffff81ea6160 t uvd_v7_0_enc_ring_get_rptr +ffffffff81ea6250 t uvd_v7_0_enc_ring_get_wptr +ffffffff81ea6350 t uvd_v7_0_enc_ring_set_wptr +ffffffff81ea6450 t uvd_v7_0_enc_ring_emit_ib +ffffffff81ea6690 t uvd_v7_0_enc_ring_emit_fence +ffffffff81ea68d0 t uvd_v7_0_enc_ring_emit_vm_flush +ffffffff81ea6940 t uvd_v7_0_enc_ring_test_ring +ffffffff81ea6aa0 t uvd_v7_0_enc_ring_test_ib +ffffffff81ea7050 t uvd_v7_0_enc_ring_insert_end +ffffffff81ea70e0 t uvd_v7_0_enc_ring_emit_wreg +ffffffff81ea7230 t uvd_v7_0_enc_ring_emit_reg_wait +ffffffff81ea73f0 t uvd_v7_0_set_interrupt_state +ffffffff81ea7420 t uvd_v7_0_process_interrupt +ffffffff81ea8000 t vce_v3_0_early_init +ffffffff81ea8180 t vce_v3_0_sw_init +ffffffff81ea82d0 t vce_v3_0_sw_fini +ffffffff81ea8320 t vce_v3_0_hw_init +ffffffff81ea8400 t vce_v3_0_hw_fini +ffffffff81ea84e0 t vce_v3_0_suspend +ffffffff81ea85b0 t vce_v3_0_resume +ffffffff81ea8600 t vce_v3_0_is_idle +ffffffff81ea8660 t vce_v3_0_wait_for_idle +ffffffff81ea8710 t vce_v3_0_check_soft_reset +ffffffff81ea8800 t vce_v3_0_pre_soft_reset +ffffffff81ea88a0 t vce_v3_0_soft_reset +ffffffff81ea8960 t vce_v3_0_post_soft_reset +ffffffff81ea8ac0 t vce_v3_0_set_clockgating_state +ffffffff81ea8da0 t vce_v3_0_set_powergating_state +ffffffff81ea95e0 t vce_v3_0_get_clockgating_state +ffffffff81ea96a0 t vce_v3_0_ring_get_rptr +ffffffff81ea9770 t vce_v3_0_ring_get_wptr +ffffffff81ea9840 t vce_v3_0_ring_set_wptr +ffffffff81ea98f0 t vce_v3_0_ring_emit_ib +ffffffff81ea9b30 t vce_v3_0_emit_pipeline_sync +ffffffff81ea9ce0 t vce_v3_0_emit_vm_flush +ffffffff81ea9f50 t vce_v3_0_set_interrupt_state +ffffffff81ea9fc0 t vce_v3_0_process_interrupt +ffffffff81eaa080 t vce_v3_0_stop +ffffffff81eab000 t vce_v4_0_early_init +ffffffff81eab0b0 t vce_v4_0_sw_init +ffffffff81eab2e0 t vce_v4_0_sw_fini +ffffffff81eab360 t vce_v4_0_hw_init +ffffffff81eabb30 t vce_v4_0_hw_fini +ffffffff81eabbd0 t vce_v4_0_suspend +ffffffff81eabdf0 t vce_v4_0_resume +ffffffff81eabe90 t vce_v4_0_set_clockgating_state +ffffffff81eabec0 t vce_v4_0_set_powergating_state +ffffffff81eabfa0 t vce_v4_0_ring_get_rptr +ffffffff81eac000 t vce_v4_0_ring_get_wptr +ffffffff81eac090 t vce_v4_0_ring_set_wptr +ffffffff81eac110 t vce_v4_0_ring_emit_ib +ffffffff81eac350 t vce_v4_0_ring_emit_fence +ffffffff81eac590 t vce_v4_0_emit_vm_flush +ffffffff81eac600 t vce_v4_0_ring_insert_end +ffffffff81eac690 t vce_v4_0_emit_wreg +ffffffff81eac7e0 t vce_v4_0_emit_reg_wait +ffffffff81eac9a0 t vce_v4_0_set_interrupt_state +ffffffff81eaca30 t vce_v4_0_process_interrupt +ffffffff81eacac0 t vce_v4_0_start +ffffffff81ead4a0 t vce_v4_0_stop +ffffffff81eae000 T vcn_dec_sw_ring_emit_fence +ffffffff81eae240 T vcn_dec_sw_ring_insert_end +ffffffff81eae2d0 T vcn_dec_sw_ring_emit_ib +ffffffff81eae510 T vcn_dec_sw_ring_emit_reg_wait +ffffffff81eae6d0 T vcn_dec_sw_ring_emit_vm_flush +ffffffff81eae740 T vcn_dec_sw_ring_emit_wreg +ffffffff81eaf000 T vcn_v1_0_set_pg_for_begin_use +ffffffff81eaf150 T vcn_v1_0_ring_end_use +ffffffff81eaf1c0 t vcn_v1_0_early_init +ffffffff81eaf330 t vcn_v1_0_sw_init +ffffffff81eaf5c0 t vcn_v1_0_sw_fini +ffffffff81eaf620 t vcn_v1_0_hw_init +ffffffff81eaf700 t vcn_v1_0_hw_fini +ffffffff81eaf800 t vcn_v1_0_suspend +ffffffff81eaf870 t vcn_v1_0_resume +ffffffff81eaf960 t vcn_v1_0_is_idle +ffffffff81eaf9e0 t vcn_v1_0_wait_for_idle +ffffffff81eafad0 t vcn_v1_0_set_clockgating_state +ffffffff81eafb80 t vcn_v1_0_set_powergating_state +ffffffff81eb0510 t vcn_v1_0_dec_ring_get_rptr +ffffffff81eb0590 t vcn_v1_0_dec_ring_get_wptr +ffffffff81eb0610 t vcn_v1_0_dec_ring_set_wptr +ffffffff81eb0720 t vcn_v1_0_ring_patch_cs_in_place +ffffffff81eb08e0 t vcn_v1_0_dec_ring_emit_ib +ffffffff81eb0c70 t vcn_v1_0_dec_ring_emit_fence +ffffffff81eb1290 t vcn_v1_0_dec_ring_emit_vm_flush +ffffffff81eb1300 t vcn_v1_0_dec_ring_insert_nop +ffffffff81eb1480 t vcn_v1_0_dec_ring_insert_start +ffffffff81eb1650 t vcn_v1_0_dec_ring_insert_end +ffffffff81eb1760 t vcn_v1_0_ring_begin_use +ffffffff81eb1800 t vcn_v1_0_dec_ring_emit_wreg +ffffffff81eb1ab0 t vcn_v1_0_dec_ring_emit_reg_wait +ffffffff81eb1e30 t vcn_v1_0_enc_ring_get_rptr +ffffffff81eb1f00 t vcn_v1_0_enc_ring_get_wptr +ffffffff81eb1fd0 t vcn_v1_0_enc_ring_set_wptr +ffffffff81eb2080 t vcn_v1_0_enc_ring_emit_ib +ffffffff81eb22c0 t vcn_v1_0_enc_ring_emit_fence +ffffffff81eb2500 t vcn_v1_0_enc_ring_emit_vm_flush +ffffffff81eb2570 t vcn_v1_0_enc_ring_insert_end +ffffffff81eb2600 t vcn_v1_0_enc_ring_emit_wreg +ffffffff81eb2750 t vcn_v1_0_enc_ring_emit_reg_wait +ffffffff81eb2910 t vcn_v1_0_set_interrupt_state +ffffffff81eb2940 t vcn_v1_0_process_interrupt +ffffffff81eb29e0 t vcn_v1_0_idle_work_handler +ffffffff81eb2b60 t vcn_v1_0_pause_dpg_mode +ffffffff81eb3c80 t vcn_v1_0_enable_clock_gating +ffffffff81eb4090 t vcn_v1_0_disable_clock_gating +ffffffff81eb4620 t vcn_1_0_enable_static_power_gating +ffffffff81eb4840 t vcn_v1_0_start_dpg_mode +ffffffff81eb8470 t vcn_v1_0_start_spg_mode +ffffffff81eba690 t vcn_v1_0_clock_gating_dpg_mode +ffffffff81ebb000 T vcn_v2_0_dec_ring_insert_start +ffffffff81ebb1c0 T vcn_v2_0_dec_ring_insert_end +ffffffff81ebb2c0 T vcn_v2_0_dec_ring_insert_nop +ffffffff81ebb430 T vcn_v2_0_dec_ring_emit_fence +ffffffff81ebb9f0 T vcn_v2_0_dec_ring_emit_ib +ffffffff81ebbd50 T vcn_v2_0_dec_ring_emit_reg_wait +ffffffff81ebc0a0 T vcn_v2_0_dec_ring_emit_vm_flush +ffffffff81ebc110 T vcn_v2_0_dec_ring_emit_wreg +ffffffff81ebc3a0 T vcn_v2_0_enc_ring_emit_fence +ffffffff81ebc5e0 T vcn_v2_0_enc_ring_insert_end +ffffffff81ebc670 T vcn_v2_0_enc_ring_emit_ib +ffffffff81ebc8b0 T vcn_v2_0_enc_ring_emit_reg_wait +ffffffff81ebca70 T vcn_v2_0_enc_ring_emit_vm_flush +ffffffff81ebcae0 T vcn_v2_0_enc_ring_emit_wreg +ffffffff81ebcc30 T vcn_v2_0_dec_ring_test_ring +ffffffff81ebcec0 t vcn_v2_0_early_init +ffffffff81ebd030 t vcn_v2_0_sw_init +ffffffff81ebd340 t vcn_v2_0_sw_fini +ffffffff81ebd3c0 t vcn_v2_0_hw_init +ffffffff81ebdd70 t vcn_v2_0_hw_fini +ffffffff81ebde70 t vcn_v2_0_suspend +ffffffff81ebde90 t vcn_v2_0_resume +ffffffff81ebdee0 t vcn_v2_0_is_idle +ffffffff81ebdf60 t vcn_v2_0_wait_for_idle +ffffffff81ebe050 t vcn_v2_0_set_clockgating_state +ffffffff81ebe0e0 t vcn_v2_0_set_powergating_state +ffffffff81ec03a0 t vcn_v2_0_dec_ring_get_rptr +ffffffff81ec0420 t vcn_v2_0_dec_ring_get_wptr +ffffffff81ec04c0 t vcn_v2_0_dec_ring_set_wptr +ffffffff81ec05f0 t vcn_v2_0_enc_ring_get_rptr +ffffffff81ec06c0 t vcn_v2_0_enc_ring_get_wptr +ffffffff81ec07b0 t vcn_v2_0_enc_ring_set_wptr +ffffffff81ec08a0 t vcn_v2_0_set_interrupt_state +ffffffff81ec08d0 t vcn_v2_0_process_interrupt +ffffffff81ec0970 t vcn_v2_0_pause_dpg_mode +ffffffff81ec12d0 t vcn_v2_0_enable_clock_gating +ffffffff81ec1550 t vcn_v2_0_disable_clock_gating +ffffffff81ec1950 t vcn_v2_0_enable_static_power_gating +ffffffff81ec1b30 t vcn_v2_0_start_dpg_mode +ffffffff81ec65f0 t vcn_v2_0_clock_gating_dpg_mode +ffffffff81ec7000 t vcn_v2_6_query_poison_status +ffffffff81ec70c0 t vcn_v2_5_early_init +ffffffff81ec7400 t vcn_v2_5_sw_init +ffffffff81ec7880 t vcn_v2_5_sw_fini +ffffffff81ec7950 t vcn_v2_5_hw_init +ffffffff81ec8410 t vcn_v2_5_hw_fini +ffffffff81ec8550 t vcn_v2_5_suspend +ffffffff81ec8570 t vcn_v2_5_resume +ffffffff81ec85c0 t vcn_v2_5_is_idle +ffffffff81ec86b0 t vcn_v2_5_wait_for_idle +ffffffff81ec87e0 t vcn_v2_5_set_clockgating_state +ffffffff81ec8850 t vcn_v2_5_set_powergating_state +ffffffff81ec9130 t vcn_v2_5_dec_ring_get_rptr +ffffffff81ec91c0 t vcn_v2_5_dec_ring_get_wptr +ffffffff81ec9270 t vcn_v2_5_dec_ring_set_wptr +ffffffff81ec9310 t vcn_v2_5_enc_ring_get_rptr +ffffffff81ec9400 t vcn_v2_5_enc_ring_get_wptr +ffffffff81ec9500 t vcn_v2_5_enc_ring_set_wptr +ffffffff81ec95f0 t vcn_v2_5_set_interrupt_state +ffffffff81ec9620 t vcn_v2_5_process_interrupt +ffffffff81ec9740 t vcn_v2_5_pause_dpg_mode +ffffffff81eca0b0 t vcn_v2_5_enable_clock_gating +ffffffff81eca3b0 t vcn_v2_5_disable_clock_gating +ffffffff81eca8d0 t vcn_v2_5_start +ffffffff81ece4d0 t vcn_v2_5_clock_gating_dpg_mode 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vcn_v3_0_enable_clock_gating +ffffffff81ed75e0 t vcn_v3_0_disable_clock_gating +ffffffff81ed7b80 t vcn_v3_0_start_dpg_mode +ffffffff81edc920 t vcn_v3_0_clock_gating_dpg_mode +ffffffff81ede000 t vcn_v4_0_early_init +ffffffff81ede120 t vcn_v4_0_sw_init +ffffffff81ede350 t vcn_v4_0_sw_fini +ffffffff81ede430 t vcn_v4_0_hw_init +ffffffff81edee60 t vcn_v4_0_hw_fini +ffffffff81edef60 t vcn_v4_0_suspend +ffffffff81edef80 t vcn_v4_0_resume +ffffffff81edefd0 t vcn_v4_0_is_idle +ffffffff81edf0c0 t vcn_v4_0_wait_for_idle +ffffffff81edf1f0 t vcn_v4_0_set_clockgating_state +ffffffff81edf300 t vcn_v4_0_set_powergating_state +ffffffff81ee18b0 t vcn_v4_0_unified_ring_get_rptr +ffffffff81ee1990 t vcn_v4_0_unified_ring_get_wptr +ffffffff81ee1a80 t vcn_v4_0_unified_ring_set_wptr +ffffffff81ee1b80 t vcn_v4_0_ring_patch_cs_in_place +ffffffff81ee1df0 t vcn_v4_0_set_interrupt_state +ffffffff81ee1e20 t vcn_v4_0_process_interrupt +ffffffff81ee1ed0 t vcn_v4_0_pause_dpg_mode +ffffffff81ee2290 t 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dm_helpers_is_dp_sink_present +ffffffff81f02110 T dm_helpers_read_local_edid +ffffffff81f022b0 T dm_helper_dmub_aux_transfer_sync +ffffffff81f022e0 T dm_helpers_dmub_set_config_sync +ffffffff81f02300 T dm_set_dcn_clocks +ffffffff81f02330 T dm_helpers_smu_timeout +ffffffff81f02360 T dm_helpers_init_panel_settings +ffffffff81f023d0 T dm_helpers_override_panel_settings +ffffffff81f02400 T dm_helpers_allocate_gpu_mem +ffffffff81f024f0 T dm_helpers_free_gpu_mem +ffffffff81f02590 T dm_helpers_dmub_outbox_interrupt_control +ffffffff81f02610 T dm_helpers_mst_enable_stream_features +ffffffff81f02720 T dm_set_phyd32clk +ffffffff81f02750 T dm_helpers_enable_periodic_detection +ffffffff81f02780 t execute_synaptics_rc_command +ffffffff81f03000 T amdgpu_dm_irq_register_interrupt +ffffffff81f031a0 t dm_irq_work_func +ffffffff81f031c0 T amdgpu_dm_irq_unregister_interrupt +ffffffff81f033e0 T amdgpu_dm_irq_init +ffffffff81f034d0 T amdgpu_dm_irq_fini +ffffffff81f03660 T amdgpu_dm_irq_suspend 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is_dsc_need_re_compute +ffffffff81f058c0 t compute_mst_dsc_configs_for_link +ffffffff81f06450 T pre_validate_dsc +ffffffff81f06a20 T dm_dp_mst_is_port_support_mode +ffffffff81f06c50 t amdgpu_dm_encoder_destroy +ffffffff81f06c60 t dm_dp_add_mst_connector +ffffffff81f06e40 t amdgpu_dm_mst_connector_late_register +ffffffff81f06e80 t amdgpu_dm_mst_connector_early_unregister +ffffffff81f06f10 t dm_dp_mst_connector_destroy +ffffffff81f06f80 t dm_dp_mst_get_modes +ffffffff81f07320 t dm_dp_mst_detect +ffffffff81f074b0 t dm_mst_atomic_best_encoder +ffffffff81f07510 t dm_dp_mst_atomic_check +ffffffff81f07540 t set_dsc_configs_from_fairness_vars +ffffffff81f08000 T amd_get_format_info +ffffffff81f08020 T fill_blending_from_plane_state +ffffffff81f080c0 T fill_plane_buffer_attributes +ffffffff81f08630 T dm_plane_helper_check_state +ffffffff81f08850 T fill_dc_scaling_info +ffffffff81f08ab0 T handle_cursor_update +ffffffff81f08d30 T amdgpu_dm_plane_init +ffffffff81f09ab0 t dm_drm_plane_reset +ffffffff81f09b40 t dm_drm_plane_duplicate_state +ffffffff81f09bd0 t dm_drm_plane_destroy_state +ffffffff81f09c10 t dm_plane_format_mod_supported +ffffffff81f09d30 t dm_plane_helper_prepare_fb +ffffffff81f09fe0 t dm_plane_helper_cleanup_fb +ffffffff81f0a080 t dm_plane_atomic_check +ffffffff81f0a150 t dm_plane_atomic_async_check +ffffffff81f0a190 t dm_plane_atomic_async_update +ffffffff81f0a240 t amdgpu_bo_reserve +ffffffff81f0a450 t amdgpu_bo_unreserve +ffffffff81f0b000 T dm_pp_apply_display_requirements +ffffffff81f0b1e0 T dm_pp_get_clock_levels_by_type +ffffffff81f0b520 T dm_pp_get_clock_levels_by_type_with_latency +ffffffff81f0b6e0 T dm_pp_get_clock_levels_by_type_with_voltage +ffffffff81f0b8a0 T dm_pp_notify_wm_clock_changes +ffffffff81f0b8f0 T dm_pp_apply_power_level_change_request +ffffffff81f0b920 T dm_pp_apply_clock_for_voltage_request +ffffffff81f0b9c0 T dm_pp_get_static_clocks +ffffffff81f0ba70 T dm_pp_get_funcs +ffffffff81f0bb80 t pp_rv_set_wm_ranges +ffffffff81f0bcd0 t pp_rv_set_pme_wa_enable +ffffffff81f0bcf0 t pp_rv_set_active_display_count +ffffffff81f0bd10 t pp_rv_set_min_deep_sleep_dcfclk +ffffffff81f0bd30 t pp_rv_set_hard_min_dcefclk_by_freq +ffffffff81f0bd50 t pp_rv_set_hard_min_fclk_by_freq +ffffffff81f0bd70 t pp_nv_set_display_count +ffffffff81f0bdc0 t pp_nv_set_hard_min_dcefclk_by_freq +ffffffff81f0be30 t pp_nv_set_min_deep_sleep_dcfclk +ffffffff81f0be80 t pp_nv_set_voltage_by_freq +ffffffff81f0bf10 t pp_nv_set_wm_ranges +ffffffff81f0bf50 t pp_nv_set_hard_min_uclk_by_freq +ffffffff81f0bfc0 t pp_nv_get_maximum_sustainable_clocks +ffffffff81f0c010 t pp_nv_get_uclk_dpm_states +ffffffff81f0c060 t pp_nv_set_pstate_handshake_support +ffffffff81f0c0b0 t pp_rn_set_wm_ranges +ffffffff81f0c0f0 t pp_rn_get_dpm_clock_table +ffffffff81f0d000 T amdgpu_dm_set_psr_caps +ffffffff81f0d110 T amdgpu_dm_link_setup_psr +ffffffff81f0d280 T amdgpu_dm_psr_enable +ffffffff81f0d370 T amdgpu_dm_psr_disable +ffffffff81f0d3f0 T amdgpu_dm_psr_disable_all +ffffffff81f0e000 T dm_get_elapse_time_in_ns +ffffffff81f0e030 T dm_perf_trace_timestamp +ffffffff81f0f000 T dc_assert_fp_enabled +ffffffff81f0f070 T dc_fpu_begin +ffffffff81f0f0c0 T dc_fpu_end +ffffffff81f10000 T dal_vector_construct +ffffffff81f100d0 T dal_vector_presized_create +ffffffff81f10350 T dal_vector_create +ffffffff81f10470 T dal_vector_destruct +ffffffff81f104c0 T dal_vector_destroy +ffffffff81f10530 T dal_vector_get_count +ffffffff81f10560 T dal_vector_at_index +ffffffff81f105a0 T dal_vector_remove_at_index +ffffffff81f10630 T dal_vector_set_at_index +ffffffff81f10690 T dal_vector_insert_at +ffffffff81f10780 T dal_vector_reserve +ffffffff81f10820 T dal_vector_append +ffffffff81f10920 T dal_vector_clone +ffffffff81f109d0 T dal_vector_capacity +ffffffff81f10a00 T dal_vector_clear +ffffffff81f11000 T fixed_point_to_int_frac +ffffffff81f11200 T convert_float_matrix +ffffffff81f112c0 T reduce_fraction +ffffffff81f12000 T is_rgb_cspace +ffffffff81f12080 T is_lower_pipe_tree_visible +ffffffff81f120e0 T is_upper_pipe_tree_visible +ffffffff81f12140 T is_pipe_tree_visible +ffffffff81f121c0 T build_prescale_params +ffffffff81f13000 T dc_fixpt_from_fraction +ffffffff81f131d0 T dc_fixpt_mul +ffffffff81f13370 T dc_fixpt_sqr +ffffffff81f134d0 T dc_fixpt_recip +ffffffff81f13540 T dc_fixpt_sinc +ffffffff81f13730 T dc_fixpt_sin +ffffffff81f13760 T dc_fixpt_cos +ffffffff81f13840 T dc_fixpt_exp +ffffffff81f13b30 t fixed31_32_exp_from_taylor_series +ffffffff81f13f10 T dc_fixpt_log +ffffffff81f14120 T dc_fixpt_u4d19 +ffffffff81f14160 T dc_fixpt_u3d19 +ffffffff81f141a0 T dc_fixpt_u2d19 +ffffffff81f141e0 T dc_fixpt_u0d19 +ffffffff81f14210 T dc_fixpt_clamp_u0d14 +ffffffff81f14250 T dc_fixpt_clamp_u0d10 +ffffffff81f14290 T dc_fixpt_s4d19 +ffffffff81f15000 T bios_parser_create +ffffffff81f163b0 t bios_parser_get_connectors_number +ffffffff81f16410 t bios_parser_get_connector_id +ffffffff81f164a0 t bios_parser_get_src_obj +ffffffff81f165a0 t bios_parser_get_i2c_info +ffffffff81f167b0 t bios_parser_get_hpd_info +ffffffff81f16880 t bios_parser_get_device_tag +ffffffff81f16a70 t bios_parser_get_spread_spectrum_info +ffffffff81f16d70 t bios_parser_get_ss_entry_number +ffffffff81f16fa0 t bios_parser_get_embedded_panel_info +ffffffff81f174e0 t bios_parser_get_gpio_pin_info +ffffffff81f17600 t bios_parser_get_encoder_cap_info +ffffffff81f17700 t bios_parser_set_scratch_critical_state +ffffffff81f17710 t bios_parser_is_device_id_supported +ffffffff81f177d0 t bios_parser_encoder_control +ffffffff81f17810 t bios_parser_transmitter_control +ffffffff81f17850 t bios_parser_enable_crtc +ffffffff81f17890 t bios_parser_adjust_pixel_clock +ffffffff81f178d0 t bios_parser_set_pixel_clock +ffffffff81f17910 t bios_parser_set_dce_clock +ffffffff81f17950 t bios_parser_enable_spread_spectrum_on_ppll +ffffffff81f17990 t bios_parser_program_crtc_timing +ffffffff81f179d0 t bios_parser_program_display_engine_pll +ffffffff81f17a10 t bios_parser_enable_disp_power_gating +ffffffff81f17a50 t bios_parser_destroy +ffffffff81f17b10 t bios_get_board_layout_info +ffffffff81f17d90 t get_bios_object +ffffffff81f17f60 t get_ss_info_from_ss_info_table +ffffffff81f18120 t get_ss_entry_number_from_ss_info_tbl +ffffffff81f19000 T firmware_parser_create +ffffffff81f1ade0 t bios_parser_get_connectors_number +ffffffff81f1af60 t bios_parser_get_connector_id +ffffffff81f1aff0 t bios_parser_get_src_obj +ffffffff81f1b280 t bios_parser_get_i2c_info +ffffffff81f1b4f0 t bios_parser_get_hpd_info +ffffffff81f1b660 t bios_parser_get_device_tag +ffffffff81f1b930 t bios_parser_get_spread_spectrum_info +ffffffff81f1bcf0 t bios_parser_get_ss_entry_number +ffffffff81f1bd20 t bios_parser_get_embedded_panel_info +ffffffff81f1bf10 t bios_parser_get_gpio_pin_info +ffffffff81f1c030 t bios_parser_get_encoder_cap_info +ffffffff81f1c1a0 t bios_parser_is_accelerated_mode +ffffffff81f1c1b0 t bios_parser_set_scratch_critical_state +ffffffff81f1c1c0 t bios_parser_is_device_id_supported +ffffffff81f1c240 t bios_parser_encoder_control +ffffffff81f1c280 t bios_parser_transmitter_control +ffffffff81f1c2c0 t bios_parser_enable_crtc +ffffffff81f1c300 t bios_parser_set_pixel_clock +ffffffff81f1c340 t bios_parser_set_dce_clock +ffffffff81f1c380 t bios_parser_program_crtc_timing +ffffffff81f1c3c0 t bios_parser_enable_disp_power_gating +ffffffff81f1c400 t firmware_parser_destroy +ffffffff81f1c4c0 t bios_get_board_layout_info +ffffffff81f1c970 t bios_parser_pack_data_tables +ffffffff81f1c9a0 t bios_get_atom_dc_golden_table +ffffffff81f1cae0 t bios_parser_enable_lvtma_control +ffffffff81f1cb30 t bios_parser_get_soc_bb_info +ffffffff81f1cc30 t bios_parser_get_disp_connector_caps_info +ffffffff81f1cd80 t bios_parser_get_lttpr_caps +ffffffff81f1ced0 t bios_parser_get_lttpr_interop +ffffffff81f1d010 t bios_parser_get_connector_speed_cap_info +ffffffff81f1d160 t get_bios_object +ffffffff81f1d2c0 t get_bios_object_from_path_v3 +ffffffff81f1e000 T object_id_from_bios_object_id +ffffffff81f1f000 T bios_get_image +ffffffff81f1f040 T bios_is_accelerated_mode +ffffffff81f1f0a0 T bios_set_scratch_acc_mode_change +ffffffff81f1f0d0 T bios_set_scratch_critical_state +ffffffff81f1f100 T bios_get_vga_enabled_displays +ffffffff81f20000 T dal_bios_parser_create +ffffffff81f20070 T dal_bios_parser_destroy +ffffffff81f21000 T dal_bios_parser_init_cmd_tbl +ffffffff81f21800 t encoder_control_digx_v3 +ffffffff81f21900 t encoder_control_digx_v4 +ffffffff81f21a00 t encoder_control_digx_v5 +ffffffff81f21b50 t encoder_control_dig1_v1 +ffffffff81f21bd0 t encoder_control_dig2_v1 +ffffffff81f21c50 t encoder_control_dig_v1 +ffffffff81f21cb0 t transmitter_control_v2 +ffffffff81f21e50 t transmitter_control_v3 +ffffffff81f22010 t transmitter_control_v4 +ffffffff81f221c0 t transmitter_control_v1_5 +ffffffff81f22340 t transmitter_control_v1_6 +ffffffff81f224b0 t set_pixel_clock_v3 +ffffffff81f22620 t set_pixel_clock_v5 +ffffffff81f227c0 t set_pixel_clock_v6 +ffffffff81f22960 t set_pixel_clock_v7 +ffffffff81f22b30 t enable_spread_spectrum_on_ppll_v1 +ffffffff81f22c40 t enable_spread_spectrum_on_ppll_v2 +ffffffff81f22d60 t enable_spread_spectrum_on_ppll_v3 +ffffffff81f22e60 t adjust_display_pll_v2 +ffffffff81f22fb0 t adjust_display_pll_v3 +ffffffff81f23120 t dac1_encoder_control_v1 +ffffffff81f23190 t dac2_encoder_control_v1 +ffffffff81f23200 t dac1_output_control_v1 +ffffffff81f23260 t dac2_output_control_v1 +ffffffff81f232c0 t set_crtc_using_dtd_timing_v3 +ffffffff81f23420 t set_crtc_timing_v1 +ffffffff81f235c0 t enable_crtc_v1 +ffffffff81f23660 t enable_crtc_mem_req_v1 +ffffffff81f23700 t program_clock_v5 +ffffffff81f23800 t program_clock_v6 +ffffffff81f23920 t external_encoder_control_v3 +ffffffff81f23ad0 t enable_disp_power_gating_v2_1 +ffffffff81f23b90 t set_dce_clock_v2_1 +ffffffff81f24000 T dal_firmware_parser_init_cmd_tbl +ffffffff81f243d0 t encoder_control_digx_v1_5 +ffffffff81f245a0 t encoder_control_fallback +ffffffff81f245f0 t transmitter_control_v1_6 +ffffffff81f24790 t transmitter_control_v1_7 +ffffffff81f24980 t transmitter_control_fallback +ffffffff81f249d0 t set_pixel_clock_v7 +ffffffff81f24c20 t set_pixel_clock_fallback +ffffffff81f24c70 t set_crtc_using_dtd_timing_v3 +ffffffff81f24dd0 t enable_crtc_v1 +ffffffff81f24e70 t external_encoder_control_v3 +ffffffff81f24ea0 t enable_disp_power_gating_v2_1 +ffffffff81f25000 t enable_disp_power_gating_fallback +ffffffff81f25050 t set_dce_clock_v2_1 +ffffffff81f25170 t get_smu_clock_info_v3_1 +ffffffff81f251d0 t enable_lvtma_control +ffffffff81f26000 T dal_bios_parser_init_cmd_tbl_helper +ffffffff81f260a0 T dal_cmd_table_helper_controller_id_to_atom +ffffffff81f261b0 T dal_cmd_table_helper_transmitter_bp_to_atom +ffffffff81f26230 T dal_cmd_table_helper_encoder_mode_bp_to_atom +ffffffff81f262c0 T dal_cmd_table_helper_assign_control_parameter +ffffffff81f26380 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src +ffffffff81f26460 T dal_cmd_table_helper_encoder_id_to_atom +ffffffff81f27000 T dal_bios_parser_init_cmd_tbl_helper2 +ffffffff81f270b0 T dal_cmd_table_helper_controller_id_to_atom2 +ffffffff81f271b0 T dal_cmd_table_helper_transmitter_bp_to_atom2 +ffffffff81f27230 T dal_cmd_table_helper_encoder_mode_bp_to_atom2 +ffffffff81f272c0 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src2 +ffffffff81f273a0 T dal_cmd_table_helper_encoder_id_to_atom2 +ffffffff81f28000 T dal_cmd_tbl_helper_dce110_get_table +ffffffff81f28030 t encoder_action_to_atom +ffffffff81f280a0 t engine_bp_to_atom +ffffffff81f280e0 t clock_source_id_to_atom +ffffffff81f28170 t clock_source_id_to_atom_phy_clk_src_id +ffffffff81f281c0 t signal_type_to_atom_dig_mode +ffffffff81f28220 t hpd_sel_to_atom +ffffffff81f28250 t dig_encoder_sel_to_atom +ffffffff81f28280 t phy_id_to_atom +ffffffff81f282c0 t disp_power_gating_action_to_atom +ffffffff81f29000 T dal_cmd_tbl_helper_dce112_get_table2 ffffffff81f29030 t encoder_action_to_atom ffffffff81f290a0 t engine_bp_to_atom ffffffff81f290e0 t clock_source_id_to_atom -ffffffff81f29170 t clock_source_id_to_atom_phy_clk_src_id -ffffffff81f291c0 t signal_type_to_atom_dig_mode -ffffffff81f29220 t hpd_sel_to_atom -ffffffff81f29250 t dig_encoder_sel_to_atom -ffffffff81f29280 t phy_id_to_atom -ffffffff81f292c0 t disp_power_gating_action_to_atom -ffffffff81f2a000 T dal_cmd_tbl_helper_dce112_get_table2 +ffffffff81f291b0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff81f29200 t signal_type_to_atom_dig_mode +ffffffff81f29260 t hpd_sel_to_atom +ffffffff81f29290 t dig_encoder_sel_to_atom +ffffffff81f292c0 t phy_id_to_atom +ffffffff81f29300 t disp_power_gating_action_to_atom +ffffffff81f29370 t dc_clock_type_to_atom +ffffffff81f293f0 t transmitter_color_depth_to_atom +ffffffff81f2a000 T dal_cmd_tbl_helper_dce112_get_table ffffffff81f2a030 t encoder_action_to_atom ffffffff81f2a0a0 t engine_bp_to_atom ffffffff81f2a0e0 t clock_source_id_to_atom @@ -29169,7 +29172,7 @@ ffffffff81f2a2c0 t phy_id_to_atom ffffffff81f2a300 t disp_power_gating_action_to_atom ffffffff81f2a370 t dc_clock_type_to_atom ffffffff81f2a3f0 t transmitter_color_depth_to_atom -ffffffff81f2b000 T dal_cmd_tbl_helper_dce112_get_table +ffffffff81f2b000 T dal_cmd_tbl_helper_dce80_get_table ffffffff81f2b030 t encoder_action_to_atom ffffffff81f2b0a0 t engine_bp_to_atom ffffffff81f2b0e0 t clock_source_id_to_atom @@ -29177,25432 +29180,25420 @@ ffffffff81f2b1b0 t clock_source_id_to_atom_phy_clk_src ffffffff81f2b200 t signal_type_to_atom_dig_mode ffffffff81f2b260 t hpd_sel_to_atom ffffffff81f2b290 t dig_encoder_sel_to_atom -ffffffff81f2b2c0 t phy_id_to_atom -ffffffff81f2b300 t disp_power_gating_action_to_atom -ffffffff81f2b370 t dc_clock_type_to_atom -ffffffff81f2b3f0 t transmitter_color_depth_to_atom -ffffffff81f2c000 T dal_cmd_tbl_helper_dce80_get_table -ffffffff81f2c030 t encoder_action_to_atom -ffffffff81f2c0a0 t engine_bp_to_atom -ffffffff81f2c0e0 t clock_source_id_to_atom -ffffffff81f2c1b0 t clock_source_id_to_atom_phy_clk_src_id -ffffffff81f2c200 t signal_type_to_atom_dig_mode -ffffffff81f2c260 t hpd_sel_to_atom -ffffffff81f2c290 t dig_encoder_sel_to_atom -ffffffff81f2c2e0 t phy_id_to_atom -ffffffff81f2c320 t disp_power_gating_action_to_atom -ffffffff81f2d000 T clk_mgr_helper_get_active_display_cnt -ffffffff81f2d0e0 T clk_mgr_helper_get_active_plane_cnt -ffffffff81f2d190 T clk_mgr_exit_optimized_pwr_state -ffffffff81f2d290 T clk_mgr_optimize_pwr_state -ffffffff81f2d3a0 T dc_clk_mgr_create -ffffffff81f2da80 T dc_destroy_clk_mgr -ffffffff81f2e000 T dentist_get_divider_from_did -ffffffff81f2e070 T dce_adjust_dp_ref_freq_for_ss -ffffffff81f2e170 T dce_get_dp_ref_freq_khz -ffffffff81f2e2a0 T dce12_get_dp_ref_freq_khz -ffffffff81f2e2b0 T dce_get_max_pixel_clock_for_all_paths -ffffffff81f2e4c0 T dce_get_required_clocks_state -ffffffff81f2e560 T dce_set_clock -ffffffff81f2e6b0 T dce_clock_read_ss_info -ffffffff81f2e7f0 T dce_clk_mgr_construct -ffffffff81f2e9e0 t dce_update_clocks -ffffffff81f2f000 T dce110_get_min_vblank_time_us -ffffffff81f2f080 T dce110_fill_display_configs -ffffffff81f2f2d0 T dce11_pplib_apply_display_requirements -ffffffff81f2f5c0 T dce110_clk_mgr_construct -ffffffff81f2f670 t dce11_update_clocks -ffffffff81f30000 T dce112_set_clock -ffffffff81f30190 T dce112_set_dispclk -ffffffff81f302c0 T dce112_set_dprefclk -ffffffff81f30320 T dce112_clk_mgr_construct -ffffffff81f303d0 t dce112_update_clocks -ffffffff81f31000 T dce120_clk_mgr_construct -ffffffff81f31090 T dce121_clk_mgr_construct -ffffffff81f311c0 t dce12_update_clocks -ffffffff81f32000 T rv1_clk_mgr_construct -ffffffff81f320c0 t rv1_update_clocks -ffffffff81f325a0 t rv1_init_clocks -ffffffff81f32630 t rv1_enable_pme_wa -ffffffff81f33000 T rv1_vbios_smu_set_dispclk -ffffffff81f330f0 t rv1_vbios_smu_send_msg_with_param -ffffffff81f33200 T rv1_vbios_smu_set_dprefclk -ffffffff81f34000 T rv2_clk_mgr_construct -ffffffff81f35000 T dentist_get_did_from_divider -ffffffff81f35090 T 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dal_hw_gpio_config_mode -ffffffff821ed180 T dal_hw_gpio_get_value -ffffffff821ed1e0 T dal_hw_gpio_set_value -ffffffff821ed260 T dal_hw_gpio_change_mode -ffffffff821ed270 T dal_hw_gpio_close -ffffffff821ed320 T dal_hw_gpio_construct -ffffffff821ed370 T dal_hw_gpio_destruct -ffffffff821ee000 T dal_hw_hpd_init -ffffffff821ee100 T dal_hw_hpd_get_pin -ffffffff821ee110 t dal_hw_hpd_destroy -ffffffff821ee170 t get_value -ffffffff821ee200 t set_config -ffffffff821ef000 T dal_hw_translate_init -ffffffff821f0000 T dc_process_hdcp_msg -ffffffff821f0180 t hdmi_14_process_transaction -ffffffff821f02d0 t dp_11_process_transaction -ffffffff821f1000 T dal_irq_service_dummy_set -ffffffff821f1050 T dal_irq_service_dummy_ack -ffffffff821f10a0 T dce110_vblank_set -ffffffff821f1170 T to_dal_irq_source_dce110 -ffffffff821f12f0 T dal_irq_service_dce110_create -ffffffff821f1370 t hpd_ack -ffffffff821f2000 T dal_irq_service_dce120_create +ffffffff81f2b2e0 t phy_id_to_atom +ffffffff81f2b320 t disp_power_gating_action_to_atom +ffffffff81f2c000 T clk_mgr_helper_get_active_display_cnt +ffffffff81f2c0e0 T clk_mgr_helper_get_active_plane_cnt +ffffffff81f2c190 T clk_mgr_exit_optimized_pwr_state +ffffffff81f2c290 T clk_mgr_optimize_pwr_state +ffffffff81f2c3a0 T dc_clk_mgr_create +ffffffff81f2ca80 T dc_destroy_clk_mgr +ffffffff81f2d000 T dentist_get_divider_from_did +ffffffff81f2d070 T dce_adjust_dp_ref_freq_for_ss +ffffffff81f2d170 T dce_get_dp_ref_freq_khz +ffffffff81f2d2a0 T dce12_get_dp_ref_freq_khz +ffffffff81f2d2b0 T dce_get_max_pixel_clock_for_all_paths +ffffffff81f2d4c0 T dce_get_required_clocks_state +ffffffff81f2d560 T dce_set_clock +ffffffff81f2d6b0 T dce_clock_read_ss_info +ffffffff81f2d7f0 T dce_clk_mgr_construct +ffffffff81f2d9e0 t dce_update_clocks +ffffffff81f2e000 T dce110_get_min_vblank_time_us +ffffffff81f2e080 T dce110_fill_display_configs +ffffffff81f2e2d0 T dce11_pplib_apply_display_requirements +ffffffff81f2e5c0 T dce110_clk_mgr_construct +ffffffff81f2e670 t dce11_update_clocks +ffffffff81f2f000 T dce112_set_clock +ffffffff81f2f190 T dce112_set_dispclk +ffffffff81f2f2c0 T dce112_set_dprefclk +ffffffff81f2f320 T dce112_clk_mgr_construct +ffffffff81f2f3d0 t dce112_update_clocks +ffffffff81f30000 T dce120_clk_mgr_construct +ffffffff81f30090 T dce121_clk_mgr_construct +ffffffff81f301c0 t dce12_update_clocks +ffffffff81f31000 T rv1_clk_mgr_construct +ffffffff81f310c0 t rv1_update_clocks +ffffffff81f315a0 t rv1_init_clocks +ffffffff81f31630 t rv1_enable_pme_wa +ffffffff81f32000 T rv1_vbios_smu_set_dispclk +ffffffff81f320f0 t rv1_vbios_smu_send_msg_with_param +ffffffff81f32200 T rv1_vbios_smu_set_dprefclk +ffffffff81f33000 T rv2_clk_mgr_construct +ffffffff81f34000 T dentist_get_did_from_divider +ffffffff81f34090 T dcn20_update_clocks_update_dpp_dto +ffffffff81f34150 T dcn20_update_clocks_update_dentist +ffffffff81f34670 T dcn2_update_clocks +ffffffff81f34bd0 T dcn2_read_clocks_from_hw_dentist +ffffffff81f34ca0 T dcn2_update_clocks_fpga +ffffffff81f34e10 T dcn2_init_clocks +ffffffff81f34eb0 T dcn2_get_clock +ffffffff81f34f20 T dcn20_clk_mgr_construct +ffffffff81f35060 t dcn2_enable_pme_wa +ffffffff81f350b0 t dcn2_are_clock_states_equal +ffffffff81f35120 t dcn2_notify_link_rate_change +ffffffff81f36000 t dcn201_update_clocks +ffffffff81f36240 t dcn201_init_clocks +ffffffff81f362e0 T dcn201_clk_mgr_construct +ffffffff81f37000 T rn_clk_mgr_construct +ffffffff81f378e0 t rn_update_clocks +ffffffff81f37e80 t rn_set_low_power_state +ffffffff81f38050 t rn_init_clocks +ffffffff81f380f0 t rn_enable_pme_wa +ffffffff81f38100 t rn_are_clock_states_equal +ffffffff81f38150 t rn_notify_wm_ranges +ffffffff81f384d0 t rn_notify_link_rate_change +ffffffff81f39000 T rn_vbios_smu_get_smu_version +ffffffff81f39010 t rn_vbios_smu_send_msg_with_param +ffffffff81f391a0 T rn_vbios_smu_set_dispclk +ffffffff81f392d0 T rn_vbios_smu_set_dprefclk +ffffffff81f39330 T rn_vbios_smu_set_hard_min_dcfclk +ffffffff81f393a0 T rn_vbios_smu_set_min_deep_sleep_dcfclk +ffffffff81f39410 T rn_vbios_smu_set_phyclk +ffffffff81f39450 T rn_vbios_smu_set_dppclk +ffffffff81f39510 T rn_vbios_smu_set_dcn_low_power_state +ffffffff81f39530 T rn_vbios_smu_enable_48mhz_tmdp_refclk_pwrdwn +ffffffff81f39550 T rn_vbios_smu_enable_pme_wa +ffffffff81f39570 T rn_vbios_smu_is_periodic_retraining_disabled +ffffffff81f3a000 T dcn3_init_clocks +ffffffff81f3a3d0 t dcn3_init_clocks_fpga +ffffffff81f3a3e0 T dcn3_clk_mgr_construct +ffffffff81f3a540 T dcn3_clk_mgr_destroy +ffffffff81f3a5a0 t dcn3_update_clocks +ffffffff81f3aa00 t dcn3_enable_pme_wa +ffffffff81f3aa40 t dcn3_are_clock_states_equal +ffffffff81f3aaa0 t dcn3_notify_wm_ranges +ffffffff81f3ad30 t dcn30_notify_link_rate_change +ffffffff81f3ae40 t dcn3_set_hard_min_memclk +ffffffff81f3aee0 t dcn3_set_hard_max_memclk +ffffffff81f3af30 t dcn3_set_max_memclk +ffffffff81f3af70 t dcn3_set_min_memclk +ffffffff81f3afb0 t dcn3_get_memclk_states_from_smu +ffffffff81f3b0f0 t dcn3_is_smu_present +ffffffff81f3c000 T dcn30_smu_test_message +ffffffff81f3c060 t dcn30_smu_send_msg_with_param +ffffffff81f3c1c0 T dcn30_smu_get_smu_version +ffffffff81f3c1e0 T dcn30_smu_check_driver_if_version +ffffffff81f3c230 T dcn30_smu_check_msg_header_version +ffffffff81f3c280 T dcn30_smu_set_dram_addr_high +ffffffff81f3c2a0 T dcn30_smu_set_dram_addr_low +ffffffff81f3c2c0 T dcn30_smu_transfer_wm_table_smu_2_dram +ffffffff81f3c2e0 T dcn30_smu_transfer_wm_table_dram_2_smu +ffffffff81f3c300 T dcn30_smu_set_hard_min_by_freq +ffffffff81f3c350 T dcn30_smu_set_hard_max_by_freq +ffffffff81f3c3a0 T dcn30_smu_get_dpm_freq_by_index +ffffffff81f3c3f0 T dcn30_smu_get_dc_mode_max_dpm_freq +ffffffff81f3c440 T dcn30_smu_set_min_deep_sleep_dcef_clk +ffffffff81f3c460 T dcn30_smu_set_num_of_displays +ffffffff81f3c480 T dcn30_smu_set_display_refresh_from_mall +ffffffff81f3c4b0 T dcn30_smu_set_external_client_df_cstate_allow +ffffffff81f3c4d0 T dcn30_smu_set_pme_workaround +ffffffff81f3d000 T dcn301_smu_get_smu_version +ffffffff81f3d070 t dcn301_smu_send_msg_with_param +ffffffff81f3d1f0 T dcn301_smu_set_dispclk +ffffffff81f3d290 T dcn301_smu_set_dprefclk +ffffffff81f3d330 T dcn301_smu_set_hard_min_dcfclk +ffffffff81f3d3d0 T dcn301_smu_set_min_deep_sleep_dcfclk +ffffffff81f3d470 T dcn301_smu_set_dppclk +ffffffff81f3d510 T dcn301_smu_set_display_idle_optimization +ffffffff81f3d560 T dcn301_smu_enable_phy_refclk_pwrdwn +ffffffff81f3d5b0 T dcn301_smu_enable_pme_wa +ffffffff81f3d5d0 T dcn301_smu_set_dram_addr_high +ffffffff81f3d620 T dcn301_smu_set_dram_addr_low +ffffffff81f3d670 T dcn301_smu_transfer_dpm_table_smu_2_dram +ffffffff81f3d690 T dcn301_smu_transfer_wm_table_dram_2_smu +ffffffff81f3e000 T vg_clk_mgr_construct +ffffffff81f3e760 T vg_clk_mgr_destroy +ffffffff81f3e7b0 t vg_update_clocks +ffffffff81f3eb40 t vg_init_clocks +ffffffff81f3ebe0 t vg_enable_pme_wa +ffffffff81f3ebf0 t vg_are_clock_states_equal +ffffffff81f3ec40 t vg_notify_wm_ranges +ffffffff81f3f000 T dcn31_update_clocks +ffffffff81f3f620 T dcn31_init_clocks +ffffffff81f3f6d0 T dcn31_are_clock_states_equal +ffffffff81f3f730 T dcn31_get_dtb_ref_freq_khz +ffffffff81f3f760 T dcn31_clk_mgr_construct +ffffffff81f3fdd0 T dcn31_clk_mgr_destroy +ffffffff81f3fe20 t dcn31_set_low_power_state +ffffffff81f40000 t dcn31_enable_pme_wa +ffffffff81f40010 t dcn31_notify_wm_ranges +ffffffff81f403b0 t find_clk_for_voltage +ffffffff81f41000 T dcn31_smu_get_smu_version +ffffffff81f41010 t dcn31_smu_send_msg_with_param +ffffffff81f41210 T dcn31_smu_set_dispclk +ffffffff81f41280 T dcn31_smu_set_dprefclk +ffffffff81f412f0 T dcn31_smu_set_hard_min_dcfclk +ffffffff81f41370 T dcn31_smu_set_min_deep_sleep_dcfclk +ffffffff81f413f0 T dcn31_smu_set_dppclk +ffffffff81f41460 T dcn31_smu_set_display_idle_optimization +ffffffff81f414b0 T dcn31_smu_enable_phy_refclk_pwrdwn +ffffffff81f414f0 T dcn31_smu_enable_pme_wa +ffffffff81f41530 T dcn31_smu_set_dram_addr_high +ffffffff81f41570 T dcn31_smu_set_dram_addr_low +ffffffff81f415b0 T dcn31_smu_transfer_dpm_table_smu_2_dram +ffffffff81f415f0 T dcn31_smu_transfer_wm_table_dram_2_smu +ffffffff81f41630 T dcn31_smu_set_zstate_support +ffffffff81f41690 T dcn31_smu_set_dtbclk +ffffffff81f42000 T dcn314_update_clocks +ffffffff81f426d0 T dcn314_are_clock_states_equal +ffffffff81f42730 T dcn314_clk_mgr_construct +ffffffff81f43430 T dcn314_clk_mgr_destroy +ffffffff81f43480 t dcn314_enable_pme_wa +ffffffff81f43490 t dcn314_notify_wm_ranges +ffffffff81f44000 T dcn314_smu_get_smu_version +ffffffff81f44010 t dcn314_smu_send_msg_with_param +ffffffff81f44210 T dcn314_smu_set_dispclk +ffffffff81f44280 T dcn314_smu_set_dprefclk +ffffffff81f442f0 T dcn314_smu_set_hard_min_dcfclk +ffffffff81f44370 T dcn314_smu_set_min_deep_sleep_dcfclk +ffffffff81f443f0 T dcn314_smu_set_dppclk +ffffffff81f44460 T dcn314_smu_set_display_idle_optimization +ffffffff81f444b0 T dcn314_smu_enable_phy_refclk_pwrdwn +ffffffff81f444f0 T dcn314_smu_enable_pme_wa +ffffffff81f44530 T dcn314_smu_set_dram_addr_high +ffffffff81f44570 T dcn314_smu_set_dram_addr_low +ffffffff81f445b0 T dcn314_smu_transfer_dpm_table_smu_2_dram +ffffffff81f445f0 T dcn314_smu_transfer_wm_table_dram_2_smu +ffffffff81f44630 T dcn314_smu_set_zstate_support +ffffffff81f44680 T dcn314_smu_set_dtbclk +ffffffff81f45000 T dcn315_clk_mgr_construct +ffffffff81f459c0 T dcn315_clk_mgr_destroy +ffffffff81f45a10 t dcn315_update_clocks +ffffffff81f45ff0 t dcn315_enable_pme_wa +ffffffff81f46000 t dcn315_notify_wm_ranges +ffffffff81f47000 T dcn315_smu_get_smu_version +ffffffff81f47010 t dcn315_smu_send_msg_with_param +ffffffff81f471a0 T dcn315_smu_set_dispclk +ffffffff81f47210 T dcn315_smu_set_hard_min_dcfclk +ffffffff81f47290 T dcn315_smu_set_min_deep_sleep_dcfclk +ffffffff81f47310 T dcn315_smu_set_dppclk +ffffffff81f47380 T dcn315_smu_set_display_idle_optimization +ffffffff81f473d0 T dcn315_smu_enable_phy_refclk_pwrdwn +ffffffff81f47410 T dcn315_smu_enable_pme_wa +ffffffff81f47450 T dcn315_smu_set_dram_addr_high +ffffffff81f47490 T dcn315_smu_set_dram_addr_low +ffffffff81f474d0 T dcn315_smu_transfer_dpm_table_smu_2_dram +ffffffff81f47510 T dcn315_smu_transfer_wm_table_dram_2_smu +ffffffff81f47550 T dcn315_smu_get_dpref_clk +ffffffff81f475a0 T dcn315_smu_get_dtbclk +ffffffff81f475f0 T dcn315_smu_set_dtbclk +ffffffff81f48000 T dcn316_clk_mgr_construct +ffffffff81f486a0 T dcn316_clk_mgr_destroy +ffffffff81f486f0 t dcn316_update_clocks +ffffffff81f48d20 t dcn316_enable_pme_wa +ffffffff81f48d30 t dcn316_notify_wm_ranges +ffffffff81f490c0 t find_clk_for_voltage +ffffffff81f4a000 T dcn316_smu_get_smu_version +ffffffff81f4a010 t dcn316_smu_send_msg_with_param +ffffffff81f4a1a0 T dcn316_smu_set_dispclk +ffffffff81f4a210 T dcn316_smu_set_hard_min_dcfclk +ffffffff81f4a290 T dcn316_smu_set_min_deep_sleep_dcfclk +ffffffff81f4a310 T dcn316_smu_set_dppclk +ffffffff81f4a380 T dcn316_smu_set_display_idle_optimization +ffffffff81f4a3d0 T dcn316_smu_enable_phy_refclk_pwrdwn +ffffffff81f4a410 T dcn316_smu_set_dram_addr_high +ffffffff81f4a450 T dcn316_smu_set_dram_addr_low +ffffffff81f4a490 T dcn316_smu_transfer_dpm_table_smu_2_dram +ffffffff81f4a4d0 T dcn316_smu_transfer_wm_table_dram_2_smu +ffffffff81f4a510 T dcn316_smu_enable_pme_wa +ffffffff81f4a550 T dcn316_smu_set_dtbclk +ffffffff81f4a590 T dcn316_smu_get_dpref_clk +ffffffff81f4a5e0 T dcn316_smu_get_smu_fclk +ffffffff81f4b000 T dcn32_init_clocks +ffffffff81f4b4d0 T dcn32_clk_mgr_construct +ffffffff81f4b760 T dcn32_clk_mgr_destroy +ffffffff81f4b7c0 t dcn32_update_clocks +ffffffff81f4bf00 t dcn32_dump_clk_registers +ffffffff81f4c120 t dcn32_enable_pme_wa +ffffffff81f4c160 t dcn32_are_clock_states_equal +ffffffff81f4c1c0 t dcn32_notify_wm_ranges +ffffffff81f4c340 t dcn32_set_hard_min_memclk +ffffffff81f4c3e0 t dcn32_set_hard_max_memclk +ffffffff81f4c430 t dcn32_get_memclk_states_from_smu +ffffffff81f4c620 t dcn32_is_smu_present +ffffffff81f4d000 T dcn32_smu_send_fclk_pstate_message +ffffffff81f4d020 t dcn32_smu_send_msg_with_param +ffffffff81f4d160 T dcn32_smu_send_cab_for_uclk_message +ffffffff81f4d180 T dcn32_smu_transfer_wm_table_dram_2_smu +ffffffff81f4d1a0 T dcn32_smu_set_pme_workaround +ffffffff81f4d1c0 T dcn32_smu_set_hard_min_by_freq +ffffffff81f4e000 T dc_stream_adjust_vmin_vmax +ffffffff81f4e180 T dc_stream_get_last_used_drr_vtotal +ffffffff81f4e2e0 T dc_stream_get_crtc_position +ffffffff81f4e510 T dc_stream_configure_crc +ffffffff81f4e750 T dc_stream_get_crc +ffffffff81f4e830 T dc_stream_set_dyn_expansion +ffffffff81f4ea90 T dc_stream_set_dither_option +ffffffff81f4ec00 T dc_stream_set_gamut_remap +ffffffff81f4ed80 T dc_stream_program_csc_matrix +ffffffff81f4efa0 T dc_stream_set_static_screen_params +ffffffff81f4f130 T dc_create +ffffffff81f4fad0 t dc_construct_ctx +ffffffff81f4fc30 t dc_destruct +ffffffff81f4ff00 T dc_hardware_init +ffffffff81f50010 T dc_init_callbacks +ffffffff81f50040 T dc_deinit_callbacks +ffffffff81f50070 T dc_destroy +ffffffff81f500c0 T dc_validate_boot_timing +ffffffff81f50440 T dc_enable_stereo +ffffffff81f50540 T dc_trigger_sync +ffffffff81f50b50 T dc_z10_restore +ffffffff81f50b90 T dc_z10_save_init +ffffffff81f50bd0 T dc_commit_state +ffffffff81f50d00 t dc_commit_state_no_check +ffffffff81f52180 T dc_acquire_release_mpc_3dlut +ffffffff81f52260 T dc_post_update_surfaces_to_stream +ffffffff81f52670 T dc_create_state +ffffffff81f52700 T dc_copy_state +ffffffff81f528f0 T dc_retain_state +ffffffff81f52920 T dc_release_state +ffffffff81f52990 T dc_set_generic_gpio_for_stereo +ffffffff81f52aa0 T dc_check_update_surfaces_for_stream +ffffffff81f53710 T dc_dmub_update_dirty_rect +ffffffff81f539a0 T dc_update_planes_and_stream +ffffffff81f540f0 t commit_minimal_transition_state +ffffffff81f54480 t commit_planes_for_stream +ffffffff81f55b30 T dc_commit_updates_for_stream +ffffffff81f55f20 t copy_surface_update_to_plane +ffffffff81f56320 t copy_stream_update_to_stream +ffffffff81f56950 T dc_get_current_stream_count +ffffffff81f56980 T dc_get_stream_at_index +ffffffff81f569c0 T dc_interrupt_to_irq_source +ffffffff81f569e0 T dc_interrupt_set +ffffffff81f56a30 T dc_interrupt_ack +ffffffff81f56a50 T dc_power_down_on_boot +ffffffff81f56aa0 T dc_set_power_state +ffffffff81f56c90 T dc_resume +ffffffff81f56d00 T dc_is_dmcu_initialized +ffffffff81f56d50 T dc_is_oem_i2c_device_present +ffffffff81f56d90 T dc_submit_i2c +ffffffff81f56dc0 T dc_submit_i2c_oem +ffffffff81f56e10 T dc_link_add_remote_sink +ffffffff81f56fa0 T dc_link_remove_remote_sink +ffffffff81f57090 T get_clock_requirements_for_state +ffffffff81f57110 T dc_set_clock +ffffffff81f57150 T dc_get_clock +ffffffff81f57190 T dc_set_psr_allow_active +ffffffff81f57290 T dc_allow_idle_optimizations +ffffffff81f57330 T dc_unlock_memory_clock_frequency +ffffffff81f573a0 T dc_lock_memory_clock_frequency +ffffffff81f57430 T dc_enable_dcmode_clk_limit +ffffffff81f57530 t blank_and_force_memclk +ffffffff81f57710 T dc_is_plane_eligible_for_idle_optimizations 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dcn30_disable_writeback +ffffffff8205ab80 T dcn30_program_all_writeback_pipes_in_tree +ffffffff8205ae60 T dcn30_init_hw +ffffffff8205b750 T dcn30_set_avmute +ffffffff8205b7b0 T dcn30_update_info_frame +ffffffff8205b880 T dcn30_program_dmdata_engine +ffffffff8205b920 T dcn30_apply_idle_power_optimizations +ffffffff8205bea0 T dcn30_does_plane_fit_in_mall +ffffffff8205bf50 T dcn30_hardware_release +ffffffff8205c060 T dcn30_set_disp_pattern_generator +ffffffff8205c0d0 T dcn30_prepare_bandwidth +ffffffff8205d000 T dcn30_hw_sequencer_construct +ffffffff8205e000 t mmhubbub3_warmup_mcif +ffffffff8205e210 t mmhubbub3_config_mcif_buf +ffffffff8205e6b0 t mmhubbub3_config_mcif_arb +ffffffff8205eaf0 T dcn30_mmhubbub_construct +ffffffff8205f000 T mpc3_is_dwb_idle +ffffffff8205f070 T mpc3_set_dwb_mux +ffffffff8205f0e0 T mpc3_disable_dwb_mux +ffffffff8205f160 T mpc3_set_out_rate_control +ffffffff8205f270 T mpc3_get_ogam_current +ffffffff8205f310 T mpc3_power_on_ogam_lut +ffffffff8205f3e0 T mpc3_set_output_gamma +ffffffff8205ff80 T mpc3_set_denorm +ffffffff8205fff0 T mpc3_set_denorm_clamp +ffffffff82060140 T mpc3_program_shaper +ffffffff820623a0 t mpc3_power_on_shaper_3dlut +ffffffff82062720 T mpc3_init_mpcc +ffffffff82062790 T mpc3_set_gamut_remap +ffffffff820629d0 T mpc3_program_3dlut +ffffffff82063150 t mpc3_set3dlut_ram12 +ffffffff82063330 T mpc3_set_output_csc +ffffffff820634a0 T mpc3_set_ocsc_default +ffffffff82063610 T mpc3_set_rmu_mux +ffffffff820636b0 T mpc3_get_rmu_mux_status +ffffffff82063750 T mpcc3_acquire_rmu +ffffffff820638b0 t mpcc3_release_rmu +ffffffff82063a20 t mpc3_set_mpc_mem_lp_mode +ffffffff82063bb0 T dcn30_mpc_construct +ffffffff82064000 T optc3_triplebuffer_lock +ffffffff82064120 T optc3_lock_doublebuffer_enable +ffffffff820643b0 T optc3_lock_doublebuffer_disable +ffffffff820644c0 T optc3_lock +ffffffff82064590 T optc3_set_out_mux +ffffffff820645d0 T optc3_program_blank_color +ffffffff82064700 T optc3_set_drr_trigger_window +ffffffff82064790 T optc3_set_vtotal_change_limit +ffffffff82064800 T optc3_set_dsc_config +ffffffff82064850 T optc3_set_odm_bypass +ffffffff820649c0 T optc3_set_vtotal_min_max +ffffffff820649d0 T optc3_tg_init +ffffffff82064a20 T dcn30_timing_generator_init +ffffffff82064a90 t optc3_set_odm_combine +ffffffff82065000 T dcn30_add_stream_to_ctx +ffffffff82065010 T dcn30_populate_dml_pipes_from_context +ffffffff82065100 T dcn30_populate_dml_writeback_from_context +ffffffff82065160 T dcn30_calc_max_scaled_time +ffffffff820651b0 T dcn30_set_mcif_arb_params +ffffffff82065320 T dcn30_acquire_post_bldn_3dlut +ffffffff82065490 T dcn30_release_post_bldn_3dlut +ffffffff82065530 T dcn30_internal_validate_bw +ffffffff82066300 t dcn30_split_stream_for_mpc_or_odm +ffffffff82066620 T dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff82066740 T dcn30_setup_mclk_switch_using_fw_based_vblank_stretch +ffffffff820667e0 T dcn30_update_soc_for_wm_a +ffffffff82066830 T dcn30_calculate_wm_and_dlg +ffffffff820668a0 T dcn30_validate_bandwidth +ffffffff82066cd0 T dcn30_update_bw_bounding_box +ffffffff820674b0 T dcn30_create_resource_pool +ffffffff82068a70 t dcn30_resource_destruct +ffffffff82068fe0 t dcn30_destroy_resource_pool +ffffffff82069040 t dcn30_panel_cntl_create +ffffffff820690d0 t dcn30_link_encoder_create +ffffffff82069180 t read_dce_straps +ffffffff820691a0 t dcn30_create_audio +ffffffff820691d0 t dcn30_stream_encoder_create +ffffffff82069350 t dcn30_hwseq_create +ffffffff8206a000 T vpg3_update_generic_info_packet +ffffffff8206a9a0 T vpg3_construct +ffffffff8206b000 T dccg301_create +ffffffff8206c000 T dcn301_link_encoder_construct +ffffffff8206d000 T hubbub301_construct +ffffffff8206e000 T dcn301_hw_sequencer_construct +ffffffff8206f000 T dcn301_panel_cntl_construct +ffffffff8206f050 t dcn301_panel_cntl_destroy +ffffffff8206f0a0 t dcn301_panel_cntl_hw_init +ffffffff8206f2a0 t dcn301_is_panel_backlight_on +ffffffff8206f300 t dcn301_is_panel_powered_on +ffffffff8206f3b0 t dcn301_store_backlight_level +ffffffff8206f450 t dcn301_get_16_bit_backlight_from_pwm +ffffffff82070000 T dcn301_create_resource_pool +ffffffff82071590 t dcn301_destruct +ffffffff82071ad0 t dcn301_destroy_resource_pool +ffffffff82071b30 t dcn301_panel_cntl_create +ffffffff82071bc0 t dcn301_link_encoder_create +ffffffff82071c70 t dcn301_calculate_wm_and_dlg +ffffffff82071ce0 t read_dce_straps +ffffffff82071d00 t dcn301_create_audio +ffffffff82071d30 t dcn301_stream_encoder_create +ffffffff82071eb0 t dcn301_hwseq_create +ffffffff82072000 T dcn302_dpp_pg_control +ffffffff820722a0 T dcn302_hubp_pg_control +ffffffff82072550 T dcn302_dsc_pg_control +ffffffff82073000 T dcn302_hw_sequencer_construct +ffffffff82074000 T dcn302_update_bw_bounding_box +ffffffff82074050 T dcn302_create_resource_pool +ffffffff820753e0 t dcn302_resource_destruct +ffffffff820758f0 t dcn302_destroy_resource_pool +ffffffff82075940 t dcn302_panel_cntl_create +ffffffff820759d0 t dcn302_link_encoder_create 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+ffffffff8207f380 T dcn31_link_encoder_construct +ffffffff8207f580 T dcn31_link_encoder_construct_minimal +ffffffff8207f600 T dcn31_link_encoder_enable_dp_output +ffffffff8207f840 T dcn31_link_encoder_enable_dp_mst_output +ffffffff8207fa80 T dcn31_link_encoder_disable_output +ffffffff8207fd10 T dcn31_link_encoder_is_in_alt_mode +ffffffff8207fe50 T dcn31_link_encoder_get_max_link_cap +ffffffff8207ffc0 t enc31_hw_init +ffffffff82081000 T dcn31_hpo_dp_link_enc_enable +ffffffff82081150 T dcn31_hpo_dp_link_enc_disable +ffffffff820811c0 T dcn31_hpo_dp_link_enc_set_link_test_pattern +ffffffff82081af0 T dcn31_hpo_dp_link_enc_update_stream_allocation_table +ffffffff82081d80 T dcn31_hpo_dp_link_enc_set_throttled_vcp_size +ffffffff82082020 T dcn31_hpo_dp_link_enc_read_state +ffffffff820822d0 T dcn31_hpo_dp_link_enc_enable_dp_output +ffffffff820823d0 T dcn31_hpo_dp_link_enc_disable_output +ffffffff82082500 T dcn31_hpo_dp_link_enc_set_ffe +ffffffff820825f0 T hpo_dp_link_encoder31_construct +ffffffff82082640 t dcn31_hpo_dp_link_enc_is_in_alt_mode +ffffffff82083000 T dcn31_hpo_dp_stream_encoder_construct +ffffffff82083070 t dcn31_hpo_dp_stream_enc_enable_stream +ffffffff820831b0 t dcn31_hpo_dp_stream_enc_dp_unblank +ffffffff82083460 t dcn31_hpo_dp_stream_enc_dp_blank +ffffffff82083560 t dcn31_hpo_dp_stream_enc_disable +ffffffff820835d0 t dcn31_hpo_dp_stream_enc_set_stream_attribute +ffffffff82083e80 t dcn31_hpo_dp_stream_enc_update_dp_info_packets +ffffffff82084030 t dcn31_hpo_dp_stream_enc_stop_dp_info_packets +ffffffff820841c0 t dcn31_hpo_dp_stream_enc_set_dsc_pps_info_packet +ffffffff82084460 t dcn31_hpo_dp_stream_enc_map_stream_to_link +ffffffff82084560 t dcn31_hpo_dp_stream_enc_mute_control +ffffffff820845d0 t dcn31_hpo_dp_stream_enc_audio_setup +ffffffff82084680 t dcn31_hpo_dp_stream_enc_audio_enable +ffffffff82084750 t dcn31_hpo_dp_stream_enc_audio_disable +ffffffff82084900 t dcn31_hpo_dp_stream_enc_read_state +ffffffff82084a90 t dcn31_set_hblank_min_symbol_width +ffffffff82085000 T hubbub31_init_dchub_sys_ctx +ffffffff820851f0 T hubbub31_construct +ffffffff82085280 t hubbub31_get_dcc_compression_cap +ffffffff82085460 t hubbub31_get_dchub_ref_freq +ffffffff82085530 t hubbub31_program_watermarks +ffffffff82086de0 t hubbub31_verify_allow_pstate_change_high +ffffffff82086fa0 t dcn31_program_det_size +ffffffff82087150 t dcn31_program_compbuf_size +ffffffff820873d0 t dcn31_init_crb +ffffffff82088000 T hubp31_set_unbounded_requesting +ffffffff82088090 T hubp31_soft_reset +ffffffff820880e0 T hubp31_construct +ffffffff82088150 t hubp31_program_extended_blank +ffffffff82089000 T dcn31_init_hw +ffffffff82089960 T dcn31_dsc_pg_control +ffffffff82089ca0 T dcn31_enable_power_gating_plane +ffffffff82089f00 T dcn31_update_info_frame +ffffffff82089fd0 T dcn31_z10_save_init +ffffffff8208a090 T dcn31_z10_restore +ffffffff8208a170 T dcn31_hubp_pg_control +ffffffff8208a480 T dcn31_init_sys_ctx +ffffffff8208a530 T dcn31_reset_hw_ctx_wrap +ffffffff8208a8a0 T dcn31_setup_hpo_hw_control +ffffffff8208b000 T dcn31_hw_sequencer_construct +ffffffff8208c000 T optc31_immediate_disable_crtc +ffffffff8208c0f0 T optc31_set_drr +ffffffff8208c300 T optc3_init_odm +ffffffff8208c470 T dcn31_timing_generator_init +ffffffff8208c4e0 t optc31_enable_crtc +ffffffff8208c5e0 t optc31_disable_crtc +ffffffff8208c6c0 t optc31_set_odm_combine +ffffffff8208d000 T dcn31_panel_cntl_construct +ffffffff8208d040 t dcn31_panel_cntl_destroy +ffffffff8208d090 t dcn31_panel_cntl_hw_init +ffffffff8208d180 t dcn31_is_panel_backlight_on +ffffffff8208d220 t dcn31_is_panel_powered_on +ffffffff8208d2c0 t dcn31_store_backlight_level +ffffffff8208d380 t dcn31_get_16_bit_backlight_from_pwm +ffffffff8208e000 T dcn31_populate_dml_pipes_from_context +ffffffff8208e350 T dcn31_calculate_wm_and_dlg +ffffffff8208e3c0 T dcn31_populate_dml_writeback_from_context +ffffffff8208e420 T dcn31_set_mcif_arb_params +ffffffff8208e480 T dcn31_validate_bandwidth +ffffffff8208e860 T dcn31_create_resource_pool +ffffffff8208fc00 t dcn31_resource_destruct +ffffffff82090260 t dcn31_destroy_resource_pool +ffffffff820902c0 t dcn31_panel_cntl_create +ffffffff82090330 t dcn31_link_encoder_create +ffffffff820903e0 t dcn31_link_enc_create_minimal +ffffffff82090480 t dcn31_get_panel_config_defaults +ffffffff820904f0 t read_dce_straps +ffffffff82090510 t dcn31_create_audio +ffffffff82090540 t dcn31_stream_encoder_create +ffffffff820906c0 t dcn31_hpo_dp_stream_encoder_create +ffffffff82090880 t dcn31_hpo_dp_link_encoder_create +ffffffff82090910 t dcn31_hwseq_create +ffffffff82091000 T vpg31_powerdown +ffffffff82091090 T vpg31_poweron +ffffffff82091120 T vpg31_construct +ffffffff82092000 T dccg314_create +ffffffff820920b0 t dccg314_set_dpstreamclk +ffffffff82092480 t dccg314_set_dtbclk_dto +ffffffff82092670 t dccg314_set_pixel_rate_div +ffffffff820929e0 t dccg314_set_valid_pixel_rate +ffffffff82093000 T dcn314_dio_stream_encoder_construct +ffffffff82093070 t enc314_stream_encoder_hdmi_set_stream_attribute +ffffffff82093660 t enc314_stream_encoder_dvi_set_stream_attribute +ffffffff82093860 t enc314_stream_encoder_dp_blank +ffffffff820938c0 t enc314_stream_encoder_dp_unblank +ffffffff82093c00 t enc314_read_state +ffffffff82093d60 t enc314_dp_set_dsc_config +ffffffff82093db0 t enc314_dp_set_odm_combine +ffffffff82093df0 t enc314_set_dig_input_mode +ffffffff82093e40 t enc314_enable_fifo +ffffffff82093ee0 t enc314_disable_fifo +ffffffff82093f20 t enc314_reset_fifo +ffffffff82095000 T dcn314_update_odm +ffffffff82095610 T dcn314_dsc_pg_control +ffffffff820959d0 T dcn314_enable_power_gating_plane +ffffffff82095c60 T dcn314_calculate_dccg_k1_k2_values +ffffffff82095de0 T dcn314_set_pixels_per_cycle +ffffffff82096000 T dcn314_hw_sequencer_construct +ffffffff82097000 T dcn314_timing_generator_init +ffffffff82097070 t optc314_enable_crtc +ffffffff82097170 t optc314_disable_crtc +ffffffff82097240 t optc314_phantom_crtc_post_enable +ffffffff82097300 t optc314_set_odm_bypass +ffffffff82097470 t optc314_set_odm_combine +ffffffff82097770 t optc314_set_h_timing_div_manual_mode +ffffffff82098000 T dcn314_create_resource_pool +ffffffff820992d0 t dcn314_resource_destruct +ffffffff82099930 t dcn314_destroy_resource_pool +ffffffff82099990 t dcn31_panel_cntl_create +ffffffff82099a00 t dcn31_link_encoder_create +ffffffff82099ab0 t dcn31_link_enc_create_minimal +ffffffff82099b50 t dcn314_populate_dml_pipes_from_context +ffffffff82099be0 t dcn314_update_bw_bounding_box +ffffffff82099c30 t dcn314_get_panel_config_defaults +ffffffff82099ca0 t read_dce_straps +ffffffff82099cc0 t dcn31_create_audio +ffffffff82099cf0 t dcn314_stream_encoder_create +ffffffff82099e70 t dcn31_hpo_dp_stream_encoder_create +ffffffff8209a030 t dcn31_hpo_dp_link_encoder_create +ffffffff8209a0c0 t dcn314_hwseq_create +ffffffff8209b000 T dcn315_create_resource_pool +ffffffff8209c260 t dcn315_resource_destruct +ffffffff8209c8c0 t dcn315_destroy_resource_pool +ffffffff8209c920 t dcn31_panel_cntl_create +ffffffff8209c990 t dcn31_link_encoder_create +ffffffff8209ca40 t dcn31_link_enc_create_minimal +ffffffff8209cae0 t dcn315_populate_dml_pipes_from_context +ffffffff8209ce20 t dcn315_get_panel_config_defaults +ffffffff8209ce90 t read_dce_straps +ffffffff8209ceb0 t dcn31_create_audio +ffffffff8209cee0 t dcn315_stream_encoder_create +ffffffff8209d060 t dcn31_hpo_dp_stream_encoder_create +ffffffff8209d220 t dcn31_hpo_dp_link_encoder_create +ffffffff8209d2b0 t dcn31_hwseq_create +ffffffff8209e000 T dcn316_create_resource_pool +ffffffff8209f2a0 t dcn316_resource_destruct +ffffffff8209f900 t dcn316_destroy_resource_pool +ffffffff8209f960 t dcn31_panel_cntl_create +ffffffff8209f9d0 t dcn31_link_encoder_create +ffffffff8209fa80 t dcn31_link_enc_create_minimal +ffffffff8209fb20 t dcn316_populate_dml_pipes_from_context +ffffffff8209fe40 t dcn316_get_panel_config_defaults +ffffffff8209feb0 t read_dce_straps +ffffffff8209fed0 t dcn31_create_audio +ffffffff8209ff00 t dcn316_stream_encoder_create +ffffffff820a0080 t dcn31_hpo_dp_stream_encoder_create +ffffffff820a0240 t dcn31_hpo_dp_link_encoder_create +ffffffff820a02d0 t dcn31_hwseq_create +ffffffff820a1000 T dccg32_create +ffffffff820a10b0 t dccg32_get_dccg_ref_freq +ffffffff820a10e0 t dccg32_otg_add_pixel +ffffffff820a1120 t dccg32_otg_drop_pixel +ffffffff820a1160 t dccg32_set_dpstreamclk +ffffffff820a1550 t dccg32_set_dtbclk_dto +ffffffff820a1740 t dccg32_set_pixel_rate_div +ffffffff820a1ab0 t dccg32_set_valid_pixel_rate +ffffffff820a2000 T enc32_hw_init +ffffffff820a2090 T dcn32_link_encoder_enable_dp_output +ffffffff820a20e0 T dcn32_link_encoder_construct +ffffffff820a22c0 t dcn32_link_encoder_is_in_alt_mode +ffffffff820a2340 t dcn32_link_encoder_get_max_link_cap +ffffffff820a3000 T dcn32_dio_stream_encoder_construct +ffffffff820a3070 t enc32_stream_encoder_hdmi_set_stream_attribute +ffffffff820a35a0 t enc32_stream_encoder_dvi_set_stream_attribute +ffffffff820a3720 t enc32_stream_encoder_dp_unblank +ffffffff820a3bd0 t enc32_read_state +ffffffff820a3d30 t enc32_dp_set_dsc_config +ffffffff820a3d80 t enc32_dp_set_odm_combine +ffffffff820a3dc0 t enc32_set_dig_input_mode +ffffffff820a4000 T dpp32_construct +ffffffff820a4060 t dscl32_calc_lb_num_partitions +ffffffff820a5000 T hpo_dp_link_encoder32_construct +ffffffff820a5050 t dcn32_hpo_dp_link_enc_is_in_alt_mode +ffffffff820a6000 T dcn32_program_det_size +ffffffff820a61a0 T hubbub32_program_urgent_watermarks +ffffffff820a6900 T hubbub32_program_stutter_watermarks +ffffffff820a6d50 T hubbub32_program_pstate_watermarks +ffffffff820a71d0 T hubbub32_program_usr_watermarks +ffffffff820a7420 T hubbub32_force_usr_retraining_allow +ffffffff820a74a0 T hubbub32_force_wm_propagate_to_pipes +ffffffff820a7540 T hubbub32_construct +ffffffff820a75c0 t hubbub32_wm_read_state +ffffffff820a7a30 t hubbub32_program_watermarks +ffffffff820a7b40 t hubbub32_init_watermarks +ffffffff820a7f80 t dcn32_program_compbuf_size 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dcn32_update_odm +ffffffff820ac620 T dcn32_calculate_dccg_k1_k2_values +ffffffff820ac830 T dcn32_is_dp_dig_pixel_rate_div_policy +ffffffff820ac8c0 T dcn32_set_pixels_per_cycle +ffffffff820aca00 T dcn32_unblank_stream +ffffffff820acbd0 T dcn32_disable_link_output +ffffffff820ace60 T dcn32_update_phantom_vp_position +ffffffff820acf80 T dcn32_dsc_pg_status +ffffffff820ad060 T dcn32_update_dsc_pg +ffffffff820ae000 T dcn32_hw_sequencer_init_functions +ffffffff820af000 t mmhubbub32_warmup_mcif +ffffffff820af210 t mmhubbub32_config_mcif_buf +ffffffff820af6b0 t mmhubbub32_config_mcif_arb +ffffffff820afac0 T dcn32_mmhubbub_construct +ffffffff820b0000 t mpc32_mpc_init +ffffffff820b0220 t mpc32_program_post1dlut +ffffffff820b0d00 t mpc32_program_shaper +ffffffff820b2fa0 t mpc32_program_3dlut +ffffffff820b3890 T dcn32_mpc_construct +ffffffff820b3950 t mpc32_power_on_shaper_3dlut +ffffffff820b3b80 t mpc32_set3dlut_ram12 +ffffffff820b4000 T dcn32_timing_generator_init +ffffffff820b4070 t optc32_enable_crtc +ffffffff820b4170 t optc32_disable_crtc +ffffffff820b4240 t optc32_phantom_crtc_post_enable +ffffffff820b4300 t optc32_set_drr +ffffffff820b4550 t optc32_set_odm_bypass +ffffffff820b46c0 t optc32_set_odm_combine +ffffffff820b49c0 t optc32_set_h_timing_div_manual_mode +ffffffff820b5000 T dcn32_panel_cntl_create +ffffffff820b5070 T dcn32_acquire_post_bldn_3dlut +ffffffff820b5160 T dcn32_release_post_bldn_3dlut +ffffffff820b5200 T dcn32_remove_phantom_pipes +ffffffff820b5370 T dcn32_add_phantom_pipes +ffffffff820b57b0 T dcn32_validate_bandwidth +ffffffff820b5c60 T dcn32_populate_dml_pipes_from_context +ffffffff820b5fe0 T dcn32_calculate_wm_and_dlg +ffffffff820b6050 T dcn32_create_resource_pool +ffffffff820b6100 t dcn32_resource_construct +ffffffff820c2550 T dcn32_acquire_idle_pipe_for_head_pipe_in_layer +ffffffff820c2790 t dcn32_mpc_create +ffffffff820c7150 t dcn32_resource_destruct +ffffffff820c77c0 t dcn32_destroy_resource_pool +ffffffff820c7820 t dcn32_link_encoder_create +ffffffff820c8780 t dcn32_update_bw_bounding_box +ffffffff820c87d0 t read_dce_straps +ffffffff820c8800 t dcn32_create_audio +ffffffff820c8b40 t dcn32_stream_encoder_create +ffffffff820ca9b0 t dcn32_hpo_dp_stream_encoder_create +ffffffff820cb690 t dcn32_hpo_dp_link_encoder_create +ffffffff820cbb10 t dcn32_hwseq_create +ffffffff820cbfa0 t dcn32_vpg_create +ffffffff820cd000 T dcn32_helper_calculate_num_ways_for_subvp +ffffffff820cd1e0 T dcn32_merge_pipes_for_subvp +ffffffff820cd3b0 T dcn32_all_pipes_have_stream_and_plane +ffffffff820cd440 T dcn32_subvp_in_use +ffffffff820cd4d0 T dcn32_mpo_in_use +ffffffff820cd530 T dcn32_any_surfaces_rotated +ffffffff820cd5c0 T dcn32_determine_det_override +ffffffff820cd900 T dcn32_set_det_allocations +ffffffff820cda80 T dcn32_save_mall_state +ffffffff820cdb30 T dcn32_restore_mall_state +ffffffff820ce000 T dcn321_link_encoder_construct +ffffffff820cf000 T dcn321_create_resource_pool +ffffffff820cf0b0 t dcn321_resource_construct +ffffffff820db460 t dcn321_mpc_create +ffffffff820dfe20 t dcn321_resource_destruct +ffffffff820e0490 t dcn321_destroy_resource_pool +ffffffff820e04f0 t dcn321_link_encoder_create +ffffffff820e1450 t dcn321_update_bw_bounding_box +ffffffff820e14a0 t read_dce_straps +ffffffff820e14d0 t dcn321_create_audio +ffffffff820e1810 t dcn321_stream_encoder_create +ffffffff820e3680 t dcn321_hpo_dp_stream_encoder_create +ffffffff820e4360 t dcn321_hpo_dp_link_encoder_create +ffffffff820e47e0 t dcn321_hwseq_create +ffffffff820e4c70 t dcn321_vpg_create +ffffffff820e6000 T bw_int_to_fixed_nonconst +ffffffff820e6090 T bw_frc_to_fixed +ffffffff820e6260 T bw_floor2 +ffffffff820e6310 T bw_ceil2 +ffffffff820e6390 T bw_mul +ffffffff820e7000 T convert_to_custom_float_format +ffffffff820e8000 T bw_calcs_init +ffffffff820e8e30 T bw_calcs +ffffffff820ea760 t calculate_bandwidth +ffffffff820f2000 T scaler_settings_calculation +ffffffff820f2380 T mode_support_and_system_configuration +ffffffff820f8160 T display_pipe_configuration +ffffffff820f89a0 T dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation +ffffffff820fe000 T dcn_bw_mod +ffffffff820fe050 T dcn_bw_min2 +ffffffff820fe090 T dcn_bw_max +ffffffff820fe0c0 T dcn_bw_max2 +ffffffff820fe100 T dcn_bw_floor2 +ffffffff820fe1a0 T dcn_bw_floor +ffffffff820fe1d0 T dcn_bw_ceil +ffffffff820fe210 T dcn_bw_ceil2 +ffffffff820fe2c0 T dcn_bw_max3 +ffffffff820fe360 T dcn_bw_max5 +ffffffff820fe4c0 T dcn_bw_pow +ffffffff820fe550 T dcn_bw_fabs +ffffffff820fe5b0 T dcn_bw_log +ffffffff820ff000 T swizzle_mode_to_macro_tile_size +ffffffff820ff090 T dcn_validate_bandwidth +ffffffff82101330 T dcn_bw_sync_calcs_and_dml +ffffffff82101580 t dcn_bw_calc_rq_dlg_ttu +ffffffff82101f00 T dcn_find_dcfclk_suits_all +ffffffff82102360 T dcn_bw_update_from_pplib_fclks +ffffffff821024f0 T dcn_bw_update_from_pplib_dcfclks +ffffffff821025c0 T dcn_get_soc_clks +ffffffff82102640 T dcn_bw_notify_pplib_of_wm_ranges +ffffffff82103000 T dcn20_populate_dml_writeback_from_context +ffffffff82103180 T dcn20_fpu_set_wb_arb_params +ffffffff82103330 T dcn20_calculate_dlg_params +ffffffff82103b10 T dcn20_populate_dml_pipes_from_context +ffffffff82104a10 T dcn20_calculate_wm +ffffffff821051b0 T dcn20_update_bounding_box +ffffffff82105420 T dcn20_cap_soc_clocks +ffffffff821057a0 T dcn20_patch_bounding_box +ffffffff82105910 T dcn20_validate_bandwidth_fp +ffffffff82105aa0 t dcn20_validate_bandwidth_internal +ffffffff82105e80 T dcn20_fpu_set_wm_ranges +ffffffff82105f20 T dcn20_fpu_adjust_dppclk +ffffffff82105fc0 T dcn21_populate_dml_pipes_from_context +ffffffff821060b0 T dcn21_validate_bandwidth_fp +ffffffff82106b30 T dcn21_update_bw_bounding_box +ffffffff82107010 T dcn21_clk_mgr_set_bw_params_wm_table +ffffffff82107070 T dcn201_populate_dml_writeback_from_context_fpu +ffffffff82107380 t calculate_wm_set_for_vlevel +ffffffff82108000 T dml20_recalculate +ffffffff82108740 t dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff8210dda0 T dml20_ModeSupportAndSystemConfigurationFull +ffffffff82114d30 t TruncToValidBPP +ffffffff82114f10 t CalculateVMAndRowBytes +ffffffff821155a0 t CalculatePrefetchSourceLines +ffffffff82115760 t CalculateWriteBackDelay +ffffffff82115a30 t CalculatePrefetchSchedule +ffffffff821168f0 t CalculateFlipSchedule +ffffffff82116ca0 t adjust_ReturnBW +ffffffff82117000 T dml20v2_recalculate +ffffffff82117740 t dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff8211ce50 T dml20v2_ModeSupportAndSystemConfigurationFull +ffffffff82123cd0 t TruncToValidBPP +ffffffff82124260 t CalculateVMAndRowBytes +ffffffff821248f0 t CalculatePrefetchSourceLines +ffffffff82124ab0 t CalculateWriteBackDelay +ffffffff82124d80 t CalculateDelayAfterScaler +ffffffff821250d0 t CalculatePrefetchSchedule +ffffffff82125e40 t CalculateFlipSchedule +ffffffff821261f0 t adjust_ReturnBW +ffffffff82127000 T dml20_rq_dlg_get_rq_reg +ffffffff82127490 t dml20_rq_dlg_get_rq_params +ffffffff82127660 T dml20_rq_dlg_get_dlg_reg +ffffffff821295a0 t get_surf_rq_param +ffffffff82129e20 t calculate_ttu_cursor +ffffffff8212b000 T dml20v2_rq_dlg_get_rq_reg +ffffffff8212b490 t dml20v2_rq_dlg_get_rq_params +ffffffff8212b660 T dml20v2_rq_dlg_get_dlg_reg +ffffffff8212d5b0 t get_surf_rq_param +ffffffff8212de30 t calculate_ttu_cursor +ffffffff8212f000 T dml21_recalculate +ffffffff8212f700 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff821350b0 T dml21_ModeSupportAndSystemConfigurationFull +ffffffff8213b190 t TruncToValidBPP +ffffffff8213b720 t CalculateDCFCLKDeepSleep +ffffffff8213ba60 t CalculateVMAndRowBytes +ffffffff8213c2d0 t CalculatePrefetchSourceLines +ffffffff8213c490 t CalculateWriteBackDelay +ffffffff8213c760 t CalculatePrefetchSchedulePerPlane +ffffffff8213cf70 t CalculateUrgentBurstFactor +ffffffff8213d380 t CalculateFlipSchedule +ffffffff8213d870 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff8213e8d0 t CalculatePrefetchSchedule +ffffffff82140000 T dml21_rq_dlg_get_rq_reg +ffffffff82140490 t dml_rq_dlg_get_rq_params +ffffffff82140660 T dml21_rq_dlg_get_dlg_reg +ffffffff821429c0 t get_surf_rq_param +ffffffff82143300 t calculate_ttu_cursor +ffffffff82144000 T optc3_fpu_set_vrr_m_const +ffffffff821444a0 T dcn30_fpu_populate_dml_writeback_from_context +ffffffff821447f0 T dcn30_fpu_set_mcif_arb_params +ffffffff82144960 T dcn30_fpu_update_soc_for_wm_a +ffffffff82144a10 T dcn30_fpu_calculate_wm_and_dlg +ffffffff821452f0 T dcn30_fpu_update_dram_channel_width_bytes +ffffffff82145350 T dcn30_fpu_update_max_clk +ffffffff821453f0 T dcn30_fpu_get_optimal_dcfclk_fclk_for_uclk +ffffffff821454f0 T dcn30_fpu_update_bw_bounding_box +ffffffff821456d0 T dcn30_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff82145890 T dcn3_fpu_build_wm_range_table +ffffffff82145b70 T patch_dcn30_soc_bounding_box +ffffffff82146000 T dml30_recalculate +ffffffff82146600 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff8214cc40 T dml30_CalculateBytePerPixelAnd256BBlockSizes +ffffffff8214ceb0 T dml30_CalculateWriteBackDISPCLK +ffffffff8214d030 T dml30_ModeSupportAndSystemConfigurationFull +ffffffff82154430 t CalculateSwathAndDETConfiguration +ffffffff82154aa0 t TruncToValidBPP +ffffffff82154d20 t dscceComputeDelay +ffffffff82154e60 t CalculateVMAndRowBytes +ffffffff82155510 t CalculatePrefetchSourceLines +ffffffff821556d0 t CalculateUrgentBurstFactor +ffffffff82155960 t CalculateDCFCLKDeepSleep +ffffffff82155c80 t UseMinimumDCFCLK +ffffffff82156e80 t CalculatePrefetchSchedule +ffffffff821583e0 t CalculateFlipSchedule +ffffffff821588d0 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff821596f0 t CalculateSwathWidth +ffffffff8215a000 T dml30_rq_dlg_get_rq_reg +ffffffff8215a4b0 t dml_rq_dlg_get_rq_params +ffffffff8215a720 T dml30_rq_dlg_get_dlg_reg +ffffffff8215ced0 t get_surf_rq_param +ffffffff8215d870 t calculate_ttu_cursor +ffffffff8215e000 T dcn301_update_bw_bounding_box +ffffffff8215e320 T dcn301_fpu_set_wm_ranges +ffffffff8215e3c0 T dcn301_fpu_init_soc_bounding_box +ffffffff8215e460 T dcn301_calculate_wm_and_dlg_fp +ffffffff8215e790 t calculate_wm_set_for_vlevel +ffffffff8215f000 T dcn302_fpu_update_bw_bounding_box +ffffffff8215fac0 T dcn302_fpu_init_soc_bounding_box +ffffffff82160000 T dcn303_fpu_update_bw_bounding_box +ffffffff82160b00 T dcn303_fpu_init_soc_bounding_box +ffffffff82161000 T dcn31_zero_pipe_dcc_fraction +ffffffff82161060 T dcn31_update_soc_for_wm_a +ffffffff82161110 T dcn315_update_soc_for_wm_a +ffffffff821611e0 T dcn31_calculate_wm_and_dlg_fp +ffffffff821616e0 T dcn31_update_bw_bounding_box +ffffffff82161ad0 T dcn315_update_bw_bounding_box +ffffffff82161dc0 T dcn316_update_bw_bounding_box +ffffffff82163000 T dml31_recalculate +ffffffff821632a0 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff8216a060 T dml31_CalculateWriteBackDISPCLK +ffffffff8216a1e0 T dml31_ModeSupportAndSystemConfigurationFull +ffffffff821724a0 t CalculateSwathAndDETConfiguration +ffffffff82172aa0 t TruncToValidBPP +ffffffff82172d20 t dscceComputeDelay +ffffffff82172e60 t CalculateDCFCLKDeepSleep +ffffffff821731a0 t CalculateVMAndRowBytes +ffffffff821737f0 t CalculatePrefetchSourceLines +ffffffff821739b0 t CalculateUrgentBurstFactor +ffffffff82173c40 t CalculatePrefetchSchedulePerPlane +ffffffff82174370 t CalculateFlipSchedule +ffffffff821748f0 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff82175550 t CalculateSwathWidth +ffffffff82175a60 t CalculatePrefetchSchedule +ffffffff82176ef0 t CalculateVupdateAndDynamicMetadataParameters +ffffffff82178000 T dml31_rq_dlg_get_rq_reg +ffffffff821784b0 t dml_rq_dlg_get_rq_params +ffffffff82178720 T dml31_rq_dlg_get_dlg_reg +ffffffff8217b1f0 t get_surf_rq_param +ffffffff8217c000 T dcn314_update_bw_bounding_box_fpu +ffffffff8217c480 T dcn314_populate_dml_pipes_from_context_fpu +ffffffff8217d000 T dml314_recalculate +ffffffff8217d280 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff82183f60 T dml314_CalculateWriteBackDISPCLK +ffffffff821840e0 T dml314_ModeSupportAndSystemConfigurationFull +ffffffff8218c280 t CalculateBytePerPixelAnd256BBlockSizes +ffffffff8218c4f0 t CalculateSwathAndDETConfiguration +ffffffff8218caf0 t TruncToValidBPP +ffffffff8218cd70 t dscceComputeDelay +ffffffff8218ceb0 t CalculateDCFCLKDeepSleep +ffffffff8218d1f0 t CalculateVMAndRowBytes +ffffffff8218d840 t CalculatePrefetchSourceLines +ffffffff8218da00 t CalculateUrgentBurstFactor +ffffffff8218dc90 t CalculateMaxVStartup +ffffffff8218ddd0 t CalculatePrefetchSchedulePerPlane +ffffffff8218e500 t CalculateFlipSchedule +ffffffff8218ea80 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff8218f6e0 t CalculateSwathWidth +ffffffff8218fbf0 t CalculatePrefetchSchedule +ffffffff82191080 t CalculateVupdateAndDynamicMetadataParameters +ffffffff82192000 T dml314_rq_dlg_get_rq_reg +ffffffff821924b0 t dml_rq_dlg_get_rq_params +ffffffff82192720 T dml314_rq_dlg_get_dlg_reg +ffffffff82195270 t get_surf_rq_param +ffffffff82196000 T dcn32_build_wm_range_table_fpu +ffffffff82196390 T dcn32_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff821965c0 T dcn32_internal_validate_bw +ffffffff82198250 T dcn32_helper_populate_phantom_dlg_params +ffffffff821983f0 T dcn32_predict_pipe_split +ffffffff82198620 T insert_entry_into_table_sorted +ffffffff82198a50 T dcn32_set_phantom_stream_timing +ffffffff82198cf0 t dcn32_split_stream_for_mpc_or_odm +ffffffff82199080 T dcn32_calculate_wm_and_dlg_fpu +ffffffff8219a570 T dcn32_patch_dpm_table +ffffffff8219a780 T dcn32_update_bw_bounding_box_fpu +ffffffff8219c150 T dcn32_zero_pipe_dcc_fraction +ffffffff8219c1b0 t subvp_drr_schedulable +ffffffff8219d000 T dml32_recalculate +ffffffff821a1320 T dml32_ModeSupportAndSystemConfigurationFull +ffffffff821a9000 T dml32_dscceComputeDelay +ffffffff821a9140 T dml32_dscComputeDelay +ffffffff821a9180 T IsVertical +ffffffff821a91b0 T dml32_CalculateSinglePipeDPPCLKAndSCLThroughput +ffffffff821a94c0 T dml32_CalculateBytePerPixelAndBlockSizes +ffffffff821a97f0 T dml32_CalculateSwathAndDETConfiguration +ffffffff821aa000 T dml32_CalculateSwathWidth +ffffffff821aa8a0 T dml32_UnboundedRequest +ffffffff821aa900 T dml32_CalculateDETBufferSize +ffffffff821aaf40 T dml32_CalculateODMMode +ffffffff821ab6a0 T dml32_CalculateRequiredDispclk +ffffffff821ab850 T dml32_RoundToDFSGranularity +ffffffff821ab8e0 T dml32_CalculateOutputLink +ffffffff821ac400 T dml32_TruncToValidBPP +ffffffff821ac750 T dml32_CalculateDPPCLK +ffffffff821ac900 T dml32_RequiredDTBCLK +ffffffff821acb50 T dml32_DSCDelayRequirement +ffffffff821ad010 T dml32_CalculateSurfaceSizeInMall +ffffffff821adb20 T dml32_CalculateVMRowAndSwath +ffffffff821ae950 T dml32_CalculateVMAndRowBytes +ffffffff821af590 T dml32_CalculatePrefetchSourceLines +ffffffff821af7e0 T dml32_CalculateMALLUseForStaticScreen +ffffffff821af920 T dml32_CalculateRowBandwidth +ffffffff821afa80 T dml32_CalculateUrgentLatency +ffffffff821afb10 T dml32_CalculateUrgentBurstFactor +ffffffff821afdb0 T dml32_CalculateDCFCLKDeepSleep +ffffffff821b00f0 T dml32_CalculateWriteBackDelay +ffffffff821b0250 T dml32_UseMinimumDCFCLK +ffffffff821b1110 T dml32_CalculateExtraLatencyBytes +ffffffff821b12e0 T dml32_CalculateTWait +ffffffff821b13c0 T dml32_CalculateVUpdateAndDynamicMetadataParameters +ffffffff821b1620 T dml32_get_return_bw_mbps +ffffffff821b17d0 T dml32_get_return_bw_mbps_vm_only +ffffffff821b18b0 T dml32_CalculateExtraLatency +ffffffff821b1ad0 T dml32_CalculatePrefetchSchedule +ffffffff821b3080 T dml32_CalculateFlipSchedule +ffffffff821b3600 T dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport +ffffffff821b4750 T dml32_CalculateWriteBackDISPCLK +ffffffff821b4910 T dml32_CalculateMinAndMaxPrefetchMode +ffffffff821b4950 T dml32_CalculatePixelDeliveryTimes +ffffffff821b4dc0 T dml32_CalculateMetaAndPTETimes +ffffffff821b5500 T dml32_CalculateVMGroupAndRequestTimes +ffffffff821b59f0 T dml32_CalculateDCCConfiguration +ffffffff821b6000 T dml32_CalculateStutterEfficiency +ffffffff821b6f40 T dml32_CalculateMaxDETAndMinCompressedBufferSize +ffffffff821b7020 T dml32_CalculateVActiveBandwithSupport +ffffffff821b71b0 T dml32_CalculatePrefetchBandwithSupport +ffffffff821b7450 T dml32_CalculateBandwidthAvailableForImmediateFlip +ffffffff821b75a0 T dml32_CalculateImmediateFlipBandwithSupport +ffffffff821b77f0 T dml32_CalculateDETSwathFillLatencyHiding +ffffffff821b8000 T dml32_rq_dlg_get_rq_reg +ffffffff821b86a0 T dml32_rq_dlg_get_dlg_reg +ffffffff821bb000 T dcn321_insert_entry_into_table_sorted +ffffffff821bb430 T dcn321_update_bw_bounding_box_fpu +ffffffff821bd000 T dml_init_instance +ffffffff821bd300 T dml_get_status_message +ffffffff821bd340 T dml_log_pipe_params +ffffffff821bd370 T dml_log_mode_support_params +ffffffff821be000 T dml_get_voltage_level +ffffffff821be1e0 t fetch_socbb_params +ffffffff821be6f0 t fetch_ip_params +ffffffff821beb90 t fetch_pipe_params +ffffffff821bfc90 T PixelClockAdjustmentForProgressiveToInterlaceUnit +ffffffff821bfd00 T get_clk_dcf_deepsleep +ffffffff821bfe10 T get_wm_urgent +ffffffff821bff20 T get_wm_memory_trip +ffffffff821c0030 T get_wm_writeback_urgent +ffffffff821c0140 T get_wm_stutter_exit +ffffffff821c0250 T get_wm_stutter_enter_exit +ffffffff821c0360 T get_wm_z8_stutter_exit +ffffffff821c0470 T get_wm_z8_stutter_enter_exit +ffffffff821c0580 T get_stutter_efficiency_z8 +ffffffff821c0690 T get_stutter_num_bursts_z8 +ffffffff821c07a0 T get_wm_dram_clock_change +ffffffff821c08b0 T get_wm_writeback_dram_clock_change +ffffffff821c09c0 T get_stutter_efficiency +ffffffff821c0ad0 T get_stutter_efficiency_no_vblank +ffffffff821c0be0 T get_stutter_period +ffffffff821c0cf0 T get_urgent_latency +ffffffff821c0e00 T get_urgent_extra_latency +ffffffff821c0f10 T get_nonurgent_latency +ffffffff821c1020 T get_dram_clock_change_latency +ffffffff821c1130 T get_dispclk_calculated +ffffffff821c1240 T get_total_data_read_bw +ffffffff821c1350 T get_return_bw +ffffffff821c1460 T get_tcalc +ffffffff821c1570 T get_fraction_of_urgent_bandwidth +ffffffff821c1680 T get_fraction_of_urgent_bandwidth_imm_flip +ffffffff821c1790 T get_cstate_max_cap_mode +ffffffff821c18b0 T get_comp_buffer_size_kbytes +ffffffff821c19c0 T get_pixel_chunk_size_in_kbyte +ffffffff821c1ad0 T get_alpha_pixel_chunk_size_in_kbyte +ffffffff821c1be0 T get_meta_chunk_size_in_kbyte +ffffffff821c1cf0 T get_min_pixel_chunk_size_in_byte +ffffffff821c1e00 T get_min_meta_chunk_size_in_byte +ffffffff821c1f10 T get_fclk_watermark +ffffffff821c2020 T get_usr_retraining_watermark +ffffffff821c2130 T get_comp_buffer_reserved_space_kbytes +ffffffff821c2240 T get_comp_buffer_reserved_space_64bytes +ffffffff821c2350 T get_comp_buffer_reserved_space_zs +ffffffff821c2460 T get_unbounded_request_enabled +ffffffff821c2580 T get_dsc_delay +ffffffff821c26a0 T get_dppclk_calculated +ffffffff821c27c0 T get_dscclk_calculated +ffffffff821c28e0 T get_min_ttu_vblank +ffffffff821c2a00 T get_min_ttu_vblank_in_us +ffffffff821c2b20 T get_vratio_prefetch_l +ffffffff821c2c40 T get_vratio_prefetch_c +ffffffff821c2d60 T get_dst_x_after_scaler +ffffffff821c2e80 T get_dst_y_after_scaler +ffffffff821c2fa0 T get_dst_y_per_vm_vblank +ffffffff821c30c0 T get_dst_y_per_row_vblank +ffffffff821c31e0 T get_dst_y_prefetch +ffffffff821c3300 T get_dst_y_per_vm_flip +ffffffff821c3420 T get_dst_y_per_row_flip +ffffffff821c3540 T get_refcyc_per_vm_group_vblank +ffffffff821c3660 T get_refcyc_per_vm_group_flip +ffffffff821c3780 T get_refcyc_per_vm_req_vblank +ffffffff821c38a0 T get_refcyc_per_vm_req_flip +ffffffff821c39c0 T get_refcyc_per_vm_group_vblank_in_us +ffffffff821c3ae0 T get_refcyc_per_vm_group_flip_in_us +ffffffff821c3c00 T get_refcyc_per_vm_req_vblank_in_us +ffffffff821c3d20 T get_refcyc_per_vm_req_flip_in_us +ffffffff821c3e40 T get_refcyc_per_vm_dmdata_in_us +ffffffff821c3f60 T get_dmdata_dl_delta_in_us +ffffffff821c4080 T get_refcyc_per_line_delivery_l_in_us +ffffffff821c41a0 T get_refcyc_per_line_delivery_c_in_us +ffffffff821c42c0 T get_refcyc_per_line_delivery_pre_l_in_us +ffffffff821c43e0 T get_refcyc_per_line_delivery_pre_c_in_us +ffffffff821c4500 T get_refcyc_per_req_delivery_l_in_us +ffffffff821c4620 T get_refcyc_per_req_delivery_c_in_us +ffffffff821c4740 T get_refcyc_per_req_delivery_pre_l_in_us +ffffffff821c4860 T get_refcyc_per_req_delivery_pre_c_in_us +ffffffff821c4980 T get_refcyc_per_cursor_req_delivery_in_us +ffffffff821c4aa0 T get_refcyc_per_cursor_req_delivery_pre_in_us +ffffffff821c4bc0 T get_refcyc_per_meta_chunk_nom_l_in_us +ffffffff821c4ce0 T get_refcyc_per_meta_chunk_nom_c_in_us +ffffffff821c4e00 T get_refcyc_per_meta_chunk_vblank_l_in_us +ffffffff821c4f20 T get_refcyc_per_meta_chunk_vblank_c_in_us +ffffffff821c5040 T get_refcyc_per_meta_chunk_flip_l_in_us +ffffffff821c5160 T get_refcyc_per_meta_chunk_flip_c_in_us +ffffffff821c5280 T get_vstartup +ffffffff821c53a0 T get_vupdate_offset +ffffffff821c54c0 T get_vupdate_width +ffffffff821c55e0 T get_vready_offset +ffffffff821c5700 T get_vready_at_or_after_vsync +ffffffff821c5830 T get_min_dst_y_next_start +ffffffff821c5950 T get_dst_y_per_pte_row_nom_l +ffffffff821c5a70 T get_dst_y_per_pte_row_nom_c +ffffffff821c5b90 T get_dst_y_per_meta_row_nom_l +ffffffff821c5cb0 T get_dst_y_per_meta_row_nom_c +ffffffff821c5dd0 T get_refcyc_per_pte_group_nom_l_in_us +ffffffff821c5ef0 T get_refcyc_per_pte_group_nom_c_in_us +ffffffff821c6010 T get_refcyc_per_pte_group_vblank_l_in_us +ffffffff821c6130 T get_refcyc_per_pte_group_vblank_c_in_us +ffffffff821c6250 T get_refcyc_per_pte_group_flip_l_in_us +ffffffff821c6370 T get_refcyc_per_pte_group_flip_c_in_us +ffffffff821c6490 T get_vstartup_calculated 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dc_dsc_stream_bandwidth_overhead_in_kbps +ffffffff821d1560 T dc_dsc_get_policy_for_timing +ffffffff821d1600 T dc_dsc_policy_set_max_target_bpp_limit +ffffffff821d1630 T dc_dsc_policy_set_enable_dsc_when_not_needed +ffffffff821d1660 T dc_dsc_policy_set_disable_dsc_stream_overhead +ffffffff821d2000 T calc_rc_params +ffffffff821d3000 T dscc_compute_dsc_parameters +ffffffff821d4000 T dal_hw_factory_dce110_init +ffffffff821d4060 t define_hpd_registers +ffffffff821d40b0 t define_ddc_registers +ffffffff821d5000 T dal_hw_translate_dce110_init +ffffffff821d5030 t offset_to_id +ffffffff821d5390 t id_to_offset +ffffffff821d6000 T dal_hw_factory_dce120_init +ffffffff821d6060 t define_hpd_registers +ffffffff821d60b0 t define_ddc_registers +ffffffff821d7000 T dal_hw_translate_dce120_init +ffffffff821d7030 t offset_to_id +ffffffff821d73a0 t id_to_offset +ffffffff821d8000 T dal_hw_factory_dce80_init +ffffffff821d8060 t define_hpd_registers +ffffffff821d80b0 t define_ddc_registers +ffffffff821d9000 T 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onewire_write_byte -ffffffff8250e790 T onewire_read_block -ffffffff8250e830 T onewire_write_block -ffffffff8250e8d0 T onewire_triplet -ffffffff8250e9b0 T onewire_matchrom -ffffffff8250eb00 T onewire_search -ffffffff8250ee90 T onewire_thread -ffffffff8250f000 T onewire_crc -ffffffff8250f0e0 T onewire_crc16 -ffffffff8250f1c0 T onewire_famname -ffffffff8250f200 T onewire_matchbyfam -ffffffff82510000 T owid_match -ffffffff82510020 T owid_attach -ffffffff825100f0 T owid_detach -ffffffff82510130 T owid_activate -ffffffff82511000 T owsbm_match -ffffffff82511020 T owsbm_attach -ffffffff825111c0 T owsbm_detach -ffffffff82511230 T owsbm_activate -ffffffff82511260 T owsbm_update -ffffffff82512000 T owtemp_match -ffffffff82512020 T owtemp_attach -ffffffff82512110 T owtemp_detach -ffffffff82512180 T owtemp_activate -ffffffff825121b0 T owtemp_update -ffffffff82513000 T owctr_match -ffffffff82513020 T owctr_attach -ffffffff82513160 T owctr_detach -ffffffff825131d0 T owctr_activate -ffffffff82513200 T owctr_update -ffffffff82513230 T owctr_update_counter -ffffffff82514000 A __text_page_start -ffffffff82514000 T Xsyscall_meltdown -ffffffff8251400c T Xsyscall -ffffffff8251426e t Xsyscall_trampback -ffffffff82514280 T intr_user_exit -ffffffff825142c2 t intr_user_exit_post_ast -ffffffff825143ee t Xiretq_trampback -ffffffff825143fa T doreti_iret -ffffffff82515000 T alltraps -ffffffff82515138 T recall_trap -ffffffff82515150 T alltraps_kern -ffffffff82515153 T alltraps_kern_meltdown -ffffffff82516000 ? Xsyscall32 -ffffffff82516000 A __kutext_start -ffffffff82516000 A __text_page_end -ffffffff82517000 ? Xtrap00 -ffffffff82517010 ? Xtrap01 -ffffffff82517020 ? Xtrap02 -ffffffff82517024 c calltrap_specstk -ffffffff825170f0 ? calltrap_specstk_tramp -ffffffff82517110 ? Xtrap03 -ffffffff82517120 ? Xtrap04 -ffffffff82517130 ? Xtrap05 -ffffffff82517140 ? Xtrap06 -ffffffff82517150 ? Xtrap07 -ffffffff82517160 ? Xtrap08 -ffffffff82517170 ? Xtrap09 -ffffffff82517180 ? Xtrap0a -ffffffff82517190 ? Xtrap0b -ffffffff825171a0 ? Xtrap0c -ffffffff825171b0 ? Xtrap0d -ffffffff82517230 ? Xtrap0e -ffffffff82517240 ? Xintrspurious -ffffffff82517240 ? Xtrap0f -ffffffff82517250 ? Xtrap10 -ffffffff82517260 ? Xtrap11 -ffffffff82517270 ? Xtrap12 -ffffffff82517280 ? Xtrap13 -ffffffff82517290 ? Xtrap14 -ffffffff82517290 ? Xtrap15 -ffffffff82517290 ? Xtrap16 -ffffffff82517290 ? Xtrap17 -ffffffff82517290 ? Xtrap18 -ffffffff82517290 ? Xtrap19 -ffffffff82517290 ? Xtrap1a -ffffffff82517290 ? Xtrap1b -ffffffff82517290 ? Xtrap1c -ffffffff82517290 ? Xtrap1d -ffffffff82517290 ? Xtrap1e -ffffffff82517290 ? Xtrap1f -ffffffff825172a0 ? x2apic_eoi -ffffffff825172c0 ? Xintr_lapic_ipi -ffffffff825172f0 ? Xipi_invltlb -ffffffff82517310 ? Xipi_invlpg -ffffffff82517340 ? Xipi_invlrange -ffffffff82517380 ? Xipi_invltlb_pcid -ffffffff825173c0 ? Xipi_invlpg_pcid -ffffffff82517410 ? Xipi_invlrange_pcid -ffffffff82517480 ? Xintr_lapic_ltimer -ffffffff825174b0 ? Xintr_xen_upcall -ffffffff825174e0 ? Xintr_hyperv_upcall -ffffffff82517510 ? Xintr_legacy0 -ffffffff82517540 ? Xintr_legacy1 -ffffffff82517570 ? Xintr_legacy2 -ffffffff825175a0 ? Xintr_legacy3 -ffffffff825175d0 ? Xintr_legacy4 -ffffffff82517600 ? Xintr_legacy5 -ffffffff82517630 ? Xintr_legacy6 -ffffffff82517660 ? Xintr_legacy7 -ffffffff82517690 ? Xintr_legacy8 -ffffffff825176c0 ? Xintr_legacy9 -ffffffff825176f0 ? Xintr_legacy10 -ffffffff82517720 ? Xintr_legacy11 -ffffffff82517750 ? Xintr_legacy12 -ffffffff82517780 ? Xintr_legacy13 -ffffffff825177b0 ? Xintr_legacy14 -ffffffff825177e0 ? Xintr_legacy15 -ffffffff82517810 ? Xintr_ioapic_edge0 -ffffffff82517840 ? Xintr_ioapic_edge1 -ffffffff82517870 ? Xintr_ioapic_edge2 -ffffffff825178a0 ? Xintr_ioapic_edge3 -ffffffff825178d0 ? Xintr_ioapic_edge4 -ffffffff82517900 ? Xintr_ioapic_edge5 -ffffffff82517930 ? Xintr_ioapic_edge6 -ffffffff82517960 ? Xintr_ioapic_edge7 -ffffffff82517990 ? Xintr_ioapic_edge8 -ffffffff825179c0 ? Xintr_ioapic_edge9 -ffffffff825179f0 ? Xintr_ioapic_edge10 -ffffffff82517a20 ? Xintr_ioapic_edge11 -ffffffff82517a50 ? Xintr_ioapic_edge12 -ffffffff82517a80 ? Xintr_ioapic_edge13 -ffffffff82517ab0 ? Xintr_ioapic_edge14 -ffffffff82517ae0 ? Xintr_ioapic_edge15 -ffffffff82517b10 ? Xintr_ioapic_edge16 -ffffffff82517b40 ? Xintr_ioapic_edge17 -ffffffff82517b70 ? Xintr_ioapic_edge18 -ffffffff82517ba0 ? Xintr_ioapic_edge19 -ffffffff82517bd0 ? Xintr_ioapic_edge20 -ffffffff82517c00 ? Xintr_ioapic_edge21 -ffffffff82517c30 ? Xintr_ioapic_edge22 -ffffffff82517c60 ? Xintr_ioapic_edge23 -ffffffff82517c90 ? Xintr_ioapic_edge24 -ffffffff82517cc0 ? Xintr_ioapic_edge25 -ffffffff82517cf0 ? Xintr_ioapic_edge26 -ffffffff82517d20 ? Xintr_ioapic_edge27 -ffffffff82517d50 ? Xintr_ioapic_edge28 -ffffffff82517d80 ? Xintr_ioapic_edge29 -ffffffff82517db0 ? Xintr_ioapic_edge30 -ffffffff82517de0 ? Xintr_ioapic_edge31 -ffffffff82517e10 ? Xintr_ioapic_edge32 -ffffffff82517e40 ? Xintr_ioapic_edge33 -ffffffff82517e70 ? Xintr_ioapic_edge34 -ffffffff82517ea0 ? Xintr_ioapic_edge35 -ffffffff82517ed0 ? Xintr_ioapic_edge36 -ffffffff82517f00 ? Xintr_ioapic_edge37 -ffffffff82517f30 ? Xintr_ioapic_edge38 -ffffffff82517f60 ? Xintr_ioapic_edge39 -ffffffff82517f90 ? Xintr_ioapic_edge40 -ffffffff82517fc0 ? Xintr_ioapic_edge41 -ffffffff82517ff0 ? Xintr_ioapic_edge42 -ffffffff82518020 ? Xintr_ioapic_edge43 -ffffffff82518050 ? Xintr_ioapic_edge44 -ffffffff82518080 ? Xintr_ioapic_edge45 -ffffffff825180b0 ? Xintr_ioapic_edge46 -ffffffff825180e0 ? Xintr_ioapic_edge47 -ffffffff82518110 ? Xintr_ioapic_edge48 -ffffffff82518140 ? Xintr_ioapic_edge49 -ffffffff82518170 ? Xintr_ioapic_edge50 -ffffffff825181a0 ? Xintr_ioapic_edge51 -ffffffff825181d0 ? Xintr_ioapic_edge52 -ffffffff82518200 ? Xintr_ioapic_edge53 -ffffffff82518230 ? Xintr_ioapic_edge54 -ffffffff82518260 ? Xintr_ioapic_edge55 -ffffffff82518290 ? Xintr_ioapic_edge56 -ffffffff825182c0 ? Xintr_ioapic_edge57 -ffffffff825182f0 ? Xintr_ioapic_edge58 -ffffffff82518320 ? Xintr_ioapic_edge59 -ffffffff82518350 ? Xintr_ioapic_edge60 -ffffffff82518380 ? Xintr_ioapic_edge61 -ffffffff825183b0 ? Xintr_ioapic_edge62 -ffffffff825183e0 ? Xintr_ioapic_edge63 -ffffffff82518410 ? Xintr_ioapic_level0 -ffffffff82518440 ? Xintr_ioapic_level1 -ffffffff82518470 ? Xintr_ioapic_level2 -ffffffff825184a0 ? Xintr_ioapic_level3 -ffffffff825184d0 ? Xintr_ioapic_level4 -ffffffff82518500 ? Xintr_ioapic_level5 -ffffffff82518530 ? Xintr_ioapic_level6 -ffffffff82518560 ? Xintr_ioapic_level7 -ffffffff82518590 ? Xintr_ioapic_level8 -ffffffff825185c0 ? Xintr_ioapic_level9 -ffffffff825185f0 ? Xintr_ioapic_level10 -ffffffff82518620 ? Xintr_ioapic_level11 -ffffffff82518650 ? Xintr_ioapic_level12 -ffffffff82518680 ? Xintr_ioapic_level13 -ffffffff825186b0 ? Xintr_ioapic_level14 -ffffffff825186e0 ? Xintr_ioapic_level15 -ffffffff82518710 ? Xintr_ioapic_level16 -ffffffff82518740 ? Xintr_ioapic_level17 -ffffffff82518770 ? Xintr_ioapic_level18 -ffffffff825187a0 ? Xintr_ioapic_level19 -ffffffff825187d0 ? Xintr_ioapic_level20 -ffffffff82518800 ? Xintr_ioapic_level21 -ffffffff82518830 ? Xintr_ioapic_level22 -ffffffff82518860 ? Xintr_ioapic_level23 -ffffffff82518890 ? Xintr_ioapic_level24 -ffffffff825188c0 ? Xintr_ioapic_level25 -ffffffff825188f0 ? Xintr_ioapic_level26 -ffffffff82518920 ? Xintr_ioapic_level27 -ffffffff82518950 ? Xintr_ioapic_level28 -ffffffff82518980 ? Xintr_ioapic_level29 -ffffffff825189b0 ? Xintr_ioapic_level30 -ffffffff825189e0 ? Xintr_ioapic_level31 -ffffffff82518a10 ? Xintr_ioapic_level32 -ffffffff82518a40 ? Xintr_ioapic_level33 -ffffffff82518a70 ? Xintr_ioapic_level34 -ffffffff82518aa0 ? Xintr_ioapic_level35 -ffffffff82518ad0 ? Xintr_ioapic_level36 -ffffffff82518b00 ? Xintr_ioapic_level37 -ffffffff82518b30 ? Xintr_ioapic_level38 -ffffffff82518b60 ? Xintr_ioapic_level39 -ffffffff82518b90 ? Xintr_ioapic_level40 -ffffffff82518bc0 ? Xintr_ioapic_level41 -ffffffff82518bf0 ? Xintr_ioapic_level42 -ffffffff82518c20 ? Xintr_ioapic_level43 -ffffffff82518c50 ? Xintr_ioapic_level44 -ffffffff82518c80 ? Xintr_ioapic_level45 -ffffffff82518cb0 ? Xintr_ioapic_level46 -ffffffff82518ce0 ? Xintr_ioapic_level47 -ffffffff82518d10 ? Xintr_ioapic_level48 -ffffffff82518d40 ? Xintr_ioapic_level49 -ffffffff82518d70 ? Xintr_ioapic_level50 -ffffffff82518da0 ? Xintr_ioapic_level51 -ffffffff82518dd0 ? Xintr_ioapic_level52 -ffffffff82518e00 ? Xintr_ioapic_level53 -ffffffff82518e30 ? Xintr_ioapic_level54 -ffffffff82518e60 ? Xintr_ioapic_level55 -ffffffff82518e90 ? Xintr_ioapic_level56 -ffffffff82518ec0 ? Xintr_ioapic_level57 -ffffffff82518ef0 ? Xintr_ioapic_level58 -ffffffff82518f20 ? Xintr_ioapic_level59 -ffffffff82518f50 ? Xintr_ioapic_level60 -ffffffff82518f80 ? Xintr_ioapic_level61 -ffffffff82518fb0 ? Xintr_ioapic_level62 -ffffffff82518fe0 ? Xintr_ioapic_level63 -ffffffff8251a000 ? codepatch_fill_nop -ffffffff8251a000 A __cptext_start -ffffffff8251a000 A __kutext_end -ffffffff8251a0b0 ? codepatch_maprw -ffffffff8251a190 ? codepatch_unmaprw -ffffffff8251a1f0 ? codepatch_nop -ffffffff8251a340 ? codepatch_replace -ffffffff8251a4e0 ? codepatch_call -ffffffff8251a500 ? codepatch_jmp -ffffffff8251b000 A __cptext_end -ffffffff8251b000 A __rodata_start -ffffffff8251b000 C _etext -ffffffff8251b000 C etext -ffffffff8251c000 r seeprom_read -ffffffff8251c004 r icl_mg_pll_find_divisors.div1_vals -ffffffff8251c028 r gen9bc_tgp_ddc_pin_map -ffffffff8251c038 r athn_ac2qid -ffffffff8251c038 r athn_ac2qid -ffffffff8251c038 r athn_ac2qid -ffffffff8251c044 r rtwn_get_rssi.cckoff -ffffffff8251c06c r rsu_ac2qid -ffffffff8251c07c r pckbc_portcmd -ffffffff8251c080 r tht_fifo_write_pad.pad -ffffffff8251c088 r rsu_get_rssi.cckoff -ffffffff8251c09c r adlp_n_revids -ffffffff8251c0ec r apple_iso_trans -ffffffff8251c0f0 r dg2_g12_revid_step_tbl -ffffffff8251c0f8 r wihap_check_tx.txratetable -ffffffff8251c0fc r dmamode -ffffffff8251c124 r gen9_edram_size_mb.sets -ffffffff8251d000 r isomappings -ffffffff8251d080 r unimappings -ffffffff8251d230 r replacements -ffffffff82520b09 r cmd0646_9_tim_udma -ffffffff825740a6 r pp_r600_decoded_lanes -ffffffff8258f2e5 r cmd680_setup_channel.udma_tbl -ffffffff82596ecc r apollo_udma33_tim -ffffffff8259cf6f r substchar -ffffffff8259f015 r apollo_udma100_tim -ffffffff825c684e r apollo_udma66_tim -ffffffff825cdc76 r apollo_pio_rec -ffffffff825dcf12 r cy_pio_rec -ffffffff8260c1cd r apollo_udma133_tim -ffffffff82618c58 R drm_ca -ffffffff82618c80 R drm_filtops -ffffffff82618cb0 R drmread_filtops -ffffffff82619000 r vga_emulops -ffffffff82619048 R vga_stdscreen -ffffffff82619078 R vga_stdscreen_mono -ffffffff826190a8 R vga_stdscreen_bf -ffffffff826190d8 R vga_40lscreen -ffffffff82619108 R vga_40lscreen_mono -ffffffff82619138 R vga_40lscreen_bf -ffffffff82619168 R vga_50lscreen -ffffffff82619198 R vga_50lscreen_mono -ffffffff826191c8 R vga_50lscreen_bf -ffffffff826191f8 R vga_screenlist -ffffffff82619208 R vga_screenlist_mono -ffffffff82619218 R vga_accessops -ffffffff82619278 r i945_wm_info -ffffffff826192b0 r bgansitopc -ffffffff826192b8 r pctoansi -ffffffff826192f8 r sdma_offsets -ffffffff826192f8 r sdma_offsets -ffffffff82619328 r iha_rate_tbl -ffffffff82619360 r i830_a_wm_info -ffffffff82619398 r gen9_edram_size_mb.ways -ffffffff82619400 r aggr_periodic_times -ffffffff82619480 r jsl_ehl_revids -ffffffff826194f8 r michael_final.pad -ffffffff82619520 r rt_copysa.maskarray -ffffffff82619528 r i915_wm_info -ffffffff82619530 r amdgpu_ih_clientid_jpeg -ffffffff82619530 r amdgpu_ih_clientid_uvds -ffffffff82619530 r amdgpu_ih_clientid_vcns -ffffffff82619530 r amdgpu_ih_clientid_vcns -ffffffff82619530 r amdgpu_ih_clientid_vcns -ffffffff82619568 r vga_setfontset.cmaptabb -ffffffff82619580 r tgl_revids -ffffffff826195d8 r i830_bc_wm_info -ffffffff82619680 r __drm_universal_plane_init.default_modifiers -ffffffff82619690 r iwn_tid2fifo -ffffffff826196a8 r vga_setfontset.cmaptaba -ffffffff826196b0 r crtc_offsets -ffffffff826196b0 r crtc_offsets -ffffffff826196b0 r crtc_offsets -ffffffff826196d0 r link_speed -ffffffff826196d0 r link_speed -ffffffff826196d0 r link_speed -ffffffff82619748 r rtwn_r88e_get_rssi.cckoff -ffffffff8261a000 R edid_vendors -ffffffff8261a2c0 R edid_nvendors -ffffffff8261a2d0 R edid_products -ffffffff8261a330 R edid_nproducts -ffffffff8261a340 r _edid_modes -ffffffff8261b000 R videomode_list -ffffffff8261c080 R videomode_count -ffffffff8261d000 r ahc_hard_errors -ffffffff8261d080 r critical_sections -ffffffff8261d0b0 r patches -ffffffff8261dd50 r seqprog -ffffffff8261f000 r ahc_switch -ffffffff82620000 r termstat_strings -ffffffff82620020 r critical_sections -ffffffff82620060 r seqprog -ffffffff82620d50 r patches -ffffffff82622000 r ahd_switch -ffffffff82623000 R aic_switch -ffffffff82624000 R adw_switch -ffffffff82625000 R gdt_switch -ffffffff82626000 R twe_switch -ffffffff82627000 R ciss_switch -ffffffff82627030 R ciss_level -ffffffff82627050 R ciss_stat -ffffffff82628000 R ami_switch -ffffffff82628028 R ami_raw_switch -ffffffff82629000 R mfi_switch -ffffffff82629028 R mfi_pd_switch -ffffffff82629050 r mfi_iop_xscale -ffffffff82629080 r mfi_iop_ppc -ffffffff826290b0 r mfi_iop_gen2 -ffffffff826290e0 r mfi_iop_skinny -ffffffff82629110 r mfi_bbu_indicators -ffffffff826291c0 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs -ffffffff826291f0 r chv_oa_mux_regs -ffffffff82629210 r fiji_clock_stretcher_lookup_table -ffffffff82629210 r tonga_clock_stretcher_lookup_table -ffffffff82629240 r link_speed -ffffffff82629240 r link_speed -ffffffff82629240 r link_speed -ffffffff82629280 r drm_fb_xfrm.default_dst_pitch -ffffffff82629280 r non_supported_protection -ffffffff82629380 r tgl_uy_revids -ffffffff826293d0 r bwi_phy_noise_11g_rev1 -ffffffff82629450 r cardslot_process_event.antonym_ev -ffffffff826294e0 r gen11_oa_mux_regs -ffffffff826295d0 r ddr2_cycle_tenths -ffffffff82629640 r rtw_intr_rx.ratetbl -ffffffff826296c0 r abm_config -ffffffff82629730 r getbootinfo.ports.30 -ffffffff82629780 r reg_offsets -ffffffff82629790 r bwi_rf_lo_measure_11g.rf_lo_adjust -ffffffff826297a0 r init_non_clock_fields.look_up -ffffffff826297b0 r uftdi_8u232am_getrate.roundoff -ffffffff82629800 r zyd_rx_data.rates -ffffffff82629810 r ieee80211_ra_valid_tx_mcs.max_mcs -ffffffff82629850 r mmio_invalidate_full.gen8_regs -ffffffff82629880 r bwi_phy_noise_11g -ffffffff82629890 r hpt366_pio -ffffffff826298c0 r glk_revids -ffffffff82629910 r bwi_rf_calc_nrssi_slope_11g.save_phy3_regs -ffffffff82629930 r ether_crc32_be_update.rev -ffffffff82629930 r rtw_grf5101_mac_crypt.caesar -ffffffff82629980 r snb_b_fdi_train_param -ffffffff8262a000 R qlw_switch -ffffffff8262b000 R isp_2100_risc_code -ffffffff8263dbf0 R isp_2200_risc_code -ffffffff82650990 R isp_2300_risc_code -ffffffff8266a408 R qla_switch -ffffffff8266a430 r qla_regs_2100 -ffffffff8266a460 r qla_regs_2200 -ffffffff8266a490 r qla_regs_23XX -ffffffff8266b000 R ahci_atascsi_methods -ffffffff8266c000 R nvme_switch -ffffffff8266c028 r nvme_ops -ffffffff8266d000 R mpi_switch -ffffffff8266d100 r intel_hpll_vco.elk_vco -ffffffff8266d160 r pin_offsets -ffffffff8266d1c0 r firmware_list -ffffffff8266d220 r atom_arg_shift -ffffffff8266d220 r atom_arg_shift -ffffffff8266d260 r pf_syncookie_wstab -ffffffff8266d280 r ieee80211_media_init.mopts -ffffffff8266d2e0 r add_entropy_words.twist_table -ffffffff8266d380 r urtw_8225v2_txpwr_cck -ffffffff8266d3c0 r bwfm_pci_prio2fifo -ffffffff8266d3c0 r ieee80211_up_to_ac.up_to_ac -ffffffff8266d480 r paritytab -ffffffff8266d480 r x86emu_parity_tab -ffffffff8266d4a0 r legacy_connector_convert -ffffffff8266d4e0 r gen7_oa_mux_regs -ffffffff8266d500 r hsw_oa_mux_regs -ffffffff8266d520 r notetab -ffffffff8266d540 r urtw_8225v2_txpwr_cck_ch14 -ffffffff8266d560 r bwi_rf_calibval.rf_calibvals -ffffffff8266d600 r pf_syncookie_msstab -ffffffff8266d660 r xgmi3x16_pcs_err_status_reg_aldebaran -ffffffff8266d6c0 r uath_wme_init.uath_wme_11g -ffffffff8266d6e0 r gen7_oa_b_counters -ffffffff8266d840 r icl_revids -ffffffff8266d900 r rtwn_iq_calib_run.reg_adda -ffffffff8266d940 r atom_def_dst -ffffffff8266d940 r atom_def_dst -ffffffff8266d980 r sha256_initial_hash_value -ffffffff8266d9e0 r otus_edca_def -ffffffff8266da00 r intel_hpll_vco.blb_vco -ffffffff8266dac0 r epic_pci_subsys_info -ffffffff8266dae0 r atom_arg_mask -ffffffff8266dae0 r atom_arg_mask -ffffffff8266db40 r butmap -ffffffff8266db80 r GFX_RLC_SRM_INDEX_CNTL_DATA_OFFSETS -ffffffff8266dbc0 r comsoft.lsrmap -ffffffff8266dc00 r tulip_mii_phy_readspecific.table -ffffffff8266dc20 r kbl_revids -ffffffff8266dce0 r intel_hpll_vco.pnv_vco -ffffffff8266dd40 r dmapageport -ffffffff8266de00 r intel_hpll_vco.ctg_vco -ffffffff8266dec0 r drm_calculate_luminance_range.pre_computed_values -ffffffff8266e000 R sili_atascsi_methods -ffffffff8266f000 R ncr53c9x_switch -ffffffff82670000 r scf_period -ffffffff82671000 R siop_script -ffffffff826715a0 R lun_switch -ffffffff826715d0 R tag_switch -ffffffff82671660 R load_dsa -ffffffff826716c4 R siop_led_on -ffffffff826716cc R siop_led_off -ffffffff826716d8 R siop_switch -ffffffff82672000 R ep_vortex_media -ffffffff82672100 R ep_default_to_media -ffffffff82673000 R wi_card_ident -ffffffff82675000 R ucode_table -ffffffff82676000 r re_revisions -ffffffff82676290 r re_kstats_tpl -ffffffff82678000 R smc91cxx_media -ffffffff82678010 R smc91cxx_mii_bitbang_ops -ffffffff82679000 R dl10019_mii_bitbang_ops -ffffffff82679028 R dl10022_mii_bitbang_ops -ffffffff8267a000 R ax88190_mii_bitbang_ops -ffffffff8267c000 R ac97_audio_default -ffffffff8267c020 R ac97_on_off -ffffffff8267c324 R ac97_mic_select -ffffffff8267c628 R ac97_mono_select -ffffffff8267c92c R ac97_source -ffffffff8267cc30 R ac97_volume_stereo -ffffffff8267cc4c R ac97_volume_mono -ffffffff8267cc70 R source_info -ffffffff8267d470 R ac97_ad -ffffffff8267d580 R ac97_ak -ffffffff8267d610 R ac97_av -ffffffff8267d750 R ac97_rl -ffffffff8267d7a0 R ac97_cm -ffffffff8267d820 R ac97_cr -ffffffff8267d840 R ac97_cs -ffffffff8267d920 R ac97_cx -ffffffff8267d980 R ac97_dt -ffffffff8267d9a0 R ac97_em -ffffffff8267d9d0 R ac97_es -ffffffff8267d9f0 R ac97_is -ffffffff8267da10 R ac97_ic -ffffffff8267da90 R ac97_it -ffffffff8267dac0 R ac97_ns -ffffffff8267db80 R ac97_ps -ffffffff8267dbb0 R ac97_sl -ffffffff8267dbd0 R ac97_st -ffffffff8267dd20 R ac97_vi -ffffffff8267dd50 R ac97_tt -ffffffff8267ddd0 R ac97_ti -ffffffff8267ddf0 R ac97_wb -ffffffff8267de10 R ac97_wo -ffffffff8267dea0 R ac97_ym -ffffffff8267def0 R ac97_vendors -ffffffff8267e1f0 R ac97enhancement -ffffffff8267e2f0 R ac97feature -ffffffff8267f000 R lm_chips -ffffffff8267f020 R lm78_sensors -ffffffff8267f1a0 R w83627hf_sensors -ffffffff8267f3a0 R w83627ehf_sensors -ffffffff8267f5c0 R w83627dhg_sensors -ffffffff8267f7c0 R nct6776f_sensors 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+ffffffff8220aa80 T dmub_dcn31_is_supported +ffffffff8220aae0 T dmub_dcn31_set_gpint +ffffffff8220ab10 T dmub_dcn31_is_gpint_acked +ffffffff8220ab70 T dmub_dcn31_get_gpint_response +ffffffff8220aba0 T dmub_dcn31_get_gpint_dataout +ffffffff8220acc0 T dmub_dcn31_get_fw_boot_status +ffffffff8220acf0 T dmub_dcn31_enable_dmub_boot_options +ffffffff8220ad70 T dmub_dcn31_skip_dmub_panel_power_sequence +ffffffff8220adc0 T dmub_dcn31_setup_outbox0 +ffffffff8220ae10 T dmub_dcn31_get_outbox0_wptr +ffffffff8220ae30 T dmub_dcn31_set_outbox0_rptr +ffffffff8220ae50 T dmub_dcn31_get_current_time +ffffffff8220ae80 T dmub_dcn31_get_diagnostic_data +ffffffff8220b320 T dmub_dcn31_should_detect +ffffffff8220c000 T dmub_dcn32_reset +ffffffff8220c1d0 T dmub_dcn32_reset_release +ffffffff8220c2c0 T dmub_dcn32_backdoor_load +ffffffff8220c520 T dmub_dcn32_backdoor_load_zfb_mode +ffffffff8220c700 T dmub_dcn32_setup_windows +ffffffff8220ca30 T dmub_dcn32_setup_mailbox +ffffffff8220ca80 T dmub_dcn32_get_inbox1_rptr +ffffffff8220caa0 T dmub_dcn32_set_inbox1_wptr +ffffffff8220cac0 T dmub_dcn32_setup_out_mailbox +ffffffff8220cb10 T dmub_dcn32_get_outbox1_wptr +ffffffff8220cb30 T dmub_dcn32_set_outbox1_rptr +ffffffff8220cb50 T dmub_dcn32_is_hw_init +ffffffff8220cbd0 T dmub_dcn32_is_supported +ffffffff8220cc30 T dmub_dcn32_set_gpint +ffffffff8220cc60 T dmub_dcn32_is_gpint_acked +ffffffff8220ccc0 T dmub_dcn32_get_gpint_response +ffffffff8220ccf0 T dmub_dcn32_get_gpint_dataout +ffffffff8220ce10 T dmub_dcn32_get_fw_boot_status +ffffffff8220ce40 T dmub_dcn32_enable_dmub_boot_options +ffffffff8220ce70 T dmub_dcn32_skip_dmub_panel_power_sequence +ffffffff8220cec0 T dmub_dcn32_setup_outbox0 +ffffffff8220cf10 T dmub_dcn32_get_outbox0_wptr +ffffffff8220cf30 T dmub_dcn32_set_outbox0_rptr +ffffffff8220cf50 T dmub_dcn32_get_current_time +ffffffff8220cf80 T dmub_dcn32_get_diagnostic_data +ffffffff8220d420 T dmub_dcn32_configure_dmub_in_system_memory +ffffffff8220d450 T dmub_dcn32_send_inbox0_cmd +ffffffff8220d470 T dmub_dcn32_clear_inbox0_ack_register +ffffffff8220d4a0 T dmub_dcn32_read_inbox0_ack_register +ffffffff8220e000 T dmub_reg_update +ffffffff8220e170 T dmub_reg_set +ffffffff8220e2d0 T dmub_reg_get +ffffffff8220f000 T dmub_flush_buffer_mem +ffffffff8220f030 T dmub_srv_create +ffffffff8220f550 T dmub_srv_destroy +ffffffff8220f570 T dmub_srv_calc_region_info +ffffffff8220f7e0 T dmub_srv_calc_fb_info +ffffffff8220f980 T dmub_srv_has_hw_support +ffffffff8220f9f0 T dmub_srv_is_hw_init +ffffffff8220fa60 T dmub_srv_hw_init +ffffffff8220fea0 T dmub_srv_hw_reset +ffffffff8220ff00 T dmub_srv_cmd_queue +ffffffff82210000 T dmub_srv_cmd_execute +ffffffff822100c0 T dmub_srv_wait_for_auto_load +ffffffff82210160 T dmub_srv_wait_for_phy_init +ffffffff82210210 T dmub_srv_wait_for_idle +ffffffff822102c0 T dmub_srv_send_gpint_command +ffffffff822103a0 T dmub_srv_get_gpint_response +ffffffff82210400 T dmub_srv_get_gpint_dataout +ffffffff82210460 T dmub_srv_get_fw_boot_status +ffffffff822104d0 T dmub_srv_cmd_with_reply_data +ffffffff82210740 T dmub_srv_get_outbox0_msg +ffffffff822107e0 T dmub_srv_get_diagnostic_data +ffffffff82210830 T dmub_srv_should_detect +ffffffff82210870 T dmub_srv_clear_inbox0_ack +ffffffff822108c0 T dmub_srv_wait_for_inbox0_ack +ffffffff82210950 T dmub_srv_send_inbox0_cmd +ffffffff82211000 T dmub_srv_stat_get_notification +ffffffff82212000 T setup_x_points_distribution +ffffffff82212160 T log_x_points_distribution +ffffffff82212190 T precompute_pq +ffffffff82212350 t compute_pq +ffffffff82212560 T precompute_de_pq +ffffffff822126b0 t compute_de_pq +ffffffff82212970 T calculate_user_regamma_coeff +ffffffff82212d40 t apply_lut_1d +ffffffff82213070 T calculate_user_regamma_ramp +ffffffff822139b0 T mod_color_calculate_degamma_params +ffffffff82213f80 t build_evenly_distributed_points +ffffffff82214100 t scale_gamma +ffffffff822142b0 t build_degamma +ffffffff82214680 t build_hlg_degamma +ffffffff822148a0 t map_regamma_hw_to_x_user +ffffffff82215000 T mod_color_calculate_regamma_params +ffffffff82217170 T mod_color_calculate_degamma_curve +ffffffff82217630 t translate_from_linear_space +ffffffff82217970 t build_coefficients +ffffffff82217af0 t calculate_mapped_value +ffffffff82218000 T mod_color_is_table_init +ffffffff82218050 T mod_color_get_table +ffffffff82218090 T mod_color_set_table_init_state +ffffffff82219000 T mod_freesync_create +ffffffff82219070 T mod_freesync_destroy +ffffffff822190b0 T mod_freesync_calc_v_total_from_refresh +ffffffff82219140 T mod_freesync_get_vmin_vmax +ffffffff82219180 T mod_freesync_get_v_position +ffffffff82219200 T mod_freesync_build_vrr_infopacket +ffffffff82219950 T mod_freesync_build_vrr_params +ffffffff82219cd0 T mod_freesync_calc_nominal_field_rate +ffffffff82219d20 T mod_freesync_handle_preflip +ffffffff8221a140 T mod_freesync_handle_v_update +ffffffff8221a600 T mod_freesync_get_settings +ffffffff8221a660 T mod_freesync_calc_field_rate_from_timing +ffffffff8221a6b0 T mod_freesync_get_freesync_enabled +ffffffff8221a6e0 T mod_freesync_is_valid_range +ffffffff8221b000 T mod_build_vsc_infopacket +ffffffff8221b200 T mod_build_hf_vsif_infopacket +ffffffff8221c000 T dmub_init_abm_config +ffffffff8221c540 t fill_iram_v_2_3 +ffffffff8221c9a0 T dmcu_load_iram +ffffffff8221d180 T is_psr_su_specific_panel +ffffffff8221d210 T mod_power_calc_psr_configs +ffffffff8221d310 T mod_power_only_edp +ffffffff8221e000 T mod_vmid_get_for_ptb +ffffffff8221e230 T mod_vmid_reset +ffffffff8221e2f0 T mod_vmid_create +ffffffff8221e430 T mod_vmid_destroy +ffffffff8221f000 T amdgpu_dpm_get_sclk +ffffffff8221f090 T amdgpu_dpm_get_mclk +ffffffff8221f120 T amdgpu_dpm_set_powergating_by_smu +ffffffff8221f200 T amdgpu_dpm_set_gfx_power_up_by_imu +ffffffff8221f310 T amdgpu_dpm_baco_enter +ffffffff8221f3a0 T amdgpu_dpm_baco_exit +ffffffff8221f430 T amdgpu_dpm_set_mp1_state +ffffffff8221f4c0 T amdgpu_dpm_is_baco_supported +ffffffff8221f560 T amdgpu_dpm_mode2_reset +ffffffff8221f5f0 T amdgpu_dpm_baco_reset +ffffffff8221f6a0 T amdgpu_dpm_is_mode1_reset_supported +ffffffff8221f710 T amdgpu_dpm_mode1_reset +ffffffff8221f790 T amdgpu_dpm_switch_power_profile +ffffffff8221f830 T amdgpu_dpm_set_xgmi_pstate +ffffffff8221f8c0 T amdgpu_dpm_set_df_cstate +ffffffff8221f960 T amdgpu_dpm_allow_xgmi_power_down +ffffffff8221f9e0 T amdgpu_dpm_enable_mgpu_fan_boost +ffffffff8221fa70 T amdgpu_dpm_set_clockgating_by_smu +ffffffff8221fb10 T amdgpu_dpm_smu_i2c_bus_access +ffffffff8221fbb0 T amdgpu_pm_acpi_event_handler +ffffffff8221fc70 T amdgpu_dpm_read_sensor +ffffffff8221fd20 T amdgpu_dpm_compute_clocks +ffffffff8221fe00 T amdgpu_dpm_enable_uvd +ffffffff8221ffe0 T amdgpu_dpm_enable_vce +ffffffff822201c0 T amdgpu_dpm_enable_jpeg +ffffffff822202b0 T amdgpu_pm_load_smu_firmware +ffffffff82220360 T amdgpu_dpm_handle_passthrough_sbr +ffffffff822203e0 T amdgpu_dpm_send_hbm_bad_pages_num +ffffffff82220460 T amdgpu_dpm_send_hbm_bad_channel_flag +ffffffff822204e0 T amdgpu_dpm_get_dpm_freq_range +ffffffff82220580 T amdgpu_dpm_set_soft_freq_range +ffffffff82220620 T amdgpu_dpm_write_watermarks_table +ffffffff82220690 T amdgpu_dpm_wait_for_event +ffffffff82220720 T amdgpu_dpm_set_residency_gfxoff +ffffffff822207a0 T amdgpu_dpm_get_residency_gfxoff +ffffffff82220820 T amdgpu_dpm_get_entrycount_gfxoff +ffffffff822208a0 T amdgpu_dpm_get_status_gfxoff +ffffffff82220920 T amdgpu_dpm_get_thermal_throttling_counter +ffffffff82220970 T amdgpu_dpm_gfx_state_change +ffffffff822209d0 T amdgpu_dpm_get_ecc_info +ffffffff82220a50 T amdgpu_dpm_get_vce_clock_state +ffffffff82220ae0 T amdgpu_dpm_get_current_power_state +ffffffff82220b50 T amdgpu_dpm_set_power_state +ffffffff82220ca0 T amdgpu_dpm_dispatch_task +ffffffff82220d40 T amdgpu_dpm_get_performance_level +ffffffff82220dd0 T amdgpu_dpm_force_performance_level +ffffffff82220fb0 T amdgpu_dpm_get_pp_num_states +ffffffff82221040 T amdgpu_dpm_get_pp_table +ffffffff822210d0 T amdgpu_dpm_set_fine_grain_clk_vol +ffffffff82221170 T amdgpu_dpm_odn_edit_dpm_table +ffffffff82221210 T amdgpu_dpm_print_clock_levels +ffffffff822212a0 T amdgpu_dpm_emit_clock_levels +ffffffff82221340 T amdgpu_dpm_set_ppfeature_status +ffffffff822213d0 T amdgpu_dpm_get_ppfeature_status +ffffffff82221460 T amdgpu_dpm_force_clock_level +ffffffff822214f0 T amdgpu_dpm_get_sclk_od +ffffffff82221570 T amdgpu_dpm_set_sclk_od +ffffffff822216f0 T amdgpu_dpm_get_mclk_od +ffffffff82221770 T amdgpu_dpm_set_mclk_od +ffffffff822218f0 T amdgpu_dpm_get_power_profile_mode +ffffffff82221980 T amdgpu_dpm_set_power_profile_mode +ffffffff82221a10 T amdgpu_dpm_get_gpu_metrics +ffffffff82221aa0 T amdgpu_dpm_get_fan_control_mode +ffffffff82221b30 T amdgpu_dpm_set_fan_speed_pwm +ffffffff82221bc0 T amdgpu_dpm_get_fan_speed_pwm +ffffffff82221c50 T amdgpu_dpm_get_fan_speed_rpm +ffffffff82221ce0 T amdgpu_dpm_set_fan_speed_rpm +ffffffff82221d70 T amdgpu_dpm_set_fan_control_mode +ffffffff82221e00 T amdgpu_dpm_get_power_limit +ffffffff82221ea0 T amdgpu_dpm_set_power_limit +ffffffff82221f30 T amdgpu_dpm_is_cclk_dpm_supported +ffffffff82221fa0 T amdgpu_dpm_debugfs_print_current_performance_level +ffffffff82222030 T amdgpu_dpm_get_smu_prv_buf_details +ffffffff822220d0 T amdgpu_dpm_is_overdrive_supported +ffffffff82222160 T amdgpu_dpm_set_pp_table +ffffffff82222200 T amdgpu_dpm_get_num_cpu_cores +ffffffff82222250 T amdgpu_dpm_stb_debug_fs_init +ffffffff822222a0 T amdgpu_dpm_display_configuration_change +ffffffff82222330 T amdgpu_dpm_get_clock_by_type +ffffffff822223c0 T amdgpu_dpm_get_display_mode_validation_clks +ffffffff82222450 T amdgpu_dpm_get_clock_by_type_with_latency +ffffffff822224e0 T amdgpu_dpm_get_clock_by_type_with_voltage +ffffffff82222570 T amdgpu_dpm_set_watermarks_for_clocks_ranges +ffffffff82222600 T amdgpu_dpm_display_clock_voltage_request +ffffffff82222690 T amdgpu_dpm_get_current_clocks +ffffffff82222720 T amdgpu_dpm_notify_smu_enable_pwe +ffffffff822227a0 T amdgpu_dpm_set_active_display_count +ffffffff82222830 T amdgpu_dpm_set_min_deep_sleep_dcefclk +ffffffff822228c0 T amdgpu_dpm_set_hard_min_dcefclk_by_freq +ffffffff82222950 T amdgpu_dpm_set_hard_min_fclk_by_freq +ffffffff822229e0 T amdgpu_dpm_display_disable_memory_clock_switch +ffffffff82222a70 T amdgpu_dpm_get_max_sustainable_clocks_by_dc +ffffffff82222b00 T amdgpu_dpm_get_uclk_dpm_states +ffffffff82222ba0 T amdgpu_dpm_get_dpm_clock_table +ffffffff82223000 T amdgpu_dpm_get_active_displays +ffffffff822230a0 T amdgpu_dpm_get_vblank_time +ffffffff82223150 T amdgpu_dpm_get_vrefresh +ffffffff82224000 T amdgpu_pm_sysfs_init +ffffffff82224030 T amdgpu_pm_sysfs_fini +ffffffff82224060 T amdgpu_debugfs_pm_init +ffffffff82225000 T amdgpu_dpm_print_class_info +ffffffff822252b0 T amdgpu_dpm_print_cap_info +ffffffff82225330 T amdgpu_dpm_print_ps_status +ffffffff822253c0 T amdgpu_pm_print_power_states +ffffffff82225470 T amdgpu_get_platform_caps +ffffffff82225510 T amdgpu_parse_extended_power_table +ffffffff82226520 T amdgpu_free_extended_power_table +ffffffff82226630 T amdgpu_add_thermal_controller +ffffffff82226a60 T amdgpu_get_vce_clock_state +ffffffff82226aa0 T amdgpu_legacy_dpm_compute_clocks +ffffffff82226f10 T amdgpu_dpm_thermal_work_handler +ffffffff82227000 t pp_early_init +ffffffff82227100 t pp_late_init +ffffffff82227210 t pp_sw_init +ffffffff82227230 t pp_sw_fini +ffffffff822272b0 t pp_hw_init +ffffffff82227300 t pp_hw_fini +ffffffff82227340 t pp_late_fini +ffffffff822273a0 t pp_suspend +ffffffff822273c0 t pp_resume +ffffffff822273e0 t pp_is_idle +ffffffff82227410 t pp_wait_for_idle +ffffffff82227440 t pp_sw_reset +ffffffff82227470 t pp_set_clockgating_state +ffffffff822274a0 t pp_set_powergating_state +ffffffff822274d0 t pp_dpm_set_fan_control_mode +ffffffff82227540 t pp_dpm_get_fan_control_mode +ffffffff822275b0 t pp_dpm_set_fan_speed_pwm +ffffffff82227610 t pp_dpm_get_fan_speed_pwm +ffffffff82227670 t pp_dpm_force_clock_level +ffffffff822276d0 t pp_dpm_print_clock_levels +ffffffff82227720 t pp_dpm_emit_clock_levels +ffffffff82227780 t pp_dpm_force_performance_level +ffffffff82227810 t pp_dpm_get_sclk_od +ffffffff82227860 t pp_dpm_set_sclk_od +ffffffff822278b0 t pp_dpm_get_mclk_od +ffffffff82227900 t pp_dpm_set_mclk_od +ffffffff82227950 t pp_dpm_read_sensor +ffffffff822279f0 t pp_dpm_get_performance_level +ffffffff82227a30 t pp_dpm_get_current_power_state +ffffffff82227aa0 t pp_dpm_get_fan_speed_rpm +ffffffff82227b00 t pp_dpm_set_fan_speed_rpm +ffffffff82227b60 t pp_dpm_get_pp_num_states +ffffffff82227ca0 t pp_dpm_get_pp_table +ffffffff82227cf0 t pp_dpm_set_pp_table +ffffffff82227e20 t pp_dpm_switch_power_profile +ffffffff82227f60 t pp_dpm_get_vce_clock_state +ffffffff82227fb0 t pp_dpm_dispatch_tasks +ffffffff82227ff0 t pp_dpm_load_fw +ffffffff82228060 t pp_dpm_fw_loading_complete +ffffffff82228090 t pp_set_powergating_by_smu +ffffffff82228200 t pp_set_clockgating_by_smu +ffffffff82228260 t pp_set_power_limit +ffffffff82228320 t pp_get_power_limit +ffffffff822283b0 t pp_get_power_profile_mode +ffffffff82228410 t pp_set_power_profile_mode +ffffffff82228470 t pp_set_fine_grain_clk_vol +ffffffff822284c0 t pp_odn_edit_dpm_table +ffffffff82228510 t pp_dpm_set_mp1_state +ffffffff82228560 t pp_smu_i2c_bus_access +ffffffff822285b0 t pp_gfx_state_change_set +ffffffff82228610 t pp_dpm_get_sclk +ffffffff82228660 t pp_dpm_get_mclk +ffffffff822286b0 t pp_display_configuration_change +ffffffff82228700 t pp_get_display_power_level +ffffffff82228740 t pp_get_current_clocks +ffffffff82228860 t pp_get_clock_by_type +ffffffff822288a0 t pp_get_clock_by_type_with_latency +ffffffff822288e0 t pp_get_clock_by_type_with_voltage +ffffffff82228920 t pp_set_watermarks_for_clocks_ranges +ffffffff82228960 t pp_display_clock_voltage_request +ffffffff822289a0 t pp_get_display_mode_validation_clocks +ffffffff82228a00 t pp_notify_smu_enable_pwe +ffffffff82228a60 t pp_enable_mgpu_fan_boost +ffffffff82228ac0 t pp_set_active_display_count +ffffffff82228b00 t pp_set_hard_min_dcefclk_by_freq +ffffffff82228b60 t pp_set_hard_min_fclk_by_freq +ffffffff82228bc0 t pp_set_min_deep_sleep_dcefclk +ffffffff82228c20 t pp_get_asic_baco_capability +ffffffff82228c90 t pp_get_asic_baco_state +ffffffff82228cf0 t pp_set_asic_baco_state +ffffffff82228d60 t pp_get_ppfeature_status +ffffffff82228db0 t pp_set_ppfeature_status +ffffffff82228e00 t pp_asic_reset_mode_2 +ffffffff82228e50 t pp_set_df_cstate +ffffffff82228eb0 t pp_set_xgmi_pstate +ffffffff82228f10 t pp_get_gpu_metrics +ffffffff82228f70 t pp_get_prv_buffer_details +ffffffff82228ff0 t pp_pm_compute_clocks +ffffffff8222a000 T ci_baco_set_state +ffffffff8222b000 T baco_program_registers +ffffffff8222b0d0 t baco_cmd_handler +ffffffff8222b250 T soc15_baco_program_registers +ffffffff8222c000 T fiji_baco_set_state +ffffffff8222d000 T phm_setup_asic +ffffffff8222d050 T phm_power_down_asic +ffffffff8222d0a0 T phm_set_power_state +ffffffff8222d110 T phm_enable_dynamic_state_management +ffffffff8222d1c0 T phm_disable_dynamic_state_management +ffffffff8222d250 T phm_force_dpm_levels +ffffffff8222d2a0 T phm_apply_state_adjust_rules +ffffffff8222d2f0 T phm_apply_clock_adjust_rules +ffffffff8222d340 T phm_powerdown_uvd +ffffffff8222d390 T phm_disable_clock_power_gatings +ffffffff8222d3e0 T phm_pre_display_configuration_changed +ffffffff8222d440 T phm_display_configuration_changed +ffffffff8222d4a0 T phm_notify_smc_display_config_after_ps_adjustment +ffffffff8222d500 T phm_stop_thermal_controller +ffffffff8222d560 T phm_register_irq_handlers +ffffffff8222d5b0 T phm_start_thermal_controller +ffffffff8222d6e0 T phm_check_smc_update_required_for_display_configuration +ffffffff8222d740 T phm_check_states_equal +ffffffff8222d790 T phm_store_dal_configuration_data +ffffffff8222d8e0 T phm_get_dal_power_level +ffffffff8222d930 T phm_set_cpu_power_state +ffffffff8222d980 T phm_get_performance_level +ffffffff8222d9d0 T phm_get_clock_info +ffffffff8222db50 T phm_get_current_shallow_sleep_clocks +ffffffff8222dba0 T phm_get_clock_by_type +ffffffff8222dbf0 T phm_get_clock_by_type_with_latency +ffffffff8222dc40 T phm_get_clock_by_type_with_voltage +ffffffff8222dc90 T phm_set_watermarks_for_clocks_ranges +ffffffff8222dce0 T phm_display_clock_voltage_request +ffffffff8222dd30 T phm_get_max_high_clocks +ffffffff8222dd80 T phm_disable_smc_firmware_ctf +ffffffff8222dde0 T phm_set_active_display_count +ffffffff8222e000 T hwmgr_early_init +ffffffff8222e470 T hwmgr_sw_init +ffffffff8222e4e0 T hwmgr_sw_fini +ffffffff8222e530 T hwmgr_hw_init +ffffffff8222e6f0 T hwmgr_hw_fini +ffffffff8222e7a0 T hwmgr_suspend +ffffffff8222e820 T hwmgr_resume +ffffffff8222e8c0 T hwmgr_handle_task +ffffffff8222f000 T polaris_baco_set_state +ffffffff82230000 T pp_override_get_default_fuse_value +ffffffff82231000 T psm_init_power_state_table +ffffffff822312a0 T psm_fini_power_state_table +ffffffff82231360 T psm_set_boot_states +ffffffff82231420 T psm_set_performance_states +ffffffff822314e0 T psm_set_user_performance_state +ffffffff82231570 T psm_adjust_power_state_dynamic +ffffffff82232000 T atomctrl_initialize_mc_reg_table +ffffffff82232200 T atomctrl_initialize_mc_reg_table_v2_2 +ffffffff82232400 T atomctrl_set_engine_dram_timings_rv770 +ffffffff82232460 T atomctrl_get_memory_pll_dividers_si +ffffffff82232540 T atomctrl_get_memory_pll_dividers_vi +ffffffff822325b0 T atomctrl_get_memory_pll_dividers_ai +ffffffff82232660 T atomctrl_get_engine_pll_dividers_kong +ffffffff822326e0 T atomctrl_get_engine_pll_dividers_vi +ffffffff822327a0 T atomctrl_get_engine_pll_dividers_ai +ffffffff82232880 T atomctrl_get_dfs_pll_dividers_vi +ffffffff82232940 T atomctrl_get_reference_clock +ffffffff822329a0 T atomctrl_is_voltage_controlled_by_gpio_v3 +ffffffff82232a50 T atomctrl_get_voltage_table_v3 +ffffffff82232bb0 T atomctrl_get_pp_assign_pin +ffffffff82232ca0 T atomctrl_calculate_voltage_evv_on_sclk +ffffffff82233020 T atomctrl_get_voltage_evv_on_sclk +ffffffff822330a0 T atomctrl_get_voltage_evv +ffffffff82233150 T atomctrl_get_mpll_reference_clock +ffffffff822331c0 T atomctrl_is_asic_internal_ss_supported +ffffffff82233210 T atomctrl_get_memory_clock_spread_spectrum +ffffffff82233310 T atomctrl_get_engine_clock_spread_spectrum +ffffffff82233410 T atomctrl_read_efuse +ffffffff822334c0 T atomctrl_set_ac_timing_ai +ffffffff82233520 T atomctrl_get_voltage_evv_on_sclk_ai +ffffffff82233590 T atomctrl_get_smc_sclk_range_table +ffffffff82233650 T atomctrl_get_vddc_shared_railinfo +ffffffff822336c0 T atomctrl_get_avfs_information +ffffffff82233840 T atomctrl_get_svi2_info +ffffffff82233920 T atomctrl_get_leakage_id_from_efuse +ffffffff82233980 T atomctrl_get_leakage_vddc_base_on_leakage +ffffffff82233b10 T atomctrl_get_voltage_range +ffffffff82233bd0 T atomctrl_get_edc_hilo_leakage_offset_table +ffffffff82233c50 T atomctrl_get_edc_leakage_table +ffffffff82234000 T pp_atomfwctrl_is_voltage_controlled_by_gpio_v4 +ffffffff822340d0 T pp_atomfwctrl_get_voltage_table_v4 +ffffffff82234280 T pp_atomfwctrl_get_pp_assign_pin +ffffffff82234360 T pp_atomfwctrl_enter_self_refresh +ffffffff82234390 T pp_atomfwctrl_get_gpu_pll_dividers_vega10 +ffffffff82234430 T pp_atomfwctrl_get_avfs_information +ffffffff82234760 T pp_atomfwctrl_get_gpio_information +ffffffff82234800 T pp_atomfwctrl_get_clk_information_by_clkid +ffffffff82234880 T pp_atomfwctrl_get_vbios_bootup_values +ffffffff82234c00 T pp_atomfwctrl_get_smc_dpm_information +ffffffff82235000 T encode_pcie_lane_width +ffffffff82235030 T decode_pcie_lane_width +ffffffff82236000 t pp_tables_v1_0_initialize +ffffffff82237420 t pp_tables_v1_0_uninitialize +ffffffff822375c0 T get_number_of_powerplay_table_entries_v1_0 +ffffffff82237670 T get_powerplay_table_entry_v1_0 +ffffffff82238000 T pp_tables_get_response_times +ffffffff822380d0 T pp_tables_get_num_of_entries +ffffffff82238190 T pp_tables_get_entry +ffffffff822384f0 t init_non_clock_fields +ffffffff82238670 t pp_tables_initialize +ffffffff82239ad0 t pp_tables_uninitialize +ffffffff82239cd0 t get_number_of_vce_state_table_entries +ffffffff82239dd0 t get_vce_state_table_entry +ffffffff8223a000 T smu10_init_function_pointers +ffffffff8223a040 t smu10_hwmgr_backend_init +ffffffff8223a710 t smu10_hwmgr_backend_fini +ffffffff8223a840 t smu10_setup_asic_task +ffffffff8223a8b0 t smu10_get_power_state_size +ffffffff8223a8e0 t smu10_apply_state_adjust_rules +ffffffff8223a910 t smu10_dpm_force_dpm_level +ffffffff8223ae90 t smu10_enable_dpm_tasks +ffffffff8223af10 t smu10_disable_dpm_tasks +ffffffff8223af40 t smu10_dpm_patch_boot_state +ffffffff8223af70 t smu10_dpm_get_pp_table_entry +ffffffff8223afd0 t smu10_dpm_get_num_of_pp_table_entries +ffffffff8223b020 t smu10_powergate_vcn +ffffffff8223b0c0 t smu10_dpm_get_mclk +ffffffff8223b110 t smu10_dpm_get_sclk +ffffffff8223b160 t smu10_set_power_state_tasks +ffffffff8223b1d0 t smu10_set_cpu_power_state +ffffffff8223b200 t smu10_store_cc6_data +ffffffff8223b270 t smu10_get_dal_power_level +ffffffff8223b2a0 t smu10_get_performance_level +ffffffff8223b330 t smu10_get_current_shallow_sleep_clocks +ffffffff8223b390 t smu10_get_clock_by_type_with_latency +ffffffff8223b4e0 t smu10_get_clock_by_type_with_voltage +ffffffff8223b5e0 t smu10_set_watermarks_for_clocks_ranges +ffffffff8223b6b0 t smu10_display_clock_voltage_request +ffffffff8223b750 t smu10_get_max_high_clocks +ffffffff8223b780 t smu10_power_off_asic +ffffffff8223b7d0 t smu10_force_clock_level +ffffffff8223b990 t smu10_print_clock_levels +ffffffff8223bd30 t smu10_gfx_off_control +ffffffff8223be40 t smu10_read_sensor +ffffffff8223bfb0 t smu10_set_active_display_count +ffffffff8223c000 t smu10_set_min_deep_sleep_dcefclk +ffffffff8223c060 t smu10_get_power_profile_mode +ffffffff8223c0a0 t smu10_set_power_profile_mode +ffffffff8223c1f0 t smu10_set_fine_grain_clk_vol +ffffffff8223c3f0 t smu10_powergate_mmhub +ffffffff8223c410 t smu10_smus_notify_pwe +ffffffff8223c430 t smu10_powergate_sdma +ffffffff8223c450 t smu10_set_hard_min_dcefclk_by_freq +ffffffff8223c4b0 t smu10_set_hard_min_fclk_by_freq +ffffffff8223c510 t smu10_set_hard_min_gfxclk_by_freq +ffffffff8223c570 t smu10_set_soft_max_gfxclk_by_freq +ffffffff8223c5d0 t smu10_asic_reset +ffffffff8223c5f0 t smu10_gfx_state_change +ffffffff8223c630 t smu10_dpm_get_pp_table_entry_callback +ffffffff8223d000 T smu7_baco_get_capability +ffffffff8223d060 T smu7_baco_get_state +ffffffff8223d0b0 T smu7_baco_set_state +ffffffff8223e000 T smu7_powerdown_uvd +ffffffff8223e050 T smu7_disable_clock_power_gating +ffffffff8223e0d0 T smu7_powergate_uvd +ffffffff8223e1c0 T smu7_powergate_vce +ffffffff8223e2b0 T smu7_update_clock_gatings +ffffffff8223e660 T smu7_powergate_gfx +ffffffff8223f000 T smu7_get_sleep_divider_id_from_clock +ffffffff8223f0a0 T smu7_init_function_pointers +ffffffff8223f100 t smu7_hwmgr_backend_init +ffffffff82240f40 t smu7_hwmgr_backend_fini +ffffffff82240fb0 t smu7_setup_asic_task +ffffffff82241310 t smu7_get_power_state_size +ffffffff82241340 t smu7_apply_state_adjust_rules +ffffffff822417b0 t smu7_force_dpm_level +ffffffff82241be0 t smu7_enable_dpm_tasks +ffffffff82244340 t smu7_disable_dpm_tasks +ffffffff82244a80 t smu7_dpm_patch_boot_state +ffffffff82244bc0 t smu7_get_pp_table_entry +ffffffff82244fb0 t smu7_get_number_of_powerplay_table_entries +ffffffff82245020 t smu7_dpm_get_mclk +ffffffff822450c0 t smu7_dpm_get_sclk +ffffffff82245160 t smu7_set_power_state_tasks +ffffffff82245ee0 t smu7_notify_smc_display_config_after_ps_adjustment +ffffffff82245f10 t smu7_display_configuration_changed_task +ffffffff822460c0 t smu7_set_max_fan_rpm_output +ffffffff822460f0 t smu7_set_max_fan_pwm_output +ffffffff82246110 t smu7_set_fan_control_mode +ffffffff822461a0 t smu7_get_fan_control_mode +ffffffff822461e0 t smu7_register_irq_handlers +ffffffff82246280 t smu7_check_smc_update_required_for_display_configuration +ffffffff82246330 t smu7_check_states_equal +ffffffff822464d0 t smu7_get_performance_level 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smu7_set_dpm_event_sources +ffffffff82248590 t smu7_get_pp_table_entry_callback_func_v0 +ffffffff82248a90 t smu7_get_pp_table_entry_callback_func_v1 +ffffffff8224a000 T smu7_enable_didt_config +ffffffff8224a3c0 t smu7_program_pt_config_registers +ffffffff8224a5b0 t smu7_enable_didt +ffffffff8224a7a0 T smu7_disable_didt_config +ffffffff8224a860 T smu7_enable_smc_cac +ffffffff8224a8f0 T smu7_disable_smc_cac +ffffffff8224a980 T smu7_set_power_limit +ffffffff8224a9e0 T smu7_enable_power_containment +ffffffff8224ab60 T smu7_disable_power_containment +ffffffff8224ac80 T smu7_power_control_set_level +ffffffff8224b000 T smu7_fan_ctrl_get_fan_speed_info +ffffffff8224b080 T smu7_fan_ctrl_get_fan_speed_pwm +ffffffff8224b140 T smu7_fan_ctrl_get_fan_speed_rpm +ffffffff8224b1f0 T smu7_fan_ctrl_set_static_mode +ffffffff8224b320 T smu7_fan_ctrl_set_default_mode +ffffffff8224b400 T smu7_fan_ctrl_start_smc_fan_control +ffffffff8224b520 T smu7_fan_ctrl_stop_smc_fan_control +ffffffff8224b540 T smu7_fan_ctrl_set_fan_speed_pwm +ffffffff8224b720 T smu7_fan_ctrl_reset_fan_speed_to_default +ffffffff8224b900 T smu7_fan_ctrl_set_fan_speed_rpm +ffffffff8224bae0 T smu7_thermal_get_temperature +ffffffff8224bb40 T smu7_thermal_disable_alert +ffffffff8224bbe0 T smu7_thermal_stop_thermal_controller +ffffffff8224bd60 T smu7_start_thermal_controller +ffffffff8224c110 T smu7_thermal_ctrl_uninitialize_thermal_controller +ffffffff8224d000 T smu8_init_function_pointers +ffffffff8224d040 t smu8_hwmgr_backend_init +ffffffff8224d520 t smu8_hwmgr_backend_fini +ffffffff8224d590 t smu8_setup_asic_task +ffffffff8224dab0 t smu8_get_power_state_size +ffffffff8224dae0 t smu8_apply_state_adjust_rules +ffffffff8224dc30 t smu8_dpm_force_dpm_level +ffffffff8224df30 t smu8_enable_dpm_tasks +ffffffff8224e080 t smu8_disable_dpm_tasks +ffffffff8224e160 t smu8_dpm_patch_boot_state +ffffffff8224e1c0 t smu8_dpm_get_pp_table_entry +ffffffff8224e220 t smu8_dpm_get_num_of_pp_table_entries +ffffffff8224e270 t smu8_dpm_powerdown_uvd +ffffffff8224e2b0 t smu8_dpm_powergate_vce +ffffffff8224e480 t smu8_dpm_powergate_uvd +ffffffff8224e6b0 t smu8_dpm_powergate_acp +ffffffff8224e710 t smu8_dpm_get_mclk +ffffffff8224e740 t smu8_dpm_get_sclk +ffffffff8224e7b0 t smu8_set_power_state_tasks +ffffffff8224eaf0 t smu8_set_cpu_power_state +ffffffff8224eb60 t smu8_store_cc6_data +ffffffff8224ebe0 t smu8_get_dal_power_level +ffffffff8224ec60 t smu8_get_performance_level +ffffffff8224ed50 t smu8_get_current_shallow_sleep_clocks +ffffffff8224edb0 t smu8_get_clock_by_type +ffffffff8224eef0 t smu8_get_max_high_clocks +ffffffff8224efb0 t smu8_power_off_asic +ffffffff8224f030 t smu8_force_clock_level +ffffffff8224f090 t smu8_print_clock_levels +ffffffff8224f260 t smu8_read_sensor +ffffffff8224f560 t smu8_notify_cac_buffer_info +ffffffff8224f610 t smu8_get_thermal_temperature_range +ffffffff8224f680 t smu8_dpm_get_pp_table_entry_callback +ffffffff82250000 T smu9_baco_get_capability +ffffffff822500d0 T smu9_baco_get_state +ffffffff82251000 T convert_to_vid +ffffffff82251050 T convert_to_vddc +ffffffff822510a0 T phm_copy_clock_limits_array +ffffffff82251180 T phm_copy_overdrive_settings_limits_array +ffffffff82251260 T phm_set_field_to_u32 +ffffffff822512c0 T phm_wait_on_register +ffffffff822513d0 T phm_wait_on_indirect_register +ffffffff82251500 T phm_wait_for_register_unequal +ffffffff82251600 T phm_wait_for_indirect_register_unequal +ffffffff82251730 T phm_cf_want_uvd_power_gating +ffffffff82251760 T phm_cf_want_vce_power_gating +ffffffff82251790 T phm_trim_voltage_table +ffffffff822518c0 T phm_get_svi2_mvdd_voltage_table +ffffffff82251a50 T phm_get_svi2_vddci_voltage_table +ffffffff82251be0 T phm_get_svi2_vdd_voltage_table +ffffffff82251c80 T phm_trim_voltage_table_to_fit_state_table +ffffffff82251d60 T phm_reset_single_dpm_table +ffffffff82251e30 T phm_setup_pcie_table_entry +ffffffff82251e70 T phm_get_dpm_level_enable_mask_value +ffffffff82251f90 T phm_get_voltage_index +ffffffff82252010 T phm_get_voltage_id +ffffffff82252090 T phm_find_closest_vddci +ffffffff822520f0 T phm_find_boot_level +ffffffff82252160 T phm_get_sclk_for_voltage_evv +ffffffff82252210 T phm_initializa_dynamic_state_adjustment_rule_settings +ffffffff82252320 T phm_get_lowest_enabled_level +ffffffff82252360 T phm_apply_dal_min_voltage_request +ffffffff82252430 T phm_get_voltage_evv_on_sclk +ffffffff822524d0 T phm_irq_process +ffffffff822526d0 t orderly_poweroff +ffffffff822526e0 T smu9_register_irq_handlers +ffffffff82252790 T smu_atom_get_data_table +ffffffff82252800 T smu_get_voltage_dependency_table_ppt_v1 +ffffffff822528e0 T smu_set_watermarks_for_clocks_ranges +ffffffff82253000 T tonga_baco_set_state +ffffffff82254000 T vega10_baco_set_state +ffffffff82255000 T vega10_enable_disable_vce_dpm +ffffffff82255090 T vega10_hwmgr_init +ffffffff822550f0 t vega10_hwmgr_backend_init +ffffffff82255ef0 t vega10_hwmgr_backend_fini +ffffffff82255f60 t vega10_setup_asic_task +ffffffff82256080 t vega10_get_power_state_size +ffffffff822560b0 t vega10_apply_state_adjust_rules +ffffffff82256440 t vega10_dpm_force_dpm_level +ffffffff82256970 t vega10_enable_dpm_tasks +ffffffff822592d0 t vega10_disable_dpm_tasks +ffffffff822598b0 t vega10_patch_boot_state +ffffffff822598e0 t vega10_get_pp_table_entry +ffffffff82259950 t vega10_power_gate_vce +ffffffff822599f0 t vega10_power_gate_uvd +ffffffff82259a90 t vega10_dpm_get_mclk +ffffffff82259b30 t vega10_dpm_get_sclk +ffffffff82259bd0 t vega10_set_power_state_tasks +ffffffff8225a650 t vega10_notify_smc_display_config_after_ps_adjustment +ffffffff8225a800 t vega10_display_configuration_changed_task +ffffffff8225a8c0 t vega10_set_fan_control_mode +ffffffff8225a930 t vega10_get_fan_control_mode +ffffffff8225a970 t vega10_check_smc_update_required_for_display_configuration +ffffffff8225a9d0 t vega10_check_states_equal +ffffffff8225ab30 t vega10_get_dal_power_level +ffffffff8225ab70 t vega10_get_performance_level +ffffffff8225ac00 t vega10_get_clock_by_type_with_latency +ffffffff8225ae30 t vega10_get_clock_by_type_with_voltage +ffffffff8225af10 t vega10_set_watermarks_for_clocks_ranges +ffffffff8225af70 t vega10_display_clock_voltage_request +ffffffff8225afe0 t vega10_power_off_asic +ffffffff8225b050 t vega10_force_clock_level +ffffffff8225b180 t vega10_emit_clock_levels +ffffffff8225b2f0 t vega10_print_clock_levels +ffffffff8225bad0 t vega10_get_sclk_od +ffffffff8225bb40 t vega10_set_sclk_od +ffffffff8225bc40 t vega10_get_mclk_od +ffffffff8225bcb0 t vega10_set_mclk_od +ffffffff8225bda0 t vega10_read_sensor +ffffffff8225bff0 t vega10_avfs_enable +ffffffff8225c0b0 t vega10_notify_cac_buffer_info +ffffffff8225c160 t vega10_get_thermal_temperature_range +ffffffff8225c230 t vega10_get_power_profile_mode +ffffffff8225c270 t vega10_set_power_profile_mode +ffffffff8225c390 t vega10_odn_edit_dpm_table +ffffffff8225c950 t vega10_get_ppfeature_status +ffffffff8225c9d0 t vega10_set_ppfeature_status +ffffffff8225ca70 t vega10_set_mp1_state +ffffffff8225cae0 t vega10_disable_power_features_for_compute_performance +ffffffff8225ccd0 t vega10_upload_dpm_bootup_level +ffffffff8225cde0 t vega10_upload_dpm_max_level +ffffffff8225cec0 t vega10_trim_voltage_table_to_fit_state_table +ffffffff8225cfc0 t vega10_odn_initial_default_setting +ffffffff8225d190 t vega10_populate_all_graphic_levels +ffffffff8225d390 t vega10_populate_all_memory_levels +ffffffff8225d4f0 t vega10_populate_single_gfx_level +ffffffff8225d640 t vega10_populate_single_soc_level +ffffffff8225d790 t vega10_populate_single_memory_level +ffffffff8225d900 t vega10_get_pp_table_entry_callback_func +ffffffff8225db20 t vega10_odn_update_power_state +ffffffff8225e000 T vega10_enable_didt_config +ffffffff8225f870 T vega10_disable_didt_config +ffffffff8225fab0 T vega10_initialize_power_tune_defaults +ffffffff8225fbe0 T vega10_set_power_limit +ffffffff8225fc30 T vega10_enable_power_containment +ffffffff8225fd50 T vega10_disable_power_containment +ffffffff8225fe20 T vega10_power_control_set_level +ffffffff8225fe80 t vega10_didt_set_mask +ffffffff82261000 t vega10_pp_tables_initialize +ffffffff822629a0 t vega10_pp_tables_uninitialize +ffffffff82262b50 T vega10_get_number_of_powerplay_table_entries +ffffffff82262c00 T vega10_get_powerplay_table_entry +ffffffff82262d70 T vega10_baco_set_cap +ffffffff82263000 T vega10_fan_ctrl_get_fan_speed_info +ffffffff82263080 T vega10_fan_ctrl_get_fan_speed_pwm +ffffffff822631a0 T vega10_fan_ctrl_get_fan_speed_rpm +ffffffff82263290 T vega10_fan_ctrl_set_static_mode +ffffffff82263530 T vega10_fan_ctrl_set_default_mode +ffffffff82263740 T vega10_fan_ctrl_start_smc_fan_control +ffffffff82263800 T vega10_fan_ctrl_stop_smc_fan_control +ffffffff822638c0 T vega10_fan_ctrl_set_fan_speed_pwm +ffffffff82263ae0 T vega10_fan_ctrl_reset_fan_speed_to_default +ffffffff82263ba0 T vega10_fan_ctrl_set_fan_speed_rpm +ffffffff82263d70 T vega10_thermal_get_temperature +ffffffff82263e00 T vega10_thermal_disable_alert +ffffffff82263f00 T vega10_thermal_stop_thermal_controller +ffffffff82263f60 T vega10_enable_mgpu_fan_boost +ffffffff82264070 T vega10_start_thermal_controller +ffffffff822645f0 T vega10_thermal_ctrl_uninitialize_thermal_controller +ffffffff82265000 T vega12_baco_set_state +ffffffff82266000 T vega12_enable_disable_vce_dpm +ffffffff82266090 T vega12_hwmgr_init +ffffffff822660d0 t vega12_hwmgr_backend_init +ffffffff82266930 t vega12_hwmgr_backend_fini +ffffffff82266980 t vega12_setup_asic_task +ffffffff822669c0 t vega12_apply_clocks_adjust_rules +ffffffff82266da0 t vega12_dpm_force_dpm_level +ffffffff822671e0 t vega12_enable_dpm_tasks +ffffffff82267c50 t vega12_disable_dpm_tasks +ffffffff82267d40 t vega12_patch_boot_state +ffffffff82267d70 t vega12_power_gate_vce +ffffffff82267e10 t vega12_power_gate_uvd +ffffffff82267eb0 t vega12_dpm_get_mclk +ffffffff82267f00 t vega12_dpm_get_sclk +ffffffff82267f50 t vega12_notify_smc_display_config_after_ps_adjustment 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vega12_get_ppfeature_status +ffffffff822698a0 t vega12_set_ppfeature_status +ffffffff82269940 t vega12_set_mp1_state +ffffffff822699b0 t vega12_get_gpu_metrics +ffffffff82269c30 t vega12_upload_dpm_min_level +ffffffff82269e70 t vega12_upload_dpm_max_level +ffffffff8226a040 t vega12_setup_single_dpm_table +ffffffff8226b000 t vega12_pp_tables_initialize +ffffffff8226b5f0 t vega12_pp_tables_uninitialize +ffffffff8226c000 T vega12_fan_ctrl_get_fan_speed_info +ffffffff8226c040 T vega12_fan_ctrl_get_fan_speed_rpm +ffffffff8226c0a0 T vega12_fan_ctrl_start_smc_fan_control +ffffffff8226c0d0 T vega12_fan_ctrl_stop_smc_fan_control +ffffffff8226c100 T vega12_fan_ctrl_reset_fan_speed_to_default +ffffffff8226c130 T vega12_thermal_get_temperature +ffffffff8226c1c0 T vega12_thermal_disable_alert +ffffffff8226c240 T vega12_thermal_stop_thermal_controller +ffffffff8226c2c0 T vega12_start_thermal_controller +ffffffff8226d000 T vega20_baco_get_capability +ffffffff8226d0c0 T vega20_baco_get_state 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vega20_fan_ctrl_set_static_mode +ffffffff822775e0 T vega20_fan_ctrl_get_fan_speed_info +ffffffff82277620 T vega20_fan_ctrl_get_fan_speed_rpm +ffffffff82277680 T vega20_fan_ctrl_set_fan_speed_rpm +ffffffff82277810 T vega20_thermal_get_temperature +ffffffff822778a0 T vega20_thermal_disable_alert +ffffffff82277920 T vega20_thermal_stop_thermal_controller +ffffffff822779a0 T vega20_start_thermal_controller +ffffffff82278000 t ci_smu_init +ffffffff82278060 t ci_smu_fini +ffffffff822780b0 t ci_start_smu +ffffffff822780e0 t ci_send_msg_to_smc +ffffffff82278180 t ci_send_msg_to_smc_with_parameter +ffffffff82278230 t ci_update_smc_table +ffffffff82278470 t ci_process_firmware_header +ffffffff82278980 t ci_update_sclk_threshold +ffffffff82278bc0 t ci_thermal_setup_fan_table +ffffffff82278e40 t ci_init_smc_table +ffffffff8227a8e0 t ci_populate_all_graphic_levels +ffffffff8227adc0 t ci_populate_all_memory_levels +ffffffff8227b6b0 t ci_initialize_mc_reg_table +ffffffff8227c230 t ci_get_offsetof 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smum_upload_powerplay_table +ffffffff82290250 T smum_send_msg_to_smc +ffffffff82290310 T smum_send_msg_to_smc_with_parameter +ffffffff822903e0 T smum_init_smc_table +ffffffff82290420 T smum_populate_all_graphic_levels +ffffffff82290460 T smum_populate_all_memory_levels +ffffffff822904a0 T smum_initialize_mc_reg_table +ffffffff822904e0 T smum_is_dpm_running +ffffffff82290520 T smum_is_hw_avfs_present +ffffffff82290560 T smum_update_dpm_settings +ffffffff822905a0 T smum_smc_table_manager +ffffffff822905f0 T smum_stop_smc +ffffffff82291000 t tonga_smu_init +ffffffff82291090 t tonga_start_smu +ffffffff82291420 t tonga_update_smc_table +ffffffff822915c0 t tonga_process_firmware_header +ffffffff82291700 t tonga_update_sclk_threshold +ffffffff82291940 t tonga_thermal_setup_fan_table +ffffffff82291bc0 t tonga_init_smc_table +ffffffff82293a10 t tonga_populate_all_graphic_levels +ffffffff82293ff0 t tonga_populate_all_memory_levels +ffffffff822946d0 t tonga_initialize_mc_reg_table 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vega20_get_activity_monitor_coeff +ffffffff822982b0 T vega20_enable_smc_features +ffffffff82298380 T vega20_get_enabled_smc_features +ffffffff82298450 T vega20_set_pptable_driver_address +ffffffff822984e0 t vega20_smu_init +ffffffff822988a0 t vega20_smu_fini +ffffffff822989a0 t vega20_start_smu +ffffffff82298a80 t vega20_get_argument +ffffffff82298ae0 t vega20_send_msg_to_smc +ffffffff82298d30 t vega20_send_msg_to_smc_with_parameter +ffffffff82298fd0 t vega20_is_dpm_running +ffffffff82299070 t vega20_smc_table_manager +ffffffff8229a000 t vegam_smu_init +ffffffff8229a090 t vegam_start_smu +ffffffff8229a460 t vegam_update_smc_table +ffffffff8229a6d0 t vegam_process_firmware_header +ffffffff8229a810 t vegam_update_sclk_threshold +ffffffff8229a8f0 t vegam_thermal_setup_fan_table +ffffffff8229a950 t vegam_thermal_avfs_enable +ffffffff8229a9e0 t vegam_init_smc_table +ffffffff8229c2c0 t vegam_populate_all_graphic_levels +ffffffff8229c9f0 t vegam_populate_all_memory_levels +ffffffff8229cd30 t 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smu_get_clock_by_type_with_latency +ffffffff822a1e70 t smu_display_clock_voltage_request +ffffffff822a1ed0 t smu_enable_mgpu_fan_boost +ffffffff822a1f30 t smu_set_display_count +ffffffff822a1f90 t smu_set_deep_sleep_dcefclk +ffffffff822a1ff0 t smu_get_baco_capability +ffffffff822a2050 t smu_baco_set_state +ffffffff822a2130 t smu_sys_get_pp_feature_mask +ffffffff822a21a0 t smu_sys_set_pp_feature_mask +ffffffff822a2200 t smu_mode2_reset +ffffffff822a22a0 t smu_set_df_cstate +ffffffff822a2350 t smu_set_xgmi_pstate +ffffffff822a2400 t smu_sys_get_gpu_metrics +ffffffff822a2460 t smu_set_watermarks_for_clock_ranges +ffffffff822a24e0 t smu_display_disable_memory_clock_switch +ffffffff822a2540 t smu_get_max_sustainable_clocks_by_dc +ffffffff822a25a0 t smu_get_uclk_dpm_states +ffffffff822a2600 t smu_get_dpm_clock_table +ffffffff822a2660 t smu_get_prv_buffer_details +ffffffff822a26d0 t smu_adjust_power_state_dynamic +ffffffff822a2930 t smu_throttling_logging_work_fn +ffffffff822a2980 t smu_interrupt_work_fn +ffffffff822a29d0 t smu_smc_hw_setup +ffffffff822a3330 t smu_smc_hw_cleanup +ffffffff822a4000 T arcturus_set_ppt_funcs +ffffffff822a4050 t arcturus_run_btc +ffffffff822a4100 t arcturus_get_allowed_feature_mask +ffffffff822a4150 t arcturus_set_default_dpm_table +ffffffff822a4360 t arcturus_populate_umd_state_clk +ffffffff822a4420 t arcturus_print_clk_levels +ffffffff822a4670 t arcturus_force_clk_levels +ffffffff822a48b0 t arcturus_get_power_profile_mode +ffffffff822a4b40 t arcturus_set_power_profile_mode +ffffffff822a4e30 t arcturus_dpm_set_vcn_enable +ffffffff822a4f00 t arcturus_read_sensor +ffffffff822a50e0 t arcturus_is_dpm_running +ffffffff822a5130 t arcturus_get_fan_speed_pwm +ffffffff822a5270 t arcturus_get_fan_speed_rpm +ffffffff822a5370 t arcturus_get_thermal_temperature_range +ffffffff822a5460 t arcturus_set_performance_level +ffffffff822a5570 t arcturus_dump_pptable +ffffffff822a55a0 t arcturus_get_power_limit +ffffffff822a56a0 t arcturus_set_df_cstate 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+ffffffff822a85f0 t cyan_skillfish_is_dpm_running +ffffffff822a8690 t cyan_skillfish_init_smc_tables +ffffffff822a8760 t cyan_skillfish_get_enabled_mask +ffffffff822a87a0 t cyan_skillfish_get_dpm_ultimate_freq +ffffffff822a8860 t cyan_skillfish_get_gpu_metrics +ffffffff822a8b00 t cyan_skillfish_get_smu_metrics_data +ffffffff822a9000 T navi10_set_ppt_funcs +ffffffff822a9050 t navi10_run_btc +ffffffff822a90d0 t navi10_get_allowed_feature_mask +ffffffff822a9390 t navi10_set_default_dpm_table +ffffffff822a9800 t navi10_populate_umd_state_clk +ffffffff822a9970 t navi10_print_clk_levels +ffffffff822a9b00 t navi10_emit_clk_levels +ffffffff822a9d40 t navi10_force_clk_levels +ffffffff822a9e70 t navi10_od_edit_dpm_table +ffffffff822aa4f0 t navi10_get_clock_by_type_with_latency +ffffffff822aa5f0 t navi10_get_power_profile_mode +ffffffff822aa850 t navi10_set_power_profile_mode +ffffffff822aab10 t navi10_dpm_set_vcn_enable +ffffffff822aab90 t navi10_dpm_set_jpeg_enable +ffffffff822aac00 t navi10_read_sensor +ffffffff822aad80 t navi10_pre_display_config_changed +ffffffff822aae10 t navi10_display_config_changed +ffffffff822aae90 t navi10_notify_smc_display_config +ffffffff822ab020 t navi10_is_dpm_running +ffffffff822ab070 t navi10_get_fan_speed_rpm +ffffffff822ab100 t navi10_set_watermarks_table +ffffffff822ab2a0 t navi10_get_thermal_temperature_range +ffffffff822ab390 t navi10_get_uclk_dpm_states +ffffffff822ab4a0 t navi10_set_default_od_settings +ffffffff822ab700 t navi10_display_disable_memory_clock_switch +ffffffff822ab780 t navi10_get_power_limit +ffffffff822ab8a0 t navi10_update_pcie_parameters +ffffffff822aba00 t navi10_i2c_control_init +ffffffff822abb30 t navi10_i2c_control_fini +ffffffff822abb70 t navi10_init_smc_tables +ffffffff822abda0 t navi10_setup_pptable +ffffffff822abfb0 t navi10_baco_enter +ffffffff822ac000 t navi10_baco_exit +ffffffff822ac100 t navi1x_get_gpu_metrics +ffffffff822acaa0 t navi10_enable_mgpu_fan_boost +ffffffff822acb10 t navi10_get_fan_parameters +ffffffff822acb50 t navi10_post_smu_init +ffffffff822ace40 t navi10_get_default_config_table_settings +ffffffff822ace90 t navi10_set_config_table +ffffffff822acf40 t navi1x_get_smu_metrics_data +ffffffff822ad3a0 t navi10_get_smu_metrics_data +ffffffff822ad5d0 t navi10_i2c_xfer +ffffffff822ad880 t navi10_i2c_func +ffffffff822ad8b0 t navi10_umc_hybrid_cdr_workaround +ffffffff822ae000 T sienna_cichlid_set_ppt_funcs +ffffffff822ae050 t sienna_cichlid_run_btc +ffffffff822ae0d0 t sienna_cichlid_get_allowed_feature_mask +ffffffff822ae350 t sienna_cichlid_set_default_dpm_table +ffffffff822ae920 t sienna_cichlid_populate_umd_state_clk +ffffffff822ae9d0 t sienna_cichlid_print_clk_levels +ffffffff822aebb0 t sienna_cichlid_force_clk_levels +ffffffff822aece0 t sienna_cichlid_od_edit_dpm_table +ffffffff822af270 t sienna_cichlid_get_power_profile_mode +ffffffff822af4d0 t sienna_cichlid_set_power_profile_mode +ffffffff822af790 t sienna_cichlid_dpm_set_vcn_enable +ffffffff822af850 t sienna_cichlid_dpm_set_jpeg_enable +ffffffff822af8d0 t sienna_cichlid_read_sensor +ffffffff822afbd0 t sienna_cichlid_pre_display_config_changed +ffffffff822afc00 t sienna_cichlid_display_config_changed +ffffffff822afc60 t sienna_cichlid_notify_smc_display_config +ffffffff822afdf0 t sienna_cichlid_is_dpm_running +ffffffff822afe40 t sienna_cichlid_get_fan_speed_rpm +ffffffff822aff40 t sienna_cichlid_set_watermarks_table +ffffffff822b00d0 t sienna_cichlid_get_thermal_temperature_range +ffffffff822b01a0 t sienna_cichlid_get_uclk_dpm_states +ffffffff822b02c0 t sienna_cichlid_set_default_od_settings +ffffffff822b0410 t sienna_cichlid_display_disable_memory_clock_switch +ffffffff822b0490 t sienna_cichlid_dump_pptable +ffffffff822b04c0 t sienna_cichlid_get_power_limit +ffffffff822b0580 t sienna_cichlid_update_pcie_parameters +ffffffff822b06e0 t sienna_cichlid_i2c_control_init +ffffffff822b0810 t sienna_cichlid_i2c_control_fini +ffffffff822b0850 t sienna_cichlid_get_unique_id +ffffffff822b09a0 t sienna_cichlid_init_smc_tables +ffffffff822b0cb0 t sienna_cichlid_set_mp1_state +ffffffff822b0cf0 t sienna_cichlid_setup_pptable +ffffffff822b1150 t sienna_cichlid_system_features_control +ffffffff822b11e0 t sienna_cichlid_baco_enter +ffffffff822b1230 t sienna_cichlid_baco_exit +ffffffff822b1330 t sienna_cichlid_is_mode1_reset_supported +ffffffff822b13b0 t sienna_cichlid_is_mode2_reset_supported +ffffffff822b13e0 t sienna_cichlid_mode2_reset +ffffffff822b1510 t sienna_cichlid_get_dpm_ultimate_freq +ffffffff822b1520 t sienna_cichlid_get_gpu_metrics +ffffffff822b19a0 t sienna_cichlid_enable_mgpu_fan_boost +ffffffff822b19f0 t sienna_cichlid_get_fan_parameters +ffffffff822b1a30 t sienna_cichlid_gpo_control +ffffffff822b1ae0 t sienna_cichlid_get_ecc_info +ffffffff822b1bd0 t sienna_cichlid_stb_get_data_direct +ffffffff822b1c70 t sienna_cichlid_get_default_config_table_settings +ffffffff822b1cd0 t sienna_cichlid_set_config_table +ffffffff822b1da0 t sienna_cichlid_get_smu_metrics_data +ffffffff822b21e0 t sienna_cichlid_get_throttler_status_locked +ffffffff822b2360 t sienna_cichlid_get_smartshift_power_percentage +ffffffff822b2490 t sienna_cichlid_i2c_xfer +ffffffff822b2740 t sienna_cichlid_i2c_func +ffffffff822b3000 T smu_v11_0_init_microcode +ffffffff822b32a0 T smu_v11_0_fini_microcode +ffffffff822b3320 T smu_v11_0_load_microcode +ffffffff822b3460 T smu_v11_0_check_fw_status +ffffffff822b34b0 T smu_v11_0_check_fw_version +ffffffff822b3660 T smu_v11_0_setup_pptable +ffffffff822b3780 T smu_v11_0_init_smc_tables +ffffffff822b38d0 T smu_v11_0_fini_smc_tables +ffffffff822b3b00 T smu_v11_0_init_power +ffffffff822b3b80 T smu_v11_0_fini_power +ffffffff822b3be0 T smu_v11_0_get_vbios_bootup_values +ffffffff822b3f30 T smu_v11_0_notify_memory_pool_location +ffffffff822b4020 T smu_v11_0_set_min_deep_sleep_dcefclk +ffffffff822b40a0 T smu_v11_0_set_driver_table_location +ffffffff822b4110 T smu_v11_0_set_tool_table_location +ffffffff822b4180 T smu_v11_0_init_display_count +ffffffff822b41d0 T smu_v11_0_set_allowed_mask +ffffffff822b42a0 T smu_v11_0_system_features_control +ffffffff822b42c0 T smu_v11_0_notify_display_change +ffffffff822b4330 T smu_v11_0_init_max_sustainable_clocks +ffffffff822b45a0 t smu_v11_0_get_max_sustainable_clock +ffffffff822b46c0 T smu_v11_0_get_current_power_limit +ffffffff822b4790 T smu_v11_0_set_power_limit +ffffffff822b48d0 T smu_v11_0_interrupt_work +ffffffff822b4950 T smu_v11_0_enable_thermal_alert +ffffffff822b49e0 T smu_v11_0_disable_thermal_alert +ffffffff822b4a00 T smu_v11_0_get_gfx_vdd +ffffffff822b4ac0 T smu_v11_0_display_clock_voltage_request +ffffffff822b4c00 T smu_v11_0_set_hard_freq_limited_range +ffffffff822b4ce0 T smu_v11_0_gfx_off_control +ffffffff822b4d50 T smu_v11_0_get_fan_control_mode +ffffffff822b4da0 T smu_v11_0_set_fan_speed_pwm +ffffffff822b4f30 t smu_v11_0_set_fan_static_mode +ffffffff822b50e0 T smu_v11_0_set_fan_speed_rpm +ffffffff822b5200 T smu_v11_0_get_fan_speed_pwm +ffffffff822b5330 T smu_v11_0_get_fan_speed_rpm +ffffffff822b5430 T smu_v11_0_set_fan_control_mode +ffffffff822b55d0 T smu_v11_0_set_xgmi_pstate +ffffffff822b55f0 T smu_v11_0_register_irq_handler +ffffffff822b56b0 T smu_v11_0_get_max_sustainable_clocks_by_dc +ffffffff822b5740 T smu_v11_0_set_azalia_d3_pme +ffffffff822b5760 T smu_v11_0_baco_set_armd3_sequence +ffffffff822b5780 T smu_v11_0_baco_is_support +ffffffff822b5800 T smu_v11_0_baco_get_state +ffffffff822b5830 T smu_v11_0_baco_set_state +ffffffff822b5ae0 T smu_v11_0_baco_enter +ffffffff822b5bd0 T smu_v11_0_baco_exit +ffffffff822b5c70 T smu_v11_0_mode1_reset +ffffffff822b5cf0 T smu_v11_0_handle_passthrough_sbr +ffffffff822b5d10 T smu_v11_0_get_dpm_ultimate_freq +ffffffff822b5e50 T smu_v11_0_set_soft_freq_limited_range +ffffffff822b5f30 T smu_v11_0_set_performance_level +ffffffff822b6280 T smu_v11_0_set_power_source +ffffffff822b62e0 T smu_v11_0_get_dpm_freq_by_index +ffffffff822b6380 T smu_v11_0_get_dpm_level_count +ffffffff822b6410 T smu_v11_0_set_single_dpm_table +ffffffff822b65f0 T smu_v11_0_get_dpm_level_range +ffffffff822b6750 T smu_v11_0_get_current_pcie_link_width_level +ffffffff822b67a0 T smu_v11_0_get_current_pcie_link_width +ffffffff822b6800 T smu_v11_0_get_current_pcie_link_speed_level +ffffffff822b6850 T smu_v11_0_get_current_pcie_link_speed +ffffffff822b68a0 T smu_v11_0_gfx_ulv_control +ffffffff822b6910 T smu_v11_0_deep_sleep_control +ffffffff822b6ac0 T smu_v11_0_restore_user_od_settings +ffffffff822b6b50 T smu_v11_0_set_smu_mailbox_registers +ffffffff822b6bc0 t smu_v11_0_set_irq_state +ffffffff822b7140 t smu_v11_0_irq_process +ffffffff822b7440 t orderly_poweroff +ffffffff822b8000 T vangogh_set_ppt_funcs +ffffffff822b8040 t vangogh_set_default_dpm_tables +ffffffff822b8060 t vangogh_common_print_clk_levels +ffffffff822b84b0 t vangogh_force_clk_levels +ffffffff822b86e0 t vangogh_od_edit_dpm_table +ffffffff822b8c30 t vangogh_get_power_profile_mode +ffffffff822b8d00 t vangogh_set_power_profile_mode +ffffffff822b8e20 t vangogh_dpm_set_vcn_enable +ffffffff822b8e70 t vangogh_dpm_set_jpeg_enable +ffffffff822b8ec0 t vangogh_read_sensor +ffffffff822b8ff0 t vangogh_is_dpm_running +ffffffff822b9050 t vangogh_set_watermarks_table +ffffffff822b91e0 t vangogh_set_performance_level +ffffffff822b9b00 t vangogh_get_power_limit +ffffffff822b9c80 t vangogh_get_ppt_limit +ffffffff822b9ce0 t vangogh_get_dpm_clock_table +ffffffff822b9e50 t vangogh_init_smc_tables +ffffffff822ba0a0 t vangogh_system_features_control +ffffffff822ba0f0 t vangogh_set_power_limit +ffffffff822ba250 t vangogh_get_gfxoff_status +ffffffff822ba2d0 t vangogh_get_gfxoff_entrycount +ffffffff822ba340 t vangogh_set_gfxoff_residency +ffffffff822ba3b0 t vangogh_get_gfxoff_residency +ffffffff822ba3e0 t vangogh_mode2_reset +ffffffff822ba520 t vangogh_common_get_gpu_metrics +ffffffff822bab60 t vangogh_post_smu_init +ffffffff822bad00 t vangogh_set_fine_grain_gfx_freq_parameters +ffffffff822bad70 t vangogh_common_get_smu_metrics_data +ffffffff822bb0c0 t vangogh_force_dpm_limit_value +ffffffff822bb200 t vangogh_get_dpm_ultimate_freq +ffffffff822bb5c0 t vangogh_set_soft_freq_limited_range +ffffffff822bc000 T renoir_set_ppt_funcs +ffffffff822bc0a0 t renoir_get_current_power_state +ffffffff822bc110 t renoir_print_clk_levels +ffffffff822bc370 t renoir_force_clk_levels +ffffffff822bc5a0 t renoir_od_edit_dpm_table +ffffffff822bc8a0 t renoir_get_power_profile_mode +ffffffff822bc970 t renoir_set_power_profile_mode +ffffffff822bca90 t renoir_dpm_set_vcn_enable +ffffffff822bcb10 t renoir_dpm_set_jpeg_enable +ffffffff822bcb90 t renoir_read_sensor +ffffffff822bcf80 t renoir_is_dpm_running +ffffffff822bcfb0 t renoir_set_watermarks_table +ffffffff822bd150 t renoir_set_performance_level +ffffffff822bd690 t renoir_get_dpm_clock_table +ffffffff822bd9d0 t renoir_init_smc_tables +ffffffff822bdb40 t renoir_get_enabled_mask +ffffffff822bdb80 t renoir_get_dpm_ultimate_freq +ffffffff822bde20 t renoir_get_gpu_metrics +ffffffff822be040 t renoir_gfx_state_change_set +ffffffff822be070 t renoir_set_fine_grain_gfx_freq_parameters +ffffffff822be100 t renoir_force_dpm_limit_value +ffffffff822bf000 T smu_v12_0_check_fw_status +ffffffff822bf050 T smu_v12_0_check_fw_version +ffffffff822bf110 T smu_v12_0_powergate_sdma +ffffffff822bf150 T smu_v12_0_set_gfx_cgpg +ffffffff822bf1b0 T smu_v12_0_get_gfxoff_status +ffffffff822bf230 T smu_v12_0_gfx_off_control +ffffffff822bf340 T smu_v12_0_fini_smc_tables +ffffffff822bf3f0 T smu_v12_0_set_default_dpm_tables +ffffffff822bf410 T smu_v12_0_mode2_reset +ffffffff822bf430 T smu_v12_0_set_soft_freq_limited_range +ffffffff822bf560 T smu_v12_0_set_driver_table_location +ffffffff822bf5d0 T smu_v12_0_get_vbios_bootup_values +ffffffff822c0000 T aldebaran_set_ppt_funcs +ffffffff822c0040 t aldebaran_get_allowed_feature_mask +ffffffff822c0090 t aldebaran_set_default_dpm_table +ffffffff822c0290 t aldebaran_populate_umd_state_clk +ffffffff822c0390 t aldebaran_print_clk_levels +ffffffff822c0550 t aldebaran_force_clk_levels +ffffffff822c0700 t aldebaran_usr_edit_dpm_table +ffffffff822c0920 t aldebaran_read_sensor +ffffffff822c0bc0 t aldebaran_is_dpm_running +ffffffff822c0c10 t aldebaran_get_thermal_temperature_range +ffffffff822c0cd0 t aldebaran_set_performance_level +ffffffff822c0d70 t aldebaran_get_power_limit +ffffffff822c0f00 t aldebaran_set_df_cstate +ffffffff822c0f80 t aldebaran_allow_xgmi_power_down +ffffffff822c1010 t aldebaran_i2c_control_init +ffffffff822c10d0 t aldebaran_i2c_control_fini +ffffffff822c1110 t aldebaran_get_unique_id +ffffffff822c11f0 t aldebaran_init_smc_tables +ffffffff822c1380 t aldebaran_set_mp1_state +ffffffff822c13c0 t aldebaran_setup_pptable +ffffffff822c1480 t aldebaran_system_features_control +ffffffff822c15e0 t aldebaran_set_power_limit +ffffffff822c1670 t aldebaran_is_baco_supported +ffffffff822c16a0 t aldebaran_is_mode1_reset_supported +ffffffff822c16d0 t aldebaran_is_mode2_reset_supported +ffffffff822c1700 t aldebaran_mode1_reset +ffffffff822c17e0 t aldebaran_mode2_reset +ffffffff822c1990 t aldebaran_set_soft_freq_limited_range +ffffffff822c1b90 t aldebaran_log_thermal_throttling_event +ffffffff822c1ea0 t aldebaran_get_gpu_metrics +ffffffff822c2130 t aldebaran_smu_handle_passthrough_sbr +ffffffff822c2150 t aldebaran_smu_send_hbm_bad_page_num +ffffffff822c21d0 t aldebaran_get_ecc_info +ffffffff822c2330 t aldebaran_send_hbm_bad_channel_flag +ffffffff822c2410 t aldebaran_get_current_clk_freq_by_table +ffffffff822c2550 t aldebaran_get_smu_metrics_data +ffffffff822c27a0 t aldebaran_upload_dpm_level +ffffffff822c2890 t aldebaran_i2c_xfer +ffffffff822c2b40 t aldebaran_i2c_func +ffffffff822c3000 T smu_v13_0_init_microcode +ffffffff822c31d0 T smu_v13_0_fini_microcode +ffffffff822c3250 T smu_v13_0_load_microcode +ffffffff822c3280 T smu_v13_0_init_pptable_microcode +ffffffff822c3420 T smu_v13_0_get_pptable_from_firmware +ffffffff822c3540 T smu_v13_0_check_fw_status +ffffffff822c35b0 T smu_v13_0_check_fw_version +ffffffff822c36e0 T smu_v13_0_setup_pptable +ffffffff822c3880 T smu_v13_0_init_smc_tables +ffffffff822c39c0 T smu_v13_0_fini_smc_tables +ffffffff822c3bb0 T smu_v13_0_init_power +ffffffff822c3c30 T smu_v13_0_fini_power +ffffffff822c3cb0 T smu_v13_0_get_vbios_bootup_values +ffffffff822c3f50 T smu_v13_0_notify_memory_pool_location +ffffffff822c4010 T smu_v13_0_set_min_deep_sleep_dcefclk +ffffffff822c4090 T smu_v13_0_set_driver_table_location +ffffffff822c4100 T smu_v13_0_set_tool_table_location +ffffffff822c4170 T smu_v13_0_init_display_count +ffffffff822c41b0 T smu_v13_0_set_allowed_mask +ffffffff822c4280 T smu_v13_0_gfx_off_control +ffffffff822c42f0 T smu_v13_0_system_features_control +ffffffff822c4310 T smu_v13_0_notify_display_change +ffffffff822c4380 T smu_v13_0_init_max_sustainable_clocks +ffffffff822c45f0 t smu_v13_0_get_max_sustainable_clock +ffffffff822c4710 T smu_v13_0_get_current_power_limit +ffffffff822c47e0 T smu_v13_0_set_power_limit +ffffffff822c4900 T smu_v13_0_enable_thermal_alert +ffffffff822c4980 T smu_v13_0_disable_thermal_alert +ffffffff822c49c0 T smu_v13_0_get_gfx_vdd +ffffffff822c4a80 T smu_v13_0_display_clock_voltage_request +ffffffff822c4bc0 T smu_v13_0_set_hard_freq_limited_range +ffffffff822c4ca0 T smu_v13_0_get_fan_control_mode +ffffffff822c4ce0 T smu_v13_0_set_fan_speed_pwm +ffffffff822c4ef0 t smu_v13_0_set_fan_static_mode +ffffffff822c50b0 T smu_v13_0_set_fan_control_mode +ffffffff822c5210 T smu_v13_0_set_fan_speed_rpm +ffffffff822c53b0 T smu_v13_0_set_xgmi_pstate +ffffffff822c53d0 T smu_v13_0_register_irq_handler +ffffffff822c5490 T smu_v13_0_get_max_sustainable_clocks_by_dc +ffffffff822c5520 T smu_v13_0_set_azalia_d3_pme +ffffffff822c5540 T smu_v13_0_wait_for_event +ffffffff822c5590 T smu_v13_0_get_dpm_ultimate_freq +ffffffff822c56e0 T smu_v13_0_set_soft_freq_limited_range +ffffffff822c57c0 T smu_v13_0_set_performance_level +ffffffff822c5f50 T smu_v13_0_set_power_source +ffffffff822c5fb0 T smu_v13_0_set_single_dpm_table +ffffffff822c6240 T smu_v13_0_get_dpm_level_range +ffffffff822c63c0 T smu_v13_0_get_current_pcie_link_width_level +ffffffff822c6410 T smu_v13_0_get_current_pcie_link_width +ffffffff822c6470 T smu_v13_0_get_current_pcie_link_speed_level +ffffffff822c64c0 T smu_v13_0_get_current_pcie_link_speed +ffffffff822c6510 T smu_v13_0_set_vcn_enable +ffffffff822c65c0 T smu_v13_0_set_jpeg_enable +ffffffff822c65e0 T smu_v13_0_run_btc +ffffffff822c6660 T smu_v13_0_gpo_control +ffffffff822c66f0 T smu_v13_0_deep_sleep_control +ffffffff822c6950 T smu_v13_0_gfx_ulv_control +ffffffff822c69c0 T smu_v13_0_baco_set_armd3_sequence +ffffffff822c69e0 T smu_v13_0_baco_is_support +ffffffff822c6a60 T smu_v13_0_baco_get_state +ffffffff822c6a90 T smu_v13_0_baco_set_state +ffffffff822c6b50 T smu_v13_0_baco_enter +ffffffff822c6c60 T smu_v13_0_baco_exit +ffffffff822c6cf0 T smu_v13_0_set_gfx_power_up_by_imu +ffffffff822c6d20 T smu_v13_0_od_edit_dpm_table +ffffffff822c6ff0 T smu_v13_0_set_default_dpm_tables +ffffffff822c7010 T smu_v13_0_set_smu_mailbox_registers +ffffffff822c7080 T smu_v13_0_mode1_reset +ffffffff822c7100 t smu_v13_0_set_irq_state +ffffffff822c7680 t smu_v13_0_irq_process +ffffffff822c7970 t orderly_poweroff +ffffffff822c8000 T smu_v13_0_0_set_ppt_funcs +ffffffff822c80e0 t smu_v13_0_0_get_allowed_feature_mask +ffffffff822c8220 t smu_v13_0_0_set_default_dpm_table +ffffffff822c8640 t smu_v13_0_0_populate_umd_state_clk +ffffffff822c8770 t smu_v13_0_0_print_clk_levels +ffffffff822c8890 t smu_v13_0_0_force_clk_levels +ffffffff822c8a10 t smu_v13_0_0_get_power_profile_mode +ffffffff822c8c70 t smu_v13_0_0_set_power_profile_mode +ffffffff822c8ec0 t smu_v13_0_0_read_sensor +ffffffff822c90e0 t smu_v13_0_0_is_dpm_running +ffffffff822c9130 t smu_v13_0_0_get_fan_speed_pwm +ffffffff822c9210 t smu_v13_0_0_get_fan_speed_rpm +ffffffff822c9280 t smu_v13_0_0_get_thermal_temperature_range +ffffffff822c9370 t smu_v13_0_0_dump_pptable +ffffffff822c93a0 t smu_v13_0_0_get_power_limit +ffffffff822c9480 t smu_v13_0_0_set_df_cstate +ffffffff822c94a0 t smu_v13_0_0_update_pcie_parameters +ffffffff822c9580 t smu_v13_0_0_i2c_control_init +ffffffff822c96b0 t smu_v13_0_0_i2c_control_fini +ffffffff822c96f0 t smu_v13_0_0_get_unique_id +ffffffff822c97a0 t smu_v13_0_0_init_smc_tables +ffffffff822c9990 t smu_v13_0_0_set_mp1_state +ffffffff822c99d0 t smu_v13_0_0_setup_pptable +ffffffff822c9b00 t smu_v13_0_0_system_features_control +ffffffff822c9b10 t smu_v13_0_0_baco_enter +ffffffff822c9b60 t smu_v13_0_0_baco_exit +ffffffff822c9bc0 t smu_v13_0_0_is_mode1_reset_supported +ffffffff822c9c10 t smu_v13_0_0_mode1_reset +ffffffff822c9ca0 t smu_v13_0_0_get_dpm_ultimate_freq +ffffffff822c9db0 t smu_v13_0_0_get_gpu_metrics +ffffffff822ca1d0 t smu_v13_0_0_enable_mgpu_fan_boost +ffffffff822ca220 t smu_v13_0_0_smu_send_bad_mem_page_num +ffffffff822ca2a0 t smu_v13_0_0_send_bad_mem_channel_flag +ffffffff822ca320 t smu_v13_0_0_get_smu_metrics_data +ffffffff822ca690 t smu_v13_0_get_throttler_status +ffffffff822ca850 t smu_v13_0_0_i2c_xfer +ffffffff822cab00 t smu_v13_0_0_i2c_func +ffffffff822cb000 T smu_v13_0_4_set_ppt_funcs +ffffffff822cb0b0 t smu_v13_0_4_print_clk_levels +ffffffff822cb170 t smu_v13_0_4_force_clk_levels +ffffffff822cb410 t smu_v13_0_4_read_sensor +ffffffff822cb6c0 t smu_v13_0_4_is_dpm_running +ffffffff822cb710 t smu_v13_0_4_set_watermarks_table +ffffffff822cb8a0 t smu_v13_0_4_set_performance_level +ffffffff822cbdd0 t smu_v13_0_4_init_smc_tables +ffffffff822cbf40 t smu_v13_0_4_fini_smc_tables +ffffffff822cbff0 t smu_v13_0_4_system_features_control +ffffffff822cc040 t smu_v13_0_4_mode2_reset +ffffffff822cc060 t smu_v13_0_4_get_dpm_ultimate_freq +ffffffff822cc480 t smu_v13_0_4_get_gpu_metrics +ffffffff822cc650 t smu_v13_0_4_set_fine_grain_gfx_freq_parameters +ffffffff822cc6a0 t smu_v13_0_4_get_smu_metrics_data +ffffffff822cd000 T smu_v13_0_5_set_ppt_funcs +ffffffff822cd090 t smu_v13_0_5_set_default_dpm_tables +ffffffff822cd0b0 t smu_v13_0_5_print_clk_levels +ffffffff822cd160 t smu_v13_0_5_force_clk_levels +ffffffff822cd2c0 t smu_v13_0_5_od_edit_dpm_table +ffffffff822cd590 t smu_v13_0_5_dpm_set_vcn_enable +ffffffff822cd5b0 t smu_v13_0_5_dpm_set_jpeg_enable +ffffffff822cd5d0 t smu_v13_0_5_read_sensor +ffffffff822cd7f0 t smu_v13_0_5_is_dpm_running +ffffffff822cd840 t smu_v13_0_5_set_watermarks_table +ffffffff822cd9d0 t smu_v13_0_5_set_performance_level +ffffffff822cdbb0 t smu_v13_0_5_init_smc_tables +ffffffff822cdd20 t smu_v13_0_5_fini_smc_tables +ffffffff822cddd0 t smu_v13_0_5_system_features_control +ffffffff822cde20 t smu_v13_0_5_mode2_reset +ffffffff822cdea0 t smu_v13_0_5_get_dpm_ultimate_freq +ffffffff822ce2e0 t smu_v13_0_5_get_gpu_metrics +ffffffff822ce420 t smu_v13_0_5_set_fine_grain_gfx_freq_parameters +ffffffff822ce470 t smu_v13_0_5_get_smu_metrics_data +ffffffff822cf000 T smu_v13_0_7_set_ppt_funcs +ffffffff822cf050 t smu_v13_0_7_get_allowed_feature_mask +ffffffff822cf1c0 t smu_v13_0_7_set_default_dpm_table +ffffffff822cf5b0 t smu_v13_0_7_populate_umd_state_clk +ffffffff822cf6b0 t smu_v13_0_7_print_clk_levels +ffffffff822cf7d0 t smu_v13_0_7_force_clk_levels +ffffffff822cf950 t smu_v13_0_7_get_power_profile_mode +ffffffff822cfc30 t smu_v13_0_7_set_power_profile_mode +ffffffff822cfe70 t smu_v13_0_7_read_sensor +ffffffff822d0080 t smu_v13_0_7_is_dpm_running +ffffffff822d00d0 t smu_v13_0_7_get_fan_speed_pwm +ffffffff822d01b0 t smu_v13_0_7_get_fan_speed_rpm +ffffffff822d0220 t smu_v13_0_7_get_thermal_temperature_range +ffffffff822d0310 t smu_v13_0_7_dump_pptable +ffffffff822d0340 t smu_v13_0_7_get_power_limit +ffffffff822d0420 t smu_v13_0_7_set_df_cstate +ffffffff822d0440 t smu_v13_0_7_update_pcie_parameters +ffffffff822d0520 t smu_v13_0_7_init_smc_tables +ffffffff822d0710 t smu_v13_0_7_check_fw_status +ffffffff822d0760 t smu_v13_0_7_set_mp1_state +ffffffff822d07a0 t smu_v13_0_7_setup_pptable +ffffffff822d0900 t smu_v13_0_7_baco_enter +ffffffff822d0950 t smu_v13_0_7_baco_exit +ffffffff822d09b0 t smu_v13_0_7_is_mode1_reset_supported +ffffffff822d09e0 t smu_v13_0_7_get_gpu_metrics +ffffffff822d0df0 t smu_v13_0_7_enable_mgpu_fan_boost +ffffffff822d0e40 t smu_v13_0_7_get_smu_metrics_data +ffffffff822d1190 t smu_v13_0_7_get_throttler_status +ffffffff822d2000 T yellow_carp_set_ppt_funcs +ffffffff822d2040 t yellow_carp_set_default_dpm_tables +ffffffff822d2060 t yellow_carp_print_clk_levels +ffffffff822d2120 t yellow_carp_force_clk_levels +ffffffff822d23c0 t yellow_carp_od_edit_dpm_table +ffffffff822d2690 t yellow_carp_dpm_set_vcn_enable +ffffffff822d26b0 t yellow_carp_dpm_set_jpeg_enable +ffffffff822d26d0 t yellow_carp_read_sensor +ffffffff822d2a70 t yellow_carp_is_dpm_running +ffffffff822d2ac0 t yellow_carp_set_watermarks_table +ffffffff822d2c50 t yellow_carp_set_performance_level +ffffffff822d3180 t yellow_carp_init_smc_tables +ffffffff822d32f0 t yellow_carp_fini_smc_tables +ffffffff822d33a0 t yellow_carp_system_features_control +ffffffff822d33f0 t yellow_carp_get_gfxoff_status +ffffffff822d3470 t yellow_carp_mode2_reset +ffffffff822d34f0 t yellow_carp_get_dpm_ultimate_freq +ffffffff822d3930 t yellow_carp_get_gpu_metrics +ffffffff822d3ae0 t yellow_carp_post_smu_init +ffffffff822d3b60 t yellow_carp_set_fine_grain_gfx_freq_parameters +ffffffff822d3bb0 t yellow_carp_get_smu_metrics_data +ffffffff822d4000 T smu_cmn_send_msg_without_waiting +ffffffff822d4170 T smu_cmn_wait_for_response +ffffffff822d42a0 T smu_cmn_send_smc_msg_with_param +ffffffff822d45c0 T smu_cmn_to_asic_specific_index +ffffffff822d46c0 t __smu_cmn_reg_print_error +ffffffff822d4910 T smu_cmn_send_smc_msg +ffffffff822d4930 T smu_cmn_send_debug_smc_msg +ffffffff822d49b0 T smu_cmn_feature_is_supported +ffffffff822d4a50 T smu_cmn_feature_is_enabled +ffffffff822d4b40 T smu_cmn_clk_dpm_is_enabled +ffffffff822d4c40 T smu_cmn_get_enabled_mask +ffffffff822d4d30 T smu_cmn_get_indep_throttler_status +ffffffff822d4de0 T smu_cmn_feature_update_enable_state +ffffffff822d4e80 T smu_cmn_feature_set_enabled +ffffffff822d4f50 T smu_cmn_get_pp_feature_mask +ffffffff822d50f0 T smu_cmn_set_pp_feature_mask +ffffffff822d51f0 T smu_cmn_disable_all_features_with_exception +ffffffff822d52a0 T smu_cmn_get_smc_version +ffffffff822d5370 T smu_cmn_update_table +ffffffff822d54d0 T smu_cmn_write_watermarks_table +ffffffff822d5590 T smu_cmn_write_pptable +ffffffff822d5650 T smu_cmn_get_metrics_table +ffffffff822d57b0 T smu_cmn_get_combo_pptable +ffffffff822d5880 T smu_cmn_init_soft_gpu_metrics +ffffffff822d5960 T smu_cmn_set_mp1_state +ffffffff822d5a00 T smu_cmn_is_audio_func_enabled +ffffffff822d6000 T pci_mcfg_init +ffffffff822d6050 T pci_lookup_segment +ffffffff822d60b0 T pci_attach_hook +ffffffff822d60e0 T pci_bus_maxdevs +ffffffff822d6110 T pci_make_tag +ffffffff822d6180 T pci_decompose_tag +ffffffff822d61e0 T pci_conf_size +ffffffff822d6230 T pci_mcfg_map_bus +ffffffff822d62b0 T pci_conf_read +ffffffff822d6400 T pci_conf_write +ffffffff822d6530 T pci_msix_table_map +ffffffff822d6650 T pci_msix_table_unmap +ffffffff822d66f0 T msi_hwmask +ffffffff822d6720 T msi_hwunmask +ffffffff822d6750 T msi_addroute +ffffffff822d6850 T msi_delroute +ffffffff822d68c0 T pci_intr_map_msi +ffffffff822d6940 T msix_hwmask +ffffffff822d6970 T msix_hwunmask +ffffffff822d69a0 T msix_addroute +ffffffff822d6b90 T msix_delroute +ffffffff822d6cf0 T pci_intr_map_msix +ffffffff822d6dc0 T pci_intr_map +ffffffff822d6fd0 T pci_intr_string +ffffffff822d70b0 T pci_intr_establish +ffffffff822d7100 T pci_intr_establish_cpu +ffffffff822d7260 T pci_intr_disestablish +ffffffff822d7270 T pci_init_extents +ffffffff822d7450 T pci_probe_device_hook +ffffffff822d7490 T pci_dev_postattach +ffffffff822d74a0 T pci_min_powerstate +ffffffff822d74b0 T pci_set_powerstate_md +ffffffff822d8000 T pciide_machdep_compat_intr_establish +ffffffff822d8060 T pciide_machdep_compat_intr_disestablish +ffffffff822d9000 T vga_post_init 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fxp_cardbus_detach +ffffffff822e62c0 T fxp_cardbus_setup +ffffffff822e7000 t rl_cardbus_match +ffffffff822e7020 t rl_cardbus_attach +ffffffff822e71c0 t rl_cardbus_detach +ffffffff822e7280 T rl_cardbus_setup +ffffffff822e8000 T re_cardbus_probe +ffffffff822e8020 T re_cardbus_attach +ffffffff822e8220 T re_cardbus_detach +ffffffff822e8300 T re_cardbus_setup +ffffffff822e9000 T ath_cardbus_match +ffffffff822e9050 T ath_cardbus_attach +ffffffff822e9180 T ath_cardbus_detach +ffffffff822e9250 T ath_cardbus_enable +ffffffff822e9320 T ath_cardbus_disable +ffffffff822e9370 T ath_cardbus_power +ffffffff822e93a0 T ath_cardbus_setup +ffffffff822ea000 T athn_cardbus_match +ffffffff822ea020 T athn_cardbus_attach +ffffffff822ea160 T athn_cardbus_detach +ffffffff822ea200 T athn_cardbus_enable +ffffffff822ea2d0 T athn_cardbus_disable +ffffffff822ea320 T athn_cardbus_power +ffffffff822ea350 T athn_cardbus_read +ffffffff822ea370 T athn_cardbus_write +ffffffff822ea3a0 T athn_cardbus_write_barrier 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acx_cardbus_match +ffffffff822ee020 T acx_cardbus_attach +ffffffff822ee250 T acx_cardbus_detach +ffffffff822ee370 T acx_cardbus_enable +ffffffff822ee440 T acx_cardbus_disable +ffffffff822ee490 T acx_cardbus_power +ffffffff822ee4c0 T acx_cardbus_setup +ffffffff822ef000 T pgt_cardbus_match +ffffffff822ef020 T pgt_cardbus_attach +ffffffff822ef220 T pgt_cardbus_detach +ffffffff822ef2c0 T pgt_cardbus_enable +ffffffff822ef410 T pgt_cardbus_disable +ffffffff822ef460 T pgt_cardbus_power +ffffffff822ef4b0 T pgt_cardbus_setup +ffffffff822f0000 T ehci_cardbus_match +ffffffff822f0040 T ehci_cardbus_attach +ffffffff822f02e0 T ehci_cardbus_detach +ffffffff822f1000 T ohci_cardbus_match +ffffffff822f1040 T ohci_cardbus_attach +ffffffff822f12d0 T ohci_cardbus_detach +ffffffff822f2000 T uhci_cardbus_match +ffffffff822f2040 T uhci_cardbus_attach +ffffffff822f2340 T uhci_cardbus_detach +ffffffff822f3000 T malo_cardbus_match +ffffffff822f3020 T malo_cardbus_attach +ffffffff822f3260 T malo_cardbus_detach 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pcmcia_function_init +ffffffff822f68a0 T pcmcia_function_enable +ffffffff822f6cc0 T pcmcia_function_disable +ffffffff822f6de0 T pcmcia_io_map +ffffffff822f7020 T pcmcia_intr_establish +ffffffff822f7280 T pcmcia_card_intr +ffffffff822f7390 T pcmcia_intr_disestablish +ffffffff822f75b0 T pcmcia_intr_string +ffffffff822f8000 T pcmcia_cis_read_1 +ffffffff822f80e0 T pcmcia_read_cis +ffffffff822f81d0 T pcmcia_scan_cis +ffffffff822f9ca0 T pcmcia_parse_cis_tuple +ffffffff822fae40 T pcmcia_print_cis +ffffffff822fc000 T pcmcia_check_cis_quirks +ffffffff822fd000 T ep_pcmcia_match +ffffffff822fd110 T ep_pcmcia_attach +ffffffff822fd550 T ep_pcmcia_detach +ffffffff822fd5e0 T ep_pcmcia_activate +ffffffff822fd6b0 T ep_pcmcia_lookup +ffffffff822fd7c0 T ep_pcmcia_enable1 +ffffffff822fd860 T ep_pcmcia_get_enaddr +ffffffff822fe000 T ne_pcmcia_match +ffffffff822fe140 T ne_pcmcia_attach +ffffffff822fe750 T ne_pcmcia_detach +ffffffff822fe800 T ne_pcmcia_activate +ffffffff822fe8f0 T ne_pcmcia_get_enaddr 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sm_pcmcia_funce_enaddr +ffffffff82302450 T sm_pcmcia_ascii_enaddr +ffffffff82302550 T sm_pcmcia_lannid_ciscallback +ffffffff82302660 T sm_pcmcia_enable +ffffffff82302700 T sm_pcmcia_disable +ffffffff82303000 T xe_pcmcia_match +ffffffff82303050 T xe_pcmcia_attach +ffffffff823037a0 T xe_pcmcia_detach +ffffffff82303860 T xe_pcmcia_activate +ffffffff82303b50 T xe_pcmcia_interpret_manfid +ffffffff82303bf0 T xe_pcmcia_funce_enaddr +ffffffff82303c10 T xe_ioctl +ffffffff82303f60 T xe_start +ffffffff82304200 T xe_watchdog +ffffffff82304240 T xe_intr +ffffffff82304610 T xe_full_reset +ffffffff82304be0 T xe_mdi_read +ffffffff82305560 T xe_mdi_write +ffffffff82305e70 T xe_statchg +ffffffff82305ea0 T xe_mediachange +ffffffff82305f20 T xe_mediastatus +ffffffff82305f80 T xe_init +ffffffff82305fd0 T xe_stop +ffffffff82306100 T xe_reset +ffffffff82306270 T xe_pcmcia_lan_nid_ciscallback +ffffffff823063c0 T xe_pcmcia_manfid_ciscallback +ffffffff823064e0 T xe_get +ffffffff823067a0 T xe_set_address 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cmalo_fw_free +ffffffff8230a570 T cmalo_cmd_set_macctrl +ffffffff8230a6d0 T cmalo_cmd_set_txpower +ffffffff8230a820 T cmalo_cmd_set_antenna +ffffffff8230a980 T cmalo_cmd_set_radio +ffffffff8230aad0 T cmalo_cmd_set_channel +ffffffff8230ac20 T cmalo_cmd_set_rate +ffffffff8230ada0 T cmalo_cmd_set_snmp +ffffffff8230af20 T cmalo_cmd_set_macaddr +ffffffff8230b080 T cmalo_wep +ffffffff8230b130 T cmalo_cmd_set_reset +ffffffff8230b230 T cmalo_select_network +ffffffff8230b330 T cmalo_cmd_set_auth +ffffffff8230b3f0 T cmalo_cmd_set_assoc +ffffffff8230b750 T cmalo_reflect_network +ffffffff8230b840 T cmalo_tx_done +ffffffff8230b900 T cmalo_rx +ffffffff8230bb00 T cmalo_cmd_response +ffffffff8230bd20 T cmalo_event +ffffffff8230bd90 T cmalo_tx +ffffffff8230bf70 T cmalo_cmd_set_wep +ffffffff8230c1c0 T cmalo_rate2bitmap +ffffffff8230c200 T cmalo_hexdump +ffffffff8230c230 T cmalo_cmd_request +ffffffff8230c390 T cmalo_cmd_rsp_hwspec +ffffffff8230c400 T cmalo_cmd_rsp_scan +ffffffff8230c610 T cmalo_parse_elements +ffffffff8230c710 T cmalo_cmd_rsp_assoc +ffffffff8230c750 T cmalo_cmd_set_80211d +ffffffff8230c840 T cmalo_cmd_set_bgscan_config +ffffffff8230c9a0 T cmalo_cmd_set_bgscan_query +ffffffff8230d000 T an_pcmcia_match +ffffffff8230d060 T an_pcmcia_attach +ffffffff8230d240 T an_pcmcia_detach +ffffffff8230d2d0 T an_pcmcia_activate +ffffffff8230e000 T pcibmatch +ffffffff8230e0c0 T pcibattach +ffffffff8230e100 T pcib_callback +ffffffff8230e170 T pcib_print +ffffffff8230f000 T amdpcib_match +ffffffff8230f050 T amdpcib_attach +ffffffff8230f170 T amdpcib_get_timecount +ffffffff82310000 T tcpcib_match +ffffffff82310050 T tcpcib_attach +ffffffff82310300 T tcpcib_activate +ffffffff823105b0 T tcpcib_wdt_init +ffffffff823106e0 T tcpcib_wdt_start +ffffffff82310710 T tcpcib_wdt_stop +ffffffff82310790 T tcpcib_hpet_get_timecount +ffffffff823107c0 T tcpcib_wdt_cb +ffffffff82311000 T aapic_match +ffffffff82311030 T aapic_attach +ffffffff82311110 t __llvm_retpoline_r11 +ffffffff82312000 T hme_config +ffffffff82312580 T hme_stop +ffffffff82312790 T hme_start +ffffffff82312a90 T hme_ioctl +ffffffff82312c40 T hme_watchdog +ffffffff82312ca0 t hme_mii_readreg +ffffffff82312e20 t hme_mii_writereg +ffffffff82312fa0 t hme_mii_statchg +ffffffff82313020 T hme_mediachange +ffffffff82313110 T hme_mediastatus +ffffffff82313180 T hme_mifinit +ffffffff82313240 T hme_tick +ffffffff82313360 T hme_unconfig +ffffffff82313450 T hme_fill_rx_ring +ffffffff823135f0 T hme_reset +ffffffff82313620 T hme_init +ffffffff82313b60 T hme_meminit +ffffffff82313ce0 T hme_iff +ffffffff82313e90 T hme_tint +ffffffff82313fe0 T hme_rint +ffffffff823141b0 T hme_eint +ffffffff82314250 T hme_intr +ffffffff82314350 T hme_newbuf +ffffffff82315000 T hmematch_pci +ffffffff82315030 T hmeattach_pci +ffffffff823152f0 T hmedetach_pci +ffffffff82315360 T hme_pci_enaddr +ffffffff82316000 T isamatch +ffffffff82316050 T isaattach +ffffffff82316180 T isascan +ffffffff82316590 T isaprint +ffffffff82316750 T isa_intr_typename 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wbsio_attach +ffffffff823264e0 T wbsio_print +ffffffff82327000 T schsio_probe +ffffffff82327110 T schsio_attach +ffffffff823272e0 T schsio_activate +ffffffff82327320 T schsio_config_read +ffffffff82327360 T schsio_config_write +ffffffff823273b0 T schsio_wdt_init +ffffffff823274c0 T schsio_hwm_init +ffffffff823277e0 T schsio_hwm_update +ffffffff82327d60 T schsio_hwm_read +ffffffff82327da0 T schsio_wdt_cb +ffffffff82328000 T lm_isa_match +ffffffff823281b0 T lm_isa_attach +ffffffff82328370 T lm_wbsio_match +ffffffff82328530 T lm_isa_writereg +ffffffff82328590 T lm_isa_readreg +ffffffff823285e0 T lm_isa_remove_alias +ffffffff82329000 T it_match +ffffffff823292d0 T it_enter +ffffffff82329350 T it_readreg +ffffffff82329390 T it_writereg +ffffffff823293e0 T it_exit +ffffffff82329420 T it_attach +ffffffff82329a70 T it_wdog_cb +ffffffff82329d00 T it_ec_refresh +ffffffff8232a310 T it_ec_writereg +ffffffff8232a360 T it_ec_readreg +ffffffff8232a3b0 T it_activate +ffffffff8232b000 T uguru_refresh_temp +ffffffff8232b0d0 T uguru_refresh_volt +ffffffff8232b170 T uguru_refresh_fan +ffffffff8232b240 T uguru_match +ffffffff8232b3d0 T uguru_attach +ffffffff8232b960 T uguru_read_multi +ffffffff8232ba40 T uguru_ac5_read +ffffffff8232bcb0 T uguru_read_sensor +ffffffff8232bfd0 T uguru_ac5_read_sensor +ffffffff8232c060 T uguru_refresh +ffffffff8232c0e0 T uguru_write_multi +ffffffff8232d000 T aps_match +ffffffff8232d100 T aps_attach +ffffffff8232d380 T aps_activate +ffffffff8232d420 T aps_do_io +ffffffff8232d5f0 T aps_init +ffffffff8232d740 T aps_refresh +ffffffff8232d760 T aps_read_data +ffffffff8232d840 T aps_refresh_sensor_data +ffffffff8232e000 T _isa_bus_dmamap_create +ffffffff8232e150 T _isa_bus_dmamap_destroy +ffffffff8232e210 T _isa_bus_dmamap_load +ffffffff8232e4b0 T _isa_bus_dmamap_load_mbuf +ffffffff8232e4d0 T _isa_bus_dmamap_load_uio +ffffffff8232e4f0 T _isa_bus_dmamap_load_raw +ffffffff8232e510 T _isa_bus_dmamap_unload +ffffffff8232e5d0 T _isa_bus_dmamap_sync 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wsdisplay_closescreen +ffffffff8232fc50 T wsdisplayopen +ffffffff8232fe10 T wsdisplay_delscreen +ffffffff8232ffd0 T wsdisplay_update_rawkbd +ffffffff823300c0 T wsdisplay_common_attach +ffffffff82330460 T wsdisplay_common_detach +ffffffff82330690 T wsdisplay_switchtoconsole +ffffffff82330700 T wsemuldisplaydevprint +ffffffff82330750 T wsemuldisplaydevsubmatch +ffffffff823307a0 T wsdisplay_burner +ffffffff82330870 T wsdisplay_burn +ffffffff823308e0 T wsdisplay_cnattach +ffffffff82330a30 T wsdisplaystart +ffffffff82330d10 T wsdisplayparam +ffffffff82330d50 T wsdisplayclose +ffffffff82330ed0 T wsdisplay_kbdholdscr +ffffffff82330f20 T wsdisplay_internal_ioctl +ffffffff82331670 T wsdisplayread +ffffffff823316f0 T wsdisplaywrite +ffffffff82331770 T wsdisplaytty +ffffffff823317e0 T wsdisplayioctl +ffffffff82331980 T wsdisplay_cfg_ioctl +ffffffff82331d00 T wsdisplay_param +ffffffff82331dd0 T wsdisplay_driver_ioctl +ffffffff82331ea0 T wsdisplay_burner_setup +ffffffff82331ff0 T wsdisplay_switch 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wskbd_do_ioctl_sc +ffffffff8233a050 T wskbd_displayioctl_sc +ffffffff8233a870 T wskbdkqfilter +ffffffff8233a8d0 T wskbd_pickfree +ffffffff8233a940 T wskbd_set_console_display +ffffffff8233a990 T wskbd_add_mux +ffffffff8233aa00 T update_leds +ffffffff8233aaa0 T update_modifier +ffffffff8233ab80 T change_displayparam +ffffffff8233ac30 T internal_command +ffffffff8233b110 T wskbd_debugger +ffffffff8233c000 T wskbd_compose_value +ffffffff8233c160 T ksym_upcase +ffffffff8233c1e0 T fillmapentry +ffffffff8233c370 T wskbd_get_mapentry +ffffffff8233c570 T wskbd_init_keymap +ffffffff8233c600 T wskbd_load_keymap +ffffffff8233d000 T wsmouse_match +ffffffff8233d030 T wsmouse_attach +ffffffff8233d0c0 T wsmouse_detach +ffffffff8233d2a0 T wsmouse_activate +ffffffff8233d2d0 T wsmouse_mux_open +ffffffff8233d480 T wsmouse_mux_close +ffffffff8233d4e0 T wsmousedoioctl +ffffffff8233d540 T wsmousedevprint +ffffffff8233d590 T wsmouseopen +ffffffff8233d7e0 T wsmouse_input_cleanup +ffffffff8233d870 T wsmousedoopen +ffffffff8233da20 T wsmouseclose +ffffffff8233db00 T wsmouse_input_reset +ffffffff8233dc40 T wsmouseread +ffffffff8233dd00 T wsmouseioctl +ffffffff8233dd80 T wsmouse_do_ioctl +ffffffff8233df20 T wsmouse_param_ioctl +ffffffff8233e040 T wsmouse_set_params +ffffffff8233e360 T wsmouse_get_params +ffffffff8233e5c0 T wsmousekqfilter +ffffffff8233e620 T wsmouse_add_mux +ffffffff8233e690 T wsmouse_buttons +ffffffff8233e6d0 T wsmouse_motion +ffffffff8233e730 T wsmouse_position +ffffffff8233e830 T wsmouse_touch +ffffffff8233e8c0 T wsmouse_mtstate +ffffffff8233eab0 T wsmouse_set +ffffffff8233ed80 T wsmouse_touch_update +ffffffff8233ee20 T wsmouse_mt_update +ffffffff8233ee60 T wsmouse_hysteresis +ffffffff8233eeb0 T wsmouse_ptr_ctrl +ffffffff8233eff0 T wsmouse_mt_convert +ffffffff8233f130 T wsmouse_evq_put +ffffffff8233f1c0 T wsmouse_btn_sync +ffffffff8233f2c0 T wsmouse_motion_sync +ffffffff8233f8d0 T wsmouse_touch_sync +ffffffff8233fac0 T wsmouse_log_input +ffffffff8233fc80 T wsmouse_log_events +ffffffff8233fdc0 T wsmouse_input_sync +ffffffff823403c0 T wsmouse_id_to_slot +ffffffff823404a0 T wsmouse_matching +ffffffff82340a30 T wsmouse_mtframe +ffffffff82340df0 T wsmouse_mt_init +ffffffff82340f60 T wsmouse_set_mode +ffffffff82340fb0 T wsmouse_get_hw +ffffffff82340fe0 T wsmouse_configure +ffffffff82342000 T wstpad_set_direction +ffffffff82342160 T wstpad_is_stable +ffffffff82342240 T wstpad_scroll_coords +ffffffff823423c0 T wstpad_scroll +ffffffff82342550 T wstpad_f2scroll +ffffffff82342880 T wstpad_edgescroll +ffffffff823429a0 T wstpad_get_sbtn +ffffffff82342b20 T wstpad_softbuttons +ffffffff82342bb0 T wstpad_is_tap +ffffffff82342c20 T wstpad_tap_filter +ffffffff82342cd0 T wstpad_tap_touch +ffffffff82342f20 T wstpad_tap_button +ffffffff82342f70 T wstpad_tap +ffffffff823433a0 T wstpad_tap_sync +ffffffff82343400 T wstpad_tap_timeout +ffffffff82343630 T wstpad_click +ffffffff823436d0 T wstpad_cmds +ffffffff82343940 T wstpad_mt_inputs +ffffffff82343cb0 T wstpad_mt_masks +ffffffff82344160 T wstpad_touch_inputs +ffffffff82344360 T wstpad_process_input +ffffffff82344600 T wstpad_track_interval +ffffffff82344890 T wstpad_init_deceleration +ffffffff82344960 T wstpad_decelerate +ffffffff82344ac0 T wstpad_filter +ffffffff82344d80 T wstpad_compat_convert +ffffffff82344e20 T wstpad_init +ffffffff82344f90 T wstpad_configure +ffffffff823456d0 T wstpad_reset +ffffffff82345740 T wstpad_cleanup +ffffffff823457d0 T wstpad_set_param +ffffffff82345aa0 T wstpad_get_param +ffffffff82346000 T wsmux_mux_open +ffffffff82346120 T wsmux_mux_close +ffffffff823461e0 T wsmux_do_ioctl +ffffffff82346810 T wsmux_do_displayioctl +ffffffff82346930 T wsmux_evsrc_set_display +ffffffff82346980 T wsmuxattach +ffffffff823469b0 T wsmux_getmux +ffffffff82346bf0 T wsmux_create +ffffffff82346cc0 T wsmuxopen +ffffffff82346e10 T wsmux_detach_sc +ffffffff82346f20 T wsmux_do_open +ffffffff82347010 T wsmuxclose +ffffffff82347110 T wsmux_do_close +ffffffff823471a0 T wsmuxread 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pms_spec_cmd +ffffffff82355650 T pms_set_scaling +ffffffff823556e0 T pms_set_resolution +ffffffff82355770 T pms_get_devid +ffffffff82355800 T pms_get_status +ffffffff82355890 T pms_set_rate +ffffffff82355920 T pms_reset +ffffffff823559b0 T pms_dev_enable +ffffffff82355a60 T pms_dev_disable +ffffffff82355b10 T pms_protocol_lookup +ffffffff82355c10 T pms_reset_detect +ffffffff82355c90 T pms_reset_timo +ffffffff82355ce0 T pms_reset_task +ffffffff82355da0 T pms_change_state +ffffffff82356120 T pmsinput +ffffffff823562c0 T synaptics_set_mode +ffffffff823563c0 T synaptics_query +ffffffff823564b0 T synaptics_get_hwinfo +ffffffff82356cc0 T synaptics_sec_proc +ffffffff82356d90 T synaptics_knock +ffffffff82356fe0 T alps_sec_proc +ffffffff82357100 T alps_get_hwinfo +ffffffff82357580 T elantech_set_absolute_mode_v1 +ffffffff823577d0 T elantech_set_absolute_mode_v2 +ffffffff82357fa0 T elantech_ps2_cmd +ffffffff82358030 T elantech_set_absolute_mode_v3 +ffffffff82358550 T elantech_set_absolute_mode_v4 +ffffffff82358910 T elantech_get_hwinfo_v1 +ffffffff82358af0 T elantech_get_hwinfo_v2 +ffffffff82358e90 T elantech_get_hwinfo_v3 +ffffffff82359090 T elantech_get_hwinfo_v4 +ffffffff82359340 T elantech_knock +ffffffff8235a000 T wscnprobe +ffffffff8235a0a0 T wscninit +ffffffff8235a150 T wscn_video_init +ffffffff8235a1c0 T wscn_input_init +ffffffff8235a220 T wscnputc +ffffffff8235a230 T wscngetc +ffffffff8235a240 T wscnpollc +ffffffff8235b000 T skgpio_match +ffffffff8235b100 T skgpio_attach +ffffffff8235b350 T skgpio_gpio_read +ffffffff8235b3a0 T skgpio_gpio_write +ffffffff8235b410 T skgpio_gpio_ctl +ffffffff8235b490 T skgpio_led_read +ffffffff8235b4e0 T skgpio_led_write +ffffffff8235b510 T skgpio_led_ctl +ffffffff8235c000 T pctrattach +ffffffff8235c080 T pctropen +ffffffff8235c0c0 T pctrclose +ffffffff8235c0f0 T pctrioctl +ffffffff8235c3c0 T pctr_reload +ffffffff8235c500 T pctr_resume +ffffffff8235d000 T nvramattach +ffffffff8235d0a0 T nvram_csum_valid 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usb_add_task +ffffffff82366cd0 T usb_rem_task +ffffffff82366d90 T usb_rem_wait_task +ffffffff82366ea0 T usbctlprint +ffffffff82366ef0 T usbopen +ffffffff82366f60 T usbclose +ffffffff82366f90 T usb_fill_udc_task +ffffffff82367030 T usb_fill_udf_task +ffffffff823670a0 T usbioctl +ffffffff82367650 T usb_needs_reattach +ffffffff823676a0 T usb_schedsoftintr +ffffffff82367760 T usb_tap +ffffffff82368000 T usbd_is_dying +ffffffff82368040 T usbd_deactivate +ffffffff82368070 T usbd_ref_incr +ffffffff823680a0 T usbd_ref_decr +ffffffff823680e0 T usbd_ref_wait +ffffffff82368150 T usbd_get_devcnt +ffffffff82368180 T usbd_claim_iface +ffffffff823681c0 T usbd_iface_claimed +ffffffff82368200 T usbd_open_pipe +ffffffff823682e0 T usbd_open_pipe_ival +ffffffff823683c0 T usbd_open_pipe_intr +ffffffff82368600 T usbd_alloc_xfer +ffffffff82368670 T usbd_setup_xfer +ffffffff823686e0 T usbd_transfer +ffffffff82368970 T usbd_free_xfer +ffffffff823689f0 T usbd_close_pipe +ffffffff82368b50 T usbd_abort_pipe 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usb_block_allocmem +ffffffff8236b250 T usb_block_freemem +ffffffff8236b2b0 T usb_allocmem +ffffffff8236b4f0 T usb_freemem +ffffffff8236b5b0 T usb_syncmem +ffffffff8236c000 T usbd_errstr +ffffffff8236c070 T usbd_get_string_desc +ffffffff8236c130 T usbd_get_string +ffffffff8236c320 T usbd_cache_devinfo +ffffffff8236c670 T usbd_printBCD +ffffffff8236c6f0 T usbd_devinfo +ffffffff8236c880 T usb_delay_ms +ffffffff8236c8e0 T usbd_delay_ms +ffffffff8236c9a0 T usbd_port_disown_to_1_1 +ffffffff8236cab0 T usbd_reset_port +ffffffff8236cc60 T usbd_find_idesc +ffffffff8236cd10 T usbd_find_edesc +ffffffff8236ce10 T usbd_fill_iface_data +ffffffff8236d080 T usbd_parse_idesc +ffffffff8236d190 T usbd_free_iface_data +ffffffff8236d1f0 T usbd_set_config +ffffffff8236d240 T usbd_set_config_no +ffffffff8236d300 T usbd_set_config_index +ffffffff8236d7c0 T usbd_setup_pipe +ffffffff8236d8b0 T usbd_set_address +ffffffff8236d970 T usbd_getnewaddr +ffffffff8236da00 T usbd_probe_and_attach +ffffffff8236df80 T usbd_print +ffffffff8236e090 T usbd_new_device +ffffffff8236e910 T usbd_reload_device_desc +ffffffff8236e980 T usb_free_device +ffffffff8236eaf0 T usbd_fill_deviceinfo +ffffffff8236ee50 T usbd_get_cdesc +ffffffff8236ef70 T usbd_detach +ffffffff82370000 T usbd_find_quirk +ffffffff82371000 T uhub_match +ffffffff82371060 T uhub_attach +ffffffff82371510 T uhub_detach +ffffffff82371640 T uhub_explore +ffffffff823718e0 T uhub_intr +ffffffff82371a30 T uhub_port_connect +ffffffff82372000 T uaudio_match +ffffffff82372070 T uaudio_attach +ffffffff823721d0 T uaudio_detach +ffffffff82372370 T uaudio_open +ffffffff82372460 T uaudio_close +ffffffff82372480 T uaudio_set_params +ffffffff82372b70 T uaudio_halt_output +ffffffff82372bc0 T uaudio_halt_input +ffffffff82372c10 T uaudio_set_port +ffffffff82372c70 T uaudio_get_port +ffffffff82372cd0 T uaudio_query_devinfo +ffffffff82372d30 T uaudio_trigger_output +ffffffff82372db0 T uaudio_trigger_input +ffffffff82372e30 T uaudio_copy_output +ffffffff82372e80 T uaudio_underrun +ffffffff82372ea0 T uaudio_set_blksz +ffffffff82372f60 T uaudio_sign_expand +ffffffff82372fa0 T uaudio_req +ffffffff82373020 T uaudio_getnum +ffffffff82373170 T uaudio_getdesc +ffffffff823731e0 T uaudio_unit_byid +ffffffff82373220 T uaudio_tname +ffffffff82373390 T uaudio_clkname +ffffffff823733c0 T uaudio_mkname +ffffffff823734d0 T uaudio_feature_fixup +ffffffff82373620 T uaudio_ranges_init +ffffffff82373650 T uaudio_ranges_add +ffffffff82373710 T uaudio_ranges_clear +ffffffff82373780 T uaudio_ranges_decode +ffffffff82373800 T uaudio_ranges_encode +ffffffff82373880 T uaudio_ranges_getrates +ffffffff82373970 T uaudio_rates_indexof +ffffffff823739f0 T uaudio_req_ranges +ffffffff82374020 T uaudio_alt_getrates +ffffffff82374100 T uaudio_clock_id +ffffffff82374180 T uaudio_getrates +ffffffff82374260 T uaudio_feature_addent +ffffffff82374420 T uaudio_process_srcs +ffffffff82374510 T uaudio_process_unit +ffffffff82375110 T uaudio_process_nch +ffffffff823751c0 T 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athn_usb_alloc_rx_list +ffffffff8245a0a0 T athn_usb_alloc_tx_list +ffffffff8245a190 T athn_usb_do_async +ffffffff8245a2b0 T athn_usb_htc_msg +ffffffff8245a340 T athn_usb_htc_connect_svc +ffffffff8245a510 T athn_usb_wmi_xcmd +ffffffff8245a730 T athn_usb_read_rom +ffffffff8245a890 T athn_usb_stop +ffffffff8245aba0 T athn_usb_init +ffffffff8245aff0 T athn_usb_newstate_cb +ffffffff8245b2e0 T athn_usb_remove_node +ffffffff8245b3d0 T athn_usb_switch_chan +ffffffff8245b5b0 T athn_usb_create_node +ffffffff8245b820 T athn_usb_newassoc_cb +ffffffff8245b9b0 T athn_usb_node_set_rates +ffffffff8245bae0 T athn_usb_count_active_sta +ffffffff8245bb30 T athn_usb_newauth_cb +ffffffff8245bc10 T athn_usb_node_free_cb +ffffffff8245bcd0 T athn_usb_ampdu_tx_start +ffffffff8245bdd0 T athn_usb_ampdu_tx_start_cb +ffffffff8245be30 T athn_usb_ampdu_tx_stop +ffffffff8245bf10 T athn_usb_ampdu_tx_stop_cb +ffffffff8245bf70 T athn_usb_clean_nodes +ffffffff8245c030 T athn_usb_updateedca_cb +ffffffff8245c070 T athn_usb_updateslot_cb +ffffffff8245c0b0 T athn_usb_set_key_cb +ffffffff8245c170 T athn_usb_delete_key_cb +ffffffff8245c1d0 T athn_usb_bcneof +ffffffff8245c230 T athn_usb_swba +ffffffff8245c390 T athn_usb_tx_status +ffffffff8245c400 T athn_usb_rx_wmi_ctrl +ffffffff8245c620 T athn_usb_rx_radiotap +ffffffff8245c7f0 T athn_usb_rx_frame +ffffffff8245ca60 T athn_usb_rxeof +ffffffff8245cd80 T athn_usb_txeof +ffffffff8245ce40 T athn_usb_tx +ffffffff8245e000 T uow_match +ffffffff8245e070 T uow_attach +ffffffff8245e520 T uow_detach +ffffffff8245e5f0 T uow_activate +ffffffff8245e660 T uow_intr +ffffffff8245e6b0 T uow_reset +ffffffff8245e6d0 T uow_ow_reset +ffffffff8245e720 T uow_ow_bit +ffffffff8245e7a0 T uow_ow_read_byte +ffffffff8245e820 T uow_ow_write_byte +ffffffff8245e880 T uow_ow_read_block +ffffffff8245e910 T uow_ow_write_block +ffffffff8245e980 T uow_ow_matchrom +ffffffff8245ea50 T uow_cmd +ffffffff8245eb90 T uow_read +ffffffff8245ec90 T uow_write +ffffffff8245ed70 T uow_ow_search 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uhidpp_is_notification +ffffffff82465b10 T uhidpp_claim_notification +ffffffff82465c30 T uhidpp_refresh +ffffffff82465d00 T uhidpp_device_refresh +ffffffff82465db0 T uhidpp_consume_notification +ffffffff82465ef0 T uhidpp_device_connect +ffffffff82466350 T uhidpp_sleep +ffffffff82466380 T hidpp_get_protocol_version +ffffffff82466440 T uhidpp_device_features +ffffffff82466610 T hidpp20_battery_get_capability +ffffffff824666c0 T hidpp20_unified_battery_get_capabilities +ffffffff824667a0 T hidpp20_battery_get_level_status +ffffffff824668d0 T hidpp20_unified_battery_get_status +ffffffff824669f0 T hidpp20_root_get_feature +ffffffff82466aa0 T hidpp20_feature_get_count +ffffffff82466b40 T hidpp20_feature_get_id +ffffffff82466bf0 T hidpp_send_fap_report +ffffffff82466cd0 T hidpp_send_rap_report +ffffffff82466d80 T hidpp20_battery_status_is_charging +ffffffff82466db0 T hidpp20_unified_battery_status_is_charging +ffffffff82466de0 T hidpp_send_validate +ffffffff82466e30 T hidpp_send_report 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toshiba_fn_key_brightness_up +ffffffff824cec30 T toshiba_fn_key_brightness_down +ffffffff824ced80 T toshiba_fn_key_video_output +ffffffff824ceed0 T toshiba_get_video_output +ffffffff824cf040 T toshiba_set_video_output +ffffffff824d0000 T acpisony_match +ffffffff824d0070 T acpisony_attach +ffffffff824d00d0 T acpisony_activate +ffffffff824d0110 T acpisony_notify_setup +ffffffff824d0300 T acpisony_notify +ffffffff824d06a0 T acpisony_find_offset +ffffffff824d07b0 T acpisony_set_hotkey +ffffffff824d09a0 T acpisony_brightness_down +ffffffff824d0ab0 T acpisony_get_brightness +ffffffff824d0b30 T acpisony_set_brightness +ffffffff824d1000 T acpivideo_match +ffffffff824d1070 T acpivideo_attach +ffffffff824d11d0 T acpivideo_getpcibus +ffffffff824d1210 T acpivideo_notify +ffffffff824d1270 T acpivideo_set_policy +ffffffff824d1330 T acpi_foundvout +ffffffff824d1400 T acpivideo_print +ffffffff824d2000 T acpivout_match +ffffffff824d2070 T acpivout_attach +ffffffff824d21c0 T acpivout_notify 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aplgpio_match +ffffffff824d5060 T aplgpio_attach +ffffffff824d5300 T aplgpio_intr +ffffffff824d5430 T aplgpio_read_pin +ffffffff824d5480 T aplgpio_write_pin +ffffffff824d54f0 T aplgpio_intr_establish +ffffffff824d5610 T aplgpio_intr_enable +ffffffff824d56a0 T aplgpio_intr_disable +ffffffff824d6000 T bytgpio_match +ffffffff824d6060 T bytgpio_attach +ffffffff824d6310 T bytgpio_intr +ffffffff824d6430 T bytgpio_read_pin +ffffffff824d6490 T bytgpio_write_pin +ffffffff824d6510 T bytgpio_intr_establish +ffffffff824d6580 T bytgpio_intr_enable +ffffffff824d6660 T bytgpio_intr_disable +ffffffff824d7000 T chvgpio_match +ffffffff824d7060 T chvgpio_attach +ffffffff824d7300 T chvgpio_intr +ffffffff824d73d0 T chvgpio_read_pin +ffffffff824d7470 T chvgpio_write_pin +ffffffff824d7530 T chvgpio_intr_establish +ffffffff824d7700 T chvgpio_intr_enable +ffffffff824d77c0 T chvgpio_intr_disable +ffffffff824d7880 T chvgpio_opreg_handler +ffffffff824d7900 T chvgpio_check_pin +ffffffff824d8000 T glkgpio_match +ffffffff824d8060 T glkgpio_attach +ffffffff824d8300 T glkgpio_intr +ffffffff824d8430 T glkgpio_read_pin +ffffffff824d8480 T glkgpio_write_pin +ffffffff824d84f0 T glkgpio_intr_establish +ffffffff824d8610 T glkgpio_intr_enable +ffffffff824d86a0 T glkgpio_intr_disable +ffffffff824d9000 T pchgpio_match +ffffffff824d9060 T pchgpio_attach +ffffffff824d94b0 T pchgpio_activate +ffffffff824d9560 T pchgpio_intr +ffffffff824d9780 T pchgpio_read_pin +ffffffff824d9870 T pchgpio_write_pin +ffffffff824d9980 T pchgpio_intr_establish +ffffffff824d9bb0 T pchgpio_intr_enable +ffffffff824d9cf0 T pchgpio_intr_disable +ffffffff824d9e30 T pchgpio_save +ffffffff824d9ea0 T pchgpio_restore +ffffffff824d9f10 T pchgpio_find_group +ffffffff824d9f90 T pchgpio_intr_handle +ffffffff824da070 T pchgpio_save_pin +ffffffff824da230 T pchgpio_restore_pin +ffffffff824db000 T tipmic_match +ffffffff824db050 T tipmic_attach +ffffffff824db250 T tipmic_write_1 +ffffffff824db310 T tipmic_intr +ffffffff824db470 T tipmic_get_lpat +ffffffff824db5a0 T tipmic_read_pin +ffffffff824db5d0 T tipmic_write_pin +ffffffff824db600 T tipmic_thermal_opreg_handler +ffffffff824dbe00 T tipmic_power_opreg_handler +ffffffff824dc0a0 T tipmic_read_1 +ffffffff824dc160 T tipmic_raw_to_temp +ffffffff824dd000 T ccpmic_match +ffffffff824dd050 T ccpmic_attach +ffffffff824dd130 T ccpmic_get_lpat +ffffffff824dd250 T ccpmic_read_pin +ffffffff824dd3d0 T ccpmic_write_pin +ffffffff824dd530 T ccpmic_thermal_opreg_handler +ffffffff824dd760 T ccpmic_power_opreg_handler +ffffffff824dd940 T ccpmic_read_1 +ffffffff824dda00 T ccpmic_write_1 +ffffffff824ddac0 T ccpmic_raw_to_temp +ffffffff824de000 T com_acpi_match +ffffffff824de070 T com_acpi_attach +ffffffff824de2e0 T com_acpi_is_designware +ffffffff824de340 T com_acpi_intr_designware +ffffffff824de370 T com_acpi_is_console +ffffffff824df000 T sdhc_acpi_match +ffffffff824df060 T sdhc_acpi_attach +ffffffff824df360 T sdhc_acpi_parse_resources +ffffffff824df410 T sdhc_acpi_card_detect_gpio +ffffffff824df470 T sdhc_acpi_card_detect_intr +ffffffff824df4b0 T sdhc_acpi_power_on +ffffffff824df530 T sdhc_acpi_explore +ffffffff824df560 T sdhc_acpi_card_detect_nonremovable +ffffffff824df590 T sdhc_acpi_do_explore +ffffffff824e0000 T dwiic_acpi_match +ffffffff824e0050 T dwiic_acpi_attach +ffffffff824e03b0 T dwiic_acpi_parse_crs +ffffffff824e04e0 T dwiic_acpi_power +ffffffff824e05e0 T dwiic_acpi_get_params +ffffffff824e0710 T dwiic_i2c_intr_establish +ffffffff824e0790 T dwiic_i2c_intr_disestablish +ffffffff824e07a0 T dwiic_i2c_intr_string +ffffffff824e0830 T dwiic_acpi_bus_scan +ffffffff824e0860 T dwiic_acpi_found_hid +ffffffff824e0b80 T dwiic_matchhids +ffffffff824e0c10 T dwiic_acpi_found_ihidev +ffffffff824e0e90 T dwiic_acpi_found_iatp +ffffffff824e1000 T acpicbkbd_match +ffffffff824e1020 T acpicbkbd_attach +ffffffff824e10b0 T acpicbkbd_activate +ffffffff824e1100 T acpicbkbd_get_backlight +ffffffff824e1170 T acpicbkbd_set_backlight +ffffffff824e1210 T acpicbkbd_write_backlight +ffffffff824e2000 T acpials_match +ffffffff824e2080 T acpials_attach +ffffffff824e2210 T acpials_read +ffffffff824e2290 T acpials_addtask +ffffffff824e22d0 T acpials_notify +ffffffff824e2350 T acpials_update +ffffffff824e3000 T tpm_match +ffffffff824e3050 T tpm_attach +ffffffff824e3320 T tpm_activate +ffffffff824e3420 T tpm2_start_method +ffffffff824e34a0 T tpm_probe +ffffffff824e3550 T tpm_init_tis +ffffffff824e37b0 T tpm_init_crb +ffffffff824e3af0 T tpm_suspend +ffffffff824e3be0 T tpm_resume +ffffffff824e3c10 T tpm_write_tis +ffffffff824e3f90 T tpm_read_tis +ffffffff824e4170 T tpm_write_crb +ffffffff824e4580 T tpm_read_crb +ffffffff824e4870 T tpm_request_locality_tis +ffffffff824e4960 T tpm_request_locality_crb +ffffffff824e4a60 T tpm_release_locality_crb +ffffffff824e4ab0 T tpm_release_locality_tis +ffffffff824e4b20 T tpm_getburst +ffffffff824e4bd0 T tpm_status +ffffffff824e4bf0 T tpm_waitfor +ffffffff824e4cc0 T tpm_waitfor_status +ffffffff824e5000 T acpihve_match +ffffffff824e50b0 T acpihve_attach +ffffffff824e6000 T acpisbs_match +ffffffff824e6020 T acpisbs_attach +ffffffff824e6290 T acpisbs_activate +ffffffff824e6370 T acpisbs_read +ffffffff824e6430 T acpisbs_setup_sensors +ffffffff824e6550 T acpisbs_refresh_sensors +ffffffff824e66c0 T acpisbs_notify +ffffffff824e67f0 T acpi_smbus_read +ffffffff824e7000 T surface_match +ffffffff824e7050 T surface_attach +ffffffff824e70b0 T surface_hotkey +ffffffff824e8000 T ipmi_acpi_match +ffffffff824e8020 T ipmi_acpi_attach +ffffffff824e8240 T ipmi_acpi_parse_crs +ffffffff824e9000 T amdgpio_match +ffffffff824e9060 T amdgpio_attach +ffffffff824e9290 T amdgpio_activate +ffffffff824e9380 T amdgpio_intr +ffffffff824e9520 T amdgpio_read_pin +ffffffff824e9570 T amdgpio_write_pin +ffffffff824e95e0 T amdgpio_intr_establish +ffffffff824e96d0 T amdgpio_intr_enable +ffffffff824e9750 T amdgpio_intr_disable +ffffffff824e97d0 T amdgpio_save +ffffffff824e9850 T amdgpio_restore +ffffffff824e98e0 T amdgpio_save_pin +ffffffff824e9950 T amdgpio_restore_pin +ffffffff824e99c0 T amdgpio_pin_intr +ffffffff824ea000 T acpihid_match +ffffffff824ea020 T acpihid_attach +ffffffff824ea200 T acpihid_init_dsm +ffffffff824ea360 T acpihid_eval +ffffffff824ea580 T acpihid_notify +ffffffff824ea5e0 T acpihid_button_array_enable +ffffffff824eb000 T acpi_match +ffffffff824eb060 T acpi_attach +ffffffff824eb0a0 T acpi_probe +ffffffff824eb240 T acpi_map +ffffffff824eb330 T acpi_unmap +ffffffff824eb370 T acpi_bus_space_map +ffffffff824eb390 T acpi_bus_space_unmap +ffffffff824eb3a0 T acpi_intr_establish +ffffffff824eb4e0 T acpi_intr_disestablish +ffffffff824eb4f0 T acpi_scan +ffffffff824eb6a0 T acpi_acquire_glk +ffffffff824eb700 T acpi_release_glk +ffffffff824eb750 T acpi_attach_machdep +ffffffff824eb8e0 T acpi_sleep_cpu +ffffffff824eba80 T acpi_resume_cpu +ffffffff824ebb70 T sleep_mp +ffffffff824ebc70 T resume_mp +ffffffff824ebd60 T acpi_iommu_device_map +ffffffff824ec000 T hibernate_resume_machdep +ffffffff824ec050 T hibernate_drop_to_real_mode +ffffffff824ec060 T hibernate_activate_resume_pt_machdep +ffffffff824ec0a0 T hibernate_switch_stack_machdep +ffffffff824ec0e0 T hibernate_flush +ffffffff824ec110 T acpi_savecpu +ffffffff824ed000 T sleep_showstate +ffffffff824ed100 T sleep_setstate +ffffffff824ed160 T gosleep +ffffffff824ed220 T sleep_abort +ffffffff824ed250 T sleep_resume +ffffffff824ed2c0 T suspend_finish +ffffffff824ee000 T acpipci_match +ffffffff824ee020 T acpipci_attach +ffffffff824ee2e0 T acpipci_osc +ffffffff824ee420 T acpipci_parse_resources +ffffffff824ee530 T acpipci_attach_bus +ffffffff824ee700 T acpipci_print +ffffffff824ee760 T acpipci_attach_busses +ffffffff824ef000 T efiopen +ffffffff824ef040 T eficlose +ffffffff824ef070 T efiioctl +ffffffff824ef110 T efiioc_get_table +ffffffff824ef270 T efiioc_var_get +ffffffff824ef4e0 T efiioc_var_next +ffffffff824ef700 T efiioc_var_set +ffffffff824ef990 T efi_adapt_error +ffffffff824f0000 T efi_match +ffffffff824f0060 T efi_attach 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vcpu_writeregs_vmx +ffffffff824f3c30 T vcpu_readregs_svm +ffffffff824f40d0 T vcpu_writeregs_svm +ffffffff824f4590 T vmm_get_guest_memtype +ffffffff824f4610 T vmx_mprotect_ept +ffffffff824f4880 T vmx_pmap_find_pte_ept +ffffffff824f4950 T start_vmm_on_cpu +ffffffff824f4a20 T stop_vmm_on_cpu +ffffffff824f4ac0 T vmclear_on_cpu +ffffffff824f4b30 T vm_create_check_mem_ranges +ffffffff824f4c90 T vm_impl_init +ffffffff824f4d30 T vm_teardown +ffffffff824f4ee0 T vcpu_init +ffffffff824f4fb0 T vm_impl_init_vmx +ffffffff824f50d0 T vm_impl_init_svm +ffffffff824f51f0 T vm_impl_deinit_vmx +ffffffff824f5220 T vm_impl_deinit_svm +ffffffff824f5250 T vm_impl_deinit +ffffffff824f52b0 T vcpu_reload_vmcs_vmx +ffffffff824f53e0 T vcpu_reset_regs_svm +ffffffff824f5780 T svm_setmsrbrw +ffffffff824f58f0 T svm_setmsrbr +ffffffff824f59c0 T vmm_alloc_vpid +ffffffff824f5ad0 T svm_setmsrbw +ffffffff824f5ba0 T vmx_setmsrbr +ffffffff824f5c50 T vmx_setmsrbw +ffffffff824f5d00 T vmx_setmsrbrw +ffffffff824f5e00 T svm_set_clean +ffffffff824f5e50 T svm_set_dirty +ffffffff824f5ea0 T vcpu_reset_regs_vmx +ffffffff824f69f0 T vcpu_vmx_check_cap +ffffffff824f6af0 T vcpu_vmx_compute_ctrl +ffffffff824f6cd0 T vcpu_init_vmx +ffffffff824f7070 T vcpu_deinit_vmx +ffffffff824f71f0 T vcpu_init_svm +ffffffff824f7370 T vcpu_deinit_svm +ffffffff824f74b0 T vmm_free_vpid +ffffffff824f7510 T vcpu_deinit +ffffffff824f7560 T vcpu_run_vmx +ffffffff824f7d70 T vcpu_run_svm +ffffffff824f8350 T vcpu_must_stop +ffffffff824f83b0 T vmm_fpurestore +ffffffff824f8480 T vmm_fpusave +ffffffff824f8500 T vmm_translate_gva +ffffffff824f8830 T vmm_update_pvclock +ffffffff824f8930 T vmx_get_exit_info +ffffffff824f8990 T vmx_handle_exit +ffffffff824f8d80 T vmx_instruction_error_decode +ffffffff824f8f50 T vmm_get_guest_cpu_cpl +ffffffff824f9000 T vmx_handle_intr +ffffffff824f9090 T svm_handle_hlt +ffffffff824f90e0 T vmx_handle_hlt +ffffffff824f9190 T svm_handle_exit +ffffffff824f9460 T svm_handle_np_fault +ffffffff824f9600 T vmm_handle_cpuid +ffffffff824f9c70 T svm_handle_msr +ffffffff824f9f20 T svm_handle_xsetbv +ffffffff824f9f70 T svm_handle_inout +ffffffff824fa080 T vmm_inject_ud +ffffffff824fa0b0 T vmm_inject_db +ffffffff824fa0e0 T vmx_handle_np_fault +ffffffff824fa250 T vmx_handle_inout +ffffffff824fa3f0 T vmx_handle_cr +ffffffff824fa660 T vmx_handle_rdmsr +ffffffff824fa730 T vmx_handle_wrmsr +ffffffff824fa980 T vmx_handle_xsetbv +ffffffff824faa10 T vmm_inject_gp +ffffffff824faa40 T vmx_get_exit_qualification +ffffffff824faaa0 T vmx_get_guest_faulttype +ffffffff824fab40 T svm_get_guest_faulttype +ffffffff824fab70 T svm_fault_page +ffffffff824fabf0 T vmx_fault_page +ffffffff824fad50 T vmm_get_guest_cpu_mode +ffffffff824fae50 T vmx_load_pdptes +ffffffff824fb0d0 T vmx_handle_cr0_write +ffffffff824fb2d0 T vmx_handle_cr4_write +ffffffff824fb370 T vmm_handle_xsetbv +ffffffff824fb450 T vmx_handle_misc_enable_msr +ffffffff824fb4b0 T vmm_pat_is_valid +ffffffff824fb590 T vmm_gpa_is_valid +ffffffff824fb600 T vmx_exit_reason_decode +ffffffff824fb640 T svm_exit_reason_decode +ffffffff824fc450 T vcpu_state_decode +ffffffff824fd000 T vmm_dispatch_intr +ffffffff824fd019 T vmxon +ffffffff824fd049 T vmxoff +ffffffff824fd079 T vmclear +ffffffff824fd0a9 T vmptrld +ffffffff824fd0d9 T vmptrst +ffffffff824fd109 T vmwrite +ffffffff824fd139 T vmread +ffffffff824fd169 T invvpid +ffffffff824fd199 T invept +ffffffff824fd1c9 T vmx_enter_guest +ffffffff824fd1f0 t skip_init +ffffffff824fd2bd t no_l1df_msr +ffffffff824fd2c0 t l1df_tlb_loop +ffffffff824fd2d9 t l1df_tlb_done +ffffffff824fd2e1 t l1df_load_cache +ffffffff824fd2f8 t done_flush +ffffffff824fd38b t do_resume +ffffffff824fd410 t fail_launch_or_resume +ffffffff824fd44d t fail_launch_unknown +ffffffff824fd45a t fail_launch_invalid_vmcs +ffffffff824fd467 t fail_launch_valid_vmcs +ffffffff824fd484 t vmx_exit_handler_asm +ffffffff824fd549 t restore_host +ffffffff824fd5e9 T svm_enter_guest +ffffffff824fd775 t restore_host_svm +ffffffff824fe000 T sdmmc_match +ffffffff824fe050 T sdmmc_attach +ffffffff824fe380 T sdmmc_detach +ffffffff824fe430 T sdmmc_activate +ffffffff824fe500 T sdmmc_discover_task +ffffffff824fe5c0 T sdmmc_create_thread +ffffffff824fe630 T sdmmc_holds_root_device +ffffffff824fe680 T sdmmc_task_thread +ffffffff824fe870 T sdmmc_needs_discover +ffffffff824fe920 T sdmmc_del_task +ffffffff824fe9d0 T sdmmc_card_detach +ffffffff824feab0 T sdmmc_add_task +ffffffff824feb30 T sdmmc_card_attach +ffffffff824fec40 T sdmmc_enable +ffffffff824fed90 T sdmmc_scan +ffffffff824fee10 T sdmmc_init +ffffffff824fef10 T sdmmc_disable +ffffffff824ff070 T sdmmc_function_free +ffffffff824ff090 T sdmmc_delay +ffffffff824ff0e0 T sdmmc_select_card +ffffffff824ff260 T sdmmc_set_bus_power +ffffffff824ff420 T sdmmc_function_alloc +ffffffff824ff4a0 T sdmmc_app_command +ffffffff824ff630 T sdmmc_mmc_command +ffffffff824ff6b0 T sdmmc_go_idle_state +ffffffff824ff7c0 T sdmmc_send_if_cond +ffffffff824ff910 T sdmmc_set_relative_addr +ffffffff82500000 T sdmmc_cisptr +ffffffff825000a0 T sdmmc_read_cis +ffffffff825003a0 T sdmmc_print_cis +ffffffff82500510 T sdmmc_check_cis_quirks +ffffffff82501000 T sdmmc_io_enable +ffffffff825012a0 T sdmmc_io_reset +ffffffff825013c0 T sdmmc_io_send_op_cond +ffffffff82501530 T sdmmc_io_scan +ffffffff82501680 T sdmmc_io_init +ffffffff825017a0 T sdmmc_io_set_highspeed +ffffffff82501a40 T sdmmc_io_set_bus_width +ffffffff82501cd0 T sdmmc_io_function_ready +ffffffff82501e40 T sdmmc_io_read_1 +ffffffff82501f90 T sdmmc_io_function_enable +ffffffff82502360 T sdmmc_io_write_1 +ffffffff825024e0 T sdmmc_io_function_disable +ffffffff82502760 T sdmmc_io_attach +ffffffff82502840 T sdmmc_print +ffffffff82502a90 T sdmmc_submatch +ffffffff82502b10 T sdmmc_io_detach +ffffffff82502bb0 T sdmmc_io_rw_direct +ffffffff82502d50 T sdmmc_io_rw_extended_subr +ffffffff82502ef0 T sdmmc_io_rw_extended +ffffffff825032e0 T sdmmc_io_read_2 +ffffffff82503430 T sdmmc_io_write_2 +ffffffff82503590 T sdmmc_io_read_4 +ffffffff825036e0 T sdmmc_io_write_4 +ffffffff82503840 T sdmmc_io_read_multi_1 +ffffffff82503930 T sdmmc_io_write_multi_1 +ffffffff82503a20 T sdmmc_io_read_region_1 +ffffffff82503b10 T sdmmc_io_write_region_1 +ffffffff82503c00 T sdmmc_io_xchg +ffffffff82503d90 T sdmmc_intr_enable +ffffffff82504000 T sdmmc_intr_disable +ffffffff82504270 T sdmmc_intr_establish +ffffffff82504370 T sdmmc_intr_disestablish +ffffffff82504450 T sdmmc_card_intr +ffffffff825044a0 T sdmmc_intr_task +ffffffff82504530 T sdmmc_io_set_blocklen +ffffffff82505000 T sdmmc_mem_enable +ffffffff825054e0 T sdmmc_mem_send_op_cond +ffffffff82505690 T sdmmc_mem_signal_voltage +ffffffff82505750 T sdmmc_mem_scan +ffffffff82505a50 T sdmmc_decode_csd +ffffffff82505e50 T sdmmc_decode_cid +ffffffff82506290 T sdmmc_mem_send_scr +ffffffff825063d0 T sdmmc_mem_decode_scr +ffffffff82506440 T sdmmc_mem_send_cxd_data +ffffffff825065b0 T sdmmc_mem_set_bus_width +ffffffff825066c0 T sdmmc_mem_sd_switch +ffffffff82506970 T sdmmc_be512_to_bitfield512 +ffffffff82506a20 T sdmmc_mem_mmc_switch +ffffffff82506b10 T sdmmc_mem_init +ffffffff82506c60 T sdmmc_mem_set_blocklen +ffffffff82506d60 T sdmmc_mem_sd_init +ffffffff82507310 T sdmmc_mem_mmc_init +ffffffff82507c30 T sdmmc_mem_select_transfer_mode +ffffffff82507cb0 T sdmmc_mem_execute_tuning +ffffffff82507d40 T sdmmc_mem_read_block_subr +ffffffff825080a0 T sdmmc_mem_single_read_block +ffffffff82508160 T sdmmc_mem_read_block +ffffffff82508320 T sdmmc_mem_write_block_subr +ffffffff82508670 T sdmmc_mem_single_write_block +ffffffff82508730 T sdmmc_mem_write_block +ffffffff825088f0 T sdmmc_mem_hibernate_write +ffffffff82509000 T sdmmc_scsi_cmd +ffffffff825091f0 T sdmmc_minphys +ffffffff82509260 T sdmmc_scsi_attach +ffffffff82509450 T sdmmc_alloc_ccbs +ffffffff82509590 T sdmmc_free_ccbs +ffffffff825095f0 T sdmmc_scsi_detach +ffffffff82509740 T sdmmc_stimeout +ffffffff825097c0 T sdmmc_ccb_alloc +ffffffff82509870 T sdmmc_ccb_free +ffffffff82509950 T sdmmc_inquiry +ffffffff82509b70 T sdmmc_start_xs +ffffffff82509c60 T sdmmc_complete_xs +ffffffff82509d20 T sdmmc_done_xs +ffffffff82509d60 T sdmmc_scsi_hibernate_io +ffffffff8250a000 T bwfm_sdio_preinit +ffffffff8250a4f0 T bwfm_sdio_txcheck +ffffffff8250a530 T bwfm_sdio_txdata +ffffffff8250a5a0 T bwfm_sdio_txctl +ffffffff8250a6f0 T bwfm_sdio_buscore_read +ffffffff8250a700 T bwfm_sdio_buscore_write +ffffffff8250a710 T bwfm_sdio_buscore_prepare +ffffffff8250a840 T bwfm_sdio_buscore_activate +ffffffff8250a8c0 T bwfm_sdio_match +ffffffff8250a980 T bwfm_sdio_attach +ffffffff8250ac40 T bwfm_sdio_detach +ffffffff8250aca0 T bwfm_sdio_task +ffffffff8250adf0 T bwfm_sdio_write_1 +ffffffff8250ae20 T bwfm_sdio_read_1 +ffffffff8250ae50 T bwfm_sdio_write_4 +ffffffff8250af00 T bwfm_sdio_read_4 +ffffffff8250afa0 T bwfm_sdio_load_microcode +ffffffff8250b200 T bwfm_sdio_clkctl +ffffffff8250b330 T bwfm_sdio_dev_write +ffffffff8250b370 T bwfm_sdio_intr +ffffffff8250b3b0 T bwfm_sdio_ram_read_write +ffffffff8250b5e0 T bwfm_sdio_htclk +ffffffff8250b840 T bwfm_sdio_readshared +ffffffff8250b900 T bwfm_sdio_dev_read +ffffffff8250b930 T bwfm_sdio_rx_frames +ffffffff8250bcc0 T bwfm_sdio_tx_frames +ffffffff8250bda0 T bwfm_sdio_backplane +ffffffff8250be50 T bwfm_sdio_buf_read +ffffffff8250bf20 T bwfm_sdio_buf_write +ffffffff8250bfd0 T bwfm_sdio_frame_read_write +ffffffff8250c150 T bwfm_sdio_newbuf +ffffffff8250c1d0 T bwfm_sdio_tx_ok +ffffffff8250c220 T bwfm_sdio_tx_ctrlframe +ffffffff8250c320 T bwfm_sdio_tx_dataframe +ffffffff8250c470 T bwfm_sdio_rx_glom +ffffffff8250d000 T onewire_match +ffffffff8250d050 T onewire_attach +ffffffff8250d0f0 T onewire_detach +ffffffff8250d160 T onewire_activate +ffffffff8250d180 T onewire_scan +ffffffff8250d390 T onewire_createthread +ffffffff8250d3f0 T onewire_print +ffffffff8250d4c0 T onewirebus_print +ffffffff8250d510 T onewire_lock +ffffffff8250d530 T onewire_unlock +ffffffff8250d540 T onewire_reset +ffffffff8250d560 T onewire_bit +ffffffff8250d580 T onewire_read_byte +ffffffff8250d6c0 T onewire_write_byte +ffffffff8250d790 T onewire_read_block +ffffffff8250d830 T onewire_write_block +ffffffff8250d8d0 T onewire_triplet +ffffffff8250d9b0 T onewire_matchrom +ffffffff8250db00 T onewire_search +ffffffff8250de90 T onewire_thread +ffffffff8250e000 T onewire_crc +ffffffff8250e0e0 T onewire_crc16 +ffffffff8250e1c0 T onewire_famname +ffffffff8250e200 T onewire_matchbyfam +ffffffff8250f000 T owid_match +ffffffff8250f020 T owid_attach +ffffffff8250f0f0 T owid_detach +ffffffff8250f130 T owid_activate +ffffffff82510000 T owsbm_match +ffffffff82510020 T owsbm_attach +ffffffff825101c0 T owsbm_detach +ffffffff82510230 T owsbm_activate +ffffffff82510260 T owsbm_update +ffffffff82511000 T owtemp_match +ffffffff82511020 T owtemp_attach +ffffffff82511110 T owtemp_detach +ffffffff82511180 T owtemp_activate +ffffffff825111b0 T owtemp_update +ffffffff82512000 T owctr_match +ffffffff82512020 T owctr_attach +ffffffff82512160 T owctr_detach +ffffffff825121d0 T owctr_activate +ffffffff82512200 T owctr_update +ffffffff82512230 T owctr_update_counter +ffffffff82513000 A __text_page_start +ffffffff82513000 T Xsyscall_meltdown +ffffffff8251300c T Xsyscall +ffffffff8251326e t Xsyscall_trampback +ffffffff82513280 T intr_user_exit +ffffffff825132c2 t intr_user_exit_post_ast +ffffffff825133ee t Xiretq_trampback +ffffffff825133fa T doreti_iret +ffffffff82514000 T alltraps +ffffffff82514138 T recall_trap +ffffffff82514150 T alltraps_kern +ffffffff82514153 T alltraps_kern_meltdown +ffffffff82515000 ? Xsyscall32 +ffffffff82515000 A __kutext_start +ffffffff82515000 A __text_page_end +ffffffff82516000 ? Xtrap00 +ffffffff82516010 ? Xtrap01 +ffffffff82516020 ? Xtrap02 +ffffffff82516024 c calltrap_specstk +ffffffff825160f0 ? calltrap_specstk_tramp +ffffffff82516110 ? Xtrap03 +ffffffff82516120 ? Xtrap04 +ffffffff82516130 ? Xtrap05 +ffffffff82516140 ? Xtrap06 +ffffffff82516150 ? Xtrap07 +ffffffff82516160 ? Xtrap08 +ffffffff82516170 ? Xtrap09 +ffffffff82516180 ? Xtrap0a +ffffffff82516190 ? Xtrap0b +ffffffff825161a0 ? Xtrap0c +ffffffff825161b0 ? Xtrap0d +ffffffff82516230 ? Xtrap0e +ffffffff82516240 ? Xintrspurious +ffffffff82516240 ? Xtrap0f +ffffffff82516250 ? Xtrap10 +ffffffff82516260 ? Xtrap11 +ffffffff82516270 ? Xtrap12 +ffffffff82516280 ? Xtrap13 +ffffffff82516290 ? Xtrap14 +ffffffff82516290 ? Xtrap15 +ffffffff82516290 ? Xtrap16 +ffffffff82516290 ? Xtrap17 +ffffffff82516290 ? Xtrap18 +ffffffff82516290 ? Xtrap19 +ffffffff82516290 ? Xtrap1a +ffffffff82516290 ? Xtrap1b +ffffffff82516290 ? Xtrap1c +ffffffff82516290 ? Xtrap1d +ffffffff82516290 ? Xtrap1e +ffffffff82516290 ? Xtrap1f +ffffffff825162a0 ? x2apic_eoi +ffffffff825162c0 ? Xintr_lapic_ipi +ffffffff825162f0 ? Xipi_invltlb +ffffffff82516310 ? Xipi_invlpg +ffffffff82516340 ? Xipi_invlrange +ffffffff82516380 ? Xipi_invltlb_pcid +ffffffff825163c0 ? Xipi_invlpg_pcid +ffffffff82516410 ? Xipi_invlrange_pcid +ffffffff82516480 ? Xintr_lapic_ltimer +ffffffff825164b0 ? Xintr_xen_upcall +ffffffff825164e0 ? Xintr_hyperv_upcall +ffffffff82516510 ? Xintr_legacy0 +ffffffff82516540 ? Xintr_legacy1 +ffffffff82516570 ? Xintr_legacy2 +ffffffff825165a0 ? Xintr_legacy3 +ffffffff825165d0 ? Xintr_legacy4 +ffffffff82516600 ? Xintr_legacy5 +ffffffff82516630 ? Xintr_legacy6 +ffffffff82516660 ? Xintr_legacy7 +ffffffff82516690 ? Xintr_legacy8 +ffffffff825166c0 ? Xintr_legacy9 +ffffffff825166f0 ? Xintr_legacy10 +ffffffff82516720 ? Xintr_legacy11 +ffffffff82516750 ? Xintr_legacy12 +ffffffff82516780 ? Xintr_legacy13 +ffffffff825167b0 ? Xintr_legacy14 +ffffffff825167e0 ? Xintr_legacy15 +ffffffff82516810 ? Xintr_ioapic_edge0 +ffffffff82516840 ? Xintr_ioapic_edge1 +ffffffff82516870 ? Xintr_ioapic_edge2 +ffffffff825168a0 ? Xintr_ioapic_edge3 +ffffffff825168d0 ? Xintr_ioapic_edge4 +ffffffff82516900 ? Xintr_ioapic_edge5 +ffffffff82516930 ? Xintr_ioapic_edge6 +ffffffff82516960 ? Xintr_ioapic_edge7 +ffffffff82516990 ? Xintr_ioapic_edge8 +ffffffff825169c0 ? Xintr_ioapic_edge9 +ffffffff825169f0 ? Xintr_ioapic_edge10 +ffffffff82516a20 ? Xintr_ioapic_edge11 +ffffffff82516a50 ? Xintr_ioapic_edge12 +ffffffff82516a80 ? Xintr_ioapic_edge13 +ffffffff82516ab0 ? Xintr_ioapic_edge14 +ffffffff82516ae0 ? Xintr_ioapic_edge15 +ffffffff82516b10 ? Xintr_ioapic_edge16 +ffffffff82516b40 ? Xintr_ioapic_edge17 +ffffffff82516b70 ? Xintr_ioapic_edge18 +ffffffff82516ba0 ? Xintr_ioapic_edge19 +ffffffff82516bd0 ? Xintr_ioapic_edge20 +ffffffff82516c00 ? Xintr_ioapic_edge21 +ffffffff82516c30 ? Xintr_ioapic_edge22 +ffffffff82516c60 ? Xintr_ioapic_edge23 +ffffffff82516c90 ? Xintr_ioapic_edge24 +ffffffff82516cc0 ? Xintr_ioapic_edge25 +ffffffff82516cf0 ? Xintr_ioapic_edge26 +ffffffff82516d20 ? Xintr_ioapic_edge27 +ffffffff82516d50 ? Xintr_ioapic_edge28 +ffffffff82516d80 ? Xintr_ioapic_edge29 +ffffffff82516db0 ? Xintr_ioapic_edge30 +ffffffff82516de0 ? Xintr_ioapic_edge31 +ffffffff82516e10 ? Xintr_ioapic_edge32 +ffffffff82516e40 ? Xintr_ioapic_edge33 +ffffffff82516e70 ? Xintr_ioapic_edge34 +ffffffff82516ea0 ? Xintr_ioapic_edge35 +ffffffff82516ed0 ? Xintr_ioapic_edge36 +ffffffff82516f00 ? Xintr_ioapic_edge37 +ffffffff82516f30 ? Xintr_ioapic_edge38 +ffffffff82516f60 ? Xintr_ioapic_edge39 +ffffffff82516f90 ? Xintr_ioapic_edge40 +ffffffff82516fc0 ? Xintr_ioapic_edge41 +ffffffff82516ff0 ? Xintr_ioapic_edge42 +ffffffff82517020 ? Xintr_ioapic_edge43 +ffffffff82517050 ? Xintr_ioapic_edge44 +ffffffff82517080 ? Xintr_ioapic_edge45 +ffffffff825170b0 ? Xintr_ioapic_edge46 +ffffffff825170e0 ? Xintr_ioapic_edge47 +ffffffff82517110 ? Xintr_ioapic_edge48 +ffffffff82517140 ? Xintr_ioapic_edge49 +ffffffff82517170 ? Xintr_ioapic_edge50 +ffffffff825171a0 ? Xintr_ioapic_edge51 +ffffffff825171d0 ? Xintr_ioapic_edge52 +ffffffff82517200 ? Xintr_ioapic_edge53 +ffffffff82517230 ? Xintr_ioapic_edge54 +ffffffff82517260 ? Xintr_ioapic_edge55 +ffffffff82517290 ? Xintr_ioapic_edge56 +ffffffff825172c0 ? Xintr_ioapic_edge57 +ffffffff825172f0 ? Xintr_ioapic_edge58 +ffffffff82517320 ? Xintr_ioapic_edge59 +ffffffff82517350 ? Xintr_ioapic_edge60 +ffffffff82517380 ? Xintr_ioapic_edge61 +ffffffff825173b0 ? Xintr_ioapic_edge62 +ffffffff825173e0 ? Xintr_ioapic_edge63 +ffffffff82517410 ? Xintr_ioapic_level0 +ffffffff82517440 ? Xintr_ioapic_level1 +ffffffff82517470 ? Xintr_ioapic_level2 +ffffffff825174a0 ? Xintr_ioapic_level3 +ffffffff825174d0 ? Xintr_ioapic_level4 +ffffffff82517500 ? Xintr_ioapic_level5 +ffffffff82517530 ? Xintr_ioapic_level6 +ffffffff82517560 ? Xintr_ioapic_level7 +ffffffff82517590 ? Xintr_ioapic_level8 +ffffffff825175c0 ? Xintr_ioapic_level9 +ffffffff825175f0 ? Xintr_ioapic_level10 +ffffffff82517620 ? Xintr_ioapic_level11 +ffffffff82517650 ? Xintr_ioapic_level12 +ffffffff82517680 ? Xintr_ioapic_level13 +ffffffff825176b0 ? Xintr_ioapic_level14 +ffffffff825176e0 ? Xintr_ioapic_level15 +ffffffff82517710 ? Xintr_ioapic_level16 +ffffffff82517740 ? Xintr_ioapic_level17 +ffffffff82517770 ? Xintr_ioapic_level18 +ffffffff825177a0 ? Xintr_ioapic_level19 +ffffffff825177d0 ? Xintr_ioapic_level20 +ffffffff82517800 ? Xintr_ioapic_level21 +ffffffff82517830 ? Xintr_ioapic_level22 +ffffffff82517860 ? Xintr_ioapic_level23 +ffffffff82517890 ? Xintr_ioapic_level24 +ffffffff825178c0 ? Xintr_ioapic_level25 +ffffffff825178f0 ? Xintr_ioapic_level26 +ffffffff82517920 ? Xintr_ioapic_level27 +ffffffff82517950 ? Xintr_ioapic_level28 +ffffffff82517980 ? Xintr_ioapic_level29 +ffffffff825179b0 ? Xintr_ioapic_level30 +ffffffff825179e0 ? Xintr_ioapic_level31 +ffffffff82517a10 ? Xintr_ioapic_level32 +ffffffff82517a40 ? Xintr_ioapic_level33 +ffffffff82517a70 ? Xintr_ioapic_level34 +ffffffff82517aa0 ? Xintr_ioapic_level35 +ffffffff82517ad0 ? Xintr_ioapic_level36 +ffffffff82517b00 ? Xintr_ioapic_level37 +ffffffff82517b30 ? Xintr_ioapic_level38 +ffffffff82517b60 ? Xintr_ioapic_level39 +ffffffff82517b90 ? Xintr_ioapic_level40 +ffffffff82517bc0 ? Xintr_ioapic_level41 +ffffffff82517bf0 ? Xintr_ioapic_level42 +ffffffff82517c20 ? Xintr_ioapic_level43 +ffffffff82517c50 ? Xintr_ioapic_level44 +ffffffff82517c80 ? Xintr_ioapic_level45 +ffffffff82517cb0 ? Xintr_ioapic_level46 +ffffffff82517ce0 ? Xintr_ioapic_level47 +ffffffff82517d10 ? Xintr_ioapic_level48 +ffffffff82517d40 ? Xintr_ioapic_level49 +ffffffff82517d70 ? Xintr_ioapic_level50 +ffffffff82517da0 ? Xintr_ioapic_level51 +ffffffff82517dd0 ? Xintr_ioapic_level52 +ffffffff82517e00 ? Xintr_ioapic_level53 +ffffffff82517e30 ? Xintr_ioapic_level54 +ffffffff82517e60 ? Xintr_ioapic_level55 +ffffffff82517e90 ? Xintr_ioapic_level56 +ffffffff82517ec0 ? Xintr_ioapic_level57 +ffffffff82517ef0 ? Xintr_ioapic_level58 +ffffffff82517f20 ? Xintr_ioapic_level59 +ffffffff82517f50 ? Xintr_ioapic_level60 +ffffffff82517f80 ? Xintr_ioapic_level61 +ffffffff82517fb0 ? Xintr_ioapic_level62 +ffffffff82517fe0 ? Xintr_ioapic_level63 +ffffffff82519000 ? codepatch_fill_nop +ffffffff82519000 A __cptext_start +ffffffff82519000 A __kutext_end +ffffffff825190b0 ? codepatch_maprw +ffffffff82519190 ? codepatch_unmaprw +ffffffff825191f0 ? codepatch_nop +ffffffff82519340 ? codepatch_replace +ffffffff825194e0 ? codepatch_call +ffffffff82519500 ? codepatch_jmp +ffffffff8251a000 A __cptext_end +ffffffff8251a000 A __rodata_start +ffffffff8251a000 C _etext +ffffffff8251a000 C etext +ffffffff8251b000 r seeprom_read +ffffffff8251b004 r icl_mg_pll_find_divisors.div1_vals +ffffffff8251b028 r gen9bc_tgp_ddc_pin_map +ffffffff8251b038 r athn_ac2qid +ffffffff8251b038 r athn_ac2qid +ffffffff8251b038 r athn_ac2qid +ffffffff8251b044 r rtwn_get_rssi.cckoff +ffffffff8251b06c r rsu_ac2qid +ffffffff8251b07c r pckbc_portcmd +ffffffff8251b080 r tht_fifo_write_pad.pad +ffffffff8251b088 r rsu_get_rssi.cckoff +ffffffff8251b09c r adlp_n_revids +ffffffff8251b0ec r apple_iso_trans +ffffffff8251b0f0 r dg2_g12_revid_step_tbl +ffffffff8251b0f8 r wihap_check_tx.txratetable +ffffffff8251b0fc r dmamode +ffffffff8251b124 r gen9_edram_size_mb.sets +ffffffff8251c000 r isomappings +ffffffff8251c080 r unimappings +ffffffff8251c230 r replacements +ffffffff8251fb09 r cmd0646_9_tim_udma +ffffffff825730a6 r pp_r600_decoded_lanes +ffffffff8258e2e5 r cmd680_setup_channel.udma_tbl +ffffffff82595ecc r apollo_udma33_tim +ffffffff8259bf6f r substchar +ffffffff8259e015 r apollo_udma100_tim +ffffffff825c584e r apollo_udma66_tim +ffffffff825ccc76 r apollo_pio_rec +ffffffff825dbf12 r cy_pio_rec +ffffffff8260b1cd r apollo_udma133_tim +ffffffff82617c58 R drm_ca +ffffffff82617c80 R drm_filtops +ffffffff82617cb0 R drmread_filtops +ffffffff82618000 r vga_emulops +ffffffff82618048 R vga_stdscreen +ffffffff82618078 R vga_stdscreen_mono +ffffffff826180a8 R vga_stdscreen_bf +ffffffff826180d8 R vga_40lscreen +ffffffff82618108 R vga_40lscreen_mono +ffffffff82618138 R vga_40lscreen_bf +ffffffff82618168 R vga_50lscreen +ffffffff82618198 R vga_50lscreen_mono +ffffffff826181c8 R vga_50lscreen_bf +ffffffff826181f8 R vga_screenlist +ffffffff82618208 R vga_screenlist_mono +ffffffff82618218 R vga_accessops +ffffffff82618278 r i945_wm_info +ffffffff826182b0 r bgansitopc +ffffffff826182b8 r pctoansi +ffffffff826182f8 r sdma_offsets +ffffffff826182f8 r sdma_offsets +ffffffff82618328 r iha_rate_tbl +ffffffff82618360 r i830_a_wm_info +ffffffff82618398 r gen9_edram_size_mb.ways +ffffffff82618400 r aggr_periodic_times +ffffffff82618480 r jsl_ehl_revids +ffffffff826184f8 r michael_final.pad +ffffffff82618520 r rt_copysa.maskarray +ffffffff82618528 r i915_wm_info +ffffffff82618530 r amdgpu_ih_clientid_jpeg +ffffffff82618530 r amdgpu_ih_clientid_uvds +ffffffff82618530 r amdgpu_ih_clientid_vcns +ffffffff82618530 r amdgpu_ih_clientid_vcns +ffffffff82618530 r amdgpu_ih_clientid_vcns +ffffffff82618568 r vga_setfontset.cmaptabb +ffffffff82618580 r tgl_revids +ffffffff826185d8 r i830_bc_wm_info +ffffffff82618680 r __drm_universal_plane_init.default_modifiers +ffffffff82618690 r iwn_tid2fifo +ffffffff826186a8 r vga_setfontset.cmaptaba +ffffffff826186b0 r crtc_offsets +ffffffff826186b0 r crtc_offsets +ffffffff826186b0 r crtc_offsets +ffffffff826186d0 r link_speed +ffffffff826186d0 r link_speed +ffffffff826186d0 r link_speed +ffffffff82618748 r rtwn_r88e_get_rssi.cckoff +ffffffff82619000 R edid_vendors +ffffffff826192c0 R edid_nvendors +ffffffff826192d0 R edid_products +ffffffff82619330 R edid_nproducts +ffffffff82619340 r _edid_modes +ffffffff8261a000 R videomode_list +ffffffff8261b080 R videomode_count +ffffffff8261c000 r ahc_hard_errors +ffffffff8261c080 r critical_sections +ffffffff8261c0b0 r patches +ffffffff8261cd50 r seqprog +ffffffff8261e000 r ahc_switch +ffffffff8261f000 r termstat_strings +ffffffff8261f020 r critical_sections +ffffffff8261f060 r seqprog +ffffffff8261fd50 r patches +ffffffff82621000 r ahd_switch +ffffffff82622000 R aic_switch +ffffffff82623000 R adw_switch +ffffffff82624000 R gdt_switch +ffffffff82625000 R twe_switch +ffffffff82626000 R ciss_switch +ffffffff82626030 R ciss_level +ffffffff82626050 R ciss_stat +ffffffff82627000 R ami_switch +ffffffff82627028 R ami_raw_switch +ffffffff82628000 R mfi_switch +ffffffff82628028 R mfi_pd_switch +ffffffff82628050 r mfi_iop_xscale +ffffffff82628080 r mfi_iop_ppc +ffffffff826280b0 r mfi_iop_gen2 +ffffffff826280e0 r mfi_iop_skinny +ffffffff82628110 r mfi_bbu_indicators +ffffffff826281c0 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs +ffffffff826281f0 r chv_oa_mux_regs +ffffffff82628210 r fiji_clock_stretcher_lookup_table +ffffffff82628210 r tonga_clock_stretcher_lookup_table +ffffffff82628240 r link_speed +ffffffff82628240 r link_speed +ffffffff82628240 r link_speed +ffffffff82628280 r drm_fb_xfrm.default_dst_pitch +ffffffff82628280 r non_supported_protection +ffffffff82628380 r tgl_uy_revids +ffffffff826283d0 r bwi_phy_noise_11g_rev1 +ffffffff82628450 r cardslot_process_event.antonym_ev +ffffffff826284e0 r gen11_oa_mux_regs +ffffffff826285d0 r ddr2_cycle_tenths +ffffffff82628640 r rtw_intr_rx.ratetbl +ffffffff826286c0 r abm_config +ffffffff82628730 r getbootinfo.ports.30 +ffffffff82628780 r reg_offsets +ffffffff82628790 r bwi_rf_lo_measure_11g.rf_lo_adjust +ffffffff826287a0 r init_non_clock_fields.look_up +ffffffff826287b0 r uftdi_8u232am_getrate.roundoff +ffffffff82628800 r zyd_rx_data.rates +ffffffff82628810 r ieee80211_ra_valid_tx_mcs.max_mcs +ffffffff82628850 r mmio_invalidate_full.gen8_regs +ffffffff82628880 r bwi_phy_noise_11g +ffffffff82628890 r hpt366_pio +ffffffff826288c0 r glk_revids +ffffffff82628910 r bwi_rf_calc_nrssi_slope_11g.save_phy3_regs +ffffffff82628930 r ether_crc32_be_update.rev +ffffffff82628930 r rtw_grf5101_mac_crypt.caesar +ffffffff82628980 r snb_b_fdi_train_param +ffffffff82629000 R qlw_switch +ffffffff8262a000 R isp_2100_risc_code +ffffffff8263cbf0 R isp_2200_risc_code +ffffffff8264f990 R isp_2300_risc_code +ffffffff82669408 R qla_switch +ffffffff82669430 r qla_regs_2100 +ffffffff82669460 r qla_regs_2200 +ffffffff82669490 r qla_regs_23XX +ffffffff8266a000 R ahci_atascsi_methods +ffffffff8266b000 R nvme_switch +ffffffff8266b028 r nvme_ops +ffffffff8266c000 R mpi_switch +ffffffff8266c100 r intel_hpll_vco.elk_vco +ffffffff8266c160 r pin_offsets +ffffffff8266c1c0 r firmware_list +ffffffff8266c220 r atom_arg_shift +ffffffff8266c220 r atom_arg_shift +ffffffff8266c260 r pf_syncookie_wstab +ffffffff8266c280 r ieee80211_media_init.mopts +ffffffff8266c2e0 r add_entropy_words.twist_table +ffffffff8266c380 r urtw_8225v2_txpwr_cck +ffffffff8266c3c0 r bwfm_pci_prio2fifo +ffffffff8266c3c0 r ieee80211_up_to_ac.up_to_ac +ffffffff8266c480 r paritytab +ffffffff8266c480 r x86emu_parity_tab +ffffffff8266c4a0 r legacy_connector_convert +ffffffff8266c4e0 r gen7_oa_mux_regs +ffffffff8266c500 r hsw_oa_mux_regs +ffffffff8266c520 r notetab +ffffffff8266c540 r urtw_8225v2_txpwr_cck_ch14 +ffffffff8266c560 r bwi_rf_calibval.rf_calibvals +ffffffff8266c600 r pf_syncookie_msstab +ffffffff8266c660 r xgmi3x16_pcs_err_status_reg_aldebaran +ffffffff8266c6c0 r uath_wme_init.uath_wme_11g +ffffffff8266c6e0 r gen7_oa_b_counters +ffffffff8266c840 r icl_revids +ffffffff8266c900 r rtwn_iq_calib_run.reg_adda +ffffffff8266c940 r atom_def_dst +ffffffff8266c940 r atom_def_dst +ffffffff8266c980 r sha256_initial_hash_value +ffffffff8266c9e0 r otus_edca_def +ffffffff8266ca00 r intel_hpll_vco.blb_vco +ffffffff8266cac0 r epic_pci_subsys_info +ffffffff8266cae0 r atom_arg_mask +ffffffff8266cae0 r atom_arg_mask +ffffffff8266cb40 r butmap +ffffffff8266cb80 r GFX_RLC_SRM_INDEX_CNTL_DATA_OFFSETS +ffffffff8266cbc0 r comsoft.lsrmap +ffffffff8266cc00 r tulip_mii_phy_readspecific.table +ffffffff8266cc20 r kbl_revids +ffffffff8266cce0 r intel_hpll_vco.pnv_vco +ffffffff8266cd40 r dmapageport +ffffffff8266ce00 r intel_hpll_vco.ctg_vco +ffffffff8266cec0 r drm_calculate_luminance_range.pre_computed_values +ffffffff8266d000 R sili_atascsi_methods +ffffffff8266e000 R ncr53c9x_switch +ffffffff8266f000 r scf_period +ffffffff82670000 R siop_script +ffffffff826705a0 R lun_switch +ffffffff826705d0 R tag_switch +ffffffff82670660 R load_dsa +ffffffff826706c4 R siop_led_on +ffffffff826706cc R siop_led_off +ffffffff826706d8 R siop_switch +ffffffff82671000 R ep_vortex_media +ffffffff82671100 R ep_default_to_media +ffffffff82672000 R wi_card_ident +ffffffff82674000 R ucode_table +ffffffff82675000 r re_revisions +ffffffff82675290 r re_kstats_tpl +ffffffff82677000 R smc91cxx_media +ffffffff82677010 R smc91cxx_mii_bitbang_ops +ffffffff82678000 R dl10019_mii_bitbang_ops +ffffffff82678028 R dl10022_mii_bitbang_ops +ffffffff82679000 R ax88190_mii_bitbang_ops +ffffffff8267b000 R ac97_audio_default +ffffffff8267b020 R ac97_on_off +ffffffff8267b324 R ac97_mic_select +ffffffff8267b628 R ac97_mono_select +ffffffff8267b92c R ac97_source +ffffffff8267bc30 R ac97_volume_stereo +ffffffff8267bc4c R ac97_volume_mono +ffffffff8267bc70 R source_info +ffffffff8267c470 R ac97_ad +ffffffff8267c580 R ac97_ak +ffffffff8267c610 R ac97_av +ffffffff8267c750 R ac97_rl +ffffffff8267c7a0 R ac97_cm +ffffffff8267c820 R ac97_cr +ffffffff8267c840 R ac97_cs +ffffffff8267c920 R ac97_cx +ffffffff8267c980 R ac97_dt +ffffffff8267c9a0 R ac97_em +ffffffff8267c9d0 R ac97_es +ffffffff8267c9f0 R ac97_is +ffffffff8267ca10 R ac97_ic +ffffffff8267ca90 R ac97_it +ffffffff8267cac0 R ac97_ns +ffffffff8267cb80 R ac97_ps +ffffffff8267cbb0 R ac97_sl +ffffffff8267cbd0 R ac97_st +ffffffff8267cd20 R ac97_vi +ffffffff8267cd50 R ac97_tt +ffffffff8267cdd0 R ac97_ti +ffffffff8267cdf0 R ac97_wb +ffffffff8267ce10 R ac97_wo +ffffffff8267cea0 R ac97_ym +ffffffff8267cef0 R ac97_vendors +ffffffff8267d1f0 R ac97enhancement +ffffffff8267d2f0 R ac97feature +ffffffff8267e000 R lm_chips +ffffffff8267e020 R lm78_sensors +ffffffff8267e1a0 R w83627hf_sensors +ffffffff8267e3a0 R w83627ehf_sensors +ffffffff8267e5c0 R w83627dhg_sensors +ffffffff8267e7c0 R nct6776f_sensors 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intel_hpll_vco.cl_vco +ffffffff826a6020 r sgpr_init_compute_shader +ffffffff826a60d0 r trinity_override_mgpg_sequences +ffffffff826a6490 r vgpr_init_compute_shader +ffffffff826a6550 r voltage_swing_to_pre_emphasis +ffffffff826a7000 r malo_cmd_string.cmds +ffffffff826a70b0 r malo_cmd_string_result.results +ffffffff826a8000 R bwi_vendor_led_act +ffffffff826a800c R bwi_default_led_act +ffffffff826a8010 R bwi_led_duration +ffffffff826a8380 r bwi_sup_bphy +ffffffff826a83c0 r bwi_phy_freq_11g_rev1 +ffffffff826a85c0 r bwi_phy_rotor_11g_rev1 +ffffffff826a86a0 r bwi_phy_noise_scale_11g_rev2 +ffffffff826a86e0 r bwi_phy_noise_scale_11g_rev7 +ffffffff826a8720 r bwi_phy_noise_scale_11g +ffffffff826a8760 r bwi_phy_sigma_sq_11g_rev2 +ffffffff826a87d0 r bwi_phy_sigma_sq_11g_rev7 +ffffffff826a8840 r bwi_phy_delay_11g_rev1 +ffffffff826a8920 r bwi_rf_get_gains.save_phy_regs +ffffffff826a8940 r bwi_rf_lo_find.map +ffffffff826a8960 r bwi_txpower_map_11b +ffffffff826a89a0 r bwi_txpower_map_11g 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tc_vars +ffffffff826db000 r sys_gettimeofday.zerotz +ffffffff826dc000 r taskq_sys_name +ffffffff826dc006 r taskq_sys_mp_name +ffffffff826dc010 R systq +ffffffff826dc018 R systqmp +ffffffff826de000 r gpt_get_fstype.gpt_uuid_openbsd +ffffffff826de010 r gpt_get_fstype.gpt_uuid_msdos +ffffffff826de020 r gpt_get_fstype.gpt_uuid_chromerootfs +ffffffff826de030 r gpt_get_fstype.gpt_uuid_linux +ffffffff826de040 r gpt_get_fstype.gpt_uuid_hfs +ffffffff826de050 r gpt_get_fstype.gpt_uuid_unused +ffffffff826de060 r gpt_get_fstype.gpt_uuid_efi_system +ffffffff826de070 r gpt_get_fstype.gpt_uuid_bios_boot +ffffffff826df000 r hiballoc_addr_RBT_INFO +ffffffff826df018 R hiballoc_addr_RBT_TYPE +ffffffff826e0000 R logread_filtops +ffffffff826e1000 r phtree_RBT_INFO +ffffffff826e1018 R phtree_RBT_TYPE +ffffffff826e1020 r pool_lock_ops_rw +ffffffff826e1058 r pool_lock_ops_mtx +ffffffff826e2000 r pselregister.evf +ffffffff826e200c r pselregister.evff +ffffffff826e3000 R pipe_rfiltops +ffffffff826e3030 R pipe_wfiltops +ffffffff826e3060 R pipe_efiltops +ffffffff826e3090 r pipeops +ffffffff826e4000 R socketops +ffffffff826e5000 R sysvsem_vars +ffffffff826e6000 R char_type +ffffffff826e6100 R ttyread_filtops +ffffffff826e6130 R ttywrite_filtops +ffffffff826e6160 R ttyexcept_filtops +ffffffff826e7000 R ptcread_filtops +ffffffff826e7030 R ptcwrite_filtops +ffffffff826e7060 R ptcexcept_filtops +ffffffff826e9000 R domains +ffffffff826ea000 R unixdomain +ffffffff826ea050 R unixsw +ffffffff826eb000 R solisten_filtops +ffffffff826eb030 R soread_filtops +ffffffff826eb060 R sowrite_filtops +ffffffff826eb090 R soexcept_filtops +ffffffff826eb0c0 R socket_klistops +ffffffff826ec000 R sun_noname +ffffffff826ec010 R uipc_usrreqs +ffffffff826ec0b0 R uipc_dgram_usrreqs +ffffffff826ec150 R unpstctl_vars +ffffffff826ec180 R unpsqctl_vars +ffffffff826ec1b0 R unpdgctl_vars +ffffffff826ed000 r namecache_rb_cache_RBT_INFO +ffffffff826ed018 R namecache_rb_cache_RBT_TYPE +ffffffff826ee000 R generic_filtops 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auth_hash_hmac_sha2_256_128 +ffffffff827383a0 R auth_hash_hmac_sha2_384_192 +ffffffff827383e8 R auth_hash_hmac_sha2_512_256 +ffffffff82738430 R auth_hash_gmac_aes_128 +ffffffff82738478 R auth_hash_gmac_aes_192 +ffffffff827384c0 R auth_hash_gmac_aes_256 +ffffffff82738508 R auth_hash_chacha20_poly1305 +ffffffff82738550 R comp_algo_deflate +ffffffff82739000 r IV +ffffffff8273a000 r idgen32_ftable +ffffffff8273b000 r Chacha20_Poly1305_Update.zeroes +ffffffff8273b010 r pad0 +ffffffff8273c000 r null_point +ffffffff8273c020 r base_point +ffffffff8273d000 R mplsdomain +ffffffff8273e000 R mplsctl_vars +ffffffff8273f000 r nfs_nodetree_RBT_INFO +ffffffff8273f018 R nfs_nodetree_RBT_TYPE +ffffffff82740000 r nfsread_filtops +ffffffff82740030 r nfswrite_filtops +ffffffff82740060 r nfsvnode_filtops +ffffffff82741000 r nfsrv_v3errmap +ffffffff827410b0 r nfsrv_v2errmap +ffffffff82742000 R nfs_vfsops +ffffffff82743000 R nfs_vops +ffffffff82743110 R nfs_specvops +ffffffff82743220 R nfs_fifovops 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hv_guid_ide +ffffffff827c4048 R hv_guid_scsi +ffffffff827c4058 R hv_guid_shutdown +ffffffff827c4068 R hv_guid_timesync +ffffffff827c4078 R hv_guid_heartbeat +ffffffff827c4088 R hv_guid_kvp +ffffffff827c5000 r kvp_pools +ffffffff827c6000 R hvn_ca +ffffffff827c7000 R hvs_ca +ffffffff827c7028 R hvs_switch +ffffffff827c8000 r virtio_device_name +ffffffff827c9000 R vio_ca +ffffffff827c9030 r virtio_net_feature_names +ffffffff827ca000 R vioblk_ca +ffffffff827ca028 R vioblk_switch +ffffffff827cb000 R viomb_ca +ffffffff827cb030 r viomb_feature_names +ffffffff827cc000 R viornd_ca +ffffffff827cd000 R vioscsi_ca +ffffffff827cd028 R vioscsi_switch +ffffffff827cd050 R vioscsi_vq_names +ffffffff827ce000 R vmmci_ca +ffffffff827cf000 R pci_ca +ffffffff827d0000 r pci_quirks +ffffffff827d1000 R pci_subclass_prehistoric +ffffffff827d1050 R pci_subclass_mass_storage +ffffffff827d1160 R pci_subclass_network +ffffffff827d1250 R pci_subclass_display +ffffffff827d12d0 R pci_subclass_multimedia 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nvme_msi_blacklist +ffffffff82805000 R ami_pci_ca +ffffffff82805030 r ami_pci_subsys +ffffffff82805270 r ami_pci_vendors +ffffffff82806000 R mfi_pci_ca +ffffffff82806030 r mfi_pci_devices +ffffffff82807000 R mfii_ca +ffffffff82807028 R mfii_switch +ffffffff82807050 R mfii_pd_switch +ffffffff82807078 R mfii_iop_thunderbolt +ffffffff82807088 R mfii_iop_25 +ffffffff82807098 R mfii_iop_35 +ffffffff828070b0 R mfii_devices +ffffffff82807140 r mfi_bbu_indicators +ffffffff82808000 R ips_ca +ffffffff82808028 r ips_ids +ffffffff82808040 r ips_chips +ffffffff82808090 r ips_names +ffffffff82808128 r ips_switch +ffffffff82808150 r ips_pt_switch +ffffffff82809000 R eap_ca +ffffffff82809028 R eap1370_hw_if +ffffffff828090e0 R eap1371_hw_if +ffffffff82809198 R eap_midi_hw_if +ffffffff828091d0 R eap_devices +ffffffff8280a000 R auacer_pci_devices +ffffffff8280a008 R auacer_ca +ffffffff8280a030 R auacer_hw_if +ffffffff8280b000 R auich_ca +ffffffff8280b028 R auich_hw_if +ffffffff8280b0e0 r auich_devices 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pciide_promise_products +ffffffff82897ac0 R pciide_acard_products +ffffffff82897b10 R pciide_serverworks_products +ffffffff82897bb0 R pciide_nvidia_products +ffffffff82897e80 R pciide_ite_products +ffffffff82897ea0 R pciide_ati_products +ffffffff82897f20 R pciide_jmicron_products +ffffffff82897f70 R pciide_phison_products +ffffffff82897f80 R pciide_rdc_products +ffffffff82897f90 R pciide_vendors +ffffffff82898140 R pciide_pci_ca +ffffffff82898168 R pciide_jmb_ca +ffffffff82898190 r piix_isp_dma +ffffffff82898193 r piix_rtc_dma +ffffffff82898196 r apollo_pio_set +ffffffff8289819b r cmd0643_9_data_tim_pio +ffffffff828981a0 r cmd0643_9_data_tim_dma +ffffffff828981a3 r cmd680_channel_map.init_val +ffffffff828981b1 r cmd680_setup_channel.udma2_tbl +ffffffff828981b8 r cmd680_setup_channel.dma_tbl +ffffffff828981be r cmd680_setup_channel.pio_tbl +ffffffff828981d0 r satalink_ba5_regmap +ffffffff82898690 r sii3114_chansetup.channel_names +ffffffff828986b0 r cy_pio_pulse +ffffffff828986c0 r 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tuners +ffffffff828a2170 r freqTable +ffffffff828a2260 r nabcst +ffffffff828a22a0 r irccable +ffffffff828a2310 r hrccable +ffffffff828a2380 r weurope +ffffffff828a2420 r jpnbcst +ffffffff828a2460 r jpncable +ffffffff828a24c0 r xussr +ffffffff828a2530 r australia +ffffffff828a2590 r france +ffffffff828a3000 R xl_pci_ca +ffffffff828a3030 R xl_pci_devices +ffffffff828a4000 R fxp_pci_ca +ffffffff828a4030 R fxp_pci_devices +ffffffff828a5000 R em_devices +ffffffff828a52e0 R em_ca +ffffffff828a5310 r em_counters +ffffffff828a6000 r em_igp_cable_length_table +ffffffff828a6100 r em_igp_2_cable_length_table +ffffffff828a7000 R ixgb_devices +ffffffff828a7010 R ixgb_ca +ffffffff828a8000 R ixgbe_devices +ffffffff828a80b8 R ix_ca +ffffffff828a80e0 r ix_counters +ffffffff828a83e0 r ix_rxq_kstats_tpl +ffffffff828a8458 r ix_txq_kstats_tpl +ffffffff828a9000 r ixgbe_mvals_base +ffffffff828a9060 r ixgbe_mvals_X540 +ffffffff828a90c0 r ixgbe_mvals_X550 +ffffffff828a9120 r ixgbe_mvals_X550EM_x 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+ffffffff828b2028 R epic_pci_devices +ffffffff828b3000 R ti_pci_ca +ffffffff828b3030 R ti_devices +ffffffff828b4000 R ne_pci_ca +ffffffff828b4030 R ne_pci_prod +ffffffff828b5000 R gem_pci_ca +ffffffff828b5030 R gem_pci_devices +ffffffff828b5050 r gem_promhdr +ffffffff828b5052 r gem_promdat +ffffffff828b505a r gem_promdat2 +ffffffff828b6000 R cas_ca +ffffffff828b6028 R cas_pci_devices +ffffffff828b6030 r cas_promhdr +ffffffff828b6032 r cas_promdat_sun +ffffffff828b603a r cas_promdat_ns +ffffffff828b6042 r cas_promdat2 +ffffffff828b7000 R sf_pci_ca +ffffffff828b7028 R sf_pci_products +ffffffff828b8000 R sis_ca +ffffffff828b8028 R sis_devices +ffffffff828b9000 R se_devices +ffffffff828b9008 R se_ca +ffffffff828ba000 R uhci_pci_ca +ffffffff828bb000 R ohci_pci_ca +ffffffff828bc000 R ehci_pci_ca +ffffffff828bd000 R xhci_pci_ca +ffffffff828be000 R cbb_pci_ca +ffffffff828be028 r pccbb_pcmcia_do_io_map.pcic_iowidth +ffffffff828bf000 R skc_devices +ffffffff828bf030 R skc_ca +ffffffff828bf058 R sk_ca +ffffffff828c0000 R mskc_devices +ffffffff828c00a8 R mskc_ca +ffffffff828c00d0 R msk_ca +ffffffff828c0100 r msk_mib +ffffffff828c1000 R puc_pci_ca +ffffffff828c2000 R puc_devs +ffffffff828c7000 R com_puc_ca +ffffffff828c7030 r puc_port_types +ffffffff828c8000 R lpt_puc_ca +ffffffff828c9000 R wi_pci_ca +ffffffff828c9030 r wi_pci_products +ffffffff828ca000 R an_pci_ca +ffffffff828ca030 R an_pci_devices +ffffffff828cb000 R iwi_devices +ffffffff828cb010 R iwi_ca +ffffffff828cc000 R wpi_ca +ffffffff828cc028 r wpi_devices +ffffffff828cc030 r wpi_rates +ffffffff828cc050 r wpi_rf_gain_5ghz +ffffffff828cc0a0 r wpi_dsp_gain_5ghz +ffffffff828cc0f0 r wpi_rf_gain_2ghz +ffffffff828cc140 r wpi_dsp_gain_2ghz +ffffffff828cc190 r wpi_pmgt +ffffffff828cc310 r wpi_bands +ffffffff828cd000 R iwn_mcs2ridx +ffffffff828cd020 R iwn_ca +ffffffff828cd050 r iwn_devices +ffffffff828cd0e8 r iwn4965_sensitivity_limits +ffffffff828cd124 r iwn5000_sensitivity_limits +ffffffff828cd160 r iwn5150_sensitivity_limits +ffffffff828cd19c r iwn1000_sensitivity_limits +ffffffff828cd1d8 r iwn6000_sensitivity_limits +ffffffff828cd214 r iwn2000_sensitivity_limits +ffffffff828cd250 r iwn_fw_errmsg +ffffffff828cd340 r iwn4965_set_txpower.tdiv +ffffffff828cd360 r iwn4965_rf_gain_5ghz +ffffffff828cd3d0 r iwn4965_dsp_gain_5ghz +ffffffff828cd440 r iwn4965_dsp_gain_2ghz +ffffffff828cd4b0 r iwn_pmgt +ffffffff828cd6f0 r iwn4965_post_alive.qid2fifo +ffffffff828cd700 r iwn_bands +ffffffff828cd770 r iwn_rates +ffffffff828cd820 r iwn4965_rf_gain_2ghz +ffffffff828ce000 R iwm_nvm_channels +ffffffff828ce030 R iwm_nvm_channels_8000 +ffffffff828ce070 R iwm_rates +ffffffff828ce0d0 R iwm_ht_mcs2ridx +ffffffff828ce110 R iwm_tid_to_ac +ffffffff828ce118 R iwm_ac_to_tx_fifo +ffffffff828ce120 R iwm_nvm_to_read +ffffffff828ce144 r iwm_set_hw_address_8000.reserved_mac +ffffffff828ce180 r iwm_sf_full_timeout +ffffffff828ce1b0 r iwm_sf_full_timeout_def +ffffffff828ce1e0 r advanced_lookup +ffffffff828ce320 r iwm_devices +ffffffff828ce360 R iwm_ca +ffffffff828cf000 R iwx_9560_quz_a0_jf_b0_cfg +ffffffff828cf020 R iwx_9560_qu_c0_jf_b0_cfg +ffffffff828cf040 R iwx_qu_b0_hr1_b0 +ffffffff828cf060 R iwx_qu_b0_hr_b0 +ffffffff828cf080 R iwx_ax201_cfg_qu_hr +ffffffff828cf0a0 R iwx_qu_c0_hr1_b0 +ffffffff828cf0c0 R iwx_qu_c0_hr_b0 +ffffffff828cf0e0 R iwx_ax201_cfg_qu_c0_hr_b0 +ffffffff828cf100 R iwx_quz_a0_hr1_b0 +ffffffff828cf120 R iwx_ax201_cfg_quz_hr +ffffffff828cf140 R iwx_cfg_so_a0_hr_b0 +ffffffff828cf160 R iwx_cfg_quz_a0_hr_b0 +ffffffff828cf180 R iwx_2ax_cfg_so_gf_a0 +ffffffff828cf1a0 R iwx_2ax_cfg_so_gf_a0_long +ffffffff828cf1c0 R iwx_2ax_cfg_so_gf4_a0 +ffffffff828cf1e0 R iwx_2ax_cfg_so_gf4_a0_long +ffffffff828cf200 R iwx_2ax_cfg_ty_gf_a0 +ffffffff828cf220 R iwx_2ax_cfg_so_jf_b0 +ffffffff828cf240 R iwx_nvm_channels_8000 +ffffffff828cf280 R iwx_rates +ffffffff828cf2e0 R iwx_mcs2ridx +ffffffff828cf320 R iwx_tid_to_ac +ffffffff828cf328 R iwx_ac_to_tx_fifo +ffffffff828cf330 r iwx_nvm_channels_uhb +ffffffff828cf39e r iwx_is_valid_mac_addr.reserved_mac +ffffffff828cf3b0 r iwx_sf_full_timeout +ffffffff828cf3e0 r iwx_sf_full_timeout_def +ffffffff828cf410 r advanced_lookup +ffffffff828cf550 r iwx_devices +ffffffff828cf590 r iwx_dev_info_table +ffffffff828cfde8 R iwx_ca +ffffffff828d0000 R cmpci_ca +ffffffff828d0028 R cmpci_hw_if +ffffffff828d00e0 r cmpci_rate_table +ffffffff828d0120 R cmpci_devices +ffffffff828d0130 r cmpci_query_devinfo.mixer_port_names +ffffffff828d0160 r cmpci_query_devinfo.mixer_classes +ffffffff828d1000 R iha_pci_ca +ffffffff828d1028 R iha_switch +ffffffff828d2000 R pcscp_ca +ffffffff828d3000 R bge_ca +ffffffff828d3030 R bge_devices +ffffffff828d31b0 r bge_revisions +ffffffff828d3610 r bge_majorrevs +ffffffff828d4000 R bnx_devices +ffffffff828d4020 R bnx_ca +ffffffff828d5000 R vge_ca +ffffffff828d5028 R vge_devices +ffffffff828d6000 R stge_ca +ffffffff828d6028 R stge_mii_bitbang_ops +ffffffff828d6050 R stge_devices +ffffffff828d7000 R nfe_ca +ffffffff828d7030 R nfe_devices +ffffffff828d8000 R et_devices +ffffffff828d8008 R et_ca +ffffffff828d9000 R jme_devices +ffffffff828d9008 R jme_ca +ffffffff828da000 R age_devices +ffffffff828da008 R age_ca +ffffffff828db000 R alc_devices +ffffffff828db038 R alc_ca +ffffffff828dc000 R ale_devices +ffffffff828dc008 R ale_ca +ffffffff828dd000 R amdpm_ca +ffffffff828dd030 R amdpm_ids +ffffffff828de000 R bce_ca +ffffffff828de028 R bce_devices +ffffffff828df000 R ath_pci_ca +ffffffff828e0000 R athn_pci_ca +ffffffff828e0030 r athn_pci_devices +ffffffff828e1000 R atw_pci_ca +ffffffff828e1028 R atw_pci_devices +ffffffff828e2000 R rtw_pci_ca +ffffffff828e2030 R rtw_pci_products +ffffffff828e3000 R rtwn_pci_ca +ffffffff828e3030 r rtwn_pci_devices +ffffffff828e3040 r rtl8188eu_mac +ffffffff828e31b0 r rtl8192cu_mac +ffffffff828e3310 r rtl8192ce_mac +ffffffff828e3458 r rtl8188eu_bb_prog +ffffffff828e3480 r rtl8723a_bb_prog +ffffffff828e34a8 r rtl8192ce_bb_prog_1t +ffffffff828e34d0 r rtl8192ce_bb_prog_2t +ffffffff828e3500 r rtl8188eu_bb_regs +ffffffff828e3680 r rtl8188eu_bb_vals +ffffffff828e3980 r rtl8188eu_agc_vals +ffffffff828e3b80 r rtl8723a_bb_regs +ffffffff828e3d00 r rtl8723a_bb_vals +ffffffff828e3ff0 r rtl8192ce_agc_vals +ffffffff828e4270 r rtl8192ce_bb_regs +ffffffff828e43f0 r rtl8192ce_bb_vals_1t +ffffffff828e46e0 r rtl8192ce_bb_vals_2t +ffffffff828e5000 R ral_pci_ca +ffffffff828e5030 R ral_pci_devices +ffffffff828e6000 R acx_pci_ca +ffffffff828e6028 R acx_pci_devices +ffffffff828e7000 R pgt_pci_ca +ffffffff828e7028 R pgt_pci_devices +ffffffff828e8000 R malo_pci_ca +ffffffff828e8028 R malo_pci_devices +ffffffff828e9000 R bwi_pci_ca +ffffffff828e9030 R bwi_pci_devices +ffffffff828ea000 R piixpm_ca +ffffffff828ea030 R piixpm_ids +ffffffff828eb000 R vic_ca +ffffffff828eb028 R vic_devices +ffffffff828ec000 R vmx_devices +ffffffff828ec008 R vmx_ca +ffffffff828ec030 r vmx_tx_kstat_tpl +ffffffff828ec0d0 r vmx_kstat_rate +ffffffff828ec0e0 r vmx_rx_kstat_tpl +ffffffff828ed000 R vmwpvs_ca +ffffffff828ed028 R vmwpvs_switch +ffffffff828ee000 R lii_ca +ffffffff828ee028 R lii_devices +ffffffff828ef000 R ichiic_ca +ffffffff828ef030 R ichiic_ids +ffffffff828f0000 R viapm_ca +ffffffff828f0030 R viapm_ids +ffffffff828f0070 r val_to_temp +ffffffff828f0870 r val_to_uV.mult +ffffffff828f1000 R amdiic_ca +ffffffff828f1028 R amdiic_ids +ffffffff828f2000 R nviic_ca +ffffffff828f2030 R nviic_ids +ffffffff828f3000 R sdhc_pci_ca +ffffffff828f4000 R kate_ca +ffffffff828f4030 r kate_proc +ffffffff828f5000 R km_ca +ffffffff828f5030 r km_devices +ffffffff828f6000 R ksmn_ca +ffffffff828f6030 r ksmn_devices +ffffffff828f7000 R itherm_devices +ffffffff828f7008 R itherm_ca +ffffffff828f8000 R pchtemp_ca +ffffffff828f8030 R pchtemp_devices +ffffffff828f9000 R rtsx_pci_ca +ffffffff828fa000 R xspd_ca +ffffffff828fa028 R xspd_devices +ffffffff828fb000 R virtio_pci_ca +ffffffff828fc000 R dwiic_pci_ca +ffffffff828fc030 R dwiic_pci_ids +ffffffff828fd000 R bwfm_pci_ca +ffffffff828fd030 r bwfm_pci_devices +ffffffff828fe000 R ccp_pci_ca +ffffffff828fe030 r ccp_pci_devices +ffffffff828ff000 R bnxt_devices +ffffffff828ff040 R bnxt_ca +ffffffff82900000 R mcx_ca +ffffffff82900030 r mcx_devices +ffffffff82900060 r mcx_rss_config +ffffffff829000d0 r mcx_eth_cap_map +ffffffff829002d0 r mcx_kstat_ppcnt_ieee8023 +ffffffff829002e8 r mcx_kstat_ppcnt_rfc2863 +ffffffff82900300 r mcx_kstat_ppcnt_rfc2819 +ffffffff82900318 r mcx_kstat_ppcnt_rfc3635 +ffffffff82900330 r mcx_ppcnt_ieee8023_tpl +ffffffff829004b0 r mcx_ppcnt_rfc2863_tpl +ffffffff829005c0 r mcx_ppcnt_rfc2819_tpl +ffffffff82900770 r mcx_ppcnt_rfc3635_tpl +ffffffff829008b0 r mcx_kstat_mtmp_tpl +ffffffff82900950 r mcx_kstat_mtmp_rate +ffffffff82900960 r mcx_queue_kstat_tpl +ffffffff82901000 R iavf_ca +ffffffff82901030 r iavf_devices +ffffffff82901040 r iavf_aq_regs +ffffffff829010b0 r iavf_link_speeds +ffffffff82902000 R rge_ca +ffffffff82902028 R rge_devices +ffffffff82902030 r rtl8125_mac_cfg2_ephy +ffffffff82902090 r rge_phy_config_mac_cfg3.mac_cfg3_a438_value +ffffffff829020b0 r rge_phy_config_mac_cfg3.mac_cfg3_b88e_value +ffffffff82902110 r rge_phy_config_mac_cfg4.mac_cfg4_b87c_value +ffffffff82902170 r rtl8125_mac_cfg4_ephy +ffffffff829021e0 r rtl8125_mac_cfg2_mcu +ffffffff82902e80 r rtl8125_mac_cfg3_mcu +ffffffff82903720 r rtl8125_mac_cfg4_mcu +ffffffff82905d10 r rtl8125_mac_cfg5_mcu +ffffffff82906c10 r rtl8125_mac_bps +ffffffff82906f80 r rtl8125b_mac_bps +ffffffff82907120 r rge_kstats_tpl +ffffffff82908000 R igc_devices +ffffffff82908040 R igc_ca +ffffffff82909000 R com_pci_ca +ffffffff82909030 R com_pci_ids +ffffffff8290a000 r agp_attach.agp_max +ffffffff8290a048 R agp_ca +ffffffff8290b000 R intagp_ca +ffffffff8290c000 r drm_plane_create_rotation_property.props +ffffffff8290d000 r drm_bridge_priv_state_funcs +ffffffff8290f000 r color_encoding_name +ffffffff8290f020 r color_range_name +ffffffff82910000 r drm_subpixel_enum_list +ffffffff82910060 r drm_dpms_enum_list +ffffffff829100a0 r drm_dvi_i_select_enum_list +ffffffff829100d0 r drm_dvi_i_subconnector_enum_list +ffffffff82910100 r drm_tv_select_enum_list +ffffffff82910150 r drm_tv_subconnector_enum_list +ffffffff829101a0 r drm_dp_subconnector_enum_list +ffffffff82910210 r drm_link_status_enum_list +ffffffff82910230 r drm_scaling_mode_enum_list +ffffffff82910270 r drm_aspect_ratio_enum_list +ffffffff829102a0 r hdmi_colorspaces +ffffffff82910370 r dp_colorspaces +ffffffff82910450 r drm_content_type_enum_list +ffffffff829104a0 r drm_panel_orientation_enum_list +ffffffff829104e0 r privacy_screen_enum +ffffffff82911000 r drm_crtc_fence_ops +ffffffff82912000 r drm_dmt_modes +ffffffff82914940 r edid_cea_modes_1 +ffffffff829184d0 r edid_cea_modes_193 +ffffffff82919180 r edid_quirk_list +ffffffff82919350 r edid_4k_modes +ffffffff829195b0 r edid_est_modes +ffffffff82919db0 r est3_modes +ffffffff82919f10 r stereo_mandatory_modes +ffffffff82919f90 r extra_modes +ffffffff8291a000 r drm_encoder_enum_list +ffffffff8291b000 r drm_fbdev_client_funcs +ffffffff8291b020 r drm_fb_helper_generic_funcs +ffffffff8291b028 r drm_fbdev_fb_ops +ffffffff8291c000 r drm_fb_xrgb8888_to_rgb332.dst_pixsize +ffffffff8291c004 r drm_fb_xrgb8888_to_rgb565.dst_pixsize +ffffffff8291c008 r drm_fb_xrgb8888_to_rgb888.dst_pixsize +ffffffff8291c00c r drm_fb_xrgb8888_to_xrgb2101010.dst_pixsize +ffffffff8291c010 r drm_fb_xrgb8888_to_gray8.dst_pixsize +ffffffff8291c014 r drm_fb_rgb888_to_xrgb8888.dst_pixsize +ffffffff8291c018 r drm_fb_rgb565_to_xrgb8888.dst_pixsize +ffffffff8291d000 r __drm_format_info.formats +ffffffff8291e000 R drm_pgops +ffffffff8291f000 r drm_ioctls +ffffffff82921000 r dma_fence_stub_ops +ffffffff82921038 R dma_fence_array_ops +ffffffff82921070 R dma_fence_chain_ops +ffffffff829210a8 R dmabufops +ffffffff829210e0 R syncfileops +ffffffff82922000 r drm_plane_type_enum_list +ffffffff82923000 r drm_mode_status_names +ffffffff82924000 r primary_plane_funcs +ffffffff82924068 r safe_modeset_formats +ffffffff82925000 r orientation_data +ffffffff82928060 r lcd800x1280_rightside_up +ffffffff82928078 r lcd720x1280_rightside_up +ffffffff82928090 r asus_t100ha +ffffffff829280a8 r lcd1080x1920_leftside_up +ffffffff829280c0 r lcd1200x1920_rightside_up +ffffffff829280d8 r gpd_micropc +ffffffff829280f0 r gpd_pocket +ffffffff82928108 r gpd_pocket2 +ffffffff82928120 r gpd_win +ffffffff82928138 r gpd_win2 +ffffffff82928150 r itworks_tw891 +ffffffff82928168 r onegx1_pro +ffffffff82928180 r lcd1600x2560_leftside_up +ffffffff82928198 r lcd1280x1920_rightside_up +ffffffff829281b0 r .compoundliteral +ffffffff829281c0 r .compoundliteral.5 +ffffffff829281e8 r .compoundliteral.9 +ffffffff82928208 r .compoundliteral.17 +ffffffff82928248 r .compoundliteral.21 +ffffffff82928268 r .compoundliteral.23 +ffffffff82928278 r .compoundliteral.25 +ffffffff82929000 r drm_gem_prime_dmabuf_ops +ffffffff8292b000 r is_hdmi_adaptor.dp_dual_mode_hdmi_id +ffffffff8292c000 r drm_dp_phy_name.phy_names +ffffffff8292c048 r drm_dp_i2c_algo +ffffffff8292c058 r drm_dp_i2c_lock_ops +ffffffff8292c070 r dp_aux_bl_ops +ffffffff8292c090 r dpcd_quirk_list +ffffffff8292c320 r drm_dp_psr_setup_time.psr_setup_time_us +ffffffff8292d000 R drm_dp_mst_topology_state_funcs +ffffffff8292d020 r drm_dp_mst_req_type_str.req_type_str +ffffffff8292d1f0 r drm_dp_mst_sideband_tx_state_str.sideband_reason_str +ffffffff8292d220 r drm_dp_mst_nak_reason_str.nak_reason_str +ffffffff8292d278 r drm_dp_mst_i2c_algo +ffffffff8292e000 r hdmi_colorimetry_val +ffffffff8292f000 r ttm_bo_init_reserved.sys_mem +ffffffff82930000 r ttm_bo_pipeline_gutting.sys_mem +ffffffff82931018 R ttm_bo_vm_ops +ffffffff82932000 r ttm_range_manager_func +ffffffff82933018 r ttm_kmap_iter_io_ops +ffffffff82933030 r ttm_kmap_iter_linear_io_ops +ffffffff82934000 r ttm_sys_manager_func +ffffffff82935000 r ttm_kmap_iter_tt_ops +ffffffff82936000 r drm_sched_fence_ops_scheduled +ffffffff82936038 r drm_sched_fence_ops_finished +ffffffff82937000 R ch7017_ops +ffffffff82938000 R ch7xxx_ops +ffffffff82938060 r ch7xxx_ids +ffffffff82939000 R ivch_ops +ffffffff82939060 r backup_addresses +ffffffff8293a000 R ns2501_ops +ffffffff8293a060 r mode_agnostic_values +ffffffff8293a0e0 r ns2501_modes +ffffffff8293b000 R sil164_ops +ffffffff8293c000 R tfp410_ops +ffffffff8293d000 r chv_dpll +ffffffff8293d050 r vlv_dpll +ffffffff8293d0a0 r g4x_dpll +ffffffff8293d0f0 r pch_dpll +ffffffff8293d138 r intel_dp_enc_funcs +ffffffff8293e000 r intel_hdmi_enc_funcs +ffffffff8293f000 r vlv_primary_formats +ffffffff8293f030 r ivb_primary_formats +ffffffff8293f050 r i965_primary_formats +ffffffff8293f070 r i8xx_primary_formats +ffffffff8293f080 r i965_plane_funcs +ffffffff8293f0e8 r i8xx_plane_funcs +ffffffff82940000 r gen11_dsi_encoder_funcs +ffffffff82940020 r gen11_dsi_connector_funcs +ffffffff82940098 r gen11_dsi_connector_helper_funcs +ffffffff829400e8 r gen11_dsi_host_ops +ffffffff82941000 r intel_plane_helper_funcs +ffffffff82942000 r g4x_audio_funcs +ffffffff82942010 r ilk_audio_funcs +ffffffff82942020 r hsw_audio_funcs +ffffffff82942030 r hdmi_audio_clock +ffffffff829420a0 r dp_aud_n_m +ffffffff82942250 r hdmi_aud_ncts_36bpp +ffffffff82942330 r hdmi_aud_ncts_30bpp +ffffffff82942410 r hdmi_aud_ncts_24bpp +ffffffff82943000 r intel_backlight_device_ops +ffffffff82943018 r bxt_pwm_funcs +ffffffff82943048 r cnp_pwm_funcs +ffffffff82943078 r lpt_pwm_funcs +ffffffff829430a8 r spt_pwm_funcs +ffffffff829430d8 r pch_pwm_funcs +ffffffff82943108 r ext_pwm_funcs +ffffffff82943138 r vlv_pwm_funcs +ffffffff82943168 r i965_pwm_funcs +ffffffff82943198 r i9xx_pwm_funcs +ffffffff829431c8 r pwm_bl_funcs +ffffffff82944000 r bdb_blocks +ffffffff82944160 r translate_iboost.mapping +ffffffff82944163 r adlp_ddc_pin_map +ffffffff8294416a r adls_ddc_pin_map +ffffffff82944170 r rkl_pch_tgp_ddc_pin_map +ffffffff82944175 r icp_ddc_pin_map +ffffffff8294417f r cnp_ddc_pin_map +ffffffff82945000 r mtl_sa_info +ffffffff82945006 r adlp_sa_info +ffffffff8294500c r adls_sa_info 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gen6_null_state +ffffffff8298d000 r hsw_clear_kernel +ffffffff8298d340 r ivb_clear_kernel +ffffffff8298e000 r gen7_null_state_relocs +ffffffff8298e018 R gen7_null_state +ffffffff8298e030 r gen7_null_state_batch +ffffffff8298f000 r gen8_null_state_relocs +ffffffff8298f018 R gen8_null_state +ffffffff8298f030 r gen8_null_state_batch +ffffffff82990000 r gen9_null_state_relocs +ffffffff82990018 R gen9_null_state +ffffffff82990030 r gen9_null_state_batch +ffffffff82991000 r intel_engines +ffffffff829911a0 r get_reset_domain.engine_reset_domains +ffffffff82991210 r get_reset_domain.engine_reset_domains.39 +ffffffff8299125c r engine_class_guc_class_map +ffffffff82991270 r __cs_pending_mi_force_wakes._reg +ffffffff82992000 r wf_ops +ffffffff82993000 r intel_engine_class_repr.uabi_names +ffffffff82993030 r uabi_classes +ffffffff82993036 r legacy_ring_idx.map +ffffffff82994000 r execlists_context_ops +ffffffff82994080 r virtual_context_ops +ffffffff82995000 r mmio_invalidate_full.gen12_regs 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caicos_mgcg_disable +ffffffff829c7930 r turks_sysls_enable +ffffffff829c79f0 r caicos_sysls_enable +ffffffff829c7aa0 r turks_sysls_disable +ffffffff829c7b60 r caicos_sysls_disable +ffffffff829c8000 r didt_config_ci +ffffffff829c85b4 r defaults_bonaire_xt +ffffffff829c8600 r defaults_saturn_xt +ffffffff829c864c r defaults_hawaii_xt +ffffffff829c8698 r defaults_hawaii_pro +ffffffff829c9000 r ci_program_jump_on_start.data +ffffffff829ca000 r bonaire_io_mc_regs +ffffffff829ca120 r hawaii_io_mc_regs +ffffffff829ca1d0 r mc_cg_registers +ffffffff829ca200 r bonaire_mgcg_cgcg_init +ffffffff829ca5e0 r bonaire_golden_registers +ffffffff829ca7d0 r bonaire_golden_common_registers +ffffffff829ca800 r bonaire_golden_spm_registers +ffffffff829ca810 r kalindi_mgcg_cgcg_init +ffffffff829caab0 r kalindi_golden_registers +ffffffff829cac20 r kalindi_golden_common_registers +ffffffff829cac50 r kalindi_golden_spm_registers +ffffffff829cac60 r godavari_golden_registers +ffffffff829cade0 r spectre_mgcg_cgcg_init +ffffffff829cb200 r spectre_golden_registers +ffffffff829cb330 r spectre_golden_common_registers +ffffffff829cb360 r spectre_golden_spm_registers +ffffffff829cb370 r hawaii_mgcg_cgcg_init +ffffffff829cb880 r hawaii_golden_registers +ffffffff829cba30 r hawaii_golden_common_registers +ffffffff829cba6c r hawaii_golden_spm_registers +ffffffff829cba80 r spectre_rlc_save_restore_register_list +ffffffff829cc170 r kalindi_rlc_save_restore_register_list +ffffffff829cc680 r ci_cs_data +ffffffff829cc6a0 r ci_SECT_CONTEXT_defs +ffffffff829cc720 r ci_SECT_CONTEXT_def_1 +ffffffff829cca70 r ci_SECT_CONTEXT_def_3 +ffffffff829cca90 r ci_SECT_CONTEXT_def_4 +ffffffff829ccd04 r ci_SECT_CONTEXT_def_5 +ffffffff829ccd0c r ci_SECT_CONTEXT_def_6 +ffffffff829ccd10 r ci_SECT_CONTEXT_def_2 +ffffffff829cd160 r ci_SECT_CONTEXT_def_7 +ffffffff829cd510 r cik_default_state +ffffffff829cf000 r dce3_2_afmt_write_sad_regs.eld_reg_to_type +ffffffff829d0000 r dce6_afmt_write_sad_regs.eld_reg_to_type +ffffffff829d1000 r ni_tx_offsets +ffffffff829d1020 r evergreen_dp_offsets +ffffffff829d1040 r evergreen_disp_int_status +ffffffff829d1060 r evergreen_golden_registers +ffffffff829d1260 r evergreen_golden_registers2 +ffffffff829d1310 r cypress_mgcg_init +ffffffff829d1a10 r juniper_mgcg_init +ffffffff829d1e80 r redwood_mgcg_init +ffffffff829d21b0 r cedar_golden_registers +ffffffff829d2390 r cedar_mgcg_init +ffffffff829d25f0 r wrestler_golden_registers +ffffffff829d2840 r supersumo_golden_registers +ffffffff829d2ba0 r sumo_golden_registers +ffffffff829d2be0 r barts_golden_registers +ffffffff829d2e00 r turks_golden_registers +ffffffff829d3040 r caicos_golden_registers +ffffffff829d3280 r sumo_rlc_save_restore_register_list +ffffffff829d33d0 r evergreen_cs_data +ffffffff829d3410 r SECT_CONTEXT_defs +ffffffff829d3490 r SECT_CLEAR_defs +ffffffff829d34b0 r SECT_CTRLCONST_defs +ffffffff829d34d0 r SECT_CONTEXT_def_2 +ffffffff829d34f0 r SECT_CONTEXT_def_4 +ffffffff829d3680 r SECT_CONTEXT_def_5 +ffffffff829d36a0 r SECT_CONTEXT_def_6 +ffffffff829d3780 r SECT_CONTEXT_def_1 +ffffffff829d3f20 r SECT_CONTEXT_def_3 +ffffffff829d4000 r SECT_CONTEXT_def_7 +ffffffff829d4488 r SECT_CLEAR_def_1 +ffffffff829d4494 r SECT_CTRLCONST_def_1 +ffffffff829d44a0 r evergreen_default_state +ffffffff829d5000 r cayman_reg_safe_bm +ffffffff829d7000 r evergreen_reg_safe_bm +ffffffff829da000 r evergreen_hdmi_write_sad_regs.eld_reg_to_type +ffffffff829db000 r didt_config_kv +ffffffff829dc000 r barts_io_mc_regs +ffffffff829dc0f0 r turks_io_mc_regs +ffffffff829dc1e0 r caicos_io_mc_regs +ffffffff829dc2d0 r cayman_io_mc_regs +ffffffff829dc3c0 r cayman_golden_registers +ffffffff829dc580 r cayman_golden_registers2 +ffffffff829dc5d0 r dvst_golden_registers +ffffffff829dc860 r dvst_golden_registers2 +ffffffff829dc890 r scrapper_golden_registers +ffffffff829dcd70 r tn_rlc_save_restore_register_list +ffffffff829dcf60 r cayman_cs_data +ffffffff829dcfa0 r SECT_CONTEXT_defs +ffffffff829dd020 r SECT_CLEAR_defs +ffffffff829dd040 r SECT_CTRLCONST_defs +ffffffff829dd060 r SECT_CONTEXT_def_2 +ffffffff829dd080 r SECT_CONTEXT_def_4 +ffffffff829dd210 r SECT_CONTEXT_def_5 +ffffffff829dd230 r SECT_CONTEXT_def_1 +ffffffff829dd9d0 r SECT_CONTEXT_def_3 +ffffffff829ddab0 r SECT_CONTEXT_def_6 +ffffffff829ddb90 r SECT_CONTEXT_def_7 +ffffffff829de018 r SECT_CLEAR_def_1 +ffffffff829de024 r SECT_CTRLCONST_def_1 +ffffffff829de030 r cayman_default_state +ffffffff829df000 r cac_weights_cayman_xt +ffffffff829df128 r cac_weights_cayman_pro +ffffffff829df250 r cac_weights_cayman_le +ffffffff829df380 r cayman_cgcg_cgls_default +ffffffff829df5c0 r cayman_mgcg_default +ffffffff829dff20 r cayman_sysls_default +ffffffff829dfff0 r cayman_cgcg_cgls_enable +ffffffff829e0240 r cayman_cgcg_cgls_disable +ffffffff829e04a0 r cayman_mgcg_enable +ffffffff829e0520 r cayman_mgcg_disable +ffffffff829e05a0 r cayman_sysls_enable +ffffffff829e0670 r cayman_sysls_disable +ffffffff829e1000 r rn50_reg_safe_bm +ffffffff829e11a0 r r100_reg_safe_bm +ffffffff829e2000 r r200_reg_safe_bm +ffffffff829e3000 r r300_reg_safe_bm +ffffffff829e4000 r r420_reg_safe_bm +ffffffff829e6000 r color_formats_table +ffffffff829e6480 r r600_reg_safe_bm +ffffffff829e9000 R r600_utc +ffffffff829e9040 R r600_dtc +ffffffff829e9080 r r600_encode_pci_lane_width.encoded_lanes +ffffffff829eb000 r r100_gfx_ring +ffffffff829eb070 r r300_gfx_ring +ffffffff829eb0e0 r rv515_gfx_ring +ffffffff829eb150 r r600_gfx_ring +ffffffff829eb1c0 r r600_dma_ring +ffffffff829eb230 r rv6xx_uvd_ring +ffffffff829eb2a0 r rv770_uvd_ring +ffffffff829eb310 r evergreen_gfx_ring +ffffffff829eb380 r evergreen_dma_ring +ffffffff829eb3f0 r cayman_gfx_ring +ffffffff829eb460 r cayman_dma_ring +ffffffff829eb4d0 r cayman_uvd_ring +ffffffff829eb540 r trinity_vce_ring +ffffffff829eb5b0 r si_gfx_ring +ffffffff829eb620 r si_dma_ring +ffffffff829eb690 r ci_gfx_ring +ffffffff829eb700 r ci_cp_ring +ffffffff829eb770 r ci_dma_ring +ffffffff829eb7e0 r ci_vce_ring +ffffffff829ec000 r object_connector_convert +ffffffff829ec060 r supported_devices_connector_convert +ffffffff829ec0a0 r supported_devices_connector_object_id_convert +ffffffff829ec0c0 r thermal_controller_names +ffffffff829ec100 r pp_lib_thermal_controller_names +ffffffff829ed000 r pin_offsets +ffffffff829ed020 r radeon_audio_acr.hdmi_predefined_acr +ffffffff829ef000 r thermal_controller_names +ffffffff829ef020 r default_primarydac_adj +ffffffff829ef120 r default_tvdac_adj +ffffffff829ef220 r default_tmds_pll +ffffffff829f0000 r radeon_dp_connector_helper_funcs +ffffffff829f0050 r radeon_vga_connector_helper_funcs +ffffffff829f00a0 r radeon_dvi_connector_helper_funcs +ffffffff829f00f0 r radeon_tv_connector_helper_funcs +ffffffff829f0140 r radeon_lvds_connector_helper_funcs +ffffffff829f0190 r radeon_dp_connector_funcs +ffffffff829f0298 r radeon_lvds_bridge_connector_funcs +ffffffff829f0310 r radeon_vga_connector_funcs +ffffffff829f0388 r radeon_dvi_connector_funcs +ffffffff829f0400 r radeon_edp_connector_funcs +ffffffff829f0478 r radeon_tv_connector_funcs +ffffffff829f04f0 r radeon_lvds_connector_funcs +ffffffff829f1000 r radeon_family_name +ffffffff829f13f0 r radeon_px_quirk_list +ffffffff829f2000 r radeon_fb_funcs +ffffffff829f2018 r radeon_mode_funcs +ffffffff829f2060 r radeon_tmds_pll_enum_list +ffffffff829f2080 r radeon_tv_std_enum_list +ffffffff829f2100 r radeon_underscan_enum_list +ffffffff829f2130 r radeon_audio_enum_list +ffffffff829f2160 r radeon_dither_enum_list +ffffffff829f2180 r radeon_output_csc_enum_list +ffffffff829f21c0 r radeon_crtc_funcs +ffffffff829f2280 r hpd_names +ffffffff829f22b0 r encoder_names +ffffffff829f23e0 r radeon_afmt_init.eg_offsets +ffffffff829f3000 r aux_offset +ffffffff829f4000 R radeondrm_ca +ffffffff829f4030 r pciidlist +ffffffff829f81d0 r kms_driver +ffffffff829f82c0 r radeon_ioctls_kms +ffffffff829f9000 r radeon_fb_helper_funcs +ffffffff829f9008 r radeonfb_ops +ffffffff829fa000 R radeon_fence_ops +ffffffff829fc000 R radeon_gem_object_funcs +ffffffff829fc060 r radeon_gem_vm_ops +ffffffff829fd000 r radeon_i2c_algo +ffffffff829fd010 r radeon_atom_i2c_algo +ffffffff829fe000 r legacy_helper_funcs +ffffffff829ff000 r radeon_backlight_ops +ffffffff829ff018 r radeon_legacy_lvds_enc_funcs +ffffffff829ff038 r radeon_legacy_lvds_helper_funcs +ffffffff829ff0a0 r radeon_legacy_tmds_int_enc_funcs +ffffffff829ff0c0 r radeon_legacy_tmds_int_helper_funcs +ffffffff829ff128 r radeon_legacy_primary_dac_enc_funcs +ffffffff829ff148 r radeon_legacy_primary_dac_helper_funcs +ffffffff829ff1b0 r radeon_legacy_tv_dac_enc_funcs +ffffffff829ff1d0 r radeon_legacy_tv_dac_helper_funcs +ffffffff829ff238 r radeon_legacy_tmds_ext_enc_funcs +ffffffff829ff258 r radeon_legacy_tmds_ext_helper_funcs +ffffffff82a00000 r SLOPE_value +ffffffff82a00030 r YCOEF_EN_value +ffffffff82a00060 r YCOEF_value +ffffffff82a00090 r available_tv_modes +ffffffff82a00110 r hor_timing_NTSC +ffffffff82a00150 r vert_timing_NTSC +ffffffff82a00190 r hor_timing_PAL +ffffffff82a001d0 r vert_timing_PAL +ffffffff82a02000 r radeon_pm_state_type_name +ffffffff82a03000 r radeon_evict_flags.placements +ffffffff82a06000 r rs600_reg_safe_bm +ffffffff82a08000 r rv515_reg_safe_bm +ffffffff82a09000 r dll_speed_table +ffffffff82a0a000 r r7xx_golden_registers +ffffffff82a0a090 r r7xx_golden_dyn_gpr_registers +ffffffff82a0a100 r rv770ce_golden_registers +ffffffff82a0a160 r rv770_golden_registers +ffffffff82a0a1b0 r rv770_mgcg_init +ffffffff82a0a8f0 r rv730_golden_registers +ffffffff82a0a950 r rv730_mgcg_init +ffffffff82a0aee0 r rv710_golden_registers +ffffffff82a0af30 r rv710_mgcg_init +ffffffff82a0b1d0 r rv740_golden_registers +ffffffff82a0b360 r rv740_mgcg_init +ffffffff82a0d000 r rv730_smc_int_vectors +ffffffff82a0d040 r rv710_smc_int_vectors +ffffffff82a0d080 r rv740_smc_int_vectors +ffffffff82a0d0c0 r cypress_smc_int_vectors +ffffffff82a0d100 r caicos_smc_int_vectors +ffffffff82a0d140 r cayman_smc_int_vectors +ffffffff82a0e000 r tahiti_io_mc_regs +ffffffff82a0e120 r pitcairn_io_mc_regs +ffffffff82a0e240 r verde_io_mc_regs +ffffffff82a0e360 r oland_io_mc_regs +ffffffff82a0e480 r hainan_io_mc_regs +ffffffff82a0e5a0 r crtc_offsets +ffffffff82a0e5c0 r si_disp_int_status +ffffffff82a0e5e0 r tahiti_golden_registers +ffffffff82a0e760 r tahiti_golden_rlc_registers +ffffffff82a0e7b0 r tahiti_mgcg_cgcg_init +ffffffff82a0ed98 r tahiti_golden_registers2 +ffffffff82a0edb0 r pitcairn_golden_registers +ffffffff82a0ef00 r pitcairn_golden_rlc_registers +ffffffff82a0ef40 r pitcairn_mgcg_cgcg_init +ffffffff82a0f3b0 r verde_golden_registers +ffffffff82a0f620 r verde_golden_rlc_registers +ffffffff82a0f660 r verde_mgcg_cgcg_init +ffffffff82a0fae0 r oland_golden_registers +ffffffff82a0fc30 r oland_golden_rlc_registers +ffffffff82a0fc70 r oland_mgcg_cgcg_init +ffffffff82a10000 r hainan_golden_registers +ffffffff82a1012c r hainan_golden_registers2 +ffffffff82a10140 r hainan_mgcg_cgcg_init +ffffffff82a104b0 r verde_rlc_save_restore_register_list +ffffffff82a10820 r si_cs_data +ffffffff82a10840 r si_SECT_CONTEXT_defs +ffffffff82a108c0 r si_SECT_CONTEXT_def_1 +ffffffff82a10c10 r si_SECT_CONTEXT_def_3 +ffffffff82a10c30 r si_SECT_CONTEXT_def_4 +ffffffff82a10ea4 r si_SECT_CONTEXT_def_5 +ffffffff82a10ea8 r si_SECT_CONTEXT_def_6 +ffffffff82a10eb0 r si_SECT_CONTEXT_def_2 +ffffffff82a112f0 r si_SECT_CONTEXT_def_7 +ffffffff82a116a0 r mc_cg_registers +ffffffff82a116d0 r si_default_state +ffffffff82a12000 r cac_weights_tahiti +ffffffff82a124d0 r lcac_tahiti +ffffffff82a12ba0 r cac_override_tahiti +ffffffff82a12bb4 r powertune_data_tahiti +ffffffff82a12bf0 r dte_data_tahiti +ffffffff82a12cc0 r dte_data_new_zealand +ffffffff82a12d90 r dte_data_malta +ffffffff82a12e60 r lcac_pitcairn +ffffffff82a13530 r cac_override_pitcairn +ffffffff82a13544 r powertune_data_pitcairn +ffffffff82a13580 r lcac_cape_verde +ffffffff82a139d0 r cac_override_cape_verde +ffffffff82a139e4 r powertune_data_cape_verde +ffffffff82a13a20 r cac_weights_cape_verde_pro +ffffffff82a13ef0 r cac_weights_heathrow +ffffffff82a143c0 r cac_weights_chelsea_xt +ffffffff82a14890 r cac_weights_chelsea_pro +ffffffff82a14d60 r cac_weights_cape_verde +ffffffff82a15230 r cac_weights_mars_pro +ffffffff82a15700 r lcac_mars_pro +ffffffff82a15a60 r cac_override_oland +ffffffff82a15a74 r powertune_data_mars_pro +ffffffff82a15ab0 r cac_weights_mars_xt +ffffffff82a15f80 r cac_weights_oland_pro +ffffffff82a16450 r cac_weights_oland_xt +ffffffff82a16920 r lcac_oland +ffffffff82a16c7c r powertune_data_oland +ffffffff82a16cb8 r dte_data_oland +ffffffff82a16d90 r cac_weights_hainan +ffffffff82a17254 r powertune_data_hainan +ffffffff82a17290 r dte_data_aruba_pro +ffffffff82a17360 r dte_data_tahiti_pro +ffffffff82a17430 r dte_data_curacao_pro +ffffffff82a17500 r dte_data_neptune_xt +ffffffff82a175d0 r dte_data_sun_xt +ffffffff82a176a0 r dte_data_venus_xtx +ffffffff82a17770 r dte_data_venus_xt +ffffffff82a17840 r dte_data_venus_pro +ffffffff82a17910 r dte_data_mars_pro +ffffffff82a18000 r si_program_jump_on_start.data +ffffffff82a19000 r sumo_dtc +ffffffff82a1a000 r trinity_mgcg_shls_default +ffffffff82a1a380 r trinity_sysls_enable +ffffffff82a1a450 r trinity_sysls_disable +ffffffff82a1c000 r GC_BASE +ffffffff82a1c0a8 r HDP_BASE +ffffffff82a1c150 r MMHUB_BASE +ffffffff82a1c1f8 r ATHUB_BASE +ffffffff82a1c2a0 r NBIO_BASE +ffffffff82a1c348 r MP0_BASE +ffffffff82a1c3f0 r MP1_BASE +ffffffff82a1c498 r DF_BASE +ffffffff82a1c540 r OSSSYS_BASE +ffffffff82a1c5e8 r SDMA0_BASE +ffffffff82a1c690 r SDMA1_BASE +ffffffff82a1c738 r SDMA2_BASE +ffffffff82a1c7e0 r SDMA3_BASE +ffffffff82a1c888 r SDMA4_BASE +ffffffff82a1c930 r SMUIO_BASE +ffffffff82a1c9d8 r THM_BASE +ffffffff82a1ca80 r UMC_BASE +ffffffff82a1cb28 r VCN_BASE +ffffffff82a1d000 r amdgpu_afmt_predefined_acr +ffffffff82a1e000 r atom_op_names +ffffffff82a1e3e0 r opcode_table +ffffffff82a1ebd0 r atom_dst_to_src +ffffffff82a1ec50 r atom_io_names +ffffffff82a1ec80 r atom_table_names +ffffffff82a1eed0 r atom_iio_len +ffffffff82a1f000 r object_connector_convert +ffffffff82a1f058 R amdgpu_vbios_version_attr_group +ffffffff82a20000 r voltage_names +ffffffff82a20020 r pre_emph_names +ffffffff82a21000 r amdgpu_atombios_encoder_backlight_ops +ffffffff82a23000 r amdgpu_benchmark.common_modes +ffffffff82a24000 r amdgpu_cgs_ops +ffffffff82a25000 r amdgpu_connector_dp_helper_funcs +ffffffff82a25050 r amdgpu_connector_vga_helper_funcs +ffffffff82a250a0 r amdgpu_connector_dvi_helper_funcs +ffffffff82a250f0 r amdgpu_connector_lvds_helper_funcs +ffffffff82a25140 r amdgpu_connector_dp_funcs +ffffffff82a251c0 r amdgpu_connector_add_common_modes.common_modes +ffffffff82a25248 r amdgpu_connector_edp_funcs +ffffffff82a252c0 r amdgpu_connector_vga_funcs +ffffffff82a25338 r amdgpu_connector_dvi_funcs +ffffffff82a253b0 r amdgpu_connector_lvds_funcs +ffffffff82a27000 R amdgpu_ctx_num_entities +ffffffff82a28000 r amdgpu_kms_driver +ffffffff82a280f0 r amdgpu_device_ip_reinit_late_sriov.ip_order +ffffffff82a29000 r hw_id_map +ffffffff82a29090 r hw_id_names +ffffffff82a2a000 r hpd_names +ffffffff82a2a030 r encoder_names +ffffffff82a2a180 r dcc_retile_formats +ffffffff82a2a270 r dcc_formats +ffffffff82a2a360 R amdgpu_mode_funcs +ffffffff82a2a3b0 r amdgpu_underscan_enum_list +ffffffff82a2a3e0 r amdgpu_audio_enum_list +ffffffff82a2a410 r amdgpu_dither_enum_list +ffffffff82a2a430 r amdgpu_fb_funcs +ffffffff82a2b000 R amdgpu_dmabuf_ops +ffffffff82a2c000 R amdgpu_ioctls_kms +ffffffff82a2c210 R amdgpu_ca +ffffffff82a2c240 r pciidlist +ffffffff82a2d110 r amdgpu_unsupported_pciidlist +ffffffff82a2d690 r amdgpu_kms_driver +ffffffff82a2e000 r amdgpu_job_fence_ops +ffffffff82a2e038 r amdgpu_fence_ops +ffffffff82a2f000 r amdgpu_gem_object_funcs +ffffffff82a2f060 r amdgpu_gem_vm_ops +ffffffff82a31000 R amdgpu_gtt_mgr_attr_group +ffffffff82a31018 r amdgpu_gtt_mgr_func +ffffffff82a32000 r amdgpu_atombios_i2c_algo +ffffffff82a33000 R amdgpu_sched_ops +ffffffff82a36000 r amdgpu_vram_names +ffffffff82a37000 r amdgpu_preempt_mgr_func +ffffffff82a38000 R psp_ip_funcs +ffffffff82a380a0 R psp_v3_1_ip_block +ffffffff82a380b8 R psp_v10_0_ip_block +ffffffff82a380d0 R psp_v11_0_ip_block +ffffffff82a380e8 R psp_v11_0_8_ip_block +ffffffff82a38100 R psp_v12_0_ip_block +ffffffff82a38118 R psp_v13_0_ip_block +ffffffff82a38130 R psp_v13_0_4_ip_block +ffffffff82a3a000 r amdgpu_evict_flags.placements +ffffffff82a3e000 R amdgpu_vkms_ip_block +ffffffff82a40000 R amdgpu_vm_cpu_funcs +ffffffff82a42000 R amdgpu_vm_sdma_funcs +ffffffff82a43000 R amdgpu_vram_mgr_attr_group +ffffffff82a43018 r amdgpu_vram_mgr_func +ffffffff82a44000 r xgmi_pcs_err_status_reg_arct +ffffffff82a45000 r GC_BASE +ffffffff82a450c0 r HDP_BASE +ffffffff82a45180 r MMHUB_BASE +ffffffff82a45240 r ATHUB_BASE +ffffffff82a45300 r NBIF0_BASE +ffffffff82a453c0 r MP0_BASE +ffffffff82a45480 r MP1_BASE +ffffffff82a45540 r UVD_BASE +ffffffff82a45600 r DF_BASE +ffffffff82a456c0 r OSSSYS_BASE +ffffffff82a45780 r SDMA0_BASE +ffffffff82a45840 r SDMA1_BASE +ffffffff82a45900 r SDMA2_BASE +ffffffff82a459c0 r SDMA3_BASE +ffffffff82a45a80 r SDMA4_BASE +ffffffff82a45b40 r SDMA5_BASE +ffffffff82a45c00 r SDMA6_BASE +ffffffff82a45cc0 r SDMA7_BASE +ffffffff82a45d80 r SMUIO_BASE +ffffffff82a45e40 r THM_BASE +ffffffff82a45f00 r UMC_BASE +ffffffff82a45fc0 r RSMU_BASE +ffffffff82a47000 r cz_ih_ip_funcs +ffffffff82a470a0 R cz_ih_ip_block +ffffffff82a470b8 r cz_ih_funcs +ffffffff82a48000 r crtc_offsets +ffffffff82a48020 r dce_v10_0_ip_funcs +ffffffff82a480c0 R dce_v10_0_ip_block +ffffffff82a480d8 R dce_v10_1_ip_block +ffffffff82a480f0 r dce_v10_0_display_funcs +ffffffff82a48150 r hpd_offsets +ffffffff82a48168 r dce_v10_0_encoder_funcs +ffffffff82a48188 r dce_v10_0_dac_helper_funcs +ffffffff82a481f0 r dce_v10_0_dig_helper_funcs +ffffffff82a48258 r dce_v10_0_ext_helper_funcs +ffffffff82a482c0 r dce_v10_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82a482f0 r dce_v10_0_crtc_irq_funcs +ffffffff82a48300 r dce_v10_0_pageflip_irq_funcs +ffffffff82a48310 r dce_v10_0_hpd_irq_funcs +ffffffff82a48320 r interrupt_status_offsets +ffffffff82a48380 r dce_v10_0_crtc_funcs +ffffffff82a48440 r dce_v10_0_crtc_helper_funcs +ffffffff82a484c0 r vga_control_regs +ffffffff82a484e0 r dig_offsets +ffffffff82a48500 r pin_offsets +ffffffff82a48520 r fiji_mgcg_cgcg_init +ffffffff82a48540 r golden_settings_fiji_a10 +ffffffff82a48570 r tonga_mgcg_cgcg_init +ffffffff82a48590 r golden_settings_tonga_a11 ffffffff82a49000 r crtc_offsets -ffffffff82a49020 r dce_v10_0_ip_funcs -ffffffff82a490c0 R dce_v10_0_ip_block -ffffffff82a490d8 R dce_v10_1_ip_block -ffffffff82a490f0 r dce_v10_0_display_funcs +ffffffff82a49020 r dce_v11_0_ip_funcs +ffffffff82a490c0 R dce_v11_0_ip_block +ffffffff82a490d8 R dce_v11_2_ip_block +ffffffff82a490f0 r dce_v11_0_display_funcs ffffffff82a49150 r hpd_offsets -ffffffff82a49168 r dce_v10_0_encoder_funcs -ffffffff82a49188 r dce_v10_0_dac_helper_funcs -ffffffff82a491f0 r dce_v10_0_dig_helper_funcs -ffffffff82a49258 r dce_v10_0_ext_helper_funcs -ffffffff82a492c0 r dce_v10_0_audio_write_sad_regs.eld_reg_to_type -ffffffff82a492f0 r dce_v10_0_crtc_irq_funcs -ffffffff82a49300 r dce_v10_0_pageflip_irq_funcs -ffffffff82a49310 r dce_v10_0_hpd_irq_funcs +ffffffff82a49168 r dce_v11_0_encoder_funcs +ffffffff82a49188 r dce_v11_0_dac_helper_funcs +ffffffff82a491f0 r dce_v11_0_dig_helper_funcs +ffffffff82a49258 r dce_v11_0_ext_helper_funcs +ffffffff82a492c0 r dce_v11_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82a492f0 r dce_v11_0_crtc_irq_funcs +ffffffff82a49300 r dce_v11_0_pageflip_irq_funcs +ffffffff82a49310 r dce_v11_0_hpd_irq_funcs ffffffff82a49320 r interrupt_status_offsets -ffffffff82a49380 r dce_v10_0_crtc_funcs -ffffffff82a49440 r dce_v10_0_crtc_helper_funcs +ffffffff82a49380 r dce_v11_0_crtc_funcs +ffffffff82a49440 r dce_v11_0_crtc_helper_funcs ffffffff82a494c0 r vga_control_regs ffffffff82a494e0 r dig_offsets -ffffffff82a49500 r pin_offsets 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-ffffffff82a4a510 r cz_mgcg_cgcg_init -ffffffff82a4a530 r cz_golden_settings_a11 -ffffffff82a4a550 r stoney_golden_settings_a11 -ffffffff82a4a570 r polaris11_golden_settings_a11 -ffffffff82a4a5b0 r polaris10_golden_settings_a11 -ffffffff82a4b000 R df_v1_7_funcs -ffffffff82a4b070 r df_v1_7_channel_number -ffffffff82a4c000 R df_v3_6_funcs -ffffffff82a4c070 r df_v3_6_channel_number -ffffffff82a4d000 r GC_BASE -ffffffff82a4d0a8 r HDP_BASE -ffffffff82a4d150 r MMHUB_BASE -ffffffff82a4d1f8 r ATHUB_BASE -ffffffff82a4d2a0 r NBIO_BASE -ffffffff82a4d348 r MP0_BASE -ffffffff82a4d3f0 r MP1_BASE -ffffffff82a4d498 r VCN0_BASE -ffffffff82a4d540 r DF_BASE -ffffffff82a4d5e8 r DCN_BASE -ffffffff82a4d690 r OSSSYS_BASE -ffffffff82a4d738 r SMUIO_BASE -ffffffff82a4d7e0 r THM_BASE -ffffffff82a4e000 r gfx_v10_0_ip_funcs -ffffffff82a4e0a0 R gfx_v10_0_ip_block -ffffffff82a4e0b8 r gfx_v10_0_kiq_pm4_funcs -ffffffff82a4e0f8 r gfx_v10_0_ring_funcs_kiq -ffffffff82a4e218 r gfx_v10_0_ring_funcs_gfx -ffffffff82a4e338 r gfx_v10_0_ring_funcs_compute -ffffffff82a4e458 r gfx_v10_0_eop_irq_funcs -ffffffff82a4e468 r gfx_v10_0_kiq_irq_funcs -ffffffff82a4e478 r gfx_v10_0_priv_reg_irq_funcs -ffffffff82a4e488 r gfx_v10_0_priv_inst_irq_funcs -ffffffff82a4e498 r gfx_v10_0_rlc_funcs -ffffffff82a4e500 r gfx_v10_0_rlc_funcs_sriov -ffffffff82a4e570 r gfx10_cs_data -ffffffff82a4e590 r gfx10_SECT_CONTEXT_defs -ffffffff82a4e620 r gfx10_SECT_CONTEXT_def_1 -ffffffff82a4e980 r gfx10_SECT_CONTEXT_def_3 -ffffffff82a4e990 r gfx10_SECT_CONTEXT_def_4 -ffffffff82a4ec08 r gfx10_SECT_CONTEXT_def_5 -ffffffff82a4ec10 r gfx10_SECT_CONTEXT_def_6 -ffffffff82a4ec20 r gfx10_SECT_CONTEXT_def_2 -ffffffff82a4f060 r gfx10_SECT_CONTEXT_def_7 -ffffffff82a4f170 r gfx10_SECT_CONTEXT_def_8 -ffffffff82a4f4a0 r gfx_v10_0_gfx_funcs -ffffffff82a4f4e0 r golden_settings_gc_rlc_spm_10_0_nv10 -ffffffff82a55780 r golden_settings_gc_rlc_spm_10_1_nv14 -ffffffff82a591a0 r golden_settings_gc_rlc_spm_10_1_2_nv12 -ffffffff82a5f440 r golden_settings_gc_10_1 -ffffffff82a5f800 r golden_settings_gc_10_0_nv10 -ffffffff82a5f800 r golden_settings_gc_10_1_1 -ffffffff82a5fb90 r golden_settings_gc_10_1_2 -ffffffff82a5fb90 r golden_settings_gc_10_1_nv14 -ffffffff82a5ff80 r golden_settings_gc_10_1_2_nv12 -ffffffff82a5ff80 r golden_settings_gc_10_3 -ffffffff82a60388 r golden_settings_gc_10_3_sienna_cichlid -ffffffff82a60390 r golden_settings_gc_10_3_2 -ffffffff82a60780 r golden_settings_gc_10_3_vangogh -ffffffff82a609e0 r golden_settings_gc_10_3_3 -ffffffff82a60bc0 r golden_settings_gc_10_3_4 -ffffffff82a60f20 r golden_settings_gc_10_3_5 -ffffffff82a61220 r golden_settings_gc_10_0_cyan_skillfish -ffffffff82a61550 r golden_settings_gc_10_3_6 -ffffffff82a61760 r golden_settings_gc_10_3_7 -ffffffff82a62000 r gfx_v11_0_ip_funcs -ffffffff82a620a0 R gfx_v11_0_ip_block -ffffffff82a620b8 r gfx_v11_0_kiq_pm4_funcs -ffffffff82a620f8 r gfx_v11_0_ring_funcs_kiq -ffffffff82a62218 r gfx_v11_0_ring_funcs_gfx -ffffffff82a62338 r gfx_v11_0_ring_funcs_compute -ffffffff82a62458 r gfx_v11_0_eop_irq_funcs -ffffffff82a62468 r gfx_v11_0_priv_reg_irq_funcs -ffffffff82a62478 r gfx_v11_0_priv_inst_irq_funcs -ffffffff82a62488 r gfx_v11_0_rlc_funcs -ffffffff82a624f0 r gfx11_cs_data -ffffffff82a62510 r gfx11_SECT_CONTEXT_defs -ffffffff82a62590 r gfx11_SECT_CONTEXT_def_1 -ffffffff82a628f0 r gfx11_SECT_CONTEXT_def_3 -ffffffff82a62900 r gfx11_SECT_CONTEXT_def_5 -ffffffff82a62908 r gfx11_SECT_CONTEXT_def_6 -ffffffff82a62910 r gfx11_SECT_CONTEXT_def_2 -ffffffff82a62d50 r gfx11_SECT_CONTEXT_def_4 -ffffffff82a62fd0 r gfx11_SECT_CONTEXT_def_7 -ffffffff82a63438 r gfx_v11_0_gfx_funcs -ffffffff82a63480 r golden_settings_gc_11_0_1 -ffffffff82a64000 r gfx_v8_0_ip_funcs -ffffffff82a640a0 R gfx_v8_0_ip_block -ffffffff82a640b8 R gfx_v8_1_ip_block -ffffffff82a640d0 r gfx_v8_0_gfx_funcs -ffffffff82a64110 r gfx_v8_0_ring_funcs_kiq -ffffffff82a64230 r gfx_v8_0_ring_funcs_gfx -ffffffff82a64350 r gfx_v8_0_ring_funcs_compute -ffffffff82a64470 r amdgpu_gds_reg_offset -ffffffff82a64570 r gfx_v8_0_eop_irq_funcs -ffffffff82a64580 r gfx_v8_0_priv_reg_irq_funcs -ffffffff82a64590 r gfx_v8_0_priv_inst_irq_funcs -ffffffff82a645a0 r gfx_v8_0_cp_ecc_error_irq_funcs -ffffffff82a645b0 r gfx_v8_0_sq_irq_funcs -ffffffff82a645c0 r sq_edc_source_names -ffffffff82a645f8 r iceland_rlc_funcs -ffffffff82a64660 r vi_cs_data -ffffffff82a64680 r vi_SECT_CONTEXT_defs -ffffffff82a64700 r vi_SECT_CONTEXT_def_1 -ffffffff82a64a50 r vi_SECT_CONTEXT_def_3 -ffffffff82a64a70 r vi_SECT_CONTEXT_def_4 -ffffffff82a64ce4 r vi_SECT_CONTEXT_def_5 -ffffffff82a64cec r vi_SECT_CONTEXT_def_6 -ffffffff82a64cf0 r vi_SECT_CONTEXT_def_2 -ffffffff82a65140 r vi_SECT_CONTEXT_def_7 -ffffffff82a654f0 r vgpr_init_compute_shader -ffffffff82a65600 r vgpr_init_regs -ffffffff82a65690 r sgpr1_init_regs -ffffffff82a65720 r sgpr2_init_regs -ffffffff82a657b0 r sec_ded_counter_registers -ffffffff82a65820 r iceland_mgcg_cgcg_init -ffffffff82a65b20 r golden_settings_iceland_a11 -ffffffff82a65be0 r iceland_golden_common_all -ffffffff82a65c40 r fiji_mgcg_cgcg_init -ffffffff82a65df0 r golden_settings_fiji_a10 -ffffffff82a65e80 r fiji_golden_common_all -ffffffff82a65f00 r tonga_mgcg_cgcg_init -ffffffff82a66290 r golden_settings_tonga_a11 -ffffffff82a66350 r tonga_golden_common_all -ffffffff82a663b0 r golden_settings_vegam_a11 -ffffffff82a66480 r vegam_golden_common_all -ffffffff82a664d0 r golden_settings_polaris11_a11 -ffffffff82a665a0 r polaris11_golden_common_all -ffffffff82a665f0 r golden_settings_polaris10_a11 -ffffffff82a666c0 r polaris10_golden_common_all -ffffffff82a66720 r cz_mgcg_cgcg_init -ffffffff82a66ab0 r cz_golden_settings_a11 -ffffffff82a66b40 r cz_golden_common_all -ffffffff82a66ba0 r stoney_mgcg_cgcg_init -ffffffff82a66be0 r stoney_golden_settings_a11 -ffffffff82a66c60 r stoney_golden_common_all -ffffffff82a67000 R gfx_v9_0_ras_ops -ffffffff82a67040 r gfx_v9_0_ip_funcs -ffffffff82a670e0 R gfx_v9_0_ip_block -ffffffff82a67100 r ras_gfx_subblocks -ffffffff82a67b80 r gfx_v9_0_edc_counter_regs -ffffffff82a67f20 r gfx_v9_0_ras_fields -ffffffff82a69000 r gfx_v9_0_kiq_pm4_funcs -ffffffff82a69040 r gfx_v9_0_ring_funcs_kiq -ffffffff82a69160 r gfx_v9_0_ring_funcs_gfx -ffffffff82a69280 r gfx_v9_0_ring_funcs_compute -ffffffff82a693a0 r gfx_v9_0_eop_irq_funcs -ffffffff82a693b0 r gfx_v9_0_priv_reg_irq_funcs -ffffffff82a693c0 r gfx_v9_0_priv_inst_irq_funcs -ffffffff82a693d0 r gfx_v9_0_cp_ecc_error_irq_funcs -ffffffff82a693e0 r gfx_v9_0_rlc_funcs -ffffffff82a69450 r gfx9_cs_data -ffffffff82a69470 r gfx9_SECT_CONTEXT_defs -ffffffff82a69500 r gfx9_SECT_CONTEXT_def_1 -ffffffff82a69850 r gfx9_SECT_CONTEXT_def_3 -ffffffff82a69860 r gfx9_SECT_CONTEXT_def_4 -ffffffff82a69ad4 r gfx9_SECT_CONTEXT_def_5 -ffffffff82a69adc r gfx9_SECT_CONTEXT_def_6 -ffffffff82a69ae0 r gfx9_SECT_CONTEXT_def_7 -ffffffff82a69bf0 r gfx9_SECT_CONTEXT_def_2 -ffffffff82a6a060 r gfx9_SECT_CONTEXT_def_8 -ffffffff82a6a2d0 r vgpr_init_compute_shader_arcturus -ffffffff82a6ab60 r vgpr_init_regs_arcturus -ffffffff82a6acf0 r vgpr_init_regs -ffffffff82a6ae80 r sgpr1_init_regs -ffffffff82a6b010 r sgpr2_init_regs -ffffffff82a6b198 r gfx_v9_0_gfx_funcs -ffffffff82a6b1e0 r golden_settings_gc_9_0 -ffffffff82a6b3c0 r golden_settings_gc_9_0_vg10 -ffffffff82a6b570 r golden_settings_gc_9_2_1 -ffffffff82a6b6f0 r golden_settings_gc_9_2_1_vg12 -ffffffff82a6b830 r golden_settings_gc_9_0_vg20 -ffffffff82a6b940 r golden_settings_gc_9_4_1_arct -ffffffff82a6ba50 r golden_settings_gc_9_1 -ffffffff82a6bc90 r golden_settings_gc_9_1_rv2 -ffffffff82a6be60 r golden_settings_gc_9_1_rv1 -ffffffff82a6bf10 r golden_settings_gc_9_1_rn -ffffffff82a6c030 r golden_settings_gc_9_x_common -ffffffff82a6d000 R gfx_v9_4_ras_ops -ffffffff82a6d040 r gfx_v9_4_edc_counter_regs -ffffffff82a6d420 r gfx_v9_4_ras_fields -ffffffff82a6f000 R vgpr_init_regs_aldebaran -ffffffff82a6f1b0 R sgpr112_init_regs_aldebaran -ffffffff82a6f360 R sgpr96_init_regs_aldebaran -ffffffff82a6f510 R sgpr64_init_regs_aldebaran -ffffffff82a6f6c0 r golden_settings_gc_9_4_2_alde -ffffffff82a6f720 r golden_settings_gc_9_4_2_alde_die_0 -ffffffff82a6f7b0 r golden_settings_gc_9_4_2_alde_die_1 -ffffffff82a6f840 r sgpr112_init_compute_shader_aldebaran -ffffffff82a6fa60 r sgpr96_init_compute_shader_aldebaran -ffffffff82a6fc50 r sgpr64_init_compute_shader_aldebaran -ffffffff82a6fdc0 r vgpr_init_compute_shader_aldebaran -ffffffff82a706a0 r gfx_v9_4_2_edc_counter_regs -ffffffff82a70a20 r gfx_v9_4_2_ras_fields -ffffffff82a723c0 r gfx_v9_4_2_utc_blocks -ffffffff82a73000 R gfxhub_v1_0_funcs -ffffffff82a74000 R gfxhub_v2_0_funcs -ffffffff82a74060 r gfxhub_v2_0_vmhub_funcs +ffffffff82a49510 r cz_mgcg_cgcg_init +ffffffff82a49530 r cz_golden_settings_a11 +ffffffff82a49550 r stoney_golden_settings_a11 +ffffffff82a49570 r polaris11_golden_settings_a11 +ffffffff82a495b0 r polaris10_golden_settings_a11 +ffffffff82a4a000 R df_v1_7_funcs +ffffffff82a4a070 r df_v1_7_channel_number +ffffffff82a4b000 R df_v3_6_funcs +ffffffff82a4b070 r df_v3_6_channel_number +ffffffff82a4c000 r GC_BASE +ffffffff82a4c0a8 r HDP_BASE +ffffffff82a4c150 r MMHUB_BASE +ffffffff82a4c1f8 r ATHUB_BASE +ffffffff82a4c2a0 r NBIO_BASE +ffffffff82a4c348 r MP0_BASE +ffffffff82a4c3f0 r MP1_BASE +ffffffff82a4c498 r VCN0_BASE +ffffffff82a4c540 r DF_BASE +ffffffff82a4c5e8 r DCN_BASE +ffffffff82a4c690 r OSSSYS_BASE +ffffffff82a4c738 r SMUIO_BASE +ffffffff82a4c7e0 r THM_BASE +ffffffff82a4d000 r gfx_v10_0_ip_funcs +ffffffff82a4d0a0 R gfx_v10_0_ip_block +ffffffff82a4d0b8 r gfx_v10_0_kiq_pm4_funcs +ffffffff82a4d0f8 r gfx_v10_0_ring_funcs_kiq +ffffffff82a4d218 r gfx_v10_0_ring_funcs_gfx +ffffffff82a4d338 r gfx_v10_0_ring_funcs_compute +ffffffff82a4d458 r gfx_v10_0_eop_irq_funcs +ffffffff82a4d468 r gfx_v10_0_kiq_irq_funcs +ffffffff82a4d478 r gfx_v10_0_priv_reg_irq_funcs +ffffffff82a4d488 r gfx_v10_0_priv_inst_irq_funcs +ffffffff82a4d498 r gfx_v10_0_rlc_funcs +ffffffff82a4d500 r gfx_v10_0_rlc_funcs_sriov +ffffffff82a4d570 r gfx10_cs_data +ffffffff82a4d590 r gfx10_SECT_CONTEXT_defs +ffffffff82a4d620 r gfx10_SECT_CONTEXT_def_1 +ffffffff82a4d980 r gfx10_SECT_CONTEXT_def_3 +ffffffff82a4d990 r gfx10_SECT_CONTEXT_def_4 +ffffffff82a4dc08 r gfx10_SECT_CONTEXT_def_5 +ffffffff82a4dc10 r gfx10_SECT_CONTEXT_def_6 +ffffffff82a4dc20 r gfx10_SECT_CONTEXT_def_2 +ffffffff82a4e060 r gfx10_SECT_CONTEXT_def_7 +ffffffff82a4e170 r gfx10_SECT_CONTEXT_def_8 +ffffffff82a4e4a0 r gfx_v10_0_gfx_funcs +ffffffff82a4e4e0 r golden_settings_gc_rlc_spm_10_0_nv10 +ffffffff82a54780 r golden_settings_gc_rlc_spm_10_1_nv14 +ffffffff82a581a0 r golden_settings_gc_rlc_spm_10_1_2_nv12 +ffffffff82a5e440 r golden_settings_gc_10_1 +ffffffff82a5e800 r golden_settings_gc_10_0_nv10 +ffffffff82a5e800 r golden_settings_gc_10_1_1 +ffffffff82a5eb90 r golden_settings_gc_10_1_2 +ffffffff82a5eb90 r golden_settings_gc_10_1_nv14 +ffffffff82a5ef80 r golden_settings_gc_10_1_2_nv12 +ffffffff82a5ef80 r golden_settings_gc_10_3 +ffffffff82a5f388 r golden_settings_gc_10_3_sienna_cichlid +ffffffff82a5f390 r golden_settings_gc_10_3_2 +ffffffff82a5f780 r golden_settings_gc_10_3_vangogh +ffffffff82a5f9e0 r golden_settings_gc_10_3_3 +ffffffff82a5fbc0 r golden_settings_gc_10_3_4 +ffffffff82a5ff20 r golden_settings_gc_10_3_5 +ffffffff82a60220 r golden_settings_gc_10_0_cyan_skillfish +ffffffff82a60550 r golden_settings_gc_10_3_6 +ffffffff82a60760 r golden_settings_gc_10_3_7 +ffffffff82a61000 r gfx_v11_0_ip_funcs +ffffffff82a610a0 R gfx_v11_0_ip_block +ffffffff82a610b8 r gfx_v11_0_kiq_pm4_funcs +ffffffff82a610f8 r gfx_v11_0_ring_funcs_kiq +ffffffff82a61218 r gfx_v11_0_ring_funcs_gfx +ffffffff82a61338 r gfx_v11_0_ring_funcs_compute +ffffffff82a61458 r gfx_v11_0_eop_irq_funcs +ffffffff82a61468 r gfx_v11_0_priv_reg_irq_funcs +ffffffff82a61478 r gfx_v11_0_priv_inst_irq_funcs +ffffffff82a61488 r gfx_v11_0_rlc_funcs +ffffffff82a614f0 r gfx11_cs_data +ffffffff82a61510 r gfx11_SECT_CONTEXT_defs +ffffffff82a61590 r gfx11_SECT_CONTEXT_def_1 +ffffffff82a618f0 r gfx11_SECT_CONTEXT_def_3 +ffffffff82a61900 r gfx11_SECT_CONTEXT_def_5 +ffffffff82a61908 r gfx11_SECT_CONTEXT_def_6 +ffffffff82a61910 r gfx11_SECT_CONTEXT_def_2 +ffffffff82a61d50 r gfx11_SECT_CONTEXT_def_4 +ffffffff82a61fd0 r gfx11_SECT_CONTEXT_def_7 +ffffffff82a62438 r gfx_v11_0_gfx_funcs +ffffffff82a62480 r golden_settings_gc_11_0_1 +ffffffff82a63000 r gfx_v8_0_ip_funcs +ffffffff82a630a0 R gfx_v8_0_ip_block +ffffffff82a630b8 R gfx_v8_1_ip_block +ffffffff82a630d0 r gfx_v8_0_gfx_funcs +ffffffff82a63110 r gfx_v8_0_ring_funcs_kiq +ffffffff82a63230 r gfx_v8_0_ring_funcs_gfx +ffffffff82a63350 r gfx_v8_0_ring_funcs_compute +ffffffff82a63470 r amdgpu_gds_reg_offset +ffffffff82a63570 r gfx_v8_0_eop_irq_funcs +ffffffff82a63580 r gfx_v8_0_priv_reg_irq_funcs +ffffffff82a63590 r gfx_v8_0_priv_inst_irq_funcs +ffffffff82a635a0 r gfx_v8_0_cp_ecc_error_irq_funcs +ffffffff82a635b0 r gfx_v8_0_sq_irq_funcs +ffffffff82a635c0 r sq_edc_source_names +ffffffff82a635f8 r iceland_rlc_funcs +ffffffff82a63660 r vi_cs_data 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vegam_golden_common_all +ffffffff82a654d0 r golden_settings_polaris11_a11 +ffffffff82a655a0 r polaris11_golden_common_all +ffffffff82a655f0 r golden_settings_polaris10_a11 +ffffffff82a656c0 r polaris10_golden_common_all +ffffffff82a65720 r cz_mgcg_cgcg_init +ffffffff82a65ab0 r cz_golden_settings_a11 +ffffffff82a65b40 r cz_golden_common_all +ffffffff82a65ba0 r stoney_mgcg_cgcg_init +ffffffff82a65be0 r stoney_golden_settings_a11 +ffffffff82a65c60 r stoney_golden_common_all +ffffffff82a66000 R gfx_v9_0_ras_ops +ffffffff82a66040 r gfx_v9_0_ip_funcs +ffffffff82a660e0 R gfx_v9_0_ip_block +ffffffff82a66100 r ras_gfx_subblocks +ffffffff82a66b80 r gfx_v9_0_edc_counter_regs +ffffffff82a66f20 r gfx_v9_0_ras_fields +ffffffff82a68000 r gfx_v9_0_kiq_pm4_funcs +ffffffff82a68040 r gfx_v9_0_ring_funcs_kiq +ffffffff82a68160 r gfx_v9_0_ring_funcs_gfx +ffffffff82a68280 r gfx_v9_0_ring_funcs_compute +ffffffff82a683a0 r gfx_v9_0_eop_irq_funcs +ffffffff82a683b0 r gfx_v9_0_priv_reg_irq_funcs +ffffffff82a683c0 r gfx_v9_0_priv_inst_irq_funcs +ffffffff82a683d0 r gfx_v9_0_cp_ecc_error_irq_funcs +ffffffff82a683e0 r gfx_v9_0_rlc_funcs +ffffffff82a68450 r gfx9_cs_data +ffffffff82a68470 r gfx9_SECT_CONTEXT_defs +ffffffff82a68500 r gfx9_SECT_CONTEXT_def_1 +ffffffff82a68850 r gfx9_SECT_CONTEXT_def_3 +ffffffff82a68860 r gfx9_SECT_CONTEXT_def_4 +ffffffff82a68ad4 r gfx9_SECT_CONTEXT_def_5 +ffffffff82a68adc r gfx9_SECT_CONTEXT_def_6 +ffffffff82a68ae0 r gfx9_SECT_CONTEXT_def_7 +ffffffff82a68bf0 r gfx9_SECT_CONTEXT_def_2 +ffffffff82a69060 r gfx9_SECT_CONTEXT_def_8 +ffffffff82a692d0 r vgpr_init_compute_shader_arcturus +ffffffff82a69b60 r vgpr_init_regs_arcturus +ffffffff82a69cf0 r vgpr_init_regs +ffffffff82a69e80 r sgpr1_init_regs +ffffffff82a6a010 r sgpr2_init_regs +ffffffff82a6a198 r gfx_v9_0_gfx_funcs +ffffffff82a6a1e0 r golden_settings_gc_9_0 +ffffffff82a6a3c0 r golden_settings_gc_9_0_vg10 +ffffffff82a6a570 r golden_settings_gc_9_2_1 +ffffffff82a6a6f0 r golden_settings_gc_9_2_1_vg12 +ffffffff82a6a830 r golden_settings_gc_9_0_vg20 +ffffffff82a6a940 r golden_settings_gc_9_4_1_arct +ffffffff82a6aa50 r golden_settings_gc_9_1 +ffffffff82a6ac90 r golden_settings_gc_9_1_rv2 +ffffffff82a6ae60 r golden_settings_gc_9_1_rv1 +ffffffff82a6af10 r golden_settings_gc_9_1_rn +ffffffff82a6b030 r golden_settings_gc_9_x_common +ffffffff82a6c000 R gfx_v9_4_ras_ops +ffffffff82a6c040 r gfx_v9_4_edc_counter_regs +ffffffff82a6c420 r gfx_v9_4_ras_fields +ffffffff82a6e000 R vgpr_init_regs_aldebaran +ffffffff82a6e1b0 R sgpr112_init_regs_aldebaran +ffffffff82a6e360 R sgpr96_init_regs_aldebaran +ffffffff82a6e510 R sgpr64_init_regs_aldebaran +ffffffff82a6e6c0 r golden_settings_gc_9_4_2_alde +ffffffff82a6e720 r golden_settings_gc_9_4_2_alde_die_0 +ffffffff82a6e7b0 r golden_settings_gc_9_4_2_alde_die_1 +ffffffff82a6e840 r sgpr112_init_compute_shader_aldebaran +ffffffff82a6ea60 r sgpr96_init_compute_shader_aldebaran +ffffffff82a6ec50 r sgpr64_init_compute_shader_aldebaran +ffffffff82a6edc0 r vgpr_init_compute_shader_aldebaran +ffffffff82a6f6a0 r gfx_v9_4_2_edc_counter_regs +ffffffff82a6fa20 r gfx_v9_4_2_ras_fields +ffffffff82a713c0 r gfx_v9_4_2_utc_blocks +ffffffff82a72000 R gfxhub_v1_0_funcs +ffffffff82a73000 R gfxhub_v2_0_funcs +ffffffff82a73060 r gfxhub_v2_0_vmhub_funcs +ffffffff82a73070 r gfxhub_client_ids +ffffffff82a74000 R gfxhub_v2_1_funcs +ffffffff82a74060 r gfxhub_v2_1_vmhub_funcs ffffffff82a74070 r gfxhub_client_ids -ffffffff82a75000 R gfxhub_v2_1_funcs -ffffffff82a75060 r gfxhub_v2_1_vmhub_funcs +ffffffff82a75000 R gfxhub_v3_0_funcs +ffffffff82a75060 r gfxhub_v3_0_vmhub_funcs ffffffff82a75070 r gfxhub_client_ids -ffffffff82a76000 R gfxhub_v3_0_funcs -ffffffff82a76060 r gfxhub_v3_0_vmhub_funcs +ffffffff82a76000 R gfxhub_v3_0_3_funcs +ffffffff82a76060 r gfxhub_v3_0_3_vmhub_funcs ffffffff82a76070 r gfxhub_client_ids -ffffffff82a77000 R gfxhub_v3_0_3_funcs -ffffffff82a77060 r gfxhub_v3_0_3_vmhub_funcs -ffffffff82a77070 r gfxhub_client_ids -ffffffff82a78000 R gmc_v10_0_ip_funcs -ffffffff82a780a0 R gmc_v10_0_ip_block -ffffffff82a780b8 r gmc_v10_0_gmc_funcs -ffffffff82a78100 r gmc_v10_0_irq_funcs -ffffffff82a78110 r gmc_v10_0_ecc_funcs -ffffffff82a79000 R gmc_v11_0_ip_funcs -ffffffff82a790a0 R gmc_v11_0_ip_block -ffffffff82a790b8 r gmc_v11_0_gmc_funcs -ffffffff82a79100 r gmc_v11_0_irq_funcs -ffffffff82a79110 r gmc_v11_0_ecc_funcs -ffffffff82a7a000 r gmc_v7_0_ip_funcs -ffffffff82a7a0a0 R gmc_v7_0_ip_block -ffffffff82a7a0b8 R gmc_v7_4_ip_block -ffffffff82a7a0d0 r gmc_v7_0_gmc_funcs -ffffffff82a7a118 r gmc_v7_0_irq_funcs -ffffffff82a7a128 r iceland_mgcg_cgcg_init -ffffffff82a7a140 r golden_settings_iceland_a11 -ffffffff82a7a170 r mc_cg_registers -ffffffff82a7a1a0 r mc_cg_en -ffffffff82a7a1d0 r mc_cg_ls_en -ffffffff82a7b000 r gmc_v8_0_ip_funcs -ffffffff82a7b0a0 R gmc_v8_0_ip_block -ffffffff82a7b0b8 R gmc_v8_1_ip_block -ffffffff82a7b0d0 R gmc_v8_5_ip_block -ffffffff82a7b0e8 r gmc_v8_0_gmc_funcs -ffffffff82a7b130 r gmc_v8_0_irq_funcs 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mes_v10_1_ring_funcs -ffffffff82a90000 r mes_v11_0_ip_funcs -ffffffff82a900a0 R mes_v11_0_ip_block -ffffffff82a900b8 r mes_v11_0_funcs -ffffffff82a900e8 r mes_v11_0_ring_funcs -ffffffff82a91000 R mmhub_v1_0_funcs -ffffffff82a91050 r mmhub_v1_0_edc_cnt_regs -ffffffff82a910c0 r mmhub_v1_0_ras_fields -ffffffff82a92000 R mmhub_v1_7_funcs -ffffffff82a92050 r mmhub_v1_7_edc_cnt_regs -ffffffff82a92250 r mmhub_v1_7_ras_fields -ffffffff82a939c0 r mmhub_v1_7_ea_err_status_regs -ffffffff82a94000 R mmhub_v2_0_funcs -ffffffff82a94050 r mmhub_v2_0_vmhub_funcs -ffffffff82a94060 r mmhub_client_ids_navi1x -ffffffff82a94190 r mmhub_client_ids_sienna_cichlid -ffffffff82a94450 r mmhub_client_ids_beige_goby -ffffffff82a95000 R mmhub_v2_3_funcs -ffffffff82a95050 r mmhub_v2_3_vmhub_funcs -ffffffff82a95060 r mmhub_client_ids_vangogh -ffffffff82a96000 R mmhub_v3_0_funcs -ffffffff82a96050 r mmhub_v3_0_vmhub_funcs -ffffffff82a96060 r mmhub_client_ids_v3_0_0 -ffffffff82a97000 R mmhub_v3_0_1_funcs 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nbio_v7_7_hdp_flush_reg -ffffffff82aa6048 R nbio_v7_7_funcs -ffffffff82aa7000 r nv_common_ip_funcs -ffffffff82aa70a0 R nv_common_ip_block -ffffffff82aa70b8 r nv_asic_funcs -ffffffff82aa7170 r nv_allowed_read_registers -ffffffff82aa72f0 r nv_video_codecs_encode -ffffffff82aa7300 r sc_video_codecs_decode -ffffffff82aa7310 r yc_video_codecs_decode -ffffffff82aa7320 r bg_video_codecs_encode -ffffffff82aa7330 r bg_video_codecs_decode -ffffffff82aa7340 r nv_video_codecs_decode -ffffffff82aa7350 r nv_video_codecs_encode_array -ffffffff82aa7380 r sc_video_codecs_decode_array -ffffffff82aa7420 r yc_video_codecs_decode_array -ffffffff82aa7490 r bg_video_codecs_decode_array -ffffffff82aa74d0 r nv_video_codecs_decode_array -ffffffff82aa8000 r psp_v10_0_funcs -ffffffff82aa9000 r psp_v11_0_funcs -ffffffff82aaa000 r psp_v11_0_8_funcs -ffffffff82aab000 r psp_v12_0_funcs -ffffffff82aac000 r psp_v13_0_funcs -ffffffff82aad000 r psp_v13_0_4_funcs -ffffffff82aae000 r psp_v3_1_funcs -ffffffff82aaf000 r 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stoney_mgcg_cgcg_init +ffffffff82a7a290 r golden_settings_stoney_common +ffffffff82a7b000 R gmc_v9_0_ip_funcs +ffffffff82a7b0a0 R gmc_v9_0_ip_block +ffffffff82a7b0b8 r gmc_v9_0_gmc_funcs +ffffffff82a7b100 r gmc_v9_0_irq_funcs +ffffffff82a7b110 r gmc_v9_0_ecc_funcs +ffffffff82a7b120 r gfxhub_client_ids +ffffffff82a7b190 r mmhub_client_ids_vega10 +ffffffff82a7b480 r mmhub_client_ids_vega12 +ffffffff82a7b780 r mmhub_client_ids_vega20 +ffffffff82a7ba70 r mmhub_client_ids_arcturus +ffffffff82a7d280 r mmhub_client_ids_raven +ffffffff82a7d440 r mmhub_client_ids_renoir +ffffffff82a7d630 r mmhub_client_ids_aldebaran +ffffffff82a7ee40 r ecc_umc_mcumc_ctrl_addrs +ffffffff82a7eec0 r ecc_umc_mcumc_ctrl_mask_addrs +ffffffff82a7ef40 r golden_settings_mmhub_1_0_0 +ffffffff82a7ef70 r golden_settings_athub_1_0_0 +ffffffff82a7f000 R hdp_v4_0_funcs +ffffffff82a80000 R hdp_v5_0_funcs +ffffffff82a81000 R hdp_v5_2_funcs +ffffffff82a82000 R hdp_v6_0_funcs +ffffffff82a83000 r iceland_ih_ip_funcs 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+ffffffff82a98330 r mmhub_v9_4_ras_fields +ffffffff82a9a3b0 r mmhub_v9_4_err_status_regs +ffffffff82a9b000 r xgpu_ai_mailbox_ack_irq_funcs +ffffffff82a9b010 r xgpu_ai_mailbox_rcv_irq_funcs +ffffffff82a9b020 R xgpu_ai_virt_ops +ffffffff82a9c000 r xgpu_nv_mailbox_ack_irq_funcs +ffffffff82a9c010 r xgpu_nv_mailbox_rcv_irq_funcs +ffffffff82a9c020 R xgpu_nv_virt_ops +ffffffff82a9d000 r xgpu_fiji_mgcg_cgcg_init +ffffffff82a9d240 r xgpu_fiji_golden_settings_a10 +ffffffff82a9d370 r xgpu_fiji_golden_common_all +ffffffff82a9d3f0 r xgpu_tonga_mgcg_cgcg_init +ffffffff82a9d810 r xgpu_tonga_golden_settings_a11 +ffffffff82a9d9d0 r xgpu_tonga_golden_common_all +ffffffff82a9da28 r xgpu_vi_mailbox_ack_irq_funcs +ffffffff82a9da38 r xgpu_vi_mailbox_rcv_irq_funcs +ffffffff82a9da48 R xgpu_vi_virt_ops +ffffffff82a9e000 r navi10_ih_ip_funcs +ffffffff82a9e0a0 R navi10_ih_ip_block +ffffffff82a9e0b8 r navi10_ih_funcs +ffffffff82a9e0d8 r navi10_ih_self_irq_funcs +ffffffff82a9f000 R nbio_v2_3_hdp_flush_reg +ffffffff82a9f048 R nbio_v2_3_funcs +ffffffff82aa0000 R nbio_v4_3_hdp_flush_reg +ffffffff82aa0048 R nbio_v4_3_funcs +ffffffff82aa0130 R nbio_v4_3_sriov_funcs +ffffffff82aa1000 R nbio_v6_1_hdp_flush_reg +ffffffff82aa1048 R nbio_v6_1_funcs +ffffffff82aa2000 R nbio_v7_0_hdp_flush_reg +ffffffff82aa2048 R nbio_v7_0_funcs +ffffffff82aa3000 R nbio_v7_2_hdp_flush_reg +ffffffff82aa3048 R nbio_v7_2_funcs +ffffffff82aa4000 R nbio_v7_4_hdp_flush_reg +ffffffff82aa4048 R nbio_v7_4_ras_hw_ops +ffffffff82aa4088 R nbio_v7_4_funcs +ffffffff82aa4170 r nbio_v7_4_ras_controller_irq_funcs +ffffffff82aa4180 r nbio_v7_4_ras_err_event_athub_irq_funcs +ffffffff82aa5000 R nbio_v7_7_hdp_flush_reg +ffffffff82aa5048 R nbio_v7_7_funcs +ffffffff82aa6000 r nv_common_ip_funcs +ffffffff82aa60a0 R nv_common_ip_block +ffffffff82aa60b8 r nv_asic_funcs +ffffffff82aa6170 r nv_allowed_read_registers +ffffffff82aa62f0 r nv_video_codecs_encode +ffffffff82aa6300 r sc_video_codecs_decode +ffffffff82aa6310 r yc_video_codecs_decode +ffffffff82aa6320 r bg_video_codecs_encode +ffffffff82aa6330 r bg_video_codecs_decode +ffffffff82aa6340 r nv_video_codecs_decode +ffffffff82aa6350 r nv_video_codecs_encode_array +ffffffff82aa6380 r sc_video_codecs_decode_array +ffffffff82aa6420 r yc_video_codecs_decode_array +ffffffff82aa6490 r bg_video_codecs_decode_array +ffffffff82aa64d0 r nv_video_codecs_decode_array +ffffffff82aa7000 r psp_v10_0_funcs +ffffffff82aa8000 r psp_v11_0_funcs +ffffffff82aa9000 r psp_v11_0_8_funcs +ffffffff82aaa000 r psp_v12_0_funcs +ffffffff82aab000 r psp_v13_0_funcs +ffffffff82aac000 r psp_v13_0_4_funcs +ffffffff82aad000 r psp_v3_1_funcs +ffffffff82aae000 r sdma_v2_4_ip_funcs +ffffffff82aae0a0 R sdma_v2_4_ip_block +ffffffff82aae0b8 r sdma_v2_4_ring_funcs +ffffffff82aae1d8 r sdma_v2_4_buffer_funcs +ffffffff82aae1f8 r sdma_v2_4_vm_pte_funcs +ffffffff82aae218 r sdma_v2_4_trap_irq_funcs +ffffffff82aae228 r sdma_v2_4_illegal_inst_irq_funcs +ffffffff82aae240 r iceland_mgcg_cgcg_init +ffffffff82aae260 r golden_settings_iceland_a11 +ffffffff82aaf000 r sdma_v3_0_ip_funcs +ffffffff82aaf0a0 R sdma_v3_0_ip_block +ffffffff82aaf0b8 R sdma_v3_1_ip_block +ffffffff82aaf0d0 r sdma_v3_0_ring_funcs +ffffffff82aaf1f0 r sdma_v3_0_buffer_funcs +ffffffff82aaf210 r sdma_v3_0_vm_pte_funcs +ffffffff82aaf230 r sdma_v3_0_trap_irq_funcs +ffffffff82aaf240 r sdma_v3_0_illegal_inst_irq_funcs +ffffffff82aaf250 r fiji_mgcg_cgcg_init +ffffffff82aaf270 r golden_settings_fiji_a10 +ffffffff82aaf2d0 r tonga_mgcg_cgcg_init +ffffffff82aaf2f0 r golden_settings_tonga_a11 +ffffffff82aaf370 r golden_settings_polaris11_a11 +ffffffff82aaf3f0 r golden_settings_polaris10_a11 +ffffffff82aaf470 r cz_mgcg_cgcg_init +ffffffff82aaf490 r cz_golden_settings_a11 +ffffffff82aaf520 r stoney_mgcg_cgcg_init +ffffffff82aaf530 r stoney_golden_settings_a11 +ffffffff82ab0000 R sdma_v4_0_ip_funcs +ffffffff82ab00a0 R sdma_v4_0_ras_hw_ops +ffffffff82ab00e0 R sdma_v4_0_ip_block +ffffffff82ab00f8 r sdma_v4_0_ring_funcs_2nd_mmhub +ffffffff82ab0218 r sdma_v4_0_ring_funcs +ffffffff82ab0338 r sdma_v4_0_page_ring_funcs_2nd_mmhub +ffffffff82ab0458 r sdma_v4_0_page_ring_funcs +ffffffff82ab0578 r sdma_v4_0_buffer_funcs +ffffffff82ab0598 r sdma_v4_0_vm_pte_funcs +ffffffff82ab05b8 r sdma_v4_0_trap_irq_funcs +ffffffff82ab05c8 r sdma_v4_0_illegal_inst_irq_funcs +ffffffff82ab05d8 r sdma_v4_0_ecc_irq_funcs +ffffffff82ab05e8 r sdma_v4_0_vm_hole_irq_funcs +ffffffff82ab05f8 r sdma_v4_0_doorbell_invalid_irq_funcs +ffffffff82ab0608 r sdma_v4_0_pool_timeout_irq_funcs +ffffffff82ab0618 r sdma_v4_0_srbm_write_irq_funcs +ffffffff82ab0630 r golden_settings_sdma_4 +ffffffff82ab0890 r golden_settings_sdma_vg10 +ffffffff82ab0940 r golden_settings_sdma_vg12 +ffffffff82ab09f0 r golden_settings_sdma0_4_2_init +ffffffff82ab0a10 r golden_settings_sdma0_4_2 +ffffffff82ab0ca0 r golden_settings_sdma1_4_2 +ffffffff82ab0f30 r golden_settings_sdma_arct +ffffffff82ab1230 r golden_settings_sdma_aldebaran +ffffffff82ab13a0 r golden_settings_sdma_4_1 +ffffffff82ab14b0 r golden_settings_sdma_rv2 +ffffffff82ab14e0 r golden_settings_sdma_rv1 +ffffffff82ab1510 r golden_settings_sdma_4_3 +ffffffff82ab1600 r sdma_v4_0_ras_fields +ffffffff82ab2000 R sdma_v4_4_ras_hw_ops +ffffffff82ab2040 r sdma_v4_4_ras_fields +ffffffff82ab3000 R sdma_v5_0_ip_funcs +ffffffff82ab30a0 R sdma_v5_0_ip_block +ffffffff82ab30b8 r sdma_v5_0_ring_funcs +ffffffff82ab31d8 r sdma_v5_0_buffer_funcs +ffffffff82ab31f8 r sdma_v5_0_vm_pte_funcs +ffffffff82ab3218 r sdma_v5_0_trap_irq_funcs +ffffffff82ab3228 r sdma_v5_0_illegal_inst_irq_funcs +ffffffff82ab3240 r golden_settings_sdma_5 +ffffffff82ab3480 r golden_settings_sdma_nv10 +ffffffff82ab34b0 r golden_settings_sdma_nv14 +ffffffff82ab34e0 r golden_settings_sdma_5_sriov +ffffffff82ab36c0 r golden_settings_sdma_nv12 +ffffffff82ab3750 r golden_settings_sdma_cyan_skillfish +ffffffff82ab4000 R sdma_v5_2_ip_funcs +ffffffff82ab40a0 R sdma_v5_2_ip_block +ffffffff82ab40b8 r sdma_v5_2_ring_funcs +ffffffff82ab41d8 r sdma_v5_2_buffer_funcs +ffffffff82ab41f8 r sdma_v5_2_vm_pte_funcs +ffffffff82ab4218 r sdma_v5_2_trap_irq_funcs +ffffffff82ab4228 r sdma_v5_2_illegal_inst_irq_funcs +ffffffff82ab5000 R sdma_v6_0_ip_funcs +ffffffff82ab50a0 R sdma_v6_0_ip_block +ffffffff82ab50b8 r sdma_v6_0_ring_funcs +ffffffff82ab51d8 r sdma_v6_0_buffer_funcs +ffffffff82ab51f8 r sdma_v6_0_vm_pte_funcs +ffffffff82ab5218 r sdma_v6_0_trap_irq_funcs +ffffffff82ab5228 r sdma_v6_0_illegal_inst_irq_funcs +ffffffff82ab6000 r smu_v11_0_i2c_algo +ffffffff82ab6010 r smu_v11_0_i2c_i2c_lock_ops +ffffffff82ab6028 r smu_v11_0_i2c_control_quirks +ffffffff82ab7000 R smuio_v11_0_funcs +ffffffff82ab8000 R smuio_v11_0_6_funcs +ffffffff82ab9000 R smuio_v13_0_funcs +ffffffff82aba000 R smuio_v13_0_6_funcs +ffffffff82abb000 R smuio_v9_0_funcs +ffffffff82abc000 r soc15_common_ip_funcs +ffffffff82abc0a0 R vega10_common_ip_block +ffffffff82abc0b8 r soc15_asic_funcs +ffffffff82abc170 r vega20_asic_funcs +ffffffff82abc230 r soc15_allowed_read_registers +ffffffff82abc3c0 r vega_video_codecs_encode +ffffffff82abc3d0 r vega_video_codecs_decode +ffffffff82abc3e0 r rv_video_codecs_decode +ffffffff82abc3f0 r rn_video_codecs_decode +ffffffff82abc400 r vega_video_codecs_encode_array +ffffffff82abc430 r vega_video_codecs_decode_array +ffffffff82abc4b0 r rv_video_codecs_decode_array +ffffffff82abc540 r rn_video_codecs_decode_array +ffffffff82abd000 r soc21_common_ip_funcs +ffffffff82abd0a0 R soc21_common_ip_block +ffffffff82abd0b8 r soc21_asic_funcs +ffffffff82abd170 r soc21_allowed_read_registers +ffffffff82abd2f0 r vcn_4_0_0_video_codecs_encode +ffffffff82abd300 r vcn_4_0_0_video_codecs_decode +ffffffff82abd310 r vcn_4_0_0_video_codecs_encode_array +ffffffff82abd340 r vcn_4_0_0_video_codecs_decode_array +ffffffff82abe000 r tonga_ih_ip_funcs +ffffffff82abe0a0 R tonga_ih_ip_block +ffffffff82abe0b8 r tonga_ih_funcs +ffffffff82abf000 R umc_v6_0_funcs +ffffffff82ac0000 R umc_v6_1_channel_idx_tbl +ffffffff82ac0080 R umc_v6_1_ras_hw_ops +ffffffff82ac1000 R umc_v6_7_channel_idx_tbl_second +ffffffff82ac1080 R umc_v6_7_channel_idx_tbl_first +ffffffff82ac1100 R umc_v6_7_ras_hw_ops +ffffffff82ac2000 R umc_v8_10_channelnum_map_colbit_table +ffffffff82ac2040 R umc_v8_10_channel_idx_tbl +ffffffff82ac20a0 R umc_v8_10_ras_hw_ops +ffffffff82ac3000 R umc_v8_7_channel_idx_tbl +ffffffff82ac3040 R umc_v8_7_ras_hw_ops +ffffffff82ac4000 r uvd_v5_0_ip_funcs +ffffffff82ac40a0 R uvd_v5_0_ip_block +ffffffff82ac40b8 r uvd_v5_0_ring_funcs +ffffffff82ac41d8 r uvd_v5_0_irq_funcs +ffffffff82ac5000 r uvd_v6_0_ip_funcs +ffffffff82ac50a0 R uvd_v6_0_ip_block +ffffffff82ac50b8 R uvd_v6_2_ip_block +ffffffff82ac50d0 R uvd_v6_3_ip_block +ffffffff82ac50e8 r uvd_v6_0_ring_vm_funcs +ffffffff82ac5208 r uvd_v6_0_ring_phys_funcs +ffffffff82ac5328 r uvd_v6_0_enc_ring_vm_funcs +ffffffff82ac5448 r uvd_v6_0_irq_funcs +ffffffff82ac6000 R uvd_v7_0_ip_funcs +ffffffff82ac60a0 R uvd_v7_0_ip_block +ffffffff82ac60b8 r uvd_v7_0_ring_vm_funcs +ffffffff82ac61d8 r uvd_v7_0_enc_ring_vm_funcs +ffffffff82ac62f8 r uvd_v7_0_irq_funcs +ffffffff82ac7000 r vce_v3_0_ip_funcs +ffffffff82ac70a0 R vce_v3_0_ip_block +ffffffff82ac70b8 R vce_v3_1_ip_block +ffffffff82ac70d0 R vce_v3_4_ip_block +ffffffff82ac70e8 r vce_v3_0_ring_vm_funcs +ffffffff82ac7208 r vce_v3_0_ring_phys_funcs +ffffffff82ac7328 r vce_v3_0_irq_funcs +ffffffff82ac8000 R vce_v4_0_ip_funcs +ffffffff82ac80a0 R vce_v4_0_ip_block +ffffffff82ac80b8 r vce_v4_0_ring_vm_funcs +ffffffff82ac81d8 r vce_v4_0_irq_funcs +ffffffff82ac9000 r vcn_v1_0_ip_funcs +ffffffff82ac90a0 R vcn_v1_0_ip_block +ffffffff82ac90b8 r vcn_v1_0_dec_ring_vm_funcs +ffffffff82ac91d8 r vcn_v1_0_enc_ring_vm_funcs +ffffffff82ac92f8 r vcn_v1_0_irq_funcs +ffffffff82aca000 r vcn_v2_0_ip_funcs +ffffffff82aca0a0 R vcn_v2_0_ip_block +ffffffff82aca0b8 r vcn_v2_0_dec_ring_vm_funcs +ffffffff82aca1d8 r vcn_v2_0_enc_ring_vm_funcs +ffffffff82aca2f8 r vcn_v2_0_irq_funcs +ffffffff82acb000 r vcn_v2_5_ip_funcs +ffffffff82acb0a0 R vcn_v2_5_ip_block +ffffffff82acb0b8 r vcn_v2_6_ip_funcs +ffffffff82acb158 R vcn_v2_6_ip_block +ffffffff82acb170 R vcn_v2_6_ras_hw_ops +ffffffff82acb1b0 r vcn_v2_5_dec_ring_vm_funcs +ffffffff82acb2d0 r vcn_v2_6_dec_ring_vm_funcs +ffffffff82acb3f0 r vcn_v2_5_enc_ring_vm_funcs +ffffffff82acb510 r vcn_v2_6_enc_ring_vm_funcs +ffffffff82acb630 r vcn_v2_5_irq_funcs +ffffffff82acc000 r vcn_v3_0_ip_funcs +ffffffff82acc0a0 R vcn_v3_0_ip_block +ffffffff82acc0b8 r vcn_v3_0_dec_ring_vm_funcs +ffffffff82acc1d8 r vcn_v3_0_enc_ring_vm_funcs +ffffffff82acc2f8 r vcn_v3_0_irq_funcs +ffffffff82acd000 r vcn_v4_0_ip_funcs +ffffffff82acd0a0 R vcn_v4_0_ip_block +ffffffff82acd0b8 r vcn_v4_0_unified_ring_vm_funcs +ffffffff82acd1d8 r vcn_v4_0_irq_funcs +ffffffff82ace000 R vega10_ih_ip_funcs +ffffffff82ace0a0 R vega10_ih_ip_block +ffffffff82ace0b8 r vega10_ih_funcs +ffffffff82ace0d8 r vega10_ih_self_irq_funcs +ffffffff82acf000 r GC_BASE +ffffffff82acf064 r HDP_BASE +ffffffff82acf0c8 r MMHUB_BASE +ffffffff82acf12c r ATHUB_BASE +ffffffff82acf190 r NBIO_BASE +ffffffff82acf1f4 r MP0_BASE +ffffffff82acf258 r MP1_BASE +ffffffff82acf2bc r VCE_BASE +ffffffff82acf320 r VCN_BASE +ffffffff82acf384 r DF_BASE +ffffffff82acf3e8 r DCE_BASE +ffffffff82acf44c r OSSSYS_BASE +ffffffff82acf4b0 r SDMA0_BASE +ffffffff82acf514 r SDMA1_BASE +ffffffff82acf578 r SMUIO_BASE +ffffffff82acf5dc r PWR_BASE +ffffffff82acf640 r NBIF_BASE +ffffffff82acf6a4 r THM_BASE +ffffffff82acf708 r CLK_BASE +ffffffff82ad0000 R vega20_ih_ip_funcs +ffffffff82ad00a0 R vega20_ih_ip_block +ffffffff82ad00b8 r vega20_ih_funcs +ffffffff82ad00d8 r vega20_ih_self_irq_funcs +ffffffff82ad1000 r GC_BASE +ffffffff82ad1090 r HDP_BASE +ffffffff82ad1120 r MMHUB_BASE +ffffffff82ad11b0 r ATHUB_BASE +ffffffff82ad1240 r NBIO_BASE +ffffffff82ad12d0 r MP0_BASE +ffffffff82ad1360 r MP1_BASE +ffffffff82ad13f0 r UVD_BASE +ffffffff82ad1480 r VCE_BASE +ffffffff82ad1510 r DF_BASE +ffffffff82ad15a0 r DCE_BASE +ffffffff82ad1630 r OSSSYS_BASE +ffffffff82ad16c0 r SDMA0_BASE +ffffffff82ad1750 r SDMA1_BASE +ffffffff82ad17e0 r SMUIO_BASE +ffffffff82ad1870 r THM_BASE +ffffffff82ad1900 r CLK_BASE +ffffffff82ad1990 r UMC_BASE +ffffffff82ad1a20 r RSMU_BASE +ffffffff82ad2000 r vi_common_ip_block +ffffffff82ad2018 r vi_common_ip_funcs +ffffffff82ad20b8 r vi_asic_funcs +ffffffff82ad2170 r vi_allowed_read_registers +ffffffff82ad23d0 r topaz_video_codecs_encode +ffffffff82ad23e0 r topaz_video_codecs_decode +ffffffff82ad23f0 r tonga_video_codecs_encode +ffffffff82ad2400 r tonga_video_codecs_decode +ffffffff82ad2410 r polaris_video_codecs_encode +ffffffff82ad2420 r cz_video_codecs_decode +ffffffff82ad2430 r tonga_video_codecs_encode_array +ffffffff82ad2450 r tonga_video_codecs_decode_array +ffffffff82ad24a0 r polaris_video_codecs_encode_array +ffffffff82ad24d0 r cz_video_codecs_decode_array +ffffffff82ad2550 r iceland_mgcg_cgcg_init +ffffffff82ad2590 r fiji_mgcg_cgcg_init +ffffffff82ad25f0 r tonga_mgcg_cgcg_init +ffffffff82ad2650 r cz_mgcg_cgcg_init +ffffffff82ad2690 r stoney_mgcg_cgcg_init +ffffffff82ad3000 r amdgpu_dm_funcs +ffffffff82ad30a0 R dm_ip_block +ffffffff82ad30b8 R amdgpu_dm_encoder_helper_funcs +ffffffff82ad3120 r dm_display_funcs +ffffffff82ad3180 r hpd_disconnect_quirk_table +ffffffff82ad3ef0 r amdgpu_dm_mode_funcs +ffffffff82ad3f38 r amdgpu_dm_encoder_funcs +ffffffff82ad3f58 r amdgpu_dm_connector_funcs +ffffffff82ad3fd0 r amdgpu_dm_connector_helper_funcs +ffffffff82ad4020 r amdgpu_dm_i2c_algo +ffffffff82ad41f0 r add_fs_modes.common_rates +ffffffff82ad4220 r amdgpu_dm_backlight_ops +ffffffff82ad5000 r amdgpu_dm_crtc_funcs +ffffffff82ad50c0 r amdgpu_dm_crtc_helper_funcs +ffffffff82ad6000 r dm_dtn_log_begin.msg +ffffffff82ad600d r dm_dtn_log_end.msg +ffffffff82ad6018 r SYNAPTICS_DEVICE_ID +ffffffff82ad7000 r dm_crtc_irq_funcs +ffffffff82ad7010 r dm_vline0_irq_funcs +ffffffff82ad7020 r dm_dmub_outbox_irq_funcs +ffffffff82ad7030 r dm_vupdate_irq_funcs +ffffffff82ad7040 r dm_dmub_trace_irq_funcs +ffffffff82ad7050 r dm_pageflip_irq_funcs +ffffffff82ad7060 r dm_hpd_irq_funcs +ffffffff82ad8000 r amdgpu_dm_encoder_funcs +ffffffff82ad8020 r dm_mst_cbs +ffffffff82ad8030 r dm_dp_mst_connector_funcs +ffffffff82ad80a8 r dm_dp_mst_connector_helper_funcs +ffffffff82ad9000 r dm_plane_funcs +ffffffff82ad9068 r dm_plane_helper_funcs +ffffffff82adb000 r vbios_funcs ffffffff82adc000 r vbios_funcs -ffffffff82add000 r vbios_funcs +ffffffff82ae1000 r command_table_helper_funcs ffffffff82ae2000 r command_table_helper_funcs ffffffff82ae3000 r command_table_helper_funcs ffffffff82ae4000 r command_table_helper_funcs -ffffffff82ae5000 r command_table_helper_funcs -ffffffff82ae6000 r dce80_max_clks_by_state +ffffffff82ae5000 r dce80_max_clks_by_state +ffffffff82ae5028 r disp_clk_regs +ffffffff82ae507c r disp_clk_shift +ffffffff82ae5088 r disp_clk_mask +ffffffff82ae6000 r dce110_max_clks_by_state ffffffff82ae6028 r disp_clk_regs ffffffff82ae607c r disp_clk_shift ffffffff82ae6088 r disp_clk_mask -ffffffff82ae7000 r dce110_max_clks_by_state +ffffffff82ae7000 r dce112_max_clks_by_state ffffffff82ae7028 r disp_clk_regs ffffffff82ae707c r disp_clk_shift ffffffff82ae7088 r disp_clk_mask -ffffffff82ae8000 r dce112_max_clks_by_state -ffffffff82ae8028 r disp_clk_regs -ffffffff82ae807c r disp_clk_shift -ffffffff82ae8088 r disp_clk_mask -ffffffff82ae9000 r dce120_max_clks_by_state +ffffffff82ae8000 r dce120_max_clks_by_state +ffffffff82ae9000 r clk_mgr_regs +ffffffff82ae9054 r clk_mgr_shift +ffffffff82ae9060 r clk_mgr_mask ffffffff82aea000 r clk_mgr_regs ffffffff82aea054 r clk_mgr_shift ffffffff82aea060 r clk_mgr_mask ffffffff82aeb000 r clk_mgr_regs ffffffff82aeb054 r clk_mgr_shift ffffffff82aeb060 r clk_mgr_mask -ffffffff82aec000 r clk_mgr_regs -ffffffff82aec054 r clk_mgr_shift -ffffffff82aec060 r clk_mgr_mask +ffffffff82aec000 r lpddr5_wm_table +ffffffff82aec0c0 r ddr5_wm_table ffffffff82aed000 r lpddr5_wm_table ffffffff82aed0c0 r ddr5_wm_table ffffffff82aee000 r lpddr5_wm_table ffffffff82aee0c0 r ddr5_wm_table ffffffff82aef000 r lpddr5_wm_table -ffffffff82aef0c0 r ddr5_wm_table -ffffffff82af0000 r lpddr5_wm_table -ffffffff82af00c0 r ddr4_wm_table -ffffffff82af1000 r clk_mgr_regs_dcn321 -ffffffff82af1054 r clk_mgr_shift_dcn321 -ffffffff82af1060 r clk_mgr_mask_dcn321 -ffffffff82af1084 r clk_mgr_regs_dcn32 -ffffffff82af10d8 r clk_mgr_shift_dcn32 -ffffffff82af10e4 r clk_mgr_mask_dcn32 -ffffffff82af2000 r DC_BUILD_ID -ffffffff82af4000 r output_csc_matrix -ffffffff82af40e0 r black_color_format -ffffffff82af5000 r DP_SINK_BRANCH_DEV_NAME_7580 -ffffffff82af6000 r DP_VGA_DONGLE_BRANCH_DEV_NAME -ffffffff82af6006 r DP_DVI_CONVERTER_ID_4 -ffffffff82af600d r DP_DVI_CONVERTER_ID_5 -ffffffff82af7000 r DP_VGA_LVDS_CONVERTER_ID_2 -ffffffff82af7007 r DP_VGA_LVDS_CONVERTER_ID_3 -ffffffff82af7010 r dp_lt_fallbacks -ffffffff82af8000 r mandatory_dpcd_partitions -ffffffff82afa000 r dce_funcs -ffffffff82afb000 r funcs -ffffffff82afc000 R video_optimized_pixel_rates -ffffffff82afc1b0 r dce110_clk_src_funcs -ffffffff82afc1d8 r dce112_clk_src_funcs -ffffffff82afc200 r dcn20_clk_src_funcs -ffffffff82afc228 r dcn3_clk_src_funcs -ffffffff82afc250 r dcn31_clk_src_funcs -ffffffff82afd000 r dce_funcs -ffffffff82afd068 r dcn10_funcs -ffffffff82afd0d0 r dcn20_funcs -ffffffff82afd138 r dcn21_funcs -ffffffff82afe000 r dce_ipp_funcs -ffffffff82aff000 r dce110_lnk_enc_funcs -ffffffff82b00000 r dce_mi_funcs -ffffffff82b00090 r dce112_mi_funcs -ffffffff82b00120 r dce120_mi_funcs -ffffffff82b001b0 r pte_settings -ffffffff82b01000 r funcs -ffffffff82b02000 r dce_link_panel_cntl_funcs -ffffffff82b03000 r filter_3tap_16p_upscale -ffffffff82b03040 r filter_3tap_16p_116 -ffffffff82b03080 r filter_3tap_16p_149 -ffffffff82b030c0 r filter_3tap_16p_183 -ffffffff82b03100 r filter_3tap_64p_upscale -ffffffff82b031d0 r filter_3tap_64p_116 -ffffffff82b032a0 r filter_3tap_64p_149 -ffffffff82b03370 r filter_3tap_64p_183 -ffffffff82b03440 r filter_4tap_16p_upscale -ffffffff82b03490 r filter_4tap_16p_116 -ffffffff82b034e0 r filter_4tap_16p_149 -ffffffff82b03530 r filter_4tap_16p_183 -ffffffff82b03580 r filter_4tap_64p_upscale -ffffffff82b03690 r filter_4tap_64p_116 -ffffffff82b037a0 r filter_4tap_64p_149 -ffffffff82b038b0 r filter_4tap_64p_183 -ffffffff82b039c0 r filter_5tap_64p_upscale -ffffffff82b03b10 r filter_5tap_64p_116 -ffffffff82b03c60 r filter_5tap_64p_149 -ffffffff82b03db0 r filter_5tap_64p_183 -ffffffff82b03f00 r filter_6tap_64p_upscale -ffffffff82b04090 r filter_6tap_64p_116 -ffffffff82b04220 r filter_6tap_64p_149 -ffffffff82b043b0 r filter_6tap_64p_183 -ffffffff82b04540 r filter_7tap_64p_upscale -ffffffff82b04710 r filter_7tap_64p_116 -ffffffff82b048e0 r filter_7tap_64p_149 -ffffffff82b04ab0 r filter_7tap_64p_183 -ffffffff82b04c80 r filter_8tap_64p_upscale -ffffffff82b04e90 r filter_8tap_64p_116 -ffffffff82b050a0 r filter_8tap_64p_149 -ffffffff82b052b0 r filter_8tap_64p_183 -ffffffff82b054c0 r filter_2tap_16p -ffffffff82b054f0 r filter_2tap_64p -ffffffff82b06000 r audio_clock_info_table_48bpc -ffffffff82b06190 r audio_clock_info_table_36bpc -ffffffff82b06320 r audio_clock_info_table -ffffffff82b064e0 r dce110_str_enc_funcs -ffffffff82b07000 r global_color_matrix -ffffffff82b070a8 r dce_transform_funcs -ffffffff82b08000 r abm_funcs -ffffffff82b09000 r psr_funcs -ffffffff82b09040 r DP_SINK_DEVICE_STR_ID_1 -ffffffff82b09045 r DP_SINK_DEVICE_STR_ID_2 -ffffffff82b0a000 r reg_offsets -ffffffff82b0b000 r bios_regs -ffffffff82b0b008 r res_cap -ffffffff82b0b050 r clk_src_regs -ffffffff82b0b14c r dmcu_regs -ffffffff82b0b1a8 r dmcu_shift -ffffffff82b0b1bc r dmcu_mask -ffffffff82b0b208 r abm_regs -ffffffff82b0b248 r abm_shift -ffffffff82b0b25c r abm_mask -ffffffff82b0b2b0 r dce100_tg_offsets -ffffffff82b0b2f8 r plane_cap -ffffffff82b0b328 r res_create_funcs -ffffffff82b0b358 r dce100_res_pool_funcs -ffffffff82b0b440 r panel_cntl_regs -ffffffff82b0b460 r panel_cntl_shift -ffffffff82b0b470 r panel_cntl_mask -ffffffff82b0b4b0 r link_enc_regs -ffffffff82b0b870 r link_enc_aux_regs -ffffffff82b0b8c0 r link_enc_hpd_regs -ffffffff82b0b8d8 r link_enc_feature -ffffffff82b0b8e8 r cs_shift -ffffffff82b0b8f4 r cs_mask -ffffffff82b0b920 r mi_regs -ffffffff82b0bc38 r mi_shifts -ffffffff82b0bc80 r mi_masks -ffffffff82b0bda0 r ipp_regs -ffffffff82b0bf98 r ipp_shift -ffffffff82b0bfc0 r ipp_mask -ffffffff82b0c060 r xfm_regs -ffffffff82b0c600 r xfm_shift -ffffffff82b0c660 r xfm_mask -ffffffff82b0c7e0 r opp_regs -ffffffff82b0c930 r opp_shift -ffffffff82b0c95c r opp_mask -ffffffff82b0ca10 r aux_engine_regs -ffffffff82b0cb00 r aux_mask -ffffffff82b0cb60 r aux_shift -ffffffff82b0cb80 r i2c_hw_regs -ffffffff82b0ccd0 r i2c_shifts -ffffffff82b0ccfc r i2c_masks -ffffffff82b0cda0 r audio_regs -ffffffff82b0ced4 r audio_shift -ffffffff82b0ceec r audio_mask -ffffffff82b0cf30 r stream_enc_regs -ffffffff82b0d5dc r se_shift -ffffffff82b0d660 r se_mask -ffffffff82b0d864 r hwseq_reg -ffffffff82b0da80 r hwseq_shift -ffffffff82b0db00 r hwseq_mask -ffffffff82b0e000 r reg_offsets -ffffffff82b0e018 r dce110_compressor_funcs -ffffffff82b0f000 r dce110_funcs -ffffffff82b0f2c0 r dce110_private_funcs -ffffffff82b10000 r dce110_mem_input_v_funcs -ffffffff82b10090 r dvmm_Hw_Setting_1DTiling -ffffffff82b10120 r dvmm_Hw_Setting_2DTiling -ffffffff82b101b0 r dvmm_Hw_Setting_Linear -ffffffff82b11000 r global_color_matrix -ffffffff82b110b0 r input_csc_matrix -ffffffff82b12000 r funcs -ffffffff82b13000 r bios_regs -ffffffff82b13008 r dce110_res_pool_funcs -ffffffff82b130f0 r clk_src_regs -ffffffff82b131ec r dmcu_regs -ffffffff82b13248 r dmcu_shift -ffffffff82b1325c r dmcu_mask -ffffffff82b132a8 r abm_regs -ffffffff82b132e8 r abm_shift -ffffffff82b132fc r abm_mask -ffffffff82b13350 r dce110_tg_offsets -ffffffff82b13398 r res_create_funcs -ffffffff82b133c8 r plane_cap -ffffffff82b133f4 r underlay_plane_cap -ffffffff82b13420 r stoney_resource_cap -ffffffff82b1345c r carrizo_resource_cap -ffffffff82b134a0 r panel_cntl_regs -ffffffff82b134c0 r panel_cntl_shift -ffffffff82b134d0 r panel_cntl_mask -ffffffff82b13510 r link_enc_regs -ffffffff82b138d0 r link_enc_aux_regs -ffffffff82b13920 r link_enc_hpd_regs -ffffffff82b13938 r link_enc_feature -ffffffff82b13948 r cs_shift -ffffffff82b13954 r cs_mask -ffffffff82b13980 r mi_regs -ffffffff82b13b0c r mi_shifts -ffffffff82b13b54 r mi_masks -ffffffff82b13c70 r ipp_regs -ffffffff82b13d6c r ipp_shift -ffffffff82b13d94 r ipp_mask -ffffffff82b13e30 r xfm_regs -ffffffff82b14100 r xfm_shift -ffffffff82b14160 r xfm_mask -ffffffff82b142e0 r opp_regs -ffffffff82b14430 r opp_shift -ffffffff82b1445c r opp_mask -ffffffff82b14510 r aux_engine_regs -ffffffff82b14600 r aux_mask -ffffffff82b14660 r aux_shift -ffffffff82b14680 r i2c_hw_regs -ffffffff82b147d0 r i2c_shifts -ffffffff82b147fc r i2c_masks -ffffffff82b148a0 r audio_regs -ffffffff82b149d4 r audio_shift -ffffffff82b149ec r audio_mask -ffffffff82b14a30 r stream_enc_regs -ffffffff82b14d0c r se_shift -ffffffff82b14d90 r se_mask -ffffffff82b14f94 r hwseq_stoney_reg -ffffffff82b151b0 r hwseq_cz_reg -ffffffff82b153cc r hwseq_shift -ffffffff82b1544c r hwseq_mask -ffffffff82b16000 r dce110_tg_funcs -ffffffff82b17000 r dce110_tg_v_funcs -ffffffff82b18000 r dce110_xfmv_funcs +ffffffff82aef0c0 r ddr4_wm_table +ffffffff82af0000 r clk_mgr_regs_dcn321 +ffffffff82af0054 r clk_mgr_shift_dcn321 +ffffffff82af0060 r clk_mgr_mask_dcn321 +ffffffff82af0084 r clk_mgr_regs_dcn32 +ffffffff82af00d8 r clk_mgr_shift_dcn32 +ffffffff82af00e4 r clk_mgr_mask_dcn32 +ffffffff82af1000 r DC_BUILD_ID +ffffffff82af3000 r output_csc_matrix +ffffffff82af30e0 r black_color_format +ffffffff82af4000 r DP_SINK_BRANCH_DEV_NAME_7580 +ffffffff82af5000 r DP_VGA_DONGLE_BRANCH_DEV_NAME +ffffffff82af5006 r DP_DVI_CONVERTER_ID_4 +ffffffff82af500d r DP_DVI_CONVERTER_ID_5 +ffffffff82af6000 r DP_VGA_LVDS_CONVERTER_ID_2 +ffffffff82af6007 r DP_VGA_LVDS_CONVERTER_ID_3 +ffffffff82af6010 r dp_lt_fallbacks +ffffffff82af7000 r mandatory_dpcd_partitions +ffffffff82af9000 r dce_funcs +ffffffff82afa000 r funcs +ffffffff82afb000 R video_optimized_pixel_rates +ffffffff82afb1b0 r dce110_clk_src_funcs +ffffffff82afb1d8 r dce112_clk_src_funcs +ffffffff82afb200 r dcn20_clk_src_funcs +ffffffff82afb228 r dcn3_clk_src_funcs +ffffffff82afb250 r dcn31_clk_src_funcs +ffffffff82afc000 r dce_funcs +ffffffff82afc068 r dcn10_funcs +ffffffff82afc0d0 r dcn20_funcs +ffffffff82afc138 r dcn21_funcs +ffffffff82afd000 r dce_ipp_funcs +ffffffff82afe000 r dce110_lnk_enc_funcs +ffffffff82aff000 r dce_mi_funcs +ffffffff82aff090 r dce112_mi_funcs +ffffffff82aff120 r dce120_mi_funcs +ffffffff82aff1b0 r pte_settings +ffffffff82b00000 r funcs +ffffffff82b01000 r dce_link_panel_cntl_funcs +ffffffff82b02000 r filter_3tap_16p_upscale +ffffffff82b02040 r filter_3tap_16p_116 +ffffffff82b02080 r filter_3tap_16p_149 +ffffffff82b020c0 r filter_3tap_16p_183 +ffffffff82b02100 r filter_3tap_64p_upscale +ffffffff82b021d0 r filter_3tap_64p_116 +ffffffff82b022a0 r filter_3tap_64p_149 +ffffffff82b02370 r filter_3tap_64p_183 +ffffffff82b02440 r filter_4tap_16p_upscale +ffffffff82b02490 r filter_4tap_16p_116 +ffffffff82b024e0 r filter_4tap_16p_149 +ffffffff82b02530 r filter_4tap_16p_183 +ffffffff82b02580 r filter_4tap_64p_upscale +ffffffff82b02690 r filter_4tap_64p_116 +ffffffff82b027a0 r filter_4tap_64p_149 +ffffffff82b028b0 r filter_4tap_64p_183 +ffffffff82b029c0 r filter_5tap_64p_upscale +ffffffff82b02b10 r filter_5tap_64p_116 +ffffffff82b02c60 r filter_5tap_64p_149 +ffffffff82b02db0 r filter_5tap_64p_183 +ffffffff82b02f00 r filter_6tap_64p_upscale +ffffffff82b03090 r filter_6tap_64p_116 +ffffffff82b03220 r filter_6tap_64p_149 +ffffffff82b033b0 r filter_6tap_64p_183 +ffffffff82b03540 r filter_7tap_64p_upscale +ffffffff82b03710 r filter_7tap_64p_116 +ffffffff82b038e0 r filter_7tap_64p_149 +ffffffff82b03ab0 r filter_7tap_64p_183 +ffffffff82b03c80 r filter_8tap_64p_upscale +ffffffff82b03e90 r filter_8tap_64p_116 +ffffffff82b040a0 r filter_8tap_64p_149 +ffffffff82b042b0 r filter_8tap_64p_183 +ffffffff82b044c0 r filter_2tap_16p +ffffffff82b044f0 r filter_2tap_64p +ffffffff82b05000 r audio_clock_info_table_48bpc +ffffffff82b05190 r audio_clock_info_table_36bpc +ffffffff82b05320 r audio_clock_info_table +ffffffff82b054e0 r dce110_str_enc_funcs +ffffffff82b06000 r global_color_matrix +ffffffff82b060a8 r dce_transform_funcs +ffffffff82b07000 r abm_funcs +ffffffff82b08000 r psr_funcs +ffffffff82b08040 r DP_SINK_DEVICE_STR_ID_1 +ffffffff82b08045 r DP_SINK_DEVICE_STR_ID_2 +ffffffff82b09000 r reg_offsets +ffffffff82b0a000 r bios_regs +ffffffff82b0a008 r res_cap +ffffffff82b0a050 r clk_src_regs +ffffffff82b0a14c r dmcu_regs +ffffffff82b0a1a8 r dmcu_shift +ffffffff82b0a1bc r dmcu_mask +ffffffff82b0a208 r abm_regs +ffffffff82b0a248 r abm_shift +ffffffff82b0a25c r abm_mask +ffffffff82b0a2b0 r dce100_tg_offsets +ffffffff82b0a2f8 r plane_cap +ffffffff82b0a328 r res_create_funcs +ffffffff82b0a358 r dce100_res_pool_funcs +ffffffff82b0a440 r panel_cntl_regs +ffffffff82b0a460 r panel_cntl_shift +ffffffff82b0a470 r panel_cntl_mask +ffffffff82b0a4b0 r link_enc_regs +ffffffff82b0a870 r link_enc_aux_regs +ffffffff82b0a8c0 r link_enc_hpd_regs +ffffffff82b0a8d8 r link_enc_feature +ffffffff82b0a8e8 r cs_shift +ffffffff82b0a8f4 r cs_mask +ffffffff82b0a920 r mi_regs +ffffffff82b0ac38 r mi_shifts +ffffffff82b0ac80 r mi_masks +ffffffff82b0ada0 r ipp_regs +ffffffff82b0af98 r ipp_shift +ffffffff82b0afc0 r ipp_mask +ffffffff82b0b060 r xfm_regs +ffffffff82b0b600 r xfm_shift +ffffffff82b0b660 r xfm_mask +ffffffff82b0b7e0 r opp_regs +ffffffff82b0b930 r opp_shift +ffffffff82b0b95c r opp_mask +ffffffff82b0ba10 r aux_engine_regs +ffffffff82b0bb00 r aux_mask +ffffffff82b0bb60 r aux_shift +ffffffff82b0bb80 r i2c_hw_regs +ffffffff82b0bcd0 r i2c_shifts +ffffffff82b0bcfc r i2c_masks +ffffffff82b0bda0 r audio_regs +ffffffff82b0bed4 r audio_shift +ffffffff82b0beec r audio_mask +ffffffff82b0bf30 r stream_enc_regs +ffffffff82b0c5dc r se_shift +ffffffff82b0c660 r se_mask +ffffffff82b0c864 r hwseq_reg +ffffffff82b0ca80 r hwseq_shift +ffffffff82b0cb00 r hwseq_mask +ffffffff82b0d000 r reg_offsets +ffffffff82b0d018 r dce110_compressor_funcs +ffffffff82b0e000 r dce110_funcs +ffffffff82b0e2c0 r dce110_private_funcs +ffffffff82b0f000 r dce110_mem_input_v_funcs +ffffffff82b0f090 r dvmm_Hw_Setting_1DTiling +ffffffff82b0f120 r dvmm_Hw_Setting_2DTiling +ffffffff82b0f1b0 r dvmm_Hw_Setting_Linear +ffffffff82b10000 r global_color_matrix +ffffffff82b100b0 r input_csc_matrix +ffffffff82b11000 r funcs +ffffffff82b12000 r bios_regs +ffffffff82b12008 r dce110_res_pool_funcs +ffffffff82b120f0 r clk_src_regs +ffffffff82b121ec r dmcu_regs +ffffffff82b12248 r dmcu_shift +ffffffff82b1225c r dmcu_mask +ffffffff82b122a8 r abm_regs +ffffffff82b122e8 r abm_shift +ffffffff82b122fc r abm_mask +ffffffff82b12350 r dce110_tg_offsets +ffffffff82b12398 r res_create_funcs +ffffffff82b123c8 r plane_cap +ffffffff82b123f4 r underlay_plane_cap +ffffffff82b12420 r stoney_resource_cap +ffffffff82b1245c r carrizo_resource_cap +ffffffff82b124a0 r panel_cntl_regs +ffffffff82b124c0 r panel_cntl_shift +ffffffff82b124d0 r panel_cntl_mask +ffffffff82b12510 r link_enc_regs +ffffffff82b128d0 r link_enc_aux_regs +ffffffff82b12920 r link_enc_hpd_regs +ffffffff82b12938 r link_enc_feature +ffffffff82b12948 r cs_shift +ffffffff82b12954 r cs_mask +ffffffff82b12980 r mi_regs +ffffffff82b12b0c r mi_shifts +ffffffff82b12b54 r mi_masks +ffffffff82b12c70 r ipp_regs +ffffffff82b12d6c r ipp_shift +ffffffff82b12d94 r ipp_mask +ffffffff82b12e30 r xfm_regs +ffffffff82b13100 r xfm_shift +ffffffff82b13160 r xfm_mask +ffffffff82b132e0 r opp_regs +ffffffff82b13430 r opp_shift +ffffffff82b1345c r opp_mask +ffffffff82b13510 r aux_engine_regs +ffffffff82b13600 r aux_mask +ffffffff82b13660 r aux_shift +ffffffff82b13680 r i2c_hw_regs +ffffffff82b137d0 r i2c_shifts +ffffffff82b137fc r i2c_masks +ffffffff82b138a0 r audio_regs +ffffffff82b139d4 r audio_shift +ffffffff82b139ec r audio_mask +ffffffff82b13a30 r stream_enc_regs +ffffffff82b13d0c r se_shift +ffffffff82b13d90 r se_mask +ffffffff82b13f94 r hwseq_stoney_reg +ffffffff82b141b0 r hwseq_cz_reg +ffffffff82b143cc r hwseq_shift +ffffffff82b1444c r hwseq_mask +ffffffff82b15000 r dce110_tg_funcs +ffffffff82b16000 r dce110_tg_v_funcs +ffffffff82b17000 r dce110_xfmv_funcs +ffffffff82b18000 r reg_offsets ffffffff82b19000 r reg_offsets -ffffffff82b1a000 r reg_offsets -ffffffff82b1b000 r bios_regs -ffffffff82b1b010 r clk_src_regs -ffffffff82b1b208 r dmcu_regs -ffffffff82b1b264 r dmcu_shift -ffffffff82b1b278 r dmcu_mask -ffffffff82b1b2c4 r abm_regs -ffffffff82b1b304 r abm_shift -ffffffff82b1b318 r abm_mask -ffffffff82b1b360 r dce112_tg_offsets -ffffffff82b1b3a8 r res_create_funcs -ffffffff82b1b3d8 r plane_cap -ffffffff82b1b404 r polaris_11_resource_cap -ffffffff82b1b440 r polaris_10_resource_cap -ffffffff82b1b480 r dce112_res_pool_funcs -ffffffff82b1b560 r panel_cntl_regs -ffffffff82b1b580 r panel_cntl_shift -ffffffff82b1b590 r panel_cntl_mask -ffffffff82b1b5d0 r link_enc_regs -ffffffff82b1b990 r link_enc_aux_regs -ffffffff82b1b9e0 r link_enc_hpd_regs -ffffffff82b1b9f8 r link_enc_feature -ffffffff82b1ba08 r cs_shift -ffffffff82b1ba14 r cs_mask -ffffffff82b1ba40 r mi_regs -ffffffff82b1bd58 r mi_shifts -ffffffff82b1bda0 r mi_masks -ffffffff82b1bec0 r ipp_regs -ffffffff82b1c0b8 r ipp_shift -ffffffff82b1c0e0 r ipp_mask -ffffffff82b1c180 r xfm_regs -ffffffff82b1c720 r xfm_shift -ffffffff82b1c780 r xfm_mask -ffffffff82b1c900 r opp_regs -ffffffff82b1ca50 r opp_shift -ffffffff82b1ca7c r opp_mask -ffffffff82b1cb30 r aux_engine_regs -ffffffff82b1cc20 r aux_mask -ffffffff82b1cc80 r aux_shift -ffffffff82b1cca0 r i2c_hw_regs -ffffffff82b1cdf0 r i2c_shifts -ffffffff82b1ce1c r i2c_masks -ffffffff82b1cec0 r audio_regs -ffffffff82b1cfc8 r audio_shift -ffffffff82b1cfe0 r audio_mask -ffffffff82b1d020 r stream_enc_regs -ffffffff82b1d5d8 r se_shift -ffffffff82b1d65c r se_mask -ffffffff82b1d860 r hwseq_reg -ffffffff82b1da7c r hwseq_shift -ffffffff82b1dafc r hwseq_mask -ffffffff82b1e000 r bios_regs -ffffffff82b1e008 r res_cap -ffffffff82b1e048 r dce120_res_pool_funcs -ffffffff82b1e128 r debug_defaults -ffffffff82b1e2a0 r clk_src_regs -ffffffff82b1e498 r dmcu_regs -ffffffff82b1e4f4 r dmcu_shift -ffffffff82b1e508 r dmcu_mask -ffffffff82b1e554 r abm_regs -ffffffff82b1e594 r abm_shift -ffffffff82b1e5a8 r abm_mask -ffffffff82b1e5f0 r dce120_tg_offsets -ffffffff82b1e638 r dce121_res_create_funcs -ffffffff82b1e668 r res_create_funcs -ffffffff82b1e698 r plane_cap -ffffffff82b1e6d0 r panel_cntl_regs -ffffffff82b1e6f0 r panel_cntl_shift -ffffffff82b1e700 r panel_cntl_mask -ffffffff82b1e740 r link_enc_regs -ffffffff82b1eb00 r link_enc_aux_regs -ffffffff82b1eb50 r link_enc_hpd_regs -ffffffff82b1eb68 r link_enc_feature -ffffffff82b1eb78 r cs_shift -ffffffff82b1eb84 r cs_mask -ffffffff82b1ebb0 r mi_regs -ffffffff82b1eec8 r mi_shifts -ffffffff82b1ef10 r mi_masks -ffffffff82b1f030 r ipp_regs -ffffffff82b1f228 r ipp_shift -ffffffff82b1f250 r ipp_mask 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res_create_maximus_funcs -ffffffff82be4568 r plane_cap -ffffffff82be4594 r le_shift -ffffffff82be4684 r le_mask -ffffffff82be4a3c r link_enc_feature -ffffffff82be4a50 r debug_defaults_drv -ffffffff82be4bc8 r cs_shift -ffffffff82be4bd4 r cs_mask -ffffffff82be4bfc r hubbub_shift -ffffffff82be4c84 r hubbub_mask -ffffffff82be4ea0 r vmid_shifts -ffffffff82be4ea8 r vmid_masks -ffffffff82be4ec8 r hubp_shift -ffffffff82be4fc4 r hubp_mask -ffffffff82be53b4 r tf_shift -ffffffff82be5684 r tf_mask -ffffffff82be61c4 r opp_shift -ffffffff82be61fc r opp_mask -ffffffff82be62d0 r optc_shift -ffffffff82be6390 r optc_mask -ffffffff82be668c r mpc_shift -ffffffff82be6768 r mpc_mask -ffffffff82be6ad4 r dsc_shift -ffffffff82be6b8c r dsc_mask -ffffffff82be6e64 r dwbc30_shift -ffffffff82be6f98 r dwbc30_mask -ffffffff82be7460 r mcif_wb30_shift -ffffffff82be750c r mcif_wb30_mask -ffffffff82be77b8 r aux_mask -ffffffff82be7818 r aux_shift -ffffffff82be7830 r i2c_shifts -ffffffff82be785c r i2c_masks -ffffffff82be7900 r audio_shift -ffffffff82be7918 r audio_mask -ffffffff82be7954 r se_shift -ffffffff82be7a30 r se_mask -ffffffff82be7d9c r vpg_shift -ffffffff82be7dc4 r vpg_mask -ffffffff82be7e58 r afmt_shift -ffffffff82be7e6c r afmt_mask -ffffffff82be7eb0 r hpo_dp_se_shift -ffffffff82be7ed8 r hpo_dp_se_mask -ffffffff82be7f78 r apg_shift -ffffffff82be7f80 r apg_mask -ffffffff82be7f98 r hpo_dp_le_shift -ffffffff82be7fb4 r hpo_dp_le_mask -ffffffff82be8018 r hwseq_shift -ffffffff82be8098 r hwseq_mask -ffffffff82bea000 R dcn10_soc_defaults -ffffffff82bea08c R dcn10_ip_defaults -ffffffff82bf5000 R dml20_funcs -ffffffff82bf5030 R dml20v2_funcs -ffffffff82bf5060 R dml21_funcs -ffffffff82bf5090 R dml30_funcs -ffffffff82bf50c0 R dml31_funcs -ffffffff82bf50f0 R dml314_funcs -ffffffff82bf5120 R dml32_funcs -ffffffff82bf8000 R qp_table_422_10bpc_min -ffffffff82bf8740 R qp_table_444_8bpc_max -ffffffff82bf9080 R qp_table_420_12bpc_max -ffffffff82bf97c0 R qp_table_444_10bpc_min -ffffffff82bfa400 R qp_table_420_8bpc_max -ffffffff82bfa840 R qp_table_444_8bpc_min -ffffffff82bfb180 R qp_table_444_12bpc_min -ffffffff82bfc0c0 R qp_table_420_12bpc_min -ffffffff82bfc800 R qp_table_422_12bpc_min -ffffffff82bfd140 R qp_table_422_12bpc_max -ffffffff82bfda80 R qp_table_444_12bpc_max -ffffffff82bfe9c0 R qp_table_420_8bpc_min -ffffffff82bfee00 R qp_table_422_8bpc_min -ffffffff82bff340 R qp_table_422_10bpc_max -ffffffff82bffa80 R qp_table_420_10bpc_max -ffffffff82c00040 R qp_table_420_10bpc_min -ffffffff82c00600 R qp_table_444_10bpc_max -ffffffff82c01240 R qp_table_422_8bpc_max +ffffffff82b1a000 r bios_regs +ffffffff82b1a010 r clk_src_regs +ffffffff82b1a208 r dmcu_regs +ffffffff82b1a264 r dmcu_shift +ffffffff82b1a278 r dmcu_mask +ffffffff82b1a2c4 r abm_regs +ffffffff82b1a304 r abm_shift +ffffffff82b1a318 r abm_mask +ffffffff82b1a360 r dce112_tg_offsets +ffffffff82b1a3a8 r res_create_funcs +ffffffff82b1a3d8 r plane_cap +ffffffff82b1a404 r polaris_11_resource_cap +ffffffff82b1a440 r polaris_10_resource_cap +ffffffff82b1a480 r dce112_res_pool_funcs +ffffffff82b1a560 r panel_cntl_regs +ffffffff82b1a580 r panel_cntl_shift +ffffffff82b1a590 r panel_cntl_mask +ffffffff82b1a5d0 r link_enc_regs +ffffffff82b1a990 r link_enc_aux_regs +ffffffff82b1a9e0 r link_enc_hpd_regs +ffffffff82b1a9f8 r link_enc_feature +ffffffff82b1aa08 r cs_shift +ffffffff82b1aa14 r cs_mask +ffffffff82b1aa40 r mi_regs +ffffffff82b1ad58 r mi_shifts +ffffffff82b1ada0 r mi_masks +ffffffff82b1aec0 r ipp_regs +ffffffff82b1b0b8 r ipp_shift +ffffffff82b1b0e0 r ipp_mask +ffffffff82b1b180 r xfm_regs +ffffffff82b1b720 r xfm_shift +ffffffff82b1b780 r xfm_mask +ffffffff82b1b900 r opp_regs +ffffffff82b1ba50 r opp_shift +ffffffff82b1ba7c r opp_mask +ffffffff82b1bb30 r aux_engine_regs +ffffffff82b1bc20 r aux_mask +ffffffff82b1bc80 r aux_shift +ffffffff82b1bca0 r i2c_hw_regs +ffffffff82b1bdf0 r i2c_shifts +ffffffff82b1be1c r i2c_masks +ffffffff82b1bec0 r audio_regs +ffffffff82b1bfc8 r audio_shift +ffffffff82b1bfe0 r audio_mask +ffffffff82b1c020 r stream_enc_regs +ffffffff82b1c5d8 r se_shift +ffffffff82b1c65c r se_mask +ffffffff82b1c860 r hwseq_reg +ffffffff82b1ca7c r hwseq_shift +ffffffff82b1cafc r hwseq_mask +ffffffff82b1d000 r bios_regs +ffffffff82b1d008 r res_cap +ffffffff82b1d048 r dce120_res_pool_funcs +ffffffff82b1d128 r debug_defaults +ffffffff82b1d2a0 r clk_src_regs +ffffffff82b1d498 r dmcu_regs +ffffffff82b1d4f4 r dmcu_shift +ffffffff82b1d508 r dmcu_mask +ffffffff82b1d554 r abm_regs +ffffffff82b1d594 r abm_shift +ffffffff82b1d5a8 r abm_mask +ffffffff82b1d5f0 r dce120_tg_offsets +ffffffff82b1d638 r dce121_res_create_funcs +ffffffff82b1d668 r res_create_funcs +ffffffff82b1d698 r plane_cap +ffffffff82b1d6d0 r panel_cntl_regs +ffffffff82b1d6f0 r panel_cntl_shift +ffffffff82b1d700 r panel_cntl_mask +ffffffff82b1d740 r link_enc_regs +ffffffff82b1db00 r link_enc_aux_regs +ffffffff82b1db50 r link_enc_hpd_regs +ffffffff82b1db68 r link_enc_feature +ffffffff82b1db78 r cs_shift +ffffffff82b1db84 r cs_mask +ffffffff82b1dbb0 r mi_regs +ffffffff82b1dec8 r mi_shifts +ffffffff82b1df10 r mi_masks +ffffffff82b1e030 r ipp_regs +ffffffff82b1e228 r ipp_shift +ffffffff82b1e250 r ipp_mask +ffffffff82b1e2f0 r xfm_regs +ffffffff82b1e890 r xfm_shift +ffffffff82b1e8f0 r xfm_mask +ffffffff82b1ea70 r opp_regs +ffffffff82b1ebc0 r opp_shift +ffffffff82b1ebec r opp_mask +ffffffff82b1eca0 r aux_engine_regs +ffffffff82b1ed90 r aux_mask +ffffffff82b1edf0 r aux_shift +ffffffff82b1ee10 r i2c_hw_regs +ffffffff82b1ef60 r i2c_shifts +ffffffff82b1ef8c r i2c_masks +ffffffff82b1f030 r audio_regs +ffffffff82b1f164 r audio_shift +ffffffff82b1f17c r audio_mask +ffffffff82b1f1c0 r stream_enc_regs +ffffffff82b1f778 r se_shift +ffffffff82b1f7fc r se_mask +ffffffff82b1fa00 r dce121_hwseq_reg +ffffffff82b1fc1c r dce121_hwseq_shift +ffffffff82b1fc9c r dce121_hwseq_mask +ffffffff82b1fe90 r hwseq_reg +ffffffff82b200ac r hwseq_shift +ffffffff82b2012c r hwseq_mask +ffffffff82b21000 r dce120_tg_funcs +ffffffff82b22000 r bios_regs +ffffffff82b22008 r res_cap +ffffffff82b22048 r dce80_res_pool_funcs +ffffffff82b22130 r clk_src_regs +ffffffff82b2222c r dmcu_regs +ffffffff82b22288 r dmcu_shift +ffffffff82b2229c r dmcu_mask +ffffffff82b222e8 r abm_regs +ffffffff82b22328 r abm_shift +ffffffff82b2233c r abm_mask +ffffffff82b22390 r dce80_tg_offsets +ffffffff82b223d8 r plane_cap +ffffffff82b22408 r res_create_funcs +ffffffff82b22440 r panel_cntl_regs +ffffffff82b22460 r panel_cntl_shift +ffffffff82b22470 r panel_cntl_mask +ffffffff82b224b0 r link_enc_regs +ffffffff82b22870 r link_enc_aux_regs +ffffffff82b228c0 r link_enc_hpd_regs +ffffffff82b228d8 r link_enc_feature +ffffffff82b228e8 r cs_shift +ffffffff82b228f4 r cs_mask +ffffffff82b22920 r mi_regs +ffffffff82b22c38 r mi_shifts +ffffffff82b22c80 r mi_masks +ffffffff82b22da0 r ipp_regs +ffffffff82b22f98 r ipp_shift +ffffffff82b22fc0 r ipp_mask +ffffffff82b23060 r xfm_regs +ffffffff82b23600 r xfm_shift +ffffffff82b23660 r xfm_mask +ffffffff82b237e0 r opp_regs +ffffffff82b23930 r opp_shift +ffffffff82b2395c r opp_mask +ffffffff82b23a10 r aux_engine_regs +ffffffff82b23b00 r aux_mask +ffffffff82b23b60 r aux_shift +ffffffff82b23b80 r i2c_hw_regs +ffffffff82b23cd0 r i2c_shifts +ffffffff82b23cfc r i2c_masks +ffffffff82b23da0 r audio_regs +ffffffff82b23ed4 r audio_shift +ffffffff82b23eec r audio_mask +ffffffff82b23f30 r stream_enc_regs +ffffffff82b245dc r se_shift +ffffffff82b24660 r se_mask +ffffffff82b24864 r hwseq_reg +ffffffff82b24a80 r hwseq_shift +ffffffff82b24b00 r hwseq_mask +ffffffff82b24cf4 r res_cap_81 +ffffffff82b24d30 r res_cap_83 +ffffffff82b25000 r reg_offsets +ffffffff82b25048 r dce80_tg_funcs +ffffffff82b26000 r dcn10_dpp_funcs +ffffffff82b27000 r dpp_input_csc_matrix +ffffffff82b29000 r hubbub1_funcs +ffffffff82b2a000 r dcn10_hubp_funcs +ffffffff82b2b000 r reduceSizeAndFraction.prime_numbers +ffffffff82b2d000 r dcn10_funcs +ffffffff82b2d2c0 r dcn10_private_funcs +ffffffff82b2e000 r dcn10_ipp_funcs +ffffffff82b2e048 r dcn20_ipp_funcs +ffffffff82b2f000 r dcn10_lnk_enc_funcs +ffffffff82b30000 r dcn10_mpc_funcs +ffffffff82b31000 r dcn10_opp_funcs +ffffffff82b32000 r dcn10_tg_funcs +ffffffff82b33000 r bios_regs +ffffffff82b33008 r rv2_res_cap +ffffffff82b33044 r res_cap +ffffffff82b33080 r debug_defaults_drv +ffffffff82b331f8 r debug_defaults_diags +ffffffff82b33370 r clk_src_regs +ffffffff82b334c0 r dmcu_regs +ffffffff82b3351c r dmcu_shift +ffffffff82b33530 r dmcu_mask +ffffffff82b3357c r abm_regs +ffffffff82b335bc r abm_shift +ffffffff82b335d0 r abm_mask +ffffffff82b33618 r res_create_funcs +ffffffff82b33648 r res_create_maximus_funcs +ffffffff82b33678 r plane_cap +ffffffff82b336a8 r dcn10_res_pool_funcs +ffffffff82b33790 r panel_cntl_regs +ffffffff82b337b0 r panel_cntl_shift +ffffffff82b337c0 r panel_cntl_mask +ffffffff82b33800 r link_enc_regs +ffffffff82b33d10 r link_enc_aux_regs +ffffffff82b33d50 r link_enc_hpd_regs +ffffffff82b33d60 r le_shift +ffffffff82b33e50 r le_mask +ffffffff82b34208 r link_enc_feature +ffffffff82b34218 r cs_shift +ffffffff82b34224 r cs_mask +ffffffff82b34250 r hubp_regs +ffffffff82b34900 r hubp_shift +ffffffff82b349c4 r hubp_mask +ffffffff82b34cd0 r ipp_regs +ffffffff82b34db0 r ipp_shift +ffffffff82b34dcc r ipp_mask +ffffffff82b34e40 r tf_regs +ffffffff82b35da0 r tf_shift +ffffffff82b36008 r tf_mask +ffffffff82b369a0 r opp_regs +ffffffff82b36a70 r opp_shift +ffffffff82b36a90 r opp_mask +ffffffff82b36b10 r tg_regs +ffffffff82b37010 r tg_shift +ffffffff82b370d0 r tg_mask +ffffffff82b373d0 r aux_engine_regs +ffffffff82b374c0 r aux_mask +ffffffff82b37520 r aux_shift +ffffffff82b37540 r i2c_hw_regs +ffffffff82b37690 r i2c_shifts +ffffffff82b376bc r i2c_masks +ffffffff82b37760 r mpc_regs +ffffffff82b37880 r mpc_shift +ffffffff82b37898 r mpc_mask +ffffffff82b378f4 r hubbub_reg +ffffffff82b37a68 r hubbub_shift +ffffffff82b37af0 r hubbub_mask +ffffffff82b37d10 r audio_regs +ffffffff82b37dc0 r audio_shift +ffffffff82b37dd8 r audio_mask +ffffffff82b37e20 r stream_enc_regs +ffffffff82b38370 r se_shift +ffffffff82b3844c r se_mask +ffffffff82b387b8 r hwseq_reg +ffffffff82b389d4 r hwseq_shift +ffffffff82b38a54 r hwseq_mask +ffffffff82b39000 r audio_clock_info_table_48bpc +ffffffff82b39190 r audio_clock_info_table_36bpc +ffffffff82b39320 r audio_clock_info_table +ffffffff82b394e0 r dcn10_str_enc_funcs +ffffffff82b3a000 r dccg2_funcs +ffffffff82b3c000 r dpp_input_csc_matrix +ffffffff82b3d000 R dcn20_dsc_funcs +ffffffff82b3e000 R dcn20_dwbc_funcs +ffffffff82b3f000 r filter_12tap_16p_upscale +ffffffff82b3f0e0 r filter_12tap_16p_117 +ffffffff82b3f1c0 r filter_12tap_16p_150 +ffffffff82b3f2a0 r filter_12tap_16p_183 +ffffffff82b3f380 r filter_11tap_16p_upscale +ffffffff82b3f450 r filter_11tap_16p_117 +ffffffff82b3f520 r filter_11tap_16p_150 +ffffffff82b3f5f0 r filter_11tap_16p_183 +ffffffff82b3f6c0 r filter_10tap_16p_upscale +ffffffff82b3f780 r filter_10tap_16p_117 +ffffffff82b3f840 r filter_10tap_16p_150 +ffffffff82b3f900 r filter_10tap_16p_183 +ffffffff82b3f9c0 r filter_9tap_16p_upscale +ffffffff82b3fa70 r filter_9tap_16p_117 +ffffffff82b3fb20 r filter_9tap_16p_150 +ffffffff82b3fbd0 r filter_9tap_16p_183 +ffffffff82b3fc80 r filter_8tap_16p_upscale +ffffffff82b3fd10 r filter_8tap_16p_117 +ffffffff82b3fda0 r filter_8tap_16p_150 +ffffffff82b3fe30 r filter_8tap_16p_183 +ffffffff82b3fec0 r filter_7tap_16p_upscale +ffffffff82b3ff40 r filter_7tap_16p_117 +ffffffff82b3ffc0 r filter_7tap_16p_150 +ffffffff82b40040 r filter_7tap_16p_183 +ffffffff82b400c0 r filter_6tap_16p_upscale +ffffffff82b40130 r filter_6tap_16p_117 +ffffffff82b401a0 r filter_6tap_16p_150 +ffffffff82b40210 r filter_6tap_16p_183 +ffffffff82b40280 r filter_5tap_16p_upscale +ffffffff82b402e0 r filter_5tap_16p_117 +ffffffff82b40340 r filter_5tap_16p_150 +ffffffff82b403a0 r filter_5tap_16p_183 +ffffffff82b40400 r filter_4tap_16p_upscale +ffffffff82b40450 r filter_4tap_16p_117 +ffffffff82b404a0 r filter_4tap_16p_150 +ffffffff82b404f0 r filter_4tap_16p_183 +ffffffff82b40540 r filter_3tap_16p_upscale +ffffffff82b40580 r filter_3tap_16p_117 +ffffffff82b405c0 r filter_3tap_16p_150 +ffffffff82b40600 r filter_3tap_16p_183 +ffffffff82b41000 r hubbub2_funcs +ffffffff82b42000 r dcn20_funcs +ffffffff82b422c0 r dcn20_private_funcs +ffffffff82b43000 r dcn2_mpll_cfg +ffffffff82b43190 r dcn20_link_enc_funcs +ffffffff82b44000 R dcn20_mmhubbub_funcs +ffffffff82b45000 R dcn20_mpc_funcs +ffffffff82b46000 r tf_regs +ffffffff82b47920 r tf_shift +ffffffff82b47ba4 r tf_mask +ffffffff82b485c0 r ipp_regs +ffffffff82b48710 r ipp_shift +ffffffff82b4872c r ipp_mask +ffffffff82b487a0 r opp_regs +ffffffff82b489b0 r opp_shift +ffffffff82b489e8 r opp_mask +ffffffff82b48ac0 r aux_engine_regs +ffffffff82b48bb0 r aux_mask +ffffffff82b48c10 r aux_shift +ffffffff82b48c30 r i2c_hw_regs +ffffffff82b48d80 r i2c_shifts +ffffffff82b48dac r i2c_masks +ffffffff82b48e50 r mpc_regs +ffffffff82b49398 r mpc_shift +ffffffff82b493e0 r mpc_mask +ffffffff82b494f4 r hubbub_reg +ffffffff82b49668 r hubbub_shift +ffffffff82b496f0 r hubbub_mask +ffffffff82b4990c r res_cap_nv10 +ffffffff82b49950 r vmid_regs +ffffffff82b49b10 r vmid_shifts +ffffffff82b49b18 r vmid_masks +ffffffff82b49b40 r tg_regs +ffffffff82b4a2c0 r tg_shift +ffffffff82b4a380 r tg_mask +ffffffff82b4a680 r link_enc_regs +ffffffff82b4ae20 r link_enc_aux_regs +ffffffff82b4ae80 r link_enc_hpd_regs +ffffffff82b4ae98 r le_shift +ffffffff82b4af88 r le_mask +ffffffff82b4b340 r stream_enc_regs +ffffffff82b4bb38 r se_shift +ffffffff82b4bc14 r se_mask +ffffffff82b4bf80 r hwseq_reg +ffffffff82b4c19c r hwseq_shift +ffffffff82b4c21c r hwseq_mask +ffffffff82b4c410 r dsc_regs +ffffffff82b4c8a8 r dsc_shift +ffffffff82b4c960 r dsc_mask +ffffffff82b4cc40 r hubp_regs +ffffffff82b4d888 r hubp_shift +ffffffff82b4d984 r hubp_mask +ffffffff82b4dd80 r dwbc20_regs +ffffffff82b4de38 r dwbc20_shift +ffffffff82b4deb8 r dwbc20_mask +ffffffff82b4e0b0 r mcif_wb20_regs +ffffffff82b4e190 r mcif_wb20_shift +ffffffff82b4e230 r mcif_wb20_mask +ffffffff82b4e4b0 r link_enc_feature +ffffffff82b4e4c0 r bios_regs +ffffffff82b4e4c8 r dcn20_res_pool_funcs +ffffffff82b4e5a8 r res_cap_nv14 +ffffffff82b4e5e8 r debug_defaults_drv +ffffffff82b4e760 r debug_defaults_diags +ffffffff82b4e8e0 r clk_src_regs +ffffffff82b4ead8 r dccg_regs +ffffffff82b4ebc4 r dccg_shift +ffffffff82b4ec5c r dccg_mask +ffffffff82b4eeb8 r dmcu_regs +ffffffff82b4ef14 r dmcu_shift +ffffffff82b4ef28 r dmcu_mask +ffffffff82b4ef74 r abm_regs +ffffffff82b4efb4 r abm_shift +ffffffff82b4efc8 r abm_mask +ffffffff82b4f010 r res_create_funcs +ffffffff82b4f040 r res_create_maximus_funcs +ffffffff82b4f070 r plane_cap +ffffffff82b4f0a0 r panel_cntl_regs +ffffffff82b4f0c0 r panel_cntl_shift +ffffffff82b4f0d0 r panel_cntl_mask +ffffffff82b4f10c r cs_shift +ffffffff82b4f118 r cs_mask +ffffffff82b4f140 r audio_regs +ffffffff82b4f274 r audio_shift +ffffffff82b4f28c r audio_mask +ffffffff82b50000 r dcn20_str_enc_funcs +ffffffff82b51000 r dccg201_funcs +ffffffff82b52000 r hubbub201_funcs +ffffffff82b53000 r dcn201_funcs +ffffffff82b532c0 r dcn201_private_funcs +ffffffff82b54000 r dcn201_link_enc_funcs +ffffffff82b55000 R dcn201_mpc_funcs +ffffffff82b56000 r bios_regs +ffffffff82b56008 r res_cap_dnc201 +ffffffff82b56048 r debug_defaults_drv +ffffffff82b561c0 r clk_src_regs +ffffffff82b56268 r dccg_regs +ffffffff82b56354 r dccg_shift +ffffffff82b563ec r dccg_mask +ffffffff82b56648 r res_create_funcs +ffffffff82b56678 r res_create_maximus_funcs +ffffffff82b566a8 r plane_cap +ffffffff82b566e0 r link_enc_regs +ffffffff82b56970 r link_enc_aux_regs +ffffffff82b56990 r link_enc_hpd_regs +ffffffff82b56998 r le_shift +ffffffff82b56a88 r le_mask +ffffffff82b56e40 r link_enc_feature +ffffffff82b56e50 r cs_shift +ffffffff82b56e5c r cs_mask +ffffffff82b56e90 r hubp_regs +ffffffff82b57620 r hubp_shift +ffffffff82b576f8 r hubp_mask +ffffffff82b57a60 r ipp_regs +ffffffff82b57b40 r ipp_shift +ffffffff82b57b5c r ipp_mask +ffffffff82b57bd0 r tf_regs +ffffffff82b58c10 r tf_shift +ffffffff82b58e94 r tf_mask +ffffffff82b598b0 r opp_regs +ffffffff82b59960 r opp_shift +ffffffff82b59998 r opp_mask +ffffffff82b59a70 r aux_engine_regs +ffffffff82b59ac0 r aux_mask +ffffffff82b59b20 r aux_shift +ffffffff82b59b40 r i2c_hw_regs +ffffffff82b59bb0 r i2c_shifts +ffffffff82b59bdc r i2c_masks +ffffffff82b59c80 r tg_regs +ffffffff82b59f00 r tg_shift +ffffffff82b59fc0 r tg_mask +ffffffff82b5a2bc r mpc_regs +ffffffff82b5a804 r mpc_shift +ffffffff82b5a850 r mpc_mask +ffffffff82b5a978 r hubbub_reg +ffffffff82b5aaec r hubbub_shift +ffffffff82b5ab74 r hubbub_mask +ffffffff82b5ad90 r audio_regs +ffffffff82b5ade8 r audio_shift +ffffffff82b5ae00 r audio_mask +ffffffff82b5ae40 r stream_enc_regs +ffffffff82b5b0e8 r se_shift +ffffffff82b5b1c4 r se_mask +ffffffff82b5b530 r hwseq_reg +ffffffff82b5b74c r hwseq_shift +ffffffff82b5b7cc r hwseq_mask +ffffffff82b5c000 r dccg21_funcs +ffffffff82b5d000 r hubbub21_funcs +ffffffff82b5e000 r dcn21_funcs +ffffffff82b5e2c0 r dcn21_private_funcs +ffffffff82b5f000 r dcn21_mpll_cfg_ref +ffffffff82b5f190 r dcn21_link_enc_funcs +ffffffff82b60000 r bios_regs +ffffffff82b60008 r res_cap_rn +ffffffff82b60048 r dcn21_res_pool_funcs +ffffffff82b60128 r debug_defaults_drv +ffffffff82b602a0 r debug_defaults_diags +ffffffff82b60420 r clk_src_regs +ffffffff82b605c4 r dccg_regs +ffffffff82b606b0 r dccg_shift +ffffffff82b60748 r dccg_mask +ffffffff82b609a4 r dmcu_regs +ffffffff82b60a00 r dmcu_shift +ffffffff82b60a14 r dmcu_mask +ffffffff82b60a60 r abm_regs +ffffffff82b60aa0 r abm_shift +ffffffff82b60ab4 r abm_mask +ffffffff82b60b00 r res_create_funcs +ffffffff82b60b30 r res_create_maximus_funcs +ffffffff82b60b60 r plane_cap +ffffffff82b60b90 r panel_cntl_regs +ffffffff82b60bb0 r panel_cntl_shift +ffffffff82b60bc0 r panel_cntl_mask +ffffffff82b60c00 r link_enc_regs +ffffffff82b61260 r link_enc_aux_regs +ffffffff82b612b0 r link_enc_hpd_regs +ffffffff82b612c4 r le_shift +ffffffff82b613b4 r le_mask +ffffffff82b6176c r link_enc_feature +ffffffff82b6177c r panel_config_defaults +ffffffff82b617b0 r cs_shift +ffffffff82b617bc r cs_mask +ffffffff82b617f0 r hubp_regs +ffffffff82b62020 r hubp_shift +ffffffff82b6211c r hubp_mask +ffffffff82b62510 r ipp_regs +ffffffff82b625f0 r ipp_shift +ffffffff82b6260c r ipp_mask +ffffffff82b62680 r tf_regs +ffffffff82b63740 r tf_shift +ffffffff82b639c4 r tf_mask +ffffffff82b643e0 r opp_regs +ffffffff82b645f0 r opp_shift +ffffffff82b64628 r opp_mask +ffffffff82b64700 r tg_regs +ffffffff82b64c00 r tg_shift +ffffffff82b64cc0 r tg_mask +ffffffff82b64fc0 r aux_engine_regs +ffffffff82b65088 r aux_mask +ffffffff82b650e8 r aux_shift +ffffffff82b65100 r i2c_hw_regs +ffffffff82b65218 r i2c_shifts +ffffffff82b65244 r i2c_masks +ffffffff82b652e8 r mpc_regs +ffffffff82b65830 r mpc_shift +ffffffff82b65878 r mpc_mask +ffffffff82b6598c r hubbub_reg +ffffffff82b65b00 r hubbub_shift +ffffffff82b65b88 r hubbub_mask +ffffffff82b65db0 r vmid_regs +ffffffff82b65f70 r vmid_shifts +ffffffff82b65f78 r vmid_masks +ffffffff82b65fa0 r dsc_regs +ffffffff82b66438 r dsc_shift +ffffffff82b664f0 r dsc_mask +ffffffff82b667d0 r audio_regs +ffffffff82b668d8 r audio_shift +ffffffff82b668f0 r audio_mask +ffffffff82b66930 r stream_enc_regs +ffffffff82b66fd4 r se_shift +ffffffff82b670b0 r se_mask +ffffffff82b6741c r hwseq_reg +ffffffff82b67638 r hwseq_shift +ffffffff82b676b8 r hwseq_mask +ffffffff82b68000 r dccg3_funcs +ffffffff82b69000 r dcn30_link_enc_funcs +ffffffff82b6a000 r dcn30_str_enc_funcs +ffffffff82b6b000 r dpp_input_csc_matrix +ffffffff82b6c000 R dcn30_dwbc_funcs +ffffffff82b6d000 r hubbub30_funcs +ffffffff82b6f000 r dcn30_funcs +ffffffff82b6f2c0 r dcn30_private_funcs +ffffffff82b70000 R dcn30_mmhubbub_funcs +ffffffff82b71000 R dcn30_mpc_funcs +ffffffff82b72000 r bios_regs +ffffffff82b72008 r res_cap_dcn3 +ffffffff82b72048 r debug_defaults_drv +ffffffff82b721c0 r debug_defaults_diags +ffffffff82b72340 r clk_src_regs +ffffffff82b72538 r dccg_regs +ffffffff82b72624 r dccg_shift +ffffffff82b726bc r dccg_mask +ffffffff82b72920 r abm_regs +ffffffff82b72aa0 r abm_shift +ffffffff82b72ab4 r abm_mask +ffffffff82b72b00 r res_create_funcs +ffffffff82b72b30 r res_create_maximus_funcs +ffffffff82b72b60 r plane_cap +ffffffff82b72b90 r dcn30_res_pool_funcs +ffffffff82b72c70 r panel_cntl_regs +ffffffff82b72c90 r panel_cntl_shift +ffffffff82b72ca0 r panel_cntl_mask +ffffffff82b72ce0 r link_enc_regs +ffffffff82b73480 r link_enc_aux_regs +ffffffff82b734e0 r link_enc_hpd_regs +ffffffff82b734f8 r le_shift +ffffffff82b735e8 r le_mask +ffffffff82b739a0 r link_enc_feature +ffffffff82b739b0 r cs_shift +ffffffff82b739bc r cs_mask +ffffffff82b739e4 r hubbub_reg +ffffffff82b73b58 r hubbub_shift +ffffffff82b73be0 r hubbub_mask +ffffffff82b73e00 r vmid_regs +ffffffff82b73fc0 r vmid_shifts +ffffffff82b73fc8 r vmid_masks +ffffffff82b73ff0 r hubp_regs +ffffffff82b74c38 r hubp_shift +ffffffff82b74d34 r hubp_mask +ffffffff82b75130 r dpp_regs +ffffffff82b770b0 r tf_shift +ffffffff82b77380 r tf_mask +ffffffff82b77ec0 r opp_regs +ffffffff82b780d0 r opp_shift +ffffffff82b78108 r opp_mask +ffffffff82b781e0 r optc_regs +ffffffff82b78960 r optc_shift +ffffffff82b78a20 r optc_mask +ffffffff82b78d1c r mpc_regs +ffffffff82b7a508 r mpc_shift +ffffffff82b7a5e4 r mpc_mask +ffffffff82b7a950 r dsc_regs +ffffffff82b7ade8 r dsc_shift +ffffffff82b7aea0 r dsc_mask +ffffffff82b7b180 r dwbc30_regs +ffffffff82b7b35c r dwbc30_shift +ffffffff82b7b490 r dwbc30_mask +ffffffff82b7b960 r mcif_wb30_regs +ffffffff82b7ba5c r mcif_wb30_shift +ffffffff82b7bb08 r mcif_wb30_mask +ffffffff82b7bdc0 r aux_engine_regs +ffffffff82b7beb0 r aux_mask +ffffffff82b7bf10 r aux_shift +ffffffff82b7bf30 r i2c_hw_regs +ffffffff82b7c080 r i2c_shifts +ffffffff82b7c0ac r i2c_masks +ffffffff82b7c150 r audio_regs +ffffffff82b7c284 r audio_shift +ffffffff82b7c29c r audio_mask +ffffffff82b7c2e0 r stream_enc_regs +ffffffff82b7cad8 r se_shift +ffffffff82b7cbb4 r se_mask +ffffffff82b7cf20 r vpg_regs +ffffffff82b7cfac r vpg_shift +ffffffff82b7cfd4 r vpg_mask +ffffffff82b7d070 r afmt_regs +ffffffff82b7d16c r afmt_shift +ffffffff82b7d180 r afmt_mask +ffffffff82b7d1c4 r hwseq_reg +ffffffff82b7d3e0 r hwseq_shift +ffffffff82b7d460 r hwseq_mask +ffffffff82b7e000 r dccg301_funcs +ffffffff82b7f000 r dcn301_link_enc_funcs +ffffffff82b80000 r hubbub301_funcs +ffffffff82b81000 r dcn301_funcs +ffffffff82b812c0 r dcn301_private_funcs +ffffffff82b82000 r dcn301_link_panel_cntl_funcs +ffffffff82b83000 r bios_regs +ffffffff82b83008 r debug_defaults_drv +ffffffff82b83180 r debug_defaults_diags +ffffffff82b83300 r clk_src_regs +ffffffff82b83450 r dccg_regs +ffffffff82b8353c r dccg_shift +ffffffff82b835d4 r dccg_mask +ffffffff82b83830 r abm_regs +ffffffff82b83930 r abm_shift +ffffffff82b83944 r abm_mask +ffffffff82b83990 r res_create_funcs +ffffffff82b839c0 r res_create_maximus_funcs +ffffffff82b839f0 r plane_cap +ffffffff82b83a20 r panel_cntl_regs +ffffffff82b83a60 r panel_cntl_shift +ffffffff82b83a70 r panel_cntl_mask +ffffffff82b83ab0 r link_enc_regs +ffffffff82b83fc0 r link_enc_aux_regs +ffffffff82b84000 r link_enc_hpd_regs +ffffffff82b84010 r le_shift +ffffffff82b84100 r le_mask +ffffffff82b844b8 r link_enc_feature +ffffffff82b844c8 r cs_shift +ffffffff82b844d4 r cs_mask +ffffffff82b844fc r hubbub_reg +ffffffff82b84670 r hubbub_shift +ffffffff82b846f8 r hubbub_mask +ffffffff82b84920 r vmid_regs +ffffffff82b84ae0 r vmid_shifts +ffffffff82b84ae8 r vmid_masks +ffffffff82b84b10 r hubp_regs +ffffffff82b85340 r hubp_shift +ffffffff82b8543c r hubp_mask +ffffffff82b85830 r dpp_regs +ffffffff82b86d30 r tf_shift +ffffffff82b87000 r tf_mask +ffffffff82b87b40 r opp_regs +ffffffff82b87ca0 r opp_shift +ffffffff82b87cd8 r opp_mask +ffffffff82b87db0 r optc_regs +ffffffff82b882b0 r optc_shift +ffffffff82b88370 r optc_mask +ffffffff82b8866c r mpc_regs +ffffffff82b89e58 r mpc_shift +ffffffff82b89f34 r mpc_mask +ffffffff82b8a2a0 r dsc_regs +ffffffff82b8a4ec r dsc_shift +ffffffff82b8a5a4 r dsc_mask +ffffffff82b8a880 r dwbc30_regs +ffffffff82b8aa5c r dwbc30_shift +ffffffff82b8ab90 r dwbc30_mask +ffffffff82b8b060 r mcif_wb30_regs +ffffffff82b8b15c r mcif_wb30_shift +ffffffff82b8b208 r mcif_wb30_mask +ffffffff82b8b4c0 r aux_engine_regs +ffffffff82b8b560 r aux_mask +ffffffff82b8b5c0 r aux_shift +ffffffff82b8b5e0 r i2c_hw_regs +ffffffff82b8b6c0 r i2c_shifts +ffffffff82b8b6ec r i2c_masks +ffffffff82b8b790 r audio_regs +ffffffff82b8b8c4 r audio_shift +ffffffff82b8b8dc r audio_mask +ffffffff82b8b920 r stream_enc_regs +ffffffff82b8be70 r se_shift +ffffffff82b8bf4c r se_mask +ffffffff82b8c2c0 r vpg_regs +ffffffff82b8c310 r vpg_shift +ffffffff82b8c338 r vpg_mask +ffffffff82b8c3d0 r afmt_regs +ffffffff82b8c460 r afmt_shift +ffffffff82b8c474 r afmt_mask +ffffffff82b8c4b8 r hwseq_reg +ffffffff82b8c6d4 r hwseq_shift +ffffffff82b8c754 r hwseq_mask +ffffffff82b8d000 r bios_regs +ffffffff82b8d008 r res_cap_dcn302 +ffffffff82b8d048 r debug_defaults_drv +ffffffff82b8d1c0 r debug_defaults_diags +ffffffff82b8d340 r clk_src_regs +ffffffff82b8d4e4 r dccg_regs +ffffffff82b8d5d0 r dccg_shift +ffffffff82b8d668 r dccg_mask +ffffffff82b8d8d0 r abm_regs +ffffffff82b8da10 r abm_shift +ffffffff82b8da24 r abm_mask +ffffffff82b8da70 r res_create_funcs +ffffffff82b8daa0 r res_create_maximus_funcs +ffffffff82b8dad0 r plane_cap +ffffffff82b8db00 r panel_cntl_regs +ffffffff82b8db20 r panel_cntl_shift +ffffffff82b8db30 r panel_cntl_mask +ffffffff82b8db70 r link_enc_regs +ffffffff82b8e1d0 r link_enc_aux_regs +ffffffff82b8e220 r link_enc_hpd_regs +ffffffff82b8e234 r le_shift +ffffffff82b8e324 r le_mask +ffffffff82b8e6dc r link_enc_feature +ffffffff82b8e6ec r cs_shift +ffffffff82b8e6f8 r cs_mask +ffffffff82b8e720 r hubbub_reg +ffffffff82b8e894 r hubbub_shift +ffffffff82b8e91c r hubbub_mask +ffffffff82b8eb40 r vmid_regs +ffffffff82b8ed00 r vmid_shifts +ffffffff82b8ed08 r vmid_masks +ffffffff82b8ed30 r hubp_regs +ffffffff82b8f76c r hubp_shift +ffffffff82b8f868 r hubp_mask +ffffffff82b8fc60 r dpp_regs +ffffffff82b916a0 r tf_shift +ffffffff82b91970 r tf_mask +ffffffff82b924b0 r opp_regs +ffffffff82b92668 r opp_shift +ffffffff82b926a0 r opp_mask +ffffffff82b92780 r optc_regs +ffffffff82b92dc0 r optc_shift +ffffffff82b92e80 r optc_mask +ffffffff82b9317c r mpc_regs +ffffffff82b94968 r mpc_shift +ffffffff82b94a44 r mpc_mask +ffffffff82b94db0 r dsc_regs +ffffffff82b95184 r dsc_shift +ffffffff82b9523c r dsc_mask +ffffffff82b95520 r dwbc30_regs +ffffffff82b956fc r dwbc30_shift +ffffffff82b95830 r dwbc30_mask +ffffffff82b95d00 r mcif_wb30_regs +ffffffff82b95dfc r mcif_wb30_shift +ffffffff82b95ea8 r mcif_wb30_mask +ffffffff82b96160 r aux_engine_regs +ffffffff82b96228 r aux_mask +ffffffff82b96288 r aux_shift +ffffffff82b962a0 r i2c_hw_regs +ffffffff82b963b8 r i2c_shifts +ffffffff82b963e4 r i2c_masks +ffffffff82b96490 r audio_regs +ffffffff82b965c4 r audio_shift +ffffffff82b965dc r audio_mask +ffffffff82b96620 r stream_enc_regs +ffffffff82b96cc4 r se_shift +ffffffff82b96da0 r se_mask +ffffffff82b97110 r vpg_regs +ffffffff82b97188 r vpg_shift +ffffffff82b971b0 r vpg_mask +ffffffff82b97250 r afmt_regs +ffffffff82b97328 r afmt_shift +ffffffff82b9733c r afmt_mask +ffffffff82b97380 r hwseq_reg +ffffffff82b9759c r hwseq_shift +ffffffff82b9761c r hwseq_mask +ffffffff82b98000 r bios_regs +ffffffff82b98008 r res_cap_dcn303 +ffffffff82b98048 r debug_defaults_drv +ffffffff82b981c0 r debug_defaults_diags +ffffffff82b98340 r clk_src_regs +ffffffff82b983e8 r dccg_regs +ffffffff82b984d4 r dccg_shift +ffffffff82b9856c r dccg_mask +ffffffff82b987d0 r abm_regs +ffffffff82b98850 r abm_shift +ffffffff82b98864 r abm_mask +ffffffff82b988b0 r res_create_funcs +ffffffff82b988e0 r res_create_maximus_funcs +ffffffff82b98910 r plane_cap +ffffffff82b98940 r panel_cntl_regs +ffffffff82b98960 r panel_cntl_shift +ffffffff82b98970 r panel_cntl_mask +ffffffff82b989b0 r link_enc_regs +ffffffff82b98c40 r link_enc_aux_regs +ffffffff82b98c60 r link_enc_hpd_regs +ffffffff82b98c68 r le_shift +ffffffff82b98d58 r le_mask +ffffffff82b99110 r link_enc_feature +ffffffff82b99120 r cs_shift +ffffffff82b9912c r cs_mask +ffffffff82b99154 r hubbub_reg +ffffffff82b992c8 r hubbub_shift +ffffffff82b99350 r hubbub_mask +ffffffff82b99570 r vmid_regs +ffffffff82b99730 r vmid_shifts +ffffffff82b99738 r vmid_masks +ffffffff82b99760 r hubp_regs +ffffffff82b99b78 r hubp_shift +ffffffff82b99c74 r hubp_mask +ffffffff82b9a070 r dpp_regs +ffffffff82b9aaf0 r tf_shift +ffffffff82b9adc0 r tf_mask +ffffffff82b9b900 r opp_regs +ffffffff82b9b9b0 r opp_shift +ffffffff82b9b9e8 r opp_mask +ffffffff82b9bac0 r optc_regs +ffffffff82b9bd40 r optc_shift +ffffffff82b9be00 r optc_mask +ffffffff82b9c0fc r mpc_regs +ffffffff82b9d8e8 r mpc_shift +ffffffff82b9d9c4 r mpc_mask +ffffffff82b9dd30 r dsc_regs +ffffffff82b9deb8 r dsc_shift +ffffffff82b9df70 r dsc_mask +ffffffff82b9e250 r dwbc30_regs +ffffffff82b9e42c r dwbc30_shift +ffffffff82b9e560 r dwbc30_mask +ffffffff82b9ea30 r mcif_wb30_regs +ffffffff82b9eb2c r mcif_wb30_shift +ffffffff82b9ebd8 r mcif_wb30_mask +ffffffff82b9ee90 r aux_engine_regs +ffffffff82b9eee0 r aux_mask +ffffffff82b9ef40 r aux_shift +ffffffff82b9ef60 r i2c_hw_regs +ffffffff82b9efd0 r i2c_shifts +ffffffff82b9effc r i2c_masks +ffffffff82b9f0a0 r audio_regs +ffffffff82b9f1d4 r audio_shift +ffffffff82b9f1ec r audio_mask +ffffffff82b9f230 r stream_enc_regs +ffffffff82b9f4d8 r se_shift +ffffffff82b9f5b4 r se_mask +ffffffff82b9f920 r vpg_regs +ffffffff82b9f95c r vpg_shift +ffffffff82b9f984 r vpg_mask +ffffffff82b9fa20 r afmt_regs +ffffffff82b9fa8c r afmt_shift +ffffffff82b9faa0 r afmt_mask +ffffffff82b9fae4 r hwseq_reg +ffffffff82b9fd00 r hwseq_shift +ffffffff82b9fd80 r hwseq_mask +ffffffff82ba0000 r dccg31_funcs +ffffffff82ba1000 r dcn31_link_enc_funcs +ffffffff82ba2000 r dcn30_str_enc_funcs +ffffffff82ba3000 r hubbub31_funcs +ffffffff82ba4000 r dcn31_funcs +ffffffff82ba42c0 r dcn31_private_funcs +ffffffff82ba5000 r dcn31_link_panel_cntl_funcs +ffffffff82ba6000 r bios_regs +ffffffff82ba6008 r res_cap_dcn31 +ffffffff82ba6048 r debug_defaults_diags +ffffffff82ba61c0 r clk_src_regs +ffffffff82ba6370 r clk_src_regs_b0 +ffffffff82ba6514 r dccg_regs +ffffffff82ba6600 r dccg_shift +ffffffff82ba6698 r dccg_mask +ffffffff82ba6900 r abm_regs +ffffffff82ba6a00 r abm_shift +ffffffff82ba6a14 r abm_mask +ffffffff82ba6a60 r res_create_funcs +ffffffff82ba6a90 r res_create_maximus_funcs +ffffffff82ba6ac0 r plane_cap +ffffffff82ba6af0 r link_enc_regs +ffffffff82ba7150 r link_enc_aux_regs +ffffffff82ba71a0 r link_enc_hpd_regs +ffffffff82ba71b4 r le_shift +ffffffff82ba72a4 r le_mask +ffffffff82ba765c r link_enc_feature +ffffffff82ba766c r panel_config_defaults +ffffffff82ba76a0 r debug_defaults_drv +ffffffff82ba7818 r cs_shift +ffffffff82ba7824 r cs_mask +ffffffff82ba784c r hubbub_reg +ffffffff82ba79c0 r hubbub_shift +ffffffff82ba7a48 r hubbub_mask +ffffffff82ba7c70 r vmid_regs +ffffffff82ba7e30 r vmid_shifts +ffffffff82ba7e38 r vmid_masks +ffffffff82ba7e60 r hubp_regs +ffffffff82ba8690 r hubp_shift +ffffffff82ba878c r hubp_mask +ffffffff82ba8b80 r dpp_regs +ffffffff82baa080 r tf_shift +ffffffff82baa350 r tf_mask +ffffffff82baae90 r opp_regs +ffffffff82baaff0 r opp_shift +ffffffff82bab028 r opp_mask +ffffffff82bab100 r optc_regs +ffffffff82bab600 r optc_shift +ffffffff82bab6c0 r optc_mask +ffffffff82bab9bc r mpc_regs +ffffffff82bad1a8 r mpc_shift +ffffffff82bad284 r mpc_mask +ffffffff82bad5f0 r dsc_regs +ffffffff82bad83c r dsc_shift +ffffffff82bad8f4 r dsc_mask +ffffffff82badbd0 r dwbc30_regs +ffffffff82baddac r dwbc30_shift +ffffffff82badee0 r dwbc30_mask +ffffffff82bae3b0 r mcif_wb30_regs +ffffffff82bae4ac r mcif_wb30_shift +ffffffff82bae558 r mcif_wb30_mask +ffffffff82bae810 r aux_engine_regs +ffffffff82bae8d8 r aux_mask +ffffffff82bae938 r aux_shift +ffffffff82bae950 r i2c_hw_regs +ffffffff82baea68 r i2c_shifts +ffffffff82baea94 r i2c_masks +ffffffff82baeb40 r audio_regs +ffffffff82baec74 r audio_shift +ffffffff82baec8c r audio_mask +ffffffff82baecc8 r se_shift +ffffffff82baeda4 r se_mask +ffffffff82baf110 r vpg_regs +ffffffff82baf200 r vpg_shift +ffffffff82baf228 r vpg_mask +ffffffff82baf2d0 r afmt_regs +ffffffff82baf3a8 r afmt_shift +ffffffff82baf3bc r afmt_mask +ffffffff82baf410 r stream_enc_regs +ffffffff82bb0ab0 r hpo_dp_stream_enc_regs +ffffffff82bb0ce0 r hpo_dp_se_shift +ffffffff82bb0d08 r hpo_dp_se_mask +ffffffff82bb0db0 r apg_regs +ffffffff82bb0df0 r apg_shift +ffffffff82bb0df8 r apg_mask +ffffffff82bb0e10 r hpo_dp_link_enc_regs +ffffffff82bb0f20 r hpo_dp_le_shift +ffffffff82bb0f3c r hpo_dp_le_mask +ffffffff82bb0fa0 r hwseq_reg +ffffffff82bb11bc r hwseq_shift +ffffffff82bb123c r hwseq_mask +ffffffff82bb2000 r dccg314_funcs +ffffffff82bb3000 r dcn314_str_enc_funcs +ffffffff82bb4000 r dcn314_funcs +ffffffff82bb42c0 r dcn314_private_funcs +ffffffff82bb5000 r bios_regs +ffffffff82bb5008 r res_cap_dcn314 +ffffffff82bb5048 r debug_defaults_diags +ffffffff82bb51c0 r clk_src_regs +ffffffff82bb5364 r dccg_regs +ffffffff82bb5450 r dccg_shift +ffffffff82bb54e8 r dccg_mask +ffffffff82bb5750 r abm_regs +ffffffff82bb5850 r abm_shift +ffffffff82bb5864 r abm_mask +ffffffff82bb58b0 r res_create_funcs +ffffffff82bb58e0 r res_create_maximus_funcs +ffffffff82bb5910 r plane_cap +ffffffff82bb5940 r link_enc_regs +ffffffff82bb5fa0 r link_enc_aux_regs +ffffffff82bb5ff0 r link_enc_hpd_regs +ffffffff82bb6004 r le_shift +ffffffff82bb60f4 r le_mask +ffffffff82bb64ac r link_enc_feature +ffffffff82bb64bc r panel_config_defaults +ffffffff82bb64f0 r debug_defaults_drv +ffffffff82bb6668 r cs_shift +ffffffff82bb6674 r cs_mask +ffffffff82bb669c r hubbub_reg +ffffffff82bb6810 r hubbub_shift +ffffffff82bb6898 r hubbub_mask +ffffffff82bb6ac0 r vmid_regs +ffffffff82bb6c80 r vmid_shifts +ffffffff82bb6c88 r vmid_masks +ffffffff82bb6cb0 r hubp_regs +ffffffff82bb74e0 r hubp_shift +ffffffff82bb75dc r hubp_mask +ffffffff82bb79d0 r dpp_regs +ffffffff82bb8ed0 r tf_shift +ffffffff82bb91a0 r tf_mask +ffffffff82bb9ce0 r opp_regs +ffffffff82bb9e40 r opp_shift +ffffffff82bb9e78 r opp_mask +ffffffff82bb9f50 r optc_regs +ffffffff82bba450 r optc_shift +ffffffff82bba510 r optc_mask +ffffffff82bba80c r mpc_regs +ffffffff82bbbff8 r mpc_shift +ffffffff82bbc0d4 r mpc_mask +ffffffff82bbc440 r dsc_regs +ffffffff82bbc750 r dsc_shift +ffffffff82bbc808 r dsc_mask +ffffffff82bbcae0 r dwbc30_regs +ffffffff82bbccbc r dwbc30_shift +ffffffff82bbcdf0 r dwbc30_mask +ffffffff82bbd2c0 r mcif_wb30_regs +ffffffff82bbd3bc r mcif_wb30_shift +ffffffff82bbd468 r mcif_wb30_mask +ffffffff82bbd720 r aux_engine_regs +ffffffff82bbd7e8 r aux_mask +ffffffff82bbd848 r aux_shift +ffffffff82bbd860 r i2c_hw_regs +ffffffff82bbd978 r i2c_shifts +ffffffff82bbd9a4 r i2c_masks +ffffffff82bbda50 r audio_regs +ffffffff82bbdb84 r audio_shift +ffffffff82bbdb9c r audio_mask +ffffffff82bbdbe0 r stream_enc_regs +ffffffff82bbe284 r se_shift +ffffffff82bbe360 r se_mask +ffffffff82bbe6d0 r vpg_regs +ffffffff82bbe7c0 r vpg_shift +ffffffff82bbe7e8 r vpg_mask +ffffffff82bbe890 r afmt_regs +ffffffff82bbe968 r afmt_shift +ffffffff82bbe97c r afmt_mask +ffffffff82bbe9d0 r hpo_dp_stream_enc_regs +ffffffff82bbec00 r hpo_dp_se_shift +ffffffff82bbec28 r hpo_dp_se_mask +ffffffff82bbecd0 r apg_regs +ffffffff82bbed10 r apg_shift +ffffffff82bbed18 r apg_mask +ffffffff82bbed30 r hpo_dp_link_enc_regs +ffffffff82bbee40 r hpo_dp_le_shift +ffffffff82bbee5c r hpo_dp_le_mask +ffffffff82bbeec0 r hwseq_reg +ffffffff82bbf0dc r hwseq_shift +ffffffff82bbf15c r hwseq_mask +ffffffff82bc0000 r bios_regs +ffffffff82bc0008 r res_cap_dcn31 +ffffffff82bc0048 r debug_defaults_diags +ffffffff82bc01c0 r clk_src_regs +ffffffff82bc0364 r dccg_regs +ffffffff82bc0450 r dccg_shift +ffffffff82bc04e8 r dccg_mask +ffffffff82bc0750 r abm_regs +ffffffff82bc0850 r abm_shift +ffffffff82bc0864 r abm_mask +ffffffff82bc08b0 r res_create_funcs +ffffffff82bc08e0 r res_create_maximus_funcs +ffffffff82bc0910 r plane_cap +ffffffff82bc0940 r link_enc_regs +ffffffff82bc0fa0 r link_enc_aux_regs +ffffffff82bc0ff0 r link_enc_hpd_regs +ffffffff82bc1004 r le_shift +ffffffff82bc10f4 r le_mask +ffffffff82bc14ac r link_enc_feature +ffffffff82bc14bc r panel_config_defaults +ffffffff82bc14f0 r debug_defaults_drv +ffffffff82bc1668 r cs_shift +ffffffff82bc1674 r cs_mask +ffffffff82bc169c r hubbub_reg +ffffffff82bc1810 r hubbub_shift +ffffffff82bc1898 r hubbub_mask +ffffffff82bc1ac0 r vmid_regs +ffffffff82bc1c80 r vmid_shifts +ffffffff82bc1c88 r vmid_masks +ffffffff82bc1cb0 r hubp_regs +ffffffff82bc24e0 r hubp_shift +ffffffff82bc25dc r hubp_mask +ffffffff82bc29d0 r dpp_regs +ffffffff82bc3ed0 r tf_shift +ffffffff82bc41a0 r tf_mask +ffffffff82bc4ce0 r opp_regs +ffffffff82bc4e40 r opp_shift +ffffffff82bc4e78 r opp_mask +ffffffff82bc4f50 r optc_regs +ffffffff82bc5450 r optc_shift +ffffffff82bc5510 r optc_mask +ffffffff82bc580c r mpc_regs +ffffffff82bc6ff8 r mpc_shift +ffffffff82bc70d4 r mpc_mask +ffffffff82bc7440 r dsc_regs +ffffffff82bc768c r dsc_shift +ffffffff82bc7744 r dsc_mask +ffffffff82bc7a20 r dwbc30_regs +ffffffff82bc7bfc r dwbc30_shift +ffffffff82bc7d30 r dwbc30_mask +ffffffff82bc8200 r mcif_wb30_regs +ffffffff82bc82fc r mcif_wb30_shift +ffffffff82bc83a8 r mcif_wb30_mask +ffffffff82bc8660 r aux_engine_regs +ffffffff82bc8728 r aux_mask +ffffffff82bc8788 r aux_shift +ffffffff82bc87a0 r i2c_hw_regs +ffffffff82bc88b8 r i2c_shifts +ffffffff82bc88e4 r i2c_masks +ffffffff82bc8990 r audio_regs +ffffffff82bc8ac4 r audio_shift +ffffffff82bc8adc r audio_mask +ffffffff82bc8b20 r stream_enc_regs +ffffffff82bc91c4 r se_shift +ffffffff82bc92a0 r se_mask +ffffffff82bc9610 r vpg_regs +ffffffff82bc9700 r vpg_shift +ffffffff82bc9728 r vpg_mask +ffffffff82bc97d0 r afmt_regs +ffffffff82bc98a8 r afmt_shift +ffffffff82bc98bc r afmt_mask +ffffffff82bc9910 r hpo_dp_stream_enc_regs +ffffffff82bc9b40 r hpo_dp_se_shift +ffffffff82bc9b68 r hpo_dp_se_mask +ffffffff82bc9c10 r apg_regs +ffffffff82bc9c50 r apg_shift +ffffffff82bc9c58 r apg_mask +ffffffff82bc9c70 r hpo_dp_link_enc_regs +ffffffff82bc9d80 r hpo_dp_le_shift +ffffffff82bc9d9c r hpo_dp_le_mask +ffffffff82bc9e00 r hwseq_reg +ffffffff82bca01c r hwseq_shift +ffffffff82bca09c r hwseq_mask +ffffffff82bcb000 r bios_regs +ffffffff82bcb008 r res_cap_dcn31 +ffffffff82bcb048 r debug_defaults_diags +ffffffff82bcb1c0 r clk_src_regs +ffffffff82bcb364 r dccg_regs +ffffffff82bcb450 r dccg_shift +ffffffff82bcb4e8 r dccg_mask +ffffffff82bcb750 r abm_regs +ffffffff82bcb850 r abm_shift +ffffffff82bcb864 r abm_mask +ffffffff82bcb8b0 r res_create_funcs +ffffffff82bcb8e0 r res_create_maximus_funcs +ffffffff82bcb910 r plane_cap +ffffffff82bcb940 r link_enc_regs +ffffffff82bcbfa0 r link_enc_aux_regs +ffffffff82bcbff0 r link_enc_hpd_regs +ffffffff82bcc004 r le_shift +ffffffff82bcc0f4 r le_mask +ffffffff82bcc4ac r link_enc_feature +ffffffff82bcc4bc r panel_config_defaults +ffffffff82bcc4f0 r debug_defaults_drv +ffffffff82bcc668 r cs_shift +ffffffff82bcc674 r cs_mask +ffffffff82bcc69c r hubbub_reg +ffffffff82bcc810 r hubbub_shift +ffffffff82bcc898 r hubbub_mask +ffffffff82bccac0 r vmid_regs +ffffffff82bccc80 r vmid_shifts +ffffffff82bccc88 r vmid_masks +ffffffff82bcccb0 r hubp_regs +ffffffff82bcd4e0 r hubp_shift +ffffffff82bcd5dc r hubp_mask +ffffffff82bcd9d0 r dpp_regs +ffffffff82bceed0 r tf_shift +ffffffff82bcf1a0 r tf_mask +ffffffff82bcfce0 r opp_regs +ffffffff82bcfe40 r opp_shift +ffffffff82bcfe78 r opp_mask +ffffffff82bcff50 r optc_regs +ffffffff82bd0450 r optc_shift +ffffffff82bd0510 r optc_mask +ffffffff82bd080c r mpc_regs +ffffffff82bd1ff8 r mpc_shift +ffffffff82bd20d4 r mpc_mask +ffffffff82bd2440 r dsc_regs +ffffffff82bd268c r dsc_shift +ffffffff82bd2744 r dsc_mask +ffffffff82bd2a20 r dwbc30_regs +ffffffff82bd2bfc r dwbc30_shift +ffffffff82bd2d30 r dwbc30_mask +ffffffff82bd3200 r mcif_wb30_regs +ffffffff82bd32fc r mcif_wb30_shift +ffffffff82bd33a8 r mcif_wb30_mask +ffffffff82bd3660 r aux_engine_regs +ffffffff82bd3728 r aux_mask +ffffffff82bd3788 r aux_shift +ffffffff82bd37a0 r i2c_hw_regs +ffffffff82bd38b8 r i2c_shifts +ffffffff82bd38e4 r i2c_masks +ffffffff82bd3990 r audio_regs +ffffffff82bd3ac4 r audio_shift +ffffffff82bd3adc r audio_mask +ffffffff82bd3b20 r stream_enc_regs +ffffffff82bd41c4 r se_shift +ffffffff82bd42a0 r se_mask +ffffffff82bd4610 r vpg_regs +ffffffff82bd4700 r vpg_shift +ffffffff82bd4728 r vpg_mask +ffffffff82bd47d0 r afmt_regs +ffffffff82bd48a8 r afmt_shift +ffffffff82bd48bc r afmt_mask +ffffffff82bd4910 r hpo_dp_stream_enc_regs +ffffffff82bd4b40 r hpo_dp_se_shift +ffffffff82bd4b68 r hpo_dp_se_mask +ffffffff82bd4c10 r apg_regs +ffffffff82bd4c50 r apg_shift +ffffffff82bd4c58 r apg_mask +ffffffff82bd4c70 r hpo_dp_link_enc_regs +ffffffff82bd4d80 r hpo_dp_le_shift +ffffffff82bd4d9c r hpo_dp_le_mask +ffffffff82bd4e00 r hwseq_reg +ffffffff82bd501c r hwseq_shift +ffffffff82bd509c r hwseq_mask +ffffffff82bd6000 r dccg32_funcs +ffffffff82bd7000 r dcn32_link_enc_funcs +ffffffff82bd8000 r dcn32_str_enc_funcs +ffffffff82bd9000 r hubbub32_funcs +ffffffff82bda000 r dcn32_funcs +ffffffff82bda2c0 r dcn32_private_funcs +ffffffff82bdb000 R dcn32_mmhubbub_funcs +ffffffff82bdc000 R dcn32_mpc_funcs +ffffffff82bdd000 r res_cap_dcn32 +ffffffff82bdd040 r debug_defaults_diags +ffffffff82bdd1b8 r dccg_shift +ffffffff82bdd250 r dccg_mask +ffffffff82bdd4ac r abm_shift +ffffffff82bdd4c0 r abm_mask +ffffffff82bdd508 r res_create_funcs +ffffffff82bdd538 r res_create_maximus_funcs +ffffffff82bdd568 r plane_cap +ffffffff82bdd594 r le_shift +ffffffff82bdd684 r le_mask +ffffffff82bdda3c r link_enc_feature +ffffffff82bdda50 r debug_defaults_drv +ffffffff82bddbc8 r cs_shift +ffffffff82bddbd4 r cs_mask +ffffffff82bddbfc r hubbub_shift +ffffffff82bddc84 r hubbub_mask +ffffffff82bddea0 r vmid_shifts +ffffffff82bddea8 r vmid_masks +ffffffff82bddec8 r hubp_shift +ffffffff82bddfc4 r hubp_mask +ffffffff82bde3b4 r tf_shift +ffffffff82bde684 r tf_mask +ffffffff82bdf1c4 r opp_shift +ffffffff82bdf1fc r opp_mask +ffffffff82bdf2d0 r optc_shift +ffffffff82bdf390 r optc_mask +ffffffff82bdf68c r mpc_shift +ffffffff82bdf768 r mpc_mask +ffffffff82bdfad4 r dsc_shift +ffffffff82bdfb8c r dsc_mask +ffffffff82bdfe64 r dwbc30_shift +ffffffff82bdff98 r dwbc30_mask +ffffffff82be0460 r mcif_wb30_shift +ffffffff82be050c r mcif_wb30_mask +ffffffff82be07b8 r aux_mask +ffffffff82be0818 r aux_shift +ffffffff82be0830 r i2c_shifts +ffffffff82be085c r i2c_masks +ffffffff82be0900 r audio_shift +ffffffff82be0918 r audio_mask +ffffffff82be0954 r se_shift +ffffffff82be0a30 r se_mask +ffffffff82be0d9c r vpg_shift +ffffffff82be0dc4 r vpg_mask +ffffffff82be0e58 r afmt_shift +ffffffff82be0e6c r afmt_mask +ffffffff82be0eb0 r hpo_dp_se_shift +ffffffff82be0ed8 r hpo_dp_se_mask +ffffffff82be0f78 r apg_shift +ffffffff82be0f80 r apg_mask +ffffffff82be0f98 r hpo_dp_le_shift +ffffffff82be0fb4 r hpo_dp_le_mask +ffffffff82be1018 r hwseq_shift +ffffffff82be1098 r hwseq_mask +ffffffff82be2000 r dcn321_link_enc_funcs +ffffffff82be3000 r res_cap_dcn321 +ffffffff82be3040 r debug_defaults_diags +ffffffff82be31b8 r dccg_shift +ffffffff82be3250 r dccg_mask +ffffffff82be34ac r abm_shift +ffffffff82be34c0 r abm_mask +ffffffff82be3508 r res_create_funcs +ffffffff82be3538 r res_create_maximus_funcs +ffffffff82be3568 r plane_cap +ffffffff82be3594 r le_shift +ffffffff82be3684 r le_mask +ffffffff82be3a3c r link_enc_feature +ffffffff82be3a50 r debug_defaults_drv +ffffffff82be3bc8 r cs_shift +ffffffff82be3bd4 r cs_mask +ffffffff82be3bfc r hubbub_shift +ffffffff82be3c84 r hubbub_mask +ffffffff82be3ea0 r vmid_shifts +ffffffff82be3ea8 r vmid_masks +ffffffff82be3ec8 r hubp_shift +ffffffff82be3fc4 r hubp_mask +ffffffff82be43b4 r tf_shift +ffffffff82be4684 r tf_mask +ffffffff82be51c4 r opp_shift +ffffffff82be51fc r opp_mask +ffffffff82be52d0 r optc_shift +ffffffff82be5390 r optc_mask +ffffffff82be568c r mpc_shift +ffffffff82be5768 r mpc_mask +ffffffff82be5ad4 r dsc_shift +ffffffff82be5b8c r dsc_mask +ffffffff82be5e64 r dwbc30_shift +ffffffff82be5f98 r dwbc30_mask +ffffffff82be6460 r mcif_wb30_shift +ffffffff82be650c r mcif_wb30_mask +ffffffff82be67b8 r aux_mask +ffffffff82be6818 r aux_shift +ffffffff82be6830 r i2c_shifts +ffffffff82be685c r i2c_masks +ffffffff82be6900 r audio_shift +ffffffff82be6918 r audio_mask +ffffffff82be6954 r se_shift +ffffffff82be6a30 r se_mask +ffffffff82be6d9c r vpg_shift +ffffffff82be6dc4 r vpg_mask +ffffffff82be6e58 r afmt_shift +ffffffff82be6e6c r afmt_mask +ffffffff82be6eb0 r hpo_dp_se_shift +ffffffff82be6ed8 r hpo_dp_se_mask +ffffffff82be6f78 r apg_shift +ffffffff82be6f80 r apg_mask +ffffffff82be6f98 r hpo_dp_le_shift +ffffffff82be6fb4 r hpo_dp_le_mask +ffffffff82be7018 r hwseq_shift +ffffffff82be7098 r hwseq_mask +ffffffff82be9000 R dcn10_soc_defaults +ffffffff82be908c R dcn10_ip_defaults +ffffffff82bf4000 R dml20_funcs +ffffffff82bf4030 R dml20v2_funcs +ffffffff82bf4060 R dml21_funcs +ffffffff82bf4090 R dml30_funcs +ffffffff82bf40c0 R dml31_funcs +ffffffff82bf40f0 R dml314_funcs +ffffffff82bf4120 R dml32_funcs +ffffffff82bf7000 R qp_table_422_10bpc_min +ffffffff82bf7740 R qp_table_444_8bpc_max +ffffffff82bf8080 R qp_table_420_12bpc_max +ffffffff82bf87c0 R qp_table_444_10bpc_min +ffffffff82bf9400 R qp_table_420_8bpc_max +ffffffff82bf9840 R qp_table_444_8bpc_min +ffffffff82bfa180 R qp_table_444_12bpc_min +ffffffff82bfb0c0 R qp_table_420_12bpc_min +ffffffff82bfb800 R qp_table_422_12bpc_min +ffffffff82bfc140 R qp_table_422_12bpc_max +ffffffff82bfca80 R qp_table_444_12bpc_max +ffffffff82bfd9c0 R qp_table_420_8bpc_min +ffffffff82bfde00 R qp_table_422_8bpc_min +ffffffff82bfe340 R qp_table_422_10bpc_max +ffffffff82bfea80 R qp_table_420_10bpc_max +ffffffff82bff040 R qp_table_420_10bpc_min +ffffffff82bff600 R qp_table_444_10bpc_max +ffffffff82c00240 R qp_table_422_8bpc_max +ffffffff82c02000 r funcs +ffffffff82c02050 r hpd_regs +ffffffff82c021a0 r hpd_shift +ffffffff82c021b0 r hpd_mask +ffffffff82c021c0 r ddc_data_regs +ffffffff82c023a0 r ddc_clk_regs +ffffffff82c02580 r ddc_shift +ffffffff82c025a8 r ddc_mask ffffffff82c03000 r funcs -ffffffff82c03050 r hpd_regs -ffffffff82c031a0 r hpd_shift -ffffffff82c031b0 r hpd_mask -ffffffff82c031c0 r ddc_data_regs -ffffffff82c033a0 r ddc_clk_regs -ffffffff82c03580 r ddc_shift -ffffffff82c035a8 r ddc_mask ffffffff82c04000 r funcs +ffffffff82c04050 r hpd_regs +ffffffff82c041a0 r hpd_shift +ffffffff82c041b0 r hpd_mask +ffffffff82c041c0 r ddc_data_regs +ffffffff82c043a0 r ddc_clk_regs +ffffffff82c04580 r ddc_shift +ffffffff82c045a8 r ddc_mask ffffffff82c05000 r funcs -ffffffff82c05050 r hpd_regs -ffffffff82c051a0 r hpd_shift -ffffffff82c051b0 r hpd_mask -ffffffff82c051c0 r ddc_data_regs -ffffffff82c053a0 r ddc_clk_regs -ffffffff82c05580 r ddc_shift -ffffffff82c055a8 r ddc_mask ffffffff82c06000 r funcs +ffffffff82c06050 r hpd_regs +ffffffff82c061a0 r hpd_shift +ffffffff82c061b0 r hpd_mask +ffffffff82c061c0 r ddc_data_regs +ffffffff82c063a0 r ddc_clk_regs +ffffffff82c06580 r ddc_shift +ffffffff82c065a8 r ddc_mask ffffffff82c07000 r funcs -ffffffff82c07050 r hpd_regs -ffffffff82c071a0 r hpd_shift -ffffffff82c071b0 r hpd_mask -ffffffff82c071c0 r ddc_data_regs -ffffffff82c073a0 r ddc_clk_regs -ffffffff82c07580 r ddc_shift -ffffffff82c075a8 r ddc_mask ffffffff82c08000 r funcs +ffffffff82c08050 r hpd_regs +ffffffff82c081a0 r hpd_shift +ffffffff82c081b0 r hpd_mask +ffffffff82c081c0 r ddc_data_regs +ffffffff82c083a0 r ddc_clk_regs +ffffffff82c08580 r ddc_shift +ffffffff82c085a8 r ddc_mask +ffffffff82c085d0 r generic_regs +ffffffff82c08640 r generic_shift +ffffffff82c08650 r generic_mask ffffffff82c09000 r funcs -ffffffff82c09050 r hpd_regs -ffffffff82c091a0 r hpd_shift -ffffffff82c091b0 r hpd_mask -ffffffff82c091c0 r ddc_data_regs -ffffffff82c093a0 r ddc_clk_regs -ffffffff82c09580 r ddc_shift -ffffffff82c095a8 r ddc_mask -ffffffff82c095d0 r generic_regs -ffffffff82c09640 r generic_shift -ffffffff82c09650 r generic_mask ffffffff82c0a000 r funcs +ffffffff82c0a050 r hpd_regs +ffffffff82c0a1a0 r hpd_shift +ffffffff82c0a1b0 r hpd_mask +ffffffff82c0a1c0 r ddc_data_regs_dcn +ffffffff82c0a370 r ddc_clk_regs_dcn +ffffffff82c0a520 r ddc_shift +ffffffff82c0a610 r ddc_mask +ffffffff82c0a700 r generic_regs +ffffffff82c0a770 r generic_shift +ffffffff82c0a780 r generic_mask ffffffff82c0b000 r funcs -ffffffff82c0b050 r hpd_regs -ffffffff82c0b1a0 r hpd_shift -ffffffff82c0b1b0 r hpd_mask -ffffffff82c0b1c0 r ddc_data_regs_dcn -ffffffff82c0b370 r ddc_clk_regs_dcn -ffffffff82c0b520 r ddc_shift -ffffffff82c0b610 r ddc_mask -ffffffff82c0b700 r generic_regs -ffffffff82c0b770 r generic_shift -ffffffff82c0b780 r generic_mask ffffffff82c0c000 r funcs +ffffffff82c0c050 r hpd_regs +ffffffff82c0c168 r hpd_shift +ffffffff82c0c178 r hpd_mask +ffffffff82c0c190 r ddc_data_regs_dcn +ffffffff82c0c2c0 r ddc_clk_regs_dcn +ffffffff82c0c3f0 r ddc_shift +ffffffff82c0c4e0 r ddc_mask +ffffffff82c0c5d0 r generic_regs +ffffffff82c0c604 r generic_shift +ffffffff82c0c60c r generic_mask ffffffff82c0d000 r funcs -ffffffff82c0d050 r hpd_regs -ffffffff82c0d168 r hpd_shift -ffffffff82c0d178 r hpd_mask -ffffffff82c0d190 r ddc_data_regs_dcn -ffffffff82c0d2c0 r ddc_clk_regs_dcn -ffffffff82c0d3f0 r ddc_shift -ffffffff82c0d4e0 r ddc_mask -ffffffff82c0d5d0 r generic_regs -ffffffff82c0d604 r generic_shift -ffffffff82c0d60c r generic_mask ffffffff82c0e000 r funcs +ffffffff82c0e050 r hpd_regs +ffffffff82c0e1a0 r hpd_shift +ffffffff82c0e1b0 r hpd_mask +ffffffff82c0e1c0 r ddc_data_regs_dcn +ffffffff82c0e370 r ddc_clk_regs_dcn +ffffffff82c0e520 r ddc_shift +ffffffff82c0e610 r ddc_mask +ffffffff82c0e700 r generic_regs +ffffffff82c0e770 r generic_shift +ffffffff82c0e780 r generic_mask ffffffff82c0f000 r funcs -ffffffff82c0f050 r hpd_regs -ffffffff82c0f1a0 r hpd_shift -ffffffff82c0f1b0 r hpd_mask -ffffffff82c0f1c0 r ddc_data_regs_dcn -ffffffff82c0f370 r ddc_clk_regs_dcn -ffffffff82c0f520 r ddc_shift -ffffffff82c0f610 r ddc_mask -ffffffff82c0f700 r generic_regs -ffffffff82c0f770 r generic_shift -ffffffff82c0f780 r generic_mask ffffffff82c10000 r funcs +ffffffff82c10050 r hpd_regs +ffffffff82c10168 r hpd_shift +ffffffff82c10178 r hpd_mask +ffffffff82c10190 r ddc_data_regs_dcn +ffffffff82c10300 r ddc_clk_regs_dcn +ffffffff82c10470 r ddc_shift +ffffffff82c10560 r ddc_mask +ffffffff82c10650 r generic_regs +ffffffff82c106c0 r generic_shift +ffffffff82c106d0 r generic_mask ffffffff82c11000 r funcs -ffffffff82c11050 r hpd_regs -ffffffff82c11168 r hpd_shift -ffffffff82c11178 r hpd_mask -ffffffff82c11190 r ddc_data_regs_dcn -ffffffff82c11300 r ddc_clk_regs_dcn -ffffffff82c11470 r ddc_shift -ffffffff82c11560 r ddc_mask -ffffffff82c11650 r generic_regs -ffffffff82c116c0 r generic_shift -ffffffff82c116d0 r generic_mask ffffffff82c12000 r funcs +ffffffff82c12050 r hpd_regs +ffffffff82c12168 r hpd_shift +ffffffff82c12178 r hpd_mask +ffffffff82c12190 r ddc_data_regs_dcn +ffffffff82c12340 r ddc_clk_regs_dcn +ffffffff82c124f0 r ddc_shift +ffffffff82c125e0 r ddc_mask +ffffffff82c126d0 r generic_regs +ffffffff82c12740 r generic_shift +ffffffff82c12750 r generic_mask ffffffff82c13000 r funcs -ffffffff82c13050 r hpd_regs -ffffffff82c13168 r hpd_shift -ffffffff82c13178 r hpd_mask -ffffffff82c13190 r ddc_data_regs_dcn -ffffffff82c13340 r ddc_clk_regs_dcn -ffffffff82c134f0 r ddc_shift -ffffffff82c135e0 r ddc_mask -ffffffff82c136d0 r generic_regs -ffffffff82c13740 r generic_shift -ffffffff82c13750 r generic_mask ffffffff82c14000 r funcs ffffffff82c15000 r funcs ffffffff82c16000 r funcs -ffffffff82c17000 r funcs -ffffffff82c18000 r hdmi_14_protection -ffffffff82c18010 r dp_11_protection -ffffffff82c18020 r hdcp_i2c_offsets -ffffffff82c18050 r hdcp_dpcd_addrs -ffffffff82c19000 r irq_service_funcs_dce110 -ffffffff82c19010 r irq_source_info_dce110 -ffffffff82c1a2a0 r dummy_irq_info_funcs -ffffffff82c1a2b0 r hpd_irq_info_funcs -ffffffff82c1a2c0 r hpd_rx_irq_info_funcs -ffffffff82c1a2d0 r pflip_irq_info_funcs -ffffffff82c1a2e0 r vupdate_irq_info_funcs -ffffffff82c1a2f0 r vblank_irq_info_funcs -ffffffff82c1b000 r irq_service_funcs_dce120 -ffffffff82c1b008 r dummy_irq_info_funcs -ffffffff82c1b018 r hpd_irq_info_funcs -ffffffff82c1b028 r hpd_rx_irq_info_funcs -ffffffff82c1b038 r pflip_irq_info_funcs -ffffffff82c1b048 r vupdate_irq_info_funcs -ffffffff82c1b058 r vblank_irq_info_funcs -ffffffff82c1b070 r irq_source_info_dce120 -ffffffff82c1d000 r irq_service_funcs_dce80 -ffffffff82c1d008 r dummy_irq_info_funcs -ffffffff82c1d018 r hpd_irq_info_funcs -ffffffff82c1d028 r hpd_rx_irq_info_funcs -ffffffff82c1d038 r pflip_irq_info_funcs -ffffffff82c1d048 r vupdate_irq_info_funcs -ffffffff82c1d058 r vblank_irq_info_funcs -ffffffff82c1d070 r irq_source_info_dce80 -ffffffff82c1f000 r irq_service_funcs_dcn10 -ffffffff82c1f008 r dummy_irq_info_funcs -ffffffff82c1f018 r hpd_irq_info_funcs -ffffffff82c1f028 r hpd_rx_irq_info_funcs -ffffffff82c1f038 r pflip_irq_info_funcs -ffffffff82c1f048 r vupdate_no_lock_irq_info_funcs -ffffffff82c1f058 r vblank_irq_info_funcs -ffffffff82c1f068 r vline0_irq_info_funcs -ffffffff82c1f080 r irq_source_info_dcn10 -ffffffff82c21000 r irq_service_funcs_dcn20 -ffffffff82c21008 r dummy_irq_info_funcs -ffffffff82c21018 r hpd_irq_info_funcs -ffffffff82c21028 r hpd_rx_irq_info_funcs -ffffffff82c21038 r pflip_irq_info_funcs -ffffffff82c21048 r vupdate_no_lock_irq_info_funcs -ffffffff82c21058 r vblank_irq_info_funcs -ffffffff82c21068 r vline0_irq_info_funcs -ffffffff82c21080 r irq_source_info_dcn20 -ffffffff82c23000 r irq_service_funcs_dcn201 -ffffffff82c23008 r dummy_irq_info_funcs -ffffffff82c23018 r hpd_irq_info_funcs -ffffffff82c23028 r hpd_rx_irq_info_funcs -ffffffff82c23038 r pflip_irq_info_funcs -ffffffff82c23048 r vupdate_no_lock_irq_info_funcs -ffffffff82c23058 r vblank_irq_info_funcs -ffffffff82c23068 r vline0_irq_info_funcs -ffffffff82c23080 r irq_source_info_dcn201 -ffffffff82c25000 r irq_source_info_dcn21 -ffffffff82c26290 r irq_service_funcs_dcn21 -ffffffff82c26298 r dummy_irq_info_funcs -ffffffff82c262a8 r hpd_irq_info_funcs -ffffffff82c262b8 r hpd_rx_irq_info_funcs -ffffffff82c262c8 r pflip_irq_info_funcs -ffffffff82c262d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c262e8 r vblank_irq_info_funcs -ffffffff82c262f8 r vline0_irq_info_funcs -ffffffff82c26308 r dmub_outbox_irq_info_funcs -ffffffff82c27000 r irq_source_info_dcn30 -ffffffff82c28290 r irq_service_funcs_dcn30 -ffffffff82c28298 r dummy_irq_info_funcs -ffffffff82c282a8 r hpd_irq_info_funcs -ffffffff82c282b8 r hpd_rx_irq_info_funcs -ffffffff82c282c8 r pflip_irq_info_funcs -ffffffff82c282d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c282e8 r vblank_irq_info_funcs -ffffffff82c282f8 r vline0_irq_info_funcs -ffffffff82c28308 r dmub_trace_irq_info_funcs -ffffffff82c29000 r irq_source_info_dcn302 -ffffffff82c2a290 r irq_service_funcs_dcn302 -ffffffff82c2a298 r dummy_irq_info_funcs -ffffffff82c2a2a8 r hpd_irq_info_funcs -ffffffff82c2a2b8 r hpd_rx_irq_info_funcs -ffffffff82c2a2c8 r pflip_irq_info_funcs -ffffffff82c2a2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c2a2e8 r vblank_irq_info_funcs -ffffffff82c2a2f8 r vline0_irq_info_funcs -ffffffff82c2a308 r dmub_trace_irq_info_funcs -ffffffff82c2b000 r irq_service_funcs_dcn303 -ffffffff82c2b008 r dummy_irq_info_funcs -ffffffff82c2b018 r hpd_irq_info_funcs -ffffffff82c2b028 r hpd_rx_irq_info_funcs -ffffffff82c2b038 r pflip_irq_info_funcs -ffffffff82c2b048 r vupdate_no_lock_irq_info_funcs -ffffffff82c2b058 r vblank_irq_info_funcs -ffffffff82c2b068 r vline0_irq_info_funcs -ffffffff82c2b080 r irq_source_info_dcn303 -ffffffff82c2d000 r irq_source_info_dcn31 -ffffffff82c2e290 r irq_service_funcs_dcn31 -ffffffff82c2e298 r dummy_irq_info_funcs -ffffffff82c2e2a8 r hpd_irq_info_funcs -ffffffff82c2e2b8 r hpd_rx_irq_info_funcs -ffffffff82c2e2c8 r pflip_irq_info_funcs -ffffffff82c2e2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c2e2e8 r vblank_irq_info_funcs -ffffffff82c2e2f8 r vline0_irq_info_funcs -ffffffff82c2e308 r outbox_irq_info_funcs -ffffffff82c2f000 r irq_source_info_dcn314 -ffffffff82c30290 r irq_service_funcs_dcn314 -ffffffff82c30298 r dummy_irq_info_funcs -ffffffff82c302a8 r hpd_irq_info_funcs -ffffffff82c302b8 r hpd_rx_irq_info_funcs -ffffffff82c302c8 r pflip_irq_info_funcs -ffffffff82c302d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c302e8 r vblank_irq_info_funcs -ffffffff82c302f8 r vline0_irq_info_funcs -ffffffff82c30308 r outbox_irq_info_funcs -ffffffff82c31000 r irq_source_info_dcn315 -ffffffff82c32290 r irq_service_funcs_dcn315 -ffffffff82c32298 r dummy_irq_info_funcs -ffffffff82c322a8 r hpd_irq_info_funcs -ffffffff82c322b8 r hpd_rx_irq_info_funcs -ffffffff82c322c8 r pflip_irq_info_funcs -ffffffff82c322d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c322e8 r vblank_irq_info_funcs -ffffffff82c322f8 r vline0_irq_info_funcs -ffffffff82c32308 r outbox_irq_info_funcs -ffffffff82c33000 r irq_source_info_dcn32 -ffffffff82c34290 r irq_service_funcs_dcn32 -ffffffff82c34298 r dummy_irq_info_funcs -ffffffff82c342a8 r hpd_irq_info_funcs -ffffffff82c342b8 r hpd_rx_irq_info_funcs -ffffffff82c342c8 r pflip_irq_info_funcs -ffffffff82c342d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c342e8 r vblank_irq_info_funcs -ffffffff82c342f8 r vline0_irq_info_funcs -ffffffff82c34308 r outbox_irq_info_funcs -ffffffff82c35000 r dio_link_hwss -ffffffff82c36000 r dpia_link_hwss -ffffffff82c37000 r hpo_dp_link_hwss -ffffffff82c38000 r virtual_lnk_enc_funcs -ffffffff82c39000 r virtual_link_hwss -ffffffff82c3a000 r virtual_str_enc_funcs -ffffffff82c3b000 R dmub_srv_dcn20_regs -ffffffff82c3c000 R dmub_srv_dcn21_regs -ffffffff82c3d000 R dmub_srv_dcn30_regs -ffffffff82c3e000 R dmub_srv_dcn301_regs -ffffffff82c3f000 R dmub_srv_dcn302_regs -ffffffff82c40000 R dmub_srv_dcn303_regs -ffffffff82c41000 R dmub_srv_dcn31_regs -ffffffff82c42000 R dmub_srv_dcn315_regs -ffffffff82c43000 R dmub_srv_dcn316_regs -ffffffff82c44000 R dmub_srv_dcn32_regs -ffffffff82c45000 r numerator01 -ffffffff82c45020 r numerator02 -ffffffff82c45040 r numerator04 -ffffffff82c45060 r numerator05 -ffffffff82c47000 r abm_settings -ffffffff82c47010 r abm_settings_config0 -ffffffff82c47050 r abm_settings_config1 -ffffffff82c47088 r min_reduction_table_v_2_2 -ffffffff82c47095 r max_reduction_table_v_2_2 -ffffffff82c470a2 r min_reduction_table -ffffffff82c470af r max_reduction_table -ffffffff82c48000 R amdgpu_pp_profile_name -ffffffff82c49000 r pp_lib_thermal_controller_names -ffffffff82c4a000 r pp_ip_funcs -ffffffff82c4a0a0 R pp_smu_ip_block -ffffffff82c4a0b8 r pp_dpm_funcs +ffffffff82c17000 r hdmi_14_protection +ffffffff82c17010 r dp_11_protection +ffffffff82c17020 r hdcp_i2c_offsets +ffffffff82c17050 r hdcp_dpcd_addrs +ffffffff82c18000 r irq_service_funcs_dce110 +ffffffff82c18010 r irq_source_info_dce110 +ffffffff82c192a0 r dummy_irq_info_funcs +ffffffff82c192b0 r hpd_irq_info_funcs +ffffffff82c192c0 r hpd_rx_irq_info_funcs +ffffffff82c192d0 r pflip_irq_info_funcs +ffffffff82c192e0 r vupdate_irq_info_funcs +ffffffff82c192f0 r vblank_irq_info_funcs +ffffffff82c1a000 r irq_service_funcs_dce120 +ffffffff82c1a008 r dummy_irq_info_funcs +ffffffff82c1a018 r hpd_irq_info_funcs +ffffffff82c1a028 r hpd_rx_irq_info_funcs +ffffffff82c1a038 r pflip_irq_info_funcs +ffffffff82c1a048 r vupdate_irq_info_funcs +ffffffff82c1a058 r vblank_irq_info_funcs +ffffffff82c1a070 r irq_source_info_dce120 +ffffffff82c1c000 r irq_service_funcs_dce80 +ffffffff82c1c008 r dummy_irq_info_funcs +ffffffff82c1c018 r hpd_irq_info_funcs +ffffffff82c1c028 r hpd_rx_irq_info_funcs +ffffffff82c1c038 r pflip_irq_info_funcs +ffffffff82c1c048 r vupdate_irq_info_funcs +ffffffff82c1c058 r vblank_irq_info_funcs +ffffffff82c1c070 r irq_source_info_dce80 +ffffffff82c1e000 r irq_service_funcs_dcn10 +ffffffff82c1e008 r dummy_irq_info_funcs +ffffffff82c1e018 r hpd_irq_info_funcs +ffffffff82c1e028 r hpd_rx_irq_info_funcs +ffffffff82c1e038 r pflip_irq_info_funcs +ffffffff82c1e048 r vupdate_no_lock_irq_info_funcs +ffffffff82c1e058 r vblank_irq_info_funcs +ffffffff82c1e068 r vline0_irq_info_funcs +ffffffff82c1e080 r irq_source_info_dcn10 +ffffffff82c20000 r irq_service_funcs_dcn20 +ffffffff82c20008 r dummy_irq_info_funcs +ffffffff82c20018 r hpd_irq_info_funcs +ffffffff82c20028 r hpd_rx_irq_info_funcs +ffffffff82c20038 r pflip_irq_info_funcs +ffffffff82c20048 r vupdate_no_lock_irq_info_funcs +ffffffff82c20058 r vblank_irq_info_funcs +ffffffff82c20068 r vline0_irq_info_funcs +ffffffff82c20080 r irq_source_info_dcn20 +ffffffff82c22000 r irq_service_funcs_dcn201 +ffffffff82c22008 r dummy_irq_info_funcs +ffffffff82c22018 r hpd_irq_info_funcs +ffffffff82c22028 r hpd_rx_irq_info_funcs +ffffffff82c22038 r pflip_irq_info_funcs +ffffffff82c22048 r vupdate_no_lock_irq_info_funcs +ffffffff82c22058 r vblank_irq_info_funcs +ffffffff82c22068 r vline0_irq_info_funcs +ffffffff82c22080 r irq_source_info_dcn201 +ffffffff82c24000 r irq_source_info_dcn21 +ffffffff82c25290 r irq_service_funcs_dcn21 +ffffffff82c25298 r dummy_irq_info_funcs +ffffffff82c252a8 r hpd_irq_info_funcs +ffffffff82c252b8 r hpd_rx_irq_info_funcs +ffffffff82c252c8 r pflip_irq_info_funcs +ffffffff82c252d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c252e8 r vblank_irq_info_funcs +ffffffff82c252f8 r vline0_irq_info_funcs +ffffffff82c25308 r dmub_outbox_irq_info_funcs +ffffffff82c26000 r irq_source_info_dcn30 +ffffffff82c27290 r irq_service_funcs_dcn30 +ffffffff82c27298 r dummy_irq_info_funcs +ffffffff82c272a8 r hpd_irq_info_funcs +ffffffff82c272b8 r hpd_rx_irq_info_funcs +ffffffff82c272c8 r pflip_irq_info_funcs +ffffffff82c272d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c272e8 r vblank_irq_info_funcs +ffffffff82c272f8 r vline0_irq_info_funcs +ffffffff82c27308 r dmub_trace_irq_info_funcs +ffffffff82c28000 r irq_source_info_dcn302 +ffffffff82c29290 r irq_service_funcs_dcn302 +ffffffff82c29298 r dummy_irq_info_funcs +ffffffff82c292a8 r hpd_irq_info_funcs +ffffffff82c292b8 r hpd_rx_irq_info_funcs +ffffffff82c292c8 r pflip_irq_info_funcs +ffffffff82c292d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c292e8 r vblank_irq_info_funcs +ffffffff82c292f8 r vline0_irq_info_funcs +ffffffff82c29308 r dmub_trace_irq_info_funcs +ffffffff82c2a000 r irq_service_funcs_dcn303 +ffffffff82c2a008 r dummy_irq_info_funcs +ffffffff82c2a018 r hpd_irq_info_funcs +ffffffff82c2a028 r hpd_rx_irq_info_funcs +ffffffff82c2a038 r pflip_irq_info_funcs +ffffffff82c2a048 r vupdate_no_lock_irq_info_funcs +ffffffff82c2a058 r vblank_irq_info_funcs +ffffffff82c2a068 r vline0_irq_info_funcs +ffffffff82c2a080 r irq_source_info_dcn303 +ffffffff82c2c000 r irq_source_info_dcn31 +ffffffff82c2d290 r irq_service_funcs_dcn31 +ffffffff82c2d298 r dummy_irq_info_funcs +ffffffff82c2d2a8 r hpd_irq_info_funcs +ffffffff82c2d2b8 r hpd_rx_irq_info_funcs +ffffffff82c2d2c8 r pflip_irq_info_funcs +ffffffff82c2d2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c2d2e8 r vblank_irq_info_funcs +ffffffff82c2d2f8 r vline0_irq_info_funcs +ffffffff82c2d308 r outbox_irq_info_funcs +ffffffff82c2e000 r irq_source_info_dcn314 +ffffffff82c2f290 r irq_service_funcs_dcn314 +ffffffff82c2f298 r dummy_irq_info_funcs +ffffffff82c2f2a8 r hpd_irq_info_funcs +ffffffff82c2f2b8 r hpd_rx_irq_info_funcs +ffffffff82c2f2c8 r pflip_irq_info_funcs +ffffffff82c2f2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c2f2e8 r vblank_irq_info_funcs +ffffffff82c2f2f8 r vline0_irq_info_funcs +ffffffff82c2f308 r outbox_irq_info_funcs +ffffffff82c30000 r irq_source_info_dcn315 +ffffffff82c31290 r irq_service_funcs_dcn315 +ffffffff82c31298 r dummy_irq_info_funcs +ffffffff82c312a8 r hpd_irq_info_funcs +ffffffff82c312b8 r hpd_rx_irq_info_funcs +ffffffff82c312c8 r pflip_irq_info_funcs +ffffffff82c312d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c312e8 r vblank_irq_info_funcs +ffffffff82c312f8 r vline0_irq_info_funcs +ffffffff82c31308 r outbox_irq_info_funcs +ffffffff82c32000 r irq_source_info_dcn32 +ffffffff82c33290 r irq_service_funcs_dcn32 +ffffffff82c33298 r dummy_irq_info_funcs +ffffffff82c332a8 r hpd_irq_info_funcs +ffffffff82c332b8 r hpd_rx_irq_info_funcs +ffffffff82c332c8 r pflip_irq_info_funcs +ffffffff82c332d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c332e8 r vblank_irq_info_funcs +ffffffff82c332f8 r vline0_irq_info_funcs +ffffffff82c33308 r outbox_irq_info_funcs +ffffffff82c34000 r dio_link_hwss +ffffffff82c35000 r dpia_link_hwss +ffffffff82c36000 r hpo_dp_link_hwss +ffffffff82c37000 r virtual_lnk_enc_funcs +ffffffff82c38000 r virtual_link_hwss +ffffffff82c39000 r virtual_str_enc_funcs +ffffffff82c3a000 R dmub_srv_dcn20_regs +ffffffff82c3b000 R dmub_srv_dcn21_regs +ffffffff82c3c000 R dmub_srv_dcn30_regs +ffffffff82c3d000 R dmub_srv_dcn301_regs +ffffffff82c3e000 R dmub_srv_dcn302_regs +ffffffff82c3f000 R dmub_srv_dcn303_regs +ffffffff82c40000 R dmub_srv_dcn31_regs +ffffffff82c41000 R dmub_srv_dcn315_regs +ffffffff82c42000 R dmub_srv_dcn316_regs +ffffffff82c43000 R dmub_srv_dcn32_regs +ffffffff82c44000 r numerator01 +ffffffff82c44020 r numerator02 +ffffffff82c44040 r numerator04 +ffffffff82c44060 r numerator05 +ffffffff82c46000 r abm_settings +ffffffff82c46010 r abm_settings_config0 +ffffffff82c46050 r abm_settings_config1 +ffffffff82c46088 r min_reduction_table_v_2_2 +ffffffff82c46095 r max_reduction_table_v_2_2 +ffffffff82c460a2 r min_reduction_table +ffffffff82c460af r max_reduction_table +ffffffff82c47000 R amdgpu_pp_profile_name +ffffffff82c48000 r pp_lib_thermal_controller_names +ffffffff82c49000 r pp_ip_funcs +ffffffff82c490a0 R pp_smu_ip_block +ffffffff82c490b8 r pp_dpm_funcs +ffffffff82c4a000 r gpio_tbl +ffffffff82c4a0f0 r enable_fb_req_rej_tbl +ffffffff82c4a140 r use_bclk_tbl +ffffffff82c4a310 r turn_off_plls_tbl +ffffffff82c4a640 r enter_baco_tbl +ffffffff82c4a730 r exit_baco_tbl +ffffffff82c4a850 r clean_baco_tbl ffffffff82c4b000 r gpio_tbl ffffffff82c4b0f0 r enable_fb_req_rej_tbl ffffffff82c4b140 r use_bclk_tbl -ffffffff82c4b310 r turn_off_plls_tbl -ffffffff82c4b640 r enter_baco_tbl -ffffffff82c4b730 r exit_baco_tbl -ffffffff82c4b850 r clean_baco_tbl +ffffffff82c4b2e0 r turn_off_plls_tbl +ffffffff82c4b370 r clk_req_b_tbl +ffffffff82c4b490 r enter_baco_tbl +ffffffff82c4b5b0 r exit_baco_tbl +ffffffff82c4b6d0 r clean_baco_tbl ffffffff82c4c000 r gpio_tbl ffffffff82c4c0f0 r enable_fb_req_rej_tbl -ffffffff82c4c140 r use_bclk_tbl -ffffffff82c4c2e0 r turn_off_plls_tbl -ffffffff82c4c370 r clk_req_b_tbl -ffffffff82c4c490 r enter_baco_tbl -ffffffff82c4c5b0 r exit_baco_tbl -ffffffff82c4c6d0 r clean_baco_tbl -ffffffff82c4d000 r gpio_tbl -ffffffff82c4d0f0 r enable_fb_req_rej_tbl -ffffffff82c4d140 r use_bclk_tbl_vg -ffffffff82c4d200 r turn_off_plls_tbl_vg -ffffffff82c4d350 r use_bclk_tbl -ffffffff82c4d440 r turn_off_plls_tbl -ffffffff82c4d5f0 r clk_req_b_tbl -ffffffff82c4d710 r enter_baco_tbl -ffffffff82c4d830 r exit_baco_tbl -ffffffff82c4d950 r clean_baco_tbl -ffffffff82c4e000 r vega10_fuses_default -ffffffff82c5d000 r pp_r600_encode_lanes -ffffffff82c5e000 R pptable_v1_0_funcs -ffffffff82c5f000 R pptable_funcs -ffffffff82c5f020 r soft_dummy_pp_table -ffffffff82c60000 r smu10_hwmgr_funcs -ffffffff82c61000 r smu7_hwmgr_funcs -ffffffff82c612f8 r smu7_irq_funcs -ffffffff82c61310 r SMU7ThermalPolicy -ffffffff82c62000 r GCCACConfig_Polaris10 -ffffffff82c621b0 r DIDTConfig_Polaris10 -ffffffff82c62a50 r GCCACConfig_Polaris11 -ffffffff82c62c00 r DIDTConfig_Polaris11_Kicker -ffffffff82c634a0 r DIDTConfig_Polaris11 -ffffffff82c63d40 r DIDTConfig_Polaris12 -ffffffff82c645e0 r GCCACConfig_VegaM -ffffffff82c64790 r DIDTConfig_VegaM -ffffffff82c66000 r smu8_hwmgr_funcs -ffffffff82c662f0 r SMU7ThermalPolicy -ffffffff82c67000 r smu9_irq_funcs -ffffffff82c68000 r gpio_tbl_iceland -ffffffff82c68060 r gpio_tbl -ffffffff82c68150 r enable_fb_req_rej_tbl -ffffffff82c681a0 r use_bclk_tbl -ffffffff82c68370 r turn_off_plls_tbl -ffffffff82c68610 r enter_baco_tbl -ffffffff82c68730 r exit_baco_tbl_iceland -ffffffff82c68870 r clean_baco_tbl_iceland -ffffffff82c68890 r exit_baco_tbl -ffffffff82c689b0 r clean_baco_tbl -ffffffff82c69000 r pre_baco_tbl -ffffffff82c69090 r enter_baco_tbl -ffffffff82c692b0 r exit_baco_tbl -ffffffff82c69520 r clean_baco_tbl -ffffffff82c6a000 r vega10_hwmgr_funcs -ffffffff82c6a2f0 r channel_number -ffffffff82c6a320 r SMU7ThermalWithDelayPolicy -ffffffff82c6b000 r SEDiDtStallCtrlConfig_vega10 -ffffffff82c6b110 r SEDiDtStallPatternConfig_vega10 -ffffffff82c6b2e0 r SEDiDtWeightConfig_Vega10 -ffffffff82c6b3b0 r SEDiDtCtrl1Config_Vega10 -ffffffff82c6b440 r SEDiDtCtrl2Config_Vega10 -ffffffff82c6b510 r SEDiDtCtrl3Config_vega10 -ffffffff82c6b820 r SEDiDtTuningCtrlConfig_Vega10 -ffffffff82c6b8b0 r SELCacConfig_Vega10 -ffffffff82c6ba40 r SEDiDtCtrl0Config_Vega10 -ffffffff82c6bd10 r AvfsPSMInitConfig_vega10 -ffffffff82c6bd90 r SEEDCStallPatternConfig_Vega10 -ffffffff82c6bea0 r SEEDCStallDelayConfig_Vega10 -ffffffff82c6bf80 r SEEDCCtrlConfig_Vega10 -ffffffff82c6c040 r PSMSEEDCStallPatternConfig_Vega10 -ffffffff82c6c0c0 r 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rtw_macbangbits_timeout -ffffffff830bf008 D rtw_cd -ffffffff830c0000 D ral_cd -ffffffff830c1000 D rt3090_freqs -ffffffff830c2000 D acx_beacon_intvl -ffffffff830c2008 D acx_cd -ffffffff830c3000 D pgt_cd -ffffffff830c4000 D sf_cd -ffffffff830c5000 D malo_cd -ffffffff830c6000 D bwi_cd -ffffffff830c6020 D bwi_constraint -ffffffff830c6030 D bwi_pa_mode -ffffffff830c7000 D uhci_cd -ffffffff830c8000 D ohci_cd -ffffffff830c9000 D ehci_cd -ffffffff830ca000 D xhci_cd -ffffffff830cb000 D ccp_cd -ffffffff830cc000 D sdhc_functions -ffffffff830cc068 D sdhc_cd -ffffffff830cd000 D rtsx_functions -ffffffff830cd068 D rtsx_cd -ffffffff830ce000 D radio_cd -ffffffff830cf000 D kcs_if -ffffffff830cf040 D smic_if -ffffffff830cf080 D bt_if -ffffffff830cf0c0 D ipmi_cd -ffffffff830cf0e0 D maxsdrlen -ffffffff830d0000 D vscsi_cd -ffffffff830d1000 D mpath_cd -ffffffff830d2000 D softraid_cd -ffffffff830d2020 D smd -ffffffff830d3000 D spdmem_cd -ffffffff830d4000 D dwiic_cd -ffffffff830d5000 D kstat_lock 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dt_static_sched_off__cpu -ffffffff830e0180 D dt_static_sched_on__cpu -ffffffff830e01f0 D dt_static_sched_remain__cpu -ffffffff830e0260 D dt_static_sched_sleep -ffffffff830e02d0 D dt_static_sched_wakeup -ffffffff830e0340 D dt_static_raw_syscalls_sys_enter -ffffffff830e03b0 D dt_static_raw_syscalls_sys_exit -ffffffff830e0420 D dt_static_uvm_fault -ffffffff830e0490 D dt_static_uvm_map_insert -ffffffff830e0500 D dt_static_uvm_map_remove -ffffffff830e0570 D dt_static_uvm_malloc -ffffffff830e05e0 D dt_static_uvm_free -ffffffff830e0650 D dt_static_uvm_pool_get -ffffffff830e06c0 D dt_static_uvm_pool_put -ffffffff830e0730 D dt_static_vfs_bufcache_rel -ffffffff830e07a0 D dt_static_vfs_bufcache_take -ffffffff830e0810 D dt_static_vfs_cleaner -ffffffff830e0880 D dt_static_vmm_guest_enter -ffffffff830e08f0 D dt_static_vmm_guest_exit -ffffffff830e0960 D dt_static_vmm_inout -ffffffff830e09d0 D dt_static_smr_call -ffffffff830e0a40 D dt_static_smr_called -ffffffff830e0ab0 D dt_static_smr_barrier_enter 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kthread_q -ffffffff830f9000 D malloc_mtx -ffffffff830f9010 D memname -ffffffff830f94a0 D sysctl_kmemlock -ffffffff830f94b0 D malloc_errintvl -ffffffff830fa000 D maxdmap -ffffffff830fa008 D maxsmap -ffffffff830fa010 D rlimit_lock -ffffffff830fb000 D sched_cost_load -ffffffff830fb004 D sched_cost_priority -ffffffff830fb008 D sched_cost_runnable -ffffffff830fb00c D sched_cost_resident -ffffffff830fc000 D intrmap_lock -ffffffff830fd000 D nosuidcoredump -ffffffff830fd008 D sigio_lock -ffffffff830fe000 D smr_lock -ffffffff830fe010 D smr_logintvl -ffffffff830ff000 D startuphook_list -ffffffff83100000 D sysctl_lock -ffffffff83100010 D sysctl_disklock -ffffffff83100020 d openbsd -ffffffff83100024 d arg_max -ffffffff83100028 d posix_version -ffffffff8310002c d ngroups_max -ffffffff83100030 d int_one -ffffffff83100034 d maxpartitions -ffffffff83100038 d raw_part -ffffffff8310003c D allowpowerdown -ffffffff83100040 D hw_power -ffffffff83100044 d byte_order -ffffffff83100048 d page_size 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iftovt_tab -ffffffff8311a040 D vttoif_tab -ffffffff8311a064 D suid_clear -ffffffff8311a068 D vnode_mtx -ffffffff8311a078 D vfs_stall_lock -ffffffff8311a090 D vtypes -ffffffff8311a0e0 D vtags -ffffffff8311b000 D syncer_maxdelay -ffffffff8311b004 D syncdelay -ffffffff8311c000 D dosdirtemplate -ffffffff8311d000 D ntfs_hashlock -ffffffff8311e000 D ntfs_toupper_lock -ffffffff8311f000 D art_table_gc_mtx -ffffffff8311f010 D art_table_gc_task -ffffffff8311f040 D art_node_gc_mtx -ffffffff8311f050 D art_node_gc_task -ffffffff83120000 D bpf_bufsize -ffffffff83120004 D bpf_maxbufsize -ffffffff83120008 D bpf_sysctl_lk -ffffffff83121000 D ifg_head -ffffffff83121010 D if_cloners_lock -ffffffff83121020 D if_input_task_locked -ffffffff83121050 D netlock -ffffffff83121060 D ifnetlist -ffffffff83122000 D ifiq_maxlen_drop -ffffffff83122004 D ifiq_maxlen_return -ffffffff83123000 D etherbroadcastaddr -ffffffff83123006 D ether_ipmulticast_min -ffffffff8312300c D ether_ipmulticast_max -ffffffff83123012 D ether_ip6multicast_min -ffffffff83123018 D ether_ip6multicast_max -ffffffff83124000 D etherip_cloner -ffffffff83124030 D etherip_list -ffffffff83125000 D loop_cloner -ffffffff83126000 D ifmedia_mtx -ffffffff83127000 D ppp_compressors -ffffffff83127020 D ppp_cloner -ffffffff83128000 D ppp_pkt_init -ffffffff83129000 D ppp_bsd_compress -ffffffff8312a000 D ppp_deflate -ffffffff8312a070 D ppp_deflate_draft -ffffffff8312b000 D tun_cloner -ffffffff8312b030 D tap_cloner -ffffffff8312c000 D bridgeintrq -ffffffff8312c038 D bridge_cloner -ffffffff8312d000 d veb_cloner -ffffffff8312d030 d vport_cloner -ffffffff8312e000 D vlan_tagh_lk -ffffffff8312e010 D vlan_cloner -ffffffff8312e040 D svlan_cloner -ffffffff8312f000 D pipex_list_mtx -ffffffff8312f010 D pipex_prune -ffffffff8312f018 D pipexoutq -ffffffff8312f050 d SHAPad2 -ffffffff83130000 D rtmap_gc -ffffffff83130018 D rt_rc -ffffffff83131000 D rt_labels -ffffffff83132000 D enc_cloner -ffffffff83133000 D gre_cloner -ffffffff83133030 D gre_list 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ipport_hilastauto -ffffffff83143000 D divert_sendspace -ffffffff83143004 D divert_recvspace -ffffffff83143008 D divbhashsize -ffffffff83144000 D icmptstamprepl -ffffffff83144004 D icmperrppslim -ffffffff83144008 D icmp_redirtimeout -ffffffff83145000 D ipsendredirects -ffffffff83145004 D ip_defttl -ffffffff83145008 D ip_mtudisc -ffffffff8314500c D ip_mtudisc_timeout -ffffffff83145010 D ipq_mutex -ffffffff83145020 D ip_maxqueue -ffffffff83145028 D ipintrq -ffffffff83145060 d ipsend_task -ffffffff83145090 d ipsendraw_task -ffffffff83146000 D ip_mrtproto -ffffffff83146004 d sin -ffffffff83147000 D rip_sendspace -ffffffff83147008 D rip_recvspace -ffffffff83148000 D tcprexmtthresh -ffffffff83148004 D tcptv_keep_init -ffffffff83148008 D tcp_rst_ppslim -ffffffff8314800c D tcp_ackdrop_ppslim -ffffffff83148010 D tcp_syn_hash_size -ffffffff83148014 D tcp_syn_cache_limit -ffffffff83148018 D tcp_syn_bucket_limit -ffffffff8314801c D tcp_syn_use_limit -ffffffff83149000 D tcp_outflags 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smu10_hwmgr_funcs +ffffffff82c60000 r smu7_hwmgr_funcs +ffffffff82c602f8 r smu7_irq_funcs +ffffffff82c60310 r SMU7ThermalPolicy +ffffffff82c61000 r GCCACConfig_Polaris10 +ffffffff82c611b0 r DIDTConfig_Polaris10 +ffffffff82c61a50 r GCCACConfig_Polaris11 +ffffffff82c61c00 r DIDTConfig_Polaris11_Kicker +ffffffff82c624a0 r DIDTConfig_Polaris11 +ffffffff82c62d40 r DIDTConfig_Polaris12 +ffffffff82c635e0 r GCCACConfig_VegaM +ffffffff82c63790 r DIDTConfig_VegaM +ffffffff82c65000 r smu8_hwmgr_funcs +ffffffff82c652f0 r SMU7ThermalPolicy +ffffffff82c66000 r smu9_irq_funcs +ffffffff82c67000 r gpio_tbl_iceland +ffffffff82c67060 r gpio_tbl +ffffffff82c67150 r enable_fb_req_rej_tbl +ffffffff82c671a0 r use_bclk_tbl +ffffffff82c67370 r turn_off_plls_tbl +ffffffff82c67610 r enter_baco_tbl +ffffffff82c67730 r exit_baco_tbl_iceland +ffffffff82c67870 r clean_baco_tbl_iceland +ffffffff82c67890 r exit_baco_tbl +ffffffff82c679b0 r clean_baco_tbl +ffffffff82c68000 r pre_baco_tbl +ffffffff82c68090 r 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PSMSEEDCCtrlConfig_Vega10 +ffffffff82c6b350 r SEEDCForceStallPatternConfig_Vega10 +ffffffff82c6b3e0 r SEEDCCtrlForceStallConfig_Vega10 +ffffffff82c6c000 R vega10_pptable_funcs +ffffffff82c6d000 r pre_baco_tbl +ffffffff82c6d090 r enter_baco_tbl +ffffffff82c6d2b0 r exit_baco_tbl +ffffffff82c6d520 r clean_baco_tbl +ffffffff82c6e000 r vega12_hwmgr_funcs +ffffffff82c6e2f0 r SMU7ThermalWithDelayPolicy +ffffffff82c6e340 r link_width +ffffffff82c6f000 R vega12_pptable_funcs +ffffffff82c70000 r clean_baco_tbl +ffffffff82c71000 r vega20_hwmgr_funcs +ffffffff82c712f0 r SMU7ThermalWithDelayPolicy +ffffffff82c71340 r link_width +ffffffff82c72000 R vega20_pptable_funcs +ffffffff82c73000 R ci_smu_funcs +ffffffff82c730e0 r defaults_hawaii_pro +ffffffff82c7312c r defaults_hawaii_xt +ffffffff82c73178 r defaults_saturn_xt +ffffffff82c731c4 r defaults_bonaire_xt +ffffffff82c73210 r ci_program_jump_on_start.data +ffffffff82c74000 R fiji_smu_funcs +ffffffff82c740e0 r avfs_graphics_level +ffffffff82c74240 r fiji_power_tune_data_set_array +ffffffff82c74246 r fiji_clock_stretch_amount_conversion +ffffffff82c74260 r fiji_clock_stretcher_ddt_table +ffffffff82c75000 R iceland_smu_funcs +ffffffff82c750e0 r defaults_icelandxt +ffffffff82c7512c r defaults_icelandpro +ffffffff82c75178 r defaults_iceland +ffffffff82c76000 R polaris10_smu_funcs +ffffffff82c760e0 r avfs_graphics_level_polaris10 +ffffffff82c762a0 r avfs_memory_level_polaris10 +ffffffff82c762c0 r polaris10_power_tune_data_set_array +ffffffff82c76310 r Range_Table +ffffffff82c77000 R smu10_smu_funcs +ffffffff82c78000 r smu7_program_jump_on_start.data +ffffffff82c78010 r pwr_virus_table_pre +ffffffff82c78680 r pwr_virus_table_post +ffffffff82c78f80 r pwr_virus_section1 +ffffffff82c79610 r pwr_virus_section2 +ffffffff82c79660 r pwr_virus_section3 +ffffffff82c80ab0 r pwr_virus_section4 +ffffffff82c80e80 r pwr_virus_section5 +ffffffff82c81490 r pwr_virus_section6 +ffffffff82c83000 R smu8_smu_funcs +ffffffff82c84000 R tonga_smu_funcs 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aldebaran_i2c_algo +ffffffff82c94570 r aldebaran_i2c_control_quirks +ffffffff82c94580 r aldebaran_throttler_map +ffffffff82c945a0 r aldebaran_message_map +ffffffff82c94ff0 r aldebaran_feature_mask_map +ffffffff82c96000 r smu_v13_0_irq_funcs +ffffffff82c96010 r link_width +ffffffff82c97000 r smu_v13_0_0_ppt_funcs +ffffffff82c973d0 r smu13_thermal_policy +ffffffff82c97420 r smu_v13_0_0_i2c_algo +ffffffff82c97430 r smu_v13_0_0_i2c_control_quirks +ffffffff82c97440 r smu_v13_0_0_throttler_map +ffffffff82c98000 r smu_v13_0_4_ppt_funcs +ffffffff82c99000 r smu_v13_0_5_ppt_funcs +ffffffff82c9a000 r smu_v13_0_7_ppt_funcs +ffffffff82c9a3d0 r smu13_thermal_policy +ffffffff82c9a420 r smu_v13_0_7_throttler_map +ffffffff82c9b000 r yellow_carp_ppt_funcs +ffffffff82c9c000 r __smu_message_names +ffffffff82c9d000 R pchb_ca +ffffffff82c9e000 R amas_ca +ffffffff82c9e028 R amas_devices +ffffffff82c9e040 r amas_feature +ffffffff82c9f000 R cardslot_ca +ffffffff82ca0000 R cardbus_ca +ffffffff82ca1000 R com_cardbus_ca +ffffffff82ca2000 R xl_cardbus_ca +ffffffff82ca2030 R xl_cardbus_products +ffffffff82ca3000 R dc_cardbus_ca +ffffffff82ca3030 R dc_cardbus_devices +ffffffff82ca4000 R fxp_cardbus_ca +ffffffff82ca4028 R fxp_cardbus_devices +ffffffff82ca5000 R rl_cardbus_devices +ffffffff82ca5028 R rl_cardbus_ca +ffffffff82ca6000 R re_cardbus_ca +ffffffff82ca6028 R re_cardbus_devices +ffffffff82ca7000 R ath_cardbus_ca +ffffffff82ca8000 R athn_cardbus_ca +ffffffff82ca8030 r athn_cardbus_devices +ffffffff82ca9000 R atw_cardbus_ca +ffffffff82ca9028 R atw_cardbus_devices +ffffffff82caa000 R rtw_cardbus_ca +ffffffff82caa028 R rtw_cardbus_devices +ffffffff82cab000 R ral_cardbus_ca +ffffffff82cab030 r ral_cardbus_devices +ffffffff82cac000 R acx_cardbus_ca +ffffffff82cac028 r acx_cardbus_devices +ffffffff82cad000 R pgt_cardbus_ca +ffffffff82cad028 R pgt_cardbus_devices +ffffffff82cae000 R ehci_cardbus_ca +ffffffff82caf000 R ohci_cardbus_ca +ffffffff82cb0000 R uhci_cardbus_ca +ffffffff82cb1000 R malo_cardbus_ca +ffffffff82cb1028 r malo_cardbus_devices +ffffffff82cb2000 R bwi_cardbus_ca +ffffffff82cb2030 r bwi_cardbus_devices +ffffffff82cb3000 R pcmcia_ca +ffffffff82cb4000 r pcmcia_parse_cis_tuple.init_cfe +ffffffff82cb5000 r pcmcia_cis_quirks +ffffffff82cb6000 R ep_pcmcia_ca +ffffffff82cb7000 R ne_pcmcia_ca +ffffffff82cb7030 R ne2000devs +ffffffff82cb9000 R aic_pcmcia_ca +ffffffff82cba000 R com_pcmcia_ca +ffffffff82cbb000 R wdc_pcmcia_ca +ffffffff82cbc000 R sm_pcmcia_ca +ffffffff82cbd000 R xe_pcmcia_ca +ffffffff82cbe000 R wi_pcmcia_ca +ffffffff82cbe030 r wi_pcmcia_products +ffffffff82cbf000 R malo_pcmcia_ca +ffffffff82cc0000 R an_pcmcia_ca +ffffffff82cc1000 R pcib_ca +ffffffff82cc2000 R amdpcib_ca +ffffffff82cc2028 R amdpcib_devices +ffffffff82cc3000 R tcpcib_ca +ffffffff82cc3028 R tcpcib_devices +ffffffff82cc4000 R aapic_ca +ffffffff82cc5000 R hme_pci_ca +ffffffff82cc5028 r hme_promhdr +ffffffff82cc502a r hme_promdat +ffffffff82cc6000 R isa_ca +ffffffff82cc7000 R isadma_ca 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+ffffffff82cd89a0 R abitat_sensors +ffffffff82cd8cc0 R abitan2_sensors +ffffffff82cd8f60 R abitab_sensors +ffffffff82cd9220 R abitan3_sensors +ffffffff82cd9500 R abitaw2_sensors +ffffffff82cd9860 R abitat2_sensors +ffffffff82cd9b60 R abitab2_sensors +ffffffff82cd9ea0 R abitin_sensors +ffffffff82cda1e0 R uguru_ca +ffffffff82cdb000 R aps_ca +ffffffff82cdc000 R wsdisplay_emul_ca +ffffffff82cdc030 r charClass +ffffffff82cdd000 r usl_syncops +ffffffff82cde000 R wsevent_filtops +ffffffff82cdf000 R wskbd_ca +ffffffff82ce0000 r latin1_to_upper +ffffffff82ce1000 R wsmouse_ca +ffffffff82ce2000 R cyrillic_to_koi8 +ffffffff82ce2060 R unicode_to_latin2 +ffffffff82ce20e0 R unicode_to_latin7 +ffffffff82ce3000 R wsemul_vt100_ops +ffffffff82ce4000 r decspcgr2uni +ffffffff82ce4100 r dectech2uni +ffffffff82ce4200 r nrctable +ffffffff82ce4320 r nrcovlpos +ffffffff82ce5000 r vt100_fkeys +ffffffff82ce50c0 r vt100_pfkeys +ffffffff82ce50e0 r vt100_numpad +ffffffff82ce6000 R pckbd_ca +ffffffff82ce6028 R pckbd_accessops +ffffffff82ce6040 R pckbd_consops +ffffffff82ce6060 R pckbd_keymapdata +ffffffff82ce6070 R pckbd_xtbl +ffffffff82ce6100 R pckbd_xtbl_ext +ffffffff82ce7000 r pckbd_keydesc_us +ffffffff82ce7250 r pckbd_keydesc_de +ffffffff82ce72f0 r pckbd_keydesc_de_nodead +ffffffff82ce7310 r pckbd_keydesc_fr +ffffffff82ce73d0 r pckbd_keydesc_fr_dvorak_bepo +ffffffff82ce7510 r pckbd_keydesc_dk +ffffffff82ce75a0 r pckbd_keydesc_dk_nodead +ffffffff82ce75b0 r pckbd_keydesc_it +ffffffff82ce7640 r pckbd_keydesc_uk +ffffffff82ce76e0 r pckbd_keydesc_jp +ffffffff82ce7750 r pckbd_keydesc_sv +ffffffff82ce7780 r pckbd_keydesc_sv_nodead +ffffffff82ce7790 r pckbd_keydesc_no +ffffffff82ce77c0 r pckbd_keydesc_no_nodead +ffffffff82ce77d0 r pckbd_keydesc_us_declk +ffffffff82ce7860 r pckbd_keydesc_us_dvorak +ffffffff82ce7900 r pckbd_keydesc_us_colemak +ffffffff82ce7948 r pckbd_keydesc_swapctrlcaps +ffffffff82ce7960 r pckbd_keydesc_iopener +ffffffff82ce79b0 r pckbd_keydesc_es +ffffffff82ce7a50 r pckbd_keydesc_be +ffffffff82ce7b10 r pckbd_keydesc_ru +ffffffff82ce7c80 r pckbd_keydesc_ua +ffffffff82ce7e10 r pckbd_keydesc_sg +ffffffff82ce7ec0 r pckbd_keydesc_sg_nodead +ffffffff82ce7ee0 r pckbd_keydesc_sf +ffffffff82ce7f00 r pckbd_keydesc_pt +ffffffff82ce7f90 r pckbd_keydesc_lt +ffffffff82ce8070 r pckbd_keydesc_la +ffffffff82ce8100 r pckbd_keydesc_br +ffffffff82ce8180 r pckbd_keydesc_tr +ffffffff82ce8230 r pckbd_keydesc_tr_nodead +ffffffff82ce8250 r pckbd_keydesc_pl +ffffffff82ce82b0 r pckbd_keydesc_hu +ffffffff82ce83c0 r pckbd_keydesc_si +ffffffff82ce84d0 r pckbd_keydesc_cf +ffffffff82ce85a0 r pckbd_keydesc_cf_nodead +ffffffff82ce85c0 r pckbd_keydesc_lv +ffffffff82ce8640 r pckbd_keydesc_nl +ffffffff82ce8720 r pckbd_keydesc_nl_nodead +ffffffff82ce8740 r pckbd_keydesc_is +ffffffff82ce87cc r pckbd_keydesc_is_nodead +ffffffff82ce87e0 r pckbd_keydesc_ee +ffffffff82ce8890 r pckbd_keydesc_ee_nodead +ffffffff82ce88b0 R pckbd_keydesctab +ffffffff82ce9000 R pms_ca +ffffffff82ce9028 R pms_accessops +ffffffff82ce9040 R pms_sec_accessops +ffffffff82ce9060 R pms_protocols +ffffffff82ce91e0 r alps_models +ffffffff82cea000 R skgpio_led_offset +ffffffff82cea008 R skgpio_ca +ffffffff82ceb000 R hidkbd_trtab +ffffffff82ceb100 r apple_fn_trans +ffffffff82ceb120 r apple_tb_trans +ffffffff82ceb140 r apple_mba_trans +ffffffff82cec000 r hidcc_attach_wskbd.accessops +ffffffff82cec020 r hidcc_keysyms +ffffffff82ced000 R usb_ca +ffffffff82cee000 R usb_known_products +ffffffff82cf9e60 R usb_known_vendors +ffffffff82cfc660 R usbd_error_strs +ffffffff82cfd000 R usb_quirks +ffffffff82cfd390 R usb_dev_quirks +ffffffff82cfd398 R usbd_no_quirk +ffffffff82cfe000 R uhub_ca +ffffffff82cfe028 R uhub_uhub_ca +ffffffff82cff000 R uaudio_ca +ffffffff82cff028 R uaudio_hw_if +ffffffff82cff0e0 R uaudio_rates +ffffffff82cff120 r uaudio_clkname.names +ffffffff82cff140 r uaudio_feature_addent.features +ffffffff82d00000 R uvideo_ca +ffffffff82d00028 R uvideo_hw_if +ffffffff82d00100 R uvideo_devs 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ums_accessops +ffffffff82d0e018 R ums_ca +ffffffff82d0f000 R umt_accessops +ffffffff82d0f018 R umt_ca +ffffffff82d10000 R uts_devs +ffffffff82d10010 R uts_accessops +ffffffff82d10028 R uts_ca +ffffffff82d11000 R ubcmtp_accessops +ffffffff82d11018 R ubcmtp_ca +ffffffff82d11040 r ubcmtp_devices +ffffffff82d12000 R ucycom_methods +ffffffff82d12040 R ucycom_devs +ffffffff82d12050 R ucycom_ca +ffffffff82d13000 R uslhcom_methods +ffffffff82d13040 R uslhcom_ca +ffffffff82d13068 r uslhcom_devs +ffffffff82d14000 R ulpt_ca +ffffffff82d15000 R umass_ca +ffffffff82d15028 R umass_bbb_methods +ffffffff82d15040 R umass_cbi_methods +ffffffff82d16000 R umass_quirks +ffffffff82d17000 R umass_scsi_switch +ffffffff82d18000 R uthum_devs +ffffffff82d18008 R uthum_ca +ffffffff82d18030 r uthum_sensor_type_s +ffffffff82d19000 R ugold_devs +ffffffff82d19010 R ugold_ca +ffffffff82d1a000 R utrh_devs +ffffffff82d1a008 R utrh_ca +ffffffff82d1b000 R uoakrh_devs +ffffffff82d1b008 R uoakrh_ca +ffffffff82d1b030 R uoakrh_methods +ffffffff82d1c000 R uoaklux_devs +ffffffff82d1c008 R uoaklux_ca +ffffffff82d1c030 R uoaklux_methods +ffffffff82d1d000 R uoakv_devs +ffffffff82d1d008 R uoakv_ca +ffffffff82d1d030 R uoakv_methods +ffffffff82d1e000 R uonerng_ca +ffffffff82d1f000 R urng_ca +ffffffff82d1f030 r urng_devs +ffffffff82d20000 R udcf_ca +ffffffff82d20028 r udcf_devs +ffffffff82d21000 R umbg_ca +ffffffff82d22000 R uvisor_methods +ffffffff82d22040 R uvisor_ca +ffffffff82d22070 r uvisor_devs +ffffffff82d23000 R udsbr_hw_if +ffffffff82d23028 R udsbr_ca +ffffffff82d24000 R utwitch_devs +ffffffff82d24008 R utwitch_ca +ffffffff82d25000 R aue_devs +ffffffff82d251b0 R aue_ca +ffffffff82d26000 R axe_devs +ffffffff82d260d0 R axe_ca +ffffffff82d27000 R axen_devs +ffffffff82d27020 R axen_ca +ffffffff82d28000 R smsc_ca +ffffffff82d28030 r smsc_devs +ffffffff82d29000 R cue_ca +ffffffff82d2a000 R kue_devs +ffffffff82d2a088 R kue_ca +ffffffff82d2b000 R cdce_devs +ffffffff82d2b048 R cdce_ca +ffffffff82d2c000 R urndis_ca +ffffffff82d2c030 R urndis_class +ffffffff82d2d000 R mos_devs +ffffffff82d2d018 R mos_ca +ffffffff82d2e000 R mue_devs +ffffffff82d2e020 R mue_ca +ffffffff82d2f000 R udav_ca +ffffffff82d2f030 r udav_devs +ffffffff82d30000 R upl_ca +ffffffff82d31000 R ugl_ca +ffffffff82d32000 R url_ca +ffffffff82d32030 r url_devs +ffffffff82d33000 R ure_devs +ffffffff82d330f0 R ure_ca +ffffffff82d34000 R uaq_devs +ffffffff82d34018 R uaq_ca +ffffffff82d35000 R umodem_methods +ffffffff82d35040 R umodem_ca +ffffffff82d36000 R uftdi_methods +ffffffff82d36040 R uftdi_ca +ffffffff82d36070 r uftdi_devs +ffffffff82d37000 R uplcom_methods +ffffffff82d37040 R uplcom_ca +ffffffff82d37070 r uplcom_devs +ffffffff82d38000 R umct_methods +ffffffff82d38040 R umct_ca +ffffffff82d38070 r umct_devs +ffffffff82d39000 R uvscom_methods +ffffffff82d39040 R uvscom_ca +ffffffff82d39070 r uvscom_devs +ffffffff82d3a000 R ubsa_methods +ffffffff82d3a040 R ubsa_devs +ffffffff82d3a060 R ubsa_ca +ffffffff82d3b000 R ukspan_ca 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ahc_chip_names +ffffffff83094080 d ahc_phase_table +ffffffff83094120 d ahc_syncrates +ffffffff83095000 D ahc_cd +ffffffff83096000 D ahd_tailq +ffffffff83096010 D ahd_attach_to_HostRAID_controllers +ffffffff83096020 D ahd_chip_names +ffffffff83096040 d ahd_phase_table +ffffffff83097000 D ahd_cd +ffffffff83098000 D aic_cd +ffffffff83099000 D adw_cd +ffffffff8309a000 D gdt_cd +ffffffff8309b000 D twe_cd +ffffffff8309c000 D ciss_cd +ffffffff8309d000 D ami_cd +ffffffff8309e000 D mfi_cd +ffffffff8309f000 D qlwdebug +ffffffff8309f008 D qlw_cd +ffffffff830a0000 D qla_cd +ffffffff830a1000 D ahci_cd +ffffffff830a2000 D nvme_cd +ffffffff830a3000 D mpi_cd +ffffffff830a4000 D sili_error_test_inv_p +ffffffff830a4004 D sili_error_restart_type +ffffffff830a4008 D sili_cd +ffffffff830a5000 D esp_cd +ffffffff830a5020 D ncr53c9x_variant_names +ffffffff830a6000 D E_abs_script_sched_slot0_Used +ffffffff830a60a0 D E_abs_targ0_Used +ffffffff830a60dc D E_abs_msgin_Used +ffffffff830a60e8 D E_abs_lunsw_return_Used +ffffffff830a60f0 D E_abs_tag0_Used +ffffffff830a6130 D E_ldsa_abs_reselected_Used +ffffffff830a6134 D E_ldsa_abs_reselect_Used +ffffffff830a6138 D E_ldsa_abs_selected_Used +ffffffff830a613c D E_ldsa_abs_data_Used +ffffffff830a6140 D E_ldsa_abs_slot_Used +ffffffff830a6148 D siop_cd +ffffffff830a7000 D ep_isa_media +ffffffff830a7060 D ep_cd +ffffffff830a8000 D wi_cd +ffffffff830a8020 D wi_func_io +ffffffff830a9000 D an_cd +ffffffff830aa000 D xl_cd +ffffffff830ab000 D fxp_int_delay +ffffffff830ab004 D fxp_bundle_max +ffffffff830ab008 D fxp_min_size_mask +ffffffff830ab010 D fxp_cd +ffffffff830ab030 d tx_threshold +ffffffff830ab040 d fxp_cb_config_template +ffffffff830ac000 D rl_cd +ffffffff830ad000 D re_cd +ffffffff830ae000 D dc_cd +ffffffff830af000 D smc91cxx_idstrs +ffffffff830af080 D sm_cd +ffffffff830b0000 D epic_cd +ffffffff830b1000 D ne_cd +ffffffff830b1020 d ne2000_detect.test_pattern +ffffffff830b2000 D gem_cd +ffffffff830b3000 D ti_cd +ffffffff830b4000 D com_cd +ffffffff830b4020 D comdefaultrate +ffffffff830b4024 D comconsrate +ffffffff830b4028 D comconscflag +ffffffff830b4030 d comcnattach.comcons +ffffffff830b5000 D pckbc_slot_names +ffffffff830b5010 D pckbc_cd +ffffffff830b6000 D ac97civ +ffffffff830b7000 D cy_cd +ffffffff830b8000 D lpt_cd +ffffffff830b9000 D lm_cd +ffffffff830ba000 D ath_dwelltime +ffffffff830ba004 D ath_calinterval +ffffffff830ba008 D ath_outdoor +ffffffff830ba00c D ath_xchanmode +ffffffff830ba010 D ath_softcrypto +ffffffff830ba018 D ath_cd +ffffffff830bb000 D athn_cd +ffffffff830bc000 D bwfm_2ghz_channels +ffffffff830bc010 D bwfm_5ghz_channels +ffffffff830bc030 D bwfm_proto_bcdc_ops +ffffffff830bc050 D bwfm_cd +ffffffff830bd000 D atw_bbp_io_enable_delay +ffffffff830bd004 D atw_bbp_io_disable_delay +ffffffff830bd008 D atw_writewep_delay +ffffffff830bd00c D atw_beacon_len_adjust +ffffffff830bd010 D atw_dwelltime +ffffffff830bd018 D atw_cd +ffffffff830be000 D rtw_dwelltime +ffffffff830be004 D rtw_macbangbits_timeout +ffffffff830be008 D rtw_cd +ffffffff830bf000 D ral_cd +ffffffff830c0000 D rt3090_freqs +ffffffff830c1000 D acx_beacon_intvl +ffffffff830c1008 D acx_cd +ffffffff830c2000 D pgt_cd +ffffffff830c3000 D sf_cd +ffffffff830c4000 D malo_cd +ffffffff830c5000 D bwi_cd +ffffffff830c5020 D bwi_constraint +ffffffff830c5030 D bwi_pa_mode +ffffffff830c6000 D uhci_cd +ffffffff830c7000 D ohci_cd +ffffffff830c8000 D ehci_cd +ffffffff830c9000 D xhci_cd +ffffffff830ca000 D ccp_cd +ffffffff830cb000 D sdhc_functions +ffffffff830cb068 D sdhc_cd +ffffffff830cc000 D rtsx_functions +ffffffff830cc068 D rtsx_cd +ffffffff830cd000 D radio_cd +ffffffff830ce000 D kcs_if +ffffffff830ce040 D smic_if +ffffffff830ce080 D bt_if +ffffffff830ce0c0 D ipmi_cd +ffffffff830ce0e0 D maxsdrlen +ffffffff830cf000 D vscsi_cd +ffffffff830d0000 D mpath_cd +ffffffff830d1000 D softraid_cd +ffffffff830d1020 D smd +ffffffff830d2000 D spdmem_cd +ffffffff830d3000 D dwiic_cd +ffffffff830d4000 D kstat_lock +ffffffff830d4010 D kstat_next_id +ffffffff830d4018 D kstat_default_lock +ffffffff830d5000 D pf_hdr_limit +ffffffff830d5008 D pf_purge_task +ffffffff830d5038 D pf_purge_to +ffffffff830d5080 D pf_pool_limits +ffffffff830d50f0 D pf_state_list +ffffffff830d6000 D pf_tags +ffffffff830d6010 D pf_qids +ffffffff830d6020 D pf_lock +ffffffff830d6030 D pf_state_lock +ffffffff830d6040 D pfioctl_rw +ffffffff830d7000 D pfi_update +ffffffff830d8000 D pflog_cloner +ffffffff830d9000 D pfsync_qs +ffffffff830d9078 D pfsync_cloner +ffffffff830d90a8 d pfsync_task +ffffffff830da000 D pflow_cloner +ffffffff830db000 D pppoe_cloner +ffffffff830db030 D pppoediscinq +ffffffff830db060 D pppoeinq +ffffffff830dc000 D dt_lock +ffffffff830dd000 D dt_prov_profile +ffffffff830dd030 D dt_prov_interval +ffffffff830de000 D dtps_nsysent +ffffffff830de008 D dt_prov_syscall +ffffffff830df000 D dt_prov_static +ffffffff830df030 D dt_static_sched_dequeue +ffffffff830df0a0 D dt_static_sched_enqueue +ffffffff830df110 D dt_static_sched_off__cpu +ffffffff830df180 D dt_static_sched_on__cpu +ffffffff830df1f0 D dt_static_sched_remain__cpu +ffffffff830df260 D dt_static_sched_sleep +ffffffff830df2d0 D dt_static_sched_wakeup +ffffffff830df340 D dt_static_raw_syscalls_sys_enter +ffffffff830df3b0 D dt_static_raw_syscalls_sys_exit +ffffffff830df420 D dt_static_uvm_fault +ffffffff830df490 D dt_static_uvm_map_insert +ffffffff830df500 D dt_static_uvm_map_remove +ffffffff830df570 D dt_static_uvm_malloc +ffffffff830df5e0 D dt_static_uvm_free +ffffffff830df650 D dt_static_uvm_pool_get +ffffffff830df6c0 D dt_static_uvm_pool_put +ffffffff830df730 D dt_static_vfs_bufcache_rel +ffffffff830df7a0 D dt_static_vfs_bufcache_take +ffffffff830df810 D dt_static_vfs_cleaner +ffffffff830df880 D dt_static_vmm_guest_enter +ffffffff830df8f0 D dt_static_vmm_guest_exit +ffffffff830df960 D dt_static_vmm_inout +ffffffff830df9d0 D dt_static_smr_call +ffffffff830dfa40 D dt_static_smr_called +ffffffff830dfab0 D dt_static_smr_barrier_enter +ffffffff830dfb20 D dt_static_smr_barrier_exit +ffffffff830dfb90 D dt_static_smr_wakeup +ffffffff830dfc00 D dt_static_smr_thread +ffffffff830dfc70 D dt_static_refcnt_none +ffffffff830dfce0 D dt_static_refcnt_ifaddr +ffffffff830dfd50 D dt_static_refcnt_inpcb +ffffffff830dfdc0 D dt_static_refcnt_tdb +ffffffff830e0000 D db_next_free_breakpoint +ffffffff830e0008 D db_breakpoints_inserted +ffffffff830e1000 D db_ed_style +ffffffff830e2000 D db_examine_format +ffffffff830e2078 D db_print_format +ffffffff830e3000 D db_history_size +ffffffff830e3008 D db_history_curr +ffffffff830e3010 D db_history_last +ffffffff830e4000 D db_tab_stop_width +ffffffff830e4004 D db_max_line +ffffffff830e4008 D db_max_width +ffffffff830e400c D db_radix +ffffffff830e5000 D db_lastsym +ffffffff830e5008 D db_maxoff +ffffffff830e6000 D db_vars +ffffffff830e6090 D db_evars +ffffffff830e7000 D db_watchpoints_inserted +ffffffff830e7008 D db_next_free_watchpoint +ffffffff830e8000 D db_log +ffffffff830e9000 D audio_cd +ffffffff830e9020 D audio_lock +ffffffff830ea000 D midi_cd +ffffffff830eb000 D rnd_cold +ffffffff830eb004 D rnd_slowextract +ffffffff830eb008 D rnd_timeout +ffffffff830eb050 D rndlock +ffffffff830eb060 D rndreinit_timeout +ffffffff830eb0a8 D rnd_task +ffffffff830ec000 D video_cd +ffffffff830ed000 d rrip_table_analyze +ffffffff830ed0e0 d rrip_table_getname +ffffffff830ed1e0 d rrip_table_getsymname +ffffffff830ed280 d rrip_table_extref +ffffffff830ee000 D nexecs +ffffffff830ef000 D elf_note_names +ffffffff830f0000 D ncpus +ffffffff830f0004 D ncpusfound +ffffffff830f1000 D acct_lock +ffffffff830f1010 D acctsuspend +ffffffff830f1014 D acctresume +ffffffff830f1018 D acctrate +ffffffff830f2000 D clockintr_mtx +ffffffff830f2010 D statclock_gen +ffffffff830f3000 D fhdlk +ffffffff830f4000 D kqueue_klist_lock +ffffffff830f4010 D kq_timeoutmax +ffffffff830f5000 D stackgap_random +ffffffff830f6000 D nprocesses +ffffffff830f6004 D nthreads +ffffffff830f6008 D fork_tfmrate +ffffffff830f7000 D kthread_q +ffffffff830f8000 D malloc_mtx +ffffffff830f8010 D memname +ffffffff830f84a0 D sysctl_kmemlock +ffffffff830f84b0 D malloc_errintvl +ffffffff830f9000 D maxdmap +ffffffff830f9008 D maxsmap +ffffffff830f9010 D rlimit_lock +ffffffff830fa000 D sched_cost_load +ffffffff830fa004 D sched_cost_priority +ffffffff830fa008 D sched_cost_runnable +ffffffff830fa00c D sched_cost_resident +ffffffff830fb000 D intrmap_lock +ffffffff830fc000 D nosuidcoredump +ffffffff830fc008 D sigio_lock +ffffffff830fd000 D smr_lock +ffffffff830fd010 D smr_logintvl +ffffffff830fe000 D startuphook_list +ffffffff830ff000 D sysctl_lock +ffffffff830ff010 D sysctl_disklock +ffffffff830ff020 d openbsd +ffffffff830ff024 d arg_max +ffffffff830ff028 d posix_version +ffffffff830ff02c d ngroups_max +ffffffff830ff030 d int_one +ffffffff830ff034 d maxpartitions +ffffffff830ff038 d raw_part +ffffffff830ff03c D allowpowerdown +ffffffff830ff040 D hw_power +ffffffff830ff044 d byte_order +ffffffff830ff048 d page_size +ffffffff83100000 d thrsleep_queue +ffffffff83100010 d thrsleep_lock +ffffffff83101000 D tc_lock +ffffffff83101010 D windup_mtx +ffffffff83101020 D timecounter +ffffffff83101028 D time_second +ffffffff83101030 d timehands +ffffffff83101038 d dummy_timecounter +ffffffff83101088 d th0 +ffffffff83101120 d th1 +ffffffff83102000 D itimer_mtx +ffffffff83102010 D ratecheck_mtx +ffffffff83102020 D ppsratecheck_mtx +ffffffff83102030 D resettodr_to +ffffffff83102078 D resettodr_task +ffffffff83103000 D timeout_mutex +ffffffff83104000 D wdog_auto +ffffffff83105000 D taskq_sys +ffffffff83105050 D taskq_sys_mp +ffffffff83106000 D ccpu +ffffffff83106004 D perflevel +ffffffff83106008 D perfpolicy +ffffffff83106010 D setperf_to +ffffffff83107000 D autoconf_attdet_mtx +ffffffff83107010 D msgs +ffffffff83108000 d evcount_list +ffffffff83108010 d evcount_percpu_init_list +ffffffff83109000 D syslogf_rwlock +ffffffff83109010 D log_mtx +ffffffff83109020 D logstash_in +ffffffff83109028 D logstash_out +ffffffff83109030 D logstash_rwlock +ffffffff8310a000 D pool_head +ffffffff8310a010 D pool_lock +ffffffff8310a020 D pool_debug +ffffffff8310a028 D pool_allocator_single +ffffffff8310a040 D pool_allocator_multi +ffffffff8310a058 D pool_allocator_multi_ni +ffffffff8310a070 D pool_gc_tick +ffffffff8310a0b8 D pool_gc_task +ffffffff8310b000 D kprintf_mutex +ffffffff8310b010 D db_panic +ffffffff8310b014 D splassert_ctl +ffffffff8310b018 D v_putc +ffffffff8310b020 D printf_flags +ffffffff8310c000 D userconf_base +ffffffff8310c004 D userconf_maxdev +ffffffff8310c008 D userconf_totdev +ffffffff8310c00c D userconf_maxlocnames +ffffffff8310c010 D userconf_cnt +ffffffff8310c014 D userconf_lines +ffffffff8310c018 D userconf_histsz +ffffffff8310c020 D userconf_cmds +ffffffff8310d000 D ftlock +ffffffff8310e000 d ppollcollect.poll_errintvl +ffffffff8310f000 D ttydefchars +ffffffff8310f014 D ttclos +ffffffff8310f01b D ttopen +ffffffff8310f022 D ttybg +ffffffff8310f028 D ttyin +ffffffff8310f02e D ttyout +ffffffff8310f038 D ttylist_lock +ffffffff83110000 D linesw +ffffffff83110280 D nlinesw +ffffffff83111000 D pt_softc_lock +ffffffff83112000 d mbstat_boot_boot_cpumem +ffffffff83112080 D mbstat +ffffffff83112090 D mclsizes +ffffffff831120b0 D m_extref_mtx +ffffffff831120c0 D m_pool_allocator +ffffffff83113000 D somaxconn +ffffffff83113004 D sominconn +ffffffff83113008 D sosplice_lock +ffffffff83114000 D sb_max +ffffffff83115000 D unp_lock +ffffffff83115010 D unp_df_lock +ffffffff83115020 D unp_gc_lock +ffffffff83115030 D unp_rights_mtx +ffffffff83115040 D unp_ino_mtx +ffffffff83115050 D unp_gc_task +ffffffff83115080 D unpst_sendspace +ffffffff83115084 D unpst_recvspace +ffffffff83115088 D unpsq_sendspace +ffffffff8311508c D unpsq_recvspace +ffffffff83115090 D unpdg_sendspace +ffffffff83115094 D unpdg_recvspace +ffffffff83116000 D doingcache +ffffffff83117000 D maxvfsconf +ffffffff83117010 d vfsconflist +ffffffff83118000 D lockf_lock +ffffffff83118010 D maxlocksperuid +ffffffff83119000 D iftovt_tab +ffffffff83119040 D vttoif_tab +ffffffff83119064 D suid_clear +ffffffff83119068 D vnode_mtx +ffffffff83119078 D vfs_stall_lock +ffffffff83119090 D vtypes +ffffffff831190e0 D vtags +ffffffff8311a000 D syncer_maxdelay +ffffffff8311a004 D syncdelay +ffffffff8311b000 D dosdirtemplate +ffffffff8311c000 D ntfs_hashlock +ffffffff8311d000 D ntfs_toupper_lock +ffffffff8311e000 D art_table_gc_mtx +ffffffff8311e010 D art_table_gc_task +ffffffff8311e040 D art_node_gc_mtx +ffffffff8311e050 D art_node_gc_task +ffffffff8311f000 D bpf_bufsize +ffffffff8311f004 D bpf_maxbufsize +ffffffff8311f008 D bpf_sysctl_lk +ffffffff83120000 D ifg_head +ffffffff83120010 D if_cloners_lock +ffffffff83120020 D if_input_task_locked +ffffffff83120050 D netlock +ffffffff83120060 D ifnetlist +ffffffff83121000 D ifiq_maxlen_drop +ffffffff83121004 D ifiq_maxlen_return +ffffffff83122000 D etherbroadcastaddr +ffffffff83122006 D ether_ipmulticast_min +ffffffff8312200c D ether_ipmulticast_max +ffffffff83122012 D ether_ip6multicast_min +ffffffff83122018 D ether_ip6multicast_max +ffffffff83123000 D etherip_cloner +ffffffff83123030 D etherip_list +ffffffff83124000 D loop_cloner +ffffffff83125000 D ifmedia_mtx +ffffffff83126000 D ppp_compressors +ffffffff83126020 D ppp_cloner +ffffffff83127000 D ppp_pkt_init +ffffffff83128000 D ppp_bsd_compress +ffffffff83129000 D ppp_deflate +ffffffff83129070 D ppp_deflate_draft +ffffffff8312a000 D tun_cloner +ffffffff8312a030 D tap_cloner +ffffffff8312b000 D bridgeintrq +ffffffff8312b038 D bridge_cloner +ffffffff8312c000 d veb_cloner +ffffffff8312c030 d vport_cloner +ffffffff8312d000 D vlan_tagh_lk +ffffffff8312d010 D vlan_cloner +ffffffff8312d040 D svlan_cloner +ffffffff8312e000 D pipex_list_mtx +ffffffff8312e010 D pipex_prune +ffffffff8312e018 D pipexoutq +ffffffff8312e050 d SHAPad2 +ffffffff8312f000 D rtmap_gc +ffffffff8312f018 D rt_rc +ffffffff83130000 D rt_labels +ffffffff83131000 D enc_cloner +ffffffff83132000 D gre_cloner +ffffffff83132030 D gre_list +ffffffff83132040 D mgre_cloner +ffffffff83132070 D egre_cloner +ffffffff831320a0 D nvgre_cloner +ffffffff831320d0 D eoip_cloner +ffffffff83133000 D trunk_cloner +ffffffff83134000 d aggr_cloner +ffffffff83135000 d tpmr_cloner +ffffffff83136000 D mpe_cloner +ffffffff83137000 D mpw_cloner +ffffffff83138000 D mpip_cloner +ffffffff83139000 d bpe_cloner +ffffffff83139030 d bpe_lock +ffffffff8313a000 D vether_cloner +ffffffff8313b000 D pair_cloner +ffffffff8313c000 d vxlan_cloner +ffffffff8313c030 d vxlan_lock +ffffffff8313c040 d vxlan_teps +ffffffff8313d000 D underload_interval +ffffffff8313d010 D wg_cloner +ffffffff8313e000 d stoeplitz_keyseed +ffffffff8313f000 D ieee80211_cache_size +ffffffff83140000 D arpt_prune +ffffffff83140004 D arpt_keep +ffffffff83140008 D arpt_down +ffffffff83140010 D arpinq +ffffffff83140048 D arp_mtx +ffffffff83140058 D arp_maxtries +ffffffff83141000 D ipport_firstauto +ffffffff83141004 D ipport_lastauto +ffffffff83141008 D ipport_hifirstauto +ffffffff8314100c D ipport_hilastauto +ffffffff83142000 D divert_sendspace +ffffffff83142004 D divert_recvspace +ffffffff83142008 D divbhashsize +ffffffff83143000 D icmptstamprepl +ffffffff83143004 D icmperrppslim +ffffffff83143008 D icmp_redirtimeout +ffffffff83144000 D ipsendredirects +ffffffff83144004 D ip_defttl +ffffffff83144008 D ip_mtudisc +ffffffff8314400c D ip_mtudisc_timeout +ffffffff83144010 D ipq_mutex +ffffffff83144020 D ip_maxqueue +ffffffff83144028 D ipintrq +ffffffff83144060 d ipsend_task +ffffffff83144090 d ipsendraw_task +ffffffff83145000 D ip_mrtproto +ffffffff83145004 d sin +ffffffff83146000 D rip_sendspace +ffffffff83146008 D rip_recvspace +ffffffff83147000 D tcprexmtthresh +ffffffff83147004 D tcptv_keep_init +ffffffff83147008 D tcp_rst_ppslim +ffffffff8314700c D tcp_ackdrop_ppslim +ffffffff83147010 D tcp_syn_hash_size +ffffffff83147014 D tcp_syn_cache_limit +ffffffff83147018 D tcp_syn_bucket_limit +ffffffff8314701c D tcp_syn_use_limit +ffffffff83148000 D tcp_outflags +ffffffff83149000 D tcp_timer_mtx +ffffffff83149010 D tcp_mssdflt +ffffffff83149014 D tcp_rttdflt +ffffffff83149018 D tcp_do_rfc1323 +ffffffff8314901c D tcp_do_sack +ffffffff83149020 D tcp_do_rfc3390 +ffffffff83149024 D tcp_reass_limit +ffffffff83149028 D tcp_sackhole_limit +ffffffff8314a000 D tcp_backoff +ffffffff8314a034 D tcp_totbackoff +ffffffff8314b000 D tcp_sendspace +ffffffff8314b004 D tcp_recvspace +ffffffff8314b008 D tcp_autorcvbuf_inc +ffffffff8314c000 D udpcksum +ffffffff8314c004 D udp_sendspace +ffffffff8314c008 D udp_recvspace +ffffffff8314d000 D ipsec_flows_mtx +ffffffff8314d010 D ipsec_ids_idle +ffffffff8314d014 D ipsec_ids_next_flow +ffffffff8314d018 D ipsec_policy_head +ffffffff8314d028 D ipsp_ids_gc_timeout +ffffffff8314d070 D tdb_sadb_mtx +ffffffff8314d080 d tdb_hashmask +ffffffff8314e000 D ipo_tdb_mtx +ffffffff8314e010 D ipsec_acquire_mtx +ffffffff8314e020 D ipsec_acquire_head +ffffffff8314f000 D ipsec_keep_invalid +ffffffff8314f004 D ipsec_require_pfs +ffffffff8314f008 D ipsec_soft_timeout +ffffffff8314f00c D ipsec_exp_timeout +ffffffff8314f010 D ipsec_soft_first_use +ffffffff8314f014 D ipsec_exp_first_use +ffffffff8314f018 D ipsec_expire_acquire +ffffffff8314f01c D esp_enable +ffffffff8314f020 D ah_enable +ffffffff83150000 D udpencap_enable +ffffffff83150004 D udpencap_port +ffffffff83151000 D carp_vh_rc +ffffffff83151020 D carp_sc_rc +ffffffff83151040 D carp_opts +ffffffff83151058 D carp_cloner +ffffffff83151088 d carp_send_na.mcast +ffffffff83152000 d PADDING ffffffff83153000 d PADDING -ffffffff83154000 d PADDING -ffffffff83155000 d weak_keys -ffffffff83156000 D swcr_id -ffffffff83157000 D window_inflate -ffffffff83157004 D window_deflate -ffffffff83158000 D ghash_update -ffffffff83159000 D mpls_defttl -ffffffff83159004 D mpls_mapttl_ip -ffffffff8315a000 D nfskevq_lock -ffffffff8315b000 D nfs_backoff -ffffffff8315b020 D nfs_ptimers -ffffffff8315c000 D desirednfsrvcache -ffffffff8315c010 D nonidempotent -ffffffff8315c070 D nfsv2_repstat -ffffffff8315d000 D nfsv2_type -ffffffff8315d030 D nfsv3_type -ffffffff8315d060 D nv2tov_type -ffffffff8315d080 D nv3tov_type -ffffffff8315d0a0 D nfsv3_procid -ffffffff8315d100 D nfsv2_procid -ffffffff8315d15c d nfsv3err_getattr -ffffffff8315d170 d nfsv3err_setattr -ffffffff8315d190 d nfsv3err_lookup -ffffffff8315d1a4 d nfsv3err_access -ffffffff8315d1b0 d nfsv3err_readlink -ffffffff8315d1d0 d nfsv3err_read -ffffffff8315d1f0 d nfsv3err_write -ffffffff8315d210 d nfsv3err_create -ffffffff8315d230 d nfsv3err_mkdir -ffffffff8315d250 d nfsv3err_symlink -ffffffff8315d270 d nfsv3err_mknod -ffffffff8315d290 d nfsv3err_remove -ffffffff8315d2b0 d nfsv3err_rmdir -ffffffff8315d2d0 d nfsv3err_rename -ffffffff8315d300 d nfsv3err_link -ffffffff8315d330 d nfsv3err_readdir -ffffffff8315d350 d nfsv3err_readdirplus -ffffffff8315d366 d nfsv3err_fsstat -ffffffff8315d372 d nfsv3err_fsinfo -ffffffff8315d37c d nfsv3err_pathconf -ffffffff8315d386 d nfsv3err_commit -ffffffff8315e000 D nfsrv3_procs -ffffffff8315e0b8 D nfs_niothreads -ffffffff8315f000 D fragtbl -ffffffff83160000 D ffs_vtbl -ffffffff83161000 D softdep_typenames -ffffffff83161070 D tickdelay -ffffffff83162000 D dirchk -ffffffff83163000 D desireddquot -ffffffff83164000 D amap_list_lock -ffffffff83165000 d uao_list_lock -ffffffff83166000 d uvmexp_countersboot_boot_cpumem -ffffffff831660c0 D uvmexp_counters -ffffffff831660c8 D vm_min_kernel_address -ffffffff83167000 D no_constraint -ffffffff83168000 d uvm_kmapent_warn_rate -ffffffff83169000 D maxslp -ffffffff8316a000 D uvmpagerops -ffffffff8316b000 D uvm_swap_data_lock -ffffffff8316b010 D swap_syscall_lock -ffffffff8316b020 D oommtx -ffffffff8316c000 D uvm_doswapencrypt -ffffffff8316d000 D gif_list -ffffffff8316d010 D gif_cloner -ffffffff8316e000 D divert6_sendspace -ffffffff8316e004 D divert6_recvspace -ffffffff8316e008 D divb6hashsize -ffffffff8316f000 d in6_get_hw_ifid.allone -ffffffff83170000 D ip6_sendredirects -ffffffff83170004 D ip6_defhlim -ffffffff83170008 D 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B nd6_timer_to -ffffffff8352b238 B nd6_slowtimo_ch -ffffffff8352b280 B nd6_expire_timeout -ffffffff8352b2c8 B nd6_inuse -ffffffff8352c000 B rawin6pcbtable -ffffffff8352c078 B rip6counters -ffffffff8352d000 B pkptable -ffffffff8352d038 B pkpcb_pool -ffffffff8352d1e0 b nregistered -ffffffff8352d1e4 b npromisc -ffffffff8352e000 B cpu_idle_cycle_fcn -ffffffff8352e008 B setperf_prio -ffffffff8352e00c B cpureset_delay -ffffffff8352e010 B ssym -ffffffff8352e018 B esym -ffffffff8352e020 B bootdev -ffffffff8352e024 B biosbasemem -ffffffff8352e028 B bootapiver -ffffffff8352e02c B safepri -ffffffff8352e030 B exec_map -ffffffff8352e038 B phys_map -ffffffff8352e040 B allowaperture -ffffffff8352e048 B msgbuf_paddr -ffffffff8352e050 B msgbuf_vaddr -ffffffff8352e058 B physmem -ffffffff8352e060 B idt_vaddr -ffffffff8352e068 B idt_paddr -ffffffff8352e070 B bios_diskinfo -ffffffff8352e078 B bios_cksumlen -ffffffff8352e07c B kbd_reset -ffffffff8352e080 B forceukbd -ffffffff8352e084 B dumpsize -ffffffff8352e088 B dumplo -ffffffff8352e090 B mem_cluster_cnt -ffffffff8352e0a0 B mem_clusters -ffffffff8352e1a0 B dumpmem_vaddr -ffffffff8352e1a8 B dumppcb -ffffffff8352e528 B dumpmem_sz -ffffffff8352e530 B proc0paddr -ffffffff8352e538 B idt -ffffffff8352e540 b cpu_init_extents.already_done -ffffffff8352e548 B lo32_vaddr -ffffffff8352e550 B lo32_paddr -ffffffff8352e558 B tramp_pdirpa -ffffffff8352e560 B early_pte_pages -ffffffff8352e570 B bootinfo -ffffffff8352f570 B avail_start -ffffffff8352f578 B avail_end -ffffffff8352f580 B bios_memmap -ffffffff8352f588 B bios_efiinfo -ffffffff8352f590 B mmap -ffffffff8352f598 B kern_end -ffffffff8352f5a0 B dumpmem_paddr -ffffffff8352f5b0 B idt_allocmap -ffffffff8352f6b0 B cpuresetfn -ffffffff8352f6b8 B bios_bootmac -ffffffff8352f6c0 B bios_ucode -ffffffff8352f6c8 B amd64_delay_quality -ffffffff8352f6d0 B dumpmem_low -ffffffff8352f6d8 B dumpmem_high -ffffffff8352f6e0 B cpu_class -ffffffff83530000 B cpuspeed -ffffffff83530004 B amd64_has_xcrypt -ffffffff83530010 B cpu_model -ffffffff83530040 B setperf_setup -ffffffff83530048 B has_rdrand -ffffffff8353004c B has_rdseed -ffffffff83530050 B amd64_has_pclmul -ffffffff83530054 B amd64_has_aesni -ffffffff83531000 B tsc_is_invariant -ffffffff83531008 B tsc_frequency -ffffffff83531010 B tsc_recalibrate -ffffffff83531040 B tsc_bp_status -ffffffff835310c0 B tsc_test_cycles -ffffffff835310c8 B tsc_test_rounds -ffffffff835310cc B tsc_ingress_barrier -ffffffff835310d0 B tsc_egress_barrier -ffffffff83531100 B tsc_ap_status -ffffffff83531180 B tsc_ap_name -ffffffff83532000 b vc3_sc -ffffffff83532010 b viac3_rnd.buffer -ffffffff83532058 B viac3_rnd_tmo -ffffffff835320a0 B viac3_rnd_present -ffffffff83533000 B aesni_sc -ffffffff83533008 B aesnipl -ffffffff835331b0 B aesni_ops -ffffffff83534000 b amd64_errata.printed -ffffffff83535000 B cpu_ucode_size -ffffffff83535008 B cpu_ucode_data -ffffffff83535010 B cpu_ucode_intel_applied -ffffffff83536000 b ap_open_count -ffffffff83536008 B zeropage -ffffffff83536010 B mem_range_softc -ffffffff83537000 B mtrrdef -ffffffff83537008 B mtrrcap -ffffffff83538000 B nkptp -ffffffff83538020 B pg_nx -ffffffff83538028 B pg_g_kern -ffffffff83538030 B pmap_initialized -ffffffff83538038 B kernel_pmap_store -ffffffff83538110 B cr3_reuse_pcid -ffffffff83538118 b cr3_pcid_temp -ffffffff83538120 B virtual_avail -ffffffff83538128 B pg_xo -ffffffff83538130 B protection_codes -ffffffff83538170 B pmap_use_pcid -ffffffff83538174 b cr3_pcid_proc -ffffffff83538178 B cr3_pcid_proc_intel -ffffffff83538180 B pmaps -ffffffff83538188 B pmap_pmap_pool -ffffffff83538330 B pmap_pv_pool -ffffffff835384d8 B pmap_pdp_pool -ffffffff83539000 B fpu_mxcsr_mask -ffffffff83539008 B xsave_mask -ffffffff8353a000 B x86_soft_intrs -ffffffff8353b000 B i8259_imen -ffffffff8353c000 B intr_shared_edge -ffffffff8353c008 B fake_softclock_intrhand -ffffffff8353c078 B fake_softnet_intrhand -ffffffff8353c0e8 B fake_softtty_intrhand -ffffffff8353c158 B fake_timer_intrhand -ffffffff8353c1c8 B fake_ipi_intrhand -ffffffff8353c238 B fake_xen_intrhand -ffffffff8353c2a8 B fake_hyperv_intrhand -ffffffff8353d000 B atdevbase -ffffffff8353d010 b ioport_ex_storage -ffffffff8353d2e0 B ioport_ex -ffffffff8353d2f0 b iomem_ex_storage -ffffffff8353d5c0 B iomem_ex -ffffffff8353d5c8 b ioport_malloc_safe -ffffffff8353e000 B mp_perflevel -ffffffff8353e008 B ul_setperf -ffffffff8353f000 B cn_tab -ffffffff83540000 B ddb_mp_mutex -ffffffff83540010 B ddb_state -ffffffff83540018 B ddb_regs -ffffffff835400c8 B db_switch_cpu -ffffffff835400d0 B db_switch_to_cpu -ffffffff835400d8 B ddb_active_cpu -ffffffff83541000 B rtclock_tval -ffffffff83541008 B i8254_ticked -ffffffff8354100c B i8254_offset -ffffffff83541010 B i8254_lastcount -ffffffff83541018 b rtcstart.rtcdrain_timeout -ffffffff83541060 B rtc_update_century -ffffffff83541068 B rtc_todr -ffffffff83542000 B k8pnow_current_state -ffffffff83543000 B bus_clock -ffffffff83543008 b est_fqlist -ffffffff83544000 B k1x_current_state -ffffffff83545000 B rotatedfonts -ffffffff83545008 B rasops_framebuffers +ffffffff83154000 d weak_keys +ffffffff83155000 D swcr_id +ffffffff83156000 D window_inflate +ffffffff83156004 D window_deflate +ffffffff83157000 D ghash_update +ffffffff83158000 D mpls_defttl +ffffffff83158004 D mpls_mapttl_ip +ffffffff83159000 D nfskevq_lock +ffffffff8315a000 D nfs_backoff +ffffffff8315a020 D nfs_ptimers +ffffffff8315b000 D desirednfsrvcache +ffffffff8315b010 D nonidempotent +ffffffff8315b070 D nfsv2_repstat +ffffffff8315c000 D nfsv2_type +ffffffff8315c030 D nfsv3_type +ffffffff8315c060 D nv2tov_type +ffffffff8315c080 D nv3tov_type +ffffffff8315c0a0 D nfsv3_procid +ffffffff8315c100 D nfsv2_procid +ffffffff8315c15c d nfsv3err_getattr +ffffffff8315c170 d nfsv3err_setattr +ffffffff8315c190 d nfsv3err_lookup +ffffffff8315c1a4 d nfsv3err_access +ffffffff8315c1b0 d nfsv3err_readlink +ffffffff8315c1d0 d nfsv3err_read +ffffffff8315c1f0 d nfsv3err_write +ffffffff8315c210 d nfsv3err_create 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+ffffffff83168000 D maxslp +ffffffff83169000 D uvmpagerops +ffffffff8316a000 D uvm_swap_data_lock +ffffffff8316a010 D swap_syscall_lock +ffffffff8316a020 D oommtx +ffffffff8316b000 D uvm_doswapencrypt +ffffffff8316c000 D gif_list +ffffffff8316c010 D gif_cloner +ffffffff8316d000 D divert6_sendspace +ffffffff8316d004 D divert6_recvspace +ffffffff8316d008 D divb6hashsize +ffffffff8316e000 d in6_get_hw_ifid.allone +ffffffff8316f000 D ip6_sendredirects +ffffffff8316f004 D ip6_defhlim +ffffffff8316f008 D ip6_defmcasthlim +ffffffff8316f00c D ip6_maxfragpackets +ffffffff8316f010 D ip6_maxfrags +ffffffff8316f014 D ip6_log_interval +ffffffff8316f018 D ip6_hdrnestlimit +ffffffff8316f01c D ip6_dad_count +ffffffff8316f020 D ip6_auto_flowlabel +ffffffff8316f024 D ip6_use_deprecated +ffffffff8316f028 D ip6_neighborgcthresh +ffffffff8316f02c D ip6_maxdynroutes +ffffffff8316f030 D rip6_sendspace +ffffffff8316f038 D rip6_recvspace +ffffffff8316f040 D icmp6_redirtimeout +ffffffff8316f044 D icmp6errppslim +ffffffff8316f048 D ip6_mtudisc_timeout +ffffffff83170000 D frag6_mutex +ffffffff83171000 d icmp6_mtudisc_hiwat +ffffffff83171004 d icmp6_mtudisc_lowat +ffffffff83172000 d randomtab_20 +ffffffff83173000 D ip6intrq +ffffffff83173038 d ip6send_task +ffffffff83174000 D nd6_timer_next +ffffffff83174008 D nd6_expire_next +ffffffff83174010 D nd6_delay +ffffffff83174014 D nd6_umaxtries +ffffffff83174018 D nd6_mmaxtries +ffffffff8317401c D nd6_gctimer +ffffffff83174020 D nd6_maxndopt +ffffffff83175000 d dadq +ffffffff83176000 D pfkeyv2_mtx +ffffffff83176010 d pfkeyv2_seq +ffffffff83177000 D sadb_exts_allowed_in +ffffffff83177090 D sadb_exts_required_in +ffffffff83178000 D cold +ffffffff83179000 D bdevsw +ffffffff83179460 D nblkdev +ffffffff83179470 D cdevsw +ffffffff8317b400 D nchrdev +ffffffff8317b404 D mem_no +ffffffff8317b408 D swapdev +ffffffff8317b410 D constab +ffffffff8317c000 D machine +ffffffff8317c008 D lid_action +ffffffff8317c00c D pwr_action +ffffffff8317c010 D isa_constraint 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db_Esc_inst +ffffffff8318b7c0 D db_Grp1 +ffffffff8318b800 D db_Grp2 +ffffffff8318b840 D db_Grp3 +ffffffff8318b900 D db_Grp4 +ffffffff8318b9c0 D db_Grp5 +ffffffff8318ba80 D db_inst_table +ffffffff8318d280 D db_bad_inst +ffffffff8318d2a0 D db_index_reg_16 +ffffffff8318d2e0 D db_reg +ffffffff8318d4e0 D db_seg_reg +ffffffff8318d520 D db_lengths +ffffffff8318e000 D db_regs +ffffffff8318e1e0 D db_eregs +ffffffff8318e1f0 D db_reg_args +ffffffff8318f000 D timer_mutex +ffffffff8318f010 d i8254_timecounter +ffffffff83190000 D spleen8x16 +ffffffff83190058 D spleen12x24 +ffffffff831900b0 D spleen16x32 +ffffffff83190108 D spleen32x64 +ffffffff83190160 d builtin_fonts +ffffffff831901e0 d wsfont_add.cookiegen +ffffffff831901f0 d spleen8x16_data +ffffffff83190ff0 d spleen12x24_data +ffffffff831939f0 d spleen16x32_data +ffffffff831971f0 d spleen32x64_data +ffffffff831a6000 D nsphy_cd +ffffffff831a7000 D nsphyter_cd +ffffffff831a8000 D gentbi_cd +ffffffff831a9000 D qsphy_cd +ffffffff831aa000 D inphy_cd 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ioapic_cd +ffffffff831db000 D efifb_std_descr +ffffffff831db030 D efifb_descrs +ffffffff831db038 D efifb_accessops +ffffffff831db098 D efifb_cd +ffffffff831dc000 D pvbus_cd +ffffffff831dc020 D pvbus_types +ffffffff831dc0e0 D pvbus_dma_tag +ffffffff831dd000 D pvclock_cd +ffffffff831dd020 D pvclock_timecounter +ffffffff831de000 D vmt_tclo_rpc +ffffffff831de0d0 D vmt_cd +ffffffff831df000 D xen_cd +ffffffff831df020 D xen_bus_dma_tag +ffffffff831e0000 D xnf_cd +ffffffff831e1000 D xbf_cd +ffffffff831e2000 D hv_msg_dispatch +ffffffff831e2110 D hv_timecounter +ffffffff831e2160 D hyperv_cd +ffffffff831e3000 d hv_ic_devs +ffffffff831e4000 D hvn_cd +ffffffff831e5000 D hvs_cd +ffffffff831e6000 D virtio_cd +ffffffff831e7000 D vio_cd +ffffffff831e8000 D vioblk_cd +ffffffff831e9000 D viomb_cd +ffffffff831ea000 D viornd_cd +ffffffff831eb000 D vioscsi_cd +ffffffff831ec000 D vmmci_cd +ffffffff831ed000 D pci_cd +ffffffff831ee000 D arc_fw_hdr +ffffffff831ee008 D arc_cd +ffffffff831ef000 D jmb_cd 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+ffffffff83203000 D vr_cd +ffffffff83203020 D vr_devices +ffffffff83204000 D txp_cd +ffffffff83205000 D bt848_card_signature +ffffffff83206000 D bktr_cd +ffffffff83207000 D em_cd +ffffffff83208000 D ixgb_cd +ffffffff83209000 D ix_cd +ffffffff83209020 D ixgbe_smart_speed +ffffffff83209024 D ixgbe_enable_msix +ffffffff8320a000 D ixl_cd +ffffffff8320a020 d ixl_sff_lock +ffffffff8320b000 D xge_cd +ffffffff8320c000 D thtc_cd +ffffffff8320c020 D tht_cd +ffffffff8320c040 D tht_txt_desc +ffffffff8320c068 D tht_rxf_desc +ffffffff8320c090 D tht_rxd_desc +ffffffff8320c0b8 D tht_txf_desc +ffffffff8320d000 D myx_cd +ffffffff8320e000 D oce_cd +ffffffff8320f000 D dc_devs +ffffffff83210000 D cas_cd +ffffffff83211000 D sis_cd +ffffffff83212000 D se_cd +ffffffff83213000 D cbb_cd +ffffffff83213020 D yc_chipsets +ffffffff832131b0 d pccbb_funcs +ffffffff832131e0 d pccbb_pcmcia_funcs +ffffffff83214000 D skc_cd +ffffffff83214020 D sk_cd +ffffffff83215000 D mskc_cd +ffffffff83215020 D msk_cd +ffffffff83216000 D puc_cd +ffffffff83217000 D puc_ndevs +ffffffff83218000 D iwi_cd +ffffffff83219000 D wpi_cd +ffffffff8321a000 D iwn_cd +ffffffff8321b000 D iwm_cd +ffffffff8321c000 D iwx_cd +ffffffff8321d000 D cmpci_cd +ffffffff8321e000 D iha_cd +ffffffff8321f000 D pcscp_cd +ffffffff8321f020 D pcscp_glue +ffffffff83220000 D bge_cd +ffffffff83221000 D bnx_firmwares +ffffffff83221160 D bnx_rv2ps +ffffffff832211c0 D bnx_cd +ffffffff832211e0 d flash_5709 +ffffffff83221210 d flash_table +ffffffff83222000 D vge_cd +ffffffff83223000 D stge_cd +ffffffff83224000 D nfe_cd +ffffffff83225000 D et_cd +ffffffff83226000 D jme_cd +ffffffff83227000 D age_cd +ffffffff83228000 D alc_dma_burst +ffffffff83228020 D alc_cd +ffffffff83229000 D ale_cd +ffffffff8322a000 D amdpm_cd +ffffffff8322a020 d amdpm_timecounter +ffffffff8322b000 D bce_cd +ffffffff8322c000 D rtwn_cd +ffffffff8322d000 d ral_rt2560_opns +ffffffff8322d028 d ral_rt2661_opns +ffffffff8322d050 d ral_rt2860_opns +ffffffff8322e000 D piixpm_cd +ffffffff8322f000 D vic_cd +ffffffff83230000 D vmx_cd +ffffffff83231000 D vmwpvs_cd +ffffffff83232000 D lii_cd +ffffffff83233000 D ichiic_cd +ffffffff83234000 D viapm_cd +ffffffff83234020 d viapm_timecounter +ffffffff83235000 D amdiic_cd +ffffffff83236000 D nviic_cd +ffffffff83237000 D kate_cd +ffffffff83238000 D km_cd +ffffffff83239000 D cpu_model_offsets +ffffffff83239070 D ksmn_cd +ffffffff8323a000 D itherm_cd +ffffffff8323b000 D pchtemp_cd +ffffffff8323c000 D xspd_cd +ffffffff8323d000 D virtio_pci_ops +ffffffff8323e000 D bwfm_pci_buscore_ops +ffffffff8323e030 D bwfm_pci_bus_ops +ffffffff8323e058 D bwfm_pci_msgbuf_ops +ffffffff8323f000 D bnxt_cd +ffffffff83240000 D mcx_cd +ffffffff83241000 D iavf_cd +ffffffff83242000 D rge_cd +ffffffff83243000 D igc_cd +ffffffff83244000 D agp_cd +ffffffff83245000 D intagp_cd +ffffffff83245020 D agp_i810_methods +ffffffff83246000 D reservation_ww_class +ffffffff83247000 d bridge_lock +ffffffff83247010 d bridge_list +ffffffff83248000 d drm_connector_enum_list +ffffffff832481f8 d connector_list_lock +ffffffff83248208 d connector_list +ffffffff83249000 d kernel_fb_helper_list +ffffffff83249010 d kernel_fb_helper_lock +ffffffff8324a000 D drm_global_mutex +ffffffff8324b000 D sch_mtx +ffffffff8324b010 D i2c_bit_algo +ffffffff8324b020 d drm_fence_context_count +ffffffff8324b028 d dma_fence_stub_mtx +ffffffff8324b038 D wait_bit_mtx +ffffffff8324b048 D shrinkers +ffffffff8324c000 d crtc_ww_class +ffffffff8324d000 d panel_lock +ffffffff8324d010 d panel_list +ffffffff8324e000 d ttm_global_mutex +ffffffff8324f000 D intel_bbops +ffffffff83250000 d i915_sys_placement +ffffffff83250020 d i915_ttm_bo_driver +ffffffff83251000 d mchdev_lock +ffffffff83252000 D inteldrm_stdscreen +ffffffff83252030 D inteldrm_scrlist +ffffffff83252038 D inteldrm_screenlist +ffffffff83252048 D inteldrm_accessops +ffffffff832520a8 D inteldrm_cd +ffffffff83253000 d capture_mutex +ffffffff83254000 d mitigations +ffffffff83255000 D i915_modparams +ffffffff83256000 d schedule_lock +ffffffff83257000 d unbind_fence_ops +ffffffff83258000 D intel_graphics_stolen_res +ffffffff83259000 D btc_valid_sclk +ffffffff8325a000 d evergreen_cs_packet_parse_vline.vline_start_end +ffffffff8325a020 d evergreen_cs_packet_parse_vline.vline_status +ffffffff8325b000 d r600_cs_packet_parse_vline.vline_start_end +ffffffff8325b008 d r600_cs_packet_parse_vline.vline_status +ffffffff8325c000 d r100_asic +ffffffff8325c2e0 d r200_asic +ffffffff8325c5c0 d r300_asic_pcie +ffffffff8325c8a0 d r300_asic +ffffffff8325cb80 d r420_asic +ffffffff8325ce60 d rs400_asic +ffffffff8325d140 d rs600_asic +ffffffff8325d420 d rs690_asic +ffffffff8325d700 d rv515_asic +ffffffff8325d9e0 d r520_asic +ffffffff8325dcc0 d r600_asic +ffffffff8325dfa0 d rv6xx_asic +ffffffff8325e280 d rs780_asic +ffffffff8325e560 d rv770_asic +ffffffff8325e840 d evergreen_asic +ffffffff8325eb20 d sumo_asic +ffffffff8325ee00 d btc_asic +ffffffff8325f0e0 d cayman_asic +ffffffff8325f3c0 d trinity_asic +ffffffff8325f6a0 d si_asic +ffffffff8325f980 d ci_asic +ffffffff8325fc60 d kv_asic +ffffffff83260000 d dce6_funcs +ffffffff83260018 d dce6_hdmi_funcs +ffffffff83260088 d dce6_dp_funcs +ffffffff832600f8 d dce4_funcs +ffffffff83260110 d dce4_hdmi_funcs +ffffffff83260180 d dce4_dp_funcs +ffffffff832601f0 d dce32_funcs +ffffffff83260208 d dce32_hdmi_funcs +ffffffff83260278 d dce32_dp_funcs +ffffffff832602e8 d r600_funcs +ffffffff83260300 d r600_hdmi_funcs +ffffffff83261000 D radeon_modeset +ffffffff83261004 D radeon_dynclks +ffffffff83261008 D radeon_agpmode +ffffffff8326100c D radeon_gart_size +ffffffff83261010 D radeon_tv +ffffffff83261014 D radeon_audio +ffffffff83261018 D radeon_pcie_gen2 +ffffffff8326101c D radeon_msi +ffffffff83261020 D radeon_lockup_timeout +ffffffff83261024 D radeon_dpm +ffffffff83261028 D radeon_aspm +ffffffff8326102c D radeon_runtime_pm +ffffffff83261030 D radeon_vm_size +ffffffff83261034 D radeon_vm_block_size +ffffffff83261038 D radeon_use_pflipirq +ffffffff8326103c D radeon_bapm +ffffffff83261040 D radeon_backlight +ffffffff83261044 D radeon_auxch +ffffffff83261048 D radeon_uvd +ffffffff8326104c D radeon_vce +ffffffff83261050 D radeon_si_support +ffffffff83261054 D radeon_cik_support +ffffffff83261058 D radeondrm_cd +ffffffff83261078 D radeondrm_stdscreen +ffffffff832610a8 D radeondrm_scrlist +ffffffff832610b0 D radeondrm_screenlist +ffffffff832610c0 D radeondrm_accessops +ffffffff83262000 D radeon_bbops +ffffffff83263000 d radeon_bo_driver +ffffffff83264000 d verde_pg_init +ffffffff83265000 d cac_weights_pitcairn +ffffffff832654d0 d cac_weights_oland +ffffffff83266000 d aldebaran_mode2_handler +ffffffff83267000 d amdgpu_vbios_version_attrs +ffffffff83268000 D amdgpu_asic_name +ffffffff83269000 D amdgpu_gart_size +ffffffff83269004 D amdgpu_gtt_size +ffffffff83269008 D amdgpu_moverate +ffffffff8326900c D amdgpu_audio +ffffffff83269010 D amdgpu_pcie_gen2 +ffffffff83269014 D amdgpu_msi +ffffffff83269018 D amdgpu_dpm +ffffffff8326901c D amdgpu_fw_load_type +ffffffff83269020 D amdgpu_aspm +ffffffff83269024 D amdgpu_runtime_pm +ffffffff83269028 D amdgpu_ip_block_mask +ffffffff8326902c D amdgpu_bapm +ffffffff83269030 D amdgpu_vm_size +ffffffff83269034 D amdgpu_vm_fragment_size +ffffffff83269038 D amdgpu_vm_block_size +ffffffff8326903c D amdgpu_vm_update_mode +ffffffff83269040 D amdgpu_dc +ffffffff83269044 D amdgpu_sched_jobs +ffffffff83269048 D amdgpu_sched_hw_submission +ffffffff83269050 D amdgpu_cg_mask +ffffffff83269058 D amdgpu_pg_mask +ffffffff8326905c D amdgpu_sdma_phase_quantum +ffffffff83269060 D amdgpu_pp_feature_mask +ffffffff83269064 D amdgpu_lbpw +ffffffff83269068 D amdgpu_compute_multipipe +ffffffff8326906c D amdgpu_gpu_recovery +ffffffff83269070 D amdgpu_smu_pptable_id +ffffffff83269074 D amdgpu_dc_feature_mask +ffffffff83269078 D amdgpu_async_gfx_ring +ffffffff8326907c D amdgpu_discovery +ffffffff83269080 D amdgpu_noretry +ffffffff83269084 D amdgpu_force_asic_type +ffffffff83269088 D amdgpu_tmz +ffffffff8326908c D amdgpu_reset_method +ffffffff83269090 D amdgpu_num_kcq +ffffffff83269094 D amdgpu_use_xgmi_p2p +ffffffff83269098 D mgpu_info +ffffffff83269248 D amdgpu_ras_enable +ffffffff8326924c D amdgpu_ras_mask +ffffffff83269250 D amdgpu_bad_page_threshold +ffffffff83269254 D amdgpu_backlight +ffffffff83269258 D amdgpu_cd +ffffffff83269278 D amdgpu_stdscreen +ffffffff832692a8 D amdgpu_scrlist +ffffffff832692b0 D amdgpu_screenlist +ffffffff832692c0 D amdgpu_accessops +ffffffff8326a000 d amdgpu_gtt_mgr_attributes +ffffffff8326b000 D amdgpu_bbops +ffffffff8326c000 D soc15_ih_clientid_name +ffffffff8326d000 D ras_error_string +ffffffff8326d030 D ras_block_string +ffffffff8326d0c0 D ras_mca_block_string +ffffffff8326e000 d amdgpu_bo_driver +ffffffff8326f000 d amdgpu_vram_mgr_attributes +ffffffff83270000 D amdgpu_xgmi_hive_type +ffffffff83270008 d xgmi_mutex +ffffffff83270018 D xgmi_ras_hw_ops +ffffffff83270058 D xgmi_ras +ffffffff83271000 d gfx_v9_0_ras +ffffffff83272000 D gfx_v9_4_ras +ffffffff83273000 D gfx_v9_4_2_ras_ops +ffffffff83273040 D gfx_v9_4_2_ras +ffffffff83274000 D hdp_v4_0_ras_hw_ops +ffffffff83274040 D hdp_v4_0_ras +ffffffff83275000 d jpeg_v2_6_ras +ffffffff83276000 D mca_v3_0_mp0_ras +ffffffff83276058 D mca_v3_0_mp1_ras +ffffffff832760b0 D mca_v3_0_mpio_ras +ffffffff83277000 D mmhub_v1_0_ras_hw_ops +ffffffff83277040 D mmhub_v1_0_ras +ffffffff83278000 D mmhub_v1_7_ras_hw_ops +ffffffff83278040 D mmhub_v1_7_ras +ffffffff83279000 D mmhub_v9_4_ras +ffffffff8327a000 D nbio_v7_4_ras +ffffffff8327b000 d sriov_sc_video_codecs_encode +ffffffff8327b010 d sriov_sc_video_codecs_decode +ffffffff8327b020 d sriov_sc_video_codecs_encode_array +ffffffff8327b050 d sriov_sc_video_codecs_decode_array +ffffffff8327c000 d sdma_v4_0_ras +ffffffff8327d000 D sdma_v4_4_ras +ffffffff8327e000 d sienna_cichlid_mode2_handler +ffffffff8327f000 D umc_v6_1_ras +ffffffff83280000 D umc_v6_7_ras +ffffffff83281000 D umc_v8_10_ras +ffffffff83282000 D umc_v8_7_ras +ffffffff83283000 d vcn_v2_6_ras +ffffffff83284000 d amdgpu_dm_mode_config_helperfuncs +ffffffff83284010 d dm_atomic_state_funcs +ffffffff83285000 d construct_integrated_info.result +ffffffff83285004 d bios_parser_get_firmware_info.result +ffffffff83286000 d dce_funcs +ffffffff83287000 d dce110_funcs +ffffffff83288000 d dce112_funcs +ffffffff83289000 d dce120_funcs +ffffffff8328a000 d rv1_clk_funcs +ffffffff8328a088 d rv1_clk_internal_funcs +ffffffff8328b000 d rv2_clk_internal_funcs +ffffffff8328c000 d dcn2_funcs +ffffffff8328d000 D dcn201_funcs +ffffffff8328e000 d dcn21_funcs +ffffffff8328e088 d rn_bw_params +ffffffff8328f000 D dcn3_fpga_funcs +ffffffff8328f088 d dcn3_funcs +ffffffff83290000 d vg_funcs +ffffffff83290088 d dummy_clocks +ffffffff832901b8 d vg_bw_params +ffffffff83291000 d dcn31_bw_params +ffffffff832912a0 d dcn31_funcs +ffffffff83292000 d dcn314_bw_params +ffffffff832922a0 d dcn314_funcs +ffffffff83293000 d dcn315_funcs +ffffffff83293088 d dcn315_bw_params +ffffffff83294000 d dcn316_funcs +ffffffff83294088 d dcn316_bw_params +ffffffff83295000 d dcn32_funcs +ffffffff83296000 d dcn10_dpp_cap +ffffffff83297000 D aperture_default_system +ffffffff83298000 d dcn20_dpp_cap +ffffffff83298010 d dcn20_dpp_funcs +ffffffff83299000 d dcn20_hubp_funcs +ffffffff8329a000 d dcn20_opp_funcs +ffffffff8329b000 d dcn20_tg_funcs +ffffffff8329c000 d dcn201_dpp_funcs +ffffffff8329c110 d dcn201_dpp_cap +ffffffff8329d000 d dcn201_hubp_funcs +ffffffff8329e000 d dcn201_opp_funcs +ffffffff8329f000 d dcn201_tg_funcs +ffffffff832a0000 D dcn201_ip +ffffffff832a01b8 D dcn201_soc +ffffffff832a0b88 d dcn201_res_pool_funcs +ffffffff832a1000 d dcn21_hubp_funcs +ffffffff832a2000 d dcn30_afmt_funcs +ffffffff832a3000 d dcn30_dpp_cap +ffffffff832a3010 d dcn30_dpp_funcs +ffffffff832a4000 d dcn30_hubp_funcs +ffffffff832a5000 d dcn30_tg_funcs +ffffffff832a6000 d dcn30_vpg_funcs +ffffffff832a7000 d res_cap_dcn301 +ffffffff832a7040 d dcn301_res_pool_funcs +ffffffff832a8000 d dcn302_res_pool_funcs +ffffffff832a9000 d dcn303_res_pool_funcs +ffffffff832aa000 d dcn31_afmt_funcs +ffffffff832ab000 d dcn31_apg_funcs +ffffffff832ac000 d dcn31_hpo_dp_link_encoder_funcs +ffffffff832ad000 d dcn31_hubp_funcs +ffffffff832ae000 d dcn31_tg_funcs +ffffffff832af000 d dcn31_res_pool_funcs +ffffffff832b0000 d dcn31_vpg_funcs +ffffffff832b1000 d dcn314_tg_funcs +ffffffff832b2000 d dcn314_res_pool_funcs +ffffffff832b3000 d dcn315_res_pool_funcs +ffffffff832b4000 d dcn316_res_pool_funcs +ffffffff832b5000 d dcn32_dpp_funcs +ffffffff832b5110 d dcn32_dpp_cap +ffffffff832b6000 d dcn32_hpo_dp_link_encoder_funcs +ffffffff832b7000 d dcn32_hubp_funcs +ffffffff832b8000 d dcn32_tg_funcs +ffffffff832b9000 d dcn32_res_pool_funcs +ffffffff832ba000 d dcn321_res_pool_funcs +ffffffff832bb000 D dcn1_0_ip +ffffffff832bb1b8 D dcn1_0_soc +ffffffff832bc000 D dcn2_0_ip +ffffffff832bc1b8 D dcn2_0_nv14_ip +ffffffff832bc370 D dcn2_0_soc +ffffffff832bcd40 D dcn2_0_nv14_soc +ffffffff832bd710 D dcn2_1_ip +ffffffff832bd8c8 D dcn2_1_soc +ffffffff832be298 D ddr4_wm_table_gs +ffffffff832be358 D lpddr4_wm_table_gs +ffffffff832be418 D lpddr4_wm_table_with_disabled_ppt +ffffffff832be4d8 D ddr4_wm_table_rn +ffffffff832be598 D ddr4_1R_wm_table_rn +ffffffff832be658 D lpddr4_wm_table_rn +ffffffff832bf000 D dcn3_0_ip +ffffffff832bf1b8 D dcn3_0_soc +ffffffff832c0000 D dcn3_01_ip +ffffffff832c01b8 D dcn3_01_soc +ffffffff832c0b88 D ddr4_wm_table +ffffffff832c0c48 D lpddr5_wm_table +ffffffff832c1000 D dcn3_02_ip +ffffffff832c11b8 D dcn3_02_soc +ffffffff832c2000 D dcn3_03_ip +ffffffff832c21b8 D dcn3_03_soc +ffffffff832c3000 D dcn3_1_ip +ffffffff832c31b8 D dcn3_15_ip +ffffffff832c3370 D dcn3_16_ip +ffffffff832c3528 d dcn3_15_soc +ffffffff832c3ef8 d dcn3_1_soc +ffffffff832c48c8 d dcn3_16_soc +ffffffff832c6000 D dcn3_14_ip +ffffffff832c61b8 D dcn3_14_soc +ffffffff832c7000 D dcn3_2_ip +ffffffff832c71b8 D dcn3_2_soc +ffffffff832c8000 D dcn3_21_ip +ffffffff832c81b8 D dcn3_21_soc +ffffffff832c9000 d dsc_policy_max_target_bpp_limit +ffffffff832ca000 D DIDTEDCConfig_P12 +ffffffff832ca070 d smu7_profiling +ffffffff832cb000 d cyan_skillfish_table_map +ffffffff832cb080 d cyan_skillfish_message_map +ffffffff832cc000 d navi10_table_map +ffffffff832cc080 d navi10_pwr_src_map +ffffffff832cc090 d navi10_workload_map +ffffffff832cc0d0 d navi10_message_map +ffffffff832ccb20 d navi10_clk_map +ffffffff832ccbe0 d navi10_feature_mask_map +ffffffff832cd000 d sienna_cichlid_message_map +ffffffff832cda50 d sienna_cichlid_table_map +ffffffff832cdad0 d sienna_cichlid_pwr_src_map +ffffffff832cdae0 d sienna_cichlid_workload_map +ffffffff832cdb20 d sienna_cichlid_clk_map +ffffffff832cdbe0 d sienna_cichlid_feature_mask_map +ffffffff832ce000 d vangogh_message_map +ffffffff832cea50 d vangogh_table_map +ffffffff832cead0 d vangogh_workload_map +ffffffff832ceb10 d vangogh_feature_mask_map +ffffffff832cf000 d renoir_table_map +ffffffff832cf080 d renoir_workload_map +ffffffff832cf0c0 d renoir_message_map +ffffffff832cfb10 d renoir_clk_map +ffffffff832d0000 d smu_v13_0_0_message_map +ffffffff832d0a50 d smu_v13_0_0_feature_mask_map +ffffffff832d0e20 d smu_v13_0_0_table_map +ffffffff832d0ea0 d smu_v13_0_0_pwr_src_map +ffffffff832d0eb0 d smu_v13_0_0_workload_map +ffffffff832d0ef0 d smu_v13_0_0_clk_map +ffffffff832d1000 d smu_v13_0_4_message_map +ffffffff832d1a50 d smu_v13_0_4_table_map +ffffffff832d1ad0 d smu_v13_0_4_feature_mask_map +ffffffff832d2000 d smu_v13_0_5_table_map +ffffffff832d2080 d smu_v13_0_5_message_map +ffffffff832d2ad0 d smu_v13_0_5_feature_mask_map +ffffffff832d3000 d smu_v13_0_7_message_map +ffffffff832d3a50 d smu_v13_0_7_feature_mask_map +ffffffff832d3e20 d smu_v13_0_7_table_map +ffffffff832d3ea0 d smu_v13_0_7_pwr_src_map +ffffffff832d3eb0 d smu_v13_0_7_workload_map +ffffffff832d3ef0 d smu_v13_0_7_clk_map +ffffffff832d4000 d yellow_carp_table_map +ffffffff832d4080 d yellow_carp_message_map +ffffffff832d4ad0 d yellow_carp_feature_mask_map +ffffffff832d5000 D pci_conf_lock +ffffffff832d5010 D pci_bus_dma_tag +ffffffff832d5088 D msi_pic +ffffffff832d5118 D msix_pic +ffffffff832d6000 D pchb_cd +ffffffff832d7000 D amas_cd +ffffffff832d8000 D cardslot_cd +ffffffff832d9000 D cardbus_cd +ffffffff832da000 d csdevs +ffffffff832db000 d ral_rt2560_opns +ffffffff832db028 d ral_rt2661_opns +ffffffff832db050 d ral_rt2860_opns +ffffffff832dc000 D pcmcia_cd +ffffffff832dd000 D pcmcia_3cxem556_func0 +ffffffff832dd0b8 D pcmcia_3cxem556_func0_cfe0 +ffffffff832dd158 D pcmcia_megahertz_xjem1144_func0 +ffffffff832dd210 D pcmcia_megahertz_xjem1144_func0_cfe0 +ffffffff832dd2b0 d pcmcia_3cxem556_func1 +ffffffff832dd368 d pcmcia_3cxem556_func1_cfe0 +ffffffff832dd408 d pcmcia_megahertz_xjem1144_func1 +ffffffff832dd4c0 d pcmcia_megahertz_xjem1144_func1_cfe0 +ffffffff832dd560 d pcmcia_sierra_a555_func1 +ffffffff832dd618 d pcmcia_sierra_a555_func1_cfe0 +ffffffff832dd6b8 d pcmcia_sveclancard_func0 +ffffffff832dd770 d pcmcia_sveclancard_func0_cfe0 +ffffffff832de000 D ep_pcmcia_prod +ffffffff832df000 D aic_pcmcia_prod +ffffffff832e0000 D com_pcmcia_prod +ffffffff832e1000 D wdc_pcmcia_pr +ffffffff832e2000 D sm_pcmcia_prod +ffffffff832e3000 D xe_cd +ffffffff832e4000 D pcib_cd +ffffffff832e5000 D amdpcib_cd +ffffffff832e6000 D tcpcib_cd +ffffffff832e7000 D aapic_cd +ffffffff832e8000 D hme_cd +ffffffff832e9000 D isa_cd +ffffffff832ea000 D isadma_cd +ffffffff832eb000 D fdc_cd +ffffffff832ec000 D fd_types +ffffffff832ec1f8 D fd_cd +ffffffff832ed000 D mpu_cd +ffffffff832ee000 D pcppi_cd +ffffffff832ef000 D spkr_cd +ffffffff832f0000 D wbsio_cd +ffffffff832f1000 D schsio_cd +ffffffff832f2000 D it_cd +ffffffff832f3000 D uguru_cd +ffffffff832f4000 D aps_cd +ffffffff832f5000 D isa_bus_dma_tag +ffffffff832f6000 D wsdisplay_cd +ffffffff832f6020 D wsdisplay_cons +ffffffff832f6058 D wsdisplay_defaultscreens +ffffffff832f7000 D wskbd_cd +ffffffff832f7020 D wskbd_default_bell_data +ffffffff832f7030 D wskbd_default_keyrepeat_data +ffffffff832f7040 D wskbd_srcops +ffffffff832f8000 d compose_tab +ffffffff832f9000 D wsmouse_cd +ffffffff832f9020 D wsmouse_srcops +ffffffff832fa000 D wsmux_srcops +ffffffff832fa030 D wsmux_tree_lock +ffffffff832fb000 D vt100_output +ffffffff832fc000 D pckbd_cd +ffffffff832fd000 D pms_cd +ffffffff832fd020 d synaptics_params +ffffffff832fd030 d alps_params +ffffffff832fe000 D skgpio_cd +ffffffff832ff000 D pctr_conf_lock +ffffffff83300000 D ukbd_keymapdata +ffffffff83301000 D usbrev_str +ffffffff83301030 D usb_cd +ffffffff83302000 d usbd_ratecheck.errinterval +ffffffff83303000 D uhub_cd +ffffffff83304000 D uaudio_cd +ffffffff83305000 D uvideo_ctrls +ffffffff833052d8 D uvideo_cd +ffffffff83306000 D utvfu_norm_params +ffffffff83306030 D utvfu_cd +ffffffff83307000 D udl_reg_vals_640x480_60 +ffffffff83307020 D udl_reg_vals_640x480_67 +ffffffff83307040 D udl_reg_vals_640x480_72 +ffffffff83307060 D udl_reg_vals_640x480_75 +ffffffff83307080 D udl_reg_vals_800x480_61 +ffffffff833070a0 D udl_reg_vals_800x600_56 +ffffffff833070c0 D udl_reg_vals_800x600_60 +ffffffff833070e0 D udl_reg_vals_800x600_72 +ffffffff83307100 D udl_reg_vals_800x600_74 +ffffffff83307120 D udl_reg_vals_800x600_75 +ffffffff83307140 D udl_reg_vals_1024x768_60 +ffffffff83307160 D udl_reg_vals_1024x768_70 +ffffffff83307180 D udl_reg_vals_1024x768_75 +ffffffff833071a0 D udl_reg_vals_1280x800_60 +ffffffff833071c0 D udl_reg_vals_1280x960_60 +ffffffff833071e0 D udl_reg_vals_1280x1024_60 +ffffffff83307200 D udl_reg_vals_1280x1024_75 +ffffffff83307220 D udl_reg_vals_1366x768_60 +ffffffff83307240 D udl_reg_vals_1440x900_60 +ffffffff83307260 D udl_reg_vals_1440x900_59 +ffffffff83307280 D udl_reg_vals_1440x900_75 +ffffffff833072a0 D udl_reg_vals_1680x1050_60 +ffffffff833072c0 D udl_reg_vals_1600x1200_60 +ffffffff833072e0 D udl_reg_vals_1920x1080_60 +ffffffff83307300 D udl_null_key_1 +ffffffff83307310 D udl_decomp_table +ffffffff83308510 D udl_cd +ffffffff83308530 D udl_stdscreen +ffffffff83308560 D udl_scrlist +ffffffff83308568 D udl_screenlist +ffffffff83308578 D udl_accessops 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umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_endpoints +ffffffff8330a4d0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_desc +ffffffff8330a4f0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_endpoints +ffffffff8330a500 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_desc +ffffffff8330a520 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_endpoints +ffffffff8330a530 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_desc +ffffffff8330a550 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_endpoints +ffffffff8330a560 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_desc +ffffffff8330a580 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_endpoints +ffffffff8330a590 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_desc +ffffffff8330a5b0 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_endpoints +ffffffff8330a5c0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_desc +ffffffff8330a5e0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_endpoints +ffffffff8330a5f0 d umq_ROLAND_ROLAND_U8_2_fixed_ep_desc +ffffffff8330a610 d umq_ROLAND_ROLAND_U8_2_fixed_ep_endpoints +ffffffff8330a620 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_desc +ffffffff8330a640 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_endpoints +ffffffff8330a650 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_desc +ffffffff8330a670 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_endpoints +ffffffff8330a680 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_desc +ffffffff8330a6a0 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_endpoints +ffffffff8330a6b0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_desc +ffffffff8330a6d0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_endpoints +ffffffff8330a6e0 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_desc +ffffffff8330a700 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_endpoints +ffffffff8330a710 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_desc +ffffffff8330a730 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_endpoints +ffffffff8330a740 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_desc +ffffffff8330a760 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_endpoints +ffffffff8330a770 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_desc +ffffffff8330a790 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_endpoints +ffffffff8330a7a0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_desc +ffffffff8330a7c0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_endpoints +ffffffff8330a7d0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_desc +ffffffff8330a7f0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_endpoints +ffffffff8330b000 D ucom_cd +ffffffff8330c000 D ugen_cd +ffffffff8330d000 D uhidev_cd +ffffffff8330d020 d uhidev_use_rdesc.reportbuf +ffffffff8330e000 D uhid_cd +ffffffff8330f000 D fido_cd +ffffffff83310000 D ujoy_cd +ffffffff83311000 D ukbd_cd +ffffffff83312000 D ums_cd +ffffffff83312020 d ums_fix_elecom_descriptor.match +ffffffff83313000 D umt_cd +ffffffff83314000 D def_scale +ffffffff83314020 D uts_cd +ffffffff83315000 D ubcmtp_cd +ffffffff83316000 D ucycom_cd +ffffffff83317000 D uslhcom_cd +ffffffff83318000 D ulpt_fwdevs +ffffffff83318060 D ulpt_cd +ffffffff83318080 D ulptusein +ffffffff83319000 D umass_cd +ffffffff83319020 d umass_bbb_transfer.dCBWtag +ffffffff8331a000 D uthum_cd +ffffffff8331b000 D ugold_cd +ffffffff8331b020 d cmd_init +ffffffff8331b028 d cmd_type +ffffffff8331b030 d cmd_data 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maxds_cd +ffffffff8336c000 D adt_chips +ffffffff8336c160 D worklist +ffffffff8336c1a0 D adt_cd +ffffffff8336d000 D admcts_cd +ffffffff8336e000 D wbng_cd +ffffffff8336f000 D nvt_cd +ffffffff83370000 D adl_worklist +ffffffff83370138 D adl_cd +ffffffff83371000 D andl_cd +ffffffff83372000 D sdtemp_cd +ffffffff83373000 D lisa_cd +ffffffff83374000 D ihidev_cd +ffffffff83375000 D ikbd_cd +ffffffff83376000 D ims_cd +ffffffff83377000 D imt_cd +ffffffff83378000 D iatp_cd +ffffffff83379000 D bgw_cd +ffffffff8337a000 D icc_cd +ffffffff8337b000 D gpio_cd +ffffffff8337c000 D acpi_cd +ffffffff8337c020 D acpi_pcidevs +ffffffff8337c030 D acpi_pcirootdevs +ffffffff8337c040 D acpi_taskq +ffffffff8337c050 d acpi_indicator.save_led_state +ffffffff8337c060 d acpi_getprop.prop_guid +ffffffff8337c070 d acpi_getpropint.prop_guid +ffffffff8337c080 D acpi_skip_hids +ffffffff8337c0f0 D acpi_isa_hids +ffffffff8337d000 D aml_intlen +ffffffff8337d010 D aml_table +ffffffff8337daf0 d osstring +ffffffff8337db10 D aml_defobj +ffffffff8337dca0 D aml_valid_osi +ffffffff8337dd68 D acpi_max_osi +ffffffff8337dd70 D aml_regionspace +ffffffff8337f000 D acpitimer_cd +ffffffff8337f020 d acpi_timecounter +ffffffff83380000 D acpiac_cd +ffffffff83380020 D acpiac_hids +ffffffff83381000 D acpibat_cd +ffffffff83381020 D acpibat_hids +ffffffff83382000 D acpibtn_cd +ffffffff83382020 D acpibtn_hids +ffffffff83383000 D acpicmos_cd +ffffffff83383020 D acpicmos_hids +ffffffff83384000 D acpicpu_cd +ffffffff83384020 D acpicpu_hids +ffffffff83384030 d acpicpu_set_pdc.cpu_oscuuid +ffffffff83385000 D acpihpet_cd +ffffffff83385020 d hpet_timecounter +ffffffff83386000 D acpiec_cd +ffffffff83386020 D acpiec_hids +ffffffff83387000 D acpitz_cd +ffffffff83387020 D acpitz_perflevel +ffffffff83388000 D acpimadt_cd +ffffffff83389000 D acpimcfg_cd +ffffffff8338a000 D acpiprt_map_list +ffffffff8338a010 D acpiprt_cd +ffffffff8338a030 D acpiprt_pri +ffffffff8338b000 D acpidmar_force_cm +ffffffff8338b008 D acpidmar_cd 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tipmic_thermal_regmap +ffffffff8339c030 D tipmic_power_regmap +ffffffff8339d000 D ccpmic_cd +ffffffff8339d020 D ccpmic_thermal_regmap +ffffffff8339d023 D ccpmic_power_regmap +ffffffff8339e000 D com_hids +ffffffff8339f000 D sdhc_hids +ffffffff833a0000 D dwiic_hids +ffffffff833a0050 D ihidev_hids +ffffffff833a0070 D iatp_hids +ffffffff833a0090 d dwiic_acpi_found_ihidev.i2c_hid_guid +ffffffff833a1000 D acpicbkbd_cd +ffffffff833a1020 D acpicbkbd_hids +ffffffff833a2000 D acpials_cd +ffffffff833a2020 D acpials_hids +ffffffff833a3000 D tpm_cd +ffffffff833a3020 D tpm_hids +ffffffff833a4000 D acpihve_cd +ffffffff833a5000 D acpisbs_cd +ffffffff833a5020 D acpisbs_hids +ffffffff833a6000 D acpisurface_cd +ffffffff833a6020 D acpisurface_hids +ffffffff833a7000 D ipmi_acpi_hids +ffffffff833a8000 D amdgpio_cd +ffffffff833a8020 D amdgpio_hids +ffffffff833a9000 D acpihid_cd +ffffffff833a9020 D acpihid_hids +ffffffff833a9030 d acpihid_guid +ffffffff833aa000 D acpipci_cd +ffffffff833aa020 D acpipci_hids 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gdt_exec_ccb.__level +ffffffff833c300c B gdt_wait_index +ffffffff833c3010 B gdt_wait_gdt +ffffffff833c4000 B sili_error_pmp_ports +ffffffff833c5000 B ncr53c9x_debug +ffffffff833c5008 b ecb_iopool +ffffffff833c5048 b ecb_pool_initialized +ffffffff833c5050 b ecb_pool +ffffffff833c51f8 B sdebug +ffffffff833c6000 B epic_copy_small +ffffffff833c7000 B comconsaddr +ffffffff833c7008 B comconsiot +ffffffff833c7010 B comconsioh +ffffffff833c7018 B comconsfreq +ffffffff833c701c B commajor +ffffffff833c7020 B comconsunit +ffffffff833c7024 B comcons_reg_shift +ffffffff833c7028 B comconsattached +ffffffff833c702c B comcons_reg_width +ffffffff833c8000 B pckbc_console +ffffffff833c8004 B pckbc_console_attached +ffffffff833c8008 B pckbc_consdata +ffffffff833c80e0 b pckbc_cons_slotdata +ffffffff833c9000 b cy_poll.counter +ffffffff833ca000 B atw_xindiv2 +ffffffff833cb000 B rtw_rfprog_fallback +ffffffff833cb004 B rtw_do_chip_reset +ffffffff833cc000 b malo_cmd_string.cmd_buf +ffffffff833cd000 B uhcixfer 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stat_inode_bitmap +ffffffff834dc868 B stat_direct_blk_ptrs +ffffffff834dc86c B stat_dir_entry +ffffffff834dc870 B stat_sync_limit_hit +ffffffff834dc874 B stat_worklist_push +ffffffff834dc878 B stat_ino_limit_push +ffffffff834dc87c B stat_ino_limit_hit +ffffffff834dc880 B stat_countp +ffffffff834dc888 B stat_blk_limit_push +ffffffff834dc88c B stat_blk_limit_hit +ffffffff834dc890 b clear_remove.next +ffffffff834dc894 b clear_inodedeps.next +ffffffff834dc898 B softdep_freequeue +ffffffff834dd000 b mfs_minor +ffffffff834de000 B ufs_mindirhashsize +ffffffff834de004 B ufs_dirhashmem +ffffffff834de008 B ufs_dirhashmaxmem +ffffffff834de010 B ufsdirhash_mtx +ffffffff834de020 B ufsdirhash_pool +ffffffff834de1c8 B ufsdirhash_list +ffffffff834de1d8 B ufs_dirhashcheck +ffffffff834de1e0 B ufsdirhash_key +ffffffff834df000 B ihashkey +ffffffff834df010 B ihashtbl +ffffffff834df018 B ihash +ffffffff834e0000 B dqhash +ffffffff834e0008 B dqhashtbl +ffffffff834e0010 B dqhashkey +ffffffff834e0020 B dqfreelist +ffffffff834e0030 B numdquot +ffffffff834e1000 b ufs_init.done +ffffffff834e2000 B ext2gennumber +ffffffff834e3000 B ext2fs_inode_pool +ffffffff834e31a8 B ext2fs_dinode_pool +ffffffff834e4000 B uaddr_pool +ffffffff834e41a8 B uaddr_bestfit_pool +ffffffff834e4350 B uaddr_pivot_pool +ffffffff834e44f8 B uaddr_rnd_pool +ffffffff834e46a0 B uaddr_kbootstrap +ffffffff834e5000 B uvm_amap_chunk_pool +ffffffff834e51a8 B uvm_amap_pool +ffffffff834e5350 b amap_small_pool_names +ffffffff834e53e0 B uvm_small_amap_pool +ffffffff834e6e60 B amap_list +ffffffff834e7000 B uvm_anon_pool +ffffffff834e8000 B uao_swhash_elt_pool +ffffffff834e81a8 b uao_create.kernel_object_store +ffffffff834e81f0 b uao_create.bootstrap_kernel_object_lock +ffffffff834e8200 b uao_create.kobj_alloced +ffffffff834e8208 B uvm_aobj_pool +ffffffff834e83b0 b uao_list +ffffffff834e9000 B udv_list +ffffffff834e9008 B udv_lock +ffffffff834ea000 b uvmadvice +ffffffff834eb000 b uvm_pause.toggle +ffffffff834ec000 B uvmexp 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icmp6errpps_count +ffffffff83526000 b ip6send_mq +ffffffff83526030 B ip6counters +ffffffff83526040 B ip6_soiikey +ffffffff83527000 B ip6_mrouter_ver +ffffffff83527010 B ip6_mrouter +ffffffff83527810 B ip6_mrouterq +ffffffff83527848 B mrt6stat +ffffffff835278b0 B ip6_mrtproto +ffffffff83528000 B ip6_id_ctx +ffffffff83529000 b mld6_init.hbh_buf +ffffffff83529008 B mld6_timers_are_running +ffffffff83529010 b ip6_opts +ffffffff8352a000 B nd6_maxnudhint +ffffffff8352a004 B nd6_debug +ffffffff8352a008 B nd6_list +ffffffff8352a018 B nd6_pool +ffffffff8352a1c0 B nd6_expire_task +ffffffff8352a1f0 B nd6_timer_to +ffffffff8352a238 B nd6_slowtimo_ch +ffffffff8352a280 B nd6_expire_timeout +ffffffff8352a2c8 B nd6_inuse +ffffffff8352b000 B rawin6pcbtable +ffffffff8352b078 B rip6counters +ffffffff8352c000 B pkptable +ffffffff8352c038 B pkpcb_pool +ffffffff8352c1e0 b nregistered +ffffffff8352c1e4 b npromisc +ffffffff8352d000 B cpu_idle_cycle_fcn +ffffffff8352d008 B setperf_prio +ffffffff8352d00c B cpureset_delay +ffffffff8352d010 B ssym +ffffffff8352d018 B esym +ffffffff8352d020 B bootdev +ffffffff8352d024 B biosbasemem +ffffffff8352d028 B bootapiver +ffffffff8352d02c B safepri +ffffffff8352d030 B exec_map +ffffffff8352d038 B phys_map +ffffffff8352d040 B allowaperture +ffffffff8352d048 B msgbuf_paddr +ffffffff8352d050 B msgbuf_vaddr +ffffffff8352d058 B physmem +ffffffff8352d060 B idt_vaddr +ffffffff8352d068 B idt_paddr +ffffffff8352d070 B bios_diskinfo +ffffffff8352d078 B bios_cksumlen +ffffffff8352d07c B kbd_reset +ffffffff8352d080 B forceukbd +ffffffff8352d084 B dumpsize +ffffffff8352d088 B dumplo +ffffffff8352d090 B mem_cluster_cnt +ffffffff8352d0a0 B mem_clusters +ffffffff8352d1a0 B dumpmem_vaddr +ffffffff8352d1a8 B dumppcb +ffffffff8352d528 B dumpmem_sz +ffffffff8352d530 B proc0paddr +ffffffff8352d538 B idt +ffffffff8352d540 b cpu_init_extents.already_done +ffffffff8352d548 B lo32_vaddr +ffffffff8352d550 B lo32_paddr +ffffffff8352d558 B tramp_pdirpa +ffffffff8352d560 B early_pte_pages +ffffffff8352d570 B bootinfo +ffffffff8352e570 B avail_start +ffffffff8352e578 B avail_end +ffffffff8352e580 B bios_memmap +ffffffff8352e588 B bios_efiinfo +ffffffff8352e590 B mmap +ffffffff8352e598 B kern_end +ffffffff8352e5a0 B dumpmem_paddr +ffffffff8352e5b0 B idt_allocmap +ffffffff8352e6b0 B cpuresetfn +ffffffff8352e6b8 B bios_bootmac +ffffffff8352e6c0 B bios_ucode +ffffffff8352e6c8 B amd64_delay_quality +ffffffff8352e6d0 B dumpmem_low +ffffffff8352e6d8 B dumpmem_high +ffffffff8352e6e0 B cpu_class +ffffffff8352f000 B cpuspeed +ffffffff8352f004 B amd64_has_xcrypt +ffffffff8352f010 B cpu_model +ffffffff8352f040 B setperf_setup +ffffffff8352f048 B has_rdrand +ffffffff8352f04c B has_rdseed +ffffffff8352f050 B amd64_has_pclmul +ffffffff8352f054 B amd64_has_aesni +ffffffff83530000 B tsc_is_invariant +ffffffff83530008 B tsc_frequency +ffffffff83530010 B tsc_recalibrate +ffffffff83530040 B tsc_bp_status +ffffffff835300c0 B tsc_test_cycles +ffffffff835300c8 B tsc_test_rounds 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B urlphydebug -ffffffff8354b000 b scsi_init.scsi_init_done -ffffffff8354b008 B scsi_xfer_pool -ffffffff8354b1b0 B scsi_plug_pool -ffffffff8354b360 b scsi_decode_sense.rqsbuf -ffffffff8354c000 b sddoingadump -ffffffff8354d000 b wddoingadump -ffffffff8354d004 b wddumprecalibrated -ffffffff8354e000 B mp_verbose -ffffffff8354e004 B isa_has_been_seen -ffffffff8354e008 B mp_busses -ffffffff8354e010 B mp_nbusses -ffffffff8354e018 B mp_intrs -ffffffff8354e020 B mp_nintrs -ffffffff8354e028 B mp_isa_bus -ffffffff8354e030 B mp_eisa_bus -ffffffff8354f000 B smbios_entry -ffffffff8354f020 B smbios_bios_date -ffffffff8354f060 B smbios_board_vendor -ffffffff8354f0a0 B smbios_board_prod -ffffffff8354f0e0 B smbios_board_serial -ffffffff83550000 b mp_fp_map -ffffffff83550028 B mp_fps -ffffffff83550030 B mp_cth -ffffffff83550038 B mpbios_scanned -ffffffff83550040 b mp_cfg_table_map.0 -ffffffff83550048 b mp_cfg_table_map.1 -ffffffff83551000 B cpuid_level -ffffffff83551010 B cpu_vendor -ffffffff83551020 B cpu_id -ffffffff83551024 B cpu_ebxfeature -ffffffff83551028 B cpu_ecxfeature -ffffffff8355102c B cpu_feature -ffffffff83551030 B cpu_perf_eax -ffffffff83551034 B cpu_perf_ebx -ffffffff83551038 B cpu_perf_edx -ffffffff8355103c B cpu_apmi_edx -ffffffff83551040 B ecpu_ecxfeature -ffffffff83551044 B cpu_meltdown -ffffffff83551048 b replacesmap.replacedone -ffffffff8355104c b replacemeltdown.replacedone -ffffffff83551050 b replacemds.replacedone -ffffffff83551054 B cpu_mwait_states -ffffffff83551058 B cpu_mwait_size -ffffffff83551060 B rdrand_tmo -ffffffff835510a8 b replacexsave.replacedone -ffffffff83552000 B x2apic_enabled -ffffffff83552008 b lapic_boot_init.clk_irq -ffffffff83552010 b lapic_boot_init.ipi_irq -ffffffff83552018 B clk_count -ffffffff83552050 B ipi_count -ffffffff83552088 B lapic_per_second -ffffffff83552090 B lapic_timer_nsec_max -ffffffff83552098 B lapic_timer_nsec_cycle_ratio -ffffffff83553000 B ioapic_bsp_id -ffffffff83553004 B nioapics -ffffffff83553008 B ioapics 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isa_mem_head +ffffffff836c9008 B isa_dev +ffffffff836c9010 B isadma_dmam +ffffffff836ca000 b spkr_attached +ffffffff836ca008 b ppicookie +ffffffff836ca010 b spkr_active +ffffffff836ca018 b spkr_inbuf +ffffffff836ca020 b octave +ffffffff836ca024 b whole +ffffffff836ca028 b fill +ffffffff836ca02c b value +ffffffff836ca030 b octtrack +ffffffff836ca034 b octprefix +ffffffff836cb000 B it_softc_list +ffffffff836cc000 B aps_timeout +ffffffff836cd000 B intrtype +ffffffff836cd040 B intrhand +ffffffff836cd0c0 B isa_dma_stats_loads +ffffffff836cd0c8 B isa_dma_stats_bounces +ffffffff836cd0d0 B isa_dma_stats_nbouncebufs +ffffffff836cd0e0 B intrlevel +ffffffff836ce000 B wsdisplay_console_conf +ffffffff836ce028 B wsdisplay_console_initted +ffffffff836ce030 B wsdisplay_console_device +ffffffff836ce038 B wsdisplay_clearonclose +ffffffff836ce03c B wsdisplay_cons_pollmode +ffffffff836ce040 B wsdisplay_cons_kbd_pollc +ffffffff836ce048 B ws_get_param +ffffffff836ce050 B ws_set_param +ffffffff836cf000 b wskbd_console_data +ffffffff836cf040 b wskbd_console_initted +ffffffff836cf048 b wskbd_console_device +ffffffff836cf050 B wskbd_get_backlight +ffffffff836cf058 B wskbd_set_backlight +ffffffff836cf060 b wskbd_cngetc.num +ffffffff836cf064 b wskbd_cngetc.pos +ffffffff836d0000 b compose_tab_inorder +ffffffff836d1000 B nwsmux +ffffffff836d1008 B wsmuxdevs +ffffffff836d2000 B wsemul_vt100_console_emuldata +ffffffff836d3000 B pckbd_consdata +ffffffff836d3038 B pckbd_bell_fn +ffffffff836d3040 B pckbd_bell_fn_arg +ffffffff836d4000 b wscninit.initted +ffffffff836d5000 B pctr_isamd +ffffffff836d5004 B pctr_isintel +ffffffff836d5008 B pctr_intel_cap +ffffffff836d5010 B pctr_fn +ffffffff836d6000 b nvram_initialized +ffffffff836d7000 B hidkbd_is_console +ffffffff836d7008 B hidkbd_bell_fn +ffffffff836d7010 B hidkbd_bell_fn_arg +ffffffff836d8000 B usb_task_thread_proc +ffffffff836d8008 B usb_abort_task_thread_proc +ffffffff836d8010 b usb_nbuses +ffffffff836d8018 B usbpalock +ffffffff836d8028 B usb_abort_tasks +ffffffff836d8038 B usb_explore_tasks +ffffffff836d8048 B usb_generic_tasks +ffffffff836d8058 b usb_run_abort_tasks +ffffffff836d805c b usb_run_tasks +ffffffff836d8060 B explore_pending +ffffffff836d9000 B usb_blk_freelist +ffffffff836d9008 B usb_blk_nfree +ffffffff836d9010 B usb_frag_freelist +ffffffff836da000 b usbd_errstr.buffer +ffffffff836da008 b usb_delay_ms.usb_delay_wchan +ffffffff836da010 b usbd_probe_and_attach.cookie +ffffffff836db000 b t_wait +ffffffff836db004 b t_trust +ffffffff836dc000 B umb_session_id +ffffffff836dc010 b umb_val2descr.sval +ffffffff836dd000 b probe_ic +ffffffff836dd008 b probe_addr +ffffffff836dd010 b probe_val +ffffffff836dd110 B skip_fc +ffffffff836dd118 B ignore_addrs +ffffffff836dd120 b iic_dump.iicvalcnt +ffffffff836de000 B acpi_softc +ffffffff836de008 B acpiwqpool +ffffffff836de1b0 B acpi_enabled +ffffffff836de1b4 b acpi_maptable.tblid +ffffffff836de1b8 b acpi_add_device.nacpicpus +ffffffff836de1bc B acpi_force_bm +ffffffff836de1c0 B mouse_has_softbtn +ffffffff836de1c4 B acpi_evindex +ffffffff836de1c8 B acpi_poll_enabled +ffffffff836de1cc B acpi_hasprocfvs +ffffffff836de1d0 B acpi_haspci +ffffffff836df000 B aml_root +ffffffff836df060 B aml_lastscope +ffffffff836df068 B aml_ophash +ffffffff836df070 b aml_mnem.mnemstr +ffffffff836df090 B aml_notify_list +ffffffff836df098 B acpi_nalloc +ffffffff836df0a0 b acpi_sleep.acpinowait +ffffffff836df0b0 b aml_nodename.namebuf +ffffffff836df130 b aml_getname.namebuf +ffffffff836df1b0 b aml_getname.p +ffffffff836df1b8 b global_lock_count +ffffffff836df1c0 b aml_eisaid.id +ffffffff836df1c8 B aml_global_lock +ffffffff836df1d0 b aml_mapresource.map +ffffffff836df210 b aml_val_to_string.buffer +ffffffff836df310 B aml_error +ffffffff836df314 B odp +ffffffff836df318 B maxdp +ffffffff836df31c B aml_busy +ffffffff836e0000 B scope +ffffffff836e1000 B acpibtn_lids +ffffffff836e2000 B cst_stats +ffffffff836e3000 B acpihpet_attached +ffffffff836e4000 b acpiec_wait.acpiecnowait +ffffffff836e5000 B acpitz_cpu_setperf +ffffffff836e6000 B acpimadt_busses +ffffffff836e9000 B acpimadt_isa_bus +ffffffff836e9030 b lapic_map +ffffffff836ea000 B acpidmar_ddb +ffffffff836ea010 b dmar_bdf.bdf +ffffffff836ea030 B acpidmar_sc +ffffffff836ea038 B domain_map_page +ffffffff836ea040 b dom_bdf.mmm +ffffffff836ea070 b iommu_init.niommu +ffffffff836ea078 b acpidmar_pci_attach.dom +ffffffff836ea080 b sid_flag +ffffffff8372a080 b ivhd_showpage.show +ffffffff8372a084 b ivhd_iommu_init.niommu +ffffffff8372a088 b acpidmar_intr.ofe.0 +ffffffff8372a090 b acpidmar_intr.ofe.1 +ffffffff8372b000 b dwiic_i2c_intr_string.irqstr +ffffffff8372c000 B acpihve_attached +ffffffff8372d000 B efi_jmpbuf +ffffffff8372e000 B l1tf_flush_region +ffffffff8372e008 B vm_pool +ffffffff8372e1b0 B vcpu_pool +ffffffff8372e358 B vmm_softc +ffffffff8372f000 B sdmmc_verbose +ffffffff83730000 B utc_offset +ffffffff83730008 B bufpages +ffffffff83730010 B utsname +ffffffff83731000 B mountroot +ffffffff83732000 B __kernel_bss_end ffffffff83800000 B _end ffffffff83800000 B end