--- 7.2/2023-02-03T19:52:06Z/2023-01-06T00:00:00Z/nm-bsd-ot14.txt Sat Feb 4 16:06:34 2023 +++ 7.2/2023-02-03T19:52:06Z/2023-01-07T00:00:00Z/nm-bsd-ot14.txt Sat Feb 4 18:46:02 2023 @@ -2,14 +2,14 @@ 00011006 A mp_pdirpa 0001419d A acpi_pdirpa 01000000 A __kernel_phys_base -02513000 T __kernel_kutext_phys -02517000 C __kernel_cptext_phys -02518000 C __kernel_rodata_phys -02dc8000 R __kernel_kutext_page_phys -02dca000 C __kernel_randomdata_phys -0308c000 R __kernel_data_phys -033bb000 D __kernel_kudata_phys -033bc000 C __kernel_bss_phys +02514000 T __kernel_kutext_phys +02518000 C __kernel_cptext_phys +02519000 C __kernel_rodata_phys +02dc9000 R __kernel_kutext_page_phys +02dcb000 C __kernel_randomdata_phys +0308d000 R __kernel_data_phys +033bc000 D __kernel_kudata_phys +033bd000 C __kernel_bss_phys 03800000 B __kernel_phys_end 80000000 A __kernel_virt_to_phys ffffffff80000000 A __kernel_base @@ -4346,24807 +4346,24799 @@ ffffffff812016b0 T pf_match_gid ffffffff812017a0 T pf_match_tag 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mpe_clone_destroy +ffffffff813d2270 T mpeattach +ffffffff813d2290 T mpe_ioctl +ffffffff813d2680 T mpe_output +ffffffff813d28b0 T mpe_start +ffffffff813d2a10 T mpe_input +ffffffff813d2bd0 T mpe_set_label +ffffffff813d3000 T mpw_clone_create +ffffffff813d3170 T mpw_clone_destroy +ffffffff813d3280 T mpwattach +ffffffff813d32a0 T mpw_ioctl +ffffffff813d3be0 T mpw_output +ffffffff813d3de0 T mpw_start +ffffffff813d40e0 T mpw_set_route +ffffffff813d41a0 t mpw_set_neighbor +ffffffff813d5000 T mpip_clone_create +ffffffff813d51b0 T mpip_clone_destroy +ffffffff813d52b0 T mpipattach +ffffffff813d52d0 T mpip_ioctl +ffffffff813d59a0 T mpip_output +ffffffff813d5d70 T mpip_start +ffffffff813d7000 T bpeattach +ffffffff813d7020 T bpe_input +ffffffff813d71b0 t bpe_tree_RBT_COMPARE +ffffffff813d7200 t bpe_clone_create +ffffffff813d73c0 t bpe_clone_destroy +ffffffff813d7460 t bpe_link_hook +ffffffff813d74f0 t bpe_detach_hook +ffffffff813d7540 t bpe_ioctl +ffffffff813d7e20 t bpe_start +ffffffff813d8060 t bpe_eb_port_eq +ffffffff813d80b0 t bpe_eb_port_take +ffffffff813d8110 t bpe_eb_port_rele +ffffffff813d8130 t bpe_eb_port_ifname +ffffffff813d8150 t bpe_eb_port_sa +ffffffff813d81a0 t bpe_down +ffffffff813d9000 T vether_clone_create +ffffffff813d9120 T vether_clone_destroy +ffffffff813d9190 T vether_media_change +ffffffff813d91c0 T vether_media_status +ffffffff813d9200 T vetherattach +ffffffff813d9220 T vetherioctl +ffffffff813d9330 T vetherqstart +ffffffff813da000 T pair_clone_create +ffffffff813da160 T pair_clone_destroy +ffffffff813da240 T pair_media_change +ffffffff813da270 T pair_media_status +ffffffff813da2d0 T pair_link_state +ffffffff813da350 T pairattach +ffffffff813da370 T pairioctl +ffffffff813da6d0 T pairstart +ffffffff813db000 T filt_pppx_rdetach +ffffffff813db050 T filt_pppx_read +ffffffff813db0a0 T filt_pppx_wdetach +ffffffff813db0f0 T filt_pppx_write +ffffffff813db120 T pppx_dev_lookup +ffffffff813db170 T pppx_dev2pxd +ffffffff813db1c0 T pppxattach +ffffffff813db200 T pppxopen +ffffffff813db310 T pppxread +ffffffff813db480 T pppxwrite +ffffffff813db740 T pppxioctl +ffffffff813db8b0 T pppx_add_session +ffffffff813dbcb0 T pppx_del_session +ffffffff813dbd50 T pppx_set_session_descr +ffffffff813dbe70 T pppxkqfilter +ffffffff813dbf40 T pppxclose +ffffffff813dc020 T pppx_if_destroy +ffffffff813dc100 T pppx_if_next_unit +ffffffff813dc180 T pppx_if_find_locked +ffffffff813dc1e0 T pppx_if_qstart +ffffffff813dc280 T pppx_if_output +ffffffff813dc4a0 T pppx_if_ioctl +ffffffff813dc540 T pppacattach +ffffffff813dc550 T pppacopen +ffffffff813dc760 t pppac_output +ffffffff813dc7d0 t pppac_qstart +ffffffff813dca00 t pppac_ioctl +ffffffff813dcaa0 T pppacread +ffffffff813dcbf0 T pppacwrite +ffffffff813dce10 T pppacioctl +ffffffff813dcfa0 T pppackqfilter +ffffffff813dd070 T pppacclose +ffffffff813dd1c0 t pppx_ifs_RBT_COMPARE +ffffffff813dd1e0 t filt_pppac_rdetach +ffffffff813dd230 t filt_pppac_read +ffffffff813dd280 t filt_pppac_wdetach +ffffffff813dd2d0 t filt_pppac_write +ffffffff813de000 T vxlanattach +ffffffff813de020 t vxlan_clone_create +ffffffff813de200 t vxlan_clone_destroy +ffffffff813de2b0 t vxlan_detach_hook +ffffffff813de310 t vxlan_send +ffffffff813de680 t vxlan_ioctl +ffffffff813df870 t vxlan_output +ffffffff813df910 t vxlan_enqueue +ffffffff813df980 t vxlan_start +ffffffff813df9a0 t vxlan_eb_port_eq +ffffffff813df9f0 t vxlan_eb_port_take +ffffffff813dfa50 t vxlan_eb_port_rele +ffffffff813dfa70 t vxlan_eb_port_ifname +ffffffff813dfa90 t vxlan_eb_port_sa +ffffffff813dfb00 t vxlan_down +ffffffff813dfd30 t vxlan_tep_del_addr +ffffffff813dfea0 t vxlan_encap_ipv4 +ffffffff813dff40 t vxlan_send_ipv4 +ffffffff813e0010 t vxlan_encap_ipv6 +ffffffff813e0100 t vxlan_send_ipv6 +ffffffff813e01d0 t vxlan_tep_add_addr +ffffffff813e0510 t vxlan_input +ffffffff813e07c0 t vxlan_peers_RBT_COMPARE +ffffffff813e1000 T wg_clone_create +ffffffff813e14d0 T wg_clone_destroy +ffffffff813e16a0 T wg_peer_create +ffffffff813e1a60 T wg_timers_init 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ratelimit_deinit +ffffffff813eb310 T cookie_checker_update +ffffffff813eb480 T cookie_checker_deinit +ffffffff813eb4b0 T cookie_checker_create_payload +ffffffff813eb570 t cookie_checker_make_cookie +ffffffff813eb700 T cookie_maker_consume_payload +ffffffff813eb7d0 T cookie_maker_mac +ffffffff813eb960 T cookie_checker_validate_macs +ffffffff813ebb30 t ratelimit_allow +ffffffff813ec000 T parity +ffffffff813ec050 T stoeplitz_random_seed +ffffffff813ec0c0 T stoeplitz_init +ffffffff813ec250 T stoeplitz_cache_init +ffffffff813ec350 T stoeplitz_hash_ip4 +ffffffff813ec390 T stoeplitz_hash_ip4port +ffffffff813ec3e0 T stoeplitz_hash_ip6 +ffffffff813ec440 T stoeplitz_hash_ip6port +ffffffff813ec4a0 T stoeplitz_hash_eaddr +ffffffff813ec4f0 T stoeplitz_to_key +ffffffff813ed000 T ieee80211_begin_bgscan +ffffffff813ed0c0 T ieee80211_bgscan_timeout +ffffffff813ed180 T ieee80211_channel_init +ffffffff813ed370 T ieee80211_chan2ieee +ffffffff813ed3f0 T ieee80211_ifattach +ffffffff813ed590 T ieee80211_setbasicrates +ffffffff813ed660 T ieee80211_setmode +ffffffff813ed900 T ieee80211_ifdetach +ffffffff813ed970 T ieee80211_mhz2ieee +ffffffff813eda10 T ieee80211_ieee2mhz +ffffffff813eda80 T ieee80211_configure_ampdu_tx +ffffffff813edad0 T ieee80211_media_init +ffffffff813ee4a0 T ieee80211_rate2media +ffffffff813ee860 T ieee80211_media_status +ffffffff813eea70 T ieee80211_findrate +ffffffff813eeae0 T ieee80211_media_change +ffffffff813ef060 T ieee80211_media2mcs +ffffffff813ef0c0 T ieee80211_media2rate +ffffffff813ef110 T ieee80211_mcs2media +ffffffff813ef190 T ieee80211_watchdog +ffffffff813ef2b0 T ieee80211_min_basic_rate +ffffffff813ef3a0 T ieee80211_max_basic_rate +ffffffff813ef460 T ieee80211_next_mode +ffffffff813ef560 T ieee80211_chan2mode +ffffffff813ef5f0 T ieee80211_rate2plcp +ffffffff813ef6e0 T ieee80211_plcp2rate +ffffffff813f0000 T ieee80211_amrr_node_init +ffffffff813f0040 T ieee80211_amrr_choose +ffffffff813f1000 T ieee80211_crypto_attach +ffffffff813f1090 T ieee80211_set_key +ffffffff813f1130 T ieee80211_delete_key +ffffffff813f11a0 T ieee80211_crypto_detach +ffffffff813f1260 T ieee80211_crypto_clear_groupkeys +ffffffff813f13a0 T ieee80211_cipher_keylen +ffffffff813f1400 T ieee80211_get_txkey +ffffffff813f1480 T ieee80211_get_rxkey +ffffffff813f1550 T ieee80211_encrypt +ffffffff813f15d0 T ieee80211_decrypt +ffffffff813f1740 T ieee80211_prf +ffffffff813f1860 T ieee80211_kdf +ffffffff813f19c0 T ieee80211_derive_ptk +ffffffff813f1b30 T ieee80211_derive_pmkid +ffffffff813f1c50 T ieee80211_eapol_key_mic +ffffffff813f1d80 T ieee80211_eapol_key_check_mic +ffffffff813f1e00 T ieee80211_eapol_key_encrypt +ffffffff813f1fb0 T ieee80211_eapol_key_decrypt +ffffffff813f20c0 T ieee80211_pmksa_add +ffffffff813f2200 T ieee80211_pmksa_find +ffffffff813f3000 T ieee80211_bip_set_key +ffffffff813f3080 T ieee80211_bip_delete_key +ffffffff813f30f0 T ieee80211_bip_encap +ffffffff813f32f0 T ieee80211_bip_decap +ffffffff813f4000 T ieee80211_ccmp_set_key +ffffffff813f4080 T ieee80211_ccmp_delete_key +ffffffff813f40f0 T ieee80211_ccmp_encrypt +ffffffff813f45b0 t ieee80211_ccmp_phase1 +ffffffff813f4940 T ieee80211_ccmp_get_pn +ffffffff813f4a50 T ieee80211_ccmp_decrypt +ffffffff813f5000 T ieee80211_tkip_set_key +ffffffff813f50a0 T ieee80211_tkip_delete_key +ffffffff813f5110 T ieee80211_tkip_mic +ffffffff813f5290 T ieee80211_tkip_encrypt +ffffffff813f56d0 t Phase1 +ffffffff813f5860 t Phase2 +ffffffff813f5af0 T ieee80211_tkip_get_tsc +ffffffff813f5bf0 T ieee80211_tkip_decrypt +ffffffff813f60f0 T ieee80211_michael_mic_failure +ffffffff813f6280 T ieee80211_michael_mic_failure_timeout +ffffffff813f62b0 t ieee80211_tkip_deauth +ffffffff813f7000 T ieee80211_wep_set_key +ffffffff813f7060 T ieee80211_wep_delete_key +ffffffff813f70d0 T ieee80211_wep_encrypt +ffffffff813f7460 T ieee80211_wep_decrypt +ffffffff813f8000 T ieee80211_get_hdrlen +ffffffff813f8090 T ieee80211_input_hwdecrypt +ffffffff813f8260 T ieee80211_inputm +ffffffff813f8d50 T ieee80211_input_ba +ffffffff813f9030 T ieee80211_amsdu_decap +ffffffff813f9310 T ieee80211_decap +ffffffff813f9490 T ieee80211_recv_pspoll +ffffffff813f95b0 T ieee80211_recv_bar +ffffffff813f9690 T ieee80211_input +ffffffff813f9700 T ieee80211_ba_move_window +ffffffff813f9850 T ieee80211_input_ba_seq +ffffffff813f9a00 T ieee80211_input_ba_flush +ffffffff813f9b30 T ieee80211_input_ba_gap_skip +ffffffff813f9bd0 T ieee80211_input_ba_gap_timeout +ffffffff813f9cf0 T ieee80211_enqueue_data +ffffffff813f9ed0 T ieee80211_amsdu_decap_validate +ffffffff813f9f90 T ieee80211_parse_edca_params_body +ffffffff813fa0e0 T ieee80211_parse_edca_params +ffffffff813fa130 T ieee80211_parse_wmm_params +ffffffff813fa180 T ieee80211_parse_rsn_cipher +ffffffff813fa220 T ieee80211_parse_rsn_akm +ffffffff813fa2d0 T ieee80211_parse_rsn_body +ffffffff813fa550 T ieee80211_parse_rsn +ffffffff813fa5a0 T ieee80211_parse_wpa +ffffffff813fa600 T ieee80211_save_ie +ffffffff813fa6b0 T ieee80211_recv_probe_resp +ffffffff813fb490 T ieee80211_recv_probe_req +ffffffff813fb750 T ieee80211_recv_auth +ffffffff813fb7f0 T ieee80211_recv_assoc_req +ffffffff813fc1a0 T ieee80211_recv_assoc_resp +ffffffff813fc700 T ieee80211_recv_deauth +ffffffff813fc870 T ieee80211_recv_disassoc +ffffffff813fc980 T ieee80211_recv_addba_req +ffffffff813fcda0 T ieee80211_addba_req_refuse +ffffffff813fce30 T ieee80211_addba_req_accept +ffffffff813fcec0 T ieee80211_recv_addba_resp +ffffffff813fd060 T ieee80211_addba_resp_refuse +ffffffff813fd0a0 T ieee80211_addba_resp_accept +ffffffff813fd120 T ieee80211_recv_delba +ffffffff813fd2a0 T ieee80211_recv_sa_query_req +ffffffff813fd310 T ieee80211_recv_sa_query_resp +ffffffff813fd380 T ieee80211_recv_action +ffffffff813fd4a0 T ieee80211_recv_mgmt +ffffffff813fd5f0 T ieee80211_bar_tid +ffffffff813fe000 T ieee80211_node2req +ffffffff813fe370 T ieee80211_req2node +ffffffff813fe480 T ieee80211_disable_wep +ffffffff813fe590 T ieee80211_disable_rsn +ffffffff813fe5f0 T ieee80211_ioctl +ffffffff81400000 T ieee80211_inact_timeout +ffffffff814000a0 T ieee80211_node_cache_timeout +ffffffff814000e0 T ieee80211_clean_nodes +ffffffff81400400 T ieee80211_print_ess +ffffffff814005f0 T ieee80211_print_ess_list +ffffffff81400660 T ieee80211_get_ess +ffffffff814006f0 T ieee80211_del_ess +ffffffff81400850 T ieee80211_add_ess +ffffffff81400ed0 T ieee80211_ess_adjust_rssi +ffffffff81400f40 T ieee80211_ess_calculate_score +ffffffff814010a0 T ieee80211_ess_is_better +ffffffff814011f0 T ieee80211_match_ess +ffffffff814012e0 T ieee80211_switch_ess +ffffffff81401550 T ieee80211_set_ess +ffffffff81401820 T ieee80211_deselect_ess +ffffffff81401880 T ieee80211_node_attach +ffffffff81401a50 T ieee80211_node_alloc +ffffffff81401a70 T ieee80211_node_free +ffffffff81401b10 T ieee80211_node_copy +ffffffff81401cc0 T ieee80211_node_getrssi +ffffffff81401cf0 T ieee80211_node_checkrssi +ffffffff81401d70 T ieee80211_set_tim +ffffffff81401de0 T ieee80211_alloc_node_helper +ffffffff81401e50 T ieee80211_node_lateattach +ffffffff81401f00 T ieee80211_node_detach +ffffffff81402070 T ieee80211_free_allnodes +ffffffff81402190 T ieee80211_reset_scan +ffffffff81402210 T ieee80211_node_raise_inact +ffffffff81402250 T ieee80211_begin_scan +ffffffff81402400 T ieee80211_node_cleanup +ffffffff814024b0 T ieee80211_iterate_nodes +ffffffff81402540 T ieee80211_next_scan +ffffffff81402670 T ieee80211_end_scan +ffffffff81402bd0 T ieee80211_create_ibss +ffffffff814030a0 T ieee80211_match_bss +ffffffff81403500 T ieee80211_node_free_unref_cb +ffffffff81403570 T ieee80211_node_tx_stopped +ffffffff81403670 T ieee80211_node_switch_bss +ffffffff81403940 T ieee80211_node_tx_flushed +ffffffff81403ab0 T ieee80211_find_node +ffffffff81403b50 T ieee80211_node_join_bss +ffffffff81403d30 T ieee80211_choose_rsnparams +ffffffff81403e60 T ieee80211_node_choose_bss +ffffffff81404050 T ieee80211_free_node +ffffffff81404150 T ieee80211_node_cmp +ffffffff81404170 T ieee80211_clean_inactive_nodes +ffffffff81404230 T ieee80211_get_rate +ffffffff81404280 T ieee80211_ba_del +ffffffff81404360 T ieee80211_node_set_timeouts +ffffffff81404460 T ieee80211_node_addba_request_ac_be_to +ffffffff81404480 T ieee80211_node_addba_request_ac_bk_to +ffffffff814044a0 T ieee80211_node_addba_request_ac_vi_to +ffffffff814044c0 T ieee80211_node_addba_request_ac_vo_to +ffffffff814044e0 T ieee80211_setup_node +ffffffff81404660 T ieee80211_alloc_node +ffffffff81404700 T ieee80211_dup_bss +ffffffff814047d0 T ieee80211_find_txnode +ffffffff814049d0 T ieee80211_find_rxnode +ffffffff81404ce0 T ieee80211_node_tx_ba_clear +ffffffff81404d50 T ieee80211_release_node +ffffffff81404de0 T ieee80211_clean_cached +ffffffff81404e70 T ieee80211_node_leave +ffffffff814050d0 T ieee80211_setup_htcaps +ffffffff81405170 T ieee80211_clear_htcaps +ffffffff814051f0 T ieee80211_setup_htop +ffffffff81405270 T ieee80211_setup_vhtcaps +ffffffff814052f0 T ieee80211_setup_vhtop +ffffffff81405350 T ieee80211_clear_vhtcaps +ffffffff81405390 T ieee80211_setup_rates +ffffffff81405450 T ieee80211_node_trigger_addba_req +ffffffff814054b0 T ieee80211_node_addba_request +ffffffff814054e0 T ieee80211_iserp_sta +ffffffff81405690 T ieee80211_needs_auth +ffffffff814056c0 T ieee80211_node_join_ht +ffffffff81405710 T ieee80211_node_join_rsn +ffffffff81405820 T ieee80211_count_longslotsta +ffffffff81405860 T ieee80211_count_nonerpsta +ffffffff814058b0 T ieee80211_count_pssta +ffffffff81405900 T ieee80211_count_rekeysta +ffffffff81405950 T ieee80211_node_join_11g +ffffffff81405ae0 T ieee80211_node_join +ffffffff81405de0 T ieee80211_node_leave_ht +ffffffff81405f10 T ieee80211_node_leave_vht +ffffffff81405f50 T ieee80211_node_leave_rsn +ffffffff81406080 T ieee80211_node_leave_11g +ffffffff814063a0 T ieee80211_node_leave_pwrsave +ffffffff81406560 T ieee80211_ibss_merge +ffffffff81406860 T ieee80211_notify_dtim +ffffffff81406930 T ieee80211_ess_cmp +ffffffff81406950 t ieee80211_tree_RBT_COMPARE +ffffffff81406970 t ieee80211_ess_tree_RBT_COMPARE +ffffffff81407000 T ieee80211_output +ffffffff814070f0 T ieee80211_action_name +ffffffff81407140 T ieee80211_mgmt_output +ffffffff814073a0 T ieee80211_pwrsave +ffffffff814074c0 T ieee80211_up_to_ac +ffffffff81407580 T ieee80211_classify +ffffffff81407670 T ieee80211_can_use_ampdu +ffffffff814076d0 T ieee80211_tx_compressed_bar +ffffffff81407810 T ieee80211_get_compressed_bar +ffffffff814078e0 T ieee80211_encap +ffffffff81407d60 T ieee80211_add_capinfo +ffffffff81407df0 T ieee80211_add_ssid +ffffffff81407e50 T ieee80211_add_rates +ffffffff81407ec0 T ieee80211_add_ds_params +ffffffff81407f10 T ieee80211_add_tim +ffffffff81408060 T ieee80211_add_ibss_params +ffffffff81408090 T ieee80211_add_edca_params +ffffffff81408210 T ieee80211_add_erp +ffffffff814082b0 T ieee80211_add_qos_capability +ffffffff814082e0 T ieee80211_add_wme_info +ffffffff81408320 T ieee80211_add_wme_param +ffffffff814084b0 T ieee80211_add_rsn_body +ffffffff81408790 T ieee80211_add_rsn +ffffffff814087f0 T ieee80211_add_wpa +ffffffff81408850 T ieee80211_add_xrates +ffffffff814088d0 T ieee80211_add_htcaps +ffffffff814089a0 T ieee80211_add_htop +ffffffff81408a70 T ieee80211_add_vhtcaps +ffffffff81408b10 T ieee80211_add_tie +ffffffff81408b60 T ieee80211_getmgmt +ffffffff81408c20 T ieee80211_get_probe_req +ffffffff81408fd0 T ieee80211_get_probe_resp +ffffffff81409530 T ieee80211_get_auth +ffffffff814095c0 T ieee80211_get_deauth +ffffffff81409640 T ieee80211_get_assoc_req +ffffffff81409b30 T ieee80211_get_assoc_resp +ffffffff81409ef0 T ieee80211_get_disassoc +ffffffff81409f70 T ieee80211_get_addba_req +ffffffff8140a060 T ieee80211_output_ba_move_window +ffffffff8140a150 T ieee80211_output_ba_move_window_to_first_unacked +ffffffff8140a2e0 T ieee80211_output_ba_record_ack +ffffffff8140a430 T ieee80211_get_addba_resp +ffffffff8140a530 T ieee80211_get_delba +ffffffff8140a5d0 T ieee80211_get_sa_query +ffffffff8140a660 T ieee80211_get_action +ffffffff8140a8f0 T ieee80211_send_mgmt +ffffffff8140ac90 T ieee80211_get_rts +ffffffff8140ad20 T ieee80211_get_cts_to_self +ffffffff8140ada0 T ieee80211_beacon_alloc +ffffffff8140c000 T ieee80211_eapol_key_input +ffffffff8140c210 T ieee80211_recv_eapol_key_req +ffffffff8140c360 T ieee80211_recv_4way_msg3 +ffffffff8140cd00 T ieee80211_recv_4way_msg2or4 +ffffffff8140ce40 T ieee80211_recv_4way_msg1 +ffffffff8140d120 T ieee80211_recv_wpa_group_msg1 +ffffffff8140d450 T ieee80211_recv_rsn_group_msg1 +ffffffff8140d980 T ieee80211_recv_group_msg2 +ffffffff8140dad0 T ieee80211_recv_4way_msg2 +ffffffff8140dcd0 T ieee80211_must_update_group_key +ffffffff8140dd30 T ieee80211_recv_4way_msg4 +ffffffff8140e000 T ieee80211_send_eapol_key +ffffffff8140e210 T ieee80211_eapol_timeout +ffffffff8140e290 T ieee80211_send_4way_msg1 +ffffffff8140e550 T ieee80211_send_4way_msg3 +ffffffff8140ea90 T ieee80211_send_group_msg1 +ffffffff8140efb0 T ieee80211_add_gtk_kde +ffffffff8140f060 T ieee80211_add_pmkid_kde +ffffffff8140f0b0 T ieee80211_add_igtk_kde +ffffffff8140f170 T ieee80211_get_eapol_key +ffffffff8140f230 T ieee80211_send_4way_msg2 +ffffffff8140f450 T ieee80211_send_4way_msg4 +ffffffff8140f630 T ieee80211_send_group_msg2 +ffffffff8140f810 T ieee80211_send_eapol_key_req +ffffffff81410000 T ieee80211_proto_attach +ffffffff814100b0 T ieee80211_newstate +ffffffff81410d80 T ieee80211_proto_detach +ffffffff81410db0 T ieee80211_print_essid +ffffffff81410f30 T ieee80211_fix_rate +ffffffff81411370 T ieee80211_reset_erp +ffffffff81411480 T ieee80211_set_shortslottime +ffffffff814114e0 T ieee80211_keyrun +ffffffff81411640 T ieee80211_setkeys +ffffffff81411880 t ieee80211_node_gtk_rekey +ffffffff814118e0 T ieee80211_setkeysdone +ffffffff814119e0 T ieee80211_gtk_rekey_timeout +ffffffff81411a30 T ieee80211_sa_query_timeout +ffffffff81411b00 T ieee80211_sa_query_request +ffffffff81411b80 T ieee80211_ht_negotiate +ffffffff81411d50 T ieee80211_vht_negotiate +ffffffff81411f60 T ieee80211_tx_ba_timeout +ffffffff81412080 T ieee80211_delba_request +ffffffff814121f0 T ieee80211_rx_ba_timeout +ffffffff81412270 T ieee80211_addba_request +ffffffff81412440 T ieee80211_auth_open_confirm +ffffffff814124f0 T ieee80211_try_another_bss +ffffffff81412600 T ieee80211_auth_open +ffffffff81412900 T ieee80211_set_beacon_miss_threshold +ffffffff81412990 T ieee80211_stop_ampdu_tx +ffffffff81412aa0 T ieee80211_check_wpa_supplicant_failure +ffffffff81412b20 T ieee80211_set_link_state +ffffffff81412bb0 T ieee80211_rtm_80211info_task +ffffffff81413000 T ieee80211_ra_get_ht_rateset +ffffffff81413080 T ieee80211_ra_use_ht_sgi +ffffffff81413100 T ieee80211_ra_get_txrate +ffffffff81413190 T ieee80211_ra_next_lower_intra_rate +ffffffff81413320 T ieee80211_ra_next_intra_rate +ffffffff814134a0 T ieee80211_ra_next_rateset +ffffffff814136c0 T ieee80211_ra_best_mcs_in_rateset +ffffffff81413740 T ieee80211_ra_probe_next_rateset +ffffffff81413a00 T ieee80211_ra_next_mcs +ffffffff81413a40 T ieee80211_ra_probe_clear +ffffffff81413a80 T ieee80211_ra_probe_done +ffffffff81413ac0 T ieee80211_ra_intra_mode_ra_finished +ffffffff81413e30 T ieee80211_ra_trigger_next_rateset +ffffffff81413e90 T ieee80211_ra_inter_mode_ra_finished +ffffffff81413ec0 T ieee80211_ra_best_rate +ffffffff81413f60 T ieee80211_ra_probe_next_rate +ffffffff81413ff0 T ieee80211_ra_valid_tx_mcs +ffffffff81414070 T ieee80211_ra_valid_rates +ffffffff81414140 T ieee80211_ra_probe_valid +ffffffff81414190 T ieee80211_ra_add_stats_ht +ffffffff81414430 T ieee80211_ra_choose +ffffffff81414870 T ieee80211_ra_node_init +ffffffff81415000 T ieee80211_ra_vht_get_rateset +ffffffff814150a0 T ieee80211_ra_vht_use_sgi +ffffffff814151b0 T ieee80211_ra_vht_get_txrate +ffffffff81415250 T ieee80211_ra_vht_next_lower_intra_rate +ffffffff81415290 T ieee80211_ra_vht_get_max_mcs +ffffffff81415310 T ieee80211_ra_vht_next_intra_rate +ffffffff81415400 T ieee80211_ra_vht_next_rateset +ffffffff81415550 T ieee80211_ra_vht_best_mcs_in_rateset +ffffffff814155f0 T ieee80211_ra_vht_probe_next_rateset +ffffffff814158d0 T ieee80211_ra_vht_next_mcs +ffffffff81415950 T ieee80211_ra_vht_probe_clear +ffffffff81415980 T ieee80211_ra_vht_probe_done +ffffffff814159d0 T ieee80211_ra_vht_intra_mode_ra_finished +ffffffff81415d90 T ieee80211_ra_vht_trigger_next_rateset +ffffffff81415df0 T ieee80211_ra_vht_inter_mode_ra_finished +ffffffff81415e20 T ieee80211_ra_vht_best_rate +ffffffff814160e0 T ieee80211_ra_vht_probe_next_rate +ffffffff81416190 T ieee80211_ra_vht_init_valid_rates +ffffffff81416390 T ieee80211_ra_vht_probe_valid +ffffffff814163e0 T ieee80211_ra_vht_add_stats +ffffffff814166d0 T ieee80211_ra_vht_choose +ffffffff81416b00 T ieee80211_ra_vht_node_init +ffffffff81417000 T ieee80211_rssadapt_choose +ffffffff814170d0 T ieee80211_rssadapt_updatestats +ffffffff81417150 T ieee80211_rssadapt_input +ffffffff81417190 T ieee80211_rssadapt_lower_rate +ffffffff81417210 T ieee80211_rssadapt_raise_rate +ffffffff81418000 T bsearch +ffffffff814180b0 T ieee80211_regdomain_compare_cn +ffffffff814180d0 T ieee80211_regdomain_compare_rn +ffffffff814180f0 T ieee80211_name2countrycode +ffffffff81418190 T ieee80211_name2regdomain +ffffffff81418230 T ieee80211_countrycode2name +ffffffff814182c0 T ieee80211_regdomain2name +ffffffff81418330 T ieee80211_regdomain2flag +ffffffff814183f0 T ieee80211_countrycode2regdomain +ffffffff81419000 T arptimer +ffffffff81419080 T arptfree +ffffffff81419160 T arpinit +ffffffff814191d0 T arp_rtrequest +ffffffff81419600 T arprequest +ffffffff81419730 T arpinvalidate +ffffffff81419790 T arpreply +ffffffff81419870 T arpresolve +ffffffff81419e50 T arppullup +ffffffff81419f10 T arpinput +ffffffff81419f60 T arpintr +ffffffff8141a010 T in_arpinput +ffffffff8141a440 T arplookup +ffffffff8141a530 T arpcache +ffffffff8141a900 T arpproxy +ffffffff8141a9e0 T revarpinput +ffffffff8141aa30 T in_revarpinput +ffffffff8141aaf0 T revarprequest +ffffffff8141ac30 T revarpwhoarewe +ffffffff8141ae10 T revarpwhoami +ffffffff8141b000 T igmp_init +ffffffff8141b080 T rti_fill +ffffffff8141b150 T rti_find +ffffffff8141b230 T rti_delete +ffffffff8141b2c0 T igmp_input +ffffffff8141b390 T igmp_input_if +ffffffff8141bbf0 T igmp_joingroup +ffffffff8141bd30 T igmp_sendpkt +ffffffff8141beb0 T igmp_leavegroup +ffffffff8141bf30 T igmp_fasttimo +ffffffff8141bfb0 T igmp_checktimer +ffffffff8141c090 T igmp_slowtimo +ffffffff8141c0f0 T igmp_sysctl +ffffffff8141c250 T igmp_sysctl_igmpstat +ffffffff8141d000 T in_canforward +ffffffff8141d060 T in_socktrim +ffffffff8141d0b0 T in_mask2len +ffffffff8141d180 T in_len2mask +ffffffff8141d240 T in_nam2sin +ffffffff8141d2a0 T in_sa2sin +ffffffff8141d2e0 T in_control +ffffffff8141d380 T in_ioctl +ffffffff8141d6f0 T in_ioctl_get +ffffffff8141d850 T in_ioctl_set_ifaddr +ffffffff8141da40 T in_ioctl_change_ifaddr +ffffffff8141de60 T in_scrubhost +ffffffff8141de80 T in_addhost +ffffffff8141dea0 T in_ifscrub +ffffffff8141df40 T in_ifinit +ffffffff8141e1e0 T in_purgeaddr +ffffffff8141e2e0 T in_remove_prefix +ffffffff8141e350 T in_insert_prefix +ffffffff8141e3d0 T in_addmulti +ffffffff8141e560 T in_delmulti +ffffffff8141e6b0 T in_broadcast +ffffffff8141e740 T in_hasmulti +ffffffff8141e7e0 T in_ifdetach +ffffffff8141e870 T in_prefixlen2mask +ffffffff8141f000 T in_init +ffffffff8141f060 T in_pcbhash +ffffffff8141f180 T in_pcblhash +ffffffff8141f230 T in_pcbinit +ffffffff8141f2e0 T in_baddynamic +ffffffff8141f350 T in_rootonly +ffffffff8141f3d0 T in_pcballoc +ffffffff8141f550 T in_pcbresize +ffffffff8141f730 T in_pcbhash_insert +ffffffff8141f910 T in_pcbbind +ffffffff8141fc10 T in_pcbaddrisavail +ffffffff8141fe00 T in_pcbpickport +ffffffff8141ffe0 T in_pcbrehash +ffffffff81420070 T in_pcblookup_local +ffffffff81420320 T in_pcbunref +ffffffff81420400 T in_pcbconnect +ffffffff81420670 T in_pcbselsrc +ffffffff814208a0 T in_pcblookup +ffffffff81420990 T in_pcbdisconnect +ffffffff81420ad0 T in_pcbdetach +ffffffff81420c10 T in_pcbref +ffffffff81420c60 T in_setsockaddr +ffffffff81420cb0 T in_setpeeraddr +ffffffff81420d20 T in_sockaddr +ffffffff81420d80 T in_peeraddr +ffffffff81420e00 T in_pcbnotifyall +ffffffff81420f70 T in_losing +ffffffff81421000 T in_rtchange +ffffffff81421050 T in_pcbrtentry +ffffffff814211a0 T in_pcbhash_lookup +ffffffff81421340 T in_pcblookup_listen +ffffffff81422000 T inet_nat64_mask +ffffffff81422060 T inet_nat64 +ffffffff814221f0 T inet_nat64_inet +ffffffff814222b0 T inet_nat64_inet6 +ffffffff81422380 T inet_nat46 +ffffffff81422420 T inet_nat46_inet +ffffffff81422470 T inet_nat46_inet6 +ffffffff81423000 T inet_ntop +ffffffff814230c0 t inet_ntop6 +ffffffff814235b0 T sockaddr_ntop +ffffffff81424000 T divert_attach +ffffffff81424080 T divert_detach +ffffffff814240d0 T divert_lock +ffffffff81424130 T divert_unlock +ffffffff81424190 T divert_bind +ffffffff814241d0 T divert_shutdown +ffffffff81424210 T divert_send +ffffffff81424250 T divert_init +ffffffff814242a0 T divert_output +ffffffff81424560 T divert_packet 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ip_reass +ffffffff8142a7a0 T ip_freef +ffffffff8142a8a0 T ip_slowtimo +ffffffff8142a930 T save_rte +ffffffff8142aa10 T ip_srcroute +ffffffff8142ab70 T ip_stripoptions +ffffffff8142ac00 T ip_sysctl +ffffffff8142af40 T ip_sysctl_ipstat +ffffffff8142b1a0 T ip_savecontrol +ffffffff8142b3d0 T ip_send_do_dispatch +ffffffff8142b4b0 T ip_send +ffffffff8142b4e0 T ip_send_raw +ffffffff8142b510 t ip_send_dispatch +ffffffff8142b520 t ip_sendraw_dispatch +ffffffff8142c000 T mfc_find +ffffffff8142c0c0 T ip_mrouter_set +ffffffff8142c230 T ip_mrouter_init +ffffffff8142c2b0 T ip_mrouter_done +ffffffff8142c4d0 T add_vif +ffffffff8142c6d0 T del_vif +ffffffff8142c830 T add_mfc +ffffffff8142c9d0 T del_mfc +ffffffff8142cb50 T set_api_config +ffffffff8142cbf0 T ip_mrouter_get +ffffffff8142cc90 T get_version +ffffffff8142ccd0 T get_api_support +ffffffff8142cd10 T get_api_config +ffffffff8142cd50 T mrt_ioctl +ffffffff8142ce90 T get_vif_cnt +ffffffff8142cf20 T get_sg_cnt +ffffffff8142d040 T if_lookupbyvif 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T ip_multicast_if +ffffffff81431e50 T ip_freemoptions +ffffffff81431ee0 T in_delayed_cksum +ffffffff81432000 T rip_attach +ffffffff814320f0 T rip_detach +ffffffff81432160 T rip_lock +ffffffff814321c0 T rip_unlock +ffffffff81432220 T rip_bind +ffffffff814322e0 T rip_connect +ffffffff81432360 T rip_disconnect +ffffffff814323c0 T rip_shutdown +ffffffff81432400 T rip_send +ffffffff814324e0 T rip_init +ffffffff81432500 T rip_input +ffffffff81432870 T rip_output +ffffffff81432a60 T rip_chkhdr +ffffffff81432b50 T rip_ctloutput +ffffffff81433000 T tcp_trace +ffffffff81434000 T tcp_reass +ffffffff814343a0 T tcp_flush_queue +ffffffff81434540 T tcp_input +ffffffff81437ab0 T syn_cache_reset +ffffffff81437cb0 T syn_cache_get +ffffffff814384e0 T syn_cache_add +ffffffff81438a90 T tcp_del_sackholes +ffffffff81438b40 T tcp_dooptions +ffffffff81439080 T tcp_xmit_timer +ffffffff814391e0 T tcp_clean_sackreport +ffffffff81439250 T tcp_mss +ffffffff814394e0 T tcp_sack_partialack +ffffffff81439590 T tcp_newreno_partialack +ffffffff81439680 T tcp_seq_subtract +ffffffff814396b0 T tcp_pulloutofband +ffffffff81439770 T tcp_update_sack_list +ffffffff81439ca0 T tcp_sack_option +ffffffff8143a1e0 T tcp_hdrsz +ffffffff8143a250 T tcp_mss_update +ffffffff8143a390 T tcp_mss_adv +ffffffff8143a440 T syn_cache_rm +ffffffff8143a520 T syn_cache_put +ffffffff8143a580 T syn_cache_reaper +ffffffff8143a5a0 T syn_cache_init +ffffffff8143a6b0 T syn_cache_insert +ffffffff8143ad20 T syn_cache_timer +ffffffff8143af80 T syn_cache_respond +ffffffff8143b5b0 T syn_cache_cleanup +ffffffff8143b770 T syn_cache_lookup +ffffffff8143b980 T syn_cache_unreach +ffffffff8143c000 T tcp_sack_output +ffffffff8143c070 T tcp_sack_adjust +ffffffff8143c0f0 T tcp_output +ffffffff8143db90 T tcp_setpersist +ffffffff8143e000 T tcp_init +ffffffff8143e170 T tcp6_mtudisc_callback +ffffffff8143e1d0 T tcp_template +ffffffff8143e350 T tcp_respond +ffffffff8143e750 T tcp_newtcpcb +ffffffff8143e950 T tcp_drop +ffffffff8143ea50 T tcp_close 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udp_shutdown +ffffffff814443d0 T udp_send +ffffffff814444e0 T udp_init +ffffffff81444510 T udp_input +ffffffff814452e0 T udp_sbappend +ffffffff81445550 T udp_notify +ffffffff81445580 T udp6_ctlinput +ffffffff814458c0 T udp_ctlinput +ffffffff81445a30 T udp_output +ffffffff81445e80 T udp_sysctl +ffffffff81446120 T udp_sysctl_udpstat +ffffffff81447000 T gre_send +ffffffff81448000 T ipsp_ids_gc +ffffffff81448120 T ipsp_init +ffffffff814481f0 T tdb_hash +ffffffff81448310 T reserve_spi +ffffffff81448590 T tdb_alloc +ffffffff814486a0 T gettdb_dir +ffffffff814487e0 T tdb_unref +ffffffff81448830 T puttdb +ffffffff81448870 T tdb_ref +ffffffff814488b0 T gettdbbysrcdst_dir +ffffffff81448ad0 T ipsp_aux_match +ffffffff81448b80 T ipsp_ids_match +ffffffff81448bb0 T gettdbbydst +ffffffff81448d30 T gettdbbysrc +ffffffff81448eb0 T tdb_hashstats +ffffffff81449220 T tdb_printit +ffffffff81449a10 T ipsp_address +ffffffff81449a70 T tdb_walk +ffffffff81449c00 T tdb_timeout +ffffffff81449ca0 T tdb_delete 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T gdt_pcinew_get_status +ffffffff816f2ae0 T gdt_pcinew_intr +ffffffff816f2b10 T gdt_pcinew_release_event +ffffffff816f2b40 T gdt_pcinew_set_sema0 +ffffffff816f2b70 T gdt_pcinew_test_busy +ffffffff816f2ba0 T gdt_mpr_copy_cmd +ffffffff816f2c80 T gdt_mpr_get_status +ffffffff816f2ca0 T gdt_mpr_intr +ffffffff816f2da0 T gdt_mpr_release_event +ffffffff816f2dd0 T gdt_mpr_set_sema0 +ffffffff816f2e00 T gdt_mpr_test_busy +ffffffff816f2e50 T gdt_pci_enable_intr +ffffffff816f3000 T ciss_pci_match +ffffffff816f3020 T ciss_pci_attach +ffffffff816f33d0 T ciss_activate +ffffffff816f4000 T qlw_pci_match +ffffffff816f4080 T qlw_pci_attach +ffffffff816f44c0 T qlw_pci_detach +ffffffff816f5000 T qla_pci_match +ffffffff816f5050 T qla_pci_attach +ffffffff816f53d0 T qla_pci_detach +ffffffff816f6000 T qle_match +ffffffff816f6020 T qle_attach +ffffffff816f6b60 T qle_detach +ffffffff816f6bd0 T qle_scsi_cmd +ffffffff816f7090 T qle_scsi_probe +ffffffff816f7120 T qle_intr +ffffffff816f71f0 T qle_read_mbox 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mpii_attach +ffffffff816fdb60 T mpii_detach +ffffffff816fdbe0 T mpii_scsi_cmd +ffffffff816fdeb0 T mpii_scsi_probe +ffffffff816fe0b0 T mpii_scsi_ioctl +ffffffff816fe130 T mpii_write +ffffffff816fe180 T mpii_iocfacts +ffffffff816fe450 T mpii_init +ffffffff816fe6f0 T mpii_alloc_ccbs +ffffffff816feb20 T mpii_alloc_replies +ffffffff816febe0 T mpii_alloc_queues +ffffffff816fed40 T mpii_iocinit +ffffffff816feeb0 T mpii_wait_eq +ffffffff816fef50 T mpii_read +ffffffff816fef80 T mpii_push_replies +ffffffff816ff0e0 T mpii_init_queues +ffffffff816ff160 T mpii_board_info +ffffffff816ff360 T mpii_portfacts +ffffffff816ff490 T mpii_target_map +ffffffff816ff580 T mpii_cfg_coalescing +ffffffff816ff650 T mpii_eventnotify +ffffffff816ff810 T mpii_portenable +ffffffff816ff900 T mpii_intr +ffffffff816ffc20 T mpii_ioctl +ffffffff816ffd30 T mpii_create_sensors +ffffffff816ffec0 T mpii_dmamem_free +ffffffff816fff40 T mpii_get_ccb +ffffffff816fffd0 T mpii_reply +ffffffff817000a0 T mpii_event_process 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T tulip_txprobe +ffffffff8170ccb0 T tulip_txput +ffffffff8170d230 T tulip_media_set +ffffffff8170d820 T tulip_reset +ffffffff8170dbe0 T tulip_mii_autonegotiate +ffffffff8170dee0 T tulip_mii_readreg +ffffffff8170e090 T tulip_mii_writereg +ffffffff8170e240 T tulip_linkup +ffffffff8170e300 T tulip_init +ffffffff8170e480 T tulip_media_print +ffffffff8170e4d0 T tulip_media_link_monitor +ffffffff8170e730 T tulip_mii_map_abilities +ffffffff8170e7c0 T tulip_media_poll +ffffffff8170ecb0 T tulip_mii_phy_readspecific +ffffffff8170ee70 T tulip_media_select +ffffffff8170ef80 T tulip_21040_mediainfo_init +ffffffff8170f080 T tulip_21040_media_probe +ffffffff8170f170 T tulip_21040_10baset_only_media_probe +ffffffff8170f230 T tulip_21040_10baset_only_media_select +ffffffff8170f290 T tulip_21040_auibnc_only_media_probe +ffffffff8170f320 T tulip_21040_auibnc_only_media_select +ffffffff8170f360 T tulip_21041_mediainfo_init +ffffffff8170f420 T tulip_21041_media_probe +ffffffff8170f500 T tulip_21041_media_poll +ffffffff8170f810 T tulip_mii_get_phyaddr +ffffffff8170f8d0 T tulip_2114x_media_preset +ffffffff8170faf0 T tulip_null_media_poll +ffffffff8170fb20 T tulip_21140_mediainit +ffffffff8170fb60 T tulip_21140_evalboard_media_probe +ffffffff8170fd40 T tulip_21140_accton_media_probe +ffffffff8170ff60 T tulip_21140_smc9332_media_probe +ffffffff81710190 T tulip_21140_cogent_em100_media_probe +ffffffff81710300 T tulip_21140_znyx_zx34x_media_probe +ffffffff81710530 T tulip_2114x_media_probe +ffffffff81710560 T tulip_delay_300ns +ffffffff81710670 T tulip_srom_idle +ffffffff81711010 T tulip_srom_read +ffffffff81711da0 T tulip_mii_writebits +ffffffff81712320 T tulip_mii_turnaround +ffffffff81712af0 T tulip_mii_readbits +ffffffff81712ed0 T tulip_identify_dec_nic +ffffffff81712f80 T tulip_identify_znyx_nic +ffffffff81713250 T tulip_identify_smc_nic +ffffffff81713430 T tulip_identify_cogent_nic +ffffffff81713520 T tulip_identify_accton_nic +ffffffff81713650 T tulip_identify_asante_nic +ffffffff81713910 T tulip_identify_compex_nic +ffffffff81713a60 T tulip_srom_decode +ffffffff817146b0 T tulip_read_macaddr +ffffffff81715070 T tulip_ifmedia_add +ffffffff81715150 T tulip_ifmedia_change +ffffffff81715330 T tulip_ifmedia_status +ffffffff81715390 T tulip_alloc_rxmap +ffffffff817153d0 T tulip_free_rxmap +ffffffff81715410 T tulip_alloc_txmap +ffffffff81715450 T tulip_free_txmap +ffffffff81715490 T tulip_addr_filter +ffffffff817157a0 T tulip_rx_intr +ffffffff81715da0 T tulip_txput_setup +ffffffff81716030 T tulip_tx_intr +ffffffff81716450 T tulip_print_abnormal_interrupt +ffffffff81716480 T tulip_intr_handler +ffffffff81716830 T tulip_ifstart +ffffffff817168f0 T tulip_intr_shared +ffffffff81716960 T tulip_intr_normal +ffffffff817169a0 T tulip_ifioctl +ffffffff81716a90 T tulip_ifwatchdog +ffffffff81716b90 T tulip_busdma_allocmem +ffffffff81716d20 T tulip_busdma_init +ffffffff81716f40 T tulip_initcsrs +ffffffff81717040 T tulip_initring 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siop_pci_attach_common +ffffffff8171c530 T siop_pci_reset +ffffffff8171d000 T siop_pci_match +ffffffff8171d050 T siop_pci_attach +ffffffff8171e000 T sii3114_read_reg +ffffffff8171e060 T sii3114_write_reg +ffffffff8171e0d0 T pdc203xx_read_reg +ffffffff8171e130 T pdc203xx_write_reg +ffffffff8171e190 T svwsata_read_reg +ffffffff8171e1f0 T svwsata_write_reg +ffffffff8171e230 T svwsata_lba48_write_reg +ffffffff8171e270 T pciide_pci_read +ffffffff8171e2c0 T pciide_pci_write +ffffffff8171e330 T default_chip_map +ffffffff8171e970 T artisea_chip_map +ffffffff8171ebd0 T piix_chip_map +ffffffff8171f1c0 T piixsata_chip_map +ffffffff8171f6d0 T sch_chip_map +ffffffff8171f9e0 T amd756_chip_map +ffffffff8171fdf0 T ixp_chip_map +ffffffff81720150 T cmd_chip_map +ffffffff817202b0 T cmd0643_9_chip_map +ffffffff817205b0 T cmd680_chip_map +ffffffff81720780 T sii3112_chip_map +ffffffff81720b00 T sii3114_chip_map +ffffffff81720f00 T apollo_chip_map +ffffffff81721560 T sata_chip_map +ffffffff81721770 T cy693_chip_map +ffffffff81721b30 T sis_chip_map +ffffffff81722270 T natsemi_chip_map +ffffffff817226d0 T ns_scx200_chip_map +ffffffff81722a60 T acer_chip_map +ffffffff817230e0 T hpt_chip_map +ffffffff817235c0 T pdc202xx_chip_map +ffffffff81723f80 T pdcsata_chip_map +ffffffff81724700 T acard_chip_map +ffffffff81724970 T serverworks_chip_map +ffffffff81724c80 T svwsata_chip_map +ffffffff81725060 T nforce_chip_map +ffffffff81725480 T ite_chip_map +ffffffff81725740 T jmicron_chip_map +ffffffff81725b50 T phison_chip_map +ffffffff81725e70 T rdc_chip_map +ffffffff817262c0 T pciide_match +ffffffff81726360 T pciide_attach +ffffffff81726430 T pciide_detach +ffffffff81726480 T pciide_activate +ffffffff81726bb0 T pciide_lookup_product +ffffffff81726e10 T pciide_dmacmd_read +ffffffff81726e40 T pciide_dmacmd_write +ffffffff81726e70 T pciide_dmactl_read +ffffffff81726ea0 T pciide_dmactl_write +ffffffff81726ed0 T pciide_dmatbl_write +ffffffff81726f00 T pciide_mapregs_compat +ffffffff81727080 T pciide_unmapregs_compat +ffffffff81727100 T pciide_mapregs_native +ffffffff817273f0 T pciide_unmapregs_native +ffffffff81727480 T pciide_mapreg_dma +ffffffff81727610 T pciide_dma_init +ffffffff817278d0 T pciide_dma_start +ffffffff81727950 T pciide_dma_finish +ffffffff81727b20 T pciide_unmapreg_dma +ffffffff81727b50 T pciide_intr_flag +ffffffff81727d50 T pciide_compat_intr +ffffffff81727dc0 T pciide_pci_intr +ffffffff81727e80 T pciide_channel_dma_setup +ffffffff81727f40 T pciide_dma_table_setup +ffffffff81728180 T pciide_irqack +ffffffff817281d0 T pciide_chansetup +ffffffff817282b0 T pciide_chanfree +ffffffff817282f0 T pciide_mapchan +ffffffff81728380 T pciide_unmap_chan +ffffffff81728450 T pciide_chan_candisable +ffffffff817284c0 T pciide_map_compat_intr +ffffffff81728560 T pciide_unmap_compat_intr +ffffffff817285c0 T pciide_print_channels +ffffffff81728690 T pciide_print_modes +ffffffff817286a0 T default_chip_unmap +ffffffff81728780 T sata_setup_channel +ffffffff817288a0 T piix_timing_debug +ffffffff817288d0 T piix_setup_channel +ffffffff81728d60 T piix3_4_setup_channel +ffffffff817294f0 T piix_setup_idetim_timings +ffffffff81729560 T piix_setup_idetim_drvs +ffffffff81729680 T piix_setup_sidetim_timings +ffffffff817296f0 T amd756_setup_channel +ffffffff81729a90 T apollo_setup_channel +ffffffff81729e10 T cmd_channel_map +ffffffff8172a180 T cmd_pci_intr +ffffffff8172a280 T cmd646_9_irqack +ffffffff8172a380 T cmd0643_9_setup_channel +ffffffff8172a7a0 T cmd680_setup_channel +ffffffff8172aca0 T cmd680_channel_map +ffffffff8172afd0 T sii_fixup_cacheline +ffffffff8172b2a0 T sii3112_setup_channel +ffffffff8172b460 T sii3112_drv_probe +ffffffff8172b880 T sii3114_mapreg_dma +ffffffff8172bb60 T sii3114_chansetup +ffffffff8172bc20 T sii3114_mapchan +ffffffff8172bf30 T sii3114_dmacmd_read +ffffffff8172bf70 T sii3114_dmacmd_write +ffffffff8172bfb0 T sii3114_dmactl_read +ffffffff8172bff0 T sii3114_dmactl_write +ffffffff8172c030 T sii3114_dmatbl_write +ffffffff8172c070 T cy693_setup_channel +ffffffff8172c290 T sis_hostbr_match +ffffffff8172c350 T sis_south_match +ffffffff8172c390 T sis_setup_channel +ffffffff8172c6d0 T sis96x_setup_channel +ffffffff8172c9b0 T natsemi_irqack +ffffffff8172ca40 T natsemi_setup_channel +ffffffff8172ce20 T natsemi_pci_intr +ffffffff8172cf20 T ns_scx200_setup_channel +ffffffff8172d210 T acer_dma_init +ffffffff8172d250 T acer_setup_channel +ffffffff8172d650 T acer_pci_intr +ffffffff8172d730 T hpt_setup_channel +ffffffff8172da80 T hpt_pci_intr +ffffffff8172db90 T pdc268_config_read +ffffffff8172dbf0 T pdc20268_setup_channel +ffffffff8172ddb0 T pdc202xx_setup_channel +ffffffff8172e200 T pdc20262_dma_start +ffffffff8172e370 T pdc20262_dma_finish +ffffffff8172e440 T pdc20265_pci_intr +ffffffff8172e5f0 T pdc202xx_pci_intr +ffffffff8172e700 T pdc203xx_pci_intr +ffffffff8172e7f0 T pdc205xx_pci_intr +ffffffff8172e920 T pdc203xx_irqack +ffffffff8172e9b0 T pdc203xx_setup_channel +ffffffff8172eab0 T pdc205xx_do_reset +ffffffff8172eb50 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ppb_alloc_busrange +ffffffff81732ef0 T ppb_hotplug_insert +ffffffff81732f50 T ppb_hotplug_rescan +ffffffff81732f90 T ppb_hotplug_remove +ffffffff817330f0 T ppb_hotplug_insert_finish +ffffffff81733110 T ppb_intr +ffffffff817331d0 T ppb_alloc_resources +ffffffff817338a0 T ppbprint +ffffffff81734000 T cy_pci_match +ffffffff81734020 T cy_pci_attach +ffffffff81735000 T rl_pci_match +ffffffff81735060 T rl_pci_attach +ffffffff81735220 T rl_pci_detach +ffffffff81736000 T re_pci_probe +ffffffff817360a0 T re_pci_attach +ffffffff817363d0 T re_pci_detach +ffffffff81736490 T re_pci_activate +ffffffff81737000 T vr_probe +ffffffff817370f0 T vr_attach +ffffffff81737870 T vr_activate +ffffffff817378f0 T vr_mii_readreg +ffffffff81737a50 T vr_mii_writereg +ffffffff81737bb0 T vr_miibus_readreg +ffffffff81737c10 T vr_miibus_writereg +ffffffff81737c70 T vr_miibus_statchg +ffffffff81737c90 T vr_setcfg +ffffffff81737eb0 T vr_iff +ffffffff81738020 T vr_reset +ffffffff81738130 T vr_quirks +ffffffff81738230 T vr_dmamem_alloc +ffffffff81738390 T vr_dmamem_free +ffffffff81738400 T vr_intr +ffffffff81738630 T vr_chipinit +ffffffff81738710 T vr_ioctl +ffffffff817388b0 T vr_start +ffffffff81738a80 T vr_watchdog +ffffffff81738b10 T vr_wol +ffffffff81738cc0 T vr_ifmedia_upd +ffffffff81738d00 T vr_ifmedia_sts +ffffffff81738d60 T vr_tick +ffffffff81738de0 T vr_rxtick +ffffffff81738eb0 T vr_stop +ffffffff81739140 T vr_init +ffffffff817396d0 T vr_list_tx_init +ffffffff817397d0 T vr_list_rx_init +ffffffff81739990 T vr_fill_rx_ring +ffffffff81739a50 T vr_alloc_mbuf +ffffffff81739bb0 T vr_rxeof +ffffffff81739e30 T vr_rxeoc +ffffffff81739fc0 T vr_txeof +ffffffff8173a180 T vr_encap +ffffffff8173b000 T txp_probe +ffffffff8173b020 T txp_attach +ffffffff8173b180 T txp_attachhook +ffffffff8173b4a0 T txp_chip_init +ffffffff8173b660 T txp_download_fw +ffffffff8173bb00 T txp_alloc_rings +ffffffff8173c930 T txp_command +ffffffff8173ca00 T txp_ifmedia_upd +ffffffff8173cb10 T txp_ifmedia_sts +ffffffff8173ce00 T txp_ioctl +ffffffff8173cf10 T txp_start +ffffffff8173d2d0 T txp_watchdog +ffffffff8173d300 T txp_capabilities +ffffffff8173d4b0 T txp_tick +ffffffff8173d600 T txp_intr +ffffffff8173d870 T txp_reset_adapter +ffffffff8173d960 T txp_download_fw_wait +ffffffff8173da50 T txp_download_fw_section +ffffffff8173ddb0 T txp_dma_malloc +ffffffff8173df50 T txp_dma_free +ffffffff8173dfd0 T txp_rx_reclaim +ffffffff8173e2c0 T txp_rxbuf_reclaim +ffffffff8173e540 T txp_tx_reclaim +ffffffff8173e6f0 T txp_init +ffffffff8173e830 T txp_stop +ffffffff8173e930 T txp_set_filter +ffffffff8173eac0 T txp_command2 +ffffffff8173eda0 T txp_cmd_desc_numfree +ffffffff8173ee00 T txp_response +ffffffff8173f0c0 T txp_rsp_fixup +ffffffff8173f1b0 T txp_show_descriptor +ffffffff81740000 T init_audio_devices +ffffffff81740120 T init_BTSC +ffffffff817401e0 T set_audio +ffffffff81740560 T set_bctv_audio +ffffffff817408a0 T msp_autodetect +ffffffff81740cd0 T temp_mute +ffffffff81740d60 T set_BTSC +ffffffff81740d80 T bctv_gpio_write +ffffffff81740ef0 T msp_read_id +ffffffff81740fa0 T dpl_read_id +ffffffff81741050 T dpl_autodetect +ffffffff81742000 T writeEEProm +ffffffff81742030 T readEEProm +ffffffff81742100 T signCard +ffffffff817421b0 T probeCard +ffffffff81744000 T bktr_name +ffffffff81744030 T common_bktr_attach +ffffffff81744330 T common_bktr_intr +ffffffff81744950 T video_open +ffffffff81744e00 t set_fps +ffffffff81744f40 T vbi_open +ffffffff81744fe0 T tuner_open +ffffffff81745030 T video_close +ffffffff81745120 T tuner_close +ffffffff81745150 T vbi_close +ffffffff81745180 T video_read +ffffffff81745340 t start_capture +ffffffff81748280 T vbi_read +ffffffff817483a0 T video_ioctl +ffffffff81749830 T bktr_common_ioctl +ffffffff8174a000 T tuner_ioctl +ffffffff8174af50 T i2cWrite +ffffffff8174b070 T i2cRead +ffffffff8174b180 T msp_dpl_read +ffffffff8174b440 T msp_dpl_write +ffffffff8174b600 T msp_dpl_reset +ffffffff8174b900 t i2c_write_byte +ffffffff8174bae0 t i2c_read_byte +ffffffff8174bd00 t split +ffffffff8174bf00 t getline +ffffffff8174d000 t bktr_probe +ffffffff8174d060 t bktr_attach +ffffffff8174d2e0 T bktr_get_info +ffffffff8174d3c0 T bktr_set_info +ffffffff8174d520 T get_bktr_mem +ffffffff8174d750 T free_bktr_mem +ffffffff8174d7b0 T bktropen +ffffffff8174d870 T bktrclose +ffffffff8174d8f0 T bktrread +ffffffff8174d980 T bktrwrite +ffffffff8174d9b0 T bktrioctl +ffffffff8174da50 T bktrmmap +ffffffff8174dae0 t bktr_intr +ffffffff8174e000 T select_tuner +ffffffff8174e050 T tv_freq +ffffffff8174e2a0 T do_afc +ffffffff8174e3c0 T get_tuner_status +ffffffff8174e3e0 T tv_channel +ffffffff8174e4a0 T tuner_getchnlset +ffffffff8174f000 T xl_pci_match +ffffffff8174f020 T xl_pci_attach +ffffffff8174f370 T xl_pci_detach +ffffffff8174f400 T xl_pci_wol_power +ffffffff8174f450 T xl_pci_intr_ack +ffffffff81750000 T fxp_pci_match +ffffffff81750020 T fxp_pci_attach +ffffffff81750340 T fxp_pci_detach +ffffffff81751000 T em_probe +ffffffff81751020 T em_attach +ffffffff81751520 T em_detach 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em_setup_transmit_structures +ffffffff81754b70 T em_initialize_transmit_unit +ffffffff81755190 T em_setup_receive_structures +ffffffff817552d0 T em_setup_queues_msix +ffffffff81755980 T em_intr +ffffffff81755a80 T em_txeof +ffffffff81755c40 T em_rxeof +ffffffff817560f0 T em_rxrefill +ffffffff81756200 T em_media_status +ffffffff81756430 T em_flowstatus +ffffffff81756540 T em_media_change +ffffffff81756690 T em_tx_ctx_setup +ffffffff817568a0 T em_transmit_checksum_setup +ffffffff81756980 T em_fill_descriptors +ffffffff81756a00 T em_82547_fifo_workaround +ffffffff81756a70 T em_82547_tx_fifo_reset +ffffffff81756ed0 T em_pci_clear_mwi +ffffffff81756f00 T em_pci_set_mwi +ffffffff81756f30 T em_smartspeed +ffffffff81757120 T em_kstat_read +ffffffff81757540 T em_flush_desc_rings +ffffffff81757660 T em_free_transmit_structures +ffffffff81757830 T em_free_receive_structures +ffffffff81757a40 T em_legacy_irq_quirk_spt +ffffffff81757b10 T em_allocate_msix +ffffffff81757d20 T em_allocate_legacy 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ixgbe_watchdog +ffffffff817769f0 T ixgbe_setup_transmit_structures +ffffffff81776ad0 T ixgbe_initialize_transmit_units +ffffffff81776d90 T ixgbe_setup_receive_structures +ffffffff81776ec0 T ixgbe_initialize_receive_units +ffffffff817773a0 T ixgbe_config_gpie +ffffffff81777470 T ixgbe_setup_vlan_hw_support +ffffffff81777600 T ixgbe_configure_ivars +ffffffff817777b0 T ixgbe_set_ivar +ffffffff81777980 T ixgbe_config_link +ffffffff81777b20 T ixgbe_config_delay_values +ffffffff81777c30 t ix_kstats_tick +ffffffff81777d00 T ixgbe_enable_queue +ffffffff81777dc0 T ixgbe_disable_queue +ffffffff81777e80 T ixgbe_link_intr +ffffffff81777e90 T ixgbe_intr +ffffffff81778360 T ixgbe_queue_intr +ffffffff817784b0 T ixgbe_rxeof +ffffffff81778870 T ixgbe_txeof +ffffffff81778a10 T ixgbe_rxrefill +ffffffff81778ac0 T ixgbe_legacy_intr +ffffffff81778c70 T ixgbe_update_link_status +ffffffff81778dc0 T ixgbe_handle_mod +ffffffff81778ee0 T ixgbe_handle_msf +ffffffff81778fb0 T ixgbe_handle_phy +ffffffff81779040 T ixgbe_media_status +ffffffff81779250 T ixgbe_media_change +ffffffff817792f0 T ixgbe_mc_array_itr +ffffffff81779330 T ixgbe_setup_msix +ffffffff817793c0 T ixgbe_add_media_types +ffffffff81779650 T ixgbe_dma_malloc +ffffffff81779840 T ixgbe_dma_free +ffffffff817798f0 T ixgbe_allocate_transmit_buffers +ffffffff81779a60 T ixgbe_setup_transmit_ring +ffffffff81779c00 T ixgbe_free_transmit_buffers +ffffffff81779d30 T ixgbe_get_buf +ffffffff81779e70 T ixgbe_allocate_receive_buffers +ffffffff81779fa0 T ixgbe_setup_receive_ring +ffffffff8177a080 T ixgbe_rxfill +ffffffff8177a1b0 T ixgbe_initialize_rss_mapping +ffffffff8177a420 T ixgbe_map_queue_statistics +ffffffff8177a520 T ixgbe_free_receive_buffers +ffffffff8177a660 T ixgbe_rx_checksum +ffffffff8177a6b0 T ixgbe_read_pci_cfg +ffffffff8177a710 T ixgbe_write_pci_cfg +ffffffff8177a780 t ix_kstats_read +ffffffff8177a930 t ix_rxq_kstats_read +ffffffff8177aa90 t ix_txq_kstats_read +ffffffff8177b000 T ixgbe_init_ops_generic +ffffffff8177b260 T ixgbe_init_eeprom_params_generic +ffffffff8177b310 T ixgbe_read_eerd_generic +ffffffff8177b410 T ixgbe_read_eeprom_bit_bang_generic +ffffffff8177b6b0 T ixgbe_write_eeprom_generic +ffffffff8177bb00 T ixgbe_validate_eeprom_checksum_generic +ffffffff8177bbb0 T ixgbe_update_eeprom_checksum_generic +ffffffff8177bc30 T ixgbe_calc_eeprom_checksum_generic +ffffffff8177bdd0 T ixgbe_init_hw_generic +ffffffff8177be20 T ixgbe_start_hw_generic +ffffffff8177bf40 T ixgbe_clear_hw_cntrs_generic +ffffffff8177c920 T ixgbe_enable_rx_dma_generic +ffffffff8177c980 T ixgbe_get_mac_addr_generic +ffffffff8177ca10 T ixgbe_stop_adapter_generic +ffffffff8177cb90 T ixgbe_get_bus_info_generic +ffffffff8177cc40 T ixgbe_set_lan_id_multi_port_pcie +ffffffff8177cd10 T ixgbe_acquire_swfw_sync +ffffffff8177cf40 T ixgbe_release_swfw_sync +ffffffff8177cff0 T prot_autoc_read_generic +ffffffff8177d050 T prot_autoc_write_generic +ffffffff8177d0a0 T ixgbe_led_on_generic +ffffffff8177d160 T ixgbe_led_off_generic +ffffffff8177d210 T ixgbe_blink_led_start_generic +ffffffff8177d380 T ixgbe_blink_led_stop_generic +ffffffff8177d490 T ixgbe_set_rar_generic +ffffffff8177d5b0 T ixgbe_clear_rar_generic +ffffffff8177d6b0 T ixgbe_init_rx_addrs_generic +ffffffff8177d8b0 T ixgbe_update_mc_addr_list_generic +ffffffff8177daa0 T ixgbe_enable_mc_generic +ffffffff8177db10 T ixgbe_disable_mc_generic +ffffffff8177db70 T ixgbe_enable_rx_generic +ffffffff8177dc30 T ixgbe_disable_rx_generic +ffffffff8177dd10 T ixgbe_fc_enable_generic +ffffffff8177e140 T ixgbe_setup_fc_generic +ffffffff8177e410 T ixgbe_fc_autoneg +ffffffff8177e5e0 T ixgbe_device_supports_autoneg_fc +ffffffff8177e6d0 T ixgbe_start_hw_gen2 +ffffffff8177e8b0 T ixgbe_identify_phy +ffffffff8177e900 T ixgbe_set_pci_config_data_generic +ffffffff8177e970 T ixgbe_disable_rx +ffffffff8177e9b0 T ixgbe_disable_pcie_master +ffffffff8177eb00 T ixgbe_read_eerd_buffer_generic +ffffffff8177ec40 T ixgbe_poll_eerd_eewr_done +ffffffff8177ece0 T ixgbe_write_eewr_buffer_generic +ffffffff8177ee50 T ixgbe_write_eewr_generic +ffffffff8177ee90 T ixgbe_acquire_eeprom +ffffffff8177f010 T ixgbe_get_eeprom_semaphore +ffffffff8177f220 T ixgbe_release_eeprom_semaphore +ffffffff8177f290 T ixgbe_ready_eeprom +ffffffff8177f3f0 T ixgbe_shift_out_eeprom_bits +ffffffff8177f5b0 T ixgbe_shift_in_eeprom_bits +ffffffff8177f710 T ixgbe_standby_eeprom +ffffffff8177f7f0 T ixgbe_raise_eeprom_clk +ffffffff8177f860 T ixgbe_lower_eeprom_clk +ffffffff8177f8d0 T ixgbe_release_eeprom +ffffffff8177f9b0 T ixgbe_validate_mac_addr +ffffffff8177fa10 T ixgbe_init_uta_tables +ffffffff8177fa50 T ixgbe_add_uc_addr +ffffffff8177fac0 T ixgbe_mta_vector +ffffffff8177fb60 T ixgbe_set_mta +ffffffff8177fc20 T ixgbe_negotiate_fc +ffffffff8177fcd0 T ixgbe_fc_autoneg_fiber +ffffffff8177fe00 T ixgbe_fc_autoneg_backplane +ffffffff8177ff60 T ixgbe_fc_autoneg_copper +ffffffff81780090 T ixgbe_disable_sec_rx_path_generic +ffffffff81780150 T ixgbe_enable_sec_rx_path_generic +ffffffff817801e0 T ixgbe_enable_rx +ffffffff81780220 T ixgbe_get_pcie_msix_count_generic +ffffffff817802a0 T ixgbe_insert_mac_addr_generic +ffffffff817804a0 T ixgbe_set_vmdq +ffffffff817804e0 T ixgbe_set_rar +ffffffff81780520 T ixgbe_clear_vmdq +ffffffff81780560 T ixgbe_clear_vmdq_generic +ffffffff81780700 T ixgbe_set_vmdq_generic +ffffffff817807b0 T ixgbe_init_uta_tables_generic +ffffffff81780830 T ixgbe_find_vlvf_slot +ffffffff817808f0 T ixgbe_set_vfta_generic +ffffffff81780a00 T ixgbe_set_vlvf_generic +ffffffff81780c80 T ixgbe_clear_vfta_generic +ffffffff81780d70 T ixgbe_need_crosstalk_fix +ffffffff81780dc0 T ixgbe_check_mac_link_generic +ffffffff81780fb0 T ixgbe_get_device_caps_generic +ffffffff81781000 T ixgbe_calculate_checksum +ffffffff817810c0 T ixgbe_hic_unlocked +ffffffff817812a0 T ixgbe_host_interface_command +ffffffff81781470 T ixgbe_clear_tx_pending +ffffffff81781660 T ixgbe_mng_present +ffffffff817816c0 T ixgbe_mng_enabled +ffffffff81781780 T ixgbe_setup_mac_link_multispeed_fiber +ffffffff81781b30 T ixgbe_flap_tx_laser +ffffffff81781b70 T ixgbe_check_link +ffffffff81781bb0 T ixgbe_set_soft_rate_select_speed +ffffffff81781ca0 T ixgbe_init_shared_code +ffffffff81781d50 T ixgbe_set_mac_type +ffffffff81781f00 T ixgbe_init_hw +ffffffff81781f40 T ixgbe_get_media_type +ffffffff81781f80 T ixgbe_read_mbx +ffffffff81781fd0 T ixgbe_write_mbx +ffffffff81782020 T ixgbe_check_for_msg +ffffffff81782060 T ixgbe_check_for_ack +ffffffff817820a0 T ixgbe_check_for_rst +ffffffff817820e0 T ixgbe_poll_for_msg +ffffffff81782190 T ixgbe_poll_for_ack +ffffffff81782240 T ixgbe_read_posted_mbx +ffffffff81782320 T ixgbe_write_posted_mbx +ffffffff817823f0 T ixgbe_init_mbx_ops_generic +ffffffff81782430 T ixgbe_read_v2p_mailbox +ffffffff817824a0 T ixgbe_check_for_bit_pf +ffffffff81782530 T ixgbe_check_for_msg_pf +ffffffff817825e0 T ixgbe_check_for_ack_pf +ffffffff81782680 T ixgbe_check_for_rst_pf +ffffffff81782770 T ixgbe_obtain_mbx_lock_pf +ffffffff81782800 T ixgbe_write_mbx_pf +ffffffff817829d0 T ixgbe_read_mbx_pf +ffffffff81782ae0 T ixgbe_init_mbx_params_pf +ffffffff81783000 T ixgbe_set_pcie_completion_timeout +ffffffff81783090 T ixgbe_init_ops_82598 +ffffffff817831e0 T ixgbe_init_phy_ops_82598 +ffffffff817832d0 T ixgbe_start_hw_82598 +ffffffff81783480 T ixgbe_reset_hw_82598 +ffffffff81783950 T ixgbe_get_media_type_82598 +ffffffff81783a10 T ixgbe_get_supported_physical_layer_82598 +ffffffff81783be0 T ixgbe_read_analog_reg8_82598 +ffffffff81783c90 T ixgbe_write_analog_reg8_82598 +ffffffff81783d10 T ixgbe_set_lan_id_multi_port_pcie_82598 +ffffffff81783db0 T ixgbe_enable_rx_dma_82598 +ffffffff81783e00 T ixgbe_set_vmdq_82598 +ffffffff81783eb0 T ixgbe_clear_vmdq_82598 +ffffffff81783f60 T ixgbe_set_vfta_82598 +ffffffff81784090 T ixgbe_clear_vfta_82598 +ffffffff81784240 T ixgbe_fc_enable_82598 +ffffffff817846a0 T ixgbe_read_i2c_eeprom_82598 +ffffffff817846c0 T ixgbe_check_mac_link_82598 +ffffffff81784950 T ixgbe_setup_mac_link_82598 +ffffffff81784b10 T ixgbe_get_link_capabilities_82598 +ffffffff81784bd0 T ixgbe_setup_copper_link_82598 +ffffffff81784ce0 T ixgbe_start_mac_link_82598 +ffffffff81784e00 T ixgbe_validate_link_ready +ffffffff81784eb0 T ixgbe_read_i2c_phy_82598 +ffffffff81786000 T ixgbe_init_mac_link_ops_82599 +ffffffff81786190 T ixgbe_disable_tx_laser_multispeed_fiber +ffffffff81786250 T ixgbe_enable_tx_laser_multispeed_fiber +ffffffff817862d0 T ixgbe_flap_tx_laser_multispeed_fiber +ffffffff81786410 T ixgbe_setup_mac_link_82599 +ffffffff817866a0 T ixgbe_set_hard_rate_select_speed +ffffffff81786760 T ixgbe_verify_lesm_fw_enabled_82599 +ffffffff81786820 T ixgbe_setup_mac_link_smartspeed +ffffffff81786ba0 T ixgbe_init_phy_ops_82599 +ffffffff81786cf0 T ixgbe_read_i2c_byte_82599 +ffffffff81786e60 T ixgbe_write_i2c_byte_82599 +ffffffff81786fd0 T ixgbe_setup_copper_link_82599 +ffffffff81787030 T ixgbe_setup_sfp_modules_82599 +ffffffff817871f0 T prot_autoc_read_82599 +ffffffff81787300 T prot_autoc_write_82599 +ffffffff81787470 T ixgbe_reset_pipeline_82599 +ffffffff817877b0 T ixgbe_init_ops_82599 +ffffffff81787990 T ixgbe_identify_phy_82599 +ffffffff81787a20 T ixgbe_reset_hw_82599 +ffffffff81787f60 T ixgbe_get_media_type_82599 +ffffffff81788090 T ixgbe_get_supported_physical_layer_82599 +ffffffff81788250 T ixgbe_enable_rx_dma_82599 +ffffffff817882c0 T ixgbe_read_analog_reg8_82599 +ffffffff81788370 T ixgbe_write_analog_reg8_82599 +ffffffff817883f0 T ixgbe_start_hw_82599 +ffffffff817884f0 T ixgbe_get_link_capabilities_82599 +ffffffff81788630 T ixgbe_stop_mac_link_on_d3_82599 +ffffffff817886e0 T ixgbe_read_eeprom_82599 +ffffffff81788710 T ixgbe_start_mac_link_82599 +ffffffff817888f0 T ixgbe_verify_fw_version_82599 +ffffffff81789000 T ixgbe_init_ops_X540 +ffffffff81789220 T ixgbe_init_eeprom_params_X540 +ffffffff817892a0 T ixgbe_read_eerd_X540 +ffffffff81789330 T ixgbe_write_eewr_X540 +ffffffff817893c0 T ixgbe_update_eeprom_checksum_X540 +ffffffff81789490 T ixgbe_validate_eeprom_checksum_X540 +ffffffff81789580 T ixgbe_calc_eeprom_checksum_X540 +ffffffff81789720 T ixgbe_reset_hw_X540 +ffffffff81789ab0 T ixgbe_get_media_type_X540 +ffffffff81789ae0 T ixgbe_get_supported_physical_layer_X540 +ffffffff81789b50 T ixgbe_start_hw_X540 +ffffffff81789ba0 T ixgbe_acquire_swfw_sync_X540 +ffffffff81789ff0 T ixgbe_release_swfw_sync_X540 +ffffffff8178a120 T ixgbe_init_swfw_sync_X540 +ffffffff8178a200 T ixgbe_setup_mac_link_X540 +ffffffff8178a220 T ixgbe_blink_led_start_X540 +ffffffff8178a340 T ixgbe_blink_led_stop_X540 +ffffffff8178a440 T ixgbe_get_link_capabilities_X540 +ffffffff8178a480 T ixgbe_update_flash_X540 +ffffffff8178a660 T ixgbe_poll_flash_update_done_X540 +ffffffff8178a6f0 T ixgbe_get_swfw_sync_semaphore +ffffffff8178a880 T ixgbe_release_swfw_sync_semaphore +ffffffff8178b000 T ixgbe_init_ops_X550 +ffffffff8178b110 T ixgbe_dmac_config_X550 +ffffffff8178b1f0 T ixgbe_dmac_config_tcs_X550 +ffffffff8178b340 T ixgbe_dmac_update_tcs_X550 +ffffffff8178b3f0 T ixgbe_set_source_address_pruning_X550 +ffffffff8178b4d0 T ixgbe_init_eeprom_params_X550 +ffffffff8178b550 T ixgbe_calc_eeprom_checksum_X550 +ffffffff8178b560 T ixgbe_read_ee_hostif_X550 +ffffffff8178b630 T ixgbe_write_ee_hostif_X550 +ffffffff8178b6f0 T ixgbe_update_eeprom_checksum_X550 +ffffffff8178b880 T ixgbe_validate_eeprom_checksum_X550 +ffffffff8178b9c0 T ixgbe_disable_rx_x550 +ffffffff8178bae0 T ixgbe_led_on_t_X550em +ffffffff8178bba0 T ixgbe_led_off_t_X550em +ffffffff8178bc60 T ixgbe_read_cs4227 +ffffffff8178bc90 T ixgbe_write_cs4227 +ffffffff8178bcb0 T ixgbe_read_pe +ffffffff8178bd00 T ixgbe_write_pe +ffffffff8178bd50 T ixgbe_reset_cs4227 +ffffffff8178bfd0 T ixgbe_check_cs4227 +ffffffff8178c180 T ixgbe_setup_mux_ctl +ffffffff8178c200 T ixgbe_identify_phy_x550em +ffffffff8178c420 T ixgbe_read_mng_if_sel_x550em +ffffffff8178c490 T ixgbe_fw_phy_activity +ffffffff8178c5b0 T ixgbe_get_phy_id_fw +ffffffff8178c6b0 T ixgbe_identify_phy_fw +ffffffff8178c700 T ixgbe_shutdown_fw_phy +ffffffff8178c760 T ixgbe_read_phy_reg_x550em +ffffffff8178c790 T ixgbe_write_phy_reg_x550em +ffffffff8178c7c0 T ixgbe_init_ops_X550EM +ffffffff8178ca70 T ixgbe_get_bus_info_X550em +ffffffff8178cac0 T ixgbe_get_media_type_X550em +ffffffff8178cbb0 T ixgbe_setup_sfp_modules_X550em +ffffffff8178cd40 T ixgbe_get_link_capabilities_X550em +ffffffff8178ce10 T ixgbe_reset_hw_X550em +ffffffff8178d480 T ixgbe_get_supported_physical_layer_X550em +ffffffff8178d600 T ixgbe_setup_fc_X550em +ffffffff8178d750 T ixgbe_init_phy_ops_X550em +ffffffff8178dc20 T ixgbe_setup_fw_link +ffffffff8178dd50 T ixgbe_fc_autoneg_fw +ffffffff8178dd70 T ixgbe_setup_eee_fw +ffffffff8178ddd0 T ixgbe_init_ops_X550EM_a +ffffffff8178df00 T ixgbe_read_iosf_sb_reg_x550 +ffffffff8178e080 T ixgbe_write_iosf_sb_reg_x550 +ffffffff8178e200 T ixgbe_read_iosf_sb_reg_x550a +ffffffff8178e290 T ixgbe_write_iosf_sb_reg_x550a +ffffffff8178e320 T ixgbe_acquire_swfw_sync_X550a +ffffffff8178e450 T ixgbe_release_swfw_sync_X550a +ffffffff8178e4e0 T ixgbe_fc_autoneg_fiber_x550em_a +ffffffff8178e520 T ixgbe_fc_autoneg_backplane_x550em_a +ffffffff8178e680 T ixgbe_setup_fc_backplane_x550em_a +ffffffff8178e870 T ixgbe_fc_autoneg_sgmii_x550em_a +ffffffff8178e960 T ixgbe_init_ops_X550EM_x +ffffffff8178ea20 T ixgbe_acquire_swfw_sync_X550em +ffffffff8178ead0 T ixgbe_release_swfw_sync_X550em +ffffffff8178eb60 T ixgbe_iosf_wait +ffffffff8178ec10 T ixgbe_get_phy_token +ffffffff8178ec90 T ixgbe_put_phy_token +ffffffff8178ed10 T ixgbe_supported_sfp_modules_X550em +ffffffff8178ed90 T ixgbe_identify_sfp_module_X550em +ffffffff8178ee00 T ixgbe_init_mac_link_ops_X550em +ffffffff8178ef40 T ixgbe_restart_an_internal_phy_x550em +ffffffff8178f050 T ixgbe_setup_sgmii +ffffffff8178f2f0 T ixgbe_setup_sgmii_fw +ffffffff8178f5c0 T ixgbe_setup_mac_link_sfp_x550a +ffffffff8178f7b0 T ixgbe_setup_mac_link_sfp_x550em +ffffffff8178f870 T ixgbe_setup_mac_link_t_X550em +ffffffff8178f920 T ixgbe_check_link_t_X550em +ffffffff8178f9f0 T ixgbe_get_lasi_ext_t_x550em +ffffffff8178fb70 T ixgbe_enable_lasi_ext_t_x550em +ffffffff8178fd00 T ixgbe_setup_kr_speed_x550em +ffffffff8178ff10 T ixgbe_reset_phy_fw +ffffffff8178ffe0 T ixgbe_check_overtemp_fw +ffffffff81790070 T ixgbe_read_phy_reg_x550a +ffffffff81790110 T ixgbe_write_phy_reg_x550a +ffffffff817901b0 T ixgbe_setup_kr_x550em +ffffffff81790220 T ixgbe_setup_internal_phy_t_x550em +ffffffff817903b0 T ixgbe_enter_lplu_t_x550em +ffffffff817906a0 T ixgbe_handle_lasi_ext_t_x550em +ffffffff81790720 T ixgbe_reset_phy_t_X550em +ffffffff81790770 T ixgbe_set_mdio_speed +ffffffff81790840 T ixgbe_init_ext_t_x550em +ffffffff817908f0 T ixgbe_setup_sfi_x550a +ffffffff81790aa0 T ixgbe_setup_ixfi_x550em_x +ffffffff81790c80 T ixgbe_setup_ixfi_x550em +ffffffff81790e60 T ixgbe_ext_phy_t_x550em_get_link +ffffffff81790ef0 T ixgbe_setup_phy_loopback_x550em +ffffffff817910e0 T ixgbe_read_ee_hostif_buffer_X550 +ffffffff81791270 T ixgbe_write_ee_hostif_data_X550 +ffffffff817912d0 T ixgbe_checksum_ptr_x550 +ffffffff81791450 T ixgbe_calc_checksum_X550 +ffffffff817915e0 T ixgbe_update_flash_X550 +ffffffff81791630 T ixgbe_get_lcd_t_x550em +ffffffff817916e0 T ixgbe_set_mux +ffffffff81792000 T ixgbe_read_i2c_combined_generic_int +ffffffff81792250 T ixgbe_i2c_start +ffffffff817923b0 T ixgbe_clock_in_i2c_byte +ffffffff817924a0 T ixgbe_clock_out_i2c_bit +ffffffff817925b0 T ixgbe_i2c_stop +ffffffff81792730 T ixgbe_i2c_bus_clear +ffffffff81792850 T ixgbe_read_i2c_combined_generic +ffffffff81792870 T ixgbe_read_i2c_combined_generic_unlocked +ffffffff81792890 T ixgbe_write_i2c_combined_generic_int +ffffffff81792a70 T ixgbe_write_i2c_combined_generic +ffffffff81792a90 T ixgbe_write_i2c_combined_generic_unlocked +ffffffff81792ab0 T ixgbe_init_phy_ops_generic +ffffffff81792be0 T ixgbe_identify_phy_generic +ffffffff817930b0 T ixgbe_reset_phy_generic +ffffffff81793240 T ixgbe_read_phy_reg_generic +ffffffff817932e0 T ixgbe_write_phy_reg_generic +ffffffff81793380 T ixgbe_read_phy_reg_mdi +ffffffff81793500 T ixgbe_write_phy_reg_mdi +ffffffff81793660 T ixgbe_setup_phy_link_generic +ffffffff81793910 T ixgbe_setup_phy_link_speed_generic +ffffffff81793960 T ixgbe_get_phy_firmware_version_generic +ffffffff81793980 T ixgbe_read_i2c_byte_generic +ffffffff817939a0 T ixgbe_write_i2c_byte_generic +ffffffff817939c0 T ixgbe_read_i2c_eeprom_generic +ffffffff817939e0 T ixgbe_write_i2c_eeprom_generic +ffffffff81793a00 T ixgbe_identify_module_generic +ffffffff81793a70 T ixgbe_read_i2c_byte_generic_unlocked +ffffffff81793a90 T ixgbe_write_i2c_byte_generic_unlocked +ffffffff81793ab0 T ixgbe_tn_check_overtemp +ffffffff81793b20 T ixgbe_check_reset_blocked +ffffffff81793b80 T ixgbe_validate_phy_addr +ffffffff81793be0 T ixgbe_get_phy_id +ffffffff81793c90 T ixgbe_get_phy_type_from_id +ffffffff81793d50 T ixgbe_get_copper_link_capabilities_generic +ffffffff81793e30 T ixgbe_get_copper_speeds_supported +ffffffff81793ee0 T ixgbe_check_phy_link_tnx +ffffffff81794190 T ixgbe_setup_phy_link_tnx +ffffffff81794440 T ixgbe_get_phy_firmware_version_tnx +ffffffff81794460 T ixgbe_reset_phy_nl +ffffffff81794700 T ixgbe_get_sfp_init_sequence_offsets +ffffffff817948e0 T ixgbe_is_sfp +ffffffff81794930 T ixgbe_identify_sfp_module_generic +ffffffff81794d10 T ixgbe_identify_qsfp_module_generic +ffffffff81795000 T ixgbe_get_supported_phy_sfp_layer_generic +ffffffff817951a0 T ixgbe_is_sfp_probe +ffffffff817951e0 T ixgbe_read_i2c_byte_generic_int +ffffffff817953d0 T ixgbe_clock_out_i2c_byte +ffffffff81795530 T ixgbe_get_i2c_ack +ffffffff81795730 T ixgbe_write_i2c_byte_generic_int +ffffffff81795860 T ixgbe_set_i2c_data +ffffffff81795a10 T ixgbe_raise_i2c_clk +ffffffff81795b20 T ixgbe_lower_i2c_clk +ffffffff81795bb0 T ixgbe_clock_in_i2c_bit +ffffffff81795d80 T ixgbe_get_i2c_data +ffffffff81795e30 T ixgbe_set_copper_phy_power +ffffffff81796000 t ixl_match +ffffffff817960a0 t ixl_attach +ffffffff81798b20 t ixl_710_rd_ctl +ffffffff81798cb0 t ixl_710_wr_ctl +ffffffff81798e60 t ixl_710_set_rss_key +ffffffff81798fe0 t ixl_710_set_rss_lut +ffffffff81799060 t ixl_wakeup +ffffffff81799070 t ixl_722_rd_ctl +ffffffff81799090 t ixl_722_wr_ctl +ffffffff817990c0 t ixl_722_set_rss_key +ffffffff817990f0 t ixl_722_set_rss_lut +ffffffff81799120 t ixl_dmamem_alloc +ffffffff81799280 t ixl_arq +ffffffff81799480 t ixl_arq_fill +ffffffff817996f0 t ixl_intr0 +ffffffff81799900 t ixl_intr_vector +ffffffff817999a0 t ixl_ioctl +ffffffff8179b870 t ixl_start +ffffffff8179bdf0 t ixl_watchdog +ffffffff8179be20 t ixl_media_change +ffffffff8179be50 t ixl_media_status +ffffffff8179bed0 t ixl_link_state_update +ffffffff8179c010 t ixl_link_state_update_iaq +ffffffff8179c0c0 t ixl_set_link_status +ffffffff8179c270 t ixl_atq_poll +ffffffff8179c460 t ixl_rxeof +ffffffff8179c740 t ixl_txeof +ffffffff8179c920 t ixl_rxfill +ffffffff8179cb10 t ixl_down +ffffffff8179d330 t ixl_rxrefill +ffffffff8179d350 t ixl_sfp_open +ffffffff8179d700 t ixl_sfp_get +ffffffff8179d900 t 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pccbb_pcmcia_mem_alloc +ffffffff817cfd30 T pccbb_pcmcia_mem_free +ffffffff817cfd50 T pccbb_pcmcia_mem_map +ffffffff817cfe80 T pccbb_pcmcia_mem_unmap +ffffffff817cff10 T pccbb_pcmcia_intr_establish +ffffffff817cff30 T pccbb_pcmcia_intr_disestablish +ffffffff817cff40 T pccbb_pcmcia_intr_string +ffffffff817cff80 T pccbb_rbus_cb_space_alloc +ffffffff817d00a0 T pccbb_open_win +ffffffff817d0220 T pccbb_rbus_cb_space_free +ffffffff817d0330 T pccbb_close_win +ffffffff817d03e0 T pccbb_winlist_insert +ffffffff817d04e0 T pccbb_winset +ffffffff817d07c0 T pccbb_winlist_delete +ffffffff817d1000 T sk_xmac_miibus_readreg +ffffffff817d1180 T sk_xmac_miibus_writereg +ffffffff817d12e0 T sk_xmac_miibus_statchg +ffffffff817d13a0 T sk_marv_miibus_readreg +ffffffff817d14d0 T sk_marv_miibus_writereg +ffffffff817d15f0 T sk_marv_miibus_statchg +ffffffff817d1620 T sk_setfilt +ffffffff817d16e0 T sk_iff +ffffffff817d1700 T sk_iff_xmac +ffffffff817d1930 T sk_iff_yukon +ffffffff817d1b30 T sk_init_rx_ring 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T iwm_send_paging_cmd +ffffffff81813230 T iwm_free_fw_paging +ffffffff81813390 T iwm_run_init_mvm_ucode +ffffffff818137e0 T iwm_send_bt_init_conf +ffffffff81813870 T iwm_sf_config +ffffffff81813ac0 T iwm_config_ltr +ffffffff81813b80 T iwm_get_signal_strength +ffffffff81813be0 T iwm_rxmq_get_signal_strength +ffffffff81813c20 T iwm_rx_rx_phy_cmd +ffffffff81813c80 T iwm_get_noise +ffffffff81813cf0 T iwm_ccmp_decap +ffffffff81813df0 T iwm_rx_hwdecrypt +ffffffff81813ec0 T iwm_rx_frame +ffffffff818141e0 T iwm_rx_mpdu +ffffffff818143e0 T iwm_flip_address +ffffffff81814430 T iwm_detect_duplicate +ffffffff81814530 T iwm_is_sn_less +ffffffff81814580 T iwm_oldsn_workaround +ffffffff81814640 T iwm_rx_reorder +ffffffff81814c70 T iwm_rx_mpdu_mq +ffffffff81815080 T iwm_ra_choose +ffffffff81815130 T iwm_ht_single_rate_control +ffffffff81815360 T iwm_vht_single_rate_control +ffffffff818155b0 T iwm_rx_tx_cmd_single +ffffffff81815780 T iwm_txd_done +ffffffff81815850 T iwm_reset_sched +ffffffff81815900 T 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iwm_radiotap_attach +ffffffff81823300 T iwm_init_task +ffffffff818233c0 T iwm_resume +ffffffff818234f0 T iwm_wakeup +ffffffff81823590 T iwm_activate +ffffffff81824000 T iwx_lookup_cmd_ver +ffffffff81824070 T iwx_lookup_notif_ver +ffffffff818240e0 T iwx_is_mimo_ht_plcp +ffffffff81824120 T iwx_is_mimo_mcs +ffffffff81824160 T iwx_store_cscheme +ffffffff818241b0 T iwx_ctxt_info_alloc_dma +ffffffff81824240 T iwx_dma_contig_alloc +ffffffff81824420 T iwx_ctxt_info_free_paging +ffffffff81824580 T iwx_dma_contig_free +ffffffff81824630 T iwx_get_num_sections +ffffffff818246b0 T iwx_init_fw_sec +ffffffff81824b50 T iwx_fw_version_str +ffffffff81824b90 T iwx_alloc_fw_monitor_block +ffffffff81824c30 T iwx_alloc_fw_monitor +ffffffff81824ce0 T iwx_apply_debug_destination +ffffffff81825220 T iwx_nic_lock +ffffffff81825360 T iwx_write_prph +ffffffff81825400 T iwx_set_bits_prph +ffffffff81825420 T iwx_clear_bits_prph +ffffffff81825440 T iwx_read_prph +ffffffff818254d0 T iwx_nic_unlock +ffffffff81825580 T iwx_set_ltr +ffffffff818256c0 T iwx_ctxt_info_init +ffffffff81825980 T iwx_ctxt_info_free_fw_img +ffffffff81825af0 T iwx_ctxt_info_gen3_init +ffffffff818260e0 T iwx_write_umac_prph +ffffffff81826180 T iwx_firmware_store_section +ffffffff81826220 T iwx_set_default_calib +ffffffff81826270 T iwx_fw_info_free +ffffffff81826300 T iwx_read_firmware +ffffffff81826e80 T iwx_prph_addr_mask +ffffffff81826ec0 T iwx_read_prph_unlocked +ffffffff81826f30 T iwx_nic_assert_locked +ffffffff81826f90 T iwx_write_prph_unlocked +ffffffff81827010 T iwx_write_prph64 +ffffffff81827130 T iwx_read_umac_prph_unlocked +ffffffff818271b0 T iwx_read_umac_prph +ffffffff81827250 T iwx_write_umac_prph_unlocked +ffffffff818272d0 T iwx_read_mem +ffffffff81827400 T iwx_write_mem +ffffffff81827540 T iwx_write_mem32 +ffffffff81827640 T iwx_poll_bit +ffffffff81827710 T iwx_set_bits_mask_prph +ffffffff818278f0 T iwx_alloc_rx_ring +ffffffff81827ad0 T iwx_rx_addbuf +ffffffff81827ce0 T iwx_free_rx_ring +ffffffff81827f90 T iwx_disable_rx_dma +ffffffff818281f0 T iwx_reset_rx_ring +ffffffff81828290 T iwx_alloc_tx_ring +ffffffff81828490 T iwx_free_tx_ring +ffffffff81828720 T iwx_reset_tx_ring +ffffffff81828980 T iwx_enable_rfkill_int +ffffffff81828a60 T iwx_check_rfkill +ffffffff81828ae0 T iwx_enable_interrupts +ffffffff81828b90 T iwx_enable_fwload_interrupt +ffffffff81828c70 T iwx_restore_interrupts +ffffffff81828ca0 T iwx_disable_interrupts +ffffffff81828d50 T iwx_ict_reset +ffffffff81828f10 T iwx_set_hw_ready +ffffffff818290e0 T iwx_prepare_card_hw +ffffffff81829220 T iwx_force_power_gating +ffffffff818292d0 T iwx_apm_config +ffffffff818293a0 T iwx_apm_init +ffffffff818295f0 T iwx_apm_stop +ffffffff818299b0 T iwx_init_msix_hw +ffffffff81829a50 T iwx_conf_msix_hw +ffffffff81829ff0 T iwx_clear_persistence_bit +ffffffff8182a170 T iwx_start_hw +ffffffff8182a560 T iwx_stop_device +ffffffff8182aad0 T iwx_nic_config +ffffffff8182ab50 T iwx_nic_rx_init +ffffffff8182aba0 T iwx_nic_init +ffffffff8182acc0 T iwx_enable_txq +ffffffff8182ae90 T iwx_send_cmd +ffffffff8182b470 T iwx_free_resp +ffffffff8182b4e0 T iwx_disable_txq +ffffffff8182b650 T iwx_post_alive +ffffffff8182b660 T iwx_schedule_session_protection +ffffffff8182b730 T iwx_send_cmd_pdu +ffffffff8182b7b0 T iwx_unprotect_session +ffffffff8182b880 T iwx_fw_valid_tx_ant +ffffffff8182b8c0 T iwx_fw_valid_rx_ant +ffffffff8182b900 T iwx_init_channel_map +ffffffff8182baf0 T iwx_mimo_enabled +ffffffff8182bb30 T iwx_setup_ht_rates +ffffffff8182bbd0 T iwx_setup_vht_rates +ffffffff8182bc50 T iwx_init_reorder_buffer +ffffffff8182bcb0 T iwx_clear_reorder_buffer +ffffffff8182bd60 T iwx_rx_ba_session_expired +ffffffff8182be60 T iwx_rx_bar_frame_release +ffffffff8182bf00 T iwx_release_frames +ffffffff8182c0f0 T iwx_reorder_timer_expired +ffffffff8182c2a0 T iwx_sta_rx_agg +ffffffff8182c6f0 T iwx_send_cmd_pdu_status +ffffffff8182c780 T iwx_mac_ctxt_task +ffffffff8182c910 T iwx_mac_ctxt_cmd +ffffffff8182cb10 T iwx_phy_ctxt_task +ffffffff8182ccd0 T iwx_phy_ctxt_update +ffffffff8182d000 T iwx_updatechan +ffffffff8182d0c0 T iwx_add_task +ffffffff8182d130 T iwx_updateprot +ffffffff8182d1f0 T iwx_updateslot +ffffffff8182d2b0 T iwx_updateedca +ffffffff8182d370 T iwx_updatedtim +ffffffff8182d430 T iwx_sta_tx_agg_start +ffffffff8182d620 T iwx_ba_task +ffffffff8182d770 T iwx_ampdu_rx_start +ffffffff8182d840 T iwx_ampdu_rx_stop +ffffffff8182d910 T iwx_ampdu_tx_start +ffffffff8182da20 T iwx_set_mac_addr_from_csr +ffffffff8182dc40 T iwx_flip_hw_address +ffffffff8182dc90 T iwx_is_valid_mac_addr +ffffffff8182dd20 T iwx_nvm_get +ffffffff8182dff0 T iwx_load_firmware +ffffffff8182e1c0 T iwx_start_fw +ffffffff8182e3a0 T iwx_pnvm_handle_section +ffffffff8182e690 T iwx_ctxt_info_gen3_set_pnvm +ffffffff8182e6e0 T iwx_pnvm_parse +ffffffff8182e7c0 T iwx_load_pnvm +ffffffff8182eb60 T iwx_send_tx_ant_cfg +ffffffff8182ebf0 T iwx_send_phy_cfg_cmd +ffffffff8182ec90 T iwx_send_dqa_cmd +ffffffff8182ed20 T iwx_load_ucode_wait_alive +ffffffff8182ed90 T iwx_run_init_mvm_ucode +ffffffff8182f010 T iwx_config_ltr +ffffffff8182f0d0 T iwx_update_rx_desc +ffffffff8182f170 T iwx_rxmq_get_signal_strength +ffffffff8182f1c0 T iwx_rx_rx_phy_cmd +ffffffff8182f220 T iwx_get_noise +ffffffff8182f290 T iwx_ccmp_decap +ffffffff8182f3d0 T iwx_rx_hwdecrypt +ffffffff8182f4d0 T iwx_rx_frame +ffffffff8182f750 T iwx_detect_duplicate +ffffffff8182f850 T iwx_is_sn_less +ffffffff8182f8a0 T iwx_oldsn_workaround +ffffffff8182f960 T iwx_rx_reorder +ffffffff8182ff90 T iwx_rx_mpdu_mq +ffffffff818302e0 T iwx_clear_tx_desc +ffffffff81830450 T iwx_txd_done +ffffffff81830510 T iwx_txq_advance +ffffffff81830850 T iwx_tx_update_byte_tbl +ffffffff818308f0 T iwx_rx_tx_cmd +ffffffff81830a60 T iwx_clear_oactive +ffffffff81830ae0 T iwx_rx_compressed_ba +ffffffff81830c60 T iwx_rx_bmiss +ffffffff81830d50 T iwx_binding_cmd +ffffffff81830ed0 T iwx_get_vht_ctrl_pos +ffffffff81830f40 T iwx_phy_ctxt_cmd_uhb_v3 +ffffffff81831150 T iwx_phy_ctxt_cmd_v3 +ffffffff81831360 T iwx_phy_ctxt_cmd +ffffffff81831460 T iwx_send_cmd_status +ffffffff81831570 T iwx_cmd_done +ffffffff81831650 T iwx_tx_fill_cmd +ffffffff81831a30 T iwx_rval2ridx +ffffffff81831ac0 T iwx_tx +ffffffff818321c0 T iwx_flush_sta_tids +ffffffff81832370 T iwx_wait_tx_queues_empty +ffffffff81832430 T iwx_drain_sta +ffffffff818325c0 T iwx_flush_sta +ffffffff81832920 T iwx_beacon_filter_send_cmd +ffffffff818329a0 T iwx_update_beacon_abort +ffffffff81832ab0 T iwx_power_build_cmd +ffffffff81832b40 T iwx_power_mac_update_mode +ffffffff81832d60 T iwx_power_update_device +ffffffff81832e00 T iwx_enable_beacon_filter +ffffffff81832f10 T iwx_disable_beacon_filter +ffffffff81833000 T iwx_add_sta_cmd +ffffffff81833300 T iwx_rm_sta_cmd +ffffffff818333c0 T iwx_rm_sta +ffffffff818335b0 T iwx_umac_scan_fill_channels +ffffffff818336f0 T iwx_fill_probe_req +ffffffff81833930 T iwx_config_umac_scan_reduced +ffffffff81833a90 T iwx_scan_umac_flags_v2 +ffffffff81833ad0 T iwx_scan_umac_dwell_v10 +ffffffff81833b40 T iwx_scan_umac_fill_general_p_v10 +ffffffff81833bd0 T iwx_scan_umac_fill_ch_p_v6 +ffffffff81833d10 T iwx_umac_scan_v14 +ffffffff81834010 T iwx_mcc_update +ffffffff818340a0 T iwx_ridx2rate +ffffffff81834110 T iwx_ack_rates +ffffffff818343c0 T iwx_mac_ctxt_cmd_common +ffffffff818346d0 T iwx_mac_ctxt_cmd_fill_sta +ffffffff81834780 T iwx_clear_statistics +ffffffff81834850 T iwx_del_task +ffffffff818348b0 T iwx_scan +ffffffff81834a50 T iwx_scan_abort +ffffffff81834af0 T iwx_bgscan +ffffffff81834b70 T iwx_bgscan_done +ffffffff81834c10 T iwx_bgscan_done_task +ffffffff81834d80 T iwx_umac_scan_abort +ffffffff81834e10 T iwx_enable_mgmt_queue +ffffffff81834e90 T iwx_rs_rval2idx +ffffffff81834f00 T iwx_rs_ht_rates +ffffffff81834fd0 T iwx_rs_vht_rates +ffffffff81835090 T iwx_rs_init +ffffffff818354c0 T iwx_rs_update +ffffffff81835640 T iwx_auth +ffffffff81835c50 T iwx_deauth +ffffffff81835ef0 T iwx_run +ffffffff81836530 T iwx_sf_config +ffffffff81836780 T iwx_allow_mcast +ffffffff81836880 T iwx_run_stop +ffffffff81836c50 T iwx_node_alloc +ffffffff81836c70 T iwx_set_key +ffffffff81836d90 T iwx_add_sta_key +ffffffff81837000 T iwx_setkey_task +ffffffff818370d0 T iwx_delete_key +ffffffff81837250 T iwx_media_change +ffffffff81837430 T iwx_stop +ffffffff818378d0 T iwx_init +ffffffff81837b90 T iwx_newstate_task +ffffffff81837cd0 T iwx_newstate +ffffffff81837ea0 T iwx_endscan +ffffffff81837ef0 T iwx_fill_sf_command +ffffffff81837fe0 T iwx_send_bt_init_conf +ffffffff81838070 T iwx_send_soc_conf +ffffffff818381a0 T iwx_send_update_mcc_cmd +ffffffff81838330 T iwx_send_temp_report_ths_cmd +ffffffff81838400 T iwx_init_hw +ffffffff81838ca0 T iwx_preinit +ffffffff81838f50 T iwx_start +ffffffff81839110 T iwx_watchdog +ffffffff81839320 T iwx_nic_error +ffffffff81839810 T iwx_dump_driver_status +ffffffff81839a40 T iwx_ioctl +ffffffff81839ba0 T iwx_nic_umac_error +ffffffff81839fe0 T iwx_desc_lookup +ffffffff8183a170 T iwx_rx_pkt_valid +ffffffff8183a1c0 T iwx_rx_pkt +ffffffff8183b090 T iwx_notif_intr +ffffffff8183b1e0 T iwx_intr +ffffffff8183b670 T iwx_intr_msix +ffffffff8183b980 T iwx_match +ffffffff8183b9a0 T iwx_attach_hook +ffffffff8183b9e0 T iwx_find_device_cfg +ffffffff8183bb70 T iwx_attach +ffffffff8183cae0 T iwx_radiotap_attach +ffffffff8183cb70 T iwx_init_task +ffffffff8183cc30 T iwx_resume +ffffffff8183cd60 T iwx_wakeup +ffffffff8183ce00 T iwx_activate +ffffffff8183d000 T cmpci_match +ffffffff8183d020 T cmpci_attach +ffffffff8183d4f0 T cmpci_activate +ffffffff8183d570 T cmpci_open +ffffffff8183d5a0 T cmpci_close +ffffffff8183d5d0 T cmpci_set_params +ffffffff8183e030 T cmpci_round_blocksize +ffffffff8183e060 T cmpci_halt_output +ffffffff8183e210 T cmpci_halt_input +ffffffff8183e380 T cmpci_set_port +ffffffff8183e4d0 T cmpci_get_port +ffffffff8183e5a0 T cmpci_query_devinfo +ffffffff8183ed70 T cmpci_malloc +ffffffff8183edc0 T cmpci_free +ffffffff8183ee90 T cmpci_round_buffersize +ffffffff8183eed0 T cmpci_trigger_output +ffffffff8183f1c0 T cmpci_trigger_input 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et_init_rx_ring +ffffffff81864bf0 T et_chip_init +ffffffff81864ed0 T et_enable_txrx +ffffffff81864ff0 T et_start_rxdma +ffffffff818650c0 T et_start_txdma +ffffffff81865110 T et_setmulti +ffffffff81865340 T et_encap +ffffffff81865740 T et_init_mac +ffffffff818658a0 T et_init_rxmac +ffffffff81865b40 T et_init_txmac +ffffffff81865bc0 T et_init_rxdma +ffffffff81865f30 T et_init_txdma +ffffffff81866060 T et_newbuf_cluster +ffffffff81866080 T et_newbuf +ffffffff818662c0 T et_newbuf_hdr +ffffffff81867000 T jme_match +ffffffff81867020 T jme_attach +ffffffff818675a0 T jme_miibus_readreg +ffffffff818676b0 T jme_miibus_writereg +ffffffff818677d0 T jme_miibus_statchg +ffffffff81867d00 T jme_stop_rx +ffffffff81867df0 T jme_stop_tx +ffffffff81867ee0 T jme_rxeof +ffffffff81868000 T jme_txeof +ffffffff81868240 T jme_init_tx_ring +ffffffff818682f0 T jme_init_ssb +ffffffff81868350 T jme_mac_config +ffffffff81868760 T jme_mediastatus +ffffffff818687c0 T jme_mediachange +ffffffff81868820 T jme_eeprom_read_byte +ffffffff81868970 T jme_eeprom_macaddr +ffffffff81868ab0 T jme_reg_macaddr +ffffffff81868b40 T jme_map_intr_vector +ffffffff81868be0 T jme_intr +ffffffff81868d90 T jme_reset +ffffffff81868e00 T jme_dma_alloc +ffffffff818693d0 T jme_ioctl +ffffffff81869520 T jme_start +ffffffff81869670 T jme_watchdog +ffffffff81869710 T jme_tick +ffffffff81869770 T jme_detach +ffffffff81869830 T jme_stop +ffffffff81869b10 T jme_dma_free +ffffffff81869c40 T jme_encap +ffffffff81869ec0 T jme_init +ffffffff8186a620 T jme_iff +ffffffff8186a770 T jme_discard_rxbufs +ffffffff8186a7f0 T jme_rxpkt +ffffffff8186ab60 T jme_newbuf +ffffffff8186acd0 T jme_init_rx_ring +ffffffff8186adf0 T jme_set_vlan +ffffffff8186b000 T age_match +ffffffff8186b020 T age_attach +ffffffff8186b480 T age_intr +ffffffff8186b670 T age_phy_reset +ffffffff8186bf30 T age_reset +ffffffff8186c060 T age_dma_alloc +ffffffff8186c7d0 T age_get_macaddr +ffffffff8186c9b0 T age_ioctl +ffffffff8186cb00 T age_start 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alc_detach +ffffffff81870980 T alc_activate +ffffffff81870a00 T alc_miibus_readreg +ffffffff81870bb0 T alc_mii_readreg_816x +ffffffff81870cb0 T alc_mii_readreg_813x +ffffffff81870dc0 T alc_miibus_writereg +ffffffff81870f90 T alc_mii_writereg_816x +ffffffff818710a0 T alc_mii_writereg_813x +ffffffff818711a0 T alc_miibus_statchg +ffffffff81871550 T alc_stop_mac +ffffffff81871640 T alc_start_queue +ffffffff818716f0 T alc_mac_config +ffffffff818717c0 T alc_aspm +ffffffff81871890 T alc_dsp_fixup +ffffffff81871ea0 T alc_miidbg_readreg +ffffffff81871ee0 T alc_miidbg_writereg +ffffffff81871f20 T alc_miiext_readreg +ffffffff81872050 T alc_miiext_writereg +ffffffff81872190 T alc_mediastatus +ffffffff81872200 T alc_mediachange +ffffffff81872260 T alc_get_macaddr +ffffffff81872280 T alc_get_macaddr_816x +ffffffff81872500 T alc_get_macaddr_813x +ffffffff818729b0 T alc_get_macaddr_par +ffffffff81872a60 T alc_disable_l0s_l1 +ffffffff81872ae0 T alc_phy_reset +ffffffff81872b00 T alc_phy_reset_816x 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alc_rxvlan +ffffffff81877b50 T alc_stop_queue +ffffffff81878000 T ale_match +ffffffff81878020 T ale_attach +ffffffff81878570 T ale_activate +ffffffff818785f0 T ale_miibus_readreg +ffffffff81878710 T ale_miibus_writereg +ffffffff81878810 T ale_miibus_statchg +ffffffff81878a30 T ale_stop_mac +ffffffff81878b20 T ale_mac_config +ffffffff81878bc0 T ale_mediastatus +ffffffff81878c30 T ale_mediachange +ffffffff81878c90 T ale_get_macaddr +ffffffff81878e70 T ale_phy_reset +ffffffff818794b0 T ale_intr +ffffffff81879600 T ale_reset +ffffffff81879760 T ale_dma_alloc +ffffffff81879ed0 T ale_ioctl +ffffffff8187a020 T ale_start +ffffffff8187a190 T ale_watchdog +ffffffff8187a200 T ale_tick +ffffffff8187a260 T ale_dma_free +ffffffff8187a510 T ale_detach +ffffffff8187a5d0 T ale_stop +ffffffff8187a890 T ale_init +ffffffff8187b2a0 T ale_encap +ffffffff8187b4f0 T ale_txeof +ffffffff8187b6b0 T ale_iff +ffffffff8187b800 T ale_stats_clear +ffffffff8187b8d0 T ale_stats_update +ffffffff8187bc40 T ale_rxeof +ffffffff8187bed0 T ale_rx_update_page +ffffffff8187c010 T ale_rxcsum +ffffffff8187c0b0 T ale_init_rx_pages +ffffffff8187c1e0 T ale_init_tx_ring +ffffffff8187c2d0 T ale_rxvlan +ffffffff8187d000 T amdpm_match +ffffffff8187d020 T amdpm_attach +ffffffff8187d390 T amdpm_activate +ffffffff8187d3f0 T amdpm_rnd_callout +ffffffff8187d450 T amdpm_i2c_acquire_bus +ffffffff8187d4a0 T amdpm_i2c_release_bus +ffffffff8187d4e0 T amdpm_i2c_exec +ffffffff8187d840 T amdpm_get_timecount +ffffffff8187d870 T amdpm_intr +ffffffff8187e000 T bce_probe +ffffffff8187e020 T bce_attach +ffffffff8187eac0 T bce_activate +ffffffff8187eb30 T bce_intr +ffffffff8187ee30 T bce_reset +ffffffff8187f3f0 T bce_ioctl +ffffffff8187f550 T bce_start +ffffffff8187f790 T bce_watchdog +ffffffff8187f7d0 T bce_mii_read +ffffffff8187f900 T bce_mii_write +ffffffff8187fa30 T bce_statchg +ffffffff8187fdc0 T bce_mediachange +ffffffff8187fe10 T bce_mediastatus +ffffffff8187fe70 T bce_tick +ffffffff8187fec0 T bce_stop +ffffffff8187ffe0 T bce_init +ffffffff818803e0 T bce_iff +ffffffff818804d0 T bce_rxintr +ffffffff81880660 T bce_txintr +ffffffff81880740 T bce_add_rxbuf +ffffffff81880800 T bce_add_mac +ffffffff81881000 T ath_pci_match +ffffffff81881060 T ath_pci_attach +ffffffff81881280 T ath_pci_detach +ffffffff81882000 T athn_pci_match +ffffffff81882020 T athn_pci_attach +ffffffff818822a0 T athn_pci_detach +ffffffff81882320 T athn_pci_activate +ffffffff818823d0 T athn_pci_read +ffffffff818823f0 T athn_pci_write +ffffffff81882420 T athn_pci_write_barrier +ffffffff81882450 T athn_pci_disable_aspm +ffffffff818824b0 T athn_pci_wakeup +ffffffff81883000 T atw_pci_match +ffffffff81883020 T atw_pci_attach +ffffffff81883290 T atw_pci_detach +ffffffff81883310 t atw_pci_enable +ffffffff818833a0 t atw_pci_disable +ffffffff81884000 T rtw_pci_match +ffffffff81884020 T rtw_pci_attach +ffffffff81884230 T rtw_pci_detach +ffffffff818842b0 T rtw_pci_enable +ffffffff81884340 T rtw_pci_disable +ffffffff81885000 T rtwn_pci_match +ffffffff81885020 T rtwn_pci_attach +ffffffff81885580 T rtwn_pci_detach +ffffffff81885690 T rtwn_pci_activate +ffffffff818856a0 T rtwn_calib_to +ffffffff81885700 T rtwn_scan_to +ffffffff81885710 T rtwn_intr +ffffffff818859f0 T rtwn_alloc_rx_list +ffffffff81885d00 T rtwn_alloc_tx_list +ffffffff81885f40 T rtwn_free_rx_list +ffffffff81886090 T rtwn_pci_write_1 +ffffffff818860c0 T rtwn_pci_write_2 +ffffffff818860f0 T rtwn_pci_write_4 +ffffffff81886120 T rtwn_pci_read_1 +ffffffff81886140 T rtwn_pci_read_2 +ffffffff81886160 T rtwn_pci_read_4 +ffffffff81886180 T rtwn_tx +ffffffff81886750 T rtwn_power_on +ffffffff81886780 T rtwn_dma_init +ffffffff81886b20 T rtwn_pci_load_firmware +ffffffff81886bd0 T rtwn_fw_loadpage +ffffffff81886d10 T rtwn_mac_init +ffffffff81886e80 T rtwn_bb_init +ffffffff81887320 T rtwn_alloc_buffers +ffffffff81887350 T rtwn_pci_init +ffffffff81887420 T rtwn_pci_stop +ffffffff81887570 T rtwn_is_oactive +ffffffff818875a0 T rtwn_next_calib +ffffffff818875c0 T rtwn_cancel_calib +ffffffff81887600 T rtwn_pci_next_scan +ffffffff81887620 T rtwn_cancel_scan +ffffffff81887660 T rtwn_wait_async +ffffffff81887690 T rtwn_free_tx_list +ffffffff81887800 T rtwn_setup_rx_desc +ffffffff81887870 T rtwn_reset_rx_list +ffffffff81887910 T rtwn_reset_tx_list +ffffffff81887a60 T rtwn_rx_frame +ffffffff81887ec0 T rtwn_tx_done +ffffffff81888050 T rtwn_poll_c2h_events +ffffffff81888210 T rtwn_pci_92c_stop +ffffffff818883f0 T rtwn_pci_88e_stop +ffffffff818887c0 T rtwn_pci_23a_stop +ffffffff81888b60 T rtwn_88e_intr +ffffffff81888ea0 T rtwn_llt_write +ffffffff81888f60 T rtwn_llt_init +ffffffff81889230 T rtwn_92c_power_on +ffffffff818896b0 T rtwn_88e_power_on +ffffffff81889ab0 T rtwn_23a_power_on +ffffffff81889f10 T rtwn_tx_report +ffffffff8188a000 T ral_pci_match +ffffffff8188a020 T ral_pci_attach +ffffffff8188a200 T ral_pci_detach +ffffffff8188a290 T ral_pci_activate +ffffffff8188a310 T ral_pci_wakeup +ffffffff8188b000 T acx_pci_match +ffffffff8188b020 T acx_pci_attach +ffffffff8188b250 T acx_pci_detach +ffffffff8188c000 T pgt_pci_match +ffffffff8188c020 T pgt_pci_attach +ffffffff8188c1f0 T pgt_pci_detach +ffffffff8188d000 T malo_pci_match +ffffffff8188d020 T malo_pci_attach +ffffffff8188d1c0 T malo_pci_detach +ffffffff8188d210 T malo_pci_activate +ffffffff8188d270 T malo_pci_wakeup +ffffffff8188e000 T bwi_pci_match +ffffffff8188e070 T bwi_pci_attach +ffffffff8188e280 T bwi_pci_detach +ffffffff8188e2d0 T bwi_pci_activate +ffffffff8188e330 T bwi_reset_bcm4331 +ffffffff8188e440 T bwi_pci_conf_write +ffffffff8188e470 T bwi_pci_conf_read +ffffffff8188e490 T bwi_pci_wakeup +ffffffff8188f000 T piixpm_match +ffffffff8188f020 T piixpm_attach +ffffffff8188f4b0 T piixpm_intr +ffffffff8188f5c0 T piixpm_i2c_acquire_bus +ffffffff8188f6a0 T piixpm_i2c_release_bus +ffffffff8188f780 T piixpm_i2c_exec +ffffffff81890000 T vic_match +ffffffff818900a0 T vic_attach +ffffffff81890410 T vic_intr +ffffffff81890480 T vic_query +ffffffff818906e0 T vic_alloc_data +ffffffff818909e0 T vic_tick +ffffffff81890a50 T vic_ioctl +ffffffff81890c80 T vic_start +ffffffff81890fc0 T vic_watchdog +ffffffff81890ff0 T vic_media_change +ffffffff81891020 T vic_media_status +ffffffff818910d0 T vic_read +ffffffff818910f0 T vic_read_cmd +ffffffff81891140 T vic_getlladdr +ffffffff818911f0 T vic_alloc_dmamem +ffffffff81891360 T vic_rx_fill +ffffffff81891540 T vic_alloc_mbuf +ffffffff81891600 T vic_init_data +ffffffff818919a0 T vic_uninit_data +ffffffff81891b70 T vic_link_state +ffffffff81891bf0 T vic_write +ffffffff81891c40 T vic_rx_proc +ffffffff81891ea0 T vic_tx_proc +ffffffff81892020 T vic_iff +ffffffff81892160 T vic_setlladdr +ffffffff818921c0 T vic_load_txb +ffffffff81892270 T vic_init +ffffffff81892410 T vic_stop +ffffffff81892540 T vic_rxrinfo +ffffffff81892610 T vic_free_dmamem +ffffffff81893000 T vmxnet3_match +ffffffff81893020 T vmxnet3_attach +ffffffff818938f0 T vmxnet3_intr +ffffffff81893990 T vmxnet3_intr_event +ffffffff81893a00 T vmxnet3_intr_intx +ffffffff81893a60 T vmxnet3_intr_queue +ffffffff81893af0 T vmxnet3_dma_init +ffffffff81893ea0 T vmxnet3_ioctl +ffffffff81894130 T vmxnet3_start +ffffffff81894450 T vmxnet3_watchdog +ffffffff818944a0 T vmxnet3_media_change +ffffffff818944d0 T vmxnet3_media_status +ffffffff818945d0 T vmxnet3_link_state +ffffffff81894690 T vmxnet3_dma_allocmem +ffffffff818947e0 T vmxnet3_alloc_txring +ffffffff81894950 T vmxnet3_alloc_rxring +ffffffff81894c00 T vmxnet3_rxfill_tick +ffffffff81894c70 T vmxnet3_txinit +ffffffff81894cd0 T vmxnet3_rxfill +ffffffff81894f20 T vmxnet3_rxinit +ffffffff81894ff0 T vmxnet3_txstop +ffffffff81895080 T vmxnet3_rxstop +ffffffff81895180 T vmxnet3_enable_all_intrs +ffffffff81895240 T vmxnet3_disable_all_intrs +ffffffff81895310 T vmxnet3_evintr +ffffffff818954e0 T vmxnet3_rxintr +ffffffff81895870 T vmxnet3_txintr +ffffffff81895a10 T vmxnet3_init +ffffffff81895e20 T vmxnet3_rx_csum +ffffffff81895e80 T vmxnet3_iff +ffffffff81895fc0 T vmxnet3_stop +ffffffff81896200 T vmxnet3_reset +ffffffff81896240 t vmx_kstat_create +ffffffff81896420 t vmx_kstat_read +ffffffff81897000 T vmwpvs_match +ffffffff81897030 T vmwpvs_attach +ffffffff81897de0 T vmwpvs_scsi_cmd +ffffffff81898250 T vmwpvs_intx +ffffffff818982c0 T vmwpvs_msg_task +ffffffff81898540 T vmwpvs_intr +ffffffff81898720 T vmwpvs_get_config +ffffffff81898920 T vmwpvs_dmamem_zalloc +ffffffff81898980 T vmwpvs_dmamem_alloc +ffffffff81898b00 T vmwpvs_ccb_put +ffffffff81898b60 T vmwpvs_setup_rings +ffffffff81898c90 T vmwpvs_setup_msg_ring +ffffffff81898d80 T vmwpvs_ccb_get +ffffffff81898e00 T vmwpvs_dmamem_free +ffffffff81898e80 T vmwpvs_cmd +ffffffff81898f20 T vmwpvs_scsi_cmd_done +ffffffff81899100 T vmwpvs_scsi_cmd_poll +ffffffff8189a000 T lii_match +ffffffff8189a020 T lii_attach +ffffffff8189a420 T lii_activate +ffffffff8189a510 T lii_reset +ffffffff8189a7e0 T lii_spi_configure +ffffffff8189a8d0 T lii_eeprom_present +ffffffff8189a960 T lii_eeprom_read +ffffffff8189a990 T lii_spi_read +ffffffff8189ac40 T lii_read_macaddr +ffffffff8189adb0 T lii_intr +ffffffff8189aec0 T lii_alloc_rings +ffffffff8189b0d0 T lii_tick +ffffffff8189b120 T lii_mii_readreg +ffffffff8189b3c0 T lii_mii_writereg +ffffffff8189b650 T lii_mii_statchg +ffffffff8189b6c0 T lii_media_change +ffffffff8189b710 T lii_media_status +ffffffff8189b770 T lii_ioctl +ffffffff8189b900 T lii_start +ffffffff8189baa0 T lii_watchdog +ffffffff8189bae0 T lii_stop +ffffffff8189bb50 T lii_init +ffffffff8189c040 T lii_iff +ffffffff8189c180 T lii_tx_put +ffffffff8189c290 T lii_free_tx_space +ffffffff8189c2d0 T lii_rxintr +ffffffff8189c480 T lii_txintr +ffffffff8189d000 T ichiic_match +ffffffff8189d020 T ichiic_attach +ffffffff8189d210 T ichiic_intr +ffffffff8189d320 T ichiic_i2c_acquire_bus +ffffffff8189d370 T ichiic_i2c_release_bus +ffffffff8189d3b0 T ichiic_i2c_exec +ffffffff8189e000 T viapm_match +ffffffff8189e020 T viapm_attach +ffffffff8189e630 T viapm_intr +ffffffff8189e740 T viapm_i2c_acquire_bus +ffffffff8189e790 T viapm_i2c_release_bus +ffffffff8189e7d0 T viapm_i2c_exec +ffffffff8189eaf0 T viapm_refresh_sensor_data +ffffffff8189ee20 T viapm_refresh +ffffffff8189ee40 T val_to_uK +ffffffff8189eee0 T val_to_rpm +ffffffff8189ef20 T val_to_uV +ffffffff8189efd0 T viapm_get_timecount +ffffffff818a0000 T amdiic_match +ffffffff818a0020 T amdiic_attach +ffffffff818a01f0 T amdiic_intr +ffffffff818a02c0 T amdiic_i2c_acquire_bus +ffffffff818a0310 T amdiic_i2c_release_bus +ffffffff818a0350 T amdiic_i2c_exec +ffffffff818a05b0 T amdiic_read +ffffffff818a0720 T amdiic_wait +ffffffff818a07c0 T amdiic_write +ffffffff818a1000 T nviic_match +ffffffff818a1020 T nviic_attach +ffffffff818a1270 T nviic_i2c_acquire_bus +ffffffff818a12b0 T nviic_i2c_release_bus +ffffffff818a12f0 T nviic_i2c_exec +ffffffff818a1510 T nviic_write +ffffffff818a1560 T nviic_read +ffffffff818a2000 T sdhc_pci_match +ffffffff818a2060 T sdhc_pci_attach +ffffffff818a23a0 T sdhc_pci_activate +ffffffff818a23f0 T sdhc_takecontroller +ffffffff818a2490 T sdhc_ricohfix +ffffffff818a2600 T sdhc_pci_conf_write +ffffffff818a3000 T kate_match +ffffffff818a3160 T kate_attach +ffffffff818a3410 T kate_refresh +ffffffff818a4000 T km_match +ffffffff818a4050 T km_attach +ffffffff818a40e0 T km_refresh +ffffffff818a5000 T ksmn_match +ffffffff818a5050 T ksmn_attach +ffffffff818a5230 T ksmn_ccd_attach +ffffffff818a5380 T ksmn_refresh +ffffffff818a54d0 T ksmn_read_reg +ffffffff818a6000 T itherm_probe +ffffffff818a6020 T itherm_attach +ffffffff818a6370 T itherm_activate +ffffffff818a63f0 T itherm_enable +ffffffff818a6450 T itherm_refresh +ffffffff818a6460 T itherm_refresh_sensor_data +ffffffff818a6840 T itherm_bias_temperature_sensor +ffffffff818a7000 T pchtemp_match +ffffffff818a7020 T pchtemp_attach +ffffffff818a7180 T pchtemp_refresh +ffffffff818a8000 T rtsx_pci_match +ffffffff818a8090 T rtsx_pci_attach +ffffffff818a9000 T xspd_match +ffffffff818a9020 T xspd_attach +ffffffff818a91e0 T xspd_intr +ffffffff818aa000 T virtio_pci_match +ffffffff818aa070 T virtio_pci_attach +ffffffff818aa420 T virtio_pci_detach +ffffffff818aa4f0 T virtio_pci_kick +ffffffff818aa540 T virtio_pci_read_device_config_1 +ffffffff818aa560 T virtio_pci_read_device_config_2 +ffffffff818aa590 T virtio_pci_read_device_config_4 +ffffffff818aa5c0 T virtio_pci_read_device_config_8 +ffffffff818aa640 T virtio_pci_write_device_config_1 +ffffffff818aa670 T virtio_pci_write_device_config_2 +ffffffff818aa6a0 T virtio_pci_write_device_config_4 +ffffffff818aa6d0 T virtio_pci_write_device_config_8 +ffffffff818aa740 T virtio_pci_read_queue_size +ffffffff818aa7b0 T virtio_pci_setup_queue +ffffffff818aaa90 T virtio_pci_set_status +ffffffff818aab10 T virtio_pci_negotiate_features +ffffffff818aac50 T virtio_pci_poll_intr +ffffffff818aacb0 T virtio_pci_find_cap +ffffffff818aae60 T virtio_pci_attach_10 +ffffffff818ab290 T virtio_pci_attach_09 +ffffffff818ab3d0 T virtio_pci_adjust_config_region +ffffffff818ab470 T virtio_pci_setup_msix +ffffffff818ab7d0 T virtio_pci_legacy_intr +ffffffff818ab870 T virtio_pci_legacy_intr_mpsafe +ffffffff818ab900 T virtio_pci_free_irqs +ffffffff818abb40 T virtio_pci_negotiate_features_10 +ffffffff818abd70 T virtio_pci_msix_establish +ffffffff818abe30 T virtio_pci_set_msix_queue_vector +ffffffff818abeb0 T virtio_pci_set_msix_config_vector +ffffffff818abef0 T virtio_pci_config_intr +ffffffff818abf30 T virtio_pci_shared_queue_intr +ffffffff818abf40 T virtio_pci_queue_intr +ffffffff818ac000 T dwiic_pci_match +ffffffff818ac020 T dwiic_pci_attach +ffffffff818ac340 T dwiic_pci_activate +ffffffff818ac3b0 T dwiic_pci_bus_scan +ffffffff818ad000 T bwfm_pci_buscore_read +ffffffff818ad060 T bwfm_pci_buscore_write +ffffffff818ad0d0 T bwfm_pci_buscore_prepare +ffffffff818ad100 T bwfm_pci_buscore_reset +ffffffff818ad2f0 T bwfm_pci_buscore_activate +ffffffff818ad320 T bwfm_pci_preinit +ffffffff818ae440 T bwfm_pci_stop +ffffffff818ae4d0 T bwfm_pci_txcheck +ffffffff818ae590 T bwfm_pci_txdata +ffffffff818ae8f0 T bwfm_pci_msgbuf_query_dcmd +ffffffff818aed30 T bwfm_pci_msgbuf_set_dcmd +ffffffff818aed70 T bwfm_pci_match +ffffffff818aed90 T bwfm_pci_attach +ffffffff818aeff0 T bwfm_pci_detach +ffffffff818af030 T bwfm_pci_activate +ffffffff818af1e0 T bwfm_pci_intr +ffffffff818af440 T bwfm_pci_select_core +ffffffff818af510 T bwfm_pci_load_microcode +ffffffff818af990 T bwfm_pci_dmamem_alloc +ffffffff818afb30 T bwfm_pci_setup_ring +ffffffff818afd30 T bwfm_pci_intr_enable +ffffffff818afd80 T bwfm_pci_hostready +ffffffff818afde0 T bwfm_pci_fill_rx_rings +ffffffff818afe20 T bwfm_pci_dmamem_free +ffffffff818afe90 T bwfm_pci_cleanup +ffffffff818b0500 T bwfm_pci_send_mb_data +ffffffff818b0620 T bwfm_pci_intmask +ffffffff818b0660 T bwfm_pci_pktid_avail +ffffffff818b06d0 T bwfm_pci_pktid_new +ffffffff818b0830 T bwfm_pci_pktid_free +ffffffff818b08d0 T bwfm_pci_fill_rx_buf_ring +ffffffff818b0c20 T bwfm_pci_fill_rx_ioctl_ring +ffffffff818b0f90 T bwfm_pci_ring_write_reserve +ffffffff818b1080 T bwfm_pci_ring_write_cancel +ffffffff818b10c0 T bwfm_pci_ring_write_commit +ffffffff818b11a0 T bwfm_pci_ring_write_rptr +ffffffff818b1220 T bwfm_pci_ring_write_wptr +ffffffff818b12a0 T bwfm_pci_setup_flowring +ffffffff818b1400 T bwfm_pci_ring_bell +ffffffff818b1440 T bwfm_pci_ring_update_rptr +ffffffff818b14f0 T bwfm_pci_ring_update_wptr +ffffffff818b1590 T bwfm_pci_ring_write_reserve_multi +ffffffff818b16b0 T bwfm_pci_ring_read_avail +ffffffff818b17b0 T bwfm_pci_ring_read_commit +ffffffff818b1830 T bwfm_pci_ring_rx +ffffffff818b1a40 T bwfm_pci_msg_rx +ffffffff818b2020 T bwfm_pci_flowring_delete_cb +ffffffff818b20d0 T bwfm_pci_msgbuf_rxioctl +ffffffff818b21c0 T bwfm_pci_intr_status +ffffffff818b2200 T bwfm_pci_intr_ack +ffffffff818b2240 T bwfm_pci_flowring_lookup +ffffffff818b23b0 T bwfm_pci_flowring_create +ffffffff818b24e0 T bwfm_pci_flowring_create_cb +ffffffff818b2820 T bwfm_pci_flowring_delete +ffffffff818b2af0 T bwfm_pci_msgbuf_h2d_mb_write +ffffffff818b2d10 T bwfm_pci_handle_mb_data +ffffffff818b2de0 T bwfm_pci_intr_disable +ffffffff818b3000 T ccp_pci_match +ffffffff818b3020 T ccp_pci_attach +ffffffff818b4000 T bnxt_match +ffffffff818b4020 T bnxt_attach +ffffffff818b5200 T bnxt_dmamem_alloc +ffffffff818b5390 T bnxt_dmamem_free +ffffffff818b5410 T bnxt_hwrm_ver_get +ffffffff818b5560 T bnxt_hwrm_nvm_get_dev_info +ffffffff818b56a0 T bnxt_hwrm_func_drv_rgtr +ffffffff818b57c0 T bnxt_hwrm_func_rgtr_async_events +ffffffff818b58e0 T bnxt_hwrm_func_qcaps +ffffffff818b59c0 T bnxt_admin_intr +ffffffff818b5bc0 T bnxt_intr +ffffffff818b6090 T bnxt_hwrm_func_qcfg +ffffffff818b6140 T bnxt_hwrm_queue_qportcfg +ffffffff818b6210 T bnxt_hwrm_func_reset +ffffffff818b62c0 T bnxt_mark_cpr_invalid +ffffffff818b6310 T bnxt_hwrm_ring_alloc +ffffffff818b64c0 T bnxt_cfg_async_cr +ffffffff818b65c0 T bnxt_write_cp_doorbell +ffffffff818b6600 T bnxt_set_cp_ring_aggint +ffffffff818b66d0 T bnxt_ioctl +ffffffff818b6860 T bnxt_start +ffffffff818b6c80 T bnxt_watchdog +ffffffff818b6cb0 T bnxt_media_change +ffffffff818b6e00 T bnxt_media_status +ffffffff818b6e10 T bnxt_refill +ffffffff818b6e70 T bnxt_media_autonegotiate +ffffffff818b6f60 T bnxt_hwrm_port_phy_qcfg +ffffffff818b73f0 T bnxt_free_slots +ffffffff818b7480 T bnxt_hwrm_cmd_hdr_init +ffffffff818b74d0 T hwrm_send_message +ffffffff818b7550 T bnxt_queue_up +ffffffff818b8480 T bnxt_hwrm_stat_ctx_alloc +ffffffff818b8580 T bnxt_write_tx_doorbell +ffffffff818b85f0 T bnxt_write_rx_doorbell +ffffffff818b8660 T bnxt_hwrm_ring_grp_alloc +ffffffff818b8760 T bnxt_rx_fill +ffffffff818b8870 T bnxt_hwrm_ring_grp_free +ffffffff818b8950 T bnxt_hwrm_ring_free +ffffffff818b8a40 T bnxt_hwrm_stat_ctx_free +ffffffff818b8b30 T bnxt_queue_down +ffffffff818b9210 T bnxt_up +ffffffff818b98e0 T bnxt_hwrm_vnic_ctx_alloc +ffffffff818b99b0 T bnxt_hwrm_vnic_alloc +ffffffff818b9aa0 T bnxt_hwrm_vnic_cfg +ffffffff818b9be0 T bnxt_hwrm_vnic_cfg_placement +ffffffff818b9cb0 T bnxt_hwrm_set_filter +ffffffff818b9e30 T bnxt_hwrm_vnic_rss_cfg +ffffffff818b9f00 T bnxt_iff +ffffffff818ba070 T bnxt_hwrm_vnic_free +ffffffff818ba150 T bnxt_hwrm_vnic_ctx_free +ffffffff818ba230 T bnxt_down +ffffffff818ba5d0 T bnxt_hwrm_free_filter +ffffffff818ba6b0 T bnxt_hwrm_cfa_l2_set_rx_mask +ffffffff818ba780 T bnxt_rxrinfo +ffffffff818ba8d0 T bnxt_get_sffpage +ffffffff818babe0 T bnxt_load_mbuf +ffffffff818bac90 T bnxt_handle_async_event +ffffffff818bacd0 T bnxt_cpr_next_cmpl +ffffffff818bad40 T bnxt_cpr_commit +ffffffff818bad70 T bnxt_cpr_rollback +ffffffff818bada0 T bnxt_write_cp_doorbell_index +ffffffff818bae20 T bnxt_rx +ffffffff818bb0f0 T bnxt_txeof +ffffffff818bb210 T bnxt_get_media_type +ffffffff818bb760 T bnxt_add_media_type +ffffffff818bb920 T _hwrm_send_message +ffffffff818be7d0 T bnxt_rx_fill_slots +ffffffff818be980 T bnxt_hwrm_err_map +ffffffff818be9c0 T _bnxt_hwrm_set_async_event_bit +ffffffff818bf000 t mcx_match +ffffffff818bf020 t mcx_attach +ffffffff818c2100 T mcx_rx_fill +ffffffff818c2340 T mcx_load_mbuf +ffffffff818c23f0 t mcx_dmamem_alloc +ffffffff818c2550 t mcx_pages +ffffffff818c2e30 t mcx_iff +ffffffff818c3270 t mcx_alloc_uar +ffffffff818c3460 t mcx_admin_intr +ffffffff818c3610 t mcx_create_eq +ffffffff818c3ba0 t mcx_ioctl +ffffffff818c4670 t mcx_start +ffffffff818c4b70 t mcx_watchdog +ffffffff818c4ba0 t mcx_media_change +ffffffff818c4e60 t mcx_media_status +ffffffff818c4fa0 t mcx_refill +ffffffff818c5010 t mcx_cq_intr +ffffffff818c5520 t mcx_calibrate +ffffffff818c56e0 t mcx_port_change +ffffffff818c5820 t mcx_cmdq_post +ffffffff818c5900 t mcx_set_flow_table_entry_mac +ffffffff818c5dd0 t mcx_delete_flow_table_entry +ffffffff818c6250 t mcx_access_hca_reg +ffffffff818c6680 t mcx_cmdq_exec +ffffffff818c6880 t mcx_up +ffffffff818c9b80 t mcx_down +ffffffff818cabe0 t mcx_create_flow_table +ffffffff818caf90 t mcx_create_flow_group +ffffffff818cb470 t mcx_destroy_sq +ffffffff818cb720 t mcx_destroy_cq +ffffffff818cb9e0 t mcx_arm_cq +ffffffff818cbb00 t mcx_destroy_flow_table +ffffffff818cbe60 t mcx_kstat_attach_ppcnt +ffffffff818cbf90 t mcx_kstat_ppcnt_read +ffffffff818cc0b0 t mcx_kstat_mtmp_read +ffffffff818cc240 t mcx_kstat_queue_read +ffffffff818cd6d0 t mcx_timecounter_read +ffffffff818ce000 t iavf_match +ffffffff818ce020 t iavf_attach +ffffffff818ce900 t iavf_reset +ffffffff818cebd0 t iavf_dmamem_alloc +ffffffff818ced30 t iavf_arq_fill +ffffffff818cefe0 t iavf_arq_timeout +ffffffff818cf000 t iavf_init_admin_queue +ffffffff818cf1b0 t iavf_get_version +ffffffff818cf3d0 t iavf_get_vf_resources +ffffffff818cf5a0 t iavf_config_irq_map +ffffffff818cf790 t iavf_intr +ffffffff818cfe10 t iavf_ioctl +ffffffff818d09c0 t iavf_start +ffffffff818d0d10 t iavf_watchdog +ffffffff818d0d40 t iavf_media_change +ffffffff818d0d70 t iavf_media_status +ffffffff818d0e00 t iavf_arq_unfill +ffffffff818d0f00 t iavf_down +ffffffff818d1460 t iavf_up +ffffffff818d20d0 t iavf_queue_select +ffffffff818d22d0 t iavf_rxfill +ffffffff818d24d0 t iavf_rxrefill +ffffffff818d24f0 t iavf_process_arq +ffffffff818d3000 T rge_match +ffffffff818d3020 T rge_attach +ffffffff818d3510 T rge_activate +ffffffff818d3640 T rge_intr +ffffffff818d3930 T rge_config_imtype +ffffffff818d39a0 T rge_exit_oob +ffffffff818d41b0 T rge_hw_init +ffffffff818d45a0 T rge_get_macaddr +ffffffff818d4620 T rge_set_phy_power +ffffffff818d4880 T rge_phy_config +ffffffff818d51c0 T rge_allocmem +ffffffff818d55d0 T rge_ioctl +ffffffff818d5780 T rge_start +ffffffff818d5950 T rge_watchdog +ffffffff818d5990 T rge_wol +ffffffff818d5bb0 T rge_tick +ffffffff818d5c30 T rge_txstart +ffffffff818d5c60 T rge_ifmedia_upd +ffffffff818d6220 T rge_ifmedia_sts +ffffffff818d6300 T rge_add_media_types +ffffffff818d63b0 T rge_kstat_attach +ffffffff818d6680 T rge_wol_power +ffffffff818d6760 T rge_rxeof +ffffffff818d6b60 T rge_txeof +ffffffff818d6d60 T rge_init +ffffffff818d7f20 T rge_setup_intr +ffffffff818d8090 T rge_encap +ffffffff818d8330 T rge_stop +ffffffff818d8590 T rge_iff +ffffffff818d8700 T rge_set_macaddr +ffffffff818d87d0 T rge_rx_list_init +ffffffff818d8890 T rge_tx_list_init +ffffffff818d8950 T rge_read_csi +ffffffff818d8bc0 T rge_write_csi +ffffffff818d8e40 T rge_write_mac_ocp +ffffffff818d8e80 T rge_read_mac_ocp +ffffffff818d8ef0 T rge_reset +ffffffff818d90b0 T rge_write_phy_ocp +ffffffff818d9170 T rge_read_phy_ocp +ffffffff818d9220 T rge_read_phy +ffffffff818d92f0 T rge_write_phy +ffffffff818d93d0 T rge_get_link_status +ffffffff818d9420 T rge_newbuf +ffffffff818d95a0 T rge_discard_rxbuf +ffffffff818d9600 T rge_fill_rx_ring +ffffffff818d9680 T rge_phy_config_mac_cfg2 +ffffffff818db080 T rge_phy_config_mac_cfg3 +ffffffff818dcd30 T rge_phy_config_mac_cfg4 +ffffffff818e0da0 T rge_phy_config_mac_cfg5 +ffffffff818e1890 T rge_patch_phy_mcu +ffffffff818e1b00 T rge_write_ephy +ffffffff818e1d60 T rge_phy_config_mcu +ffffffff818e2820 T rge_read_ephy +ffffffff818e2aa0 T rge_disable_phy_ocp_pwrsave +ffffffff818e2c70 T rge_disable_hw_im +ffffffff818e2ca0 T rge_disable_sim_im +ffffffff818e2d00 T rge_setup_sim_im +ffffffff818e2d80 T rge_link_state +ffffffff818e2e00 t rge_kstat_read +ffffffff818e2fa0 t rge_kstat_copy +ffffffff818e4000 T igc_match +ffffffff818e4020 T igc_attach +ffffffff818e4490 T igc_detach +ffffffff818e4690 T igc_identify_hardware +ffffffff818e46f0 T igc_allocate_pci_resources +ffffffff818e4810 T igc_allocate_queues +ffffffff818e4d00 T igc_is_valid_ether_addr +ffffffff818e4d60 T igc_allocate_msix +ffffffff818e4fc0 T igc_setup_interface +ffffffff818e5200 T igc_reset +ffffffff818e5340 T igc_update_link_status +ffffffff818e5440 T igc_get_hw_control +ffffffff818e54a0 T igc_release_hw_control +ffffffff818e5500 T igc_free_pci_resources +ffffffff818e55e0 T igc_stop +ffffffff818e58f0 T igc_free_transmit_structures +ffffffff818e5960 T igc_free_receive_structures +ffffffff818e5a20 T igc_setup_msix +ffffffff818e5ab0 T igc_dma_malloc +ffffffff818e5c10 T igc_rxrefill +ffffffff818e5ce0 T igc_dma_free +ffffffff818e5d90 T igc_init_dmac +ffffffff818e6030 T igc_intr_queue +ffffffff818e6140 T igc_intr_link +ffffffff818e62c0 T igc_ioctl +ffffffff818e6590 T igc_start +ffffffff818e6920 T igc_watchdog +ffffffff818e6950 T igc_media_change +ffffffff818e6a60 T igc_media_status +ffffffff818e6c00 T igc_init +ffffffff818e70f0 T igc_setup_transmit_structures +ffffffff818e71b0 T igc_initialize_transmit_unit +ffffffff818e73d0 T igc_setup_receive_structures +ffffffff818e7550 T igc_initialize_receive_unit +ffffffff818e7920 T igc_iff +ffffffff818e7a60 T igc_configure_queues +ffffffff818e7c70 T igc_rxfill +ffffffff818e7da0 T igc_enable_intr +ffffffff818e7e60 T igc_tx_ctx_setup +ffffffff818e8020 T igc_txeof +ffffffff818e81e0 T igc_disable_intr +ffffffff818e8280 T igc_rxrinfo +ffffffff818e83c0 T igc_get_buf +ffffffff818e8500 T igc_rxeof +ffffffff818e88a0 T igc_rx_checksum +ffffffff818e88f0 T igc_set_queues +ffffffff818e89c0 T igc_enable_queue +ffffffff818e89f0 T igc_allocate_transmit_buffers +ffffffff818e8b50 T igc_setup_transmit_ring +ffffffff818e8cd0 T igc_free_transmit_buffers +ffffffff818e8df0 T igc_allocate_receive_buffers +ffffffff818e8f10 T igc_setup_receive_ring +ffffffff818e8fd0 T igc_initialize_rss_mapping +ffffffff818e91f0 T igc_free_receive_buffers +ffffffff818ea000 T igc_init_mac_params +ffffffff818ea040 T igc_init_nvm_params +ffffffff818ea080 T igc_init_phy_params +ffffffff818ea0c0 T igc_set_mac_type +ffffffff818ea170 T igc_setup_init_funcs +ffffffff818ea2d0 T igc_update_mc_addr_list +ffffffff818ea310 T igc_check_for_link +ffffffff818ea350 T igc_reset_hw +ffffffff818ea390 T igc_init_hw +ffffffff818ea3d0 T igc_get_speed_and_duplex +ffffffff818ea410 T igc_rar_set +ffffffff818ea450 T igc_check_reset_block +ffffffff818ea490 T igc_get_phy_info +ffffffff818ea4d0 T igc_phy_hw_reset +ffffffff818ea510 T igc_read_mac_addr +ffffffff818ea530 T igc_validate_nvm_checksum +ffffffff818eb000 T igc_acquire_phy_base +ffffffff818eb030 T igc_release_phy_base +ffffffff818eb060 T igc_init_hw_base +ffffffff818eb160 T igc_power_down_phy_copper_base +ffffffff818ec000 T igc_init_nvm_params_i225 +ffffffff818ec180 T igc_acquire_nvm_i225 +ffffffff818ec250 T igc_release_nvm_i225 +ffffffff818ec2c0 T igc_get_flash_presence_i225 +ffffffff818ec310 T igc_read_nvm_srrd_i225 +ffffffff818ec3f0 T igc_write_nvm_srwr_i225 +ffffffff818ec5c0 T igc_validate_nvm_checksum_i225 +ffffffff818ec650 T igc_update_nvm_checksum_i225 +ffffffff818ec7f0 T igc_init_mac_params_i225 +ffffffff818ec8b0 T igc_reset_hw_i225 +ffffffff818ec9d0 T igc_init_hw_i225 +ffffffff818ec9e0 T igc_check_for_link_i225 +ffffffff818ecaa0 T igc_acquire_swfw_sync_i225 +ffffffff818ecb80 T igc_release_swfw_sync_i225 +ffffffff818ecbf0 T igc_setup_copper_link_i225 +ffffffff818ecc80 T igc_init_phy_params_i225 +ffffffff818ecd70 T igc_set_d0_lplu_state_i225 +ffffffff818ece00 T igc_set_d3_lplu_state_i225 +ffffffff818ece90 T igc_get_hw_semaphore_i225 +ffffffff818ed030 T __igc_write_nvm_srwr +ffffffff818ed150 T igc_update_flash_i225 +ffffffff818ed510 T igc_set_flsw_flash_burst_counter_i225 +ffffffff818ed570 T igc_write_erase_flash_command_i225 +ffffffff818ed670 T igc_pool_flash_update_done_i225 +ffffffff818ed700 T igc_set_ltr_i225 +ffffffff818ed970 T igc_init_function_pointers_i225 +ffffffff818ed9d0 T igc_set_eee_i225 +ffffffff818ee000 T igc_init_mac_ops_generic +ffffffff818ee040 T igc_null_ops_generic +ffffffff818ee070 T igc_config_collision_dist_generic +ffffffff818ee0e0 T igc_rar_set_generic +ffffffff818ee1c0 T igc_write_vfta_generic +ffffffff818ee210 T igc_init_rx_addrs_generic +ffffffff818ee2b0 T igc_check_alt_mac_addr_generic +ffffffff818ee430 T igc_hash_mc_addr_generic +ffffffff818ee4d0 T igc_update_mc_addr_list_generic +ffffffff818ee640 T igc_clear_hw_cntrs_base_generic +ffffffff818eea30 T igc_setup_link_generic +ffffffff818eebc0 T igc_set_fc_watermarks_generic +ffffffff818eec70 T igc_force_mac_fc_generic +ffffffff818eed30 T igc_config_fc_after_link_up_generic +ffffffff818eef40 T igc_get_speed_and_duplex_copper_generic +ffffffff818eefe0 T igc_put_hw_semaphore_generic +ffffffff818ef030 T igc_get_auto_rd_done_generic +ffffffff818ef280 T igc_disable_pcie_master_generic +ffffffff818f0000 T igc_init_nvm_ops_generic +ffffffff818f0080 T igc_null_read_nvm +ffffffff818f00b0 T igc_null_nvm_generic +ffffffff818f00e0 T igc_reload_nvm_generic +ffffffff818f0160 T igc_null_write_nvm +ffffffff818f0190 T igc_poll_eerd_eewr_done +ffffffff818f0230 T igc_read_nvm_eerd +ffffffff818f0360 T igc_read_mac_addr_generic +ffffffff818f0440 T igc_validate_nvm_checksum_generic +ffffffff818f1000 T igc_init_phy_ops_generic +ffffffff818f10f0 T igc_null_set_page +ffffffff818f1120 T igc_null_read_reg +ffffffff818f1150 T igc_null_phy_generic +ffffffff818f1180 T igc_null_lplu_state +ffffffff818f11b0 T igc_null_write_reg +ffffffff818f11e0 T igc_check_reset_block_generic +ffffffff818f1230 T igc_get_phy_id +ffffffff818f12e0 T igc_read_phy_reg_mdic +ffffffff818f13f0 T igc_write_phy_reg_mdic +ffffffff818f14f0 T igc_phy_setup_autoneg +ffffffff818f1710 T igc_copper_link_autoneg +ffffffff818f1860 T igc_wait_autoneg +ffffffff818f1930 T igc_setup_copper_link_generic +ffffffff818f1a40 T igc_phy_has_link_generic +ffffffff818f1b60 T igc_check_downshift_generic +ffffffff818f1b90 T igc_phy_hw_reset_generic +ffffffff818f1d20 T igc_power_up_phy_copper +ffffffff818f1da0 T igc_power_down_phy_copper +ffffffff818f1e30 T igc_write_phy_reg_gpy +ffffffff818f2020 T igc_write_xmdio_reg +ffffffff818f2110 T igc_read_phy_reg_gpy +ffffffff818f2310 T igc_read_xmdio_reg +ffffffff818f2400 T __igc_access_xmdio_reg +ffffffff818f3000 T com_pci_match +ffffffff818f3020 T com_pci_attach +ffffffff818f32f0 T com_pci_detach +ffffffff818f3380 T com_pci_activate +ffffffff818f3470 T com_pci_intr_designware +ffffffff818f4000 T agpdev_print +ffffffff818f4050 T agpbus_probe +ffffffff818f40b0 T agpvga_match +ffffffff818f4110 T agp_attach_bus +ffffffff818f4190 T agp_probe +ffffffff818f41c0 T agp_attach +ffffffff818f42d0 T agp_alloc_gatt +ffffffff818f4490 T agp_alloc_dmamem +ffffffff818f45c0 T agp_free_dmamem +ffffffff818f4620 T agp_free_gatt +ffffffff818f46a0 T agp_generic_enable +ffffffff818f4830 T agp_find_device +ffffffff818f4870 T agp_state +ffffffff818f48a0 T agp_get_info +ffffffff818f4940 T agp_acquire +ffffffff818f4990 T agp_release +ffffffff818f49e0 T agp_enable +ffffffff818f4a10 T agp_mmap +ffffffff818f5000 T agp_i810_probe +ffffffff818f5050 T agp_i810_attach +ffffffff818f5530 T agp_i810_activate +ffffffff818f5570 T agp_i810_bind_page +ffffffff818f5630 T agp_i810_unbind_page +ffffffff818f56f0 T agp_i810_flush_tlb +ffffffff818f5720 T agp_i810_enable +ffffffff818f5750 T agp_i810_get_chiptype +ffffffff818f59c0 T intagp_gmch_match +ffffffff818f5a20 T agp_i810_configure +ffffffff818f5b60 T intagp_write_gtt +ffffffff818f6000 T dma_resv_init +ffffffff818f6060 T dma_resv_fini +ffffffff818f6150 T dma_resv_reserve_fences +ffffffff818f6300 T dma_resv_add_fence +ffffffff818f6470 T dma_resv_replace_fences +ffffffff818f6510 T dma_resv_iter_first_unlocked +ffffffff818f6590 t dma_resv_iter_walk_unlocked +ffffffff818f6680 T dma_resv_iter_next_unlocked +ffffffff818f6700 T dma_resv_iter_first +ffffffff818f6770 T dma_resv_iter_next +ffffffff818f67d0 T dma_resv_copy_fences +ffffffff818f6b70 T dma_resv_get_fences +ffffffff818f6ef0 T dma_resv_get_singleton +ffffffff818f6ff0 T dma_resv_wait_timeout +ffffffff818f72c0 T dma_resv_test_signaled +ffffffff818f7400 T dma_resv_describe +ffffffff818f8000 T drm_legacy_agp_info +ffffffff818f80a0 T drm_legacy_agp_acquire +ffffffff818f8100 T drm_legacy_agp_release +ffffffff818f8160 T drm_legacy_agp_enable +ffffffff818f81d0 T drm_legacy_agp_takedown +ffffffff818f8240 T drm_legacy_agp_init +ffffffff818f9000 T devm_aperture_acquire_from_firmware +ffffffff818f9050 T drm_aperture_remove_conflicting_framebuffers +ffffffff818f9080 T drm_aperture_remove_conflicting_pci_framebuffers +ffffffff818fa000 T __drm_crtc_commit_free +ffffffff818fa020 T drm_crtc_commit_wait +ffffffff818fa1c0 T drm_atomic_state_default_release +ffffffff818fa220 T drm_atomic_state_init +ffffffff818fa330 T drm_atomic_state_alloc +ffffffff818fa3d0 T drm_atomic_state_default_clear +ffffffff818fa6f0 T drm_atomic_state_clear +ffffffff818fa720 T __drm_atomic_state_free +ffffffff818fa7f0 T drm_atomic_get_crtc_state +ffffffff818fa940 T drm_atomic_get_plane_state +ffffffff818fab40 T drm_atomic_private_obj_init +ffffffff818fac20 T drm_atomic_private_obj_fini +ffffffff818facb0 T drm_atomic_get_private_obj_state +ffffffff818fae60 T drm_atomic_get_old_private_obj_state +ffffffff818faec0 T drm_atomic_get_new_private_obj_state +ffffffff818faf20 T drm_atomic_get_old_connector_for_encoder +ffffffff818faf90 T drm_atomic_get_new_connector_for_encoder +ffffffff818fb000 T drm_atomic_get_connector_state +ffffffff818fb220 T drm_atomic_get_bridge_state +ffffffff818fb230 T drm_atomic_get_old_bridge_state +ffffffff818fb290 T drm_atomic_get_new_bridge_state +ffffffff818fb2f0 T drm_atomic_add_encoder_bridges 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drm_atomic_helper_swap_state +ffffffff81901e00 t commit_tail +ffffffff819020e0 t release_crtc_commit +ffffffff81902120 T drm_atomic_helper_wait_for_dependencies +ffffffff81902320 T drm_atomic_helper_commit_cleanup_done +ffffffff81902590 T drm_atomic_helper_commit_planes_on_crtc +ffffffff819027c0 T drm_atomic_helper_disable_planes_on_crtc +ffffffff81902920 T drm_atomic_helper_update_plane +ffffffff81902a50 T drm_atomic_helper_disable_plane +ffffffff81902b10 T drm_atomic_helper_set_config +ffffffff81902bc0 T drm_atomic_helper_disable_all +ffffffff81902d70 T drm_atomic_helper_shutdown +ffffffff81902ec0 T drm_atomic_helper_duplicate_state +ffffffff81903030 T drm_atomic_helper_suspend +ffffffff81903180 T drm_atomic_helper_commit_duplicated_state +ffffffff819032c0 T drm_atomic_helper_resume +ffffffff819033f0 T drm_atomic_helper_page_flip +ffffffff819034b0 t page_flip_common +ffffffff819035b0 T drm_atomic_helper_page_flip_target +ffffffff819036c0 T drm_atomic_helper_bridge_propagate_bus_fmt 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drm_atomic_helper_connector_reset +ffffffff819048c0 T __drm_atomic_helper_connector_destroy_state +ffffffff81904920 T drm_atomic_helper_connector_tv_reset +ffffffff81904970 T __drm_atomic_helper_connector_duplicate_state +ffffffff81904a00 T drm_atomic_helper_connector_duplicate_state +ffffffff81904ae0 T drm_atomic_helper_connector_destroy_state +ffffffff81904b50 T __drm_atomic_helper_private_obj_duplicate_state +ffffffff81904b90 T __drm_atomic_helper_bridge_duplicate_state +ffffffff81904bd0 T drm_atomic_helper_bridge_duplicate_state +ffffffff81904c70 T drm_atomic_helper_bridge_destroy_state +ffffffff81904c90 T __drm_atomic_helper_bridge_reset +ffffffff81904ce0 T drm_atomic_helper_bridge_reset +ffffffff81905000 T drm_atomic_set_mode_for_crtc +ffffffff81905200 T drm_atomic_set_mode_prop_for_crtc +ffffffff81905490 T drm_atomic_set_crtc_for_plane +ffffffff81905600 T drm_atomic_set_fb_for_plane +ffffffff819056d0 T drm_atomic_set_crtc_for_connector +ffffffff81905830 T drm_atomic_get_property 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drm_bridge_get_edid +ffffffff8190b000 T drm_bridge_hpd_enable +ffffffff8190b0d0 T drm_bridge_hpd_disable +ffffffff8190b170 T drm_bridge_hpd_notify +ffffffff8190b1d0 t drm_bridge_atomic_duplicate_priv_state +ffffffff8190b1f0 t drm_bridge_atomic_destroy_priv_state +ffffffff8190b210 t select_bus_fmt_recursive +ffffffff8190c000 T drm_buddy_init +ffffffff8190c430 T drm_buddy_fini +ffffffff8190c520 T drm_get_buddy +ffffffff8190c560 T drm_buddy_free_block +ffffffff8190c6a0 T drm_buddy_free_list +ffffffff8190c730 T drm_buddy_block_trim +ffffffff8190c930 t __alloc_range +ffffffff8190ccb0 T drm_buddy_alloc_blocks +ffffffff8190d4b0 T drm_buddy_block_print +ffffffff8190d4f0 T drm_buddy_print +ffffffff8190d650 T drm_buddy_module_exit +ffffffff8190d670 T drm_buddy_module_init +ffffffff8190d6d0 t split_block +ffffffff8190e000 T drm_clflush_pages +ffffffff8190e120 T drm_clflush_sg +ffffffff8190e270 T drm_clflush_virt_range +ffffffff8190e340 T drm_need_swiotlb +ffffffff8190e370 T drm_memcpy_from_wc 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drm_connector_has_possible_encoder +ffffffff81914ae0 T drm_connector_cleanup +ffffffff81914dd0 T drm_connector_unregister +ffffffff81914e60 T drm_mode_put_tile_group +ffffffff81914ef0 T drm_connector_register +ffffffff81914fe0 T drm_connector_unregister_all +ffffffff81915180 T drm_connector_list_iter_begin +ffffffff819151b0 T drm_connector_list_iter_next +ffffffff819152c0 T drm_connector_list_iter_end +ffffffff81915390 T drm_connector_register_all +ffffffff81915520 T drm_get_connector_status_name +ffffffff81915570 T drm_get_connector_force_name +ffffffff819155b0 T drm_get_subpixel_order_name +ffffffff819155e0 T drm_get_dpms_name +ffffffff81915620 T drm_display_info_set_bus_formats +ffffffff819156f0 T drm_get_dvi_i_select_name +ffffffff81915750 T drm_get_dvi_i_subconnector_name +ffffffff819157b0 T drm_get_tv_select_name +ffffffff81915800 T drm_get_tv_subconnector_name +ffffffff81915850 T drm_get_dp_subconnector_name +ffffffff819158e0 T drm_connector_create_standard_properties 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drm_crtc_fence_get_driver_name +ffffffff81919860 t drm_crtc_fence_get_timeline_name +ffffffff819198c0 t kasprintf +ffffffff81919990 t drmm_crtc_init_with_planes_cleanup +ffffffff8191a000 T drm_helper_encoder_in_use +ffffffff8191a170 T drm_helper_crtc_in_use +ffffffff8191a290 T drm_helper_disable_unused_functions +ffffffff8191a310 t __drm_helper_disable_unused_functions +ffffffff8191a410 T drm_crtc_helper_set_mode +ffffffff8191a8c0 T drm_connector_get_single_encoder +ffffffff8191a9c0 T drm_crtc_helper_set_config +ffffffff8191b5e0 T drm_helper_connector_dpms +ffffffff8191b8d0 T drm_helper_resume_force_mode +ffffffff8191bbb0 T drm_helper_force_disable_all +ffffffff8191bc80 t drm_encoder_disable +ffffffff8191c000 T drm_atomic_helper_check_plane_damage +ffffffff8191c0a0 T drm_atomic_helper_dirtyfb +ffffffff8191c350 T drm_atomic_helper_damage_iter_init +ffffffff8191c490 T drm_atomic_helper_damage_iter_next +ffffffff8191c530 T drm_atomic_helper_damage_merged +ffffffff8191d000 T displayid_iter_edid_begin +ffffffff8191d040 T __displayid_iter_next +ffffffff8191d2d0 T displayid_iter_end +ffffffff8191e000 T drm_mode_create_dumb +ffffffff8191e0c0 T drm_mode_create_dumb_ioctl +ffffffff8191e180 T drm_mode_mmap_dumb_ioctl +ffffffff8191e1f0 T drm_mode_destroy_dumb +ffffffff8191e260 T drm_mode_destroy_dumb_ioctl +ffffffff8191f000 T drm_edid_header_is_valid +ffffffff8191f080 T drm_edid_are_equal +ffffffff8191f0f0 T drm_edid_block_valid +ffffffff8191f2f0 t edid_block_check +ffffffff8191f420 t edid_block_status_print +ffffffff8191f520 T drm_edid_is_valid +ffffffff8191f5a0 T drm_edid_override_set +ffffffff8191f610 T drm_connector_update_edid_property +ffffffff8191f7b0 T drm_edid_override_reset +ffffffff8191f8e0 T drm_add_override_edid_modes +ffffffff8191fac0 T drm_add_edid_modes +ffffffff8191fbb0 T drm_do_get_edid +ffffffff8191fbc0 t _drm_do_get_edid +ffffffff819200d0 T drm_edid_raw +ffffffff81920150 T drm_edid_alloc +ffffffff81920210 T drm_edid_dup +ffffffff819202e0 T drm_edid_free +ffffffff81920340 T drm_probe_ddc +ffffffff81920430 t drm_do_probe_ddc_edid +ffffffff81920570 T drm_get_edid +ffffffff819206b0 T drm_edid_read_custom +ffffffff819207a0 T drm_edid_read_ddc +ffffffff819208d0 T drm_edid_read +ffffffff81920950 T drm_edid_get_panel_id +ffffffff81920a20 t edid_block_read +ffffffff81920c90 T drm_get_edid_switcheroo +ffffffff81920ce0 T drm_edid_duplicate +ffffffff81920d50 T drm_mode_find_dmt +ffffffff81920e70 T drm_mode_fixup_1366x768 +ffffffff81920ec0 T drm_find_edid_extension +ffffffff819210d0 T drm_match_cea_mode +ffffffff81921320 T drm_display_mode_from_cea_vic +ffffffff81921390 T drm_edid_get_monitor_name +ffffffff81921430 t get_monitor_name +ffffffff81921790 T drm_edid_to_sad +ffffffff819219a0 T drm_edid_to_speaker_allocation +ffffffff81921b40 T drm_av_sync_delay +ffffffff81921bf0 T drm_detect_hdmi_monitor +ffffffff81921d10 T drm_detect_monitor_audio +ffffffff81921f10 T drm_default_rgb_quant_range +ffffffff81921f50 T drm_edid_connector_update +ffffffff81921fb0 t _drm_edid_connector_update +ffffffff81923880 t _drm_update_tile_info +ffffffff81923b10 t _drm_edid_connector_property_update +ffffffff81923cc0 T drm_add_modes_noedid +ffffffff81923da0 T drm_set_preferred_mode +ffffffff81923e00 T drm_hdmi_avi_infoframe_from_display_mode +ffffffff81924070 T drm_hdmi_avi_infoframe_quant_range +ffffffff81924110 T drm_hdmi_vendor_infoframe_from_display_mode +ffffffff819241d0 t connector_bad_edid +ffffffff81924390 t drm_for_each_detailed_block +ffffffff819245e0 t __cea_db_iter_next +ffffffff81924880 t update_display_info +ffffffff81925700 t get_monitor_range +ffffffff819257a0 t do_detailed_mode +ffffffff819260c0 t hdmi_mode_alternate_clock +ffffffff81926170 t do_cvt_mode +ffffffff819263c0 t drm_mode_std +ffffffff819270d0 t do_standard_modes +ffffffff81927210 t drm_monitor_supports_rb +ffffffff81927500 t drm_gtf2_hbreak +ffffffff81927790 t do_established_modes +ffffffff81927990 t drm_match_hdmi_mode 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drm_fb_helper_blank +ffffffff8192b3a0 T drm_fb_helper_prepare +ffffffff8192b470 t drm_fb_helper_resume_worker +ffffffff8192b4a0 t drm_fb_helper_damage_work +ffffffff8192b820 T drm_fb_helper_init +ffffffff8192b890 T drm_fb_helper_alloc_fbi +ffffffff8192b8f0 T drm_fb_helper_unregister_fbi +ffffffff8192b920 T drm_fb_helper_fini +ffffffff8192ba10 T drm_fb_helper_set_suspend +ffffffff8192ba40 T drm_fb_helper_set_suspend_unlocked +ffffffff8192ba70 T drm_fb_helper_set_par +ffffffff8192bb60 T drm_fb_helper_pan_display +ffffffff8192bc30 T drm_fb_helper_fill_info +ffffffff8192bcf0 T drm_fb_helper_initial_config +ffffffff8192bd20 t __drm_fb_helper_initial_config_and_unlock +ffffffff8192c270 T drm_fb_helper_hotplug_event +ffffffff8192c470 t drm_setup_crtcs_fb +ffffffff8192c5b0 T drm_fb_helper_lastclose +ffffffff8192c660 T drm_fb_helper_output_poll_changed +ffffffff8192c680 T drm_fbdev_generic_setup +ffffffff8192c830 t drm_fbdev_client_hotplug +ffffffff8192ca60 t drm_fbdev_client_unregister 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get_unused_fd_flags +ffffffff81942e90 T put_unused_fd +ffffffff81942f20 T sync_file_get_fence +ffffffff81942fd0 T sync_file_create +ffffffff81943060 T drm_firmware_drivers_only +ffffffff81943090 t dma_fence_stub_get_name +ffffffff819430c0 t dma_fence_array_cb_func +ffffffff81943140 t dma_fence_chain_cb +ffffffff81943200 t dma_fence_chain_timo +ffffffff81944000 T drmm_kzalloc +ffffffff81944100 T drmm_kcalloc +ffffffff81944210 T drmm_kstrdup +ffffffff81944340 T drmm_kfree +ffffffff81944440 T drmm_add_action +ffffffff81944500 T drmm_add_action_or_reset +ffffffff819445d0 T drm_managed_release +ffffffff81944680 T drmm_add_final_kfree +ffffffff81945000 T mipi_dsi_attach +ffffffff81945050 T mipi_dsi_detach +ffffffff819450a0 T devm_mipi_dsi_attach +ffffffff81945110 T mipi_dsi_packet_format_is_short +ffffffff81945160 T mipi_dsi_packet_format_is_long +ffffffff819451b0 T mipi_dsi_create_packet +ffffffff819452b0 T mipi_dsi_shutdown_peripheral +ffffffff81945350 T mipi_dsi_turn_on_peripheral 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drm_mode_convert_umode +ffffffff8194ee90 T drm_mode_is_420_also +ffffffff8194eee0 T drm_mode_is_420 +ffffffff8194f000 T drm_helper_move_panel_connectors_to_head +ffffffff8194f0f0 T drm_helper_mode_fill_fb_struct +ffffffff8194f1b0 T drm_crtc_init +ffffffff8194f280 T drm_mode_config_helper_suspend +ffffffff8194f310 T drm_mode_config_helper_resume +ffffffff81950000 T drm_modeset_lock_all +ffffffff819501d0 T drm_modeset_acquire_init +ffffffff81950260 T drm_modeset_lock_all_ctx +ffffffff819503d0 T drm_modeset_backoff +ffffffff819504a0 T drm_modeset_acquire_fini +ffffffff819504d0 T drm_warn_on_modeset_not_all_locked +ffffffff81950620 T drm_modeset_unlock_all +ffffffff81950700 T drm_modeset_drop_locks +ffffffff81950790 T drm_modeset_unlock +ffffffff81950850 t modeset_lock +ffffffff81950ae0 T drm_modeset_lock_init +ffffffff81950b40 T drm_modeset_lock +ffffffff81950b90 T drm_modeset_lock_single_interruptible +ffffffff81950bb0 t __ww_mutex_lock +ffffffff81951000 T drm_mtrr_add +ffffffff81951070 T drm_mtrr_del +ffffffff81952000 T drm_panel_init +ffffffff81952040 T drm_panel_add +ffffffff81952090 T drm_panel_remove +ffffffff819520e0 T drm_panel_prepare +ffffffff81952130 T drm_panel_unprepare +ffffffff81952180 T drm_panel_enable +ffffffff81952220 T drm_panel_disable +ffffffff819522b0 T drm_panel_get_modes +ffffffff81952300 T drm_panel_of_backlight +ffffffff81953000 T drm_get_panel_orientation_quirk +ffffffff81954000 T drm_pci_set_busid +ffffffff81954090 t kasprintf +ffffffff81955000 T drm_universal_plane_init +ffffffff819550f0 t __drm_universal_plane_init +ffffffff819557e0 T __drmm_universal_plane_alloc +ffffffff81955920 t drmm_universal_plane_alloc_release +ffffffff81955960 T __drm_universal_plane_alloc +ffffffff81955aa0 T drm_plane_register_all +ffffffff81955b90 T drm_plane_unregister_all +ffffffff81955c00 T drm_plane_cleanup +ffffffff81955d50 T drm_plane_from_index +ffffffff81955db0 T drm_plane_force_disable +ffffffff81955ec0 T drm_mode_plane_set_obj_prop +ffffffff81955f40 T drm_mode_getplane_res +ffffffff81956030 T drm_mode_getplane +ffffffff81956190 T drm_plane_check_pixel_format +ffffffff81956250 T drm_any_plane_has_format +ffffffff81956380 T drm_mode_setplane +ffffffff819566e0 T drm_mode_cursor_ioctl +ffffffff81956740 t drm_mode_cursor_common +ffffffff81956dc0 T drm_mode_cursor2_ioctl +ffffffff81956dd0 T drm_mode_page_flip_ioctl +ffffffff81957340 T drm_plane_enable_fb_damage_clips +ffffffff81957360 T drm_plane_get_damage_clips_count +ffffffff819573a0 T __drm_plane_get_damage_clips +ffffffff819573e0 T drm_plane_get_damage_clips +ffffffff81957480 T drm_create_scaling_filter_prop +ffffffff819575d0 T drm_plane_create_scaling_filter_property +ffffffff81957640 t kasprintf +ffffffff81957710 t __setplane_internal +ffffffff81957900 t __setplane_check +ffffffff81958000 T drm_plane_helper_update_primary +ffffffff819584b0 t get_connectors_for_crtc +ffffffff819585c0 T drm_plane_helper_disable_primary +ffffffff81958670 T drm_plane_helper_destroy +ffffffff819586a0 T drm_plane_helper_atomic_check +ffffffff81959000 T drm_prime_remove_buf_handle +ffffffff81959090 T drm_prime_init_file_private +ffffffff819590e0 T drm_prime_destroy_file_private +ffffffff81959140 T drm_gem_dmabuf_export +ffffffff819591a0 T drm_gem_dmabuf_release +ffffffff819591e0 T drm_gem_prime_fd_to_handle +ffffffff819593e0 T drm_gem_prime_import +ffffffff81959440 t drm_prime_add_buf_handle +ffffffff81959590 T drm_prime_fd_to_handle_ioctl +ffffffff819595e0 T drm_gem_prime_handle_to_fd +ffffffff81959810 T drm_prime_handle_to_fd_ioctl +ffffffff81959870 T drm_gem_map_attach +ffffffff81959880 T drm_gem_map_detach +ffffffff81959890 T drm_gem_dmabuf_vmap +ffffffff819598a0 T drm_gem_dmabuf_vunmap +ffffffff819598b0 T drm_gem_prime_mmap +ffffffff81959900 T drm_prime_pages_to_sg +ffffffff81959950 T drm_prime_get_contiguous_size +ffffffff819599a0 T drm_gem_prime_export +ffffffff81959a30 T drm_gem_prime_import_dev +ffffffff81959a90 T drm_prime_sg_to_page_array +ffffffff81959ae0 T drm_prime_sg_to_dma_addr_array +ffffffff81959b30 T drm_prime_gem_destroy +ffffffff8195a000 T __drm_puts_coredump +ffffffff8195a0e0 T __drm_printfn_coredump +ffffffff8195a200 T __drm_puts_seq_file +ffffffff8195a230 T __drm_printfn_seq_file +ffffffff8195a260 T __drm_printfn_info +ffffffff8195a290 T __drm_printfn_debug +ffffffff8195a2c0 T __drm_printfn_err +ffffffff8195a300 T drm_puts +ffffffff8195a330 T drm_printf +ffffffff8195a3b0 T drm_print_bits +ffffffff8195a5d0 T drm_dev_printk +ffffffff8195a660 T __drm_dev_dbg +ffffffff8195a6f0 T ___drm_dbg +ffffffff8195a780 T __drm_err +ffffffff8195a810 T drm_print_regset32 +ffffffff8195b000 T drm_crtc_mode_valid +ffffffff8195b040 T drm_encoder_mode_valid +ffffffff8195b080 T drm_connector_mode_valid +ffffffff8195b0f0 T drm_kms_helper_poll_enable +ffffffff8195b1e0 T drm_helper_probe_detect +ffffffff8195b3d0 T drm_helper_probe_single_connector_modes +ffffffff8195b990 t __drm_helper_update_and_validate +ffffffff8195bd40 T drm_kms_helper_hotplug_event +ffffffff8195bd80 T drm_kms_helper_connector_hotplug_event +ffffffff8195bdc0 T drm_kms_helper_is_poll_worker +ffffffff8195bdf0 T drm_kms_helper_poll_disable +ffffffff8195be60 T drm_kms_helper_poll_init +ffffffff8195bec0 t output_poll_execute +ffffffff8195c150 T drm_kms_helper_poll_fini +ffffffff8195c1d0 T drm_connector_helper_hpd_irq_event +ffffffff8195c290 t check_connector_changed +ffffffff8195c470 T drm_helper_hpd_irq_event +ffffffff8195c5c0 T drm_crtc_helper_mode_valid_fixed +ffffffff8195c610 T drm_connector_helper_get_modes_from_ddc +ffffffff8195c690 T drm_connector_helper_get_modes_fixed +ffffffff8195c7f0 T drm_connector_helper_get_modes +ffffffff8195c850 t __delayed_work_tick +ffffffff8195d000 T drm_property_create +ffffffff8195d1f0 T drm_property_create_enum +ffffffff8195d2a0 T drm_property_add_enum +ffffffff8195d4b0 T drm_property_destroy +ffffffff8195d560 T drm_property_create_bitmask +ffffffff8195d690 T drm_property_create_range +ffffffff8195d6f0 T drm_property_create_signed_range +ffffffff8195d760 T drm_property_create_object +ffffffff8195d7f0 T drm_property_create_bool +ffffffff8195d850 T drm_mode_getproperty_ioctl +ffffffff8195da60 T drm_property_create_blob +ffffffff8195db90 t drm_property_free_blob +ffffffff8195dc00 T drm_property_blob_put +ffffffff8195dc30 T drm_property_destroy_user_blobs +ffffffff8195dcb0 T drm_property_blob_get +ffffffff8195dcf0 T drm_property_lookup_blob +ffffffff8195dd10 T drm_property_replace_global_blob +ffffffff8195de60 T drm_property_replace_blob +ffffffff8195ded0 T drm_mode_getblob_ioctl +ffffffff8195df90 T drm_mode_createblob_ioctl +ffffffff8195e090 T drm_mode_destroyblob_ioctl +ffffffff8195e190 T drm_property_change_valid_get +ffffffff8195e3e0 T drm_property_change_valid_put +ffffffff8195f000 T drm_rect_intersect +ffffffff8195f080 T drm_rect_clip_scaled +ffffffff8195f2e0 T drm_rect_calc_hscale +ffffffff8195f3a0 T drm_rect_calc_vscale +ffffffff8195f470 T drm_rect_debug_print +ffffffff8195f580 T drm_rect_rotate +ffffffff8195f640 T drm_rect_rotate_inv +ffffffff81960000 T drm_self_refresh_helper_update_avg_times +ffffffff81960140 T drm_self_refresh_helper_alter_state +ffffffff819602d0 T drm_self_refresh_helper_init +ffffffff81960470 t drm_self_refresh_helper_entry_work +ffffffff819605d0 T drm_self_refresh_helper_cleanup +ffffffff81960650 t __delayed_work_tick +ffffffff81961000 T drm_syncobj_find +ffffffff81961070 T drm_syncobj_add_point +ffffffff81961160 t syncobj_wait_syncobj_func +ffffffff81961210 T drm_syncobj_replace_fence +ffffffff819612a0 T drm_syncobj_find_fence +ffffffff81961600 t drm_syncobj_fence_add_wait +ffffffff819616d0 T drm_syncobj_free +ffffffff81961750 T drm_syncobj_create +ffffffff81961960 T drm_syncobj_get_handle +ffffffff81961a80 T drm_syncobj_get_fd +ffffffff81961ad0 T drm_syncobj_open +ffffffff81961b00 T drm_syncobj_release +ffffffff81961b30 t drm_syncobj_release_handle +ffffffff81961be0 T drm_syncobj_create_ioctl +ffffffff81961d00 T drm_syncobj_destroy_ioctl +ffffffff81961e20 T drm_syncobj_handle_to_fd_ioctl +ffffffff81962000 T drm_syncobj_fd_to_handle_ioctl +ffffffff819621e0 T drm_syncobj_transfer_ioctl +ffffffff819625f0 T drm_timeout_abs_to_jiffies +ffffffff819626d0 T drm_syncobj_wait_ioctl +ffffffff81962860 t drm_syncobj_array_find +ffffffff81962a90 t drm_syncobj_array_free +ffffffff81962b70 T drm_syncobj_timeline_wait_ioctl +ffffffff81962d00 T drm_syncobj_reset_ioctl +ffffffff81962e50 T drm_syncobj_signal_ioctl +ffffffff81962fd0 T drm_syncobj_timeline_signal_ioctl +ffffffff819631f0 T drm_syncobj_query_ioctl +ffffffff819633f0 t drm_syncobj_array_wait_timeout +ffffffff81963860 t syncobj_wait_fence_func +ffffffff81964000 T drm_vblank_count +ffffffff81964090 T drm_crtc_accurate_vblank_count +ffffffff819641a0 t drm_update_vblank_count +ffffffff819645f0 T drm_vblank_disable_and_save +ffffffff81964740 T drm_vblank_init +ffffffff819648c0 t vblank_disable_fn +ffffffff81964940 t drm_vblank_init_release +ffffffff819649c0 T drm_dev_has_vblank +ffffffff819649f0 T drm_crtc_vblank_waitqueue +ffffffff81964a30 T drm_calc_timestamping_constants +ffffffff81964c60 T drm_crtc_vblank_helper_get_vblank_timestamp_internal +ffffffff81965190 T drm_crtc_vblank_helper_get_vblank_timestamp +ffffffff819651b0 T drm_crtc_vblank_count +ffffffff81965240 T drm_crtc_vblank_count_and_time +ffffffff81965300 T drm_crtc_arm_vblank_event +ffffffff819653e0 T drm_crtc_send_vblank_event +ffffffff81965590 T drm_vblank_get +ffffffff819656a0 t drm_vblank_enable +ffffffff81965860 T drm_crtc_vblank_get +ffffffff81965960 T drm_vblank_put +ffffffff81965a90 T drm_crtc_vblank_put +ffffffff81965ab0 T drm_wait_one_vblank +ffffffff81965f00 T drm_crtc_wait_one_vblank +ffffffff81965f20 T drm_crtc_vblank_off +ffffffff81966300 T drm_crtc_vblank_reset +ffffffff81966430 T drm_crtc_set_max_vblank_count +ffffffff81966510 T drm_crtc_vblank_on +ffffffff81966660 t drm_reset_vblank_timestamp +ffffffff81966860 T drm_crtc_vblank_restore +ffffffff81966c40 T drm_legacy_modeset_ctl_ioctl +ffffffff81966e50 T drm_wait_vblank_ioctl +ffffffff81967890 T drm_handle_vblank +ffffffff81967b70 t drm_handle_vblank_events +ffffffff81967e00 T drm_crtc_handle_vblank +ffffffff81967e20 T drm_crtc_get_sequence_ioctl +ffffffff81968010 T drm_crtc_queue_sequence_ioctl +ffffffff819683e0 t __get_vblank_counter +ffffffff81969000 T drm_handle_vblank_works +ffffffff819691b0 T drm_vblank_cancel_pending_works +ffffffff819692f0 T drm_vblank_work_schedule +ffffffff81969570 T drm_vblank_work_cancel_sync +ffffffff819696d0 T drm_vblank_work_flush +ffffffff819697a0 T drm_vblank_work_init +ffffffff81969810 T drm_vblank_worker_init +ffffffff8196a000 T drm_vma_offset_manager_init +ffffffff8196a040 T drm_vma_offset_manager_destroy +ffffffff8196a050 T drm_vma_offset_lookup_locked +ffffffff8196a0e0 T drm_vma_offset_add +ffffffff8196a170 T drm_vma_offset_remove +ffffffff8196a1c0 T drm_vma_node_allow +ffffffff8196a2f0 T drm_vma_node_revoke +ffffffff8196a370 T drm_vma_node_is_allowed +ffffffff8196b000 T hdmi_avi_infoframe_init +ffffffff8196b070 T hdmi_avi_infoframe_check +ffffffff8196b0c0 T hdmi_avi_infoframe_pack_only +ffffffff8196b2c0 T hdmi_avi_infoframe_pack +ffffffff8196b320 T hdmi_spd_infoframe_init +ffffffff8196b3d0 T hdmi_spd_infoframe_check +ffffffff8196b420 T hdmi_spd_infoframe_pack_only +ffffffff8196b550 T hdmi_spd_infoframe_pack +ffffffff8196b6a0 T hdmi_audio_infoframe_init +ffffffff8196b6f0 T hdmi_audio_infoframe_check +ffffffff8196b740 T hdmi_audio_infoframe_pack_only +ffffffff8196b890 T hdmi_audio_infoframe_pack +ffffffff8196b8e0 T hdmi_audio_infoframe_pack_for_dp +ffffffff8196b9d0 T hdmi_vendor_infoframe_init +ffffffff8196ba30 T hdmi_vendor_infoframe_check +ffffffff8196bad0 T hdmi_vendor_infoframe_pack_only +ffffffff8196bca0 T hdmi_vendor_infoframe_pack +ffffffff8196bd40 T hdmi_drm_infoframe_init +ffffffff8196bda0 T hdmi_drm_infoframe_check +ffffffff8196bdf0 T hdmi_drm_infoframe_pack_only +ffffffff8196bfc0 T hdmi_drm_infoframe_pack +ffffffff8196c010 T hdmi_infoframe_check +ffffffff8196c160 T hdmi_infoframe_pack_only +ffffffff8196c370 T hdmi_infoframe_pack +ffffffff8196c4e0 T hdmi_infoframe_log +ffffffff8196d480 T hdmi_drm_infoframe_unpack_only +ffffffff8196d560 T hdmi_infoframe_unpack +ffffffff8196e000 T list_sort +ffffffff8196f000 T radix_tree_lookup +ffffffff8196f0b0 T radix_tree_iter_find +ffffffff8196f190 T radix_tree_delete +ffffffff8196f320 T radix_tree_iter_delete +ffffffff8196f340 T radix_tree_insert +ffffffff81970000 T sort +ffffffff81970040 t qsort +ffffffff81972000 T drm_dp_dual_mode_read +ffffffff81972110 T drm_dp_dual_mode_write +ffffffff819721f0 T drm_dp_dual_mode_detect +ffffffff81972490 T drm_dp_dual_mode_max_tmds_clock +ffffffff819725b0 T drm_dp_dual_mode_get_tmds_output +ffffffff819726e0 T drm_dp_dual_mode_set_tmds_output +ffffffff81972970 T drm_dp_get_dual_mode_type_name +ffffffff819729e0 T drm_lspcon_get_mode +ffffffff81972b90 T drm_lspcon_set_mode +ffffffff81973000 T drm_dp_channel_eq_ok +ffffffff81973080 T drm_dp_clock_recovery_ok +ffffffff81973100 T drm_dp_get_adjust_request_voltage +ffffffff81973140 T drm_dp_get_adjust_request_pre_emphasis +ffffffff81973180 T drm_dp_get_adjust_tx_ffe_preset +ffffffff819731c0 T drm_dp_128b132b_lane_channel_eq_done +ffffffff81973240 T drm_dp_128b132b_lane_symbol_locked +ffffffff819732b0 T drm_dp_128b132b_eq_interlane_align_done +ffffffff819732e0 T drm_dp_128b132b_cds_interlane_align_done +ffffffff81973310 T drm_dp_128b132b_link_training_failed +ffffffff81973340 T drm_dp_read_clock_recovery_delay +ffffffff81973440 T drm_dp_read_channel_eq_delay +ffffffff81973530 T drm_dp_128b132b_read_aux_rd_interval +ffffffff819735e0 T drm_dp_link_train_clock_recovery_delay +ffffffff81973660 t __8b10b_clock_recovery_delay_us +ffffffff819736e0 T drm_dp_link_train_channel_eq_delay +ffffffff81973750 T drm_dp_phy_name +ffffffff81973790 T drm_dp_lttpr_link_train_clock_recovery_delay +ffffffff819737b0 T drm_dp_lttpr_link_train_channel_eq_delay +ffffffff81973820 T drm_dp_link_rate_to_bw_code +ffffffff81973880 T drm_dp_bw_code_to_link_rate +ffffffff819738e0 T drm_dp_dpcd_probe +ffffffff81973a20 t drm_dp_dpcd_access +ffffffff81973b50 T drm_dp_dpcd_read +ffffffff81973c80 T drm_dp_dpcd_write +ffffffff81973d90 T drm_dp_dpcd_read_link_status +ffffffff81973db0 T drm_dp_dpcd_read_phy_link_status +ffffffff81973eb0 T drm_dp_downstream_is_type +ffffffff81973ef0 T drm_dp_downstream_is_tmds +ffffffff81973f60 T drm_dp_send_real_edid_checksum +ffffffff819741c0 T drm_dp_read_dpcd_caps +ffffffff81974350 T drm_dp_read_downstream_info +ffffffff81974450 T drm_dp_downstream_max_dotclock +ffffffff819744a0 T drm_dp_downstream_max_tmds_clock +ffffffff81974540 T drm_dp_downstream_min_tmds_clock +ffffffff819745c0 T drm_dp_downstream_max_bpc +ffffffff81974660 T drm_dp_downstream_420_passthrough +ffffffff819746c0 T drm_dp_downstream_444_to_420_conversion +ffffffff81974720 T drm_dp_downstream_rgb_to_ycbcr_conversion +ffffffff81974780 T drm_dp_downstream_mode +ffffffff81974800 T drm_dp_downstream_id +ffffffff81974820 T drm_dp_downstream_debug +ffffffff819748c0 T drm_dp_subconnector_type +ffffffff81974920 T drm_dp_set_subconnector_property +ffffffff81974990 T drm_dp_read_sink_count_cap +ffffffff819749e0 T drm_dp_read_sink_count +ffffffff81974a40 T drm_dp_remote_aux_init +ffffffff81974a70 t drm_dp_aux_crc_work +ffffffff81974be0 T drm_dp_aux_init +ffffffff81974c90 T drm_dp_aux_register +ffffffff81974db0 T drm_dp_aux_unregister +ffffffff81974de0 T drm_dp_psr_setup_time +ffffffff81974e20 T drm_dp_start_crc +ffffffff81974ec0 T drm_dp_stop_crc +ffffffff81974f50 T drm_dp_read_desc +ffffffff81975110 T drm_dp_dsc_sink_max_slice_count +ffffffff819751a0 T drm_dp_dsc_sink_line_buf_depth +ffffffff819751e0 T drm_dp_dsc_sink_supported_input_bpcs +ffffffff81975240 T drm_dp_read_lttpr_common_caps +ffffffff81975300 T drm_dp_read_lttpr_phy_caps +ffffffff819753c0 T drm_dp_lttpr_count +ffffffff81975440 T drm_dp_lttpr_max_link_rate +ffffffff81975490 T drm_dp_lttpr_max_lane_count +ffffffff819754c0 T drm_dp_lttpr_voltage_swing_level_3_supported +ffffffff819754f0 T drm_dp_lttpr_pre_emphasis_level_3_supported +ffffffff81975520 T drm_dp_get_phy_test_pattern +ffffffff81975640 T drm_dp_set_phy_test_pattern +ffffffff81975710 T drm_dp_vsc_sdp_log +ffffffff81975a40 T drm_dp_get_pcon_max_frl_bw +ffffffff81975a80 T drm_dp_pcon_frl_prepare +ffffffff81975ad0 T drm_dp_pcon_is_frl_ready +ffffffff81975b20 T drm_dp_pcon_frl_configure_1 +ffffffff81975c10 T drm_dp_pcon_frl_configure_2 +ffffffff81975c70 T drm_dp_pcon_reset_frl_config +ffffffff81975cc0 T drm_dp_pcon_frl_enable +ffffffff81975d70 T drm_dp_pcon_hdmi_link_active +ffffffff81975dc0 T drm_dp_pcon_hdmi_link_mode +ffffffff81975e30 T drm_dp_pcon_hdmi_frl_link_error_count +ffffffff81975f30 T drm_dp_pcon_enc_is_dsc_1_2 +ffffffff81975f60 T drm_dp_pcon_dsc_max_slices +ffffffff81975ff0 T drm_dp_pcon_dsc_max_slice_width +ffffffff81976020 T drm_dp_pcon_dsc_bpp_incr +ffffffff81976060 T drm_dp_pcon_pps_default +ffffffff819760e0 T drm_dp_pcon_pps_override_buf +ffffffff81976190 T drm_dp_pcon_pps_override_param +ffffffff81976270 T drm_dp_pcon_convert_rgb_to_ycbcr +ffffffff81976300 T drm_edp_backlight_set_level +ffffffff819763e0 T drm_edp_backlight_enable +ffffffff819765f0 t drm_edp_backlight_set_enable +ffffffff81976730 T drm_edp_backlight_disable +ffffffff81976770 T drm_edp_backlight_init +ffffffff81976cc0 T drm_panel_dp_aux_backlight +ffffffff81976e50 t __128b132b_channel_eq_delay_us +ffffffff81976ed0 t __8b10b_channel_eq_delay_us +ffffffff81976f50 t drm_dp_aux_get_crc +ffffffff81977020 t drm_dp_i2c_xfer +ffffffff81977270 t drm_dp_i2c_functionality +ffffffff819772a0 t drm_dp_i2c_do_msg +ffffffff81977680 t lock_bus +ffffffff819776a0 t trylock_bus +ffffffff819776f0 t unlock_bus +ffffffff81977710 t dp_aux_backlight_update_status +ffffffff81978000 T drm_dp_encode_sideband_req +ffffffff81978410 T drm_dp_decode_sideband_req +ffffffff81978950 T drm_dp_dump_sideband_msg_req_body +ffffffff81978d00 T drm_dp_mst_get_port_malloc +ffffffff81978d40 T drm_dp_mst_put_port_malloc +ffffffff81978e30 t kref_put +ffffffff81978e70 T drm_atomic_get_mst_payload_state +ffffffff81978ec0 T drm_dp_mst_dpcd_read +ffffffff81979180 T drm_dp_mst_dpcd_write +ffffffff819791d0 t drm_dp_send_dpcd_write +ffffffff81979410 T drm_dp_mst_connector_late_register +ffffffff81979490 T drm_dp_mst_connector_early_unregister +ffffffff819794d0 T drm_dp_send_power_updown_phy +ffffffff81979710 t drm_dp_mst_topology_put_port +ffffffff81979840 t drm_dp_mst_wait_tx_reply +ffffffff81979b90 T drm_dp_send_query_stream_enc_status +ffffffff81979e50 T drm_dp_add_payload_part1 +ffffffff81979fd0 T drm_dp_remove_payload +ffffffff8197a130 T drm_dp_add_payload_part2 +ffffffff8197a2e0 T drm_dp_get_vc_payload_bw +ffffffff8197a370 T drm_dp_read_mst_cap +ffffffff8197a3d0 T drm_dp_mst_topology_mgr_set_mst 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drm_dp_mst_dsc_aux_for_port +ffffffff8197cef0 T drm_dp_mst_atomic_enable_dsc +ffffffff8197d090 T drm_dp_mst_atomic_check +ffffffff8197d370 t drm_dp_mst_atomic_check_mstb_bw_limit +ffffffff8197d640 t drm_dp_mst_duplicate_state +ffffffff8197d810 t drm_dp_mst_destroy_state +ffffffff8197d8d0 T drm_atomic_get_new_mst_topology_state +ffffffff8197d8e0 T drm_dp_mst_topology_mgr_init +ffffffff8197db40 t drm_dp_mst_link_probe_work +ffffffff8197dde0 t drm_dp_tx_work +ffffffff8197de20 t drm_dp_delayed_destroy_work +ffffffff8197e240 t drm_dp_mst_up_req_work +ffffffff8197e740 T drm_dp_mst_topology_mgr_destroy +ffffffff8197e7c0 t drm_dp_mst_is_virtual_dpcd +ffffffff8197e8a0 t drm_dp_free_mst_branch_device +ffffffff8197e8e0 t drm_dp_mst_topology_get_port_validated_locked +ffffffff8197e960 t drm_dp_mst_dump_sideband_msg_tx +ffffffff8197eb70 t process_single_down_tx_qlock +ffffffff8197ece0 t process_single_tx_qlock +ffffffff8197f1c0 t drm_dp_msg_data_crc4 +ffffffff8197f2e0 t drm_dp_payload_send_msg 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drm_hdmi_avi_infoframe_colorimetry +ffffffff81984170 T drm_hdmi_avi_infoframe_bars +ffffffff819841c0 T drm_hdmi_avi_infoframe_content_type +ffffffff81985000 T drm_scdc_read +ffffffff81985090 T drm_scdc_write +ffffffff81985170 T drm_scdc_get_scrambling_status +ffffffff81985220 T drm_scdc_set_scrambling +ffffffff81985370 T drm_scdc_set_high_tmds_clock_ratio +ffffffff81986000 T drm_gem_ttm_mmap +ffffffff81986070 T drm_gem_ttm_vmap +ffffffff819860c0 T drm_gem_ttm_vunmap +ffffffff81987000 T ttm_agp_bind +ffffffff81987050 T ttm_agp_unbind +ffffffff81987070 T ttm_agp_is_bound +ffffffff819870c0 T ttm_agp_destroy +ffffffff819870e0 T ttm_agp_tt_create +ffffffff81988000 T ttm_bo_move_to_lru_tail +ffffffff81988040 T ttm_bo_set_bulk_move +ffffffff81988100 T ttm_bo_delayed_delete +ffffffff819883f0 t ttm_bo_cleanup_refs +ffffffff819887a0 T ttm_bo_put +ffffffff81988ce0 T ttm_bo_lock_delayed_workqueue +ffffffff81988d60 T ttm_bo_unlock_delayed_workqueue +ffffffff81988dd0 T ttm_bo_eviction_valuable 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intel_bios_fini_panel +ffffffff819c2880 T intel_bios_is_tv_present +ffffffff819c2900 T intel_bios_is_lvds_present +ffffffff819c29b0 T intel_bios_is_port_present +ffffffff819c2a30 T intel_bios_is_port_edp +ffffffff819c2a90 T intel_bios_encoder_data_lookup +ffffffff819c2ac0 T intel_bios_is_port_dp_dual_mode +ffffffff819c2b30 T intel_bios_is_dsi_present +ffffffff819c2c10 T intel_bios_get_dsc_params +ffffffff819c2e10 T intel_bios_is_port_hpd_inverted +ffffffff819c2ed0 T intel_bios_is_lspcon_present +ffffffff819c2f20 T intel_bios_is_lane_reversal_needed +ffffffff819c2f60 T intel_bios_port_aux_ch +ffffffff819c31b0 T intel_bios_max_tmds_clock +ffffffff819c3250 T intel_bios_hdmi_level_shift +ffffffff819c32b0 T intel_bios_encoder_dp_boost_level +ffffffff819c3340 T intel_bios_encoder_hdmi_boost_level +ffffffff819c33d0 T intel_bios_dp_max_link_rate +ffffffff819c3460 T intel_bios_dp_max_lane_count +ffffffff819c34c0 T intel_bios_alternate_ddc_pin +ffffffff819c3630 T intel_bios_encoder_supports_typec_usb +ffffffff819c3680 T intel_bios_encoder_supports_tbt +ffffffff819c36c0 t opregion_get_panel_type +ffffffff819c36d0 t vbt_get_panel_type +ffffffff819c37e0 t pnpid_get_panel_type +ffffffff819c39c0 t fallback_get_panel_type +ffffffff819c39f0 t fill_detail_timing_data +ffffffff819c4000 T icl_pcode_restrict_qgv_points +ffffffff819c40b0 T intel_bw_init_hw +ffffffff819c45d0 t tgl_get_bw_info +ffffffff819c4bc0 T intel_bw_crtc_update +ffffffff819c4c90 t intel_bw_crtc_data_rate +ffffffff819c4da0 T intel_atomic_get_old_bw_state +ffffffff819c4dc0 T intel_atomic_get_new_bw_state +ffffffff819c4de0 T intel_atomic_get_bw_state +ffffffff819c4e00 T intel_bw_min_cdclk +ffffffff819c5060 T intel_bw_calc_min_cdclk +ffffffff819c5410 T intel_bw_atomic_check +ffffffff819c5c10 T intel_bw_init +ffffffff819c5c80 t icl_get_qgv_points +ffffffff819c6270 t skl_plane_calc_dbuf_bw +ffffffff819c63c0 t intel_bw_duplicate_state +ffffffff819c6430 t intel_bw_destroy_state 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hsw_ddi_is_clock_enabled +ffffffff819de710 T intel_ddi_enable_clock +ffffffff819de750 T intel_ddi_disable_clock +ffffffff819de790 T intel_ddi_sanitize_encoder_pll_mapping +ffffffff819de970 T dp_tp_ctl_reg +ffffffff819de9f0 T dp_tp_status_reg +ffffffff819dea70 T intel_ddi_update_pipe +ffffffff819deaf0 T intel_ddi_compute_min_voltage_level +ffffffff819deb60 T intel_ddi_get_clock +ffffffff819dec70 T hsw_ddi_get_config +ffffffff819ded50 t intel_ddi_get_config +ffffffff819df5c0 T intel_ddi_init +ffffffff819e0160 t intel_ddi_hotplug +ffffffff819e0590 t intel_ddi_compute_output_type +ffffffff819e0610 t intel_ddi_compute_config +ffffffff819e0750 t intel_ddi_compute_config_late +ffffffff819e0a00 t intel_enable_ddi +ffffffff819e11e0 t intel_ddi_pre_pll_enable +ffffffff819e1350 t intel_ddi_pre_enable +ffffffff819e2020 t intel_disable_ddi +ffffffff819e21a0 t intel_ddi_post_disable +ffffffff819e26c0 t intel_ddi_sync_state +ffffffff819e2770 t intel_ddi_initial_fastset_check +ffffffff819e2830 t intel_ddi_encoder_suspend +ffffffff819e28e0 t intel_ddi_encoder_shutdown +ffffffff819e2990 t intel_ddi_get_power_domains +ffffffff819e2b40 t dg2_ddi_get_config +ffffffff819e2b90 t adls_ddi_enable_clock +ffffffff819e2d10 t adls_ddi_disable_clock +ffffffff819e2dd0 t adls_ddi_is_clock_enabled +ffffffff819e2e60 t adls_ddi_get_config +ffffffff819e2f20 t rkl_ddi_enable_clock +ffffffff819e30a0 t rkl_ddi_disable_clock +ffffffff819e3130 t rkl_ddi_is_clock_enabled +ffffffff819e31b0 t rkl_ddi_get_config +ffffffff819e3280 t dg1_ddi_enable_clock +ffffffff819e3440 t dg1_ddi_disable_clock +ffffffff819e3500 t dg1_ddi_is_clock_enabled +ffffffff819e3590 t dg1_ddi_get_config +ffffffff819e3650 t jsl_ddi_tc_enable_clock +ffffffff819e36e0 t jsl_ddi_tc_disable_clock +ffffffff819e37a0 t jsl_ddi_tc_is_clock_enabled +ffffffff819e3850 t icl_ddi_combo_get_config +ffffffff819e38f0 t icl_ddi_combo_enable_clock +ffffffff819e3a50 t icl_ddi_combo_disable_clock +ffffffff819e3af0 t icl_ddi_combo_is_clock_enabled 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kbl_u_get_buf_trans +ffffffff819e8e90 t kbl_get_buf_trans +ffffffff819e8f40 t skl_y_get_buf_trans +ffffffff819e8ff0 t skl_u_get_buf_trans +ffffffff819e90a0 t skl_get_buf_trans +ffffffff819e9150 t bdw_get_buf_trans +ffffffff819e91f0 t hsw_get_buf_trans +ffffffff819ea000 T intel_update_watermarks +ffffffff819ea040 T vlv_get_hpll_vco +ffffffff819ea090 T vlv_get_cck_clock +ffffffff819ea140 T vlv_get_cck_clock_hpll +ffffffff819ea240 T is_trans_port_sync_mode +ffffffff819ea280 T intel_crtc_bigjoiner_slave_pipes +ffffffff819ea2e0 T intel_crtc_is_bigjoiner_slave +ffffffff819ea340 T intel_crtc_is_bigjoiner_master +ffffffff819ea3a0 T intel_master_crtc +ffffffff819ea430 T assert_transcoder +ffffffff819ea5e0 T vlv_wait_port_ready +ffffffff819ea730 T intel_enable_transcoder +ffffffff819eaa20 T intel_disable_transcoder +ffffffff819ead20 T intel_rotation_info_size +ffffffff819ead60 T intel_remapped_info_size +ffffffff819eae80 T intel_plane_uses_fence +ffffffff819eaed0 T intel_fb_xy_to_linear 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intel_encoder_destroy +ffffffff819ec1e0 T intel_encoder_get_config +ffffffff819ec210 t intel_crtc_readout_derived_state +ffffffff819ec640 T intel_link_compute_m_n +ffffffff819ec760 T intel_zero_m_n +ffffffff819ec7a0 T intel_set_m_n +ffffffff819ec860 T intel_cpu_transcoder_has_m2_n2 +ffffffff819ec8c0 T intel_cpu_transcoder_set_m1_n1 +ffffffff819eca80 T intel_cpu_transcoder_set_m2_n2 +ffffffff819ecbe0 T i9xx_set_pipeconf +ffffffff819ecd90 T ilk_set_pipeconf +ffffffff819ecf60 T bdw_get_pipemisc_bpp +ffffffff819ed040 T ilk_get_lanes_required +ffffffff819ed0a0 T intel_get_m_n +ffffffff819ed1a0 T intel_cpu_transcoder_get_m1_n1 +ffffffff819ed340 T intel_cpu_transcoder_get_m2_n2 +ffffffff819ed4b0 T intel_crtc_get_pipe_config +ffffffff819ed520 T intel_get_load_detect_pipe +ffffffff819ed940 T intel_release_load_detect_pipe +ffffffff819eda10 T i9xx_crtc_clock_get +ffffffff819edca0 T intel_dotclock_calculate +ffffffff819edd00 T intel_crtc_dotclock +ffffffff819eddd0 T intel_encoder_current_mode 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intel_modeset_driver_remove_noirq +ffffffff819f3700 T intel_modeset_driver_remove_nogem +ffffffff819f3730 T intel_modeset_probe_defer +ffffffff819f3760 T intel_display_driver_register +ffffffff819f37c0 T intel_display_driver_unregister +ffffffff819f3840 T intel_scanout_needs_vtd_wa +ffffffff819f3880 t wait_for_pipe_scanline_moving +ffffffff819f3ae0 t hsw_get_pipe_config +ffffffff819f48d0 t hsw_crtc_enable +ffffffff819f5300 t hsw_crtc_disable +ffffffff819f54b0 t skl_commit_modeset_enables +ffffffff819f5a70 t intel_get_transcoder_timings +ffffffff819f5d40 t ilk_get_pfit_config +ffffffff819f5ec0 t enabled_bigjoiner_pipes +ffffffff819f60d0 t bdw_set_pipemisc +ffffffff819f6210 t ilk_pfit_enable +ffffffff819f6320 t intel_set_transcoder_timings +ffffffff819f66e0 t intel_update_crtc +ffffffff819f6cd0 t intel_pre_plane_update +ffffffff819f71e0 t intel_commit_modeset_enables +ffffffff819f72f0 t ilk_get_pipe_config +ffffffff819f7630 t ilk_crtc_enable +ffffffff819f7ce0 t ilk_crtc_disable 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__intel_display_power_put_async +ffffffff819ff8b0 t __intel_display_power_put_domain +ffffffff819ffa30 T intel_display_power_flush_work +ffffffff819ffb50 t release_async_put_domains +ffffffff819ffc30 T intel_display_power_put_unchecked +ffffffff819ffc80 T intel_display_power_get_in_set +ffffffff819ffd60 T intel_display_power_get_in_set_if_enabled +ffffffff819ffe10 T intel_display_power_put_mask_in_set +ffffffff819ffee0 T intel_power_domains_init +ffffffff81a00120 t intel_display_power_put_async_work +ffffffff81a00390 T intel_power_domains_cleanup +ffffffff81a003b0 T gen9_dbuf_slices_update +ffffffff81a005c0 T intel_power_domains_init_hw +ffffffff81a00d50 t icl_display_core_init +ffffffff81a01640 t bxt_display_core_init +ffffffff81a01770 T intel_power_domains_driver_remove +ffffffff81a01860 T intel_power_domains_sanitize_state +ffffffff81a01940 T intel_power_domains_enable +ffffffff81a01990 T intel_power_domains_disable +ffffffff81a01a40 T intel_power_domains_suspend +ffffffff81a01bd0 t icl_display_core_uninit +ffffffff81a01c70 t bxt_display_core_uninit +ffffffff81a01d20 T intel_power_domains_resume +ffffffff81a01df0 T intel_display_power_suspend_late +ffffffff81a01ee0 t hsw_enable_pc8 +ffffffff81a02880 T intel_display_power_resume_early +ffffffff81a02970 t hsw_disable_pc8 +ffffffff81a02df0 T intel_display_power_suspend +ffffffff81a02e70 T intel_display_power_resume +ffffffff81a02f50 T intel_display_power_debug +ffffffff81a03010 T intel_display_power_ddi_io_domain +ffffffff81a030f0 T intel_display_power_ddi_lanes_domain +ffffffff81a031d0 T intel_display_power_legacy_aux_domain +ffffffff81a032e0 T intel_display_power_tbt_aux_domain +ffffffff81a033f0 t __delayed_work_tick +ffffffff81a04000 T intel_display_power_map_init +ffffffff81a04170 t __set_power_wells +ffffffff81a04550 T intel_display_power_map_cleanup +ffffffff81a05000 T lookup_power_well +ffffffff81a050c0 T intel_power_well_enable +ffffffff81a05150 T intel_power_well_name +ffffffff81a05190 T intel_power_well_disable +ffffffff81a051f0 T intel_power_well_sync_hw +ffffffff81a05260 T intel_power_well_get +ffffffff81a052f0 T intel_power_well_put +ffffffff81a053e0 T intel_power_well_is_enabled +ffffffff81a05400 T intel_power_well_is_enabled_cached +ffffffff81a05430 T intel_display_power_well_is_enabled +ffffffff81a054f0 T intel_power_well_is_always_on +ffffffff81a05520 T intel_power_well_domains +ffffffff81a05550 T intel_power_well_refcount +ffffffff81a05580 T gen9_sanitize_dc_state +ffffffff81a05650 T gen9_set_dc_state +ffffffff81a059a0 T gen9_enable_dc5 +ffffffff81a05c00 T skl_enable_dc6 +ffffffff81a05d50 T bxt_enable_dc9 +ffffffff81a05ef0 T bxt_disable_dc9 +ffffffff81a05fd0 T gen9_disable_dc_states +ffffffff81a063a0 T chv_phy_powergate_ch +ffffffff81a064b0 t assert_chv_phy_status +ffffffff81a06850 T chv_phy_powergate_lanes +ffffffff81a06b00 t i9xx_power_well_sync_hw_noop +ffffffff81a06b30 t i9xx_always_on_power_well_noop +ffffffff81a06b60 t i9xx_always_on_power_well_enabled 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bxt_dpio_cmn_power_well_enabled +ffffffff81a07ae0 t vlv_display_power_well_enable +ffffffff81a07b10 t vlv_display_power_well_disable +ffffffff81a07b80 t vlv_dpio_cmn_power_well_enable +ffffffff81a07c00 t vlv_dpio_cmn_power_well_disable +ffffffff81a07cf0 t vlv_power_well_enable +ffffffff81a07d10 t vlv_power_well_disable +ffffffff81a07d20 t icl_aux_power_well_enable +ffffffff81a083a0 t icl_aux_power_well_disable +ffffffff81a08640 t tgl_tc_cold_off_power_well_sync_hw +ffffffff81a08660 t tgl_tc_cold_off_power_well_enable +ffffffff81a08680 t tgl_tc_cold_off_power_well_disable +ffffffff81a08690 t tgl_tc_cold_off_power_well_is_enabled +ffffffff81a086c0 t xelpdp_aux_power_well_enable +ffffffff81a087a0 t xelpdp_aux_power_well_disable +ffffffff81a08870 t xelpdp_aux_power_well_enabled +ffffffff81a08920 t chv_set_pipe_power_well +ffffffff81a08b20 t vlv_display_power_well_init +ffffffff81a08db0 t vlv_set_power_well +ffffffff81a08fc0 t hsw_wait_for_power_well_enable +ffffffff81a09100 t hsw_wait_for_power_well_disable +ffffffff81a09390 t tgl_tc_cold_request +ffffffff81a0a000 T intel_dkl_phy_read +ffffffff81a0a100 T intel_dkl_phy_write +ffffffff81a0a1f0 T intel_dkl_phy_rmw +ffffffff81a0a310 T intel_dkl_phy_posting_read +ffffffff81a0b000 T intel_dmc_has_payload +ffffffff81a0b030 T intel_dmc_load_program +ffffffff81a0b810 t pipedmc_clock_gating_wa +ffffffff81a0ba00 T intel_dmc_disable_program +ffffffff81a0bc20 T assert_dmc_loaded +ffffffff81a0bd70 T intel_dmc_ucode_init +ffffffff81a0c040 t dmc_load_work_fn +ffffffff81a0c8a0 T intel_dmc_ucode_suspend +ffffffff81a0c910 T intel_dmc_ucode_resume +ffffffff81a0c9a0 T intel_dmc_ucode_fini +ffffffff81a0cad0 T intel_dmc_print_error_state +ffffffff81a0cb70 T intel_dmc_debugfs_register +ffffffff81a0d000 T intel_dp_is_edp +ffffffff81a0d030 T intel_dp_is_uhbr +ffffffff81a0d060 T intel_dp_max_lane_count +ffffffff81a0d0c0 T intel_dp_link_required +ffffffff81a0d100 T intel_dp_max_data_rate +ffffffff81a0d160 T intel_dp_can_bigjoiner +ffffffff81a0d1b0 T intel_dp_get_link_train_fallback_values +ffffffff81a0d590 T intel_dp_mode_to_fec_clock +ffffffff81a0d5d0 T intel_dp_min_bpp +ffffffff81a0d610 T intel_dp_source_supports_tps3 +ffffffff81a0d660 T intel_dp_source_supports_tps4 +ffffffff81a0d690 T intel_dp_max_link_rate +ffffffff81a0d750 T intel_dp_rate_select +ffffffff81a0d7f0 T intel_dp_compute_rate +ffffffff81a0d8c0 T intel_dp_adjust_compliance_config +ffffffff81a0da00 T intel_dp_limited_color_range +ffffffff81a0da70 T intel_dp_compute_psr_vsc_sdp +ffffffff81a0dae0 T intel_dp_needs_vsc_sdp +ffffffff81a0db30 t intel_dp_compute_vsc_colorimetry +ffffffff81a0dcb0 T intel_dp_compute_config +ffffffff81a0e340 t intel_dp_compute_output_format +ffffffff81a0e570 T intel_dp_set_link_params +ffffffff81a0e5b0 T intel_edp_backlight_on +ffffffff81a0e660 T intel_edp_backlight_off +ffffffff81a0e710 T intel_dp_sink_set_decompression_state +ffffffff81a0e7b0 T intel_dp_wait_source_oui +ffffffff81a0e880 T intel_dp_set_power +ffffffff81a0ea90 T intel_dp_sync_state +ffffffff81a0eb10 t intel_dp_get_dpcd +ffffffff81a0ec70 t intel_dp_reset_max_link_params +ffffffff81a0ed80 T intel_dp_initial_fastset_check +ffffffff81a0ee80 T intel_dp_check_frl_training +ffffffff81a0f410 T intel_dp_pcon_dsc_configure +ffffffff81a0f5e0 T intel_dp_configure_protocol_converter +ffffffff81a0f750 T intel_dp_get_colorimetry_status +ffffffff81a0f7b0 T intel_edp_fixup_vbt_bpp +ffffffff81a0f850 T intel_write_dp_vsc_sdp +ffffffff81a0f9e0 T intel_dp_set_infoframes +ffffffff81a0fb00 t intel_write_dp_sdp +ffffffff81a0fdf0 T intel_read_dp_sdp +ffffffff81a10120 T intel_dp_retrain_link +ffffffff81a107d0 T intel_dp_phy_test +ffffffff81a10eb0 T intel_digital_port_connected +ffffffff81a10f50 T intel_dp_encoder_flush_work +ffffffff81a10fa0 T intel_dp_encoder_suspend +ffffffff81a10fe0 T intel_dp_encoder_shutdown +ffffffff81a11020 T intel_dp_hpd_pulse +ffffffff81a11770 T intel_dp_is_port_edp +ffffffff81a117c0 T intel_dp_init_connector +ffffffff81a12910 t intel_dp_modeset_retry_work_fn +ffffffff81a12990 t intel_dp_set_common_rates +ffffffff81a12b30 T intel_dp_mst_suspend +ffffffff81a12bd0 T intel_dp_mst_resume +ffffffff81a12c80 t intel_dp_compute_link_config +ffffffff81a139a0 t intel_dp_dsc_get_slice_count +ffffffff81a13b10 t intel_dp_set_sink_rates +ffffffff81a13d40 t intel_dp_check_device_service_irq +ffffffff81a14310 t intel_dp_force +ffffffff81a14450 t intel_dp_connector_register +ffffffff81a14530 t intel_dp_connector_unregister +ffffffff81a14580 t intel_dp_oob_hotplug_event +ffffffff81a145f0 t intel_dp_set_edid +ffffffff81a14a20 t intel_dp_get_modes +ffffffff81a14b20 t intel_dp_detect +ffffffff81a15410 t intel_dp_mode_valid +ffffffff81a15ba0 t intel_dp_connector_atomic_check +ffffffff81a15ed0 t intel_dp_get_dsc_sink_cap +ffffffff81a17000 T intel_dp_aux_fini +ffffffff81a17020 T intel_dp_aux_init +ffffffff81a171f0 t xelpdp_aux_ctl_reg +ffffffff81a172b0 t xelpdp_aux_data_reg +ffffffff81a17380 t tgl_aux_ctl_reg +ffffffff81a17400 t tgl_aux_data_reg +ffffffff81a17490 t skl_aux_ctl_reg +ffffffff81a17510 t skl_aux_data_reg +ffffffff81a175a0 t ilk_aux_ctl_reg +ffffffff81a17620 t ilk_aux_data_reg +ffffffff81a176a0 t g4x_aux_ctl_reg +ffffffff81a17720 t g4x_aux_data_reg +ffffffff81a177b0 t skl_get_aux_clock_divider +ffffffff81a177e0 t hsw_get_aux_clock_divider +ffffffff81a17880 t ilk_get_aux_clock_divider +ffffffff81a178e0 t g4x_get_aux_clock_divider +ffffffff81a17930 t skl_get_aux_send_ctl +ffffffff81a179a0 t g4x_get_aux_send_ctl +ffffffff81a179f0 t kasprintf +ffffffff81a17ac0 t intel_dp_aux_transfer +ffffffff81a17d10 t intel_dp_aux_xfer +ffffffff81a19000 T intel_dp_aux_init_backlight_funcs +ffffffff81a19270 t intel_dp_aux_hdr_setup_backlight +ffffffff81a193c0 t intel_dp_aux_hdr_get_backlight +ffffffff81a19530 t intel_dp_aux_hdr_set_backlight +ffffffff81a19620 t intel_dp_aux_hdr_disable_backlight +ffffffff81a196a0 t intel_dp_aux_hdr_enable_backlight +ffffffff81a198e0 t intel_dp_aux_vesa_setup_backlight +ffffffff81a19aa0 t intel_dp_aux_vesa_get_backlight +ffffffff81a19ad0 t intel_dp_aux_vesa_set_backlight +ffffffff81a19b70 t intel_dp_aux_vesa_disable_backlight +ffffffff81a19c20 t intel_dp_aux_vesa_enable_backlight +ffffffff81a1a000 T intel_dp_hdcp_init +ffffffff81a1a0b0 t intel_dp_hdcp_write_an_aksv +ffffffff81a1a1a0 t intel_dp_hdcp_read_bksv +ffffffff81a1a230 t intel_dp_hdcp_read_bstatus +ffffffff81a1a2c0 t intel_dp_hdcp_repeater_present +ffffffff81a1a360 t intel_dp_hdcp_read_ri_prime +ffffffff81a1a3f0 t intel_dp_hdcp_read_ksv_ready +ffffffff81a1a490 t intel_dp_hdcp_read_ksv_fifo +ffffffff81a1a580 t intel_dp_hdcp_read_v_prime_part +ffffffff81a1a620 t intel_dp_hdcp_toggle_signalling +ffffffff81a1a650 t intel_dp_mst_hdcp_stream_encryption +ffffffff81a1a850 t intel_dp_hdcp_check_link +ffffffff81a1a8d0 t intel_dp_hdcp_capable +ffffffff81a1a970 t intel_dp_hdcp2_capable +ffffffff81a1a9f0 t intel_dp_hdcp2_write_msg +ffffffff81a1aab0 t intel_dp_hdcp2_read_msg +ffffffff81a1b180 t intel_dp_hdcp2_config_stream_type +ffffffff81a1b230 t intel_dp_mst_hdcp2_stream_encryption +ffffffff81a1b4b0 t intel_dp_mst_hdcp2_check_link +ffffffff81a1b570 t get_hdcp2_dp_msg_data +ffffffff81a1b6b0 t intel_dp_hdcp2_check_link +ffffffff81a1c000 T intel_dp_init_lttpr_and_dprx_caps +ffffffff81a1c2a0 T intel_dp_get_adjust_train +ffffffff81a1c960 T intel_dp_program_link_training_pattern +ffffffff81a1ca50 T intel_dp_set_signal_levels +ffffffff81a1cdb0 T intel_dp_dump_link_status +ffffffff81a1ce80 T intel_dp_stop_link_train +ffffffff81a1d0b0 T intel_dp_start_link_train +ffffffff81a1e1f0 t intel_dp_link_train_phy +ffffffff81a20000 T intel_dp_mst_encoder_active_links +ffffffff81a20030 T intel_dp_mst_encoder_init +ffffffff81a20270 T intel_dp_mst_source_support +ffffffff81a202a0 T intel_dp_mst_encoder_cleanup +ffffffff81a202f0 T intel_dp_mst_is_master_trans +ffffffff81a20330 T intel_dp_mst_is_slave_trans +ffffffff81a20370 t intel_dp_add_mst_connector +ffffffff81a20580 t intel_dp_mst_poll_hpd_irq +ffffffff81a205a0 t intel_dp_mst_get_hw_state +ffffffff81a20600 t intel_dp_mst_connector_late_register +ffffffff81a20670 t intel_dp_mst_connector_early_unregister +ffffffff81a206a0 t intel_dp_mst_get_modes +ffffffff81a20740 t intel_dp_mst_detect +ffffffff81a20830 t intel_dp_mst_mode_valid_ctx +ffffffff81a20980 t intel_mst_atomic_best_encoder +ffffffff81a209d0 t intel_dp_mst_atomic_check +ffffffff81a20b50 t intel_dp_mst_compute_config +ffffffff81a20e60 t intel_dp_mst_compute_config_late +ffffffff81a20f50 t intel_mst_disable_dp +ffffffff81a21000 t intel_mst_post_disable_dp +ffffffff81a212c0 t intel_mst_pre_pll_enable_dp +ffffffff81a21310 t intel_mst_pre_enable_dp +ffffffff81a21530 t intel_mst_enable_dp +ffffffff81a21920 t intel_dp_mst_enc_get_hw_state +ffffffff81a21960 t intel_dp_mst_enc_get_config +ffffffff81a21980 t intel_dp_mst_initial_fastset_check +ffffffff81a219a0 t intel_dp_mst_encoder_destroy +ffffffff81a22000 T bxt_port_to_phy_channel +ffffffff81a22130 T bxt_ddi_phy_set_signal_levels +ffffffff81a22650 T bxt_ddi_phy_is_enabled +ffffffff81a227a0 T bxt_ddi_phy_uninit +ffffffff81a22890 T bxt_ddi_phy_init +ffffffff81a22ac0 t _bxt_ddi_phy_init +ffffffff81a230e0 T bxt_ddi_phy_verify_state +ffffffff81a23420 t __phy_reg_verify_state +ffffffff81a23520 T bxt_ddi_phy_calc_lane_lat_optim_mask +ffffffff81a23590 T bxt_ddi_phy_set_lane_optim_mask +ffffffff81a238b0 T bxt_ddi_phy_get_lane_lat_optim_mask +ffffffff81a23b00 T chv_set_phy_signal_level +ffffffff81a23e60 T chv_data_lane_soft_reset +ffffffff81a24040 T chv_phy_pre_pll_enable +ffffffff81a242d0 T chv_phy_pre_encoder_enable +ffffffff81a24560 T chv_phy_release_cl2_override +ffffffff81a245f0 T chv_phy_post_pll_disable +ffffffff81a246a0 T vlv_set_phy_signal_level +ffffffff81a24820 T vlv_phy_pre_pll_enable +ffffffff81a24930 T vlv_phy_pre_encoder_enable +ffffffff81a24a40 T vlv_phy_reset_lanes +ffffffff81a25000 T pnv_calc_dpll_params +ffffffff81a250b0 T i9xx_calc_dpll_params +ffffffff81a25180 T vlv_calc_dpll_params +ffffffff81a25230 T chv_calc_dpll_params +ffffffff81a25300 T bxt_find_best_dpll +ffffffff81a25320 t chv_find_best_dpll +ffffffff81a25660 T i9xx_dpll_compute_fp +ffffffff81a256a0 T vlv_compute_dpll +ffffffff81a25720 T chv_compute_dpll +ffffffff81a257a0 T intel_dpll_crtc_compute_clock +ffffffff81a25890 T intel_dpll_crtc_get_shared_dpll +ffffffff81a259e0 T intel_dpll_init_clock_hook +ffffffff81a25ad0 T i9xx_enable_pll +ffffffff81a25e80 T vlv_enable_pll +ffffffff81a263e0 T chv_enable_pll +ffffffff81a26a50 T vlv_force_pll_on +ffffffff81a26ba0 T vlv_disable_pll +ffffffff81a26c60 T chv_disable_pll +ffffffff81a26d90 T i9xx_disable_pll +ffffffff81a26e90 T vlv_force_pll_off +ffffffff81a26f80 T assert_pll_enabled +ffffffff81a27060 T assert_pll_disabled +ffffffff81a27140 t intel_pll_is_valid +ffffffff81a27210 t dg2_crtc_compute_clock +ffffffff81a27290 t hsw_crtc_compute_clock +ffffffff81a27350 t hsw_crtc_get_shared_dpll +ffffffff81a273f0 t ilk_crtc_compute_clock +ffffffff81a276e0 t ilk_crtc_get_shared_dpll +ffffffff81a27730 t g4x_find_best_dpll +ffffffff81a27a70 t chv_crtc_compute_clock +ffffffff81a27b70 t vlv_crtc_compute_clock +ffffffff81a28020 t g4x_crtc_compute_clock +ffffffff81a28170 t i9xx_compute_dpll +ffffffff81a283f0 t pnv_crtc_compute_clock +ffffffff81a287a0 t i9xx_crtc_compute_clock +ffffffff81a288c0 t i9xx_find_best_dpll +ffffffff81a28bf0 t i8xx_crtc_compute_clock +ffffffff81a29000 T intel_get_shared_dpll_by_id +ffffffff81a29040 T intel_get_shared_dpll_id +ffffffff81a290d0 T assert_shared_dpll +ffffffff81a291f0 T intel_dpll_get_hw_state +ffffffff81a29210 T icl_tc_port_to_pll_id +ffffffff81a29240 T intel_enable_shared_dpll +ffffffff81a29530 T intel_disable_shared_dpll +ffffffff81a29760 T intel_shared_dpll_swap_state +ffffffff81a29840 T icl_set_active_port_dpll +ffffffff81a29880 T intel_shared_dpll_init +ffffffff81a29a90 T intel_compute_shared_dplls +ffffffff81a29b20 T intel_reserve_shared_dplls +ffffffff81a29bb0 T intel_release_shared_dplls +ffffffff81a29bf0 T intel_update_active_dpll +ffffffff81a29c50 T intel_dpll_get_freq +ffffffff81a29ce0 T intel_dpll_update_ref_clks +ffffffff81a29d20 T intel_dpll_readout_hw_state +ffffffff81a29ea0 T intel_dpll_sanitize_state +ffffffff81a29f80 T intel_dpll_dump_hw_state +ffffffff81a2a000 T intel_shared_dpll_state_verify +ffffffff81a2a120 t verify_single_dpll_state +ffffffff81a2a440 T intel_shared_dpll_verify_disabled +ffffffff81a2a4b0 t icl_compute_dplls +ffffffff81a2b290 t icl_get_dplls +ffffffff81a2ba00 t icl_put_dplls +ffffffff81a2bac0 t icl_update_active_dpll +ffffffff81a2bb60 t icl_update_dpll_ref_clks +ffffffff81a2bb90 t icl_dump_hw_state +ffffffff81a2bc50 t combo_pll_enable +ffffffff81a2be70 t combo_pll_disable +ffffffff81a2bf60 t combo_pll_get_hw_state +ffffffff81a2bff0 t icl_ddi_combo_pll_get_freq +ffffffff81a2c1c0 t icl_dpll_write +ffffffff81a2c460 t adlp_cmtg_clock_gating_wa +ffffffff81a2c5c0 t icl_pll_disable +ffffffff81a2c760 t icl_pll_get_hw_state +ffffffff81a2caa0 t tbt_pll_enable +ffffffff81a2cc50 t tbt_pll_disable +ffffffff81a2cc70 t tbt_pll_get_hw_state +ffffffff81a2cc90 t icl_ddi_tbt_pll_get_freq +ffffffff81a2cd00 t mg_pll_enable +ffffffff81a2d2b0 t mg_pll_disable +ffffffff81a2d2f0 t dkl_pll_get_hw_state +ffffffff81a2d4c0 t icl_ddi_mg_pll_get_freq +ffffffff81a2d590 t intel_find_shared_dpll +ffffffff81a2d8c0 t intel_unreference_shared_dpll +ffffffff81a2da20 t mg_pll_get_hw_state +ffffffff81a2dc60 t bxt_compute_dpll +ffffffff81a2df80 t bxt_get_dpll +ffffffff81a2e1e0 t intel_put_dpll +ffffffff81a2e240 t bxt_update_dpll_ref_clks +ffffffff81a2e280 t bxt_dump_hw_state +ffffffff81a2e330 t bxt_ddi_pll_enable +ffffffff81a2ee30 t bxt_ddi_pll_disable +ffffffff81a2f040 t bxt_ddi_pll_get_hw_state +ffffffff81a2f4d0 t bxt_ddi_pll_get_freq +ffffffff81a2f560 t bxt_ddi_set_dpll_hw_state +ffffffff81a2f720 t skl_compute_dpll +ffffffff81a2fea0 t skl_get_dpll +ffffffff81a300d0 t skl_update_dpll_ref_clks +ffffffff81a30100 t skl_dump_hw_state +ffffffff81a30160 t skl_ddi_dpll0_enable +ffffffff81a30220 t skl_ddi_dpll0_disable +ffffffff81a30250 t skl_ddi_dpll0_get_hw_state +ffffffff81a30350 t skl_ddi_pll_get_freq +ffffffff81a303e0 t skl_ddi_wrpll_get_freq +ffffffff81a30540 t skl_ddi_pll_enable +ffffffff81a30750 t skl_ddi_pll_disable +ffffffff81a307e0 t skl_ddi_pll_get_hw_state +ffffffff81a30900 t hsw_compute_dpll +ffffffff81a31150 t hsw_get_dpll +ffffffff81a31410 t hsw_update_dpll_ref_clks +ffffffff81a31480 t hsw_dump_hw_state +ffffffff81a314b0 t hsw_ddi_wrpll_enable +ffffffff81a31530 t hsw_ddi_wrpll_disable +ffffffff81a31610 t hsw_ddi_wrpll_get_hw_state +ffffffff81a316b0 t hsw_ddi_wrpll_get_freq +ffffffff81a317a0 t hsw_ddi_spll_enable +ffffffff81a31800 t hsw_ddi_spll_disable +ffffffff81a318d0 t hsw_ddi_spll_get_hw_state +ffffffff81a31950 t hsw_ddi_spll_get_freq +ffffffff81a319e0 t hsw_ddi_lcpll_enable +ffffffff81a31a10 t hsw_ddi_lcpll_disable +ffffffff81a31a40 t hsw_ddi_lcpll_get_hw_state +ffffffff81a31a70 t hsw_ddi_lcpll_get_freq +ffffffff81a31af0 t ibx_compute_dpll +ffffffff81a31b20 t ibx_get_dpll +ffffffff81a31da0 t ibx_dump_hw_state +ffffffff81a31e00 t ibx_pch_dpll_enable +ffffffff81a31fb0 t ibx_pch_dpll_disable +ffffffff81a32030 t ibx_pch_dpll_get_hw_state +ffffffff81a33000 T intel_dpt_pin +ffffffff81a331d0 T intel_dpt_unpin +ffffffff81a33240 T intel_dpt_resume +ffffffff81a33310 T intel_dpt_suspend +ffffffff81a333e0 T intel_dpt_create +ffffffff81a33710 t dpt_insert_page +ffffffff81a33780 t dpt_clear_range +ffffffff81a337b0 t dpt_insert_entries +ffffffff81a338b0 t dpt_cleanup +ffffffff81a33900 t dpt_bind_vma +ffffffff81a33990 t dpt_unbind_vma +ffffffff81a339c0 T intel_dpt_destroy +ffffffff81a33a00 t __ww_mutex_lock +ffffffff81a34000 T intel_drrs_type_str +ffffffff81a34040 T intel_drrs_is_active +ffffffff81a34070 T intel_drrs_activate +ffffffff81a34270 T intel_drrs_deactivate +ffffffff81a34350 t intel_drrs_set_state +ffffffff81a344a0 T intel_drrs_invalidate +ffffffff81a344b0 t intel_drrs_frontbuffer_update +ffffffff81a34610 T intel_drrs_flush +ffffffff81a34620 T intel_crtc_drrs_init +ffffffff81a346c0 t intel_drrs_downclock_work +ffffffff81a34710 t __delayed_work_tick +ffffffff81a35000 T intel_dsb_indexed_reg_write +ffffffff81a35130 T intel_dsb_reg_write +ffffffff81a35210 T intel_dsb_commit +ffffffff81a35650 T intel_dsb_prepare +ffffffff81a357e0 T intel_dsb_cleanup +ffffffff81a36000 T intel_dsi_bitrate +ffffffff81a36090 T intel_dsi_tlpx_ns +ffffffff81a360e0 T intel_dsi_get_modes +ffffffff81a360f0 T intel_dsi_mode_valid +ffffffff81a361b0 T intel_dsi_host_init +ffffffff81a36260 T intel_dsi_get_panel_orientation +ffffffff81a37000 T intel_dsi_dcs_init_backlight_funcs +ffffffff81a37090 t dcs_setup_backlight +ffffffff81a370e0 t dcs_get_backlight +ffffffff81a371d0 t dcs_set_backlight +ffffffff81a372b0 t dcs_disable_backlight +ffffffff81a37620 t dcs_enable_backlight +ffffffff81a38000 T intel_dsi_vbt_exec_sequence +ffffffff81a38020 T intel_dsi_msleep +ffffffff81a38090 T intel_dsi_log_params +ffffffff81a38410 T intel_dsi_vbt_init +ffffffff81a388a0 T intel_dsi_vbt_gpio_init +ffffffff81a388c0 T intel_dsi_vbt_gpio_cleanup +ffffffff81a39000 T intel_dvo_init +ffffffff81a394f0 t intel_disable_dvo +ffffffff81a395a0 t intel_enable_dvo +ffffffff81a39680 t intel_dvo_get_hw_state +ffffffff81a396e0 t intel_dvo_get_config +ffffffff81a39780 t intel_dvo_compute_config +ffffffff81a39800 t intel_dvo_pre_enable +ffffffff81a398f0 t intel_dvo_connector_get_hw_state +ffffffff81a39970 t intel_dvo_enc_destroy +ffffffff81a399b0 t intel_dvo_detect +ffffffff81a39ab0 t intel_dvo_get_modes +ffffffff81a39b10 t intel_dvo_mode_valid +ffffffff81a3a000 T intel_fb_get_format_info +ffffffff81a3a230 T intel_fb_is_ccs_modifier +ffffffff81a3a400 T intel_fb_is_rc_ccs_cc_modifier +ffffffff81a3a5d0 T intel_fb_is_mc_ccs_modifier +ffffffff81a3a7a0 T intel_fb_plane_get_modifiers +ffffffff81a3a8e0 T intel_fb_plane_supports_modifier +ffffffff81a3a940 T intel_format_info_is_yuv_semiplanar +ffffffff81a3abe0 T intel_fb_is_ccs_aux_plane +ffffffff81a3ae20 T intel_fb_rc_ccs_cc_plane +ffffffff81a3b080 T is_surface_linear +ffffffff81a3b3b0 T main_to_ccs_plane +ffffffff81a3b690 T skl_ccs_to_main_plane +ffffffff81a3b970 T skl_main_to_aux_plane +ffffffff81a3bbd0 T intel_tile_size +ffffffff81a3bc10 T intel_tile_width_bytes +ffffffff81a3be60 T intel_tile_height +ffffffff81a3bec0 T intel_tile_row_size +ffffffff81a3bf40 T intel_fb_align_height +ffffffff81a3bfb0 T intel_fb_uses_dpt +ffffffff81a3c000 T intel_cursor_alignment +ffffffff81a3c060 T intel_surf_alignment +ffffffff81a3c270 T intel_fb_plane_get_subsampling +ffffffff81a3c640 T intel_plane_adjust_aligned_offset +ffffffff81a3c6b0 t intel_adjust_aligned_offset +ffffffff81a3c860 T intel_plane_compute_aligned_offset +ffffffff81a3c960 t intel_compute_aligned_offset +ffffffff81a3cb20 T intel_fb_needs_pot_stride_remap +ffffffff81a3cb60 T intel_fb_supports_90_270_rotation +ffffffff81a3cbb0 T intel_fill_fb_info +ffffffff81a3d7f0 t calc_plane_remap_info +ffffffff81a3e250 T intel_fb_fill_view +ffffffff81a3e2a0 T intel_plane_compute_gtt +ffffffff81a3eb70 t intel_plane_check_stride +ffffffff81a3eee0 T intel_framebuffer_init +ffffffff81a402f0 T intel_user_framebuffer_create +ffffffff81a40430 T intel_framebuffer_create +ffffffff81a404c0 t intel_adjust_tile_offset +ffffffff81a40600 t intel_user_framebuffer_destroy +ffffffff81a40660 t intel_user_framebuffer_create_handle +ffffffff81a40680 t intel_user_framebuffer_dirty +ffffffff81a41000 T intel_pin_and_fence_fb_obj +ffffffff81a41310 t i915_gem_object_lock +ffffffff81a41520 T intel_unpin_fb_vma +ffffffff81a41590 T intel_plane_pin_fb +ffffffff81a418c0 T intel_plane_unpin_fb +ffffffff81a42000 T intel_fbc_cleanup +ffffffff81a421c0 T intel_fbc_pre_update +ffffffff81a42810 T intel_fbc_post_update +ffffffff81a42a60 T intel_fbc_invalidate +ffffffff81a42c80 T intel_fbc_flush +ffffffff81a42f00 T intel_fbc_atomic_check +ffffffff81a43470 T intel_fbc_disable +ffffffff81a43530 t __intel_fbc_disable +ffffffff81a436c0 T intel_fbc_update +ffffffff81a43d80 T intel_fbc_reset_underrun +ffffffff81a43ee0 T intel_fbc_handle_fifo_underrun_irq +ffffffff81a43f90 T intel_fbc_add_plane +ffffffff81a43fc0 T intel_fbc_init +ffffffff81a44240 T intel_fbc_sanitize +ffffffff81a44310 T intel_fbc_crtc_debugfs_add +ffffffff81a44340 T intel_fbc_debugfs_register +ffffffff81a44370 t intel_fbc_is_ok +ffffffff81a44490 t intel_fbc_update_state +ffffffff81a44800 t intel_fbc_underrun_work_fn +ffffffff81a44920 t ivb_fbc_activate +ffffffff81a44b80 t ilk_fbc_deactivate +ffffffff81a44c30 t ilk_fbc_is_active +ffffffff81a44c90 t ivb_fbc_is_compressing +ffffffff81a44cf0 t snb_fbc_nuke +ffffffff81a44d60 t ilk_fbc_program_cfb +ffffffff81a44da0 t ivb_fbc_set_false_color +ffffffff81a44e60 t snb_fbc_activate +ffffffff81a44ee0 t ilk_fbc_is_compressing +ffffffff81a44f40 t ilk_fbc_activate +ffffffff81a45070 t i965_fbc_nuke +ffffffff81a45110 t g4x_fbc_activate +ffffffff81a45220 t g4x_fbc_deactivate +ffffffff81a452b0 t g4x_fbc_is_active +ffffffff81a45300 t g4x_fbc_is_compressing +ffffffff81a45360 t g4x_fbc_program_cfb +ffffffff81a45390 t i8xx_fbc_activate +ffffffff81a45500 t i8xx_fbc_deactivate +ffffffff81a455d0 t i8xx_fbc_is_active +ffffffff81a45620 t i8xx_fbc_is_compressing +ffffffff81a45680 t i8xx_fbc_program_cfb +ffffffff81a45700 t i8xx_fbc_nuke +ffffffff81a46000 T intel_fbdev_init +ffffffff81a464d0 t intel_fbdev_suspend_worker +ffffffff81a46500 T intel_fbdev_initial_config_async +ffffffff81a46570 T intel_fbdev_unregister +ffffffff81a465b0 T intel_fbdev_set_suspend +ffffffff81a465e0 T intel_fbdev_fini +ffffffff81a46670 T intel_fbdev_output_poll_changed +ffffffff81a46710 T intel_fbdev_restore_mode +ffffffff81a46790 T intel_fbdev_framebuffer +ffffffff81a467c0 t intelfb_create +ffffffff81a46dc0 t intel_fbdev_set_par +ffffffff81a47000 T assert_fdi_tx_enabled +ffffffff81a470e0 T assert_fdi_tx_disabled +ffffffff81a471c0 T assert_fdi_rx_enabled +ffffffff81a47270 T assert_fdi_rx_disabled +ffffffff81a47320 T assert_fdi_tx_pll_enabled +ffffffff81a473d0 T assert_fdi_rx_pll_enabled +ffffffff81a47490 T assert_fdi_rx_pll_disabled +ffffffff81a47550 T intel_fdi_link_train +ffffffff81a47570 T intel_fdi_pll_freq_update +ffffffff81a47620 T intel_fdi_link_freq +ffffffff81a47660 T ilk_fdi_compute_config +ffffffff81a47990 T intel_fdi_normal_train +ffffffff81a47b10 T hsw_fdi_link_train +ffffffff81a48010 T hsw_fdi_disable +ffffffff81a48170 T ilk_fdi_pll_enable +ffffffff81a48380 T ilk_fdi_pll_disable +ffffffff81a484b0 T ilk_fdi_disable +ffffffff81a48720 T intel_fdi_init_hook +ffffffff81a48780 t ilk_fdi_link_train +ffffffff81a48df0 t gen6_fdi_link_train +ffffffff81a49620 t ivb_manual_fdi_link_train +ffffffff81a49eb0 t cpt_set_fdi_bc_bifurcation +ffffffff81a4b000 T intel_set_cpu_fifo_underrun_reporting +ffffffff81a4b3e0 T intel_set_pch_fifo_underrun_reporting +ffffffff81a4b610 T intel_cpu_fifo_underrun_irq_handler +ffffffff81a4b800 T intel_pch_fifo_underrun_irq_handler +ffffffff81a4b880 T intel_check_cpu_fifo_underruns +ffffffff81a4baa0 T intel_check_pch_fifo_underruns +ffffffff81a4c000 T intel_frontbuffer_flip_prepare +ffffffff81a4c050 T intel_frontbuffer_flip_complete +ffffffff81a4c120 T intel_frontbuffer_flip +ffffffff81a4c1f0 T __intel_fb_invalidate +ffffffff81a4c280 T __intel_fb_flush +ffffffff81a4c370 T intel_frontbuffer_get +ffffffff81a4c4a0 t frontbuffer_active +ffffffff81a4c4d0 t frontbuffer_retire +ffffffff81a4c510 T intel_frontbuffer_put +ffffffff81a4c690 T intel_frontbuffer_track +ffffffff81a4d000 T intel_atomic_global_obj_init +ffffffff81a4d070 T intel_atomic_global_obj_cleanup +ffffffff81a4d170 T intel_atomic_get_global_obj_state +ffffffff81a4d3e0 T intel_atomic_get_old_global_obj_state +ffffffff81a4d440 T intel_atomic_get_new_global_obj_state +ffffffff81a4d4a0 T intel_atomic_swap_global_state +ffffffff81a4d5f0 T intel_atomic_clear_global_state +ffffffff81a4d720 T intel_atomic_lock_global_state +ffffffff81a4d7a0 T intel_atomic_serialize_global_state +ffffffff81a4e000 T intel_gmbus_is_valid_pin +ffffffff81a4e100 T intel_gmbus_reset +ffffffff81a4e160 T intel_bb_set_bits +ffffffff81a4e290 T intel_bb_set_dir +ffffffff81a4e2c0 T intel_bb_read_bits +ffffffff81a4e440 T intel_acquire_bus +ffffffff81a4e630 T intel_release_bus +ffffffff81a4e7d0 T intel_send_start +ffffffff81a4e7f0 T intel_send_stop +ffffffff81a4e810 T intel_initiate_xfer +ffffffff81a4e830 T intel_read_byte +ffffffff81a4e850 T intel_write_byte +ffffffff81a4e870 T intel_gmbus_output_aksv +ffffffff81a4e940 t do_gmbus_xfer +ffffffff81a4ef40 T intel_gmbus_setup +ffffffff81a4f2d0 T intel_gmbus_teardown +ffffffff81a4f340 T intel_gmbus_get_adapter +ffffffff81a4f3c0 T intel_gmbus_force_bit +ffffffff81a4f450 T intel_gmbus_is_forced_bit +ffffffff81a4f480 t gmbus_xfer_read +ffffffff81a4f750 t gmbus_xfer_write +ffffffff81a4f9a0 t gmbus_wait +ffffffff81a4fd80 t gmbus_wait_idle +ffffffff81a4ff20 t gmbus_xfer +ffffffff81a4fff0 t gmbus_func +ffffffff81a50030 t gmbus_lock_bus +ffffffff81a50050 t gmbus_trylock_bus +ffffffff81a500a0 t gmbus_unlock_bus +ffffffff81a51000 T intel_hdcp_capable +ffffffff81a510a0 t intel_hdcp_read_valid_bksv +ffffffff81a51320 T intel_hdcp2_capable +ffffffff81a51400 T is_hdcp_supported +ffffffff81a51450 T intel_hdcp_component_init +ffffffff81a51480 T intel_hdcp_init +ffffffff81a515b0 t intel_hdcp_check_work +ffffffff81a554b0 t intel_hdcp_prop_work +ffffffff81a55530 T intel_hdcp_enable +ffffffff81a55580 T intel_hdcp_disable +ffffffff81a556b0 t intel_hdcp_update_value +ffffffff81a55870 t _intel_hdcp2_disable +ffffffff81a55c70 t _intel_hdcp_disable +ffffffff81a55f70 T intel_hdcp_update_pipe +ffffffff81a560e0 T intel_hdcp_component_fini +ffffffff81a56120 T intel_hdcp_cleanup +ffffffff81a56260 T intel_hdcp_atomic_check +ffffffff81a562f0 T intel_hdcp_handle_cp_irq +ffffffff81a563f0 t __delayed_work_tick +ffffffff81a56410 t hdcp2_authenticate_repeater_topology +ffffffff81a566f0 t intel_hdcp_get_repeater_ctl +ffffffff81a57000 T hsw_write_infoframe +ffffffff81a57410 t hsw_dip_data_reg +ffffffff81a575d0 T hsw_read_infoframe +ffffffff81a57680 T intel_hdmi_infoframe_enable +ffffffff81a57720 T intel_hdmi_infoframes_enabled +ffffffff81a57830 T intel_read_infoframe +ffffffff81a579c0 T intel_hdmi_read_gcp_infoframe +ffffffff81a57ab0 T intel_dp_dual_mode_set_tmds_output +ffffffff81a57b80 T intel_hdmi_tmds_clock +ffffffff81a57bd0 T intel_hdmi_bpc_possible +ffffffff81a57d00 T intel_hdmi_limited_color_range +ffffffff81a57d70 T intel_hdmi_compute_config +ffffffff81a584c0 t intel_hdmi_compute_output_format +ffffffff81a585f0 T intel_hdmi_encoder_shutdown +ffffffff81a586c0 T intel_hdmi_handle_sink_scrambling +ffffffff81a587e0 T intel_infoframe_init +ffffffff81a58960 t vlv_write_infoframe +ffffffff81a58cc0 t vlv_read_infoframe +ffffffff81a58e90 t vlv_set_infoframes +ffffffff81a59230 t vlv_infoframes_enabled +ffffffff81a592d0 t g4x_write_infoframe +ffffffff81a59580 t g4x_read_infoframe +ffffffff81a596d0 t g4x_set_infoframes +ffffffff81a59970 t g4x_infoframes_enabled +ffffffff81a599e0 t hsw_set_infoframes +ffffffff81a59c80 t hsw_infoframes_enabled +ffffffff81a59d10 t ibx_write_infoframe +ffffffff81a5a020 t ibx_read_infoframe +ffffffff81a5a190 t ibx_set_infoframes +ffffffff81a5a500 t ibx_infoframes_enabled +ffffffff81a5a580 t cpt_write_infoframe +ffffffff81a5a880 t cpt_read_infoframe +ffffffff81a5a9f0 t cpt_set_infoframes +ffffffff81a5acf0 t cpt_infoframes_enabled +ffffffff81a5ad60 T intel_hdmi_init_connector +ffffffff81a5b3f0 T intel_hdmi_dsc_get_slice_height +ffffffff81a5b440 T intel_hdmi_dsc_get_num_slices +ffffffff81a5b5c0 T intel_hdmi_dsc_get_bpp +ffffffff81a5b6b0 t intel_hdmi_compute_clock +ffffffff81a5b970 t hdmi_port_clock_valid +ffffffff81a5bba0 t intel_write_infoframe +ffffffff81a5bd70 t intel_hdmi_detect +ffffffff81a5bf20 t intel_hdmi_force +ffffffff81a5c000 t intel_hdmi_connector_register +ffffffff81a5c010 t intel_hdmi_connector_unregister +ffffffff81a5c020 t intel_hdmi_set_edid +ffffffff81a5c2c0 t intel_hdmi_get_modes +ffffffff81a5c300 t intel_hdmi_mode_valid +ffffffff81a5c4a0 t intel_hdmi_mode_clock_valid +ffffffff81a5c630 t intel_hdmi_hdcp_write_an_aksv +ffffffff81a5c780 t intel_hdmi_hdcp_read_bksv +ffffffff81a5c850 t intel_hdmi_hdcp_read_bstatus +ffffffff81a5c920 t intel_hdmi_hdcp_repeater_present +ffffffff81a5ca00 t intel_hdmi_hdcp_read_ri_prime +ffffffff81a5cad0 t intel_hdmi_hdcp_read_ksv_ready +ffffffff81a5cbb0 t intel_hdmi_hdcp_read_ksv_fifo +ffffffff81a5cc80 t intel_hdmi_hdcp_read_v_prime_part +ffffffff81a5cd70 t intel_hdmi_hdcp_toggle_signalling +ffffffff81a5cff0 t intel_hdmi_hdcp_check_link +ffffffff81a5d340 t intel_hdmi_hdcp2_capable +ffffffff81a5d3f0 t intel_hdmi_hdcp2_write_msg +ffffffff81a5d4d0 t intel_hdmi_hdcp2_read_msg +ffffffff81a5d960 t intel_hdmi_hdcp2_check_link +ffffffff81a5e000 T intel_hpd_pin_default +ffffffff81a5e030 T intel_encoder_hotplug +ffffffff81a5e160 T intel_hpd_trigger_irq +ffffffff81a5e1d0 T intel_hpd_irq_handler +ffffffff81a5e5b0 T intel_hpd_init +ffffffff81a5e6c0 T intel_hpd_poll_enable +ffffffff81a5e740 T intel_hpd_poll_disable +ffffffff81a5e790 T intel_hpd_init_work +ffffffff81a5e860 t i915_hotplug_work_func +ffffffff81a5eba0 t i915_digport_work_func +ffffffff81a5ed30 t i915_hpd_poll_init_work +ffffffff81a5ee30 t intel_hpd_irq_storm_reenable_work +ffffffff81a5f170 T intel_hpd_cancel_work +ffffffff81a5f290 T intel_hpd_disable +ffffffff81a5f310 T intel_hpd_enable +ffffffff81a5f380 t __delayed_work_tick +ffffffff81a60000 T intel_lpe_audio_irq_handler +ffffffff81a60020 T intel_lpe_audio_init +ffffffff81a60050 T intel_lpe_audio_teardown +ffffffff81a60070 T intel_lpe_audio_notify +ffffffff81a61000 T lspcon_detect_hdr_capability +ffffffff81a610a0 T lspcon_write_infoframe +ffffffff81a61820 T lspcon_read_infoframe +ffffffff81a61860 T lspcon_set_infoframes +ffffffff81a61ad0 T lspcon_infoframes_enabled +ffffffff81a61cc0 T lspcon_wait_pcon_mode +ffffffff81a61cd0 t lspcon_wait_mode +ffffffff81a61f90 T lspcon_init +ffffffff81a623a0 T intel_lspcon_infoframes_enabled +ffffffff81a623e0 T lspcon_resume +ffffffff81a62690 t lspcon_change_mode +ffffffff81a63000 T intel_lvds_port_enabled +ffffffff81a63080 T intel_get_lvds_encoder +ffffffff81a630e0 T intel_is_dual_link_lvds +ffffffff81a63150 T intel_lvds_init +ffffffff81a638c0 t intel_enable_lvds +ffffffff81a63a00 t intel_pre_enable_lvds +ffffffff81a63cd0 t intel_lvds_compute_config +ffffffff81a63e30 t pch_disable_lvds +ffffffff81a63e50 t pch_post_disable_lvds +ffffffff81a63e70 t gmch_disable_lvds +ffffffff81a63ea0 t intel_lvds_get_hw_state +ffffffff81a63f60 t intel_lvds_get_config +ffffffff81a64060 t intel_lvds_shutdown +ffffffff81a64100 t intel_no_lvds_dmi_callback +ffffffff81a64150 t intel_disable_lvds +ffffffff81a64280 t intel_lvds_get_modes +ffffffff81a642b0 t intel_lvds_mode_valid +ffffffff81a64330 t intel_dual_link_lvds_callback +ffffffff81a65000 T intel_modeset_setup_hw_state +ffffffff81a67000 T intel_modeset_verify_crtc +ffffffff81a673b0 t verify_connector_state +ffffffff81a67660 T intel_modeset_verify_disabled +ffffffff81a68000 T intel_opregion_notify_encoder +ffffffff81a68160 t swsci +ffffffff81a68490 T intel_opregion_notify_adapter +ffffffff81a684e0 T intel_opregion_asle_intr +ffffffff81a68530 T intel_opregion_setup +ffffffff81a68d40 t asle_work +ffffffff81a691c0 T intel_opregion_get_panel_type +ffffffff81a692a0 T intel_opregion_get_edid +ffffffff81a69380 T intel_opregion_headless_sku +ffffffff81a693d0 T intel_opregion_register +ffffffff81a69460 T intel_opregion_resume +ffffffff81a694f0 T intel_opregion_suspend +ffffffff81a69590 T intel_opregion_unregister +ffffffff81a69710 t intel_no_opregion_vbt_callback +ffffffff81a69760 t intel_use_opregion_panel_type_callback +ffffffff81a6a000 T intel_overlay_reset +ffffffff81a6a050 T intel_overlay_switch_off +ffffffff81a6a240 t intel_overlay_release_old_vid +ffffffff81a6a3e0 T intel_overlay_put_image_ioctl +ffffffff81a6b5a0 T intel_overlay_attrs_ioctl +ffffffff81a6ba40 T intel_overlay_setup +ffffffff81a6bc90 t intel_overlay_last_flip_retire +ffffffff81a6bcd0 T intel_overlay_cleanup +ffffffff81a6bd90 T intel_overlay_capture_error_state +ffffffff81a6be70 T intel_overlay_print_error_state +ffffffff81a6c240 t intel_overlay_release_old_vid_tail +ffffffff81a6c310 t intel_overlay_off_tail +ffffffff81a6c4b0 t intel_overlay_flip_prepare +ffffffff81a6d000 T intel_panel_use_ssc +ffffffff81a6d060 T intel_panel_preferred_fixed_mode +ffffffff81a6d0a0 T intel_panel_fixed_mode +ffffffff81a6d160 T intel_panel_downclock_mode +ffffffff81a6d240 T intel_panel_highest_mode +ffffffff81a6d2a0 T intel_panel_get_modes +ffffffff81a6d330 T intel_panel_drrs_type +ffffffff81a6d380 T intel_panel_compute_config +ffffffff81a6d500 T intel_panel_add_edid_fixed_modes +ffffffff81a6da30 T intel_panel_add_vbt_lfp_fixed_mode +ffffffff81a6da90 t intel_panel_add_fixed_mode +ffffffff81a6dc10 T intel_panel_add_vbt_sdvo_fixed_mode +ffffffff81a6dc70 T intel_panel_add_encoder_fixed_mode +ffffffff81a6dcb0 T intel_panel_fitting +ffffffff81a6e300 T intel_panel_detect +ffffffff81a6e390 T intel_panel_mode_valid +ffffffff81a6e4a0 T intel_panel_init +ffffffff81a6e560 T intel_panel_fini +ffffffff81a6f000 T intel_has_pch_trancoder +ffffffff81a6f050 T intel_crtc_pch_transcoder +ffffffff81a6f090 T intel_pch_transcoder_get_m1_n1 +ffffffff81a6f0d0 T intel_pch_transcoder_get_m2_n2 +ffffffff81a6f110 T ilk_pch_pre_enable +ffffffff81a6f130 T ilk_pch_enable +ffffffff81a6f6d0 t ilk_pch_transcoder_set_timings +ffffffff81a6f950 T ilk_pch_disable +ffffffff81a6f960 T ilk_pch_post_disable +ffffffff81a6fc90 T ilk_pch_get_config +ffffffff81a6fe50 T lpt_pch_enable +ffffffff81a70080 T lpt_pch_disable +ffffffff81a70190 T lpt_pch_get_config +ffffffff81a70260 T intel_pch_sanitize +ffffffff81a70530 t assert_pch_dp_disabled +ffffffff81a70620 t assert_pch_hdmi_disabled +ffffffff81a71000 T lpt_disable_iclkip +ffffffff81a71070 T lpt_iclkip +ffffffff81a710f0 T lpt_program_iclkip +ffffffff81a71370 T lpt_get_iclkip +ffffffff81a71480 T lpt_disable_clkout_dp +ffffffff81a71550 T intel_init_pch_refclk +ffffffff81a73000 T intel_crtc_initial_plane_config +ffffffff81a74000 T intel_pps_lock +ffffffff81a74060 T intel_pps_unlock +ffffffff81a740b0 T intel_pps_reset_all +ffffffff81a74200 T intel_pps_check_power_unlocked +ffffffff81a743c0 T intel_pps_wait_power_cycle +ffffffff81a74580 T intel_pps_vdd_on_unlocked +ffffffff81a74ab0 T intel_pps_vdd_on +ffffffff81a74ba0 T intel_pps_vdd_off_sync +ffffffff81a74c70 t intel_pps_vdd_off_sync_unlocked +ffffffff81a74f50 T intel_pps_vdd_off_unlocked +ffffffff81a75060 T intel_pps_on_unlocked +ffffffff81a75460 T intel_pps_on +ffffffff81a75500 T intel_pps_off_unlocked +ffffffff81a75750 T intel_pps_off +ffffffff81a757f0 T intel_pps_backlight_on +ffffffff81a75a00 T intel_pps_backlight_off +ffffffff81a75c10 T intel_pps_backlight_power +ffffffff81a75de0 T vlv_pps_init +ffffffff81a75f40 t vlv_detach_power_sequencer +ffffffff81a760c0 t vlv_steal_power_sequencer +ffffffff81a761f0 t pps_init_delays +ffffffff81a76660 t pps_init_registers +ffffffff81a76a00 T intel_pps_have_panel_power_or_vdd +ffffffff81a76b50 T intel_pps_encoder_reset +ffffffff81a76ce0 t vlv_initial_power_sequencer_setup +ffffffff81a76f90 t pps_vdd_init +ffffffff81a770a0 T intel_pps_init +ffffffff81a77210 t edp_panel_vdd_work +ffffffff81a772c0 T intel_pps_init_late +ffffffff81a77430 T intel_pps_unlock_regs_wa +ffffffff81a77520 T intel_pps_setup +ffffffff81a77590 T assert_pps_unlocked +ffffffff81a777d0 t intel_pps_get_registers +ffffffff81a77eb0 t wait_panel_status +ffffffff81a78180 t intel_pps_readout_hw_state +ffffffff81a78340 t __delayed_work_tick +ffffffff81a79000 T intel_psr_irq_handler +ffffffff81a79680 T intel_psr_init_dpcd +ffffffff81a79910 T intel_psr_compute_config +ffffffff81a7a100 T intel_psr_get_config +ffffffff81a7a2b0 T intel_psr_disable +ffffffff81a7a3c0 t intel_psr_disable_locked +ffffffff81a7a830 T intel_psr_pause +ffffffff81a7aa20 t intel_psr_exit +ffffffff81a7ad00 T intel_psr_resume +ffffffff81a7ad90 t intel_psr_activate +ffffffff81a7b4a0 T intel_psr2_disable_plane_sel_fetch +ffffffff81a7b510 T intel_psr2_program_plane_sel_fetch +ffffffff81a7b6c0 T intel_psr2_program_trans_man_trk_ctl +ffffffff81a7b800 T intel_psr2_sel_fetch_update +ffffffff81a7be90 T intel_psr_pre_plane_update +ffffffff81a7c060 T intel_psr_post_plane_update +ffffffff81a7cae0 T intel_psr_wait_for_idle_locked +ffffffff81a7ccc0 T intel_psr_debug_set +ffffffff81a7cef0 t psr_irq_control +ffffffff81a7d040 T intel_psr_invalidate +ffffffff81a7d2f0 T intel_psr_flush +ffffffff81a7d7c0 T intel_psr_init +ffffffff81a7d8f0 t intel_psr_work +ffffffff81a7da90 t tgl_dc3co_disable_work +ffffffff81a7dae0 T intel_psr_short_pulse +ffffffff81a7dea0 T intel_psr_enabled +ffffffff81a7df20 T intel_psr_lock +ffffffff81a7e000 T intel_psr_unlock +ffffffff81a7e0e0 t tgl_psr2_disable_dc3co +ffffffff81a7e210 t __delayed_work_tick +ffffffff81a7f000 T intel_lookup_range_min_qp +ffffffff81a7f0b0 T intel_lookup_range_max_qp +ffffffff81a80000 T intel_init_quirks +ffffffff81a800f0 T intel_has_quirk +ffffffff81a80120 t quirk_ssc_force_disable +ffffffff81a80150 t quirk_invert_brightness +ffffffff81a80180 t quirk_backlight_present +ffffffff81a801b0 t quirk_increase_t12_delay +ffffffff81a801e0 t quirk_increase_ddi_disabled_time +ffffffff81a80210 t intel_dmi_reverse_brightness +ffffffff81a80260 t intel_dmi_no_pps_backlight +ffffffff81a81000 T intel_sdvo_port_enabled +ffffffff81a810a0 T intel_sdvo_init +ffffffff81a81c70 t intel_sdvo_compute_config +ffffffff81a821d0 t pch_disable_sdvo +ffffffff81a82200 t pch_post_disable_sdvo +ffffffff81a82210 t intel_disable_sdvo +ffffffff81a82380 t intel_sdvo_pre_enable +ffffffff81a82d00 t intel_enable_sdvo +ffffffff81a82f00 t intel_sdvo_get_hw_state +ffffffff81a82ff0 t intel_sdvo_get_config +ffffffff81a83560 t intel_sdvo_ddc_proxy_xfer +ffffffff81a83600 t intel_sdvo_ddc_proxy_func +ffffffff81a83630 t __intel_sdvo_write_cmd +ffffffff81a83af0 t proxy_lock_bus +ffffffff81a83b20 t proxy_trylock_bus +ffffffff81a83b50 t proxy_unlock_bus +ffffffff81a83b80 t intel_sdvo_enc_destroy +ffffffff81a83b90 t intel_sdvo_get_preferred_input_mode +ffffffff81a83f20 t intel_sdvo_get_dtd_from_mode +ffffffff81a84090 t intel_sdvo_read_response +ffffffff81a84530 t intel_sdvo_write_sdvox +ffffffff81a84720 t intel_sdvo_write_infoframe +ffffffff81a848f0 t intel_sdvo_dvi_init +ffffffff81a84b80 t intel_sdvo_tv_init +ffffffff81a84ea0 t intel_sdvo_lvds_init +ffffffff81a85090 t intel_sdvo_hotplug +ffffffff81a850d0 t intel_sdvo_connector_get_hw_state +ffffffff81a85160 t intel_sdvo_detect +ffffffff81a854d0 t intel_sdvo_connector_register +ffffffff81a854e0 t intel_sdvo_connector_unregister +ffffffff81a854f0 t intel_sdvo_connector_duplicate_state +ffffffff81a85570 t intel_sdvo_connector_atomic_set_property +ffffffff81a85740 t intel_sdvo_connector_atomic_get_property +ffffffff81a85960 t intel_sdvo_get_modes +ffffffff81a85c20 t intel_sdvo_mode_valid +ffffffff81a85cf0 t intel_sdvo_atomic_check +ffffffff81a85da0 t intel_sdvo_create_enhance_property +ffffffff81a87000 T intel_snps_phy_wait_for_calibration +ffffffff81a870d0 T intel_snps_phy_update_psr_power_state +ffffffff81a871a0 T intel_snps_phy_set_signal_levels +ffffffff81a873e0 T intel_mpllb_calc_state +ffffffff81a87590 T intel_snps_phy_check_hdmi_link_rate +ffffffff81a87610 T intel_mpllb_enable +ffffffff81a87870 T intel_mpllb_disable +ffffffff81a87a00 T intel_mpllb_calc_port_clock +ffffffff81a87ac0 T intel_mpllb_readout_hw_state +ffffffff81a87c20 T intel_mpllb_state_verify +ffffffff81a89000 T intel_plane_check_src_coordinates +ffffffff81a891c0 T vlv_plane_min_cdclk +ffffffff81a892a0 T ivb_plane_min_cdclk +ffffffff81a89360 T hsw_plane_min_cdclk +ffffffff81a893f0 T chv_plane_check_rotation +ffffffff81a89460 T intel_sprite_set_colorkey_ioctl +ffffffff81a89730 T intel_sprite_plane_create +ffffffff81a89a80 t vlv_sprite_update_noarm +ffffffff81a89b70 t vlv_sprite_update_arm +ffffffff81a8a230 t vlv_sprite_disable_arm +ffffffff81a8a2c0 t vlv_sprite_get_hw_state +ffffffff81a8a380 t vlv_sprite_check +ffffffff81a8a610 t ivb_sprite_update_noarm +ffffffff81a8a770 t ivb_sprite_update_arm +ffffffff81a8ab50 t ivb_sprite_disable_arm +ffffffff81a8ac00 t ivb_sprite_get_hw_state +ffffffff81a8acb0 t g4x_sprite_check +ffffffff81a8b270 t hsw_sprite_max_stride +ffffffff81a8b2c0 t g4x_sprite_max_stride +ffffffff81a8b330 t ivb_sprite_min_cdclk +ffffffff81a8b460 t g4x_sprite_update_noarm +ffffffff81a8b5d0 t g4x_sprite_update_arm +ffffffff81a8ba10 t g4x_sprite_disable_arm +ffffffff81a8bac0 t g4x_sprite_get_hw_state +ffffffff81a8bb70 t g4x_sprite_min_cdclk +ffffffff81a8bc30 t vlv_sprite_format_mod_supported +ffffffff81a8bd60 t snb_sprite_format_mod_supported +ffffffff81a8be40 t g4x_sprite_format_mod_supported +ffffffff81a8c000 T intel_tc_port_in_tbt_alt_mode +ffffffff81a8c070 T intel_tc_port_in_dp_alt_mode +ffffffff81a8c0e0 T intel_tc_port_in_legacy_mode +ffffffff81a8c150 T intel_tc_cold_requires_aux_pw +ffffffff81a8c1a0 T intel_tc_port_get_lane_mask +ffffffff81a8c300 T intel_tc_port_get_pin_assignment_mask +ffffffff81a8c460 T intel_tc_port_fia_max_lane_count +ffffffff81a8c590 T intel_tc_port_set_fia_lane_count +ffffffff81a8c7a0 T intel_tc_port_sanitize +ffffffff81a8cdf0 T intel_tc_port_connected +ffffffff81a8cee0 T intel_tc_port_lock +ffffffff81a8cf00 t tc_port_live_status_mask +ffffffff81a8d1d0 T intel_tc_port_unlock +ffffffff81a8d250 t __intel_tc_port_lock +ffffffff81a8d450 T intel_tc_port_flush_work +ffffffff81a8d470 T intel_tc_port_ref_held +ffffffff81a8d4c0 T intel_tc_port_get_link +ffffffff81a8d540 T intel_tc_port_put_link +ffffffff81a8d5d0 T intel_tc_port_init +ffffffff81a8d860 t intel_tc_port_disconnect_phy_work +ffffffff81a8d8b0 t tc_phy_status_complete +ffffffff81a8d9c0 t tc_phy_take_ownership +ffffffff81a8db60 t intel_tc_port_update_mode +ffffffff81a8e080 t __delayed_work_tick +ffffffff81a8f000 T intel_tv_init +ffffffff81a8f420 t intel_tv_compute_config +ffffffff81a8f8c0 t intel_tv_get_config +ffffffff81a8fe60 t intel_tv_pre_enable +ffffffff81a90790 t intel_enable_tv +ffffffff81a907f0 t intel_disable_tv +ffffffff81a90850 t intel_tv_get_hw_state +ffffffff81a908b0 t intel_tv_connector_duplicate_state +ffffffff81a90930 t intel_tv_mode_to_mode +ffffffff81a90a80 t intel_tv_get_modes +ffffffff81a90de0 t intel_tv_detect +ffffffff81a91240 t intel_tv_mode_valid +ffffffff81a912d0 t intel_tv_atomic_check +ffffffff81a92000 T intel_dsc_source_support +ffffffff81a92050 T intel_dsc_compute_params +ffffffff81a92510 T intel_dsc_power_domain +ffffffff81a925c0 T intel_dsc_dsi_pps_write +ffffffff81a92860 T intel_dsc_dp_pps_write +ffffffff81a92940 T intel_uncompressed_joiner_enable +ffffffff81a92a50 T intel_dsc_enable +ffffffff81a94320 T intel_dsc_disable +ffffffff81a944a0 T intel_dsc_get_config +ffffffff81a95000 T intel_vga_disable +ffffffff81a95120 T intel_vga_redisable_power_on +ffffffff81a951c0 T intel_vga_redisable +ffffffff81a95280 T intel_vga_reset_io_mem +ffffffff81a952d0 T intel_vga_register +ffffffff81a95300 T intel_vga_unregister +ffffffff81a96000 T intel_vrr_is_capable +ffffffff81a960a0 T intel_vrr_check_modeset +ffffffff81a96130 T intel_vrr_vmin_vblank_start +ffffffff81a96190 T intel_vrr_vmax_vblank_start +ffffffff81a961f0 T intel_vrr_compute_config +ffffffff81a96380 T intel_vrr_enable +ffffffff81a96550 T intel_vrr_send_push +ffffffff81a965d0 T intel_vrr_is_push_sent +ffffffff81a96660 T intel_vrr_disable +ffffffff81a96730 T intel_vrr_get_config +ffffffff81a97000 T skl_update_scaler_crtc +ffffffff81a970c0 t skl_update_scaler +ffffffff81a97370 T skl_update_scaler_plane +ffffffff81a97760 T skl_pfit_enable +ffffffff81a97c40 T skl_program_plane_scaler +ffffffff81a98300 T skl_detach_scalers +ffffffff81a98440 T skl_scaler_disable +ffffffff81a99000 T skl_format_to_fourcc +ffffffff81a99170 T icl_is_nv12_y_plane +ffffffff81a991e0 T icl_is_hdr_plane +ffffffff81a99220 T skl_calc_main_surface_offset +ffffffff81a99460 T skl_universal_plane_create +ffffffff81a99b50 t icl_plane_min_width +ffffffff81a99ce0 t icl_hdr_plane_max_width +ffffffff81a99d30 t icl_sdr_plane_max_width +ffffffff81a99d60 t icl_plane_max_height +ffffffff81a99d90 t icl_plane_min_cdclk +ffffffff81a99dd0 t glk_plane_max_width +ffffffff81a99e80 t skl_plane_max_height +ffffffff81a99eb0 t glk_plane_min_cdclk +ffffffff81a99f30 t skl_plane_max_width +ffffffff81a9a000 t skl_plane_min_cdclk +ffffffff81a9a060 t skl_plane_max_stride +ffffffff81a9a0f0 t icl_plane_update_noarm +ffffffff81a9aab0 t icl_plane_update_arm +ffffffff81a9ac10 t icl_plane_disable_arm +ffffffff81a9ad20 t skl_plane_update_noarm +ffffffff81a9aec0 t skl_plane_update_arm +ffffffff81a9b2c0 t skl_plane_disable_arm +ffffffff81a9b370 t skl_plane_get_hw_state +ffffffff81a9b430 t skl_plane_check +ffffffff81a9c810 t skl_plane_async_flip +ffffffff81a9c930 t skl_plane_enable_flip_done +ffffffff81a9c990 t skl_plane_disable_flip_done +ffffffff81a9c9f0 T skl_get_initial_plane_config +ffffffff81a9d090 t skl_surf_address +ffffffff81a9d1b0 t skl_check_main_ccs_coordinates +ffffffff81a9d350 t gen12_plane_format_mod_supported +ffffffff81a9d5a0 t skl_plane_format_mod_supported +ffffffff81a9e000 T intel_enabled_dbuf_slices_mask +ffffffff81a9e130 T intel_sagv_pre_plane_update +ffffffff81a9e2a0 T intel_sagv_post_plane_update +ffffffff81a9e4f0 T intel_can_enable_sagv +ffffffff81a9e560 T skl_ddb_dbuf_slice_mask +ffffffff81a9e610 T skl_write_plane_wm +ffffffff81a9e9e0 T skl_write_cursor_wm +ffffffff81a9ed30 T skl_ddb_allocation_overlaps +ffffffff81a9edc0 T skl_wm_get_hw_state +ffffffff81a9f3b0 t skl_pipe_wm_get_hw_state +ffffffff81a9f740 t skl_compute_dbuf_slices +ffffffff81a9fc70 T skl_wm_sanitize +ffffffff81a9fec0 T intel_wm_state_verify +ffffffff81aa07e0 T skl_watermark_ipc_enabled +ffffffff81aa0810 T skl_watermark_ipc_update +ffffffff81aa08c0 T skl_watermark_ipc_init +ffffffff81aa09c0 T skl_wm_init +ffffffff81aa0ff0 T intel_atomic_get_dbuf_state +ffffffff81aa1010 T intel_dbuf_init +ffffffff81aa1080 T intel_dbuf_pre_plane_update +ffffffff81aa1350 T intel_dbuf_post_plane_update +ffffffff81aa1420 T intel_mbus_dbox_update +ffffffff81aa1690 T skl_watermark_ipc_debugfs_register +ffffffff81aa16c0 t skl_sagv_disable +ffffffff81aa17e0 t skl_ddb_entry_for_slices +ffffffff81aa1920 t skl_compute_wm +ffffffff81aa4750 t skl_build_plane_wm_single +ffffffff81aa4a80 t skl_compute_wm_params +ffffffff81aa4e70 t skl_compute_plane_wm +ffffffff81aa5350 t intel_dbuf_duplicate_state +ffffffff81aa53e0 t intel_dbuf_destroy_state +ffffffff81aa6000 T pixel_format_from_register_bits +ffffffff81aa6060 T vlv_dsi_wait_for_fifo_empty +ffffffff81aa6120 T vlv_dsi_init +ffffffff81aa6980 t intel_dsi_compute_config +ffffffff81aa6ad0 t intel_dsi_pre_enable +ffffffff81aa8750 t bxt_dsi_enable +ffffffff81aa87b0 t intel_dsi_disable +ffffffff81aa8a60 t intel_dsi_post_disable +ffffffff81aa9740 t intel_dsi_get_hw_state +ffffffff81aa99f0 t intel_dsi_get_config +ffffffff81aaa1b0 t intel_dsi_shutdown +ffffffff81aaa2a0 t intel_dsi_encoder_destroy +ffffffff81aaa2c0 t intel_dsi_prepare +ffffffff81aaaf10 t dpi_send_cmd +ffffffff81aab0a0 t intel_dsi_host_attach +ffffffff81aab0d0 t intel_dsi_host_detach +ffffffff81aab100 t intel_dsi_host_transfer +ffffffff81aac000 T vlv_dsi_pll_compute +ffffffff81aac390 t vlv_dsi_pclk +ffffffff81aac540 T vlv_dsi_pll_enable +ffffffff81aac760 T vlv_dsi_pll_disable +ffffffff81aac7d0 T bxt_dsi_pll_is_enabled +ffffffff81aac8a0 T bxt_dsi_pll_disable +ffffffff81aac9a0 T vlv_dsi_get_pclk +ffffffff81aaca40 T bxt_dsi_get_pclk +ffffffff81aacb10 T vlv_dsi_reset_clocks +ffffffff81aacba0 T bxt_dsi_pll_compute +ffffffff81aacd40 T bxt_dsi_pll_enable +ffffffff81aad0d0 T bxt_dsi_reset_clocks +ffffffff81aad1f0 T assert_dsi_pll_enabled +ffffffff81aad2d0 T assert_dsi_pll_disabled +ffffffff81aae000 T i915_gem_busy_ioctl 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intel_guc_log_create +ffffffff81b3e680 T intel_guc_log_destroy +ffffffff81b3e6a0 T intel_guc_log_set_level +ffffffff81b3e7d0 T intel_guc_log_relay_created +ffffffff81b3e800 T intel_guc_log_relay_open +ffffffff81b3e8a0 T intel_guc_log_relay_start +ffffffff81b3e900 T intel_guc_log_relay_flush +ffffffff81b3e9a0 t guc_log_copy_debuglogs_for_relay +ffffffff81b3eac0 T intel_guc_log_relay_close +ffffffff81b3eb50 T intel_guc_log_handle_flush_event +ffffffff81b3eba0 T intel_guc_log_info +ffffffff81b3ec80 T intel_guc_log_dump +ffffffff81b3f000 T intel_guc_log_debugfs_register +ffffffff81b40000 T intel_guc_rc_init_early +ffffffff81b40060 T intel_guc_rc_enable +ffffffff81b40150 T intel_guc_rc_disable +ffffffff81b41000 T intel_guc_slpc_init_early +ffffffff81b41050 T intel_guc_slpc_init +ffffffff81b41130 t slpc_boost_work +ffffffff81b41180 T intel_guc_slpc_set_max_freq +ffffffff81b412a0 T intel_guc_slpc_get_max_freq +ffffffff81b413e0 T intel_guc_slpc_set_min_freq +ffffffff81b415b0 T intel_guc_slpc_get_min_freq +ffffffff81b416f0 T intel_guc_slpc_set_media_ratio_mode +ffffffff81b41800 T intel_guc_pm_intrmsk_enable +ffffffff81b41880 T intel_guc_slpc_enable +ffffffff81b41d90 T intel_guc_slpc_set_boost_freq +ffffffff81b41e30 t slpc_force_min_freq +ffffffff81b41f50 T intel_guc_slpc_dec_waiters +ffffffff81b41f90 T intel_guc_slpc_print_info +ffffffff81b421a0 T intel_guc_slpc_fini +ffffffff81b43000 T intel_guc_wait_for_pending_msg +ffffffff81b432a0 T intel_guc_wait_for_idle +ffffffff81b432f0 T intel_guc_busyness_park +ffffffff81b434f0 T intel_guc_busyness_unpark +ffffffff81b43660 T intel_guc_submission_reset_prepare +ffffffff81b43df0 t guc_flush_destroyed_contexts +ffffffff81b43f60 T intel_guc_submission_reset +ffffffff81b44080 t __guc_reset_context +ffffffff81b44370 T intel_guc_submission_cancel_requests +ffffffff81b44610 T intel_guc_submission_reset_finish +ffffffff81b446f0 T intel_guc_submission_init +ffffffff81b44860 T intel_guc_submission_fini +ffffffff81b44900 T intel_guc_submission_setup +ffffffff81b44cf0 t guc_sched_engine_disabled +ffffffff81b44d20 t guc_sched_engine_destroy +ffffffff81b44d80 t guc_bump_inflight_request_prio +ffffffff81b44e70 t guc_retire_inflight_request_prio +ffffffff81b44ee0 t guc_submission_tasklet +ffffffff81b452a0 t guc_sanitize +ffffffff81b45310 t guc_release +ffffffff81b45340 T intel_guc_submission_enable +ffffffff81b45500 T intel_guc_submission_disable +ffffffff81b45550 T intel_guc_submission_init_early +ffffffff81b456b0 t destroyed_worker_func +ffffffff81b45990 t reset_fail_worker_func +ffffffff81b45a20 t guc_timestamp_ping +ffffffff81b45c40 T intel_guc_deregister_done_process_msg +ffffffff81b45fa0 t register_context +ffffffff81b46900 T intel_guc_sched_done_process_msg +ffffffff81b46cb0 T intel_guc_context_reset_process_msg +ffffffff81b46ef0 T intel_guc_error_capture_process_msg +ffffffff81b46fa0 T intel_guc_lookup_engine +ffffffff81b46fe0 T intel_guc_engine_failure_process_msg +ffffffff81b47160 T intel_guc_find_hung_context +ffffffff81b47300 T intel_guc_dump_active_requests +ffffffff81b47490 T intel_guc_submission_print_info +ffffffff81b475d0 T intel_guc_submission_print_context_info +ffffffff81b47a00 t emit_bb_start_parent_no_preempt_mid_batch +ffffffff81b47b20 T intel_guc_virtual_engine_has_heartbeat +ffffffff81b47bb0 t guc_virtual_get_sibling +ffffffff81b47c50 t update_context_prio +ffffffff81b47e40 t try_context_registration +ffffffff81b482c0 t guc_wq_item_append +ffffffff81b48540 t guc_add_request +ffffffff81b48780 t guc_context_policy_init_v70 +ffffffff81b48900 t guc_resume +ffffffff81b489f0 t guc_request_alloc +ffffffff81b48ce0 t add_to_context +ffffffff81b48de0 t remove_from_context +ffffffff81b48eb0 t guc_engine_reset_prepare +ffffffff81b48f00 t guc_rewind_nop +ffffffff81b48f30 t guc_reset_nop +ffffffff81b48f60 t guc_set_default_submission +ffffffff81b48f90 t guc_engine_busyness +ffffffff81b492d0 t guc_context_alloc +ffffffff81b492e0 t guc_context_revoke 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i915_gpu_coredump +ffffffff81b673f0 T i915_error_state_store +ffffffff81b67450 T i915_capture_error_state +ffffffff81b67500 T i915_first_error_state +ffffffff81b67570 T i915_reset_error_state +ffffffff81b67610 T i915_disable_error_state +ffffffff81b68000 T i915_reg_read_ioctl +ffffffff81b69000 T gen3_irq_reset +ffffffff81b690d0 T gen2_irq_reset +ffffffff81b691a0 T gen3_irq_init +ffffffff81b692d0 T gen2_irq_init +ffffffff81b69410 T i915_hotplug_interrupt_update +ffffffff81b694f0 T ilk_enable_display_irq +ffffffff81b69500 t ilk_update_display_irq +ffffffff81b69640 T ilk_disable_display_irq +ffffffff81b69730 T bdw_enable_pipe_irq +ffffffff81b69740 t bdw_update_pipe_irq +ffffffff81b698a0 T bdw_disable_pipe_irq +ffffffff81b69990 T ibx_enable_display_interrupt +ffffffff81b699a0 t ibx_display_interrupt_update +ffffffff81b69ac0 T ibx_disable_display_interrupt +ffffffff81b69b80 T i915_pipestat_enable_mask +ffffffff81b69d20 T i915_enable_pipestat +ffffffff81b69ea0 T intel_irqs_enabled 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i915_mock_selftests +ffffffff81b772f0 t i915_pmu_init +ffffffff81b77320 t i915_pmu_exit +ffffffff81b78000 T i915_params_dump +ffffffff81b7b120 T i915_params_copy +ffffffff81b7bff0 T i915_params_free +ffffffff81b7d000 T i915_pci_register_driver +ffffffff81b7d030 T i915_pci_unregister_driver +ffffffff81b7e000 T i915_oa_config_release +ffffffff81b7e060 T i915_perf_get_oa_config +ffffffff81b7e0b0 T i915_oa_init_reg_state +ffffffff81b7e1c0 T i915_perf_open_ioctl +ffffffff81b7e710 T i915_perf_register +ffffffff81b7e740 T i915_perf_unregister +ffffffff81b7e7b0 T i915_perf_add_config_ioctl +ffffffff81b7e800 T i915_perf_remove_config_ioctl +ffffffff81b7e880 T i915_perf_init +ffffffff81b7ec00 t gen7_is_valid_b_counter_addr +ffffffff81b7ec50 t hsw_is_valid_mux_addr +ffffffff81b7ecd0 t hsw_enable_metric_set +ffffffff81b7edb0 t hsw_disable_metric_set +ffffffff81b7eec0 t gen7_oa_enable +ffffffff81b7f020 t gen7_oa_disable +ffffffff81b7f0e0 t gen7_oa_read +ffffffff81b7f640 t gen7_oa_hw_tail_read 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i915_request_active_engine +ffffffff81b84360 T i915_request_free_capture_list +ffffffff81b843c0 T i915_request_retire +ffffffff81b84580 T i915_request_retire_upto +ffffffff81b845f0 T __i915_request_skip +ffffffff81b84680 T i915_request_set_error_once +ffffffff81b846f0 T i915_request_mark_eio +ffffffff81b84780 T __i915_request_submit +ffffffff81b849d0 T i915_request_submit +ffffffff81b84a10 T __i915_request_unsubmit +ffffffff81b84a80 T i915_request_unsubmit +ffffffff81b84b00 T i915_request_cancel +ffffffff81b84b80 T __i915_request_create +ffffffff81b84ea0 t request_alloc_slow +ffffffff81b84ff0 T i915_request_create +ffffffff81b850e0 T i915_request_await_execution +ffffffff81b851f0 t __i915_request_await_execution +ffffffff81b85380 t i915_request_await_external +ffffffff81b854c0 T i915_request_await_dma_fence +ffffffff81b85830 T i915_request_await_deps +ffffffff81b858a0 T i915_request_await_object +ffffffff81b85950 T __i915_request_commit +ffffffff81b85bb0 T __i915_request_queue_bh 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i915_sched_node_reinit +ffffffff81b886c0 T __i915_sched_node_add_dependency +ffffffff81b887c0 T i915_sched_node_add_dependency +ffffffff81b888f0 T i915_sched_node_fini +ffffffff81b889d0 T i915_request_show_with_schedule +ffffffff81b88ab0 T i915_sched_engine_create +ffffffff81b88b60 t default_destroy +ffffffff81b88bb0 t default_disabled +ffffffff81b88be0 T i915_scheduler_module_exit +ffffffff81b88c00 T i915_scheduler_module_init +ffffffff81b89000 T i915_save_display +ffffffff81b89360 T i915_restore_display +ffffffff81b8a000 T i915_sw_fence_complete +ffffffff81b8a040 t __i915_sw_fence_complete +ffffffff81b8a1c0 T i915_sw_fence_await +ffffffff81b8a230 T __i915_sw_fence_init +ffffffff81b8a2a0 T i915_sw_fence_reinit +ffffffff81b8a2d0 T i915_sw_fence_commit +ffffffff81b8a310 T i915_sw_fence_await_sw_fence +ffffffff81b8a320 t __i915_sw_fence_await_sw_fence +ffffffff81b8a5c0 T i915_sw_fence_await_sw_fence_gfp +ffffffff81b8a5e0 T i915_sw_fence_await_dma_fence +ffffffff81b8a800 t dma_i915_sw_fence_wake +ffffffff81b8a870 t irq_i915_sw_fence_work +ffffffff81b8a8b0 t timer_i915_sw_fence_wake +ffffffff81b8a990 t dma_i915_sw_fence_wake_timer +ffffffff81b8aa10 T __i915_sw_fence_await_dma_fence +ffffffff81b8ab60 t __dma_i915_sw_fence_wake +ffffffff81b8abc0 T i915_sw_fence_await_reservation +ffffffff81b8aca0 t i915_sw_fence_wake +ffffffff81b8b000 T dma_fence_work_init +ffffffff81b8b080 t fence_notify +ffffffff81b8b170 t fence_work +ffffffff81b8b1c0 T dma_fence_work_chain +ffffffff81b8b210 t get_driver_name +ffffffff81b8b240 t get_timeline_name +ffffffff81b8b280 t fence_release +ffffffff81b8c000 T i915_switcheroo_register +ffffffff81b8c030 T i915_switcheroo_unregister +ffffffff81b8d000 T i915_syncmap_init +ffffffff81b8d030 T i915_syncmap_is_later +ffffffff81b8d130 T i915_syncmap_set +ffffffff81b8d1d0 t __sync_set +ffffffff81b8d4c0 T i915_syncmap_free +ffffffff81b8d510 t __sync_free +ffffffff81b8e000 T i915_setup_sysfs +ffffffff81b8e030 T i915_teardown_sysfs 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intel_vgt_balloon +ffffffff81b93000 T i915_vma_instance +ffffffff81b935a0 T i915_vma_work +ffffffff81b93610 T i915_vma_wait_for_bind +ffffffff81b93680 T i915_vma_bind +ffffffff81b939c0 T i915_vma_pin_iomap +ffffffff81b93b90 T i915_vma_flush_writes +ffffffff81b93c00 T i915_vma_unpin_iomap +ffffffff81b93c80 T i915_vma_unpin_and_release +ffffffff81b93cf0 T i915_vma_misplaced +ffffffff81b93d90 T __i915_vma_set_map_and_fenceable +ffffffff81b93e10 T i915_gem_valid_gtt_space +ffffffff81b93e90 T vma_invalidate_tlb +ffffffff81b93ed0 T i915_vma_pin_ww +ffffffff81b948f0 T i915_ggtt_pin +ffffffff81b949c0 t __i915_ggtt_pin +ffffffff81b94b20 t i915_gem_object_lock +ffffffff81b94d30 T i915_vma_close +ffffffff81b94e00 T i915_vma_reopen +ffffffff81b94e80 T i915_vma_destroy_locked +ffffffff81b94f70 t release_references +ffffffff81b950a0 T i915_vma_destroy +ffffffff81b951d0 T i915_vma_parked +ffffffff81b954a0 T i915_vma_revoke_mmap +ffffffff81b955a0 T _i915_vma_move_to_active +ffffffff81b957c0 T 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i915_vma_resource_fence_notify +ffffffff81b97440 T i915_vma_resource_bind_dep_sync +ffffffff81b975c0 T i915_vma_resource_bind_dep_sync_all +ffffffff81b97650 T i915_vma_resource_bind_dep_await +ffffffff81b977f0 T i915_vma_resource_module_exit +ffffffff81b97810 T i915_vma_resource_module_init +ffffffff81b97870 t get_driver_name +ffffffff81b978a0 t get_timeline_name +ffffffff81b978d0 t unbind_fence_release +ffffffff81b97910 t i915_vma_resource_unbind_work +ffffffff81b98000 T intel_platform_name +ffffffff81b98090 T intel_device_info_print +ffffffff81b98d10 T intel_device_info_subplatform_init +ffffffff81b99070 T intel_device_info_runtime_init +ffffffff81b99740 T intel_driver_caps_print +ffffffff81b9a000 T intel_dram_detect +ffffffff81b9a480 t skl_get_dram_info +ffffffff81b9a660 T intel_dram_edram_detect +ffffffff81b9a6f0 t icl_pcode_read_mem_global_info +ffffffff81b9a7d0 t skl_dram_get_channel_info +ffffffff81b9a9a0 t skl_dram_get_dimm_info +ffffffff81b9b000 T intel_memory_region_lookup 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intel_print_wm_latency +ffffffff81b9e550 T ilk_disable_lp_wm +ffffffff81b9e630 T g4x_wm_get_hw_state +ffffffff81b9ee00 T g4x_wm_sanitize +ffffffff81b9ef90 t g4x_program_watermarks +ffffffff81b9f330 T vlv_wm_get_hw_state +ffffffff81b9fff0 t vlv_invalidate_wms +ffffffff81ba0150 T vlv_wm_sanitize +ffffffff81ba02a0 t vlv_program_watermarks +ffffffff81ba09f0 T ilk_wm_get_hw_state +ffffffff81ba0e60 T intel_init_clock_gating +ffffffff81ba0e80 T intel_suspend_hw +ffffffff81ba0f20 T intel_init_clock_gating_hooks +ffffffff81ba1170 T intel_init_pm +ffffffff81ba1c60 T intel_pm_setup +ffffffff81ba1ca0 t chv_set_memory_dvfs +ffffffff81ba1e60 t pvc_init_clock_gating +ffffffff81ba2000 t dg2_init_clock_gating +ffffffff81ba2150 t xehpsdv_init_clock_gating +ffffffff81ba2250 t adlp_init_clock_gating +ffffffff81ba2340 t gen12lp_init_clock_gating +ffffffff81ba24b0 t dg1_init_clock_gating +ffffffff81ba2590 t icl_init_clock_gating +ffffffff81ba2650 t cfl_init_clock_gating +ffffffff81ba2770 t gen9_init_clock_gating +ffffffff81ba2880 t skl_init_clock_gating +ffffffff81ba29c0 t kbl_init_clock_gating +ffffffff81ba2bd0 t bxt_init_clock_gating +ffffffff81ba2d30 t glk_init_clock_gating +ffffffff81ba2d90 t bdw_init_clock_gating +ffffffff81ba31d0 t chv_init_clock_gating +ffffffff81ba3380 t hsw_init_clock_gating +ffffffff81ba34d0 t ivb_init_clock_gating +ffffffff81ba36e0 t g4x_disable_trickle_feed +ffffffff81ba3840 t cpt_init_clock_gating +ffffffff81ba3b70 t vlv_init_clock_gating +ffffffff81ba3c80 t gen6_init_clock_gating +ffffffff81ba3e80 t ilk_init_clock_gating +ffffffff81ba4050 t g4x_init_clock_gating +ffffffff81ba4100 t i965gm_init_clock_gating +ffffffff81ba41d0 t i965g_init_clock_gating +ffffffff81ba4240 t gen3_init_clock_gating +ffffffff81ba4330 t i85x_init_clock_gating +ffffffff81ba43d0 t i830_init_clock_gating +ffffffff81ba4400 t nop_init_clock_gating +ffffffff81ba4420 t ilk_compute_pipe_wm +ffffffff81ba4890 t ilk_compute_intermediate_wm +ffffffff81ba4bb0 t ilk_initial_watermarks +ffffffff81ba4c20 t ilk_optimize_watermarks +ffffffff81ba4cd0 t ilk_compute_wm_level +ffffffff81ba5240 t ilk_validate_wm_level +ffffffff81ba5380 t ilk_program_watermarks +ffffffff81ba6140 t ilk_wm_merge +ffffffff81ba63b0 t vlv_compute_pipe_wm +ffffffff81ba71f0 t vlv_compute_intermediate_wm +ffffffff81ba74f0 t vlv_initial_watermarks +ffffffff81ba7560 t vlv_atomic_update_fifo +ffffffff81ba7870 t vlv_optimize_watermarks +ffffffff81ba7930 t g4x_compute_pipe_wm +ffffffff81ba8560 t g4x_compute_intermediate_wm +ffffffff81ba89a0 t g4x_initial_watermarks +ffffffff81ba8a40 t g4x_optimize_watermarks +ffffffff81ba8b20 t pnv_update_wm +ffffffff81ba91d0 t i965_update_wm +ffffffff81ba9590 t i9xx_update_wm +ffffffff81ba9d40 t i845_update_wm +ffffffff81baa000 T intel_region_ttm_device_init +ffffffff81baa070 T intel_region_ttm_device_fini +ffffffff81baa090 T intel_region_to_ttm_type +ffffffff81baa0d0 T intel_region_ttm_init +ffffffff81baa170 T intel_region_ttm_fini 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gen5_read8 +ffffffff81bb25e0 t gen5_read16 +ffffffff81bb26c0 t gen5_read32 +ffffffff81bb27a0 t gen5_read64 +ffffffff81bb2880 t gen2_write8 +ffffffff81bb2960 t gen2_write16 +ffffffff81bb2a40 t gen2_write32 +ffffffff81bb2b20 t gen2_read8 +ffffffff81bb2bf0 t gen2_read16 +ffffffff81bb2cc0 t gen2_read32 +ffffffff81bb2d90 t gen2_read64 +ffffffff81bb2e60 t fwtable_read8 +ffffffff81bb3120 t fwtable_read16 +ffffffff81bb33e0 t fwtable_read32 +ffffffff81bb36b0 t fwtable_read64 +ffffffff81bb3980 t fwtable_reg_read_fw_domains +ffffffff81bb3a90 t fwtable_write8 +ffffffff81bb3de0 t fwtable_write16 +ffffffff81bb4130 t fwtable_write32 +ffffffff81bb4480 t fwtable_reg_write_fw_domains +ffffffff81bb4630 t gen6_write8 +ffffffff81bb47f0 t gen6_write16 +ffffffff81bb49b0 t gen6_write32 +ffffffff81bb4b70 t gen6_reg_write_fw_domains +ffffffff81bb4ba0 t i915_pmic_bus_access_notifier +ffffffff81bb4c20 t fw_domains_get_with_thread_status +ffffffff81bb4d60 t fw_domains_get_with_fallback +ffffffff81bb5200 t fw_domain_wait_ack_with_fallback +ffffffff81bb5480 t fw_domains_get_normal +ffffffff81bb57b0 t ___force_wake_auto +ffffffff81bb5840 t __gen6_gt_wait_for_fifo +ffffffff81bb6000 T __intel_wakeref_get_first +ffffffff81bb60a0 T __intel_wakeref_put_last +ffffffff81bb6100 t ____intel_wakeref_put_last +ffffffff81bb61e0 T __intel_wakeref_init +ffffffff81bb6260 t __intel_wakeref_put_work +ffffffff81bb62d0 T intel_wakeref_wait_for_idle +ffffffff81bb6410 T intel_wakeref_auto_init +ffffffff81bb6480 t wakeref_auto_timeout +ffffffff81bb6520 T intel_wakeref_auto +ffffffff81bb6710 T intel_wakeref_auto_fini +ffffffff81bb67c0 t __delayed_work_tick +ffffffff81bb7000 T intel_wopcm_init_early +ffffffff81bb7070 T intel_wopcm_init +ffffffff81bb8000 T vlv_iosf_sb_get +ffffffff81bb8020 T vlv_iosf_sb_put +ffffffff81bb8040 T vlv_punit_read +ffffffff81bb8090 t vlv_sideband_rw +ffffffff81bb8240 T vlv_punit_write +ffffffff81bb8290 T vlv_bunit_read +ffffffff81bb82e0 T vlv_bunit_write +ffffffff81bb8330 T vlv_nc_read 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atom_op_shr +ffffffff81bbe4f0 t atom_op_debug +ffffffff81bbe520 t atom_put_dst +ffffffff81bbe9f0 t atom_get_src_int +ffffffff81bbf0a0 t atom_iio_execute +ffffffff81bc0000 T atombios_crtc_dpms +ffffffff81bc02f0 T atombios_crtc_set_base +ffffffff81bc0340 t dce4_crtc_do_set_base +ffffffff81bc0e30 t avivo_crtc_do_set_base +ffffffff81bc16a0 T atombios_crtc_set_base_atomic +ffffffff81bc16e0 T radeon_atom_disp_eng_pll_init +ffffffff81bc17c0 t atombios_crtc_set_disp_eng_pll +ffffffff81bc18d0 t atombios_crtc_program_ss +ffffffff81bc1b80 T atombios_crtc_mode_set +ffffffff81bc25b0 T radeon_atombios_init_crtc +ffffffff81bc26a0 t radeon_bo_reserve +ffffffff81bc2820 t radeon_bo_unreserve +ffffffff81bc2900 t atombios_crtc_program_pll +ffffffff81bc2bb0 t atombios_crtc_prepare +ffffffff81bc2c60 t atombios_crtc_commit +ffffffff81bc2cd0 t atombios_crtc_mode_fixup +ffffffff81bc3a40 t atombios_crtc_disable +ffffffff81bc3ca0 t radeon_get_shared_nondp_ppll +ffffffff81bc4000 T radeon_atom_copy_swap +ffffffff81bc4010 T radeon_dp_aux_init +ffffffff81bc40f0 t radeon_dp_aux_transfer_atom +ffffffff81bc42c0 T radeon_dp_getsinktype +ffffffff81bc4330 T radeon_dp_getdpcd +ffffffff81bc44a0 T radeon_dp_get_panel_mode +ffffffff81bc45a0 T radeon_dp_set_link_config +ffffffff81bc4620 t radeon_dp_get_dp_link_config +ffffffff81bc47a0 T radeon_dp_mode_valid_helper +ffffffff81bc4850 T radeon_dp_needs_link_train +ffffffff81bc48c0 T radeon_dp_set_rx_power_state +ffffffff81bc4940 T radeon_dp_link_train +ffffffff81bc50c0 t radeon_process_aux_ch +ffffffff81bc5260 t dp_get_adjust_train +ffffffff81bc6000 T atombios_get_backlight_level +ffffffff81bc6060 T atombios_set_backlight_level +ffffffff81bc6210 T atombios_dig_transmitter_setup +ffffffff81bc6230 T radeon_atom_backlight_init +ffffffff81bc6400 t radeon_atom_backlight_get_brightness +ffffffff81bc6460 T atombios_dvo_setup +ffffffff81bc6620 T atombios_digital_setup +ffffffff81bc68c0 T atombios_get_encoder_mode +ffffffff81bc6b50 T atombios_dig_encoder_setup2 +ffffffff81bc6f90 T atombios_dig_encoder_setup +ffffffff81bc6fb0 T atombios_dig_transmitter_setup2 +ffffffff81bc7910 T atombios_set_edp_panel_power +ffffffff81bc7a30 T radeon_atom_release_dig_encoder +ffffffff81bc7a70 T radeon_atom_pick_dig_encoder +ffffffff81bc7c90 T radeon_atom_encoder_init +ffffffff81bc7d60 t atombios_external_encoder_setup +ffffffff81bc7fc0 T radeon_atom_ext_encoder_setup_ddc +ffffffff81bc8010 T radeon_enc_destroy +ffffffff81bc80c0 T radeon_add_atom_encoder +ffffffff81bc8500 t radeon_atom_backlight_update_status +ffffffff81bc8560 t radeon_atom_encoder_dpms +ffffffff81bc8870 t radeon_atom_mode_fixup +ffffffff81bc89b0 t radeon_atom_encoder_prepare +ffffffff81bc8e80 t radeon_atom_encoder_commit +ffffffff81bc8eb0 t radeon_atom_encoder_mode_set +ffffffff81bc9460 t radeon_atom_dig_detect +ffffffff81bc9570 t radeon_atom_encoder_disable +ffffffff81bc9820 t radeon_atom_encoder_dpms_avivo +ffffffff81bc9a50 t radeon_atom_encoder_dpms_dig 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btc_dpm_set_power_state +ffffffff81bcda20 T btc_dpm_post_set_power_state +ffffffff81bcdb40 T btc_dpm_enable +ffffffff81bced50 T btc_dpm_disable +ffffffff81bcf280 T btc_dpm_setup_asic +ffffffff81bcf350 T btc_dpm_init +ffffffff81bcf750 T btc_dpm_fini +ffffffff81bcf800 T btc_dpm_debugfs_print_current_performance_level +ffffffff81bcf840 T btc_dpm_get_current_sclk +ffffffff81bcf8c0 T btc_dpm_get_current_mclk +ffffffff81bcf940 T btc_dpm_get_sclk +ffffffff81bcf990 T btc_dpm_get_mclk +ffffffff81bd0000 T ci_dpm_powergate_uvd +ffffffff81bd0380 T ci_dpm_vblank_too_short +ffffffff81bd0400 T ci_fan_ctrl_get_fan_speed_percent +ffffffff81bd04a0 T ci_fan_ctrl_set_fan_speed_percent +ffffffff81bd0570 T ci_fan_ctrl_set_mode +ffffffff81bd0700 t ci_fan_ctrl_set_static_mode +ffffffff81bd07c0 t ci_thermal_start_smc_fan_control +ffffffff81bd0a00 T ci_fan_ctrl_get_mode +ffffffff81bd0a50 T ci_dpm_force_performance_level +ffffffff81bd1310 t ci_upload_dpm_level_enable_mask +ffffffff81bd1640 T ci_dpm_pre_set_power_state +ffffffff81bd1940 T ci_dpm_post_set_power_state +ffffffff81bd1a10 T ci_dpm_setup_asic +ffffffff81bd1c10 T ci_dpm_enable +ffffffff81bd5a40 t ci_enable_didt +ffffffff81bd5ce0 t ci_enable_power_containment +ffffffff81bd6180 T ci_dpm_late_enable +ffffffff81bd6370 T ci_dpm_disable +ffffffff81bd6a60 T ci_dpm_set_power_state +ffffffff81bd7be0 T ci_dpm_display_configuration_changed +ffffffff81bd7d80 T ci_dpm_fini +ffffffff81bd7e30 T ci_dpm_init +ffffffff81bd9500 T ci_dpm_debugfs_print_current_performance_level +ffffffff81bd9640 T ci_dpm_print_power_state +ffffffff81bd9700 T ci_dpm_get_current_sclk +ffffffff81bd97d0 T ci_dpm_get_current_mclk +ffffffff81bd98a0 T ci_dpm_get_sclk +ffffffff81bd98f0 T ci_dpm_get_mclk +ffffffff81bd9940 t ci_populate_all_graphic_levels +ffffffff81bd9ec0 t ci_populate_all_memory_levels +ffffffff81bda7d0 t ci_do_program_memory_timing_parameters +ffffffff81bda9f0 t ci_populate_smc_voltage_table +ffffffff81bdab50 t ci_enable_sclk_mclk_dpm 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+ffffffff81bdd6a0 T cik_ring_ib_execute +ffffffff81bddc70 T cik_ib_test +ffffffff81bddf50 T cik_gfx_get_rptr +ffffffff81bddfa0 T cik_gfx_get_wptr +ffffffff81bddfe0 T cik_gfx_set_wptr +ffffffff81bde020 T cik_compute_get_rptr +ffffffff81bde0f0 T cik_compute_get_wptr +ffffffff81bde1d0 T cik_compute_set_wptr +ffffffff81bde250 T cik_gpu_check_soft_reset +ffffffff81bde3c0 T cik_asic_reset +ffffffff81bde7d0 t cik_gpu_pci_config_reset +ffffffff81bdeff0 T cik_gfx_is_lockup +ffffffff81bdf050 T cik_pcie_gart_tlb_flush +ffffffff81bdf0a0 T cik_ib_parse +ffffffff81bdf0d0 T cik_vm_init +ffffffff81bdf130 T cik_vm_fini +ffffffff81bdf160 T cik_vm_flush +ffffffff81bdfeb0 T cik_enter_rlc_safe_mode +ffffffff81bdff90 T cik_exit_rlc_safe_mode +ffffffff81bdffd0 T cik_update_cg +ffffffff81be04a0 t cik_enable_mgcg +ffffffff81be09c0 t cik_enable_cgcg +ffffffff81be0d30 T cik_init_cp_pg_table +ffffffff81be0ff0 T cik_get_csb_size +ffffffff81be1080 T cik_get_csb_buffer +ffffffff81be1220 T cik_irq_set +ffffffff81be1fc0 t cik_disable_interrupt_state +ffffffff81be2480 T cik_irq_process +ffffffff81be3c20 t cik_irq_ack +ffffffff81be45a0 T cik_resume +ffffffff81be4630 t cik_init_golden_registers +ffffffff81be47f0 t cik_startup +ffffffff81bea540 T cik_suspend +ffffffff81bea920 T cik_init +ffffffff81beb110 t cik_init_microcode +ffffffff81bec120 t cik_pcie_gart_fini +ffffffff81bec220 T cik_fini +ffffffff81bec5c0 T dce8_program_fmt +ffffffff81bec6f0 T dce8_bandwidth_update +ffffffff81bed310 T cik_get_gpu_clock_counter +ffffffff81bed3d0 T cik_set_uvd_clocks +ffffffff81bed440 t cik_set_uvd_clock +ffffffff81bed5b0 T cik_set_vce_clocks +ffffffff81bed7f0 t cik_wait_for_rlc_serdes +ffffffff81bed9c0 t radeon_bo_reserve +ffffffff81bedb40 t radeon_bo_unreserve +ffffffff81bedc20 t cik_update_gfx_pg +ffffffff81beddc0 t cik_compute_stop +ffffffff81bedf30 t cik_cp_compute_fini +ffffffff81bee0d0 t dce8_latency_watermark +ffffffff81bef000 T cik_sdma_get_rptr +ffffffff81bef070 T cik_sdma_get_wptr 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cypress_advertise_gen2_capability +ffffffff81bf2410 T cypress_notify_link_speed_change_after_state_change +ffffffff81bf24d0 T cypress_notify_link_speed_change_before_state_change +ffffffff81bf2580 T cypress_get_strobe_mode_settings +ffffffff81bf2680 T cypress_get_mclk_frequency_ratio +ffffffff81bf2730 T cypress_map_clkf_to_ibias +ffffffff81bf27f0 T cypress_convert_power_level_to_smc +ffffffff81bf2bb0 t cypress_populate_mclk_value +ffffffff81bf2f80 T cypress_upload_sw_state +ffffffff81bf3100 T cypress_upload_mc_reg_table +ffffffff81bf31b0 t cypress_convert_mc_reg_table_to_smc +ffffffff81bf3450 T cypress_calculate_burst_time +ffffffff81bf34d0 T cypress_program_memory_timing_parameters +ffffffff81bf3680 T cypress_populate_smc_initial_state +ffffffff81bf3a10 T cypress_populate_smc_acpi_state +ffffffff81bf3da0 T cypress_construct_voltage_tables +ffffffff81bf3e40 t cypress_trim_voltage_table_to_fit_state_table +ffffffff81bf4030 T cypress_populate_smc_voltage_tables +ffffffff81bf4170 T cypress_get_mvdd_configuration +ffffffff81bf4230 T cypress_populate_mc_reg_table +ffffffff81bf4490 T cypress_get_table_locations +ffffffff81bf4570 T cypress_enable_display_gap +ffffffff81bf45c0 T cypress_dpm_setup_asic +ffffffff81bf46b0 T cypress_dpm_enable +ffffffff81bf5190 t cypress_force_mc_use_s1 +ffffffff81bf5410 t cypress_gfx_clock_gating_enable +ffffffff81bf5720 t cypress_mg_clock_gating_enable +ffffffff81bf59a0 T cypress_dpm_disable +ffffffff81bf5bd0 T cypress_dpm_set_power_state +ffffffff81bf5e80 T cypress_dpm_display_configuration_changed +ffffffff81bf5f60 T cypress_dpm_init +ffffffff81bf61d0 T cypress_dpm_fini +ffffffff81bf6260 T cypress_dpm_vblank_too_short +ffffffff81bf62c0 t cypress_wait_for_mc_sequencer +ffffffff81bf7000 T dce3_2_afmt_hdmi_write_speaker_allocation +ffffffff81bf7070 T dce3_2_afmt_dp_write_speaker_allocation +ffffffff81bf70e0 T dce3_2_afmt_write_sad_regs +ffffffff81bf71f0 T dce3_2_audio_set_dto +ffffffff81bf7330 T dce3_2_hdmi_update_acr +ffffffff81bf7690 T dce3_2_set_audio_packet +ffffffff81bf7820 T dce3_2_set_mute +ffffffff81bf8000 T dce6_endpoint_rreg +ffffffff81bf80d0 T dce6_endpoint_wreg +ffffffff81bf81c0 T dce6_audio_get_pin +ffffffff81bf8330 T dce6_afmt_select_pin +ffffffff81bf83c0 T dce6_afmt_write_latency_fields +ffffffff81bf8470 T dce6_afmt_hdmi_write_speaker_allocation +ffffffff81bf8540 T dce6_afmt_dp_write_speaker_allocation +ffffffff81bf8610 T dce6_afmt_write_sad_regs +ffffffff81bf8750 T dce6_audio_enable +ffffffff81bf8790 T dce6_hdmi_audio_set_dto +ffffffff81bf8800 T dce6_dp_audio_set_dto +ffffffff81bf9000 T eg_cg_rreg +ffffffff81bf9080 t r100_mm_rreg +ffffffff81bf90d0 T eg_cg_wreg +ffffffff81bf9130 T eg_pif_phy0_rreg +ffffffff81bf91b0 T eg_pif_phy0_wreg +ffffffff81bf9210 T eg_pif_phy1_rreg +ffffffff81bf9290 T eg_pif_phy1_wreg +ffffffff81bf92f0 T evergreen_get_allowed_info_register +ffffffff81bf9370 T evergreen_tiling_fields +ffffffff81bf9410 T sumo_set_uvd_clocks +ffffffff81bf94e0 t sumo_set_uvd_clock +ffffffff81bf96a0 T evergreen_set_uvd_clocks +ffffffff81bf9c40 T evergreen_fix_pci_max_read_req_size +ffffffff81bf9df0 T dce4_program_fmt +ffffffff81bf9f00 T dce4_wait_for_vblank +ffffffff81bfa180 T evergreen_page_flip +ffffffff81bfa310 T evergreen_page_flip_pending +ffffffff81bfa380 T evergreen_get_temp +ffffffff81bfa450 T sumo_get_temp +ffffffff81bfa490 T sumo_pm_init_profile +ffffffff81bfa5d0 T btc_pm_init_profile +ffffffff81bfa6e0 T evergreen_pm_misc +ffffffff81bfa880 T evergreen_pm_prepare +ffffffff81bfa980 T evergreen_pm_finish +ffffffff81bfaa80 T evergreen_hpd_sense +ffffffff81bfaaf0 T evergreen_hpd_set_polarity +ffffffff81bfac30 T evergreen_hpd_init +ffffffff81bfad00 T evergreen_hpd_fini +ffffffff81bfada0 T evergreen_get_number_of_dram_channels +ffffffff81bfade0 T evergreen_bandwidth_update +ffffffff81bfafa0 t evergreen_line_buffer_adjust +ffffffff81bfb1a0 t evergreen_program_watermarks +ffffffff81bfbc50 T evergreen_mc_wait_for_idle +ffffffff81bfbce0 T evergreen_pcie_gart_tlb_flush +ffffffff81bfbdb0 T evergreen_mc_stop +ffffffff81bfc8a0 T evergreen_mc_resume +ffffffff81bfcfb0 T evergreen_mc_program +ffffffff81bfd3c0 T evergreen_ring_ib_execute +ffffffff81bfd850 T evergreen_mc_init +ffffffff81bfd990 T evergreen_print_gpu_status_regs +ffffffff81bfd9c0 T evergreen_is_display_hung +ffffffff81bfdbc0 T evergreen_gpu_check_soft_reset +ffffffff81bfdd20 T evergreen_gpu_pci_config_reset +ffffffff81bfde90 T evergreen_asic_reset +ffffffff81bfe1a0 T evergreen_gfx_is_lockup +ffffffff81bfe200 T sumo_rlc_fini +ffffffff81bfe3c0 t radeon_bo_reserve +ffffffff81bfe540 t radeon_bo_unreserve +ffffffff81bfe620 T sumo_rlc_init +ffffffff81bfee00 T evergreen_rlc_resume +ffffffff81bff170 T evergreen_get_vblank_counter +ffffffff81bff1d0 T evergreen_disable_interrupt_state +ffffffff81bff4a0 T evergreen_irq_set +ffffffff81bffa60 T evergreen_irq_suspend +ffffffff81bffab0 T evergreen_irq_process +ffffffff81c005a0 t evergreen_irq_ack +ffffffff81c00ca0 T evergreen_resume +ffffffff81c00d80 t evergreen_init_golden_registers +ffffffff81c00f90 t evergreen_startup +ffffffff81c03620 T evergreen_suspend +ffffffff81c037c0 T evergreen_init +ffffffff81c03cd0 T evergreen_fini +ffffffff81c03ec0 T evergreen_pcie_gen2_enable +ffffffff81c040f0 T evergreen_program_aspm +ffffffff81c04790 t evergreen_latency_watermark +ffffffff81c05000 T evergreen_cs_parse +ffffffff81c078b0 T evergreen_dma_cs_parse +ffffffff81c08af0 T evergreen_ib_parse +ffffffff81c08fa0 T evergreen_dma_ib_parse +ffffffff81c09160 t evergreen_cs_track_check +ffffffff81c0a180 t evergreen_cs_handle_reg +ffffffff81c0c0c0 t evergreen_surface_value_conv_check +ffffffff81c0c3a0 t evergreen_surface_check +ffffffff81c0c840 t evergreen_cs_track_validate_htile +ffffffff81c0cae0 t evergreen_vm_reg_valid +ffffffff81c0d000 T evergreen_dma_fence_ring_emit +ffffffff81c0d2c0 T evergreen_dma_ring_ib_execute +ffffffff81c0d600 T evergreen_copy_dma +ffffffff81c0d9b0 T evergreen_dma_is_lockup +ffffffff81c0e000 T dce4_audio_enable +ffffffff81c0e080 T evergreen_hdmi_update_acr +ffffffff81c0e290 T dce4_afmt_write_latency_fields +ffffffff81c0e300 T dce4_afmt_hdmi_write_speaker_allocation +ffffffff81c0e370 T dce4_afmt_dp_write_speaker_allocation +ffffffff81c0e3e0 T evergreen_hdmi_write_sad_regs +ffffffff81c0e4f0 T evergreen_set_avi_packet +ffffffff81c0e680 T dce4_hdmi_audio_set_dto +ffffffff81c0e750 T dce4_dp_audio_set_dto +ffffffff81c0e840 T dce4_set_vbi_packet +ffffffff81c0e8a0 T dce4_hdmi_set_color_depth +ffffffff81c0e9f0 T dce4_set_audio_packet +ffffffff81c0ec00 T dce4_set_mute +ffffffff81c0ed00 T evergreen_hdmi_enable +ffffffff81c0f030 T evergreen_dp_enable +ffffffff81c10000 T kv_dpm_enable_bapm +ffffffff81c10060 T kv_dpm_enable +ffffffff81c115a0 t kv_enable_didt +ffffffff81c11840 T kv_dpm_late_enable +ffffffff81c11a20 T kv_dpm_powergate_uvd +ffffffff81c11b90 T kv_dpm_disable +ffffffff81c11f00 T kv_dpm_force_performance_level +ffffffff81c12090 t kv_force_dpm_lowest +ffffffff81c12160 T kv_dpm_pre_set_power_state +ffffffff81c126f0 T kv_dpm_set_power_state +ffffffff81c12ea0 t kv_set_valid_clock_range +ffffffff81c13060 t kv_calculate_ds_divider +ffffffff81c131d0 t kv_calculate_nbps_level_settings +ffffffff81c13360 t kv_update_vce_dpm +ffffffff81c13540 T kv_dpm_post_set_power_state +ffffffff81c135e0 T kv_dpm_setup_asic +ffffffff81c13640 T kv_dpm_init +ffffffff81c13ee0 T kv_dpm_debugfs_print_current_performance_level +ffffffff81c13f50 T kv_dpm_get_current_sclk +ffffffff81c13fc0 T kv_dpm_get_current_mclk +ffffffff81c13ff0 T kv_dpm_print_power_state +ffffffff81c14090 T kv_dpm_fini +ffffffff81c14130 T kv_dpm_display_configuration_changed +ffffffff81c14160 T kv_dpm_get_sclk +ffffffff81c141b0 T kv_dpm_get_mclk +ffffffff81c15000 T kv_notify_message_to_smu +ffffffff81c150c0 T kv_dpm_get_enable_mask +ffffffff81c15190 T kv_send_msg_to_smc_with_parameter +ffffffff81c15260 T kv_read_smc_sram_dword +ffffffff81c152e0 T kv_smc_dpm_enable +ffffffff81c15400 T kv_smc_bapm_enable +ffffffff81c15520 T kv_copy_bytes_to_smc +ffffffff81c16000 T tn_smc_rreg +ffffffff81c16080 T tn_smc_wreg +ffffffff81c160e0 T ni_mc_load_microcode +ffffffff81c162d0 T ni_init_microcode +ffffffff81c16810 T cayman_get_allowed_info_register +ffffffff81c168a0 T tn_get_temp +ffffffff81c16930 T cayman_pcie_gart_tlb_flush +ffffffff81c16980 T cayman_cp_int_cntl_setup +ffffffff81c169d0 T cayman_fence_ring_emit +ffffffff81c16d70 T cayman_ring_ib_execute +ffffffff81c171e0 T cayman_gfx_get_rptr +ffffffff81c17270 T cayman_gfx_get_wptr +ffffffff81c172e0 T cayman_gfx_set_wptr +ffffffff81c17360 T cayman_gpu_check_soft_reset +ffffffff81c174e0 T cayman_asic_reset +ffffffff81c177e0 T cayman_gfx_is_lockup +ffffffff81c17840 T cayman_resume +ffffffff81c178d0 t ni_init_golden_registers +ffffffff81c179b0 t cayman_startup +ffffffff81c1a0e0 T cayman_suspend +ffffffff81c1a2d0 T cayman_init +ffffffff81c1a8d0 T cayman_fini +ffffffff81c1ab50 T cayman_vm_init +ffffffff81c1abb0 T cayman_vm_fini +ffffffff81c1abe0 T cayman_vm_decode_fault +ffffffff81c1ac70 T cayman_vm_flush +ffffffff81c1b0f0 T tn_set_vce_clocks +ffffffff81c1c000 T cayman_dma_get_rptr +ffffffff81c1c070 T cayman_dma_get_wptr +ffffffff81c1c0c0 T cayman_dma_set_wptr +ffffffff81c1c110 T cayman_dma_ring_ib_execute +ffffffff81c1c4a0 T cayman_dma_stop +ffffffff81c1c550 T cayman_dma_resume +ffffffff81c1c7a0 T cayman_dma_fini +ffffffff81c1c850 T cayman_dma_is_lockup +ffffffff81c1c8d0 T cayman_dma_vm_copy_pages +ffffffff81c1c9c0 T cayman_dma_vm_write_pages +ffffffff81c1cb20 T cayman_dma_vm_set_pages +ffffffff81c1cc80 T cayman_dma_vm_pad_ib +ffffffff81c1ccd0 T cayman_dma_vm_flush +ffffffff81c1e000 T ni_get_pi +ffffffff81c1e030 T ni_get_ps +ffffffff81c1e060 T ni_dpm_vblank_too_short +ffffffff81c1e0c0 T ni_dpm_force_performance_level +ffffffff81c1e200 T ni_copy_and_switch_arb_sets +ffffffff81c1e4d0 T ni_set_uvd_clock_before_set_eng_clock +ffffffff81c1e550 T ni_set_uvd_clock_after_set_eng_clock +ffffffff81c1e5d0 T ni_dpm_setup_asic +ffffffff81c1e7e0 T ni_update_current_ps +ffffffff81c1e890 T ni_update_requested_ps +ffffffff81c1e940 T ni_dpm_enable +ffffffff81c21b80 t ni_populate_smc_tdp_limits +ffffffff81c21d40 T ni_dpm_disable +ffffffff81c22100 T ni_dpm_pre_set_power_state +ffffffff81c226e0 T ni_dpm_set_power_state +ffffffff81c237f0 T ni_dpm_post_set_power_state +ffffffff81c238c0 T ni_dpm_init +ffffffff81c24290 T ni_dpm_fini +ffffffff81c24340 T ni_dpm_print_power_state +ffffffff81c24410 T ni_dpm_debugfs_print_current_performance_level +ffffffff81c24450 T ni_dpm_get_current_sclk +ffffffff81c244b0 T ni_dpm_get_current_mclk +ffffffff81c24510 T ni_dpm_get_sclk +ffffffff81c24570 T ni_dpm_get_mclk +ffffffff81c245d0 t ni_do_program_memory_timing_parameters +ffffffff81c24700 t ni_calculate_sclk_params +ffffffff81c24920 t ni_calculate_power_boost_limit +ffffffff81c24ad0 t ni_populate_mclk_value +ffffffff81c25000 T r100_wait_for_vblank +ffffffff81c251a0 T r100_page_flip +ffffffff81c25450 T r100_page_flip_pending +ffffffff81c25500 T r100_pm_get_dynpm_state +ffffffff81c25720 T r100_pm_init_profile +ffffffff81c25800 T r100_pm_misc +ffffffff81c25c30 T r100_pm_prepare +ffffffff81c25ce0 T r100_pm_finish +ffffffff81c25d90 T r100_gui_idle +ffffffff81c25dd0 T r100_hpd_sense +ffffffff81c25e30 T r100_hpd_set_polarity +ffffffff81c25ee0 T r100_hpd_init +ffffffff81c25f70 T r100_hpd_fini +ffffffff81c25fd0 T r100_pci_gart_tlb_flush +ffffffff81c26000 T r100_pci_gart_init +ffffffff81c260d0 T r100_pci_gart_get_page_entry +ffffffff81c26100 T r100_pci_gart_set_page +ffffffff81c26130 T r100_pci_gart_enable +ffffffff81c26210 T r100_pci_gart_disable +ffffffff81c26280 T r100_pci_gart_fini +ffffffff81c262f0 T r100_irq_set +ffffffff81c263c0 T r100_irq_disable +ffffffff81c26430 T r100_irq_process +ffffffff81c26730 T r100_get_vblank_counter +ffffffff81c26780 T r100_fence_ring_emit +ffffffff81c26bf0 T r100_semaphore_ring_emit +ffffffff81c26c20 T r100_copy_blit +ffffffff81c272b0 T r100_ring_start +ffffffff81c273a0 T r100_gfx_get_rptr +ffffffff81c273f0 T r100_gfx_get_wptr +ffffffff81c27430 T r100_gfx_set_wptr +ffffffff81c27470 T r100_cp_init +ffffffff81c279a0 T r100_debugfs_cp_init +ffffffff81c279d0 T r100_cp_fini +ffffffff81c27a70 T r100_cp_disable +ffffffff81c27bb0 T r100_gui_wait_for_idle +ffffffff81c27ca0 T r100_reloc_pitch_offset +ffffffff81c27dd0 T r100_packet3_load_vbpntr +ffffffff81c28070 T r100_cs_parse_packet0 +ffffffff81c28180 T r100_cs_packet_parse_vline +ffffffff81c28370 T r100_cs_track_check_pkt3_indx_buffer +ffffffff81c283e0 T r100_cs_parse +ffffffff81c298a0 T r100_cs_track_clear +ffffffff81c29c30 T r100_cs_track_check +ffffffff81c2a610 T r100_mc_wait_for_idle +ffffffff81c2a6a0 T r100_gpu_is_lockup +ffffffff81c2a700 T r100_enable_bm +ffffffff81c2a740 T r100_bm_disable +ffffffff81c2a7e0 T r100_asic_reset +ffffffff81c2ab10 T r100_mc_stop +ffffffff81c2acc0 T r100_mc_resume +ffffffff81c2ad70 T r100_set_common_regs +ffffffff81c2af20 T r100_vram_init_sizes +ffffffff81c2b100 T r100_vga_set_state +ffffffff81c2b160 T r100_pll_errata_after_index +ffffffff81c2b1a0 T r100_pll_rreg +ffffffff81c2b2c0 T r100_pll_wreg +ffffffff81c2b3d0 T r100_debugfs_rbbm_init +ffffffff81c2b400 T r100_debugfs_mc_info_init +ffffffff81c2b430 T r100_set_surface_reg +ffffffff81c2b640 T r100_clear_surface_reg +ffffffff81c2b6f0 T r100_bandwidth_update +ffffffff81c2c190 T r100_ring_test +ffffffff81c2c440 T r100_ring_ib_execute +ffffffff81c2c6a0 T r100_ib_test +ffffffff81c2c9e0 T r100_vga_render_disable +ffffffff81c2ca40 T r100_resume +ffffffff81c2cc30 t r100_startup +ffffffff81c2d160 T r100_suspend +ffffffff81c2d240 T r100_fini +ffffffff81c2d340 T r100_restore_sanity +ffffffff81c2d3e0 T r100_init +ffffffff81c2d950 T r100_mm_rreg_slow +ffffffff81c2d9c0 T r100_mm_wreg_slow +ffffffff81c2da20 T r100_io_rreg +ffffffff81c2dac0 T r100_io_wreg +ffffffff81c2db30 t r100_cs_track_texture_print +ffffffff81c2e000 T r200_copy_dma +ffffffff81c2e460 T r200_packet0_check +ffffffff81c2f470 T r200_set_safe_registers +ffffffff81c30000 T rv370_pcie_rreg +ffffffff81c30080 T rv370_pcie_wreg +ffffffff81c300e0 T rv370_pcie_gart_tlb_flush +ffffffff81c302d0 T rv370_pcie_gart_get_page_entry +ffffffff81c30330 T rv370_pcie_gart_set_page +ffffffff81c30370 T rv370_pcie_gart_init +ffffffff81c30440 T rv370_pcie_gart_enable +ffffffff81c307a0 T rv370_pcie_gart_disable +ffffffff81c30920 T rv370_pcie_gart_fini +ffffffff81c30950 T r300_fence_ring_emit +ffffffff81c30ee0 T r300_ring_start +ffffffff81c318f0 T r300_mc_wait_for_idle +ffffffff81c31980 T r300_asic_reset +ffffffff81c31b90 T r300_mc_init +ffffffff81c31c40 T rv370_set_pcie_lanes +ffffffff81c31e00 T rv370_get_pcie_lanes +ffffffff81c31eb0 T r300_cs_parse +ffffffff81c32210 t r300_packet0_check +ffffffff81c33070 T r300_set_reg_safe +ffffffff81c330b0 T r300_mc_program +ffffffff81c33230 T r300_clock_startup +ffffffff81c332b0 T r300_resume +ffffffff81c33480 t r300_startup +ffffffff81c337e0 T r300_suspend +ffffffff81c33860 T r300_fini +ffffffff81c33940 T r300_init +ffffffff81c34000 T r420_pm_init_profile +ffffffff81c340e0 T r420_pipes_init +ffffffff81c342c0 T r420_mc_rreg +ffffffff81c34340 T r420_mc_wreg +ffffffff81c343b0 T r420_resume +ffffffff81c34580 t r420_startup +ffffffff81c34920 T r420_suspend +ffffffff81c34ac0 T r420_fini +ffffffff81c34ba0 T r420_init +ffffffff81c34e20 T r420_debugfs_pipes_info_init +ffffffff81c35000 T r520_mc_wait_for_idle +ffffffff81c35090 T r520_resume +ffffffff81c35180 t r520_startup +ffffffff81c35570 T r520_init +ffffffff81c36000 T r600_rcu_rreg +ffffffff81c36080 T r600_rcu_wreg +ffffffff81c360f0 T r600_uvd_ctx_rreg +ffffffff81c36170 T r600_uvd_ctx_wreg +ffffffff81c361e0 T r600_get_allowed_info_register +ffffffff81c36250 T r600_get_xclk +ffffffff81c36280 T r600_set_uvd_clocks +ffffffff81c367e0 T dce3_program_fmt +ffffffff81c368f0 T rv6xx_get_temp +ffffffff81c36940 T r600_pm_get_dynpm_state +ffffffff81c36d40 T rs780_pm_init_profile +ffffffff81c36e40 T r600_pm_init_profile +ffffffff81c370d0 T r600_pm_misc +ffffffff81c371a0 T r600_gui_idle +ffffffff81c371e0 T r600_hpd_sense +ffffffff81c37300 T r600_hpd_set_polarity +ffffffff81c37570 T r600_hpd_init +ffffffff81c37780 T r600_hpd_fini +ffffffff81c37930 T r600_pcie_gart_tlb_flush +ffffffff81c37a70 T r600_pcie_gart_init +ffffffff81c37b10 T r600_mc_wait_for_idle +ffffffff81c37ba0 T rs780_mc_rreg +ffffffff81c37c30 T rs780_mc_wreg +ffffffff81c37cb0 T r600_vram_scratch_init +ffffffff81c37db0 t radeon_bo_reserve +ffffffff81c37f30 t radeon_bo_unreserve +ffffffff81c38010 T r600_vram_scratch_fini +ffffffff81c38080 T r600_set_bios_scratch_engine_hung +ffffffff81c380d0 T r600_gpu_check_soft_reset +ffffffff81c38450 T r600_asic_reset +ffffffff81c387e0 t r600_gpu_pci_config_reset +ffffffff81c38a00 T r600_gfx_is_lockup +ffffffff81c38a60 T r6xx_remap_render_backend +ffffffff81c38c40 T r600_count_pipe_bits +ffffffff81c38cb0 T r600_pciep_rreg +ffffffff81c38d30 T r600_pciep_wreg +ffffffff81c38d90 T r600_cp_stop +ffffffff81c38e10 T r600_init_microcode +ffffffff81c392e0 T r600_gfx_get_rptr +ffffffff81c39330 T r600_gfx_get_wptr +ffffffff81c39370 T r600_gfx_set_wptr +ffffffff81c393b0 T r600_cp_start +ffffffff81c39730 T r600_cp_resume +ffffffff81c39a90 T r600_ring_init +ffffffff81c39b30 T r600_cp_fini +ffffffff81c39bb0 T r600_scratch_init +ffffffff81c39c20 T r600_ring_test +ffffffff81c39ec0 T r600_fence_ring_emit +ffffffff81c3a780 T r600_semaphore_ring_emit +ffffffff81c3a970 T r600_copy_cpdma +ffffffff81c3af20 T r600_set_surface_reg +ffffffff81c3af50 T r600_clear_surface_reg +ffffffff81c3af80 T r600_vga_set_state +ffffffff81c3afe0 T r600_resume +ffffffff81c3b070 t r600_startup +ffffffff81c3d080 T r600_suspend +ffffffff81c3d1e0 T r600_irq_suspend +ffffffff81c3d2a0 t r600_pcie_gart_disable +ffffffff81c3d4a0 T r600_init +ffffffff81c3dc90 T r600_ih_ring_init +ffffffff81c3dd00 T r600_irq_fini +ffffffff81c3de30 T r600_fini +ffffffff81c3dfc0 T r600_ring_ib_execute +ffffffff81c3e440 T r600_ib_test +ffffffff81c3e6f0 T r600_ih_ring_alloc +ffffffff81c3e810 T r600_ih_ring_fini +ffffffff81c3e8a0 T r600_rlc_stop +ffffffff81c3ea20 T r600_disable_interrupts +ffffffff81c3ead0 T r600_irq_init +ffffffff81c3ef30 t r600_disable_interrupt_state +ffffffff81c3f220 T r600_irq_disable +ffffffff81c3f2e0 T r600_irq_set +ffffffff81c3fa50 t r600_irq_ack +ffffffff81c3ff40 T r600_irq_process +ffffffff81c40b30 T r600_mmio_hdp_flush +ffffffff81c40ba0 T r600_set_pcie_lanes +ffffffff81c40cd0 T r600_get_pcie_lanes +ffffffff81c40da0 T r600_get_gpu_clock_counter +ffffffff81c41000 T r600_fmt_is_valid_color +ffffffff81c41040 T r600_fmt_is_valid_texture +ffffffff81c41090 T r600_fmt_get_blocksize +ffffffff81c410d0 T r600_fmt_get_nblocksx +ffffffff81c41120 T r600_fmt_get_nblocksy +ffffffff81c41170 T r600_cs_common_vline_parse +ffffffff81c41430 T r600_mip_minify +ffffffff81c41490 T r600_cs_parse +ffffffff81c43420 T r600_dma_cs_next_reloc +ffffffff81c434a0 T r600_dma_cs_parse +ffffffff81c43bd0 t r600_cs_track_check +ffffffff81c44d10 t r600_cs_check_reg +ffffffff81c46000 T r600_dma_get_rptr +ffffffff81c46060 T r600_dma_get_wptr +ffffffff81c460a0 T r600_dma_set_wptr +ffffffff81c460e0 T r600_dma_stop +ffffffff81c46170 T r600_dma_resume +ffffffff81c46370 T r600_dma_fini +ffffffff81c463e0 T r600_dma_is_lockup +ffffffff81c46440 T r600_dma_ring_test +ffffffff81c466a0 T r600_dma_fence_ring_emit +ffffffff81c46890 T r600_dma_semaphore_ring_emit +ffffffff81c469b0 T r600_dma_ib_test +ffffffff81c46bc0 T r600_dma_ring_ib_execute +ffffffff81c46f00 T r600_copy_dma +ffffffff81c48000 T r600_dpm_print_class_info +ffffffff81c482b0 T r600_dpm_print_cap_info +ffffffff81c48330 T r600_dpm_print_ps_status +ffffffff81c483c0 T r600_dpm_get_vblank_time +ffffffff81c48480 T r600_dpm_get_vrefresh +ffffffff81c48510 T r600_calculate_u_and_p +ffffffff81c48580 T r600_calculate_at +ffffffff81c48630 T r600_gfx_clockgating_enable +ffffffff81c48740 T r600_dynamicpm_enable +ffffffff81c487a0 T r600_enable_thermal_protection +ffffffff81c48800 T r600_enable_acpi_pm +ffffffff81c48850 T r600_enable_dynamic_pcie_gen2 +ffffffff81c488b0 T r600_dynamicpm_enabled +ffffffff81c488f0 T r600_enable_sclk_control +ffffffff81c48950 T r600_enable_mclk_control +ffffffff81c489b0 T r600_enable_spll_bypass +ffffffff81c48a10 T r600_wait_for_spll_change +ffffffff81c48a90 T r600_set_bsp +ffffffff81c48ad0 T r600_set_at +ffffffff81c48b30 T r600_set_tc +ffffffff81c48b90 T r600_select_td +ffffffff81c48c50 T r600_set_vrc +ffffffff81c48c90 T r600_set_tpu +ffffffff81c48ce0 T r600_set_tpc +ffffffff81c48d30 T r600_set_sstu +ffffffff81c48d80 T r600_set_sst +ffffffff81c48dd0 T r600_set_git +ffffffff81c48e20 T r600_set_fctu +ffffffff81c48e70 T r600_set_fct +ffffffff81c48ec0 T r600_set_ctxcgtt3d_rphc +ffffffff81c48f10 T r600_set_ctxcgtt3d_rsdc +ffffffff81c48f70 T r600_set_vddc3d_oorsu +ffffffff81c48fc0 T r600_set_vddc3d_oorphc +ffffffff81c49010 T r600_set_vddc3d_oorsdc +ffffffff81c49070 T r600_set_mpll_lock_time +ffffffff81c490c0 T r600_set_mpll_reset_time +ffffffff81c49110 T r600_engine_clock_entry_enable +ffffffff81c49210 T r600_engine_clock_entry_enable_pulse_skipping +ffffffff81c49310 T r600_engine_clock_entry_enable_post_divider +ffffffff81c49410 T r600_engine_clock_entry_set_post_divider +ffffffff81c494d0 T r600_engine_clock_entry_set_reference_divider +ffffffff81c49590 T r600_engine_clock_entry_set_feedback_divider +ffffffff81c49650 T r600_engine_clock_entry_set_step_time +ffffffff81c49710 T r600_vid_rt_set_ssu +ffffffff81c49760 T r600_vid_rt_set_vru +ffffffff81c497b0 T r600_vid_rt_set_vrt +ffffffff81c49800 T r600_voltage_control_enable_pins +ffffffff81c49850 T r600_voltage_control_program_voltages +ffffffff81c498e0 T r600_voltage_control_deactivate_static_control +ffffffff81c49970 T r600_power_level_enable +ffffffff81c499e0 T r600_power_level_set_voltage_index +ffffffff81c49a40 T r600_power_level_set_mem_clock_index +ffffffff81c49aa0 T r600_power_level_set_eng_clock_index +ffffffff81c49b10 T r600_power_level_set_watermark_id +ffffffff81c49b80 T r600_power_level_set_pcie_gen2 +ffffffff81c49be0 T r600_power_level_get_current_index +ffffffff81c49c20 T r600_power_level_get_target_index +ffffffff81c49c60 T r600_power_level_set_enter_index +ffffffff81c49cb0 T r600_wait_for_power_level_unequal +ffffffff81c49d90 T r600_wait_for_power_level +ffffffff81c49e70 T r600_start_dpm +ffffffff81c4a150 T r600_stop_dpm +ffffffff81c4a1a0 T r600_dpm_pre_set_power_state +ffffffff81c4a1d0 T r600_dpm_post_set_power_state +ffffffff81c4a200 T r600_is_uvd_state +ffffffff81c4a230 T r600_is_internal_thermal_sensor +ffffffff81c4a270 T r600_dpm_late_enable +ffffffff81c4a380 T r600_get_platform_caps +ffffffff81c4a420 T r600_parse_extended_power_table +ffffffff81c4b390 T r600_free_extended_power_table +ffffffff81c4b490 T r600_get_pcie_gen_support +ffffffff81c4b4e0 T r600_get_pcie_lane_support +ffffffff81c4b540 T r600_encode_pci_lane_width +ffffffff81c4c000 T r600_audio_update_hdmi +ffffffff81c4c170 t r600_audio_status +ffffffff81c4c290 T r600_hdmi_buffer_status_changed +ffffffff81c4c330 T r600_hdmi_update_audio_settings +ffffffff81c4c700 T r600_audio_enable +ffffffff81c4c780 T r600_audio_get_pin +ffffffff81c4c7b0 T r600_hdmi_update_acr +ffffffff81c4cb50 T r600_set_avi_packet +ffffffff81c4cd40 T r600_hdmi_audio_workaround +ffffffff81c4ce00 T r600_hdmi_audio_set_dto +ffffffff81c4cec0 T r600_set_vbi_packet +ffffffff81c4cf70 T r600_set_audio_packet +ffffffff81c4d240 T r600_set_mute +ffffffff81c4d340 T r600_hdmi_enable +ffffffff81c4e000 T radeon_acpi_is_pcie_performance_request_supported +ffffffff81c4e040 T radeon_acpi_pcie_notify_device_ready +ffffffff81c4e170 T radeon_acpi_pcie_performance_request +ffffffff81c4e390 T radeon_acpi_init +ffffffff81c4eae0 t radeon_acpi_event +ffffffff81c4ee30 T radeon_acpi_fini +ffffffff81c4f000 T radeon_agp_head_init +ffffffff81c4f050 T radeon_agp_init +ffffffff81c4f0a0 T radeon_agp_resume +ffffffff81c4f140 T radeon_agp_fini +ffffffff81c4f190 T radeon_agp_suspend +ffffffff81c50000 T radeon_agp_disable +ffffffff81c50110 T radeon_asic_init +ffffffff81c509a0 t radeon_invalid_rreg +ffffffff81c509e0 t radeon_invalid_wreg +ffffffff81c50a20 t radeon_invalid_get_allowed_info_register +ffffffff81c51000 T radeon_atombios_i2c_init +ffffffff81c513a0 T radeon_atombios_lookup_gpio +ffffffff81c514a0 T radeon_get_atom_connector_info_from_object_table +ffffffff81c51e00 t radeon_lookup_i2c_gpio +ffffffff81c52100 t radeon_atom_apply_quirks +ffffffff81c52530 T radeon_get_atom_connector_info_from_supported_devices_table +ffffffff81c52a30 T radeon_atom_get_clock_info +ffffffff81c52db0 T radeon_atombios_sideport_present +ffffffff81c52e60 T radeon_atombios_get_tmds_info +ffffffff81c52fa0 T radeon_atombios_get_ppll_ss_info +ffffffff81c530c0 T radeon_atombios_get_asic_ss_info +ffffffff81c53430 T radeon_atombios_get_lvds_info +ffffffff81c53790 T radeon_atombios_get_primary_dac_info +ffffffff81c53840 T radeon_atom_get_tv_timings +ffffffff81c53a80 T radeon_atombios_get_tv_info +ffffffff81c53b30 T radeon_atombios_get_tv_dac_info +ffffffff81c53c30 T radeon_atombios_get_default_voltages +ffffffff81c53cf0 T radeon_atombios_get_power_modes +ffffffff81c54dc0 T radeon_atom_get_clock_dividers +ffffffff81c550b0 T radeon_atom_get_memory_pll_dividers +ffffffff81c551f0 T radeon_atom_set_clock_gating +ffffffff81c55240 T radeon_atom_get_engine_clock +ffffffff81c55290 T radeon_atom_get_memory_clock +ffffffff81c552e0 T radeon_atom_set_engine_clock +ffffffff81c55330 T radeon_atom_set_memory_clock +ffffffff81c55380 T radeon_atom_set_engine_dram_timings +ffffffff81c553f0 T radeon_atom_update_memory_dll +ffffffff81c55440 T radeon_atom_set_ac_timing +ffffffff81c55490 T radeon_atom_set_voltage +ffffffff81c55560 T radeon_atom_get_max_vddc +ffffffff81c55630 T radeon_atom_get_leakage_vddc_based_on_leakage_idx +ffffffff81c55700 T radeon_atom_get_leakage_id_from_vbios +ffffffff81c557c0 T radeon_atom_get_leakage_vddc_based_on_leakage_params +ffffffff81c559d0 T radeon_atom_get_voltage_evv +ffffffff81c55a80 T radeon_atom_get_voltage_gpio_settings +ffffffff81c55b80 T radeon_atom_is_voltage_gpio +ffffffff81c55d10 T radeon_atom_get_svi2_info +ffffffff81c55df0 T radeon_atom_get_max_voltage +ffffffff81c55f80 T radeon_atom_get_min_voltage +ffffffff81c560c0 T radeon_atom_get_voltage_step +ffffffff81c561b0 T radeon_atom_round_to_true_voltage +ffffffff81c56320 T radeon_atom_get_voltage_table +ffffffff81c56590 T radeon_atom_get_memory_info +ffffffff81c56740 T radeon_atom_get_mclk_range_table +ffffffff81c56990 T radeon_atom_init_mc_reg_table +ffffffff81c56c00 T radeon_atom_initialize_bios_scratch_regs +ffffffff81c56cd0 T radeon_save_bios_scratch_regs +ffffffff81c56db0 T radeon_restore_bios_scratch_regs +ffffffff81c56e90 T radeon_atom_output_lock +ffffffff81c56f20 T radeon_atombios_connected_scratch_regs +ffffffff81c576a0 T radeon_atombios_encoder_crtc_scratch_regs +ffffffff81c577e0 T radeon_atombios_encoder_dpms_scratch_regs +ffffffff81c579f0 t radeon_atombios_parse_misc_flags_1_3 +ffffffff81c57be0 t radeon_atombios_add_pplib_thermal_controller +ffffffff81c57fe0 t radeon_atombios_parse_pplib_clock_info +ffffffff81c582f0 t radeon_atombios_parse_pplib_non_clock_info +ffffffff81c59000 T radeon_audio_init +ffffffff81c59280 T radeon_audio_endpoint_rreg +ffffffff81c592c0 T radeon_audio_endpoint_wreg +ffffffff81c59300 T radeon_audio_get_pin +ffffffff81c59350 T radeon_audio_detect +ffffffff81c59680 T radeon_audio_fini +ffffffff81c597b0 T radeon_audio_mode_set +ffffffff81c597f0 T radeon_audio_dpms +ffffffff81c59840 T radeon_audio_decode_dfs_div +ffffffff81c598a0 t radeon_audio_hdmi_mode_set +ffffffff81c59fd0 t radeon_audio_write_speaker_allocation +ffffffff81c5a080 t radeon_audio_write_sad_regs +ffffffff81c5a150 t radeon_audio_set_avi_packet +ffffffff81c5a290 t radeon_audio_dp_mode_set +ffffffff81c5a410 t radeon_audio_rreg +ffffffff81c5a460 t radeon_audio_wreg +ffffffff81c5b000 T radeon_benchmark +ffffffff81c5b940 t radeon_benchmark_move +ffffffff81c5be00 t radeon_bo_reserve +ffffffff81c5bf80 t radeon_bo_unreserve +ffffffff81c5d000 T radeon_get_bios +ffffffff81c5e000 t igp_read_bios_from_vram +ffffffff81c5e110 t radeon_read_bios +ffffffff81c5f000 T radeon_legacy_get_engine_clock +ffffffff81c5f0d0 T radeon_legacy_get_memory_clock +ffffffff81c5f1a0 T radeon_get_clock_info +ffffffff81c5f720 T radeon_legacy_set_engine_clock +ffffffff81c5fa70 T radeon_legacy_set_clock_gating +ffffffff81c61000 T radeon_combios_check_hardcoded_edid +ffffffff81c61100 T radeon_bios_get_hardcoded_edid +ffffffff81c61180 T radeon_combios_i2c_init +ffffffff81c61940 t combios_setup_i2c_bus +ffffffff81c61c40 T radeon_combios_get_clock_info +ffffffff81c61e30 T radeon_combios_sideport_present +ffffffff81c61eb0 T radeon_combios_get_primary_dac_info +ffffffff81c61ff0 T radeon_combios_get_tv_info +ffffffff81c620f0 T radeon_combios_get_tv_dac_info +ffffffff81c62390 T radeon_combios_get_lvds_info +ffffffff81c629e0 T radeon_legacy_get_tmds_info_from_table +ffffffff81c62ab0 T radeon_legacy_get_tmds_info_from_combios +ffffffff81c62cb0 T radeon_legacy_get_ext_tmds_info_from_table +ffffffff81c62ef0 T radeon_legacy_get_ext_tmds_info_from_combios +ffffffff81c63280 T radeon_get_legacy_connector_info_from_table +ffffffff81c65640 T radeon_get_legacy_connector_info_from_bios +ffffffff81c663d0 T radeon_combios_get_power_modes +ffffffff81c66c80 T radeon_external_tmds_setup +ffffffff81c66d40 T radeon_combios_external_tmds_setup +ffffffff81c672f0 T radeon_combios_asic_init +ffffffff81c67910 t combios_parse_mmio_table +ffffffff81c67b30 t combios_parse_pll_table +ffffffff81c67e00 T radeon_combios_initialize_bios_scratch_regs +ffffffff81c67e90 T radeon_combios_output_lock +ffffffff81c67ee0 T radeon_combios_connected_scratch_regs +ffffffff81c68240 T radeon_combios_encoder_crtc_scratch_regs +ffffffff81c68310 T radeon_combios_encoder_dpms_scratch_regs +ffffffff81c69000 T radeon_connector_hotplug +ffffffff81c69100 T radeon_get_monitor_bpc +ffffffff81c69530 T radeon_connector_edid +ffffffff81c695e0 T radeon_connector_encoder_get_dp_bridge_encoder_id +ffffffff81c69650 T radeon_connector_is_dp12_capable +ffffffff81c696f0 T radeon_add_atom_connector +ffffffff81c6a540 T radeon_add_legacy_connector +ffffffff81c6aa80 t radeon_dp_detect +ffffffff81c6ae40 t radeon_dvi_force +ffffffff81c6ae80 t radeon_connector_set_property +ffffffff81c6b6c0 t radeon_connector_unregister +ffffffff81c6b720 t radeon_connector_destroy +ffffffff81c6b790 t radeon_best_single_encoder +ffffffff81c6b810 t radeon_connector_get_edid +ffffffff81c6b970 t radeon_dp_get_modes +ffffffff81c6bca0 t radeon_dp_mode_valid +ffffffff81c6be60 t radeon_dvi_encoder +ffffffff81c6bf30 t radeon_fixup_lvds_native_mode +ffffffff81c6c060 t radeon_add_common_modes +ffffffff81c6c150 t radeon_fp_native_mode +ffffffff81c6c220 t radeon_lvds_set_property +ffffffff81c6c310 t radeon_vga_detect +ffffffff81c6c5c0 t radeon_connector_analog_encoder_conflict_solve +ffffffff81c6c7e0 t radeon_vga_get_modes +ffffffff81c6c8d0 t radeon_vga_mode_valid +ffffffff81c6c930 t radeon_dvi_detect +ffffffff81c6cfd0 t radeon_dvi_mode_valid +ffffffff81c6d160 t radeon_tv_detect +ffffffff81c6d3a0 t radeon_tv_get_modes +ffffffff81c6d470 t radeon_tv_mode_valid +ffffffff81c6d4c0 t radeon_lvds_detect +ffffffff81c6d660 t radeon_lvds_get_modes +ffffffff81c6d7c0 t radeon_lvds_mode_valid +ffffffff81c6e000 T radeon_cs_parser_init +ffffffff81c6e480 T radeon_cs_ioctl +ffffffff81c6efb0 t radeon_cs_parser_fini +ffffffff81c6f140 T radeon_cs_packet_parse +ffffffff81c6f2f0 T radeon_cs_packet_next_is_pkt3_nop +ffffffff81c6f340 T radeon_cs_dump_packet +ffffffff81c6f3c0 T radeon_cs_packet_next_reloc +ffffffff81c6f590 t cmp_size_smaller_first +ffffffff81c70000 T radeon_crtc_cursor_move +ffffffff81c70070 t radeon_lock_cursor +ffffffff81c70230 t radeon_cursor_move_locked +ffffffff81c70780 T radeon_crtc_cursor_set2 +ffffffff81c70a00 t radeon_hide_cursor +ffffffff81c70ac0 t radeon_bo_reserve +ffffffff81c70c40 t radeon_bo_unreserve +ffffffff81c70d20 t radeon_show_cursor +ffffffff81c70f70 T radeon_cursor_reset +ffffffff81c71000 T radeon_is_px +ffffffff81c71040 T radeon_program_register_sequence +ffffffff81c71170 T radeon_pci_config_reset +ffffffff81c711a0 T radeon_surface_init +ffffffff81c71360 T radeon_scratch_init +ffffffff81c713e0 T radeon_scratch_get +ffffffff81c71460 T radeon_scratch_free +ffffffff81c714b0 T radeon_doorbell_get +ffffffff81c71550 T radeon_doorbell_free +ffffffff81c71590 T radeon_wb_disable +ffffffff81c715c0 T radeon_wb_fini +ffffffff81c71650 t radeon_bo_reserve +ffffffff81c717d0 t radeon_bo_unreserve +ffffffff81c718b0 T radeon_wb_init +ffffffff81c71ba0 T radeon_vram_location +ffffffff81c71cd0 T radeon_gtt_location +ffffffff81c71e00 T radeon_device_is_virtual +ffffffff81c71e30 T radeon_card_posted +ffffffff81c72040 T radeon_update_bandwidth_info +ffffffff81c720c0 T radeon_boot_test_post_card +ffffffff81c72180 T radeon_dummy_page_init +ffffffff81c72230 T radeon_dummy_page_fini +ffffffff81c72290 T radeon_atombios_init +ffffffff81c72420 t cail_reg_read +ffffffff81c72480 t cail_reg_write +ffffffff81c724e0 t cail_ioreg_read +ffffffff81c72500 t cail_ioreg_write +ffffffff81c72520 t cail_mc_read +ffffffff81c72540 t cail_mc_write +ffffffff81c72560 t cail_pll_read +ffffffff81c72580 t cail_pll_write +ffffffff81c725a0 T radeon_atombios_fini +ffffffff81c72630 T radeon_combios_init +ffffffff81c72670 T radeon_combios_fini +ffffffff81c726a0 T radeon_device_init +ffffffff81c73180 T radeon_device_fini +ffffffff81c73280 T radeon_suspend_kms +ffffffff81c735f0 T radeon_resume_kms +ffffffff81c73840 T radeon_gpu_reset +ffffffff81c74000 T radeon_crtc_load_lut +ffffffff81c74dc0 T radeon_crtc_handle_vblank +ffffffff81c74f30 T radeon_get_crtc_scanoutpos +ffffffff81c75560 T radeon_crtc_handle_flip +ffffffff81c75690 T radeon_compute_pll_avivo +ffffffff81c75bd0 T radeon_compute_pll_legacy +ffffffff81c76250 T radeon_framebuffer_init +ffffffff81c762c0 T radeon_update_display_priority +ffffffff81c76320 T radeon_modeset_init +ffffffff81c76e40 T radeon_modeset_fini +ffffffff81c76f90 T radeon_crtc_scaling_mode_fixup +ffffffff81c772e0 T radeon_get_crtc_scanout_position +ffffffff81c77340 t radeon_user_framebuffer_create +ffffffff81c774e0 t radeon_crtc_gamma_set +ffffffff81c77520 t radeon_crtc_destroy +ffffffff81c77560 t radeon_crtc_set_config +ffffffff81c77620 t radeon_crtc_page_flip_target +ffffffff81c77ab0 t radeon_flip_work_func +ffffffff81c77cd0 t radeon_unpin_work_func +ffffffff81c77d50 t radeon_bo_reserve +ffffffff81c77ed0 t radeon_bo_unreserve +ffffffff81c78000 T radeon_dp_aux_transfer_native +ffffffff81c79000 T radeondrm_probe +ffffffff81c79060 T radeondrm_attach_kms +ffffffff81c797a0 T radeondrm_detach_kms +ffffffff81c79830 T radeondrm_activate_kms +ffffffff81c798e0 T radeondrm_wsioctl +ffffffff81c79990 T radeondrm_wsmmap +ffffffff81c799c0 T radeondrm_alloc_screen +ffffffff81c799e0 T radeondrm_free_screen +ffffffff81c799f0 T radeondrm_show_screen +ffffffff81c79ad0 T radeondrm_enter_ddb +ffffffff81c79b30 T radeondrm_doswitch +ffffffff81c79bc0 T radeondrm_setpal +ffffffff81c79dc0 T radeondrm_attachhook +ffffffff81c7a0f0 T radeondrm_forcedetach +ffffffff81c7b000 T radeon_setup_encoder_clones +ffffffff81c7b0b0 T radeon_get_encoder_enum +ffffffff81c7b230 T radeon_link_encoder_connector +ffffffff81c7b370 T radeon_encoder_set_active_device +ffffffff81c7b430 T radeon_get_connector_for_encoder +ffffffff81c7b4b0 T radeon_get_connector_for_encoder_init +ffffffff81c7b530 T radeon_get_external_encoder +ffffffff81c7b5b0 T radeon_encoder_get_dp_bridge_encoder_id +ffffffff81c7b640 T radeon_panel_mode_fixup +ffffffff81c7b800 T radeon_dig_monitor_is_duallink +ffffffff81c7b920 T radeon_encoder_is_digital +ffffffff81c7c000 T radeon_align_pitch +ffffffff81c7c080 T radeon_fbdev_init +ffffffff81c7c1d0 T radeondrm_burner_cb +ffffffff81c7c1f0 T radeon_fbdev_fini +ffffffff81c7c260 T radeon_fbdev_set_suspend +ffffffff81c7c2a0 T radeon_fbdev_robj_is_fb +ffffffff81c7c2f0 T radeondrm_burner +ffffffff81c7c370 t radeonfb_create +ffffffff81c7c770 t radeon_bo_reserve +ffffffff81c7c8f0 t radeon_bo_unreserve +ffffffff81c7d000 T radeon_fence_emit +ffffffff81c7d120 T radeon_fence_process +ffffffff81c7d1f0 t radeon_fence_activity +ffffffff81c7d390 T radeon_fence_signaled +ffffffff81c7d420 T radeon_fence_wait_timeout +ffffffff81c7d560 t radeon_fence_wait_seq_timeout +ffffffff81c7d980 T radeon_fence_wait +ffffffff81c7dab0 T radeon_fence_wait_any +ffffffff81c7dc00 T radeon_fence_wait_next +ffffffff81c7dcc0 T radeon_fence_wait_empty +ffffffff81c7ddd0 T radeon_fence_ref +ffffffff81c7de10 T radeon_fence_unref +ffffffff81c7de50 T radeon_fence_count_emitted +ffffffff81c7ded0 T radeon_fence_need_sync +ffffffff81c7df20 T radeon_fence_note_sync +ffffffff81c7e0f0 T radeon_fence_driver_start_ring +ffffffff81c7e2d0 T radeon_fence_driver_init +ffffffff81c7e410 T radeon_debugfs_fence_init +ffffffff81c7e440 T radeon_fence_driver_fini +ffffffff81c7e690 T radeon_fence_driver_force_completion +ffffffff81c7e790 t radeon_fence_get_driver_name +ffffffff81c7e7c0 t radeon_fence_get_timeline_name +ffffffff81c7e850 t radeon_fence_enable_signaling +ffffffff81c7ea60 t radeon_fence_is_signaled +ffffffff81c7eb20 t radeon_fence_default_wait +ffffffff81c7ecc0 t radeon_fence_any_seq_signaled +ffffffff81c7eec0 t radeon_fence_check_lockup +ffffffff81c7f110 t __delayed_work_tick +ffffffff81c7f130 t radeon_fence_check_signaled +ffffffff81c7f1c0 t radeon_fence_wait_cb +ffffffff81c80000 T radeon_gart_table_ram_alloc +ffffffff81c800c0 T radeon_gart_table_ram_free +ffffffff81c80120 T radeon_gart_table_vram_alloc +ffffffff81c80190 T radeon_gart_table_vram_pin +ffffffff81c802d0 t radeon_bo_reserve +ffffffff81c80450 t radeon_bo_unreserve +ffffffff81c80530 T radeon_gart_table_vram_unpin +ffffffff81c805b0 T radeon_gart_table_vram_free +ffffffff81c805f0 T radeon_gart_unbind +ffffffff81c80710 T radeon_gart_bind +ffffffff81c80860 T radeon_gart_init +ffffffff81c80990 T radeon_gart_fini +ffffffff81c81000 T radeon_gem_fault +ffffffff81c81180 T radeon_gem_vm_reference +ffffffff81c811b0 T radeon_gem_vm_detach +ffffffff81c811c0 T radeon_gem_object_create +ffffffff81c81380 T radeon_gem_init +ffffffff81c813c0 T radeon_gem_fini +ffffffff81c813d0 t radeon_gem_object_free +ffffffff81c81410 t radeon_gem_object_open +ffffffff81c814b0 t radeon_gem_object_close +ffffffff81c815a0 t radeon_gem_object_mmap +ffffffff81c81630 T radeon_gem_info_ioctl +ffffffff81c816a0 T radeon_gem_pread_ioctl +ffffffff81c816f0 T radeon_gem_pwrite_ioctl +ffffffff81c81740 T radeon_gem_create_ioctl +ffffffff81c81860 T radeon_gem_userptr_ioctl +ffffffff81c81890 T radeon_gem_set_domain_ioctl +ffffffff81c819f0 T radeon_mode_dumb_mmap +ffffffff81c81aa0 T radeon_gem_mmap_ioctl +ffffffff81c81b50 T radeon_gem_busy_ioctl +ffffffff81c81c00 T radeon_gem_wait_idle_ioctl +ffffffff81c81d10 T radeon_gem_set_tiling_ioctl +ffffffff81c81dc0 T radeon_gem_get_tiling_ioctl +ffffffff81c81e90 t radeon_bo_reserve +ffffffff81c820a0 t radeon_bo_unreserve +ffffffff81c82180 T radeon_gem_va_ioctl +ffffffff81c82540 T radeon_gem_op_ioctl +ffffffff81c82630 T radeon_mode_dumb_create +ffffffff81c82730 T radeon_gem_debugfs_init +ffffffff81c83000 T radeon_ddc_probe +ffffffff81c830c0 T radeon_router_select_ddc_port +ffffffff81c83320 T radeon_bb_set_bits +ffffffff81c83490 T radeon_bb_set_dir +ffffffff81c834c0 T radeon_bb_read_bits +ffffffff81c83590 T radeon_acquire_bus +ffffffff81c839e0 T radeon_release_bus +ffffffff81c83b50 T radeon_send_start +ffffffff81c83b70 T radeon_send_stop +ffffffff81c83b90 T radeon_initiate_xfer +ffffffff81c83bb0 T radeon_read_byte +ffffffff81c83bd0 T radeon_write_byte +ffffffff81c83bf0 T radeon_i2c_create +ffffffff81c83df0 T radeon_i2c_destroy +ffffffff81c83e70 T radeon_i2c_init +ffffffff81c83ec0 T radeon_i2c_fini +ffffffff81c83f70 T radeon_i2c_add +ffffffff81c84120 T radeon_i2c_lookup +ffffffff81c842e0 T radeon_i2c_get_byte +ffffffff81c843a0 T radeon_i2c_put_byte +ffffffff81c84430 T radeon_router_select_cd_port +ffffffff81c84690 t radeon_hw_i2c_xfer +ffffffff81c85250 t radeon_hw_i2c_func +ffffffff81c85280 t r100_hw_i2c_xfer +ffffffff81c85960 t radeon_get_i2c_prescale +ffffffff81c86000 T radeon_ib_get +ffffffff81c86100 T radeon_ib_free +ffffffff81c86150 T radeon_ib_schedule +ffffffff81c863e0 T radeon_ib_pool_init +ffffffff81c86470 T radeon_ib_pool_fini +ffffffff81c864e0 T radeon_ib_ring_tests +ffffffff81c87000 T radeon_driver_irq_handler_kms +ffffffff81c87050 T radeon_msi_ok +ffffffff81c87150 T radeon_irq_kms_init +ffffffff81c873e0 t radeon_hotplug_work_func +ffffffff81c87480 t radeon_dp_work_func +ffffffff81c874b0 T radeon_irq_kms_fini +ffffffff81c87640 T radeon_irq_kms_sw_irq_get +ffffffff81c876e0 T radeon_irq_kms_sw_irq_get_delayed +ffffffff81c87720 T radeon_irq_kms_sw_irq_put +ffffffff81c877b0 T radeon_irq_kms_pflip_irq_get +ffffffff81c87860 T radeon_irq_kms_pflip_irq_put +ffffffff81c87900 T radeon_irq_kms_enable_afmt +ffffffff81c87990 T radeon_irq_kms_disable_afmt +ffffffff81c87a20 T radeon_irq_kms_enable_hpd +ffffffff81c87b00 T radeon_irq_kms_disable_hpd +ffffffff81c87bd0 T radeon_irq_kms_set_irq_n_enabled +ffffffff81c87d40 t __delayed_work_tick +ffffffff81c88000 T radeon_info_ioctl +ffffffff81c88be0 T radeon_driver_lastclose_kms +ffffffff81c88bf0 T radeon_driver_open_kms +ffffffff81c88d20 t radeon_bo_reserve +ffffffff81c88ea0 T radeon_driver_postclose_kms +ffffffff81c890c0 T radeon_get_vblank_counter_kms +ffffffff81c89250 T radeon_enable_vblank_kms +ffffffff81c892f0 T radeon_disable_vblank_kms +ffffffff81c8a000 T radeon_crtc_set_base +ffffffff81c8a020 T radeon_crtc_do_set_base +ffffffff81c8a5c0 T radeon_crtc_set_base_atomic +ffffffff81c8a5e0 t radeon_bo_reserve +ffffffff81c8a760 t radeon_bo_unreserve +ffffffff81c8a840 T radeon_legacy_init_crtc +ffffffff81c8a880 t radeon_crtc_dpms +ffffffff81c8aa80 t radeon_crtc_prepare +ffffffff81c8aaf0 t radeon_crtc_commit +ffffffff81c8ab60 t radeon_crtc_mode_fixup +ffffffff81c8ab70 t radeon_crtc_mode_set +ffffffff81c8bfc0 t radeon_crtc_disable +ffffffff81c8d000 T radeon_legacy_get_backlight_level +ffffffff81c8d040 T radeon_legacy_set_backlight_level +ffffffff81c8d080 t radeon_legacy_lvds_update +ffffffff81c8d3e0 T radeon_legacy_backlight_init +ffffffff81c8d5b0 t radeon_legacy_backlight_get_brightness +ffffffff81c8d610 T radeon_add_legacy_encoder +ffffffff81c8d990 t radeon_legacy_backlight_update_status +ffffffff81c8da20 t radeon_lvds_enc_destroy +ffffffff81c8dab0 t radeon_legacy_lvds_dpms +ffffffff81c8db00 t radeon_legacy_mode_fixup +ffffffff81c8db70 t radeon_legacy_lvds_prepare +ffffffff81c8dbf0 t radeon_legacy_lvds_commit +ffffffff81c8dc70 t radeon_legacy_lvds_mode_set +ffffffff81c8de80 t radeon_legacy_encoder_disable +ffffffff81c8ded0 t radeon_legacy_tmds_int_dpms +ffffffff81c8df90 t radeon_legacy_tmds_int_prepare +ffffffff81c8e050 t radeon_legacy_tmds_int_commit +ffffffff81c8e120 t radeon_legacy_tmds_int_mode_set +ffffffff81c8e380 t radeon_legacy_primary_dac_dpms +ffffffff81c8e4b0 t radeon_legacy_primary_dac_prepare +ffffffff81c8e500 t radeon_legacy_primary_dac_commit +ffffffff81c8e550 t radeon_legacy_primary_dac_mode_set +ffffffff81c8e6f0 t radeon_legacy_primary_dac_detect +ffffffff81c8e8e0 t radeon_legacy_tv_dac_dpms +ffffffff81c8ead0 t radeon_legacy_tv_dac_prepare +ffffffff81c8eb20 t radeon_legacy_tv_dac_commit +ffffffff81c8eb70 t radeon_legacy_tv_dac_mode_set +ffffffff81c8ef10 t radeon_legacy_tv_dac_detect +ffffffff81c8fb30 t radeon_ext_tmds_enc_destroy +ffffffff81c8fb70 t radeon_legacy_tmds_ext_dpms +ffffffff81c8fc40 t radeon_legacy_tmds_ext_prepare +ffffffff81c8fd10 t radeon_legacy_tmds_ext_commit +ffffffff81c8fde0 t radeon_legacy_tmds_ext_mode_set +ffffffff81c90000 T radeon_legacy_tv_mode_set +ffffffff81c910a0 T radeon_legacy_tv_adjust_crtc_reg +ffffffff81c911b0 T radeon_legacy_tv_adjust_pll1 +ffffffff81c912a0 T radeon_legacy_tv_adjust_pll2 +ffffffff81c92000 T radeon_ttm_bo_is_radeon_bo +ffffffff81c92040 t radeon_ttm_bo_destroy +ffffffff81c92170 T radeon_ttm_placement_from_domain +ffffffff81c922e0 T radeon_bo_create +ffffffff81c924a0 T radeon_bo_kmap +ffffffff81c92580 T radeon_bo_check_tiling +ffffffff81c92650 T radeon_bo_kunmap +ffffffff81c926d0 T radeon_bo_ref +ffffffff81c92710 T radeon_bo_unref +ffffffff81c92760 T radeon_bo_pin_restricted +ffffffff81c92a90 T radeon_bo_pin +ffffffff81c92ab0 T radeon_bo_unpin +ffffffff81c92b20 T radeon_bo_evict_vram +ffffffff81c92b70 T radeon_bo_force_delete +ffffffff81c92ce0 T radeon_bo_init +ffffffff81c92dc0 T radeon_bo_fini +ffffffff81c92e00 T radeon_bo_list_validate +ffffffff81c930f0 T radeon_bo_get_surface_reg +ffffffff81c93390 T radeon_bo_set_tiling_flags +ffffffff81c936b0 T radeon_bo_get_tiling_flags +ffffffff81c936f0 T radeon_bo_move_notify +ffffffff81c937b0 T radeon_bo_fault_reserve_notify +ffffffff81c93ab0 T radeon_bo_fence +ffffffff81c94000 T radeon_pm_get_type_index +ffffffff81c94070 T radeon_pm_acpi_event_handler +ffffffff81c94150 t radeon_pm_update_profile +ffffffff81c94270 t radeon_pm_set_clocks +ffffffff81c94c10 T radeon_dpm_enable_uvd +ffffffff81c94cd0 T radeon_pm_compute_clocks +ffffffff81c95700 T radeon_dpm_enable_vce +ffffffff81c95760 T radeon_pm_suspend +ffffffff81c95860 T radeon_pm_resume +ffffffff81c95b40 T radeon_pm_init +ffffffff81c96230 T radeon_pm_late_init +ffffffff81c962e0 T radeon_pm_fini +ffffffff81c963f0 t radeon_dpm_thermal_work_handler +ffffffff81c964d0 t radeon_dynpm_idle_work_handler +ffffffff81c967c0 t __delayed_work_tick +ffffffff81c97000 T radeon_gem_prime_get_sg_table +ffffffff81c97020 T radeon_gem_prime_pin +ffffffff81c970a0 t radeon_bo_reserve +ffffffff81c97220 t radeon_bo_unreserve +ffffffff81c97300 T radeon_gem_prime_unpin +ffffffff81c97370 T radeon_gem_prime_export +ffffffff81c98000 T radeon_ring_supports_scratch_reg +ffffffff81c98030 T radeon_ring_free_size +ffffffff81c980d0 T radeon_ring_lockup_update +ffffffff81c98130 T radeon_ring_alloc +ffffffff81c982b0 T radeon_ring_lock +ffffffff81c98330 T radeon_ring_commit +ffffffff81c98430 T radeon_ring_unlock_commit +ffffffff81c98460 T radeon_ring_undo +ffffffff81c98490 T radeon_ring_unlock_undo +ffffffff81c984b0 T radeon_ring_test_lockup +ffffffff81c985d0 T radeon_ring_backup +ffffffff81c98790 T radeon_ring_restore +ffffffff81c98950 T radeon_ring_init +ffffffff81c98b40 t radeon_bo_reserve +ffffffff81c98cc0 t radeon_bo_unreserve +ffffffff81c98da0 T radeon_ring_fini +ffffffff81c99000 T radeon_sa_bo_manager_init +ffffffff81c99190 T radeon_sa_bo_manager_fini +ffffffff81c99370 T radeon_sa_bo_manager_start +ffffffff81c994a0 t radeon_bo_reserve +ffffffff81c99620 t radeon_bo_unreserve +ffffffff81c99700 T radeon_sa_bo_manager_suspend +ffffffff81c997a0 T radeon_sa_bo_new +ffffffff81c99fd0 T radeon_sa_bo_free +ffffffff81c9b000 T radeon_semaphore_create +ffffffff81c9b0e0 T radeon_semaphore_emit_signal +ffffffff81c9b160 T radeon_semaphore_emit_wait +ffffffff81c9b1f0 T radeon_semaphore_free +ffffffff81c9c000 T radeon_sync_create +ffffffff81c9c090 T radeon_sync_fence +ffffffff81c9c130 T radeon_sync_resv +ffffffff81c9c260 T radeon_sync_rings +ffffffff81c9c420 T radeon_sync_free +ffffffff81c9d000 T radeon_test_moves +ffffffff81c9d070 t radeon_do_test_moves +ffffffff81c9d660 T radeon_test_ring_sync +ffffffff81c9d920 t radeon_test_create_and_emit_fence +ffffffff81c9da90 T radeon_test_syncing +ffffffff81c9dd50 t radeon_test_ring_sync2 +ffffffff81c9e0c0 t radeon_bo_reserve +ffffffff81c9e240 t radeon_bo_unreserve +ffffffff81c9f000 T radeon_get_rdev +ffffffff81c9f030 T radeon_ttm_tt_set_userptr +ffffffff81c9f080 T radeon_ttm_tt_is_bound +ffffffff81c9f0c0 T radeon_ttm_tt_has_userptr +ffffffff81c9f100 T radeon_ttm_tt_is_readonly +ffffffff81c9f140 T radeon_ttm_init +ffffffff81c9f350 T radeon_ttm_set_active_vram_size +ffffffff81c9f390 t radeon_bo_reserve +ffffffff81c9f510 t radeon_bo_unreserve +ffffffff81c9f5f0 T radeon_ttm_fini +ffffffff81c9f6c0 t radeon_ttm_tt_create +ffffffff81c9f7b0 t radeon_ttm_tt_populate +ffffffff81c9f860 t radeon_ttm_tt_unpopulate +ffffffff81c9f950 t radeon_ttm_tt_destroy +ffffffff81c9f9a0 t radeon_evict_flags +ffffffff81c9faf0 t radeon_bo_move +ffffffff81c9ff70 t radeon_ttm_io_mem_reserve +ffffffff81ca1000 T radeon_ucode_print_mc_hdr +ffffffff81ca10b0 t radeon_ucode_print_common_hdr +ffffffff81ca11e0 T radeon_ucode_print_smc_hdr +ffffffff81ca1270 T radeon_ucode_print_gfx_hdr +ffffffff81ca1330 T radeon_ucode_print_rlc_hdr +ffffffff81ca1430 T radeon_ucode_print_sdma_hdr +ffffffff81ca1510 T radeon_ucode_validate +ffffffff81ca2000 T radeon_uvd_init +ffffffff81ca24f0 t radeon_uvd_idle_work_handler +ffffffff81ca2650 t radeon_bo_reserve +ffffffff81ca2860 t radeon_bo_unreserve +ffffffff81ca2940 T radeon_uvd_fini +ffffffff81ca2a00 T radeon_uvd_suspend +ffffffff81ca2bc0 T radeon_uvd_note_usage +ffffffff81ca2e00 T radeon_uvd_get_destroy_msg +ffffffff81ca2f10 T radeon_uvd_resume +ffffffff81ca2fa0 T radeon_uvd_force_into_uvd_segment +ffffffff81ca3040 T radeon_uvd_free_handles +ffffffff81ca3200 T radeon_uvd_cs_parse +ffffffff81ca3920 T radeon_uvd_get_create_msg +ffffffff81ca3a90 t radeon_uvd_send_msg +ffffffff81ca3c30 T radeon_uvd_calc_upll_dividers +ffffffff81ca3dd0 T radeon_uvd_send_upll_ctlreq +ffffffff81ca4100 t __delayed_work_tick +ffffffff81ca5000 T radeon_vce_init +ffffffff81ca5600 t radeon_vce_idle_work_handler +ffffffff81ca56d0 t radeon_bo_reserve +ffffffff81ca5850 t radeon_bo_unreserve +ffffffff81ca5930 T radeon_vce_fini +ffffffff81ca59b0 T radeon_vce_suspend +ffffffff81ca5a90 T radeon_vce_resume +ffffffff81ca5be0 T radeon_vce_note_usage +ffffffff81ca5d00 T radeon_vce_free_handles +ffffffff81ca5dc0 T radeon_vce_get_destroy_msg +ffffffff81ca6060 T radeon_vce_get_create_msg +ffffffff81ca6420 T radeon_vce_cs_reloc +ffffffff81ca6510 T radeon_vce_cs_parse +ffffffff81ca6d40 T radeon_vce_semaphore_emit +ffffffff81ca6f00 T radeon_vce_ib_execute +ffffffff81ca70a0 T radeon_vce_fence_emit +ffffffff81ca72e0 T radeon_vce_ring_test +ffffffff81ca7420 T radeon_vce_ib_test +ffffffff81ca7530 t __delayed_work_tick +ffffffff81ca8000 T radeon_vm_manager_init +ffffffff81ca8060 T radeon_vm_manager_fini +ffffffff81ca8180 T radeon_vm_get_bos +ffffffff81ca82b0 T radeon_vm_grab_id +ffffffff81ca8440 T radeon_vm_flush +ffffffff81ca85c0 T radeon_vm_fence +ffffffff81ca8670 T radeon_vm_bo_find +ffffffff81ca86d0 T radeon_vm_bo_add +ffffffff81ca87b0 T radeon_vm_bo_set_addr +ffffffff81ca8c10 t radeon_bo_unreserve +ffffffff81ca8cf0 t radeon_vm_clear_bo +ffffffff81ca8ee0 T radeon_vm_map_gart +ffffffff81ca8f20 T radeon_vm_update_page_directory +ffffffff81ca92c0 T radeon_vm_bo_update +ffffffff81ca99a0 T radeon_vm_clear_freed +ffffffff81ca9a80 T radeon_vm_clear_invalids +ffffffff81ca9b20 T radeon_vm_bo_rmv +ffffffff81ca9c00 T radeon_vm_bo_invalidate +ffffffff81ca9cb0 T radeon_vm_init +ffffffff81ca9f10 T radeon_vm_fini +ffffffff81caa1e0 t radeon_bo_reserve +ffffffff81caa360 t radeon_vm_frag_ptes +ffffffff81cab000 T rs400_gart_adjust_size +ffffffff81cab0c0 T rs400_gart_tlb_flush +ffffffff81cab140 T rs400_gart_init +ffffffff81cab230 T rs400_gart_enable +ffffffff81cab590 T rs400_gart_disable +ffffffff81cab5f0 T rs400_gart_fini +ffffffff81cab660 T rs400_gart_get_page_entry +ffffffff81cab6c0 T rs400_gart_set_page +ffffffff81cab6f0 T rs400_mc_wait_for_idle +ffffffff81cab780 T rs400_mc_rreg +ffffffff81cab810 T rs400_mc_wreg +ffffffff81cab890 T rs400_resume +ffffffff81cab9c0 t rs400_mc_program +ffffffff81cabac0 t rs400_startup +ffffffff81cabcb0 T rs400_suspend +ffffffff81cabd40 T rs400_fini +ffffffff81cabe30 T rs400_init +ffffffff81cad000 T avivo_wait_for_vblank +ffffffff81cad280 T rs600_page_flip +ffffffff81cad540 T rs600_page_flip_pending +ffffffff81cad5b0 T avivo_program_fmt +ffffffff81cad6d0 T rs600_pm_misc +ffffffff81cada10 T rs600_pm_prepare +ffffffff81cadb10 T rs600_pm_finish +ffffffff81cadc10 T rs600_hpd_sense +ffffffff81cadc70 T rs600_hpd_set_polarity +ffffffff81cadd20 T rs600_hpd_init +ffffffff81cade00 T rs600_hpd_fini +ffffffff81cadea0 T rs600_asic_reset +ffffffff81cae110 T rs600_gart_tlb_flush +ffffffff81cae1d0 T rs600_gart_get_page_entry +ffffffff81cae230 T rs600_gart_set_page +ffffffff81cae270 T rs600_irq_set +ffffffff81cae440 T rs600_irq_disable +ffffffff81cae4c0 t rs600_irq_ack +ffffffff81cae670 T rs600_irq_process +ffffffff81cae9e0 T rs600_get_vblank_counter +ffffffff81caea30 T rs600_mc_wait_for_idle +ffffffff81caeac0 T rs600_bandwidth_update +ffffffff81caebb0 T rs600_mc_rreg +ffffffff81caec30 T rs600_mc_wreg +ffffffff81caec90 T rs600_set_safe_registers +ffffffff81caecd0 T rs600_resume +ffffffff81caee00 t rs600_startup +ffffffff81caf640 T rs600_suspend +ffffffff81caf740 T rs600_fini +ffffffff81caf840 T rs600_init +ffffffff81cb0000 T rs690_mc_wait_for_idle +ffffffff81cb0090 T rs690_pm_info +ffffffff81cb0320 T rs690_line_buffer_adjust +ffffffff81cb0420 T rs690_bandwidth_update +ffffffff81cb0740 t rs690_crtc_bandwidth_compute +ffffffff81cb0b70 t rs690_compute_mode_priority +ffffffff81cb0ff0 T rs690_mc_rreg +ffffffff81cb1080 T rs690_mc_wreg +ffffffff81cb1100 T rs690_resume +ffffffff81cb11f0 t rs690_startup +ffffffff81cb14e0 T rs690_suspend +ffffffff81cb1540 T rs690_fini +ffffffff81cb15e0 T rs690_init +ffffffff81cb2000 T rs780_dpm_enable +ffffffff81cb2bd0 T rs780_dpm_disable +ffffffff81cb2cb0 T rs780_dpm_set_power_state +ffffffff81cb3090 t rs780_force_voltage +ffffffff81cb31d0 t rs780_enable_voltage_scaling +ffffffff81cb3380 T rs780_dpm_setup_asic +ffffffff81cb33b0 T rs780_dpm_display_configuration_changed +ffffffff81cb34f0 T rs780_dpm_init +ffffffff81cb3a50 T rs780_dpm_print_power_state +ffffffff81cb3ae0 T rs780_dpm_fini +ffffffff81cb3b70 T rs780_dpm_get_sclk +ffffffff81cb3bb0 T rs780_dpm_get_mclk +ffffffff81cb3be0 T rs780_dpm_debugfs_print_current_performance_level +ffffffff81cb3c10 T rs780_dpm_get_current_sclk +ffffffff81cb3c90 T rs780_dpm_get_current_mclk +ffffffff81cb3cc0 T rs780_dpm_force_performance_level +ffffffff81cb3ea0 t rs780_force_fbdiv +ffffffff81cb4000 T rv515_ring_start +ffffffff81cb4b30 T rv515_mc_wait_for_idle +ffffffff81cb4bc0 T rv515_vga_render_disable +ffffffff81cb4c10 T rv515_mc_rreg +ffffffff81cb4ca0 T rv515_mc_wreg +ffffffff81cb4d20 T rv515_debugfs +ffffffff81cb4d30 T rv515_mc_stop +ffffffff81cb52c0 T rv515_mc_resume +ffffffff81cb58c0 T rv515_clock_startup +ffffffff81cb5980 T rv515_resume +ffffffff81cb5bc0 t rv515_startup +ffffffff81cb60a0 T rv515_suspend +ffffffff81cb6100 T rv515_set_safe_registers +ffffffff81cb6140 T rv515_fini +ffffffff81cb61e0 T rv515_init +ffffffff81cb64d0 T atom_rv515_force_tv_scaler +ffffffff81cb9b70 T rv515_bandwidth_avivo_update +ffffffff81cb9d00 t rv515_crtc_bandwidth_compute +ffffffff81cba040 t rv515_compute_mode_priority +ffffffff81cba4f0 T rv515_bandwidth_update +ffffffff81cbb000 T rv6xx_dpm_enable +ffffffff81cbb7f0 t rv6xx_calculate_stepping_parameters +ffffffff81cbb9c0 t rv6xx_program_stepping_parameters_except_lowest_entry +ffffffff81cbbfb0 t rv6xx_program_stepping_parameters_lowest_entry +ffffffff81cbc090 T rv6xx_dpm_disable +ffffffff81cbc410 T rv6xx_dpm_set_power_state +ffffffff81cbce00 T rv6xx_setup_asic +ffffffff81cbcf40 T rv6xx_dpm_display_configuration_changed +ffffffff81cbcfc0 T rv6xx_dpm_init +ffffffff81cbd510 T rv6xx_dpm_print_power_state +ffffffff81cbd5c0 T rv6xx_dpm_debugfs_print_current_performance_level +ffffffff81cbd5f0 T rv6xx_dpm_get_current_sclk +ffffffff81cbd660 T rv6xx_dpm_get_current_mclk +ffffffff81cbd6d0 T rv6xx_dpm_fini +ffffffff81cbd760 T rv6xx_dpm_get_sclk +ffffffff81cbd7a0 T rv6xx_dpm_get_mclk +ffffffff81cbd7e0 T rv6xx_dpm_force_performance_level +ffffffff81cbd960 t rv6xx_generate_steps +ffffffff81cbdc70 t rv6xx_output_stepping +ffffffff81cbdd90 t rv6xx_program_mclk_stepping_entry +ffffffff81cbe000 t rv6xx_program_engine_spread_spectrum +ffffffff81cbe2e0 t rv6xx_step_sw_voltage +ffffffff81cbf000 T rv730_populate_sclk_value +ffffffff81cbf240 T rv730_populate_mclk_value +ffffffff81cbf460 T rv730_read_clock_registers +ffffffff81cbf580 T rv730_populate_smc_acpi_state +ffffffff81cbf730 T rv730_populate_smc_initial_state +ffffffff81cbf8e0 T rv730_program_memory_timing_parameters +ffffffff81cbfac0 T rv730_start_dpm +ffffffff81cbfb50 T rv730_stop_dpm +ffffffff81cbfc10 T rv730_program_dcodt +ffffffff81cbfce0 T rv730_get_odt_values +ffffffff81cc0000 T rv740_get_decoded_reference_divider +ffffffff81cc00a0 T rv740_get_dll_speed +ffffffff81cc01d0 T rv740_populate_sclk_value +ffffffff81cc03e0 T rv740_populate_mclk_value +ffffffff81cc0820 T rv740_read_clock_registers +ffffffff81cc0950 T rv740_populate_smc_acpi_state +ffffffff81cc0b80 T rv740_enable_mclk_spread_spectrum +ffffffff81cc0be0 T rv740_get_mclk_frequency_ratio +ffffffff81cc1000 T rv770_set_uvd_clocks +ffffffff81cc1570 T rv770_get_xclk +ffffffff81cc15d0 T rv770_page_flip +ffffffff81cc18e0 T rv770_page_flip_pending +ffffffff81cc1950 T rv770_get_temp +ffffffff81cc19b0 T rv770_pm_misc +ffffffff81cc1a80 T r700_cp_stop +ffffffff81cc1b00 T r700_cp_fini +ffffffff81cc1b80 T rv770_set_clk_bypass_mode +ffffffff81cc1ca0 T r700_vram_gtt_location +ffffffff81cc1e30 T rv770_resume +ffffffff81cc1ec0 t rv770_init_golden_registers +ffffffff81cc2050 t rv770_startup +ffffffff81cc4040 T rv770_suspend +ffffffff81cc4260 T rv770_init +ffffffff81cc4820 T rv770_fini +ffffffff81cc5000 T rv770_copy_dma +ffffffff81cc6000 T rv770_get_ps +ffffffff81cc6030 T rv770_get_pi +ffffffff81cc6060 T evergreen_get_pi +ffffffff81cc6090 T rv770_restore_cgcg +ffffffff81cc6100 T rv770_stop_dpm +ffffffff81cc61c0 T rv770_dpm_enabled +ffffffff81cc6200 T rv770_enable_thermal_protection +ffffffff81cc6260 T rv770_enable_acpi_pm +ffffffff81cc62b0 T rv770_get_seq_value +ffffffff81cc62e0 T rv770_write_smc_soft_register +ffffffff81cc6310 T rv770_populate_smc_t +ffffffff81cc64a0 T rv770_populate_smc_sp +ffffffff81cc6500 T rv770_map_clkf_to_ibias +ffffffff81cc6560 T rv770_populate_vddc_value +ffffffff81cc6600 T rv770_populate_mvdd_value +ffffffff81cc6650 T rv770_calculate_memory_refresh_rate +ffffffff81cc66c0 T rv770_enable_backbias +ffffffff81cc6720 T rv770_setup_bsp +ffffffff81cc6800 T rv770_program_git +ffffffff81cc6850 T rv770_program_tp +ffffffff81cc68d0 T rv770_program_tpp +ffffffff81cc6910 T rv770_program_sstp +ffffffff81cc6950 T rv770_program_engine_speed_parameters +ffffffff81cc69a0 T rv770_program_vc +ffffffff81cc69e0 T rv770_clear_vc +ffffffff81cc6a20 T rv770_upload_firmware +ffffffff81cc6a60 T rv770_populate_initial_mvdd_value +ffffffff81cc6ab0 T rv770_get_memory_module_index +ffffffff81cc6af0 T rv770_enable_voltage_control +ffffffff81cc6b50 T rv770_halt_smc +ffffffff81cc6bb0 T rv770_resume_smc +ffffffff81cc6c00 T rv770_set_sw_state +ffffffff81cc6c60 T rv770_set_boot_state +ffffffff81cc6cb0 T rv770_set_uvd_clock_before_set_eng_clock +ffffffff81cc6d10 T rv770_set_uvd_clock_after_set_eng_clock +ffffffff81cc6d80 T rv770_restrict_performance_levels_before_switch +ffffffff81cc6de0 T rv770_dpm_force_performance_level +ffffffff81cc6ea0 T r7xx_start_smc +ffffffff81cc6ec0 T r7xx_stop_smc +ffffffff81cc6ee0 T rv770_read_voltage_smio_registers +ffffffff81cc6f20 T rv770_reset_smio_status +ffffffff81cc6fd0 T rv770_get_memory_type +ffffffff81cc7020 T rv770_get_pcie_gen2_status +ffffffff81cc7090 T rv770_get_max_vddc +ffffffff81cc70f0 T rv770_program_response_times +ffffffff81cc7230 T rv770_enable_auto_throttle_source +ffffffff81cc73a0 T rv770_dpm_enable +ffffffff81cc8420 T rv770_dpm_late_enable +ffffffff81cc8550 T rv770_dpm_disable +ffffffff81cc88b0 T rv770_dpm_set_power_state +ffffffff81cc8ea0 T rv770_dpm_setup_asic +ffffffff81cc9200 T rv770_dpm_display_configuration_changed +ffffffff81cc9280 T rv7xx_parse_power_table +ffffffff81cc97c0 T rv770_get_engine_memory_ss +ffffffff81cc9850 T rv770_dpm_init +ffffffff81cc9a80 T rv770_dpm_print_power_state +ffffffff81cc9ba0 T rv770_dpm_debugfs_print_current_performance_level +ffffffff81cc9bd0 T rv770_dpm_get_current_sclk +ffffffff81cc9c30 T rv770_dpm_get_current_mclk +ffffffff81cc9c90 T rv770_dpm_fini +ffffffff81cc9d20 T rv770_dpm_get_sclk +ffffffff81cc9d60 T rv770_dpm_get_mclk +ffffffff81cc9da0 T rv770_dpm_vblank_too_short +ffffffff81cc9e00 t rv770_convert_power_level_to_smc +ffffffff81ccb000 T rv770_copy_bytes_to_smc +ffffffff81ccb230 T rv770_start_smc +ffffffff81ccb280 T rv770_reset_smc +ffffffff81ccb2d0 T rv770_stop_smc_clock +ffffffff81ccb320 T rv770_start_smc_clock +ffffffff81ccb370 T rv770_is_smc_running +ffffffff81ccb3b0 T rv770_send_msg_to_smc +ffffffff81ccb480 T rv770_wait_for_smc_inactive +ffffffff81ccb510 T rv770_load_smc_ucode +ffffffff81ccb690 T rv770_read_smc_sram_dword +ffffffff81ccb740 T rv770_write_smc_sram_dword +ffffffff81ccc000 T si_get_allowed_info_register +ffffffff81ccc090 T si_get_xclk +ffffffff81ccc100 T si_get_temp +ffffffff81ccc140 T si_mc_load_microcode +ffffffff81ccc410 T dce6_bandwidth_update +ffffffff81ccc810 t dce6_program_watermarks +ffffffff81ccd2c0 T si_fence_ring_emit +ffffffff81ccd730 T si_ring_ib_execute +ffffffff81ccdf00 T si_gpu_check_soft_reset +ffffffff81cce090 T si_asic_reset +ffffffff81cce4a0 t si_gpu_pci_config_reset +ffffffff81cce850 T si_gfx_is_lockup +ffffffff81cce8b0 T si_vram_gtt_location +ffffffff81cce950 T si_pcie_gart_tlb_flush +ffffffff81cce9a0 T si_ib_parse +ffffffff81ccf050 T si_vm_init +ffffffff81ccf090 T si_vm_fini +ffffffff81ccf0c0 T si_vm_flush +ffffffff81ccf7a0 T si_init_uvd_internal_cg +ffffffff81ccf7e0 T si_get_csb_size +ffffffff81ccf870 T si_get_csb_buffer +ffffffff81ccfa00 T si_rlc_reset +ffffffff81ccfa70 T si_irq_set +ffffffff81ccff70 t si_disable_interrupt_state +ffffffff81cd01f0 T si_irq_process +ffffffff81cd13f0 t si_irq_ack +ffffffff81cd19f0 T si_resume +ffffffff81cd1a80 t si_init_golden_registers +ffffffff81cd1c40 t si_startup +ffffffff81cd6470 T si_suspend +ffffffff81cd67f0 T si_init +ffffffff81cd7cc0 t si_cp_fini +ffffffff81cd7db0 t si_pcie_gart_fini +ffffffff81cd7eb0 T si_fini +ffffffff81cd8150 T si_get_gpu_clock_counter +ffffffff81cd8210 T si_set_uvd_clocks +ffffffff81cd8780 T si_set_vce_clocks +ffffffff81cd8cc0 t si_vce_send_vcepll_ctlreq +ffffffff81cd8f00 t dce6_latency_watermark +ffffffff81cd9130 t si_rlc_stop +ffffffff81cd92e0 t si_vm_reg_valid +ffffffff81cd9440 t si_vm_packet3_cp_dma_check +ffffffff81cd95c0 t si_update_cg +ffffffff81cd9b10 t si_enable_mgcg +ffffffff81cd9f30 t si_enable_cgcg +ffffffff81cdb000 T si_dma_is_lockup +ffffffff81cdb080 T si_dma_vm_copy_pages +ffffffff81cdb160 T si_dma_vm_write_pages +ffffffff81cdb2c0 T si_dma_vm_set_pages +ffffffff81cdb420 T si_dma_vm_flush +ffffffff81cdb8b0 T si_copy_dma +ffffffff81cdc000 T si_dpm_force_performance_level +ffffffff81cdc160 T si_get_ddr3_mclk_frequency_ratio +ffffffff81cdc1b0 T si_get_mclk_frequency_ratio +ffffffff81cdc230 T si_trim_voltage_table_to_fit_state_table +ffffffff81cdc330 T si_dpm_setup_asic +ffffffff81cdc4f0 T si_fan_ctrl_get_fan_speed_percent +ffffffff81cdc580 T si_fan_ctrl_set_fan_speed_percent +ffffffff81cdc630 T si_fan_ctrl_set_mode +ffffffff81cdc870 T si_fan_ctrl_get_mode +ffffffff81cdc8c0 T si_dpm_enable +ffffffff81ce1bc0 t si_populate_smc_tdp_limits +ffffffff81ce1dd0 T si_dpm_late_enable +ffffffff81ce1f20 T si_dpm_disable +ffffffff81ce2290 T si_dpm_pre_set_power_state +ffffffff81ce2e90 T si_dpm_set_power_state +ffffffff81ce4410 T si_dpm_post_set_power_state +ffffffff81ce4440 T si_dpm_display_configuration_changed +ffffffff81ce4520 T si_dpm_init +ffffffff81ce5fd0 T si_dpm_fini +ffffffff81ce6080 T si_dpm_debugfs_print_current_performance_level +ffffffff81ce60c0 T si_dpm_get_current_sclk +ffffffff81ce6130 T si_dpm_get_current_mclk +ffffffff81ce61a0 t si_get_std_voltage_value +ffffffff81ce62d0 t si_convert_power_level_to_smc +ffffffff81ce6b70 t si_calculate_sclk_params +ffffffff81ce6d90 t si_convert_mc_reg_table_to_smc +ffffffff81ce6ef0 t si_program_cac_config_registers +ffffffff81ce8000 T si_copy_bytes_to_smc +ffffffff81ce8250 T si_start_smc +ffffffff81ce8280 T si_reset_smc +ffffffff81ce82c0 T si_program_jump_on_start +ffffffff81ce82f0 T si_stop_smc_clock +ffffffff81ce8320 T si_start_smc_clock +ffffffff81ce8350 T si_is_smc_running +ffffffff81ce83b0 T si_send_msg_to_smc +ffffffff81ce8480 T si_wait_for_smc_inactive +ffffffff81ce8520 T si_load_smc_ucode +ffffffff81ce86c0 T si_read_smc_sram_dword +ffffffff81ce8790 T si_write_smc_sram_dword +ffffffff81ce9000 T sumo_get_pi +ffffffff81ce9030 T sumo_gfx_clockgating_initialize +ffffffff81ce9110 T sumo_program_vc +ffffffff81ce9150 T sumo_clear_vc +ffffffff81ce9190 T sumo_program_sstp +ffffffff81ce9210 T sumo_take_smu_control +ffffffff81ce9240 T sumo_get_sleep_divider_from_id +ffffffff81ce9270 T sumo_get_sleep_divider_id_from_clock +ffffffff81ce9320 T sumo_dpm_enable +ffffffff81ce99c0 T sumo_dpm_late_enable +ffffffff81ce9f80 T sumo_dpm_disable +ffffffff81cea2d0 T sumo_dpm_pre_set_power_state +ffffffff81cea780 T sumo_dpm_set_power_state +ffffffff81ceb2c0 T sumo_dpm_post_set_power_state +ffffffff81ceb360 T sumo_dpm_setup_asic +ffffffff81ceb460 T sumo_dpm_display_configuration_changed +ffffffff81ceb490 T sumo_convert_vid2_to_vid7 +ffffffff81ceb4f0 T sumo_construct_sclk_voltage_mapping_table +ffffffff81ceb5b0 T sumo_construct_vid_mapping_table +ffffffff81ceb730 T sumo_dpm_init +ffffffff81cebff0 T sumo_dpm_print_power_state +ffffffff81cec110 T sumo_dpm_debugfs_print_current_performance_level +ffffffff81cec140 T sumo_dpm_get_current_sclk +ffffffff81cec1b0 T sumo_dpm_get_current_mclk +ffffffff81cec1e0 T sumo_dpm_get_current_vddc +ffffffff81cec2b0 T sumo_dpm_fini +ffffffff81cec340 T sumo_dpm_get_sclk +ffffffff81cec390 T sumo_dpm_get_mclk +ffffffff81cec3c0 T sumo_dpm_force_performance_level +ffffffff81cec7e0 t sumo_power_level_enable +ffffffff81ceca10 t sumo_program_power_level +ffffffff81ced000 T sumo_initialize_m3_arb +ffffffff81ced2b0 T sumo_smu_notify_alt_vddnb_change +ffffffff81ced340 t sumo_send_msg_to_smu +ffffffff81ced4e0 T sumo_smu_pg_init +ffffffff81ced500 T sumo_enable_boost_timer +ffffffff81ced630 T sumo_set_tdp_limit +ffffffff81ced6b0 T sumo_boost_state_enable +ffffffff81ced6f0 T sumo_get_running_fw_version +ffffffff81cee000 T trinity_dpm_enable_bapm +ffffffff81cee070 T trinity_dpm_enable +ffffffff81cee510 T trinity_dpm_late_enable +ffffffff81ceea60 T trinity_dpm_disable +ffffffff81ceee70 T trinity_dpm_force_performance_level +ffffffff81ceef20 T trinity_dpm_pre_set_power_state +ffffffff81cef4e0 T trinity_dpm_set_power_state +ffffffff81cefa70 T trinity_dpm_post_set_power_state +ffffffff81cefb10 T trinity_dpm_setup_asic +ffffffff81cefb70 T trinity_dpm_display_configuration_changed +ffffffff81cefc00 T trinity_dpm_init +ffffffff81cf04f0 T trinity_dpm_print_power_state +ffffffff81cf0600 T trinity_dpm_debugfs_print_current_performance_level +ffffffff81cf0690 T trinity_dpm_get_current_sclk +ffffffff81cf06f0 T trinity_dpm_get_current_mclk +ffffffff81cf0720 T trinity_dpm_fini +ffffffff81cf07c0 T trinity_dpm_get_sclk +ffffffff81cf0810 T trinity_dpm_get_mclk +ffffffff81cf0840 t trinity_program_power_level +ffffffff81cf1000 T trinity_dpm_bapm_enable +ffffffff81cf1140 T trinity_dpm_config +ffffffff81cf1220 T trinity_dpm_force_state +ffffffff81cf1300 T trinity_dpm_n_levels_disabled +ffffffff81cf13e0 T trinity_uvd_dpm_config +ffffffff81cf14b0 T trinity_dpm_no_forced_level +ffffffff81cf1580 T trinity_dce_enable_voltage_adjustment +ffffffff81cf16c0 T trinity_gfx_dynamic_mgpg_config +ffffffff81cf1790 T trinity_acquire_mutex +ffffffff81cf1820 T trinity_release_mutex +ffffffff81cf2000 T uvd_v1_0_get_rptr +ffffffff81cf2040 T uvd_v1_0_get_wptr +ffffffff81cf2080 T uvd_v1_0_set_wptr +ffffffff81cf20c0 T uvd_v1_0_fence_emit +ffffffff81cf24b0 T uvd_v1_0_resume +ffffffff81cf2600 T uvd_v1_0_init +ffffffff81cf2b90 T uvd_v1_0_start +ffffffff81cf3310 T uvd_v1_0_fini +ffffffff81cf3480 T uvd_v1_0_stop +ffffffff81cf35e0 T uvd_v1_0_ring_test +ffffffff81cf37b0 T uvd_v1_0_semaphore_emit +ffffffff81cf37e0 T uvd_v1_0_ib_execute +ffffffff81cf3970 T uvd_v1_0_ib_test +ffffffff81cf4000 T uvd_v2_2_fence_emit +ffffffff81cf4470 T uvd_v2_2_semaphore_emit +ffffffff81cf4670 T uvd_v2_2_resume +ffffffff81cf5000 T uvd_v3_1_semaphore_emit +ffffffff81cf6000 T uvd_v4_2_resume +ffffffff81cf7000 T vce_v1_0_get_rptr +ffffffff81cf7090 T vce_v1_0_get_wptr +ffffffff81cf7120 T vce_v1_0_set_wptr +ffffffff81cf71b0 T vce_v1_0_enable_mgcg +ffffffff81cf7460 T vce_v1_0_load_fw +ffffffff81cf7620 T vce_v1_0_bo_size +ffffffff81cf7690 T vce_v1_0_resume +ffffffff81cf8000 T vce_v1_0_start +ffffffff81cf87c0 T vce_v1_0_init +ffffffff81cf9000 T vce_v2_0_enable_mgcg +ffffffff81cf9070 t vce_v2_0_set_dyn_cg +ffffffff81cf9260 T vce_v2_0_bo_size +ffffffff81cf92d0 T vce_v2_0_resume +ffffffff81cfa000 T aldebaran_reset_init +ffffffff81cfa0c0 t aldebaran_async_reset +ffffffff81cfa120 t aldebaran_get_reset_handler +ffffffff81cfa1d0 T aldebaran_reset_fini +ffffffff81cfa220 t aldebaran_mode2_prepare_hwcontext +ffffffff81cfa340 t aldebaran_mode2_perform_reset +ffffffff81cfa510 t aldebaran_mode2_restore_hwcontext +ffffffff81cfa9f0 t aldebaran_mode2_reset +ffffffff81cfb000 T aldebaran_reg_base_init +ffffffff81cfc000 T amdgpu_acpi_is_pcie_performance_request_supported +ffffffff81cfc040 T amdgpu_acpi_is_power_shift_control_supported +ffffffff81cfc070 T amdgpu_acpi_pcie_notify_device_ready +ffffffff81cfc180 t amdgpu_atcs_call +ffffffff81cfc270 T amdgpu_acpi_pcie_performance_request +ffffffff81cfc4c0 T amdgpu_acpi_power_shift_control +ffffffff81cfc560 T amdgpu_acpi_smart_shift_update +ffffffff81cfc6b0 T amdgpu_acpi_init +ffffffff81cfc770 t amdgpu_acpi_event +ffffffff81cfcab0 T amdgpu_acpi_get_backlight_caps +ffffffff81cfcaf0 T amdgpu_acpi_fini +ffffffff81cfcb10 T amdgpu_acpi_detect +ffffffff81cfe000 T amdgpu_afmt_acr +ffffffff81cff000 T amdgpu_amdkfd_init +ffffffff81cff040 T amdgpu_amdkfd_fini +ffffffff81cff060 T amdgpu_amdkfd_device_probe +ffffffff81cff090 T amdgpu_amdkfd_device_init +ffffffff81cff260 t amdgpu_amdkfd_reset_work +ffffffff81cff2e0 T amdgpu_amdkfd_device_fini_sw +ffffffff81cff330 T amdgpu_amdkfd_interrupt +ffffffff81cff360 T amdgpu_amdkfd_suspend +ffffffff81cff390 T amdgpu_amdkfd_resume_iommu +ffffffff81cff3c0 T amdgpu_amdkfd_resume +ffffffff81cff3f0 T amdgpu_amdkfd_pre_reset +ffffffff81cff420 T amdgpu_amdkfd_post_reset +ffffffff81cff450 T amdgpu_amdkfd_gpu_reset +ffffffff81cff4b0 T amdgpu_amdkfd_alloc_gtt_mem +ffffffff81cff760 t amdgpu_bo_reserve +ffffffff81cff8c0 t amdgpu_bo_unreserve +ffffffff81cff9a0 T amdgpu_amdkfd_free_gtt_mem +ffffffff81cffa10 T amdgpu_amdkfd_alloc_gws +ffffffff81cffaf0 T amdgpu_amdkfd_free_gws +ffffffff81cffb30 T amdgpu_amdkfd_get_fw_version +ffffffff81cffbe0 T amdgpu_amdkfd_get_local_mem_info +ffffffff81cffcb0 T amdgpu_amdkfd_get_gpu_clock_counter +ffffffff81cffcf0 T amdgpu_amdkfd_get_max_engine_clock_in_mhz +ffffffff81cffd70 T amdgpu_amdkfd_get_cu_info +ffffffff81cffeb0 T amdgpu_amdkfd_get_dmabuf_info +ffffffff81cffff0 T amdgpu_amdkfd_get_xgmi_hops_count +ffffffff81d00060 T amdgpu_amdkfd_get_xgmi_bandwidth_mbytes +ffffffff81d000f0 T amdgpu_amdkfd_get_pcie_bandwidth_mbytes +ffffffff81d00250 T amdgpu_amdkfd_submit_ib +ffffffff81d003b0 T amdgpu_amdkfd_set_compute_idle +ffffffff81d00400 T amdgpu_amdkfd_is_kfd_vmid +ffffffff81d00440 T amdgpu_amdkfd_flush_gpu_tlb_vmid +ffffffff81d004e0 T amdgpu_amdkfd_flush_gpu_tlb_pasid +ffffffff81d00510 T amdgpu_amdkfd_have_atomics_support +ffffffff81d00540 T amdgpu_amdkfd_ras_poison_consumption_handler +ffffffff81d005a0 T amdgpu_amdkfd_ras_query_utcl2_poison_status +ffffffff81d01000 T amdgpu_atom_execute_table +ffffffff81d010a0 t amdgpu_atom_execute_table_locked +ffffffff81d013f0 T amdgpu_atom_parse +ffffffff81d01940 T amdgpu_atom_destroy +ffffffff81d01980 T amdgpu_atom_asic_init +ffffffff81d01a90 T amdgpu_atom_parse_data_header +ffffffff81d01b20 T amdgpu_atom_parse_cmd_header +ffffffff81d01b90 t atom_op_move +ffffffff81d01d70 t atom_op_and +ffffffff81d01f50 t atom_op_or +ffffffff81d02130 t atom_op_shift_left +ffffffff81d02320 t atom_op_shift_right +ffffffff81d02510 t atom_op_mul +ffffffff81d02660 t atom_op_div +ffffffff81d027d0 t atom_op_add +ffffffff81d029b0 t atom_op_sub +ffffffff81d02b90 t atom_op_setport +ffffffff81d02d10 t atom_op_setregblock +ffffffff81d02dd0 t atom_op_setfbbase +ffffffff81d02ea0 t atom_op_compare +ffffffff81d03090 t atom_op_switch +ffffffff81d032e0 t atom_op_jump +ffffffff81d03560 t atom_op_test +ffffffff81d03720 t atom_op_delay +ffffffff81d03800 t atom_op_calltable +ffffffff81d03940 t atom_op_repeat +ffffffff81d03970 t atom_op_clear +ffffffff81d03a70 t atom_op_nop +ffffffff81d03aa0 t atom_op_eot +ffffffff81d03ad0 t atom_op_mask +ffffffff81d03da0 t atom_op_postcard +ffffffff81d03e50 t atom_op_beep +ffffffff81d03e70 t atom_op_savereg +ffffffff81d03ea0 t atom_op_restorereg +ffffffff81d03ed0 t atom_op_setdatablock +ffffffff81d04010 t atom_op_xor +ffffffff81d041f0 t atom_op_shl +ffffffff81d04400 t atom_op_shr +ffffffff81d04610 t atom_op_debug +ffffffff81d046c0 t atom_op_processds +ffffffff81d04780 t atom_op_mul32 +ffffffff81d048e0 t atom_op_div32 +ffffffff81d04a70 t atom_put_dst +ffffffff81d04f40 t atom_get_src_int +ffffffff81d055f0 t atom_iio_execute +ffffffff81d06000 T amdgpu_atombios_lookup_i2c_gpio +ffffffff81d06260 T amdgpu_atombios_i2c_init +ffffffff81d06530 T amdgpu_atombios_lookup_gpio +ffffffff81d06630 T amdgpu_atombios_has_dce_engine_info +ffffffff81d066b0 T amdgpu_atombios_get_connector_info_from_object_table +ffffffff81d06f00 T amdgpu_atombios_get_clock_info +ffffffff81d07240 T amdgpu_atombios_get_gfx_info +ffffffff81d07300 T amdgpu_atombios_get_vram_width +ffffffff81d07380 T amdgpu_atombios_get_asic_ss_info +ffffffff81d076f0 T amdgpu_atombios_get_clock_dividers +ffffffff81d07910 T amdgpu_atombios_has_gpu_virtualization_table +ffffffff81d07960 T amdgpu_atombios_scratch_regs_lock +ffffffff81d079c0 T amdgpu_atombios_scratch_regs_engine_hung +ffffffff81d07a10 T amdgpu_atombios_scratch_regs_set_backlight_level +ffffffff81d07a60 T amdgpu_atombios_scratch_need_asic_init +ffffffff81d07ab0 T amdgpu_atombios_copy_swap +ffffffff81d07ac0 T amdgpu_atombios_fini +ffffffff81d07b60 T amdgpu_atombios_init +ffffffff81d07e00 t cail_reg_read +ffffffff81d07e20 t cail_reg_write +ffffffff81d07e40 t cail_mc_read +ffffffff81d07e70 t cail_mc_write +ffffffff81d07ea0 t cail_pll_read +ffffffff81d07ed0 t cail_pll_write +ffffffff81d07f00 T amdgpu_atombios_get_data_table +ffffffff81d08000 T amdgpu_atombios_crtc_overscan_setup +ffffffff81d08150 T amdgpu_atombios_crtc_scaler_setup +ffffffff81d081d0 T amdgpu_atombios_crtc_lock +ffffffff81d08230 T amdgpu_atombios_crtc_enable +ffffffff81d08290 T amdgpu_atombios_crtc_blank +ffffffff81d082f0 T amdgpu_atombios_crtc_powergate +ffffffff81d08360 T amdgpu_atombios_crtc_powergate_init +ffffffff81d083c0 T amdgpu_atombios_crtc_set_dtd_timing +ffffffff81d084d0 T amdgpu_atombios_crtc_set_disp_eng_pll +ffffffff81d085c0 T amdgpu_atombios_crtc_set_dce_clock +ffffffff81d086a0 T amdgpu_atombios_crtc_program_pll +ffffffff81d089b0 T amdgpu_atombios_crtc_prepare_pll +ffffffff81d08eb0 T amdgpu_atombios_crtc_set_pll +ffffffff81d0a000 T amdgpu_atombios_dp_aux_init +ffffffff81d0a090 t amdgpu_atombios_dp_aux_transfer +ffffffff81d0a200 T amdgpu_atombios_dp_get_sinktype +ffffffff81d0a260 T amdgpu_atombios_dp_get_dpcd +ffffffff81d0a410 T amdgpu_atombios_dp_get_panel_mode +ffffffff81d0a500 T amdgpu_atombios_dp_set_link_config +ffffffff81d0a580 t amdgpu_atombios_dp_get_dp_link_config +ffffffff81d0a700 T amdgpu_atombios_dp_mode_valid_helper +ffffffff81d0a780 T amdgpu_atombios_dp_needs_link_train +ffffffff81d0a7f0 T amdgpu_atombios_dp_set_rx_power_state +ffffffff81d0a870 T amdgpu_atombios_dp_link_train +ffffffff81d0adc0 t amdgpu_atombios_dp_process_aux_ch +ffffffff81d0af30 t amdgpu_atombios_dp_get_adjust_train +ffffffff81d0c000 T amdgpu_atombios_encoder_get_backlight_level_from_reg +ffffffff81d0c040 T amdgpu_atombios_encoder_set_backlight_level_to_reg +ffffffff81d0c090 T amdgpu_atombios_encoder_get_backlight_level +ffffffff81d0c0f0 T amdgpu_atombios_encoder_set_backlight_level +ffffffff81d0c200 T amdgpu_atombios_encoder_setup_dig_transmitter +ffffffff81d0cbd0 T amdgpu_atombios_encoder_init_backlight +ffffffff81d0cd60 t amdgpu_atombios_encoder_get_backlight_brightness +ffffffff81d0cdb0 T amdgpu_atombios_encoder_fini_backlight +ffffffff81d0ce40 T amdgpu_atombios_encoder_is_digital +ffffffff81d0ce90 T amdgpu_atombios_encoder_mode_fixup +ffffffff81d0cf70 T amdgpu_atombios_encoder_get_encoder_mode +ffffffff81d0d110 T amdgpu_atombios_encoder_setup_dig_encoder +ffffffff81d0d5d0 T amdgpu_atombios_encoder_set_edp_panel_power +ffffffff81d0d6d0 T amdgpu_atombios_encoder_dpms +ffffffff81d0d840 t amdgpu_atombios_encoder_setup_dig +ffffffff81d0dbb0 t amdgpu_atombios_encoder_setup_dvo +ffffffff81d0dd50 T amdgpu_atombios_encoder_set_crtc_source +ffffffff81d0e130 T amdgpu_atombios_encoder_init_dig +ffffffff81d0e1f0 t amdgpu_atombios_encoder_setup_external_encoder +ffffffff81d0e450 T amdgpu_atombios_encoder_dac_detect +ffffffff81d0e630 T amdgpu_atombios_encoder_dig_detect +ffffffff81d0e730 T amdgpu_atombios_encoder_setup_ext_encoder_ddc +ffffffff81d0e780 T amdgpu_atombios_encoder_set_bios_scratch_regs +ffffffff81d0ed20 T amdgpu_atombios_encoder_get_lcd_info +ffffffff81d0f080 T amdgpu_atombios_encoder_get_dig_info +ffffffff81d0f0f0 t amdgpu_atombios_encoder_update_backlight_status +ffffffff81d10000 T amdgpu_atombios_i2c_xfer +ffffffff81d103a0 T amdgpu_atombios_i2c_func +ffffffff81d103d0 T amdgpu_atombios_i2c_channel_trans +ffffffff81d11000 T amdgpu_atomfirmware_query_firmware_capability +ffffffff81d11090 T amdgpu_atomfirmware_gpu_virtualization_supported +ffffffff81d110c0 T amdgpu_atomfirmware_scratch_regs_init +ffffffff81d11130 T amdgpu_atomfirmware_allocate_fb_scratch +ffffffff81d11260 T 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amdgpu_link_encoder_connector +ffffffff81d350e0 T amdgpu_encoder_set_active_device +ffffffff81d351a0 T amdgpu_get_connector_for_encoder +ffffffff81d35220 T amdgpu_get_connector_for_encoder_init +ffffffff81d352a0 T amdgpu_get_external_encoder +ffffffff81d35320 T amdgpu_encoder_get_dp_bridge_encoder_id +ffffffff81d353b0 T amdgpu_panel_mode_fixup +ffffffff81d35530 T amdgpu_dig_monitor_is_duallink +ffffffff81d36000 T amdgpu_show_fdinfo +ffffffff81d37000 T amdgpu_fence_slab_init +ffffffff81d37060 T amdgpu_fence_slab_fini +ffffffff81d37080 T amdgpu_fence_emit +ffffffff81d37240 T amdgpu_fence_emit_polling +ffffffff81d37330 T amdgpu_fence_wait_polling +ffffffff81d373c0 T amdgpu_fence_process +ffffffff81d374f0 T amdgpu_fence_wait_empty +ffffffff81d37570 T amdgpu_fence_count_emitted +ffffffff81d375a0 T amdgpu_fence_driver_start_ring +ffffffff81d37670 T amdgpu_fence_driver_init_ring +ffffffff81d37760 t amdgpu_fence_fallback +ffffffff81d377c0 T amdgpu_fence_driver_sw_init +ffffffff81d377f0 T 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amdgpu_gfx_disable_kcq +ffffffff81d3e160 T amdgpu_queue_mask_bit_to_set_resource_bit +ffffffff81d3e1a0 T amdgpu_gfx_enable_kcq +ffffffff81d3e3e0 T amdgpu_gfx_off_ctrl +ffffffff81d3e580 T amdgpu_set_gfx_off_residency +ffffffff81d3e5e0 T amdgpu_get_gfx_off_residency +ffffffff81d3e640 T amdgpu_get_gfx_off_entrycount +ffffffff81d3e6a0 T amdgpu_get_gfx_off_status +ffffffff81d3e700 T amdgpu_gfx_ras_late_init +ffffffff81d3e7c0 T amdgpu_gfx_process_ras_data_cb +ffffffff81d3e840 T amdgpu_gfx_cp_ecc_error_irq +ffffffff81d3e900 T amdgpu_kiq_rreg +ffffffff81d3eb80 T amdgpu_kiq_wreg +ffffffff81d3edb0 T amdgpu_gfx_get_num_kcq +ffffffff81d3ee30 T amdgpu_gfx_cp_init_microcode +ffffffff81d40000 T amdgpu_gmc_pdb0_alloc +ffffffff81d40280 t amdgpu_bo_unreserve +ffffffff81d40360 T amdgpu_gmc_get_pde_for_bo +ffffffff81d40400 T amdgpu_gmc_pd_addr +ffffffff81d404e0 T amdgpu_gmc_set_pte_pde +ffffffff81d40530 T amdgpu_gmc_agp_addr +ffffffff81d405a0 T amdgpu_gmc_vram_location +ffffffff81d40610 T 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t dce_v11_0_ext_disable +ffffffff81da0770 t dce_v11_0_set_crtc_irq_state +ffffffff81da0850 t dce_v11_0_crtc_irq +ffffffff81da0a70 t dce_v11_0_set_crtc_vblank_interrupt_state +ffffffff81da0b40 t dce_v11_0_set_crtc_vline_interrupt_state +ffffffff81da0c10 t dce_v11_0_set_pageflip_irq_state +ffffffff81da0cc0 t dce_v11_0_pageflip_irq +ffffffff81da0e20 t dce_v11_0_set_hpd_irq_state +ffffffff81da0ee0 t dce_v11_0_hpd_irq +ffffffff81da1000 t dce_v11_0_crtc_cursor_set2 +ffffffff81da1370 t dce_v11_0_crtc_cursor_move +ffffffff81da1440 t dce_v11_0_crtc_gamma_set +ffffffff81da1480 t dce_v11_0_crtc_destroy +ffffffff81da14b0 t amdgpu_bo_reserve +ffffffff81da16c0 t amdgpu_bo_unreserve +ffffffff81da17a0 t dce_v11_0_cursor_move_locked +ffffffff81da18f0 t dce_v11_0_crtc_load_lut +ffffffff81da1c60 t dce_v11_0_crtc_dpms +ffffffff81da1e30 t dce_v11_0_crtc_prepare +ffffffff81da1e70 t dce_v11_0_crtc_commit +ffffffff81da1ea0 t dce_v11_0_crtc_mode_fixup +ffffffff81da2110 t dce_v11_0_crtc_mode_set +ffffffff81da2370 t dce_v11_0_crtc_set_base +ffffffff81da2390 t dce_v11_0_crtc_set_base_atomic +ffffffff81da23b0 t dce_v11_0_crtc_disable +ffffffff81da2550 t dce_v11_0_crtc_do_set_base +ffffffff81da3000 t df_v1_7_sw_init +ffffffff81da3040 t df_v1_7_sw_fini +ffffffff81da3070 t df_v1_7_enable_broadcast_mode +ffffffff81da3190 t df_v1_7_get_fb_channel_number +ffffffff81da3210 t df_v1_7_get_hbm_channel_number +ffffffff81da3260 t df_v1_7_update_medium_grain_clock_gating +ffffffff81da33d0 t df_v1_7_get_clockgating_state +ffffffff81da3460 t df_v1_7_enable_ecc_force_par_wr_rmw +ffffffff81da4000 t df_v3_6_sw_init +ffffffff81da4140 t df_v3_6_sw_fini +ffffffff81da4170 t df_v3_6_enable_broadcast_mode +ffffffff81da4290 t df_v3_6_get_fb_channel_number +ffffffff81da4360 t df_v3_6_get_hbm_channel_number +ffffffff81da43b0 t df_v3_6_update_medium_grain_clock_gating +ffffffff81da4550 t df_v3_6_get_clockgating_state +ffffffff81da45e0 t df_v3_6_pmc_start +ffffffff81da4960 t df_v3_6_pmc_stop +ffffffff81da4bf0 t df_v3_6_pmc_get_count +ffffffff81da4d70 t df_v3_6_get_fica +ffffffff81da4e70 t df_v3_6_set_fica +ffffffff81da4f40 t df_v3_6_query_ras_poison_mode +ffffffff81da50b0 t df_v3_6_perfmon_arm_with_status +ffffffff81da6000 T dimgrey_cavefish_reg_base_init +ffffffff81da7000 T emu_soc_asic_init +ffffffff81da8000 t gfx_v10_0_early_init +ffffffff81da8420 t gfx_v10_0_late_init +ffffffff81da8490 t gfx_v10_0_sw_init +ffffffff81da9830 t gfx_v10_0_sw_fini +ffffffff81da9b60 t gfx_v10_0_hw_init +ffffffff81dac710 t gfx_v10_0_hw_fini +ffffffff81dac9f0 t gfx_v10_0_suspend +ffffffff81daca30 t gfx_v10_0_resume +ffffffff81daca40 t gfx_v10_0_is_idle +ffffffff81dacac0 t gfx_v10_0_wait_for_idle +ffffffff81dacba0 t gfx_v10_0_soft_reset +ffffffff81dacef0 t gfx_v10_0_set_clockgating_state +ffffffff81dad190 t gfx_v10_0_set_powergating_state +ffffffff81dad3b0 t gfx_v10_0_get_clockgating_state +ffffffff81dad4c0 t gfx10_kiq_set_resources +ffffffff81dad7f0 t gfx10_kiq_map_queues +ffffffff81dadb80 t gfx10_kiq_unmap_queues +ffffffff81dadf80 t gfx10_kiq_query_status +ffffffff81dae280 t gfx10_kiq_invalidate_tlbs +ffffffff81dae3a0 t gfx_v10_0_ring_get_rptr_compute +ffffffff81dae3d0 t gfx_v10_0_ring_get_wptr_compute +ffffffff81dae430 t gfx_v10_0_ring_set_wptr_compute +ffffffff81dae570 t gfx_v10_0_ring_emit_ib_compute +ffffffff81dae8c0 t gfx_v10_0_ring_emit_fence_kiq +ffffffff81daecf0 t gfx_v10_0_ring_test_ring +ffffffff81daef60 t gfx_v10_0_ring_test_ib +ffffffff81daf200 t gfx_v10_0_ring_emit_rreg +ffffffff81daf490 t gfx_v10_0_ring_emit_wreg +ffffffff81daf6c0 t gfx_v10_0_ring_emit_reg_wait +ffffffff81daf710 t gfx_v10_0_ring_emit_reg_write_reg_wait +ffffffff81daf7a0 t gfx_v10_0_wait_reg_mem +ffffffff81dafad0 t gfx_v10_0_ring_get_rptr_gfx +ffffffff81dafb00 t gfx_v10_0_ring_get_wptr_gfx +ffffffff81dafc10 t gfx_v10_0_ring_set_wptr_gfx +ffffffff81dafe20 t gfx_v10_0_ring_emit_ib_gfx +ffffffff81db04d0 t gfx_v10_0_ring_emit_fence +ffffffff81db08a0 t gfx_v10_0_ring_emit_pipeline_sync +ffffffff81db0900 t gfx_v10_0_ring_emit_vm_flush +ffffffff81db0ad0 t gfx_v10_0_ring_emit_hdp_flush +ffffffff81db0ba0 t gfx_v10_0_ring_emit_gds_switch +ffffffff81db0c80 t gfx_v10_0_ring_emit_init_cond_exec +ffffffff81db0eb0 t gfx_v10_0_ring_emit_patch_cond_exec +ffffffff81db0f70 t gfx_v10_0_ring_emit_sb +ffffffff81db1050 t gfx_v10_0_ring_emit_cntxcntl +ffffffff81db1530 t gfx_v10_0_ring_emit_frame_cntl +ffffffff81db1640 t gfx_v10_0_ring_soft_recovery +ffffffff81db16b0 t gfx_v10_0_ring_preempt_ib +ffffffff81db1820 t gfx_v10_0_emit_mem_sync +ffffffff81db1b60 t gfx_v10_0_write_data_to_reg +ffffffff81db1d70 t gfx_v10_0_set_eop_interrupt_state +ffffffff81db1e50 t gfx_v10_0_eop_irq +ffffffff81db2020 t gfx_v10_0_set_gfx_eop_interrupt_state +ffffffff81db21b0 t gfx_v10_0_set_compute_eop_interrupt_state +ffffffff81db2360 t gfx_v10_0_kiq_set_interrupt_state +ffffffff81db2630 t gfx_v10_0_kiq_irq +ffffffff81db26b0 t gfx_v10_0_set_priv_reg_fault_state +ffffffff81db27d0 t gfx_v10_0_priv_reg_irq +ffffffff81db2830 t gfx_v10_0_handle_priv_fault +ffffffff81db29c0 t gfx_v10_0_set_priv_inst_fault_state +ffffffff81db2ae0 t gfx_v10_0_priv_inst_irq +ffffffff81db2b40 t gfx_v10_0_is_rlc_enabled +ffffffff81db2bc0 t gfx_v10_0_set_safe_mode +ffffffff81db2e50 t gfx_v10_0_unset_safe_mode +ffffffff81db2f00 t gfx_v10_0_rlc_init +ffffffff81db2f70 t gfx_v10_0_get_csb_size +ffffffff81db2fc0 t gfx_v10_0_get_csb_buffer +ffffffff81db3140 t gfx_v10_0_rlc_resume +ffffffff81db3c40 t gfx_v10_0_rlc_stop +ffffffff81db3d10 t gfx_v10_0_rlc_reset +ffffffff81db3ea0 t gfx_v10_0_rlc_start +ffffffff81db4040 t gfx_v10_0_update_spm_vmid +ffffffff81db4170 t gfx_v10_0_wait_for_rlc_autoload_complete +ffffffff81db4d00 t gfx_v10_0_init_csb +ffffffff81db4fd0 t gfx_v10_0_is_rlcg_access_range +ffffffff81db5000 t gfx_v10_0_gfx_mqd_init +ffffffff81db53e0 t gfx_v10_0_compute_mqd_init +ffffffff81db5880 t amdgpu_bo_unreserve +ffffffff81db5960 t gfx_v10_0_get_gpu_clock_counter +ffffffff81db5e50 t gfx_v10_0_select_se_sh +ffffffff81db5ee0 t gfx_v10_0_read_wave_data +ffffffff81db6140 t gfx_v10_0_read_wave_vgprs +ffffffff81db6170 t gfx_v10_0_read_wave_sgprs +ffffffff81db61f0 t gfx_v10_0_select_me_pipe_q +ffffffff81db6210 t gfx_v10_0_init_spm_golden_registers +ffffffff81db6280 t gfx_v10_0_update_perfmon_mgcg +ffffffff81db63a0 t wave_read_ind +ffffffff81db6480 t wave_read_regs +ffffffff81db65e0 t gfx_v10_0_cp_resume +ffffffff81db9220 t gfx_v10_3_get_disabled_sa +ffffffff81db9330 t gfx_v10_0_get_rb_active_bitmap +ffffffff81db9450 t gfx_v10_0_get_wgp_active_bitmap_per_sh +ffffffff81db9560 t gfx_v10_0_enable_gui_idle_interrupt +ffffffff81db9670 t gfx_v10_0_cp_gfx_enable +ffffffff81db98b0 t gfx_v10_0_cp_compute_enable +ffffffff81db9a40 t amdgpu_bo_reserve +ffffffff81db9bc0 t gfx_v10_0_kiq_init_register +ffffffff81dbaa30 t gfx_v10_0_cp_gfx_switch_pipe +ffffffff81dbab30 t gfx_v10_0_cp_gfx_set_doorbell +ffffffff81dbae00 t gfx_v10_0_cp_gfx_start +ffffffff81dbb7e0 t gfx_v10_0_update_fine_grain_clock_gating +ffffffff81dbbb00 t gfx_v10_0_update_medium_grain_clock_gating +ffffffff81dbc220 t gfx_v10_0_update_3d_clock_gating +ffffffff81dbc5e0 t gfx_v10_0_update_coarse_grain_clock_gating +ffffffff81dbd000 t gfx_v11_0_early_init +ffffffff81dbd390 t gfx_v11_0_late_init +ffffffff81dbd400 t gfx_v11_0_sw_init +ffffffff81dbe300 t gfx_v11_0_sw_fini +ffffffff81dbe5d0 t gfx_v11_0_hw_init +ffffffff81dc29e0 t gfx_v11_0_hw_fini +ffffffff81dc2c50 t gfx_v11_0_suspend +ffffffff81dc2c90 t gfx_v11_0_resume +ffffffff81dc2ca0 t gfx_v11_0_is_idle +ffffffff81dc2d20 t gfx_v11_0_wait_for_idle +ffffffff81dc2e00 t gfx_v11_0_check_soft_reset +ffffffff81dc2f30 t gfx_v11_0_soft_reset +ffffffff81dc3c10 t gfx_v11_0_set_clockgating_state +ffffffff81dc47f0 t gfx_v11_0_set_powergating_state +ffffffff81dc49e0 t gfx_v11_0_get_clockgating_state +ffffffff81dc4bb0 t gfx11_kiq_set_resources +ffffffff81dc4ee0 t gfx11_kiq_map_queues +ffffffff81dc5270 t gfx11_kiq_unmap_queues +ffffffff81dc5670 t gfx11_kiq_query_status +ffffffff81dc5970 t gfx11_kiq_invalidate_tlbs +ffffffff81dc5a90 t gfx_v11_0_ring_get_rptr_compute +ffffffff81dc5ac0 t gfx_v11_0_ring_get_wptr_compute +ffffffff81dc5b20 t gfx_v11_0_ring_set_wptr_compute +ffffffff81dc5c60 t gfx_v11_0_ring_emit_ib_compute +ffffffff81dc5fb0 t gfx_v11_0_ring_emit_fence_kiq +ffffffff81dc63e0 t gfx_v11_0_ring_test_ring +ffffffff81dc6670 t gfx_v11_0_ring_test_ib +ffffffff81dc6930 t gfx_v11_0_ring_emit_rreg +ffffffff81dc6bc0 t gfx_v11_0_ring_emit_wreg +ffffffff81dc6df0 t gfx_v11_0_ring_emit_reg_wait +ffffffff81dc6e40 t gfx_v11_0_ring_emit_reg_write_reg_wait +ffffffff81dc6ea0 t gfx_v11_0_wait_reg_mem +ffffffff81dc71d0 t gfx_v11_0_ring_get_rptr_gfx +ffffffff81dc7200 t gfx_v11_0_ring_get_wptr_gfx +ffffffff81dc7310 t gfx_v11_0_ring_set_wptr_gfx +ffffffff81dc7520 t gfx_v11_0_ring_emit_ib_gfx +ffffffff81dc7bc0 t gfx_v11_0_ring_emit_fence +ffffffff81dc7f90 t gfx_v11_0_ring_emit_pipeline_sync +ffffffff81dc7ff0 t gfx_v11_0_ring_emit_vm_flush +ffffffff81dc81c0 t gfx_v11_0_ring_emit_hdp_flush +ffffffff81dc8290 t gfx_v11_0_ring_emit_gds_switch +ffffffff81dc8370 t gfx_v11_0_ring_emit_init_cond_exec +ffffffff81dc85a0 t gfx_v11_0_ring_emit_patch_cond_exec +ffffffff81dc8660 t gfx_v11_0_ring_emit_cntxcntl +ffffffff81dc87c0 t gfx_v11_0_ring_emit_frame_cntl +ffffffff81dc88d0 t gfx_v11_0_ring_soft_recovery +ffffffff81dc8940 t gfx_v11_0_ring_preempt_ib +ffffffff81dc8ab0 t gfx_v11_0_emit_mem_sync +ffffffff81dc8df0 t gfx_v11_0_write_data_to_reg +ffffffff81dc9000 t gfx_v11_0_set_eop_interrupt_state +ffffffff81dc9090 t gfx_v11_0_eop_irq +ffffffff81dc9260 t gfx_v11_0_set_gfx_eop_interrupt_state +ffffffff81dc93f0 t gfx_v11_0_set_compute_eop_interrupt_state +ffffffff81dc9580 t gfx_v11_0_set_priv_reg_fault_state +ffffffff81dc96a0 t gfx_v11_0_priv_reg_irq +ffffffff81dc9700 t gfx_v11_0_handle_priv_fault +ffffffff81dc9890 t gfx_v11_0_set_priv_inst_fault_state +ffffffff81dc99b0 t gfx_v11_0_priv_inst_irq +ffffffff81dc9a10 t gfx_v11_0_is_rlc_enabled +ffffffff81dc9a90 t gfx_v11_0_set_safe_mode +ffffffff81dc9be0 t gfx_v11_0_unset_safe_mode +ffffffff81dc9c40 t gfx_v11_0_rlc_init +ffffffff81dc9cb0 t gfx_v11_0_get_csb_size +ffffffff81dc9d00 t gfx_v11_0_get_csb_buffer +ffffffff81dc9e80 t gfx_v11_0_rlc_resume +ffffffff81dcaba0 t gfx_v11_0_rlc_stop +ffffffff81dcac70 t gfx_v11_0_rlc_reset +ffffffff81dcae00 t gfx_v11_0_rlc_start +ffffffff81dcafa0 t gfx_v11_0_update_spm_vmid +ffffffff81dcb0a0 t gfx_v11_0_init_csb +ffffffff81dcb220 t gfx_v11_0_gfx_mqd_init +ffffffff81dcb5f0 t gfx_v11_0_compute_mqd_init +ffffffff81dcbb10 t amdgpu_bo_unreserve +ffffffff81dcbbf0 t gfx_v11_0_get_gpu_clock_counter +ffffffff81dcbd20 t gfx_v11_0_select_se_sh +ffffffff81dcbdb0 t gfx_v11_0_read_wave_data +ffffffff81dcbff0 t gfx_v11_0_read_wave_vgprs +ffffffff81dcc020 t gfx_v11_0_read_wave_sgprs +ffffffff81dcc0a0 t gfx_v11_0_select_me_pipe_q +ffffffff81dcc0c0 t gfx_v11_0_update_perf_clk +ffffffff81dcc1f0 t wave_read_ind +ffffffff81dcc2d0 t wave_read_regs +ffffffff81dcc430 t gfx_v11_0_disable_gpa_mode +ffffffff81dcc5c0 t gfx_v11_0_cp_resume +ffffffff81dd0660 t gfx_v11_0_config_me_cache +ffffffff81dd0a00 t gfx_v11_0_config_pfp_cache +ffffffff81dd0da0 t gfx_v11_0_config_mec_cache +ffffffff81dd1140 t gfx_v11_0_enable_gui_idle_interrupt +ffffffff81dd1250 t gfx_v11_0_cp_compute_enable +ffffffff81dd1420 t gfx_v11_0_cp_gfx_enable +ffffffff81dd1610 t amdgpu_bo_reserve +ffffffff81dd1790 t gfx_v11_0_kiq_init_register +ffffffff81dd2600 t gfx_v11_0_cp_gfx_switch_pipe +ffffffff81dd26e0 t gfx_v11_0_cp_gfx_set_doorbell +ffffffff81dd28c0 t gfx_v11_0_cp_gfx_start +ffffffff81dd4000 t gfx_v8_0_early_init +ffffffff81dd4310 t gfx_v8_0_late_init +ffffffff81dd4a10 t gfx_v8_0_sw_init +ffffffff81dd60e0 t gfx_v8_0_sw_fini +ffffffff81dd6390 t gfx_v8_0_hw_init +ffffffff81dd85c0 t gfx_v8_0_hw_fini +ffffffff81dd8ab0 t gfx_v8_0_suspend +ffffffff81dd8af0 t gfx_v8_0_resume +ffffffff81dd8b00 t gfx_v8_0_is_idle +ffffffff81dd8b70 t gfx_v8_0_wait_for_idle +ffffffff81dd8c10 t gfx_v8_0_check_soft_reset +ffffffff81dd8cf0 t gfx_v8_0_pre_soft_reset +ffffffff81dd8e70 t gfx_v8_0_soft_reset +ffffffff81dd9020 t gfx_v8_0_post_soft_reset +ffffffff81dd91d0 t gfx_v8_0_set_clockgating_state +ffffffff81dd9490 t gfx_v8_0_set_powergating_state +ffffffff81dd9840 t gfx_v8_0_get_clockgating_state +ffffffff81dd9920 t gfx_v8_0_get_gpu_clock_counter +ffffffff81dd99b0 t gfx_v8_0_select_se_sh +ffffffff81dd9a10 t gfx_v8_0_read_wave_data +ffffffff81dd9eb0 t gfx_v8_0_read_wave_sgprs +ffffffff81dd9f60 t gfx_v8_0_select_me_pipe_q +ffffffff81dd9f80 t gfx_v8_0_ring_get_rptr +ffffffff81dd9fb0 t gfx_v8_0_ring_get_wptr_compute +ffffffff81dd9fe0 t gfx_v8_0_ring_set_wptr_compute +ffffffff81dda010 t gfx_v8_0_ring_emit_fence_kiq +ffffffff81dda440 t gfx_v8_0_ring_test_ring +ffffffff81dda640 t gfx_v8_0_ring_emit_rreg +ffffffff81dda8d0 t gfx_v8_0_ring_emit_wreg +ffffffff81ddab00 t gfx_v8_0_ring_get_wptr_gfx +ffffffff81ddab50 t gfx_v8_0_ring_set_wptr_gfx +ffffffff81ddabc0 t gfx_v8_0_ring_emit_ib_gfx +ffffffff81ddb120 t gfx_v8_0_ring_emit_fence_gfx +ffffffff81ddb620 t gfx_v8_0_ring_emit_pipeline_sync +ffffffff81ddb910 t gfx_v8_0_ring_emit_vm_flush +ffffffff81ddbcc0 t gfx_v8_0_ring_emit_hdp_flush +ffffffff81ddbfe0 t gfx_v8_0_ring_emit_gds_switch +ffffffff81ddc7a0 t gfx_v8_0_ring_test_ib +ffffffff81ddc950 t gfx_v8_0_ring_emit_init_cond_exec +ffffffff81ddcb80 t gfx_v8_0_ring_emit_patch_cond_exec +ffffffff81ddcc30 t gfx_v8_ring_emit_sb +ffffffff81ddcd10 t gfx_v8_ring_emit_cntxcntl +ffffffff81ddd2b0 t gfx_v8_0_ring_soft_recovery +ffffffff81ddd2d0 t gfx_v8_0_emit_mem_sync +ffffffff81ddd4d0 t gfx_v8_0_ring_emit_ib_compute +ffffffff81ddd7d0 t gfx_v8_0_ring_emit_fence_compute +ffffffff81dddad0 t gfx_v8_0_emit_mem_sync_compute +ffffffff81dddd90 t gfx_v8_0_emit_wave_limit +ffffffff81dddf40 t gfx_v8_0_set_eop_interrupt_state +ffffffff81dde150 t gfx_v8_0_eop_irq +ffffffff81dde280 t gfx_v8_0_set_priv_reg_fault_state +ffffffff81dde2f0 t gfx_v8_0_priv_reg_irq +ffffffff81dde410 t gfx_v8_0_set_priv_inst_fault_state +ffffffff81dde480 t gfx_v8_0_priv_inst_irq +ffffffff81dde5a0 t gfx_v8_0_set_cp_ecc_int_state +ffffffff81dde810 t gfx_v8_0_cp_ecc_error_irq +ffffffff81dde850 t gfx_v8_0_set_sq_int_state +ffffffff81dde8d0 t gfx_v8_0_sq_irq +ffffffff81dde960 t gfx_v8_0_parse_sq_irq +ffffffff81ddebb0 t gfx_v8_0_is_rlc_enabled +ffffffff81ddebf0 t gfx_v8_0_set_safe_mode +ffffffff81ddece0 t gfx_v8_0_unset_safe_mode +ffffffff81dded80 t gfx_v8_0_rlc_init +ffffffff81ddee20 t gfx_v8_0_get_csb_size +ffffffff81ddee70 t gfx_v8_0_get_csb_buffer +ffffffff81ddeff0 t gfx_v8_0_cp_jump_table_num +ffffffff81ddf030 t gfx_v8_0_rlc_resume +ffffffff81ddf3b0 t gfx_v8_0_rlc_stop +ffffffff81ddf420 t gfx_v8_0_rlc_reset +ffffffff81ddf4a0 t gfx_v8_0_rlc_start +ffffffff81ddf520 t gfx_v8_0_update_spm_vmid +ffffffff81ddf590 t gfx_v8_0_init_save_restore_list +ffffffff81ddf9b0 t gfx_v8_0_wait_for_rlc_serdes +ffffffff81ddfbd0 t gfx_v8_0_sq_irq_work_func +ffffffff81ddfbf0 t amdgpu_bo_unreserve +ffffffff81ddfcd0 t gfx_v8_0_kiq_resume +ffffffff81ddff30 t gfx_v8_0_cp_gfx_resume +ffffffff81de0a50 t gfx_v8_0_kcq_resume +ffffffff81de1480 t amdgpu_bo_reserve +ffffffff81de1600 t gfx_v8_0_mqd_commit +ffffffff81de17e0 t gfx_v8_0_mqd_init +ffffffff81de1c00 t gfx_v8_0_deactivate_hqd +ffffffff81de1cc0 t gfx_v8_0_update_medium_grain_clock_gating +ffffffff81de1ff0 t gfx_v8_0_update_coarse_grain_clock_gating +ffffffff81de3000 t gfx_v9_0_ras_error_inject +ffffffff81de31a0 t gfx_v9_0_query_ras_error_count +ffffffff81de3d40 t gfx_v9_0_reset_ras_error_count +ffffffff81de4780 T gfx_v9_0_select_se_sh +ffffffff81de4820 t gfx_v9_0_early_init +ffffffff81de4c70 t gfx_v9_0_late_init +ffffffff81de5980 t gfx_v9_0_sw_init +ffffffff81de6fe0 t gfx_v9_0_sw_fini +ffffffff81de7280 t gfx_v9_0_hw_init +ffffffff81dea310 t gfx_v9_0_hw_fini +ffffffff81deaa70 t gfx_v9_0_suspend +ffffffff81deaab0 t gfx_v9_0_resume +ffffffff81deaac0 t gfx_v9_0_is_idle +ffffffff81deab40 t gfx_v9_0_wait_for_idle +ffffffff81deac20 t gfx_v9_0_soft_reset +ffffffff81deafa0 t gfx_v9_0_set_clockgating_state +ffffffff81deb060 t gfx_v9_0_set_powergating_state +ffffffff81deb450 t gfx_v9_0_get_clockgating_state +ffffffff81deb560 t gfx_v9_0_kiq_set_resources +ffffffff81deb890 t gfx_v9_0_kiq_map_queues +ffffffff81debbd0 t gfx_v9_0_kiq_unmap_queues +ffffffff81debf50 t gfx_v9_0_kiq_query_status +ffffffff81dec250 t gfx_v9_0_kiq_invalidate_tlbs +ffffffff81dec370 t gfx_v9_0_ring_get_rptr_compute +ffffffff81dec3a0 t gfx_v9_0_ring_get_wptr_compute +ffffffff81dec400 t gfx_v9_0_ring_set_wptr_compute +ffffffff81dec460 t gfx_v9_0_ring_emit_fence_kiq +ffffffff81dec890 t gfx_v9_0_ring_test_ring +ffffffff81decac0 t gfx_v9_0_ring_emit_rreg +ffffffff81decd50 t gfx_v9_0_ring_emit_wreg +ffffffff81decf80 t gfx_v9_0_ring_emit_reg_wait +ffffffff81decfd0 t gfx_v9_0_ring_emit_reg_write_reg_wait +ffffffff81ded070 t gfx_v9_0_wait_reg_mem +ffffffff81ded3a0 t gfx_v9_0_ring_get_rptr_gfx +ffffffff81ded3d0 t gfx_v9_0_ring_get_wptr_gfx +ffffffff81ded4e0 t gfx_v9_0_ring_set_wptr_gfx +ffffffff81ded600 t gfx_v9_0_ring_emit_ib_gfx +ffffffff81dedb20 t gfx_v9_0_ring_emit_fence +ffffffff81dedee0 t gfx_v9_0_ring_emit_pipeline_sync +ffffffff81dedf40 t gfx_v9_0_ring_emit_vm_flush +ffffffff81dee050 t gfx_v9_0_ring_emit_hdp_flush +ffffffff81dee120 t gfx_v9_0_ring_emit_gds_switch +ffffffff81dee200 t gfx_v9_0_ring_test_ib +ffffffff81dee3b0 t gfx_v9_0_ring_emit_init_cond_exec +ffffffff81dee5e0 t gfx_v9_0_ring_emit_patch_cond_exec +ffffffff81dee6b0 t gfx_v9_ring_emit_sb +ffffffff81dee790 t gfx_v9_ring_emit_cntxcntl +ffffffff81deeb80 t gfx_v9_0_ring_emit_frame_cntl +ffffffff81deec90 t gfx_v9_0_ring_soft_recovery +ffffffff81deed00 t gfx_v9_0_emit_mem_sync +ffffffff81deefc0 t gfx_v9_0_write_data_to_reg +ffffffff81def1d0 t gfx_v9_0_ring_emit_ib_compute +ffffffff81def500 t gfx_v9_0_emit_wave_limit +ffffffff81def6d0 t gfx_v9_0_set_eop_interrupt_state +ffffffff81def8a0 t gfx_v9_0_eop_irq +ffffffff81def9d0 t gfx_v9_0_set_compute_eop_interrupt_state +ffffffff81defb80 t gfx_v9_0_set_priv_reg_fault_state +ffffffff81defca0 t gfx_v9_0_priv_reg_irq +ffffffff81defdc0 t gfx_v9_0_set_priv_inst_fault_state +ffffffff81defee0 t gfx_v9_0_priv_inst_irq +ffffffff81df0000 t gfx_v9_0_set_cp_ecc_error_state +ffffffff81df0830 t gfx_v9_0_is_rlc_enabled +ffffffff81df08b0 t gfx_v9_0_set_safe_mode +ffffffff81df0a00 t gfx_v9_0_unset_safe_mode +ffffffff81df0a60 t gfx_v9_0_rlc_init +ffffffff81df1270 t gfx_v9_0_get_csb_size +ffffffff81df12c0 t gfx_v9_0_get_csb_buffer +ffffffff81df1410 t gfx_v9_0_cp_jump_table_num +ffffffff81df1460 t gfx_v9_0_rlc_resume +ffffffff81df21f0 t gfx_v9_0_rlc_stop +ffffffff81df2680 t gfx_v9_0_rlc_reset +ffffffff81df2810 t gfx_v9_0_rlc_start +ffffffff81df2950 t gfx_v9_0_update_spm_vmid +ffffffff81df2a80 t gfx_v9_0_is_rlcg_access_range +ffffffff81df2ad0 t gfx_v9_0_init_always_on_cu_mask +ffffffff81df2e30 t gfx_v9_0_init_csb +ffffffff81df2fc0 t gfx_v9_0_enable_lbpw +ffffffff81df30b0 t gfx_v9_0_enable_gui_idle_interrupt +ffffffff81df31b0 t amdgpu_bo_unreserve +ffffffff81df3290 t gfx_v9_0_get_gpu_clock_counter +ffffffff81df3a10 t gfx_v9_0_read_wave_data +ffffffff81df3c50 t gfx_v9_0_read_wave_vgprs +ffffffff81df3c70 t gfx_v9_0_read_wave_sgprs +ffffffff81df3cc0 t gfx_v9_0_select_me_pipe_q +ffffffff81df3ce0 t wave_read_ind +ffffffff81df3df0 t wave_read_regs +ffffffff81df3f60 t gfx_v9_0_cp_gfx_enable +ffffffff81df4040 t amdgpu_bo_reserve +ffffffff81df41c0 t gfx_v9_0_kiq_init_register +ffffffff81df4e40 t gfx_v9_0_mqd_init +ffffffff81df5380 t gfx_v9_0_update_medium_grain_clock_gating +ffffffff81df5890 t gfx_v9_0_update_3d_clock_gating +ffffffff81df5c70 t gfx_v9_0_update_coarse_grain_clock_gating +ffffffff81df6000 t gfx_v9_4_ras_error_inject +ffffffff81df6130 t gfx_v9_4_query_ras_error_count +ffffffff81df6ef0 t gfx_v9_4_query_ras_error_status +ffffffff81df70b0 t gfx_v9_4_reset_ras_error_count +ffffffff81df8000 T gfx_v9_4_2_do_edc_gpr_workarounds +ffffffff81df8790 T gfx_v9_4_2_init_golden_registers +ffffffff81df8820 T gfx_v9_4_2_debug_trap_config_init +ffffffff81df88c0 T gfx_v9_4_2_set_power_brake_sequence +ffffffff81df8a90 t gfx_v9_4_2_ras_error_inject +ffffffff81df8bc0 t gfx_v9_4_2_query_ras_error_count +ffffffff81df8c70 t gfx_v9_4_2_query_ras_error_status +ffffffff81df94b0 t gfx_v9_4_2_reset_ras_error_count +ffffffff81df9510 t gfx_v9_4_2_reset_ras_error_status +ffffffff81df99d0 t gfx_v9_4_2_enable_watchdog_timer +ffffffff81df9bf0 t gfx_v9_4_2_query_uctl2_poison_status +ffffffff81df9c70 t gfx_v9_4_2_run_shader +ffffffff81df9ff0 t gfx_v9_4_2_wait_for_waves_assigned +ffffffff81dfa630 t gfx_v9_4_2_query_sram_edc_count +ffffffff81dfa980 t gfx_v9_4_2_query_utc_edc_count +ffffffff81dfab60 t wave_read_ind +ffffffff81dfb000 t gfxhub_v1_0_get_mc_fb_offset +ffffffff81dfb080 t gfxhub_v1_0_setup_vm_pt_regs +ffffffff81dfb1b0 t gfxhub_v1_0_gart_enable +ffffffff81dfc690 t gfxhub_v1_0_gart_disable +ffffffff81dfc910 t gfxhub_v1_0_set_fault_enable_default +ffffffff81dfca00 t gfxhub_v1_0_init +ffffffff81dfd000 T gfxhub_v1_1_get_xgmi_info +ffffffff81dfe000 t gfxhub_v2_0_get_fb_location +ffffffff81dfe090 t gfxhub_v2_0_get_mc_fb_offset +ffffffff81dfe110 t gfxhub_v2_0_setup_vm_pt_regs +ffffffff81dfe240 t gfxhub_v2_0_gart_enable +ffffffff81dff440 t gfxhub_v2_0_gart_disable +ffffffff81dff670 t gfxhub_v2_0_set_fault_enable_default +ffffffff81dff760 t gfxhub_v2_0_init +ffffffff81dff820 t gfxhub_v2_0_print_l2_protection_fault_status +ffffffff81dffa00 t gfxhub_v2_0_get_invalidate_req +ffffffff81e00000 t gfxhub_v2_1_get_fb_location +ffffffff81e00090 t gfxhub_v2_1_get_mc_fb_offset +ffffffff81e00110 t gfxhub_v2_1_setup_vm_pt_regs +ffffffff81e00240 t gfxhub_v2_1_gart_enable +ffffffff81e01520 t gfxhub_v2_1_gart_disable +ffffffff81e017a0 t gfxhub_v2_1_set_fault_enable_default +ffffffff81e018b0 t gfxhub_v2_1_init +ffffffff81e01970 t gfxhub_v2_1_get_xgmi_info +ffffffff81e01aa0 t gfxhub_v2_1_utcl2_harvest +ffffffff81e01c70 t gfxhub_v2_1_save_regs +ffffffff81e026a0 t gfxhub_v2_1_restore_regs +ffffffff81e03270 t gfxhub_v2_1_halt +ffffffff81e03630 t gfxhub_v2_1_print_l2_protection_fault_status +ffffffff81e03810 t gfxhub_v2_1_get_invalidate_req +ffffffff81e04000 t gfxhub_v3_0_get_fb_location +ffffffff81e04090 t gfxhub_v3_0_get_mc_fb_offset +ffffffff81e04110 t gfxhub_v3_0_setup_vm_pt_regs +ffffffff81e04240 t gfxhub_v3_0_gart_enable +ffffffff81e054c0 t gfxhub_v3_0_gart_disable +ffffffff81e05740 t gfxhub_v3_0_set_fault_enable_default +ffffffff81e05ae0 t gfxhub_v3_0_init +ffffffff81e05ba0 t gfxhub_v3_0_print_l2_protection_fault_status +ffffffff81e05d80 t gfxhub_v3_0_get_invalidate_req +ffffffff81e06000 t gfxhub_v3_0_3_get_fb_location +ffffffff81e06090 t gfxhub_v3_0_3_get_mc_fb_offset +ffffffff81e06110 t gfxhub_v3_0_3_setup_vm_pt_regs +ffffffff81e06240 t gfxhub_v3_0_3_gart_enable +ffffffff81e074c0 t gfxhub_v3_0_3_gart_disable +ffffffff81e07760 t gfxhub_v3_0_3_set_fault_enable_default +ffffffff81e07870 t gfxhub_v3_0_3_init +ffffffff81e07930 t gfxhub_v3_0_3_print_l2_protection_fault_status +ffffffff81e07b10 t gfxhub_v3_0_3_get_invalidate_req +ffffffff81e08000 t gmc_v10_0_early_init +ffffffff81e081f0 t gmc_v10_0_late_init +ffffffff81e08260 t gmc_v10_0_sw_init +ffffffff81e08680 t gmc_v10_0_sw_fini +ffffffff81e086d0 t gmc_v10_0_hw_init +ffffffff81e08890 t gmc_v10_0_hw_fini +ffffffff81e08930 t gmc_v10_0_suspend +ffffffff81e089d0 t gmc_v10_0_resume +ffffffff81e08a20 t gmc_v10_0_is_idle +ffffffff81e08a50 t gmc_v10_0_wait_for_idle +ffffffff81e08a80 t gmc_v10_0_soft_reset +ffffffff81e08ab0 t gmc_v10_0_set_clockgating_state +ffffffff81e08b60 t gmc_v10_0_set_powergating_state +ffffffff81e08b90 t gmc_v10_0_get_clockgating_state +ffffffff81e08c30 t gmc_v10_0_flush_gpu_tlb +ffffffff81e08ed0 t gmc_v10_0_flush_gpu_tlb_pasid +ffffffff81e090f0 t gmc_v10_0_emit_flush_gpu_tlb +ffffffff81e092a0 t gmc_v10_0_emit_pasid_mapping +ffffffff81e09300 t gmc_v10_0_map_mtype +ffffffff81e09350 t gmc_v10_0_get_vm_pde +ffffffff81e09440 t gmc_v10_0_get_vm_pte +ffffffff81e094e0 t gmc_v10_0_get_vbios_fb_size +ffffffff81e09640 t gmc_v10_0_flush_vm_hub +ffffffff81e09aa0 t gmc_v10_0_vm_fault_interrupt_state +ffffffff81e09b10 t gmc_v10_0_process_interrupt +ffffffff81e09dd0 t gmc_v10_0_ecc_interrupt_state +ffffffff81e0a000 t gmc_v11_0_early_init +ffffffff81e0a220 t gmc_v11_0_late_init +ffffffff81e0a290 t gmc_v11_0_sw_init +ffffffff81e0a5b0 t gmc_v11_0_sw_fini +ffffffff81e0a600 t gmc_v11_0_hw_init +ffffffff81e0a740 t gmc_v11_0_hw_fini +ffffffff81e0a7d0 t gmc_v11_0_suspend +ffffffff81e0a860 t gmc_v11_0_resume +ffffffff81e0a8b0 t gmc_v11_0_is_idle +ffffffff81e0a8e0 t gmc_v11_0_wait_for_idle +ffffffff81e0a910 t gmc_v11_0_soft_reset +ffffffff81e0a940 t gmc_v11_0_set_clockgating_state +ffffffff81e0a9b0 t gmc_v11_0_set_powergating_state +ffffffff81e0a9e0 t gmc_v11_0_get_clockgating_state +ffffffff81e0aa10 t gmc_v11_0_flush_gpu_tlb +ffffffff81e0aee0 t gmc_v11_0_flush_gpu_tlb_pasid +ffffffff81e0b0d0 t gmc_v11_0_emit_flush_gpu_tlb +ffffffff81e0b270 t gmc_v11_0_emit_pasid_mapping +ffffffff81e0b2d0 t gmc_v11_0_map_mtype +ffffffff81e0b320 t gmc_v11_0_get_vm_pde +ffffffff81e0b410 t gmc_v11_0_get_vm_pte +ffffffff81e0b4b0 t gmc_v11_0_get_vbios_fb_size +ffffffff81e0b4e0 t gmc_v11_0_vm_fault_interrupt_state +ffffffff81e0b550 t gmc_v11_0_process_interrupt +ffffffff81e0b770 t gmc_v11_0_ecc_interrupt_state +ffffffff81e0c000 t gmc_v7_0_early_init +ffffffff81e0c090 t gmc_v7_0_late_init +ffffffff81e0c0d0 t gmc_v7_0_sw_init +ffffffff81e0c5d0 t gmc_v7_0_sw_fini +ffffffff81e0c680 t gmc_v7_0_hw_init +ffffffff81e0d030 t gmc_v7_0_hw_fini +ffffffff81e0d0f0 t gmc_v7_0_suspend +ffffffff81e0d130 t gmc_v7_0_resume +ffffffff81e0d180 t gmc_v7_0_is_idle +ffffffff81e0d1c0 t gmc_v7_0_wait_for_idle +ffffffff81e0d250 t gmc_v7_0_soft_reset +ffffffff81e0d4b0 t gmc_v7_0_set_clockgating_state +ffffffff81e0d710 t gmc_v7_0_set_powergating_state +ffffffff81e0d740 t gmc_v7_0_flush_gpu_tlb +ffffffff81e0d760 t gmc_v7_0_flush_gpu_tlb_pasid +ffffffff81e0d820 t gmc_v7_0_emit_flush_gpu_tlb +ffffffff81e0d8b0 t gmc_v7_0_emit_pasid_mapping +ffffffff81e0d8d0 t gmc_v7_0_set_prt +ffffffff81e0da80 t gmc_v7_0_get_vm_pde +ffffffff81e0dae0 t gmc_v7_0_get_vm_pte +ffffffff81e0db20 t gmc_v7_0_get_vbios_fb_size +ffffffff81e0db90 t gmc_v7_0_vm_fault_interrupt_state +ffffffff81e0dc60 t gmc_v7_0_process_interrupt +ffffffff81e0e000 t gmc_v8_0_early_init +ffffffff81e0e090 t gmc_v8_0_late_init +ffffffff81e0e0d0 t gmc_v8_0_sw_init +ffffffff81e0e750 t gmc_v8_0_sw_fini +ffffffff81e0e800 t gmc_v8_0_hw_init +ffffffff81e0f4b0 t gmc_v8_0_hw_fini +ffffffff81e0f570 t gmc_v8_0_suspend +ffffffff81e0f5b0 t gmc_v8_0_resume +ffffffff81e0f600 t gmc_v8_0_is_idle +ffffffff81e0f640 t gmc_v8_0_wait_for_idle +ffffffff81e0f6d0 t gmc_v8_0_check_soft_reset +ffffffff81e0f740 t gmc_v8_0_pre_soft_reset +ffffffff81e0f8b0 t gmc_v8_0_soft_reset +ffffffff81e0f970 t gmc_v8_0_post_soft_reset +ffffffff81e0f9e0 t gmc_v8_0_set_clockgating_state +ffffffff81e0ff90 t gmc_v8_0_set_powergating_state +ffffffff81e0ffc0 t gmc_v8_0_get_clockgating_state +ffffffff81e10030 t gmc_v8_0_flush_gpu_tlb +ffffffff81e10050 t gmc_v8_0_flush_gpu_tlb_pasid +ffffffff81e10110 t gmc_v8_0_emit_flush_gpu_tlb +ffffffff81e101a0 t gmc_v8_0_emit_pasid_mapping +ffffffff81e101c0 t gmc_v8_0_set_prt +ffffffff81e10370 t gmc_v8_0_get_vm_pde +ffffffff81e103d0 t gmc_v8_0_get_vm_pte +ffffffff81e10420 t gmc_v8_0_get_vbios_fb_size +ffffffff81e10490 t gmc_v8_0_vm_fault_interrupt_state +ffffffff81e10560 t gmc_v8_0_process_interrupt +ffffffff81e11000 T gmc_v9_0_restore_registers +ffffffff81e11150 t gmc_v9_0_early_init +ffffffff81e11500 t gmc_v9_0_late_init +ffffffff81e11600 t gmc_v9_0_sw_init +ffffffff81e11cb0 t gmc_v9_0_sw_fini +ffffffff81e11d20 t gmc_v9_0_hw_init +ffffffff81e12110 t gmc_v9_0_hw_fini +ffffffff81e121d0 t gmc_v9_0_suspend +ffffffff81e12290 t gmc_v9_0_resume +ffffffff81e122e0 t gmc_v9_0_is_idle +ffffffff81e12310 t gmc_v9_0_wait_for_idle +ffffffff81e12340 t gmc_v9_0_soft_reset +ffffffff81e12370 t gmc_v9_0_set_clockgating_state +ffffffff81e123d0 t gmc_v9_0_set_powergating_state +ffffffff81e12400 t gmc_v9_0_get_clockgating_state +ffffffff81e12430 t gmc_v9_0_flush_gpu_tlb +ffffffff81e12a70 t gmc_v9_0_flush_gpu_tlb_pasid +ffffffff81e12d40 t gmc_v9_0_emit_flush_gpu_tlb +ffffffff81e12f10 t gmc_v9_0_emit_pasid_mapping +ffffffff81e12f80 t gmc_v9_0_map_mtype +ffffffff81e12fc0 t gmc_v9_0_get_vm_pde +ffffffff81e130c0 t gmc_v9_0_get_vm_pte +ffffffff81e13190 t gmc_v9_0_get_vbios_fb_size +ffffffff81e13320 t gmc_v9_0_vm_fault_interrupt_state +ffffffff81e136a0 t gmc_v9_0_process_interrupt +ffffffff81e13ce0 t gmc_v9_0_ecc_interrupt_state +ffffffff81e14000 t hdp_v4_0_query_ras_error_count +ffffffff81e140b0 t hdp_v4_0_reset_ras_error_count +ffffffff81e141c0 t hdp_v4_0_flush_hdp +ffffffff81e14210 t hdp_v4_0_invalidate_hdp +ffffffff81e142d0 t hdp_v4_0_update_clock_gating +ffffffff81e143d0 t hdp_v4_0_get_clockgating_state +ffffffff81e14420 t hdp_v4_0_init_registers +ffffffff81e15000 t hdp_v5_0_flush_hdp +ffffffff81e15050 t hdp_v5_0_invalidate_hdp +ffffffff81e150f0 t hdp_v5_0_update_clock_gating +ffffffff81e154e0 t hdp_v5_0_get_clockgating_state +ffffffff81e15600 t hdp_v5_0_init_registers +ffffffff81e16000 t hdp_v5_2_flush_hdp +ffffffff81e16050 t hdp_v5_2_update_clock_gating +ffffffff81e16440 t hdp_v5_2_get_clockgating_state +ffffffff81e17000 t hdp_v6_0_flush_hdp +ffffffff81e17050 t hdp_v6_0_update_clock_gating +ffffffff81e17360 t hdp_v6_0_get_clockgating_state +ffffffff81e18000 t iceland_ih_early_init +ffffffff81e18050 t iceland_ih_sw_init +ffffffff81e180b0 t iceland_ih_sw_fini +ffffffff81e180f0 t iceland_ih_hw_init +ffffffff81e18310 t iceland_ih_hw_fini +ffffffff81e183e0 t iceland_ih_suspend +ffffffff81e184b0 t iceland_ih_resume +ffffffff81e184f0 t iceland_ih_is_idle +ffffffff81e18530 t iceland_ih_wait_for_idle +ffffffff81e185c0 t iceland_ih_soft_reset +ffffffff81e186a0 t iceland_ih_set_clockgating_state +ffffffff81e186d0 t iceland_ih_set_powergating_state +ffffffff81e18700 t iceland_ih_get_wptr +ffffffff81e187f0 t iceland_ih_decode_iv +ffffffff81e18860 t iceland_ih_set_rptr +ffffffff81e19000 t ih_v6_0_early_init +ffffffff81e19050 t ih_v6_0_sw_init +ffffffff81e191b0 t ih_v6_0_sw_fini +ffffffff81e191f0 t ih_v6_0_hw_init +ffffffff81e197a0 t ih_v6_0_hw_fini +ffffffff81e19800 t ih_v6_0_suspend +ffffffff81e19860 t ih_v6_0_resume +ffffffff81e19870 t ih_v6_0_is_idle +ffffffff81e198a0 t ih_v6_0_wait_for_idle +ffffffff81e198d0 t ih_v6_0_soft_reset +ffffffff81e19900 t ih_v6_0_set_clockgating_state +ffffffff81e19a20 t ih_v6_0_set_powergating_state +ffffffff81e19b90 t ih_v6_0_get_clockgating_state +ffffffff81e19c20 t ih_v6_0_get_wptr +ffffffff81e19d10 t ih_v6_0_set_rptr +ffffffff81e19dd0 t ih_v6_0_self_irq +ffffffff81e19e30 t ih_v6_0_toggle_interrupts +ffffffff81e1a010 t force_update_wptr_for_self_int +ffffffff81e1b000 t imu_v11_0_init_microcode +ffffffff81e1b1f0 t imu_v11_0_load_microcode +ffffffff81e1b550 t imu_v11_0_setup +ffffffff81e1b7d0 t imu_v11_0_start +ffffffff81e1b8c0 t imu_v11_0_program_rlc_ram +ffffffff81e1ba70 t imu_v11_0_wait_for_reset_status +ffffffff81e1bbb0 t program_imu_rlc_ram +ffffffff81e1c000 T imu_v11_0_3_program_rlc_ram +ffffffff81e1d000 T jpeg_v1_0_early_init +ffffffff81e1d060 T jpeg_v1_0_sw_init +ffffffff81e1d130 T jpeg_v1_0_sw_fini +ffffffff81e1d150 T jpeg_v1_0_start +ffffffff81e1dbc0 t jpeg_v1_0_decode_ring_get_rptr +ffffffff81e1dc40 t jpeg_v1_0_decode_ring_get_wptr +ffffffff81e1dcc0 t jpeg_v1_0_decode_ring_set_wptr +ffffffff81e1dd30 t jpeg_v1_0_decode_ring_emit_ib +ffffffff81e1e640 t jpeg_v1_0_decode_ring_emit_fence +ffffffff81e1ef90 t jpeg_v1_0_decode_ring_emit_vm_flush +ffffffff81e1f000 t jpeg_v1_0_decode_ring_nop +ffffffff81e1f160 t jpeg_v1_0_decode_ring_insert_start +ffffffff81e1f320 t jpeg_v1_0_decode_ring_insert_end +ffffffff81e1f4e0 t jpeg_v1_0_ring_begin_use +ffffffff81e1f5e0 t jpeg_v1_0_decode_ring_emit_wreg +ffffffff81e1f840 t jpeg_v1_0_decode_ring_emit_reg_wait +ffffffff81e1fc50 t jpeg_v1_0_set_interrupt_state +ffffffff81e1fc80 t jpeg_v1_0_process_interrupt +ffffffff81e20000 T jpeg_v2_0_dec_ring_insert_start +ffffffff81e201a0 T jpeg_v2_0_dec_ring_insert_end +ffffffff81e20340 T jpeg_v2_0_dec_ring_emit_fence +ffffffff81e20a30 T jpeg_v2_0_dec_ring_emit_ib +ffffffff81e21210 T jpeg_v2_0_dec_ring_emit_reg_wait +ffffffff81e215d0 T jpeg_v2_0_dec_ring_emit_vm_flush +ffffffff81e21640 T jpeg_v2_0_dec_ring_emit_wreg +ffffffff81e21880 T jpeg_v2_0_dec_ring_nop +ffffffff81e219e0 t jpeg_v2_0_early_init +ffffffff81e21a50 t jpeg_v2_0_sw_init +ffffffff81e21b60 t jpeg_v2_0_sw_fini +ffffffff81e21bb0 t jpeg_v2_0_hw_init +ffffffff81e21c30 t jpeg_v2_0_hw_fini +ffffffff81e21d00 t jpeg_v2_0_suspend +ffffffff81e21d20 t jpeg_v2_0_resume +ffffffff81e21db0 t jpeg_v2_0_is_idle +ffffffff81e21e30 t jpeg_v2_0_wait_for_idle +ffffffff81e21f20 t jpeg_v2_0_set_clockgating_state +ffffffff81e21fd0 t jpeg_v2_0_set_powergating_state +ffffffff81e227d0 t jpeg_v2_0_dec_ring_get_rptr +ffffffff81e22850 t jpeg_v2_0_dec_ring_get_wptr +ffffffff81e228f0 t jpeg_v2_0_dec_ring_set_wptr +ffffffff81e22980 t jpeg_v2_0_set_interrupt_state +ffffffff81e229b0 t jpeg_v2_0_process_interrupt +ffffffff81e22a40 t jpeg_v2_0_enable_clock_gating +ffffffff81e22be0 t jpeg_v2_0_disable_clock_gating +ffffffff81e23000 t jpeg_v2_6_query_ras_poison_status +ffffffff81e23140 t jpeg_v2_5_early_init +ffffffff81e23410 t jpeg_v2_5_sw_init +ffffffff81e23630 t jpeg_v2_5_sw_fini +ffffffff81e23680 t jpeg_v2_5_hw_init +ffffffff81e23770 t jpeg_v2_5_hw_fini +ffffffff81e238b0 t jpeg_v2_5_suspend +ffffffff81e238d0 t jpeg_v2_5_resume +ffffffff81e239d0 t jpeg_v2_5_is_idle +ffffffff81e23ac0 t jpeg_v2_5_wait_for_idle +ffffffff81e23bf0 t jpeg_v2_5_set_clockgating_state +ffffffff81e23d60 t jpeg_v2_5_set_powergating_state +ffffffff81e24440 t jpeg_v2_5_dec_ring_get_rptr +ffffffff81e244d0 t jpeg_v2_5_dec_ring_get_wptr +ffffffff81e24580 t jpeg_v2_5_dec_ring_set_wptr +ffffffff81e24620 t jpeg_v2_6_dec_ring_insert_start +ffffffff81e247e0 t jpeg_v2_6_dec_ring_insert_end +ffffffff81e249a0 t jpeg_v2_5_set_interrupt_state +ffffffff81e249d0 t jpeg_v2_5_process_interrupt +ffffffff81e24ab0 t jpeg_v2_5_enable_clock_gating +ffffffff81e24b80 t jpeg_v2_5_disable_clock_gating +ffffffff81e25000 t jpeg_v3_0_early_init +ffffffff81e250e0 t jpeg_v3_0_sw_init +ffffffff81e251f0 t jpeg_v3_0_sw_fini +ffffffff81e25240 t jpeg_v3_0_hw_init +ffffffff81e252c0 t jpeg_v3_0_hw_fini +ffffffff81e25390 t jpeg_v3_0_suspend +ffffffff81e253b0 t jpeg_v3_0_resume +ffffffff81e25440 t jpeg_v3_0_is_idle +ffffffff81e254c0 t jpeg_v3_0_wait_for_idle +ffffffff81e255b0 t jpeg_v3_0_set_clockgating_state +ffffffff81e25660 t jpeg_v3_0_set_powergating_state +ffffffff81e25f10 t jpeg_v3_0_dec_ring_get_rptr +ffffffff81e25f90 t jpeg_v3_0_dec_ring_get_wptr +ffffffff81e26030 t jpeg_v3_0_dec_ring_set_wptr +ffffffff81e260c0 t jpeg_v3_0_set_interrupt_state +ffffffff81e260f0 t jpeg_v3_0_process_interrupt +ffffffff81e26180 t jpeg_v3_0_enable_clock_gating +ffffffff81e26250 t jpeg_v3_0_disable_clock_gating +ffffffff81e27000 t jpeg_v4_0_early_init +ffffffff81e27080 t jpeg_v4_0_sw_init +ffffffff81e27190 t jpeg_v4_0_sw_fini +ffffffff81e271e0 t jpeg_v4_0_hw_init +ffffffff81e272f0 t jpeg_v4_0_hw_fini +ffffffff81e273c0 t jpeg_v4_0_suspend +ffffffff81e273e0 t jpeg_v4_0_resume +ffffffff81e27430 t jpeg_v4_0_is_idle +ffffffff81e274b0 t jpeg_v4_0_wait_for_idle +ffffffff81e275a0 t jpeg_v4_0_set_clockgating_state +ffffffff81e27650 t jpeg_v4_0_set_powergating_state +ffffffff81e27e50 t jpeg_v4_0_dec_ring_get_rptr +ffffffff81e27ed0 t jpeg_v4_0_dec_ring_get_wptr +ffffffff81e27f70 t jpeg_v4_0_dec_ring_set_wptr +ffffffff81e28010 t jpeg_v4_0_set_interrupt_state +ffffffff81e28040 t jpeg_v4_0_process_interrupt +ffffffff81e280e0 t jpeg_v4_0_enable_clock_gating +ffffffff81e28290 t jpeg_v4_0_disable_clock_gating +ffffffff81e29000 t lsdma_v6_0_copy_mem +ffffffff81e29350 t lsdma_v6_0_fill_mem +ffffffff81e29630 t lsdma_v6_0_update_memory_power_gating +ffffffff81e2a000 t mca_v3_0_mp0_query_ras_error_count +ffffffff81e2a020 t mca_v3_0_ras_block_match +ffffffff81e2a060 t mca_v3_0_mp1_query_ras_error_count +ffffffff81e2a080 t mca_v3_0_mpio_query_ras_error_count +ffffffff81e2a0a0 t mca_v3_0_init +ffffffff81e2b000 t mes_v10_0_late_init +ffffffff81e2b040 t mes_v10_1_sw_init +ffffffff81e2b640 t mes_v10_1_sw_fini +ffffffff81e2b7c0 t mes_v10_1_hw_init +ffffffff81e2c060 t mes_v10_1_hw_fini +ffffffff81e2c120 t mes_v10_1_suspend +ffffffff81e2c1f0 t mes_v10_1_resume +ffffffff81e2c240 t mes_v10_1_kiq_hw_init +ffffffff81e2c640 t mes_v10_1_add_hw_queue +ffffffff81e2c7b0 t mes_v10_1_remove_hw_queue +ffffffff81e2c840 t mes_v10_1_unmap_legacy_queue +ffffffff81e2c920 t mes_v10_1_suspend_gang +ffffffff81e2c950 t mes_v10_1_resume_gang +ffffffff81e2c980 t mes_v10_1_submit_pkt_and_poll_completion +ffffffff81e2cb80 t mes_v10_1_load_microcode +ffffffff81e2d370 t mes_v10_1_enable +ffffffff81e2d7e0 t mes_v10_1_queue_init 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amdgpu_bo_unreserve +ffffffff81e31610 t mes_v11_0_mqd_init +ffffffff81e31810 t mes_v11_0_ring_get_rptr +ffffffff81e31840 t mes_v11_0_ring_get_wptr +ffffffff81e318a0 t mes_v11_0_ring_set_wptr +ffffffff81e32000 t mmhub_v1_0_query_ras_error_count +ffffffff81e32150 t mmhub_v1_0_reset_ras_error_count +ffffffff81e321f0 t mmhub_v1_0_get_fb_location +ffffffff81e32300 t mmhub_v1_0_init +ffffffff81e323b0 t mmhub_v1_0_gart_enable +ffffffff81e336e0 t mmhub_v1_0_set_fault_enable_default +ffffffff81e337f0 t mmhub_v1_0_gart_disable +ffffffff81e33a70 t mmhub_v1_0_set_clockgating +ffffffff81e33ef0 t mmhub_v1_0_get_clockgating +ffffffff81e34010 t mmhub_v1_0_setup_vm_pt_regs +ffffffff81e34140 t mmhub_v1_0_update_power_gating +ffffffff81e35000 t mmhub_v1_7_query_ras_error_count +ffffffff81e35150 t mmhub_v1_7_query_ras_error_status +ffffffff81e35230 t mmhub_v1_7_reset_ras_error_count +ffffffff81e352d0 t mmhub_v1_7_reset_ras_error_status +ffffffff81e353c0 t mmhub_v1_7_get_fb_location +ffffffff81e354d0 t mmhub_v1_7_init +ffffffff81e35570 t mmhub_v1_7_gart_enable +ffffffff81e36a50 t mmhub_v1_7_set_fault_enable_default +ffffffff81e36b60 t mmhub_v1_7_gart_disable +ffffffff81e36de0 t mmhub_v1_7_set_clockgating +ffffffff81e37150 t mmhub_v1_7_get_clockgating +ffffffff81e37270 t mmhub_v1_7_setup_vm_pt_regs +ffffffff81e38000 t mmhub_v2_0_init +ffffffff81e380c0 t mmhub_v2_0_gart_enable +ffffffff81e39240 t mmhub_v2_0_set_fault_enable_default +ffffffff81e39350 t mmhub_v2_0_gart_disable +ffffffff81e395d0 t mmhub_v2_0_set_clockgating +ffffffff81e39910 t mmhub_v2_0_get_clockgating +ffffffff81e39aa0 t mmhub_v2_0_setup_vm_pt_regs +ffffffff81e39be0 t mmhub_v2_0_print_l2_protection_fault_status +ffffffff81e39e40 t mmhub_v2_0_get_invalidate_req +ffffffff81e3a000 t mmhub_v2_3_init +ffffffff81e3a0d0 t mmhub_v2_3_gart_enable +ffffffff81e3b460 t mmhub_v2_3_set_fault_enable_default +ffffffff81e3b550 t mmhub_v2_3_gart_disable +ffffffff81e3b7e0 t mmhub_v2_3_set_clockgating +ffffffff81e3bc60 t mmhub_v2_3_get_clockgating +ffffffff81e3be40 t mmhub_v2_3_setup_vm_pt_regs +ffffffff81e3bf80 t mmhub_v2_3_print_l2_protection_fault_status +ffffffff81e3c1a0 t mmhub_v2_3_get_invalidate_req +ffffffff81e3d000 t mmhub_v3_0_get_fb_location +ffffffff81e3d090 t mmhub_v3_0_get_mc_fb_offset +ffffffff81e3d110 t mmhub_v3_0_init +ffffffff81e3d1e0 t mmhub_v3_0_gart_enable +ffffffff81e3e370 t mmhub_v3_0_set_fault_enable_default +ffffffff81e3e480 t mmhub_v3_0_gart_disable +ffffffff81e3e700 t mmhub_v3_0_set_clockgating +ffffffff81e3e8c0 t mmhub_v3_0_get_clockgating +ffffffff81e3e970 t mmhub_v3_0_setup_vm_pt_regs +ffffffff81e3eaa0 t mmhub_v3_0_print_l2_protection_fault_status +ffffffff81e3ecb0 t mmhub_v3_0_get_invalidate_req +ffffffff81e3f000 t mmhub_v3_0_1_get_fb_location +ffffffff81e3f090 t mmhub_v3_0_1_get_mc_fb_offset +ffffffff81e3f110 t mmhub_v3_0_1_init +ffffffff81e3f1e0 t mmhub_v3_0_1_gart_enable +ffffffff81e40460 t mmhub_v3_0_1_set_fault_enable_default +ffffffff81e40550 t mmhub_v3_0_1_gart_disable +ffffffff81e407e0 t mmhub_v3_0_1_set_clockgating +ffffffff81e40990 t mmhub_v3_0_1_get_clockgating +ffffffff81e40a40 t mmhub_v3_0_1_setup_vm_pt_regs +ffffffff81e40b80 t mmhub_v3_0_1_print_l2_protection_fault_status +ffffffff81e40d90 t mmhub_v3_0_1_get_invalidate_req +ffffffff81e41000 t mmhub_v3_0_2_get_fb_location +ffffffff81e41090 t mmhub_v3_0_2_get_mc_fb_offset +ffffffff81e41110 t mmhub_v3_0_2_init +ffffffff81e411e0 t mmhub_v3_0_2_gart_enable +ffffffff81e42360 t mmhub_v3_0_2_set_fault_enable_default +ffffffff81e42470 t mmhub_v3_0_2_gart_disable +ffffffff81e426f0 t mmhub_v3_0_2_set_clockgating +ffffffff81e42720 t mmhub_v3_0_2_get_clockgating +ffffffff81e42750 t mmhub_v3_0_2_setup_vm_pt_regs +ffffffff81e42880 t mmhub_v3_0_2_print_l2_protection_fault_status +ffffffff81e42a70 t mmhub_v3_0_2_get_invalidate_req +ffffffff81e43000 t mmhub_v9_4_query_ras_error_count +ffffffff81e43150 t mmhub_v9_4_query_ras_error_status +ffffffff81e43230 t mmhub_v9_4_reset_ras_error_count +ffffffff81e432f0 t mmhub_v9_4_get_fb_location +ffffffff81e43400 t mmhub_v9_4_init +ffffffff81e43540 t mmhub_v9_4_gart_enable +ffffffff81e449d0 t mmhub_v9_4_set_fault_enable_default +ffffffff81e44bb0 t mmhub_v9_4_gart_disable +ffffffff81e44f10 t mmhub_v9_4_set_clockgating +ffffffff81e453d0 t mmhub_v9_4_get_clockgating +ffffffff81e454f0 t mmhub_v9_4_setup_vm_pt_regs +ffffffff81e45530 t mmhub_v9_4_setup_hubid_vm_pt_regs +ffffffff81e46000 T xgpu_ai_mailbox_set_irq_funcs +ffffffff81e46050 T xgpu_ai_mailbox_add_irq_id +ffffffff81e460e0 T xgpu_ai_mailbox_get_irq +ffffffff81e46190 t xgpu_ai_mailbox_flr_work +ffffffff81e46390 T xgpu_ai_mailbox_put_irq +ffffffff81e463d0 t xgpu_ai_request_full_gpu_access +ffffffff81e463f0 t xgpu_ai_release_full_gpu_access +ffffffff81e46410 t xgpu_ai_request_init_data +ffffffff81e46470 t xgpu_ai_request_reset +ffffffff81e46520 t xgpu_ai_mailbox_trans_msg +ffffffff81e46750 t xgpu_ai_set_mailbox_ack_irq +ffffffff81e467e0 t xgpu_ai_mailbox_ack_irq +ffffffff81e46830 t xgpu_ai_set_mailbox_rcv_irq +ffffffff81e468c0 t xgpu_ai_mailbox_rcv_irq +ffffffff81e469a0 t xgpu_ai_send_access_requests +ffffffff81e46a90 t xgpu_ai_poll_msg +ffffffff81e47000 T xgpu_nv_mailbox_set_irq_funcs +ffffffff81e47050 T xgpu_nv_mailbox_add_irq_id +ffffffff81e470e0 T xgpu_nv_mailbox_get_irq +ffffffff81e47190 t xgpu_nv_mailbox_flr_work +ffffffff81e473b0 T xgpu_nv_mailbox_put_irq +ffffffff81e473f0 t xgpu_nv_request_full_gpu_access +ffffffff81e47410 t xgpu_nv_release_full_gpu_access +ffffffff81e47430 t xgpu_nv_request_init_data +ffffffff81e47450 t xgpu_nv_request_reset +ffffffff81e47550 t xgpu_nv_mailbox_trans_msg +ffffffff81e476f0 t xgpu_nv_set_mailbox_ack_irq +ffffffff81e47760 t xgpu_nv_mailbox_ack_irq +ffffffff81e477b0 t xgpu_nv_set_mailbox_rcv_irq +ffffffff81e47830 t xgpu_nv_mailbox_rcv_irq +ffffffff81e478e0 t xgpu_nv_send_access_requests +ffffffff81e48000 T xgpu_vi_init_golden_registers +ffffffff81e480c0 T xgpu_vi_mailbox_set_irq_funcs +ffffffff81e48110 T xgpu_vi_mailbox_add_irq_id +ffffffff81e481a0 T xgpu_vi_mailbox_get_irq +ffffffff81e48250 t xgpu_vi_mailbox_flr_work +ffffffff81e483a0 T xgpu_vi_mailbox_put_irq +ffffffff81e483e0 t xgpu_vi_request_full_gpu_access +ffffffff81e48400 t xgpu_vi_release_full_gpu_access +ffffffff81e48420 t xgpu_vi_request_reset +ffffffff81e48440 t xgpu_vi_wait_reset_cmpl +ffffffff81e48520 t xgpu_vi_set_mailbox_ack_irq +ffffffff81e48590 t xgpu_vi_mailbox_ack_irq +ffffffff81e485e0 t xgpu_vi_set_mailbox_rcv_irq +ffffffff81e48660 t xgpu_vi_mailbox_rcv_irq +ffffffff81e48700 t xgpu_vi_mailbox_rcv_msg +ffffffff81e48820 t xgpu_vi_send_access_requests +ffffffff81e49000 t navi10_ih_early_init +ffffffff81e49050 t navi10_ih_sw_init +ffffffff81e491c0 t navi10_ih_sw_fini +ffffffff81e49200 t navi10_ih_hw_init +ffffffff81e49630 t navi10_ih_hw_fini +ffffffff81e49690 t navi10_ih_suspend +ffffffff81e496f0 t navi10_ih_resume +ffffffff81e49700 t navi10_ih_is_idle +ffffffff81e49730 t navi10_ih_wait_for_idle +ffffffff81e49760 t navi10_ih_soft_reset +ffffffff81e49790 t navi10_ih_set_clockgating_state +ffffffff81e498b0 t navi10_ih_set_powergating_state +ffffffff81e498e0 t navi10_ih_get_clockgating_state +ffffffff81e49970 t navi10_ih_get_wptr +ffffffff81e49a80 t navi10_ih_set_rptr +ffffffff81e49b50 t navi10_ih_self_irq +ffffffff81e49bc0 t navi10_ih_toggle_interrupts +ffffffff81e49d50 t force_update_wptr_for_self_int +ffffffff81e4b000 t nbio_v2_3_get_hdp_flush_req_offset +ffffffff81e4b040 t nbio_v2_3_get_hdp_flush_done_offset +ffffffff81e4b080 t nbio_v2_3_get_pcie_index_offset +ffffffff81e4b0b0 t nbio_v2_3_get_pcie_data_offset +ffffffff81e4b0e0 t nbio_v2_3_get_rev_id +ffffffff81e4b130 t nbio_v2_3_mc_access_enable +ffffffff81e4b1e0 t nbio_v2_3_get_memsize +ffffffff81e4b240 t nbio_v2_3_sdma_doorbell_range +ffffffff81e4b2e0 t nbio_v2_3_vcn_doorbell_range +ffffffff81e4b360 t nbio_v2_3_enable_doorbell_aperture +ffffffff81e4b450 t nbio_v2_3_enable_doorbell_selfring_aperture +ffffffff81e4b5b0 t nbio_v2_3_ih_doorbell_range +ffffffff81e4b6c0 t nbio_v2_3_update_medium_grain_clock_gating +ffffffff81e4b760 t nbio_v2_3_update_medium_grain_light_sleep +ffffffff81e4b800 t nbio_v2_3_get_clockgating_state +ffffffff81e4b880 t nbio_v2_3_ih_control +ffffffff81e4b9d0 t nbio_v2_3_init_registers +ffffffff81e4ba60 t nbio_v2_3_remap_hdp_registers +ffffffff81e4bb60 t nbio_v2_3_enable_aspm +ffffffff81e4bbf0 t nbio_v2_3_program_aspm +ffffffff81e4c280 t nbio_v2_3_apply_lc_spc_mode_wa +ffffffff81e4c310 t nbio_v2_3_apply_l1_link_width_reconfig_wa +ffffffff81e4c380 t nbio_v2_3_clear_doorbell_interrupt +ffffffff81e4d000 t nbio_v4_3_get_hdp_flush_req_offset +ffffffff81e4d040 t nbio_v4_3_get_hdp_flush_done_offset +ffffffff81e4d080 t nbio_v4_3_get_pcie_index_offset +ffffffff81e4d0b0 t nbio_v4_3_get_pcie_data_offset +ffffffff81e4d0e0 t nbio_v4_3_get_rev_id +ffffffff81e4d160 t nbio_v4_3_mc_access_enable +ffffffff81e4d210 t nbio_v4_3_get_memsize +ffffffff81e4d270 t nbio_v4_3_sdma_doorbell_range +ffffffff81e4d3e0 t nbio_v4_3_vcn_doorbell_range +ffffffff81e4d590 t nbio_v4_3_gc_doorbell_init +ffffffff81e4d680 t nbio_v4_3_enable_doorbell_aperture +ffffffff81e4d770 t nbio_v4_3_enable_doorbell_selfring_aperture +ffffffff81e4d8d0 t nbio_v4_3_ih_doorbell_range +ffffffff81e4d9f0 t nbio_v4_3_update_medium_grain_clock_gating +ffffffff81e4db20 t nbio_v4_3_update_medium_grain_light_sleep +ffffffff81e4dc50 t nbio_v4_3_get_clockgating_state +ffffffff81e4dd60 t nbio_v4_3_ih_control +ffffffff81e4deb0 t nbio_v4_3_init_registers +ffffffff81e4dee0 t nbio_v4_3_remap_hdp_registers +ffffffff81e4dfe0 t nbio_v4_3_program_aspm +ffffffff81e4ec70 t nbio_v4_3_get_rom_offset +ffffffff81e4ecf0 t nbio_v4_3_sriov_sdma_doorbell_range +ffffffff81e4ed20 t nbio_v4_3_sriov_vcn_doorbell_range +ffffffff81e4ed50 t nbio_v4_3_sriov_gc_doorbell_init +ffffffff81e4ed80 t nbio_v4_3_sriov_ih_doorbell_range +ffffffff81e4f000 t nbio_v6_1_get_hdp_flush_req_offset +ffffffff81e4f040 t nbio_v6_1_get_hdp_flush_done_offset +ffffffff81e4f080 t nbio_v6_1_get_pcie_index_offset +ffffffff81e4f0b0 t nbio_v6_1_get_pcie_data_offset +ffffffff81e4f0e0 t nbio_v6_1_get_rev_id +ffffffff81e4f160 t nbio_v6_1_mc_access_enable +ffffffff81e4f210 t nbio_v6_1_get_memsize +ffffffff81e4f270 t nbio_v6_1_sdma_doorbell_range +ffffffff81e4f300 t nbio_v6_1_enable_doorbell_aperture +ffffffff81e4f3f0 t nbio_v6_1_enable_doorbell_selfring_aperture +ffffffff81e4f550 t nbio_v6_1_ih_doorbell_range +ffffffff81e4f660 t nbio_v6_1_update_medium_grain_clock_gating +ffffffff81e4f700 t nbio_v6_1_update_medium_grain_light_sleep +ffffffff81e4f7a0 t nbio_v6_1_get_clockgating_state +ffffffff81e4f820 t nbio_v6_1_ih_control +ffffffff81e4f970 t nbio_v6_1_init_registers +ffffffff81e4fa40 t nbio_v6_1_remap_hdp_registers +ffffffff81e4fb40 t nbio_v6_1_program_aspm +ffffffff81e50000 t nbio_v7_0_get_hdp_flush_req_offset +ffffffff81e50040 t nbio_v7_0_get_hdp_flush_done_offset +ffffffff81e50080 t nbio_v7_0_get_pcie_index_offset +ffffffff81e500b0 t nbio_v7_0_get_pcie_data_offset +ffffffff81e500e0 t nbio_v7_0_get_rev_id +ffffffff81e50160 t nbio_v7_0_mc_access_enable +ffffffff81e50210 t nbio_v7_0_get_memsize +ffffffff81e50270 t nbio_v7_0_sdma_doorbell_range +ffffffff81e50300 t nbio_v7_0_vcn_doorbell_range +ffffffff81e50370 t nbio_v7_0_enable_doorbell_aperture +ffffffff81e50460 t nbio_v7_0_enable_doorbell_selfring_aperture +ffffffff81e50490 t nbio_v7_0_ih_doorbell_range +ffffffff81e505a0 t nbio_v7_0_update_medium_grain_clock_gating +ffffffff81e506e0 t nbio_v7_0_update_medium_grain_light_sleep +ffffffff81e50780 t nbio_v7_0_get_clockgating_state +ffffffff81e50800 t nbio_v7_0_ih_control +ffffffff81e50950 t nbio_v7_0_init_registers +ffffffff81e509a0 t nbio_v7_0_remap_hdp_registers +ffffffff81e50aa0 t nbio_7_0_read_syshub_ind_mmr +ffffffff81e50b70 t nbio_7_0_write_syshub_ind_mmr +ffffffff81e51000 t nbio_v7_2_get_hdp_flush_req_offset +ffffffff81e51040 t nbio_v7_2_get_hdp_flush_done_offset +ffffffff81e51080 t nbio_v7_2_get_pcie_index_offset +ffffffff81e510b0 t nbio_v7_2_get_pcie_data_offset +ffffffff81e510e0 t nbio_v7_2_get_pcie_port_index_offset +ffffffff81e51110 t nbio_v7_2_get_pcie_port_data_offset +ffffffff81e51140 t nbio_v7_2_get_rev_id +ffffffff81e51220 t nbio_v7_2_mc_access_enable +ffffffff81e51360 t nbio_v7_2_get_memsize +ffffffff81e513c0 t nbio_v7_2_sdma_doorbell_range +ffffffff81e51450 t nbio_v7_2_vcn_doorbell_range +ffffffff81e514d0 t nbio_v7_2_enable_doorbell_aperture +ffffffff81e515b0 t nbio_v7_2_enable_doorbell_selfring_aperture +ffffffff81e51710 t nbio_v7_2_ih_doorbell_range +ffffffff81e51790 t nbio_v7_2_update_medium_grain_clock_gating +ffffffff81e51840 t nbio_v7_2_update_medium_grain_light_sleep +ffffffff81e519d0 t nbio_v7_2_get_clockgating_state +ffffffff81e51a60 t nbio_v7_2_ih_control +ffffffff81e51bb0 t nbio_v7_2_init_registers +ffffffff81e51c90 t nbio_v7_2_remap_hdp_registers +ffffffff81e52000 t nbio_v7_4_query_ras_error_count +ffffffff81e521a0 t nbio_v7_4_handle_ras_controller_intr_no_bifring +ffffffff81e523d0 t nbio_v7_4_handle_ras_err_event_athub_intr_no_bifring +ffffffff81e52580 t nbio_v7_4_init_ras_controller_interrupt +ffffffff81e525c0 t nbio_v7_4_init_ras_err_event_athub_interrupt +ffffffff81e52600 t nbio_v7_4_get_hdp_flush_req_offset +ffffffff81e52640 t nbio_v7_4_get_hdp_flush_done_offset +ffffffff81e52680 t nbio_v7_4_get_pcie_index_offset +ffffffff81e526b0 t nbio_v7_4_get_pcie_data_offset +ffffffff81e526e0 t nbio_v7_4_get_rev_id +ffffffff81e527a0 t nbio_v7_4_mc_access_enable +ffffffff81e52850 t nbio_v7_4_get_memsize +ffffffff81e528b0 t nbio_v7_4_sdma_doorbell_range +ffffffff81e52970 t nbio_v7_4_vcn_doorbell_range +ffffffff81e52a10 t nbio_v7_4_enable_doorbell_aperture +ffffffff81e52b00 t nbio_v7_4_enable_doorbell_selfring_aperture +ffffffff81e52c60 t nbio_v7_4_ih_doorbell_range +ffffffff81e52d70 t nbio_v7_4_enable_doorbell_interrupt +ffffffff81e52eb0 t nbio_v7_4_update_medium_grain_clock_gating +ffffffff81e52ee0 t nbio_v7_4_update_medium_grain_light_sleep +ffffffff81e52f80 t nbio_v7_4_get_clockgating_state +ffffffff81e53000 t nbio_v7_4_ih_control +ffffffff81e53150 t nbio_v7_4_init_registers +ffffffff81e53230 t nbio_v7_4_remap_hdp_registers +ffffffff81e53330 t nbio_v7_4_program_aspm +ffffffff81e53730 t nbio_v7_4_set_ras_controller_irq_state +ffffffff81e538c0 t nbio_v7_4_process_ras_controller_irq +ffffffff81e538f0 t nbio_v7_4_set_ras_err_event_athub_irq_state +ffffffff81e53a80 t nbio_v7_4_process_err_event_athub_irq +ffffffff81e54000 t nbio_v7_7_get_hdp_flush_req_offset +ffffffff81e54040 t nbio_v7_7_get_hdp_flush_done_offset +ffffffff81e54080 t nbio_v7_7_get_pcie_index_offset +ffffffff81e540b0 t nbio_v7_7_get_pcie_data_offset +ffffffff81e540e0 t nbio_v7_7_get_pcie_port_index_offset +ffffffff81e54110 t nbio_v7_7_get_pcie_port_data_offset +ffffffff81e54140 t nbio_v7_7_get_rev_id +ffffffff81e541c0 t nbio_v7_7_mc_access_enable +ffffffff81e54270 t nbio_v7_7_get_memsize +ffffffff81e542d0 t nbio_v7_7_sdma_doorbell_range +ffffffff81e54360 t nbio_v7_7_vcn_doorbell_range +ffffffff81e543e0 t nbio_v7_7_enable_doorbell_aperture +ffffffff81e544c0 t nbio_v7_7_enable_doorbell_selfring_aperture +ffffffff81e54620 t nbio_v7_7_ih_doorbell_range +ffffffff81e54730 t nbio_v7_7_update_medium_grain_clock_gating +ffffffff81e54860 t nbio_v7_7_update_medium_grain_light_sleep +ffffffff81e54a60 t nbio_v7_7_get_clockgating_state +ffffffff81e54b70 t nbio_v7_7_ih_control +ffffffff81e54cc0 t nbio_v7_7_init_registers +ffffffff81e54dc0 t nbio_v7_7_remap_hdp_registers +ffffffff81e55000 T nv_grbm_select +ffffffff81e55090 T nv_set_virt_ops +ffffffff81e550c0 t nv_common_early_init +ffffffff81e554a0 t nv_common_late_init +ffffffff81e55500 t nv_common_sw_init +ffffffff81e55540 t nv_common_sw_fini +ffffffff81e55570 t nv_common_hw_init +ffffffff81e55680 t nv_common_hw_fini +ffffffff81e556e0 t nv_common_suspend +ffffffff81e55740 t nv_common_resume +ffffffff81e55780 t nv_common_is_idle +ffffffff81e557b0 t nv_common_wait_for_idle +ffffffff81e557e0 t nv_common_soft_reset +ffffffff81e55810 t nv_common_set_clockgating_state +ffffffff81e558e0 t nv_common_set_powergating_state +ffffffff81e55910 t nv_common_get_clockgating_state +ffffffff81e55980 t nv_pcie_rreg +ffffffff81e559e0 t nv_pcie_wreg +ffffffff81e55a40 t nv_pcie_rreg64 +ffffffff81e55aa0 t nv_pcie_wreg64 +ffffffff81e55b00 t nv_didt_rreg +ffffffff81e55b90 t nv_didt_wreg +ffffffff81e55c10 t nv_read_disabled_bios +ffffffff81e55c40 t nv_read_register +ffffffff81e55d20 t nv_vga_set_state +ffffffff81e55d50 t nv_asic_reset +ffffffff81e55e90 t nv_asic_reset_method +ffffffff81e55f80 t nv_get_xclk +ffffffff81e55fb0 t nv_set_uvd_clocks +ffffffff81e55fe0 t nv_set_vce_clocks +ffffffff81e56010 t nv_get_config_memsize +ffffffff81e56030 t nv_need_full_reset +ffffffff81e56060 t nv_init_doorbell_index +ffffffff81e56190 t nv_need_reset_on_init +ffffffff81e56220 t nv_get_pcie_replay_count +ffffffff81e56250 t nv_pre_asic_init +ffffffff81e56280 t nv_update_umd_stable_pstate +ffffffff81e56330 t nv_query_video_codecs +ffffffff81e57000 T psp_v10_0_set_psp_funcs +ffffffff81e57030 t psp_v10_0_init_microcode +ffffffff81e572a0 t psp_v10_0_ring_init +ffffffff81e57320 t psp_v10_0_ring_create +ffffffff81e57620 t psp_v10_0_ring_stop +ffffffff81e57810 t psp_v10_0_ring_destroy +ffffffff81e57880 t psp_v10_0_mode1_reset +ffffffff81e578c0 t psp_v10_0_ring_get_wptr +ffffffff81e57920 t psp_v10_0_ring_set_wptr +ffffffff81e58000 T psp_v11_0_set_psp_funcs +ffffffff81e58030 t psp_v11_0_init_microcode +ffffffff81e58450 t psp_v11_0_bootloader_load_kdb +ffffffff81e58470 t psp_v11_0_bootloader_load_spl +ffffffff81e58490 t psp_v11_0_bootloader_load_sysdrv +ffffffff81e584b0 t psp_v11_0_bootloader_load_sos +ffffffff81e58800 t psp_v11_0_ring_init +ffffffff81e58880 t psp_v11_0_ring_create +ffffffff81e58f10 t psp_v11_0_ring_stop +ffffffff81e59130 t psp_v11_0_ring_destroy +ffffffff81e591a0 t psp_v11_0_mode1_reset +ffffffff81e59290 t psp_v11_0_memory_training +ffffffff81e59710 t psp_v11_0_ring_get_wptr +ffffffff81e59760 t psp_v11_0_ring_set_wptr +ffffffff81e598a0 t psp_v11_0_load_usbc_pd_fw +ffffffff81e59a90 t psp_v11_0_read_usbc_pd_fw +ffffffff81e59bb0 t psp_v11_0_bootloader_load_component +ffffffff81e59d70 t psp_v11_0_wait_for_bootloader +ffffffff81e59f40 t psp_v11_0_memory_training_send_msg +ffffffff81e5b000 T psp_v11_0_8_set_psp_funcs +ffffffff81e5b030 t psp_v11_0_8_ring_init +ffffffff81e5b0b0 t psp_v11_0_8_ring_create +ffffffff81e5b740 t psp_v11_0_8_ring_stop +ffffffff81e5bac0 t psp_v11_0_8_ring_destroy +ffffffff81e5bb30 t psp_v11_0_8_ring_get_wptr +ffffffff81e5bba0 t psp_v11_0_8_ring_set_wptr +ffffffff81e5c000 T psp_v12_0_set_psp_funcs +ffffffff81e5c030 t psp_v12_0_init_microcode +ffffffff81e5c290 t psp_v12_0_bootloader_load_sysdrv +ffffffff81e5c5b0 t psp_v12_0_bootloader_load_sos +ffffffff81e5c910 t psp_v12_0_ring_init +ffffffff81e5cee0 t psp_v12_0_ring_create +ffffffff81e5d430 t psp_v12_0_ring_stop +ffffffff81e5d650 t psp_v12_0_ring_destroy +ffffffff81e5d6c0 t psp_v12_0_mode1_reset +ffffffff81e5d7b0 t psp_v12_0_ring_get_wptr +ffffffff81e5d820 t psp_v12_0_ring_set_wptr +ffffffff81e5e000 T psp_v13_0_set_psp_funcs +ffffffff81e5e030 t psp_v13_0_init_microcode +ffffffff81e5e160 t psp_v13_0_bootloader_load_kdb +ffffffff81e5e180 t psp_v13_0_bootloader_load_spl +ffffffff81e5e1a0 t psp_v13_0_bootloader_load_sysdrv +ffffffff81e5e1c0 t psp_v13_0_bootloader_load_soc_drv +ffffffff81e5e1e0 t psp_v13_0_bootloader_load_intf_drv +ffffffff81e5e200 t psp_v13_0_bootloader_load_dbg_drv +ffffffff81e5e220 t psp_v13_0_bootloader_load_ras_drv +ffffffff81e5e240 t psp_v13_0_bootloader_load_sos +ffffffff81e5e5a0 t psp_v13_0_ring_init +ffffffff81e5e620 t psp_v13_0_ring_create +ffffffff81e5ecb0 t psp_v13_0_ring_stop +ffffffff81e5f030 t psp_v13_0_ring_destroy +ffffffff81e5f0a0 t psp_v13_0_memory_training +ffffffff81e5f4e0 t psp_v13_0_ring_get_wptr +ffffffff81e5f550 t psp_v13_0_ring_set_wptr +ffffffff81e5f640 t psp_v13_0_load_usbc_pd_fw +ffffffff81e5f830 t psp_v13_0_read_usbc_pd_fw +ffffffff81e5f950 t psp_v13_0_update_spirom +ffffffff81e5fb20 t psp_v13_0_vbflash_status +ffffffff81e5fb80 t psp_v13_0_bootloader_load_component +ffffffff81e5fd50 t psp_v13_0_wait_for_bootloader +ffffffff81e5ff20 t psp_v13_0_memory_training_send_msg +ffffffff81e60080 t psp_v13_0_exec_spi_cmd +ffffffff81e61000 T psp_v13_0_4_set_psp_funcs +ffffffff81e61030 t psp_v13_0_4_init_microcode +ffffffff81e61100 t psp_v13_0_4_bootloader_load_kdb +ffffffff81e61120 t psp_v13_0_4_bootloader_load_spl +ffffffff81e61140 t psp_v13_0_4_bootloader_load_sysdrv +ffffffff81e61160 t psp_v13_0_4_bootloader_load_soc_drv +ffffffff81e61180 t psp_v13_0_4_bootloader_load_intf_drv +ffffffff81e611a0 t psp_v13_0_4_bootloader_load_dbg_drv +ffffffff81e611c0 t psp_v13_0_4_bootloader_load_sos +ffffffff81e61530 t psp_v13_0_4_ring_init +ffffffff81e615b0 t psp_v13_0_4_ring_create +ffffffff81e61c50 t psp_v13_0_4_ring_stop +ffffffff81e61fe0 t psp_v13_0_4_ring_destroy +ffffffff81e62050 t psp_v13_0_4_ring_get_wptr +ffffffff81e620c0 t psp_v13_0_4_ring_set_wptr +ffffffff81e621c0 t psp_v13_0_4_bootloader_load_component +ffffffff81e62390 t psp_v13_0_4_wait_for_bootloader +ffffffff81e63000 T psp_v3_1_set_psp_funcs +ffffffff81e63030 t psp_v3_1_init_microcode +ffffffff81e630e0 t psp_v3_1_bootloader_load_sysdrv +ffffffff81e63400 t psp_v3_1_bootloader_load_sos +ffffffff81e63760 t psp_v3_1_ring_init +ffffffff81e637e0 t psp_v3_1_ring_create +ffffffff81e642e0 t psp_v3_1_ring_stop +ffffffff81e64500 t psp_v3_1_ring_destroy +ffffffff81e64570 t psp_v3_1_smu_reload_quirk +ffffffff81e645c0 t psp_v3_1_mode1_reset +ffffffff81e646b0 t psp_v3_1_ring_get_wptr +ffffffff81e64700 t psp_v3_1_ring_set_wptr +ffffffff81e65000 t sdma_v2_4_early_init +ffffffff81e650e0 t sdma_v2_4_sw_init +ffffffff81e65470 t sdma_v2_4_sw_fini +ffffffff81e65550 t sdma_v2_4_hw_init +ffffffff81e65900 t sdma_v2_4_hw_fini +ffffffff81e65940 t sdma_v2_4_suspend +ffffffff81e65980 t sdma_v2_4_resume +ffffffff81e65990 t sdma_v2_4_is_idle +ffffffff81e659d0 t sdma_v2_4_wait_for_idle +ffffffff81e65a60 t sdma_v2_4_soft_reset +ffffffff81e65ba0 t sdma_v2_4_set_clockgating_state +ffffffff81e65bd0 t sdma_v2_4_set_powergating_state +ffffffff81e65c00 t sdma_v2_4_ring_get_rptr +ffffffff81e65c30 t sdma_v2_4_ring_get_wptr +ffffffff81e65c80 t sdma_v2_4_ring_set_wptr +ffffffff81e65cb0 t sdma_v2_4_ring_emit_ib +ffffffff81e65f60 t sdma_v2_4_ring_emit_fence +ffffffff81e66360 t sdma_v2_4_ring_emit_pipeline_sync +ffffffff81e665e0 t sdma_v2_4_ring_emit_vm_flush +ffffffff81e66860 t sdma_v2_4_ring_emit_hdp_flush +ffffffff81e66ae0 t sdma_v2_4_ring_test_ring +ffffffff81e66dc0 t sdma_v2_4_ring_test_ib +ffffffff81e66fa0 t sdma_v2_4_ring_insert_nop +ffffffff81e670c0 t sdma_v2_4_ring_pad_ib +ffffffff81e671e0 t sdma_v2_4_ring_emit_wreg +ffffffff81e67330 t sdma_v2_4_emit_copy_buffer +ffffffff81e673e0 t sdma_v2_4_emit_fill_buffer +ffffffff81e67470 t sdma_v2_4_vm_copy_pte +ffffffff81e67520 t sdma_v2_4_vm_write_pte +ffffffff81e675f0 t sdma_v2_4_vm_set_pte_pde +ffffffff81e676e0 t sdma_v2_4_set_trap_irq_state +ffffffff81e677a0 t sdma_v2_4_process_trap_irq +ffffffff81e67830 t sdma_v2_4_process_illegal_inst_irq +ffffffff81e678b0 t sdma_v2_4_enable +ffffffff81e68000 t sdma_v3_0_early_init +ffffffff81e68140 t sdma_v3_0_sw_init +ffffffff81e684f0 t sdma_v3_0_sw_fini +ffffffff81e685d0 t sdma_v3_0_hw_init +ffffffff81e68700 t sdma_v3_0_hw_fini +ffffffff81e68740 t sdma_v3_0_suspend +ffffffff81e68780 t sdma_v3_0_resume +ffffffff81e68790 t sdma_v3_0_is_idle +ffffffff81e687d0 t sdma_v3_0_wait_for_idle +ffffffff81e68860 t sdma_v3_0_check_soft_reset +ffffffff81e688b0 t sdma_v3_0_pre_soft_reset +ffffffff81e68900 t sdma_v3_0_soft_reset +ffffffff81e689c0 t sdma_v3_0_post_soft_reset +ffffffff81e68a00 t sdma_v3_0_set_clockgating_state +ffffffff81e68c60 t sdma_v3_0_set_powergating_state +ffffffff81e68c90 t sdma_v3_0_get_clockgating_state +ffffffff81e68d10 t sdma_v3_0_ring_get_rptr +ffffffff81e68d40 t sdma_v3_0_ring_get_wptr +ffffffff81e68dc0 t sdma_v3_0_ring_set_wptr +ffffffff81e68e70 t sdma_v3_0_ring_emit_ib +ffffffff81e69120 t sdma_v3_0_ring_emit_fence +ffffffff81e69520 t sdma_v3_0_ring_emit_pipeline_sync +ffffffff81e697a0 t sdma_v3_0_ring_emit_vm_flush +ffffffff81e69a20 t sdma_v3_0_ring_emit_hdp_flush +ffffffff81e69ca0 t sdma_v3_0_ring_test_ring +ffffffff81e69f80 t sdma_v3_0_ring_test_ib +ffffffff81e6a160 t sdma_v3_0_ring_insert_nop +ffffffff81e6a280 t sdma_v3_0_ring_pad_ib +ffffffff81e6a3a0 t sdma_v3_0_ring_emit_wreg +ffffffff81e6a4f0 t sdma_v3_0_emit_copy_buffer +ffffffff81e6a5a0 t sdma_v3_0_emit_fill_buffer +ffffffff81e6a630 t sdma_v3_0_vm_copy_pte +ffffffff81e6a6e0 t sdma_v3_0_vm_write_pte +ffffffff81e6a7b0 t sdma_v3_0_vm_set_pte_pde +ffffffff81e6a8a0 t sdma_v3_0_set_trap_irq_state +ffffffff81e6a960 t sdma_v3_0_process_trap_irq +ffffffff81e6a9f0 t sdma_v3_0_process_illegal_inst_irq +ffffffff81e6aa70 t sdma_v3_0_ctx_switch_enable +ffffffff81e6ac00 t sdma_v3_0_enable +ffffffff81e6ad70 t sdma_v3_0_gfx_resume +ffffffff81e6c000 t sdma_v4_0_early_init +ffffffff81e6c580 t sdma_v4_0_late_init +ffffffff81e6c820 t sdma_v4_0_sw_init +ffffffff81e6cb90 t sdma_v4_0_sw_fini +ffffffff81e6cc50 t sdma_v4_0_hw_init +ffffffff81e6fbf0 t sdma_v4_0_hw_fini +ffffffff81e6fca0 t sdma_v4_0_suspend +ffffffff81e6fcf0 t sdma_v4_0_resume +ffffffff81e6fd60 t sdma_v4_0_is_idle +ffffffff81e6fe90 t sdma_v4_0_wait_for_idle +ffffffff81e70030 t sdma_v4_0_soft_reset +ffffffff81e70060 t sdma_v4_0_set_clockgating_state +ffffffff81e70550 t sdma_v4_0_set_powergating_state +ffffffff81e70610 t sdma_v4_0_get_clockgating_state +ffffffff81e706a0 t sdma_v4_0_query_ras_error_count +ffffffff81e70870 t sdma_v4_0_reset_ras_error_count +ffffffff81e709c0 t sdma_v4_0_ring_get_rptr +ffffffff81e70a20 t sdma_v4_0_ring_get_wptr +ffffffff81e70c10 t sdma_v4_0_ring_set_wptr +ffffffff81e70e90 t sdma_v4_0_ring_emit_ib +ffffffff81e71140 t sdma_v4_0_ring_emit_fence +ffffffff81e71570 t sdma_v4_0_ring_emit_pipeline_sync +ffffffff81e715c0 t sdma_v4_0_ring_emit_vm_flush +ffffffff81e715e0 t sdma_v4_0_ring_emit_hdp_flush +ffffffff81e71680 t sdma_v4_0_ring_test_ring +ffffffff81e71960 t sdma_v4_0_ring_test_ib +ffffffff81e71b40 t sdma_v4_0_ring_insert_nop +ffffffff81e71c60 t sdma_v4_0_ring_pad_ib +ffffffff81e71d80 t sdma_v4_0_ring_emit_wreg +ffffffff81e71ed0 t sdma_v4_0_ring_emit_reg_wait +ffffffff81e71f20 t sdma_v4_0_wait_reg_mem +ffffffff81e72250 t sdma_v4_0_page_ring_get_wptr +ffffffff81e72400 t sdma_v4_0_page_ring_set_wptr +ffffffff81e725c0 t sdma_v4_0_emit_copy_buffer +ffffffff81e72680 t sdma_v4_0_emit_fill_buffer +ffffffff81e72710 t sdma_v4_0_vm_copy_pte +ffffffff81e727d0 t sdma_v4_0_vm_write_pte +ffffffff81e728a0 t sdma_v4_0_vm_set_pte_pde +ffffffff81e729a0 t sdma_v4_0_set_trap_irq_state +ffffffff81e72b40 t sdma_v4_0_process_trap_irq +ffffffff81e72c80 t sdma_v4_0_process_illegal_inst_irq +ffffffff81e72da0 t sdma_v4_0_set_ecc_irq_state +ffffffff81e72f40 t sdma_v4_0_process_vm_hole_irq +ffffffff81e73080 t sdma_v4_0_process_doorbell_invalid_irq +ffffffff81e731c0 t sdma_v4_0_process_pool_timeout_irq +ffffffff81e73300 t sdma_v4_0_process_srbm_write_irq +ffffffff81e73440 t sdma_v4_0_process_ras_data_cb +ffffffff81e734b0 t sdma_v4_0_ctx_switch_enable +ffffffff81e73b60 t sdma_v4_0_enable +ffffffff81e74100 t sdma_v4_0_gfx_enable +ffffffff81e75000 t sdma_v4_4_query_ras_error_count +ffffffff81e75270 t sdma_v4_4_reset_ras_error_count +ffffffff81e76000 t sdma_v5_0_early_init +ffffffff81e76170 t sdma_v5_0_sw_init +ffffffff81e76410 t sdma_v5_0_sw_fini +ffffffff81e76490 t sdma_v5_0_hw_init +ffffffff81e77740 t sdma_v5_0_hw_fini +ffffffff81e777a0 t sdma_v5_0_suspend +ffffffff81e77800 t sdma_v5_0_resume +ffffffff81e77810 t sdma_v5_0_is_idle +ffffffff81e778a0 t sdma_v5_0_wait_for_idle +ffffffff81e77960 t sdma_v5_0_soft_reset +ffffffff81e77990 t sdma_v5_0_set_clockgating_state +ffffffff81e77b90 t sdma_v5_0_set_powergating_state +ffffffff81e77bc0 t sdma_v5_0_get_clockgating_state +ffffffff81e77c50 t sdma_v5_0_ring_get_rptr +ffffffff81e77cb0 t sdma_v5_0_ring_get_wptr +ffffffff81e77e50 t sdma_v5_0_ring_set_wptr +ffffffff81e781b0 t sdma_v5_0_ring_emit_ib +ffffffff81e78470 t sdma_v5_0_ring_emit_fence +ffffffff81e788d0 t sdma_v5_0_ring_emit_pipeline_sync +ffffffff81e78b50 t sdma_v5_0_ring_emit_vm_flush +ffffffff81e78b70 t sdma_v5_0_ring_emit_hdp_flush +ffffffff81e78e10 t sdma_v5_0_ring_test_ring +ffffffff81e791e0 t sdma_v5_0_ring_test_ib +ffffffff81e79500 t sdma_v5_0_ring_insert_nop +ffffffff81e79620 t sdma_v5_0_ring_pad_ib +ffffffff81e79740 t sdma_v5_0_ring_init_cond_exec +ffffffff81e79970 t sdma_v5_0_ring_patch_cond_exec +ffffffff81e79a30 t sdma_v5_0_ring_emit_wreg +ffffffff81e79b80 t sdma_v5_0_ring_emit_reg_wait +ffffffff81e79e00 t sdma_v5_0_ring_emit_reg_write_reg_wait +ffffffff81e79e70 t sdma_v5_0_ring_preempt_ib +ffffffff81e79fb0 t sdma_v5_0_ring_emit_mem_sync +ffffffff81e7a1c0 t sdma_v5_0_emit_copy_buffer +ffffffff81e7a280 t sdma_v5_0_emit_fill_buffer +ffffffff81e7a310 t sdma_v5_0_vm_copy_pte +ffffffff81e7a3d0 t sdma_v5_0_vm_write_pte +ffffffff81e7a4a0 t sdma_v5_0_vm_set_pte_pde +ffffffff81e7a5a0 t sdma_v5_0_set_trap_irq_state +ffffffff81e7a630 t sdma_v5_0_process_trap_irq +ffffffff81e7a740 t sdma_v5_0_process_illegal_inst_irq +ffffffff81e7a770 t sdma_v5_0_mqd_init +ffffffff81e7a850 t sdma_v5_0_ctx_switch_enable +ffffffff81e7ab50 t sdma_v5_0_enable +ffffffff81e7b000 t sdma_v5_2_early_init +ffffffff81e7b170 t sdma_v5_2_sw_init +ffffffff81e7b3a0 t sdma_v5_2_sw_fini +ffffffff81e7b420 t sdma_v5_2_hw_init +ffffffff81e7b750 t sdma_v5_2_hw_fini +ffffffff81e7b7b0 t sdma_v5_2_suspend +ffffffff81e7b810 t sdma_v5_2_resume +ffffffff81e7b820 t sdma_v5_2_is_idle +ffffffff81e7b8d0 t sdma_v5_2_wait_for_idle +ffffffff81e7b9d0 t sdma_v5_2_soft_reset +ffffffff81e7bc70 t sdma_v5_2_set_clockgating_state +ffffffff81e7bf80 t sdma_v5_2_set_powergating_state +ffffffff81e7bfb0 t sdma_v5_2_get_clockgating_state +ffffffff81e7c040 t sdma_v5_2_ring_get_rptr +ffffffff81e7c0a0 t sdma_v5_2_ring_get_wptr +ffffffff81e7c1e0 t sdma_v5_2_ring_set_wptr +ffffffff81e7c3a0 t sdma_v5_2_ring_emit_ib +ffffffff81e7c660 t sdma_v5_2_ring_emit_fence +ffffffff81e7cac0 t sdma_v5_2_ring_emit_pipeline_sync +ffffffff81e7cd40 t sdma_v5_2_ring_emit_vm_flush +ffffffff81e7cd60 t sdma_v5_2_ring_emit_hdp_flush +ffffffff81e7d000 t sdma_v5_2_ring_test_ring +ffffffff81e7d3d0 t sdma_v5_2_ring_test_ib +ffffffff81e7d6f0 t sdma_v5_2_ring_insert_nop +ffffffff81e7d810 t sdma_v5_2_ring_pad_ib +ffffffff81e7d930 t sdma_v5_2_ring_init_cond_exec +ffffffff81e7db60 t sdma_v5_2_ring_patch_cond_exec +ffffffff81e7dc20 t sdma_v5_2_ring_emit_wreg +ffffffff81e7dd70 t sdma_v5_2_ring_emit_reg_wait +ffffffff81e7dff0 t sdma_v5_2_ring_emit_reg_write_reg_wait +ffffffff81e7e060 t sdma_v5_2_ring_preempt_ib +ffffffff81e7e1d0 t sdma_v5_2_ring_emit_mem_sync +ffffffff81e7e3e0 t sdma_v5_2_emit_copy_buffer +ffffffff81e7e4a0 t sdma_v5_2_emit_fill_buffer +ffffffff81e7e530 t sdma_v5_2_vm_copy_pte +ffffffff81e7e5f0 t sdma_v5_2_vm_write_pte +ffffffff81e7e6c0 t sdma_v5_2_vm_set_pte_pde +ffffffff81e7e7c0 t sdma_v5_2_set_trap_irq_state +ffffffff81e7e880 t sdma_v5_2_process_trap_irq +ffffffff81e7e9c0 t sdma_v5_2_process_illegal_inst_irq +ffffffff81e7e9f0 t sdma_v5_2_mqd_init +ffffffff81e7ead0 t sdma_v5_2_ctx_switch_enable +ffffffff81e7eed0 t sdma_v5_2_enable +ffffffff81e7f2e0 t sdma_v5_2_gfx_resume +ffffffff81e81000 t sdma_v6_0_early_init +ffffffff81e81140 t sdma_v6_0_sw_init +ffffffff81e81320 t sdma_v6_0_sw_fini +ffffffff81e813a0 t sdma_v6_0_hw_init +ffffffff81e813b0 t sdma_v6_0_hw_fini +ffffffff81e81400 t sdma_v6_0_suspend +ffffffff81e81450 t sdma_v6_0_resume +ffffffff81e81460 t sdma_v6_0_is_idle +ffffffff81e814f0 t sdma_v6_0_wait_for_idle +ffffffff81e815b0 t sdma_v6_0_check_soft_reset +ffffffff81e81670 t sdma_v6_0_soft_reset +ffffffff81e81b10 t sdma_v6_0_set_clockgating_state +ffffffff81e81b40 t sdma_v6_0_set_powergating_state +ffffffff81e81b70 t sdma_v6_0_get_clockgating_state +ffffffff81e81ba0 t sdma_v6_0_ring_get_rptr +ffffffff81e81c00 t sdma_v6_0_ring_get_wptr +ffffffff81e81c70 t sdma_v6_0_ring_set_wptr +ffffffff81e81fd0 t sdma_v6_0_ring_emit_ib +ffffffff81e82290 t sdma_v6_0_ring_emit_fence +ffffffff81e826f0 t sdma_v6_0_ring_emit_pipeline_sync +ffffffff81e82970 t sdma_v6_0_ring_emit_vm_flush +ffffffff81e82990 t sdma_v6_0_ring_emit_hdp_flush +ffffffff81e82c30 t sdma_v6_0_ring_test_ring +ffffffff81e83000 t sdma_v6_0_ring_test_ib +ffffffff81e83320 t sdma_v6_0_ring_insert_nop +ffffffff81e83440 t sdma_v6_0_ring_pad_ib +ffffffff81e83560 t sdma_v6_0_ring_init_cond_exec +ffffffff81e83790 t sdma_v6_0_ring_patch_cond_exec +ffffffff81e83850 t sdma_v6_0_ring_emit_wreg +ffffffff81e839a0 t sdma_v6_0_ring_emit_reg_wait +ffffffff81e83c20 t sdma_v6_0_ring_emit_reg_write_reg_wait +ffffffff81e83c90 t sdma_v6_0_ring_preempt_ib +ffffffff81e83de0 t sdma_v6_0_ring_emit_mem_sync +ffffffff81e83ff0 t sdma_v6_0_emit_copy_buffer +ffffffff81e840b0 t sdma_v6_0_emit_fill_buffer +ffffffff81e84140 t sdma_v6_0_vm_copy_pte +ffffffff81e84200 t sdma_v6_0_vm_write_pte +ffffffff81e842d0 t sdma_v6_0_vm_set_pte_pde +ffffffff81e843d0 t sdma_v6_0_set_trap_irq_state +ffffffff81e84460 t sdma_v6_0_process_trap_irq +ffffffff81e84590 t sdma_v6_0_process_illegal_inst_irq +ffffffff81e845c0 t sdma_v6_0_mqd_init +ffffffff81e846d0 t sdma_v6_0_start +ffffffff81e84950 t sdma_v6_0_enable +ffffffff81e84ad0 t sdma_v6_0_gfx_resume +ffffffff81e85b50 t sdma_v6_0_gfx_stop +ffffffff81e86000 T sienna_cichlid_reset_init +ffffffff81e860c0 t sienna_cichlid_async_reset +ffffffff81e86120 t sienna_cichlid_get_reset_handler +ffffffff81e86180 T sienna_cichlid_reset_fini +ffffffff81e861d0 t sienna_cichlid_mode2_prepare_hwcontext +ffffffff81e86320 t sienna_cichlid_mode2_perform_reset +ffffffff81e863a0 t sienna_cichlid_mode2_restore_hwcontext +ffffffff81e866a0 t sienna_cichlid_mode2_reset +ffffffff81e87000 T smu_v11_0_i2c_control_init +ffffffff81e870c0 T smu_v11_0_i2c_control_fini +ffffffff81e87100 t smu_v11_0_i2c_xfer +ffffffff81e881e0 t smu_v11_0_i2c_func +ffffffff81e88210 t smu_v11_0_i2c_enable +ffffffff81e88350 t smu_v11_0_i2c_abort +ffffffff81e88450 t lock_bus +ffffffff81e884e0 t trylock_bus +ffffffff81e88530 t unlock_bus +ffffffff81e89000 t smuio_v11_0_get_rom_index_offset +ffffffff81e89030 t smuio_v11_0_get_rom_data_offset +ffffffff81e89060 t smuio_v11_0_update_rom_clock_gating +ffffffff81e891a0 t smuio_v11_0_get_clock_gating_state +ffffffff81e8a000 t smuio_v11_0_6_get_rom_index_offset +ffffffff81e8a030 t smuio_v11_0_6_get_rom_data_offset +ffffffff81e8a060 t smuio_v11_0_6_update_rom_clock_gating +ffffffff81e8a1a0 t smuio_v11_0_6_get_clock_gating_state +ffffffff81e8b000 t smuio_v13_0_get_rom_index_offset +ffffffff81e8b030 t smuio_v13_0_get_rom_data_offset +ffffffff81e8b060 t smuio_v13_0_update_rom_clock_gating +ffffffff81e8b1a0 t smuio_v13_0_get_clock_gating_state +ffffffff81e8b230 t smuio_v13_0_get_die_id +ffffffff81e8b2b0 t smuio_v13_0_get_socket_id +ffffffff81e8b330 t smuio_v13_0_is_host_gpu_xgmi_supported +ffffffff81e8c000 t smuio_v13_0_6_get_rom_index_offset +ffffffff81e8c030 t smuio_v13_0_6_get_rom_data_offset +ffffffff81e8d000 t smuio_v9_0_get_rom_index_offset +ffffffff81e8d030 t smuio_v9_0_get_rom_data_offset +ffffffff81e8d060 t smuio_v9_0_update_rom_clock_gating +ffffffff81e8d1a0 t smuio_v9_0_get_clock_gating_state +ffffffff81e8e000 T soc15_grbm_select +ffffffff81e8e080 T soc15_program_register_sequence +ffffffff81e8e280 T soc15_set_virt_ops +ffffffff81e8e2f0 t soc15_common_early_init +ffffffff81e8e680 t soc15_common_late_init +ffffffff81e8e6c0 t soc15_common_sw_init +ffffffff81e8e720 t soc15_common_sw_fini +ffffffff81e8e770 t soc15_common_hw_init +ffffffff81e8e8a0 t soc15_common_hw_fini +ffffffff81e8e970 t soc15_common_suspend +ffffffff81e8e9b0 t soc15_common_resume +ffffffff81e8e9f0 t soc15_common_is_idle +ffffffff81e8ea20 t soc15_common_wait_for_idle +ffffffff81e8ea50 t soc15_common_soft_reset +ffffffff81e8ea80 t soc15_common_set_clockgating_state +ffffffff81e8edc0 t soc15_common_set_powergating_state +ffffffff81e8edf0 t soc15_common_get_clockgating_state +ffffffff81e8eed0 t soc15_pcie_rreg +ffffffff81e8ef30 t soc15_pcie_wreg +ffffffff81e8ef90 t soc15_pcie_rreg64 +ffffffff81e8eff0 t soc15_pcie_wreg64 +ffffffff81e8f050 t soc15_uvd_ctx_rreg +ffffffff81e8f0f0 t soc15_uvd_ctx_wreg +ffffffff81e8f170 t soc15_didt_rreg +ffffffff81e8f200 t soc15_didt_wreg +ffffffff81e8f280 t soc15_gc_cac_rreg +ffffffff81e8f390 t soc15_gc_cac_wreg +ffffffff81e8f4a0 t soc15_se_cac_rreg +ffffffff81e8f5b0 t soc15_se_cac_wreg +ffffffff81e8f6c0 t soc15_read_disabled_bios +ffffffff81e8f6f0 t soc15_read_register +ffffffff81e8f7f0 t soc15_vga_set_state +ffffffff81e8f820 t soc15_asic_reset +ffffffff81e8f920 t soc15_asic_reset_method +ffffffff81e8faa0 t soc15_get_xclk +ffffffff81e8faf0 t soc15_set_uvd_clocks +ffffffff81e8fb20 t soc15_set_vce_clocks +ffffffff81e8fb50 t soc15_get_config_memsize +ffffffff81e8fb70 t soc15_need_full_reset +ffffffff81e8fba0 t soc15_get_pcie_usage +ffffffff81e8fcd0 t soc15_need_reset_on_init +ffffffff81e8fd70 t soc15_get_pcie_replay_count +ffffffff81e8fde0 t soc15_supports_baco +ffffffff81e8fe40 t soc15_pre_asic_init +ffffffff81e8fe50 t soc15_query_video_codecs +ffffffff81e8fef0 t vega20_get_pcie_usage +ffffffff81e91000 T soc21_grbm_select +ffffffff81e91080 t soc21_common_early_init +ffffffff81e91290 t soc21_common_late_init +ffffffff81e912c0 t soc21_common_sw_init +ffffffff81e912f0 t soc21_common_sw_fini +ffffffff81e91320 t soc21_common_hw_init +ffffffff81e913e0 t soc21_common_hw_fini +ffffffff81e91440 t soc21_common_suspend +ffffffff81e914a0 t soc21_common_resume +ffffffff81e91560 t soc21_common_is_idle +ffffffff81e91590 t soc21_common_wait_for_idle +ffffffff81e915c0 t soc21_common_soft_reset +ffffffff81e915f0 t soc21_common_set_clockgating_state +ffffffff81e916a0 t soc21_common_set_powergating_state +ffffffff81e91700 t soc21_common_get_clockgating_state +ffffffff81e91740 t soc21_pcie_rreg +ffffffff81e917a0 t soc21_pcie_wreg +ffffffff81e91800 t soc21_pcie_rreg64 +ffffffff81e91860 t soc21_pcie_wreg64 +ffffffff81e918c0 t soc21_didt_rreg +ffffffff81e91950 t soc21_didt_wreg +ffffffff81e919d0 t soc21_read_disabled_bios +ffffffff81e91a00 t soc21_read_register +ffffffff81e91af0 t soc21_vga_set_state +ffffffff81e91b20 t soc21_asic_reset +ffffffff81e91bf0 t soc21_asic_reset_method +ffffffff81e91cc0 t soc21_get_xclk +ffffffff81e91cf0 t soc21_set_uvd_clocks +ffffffff81e91d20 t soc21_set_vce_clocks +ffffffff81e91d50 t soc21_get_config_memsize +ffffffff81e91d70 t soc21_need_full_reset +ffffffff81e91dd0 t soc21_init_doorbell_index +ffffffff81e91ef0 t soc21_need_reset_on_init +ffffffff81e91f80 t soc21_get_pcie_replay_count +ffffffff81e91fb0 t soc21_pre_asic_init +ffffffff81e91fe0 t soc21_update_umd_stable_pstate +ffffffff81e92050 t soc21_query_video_codecs +ffffffff81e93000 t tonga_ih_early_init +ffffffff81e93050 t tonga_ih_sw_init +ffffffff81e930d0 t tonga_ih_sw_fini +ffffffff81e93110 t tonga_ih_hw_init +ffffffff81e932f0 t tonga_ih_hw_fini +ffffffff81e93390 t tonga_ih_suspend +ffffffff81e93430 t tonga_ih_resume +ffffffff81e93470 t tonga_ih_is_idle +ffffffff81e934b0 t tonga_ih_wait_for_idle +ffffffff81e93540 t tonga_ih_check_soft_reset +ffffffff81e93590 t tonga_ih_pre_soft_reset +ffffffff81e93630 t tonga_ih_soft_reset +ffffffff81e936f0 t tonga_ih_post_soft_reset +ffffffff81e93730 t tonga_ih_set_clockgating_state +ffffffff81e93760 t tonga_ih_set_powergating_state +ffffffff81e93790 t tonga_ih_get_wptr +ffffffff81e93880 t tonga_ih_decode_iv +ffffffff81e938f0 t tonga_ih_set_rptr +ffffffff81e94000 t umc_v6_0_init_registers +ffffffff81e95000 t umc_v6_1_query_ras_error_count +ffffffff81e954e0 t umc_v6_1_query_ras_error_address +ffffffff81e957c0 t umc_v6_1_err_cnt_init +ffffffff81e96000 t umc_v6_7_query_ras_error_count +ffffffff81e96410 t umc_v6_7_query_ras_error_address +ffffffff81e96580 t umc_v6_7_query_ras_poison_mode +ffffffff81e965d0 t umc_v6_7_convert_error_address +ffffffff81e968c0 t umc_v6_7_ecc_info_query_ras_error_count +ffffffff81e96af0 t umc_v6_7_ecc_info_query_ras_error_address +ffffffff81e97000 t umc_v8_10_query_ras_error_count +ffffffff81e97280 t umc_v8_10_query_ras_error_address +ffffffff81e975b0 t umc_v8_10_err_cnt_init +ffffffff81e97730 t umc_v8_10_query_ras_poison_mode +ffffffff81e98000 t umc_v8_7_query_ras_error_count +ffffffff81e98300 t umc_v8_7_query_ras_error_address +ffffffff81e984b0 t umc_v8_7_err_cnt_init +ffffffff81e98600 t umc_v8_7_ecc_info_query_ras_error_count +ffffffff81e98730 t umc_v8_7_ecc_info_query_ras_error_address +ffffffff81e99000 t uvd_v5_0_early_init +ffffffff81e99050 t uvd_v5_0_sw_init +ffffffff81e99130 t uvd_v5_0_sw_fini +ffffffff81e99180 t uvd_v5_0_hw_init +ffffffff81e99690 t uvd_v5_0_hw_fini +ffffffff81e99710 t uvd_v5_0_suspend +ffffffff81e99800 t uvd_v5_0_resume +ffffffff81e99850 t uvd_v5_0_is_idle +ffffffff81e99890 t uvd_v5_0_wait_for_idle +ffffffff81e99910 t uvd_v5_0_soft_reset +ffffffff81e999b0 t uvd_v5_0_set_clockgating_state +ffffffff81e99b50 t uvd_v5_0_set_powergating_state +ffffffff81e99b90 t uvd_v5_0_get_clockgating_state +ffffffff81e99c10 t uvd_v5_0_ring_get_rptr +ffffffff81e99c50 t uvd_v5_0_ring_get_wptr +ffffffff81e99c90 t uvd_v5_0_ring_set_wptr +ffffffff81e99cb0 t uvd_v5_0_ring_emit_ib +ffffffff81e99f20 t uvd_v5_0_ring_emit_fence +ffffffff81e9a4d0 t uvd_v5_0_ring_test_ring +ffffffff81e9a670 t uvd_v5_0_ring_insert_nop +ffffffff81e9a7d0 t uvd_v5_0_set_interrupt_state +ffffffff81e9a800 t uvd_v5_0_process_interrupt +ffffffff81e9a860 t uvd_v5_0_stop +ffffffff81e9a970 t uvd_v5_0_start +ffffffff81e9c000 t uvd_v6_0_early_init +ffffffff81e9c140 t uvd_v6_0_sw_init +ffffffff81e9c450 t uvd_v6_0_sw_fini +ffffffff81e9c500 t uvd_v6_0_hw_init +ffffffff81e9cac0 t uvd_v6_0_hw_fini +ffffffff81e9cb40 t uvd_v6_0_suspend +ffffffff81e9cc30 t uvd_v6_0_resume +ffffffff81e9cc80 t uvd_v6_0_is_idle +ffffffff81e9ccc0 t uvd_v6_0_wait_for_idle +ffffffff81e9cd40 t uvd_v6_0_check_soft_reset +ffffffff81e9cdb0 t uvd_v6_0_pre_soft_reset +ffffffff81e9cdf0 t uvd_v6_0_soft_reset +ffffffff81e9ceb0 t uvd_v6_0_post_soft_reset +ffffffff81e9cf50 t uvd_v6_0_set_clockgating_state +ffffffff81e9d0e0 t uvd_v6_0_set_powergating_state +ffffffff81e9d150 t uvd_v6_0_get_clockgating_state +ffffffff81e9d1e0 t uvd_v6_0_ring_get_rptr +ffffffff81e9d220 t uvd_v6_0_ring_get_wptr +ffffffff81e9d260 t uvd_v6_0_ring_set_wptr +ffffffff81e9d280 t uvd_v6_0_ring_emit_ib +ffffffff81e9d5e0 t uvd_v6_0_ring_emit_fence +ffffffff81e9db90 t uvd_v6_0_ring_emit_pipeline_sync +ffffffff81e9df80 t uvd_v6_0_ring_emit_vm_flush +ffffffff81e9e2e0 t uvd_v6_0_ring_emit_hdp_flush +ffffffff81e9e310 t uvd_v6_0_ring_test_ring +ffffffff81e9e4b0 t uvd_v6_0_ring_insert_nop +ffffffff81e9e610 t uvd_v6_0_ring_emit_wreg +ffffffff81e9e890 t uvd_v6_0_enc_ring_get_rptr +ffffffff81e9e8f0 t uvd_v6_0_enc_ring_get_wptr +ffffffff81e9e950 t uvd_v6_0_enc_ring_set_wptr +ffffffff81e9e990 t uvd_v6_0_enc_ring_emit_ib +ffffffff81e9ebd0 t uvd_v6_0_enc_ring_emit_fence +ffffffff81e9ee10 t uvd_v6_0_enc_ring_emit_pipeline_sync +ffffffff81e9efc0 t uvd_v6_0_enc_ring_emit_vm_flush +ffffffff81e9f1d0 t uvd_v6_0_enc_ring_test_ring +ffffffff81e9f320 t uvd_v6_0_enc_ring_test_ib +ffffffff81e9f8d0 t uvd_v6_0_enc_ring_insert_end +ffffffff81e9f960 t uvd_v6_0_set_interrupt_state +ffffffff81e9f990 t uvd_v6_0_process_interrupt +ffffffff81e9fa80 t uvd_v6_0_stop +ffffffff81e9fb90 t uvd_v6_0_start +ffffffff81ea1000 t uvd_v7_0_early_init +ffffffff81ea1270 t uvd_v7_0_sw_init +ffffffff81ea15e0 t uvd_v7_0_sw_fini +ffffffff81ea16e0 t uvd_v7_0_hw_init +ffffffff81ea4600 t uvd_v7_0_hw_fini +ffffffff81ea4900 t uvd_v7_0_suspend +ffffffff81ea49b0 t uvd_v7_0_resume +ffffffff81ea4a00 t uvd_v7_0_set_clockgating_state +ffffffff81ea4a30 t uvd_v7_0_ring_get_rptr +ffffffff81ea4ac0 t uvd_v7_0_ring_get_wptr +ffffffff81ea4b50 t uvd_v7_0_ring_set_wptr +ffffffff81ea4bd0 t uvd_v7_0_ring_patch_cs_in_place +ffffffff81ea4c50 t uvd_v7_0_ring_emit_ib +ffffffff81ea4ff0 t uvd_v7_0_ring_emit_fence +ffffffff81ea5640 t uvd_v7_0_ring_emit_vm_flush +ffffffff81ea56b0 t uvd_v7_0_ring_emit_hdp_flush +ffffffff81ea56e0 t uvd_v7_0_ring_test_ring +ffffffff81ea5960 t uvd_v7_0_ring_insert_nop +ffffffff81ea5af0 t uvd_v7_0_ring_emit_wreg +ffffffff81ea5dc0 t uvd_v7_0_ring_emit_reg_wait +ffffffff81ea6160 t uvd_v7_0_enc_ring_get_rptr +ffffffff81ea6250 t uvd_v7_0_enc_ring_get_wptr +ffffffff81ea6350 t uvd_v7_0_enc_ring_set_wptr +ffffffff81ea6450 t uvd_v7_0_enc_ring_emit_ib +ffffffff81ea6690 t uvd_v7_0_enc_ring_emit_fence +ffffffff81ea68d0 t uvd_v7_0_enc_ring_emit_vm_flush +ffffffff81ea6940 t uvd_v7_0_enc_ring_test_ring +ffffffff81ea6aa0 t uvd_v7_0_enc_ring_test_ib +ffffffff81ea7050 t uvd_v7_0_enc_ring_insert_end +ffffffff81ea70e0 t uvd_v7_0_enc_ring_emit_wreg +ffffffff81ea7230 t uvd_v7_0_enc_ring_emit_reg_wait +ffffffff81ea73f0 t uvd_v7_0_set_interrupt_state +ffffffff81ea7420 t uvd_v7_0_process_interrupt +ffffffff81ea8000 t vce_v3_0_early_init +ffffffff81ea8180 t vce_v3_0_sw_init +ffffffff81ea82d0 t vce_v3_0_sw_fini +ffffffff81ea8320 t vce_v3_0_hw_init +ffffffff81ea8400 t vce_v3_0_hw_fini +ffffffff81ea84e0 t vce_v3_0_suspend +ffffffff81ea85b0 t vce_v3_0_resume +ffffffff81ea8600 t vce_v3_0_is_idle +ffffffff81ea8660 t vce_v3_0_wait_for_idle +ffffffff81ea8710 t vce_v3_0_check_soft_reset +ffffffff81ea8800 t vce_v3_0_pre_soft_reset +ffffffff81ea88a0 t vce_v3_0_soft_reset +ffffffff81ea8960 t vce_v3_0_post_soft_reset +ffffffff81ea8ac0 t vce_v3_0_set_clockgating_state +ffffffff81ea8da0 t vce_v3_0_set_powergating_state +ffffffff81ea95e0 t vce_v3_0_get_clockgating_state +ffffffff81ea96a0 t vce_v3_0_ring_get_rptr +ffffffff81ea9770 t vce_v3_0_ring_get_wptr +ffffffff81ea9840 t vce_v3_0_ring_set_wptr +ffffffff81ea98f0 t vce_v3_0_ring_emit_ib +ffffffff81ea9b30 t vce_v3_0_emit_pipeline_sync +ffffffff81ea9ce0 t vce_v3_0_emit_vm_flush +ffffffff81ea9f50 t vce_v3_0_set_interrupt_state +ffffffff81ea9fc0 t vce_v3_0_process_interrupt +ffffffff81eaa080 t vce_v3_0_stop +ffffffff81eab000 t vce_v4_0_early_init +ffffffff81eab0b0 t vce_v4_0_sw_init +ffffffff81eab2e0 t vce_v4_0_sw_fini +ffffffff81eab360 t vce_v4_0_hw_init +ffffffff81eabb30 t vce_v4_0_hw_fini +ffffffff81eabbd0 t vce_v4_0_suspend +ffffffff81eabdf0 t vce_v4_0_resume +ffffffff81eabe90 t vce_v4_0_set_clockgating_state +ffffffff81eabec0 t vce_v4_0_set_powergating_state +ffffffff81eabfa0 t vce_v4_0_ring_get_rptr +ffffffff81eac000 t vce_v4_0_ring_get_wptr +ffffffff81eac090 t vce_v4_0_ring_set_wptr +ffffffff81eac110 t vce_v4_0_ring_emit_ib +ffffffff81eac350 t vce_v4_0_ring_emit_fence +ffffffff81eac590 t vce_v4_0_emit_vm_flush +ffffffff81eac600 t vce_v4_0_ring_insert_end +ffffffff81eac690 t vce_v4_0_emit_wreg +ffffffff81eac7e0 t vce_v4_0_emit_reg_wait +ffffffff81eac9a0 t vce_v4_0_set_interrupt_state +ffffffff81eaca30 t vce_v4_0_process_interrupt +ffffffff81eacac0 t vce_v4_0_start +ffffffff81ead4a0 t vce_v4_0_stop +ffffffff81eae000 T vcn_dec_sw_ring_emit_fence +ffffffff81eae240 T vcn_dec_sw_ring_insert_end +ffffffff81eae2d0 T vcn_dec_sw_ring_emit_ib +ffffffff81eae510 T vcn_dec_sw_ring_emit_reg_wait +ffffffff81eae6d0 T vcn_dec_sw_ring_emit_vm_flush +ffffffff81eae740 T vcn_dec_sw_ring_emit_wreg +ffffffff81eaf000 T vcn_v1_0_set_pg_for_begin_use +ffffffff81eaf150 T vcn_v1_0_ring_end_use +ffffffff81eaf1c0 t vcn_v1_0_early_init +ffffffff81eaf330 t vcn_v1_0_sw_init +ffffffff81eaf5c0 t vcn_v1_0_sw_fini +ffffffff81eaf620 t vcn_v1_0_hw_init +ffffffff81eaf700 t vcn_v1_0_hw_fini +ffffffff81eaf800 t vcn_v1_0_suspend +ffffffff81eaf870 t vcn_v1_0_resume +ffffffff81eaf960 t vcn_v1_0_is_idle +ffffffff81eaf9e0 t vcn_v1_0_wait_for_idle +ffffffff81eafad0 t vcn_v1_0_set_clockgating_state +ffffffff81eafb80 t vcn_v1_0_set_powergating_state +ffffffff81eb0510 t vcn_v1_0_dec_ring_get_rptr +ffffffff81eb0590 t vcn_v1_0_dec_ring_get_wptr +ffffffff81eb0610 t vcn_v1_0_dec_ring_set_wptr +ffffffff81eb0720 t vcn_v1_0_ring_patch_cs_in_place +ffffffff81eb08e0 t vcn_v1_0_dec_ring_emit_ib +ffffffff81eb0c70 t vcn_v1_0_dec_ring_emit_fence +ffffffff81eb1290 t vcn_v1_0_dec_ring_emit_vm_flush +ffffffff81eb1300 t vcn_v1_0_dec_ring_insert_nop +ffffffff81eb1480 t vcn_v1_0_dec_ring_insert_start +ffffffff81eb1650 t vcn_v1_0_dec_ring_insert_end +ffffffff81eb1760 t vcn_v1_0_ring_begin_use +ffffffff81eb1800 t vcn_v1_0_dec_ring_emit_wreg +ffffffff81eb1ab0 t vcn_v1_0_dec_ring_emit_reg_wait +ffffffff81eb1e30 t vcn_v1_0_enc_ring_get_rptr +ffffffff81eb1f00 t vcn_v1_0_enc_ring_get_wptr +ffffffff81eb1fd0 t vcn_v1_0_enc_ring_set_wptr +ffffffff81eb2080 t vcn_v1_0_enc_ring_emit_ib +ffffffff81eb22c0 t vcn_v1_0_enc_ring_emit_fence +ffffffff81eb2500 t vcn_v1_0_enc_ring_emit_vm_flush +ffffffff81eb2570 t vcn_v1_0_enc_ring_insert_end +ffffffff81eb2600 t vcn_v1_0_enc_ring_emit_wreg +ffffffff81eb2750 t vcn_v1_0_enc_ring_emit_reg_wait +ffffffff81eb2910 t vcn_v1_0_set_interrupt_state +ffffffff81eb2940 t vcn_v1_0_process_interrupt +ffffffff81eb29e0 t vcn_v1_0_idle_work_handler +ffffffff81eb2b60 t vcn_v1_0_pause_dpg_mode +ffffffff81eb3c80 t vcn_v1_0_enable_clock_gating +ffffffff81eb4090 t vcn_v1_0_disable_clock_gating +ffffffff81eb4620 t vcn_1_0_enable_static_power_gating +ffffffff81eb4840 t vcn_v1_0_start_dpg_mode +ffffffff81eb8470 t vcn_v1_0_start_spg_mode +ffffffff81eba690 t vcn_v1_0_clock_gating_dpg_mode +ffffffff81ebb000 T vcn_v2_0_dec_ring_insert_start +ffffffff81ebb1c0 T vcn_v2_0_dec_ring_insert_end +ffffffff81ebb2c0 T vcn_v2_0_dec_ring_insert_nop +ffffffff81ebb430 T vcn_v2_0_dec_ring_emit_fence +ffffffff81ebb9f0 T vcn_v2_0_dec_ring_emit_ib +ffffffff81ebbd50 T vcn_v2_0_dec_ring_emit_reg_wait +ffffffff81ebc0a0 T vcn_v2_0_dec_ring_emit_vm_flush +ffffffff81ebc110 T vcn_v2_0_dec_ring_emit_wreg +ffffffff81ebc3a0 T vcn_v2_0_enc_ring_emit_fence +ffffffff81ebc5e0 T vcn_v2_0_enc_ring_insert_end +ffffffff81ebc670 T vcn_v2_0_enc_ring_emit_ib +ffffffff81ebc8b0 T vcn_v2_0_enc_ring_emit_reg_wait +ffffffff81ebca70 T vcn_v2_0_enc_ring_emit_vm_flush +ffffffff81ebcae0 T vcn_v2_0_enc_ring_emit_wreg +ffffffff81ebcc30 T vcn_v2_0_dec_ring_test_ring +ffffffff81ebcec0 t vcn_v2_0_early_init +ffffffff81ebd030 t vcn_v2_0_sw_init +ffffffff81ebd340 t vcn_v2_0_sw_fini +ffffffff81ebd3c0 t vcn_v2_0_hw_init +ffffffff81ebdd70 t vcn_v2_0_hw_fini +ffffffff81ebde70 t vcn_v2_0_suspend +ffffffff81ebde90 t vcn_v2_0_resume +ffffffff81ebdee0 t vcn_v2_0_is_idle +ffffffff81ebdf60 t vcn_v2_0_wait_for_idle +ffffffff81ebe050 t vcn_v2_0_set_clockgating_state +ffffffff81ebe0e0 t vcn_v2_0_set_powergating_state +ffffffff81ec03a0 t vcn_v2_0_dec_ring_get_rptr +ffffffff81ec0420 t vcn_v2_0_dec_ring_get_wptr +ffffffff81ec04c0 t vcn_v2_0_dec_ring_set_wptr +ffffffff81ec05f0 t vcn_v2_0_enc_ring_get_rptr +ffffffff81ec06c0 t vcn_v2_0_enc_ring_get_wptr +ffffffff81ec07b0 t vcn_v2_0_enc_ring_set_wptr +ffffffff81ec08a0 t vcn_v2_0_set_interrupt_state +ffffffff81ec08d0 t vcn_v2_0_process_interrupt +ffffffff81ec0970 t vcn_v2_0_pause_dpg_mode +ffffffff81ec12d0 t vcn_v2_0_enable_clock_gating +ffffffff81ec1550 t vcn_v2_0_disable_clock_gating +ffffffff81ec1950 t vcn_v2_0_enable_static_power_gating +ffffffff81ec1b30 t vcn_v2_0_start_dpg_mode +ffffffff81ec65f0 t vcn_v2_0_clock_gating_dpg_mode +ffffffff81ec7000 t vcn_v2_6_query_poison_status +ffffffff81ec70c0 t vcn_v2_5_early_init +ffffffff81ec7400 t vcn_v2_5_sw_init +ffffffff81ec7880 t vcn_v2_5_sw_fini +ffffffff81ec7950 t vcn_v2_5_hw_init +ffffffff81ec8410 t vcn_v2_5_hw_fini +ffffffff81ec8550 t vcn_v2_5_suspend +ffffffff81ec8570 t vcn_v2_5_resume +ffffffff81ec85c0 t vcn_v2_5_is_idle +ffffffff81ec86b0 t vcn_v2_5_wait_for_idle +ffffffff81ec87e0 t vcn_v2_5_set_clockgating_state +ffffffff81ec8850 t vcn_v2_5_set_powergating_state +ffffffff81ec9130 t vcn_v2_5_dec_ring_get_rptr +ffffffff81ec91c0 t vcn_v2_5_dec_ring_get_wptr +ffffffff81ec9270 t vcn_v2_5_dec_ring_set_wptr +ffffffff81ec9310 t vcn_v2_5_enc_ring_get_rptr +ffffffff81ec9400 t vcn_v2_5_enc_ring_get_wptr +ffffffff81ec9500 t vcn_v2_5_enc_ring_set_wptr +ffffffff81ec95f0 t vcn_v2_5_set_interrupt_state +ffffffff81ec9620 t vcn_v2_5_process_interrupt +ffffffff81ec9740 t vcn_v2_5_pause_dpg_mode +ffffffff81eca0b0 t vcn_v2_5_enable_clock_gating +ffffffff81eca3b0 t vcn_v2_5_disable_clock_gating +ffffffff81eca8d0 t vcn_v2_5_start +ffffffff81ece4d0 t vcn_v2_5_clock_gating_dpg_mode +ffffffff81ecee70 t vcn_v2_5_mc_resume_dpg_mode +ffffffff81ed2000 t vcn_v3_0_early_init +ffffffff81ed2210 t vcn_v3_0_sw_init +ffffffff81ed26b0 t vcn_v3_0_sw_fini +ffffffff81ed2790 t vcn_v3_0_hw_init +ffffffff81ed3330 t vcn_v3_0_hw_fini +ffffffff81ed3430 t vcn_v3_0_suspend +ffffffff81ed3450 t vcn_v3_0_resume +ffffffff81ed34a0 t vcn_v3_0_is_idle +ffffffff81ed3590 t vcn_v3_0_wait_for_idle +ffffffff81ed36c0 t vcn_v3_0_set_clockgating_state +ffffffff81ed37d0 t vcn_v3_0_set_powergating_state +ffffffff81ed6050 t vcn_v3_0_dec_ring_get_rptr +ffffffff81ed60e0 t vcn_v3_0_dec_ring_get_wptr +ffffffff81ed6190 t vcn_v3_0_dec_ring_set_wptr +ffffffff81ed6300 t vcn_v3_0_ring_patch_cs_in_place +ffffffff81ed65f0 t vcn_v3_0_enc_ring_get_rptr +ffffffff81ed66e0 t vcn_v3_0_enc_ring_get_wptr +ffffffff81ed67e0 t vcn_v3_0_enc_ring_set_wptr +ffffffff81ed68d0 t vcn_v3_0_set_interrupt_state +ffffffff81ed6900 t vcn_v3_0_process_interrupt +ffffffff81ed69f0 t vcn_v3_0_pause_dpg_mode +ffffffff81ed7360 t vcn_v3_0_enable_clock_gating +ffffffff81ed75e0 t vcn_v3_0_disable_clock_gating +ffffffff81ed7b80 t vcn_v3_0_start_dpg_mode +ffffffff81edc920 t vcn_v3_0_clock_gating_dpg_mode +ffffffff81ede000 t vcn_v4_0_early_init +ffffffff81ede120 t vcn_v4_0_sw_init +ffffffff81ede350 t vcn_v4_0_sw_fini +ffffffff81ede430 t vcn_v4_0_hw_init +ffffffff81edee60 t vcn_v4_0_hw_fini +ffffffff81edef60 t vcn_v4_0_suspend +ffffffff81edef80 t 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+ffffffff81f1c970 t bios_parser_pack_data_tables +ffffffff81f1c9a0 t bios_get_atom_dc_golden_table +ffffffff81f1cae0 t bios_parser_enable_lvtma_control +ffffffff81f1cb30 t bios_parser_get_soc_bb_info +ffffffff81f1cc30 t bios_parser_get_disp_connector_caps_info +ffffffff81f1cd80 t bios_parser_get_lttpr_caps +ffffffff81f1ced0 t bios_parser_get_lttpr_interop +ffffffff81f1d010 t bios_parser_get_connector_speed_cap_info +ffffffff81f1d160 t get_bios_object +ffffffff81f1d2c0 t get_bios_object_from_path_v3 +ffffffff81f1e000 T object_id_from_bios_object_id +ffffffff81f1f000 T bios_get_image +ffffffff81f1f040 T bios_is_accelerated_mode +ffffffff81f1f0a0 T bios_set_scratch_acc_mode_change +ffffffff81f1f0d0 T bios_set_scratch_critical_state +ffffffff81f1f100 T bios_get_vga_enabled_displays +ffffffff81f20000 T dal_bios_parser_create +ffffffff81f20070 T dal_bios_parser_destroy +ffffffff81f21000 T dal_bios_parser_init_cmd_tbl +ffffffff81f21800 t encoder_control_digx_v3 +ffffffff81f21900 t encoder_control_digx_v4 +ffffffff81f21a00 t encoder_control_digx_v5 +ffffffff81f21b50 t encoder_control_dig1_v1 +ffffffff81f21bd0 t encoder_control_dig2_v1 +ffffffff81f21c50 t encoder_control_dig_v1 +ffffffff81f21cb0 t transmitter_control_v2 +ffffffff81f21e50 t transmitter_control_v3 +ffffffff81f22010 t transmitter_control_v4 +ffffffff81f221c0 t transmitter_control_v1_5 +ffffffff81f22340 t transmitter_control_v1_6 +ffffffff81f224b0 t set_pixel_clock_v3 +ffffffff81f22620 t set_pixel_clock_v5 +ffffffff81f227c0 t set_pixel_clock_v6 +ffffffff81f22960 t set_pixel_clock_v7 +ffffffff81f22b30 t enable_spread_spectrum_on_ppll_v1 +ffffffff81f22c40 t enable_spread_spectrum_on_ppll_v2 +ffffffff81f22d60 t enable_spread_spectrum_on_ppll_v3 +ffffffff81f22e60 t adjust_display_pll_v2 +ffffffff81f22fb0 t adjust_display_pll_v3 +ffffffff81f23120 t dac1_encoder_control_v1 +ffffffff81f23190 t dac2_encoder_control_v1 +ffffffff81f23200 t dac1_output_control_v1 +ffffffff81f23260 t dac2_output_control_v1 +ffffffff81f232c0 t set_crtc_using_dtd_timing_v3 +ffffffff81f23420 t set_crtc_timing_v1 +ffffffff81f235c0 t enable_crtc_v1 +ffffffff81f23660 t enable_crtc_mem_req_v1 +ffffffff81f23700 t program_clock_v5 +ffffffff81f23800 t program_clock_v6 +ffffffff81f23920 t external_encoder_control_v3 +ffffffff81f23ad0 t enable_disp_power_gating_v2_1 +ffffffff81f23b90 t set_dce_clock_v2_1 +ffffffff81f24000 T dal_firmware_parser_init_cmd_tbl +ffffffff81f243d0 t encoder_control_digx_v1_5 +ffffffff81f245a0 t encoder_control_fallback +ffffffff81f245f0 t transmitter_control_v1_6 +ffffffff81f24790 t transmitter_control_v1_7 +ffffffff81f24980 t transmitter_control_fallback +ffffffff81f249d0 t set_pixel_clock_v7 +ffffffff81f24c20 t set_pixel_clock_fallback +ffffffff81f24c70 t set_crtc_using_dtd_timing_v3 +ffffffff81f24dd0 t enable_crtc_v1 +ffffffff81f24e70 t external_encoder_control_v3 +ffffffff81f24ea0 t enable_disp_power_gating_v2_1 +ffffffff81f25000 t enable_disp_power_gating_fallback +ffffffff81f25050 t set_dce_clock_v2_1 +ffffffff81f25170 t get_smu_clock_info_v3_1 +ffffffff81f251d0 t enable_lvtma_control +ffffffff81f26000 T dal_bios_parser_init_cmd_tbl_helper +ffffffff81f260a0 T dal_cmd_table_helper_controller_id_to_atom +ffffffff81f261b0 T dal_cmd_table_helper_transmitter_bp_to_atom +ffffffff81f26230 T dal_cmd_table_helper_encoder_mode_bp_to_atom +ffffffff81f262c0 T dal_cmd_table_helper_assign_control_parameter +ffffffff81f26380 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src +ffffffff81f26460 T dal_cmd_table_helper_encoder_id_to_atom +ffffffff81f27000 T dal_bios_parser_init_cmd_tbl_helper2 +ffffffff81f270b0 T dal_cmd_table_helper_controller_id_to_atom2 +ffffffff81f271b0 T dal_cmd_table_helper_transmitter_bp_to_atom2 +ffffffff81f27230 T dal_cmd_table_helper_encoder_mode_bp_to_atom2 +ffffffff81f272c0 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src2 +ffffffff81f273a0 T dal_cmd_table_helper_encoder_id_to_atom2 +ffffffff81f28000 T dal_cmd_tbl_helper_dce110_get_table ffffffff81f28030 t encoder_action_to_atom ffffffff81f280a0 t engine_bp_to_atom ffffffff81f280e0 t clock_source_id_to_atom -ffffffff81f281b0 t clock_source_id_to_atom_phy_clk_src_id -ffffffff81f28200 t signal_type_to_atom_dig_mode -ffffffff81f28260 t hpd_sel_to_atom -ffffffff81f28290 t dig_encoder_sel_to_atom -ffffffff81f282c0 t phy_id_to_atom -ffffffff81f28300 t disp_power_gating_action_to_atom -ffffffff81f28370 t dc_clock_type_to_atom -ffffffff81f283f0 t transmitter_color_depth_to_atom -ffffffff81f29000 T dal_cmd_tbl_helper_dce112_get_table +ffffffff81f28170 t clock_source_id_to_atom_phy_clk_src_id +ffffffff81f281c0 t signal_type_to_atom_dig_mode +ffffffff81f28220 t hpd_sel_to_atom +ffffffff81f28250 t dig_encoder_sel_to_atom +ffffffff81f28280 t phy_id_to_atom +ffffffff81f282c0 t disp_power_gating_action_to_atom +ffffffff81f29000 T dal_cmd_tbl_helper_dce112_get_table2 ffffffff81f29030 t encoder_action_to_atom ffffffff81f290a0 t engine_bp_to_atom ffffffff81f290e0 t clock_source_id_to_atom @@ -29158,7 +29150,7 @@ ffffffff81f292c0 t phy_id_to_atom ffffffff81f29300 t disp_power_gating_action_to_atom ffffffff81f29370 t dc_clock_type_to_atom ffffffff81f293f0 t transmitter_color_depth_to_atom -ffffffff81f2a000 T dal_cmd_tbl_helper_dce80_get_table +ffffffff81f2a000 T dal_cmd_tbl_helper_dce112_get_table ffffffff81f2a030 t encoder_action_to_atom ffffffff81f2a0a0 t engine_bp_to_atom ffffffff81f2a0e0 t clock_source_id_to_atom @@ -29166,25394 +29158,25406 @@ ffffffff81f2a1b0 t clock_source_id_to_atom_phy_clk_src ffffffff81f2a200 t signal_type_to_atom_dig_mode ffffffff81f2a260 t hpd_sel_to_atom ffffffff81f2a290 t dig_encoder_sel_to_atom -ffffffff81f2a2e0 t phy_id_to_atom -ffffffff81f2a320 t disp_power_gating_action_to_atom -ffffffff81f2b000 T clk_mgr_helper_get_active_display_cnt -ffffffff81f2b0e0 T clk_mgr_helper_get_active_plane_cnt -ffffffff81f2b190 T clk_mgr_exit_optimized_pwr_state -ffffffff81f2b290 T clk_mgr_optimize_pwr_state -ffffffff81f2b3a0 T dc_clk_mgr_create -ffffffff81f2ba80 T dc_destroy_clk_mgr -ffffffff81f2c000 T dentist_get_divider_from_did -ffffffff81f2c070 T dce_adjust_dp_ref_freq_for_ss -ffffffff81f2c170 T dce_get_dp_ref_freq_khz -ffffffff81f2c2a0 T dce12_get_dp_ref_freq_khz -ffffffff81f2c2b0 T dce_get_max_pixel_clock_for_all_paths -ffffffff81f2c4c0 T dce_get_required_clocks_state -ffffffff81f2c560 T dce_set_clock -ffffffff81f2c6b0 T dce_clock_read_ss_info -ffffffff81f2c7f0 T dce_clk_mgr_construct -ffffffff81f2c9e0 t dce_update_clocks -ffffffff81f2d000 T dce110_get_min_vblank_time_us -ffffffff81f2d080 T dce110_fill_display_configs -ffffffff81f2d2d0 T dce11_pplib_apply_display_requirements -ffffffff81f2d5c0 T dce110_clk_mgr_construct -ffffffff81f2d670 t dce11_update_clocks -ffffffff81f2e000 T dce112_set_clock -ffffffff81f2e190 T dce112_set_dispclk -ffffffff81f2e2c0 T dce112_set_dprefclk -ffffffff81f2e320 T dce112_clk_mgr_construct -ffffffff81f2e3d0 t dce112_update_clocks -ffffffff81f2f000 T dce120_clk_mgr_construct -ffffffff81f2f090 T dce121_clk_mgr_construct -ffffffff81f2f1c0 t dce12_update_clocks -ffffffff81f30000 T rv1_clk_mgr_construct -ffffffff81f300c0 t rv1_update_clocks -ffffffff81f305a0 t rv1_init_clocks -ffffffff81f30630 t rv1_enable_pme_wa -ffffffff81f31000 T rv1_vbios_smu_set_dispclk -ffffffff81f310f0 t rv1_vbios_smu_send_msg_with_param -ffffffff81f31200 T rv1_vbios_smu_set_dprefclk -ffffffff81f32000 T rv2_clk_mgr_construct -ffffffff81f33000 T dentist_get_did_from_divider -ffffffff81f33090 T dcn20_update_clocks_update_dpp_dto -ffffffff81f33150 T dcn20_update_clocks_update_dentist -ffffffff81f33670 T dcn2_update_clocks -ffffffff81f33bd0 T dcn2_read_clocks_from_hw_dentist -ffffffff81f33ca0 T dcn2_update_clocks_fpga -ffffffff81f33e10 T dcn2_init_clocks -ffffffff81f33eb0 T dcn2_get_clock -ffffffff81f33f20 T dcn20_clk_mgr_construct -ffffffff81f34060 t dcn2_enable_pme_wa -ffffffff81f340b0 t dcn2_are_clock_states_equal -ffffffff81f34120 t dcn2_notify_link_rate_change -ffffffff81f35000 t dcn201_update_clocks -ffffffff81f35240 t dcn201_init_clocks -ffffffff81f352e0 T dcn201_clk_mgr_construct -ffffffff81f36000 T rn_clk_mgr_construct -ffffffff81f368e0 t rn_update_clocks -ffffffff81f36e80 t rn_set_low_power_state -ffffffff81f37050 t rn_init_clocks -ffffffff81f370f0 t rn_enable_pme_wa -ffffffff81f37100 t rn_are_clock_states_equal -ffffffff81f37150 t rn_notify_wm_ranges -ffffffff81f374d0 t rn_notify_link_rate_change -ffffffff81f38000 T rn_vbios_smu_get_smu_version -ffffffff81f38010 t rn_vbios_smu_send_msg_with_param -ffffffff81f381a0 T rn_vbios_smu_set_dispclk -ffffffff81f382d0 T rn_vbios_smu_set_dprefclk -ffffffff81f38330 T rn_vbios_smu_set_hard_min_dcfclk -ffffffff81f383a0 T rn_vbios_smu_set_min_deep_sleep_dcfclk -ffffffff81f38410 T rn_vbios_smu_set_phyclk -ffffffff81f38450 T rn_vbios_smu_set_dppclk -ffffffff81f38510 T rn_vbios_smu_set_dcn_low_power_state -ffffffff81f38530 T rn_vbios_smu_enable_48mhz_tmdp_refclk_pwrdwn -ffffffff81f38550 T rn_vbios_smu_enable_pme_wa -ffffffff81f38570 T rn_vbios_smu_is_periodic_retraining_disabled -ffffffff81f39000 T dcn3_init_clocks -ffffffff81f393d0 t dcn3_init_clocks_fpga -ffffffff81f393e0 T dcn3_clk_mgr_construct -ffffffff81f39540 T dcn3_clk_mgr_destroy -ffffffff81f395a0 t dcn3_update_clocks -ffffffff81f39a00 t dcn3_enable_pme_wa -ffffffff81f39a40 t dcn3_are_clock_states_equal -ffffffff81f39aa0 t dcn3_notify_wm_ranges -ffffffff81f39d30 t dcn30_notify_link_rate_change -ffffffff81f39e40 t dcn3_set_hard_min_memclk -ffffffff81f39ee0 t dcn3_set_hard_max_memclk -ffffffff81f39f30 t dcn3_set_max_memclk -ffffffff81f39f70 t dcn3_set_min_memclk -ffffffff81f39fb0 t dcn3_get_memclk_states_from_smu -ffffffff81f3a0f0 t dcn3_is_smu_present -ffffffff81f3b000 T dcn30_smu_test_message -ffffffff81f3b060 t dcn30_smu_send_msg_with_param -ffffffff81f3b1c0 T dcn30_smu_get_smu_version -ffffffff81f3b1e0 T dcn30_smu_check_driver_if_version -ffffffff81f3b230 T dcn30_smu_check_msg_header_version -ffffffff81f3b280 T dcn30_smu_set_dram_addr_high -ffffffff81f3b2a0 T dcn30_smu_set_dram_addr_low -ffffffff81f3b2c0 T dcn30_smu_transfer_wm_table_smu_2_dram -ffffffff81f3b2e0 T dcn30_smu_transfer_wm_table_dram_2_smu -ffffffff81f3b300 T dcn30_smu_set_hard_min_by_freq -ffffffff81f3b350 T dcn30_smu_set_hard_max_by_freq -ffffffff81f3b3a0 T dcn30_smu_get_dpm_freq_by_index -ffffffff81f3b3f0 T dcn30_smu_get_dc_mode_max_dpm_freq -ffffffff81f3b440 T dcn30_smu_set_min_deep_sleep_dcef_clk -ffffffff81f3b460 T dcn30_smu_set_num_of_displays -ffffffff81f3b480 T dcn30_smu_set_display_refresh_from_mall -ffffffff81f3b4b0 T dcn30_smu_set_external_client_df_cstate_allow -ffffffff81f3b4d0 T dcn30_smu_set_pme_workaround -ffffffff81f3c000 T dcn301_smu_get_smu_version -ffffffff81f3c070 t dcn301_smu_send_msg_with_param -ffffffff81f3c1f0 T dcn301_smu_set_dispclk -ffffffff81f3c290 T dcn301_smu_set_dprefclk -ffffffff81f3c330 T dcn301_smu_set_hard_min_dcfclk -ffffffff81f3c3d0 T dcn301_smu_set_min_deep_sleep_dcfclk -ffffffff81f3c470 T dcn301_smu_set_dppclk -ffffffff81f3c510 T dcn301_smu_set_display_idle_optimization -ffffffff81f3c560 T dcn301_smu_enable_phy_refclk_pwrdwn -ffffffff81f3c5b0 T dcn301_smu_enable_pme_wa -ffffffff81f3c5d0 T dcn301_smu_set_dram_addr_high -ffffffff81f3c620 T dcn301_smu_set_dram_addr_low -ffffffff81f3c670 T dcn301_smu_transfer_dpm_table_smu_2_dram -ffffffff81f3c690 T dcn301_smu_transfer_wm_table_dram_2_smu -ffffffff81f3d000 T vg_clk_mgr_construct -ffffffff81f3d760 T vg_clk_mgr_destroy -ffffffff81f3d7b0 t vg_update_clocks -ffffffff81f3db40 t vg_init_clocks -ffffffff81f3dbe0 t vg_enable_pme_wa -ffffffff81f3dbf0 t vg_are_clock_states_equal -ffffffff81f3dc40 t vg_notify_wm_ranges -ffffffff81f3e000 T dcn31_update_clocks -ffffffff81f3e620 T dcn31_init_clocks -ffffffff81f3e6d0 T dcn31_are_clock_states_equal -ffffffff81f3e730 T dcn31_get_dtb_ref_freq_khz -ffffffff81f3e760 T dcn31_clk_mgr_construct -ffffffff81f3edd0 T dcn31_clk_mgr_destroy -ffffffff81f3ee20 t dcn31_set_low_power_state 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dcn314_are_clock_states_equal -ffffffff81f41730 T dcn314_clk_mgr_construct -ffffffff81f42430 T dcn314_clk_mgr_destroy -ffffffff81f42480 t dcn314_enable_pme_wa -ffffffff81f42490 t dcn314_notify_wm_ranges -ffffffff81f43000 T dcn314_smu_get_smu_version -ffffffff81f43010 t dcn314_smu_send_msg_with_param -ffffffff81f43210 T dcn314_smu_set_dispclk -ffffffff81f43280 T dcn314_smu_set_dprefclk -ffffffff81f432f0 T dcn314_smu_set_hard_min_dcfclk -ffffffff81f43370 T dcn314_smu_set_min_deep_sleep_dcfclk -ffffffff81f433f0 T dcn314_smu_set_dppclk -ffffffff81f43460 T dcn314_smu_set_display_idle_optimization -ffffffff81f434b0 T dcn314_smu_enable_phy_refclk_pwrdwn -ffffffff81f434f0 T dcn314_smu_enable_pme_wa -ffffffff81f43530 T dcn314_smu_set_dram_addr_high -ffffffff81f43570 T dcn314_smu_set_dram_addr_low -ffffffff81f435b0 T dcn314_smu_transfer_dpm_table_smu_2_dram -ffffffff81f435f0 T dcn314_smu_transfer_wm_table_dram_2_smu -ffffffff81f43630 T dcn314_smu_set_zstate_support -ffffffff81f43680 T dcn314_smu_set_dtbclk -ffffffff81f44000 T dcn315_clk_mgr_construct -ffffffff81f449c0 T dcn315_clk_mgr_destroy -ffffffff81f44a10 t dcn315_update_clocks -ffffffff81f44ff0 t dcn315_enable_pme_wa -ffffffff81f45000 t dcn315_notify_wm_ranges -ffffffff81f46000 T dcn315_smu_get_smu_version -ffffffff81f46010 t dcn315_smu_send_msg_with_param -ffffffff81f461a0 T dcn315_smu_set_dispclk -ffffffff81f46210 T dcn315_smu_set_hard_min_dcfclk -ffffffff81f46290 T dcn315_smu_set_min_deep_sleep_dcfclk -ffffffff81f46310 T dcn315_smu_set_dppclk -ffffffff81f46380 T dcn315_smu_set_display_idle_optimization -ffffffff81f463d0 T dcn315_smu_enable_phy_refclk_pwrdwn -ffffffff81f46410 T dcn315_smu_enable_pme_wa -ffffffff81f46450 T dcn315_smu_set_dram_addr_high -ffffffff81f46490 T dcn315_smu_set_dram_addr_low -ffffffff81f464d0 T dcn315_smu_transfer_dpm_table_smu_2_dram -ffffffff81f46510 T dcn315_smu_transfer_wm_table_dram_2_smu -ffffffff81f46550 T dcn315_smu_get_dpref_clk -ffffffff81f465a0 T dcn315_smu_get_dtbclk -ffffffff81f465f0 T dcn315_smu_set_dtbclk -ffffffff81f47000 T dcn316_clk_mgr_construct -ffffffff81f476a0 T dcn316_clk_mgr_destroy -ffffffff81f476f0 t dcn316_update_clocks -ffffffff81f47d20 t dcn316_enable_pme_wa -ffffffff81f47d30 t dcn316_notify_wm_ranges -ffffffff81f480c0 t find_clk_for_voltage -ffffffff81f49000 T dcn316_smu_get_smu_version -ffffffff81f49010 t dcn316_smu_send_msg_with_param -ffffffff81f491a0 T dcn316_smu_set_dispclk -ffffffff81f49210 T dcn316_smu_set_hard_min_dcfclk -ffffffff81f49290 T dcn316_smu_set_min_deep_sleep_dcfclk -ffffffff81f49310 T dcn316_smu_set_dppclk -ffffffff81f49380 T dcn316_smu_set_display_idle_optimization -ffffffff81f493d0 T dcn316_smu_enable_phy_refclk_pwrdwn -ffffffff81f49410 T dcn316_smu_set_dram_addr_high -ffffffff81f49450 T dcn316_smu_set_dram_addr_low -ffffffff81f49490 T dcn316_smu_transfer_dpm_table_smu_2_dram -ffffffff81f494d0 T dcn316_smu_transfer_wm_table_dram_2_smu -ffffffff81f49510 T dcn316_smu_enable_pme_wa -ffffffff81f49550 T dcn316_smu_set_dtbclk -ffffffff81f49590 T dcn316_smu_get_dpref_clk -ffffffff81f495e0 T dcn316_smu_get_smu_fclk -ffffffff81f4a000 T dcn32_init_clocks -ffffffff81f4a4d0 T dcn32_clk_mgr_construct -ffffffff81f4a760 T dcn32_clk_mgr_destroy -ffffffff81f4a7c0 t dcn32_update_clocks -ffffffff81f4af00 t dcn32_dump_clk_registers -ffffffff81f4b120 t dcn32_enable_pme_wa -ffffffff81f4b160 t dcn32_are_clock_states_equal -ffffffff81f4b1c0 t dcn32_notify_wm_ranges -ffffffff81f4b340 t dcn32_set_hard_min_memclk -ffffffff81f4b3e0 t dcn32_set_hard_max_memclk -ffffffff81f4b430 t dcn32_get_memclk_states_from_smu -ffffffff81f4b620 t dcn32_is_smu_present -ffffffff81f4c000 T dcn32_smu_send_fclk_pstate_message -ffffffff81f4c020 t dcn32_smu_send_msg_with_param -ffffffff81f4c160 T dcn32_smu_send_cab_for_uclk_message -ffffffff81f4c180 T dcn32_smu_transfer_wm_table_dram_2_smu -ffffffff81f4c1a0 T dcn32_smu_set_pme_workaround -ffffffff81f4c1c0 T dcn32_smu_set_hard_min_by_freq -ffffffff81f4d000 T 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dcn31_smu_set_dram_addr_high +ffffffff81f41570 T dcn31_smu_set_dram_addr_low +ffffffff81f415b0 T dcn31_smu_transfer_dpm_table_smu_2_dram +ffffffff81f415f0 T dcn31_smu_transfer_wm_table_dram_2_smu +ffffffff81f41630 T dcn31_smu_set_zstate_support +ffffffff81f41690 T dcn31_smu_set_dtbclk +ffffffff81f42000 T dcn314_update_clocks +ffffffff81f426d0 T dcn314_are_clock_states_equal +ffffffff81f42730 T dcn314_clk_mgr_construct +ffffffff81f43430 T dcn314_clk_mgr_destroy +ffffffff81f43480 t dcn314_enable_pme_wa +ffffffff81f43490 t dcn314_notify_wm_ranges +ffffffff81f44000 T dcn314_smu_get_smu_version +ffffffff81f44010 t dcn314_smu_send_msg_with_param +ffffffff81f44210 T dcn314_smu_set_dispclk +ffffffff81f44280 T dcn314_smu_set_dprefclk +ffffffff81f442f0 T dcn314_smu_set_hard_min_dcfclk +ffffffff81f44370 T dcn314_smu_set_min_deep_sleep_dcfclk +ffffffff81f443f0 T dcn314_smu_set_dppclk +ffffffff81f44460 T dcn314_smu_set_display_idle_optimization +ffffffff81f444b0 T dcn314_smu_enable_phy_refclk_pwrdwn +ffffffff81f444f0 T dcn314_smu_enable_pme_wa +ffffffff81f44530 T dcn314_smu_set_dram_addr_high +ffffffff81f44570 T dcn314_smu_set_dram_addr_low +ffffffff81f445b0 T dcn314_smu_transfer_dpm_table_smu_2_dram +ffffffff81f445f0 T dcn314_smu_transfer_wm_table_dram_2_smu +ffffffff81f44630 T dcn314_smu_set_zstate_support +ffffffff81f44680 T dcn314_smu_set_dtbclk +ffffffff81f45000 T dcn315_clk_mgr_construct +ffffffff81f459c0 T dcn315_clk_mgr_destroy +ffffffff81f45a10 t dcn315_update_clocks +ffffffff81f45ff0 t dcn315_enable_pme_wa +ffffffff81f46000 t dcn315_notify_wm_ranges +ffffffff81f47000 T dcn315_smu_get_smu_version +ffffffff81f47010 t dcn315_smu_send_msg_with_param +ffffffff81f471a0 T dcn315_smu_set_dispclk +ffffffff81f47210 T dcn315_smu_set_hard_min_dcfclk +ffffffff81f47290 T dcn315_smu_set_min_deep_sleep_dcfclk +ffffffff81f47310 T dcn315_smu_set_dppclk +ffffffff81f47380 T dcn315_smu_set_display_idle_optimization +ffffffff81f473d0 T dcn315_smu_enable_phy_refclk_pwrdwn +ffffffff81f47410 T dcn315_smu_enable_pme_wa +ffffffff81f47450 T dcn315_smu_set_dram_addr_high +ffffffff81f47490 T dcn315_smu_set_dram_addr_low +ffffffff81f474d0 T dcn315_smu_transfer_dpm_table_smu_2_dram +ffffffff81f47510 T dcn315_smu_transfer_wm_table_dram_2_smu +ffffffff81f47550 T dcn315_smu_get_dpref_clk +ffffffff81f475a0 T dcn315_smu_get_dtbclk +ffffffff81f475f0 T dcn315_smu_set_dtbclk +ffffffff81f48000 T dcn316_clk_mgr_construct +ffffffff81f486a0 T dcn316_clk_mgr_destroy +ffffffff81f486f0 t dcn316_update_clocks +ffffffff81f48d20 t dcn316_enable_pme_wa +ffffffff81f48d30 t dcn316_notify_wm_ranges +ffffffff81f490c0 t find_clk_for_voltage +ffffffff81f4a000 T dcn316_smu_get_smu_version +ffffffff81f4a010 t dcn316_smu_send_msg_with_param +ffffffff81f4a1a0 T dcn316_smu_set_dispclk +ffffffff81f4a210 T dcn316_smu_set_hard_min_dcfclk +ffffffff81f4a290 T dcn316_smu_set_min_deep_sleep_dcfclk +ffffffff81f4a310 T dcn316_smu_set_dppclk +ffffffff81f4a380 T dcn316_smu_set_display_idle_optimization +ffffffff81f4a3d0 T dcn316_smu_enable_phy_refclk_pwrdwn +ffffffff81f4a410 T dcn316_smu_set_dram_addr_high +ffffffff81f4a450 T dcn316_smu_set_dram_addr_low +ffffffff81f4a490 T dcn316_smu_transfer_dpm_table_smu_2_dram +ffffffff81f4a4d0 T dcn316_smu_transfer_wm_table_dram_2_smu +ffffffff81f4a510 T dcn316_smu_enable_pme_wa +ffffffff81f4a550 T dcn316_smu_set_dtbclk +ffffffff81f4a590 T dcn316_smu_get_dpref_clk +ffffffff81f4a5e0 T dcn316_smu_get_smu_fclk +ffffffff81f4b000 T dcn32_init_clocks +ffffffff81f4b4d0 T dcn32_clk_mgr_construct +ffffffff81f4b760 T dcn32_clk_mgr_destroy +ffffffff81f4b7c0 t dcn32_update_clocks +ffffffff81f4bf00 t dcn32_dump_clk_registers +ffffffff81f4c120 t dcn32_enable_pme_wa +ffffffff81f4c160 t dcn32_are_clock_states_equal +ffffffff81f4c1c0 t dcn32_notify_wm_ranges +ffffffff81f4c340 t dcn32_set_hard_min_memclk +ffffffff81f4c3e0 t dcn32_set_hard_max_memclk +ffffffff81f4c430 t dcn32_get_memclk_states_from_smu +ffffffff81f4c620 t dcn32_is_smu_present +ffffffff81f4d000 T dcn32_smu_send_fclk_pstate_message +ffffffff81f4d020 t dcn32_smu_send_msg_with_param +ffffffff81f4d160 T dcn32_smu_send_cab_for_uclk_message +ffffffff81f4d180 T dcn32_smu_transfer_wm_table_dram_2_smu +ffffffff81f4d1a0 T dcn32_smu_set_pme_workaround +ffffffff81f4d1c0 T dcn32_smu_set_hard_min_by_freq +ffffffff81f4e000 T dc_stream_adjust_vmin_vmax +ffffffff81f4e180 T dc_stream_get_last_used_drr_vtotal +ffffffff81f4e2e0 T dc_stream_get_crtc_position +ffffffff81f4e510 T dc_stream_configure_crc +ffffffff81f4e750 T dc_stream_get_crc +ffffffff81f4e830 T dc_stream_set_dyn_expansion +ffffffff81f4ea90 T dc_stream_set_dither_option +ffffffff81f4ec00 T dc_stream_set_gamut_remap +ffffffff81f4ed80 T dc_stream_program_csc_matrix +ffffffff81f4efa0 T dc_stream_set_static_screen_params +ffffffff81f4f130 T dc_create +ffffffff81f4fad0 t dc_construct_ctx +ffffffff81f4fc30 t dc_destruct +ffffffff81f4ff00 T dc_hardware_init +ffffffff81f50010 T dc_init_callbacks +ffffffff81f50040 T dc_deinit_callbacks +ffffffff81f50070 T dc_destroy +ffffffff81f500c0 T dc_validate_boot_timing +ffffffff81f50440 T dc_enable_stereo +ffffffff81f50540 T dc_trigger_sync +ffffffff81f50b50 T dc_z10_restore +ffffffff81f50b90 T dc_z10_save_init +ffffffff81f50bd0 T dc_commit_state +ffffffff81f50d00 t dc_commit_state_no_check +ffffffff81f52180 T dc_acquire_release_mpc_3dlut +ffffffff81f52260 T dc_post_update_surfaces_to_stream +ffffffff81f52670 T dc_create_state +ffffffff81f52700 T dc_copy_state +ffffffff81f528f0 T dc_retain_state +ffffffff81f52920 T dc_release_state +ffffffff81f52990 T dc_set_generic_gpio_for_stereo +ffffffff81f52aa0 T dc_check_update_surfaces_for_stream +ffffffff81f53710 T dc_dmub_update_dirty_rect +ffffffff81f539a0 T dc_update_planes_and_stream +ffffffff81f540f0 t commit_minimal_transition_state +ffffffff81f54480 t commit_planes_for_stream +ffffffff81f55b30 T dc_commit_updates_for_stream +ffffffff81f55f20 t copy_surface_update_to_plane +ffffffff81f56320 t copy_stream_update_to_stream +ffffffff81f56950 T dc_get_current_stream_count +ffffffff81f56980 T dc_get_stream_at_index +ffffffff81f569c0 T dc_interrupt_to_irq_source +ffffffff81f569e0 T dc_interrupt_set +ffffffff81f56a30 T dc_interrupt_ack +ffffffff81f56a50 T dc_power_down_on_boot +ffffffff81f56aa0 T dc_set_power_state +ffffffff81f56c90 T dc_resume +ffffffff81f56d00 T dc_is_dmcu_initialized +ffffffff81f56d50 T dc_is_oem_i2c_device_present +ffffffff81f56d90 T dc_submit_i2c +ffffffff81f56dc0 T dc_submit_i2c_oem +ffffffff81f56e10 T dc_link_add_remote_sink +ffffffff81f56fa0 T dc_link_remove_remote_sink +ffffffff81f57090 T get_clock_requirements_for_state +ffffffff81f57110 T dc_set_clock +ffffffff81f57150 T dc_get_clock +ffffffff81f57190 T dc_set_psr_allow_active +ffffffff81f57290 T dc_allow_idle_optimizations +ffffffff81f57330 T dc_unlock_memory_clock_frequency +ffffffff81f573a0 T dc_lock_memory_clock_frequency +ffffffff81f57430 T dc_enable_dcmode_clk_limit +ffffffff81f57530 t blank_and_force_memclk +ffffffff81f57710 T dc_is_plane_eligible_for_idle_optimizations +ffffffff81f57760 T dc_hardware_release +ffffffff81f577b0 T dc_mclk_switch_using_fw_based_vblank_stretch_shut_down +ffffffff81f577f0 T dc_is_dmub_outbox_supported +ffffffff81f57850 T dc_enable_dmub_notifications +ffffffff81f578b0 T dc_enable_dmub_outbox +ffffffff81f578f0 T dc_process_dmub_aux_transfer_async +ffffffff81f57a90 T get_link_index_from_dpia_port_index +ffffffff81f57b40 T dc_process_dmub_set_config_async +ffffffff81f57c20 T dc_process_dmub_set_mst_slots +ffffffff81f57d10 T dc_process_dmub_dpia_hpd_int_enable +ffffffff81f57de0 T dc_disable_accelerated_mode +ffffffff81f57e00 T dc_notify_vsync_int_state +ffffffff81f58030 T dc_extended_blank_supported +ffffffff81f59000 T pre_surface_trace +ffffffff81f59030 T update_surface_trace +ffffffff81f59060 T post_surface_trace +ffffffff81f59090 T context_timing_trace +ffffffff81f59240 T context_clock_trace +ffffffff81f59270 T dc_status_to_str +ffffffff81f5a000 T find_color_matrix +ffffffff81f5a0a0 T color_space_to_black_color +ffffffff81f5a130 T hwss_wait_for_blank_complete +ffffffff81f5a1d0 T get_mpctree_visual_confirm_color +ffffffff81f5a230 T get_surface_visual_confirm_color +ffffffff81f5a2e0 T get_hdr_visual_confirm_color +ffffffff81f5a390 T get_subvp_visual_confirm_color +ffffffff81f5a480 T get_surface_tile_visual_confirm_color +ffffffff81f5b000 T get_hpd_gpio +ffffffff81f5b0e0 T dc_link_wait_for_t12 +ffffffff81f5b140 T dc_link_detect_sink +ffffffff81f5b300 T dc_link_is_dp_sink_present +ffffffff81f5b580 T reset_cur_dp_mst_topology +ffffffff81f5b5e0 T dc_link_detect +ffffffff81f5c900 T dc_link_get_hpd_state +ffffffff81f5c970 T link_create +ffffffff81f5da90 T link_destroy +ffffffff81f5dbf0 T dc_link_blank_all_dp_displays +ffffffff81f5dcc0 T dc_link_blank_dp_stream +ffffffff81f5ddd0 T dc_link_blank_all_edp_displays +ffffffff81f5de90 T dc_power_alpm_dpcd_enable +ffffffff81f5def0 T dc_link_validate_mode_timing +ffffffff81f5e410 T dc_link_get_backlight_level +ffffffff81f5e580 T dc_link_get_target_backlight_pwm +ffffffff81f5e690 T dc_link_set_backlight_level +ffffffff81f5e7f0 T dc_link_set_psr_allow_active +ffffffff81f5ea60 T dc_link_get_psr_state +ffffffff81f5eb90 T dc_link_setup_psr +ffffffff81f5eff0 T dc_link_get_psr_residency +ffffffff81f5f0e0 T dc_link_set_sink_vtotal_in_psr_active +ffffffff81f5f160 T dc_link_get_status +ffffffff81f5f190 T core_link_resume +ffffffff81f5f1d0 t program_hpd_filter +ffffffff81f5f360 T dc_link_allocate_mst_payload +ffffffff81f5f830 t update_mst_stream_alloc_table +ffffffff81f5fab0 t dc_log_vcp_x_y +ffffffff81f5fc40 T dc_link_reduce_mst_payload +ffffffff81f600c0 T dc_link_increase_mst_payload +ffffffff81f60530 T core_link_enable_stream +ffffffff81f61210 t disable_link +ffffffff81f61330 t dc_link_update_sst_payload +ffffffff81f61570 T core_link_set_avmute +ffffffff81f615c0 T core_link_disable_stream +ffffffff81f61d50 t get_ext_hdmi_settings +ffffffff81f61f90 t write_i2c_retimer_setting +ffffffff81f62640 t write_i2c_default_retimer_setting +ffffffff81f62ce0 t write_i2c_redriver_setting +ffffffff81f62e20 T dc_link_enable_hpd_filter +ffffffff81f62f80 T dc_link_set_drive_settings +ffffffff81f63050 T dc_link_get_cur_link_res +ffffffff81f631a0 T dc_link_set_preferred_link_settings +ffffffff81f632f0 T dc_link_set_preferred_training_settings +ffffffff81f63430 T dc_link_enable_hpd +ffffffff81f63440 T dc_link_disable_hpd +ffffffff81f63450 T dc_link_set_test_pattern +ffffffff81f63490 T dc_link_bandwidth_kbps +ffffffff81f63530 T dc_link_should_enable_fec +ffffffff81f63650 T dc_link_get_link_cap +ffffffff81f636a0 T dc_link_overwrite_extended_receiver_cap +ffffffff81f636b0 T dc_link_is_fec_supported +ffffffff81f63770 T dc_bandwidth_in_kbps_from_timing +ffffffff81f638c0 T dc_get_cur_link_res_map +ffffffff81f639a0 T dc_restore_link_res_map +ffffffff81f63ac0 t read_current_link_settings_on_detect +ffffffff81f63cd0 t enable_link_dp +ffffffff81f64000 T dal_ddc_i2c_payloads_add +ffffffff81f640c0 T dal_ddc_service_create +ffffffff81f64230 T dal_ddc_service_destroy +ffffffff81f642c0 T dal_ddc_service_get_type +ffffffff81f642f0 T dal_ddc_service_set_transaction_type +ffffffff81f64320 T dal_ddc_service_is_in_aux_transaction_mode +ffffffff81f64350 T ddc_service_set_dongle_type +ffffffff81f64380 T get_defer_delay +ffffffff81f644a0 T dal_ddc_service_i2c_query_dp_dual_mode_adaptor +ffffffff81f648b0 T dal_ddc_service_query_ddc_data +ffffffff81f64c70 T dal_ddc_submit_aux_command +ffffffff81f64d60 T dc_link_aux_transfer_with_retries +ffffffff81f64d70 T dc_link_aux_transfer_raw +ffffffff81f64da0 T dc_link_aux_try_to_configure_timeout +ffffffff81f64e70 T dal_ddc_service_set_ddc_pin +ffffffff81f64ea0 T dal_ddc_service_get_ddc_pin +ffffffff81f64ed0 T dal_ddc_service_write_scdc_data +ffffffff81f64fc0 T dal_ddc_service_read_scdc_data +ffffffff81f66000 T dp_wait_for_training_aux_rd_interval +ffffffff81f66080 T dc_dp_training_pattern_to_dpcd_training_pattern +ffffffff81f66100 T dpcd_set_link_settings +ffffffff81f66280 T dc_dp_initialize_scrambling_data_symbols +ffffffff81f66310 T dp_is_cr_done +ffffffff81f66370 T dp_is_ch_eq_done +ffffffff81f66430 T dp_is_symbol_locked +ffffffff81f664f0 T dp_is_interlane_aligned +ffffffff81f66520 T dp_hw_to_dpcd_lane_settings +ffffffff81f665e0 T dp_get_link_encoding_format +ffffffff81f66630 T dp_decide_lane_settings +ffffffff81f66a70 T dp_get_lane_status_and_lane_adjust +ffffffff81f66ba0 T dpcd_set_lane_settings +ffffffff81f66be0 T dp_is_max_vs_reached +ffffffff81f66c70 T dp_translate_training_aux_read_interval +ffffffff81f66cb0 T dp_get_cr_failure +ffffffff81f66d20 T dp_check_link_loss_status +ffffffff81f66dc0 T dp_decide_training_settings +ffffffff81f67120 t decide_8b_10b_training_settings +ffffffff81f67430 T dp_convert_to_count +ffffffff81f674c0 T dc_link_dp_set_drive_settings +ffffffff81f67670 T dp_set_hw_lane_settings +ffffffff81f67820 T dc_link_dp_perform_link_training_skip_aux +ffffffff81f67c60 t override_training_settings +ffffffff81f67f10 T dp_set_hw_training_pattern +ffffffff81f67f60 T dp_set_hw_test_pattern +ffffffff81f68080 t print_status_message +ffffffff81f681f0 T dpcd_configure_lttpr_mode +ffffffff81f683d0 T dpcd_configure_channel_coding +ffffffff81f68440 T dc_link_dp_perform_link_training +ffffffff81f6a7b0 T dp_set_fec_ready +ffffffff81f6a930 t dp_perform_8b_10b_link_training +ffffffff81f6ac10 T perform_link_training_with_retries +ffffffff81f6b260 T dp_get_panel_mode +ffffffff81f6b310 T dp_enable_link_phy +ffffffff81f6b3a0 T dp_set_panel_mode +ffffffff81f6b4b0 T dp_disable_link_phy +ffffffff81f6b580 t decide_fallback_link_setting +ffffffff81f6b8e0 T dc_link_dp_sync_lt_begin +ffffffff81f6b9b0 T dc_link_dp_sync_lt_attempt +ffffffff81f6bee0 t perform_clock_recovery_sequence +ffffffff81f6c4a0 t perform_channel_equalization_sequence +ffffffff81f6cb20 T dc_link_dp_sync_lt_end +ffffffff81f6cc10 T dc_link_dp_get_max_link_enc_cap +ffffffff81f6cd00 T dp_get_max_link_cap +ffffffff81f6cef0 T dp_is_lttpr_present +ffffffff81f6cf60 T hpd_rx_irq_check_link_loss_status +ffffffff81f6d050 T dp_verify_link_cap_with_retries +ffffffff81f6d760 T dp_validate_mode_timing +ffffffff81f6d820 T decide_edp_link_settings +ffffffff81f6d950 T decide_link_settings +ffffffff81f6dd80 t decide_edp_link_settings_with_dsc +ffffffff81f6e120 T dc_link_dp_allow_hpd_rx_irq +ffffffff81f6e160 T is_dp_branch_device +ffffffff81f6e190 T dc_link_dp_handle_automated_test +ffffffff81f6ed50 T dc_link_dp_handle_link_loss +ffffffff81f6f1b0 T dc_link_handle_hpd_rx_irq +ffffffff81f6f550 T is_mst_supported +ffffffff81f6f5f0 T is_dp_active_dongle +ffffffff81f6f630 T dc_link_bw_kbps_from_raw_frl_link_rate_data +ffffffff81f6f670 T dp_retrieve_lttpr_cap +ffffffff81f6f850 T dp_decide_lttpr_mode +ffffffff81f6f970 T dp_decide_8b_10b_lttpr_mode +ffffffff81f6fa80 T dp_decide_128b_132b_lttpr_mode +ffffffff81f6fb20 T dp_get_lttpr_mode_override +ffffffff81f6fbf0 T dp_overwrite_extended_receiver_cap +ffffffff81f6fd00 t get_active_converter_info +ffffffff81f70170 T detect_dp_sink_caps +ffffffff81f70180 t retrieve_link_cap +ffffffff81f71320 T detect_edp_sink_caps +ffffffff81f715e0 T dc_link_set_default_brightness_aux +ffffffff81f716e0 T dc_link_dp_enable_hpd +ffffffff81f71720 T dc_link_dp_disable_hpd +ffffffff81f71770 T dc_link_dp_set_test_pattern +ffffffff81f72170 t set_crtc_test_pattern +ffffffff81f72600 T dp_enable_mst_on_sink +ffffffff81f72680 T dp_set_fec_enable +ffffffff81f72790 T dpcd_set_source_specific_data +ffffffff81f72900 T dpcd_write_cable_id_to_dprx +ffffffff81f72970 T dc_link_set_backlight_level_nits +ffffffff81f72a10 T dc_link_get_backlight_level_nits +ffffffff81f72aa0 T dc_link_backlight_enable_aux +ffffffff81f72b00 T dc_link_read_default_bl_aux +ffffffff81f72b60 T is_edp_ilr_optimization_required +ffffffff81f72dd0 T dc_link_dp_mst_decide_link_encoding_format +ffffffff81f72e50 T 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dce110_edp_wait_for_T12 +ffffffff81fb6a60 T dce110_edp_backlight_control +ffffffff81fb6d90 T dce110_enable_audio_stream +ffffffff81fb6ea0 T dce110_disable_audio_stream +ffffffff81fb7010 T dce110_disable_stream +ffffffff81fb7140 T dce110_unblank_stream +ffffffff81fb7230 T dce110_blank_stream +ffffffff81fb7380 T dce110_set_avmute +ffffffff81fb73d0 T dce110_enable_accelerated_mode +ffffffff81fb7790 t power_down_all_hw_blocks +ffffffff81fb7950 T dce110_set_safe_displaymarks +ffffffff81fb7aa0 T dce110_apply_ctx_to_hw +ffffffff81fb8370 t enable_fbc +ffffffff81fb8520 T dce110_power_down +ffffffff81fb8620 T dce110_prepare_bandwidth +ffffffff81fb8760 T dce110_optimize_bandwidth +ffffffff81fb8920 T dce110_set_backlight_level +ffffffff81fb8a30 T dce110_set_abm_immediate_disable +ffffffff81fb8ab0 T dce110_set_pipe +ffffffff81fb8b20 T dce110_enable_lvds_link_output +ffffffff81fb8b80 T dce110_enable_tmds_link_output +ffffffff81fb8be0 T dce110_enable_dp_link_output +ffffffff81fb8df0 T dce110_disable_link_output +ffffffff81fb8f00 T dce110_hw_sequencer_construct +ffffffff81fb8f50 t enable_display_pipe_clock_gating +ffffffff81fb8f80 t build_audio_output +ffffffff81fb90e0 t init_hw +ffffffff81fb93a0 t dce110_power_down_fe +ffffffff81fb9460 t dce110_apply_ctx_for_surface +ffffffff81fb9b80 t dce110_post_unlock_program_front_end +ffffffff81fb9bb0 t update_plane_addr +ffffffff81fb9c20 t dce110_wait_for_mpcc_disconnect +ffffffff81fb9c50 t dce110_update_pending_status +ffffffff81fb9d30 t get_position +ffffffff81fb9db0 t dce110_enable_per_frame_crtc_position_reset +ffffffff81fba060 t dce110_enable_timing_synchronization +ffffffff81fba370 t set_drr +ffffffff81fba450 t set_static_screen_control +ffffffff81fba520 t dce110_set_cursor_position +ffffffff81fba660 t dce110_set_cursor_attribute +ffffffff81fba720 t program_gamut_remap +ffffffff81fba870 t program_output_csc +ffffffff81fba970 t init_pipes +ffffffff81fba9a0 t dce110_reset_hw_ctx_wrap +ffffffff81fbabf0 t dce110_set_input_transfer_func +ffffffff81fbad70 t dce110_set_output_transfer_func +ffffffff81fbb6a0 t dce110_enable_display_power_gating +ffffffff81fbb800 t dce110_enable_stream_timing +ffffffff81fbc000 T dce110_mem_input_v_construct +ffffffff81fbc030 t dce_mem_input_v_program_display_marks +ffffffff81fbc0a0 t dce_mem_input_program_chroma_display_marks +ffffffff81fbc110 t dce110_allocate_mem_input_v +ffffffff81fbc220 t dce110_free_mem_input_v +ffffffff81fbc250 t dce_mem_input_v_program_surface_flip_and_addr +ffffffff81fbc390 t dce_mem_input_v_program_pte_vm +ffffffff81fbc670 t dce_mem_input_v_program_surface_config +ffffffff81fbca20 t dce_mem_input_v_is_surface_pending +ffffffff81fbca90 t program_urgency_watermark +ffffffff81fbcba0 t program_nbp_watermark +ffffffff81fbcd10 t program_stutter_watermark +ffffffff81fbd000 T dce110_opp_v_set_csc_default +ffffffff81fbd300 t program_color_matrix_v +ffffffff81fbd470 t configure_graphics_mode_v +ffffffff81fbd560 T dce110_opp_v_set_csc_adjustment +ffffffff81fbe000 T dce110_opp_program_regamma_pwl_v +ffffffff81fbe4b0 t power_on_lut +ffffffff81fbe5d0 T dce110_opp_power_on_regamma_lut_v +ffffffff81fbe630 T dce110_opp_set_regamma_mode_v +ffffffff81fbf000 T dce110_opp_v_construct +ffffffff81fc0000 T dce110_resource_build_pipe_hw_param +ffffffff81fc0150 T dce110_find_first_free_match_stream_enc_for_link +ffffffff81fc01e0 T dce110_create_resource_pool +ffffffff81fc11a0 t dce110_resource_destruct +ffffffff81fc14d0 t dce110_destroy_resource_pool +ffffffff81fc1530 t dce110_panel_cntl_create +ffffffff81fc15c0 t dce110_link_encoder_create +ffffffff81fc16d0 t dce110_validate_bandwidth +ffffffff81fc17b0 t dce110_validate_global +ffffffff81fc1870 t dce110_acquire_underlay +ffffffff81fc1a50 t dce110_validate_plane +ffffffff81fc1ab0 t dce110_add_stream_to_ctx +ffffffff81fc1b70 t read_dce_straps +ffffffff81fc1bd0 t create_audio +ffffffff81fc1c00 t dce110_stream_encoder_create +ffffffff81fc1ca0 t dce110_hwseq_create +ffffffff81fc2000 T dce110_timing_generator_set_early_control +ffffffff81fc2070 T dce110_timing_generator_enable_crtc +ffffffff81fc2100 T dce110_timing_generator_program_blank_color +ffffffff81fc2190 T dce110_timing_generator_disable_crtc +ffffffff81fc21e0 T dce110_timing_generator_program_timing_generator +ffffffff81fc23d0 T dce110_timing_generator_set_drr +ffffffff81fc2510 T dce110_timing_generator_set_static_screen_control +ffffffff81fc25a0 T dce110_timing_generator_get_vblank_counter +ffffffff81fc25f0 T dce110_timing_generator_get_position +ffffffff81fc2690 T dce110_timing_generator_get_crtc_scanoutpos +ffffffff81fc2770 T dce110_timing_generator_program_blanking +ffffffff81fc29e0 T dce110_timing_generator_set_test_pattern +ffffffff81fc2cd0 T dce110_timing_generator_validate_timing +ffffffff81fc2da0 T dce110_timing_generator_wait_for_vblank +ffffffff81fc2f10 T dce110_timing_generator_is_counter_moving +ffffffff81fc2f80 T dce110_timing_generator_wait_for_vactive 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dce110_tg_set_colors +ffffffff81fc3d90 T dce110_arm_vert_intr +ffffffff81fc3e60 T dce110_configure_crc +ffffffff81fc3fb0 t dce110_is_tg_enabled +ffffffff81fc4000 T dce110_get_crc +ffffffff81fc40d0 T dce110_timing_generator_construct +ffffffff81fc5000 T dce110_timing_generator_v_construct +ffffffff81fc5060 t dce110_timing_generator_v_program_timing +ffffffff81fc5330 t dce110_timing_generator_v_enable_crtc +ffffffff81fc53b0 t dce110_timing_generator_v_disable_crtc +ffffffff81fc5420 t dce110_timing_generator_v_is_counter_moving +ffffffff81fc54a0 t dce110_timing_generator_v_get_vblank_counter +ffffffff81fc54f0 t dce110_timing_generator_v_set_early_control +ffffffff81fc5550 t dce110_timing_generator_v_wait_for_state +ffffffff81fc56e0 t dce110_timing_generator_v_set_blank +ffffffff81fc5770 t dce110_timing_generator_v_set_overscan_color_black +ffffffff81fc5800 t dce110_timing_generator_v_program_blank_color +ffffffff81fc5880 t dce110_timing_generator_v_set_colors +ffffffff81fc59b0 t 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optc1_disable_reset_trigger +ffffffff81ff9570 T optc1_enable_reset_trigger +ffffffff81ff9680 T optc1_enable_crtc_reset +ffffffff81ff97e0 T optc1_wait_for_state +ffffffff81ff98a0 T optc1_set_early_control +ffffffff81ff98d0 T optc1_set_static_screen_control +ffffffff81ff9970 T optc1_set_drr +ffffffff81ff9ba0 T optc1_set_vtotal_min_max +ffffffff81ff9c40 T optc1_get_crtc_scanoutpos +ffffffff81ff9d40 T optc1_program_stereo +ffffffff81ff9f40 T optc1_is_stereo_left_eye +ffffffff81ff9fb0 T optc1_get_hw_timing +ffffffff81ffa0c0 T optc1_read_otg_state +ffffffff81ffa3d0 T optc1_get_otg_active_size +ffffffff81ffa4e0 T optc1_clear_optc_underflow +ffffffff81ffa520 T optc1_tg_init +ffffffff81ffa5d0 T optc1_is_tg_enabled +ffffffff81ffa630 T optc1_is_optc_underflow_occurred +ffffffff81ffa6a0 T optc1_configure_crc +ffffffff81ffa930 T optc1_get_crc +ffffffff81ffaa30 T dcn10_timing_generator_init +ffffffff81ffaaa0 t optc1_enable_crtc +ffffffff81ffaba0 t optc1_set_test_pattern +ffffffff81ffb280 t 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dscl2_calc_lb_num_partitions +ffffffff820043e0 T dpp2_cnv_set_alpha_keyer +ffffffff82004660 T dpp2_set_cursor_attributes +ffffffff820047c0 T oppn20_dummy_program_regamma_pwl +ffffffff820047f0 T dpp2_construct +ffffffff82004860 t dpp2_cnv_setup +ffffffff82006000 T dpp2_set_degamma_pwl +ffffffff820063a0 T dpp2_set_degamma +ffffffff82006540 T dpp2_cm_set_gamut_remap +ffffffff82006760 T dpp2_program_input_csc +ffffffff82006990 T dpp20_program_blnd_lut +ffffffff820070d0 T dpp20_program_shaper +ffffffff82009060 T dpp20_program_3dlut +ffffffff82009750 t dpp20_set3dlut_ram12 +ffffffff82009920 T dpp2_set_hdr_multiplier +ffffffff8200a000 t dsc2_get_enc_caps +ffffffff8200a080 t dsc2_read_state +ffffffff8200a230 t dsc2_validate_stream +ffffffff8200a290 t dsc2_set_config +ffffffff8200b620 t dsc2_get_packed_pps +ffffffff8200b7c0 t dsc2_enable +ffffffff8200b970 t dsc2_disable +ffffffff8200baf0 t dsc2_disconnect +ffffffff8200bb60 T dsc2_construct +ffffffff8200bbb0 t dsc_prepare_config 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dpp3_program_cm_dealpha +ffffffff820540a0 T dpp3_program_cm_bias +ffffffff82054180 T dpp3_program_gamcor_lut +ffffffff82054bb0 t dpp3_power_on_gamcor_lut +ffffffff82054ce0 T dpp3_set_hdr_multiplier +ffffffff82054d30 T dpp3_cm_set_gamut_remap +ffffffff82055000 T dwb3_config_fc +ffffffff820551b0 T dwb3_set_stereo +ffffffff82055270 T dwb3_enable +ffffffff82055390 T dwb3_set_denorm +ffffffff820554b0 T dwb3_disable +ffffffff82055560 T dwb3_update +ffffffff82055690 T dwb3_is_enabled +ffffffff82055730 T dwb3_set_new_content +ffffffff82055770 t dwb3_get_caps +ffffffff82055810 T dcn30_dwbc_construct +ffffffff82055860 T dwb3_set_host_read_rate_control +ffffffff82056000 T dwb3_ogam_set_input_transfer_func +ffffffff820569d0 T dwb3_set_gamut_remap +ffffffff82056b30 t dwb3_program_gamut_remap +ffffffff82056cc0 T dwb3_program_hdr_mult +ffffffff82057000 T hubbub3_init_dchub_sys_ctx +ffffffff820571d0 T hubbub3_program_watermarks +ffffffff820572d0 T hubbub3_dcc_support_swizzle +ffffffff82057390 T hubbub3_get_dcc_compression_cap +ffffffff82057570 T hubbub3_force_wm_propagate_to_pipes +ffffffff82057620 T hubbub3_force_pstate_change_control +ffffffff820576a0 T hubbub3_init_watermarks +ffffffff820579e0 T hubbub3_construct +ffffffff82058000 T hubp3_set_vm_system_aperture_settings +ffffffff82058130 T hubp3_program_surface_flip_and_addr +ffffffff82058b60 T hubp3_dcc_control +ffffffff82058c20 T hubp3_dcc_control_sienna_cichlid +ffffffff82058d30 T hubp3_dmdata_set_attributes +ffffffff82058f30 T hubp3_program_surface_config +ffffffff82059230 T hubp3_read_state +ffffffff820594a0 T hubp3_setup +ffffffff82059530 T hubp3_init +ffffffff82059560 T hubp3_construct +ffffffff8205a000 T dcn30_set_blend_lut +ffffffff8205a060 T dcn30_set_input_transfer_func +ffffffff8205a1c0 T dcn30_set_output_transfer_func +ffffffff8205a4e0 T dcn30_update_writeback +ffffffff8205a570 t dcn30_set_writeback +ffffffff8205a720 T dcn30_mmhubbub_warmup +ffffffff8205a9d0 T dcn30_enable_writeback +ffffffff8205aaa0 T dcn30_disable_writeback +ffffffff8205ab80 T dcn30_program_all_writeback_pipes_in_tree +ffffffff8205ae60 T dcn30_init_hw +ffffffff8205b750 T dcn30_set_avmute +ffffffff8205b7b0 T dcn30_update_info_frame +ffffffff8205b880 T dcn30_program_dmdata_engine +ffffffff8205b920 T dcn30_apply_idle_power_optimizations +ffffffff8205bea0 T dcn30_does_plane_fit_in_mall +ffffffff8205bf50 T dcn30_hardware_release +ffffffff8205c060 T dcn30_set_disp_pattern_generator +ffffffff8205c0d0 T dcn30_prepare_bandwidth +ffffffff8205d000 T dcn30_hw_sequencer_construct +ffffffff8205e000 t mmhubbub3_warmup_mcif +ffffffff8205e210 t mmhubbub3_config_mcif_buf +ffffffff8205e6b0 t mmhubbub3_config_mcif_arb +ffffffff8205eaf0 T dcn30_mmhubbub_construct +ffffffff8205f000 T mpc3_is_dwb_idle +ffffffff8205f070 T mpc3_set_dwb_mux +ffffffff8205f0e0 T mpc3_disable_dwb_mux +ffffffff8205f160 T mpc3_set_out_rate_control +ffffffff8205f270 T mpc3_get_ogam_current +ffffffff8205f310 T mpc3_power_on_ogam_lut +ffffffff8205f3e0 T mpc3_set_output_gamma +ffffffff8205ff80 T mpc3_set_denorm +ffffffff8205fff0 T mpc3_set_denorm_clamp +ffffffff82060140 T mpc3_program_shaper +ffffffff820623a0 t mpc3_power_on_shaper_3dlut +ffffffff82062720 T mpc3_init_mpcc +ffffffff82062790 T mpc3_set_gamut_remap +ffffffff820629d0 T mpc3_program_3dlut +ffffffff82063150 t mpc3_set3dlut_ram12 +ffffffff82063330 T mpc3_set_output_csc +ffffffff820634a0 T mpc3_set_ocsc_default +ffffffff82063610 T mpc3_set_rmu_mux +ffffffff820636b0 T mpc3_get_rmu_mux_status +ffffffff82063750 T mpcc3_acquire_rmu +ffffffff820638b0 t mpcc3_release_rmu +ffffffff82063a20 t mpc3_set_mpc_mem_lp_mode +ffffffff82063bb0 T dcn30_mpc_construct +ffffffff82064000 T optc3_triplebuffer_lock +ffffffff82064120 T optc3_lock_doublebuffer_enable +ffffffff820643b0 T optc3_lock_doublebuffer_disable +ffffffff820644c0 T optc3_lock +ffffffff82064590 T optc3_set_out_mux +ffffffff820645d0 T optc3_program_blank_color +ffffffff82064700 T optc3_set_drr_trigger_window +ffffffff82064790 T optc3_set_vtotal_change_limit +ffffffff82064800 T optc3_set_dsc_config +ffffffff82064850 T optc3_set_odm_bypass +ffffffff820649c0 T optc3_set_vtotal_min_max +ffffffff820649d0 T optc3_tg_init +ffffffff82064a20 T dcn30_timing_generator_init +ffffffff82064a90 t optc3_set_odm_combine +ffffffff82065000 T dcn30_add_stream_to_ctx +ffffffff82065010 T dcn30_populate_dml_pipes_from_context +ffffffff82065100 T dcn30_populate_dml_writeback_from_context +ffffffff82065160 T dcn30_calc_max_scaled_time +ffffffff820651b0 T dcn30_set_mcif_arb_params +ffffffff82065320 T dcn30_acquire_post_bldn_3dlut +ffffffff82065490 T dcn30_release_post_bldn_3dlut +ffffffff82065530 T dcn30_internal_validate_bw +ffffffff82066300 t dcn30_split_stream_for_mpc_or_odm +ffffffff82066620 T dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff82066740 T dcn30_setup_mclk_switch_using_fw_based_vblank_stretch +ffffffff820667e0 T dcn30_update_soc_for_wm_a +ffffffff82066830 T dcn30_calculate_wm_and_dlg +ffffffff820668a0 T dcn30_validate_bandwidth +ffffffff82066cd0 T dcn30_update_bw_bounding_box +ffffffff820674b0 T dcn30_create_resource_pool +ffffffff82068a70 t dcn30_resource_destruct +ffffffff82068fe0 t dcn30_destroy_resource_pool +ffffffff82069040 t dcn30_panel_cntl_create +ffffffff820690d0 t dcn30_link_encoder_create +ffffffff82069180 t read_dce_straps +ffffffff820691a0 t dcn30_create_audio +ffffffff820691d0 t dcn30_stream_encoder_create +ffffffff82069350 t dcn30_hwseq_create +ffffffff8206a000 T vpg3_update_generic_info_packet +ffffffff8206a9a0 T vpg3_construct +ffffffff8206b000 T dccg301_create +ffffffff8206c000 T dcn301_link_encoder_construct +ffffffff8206d000 T hubbub301_construct +ffffffff8206e000 T dcn301_hw_sequencer_construct +ffffffff8206f000 T dcn301_panel_cntl_construct +ffffffff8206f050 t dcn301_panel_cntl_destroy +ffffffff8206f0a0 t dcn301_panel_cntl_hw_init +ffffffff8206f2a0 t dcn301_is_panel_backlight_on +ffffffff8206f300 t dcn301_is_panel_powered_on +ffffffff8206f3b0 t dcn301_store_backlight_level +ffffffff8206f450 t dcn301_get_16_bit_backlight_from_pwm +ffffffff82070000 T dcn301_create_resource_pool +ffffffff82071590 t dcn301_destruct +ffffffff82071ad0 t dcn301_destroy_resource_pool +ffffffff82071b30 t dcn301_panel_cntl_create +ffffffff82071bc0 t dcn301_link_encoder_create +ffffffff82071c70 t dcn301_calculate_wm_and_dlg +ffffffff82071ce0 t read_dce_straps +ffffffff82071d00 t dcn301_create_audio +ffffffff82071d30 t dcn301_stream_encoder_create +ffffffff82071eb0 t dcn301_hwseq_create +ffffffff82072000 T dcn302_dpp_pg_control +ffffffff820722a0 T dcn302_hubp_pg_control +ffffffff82072550 T dcn302_dsc_pg_control +ffffffff82073000 T dcn302_hw_sequencer_construct +ffffffff82074000 T dcn302_update_bw_bounding_box +ffffffff82074050 T dcn302_create_resource_pool +ffffffff820753e0 t dcn302_resource_destruct +ffffffff820758f0 t dcn302_destroy_resource_pool +ffffffff82075940 t dcn302_panel_cntl_create +ffffffff820759d0 t dcn302_link_encoder_create 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dcn31_setup_hpo_hw_control +ffffffff8208b000 T dcn31_hw_sequencer_construct +ffffffff8208c000 T optc31_immediate_disable_crtc +ffffffff8208c0f0 T optc31_set_drr +ffffffff8208c300 T optc3_init_odm +ffffffff8208c470 T dcn31_timing_generator_init +ffffffff8208c4e0 t optc31_enable_crtc +ffffffff8208c5e0 t optc31_disable_crtc +ffffffff8208c6c0 t optc31_set_odm_combine +ffffffff8208d000 T dcn31_panel_cntl_construct +ffffffff8208d040 t dcn31_panel_cntl_destroy +ffffffff8208d090 t dcn31_panel_cntl_hw_init +ffffffff8208d180 t dcn31_is_panel_backlight_on +ffffffff8208d220 t dcn31_is_panel_powered_on +ffffffff8208d2c0 t dcn31_store_backlight_level +ffffffff8208d380 t dcn31_get_16_bit_backlight_from_pwm +ffffffff8208e000 T dcn31_populate_dml_pipes_from_context +ffffffff8208e350 T dcn31_calculate_wm_and_dlg +ffffffff8208e3c0 T dcn31_populate_dml_writeback_from_context +ffffffff8208e420 T dcn31_set_mcif_arb_params +ffffffff8208e480 T dcn31_validate_bandwidth +ffffffff8208e860 T dcn31_create_resource_pool +ffffffff8208fc00 t dcn31_resource_destruct +ffffffff82090260 t dcn31_destroy_resource_pool +ffffffff820902c0 t dcn31_panel_cntl_create +ffffffff82090330 t dcn31_link_encoder_create +ffffffff820903e0 t dcn31_link_enc_create_minimal +ffffffff82090480 t dcn31_get_panel_config_defaults +ffffffff820904f0 t read_dce_straps +ffffffff82090510 t dcn31_create_audio +ffffffff82090540 t dcn31_stream_encoder_create +ffffffff820906c0 t dcn31_hpo_dp_stream_encoder_create +ffffffff82090880 t dcn31_hpo_dp_link_encoder_create +ffffffff82090910 t dcn31_hwseq_create +ffffffff82091000 T vpg31_powerdown +ffffffff82091090 T vpg31_poweron +ffffffff82091120 T vpg31_construct +ffffffff82092000 T dccg314_create +ffffffff820920b0 t dccg314_set_dpstreamclk +ffffffff82092480 t dccg314_set_dtbclk_dto +ffffffff82092670 t dccg314_set_pixel_rate_div +ffffffff820929e0 t dccg314_set_valid_pixel_rate +ffffffff82093000 T dcn314_dio_stream_encoder_construct +ffffffff82093070 t enc314_stream_encoder_hdmi_set_stream_attribute +ffffffff82093660 t enc314_stream_encoder_dvi_set_stream_attribute +ffffffff82093860 t enc314_stream_encoder_dp_blank +ffffffff820938c0 t enc314_stream_encoder_dp_unblank +ffffffff82093c00 t enc314_read_state +ffffffff82093d60 t enc314_dp_set_dsc_config +ffffffff82093db0 t enc314_dp_set_odm_combine +ffffffff82093df0 t enc314_set_dig_input_mode +ffffffff82093e40 t enc314_enable_fifo +ffffffff82093ee0 t enc314_disable_fifo +ffffffff82093f20 t enc314_reset_fifo +ffffffff82095000 T dcn314_update_odm +ffffffff82095610 T dcn314_dsc_pg_control +ffffffff820959d0 T dcn314_enable_power_gating_plane +ffffffff82095c60 T dcn314_calculate_dccg_k1_k2_values +ffffffff82095de0 T dcn314_set_pixels_per_cycle +ffffffff82096000 T dcn314_hw_sequencer_construct +ffffffff82097000 T dcn314_timing_generator_init +ffffffff82097070 t optc314_enable_crtc +ffffffff82097170 t optc314_disable_crtc +ffffffff82097240 t optc314_phantom_crtc_post_enable +ffffffff82097300 t optc314_set_odm_bypass +ffffffff82097470 t optc314_set_odm_combine +ffffffff82097770 t optc314_set_h_timing_div_manual_mode +ffffffff82098000 T dcn314_create_resource_pool +ffffffff820992d0 t dcn314_resource_destruct +ffffffff82099930 t dcn314_destroy_resource_pool +ffffffff82099990 t dcn31_panel_cntl_create +ffffffff82099a00 t dcn31_link_encoder_create +ffffffff82099ab0 t dcn31_link_enc_create_minimal +ffffffff82099b50 t dcn314_populate_dml_pipes_from_context +ffffffff82099be0 t dcn314_update_bw_bounding_box +ffffffff82099c30 t dcn314_get_panel_config_defaults +ffffffff82099ca0 t read_dce_straps +ffffffff82099cc0 t dcn31_create_audio +ffffffff82099cf0 t dcn314_stream_encoder_create +ffffffff82099e70 t dcn31_hpo_dp_stream_encoder_create +ffffffff8209a030 t dcn31_hpo_dp_link_encoder_create +ffffffff8209a0c0 t dcn314_hwseq_create +ffffffff8209b000 T dcn315_create_resource_pool +ffffffff8209c260 t dcn315_resource_destruct +ffffffff8209c8c0 t dcn315_destroy_resource_pool +ffffffff8209c920 t dcn31_panel_cntl_create +ffffffff8209c990 t dcn31_link_encoder_create +ffffffff8209ca40 t dcn31_link_enc_create_minimal +ffffffff8209cae0 t dcn315_populate_dml_pipes_from_context +ffffffff8209ce20 t dcn315_get_panel_config_defaults +ffffffff8209ce90 t read_dce_straps +ffffffff8209ceb0 t dcn31_create_audio +ffffffff8209cee0 t dcn315_stream_encoder_create +ffffffff8209d060 t dcn31_hpo_dp_stream_encoder_create +ffffffff8209d220 t dcn31_hpo_dp_link_encoder_create +ffffffff8209d2b0 t dcn31_hwseq_create +ffffffff8209e000 T dcn316_create_resource_pool +ffffffff8209f2a0 t dcn316_resource_destruct +ffffffff8209f900 t dcn316_destroy_resource_pool +ffffffff8209f960 t dcn31_panel_cntl_create +ffffffff8209f9d0 t dcn31_link_encoder_create +ffffffff8209fa80 t dcn31_link_enc_create_minimal +ffffffff8209fb20 t dcn316_populate_dml_pipes_from_context +ffffffff8209fe40 t dcn316_get_panel_config_defaults +ffffffff8209feb0 t read_dce_straps +ffffffff8209fed0 t dcn31_create_audio +ffffffff8209ff00 t dcn316_stream_encoder_create +ffffffff820a0080 t dcn31_hpo_dp_stream_encoder_create +ffffffff820a0240 t dcn31_hpo_dp_link_encoder_create +ffffffff820a02d0 t dcn31_hwseq_create +ffffffff820a1000 T dccg32_create +ffffffff820a10b0 t dccg32_get_dccg_ref_freq +ffffffff820a10e0 t dccg32_otg_add_pixel +ffffffff820a1120 t dccg32_otg_drop_pixel +ffffffff820a1160 t dccg32_set_dpstreamclk +ffffffff820a1550 t dccg32_set_dtbclk_dto +ffffffff820a1740 t dccg32_set_pixel_rate_div +ffffffff820a1ab0 t dccg32_set_valid_pixel_rate +ffffffff820a2000 T enc32_hw_init +ffffffff820a2090 T dcn32_link_encoder_enable_dp_output +ffffffff820a20e0 T dcn32_link_encoder_construct +ffffffff820a22c0 t dcn32_link_encoder_is_in_alt_mode +ffffffff820a2340 t dcn32_link_encoder_get_max_link_cap +ffffffff820a3000 T dcn32_dio_stream_encoder_construct +ffffffff820a3070 t enc32_stream_encoder_hdmi_set_stream_attribute +ffffffff820a35a0 t enc32_stream_encoder_dvi_set_stream_attribute +ffffffff820a3720 t enc32_stream_encoder_dp_unblank +ffffffff820a3bd0 t enc32_read_state +ffffffff820a3d30 t enc32_dp_set_dsc_config +ffffffff820a3d80 t enc32_dp_set_odm_combine +ffffffff820a3dc0 t enc32_set_dig_input_mode +ffffffff820a4000 T dpp32_construct +ffffffff820a4060 t dscl32_calc_lb_num_partitions +ffffffff820a5000 T hpo_dp_link_encoder32_construct +ffffffff820a5050 t dcn32_hpo_dp_link_enc_is_in_alt_mode +ffffffff820a6000 T dcn32_program_det_size +ffffffff820a61a0 T hubbub32_program_urgent_watermarks +ffffffff820a6900 T hubbub32_program_stutter_watermarks +ffffffff820a6d50 T hubbub32_program_pstate_watermarks +ffffffff820a71d0 T hubbub32_program_usr_watermarks +ffffffff820a7420 T hubbub32_force_usr_retraining_allow +ffffffff820a74a0 T hubbub32_force_wm_propagate_to_pipes +ffffffff820a7540 T hubbub32_construct +ffffffff820a75c0 t hubbub32_wm_read_state +ffffffff820a7a30 t hubbub32_program_watermarks +ffffffff820a7b40 t hubbub32_init_watermarks +ffffffff820a7f80 t dcn32_program_compbuf_size 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dcn32_update_odm +ffffffff820ac620 T dcn32_calculate_dccg_k1_k2_values +ffffffff820ac830 T dcn32_is_dp_dig_pixel_rate_div_policy +ffffffff820ac8c0 T dcn32_set_pixels_per_cycle +ffffffff820aca00 T dcn32_unblank_stream +ffffffff820acbd0 T dcn32_disable_link_output +ffffffff820ace60 T dcn32_update_phantom_vp_position +ffffffff820acf80 T dcn32_dsc_pg_status +ffffffff820ad060 T dcn32_update_dsc_pg +ffffffff820ae000 T dcn32_hw_sequencer_init_functions +ffffffff820af000 t mmhubbub32_warmup_mcif +ffffffff820af210 t mmhubbub32_config_mcif_buf +ffffffff820af6b0 t mmhubbub32_config_mcif_arb +ffffffff820afac0 T dcn32_mmhubbub_construct +ffffffff820b0000 t mpc32_mpc_init +ffffffff820b0220 t mpc32_program_post1dlut +ffffffff820b0d00 t mpc32_program_shaper +ffffffff820b2fa0 t mpc32_program_3dlut +ffffffff820b3890 T dcn32_mpc_construct +ffffffff820b3950 t mpc32_power_on_shaper_3dlut +ffffffff820b3b80 t mpc32_set3dlut_ram12 +ffffffff820b4000 T dcn32_timing_generator_init +ffffffff820b4070 t optc32_enable_crtc +ffffffff820b4170 t optc32_disable_crtc +ffffffff820b4240 t optc32_phantom_crtc_post_enable +ffffffff820b4300 t optc32_set_drr +ffffffff820b4550 t optc32_set_odm_bypass +ffffffff820b46c0 t optc32_set_odm_combine +ffffffff820b49c0 t optc32_set_h_timing_div_manual_mode +ffffffff820b5000 T dcn32_panel_cntl_create +ffffffff820b5070 T dcn32_acquire_post_bldn_3dlut +ffffffff820b5160 T dcn32_release_post_bldn_3dlut +ffffffff820b5200 T dcn32_remove_phantom_pipes +ffffffff820b5370 T dcn32_add_phantom_pipes +ffffffff820b57b0 T dcn32_validate_bandwidth +ffffffff820b5c60 T dcn32_populate_dml_pipes_from_context +ffffffff820b5fc0 T dcn32_calculate_wm_and_dlg +ffffffff820b6030 T dcn32_create_resource_pool +ffffffff820b60e0 t dcn32_resource_construct +ffffffff820c2530 T dcn32_acquire_idle_pipe_for_head_pipe_in_layer +ffffffff820c2770 t dcn32_mpc_create +ffffffff820c7130 t dcn32_resource_destruct +ffffffff820c77a0 t dcn32_destroy_resource_pool +ffffffff820c7800 t dcn32_link_encoder_create +ffffffff820c8760 t dcn32_update_bw_bounding_box +ffffffff820c87b0 t read_dce_straps +ffffffff820c87e0 t dcn32_create_audio +ffffffff820c8b20 t dcn32_stream_encoder_create +ffffffff820ca990 t dcn32_hpo_dp_stream_encoder_create +ffffffff820cb670 t dcn32_hpo_dp_link_encoder_create +ffffffff820cbaf0 t dcn32_hwseq_create +ffffffff820cbf80 t dcn32_vpg_create +ffffffff820cd000 T dcn32_helper_calculate_num_ways_for_subvp +ffffffff820cd1e0 T dcn32_merge_pipes_for_subvp +ffffffff820cd3b0 T dcn32_all_pipes_have_stream_and_plane +ffffffff820cd440 T dcn32_subvp_in_use +ffffffff820cd4d0 T dcn32_mpo_in_use +ffffffff820cd530 T dcn32_any_surfaces_rotated +ffffffff820cd5c0 T dcn32_determine_det_override +ffffffff820cd900 T dcn32_set_det_allocations +ffffffff820cda80 T dcn32_save_mall_state +ffffffff820cdb30 T dcn32_restore_mall_state +ffffffff820ce000 T dcn321_link_encoder_construct +ffffffff820cf000 T dcn321_create_resource_pool +ffffffff820cf0b0 t dcn321_resource_construct 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display_pipe_configuration +ffffffff820f89a0 T dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation +ffffffff820fe000 T dcn_bw_mod +ffffffff820fe050 T dcn_bw_min2 +ffffffff820fe090 T dcn_bw_max +ffffffff820fe0c0 T dcn_bw_max2 +ffffffff820fe100 T dcn_bw_floor2 +ffffffff820fe1a0 T dcn_bw_floor +ffffffff820fe1d0 T dcn_bw_ceil +ffffffff820fe210 T dcn_bw_ceil2 +ffffffff820fe2c0 T dcn_bw_max3 +ffffffff820fe360 T dcn_bw_max5 +ffffffff820fe4c0 T dcn_bw_pow +ffffffff820fe550 T dcn_bw_fabs +ffffffff820fe5b0 T dcn_bw_log +ffffffff820ff000 T swizzle_mode_to_macro_tile_size +ffffffff820ff090 T dcn_validate_bandwidth +ffffffff82101330 T dcn_bw_sync_calcs_and_dml +ffffffff82101580 t dcn_bw_calc_rq_dlg_ttu +ffffffff82101f00 T dcn_find_dcfclk_suits_all +ffffffff82102360 T dcn_bw_update_from_pplib_fclks +ffffffff821024f0 T dcn_bw_update_from_pplib_dcfclks +ffffffff821025c0 T dcn_get_soc_clks +ffffffff82102640 T dcn_bw_notify_pplib_of_wm_ranges +ffffffff82103000 T dcn20_populate_dml_writeback_from_context +ffffffff82103180 T dcn20_fpu_set_wb_arb_params +ffffffff82103330 T dcn20_calculate_dlg_params +ffffffff82103b10 T dcn20_populate_dml_pipes_from_context +ffffffff82104a10 T dcn20_calculate_wm +ffffffff821051b0 T dcn20_update_bounding_box +ffffffff82105420 T dcn20_cap_soc_clocks +ffffffff821057a0 T dcn20_patch_bounding_box +ffffffff82105910 T dcn20_validate_bandwidth_fp +ffffffff82105aa0 t dcn20_validate_bandwidth_internal +ffffffff82105e80 T dcn20_fpu_set_wm_ranges +ffffffff82105f20 T dcn20_fpu_adjust_dppclk +ffffffff82105fc0 T dcn21_populate_dml_pipes_from_context +ffffffff821060b0 T dcn21_validate_bandwidth_fp +ffffffff82106b30 T dcn21_update_bw_bounding_box +ffffffff82107010 T dcn21_clk_mgr_set_bw_params_wm_table +ffffffff82107070 T dcn201_populate_dml_writeback_from_context_fpu +ffffffff82107380 t calculate_wm_set_for_vlevel +ffffffff82108000 T dml20_recalculate +ffffffff82108740 t dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff8210dda0 T dml20_ModeSupportAndSystemConfigurationFull +ffffffff82114d30 t TruncToValidBPP +ffffffff82114f10 t CalculateVMAndRowBytes +ffffffff821155a0 t CalculatePrefetchSourceLines +ffffffff82115760 t CalculateWriteBackDelay +ffffffff82115a30 t CalculatePrefetchSchedule +ffffffff821168f0 t CalculateFlipSchedule +ffffffff82116ca0 t adjust_ReturnBW +ffffffff82117000 T dml20v2_recalculate +ffffffff82117740 t dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff8211ce50 T dml20v2_ModeSupportAndSystemConfigurationFull +ffffffff82123cd0 t TruncToValidBPP +ffffffff82124260 t CalculateVMAndRowBytes +ffffffff821248f0 t CalculatePrefetchSourceLines +ffffffff82124ab0 t CalculateWriteBackDelay +ffffffff82124d80 t CalculateDelayAfterScaler +ffffffff821250d0 t CalculatePrefetchSchedule +ffffffff82125e40 t CalculateFlipSchedule +ffffffff821261f0 t adjust_ReturnBW +ffffffff82127000 T dml20_rq_dlg_get_rq_reg +ffffffff82127490 t dml20_rq_dlg_get_rq_params +ffffffff82127660 T dml20_rq_dlg_get_dlg_reg +ffffffff821295a0 t get_surf_rq_param +ffffffff82129e20 t calculate_ttu_cursor +ffffffff8212b000 T dml20v2_rq_dlg_get_rq_reg +ffffffff8212b490 t dml20v2_rq_dlg_get_rq_params +ffffffff8212b660 T dml20v2_rq_dlg_get_dlg_reg +ffffffff8212d5b0 t get_surf_rq_param +ffffffff8212de30 t calculate_ttu_cursor +ffffffff8212f000 T dml21_recalculate +ffffffff8212f700 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff821350b0 T dml21_ModeSupportAndSystemConfigurationFull +ffffffff8213b190 t TruncToValidBPP +ffffffff8213b720 t CalculateDCFCLKDeepSleep +ffffffff8213ba60 t CalculateVMAndRowBytes +ffffffff8213c2d0 t CalculatePrefetchSourceLines +ffffffff8213c490 t CalculateWriteBackDelay +ffffffff8213c760 t CalculatePrefetchSchedulePerPlane +ffffffff8213cf70 t CalculateUrgentBurstFactor +ffffffff8213d380 t CalculateFlipSchedule +ffffffff8213d870 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff8213e8d0 t CalculatePrefetchSchedule +ffffffff82140000 T dml21_rq_dlg_get_rq_reg +ffffffff82140490 t dml_rq_dlg_get_rq_params +ffffffff82140660 T dml21_rq_dlg_get_dlg_reg +ffffffff821429c0 t get_surf_rq_param +ffffffff82143300 t calculate_ttu_cursor +ffffffff82144000 T optc3_fpu_set_vrr_m_const +ffffffff821444a0 T dcn30_fpu_populate_dml_writeback_from_context +ffffffff821447f0 T dcn30_fpu_set_mcif_arb_params +ffffffff82144960 T dcn30_fpu_update_soc_for_wm_a +ffffffff82144a10 T dcn30_fpu_calculate_wm_and_dlg +ffffffff821452f0 T dcn30_fpu_update_dram_channel_width_bytes +ffffffff82145350 T dcn30_fpu_update_max_clk +ffffffff821453f0 T dcn30_fpu_get_optimal_dcfclk_fclk_for_uclk +ffffffff821454f0 T dcn30_fpu_update_bw_bounding_box +ffffffff821456d0 T dcn30_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff82145890 T dcn3_fpu_build_wm_range_table +ffffffff82145b70 T patch_dcn30_soc_bounding_box +ffffffff82146000 T dml30_recalculate +ffffffff82146600 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff8214cc40 T dml30_CalculateBytePerPixelAnd256BBlockSizes +ffffffff8214ceb0 T dml30_CalculateWriteBackDISPCLK +ffffffff8214d030 T dml30_ModeSupportAndSystemConfigurationFull +ffffffff82154430 t CalculateSwathAndDETConfiguration +ffffffff82154aa0 t TruncToValidBPP +ffffffff82154d20 t dscceComputeDelay +ffffffff82154e60 t CalculateVMAndRowBytes +ffffffff82155510 t CalculatePrefetchSourceLines +ffffffff821556d0 t CalculateUrgentBurstFactor +ffffffff82155960 t CalculateDCFCLKDeepSleep +ffffffff82155c80 t UseMinimumDCFCLK +ffffffff82156e80 t CalculatePrefetchSchedule +ffffffff821583e0 t CalculateFlipSchedule +ffffffff821588d0 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff821596f0 t CalculateSwathWidth +ffffffff8215a000 T dml30_rq_dlg_get_rq_reg +ffffffff8215a4b0 t dml_rq_dlg_get_rq_params +ffffffff8215a720 T dml30_rq_dlg_get_dlg_reg +ffffffff8215ced0 t get_surf_rq_param +ffffffff8215d870 t calculate_ttu_cursor +ffffffff8215e000 T dcn301_update_bw_bounding_box +ffffffff8215e320 T dcn301_fpu_set_wm_ranges +ffffffff8215e3c0 T dcn301_fpu_init_soc_bounding_box +ffffffff8215e460 T dcn301_calculate_wm_and_dlg_fp +ffffffff8215e790 t calculate_wm_set_for_vlevel +ffffffff8215f000 T dcn302_fpu_update_bw_bounding_box +ffffffff8215fac0 T dcn302_fpu_init_soc_bounding_box +ffffffff82160000 T dcn303_fpu_update_bw_bounding_box +ffffffff82160b00 T dcn303_fpu_init_soc_bounding_box +ffffffff82161000 T dcn31_zero_pipe_dcc_fraction +ffffffff82161060 T dcn31_update_soc_for_wm_a +ffffffff82161110 T dcn315_update_soc_for_wm_a +ffffffff821611e0 T dcn31_calculate_wm_and_dlg_fp +ffffffff821616e0 T dcn31_update_bw_bounding_box +ffffffff82161ad0 T dcn315_update_bw_bounding_box +ffffffff82161dc0 T dcn316_update_bw_bounding_box +ffffffff82163000 T dml31_recalculate +ffffffff821632a0 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff8216a060 T dml31_CalculateWriteBackDISPCLK +ffffffff8216a1e0 T dml31_ModeSupportAndSystemConfigurationFull +ffffffff821724a0 t CalculateSwathAndDETConfiguration +ffffffff82172aa0 t TruncToValidBPP +ffffffff82172d20 t dscceComputeDelay +ffffffff82172e60 t CalculateDCFCLKDeepSleep +ffffffff821731a0 t CalculateVMAndRowBytes +ffffffff821737f0 t CalculatePrefetchSourceLines +ffffffff821739b0 t CalculateUrgentBurstFactor +ffffffff82173c40 t CalculatePrefetchSchedulePerPlane +ffffffff82174370 t CalculateFlipSchedule +ffffffff821748f0 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff82175550 t CalculateSwathWidth +ffffffff82175a60 t CalculatePrefetchSchedule +ffffffff82176ef0 t CalculateVupdateAndDynamicMetadataParameters +ffffffff82178000 T dml31_rq_dlg_get_rq_reg +ffffffff821784b0 t dml_rq_dlg_get_rq_params +ffffffff82178720 T dml31_rq_dlg_get_dlg_reg +ffffffff8217b1f0 t get_surf_rq_param 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dml32_ModeSupportAndSystemConfigurationFull +ffffffff821a9000 T dml32_dscceComputeDelay +ffffffff821a9140 T dml32_dscComputeDelay +ffffffff821a9180 T IsVertical +ffffffff821a91b0 T dml32_CalculateSinglePipeDPPCLKAndSCLThroughput +ffffffff821a94c0 T dml32_CalculateBytePerPixelAndBlockSizes +ffffffff821a97f0 T dml32_CalculateSwathAndDETConfiguration +ffffffff821aa000 T dml32_CalculateSwathWidth +ffffffff821aa8a0 T dml32_UnboundedRequest +ffffffff821aa900 T dml32_CalculateDETBufferSize +ffffffff821aaf40 T dml32_CalculateODMMode +ffffffff821ab6a0 T dml32_CalculateRequiredDispclk +ffffffff821ab850 T dml32_RoundToDFSGranularity +ffffffff821ab8e0 T dml32_CalculateOutputLink +ffffffff821ac400 T dml32_TruncToValidBPP +ffffffff821ac750 T dml32_CalculateDPPCLK +ffffffff821ac900 T dml32_RequiredDTBCLK +ffffffff821acb50 T dml32_DSCDelayRequirement +ffffffff821ad010 T dml32_CalculateSurfaceSizeInMall +ffffffff821adb20 T dml32_CalculateVMRowAndSwath +ffffffff821ae950 T dml32_CalculateVMAndRowBytes +ffffffff821af590 T dml32_CalculatePrefetchSourceLines +ffffffff821af7e0 T dml32_CalculateMALLUseForStaticScreen +ffffffff821af920 T dml32_CalculateRowBandwidth +ffffffff821afa80 T dml32_CalculateUrgentLatency +ffffffff821afb10 T dml32_CalculateUrgentBurstFactor +ffffffff821afdb0 T dml32_CalculateDCFCLKDeepSleep +ffffffff821b00f0 T dml32_CalculateWriteBackDelay +ffffffff821b0250 T dml32_UseMinimumDCFCLK +ffffffff821b1110 T dml32_CalculateExtraLatencyBytes +ffffffff821b12e0 T dml32_CalculateTWait +ffffffff821b13c0 T dml32_CalculateVUpdateAndDynamicMetadataParameters +ffffffff821b1620 T dml32_get_return_bw_mbps +ffffffff821b17d0 T dml32_get_return_bw_mbps_vm_only +ffffffff821b18b0 T dml32_CalculateExtraLatency +ffffffff821b1ad0 T dml32_CalculatePrefetchSchedule +ffffffff821b3080 T dml32_CalculateFlipSchedule +ffffffff821b3600 T dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport +ffffffff821b4750 T dml32_CalculateWriteBackDISPCLK +ffffffff821b4910 T dml32_CalculateMinAndMaxPrefetchMode +ffffffff821b4950 T dml32_CalculatePixelDeliveryTimes +ffffffff821b4dc0 T dml32_CalculateMetaAndPTETimes +ffffffff821b5500 T dml32_CalculateVMGroupAndRequestTimes +ffffffff821b59f0 T dml32_CalculateDCCConfiguration +ffffffff821b6000 T dml32_CalculateStutterEfficiency +ffffffff821b6f40 T dml32_CalculateMaxDETAndMinCompressedBufferSize +ffffffff821b7020 T dml32_CalculateVActiveBandwithSupport +ffffffff821b71b0 T dml32_CalculatePrefetchBandwithSupport +ffffffff821b7450 T dml32_CalculateBandwidthAvailableForImmediateFlip +ffffffff821b75a0 T dml32_CalculateImmediateFlipBandwithSupport +ffffffff821b8000 T dml32_rq_dlg_get_rq_reg +ffffffff821b86a0 T dml32_rq_dlg_get_dlg_reg +ffffffff821bb000 T dcn321_insert_entry_into_table_sorted +ffffffff821bb430 T dcn321_update_bw_bounding_box_fpu +ffffffff821bd000 T dml_init_instance +ffffffff821bd300 T dml_get_status_message +ffffffff821bd340 T dml_log_pipe_params +ffffffff821bd370 T dml_log_mode_support_params +ffffffff821be000 T dml_get_voltage_level +ffffffff821be1e0 t fetch_socbb_params +ffffffff821be6f0 t fetch_ip_params +ffffffff821beb90 t fetch_pipe_params +ffffffff821bfc90 T PixelClockAdjustmentForProgressiveToInterlaceUnit +ffffffff821bfd00 T get_clk_dcf_deepsleep +ffffffff821bfe10 T get_wm_urgent +ffffffff821bff20 T get_wm_memory_trip +ffffffff821c0030 T get_wm_writeback_urgent +ffffffff821c0140 T get_wm_stutter_exit +ffffffff821c0250 T get_wm_stutter_enter_exit +ffffffff821c0360 T get_wm_z8_stutter_exit +ffffffff821c0470 T get_wm_z8_stutter_enter_exit +ffffffff821c0580 T get_stutter_efficiency_z8 +ffffffff821c0690 T get_stutter_num_bursts_z8 +ffffffff821c07a0 T get_wm_dram_clock_change +ffffffff821c08b0 T get_wm_writeback_dram_clock_change +ffffffff821c09c0 T get_stutter_efficiency +ffffffff821c0ad0 T get_stutter_efficiency_no_vblank +ffffffff821c0be0 T get_stutter_period +ffffffff821c0cf0 T get_urgent_latency +ffffffff821c0e00 T get_urgent_extra_latency +ffffffff821c0f10 T get_nonurgent_latency +ffffffff821c1020 T get_dram_clock_change_latency +ffffffff821c1130 T get_dispclk_calculated +ffffffff821c1240 T get_total_data_read_bw +ffffffff821c1350 T get_return_bw +ffffffff821c1460 T get_tcalc +ffffffff821c1570 T get_fraction_of_urgent_bandwidth +ffffffff821c1680 T get_fraction_of_urgent_bandwidth_imm_flip +ffffffff821c1790 T get_cstate_max_cap_mode +ffffffff821c18b0 T get_comp_buffer_size_kbytes +ffffffff821c19c0 T get_pixel_chunk_size_in_kbyte +ffffffff821c1ad0 T get_alpha_pixel_chunk_size_in_kbyte +ffffffff821c1be0 T get_meta_chunk_size_in_kbyte +ffffffff821c1cf0 T get_min_pixel_chunk_size_in_byte +ffffffff821c1e00 T get_min_meta_chunk_size_in_byte +ffffffff821c1f10 T get_fclk_watermark +ffffffff821c2020 T get_usr_retraining_watermark +ffffffff821c2130 T get_comp_buffer_reserved_space_kbytes +ffffffff821c2240 T get_comp_buffer_reserved_space_64bytes +ffffffff821c2350 T get_comp_buffer_reserved_space_zs +ffffffff821c2460 T get_unbounded_request_enabled +ffffffff821c2580 T get_dsc_delay +ffffffff821c26a0 T get_dppclk_calculated +ffffffff821c27c0 T get_dscclk_calculated +ffffffff821c28e0 T get_min_ttu_vblank +ffffffff821c2a00 T get_min_ttu_vblank_in_us +ffffffff821c2b20 T get_vratio_prefetch_l +ffffffff821c2c40 T get_vratio_prefetch_c +ffffffff821c2d60 T get_dst_x_after_scaler +ffffffff821c2e80 T get_dst_y_after_scaler +ffffffff821c2fa0 T get_dst_y_per_vm_vblank +ffffffff821c30c0 T get_dst_y_per_row_vblank +ffffffff821c31e0 T get_dst_y_prefetch +ffffffff821c3300 T get_dst_y_per_vm_flip +ffffffff821c3420 T get_dst_y_per_row_flip +ffffffff821c3540 T get_refcyc_per_vm_group_vblank +ffffffff821c3660 T get_refcyc_per_vm_group_flip +ffffffff821c3780 T get_refcyc_per_vm_req_vblank +ffffffff821c38a0 T get_refcyc_per_vm_req_flip +ffffffff821c39c0 T get_refcyc_per_vm_group_vblank_in_us +ffffffff821c3ae0 T get_refcyc_per_vm_group_flip_in_us +ffffffff821c3c00 T get_refcyc_per_vm_req_vblank_in_us +ffffffff821c3d20 T get_refcyc_per_vm_req_flip_in_us +ffffffff821c3e40 T get_refcyc_per_vm_dmdata_in_us +ffffffff821c3f60 T get_dmdata_dl_delta_in_us +ffffffff821c4080 T get_refcyc_per_line_delivery_l_in_us +ffffffff821c41a0 T get_refcyc_per_line_delivery_c_in_us +ffffffff821c42c0 T get_refcyc_per_line_delivery_pre_l_in_us +ffffffff821c43e0 T get_refcyc_per_line_delivery_pre_c_in_us +ffffffff821c4500 T get_refcyc_per_req_delivery_l_in_us +ffffffff821c4620 T get_refcyc_per_req_delivery_c_in_us +ffffffff821c4740 T get_refcyc_per_req_delivery_pre_l_in_us +ffffffff821c4860 T get_refcyc_per_req_delivery_pre_c_in_us +ffffffff821c4980 T get_refcyc_per_cursor_req_delivery_in_us +ffffffff821c4aa0 T get_refcyc_per_cursor_req_delivery_pre_in_us +ffffffff821c4bc0 T get_refcyc_per_meta_chunk_nom_l_in_us +ffffffff821c4ce0 T get_refcyc_per_meta_chunk_nom_c_in_us +ffffffff821c4e00 T get_refcyc_per_meta_chunk_vblank_l_in_us +ffffffff821c4f20 T get_refcyc_per_meta_chunk_vblank_c_in_us +ffffffff821c5040 T get_refcyc_per_meta_chunk_flip_l_in_us +ffffffff821c5160 T get_refcyc_per_meta_chunk_flip_c_in_us +ffffffff821c5280 T get_vstartup +ffffffff821c53a0 T get_vupdate_offset +ffffffff821c54c0 T get_vupdate_width +ffffffff821c55e0 T get_vready_offset +ffffffff821c5700 T get_vready_at_or_after_vsync +ffffffff821c5830 T get_min_dst_y_next_start +ffffffff821c5950 T get_dst_y_per_pte_row_nom_l +ffffffff821c5a70 T get_dst_y_per_pte_row_nom_c +ffffffff821c5b90 T get_dst_y_per_meta_row_nom_l +ffffffff821c5cb0 T get_dst_y_per_meta_row_nom_c +ffffffff821c5dd0 T get_refcyc_per_pte_group_nom_l_in_us +ffffffff821c5ef0 T get_refcyc_per_pte_group_nom_c_in_us +ffffffff821c6010 T get_refcyc_per_pte_group_vblank_l_in_us +ffffffff821c6130 T get_refcyc_per_pte_group_vblank_c_in_us +ffffffff821c6250 T get_refcyc_per_pte_group_flip_l_in_us +ffffffff821c6370 T get_refcyc_per_pte_group_flip_c_in_us +ffffffff821c6490 T get_vstartup_calculated +ffffffff821c65b0 T get_dpte_row_height_linear_c +ffffffff821c66d0 T get_swath_height_l +ffffffff821c67f0 T get_swath_height_c +ffffffff821c6910 T get_det_stored_buffer_size_l_bytes +ffffffff821c6a30 T get_det_stored_buffer_size_c_bytes +ffffffff821c6b50 T get_dpte_group_size_in_bytes +ffffffff821c6c70 T get_vm_group_size_in_bytes +ffffffff821c6d90 T get_dpte_row_height_linear_l +ffffffff821c6eb0 T get_pte_buffer_mode +ffffffff821c6fe0 T get_subviewport_lines_needed_in_mall +ffffffff821c7100 T get_total_immediate_flip_bytes +ffffffff821c7210 T get_total_immediate_flip_bw +ffffffff821c73f0 T get_total_prefetch_bw +ffffffff821c75d0 T get_total_surface_size_in_mall_bytes +ffffffff821c7770 T get_det_buffer_size_kbytes +ffffffff821c7890 T get_is_phantom_pipe +ffffffff821c79b0 T Calculate256BBlockSizes +ffffffff821c7aa0 T CalculateMinAndMaxPrefetchMode +ffffffff821c7b10 T ModeSupportAndSystemConfiguration +ffffffff821c7e20 T CalculateWriteBackDISPCLK +ffffffff821c9000 T print__rq_params_st +ffffffff821c9030 T print__data_rq_sizing_params_st +ffffffff821c9060 T print__data_rq_dlg_params_st +ffffffff821c9090 T print__data_rq_misc_params_st +ffffffff821c90c0 T print__rq_dlg_params_st +ffffffff821c90f0 T print__dlg_sys_params_st +ffffffff821c9120 T print__data_rq_regs_st +ffffffff821c9150 T print__rq_regs_st +ffffffff821c9180 T print__dlg_regs_st +ffffffff821c91b0 T print__ttu_regs_st +ffffffff821ca000 T dml1_extract_rq_regs +ffffffff821ca330 T dml1_rq_dlg_get_rq_params +ffffffff821ca500 t get_surf_rq_param +ffffffff821cb200 T dml1_rq_dlg_get_dlg_params +ffffffff821ce000 T _do_calc_rc_params +ffffffff821cf040 t get_qp_set +ffffffff821d0000 T dc_dsc_parse_dsc_dpcd +ffffffff821d02a0 t dsc_throughput_from_dpcd +ffffffff821d0460 T dc_dsc_compute_bandwidth_range +ffffffff821d0640 t intersect_dsc_caps +ffffffff821d0800 t setup_dsc_config +ffffffff821d11d0 T dc_dsc_compute_config +ffffffff821d12c0 T dc_dsc_stream_bandwidth_in_kbps +ffffffff821d1410 T dc_dsc_stream_bandwidth_overhead_in_kbps +ffffffff821d1560 T dc_dsc_get_policy_for_timing +ffffffff821d1600 T dc_dsc_policy_set_max_target_bpp_limit +ffffffff821d1630 T dc_dsc_policy_set_enable_dsc_when_not_needed +ffffffff821d1660 T dc_dsc_policy_set_disable_dsc_stream_overhead +ffffffff821d2000 T calc_rc_params +ffffffff821d3000 T dscc_compute_dsc_parameters +ffffffff821d4000 T dal_hw_factory_dce110_init +ffffffff821d4060 t define_hpd_registers +ffffffff821d40b0 t define_ddc_registers +ffffffff821d5000 T dal_hw_translate_dce110_init +ffffffff821d5030 t offset_to_id +ffffffff821d5390 t id_to_offset +ffffffff821d6000 T dal_hw_factory_dce120_init +ffffffff821d6060 t define_hpd_registers +ffffffff821d60b0 t define_ddc_registers +ffffffff821d7000 T dal_hw_translate_dce120_init +ffffffff821d7030 t offset_to_id +ffffffff821d73a0 t id_to_offset +ffffffff821d8000 T dal_hw_factory_dce80_init +ffffffff821d8060 t define_hpd_registers +ffffffff821d80b0 t define_ddc_registers +ffffffff821d9000 T dal_hw_translate_dce80_init +ffffffff821d9030 t offset_to_id +ffffffff821d97b0 t id_to_offset +ffffffff821da000 T dal_hw_factory_dcn10_init +ffffffff821da060 t define_hpd_registers +ffffffff821da0b0 t define_ddc_registers +ffffffff821da140 t define_generic_registers +ffffffff821db000 T dal_hw_translate_dcn10_init +ffffffff821db030 t offset_to_id +ffffffff821db390 t id_to_offset +ffffffff821dc000 T dal_hw_factory_dcn20_init +ffffffff821dc060 t define_hpd_registers +ffffffff821dc0b0 t define_ddc_registers +ffffffff821dc160 t define_generic_registers +ffffffff821dd000 T dal_hw_translate_dcn20_init +ffffffff821dd030 t offset_to_id +ffffffff821dd2b0 t id_to_offset +ffffffff821de000 T dal_hw_factory_dcn21_init +ffffffff821de060 t define_hpd_registers +ffffffff821de0b0 t define_ddc_registers +ffffffff821de160 t define_generic_registers +ffffffff821df000 T dal_hw_translate_dcn21_init +ffffffff821df030 t offset_to_id +ffffffff821df2a0 t id_to_offset +ffffffff821e0000 T dal_hw_factory_dcn30_init +ffffffff821e0060 t define_hpd_registers +ffffffff821e00b0 t define_ddc_registers +ffffffff821e0160 t define_generic_registers +ffffffff821e1000 T dal_hw_translate_dcn30_init +ffffffff821e1030 t offset_to_id +ffffffff821e12b0 t id_to_offset +ffffffff821e2000 T dal_hw_factory_dcn315_init +ffffffff821e2060 t define_hpd_registers +ffffffff821e20b0 t define_ddc_registers +ffffffff821e2160 t define_generic_registers +ffffffff821e3000 T dal_hw_translate_dcn315_init +ffffffff821e3030 t offset_to_id +ffffffff821e32a0 t id_to_offset +ffffffff821e4000 T dal_hw_factory_dcn32_init +ffffffff821e4060 t define_hpd_registers +ffffffff821e40b0 t define_ddc_registers +ffffffff821e4160 t define_generic_registers +ffffffff821e5000 T dal_hw_translate_dcn32_init +ffffffff821e5030 t offset_to_id +ffffffff821e5280 t id_to_offset +ffffffff821e6000 T dal_gpio_open +ffffffff821e60b0 T dal_gpio_open_ex +ffffffff821e6160 T dal_gpio_get_value +ffffffff821e61e0 T dal_gpio_set_value +ffffffff821e6260 T dal_gpio_get_mode +ffffffff821e6290 T dal_gpio_lock_pin +ffffffff821e62b0 T dal_gpio_unlock_pin +ffffffff821e62d0 T dal_gpio_change_mode +ffffffff821e6350 T dal_gpio_get_id +ffffffff821e6380 T dal_gpio_get_enum +ffffffff821e63b0 T dal_gpio_set_config +ffffffff821e6430 T dal_gpio_get_pin_info +ffffffff821e6480 T dal_gpio_get_sync_source +ffffffff821e6500 T dal_gpio_get_output_state +ffffffff821e6530 T dal_gpio_get_ddc +ffffffff821e6560 T dal_gpio_get_hpd +ffffffff821e6590 T dal_gpio_get_generic +ffffffff821e65c0 T dal_gpio_close +ffffffff821e6610 T dal_gpio_create +ffffffff821e67a0 T dal_gpio_destroy +ffffffff821e7000 T dal_gpio_service_create +ffffffff821e7250 T dal_gpio_service_create_irq +ffffffff821e7300 T dal_gpio_create_irq +ffffffff821e7380 T dal_gpio_service_create_generic_mux +ffffffff821e7420 T dal_gpio_destroy_generic_mux +ffffffff821e74b0 T dal_gpio_get_generic_pin_info +ffffffff821e7510 T dal_gpio_service_destroy +ffffffff821e7630 T dal_mux_setup_config +ffffffff821e7690 T dal_gpio_service_lock +ffffffff821e7700 T dal_gpio_service_unlock +ffffffff821e7770 T dal_gpio_service_open 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dal_hw_gpio_change_mode +ffffffff821ec270 T dal_hw_gpio_close +ffffffff821ec320 T dal_hw_gpio_construct +ffffffff821ec370 T dal_hw_gpio_destruct +ffffffff821ed000 T dal_hw_hpd_init +ffffffff821ed100 T dal_hw_hpd_get_pin +ffffffff821ed110 t dal_hw_hpd_destroy +ffffffff821ed170 t get_value +ffffffff821ed200 t set_config +ffffffff821ee000 T dal_hw_translate_init +ffffffff821ef000 T dc_process_hdcp_msg +ffffffff821ef180 t hdmi_14_process_transaction +ffffffff821ef2d0 t dp_11_process_transaction +ffffffff821f0000 T dal_irq_service_dummy_set +ffffffff821f0050 T dal_irq_service_dummy_ack +ffffffff821f00a0 T dce110_vblank_set +ffffffff821f0170 T to_dal_irq_source_dce110 +ffffffff821f02f0 T dal_irq_service_dce110_create +ffffffff821f0370 t hpd_ack +ffffffff821f1000 T dal_irq_service_dce120_create ffffffff821f1080 t hpd_ack -ffffffff821f2000 T dal_irq_service_dcn10_create +ffffffff821f2000 T dal_irq_service_dce80_create ffffffff821f2080 t hpd_ack -ffffffff821f2130 t to_dal_irq_source_dcn10 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-ffffffff825016e0 T sdmmc_io_write_4 -ffffffff82501840 T sdmmc_io_read_multi_1 -ffffffff82501930 T sdmmc_io_write_multi_1 -ffffffff82501a20 T sdmmc_io_read_region_1 -ffffffff82501b10 T sdmmc_io_write_region_1 -ffffffff82501c00 T sdmmc_io_xchg -ffffffff82501d90 T sdmmc_intr_enable -ffffffff82502000 T sdmmc_intr_disable -ffffffff82502270 T sdmmc_intr_establish -ffffffff82502370 T sdmmc_intr_disestablish -ffffffff82502450 T sdmmc_card_intr -ffffffff825024a0 T sdmmc_intr_task -ffffffff82502530 T sdmmc_io_set_blocklen -ffffffff82503000 T sdmmc_mem_enable -ffffffff825034e0 T sdmmc_mem_send_op_cond -ffffffff82503690 T sdmmc_mem_signal_voltage -ffffffff82503750 T sdmmc_mem_scan -ffffffff82503a50 T sdmmc_decode_csd -ffffffff82503e50 T sdmmc_decode_cid -ffffffff82504290 T sdmmc_mem_send_scr -ffffffff825043d0 T sdmmc_mem_decode_scr -ffffffff82504440 T sdmmc_mem_send_cxd_data -ffffffff825045b0 T sdmmc_mem_set_bus_width -ffffffff825046c0 T sdmmc_mem_sd_switch -ffffffff82504970 T sdmmc_be512_to_bitfield512 -ffffffff82504a20 T sdmmc_mem_mmc_switch -ffffffff82504b10 T sdmmc_mem_init -ffffffff82504c60 T sdmmc_mem_set_blocklen -ffffffff82504d60 T sdmmc_mem_sd_init -ffffffff82505310 T sdmmc_mem_mmc_init -ffffffff82505c30 T sdmmc_mem_select_transfer_mode -ffffffff82505cb0 T sdmmc_mem_execute_tuning -ffffffff82505d40 T sdmmc_mem_read_block_subr -ffffffff825060a0 T sdmmc_mem_single_read_block -ffffffff82506160 T sdmmc_mem_read_block -ffffffff82506320 T sdmmc_mem_write_block_subr -ffffffff82506670 T sdmmc_mem_single_write_block -ffffffff82506730 T sdmmc_mem_write_block -ffffffff825068f0 T sdmmc_mem_hibernate_write -ffffffff82507000 T sdmmc_scsi_cmd -ffffffff825071f0 T sdmmc_minphys -ffffffff82507260 T sdmmc_scsi_attach -ffffffff82507450 T sdmmc_alloc_ccbs -ffffffff82507590 T sdmmc_free_ccbs -ffffffff825075f0 T sdmmc_scsi_detach -ffffffff82507740 T sdmmc_stimeout -ffffffff825077c0 T sdmmc_ccb_alloc -ffffffff82507870 T sdmmc_ccb_free -ffffffff82507950 T sdmmc_inquiry -ffffffff82507b70 T sdmmc_start_xs -ffffffff82507c60 T sdmmc_complete_xs -ffffffff82507d20 T sdmmc_done_xs -ffffffff82507d60 T sdmmc_scsi_hibernate_io -ffffffff82508000 T bwfm_sdio_preinit -ffffffff825084f0 T bwfm_sdio_txcheck -ffffffff82508530 T bwfm_sdio_txdata -ffffffff825085a0 T bwfm_sdio_txctl -ffffffff825086f0 T bwfm_sdio_buscore_read -ffffffff82508700 T bwfm_sdio_buscore_write -ffffffff82508710 T bwfm_sdio_buscore_prepare -ffffffff82508840 T bwfm_sdio_buscore_activate -ffffffff825088c0 T bwfm_sdio_match -ffffffff82508980 T bwfm_sdio_attach -ffffffff82508c40 T bwfm_sdio_detach -ffffffff82508ca0 T bwfm_sdio_task -ffffffff82508df0 T bwfm_sdio_write_1 -ffffffff82508e20 T bwfm_sdio_read_1 -ffffffff82508e50 T bwfm_sdio_write_4 -ffffffff82508f00 T bwfm_sdio_read_4 -ffffffff82508fa0 T bwfm_sdio_load_microcode -ffffffff82509200 T bwfm_sdio_clkctl -ffffffff82509330 T bwfm_sdio_dev_write -ffffffff82509370 T bwfm_sdio_intr -ffffffff825093b0 T bwfm_sdio_ram_read_write -ffffffff825095e0 T bwfm_sdio_htclk -ffffffff82509840 T bwfm_sdio_readshared -ffffffff82509900 T bwfm_sdio_dev_read -ffffffff82509930 T bwfm_sdio_rx_frames -ffffffff82509cc0 T bwfm_sdio_tx_frames -ffffffff82509da0 T bwfm_sdio_backplane -ffffffff82509e50 T bwfm_sdio_buf_read -ffffffff82509f20 T bwfm_sdio_buf_write -ffffffff82509fd0 T bwfm_sdio_frame_read_write -ffffffff8250a150 T bwfm_sdio_newbuf -ffffffff8250a1d0 T bwfm_sdio_tx_ok -ffffffff8250a220 T bwfm_sdio_tx_ctrlframe -ffffffff8250a320 T bwfm_sdio_tx_dataframe -ffffffff8250a470 T bwfm_sdio_rx_glom -ffffffff8250b000 T onewire_match -ffffffff8250b050 T onewire_attach -ffffffff8250b0f0 T onewire_detach -ffffffff8250b160 T onewire_activate -ffffffff8250b180 T onewire_scan -ffffffff8250b390 T onewire_createthread -ffffffff8250b3f0 T onewire_print -ffffffff8250b4c0 T onewirebus_print -ffffffff8250b510 T onewire_lock -ffffffff8250b530 T onewire_unlock -ffffffff8250b540 T onewire_reset -ffffffff8250b560 T onewire_bit -ffffffff8250b580 T onewire_read_byte -ffffffff8250b6c0 T onewire_write_byte -ffffffff8250b790 T onewire_read_block -ffffffff8250b830 T onewire_write_block -ffffffff8250b8d0 T onewire_triplet -ffffffff8250b9b0 T onewire_matchrom -ffffffff8250bb00 T onewire_search -ffffffff8250be90 T onewire_thread -ffffffff8250c000 T onewire_crc -ffffffff8250c0e0 T onewire_crc16 -ffffffff8250c1c0 T onewire_famname -ffffffff8250c200 T onewire_matchbyfam -ffffffff8250d000 T owid_match -ffffffff8250d020 T owid_attach -ffffffff8250d0f0 T owid_detach -ffffffff8250d130 T owid_activate -ffffffff8250e000 T owsbm_match -ffffffff8250e020 T owsbm_attach -ffffffff8250e1c0 T owsbm_detach -ffffffff8250e230 T owsbm_activate -ffffffff8250e260 T owsbm_update -ffffffff8250f000 T owtemp_match -ffffffff8250f020 T owtemp_attach -ffffffff8250f110 T owtemp_detach -ffffffff8250f180 T owtemp_activate -ffffffff8250f1b0 T owtemp_update -ffffffff82510000 T owctr_match -ffffffff82510020 T owctr_attach -ffffffff82510160 T owctr_detach -ffffffff825101d0 T owctr_activate -ffffffff82510200 T owctr_update -ffffffff82510230 T owctr_update_counter -ffffffff82511000 A __text_page_start -ffffffff82511000 T Xsyscall_meltdown -ffffffff8251100c T Xsyscall -ffffffff8251125e t Xsyscall_trampback -ffffffff82511270 T intr_user_exit -ffffffff825112b2 t intr_user_exit_post_ast -ffffffff825113ce t Xiretq_trampback -ffffffff825113da T doreti_iret -ffffffff82512000 T alltraps -ffffffff82512138 T recall_trap -ffffffff82512150 T alltraps_kern -ffffffff82512153 T alltraps_kern_meltdown -ffffffff82513000 ? Xsyscall32 -ffffffff82513000 A __kutext_start -ffffffff82513000 A __text_page_end -ffffffff82514000 ? Xtrap00 -ffffffff82514010 ? Xtrap01 -ffffffff82514020 ? Xtrap02 -ffffffff82514024 c calltrap_specstk -ffffffff825140f0 ? calltrap_specstk_tramp -ffffffff82514110 ? Xtrap03 -ffffffff82514120 ? Xtrap04 -ffffffff82514130 ? Xtrap05 -ffffffff82514140 ? Xtrap06 -ffffffff82514150 ? Xtrap07 -ffffffff82514160 ? Xtrap08 -ffffffff82514170 ? Xtrap09 -ffffffff82514180 ? Xtrap0a -ffffffff82514190 ? Xtrap0b -ffffffff825141a0 ? Xtrap0c -ffffffff825141b0 ? Xtrap0d -ffffffff82514230 ? Xtrap0e -ffffffff82514240 ? Xintrspurious -ffffffff82514240 ? Xtrap0f -ffffffff82514250 ? Xtrap10 -ffffffff82514260 ? Xtrap11 -ffffffff82514270 ? Xtrap12 -ffffffff82514280 ? Xtrap13 -ffffffff82514290 ? Xtrap14 -ffffffff82514290 ? Xtrap15 -ffffffff82514290 ? Xtrap16 -ffffffff82514290 ? Xtrap17 -ffffffff82514290 ? Xtrap18 -ffffffff82514290 ? Xtrap19 -ffffffff82514290 ? Xtrap1a -ffffffff82514290 ? Xtrap1b -ffffffff82514290 ? Xtrap1c -ffffffff82514290 ? Xtrap1d -ffffffff82514290 ? Xtrap1e -ffffffff82514290 ? Xtrap1f -ffffffff825142a0 ? x2apic_eoi -ffffffff825142c0 ? Xintr_lapic_ipi -ffffffff825142f0 ? Xipi_invltlb -ffffffff82514310 ? Xipi_invlpg -ffffffff82514340 ? Xipi_invlrange -ffffffff82514380 ? Xipi_invltlb_pcid -ffffffff825143c0 ? Xipi_invlpg_pcid -ffffffff82514410 ? Xipi_invlrange_pcid -ffffffff82514480 ? Xintr_lapic_ltimer -ffffffff825144b0 ? Xintr_xen_upcall -ffffffff825144e0 ? Xintr_hyperv_upcall -ffffffff82514510 ? Xintr_legacy0 -ffffffff82514540 ? Xintr_legacy1 -ffffffff82514570 ? Xintr_legacy2 -ffffffff825145a0 ? Xintr_legacy3 -ffffffff825145d0 ? Xintr_legacy4 -ffffffff82514600 ? Xintr_legacy5 -ffffffff82514630 ? Xintr_legacy6 -ffffffff82514660 ? Xintr_legacy7 -ffffffff82514690 ? Xintr_legacy8 -ffffffff825146c0 ? Xintr_legacy9 -ffffffff825146f0 ? Xintr_legacy10 -ffffffff82514720 ? Xintr_legacy11 -ffffffff82514750 ? Xintr_legacy12 -ffffffff82514780 ? Xintr_legacy13 -ffffffff825147b0 ? Xintr_legacy14 -ffffffff825147e0 ? Xintr_legacy15 -ffffffff82514810 ? Xintr_ioapic_edge0 -ffffffff82514840 ? Xintr_ioapic_edge1 -ffffffff82514870 ? Xintr_ioapic_edge2 -ffffffff825148a0 ? Xintr_ioapic_edge3 -ffffffff825148d0 ? Xintr_ioapic_edge4 -ffffffff82514900 ? Xintr_ioapic_edge5 -ffffffff82514930 ? Xintr_ioapic_edge6 -ffffffff82514960 ? Xintr_ioapic_edge7 -ffffffff82514990 ? Xintr_ioapic_edge8 -ffffffff825149c0 ? Xintr_ioapic_edge9 -ffffffff825149f0 ? Xintr_ioapic_edge10 -ffffffff82514a20 ? Xintr_ioapic_edge11 -ffffffff82514a50 ? Xintr_ioapic_edge12 -ffffffff82514a80 ? Xintr_ioapic_edge13 -ffffffff82514ab0 ? Xintr_ioapic_edge14 -ffffffff82514ae0 ? Xintr_ioapic_edge15 -ffffffff82514b10 ? Xintr_ioapic_edge16 -ffffffff82514b40 ? Xintr_ioapic_edge17 -ffffffff82514b70 ? Xintr_ioapic_edge18 -ffffffff82514ba0 ? Xintr_ioapic_edge19 -ffffffff82514bd0 ? Xintr_ioapic_edge20 -ffffffff82514c00 ? Xintr_ioapic_edge21 -ffffffff82514c30 ? Xintr_ioapic_edge22 -ffffffff82514c60 ? Xintr_ioapic_edge23 -ffffffff82514c90 ? Xintr_ioapic_edge24 -ffffffff82514cc0 ? Xintr_ioapic_edge25 -ffffffff82514cf0 ? Xintr_ioapic_edge26 -ffffffff82514d20 ? Xintr_ioapic_edge27 -ffffffff82514d50 ? Xintr_ioapic_edge28 -ffffffff82514d80 ? Xintr_ioapic_edge29 -ffffffff82514db0 ? Xintr_ioapic_edge30 -ffffffff82514de0 ? Xintr_ioapic_edge31 -ffffffff82514e10 ? Xintr_ioapic_edge32 -ffffffff82514e40 ? Xintr_ioapic_edge33 -ffffffff82514e70 ? Xintr_ioapic_edge34 -ffffffff82514ea0 ? Xintr_ioapic_edge35 -ffffffff82514ed0 ? Xintr_ioapic_edge36 -ffffffff82514f00 ? Xintr_ioapic_edge37 -ffffffff82514f30 ? Xintr_ioapic_edge38 -ffffffff82514f60 ? Xintr_ioapic_edge39 -ffffffff82514f90 ? Xintr_ioapic_edge40 -ffffffff82514fc0 ? Xintr_ioapic_edge41 -ffffffff82514ff0 ? Xintr_ioapic_edge42 -ffffffff82515020 ? Xintr_ioapic_edge43 -ffffffff82515050 ? Xintr_ioapic_edge44 -ffffffff82515080 ? Xintr_ioapic_edge45 -ffffffff825150b0 ? Xintr_ioapic_edge46 -ffffffff825150e0 ? Xintr_ioapic_edge47 -ffffffff82515110 ? Xintr_ioapic_edge48 -ffffffff82515140 ? Xintr_ioapic_edge49 -ffffffff82515170 ? Xintr_ioapic_edge50 -ffffffff825151a0 ? Xintr_ioapic_edge51 -ffffffff825151d0 ? Xintr_ioapic_edge52 -ffffffff82515200 ? Xintr_ioapic_edge53 -ffffffff82515230 ? Xintr_ioapic_edge54 -ffffffff82515260 ? Xintr_ioapic_edge55 -ffffffff82515290 ? Xintr_ioapic_edge56 -ffffffff825152c0 ? Xintr_ioapic_edge57 -ffffffff825152f0 ? Xintr_ioapic_edge58 -ffffffff82515320 ? Xintr_ioapic_edge59 -ffffffff82515350 ? Xintr_ioapic_edge60 -ffffffff82515380 ? Xintr_ioapic_edge61 -ffffffff825153b0 ? Xintr_ioapic_edge62 -ffffffff825153e0 ? Xintr_ioapic_edge63 -ffffffff82515410 ? Xintr_ioapic_level0 -ffffffff82515440 ? Xintr_ioapic_level1 -ffffffff82515470 ? Xintr_ioapic_level2 -ffffffff825154a0 ? Xintr_ioapic_level3 -ffffffff825154d0 ? Xintr_ioapic_level4 -ffffffff82515500 ? Xintr_ioapic_level5 -ffffffff82515530 ? Xintr_ioapic_level6 -ffffffff82515560 ? Xintr_ioapic_level7 -ffffffff82515590 ? Xintr_ioapic_level8 -ffffffff825155c0 ? Xintr_ioapic_level9 -ffffffff825155f0 ? Xintr_ioapic_level10 -ffffffff82515620 ? Xintr_ioapic_level11 -ffffffff82515650 ? Xintr_ioapic_level12 -ffffffff82515680 ? Xintr_ioapic_level13 -ffffffff825156b0 ? Xintr_ioapic_level14 -ffffffff825156e0 ? Xintr_ioapic_level15 -ffffffff82515710 ? Xintr_ioapic_level16 -ffffffff82515740 ? Xintr_ioapic_level17 -ffffffff82515770 ? Xintr_ioapic_level18 -ffffffff825157a0 ? Xintr_ioapic_level19 -ffffffff825157d0 ? Xintr_ioapic_level20 -ffffffff82515800 ? Xintr_ioapic_level21 -ffffffff82515830 ? Xintr_ioapic_level22 -ffffffff82515860 ? Xintr_ioapic_level23 -ffffffff82515890 ? Xintr_ioapic_level24 -ffffffff825158c0 ? Xintr_ioapic_level25 -ffffffff825158f0 ? Xintr_ioapic_level26 -ffffffff82515920 ? Xintr_ioapic_level27 -ffffffff82515950 ? Xintr_ioapic_level28 -ffffffff82515980 ? Xintr_ioapic_level29 -ffffffff825159b0 ? Xintr_ioapic_level30 -ffffffff825159e0 ? Xintr_ioapic_level31 -ffffffff82515a10 ? Xintr_ioapic_level32 -ffffffff82515a40 ? Xintr_ioapic_level33 -ffffffff82515a70 ? Xintr_ioapic_level34 -ffffffff82515aa0 ? Xintr_ioapic_level35 -ffffffff82515ad0 ? Xintr_ioapic_level36 -ffffffff82515b00 ? Xintr_ioapic_level37 -ffffffff82515b30 ? Xintr_ioapic_level38 -ffffffff82515b60 ? Xintr_ioapic_level39 -ffffffff82515b90 ? Xintr_ioapic_level40 -ffffffff82515bc0 ? Xintr_ioapic_level41 -ffffffff82515bf0 ? Xintr_ioapic_level42 -ffffffff82515c20 ? Xintr_ioapic_level43 -ffffffff82515c50 ? Xintr_ioapic_level44 -ffffffff82515c80 ? Xintr_ioapic_level45 -ffffffff82515cb0 ? Xintr_ioapic_level46 -ffffffff82515ce0 ? Xintr_ioapic_level47 -ffffffff82515d10 ? Xintr_ioapic_level48 -ffffffff82515d40 ? Xintr_ioapic_level49 -ffffffff82515d70 ? Xintr_ioapic_level50 -ffffffff82515da0 ? Xintr_ioapic_level51 -ffffffff82515dd0 ? Xintr_ioapic_level52 -ffffffff82515e00 ? Xintr_ioapic_level53 -ffffffff82515e30 ? Xintr_ioapic_level54 -ffffffff82515e60 ? Xintr_ioapic_level55 -ffffffff82515e90 ? Xintr_ioapic_level56 -ffffffff82515ec0 ? Xintr_ioapic_level57 -ffffffff82515ef0 ? Xintr_ioapic_level58 -ffffffff82515f20 ? Xintr_ioapic_level59 -ffffffff82515f50 ? Xintr_ioapic_level60 -ffffffff82515f80 ? Xintr_ioapic_level61 -ffffffff82515fb0 ? Xintr_ioapic_level62 -ffffffff82515fe0 ? Xintr_ioapic_level63 -ffffffff82517000 ? codepatch_fill_nop -ffffffff82517000 A __cptext_start -ffffffff82517000 A __kutext_end -ffffffff825170b0 ? codepatch_maprw -ffffffff82517190 ? codepatch_unmaprw -ffffffff825171f0 ? codepatch_nop -ffffffff82517340 ? codepatch_replace -ffffffff825174e0 ? codepatch_call -ffffffff82517500 ? codepatch_jmp -ffffffff82518000 A __cptext_end -ffffffff82518000 A __rodata_start -ffffffff82518000 C _etext -ffffffff82518000 C etext -ffffffff82519000 r seeprom_read -ffffffff82519004 r icl_mg_pll_find_divisors.div1_vals -ffffffff82519028 r gen9bc_tgp_ddc_pin_map -ffffffff82519038 r athn_ac2qid -ffffffff82519038 r athn_ac2qid -ffffffff82519038 r athn_ac2qid -ffffffff82519044 r rtwn_get_rssi.cckoff -ffffffff8251906c r rsu_ac2qid -ffffffff8251907c r pckbc_portcmd -ffffffff82519080 r tht_fifo_write_pad.pad -ffffffff82519088 r rsu_get_rssi.cckoff -ffffffff8251909c r adlp_n_revids -ffffffff825190ec r apple_iso_trans -ffffffff825190f0 r dg2_g12_revid_step_tbl -ffffffff825190f8 r wihap_check_tx.txratetable -ffffffff825190fc r dmamode -ffffffff82519124 r gen9_edram_size_mb.sets -ffffffff8251a000 r isomappings -ffffffff8251a080 r unimappings -ffffffff8251a230 r replacements -ffffffff8251daf8 r cmd0646_9_tim_udma -ffffffff82570ed1 r pp_r600_decoded_lanes -ffffffff8258c083 r cmd680_setup_channel.udma_tbl -ffffffff82593c1e r apollo_udma33_tim -ffffffff82599cba r substchar -ffffffff8259bd4f r apollo_udma100_tim -ffffffff825c34dc r apollo_udma66_tim -ffffffff825ca8a8 r apollo_pio_rec -ffffffff825d9ae0 r cy_pio_rec -ffffffff82608c35 r apollo_udma133_tim -ffffffff826156a8 R drm_ca -ffffffff826156d0 R drm_filtops -ffffffff82615700 R drmread_filtops -ffffffff82616000 r vga_emulops -ffffffff82616048 R vga_stdscreen -ffffffff82616078 R vga_stdscreen_mono -ffffffff826160a8 R vga_stdscreen_bf -ffffffff826160d8 R vga_40lscreen -ffffffff82616108 R vga_40lscreen_mono -ffffffff82616138 R vga_40lscreen_bf -ffffffff82616168 R vga_50lscreen -ffffffff82616198 R vga_50lscreen_mono -ffffffff826161c8 R vga_50lscreen_bf -ffffffff826161f8 R vga_screenlist -ffffffff82616208 R vga_screenlist_mono -ffffffff82616218 R vga_accessops -ffffffff82616278 r i945_wm_info -ffffffff826162b0 r bgansitopc -ffffffff826162b8 r pctoansi -ffffffff826162f8 r sdma_offsets -ffffffff826162f8 r sdma_offsets -ffffffff82616328 r iha_rate_tbl -ffffffff82616360 r i830_a_wm_info -ffffffff82616398 r gen9_edram_size_mb.ways -ffffffff82616400 r aggr_periodic_times -ffffffff82616480 r jsl_ehl_revids -ffffffff826164f8 r michael_final.pad -ffffffff82616520 r rt_copysa.maskarray -ffffffff82616528 r i915_wm_info -ffffffff82616530 r amdgpu_ih_clientid_jpeg -ffffffff82616530 r amdgpu_ih_clientid_uvds -ffffffff82616530 r amdgpu_ih_clientid_vcns -ffffffff82616530 r amdgpu_ih_clientid_vcns -ffffffff82616530 r amdgpu_ih_clientid_vcns -ffffffff82616568 r vga_setfontset.cmaptabb -ffffffff82616580 r tgl_revids -ffffffff826165d8 r i830_bc_wm_info -ffffffff82616680 r __drm_universal_plane_init.default_modifiers -ffffffff82616690 r iwn_tid2fifo -ffffffff826166a8 r vga_setfontset.cmaptaba -ffffffff826166b0 r crtc_offsets -ffffffff826166b0 r crtc_offsets -ffffffff826166b0 r crtc_offsets -ffffffff826166d0 r link_speed -ffffffff826166d0 r link_speed -ffffffff826166d0 r link_speed -ffffffff82616748 r rtwn_r88e_get_rssi.cckoff -ffffffff82617000 R edid_vendors -ffffffff826172c0 R edid_nvendors -ffffffff826172d0 R edid_products -ffffffff82617330 R edid_nproducts -ffffffff82617340 r _edid_modes -ffffffff82618000 R videomode_list -ffffffff82619080 R videomode_count -ffffffff8261a000 r ahc_hard_errors -ffffffff8261a080 r critical_sections -ffffffff8261a0b0 r patches -ffffffff8261ad50 r seqprog -ffffffff8261c000 r ahc_switch -ffffffff8261d000 r termstat_strings -ffffffff8261d020 r critical_sections -ffffffff8261d060 r seqprog -ffffffff8261dd50 r patches -ffffffff8261f000 r ahd_switch -ffffffff82620000 R aic_switch -ffffffff82621000 R adw_switch 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amdgpu_dpm_set_gfx_power_up_by_imu +ffffffff8221f310 T amdgpu_dpm_baco_enter +ffffffff8221f3a0 T amdgpu_dpm_baco_exit +ffffffff8221f430 T amdgpu_dpm_set_mp1_state +ffffffff8221f4c0 T amdgpu_dpm_is_baco_supported +ffffffff8221f560 T amdgpu_dpm_mode2_reset +ffffffff8221f5f0 T amdgpu_dpm_baco_reset +ffffffff8221f6a0 T amdgpu_dpm_is_mode1_reset_supported +ffffffff8221f710 T amdgpu_dpm_mode1_reset +ffffffff8221f790 T amdgpu_dpm_switch_power_profile +ffffffff8221f830 T amdgpu_dpm_set_xgmi_pstate +ffffffff8221f8c0 T amdgpu_dpm_set_df_cstate +ffffffff8221f960 T amdgpu_dpm_allow_xgmi_power_down +ffffffff8221f9e0 T amdgpu_dpm_enable_mgpu_fan_boost +ffffffff8221fa70 T amdgpu_dpm_set_clockgating_by_smu +ffffffff8221fb10 T amdgpu_dpm_smu_i2c_bus_access +ffffffff8221fbb0 T amdgpu_pm_acpi_event_handler +ffffffff8221fc70 T amdgpu_dpm_read_sensor +ffffffff8221fd20 T amdgpu_dpm_compute_clocks +ffffffff8221fe00 T amdgpu_dpm_enable_uvd +ffffffff8221ffe0 T amdgpu_dpm_enable_vce +ffffffff822201c0 T amdgpu_dpm_enable_jpeg +ffffffff822202b0 T amdgpu_pm_load_smu_firmware +ffffffff82220360 T amdgpu_dpm_handle_passthrough_sbr +ffffffff822203e0 T amdgpu_dpm_send_hbm_bad_pages_num +ffffffff82220460 T amdgpu_dpm_send_hbm_bad_channel_flag +ffffffff822204e0 T amdgpu_dpm_get_dpm_freq_range +ffffffff82220580 T amdgpu_dpm_set_soft_freq_range +ffffffff82220620 T amdgpu_dpm_write_watermarks_table +ffffffff82220690 T amdgpu_dpm_wait_for_event +ffffffff82220720 T amdgpu_dpm_set_residency_gfxoff +ffffffff822207a0 T amdgpu_dpm_get_residency_gfxoff +ffffffff82220820 T amdgpu_dpm_get_entrycount_gfxoff +ffffffff822208a0 T amdgpu_dpm_get_status_gfxoff +ffffffff82220920 T amdgpu_dpm_get_thermal_throttling_counter +ffffffff82220970 T amdgpu_dpm_gfx_state_change +ffffffff822209d0 T amdgpu_dpm_get_ecc_info +ffffffff82220a50 T amdgpu_dpm_get_vce_clock_state +ffffffff82220ae0 T amdgpu_dpm_get_current_power_state +ffffffff82220b50 T amdgpu_dpm_set_power_state +ffffffff82220ca0 T amdgpu_dpm_dispatch_task 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amdgpu_dpm_set_watermarks_for_clocks_ranges +ffffffff82222600 T amdgpu_dpm_display_clock_voltage_request +ffffffff82222690 T amdgpu_dpm_get_current_clocks +ffffffff82222720 T amdgpu_dpm_notify_smu_enable_pwe +ffffffff822227a0 T amdgpu_dpm_set_active_display_count +ffffffff82222830 T amdgpu_dpm_set_min_deep_sleep_dcefclk +ffffffff822228c0 T amdgpu_dpm_set_hard_min_dcefclk_by_freq +ffffffff82222950 T amdgpu_dpm_set_hard_min_fclk_by_freq +ffffffff822229e0 T amdgpu_dpm_display_disable_memory_clock_switch +ffffffff82222a70 T amdgpu_dpm_get_max_sustainable_clocks_by_dc +ffffffff82222b00 T amdgpu_dpm_get_uclk_dpm_states +ffffffff82222ba0 T amdgpu_dpm_get_dpm_clock_table +ffffffff82223000 T amdgpu_dpm_get_active_displays +ffffffff822230a0 T amdgpu_dpm_get_vblank_time +ffffffff82223150 T amdgpu_dpm_get_vrefresh +ffffffff82224000 T amdgpu_pm_sysfs_init +ffffffff82224030 T amdgpu_pm_sysfs_fini +ffffffff82224060 T amdgpu_debugfs_pm_init +ffffffff82225000 T amdgpu_dpm_print_class_info +ffffffff822252b0 T amdgpu_dpm_print_cap_info +ffffffff82225330 T amdgpu_dpm_print_ps_status +ffffffff822253c0 T amdgpu_pm_print_power_states +ffffffff82225470 T amdgpu_get_platform_caps +ffffffff82225510 T amdgpu_parse_extended_power_table +ffffffff82226520 T amdgpu_free_extended_power_table +ffffffff82226630 T amdgpu_add_thermal_controller +ffffffff82226a60 T amdgpu_get_vce_clock_state +ffffffff82226aa0 T amdgpu_legacy_dpm_compute_clocks +ffffffff82226f10 T amdgpu_dpm_thermal_work_handler +ffffffff82227000 t pp_early_init +ffffffff82227100 t pp_late_init +ffffffff82227210 t pp_sw_init +ffffffff82227230 t pp_sw_fini +ffffffff822272b0 t pp_hw_init +ffffffff82227300 t pp_hw_fini +ffffffff82227340 t pp_late_fini +ffffffff822273a0 t pp_suspend +ffffffff822273c0 t pp_resume +ffffffff822273e0 t pp_is_idle +ffffffff82227410 t pp_wait_for_idle +ffffffff82227440 t pp_sw_reset +ffffffff82227470 t pp_set_clockgating_state +ffffffff822274a0 t pp_set_powergating_state +ffffffff822274d0 t pp_dpm_set_fan_control_mode +ffffffff82227540 t pp_dpm_get_fan_control_mode +ffffffff822275b0 t pp_dpm_set_fan_speed_pwm +ffffffff82227610 t pp_dpm_get_fan_speed_pwm +ffffffff82227670 t pp_dpm_force_clock_level +ffffffff822276d0 t pp_dpm_print_clock_levels +ffffffff82227720 t pp_dpm_emit_clock_levels +ffffffff82227780 t pp_dpm_force_performance_level +ffffffff82227810 t pp_dpm_get_sclk_od +ffffffff82227860 t pp_dpm_set_sclk_od +ffffffff822278b0 t pp_dpm_get_mclk_od +ffffffff82227900 t pp_dpm_set_mclk_od +ffffffff82227950 t pp_dpm_read_sensor +ffffffff822279f0 t pp_dpm_get_performance_level +ffffffff82227a30 t pp_dpm_get_current_power_state +ffffffff82227aa0 t pp_dpm_get_fan_speed_rpm +ffffffff82227b00 t pp_dpm_set_fan_speed_rpm +ffffffff82227b60 t pp_dpm_get_pp_num_states +ffffffff82227ca0 t pp_dpm_get_pp_table +ffffffff82227cf0 t pp_dpm_set_pp_table +ffffffff82227e20 t pp_dpm_switch_power_profile +ffffffff82227f60 t pp_dpm_get_vce_clock_state +ffffffff82227fb0 t pp_dpm_dispatch_tasks +ffffffff82227ff0 t pp_dpm_load_fw +ffffffff82228060 t pp_dpm_fw_loading_complete +ffffffff82228090 t pp_set_powergating_by_smu +ffffffff82228200 t pp_set_clockgating_by_smu +ffffffff82228260 t pp_set_power_limit +ffffffff82228320 t pp_get_power_limit +ffffffff822283b0 t pp_get_power_profile_mode +ffffffff82228410 t pp_set_power_profile_mode +ffffffff82228470 t pp_set_fine_grain_clk_vol +ffffffff822284c0 t pp_odn_edit_dpm_table +ffffffff82228510 t pp_dpm_set_mp1_state +ffffffff82228560 t pp_smu_i2c_bus_access +ffffffff822285b0 t pp_gfx_state_change_set +ffffffff82228610 t pp_dpm_get_sclk +ffffffff82228660 t pp_dpm_get_mclk +ffffffff822286b0 t pp_display_configuration_change +ffffffff82228700 t pp_get_display_power_level +ffffffff82228740 t pp_get_current_clocks +ffffffff82228860 t pp_get_clock_by_type +ffffffff822288a0 t pp_get_clock_by_type_with_latency +ffffffff822288e0 t pp_get_clock_by_type_with_voltage +ffffffff82228920 t pp_set_watermarks_for_clocks_ranges +ffffffff82228960 t pp_display_clock_voltage_request +ffffffff822289a0 t pp_get_display_mode_validation_clocks +ffffffff82228a00 t pp_notify_smu_enable_pwe +ffffffff82228a60 t pp_enable_mgpu_fan_boost +ffffffff82228ac0 t pp_set_active_display_count +ffffffff82228b00 t pp_set_hard_min_dcefclk_by_freq +ffffffff82228b60 t pp_set_hard_min_fclk_by_freq +ffffffff82228bc0 t pp_set_min_deep_sleep_dcefclk +ffffffff82228c20 t pp_get_asic_baco_capability +ffffffff82228c90 t pp_get_asic_baco_state +ffffffff82228cf0 t pp_set_asic_baco_state +ffffffff82228d60 t pp_get_ppfeature_status +ffffffff82228db0 t pp_set_ppfeature_status +ffffffff82228e00 t pp_asic_reset_mode_2 +ffffffff82228e50 t pp_set_df_cstate +ffffffff82228eb0 t pp_set_xgmi_pstate +ffffffff82228f10 t pp_get_gpu_metrics +ffffffff82228f70 t pp_get_prv_buffer_details +ffffffff82228ff0 t pp_pm_compute_clocks +ffffffff8222a000 T ci_baco_set_state +ffffffff8222b000 T baco_program_registers +ffffffff8222b0d0 t baco_cmd_handler +ffffffff8222b250 T soc15_baco_program_registers +ffffffff8222c000 T fiji_baco_set_state +ffffffff8222d000 T phm_setup_asic +ffffffff8222d050 T phm_power_down_asic +ffffffff8222d0a0 T phm_set_power_state +ffffffff8222d110 T phm_enable_dynamic_state_management +ffffffff8222d1c0 T phm_disable_dynamic_state_management +ffffffff8222d250 T phm_force_dpm_levels +ffffffff8222d2a0 T phm_apply_state_adjust_rules +ffffffff8222d2f0 T phm_apply_clock_adjust_rules +ffffffff8222d340 T phm_powerdown_uvd +ffffffff8222d390 T phm_disable_clock_power_gatings +ffffffff8222d3e0 T phm_pre_display_configuration_changed +ffffffff8222d440 T phm_display_configuration_changed +ffffffff8222d4a0 T phm_notify_smc_display_config_after_ps_adjustment +ffffffff8222d500 T phm_stop_thermal_controller +ffffffff8222d560 T phm_register_irq_handlers +ffffffff8222d5b0 T phm_start_thermal_controller +ffffffff8222d6e0 T phm_check_smc_update_required_for_display_configuration +ffffffff8222d740 T phm_check_states_equal +ffffffff8222d790 T phm_store_dal_configuration_data +ffffffff8222d8e0 T phm_get_dal_power_level +ffffffff8222d930 T phm_set_cpu_power_state +ffffffff8222d980 T phm_get_performance_level +ffffffff8222d9d0 T phm_get_clock_info +ffffffff8222db50 T phm_get_current_shallow_sleep_clocks +ffffffff8222dba0 T phm_get_clock_by_type +ffffffff8222dbf0 T phm_get_clock_by_type_with_latency +ffffffff8222dc40 T phm_get_clock_by_type_with_voltage +ffffffff8222dc90 T phm_set_watermarks_for_clocks_ranges +ffffffff8222dce0 T phm_display_clock_voltage_request +ffffffff8222dd30 T phm_get_max_high_clocks +ffffffff8222dd80 T phm_disable_smc_firmware_ctf +ffffffff8222dde0 T phm_set_active_display_count +ffffffff8222e000 T hwmgr_early_init +ffffffff8222e470 T hwmgr_sw_init +ffffffff8222e4e0 T hwmgr_sw_fini +ffffffff8222e530 T hwmgr_hw_init +ffffffff8222e6f0 T hwmgr_hw_fini +ffffffff8222e7a0 T hwmgr_suspend +ffffffff8222e820 T hwmgr_resume +ffffffff8222e8c0 T hwmgr_handle_task +ffffffff8222f000 T polaris_baco_set_state +ffffffff82230000 T pp_override_get_default_fuse_value +ffffffff82231000 T psm_init_power_state_table +ffffffff822312a0 T psm_fini_power_state_table +ffffffff82231360 T psm_set_boot_states +ffffffff82231420 T psm_set_performance_states +ffffffff822314e0 T psm_set_user_performance_state +ffffffff82231570 T psm_adjust_power_state_dynamic +ffffffff82232000 T atomctrl_initialize_mc_reg_table +ffffffff82232200 T atomctrl_initialize_mc_reg_table_v2_2 +ffffffff82232400 T atomctrl_set_engine_dram_timings_rv770 +ffffffff82232460 T atomctrl_get_memory_pll_dividers_si +ffffffff82232540 T atomctrl_get_memory_pll_dividers_vi +ffffffff822325b0 T atomctrl_get_memory_pll_dividers_ai +ffffffff82232660 T atomctrl_get_engine_pll_dividers_kong +ffffffff822326e0 T atomctrl_get_engine_pll_dividers_vi +ffffffff822327a0 T atomctrl_get_engine_pll_dividers_ai +ffffffff82232880 T atomctrl_get_dfs_pll_dividers_vi +ffffffff82232940 T atomctrl_get_reference_clock +ffffffff822329a0 T atomctrl_is_voltage_controlled_by_gpio_v3 +ffffffff82232a50 T atomctrl_get_voltage_table_v3 +ffffffff82232bb0 T atomctrl_get_pp_assign_pin +ffffffff82232ca0 T atomctrl_calculate_voltage_evv_on_sclk +ffffffff82233020 T atomctrl_get_voltage_evv_on_sclk +ffffffff822330a0 T atomctrl_get_voltage_evv +ffffffff82233150 T atomctrl_get_mpll_reference_clock +ffffffff822331c0 T atomctrl_is_asic_internal_ss_supported +ffffffff82233210 T atomctrl_get_memory_clock_spread_spectrum +ffffffff82233310 T atomctrl_get_engine_clock_spread_spectrum +ffffffff82233410 T atomctrl_read_efuse +ffffffff822334c0 T atomctrl_set_ac_timing_ai +ffffffff82233520 T atomctrl_get_voltage_evv_on_sclk_ai +ffffffff82233590 T atomctrl_get_smc_sclk_range_table +ffffffff82233650 T atomctrl_get_vddc_shared_railinfo +ffffffff822336c0 T atomctrl_get_avfs_information +ffffffff82233840 T atomctrl_get_svi2_info +ffffffff82233920 T atomctrl_get_leakage_id_from_efuse +ffffffff82233980 T atomctrl_get_leakage_vddc_base_on_leakage +ffffffff82233b10 T atomctrl_get_voltage_range +ffffffff82233bd0 T atomctrl_get_edc_hilo_leakage_offset_table +ffffffff82233c50 T atomctrl_get_edc_leakage_table +ffffffff82234000 T pp_atomfwctrl_is_voltage_controlled_by_gpio_v4 +ffffffff822340d0 T pp_atomfwctrl_get_voltage_table_v4 +ffffffff82234280 T pp_atomfwctrl_get_pp_assign_pin +ffffffff82234360 T pp_atomfwctrl_enter_self_refresh +ffffffff82234390 T pp_atomfwctrl_get_gpu_pll_dividers_vega10 +ffffffff82234430 T pp_atomfwctrl_get_avfs_information +ffffffff82234760 T pp_atomfwctrl_get_gpio_information +ffffffff82234800 T pp_atomfwctrl_get_clk_information_by_clkid +ffffffff82234880 T pp_atomfwctrl_get_vbios_bootup_values +ffffffff82234c00 T pp_atomfwctrl_get_smc_dpm_information +ffffffff82235000 T encode_pcie_lane_width +ffffffff82235030 T decode_pcie_lane_width +ffffffff82236000 t pp_tables_v1_0_initialize +ffffffff82237420 t pp_tables_v1_0_uninitialize +ffffffff822375c0 T get_number_of_powerplay_table_entries_v1_0 +ffffffff82237670 T get_powerplay_table_entry_v1_0 +ffffffff82238000 T pp_tables_get_response_times +ffffffff822380d0 T pp_tables_get_num_of_entries +ffffffff82238190 T pp_tables_get_entry +ffffffff822384f0 t init_non_clock_fields +ffffffff82238670 t pp_tables_initialize +ffffffff82239ad0 t pp_tables_uninitialize +ffffffff82239cd0 t get_number_of_vce_state_table_entries +ffffffff82239dd0 t get_vce_state_table_entry +ffffffff8223a000 T smu10_init_function_pointers +ffffffff8223a040 t smu10_hwmgr_backend_init +ffffffff8223a710 t smu10_hwmgr_backend_fini +ffffffff8223a840 t smu10_setup_asic_task +ffffffff8223a8b0 t smu10_get_power_state_size +ffffffff8223a8e0 t smu10_apply_state_adjust_rules +ffffffff8223a910 t smu10_dpm_force_dpm_level +ffffffff8223ae90 t smu10_enable_dpm_tasks +ffffffff8223af10 t smu10_disable_dpm_tasks +ffffffff8223af40 t smu10_dpm_patch_boot_state +ffffffff8223af70 t smu10_dpm_get_pp_table_entry +ffffffff8223afd0 t smu10_dpm_get_num_of_pp_table_entries +ffffffff8223b020 t smu10_powergate_vcn +ffffffff8223b0c0 t smu10_dpm_get_mclk +ffffffff8223b110 t smu10_dpm_get_sclk +ffffffff8223b160 t smu10_set_power_state_tasks +ffffffff8223b1d0 t smu10_set_cpu_power_state +ffffffff8223b200 t smu10_store_cc6_data +ffffffff8223b270 t smu10_get_dal_power_level +ffffffff8223b2a0 t smu10_get_performance_level +ffffffff8223b330 t smu10_get_current_shallow_sleep_clocks +ffffffff8223b390 t smu10_get_clock_by_type_with_latency +ffffffff8223b4e0 t smu10_get_clock_by_type_with_voltage +ffffffff8223b5e0 t smu10_set_watermarks_for_clocks_ranges +ffffffff8223b6b0 t smu10_display_clock_voltage_request +ffffffff8223b750 t smu10_get_max_high_clocks +ffffffff8223b780 t smu10_power_off_asic +ffffffff8223b7d0 t smu10_force_clock_level +ffffffff8223b990 t smu10_print_clock_levels +ffffffff8223bd30 t smu10_gfx_off_control +ffffffff8223be40 t smu10_read_sensor +ffffffff8223bfb0 t smu10_set_active_display_count +ffffffff8223c000 t smu10_set_min_deep_sleep_dcefclk +ffffffff8223c060 t smu10_get_power_profile_mode +ffffffff8223c0a0 t smu10_set_power_profile_mode +ffffffff8223c1f0 t smu10_set_fine_grain_clk_vol +ffffffff8223c3f0 t smu10_powergate_mmhub +ffffffff8223c410 t smu10_smus_notify_pwe +ffffffff8223c430 t smu10_powergate_sdma +ffffffff8223c450 t smu10_set_hard_min_dcefclk_by_freq +ffffffff8223c4b0 t smu10_set_hard_min_fclk_by_freq +ffffffff8223c510 t smu10_set_hard_min_gfxclk_by_freq +ffffffff8223c570 t smu10_set_soft_max_gfxclk_by_freq +ffffffff8223c5d0 t smu10_asic_reset +ffffffff8223c5f0 t smu10_gfx_state_change +ffffffff8223c630 t smu10_dpm_get_pp_table_entry_callback +ffffffff8223d000 T smu7_baco_get_capability +ffffffff8223d060 T smu7_baco_get_state +ffffffff8223d0b0 T smu7_baco_set_state +ffffffff8223e000 T smu7_powerdown_uvd +ffffffff8223e050 T smu7_disable_clock_power_gating +ffffffff8223e0d0 T smu7_powergate_uvd +ffffffff8223e1c0 T smu7_powergate_vce +ffffffff8223e2b0 T smu7_update_clock_gatings +ffffffff8223e660 T smu7_powergate_gfx +ffffffff8223f000 T smu7_get_sleep_divider_id_from_clock +ffffffff8223f0a0 T smu7_init_function_pointers +ffffffff8223f100 t smu7_hwmgr_backend_init +ffffffff82240f40 t smu7_hwmgr_backend_fini +ffffffff82240fb0 t smu7_setup_asic_task +ffffffff82241310 t smu7_get_power_state_size +ffffffff82241340 t smu7_apply_state_adjust_rules +ffffffff822417b0 t smu7_force_dpm_level +ffffffff82241be0 t smu7_enable_dpm_tasks +ffffffff82244340 t smu7_disable_dpm_tasks +ffffffff82244a80 t smu7_dpm_patch_boot_state +ffffffff82244bc0 t smu7_get_pp_table_entry +ffffffff82244fb0 t smu7_get_number_of_powerplay_table_entries +ffffffff82245020 t smu7_dpm_get_mclk +ffffffff822450c0 t smu7_dpm_get_sclk +ffffffff82245160 t smu7_set_power_state_tasks +ffffffff82245ee0 t smu7_notify_smc_display_config_after_ps_adjustment +ffffffff82245f10 t smu7_display_configuration_changed_task +ffffffff822460c0 t smu7_set_max_fan_rpm_output +ffffffff822460f0 t smu7_set_max_fan_pwm_output +ffffffff82246110 t smu7_set_fan_control_mode +ffffffff822461a0 t smu7_get_fan_control_mode +ffffffff822461e0 t smu7_register_irq_handlers +ffffffff82246280 t smu7_check_smc_update_required_for_display_configuration +ffffffff82246330 t smu7_check_states_equal +ffffffff822464d0 t smu7_get_performance_level +ffffffff82246560 t smu7_get_clock_by_type +ffffffff82246720 t smu7_get_clock_by_type_with_latency +ffffffff822468c0 t smu7_set_watermarks_for_clocks_ranges +ffffffff82246b00 t smu7_get_max_high_clocks +ffffffff82246b80 t smu7_power_off_asic +ffffffff82246bd0 t smu7_force_clock_level +ffffffff82246ce0 t smu7_print_clock_levels +ffffffff822472c0 t smu7_get_sclk_od +ffffffff82247320 t smu7_set_sclk_od +ffffffff822473e0 t smu7_get_mclk_od +ffffffff82247440 t smu7_set_mclk_od +ffffffff82247500 t smu7_read_sensor +ffffffff822477d0 t smu7_avfs_control +ffffffff822478a0 t smu7_notify_cac_buffer_info +ffffffff82247a40 t smu7_get_thermal_temperature_range +ffffffff82247ad0 t smu7_get_power_profile_mode +ffffffff82247b10 t smu7_set_power_profile_mode +ffffffff82247d70 t smu7_odn_edit_dpm_table +ffffffff82247f20 t phm_add_voltage +ffffffff82248030 t smu7_get_profiling_clk +ffffffff822481f0 t smu7_check_dpm_table_updated +ffffffff82248340 t smu7_odn_initial_default_setting +ffffffff82248470 t smu7_set_dpm_event_sources +ffffffff82248590 t smu7_get_pp_table_entry_callback_func_v0 +ffffffff82248a90 t smu7_get_pp_table_entry_callback_func_v1 +ffffffff8224a000 T smu7_enable_didt_config +ffffffff8224a3c0 t smu7_program_pt_config_registers +ffffffff8224a5b0 t smu7_enable_didt +ffffffff8224a7a0 T smu7_disable_didt_config +ffffffff8224a860 T smu7_enable_smc_cac +ffffffff8224a8f0 T smu7_disable_smc_cac +ffffffff8224a980 T smu7_set_power_limit +ffffffff8224a9e0 T smu7_enable_power_containment +ffffffff8224ab60 T smu7_disable_power_containment +ffffffff8224ac80 T smu7_power_control_set_level +ffffffff8224b000 T smu7_fan_ctrl_get_fan_speed_info +ffffffff8224b080 T smu7_fan_ctrl_get_fan_speed_pwm +ffffffff8224b140 T smu7_fan_ctrl_get_fan_speed_rpm +ffffffff8224b1f0 T smu7_fan_ctrl_set_static_mode +ffffffff8224b320 T smu7_fan_ctrl_set_default_mode +ffffffff8224b400 T smu7_fan_ctrl_start_smc_fan_control +ffffffff8224b520 T smu7_fan_ctrl_stop_smc_fan_control +ffffffff8224b540 T smu7_fan_ctrl_set_fan_speed_pwm +ffffffff8224b720 T smu7_fan_ctrl_reset_fan_speed_to_default +ffffffff8224b900 T smu7_fan_ctrl_set_fan_speed_rpm +ffffffff8224bae0 T smu7_thermal_get_temperature +ffffffff8224bb40 T smu7_thermal_disable_alert +ffffffff8224bbe0 T smu7_thermal_stop_thermal_controller +ffffffff8224bd60 T smu7_start_thermal_controller +ffffffff8224c110 T smu7_thermal_ctrl_uninitialize_thermal_controller +ffffffff8224d000 T smu8_init_function_pointers +ffffffff8224d040 t smu8_hwmgr_backend_init +ffffffff8224d520 t smu8_hwmgr_backend_fini +ffffffff8224d590 t smu8_setup_asic_task +ffffffff8224dab0 t smu8_get_power_state_size +ffffffff8224dae0 t smu8_apply_state_adjust_rules +ffffffff8224dc30 t smu8_dpm_force_dpm_level +ffffffff8224df30 t smu8_enable_dpm_tasks +ffffffff8224e080 t smu8_disable_dpm_tasks +ffffffff8224e160 t smu8_dpm_patch_boot_state +ffffffff8224e1c0 t smu8_dpm_get_pp_table_entry +ffffffff8224e220 t smu8_dpm_get_num_of_pp_table_entries +ffffffff8224e270 t smu8_dpm_powerdown_uvd +ffffffff8224e2b0 t smu8_dpm_powergate_vce +ffffffff8224e480 t smu8_dpm_powergate_uvd +ffffffff8224e6b0 t smu8_dpm_powergate_acp +ffffffff8224e710 t smu8_dpm_get_mclk +ffffffff8224e740 t smu8_dpm_get_sclk +ffffffff8224e7b0 t smu8_set_power_state_tasks +ffffffff8224eaf0 t smu8_set_cpu_power_state +ffffffff8224eb60 t smu8_store_cc6_data +ffffffff8224ebe0 t smu8_get_dal_power_level +ffffffff8224ec60 t smu8_get_performance_level +ffffffff8224ed50 t smu8_get_current_shallow_sleep_clocks +ffffffff8224edb0 t smu8_get_clock_by_type +ffffffff8224eef0 t smu8_get_max_high_clocks +ffffffff8224efb0 t smu8_power_off_asic +ffffffff8224f030 t smu8_force_clock_level +ffffffff8224f090 t smu8_print_clock_levels +ffffffff8224f260 t smu8_read_sensor +ffffffff8224f560 t smu8_notify_cac_buffer_info +ffffffff8224f610 t smu8_get_thermal_temperature_range +ffffffff8224f680 t smu8_dpm_get_pp_table_entry_callback +ffffffff82250000 T smu9_baco_get_capability +ffffffff822500d0 T smu9_baco_get_state +ffffffff82251000 T convert_to_vid +ffffffff82251050 T convert_to_vddc +ffffffff822510a0 T phm_copy_clock_limits_array +ffffffff82251180 T phm_copy_overdrive_settings_limits_array +ffffffff82251260 T phm_set_field_to_u32 +ffffffff822512c0 T phm_wait_on_register +ffffffff822513d0 T phm_wait_on_indirect_register +ffffffff82251500 T phm_wait_for_register_unequal +ffffffff82251600 T phm_wait_for_indirect_register_unequal +ffffffff82251730 T phm_cf_want_uvd_power_gating +ffffffff82251760 T phm_cf_want_vce_power_gating +ffffffff82251790 T phm_trim_voltage_table +ffffffff822518c0 T phm_get_svi2_mvdd_voltage_table +ffffffff82251a50 T phm_get_svi2_vddci_voltage_table +ffffffff82251be0 T phm_get_svi2_vdd_voltage_table +ffffffff82251c80 T phm_trim_voltage_table_to_fit_state_table +ffffffff82251d60 T phm_reset_single_dpm_table +ffffffff82251e30 T phm_setup_pcie_table_entry +ffffffff82251e70 T phm_get_dpm_level_enable_mask_value +ffffffff82251f90 T phm_get_voltage_index +ffffffff82252010 T phm_get_voltage_id +ffffffff82252090 T phm_find_closest_vddci +ffffffff822520f0 T phm_find_boot_level +ffffffff82252160 T phm_get_sclk_for_voltage_evv +ffffffff82252210 T phm_initializa_dynamic_state_adjustment_rule_settings +ffffffff82252320 T phm_get_lowest_enabled_level +ffffffff82252360 T phm_apply_dal_min_voltage_request +ffffffff82252430 T phm_get_voltage_evv_on_sclk +ffffffff822524d0 T phm_irq_process +ffffffff822526d0 t orderly_poweroff +ffffffff822526e0 T smu9_register_irq_handlers +ffffffff82252790 T smu_atom_get_data_table +ffffffff82252800 T smu_get_voltage_dependency_table_ppt_v1 +ffffffff822528e0 T smu_set_watermarks_for_clocks_ranges +ffffffff82253000 T tonga_baco_set_state +ffffffff82254000 T vega10_baco_set_state +ffffffff82255000 T vega10_enable_disable_vce_dpm +ffffffff82255090 T vega10_hwmgr_init +ffffffff822550f0 t vega10_hwmgr_backend_init +ffffffff82255ef0 t vega10_hwmgr_backend_fini +ffffffff82255f60 t vega10_setup_asic_task +ffffffff82256080 t vega10_get_power_state_size +ffffffff822560b0 t vega10_apply_state_adjust_rules +ffffffff82256440 t vega10_dpm_force_dpm_level +ffffffff82256970 t vega10_enable_dpm_tasks +ffffffff822592d0 t vega10_disable_dpm_tasks +ffffffff822598b0 t vega10_patch_boot_state +ffffffff822598e0 t vega10_get_pp_table_entry +ffffffff82259950 t vega10_power_gate_vce +ffffffff822599f0 t vega10_power_gate_uvd +ffffffff82259a90 t vega10_dpm_get_mclk +ffffffff82259b30 t vega10_dpm_get_sclk +ffffffff82259bd0 t vega10_set_power_state_tasks +ffffffff8225a650 t vega10_notify_smc_display_config_after_ps_adjustment +ffffffff8225a800 t vega10_display_configuration_changed_task +ffffffff8225a8c0 t vega10_set_fan_control_mode +ffffffff8225a930 t vega10_get_fan_control_mode +ffffffff8225a970 t vega10_check_smc_update_required_for_display_configuration +ffffffff8225a9d0 t vega10_check_states_equal +ffffffff8225ab30 t vega10_get_dal_power_level +ffffffff8225ab70 t vega10_get_performance_level +ffffffff8225ac00 t vega10_get_clock_by_type_with_latency +ffffffff8225ae30 t vega10_get_clock_by_type_with_voltage +ffffffff8225af10 t vega10_set_watermarks_for_clocks_ranges +ffffffff8225af70 t vega10_display_clock_voltage_request +ffffffff8225afe0 t vega10_power_off_asic +ffffffff8225b050 t vega10_force_clock_level +ffffffff8225b180 t vega10_emit_clock_levels +ffffffff8225b2f0 t vega10_print_clock_levels +ffffffff8225bad0 t vega10_get_sclk_od +ffffffff8225bb40 t vega10_set_sclk_od +ffffffff8225bc40 t vega10_get_mclk_od +ffffffff8225bcb0 t vega10_set_mclk_od +ffffffff8225bda0 t vega10_read_sensor +ffffffff8225bff0 t vega10_avfs_enable +ffffffff8225c0b0 t vega10_notify_cac_buffer_info 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vega10_odn_update_power_state +ffffffff8225e000 T vega10_enable_didt_config +ffffffff8225f870 T vega10_disable_didt_config +ffffffff8225fab0 T vega10_initialize_power_tune_defaults +ffffffff8225fbe0 T vega10_set_power_limit +ffffffff8225fc30 T vega10_enable_power_containment +ffffffff8225fd50 T vega10_disable_power_containment +ffffffff8225fe20 T vega10_power_control_set_level +ffffffff8225fe80 t vega10_didt_set_mask +ffffffff82261000 t vega10_pp_tables_initialize +ffffffff822629a0 t vega10_pp_tables_uninitialize +ffffffff82262b50 T vega10_get_number_of_powerplay_table_entries +ffffffff82262c00 T vega10_get_powerplay_table_entry +ffffffff82262d70 T vega10_baco_set_cap +ffffffff82263000 T vega10_fan_ctrl_get_fan_speed_info +ffffffff82263080 T vega10_fan_ctrl_get_fan_speed_pwm +ffffffff82263110 T vega10_fan_ctrl_get_fan_speed_rpm +ffffffff82263200 T vega10_fan_ctrl_set_static_mode +ffffffff822634a0 T vega10_fan_ctrl_set_default_mode +ffffffff822636b0 T vega10_fan_ctrl_start_smc_fan_control +ffffffff82263770 T vega10_fan_ctrl_stop_smc_fan_control +ffffffff82263830 T vega10_fan_ctrl_set_fan_speed_pwm +ffffffff82263a50 T vega10_fan_ctrl_reset_fan_speed_to_default +ffffffff82263b10 T vega10_fan_ctrl_set_fan_speed_rpm +ffffffff82263ce0 T vega10_thermal_get_temperature +ffffffff82263d70 T vega10_thermal_disable_alert +ffffffff82263e70 T vega10_thermal_stop_thermal_controller +ffffffff82263ed0 T vega10_enable_mgpu_fan_boost +ffffffff82263fe0 T vega10_start_thermal_controller +ffffffff82264560 T vega10_thermal_ctrl_uninitialize_thermal_controller +ffffffff82265000 T vega12_baco_set_state +ffffffff82266000 T vega12_enable_disable_vce_dpm +ffffffff82266090 T vega12_hwmgr_init +ffffffff822660d0 t vega12_hwmgr_backend_init +ffffffff82266930 t vega12_hwmgr_backend_fini +ffffffff82266980 t vega12_setup_asic_task +ffffffff822669c0 t vega12_apply_clocks_adjust_rules +ffffffff82266da0 t vega12_dpm_force_dpm_level +ffffffff822671e0 t vega12_enable_dpm_tasks +ffffffff82267c50 t vega12_disable_dpm_tasks +ffffffff82267d40 t vega12_patch_boot_state +ffffffff82267d70 t vega12_power_gate_vce +ffffffff82267e10 t vega12_power_gate_uvd +ffffffff82267eb0 t vega12_dpm_get_mclk +ffffffff82267f00 t vega12_dpm_get_sclk +ffffffff82267f50 t vega12_notify_smc_display_config_after_ps_adjustment +ffffffff822680b0 t vega12_pre_display_configuration_changed_task +ffffffff82268190 t vega12_display_configuration_changed_task +ffffffff82268270 t vega12_set_fan_control_mode +ffffffff822682d0 t vega12_get_fan_control_mode +ffffffff82268310 t vega12_check_smc_update_required_for_display_configuration +ffffffff82268370 t vega12_get_dal_power_level +ffffffff822683a0 t vega12_get_performance_level +ffffffff822683d0 t vega12_get_clock_by_type_with_latency +ffffffff822686b0 t vega12_get_clock_by_type_with_voltage +ffffffff822686e0 t vega12_set_watermarks_for_clocks_ranges +ffffffff82268760 t vega12_display_clock_voltage_request +ffffffff822687e0 t vega12_power_off_asic +ffffffff82268850 t vega12_force_clock_level +ffffffff82268a90 t vega12_print_clock_levels +ffffffff82269280 t vega12_gfx_off_control +ffffffff822692d0 t vega12_read_sensor +ffffffff822696a0 t vega12_notify_cac_buffer_info +ffffffff82269750 t vega12_get_thermal_temperature_range +ffffffff82269820 t vega12_get_ppfeature_status +ffffffff822698a0 t vega12_set_ppfeature_status +ffffffff82269940 t vega12_set_mp1_state +ffffffff822699b0 t vega12_get_gpu_metrics +ffffffff82269c30 t vega12_upload_dpm_min_level +ffffffff82269e70 t vega12_upload_dpm_max_level +ffffffff8226a040 t vega12_setup_single_dpm_table +ffffffff8226b000 t vega12_pp_tables_initialize +ffffffff8226b5f0 t vega12_pp_tables_uninitialize +ffffffff8226c000 T vega12_fan_ctrl_get_fan_speed_info +ffffffff8226c040 T vega12_fan_ctrl_get_fan_speed_rpm +ffffffff8226c0a0 T vega12_fan_ctrl_start_smc_fan_control +ffffffff8226c0d0 T vega12_fan_ctrl_stop_smc_fan_control +ffffffff8226c100 T vega12_fan_ctrl_reset_fan_speed_to_default +ffffffff8226c130 T vega12_thermal_get_temperature +ffffffff8226c1c0 T vega12_thermal_disable_alert +ffffffff8226c240 T vega12_thermal_stop_thermal_controller +ffffffff8226c2c0 T vega12_start_thermal_controller +ffffffff8226d000 T vega20_baco_get_capability +ffffffff8226d0c0 T vega20_baco_get_state +ffffffff8226d150 T vega20_baco_set_state +ffffffff8226d340 T vega20_baco_apply_vdci_flush_workaround +ffffffff8226e000 T vega20_hwmgr_init +ffffffff8226e040 t vega20_hwmgr_backend_init +ffffffff8226e980 t vega20_hwmgr_backend_fini +ffffffff8226e9d0 t vega20_setup_asic_task +ffffffff8226eab0 t vega20_apply_clocks_adjust_rules +ffffffff8226efa0 t vega20_dpm_force_dpm_level +ffffffff8226f710 t vega20_enable_dpm_tasks +ffffffff82270b80 t vega20_disable_dpm_tasks +ffffffff82270d10 t vega20_power_gate_vce +ffffffff82270e40 t vega20_power_gate_uvd +ffffffff82270ee0 t vega20_dpm_get_mclk +ffffffff82270fe0 t vega20_dpm_get_sclk +ffffffff822710e0 t vega20_notify_smc_display_config_after_ps_adjustment +ffffffff82271220 t vega20_pre_display_configuration_changed_task +ffffffff82271380 t vega20_display_configuration_changed_task +ffffffff82271460 t vega20_set_fan_control_mode +ffffffff822714d0 t vega20_get_fan_control_mode +ffffffff82271510 t vega20_check_smc_update_required_for_display_configuration +ffffffff82271570 t vega20_get_dal_power_level +ffffffff822715a0 t vega20_get_performance_level +ffffffff822715d0 t vega20_get_clock_by_type_with_latency +ffffffff82271920 t vega20_get_clock_by_type_with_voltage +ffffffff82271950 t vega20_set_watermarks_for_clocks_ranges +ffffffff822719d0 t vega20_display_clock_voltage_request +ffffffff82271a50 t vega20_power_off_asic +ffffffff82271ac0 t vega20_force_clock_level +ffffffff822720e0 t vega20_print_clock_levels +ffffffff82273000 t vega20_get_sclk_od +ffffffff82273070 t vega20_set_sclk_od +ffffffff82273200 t vega20_get_mclk_od +ffffffff82273270 t vega20_set_mclk_od +ffffffff82273400 t vega20_read_sensor +ffffffff822738b0 t vega20_notify_cac_buffer_info +ffffffff82273960 t vega20_get_thermal_temperature_range +ffffffff82273a30 t vega20_get_power_profile_mode +ffffffff82273b70 t vega20_set_power_profile_mode +ffffffff82273f00 t vega20_odn_edit_dpm_table +ffffffff822743d0 t vega20_enable_mgpu_fan_boost +ffffffff82274430 t vega20_get_ppfeature_status +ffffffff822744b0 t vega20_set_ppfeature_status +ffffffff822745b0 t vega20_set_mp1_state +ffffffff82274630 t vega20_smu_i2c_bus_access +ffffffff822746b0 t vega20_set_df_cstate +ffffffff82274720 t vega20_set_xgmi_pstate +ffffffff82274780 t vega20_get_gpu_metrics +ffffffff82274a20 t vega20_upload_dpm_min_level +ffffffff82274ca0 t vega20_upload_dpm_max_level +ffffffff82274ed0 t vega20_setup_single_dpm_table +ffffffff82275000 T vega20_set_power_limit +ffffffff82275050 T vega20_validate_power_level_request +ffffffff82275080 T vega20_power_control_set_level +ffffffff82276000 t vega20_pp_tables_initialize +ffffffff82276730 t vega20_pp_tables_uninitialize +ffffffff82277000 T vega20_fan_ctrl_stop_smc_fan_control +ffffffff82277090 T vega20_fan_ctrl_start_smc_fan_control +ffffffff82277120 T vega20_fan_ctrl_get_fan_speed_pwm +ffffffff82277240 T vega20_fan_ctrl_set_fan_speed_pwm +ffffffff82277430 t vega20_fan_ctrl_set_static_mode +ffffffff822775e0 T vega20_fan_ctrl_get_fan_speed_info +ffffffff82277620 T vega20_fan_ctrl_get_fan_speed_rpm +ffffffff82277680 T vega20_fan_ctrl_set_fan_speed_rpm +ffffffff82277810 T vega20_thermal_get_temperature +ffffffff822778a0 T vega20_thermal_disable_alert +ffffffff82277920 T vega20_thermal_stop_thermal_controller +ffffffff822779a0 T vega20_start_thermal_controller +ffffffff82278000 t ci_smu_init +ffffffff82278060 t ci_smu_fini +ffffffff822780b0 t ci_start_smu +ffffffff822780e0 t ci_send_msg_to_smc +ffffffff82278180 t ci_send_msg_to_smc_with_parameter +ffffffff82278230 t ci_update_smc_table +ffffffff82278470 t ci_process_firmware_header +ffffffff82278980 t ci_update_sclk_threshold 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t iceland_is_dpm_running +ffffffff82284760 t iceland_program_memory_timing_parameters +ffffffff82284920 t iceland_populate_smc_voltage_table +ffffffff82285000 t polaris10_smu_init +ffffffff82285090 t polaris10_start_smu +ffffffff82285640 t polaris10_update_smc_table +ffffffff822858b0 t polaris10_process_firmware_header +ffffffff822859f0 t polaris10_update_sclk_threshold +ffffffff82285ad0 t polaris10_thermal_setup_fan_table +ffffffff82285d70 t polaris10_thermal_avfs_enable +ffffffff82285e00 t polaris10_init_smc_table +ffffffff82287e00 t polaris10_populate_all_graphic_levels +ffffffff82288600 t polaris10_populate_all_memory_levels +ffffffff82288950 t polaris10_initialize_mc_reg_table +ffffffff822889c0 t polaris10_get_offsetof +ffffffff82288a50 t polaris10_get_mac_definition +ffffffff82288ab0 t polaris10_is_dpm_running +ffffffff82288b00 t polaris10_is_hw_avfs_present +ffffffff82288b50 t polaris10_update_dpm_settings +ffffffff82288f50 t polaris10_program_memory_timing_parameters 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vegam_update_sclk_threshold +ffffffff8229a8f0 t vegam_thermal_setup_fan_table +ffffffff8229a950 t vegam_thermal_avfs_enable +ffffffff8229a9e0 t vegam_init_smc_table +ffffffff8229c2c0 t vegam_populate_all_graphic_levels +ffffffff8229c9f0 t vegam_populate_all_memory_levels +ffffffff8229cd30 t vegam_get_offsetof +ffffffff8229cdc0 t vegam_get_mac_definition +ffffffff8229ce20 t vegam_is_dpm_running +ffffffff8229ce70 t vegam_is_hw_avfs_present +ffffffff8229cec0 t vegam_program_memory_timing_parameters +ffffffff8229d0e0 t vegam_get_dependency_volt_by_clk +ffffffff8229d2c0 t vegam_calculate_sclk_params +ffffffff8229e000 T smu_set_residency_gfxoff +ffffffff8229e050 T smu_get_residency_gfxoff +ffffffff8229e0a0 T smu_get_entrycount_gfxoff +ffffffff8229e0f0 T smu_get_status_gfxoff +ffffffff8229e140 T smu_set_soft_freq_range +ffffffff8229e180 T smu_get_dpm_freq_range +ffffffff8229e1d0 T smu_set_gfx_power_up_by_imu +ffffffff8229e220 T is_support_sw_smu +ffffffff8229e260 T is_support_cclk_dpm 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arcturus_get_fan_speed_rpm +ffffffff822a5370 t arcturus_get_thermal_temperature_range +ffffffff822a5460 t arcturus_set_performance_level +ffffffff822a5570 t arcturus_dump_pptable +ffffffff822a55a0 t arcturus_get_power_limit +ffffffff822a56a0 t arcturus_set_df_cstate +ffffffff822a57b0 t arcturus_allow_xgmi_power_down +ffffffff822a58b0 t arcturus_i2c_control_init +ffffffff822a59e0 t arcturus_i2c_control_fini +ffffffff822a5a20 t arcturus_get_unique_id +ffffffff822a5b40 t arcturus_init_smc_tables +ffffffff822a5cb0 t arcturus_setup_pptable +ffffffff822a5de0 t arcturus_set_fan_speed_pwm +ffffffff822a5f80 t arcturus_set_fan_speed_rpm +ffffffff822a6090 t arcturus_log_thermal_throttling_event +ffffffff822a6480 t arcturus_get_gpu_metrics +ffffffff822a6690 t arcturus_get_fan_parameters +ffffffff822a66d0 t arcturus_get_current_clk_freq_by_table +ffffffff822a6810 t arcturus_get_smu_metrics_data +ffffffff822a6a80 t arcturus_upload_dpm_level +ffffffff822a6b70 t arcturus_i2c_xfer +ffffffff822a6e20 t arcturus_i2c_func +ffffffff822a6e50 t arcturus_set_fan_static_mode +ffffffff822a8000 T cyan_skillfish_set_ppt_funcs +ffffffff822a8030 t cyan_skillfish_print_clk_levels +ffffffff822a8150 t cyan_skillfish_od_edit_dpm_table +ffffffff822a8440 t cyan_skillfish_read_sensor +ffffffff822a85f0 t cyan_skillfish_is_dpm_running +ffffffff822a8690 t cyan_skillfish_init_smc_tables +ffffffff822a8760 t cyan_skillfish_get_enabled_mask +ffffffff822a87a0 t cyan_skillfish_get_dpm_ultimate_freq +ffffffff822a8860 t cyan_skillfish_get_gpu_metrics +ffffffff822a8b00 t cyan_skillfish_get_smu_metrics_data +ffffffff822a9000 T navi10_set_ppt_funcs +ffffffff822a9050 t navi10_run_btc +ffffffff822a90d0 t navi10_get_allowed_feature_mask +ffffffff822a9390 t navi10_set_default_dpm_table +ffffffff822a9800 t navi10_populate_umd_state_clk +ffffffff822a9970 t navi10_print_clk_levels +ffffffff822a9b00 t navi10_emit_clk_levels +ffffffff822a9d40 t navi10_force_clk_levels +ffffffff822a9e70 t navi10_od_edit_dpm_table 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navi10_init_smc_tables +ffffffff822abda0 t navi10_setup_pptable +ffffffff822abfb0 t navi10_baco_enter +ffffffff822ac000 t navi10_baco_exit +ffffffff822ac100 t navi1x_get_gpu_metrics +ffffffff822acaa0 t navi10_enable_mgpu_fan_boost +ffffffff822acb10 t navi10_get_fan_parameters +ffffffff822acb50 t navi10_post_smu_init +ffffffff822ace40 t navi10_get_default_config_table_settings +ffffffff822ace90 t navi10_set_config_table +ffffffff822acf40 t navi1x_get_smu_metrics_data +ffffffff822ad3a0 t navi10_get_smu_metrics_data +ffffffff822ad5d0 t navi10_i2c_xfer +ffffffff822ad880 t navi10_i2c_func +ffffffff822ad8b0 t navi10_umc_hybrid_cdr_workaround +ffffffff822ae000 T sienna_cichlid_set_ppt_funcs +ffffffff822ae050 t sienna_cichlid_run_btc +ffffffff822ae0d0 t sienna_cichlid_get_allowed_feature_mask +ffffffff822ae350 t sienna_cichlid_set_default_dpm_table +ffffffff822ae920 t sienna_cichlid_populate_umd_state_clk +ffffffff822ae9d0 t sienna_cichlid_print_clk_levels +ffffffff822aebb0 t sienna_cichlid_force_clk_levels +ffffffff822aece0 t sienna_cichlid_od_edit_dpm_table +ffffffff822af270 t sienna_cichlid_get_power_profile_mode +ffffffff822af4d0 t sienna_cichlid_set_power_profile_mode +ffffffff822af790 t sienna_cichlid_dpm_set_vcn_enable +ffffffff822af850 t sienna_cichlid_dpm_set_jpeg_enable +ffffffff822af8d0 t sienna_cichlid_read_sensor +ffffffff822afbd0 t sienna_cichlid_pre_display_config_changed +ffffffff822afc00 t sienna_cichlid_display_config_changed +ffffffff822afc60 t sienna_cichlid_notify_smc_display_config +ffffffff822afdf0 t sienna_cichlid_is_dpm_running +ffffffff822afe40 t sienna_cichlid_get_fan_speed_rpm +ffffffff822aff40 t sienna_cichlid_set_watermarks_table +ffffffff822b00d0 t sienna_cichlid_get_thermal_temperature_range +ffffffff822b01a0 t sienna_cichlid_get_uclk_dpm_states +ffffffff822b02c0 t sienna_cichlid_set_default_od_settings +ffffffff822b0410 t sienna_cichlid_display_disable_memory_clock_switch +ffffffff822b0490 t sienna_cichlid_dump_pptable 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+ffffffff822b1ae0 t sienna_cichlid_get_ecc_info +ffffffff822b1bd0 t sienna_cichlid_stb_get_data_direct +ffffffff822b1c70 t sienna_cichlid_get_default_config_table_settings +ffffffff822b1cd0 t sienna_cichlid_set_config_table +ffffffff822b1da0 t sienna_cichlid_get_smu_metrics_data +ffffffff822b21e0 t sienna_cichlid_get_throttler_status_locked +ffffffff822b2360 t sienna_cichlid_get_smartshift_power_percentage +ffffffff822b2490 t sienna_cichlid_i2c_xfer +ffffffff822b2740 t sienna_cichlid_i2c_func +ffffffff822b3000 T smu_v11_0_init_microcode +ffffffff822b32a0 T smu_v11_0_fini_microcode +ffffffff822b3320 T smu_v11_0_load_microcode +ffffffff822b3460 T smu_v11_0_check_fw_status +ffffffff822b34b0 T smu_v11_0_check_fw_version +ffffffff822b3660 T smu_v11_0_setup_pptable +ffffffff822b3780 T smu_v11_0_init_smc_tables +ffffffff822b38d0 T smu_v11_0_fini_smc_tables +ffffffff822b3b00 T smu_v11_0_init_power +ffffffff822b3b80 T smu_v11_0_fini_power +ffffffff822b3be0 T smu_v11_0_get_vbios_bootup_values +ffffffff822b3f30 T smu_v11_0_notify_memory_pool_location +ffffffff822b4020 T smu_v11_0_set_min_deep_sleep_dcefclk +ffffffff822b40a0 T smu_v11_0_set_driver_table_location +ffffffff822b4110 T smu_v11_0_set_tool_table_location +ffffffff822b4180 T smu_v11_0_init_display_count +ffffffff822b41d0 T smu_v11_0_set_allowed_mask +ffffffff822b42a0 T smu_v11_0_system_features_control +ffffffff822b42c0 T smu_v11_0_notify_display_change +ffffffff822b4330 T smu_v11_0_init_max_sustainable_clocks +ffffffff822b45a0 t smu_v11_0_get_max_sustainable_clock +ffffffff822b46c0 T smu_v11_0_get_current_power_limit +ffffffff822b4790 T smu_v11_0_set_power_limit +ffffffff822b48d0 T smu_v11_0_interrupt_work +ffffffff822b4950 T smu_v11_0_enable_thermal_alert +ffffffff822b49e0 T smu_v11_0_disable_thermal_alert +ffffffff822b4a00 T smu_v11_0_get_gfx_vdd +ffffffff822b4ac0 T smu_v11_0_display_clock_voltage_request +ffffffff822b4c00 T smu_v11_0_set_hard_freq_limited_range +ffffffff822b4ce0 T smu_v11_0_gfx_off_control +ffffffff822b4d50 T smu_v11_0_get_fan_control_mode +ffffffff822b4da0 T smu_v11_0_set_fan_speed_pwm +ffffffff822b4f30 t smu_v11_0_set_fan_static_mode +ffffffff822b50e0 T smu_v11_0_set_fan_speed_rpm +ffffffff822b5200 T smu_v11_0_get_fan_speed_pwm +ffffffff822b5330 T smu_v11_0_get_fan_speed_rpm +ffffffff822b5430 T smu_v11_0_set_fan_control_mode +ffffffff822b55d0 T smu_v11_0_set_xgmi_pstate +ffffffff822b55f0 T smu_v11_0_register_irq_handler +ffffffff822b56b0 T smu_v11_0_get_max_sustainable_clocks_by_dc +ffffffff822b5740 T smu_v11_0_set_azalia_d3_pme +ffffffff822b5760 T smu_v11_0_baco_set_armd3_sequence +ffffffff822b5780 T smu_v11_0_baco_is_support +ffffffff822b5800 T smu_v11_0_baco_get_state +ffffffff822b5830 T smu_v11_0_baco_set_state +ffffffff822b5ae0 T smu_v11_0_baco_enter +ffffffff822b5bd0 T smu_v11_0_baco_exit +ffffffff822b5c70 T smu_v11_0_mode1_reset +ffffffff822b5cf0 T smu_v11_0_handle_passthrough_sbr +ffffffff822b5d10 T smu_v11_0_get_dpm_ultimate_freq +ffffffff822b5e50 T smu_v11_0_set_soft_freq_limited_range +ffffffff822b5f30 T smu_v11_0_set_performance_level +ffffffff822b6280 T smu_v11_0_set_power_source +ffffffff822b62e0 T smu_v11_0_get_dpm_freq_by_index +ffffffff822b6380 T smu_v11_0_get_dpm_level_count +ffffffff822b6410 T smu_v11_0_set_single_dpm_table +ffffffff822b65f0 T smu_v11_0_get_dpm_level_range +ffffffff822b6750 T smu_v11_0_get_current_pcie_link_width_level +ffffffff822b67a0 T smu_v11_0_get_current_pcie_link_width +ffffffff822b6800 T smu_v11_0_get_current_pcie_link_speed_level +ffffffff822b6850 T smu_v11_0_get_current_pcie_link_speed +ffffffff822b68a0 T smu_v11_0_gfx_ulv_control +ffffffff822b6910 T smu_v11_0_deep_sleep_control +ffffffff822b6ac0 T smu_v11_0_restore_user_od_settings +ffffffff822b6b50 T smu_v11_0_set_smu_mailbox_registers +ffffffff822b6bc0 t smu_v11_0_set_irq_state +ffffffff822b7140 t smu_v11_0_irq_process +ffffffff822b7440 t orderly_poweroff +ffffffff822b8000 T vangogh_set_ppt_funcs +ffffffff822b8040 t vangogh_set_default_dpm_tables +ffffffff822b8060 t vangogh_common_print_clk_levels +ffffffff822b84b0 t vangogh_force_clk_levels +ffffffff822b86e0 t vangogh_od_edit_dpm_table +ffffffff822b8c30 t vangogh_get_power_profile_mode +ffffffff822b8d00 t vangogh_set_power_profile_mode +ffffffff822b8e20 t vangogh_dpm_set_vcn_enable +ffffffff822b8e70 t vangogh_dpm_set_jpeg_enable +ffffffff822b8ec0 t vangogh_read_sensor +ffffffff822b8ff0 t vangogh_is_dpm_running +ffffffff822b9050 t vangogh_set_watermarks_table +ffffffff822b91e0 t vangogh_set_performance_level +ffffffff822b9b00 t vangogh_get_power_limit +ffffffff822b9c80 t vangogh_get_ppt_limit +ffffffff822b9ce0 t vangogh_get_dpm_clock_table +ffffffff822b9e50 t vangogh_init_smc_tables +ffffffff822ba0a0 t vangogh_system_features_control +ffffffff822ba0f0 t vangogh_set_power_limit +ffffffff822ba250 t vangogh_get_gfxoff_status +ffffffff822ba2d0 t vangogh_get_gfxoff_entrycount +ffffffff822ba340 t vangogh_set_gfxoff_residency +ffffffff822ba3b0 t vangogh_get_gfxoff_residency +ffffffff822ba3e0 t vangogh_mode2_reset +ffffffff822ba520 t vangogh_common_get_gpu_metrics +ffffffff822bab60 t vangogh_post_smu_init +ffffffff822bad00 t vangogh_set_fine_grain_gfx_freq_parameters +ffffffff822bad70 t vangogh_common_get_smu_metrics_data +ffffffff822bb0c0 t vangogh_force_dpm_limit_value +ffffffff822bb200 t vangogh_get_dpm_ultimate_freq +ffffffff822bb5c0 t vangogh_set_soft_freq_limited_range +ffffffff822bc000 T renoir_set_ppt_funcs +ffffffff822bc0a0 t renoir_get_current_power_state +ffffffff822bc110 t renoir_print_clk_levels +ffffffff822bc370 t renoir_force_clk_levels +ffffffff822bc5a0 t renoir_od_edit_dpm_table +ffffffff822bc8a0 t renoir_get_power_profile_mode +ffffffff822bc970 t renoir_set_power_profile_mode +ffffffff822bca90 t renoir_dpm_set_vcn_enable +ffffffff822bcb10 t renoir_dpm_set_jpeg_enable +ffffffff822bcb90 t renoir_read_sensor +ffffffff822bcf30 t renoir_is_dpm_running +ffffffff822bcf60 t renoir_set_watermarks_table +ffffffff822bd100 t renoir_set_performance_level +ffffffff822bd640 t renoir_get_dpm_clock_table +ffffffff822bd980 t renoir_init_smc_tables +ffffffff822bdaf0 t renoir_get_enabled_mask +ffffffff822bdb30 t renoir_get_dpm_ultimate_freq +ffffffff822bddd0 t renoir_get_gpu_metrics +ffffffff822bdff0 t renoir_gfx_state_change_set +ffffffff822be020 t renoir_set_fine_grain_gfx_freq_parameters +ffffffff822be0b0 t renoir_force_dpm_limit_value +ffffffff822bf000 T smu_v12_0_check_fw_status +ffffffff822bf050 T smu_v12_0_check_fw_version +ffffffff822bf110 T smu_v12_0_powergate_sdma +ffffffff822bf150 T smu_v12_0_set_gfx_cgpg +ffffffff822bf1b0 T smu_v12_0_get_gfxoff_status +ffffffff822bf230 T smu_v12_0_gfx_off_control +ffffffff822bf340 T smu_v12_0_fini_smc_tables +ffffffff822bf3f0 T smu_v12_0_set_default_dpm_tables +ffffffff822bf410 T smu_v12_0_mode2_reset +ffffffff822bf430 T smu_v12_0_set_soft_freq_limited_range +ffffffff822bf560 T smu_v12_0_set_driver_table_location +ffffffff822bf5d0 T smu_v12_0_get_vbios_bootup_values +ffffffff822c0000 T aldebaran_set_ppt_funcs +ffffffff822c0040 t aldebaran_get_allowed_feature_mask +ffffffff822c0090 t aldebaran_set_default_dpm_table +ffffffff822c0290 t aldebaran_populate_umd_state_clk +ffffffff822c0390 t aldebaran_print_clk_levels +ffffffff822c0550 t aldebaran_force_clk_levels +ffffffff822c0700 t aldebaran_usr_edit_dpm_table +ffffffff822c0920 t aldebaran_read_sensor +ffffffff822c0bc0 t aldebaran_is_dpm_running +ffffffff822c0c10 t aldebaran_get_thermal_temperature_range +ffffffff822c0cd0 t aldebaran_set_performance_level +ffffffff822c0d70 t aldebaran_get_power_limit +ffffffff822c0f00 t aldebaran_set_df_cstate +ffffffff822c0f80 t aldebaran_allow_xgmi_power_down +ffffffff822c1010 t aldebaran_i2c_control_init +ffffffff822c10d0 t aldebaran_i2c_control_fini +ffffffff822c1110 t aldebaran_get_unique_id +ffffffff822c11f0 t aldebaran_init_smc_tables +ffffffff822c1380 t aldebaran_set_mp1_state +ffffffff822c13c0 t aldebaran_setup_pptable +ffffffff822c1480 t aldebaran_system_features_control +ffffffff822c15e0 t aldebaran_set_power_limit +ffffffff822c1670 t aldebaran_is_baco_supported +ffffffff822c16a0 t aldebaran_is_mode1_reset_supported +ffffffff822c16d0 t aldebaran_is_mode2_reset_supported +ffffffff822c1700 t aldebaran_mode1_reset +ffffffff822c17e0 t aldebaran_mode2_reset +ffffffff822c1990 t aldebaran_set_soft_freq_limited_range +ffffffff822c1b90 t aldebaran_log_thermal_throttling_event +ffffffff822c1ea0 t aldebaran_get_gpu_metrics +ffffffff822c2130 t aldebaran_smu_handle_passthrough_sbr +ffffffff822c2150 t aldebaran_smu_send_hbm_bad_page_num +ffffffff822c21d0 t aldebaran_get_ecc_info +ffffffff822c2330 t aldebaran_send_hbm_bad_channel_flag +ffffffff822c2410 t aldebaran_get_current_clk_freq_by_table +ffffffff822c2550 t aldebaran_get_smu_metrics_data +ffffffff822c27a0 t aldebaran_upload_dpm_level +ffffffff822c2890 t aldebaran_i2c_xfer +ffffffff822c2b40 t aldebaran_i2c_func +ffffffff822c3000 T smu_v13_0_init_microcode +ffffffff822c31d0 T smu_v13_0_fini_microcode +ffffffff822c3250 T smu_v13_0_load_microcode +ffffffff822c3280 T smu_v13_0_init_pptable_microcode +ffffffff822c3420 T smu_v13_0_get_pptable_from_firmware +ffffffff822c3540 T smu_v13_0_check_fw_status +ffffffff822c35a0 T smu_v13_0_check_fw_version +ffffffff822c36d0 T smu_v13_0_setup_pptable +ffffffff822c3870 T smu_v13_0_init_smc_tables +ffffffff822c39b0 T smu_v13_0_fini_smc_tables +ffffffff822c3ba0 T smu_v13_0_init_power +ffffffff822c3c20 T smu_v13_0_fini_power +ffffffff822c3ca0 T smu_v13_0_get_vbios_bootup_values +ffffffff822c3f40 T smu_v13_0_notify_memory_pool_location +ffffffff822c4000 T smu_v13_0_set_min_deep_sleep_dcefclk +ffffffff822c4080 T smu_v13_0_set_driver_table_location +ffffffff822c40f0 T smu_v13_0_set_tool_table_location +ffffffff822c4160 T smu_v13_0_init_display_count +ffffffff822c41a0 T smu_v13_0_set_allowed_mask +ffffffff822c4270 T smu_v13_0_gfx_off_control +ffffffff822c42e0 T smu_v13_0_system_features_control +ffffffff822c4300 T smu_v13_0_notify_display_change +ffffffff822c4370 T smu_v13_0_init_max_sustainable_clocks +ffffffff822c45e0 t smu_v13_0_get_max_sustainable_clock +ffffffff822c4700 T smu_v13_0_get_current_power_limit +ffffffff822c47d0 T smu_v13_0_set_power_limit +ffffffff822c48f0 T smu_v13_0_enable_thermal_alert +ffffffff822c4970 T smu_v13_0_disable_thermal_alert +ffffffff822c49b0 T smu_v13_0_get_gfx_vdd +ffffffff822c4a70 T smu_v13_0_display_clock_voltage_request +ffffffff822c4bb0 T smu_v13_0_set_hard_freq_limited_range +ffffffff822c4c90 T smu_v13_0_get_fan_control_mode +ffffffff822c4cd0 T smu_v13_0_set_fan_speed_pwm +ffffffff822c4ee0 t smu_v13_0_set_fan_static_mode +ffffffff822c50a0 T smu_v13_0_set_fan_control_mode +ffffffff822c5200 T smu_v13_0_set_fan_speed_rpm +ffffffff822c53b0 T smu_v13_0_set_xgmi_pstate +ffffffff822c53d0 T smu_v13_0_register_irq_handler +ffffffff822c5490 T smu_v13_0_get_max_sustainable_clocks_by_dc +ffffffff822c5520 T smu_v13_0_set_azalia_d3_pme +ffffffff822c5540 T smu_v13_0_wait_for_event +ffffffff822c5590 T smu_v13_0_get_dpm_ultimate_freq +ffffffff822c56e0 T smu_v13_0_set_soft_freq_limited_range +ffffffff822c57c0 T smu_v13_0_set_performance_level +ffffffff822c5f50 T smu_v13_0_set_power_source +ffffffff822c5fb0 T smu_v13_0_set_single_dpm_table +ffffffff822c6240 T smu_v13_0_get_dpm_level_range +ffffffff822c63c0 T smu_v13_0_get_current_pcie_link_width_level +ffffffff822c6410 T smu_v13_0_get_current_pcie_link_width +ffffffff822c6470 T smu_v13_0_get_current_pcie_link_speed_level +ffffffff822c64c0 T smu_v13_0_get_current_pcie_link_speed +ffffffff822c6510 T smu_v13_0_set_vcn_enable +ffffffff822c65c0 T smu_v13_0_set_jpeg_enable +ffffffff822c65e0 T smu_v13_0_run_btc +ffffffff822c6660 T smu_v13_0_deep_sleep_control +ffffffff822c68c0 T smu_v13_0_gfx_ulv_control +ffffffff822c6930 T smu_v13_0_baco_set_armd3_sequence +ffffffff822c6950 T smu_v13_0_baco_is_support +ffffffff822c69c0 T smu_v13_0_baco_get_state +ffffffff822c69f0 T smu_v13_0_baco_set_state +ffffffff822c6ab0 T smu_v13_0_baco_enter +ffffffff822c6bc0 T smu_v13_0_baco_exit +ffffffff822c6c50 T smu_v13_0_set_gfx_power_up_by_imu +ffffffff822c6c80 T smu_v13_0_od_edit_dpm_table +ffffffff822c6f50 T smu_v13_0_set_default_dpm_tables +ffffffff822c6f70 T smu_v13_0_set_smu_mailbox_registers +ffffffff822c6fe0 T smu_v13_0_mode1_reset +ffffffff822c7060 t smu_v13_0_set_irq_state +ffffffff822c75e0 t smu_v13_0_irq_process +ffffffff822c78d0 t orderly_poweroff +ffffffff822c8000 T smu_v13_0_0_set_ppt_funcs +ffffffff822c8050 t smu_v13_0_0_get_allowed_feature_mask +ffffffff822c8190 t smu_v13_0_0_set_default_dpm_table +ffffffff822c8580 t smu_v13_0_0_populate_umd_state_clk +ffffffff822c8680 t smu_v13_0_0_print_clk_levels +ffffffff822c87a0 t smu_v13_0_0_force_clk_levels +ffffffff822c8920 t smu_v13_0_0_get_power_profile_mode +ffffffff822c8b80 t smu_v13_0_0_set_power_profile_mode +ffffffff822c8dd0 t smu_v13_0_0_read_sensor +ffffffff822c8ff0 t smu_v13_0_0_is_dpm_running +ffffffff822c9040 t smu_v13_0_0_get_fan_speed_pwm +ffffffff822c90b0 t smu_v13_0_0_get_fan_speed_rpm +ffffffff822c9120 t smu_v13_0_0_get_thermal_temperature_range +ffffffff822c9210 t smu_v13_0_0_dump_pptable +ffffffff822c9240 t smu_v13_0_0_get_power_limit +ffffffff822c9320 t smu_v13_0_0_set_df_cstate +ffffffff822c9340 t smu_v13_0_0_update_pcie_parameters +ffffffff822c9420 t smu_v13_0_0_i2c_control_init +ffffffff822c9550 t smu_v13_0_0_i2c_control_fini +ffffffff822c9590 t smu_v13_0_0_get_unique_id +ffffffff822c9640 t smu_v13_0_0_init_smc_tables +ffffffff822c9830 t smu_v13_0_0_set_mp1_state +ffffffff822c9870 t smu_v13_0_0_setup_pptable +ffffffff822c99a0 t smu_v13_0_0_system_features_control +ffffffff822c99b0 t smu_v13_0_0_baco_enter +ffffffff822c9a00 t smu_v13_0_0_baco_exit +ffffffff822c9a60 t smu_v13_0_0_is_mode1_reset_supported +ffffffff822c9ab0 t smu_v13_0_0_get_gpu_metrics +ffffffff822c9ed0 t smu_v13_0_0_enable_mgpu_fan_boost +ffffffff822c9f20 t smu_v13_0_0_get_smu_metrics_data +ffffffff822ca290 t smu_v13_0_get_throttler_status +ffffffff822ca450 t smu_v13_0_0_i2c_xfer +ffffffff822ca700 t smu_v13_0_0_i2c_func +ffffffff822cb000 T smu_v13_0_4_set_ppt_funcs +ffffffff822cb090 t smu_v13_0_4_print_clk_levels +ffffffff822cb150 t smu_v13_0_4_force_clk_levels +ffffffff822cb3f0 t smu_v13_0_4_read_sensor +ffffffff822cb6a0 t smu_v13_0_4_is_dpm_running +ffffffff822cb6f0 t smu_v13_0_4_set_watermarks_table +ffffffff822cb880 t smu_v13_0_4_set_performance_level +ffffffff822cbdb0 t smu_v13_0_4_init_smc_tables +ffffffff822cbf20 t smu_v13_0_4_fini_smc_tables +ffffffff822cbfd0 t smu_v13_0_4_system_features_control +ffffffff822cc020 t smu_v13_0_4_mode2_reset +ffffffff822cc040 t smu_v13_0_4_get_dpm_ultimate_freq +ffffffff822cc460 t smu_v13_0_4_get_gpu_metrics +ffffffff822cc630 t smu_v13_0_4_set_fine_grain_gfx_freq_parameters +ffffffff822cc680 t smu_v13_0_4_get_smu_metrics_data +ffffffff822cd000 T smu_v13_0_5_set_ppt_funcs +ffffffff822cd090 t smu_v13_0_5_set_default_dpm_tables +ffffffff822cd0b0 t smu_v13_0_5_print_clk_levels +ffffffff822cd160 t smu_v13_0_5_force_clk_levels +ffffffff822cd2c0 t smu_v13_0_5_od_edit_dpm_table +ffffffff822cd590 t smu_v13_0_5_dpm_set_vcn_enable +ffffffff822cd5b0 t smu_v13_0_5_dpm_set_jpeg_enable +ffffffff822cd5d0 t smu_v13_0_5_read_sensor +ffffffff822cd7f0 t smu_v13_0_5_is_dpm_running +ffffffff822cd840 t smu_v13_0_5_set_watermarks_table +ffffffff822cd9d0 t smu_v13_0_5_set_performance_level +ffffffff822cdbb0 t smu_v13_0_5_init_smc_tables +ffffffff822cdd20 t smu_v13_0_5_fini_smc_tables +ffffffff822cddd0 t smu_v13_0_5_system_features_control +ffffffff822cde20 t smu_v13_0_5_mode2_reset +ffffffff822cdea0 t smu_v13_0_5_get_dpm_ultimate_freq +ffffffff822ce2e0 t smu_v13_0_5_get_gpu_metrics +ffffffff822ce420 t smu_v13_0_5_set_fine_grain_gfx_freq_parameters +ffffffff822ce470 t smu_v13_0_5_get_smu_metrics_data +ffffffff822cf000 T smu_v13_0_7_set_ppt_funcs +ffffffff822cf050 t smu_v13_0_7_get_allowed_feature_mask +ffffffff822cf1c0 t smu_v13_0_7_set_default_dpm_table +ffffffff822cf5b0 t smu_v13_0_7_populate_umd_state_clk +ffffffff822cf6b0 t smu_v13_0_7_print_clk_levels +ffffffff822cf7d0 t smu_v13_0_7_force_clk_levels +ffffffff822cf950 t smu_v13_0_7_get_power_profile_mode +ffffffff822cfc30 t smu_v13_0_7_set_power_profile_mode +ffffffff822cfe70 t smu_v13_0_7_read_sensor +ffffffff822d0080 t smu_v13_0_7_is_dpm_running +ffffffff822d00d0 t smu_v13_0_7_get_fan_speed_pwm +ffffffff822d0140 t smu_v13_0_7_get_fan_speed_rpm +ffffffff822d01b0 t smu_v13_0_7_get_thermal_temperature_range +ffffffff822d02a0 t smu_v13_0_7_dump_pptable +ffffffff822d02d0 t smu_v13_0_7_get_power_limit +ffffffff822d03b0 t smu_v13_0_7_set_df_cstate +ffffffff822d03d0 t smu_v13_0_7_update_pcie_parameters +ffffffff822d04b0 t smu_v13_0_7_init_smc_tables +ffffffff822d06a0 t smu_v13_0_7_check_fw_status +ffffffff822d06f0 t smu_v13_0_7_set_mp1_state +ffffffff822d0730 t smu_v13_0_7_setup_pptable +ffffffff822d0890 t smu_v13_0_7_baco_enter +ffffffff822d08e0 t smu_v13_0_7_baco_exit +ffffffff822d0940 t smu_v13_0_7_is_mode1_reset_supported +ffffffff822d0970 t smu_v13_0_7_get_gpu_metrics +ffffffff822d0d80 t smu_v13_0_7_enable_mgpu_fan_boost +ffffffff822d0dd0 t smu_v13_0_7_get_smu_metrics_data +ffffffff822d1120 t smu_v13_0_7_get_throttler_status +ffffffff822d2000 T yellow_carp_set_ppt_funcs +ffffffff822d2040 t yellow_carp_set_default_dpm_tables +ffffffff822d2060 t yellow_carp_print_clk_levels +ffffffff822d2120 t yellow_carp_force_clk_levels +ffffffff822d23c0 t yellow_carp_od_edit_dpm_table +ffffffff822d2690 t yellow_carp_dpm_set_vcn_enable +ffffffff822d26b0 t yellow_carp_dpm_set_jpeg_enable +ffffffff822d26d0 t yellow_carp_read_sensor +ffffffff822d2a70 t yellow_carp_is_dpm_running +ffffffff822d2ac0 t yellow_carp_set_watermarks_table +ffffffff822d2c50 t yellow_carp_set_performance_level +ffffffff822d3180 t yellow_carp_init_smc_tables +ffffffff822d32f0 t yellow_carp_fini_smc_tables +ffffffff822d33a0 t yellow_carp_system_features_control +ffffffff822d33f0 t yellow_carp_get_gfxoff_status +ffffffff822d3470 t yellow_carp_mode2_reset +ffffffff822d34f0 t yellow_carp_get_dpm_ultimate_freq +ffffffff822d3930 t yellow_carp_get_gpu_metrics +ffffffff822d3ae0 t yellow_carp_post_smu_init +ffffffff822d3b60 t yellow_carp_set_fine_grain_gfx_freq_parameters +ffffffff822d3bb0 t yellow_carp_get_smu_metrics_data +ffffffff822d4000 T smu_cmn_send_msg_without_waiting +ffffffff822d4170 T smu_cmn_wait_for_response +ffffffff822d42a0 T smu_cmn_send_smc_msg_with_param +ffffffff822d45c0 T smu_cmn_to_asic_specific_index +ffffffff822d46c0 t __smu_cmn_reg_print_error +ffffffff822d4910 T smu_cmn_send_smc_msg +ffffffff822d4930 T smu_cmn_feature_is_supported +ffffffff822d49d0 T smu_cmn_feature_is_enabled +ffffffff822d4ac0 T smu_cmn_clk_dpm_is_enabled +ffffffff822d4bc0 T smu_cmn_get_enabled_mask +ffffffff822d4cb0 T smu_cmn_get_indep_throttler_status +ffffffff822d4d60 T smu_cmn_feature_update_enable_state +ffffffff822d4e00 T smu_cmn_feature_set_enabled +ffffffff822d4ed0 T smu_cmn_get_pp_feature_mask +ffffffff822d5070 T smu_cmn_set_pp_feature_mask +ffffffff822d5170 T smu_cmn_disable_all_features_with_exception +ffffffff822d5220 T smu_cmn_get_smc_version +ffffffff822d52f0 T smu_cmn_update_table +ffffffff822d5450 T smu_cmn_write_watermarks_table +ffffffff822d5510 T smu_cmn_write_pptable +ffffffff822d55d0 T smu_cmn_get_metrics_table +ffffffff822d5730 T smu_cmn_get_combo_pptable +ffffffff822d5800 T smu_cmn_init_soft_gpu_metrics +ffffffff822d58e0 T smu_cmn_set_mp1_state +ffffffff822d5980 T smu_cmn_is_audio_func_enabled +ffffffff822d6000 T pci_mcfg_init +ffffffff822d6050 T pci_lookup_segment +ffffffff822d60b0 T pci_attach_hook +ffffffff822d60e0 T pci_bus_maxdevs +ffffffff822d6110 T pci_make_tag +ffffffff822d6180 T pci_decompose_tag +ffffffff822d61e0 T pci_conf_size +ffffffff822d6230 T pci_mcfg_map_bus +ffffffff822d62b0 T pci_conf_read +ffffffff822d6400 T pci_conf_write +ffffffff822d6530 T pci_msix_table_map +ffffffff822d6650 T pci_msix_table_unmap +ffffffff822d66f0 T msi_hwmask +ffffffff822d6720 T msi_hwunmask +ffffffff822d6750 T msi_addroute +ffffffff822d6850 T msi_delroute +ffffffff822d68c0 T pci_intr_map_msi +ffffffff822d6940 T msix_hwmask +ffffffff822d6970 T msix_hwunmask +ffffffff822d69a0 T msix_addroute +ffffffff822d6b90 T msix_delroute +ffffffff822d6cf0 T pci_intr_map_msix +ffffffff822d6dc0 T pci_intr_map +ffffffff822d6fd0 T pci_intr_string +ffffffff822d70b0 T pci_intr_establish +ffffffff822d7100 T pci_intr_establish_cpu +ffffffff822d7260 T pci_intr_disestablish +ffffffff822d7270 T pci_init_extents +ffffffff822d7450 T pci_probe_device_hook +ffffffff822d7490 T pci_dev_postattach +ffffffff822d74a0 T pci_min_powerstate +ffffffff822d74b0 T pci_set_powerstate_md +ffffffff822d8000 T pciide_machdep_compat_intr_establish +ffffffff822d8060 T pciide_machdep_compat_intr_disestablish +ffffffff822d9000 T vga_post_init +ffffffff822d9310 t vm86_emu_inb +ffffffff822d9350 t vm86_emu_inw +ffffffff822d9390 t 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rbus_space_alloc_subregion +ffffffff822e2240 T rbus_space_free +ffffffff822e22d0 T rbus_new_body +ffffffff822e2360 T rbus_new_root_delegate +ffffffff822e2420 T rbus_new_root_share +ffffffff822e3000 T com_cardbus_match +ffffffff822e3070 T com_cardbus_attach +ffffffff822e3220 T com_cardbus_detach +ffffffff822e32b0 T com_cardbus_find_csdev +ffffffff822e3420 T com_cardbus_gofigure +ffffffff822e38d0 T com_cardbus_enable +ffffffff822e39a0 T com_cardbus_disable +ffffffff822e39f0 T com_cardbus_setup +ffffffff822e4000 T xl_cardbus_match +ffffffff822e4090 T xl_cardbus_attach +ffffffff822e4420 T xl_cardbus_detach +ffffffff822e44d0 T xl_cardbus_lookup +ffffffff822e4580 T xl_cardbus_intr_ack +ffffffff822e5000 T dc_cardbus_match +ffffffff822e5020 T dc_cardbus_attach +ffffffff822e53b0 T dc_cardbus_detach +ffffffff822e5440 T dc_cardbus_setup +ffffffff822e6000 T fxp_cardbus_match +ffffffff822e6020 T fxp_cardbus_attach +ffffffff822e6230 T fxp_cardbus_detach +ffffffff822e62c0 T fxp_cardbus_setup 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atw_cardbus_match +ffffffff822eb020 T atw_cardbus_attach +ffffffff822eb210 T atw_cardbus_detach +ffffffff822eb2d0 T atw_cardbus_enable +ffffffff822eb3a0 T atw_cardbus_disable +ffffffff822eb3f0 T atw_cardbus_power +ffffffff822eb420 T atw_cardbus_setup +ffffffff822ec000 T rtw_cardbus_match +ffffffff822ec020 T rtw_cardbus_attach +ffffffff822ec260 T rtw_cardbus_detach +ffffffff822ec380 T rtw_cardbus_intr_ack +ffffffff822ec3a0 T rtw_cardbus_funcregen +ffffffff822ec400 T rtw_cardbus_enable +ffffffff822ec550 T rtw_cardbus_disable +ffffffff822ec630 T rtw_cardbus_power +ffffffff822ec660 T rtw_cardbus_setup +ffffffff822ed000 T ral_cardbus_match +ffffffff822ed020 T ral_cardbus_attach +ffffffff822ed220 T ral_cardbus_detach +ffffffff822ed2d0 T ral_cardbus_activate +ffffffff822ed350 T ral_cardbus_enable +ffffffff822ed4b0 T ral_cardbus_disable +ffffffff822ed500 T ral_cardbus_setup +ffffffff822ed5a0 T ral_cardbus_wakeup +ffffffff822ee000 T acx_cardbus_match +ffffffff822ee020 T acx_cardbus_attach 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malo_cardbus_disable +ffffffff822f34f0 T malo_cardbus_setup +ffffffff822f4000 T bwi_cardbus_match +ffffffff822f4020 T bwi_cardbus_attach +ffffffff822f4290 T bwi_cardbus_detach +ffffffff822f4330 T bwi_cardbus_enable +ffffffff822f4480 T bwi_cardbus_disable +ffffffff822f44d0 T bwi_cardbus_setup +ffffffff822f4570 T bwi_cardbus_conf_read +ffffffff822f4590 T bwi_cardbus_conf_write +ffffffff822f5000 T rbus_pccbb_parent_mem +ffffffff822f5050 T rbus_pccbb_parent_io +ffffffff822f50c0 T pccbb_attach_hook +ffffffff822f6000 T pcmcia_match +ffffffff822f6050 T pcmcia_attach +ffffffff822f60d0 T pcmcia_activate +ffffffff822f6180 T pcmcia_ccr_read +ffffffff822f61d0 T pcmcia_ccr_write +ffffffff822f6230 T pcmcia_card_attach +ffffffff822f6430 T pcmcia_print +ffffffff822f6690 T pcmcia_submatch +ffffffff822f66e0 T pcmcia_card_detach +ffffffff822f6790 T pcmcia_card_deactivate +ffffffff822f67f0 T pcmcia_card_gettype +ffffffff822f6850 T pcmcia_function_init +ffffffff822f68a0 T pcmcia_function_enable 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ne_pcmcia_ax88190_set_iobase +ffffffff822ff000 T aic_pcmcia_match +ffffffff822ff0b0 T aic_pcmcia_attach +ffffffff822ff2a0 T aic_pcmcia_detach +ffffffff82300000 T com_pcmcia_match +ffffffff82300210 T com_pcmcia_attach +ffffffff823004f0 T com_pcmcia_detach +ffffffff82300580 T com_pcmcia_activate +ffffffff82300630 T com_pcmcia_enable1 +ffffffff823006d0 T com_pcmcia_enable +ffffffff823007c0 T com_pcmcia_disable +ffffffff82300800 T com_pcmcia_disable1 +ffffffff82301000 t wdc_pcmcia_match +ffffffff823010d0 t wdc_pcmcia_attach +ffffffff82301540 T wdc_pcmcia_detach +ffffffff82301640 T wdc_pcmcia_activate +ffffffff82301760 T wdc_pcmcia_disk_device_interface_callback +ffffffff82301800 T wdc_pcmcia_disk_device_interface +ffffffff82301860 T wdc_pcmcia_lookup +ffffffff82302000 T sm_pcmcia_match +ffffffff82302100 T sm_pcmcia_attach +ffffffff82302320 T sm_pcmcia_detach +ffffffff823023c0 T sm_pcmcia_activate +ffffffff82302440 T sm_pcmcia_funce_enaddr +ffffffff82302460 T sm_pcmcia_ascii_enaddr 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wsdisplay_delscreen +ffffffff8232ffd0 T wsdisplay_update_rawkbd +ffffffff823300c0 T wsdisplay_common_attach +ffffffff82330460 T wsdisplay_common_detach +ffffffff82330690 T wsdisplay_switchtoconsole +ffffffff82330700 T wsemuldisplaydevprint +ffffffff82330750 T wsemuldisplaydevsubmatch +ffffffff823307a0 T wsdisplay_burner +ffffffff82330870 T wsdisplay_burn +ffffffff823308e0 T wsdisplay_cnattach +ffffffff82330a30 T wsdisplaystart +ffffffff82330d10 T wsdisplayparam +ffffffff82330d50 T wsdisplayclose +ffffffff82330ed0 T wsdisplay_kbdholdscr +ffffffff82330f20 T wsdisplay_internal_ioctl +ffffffff82331670 T wsdisplayread +ffffffff823316f0 T wsdisplaywrite +ffffffff82331770 T wsdisplaytty +ffffffff823317e0 T wsdisplayioctl +ffffffff82331980 T wsdisplay_cfg_ioctl +ffffffff82331d00 T wsdisplay_param +ffffffff82331dd0 T wsdisplay_driver_ioctl +ffffffff82331ea0 T wsdisplay_burner_setup +ffffffff82331ff0 T wsdisplay_switch +ffffffff82332280 T wsmoused +ffffffff82332390 T wsdisplaymmap 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wsdisplay_suspend_device +ffffffff82333480 T wsdisplay_resume +ffffffff82333560 T wsdisplay_resume_device +ffffffff82333600 T wsscrollback +ffffffff82333680 T wsdisplay_get_param +ffffffff823337c0 T wsdisplay_set_param +ffffffff823338c0 T wsdisplay_brightness_step +ffffffff82333a50 T wsdisplay_brightness_zero +ffffffff82333b60 T wsdisplay_brightness_cycle +ffffffff82333bd0 T motion_event +ffffffff82333c80 T button_event +ffffffff82333e00 T ctrl_event +ffffffff82334010 T mouse_moverel +ffffffff82334140 T mouse_zaxis +ffffffff823341d0 T mouse_copy_end +ffffffff82334240 T mouse_copy_selection +ffffffff82334380 T mouse_copy_start +ffffffff823344f0 T mouse_copy_word +ffffffff82334820 T mouse_copy_line +ffffffff82334970 T mouse_paste +ffffffff82334a10 T mouse_copy_extend_after +ffffffff82334b10 T mouse_copy_extend +ffffffff82334b90 T inverse_char +ffffffff82334c90 T inverse_region +ffffffff82334d00 T skip_spc_right +ffffffff82334df0 T skip_spc_left +ffffffff82334ec0 T skip_char_right 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wsmux_add_mux +ffffffff82347340 T wsmux_detach_sc_locked +ffffffff82347430 T wsmuxkqfilter +ffffffff82347490 T wsmux_depth +ffffffff82347530 T wsmux_attach_sc +ffffffff823476f0 T wsmux_set_display +ffffffff82347820 T wsmux_get_layout +ffffffff82347850 T wsmux_set_layout +ffffffff82348000 T wsemul_pick +ffffffff82348060 T wsemul_getname +ffffffff82349000 T wsemul_getchar +ffffffff823491b0 T wsemul_local_translate +ffffffff82349480 T wsemul_utf8_translate +ffffffff8234a000 T wsemul_vt100_cnattach +ffffffff8234a1e0 T wsemul_vt100_attach +ffffffff8234a490 T wsemul_vt100_output +ffffffff8234a750 T wsemul_vt100_detach +ffffffff8234a8a0 T wsemul_vt100_resetop +ffffffff8234aa30 T wsemul_vt100_output_esc +ffffffff8234b040 T wsemul_vt100_output_csi +ffffffff8234b160 T wsemul_vt100_output_scs94 +ffffffff8234b210 T wsemul_vt100_output_scs94_percent +ffffffff8234b260 T wsemul_vt100_output_scs96 +ffffffff8234b3b0 T wsemul_vt100_output_scs96_percent +ffffffff8234b400 T wsemul_vt100_output_esc_hash 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wsemul_vt100_translate +ffffffff82351000 T pckbdprobe +ffffffff82351120 T pckbdattach +ffffffff82351300 T pckbdactivate +ffffffff82351380 T pckbd_enable +ffffffff823514d0 T pckbd_set_leds +ffffffff82351560 T pckbd_ioctl +ffffffff823516a0 T pckbd_cngetc +ffffffff82351870 T pckbd_cnpollc +ffffffff82351900 T pckbd_cnbell +ffffffff82351950 T pckbd_set_xtscancode +ffffffff82351ac0 T pckbd_init +ffffffff82351b20 T pckbd_input +ffffffff82351d90 T pckbd_scancode_translate +ffffffff82351e50 T pckbd_bell +ffffffff82351ea0 T pckbd_hookup_bell +ffffffff82351ee0 T pckbd_cnattach +ffffffff82352000 T pmsprobe +ffffffff823520a0 T pmsattach +ffffffff82352270 T pmsactivate +ffffffff823522d0 T pms_enable +ffffffff82352340 T pms_ioctl +ffffffff82352390 T pms_disable +ffffffff823523d0 T pms_sec_enable +ffffffff82352440 T pms_sec_ioctl +ffffffff82352480 T pms_sec_disable +ffffffff823524c0 T pms_ioctl_mouse +ffffffff823525e0 T pms_sync_mouse +ffffffff82352640 T pms_proc_mouse +ffffffff823526e0 T pms_enable_synaptics +ffffffff82352b10 T pms_ioctl_synaptics +ffffffff82352be0 T pms_sync_synaptics +ffffffff82352c40 T pms_proc_synaptics +ffffffff82352f90 T pms_disable_synaptics +ffffffff82353070 T pms_enable_alps +ffffffff82353af0 T pms_ioctl_alps +ffffffff82353ba0 T pms_sync_alps +ffffffff82353c40 T pms_proc_alps +ffffffff82353e90 T pms_enable_elantech_v1 +ffffffff82354090 T pms_ioctl_elantech +ffffffff82354150 T pms_sync_elantech_v1 +ffffffff82354230 T pms_proc_elantech_v1 +ffffffff823543a0 T pms_enable_elantech_v2 +ffffffff82354540 T pms_sync_elantech_v2 +ffffffff82354630 T pms_proc_elantech_v2 +ffffffff82354790 T pms_enable_elantech_v3 +ffffffff82354930 T pms_sync_elantech_v3 +ffffffff823549b0 T pms_proc_elantech_v3 +ffffffff82354b90 T pms_enable_elantech_v4 +ffffffff82354d90 T pms_sync_elantech_v4 +ffffffff82354e60 T pms_proc_elantech_v4 +ffffffff82355190 T pms_enable_intelli +ffffffff82355380 T pms_cmd +ffffffff823553f0 T pms_spec_cmd +ffffffff82355650 T pms_set_scaling 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T nvramread +ffffffff8235d2c0 T nvram_get_byte +ffffffff8235e000 T hid_start_parse +ffffffff8235e070 T hid_end_parse +ffffffff8235e0b0 T hid_get_item +ffffffff8235ec60 T hid_report_size +ffffffff8235eda0 T hid_locate +ffffffff8235ef10 T hid_get_data_sub +ffffffff8235f030 T hid_get_data +ffffffff8235f140 T hid_get_udata +ffffffff8235f250 T hid_is_collection +ffffffff82360000 T hidkbd_attach +ffffffff823600f0 T hidkbd_parse_desc +ffffffff82360450 T hidkbd_delayed_decode +ffffffff82360470 T hidkbd_attach_wskbd +ffffffff823604f0 T hidkbd_detach +ffffffff82360590 T hidkbd_translate +ffffffff823605e0 T hidkbd_apple_translate +ffffffff82360670 T hidkbd_apple_munge +ffffffff823607c0 T hidkbd_apple_tb_munge +ffffffff823609a0 T hidkbd_apple_iso_munge +ffffffff82360bd0 T hidkbd_apple_mba_munge +ffffffff82360d20 T hidkbd_apple_iso_mba_munge +ffffffff82360f50 T hidkbd_input +ffffffff82361040 T hidkbd_decode +ffffffff823613b0 T hidkbd_enable +ffffffff823613f0 T hidkbd_set_leds +ffffffff823614d0 T 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urtw_8187b_update_wmm +ffffffff824363e0 T urtw_8187b_reset +ffffffff824368b0 T urtw_8225v2_b_config_mac +ffffffff82436ab0 T urtw_8225v2_b_init_rfe +ffffffff82436b90 T urtw_8225v2_b_update_chan +ffffffff82436dd0 T urtw_8225v2_b_set_txpwrlvl +ffffffff82438000 T urtwn_match +ffffffff82438070 T urtwn_attach +ffffffff82438370 T urtwn_detach +ffffffff824384b0 T urtwn_task +ffffffff82438570 T urtwn_scan_to +ffffffff824385e0 T urtwn_calib_to +ffffffff824386e0 T urtwn_open_pipes +ffffffff82438970 T urtwn_write_1 +ffffffff824389d0 T urtwn_write_2 +ffffffff82438a30 T urtwn_write_4 +ffffffff82438a90 T urtwn_read_1 +ffffffff82438b00 T urtwn_read_2 +ffffffff82438b70 T urtwn_read_4 +ffffffff82438be0 T urtwn_tx +ffffffff82438fc0 T urtwn_power_on +ffffffff82438ff0 T urtwn_dma_init +ffffffff82439380 T urtwn_fw_loadpage +ffffffff824394d0 T urtwn_load_firmware +ffffffff82439570 T urtwn_aggr_init +ffffffff82439830 T urtwn_mac_init +ffffffff824399c0 T urtwn_bb_init +ffffffff8243a2d0 T urtwn_alloc_buffers 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rsu_close_pipes +ffffffff8243f220 T rsu_free_tx_list +ffffffff8243f350 T rsu_free_rx_list +ffffffff8243f3a0 T rsu_alloc_rx_list +ffffffff8243f450 T rsu_alloc_tx_list +ffffffff8243f540 T rsu_do_async +ffffffff8243f630 T rsu_wait_async +ffffffff8243f650 T rsu_write_region_1 +ffffffff8243f6b0 T rsu_write_1 +ffffffff8243f710 T rsu_write_2 +ffffffff8243f770 T rsu_write_4 +ffffffff8243f7d0 T rsu_read_region_1 +ffffffff8243f830 T rsu_read_1 +ffffffff8243f8a0 T rsu_read_2 +ffffffff8243f910 T rsu_fw_iocmd +ffffffff8243fa00 T rsu_efuse_read_1 +ffffffff8243fb40 T rsu_fw_cmd +ffffffff8243fc50 T rsu_stop +ffffffff8243fd60 T rsu_init +ffffffff82440590 T rsu_calib_cb +ffffffff824406d0 T rsu_newstate_cb +ffffffff824409a0 T rsu_disconnect +ffffffff82440a70 T rsu_site_survey +ffffffff82440c00 T rsu_join_bss +ffffffff82441030 T rsu_set_key +ffffffff82441160 T rsu_set_key_cb +ffffffff82441390 T rsu_delete_key +ffffffff824414b0 T rsu_delete_key_cb +ffffffff824415c0 T rsu_event_survey +ffffffff82441750 T rsu_event_join_bss +ffffffff82441800 T rsu_rx_event +ffffffff824419f0 T rsu_rx_multi_event +ffffffff82441a80 T rsu_get_rssi +ffffffff82441ad0 T rsu_rx_frame +ffffffff82441dc0 T rsu_rx_multi_frame +ffffffff82441ea0 T rsu_rxeof +ffffffff82442090 T rsu_txeof +ffffffff82442140 T rsu_tx +ffffffff82442420 T rsu_power_on_acut +ffffffff82442d90 T rsu_power_on_bcut +ffffffff824437b0 T rsu_power_off +ffffffff82443a30 T rsu_fw_loadsection +ffffffff82443b60 T rsu_load_firmware +ffffffff82445000 T otus_match +ffffffff82445070 T otus_attach +ffffffff82445150 T otus_detach +ffffffff82445220 T otus_task +ffffffff824452e0 T otus_next_scan +ffffffff82445360 T otus_calibrate_to +ffffffff82445430 T otus_open_pipes +ffffffff824457f0 T otus_attachhook +ffffffff82445c40 T otus_close_pipes +ffffffff82445d20 T otus_load_firmware +ffffffff82445e30 T otus_cmd +ffffffff82445fe0 T otus_read_eeprom +ffffffff824460b0 T otus_led_newstate_type3 +ffffffff824461e0 T otus_get_chanlist +ffffffff82446440 T otus_ioctl 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umb_command_done +ffffffff8244f5f0 T umb_decode_cid +ffffffff8244f940 T umb_decode_register_state +ffffffff8244fb80 T umb_decode_devices_caps +ffffffff8244fd20 T umb_decode_subscriber_status +ffffffff8244ff90 T umb_decode_radio_state +ffffffff82450070 T umb_decode_pin +ffffffff824501b0 T umb_decode_packet_service +ffffffff824505a0 T umb_decode_signal_state +ffffffff82450660 T umb_decode_connect_info +ffffffff824507b0 T umb_add_inet_config +ffffffff82450a70 T umb_add_inet6_config +ffffffff82450de0 T umb_decode_ip_configuration +ffffffff82451620 T umb_rxeof +ffffffff82451750 T umb_decap +ffffffff824519f0 T umb_txeof +ffffffff82451a90 T umb_send_encap_command +ffffffff82451b70 T umb_ctrl_msg +ffffffff82451e40 T umb_cmd1 +ffffffff82451f40 T umb_send_connect +ffffffff82452110 T umb_decode_qmi +ffffffff82453000 T uath_match +ffffffff82453070 T uath_attach +ffffffff82453810 T uath_detach +ffffffff82453a10 T uath_attachhook +ffffffff82453af0 T uath_loadfirmware +ffffffff82453e00 T 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athn_usb_free_tx_cmd +ffffffff824589e0 T athn_usb_free_tx_list +ffffffff82458b10 T athn_usb_free_rx_list +ffffffff82458b60 T athn_usb_load_firmware +ffffffff82458d50 T athn_usb_htc_setup +ffffffff82459090 T athn_usb_ioctl +ffffffff82459240 T athn_usb_start +ffffffff824593c0 T athn_usb_watchdog +ffffffff82459440 T athn_usb_node_alloc +ffffffff82459460 T athn_usb_newauth +ffffffff82459630 T athn_usb_newassoc +ffffffff82459760 T athn_usb_node_free +ffffffff82459850 T athn_usb_updateslot +ffffffff82459880 T athn_usb_updateedca +ffffffff82459940 T athn_usb_set_key +ffffffff82459a80 T athn_usb_delete_key +ffffffff82459bd0 T athn_usb_newstate +ffffffff82459cd0 T athn_usb_media_change +ffffffff82459d50 T athn_usb_next_scan +ffffffff82459df0 T athn_usb_rx_enable +ffffffff82459e60 T athn_usb_intr +ffffffff82459ff0 T athn_usb_alloc_rx_list +ffffffff8245a0a0 T athn_usb_alloc_tx_list +ffffffff8245a190 T athn_usb_do_async +ffffffff8245a2b0 T athn_usb_htc_msg +ffffffff8245a340 T athn_usb_htc_connect_svc +ffffffff8245a510 T athn_usb_wmi_xcmd +ffffffff8245a730 T athn_usb_read_rom +ffffffff8245a890 T athn_usb_stop +ffffffff8245aba0 T athn_usb_init +ffffffff8245aff0 T athn_usb_newstate_cb +ffffffff8245b2e0 T athn_usb_remove_node +ffffffff8245b3d0 T athn_usb_switch_chan +ffffffff8245b5b0 T athn_usb_create_node +ffffffff8245b820 T athn_usb_newassoc_cb +ffffffff8245b9b0 T athn_usb_node_set_rates +ffffffff8245bae0 T athn_usb_count_active_sta +ffffffff8245bb30 T athn_usb_newauth_cb +ffffffff8245bc10 T athn_usb_node_free_cb +ffffffff8245bcd0 T athn_usb_ampdu_tx_start +ffffffff8245bdd0 T athn_usb_ampdu_tx_start_cb +ffffffff8245be30 T athn_usb_ampdu_tx_stop +ffffffff8245bf10 T athn_usb_ampdu_tx_stop_cb +ffffffff8245bf70 T athn_usb_clean_nodes +ffffffff8245c030 T athn_usb_updateedca_cb +ffffffff8245c070 T athn_usb_updateslot_cb +ffffffff8245c0b0 T athn_usb_set_key_cb +ffffffff8245c170 T athn_usb_delete_key_cb +ffffffff8245c1d0 T athn_usb_bcneof +ffffffff8245c230 T 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uberry_pearlmode +ffffffff82460000 T upd_match +ffffffff82460140 T upd_attach +ffffffff824603c0 T upd_detach +ffffffff824604a0 T upd_lookup_usage_entry +ffffffff82460560 T upd_intr +ffffffff82460590 T upd_attach_sensor_tree +ffffffff82460850 T upd_refresh +ffffffff82460970 T upd_request_children +ffffffff82460a90 T upd_update_report_cb +ffffffff82460bb0 T upd_lookup_sensor +ffffffff82460c20 T upd_sensor_invalidate +ffffffff82460ca0 T upd_sensor_update +ffffffff82461000 T uwacom_match +ffffffff824610b0 T uwacom_attach +ffffffff824612b0 T uwacom_detach +ffffffff824612c0 T uwacom_enable +ffffffff82461320 T uwacom_ioctl +ffffffff824613c0 T uwacom_disable +ffffffff824613f0 T uwacom_intr +ffffffff82462000 T bwfm_usb_preinit +ffffffff82462500 T bwfm_usb_txcheck +ffffffff82462540 T bwfm_usb_txdata +ffffffff82462680 T bwfm_usb_txctl +ffffffff82462830 T bwfm_usb_match +ffffffff824628a0 T bwfm_usb_attach +ffffffff82462a30 T bwfm_usb_detach +ffffffff82462b10 T bwfm_usb_dl_cmd +ffffffff82462bb0 T bwfm_usb_load_microcode +ffffffff82462f20 T bwfm_usb_alloc_rx_list +ffffffff82463010 T bwfm_usb_alloc_tx_list +ffffffff82463130 T bwfm_usb_rxeof +ffffffff824632e0 T bwfm_usb_free_rx_list +ffffffff82463350 T bwfm_usb_free_tx_list +ffffffff824633c0 T bwfm_usb_newbuf +ffffffff82463440 T bwfm_usb_txeof +ffffffff82463550 T bwfm_usb_txctl_cb +ffffffff82464000 T umstc_match +ffffffff824640b0 T umstc_attach +ffffffff824641b0 T umstc_detach +ffffffff82464200 T umstc_intr +ffffffff82464340 T umstc_brightness_task +ffffffff82465000 T uhidpp_match +ffffffff824650d0 T uhidpp_attach +ffffffff82465440 T uhidpp_detach +ffffffff82465680 T uhidpp_intr +ffffffff824657b0 T uhidpp_task +ffffffff82465850 T hidpp10_get_type +ffffffff82465940 T hidpp10_get_name +ffffffff82465a30 T hidpp10_enable_notifications +ffffffff82465a90 T uhidpp_is_notification +ffffffff82465b10 T uhidpp_claim_notification +ffffffff82465c30 T uhidpp_refresh +ffffffff82465d00 T uhidpp_device_refresh +ffffffff82465db0 T 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acpidmar_parse_devscope +ffffffff824c3410 T acpidmar_drhd +ffffffff824c35e0 T acpidmar_rmrr +ffffffff824c3890 T acpidmar_atsr +ffffffff824c3a20 T acpidmar_init +ffffffff824c3e70 T acpiivhd_intr +ffffffff824c3f50 T ivhd_poll_events +ffffffff824c4010 T ivhd_intr_map +ffffffff824c40c0 T _dumppte +ffffffff824c4230 T ivhd_showpage +ffffffff824c4360 T ivhd_show_event +ffffffff824c4c30 T ivhd_showdte +ffffffff824c4d10 T ivhd_showcmd +ffffffff824c4dc0 T _ivhd_issue_command +ffffffff824c4ea0 T ivhd_issue_command +ffffffff824c5170 T ivhd_invalidate_iommu_all +ffffffff824c5260 T ivhd_invalidate_interrupt_table +ffffffff824c5350 T ivhd_showreg +ffffffff824c5480 T ivhd_checkerr +ffffffff824c56c0 T ivhd_iommu_init +ffffffff824c5b90 T acpiivrs_ivhd +ffffffff824c5c00 T acpiivrs_init +ffffffff824c5d30 T acpidmar_msi_hwmask +ffffffff824c5da0 T acpidmar_msi_hwunmask +ffffffff824c5e10 T acpidmar_msi_addroute +ffffffff824c5ec0 T acpidmar_msi_delroute +ffffffff824c5ee0 T iommu_showfault +ffffffff824c60a0 T iommu_showpte +ffffffff824c7000 T acpidock_match +ffffffff824c7070 T acpidock_attach +ffffffff824c7390 T acpidock_status +ffffffff824c7410 T acpidock_docklock +ffffffff824c74e0 T acpidock_dockctl +ffffffff824c75b0 T acpidock_foundejd +ffffffff824c7660 T acpidock_notify +ffffffff824c7b50 T acpidock_eject +ffffffff824c7c40 T acpidock_walkchildren +ffffffff824c8000 T abl_match +ffffffff824c8020 T abl_attach +ffffffff824c8200 T abl_get_brightness +ffffffff824c8280 T abl_get_param +ffffffff824c82e0 T abl_set_param +ffffffff824c83a0 T abl_set_brightness +ffffffff824c9000 T asmc_match +ffffffff824c9050 T asmc_attach +ffffffff824c95c0 T asmc_activate +ffffffff824c9650 T asmc_try +ffffffff824c9a30 T asmc_get_backlight +ffffffff824c9aa0 T asmc_set_backlight +ffffffff824c9b30 T asmc_backlight +ffffffff824c9bc0 T asmc_init +ffffffff824c9dc0 T asmc_update +ffffffff824c9f70 T asmc_detach +ffffffff824ca130 t asmc_temp +ffffffff824ca2b0 t asmc_fan +ffffffff824ca480 t asmc_light +ffffffff824cb000 T acpiasus_match +ffffffff824cb020 T acpiasus_attach +ffffffff824cb140 T acpiasus_activate +ffffffff824cb2d0 T acpiasus_init +ffffffff824cb3b0 T acpiasus_notify +ffffffff824cc000 T thinkpad_match +ffffffff824cc0a0 T thinkpad_attach +ffffffff824cc2b0 T thinkpad_activate +ffffffff824cc420 T thinkpad_sensor_attach +ffffffff824cc5c0 T thinkpad_sensor_refresh +ffffffff824cc6e0 T thinkpad_get_volume_mute +ffffffff824cc750 T thinkpad_attach_deferred +ffffffff824cc770 T thinkpad_enable_events +ffffffff824cc940 T thinkpad_get_kbd_backlight +ffffffff824cc9d0 T thinkpad_set_kbd_backlight +ffffffff824ccaa0 T thinkpad_get_param +ffffffff824ccb00 T thinkpad_set_param +ffffffff824ccbb0 T thinkpad_hotkey +ffffffff824cd1e0 T thinkpad_brightness_up +ffffffff824cd380 T thinkpad_brightness_down +ffffffff824cd530 T thinkpad_toggle_bluetooth +ffffffff824cd640 T thinkpad_volume_mute +ffffffff824cd6f0 T thinkpad_volume_down +ffffffff824cd7a0 T thinkpad_volume_up +ffffffff824cd850 T thinkpad_get_thinklight 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acpisony_match +ffffffff824d0070 T acpisony_attach +ffffffff824d00d0 T acpisony_activate +ffffffff824d0110 T acpisony_notify_setup +ffffffff824d0300 T acpisony_notify +ffffffff824d06a0 T acpisony_find_offset +ffffffff824d07b0 T acpisony_set_hotkey +ffffffff824d09a0 T acpisony_brightness_down +ffffffff824d0ab0 T acpisony_get_brightness +ffffffff824d0b30 T acpisony_set_brightness +ffffffff824d1000 T acpivideo_match +ffffffff824d1070 T acpivideo_attach +ffffffff824d11d0 T acpivideo_getpcibus +ffffffff824d1210 T acpivideo_notify +ffffffff824d1270 T acpivideo_set_policy +ffffffff824d1330 T acpi_foundvout +ffffffff824d1400 T acpivideo_print +ffffffff824d2000 T acpivout_match +ffffffff824d2070 T acpivout_attach +ffffffff824d21c0 T acpivout_notify +ffffffff824d2270 T acpivout_get_bcl +ffffffff824d2390 T acpivout_get_brightness +ffffffff824d2430 T acpivout_get_param +ffffffff824d24e0 T acpivout_set_param +ffffffff824d2650 T acpivout_select_brightness +ffffffff824d2720 T acpivout_find_brightness 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aplgpio_intr_disable +ffffffff824d6000 T bytgpio_match +ffffffff824d6060 T bytgpio_attach +ffffffff824d6310 T bytgpio_intr +ffffffff824d6430 T bytgpio_read_pin +ffffffff824d6490 T bytgpio_write_pin +ffffffff824d6510 T bytgpio_intr_establish +ffffffff824d6580 T bytgpio_intr_enable +ffffffff824d6660 T bytgpio_intr_disable +ffffffff824d7000 T chvgpio_match +ffffffff824d7060 T chvgpio_attach +ffffffff824d7300 T chvgpio_intr +ffffffff824d73d0 T chvgpio_read_pin +ffffffff824d7470 T chvgpio_write_pin +ffffffff824d7530 T chvgpio_intr_establish +ffffffff824d7700 T chvgpio_intr_enable +ffffffff824d77c0 T chvgpio_intr_disable +ffffffff824d7880 T chvgpio_opreg_handler +ffffffff824d7900 T chvgpio_check_pin +ffffffff824d8000 T glkgpio_match +ffffffff824d8060 T glkgpio_attach +ffffffff824d8300 T glkgpio_intr +ffffffff824d8430 T glkgpio_read_pin +ffffffff824d8480 T glkgpio_write_pin +ffffffff824d84f0 T glkgpio_intr_establish +ffffffff824d8610 T glkgpio_intr_enable +ffffffff824d86a0 T glkgpio_intr_disable +ffffffff824d9000 T pchgpio_match +ffffffff824d9060 T pchgpio_attach +ffffffff824d94b0 T pchgpio_activate +ffffffff824d9560 T pchgpio_intr +ffffffff824d9780 T pchgpio_read_pin +ffffffff824d9870 T pchgpio_write_pin +ffffffff824d9980 T pchgpio_intr_establish +ffffffff824d9bb0 T pchgpio_intr_enable +ffffffff824d9cf0 T pchgpio_intr_disable +ffffffff824d9e30 T pchgpio_save +ffffffff824d9ea0 T pchgpio_restore +ffffffff824d9f10 T pchgpio_find_group +ffffffff824d9f90 T pchgpio_intr_handle +ffffffff824da070 T pchgpio_save_pin +ffffffff824da230 T pchgpio_restore_pin +ffffffff824db000 T tipmic_match +ffffffff824db050 T tipmic_attach +ffffffff824db250 T tipmic_write_1 +ffffffff824db310 T tipmic_intr +ffffffff824db470 T tipmic_get_lpat +ffffffff824db5a0 T tipmic_read_pin +ffffffff824db5d0 T tipmic_write_pin +ffffffff824db600 T tipmic_thermal_opreg_handler +ffffffff824dbe00 T tipmic_power_opreg_handler +ffffffff824dc0a0 T tipmic_read_1 +ffffffff824dc160 T tipmic_raw_to_temp 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dwiic_acpi_match +ffffffff824e0050 T dwiic_acpi_attach +ffffffff824e03b0 T dwiic_acpi_parse_crs +ffffffff824e04e0 T dwiic_acpi_power +ffffffff824e05e0 T dwiic_acpi_get_params +ffffffff824e0710 T dwiic_i2c_intr_establish +ffffffff824e0790 T dwiic_i2c_intr_disestablish +ffffffff824e07a0 T dwiic_i2c_intr_string +ffffffff824e0830 T dwiic_acpi_bus_scan +ffffffff824e0860 T dwiic_acpi_found_hid +ffffffff824e0b80 T dwiic_matchhids +ffffffff824e0c10 T dwiic_acpi_found_ihidev +ffffffff824e0e90 T dwiic_acpi_found_iatp +ffffffff824e1000 T acpicbkbd_match +ffffffff824e1020 T acpicbkbd_attach +ffffffff824e10b0 T acpicbkbd_activate +ffffffff824e1100 T acpicbkbd_get_backlight +ffffffff824e1170 T acpicbkbd_set_backlight +ffffffff824e1210 T acpicbkbd_write_backlight +ffffffff824e2000 T acpials_match +ffffffff824e2080 T acpials_attach +ffffffff824e2210 T acpials_read +ffffffff824e2290 T acpials_addtask +ffffffff824e22d0 T acpials_notify +ffffffff824e2350 T acpials_update +ffffffff824e3000 T tpm_match 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acpisbs_refresh_sensors +ffffffff824e66c0 T acpisbs_notify +ffffffff824e67f0 T acpi_smbus_read +ffffffff824e7000 T surface_match +ffffffff824e7050 T surface_attach +ffffffff824e70b0 T surface_hotkey +ffffffff824e8000 T ipmi_acpi_match +ffffffff824e8020 T ipmi_acpi_attach +ffffffff824e8240 T ipmi_acpi_parse_crs +ffffffff824e9000 T amdgpio_match +ffffffff824e9060 T amdgpio_attach +ffffffff824e9290 T amdgpio_activate +ffffffff824e9380 T amdgpio_intr +ffffffff824e9520 T amdgpio_read_pin +ffffffff824e9570 T amdgpio_write_pin +ffffffff824e95e0 T amdgpio_intr_establish +ffffffff824e96d0 T amdgpio_intr_enable +ffffffff824e9750 T amdgpio_intr_disable +ffffffff824e97d0 T amdgpio_save +ffffffff824e9850 T amdgpio_restore +ffffffff824e98e0 T amdgpio_save_pin +ffffffff824e9950 T amdgpio_restore_pin +ffffffff824e99c0 T amdgpio_pin_intr +ffffffff824ea000 T acpihid_match +ffffffff824ea020 T acpihid_attach +ffffffff824ea200 T acpihid_init_dsm +ffffffff824ea360 T acpihid_eval +ffffffff824ea580 T acpihid_notify +ffffffff824ea5e0 T acpihid_button_array_enable +ffffffff824eb000 T acpi_match +ffffffff824eb060 T acpi_attach +ffffffff824eb0a0 T acpi_probe +ffffffff824eb240 T acpi_map +ffffffff824eb330 T acpi_unmap +ffffffff824eb370 T acpi_bus_space_map +ffffffff824eb390 T acpi_bus_space_unmap +ffffffff824eb3a0 T acpi_intr_establish +ffffffff824eb4e0 T acpi_intr_disestablish +ffffffff824eb4f0 T acpi_scan +ffffffff824eb6a0 T acpi_acquire_glk +ffffffff824eb700 T acpi_release_glk +ffffffff824eb750 T acpi_attach_machdep +ffffffff824eb8e0 T acpi_sleep_cpu +ffffffff824eba80 T acpi_resume_cpu +ffffffff824ebb70 T sleep_mp +ffffffff824ebc70 T resume_mp +ffffffff824ebd60 T acpi_iommu_device_map +ffffffff824ec000 T hibernate_resume_machdep +ffffffff824ec050 T hibernate_drop_to_real_mode +ffffffff824ec060 T hibernate_activate_resume_pt_machdep +ffffffff824ec0a0 T hibernate_switch_stack_machdep +ffffffff824ec0e0 T hibernate_flush +ffffffff824ec110 T acpi_savecpu +ffffffff824ed000 T sleep_showstate +ffffffff824ed100 T sleep_setstate +ffffffff824ed160 T gosleep +ffffffff824ed220 T sleep_abort +ffffffff824ed250 T sleep_resume +ffffffff824ed2c0 T suspend_finish +ffffffff824ee000 T acpipci_match +ffffffff824ee020 T acpipci_attach +ffffffff824ee2e0 T acpipci_osc +ffffffff824ee420 T acpipci_parse_resources +ffffffff824ee530 T acpipci_attach_bus +ffffffff824ee700 T acpipci_print +ffffffff824ee760 T acpipci_attach_busses +ffffffff824ef000 T efi_match +ffffffff824ef060 T efi_attach +ffffffff824ef400 T efi_map_runtime +ffffffff824ef580 T efi_enter +ffffffff824ef600 T efi_leave +ffffffff824ef660 T efi_gettime +ffffffff824ef830 T efi_settime +ffffffff824ef990 T efi_fault +ffffffff824f0000 T vmm_probe +ffffffff824f0050 T vmm_attach +ffffffff824f03c0 T vmm_activate +ffffffff824f05d0 T vmm_enabled +ffffffff824f0660 T vmm_quiesce_vmx +ffffffff824f0830 T vmm_stop +ffffffff824f0970 T vmm_start +ffffffff824f0a50 T vmmopen +ffffffff824f0aa0 T vmmioctl +ffffffff824f0eb0 T vm_create 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+ffffffff824f40b0 T vm_impl_init_svm +ffffffff824f41d0 T vm_impl_deinit_vmx +ffffffff824f4200 T vm_impl_deinit_svm +ffffffff824f4230 T vm_impl_deinit +ffffffff824f4290 T vcpu_reload_vmcs_vmx +ffffffff824f43c0 T vcpu_reset_regs_svm +ffffffff824f4760 T svm_setmsrbrw +ffffffff824f48d0 T svm_setmsrbr +ffffffff824f49a0 T vmm_alloc_vpid +ffffffff824f4ab0 T svm_setmsrbw +ffffffff824f4b80 T vmx_setmsrbr +ffffffff824f4c30 T vmx_setmsrbw +ffffffff824f4ce0 T vmx_setmsrbrw +ffffffff824f4de0 T svm_set_clean +ffffffff824f4e30 T svm_set_dirty +ffffffff824f4e80 T vcpu_reset_regs_vmx +ffffffff824f59d0 T vcpu_vmx_check_cap +ffffffff824f5ad0 T vcpu_vmx_compute_ctrl +ffffffff824f5cb0 T vcpu_init_vmx +ffffffff824f6050 T vcpu_deinit_vmx +ffffffff824f61d0 T vcpu_init_svm +ffffffff824f6350 T vcpu_deinit_svm +ffffffff824f6490 T vmm_free_vpid +ffffffff824f64f0 T vcpu_deinit +ffffffff824f6540 T vcpu_run_vmx +ffffffff824f6d30 T vcpu_run_svm +ffffffff824f72d0 T vcpu_must_stop +ffffffff824f7330 T vmm_fpurestore +ffffffff824f7400 T vmm_fpusave +ffffffff824f7480 T vmm_translate_gva +ffffffff824f77b0 T vmm_update_pvclock +ffffffff824f78b0 T vmx_get_exit_info +ffffffff824f7910 T vmx_handle_exit +ffffffff824f7d00 T vmx_instruction_error_decode +ffffffff824f7ed0 T vmm_get_guest_cpu_cpl +ffffffff824f7f80 T vmx_handle_intr +ffffffff824f8010 T svm_handle_hlt +ffffffff824f8060 T vmx_handle_hlt +ffffffff824f8110 T svm_handle_exit +ffffffff824f83e0 T svm_handle_np_fault +ffffffff824f8580 T vmm_handle_cpuid +ffffffff824f8bd0 T svm_handle_msr +ffffffff824f8e80 T svm_handle_xsetbv +ffffffff824f8ed0 T svm_handle_inout +ffffffff824f8fe0 T vmm_inject_ud +ffffffff824f9010 T vmm_inject_db +ffffffff824f9040 T vmx_handle_np_fault +ffffffff824f91b0 T vmx_handle_inout +ffffffff824f9350 T vmx_handle_cr +ffffffff824f95c0 T vmx_handle_rdmsr +ffffffff824f9690 T vmx_handle_wrmsr +ffffffff824f98e0 T vmx_handle_xsetbv +ffffffff824f9970 T vmm_inject_gp +ffffffff824f99a0 T vmx_get_exit_qualification +ffffffff824f9a00 T vmx_get_guest_faulttype +ffffffff824f9aa0 T svm_get_guest_faulttype +ffffffff824f9ad0 T svm_fault_page +ffffffff824f9b50 T vmx_fault_page +ffffffff824f9cb0 T vmm_get_guest_cpu_mode +ffffffff824f9db0 T vmx_load_pdptes +ffffffff824fa030 T vmx_handle_cr0_write +ffffffff824fa230 T vmx_handle_cr4_write +ffffffff824fa2d0 T vmm_handle_xsetbv +ffffffff824fa3b0 T vmx_handle_misc_enable_msr +ffffffff824fa410 T vmm_pat_is_valid +ffffffff824fa4f0 T vmm_gpa_is_valid +ffffffff824fa560 T vmx_exit_reason_decode +ffffffff824fa5a0 T svm_exit_reason_decode +ffffffff824fb3b0 T vcpu_state_decode +ffffffff824fc000 T vmm_dispatch_intr +ffffffff824fc019 T vmxon +ffffffff824fc049 T vmxoff +ffffffff824fc079 T vmclear +ffffffff824fc0a9 T vmptrld +ffffffff824fc0d9 T vmptrst +ffffffff824fc109 T vmwrite +ffffffff824fc139 T vmread +ffffffff824fc169 T invvpid +ffffffff824fc199 T invept +ffffffff824fc1c9 T vmx_enter_guest +ffffffff824fc1f0 t skip_init +ffffffff824fc2bd t no_l1df_msr +ffffffff824fc2c0 t l1df_tlb_loop +ffffffff824fc2d9 t l1df_tlb_done +ffffffff824fc2e1 t l1df_load_cache +ffffffff824fc2f8 t done_flush +ffffffff824fc38b t do_resume +ffffffff824fc410 t fail_launch_or_resume +ffffffff824fc44d t fail_launch_unknown +ffffffff824fc45a t fail_launch_invalid_vmcs +ffffffff824fc467 t fail_launch_valid_vmcs +ffffffff824fc484 t vmx_exit_handler_asm +ffffffff824fc549 t restore_host +ffffffff824fc5e9 T svm_enter_guest +ffffffff824fc775 t restore_host_svm +ffffffff824fd000 T sdmmc_match +ffffffff824fd050 T sdmmc_attach +ffffffff824fd380 T sdmmc_detach +ffffffff824fd430 T sdmmc_activate +ffffffff824fd500 T sdmmc_discover_task +ffffffff824fd5c0 T sdmmc_create_thread +ffffffff824fd630 T sdmmc_holds_root_device +ffffffff824fd680 T sdmmc_task_thread +ffffffff824fd870 T sdmmc_needs_discover +ffffffff824fd920 T sdmmc_del_task +ffffffff824fd9d0 T sdmmc_card_detach +ffffffff824fdab0 T sdmmc_add_task +ffffffff824fdb30 T sdmmc_card_attach +ffffffff824fdc40 T sdmmc_enable +ffffffff824fdd90 T sdmmc_scan +ffffffff824fde10 T sdmmc_init +ffffffff824fdf10 T sdmmc_disable +ffffffff824fe070 T sdmmc_function_free +ffffffff824fe090 T sdmmc_delay +ffffffff824fe0e0 T sdmmc_select_card +ffffffff824fe260 T sdmmc_set_bus_power +ffffffff824fe420 T sdmmc_function_alloc +ffffffff824fe4a0 T sdmmc_app_command +ffffffff824fe630 T sdmmc_mmc_command +ffffffff824fe6b0 T sdmmc_go_idle_state +ffffffff824fe7c0 T sdmmc_send_if_cond +ffffffff824fe910 T sdmmc_set_relative_addr +ffffffff824ff000 T sdmmc_cisptr +ffffffff824ff0a0 T sdmmc_read_cis +ffffffff824ff3a0 T sdmmc_print_cis +ffffffff824ff510 T sdmmc_check_cis_quirks +ffffffff82500000 T sdmmc_io_enable +ffffffff825002a0 T sdmmc_io_reset +ffffffff825003c0 T sdmmc_io_send_op_cond +ffffffff82500530 T sdmmc_io_scan +ffffffff82500680 T sdmmc_io_init +ffffffff825007a0 T sdmmc_io_set_highspeed +ffffffff82500a40 T sdmmc_io_set_bus_width +ffffffff82500cd0 T sdmmc_io_function_ready +ffffffff82500e40 T sdmmc_io_read_1 +ffffffff82500f90 T sdmmc_io_function_enable +ffffffff82501360 T sdmmc_io_write_1 +ffffffff825014e0 T sdmmc_io_function_disable +ffffffff82501760 T sdmmc_io_attach +ffffffff82501840 T sdmmc_print +ffffffff82501a90 T sdmmc_submatch +ffffffff82501b10 T sdmmc_io_detach +ffffffff82501bb0 T sdmmc_io_rw_direct +ffffffff82501d50 T sdmmc_io_rw_extended_subr +ffffffff82501ef0 T sdmmc_io_rw_extended +ffffffff825022e0 T sdmmc_io_read_2 +ffffffff82502430 T sdmmc_io_write_2 +ffffffff82502590 T sdmmc_io_read_4 +ffffffff825026e0 T sdmmc_io_write_4 +ffffffff82502840 T sdmmc_io_read_multi_1 +ffffffff82502930 T sdmmc_io_write_multi_1 +ffffffff82502a20 T sdmmc_io_read_region_1 +ffffffff82502b10 T sdmmc_io_write_region_1 +ffffffff82502c00 T sdmmc_io_xchg +ffffffff82502d90 T sdmmc_intr_enable +ffffffff82503000 T sdmmc_intr_disable +ffffffff82503270 T sdmmc_intr_establish +ffffffff82503370 T sdmmc_intr_disestablish +ffffffff82503450 T sdmmc_card_intr +ffffffff825034a0 T sdmmc_intr_task +ffffffff82503530 T sdmmc_io_set_blocklen +ffffffff82504000 T sdmmc_mem_enable +ffffffff825044e0 T sdmmc_mem_send_op_cond +ffffffff82504690 T sdmmc_mem_signal_voltage +ffffffff82504750 T sdmmc_mem_scan +ffffffff82504a50 T sdmmc_decode_csd +ffffffff82504e50 T sdmmc_decode_cid +ffffffff82505290 T sdmmc_mem_send_scr +ffffffff825053d0 T sdmmc_mem_decode_scr +ffffffff82505440 T sdmmc_mem_send_cxd_data +ffffffff825055b0 T sdmmc_mem_set_bus_width +ffffffff825056c0 T sdmmc_mem_sd_switch +ffffffff82505970 T sdmmc_be512_to_bitfield512 +ffffffff82505a20 T sdmmc_mem_mmc_switch +ffffffff82505b10 T sdmmc_mem_init +ffffffff82505c60 T sdmmc_mem_set_blocklen +ffffffff82505d60 T sdmmc_mem_sd_init +ffffffff82506310 T sdmmc_mem_mmc_init +ffffffff82506c30 T sdmmc_mem_select_transfer_mode +ffffffff82506cb0 T sdmmc_mem_execute_tuning +ffffffff82506d40 T sdmmc_mem_read_block_subr +ffffffff825070a0 T sdmmc_mem_single_read_block +ffffffff82507160 T sdmmc_mem_read_block +ffffffff82507320 T sdmmc_mem_write_block_subr +ffffffff82507670 T sdmmc_mem_single_write_block +ffffffff82507730 T sdmmc_mem_write_block +ffffffff825078f0 T sdmmc_mem_hibernate_write +ffffffff82508000 T sdmmc_scsi_cmd +ffffffff825081f0 T sdmmc_minphys +ffffffff82508260 T sdmmc_scsi_attach +ffffffff82508450 T sdmmc_alloc_ccbs +ffffffff82508590 T sdmmc_free_ccbs +ffffffff825085f0 T sdmmc_scsi_detach +ffffffff82508740 T sdmmc_stimeout +ffffffff825087c0 T sdmmc_ccb_alloc +ffffffff82508870 T sdmmc_ccb_free +ffffffff82508950 T sdmmc_inquiry +ffffffff82508b70 T sdmmc_start_xs +ffffffff82508c60 T sdmmc_complete_xs +ffffffff82508d20 T sdmmc_done_xs +ffffffff82508d60 T sdmmc_scsi_hibernate_io +ffffffff82509000 T bwfm_sdio_preinit +ffffffff825094f0 T bwfm_sdio_txcheck +ffffffff82509530 T bwfm_sdio_txdata +ffffffff825095a0 T bwfm_sdio_txctl +ffffffff825096f0 T bwfm_sdio_buscore_read +ffffffff82509700 T bwfm_sdio_buscore_write +ffffffff82509710 T bwfm_sdio_buscore_prepare +ffffffff82509840 T bwfm_sdio_buscore_activate +ffffffff825098c0 T bwfm_sdio_match +ffffffff82509980 T bwfm_sdio_attach +ffffffff82509c40 T bwfm_sdio_detach +ffffffff82509ca0 T bwfm_sdio_task +ffffffff82509df0 T bwfm_sdio_write_1 +ffffffff82509e20 T bwfm_sdio_read_1 +ffffffff82509e50 T bwfm_sdio_write_4 +ffffffff82509f00 T bwfm_sdio_read_4 +ffffffff82509fa0 T bwfm_sdio_load_microcode +ffffffff8250a200 T bwfm_sdio_clkctl +ffffffff8250a330 T bwfm_sdio_dev_write +ffffffff8250a370 T bwfm_sdio_intr +ffffffff8250a3b0 T bwfm_sdio_ram_read_write +ffffffff8250a5e0 T bwfm_sdio_htclk +ffffffff8250a840 T bwfm_sdio_readshared +ffffffff8250a900 T bwfm_sdio_dev_read +ffffffff8250a930 T bwfm_sdio_rx_frames +ffffffff8250acc0 T bwfm_sdio_tx_frames +ffffffff8250ada0 T bwfm_sdio_backplane +ffffffff8250ae50 T bwfm_sdio_buf_read +ffffffff8250af20 T bwfm_sdio_buf_write +ffffffff8250afd0 T bwfm_sdio_frame_read_write +ffffffff8250b150 T bwfm_sdio_newbuf +ffffffff8250b1d0 T bwfm_sdio_tx_ok +ffffffff8250b220 T bwfm_sdio_tx_ctrlframe +ffffffff8250b320 T bwfm_sdio_tx_dataframe +ffffffff8250b470 T bwfm_sdio_rx_glom +ffffffff8250c000 T onewire_match +ffffffff8250c050 T onewire_attach +ffffffff8250c0f0 T onewire_detach +ffffffff8250c160 T onewire_activate +ffffffff8250c180 T onewire_scan +ffffffff8250c390 T onewire_createthread +ffffffff8250c3f0 T onewire_print +ffffffff8250c4c0 T onewirebus_print +ffffffff8250c510 T onewire_lock +ffffffff8250c530 T onewire_unlock +ffffffff8250c540 T onewire_reset +ffffffff8250c560 T onewire_bit +ffffffff8250c580 T onewire_read_byte +ffffffff8250c6c0 T onewire_write_byte +ffffffff8250c790 T onewire_read_block +ffffffff8250c830 T onewire_write_block +ffffffff8250c8d0 T onewire_triplet +ffffffff8250c9b0 T onewire_matchrom +ffffffff8250cb00 T onewire_search +ffffffff8250ce90 T onewire_thread +ffffffff8250d000 T onewire_crc +ffffffff8250d0e0 T onewire_crc16 +ffffffff8250d1c0 T onewire_famname +ffffffff8250d200 T onewire_matchbyfam +ffffffff8250e000 T owid_match +ffffffff8250e020 T owid_attach +ffffffff8250e0f0 T owid_detach +ffffffff8250e130 T owid_activate +ffffffff8250f000 T owsbm_match +ffffffff8250f020 T owsbm_attach +ffffffff8250f1c0 T owsbm_detach +ffffffff8250f230 T owsbm_activate +ffffffff8250f260 T owsbm_update +ffffffff82510000 T owtemp_match +ffffffff82510020 T owtemp_attach +ffffffff82510110 T owtemp_detach +ffffffff82510180 T owtemp_activate +ffffffff825101b0 T owtemp_update +ffffffff82511000 T owctr_match +ffffffff82511020 T owctr_attach +ffffffff82511160 T owctr_detach +ffffffff825111d0 T owctr_activate +ffffffff82511200 T owctr_update +ffffffff82511230 T owctr_update_counter +ffffffff82512000 A __text_page_start +ffffffff82512000 T Xsyscall_meltdown +ffffffff8251200c T Xsyscall +ffffffff8251225e t Xsyscall_trampback +ffffffff82512270 T intr_user_exit +ffffffff825122b2 t intr_user_exit_post_ast +ffffffff825123ce t Xiretq_trampback +ffffffff825123da T doreti_iret +ffffffff82513000 T alltraps +ffffffff82513138 T recall_trap +ffffffff82513150 T alltraps_kern +ffffffff82513153 T alltraps_kern_meltdown +ffffffff82514000 ? Xsyscall32 +ffffffff82514000 A __kutext_start +ffffffff82514000 A __text_page_end +ffffffff82515000 ? Xtrap00 +ffffffff82515010 ? Xtrap01 +ffffffff82515020 ? Xtrap02 +ffffffff82515024 c calltrap_specstk +ffffffff825150f0 ? calltrap_specstk_tramp +ffffffff82515110 ? Xtrap03 +ffffffff82515120 ? Xtrap04 +ffffffff82515130 ? Xtrap05 +ffffffff82515140 ? Xtrap06 +ffffffff82515150 ? Xtrap07 +ffffffff82515160 ? Xtrap08 +ffffffff82515170 ? Xtrap09 +ffffffff82515180 ? Xtrap0a +ffffffff82515190 ? Xtrap0b +ffffffff825151a0 ? Xtrap0c +ffffffff825151b0 ? Xtrap0d +ffffffff82515230 ? Xtrap0e +ffffffff82515240 ? Xintrspurious +ffffffff82515240 ? Xtrap0f +ffffffff82515250 ? Xtrap10 +ffffffff82515260 ? Xtrap11 +ffffffff82515270 ? Xtrap12 +ffffffff82515280 ? Xtrap13 +ffffffff82515290 ? Xtrap14 +ffffffff82515290 ? Xtrap15 +ffffffff82515290 ? Xtrap16 +ffffffff82515290 ? Xtrap17 +ffffffff82515290 ? Xtrap18 +ffffffff82515290 ? Xtrap19 +ffffffff82515290 ? Xtrap1a +ffffffff82515290 ? Xtrap1b +ffffffff82515290 ? Xtrap1c +ffffffff82515290 ? Xtrap1d +ffffffff82515290 ? Xtrap1e +ffffffff82515290 ? Xtrap1f +ffffffff825152a0 ? x2apic_eoi +ffffffff825152c0 ? Xintr_lapic_ipi +ffffffff825152f0 ? Xipi_invltlb +ffffffff82515310 ? Xipi_invlpg +ffffffff82515340 ? Xipi_invlrange +ffffffff82515380 ? Xipi_invltlb_pcid +ffffffff825153c0 ? Xipi_invlpg_pcid +ffffffff82515410 ? Xipi_invlrange_pcid +ffffffff82515480 ? Xintr_lapic_ltimer +ffffffff825154b0 ? Xintr_xen_upcall +ffffffff825154e0 ? Xintr_hyperv_upcall +ffffffff82515510 ? Xintr_legacy0 +ffffffff82515540 ? Xintr_legacy1 +ffffffff82515570 ? Xintr_legacy2 +ffffffff825155a0 ? Xintr_legacy3 +ffffffff825155d0 ? Xintr_legacy4 +ffffffff82515600 ? Xintr_legacy5 +ffffffff82515630 ? Xintr_legacy6 +ffffffff82515660 ? Xintr_legacy7 +ffffffff82515690 ? Xintr_legacy8 +ffffffff825156c0 ? Xintr_legacy9 +ffffffff825156f0 ? Xintr_legacy10 +ffffffff82515720 ? Xintr_legacy11 +ffffffff82515750 ? Xintr_legacy12 +ffffffff82515780 ? Xintr_legacy13 +ffffffff825157b0 ? Xintr_legacy14 +ffffffff825157e0 ? Xintr_legacy15 +ffffffff82515810 ? Xintr_ioapic_edge0 +ffffffff82515840 ? Xintr_ioapic_edge1 +ffffffff82515870 ? Xintr_ioapic_edge2 +ffffffff825158a0 ? Xintr_ioapic_edge3 +ffffffff825158d0 ? Xintr_ioapic_edge4 +ffffffff82515900 ? Xintr_ioapic_edge5 +ffffffff82515930 ? Xintr_ioapic_edge6 +ffffffff82515960 ? Xintr_ioapic_edge7 +ffffffff82515990 ? Xintr_ioapic_edge8 +ffffffff825159c0 ? Xintr_ioapic_edge9 +ffffffff825159f0 ? Xintr_ioapic_edge10 +ffffffff82515a20 ? Xintr_ioapic_edge11 +ffffffff82515a50 ? Xintr_ioapic_edge12 +ffffffff82515a80 ? Xintr_ioapic_edge13 +ffffffff82515ab0 ? Xintr_ioapic_edge14 +ffffffff82515ae0 ? Xintr_ioapic_edge15 +ffffffff82515b10 ? Xintr_ioapic_edge16 +ffffffff82515b40 ? Xintr_ioapic_edge17 +ffffffff82515b70 ? Xintr_ioapic_edge18 +ffffffff82515ba0 ? Xintr_ioapic_edge19 +ffffffff82515bd0 ? Xintr_ioapic_edge20 +ffffffff82515c00 ? Xintr_ioapic_edge21 +ffffffff82515c30 ? Xintr_ioapic_edge22 +ffffffff82515c60 ? Xintr_ioapic_edge23 +ffffffff82515c90 ? Xintr_ioapic_edge24 +ffffffff82515cc0 ? Xintr_ioapic_edge25 +ffffffff82515cf0 ? Xintr_ioapic_edge26 +ffffffff82515d20 ? Xintr_ioapic_edge27 +ffffffff82515d50 ? Xintr_ioapic_edge28 +ffffffff82515d80 ? Xintr_ioapic_edge29 +ffffffff82515db0 ? Xintr_ioapic_edge30 +ffffffff82515de0 ? Xintr_ioapic_edge31 +ffffffff82515e10 ? Xintr_ioapic_edge32 +ffffffff82515e40 ? Xintr_ioapic_edge33 +ffffffff82515e70 ? Xintr_ioapic_edge34 +ffffffff82515ea0 ? Xintr_ioapic_edge35 +ffffffff82515ed0 ? Xintr_ioapic_edge36 +ffffffff82515f00 ? Xintr_ioapic_edge37 +ffffffff82515f30 ? Xintr_ioapic_edge38 +ffffffff82515f60 ? Xintr_ioapic_edge39 +ffffffff82515f90 ? Xintr_ioapic_edge40 +ffffffff82515fc0 ? Xintr_ioapic_edge41 +ffffffff82515ff0 ? Xintr_ioapic_edge42 +ffffffff82516020 ? Xintr_ioapic_edge43 +ffffffff82516050 ? Xintr_ioapic_edge44 +ffffffff82516080 ? Xintr_ioapic_edge45 +ffffffff825160b0 ? Xintr_ioapic_edge46 +ffffffff825160e0 ? Xintr_ioapic_edge47 +ffffffff82516110 ? Xintr_ioapic_edge48 +ffffffff82516140 ? Xintr_ioapic_edge49 +ffffffff82516170 ? Xintr_ioapic_edge50 +ffffffff825161a0 ? Xintr_ioapic_edge51 +ffffffff825161d0 ? Xintr_ioapic_edge52 +ffffffff82516200 ? Xintr_ioapic_edge53 +ffffffff82516230 ? Xintr_ioapic_edge54 +ffffffff82516260 ? Xintr_ioapic_edge55 +ffffffff82516290 ? Xintr_ioapic_edge56 +ffffffff825162c0 ? Xintr_ioapic_edge57 +ffffffff825162f0 ? Xintr_ioapic_edge58 +ffffffff82516320 ? Xintr_ioapic_edge59 +ffffffff82516350 ? Xintr_ioapic_edge60 +ffffffff82516380 ? Xintr_ioapic_edge61 +ffffffff825163b0 ? Xintr_ioapic_edge62 +ffffffff825163e0 ? Xintr_ioapic_edge63 +ffffffff82516410 ? Xintr_ioapic_level0 +ffffffff82516440 ? Xintr_ioapic_level1 +ffffffff82516470 ? Xintr_ioapic_level2 +ffffffff825164a0 ? Xintr_ioapic_level3 +ffffffff825164d0 ? Xintr_ioapic_level4 +ffffffff82516500 ? Xintr_ioapic_level5 +ffffffff82516530 ? Xintr_ioapic_level6 +ffffffff82516560 ? Xintr_ioapic_level7 +ffffffff82516590 ? Xintr_ioapic_level8 +ffffffff825165c0 ? Xintr_ioapic_level9 +ffffffff825165f0 ? Xintr_ioapic_level10 +ffffffff82516620 ? Xintr_ioapic_level11 +ffffffff82516650 ? Xintr_ioapic_level12 +ffffffff82516680 ? Xintr_ioapic_level13 +ffffffff825166b0 ? Xintr_ioapic_level14 +ffffffff825166e0 ? Xintr_ioapic_level15 +ffffffff82516710 ? Xintr_ioapic_level16 +ffffffff82516740 ? Xintr_ioapic_level17 +ffffffff82516770 ? Xintr_ioapic_level18 +ffffffff825167a0 ? Xintr_ioapic_level19 +ffffffff825167d0 ? Xintr_ioapic_level20 +ffffffff82516800 ? Xintr_ioapic_level21 +ffffffff82516830 ? Xintr_ioapic_level22 +ffffffff82516860 ? Xintr_ioapic_level23 +ffffffff82516890 ? Xintr_ioapic_level24 +ffffffff825168c0 ? Xintr_ioapic_level25 +ffffffff825168f0 ? Xintr_ioapic_level26 +ffffffff82516920 ? Xintr_ioapic_level27 +ffffffff82516950 ? Xintr_ioapic_level28 +ffffffff82516980 ? Xintr_ioapic_level29 +ffffffff825169b0 ? Xintr_ioapic_level30 +ffffffff825169e0 ? Xintr_ioapic_level31 +ffffffff82516a10 ? Xintr_ioapic_level32 +ffffffff82516a40 ? Xintr_ioapic_level33 +ffffffff82516a70 ? Xintr_ioapic_level34 +ffffffff82516aa0 ? Xintr_ioapic_level35 +ffffffff82516ad0 ? Xintr_ioapic_level36 +ffffffff82516b00 ? Xintr_ioapic_level37 +ffffffff82516b30 ? Xintr_ioapic_level38 +ffffffff82516b60 ? Xintr_ioapic_level39 +ffffffff82516b90 ? Xintr_ioapic_level40 +ffffffff82516bc0 ? Xintr_ioapic_level41 +ffffffff82516bf0 ? Xintr_ioapic_level42 +ffffffff82516c20 ? Xintr_ioapic_level43 +ffffffff82516c50 ? Xintr_ioapic_level44 +ffffffff82516c80 ? Xintr_ioapic_level45 +ffffffff82516cb0 ? Xintr_ioapic_level46 +ffffffff82516ce0 ? Xintr_ioapic_level47 +ffffffff82516d10 ? Xintr_ioapic_level48 +ffffffff82516d40 ? Xintr_ioapic_level49 +ffffffff82516d70 ? Xintr_ioapic_level50 +ffffffff82516da0 ? Xintr_ioapic_level51 +ffffffff82516dd0 ? Xintr_ioapic_level52 +ffffffff82516e00 ? Xintr_ioapic_level53 +ffffffff82516e30 ? Xintr_ioapic_level54 +ffffffff82516e60 ? Xintr_ioapic_level55 +ffffffff82516e90 ? Xintr_ioapic_level56 +ffffffff82516ec0 ? Xintr_ioapic_level57 +ffffffff82516ef0 ? Xintr_ioapic_level58 +ffffffff82516f20 ? Xintr_ioapic_level59 +ffffffff82516f50 ? Xintr_ioapic_level60 +ffffffff82516f80 ? Xintr_ioapic_level61 +ffffffff82516fb0 ? Xintr_ioapic_level62 +ffffffff82516fe0 ? Xintr_ioapic_level63 +ffffffff82518000 ? codepatch_fill_nop +ffffffff82518000 A __cptext_start +ffffffff82518000 A __kutext_end +ffffffff825180b0 ? codepatch_maprw +ffffffff82518190 ? codepatch_unmaprw +ffffffff825181f0 ? codepatch_nop +ffffffff82518340 ? codepatch_replace +ffffffff825184e0 ? codepatch_call +ffffffff82518500 ? codepatch_jmp +ffffffff82519000 A __cptext_end +ffffffff82519000 A __rodata_start +ffffffff82519000 C _etext +ffffffff82519000 C etext +ffffffff8251a000 r seeprom_read +ffffffff8251a004 r icl_mg_pll_find_divisors.div1_vals +ffffffff8251a028 r gen9bc_tgp_ddc_pin_map +ffffffff8251a038 r athn_ac2qid +ffffffff8251a038 r athn_ac2qid +ffffffff8251a038 r athn_ac2qid +ffffffff8251a044 r rtwn_get_rssi.cckoff +ffffffff8251a06c r rsu_ac2qid +ffffffff8251a07c r pckbc_portcmd +ffffffff8251a080 r tht_fifo_write_pad.pad +ffffffff8251a088 r rsu_get_rssi.cckoff +ffffffff8251a09c r adlp_n_revids +ffffffff8251a0ec r apple_iso_trans +ffffffff8251a0f0 r dg2_g12_revid_step_tbl +ffffffff8251a0f8 r wihap_check_tx.txratetable +ffffffff8251a0fc r dmamode +ffffffff8251a124 r gen9_edram_size_mb.sets +ffffffff8251b000 r isomappings +ffffffff8251b080 r unimappings +ffffffff8251b230 r replacements +ffffffff8251eaf8 r cmd0646_9_tim_udma +ffffffff82571edf r pp_r600_decoded_lanes +ffffffff8258d091 r cmd680_setup_channel.udma_tbl +ffffffff82594c2c r apollo_udma33_tim +ffffffff8259acc8 r substchar +ffffffff8259cd5d r apollo_udma100_tim +ffffffff825c44ea r apollo_udma66_tim +ffffffff825cb8b6 r apollo_pio_rec +ffffffff825daaee r cy_pio_rec +ffffffff82609c76 r apollo_udma133_tim +ffffffff826166f8 R drm_ca +ffffffff82616720 R drm_filtops +ffffffff82616750 R drmread_filtops +ffffffff82617000 r vga_emulops +ffffffff82617048 R vga_stdscreen +ffffffff82617078 R vga_stdscreen_mono +ffffffff826170a8 R vga_stdscreen_bf +ffffffff826170d8 R vga_40lscreen +ffffffff82617108 R vga_40lscreen_mono +ffffffff82617138 R vga_40lscreen_bf +ffffffff82617168 R vga_50lscreen +ffffffff82617198 R vga_50lscreen_mono +ffffffff826171c8 R vga_50lscreen_bf +ffffffff826171f8 R vga_screenlist +ffffffff82617208 R vga_screenlist_mono +ffffffff82617218 R vga_accessops +ffffffff82617278 r i945_wm_info +ffffffff826172b0 r bgansitopc +ffffffff826172b8 r pctoansi +ffffffff826172f8 r sdma_offsets +ffffffff826172f8 r sdma_offsets +ffffffff82617328 r iha_rate_tbl +ffffffff82617360 r i830_a_wm_info +ffffffff82617398 r gen9_edram_size_mb.ways +ffffffff82617400 r aggr_periodic_times +ffffffff82617480 r jsl_ehl_revids +ffffffff826174f8 r michael_final.pad +ffffffff82617520 r rt_copysa.maskarray +ffffffff82617528 r i915_wm_info +ffffffff82617530 r amdgpu_ih_clientid_jpeg +ffffffff82617530 r amdgpu_ih_clientid_uvds +ffffffff82617530 r amdgpu_ih_clientid_vcns +ffffffff82617530 r amdgpu_ih_clientid_vcns +ffffffff82617530 r amdgpu_ih_clientid_vcns +ffffffff82617568 r vga_setfontset.cmaptabb +ffffffff82617580 r tgl_revids +ffffffff826175d8 r i830_bc_wm_info +ffffffff82617680 r __drm_universal_plane_init.default_modifiers +ffffffff82617690 r iwn_tid2fifo +ffffffff826176a8 r vga_setfontset.cmaptaba +ffffffff826176b0 r crtc_offsets +ffffffff826176b0 r crtc_offsets +ffffffff826176b0 r crtc_offsets +ffffffff826176d0 r link_speed +ffffffff826176d0 r link_speed +ffffffff826176d0 r link_speed +ffffffff82617748 r rtwn_r88e_get_rssi.cckoff +ffffffff82618000 R edid_vendors +ffffffff826182c0 R edid_nvendors +ffffffff826182d0 R edid_products +ffffffff82618330 R edid_nproducts +ffffffff82618340 r _edid_modes +ffffffff82619000 R videomode_list +ffffffff8261a080 R videomode_count +ffffffff8261b000 r ahc_hard_errors +ffffffff8261b080 r critical_sections +ffffffff8261b0b0 r patches +ffffffff8261bd50 r seqprog +ffffffff8261d000 r ahc_switch +ffffffff8261e000 r termstat_strings +ffffffff8261e020 r critical_sections +ffffffff8261e060 r seqprog +ffffffff8261ed50 r patches +ffffffff82620000 r ahd_switch +ffffffff82621000 R aic_switch +ffffffff82622000 R adw_switch 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+ffffffff8266d000 R ncr53c9x_switch +ffffffff8266e000 r scf_period +ffffffff8266f000 R siop_script +ffffffff8266f5a0 R lun_switch +ffffffff8266f5d0 R tag_switch +ffffffff8266f660 R load_dsa +ffffffff8266f6c4 R siop_led_on +ffffffff8266f6cc R siop_led_off +ffffffff8266f6d8 R siop_switch +ffffffff82670000 R ep_vortex_media +ffffffff82670100 R ep_default_to_media +ffffffff82671000 R wi_card_ident +ffffffff82673000 R ucode_table +ffffffff82674000 r re_revisions +ffffffff82674290 r re_kstats_tpl +ffffffff82676000 R smc91cxx_media +ffffffff82676010 R smc91cxx_mii_bitbang_ops +ffffffff82677000 R dl10019_mii_bitbang_ops +ffffffff82677028 R dl10022_mii_bitbang_ops +ffffffff82678000 R ax88190_mii_bitbang_ops +ffffffff8267a000 R ac97_audio_default +ffffffff8267a020 R ac97_on_off +ffffffff8267a324 R ac97_mic_select +ffffffff8267a628 R ac97_mono_select +ffffffff8267a92c R ac97_source +ffffffff8267ac30 R ac97_volume_stereo +ffffffff8267ac4c R ac97_volume_mono +ffffffff8267ac70 R source_info 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+ffffffff8267da00 R nct6779d_sensors +ffffffff8267dd60 R w83637hf_sensors +ffffffff8267df20 R w83697hf_sensors +ffffffff8267e0c0 R w83781d_sensors +ffffffff8267e280 R w83782d_sensors +ffffffff8267e480 R w83783s_sensors +ffffffff8267e600 R w83791d_sensors +ffffffff8267e860 R w83792d_sensors +ffffffff8267eae0 R as99127f_sensors +ffffffff8267f000 r ar5k_known_products +ffffffff8267f110 r ar5111_gain_opt +ffffffff8267f1e0 r ar5112_gain_opt +ffffffff8267f2b0 r ar5k_5ghz_channels +ffffffff8267fa00 r ar5k_2ghz_channels +ffffffff8267ff10 r ar5111_rf +ffffffff82680350 r ar5112a_rf +ffffffff82680890 r ar5112_rf +ffffffff82680da0 r ar5413_rf +ffffffff826811b0 r ar2413_rf +ffffffff826814d0 r ar2425_rf +ffffffff82681830 r ar5111_rfg +ffffffff82681b30 r ar5112_rfg +ffffffff82681e30 r ar5413_rfg +ffffffff82682130 r ar2413_rfg +ffffffff82682430 r ar5k_rt_11a +ffffffff82682552 r ar5k_rt_11b +ffffffff82682674 r ar5k_rt_11g +ffffffff82682796 r ar5k_rt_xr +ffffffff82683000 r ar5210_ini +ffffffff82684000 r ar5211_mode +ffffffff826842c0 r ar5211_ini +ffffffff82684ad0 r ar5211_rf +ffffffff82685000 r ar5212_pcie +ffffffff82685080 r ar5212_mode +ffffffff82685310 r ar5212_ini +ffffffff82685c80 r ar5212_ar5111_mode +ffffffff82685f20 r ar5212_ar5112_mode +ffffffff826861b0 r ar5413_mode +ffffffff82686b10 r ar2413_mode +ffffffff82687430 r ar2425_mode +ffffffff82687d90 r ar5111_bbgain +ffffffff82688090 r ar5112_bbgain +ffffffff82689000 r athn_5ghz_chans +ffffffff82689020 r athn_rates +ffffffff8268a000 r athn_rates +ffffffff8268b000 r ar9160_ini +ffffffff8268b068 r ar5416_ini +ffffffff8268b0d0 r ar5416_serdes +ffffffff8268b0e8 r ar9160_1_1_addac +ffffffff8268b0f8 r ar9160_1_0_addac +ffffffff8268b108 r ar5416_2_2_addac +ffffffff8268b118 r ar5416_2_1_addac +ffffffff8268b128 r ar5416_set_power_calib.chainoffset +ffffffff8268b140 r ar9160_bank6tpc_vals +ffffffff8268b1c0 r ar5416_bank6tpc_vals +ffffffff8268b240 r ar5416_bb_rfgain_vals_2g +ffffffff8268b340 r ar5416_bb_rfgain_vals_5g +ffffffff8268b440 r ar5416_bank6_vals +ffffffff8268b4c0 r ar9160_regs +ffffffff8268b540 r ar9160_vals_5g20 +ffffffff8268b640 r ar9160_vals_5g40 +ffffffff8268b740 r ar9160_vals_2g40 +ffffffff8268b840 r ar9160_vals_2g20 +ffffffff8268b940 r ar9160_cm_regs +ffffffff8268bc30 r ar9160_cm_vals +ffffffff8268c210 r ar5416_regs +ffffffff8268c290 r ar5416_vals_5g20 +ffffffff8268c390 r ar5416_vals_5g40 +ffffffff8268c490 r ar5416_vals_2g40 +ffffffff8268c590 r ar5416_vals_2g20 +ffffffff8268c690 r ar5416_cm_regs +ffffffff8268c980 r ar5416_cm_vals +ffffffff8268cf60 r ar5416_serdes_regs +ffffffff8268cf90 r ar5416_serdes_vals +ffffffff8268cfc0 r ar9160_1_1_addac_vals +ffffffff8268d040 r ar9160_1_0_addac_vals +ffffffff8268d0c0 r ar5416_2_2_addac_vals +ffffffff8268d150 r ar5416_2_1_addac_vals +ffffffff8268e000 r ar9280_2_0_ini +ffffffff8268e068 r ar9280_2_0_serdes +ffffffff8268e080 r ar9280_2_0_rx_gain_23db_backoff +ffffffff8268e0a0 r ar9280_2_0_rx_gain_13db_backoff +ffffffff8268e0c0 r ar9280_2_0_rx_gain +ffffffff8268e0e0 r ar9280_2_0_tx_gain_high_power +ffffffff8268e100 r ar9280_2_0_tx_gain +ffffffff8268e120 r ar9280_init_from_rom.chainoffset +ffffffff8268e130 r ar9280_2_0_regs +ffffffff8268e190 r ar9280_2_0_vals_5g20 +ffffffff8268e250 r ar9280_2_0_vals_5g40 +ffffffff8268e310 r ar9280_2_0_vals_2g40 +ffffffff8268e3d0 r ar9280_2_0_vals_2g20 +ffffffff8268e490 r ar9280_2_0_cm_regs +ffffffff8268e740 r ar9280_2_0_cm_vals +ffffffff8268ec90 r ar9280_2_0_fast_clock_regs +ffffffff8268ecb0 r ar9280_2_0_fast_clock_vals_5g20 +ffffffff8268ecf0 r ar9280_2_0_fast_clock_vals_5g40 +ffffffff8268ed30 r ar9280_2_0_serdes_regs +ffffffff8268ed60 r ar9280_2_0_serdes_vals +ffffffff8268ed90 r ar9280_2_0_rx_gain_regs +ffffffff8268eea0 r ar9280_2_0_rx_gain_23db_backoff_vals_5g +ffffffff8268f0b0 r ar9280_2_0_rx_gain_23db_backoff_vals_2g +ffffffff8268f2c0 r ar9280_2_0_rx_gain_13db_backoff_vals_5g +ffffffff8268f4d0 r ar9280_2_0_rx_gain_13db_backoff_vals_2g +ffffffff8268f6e0 r ar9280_2_0_rx_gain_vals_5g +ffffffff8268f8f0 r ar9280_2_0_rx_gain_vals_2g +ffffffff8268fb00 r ar9280_2_0_tx_gain_regs +ffffffff8268fb40 r ar9280_2_0_tx_gain_high_power_vals_5g +ffffffff8268fbc0 r ar9280_2_0_tx_gain_high_power_vals_2g +ffffffff8268fc40 r ar9280_2_0_tx_gain_vals_5g +ffffffff8268fcc0 r ar9280_2_0_tx_gain_vals_2g +ffffffff82690000 r ar9271_ini +ffffffff82690068 r ar9285_1_2_ini +ffffffff826900d0 r ar9280_2_0_serdes +ffffffff826900e8 r ar9271_tx_gain_high_power +ffffffff82690108 r ar9271_tx_gain +ffffffff82690128 r ar9285_2_0_tx_gain_high_power +ffffffff82690148 r ar9285_2_0_tx_gain +ffffffff82690168 r ar9285_1_2_tx_gain_high_power +ffffffff82690188 r ar9285_1_2_tx_gain +ffffffff826901b0 r ar9271_regs +ffffffff82690410 r ar9271_vals_2g40 +ffffffff826908d0 r ar9271_vals_2g20 +ffffffff82690d90 r ar9271_cm_regs +ffffffff82691020 r ar9271_cm_vals +ffffffff82691540 r ar9285_1_2_regs +ffffffff826917a0 r ar9285_1_2_vals_2g40 +ffffffff82691c60 r ar9285_1_2_vals_2g20 +ffffffff82692120 r ar9285_1_2_cm_regs +ffffffff826923a0 r ar9285_1_2_cm_vals +ffffffff82692890 r ar9280_2_0_serdes_regs +ffffffff826928c0 r ar9280_2_0_serdes_vals +ffffffff826928f0 r ar9271_tx_gain_regs +ffffffff82692940 r ar9271_tx_gain_high_power_vals_2g +ffffffff826929d0 r ar9271_tx_gain_vals_2g +ffffffff82692a60 r ar9285_1_2_tx_gain_regs +ffffffff82692ab0 r ar9285_2_0_tx_gain_high_power_vals_2g +ffffffff82692b50 r ar9285_2_0_tx_gain_vals_2g +ffffffff82692bf0 r ar9285_1_2_tx_gain_high_power_vals_2g +ffffffff82692c90 r ar9285_1_2_tx_gain_vals_2g +ffffffff82693000 r ar9287_1_1_ini +ffffffff82693068 r ar9280_2_0_serdes +ffffffff82693080 r ar9287_1_1_rx_gain +ffffffff826930a0 r ar9287_1_1_tx_gain +ffffffff826930c0 r ar9287_1_1_regs +ffffffff82693120 r ar9287_1_1_vals_2g40 +ffffffff826931d0 r ar9287_1_1_vals_2g20 +ffffffff82693280 r ar9287_1_1_cm_regs +ffffffff82693560 r ar9287_1_1_cm_vals +ffffffff82693b20 r ar9280_2_0_serdes_regs +ffffffff82693b50 r ar9280_2_0_serdes_vals +ffffffff82693b80 r ar9287_1_1_rx_gain_regs +ffffffff82693d90 r ar9287_1_1_rx_gain_vals_2g +ffffffff826941a0 r ar9287_1_1_tx_gain_regs +ffffffff82694200 r ar9287_1_1_tx_gain_vals_2g +ffffffff82695000 r athn_rates +ffffffff82696000 r ar9485_1_1_ini +ffffffff82696068 r ar9485_1_1_serdes +ffffffff82696080 r ar9380_2_2_ini +ffffffff826960e8 r ar9380_2_2_serdes +ffffffff82696100 r ar9380_2_2_rx_gain_wo_xlna +ffffffff82696120 r ar9380_2_2_rx_gain +ffffffff82696140 r ar9485_1_1_rx_gain +ffffffff82696160 r ar9380_2_2_tx_gain_high_ob_db +ffffffff82696180 r ar9380_2_2_tx_gain_low_ob_db +ffffffff826961a0 r ar9380_2_2_tx_gain_high_power +ffffffff826961c0 r ar9380_2_2_tx_gain +ffffffff826961e0 r ar9485_1_1_tx_gain +ffffffff82696200 r ar9485_1_1_regs +ffffffff82696270 r ar9485_1_1_vals_2g40 +ffffffff82696350 r ar9485_1_1_vals_2g20 +ffffffff82696430 r ar9485_1_1_cm_regs +ffffffff82696720 r ar9485_1_1_cm_vals +ffffffff82696d00 r ar9485_1_1_serdes_regs +ffffffff82696d0c r ar9485_1_1_serdes_vals +ffffffff82696d20 r ar9380_2_2_regs +ffffffff82696db0 r ar9380_2_2_vals_5g20 +ffffffff82696ed0 r ar9380_2_2_vals_5g40 +ffffffff82696ff0 r ar9380_2_2_vals_2g40 +ffffffff82697110 r ar9380_2_2_vals_2g20 +ffffffff82697230 r ar9380_2_2_cm_regs +ffffffff826975d0 r ar9380_2_2_cm_vals +ffffffff82697d00 r ar9380_2_2_fast_clock_regs +ffffffff82697d20 r ar9380_2_2_fast_clock_vals_5g20 +ffffffff82697d50 r ar9380_2_2_fast_clock_vals_5g40 +ffffffff82697d74 r ar9380_2_2_serdes_regs +ffffffff82697d80 r ar9380_2_2_serdes_vals +ffffffff82697d90 r ar9380_2_2_rx_gain_regs +ffffffff82697f90 r ar9380_2_2_rx_gain_wo_xlna_vals +ffffffff82698390 r ar9380_2_2_rx_gain_vals +ffffffff82698790 r ar9485_1_1_rx_gain_regs +ffffffff82698890 r ar9485_1_1_rx_gain_vals +ffffffff82698a90 r ar9380_2_2_tx_gain_regs +ffffffff82698b60 r ar9380_2_2_tx_gain_high_ob_db_vals_5g +ffffffff82698d00 r ar9380_2_2_tx_gain_high_ob_db_vals_2g +ffffffff82698ea0 r ar9380_2_2_tx_gain_low_ob_db_vals_5g +ffffffff82699040 r ar9380_2_2_tx_gain_low_ob_db_vals_2g +ffffffff826991e0 r ar9380_2_2_tx_gain_high_power_vals_5g +ffffffff82699380 r ar9380_2_2_tx_gain_high_power_vals_2g +ffffffff82699520 r ar9380_2_2_tx_gain_vals_5g +ffffffff826996c0 r ar9380_2_2_tx_gain_vals_2g +ffffffff82699860 r ar9485_1_1_tx_gain_regs +ffffffff826998f0 r ar9485_1_1_tx_gain_vals_2g +ffffffff82699a10 r ar9380_def_rom +ffffffff82699e50 r ar9380_def_rom_h112 +ffffffff8269a290 r ar9380_def_rom_h116 +ffffffff8269a6d0 r ar9380_def_rom_x112 +ffffffff8269ab10 r ar9380_def_rom_x113 +ffffffff8269b000 R atw_txthresh_tab_lo +ffffffff8269b050 R atw_txthresh_tab_hi +ffffffff8269b0a0 r atw_attach.empty_macaddr +ffffffff8269b0b0 r atw_attach.type_strings +ffffffff8269b0d0 r atw_rfmd2958_ifn +ffffffff8269b110 r atw_rfmd2958_rf1r +ffffffff8269b150 r atw_rxintr.rate_tbl +ffffffff8269c000 r rtw_identify_sta.empty_macaddr +ffffffff8269d000 r rtwn_set_key.etherzeroaddr +ffffffff8269d010 r rtl8188eu_rf_prog +ffffffff8269d030 r rtl8192e_rf_prog +ffffffff8269d060 r rtl8188ce_rf_prog +ffffffff8269d080 r rtl8188ru_rf_prog +ffffffff8269d0a0 r rtl8188cu_rf_prog +ffffffff8269d0c0 r rtl8192ce_rf_prog +ffffffff8269d0f0 r rtl8188ru_txagc +ffffffff8269d150 r rtl8188eu_rf_regs +ffffffff8269d1b0 r rtl8188eu_rf_vals +ffffffff8269d330 r rtl8192e_rf_regs +ffffffff8269d3a0 r rtl8192e_rf_vals +ffffffff8269d540 r rtl8192e_rf2_regs +ffffffff8269d590 r rtl8192e_rf2_vals +ffffffff8269d6d0 r rtl8192ce_rf1_regs +ffffffff8269d760 r rtl8188ce_rf_vals +ffffffff8269d9a0 r rtl8188ru_rf_vals +ffffffff8269dbe0 r rtl8188cu_rf_vals +ffffffff8269de20 r rtl8192ce_rf1_vals +ffffffff8269e060 r rtl8192ce_rf2_regs +ffffffff8269e090 r rtl8192ce_rf2_vals +ffffffff8269e130 r rtl8192cu_txagc +ffffffff8269f000 r rt2560_rf2522_r2 +ffffffff8269f040 r rt2560_rf2524_r2 +ffffffff8269f080 r rt2560_rf2525_hi_r2 +ffffffff8269f0c0 r rt2560_rf2525_r2 +ffffffff8269f100 r rt2560_rf2525e_r2 +ffffffff8269f140 r rt2560_rf2526_hi_r2 +ffffffff8269f180 r rt2560_rf2526_r2 +ffffffff8269f1c0 r rt2560_def_bbp +ffffffff8269f200 r rt2560_def_mac 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intel_hpll_vco.cl_vco +ffffffff826a5020 r sgpr_init_compute_shader +ffffffff826a50d0 r trinity_override_mgpg_sequences +ffffffff826a5490 r vgpr_init_compute_shader +ffffffff826a5550 r voltage_swing_to_pre_emphasis +ffffffff826a6000 r malo_cmd_string.cmds +ffffffff826a60b0 r malo_cmd_string_result.results +ffffffff826a7000 R bwi_vendor_led_act +ffffffff826a700c R bwi_default_led_act +ffffffff826a7010 R bwi_led_duration +ffffffff826a7380 r bwi_sup_bphy +ffffffff826a73c0 r bwi_phy_freq_11g_rev1 +ffffffff826a75c0 r bwi_phy_rotor_11g_rev1 +ffffffff826a76a0 r bwi_phy_noise_scale_11g_rev2 +ffffffff826a76e0 r bwi_phy_noise_scale_11g_rev7 +ffffffff826a7720 r bwi_phy_noise_scale_11g +ffffffff826a7760 r bwi_phy_sigma_sq_11g_rev2 +ffffffff826a77d0 r bwi_phy_sigma_sq_11g_rev7 +ffffffff826a7840 r bwi_phy_delay_11g_rev1 +ffffffff826a7920 r bwi_rf_get_gains.save_phy_regs +ffffffff826a7940 r bwi_rf_lo_find.map +ffffffff826a7960 r bwi_txpower_map_11b +ffffffff826a79a0 r bwi_txpower_map_11g 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dtps_static +ffffffff826be000 R db_show_all_cmds +ffffffff826be180 R db_show_cmds +ffffffff826be4c0 R db_boot_cmds +ffffffff826be5a0 R db_command_table +ffffffff826bf000 R ddb_vars +ffffffff826c0000 R audio_ca +ffffffff826c0028 R audioctlread_filtops +ffffffff826c0058 R audiowrite_filtops +ffffffff826c0088 R audioread_filtops +ffffffff826c1000 R midi_ca +ffffffff826c1028 R midiwrite_filtops +ffffffff826c1058 R midiread_filtops +ffffffff826c2000 r mulawtolin16 +ffffffff826c2200 r lintomulaw +ffffffff826c3000 R randomread_filtops +ffffffff826c3030 R randomwrite_filtops +ffffffff826c4000 R video_ca +ffffffff826c4028 R video_filtops +ffffffff826c5000 R cd9660_vfsops +ffffffff826c6000 R cd9660_vops +ffffffff826c6110 R cd9660_specvops +ffffffff826c6220 R cd9660_fifovops +ffffffff826c6330 R cd9660read_filtops +ffffffff826c6360 R cd9660write_filtops +ffffffff826c6390 R cd9660vnode_filtops +ffffffff826c7000 R udf_vfsops +ffffffff826c8000 R udf_vops +ffffffff826c8110 r mon_lens +ffffffff826c9000 r month_days +ffffffff826ca000 R execsw +ffffffff826cb000 r shstrtab +ffffffff826cc000 R copyright +ffffffff826cc0c0 r initpaths +ffffffff826cd000 R sysent +ffffffff826cf000 R bufq_impls +ffffffff826d0000 R kqueueops +ffffffff826d0038 R kqread_filtops +ffffffff826d0068 R proc_filtops +ffffffff826d0098 R file_filtops +ffffffff826d00c8 R timer_filtops +ffffffff826d0100 R sysfilt_ops +ffffffff826d0148 R seltrue_filtops +ffffffff826d0178 R dead_filtops +ffffffff826d01a8 R badfd_filtops +ffffffff826d01d8 r mutex_klistops +ffffffff826d01f0 r rwlock_klistops +ffffffff826d1000 R kv_exec +ffffffff826d2000 R addrmask +ffffffff826d3000 r rw_ops +ffffffff826d4000 r proc_printit.pstat +ffffffff826d5000 R pledge_syscalls +ffffffff826d5a60 r pledgenames +ffffffff826d5cb0 r pledgereq +ffffffff826d6000 r unvname_rbt_RBT_INFO +ffffffff826d6018 R unvname_rbt_RBT_TYPE +ffffffff826d7000 R sig_filtops +ffffffff826d7030 R sigprop +ffffffff826d8000 R kern_vars +ffffffff826d82f0 R hw_vars +ffffffff826d9000 R tc_vars +ffffffff826da000 r sys_gettimeofday.zerotz +ffffffff826db000 r taskq_sys_name +ffffffff826db006 r taskq_sys_mp_name +ffffffff826db010 R systq +ffffffff826db018 R systqmp +ffffffff826dd000 r gpt_get_fstype.gpt_uuid_openbsd +ffffffff826dd010 r gpt_get_fstype.gpt_uuid_msdos +ffffffff826dd020 r gpt_get_fstype.gpt_uuid_chromerootfs +ffffffff826dd030 r gpt_get_fstype.gpt_uuid_linux +ffffffff826dd040 r gpt_get_fstype.gpt_uuid_hfs +ffffffff826dd050 r gpt_get_fstype.gpt_uuid_unused +ffffffff826dd060 r gpt_get_fstype.gpt_uuid_efi_system +ffffffff826dd070 r gpt_get_fstype.gpt_uuid_bios_boot +ffffffff826de000 r hiballoc_addr_RBT_INFO +ffffffff826de018 R hiballoc_addr_RBT_TYPE +ffffffff826df000 R logread_filtops +ffffffff826e0000 r phtree_RBT_INFO +ffffffff826e0018 R phtree_RBT_TYPE +ffffffff826e0020 r pool_lock_ops_rw +ffffffff826e0058 r pool_lock_ops_mtx +ffffffff826e1000 r pselregister.evf +ffffffff826e100c r pselregister.evff +ffffffff826e2000 R pipe_rfiltops +ffffffff826e2030 R pipe_wfiltops +ffffffff826e2060 R pipe_efiltops +ffffffff826e2090 r pipeops +ffffffff826e3000 R socketops +ffffffff826e4000 R sysvsem_vars +ffffffff826e5000 R char_type +ffffffff826e5100 R ttyread_filtops +ffffffff826e5130 R ttywrite_filtops +ffffffff826e5160 R ttyexcept_filtops +ffffffff826e6000 R ptcread_filtops +ffffffff826e6030 R ptcwrite_filtops +ffffffff826e6060 R ptcexcept_filtops +ffffffff826e8000 R domains +ffffffff826e9000 R unixdomain +ffffffff826e9050 R unixsw +ffffffff826ea000 R solisten_filtops +ffffffff826ea030 R soread_filtops +ffffffff826ea060 R sowrite_filtops +ffffffff826ea090 R soexcept_filtops +ffffffff826ea0c0 R socket_klistops +ffffffff826eb000 R sun_noname +ffffffff826eb010 R uipc_usrreqs +ffffffff826eb0b0 R uipc_dgram_usrreqs +ffffffff826eb150 R unpstctl_vars +ffffffff826eb180 R unpsqctl_vars +ffffffff826eb1b0 R unpdgctl_vars +ffffffff826ec000 r namecache_rb_cache_RBT_INFO +ffffffff826ec018 R namecache_rb_cache_RBT_TYPE +ffffffff826ed000 R generic_filtops +ffffffff826ee000 r buf_rb_bufs_RBT_INFO +ffffffff826ee018 R buf_rb_bufs_RBT_TYPE +ffffffff826ee020 r typename +ffffffff826ef000 R sync_vops +ffffffff826f0000 R vnops +ffffffff826f1000 R spec_vops +ffffffff826f2000 R dead_vops +ffffffff826f3000 R fifo_vops +ffffffff826f3110 R fiforead_filtops +ffffffff826f3140 R fifowrite_filtops +ffffffff826f3170 R fifoexcept_filtops +ffffffff826f4000 R regyear +ffffffff826f4020 R leapyear +ffffffff826f4040 r dos2unix +ffffffff826f4140 r u2l +ffffffff826f4240 r unix2dos +ffffffff826f5008 R msdosfs_vfsops +ffffffff826f6000 R msdosfs_vops +ffffffff826f6110 R msdosfsread_filtops +ffffffff826f6140 R msdosfswrite_filtops +ffffffff826f6170 R msdosfsvnode_filtops +ffffffff826f7000 r _utf_count +ffffffff826f8000 R ntfs_vfsops +ffffffff826f9000 R ntfs_vops +ffffffff826fa000 R bpfread_filtops +ffffffff826fa030 R bpf_mbuf_ops +ffffffff826fb000 r bpf_mem_ops +ffffffff826fc000 R priq_ops +ffffffff826fc038 R ifq_priq_ops +ffffffff826fc040 r ifq_kstat_tpl +ffffffff826fc158 r ifiq_kstat_tpl +ffffffff826fd000 r ether_crc32_le_update.crctab +ffffffff826fd040 r ether_crc32_be_update.crctab +ffffffff826fe000 r lcp +ffffffff826fe078 r ipcp +ffffffff826fe0f0 r ipv6cp +ffffffff826fe168 r chap +ffffffff826fe1e0 r pap +ffffffff826ff000 R ifmedia_baudrate_descriptions +ffffffff82700000 r fcstab +ffffffff82702000 R tunread_filtops +ffffffff82702030 R tunwrite_filtops +ffffffff82703000 R bridge_brport +ffffffff82704000 R bstp_etheraddr +ffffffff82705000 r eb_tree_RBT_INFO +ffffffff82705018 R eb_tree_RBT_TYPE +ffffffff82706000 r veb_etherbridge_ops +ffffffff82706028 r veb_pf_ipv4 +ffffffff82706040 r veb_pf_ipv6 +ffffffff82707000 r pipex_pppoe_padding +ffffffff82708000 r rn_addmask.normal_chars +ffffffff82709000 R route_src +ffffffff82709010 R route_usrreqs +ffffffff827090b0 R routedomain +ffffffff82709100 R routesw +ffffffff8270a000 R gre_vars +ffffffff8270a030 r mgre_tree_RBT_INFO +ffffffff8270a048 R mgre_tree_RBT_TYPE +ffffffff8270a050 r egre_tree_RBT_INFO +ffffffff8270a068 R egre_tree_RBT_TYPE +ffffffff8270a070 r nvgre_ucast_tree_RBT_INFO +ffffffff8270a088 R nvgre_ucast_tree_RBT_TYPE +ffffffff8270a090 r nvgre_mcast_tree_RBT_INFO +ffffffff8270a0a8 R nvgre_mcast_tree_RBT_TYPE +ffffffff8270a0b0 r eoip_tree_RBT_INFO +ffffffff8270a0c8 R eoip_tree_RBT_TYPE +ffffffff8270a0d0 r nvgre_etherbridge_ops +ffffffff8270b000 r trunk_protos +ffffffff8270c000 R ethermulticastaddr_slowprotocols +ffffffff8270c006 R lacp_info_tlv_template +ffffffff8270c00e R marker_info_tlv_template +ffffffff8270c012 R marker_response_tlv_template +ffffffff8270c020 R lacp_timer_funcs +ffffffff8270d000 r lacp_rxm_state_names +ffffffff8270d040 r lacp_rxm_event_names +ffffffff8270d090 r aggr_port_selected_names +ffffffff8270d0b0 r lacp_mux_state_names +ffffffff8270d0e0 r lacp_mux_event_names +ffffffff8270d128 r lacp_address_slow +ffffffff8270e000 r tpmr_pf_ipv4 +ffffffff8270e018 r tpmr_pf_ipv6 +ffffffff8270f000 r bpe_tree_RBT_INFO +ffffffff8270f018 R bpe_tree_RBT_TYPE +ffffffff8270f020 r bpe_etherbridge_ops +ffffffff82710000 R pppx_rd_filtops +ffffffff82710030 R pppx_wr_filtops +ffffffff82710060 r pppx_ifs_RBT_INFO +ffffffff82710078 R pppx_ifs_RBT_TYPE +ffffffff82710080 r pppac_rd_filtops +ffffffff827100b0 r pppac_wr_filtops +ffffffff82711000 r vxlan_peers_RBT_INFO +ffffffff82711018 R vxlan_peers_RBT_TYPE +ffffffff82711020 r vxlan_etherbridge_ops +ffffffff82712000 R stoeplitz_cache +ffffffff82713000 R ieee80211_std_rateset_11a +ffffffff82713010 R ieee80211_std_rateset_11b +ffffffff82713020 R ieee80211_std_rateset_11g +ffffffff82713030 R ieee80211_std_ratesets_11n +ffffffff827133b0 R ieee80211_std_ratesets_11ac +ffffffff827136b0 r ieee80211_setbasicrates.basic +ffffffff82713710 r ieee80211_setmode.chanflags +ffffffff82713730 r ieee80211_rate2media.rates +ffffffff827138c0 r ieee80211_media2rate.ieeerates +ffffffff82714000 r Sbox +ffffffff82716000 r ieee80211_ioctl.empty_macaddr +ffffffff82717000 r ieee80211_find_rxnode.zero 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pciide_triones_products +ffffffff828958f0 R pciide_promise_products +ffffffff82895ac0 R pciide_acard_products +ffffffff82895b10 R pciide_serverworks_products +ffffffff82895bb0 R pciide_nvidia_products +ffffffff82895e80 R pciide_ite_products +ffffffff82895ea0 R pciide_ati_products +ffffffff82895f20 R pciide_jmicron_products +ffffffff82895f70 R pciide_phison_products +ffffffff82895f80 R pciide_rdc_products +ffffffff82895f90 R pciide_vendors +ffffffff82896140 R pciide_pci_ca +ffffffff82896168 R pciide_jmb_ca +ffffffff82896190 r piix_isp_dma +ffffffff82896193 r piix_rtc_dma +ffffffff82896196 r apollo_pio_set +ffffffff8289619b r cmd0643_9_data_tim_pio +ffffffff828961a0 r cmd0643_9_data_tim_dma +ffffffff828961a3 r cmd680_channel_map.init_val +ffffffff828961b1 r cmd680_setup_channel.udma2_tbl +ffffffff828961b8 r cmd680_setup_channel.dma_tbl +ffffffff828961be r cmd680_setup_channel.pio_tbl +ffffffff828961d0 r satalink_ba5_regmap +ffffffff82896690 r sii3114_chansetup.channel_names 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bktr_ca +ffffffff8289f028 R bktr_hw_if +ffffffff828a0000 r tuners +ffffffff828a0170 r freqTable +ffffffff828a0260 r nabcst +ffffffff828a02a0 r irccable +ffffffff828a0310 r hrccable +ffffffff828a0380 r weurope +ffffffff828a0420 r jpnbcst +ffffffff828a0460 r jpncable +ffffffff828a04c0 r xussr +ffffffff828a0530 r australia +ffffffff828a0590 r france +ffffffff828a1000 R xl_pci_ca +ffffffff828a1030 R xl_pci_devices +ffffffff828a2000 R fxp_pci_ca +ffffffff828a2030 R fxp_pci_devices +ffffffff828a3000 R em_devices +ffffffff828a32e0 R em_ca +ffffffff828a3310 r em_counters +ffffffff828a4000 r em_igp_cable_length_table +ffffffff828a4100 r em_igp_2_cable_length_table +ffffffff828a5000 R ixgb_devices +ffffffff828a5010 R ixgb_ca +ffffffff828a6000 R ixgbe_devices +ffffffff828a60b8 R ix_ca +ffffffff828a60e0 r ix_counters +ffffffff828a63e0 r ix_rxq_kstats_tpl +ffffffff828a6458 r ix_txq_kstats_tpl +ffffffff828a7000 r ixgbe_mvals_base +ffffffff828a7060 r ixgbe_mvals_X540 +ffffffff828a70c0 r ixgbe_mvals_X550 +ffffffff828a7120 r ixgbe_mvals_X550EM_x +ffffffff828a7180 r ixgbe_mvals_X550EM_a +ffffffff828aa000 R ixl_ca +ffffffff828aa030 R ixl_port_counters +ffffffff828aa2c0 R ixl_vsi_counters +ffffffff828aa380 r ixl_devices +ffffffff828aa4c0 r ixl_710 +ffffffff828aa4e8 r ixl_722 +ffffffff828aa510 r ixl_pf_aq_regs +ffffffff828aa578 r ixl_710_decrepit +ffffffff828aa5a0 r ixl_phy_type_map +ffffffff828aa770 r ixl_speed_type_map +ffffffff828aa7b0 r ixl_hmc_pack_rxq +ffffffff828aa830 r ixl_hmc_pack_txq +ffffffff828aa8a0 r ixl_sfp_ops +ffffffff828aa8b8 r ixl_qsfp_ops +ffffffff828ab000 R xge_ca +ffffffff828ab028 R xge_devices +ffffffff828ab030 r xge_fix_mac +ffffffff828ab110 r xge_xena_dtx_cfg +ffffffff828ab170 r xge_herc_dtx_cfg +ffffffff828ac000 R thtc_ca +ffffffff828ac028 R tht_ca +ffffffff828ac050 r thtc_devices +ffffffff828ac068 r tht_link_state.interval +ffffffff828ad000 R myx_ca +ffffffff828ad028 R myx_devices +ffffffff828ae000 R oce_ca +ffffffff828ae030 R oce_devices +ffffffff828af000 R dc_pci_ca +ffffffff828b0000 R epic_pci_ca +ffffffff828b0028 R epic_pci_devices +ffffffff828b1000 R ti_pci_ca +ffffffff828b1030 R ti_devices +ffffffff828b2000 R ne_pci_ca +ffffffff828b2030 R ne_pci_prod +ffffffff828b3000 R gem_pci_ca +ffffffff828b3030 R gem_pci_devices +ffffffff828b3050 r gem_promhdr +ffffffff828b3052 r gem_promdat +ffffffff828b305a r gem_promdat2 +ffffffff828b4000 R cas_ca +ffffffff828b4028 R cas_pci_devices +ffffffff828b4030 r cas_promhdr +ffffffff828b4032 r cas_promdat_sun +ffffffff828b403a r cas_promdat_ns +ffffffff828b4042 r cas_promdat2 +ffffffff828b5000 R sf_pci_ca +ffffffff828b5028 R sf_pci_products +ffffffff828b6000 R sis_ca +ffffffff828b6028 R sis_devices +ffffffff828b7000 R se_devices +ffffffff828b7008 R se_ca +ffffffff828b8000 R uhci_pci_ca +ffffffff828b9000 R ohci_pci_ca +ffffffff828ba000 R ehci_pci_ca +ffffffff828bb000 R xhci_pci_ca +ffffffff828bc000 R cbb_pci_ca +ffffffff828bc028 r pccbb_pcmcia_do_io_map.pcic_iowidth +ffffffff828bd000 R skc_devices +ffffffff828bd030 R skc_ca +ffffffff828bd058 R sk_ca +ffffffff828be000 R mskc_devices +ffffffff828be0a8 R mskc_ca +ffffffff828be0d0 R msk_ca +ffffffff828be100 r msk_mib +ffffffff828bf000 R puc_pci_ca +ffffffff828c0000 R puc_devs +ffffffff828c5000 R com_puc_ca +ffffffff828c5030 r puc_port_types +ffffffff828c6000 R lpt_puc_ca +ffffffff828c7000 R wi_pci_ca +ffffffff828c7030 r wi_pci_products +ffffffff828c8000 R an_pci_ca +ffffffff828c8030 R an_pci_devices +ffffffff828c9000 R iwi_devices +ffffffff828c9010 R iwi_ca +ffffffff828ca000 R wpi_ca +ffffffff828ca028 r wpi_devices +ffffffff828ca030 r wpi_rates +ffffffff828ca050 r wpi_rf_gain_5ghz +ffffffff828ca0a0 r wpi_dsp_gain_5ghz +ffffffff828ca0f0 r wpi_rf_gain_2ghz +ffffffff828ca140 r wpi_dsp_gain_2ghz +ffffffff828ca190 r wpi_pmgt +ffffffff828ca310 r wpi_bands +ffffffff828cb000 R iwn_mcs2ridx +ffffffff828cb020 R iwn_ca +ffffffff828cb050 r iwn_devices +ffffffff828cb0e8 r iwn4965_sensitivity_limits +ffffffff828cb124 r iwn5000_sensitivity_limits +ffffffff828cb160 r iwn5150_sensitivity_limits +ffffffff828cb19c r iwn1000_sensitivity_limits +ffffffff828cb1d8 r iwn6000_sensitivity_limits +ffffffff828cb214 r iwn2000_sensitivity_limits +ffffffff828cb250 r iwn_fw_errmsg +ffffffff828cb340 r iwn4965_set_txpower.tdiv +ffffffff828cb360 r iwn4965_rf_gain_5ghz +ffffffff828cb3d0 r iwn4965_dsp_gain_5ghz +ffffffff828cb440 r iwn4965_dsp_gain_2ghz +ffffffff828cb4b0 r iwn_pmgt +ffffffff828cb6f0 r iwn4965_post_alive.qid2fifo +ffffffff828cb700 r iwn_bands +ffffffff828cb770 r iwn_rates +ffffffff828cb820 r iwn4965_rf_gain_2ghz +ffffffff828cc000 R iwm_nvm_channels +ffffffff828cc030 R iwm_nvm_channels_8000 +ffffffff828cc070 R iwm_rates +ffffffff828cc0d0 R iwm_ht_mcs2ridx +ffffffff828cc110 R iwm_tid_to_ac +ffffffff828cc118 R iwm_ac_to_tx_fifo +ffffffff828cc120 R iwm_nvm_to_read +ffffffff828cc144 r iwm_set_hw_address_8000.reserved_mac +ffffffff828cc180 r iwm_sf_full_timeout +ffffffff828cc1b0 r iwm_sf_full_timeout_def +ffffffff828cc1e0 r advanced_lookup +ffffffff828cc320 r iwm_devices +ffffffff828cc360 R iwm_ca +ffffffff828cd000 R iwx_9560_quz_a0_jf_b0_cfg +ffffffff828cd020 R iwx_9560_qu_c0_jf_b0_cfg +ffffffff828cd040 R iwx_qu_b0_hr1_b0 +ffffffff828cd060 R iwx_qu_b0_hr_b0 +ffffffff828cd080 R iwx_ax201_cfg_qu_hr +ffffffff828cd0a0 R iwx_qu_c0_hr1_b0 +ffffffff828cd0c0 R iwx_qu_c0_hr_b0 +ffffffff828cd0e0 R iwx_ax201_cfg_qu_c0_hr_b0 +ffffffff828cd100 R iwx_quz_a0_hr1_b0 +ffffffff828cd120 R iwx_ax201_cfg_quz_hr +ffffffff828cd140 R iwx_cfg_so_a0_hr_b0 +ffffffff828cd160 R iwx_cfg_quz_a0_hr_b0 +ffffffff828cd180 R iwx_2ax_cfg_so_gf_a0 +ffffffff828cd1a0 R iwx_2ax_cfg_so_gf_a0_long +ffffffff828cd1c0 R iwx_2ax_cfg_so_gf4_a0 +ffffffff828cd1e0 R iwx_2ax_cfg_so_gf4_a0_long +ffffffff828cd200 R iwx_2ax_cfg_ty_gf_a0 +ffffffff828cd220 R iwx_2ax_cfg_so_jf_b0 +ffffffff828cd240 R iwx_nvm_channels_8000 +ffffffff828cd280 R iwx_rates +ffffffff828cd2e0 R iwx_mcs2ridx +ffffffff828cd320 R iwx_tid_to_ac +ffffffff828cd328 R iwx_ac_to_tx_fifo +ffffffff828cd330 r iwx_nvm_channels_uhb +ffffffff828cd39e r iwx_is_valid_mac_addr.reserved_mac +ffffffff828cd3b0 r iwx_sf_full_timeout +ffffffff828cd3e0 r iwx_sf_full_timeout_def +ffffffff828cd410 r advanced_lookup +ffffffff828cd550 r iwx_devices +ffffffff828cd590 r iwx_dev_info_table +ffffffff828cdde8 R iwx_ca +ffffffff828ce000 R cmpci_ca +ffffffff828ce028 R cmpci_hw_if +ffffffff828ce0e0 r cmpci_rate_table +ffffffff828ce120 R cmpci_devices +ffffffff828ce130 r cmpci_query_devinfo.mixer_port_names +ffffffff828ce160 r cmpci_query_devinfo.mixer_classes +ffffffff828cf000 R iha_pci_ca +ffffffff828cf028 R iha_switch +ffffffff828d0000 R pcscp_ca +ffffffff828d1000 R bge_ca +ffffffff828d1030 R bge_devices +ffffffff828d11b0 r bge_revisions +ffffffff828d1610 r bge_majorrevs +ffffffff828d2000 R bnx_devices +ffffffff828d2020 R bnx_ca +ffffffff828d3000 R vge_ca +ffffffff828d3028 R vge_devices +ffffffff828d4000 R stge_ca +ffffffff828d4028 R stge_mii_bitbang_ops +ffffffff828d4050 R stge_devices +ffffffff828d5000 R nfe_ca +ffffffff828d5030 R nfe_devices +ffffffff828d6000 R et_devices +ffffffff828d6008 R et_ca +ffffffff828d7000 R jme_devices +ffffffff828d7008 R jme_ca +ffffffff828d8000 R age_devices +ffffffff828d8008 R age_ca +ffffffff828d9000 R alc_devices +ffffffff828d9038 R alc_ca +ffffffff828da000 R ale_devices +ffffffff828da008 R ale_ca +ffffffff828db000 R amdpm_ca +ffffffff828db030 R amdpm_ids +ffffffff828dc000 R bce_ca +ffffffff828dc028 R bce_devices +ffffffff828dd000 R ath_pci_ca +ffffffff828de000 R athn_pci_ca +ffffffff828de030 r athn_pci_devices +ffffffff828df000 R atw_pci_ca +ffffffff828df028 R atw_pci_devices +ffffffff828e0000 R rtw_pci_ca +ffffffff828e0030 R rtw_pci_products +ffffffff828e1000 R rtwn_pci_ca +ffffffff828e1030 r rtwn_pci_devices +ffffffff828e1040 r rtl8188eu_mac +ffffffff828e11b0 r rtl8192cu_mac +ffffffff828e1310 r rtl8192ce_mac +ffffffff828e1458 r rtl8188eu_bb_prog +ffffffff828e1480 r rtl8723a_bb_prog +ffffffff828e14a8 r rtl8192ce_bb_prog_1t +ffffffff828e14d0 r rtl8192ce_bb_prog_2t +ffffffff828e1500 r rtl8188eu_bb_regs +ffffffff828e1680 r rtl8188eu_bb_vals +ffffffff828e1980 r rtl8188eu_agc_vals +ffffffff828e1b80 r rtl8723a_bb_regs +ffffffff828e1d00 r rtl8723a_bb_vals +ffffffff828e1ff0 r rtl8192ce_agc_vals +ffffffff828e2270 r rtl8192ce_bb_regs +ffffffff828e23f0 r rtl8192ce_bb_vals_1t +ffffffff828e26e0 r rtl8192ce_bb_vals_2t +ffffffff828e3000 R ral_pci_ca +ffffffff828e3030 R ral_pci_devices +ffffffff828e4000 R acx_pci_ca +ffffffff828e4028 R acx_pci_devices +ffffffff828e5000 R pgt_pci_ca +ffffffff828e5028 R pgt_pci_devices +ffffffff828e6000 R malo_pci_ca +ffffffff828e6028 R malo_pci_devices +ffffffff828e7000 R bwi_pci_ca +ffffffff828e7030 R bwi_pci_devices +ffffffff828e8000 R piixpm_ca +ffffffff828e8030 R piixpm_ids +ffffffff828e9000 R vic_ca +ffffffff828e9028 R vic_devices +ffffffff828ea000 R vmx_devices +ffffffff828ea008 R vmx_ca +ffffffff828ea030 r vmx_tx_kstat_tpl +ffffffff828ea0d0 r vmx_kstat_rate +ffffffff828ea0e0 r vmx_rx_kstat_tpl +ffffffff828eb000 R vmwpvs_ca +ffffffff828eb028 R vmwpvs_switch +ffffffff828ec000 R lii_ca +ffffffff828ec028 R lii_devices +ffffffff828ed000 R ichiic_ca +ffffffff828ed030 R ichiic_ids +ffffffff828ee000 R viapm_ca +ffffffff828ee030 R viapm_ids +ffffffff828ee070 r val_to_temp +ffffffff828ee870 r val_to_uV.mult +ffffffff828ef000 R amdiic_ca +ffffffff828ef028 R amdiic_ids +ffffffff828f0000 R nviic_ca +ffffffff828f0030 R nviic_ids +ffffffff828f1000 R sdhc_pci_ca +ffffffff828f2000 R kate_ca +ffffffff828f2030 r kate_proc +ffffffff828f3000 R km_ca +ffffffff828f3030 r km_devices +ffffffff828f4000 R ksmn_ca +ffffffff828f4030 r ksmn_devices +ffffffff828f5000 R itherm_devices +ffffffff828f5008 R itherm_ca +ffffffff828f6000 R pchtemp_ca +ffffffff828f6030 R pchtemp_devices +ffffffff828f7000 R rtsx_pci_ca +ffffffff828f8000 R xspd_ca +ffffffff828f8028 R xspd_devices +ffffffff828f9000 R virtio_pci_ca +ffffffff828fa000 R dwiic_pci_ca +ffffffff828fa030 R dwiic_pci_ids +ffffffff828fb000 R bwfm_pci_ca +ffffffff828fb030 r bwfm_pci_devices +ffffffff828fc000 R ccp_pci_ca +ffffffff828fc030 r ccp_pci_devices +ffffffff828fd000 R bnxt_devices +ffffffff828fd040 R bnxt_ca +ffffffff828fe000 R mcx_ca +ffffffff828fe030 r mcx_devices +ffffffff828fe060 r mcx_rss_config +ffffffff828fe0d0 r mcx_eth_cap_map +ffffffff828fe2d0 r mcx_kstat_ppcnt_ieee8023 +ffffffff828fe2e8 r mcx_kstat_ppcnt_rfc2863 +ffffffff828fe300 r mcx_kstat_ppcnt_rfc2819 +ffffffff828fe318 r mcx_kstat_ppcnt_rfc3635 +ffffffff828fe330 r mcx_ppcnt_ieee8023_tpl +ffffffff828fe4b0 r mcx_ppcnt_rfc2863_tpl +ffffffff828fe5c0 r mcx_ppcnt_rfc2819_tpl +ffffffff828fe770 r mcx_ppcnt_rfc3635_tpl +ffffffff828fe8b0 r mcx_kstat_mtmp_tpl +ffffffff828fe950 r mcx_kstat_mtmp_rate +ffffffff828fe960 r mcx_queue_kstat_tpl +ffffffff828ff000 R iavf_ca +ffffffff828ff030 r iavf_devices +ffffffff828ff040 r iavf_aq_regs +ffffffff828ff0b0 r iavf_link_speeds +ffffffff82900000 R rge_ca +ffffffff82900028 R rge_devices +ffffffff82900030 r rtl8125_mac_cfg2_ephy +ffffffff82900090 r rge_phy_config_mac_cfg3.mac_cfg3_a438_value +ffffffff829000b0 r rge_phy_config_mac_cfg3.mac_cfg3_b88e_value +ffffffff82900110 r rge_phy_config_mac_cfg4.mac_cfg4_b87c_value +ffffffff82900170 r rtl8125_mac_cfg4_ephy +ffffffff829001e0 r rtl8125_mac_cfg2_mcu +ffffffff82900e80 r rtl8125_mac_cfg3_mcu +ffffffff82901720 r rtl8125_mac_cfg4_mcu +ffffffff82903d10 r rtl8125_mac_cfg5_mcu +ffffffff82904c10 r rtl8125_mac_bps +ffffffff82904f80 r rtl8125b_mac_bps +ffffffff82905120 r rge_kstats_tpl +ffffffff82906000 R igc_devices +ffffffff82906040 R igc_ca +ffffffff82907000 R com_pci_ca +ffffffff82907030 R com_pci_ids +ffffffff82908000 r agp_attach.agp_max +ffffffff82908048 R agp_ca +ffffffff82909000 R intagp_ca +ffffffff8290a000 r drm_plane_create_rotation_property.props +ffffffff8290b000 r drm_bridge_priv_state_funcs +ffffffff8290d000 r color_encoding_name +ffffffff8290d020 r color_range_name +ffffffff8290e000 r drm_subpixel_enum_list +ffffffff8290e060 r drm_dpms_enum_list +ffffffff8290e0a0 r drm_dvi_i_select_enum_list +ffffffff8290e0d0 r drm_dvi_i_subconnector_enum_list +ffffffff8290e100 r drm_tv_select_enum_list +ffffffff8290e150 r drm_tv_subconnector_enum_list +ffffffff8290e1a0 r drm_dp_subconnector_enum_list +ffffffff8290e210 r drm_link_status_enum_list +ffffffff8290e230 r drm_scaling_mode_enum_list +ffffffff8290e270 r drm_aspect_ratio_enum_list +ffffffff8290e2a0 r hdmi_colorspaces +ffffffff8290e370 r dp_colorspaces +ffffffff8290e450 r drm_content_type_enum_list +ffffffff8290e4a0 r drm_panel_orientation_enum_list +ffffffff8290e4e0 r privacy_screen_enum +ffffffff8290f000 r drm_crtc_fence_ops +ffffffff82910000 r drm_dmt_modes +ffffffff82912940 r edid_cea_modes_1 +ffffffff829164d0 r edid_cea_modes_193 +ffffffff82917180 r edid_quirk_list +ffffffff82917350 r edid_4k_modes +ffffffff829175b0 r edid_est_modes +ffffffff82917db0 r est3_modes +ffffffff82917f10 r stereo_mandatory_modes +ffffffff82917f90 r extra_modes +ffffffff82918000 r drm_encoder_enum_list +ffffffff82919000 r drm_fbdev_client_funcs +ffffffff82919020 r drm_fb_helper_generic_funcs +ffffffff82919028 r drm_fbdev_fb_ops +ffffffff8291a000 r drm_fb_xrgb8888_to_rgb332.dst_pixsize +ffffffff8291a004 r drm_fb_xrgb8888_to_rgb565.dst_pixsize +ffffffff8291a008 r drm_fb_xrgb8888_to_rgb888.dst_pixsize +ffffffff8291a00c r drm_fb_xrgb8888_to_xrgb2101010.dst_pixsize +ffffffff8291a010 r drm_fb_xrgb8888_to_gray8.dst_pixsize +ffffffff8291a014 r drm_fb_rgb888_to_xrgb8888.dst_pixsize +ffffffff8291a018 r drm_fb_rgb565_to_xrgb8888.dst_pixsize +ffffffff8291b000 r __drm_format_info.formats +ffffffff8291c000 R drm_pgops +ffffffff8291d000 r drm_ioctls +ffffffff8291f000 r dma_fence_stub_ops +ffffffff8291f038 R dma_fence_array_ops +ffffffff8291f070 R dma_fence_chain_ops +ffffffff8291f0a8 R dmabufops +ffffffff8291f0e0 R syncfileops +ffffffff82920000 r drm_plane_type_enum_list +ffffffff82921000 r drm_mode_status_names +ffffffff82922000 r primary_plane_funcs +ffffffff82922068 r safe_modeset_formats +ffffffff82923000 r orientation_data +ffffffff82925f08 r lcd800x1280_rightside_up +ffffffff82925f20 r lcd720x1280_rightside_up +ffffffff82925f38 r asus_t100ha +ffffffff82925f50 r lcd1080x1920_leftside_up +ffffffff82925f68 r lcd1200x1920_rightside_up +ffffffff82925f80 r gpd_micropc +ffffffff82925f98 r gpd_pocket +ffffffff82925fb0 r gpd_pocket2 +ffffffff82925fc8 r gpd_win +ffffffff82925fe0 r gpd_win2 +ffffffff82925ff8 r itworks_tw891 +ffffffff82926010 r onegx1_pro +ffffffff82926028 r lcd1600x2560_leftside_up +ffffffff82926040 r lcd1280x1920_rightside_up +ffffffff82926058 r .compoundliteral +ffffffff82926068 r .compoundliteral.5 +ffffffff82926090 r .compoundliteral.9 +ffffffff829260b0 r .compoundliteral.17 +ffffffff829260f0 r .compoundliteral.21 +ffffffff82926110 r .compoundliteral.23 +ffffffff82926120 r .compoundliteral.25 +ffffffff82927000 r drm_gem_prime_dmabuf_ops +ffffffff82929000 r is_hdmi_adaptor.dp_dual_mode_hdmi_id +ffffffff8292a000 r drm_dp_phy_name.phy_names +ffffffff8292a048 r drm_dp_i2c_algo +ffffffff8292a058 r drm_dp_i2c_lock_ops +ffffffff8292a070 r dp_aux_bl_ops +ffffffff8292a090 r dpcd_quirk_list +ffffffff8292a320 r drm_dp_psr_setup_time.psr_setup_time_us +ffffffff8292b000 R drm_dp_mst_topology_state_funcs +ffffffff8292b020 r drm_dp_mst_req_type_str.req_type_str +ffffffff8292b1f0 r drm_dp_mst_sideband_tx_state_str.sideband_reason_str +ffffffff8292b220 r drm_dp_mst_nak_reason_str.nak_reason_str +ffffffff8292b278 r drm_dp_mst_i2c_algo +ffffffff8292c000 r hdmi_colorimetry_val +ffffffff8292d000 r ttm_bo_init_reserved.sys_mem +ffffffff8292e000 r ttm_bo_pipeline_gutting.sys_mem +ffffffff8292f018 R ttm_bo_vm_ops +ffffffff82930000 r ttm_range_manager_func +ffffffff82931018 r ttm_kmap_iter_io_ops +ffffffff82931030 r ttm_kmap_iter_linear_io_ops +ffffffff82932000 r ttm_sys_manager_func +ffffffff82933000 r ttm_kmap_iter_tt_ops +ffffffff82934000 r drm_sched_fence_ops_scheduled +ffffffff82934038 r drm_sched_fence_ops_finished +ffffffff82935000 R ch7017_ops +ffffffff82936000 R ch7xxx_ops +ffffffff82936060 r ch7xxx_ids +ffffffff82937000 R ivch_ops +ffffffff82937060 r backup_addresses +ffffffff82938000 R ns2501_ops +ffffffff82938060 r mode_agnostic_values +ffffffff829380e0 r ns2501_modes +ffffffff82939000 R sil164_ops +ffffffff8293a000 R tfp410_ops +ffffffff8293b000 r chv_dpll +ffffffff8293b050 r vlv_dpll +ffffffff8293b0a0 r g4x_dpll +ffffffff8293b0f0 r pch_dpll +ffffffff8293b138 r intel_dp_enc_funcs +ffffffff8293c000 r intel_hdmi_enc_funcs +ffffffff8293d000 r vlv_primary_formats +ffffffff8293d030 r ivb_primary_formats +ffffffff8293d050 r i965_primary_formats +ffffffff8293d070 r i8xx_primary_formats +ffffffff8293d080 r i965_plane_funcs +ffffffff8293d0e8 r i8xx_plane_funcs +ffffffff8293e000 r gen11_dsi_encoder_funcs +ffffffff8293e020 r gen11_dsi_connector_funcs +ffffffff8293e098 r gen11_dsi_connector_helper_funcs +ffffffff8293e0e8 r gen11_dsi_host_ops +ffffffff8293f000 r intel_plane_helper_funcs +ffffffff82940000 r g4x_audio_funcs +ffffffff82940010 r ilk_audio_funcs +ffffffff82940020 r hsw_audio_funcs +ffffffff82940030 r hdmi_audio_clock +ffffffff829400a0 r dp_aud_n_m +ffffffff82940250 r hdmi_aud_ncts_36bpp +ffffffff82940330 r hdmi_aud_ncts_30bpp +ffffffff82940410 r hdmi_aud_ncts_24bpp +ffffffff82941000 r intel_backlight_device_ops +ffffffff82941018 r bxt_pwm_funcs +ffffffff82941048 r cnp_pwm_funcs +ffffffff82941078 r lpt_pwm_funcs +ffffffff829410a8 r spt_pwm_funcs +ffffffff829410d8 r pch_pwm_funcs +ffffffff82941108 r ext_pwm_funcs +ffffffff82941138 r vlv_pwm_funcs +ffffffff82941168 r i965_pwm_funcs +ffffffff82941198 r i9xx_pwm_funcs +ffffffff829411c8 r pwm_bl_funcs +ffffffff82942000 r bdb_blocks +ffffffff82942160 r translate_iboost.mapping +ffffffff82942163 r adlp_ddc_pin_map +ffffffff8294216a r adls_ddc_pin_map +ffffffff82942170 r rkl_pch_tgp_ddc_pin_map +ffffffff82942175 r icp_ddc_pin_map +ffffffff8294217f r cnp_ddc_pin_map +ffffffff82943000 r mtl_sa_info +ffffffff82943006 r adlp_sa_info +ffffffff8294300c r adls_sa_info +ffffffff82943012 r rkl_sa_info +ffffffff82943018 r tgl_sa_info +ffffffff82943020 r intel_bw_funcs +ffffffff82944000 r intel_cdclk_funcs +ffffffff82944010 r dg2_cdclk_table +ffffffff829440c0 r adlp_a_step_cdclk_table +ffffffff82944140 r adlp_cdclk_table +ffffffff82944200 r rkl_cdclk_table +ffffffff829442f0 r icl_cdclk_table +ffffffff829443e0 r glk_cdclk_table +ffffffff82944410 r bxt_cdclk_table +ffffffff82944458 r tgl_cdclk_funcs +ffffffff82944478 r ehl_cdclk_funcs +ffffffff82944498 r icl_cdclk_funcs +ffffffff829444b8 r bxt_cdclk_funcs +ffffffff829444d8 r skl_cdclk_funcs +ffffffff829444f8 r bdw_cdclk_funcs +ffffffff82944518 r hsw_cdclk_funcs +ffffffff82944538 r chv_cdclk_funcs +ffffffff82944558 r vlv_cdclk_funcs +ffffffff82944578 r fixed_400mhz_cdclk_funcs +ffffffff82944598 r ilk_cdclk_funcs +ffffffff829445b8 r gm45_cdclk_funcs +ffffffff829445d8 r g33_cdclk_funcs +ffffffff829445f8 r g33_get_cdclk.div_3200 +ffffffff829445fe r g33_get_cdclk.div_4000 +ffffffff82944604 r g33_get_cdclk.div_4800 +ffffffff8294460a r g33_get_cdclk.div_5333 +ffffffff82944610 r i965gm_cdclk_funcs +ffffffff82944630 r i965gm_get_cdclk.div_3200 +ffffffff82944633 r i965gm_get_cdclk.div_4000 +ffffffff82944636 r i965gm_get_cdclk.div_5333 +ffffffff82944640 r pnv_cdclk_funcs +ffffffff82944660 r i945gm_cdclk_funcs +ffffffff82944680 r i915gm_cdclk_funcs +ffffffff829446a0 r i915g_cdclk_funcs +ffffffff829446c0 r i865g_cdclk_funcs +ffffffff829446e0 r i85x_cdclk_funcs +ffffffff82944700 r i845g_cdclk_funcs +ffffffff82944720 r i830_cdclk_funcs +ffffffff82945000 r chv_color_funcs +ffffffff82945028 r i965_color_funcs +ffffffff82945050 r i9xx_color_funcs +ffffffff82945078 r icl_color_funcs +ffffffff829450a0 r glk_color_funcs +ffffffff829450c8 r skl_color_funcs +ffffffff829450f0 r bdw_color_funcs +ffffffff82945118 r hsw_color_funcs +ffffffff82945140 r ivb_color_funcs +ffffffff82945168 r ilk_color_funcs +ffffffff82945190 r ilk_csc_off_zero +ffffffff829451a0 r ilk_csc_coeff_rgb_to_ycbcr +ffffffff829451b2 r ilk_csc_postoff_rgb_to_ycbcr +ffffffff829451c0 r ilk_csc_coeff_limited_range +ffffffff829451d2 r ilk_csc_postoff_limited_range +ffffffff829451e0 r ilk_csc_coeff_identity +ffffffff82946000 r icl_procmon_values +ffffffff82947000 r force_audio_names +ffffffff82947040 r broadcast_rgb_names +ffffffff82948000 r intel_crt_connector_funcs +ffffffff82948078 r intel_crt_enc_funcs +ffffffff82948098 r intel_crt_connector_helper_funcs +ffffffff829480f0 r intel_spurious_crt_detect +ffffffff82949000 r g4x_crtc_funcs +ffffffff829490c0 r i965_crtc_funcs +ffffffff82949180 r i915gm_crtc_funcs +ffffffff82949240 r i915_crtc_funcs +ffffffff82949300 r i8xx_crtc_funcs +ffffffff829493c0 r bdw_crtc_funcs +ffffffff82949480 r ilk_crtc_funcs +ffffffff8294a000 r output_type_str +ffffffff8294a060 r output_format_str +ffffffff8294b000 r intel_cursor_plane_funcs +ffffffff8294b068 r intel_cursor_formats +ffffffff8294c000 r intel_ddi_funcs +ffffffff8294c020 r index_to_dp_signal_levels +ffffffff8294c030 r gen9_chicken_trans_reg_by_port.trans +ffffffff8294d000 r tgl_combo_phy_trans_edp_hbr2_hobl +ffffffff8294d010 r _tgl_combo_phy_trans_edp_hbr2_hobl +ffffffff8294d080 r dg2_snps_trans_uhbr +ffffffff8294d090 r dg2_snps_trans +ffffffff8294d0a0 r _dg2_snps_trans_uhbr +ffffffff8294d160 r _dg2_snps_trans +ffffffff8294d1d8 r icl_combo_phy_trans_hdmi +ffffffff8294d1f0 r _icl_combo_phy_trans_hdmi +ffffffff8294d248 r adlp_combo_phy_trans_edp_hbr3 +ffffffff8294d258 r adlp_combo_phy_trans_edp_up_to_hbr2 +ffffffff8294d270 r _adlp_combo_phy_trans_dp_hbr2_edp_hbr3 +ffffffff8294d2f0 r _adlp_combo_phy_trans_edp_hbr2 +ffffffff8294d368 r adlp_combo_phy_trans_dp_hbr2_hbr3 +ffffffff8294d378 r adlp_combo_phy_trans_dp_hbr +ffffffff8294d390 r _adlp_combo_phy_trans_dp_hbr2_hbr3 +ffffffff8294d410 r _adlp_combo_phy_trans_dp_hbr +ffffffff8294d488 r tgl_dkl_phy_trans_hdmi +ffffffff8294d4a0 r _tgl_dkl_phy_trans_hdmi +ffffffff8294d518 r adlp_dkl_phy_trans_dp_hbr2_hbr3 +ffffffff8294d528 r adlp_dkl_phy_trans_dp_hbr +ffffffff8294d540 r _adlp_dkl_phy_trans_dp_hbr2_hbr3 +ffffffff8294d5c0 r _adlp_dkl_phy_trans_dp_hbr +ffffffff8294d638 r adls_combo_phy_trans_edp_hbr3 +ffffffff8294d648 r adls_combo_phy_trans_edp_hbr2 +ffffffff8294d660 r _adls_combo_phy_trans_edp_hbr3 +ffffffff8294d6e0 r _adls_combo_phy_trans_edp_hbr2 +ffffffff8294d758 r adls_combo_phy_trans_dp_hbr2_hbr3 +ffffffff8294d768 r tgl_combo_phy_trans_dp_hbr +ffffffff8294d780 r _adls_combo_phy_trans_dp_hbr2_hbr3 +ffffffff8294d800 r _tgl_combo_phy_trans_dp_hbr +ffffffff8294d878 r icl_combo_phy_trans_dp_hbr2_edp_hbr3 +ffffffff8294d888 r icl_combo_phy_trans_edp_hbr2 +ffffffff8294d8a0 r _icl_combo_phy_trans_dp_hbr2_edp_hbr3 +ffffffff8294d920 r _icl_combo_phy_trans_edp_hbr2 +ffffffff8294d998 r rkl_combo_phy_trans_dp_hbr2_hbr3 +ffffffff8294d9a8 r rkl_combo_phy_trans_dp_hbr +ffffffff8294d9c0 r _rkl_combo_phy_trans_dp_hbr2_hbr3 +ffffffff8294da40 r _rkl_combo_phy_trans_dp_hbr +ffffffff8294dab8 r dg1_combo_phy_trans_dp_hbr2_hbr3 +ffffffff8294dac8 r dg1_combo_phy_trans_dp_rbr_hbr +ffffffff8294dae0 r _dg1_combo_phy_trans_dp_hbr2_hbr3 +ffffffff8294db60 r _dg1_combo_phy_trans_dp_rbr_hbr +ffffffff8294dbd8 r tgl_uy_combo_phy_trans_dp_hbr2 +ffffffff8294dbe8 r tgl_combo_phy_trans_dp_hbr2 +ffffffff8294dc00 r _tgl_uy_combo_phy_trans_dp_hbr2 +ffffffff8294dc80 r _tgl_combo_phy_trans_dp_hbr2 +ffffffff8294dcf8 r tgl_dkl_phy_trans_dp_hbr2 +ffffffff8294dd08 r tgl_dkl_phy_trans_dp_hbr +ffffffff8294dd20 r _tgl_dkl_phy_trans_dp_hbr2 +ffffffff8294dda0 r _tgl_dkl_phy_trans_dp_hbr +ffffffff8294de18 r jsl_combo_phy_trans_edp_hbr2 +ffffffff8294de28 r jsl_combo_phy_trans_edp_hbr +ffffffff8294de40 r _jsl_combo_phy_trans_edp_hbr2 +ffffffff8294dec0 r _jsl_combo_phy_trans_edp_hbr +ffffffff8294df38 r ehl_combo_phy_trans_dp +ffffffff8294df48 r ehl_combo_phy_trans_edp_hbr2 +ffffffff8294df60 r _ehl_combo_phy_trans_edp_hbr2 +ffffffff8294dfe0 r _ehl_combo_phy_trans_dp +ffffffff8294e058 r icl_mg_phy_trans_hdmi +ffffffff8294e070 r _icl_mg_phy_trans_hdmi +ffffffff8294e0e8 r icl_mg_phy_trans_hbr2_hbr3 +ffffffff8294e0f8 r icl_mg_phy_trans_rbr_hbr +ffffffff8294e110 r _icl_mg_phy_trans_hbr2_hbr3 +ffffffff8294e190 r _icl_mg_phy_trans_rbr_hbr +ffffffff8294e208 r bxt_trans_hdmi +ffffffff8294e218 r bxt_trans_edp +ffffffff8294e228 r bxt_trans_dp +ffffffff8294e240 r _bxt_trans_hdmi +ffffffff8294e2c0 r _bxt_trans_edp +ffffffff8294e340 r _bxt_trans_dp +ffffffff8294e3b8 r skl_y_trans_hdmi +ffffffff8294e3c8 r skl_y_trans_edp +ffffffff8294e3d8 r kbl_y_trans_dp +ffffffff8294e3f0 r _skl_y_trans_hdmi +ffffffff8294e480 r _skl_y_trans_edp +ffffffff8294e500 r _kbl_y_trans_dp +ffffffff8294e570 r skl_trans_hdmi +ffffffff8294e580 r skl_u_trans_edp +ffffffff8294e590 r kbl_u_trans_dp +ffffffff8294e5a0 r _skl_trans_hdmi +ffffffff8294e630 r _skl_u_trans_edp +ffffffff8294e6b0 r _kbl_u_trans_dp +ffffffff8294e720 r skl_trans_edp +ffffffff8294e730 r kbl_trans_dp +ffffffff8294e740 r _skl_trans_edp +ffffffff8294e7c0 r _kbl_trans_dp +ffffffff8294e830 r skl_y_trans_dp +ffffffff8294e840 r _skl_y_trans_dp +ffffffff8294e8b0 r skl_u_trans_dp +ffffffff8294e8c0 r _skl_u_trans_dp +ffffffff8294e930 r skl_trans_dp +ffffffff8294e940 r _skl_trans_dp +ffffffff8294e9b0 r bdw_trans_fdi +ffffffff8294e9c0 r bdw_trans_hdmi +ffffffff8294e9d0 r bdw_trans_edp +ffffffff8294e9e0 r bdw_trans_dp +ffffffff8294e9f0 r _bdw_trans_fdi +ffffffff8294ea60 r _bdw_trans_hdmi +ffffffff8294eae0 r _bdw_trans_edp +ffffffff8294eb50 r _bdw_trans_dp +ffffffff8294ebc0 r hsw_trans_fdi +ffffffff8294ebd0 r hsw_trans_hdmi +ffffffff8294ebe0 r hsw_trans_dp +ffffffff8294ebf0 r _hsw_trans_fdi +ffffffff8294ec60 r _hsw_trans_hdmi +ffffffff8294ecf0 r _hsw_trans_dp +ffffffff8294f000 r load_detect_mode +ffffffff8294f078 r skl_display_funcs +ffffffff8294f0a0 r ddi_display_funcs +ffffffff8294f0c8 r pch_split_display_funcs +ffffffff8294f0f0 r vlv_display_funcs +ffffffff8294f118 r i9xx_display_funcs +ffffffff8294f158 r intel_mode_funcs +ffffffff8294f1a0 r intel_mode_config_funcs +ffffffff82950000 r wa_1409767108_buddy_page_masks +ffffffff82950050 r tgl_buddy_page_masks +ffffffff829500a0 r d13_port_domains +ffffffff82950100 r d12_port_domains +ffffffff82950140 r d11_port_domains +ffffffff82950180 r i9xx_port_domains +ffffffff82951000 r xelpdp_power_wells +ffffffff82951030 r xelpd_power_wells +ffffffff82951060 r dg1_power_wells +ffffffff829510a0 r adls_power_wells +ffffffff829510e0 r rkl_power_wells +ffffffff82951120 r tgl_power_wells +ffffffff82951170 r icl_power_wells +ffffffff829511a0 r glk_power_wells +ffffffff829511d0 r bxt_power_wells +ffffffff82951200 r skl_power_wells +ffffffff82951230 r chv_power_wells +ffffffff82951250 r bdw_power_wells +ffffffff82951270 r hsw_power_wells +ffffffff82951290 r vlv_power_wells +ffffffff829512b0 r i830_power_wells +ffffffff829512d0 r i9xx_power_wells +ffffffff829512e0 r i9xx_pwdoms_always_on +ffffffff829512f0 r .compoundliteral +ffffffff82951308 r .compoundliteral.6 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xe_lpd_rc_class_regs +ffffffff8299d420 r xe_lpd_rc_inst_regs +ffffffff8299d720 r empty_regs_list +ffffffff8299d720 r xe_lpd_vd_inst_regs +ffffffff8299da20 r xe_lpd_vec_class_regs +ffffffff8299da80 r xe_lpd_vec_inst_regs +ffffffff8299dd80 r xe_lpd_blt_inst_regs +ffffffff8299e080 r default_global_regs +ffffffff8299e110 r default_rc_class_regs +ffffffff8299f000 r _guc_log_init_sizes.sections +ffffffff829a1000 r guc_context_ops +ffffffff829a1080 r virtual_guc_context_ops +ffffffff829a1100 r virtual_parent_context_ops +ffffffff829a1180 r virtual_child_context_ops +ffffffff829a1200 r engine_class_guc_class_map +ffffffff829a1206 r guc_class_engine_class_map +ffffffff829a3000 r uc_ops_off +ffffffff829a3038 r uc_ops_on +ffffffff829a4000 r __uc_fw_auto_select.blobs_guc +ffffffff829a4160 r __uc_fw_auto_select.blobs_huc +ffffffff829a4290 r __uc_fw_auto_select.blobs_all +ffffffff829a5000 r hsw_render_ring_cmd_table +ffffffff829a5030 r gen7_render_cmd_table +ffffffff829a5050 r hsw_render_reg_tables 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kbl_gt1_info +ffffffff829af020 r kbl_gt2_info +ffffffff829af0e0 r kbl_gt3_info +ffffffff829af1a0 r cfl_gt1_info +ffffffff829af260 r cfl_gt2_info +ffffffff829af320 r cfl_gt3_info +ffffffff829af3e0 r cml_gt1_info +ffffffff829af4a0 r cml_gt2_info +ffffffff829af560 r icl_info +ffffffff829af620 r ehl_info +ffffffff829af6e0 r jsl_info +ffffffff829af7a0 r tgl_info +ffffffff829af860 r rkl_info +ffffffff829af920 r adl_s_info +ffffffff829af9e0 r adl_p_info +ffffffff829afaa0 r dg1_info +ffffffff829afb60 r dg2_info +ffffffff829afc20 r ats_m_info +ffffffff829afce0 r xelpmp_extra_gt +ffffffff829afd20 r mtl_info +ffffffff829b0000 r oa_formats +ffffffff829b0060 r gen8_update_reg_state_unlocked.flex_regs +ffffffff829b0080 r gen8_oa_mux_regs +ffffffff829b00a0 r gen12_oa_b_counters +ffffffff829b00e0 r gen12_oa_mux_regs +ffffffff829b1000 r i915_query_funcs +ffffffff829b2000 R i915_fence_ops +ffffffff829b3000 r rsgt_ops +ffffffff829b4000 r fence_ops +ffffffff829b5000 r i915_ttm_buddy_manager_func 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ilk_clock_gating_funcs +ffffffff829bb098 r g4x_clock_gating_funcs +ffffffff829bb0a0 r i965gm_clock_gating_funcs +ffffffff829bb0a8 r i965g_clock_gating_funcs +ffffffff829bb0b0 r gen3_clock_gating_funcs +ffffffff829bb0b8 r i85x_clock_gating_funcs +ffffffff829bb0c0 r i830_clock_gating_funcs +ffffffff829bb0c8 r nop_clock_gating_funcs +ffffffff829bb0d0 r ilk_wm_funcs +ffffffff829bb108 r nop_funcs +ffffffff829bb140 r vlv_wm_funcs +ffffffff829bb178 r g4x_wm_funcs +ffffffff829bb1b0 r pnv_wm_funcs +ffffffff829bb1e8 r i965_wm_funcs +ffffffff829bb220 r i9xx_wm_funcs +ffffffff829bb258 r i845_wm_funcs +ffffffff829bb290 r cxsr_latency_table +ffffffff829bc000 r dg2_g10_revid_step_tbl +ffffffff829bc030 r dg2_g11_revid_step_tbl +ffffffff829bc050 r xehpsdv_revids +ffffffff829bc080 r adlp_revids +ffffffff829bc0c0 r adls_rpls_revids +ffffffff829bc100 r adls_revids +ffffffff829bc140 r rkl_revids +ffffffff829bc160 r bxt_revids +ffffffff829bc1a0 r skl_revids +ffffffff829bc1d0 r pvc_bd_subids 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atombios_helper_funcs +ffffffff829c2000 r voltage_names +ffffffff829c2020 r pre_emph_names +ffffffff829c3000 r radeon_atom_backlight_ops +ffffffff829c3018 r radeon_atom_enc_funcs +ffffffff829c3038 r radeon_atom_dig_helper_funcs +ffffffff829c30a0 r radeon_atom_dac_helper_funcs +ffffffff829c3108 r radeon_atom_ext_helper_funcs +ffffffff829c4000 r caicos_cgcg_cgls_default +ffffffff829c4240 r barts_mgcg_default +ffffffff829c4900 r turks_mgcg_default +ffffffff829c4d80 r caicos_mgcg_default +ffffffff829c5110 r turks_sysls_default +ffffffff829c51d0 r caicos_sysls_default +ffffffff829c5280 r caicos_cgcg_cgls_enable +ffffffff829c54d0 r caicos_cgcg_cgls_disable +ffffffff829c5730 r barts_mgcg_enable +ffffffff829c57b0 r turks_mgcg_enable +ffffffff829c5830 r caicos_mgcg_enable +ffffffff829c58b0 r caicos_mgcg_disable +ffffffff829c5930 r turks_sysls_enable +ffffffff829c59f0 r caicos_sysls_enable +ffffffff829c5aa0 r turks_sysls_disable +ffffffff829c5b60 r caicos_sysls_disable +ffffffff829c6000 r didt_config_ci +ffffffff829c65b4 r defaults_bonaire_xt +ffffffff829c6600 r defaults_saturn_xt +ffffffff829c664c r defaults_hawaii_xt +ffffffff829c6698 r defaults_hawaii_pro +ffffffff829c7000 r ci_program_jump_on_start.data +ffffffff829c8000 r bonaire_io_mc_regs +ffffffff829c8120 r hawaii_io_mc_regs +ffffffff829c81d0 r mc_cg_registers +ffffffff829c8200 r bonaire_mgcg_cgcg_init +ffffffff829c85e0 r bonaire_golden_registers +ffffffff829c87d0 r bonaire_golden_common_registers +ffffffff829c8800 r bonaire_golden_spm_registers +ffffffff829c8810 r kalindi_mgcg_cgcg_init +ffffffff829c8ab0 r kalindi_golden_registers +ffffffff829c8c20 r kalindi_golden_common_registers +ffffffff829c8c50 r kalindi_golden_spm_registers +ffffffff829c8c60 r godavari_golden_registers +ffffffff829c8de0 r spectre_mgcg_cgcg_init +ffffffff829c9200 r spectre_golden_registers +ffffffff829c9330 r spectre_golden_common_registers +ffffffff829c9360 r spectre_golden_spm_registers +ffffffff829c9370 r hawaii_mgcg_cgcg_init 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evergreen_golden_registers2 +ffffffff829cf310 r cypress_mgcg_init +ffffffff829cfa10 r juniper_mgcg_init +ffffffff829cfe80 r redwood_mgcg_init +ffffffff829d01b0 r cedar_golden_registers +ffffffff829d0390 r cedar_mgcg_init +ffffffff829d05f0 r wrestler_golden_registers +ffffffff829d0840 r supersumo_golden_registers +ffffffff829d0ba0 r sumo_golden_registers +ffffffff829d0be0 r barts_golden_registers +ffffffff829d0e00 r turks_golden_registers +ffffffff829d1040 r caicos_golden_registers +ffffffff829d1280 r sumo_rlc_save_restore_register_list +ffffffff829d13d0 r evergreen_cs_data +ffffffff829d1410 r SECT_CONTEXT_defs +ffffffff829d1490 r SECT_CLEAR_defs +ffffffff829d14b0 r SECT_CTRLCONST_defs +ffffffff829d14d0 r SECT_CONTEXT_def_2 +ffffffff829d14f0 r SECT_CONTEXT_def_4 +ffffffff829d1680 r SECT_CONTEXT_def_5 +ffffffff829d16a0 r SECT_CONTEXT_def_6 +ffffffff829d1780 r SECT_CONTEXT_def_1 +ffffffff829d1f20 r SECT_CONTEXT_def_3 +ffffffff829d2000 r SECT_CONTEXT_def_7 +ffffffff829d2488 r SECT_CLEAR_def_1 +ffffffff829d2494 r SECT_CTRLCONST_def_1 +ffffffff829d24a0 r evergreen_default_state +ffffffff829d3000 r cayman_reg_safe_bm +ffffffff829d5000 r evergreen_reg_safe_bm +ffffffff829d8000 r evergreen_hdmi_write_sad_regs.eld_reg_to_type +ffffffff829d9000 r didt_config_kv +ffffffff829da000 r barts_io_mc_regs +ffffffff829da0f0 r turks_io_mc_regs +ffffffff829da1e0 r caicos_io_mc_regs +ffffffff829da2d0 r cayman_io_mc_regs +ffffffff829da3c0 r cayman_golden_registers +ffffffff829da580 r cayman_golden_registers2 +ffffffff829da5d0 r dvst_golden_registers +ffffffff829da860 r dvst_golden_registers2 +ffffffff829da890 r scrapper_golden_registers +ffffffff829dad70 r tn_rlc_save_restore_register_list +ffffffff829daf60 r cayman_cs_data +ffffffff829dafa0 r SECT_CONTEXT_defs +ffffffff829db020 r SECT_CLEAR_defs +ffffffff829db040 r SECT_CTRLCONST_defs +ffffffff829db060 r SECT_CONTEXT_def_2 +ffffffff829db080 r SECT_CONTEXT_def_4 +ffffffff829db210 r SECT_CONTEXT_def_5 +ffffffff829db230 r SECT_CONTEXT_def_1 +ffffffff829db9d0 r SECT_CONTEXT_def_3 +ffffffff829dbab0 r SECT_CONTEXT_def_6 +ffffffff829dbb90 r SECT_CONTEXT_def_7 +ffffffff829dc018 r SECT_CLEAR_def_1 +ffffffff829dc024 r SECT_CTRLCONST_def_1 +ffffffff829dc030 r cayman_default_state +ffffffff829dd000 r cac_weights_cayman_xt +ffffffff829dd128 r cac_weights_cayman_pro +ffffffff829dd250 r cac_weights_cayman_le +ffffffff829dd380 r cayman_cgcg_cgls_default +ffffffff829dd5c0 r cayman_mgcg_default +ffffffff829ddf20 r cayman_sysls_default +ffffffff829ddff0 r cayman_cgcg_cgls_enable +ffffffff829de240 r cayman_cgcg_cgls_disable +ffffffff829de4a0 r cayman_mgcg_enable +ffffffff829de520 r cayman_mgcg_disable +ffffffff829de5a0 r cayman_sysls_enable +ffffffff829de670 r cayman_sysls_disable +ffffffff829df000 r rn50_reg_safe_bm +ffffffff829df1a0 r r100_reg_safe_bm +ffffffff829e0000 r r200_reg_safe_bm +ffffffff829e1000 r r300_reg_safe_bm +ffffffff829e2000 r r420_reg_safe_bm +ffffffff829e4000 r color_formats_table +ffffffff829e4480 r r600_reg_safe_bm +ffffffff829e7000 R r600_utc +ffffffff829e7040 R r600_dtc +ffffffff829e7080 r r600_encode_pci_lane_width.encoded_lanes +ffffffff829e9000 r r100_gfx_ring +ffffffff829e9070 r r300_gfx_ring +ffffffff829e90e0 r rv515_gfx_ring +ffffffff829e9150 r r600_gfx_ring +ffffffff829e91c0 r r600_dma_ring +ffffffff829e9230 r rv6xx_uvd_ring +ffffffff829e92a0 r rv770_uvd_ring +ffffffff829e9310 r evergreen_gfx_ring +ffffffff829e9380 r evergreen_dma_ring +ffffffff829e93f0 r cayman_gfx_ring +ffffffff829e9460 r cayman_dma_ring +ffffffff829e94d0 r cayman_uvd_ring +ffffffff829e9540 r trinity_vce_ring +ffffffff829e95b0 r si_gfx_ring +ffffffff829e9620 r si_dma_ring +ffffffff829e9690 r ci_gfx_ring +ffffffff829e9700 r ci_cp_ring +ffffffff829e9770 r ci_dma_ring +ffffffff829e97e0 r ci_vce_ring +ffffffff829ea000 r object_connector_convert +ffffffff829ea060 r supported_devices_connector_convert +ffffffff829ea0a0 r supported_devices_connector_object_id_convert +ffffffff829ea0c0 r thermal_controller_names +ffffffff829ea100 r pp_lib_thermal_controller_names +ffffffff829eb000 r pin_offsets +ffffffff829eb020 r radeon_audio_acr.hdmi_predefined_acr +ffffffff829ed000 r thermal_controller_names +ffffffff829ed020 r default_primarydac_adj +ffffffff829ed120 r default_tvdac_adj +ffffffff829ed220 r default_tmds_pll +ffffffff829ee000 r radeon_dp_connector_helper_funcs +ffffffff829ee050 r radeon_vga_connector_helper_funcs +ffffffff829ee0a0 r radeon_dvi_connector_helper_funcs +ffffffff829ee0f0 r radeon_tv_connector_helper_funcs +ffffffff829ee140 r radeon_lvds_connector_helper_funcs +ffffffff829ee190 r radeon_dp_connector_funcs +ffffffff829ee298 r radeon_lvds_bridge_connector_funcs +ffffffff829ee310 r radeon_vga_connector_funcs +ffffffff829ee388 r radeon_dvi_connector_funcs +ffffffff829ee400 r radeon_edp_connector_funcs +ffffffff829ee478 r radeon_tv_connector_funcs +ffffffff829ee4f0 r radeon_lvds_connector_funcs +ffffffff829ef000 r radeon_family_name +ffffffff829ef3f0 r radeon_px_quirk_list +ffffffff829f0000 r radeon_fb_funcs +ffffffff829f0018 r radeon_mode_funcs +ffffffff829f0060 r radeon_tmds_pll_enum_list +ffffffff829f0080 r radeon_tv_std_enum_list +ffffffff829f0100 r radeon_underscan_enum_list +ffffffff829f0130 r radeon_audio_enum_list +ffffffff829f0160 r radeon_dither_enum_list +ffffffff829f0180 r radeon_output_csc_enum_list +ffffffff829f01c0 r radeon_crtc_funcs +ffffffff829f0280 r hpd_names +ffffffff829f02b0 r encoder_names +ffffffff829f03e0 r radeon_afmt_init.eg_offsets +ffffffff829f1000 r aux_offset +ffffffff829f2000 R radeondrm_ca +ffffffff829f2030 r pciidlist +ffffffff829f61d0 r kms_driver +ffffffff829f62c0 r radeon_ioctls_kms +ffffffff829f7000 r radeon_fb_helper_funcs +ffffffff829f7008 r radeonfb_ops +ffffffff829f8000 R radeon_fence_ops +ffffffff829fa000 R radeon_gem_object_funcs +ffffffff829fa060 r radeon_gem_vm_ops +ffffffff829fb000 r radeon_i2c_algo +ffffffff829fb010 r radeon_atom_i2c_algo +ffffffff829fc000 r legacy_helper_funcs +ffffffff829fd000 r radeon_backlight_ops +ffffffff829fd018 r radeon_legacy_lvds_enc_funcs +ffffffff829fd038 r radeon_legacy_lvds_helper_funcs +ffffffff829fd0a0 r radeon_legacy_tmds_int_enc_funcs +ffffffff829fd0c0 r radeon_legacy_tmds_int_helper_funcs +ffffffff829fd128 r radeon_legacy_primary_dac_enc_funcs +ffffffff829fd148 r radeon_legacy_primary_dac_helper_funcs +ffffffff829fd1b0 r radeon_legacy_tv_dac_enc_funcs +ffffffff829fd1d0 r radeon_legacy_tv_dac_helper_funcs +ffffffff829fd238 r radeon_legacy_tmds_ext_enc_funcs +ffffffff829fd258 r radeon_legacy_tmds_ext_helper_funcs +ffffffff829fe000 r SLOPE_value +ffffffff829fe030 r YCOEF_EN_value +ffffffff829fe060 r YCOEF_value +ffffffff829fe090 r available_tv_modes +ffffffff829fe110 r hor_timing_NTSC +ffffffff829fe150 r vert_timing_NTSC +ffffffff829fe190 r hor_timing_PAL +ffffffff829fe1d0 r vert_timing_PAL +ffffffff82a00000 r radeon_pm_state_type_name +ffffffff82a01000 r radeon_evict_flags.placements +ffffffff82a04000 r rs600_reg_safe_bm +ffffffff82a06000 r rv515_reg_safe_bm +ffffffff82a07000 r dll_speed_table +ffffffff82a08000 r r7xx_golden_registers +ffffffff82a08090 r r7xx_golden_dyn_gpr_registers +ffffffff82a08100 r rv770ce_golden_registers +ffffffff82a08160 r rv770_golden_registers +ffffffff82a081b0 r rv770_mgcg_init +ffffffff82a088f0 r rv730_golden_registers +ffffffff82a08950 r rv730_mgcg_init +ffffffff82a08ee0 r rv710_golden_registers +ffffffff82a08f30 r rv710_mgcg_init +ffffffff82a091d0 r rv740_golden_registers +ffffffff82a09360 r rv740_mgcg_init +ffffffff82a0b000 r rv730_smc_int_vectors +ffffffff82a0b040 r rv710_smc_int_vectors +ffffffff82a0b080 r rv740_smc_int_vectors +ffffffff82a0b0c0 r cypress_smc_int_vectors +ffffffff82a0b100 r caicos_smc_int_vectors +ffffffff82a0b140 r cayman_smc_int_vectors +ffffffff82a0c000 r tahiti_io_mc_regs +ffffffff82a0c120 r pitcairn_io_mc_regs +ffffffff82a0c240 r verde_io_mc_regs +ffffffff82a0c360 r oland_io_mc_regs +ffffffff82a0c480 r hainan_io_mc_regs +ffffffff82a0c5a0 r crtc_offsets +ffffffff82a0c5c0 r si_disp_int_status +ffffffff82a0c5e0 r tahiti_golden_registers +ffffffff82a0c760 r tahiti_golden_rlc_registers +ffffffff82a0c7b0 r tahiti_mgcg_cgcg_init +ffffffff82a0cd98 r tahiti_golden_registers2 +ffffffff82a0cdb0 r pitcairn_golden_registers +ffffffff82a0cf00 r pitcairn_golden_rlc_registers +ffffffff82a0cf40 r pitcairn_mgcg_cgcg_init +ffffffff82a0d3b0 r verde_golden_registers +ffffffff82a0d620 r verde_golden_rlc_registers +ffffffff82a0d660 r verde_mgcg_cgcg_init +ffffffff82a0dae0 r oland_golden_registers +ffffffff82a0dc30 r oland_golden_rlc_registers +ffffffff82a0dc70 r oland_mgcg_cgcg_init +ffffffff82a0e000 r hainan_golden_registers +ffffffff82a0e12c r hainan_golden_registers2 +ffffffff82a0e140 r hainan_mgcg_cgcg_init +ffffffff82a0e4b0 r verde_rlc_save_restore_register_list +ffffffff82a0e820 r si_cs_data +ffffffff82a0e840 r si_SECT_CONTEXT_defs +ffffffff82a0e8c0 r si_SECT_CONTEXT_def_1 +ffffffff82a0ec10 r si_SECT_CONTEXT_def_3 +ffffffff82a0ec30 r si_SECT_CONTEXT_def_4 +ffffffff82a0eea4 r si_SECT_CONTEXT_def_5 +ffffffff82a0eea8 r si_SECT_CONTEXT_def_6 +ffffffff82a0eeb0 r si_SECT_CONTEXT_def_2 +ffffffff82a0f2f0 r si_SECT_CONTEXT_def_7 +ffffffff82a0f6a0 r mc_cg_registers +ffffffff82a0f6d0 r si_default_state +ffffffff82a10000 r cac_weights_tahiti +ffffffff82a104d0 r lcac_tahiti +ffffffff82a10ba0 r cac_override_tahiti +ffffffff82a10bb4 r powertune_data_tahiti +ffffffff82a10bf0 r dte_data_tahiti +ffffffff82a10cc0 r dte_data_new_zealand +ffffffff82a10d90 r dte_data_malta +ffffffff82a10e60 r lcac_pitcairn +ffffffff82a11530 r cac_override_pitcairn +ffffffff82a11544 r powertune_data_pitcairn +ffffffff82a11580 r lcac_cape_verde +ffffffff82a119d0 r cac_override_cape_verde +ffffffff82a119e4 r powertune_data_cape_verde +ffffffff82a11a20 r cac_weights_cape_verde_pro +ffffffff82a11ef0 r cac_weights_heathrow +ffffffff82a123c0 r cac_weights_chelsea_xt +ffffffff82a12890 r cac_weights_chelsea_pro +ffffffff82a12d60 r cac_weights_cape_verde +ffffffff82a13230 r cac_weights_mars_pro +ffffffff82a13700 r lcac_mars_pro +ffffffff82a13a60 r cac_override_oland +ffffffff82a13a74 r powertune_data_mars_pro +ffffffff82a13ab0 r cac_weights_mars_xt +ffffffff82a13f80 r cac_weights_oland_pro +ffffffff82a14450 r cac_weights_oland_xt +ffffffff82a14920 r lcac_oland +ffffffff82a14c7c r powertune_data_oland +ffffffff82a14cb8 r dte_data_oland +ffffffff82a14d90 r cac_weights_hainan +ffffffff82a15254 r powertune_data_hainan +ffffffff82a15290 r dte_data_aruba_pro +ffffffff82a15360 r dte_data_tahiti_pro +ffffffff82a15430 r dte_data_curacao_pro +ffffffff82a15500 r dte_data_neptune_xt +ffffffff82a155d0 r dte_data_sun_xt +ffffffff82a156a0 r dte_data_venus_xtx +ffffffff82a15770 r dte_data_venus_xt +ffffffff82a15840 r dte_data_venus_pro +ffffffff82a15910 r dte_data_mars_pro +ffffffff82a16000 r si_program_jump_on_start.data +ffffffff82a17000 r sumo_dtc +ffffffff82a18000 r trinity_mgcg_shls_default +ffffffff82a18380 r trinity_sysls_enable +ffffffff82a18450 r trinity_sysls_disable +ffffffff82a1a000 r GC_BASE +ffffffff82a1a0a8 r HDP_BASE +ffffffff82a1a150 r MMHUB_BASE +ffffffff82a1a1f8 r ATHUB_BASE +ffffffff82a1a2a0 r NBIO_BASE +ffffffff82a1a348 r MP0_BASE +ffffffff82a1a3f0 r MP1_BASE +ffffffff82a1a498 r DF_BASE +ffffffff82a1a540 r OSSSYS_BASE +ffffffff82a1a5e8 r SDMA0_BASE +ffffffff82a1a690 r SDMA1_BASE +ffffffff82a1a738 r SDMA2_BASE +ffffffff82a1a7e0 r SDMA3_BASE +ffffffff82a1a888 r SDMA4_BASE +ffffffff82a1a930 r SMUIO_BASE +ffffffff82a1a9d8 r THM_BASE +ffffffff82a1aa80 r UMC_BASE +ffffffff82a1ab28 r VCN_BASE +ffffffff82a1b000 r amdgpu_afmt_predefined_acr +ffffffff82a1c000 r atom_op_names +ffffffff82a1c3e0 r opcode_table +ffffffff82a1cbd0 r atom_dst_to_src +ffffffff82a1cc50 r atom_io_names +ffffffff82a1cc80 r atom_table_names +ffffffff82a1ced0 r atom_iio_len +ffffffff82a1d000 r object_connector_convert +ffffffff82a1d058 R amdgpu_vbios_version_attr_group +ffffffff82a1e000 r voltage_names +ffffffff82a1e020 r pre_emph_names +ffffffff82a1f000 r amdgpu_atombios_encoder_backlight_ops +ffffffff82a21000 r amdgpu_benchmark.common_modes +ffffffff82a22000 r amdgpu_cgs_ops +ffffffff82a23000 r amdgpu_connector_dp_helper_funcs +ffffffff82a23050 r amdgpu_connector_vga_helper_funcs +ffffffff82a230a0 r amdgpu_connector_dvi_helper_funcs +ffffffff82a230f0 r amdgpu_connector_lvds_helper_funcs +ffffffff82a23140 r amdgpu_connector_dp_funcs +ffffffff82a231c0 r amdgpu_connector_add_common_modes.common_modes +ffffffff82a23248 r amdgpu_connector_edp_funcs +ffffffff82a232c0 r amdgpu_connector_vga_funcs +ffffffff82a23338 r amdgpu_connector_dvi_funcs +ffffffff82a233b0 r amdgpu_connector_lvds_funcs +ffffffff82a25000 R amdgpu_ctx_num_entities +ffffffff82a26000 r amdgpu_device_ip_reinit_late_sriov.ip_order +ffffffff82a27000 r hw_id_map +ffffffff82a27090 r hw_id_names +ffffffff82a28000 r hpd_names +ffffffff82a28030 r encoder_names +ffffffff82a28180 r dcc_retile_formats +ffffffff82a28270 r dcc_formats +ffffffff82a28360 R amdgpu_mode_funcs +ffffffff82a283b0 r amdgpu_underscan_enum_list +ffffffff82a283e0 r amdgpu_audio_enum_list +ffffffff82a28410 r amdgpu_dither_enum_list +ffffffff82a28430 r amdgpu_fb_funcs +ffffffff82a29000 R amdgpu_dmabuf_ops +ffffffff82a2a000 R amdgpu_ioctls_kms +ffffffff82a2a210 R amdgpu_ca +ffffffff82a2a240 r pciidlist +ffffffff82a2b110 r amdgpu_unsupported_pciidlist +ffffffff82a2b690 r amdgpu_kms_driver +ffffffff82a2c000 r amdgpu_job_fence_ops +ffffffff82a2c038 r amdgpu_fence_ops +ffffffff82a2d000 r amdgpu_gem_object_funcs +ffffffff82a2d060 r amdgpu_gem_vm_ops +ffffffff82a2f000 R amdgpu_gtt_mgr_attr_group +ffffffff82a2f018 r amdgpu_gtt_mgr_func +ffffffff82a30000 r amdgpu_atombios_i2c_algo +ffffffff82a31000 R amdgpu_sched_ops +ffffffff82a34000 r amdgpu_vram_names +ffffffff82a35000 r amdgpu_preempt_mgr_func +ffffffff82a36000 R psp_ip_funcs +ffffffff82a360a0 R psp_v3_1_ip_block +ffffffff82a360b8 R psp_v10_0_ip_block +ffffffff82a360d0 R psp_v11_0_ip_block +ffffffff82a360e8 R psp_v11_0_8_ip_block +ffffffff82a36100 R psp_v12_0_ip_block +ffffffff82a36118 R psp_v13_0_ip_block +ffffffff82a36130 R psp_v13_0_4_ip_block +ffffffff82a38000 r amdgpu_evict_flags.placements +ffffffff82a3c000 R amdgpu_vkms_ip_block +ffffffff82a3e000 R amdgpu_vm_cpu_funcs +ffffffff82a40000 R amdgpu_vm_sdma_funcs +ffffffff82a41000 R amdgpu_vram_mgr_attr_group +ffffffff82a41018 r amdgpu_vram_mgr_func +ffffffff82a42000 r xgmi_pcs_err_status_reg_arct +ffffffff82a43000 r GC_BASE +ffffffff82a430c0 r HDP_BASE +ffffffff82a43180 r MMHUB_BASE +ffffffff82a43240 r ATHUB_BASE +ffffffff82a43300 r NBIF0_BASE +ffffffff82a433c0 r MP0_BASE +ffffffff82a43480 r MP1_BASE +ffffffff82a43540 r UVD_BASE +ffffffff82a43600 r DF_BASE +ffffffff82a436c0 r OSSSYS_BASE +ffffffff82a43780 r SDMA0_BASE +ffffffff82a43840 r SDMA1_BASE +ffffffff82a43900 r SDMA2_BASE +ffffffff82a439c0 r SDMA3_BASE +ffffffff82a43a80 r SDMA4_BASE +ffffffff82a43b40 r SDMA5_BASE +ffffffff82a43c00 r SDMA6_BASE +ffffffff82a43cc0 r SDMA7_BASE +ffffffff82a43d80 r SMUIO_BASE +ffffffff82a43e40 r THM_BASE +ffffffff82a43f00 r UMC_BASE +ffffffff82a43fc0 r RSMU_BASE +ffffffff82a45000 r cz_ih_ip_funcs +ffffffff82a450a0 R cz_ih_ip_block +ffffffff82a450b8 r cz_ih_funcs ffffffff82a46000 r crtc_offsets -ffffffff82a46020 r dce_v11_0_ip_funcs -ffffffff82a460c0 R dce_v11_0_ip_block -ffffffff82a460d8 R dce_v11_2_ip_block -ffffffff82a460f0 r dce_v11_0_display_funcs +ffffffff82a46020 r dce_v10_0_ip_funcs +ffffffff82a460c0 R dce_v10_0_ip_block +ffffffff82a460d8 R dce_v10_1_ip_block +ffffffff82a460f0 r dce_v10_0_display_funcs ffffffff82a46150 r hpd_offsets -ffffffff82a46168 r dce_v11_0_encoder_funcs -ffffffff82a46188 r dce_v11_0_dac_helper_funcs -ffffffff82a461f0 r dce_v11_0_dig_helper_funcs -ffffffff82a46258 r dce_v11_0_ext_helper_funcs -ffffffff82a462c0 r dce_v11_0_audio_write_sad_regs.eld_reg_to_type -ffffffff82a462f0 r dce_v11_0_crtc_irq_funcs -ffffffff82a46300 r dce_v11_0_pageflip_irq_funcs -ffffffff82a46310 r dce_v11_0_hpd_irq_funcs +ffffffff82a46168 r dce_v10_0_encoder_funcs +ffffffff82a46188 r dce_v10_0_dac_helper_funcs +ffffffff82a461f0 r dce_v10_0_dig_helper_funcs +ffffffff82a46258 r dce_v10_0_ext_helper_funcs +ffffffff82a462c0 r dce_v10_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82a462f0 r dce_v10_0_crtc_irq_funcs +ffffffff82a46300 r dce_v10_0_pageflip_irq_funcs +ffffffff82a46310 r dce_v10_0_hpd_irq_funcs ffffffff82a46320 r interrupt_status_offsets -ffffffff82a46380 r dce_v11_0_crtc_funcs -ffffffff82a46440 r dce_v11_0_crtc_helper_funcs +ffffffff82a46380 r dce_v10_0_crtc_funcs +ffffffff82a46440 r dce_v10_0_crtc_helper_funcs ffffffff82a464c0 r vga_control_regs ffffffff82a464e0 r dig_offsets -ffffffff82a46510 r cz_mgcg_cgcg_init -ffffffff82a46530 r cz_golden_settings_a11 -ffffffff82a46550 r stoney_golden_settings_a11 -ffffffff82a46570 r polaris11_golden_settings_a11 -ffffffff82a465b0 r polaris10_golden_settings_a11 -ffffffff82a47000 R df_v1_7_funcs -ffffffff82a47070 r df_v1_7_channel_number -ffffffff82a48000 R df_v3_6_funcs -ffffffff82a48070 r df_v3_6_channel_number -ffffffff82a49000 r GC_BASE -ffffffff82a490a8 r HDP_BASE -ffffffff82a49150 r MMHUB_BASE -ffffffff82a491f8 r ATHUB_BASE -ffffffff82a492a0 r NBIO_BASE -ffffffff82a49348 r MP0_BASE -ffffffff82a493f0 r MP1_BASE -ffffffff82a49498 r VCN0_BASE -ffffffff82a49540 r DF_BASE -ffffffff82a495e8 r DCN_BASE -ffffffff82a49690 r OSSSYS_BASE -ffffffff82a49738 r SMUIO_BASE -ffffffff82a497e0 r THM_BASE -ffffffff82a4a000 r gfx_v10_0_ip_funcs -ffffffff82a4a0a0 R gfx_v10_0_ip_block -ffffffff82a4a0b8 r gfx_v10_0_kiq_pm4_funcs -ffffffff82a4a0f8 r gfx_v10_0_ring_funcs_kiq -ffffffff82a4a218 r gfx_v10_0_ring_funcs_gfx -ffffffff82a4a338 r gfx_v10_0_ring_funcs_compute -ffffffff82a4a458 r gfx_v10_0_eop_irq_funcs -ffffffff82a4a468 r gfx_v10_0_kiq_irq_funcs -ffffffff82a4a478 r gfx_v10_0_priv_reg_irq_funcs -ffffffff82a4a488 r gfx_v10_0_priv_inst_irq_funcs -ffffffff82a4a498 r gfx_v10_0_rlc_funcs -ffffffff82a4a500 r gfx_v10_0_rlc_funcs_sriov -ffffffff82a4a570 r gfx10_cs_data -ffffffff82a4a590 r gfx10_SECT_CONTEXT_defs -ffffffff82a4a620 r gfx10_SECT_CONTEXT_def_1 -ffffffff82a4a980 r gfx10_SECT_CONTEXT_def_3 -ffffffff82a4a990 r gfx10_SECT_CONTEXT_def_4 -ffffffff82a4ac08 r gfx10_SECT_CONTEXT_def_5 -ffffffff82a4ac10 r gfx10_SECT_CONTEXT_def_6 -ffffffff82a4ac20 r gfx10_SECT_CONTEXT_def_2 -ffffffff82a4b060 r gfx10_SECT_CONTEXT_def_7 -ffffffff82a4b170 r gfx10_SECT_CONTEXT_def_8 -ffffffff82a4b4a0 r gfx_v10_0_gfx_funcs -ffffffff82a4b4e0 r golden_settings_gc_rlc_spm_10_0_nv10 -ffffffff82a51780 r golden_settings_gc_rlc_spm_10_1_nv14 -ffffffff82a551a0 r golden_settings_gc_rlc_spm_10_1_2_nv12 -ffffffff82a5b440 r golden_settings_gc_10_1 -ffffffff82a5b800 r golden_settings_gc_10_0_nv10 -ffffffff82a5b800 r golden_settings_gc_10_1_1 -ffffffff82a5bb90 r golden_settings_gc_10_1_2 -ffffffff82a5bb90 r golden_settings_gc_10_1_nv14 -ffffffff82a5bf80 r golden_settings_gc_10_1_2_nv12 -ffffffff82a5bf80 r golden_settings_gc_10_3 -ffffffff82a5c388 r golden_settings_gc_10_3_sienna_cichlid -ffffffff82a5c390 r golden_settings_gc_10_3_2 -ffffffff82a5c780 r golden_settings_gc_10_3_vangogh -ffffffff82a5c9e0 r golden_settings_gc_10_3_3 -ffffffff82a5cbc0 r golden_settings_gc_10_3_4 -ffffffff82a5cf20 r golden_settings_gc_10_3_5 -ffffffff82a5d220 r golden_settings_gc_10_0_cyan_skillfish -ffffffff82a5d550 r golden_settings_gc_10_3_6 -ffffffff82a5d760 r golden_settings_gc_10_3_7 -ffffffff82a5e000 r gfx_v11_0_ip_funcs -ffffffff82a5e0a0 R gfx_v11_0_ip_block -ffffffff82a5e0b8 r gfx_v11_0_kiq_pm4_funcs -ffffffff82a5e0f8 r gfx_v11_0_ring_funcs_kiq -ffffffff82a5e218 r gfx_v11_0_ring_funcs_gfx -ffffffff82a5e338 r gfx_v11_0_ring_funcs_compute -ffffffff82a5e458 r gfx_v11_0_eop_irq_funcs -ffffffff82a5e468 r gfx_v11_0_priv_reg_irq_funcs -ffffffff82a5e478 r gfx_v11_0_priv_inst_irq_funcs -ffffffff82a5e488 r gfx_v11_0_rlc_funcs -ffffffff82a5e4f0 r gfx11_cs_data -ffffffff82a5e510 r gfx11_SECT_CONTEXT_defs -ffffffff82a5e590 r gfx11_SECT_CONTEXT_def_1 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golden_settings_vegam_a11 -ffffffff82a62480 r vegam_golden_common_all -ffffffff82a624d0 r golden_settings_polaris11_a11 -ffffffff82a625a0 r polaris11_golden_common_all -ffffffff82a625f0 r golden_settings_polaris10_a11 -ffffffff82a626c0 r polaris10_golden_common_all -ffffffff82a62720 r cz_mgcg_cgcg_init -ffffffff82a62ab0 r cz_golden_settings_a11 -ffffffff82a62b40 r cz_golden_common_all -ffffffff82a62ba0 r stoney_mgcg_cgcg_init -ffffffff82a62be0 r stoney_golden_settings_a11 -ffffffff82a62c60 r stoney_golden_common_all -ffffffff82a63000 R gfx_v9_0_ras_ops -ffffffff82a63040 r gfx_v9_0_ip_funcs -ffffffff82a630e0 R gfx_v9_0_ip_block -ffffffff82a63100 r ras_gfx_subblocks -ffffffff82a63b80 r gfx_v9_0_edc_counter_regs -ffffffff82a63f20 r gfx_v9_0_ras_fields -ffffffff82a65000 r gfx_v9_0_kiq_pm4_funcs -ffffffff82a65040 r gfx_v9_0_ring_funcs_kiq -ffffffff82a65160 r gfx_v9_0_ring_funcs_gfx -ffffffff82a65280 r gfx_v9_0_ring_funcs_compute -ffffffff82a653a0 r gfx_v9_0_eop_irq_funcs -ffffffff82a653b0 r gfx_v9_0_priv_reg_irq_funcs -ffffffff82a653c0 r gfx_v9_0_priv_inst_irq_funcs -ffffffff82a653d0 r gfx_v9_0_cp_ecc_error_irq_funcs -ffffffff82a653e0 r gfx_v9_0_rlc_funcs -ffffffff82a65450 r gfx9_cs_data -ffffffff82a65470 r gfx9_SECT_CONTEXT_defs -ffffffff82a65500 r gfx9_SECT_CONTEXT_def_1 -ffffffff82a65850 r gfx9_SECT_CONTEXT_def_3 -ffffffff82a65860 r gfx9_SECT_CONTEXT_def_4 -ffffffff82a65ad4 r gfx9_SECT_CONTEXT_def_5 -ffffffff82a65adc r gfx9_SECT_CONTEXT_def_6 -ffffffff82a65ae0 r gfx9_SECT_CONTEXT_def_7 -ffffffff82a65bf0 r gfx9_SECT_CONTEXT_def_2 -ffffffff82a66060 r gfx9_SECT_CONTEXT_def_8 -ffffffff82a662d0 r vgpr_init_compute_shader_arcturus -ffffffff82a66b60 r vgpr_init_regs_arcturus -ffffffff82a66cf0 r vgpr_init_regs -ffffffff82a66e80 r sgpr1_init_regs -ffffffff82a67010 r sgpr2_init_regs -ffffffff82a67198 r gfx_v9_0_gfx_funcs -ffffffff82a671e0 r golden_settings_gc_9_0 -ffffffff82a673c0 r golden_settings_gc_9_0_vg10 -ffffffff82a67570 r golden_settings_gc_9_2_1 -ffffffff82a676f0 r golden_settings_gc_9_2_1_vg12 -ffffffff82a67830 r golden_settings_gc_9_0_vg20 -ffffffff82a67940 r golden_settings_gc_9_4_1_arct -ffffffff82a67a50 r golden_settings_gc_9_1 -ffffffff82a67c90 r golden_settings_gc_9_1_rv2 -ffffffff82a67e60 r golden_settings_gc_9_1_rv1 -ffffffff82a67f10 r golden_settings_gc_9_1_rn -ffffffff82a68030 r golden_settings_gc_9_x_common -ffffffff82a69000 R gfx_v9_4_ras_ops -ffffffff82a69040 r gfx_v9_4_edc_counter_regs -ffffffff82a69420 r gfx_v9_4_ras_fields -ffffffff82a6b000 R vgpr_init_regs_aldebaran -ffffffff82a6b1b0 R sgpr112_init_regs_aldebaran -ffffffff82a6b360 R sgpr96_init_regs_aldebaran -ffffffff82a6b510 R sgpr64_init_regs_aldebaran -ffffffff82a6b6c0 r golden_settings_gc_9_4_2_alde -ffffffff82a6b720 r golden_settings_gc_9_4_2_alde_die_0 -ffffffff82a6b7b0 r golden_settings_gc_9_4_2_alde_die_1 -ffffffff82a6b840 r sgpr112_init_compute_shader_aldebaran -ffffffff82a6ba60 r sgpr96_init_compute_shader_aldebaran -ffffffff82a6bc50 r sgpr64_init_compute_shader_aldebaran -ffffffff82a6bdc0 r vgpr_init_compute_shader_aldebaran -ffffffff82a6c6a0 r gfx_v9_4_2_edc_counter_regs -ffffffff82a6ca20 r gfx_v9_4_2_ras_fields -ffffffff82a6e3c0 r gfx_v9_4_2_utc_blocks -ffffffff82a6f000 R gfxhub_v1_0_funcs -ffffffff82a70000 R gfxhub_v2_0_funcs -ffffffff82a70060 r gfxhub_v2_0_vmhub_funcs -ffffffff82a70070 r gfxhub_client_ids -ffffffff82a71000 R gfxhub_v2_1_funcs -ffffffff82a71060 r gfxhub_v2_1_vmhub_funcs +ffffffff82a46500 r pin_offsets +ffffffff82a46520 r fiji_mgcg_cgcg_init +ffffffff82a46540 r golden_settings_fiji_a10 +ffffffff82a46570 r tonga_mgcg_cgcg_init +ffffffff82a46590 r golden_settings_tonga_a11 +ffffffff82a47000 r crtc_offsets +ffffffff82a47020 r dce_v11_0_ip_funcs +ffffffff82a470c0 R dce_v11_0_ip_block +ffffffff82a470d8 R dce_v11_2_ip_block +ffffffff82a470f0 r dce_v11_0_display_funcs +ffffffff82a47150 r hpd_offsets +ffffffff82a47168 r dce_v11_0_encoder_funcs +ffffffff82a47188 r dce_v11_0_dac_helper_funcs +ffffffff82a471f0 r dce_v11_0_dig_helper_funcs +ffffffff82a47258 r dce_v11_0_ext_helper_funcs +ffffffff82a472c0 r dce_v11_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82a472f0 r dce_v11_0_crtc_irq_funcs +ffffffff82a47300 r dce_v11_0_pageflip_irq_funcs +ffffffff82a47310 r dce_v11_0_hpd_irq_funcs +ffffffff82a47320 r interrupt_status_offsets +ffffffff82a47380 r dce_v11_0_crtc_funcs +ffffffff82a47440 r dce_v11_0_crtc_helper_funcs +ffffffff82a474c0 r vga_control_regs +ffffffff82a474e0 r dig_offsets +ffffffff82a47510 r cz_mgcg_cgcg_init +ffffffff82a47530 r cz_golden_settings_a11 +ffffffff82a47550 r stoney_golden_settings_a11 +ffffffff82a47570 r polaris11_golden_settings_a11 +ffffffff82a475b0 r polaris10_golden_settings_a11 +ffffffff82a48000 R df_v1_7_funcs +ffffffff82a48070 r df_v1_7_channel_number +ffffffff82a49000 R df_v3_6_funcs +ffffffff82a49070 r df_v3_6_channel_number +ffffffff82a4a000 r GC_BASE +ffffffff82a4a0a8 r HDP_BASE +ffffffff82a4a150 r MMHUB_BASE +ffffffff82a4a1f8 r ATHUB_BASE +ffffffff82a4a2a0 r NBIO_BASE +ffffffff82a4a348 r MP0_BASE +ffffffff82a4a3f0 r MP1_BASE +ffffffff82a4a498 r VCN0_BASE +ffffffff82a4a540 r DF_BASE +ffffffff82a4a5e8 r DCN_BASE +ffffffff82a4a690 r OSSSYS_BASE +ffffffff82a4a738 r SMUIO_BASE +ffffffff82a4a7e0 r THM_BASE +ffffffff82a4b000 r gfx_v10_0_ip_funcs +ffffffff82a4b0a0 R gfx_v10_0_ip_block +ffffffff82a4b0b8 r gfx_v10_0_kiq_pm4_funcs +ffffffff82a4b0f8 r gfx_v10_0_ring_funcs_kiq +ffffffff82a4b218 r gfx_v10_0_ring_funcs_gfx +ffffffff82a4b338 r gfx_v10_0_ring_funcs_compute +ffffffff82a4b458 r gfx_v10_0_eop_irq_funcs +ffffffff82a4b468 r gfx_v10_0_kiq_irq_funcs +ffffffff82a4b478 r gfx_v10_0_priv_reg_irq_funcs +ffffffff82a4b488 r gfx_v10_0_priv_inst_irq_funcs +ffffffff82a4b498 r gfx_v10_0_rlc_funcs +ffffffff82a4b500 r gfx_v10_0_rlc_funcs_sriov +ffffffff82a4b570 r gfx10_cs_data +ffffffff82a4b590 r gfx10_SECT_CONTEXT_defs +ffffffff82a4b620 r gfx10_SECT_CONTEXT_def_1 +ffffffff82a4b980 r gfx10_SECT_CONTEXT_def_3 +ffffffff82a4b990 r gfx10_SECT_CONTEXT_def_4 +ffffffff82a4bc08 r gfx10_SECT_CONTEXT_def_5 +ffffffff82a4bc10 r gfx10_SECT_CONTEXT_def_6 +ffffffff82a4bc20 r gfx10_SECT_CONTEXT_def_2 +ffffffff82a4c060 r gfx10_SECT_CONTEXT_def_7 +ffffffff82a4c170 r gfx10_SECT_CONTEXT_def_8 +ffffffff82a4c4a0 r gfx_v10_0_gfx_funcs +ffffffff82a4c4e0 r golden_settings_gc_rlc_spm_10_0_nv10 +ffffffff82a52780 r golden_settings_gc_rlc_spm_10_1_nv14 +ffffffff82a561a0 r golden_settings_gc_rlc_spm_10_1_2_nv12 +ffffffff82a5c440 r golden_settings_gc_10_1 +ffffffff82a5c800 r golden_settings_gc_10_0_nv10 +ffffffff82a5c800 r golden_settings_gc_10_1_1 +ffffffff82a5cb90 r golden_settings_gc_10_1_2 +ffffffff82a5cb90 r golden_settings_gc_10_1_nv14 +ffffffff82a5cf80 r golden_settings_gc_10_1_2_nv12 +ffffffff82a5cf80 r golden_settings_gc_10_3 +ffffffff82a5d388 r golden_settings_gc_10_3_sienna_cichlid +ffffffff82a5d390 r golden_settings_gc_10_3_2 +ffffffff82a5d780 r golden_settings_gc_10_3_vangogh +ffffffff82a5d9e0 r golden_settings_gc_10_3_3 +ffffffff82a5dbc0 r golden_settings_gc_10_3_4 +ffffffff82a5df20 r golden_settings_gc_10_3_5 +ffffffff82a5e220 r golden_settings_gc_10_0_cyan_skillfish +ffffffff82a5e550 r golden_settings_gc_10_3_6 +ffffffff82a5e760 r golden_settings_gc_10_3_7 +ffffffff82a5f000 r gfx_v11_0_ip_funcs +ffffffff82a5f0a0 R gfx_v11_0_ip_block +ffffffff82a5f0b8 r gfx_v11_0_kiq_pm4_funcs +ffffffff82a5f0f8 r gfx_v11_0_ring_funcs_kiq +ffffffff82a5f218 r gfx_v11_0_ring_funcs_gfx +ffffffff82a5f338 r gfx_v11_0_ring_funcs_compute +ffffffff82a5f458 r gfx_v11_0_eop_irq_funcs +ffffffff82a5f468 r gfx_v11_0_priv_reg_irq_funcs +ffffffff82a5f478 r gfx_v11_0_priv_inst_irq_funcs +ffffffff82a5f488 r gfx_v11_0_rlc_funcs +ffffffff82a5f4f0 r gfx11_cs_data +ffffffff82a5f510 r gfx11_SECT_CONTEXT_defs +ffffffff82a5f590 r gfx11_SECT_CONTEXT_def_1 +ffffffff82a5f8f0 r gfx11_SECT_CONTEXT_def_3 +ffffffff82a5f900 r gfx11_SECT_CONTEXT_def_5 +ffffffff82a5f908 r gfx11_SECT_CONTEXT_def_6 +ffffffff82a5f910 r gfx11_SECT_CONTEXT_def_2 +ffffffff82a5fd50 r gfx11_SECT_CONTEXT_def_4 +ffffffff82a5ffd0 r gfx11_SECT_CONTEXT_def_7 +ffffffff82a60438 r gfx_v11_0_gfx_funcs +ffffffff82a60480 r golden_settings_gc_11_0_1 +ffffffff82a61000 r gfx_v8_0_ip_funcs +ffffffff82a610a0 R gfx_v8_0_ip_block +ffffffff82a610b8 R gfx_v8_1_ip_block +ffffffff82a610d0 r gfx_v8_0_gfx_funcs +ffffffff82a61110 r gfx_v8_0_ring_funcs_kiq +ffffffff82a61230 r gfx_v8_0_ring_funcs_gfx +ffffffff82a61350 r gfx_v8_0_ring_funcs_compute +ffffffff82a61470 r amdgpu_gds_reg_offset +ffffffff82a61570 r gfx_v8_0_eop_irq_funcs +ffffffff82a61580 r gfx_v8_0_priv_reg_irq_funcs +ffffffff82a61590 r gfx_v8_0_priv_inst_irq_funcs +ffffffff82a615a0 r gfx_v8_0_cp_ecc_error_irq_funcs +ffffffff82a615b0 r gfx_v8_0_sq_irq_funcs +ffffffff82a615c0 r sq_edc_source_names +ffffffff82a615f8 r iceland_rlc_funcs +ffffffff82a61660 r vi_cs_data +ffffffff82a61680 r vi_SECT_CONTEXT_defs +ffffffff82a61700 r vi_SECT_CONTEXT_def_1 +ffffffff82a61a50 r vi_SECT_CONTEXT_def_3 +ffffffff82a61a70 r vi_SECT_CONTEXT_def_4 +ffffffff82a61ce4 r vi_SECT_CONTEXT_def_5 +ffffffff82a61cec r vi_SECT_CONTEXT_def_6 +ffffffff82a61cf0 r vi_SECT_CONTEXT_def_2 +ffffffff82a62140 r vi_SECT_CONTEXT_def_7 +ffffffff82a624f0 r vgpr_init_compute_shader +ffffffff82a62600 r vgpr_init_regs +ffffffff82a62690 r sgpr1_init_regs +ffffffff82a62720 r sgpr2_init_regs +ffffffff82a627b0 r sec_ded_counter_registers +ffffffff82a62820 r iceland_mgcg_cgcg_init +ffffffff82a62b20 r golden_settings_iceland_a11 +ffffffff82a62be0 r iceland_golden_common_all +ffffffff82a62c40 r fiji_mgcg_cgcg_init +ffffffff82a62df0 r golden_settings_fiji_a10 +ffffffff82a62e80 r fiji_golden_common_all +ffffffff82a62f00 r tonga_mgcg_cgcg_init +ffffffff82a63290 r golden_settings_tonga_a11 +ffffffff82a63350 r tonga_golden_common_all +ffffffff82a633b0 r golden_settings_vegam_a11 +ffffffff82a63480 r vegam_golden_common_all +ffffffff82a634d0 r golden_settings_polaris11_a11 +ffffffff82a635a0 r polaris11_golden_common_all +ffffffff82a635f0 r golden_settings_polaris10_a11 +ffffffff82a636c0 r polaris10_golden_common_all +ffffffff82a63720 r cz_mgcg_cgcg_init +ffffffff82a63ab0 r cz_golden_settings_a11 +ffffffff82a63b40 r cz_golden_common_all +ffffffff82a63ba0 r stoney_mgcg_cgcg_init +ffffffff82a63be0 r stoney_golden_settings_a11 +ffffffff82a63c60 r stoney_golden_common_all +ffffffff82a64000 R gfx_v9_0_ras_ops +ffffffff82a64040 r gfx_v9_0_ip_funcs +ffffffff82a640e0 R gfx_v9_0_ip_block +ffffffff82a64100 r ras_gfx_subblocks +ffffffff82a64b80 r gfx_v9_0_edc_counter_regs +ffffffff82a64f20 r gfx_v9_0_ras_fields +ffffffff82a66000 r gfx_v9_0_kiq_pm4_funcs +ffffffff82a66040 r gfx_v9_0_ring_funcs_kiq +ffffffff82a66160 r gfx_v9_0_ring_funcs_gfx +ffffffff82a66280 r gfx_v9_0_ring_funcs_compute +ffffffff82a663a0 r gfx_v9_0_eop_irq_funcs +ffffffff82a663b0 r gfx_v9_0_priv_reg_irq_funcs +ffffffff82a663c0 r gfx_v9_0_priv_inst_irq_funcs +ffffffff82a663d0 r gfx_v9_0_cp_ecc_error_irq_funcs +ffffffff82a663e0 r gfx_v9_0_rlc_funcs +ffffffff82a66450 r gfx9_cs_data +ffffffff82a66470 r gfx9_SECT_CONTEXT_defs +ffffffff82a66500 r gfx9_SECT_CONTEXT_def_1 +ffffffff82a66850 r gfx9_SECT_CONTEXT_def_3 +ffffffff82a66860 r gfx9_SECT_CONTEXT_def_4 +ffffffff82a66ad4 r gfx9_SECT_CONTEXT_def_5 +ffffffff82a66adc r gfx9_SECT_CONTEXT_def_6 +ffffffff82a66ae0 r gfx9_SECT_CONTEXT_def_7 +ffffffff82a66bf0 r gfx9_SECT_CONTEXT_def_2 +ffffffff82a67060 r gfx9_SECT_CONTEXT_def_8 +ffffffff82a672d0 r vgpr_init_compute_shader_arcturus +ffffffff82a67b60 r vgpr_init_regs_arcturus +ffffffff82a67cf0 r vgpr_init_regs +ffffffff82a67e80 r sgpr1_init_regs +ffffffff82a68010 r sgpr2_init_regs +ffffffff82a68198 r gfx_v9_0_gfx_funcs +ffffffff82a681e0 r golden_settings_gc_9_0 +ffffffff82a683c0 r golden_settings_gc_9_0_vg10 +ffffffff82a68570 r golden_settings_gc_9_2_1 +ffffffff82a686f0 r golden_settings_gc_9_2_1_vg12 +ffffffff82a68830 r golden_settings_gc_9_0_vg20 +ffffffff82a68940 r golden_settings_gc_9_4_1_arct +ffffffff82a68a50 r golden_settings_gc_9_1 +ffffffff82a68c90 r golden_settings_gc_9_1_rv2 +ffffffff82a68e60 r golden_settings_gc_9_1_rv1 +ffffffff82a68f10 r golden_settings_gc_9_1_rn +ffffffff82a69030 r golden_settings_gc_9_x_common +ffffffff82a6a000 R gfx_v9_4_ras_ops +ffffffff82a6a040 r gfx_v9_4_edc_counter_regs +ffffffff82a6a420 r gfx_v9_4_ras_fields +ffffffff82a6c000 R vgpr_init_regs_aldebaran +ffffffff82a6c1b0 R sgpr112_init_regs_aldebaran +ffffffff82a6c360 R sgpr96_init_regs_aldebaran +ffffffff82a6c510 R sgpr64_init_regs_aldebaran +ffffffff82a6c6c0 r golden_settings_gc_9_4_2_alde +ffffffff82a6c720 r golden_settings_gc_9_4_2_alde_die_0 +ffffffff82a6c7b0 r golden_settings_gc_9_4_2_alde_die_1 +ffffffff82a6c840 r sgpr112_init_compute_shader_aldebaran +ffffffff82a6ca60 r sgpr96_init_compute_shader_aldebaran +ffffffff82a6cc50 r sgpr64_init_compute_shader_aldebaran +ffffffff82a6cdc0 r vgpr_init_compute_shader_aldebaran +ffffffff82a6d6a0 r gfx_v9_4_2_edc_counter_regs +ffffffff82a6da20 r gfx_v9_4_2_ras_fields +ffffffff82a6f3c0 r gfx_v9_4_2_utc_blocks +ffffffff82a70000 R gfxhub_v1_0_funcs +ffffffff82a71000 R gfxhub_v2_0_funcs +ffffffff82a71060 r gfxhub_v2_0_vmhub_funcs ffffffff82a71070 r gfxhub_client_ids -ffffffff82a72000 R gfxhub_v3_0_funcs -ffffffff82a72060 r gfxhub_v3_0_vmhub_funcs +ffffffff82a72000 R gfxhub_v2_1_funcs +ffffffff82a72060 r gfxhub_v2_1_vmhub_funcs ffffffff82a72070 r gfxhub_client_ids -ffffffff82a73000 R gfxhub_v3_0_3_funcs -ffffffff82a73060 r gfxhub_v3_0_3_vmhub_funcs +ffffffff82a73000 R gfxhub_v3_0_funcs +ffffffff82a73060 r gfxhub_v3_0_vmhub_funcs ffffffff82a73070 r gfxhub_client_ids -ffffffff82a74000 R gmc_v10_0_ip_funcs -ffffffff82a740a0 R gmc_v10_0_ip_block -ffffffff82a740b8 r gmc_v10_0_gmc_funcs -ffffffff82a74100 r gmc_v10_0_irq_funcs -ffffffff82a74110 r gmc_v10_0_ecc_funcs -ffffffff82a75000 R gmc_v11_0_ip_funcs -ffffffff82a750a0 R gmc_v11_0_ip_block -ffffffff82a750b8 r gmc_v11_0_gmc_funcs -ffffffff82a75100 r gmc_v11_0_irq_funcs -ffffffff82a75110 r gmc_v11_0_ecc_funcs -ffffffff82a76000 r gmc_v7_0_ip_funcs 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gfxhub_client_ids +ffffffff82a79190 r mmhub_client_ids_vega10 +ffffffff82a79480 r mmhub_client_ids_vega12 +ffffffff82a79780 r mmhub_client_ids_vega20 +ffffffff82a79a70 r mmhub_client_ids_arcturus +ffffffff82a7b280 r mmhub_client_ids_raven +ffffffff82a7b440 r mmhub_client_ids_renoir +ffffffff82a7b630 r mmhub_client_ids_aldebaran +ffffffff82a7ce40 r ecc_umc_mcumc_ctrl_addrs +ffffffff82a7cec0 r ecc_umc_mcumc_ctrl_mask_addrs +ffffffff82a7cf40 r golden_settings_mmhub_1_0_0 +ffffffff82a7cf70 r golden_settings_athub_1_0_0 +ffffffff82a7d000 R hdp_v4_0_funcs +ffffffff82a7e000 R hdp_v5_0_funcs +ffffffff82a7f000 R hdp_v5_2_funcs +ffffffff82a80000 R hdp_v6_0_funcs +ffffffff82a81000 r iceland_ih_ip_funcs +ffffffff82a810a0 R iceland_ih_ip_block +ffffffff82a810b8 r iceland_ih_funcs +ffffffff82a82000 r ih_v6_0_ip_funcs +ffffffff82a820a0 R ih_v6_0_ip_block +ffffffff82a820b8 r ih_v6_0_funcs +ffffffff82a820d8 r ih_v6_0_self_irq_funcs +ffffffff82a83000 R gfx_v11_0_imu_funcs +ffffffff82a83030 r imu_rlc_ram_golden_11 +ffffffff82a83680 r imu_rlc_ram_golden_11_0_2 +ffffffff82a84000 r imu_rlc_ram_golden_11_0_3 +ffffffff82a85000 r jpeg_v1_0_decode_ring_vm_funcs +ffffffff82a85120 r jpeg_v1_0_irq_funcs +ffffffff82a86000 r jpeg_v2_0_ip_funcs +ffffffff82a860a0 R jpeg_v2_0_ip_block +ffffffff82a860b8 r jpeg_v2_0_dec_ring_vm_funcs +ffffffff82a861d8 r jpeg_v2_0_irq_funcs +ffffffff82a87000 r jpeg_v2_5_ip_funcs +ffffffff82a870a0 R jpeg_v2_5_ip_block +ffffffff82a870b8 r jpeg_v2_6_ip_funcs +ffffffff82a87158 R jpeg_v2_6_ip_block +ffffffff82a87170 R jpeg_v2_6_ras_hw_ops +ffffffff82a871b0 r jpeg_v2_5_dec_ring_vm_funcs +ffffffff82a872d0 r jpeg_v2_6_dec_ring_vm_funcs +ffffffff82a873f0 r jpeg_v2_5_irq_funcs +ffffffff82a88000 r jpeg_v3_0_ip_funcs +ffffffff82a880a0 R jpeg_v3_0_ip_block +ffffffff82a880b8 r jpeg_v3_0_dec_ring_vm_funcs +ffffffff82a881d8 r jpeg_v3_0_irq_funcs +ffffffff82a89000 r jpeg_v4_0_ip_funcs +ffffffff82a890a0 R jpeg_v4_0_ip_block +ffffffff82a890b8 r jpeg_v4_0_dec_ring_vm_funcs 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mmhub_client_ids_sienna_cichlid +ffffffff82a91450 r mmhub_client_ids_beige_goby +ffffffff82a92000 R mmhub_v2_3_funcs +ffffffff82a92050 r mmhub_v2_3_vmhub_funcs +ffffffff82a92060 r mmhub_client_ids_vangogh +ffffffff82a93000 R mmhub_v3_0_funcs +ffffffff82a93050 r mmhub_v3_0_vmhub_funcs +ffffffff82a93060 r mmhub_client_ids_v3_0_0 +ffffffff82a94000 R mmhub_v3_0_1_funcs +ffffffff82a94050 r mmhub_v3_0_1_vmhub_funcs +ffffffff82a94060 r mmhub_client_ids_v3_0_1 +ffffffff82a95000 R mmhub_v3_0_2_funcs +ffffffff82a95050 r mmhub_v3_0_2_vmhub_funcs +ffffffff82a95060 r mmhub_client_ids_v3_0_2 +ffffffff82a96000 R mmhub_v9_4_ras_hw_ops +ffffffff82a96040 R mmhub_v9_4_funcs +ffffffff82a96090 r mmhub_v9_4_edc_cnt_regs +ffffffff82a96330 r mmhub_v9_4_ras_fields +ffffffff82a983b0 r mmhub_v9_4_err_status_regs +ffffffff82a99000 r xgpu_ai_mailbox_ack_irq_funcs +ffffffff82a99010 r xgpu_ai_mailbox_rcv_irq_funcs +ffffffff82a99020 R xgpu_ai_virt_ops +ffffffff82a9a000 r xgpu_nv_mailbox_ack_irq_funcs +ffffffff82a9a010 r xgpu_nv_mailbox_rcv_irq_funcs +ffffffff82a9a020 R xgpu_nv_virt_ops +ffffffff82a9b000 r xgpu_fiji_mgcg_cgcg_init +ffffffff82a9b240 r xgpu_fiji_golden_settings_a10 +ffffffff82a9b370 r xgpu_fiji_golden_common_all +ffffffff82a9b3f0 r xgpu_tonga_mgcg_cgcg_init +ffffffff82a9b810 r xgpu_tonga_golden_settings_a11 +ffffffff82a9b9d0 r xgpu_tonga_golden_common_all +ffffffff82a9ba28 r xgpu_vi_mailbox_ack_irq_funcs +ffffffff82a9ba38 r xgpu_vi_mailbox_rcv_irq_funcs +ffffffff82a9ba48 R xgpu_vi_virt_ops +ffffffff82a9c000 r navi10_ih_ip_funcs +ffffffff82a9c0a0 R navi10_ih_ip_block +ffffffff82a9c0b8 r navi10_ih_funcs +ffffffff82a9c0d8 r navi10_ih_self_irq_funcs +ffffffff82a9d000 R nbio_v2_3_hdp_flush_reg +ffffffff82a9d048 R nbio_v2_3_funcs +ffffffff82a9e000 R nbio_v4_3_hdp_flush_reg +ffffffff82a9e048 R nbio_v4_3_funcs +ffffffff82a9e130 R nbio_v4_3_sriov_funcs +ffffffff82a9f000 R nbio_v6_1_hdp_flush_reg +ffffffff82a9f048 R nbio_v6_1_funcs +ffffffff82aa0000 R nbio_v7_0_hdp_flush_reg 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+ffffffff82ab1000 R sdma_v5_0_ip_funcs +ffffffff82ab10a0 R sdma_v5_0_ip_block +ffffffff82ab10b8 r sdma_v5_0_ring_funcs +ffffffff82ab11d8 r sdma_v5_0_buffer_funcs +ffffffff82ab11f8 r sdma_v5_0_vm_pte_funcs +ffffffff82ab1218 r sdma_v5_0_trap_irq_funcs +ffffffff82ab1228 r sdma_v5_0_illegal_inst_irq_funcs +ffffffff82ab1240 r golden_settings_sdma_5 +ffffffff82ab1480 r golden_settings_sdma_nv10 +ffffffff82ab14b0 r golden_settings_sdma_nv14 +ffffffff82ab14e0 r golden_settings_sdma_5_sriov +ffffffff82ab16c0 r golden_settings_sdma_nv12 +ffffffff82ab1750 r golden_settings_sdma_cyan_skillfish +ffffffff82ab2000 R sdma_v5_2_ip_funcs +ffffffff82ab20a0 R sdma_v5_2_ip_block +ffffffff82ab20b8 r sdma_v5_2_ring_funcs +ffffffff82ab21d8 r sdma_v5_2_buffer_funcs +ffffffff82ab21f8 r sdma_v5_2_vm_pte_funcs +ffffffff82ab2218 r sdma_v5_2_trap_irq_funcs +ffffffff82ab2228 r sdma_v5_2_illegal_inst_irq_funcs +ffffffff82ab3000 R sdma_v6_0_ip_funcs +ffffffff82ab30a0 R sdma_v6_0_ip_block +ffffffff82ab30b8 r sdma_v6_0_ring_funcs +ffffffff82ab31d8 r sdma_v6_0_buffer_funcs +ffffffff82ab31f8 r sdma_v6_0_vm_pte_funcs +ffffffff82ab3218 r sdma_v6_0_trap_irq_funcs +ffffffff82ab3228 r sdma_v6_0_illegal_inst_irq_funcs +ffffffff82ab4000 r smu_v11_0_i2c_algo +ffffffff82ab4010 r smu_v11_0_i2c_i2c_lock_ops +ffffffff82ab4028 r smu_v11_0_i2c_control_quirks +ffffffff82ab5000 R smuio_v11_0_funcs +ffffffff82ab6000 R smuio_v11_0_6_funcs +ffffffff82ab7000 R smuio_v13_0_funcs +ffffffff82ab8000 R smuio_v13_0_6_funcs +ffffffff82ab9000 R smuio_v9_0_funcs +ffffffff82aba000 r soc15_common_ip_funcs +ffffffff82aba0a0 R vega10_common_ip_block +ffffffff82aba0b8 r soc15_asic_funcs +ffffffff82aba170 r vega20_asic_funcs +ffffffff82aba230 r soc15_allowed_read_registers +ffffffff82aba3c0 r vega_video_codecs_encode +ffffffff82aba3d0 r vega_video_codecs_decode +ffffffff82aba3e0 r rv_video_codecs_decode +ffffffff82aba3f0 r rn_video_codecs_decode +ffffffff82aba400 r vega_video_codecs_encode_array +ffffffff82aba430 r vega_video_codecs_decode_array +ffffffff82aba4b0 r rv_video_codecs_decode_array +ffffffff82aba540 r rn_video_codecs_decode_array +ffffffff82abb000 r soc21_common_ip_funcs +ffffffff82abb0a0 R soc21_common_ip_block +ffffffff82abb0b8 r soc21_asic_funcs +ffffffff82abb170 r soc21_allowed_read_registers +ffffffff82abb2f0 r vcn_4_0_0_video_codecs_encode +ffffffff82abb300 r vcn_4_0_0_video_codecs_decode +ffffffff82abb310 r vcn_4_0_0_video_codecs_encode_array +ffffffff82abb340 r vcn_4_0_0_video_codecs_decode_array +ffffffff82abc000 r tonga_ih_ip_funcs +ffffffff82abc0a0 R tonga_ih_ip_block +ffffffff82abc0b8 r tonga_ih_funcs +ffffffff82abd000 R umc_v6_0_funcs +ffffffff82abe000 R umc_v6_1_channel_idx_tbl +ffffffff82abe080 R umc_v6_1_ras_hw_ops +ffffffff82abf000 R umc_v6_7_channel_idx_tbl_second +ffffffff82abf080 R umc_v6_7_channel_idx_tbl_first +ffffffff82abf100 R umc_v6_7_ras_hw_ops +ffffffff82ac0000 R umc_v8_10_channelnum_map_colbit_table +ffffffff82ac0040 R umc_v8_10_channel_idx_tbl +ffffffff82ac00a0 R umc_v8_10_ras_hw_ops +ffffffff82ac1000 R umc_v8_7_channel_idx_tbl +ffffffff82ac1040 R umc_v8_7_ras_hw_ops +ffffffff82ac2000 r uvd_v5_0_ip_funcs +ffffffff82ac20a0 R uvd_v5_0_ip_block +ffffffff82ac20b8 r uvd_v5_0_ring_funcs +ffffffff82ac21d8 r uvd_v5_0_irq_funcs +ffffffff82ac3000 r uvd_v6_0_ip_funcs +ffffffff82ac30a0 R uvd_v6_0_ip_block +ffffffff82ac30b8 R uvd_v6_2_ip_block +ffffffff82ac30d0 R uvd_v6_3_ip_block +ffffffff82ac30e8 r uvd_v6_0_ring_vm_funcs +ffffffff82ac3208 r uvd_v6_0_ring_phys_funcs +ffffffff82ac3328 r uvd_v6_0_enc_ring_vm_funcs +ffffffff82ac3448 r uvd_v6_0_irq_funcs +ffffffff82ac4000 R uvd_v7_0_ip_funcs +ffffffff82ac40a0 R uvd_v7_0_ip_block +ffffffff82ac40b8 r uvd_v7_0_ring_vm_funcs +ffffffff82ac41d8 r uvd_v7_0_enc_ring_vm_funcs +ffffffff82ac42f8 r uvd_v7_0_irq_funcs +ffffffff82ac5000 r vce_v3_0_ip_funcs +ffffffff82ac50a0 R vce_v3_0_ip_block +ffffffff82ac50b8 R vce_v3_1_ip_block +ffffffff82ac50d0 R vce_v3_4_ip_block +ffffffff82ac50e8 r vce_v3_0_ring_vm_funcs +ffffffff82ac5208 r vce_v3_0_ring_phys_funcs +ffffffff82ac5328 r vce_v3_0_irq_funcs +ffffffff82ac6000 R vce_v4_0_ip_funcs +ffffffff82ac60a0 R vce_v4_0_ip_block +ffffffff82ac60b8 r vce_v4_0_ring_vm_funcs +ffffffff82ac61d8 r vce_v4_0_irq_funcs +ffffffff82ac7000 r vcn_v1_0_ip_funcs +ffffffff82ac70a0 R vcn_v1_0_ip_block +ffffffff82ac70b8 r vcn_v1_0_dec_ring_vm_funcs +ffffffff82ac71d8 r vcn_v1_0_enc_ring_vm_funcs +ffffffff82ac72f8 r vcn_v1_0_irq_funcs +ffffffff82ac8000 r vcn_v2_0_ip_funcs +ffffffff82ac80a0 R vcn_v2_0_ip_block +ffffffff82ac80b8 r vcn_v2_0_dec_ring_vm_funcs +ffffffff82ac81d8 r vcn_v2_0_enc_ring_vm_funcs +ffffffff82ac82f8 r vcn_v2_0_irq_funcs +ffffffff82ac9000 r vcn_v2_5_ip_funcs +ffffffff82ac90a0 R vcn_v2_5_ip_block +ffffffff82ac90b8 r vcn_v2_6_ip_funcs +ffffffff82ac9158 R vcn_v2_6_ip_block +ffffffff82ac9170 R vcn_v2_6_ras_hw_ops +ffffffff82ac91b0 r vcn_v2_5_dec_ring_vm_funcs +ffffffff82ac92d0 r vcn_v2_6_dec_ring_vm_funcs +ffffffff82ac93f0 r vcn_v2_5_enc_ring_vm_funcs +ffffffff82ac9510 r vcn_v2_6_enc_ring_vm_funcs +ffffffff82ac9630 r vcn_v2_5_irq_funcs +ffffffff82aca000 r vcn_v3_0_ip_funcs +ffffffff82aca0a0 R vcn_v3_0_ip_block +ffffffff82aca0b8 r vcn_v3_0_dec_ring_vm_funcs +ffffffff82aca1d8 r vcn_v3_0_enc_ring_vm_funcs +ffffffff82aca2f8 r vcn_v3_0_irq_funcs +ffffffff82acb000 r vcn_v4_0_ip_funcs +ffffffff82acb0a0 R vcn_v4_0_ip_block +ffffffff82acb0b8 r vcn_v4_0_unified_ring_vm_funcs +ffffffff82acb1d8 r vcn_v4_0_irq_funcs +ffffffff82acc000 R vega10_ih_ip_funcs +ffffffff82acc0a0 R vega10_ih_ip_block +ffffffff82acc0b8 r vega10_ih_funcs +ffffffff82acc0d8 r vega10_ih_self_irq_funcs +ffffffff82acd000 r GC_BASE +ffffffff82acd064 r HDP_BASE +ffffffff82acd0c8 r MMHUB_BASE +ffffffff82acd12c r ATHUB_BASE +ffffffff82acd190 r NBIO_BASE +ffffffff82acd1f4 r MP0_BASE +ffffffff82acd258 r MP1_BASE +ffffffff82acd2bc r VCE_BASE +ffffffff82acd320 r VCN_BASE +ffffffff82acd384 r DF_BASE +ffffffff82acd3e8 r DCE_BASE +ffffffff82acd44c r OSSSYS_BASE +ffffffff82acd4b0 r SDMA0_BASE +ffffffff82acd514 r SDMA1_BASE +ffffffff82acd578 r SMUIO_BASE +ffffffff82acd5dc r PWR_BASE +ffffffff82acd640 r NBIF_BASE +ffffffff82acd6a4 r THM_BASE +ffffffff82acd708 r CLK_BASE +ffffffff82ace000 R vega20_ih_ip_funcs +ffffffff82ace0a0 R vega20_ih_ip_block +ffffffff82ace0b8 r vega20_ih_funcs +ffffffff82ace0d8 r vega20_ih_self_irq_funcs +ffffffff82acf000 r GC_BASE +ffffffff82acf090 r HDP_BASE +ffffffff82acf120 r MMHUB_BASE +ffffffff82acf1b0 r ATHUB_BASE +ffffffff82acf240 r NBIO_BASE +ffffffff82acf2d0 r MP0_BASE +ffffffff82acf360 r MP1_BASE +ffffffff82acf3f0 r UVD_BASE +ffffffff82acf480 r VCE_BASE +ffffffff82acf510 r DF_BASE +ffffffff82acf5a0 r DCE_BASE +ffffffff82acf630 r OSSSYS_BASE +ffffffff82acf6c0 r SDMA0_BASE +ffffffff82acf750 r SDMA1_BASE +ffffffff82acf7e0 r SMUIO_BASE +ffffffff82acf870 r THM_BASE +ffffffff82acf900 r CLK_BASE +ffffffff82acf990 r UMC_BASE +ffffffff82acfa20 r RSMU_BASE +ffffffff82ad0000 r vi_common_ip_block +ffffffff82ad0018 r vi_common_ip_funcs +ffffffff82ad00b8 r vi_asic_funcs +ffffffff82ad0170 r vi_allowed_read_registers +ffffffff82ad03d0 r topaz_video_codecs_encode +ffffffff82ad03e0 r topaz_video_codecs_decode +ffffffff82ad03f0 r tonga_video_codecs_encode +ffffffff82ad0400 r tonga_video_codecs_decode +ffffffff82ad0410 r polaris_video_codecs_encode +ffffffff82ad0420 r cz_video_codecs_decode +ffffffff82ad0430 r tonga_video_codecs_encode_array +ffffffff82ad0450 r tonga_video_codecs_decode_array +ffffffff82ad04a0 r polaris_video_codecs_encode_array +ffffffff82ad04d0 r cz_video_codecs_decode_array +ffffffff82ad0550 r iceland_mgcg_cgcg_init +ffffffff82ad0590 r fiji_mgcg_cgcg_init +ffffffff82ad05f0 r tonga_mgcg_cgcg_init +ffffffff82ad0650 r cz_mgcg_cgcg_init +ffffffff82ad0690 r stoney_mgcg_cgcg_init +ffffffff82ad1000 r amdgpu_dm_funcs +ffffffff82ad10a0 R dm_ip_block +ffffffff82ad10b8 R amdgpu_dm_encoder_helper_funcs +ffffffff82ad1120 r dm_display_funcs +ffffffff82ad1180 r hpd_disconnect_quirk_table +ffffffff82ad1ef0 r amdgpu_dm_mode_funcs +ffffffff82ad1f38 r amdgpu_dm_encoder_funcs +ffffffff82ad1f58 r amdgpu_dm_connector_funcs +ffffffff82ad1fd0 r amdgpu_dm_connector_helper_funcs +ffffffff82ad2020 r amdgpu_dm_i2c_algo +ffffffff82ad21f0 r add_fs_modes.common_rates +ffffffff82ad2220 r amdgpu_dm_backlight_ops +ffffffff82ad3000 r amdgpu_dm_crtc_funcs +ffffffff82ad30c0 r amdgpu_dm_crtc_helper_funcs +ffffffff82ad4000 r dm_dtn_log_begin.msg +ffffffff82ad400d r dm_dtn_log_end.msg +ffffffff82ad4018 r SYNAPTICS_DEVICE_ID +ffffffff82ad5000 r dm_crtc_irq_funcs +ffffffff82ad5010 r dm_vline0_irq_funcs +ffffffff82ad5020 r dm_dmub_outbox_irq_funcs +ffffffff82ad5030 r dm_vupdate_irq_funcs +ffffffff82ad5040 r dm_dmub_trace_irq_funcs +ffffffff82ad5050 r dm_pageflip_irq_funcs +ffffffff82ad5060 r dm_hpd_irq_funcs +ffffffff82ad6000 r amdgpu_dm_encoder_funcs +ffffffff82ad6020 r dm_mst_cbs +ffffffff82ad6030 r dm_dp_mst_connector_funcs +ffffffff82ad60a8 r dm_dp_mst_connector_helper_funcs +ffffffff82ad7000 r dm_plane_funcs +ffffffff82ad7068 r dm_plane_helper_funcs ffffffff82ad9000 r vbios_funcs -ffffffff82ade000 r command_table_helper_funcs +ffffffff82ada000 r vbios_funcs ffffffff82adf000 r command_table_helper_funcs ffffffff82ae0000 r command_table_helper_funcs ffffffff82ae1000 r command_table_helper_funcs -ffffffff82ae2000 r dce80_max_clks_by_state -ffffffff82ae2028 r disp_clk_regs -ffffffff82ae207c r disp_clk_shift -ffffffff82ae2088 r disp_clk_mask -ffffffff82ae3000 r dce110_max_clks_by_state +ffffffff82ae2000 r command_table_helper_funcs +ffffffff82ae3000 r dce80_max_clks_by_state ffffffff82ae3028 r disp_clk_regs ffffffff82ae307c r disp_clk_shift ffffffff82ae3088 r disp_clk_mask -ffffffff82ae4000 r dce112_max_clks_by_state +ffffffff82ae4000 r dce110_max_clks_by_state ffffffff82ae4028 r disp_clk_regs ffffffff82ae407c r disp_clk_shift ffffffff82ae4088 r disp_clk_mask -ffffffff82ae5000 r dce120_max_clks_by_state -ffffffff82ae6000 r clk_mgr_regs -ffffffff82ae6054 r clk_mgr_shift -ffffffff82ae6060 r clk_mgr_mask +ffffffff82ae5000 r dce112_max_clks_by_state +ffffffff82ae5028 r disp_clk_regs +ffffffff82ae507c r disp_clk_shift +ffffffff82ae5088 r disp_clk_mask +ffffffff82ae6000 r dce120_max_clks_by_state ffffffff82ae7000 r clk_mgr_regs ffffffff82ae7054 r clk_mgr_shift ffffffff82ae7060 r clk_mgr_mask ffffffff82ae8000 r clk_mgr_regs ffffffff82ae8054 r clk_mgr_shift ffffffff82ae8060 r clk_mgr_mask -ffffffff82ae9000 r lpddr5_wm_table -ffffffff82ae90c0 r ddr5_wm_table +ffffffff82ae9000 r clk_mgr_regs +ffffffff82ae9054 r clk_mgr_shift +ffffffff82ae9060 r clk_mgr_mask ffffffff82aea000 r lpddr5_wm_table ffffffff82aea0c0 r ddr5_wm_table ffffffff82aeb000 r lpddr5_wm_table ffffffff82aeb0c0 r ddr5_wm_table ffffffff82aec000 r lpddr5_wm_table -ffffffff82aec0c0 r ddr4_wm_table -ffffffff82aed000 r clk_mgr_regs_dcn321 -ffffffff82aed054 r clk_mgr_shift_dcn321 -ffffffff82aed060 r clk_mgr_mask_dcn321 -ffffffff82aed084 r clk_mgr_regs_dcn32 -ffffffff82aed0d8 r clk_mgr_shift_dcn32 -ffffffff82aed0e4 r clk_mgr_mask_dcn32 -ffffffff82aee000 r DC_BUILD_ID -ffffffff82af0000 r output_csc_matrix -ffffffff82af00e0 r black_color_format -ffffffff82af1000 r DP_SINK_BRANCH_DEV_NAME_7580 -ffffffff82af2000 r DP_VGA_DONGLE_BRANCH_DEV_NAME -ffffffff82af2006 r DP_DVI_CONVERTER_ID_4 -ffffffff82af200d r DP_DVI_CONVERTER_ID_5 -ffffffff82af3000 r DP_VGA_LVDS_CONVERTER_ID_2 -ffffffff82af3007 r DP_VGA_LVDS_CONVERTER_ID_3 -ffffffff82af3010 r dp_lt_fallbacks -ffffffff82af4000 r mandatory_dpcd_partitions -ffffffff82af6000 r dce_funcs -ffffffff82af7000 r funcs -ffffffff82af8000 R video_optimized_pixel_rates -ffffffff82af81b0 r dce110_clk_src_funcs -ffffffff82af81d8 r dce112_clk_src_funcs -ffffffff82af8200 r dcn20_clk_src_funcs -ffffffff82af8228 r dcn3_clk_src_funcs -ffffffff82af8250 r dcn31_clk_src_funcs -ffffffff82af9000 r dce_funcs -ffffffff82af9068 r dcn10_funcs -ffffffff82af90d0 r dcn20_funcs -ffffffff82af9138 r dcn21_funcs -ffffffff82afa000 r dce_ipp_funcs -ffffffff82afb000 r dce110_lnk_enc_funcs -ffffffff82afc000 r dce_mi_funcs -ffffffff82afc090 r dce112_mi_funcs -ffffffff82afc120 r dce120_mi_funcs -ffffffff82afc1b0 r pte_settings -ffffffff82afd000 r funcs -ffffffff82afe000 r dce_link_panel_cntl_funcs -ffffffff82aff000 r filter_3tap_16p_upscale -ffffffff82aff040 r filter_3tap_16p_116 -ffffffff82aff080 r filter_3tap_16p_149 -ffffffff82aff0c0 r filter_3tap_16p_183 -ffffffff82aff100 r filter_3tap_64p_upscale -ffffffff82aff1d0 r filter_3tap_64p_116 -ffffffff82aff2a0 r filter_3tap_64p_149 -ffffffff82aff370 r filter_3tap_64p_183 -ffffffff82aff440 r filter_4tap_16p_upscale -ffffffff82aff490 r filter_4tap_16p_116 -ffffffff82aff4e0 r filter_4tap_16p_149 -ffffffff82aff530 r filter_4tap_16p_183 -ffffffff82aff580 r filter_4tap_64p_upscale -ffffffff82aff690 r filter_4tap_64p_116 -ffffffff82aff7a0 r filter_4tap_64p_149 -ffffffff82aff8b0 r filter_4tap_64p_183 -ffffffff82aff9c0 r filter_5tap_64p_upscale -ffffffff82affb10 r filter_5tap_64p_116 -ffffffff82affc60 r filter_5tap_64p_149 -ffffffff82affdb0 r filter_5tap_64p_183 -ffffffff82afff00 r filter_6tap_64p_upscale -ffffffff82b00090 r filter_6tap_64p_116 -ffffffff82b00220 r filter_6tap_64p_149 -ffffffff82b003b0 r filter_6tap_64p_183 -ffffffff82b00540 r filter_7tap_64p_upscale -ffffffff82b00710 r filter_7tap_64p_116 -ffffffff82b008e0 r filter_7tap_64p_149 -ffffffff82b00ab0 r filter_7tap_64p_183 -ffffffff82b00c80 r filter_8tap_64p_upscale -ffffffff82b00e90 r filter_8tap_64p_116 -ffffffff82b010a0 r filter_8tap_64p_149 -ffffffff82b012b0 r filter_8tap_64p_183 -ffffffff82b014c0 r filter_2tap_16p -ffffffff82b014f0 r filter_2tap_64p -ffffffff82b02000 r audio_clock_info_table_48bpc -ffffffff82b02190 r audio_clock_info_table_36bpc -ffffffff82b02320 r audio_clock_info_table -ffffffff82b024e0 r dce110_str_enc_funcs -ffffffff82b03000 r global_color_matrix -ffffffff82b030a8 r dce_transform_funcs -ffffffff82b04000 r abm_funcs -ffffffff82b05000 r psr_funcs -ffffffff82b05040 r DP_SINK_DEVICE_STR_ID_1 -ffffffff82b05045 r DP_SINK_DEVICE_STR_ID_2 -ffffffff82b06000 r reg_offsets -ffffffff82b07000 r bios_regs -ffffffff82b07008 r res_cap -ffffffff82b07050 r clk_src_regs -ffffffff82b0714c r dmcu_regs -ffffffff82b071a8 r dmcu_shift -ffffffff82b071bc r dmcu_mask -ffffffff82b07208 r abm_regs -ffffffff82b07248 r abm_shift -ffffffff82b0725c r abm_mask -ffffffff82b072b0 r dce100_tg_offsets -ffffffff82b072f8 r plane_cap -ffffffff82b07328 r res_create_funcs -ffffffff82b07358 r dce100_res_pool_funcs -ffffffff82b07440 r panel_cntl_regs -ffffffff82b07460 r panel_cntl_shift -ffffffff82b07470 r panel_cntl_mask -ffffffff82b074b0 r link_enc_regs -ffffffff82b07870 r link_enc_aux_regs -ffffffff82b078c0 r link_enc_hpd_regs -ffffffff82b078d8 r link_enc_feature -ffffffff82b078e8 r cs_shift -ffffffff82b078f4 r cs_mask -ffffffff82b07920 r mi_regs -ffffffff82b07c38 r mi_shifts -ffffffff82b07c80 r mi_masks -ffffffff82b07da0 r ipp_regs -ffffffff82b07f98 r ipp_shift -ffffffff82b07fc0 r ipp_mask -ffffffff82b08060 r xfm_regs -ffffffff82b08600 r xfm_shift -ffffffff82b08660 r xfm_mask -ffffffff82b087e0 r opp_regs -ffffffff82b08930 r opp_shift -ffffffff82b0895c r opp_mask -ffffffff82b08a10 r aux_engine_regs -ffffffff82b08b00 r aux_mask -ffffffff82b08b60 r aux_shift -ffffffff82b08b80 r i2c_hw_regs -ffffffff82b08cd0 r i2c_shifts -ffffffff82b08cfc r i2c_masks -ffffffff82b08da0 r audio_regs -ffffffff82b08ed4 r audio_shift -ffffffff82b08eec r audio_mask -ffffffff82b08f30 r stream_enc_regs -ffffffff82b095dc r se_shift -ffffffff82b09660 r se_mask -ffffffff82b09864 r hwseq_reg -ffffffff82b09a80 r hwseq_shift -ffffffff82b09b00 r hwseq_mask -ffffffff82b0a000 r reg_offsets -ffffffff82b0a018 r dce110_compressor_funcs -ffffffff82b0b000 r dce110_funcs -ffffffff82b0b2c0 r dce110_private_funcs -ffffffff82b0c000 r dce110_mem_input_v_funcs -ffffffff82b0c090 r dvmm_Hw_Setting_1DTiling -ffffffff82b0c120 r dvmm_Hw_Setting_2DTiling -ffffffff82b0c1b0 r dvmm_Hw_Setting_Linear -ffffffff82b0d000 r global_color_matrix -ffffffff82b0d0b0 r input_csc_matrix -ffffffff82b0e000 r funcs -ffffffff82b0f000 r bios_regs -ffffffff82b0f008 r dce110_res_pool_funcs -ffffffff82b0f0f0 r clk_src_regs -ffffffff82b0f1ec r dmcu_regs -ffffffff82b0f248 r dmcu_shift -ffffffff82b0f25c r dmcu_mask -ffffffff82b0f2a8 r abm_regs -ffffffff82b0f2e8 r abm_shift -ffffffff82b0f2fc r abm_mask -ffffffff82b0f350 r dce110_tg_offsets -ffffffff82b0f398 r res_create_funcs -ffffffff82b0f3c8 r plane_cap -ffffffff82b0f3f4 r underlay_plane_cap -ffffffff82b0f420 r stoney_resource_cap -ffffffff82b0f45c r carrizo_resource_cap -ffffffff82b0f4a0 r panel_cntl_regs -ffffffff82b0f4c0 r panel_cntl_shift -ffffffff82b0f4d0 r panel_cntl_mask -ffffffff82b0f510 r link_enc_regs -ffffffff82b0f8d0 r link_enc_aux_regs -ffffffff82b0f920 r link_enc_hpd_regs -ffffffff82b0f938 r link_enc_feature -ffffffff82b0f948 r cs_shift -ffffffff82b0f954 r cs_mask -ffffffff82b0f980 r mi_regs -ffffffff82b0fb0c r mi_shifts -ffffffff82b0fb54 r mi_masks -ffffffff82b0fc70 r ipp_regs -ffffffff82b0fd6c r ipp_shift -ffffffff82b0fd94 r ipp_mask -ffffffff82b0fe30 r xfm_regs -ffffffff82b10100 r xfm_shift -ffffffff82b10160 r xfm_mask -ffffffff82b102e0 r opp_regs -ffffffff82b10430 r opp_shift -ffffffff82b1045c r opp_mask -ffffffff82b10510 r aux_engine_regs -ffffffff82b10600 r aux_mask -ffffffff82b10660 r aux_shift -ffffffff82b10680 r i2c_hw_regs -ffffffff82b107d0 r i2c_shifts -ffffffff82b107fc r i2c_masks -ffffffff82b108a0 r audio_regs -ffffffff82b109d4 r audio_shift -ffffffff82b109ec r audio_mask -ffffffff82b10a30 r stream_enc_regs -ffffffff82b10d0c r se_shift -ffffffff82b10d90 r se_mask -ffffffff82b10f94 r hwseq_stoney_reg -ffffffff82b111b0 r hwseq_cz_reg -ffffffff82b113cc r hwseq_shift -ffffffff82b1144c r hwseq_mask -ffffffff82b12000 r dce110_tg_funcs -ffffffff82b13000 r dce110_tg_v_funcs -ffffffff82b14000 r dce110_xfmv_funcs -ffffffff82b15000 r reg_offsets +ffffffff82aec0c0 r ddr5_wm_table +ffffffff82aed000 r lpddr5_wm_table +ffffffff82aed0c0 r ddr4_wm_table +ffffffff82aee000 r clk_mgr_regs_dcn321 +ffffffff82aee054 r clk_mgr_shift_dcn321 +ffffffff82aee060 r clk_mgr_mask_dcn321 +ffffffff82aee084 r clk_mgr_regs_dcn32 +ffffffff82aee0d8 r clk_mgr_shift_dcn32 +ffffffff82aee0e4 r clk_mgr_mask_dcn32 +ffffffff82aef000 r DC_BUILD_ID +ffffffff82af1000 r output_csc_matrix +ffffffff82af10e0 r black_color_format +ffffffff82af2000 r DP_SINK_BRANCH_DEV_NAME_7580 +ffffffff82af3000 r DP_VGA_DONGLE_BRANCH_DEV_NAME +ffffffff82af3006 r DP_DVI_CONVERTER_ID_4 +ffffffff82af300d r DP_DVI_CONVERTER_ID_5 +ffffffff82af4000 r DP_VGA_LVDS_CONVERTER_ID_2 +ffffffff82af4007 r DP_VGA_LVDS_CONVERTER_ID_3 +ffffffff82af4010 r dp_lt_fallbacks +ffffffff82af5000 r mandatory_dpcd_partitions +ffffffff82af7000 r dce_funcs +ffffffff82af8000 r funcs +ffffffff82af9000 R video_optimized_pixel_rates +ffffffff82af91b0 r dce110_clk_src_funcs +ffffffff82af91d8 r dce112_clk_src_funcs +ffffffff82af9200 r dcn20_clk_src_funcs +ffffffff82af9228 r dcn3_clk_src_funcs +ffffffff82af9250 r dcn31_clk_src_funcs +ffffffff82afa000 r dce_funcs +ffffffff82afa068 r dcn10_funcs +ffffffff82afa0d0 r dcn20_funcs +ffffffff82afa138 r dcn21_funcs +ffffffff82afb000 r dce_ipp_funcs +ffffffff82afc000 r dce110_lnk_enc_funcs +ffffffff82afd000 r dce_mi_funcs +ffffffff82afd090 r dce112_mi_funcs +ffffffff82afd120 r dce120_mi_funcs +ffffffff82afd1b0 r pte_settings +ffffffff82afe000 r funcs +ffffffff82aff000 r dce_link_panel_cntl_funcs +ffffffff82b00000 r filter_3tap_16p_upscale +ffffffff82b00040 r filter_3tap_16p_116 +ffffffff82b00080 r filter_3tap_16p_149 +ffffffff82b000c0 r filter_3tap_16p_183 +ffffffff82b00100 r filter_3tap_64p_upscale +ffffffff82b001d0 r filter_3tap_64p_116 +ffffffff82b002a0 r filter_3tap_64p_149 +ffffffff82b00370 r filter_3tap_64p_183 +ffffffff82b00440 r filter_4tap_16p_upscale +ffffffff82b00490 r filter_4tap_16p_116 +ffffffff82b004e0 r filter_4tap_16p_149 +ffffffff82b00530 r filter_4tap_16p_183 +ffffffff82b00580 r filter_4tap_64p_upscale +ffffffff82b00690 r filter_4tap_64p_116 +ffffffff82b007a0 r filter_4tap_64p_149 +ffffffff82b008b0 r filter_4tap_64p_183 +ffffffff82b009c0 r filter_5tap_64p_upscale +ffffffff82b00b10 r filter_5tap_64p_116 +ffffffff82b00c60 r filter_5tap_64p_149 +ffffffff82b00db0 r filter_5tap_64p_183 +ffffffff82b00f00 r filter_6tap_64p_upscale +ffffffff82b01090 r filter_6tap_64p_116 +ffffffff82b01220 r filter_6tap_64p_149 +ffffffff82b013b0 r filter_6tap_64p_183 +ffffffff82b01540 r filter_7tap_64p_upscale +ffffffff82b01710 r filter_7tap_64p_116 +ffffffff82b018e0 r filter_7tap_64p_149 +ffffffff82b01ab0 r filter_7tap_64p_183 +ffffffff82b01c80 r filter_8tap_64p_upscale +ffffffff82b01e90 r filter_8tap_64p_116 +ffffffff82b020a0 r filter_8tap_64p_149 +ffffffff82b022b0 r filter_8tap_64p_183 +ffffffff82b024c0 r filter_2tap_16p +ffffffff82b024f0 r filter_2tap_64p +ffffffff82b03000 r audio_clock_info_table_48bpc +ffffffff82b03190 r audio_clock_info_table_36bpc +ffffffff82b03320 r audio_clock_info_table +ffffffff82b034e0 r dce110_str_enc_funcs +ffffffff82b04000 r global_color_matrix +ffffffff82b040a8 r dce_transform_funcs +ffffffff82b05000 r abm_funcs +ffffffff82b06000 r psr_funcs +ffffffff82b06040 r DP_SINK_DEVICE_STR_ID_1 +ffffffff82b06045 r DP_SINK_DEVICE_STR_ID_2 +ffffffff82b07000 r reg_offsets +ffffffff82b08000 r bios_regs +ffffffff82b08008 r res_cap +ffffffff82b08050 r clk_src_regs +ffffffff82b0814c r dmcu_regs +ffffffff82b081a8 r dmcu_shift +ffffffff82b081bc r dmcu_mask +ffffffff82b08208 r abm_regs +ffffffff82b08248 r abm_shift +ffffffff82b0825c r abm_mask +ffffffff82b082b0 r dce100_tg_offsets +ffffffff82b082f8 r plane_cap +ffffffff82b08328 r res_create_funcs +ffffffff82b08358 r dce100_res_pool_funcs +ffffffff82b08440 r panel_cntl_regs +ffffffff82b08460 r panel_cntl_shift +ffffffff82b08470 r panel_cntl_mask +ffffffff82b084b0 r link_enc_regs +ffffffff82b08870 r link_enc_aux_regs +ffffffff82b088c0 r link_enc_hpd_regs +ffffffff82b088d8 r link_enc_feature +ffffffff82b088e8 r cs_shift +ffffffff82b088f4 r cs_mask +ffffffff82b08920 r mi_regs +ffffffff82b08c38 r mi_shifts +ffffffff82b08c80 r mi_masks +ffffffff82b08da0 r ipp_regs +ffffffff82b08f98 r ipp_shift +ffffffff82b08fc0 r ipp_mask +ffffffff82b09060 r xfm_regs +ffffffff82b09600 r xfm_shift +ffffffff82b09660 r xfm_mask +ffffffff82b097e0 r opp_regs +ffffffff82b09930 r opp_shift +ffffffff82b0995c r opp_mask +ffffffff82b09a10 r aux_engine_regs +ffffffff82b09b00 r aux_mask +ffffffff82b09b60 r aux_shift +ffffffff82b09b80 r i2c_hw_regs +ffffffff82b09cd0 r i2c_shifts +ffffffff82b09cfc r i2c_masks +ffffffff82b09da0 r audio_regs +ffffffff82b09ed4 r audio_shift +ffffffff82b09eec r audio_mask +ffffffff82b09f30 r stream_enc_regs +ffffffff82b0a5dc r se_shift +ffffffff82b0a660 r se_mask +ffffffff82b0a864 r hwseq_reg +ffffffff82b0aa80 r hwseq_shift +ffffffff82b0ab00 r hwseq_mask +ffffffff82b0b000 r reg_offsets +ffffffff82b0b018 r dce110_compressor_funcs +ffffffff82b0c000 r dce110_funcs +ffffffff82b0c2c0 r dce110_private_funcs +ffffffff82b0d000 r dce110_mem_input_v_funcs +ffffffff82b0d090 r dvmm_Hw_Setting_1DTiling +ffffffff82b0d120 r dvmm_Hw_Setting_2DTiling +ffffffff82b0d1b0 r dvmm_Hw_Setting_Linear +ffffffff82b0e000 r global_color_matrix +ffffffff82b0e0b0 r input_csc_matrix +ffffffff82b0f000 r funcs +ffffffff82b10000 r bios_regs +ffffffff82b10008 r dce110_res_pool_funcs +ffffffff82b100f0 r clk_src_regs +ffffffff82b101ec r dmcu_regs +ffffffff82b10248 r dmcu_shift +ffffffff82b1025c r dmcu_mask +ffffffff82b102a8 r abm_regs +ffffffff82b102e8 r abm_shift +ffffffff82b102fc r abm_mask +ffffffff82b10350 r dce110_tg_offsets +ffffffff82b10398 r res_create_funcs +ffffffff82b103c8 r plane_cap +ffffffff82b103f4 r underlay_plane_cap +ffffffff82b10420 r stoney_resource_cap +ffffffff82b1045c r carrizo_resource_cap +ffffffff82b104a0 r panel_cntl_regs +ffffffff82b104c0 r panel_cntl_shift +ffffffff82b104d0 r panel_cntl_mask +ffffffff82b10510 r link_enc_regs +ffffffff82b108d0 r link_enc_aux_regs +ffffffff82b10920 r link_enc_hpd_regs +ffffffff82b10938 r link_enc_feature +ffffffff82b10948 r cs_shift +ffffffff82b10954 r cs_mask +ffffffff82b10980 r mi_regs +ffffffff82b10b0c r mi_shifts +ffffffff82b10b54 r mi_masks +ffffffff82b10c70 r ipp_regs +ffffffff82b10d6c r ipp_shift +ffffffff82b10d94 r ipp_mask +ffffffff82b10e30 r xfm_regs +ffffffff82b11100 r xfm_shift +ffffffff82b11160 r xfm_mask +ffffffff82b112e0 r opp_regs +ffffffff82b11430 r opp_shift +ffffffff82b1145c r opp_mask +ffffffff82b11510 r aux_engine_regs +ffffffff82b11600 r aux_mask +ffffffff82b11660 r aux_shift +ffffffff82b11680 r i2c_hw_regs +ffffffff82b117d0 r i2c_shifts +ffffffff82b117fc r i2c_masks +ffffffff82b118a0 r audio_regs +ffffffff82b119d4 r audio_shift +ffffffff82b119ec r audio_mask +ffffffff82b11a30 r stream_enc_regs +ffffffff82b11d0c r se_shift +ffffffff82b11d90 r se_mask +ffffffff82b11f94 r hwseq_stoney_reg +ffffffff82b121b0 r hwseq_cz_reg +ffffffff82b123cc r hwseq_shift +ffffffff82b1244c r hwseq_mask +ffffffff82b13000 r dce110_tg_funcs +ffffffff82b14000 r dce110_tg_v_funcs +ffffffff82b15000 r dce110_xfmv_funcs ffffffff82b16000 r reg_offsets -ffffffff82b17000 r bios_regs -ffffffff82b17010 r clk_src_regs -ffffffff82b17208 r dmcu_regs -ffffffff82b17264 r dmcu_shift -ffffffff82b17278 r dmcu_mask -ffffffff82b172c4 r abm_regs -ffffffff82b17304 r abm_shift -ffffffff82b17318 r abm_mask -ffffffff82b17360 r dce112_tg_offsets -ffffffff82b173a8 r res_create_funcs -ffffffff82b173d8 r plane_cap -ffffffff82b17404 r polaris_11_resource_cap -ffffffff82b17440 r polaris_10_resource_cap -ffffffff82b17480 r dce112_res_pool_funcs -ffffffff82b17560 r panel_cntl_regs -ffffffff82b17580 r panel_cntl_shift -ffffffff82b17590 r panel_cntl_mask -ffffffff82b175d0 r link_enc_regs -ffffffff82b17990 r link_enc_aux_regs -ffffffff82b179e0 r link_enc_hpd_regs -ffffffff82b179f8 r link_enc_feature -ffffffff82b17a08 r cs_shift -ffffffff82b17a14 r cs_mask -ffffffff82b17a40 r mi_regs -ffffffff82b17d58 r mi_shifts -ffffffff82b17da0 r mi_masks -ffffffff82b17ec0 r ipp_regs -ffffffff82b180b8 r ipp_shift -ffffffff82b180e0 r ipp_mask -ffffffff82b18180 r xfm_regs -ffffffff82b18720 r xfm_shift -ffffffff82b18780 r xfm_mask -ffffffff82b18900 r opp_regs -ffffffff82b18a50 r opp_shift -ffffffff82b18a7c r opp_mask -ffffffff82b18b30 r aux_engine_regs -ffffffff82b18c20 r aux_mask -ffffffff82b18c80 r aux_shift -ffffffff82b18ca0 r i2c_hw_regs -ffffffff82b18df0 r i2c_shifts -ffffffff82b18e1c r i2c_masks -ffffffff82b18ec0 r audio_regs -ffffffff82b18fc8 r audio_shift -ffffffff82b18fe0 r audio_mask -ffffffff82b19020 r stream_enc_regs -ffffffff82b195d8 r se_shift -ffffffff82b1965c r se_mask -ffffffff82b19860 r hwseq_reg -ffffffff82b19a7c r hwseq_shift -ffffffff82b19afc r hwseq_mask -ffffffff82b1a000 r bios_regs -ffffffff82b1a008 r res_cap -ffffffff82b1a048 r dce120_res_pool_funcs -ffffffff82b1a128 r debug_defaults -ffffffff82b1a2a0 r clk_src_regs -ffffffff82b1a498 r dmcu_regs -ffffffff82b1a4f4 r dmcu_shift -ffffffff82b1a508 r dmcu_mask -ffffffff82b1a554 r abm_regs -ffffffff82b1a594 r abm_shift -ffffffff82b1a5a8 r abm_mask -ffffffff82b1a5f0 r dce120_tg_offsets -ffffffff82b1a638 r dce121_res_create_funcs -ffffffff82b1a668 r res_create_funcs -ffffffff82b1a698 r plane_cap -ffffffff82b1a6d0 r panel_cntl_regs -ffffffff82b1a6f0 r panel_cntl_shift -ffffffff82b1a700 r panel_cntl_mask -ffffffff82b1a740 r link_enc_regs -ffffffff82b1ab00 r link_enc_aux_regs -ffffffff82b1ab50 r link_enc_hpd_regs -ffffffff82b1ab68 r link_enc_feature -ffffffff82b1ab78 r cs_shift -ffffffff82b1ab84 r cs_mask -ffffffff82b1abb0 r mi_regs -ffffffff82b1aec8 r mi_shifts -ffffffff82b1af10 r mi_masks -ffffffff82b1b030 r ipp_regs -ffffffff82b1b228 r ipp_shift -ffffffff82b1b250 r ipp_mask -ffffffff82b1b2f0 r xfm_regs -ffffffff82b1b890 r xfm_shift -ffffffff82b1b8f0 r xfm_mask -ffffffff82b1ba70 r opp_regs -ffffffff82b1bbc0 r opp_shift -ffffffff82b1bbec r opp_mask -ffffffff82b1bca0 r aux_engine_regs -ffffffff82b1bd90 r aux_mask -ffffffff82b1bdf0 r aux_shift -ffffffff82b1be10 r i2c_hw_regs -ffffffff82b1bf60 r i2c_shifts -ffffffff82b1bf8c r i2c_masks -ffffffff82b1c030 r audio_regs -ffffffff82b1c164 r audio_shift -ffffffff82b1c17c r audio_mask -ffffffff82b1c1c0 r stream_enc_regs -ffffffff82b1c778 r se_shift -ffffffff82b1c7fc r se_mask -ffffffff82b1ca00 r dce121_hwseq_reg -ffffffff82b1cc1c r dce121_hwseq_shift -ffffffff82b1cc9c r dce121_hwseq_mask -ffffffff82b1ce90 r hwseq_reg -ffffffff82b1d0ac r hwseq_shift -ffffffff82b1d12c r hwseq_mask -ffffffff82b1e000 r dce120_tg_funcs -ffffffff82b1f000 r bios_regs -ffffffff82b1f008 r res_cap -ffffffff82b1f048 r dce80_res_pool_funcs -ffffffff82b1f130 r clk_src_regs -ffffffff82b1f22c r dmcu_regs -ffffffff82b1f288 r dmcu_shift -ffffffff82b1f29c r dmcu_mask -ffffffff82b1f2e8 r abm_regs -ffffffff82b1f328 r abm_shift -ffffffff82b1f33c r abm_mask -ffffffff82b1f390 r dce80_tg_offsets -ffffffff82b1f3d8 r plane_cap -ffffffff82b1f408 r res_create_funcs -ffffffff82b1f440 r panel_cntl_regs -ffffffff82b1f460 r panel_cntl_shift -ffffffff82b1f470 r panel_cntl_mask -ffffffff82b1f4b0 r link_enc_regs -ffffffff82b1f870 r link_enc_aux_regs -ffffffff82b1f8c0 r link_enc_hpd_regs -ffffffff82b1f8d8 r link_enc_feature -ffffffff82b1f8e8 r cs_shift -ffffffff82b1f8f4 r cs_mask -ffffffff82b1f920 r mi_regs -ffffffff82b1fc38 r mi_shifts -ffffffff82b1fc80 r mi_masks -ffffffff82b1fda0 r ipp_regs -ffffffff82b1ff98 r ipp_shift -ffffffff82b1ffc0 r ipp_mask -ffffffff82b20060 r xfm_regs -ffffffff82b20600 r xfm_shift -ffffffff82b20660 r xfm_mask -ffffffff82b207e0 r opp_regs -ffffffff82b20930 r opp_shift -ffffffff82b2095c r opp_mask -ffffffff82b20a10 r aux_engine_regs -ffffffff82b20b00 r aux_mask -ffffffff82b20b60 r aux_shift -ffffffff82b20b80 r i2c_hw_regs -ffffffff82b20cd0 r i2c_shifts -ffffffff82b20cfc r i2c_masks -ffffffff82b20da0 r audio_regs -ffffffff82b20ed4 r audio_shift -ffffffff82b20eec r audio_mask -ffffffff82b20f30 r stream_enc_regs -ffffffff82b215dc r se_shift -ffffffff82b21660 r se_mask -ffffffff82b21864 r hwseq_reg -ffffffff82b21a80 r hwseq_shift -ffffffff82b21b00 r hwseq_mask -ffffffff82b21cf4 r res_cap_81 -ffffffff82b21d30 r res_cap_83 -ffffffff82b22000 r reg_offsets -ffffffff82b22048 r dce80_tg_funcs -ffffffff82b23000 r dcn10_dpp_funcs -ffffffff82b24000 r dpp_input_csc_matrix -ffffffff82b26000 r hubbub1_funcs -ffffffff82b27000 r dcn10_hubp_funcs -ffffffff82b28000 r reduceSizeAndFraction.prime_numbers -ffffffff82b2a000 r dcn10_funcs -ffffffff82b2a2c0 r dcn10_private_funcs -ffffffff82b2b000 r dcn10_ipp_funcs -ffffffff82b2b048 r dcn20_ipp_funcs -ffffffff82b2c000 r dcn10_lnk_enc_funcs -ffffffff82b2d000 r dcn10_mpc_funcs -ffffffff82b2e000 r dcn10_opp_funcs -ffffffff82b2f000 r dcn10_tg_funcs -ffffffff82b30000 r bios_regs -ffffffff82b30008 r rv2_res_cap -ffffffff82b30044 r res_cap -ffffffff82b30080 r debug_defaults_drv -ffffffff82b301f8 r debug_defaults_diags -ffffffff82b30370 r clk_src_regs -ffffffff82b304c0 r dmcu_regs -ffffffff82b3051c r dmcu_shift -ffffffff82b30530 r dmcu_mask -ffffffff82b3057c r abm_regs -ffffffff82b305bc r abm_shift -ffffffff82b305d0 r abm_mask -ffffffff82b30618 r res_create_funcs -ffffffff82b30648 r res_create_maximus_funcs -ffffffff82b30678 r plane_cap -ffffffff82b306a8 r dcn10_res_pool_funcs -ffffffff82b30790 r panel_cntl_regs -ffffffff82b307b0 r panel_cntl_shift -ffffffff82b307c0 r panel_cntl_mask -ffffffff82b30800 r link_enc_regs -ffffffff82b30d10 r link_enc_aux_regs -ffffffff82b30d50 r link_enc_hpd_regs -ffffffff82b30d60 r le_shift -ffffffff82b30e50 r le_mask -ffffffff82b31208 r link_enc_feature -ffffffff82b31218 r cs_shift -ffffffff82b31224 r cs_mask -ffffffff82b31250 r hubp_regs -ffffffff82b31900 r hubp_shift -ffffffff82b319c4 r hubp_mask -ffffffff82b31cd0 r ipp_regs -ffffffff82b31db0 r ipp_shift -ffffffff82b31dcc r ipp_mask -ffffffff82b31e40 r tf_regs -ffffffff82b32da0 r tf_shift -ffffffff82b33008 r tf_mask -ffffffff82b339a0 r opp_regs -ffffffff82b33a70 r opp_shift -ffffffff82b33a90 r opp_mask -ffffffff82b33b10 r tg_regs -ffffffff82b34010 r tg_shift -ffffffff82b340d0 r tg_mask -ffffffff82b343d0 r aux_engine_regs -ffffffff82b344c0 r aux_mask -ffffffff82b34520 r aux_shift -ffffffff82b34540 r i2c_hw_regs -ffffffff82b34690 r i2c_shifts -ffffffff82b346bc r i2c_masks -ffffffff82b34760 r mpc_regs -ffffffff82b34880 r mpc_shift -ffffffff82b34898 r mpc_mask -ffffffff82b348f4 r hubbub_reg -ffffffff82b34a68 r hubbub_shift -ffffffff82b34af0 r hubbub_mask -ffffffff82b34d10 r audio_regs -ffffffff82b34dc0 r audio_shift -ffffffff82b34dd8 r audio_mask -ffffffff82b34e20 r stream_enc_regs -ffffffff82b35370 r se_shift -ffffffff82b3544c r se_mask -ffffffff82b357b8 r hwseq_reg -ffffffff82b359d4 r hwseq_shift -ffffffff82b35a54 r hwseq_mask -ffffffff82b36000 r audio_clock_info_table_48bpc -ffffffff82b36190 r audio_clock_info_table_36bpc -ffffffff82b36320 r audio_clock_info_table -ffffffff82b364e0 r dcn10_str_enc_funcs -ffffffff82b37000 r dccg2_funcs -ffffffff82b39000 r dpp_input_csc_matrix -ffffffff82b3a000 R dcn20_dsc_funcs -ffffffff82b3b000 R dcn20_dwbc_funcs -ffffffff82b3c000 r filter_12tap_16p_upscale -ffffffff82b3c0e0 r filter_12tap_16p_117 -ffffffff82b3c1c0 r filter_12tap_16p_150 -ffffffff82b3c2a0 r filter_12tap_16p_183 -ffffffff82b3c380 r filter_11tap_16p_upscale -ffffffff82b3c450 r filter_11tap_16p_117 -ffffffff82b3c520 r filter_11tap_16p_150 -ffffffff82b3c5f0 r filter_11tap_16p_183 -ffffffff82b3c6c0 r filter_10tap_16p_upscale -ffffffff82b3c780 r filter_10tap_16p_117 -ffffffff82b3c840 r filter_10tap_16p_150 -ffffffff82b3c900 r filter_10tap_16p_183 -ffffffff82b3c9c0 r filter_9tap_16p_upscale -ffffffff82b3ca70 r filter_9tap_16p_117 -ffffffff82b3cb20 r filter_9tap_16p_150 -ffffffff82b3cbd0 r filter_9tap_16p_183 -ffffffff82b3cc80 r filter_8tap_16p_upscale -ffffffff82b3cd10 r filter_8tap_16p_117 -ffffffff82b3cda0 r filter_8tap_16p_150 -ffffffff82b3ce30 r filter_8tap_16p_183 -ffffffff82b3cec0 r filter_7tap_16p_upscale -ffffffff82b3cf40 r filter_7tap_16p_117 -ffffffff82b3cfc0 r filter_7tap_16p_150 -ffffffff82b3d040 r filter_7tap_16p_183 -ffffffff82b3d0c0 r filter_6tap_16p_upscale -ffffffff82b3d130 r filter_6tap_16p_117 -ffffffff82b3d1a0 r filter_6tap_16p_150 -ffffffff82b3d210 r filter_6tap_16p_183 -ffffffff82b3d280 r filter_5tap_16p_upscale -ffffffff82b3d2e0 r filter_5tap_16p_117 -ffffffff82b3d340 r filter_5tap_16p_150 -ffffffff82b3d3a0 r filter_5tap_16p_183 -ffffffff82b3d400 r filter_4tap_16p_upscale -ffffffff82b3d450 r filter_4tap_16p_117 -ffffffff82b3d4a0 r filter_4tap_16p_150 -ffffffff82b3d4f0 r filter_4tap_16p_183 -ffffffff82b3d540 r filter_3tap_16p_upscale -ffffffff82b3d580 r filter_3tap_16p_117 -ffffffff82b3d5c0 r filter_3tap_16p_150 -ffffffff82b3d600 r filter_3tap_16p_183 -ffffffff82b3e000 r hubbub2_funcs -ffffffff82b3f000 r dcn20_funcs -ffffffff82b3f2c0 r dcn20_private_funcs -ffffffff82b40000 r dcn2_mpll_cfg -ffffffff82b40190 r dcn20_link_enc_funcs -ffffffff82b41000 R dcn20_mmhubbub_funcs -ffffffff82b42000 R dcn20_mpc_funcs -ffffffff82b43000 r tf_regs -ffffffff82b44920 r tf_shift -ffffffff82b44ba4 r tf_mask -ffffffff82b455c0 r ipp_regs -ffffffff82b45710 r ipp_shift -ffffffff82b4572c r ipp_mask -ffffffff82b457a0 r opp_regs -ffffffff82b459b0 r opp_shift -ffffffff82b459e8 r opp_mask -ffffffff82b45ac0 r aux_engine_regs -ffffffff82b45bb0 r aux_mask -ffffffff82b45c10 r aux_shift -ffffffff82b45c30 r i2c_hw_regs -ffffffff82b45d80 r i2c_shifts -ffffffff82b45dac r i2c_masks -ffffffff82b45e50 r mpc_regs -ffffffff82b46398 r mpc_shift -ffffffff82b463e0 r mpc_mask -ffffffff82b464f4 r hubbub_reg -ffffffff82b46668 r hubbub_shift -ffffffff82b466f0 r hubbub_mask -ffffffff82b4690c r res_cap_nv10 -ffffffff82b46950 r vmid_regs -ffffffff82b46b10 r vmid_shifts -ffffffff82b46b18 r vmid_masks -ffffffff82b46b40 r tg_regs -ffffffff82b472c0 r tg_shift -ffffffff82b47380 r tg_mask -ffffffff82b47680 r link_enc_regs -ffffffff82b47e20 r link_enc_aux_regs -ffffffff82b47e80 r link_enc_hpd_regs -ffffffff82b47e98 r le_shift -ffffffff82b47f88 r le_mask -ffffffff82b48340 r stream_enc_regs -ffffffff82b48b38 r se_shift -ffffffff82b48c14 r se_mask -ffffffff82b48f80 r hwseq_reg -ffffffff82b4919c r hwseq_shift -ffffffff82b4921c r hwseq_mask -ffffffff82b49410 r dsc_regs -ffffffff82b498a8 r dsc_shift -ffffffff82b49960 r dsc_mask -ffffffff82b49c40 r hubp_regs -ffffffff82b4a888 r hubp_shift -ffffffff82b4a984 r hubp_mask -ffffffff82b4ad80 r dwbc20_regs -ffffffff82b4ae38 r dwbc20_shift -ffffffff82b4aeb8 r dwbc20_mask -ffffffff82b4b0b0 r mcif_wb20_regs -ffffffff82b4b190 r mcif_wb20_shift -ffffffff82b4b230 r mcif_wb20_mask -ffffffff82b4b4b0 r link_enc_feature -ffffffff82b4b4c0 r bios_regs -ffffffff82b4b4c8 r dcn20_res_pool_funcs -ffffffff82b4b5a8 r res_cap_nv14 -ffffffff82b4b5e8 r debug_defaults_drv -ffffffff82b4b760 r debug_defaults_diags -ffffffff82b4b8e0 r clk_src_regs -ffffffff82b4bad8 r dccg_regs -ffffffff82b4bbc4 r dccg_shift -ffffffff82b4bc5c r dccg_mask -ffffffff82b4beb8 r dmcu_regs -ffffffff82b4bf14 r dmcu_shift -ffffffff82b4bf28 r dmcu_mask -ffffffff82b4bf74 r abm_regs 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r plane_cap -ffffffff82bda594 r le_shift -ffffffff82bda684 r le_mask -ffffffff82bdaa3c r link_enc_feature -ffffffff82bdaa50 r debug_defaults_drv -ffffffff82bdabc8 r cs_shift -ffffffff82bdabd4 r cs_mask -ffffffff82bdabfc r hubbub_shift -ffffffff82bdac84 r hubbub_mask -ffffffff82bdaea0 r vmid_shifts -ffffffff82bdaea8 r vmid_masks -ffffffff82bdaec8 r hubp_shift -ffffffff82bdafc4 r hubp_mask -ffffffff82bdb3b4 r tf_shift -ffffffff82bdb684 r tf_mask -ffffffff82bdc1c4 r opp_shift -ffffffff82bdc1fc r opp_mask -ffffffff82bdc2d0 r optc_shift -ffffffff82bdc390 r optc_mask -ffffffff82bdc68c r mpc_shift -ffffffff82bdc768 r mpc_mask -ffffffff82bdcad4 r dsc_shift -ffffffff82bdcb8c r dsc_mask -ffffffff82bdce64 r dwbc30_shift -ffffffff82bdcf98 r dwbc30_mask -ffffffff82bdd460 r mcif_wb30_shift -ffffffff82bdd50c r mcif_wb30_mask -ffffffff82bdd7b8 r aux_mask -ffffffff82bdd818 r aux_shift -ffffffff82bdd830 r i2c_shifts -ffffffff82bdd85c r i2c_masks -ffffffff82bdd900 r audio_shift -ffffffff82bdd918 r audio_mask -ffffffff82bdd954 r se_shift -ffffffff82bdda30 r se_mask -ffffffff82bddd9c r vpg_shift -ffffffff82bdddc4 r vpg_mask -ffffffff82bdde58 r afmt_shift -ffffffff82bdde6c r afmt_mask -ffffffff82bddeb0 r hpo_dp_se_shift -ffffffff82bdded8 r hpo_dp_se_mask -ffffffff82bddf78 r apg_shift -ffffffff82bddf80 r apg_mask -ffffffff82bddf98 r hpo_dp_le_shift -ffffffff82bddfb4 r hpo_dp_le_mask -ffffffff82bde018 r hwseq_shift -ffffffff82bde098 r hwseq_mask -ffffffff82bdf000 r dcn321_link_enc_funcs -ffffffff82be0000 r res_cap_dcn321 -ffffffff82be0040 r debug_defaults_diags -ffffffff82be01b8 r dccg_shift -ffffffff82be0250 r dccg_mask -ffffffff82be04ac r abm_shift -ffffffff82be04c0 r abm_mask -ffffffff82be0508 r res_create_funcs -ffffffff82be0538 r res_create_maximus_funcs -ffffffff82be0568 r plane_cap -ffffffff82be0594 r le_shift -ffffffff82be0684 r le_mask -ffffffff82be0a3c r link_enc_feature -ffffffff82be0a50 r debug_defaults_drv -ffffffff82be0bc8 r cs_shift -ffffffff82be0bd4 r cs_mask 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hpo_dp_se_shift -ffffffff82be3ed8 r hpo_dp_se_mask -ffffffff82be3f78 r apg_shift -ffffffff82be3f80 r apg_mask -ffffffff82be3f98 r hpo_dp_le_shift -ffffffff82be3fb4 r hpo_dp_le_mask -ffffffff82be4018 r hwseq_shift -ffffffff82be4098 r hwseq_mask -ffffffff82be6000 R dcn10_soc_defaults -ffffffff82be608c R dcn10_ip_defaults -ffffffff82bf1000 R dml20_funcs -ffffffff82bf1030 R dml20v2_funcs -ffffffff82bf1060 R dml21_funcs -ffffffff82bf1090 R dml30_funcs -ffffffff82bf10c0 R dml31_funcs -ffffffff82bf10f0 R dml314_funcs -ffffffff82bf1120 R dml32_funcs -ffffffff82bf4000 R qp_table_422_10bpc_min -ffffffff82bf4740 R qp_table_444_8bpc_max -ffffffff82bf5080 R qp_table_420_12bpc_max -ffffffff82bf57c0 R qp_table_444_10bpc_min -ffffffff82bf6400 R qp_table_420_8bpc_max -ffffffff82bf6840 R qp_table_444_8bpc_min -ffffffff82bf7180 R qp_table_444_12bpc_min -ffffffff82bf80c0 R qp_table_420_12bpc_min -ffffffff82bf8800 R qp_table_422_12bpc_min -ffffffff82bf9140 R qp_table_422_12bpc_max -ffffffff82bf9a80 R qp_table_444_12bpc_max -ffffffff82bfa9c0 R qp_table_420_8bpc_min -ffffffff82bfae00 R qp_table_422_8bpc_min -ffffffff82bfb340 R qp_table_422_10bpc_max -ffffffff82bfba80 R qp_table_420_10bpc_max -ffffffff82bfc040 R qp_table_420_10bpc_min -ffffffff82bfc600 R qp_table_444_10bpc_max -ffffffff82bfd240 R qp_table_422_8bpc_max -ffffffff82bff000 r funcs -ffffffff82bff050 r hpd_regs -ffffffff82bff1a0 r hpd_shift -ffffffff82bff1b0 r hpd_mask -ffffffff82bff1c0 r ddc_data_regs -ffffffff82bff3a0 r ddc_clk_regs -ffffffff82bff580 r ddc_shift -ffffffff82bff5a8 r ddc_mask +ffffffff82b17000 r reg_offsets +ffffffff82b18000 r bios_regs +ffffffff82b18010 r clk_src_regs +ffffffff82b18208 r dmcu_regs +ffffffff82b18264 r dmcu_shift +ffffffff82b18278 r dmcu_mask +ffffffff82b182c4 r abm_regs +ffffffff82b18304 r abm_shift +ffffffff82b18318 r abm_mask +ffffffff82b18360 r dce112_tg_offsets +ffffffff82b183a8 r res_create_funcs +ffffffff82b183d8 r plane_cap +ffffffff82b18404 r polaris_11_resource_cap +ffffffff82b18440 r polaris_10_resource_cap +ffffffff82b18480 r dce112_res_pool_funcs +ffffffff82b18560 r panel_cntl_regs +ffffffff82b18580 r panel_cntl_shift +ffffffff82b18590 r panel_cntl_mask +ffffffff82b185d0 r link_enc_regs +ffffffff82b18990 r link_enc_aux_regs +ffffffff82b189e0 r link_enc_hpd_regs +ffffffff82b189f8 r link_enc_feature +ffffffff82b18a08 r cs_shift +ffffffff82b18a14 r cs_mask +ffffffff82b18a40 r mi_regs +ffffffff82b18d58 r mi_shifts +ffffffff82b18da0 r mi_masks +ffffffff82b18ec0 r ipp_regs +ffffffff82b190b8 r ipp_shift +ffffffff82b190e0 r ipp_mask +ffffffff82b19180 r xfm_regs +ffffffff82b19720 r xfm_shift +ffffffff82b19780 r xfm_mask +ffffffff82b19900 r opp_regs +ffffffff82b19a50 r opp_shift +ffffffff82b19a7c r opp_mask +ffffffff82b19b30 r aux_engine_regs +ffffffff82b19c20 r aux_mask +ffffffff82b19c80 r aux_shift +ffffffff82b19ca0 r i2c_hw_regs +ffffffff82b19df0 r i2c_shifts +ffffffff82b19e1c r i2c_masks +ffffffff82b19ec0 r audio_regs +ffffffff82b19fc8 r audio_shift +ffffffff82b19fe0 r audio_mask +ffffffff82b1a020 r stream_enc_regs +ffffffff82b1a5d8 r se_shift +ffffffff82b1a65c r se_mask +ffffffff82b1a860 r hwseq_reg +ffffffff82b1aa7c r hwseq_shift +ffffffff82b1aafc r hwseq_mask +ffffffff82b1b000 r bios_regs +ffffffff82b1b008 r res_cap +ffffffff82b1b048 r dce120_res_pool_funcs +ffffffff82b1b128 r debug_defaults +ffffffff82b1b2a0 r clk_src_regs +ffffffff82b1b498 r dmcu_regs +ffffffff82b1b4f4 r dmcu_shift +ffffffff82b1b508 r dmcu_mask +ffffffff82b1b554 r abm_regs +ffffffff82b1b594 r abm_shift +ffffffff82b1b5a8 r abm_mask +ffffffff82b1b5f0 r dce120_tg_offsets +ffffffff82b1b638 r dce121_res_create_funcs +ffffffff82b1b668 r res_create_funcs +ffffffff82b1b698 r plane_cap +ffffffff82b1b6d0 r panel_cntl_regs +ffffffff82b1b6f0 r panel_cntl_shift +ffffffff82b1b700 r panel_cntl_mask +ffffffff82b1b740 r link_enc_regs +ffffffff82b1bb00 r link_enc_aux_regs +ffffffff82b1bb50 r link_enc_hpd_regs +ffffffff82b1bb68 r link_enc_feature +ffffffff82b1bb78 r cs_shift +ffffffff82b1bb84 r cs_mask +ffffffff82b1bbb0 r mi_regs +ffffffff82b1bec8 r mi_shifts +ffffffff82b1bf10 r mi_masks +ffffffff82b1c030 r ipp_regs +ffffffff82b1c228 r ipp_shift +ffffffff82b1c250 r ipp_mask +ffffffff82b1c2f0 r xfm_regs +ffffffff82b1c890 r xfm_shift +ffffffff82b1c8f0 r xfm_mask +ffffffff82b1ca70 r opp_regs +ffffffff82b1cbc0 r opp_shift +ffffffff82b1cbec r opp_mask +ffffffff82b1cca0 r aux_engine_regs +ffffffff82b1cd90 r aux_mask +ffffffff82b1cdf0 r aux_shift +ffffffff82b1ce10 r i2c_hw_regs +ffffffff82b1cf60 r i2c_shifts +ffffffff82b1cf8c r i2c_masks +ffffffff82b1d030 r audio_regs +ffffffff82b1d164 r audio_shift +ffffffff82b1d17c r audio_mask +ffffffff82b1d1c0 r stream_enc_regs +ffffffff82b1d778 r se_shift +ffffffff82b1d7fc r se_mask +ffffffff82b1da00 r dce121_hwseq_reg +ffffffff82b1dc1c r dce121_hwseq_shift +ffffffff82b1dc9c r dce121_hwseq_mask +ffffffff82b1de90 r hwseq_reg +ffffffff82b1e0ac r hwseq_shift +ffffffff82b1e12c r hwseq_mask +ffffffff82b1f000 r dce120_tg_funcs +ffffffff82b20000 r bios_regs +ffffffff82b20008 r res_cap +ffffffff82b20048 r dce80_res_pool_funcs +ffffffff82b20130 r clk_src_regs +ffffffff82b2022c r dmcu_regs +ffffffff82b20288 r dmcu_shift +ffffffff82b2029c r dmcu_mask +ffffffff82b202e8 r abm_regs +ffffffff82b20328 r abm_shift +ffffffff82b2033c r abm_mask +ffffffff82b20390 r dce80_tg_offsets +ffffffff82b203d8 r plane_cap +ffffffff82b20408 r res_create_funcs +ffffffff82b20440 r panel_cntl_regs +ffffffff82b20460 r panel_cntl_shift +ffffffff82b20470 r panel_cntl_mask +ffffffff82b204b0 r link_enc_regs +ffffffff82b20870 r link_enc_aux_regs +ffffffff82b208c0 r link_enc_hpd_regs +ffffffff82b208d8 r link_enc_feature +ffffffff82b208e8 r cs_shift +ffffffff82b208f4 r cs_mask +ffffffff82b20920 r mi_regs +ffffffff82b20c38 r mi_shifts +ffffffff82b20c80 r mi_masks +ffffffff82b20da0 r ipp_regs +ffffffff82b20f98 r ipp_shift +ffffffff82b20fc0 r ipp_mask +ffffffff82b21060 r xfm_regs +ffffffff82b21600 r xfm_shift +ffffffff82b21660 r xfm_mask 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+ffffffff82b2c048 r dcn20_ipp_funcs +ffffffff82b2d000 r dcn10_lnk_enc_funcs +ffffffff82b2e000 r dcn10_mpc_funcs +ffffffff82b2f000 r dcn10_opp_funcs +ffffffff82b30000 r dcn10_tg_funcs +ffffffff82b31000 r bios_regs +ffffffff82b31008 r rv2_res_cap +ffffffff82b31044 r res_cap +ffffffff82b31080 r debug_defaults_drv +ffffffff82b311f8 r debug_defaults_diags +ffffffff82b31370 r clk_src_regs +ffffffff82b314c0 r dmcu_regs +ffffffff82b3151c r dmcu_shift +ffffffff82b31530 r dmcu_mask +ffffffff82b3157c r abm_regs +ffffffff82b315bc r abm_shift +ffffffff82b315d0 r abm_mask +ffffffff82b31618 r res_create_funcs +ffffffff82b31648 r res_create_maximus_funcs +ffffffff82b31678 r plane_cap +ffffffff82b316a8 r dcn10_res_pool_funcs +ffffffff82b31790 r panel_cntl_regs +ffffffff82b317b0 r panel_cntl_shift +ffffffff82b317c0 r panel_cntl_mask +ffffffff82b31800 r link_enc_regs +ffffffff82b31d10 r link_enc_aux_regs +ffffffff82b31d50 r link_enc_hpd_regs +ffffffff82b31d60 r le_shift +ffffffff82b31e50 r le_mask +ffffffff82b32208 r link_enc_feature +ffffffff82b32218 r cs_shift +ffffffff82b32224 r cs_mask +ffffffff82b32250 r hubp_regs +ffffffff82b32900 r hubp_shift +ffffffff82b329c4 r hubp_mask +ffffffff82b32cd0 r ipp_regs +ffffffff82b32db0 r ipp_shift +ffffffff82b32dcc r ipp_mask +ffffffff82b32e40 r tf_regs +ffffffff82b33da0 r tf_shift +ffffffff82b34008 r tf_mask +ffffffff82b349a0 r opp_regs +ffffffff82b34a70 r opp_shift +ffffffff82b34a90 r opp_mask +ffffffff82b34b10 r tg_regs +ffffffff82b35010 r tg_shift +ffffffff82b350d0 r tg_mask +ffffffff82b353d0 r aux_engine_regs +ffffffff82b354c0 r aux_mask +ffffffff82b35520 r aux_shift +ffffffff82b35540 r i2c_hw_regs +ffffffff82b35690 r i2c_shifts +ffffffff82b356bc r i2c_masks +ffffffff82b35760 r mpc_regs +ffffffff82b35880 r mpc_shift +ffffffff82b35898 r mpc_mask +ffffffff82b358f4 r hubbub_reg +ffffffff82b35a68 r hubbub_shift +ffffffff82b35af0 r hubbub_mask +ffffffff82b35d10 r audio_regs +ffffffff82b35dc0 r audio_shift +ffffffff82b35dd8 r audio_mask +ffffffff82b35e20 r stream_enc_regs +ffffffff82b36370 r se_shift +ffffffff82b3644c r se_mask +ffffffff82b367b8 r hwseq_reg +ffffffff82b369d4 r hwseq_shift +ffffffff82b36a54 r hwseq_mask +ffffffff82b37000 r audio_clock_info_table_48bpc +ffffffff82b37190 r audio_clock_info_table_36bpc +ffffffff82b37320 r audio_clock_info_table +ffffffff82b374e0 r dcn10_str_enc_funcs +ffffffff82b38000 r dccg2_funcs +ffffffff82b3a000 r dpp_input_csc_matrix +ffffffff82b3b000 R dcn20_dsc_funcs +ffffffff82b3c000 R dcn20_dwbc_funcs +ffffffff82b3d000 r filter_12tap_16p_upscale +ffffffff82b3d0e0 r filter_12tap_16p_117 +ffffffff82b3d1c0 r filter_12tap_16p_150 +ffffffff82b3d2a0 r filter_12tap_16p_183 +ffffffff82b3d380 r filter_11tap_16p_upscale +ffffffff82b3d450 r filter_11tap_16p_117 +ffffffff82b3d520 r filter_11tap_16p_150 +ffffffff82b3d5f0 r filter_11tap_16p_183 +ffffffff82b3d6c0 r filter_10tap_16p_upscale +ffffffff82b3d780 r filter_10tap_16p_117 +ffffffff82b3d840 r filter_10tap_16p_150 +ffffffff82b3d900 r filter_10tap_16p_183 +ffffffff82b3d9c0 r filter_9tap_16p_upscale +ffffffff82b3da70 r filter_9tap_16p_117 +ffffffff82b3db20 r filter_9tap_16p_150 +ffffffff82b3dbd0 r filter_9tap_16p_183 +ffffffff82b3dc80 r filter_8tap_16p_upscale +ffffffff82b3dd10 r filter_8tap_16p_117 +ffffffff82b3dda0 r filter_8tap_16p_150 +ffffffff82b3de30 r filter_8tap_16p_183 +ffffffff82b3dec0 r filter_7tap_16p_upscale +ffffffff82b3df40 r filter_7tap_16p_117 +ffffffff82b3dfc0 r filter_7tap_16p_150 +ffffffff82b3e040 r filter_7tap_16p_183 +ffffffff82b3e0c0 r filter_6tap_16p_upscale +ffffffff82b3e130 r filter_6tap_16p_117 +ffffffff82b3e1a0 r filter_6tap_16p_150 +ffffffff82b3e210 r filter_6tap_16p_183 +ffffffff82b3e280 r filter_5tap_16p_upscale +ffffffff82b3e2e0 r filter_5tap_16p_117 +ffffffff82b3e340 r filter_5tap_16p_150 +ffffffff82b3e3a0 r filter_5tap_16p_183 +ffffffff82b3e400 r filter_4tap_16p_upscale +ffffffff82b3e450 r filter_4tap_16p_117 +ffffffff82b3e4a0 r filter_4tap_16p_150 +ffffffff82b3e4f0 r filter_4tap_16p_183 +ffffffff82b3e540 r filter_3tap_16p_upscale +ffffffff82b3e580 r filter_3tap_16p_117 +ffffffff82b3e5c0 r filter_3tap_16p_150 +ffffffff82b3e600 r filter_3tap_16p_183 +ffffffff82b3f000 r hubbub2_funcs +ffffffff82b40000 r dcn20_funcs +ffffffff82b402c0 r dcn20_private_funcs +ffffffff82b41000 r dcn2_mpll_cfg +ffffffff82b41190 r dcn20_link_enc_funcs +ffffffff82b42000 R dcn20_mmhubbub_funcs +ffffffff82b43000 R dcn20_mpc_funcs +ffffffff82b44000 r tf_regs +ffffffff82b45920 r tf_shift +ffffffff82b45ba4 r tf_mask +ffffffff82b465c0 r ipp_regs +ffffffff82b46710 r ipp_shift +ffffffff82b4672c r ipp_mask +ffffffff82b467a0 r opp_regs +ffffffff82b469b0 r opp_shift +ffffffff82b469e8 r opp_mask +ffffffff82b46ac0 r aux_engine_regs +ffffffff82b46bb0 r aux_mask +ffffffff82b46c10 r aux_shift +ffffffff82b46c30 r i2c_hw_regs +ffffffff82b46d80 r i2c_shifts +ffffffff82b46dac r i2c_masks +ffffffff82b46e50 r mpc_regs +ffffffff82b47398 r mpc_shift +ffffffff82b473e0 r mpc_mask +ffffffff82b474f4 r hubbub_reg +ffffffff82b47668 r hubbub_shift +ffffffff82b476f0 r hubbub_mask +ffffffff82b4790c r res_cap_nv10 +ffffffff82b47950 r vmid_regs +ffffffff82b47b10 r vmid_shifts +ffffffff82b47b18 r vmid_masks +ffffffff82b47b40 r tg_regs +ffffffff82b482c0 r tg_shift +ffffffff82b48380 r tg_mask +ffffffff82b48680 r link_enc_regs +ffffffff82b48e20 r link_enc_aux_regs +ffffffff82b48e80 r link_enc_hpd_regs +ffffffff82b48e98 r le_shift +ffffffff82b48f88 r le_mask +ffffffff82b49340 r stream_enc_regs +ffffffff82b49b38 r se_shift +ffffffff82b49c14 r se_mask +ffffffff82b49f80 r hwseq_reg +ffffffff82b4a19c r hwseq_shift +ffffffff82b4a21c r hwseq_mask +ffffffff82b4a410 r dsc_regs +ffffffff82b4a8a8 r dsc_shift +ffffffff82b4a960 r dsc_mask +ffffffff82b4ac40 r hubp_regs +ffffffff82b4b888 r hubp_shift +ffffffff82b4b984 r hubp_mask +ffffffff82b4bd80 r dwbc20_regs +ffffffff82b4be38 r dwbc20_shift +ffffffff82b4beb8 r dwbc20_mask +ffffffff82b4c0b0 r mcif_wb20_regs +ffffffff82b4c190 r mcif_wb20_shift +ffffffff82b4c230 r mcif_wb20_mask +ffffffff82b4c4b0 r link_enc_feature +ffffffff82b4c4c0 r bios_regs +ffffffff82b4c4c8 r dcn20_res_pool_funcs +ffffffff82b4c5a8 r res_cap_nv14 +ffffffff82b4c5e8 r debug_defaults_drv +ffffffff82b4c760 r debug_defaults_diags +ffffffff82b4c8e0 r clk_src_regs +ffffffff82b4cad8 r dccg_regs +ffffffff82b4cbc4 r dccg_shift +ffffffff82b4cc5c r dccg_mask +ffffffff82b4ceb8 r dmcu_regs +ffffffff82b4cf14 r dmcu_shift +ffffffff82b4cf28 r dmcu_mask +ffffffff82b4cf74 r abm_regs +ffffffff82b4cfb4 r abm_shift +ffffffff82b4cfc8 r abm_mask +ffffffff82b4d010 r res_create_funcs +ffffffff82b4d040 r res_create_maximus_funcs +ffffffff82b4d070 r plane_cap +ffffffff82b4d0a0 r panel_cntl_regs +ffffffff82b4d0c0 r panel_cntl_shift +ffffffff82b4d0d0 r panel_cntl_mask +ffffffff82b4d10c r cs_shift +ffffffff82b4d118 r cs_mask +ffffffff82b4d140 r audio_regs +ffffffff82b4d274 r audio_shift +ffffffff82b4d28c r audio_mask +ffffffff82b4e000 r dcn20_str_enc_funcs +ffffffff82b4f000 r dccg201_funcs +ffffffff82b50000 r hubbub201_funcs +ffffffff82b51000 r dcn201_funcs +ffffffff82b512c0 r dcn201_private_funcs +ffffffff82b52000 r dcn201_link_enc_funcs +ffffffff82b53000 R dcn201_mpc_funcs +ffffffff82b54000 r bios_regs +ffffffff82b54008 r res_cap_dnc201 +ffffffff82b54048 r debug_defaults_drv +ffffffff82b541c0 r clk_src_regs +ffffffff82b54268 r dccg_regs +ffffffff82b54354 r dccg_shift +ffffffff82b543ec r dccg_mask +ffffffff82b54648 r res_create_funcs +ffffffff82b54678 r res_create_maximus_funcs +ffffffff82b546a8 r plane_cap +ffffffff82b546e0 r link_enc_regs +ffffffff82b54970 r link_enc_aux_regs +ffffffff82b54990 r link_enc_hpd_regs +ffffffff82b54998 r le_shift +ffffffff82b54a88 r le_mask +ffffffff82b54e40 r link_enc_feature +ffffffff82b54e50 r cs_shift +ffffffff82b54e5c r cs_mask +ffffffff82b54e90 r hubp_regs +ffffffff82b55620 r hubp_shift +ffffffff82b556f8 r hubp_mask +ffffffff82b55a60 r ipp_regs +ffffffff82b55b40 r ipp_shift +ffffffff82b55b5c r ipp_mask +ffffffff82b55bd0 r tf_regs +ffffffff82b56c10 r tf_shift +ffffffff82b56e94 r tf_mask +ffffffff82b578b0 r opp_regs +ffffffff82b57960 r opp_shift +ffffffff82b57998 r opp_mask +ffffffff82b57a70 r aux_engine_regs +ffffffff82b57ac0 r aux_mask +ffffffff82b57b20 r aux_shift +ffffffff82b57b40 r i2c_hw_regs +ffffffff82b57bb0 r i2c_shifts +ffffffff82b57bdc r i2c_masks +ffffffff82b57c80 r tg_regs +ffffffff82b57f00 r tg_shift +ffffffff82b57fc0 r tg_mask +ffffffff82b582bc r mpc_regs +ffffffff82b58804 r mpc_shift +ffffffff82b58850 r mpc_mask +ffffffff82b58978 r hubbub_reg +ffffffff82b58aec r hubbub_shift +ffffffff82b58b74 r hubbub_mask +ffffffff82b58d90 r audio_regs +ffffffff82b58de8 r audio_shift +ffffffff82b58e00 r audio_mask +ffffffff82b58e40 r stream_enc_regs +ffffffff82b590e8 r se_shift +ffffffff82b591c4 r se_mask +ffffffff82b59530 r hwseq_reg +ffffffff82b5974c r hwseq_shift +ffffffff82b597cc r hwseq_mask +ffffffff82b5a000 r dccg21_funcs +ffffffff82b5b000 r hubbub21_funcs +ffffffff82b5c000 r dcn21_funcs +ffffffff82b5c2c0 r dcn21_private_funcs +ffffffff82b5d000 r dcn21_mpll_cfg_ref +ffffffff82b5d190 r dcn21_link_enc_funcs +ffffffff82b5e000 r bios_regs +ffffffff82b5e008 r res_cap_rn +ffffffff82b5e048 r dcn21_res_pool_funcs +ffffffff82b5e128 r debug_defaults_drv +ffffffff82b5e2a0 r debug_defaults_diags +ffffffff82b5e420 r clk_src_regs +ffffffff82b5e5c4 r dccg_regs +ffffffff82b5e6b0 r dccg_shift +ffffffff82b5e748 r dccg_mask +ffffffff82b5e9a4 r dmcu_regs +ffffffff82b5ea00 r dmcu_shift +ffffffff82b5ea14 r dmcu_mask +ffffffff82b5ea60 r abm_regs +ffffffff82b5eaa0 r abm_shift +ffffffff82b5eab4 r abm_mask +ffffffff82b5eb00 r res_create_funcs +ffffffff82b5eb30 r res_create_maximus_funcs +ffffffff82b5eb60 r plane_cap +ffffffff82b5eb90 r panel_cntl_regs +ffffffff82b5ebb0 r panel_cntl_shift +ffffffff82b5ebc0 r panel_cntl_mask +ffffffff82b5ec00 r link_enc_regs +ffffffff82b5f260 r link_enc_aux_regs +ffffffff82b5f2b0 r link_enc_hpd_regs +ffffffff82b5f2c4 r le_shift +ffffffff82b5f3b4 r le_mask +ffffffff82b5f76c r link_enc_feature +ffffffff82b5f77c r panel_config_defaults +ffffffff82b5f7b0 r cs_shift +ffffffff82b5f7bc r cs_mask +ffffffff82b5f7f0 r hubp_regs +ffffffff82b60020 r hubp_shift +ffffffff82b6011c r hubp_mask +ffffffff82b60510 r ipp_regs +ffffffff82b605f0 r ipp_shift +ffffffff82b6060c r ipp_mask +ffffffff82b60680 r tf_regs +ffffffff82b61740 r tf_shift +ffffffff82b619c4 r tf_mask +ffffffff82b623e0 r opp_regs +ffffffff82b625f0 r opp_shift +ffffffff82b62628 r opp_mask +ffffffff82b62700 r tg_regs +ffffffff82b62c00 r tg_shift +ffffffff82b62cc0 r tg_mask +ffffffff82b62fc0 r aux_engine_regs +ffffffff82b63088 r aux_mask +ffffffff82b630e8 r aux_shift +ffffffff82b63100 r i2c_hw_regs +ffffffff82b63218 r i2c_shifts +ffffffff82b63244 r i2c_masks +ffffffff82b632e8 r mpc_regs +ffffffff82b63830 r mpc_shift +ffffffff82b63878 r mpc_mask +ffffffff82b6398c r hubbub_reg +ffffffff82b63b00 r hubbub_shift +ffffffff82b63b88 r hubbub_mask +ffffffff82b63db0 r vmid_regs +ffffffff82b63f70 r vmid_shifts +ffffffff82b63f78 r vmid_masks +ffffffff82b63fa0 r dsc_regs +ffffffff82b64438 r dsc_shift +ffffffff82b644f0 r dsc_mask +ffffffff82b647d0 r audio_regs +ffffffff82b648d8 r audio_shift +ffffffff82b648f0 r audio_mask +ffffffff82b64930 r stream_enc_regs +ffffffff82b64fd4 r se_shift +ffffffff82b650b0 r se_mask +ffffffff82b6541c r hwseq_reg +ffffffff82b65638 r hwseq_shift +ffffffff82b656b8 r hwseq_mask +ffffffff82b66000 r dccg3_funcs +ffffffff82b67000 r dcn30_link_enc_funcs +ffffffff82b68000 r dcn30_str_enc_funcs +ffffffff82b69000 r dpp_input_csc_matrix +ffffffff82b6a000 R dcn30_dwbc_funcs +ffffffff82b6b000 r hubbub30_funcs +ffffffff82b6d000 r dcn30_funcs +ffffffff82b6d2c0 r dcn30_private_funcs +ffffffff82b6e000 R dcn30_mmhubbub_funcs +ffffffff82b6f000 R dcn30_mpc_funcs +ffffffff82b70000 r bios_regs +ffffffff82b70008 r res_cap_dcn3 +ffffffff82b70048 r debug_defaults_drv +ffffffff82b701c0 r debug_defaults_diags +ffffffff82b70340 r clk_src_regs +ffffffff82b70538 r dccg_regs +ffffffff82b70624 r dccg_shift +ffffffff82b706bc r dccg_mask +ffffffff82b70920 r abm_regs +ffffffff82b70aa0 r abm_shift +ffffffff82b70ab4 r abm_mask +ffffffff82b70b00 r res_create_funcs +ffffffff82b70b30 r res_create_maximus_funcs +ffffffff82b70b60 r plane_cap +ffffffff82b70b90 r dcn30_res_pool_funcs +ffffffff82b70c70 r panel_cntl_regs +ffffffff82b70c90 r panel_cntl_shift +ffffffff82b70ca0 r panel_cntl_mask +ffffffff82b70ce0 r link_enc_regs +ffffffff82b71480 r link_enc_aux_regs +ffffffff82b714e0 r link_enc_hpd_regs +ffffffff82b714f8 r le_shift +ffffffff82b715e8 r le_mask +ffffffff82b719a0 r link_enc_feature +ffffffff82b719b0 r cs_shift +ffffffff82b719bc r cs_mask +ffffffff82b719e4 r hubbub_reg +ffffffff82b71b58 r hubbub_shift +ffffffff82b71be0 r hubbub_mask +ffffffff82b71e00 r vmid_regs +ffffffff82b71fc0 r vmid_shifts +ffffffff82b71fc8 r vmid_masks +ffffffff82b71ff0 r hubp_regs +ffffffff82b72c38 r hubp_shift +ffffffff82b72d34 r hubp_mask +ffffffff82b73130 r dpp_regs +ffffffff82b750b0 r tf_shift +ffffffff82b75380 r tf_mask +ffffffff82b75ec0 r opp_regs +ffffffff82b760d0 r opp_shift +ffffffff82b76108 r opp_mask +ffffffff82b761e0 r optc_regs +ffffffff82b76960 r optc_shift +ffffffff82b76a20 r optc_mask +ffffffff82b76d1c r mpc_regs +ffffffff82b78508 r mpc_shift +ffffffff82b785e4 r mpc_mask +ffffffff82b78950 r dsc_regs +ffffffff82b78de8 r dsc_shift +ffffffff82b78ea0 r dsc_mask +ffffffff82b79180 r dwbc30_regs +ffffffff82b7935c r dwbc30_shift +ffffffff82b79490 r dwbc30_mask +ffffffff82b79960 r mcif_wb30_regs +ffffffff82b79a5c r mcif_wb30_shift +ffffffff82b79b08 r mcif_wb30_mask +ffffffff82b79dc0 r aux_engine_regs +ffffffff82b79eb0 r aux_mask +ffffffff82b79f10 r aux_shift +ffffffff82b79f30 r i2c_hw_regs +ffffffff82b7a080 r i2c_shifts +ffffffff82b7a0ac r i2c_masks +ffffffff82b7a150 r audio_regs +ffffffff82b7a284 r audio_shift +ffffffff82b7a29c r audio_mask +ffffffff82b7a2e0 r stream_enc_regs +ffffffff82b7aad8 r se_shift +ffffffff82b7abb4 r se_mask +ffffffff82b7af20 r vpg_regs +ffffffff82b7afac r vpg_shift +ffffffff82b7afd4 r vpg_mask +ffffffff82b7b070 r afmt_regs +ffffffff82b7b16c r afmt_shift +ffffffff82b7b180 r afmt_mask +ffffffff82b7b1c4 r hwseq_reg +ffffffff82b7b3e0 r hwseq_shift +ffffffff82b7b460 r hwseq_mask +ffffffff82b7c000 r dccg301_funcs +ffffffff82b7d000 r dcn301_link_enc_funcs +ffffffff82b7e000 r hubbub301_funcs +ffffffff82b7f000 r dcn301_funcs +ffffffff82b7f2c0 r dcn301_private_funcs +ffffffff82b80000 r dcn301_link_panel_cntl_funcs +ffffffff82b81000 r bios_regs +ffffffff82b81008 r debug_defaults_drv +ffffffff82b81180 r debug_defaults_diags +ffffffff82b81300 r clk_src_regs +ffffffff82b81450 r dccg_regs +ffffffff82b8153c r dccg_shift +ffffffff82b815d4 r dccg_mask +ffffffff82b81830 r abm_regs +ffffffff82b81930 r abm_shift +ffffffff82b81944 r abm_mask +ffffffff82b81990 r res_create_funcs +ffffffff82b819c0 r res_create_maximus_funcs +ffffffff82b819f0 r plane_cap +ffffffff82b81a20 r panel_cntl_regs +ffffffff82b81a60 r panel_cntl_shift +ffffffff82b81a70 r panel_cntl_mask +ffffffff82b81ab0 r link_enc_regs +ffffffff82b81fc0 r link_enc_aux_regs +ffffffff82b82000 r link_enc_hpd_regs +ffffffff82b82010 r le_shift +ffffffff82b82100 r le_mask +ffffffff82b824b8 r link_enc_feature +ffffffff82b824c8 r cs_shift +ffffffff82b824d4 r cs_mask +ffffffff82b824fc r hubbub_reg +ffffffff82b82670 r hubbub_shift +ffffffff82b826f8 r hubbub_mask +ffffffff82b82920 r vmid_regs +ffffffff82b82ae0 r vmid_shifts +ffffffff82b82ae8 r vmid_masks +ffffffff82b82b10 r hubp_regs +ffffffff82b83340 r hubp_shift +ffffffff82b8343c r hubp_mask +ffffffff82b83830 r dpp_regs +ffffffff82b84d30 r tf_shift +ffffffff82b85000 r tf_mask +ffffffff82b85b40 r opp_regs +ffffffff82b85ca0 r opp_shift +ffffffff82b85cd8 r opp_mask +ffffffff82b85db0 r optc_regs +ffffffff82b862b0 r optc_shift +ffffffff82b86370 r optc_mask +ffffffff82b8666c r mpc_regs +ffffffff82b87e58 r mpc_shift +ffffffff82b87f34 r mpc_mask +ffffffff82b882a0 r dsc_regs +ffffffff82b884ec r dsc_shift +ffffffff82b885a4 r dsc_mask +ffffffff82b88880 r dwbc30_regs +ffffffff82b88a5c r dwbc30_shift +ffffffff82b88b90 r dwbc30_mask +ffffffff82b89060 r mcif_wb30_regs +ffffffff82b8915c r mcif_wb30_shift +ffffffff82b89208 r mcif_wb30_mask +ffffffff82b894c0 r aux_engine_regs +ffffffff82b89560 r aux_mask +ffffffff82b895c0 r aux_shift +ffffffff82b895e0 r i2c_hw_regs +ffffffff82b896c0 r i2c_shifts +ffffffff82b896ec r i2c_masks +ffffffff82b89790 r audio_regs +ffffffff82b898c4 r audio_shift +ffffffff82b898dc r audio_mask +ffffffff82b89920 r stream_enc_regs +ffffffff82b89e70 r se_shift +ffffffff82b89f4c r se_mask +ffffffff82b8a2c0 r vpg_regs +ffffffff82b8a310 r vpg_shift +ffffffff82b8a338 r vpg_mask +ffffffff82b8a3d0 r afmt_regs +ffffffff82b8a460 r afmt_shift +ffffffff82b8a474 r afmt_mask +ffffffff82b8a4b8 r hwseq_reg +ffffffff82b8a6d4 r hwseq_shift +ffffffff82b8a754 r hwseq_mask +ffffffff82b8b000 r bios_regs +ffffffff82b8b008 r res_cap_dcn302 +ffffffff82b8b048 r debug_defaults_drv +ffffffff82b8b1c0 r debug_defaults_diags +ffffffff82b8b340 r clk_src_regs +ffffffff82b8b4e4 r dccg_regs +ffffffff82b8b5d0 r dccg_shift +ffffffff82b8b668 r dccg_mask +ffffffff82b8b8d0 r abm_regs +ffffffff82b8ba10 r abm_shift +ffffffff82b8ba24 r abm_mask +ffffffff82b8ba70 r res_create_funcs +ffffffff82b8baa0 r res_create_maximus_funcs +ffffffff82b8bad0 r plane_cap +ffffffff82b8bb00 r panel_cntl_regs +ffffffff82b8bb20 r panel_cntl_shift +ffffffff82b8bb30 r panel_cntl_mask +ffffffff82b8bb70 r link_enc_regs +ffffffff82b8c1d0 r link_enc_aux_regs +ffffffff82b8c220 r link_enc_hpd_regs +ffffffff82b8c234 r le_shift +ffffffff82b8c324 r le_mask +ffffffff82b8c6dc r link_enc_feature +ffffffff82b8c6ec r cs_shift +ffffffff82b8c6f8 r cs_mask +ffffffff82b8c720 r hubbub_reg +ffffffff82b8c894 r hubbub_shift +ffffffff82b8c91c r hubbub_mask +ffffffff82b8cb40 r vmid_regs +ffffffff82b8cd00 r vmid_shifts +ffffffff82b8cd08 r vmid_masks +ffffffff82b8cd30 r hubp_regs +ffffffff82b8d76c r hubp_shift +ffffffff82b8d868 r hubp_mask +ffffffff82b8dc60 r dpp_regs +ffffffff82b8f6a0 r tf_shift +ffffffff82b8f970 r tf_mask +ffffffff82b904b0 r opp_regs +ffffffff82b90668 r opp_shift +ffffffff82b906a0 r opp_mask +ffffffff82b90780 r optc_regs +ffffffff82b90dc0 r optc_shift +ffffffff82b90e80 r optc_mask +ffffffff82b9117c r mpc_regs +ffffffff82b92968 r mpc_shift +ffffffff82b92a44 r mpc_mask +ffffffff82b92db0 r dsc_regs +ffffffff82b93184 r dsc_shift +ffffffff82b9323c r dsc_mask +ffffffff82b93520 r dwbc30_regs +ffffffff82b936fc r dwbc30_shift +ffffffff82b93830 r dwbc30_mask +ffffffff82b93d00 r mcif_wb30_regs +ffffffff82b93dfc r mcif_wb30_shift +ffffffff82b93ea8 r mcif_wb30_mask +ffffffff82b94160 r aux_engine_regs +ffffffff82b94228 r aux_mask +ffffffff82b94288 r aux_shift +ffffffff82b942a0 r i2c_hw_regs +ffffffff82b943b8 r i2c_shifts +ffffffff82b943e4 r i2c_masks +ffffffff82b94490 r audio_regs +ffffffff82b945c4 r audio_shift +ffffffff82b945dc r audio_mask +ffffffff82b94620 r stream_enc_regs +ffffffff82b94cc4 r se_shift +ffffffff82b94da0 r se_mask +ffffffff82b95110 r vpg_regs +ffffffff82b95188 r vpg_shift +ffffffff82b951b0 r vpg_mask +ffffffff82b95250 r afmt_regs +ffffffff82b95328 r afmt_shift +ffffffff82b9533c r afmt_mask +ffffffff82b95380 r hwseq_reg +ffffffff82b9559c r hwseq_shift +ffffffff82b9561c r hwseq_mask +ffffffff82b96000 r bios_regs +ffffffff82b96008 r res_cap_dcn303 +ffffffff82b96048 r debug_defaults_drv +ffffffff82b961c0 r debug_defaults_diags +ffffffff82b96340 r clk_src_regs +ffffffff82b963e8 r dccg_regs +ffffffff82b964d4 r dccg_shift +ffffffff82b9656c r dccg_mask +ffffffff82b967d0 r abm_regs +ffffffff82b96850 r abm_shift +ffffffff82b96864 r abm_mask +ffffffff82b968b0 r res_create_funcs +ffffffff82b968e0 r res_create_maximus_funcs +ffffffff82b96910 r plane_cap +ffffffff82b96940 r panel_cntl_regs +ffffffff82b96960 r panel_cntl_shift +ffffffff82b96970 r panel_cntl_mask +ffffffff82b969b0 r link_enc_regs +ffffffff82b96c40 r link_enc_aux_regs +ffffffff82b96c60 r link_enc_hpd_regs +ffffffff82b96c68 r le_shift +ffffffff82b96d58 r le_mask +ffffffff82b97110 r link_enc_feature +ffffffff82b97120 r cs_shift +ffffffff82b9712c r cs_mask +ffffffff82b97154 r hubbub_reg +ffffffff82b972c8 r hubbub_shift +ffffffff82b97350 r hubbub_mask +ffffffff82b97570 r vmid_regs +ffffffff82b97730 r vmid_shifts +ffffffff82b97738 r vmid_masks +ffffffff82b97760 r hubp_regs +ffffffff82b97b78 r hubp_shift +ffffffff82b97c74 r hubp_mask +ffffffff82b98070 r dpp_regs +ffffffff82b98af0 r tf_shift +ffffffff82b98dc0 r tf_mask +ffffffff82b99900 r opp_regs +ffffffff82b999b0 r opp_shift +ffffffff82b999e8 r opp_mask +ffffffff82b99ac0 r optc_regs +ffffffff82b99d40 r optc_shift +ffffffff82b99e00 r optc_mask +ffffffff82b9a0fc r mpc_regs +ffffffff82b9b8e8 r mpc_shift +ffffffff82b9b9c4 r mpc_mask +ffffffff82b9bd30 r dsc_regs +ffffffff82b9beb8 r dsc_shift +ffffffff82b9bf70 r dsc_mask +ffffffff82b9c250 r dwbc30_regs +ffffffff82b9c42c r dwbc30_shift +ffffffff82b9c560 r dwbc30_mask +ffffffff82b9ca30 r mcif_wb30_regs +ffffffff82b9cb2c r mcif_wb30_shift +ffffffff82b9cbd8 r mcif_wb30_mask +ffffffff82b9ce90 r aux_engine_regs +ffffffff82b9cee0 r aux_mask +ffffffff82b9cf40 r aux_shift +ffffffff82b9cf60 r i2c_hw_regs +ffffffff82b9cfd0 r i2c_shifts +ffffffff82b9cffc r i2c_masks +ffffffff82b9d0a0 r audio_regs +ffffffff82b9d1d4 r audio_shift +ffffffff82b9d1ec r audio_mask +ffffffff82b9d230 r stream_enc_regs +ffffffff82b9d4d8 r se_shift +ffffffff82b9d5b4 r se_mask +ffffffff82b9d920 r vpg_regs +ffffffff82b9d95c r vpg_shift +ffffffff82b9d984 r vpg_mask +ffffffff82b9da20 r afmt_regs +ffffffff82b9da8c r afmt_shift +ffffffff82b9daa0 r afmt_mask +ffffffff82b9dae4 r hwseq_reg +ffffffff82b9dd00 r hwseq_shift +ffffffff82b9dd80 r hwseq_mask +ffffffff82b9e000 r dccg31_funcs +ffffffff82b9f000 r dcn31_link_enc_funcs +ffffffff82ba0000 r dcn30_str_enc_funcs +ffffffff82ba1000 r hubbub31_funcs +ffffffff82ba2000 r dcn31_funcs +ffffffff82ba22c0 r dcn31_private_funcs +ffffffff82ba3000 r dcn31_link_panel_cntl_funcs +ffffffff82ba4000 r bios_regs +ffffffff82ba4008 r res_cap_dcn31 +ffffffff82ba4048 r debug_defaults_diags +ffffffff82ba41c0 r clk_src_regs +ffffffff82ba4370 r clk_src_regs_b0 +ffffffff82ba4514 r dccg_regs +ffffffff82ba4600 r dccg_shift +ffffffff82ba4698 r dccg_mask +ffffffff82ba4900 r abm_regs +ffffffff82ba4a00 r abm_shift +ffffffff82ba4a14 r abm_mask +ffffffff82ba4a60 r res_create_funcs +ffffffff82ba4a90 r res_create_maximus_funcs +ffffffff82ba4ac0 r plane_cap +ffffffff82ba4af0 r link_enc_regs +ffffffff82ba5150 r link_enc_aux_regs +ffffffff82ba51a0 r link_enc_hpd_regs +ffffffff82ba51b4 r le_shift +ffffffff82ba52a4 r le_mask +ffffffff82ba565c r link_enc_feature +ffffffff82ba566c r panel_config_defaults +ffffffff82ba56a0 r debug_defaults_drv +ffffffff82ba5818 r cs_shift +ffffffff82ba5824 r cs_mask +ffffffff82ba584c r hubbub_reg +ffffffff82ba59c0 r hubbub_shift +ffffffff82ba5a48 r hubbub_mask +ffffffff82ba5c70 r vmid_regs +ffffffff82ba5e30 r vmid_shifts +ffffffff82ba5e38 r vmid_masks +ffffffff82ba5e60 r hubp_regs +ffffffff82ba6690 r hubp_shift +ffffffff82ba678c r hubp_mask +ffffffff82ba6b80 r dpp_regs +ffffffff82ba8080 r tf_shift +ffffffff82ba8350 r tf_mask +ffffffff82ba8e90 r opp_regs +ffffffff82ba8ff0 r opp_shift +ffffffff82ba9028 r opp_mask +ffffffff82ba9100 r optc_regs +ffffffff82ba9600 r optc_shift +ffffffff82ba96c0 r optc_mask +ffffffff82ba99bc r mpc_regs +ffffffff82bab1a8 r mpc_shift +ffffffff82bab284 r mpc_mask +ffffffff82bab5f0 r dsc_regs +ffffffff82bab83c r dsc_shift +ffffffff82bab8f4 r dsc_mask +ffffffff82babbd0 r dwbc30_regs +ffffffff82babdac r dwbc30_shift +ffffffff82babee0 r dwbc30_mask +ffffffff82bac3b0 r mcif_wb30_regs +ffffffff82bac4ac r mcif_wb30_shift +ffffffff82bac558 r mcif_wb30_mask +ffffffff82bac810 r aux_engine_regs +ffffffff82bac8d8 r aux_mask +ffffffff82bac938 r aux_shift +ffffffff82bac950 r i2c_hw_regs +ffffffff82baca68 r i2c_shifts +ffffffff82baca94 r i2c_masks +ffffffff82bacb40 r audio_regs +ffffffff82bacc74 r audio_shift +ffffffff82bacc8c r audio_mask +ffffffff82baccc8 r se_shift +ffffffff82bacda4 r se_mask +ffffffff82bad110 r vpg_regs +ffffffff82bad200 r vpg_shift +ffffffff82bad228 r vpg_mask +ffffffff82bad2d0 r afmt_regs +ffffffff82bad3a8 r afmt_shift +ffffffff82bad3bc r afmt_mask +ffffffff82bad410 r stream_enc_regs +ffffffff82baeab0 r hpo_dp_stream_enc_regs +ffffffff82baece0 r hpo_dp_se_shift +ffffffff82baed08 r hpo_dp_se_mask +ffffffff82baedb0 r apg_regs +ffffffff82baedf0 r apg_shift +ffffffff82baedf8 r apg_mask +ffffffff82baee10 r hpo_dp_link_enc_regs +ffffffff82baef20 r hpo_dp_le_shift +ffffffff82baef3c r hpo_dp_le_mask +ffffffff82baefa0 r hwseq_reg +ffffffff82baf1bc r hwseq_shift +ffffffff82baf23c r hwseq_mask +ffffffff82bb0000 r dccg314_funcs +ffffffff82bb1000 r dcn314_str_enc_funcs +ffffffff82bb2000 r dcn314_funcs +ffffffff82bb22c0 r dcn314_private_funcs +ffffffff82bb3000 r bios_regs +ffffffff82bb3008 r res_cap_dcn314 +ffffffff82bb3048 r debug_defaults_diags +ffffffff82bb31c0 r clk_src_regs +ffffffff82bb3364 r dccg_regs +ffffffff82bb3450 r dccg_shift +ffffffff82bb34e8 r dccg_mask +ffffffff82bb3750 r abm_regs +ffffffff82bb3850 r abm_shift +ffffffff82bb3864 r abm_mask +ffffffff82bb38b0 r res_create_funcs +ffffffff82bb38e0 r res_create_maximus_funcs +ffffffff82bb3910 r plane_cap +ffffffff82bb3940 r link_enc_regs +ffffffff82bb3fa0 r link_enc_aux_regs +ffffffff82bb3ff0 r link_enc_hpd_regs +ffffffff82bb4004 r le_shift +ffffffff82bb40f4 r le_mask +ffffffff82bb44ac r link_enc_feature +ffffffff82bb44bc r panel_config_defaults +ffffffff82bb44f0 r debug_defaults_drv +ffffffff82bb4668 r cs_shift +ffffffff82bb4674 r cs_mask +ffffffff82bb469c r hubbub_reg +ffffffff82bb4810 r hubbub_shift +ffffffff82bb4898 r hubbub_mask +ffffffff82bb4ac0 r vmid_regs +ffffffff82bb4c80 r vmid_shifts +ffffffff82bb4c88 r vmid_masks +ffffffff82bb4cb0 r hubp_regs +ffffffff82bb54e0 r hubp_shift +ffffffff82bb55dc r hubp_mask +ffffffff82bb59d0 r dpp_regs +ffffffff82bb6ed0 r tf_shift +ffffffff82bb71a0 r tf_mask +ffffffff82bb7ce0 r opp_regs +ffffffff82bb7e40 r opp_shift +ffffffff82bb7e78 r opp_mask +ffffffff82bb7f50 r optc_regs +ffffffff82bb8450 r optc_shift +ffffffff82bb8510 r optc_mask +ffffffff82bb880c r mpc_regs +ffffffff82bb9ff8 r mpc_shift +ffffffff82bba0d4 r mpc_mask +ffffffff82bba440 r dsc_regs +ffffffff82bba750 r dsc_shift +ffffffff82bba808 r dsc_mask +ffffffff82bbaae0 r dwbc30_regs +ffffffff82bbacbc r dwbc30_shift +ffffffff82bbadf0 r dwbc30_mask +ffffffff82bbb2c0 r mcif_wb30_regs +ffffffff82bbb3bc r mcif_wb30_shift +ffffffff82bbb468 r mcif_wb30_mask +ffffffff82bbb720 r aux_engine_regs +ffffffff82bbb7e8 r aux_mask +ffffffff82bbb848 r aux_shift +ffffffff82bbb860 r i2c_hw_regs +ffffffff82bbb978 r i2c_shifts +ffffffff82bbb9a4 r i2c_masks +ffffffff82bbba50 r audio_regs +ffffffff82bbbb84 r audio_shift +ffffffff82bbbb9c r audio_mask +ffffffff82bbbbe0 r stream_enc_regs +ffffffff82bbc284 r se_shift +ffffffff82bbc360 r se_mask +ffffffff82bbc6d0 r vpg_regs +ffffffff82bbc7c0 r vpg_shift +ffffffff82bbc7e8 r vpg_mask +ffffffff82bbc890 r afmt_regs +ffffffff82bbc968 r afmt_shift +ffffffff82bbc97c r afmt_mask +ffffffff82bbc9d0 r hpo_dp_stream_enc_regs +ffffffff82bbcc00 r hpo_dp_se_shift +ffffffff82bbcc28 r hpo_dp_se_mask +ffffffff82bbccd0 r apg_regs +ffffffff82bbcd10 r apg_shift +ffffffff82bbcd18 r apg_mask +ffffffff82bbcd30 r hpo_dp_link_enc_regs +ffffffff82bbce40 r hpo_dp_le_shift +ffffffff82bbce5c r hpo_dp_le_mask +ffffffff82bbcec0 r hwseq_reg +ffffffff82bbd0dc r hwseq_shift +ffffffff82bbd15c r hwseq_mask +ffffffff82bbe000 r bios_regs +ffffffff82bbe008 r res_cap_dcn31 +ffffffff82bbe048 r debug_defaults_diags +ffffffff82bbe1c0 r clk_src_regs +ffffffff82bbe364 r dccg_regs +ffffffff82bbe450 r dccg_shift +ffffffff82bbe4e8 r dccg_mask +ffffffff82bbe750 r abm_regs +ffffffff82bbe850 r abm_shift +ffffffff82bbe864 r abm_mask +ffffffff82bbe8b0 r res_create_funcs +ffffffff82bbe8e0 r res_create_maximus_funcs +ffffffff82bbe910 r plane_cap +ffffffff82bbe940 r link_enc_regs +ffffffff82bbefa0 r link_enc_aux_regs +ffffffff82bbeff0 r link_enc_hpd_regs +ffffffff82bbf004 r le_shift +ffffffff82bbf0f4 r le_mask +ffffffff82bbf4ac r link_enc_feature +ffffffff82bbf4bc r panel_config_defaults +ffffffff82bbf4f0 r debug_defaults_drv +ffffffff82bbf668 r cs_shift +ffffffff82bbf674 r cs_mask +ffffffff82bbf69c r hubbub_reg +ffffffff82bbf810 r hubbub_shift +ffffffff82bbf898 r hubbub_mask +ffffffff82bbfac0 r vmid_regs +ffffffff82bbfc80 r vmid_shifts +ffffffff82bbfc88 r vmid_masks +ffffffff82bbfcb0 r hubp_regs +ffffffff82bc04e0 r hubp_shift +ffffffff82bc05dc r hubp_mask +ffffffff82bc09d0 r dpp_regs +ffffffff82bc1ed0 r tf_shift +ffffffff82bc21a0 r tf_mask +ffffffff82bc2ce0 r opp_regs +ffffffff82bc2e40 r opp_shift +ffffffff82bc2e78 r opp_mask +ffffffff82bc2f50 r optc_regs +ffffffff82bc3450 r optc_shift +ffffffff82bc3510 r optc_mask +ffffffff82bc380c r mpc_regs +ffffffff82bc4ff8 r mpc_shift +ffffffff82bc50d4 r mpc_mask +ffffffff82bc5440 r dsc_regs +ffffffff82bc568c r dsc_shift +ffffffff82bc5744 r dsc_mask +ffffffff82bc5a20 r dwbc30_regs +ffffffff82bc5bfc r dwbc30_shift +ffffffff82bc5d30 r dwbc30_mask +ffffffff82bc6200 r mcif_wb30_regs +ffffffff82bc62fc r mcif_wb30_shift +ffffffff82bc63a8 r mcif_wb30_mask +ffffffff82bc6660 r aux_engine_regs +ffffffff82bc6728 r aux_mask +ffffffff82bc6788 r aux_shift +ffffffff82bc67a0 r i2c_hw_regs +ffffffff82bc68b8 r i2c_shifts +ffffffff82bc68e4 r i2c_masks +ffffffff82bc6990 r audio_regs +ffffffff82bc6ac4 r audio_shift +ffffffff82bc6adc r audio_mask +ffffffff82bc6b20 r stream_enc_regs +ffffffff82bc71c4 r se_shift +ffffffff82bc72a0 r se_mask +ffffffff82bc7610 r vpg_regs +ffffffff82bc7700 r vpg_shift +ffffffff82bc7728 r vpg_mask +ffffffff82bc77d0 r afmt_regs +ffffffff82bc78a8 r afmt_shift +ffffffff82bc78bc r afmt_mask +ffffffff82bc7910 r hpo_dp_stream_enc_regs +ffffffff82bc7b40 r hpo_dp_se_shift +ffffffff82bc7b68 r hpo_dp_se_mask +ffffffff82bc7c10 r apg_regs +ffffffff82bc7c50 r apg_shift +ffffffff82bc7c58 r apg_mask +ffffffff82bc7c70 r hpo_dp_link_enc_regs +ffffffff82bc7d80 r hpo_dp_le_shift +ffffffff82bc7d9c r hpo_dp_le_mask +ffffffff82bc7e00 r hwseq_reg +ffffffff82bc801c r hwseq_shift +ffffffff82bc809c r hwseq_mask +ffffffff82bc9000 r bios_regs +ffffffff82bc9008 r res_cap_dcn31 +ffffffff82bc9048 r debug_defaults_diags +ffffffff82bc91c0 r clk_src_regs +ffffffff82bc9364 r dccg_regs +ffffffff82bc9450 r dccg_shift +ffffffff82bc94e8 r dccg_mask +ffffffff82bc9750 r abm_regs +ffffffff82bc9850 r abm_shift +ffffffff82bc9864 r abm_mask +ffffffff82bc98b0 r res_create_funcs +ffffffff82bc98e0 r res_create_maximus_funcs +ffffffff82bc9910 r plane_cap +ffffffff82bc9940 r link_enc_regs +ffffffff82bc9fa0 r link_enc_aux_regs +ffffffff82bc9ff0 r link_enc_hpd_regs +ffffffff82bca004 r le_shift +ffffffff82bca0f4 r le_mask +ffffffff82bca4ac r link_enc_feature +ffffffff82bca4bc r panel_config_defaults +ffffffff82bca4f0 r debug_defaults_drv +ffffffff82bca668 r cs_shift +ffffffff82bca674 r cs_mask +ffffffff82bca69c r hubbub_reg +ffffffff82bca810 r hubbub_shift +ffffffff82bca898 r hubbub_mask +ffffffff82bcaac0 r vmid_regs +ffffffff82bcac80 r vmid_shifts +ffffffff82bcac88 r vmid_masks +ffffffff82bcacb0 r hubp_regs +ffffffff82bcb4e0 r hubp_shift +ffffffff82bcb5dc r hubp_mask +ffffffff82bcb9d0 r dpp_regs +ffffffff82bcced0 r tf_shift +ffffffff82bcd1a0 r tf_mask +ffffffff82bcdce0 r opp_regs +ffffffff82bcde40 r opp_shift +ffffffff82bcde78 r opp_mask +ffffffff82bcdf50 r optc_regs +ffffffff82bce450 r optc_shift +ffffffff82bce510 r optc_mask +ffffffff82bce80c r mpc_regs +ffffffff82bcfff8 r mpc_shift +ffffffff82bd00d4 r mpc_mask +ffffffff82bd0440 r dsc_regs +ffffffff82bd068c r dsc_shift +ffffffff82bd0744 r dsc_mask +ffffffff82bd0a20 r dwbc30_regs +ffffffff82bd0bfc r dwbc30_shift +ffffffff82bd0d30 r dwbc30_mask +ffffffff82bd1200 r mcif_wb30_regs +ffffffff82bd12fc r mcif_wb30_shift +ffffffff82bd13a8 r mcif_wb30_mask +ffffffff82bd1660 r aux_engine_regs +ffffffff82bd1728 r aux_mask +ffffffff82bd1788 r aux_shift +ffffffff82bd17a0 r i2c_hw_regs +ffffffff82bd18b8 r i2c_shifts +ffffffff82bd18e4 r i2c_masks +ffffffff82bd1990 r audio_regs +ffffffff82bd1ac4 r audio_shift +ffffffff82bd1adc r audio_mask +ffffffff82bd1b20 r stream_enc_regs +ffffffff82bd21c4 r se_shift +ffffffff82bd22a0 r se_mask +ffffffff82bd2610 r vpg_regs +ffffffff82bd2700 r vpg_shift +ffffffff82bd2728 r vpg_mask +ffffffff82bd27d0 r afmt_regs +ffffffff82bd28a8 r afmt_shift +ffffffff82bd28bc r afmt_mask +ffffffff82bd2910 r hpo_dp_stream_enc_regs +ffffffff82bd2b40 r hpo_dp_se_shift +ffffffff82bd2b68 r hpo_dp_se_mask +ffffffff82bd2c10 r apg_regs +ffffffff82bd2c50 r apg_shift +ffffffff82bd2c58 r apg_mask +ffffffff82bd2c70 r hpo_dp_link_enc_regs +ffffffff82bd2d80 r hpo_dp_le_shift +ffffffff82bd2d9c r hpo_dp_le_mask +ffffffff82bd2e00 r hwseq_reg +ffffffff82bd301c r hwseq_shift +ffffffff82bd309c r hwseq_mask +ffffffff82bd4000 r dccg32_funcs +ffffffff82bd5000 r dcn32_link_enc_funcs +ffffffff82bd6000 r dcn32_str_enc_funcs +ffffffff82bd7000 r hubbub32_funcs +ffffffff82bd8000 r dcn32_funcs +ffffffff82bd82c0 r dcn32_private_funcs +ffffffff82bd9000 R dcn32_mmhubbub_funcs +ffffffff82bda000 R dcn32_mpc_funcs +ffffffff82bdb000 r res_cap_dcn32 +ffffffff82bdb040 r debug_defaults_diags +ffffffff82bdb1b8 r dccg_shift +ffffffff82bdb250 r dccg_mask +ffffffff82bdb4ac r abm_shift +ffffffff82bdb4c0 r abm_mask +ffffffff82bdb508 r res_create_funcs +ffffffff82bdb538 r res_create_maximus_funcs +ffffffff82bdb568 r plane_cap +ffffffff82bdb594 r le_shift +ffffffff82bdb684 r le_mask +ffffffff82bdba3c r link_enc_feature +ffffffff82bdba50 r debug_defaults_drv +ffffffff82bdbbc8 r cs_shift +ffffffff82bdbbd4 r cs_mask +ffffffff82bdbbfc r hubbub_shift +ffffffff82bdbc84 r hubbub_mask +ffffffff82bdbea0 r vmid_shifts +ffffffff82bdbea8 r vmid_masks +ffffffff82bdbec8 r hubp_shift +ffffffff82bdbfc4 r hubp_mask +ffffffff82bdc3b4 r tf_shift +ffffffff82bdc684 r tf_mask +ffffffff82bdd1c4 r opp_shift +ffffffff82bdd1fc r opp_mask +ffffffff82bdd2d0 r optc_shift +ffffffff82bdd390 r optc_mask +ffffffff82bdd68c r mpc_shift +ffffffff82bdd768 r mpc_mask +ffffffff82bddad4 r dsc_shift +ffffffff82bddb8c r dsc_mask +ffffffff82bdde64 r dwbc30_shift +ffffffff82bddf98 r dwbc30_mask +ffffffff82bde460 r mcif_wb30_shift +ffffffff82bde50c r mcif_wb30_mask +ffffffff82bde7b8 r aux_mask +ffffffff82bde818 r aux_shift +ffffffff82bde830 r i2c_shifts +ffffffff82bde85c r i2c_masks +ffffffff82bde900 r audio_shift +ffffffff82bde918 r audio_mask +ffffffff82bde954 r se_shift +ffffffff82bdea30 r se_mask +ffffffff82bded9c r vpg_shift +ffffffff82bdedc4 r vpg_mask +ffffffff82bdee58 r afmt_shift +ffffffff82bdee6c r afmt_mask +ffffffff82bdeeb0 r hpo_dp_se_shift +ffffffff82bdeed8 r hpo_dp_se_mask +ffffffff82bdef78 r apg_shift +ffffffff82bdef80 r apg_mask +ffffffff82bdef98 r hpo_dp_le_shift +ffffffff82bdefb4 r hpo_dp_le_mask +ffffffff82bdf018 r hwseq_shift +ffffffff82bdf098 r hwseq_mask +ffffffff82be0000 r dcn321_link_enc_funcs +ffffffff82be1000 r res_cap_dcn321 +ffffffff82be1040 r debug_defaults_diags +ffffffff82be11b8 r dccg_shift +ffffffff82be1250 r dccg_mask +ffffffff82be14ac r abm_shift +ffffffff82be14c0 r abm_mask +ffffffff82be1508 r res_create_funcs +ffffffff82be1538 r res_create_maximus_funcs +ffffffff82be1568 r plane_cap +ffffffff82be1594 r le_shift +ffffffff82be1684 r le_mask +ffffffff82be1a3c r link_enc_feature +ffffffff82be1a50 r debug_defaults_drv +ffffffff82be1bc8 r cs_shift +ffffffff82be1bd4 r cs_mask +ffffffff82be1bfc r hubbub_shift +ffffffff82be1c84 r hubbub_mask +ffffffff82be1ea0 r vmid_shifts +ffffffff82be1ea8 r vmid_masks +ffffffff82be1ec8 r hubp_shift +ffffffff82be1fc4 r hubp_mask +ffffffff82be23b4 r tf_shift +ffffffff82be2684 r tf_mask +ffffffff82be31c4 r opp_shift +ffffffff82be31fc r opp_mask +ffffffff82be32d0 r optc_shift +ffffffff82be3390 r optc_mask +ffffffff82be368c r mpc_shift +ffffffff82be3768 r mpc_mask +ffffffff82be3ad4 r dsc_shift +ffffffff82be3b8c r dsc_mask +ffffffff82be3e64 r dwbc30_shift +ffffffff82be3f98 r dwbc30_mask +ffffffff82be4460 r mcif_wb30_shift +ffffffff82be450c r mcif_wb30_mask +ffffffff82be47b8 r aux_mask +ffffffff82be4818 r aux_shift +ffffffff82be4830 r i2c_shifts +ffffffff82be485c r i2c_masks +ffffffff82be4900 r audio_shift +ffffffff82be4918 r audio_mask +ffffffff82be4954 r se_shift +ffffffff82be4a30 r se_mask +ffffffff82be4d9c r vpg_shift +ffffffff82be4dc4 r vpg_mask +ffffffff82be4e58 r afmt_shift +ffffffff82be4e6c r afmt_mask +ffffffff82be4eb0 r hpo_dp_se_shift +ffffffff82be4ed8 r hpo_dp_se_mask +ffffffff82be4f78 r apg_shift +ffffffff82be4f80 r apg_mask +ffffffff82be4f98 r hpo_dp_le_shift +ffffffff82be4fb4 r hpo_dp_le_mask +ffffffff82be5018 r hwseq_shift +ffffffff82be5098 r hwseq_mask +ffffffff82be7000 R dcn10_soc_defaults +ffffffff82be708c R dcn10_ip_defaults +ffffffff82bf2000 R dml20_funcs +ffffffff82bf2030 R dml20v2_funcs +ffffffff82bf2060 R dml21_funcs +ffffffff82bf2090 R dml30_funcs +ffffffff82bf20c0 R dml31_funcs +ffffffff82bf20f0 R dml314_funcs +ffffffff82bf2120 R dml32_funcs +ffffffff82bf5000 R qp_table_422_10bpc_min +ffffffff82bf5740 R qp_table_444_8bpc_max +ffffffff82bf6080 R qp_table_420_12bpc_max +ffffffff82bf67c0 R qp_table_444_10bpc_min +ffffffff82bf7400 R qp_table_420_8bpc_max +ffffffff82bf7840 R qp_table_444_8bpc_min +ffffffff82bf8180 R qp_table_444_12bpc_min +ffffffff82bf90c0 R qp_table_420_12bpc_min +ffffffff82bf9800 R qp_table_422_12bpc_min +ffffffff82bfa140 R qp_table_422_12bpc_max +ffffffff82bfaa80 R qp_table_444_12bpc_max +ffffffff82bfb9c0 R qp_table_420_8bpc_min +ffffffff82bfbe00 R qp_table_422_8bpc_min +ffffffff82bfc340 R qp_table_422_10bpc_max +ffffffff82bfca80 R qp_table_420_10bpc_max +ffffffff82bfd040 R qp_table_420_10bpc_min +ffffffff82bfd600 R qp_table_444_10bpc_max +ffffffff82bfe240 R qp_table_422_8bpc_max ffffffff82c00000 r funcs +ffffffff82c00050 r hpd_regs +ffffffff82c001a0 r hpd_shift +ffffffff82c001b0 r hpd_mask +ffffffff82c001c0 r ddc_data_regs +ffffffff82c003a0 r ddc_clk_regs +ffffffff82c00580 r ddc_shift +ffffffff82c005a8 r ddc_mask ffffffff82c01000 r funcs -ffffffff82c01050 r hpd_regs -ffffffff82c011a0 r hpd_shift -ffffffff82c011b0 r hpd_mask -ffffffff82c011c0 r ddc_data_regs -ffffffff82c013a0 r ddc_clk_regs -ffffffff82c01580 r ddc_shift -ffffffff82c015a8 r ddc_mask ffffffff82c02000 r funcs +ffffffff82c02050 r hpd_regs +ffffffff82c021a0 r hpd_shift +ffffffff82c021b0 r hpd_mask +ffffffff82c021c0 r ddc_data_regs +ffffffff82c023a0 r ddc_clk_regs +ffffffff82c02580 r ddc_shift +ffffffff82c025a8 r ddc_mask ffffffff82c03000 r funcs -ffffffff82c03050 r hpd_regs -ffffffff82c031a0 r hpd_shift -ffffffff82c031b0 r hpd_mask -ffffffff82c031c0 r ddc_data_regs -ffffffff82c033a0 r ddc_clk_regs -ffffffff82c03580 r ddc_shift -ffffffff82c035a8 r ddc_mask ffffffff82c04000 r funcs +ffffffff82c04050 r hpd_regs +ffffffff82c041a0 r hpd_shift +ffffffff82c041b0 r hpd_mask +ffffffff82c041c0 r ddc_data_regs +ffffffff82c043a0 r ddc_clk_regs +ffffffff82c04580 r ddc_shift +ffffffff82c045a8 r ddc_mask ffffffff82c05000 r funcs -ffffffff82c05050 r hpd_regs -ffffffff82c051a0 r hpd_shift -ffffffff82c051b0 r hpd_mask -ffffffff82c051c0 r ddc_data_regs -ffffffff82c053a0 r ddc_clk_regs -ffffffff82c05580 r ddc_shift -ffffffff82c055a8 r ddc_mask -ffffffff82c055d0 r generic_regs -ffffffff82c05640 r generic_shift -ffffffff82c05650 r generic_mask ffffffff82c06000 r funcs +ffffffff82c06050 r hpd_regs +ffffffff82c061a0 r hpd_shift +ffffffff82c061b0 r hpd_mask +ffffffff82c061c0 r ddc_data_regs +ffffffff82c063a0 r ddc_clk_regs +ffffffff82c06580 r ddc_shift +ffffffff82c065a8 r ddc_mask +ffffffff82c065d0 r generic_regs +ffffffff82c06640 r generic_shift +ffffffff82c06650 r generic_mask ffffffff82c07000 r funcs -ffffffff82c07050 r hpd_regs -ffffffff82c071a0 r hpd_shift -ffffffff82c071b0 r hpd_mask -ffffffff82c071c0 r ddc_data_regs_dcn -ffffffff82c07370 r ddc_clk_regs_dcn -ffffffff82c07520 r ddc_shift -ffffffff82c07610 r ddc_mask -ffffffff82c07700 r generic_regs -ffffffff82c07770 r generic_shift -ffffffff82c07780 r generic_mask ffffffff82c08000 r funcs +ffffffff82c08050 r hpd_regs +ffffffff82c081a0 r hpd_shift +ffffffff82c081b0 r hpd_mask +ffffffff82c081c0 r ddc_data_regs_dcn +ffffffff82c08370 r ddc_clk_regs_dcn +ffffffff82c08520 r ddc_shift +ffffffff82c08610 r ddc_mask +ffffffff82c08700 r generic_regs +ffffffff82c08770 r generic_shift +ffffffff82c08780 r generic_mask ffffffff82c09000 r funcs -ffffffff82c09050 r hpd_regs -ffffffff82c09168 r hpd_shift -ffffffff82c09178 r hpd_mask -ffffffff82c09190 r ddc_data_regs_dcn -ffffffff82c092c0 r ddc_clk_regs_dcn -ffffffff82c093f0 r ddc_shift -ffffffff82c094e0 r ddc_mask -ffffffff82c095d0 r generic_regs -ffffffff82c09604 r generic_shift -ffffffff82c0960c r generic_mask ffffffff82c0a000 r funcs +ffffffff82c0a050 r hpd_regs +ffffffff82c0a168 r hpd_shift +ffffffff82c0a178 r hpd_mask +ffffffff82c0a190 r ddc_data_regs_dcn +ffffffff82c0a2c0 r ddc_clk_regs_dcn +ffffffff82c0a3f0 r ddc_shift +ffffffff82c0a4e0 r ddc_mask +ffffffff82c0a5d0 r generic_regs +ffffffff82c0a604 r generic_shift +ffffffff82c0a60c r generic_mask ffffffff82c0b000 r funcs -ffffffff82c0b050 r hpd_regs -ffffffff82c0b1a0 r hpd_shift -ffffffff82c0b1b0 r hpd_mask -ffffffff82c0b1c0 r ddc_data_regs_dcn -ffffffff82c0b370 r ddc_clk_regs_dcn -ffffffff82c0b520 r ddc_shift -ffffffff82c0b610 r ddc_mask -ffffffff82c0b700 r generic_regs -ffffffff82c0b770 r generic_shift -ffffffff82c0b780 r generic_mask ffffffff82c0c000 r funcs +ffffffff82c0c050 r hpd_regs +ffffffff82c0c1a0 r hpd_shift +ffffffff82c0c1b0 r hpd_mask +ffffffff82c0c1c0 r ddc_data_regs_dcn +ffffffff82c0c370 r ddc_clk_regs_dcn +ffffffff82c0c520 r ddc_shift +ffffffff82c0c610 r ddc_mask +ffffffff82c0c700 r generic_regs +ffffffff82c0c770 r generic_shift +ffffffff82c0c780 r generic_mask ffffffff82c0d000 r funcs -ffffffff82c0d050 r hpd_regs -ffffffff82c0d168 r hpd_shift -ffffffff82c0d178 r hpd_mask -ffffffff82c0d190 r ddc_data_regs_dcn -ffffffff82c0d300 r ddc_clk_regs_dcn -ffffffff82c0d470 r ddc_shift -ffffffff82c0d560 r ddc_mask -ffffffff82c0d650 r generic_regs -ffffffff82c0d6c0 r generic_shift -ffffffff82c0d6d0 r generic_mask ffffffff82c0e000 r funcs +ffffffff82c0e050 r hpd_regs +ffffffff82c0e168 r hpd_shift +ffffffff82c0e178 r hpd_mask +ffffffff82c0e190 r ddc_data_regs_dcn +ffffffff82c0e300 r ddc_clk_regs_dcn +ffffffff82c0e470 r ddc_shift +ffffffff82c0e560 r ddc_mask +ffffffff82c0e650 r generic_regs +ffffffff82c0e6c0 r generic_shift +ffffffff82c0e6d0 r generic_mask ffffffff82c0f000 r funcs -ffffffff82c0f050 r hpd_regs -ffffffff82c0f168 r hpd_shift -ffffffff82c0f178 r hpd_mask -ffffffff82c0f190 r ddc_data_regs_dcn -ffffffff82c0f340 r ddc_clk_regs_dcn -ffffffff82c0f4f0 r ddc_shift -ffffffff82c0f5e0 r ddc_mask -ffffffff82c0f6d0 r generic_regs -ffffffff82c0f740 r generic_shift -ffffffff82c0f750 r generic_mask ffffffff82c10000 r funcs +ffffffff82c10050 r hpd_regs +ffffffff82c10168 r hpd_shift +ffffffff82c10178 r hpd_mask +ffffffff82c10190 r ddc_data_regs_dcn +ffffffff82c10340 r ddc_clk_regs_dcn +ffffffff82c104f0 r ddc_shift +ffffffff82c105e0 r ddc_mask +ffffffff82c106d0 r generic_regs +ffffffff82c10740 r generic_shift +ffffffff82c10750 r generic_mask ffffffff82c11000 r funcs ffffffff82c12000 r funcs ffffffff82c13000 r funcs -ffffffff82c14000 r hdmi_14_protection -ffffffff82c14010 r dp_11_protection -ffffffff82c14020 r hdcp_i2c_offsets -ffffffff82c14050 r hdcp_dpcd_addrs -ffffffff82c15000 r irq_service_funcs_dce110 -ffffffff82c15010 r irq_source_info_dce110 -ffffffff82c162a0 r dummy_irq_info_funcs -ffffffff82c162b0 r hpd_irq_info_funcs -ffffffff82c162c0 r hpd_rx_irq_info_funcs -ffffffff82c162d0 r pflip_irq_info_funcs -ffffffff82c162e0 r vupdate_irq_info_funcs -ffffffff82c162f0 r vblank_irq_info_funcs -ffffffff82c17000 r irq_service_funcs_dce120 -ffffffff82c17008 r dummy_irq_info_funcs -ffffffff82c17018 r hpd_irq_info_funcs -ffffffff82c17028 r hpd_rx_irq_info_funcs -ffffffff82c17038 r pflip_irq_info_funcs -ffffffff82c17048 r vupdate_irq_info_funcs -ffffffff82c17058 r vblank_irq_info_funcs -ffffffff82c17070 r irq_source_info_dce120 -ffffffff82c19000 r irq_service_funcs_dce80 -ffffffff82c19008 r dummy_irq_info_funcs -ffffffff82c19018 r hpd_irq_info_funcs -ffffffff82c19028 r hpd_rx_irq_info_funcs -ffffffff82c19038 r pflip_irq_info_funcs -ffffffff82c19048 r vupdate_irq_info_funcs -ffffffff82c19058 r vblank_irq_info_funcs -ffffffff82c19070 r irq_source_info_dce80 -ffffffff82c1b000 r irq_service_funcs_dcn10 -ffffffff82c1b008 r dummy_irq_info_funcs -ffffffff82c1b018 r hpd_irq_info_funcs -ffffffff82c1b028 r hpd_rx_irq_info_funcs -ffffffff82c1b038 r pflip_irq_info_funcs -ffffffff82c1b048 r vupdate_no_lock_irq_info_funcs -ffffffff82c1b058 r vblank_irq_info_funcs -ffffffff82c1b068 r vline0_irq_info_funcs -ffffffff82c1b080 r irq_source_info_dcn10 -ffffffff82c1d000 r irq_service_funcs_dcn20 -ffffffff82c1d008 r dummy_irq_info_funcs -ffffffff82c1d018 r hpd_irq_info_funcs -ffffffff82c1d028 r hpd_rx_irq_info_funcs -ffffffff82c1d038 r pflip_irq_info_funcs -ffffffff82c1d048 r vupdate_no_lock_irq_info_funcs -ffffffff82c1d058 r vblank_irq_info_funcs -ffffffff82c1d068 r vline0_irq_info_funcs -ffffffff82c1d080 r irq_source_info_dcn20 -ffffffff82c1f000 r irq_service_funcs_dcn201 -ffffffff82c1f008 r dummy_irq_info_funcs -ffffffff82c1f018 r hpd_irq_info_funcs -ffffffff82c1f028 r hpd_rx_irq_info_funcs -ffffffff82c1f038 r pflip_irq_info_funcs -ffffffff82c1f048 r vupdate_no_lock_irq_info_funcs -ffffffff82c1f058 r vblank_irq_info_funcs -ffffffff82c1f068 r vline0_irq_info_funcs -ffffffff82c1f080 r irq_source_info_dcn201 -ffffffff82c21000 r irq_source_info_dcn21 -ffffffff82c22290 r irq_service_funcs_dcn21 -ffffffff82c22298 r dummy_irq_info_funcs -ffffffff82c222a8 r hpd_irq_info_funcs -ffffffff82c222b8 r hpd_rx_irq_info_funcs -ffffffff82c222c8 r pflip_irq_info_funcs -ffffffff82c222d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c222e8 r vblank_irq_info_funcs -ffffffff82c222f8 r vline0_irq_info_funcs -ffffffff82c22308 r dmub_outbox_irq_info_funcs -ffffffff82c23000 r irq_source_info_dcn30 -ffffffff82c24290 r irq_service_funcs_dcn30 -ffffffff82c24298 r dummy_irq_info_funcs -ffffffff82c242a8 r hpd_irq_info_funcs -ffffffff82c242b8 r hpd_rx_irq_info_funcs -ffffffff82c242c8 r pflip_irq_info_funcs -ffffffff82c242d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c242e8 r vblank_irq_info_funcs -ffffffff82c242f8 r vline0_irq_info_funcs -ffffffff82c24308 r dmub_trace_irq_info_funcs -ffffffff82c25000 r irq_source_info_dcn302 -ffffffff82c26290 r irq_service_funcs_dcn302 -ffffffff82c26298 r dummy_irq_info_funcs -ffffffff82c262a8 r hpd_irq_info_funcs -ffffffff82c262b8 r hpd_rx_irq_info_funcs -ffffffff82c262c8 r pflip_irq_info_funcs -ffffffff82c262d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c262e8 r vblank_irq_info_funcs -ffffffff82c262f8 r vline0_irq_info_funcs -ffffffff82c26308 r dmub_trace_irq_info_funcs -ffffffff82c27000 r irq_service_funcs_dcn303 -ffffffff82c27008 r dummy_irq_info_funcs -ffffffff82c27018 r hpd_irq_info_funcs -ffffffff82c27028 r hpd_rx_irq_info_funcs -ffffffff82c27038 r pflip_irq_info_funcs -ffffffff82c27048 r vupdate_no_lock_irq_info_funcs -ffffffff82c27058 r vblank_irq_info_funcs -ffffffff82c27068 r vline0_irq_info_funcs -ffffffff82c27080 r irq_source_info_dcn303 -ffffffff82c29000 r irq_source_info_dcn31 -ffffffff82c2a290 r irq_service_funcs_dcn31 -ffffffff82c2a298 r dummy_irq_info_funcs -ffffffff82c2a2a8 r hpd_irq_info_funcs -ffffffff82c2a2b8 r hpd_rx_irq_info_funcs -ffffffff82c2a2c8 r pflip_irq_info_funcs -ffffffff82c2a2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c2a2e8 r vblank_irq_info_funcs -ffffffff82c2a2f8 r vline0_irq_info_funcs -ffffffff82c2a308 r outbox_irq_info_funcs -ffffffff82c2b000 r irq_source_info_dcn314 -ffffffff82c2c290 r irq_service_funcs_dcn314 -ffffffff82c2c298 r dummy_irq_info_funcs -ffffffff82c2c2a8 r hpd_irq_info_funcs -ffffffff82c2c2b8 r hpd_rx_irq_info_funcs -ffffffff82c2c2c8 r pflip_irq_info_funcs -ffffffff82c2c2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c2c2e8 r vblank_irq_info_funcs -ffffffff82c2c2f8 r vline0_irq_info_funcs -ffffffff82c2c308 r outbox_irq_info_funcs -ffffffff82c2d000 r irq_source_info_dcn315 -ffffffff82c2e290 r irq_service_funcs_dcn315 -ffffffff82c2e298 r dummy_irq_info_funcs -ffffffff82c2e2a8 r hpd_irq_info_funcs -ffffffff82c2e2b8 r hpd_rx_irq_info_funcs -ffffffff82c2e2c8 r pflip_irq_info_funcs -ffffffff82c2e2d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c2e2e8 r vblank_irq_info_funcs -ffffffff82c2e2f8 r vline0_irq_info_funcs -ffffffff82c2e308 r outbox_irq_info_funcs -ffffffff82c2f000 r irq_source_info_dcn32 -ffffffff82c30290 r irq_service_funcs_dcn32 -ffffffff82c30298 r dummy_irq_info_funcs -ffffffff82c302a8 r hpd_irq_info_funcs -ffffffff82c302b8 r hpd_rx_irq_info_funcs -ffffffff82c302c8 r pflip_irq_info_funcs -ffffffff82c302d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c302e8 r vblank_irq_info_funcs -ffffffff82c302f8 r vline0_irq_info_funcs -ffffffff82c30308 r outbox_irq_info_funcs -ffffffff82c31000 r dio_link_hwss -ffffffff82c32000 r dpia_link_hwss -ffffffff82c33000 r hpo_dp_link_hwss -ffffffff82c34000 r virtual_lnk_enc_funcs -ffffffff82c35000 r virtual_link_hwss -ffffffff82c36000 r virtual_str_enc_funcs -ffffffff82c37000 R dmub_srv_dcn20_regs -ffffffff82c38000 R dmub_srv_dcn21_regs -ffffffff82c39000 R dmub_srv_dcn30_regs -ffffffff82c3a000 R dmub_srv_dcn301_regs -ffffffff82c3b000 R dmub_srv_dcn302_regs -ffffffff82c3c000 R dmub_srv_dcn303_regs -ffffffff82c3d000 R dmub_srv_dcn31_regs -ffffffff82c3e000 R dmub_srv_dcn315_regs -ffffffff82c3f000 R dmub_srv_dcn316_regs -ffffffff82c40000 R dmub_srv_dcn32_regs -ffffffff82c41000 r numerator01 -ffffffff82c41020 r numerator02 -ffffffff82c41040 r numerator04 -ffffffff82c41060 r numerator05 -ffffffff82c43000 r abm_settings -ffffffff82c43010 r abm_settings_config0 -ffffffff82c43050 r abm_settings_config1 -ffffffff82c43088 r min_reduction_table_v_2_2 -ffffffff82c43095 r max_reduction_table_v_2_2 -ffffffff82c430a2 r min_reduction_table -ffffffff82c430af r max_reduction_table -ffffffff82c44000 R amdgpu_pp_profile_name -ffffffff82c45000 r pp_lib_thermal_controller_names -ffffffff82c46000 r pp_ip_funcs -ffffffff82c460a0 R pp_smu_ip_block -ffffffff82c460b8 r pp_dpm_funcs -ffffffff82c47000 r gpio_tbl -ffffffff82c470f0 r enable_fb_req_rej_tbl -ffffffff82c47140 r use_bclk_tbl -ffffffff82c47310 r turn_off_plls_tbl -ffffffff82c47640 r enter_baco_tbl -ffffffff82c47730 r exit_baco_tbl -ffffffff82c47850 r clean_baco_tbl +ffffffff82c14000 r funcs +ffffffff82c15000 r hdmi_14_protection +ffffffff82c15010 r dp_11_protection +ffffffff82c15020 r hdcp_i2c_offsets +ffffffff82c15050 r hdcp_dpcd_addrs +ffffffff82c16000 r irq_service_funcs_dce110 +ffffffff82c16010 r irq_source_info_dce110 +ffffffff82c172a0 r dummy_irq_info_funcs +ffffffff82c172b0 r hpd_irq_info_funcs +ffffffff82c172c0 r hpd_rx_irq_info_funcs +ffffffff82c172d0 r pflip_irq_info_funcs +ffffffff82c172e0 r vupdate_irq_info_funcs +ffffffff82c172f0 r vblank_irq_info_funcs +ffffffff82c18000 r irq_service_funcs_dce120 +ffffffff82c18008 r dummy_irq_info_funcs +ffffffff82c18018 r hpd_irq_info_funcs +ffffffff82c18028 r hpd_rx_irq_info_funcs +ffffffff82c18038 r pflip_irq_info_funcs +ffffffff82c18048 r vupdate_irq_info_funcs +ffffffff82c18058 r vblank_irq_info_funcs +ffffffff82c18070 r irq_source_info_dce120 +ffffffff82c1a000 r irq_service_funcs_dce80 +ffffffff82c1a008 r dummy_irq_info_funcs +ffffffff82c1a018 r hpd_irq_info_funcs +ffffffff82c1a028 r hpd_rx_irq_info_funcs +ffffffff82c1a038 r pflip_irq_info_funcs +ffffffff82c1a048 r vupdate_irq_info_funcs +ffffffff82c1a058 r vblank_irq_info_funcs +ffffffff82c1a070 r irq_source_info_dce80 +ffffffff82c1c000 r irq_service_funcs_dcn10 +ffffffff82c1c008 r dummy_irq_info_funcs +ffffffff82c1c018 r hpd_irq_info_funcs +ffffffff82c1c028 r hpd_rx_irq_info_funcs +ffffffff82c1c038 r pflip_irq_info_funcs +ffffffff82c1c048 r vupdate_no_lock_irq_info_funcs +ffffffff82c1c058 r vblank_irq_info_funcs +ffffffff82c1c068 r vline0_irq_info_funcs +ffffffff82c1c080 r irq_source_info_dcn10 +ffffffff82c1e000 r irq_service_funcs_dcn20 +ffffffff82c1e008 r dummy_irq_info_funcs +ffffffff82c1e018 r hpd_irq_info_funcs +ffffffff82c1e028 r hpd_rx_irq_info_funcs +ffffffff82c1e038 r pflip_irq_info_funcs +ffffffff82c1e048 r vupdate_no_lock_irq_info_funcs +ffffffff82c1e058 r vblank_irq_info_funcs +ffffffff82c1e068 r vline0_irq_info_funcs +ffffffff82c1e080 r irq_source_info_dcn20 +ffffffff82c20000 r irq_service_funcs_dcn201 +ffffffff82c20008 r dummy_irq_info_funcs +ffffffff82c20018 r hpd_irq_info_funcs +ffffffff82c20028 r hpd_rx_irq_info_funcs +ffffffff82c20038 r pflip_irq_info_funcs +ffffffff82c20048 r vupdate_no_lock_irq_info_funcs +ffffffff82c20058 r vblank_irq_info_funcs +ffffffff82c20068 r vline0_irq_info_funcs +ffffffff82c20080 r irq_source_info_dcn201 +ffffffff82c22000 r irq_source_info_dcn21 +ffffffff82c23290 r irq_service_funcs_dcn21 +ffffffff82c23298 r dummy_irq_info_funcs +ffffffff82c232a8 r hpd_irq_info_funcs +ffffffff82c232b8 r hpd_rx_irq_info_funcs +ffffffff82c232c8 r pflip_irq_info_funcs +ffffffff82c232d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c232e8 r vblank_irq_info_funcs +ffffffff82c232f8 r vline0_irq_info_funcs +ffffffff82c23308 r dmub_outbox_irq_info_funcs +ffffffff82c24000 r irq_source_info_dcn30 +ffffffff82c25290 r irq_service_funcs_dcn30 +ffffffff82c25298 r dummy_irq_info_funcs +ffffffff82c252a8 r hpd_irq_info_funcs +ffffffff82c252b8 r hpd_rx_irq_info_funcs +ffffffff82c252c8 r pflip_irq_info_funcs +ffffffff82c252d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c252e8 r vblank_irq_info_funcs +ffffffff82c252f8 r vline0_irq_info_funcs +ffffffff82c25308 r dmub_trace_irq_info_funcs +ffffffff82c26000 r irq_source_info_dcn302 +ffffffff82c27290 r irq_service_funcs_dcn302 +ffffffff82c27298 r dummy_irq_info_funcs +ffffffff82c272a8 r hpd_irq_info_funcs +ffffffff82c272b8 r hpd_rx_irq_info_funcs +ffffffff82c272c8 r pflip_irq_info_funcs +ffffffff82c272d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c272e8 r vblank_irq_info_funcs +ffffffff82c272f8 r vline0_irq_info_funcs +ffffffff82c27308 r dmub_trace_irq_info_funcs +ffffffff82c28000 r irq_service_funcs_dcn303 +ffffffff82c28008 r dummy_irq_info_funcs +ffffffff82c28018 r hpd_irq_info_funcs +ffffffff82c28028 r hpd_rx_irq_info_funcs +ffffffff82c28038 r pflip_irq_info_funcs +ffffffff82c28048 r vupdate_no_lock_irq_info_funcs +ffffffff82c28058 r vblank_irq_info_funcs +ffffffff82c28068 r vline0_irq_info_funcs +ffffffff82c28080 r irq_source_info_dcn303 +ffffffff82c2a000 r irq_source_info_dcn31 +ffffffff82c2b290 r irq_service_funcs_dcn31 +ffffffff82c2b298 r dummy_irq_info_funcs +ffffffff82c2b2a8 r hpd_irq_info_funcs +ffffffff82c2b2b8 r hpd_rx_irq_info_funcs +ffffffff82c2b2c8 r pflip_irq_info_funcs +ffffffff82c2b2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c2b2e8 r vblank_irq_info_funcs +ffffffff82c2b2f8 r vline0_irq_info_funcs +ffffffff82c2b308 r outbox_irq_info_funcs +ffffffff82c2c000 r irq_source_info_dcn314 +ffffffff82c2d290 r irq_service_funcs_dcn314 +ffffffff82c2d298 r dummy_irq_info_funcs +ffffffff82c2d2a8 r hpd_irq_info_funcs +ffffffff82c2d2b8 r hpd_rx_irq_info_funcs +ffffffff82c2d2c8 r pflip_irq_info_funcs +ffffffff82c2d2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c2d2e8 r vblank_irq_info_funcs +ffffffff82c2d2f8 r vline0_irq_info_funcs +ffffffff82c2d308 r outbox_irq_info_funcs +ffffffff82c2e000 r irq_source_info_dcn315 +ffffffff82c2f290 r irq_service_funcs_dcn315 +ffffffff82c2f298 r dummy_irq_info_funcs +ffffffff82c2f2a8 r hpd_irq_info_funcs +ffffffff82c2f2b8 r hpd_rx_irq_info_funcs +ffffffff82c2f2c8 r pflip_irq_info_funcs +ffffffff82c2f2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c2f2e8 r vblank_irq_info_funcs +ffffffff82c2f2f8 r vline0_irq_info_funcs +ffffffff82c2f308 r outbox_irq_info_funcs +ffffffff82c30000 r irq_source_info_dcn32 +ffffffff82c31290 r irq_service_funcs_dcn32 +ffffffff82c31298 r dummy_irq_info_funcs +ffffffff82c312a8 r hpd_irq_info_funcs +ffffffff82c312b8 r hpd_rx_irq_info_funcs +ffffffff82c312c8 r pflip_irq_info_funcs +ffffffff82c312d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c312e8 r vblank_irq_info_funcs +ffffffff82c312f8 r vline0_irq_info_funcs +ffffffff82c31308 r outbox_irq_info_funcs +ffffffff82c32000 r dio_link_hwss +ffffffff82c33000 r dpia_link_hwss +ffffffff82c34000 r hpo_dp_link_hwss +ffffffff82c35000 r virtual_lnk_enc_funcs +ffffffff82c36000 r virtual_link_hwss +ffffffff82c37000 r virtual_str_enc_funcs +ffffffff82c38000 R dmub_srv_dcn20_regs +ffffffff82c39000 R dmub_srv_dcn21_regs +ffffffff82c3a000 R dmub_srv_dcn30_regs +ffffffff82c3b000 R dmub_srv_dcn301_regs +ffffffff82c3c000 R dmub_srv_dcn302_regs +ffffffff82c3d000 R dmub_srv_dcn303_regs +ffffffff82c3e000 R dmub_srv_dcn31_regs +ffffffff82c3f000 R dmub_srv_dcn315_regs +ffffffff82c40000 R dmub_srv_dcn316_regs +ffffffff82c41000 R dmub_srv_dcn32_regs +ffffffff82c42000 r numerator01 +ffffffff82c42020 r numerator02 +ffffffff82c42040 r numerator04 +ffffffff82c42060 r numerator05 +ffffffff82c44000 r abm_settings +ffffffff82c44010 r abm_settings_config0 +ffffffff82c44050 r abm_settings_config1 +ffffffff82c44088 r min_reduction_table_v_2_2 +ffffffff82c44095 r max_reduction_table_v_2_2 +ffffffff82c440a2 r min_reduction_table +ffffffff82c440af r max_reduction_table +ffffffff82c45000 R amdgpu_pp_profile_name +ffffffff82c46000 r pp_lib_thermal_controller_names +ffffffff82c47000 r pp_ip_funcs +ffffffff82c470a0 R pp_smu_ip_block +ffffffff82c470b8 r pp_dpm_funcs ffffffff82c48000 r gpio_tbl ffffffff82c480f0 r enable_fb_req_rej_tbl ffffffff82c48140 r use_bclk_tbl -ffffffff82c482e0 r turn_off_plls_tbl -ffffffff82c48370 r clk_req_b_tbl -ffffffff82c48490 r enter_baco_tbl -ffffffff82c485b0 r exit_baco_tbl -ffffffff82c486d0 r clean_baco_tbl +ffffffff82c48310 r turn_off_plls_tbl +ffffffff82c48640 r enter_baco_tbl +ffffffff82c48730 r exit_baco_tbl +ffffffff82c48850 r clean_baco_tbl ffffffff82c49000 r gpio_tbl ffffffff82c490f0 r enable_fb_req_rej_tbl -ffffffff82c49140 r use_bclk_tbl_vg -ffffffff82c49200 r turn_off_plls_tbl_vg -ffffffff82c49350 r use_bclk_tbl -ffffffff82c49440 r turn_off_plls_tbl -ffffffff82c495f0 r clk_req_b_tbl -ffffffff82c49710 r enter_baco_tbl -ffffffff82c49830 r exit_baco_tbl -ffffffff82c49950 r clean_baco_tbl -ffffffff82c4a000 r vega10_fuses_default -ffffffff82c59000 r pp_r600_encode_lanes -ffffffff82c5a000 R pptable_v1_0_funcs -ffffffff82c5b000 R pptable_funcs -ffffffff82c5b020 r soft_dummy_pp_table -ffffffff82c5c000 r smu10_hwmgr_funcs -ffffffff82c5d000 r smu7_hwmgr_funcs -ffffffff82c5d2f8 r smu7_irq_funcs -ffffffff82c5d310 r SMU7ThermalPolicy -ffffffff82c5e000 r GCCACConfig_Polaris10 -ffffffff82c5e1b0 r DIDTConfig_Polaris10 -ffffffff82c5ea50 r GCCACConfig_Polaris11 -ffffffff82c5ec00 r DIDTConfig_Polaris11_Kicker -ffffffff82c5f4a0 r DIDTConfig_Polaris11 -ffffffff82c5fd40 r DIDTConfig_Polaris12 -ffffffff82c605e0 r GCCACConfig_VegaM -ffffffff82c60790 r DIDTConfig_VegaM -ffffffff82c62000 r smu8_hwmgr_funcs -ffffffff82c622f0 r SMU7ThermalPolicy -ffffffff82c63000 r smu9_irq_funcs -ffffffff82c64000 r gpio_tbl_iceland -ffffffff82c64060 r gpio_tbl -ffffffff82c64150 r enable_fb_req_rej_tbl -ffffffff82c641a0 r use_bclk_tbl -ffffffff82c64370 r turn_off_plls_tbl -ffffffff82c64610 r enter_baco_tbl -ffffffff82c64730 r exit_baco_tbl_iceland -ffffffff82c64870 r clean_baco_tbl_iceland -ffffffff82c64890 r exit_baco_tbl -ffffffff82c649b0 r clean_baco_tbl -ffffffff82c65000 r pre_baco_tbl -ffffffff82c65090 r enter_baco_tbl -ffffffff82c652b0 r exit_baco_tbl -ffffffff82c65520 r clean_baco_tbl -ffffffff82c66000 r vega10_hwmgr_funcs -ffffffff82c662f0 r channel_number -ffffffff82c66320 r SMU7ThermalWithDelayPolicy -ffffffff82c67000 r SEDiDtStallCtrlConfig_vega10 -ffffffff82c67110 r SEDiDtStallPatternConfig_vega10 -ffffffff82c672e0 r SEDiDtWeightConfig_Vega10 -ffffffff82c673b0 r SEDiDtCtrl1Config_Vega10 -ffffffff82c67440 r SEDiDtCtrl2Config_Vega10 -ffffffff82c67510 r SEDiDtCtrl3Config_vega10 -ffffffff82c67820 r SEDiDtTuningCtrlConfig_Vega10 -ffffffff82c678b0 r SELCacConfig_Vega10 -ffffffff82c67a40 r SEDiDtCtrl0Config_Vega10 -ffffffff82c67d10 r AvfsPSMInitConfig_vega10 -ffffffff82c67d90 r SEEDCStallPatternConfig_Vega10 -ffffffff82c67ea0 r SEEDCStallDelayConfig_Vega10 -ffffffff82c67f80 r SEEDCCtrlConfig_Vega10 -ffffffff82c68040 r PSMSEEDCStallPatternConfig_Vega10 -ffffffff82c680c0 r PSMSEEDCStallDelayConfig_Vega10 -ffffffff82c681d0 r PSMSEEDCCtrlResetConfig_Vega10 -ffffffff82c68290 r PSMSEEDCCtrlConfig_Vega10 -ffffffff82c68350 r SEEDCForceStallPatternConfig_Vega10 -ffffffff82c683e0 r SEEDCCtrlForceStallConfig_Vega10 -ffffffff82c69000 R vega10_pptable_funcs -ffffffff82c6a000 r pre_baco_tbl -ffffffff82c6a090 r enter_baco_tbl -ffffffff82c6a2b0 r exit_baco_tbl -ffffffff82c6a520 r clean_baco_tbl -ffffffff82c6b000 r vega12_hwmgr_funcs -ffffffff82c6b2f0 r SMU7ThermalWithDelayPolicy -ffffffff82c6b340 r link_width -ffffffff82c6c000 R vega12_pptable_funcs -ffffffff82c6d000 r clean_baco_tbl -ffffffff82c6e000 r vega20_hwmgr_funcs -ffffffff82c6e2f0 r SMU7ThermalWithDelayPolicy -ffffffff82c6e340 r link_width -ffffffff82c6f000 R vega20_pptable_funcs -ffffffff82c70000 R ci_smu_funcs -ffffffff82c700e0 r defaults_hawaii_pro -ffffffff82c7012c r defaults_hawaii_xt -ffffffff82c70178 r defaults_saturn_xt -ffffffff82c701c4 r defaults_bonaire_xt -ffffffff82c70210 r ci_program_jump_on_start.data -ffffffff82c71000 R fiji_smu_funcs -ffffffff82c710e0 r avfs_graphics_level -ffffffff82c71240 r fiji_power_tune_data_set_array -ffffffff82c71246 r fiji_clock_stretch_amount_conversion -ffffffff82c71260 r fiji_clock_stretcher_ddt_table -ffffffff82c72000 R iceland_smu_funcs -ffffffff82c720e0 r defaults_icelandxt -ffffffff82c7212c r defaults_icelandpro -ffffffff82c72178 r defaults_iceland -ffffffff82c73000 R polaris10_smu_funcs -ffffffff82c730e0 r avfs_graphics_level_polaris10 -ffffffff82c732a0 r avfs_memory_level_polaris10 -ffffffff82c732c0 r polaris10_power_tune_data_set_array -ffffffff82c73310 r Range_Table -ffffffff82c74000 R smu10_smu_funcs -ffffffff82c75000 r smu7_program_jump_on_start.data -ffffffff82c75010 r pwr_virus_table_pre -ffffffff82c75680 r pwr_virus_table_post -ffffffff82c75f80 r pwr_virus_section1 -ffffffff82c76610 r pwr_virus_section2 -ffffffff82c76660 r pwr_virus_section3 -ffffffff82c7dab0 r pwr_virus_section4 -ffffffff82c7de80 r pwr_virus_section5 -ffffffff82c7e490 r pwr_virus_section6 -ffffffff82c80000 R smu8_smu_funcs -ffffffff82c81000 R tonga_smu_funcs -ffffffff82c810e0 r tonga_power_tune_data_set_array -ffffffff82c8112c r tonga_clock_stretch_amount_conversion -ffffffff82c81140 r tonga_clock_stretcher_ddt_table -ffffffff82c82000 R vega10_smu_funcs -ffffffff82c83000 R vega12_smu_funcs -ffffffff82c84000 R vega20_smu_funcs -ffffffff82c85000 R vegam_smu_funcs -ffffffff82c850e0 r vegam_power_tune_data_set_array -ffffffff82c85130 r Range_Table -ffffffff82c86000 R smu_ip_funcs -ffffffff82c860a0 R smu_v11_0_ip_block -ffffffff82c860b8 R smu_v12_0_ip_block -ffffffff82c860d0 R smu_v13_0_ip_block -ffffffff82c860e8 r swsmu_pm_funcs -ffffffff82c87000 r arcturus_table_map -ffffffff82c87080 r arcturus_pwr_src_map -ffffffff82c87090 r arcturus_workload_map -ffffffff82c870d0 r arcturus_ppt_funcs -ffffffff82c874a0 r smu11_thermal_policy -ffffffff82c874f0 r arcturus_i2c_algo -ffffffff82c87500 r arcturus_i2c_control_quirks -ffffffff82c87510 r arcturus_throttler_map -ffffffff82c87530 r arcturus_message_map -ffffffff82c87f50 r arcturus_clk_map -ffffffff82c88010 r arcturus_feature_mask_map -ffffffff82c89000 r cyan_skillfish_ppt_funcs -ffffffff82c8a000 r navi10_ppt_funcs -ffffffff82c8a3d0 r smu11_thermal_policy -ffffffff82c8a420 r navi10_i2c_algo -ffffffff82c8a430 r navi10_i2c_control_quirks -ffffffff82c8a440 r navi1x_throttler_map -ffffffff82c8a460 r NoDbiPrbs7 -ffffffff82c8b460 r DbiPrbs7 -ffffffff82c8d000 r sienna_cichlid_ppt_funcs -ffffffff82c8d3d0 r smu11_thermal_policy -ffffffff82c8d420 r sienna_cichlid_i2c_algo -ffffffff82c8d430 r sienna_cichlid_i2c_control_quirks -ffffffff82c8d440 r sienna_cichlid_throttler_map -ffffffff82c8e000 r smu_v11_0_irq_funcs -ffffffff82c8e010 r link_width -ffffffff82c8f000 r vangogh_ppt_funcs -ffffffff82c8f3d0 r vangogh_throttler_map -ffffffff82c90000 r renoir_ppt_funcs -ffffffff82c903d0 r renoir_throttler_map -ffffffff82c91000 r aldebaran_message_map -ffffffff82c91a20 r aldebaran_clk_map -ffffffff82c91ae0 r aldebaran_table_map -ffffffff82c91b60 r aldebaran_ppt_funcs -ffffffff82c91f30 r smu13_thermal_policy -ffffffff82c91f80 r aldebaran_i2c_algo -ffffffff82c91f90 r aldebaran_i2c_control_quirks -ffffffff82c91fa0 r aldebaran_throttler_map -ffffffff82c91fc0 r aldebaran_feature_mask_map -ffffffff82c93000 r smu_v13_0_irq_funcs -ffffffff82c93010 r link_width -ffffffff82c94000 r smu_v13_0_0_ppt_funcs -ffffffff82c943d0 r smu13_thermal_policy -ffffffff82c94420 r smu_v13_0_0_i2c_algo -ffffffff82c94430 r smu_v13_0_0_i2c_control_quirks -ffffffff82c94440 r smu_v13_0_0_throttler_map -ffffffff82c95000 r smu_v13_0_4_ppt_funcs -ffffffff82c96000 r smu_v13_0_5_ppt_funcs -ffffffff82c97000 r smu_v13_0_7_ppt_funcs -ffffffff82c973d0 r smu13_thermal_policy -ffffffff82c97420 r smu_v13_0_7_throttler_map -ffffffff82c98000 r yellow_carp_ppt_funcs -ffffffff82c99000 r __smu_message_names -ffffffff82c9a000 R pchb_ca -ffffffff82c9b000 R amas_ca -ffffffff82c9b028 R amas_devices -ffffffff82c9b040 r amas_feature -ffffffff82c9c000 R cardslot_ca -ffffffff82c9d000 R cardbus_ca -ffffffff82c9e000 R com_cardbus_ca -ffffffff82c9f000 R xl_cardbus_ca -ffffffff82c9f030 R xl_cardbus_products -ffffffff82ca0000 R dc_cardbus_ca -ffffffff82ca0030 R dc_cardbus_devices -ffffffff82ca1000 R fxp_cardbus_ca -ffffffff82ca1028 R fxp_cardbus_devices -ffffffff82ca2000 R rl_cardbus_devices -ffffffff82ca2028 R rl_cardbus_ca -ffffffff82ca3000 R re_cardbus_ca -ffffffff82ca3028 R re_cardbus_devices -ffffffff82ca4000 R ath_cardbus_ca -ffffffff82ca5000 R athn_cardbus_ca -ffffffff82ca5030 r athn_cardbus_devices -ffffffff82ca6000 R atw_cardbus_ca -ffffffff82ca6028 R atw_cardbus_devices -ffffffff82ca7000 R rtw_cardbus_ca -ffffffff82ca7028 R rtw_cardbus_devices -ffffffff82ca8000 R ral_cardbus_ca -ffffffff82ca8030 r ral_cardbus_devices -ffffffff82ca9000 R acx_cardbus_ca -ffffffff82ca9028 r acx_cardbus_devices -ffffffff82caa000 R pgt_cardbus_ca -ffffffff82caa028 R pgt_cardbus_devices -ffffffff82cab000 R ehci_cardbus_ca -ffffffff82cac000 R ohci_cardbus_ca -ffffffff82cad000 R uhci_cardbus_ca -ffffffff82cae000 R malo_cardbus_ca -ffffffff82cae028 r malo_cardbus_devices -ffffffff82caf000 R bwi_cardbus_ca -ffffffff82caf030 r bwi_cardbus_devices -ffffffff82cb0000 R pcmcia_ca -ffffffff82cb1000 r pcmcia_parse_cis_tuple.init_cfe -ffffffff82cb2000 r pcmcia_cis_quirks -ffffffff82cb3000 R ep_pcmcia_ca -ffffffff82cb4000 R ne_pcmcia_ca -ffffffff82cb4030 R ne2000devs -ffffffff82cb6000 R aic_pcmcia_ca -ffffffff82cb7000 R com_pcmcia_ca -ffffffff82cb8000 R wdc_pcmcia_ca -ffffffff82cb9000 R sm_pcmcia_ca -ffffffff82cba000 R xe_pcmcia_ca -ffffffff82cbb000 R wi_pcmcia_ca -ffffffff82cbb030 r wi_pcmcia_products -ffffffff82cbc000 R malo_pcmcia_ca -ffffffff82cbd000 R an_pcmcia_ca -ffffffff82cbe000 R pcib_ca -ffffffff82cbf000 R amdpcib_ca -ffffffff82cbf028 R amdpcib_devices -ffffffff82cc0000 R tcpcib_ca -ffffffff82cc0028 R tcpcib_devices -ffffffff82cc1000 R aapic_ca -ffffffff82cc2000 R hme_pci_ca -ffffffff82cc2028 r hme_promhdr -ffffffff82cc202a r hme_promdat -ffffffff82cc3000 R isa_ca -ffffffff82cc4000 R isadma_ca -ffffffff82cc5000 R fdc_ca -ffffffff82cc6000 R fd_ca -ffffffff82cc7000 R com_isa_ca -ffffffff82cc8000 R pckbc_isa_ca -ffffffff82cc9000 R vga_isa_ca -ffffffff82cca000 R wdc_isa_ca -ffffffff82ccb000 R mpu_midi_hw_if -ffffffff82ccc000 R mpu_isa_ca -ffffffff82ccd000 R pcppi_ca -ffffffff82cce000 R spkr_ca -ffffffff82cce030 r pitchtab -ffffffff82ccf000 R lpt_isa_ca -ffffffff82cd0000 R wbsio_ca -ffffffff82cd1000 R schsio_ca -ffffffff82cd2000 R lm_isa_ca -ffffffff82cd2028 R lm_wbsio_ca -ffffffff82cd3000 R it_sensors -ffffffff82cd3110 R it_vrfact -ffffffff82cd3140 R it_fan_regs -ffffffff82cd3160 R it_fan_ext_regs -ffffffff82cd3178 R it_ca -ffffffff82cd4000 R abitkv_sensors -ffffffff82cd4200 R abitaa_sensors -ffffffff82cd4480 R abitav_sensors -ffffffff82cd4700 R abitas_sensors -ffffffff82cd4980 R abitax_sensors -ffffffff82cd4bc0 R abitm4_sensors -ffffffff82cd4e80 R abitan_sensors -ffffffff82cd5120 R abital_sensors -ffffffff82cd53a0 R abitaw_sensors -ffffffff82cd5700 R abitni_sensors -ffffffff82cd59a0 R abitat_sensors -ffffffff82cd5cc0 R abitan2_sensors -ffffffff82cd5f60 R abitab_sensors -ffffffff82cd6220 R abitan3_sensors -ffffffff82cd6500 R abitaw2_sensors -ffffffff82cd6860 R abitat2_sensors -ffffffff82cd6b60 R abitab2_sensors -ffffffff82cd6ea0 R abitin_sensors -ffffffff82cd71e0 R uguru_ca -ffffffff82cd8000 R aps_ca -ffffffff82cd9000 R wsdisplay_emul_ca -ffffffff82cd9030 r charClass -ffffffff82cda000 r usl_syncops -ffffffff82cdb000 R wsevent_filtops -ffffffff82cdc000 R wskbd_ca -ffffffff82cdd000 r latin1_to_upper -ffffffff82cde000 R wsmouse_ca -ffffffff82cdf000 R cyrillic_to_koi8 -ffffffff82cdf060 R unicode_to_latin2 -ffffffff82cdf0e0 R unicode_to_latin7 -ffffffff82ce0000 R wsemul_vt100_ops -ffffffff82ce1000 r decspcgr2uni -ffffffff82ce1100 r dectech2uni -ffffffff82ce1200 r nrctable -ffffffff82ce1320 r nrcovlpos -ffffffff82ce2000 r vt100_fkeys -ffffffff82ce20c0 r vt100_pfkeys -ffffffff82ce20e0 r vt100_numpad -ffffffff82ce3000 R pckbd_ca -ffffffff82ce3028 R pckbd_accessops -ffffffff82ce3040 R pckbd_consops -ffffffff82ce3060 R pckbd_keymapdata -ffffffff82ce3070 R pckbd_xtbl -ffffffff82ce3100 R pckbd_xtbl_ext -ffffffff82ce4000 r pckbd_keydesc_us -ffffffff82ce4250 r pckbd_keydesc_de -ffffffff82ce42f0 r pckbd_keydesc_de_nodead -ffffffff82ce4310 r pckbd_keydesc_fr -ffffffff82ce43d0 r pckbd_keydesc_fr_dvorak_bepo -ffffffff82ce4510 r pckbd_keydesc_dk -ffffffff82ce45a0 r pckbd_keydesc_dk_nodead -ffffffff82ce45b0 r pckbd_keydesc_it -ffffffff82ce4640 r pckbd_keydesc_uk -ffffffff82ce46e0 r pckbd_keydesc_jp -ffffffff82ce4750 r pckbd_keydesc_sv -ffffffff82ce4780 r pckbd_keydesc_sv_nodead -ffffffff82ce4790 r pckbd_keydesc_no -ffffffff82ce47c0 r pckbd_keydesc_no_nodead -ffffffff82ce47d0 r pckbd_keydesc_us_declk -ffffffff82ce4860 r pckbd_keydesc_us_dvorak -ffffffff82ce4900 r pckbd_keydesc_us_colemak -ffffffff82ce4948 r pckbd_keydesc_swapctrlcaps -ffffffff82ce4960 r pckbd_keydesc_iopener -ffffffff82ce49b0 r pckbd_keydesc_es -ffffffff82ce4a50 r pckbd_keydesc_be -ffffffff82ce4b10 r pckbd_keydesc_ru -ffffffff82ce4c80 r pckbd_keydesc_ua -ffffffff82ce4e10 r pckbd_keydesc_sg -ffffffff82ce4ec0 r pckbd_keydesc_sg_nodead -ffffffff82ce4ee0 r pckbd_keydesc_sf -ffffffff82ce4f00 r pckbd_keydesc_pt -ffffffff82ce4f90 r pckbd_keydesc_lt -ffffffff82ce5070 r pckbd_keydesc_la -ffffffff82ce5100 r pckbd_keydesc_br -ffffffff82ce5180 r pckbd_keydesc_tr -ffffffff82ce5230 r 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-ffffffff8311b040 D art_node_gc_mtx -ffffffff8311b050 D art_node_gc_task -ffffffff8311c000 D bpf_bufsize -ffffffff8311c004 D bpf_maxbufsize -ffffffff8311c008 D bpf_sysctl_lk -ffffffff8311d000 D ifg_head -ffffffff8311d010 D if_cloners_lock -ffffffff8311d020 D if_input_task_locked -ffffffff8311d050 D netlock -ffffffff8311d060 D ifnetlist -ffffffff8311e000 D ifiq_maxlen_drop -ffffffff8311e004 D ifiq_maxlen_return -ffffffff8311f000 D etherbroadcastaddr -ffffffff8311f006 D ether_ipmulticast_min -ffffffff8311f00c D ether_ipmulticast_max -ffffffff8311f012 D ether_ip6multicast_min -ffffffff8311f018 D ether_ip6multicast_max -ffffffff83120000 D etherip_cloner -ffffffff83120030 D etherip_list -ffffffff83121000 D loop_cloner -ffffffff83122000 D ifmedia_mtx -ffffffff83123000 D ppp_compressors -ffffffff83123020 D ppp_cloner -ffffffff83124000 D ppp_pkt_init -ffffffff83125000 D ppp_bsd_compress -ffffffff83126000 D ppp_deflate -ffffffff83126070 D ppp_deflate_draft -ffffffff83127000 D tun_cloner -ffffffff83127030 D tap_cloner -ffffffff83128000 D bridgeintrq -ffffffff83128038 D bridge_cloner -ffffffff83129000 d veb_cloner -ffffffff83129030 d vport_cloner -ffffffff8312a000 D vlan_tagh_lk -ffffffff8312a010 D vlan_cloner -ffffffff8312a040 D svlan_cloner -ffffffff8312b000 D pipex_list_mtx -ffffffff8312b010 D pipex_prune -ffffffff8312b018 D pipexoutq -ffffffff8312b050 d SHAPad2 -ffffffff8312c000 D rtmap_gc -ffffffff8312c018 D rt_rc -ffffffff8312d000 D rt_labels -ffffffff8312e000 D enc_cloner -ffffffff8312f000 D gre_cloner -ffffffff8312f030 D gre_list -ffffffff8312f040 D mgre_cloner -ffffffff8312f070 D egre_cloner -ffffffff8312f0a0 D nvgre_cloner -ffffffff8312f0d0 D eoip_cloner -ffffffff83130000 D trunk_cloner -ffffffff83131000 d aggr_cloner -ffffffff83132000 d tpmr_cloner -ffffffff83133000 D mpe_cloner -ffffffff83134000 D mpw_cloner -ffffffff83135000 D mpip_cloner -ffffffff83136000 d bpe_cloner -ffffffff83136030 d bpe_lock -ffffffff83137000 D vether_cloner -ffffffff83138000 D pair_cloner -ffffffff83139000 d vxlan_cloner -ffffffff83139030 d vxlan_lock -ffffffff83139040 d vxlan_teps -ffffffff8313a000 D underload_interval -ffffffff8313a010 D wg_cloner -ffffffff8313b000 d stoeplitz_keyseed -ffffffff8313c000 D ieee80211_cache_size -ffffffff8313d000 D arpt_prune -ffffffff8313d004 D arpt_keep -ffffffff8313d008 D arpt_down -ffffffff8313d010 D arpinq -ffffffff8313d048 D arp_mtx -ffffffff8313d058 D arp_maxtries -ffffffff8313e000 D ipport_firstauto -ffffffff8313e004 D ipport_lastauto -ffffffff8313e008 D ipport_hifirstauto -ffffffff8313e00c D ipport_hilastauto -ffffffff8313f000 D divert_sendspace -ffffffff8313f004 D divert_recvspace -ffffffff8313f008 D divbhashsize -ffffffff83140000 D icmptstamprepl -ffffffff83140004 D icmperrppslim -ffffffff83140008 D icmp_redirtimeout -ffffffff83141000 D ipsendredirects -ffffffff83141004 D ip_defttl -ffffffff83141008 D ip_mtudisc -ffffffff8314100c D ip_mtudisc_timeout -ffffffff83141010 D ipq_mutex -ffffffff83141020 D ip_maxqueue -ffffffff83141028 D ipintrq -ffffffff83141060 d ipsend_task -ffffffff83141090 d ipsendraw_task -ffffffff83142000 D ip_mrtproto -ffffffff83142004 d sin -ffffffff83143000 D rip_sendspace -ffffffff83143008 D rip_recvspace -ffffffff83144000 D tcprexmtthresh -ffffffff83144004 D tcptv_keep_init -ffffffff83144008 D tcp_rst_ppslim -ffffffff8314400c D tcp_ackdrop_ppslim -ffffffff83144010 D tcp_syn_hash_size -ffffffff83144014 D tcp_syn_cache_limit -ffffffff83144018 D tcp_syn_bucket_limit -ffffffff8314401c D tcp_syn_use_limit -ffffffff83145000 D tcp_outflags -ffffffff83146000 D tcp_timer_mtx -ffffffff83146010 D tcp_mssdflt -ffffffff83146014 D tcp_rttdflt -ffffffff83146018 D tcp_do_rfc1323 -ffffffff8314601c D tcp_do_sack -ffffffff83146020 D tcp_do_rfc3390 -ffffffff83146024 D tcp_reass_limit -ffffffff83146028 D tcp_sackhole_limit -ffffffff83147000 D tcp_backoff -ffffffff83147034 D tcp_totbackoff -ffffffff83148000 D tcp_sendspace -ffffffff83148004 D tcp_recvspace -ffffffff83148008 D tcp_autorcvbuf_inc -ffffffff83149000 D udpcksum -ffffffff83149004 D udp_sendspace -ffffffff83149008 D udp_recvspace -ffffffff8314a000 D ipsec_flows_mtx -ffffffff8314a010 D ipsec_ids_idle -ffffffff8314a014 D ipsec_ids_next_flow -ffffffff8314a018 D ipsec_policy_head -ffffffff8314a028 D ipsp_ids_gc_timeout -ffffffff8314a070 D tdb_sadb_mtx -ffffffff8314a080 d tdb_hashmask -ffffffff8314b000 D ipo_tdb_mtx -ffffffff8314b010 D ipsec_acquire_mtx -ffffffff8314b020 D ipsec_acquire_head -ffffffff8314c000 D ipsec_keep_invalid -ffffffff8314c004 D ipsec_require_pfs -ffffffff8314c008 D ipsec_soft_timeout -ffffffff8314c00c D ipsec_exp_timeout -ffffffff8314c010 D ipsec_soft_first_use -ffffffff8314c014 D ipsec_exp_first_use -ffffffff8314c018 D ipsec_expire_acquire -ffffffff8314c01c D esp_enable -ffffffff8314c020 D ah_enable -ffffffff8314d000 D udpencap_enable -ffffffff8314d004 D udpencap_port -ffffffff8314e000 D carp_vh_rc -ffffffff8314e020 D carp_sc_rc -ffffffff8314e040 D carp_opts -ffffffff8314e058 D carp_cloner -ffffffff8314e088 d carp_send_na.mcast -ffffffff8314f000 d PADDING +ffffffff82c49140 r use_bclk_tbl +ffffffff82c492e0 r turn_off_plls_tbl +ffffffff82c49370 r clk_req_b_tbl +ffffffff82c49490 r enter_baco_tbl +ffffffff82c495b0 r exit_baco_tbl +ffffffff82c496d0 r clean_baco_tbl +ffffffff82c4a000 r gpio_tbl +ffffffff82c4a0f0 r enable_fb_req_rej_tbl +ffffffff82c4a140 r use_bclk_tbl_vg +ffffffff82c4a200 r turn_off_plls_tbl_vg +ffffffff82c4a350 r use_bclk_tbl +ffffffff82c4a440 r turn_off_plls_tbl +ffffffff82c4a5f0 r clk_req_b_tbl +ffffffff82c4a710 r enter_baco_tbl +ffffffff82c4a830 r exit_baco_tbl +ffffffff82c4a950 r clean_baco_tbl +ffffffff82c4b000 r vega10_fuses_default +ffffffff82c5a000 r pp_r600_encode_lanes +ffffffff82c5b000 R pptable_v1_0_funcs +ffffffff82c5c000 R pptable_funcs +ffffffff82c5c020 r soft_dummy_pp_table +ffffffff82c5d000 r smu10_hwmgr_funcs +ffffffff82c5e000 r smu7_hwmgr_funcs +ffffffff82c5e2f8 r smu7_irq_funcs +ffffffff82c5e310 r SMU7ThermalPolicy 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+ffffffff82c6a000 R vega10_pptable_funcs +ffffffff82c6b000 r pre_baco_tbl +ffffffff82c6b090 r enter_baco_tbl +ffffffff82c6b2b0 r exit_baco_tbl +ffffffff82c6b520 r clean_baco_tbl +ffffffff82c6c000 r vega12_hwmgr_funcs +ffffffff82c6c2f0 r SMU7ThermalWithDelayPolicy +ffffffff82c6c340 r link_width +ffffffff82c6d000 R vega12_pptable_funcs +ffffffff82c6e000 r clean_baco_tbl +ffffffff82c6f000 r vega20_hwmgr_funcs +ffffffff82c6f2f0 r SMU7ThermalWithDelayPolicy +ffffffff82c6f340 r link_width +ffffffff82c70000 R vega20_pptable_funcs +ffffffff82c71000 R ci_smu_funcs +ffffffff82c710e0 r defaults_hawaii_pro +ffffffff82c7112c r defaults_hawaii_xt +ffffffff82c71178 r defaults_saturn_xt +ffffffff82c711c4 r defaults_bonaire_xt +ffffffff82c71210 r ci_program_jump_on_start.data +ffffffff82c72000 R fiji_smu_funcs +ffffffff82c720e0 r avfs_graphics_level +ffffffff82c72240 r fiji_power_tune_data_set_array +ffffffff82c72246 r fiji_clock_stretch_amount_conversion +ffffffff82c72260 r fiji_clock_stretcher_ddt_table +ffffffff82c73000 R iceland_smu_funcs +ffffffff82c730e0 r defaults_icelandxt +ffffffff82c7312c r defaults_icelandpro +ffffffff82c73178 r defaults_iceland +ffffffff82c74000 R polaris10_smu_funcs +ffffffff82c740e0 r avfs_graphics_level_polaris10 +ffffffff82c742a0 r avfs_memory_level_polaris10 +ffffffff82c742c0 r polaris10_power_tune_data_set_array +ffffffff82c74310 r Range_Table +ffffffff82c75000 R smu10_smu_funcs +ffffffff82c76000 r smu7_program_jump_on_start.data +ffffffff82c76010 r pwr_virus_table_pre +ffffffff82c76680 r pwr_virus_table_post +ffffffff82c76f80 r pwr_virus_section1 +ffffffff82c77610 r pwr_virus_section2 +ffffffff82c77660 r pwr_virus_section3 +ffffffff82c7eab0 r pwr_virus_section4 +ffffffff82c7ee80 r pwr_virus_section5 +ffffffff82c7f490 r pwr_virus_section6 +ffffffff82c81000 R smu8_smu_funcs +ffffffff82c82000 R tonga_smu_funcs +ffffffff82c820e0 r tonga_power_tune_data_set_array +ffffffff82c8212c r tonga_clock_stretch_amount_conversion +ffffffff82c82140 r tonga_clock_stretcher_ddt_table +ffffffff82c83000 R vega10_smu_funcs +ffffffff82c84000 R vega12_smu_funcs +ffffffff82c85000 R vega20_smu_funcs +ffffffff82c86000 R vegam_smu_funcs +ffffffff82c860e0 r vegam_power_tune_data_set_array +ffffffff82c86130 r Range_Table +ffffffff82c87000 R smu_ip_funcs +ffffffff82c870a0 R smu_v11_0_ip_block +ffffffff82c870b8 R smu_v12_0_ip_block +ffffffff82c870d0 R smu_v13_0_ip_block +ffffffff82c870e8 r swsmu_pm_funcs +ffffffff82c88000 r arcturus_table_map +ffffffff82c88080 r arcturus_pwr_src_map +ffffffff82c88090 r arcturus_workload_map +ffffffff82c880d0 r arcturus_ppt_funcs +ffffffff82c884a0 r smu11_thermal_policy +ffffffff82c884f0 r arcturus_i2c_algo +ffffffff82c88500 r arcturus_i2c_control_quirks +ffffffff82c88510 r arcturus_throttler_map +ffffffff82c88530 r arcturus_message_map +ffffffff82c88f50 r arcturus_clk_map +ffffffff82c89010 r arcturus_feature_mask_map +ffffffff82c8a000 r cyan_skillfish_ppt_funcs +ffffffff82c8b000 r navi10_ppt_funcs +ffffffff82c8b3d0 r smu11_thermal_policy +ffffffff82c8b420 r navi10_i2c_algo +ffffffff82c8b430 r navi10_i2c_control_quirks +ffffffff82c8b440 r navi1x_throttler_map +ffffffff82c8b460 r NoDbiPrbs7 +ffffffff82c8c460 r DbiPrbs7 +ffffffff82c8e000 r sienna_cichlid_ppt_funcs +ffffffff82c8e3d0 r smu11_thermal_policy +ffffffff82c8e420 r sienna_cichlid_i2c_algo +ffffffff82c8e430 r sienna_cichlid_i2c_control_quirks +ffffffff82c8e440 r sienna_cichlid_throttler_map +ffffffff82c8f000 r smu_v11_0_irq_funcs +ffffffff82c8f010 r link_width +ffffffff82c90000 r vangogh_ppt_funcs +ffffffff82c903d0 r vangogh_throttler_map +ffffffff82c91000 r renoir_ppt_funcs +ffffffff82c913d0 r renoir_throttler_map +ffffffff82c92000 r aldebaran_message_map +ffffffff82c92a20 r aldebaran_clk_map +ffffffff82c92ae0 r aldebaran_table_map +ffffffff82c92b60 r aldebaran_ppt_funcs +ffffffff82c92f30 r smu13_thermal_policy +ffffffff82c92f80 r aldebaran_i2c_algo +ffffffff82c92f90 r aldebaran_i2c_control_quirks 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dc_cardbus_ca +ffffffff82ca1030 R dc_cardbus_devices +ffffffff82ca2000 R fxp_cardbus_ca +ffffffff82ca2028 R fxp_cardbus_devices +ffffffff82ca3000 R rl_cardbus_devices +ffffffff82ca3028 R rl_cardbus_ca +ffffffff82ca4000 R re_cardbus_ca +ffffffff82ca4028 R re_cardbus_devices +ffffffff82ca5000 R ath_cardbus_ca +ffffffff82ca6000 R athn_cardbus_ca +ffffffff82ca6030 r athn_cardbus_devices +ffffffff82ca7000 R atw_cardbus_ca +ffffffff82ca7028 R atw_cardbus_devices +ffffffff82ca8000 R rtw_cardbus_ca +ffffffff82ca8028 R rtw_cardbus_devices +ffffffff82ca9000 R ral_cardbus_ca +ffffffff82ca9030 r ral_cardbus_devices +ffffffff82caa000 R acx_cardbus_ca +ffffffff82caa028 r acx_cardbus_devices +ffffffff82cab000 R pgt_cardbus_ca +ffffffff82cab028 R pgt_cardbus_devices +ffffffff82cac000 R ehci_cardbus_ca +ffffffff82cad000 R ohci_cardbus_ca +ffffffff82cae000 R uhci_cardbus_ca +ffffffff82caf000 R malo_cardbus_ca +ffffffff82caf028 r malo_cardbus_devices +ffffffff82cb0000 R bwi_cardbus_ca +ffffffff82cb0030 r bwi_cardbus_devices +ffffffff82cb1000 R pcmcia_ca +ffffffff82cb2000 r pcmcia_parse_cis_tuple.init_cfe +ffffffff82cb3000 r pcmcia_cis_quirks +ffffffff82cb4000 R ep_pcmcia_ca +ffffffff82cb5000 R ne_pcmcia_ca +ffffffff82cb5030 R ne2000devs +ffffffff82cb7000 R aic_pcmcia_ca +ffffffff82cb8000 R com_pcmcia_ca +ffffffff82cb9000 R wdc_pcmcia_ca +ffffffff82cba000 R sm_pcmcia_ca +ffffffff82cbb000 R xe_pcmcia_ca +ffffffff82cbc000 R wi_pcmcia_ca +ffffffff82cbc030 r wi_pcmcia_products +ffffffff82cbd000 R malo_pcmcia_ca +ffffffff82cbe000 R an_pcmcia_ca +ffffffff82cbf000 R pcib_ca +ffffffff82cc0000 R amdpcib_ca +ffffffff82cc0028 R amdpcib_devices +ffffffff82cc1000 R tcpcib_ca +ffffffff82cc1028 R tcpcib_devices +ffffffff82cc2000 R aapic_ca +ffffffff82cc3000 R hme_pci_ca +ffffffff82cc3028 r hme_promhdr +ffffffff82cc302a r hme_promdat +ffffffff82cc4000 R isa_ca +ffffffff82cc5000 R isadma_ca +ffffffff82cc6000 R fdc_ca +ffffffff82cc7000 R fd_ca +ffffffff82cc8000 R com_isa_ca +ffffffff82cc9000 R pckbc_isa_ca +ffffffff82cca000 R vga_isa_ca +ffffffff82ccb000 R wdc_isa_ca +ffffffff82ccc000 R mpu_midi_hw_if +ffffffff82ccd000 R mpu_isa_ca +ffffffff82cce000 R pcppi_ca +ffffffff82ccf000 R spkr_ca +ffffffff82ccf030 r pitchtab +ffffffff82cd0000 R lpt_isa_ca +ffffffff82cd1000 R wbsio_ca +ffffffff82cd2000 R schsio_ca +ffffffff82cd3000 R lm_isa_ca +ffffffff82cd3028 R lm_wbsio_ca +ffffffff82cd4000 R it_sensors +ffffffff82cd4110 R it_vrfact +ffffffff82cd4140 R it_fan_regs +ffffffff82cd4160 R it_fan_ext_regs +ffffffff82cd4178 R it_ca +ffffffff82cd5000 R abitkv_sensors +ffffffff82cd5200 R abitaa_sensors +ffffffff82cd5480 R abitav_sensors +ffffffff82cd5700 R abitas_sensors +ffffffff82cd5980 R abitax_sensors +ffffffff82cd5bc0 R abitm4_sensors +ffffffff82cd5e80 R abitan_sensors +ffffffff82cd6120 R abital_sensors +ffffffff82cd63a0 R abitaw_sensors +ffffffff82cd6700 R abitni_sensors +ffffffff82cd69a0 R abitat_sensors +ffffffff82cd6cc0 R abitan2_sensors +ffffffff82cd6f60 R abitab_sensors +ffffffff82cd7220 R abitan3_sensors +ffffffff82cd7500 R abitaw2_sensors +ffffffff82cd7860 R abitat2_sensors +ffffffff82cd7b60 R abitab2_sensors +ffffffff82cd7ea0 R abitin_sensors +ffffffff82cd81e0 R uguru_ca +ffffffff82cd9000 R aps_ca +ffffffff82cda000 R wsdisplay_emul_ca +ffffffff82cda030 r charClass +ffffffff82cdb000 r usl_syncops +ffffffff82cdc000 R wsevent_filtops +ffffffff82cdd000 R wskbd_ca +ffffffff82cde000 r latin1_to_upper +ffffffff82cdf000 R wsmouse_ca +ffffffff82ce0000 R cyrillic_to_koi8 +ffffffff82ce0060 R unicode_to_latin2 +ffffffff82ce00e0 R unicode_to_latin7 +ffffffff82ce1000 R wsemul_vt100_ops +ffffffff82ce2000 r decspcgr2uni +ffffffff82ce2100 r dectech2uni +ffffffff82ce2200 r nrctable +ffffffff82ce2320 r nrcovlpos +ffffffff82ce3000 r vt100_fkeys +ffffffff82ce30c0 r vt100_pfkeys +ffffffff82ce30e0 r vt100_numpad +ffffffff82ce4000 R pckbd_ca +ffffffff82ce4028 R pckbd_accessops +ffffffff82ce4040 R pckbd_consops +ffffffff82ce4060 R pckbd_keymapdata +ffffffff82ce4070 R pckbd_xtbl +ffffffff82ce4100 R pckbd_xtbl_ext +ffffffff82ce5000 r pckbd_keydesc_us +ffffffff82ce5250 r pckbd_keydesc_de +ffffffff82ce52f0 r pckbd_keydesc_de_nodead +ffffffff82ce5310 r pckbd_keydesc_fr +ffffffff82ce53d0 r pckbd_keydesc_fr_dvorak_bepo +ffffffff82ce5510 r pckbd_keydesc_dk +ffffffff82ce55a0 r pckbd_keydesc_dk_nodead +ffffffff82ce55b0 r pckbd_keydesc_it +ffffffff82ce5640 r pckbd_keydesc_uk +ffffffff82ce56e0 r pckbd_keydesc_jp +ffffffff82ce5750 r pckbd_keydesc_sv +ffffffff82ce5780 r pckbd_keydesc_sv_nodead +ffffffff82ce5790 r pckbd_keydesc_no +ffffffff82ce57c0 r pckbd_keydesc_no_nodead +ffffffff82ce57d0 r pckbd_keydesc_us_declk +ffffffff82ce5860 r pckbd_keydesc_us_dvorak +ffffffff82ce5900 r pckbd_keydesc_us_colemak +ffffffff82ce5948 r pckbd_keydesc_swapctrlcaps +ffffffff82ce5960 r pckbd_keydesc_iopener +ffffffff82ce59b0 r pckbd_keydesc_es +ffffffff82ce5a50 r pckbd_keydesc_be +ffffffff82ce5b10 r pckbd_keydesc_ru +ffffffff82ce5c80 r pckbd_keydesc_ua +ffffffff82ce5e10 r pckbd_keydesc_sg +ffffffff82ce5ec0 r pckbd_keydesc_sg_nodead +ffffffff82ce5ee0 r pckbd_keydesc_sf +ffffffff82ce5f00 r pckbd_keydesc_pt +ffffffff82ce5f90 r pckbd_keydesc_lt +ffffffff82ce6070 r pckbd_keydesc_la +ffffffff82ce6100 r pckbd_keydesc_br +ffffffff82ce6180 r pckbd_keydesc_tr +ffffffff82ce6230 r pckbd_keydesc_tr_nodead +ffffffff82ce6250 r pckbd_keydesc_pl +ffffffff82ce62b0 r pckbd_keydesc_hu +ffffffff82ce63c0 r pckbd_keydesc_si +ffffffff82ce64d0 r pckbd_keydesc_cf +ffffffff82ce65a0 r pckbd_keydesc_cf_nodead +ffffffff82ce65c0 r pckbd_keydesc_lv +ffffffff82ce6640 r pckbd_keydesc_nl +ffffffff82ce6720 r pckbd_keydesc_nl_nodead +ffffffff82ce6740 r pckbd_keydesc_is +ffffffff82ce67cc r pckbd_keydesc_is_nodead +ffffffff82ce67e0 r pckbd_keydesc_ee +ffffffff82ce6890 r pckbd_keydesc_ee_nodead +ffffffff82ce68b0 R pckbd_keydesctab +ffffffff82ce7000 R pms_ca +ffffffff82ce7028 R pms_accessops +ffffffff82ce7040 R pms_sec_accessops +ffffffff82ce7060 R pms_protocols +ffffffff82ce71e0 r alps_models +ffffffff82ce8000 R skgpio_led_offset +ffffffff82ce8008 R skgpio_ca +ffffffff82ce9000 R hidkbd_trtab +ffffffff82ce9100 r apple_fn_trans +ffffffff82ce9120 r apple_tb_trans +ffffffff82ce9140 r apple_mba_trans +ffffffff82cea000 r hidcc_attach_wskbd.accessops +ffffffff82cea020 r hidcc_keysyms +ffffffff82ceb000 R usb_ca +ffffffff82cec000 R usb_known_products +ffffffff82cf7e60 R usb_known_vendors +ffffffff82cfa660 R usbd_error_strs +ffffffff82cfb000 R usb_quirks +ffffffff82cfb390 R usb_dev_quirks +ffffffff82cfb398 R usbd_no_quirk +ffffffff82cfc000 R uhub_ca +ffffffff82cfc028 R uhub_uhub_ca +ffffffff82cfd000 R uaudio_ca +ffffffff82cfd028 R uaudio_hw_if +ffffffff82cfd0e0 R uaudio_rates +ffffffff82cfd120 r uaudio_clkname.names +ffffffff82cfd140 r uaudio_feature_addent.features +ffffffff82cfe000 R uvideo_ca +ffffffff82cfe028 R uvideo_hw_if +ffffffff82cfe100 R uvideo_devs +ffffffff82cff000 r utvfu_select_norm.pal +ffffffff82cff040 r utvfu_select_norm.ntsc +ffffffff82cff080 r utvfu_setup_capture.setup +ffffffff82cff180 r utvfu_audio_start_chip.setup +ffffffff82cff1c8 r utvfu_audio_stop_chip.setup +ffffffff82cff1d8 R utvfu_ca +ffffffff82cff200 R utvfu_vid_hw_if +ffffffff82cff2d0 R utvfu_au_hw_if +ffffffff82d00000 R udl_ca +ffffffff82d00030 r udl_devs +ffffffff82d000b0 r udl_modes +ffffffff82d01000 R umidi_hw_if +ffffffff82d01030 R umidi_ca +ffffffff82d01060 r umidi_evlen +ffffffff82d01080 r packet_length +ffffffff82d02000 r quirk_name +ffffffff82d03000 R ucom_ca +ffffffff82d04000 R ugen_ca +ffffffff82d04028 R ugenread_intr_filtops +ffffffff82d04058 R ugenread_isoc_filtops +ffffffff82d05000 R uhidev_ca +ffffffff82d05030 r uhid_graphire_report_descr +ffffffff82d050b0 r uhid_graphire3_4x5_report_descr +ffffffff82d05160 r uhid_xb360gp_report_descr +ffffffff82d05210 r uhid_xbonegp_report_descr +ffffffff82d06000 R uhid_ca +ffffffff82d06028 R uhidread_filtops +ffffffff82d07000 R fido_ca +ffffffff82d08000 R ujoy_ca +ffffffff82d09000 r ukbd_keydesc_us +ffffffff82d09290 r ukbd_keydesc_de +ffffffff82d09340 r ukbd_keydesc_de_nodead +ffffffff82d09360 r ukbd_keydesc_fr +ffffffff82d09420 r ukbd_keydesc_fr_apple +ffffffff82d09560 r ukbd_keydesc_fr_dvorak_bepo +ffffffff82d096a0 r ukbd_keydesc_dk +ffffffff82d09740 r ukbd_keydesc_dk_nodead +ffffffff82d09750 r ukbd_keydesc_it +ffffffff82d097f0 r ukbd_keydesc_uk +ffffffff82d098a0 r ukbd_keydesc_jp +ffffffff82d09910 r ukbd_keydesc_sv +ffffffff82d09940 r ukbd_keydesc_sv_nodead +ffffffff82d09950 r ukbd_keydesc_no +ffffffff82d09980 r ukbd_keydesc_no_nodead +ffffffff82d09990 r ukbd_keydesc_us_dvorak +ffffffff82d09a30 r ukbd_keydesc_us_colemak +ffffffff82d09a78 r ukbd_keydesc_swapctrlcaps +ffffffff82d09a90 r ukbd_keydesc_iopener +ffffffff82d09ae0 r ukbd_keydesc_es +ffffffff82d09b80 r ukbd_keydesc_be +ffffffff82d09c40 r ukbd_keydesc_ru +ffffffff82d09db0 r ukbd_keydesc_ua +ffffffff82d09f50 r ukbd_keydesc_sg +ffffffff82d0a010 r ukbd_keydesc_sg_nodead +ffffffff82d0a030 r ukbd_keydesc_sf +ffffffff82d0a050 r ukbd_keydesc_pt +ffffffff82d0a0e0 r ukbd_keydesc_pt_apple +ffffffff82d0a100 r ukbd_keydesc_lt +ffffffff82d0a1e0 r ukbd_keydesc_la +ffffffff82d0a280 r ukbd_keydesc_br +ffffffff82d0a310 r ukbd_keydesc_tr +ffffffff82d0a3d0 r ukbd_keydesc_tr_nodead +ffffffff82d0a3f0 r ukbd_keydesc_pl +ffffffff82d0a450 r ukbd_keydesc_hu +ffffffff82d0a560 r ukbd_keydesc_si +ffffffff82d0a680 r ukbd_keydesc_cf +ffffffff82d0a760 r ukbd_keydesc_cf_nodead +ffffffff82d0a780 r ukbd_keydesc_lv +ffffffff82d0a800 r ukbd_keydesc_nl +ffffffff82d0a8e0 r ukbd_keydesc_nl_nodead +ffffffff82d0a900 r ukbd_keydesc_is +ffffffff82d0a994 r ukbd_keydesc_is_nodead +ffffffff82d0a9a0 r ukbd_keydesc_ee +ffffffff82d0aa50 r ukbd_keydesc_ee_nodead +ffffffff82d0aa70 R ukbd_keydesctab +ffffffff82d0b000 R ukbd_countrylayout +ffffffff82d0b090 R ukbd_consops +ffffffff82d0b0b0 R ukbd_accessops +ffffffff82d0b0c8 R ukbd_ca +ffffffff82d0c000 R ums_accessops +ffffffff82d0c018 R ums_ca +ffffffff82d0d000 R umt_accessops +ffffffff82d0d018 R umt_ca +ffffffff82d0e000 R uts_devs +ffffffff82d0e010 R uts_accessops +ffffffff82d0e028 R uts_ca +ffffffff82d0f000 R ubcmtp_accessops +ffffffff82d0f018 R ubcmtp_ca +ffffffff82d0f040 r ubcmtp_devices +ffffffff82d10000 R ucycom_methods +ffffffff82d10040 R ucycom_devs +ffffffff82d10050 R ucycom_ca +ffffffff82d11000 R uslhcom_methods +ffffffff82d11040 R uslhcom_ca +ffffffff82d11068 r uslhcom_devs +ffffffff82d12000 R ulpt_ca +ffffffff82d13000 R umass_ca +ffffffff82d13028 R umass_bbb_methods +ffffffff82d13040 R umass_cbi_methods +ffffffff82d14000 R umass_quirks +ffffffff82d15000 R umass_scsi_switch +ffffffff82d16000 R uthum_devs +ffffffff82d16008 R uthum_ca +ffffffff82d16030 r uthum_sensor_type_s +ffffffff82d17000 R ugold_devs +ffffffff82d17010 R ugold_ca +ffffffff82d18000 R utrh_devs +ffffffff82d18008 R utrh_ca +ffffffff82d19000 R uoakrh_devs +ffffffff82d19008 R uoakrh_ca +ffffffff82d19030 R uoakrh_methods +ffffffff82d1a000 R uoaklux_devs +ffffffff82d1a008 R uoaklux_ca +ffffffff82d1a030 R uoaklux_methods +ffffffff82d1b000 R uoakv_devs +ffffffff82d1b008 R uoakv_ca +ffffffff82d1b030 R uoakv_methods +ffffffff82d1c000 R uonerng_ca +ffffffff82d1d000 R urng_ca +ffffffff82d1d030 r urng_devs +ffffffff82d1e000 R udcf_ca +ffffffff82d1e028 r udcf_devs +ffffffff82d1f000 R umbg_ca +ffffffff82d20000 R uvisor_methods +ffffffff82d20040 R uvisor_ca +ffffffff82d20070 r uvisor_devs +ffffffff82d21000 R udsbr_hw_if +ffffffff82d21028 R udsbr_ca +ffffffff82d22000 R utwitch_devs +ffffffff82d22008 R utwitch_ca +ffffffff82d23000 R aue_devs +ffffffff82d231b0 R aue_ca +ffffffff82d24000 R axe_devs +ffffffff82d240d0 R axe_ca +ffffffff82d25000 R axen_devs +ffffffff82d25020 R axen_ca +ffffffff82d26000 R smsc_ca +ffffffff82d26030 r smsc_devs +ffffffff82d27000 R cue_ca +ffffffff82d28000 R kue_devs +ffffffff82d28088 R kue_ca +ffffffff82d29000 R cdce_devs +ffffffff82d29048 R cdce_ca +ffffffff82d2a000 R urndis_ca +ffffffff82d2a030 R urndis_class +ffffffff82d2b000 R mos_devs +ffffffff82d2b018 R mos_ca +ffffffff82d2c000 R mue_devs +ffffffff82d2c020 R mue_ca +ffffffff82d2d000 R udav_ca +ffffffff82d2d030 r udav_devs +ffffffff82d2e000 R upl_ca +ffffffff82d2f000 R ugl_ca +ffffffff82d30000 R url_ca +ffffffff82d30030 r url_devs +ffffffff82d31000 R ure_devs +ffffffff82d310f0 R ure_ca +ffffffff82d32000 R uaq_devs +ffffffff82d32018 R uaq_ca +ffffffff82d33000 R umodem_methods +ffffffff82d33040 R umodem_ca +ffffffff82d34000 R uftdi_methods +ffffffff82d34040 R uftdi_ca +ffffffff82d34070 r uftdi_devs +ffffffff82d35000 R uplcom_methods +ffffffff82d35040 R uplcom_ca +ffffffff82d35070 r uplcom_devs +ffffffff82d36000 R umct_methods +ffffffff82d36040 R umct_ca +ffffffff82d36070 r umct_devs +ffffffff82d37000 R uvscom_methods +ffffffff82d37040 R uvscom_ca +ffffffff82d37070 r uvscom_devs +ffffffff82d38000 R ubsa_methods +ffffffff82d38040 R ubsa_devs +ffffffff82d38060 R ubsa_ca +ffffffff82d39000 R ukspan_ca +ffffffff82d39028 r ukspan_devs +ffffffff82d39030 r ukspan_methods +ffffffff82d3a000 R uslcom_methods +ffffffff82d3a040 R uslcom_ca +ffffffff82d3a070 r uslcom_devs +ffffffff82d3b000 R uark_methods +ffffffff82d3b040 R uark_ca +ffffffff82d3b068 r uark_devs +ffffffff82d3c000 R moscom_methods +ffffffff82d3c040 R moscom_ca +ffffffff82d3c068 r moscom_devs +ffffffff82d3d000 R umcs_methods +ffffffff82d3d040 R umcs_devs +ffffffff82d3d050 R umcs_ca +ffffffff82d3e000 R uscom_methods +ffffffff82d3e040 R uscom_ca +ffffffff82d3e068 r uscom_devs +ffffffff82d3f000 R ucrcom_methods +ffffffff82d3f040 R ucrcom_ca +ffffffff82d40000 R uxrcom_methods +ffffffff82d40040 R uxrcom_ca +ffffffff82d40068 r uxrcom_devs +ffffffff82d41000 R uipaq_methods +ffffffff82d41040 R uipaq_ca +ffffffff82d41070 r uipaq_devs +ffffffff82d42000 R umsm_methods +ffffffff82d42040 R umsm_ca +ffffffff82d42070 r umsm_devs +ffffffff82d43000 R uchcom_methods +ffffffff82d43040 R uchcom_ca +ffffffff82d43068 r uchcom_devs +ffffffff82d43080 r dividers +ffffffff82d44000 R uticom_methods +ffffffff82d44040 R uticom_ca +ffffffff82d44070 r uticom_devs +ffffffff82d45000 R wi_usb_devs +ffffffff82d450f0 R wi_usb_ca +ffffffff82d46000 R atu_ca +ffffffff82d47000 R ural_ca +ffffffff82d47030 r ural_devs +ffffffff82d470a0 r ural_rf2522_r2 +ffffffff82d470e0 r ural_rf2524_r2 +ffffffff82d47120 r ural_rf2525_hi_r2 +ffffffff82d47160 r ural_rf2525_r2 +ffffffff82d471a0 r ural_rf2525e_r2 +ffffffff82d471e0 r ural_rf2526_hi_r2 +ffffffff82d47220 r ural_rf2526_r2 +ffffffff82d47260 r ural_def_bbp +ffffffff82d472a0 r ural_def_mac +ffffffff82d48000 R rum_ca +ffffffff82d48030 r rum_devs +ffffffff82d48110 r rum_rf5225 +ffffffff82d48460 r rum_rf5226 +ffffffff82d487b0 r rum_def_bbp +ffffffff82d487f0 r rum_def_mac +ffffffff82d49000 R run_ca +ffffffff82d49030 r run_devs +ffffffff82d49430 r rt2860_rf2850 +ffffffff82d49860 r rt2860_rates +ffffffff82d49920 r rt5592_freqs_40mhz +ffffffff82d49a60 r rt5592_freqs_20mhz +ffffffff82d49ba0 r rt5592_2ghz_def_rf +ffffffff82d49be0 r rt5592_chan_5ghz +ffffffff82d49e30 r rt5592_def_bbp +ffffffff82d49e70 r rt5592_bbp_r196 +ffffffff82d49ed0 r rt5390_def_bbp +ffffffff82d49f00 r rt3572_def_rf +ffffffff82d49f40 r rt3070_def_rf +ffffffff82d49f70 r rt3593_def_rf +ffffffff82d49fb0 r rt5592_def_rf +ffffffff82d49fe0 r rt5392_def_rf +ffffffff82d4a060 r rt5390_def_rf +ffffffff82d4a0e0 r rt2870_def_mac +ffffffff82d4b000 R mtw_ca +ffffffff82d4b030 r mtw_devs +ffffffff82d4b070 r rt2860_rates +ffffffff82d4b130 r mt7601_rf_chan +ffffffff82d4b1a0 r mt7601_def_bbp +ffffffff82d4b2d0 r mt7601_rf_bank0 +ffffffff82d4b330 r mt7601_rf_bank4 +ffffffff82d4b3b0 r mt7601_rf_bank5 +ffffffff82d4b430 r mt7601_def_mac +ffffffff82d4c000 R zyd_ca +ffffffff82d4c030 r zyd_devs +ffffffff82d4c1b0 r zyd_rfmd_init.phyini +ffffffff82d4c2e0 r zyd_rfmd_init.rfini +ffffffff82d4c330 r zyd_rfmd_set_channel.rfprog +ffffffff82d4c3a0 r zyd_al2230_init.phyini +ffffffff82d4c480 r zyd_al2230_init.rfini +ffffffff82d4c4e0 r zyd_al2230_init_b.phyini +ffffffff82d4c5d0 r zyd_al2230_init_b.rfini +ffffffff82d4c620 r zyd_al2230_set_channel.rfprog +ffffffff82d4c6d0 r zyd_al7230B_init.phyini_1 +ffffffff82d4c7b0 r zyd_al7230B_init.rfini_1 +ffffffff82d4c7f0 r zyd_al7230B_set_channel.rfprog +ffffffff82d4c860 r zyd_al7230B_set_channel.rfsc +ffffffff82d4c890 r zyd_al2210_init.phyini +ffffffff82d4c8f0 r zyd_al2210_init.rfini +ffffffff82d4c920 r zyd_al2210_set_channel.rfprog +ffffffff82d4c960 r zyd_gct_init.phyini +ffffffff82d4c9b0 r zyd_gct_init.rfini +ffffffff82d4ca50 r zyd_gct_set_channel.rfprog +ffffffff82d4ca90 r zyd_maxim_set_channel.phyini +ffffffff82d4cba0 r zyd_maxim_set_channel.rfini +ffffffff82d4cbe0 r zyd_maxim_set_channel.rfprog +ffffffff82d4cc50 r zyd_maxim2_set_channel.phyini +ffffffff82d4cd70 r zyd_maxim2_set_channel.rfini +ffffffff82d4cdb0 r zyd_maxim2_set_channel.rfprog +ffffffff82d4ce20 r zyd_rf_name.zyd_rfs +ffffffff82d4cea0 r zyd_def_phyB +ffffffff82d4d0d0 r zyd_def_phy +ffffffff82d4e000 R upgt_ca +ffffffff82d4e028 r upgt_devs_1 +ffffffff82d4e030 r upgt_devs_2 +ffffffff82d4f000 R urtw_ca +ffffffff82d4f030 r urtw_devs +ffffffff82d4f090 r urtw_ratetable +ffffffff82d4f0f0 r urtw_8225_gain +ffffffff82d4f110 r urtw_8225_txpwr_cck_ch14 +ffffffff82d4f140 r urtw_8225_txpwr_cck +ffffffff82d4f170 r urtw_8225_tx_gain_cck_ofdm +ffffffff82d4f176 r urtw_8225_txpwr_ofdm +ffffffff82d4f180 r urtw_8225_rf_part1 +ffffffff82d4f200 r urtw_8225_rxgain +ffffffff82d4f2c0 r urtw_8225_agc +ffffffff82d4f340 r urtw_8225_rf_part2 +ffffffff82d4f470 r urtw_8225_rf_part3 +ffffffff82d4f550 r urtw_8225_channel +ffffffff82d4f58c r urtw_8225_threshold +ffffffff82d4f5a0 r urtw_8225v2_gain_bg +ffffffff82d4f5c0 r urtw_8225v2_tx_gain_cck_ofdm +ffffffff82d4f5f0 r urtw_8225v2_rf_part1 +ffffffff82d4f670 r urtw_8225v2_rxgain +ffffffff82d4f730 r urtw_8225v2_rf_part2 +ffffffff82d4f870 r urtw_8225v2_rf_part3 +ffffffff82d4f970 r urtw_8187b_regtbl +ffffffff82d4fa90 r urtw_8225v2_b_rf +ffffffff82d4fb20 r urtw_8225v2_agc +ffffffff82d4fba0 r urtw_8225v2_ofdm +ffffffff82d50000 R urtwn_ca +ffffffff82d50030 r urtwn_devs +ffffffff82d50330 r rtl8188eu_mac +ffffffff82d504a0 r rtl8192eu_mac +ffffffff82d50640 r rtl8192cu_mac +ffffffff82d50798 r rtl8188eu_bb_prog +ffffffff82d507c0 r rtl8192eu_bb_prog +ffffffff82d507e8 r rtl8188ce_bb_prog +ffffffff82d50810 r rtl8188ru_bb_prog +ffffffff82d50838 r rtl8188cu_bb_prog +ffffffff82d50860 r rtl8192ce_bb_prog +ffffffff82d50888 r rtl8192cu_bb_prog +ffffffff82d508b0 r rtl8188eu_bb_regs +ffffffff82d50a30 r rtl8188eu_bb_vals +ffffffff82d50d30 r rtl8188eu_agc_vals +ffffffff82d50f30 r rtl8192e_bb_regs +ffffffff82d510d0 r rtl8192e_bb_vals +ffffffff82d51410 r rtl8192eu_agc_vals +ffffffff82d51610 r rtl8192ce_bb_regs +ffffffff82d51790 r rtl8188ce_bb_vals +ffffffff82d51a80 r rtl8188ce_agc_vals +ffffffff82d51d00 r rtl8188ru_bb_regs +ffffffff82d51e80 r rtl8188ru_bb_vals +ffffffff82d52180 r rtl8188ru_agc_vals +ffffffff82d52400 r rtl8188cu_bb_vals +ffffffff82d526f0 r rtl8192ce_bb_vals +ffffffff82d529e0 r rtl8192ce_agc_vals +ffffffff82d52c60 r rtl8192cu_bb_vals +ffffffff82d53000 R rsu_ca +ffffffff82d53030 r rsu_devs +ffffffff82d530c8 r rsu_devs_noht +ffffffff82d530d0 r rsu_qid2idx_4ep +ffffffff82d530da r rsu_qid2idx_6ep +ffffffff82d530e4 r rsu_qid2idx_11ep +ffffffff82d530ee r r92s_epaddr +ffffffff82d54000 R otus_ca +ffffffff82d54030 r otus_devs +ffffffff82d54090 r ar_chans +ffffffff82d540c0 r otus_rates +ffffffff82d540e0 r ar5416_phy_regs +ffffffff82d54380 r ar5416_phy_vals_2ghz_20mhz +ffffffff82d548b0 r ar5416_phy_vals_5ghz_20mhz +ffffffff82d54de0 r ar5416_banks_vals_5ghz +ffffffff82d54ef0 r ar5416_banks_vals_2ghz +ffffffff82d55000 r ar5416_banks_regs +ffffffff82d56000 R umb_regstates +ffffffff82d56080 R umb_dataclasses +ffffffff82d56190 R umb_simstate +ffffffff82d56210 R umb_messages +ffffffff82d562b0 R umb_status +ffffffff82d56570 R umb_cids +ffffffff82d566e0 R umb_pktstate +ffffffff82d56740 R umb_actstate +ffffffff82d567a0 R umb_error +ffffffff82d56830 R umb_pintype +ffffffff82d56960 R umb_istate +ffffffff82d569f0 R umb_ca +ffffffff82d56a20 R umb_quirks +ffffffff82d57000 R uath_ca +ffffffff82d57030 r uath_devs +ffffffff82d58000 R athn_usb_ca +ffffffff82d58030 r athn_usb_devs +ffffffff82d59000 R uow_ca +ffffffff82d59028 r uow_devs +ffffffff82d5a000 R uberry_devices +ffffffff82d5a008 R uberry_ca +ffffffff82d5b000 R upd_ca +ffffffff82d5c000 R uwacom_devs +ffffffff82d5c010 R uwacom_ca +ffffffff82d5c038 R uwacom_accessops +ffffffff82d5d000 R bwfm_usb_ca +ffffffff82d5d030 r bwfm_usbdevs +ffffffff82d5e000 R umstc_ca +ffffffff82d5e028 r umstc_devs +ffffffff82d5f000 R uhidpp_ca +ffffffff82d5f028 r uhidpp_devs +ffffffff82d60000 R ucc_ca +ffffffff82d61000 R iic_ca +ffffffff82d62000 r probes +ffffffff82d63000 R lmtemp_ca +ffffffff82d64000 R lmn_ca +ffffffff82d65000 R lmenv_ca +ffffffff82d66000 R maxtmp_ca +ffffffff82d67000 R adc_ca +ffffffff82d68000 R admtemp_ca +ffffffff82d69000 R admlc_ca +ffffffff82d6a000 R admtm_ca +ffffffff82d6b000 R admtmp_ca +ffffffff82d6c000 R admtt_ca +ffffffff82d6d000 R maxds_ca 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dt_static_sched_wakeup +ffffffff830dd340 D dt_static_raw_syscalls_sys_enter +ffffffff830dd3b0 D dt_static_raw_syscalls_sys_exit +ffffffff830dd420 D dt_static_uvm_fault +ffffffff830dd490 D dt_static_uvm_map_insert +ffffffff830dd500 D dt_static_uvm_map_remove +ffffffff830dd570 D dt_static_uvm_malloc +ffffffff830dd5e0 D dt_static_uvm_free +ffffffff830dd650 D dt_static_uvm_pool_get +ffffffff830dd6c0 D dt_static_uvm_pool_put +ffffffff830dd730 D dt_static_vfs_bufcache_rel +ffffffff830dd7a0 D dt_static_vfs_bufcache_take +ffffffff830dd810 D dt_static_vfs_cleaner +ffffffff830dd880 D dt_static_vmm_guest_enter +ffffffff830dd8f0 D dt_static_vmm_guest_exit +ffffffff830dd960 D dt_static_vmm_inout +ffffffff830dd9d0 D dt_static_smr_call +ffffffff830dda40 D dt_static_smr_called +ffffffff830ddab0 D dt_static_smr_barrier_enter +ffffffff830ddb20 D dt_static_smr_barrier_exit +ffffffff830ddb90 D dt_static_smr_wakeup +ffffffff830ddc00 D dt_static_smr_thread +ffffffff830ddc70 D dt_static_refcnt_none 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rndlock +ffffffff830e9060 D rndreinit_timeout +ffffffff830e90a8 D rnd_task +ffffffff830ea000 D video_cd +ffffffff830eb000 d rrip_table_analyze +ffffffff830eb0e0 d rrip_table_getname +ffffffff830eb1e0 d rrip_table_getsymname +ffffffff830eb280 d rrip_table_extref +ffffffff830ec000 D nexecs +ffffffff830ed000 D elf_note_names +ffffffff830ee000 D ncpus +ffffffff830ee004 D ncpusfound +ffffffff830ef000 D acct_lock +ffffffff830ef010 D acctsuspend +ffffffff830ef014 D acctresume +ffffffff830ef018 D acctrate +ffffffff830f0000 D clockintr_mtx +ffffffff830f0010 D statclock_gen +ffffffff830f1000 D fhdlk +ffffffff830f2000 D kqueue_klist_lock +ffffffff830f2010 D kq_timeoutmax +ffffffff830f3000 D stackgap_random +ffffffff830f4000 D nprocesses +ffffffff830f4004 D nthreads +ffffffff830f4008 D fork_tfmrate +ffffffff830f5000 D kthread_q +ffffffff830f6000 D malloc_mtx +ffffffff830f6010 D memname +ffffffff830f64a0 D sysctl_kmemlock +ffffffff830f64b0 D malloc_errintvl +ffffffff830f7000 D maxdmap +ffffffff830f7008 D maxsmap +ffffffff830f7010 D rlimit_lock +ffffffff830f8000 D sched_cost_load +ffffffff830f8004 D sched_cost_priority +ffffffff830f8008 D sched_cost_runnable +ffffffff830f800c D sched_cost_resident +ffffffff830f9000 D intrmap_lock +ffffffff830fa000 D nosuidcoredump +ffffffff830fa008 D sigio_lock +ffffffff830fb000 D smr_lock +ffffffff830fb010 D smr_logintvl +ffffffff830fc000 D startuphook_list +ffffffff830fd000 D sysctl_lock +ffffffff830fd010 D sysctl_disklock +ffffffff830fd020 d openbsd +ffffffff830fd024 d arg_max +ffffffff830fd028 d posix_version +ffffffff830fd02c d ngroups_max +ffffffff830fd030 d int_one +ffffffff830fd034 d maxpartitions +ffffffff830fd038 d raw_part +ffffffff830fd03c D allowpowerdown +ffffffff830fd040 D hw_power +ffffffff830fd044 d byte_order +ffffffff830fd048 d page_size +ffffffff830fe000 d thrsleep_queue +ffffffff830fe010 d thrsleep_lock +ffffffff830ff000 D tc_lock +ffffffff830ff010 D windup_mtx +ffffffff830ff020 D timecounter +ffffffff830ff028 D time_second +ffffffff830ff030 d timehands +ffffffff830ff038 d dummy_timecounter +ffffffff830ff090 d th0 +ffffffff830ff128 d th1 +ffffffff83100000 D itimer_mtx +ffffffff83100010 D ratecheck_mtx +ffffffff83100020 D ppsratecheck_mtx +ffffffff83100030 D resettodr_to +ffffffff83100078 D resettodr_task +ffffffff83101000 D timeout_mutex +ffffffff83102000 D wdog_auto +ffffffff83103000 D taskq_sys +ffffffff83103050 D taskq_sys_mp +ffffffff83104000 D ccpu +ffffffff83104004 D perflevel +ffffffff83104008 D perfpolicy +ffffffff83104010 D setperf_to +ffffffff83105000 D autoconf_attdet_mtx +ffffffff83105010 D msgs +ffffffff83106000 d evcount_list +ffffffff83106010 d evcount_percpu_init_list +ffffffff83107000 D syslogf_rwlock +ffffffff83107010 D log_mtx +ffffffff83107020 D logstash_in +ffffffff83107028 D logstash_out +ffffffff83107030 D logstash_rwlock +ffffffff83108000 D pool_head +ffffffff83108010 D pool_lock +ffffffff83108020 D pool_debug +ffffffff83108028 D pool_allocator_single +ffffffff83108040 D pool_allocator_multi +ffffffff83108058 D pool_allocator_multi_ni +ffffffff83108070 D pool_gc_tick +ffffffff831080b8 D pool_gc_task +ffffffff83109000 D kprintf_mutex +ffffffff83109010 D db_panic +ffffffff83109014 D splassert_ctl +ffffffff83109018 D v_putc +ffffffff83109020 D printf_flags +ffffffff8310a000 D userconf_base +ffffffff8310a004 D userconf_maxdev +ffffffff8310a008 D userconf_totdev +ffffffff8310a00c D userconf_maxlocnames +ffffffff8310a010 D userconf_cnt +ffffffff8310a014 D userconf_lines +ffffffff8310a018 D userconf_histsz +ffffffff8310a020 D userconf_cmds +ffffffff8310b000 D ftlock +ffffffff8310c000 d ppollcollect.poll_errintvl +ffffffff8310d000 D ttydefchars +ffffffff8310d014 D ttclos +ffffffff8310d01b D ttopen +ffffffff8310d022 D ttybg +ffffffff8310d028 D ttyin +ffffffff8310d02e D ttyout +ffffffff8310d038 D ttylist_lock +ffffffff8310e000 D linesw +ffffffff8310e280 D nlinesw +ffffffff8310f000 D pt_softc_lock +ffffffff83110000 d mbstat_boot_boot_cpumem +ffffffff83110080 D mbstat +ffffffff83110090 D mclsizes +ffffffff831100b0 D m_extref_mtx +ffffffff831100c0 D m_pool_allocator +ffffffff83111000 D somaxconn +ffffffff83111004 D sominconn +ffffffff83111008 D sosplice_lock +ffffffff83112000 D sb_max +ffffffff83113000 D unp_lock +ffffffff83113010 D unp_df_lock +ffffffff83113020 D unp_gc_lock +ffffffff83113030 D unp_rights_mtx +ffffffff83113040 D unp_ino_mtx +ffffffff83113050 D unp_gc_task +ffffffff83113080 D unpst_sendspace +ffffffff83113084 D unpst_recvspace +ffffffff83113088 D unpsq_sendspace +ffffffff8311308c D unpsq_recvspace +ffffffff83113090 D unpdg_sendspace +ffffffff83113094 D unpdg_recvspace +ffffffff83114000 D doingcache +ffffffff83115000 D maxvfsconf +ffffffff83115010 d vfsconflist +ffffffff83116000 D lockf_lock +ffffffff83116010 D maxlocksperuid +ffffffff83117000 D iftovt_tab +ffffffff83117040 D vttoif_tab +ffffffff83117064 D suid_clear +ffffffff83117068 D vnode_mtx +ffffffff83117078 D vfs_stall_lock +ffffffff83117090 D vtypes +ffffffff831170e0 D vtags +ffffffff83118000 D syncer_maxdelay +ffffffff83118004 D syncdelay +ffffffff83119000 D dosdirtemplate +ffffffff8311a000 D ntfs_hashlock +ffffffff8311b000 D ntfs_toupper_lock +ffffffff8311c000 D art_table_gc_mtx +ffffffff8311c010 D art_table_gc_task +ffffffff8311c040 D art_node_gc_mtx +ffffffff8311c050 D art_node_gc_task +ffffffff8311d000 D bpf_bufsize +ffffffff8311d004 D bpf_maxbufsize +ffffffff8311d008 D bpf_sysctl_lk +ffffffff8311e000 D ifg_head +ffffffff8311e010 D if_cloners_lock +ffffffff8311e020 D if_input_task_locked +ffffffff8311e050 D netlock +ffffffff8311e060 D ifnetlist +ffffffff8311f000 D ifiq_maxlen_drop +ffffffff8311f004 D ifiq_maxlen_return +ffffffff83120000 D etherbroadcastaddr +ffffffff83120006 D ether_ipmulticast_min +ffffffff8312000c D ether_ipmulticast_max +ffffffff83120012 D ether_ip6multicast_min +ffffffff83120018 D ether_ip6multicast_max +ffffffff83121000 D etherip_cloner +ffffffff83121030 D etherip_list +ffffffff83122000 D loop_cloner +ffffffff83123000 D ifmedia_mtx +ffffffff83124000 D ppp_compressors +ffffffff83124020 D ppp_cloner +ffffffff83125000 D ppp_pkt_init +ffffffff83126000 D ppp_bsd_compress +ffffffff83127000 D ppp_deflate +ffffffff83127070 D ppp_deflate_draft +ffffffff83128000 D tun_cloner +ffffffff83128030 D tap_cloner +ffffffff83129000 D bridgeintrq +ffffffff83129038 D bridge_cloner +ffffffff8312a000 d veb_cloner +ffffffff8312a030 d vport_cloner +ffffffff8312b000 D vlan_tagh_lk +ffffffff8312b010 D vlan_cloner +ffffffff8312b040 D svlan_cloner +ffffffff8312c000 D pipex_list_mtx +ffffffff8312c010 D pipex_prune +ffffffff8312c018 D pipexoutq +ffffffff8312c050 d SHAPad2 +ffffffff8312d000 D rtmap_gc +ffffffff8312d018 D rt_rc +ffffffff8312e000 D rt_labels +ffffffff8312f000 D enc_cloner +ffffffff83130000 D gre_cloner +ffffffff83130030 D gre_list +ffffffff83130040 D mgre_cloner +ffffffff83130070 D egre_cloner +ffffffff831300a0 D nvgre_cloner +ffffffff831300d0 D eoip_cloner +ffffffff83131000 D trunk_cloner +ffffffff83132000 d aggr_cloner +ffffffff83133000 d tpmr_cloner +ffffffff83134000 D mpe_cloner +ffffffff83135000 D mpw_cloner +ffffffff83136000 D mpip_cloner +ffffffff83137000 d bpe_cloner +ffffffff83137030 d bpe_lock +ffffffff83138000 D vether_cloner +ffffffff83139000 D pair_cloner +ffffffff8313a000 d vxlan_cloner +ffffffff8313a030 d vxlan_lock +ffffffff8313a040 d vxlan_teps +ffffffff8313b000 D underload_interval +ffffffff8313b010 D wg_cloner +ffffffff8313c000 d stoeplitz_keyseed +ffffffff8313d000 D ieee80211_cache_size +ffffffff8313e000 D arpt_prune +ffffffff8313e004 D arpt_keep +ffffffff8313e008 D arpt_down +ffffffff8313e010 D arpinq +ffffffff8313e048 D arp_mtx +ffffffff8313e058 D arp_maxtries +ffffffff8313f000 D ipport_firstauto +ffffffff8313f004 D ipport_lastauto +ffffffff8313f008 D ipport_hifirstauto +ffffffff8313f00c D ipport_hilastauto +ffffffff83140000 D divert_sendspace +ffffffff83140004 D divert_recvspace +ffffffff83140008 D divbhashsize +ffffffff83141000 D icmptstamprepl +ffffffff83141004 D icmperrppslim +ffffffff83141008 D icmp_redirtimeout +ffffffff83142000 D ipsendredirects +ffffffff83142004 D ip_defttl +ffffffff83142008 D ip_mtudisc +ffffffff8314200c D ip_mtudisc_timeout +ffffffff83142010 D ipq_mutex +ffffffff83142020 D ip_maxqueue +ffffffff83142028 D ipintrq +ffffffff83142060 d ipsend_task +ffffffff83142090 d ipsendraw_task +ffffffff83143000 D ip_mrtproto +ffffffff83143004 d sin +ffffffff83144000 D rip_sendspace +ffffffff83144008 D rip_recvspace +ffffffff83145000 D tcprexmtthresh +ffffffff83145004 D tcptv_keep_init +ffffffff83145008 D tcp_rst_ppslim +ffffffff8314500c D tcp_ackdrop_ppslim +ffffffff83145010 D tcp_syn_hash_size +ffffffff83145014 D tcp_syn_cache_limit +ffffffff83145018 D tcp_syn_bucket_limit +ffffffff8314501c D tcp_syn_use_limit +ffffffff83146000 D tcp_outflags +ffffffff83147000 D tcp_timer_mtx +ffffffff83147010 D tcp_mssdflt +ffffffff83147014 D tcp_rttdflt +ffffffff83147018 D tcp_do_rfc1323 +ffffffff8314701c D tcp_do_sack +ffffffff83147020 D tcp_do_rfc3390 +ffffffff83147024 D tcp_reass_limit +ffffffff83147028 D tcp_sackhole_limit +ffffffff83148000 D tcp_backoff +ffffffff83148034 D tcp_totbackoff +ffffffff83149000 D tcp_sendspace +ffffffff83149004 D tcp_recvspace +ffffffff83149008 D tcp_autorcvbuf_inc +ffffffff8314a000 D udpcksum +ffffffff8314a004 D udp_sendspace +ffffffff8314a008 D udp_recvspace +ffffffff8314b000 D ipsec_flows_mtx +ffffffff8314b010 D ipsec_ids_idle +ffffffff8314b014 D ipsec_ids_next_flow +ffffffff8314b018 D ipsec_policy_head +ffffffff8314b028 D ipsp_ids_gc_timeout +ffffffff8314b070 D tdb_sadb_mtx +ffffffff8314b080 d tdb_hashmask +ffffffff8314c000 D ipo_tdb_mtx +ffffffff8314c010 D ipsec_acquire_mtx +ffffffff8314c020 D ipsec_acquire_head +ffffffff8314d000 D ipsec_keep_invalid +ffffffff8314d004 D ipsec_require_pfs +ffffffff8314d008 D ipsec_soft_timeout +ffffffff8314d00c D ipsec_exp_timeout +ffffffff8314d010 D ipsec_soft_first_use +ffffffff8314d014 D ipsec_exp_first_use +ffffffff8314d018 D ipsec_expire_acquire +ffffffff8314d01c D esp_enable +ffffffff8314d020 D ah_enable +ffffffff8314e000 D udpencap_enable +ffffffff8314e004 D udpencap_port +ffffffff8314f000 D carp_vh_rc +ffffffff8314f020 D carp_sc_rc +ffffffff8314f040 D carp_opts +ffffffff8314f058 D carp_cloner +ffffffff8314f088 d carp_send_na.mcast ffffffff83150000 d PADDING -ffffffff83151000 d weak_keys -ffffffff83152000 D swcr_id -ffffffff83153000 D window_inflate -ffffffff83153004 D window_deflate -ffffffff83154000 D ghash_update -ffffffff83155000 D mpls_defttl -ffffffff83155004 D mpls_mapttl_ip -ffffffff83156000 D nfskevq_lock -ffffffff83157000 D nfs_backoff -ffffffff83157020 D nfs_ptimers -ffffffff83158000 D desirednfsrvcache -ffffffff83158010 D nonidempotent -ffffffff83158070 D nfsv2_repstat -ffffffff83159000 D nfsv2_type -ffffffff83159030 D nfsv3_type -ffffffff83159060 D nv2tov_type -ffffffff83159080 D nv3tov_type -ffffffff831590a0 D nfsv3_procid -ffffffff83159100 D nfsv2_procid -ffffffff8315915c d nfsv3err_getattr -ffffffff83159170 d nfsv3err_setattr -ffffffff83159190 d nfsv3err_lookup -ffffffff831591a4 d nfsv3err_access -ffffffff831591b0 d nfsv3err_readlink -ffffffff831591d0 d nfsv3err_read -ffffffff831591f0 d nfsv3err_write -ffffffff83159210 d nfsv3err_create -ffffffff83159230 d nfsv3err_mkdir -ffffffff83159250 d nfsv3err_symlink -ffffffff83159270 d nfsv3err_mknod -ffffffff83159290 d nfsv3err_remove -ffffffff831592b0 d nfsv3err_rmdir -ffffffff831592d0 d nfsv3err_rename -ffffffff83159300 d nfsv3err_link -ffffffff83159330 d nfsv3err_readdir -ffffffff83159350 d nfsv3err_readdirplus -ffffffff83159366 d nfsv3err_fsstat -ffffffff83159372 d nfsv3err_fsinfo -ffffffff8315937c d nfsv3err_pathconf -ffffffff83159386 d nfsv3err_commit -ffffffff8315a000 D nfsrv3_procs -ffffffff8315a0b8 D nfs_niothreads -ffffffff8315b000 D fragtbl -ffffffff8315c000 D ffs_vtbl -ffffffff8315d000 D softdep_typenames -ffffffff8315d070 D tickdelay -ffffffff8315e000 D dirchk -ffffffff8315f000 D desireddquot -ffffffff83160000 D amap_list_lock -ffffffff83161000 d uao_list_lock -ffffffff83162000 d uvmexp_countersboot_boot_cpumem -ffffffff831620c0 D uvmexp_counters -ffffffff831620c8 D vm_min_kernel_address -ffffffff83163000 D no_constraint -ffffffff83164000 d uvm_kmapent_warn_rate -ffffffff83165000 D maxslp -ffffffff83166000 D uvmpagerops -ffffffff83167000 D swap_syscall_lock -ffffffff83167010 D oommtx -ffffffff83168000 D uvm_doswapencrypt -ffffffff83169000 D gif_list -ffffffff83169010 D gif_cloner -ffffffff8316a000 D divert6_sendspace -ffffffff8316a004 D divert6_recvspace -ffffffff8316a008 D divb6hashsize -ffffffff8316b000 d in6_get_hw_ifid.allone -ffffffff8316c000 D ip6_sendredirects -ffffffff8316c004 D ip6_defhlim -ffffffff8316c008 D ip6_defmcasthlim -ffffffff8316c00c D ip6_maxfragpackets -ffffffff8316c010 D ip6_maxfrags -ffffffff8316c014 D ip6_log_interval -ffffffff8316c018 D ip6_hdrnestlimit -ffffffff8316c01c D ip6_dad_count -ffffffff8316c020 D ip6_auto_flowlabel -ffffffff8316c024 D ip6_use_deprecated -ffffffff8316c028 D ip6_neighborgcthresh -ffffffff8316c02c D ip6_maxdynroutes -ffffffff8316c030 D rip6_sendspace -ffffffff8316c038 D rip6_recvspace -ffffffff8316c040 D icmp6_redirtimeout -ffffffff8316c044 D icmp6errppslim -ffffffff8316c048 D ip6_mtudisc_timeout -ffffffff8316d000 D frag6_mutex -ffffffff8316e000 d icmp6_mtudisc_hiwat -ffffffff8316e004 d icmp6_mtudisc_lowat -ffffffff8316f000 d randomtab_20 -ffffffff83170000 D ip6intrq -ffffffff83170038 d ip6send_task -ffffffff83171000 D nd6_timer_next -ffffffff83171008 D nd6_expire_next -ffffffff83171010 D nd6_delay -ffffffff83171014 D nd6_umaxtries -ffffffff83171018 D nd6_mmaxtries -ffffffff8317101c D nd6_gctimer -ffffffff83171020 D nd6_maxndopt -ffffffff83172000 d dadq -ffffffff83173000 D pfkeyv2_mtx -ffffffff83173010 d pfkeyv2_seq -ffffffff83174000 D sadb_exts_allowed_in -ffffffff83174090 D sadb_exts_required_in -ffffffff83175000 D cold -ffffffff83176000 D bdevsw -ffffffff83176460 D nblkdev -ffffffff83176470 D cdevsw -ffffffff83178400 D nchrdev -ffffffff83178404 D mem_no -ffffffff83178408 D swapdev -ffffffff83178410 D constab -ffffffff83179000 D machine -ffffffff83179008 D lid_action -ffffffff8317900c D pwr_action -ffffffff83179010 D isa_constraint -ffffffff83179020 D dma_constraint -ffffffff83179030 D uvm_md_constraints -ffffffff83179048 D delay_func -ffffffff83179050 D initclock_func -ffffffff83179058 D bootinfo_size -ffffffff8317905c D waittime -ffffffff83179060 D dumpmag -ffffffff8317a000 D tsc_rdtsc -ffffffff8317a008 D tsc_timecounter -ffffffff8317a060 D tsc_is_synchronized -ffffffff8317b000 D local_apic -ffffffff8317b020 D lapic_id -ffffffff8317b080 D lapic_tpr -ffffffff8317b0a0 d lapic_ppr -ffffffff8317b100 d lapic_isr -ffffffff8317c000 D warn_once -ffffffff8317d000 d errata -ffffffff8317e000 D cpu_ucode_intel_mtx -ffffffff8317f000 D mem_owner_bios -ffffffff8317f008 D mrops -ffffffff8317f028 D mtrrmask -ffffffff8317f030 D mtrrtomrt -ffffffff83180000 D pmap_pg_wc -ffffffff83180008 D pmaps_lock -ffffffff83180018 d pmap_maxkvaddr -ffffffff83181000 D kv_physwait -ffffffff83182000 D fpu_save_len -ffffffff83183000 D i8259_pic -ffffffff83184000 D softintr_pic -ffffffff83185000 D ipifunc -ffffffff83186000 D setperf_mp_mutex -ffffffff83187000 D db_Grp6 -ffffffff83187040 D db_Grp7 -ffffffff83187100 D db_Grp8 -ffffffff83187140 D db_Grp9 -ffffffff83187200 D db_GrpA -ffffffff83187240 D db_GrpB -ffffffff83187280 D db_GrpC -ffffffff831872c0 D db_inst_0f0x -ffffffff83187440 D db_inst_0f2x -ffffffff831875c0 D db_inst_0f3x -ffffffff83187740 D db_inst_0f8x -ffffffff831878c0 D db_inst_0f9x -ffffffff83187a40 D db_inst_0fax -ffffffff83187bc0 D db_inst_0fbx -ffffffff83187d40 D db_inst_0fcx -ffffffff83187ec0 D db_inst_0f -ffffffff83187f40 D db_Esc92 -ffffffff83187f80 D db_Esc94 -ffffffff83187fc0 D db_Esc95 -ffffffff83188000 D db_Esc96 -ffffffff83188040 D db_Esc97 -ffffffff83188080 D db_Esca5 -ffffffff831880c0 D db_Escb4 -ffffffff83188100 D db_Esce3 -ffffffff83188140 D db_Escf4 -ffffffff83188180 D db_Esc8 -ffffffff83188240 D db_Esc9 -ffffffff83188300 D db_Esca -ffffffff831883c0 D db_Escb -ffffffff83188480 D db_Escc -ffffffff83188540 D db_Escd -ffffffff83188600 D db_Esce -ffffffff831886c0 D db_Escf -ffffffff83188780 D db_Esc_inst -ffffffff831887c0 D db_Grp1 -ffffffff83188800 D db_Grp2 -ffffffff83188840 D db_Grp3 -ffffffff83188900 D db_Grp4 -ffffffff831889c0 D db_Grp5 -ffffffff83188a80 D db_inst_table -ffffffff8318a280 D db_bad_inst -ffffffff8318a2a0 D db_index_reg_16 -ffffffff8318a2e0 D db_reg -ffffffff8318a4e0 D db_seg_reg -ffffffff8318a520 D db_lengths -ffffffff8318b000 D db_regs -ffffffff8318b1e0 D db_eregs -ffffffff8318b1f0 D db_reg_args -ffffffff8318c000 D timer_mutex -ffffffff8318c010 d i8254_timecounter -ffffffff8318d000 D spleen8x16 -ffffffff8318d058 D spleen12x24 -ffffffff8318d0b0 D spleen16x32 -ffffffff8318d108 D spleen32x64 -ffffffff8318d160 d builtin_fonts -ffffffff8318d1e0 d wsfont_add.cookiegen -ffffffff8318d1f0 d spleen8x16_data -ffffffff8318dff0 d spleen12x24_data -ffffffff831909f0 d spleen16x32_data -ffffffff831941f0 d spleen32x64_data -ffffffff831a3000 D nsphy_cd -ffffffff831a4000 D nsphyter_cd -ffffffff831a5000 D gentbi_cd -ffffffff831a6000 D qsphy_cd -ffffffff831a7000 D inphy_cd -ffffffff831a8000 D iophy_cd -ffffffff831a9000 D eephy_cd -ffffffff831aa000 D exphy_cd -ffffffff831ab000 D rlphy_cd -ffffffff831ac000 D lxtphy_cd -ffffffff831ad000 D luphy_cd -ffffffff831ae000 D mtdphy_cd -ffffffff831af000 D icsphy_cd -ffffffff831b0000 D sqphy_cd -ffffffff831b1000 D tqphy_cd -ffffffff831b2000 D ukphy_cd -ffffffff831b3000 D dcphy_cd -ffffffff831b4000 D bmtphy_cd -ffffffff831b5000 D brgphy_cd -ffffffff831b6000 D xmphy_cd -ffffffff831b7000 D amphy_cd -ffffffff831b8000 D acphy_cd -ffffffff831b9000 D nsgphy_cd -ffffffff831ba000 D urlphy_cd -ffffffff831bb000 D rgephy_cd -ffffffff831bc000 D ciphy_cd -ffffffff831bd000 D ipgphy_cd -ffffffff831be000 D etphy_cd -ffffffff831bf000 D jmphy_cd -ffffffff831c0000 D atphy_cd -ffffffff831c1000 D scsi_autoconf -ffffffff831c1008 D scsibus_cd -ffffffff831c2000 D cd_cd -ffffffff831c3000 D ch_cd -ffffffff831c3020 D chquirks -ffffffff831c4000 D sd_cd -ffffffff831c5000 D st_cd -ffffffff831c6000 D uk_cd -ffffffff831c7000 D safte_cd -ffffffff831c8000 D ses_cd -ffffffff831c9000 D sym_cd -ffffffff831c9020 D sym_devices -ffffffff831c9070 D asym_devices -ffffffff831ca000 D rdac_cd -ffffffff831ca020 D rdac_devices -ffffffff831cb000 D emc_cd -ffffffff831cb020 D emc_devices -ffffffff831cc000 D hds_cd -ffffffff831cc020 D hds_devices -ffffffff831cd000 D atapiscsi_cd -ffffffff831ce000 D wd_cd -ffffffff831ce020 d wddumpmulti -ffffffff831cf000 D mainbus_cd -ffffffff831cf020 D mba_iba -ffffffff831d0000 D bios_cd -ffffffff831d0020 D smbios_uninfo -ffffffff831d1000 D mpbios_cd -ffffffff831d1020 d mp_conf -ffffffff831d1070 d extint_bus -ffffffff831d10a0 d smi_bus -ffffffff831d10d0 d nmi_bus -ffffffff831d2000 D cpu_info_full_primary -ffffffff831d5000 D cpu_info_list -ffffffff831d5008 D mp_cpu_funcs -ffffffff831d5020 D cpu_cd -ffffffff831d5040 D cpu_info -ffffffff831d6000 D local_pic -ffffffff831d6090 D lapic_readreg -ffffffff831d6098 D lapic_writereg -ffffffff831d60a0 D x86_ipi -ffffffff831d7000 D ioapic_cold -ffffffff831d7008 D ioapic_cd -ffffffff831d8000 D efifb_std_descr -ffffffff831d8030 D efifb_descrs -ffffffff831d8038 D efifb_accessops -ffffffff831d8098 D efifb_cd -ffffffff831d9000 D pvbus_cd -ffffffff831d9020 D pvbus_types -ffffffff831d90e0 D pvbus_dma_tag -ffffffff831da000 D pvclock_cd -ffffffff831da020 D pvclock_timecounter -ffffffff831db000 D vmt_tclo_rpc -ffffffff831db0d0 D vmt_cd -ffffffff831dc000 D xen_cd -ffffffff831dc020 D xen_bus_dma_tag -ffffffff831dd000 D xnf_cd -ffffffff831de000 D xbf_cd -ffffffff831df000 D hv_msg_dispatch -ffffffff831df110 D hv_timecounter -ffffffff831df168 D hyperv_cd -ffffffff831e0000 d hv_ic_devs -ffffffff831e1000 D hvn_cd -ffffffff831e2000 D hvs_cd -ffffffff831e3000 D virtio_cd -ffffffff831e4000 D vio_cd -ffffffff831e5000 D vioblk_cd -ffffffff831e6000 D viomb_cd -ffffffff831e7000 D viornd_cd -ffffffff831e8000 D vioscsi_cd -ffffffff831e9000 D vmmci_cd -ffffffff831ea000 D pci_cd -ffffffff831eb000 D arc_fw_hdr -ffffffff831eb008 D arc_cd -ffffffff831ec000 D jmb_cd -ffffffff831ed000 D mfii_cd -ffffffff831ee000 D ips_cd -ffffffff831ef000 D eap_cd -ffffffff831f0000 D auacer_cd -ffffffff831f1000 D auich_cd -ffffffff831f2000 D azalia_cd -ffffffff831f3000 D envy_cd -ffffffff831f3020 D envy_matchids -ffffffff831f3030 D envy_rates -ffffffff831f30b0 D ak4524_dac -ffffffff831f30d8 D ak4524_adc -ffffffff831f3100 D ak4358_dac -ffffffff831f3128 D ak5365_adc -ffffffff831f3150 D unkenvy_codec -ffffffff831f3180 D envy_cards -ffffffff831f33f0 D envy_cards_ht -ffffffff831f3600 d julia_eeprom -ffffffff831f4000 D emu_cd -ffffffff831f5000 D auixp_cd -ffffffff831f6000 D clcs_cd -ffffffff831f7000 D yds_cd -ffffffff831f8000 D auvia_cd -ffffffff831f9000 D qle_cd -ffffffff831fa000 D mpii_cd -ffffffff831fb000 D aq_cd -ffffffff831fc000 D de_cd -ffffffff831fd000 D pcn_cd -ffffffff831fe000 D wdc_sii3114_vtbl -ffffffff831fe038 D wdc_pdc203xx_vtbl -ffffffff831fe070 D wdc_svwsata_vtbl -ffffffff831fe0a8 D pciide_cd -ffffffff831fe0d0 d sis_hostbr_type -ffffffff831ff000 D ppb_cd -ffffffff83200000 D vr_cd -ffffffff83200020 D vr_devices -ffffffff83201000 D txp_cd -ffffffff83202000 D bt848_card_signature -ffffffff83203000 D bktr_cd -ffffffff83204000 D em_cd -ffffffff83205000 D ixgb_cd -ffffffff83206000 D ix_cd -ffffffff83206020 D ixgbe_smart_speed -ffffffff83206024 D ixgbe_enable_msix -ffffffff83207000 D ixl_cd -ffffffff83207020 d ixl_sff_lock -ffffffff83208000 D xge_cd -ffffffff83209000 D thtc_cd -ffffffff83209020 D tht_cd -ffffffff83209040 D tht_txt_desc -ffffffff83209068 D tht_rxf_desc -ffffffff83209090 D tht_rxd_desc -ffffffff832090b8 D tht_txf_desc -ffffffff8320a000 D myx_cd -ffffffff8320b000 D oce_cd -ffffffff8320c000 D dc_devs -ffffffff8320d000 D cas_cd -ffffffff8320e000 D sis_cd -ffffffff8320f000 D se_cd -ffffffff83210000 D cbb_cd -ffffffff83210020 D yc_chipsets -ffffffff832101b0 d pccbb_funcs -ffffffff832101e0 d pccbb_pcmcia_funcs -ffffffff83211000 D skc_cd -ffffffff83211020 D sk_cd -ffffffff83212000 D mskc_cd -ffffffff83212020 D msk_cd -ffffffff83213000 D puc_cd -ffffffff83214000 D puc_ndevs -ffffffff83215000 D iwi_cd -ffffffff83216000 D wpi_cd -ffffffff83217000 D iwn_cd -ffffffff83218000 D iwm_cd -ffffffff83219000 D iwx_cd -ffffffff8321a000 D cmpci_cd -ffffffff8321b000 D iha_cd -ffffffff8321c000 D pcscp_cd -ffffffff8321c020 D pcscp_glue -ffffffff8321d000 D bge_cd -ffffffff8321e000 D bnx_firmwares -ffffffff8321e160 D bnx_rv2ps -ffffffff8321e1c0 D bnx_cd -ffffffff8321e1e0 d flash_5709 -ffffffff8321e210 d flash_table -ffffffff8321f000 D vge_cd -ffffffff83220000 D stge_cd -ffffffff83221000 D nfe_cd -ffffffff83222000 D et_cd -ffffffff83223000 D jme_cd -ffffffff83224000 D age_cd -ffffffff83225000 D alc_dma_burst -ffffffff83225020 D alc_cd -ffffffff83226000 D ale_cd -ffffffff83227000 D amdpm_cd -ffffffff83227020 d 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+ffffffff8316b004 D divert6_recvspace +ffffffff8316b008 D divb6hashsize +ffffffff8316c000 d in6_get_hw_ifid.allone +ffffffff8316d000 D ip6_sendredirects +ffffffff8316d004 D ip6_defhlim +ffffffff8316d008 D ip6_defmcasthlim +ffffffff8316d00c D ip6_maxfragpackets +ffffffff8316d010 D ip6_maxfrags +ffffffff8316d014 D ip6_log_interval +ffffffff8316d018 D ip6_hdrnestlimit +ffffffff8316d01c D ip6_dad_count +ffffffff8316d020 D ip6_auto_flowlabel +ffffffff8316d024 D ip6_use_deprecated +ffffffff8316d028 D ip6_neighborgcthresh +ffffffff8316d02c D ip6_maxdynroutes +ffffffff8316d030 D rip6_sendspace +ffffffff8316d038 D rip6_recvspace +ffffffff8316d040 D icmp6_redirtimeout +ffffffff8316d044 D icmp6errppslim +ffffffff8316d048 D ip6_mtudisc_timeout +ffffffff8316e000 D frag6_mutex +ffffffff8316f000 d icmp6_mtudisc_hiwat +ffffffff8316f004 d icmp6_mtudisc_lowat +ffffffff83170000 d randomtab_20 +ffffffff83171000 D ip6intrq +ffffffff83171038 d ip6send_task +ffffffff83172000 D nd6_timer_next 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tsc_timecounter +ffffffff8317b060 D tsc_is_synchronized +ffffffff8317c000 D local_apic +ffffffff8317c020 D lapic_id +ffffffff8317c080 D lapic_tpr +ffffffff8317c0a0 d lapic_ppr +ffffffff8317c100 d lapic_isr +ffffffff8317d000 D warn_once +ffffffff8317e000 d errata +ffffffff8317f000 D cpu_ucode_intel_mtx +ffffffff83180000 D mem_owner_bios +ffffffff83180008 D mrops +ffffffff83180028 D mtrrmask +ffffffff83180030 D mtrrtomrt +ffffffff83181000 D pmap_pg_wc +ffffffff83181008 D pmaps_lock +ffffffff83181018 d pmap_maxkvaddr +ffffffff83182000 D kv_physwait +ffffffff83183000 D fpu_save_len +ffffffff83184000 D i8259_pic +ffffffff83185000 D softintr_pic +ffffffff83186000 D ipifunc +ffffffff83187000 D setperf_mp_mutex +ffffffff83188000 D db_Grp6 +ffffffff83188040 D db_Grp7 +ffffffff83188100 D db_Grp8 +ffffffff83188140 D db_Grp9 +ffffffff83188200 D db_GrpA +ffffffff83188240 D db_GrpB +ffffffff83188280 D db_GrpC +ffffffff831882c0 D db_inst_0f0x +ffffffff83188440 D db_inst_0f2x +ffffffff831885c0 D db_inst_0f3x +ffffffff83188740 D db_inst_0f8x +ffffffff831888c0 D db_inst_0f9x +ffffffff83188a40 D db_inst_0fax +ffffffff83188bc0 D db_inst_0fbx +ffffffff83188d40 D db_inst_0fcx +ffffffff83188ec0 D db_inst_0f +ffffffff83188f40 D db_Esc92 +ffffffff83188f80 D db_Esc94 +ffffffff83188fc0 D db_Esc95 +ffffffff83189000 D db_Esc96 +ffffffff83189040 D db_Esc97 +ffffffff83189080 D db_Esca5 +ffffffff831890c0 D db_Escb4 +ffffffff83189100 D db_Esce3 +ffffffff83189140 D db_Escf4 +ffffffff83189180 D db_Esc8 +ffffffff83189240 D db_Esc9 +ffffffff83189300 D db_Esca +ffffffff831893c0 D db_Escb +ffffffff83189480 D db_Escc +ffffffff83189540 D db_Escd +ffffffff83189600 D db_Esce +ffffffff831896c0 D db_Escf +ffffffff83189780 D db_Esc_inst +ffffffff831897c0 D db_Grp1 +ffffffff83189800 D db_Grp2 +ffffffff83189840 D db_Grp3 +ffffffff83189900 D db_Grp4 +ffffffff831899c0 D db_Grp5 +ffffffff83189a80 D db_inst_table +ffffffff8318b280 D db_bad_inst +ffffffff8318b2a0 D db_index_reg_16 +ffffffff8318b2e0 D db_reg +ffffffff8318b4e0 D db_seg_reg +ffffffff8318b520 D db_lengths +ffffffff8318c000 D db_regs +ffffffff8318c1e0 D db_eregs +ffffffff8318c1f0 D db_reg_args +ffffffff8318d000 D timer_mutex +ffffffff8318d010 d i8254_timecounter +ffffffff8318e000 D spleen8x16 +ffffffff8318e058 D spleen12x24 +ffffffff8318e0b0 D spleen16x32 +ffffffff8318e108 D spleen32x64 +ffffffff8318e160 d builtin_fonts +ffffffff8318e1e0 d wsfont_add.cookiegen +ffffffff8318e1f0 d spleen8x16_data +ffffffff8318eff0 d spleen12x24_data +ffffffff831919f0 d spleen16x32_data +ffffffff831951f0 d spleen32x64_data +ffffffff831a4000 D nsphy_cd +ffffffff831a5000 D nsphyter_cd +ffffffff831a6000 D gentbi_cd +ffffffff831a7000 D qsphy_cd +ffffffff831a8000 D inphy_cd +ffffffff831a9000 D iophy_cd +ffffffff831aa000 D eephy_cd +ffffffff831ab000 D exphy_cd +ffffffff831ac000 D rlphy_cd +ffffffff831ad000 D lxtphy_cd +ffffffff831ae000 D luphy_cd +ffffffff831af000 D mtdphy_cd +ffffffff831b0000 D icsphy_cd +ffffffff831b1000 D sqphy_cd +ffffffff831b2000 D tqphy_cd +ffffffff831b3000 D ukphy_cd +ffffffff831b4000 D dcphy_cd +ffffffff831b5000 D bmtphy_cd +ffffffff831b6000 D brgphy_cd +ffffffff831b7000 D xmphy_cd +ffffffff831b8000 D amphy_cd +ffffffff831b9000 D acphy_cd +ffffffff831ba000 D nsgphy_cd +ffffffff831bb000 D urlphy_cd +ffffffff831bc000 D rgephy_cd +ffffffff831bd000 D ciphy_cd +ffffffff831be000 D ipgphy_cd +ffffffff831bf000 D etphy_cd +ffffffff831c0000 D jmphy_cd +ffffffff831c1000 D atphy_cd +ffffffff831c2000 D scsi_autoconf +ffffffff831c2008 D scsibus_cd +ffffffff831c3000 D cd_cd +ffffffff831c4000 D ch_cd +ffffffff831c4020 D chquirks +ffffffff831c5000 D sd_cd +ffffffff831c6000 D st_cd +ffffffff831c7000 D uk_cd +ffffffff831c8000 D safte_cd +ffffffff831c9000 D ses_cd +ffffffff831ca000 D sym_cd +ffffffff831ca020 D sym_devices +ffffffff831ca070 D asym_devices +ffffffff831cb000 D rdac_cd +ffffffff831cb020 D rdac_devices +ffffffff831cc000 D emc_cd +ffffffff831cc020 D emc_devices +ffffffff831cd000 D hds_cd +ffffffff831cd020 D hds_devices +ffffffff831ce000 D atapiscsi_cd +ffffffff831cf000 D wd_cd +ffffffff831cf020 d wddumpmulti +ffffffff831d0000 D mainbus_cd +ffffffff831d0020 D mba_iba +ffffffff831d1000 D bios_cd +ffffffff831d1020 D smbios_uninfo +ffffffff831d2000 D mpbios_cd +ffffffff831d2020 d mp_conf +ffffffff831d2070 d extint_bus +ffffffff831d20a0 d smi_bus +ffffffff831d20d0 d nmi_bus +ffffffff831d3000 D cpu_info_full_primary +ffffffff831d6000 D cpu_info_list +ffffffff831d6008 D mp_cpu_funcs +ffffffff831d6020 D cpu_cd +ffffffff831d6040 D cpu_info +ffffffff831d7000 D local_pic +ffffffff831d7090 D lapic_readreg +ffffffff831d7098 D lapic_writereg +ffffffff831d70a0 D x86_ipi +ffffffff831d8000 D ioapic_cold +ffffffff831d8008 D ioapic_cd +ffffffff831d9000 D efifb_std_descr +ffffffff831d9030 D efifb_descrs +ffffffff831d9038 D efifb_accessops +ffffffff831d9098 D efifb_cd +ffffffff831da000 D pvbus_cd +ffffffff831da020 D pvbus_types +ffffffff831da0e0 D pvbus_dma_tag +ffffffff831db000 D pvclock_cd +ffffffff831db020 D pvclock_timecounter +ffffffff831dc000 D vmt_tclo_rpc +ffffffff831dc0d0 D vmt_cd +ffffffff831dd000 D xen_cd +ffffffff831dd020 D xen_bus_dma_tag +ffffffff831de000 D xnf_cd +ffffffff831df000 D xbf_cd +ffffffff831e0000 D hv_msg_dispatch +ffffffff831e0110 D hv_timecounter +ffffffff831e0168 D hyperv_cd +ffffffff831e1000 d hv_ic_devs +ffffffff831e2000 D hvn_cd +ffffffff831e3000 D hvs_cd +ffffffff831e4000 D virtio_cd +ffffffff831e5000 D vio_cd +ffffffff831e6000 D vioblk_cd +ffffffff831e7000 D viomb_cd +ffffffff831e8000 D viornd_cd +ffffffff831e9000 D vioscsi_cd +ffffffff831ea000 D vmmci_cd +ffffffff831eb000 D pci_cd +ffffffff831ec000 D arc_fw_hdr +ffffffff831ec008 D arc_cd +ffffffff831ed000 D jmb_cd +ffffffff831ee000 D mfii_cd +ffffffff831ef000 D ips_cd +ffffffff831f0000 D eap_cd +ffffffff831f1000 D auacer_cd +ffffffff831f2000 D auich_cd +ffffffff831f3000 D azalia_cd +ffffffff831f4000 D envy_cd +ffffffff831f4020 D envy_matchids +ffffffff831f4030 D envy_rates +ffffffff831f40b0 D ak4524_dac +ffffffff831f40d8 D ak4524_adc +ffffffff831f4100 D ak4358_dac +ffffffff831f4128 D ak5365_adc +ffffffff831f4150 D unkenvy_codec +ffffffff831f4180 D envy_cards +ffffffff831f43f0 D envy_cards_ht +ffffffff831f4600 d julia_eeprom +ffffffff831f5000 D emu_cd +ffffffff831f6000 D auixp_cd +ffffffff831f7000 D clcs_cd +ffffffff831f8000 D yds_cd +ffffffff831f9000 D auvia_cd +ffffffff831fa000 D qle_cd +ffffffff831fb000 D mpii_cd +ffffffff831fc000 D aq_cd +ffffffff831fd000 D de_cd +ffffffff831fe000 D pcn_cd +ffffffff831ff000 D wdc_sii3114_vtbl +ffffffff831ff038 D wdc_pdc203xx_vtbl +ffffffff831ff070 D wdc_svwsata_vtbl +ffffffff831ff0a8 D pciide_cd +ffffffff831ff0d0 d sis_hostbr_type +ffffffff83200000 D ppb_cd +ffffffff83201000 D vr_cd +ffffffff83201020 D vr_devices +ffffffff83202000 D txp_cd +ffffffff83203000 D bt848_card_signature +ffffffff83204000 D bktr_cd +ffffffff83205000 D em_cd +ffffffff83206000 D ixgb_cd +ffffffff83207000 D ix_cd +ffffffff83207020 D ixgbe_smart_speed +ffffffff83207024 D ixgbe_enable_msix +ffffffff83208000 D ixl_cd +ffffffff83208020 d ixl_sff_lock +ffffffff83209000 D xge_cd +ffffffff8320a000 D thtc_cd +ffffffff8320a020 D tht_cd +ffffffff8320a040 D tht_txt_desc +ffffffff8320a068 D tht_rxf_desc +ffffffff8320a090 D tht_rxd_desc +ffffffff8320a0b8 D tht_txf_desc +ffffffff8320b000 D myx_cd +ffffffff8320c000 D oce_cd +ffffffff8320d000 D dc_devs +ffffffff8320e000 D cas_cd +ffffffff8320f000 D sis_cd +ffffffff83210000 D se_cd +ffffffff83211000 D cbb_cd +ffffffff83211020 D yc_chipsets +ffffffff832111b0 d pccbb_funcs +ffffffff832111e0 d pccbb_pcmcia_funcs +ffffffff83212000 D skc_cd +ffffffff83212020 D sk_cd +ffffffff83213000 D mskc_cd +ffffffff83213020 D msk_cd +ffffffff83214000 D puc_cd +ffffffff83215000 D puc_ndevs +ffffffff83216000 D iwi_cd +ffffffff83217000 D wpi_cd +ffffffff83218000 D iwn_cd +ffffffff83219000 D iwm_cd +ffffffff8321a000 D iwx_cd +ffffffff8321b000 D cmpci_cd +ffffffff8321c000 D iha_cd +ffffffff8321d000 D pcscp_cd +ffffffff8321d020 D pcscp_glue +ffffffff8321e000 D bge_cd +ffffffff8321f000 D bnx_firmwares +ffffffff8321f160 D bnx_rv2ps +ffffffff8321f1c0 D bnx_cd +ffffffff8321f1e0 d flash_5709 +ffffffff8321f210 d flash_table +ffffffff83220000 D vge_cd +ffffffff83221000 D stge_cd +ffffffff83222000 D nfe_cd +ffffffff83223000 D et_cd +ffffffff83224000 D jme_cd +ffffffff83225000 D age_cd +ffffffff83226000 D alc_dma_burst +ffffffff83226020 D alc_cd +ffffffff83227000 D ale_cd +ffffffff83228000 D amdpm_cd +ffffffff83228020 d amdpm_timecounter +ffffffff83229000 D bce_cd +ffffffff8322a000 D rtwn_cd +ffffffff8322b000 d ral_rt2560_opns +ffffffff8322b028 d ral_rt2661_opns +ffffffff8322b050 d ral_rt2860_opns +ffffffff8322c000 D piixpm_cd +ffffffff8322d000 D vic_cd +ffffffff8322e000 D vmx_cd +ffffffff8322f000 D vmwpvs_cd +ffffffff83230000 D lii_cd +ffffffff83231000 D ichiic_cd +ffffffff83232000 D viapm_cd +ffffffff83232020 d viapm_timecounter +ffffffff83233000 D amdiic_cd +ffffffff83234000 D nviic_cd +ffffffff83235000 D kate_cd +ffffffff83236000 D km_cd +ffffffff83237000 D cpu_model_offsets +ffffffff83237070 D ksmn_cd +ffffffff83238000 D itherm_cd +ffffffff83239000 D pchtemp_cd +ffffffff8323a000 D xspd_cd +ffffffff8323b000 D virtio_pci_ops +ffffffff8323c000 D bwfm_pci_buscore_ops +ffffffff8323c030 D bwfm_pci_bus_ops +ffffffff8323c058 D bwfm_pci_msgbuf_ops +ffffffff8323d000 D bnxt_cd +ffffffff8323e000 D mcx_cd +ffffffff8323f000 D iavf_cd +ffffffff83240000 D rge_cd +ffffffff83241000 D igc_cd +ffffffff83242000 D agp_cd +ffffffff83243000 D intagp_cd +ffffffff83243020 D agp_i810_methods +ffffffff83244000 D reservation_ww_class +ffffffff83245000 d bridge_lock +ffffffff83245010 d bridge_list +ffffffff83246000 d drm_connector_enum_list +ffffffff832461f8 d connector_list_lock +ffffffff83246208 d connector_list +ffffffff83247000 d kernel_fb_helper_list +ffffffff83247010 d kernel_fb_helper_lock +ffffffff83248000 D drm_global_mutex +ffffffff83249000 D sch_mtx +ffffffff83249010 D i2c_bit_algo +ffffffff83249020 d drm_fence_context_count +ffffffff83249028 d dma_fence_stub_mtx +ffffffff83249038 D wait_bit_mtx +ffffffff83249048 D shrinkers +ffffffff8324a000 d crtc_ww_class +ffffffff8324b000 d panel_lock +ffffffff8324b010 d panel_list +ffffffff8324c000 d ttm_global_mutex +ffffffff8324d000 D intel_bbops +ffffffff8324e000 d i915_sys_placement +ffffffff8324e020 d i915_ttm_bo_driver +ffffffff8324f000 d mchdev_lock +ffffffff83250000 D inteldrm_stdscreen +ffffffff83250030 D inteldrm_scrlist +ffffffff83250038 D inteldrm_screenlist +ffffffff83250048 D inteldrm_accessops +ffffffff832500a8 D inteldrm_cd +ffffffff83251000 d i915_gpu_coredump.capture_mutex +ffffffff83252000 d mitigations +ffffffff83253000 D i915_modparams +ffffffff83254000 d schedule_lock +ffffffff83255000 d unbind_fence_ops +ffffffff83256000 D intel_graphics_stolen_res +ffffffff83257000 D btc_valid_sclk +ffffffff83258000 d evergreen_cs_packet_parse_vline.vline_start_end +ffffffff83258020 d evergreen_cs_packet_parse_vline.vline_status +ffffffff83259000 d r600_cs_packet_parse_vline.vline_start_end +ffffffff83259008 d r600_cs_packet_parse_vline.vline_status +ffffffff8325a000 d r100_asic +ffffffff8325a2e0 d r200_asic +ffffffff8325a5c0 d r300_asic_pcie +ffffffff8325a8a0 d r300_asic +ffffffff8325ab80 d r420_asic +ffffffff8325ae60 d rs400_asic +ffffffff8325b140 d rs600_asic +ffffffff8325b420 d rs690_asic +ffffffff8325b700 d rv515_asic +ffffffff8325b9e0 d r520_asic +ffffffff8325bcc0 d r600_asic +ffffffff8325bfa0 d rv6xx_asic +ffffffff8325c280 d rs780_asic +ffffffff8325c560 d rv770_asic +ffffffff8325c840 d evergreen_asic +ffffffff8325cb20 d sumo_asic +ffffffff8325ce00 d btc_asic +ffffffff8325d0e0 d cayman_asic +ffffffff8325d3c0 d trinity_asic +ffffffff8325d6a0 d si_asic +ffffffff8325d980 d ci_asic +ffffffff8325dc60 d kv_asic +ffffffff8325e000 d dce6_funcs +ffffffff8325e018 d dce6_hdmi_funcs +ffffffff8325e088 d dce6_dp_funcs +ffffffff8325e0f8 d dce4_funcs +ffffffff8325e110 d dce4_hdmi_funcs +ffffffff8325e180 d dce4_dp_funcs +ffffffff8325e1f0 d dce32_funcs +ffffffff8325e208 d dce32_hdmi_funcs +ffffffff8325e278 d dce32_dp_funcs +ffffffff8325e2e8 d r600_funcs +ffffffff8325e300 d r600_hdmi_funcs +ffffffff8325f000 D radeon_modeset +ffffffff8325f004 D radeon_dynclks +ffffffff8325f008 D radeon_agpmode +ffffffff8325f00c D radeon_gart_size +ffffffff8325f010 D radeon_tv +ffffffff8325f014 D radeon_audio +ffffffff8325f018 D radeon_pcie_gen2 +ffffffff8325f01c D radeon_msi +ffffffff8325f020 D radeon_lockup_timeout +ffffffff8325f024 D radeon_dpm +ffffffff8325f028 D radeon_aspm +ffffffff8325f02c D radeon_runtime_pm +ffffffff8325f030 D radeon_vm_size +ffffffff8325f034 D radeon_vm_block_size +ffffffff8325f038 D radeon_use_pflipirq +ffffffff8325f03c D radeon_bapm +ffffffff8325f040 D radeon_backlight +ffffffff8325f044 D radeon_auxch +ffffffff8325f048 D radeon_uvd +ffffffff8325f04c D radeon_vce +ffffffff8325f050 D radeon_si_support +ffffffff8325f054 D radeon_cik_support +ffffffff8325f058 D radeondrm_cd +ffffffff8325f078 D radeondrm_stdscreen +ffffffff8325f0a8 D radeondrm_scrlist +ffffffff8325f0b0 D radeondrm_screenlist +ffffffff8325f0c0 D radeondrm_accessops +ffffffff83260000 D radeon_bbops +ffffffff83261000 d radeon_bo_driver +ffffffff83262000 d verde_pg_init +ffffffff83263000 d cac_weights_pitcairn +ffffffff832634d0 d cac_weights_oland +ffffffff83264000 d aldebaran_mode2_handler +ffffffff83265000 d amdgpu_vbios_version_attrs +ffffffff83266000 D amdgpu_asic_name +ffffffff83267000 D amdgpu_gart_size +ffffffff83267004 D amdgpu_gtt_size +ffffffff83267008 D amdgpu_moverate +ffffffff8326700c D amdgpu_audio +ffffffff83267010 D amdgpu_pcie_gen2 +ffffffff83267014 D amdgpu_msi +ffffffff83267018 D amdgpu_dpm +ffffffff8326701c D amdgpu_fw_load_type +ffffffff83267020 D amdgpu_aspm +ffffffff83267024 D amdgpu_runtime_pm +ffffffff83267028 D amdgpu_ip_block_mask +ffffffff8326702c D amdgpu_bapm +ffffffff83267030 D amdgpu_vm_size +ffffffff83267034 D amdgpu_vm_fragment_size +ffffffff83267038 D amdgpu_vm_block_size +ffffffff8326703c D amdgpu_vm_update_mode +ffffffff83267040 D amdgpu_dc +ffffffff83267044 D amdgpu_sched_jobs +ffffffff83267048 D amdgpu_sched_hw_submission +ffffffff83267050 D amdgpu_cg_mask +ffffffff83267058 D amdgpu_pg_mask +ffffffff8326705c D amdgpu_sdma_phase_quantum +ffffffff83267060 D amdgpu_pp_feature_mask +ffffffff83267064 D amdgpu_lbpw +ffffffff83267068 D amdgpu_compute_multipipe +ffffffff8326706c D amdgpu_gpu_recovery +ffffffff83267070 D amdgpu_smu_pptable_id +ffffffff83267074 D amdgpu_dc_feature_mask +ffffffff83267078 D amdgpu_async_gfx_ring +ffffffff8326707c D amdgpu_discovery +ffffffff83267080 D amdgpu_noretry +ffffffff83267084 D amdgpu_force_asic_type +ffffffff83267088 D amdgpu_tmz +ffffffff8326708c D amdgpu_reset_method +ffffffff83267090 D amdgpu_num_kcq +ffffffff83267094 D amdgpu_use_xgmi_p2p +ffffffff83267098 D mgpu_info +ffffffff83267248 D amdgpu_ras_enable +ffffffff8326724c D amdgpu_ras_mask +ffffffff83267250 D amdgpu_bad_page_threshold +ffffffff83267254 D amdgpu_backlight +ffffffff83267258 D amdgpu_cd +ffffffff83267278 D amdgpu_stdscreen +ffffffff832672a8 D amdgpu_scrlist +ffffffff832672b0 D amdgpu_screenlist +ffffffff832672c0 D amdgpu_accessops +ffffffff83268000 d amdgpu_gtt_mgr_attributes +ffffffff83269000 D amdgpu_bbops +ffffffff8326a000 D soc15_ih_clientid_name +ffffffff8326b000 D ras_error_string +ffffffff8326b030 D ras_block_string +ffffffff8326b0c0 D ras_mca_block_string +ffffffff8326c000 d amdgpu_bo_driver +ffffffff8326d000 d amdgpu_vram_mgr_attributes +ffffffff8326e000 D amdgpu_xgmi_hive_type +ffffffff8326e008 d xgmi_mutex +ffffffff8326e018 D xgmi_ras_hw_ops +ffffffff8326e058 D xgmi_ras +ffffffff8326f000 d gfx_v9_0_ras +ffffffff83270000 D gfx_v9_4_ras +ffffffff83271000 D gfx_v9_4_2_ras_ops +ffffffff83271040 D gfx_v9_4_2_ras +ffffffff83272000 D hdp_v4_0_ras_hw_ops +ffffffff83272040 D hdp_v4_0_ras +ffffffff83273000 d jpeg_v2_6_ras +ffffffff83274000 D mca_v3_0_mp0_ras +ffffffff83274058 D mca_v3_0_mp1_ras +ffffffff832740b0 D mca_v3_0_mpio_ras +ffffffff83275000 D mmhub_v1_0_ras_hw_ops +ffffffff83275040 D mmhub_v1_0_ras +ffffffff83276000 D mmhub_v1_7_ras_hw_ops +ffffffff83276040 D mmhub_v1_7_ras +ffffffff83277000 D mmhub_v9_4_ras +ffffffff83278000 D nbio_v7_4_ras +ffffffff83279000 d sriov_sc_video_codecs_encode +ffffffff83279010 d sriov_sc_video_codecs_decode +ffffffff83279020 d sriov_sc_video_codecs_encode_array +ffffffff83279050 d sriov_sc_video_codecs_decode_array +ffffffff8327a000 d sdma_v4_0_ras +ffffffff8327b000 D sdma_v4_4_ras +ffffffff8327c000 d sienna_cichlid_mode2_handler +ffffffff8327d000 D umc_v6_1_ras +ffffffff8327e000 D umc_v6_7_ras +ffffffff8327f000 D umc_v8_10_ras +ffffffff83280000 D umc_v8_7_ras +ffffffff83281000 d vcn_v2_6_ras +ffffffff83282000 d amdgpu_dm_mode_config_helperfuncs +ffffffff83282010 d dm_atomic_state_funcs +ffffffff83283000 d construct_integrated_info.result +ffffffff83283004 d bios_parser_get_firmware_info.result +ffffffff83284000 d dce_funcs +ffffffff83285000 d dce110_funcs +ffffffff83286000 d dce112_funcs +ffffffff83287000 d dce120_funcs +ffffffff83288000 d rv1_clk_funcs +ffffffff83288088 d rv1_clk_internal_funcs +ffffffff83289000 d rv2_clk_internal_funcs +ffffffff8328a000 d dcn2_funcs +ffffffff8328b000 D dcn201_funcs +ffffffff8328c000 d dcn21_funcs +ffffffff8328c088 d rn_bw_params +ffffffff8328d000 D dcn3_fpga_funcs +ffffffff8328d088 d dcn3_funcs +ffffffff8328e000 d vg_funcs +ffffffff8328e088 d dummy_clocks +ffffffff8328e1b8 d vg_bw_params +ffffffff8328f000 d dcn31_bw_params +ffffffff8328f2a0 d dcn31_funcs +ffffffff83290000 d dcn314_bw_params +ffffffff832902a0 d dcn314_funcs +ffffffff83291000 d dcn315_funcs +ffffffff83291088 d dcn315_bw_params +ffffffff83292000 d dcn316_funcs +ffffffff83292088 d dcn316_bw_params +ffffffff83293000 d dcn32_funcs +ffffffff83294000 d dcn10_dpp_cap +ffffffff83295000 D aperture_default_system +ffffffff83296000 d dcn20_dpp_cap +ffffffff83296010 d dcn20_dpp_funcs +ffffffff83297000 d dcn20_hubp_funcs +ffffffff83298000 d dcn20_opp_funcs +ffffffff83299000 d dcn20_tg_funcs +ffffffff8329a000 d dcn201_dpp_funcs +ffffffff8329a110 d dcn201_dpp_cap +ffffffff8329b000 d dcn201_hubp_funcs +ffffffff8329c000 d dcn201_opp_funcs +ffffffff8329d000 d dcn201_tg_funcs +ffffffff8329e000 D dcn201_ip +ffffffff8329e1b8 D dcn201_soc +ffffffff8329eb88 d dcn201_res_pool_funcs +ffffffff8329f000 d dcn21_hubp_funcs +ffffffff832a0000 d dcn30_afmt_funcs +ffffffff832a1000 d dcn30_dpp_cap +ffffffff832a1010 d dcn30_dpp_funcs +ffffffff832a2000 d dcn30_hubp_funcs +ffffffff832a3000 d dcn30_tg_funcs +ffffffff832a4000 d dcn30_vpg_funcs +ffffffff832a5000 d res_cap_dcn301 +ffffffff832a5040 d dcn301_res_pool_funcs +ffffffff832a6000 d dcn302_res_pool_funcs +ffffffff832a7000 d dcn303_res_pool_funcs +ffffffff832a8000 d dcn31_afmt_funcs +ffffffff832a9000 d dcn31_apg_funcs +ffffffff832aa000 d dcn31_hpo_dp_link_encoder_funcs +ffffffff832ab000 d dcn31_hubp_funcs +ffffffff832ac000 d dcn31_tg_funcs +ffffffff832ad000 d dcn31_res_pool_funcs +ffffffff832ae000 d dcn31_vpg_funcs +ffffffff832af000 d dcn314_tg_funcs +ffffffff832b0000 d dcn314_res_pool_funcs +ffffffff832b1000 d dcn315_res_pool_funcs +ffffffff832b2000 d dcn316_res_pool_funcs +ffffffff832b3000 d dcn32_dpp_funcs +ffffffff832b3110 d dcn32_dpp_cap +ffffffff832b4000 d dcn32_hpo_dp_link_encoder_funcs +ffffffff832b5000 d dcn32_hubp_funcs +ffffffff832b6000 d dcn32_tg_funcs +ffffffff832b7000 d dcn32_res_pool_funcs +ffffffff832b8000 d dcn321_res_pool_funcs +ffffffff832b9000 D dcn1_0_ip +ffffffff832b91b8 D dcn1_0_soc +ffffffff832ba000 D dcn2_0_ip +ffffffff832ba1b8 D dcn2_0_nv14_ip +ffffffff832ba370 D dcn2_0_soc +ffffffff832bad40 D dcn2_0_nv14_soc +ffffffff832bb710 D dcn2_1_ip +ffffffff832bb8c8 D dcn2_1_soc +ffffffff832bc298 D ddr4_wm_table_gs +ffffffff832bc358 D lpddr4_wm_table_gs +ffffffff832bc418 D lpddr4_wm_table_with_disabled_ppt +ffffffff832bc4d8 D ddr4_wm_table_rn +ffffffff832bc598 D ddr4_1R_wm_table_rn +ffffffff832bc658 D lpddr4_wm_table_rn +ffffffff832bd000 D dcn3_0_ip +ffffffff832bd1b8 D dcn3_0_soc +ffffffff832be000 D dcn3_01_ip +ffffffff832be1b8 D dcn3_01_soc +ffffffff832beb88 D ddr4_wm_table +ffffffff832bec48 D lpddr5_wm_table +ffffffff832bf000 D dcn3_02_ip +ffffffff832bf1b8 D dcn3_02_soc +ffffffff832c0000 D dcn3_03_ip +ffffffff832c01b8 D dcn3_03_soc +ffffffff832c1000 D dcn3_1_ip +ffffffff832c11b8 D dcn3_15_ip +ffffffff832c1370 D dcn3_16_ip +ffffffff832c1528 d dcn3_15_soc +ffffffff832c1ef8 d dcn3_1_soc +ffffffff832c28c8 d dcn3_16_soc +ffffffff832c4000 D dcn3_14_ip +ffffffff832c41b8 D dcn3_14_soc +ffffffff832c5000 D dcn3_2_ip +ffffffff832c51b8 D dcn3_2_soc +ffffffff832c6000 D dcn3_21_ip +ffffffff832c61b8 D dcn3_21_soc +ffffffff832c7000 d dsc_policy_max_target_bpp_limit +ffffffff832c8000 D DIDTEDCConfig_P12 +ffffffff832c8070 d smu7_profiling +ffffffff832c9000 d cyan_skillfish_message_map +ffffffff832c9a20 d cyan_skillfish_table_map +ffffffff832ca000 d navi10_table_map +ffffffff832ca080 d navi10_pwr_src_map +ffffffff832ca090 d navi10_workload_map +ffffffff832ca0d0 d navi10_message_map +ffffffff832caaf0 d navi10_clk_map +ffffffff832cabb0 d navi10_feature_mask_map +ffffffff832cb000 d sienna_cichlid_message_map +ffffffff832cba20 d sienna_cichlid_table_map +ffffffff832cbaa0 d sienna_cichlid_pwr_src_map +ffffffff832cbab0 d sienna_cichlid_workload_map +ffffffff832cbaf0 d sienna_cichlid_clk_map +ffffffff832cbbb0 d sienna_cichlid_feature_mask_map +ffffffff832cc000 d vangogh_message_map +ffffffff832cca20 d vangogh_table_map +ffffffff832ccaa0 d vangogh_workload_map +ffffffff832ccae0 d vangogh_feature_mask_map +ffffffff832cd000 d renoir_table_map +ffffffff832cd080 d renoir_workload_map +ffffffff832cd0c0 d renoir_message_map +ffffffff832cdae0 d renoir_clk_map +ffffffff832ce000 d smu_v13_0_0_feature_mask_map +ffffffff832ce3d0 d smu_v13_0_0_table_map +ffffffff832ce450 d smu_v13_0_0_pwr_src_map +ffffffff832ce460 d smu_v13_0_0_workload_map +ffffffff832ce4a0 d smu_v13_0_0_message_map +ffffffff832ceec0 d smu_v13_0_0_clk_map +ffffffff832cf000 d smu_v13_0_4_message_map +ffffffff832cfa20 d smu_v13_0_4_table_map +ffffffff832cfaa0 d smu_v13_0_4_feature_mask_map +ffffffff832d0000 d smu_v13_0_5_table_map +ffffffff832d0080 d smu_v13_0_5_message_map +ffffffff832d0aa0 d smu_v13_0_5_feature_mask_map +ffffffff832d1000 d smu_v13_0_7_feature_mask_map +ffffffff832d13d0 d smu_v13_0_7_table_map +ffffffff832d1450 d smu_v13_0_7_pwr_src_map +ffffffff832d1460 d smu_v13_0_7_workload_map +ffffffff832d14a0 d smu_v13_0_7_message_map +ffffffff832d1ec0 d smu_v13_0_7_clk_map +ffffffff832d2000 d yellow_carp_table_map +ffffffff832d2080 d yellow_carp_message_map +ffffffff832d2aa0 d yellow_carp_feature_mask_map +ffffffff832d3000 D pci_conf_lock +ffffffff832d3010 D pci_bus_dma_tag +ffffffff832d3088 D msi_pic +ffffffff832d3118 D msix_pic +ffffffff832d4000 D pchb_cd +ffffffff832d5000 D amas_cd +ffffffff832d6000 D cardslot_cd +ffffffff832d7000 D cardbus_cd +ffffffff832d8000 d csdevs +ffffffff832d9000 d ral_rt2560_opns +ffffffff832d9028 d ral_rt2661_opns +ffffffff832d9050 d ral_rt2860_opns +ffffffff832da000 D pcmcia_cd +ffffffff832db000 D pcmcia_3cxem556_func0 +ffffffff832db0b8 D pcmcia_3cxem556_func0_cfe0 +ffffffff832db158 D pcmcia_megahertz_xjem1144_func0 +ffffffff832db210 D pcmcia_megahertz_xjem1144_func0_cfe0 +ffffffff832db2b0 d pcmcia_3cxem556_func1 +ffffffff832db368 d pcmcia_3cxem556_func1_cfe0 +ffffffff832db408 d pcmcia_megahertz_xjem1144_func1 +ffffffff832db4c0 d pcmcia_megahertz_xjem1144_func1_cfe0 +ffffffff832db560 d pcmcia_sierra_a555_func1 +ffffffff832db618 d pcmcia_sierra_a555_func1_cfe0 +ffffffff832db6b8 d pcmcia_sveclancard_func0 +ffffffff832db770 d pcmcia_sveclancard_func0_cfe0 +ffffffff832dc000 D ep_pcmcia_prod +ffffffff832dd000 D aic_pcmcia_prod +ffffffff832de000 D com_pcmcia_prod +ffffffff832df000 D wdc_pcmcia_pr +ffffffff832e0000 D sm_pcmcia_prod +ffffffff832e1000 D xe_cd +ffffffff832e2000 D pcib_cd +ffffffff832e3000 D amdpcib_cd +ffffffff832e4000 D tcpcib_cd +ffffffff832e5000 D aapic_cd +ffffffff832e6000 D hme_cd +ffffffff832e7000 D isa_cd +ffffffff832e8000 D isadma_cd +ffffffff832e9000 D fdc_cd +ffffffff832ea000 D fd_types +ffffffff832ea1f8 D fd_cd +ffffffff832eb000 D mpu_cd +ffffffff832ec000 D pcppi_cd +ffffffff832ed000 D spkr_cd +ffffffff832ee000 D wbsio_cd +ffffffff832ef000 D schsio_cd +ffffffff832f0000 D it_cd +ffffffff832f1000 D uguru_cd +ffffffff832f2000 D aps_cd +ffffffff832f3000 D isa_bus_dma_tag +ffffffff832f4000 D wsdisplay_cd +ffffffff832f4020 D wsdisplay_cons +ffffffff832f4058 D wsdisplay_defaultscreens +ffffffff832f5000 D wskbd_cd +ffffffff832f5020 D wskbd_default_bell_data +ffffffff832f5030 D wskbd_default_keyrepeat_data +ffffffff832f5040 D wskbd_srcops +ffffffff832f6000 d compose_tab +ffffffff832f7000 D wsmouse_cd +ffffffff832f7020 D wsmouse_srcops +ffffffff832f8000 D wsmux_srcops +ffffffff832f8030 D wsmux_tree_lock +ffffffff832f9000 D vt100_output +ffffffff832fa000 D pckbd_cd +ffffffff832fb000 D pms_cd +ffffffff832fb020 d synaptics_params +ffffffff832fb030 d alps_params +ffffffff832fc000 D skgpio_cd +ffffffff832fd000 D pctr_conf_lock +ffffffff832fe000 D ukbd_keymapdata +ffffffff832ff000 D usbrev_str +ffffffff832ff030 D usb_cd +ffffffff83300000 d usbd_ratecheck.errinterval +ffffffff83301000 D uhub_cd +ffffffff83302000 D uaudio_cd +ffffffff83303000 D uvideo_ctrls +ffffffff833032d8 D uvideo_cd +ffffffff83304000 D utvfu_norm_params +ffffffff83304030 D utvfu_cd +ffffffff83305000 D udl_reg_vals_640x480_60 +ffffffff83305020 D udl_reg_vals_640x480_67 +ffffffff83305040 D udl_reg_vals_640x480_72 +ffffffff83305060 D udl_reg_vals_640x480_75 +ffffffff83305080 D udl_reg_vals_800x480_61 +ffffffff833050a0 D udl_reg_vals_800x600_56 +ffffffff833050c0 D udl_reg_vals_800x600_60 +ffffffff833050e0 D udl_reg_vals_800x600_72 +ffffffff83305100 D udl_reg_vals_800x600_74 +ffffffff83305120 D udl_reg_vals_800x600_75 +ffffffff83305140 D udl_reg_vals_1024x768_60 +ffffffff83305160 D udl_reg_vals_1024x768_70 +ffffffff83305180 D udl_reg_vals_1024x768_75 +ffffffff833051a0 D udl_reg_vals_1280x800_60 +ffffffff833051c0 D udl_reg_vals_1280x960_60 +ffffffff833051e0 D udl_reg_vals_1280x1024_60 +ffffffff83305200 D udl_reg_vals_1280x1024_75 +ffffffff83305220 D udl_reg_vals_1366x768_60 +ffffffff83305240 D udl_reg_vals_1440x900_60 +ffffffff83305260 D udl_reg_vals_1440x900_59 +ffffffff83305280 D udl_reg_vals_1440x900_75 +ffffffff833052a0 D udl_reg_vals_1680x1050_60 +ffffffff833052c0 D udl_reg_vals_1600x1200_60 +ffffffff833052e0 D udl_reg_vals_1920x1080_60 +ffffffff83305300 D udl_null_key_1 +ffffffff83305310 D udl_decomp_table +ffffffff83306510 D udl_cd +ffffffff83306530 D udl_stdscreen +ffffffff83306560 D udl_scrlist +ffffffff83306568 D udl_screenlist +ffffffff83306578 D udl_accessops +ffffffff83307000 D umidi_cd +ffffffff83308000 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE +ffffffff83308020 d umq_ROLAND_ROLAND_UM1_2 +ffffffff83308040 d umq_ROLAND_ROLAND_SC8850_2 +ffffffff83308060 d umq_ROLAND_ROLAND_SD90_2 +ffffffff83308080 d umq_ROLAND_ROLAND_UM880N_0 +ffffffff833080a0 d umq_ROLAND_ROLAND_UA100_2 +ffffffff833080c0 d umq_ROLAND_ROLAND_UM4_2 +ffffffff833080e0 d umq_ROLAND_ROLAND_U8_2 +ffffffff83308100 d umq_ROLAND_ROLAND_UM2_2 +ffffffff83308120 d umq_ROLAND_ROLAND_SC8820_2 +ffffffff83308140 d umq_ROLAND_ROLAND_PC300_2 +ffffffff83308160 d umq_ROLAND_ROLAND_SK500_2 +ffffffff83308180 d umq_ROLAND_ROLAND_SCD70_2 +ffffffff833081a0 d umq_ROLAND_ROLAND_UM550_0 +ffffffff833081c0 d umq_ROLAND_ROLAND_SD20_0 +ffffffff833081e0 d umq_ROLAND_ROLAND_SD80_0 +ffffffff83308200 d umq_ROLAND_ROLAND_UA700_3 +ffffffff83308220 d umq_ROLAND_ROLAND_UMONE_ANYIFACE +ffffffff83308240 D umidi_quirklist +ffffffff833084a0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_desc +ffffffff833084c0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_endpoints +ffffffff833084d0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_desc +ffffffff833084f0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_endpoints +ffffffff83308500 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_desc +ffffffff83308520 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_endpoints +ffffffff83308530 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_desc +ffffffff83308550 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_endpoints +ffffffff83308560 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_desc +ffffffff83308580 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_endpoints +ffffffff83308590 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_desc +ffffffff833085b0 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_endpoints +ffffffff833085c0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_desc +ffffffff833085e0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_endpoints +ffffffff833085f0 d umq_ROLAND_ROLAND_U8_2_fixed_ep_desc +ffffffff83308610 d umq_ROLAND_ROLAND_U8_2_fixed_ep_endpoints +ffffffff83308620 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_desc +ffffffff83308640 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_endpoints +ffffffff83308650 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_desc +ffffffff83308670 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_endpoints +ffffffff83308680 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_desc +ffffffff833086a0 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_endpoints +ffffffff833086b0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_desc +ffffffff833086d0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_endpoints +ffffffff833086e0 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_desc +ffffffff83308700 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_endpoints +ffffffff83308710 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_desc +ffffffff83308730 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_endpoints +ffffffff83308740 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_desc +ffffffff83308760 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_endpoints +ffffffff83308770 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_desc +ffffffff83308790 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_endpoints +ffffffff833087a0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_desc +ffffffff833087c0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_endpoints +ffffffff833087d0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_desc +ffffffff833087f0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_endpoints +ffffffff83309000 D ucom_cd +ffffffff8330a000 D ugen_cd +ffffffff8330b000 D uhidev_cd +ffffffff8330b020 d uhidev_use_rdesc.reportbuf +ffffffff8330c000 D uhid_cd +ffffffff8330d000 D fido_cd +ffffffff8330e000 D ujoy_cd +ffffffff8330f000 D ukbd_cd +ffffffff83310000 D ums_cd +ffffffff83310020 d ums_fix_elecom_descriptor.match +ffffffff83311000 D umt_cd +ffffffff83312000 D def_scale +ffffffff83312020 D uts_cd +ffffffff83313000 D ubcmtp_cd +ffffffff83314000 D ucycom_cd +ffffffff83315000 D uslhcom_cd +ffffffff83316000 D ulpt_fwdevs +ffffffff83316060 D ulpt_cd +ffffffff83316080 D ulptusein +ffffffff83317000 D umass_cd +ffffffff83317020 d umass_bbb_transfer.dCBWtag +ffffffff83318000 D uthum_cd +ffffffff83319000 D ugold_cd +ffffffff83319020 d cmd_init +ffffffff83319028 d cmd_type +ffffffff83319030 d cmd_data +ffffffff8331a000 D utrh_cd +ffffffff8331b000 D uoakrh_cd +ffffffff8331c000 D uoaklux_cd +ffffffff8331d000 D uoakv_cd +ffffffff8331e000 D uonerng_cd +ffffffff8331f000 D urng_cd +ffffffff83320000 D udcf_cd +ffffffff83321000 D umbg_cd +ffffffff83322000 D uvisor_cd +ffffffff83323000 D udsbr_cd +ffffffff83324000 D utwitch_cd +ffffffff83325000 D aue_cd +ffffffff83326000 D axe_cd +ffffffff83327000 D axen_cd +ffffffff83328000 D smsc_cd +ffffffff83329000 D cue_devs +ffffffff83329010 D cue_cd +ffffffff8332a000 D kue_cd +ffffffff8332b000 D cdce_cd +ffffffff8332c000 D urndis_cd +ffffffff8332d000 D mos_cd +ffffffff8332e000 D mue_cd +ffffffff8332f000 D udav_cd +ffffffff83330000 D upl_devs +ffffffff83330008 D upl_cd +ffffffff83331000 D ugl_devs +ffffffff83331008 D ugl_cd +ffffffff83332000 D url_cd +ffffffff83333000 D ure_cd +ffffffff83334000 D uaq_cd +ffffffff83335000 D umodem_cd +ffffffff83336000 D uftdi_cd +ffffffff83337000 D uplcom_cd +ffffffff83338000 D umct_cd +ffffffff83339000 D uvscom_cd +ffffffff8333a000 D ubsa_cd +ffffffff8333b000 D ukspan_cd +ffffffff8333c000 D uslcom_cd +ffffffff8333d000 D uark_cd +ffffffff8333e000 D moscom_cd +ffffffff8333f000 D umcs_cd +ffffffff83340000 D uscom_cd +ffffffff83341000 D ucrcom_cd +ffffffff83342000 D uxrcom_cd +ffffffff83343000 D uipaq_cd +ffffffff83344000 D umsm_cd +ffffffff83345000 D uchcom_cd +ffffffff83346000 D uticom_cd +ffffffff83347000 D wi_func_usb +ffffffff83347060 D wi_usb_cd +ffffffff83348000 D atu_cd +ffffffff83348020 D atu_devs +ffffffff83348270 D atu_radfirm +ffffffff83349000 D ural_cd +ffffffff8334a000 D rum_cd +ffffffff8334b000 D run_cd +ffffffff8334b020 D rt3070_freqs +ffffffff8334c000 D mtw_cd +ffffffff8334d000 D zyd_cd +ffffffff8334e000 D upgt_cd +ffffffff8334f000 D urtw_cd +ffffffff83350000 D urtwn_cd +ffffffff83351000 D rsu_cd +ffffffff83352000 D otus_cd +ffffffff83352020 d AR_PLCP_HDR_INTR +ffffffff83353000 D umb_xfer_tout +ffffffff83353010 D umb_uuid_basic_connect +ffffffff83353020 D umb_uuid_context_internet +ffffffff83353030 D umb_uuid_qmi_mbim +ffffffff83353040 D umb_cd +ffffffff83353060 D umb_delay +ffffffff83353070 D umb_qmi_alloc_cid +ffffffff83353080 D umb_qmi_fcc_auth +ffffffff83354000 D uath_cd +ffffffff83355000 D uow_cd +ffffffff83356000 D uberry_cd +ffffffff83357000 D upd_cd +ffffffff83357020 d upd_usage_roots +ffffffff833570a0 d upd_usage_batdep +ffffffff83358000 D uwacom_cd +ffffffff83358020 d uwacom_attach.reportbuf +ffffffff83359000 D bwfm_usb_bus_ops +ffffffff8335a000 D umstc_cd +ffffffff8335b000 D uhidpp_cd +ffffffff8335c000 D ucc_cd +ffffffff8335d000 D iic_cd +ffffffff8335e000 D probe_addrs_sensor +ffffffff8335e008 D probe_addrs_eeprom +ffffffff8335f000 D lmtemp_cd +ffffffff83360000 D lmn_worklist +ffffffff83360240 D lmn_cd +ffffffff83361000 D lmenv_cd +ffffffff83362000 D maxtmp_cd +ffffffff83363000 D adc_cd +ffffffff83364000 D admtemp_cd +ffffffff83365000 D admlc_cd +ffffffff83366000 D admtm_cd +ffffffff83367000 D admtmp_cd +ffffffff83368000 D admtt_cd +ffffffff83369000 D maxds_cd +ffffffff8336a000 D adt_chips +ffffffff8336a160 D worklist +ffffffff8336a1a0 D adt_cd +ffffffff8336b000 D admcts_cd +ffffffff8336c000 D wbng_cd +ffffffff8336d000 D nvt_cd +ffffffff8336e000 D adl_worklist +ffffffff8336e138 D adl_cd +ffffffff8336f000 D andl_cd +ffffffff83370000 D sdtemp_cd +ffffffff83371000 D lisa_cd +ffffffff83372000 D ihidev_cd +ffffffff83373000 D ikbd_cd +ffffffff83374000 D ims_cd +ffffffff83375000 D imt_cd +ffffffff83376000 D iatp_cd +ffffffff83377000 D bgw_cd +ffffffff83378000 D icc_cd +ffffffff83379000 D gpio_cd +ffffffff8337a000 D acpi_cd +ffffffff8337a020 D acpi_pcidevs +ffffffff8337a030 D acpi_pcirootdevs +ffffffff8337a040 D acpi_taskq +ffffffff8337a050 d acpi_indicator.save_led_state +ffffffff8337a060 d acpi_getprop.prop_guid +ffffffff8337a070 d acpi_getpropint.prop_guid +ffffffff8337a080 D acpi_skip_hids +ffffffff8337a0f0 D acpi_isa_hids +ffffffff8337b000 D aml_intlen +ffffffff8337b010 D aml_table +ffffffff8337baf0 d osstring +ffffffff8337bb10 D aml_defobj +ffffffff8337bca0 D aml_valid_osi +ffffffff8337bd68 D acpi_max_osi +ffffffff8337bd70 D aml_regionspace +ffffffff8337d000 D acpitimer_cd +ffffffff8337d020 d acpi_timecounter +ffffffff8337e000 D acpiac_cd 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acpiasus_hids +ffffffff8338e000 D acpithinkpad_cd +ffffffff8338e020 D acpithinkpad_hids +ffffffff8338f000 D acpitoshiba_cd +ffffffff8338f020 D acpitoshiba_hids +ffffffff83390000 D acpisony_cd +ffffffff83391000 D acpivideo_cd +ffffffff83392000 D acpivout_cd +ffffffff83393000 D acpipwrres_cd +ffffffff83394000 D aibs_cd +ffffffff83394020 d aibs_hids +ffffffff83395000 D aplgpio_cd +ffffffff83395020 D aplgpio_hids +ffffffff83396000 D bytgpio_cd +ffffffff83396020 D bytgpio_hids +ffffffff83397000 D chvgpio_cd +ffffffff83397020 D chvgpio_hids +ffffffff83398000 D glkgpio_cd +ffffffff83398020 D glkgpio_hids +ffffffff83399000 D pchgpio_cd +ffffffff83399020 D pchgpio_hids +ffffffff83399070 D pchgpio_devices +ffffffff8339a000 D tipmic_cd +ffffffff8339a020 D tipmic_thermal_regmap +ffffffff8339a030 D tipmic_power_regmap +ffffffff8339b000 D ccpmic_cd +ffffffff8339b020 D ccpmic_thermal_regmap +ffffffff8339b023 D ccpmic_power_regmap +ffffffff8339c000 D com_hids +ffffffff8339d000 D sdhc_hids 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