--- 7.2/2023-02-03T19:52:06Z/2023-01-04T00:00:00Z/nm-bsd-ot14.txt Sat Feb 4 10:44:24 2023 +++ 7.2/2023-02-03T19:52:06Z/2023-01-05T00:00:00Z/nm-bsd-ot14.txt Sat Feb 4 13:13:06 2023 @@ -2,14 +2,14 @@ 00011006 A mp_pdirpa 0001419d A acpi_pdirpa 01000000 A __kernel_phys_base -02515000 T __kernel_kutext_phys -02519000 C __kernel_cptext_phys -0251a000 C __kernel_rodata_phys -02dca000 R __kernel_kutext_page_phys -02dcc000 C __kernel_randomdata_phys -0308e000 R __kernel_data_phys -033bd000 D __kernel_kudata_phys -033be000 C __kernel_bss_phys +02513000 T __kernel_kutext_phys +02517000 C __kernel_cptext_phys +02518000 C __kernel_rodata_phys +02dc8000 R __kernel_kutext_page_phys +02dca000 C __kernel_randomdata_phys +0308c000 R __kernel_data_phys +033bb000 D __kernel_kudata_phys +033bc000 C __kernel_bss_phys 03800000 B __kernel_phys_end 80000000 A __kernel_virt_to_phys ffffffff80000000 A __kernel_base @@ -4261,24896 +4261,24904 @@ ffffffff811f9960 T pf_src_tree_RB_NFIND ffffffff811f9a30 T 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ieee80211_find_rxnode -ffffffff81405ce0 T ieee80211_node_tx_ba_clear -ffffffff81405d50 T ieee80211_release_node -ffffffff81405de0 T ieee80211_clean_cached -ffffffff81405e70 T ieee80211_node_leave -ffffffff814060d0 T ieee80211_setup_htcaps -ffffffff81406170 T ieee80211_clear_htcaps -ffffffff814061f0 T ieee80211_setup_htop -ffffffff81406270 T ieee80211_setup_vhtcaps -ffffffff814062f0 T ieee80211_setup_vhtop -ffffffff81406350 T ieee80211_clear_vhtcaps -ffffffff81406390 T ieee80211_setup_rates -ffffffff81406450 T ieee80211_node_trigger_addba_req -ffffffff814064b0 T ieee80211_node_addba_request -ffffffff814064e0 T ieee80211_iserp_sta -ffffffff81406690 T ieee80211_needs_auth -ffffffff814066c0 T ieee80211_node_join_ht -ffffffff81406710 T ieee80211_node_join_rsn -ffffffff81406820 T ieee80211_count_longslotsta -ffffffff81406860 T ieee80211_count_nonerpsta -ffffffff814068b0 T ieee80211_count_pssta -ffffffff81406900 T ieee80211_count_rekeysta -ffffffff81406950 T ieee80211_node_join_11g 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T ieee80211_add_rates -ffffffff81408ec0 T ieee80211_add_ds_params -ffffffff81408f10 T ieee80211_add_tim -ffffffff81409060 T ieee80211_add_ibss_params -ffffffff81409090 T ieee80211_add_edca_params -ffffffff81409210 T ieee80211_add_erp -ffffffff814092b0 T ieee80211_add_qos_capability -ffffffff814092e0 T ieee80211_add_wme_info -ffffffff81409320 T ieee80211_add_wme_param -ffffffff814094b0 T ieee80211_add_rsn_body -ffffffff81409790 T ieee80211_add_rsn -ffffffff814097f0 T ieee80211_add_wpa -ffffffff81409850 T ieee80211_add_xrates -ffffffff814098d0 T ieee80211_add_htcaps -ffffffff814099a0 T ieee80211_add_htop -ffffffff81409a70 T ieee80211_add_vhtcaps -ffffffff81409b10 T ieee80211_add_tie -ffffffff81409b60 T ieee80211_getmgmt -ffffffff81409c20 T ieee80211_get_probe_req -ffffffff81409fd0 T ieee80211_get_probe_resp -ffffffff8140a530 T ieee80211_get_auth -ffffffff8140a5c0 T ieee80211_get_deauth -ffffffff8140a640 T ieee80211_get_assoc_req -ffffffff8140ab30 T ieee80211_get_assoc_resp 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T ieee80211_ra_node_init -ffffffff81416000 T ieee80211_ra_vht_get_rateset -ffffffff814160a0 T ieee80211_ra_vht_use_sgi -ffffffff814161b0 T ieee80211_ra_vht_get_txrate -ffffffff81416250 T ieee80211_ra_vht_next_lower_intra_rate -ffffffff81416290 T ieee80211_ra_vht_get_max_mcs -ffffffff81416310 T ieee80211_ra_vht_next_intra_rate -ffffffff81416400 T ieee80211_ra_vht_next_rateset -ffffffff81416550 T ieee80211_ra_vht_best_mcs_in_rateset -ffffffff814165f0 T ieee80211_ra_vht_probe_next_rateset -ffffffff814168d0 T ieee80211_ra_vht_next_mcs -ffffffff81416950 T ieee80211_ra_vht_probe_clear -ffffffff81416980 T ieee80211_ra_vht_probe_done -ffffffff814169d0 T ieee80211_ra_vht_intra_mode_ra_finished -ffffffff81416d90 T ieee80211_ra_vht_trigger_next_rateset -ffffffff81416df0 T ieee80211_ra_vht_inter_mode_ra_finished -ffffffff81416e20 T ieee80211_ra_vht_best_rate -ffffffff814170e0 T ieee80211_ra_vht_probe_next_rate -ffffffff81417190 T ieee80211_ra_vht_init_valid_rates -ffffffff81417390 T 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drm_vblank_work_cancel_sync -ffffffff8196a6d0 T drm_vblank_work_flush -ffffffff8196a7a0 T drm_vblank_work_init -ffffffff8196a810 T drm_vblank_worker_init -ffffffff8196b000 T drm_vma_offset_manager_init -ffffffff8196b040 T drm_vma_offset_manager_destroy -ffffffff8196b050 T drm_vma_offset_lookup_locked -ffffffff8196b0e0 T drm_vma_offset_add -ffffffff8196b170 T drm_vma_offset_remove -ffffffff8196b1c0 T drm_vma_node_allow -ffffffff8196b2f0 T drm_vma_node_revoke -ffffffff8196b370 T drm_vma_node_is_allowed -ffffffff8196c000 T hdmi_avi_infoframe_init -ffffffff8196c070 T hdmi_avi_infoframe_check -ffffffff8196c0c0 T hdmi_avi_infoframe_pack_only -ffffffff8196c2c0 T hdmi_avi_infoframe_pack -ffffffff8196c320 T hdmi_spd_infoframe_init -ffffffff8196c3d0 T hdmi_spd_infoframe_check -ffffffff8196c420 T hdmi_spd_infoframe_pack_only -ffffffff8196c550 T hdmi_spd_infoframe_pack -ffffffff8196c6a0 T hdmi_audio_infoframe_init -ffffffff8196c6f0 T hdmi_audio_infoframe_check -ffffffff8196c740 T hdmi_audio_infoframe_pack_only -ffffffff8196c890 T hdmi_audio_infoframe_pack -ffffffff8196c8e0 T hdmi_audio_infoframe_pack_for_dp -ffffffff8196c9d0 T hdmi_vendor_infoframe_init -ffffffff8196ca30 T hdmi_vendor_infoframe_check -ffffffff8196cad0 T hdmi_vendor_infoframe_pack_only -ffffffff8196cca0 T hdmi_vendor_infoframe_pack -ffffffff8196cd40 T hdmi_drm_infoframe_init -ffffffff8196cda0 T hdmi_drm_infoframe_check -ffffffff8196cdf0 T hdmi_drm_infoframe_pack_only -ffffffff8196cfc0 T hdmi_drm_infoframe_pack -ffffffff8196d010 T hdmi_infoframe_check -ffffffff8196d160 T hdmi_infoframe_pack_only -ffffffff8196d370 T hdmi_infoframe_pack -ffffffff8196d4e0 T hdmi_infoframe_log -ffffffff8196e480 T hdmi_drm_infoframe_unpack_only -ffffffff8196e560 T hdmi_infoframe_unpack -ffffffff8196f000 T list_sort -ffffffff81970000 T radix_tree_lookup -ffffffff819700b0 T radix_tree_iter_find -ffffffff81970190 T radix_tree_delete -ffffffff81970320 T radix_tree_iter_delete -ffffffff81970340 T radix_tree_insert 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drm_dp_128b132b_link_training_failed -ffffffff81974340 T drm_dp_read_clock_recovery_delay -ffffffff81974440 T drm_dp_read_channel_eq_delay -ffffffff81974530 T drm_dp_128b132b_read_aux_rd_interval -ffffffff819745e0 T drm_dp_link_train_clock_recovery_delay -ffffffff81974660 t __8b10b_clock_recovery_delay_us -ffffffff819746e0 T drm_dp_link_train_channel_eq_delay -ffffffff81974750 T drm_dp_phy_name -ffffffff81974790 T drm_dp_lttpr_link_train_clock_recovery_delay -ffffffff819747b0 T drm_dp_lttpr_link_train_channel_eq_delay -ffffffff81974820 T drm_dp_link_rate_to_bw_code -ffffffff81974880 T drm_dp_bw_code_to_link_rate -ffffffff819748e0 T drm_dp_dpcd_probe -ffffffff81974a20 t drm_dp_dpcd_access -ffffffff81974b50 T drm_dp_dpcd_read -ffffffff81974c80 T drm_dp_dpcd_write -ffffffff81974d90 T drm_dp_dpcd_read_link_status -ffffffff81974db0 T drm_dp_dpcd_read_phy_link_status -ffffffff81974eb0 T drm_dp_downstream_is_type -ffffffff81974ef0 T drm_dp_downstream_is_tmds -ffffffff81974f60 T drm_dp_send_real_edid_checksum -ffffffff819751c0 T drm_dp_read_dpcd_caps -ffffffff81975350 T drm_dp_read_downstream_info -ffffffff81975450 T drm_dp_downstream_max_dotclock -ffffffff819754a0 T drm_dp_downstream_max_tmds_clock -ffffffff81975540 T drm_dp_downstream_min_tmds_clock -ffffffff819755c0 T drm_dp_downstream_max_bpc -ffffffff81975660 T drm_dp_downstream_420_passthrough -ffffffff819756c0 T drm_dp_downstream_444_to_420_conversion -ffffffff81975720 T drm_dp_downstream_rgb_to_ycbcr_conversion -ffffffff81975780 T drm_dp_downstream_mode -ffffffff81975800 T drm_dp_downstream_id -ffffffff81975820 T drm_dp_downstream_debug -ffffffff819758c0 T drm_dp_subconnector_type -ffffffff81975920 T drm_dp_set_subconnector_property -ffffffff81975990 T drm_dp_read_sink_count_cap -ffffffff819759e0 T drm_dp_read_sink_count -ffffffff81975a40 T drm_dp_remote_aux_init -ffffffff81975a70 t drm_dp_aux_crc_work -ffffffff81975be0 T drm_dp_aux_init -ffffffff81975c90 T drm_dp_aux_register -ffffffff81975db0 T drm_dp_aux_unregister -ffffffff81975de0 T drm_dp_psr_setup_time -ffffffff81975e20 T drm_dp_start_crc -ffffffff81975ec0 T drm_dp_stop_crc -ffffffff81975f50 T drm_dp_read_desc -ffffffff81976110 T drm_dp_dsc_sink_max_slice_count -ffffffff819761a0 T drm_dp_dsc_sink_line_buf_depth -ffffffff819761e0 T drm_dp_dsc_sink_supported_input_bpcs -ffffffff81976240 T drm_dp_read_lttpr_common_caps -ffffffff81976300 T drm_dp_read_lttpr_phy_caps -ffffffff819763c0 T drm_dp_lttpr_count -ffffffff81976440 T drm_dp_lttpr_max_link_rate -ffffffff81976490 T drm_dp_lttpr_max_lane_count -ffffffff819764c0 T drm_dp_lttpr_voltage_swing_level_3_supported -ffffffff819764f0 T drm_dp_lttpr_pre_emphasis_level_3_supported -ffffffff81976520 T drm_dp_get_phy_test_pattern -ffffffff81976640 T drm_dp_set_phy_test_pattern -ffffffff81976710 T drm_dp_vsc_sdp_log -ffffffff81976a40 T drm_dp_get_pcon_max_frl_bw -ffffffff81976a80 T drm_dp_pcon_frl_prepare -ffffffff81976ad0 T drm_dp_pcon_is_frl_ready -ffffffff81976b20 T drm_dp_pcon_frl_configure_1 -ffffffff81976c10 T drm_dp_pcon_frl_configure_2 -ffffffff81976c70 T drm_dp_pcon_reset_frl_config -ffffffff81976cc0 T drm_dp_pcon_frl_enable -ffffffff81976d70 T drm_dp_pcon_hdmi_link_active -ffffffff81976dc0 T drm_dp_pcon_hdmi_link_mode -ffffffff81976e30 T drm_dp_pcon_hdmi_frl_link_error_count -ffffffff81976f30 T drm_dp_pcon_enc_is_dsc_1_2 -ffffffff81976f60 T drm_dp_pcon_dsc_max_slices -ffffffff81976ff0 T drm_dp_pcon_dsc_max_slice_width -ffffffff81977020 T drm_dp_pcon_dsc_bpp_incr -ffffffff81977060 T drm_dp_pcon_pps_default -ffffffff819770e0 T drm_dp_pcon_pps_override_buf -ffffffff81977190 T drm_dp_pcon_pps_override_param -ffffffff81977270 T drm_dp_pcon_convert_rgb_to_ycbcr -ffffffff81977300 T drm_edp_backlight_set_level -ffffffff819773e0 T drm_edp_backlight_enable -ffffffff819775f0 t drm_edp_backlight_set_enable -ffffffff81977730 T drm_edp_backlight_disable -ffffffff81977770 T drm_edp_backlight_init -ffffffff81977cc0 T drm_panel_dp_aux_backlight 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drm_dp_send_power_updown_phy -ffffffff8197a710 t drm_dp_mst_topology_put_port -ffffffff8197a840 t drm_dp_mst_wait_tx_reply -ffffffff8197ab90 T drm_dp_send_query_stream_enc_status -ffffffff8197ae50 T drm_dp_add_payload_part1 -ffffffff8197afd0 T drm_dp_remove_payload -ffffffff8197b130 T drm_dp_add_payload_part2 -ffffffff8197b2e0 T drm_dp_get_vc_payload_bw -ffffffff8197b370 T drm_dp_read_mst_cap -ffffffff8197b3d0 T drm_dp_mst_topology_mgr_set_mst -ffffffff8197b660 t drm_dp_dpcd_write_payload -ffffffff8197b7f0 t drm_dp_mst_topology_put_mstb -ffffffff8197b8f0 T drm_dp_mst_topology_mgr_suspend -ffffffff8197b9b0 t drm_dp_mst_topology_mgr_invalidate_mstb -ffffffff8197ba20 T drm_dp_mst_topology_mgr_resume -ffffffff8197bc60 T drm_dp_mst_hpd_irq -ffffffff8197cae0 T drm_dp_mst_detect_port -ffffffff8197cc50 T drm_dp_mst_get_edid -ffffffff8197cd50 T drm_dp_atomic_find_time_slots -ffffffff8197d020 T drm_atomic_get_mst_topology_state -ffffffff8197d030 T drm_dp_atomic_release_time_slots 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drm_dp_mst_up_req_work -ffffffff8197f740 T drm_dp_mst_topology_mgr_destroy -ffffffff8197f7c0 t drm_dp_mst_is_virtual_dpcd -ffffffff8197f8a0 t drm_dp_free_mst_branch_device -ffffffff8197f8e0 t drm_dp_mst_topology_get_port_validated_locked -ffffffff8197f960 t drm_dp_mst_dump_sideband_msg_tx -ffffffff8197fb70 t process_single_down_tx_qlock -ffffffff8197fce0 t process_single_tx_qlock -ffffffff819801c0 t drm_dp_msg_data_crc4 -ffffffff819802e0 t drm_dp_payload_send_msg -ffffffff81980730 t drm_dp_mst_topology_get_mstb_validated_locked -ffffffff819807b0 t drm_dp_get_one_sb_msg -ffffffff81980ed0 t drm_dp_get_mst_branch_device -ffffffff81981040 t drm_dp_check_and_send_link_address -ffffffff81981110 t drm_dp_send_link_address -ffffffff81981dc0 t drm_dp_send_enum_path_resources -ffffffff81982020 t drm_dp_port_set_pdt -ffffffff81982300 t drm_dp_mst_port_add_connector -ffffffff819824e0 t drm_dp_mst_i2c_xfer -ffffffff81982bd0 t drm_dp_mst_i2c_functionality -ffffffff81982c00 t get_mst_branch_device_by_guid_helper -ffffffff81983000 T drm_dsc_dp_pps_header_init -ffffffff81983030 T drm_dsc_dp_rc_buffer_size -ffffffff81983090 T drm_dsc_pps_payload_pack -ffffffff81983320 T drm_dsc_compute_rc_parameters -ffffffff81984000 T drm_connector_attach_content_protection_property -ffffffff81984030 T drm_hdcp_check_ksvs_revoked -ffffffff81984080 T drm_hdcp_update_content_protection -ffffffff81985000 T drm_hdmi_infoframe_set_hdr_metadata -ffffffff81985120 T drm_hdmi_avi_infoframe_colorimetry -ffffffff81985170 T drm_hdmi_avi_infoframe_bars -ffffffff819851c0 T drm_hdmi_avi_infoframe_content_type -ffffffff81986000 T drm_scdc_read -ffffffff81986090 T drm_scdc_write -ffffffff81986170 T drm_scdc_get_scrambling_status -ffffffff81986220 T drm_scdc_set_scrambling -ffffffff81986370 T drm_scdc_set_high_tmds_clock_ratio -ffffffff81987000 T drm_gem_ttm_mmap -ffffffff81987070 T drm_gem_ttm_vmap -ffffffff819870c0 T drm_gem_ttm_vunmap -ffffffff81988000 T ttm_agp_bind -ffffffff81988050 T ttm_agp_unbind -ffffffff81988070 T ttm_agp_is_bound -ffffffff819880c0 T ttm_agp_destroy -ffffffff819880e0 T ttm_agp_tt_create -ffffffff81989000 T ttm_bo_move_to_lru_tail -ffffffff81989040 T ttm_bo_set_bulk_move -ffffffff81989100 T ttm_bo_delayed_delete -ffffffff819893f0 t ttm_bo_cleanup_refs -ffffffff819897a0 T ttm_bo_put -ffffffff81989ce0 T ttm_bo_lock_delayed_workqueue -ffffffff81989d60 T ttm_bo_unlock_delayed_workqueue -ffffffff81989dd0 T ttm_bo_eviction_valuable -ffffffff81989e20 T ttm_mem_evict_first -ffffffff8198a6e0 T ttm_bo_pin -ffffffff8198a780 T ttm_bo_unpin -ffffffff8198a890 T ttm_bo_mem_space -ffffffff8198aae0 t ttm_bo_add_move_fence -ffffffff8198aba0 T ttm_bo_validate -ffffffff8198ad20 T ttm_bo_init_reserved -ffffffff8198afc0 T ttm_bo_init_validate -ffffffff8198b130 T ttm_bo_unmap_virtual -ffffffff8198b240 T ttm_bo_wait -ffffffff8198b2c0 T ttm_bo_swapout -ffffffff8198b6d0 t ttm_bo_handle_move_mem -ffffffff8198b840 T ttm_bo_tt_destroy -ffffffff8198c000 T ttm_mem_io_reserve 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ttm_lru_bulk_move_tail -ffffffff819951e0 T ttm_resource_add_bulk_move -ffffffff819952a0 T ttm_resource_del_bulk_move -ffffffff81995390 T ttm_resource_move_to_lru_tail -ffffffff819954e0 T ttm_resource_init -ffffffff819955e0 T ttm_resource_fini -ffffffff81995650 T ttm_resource_alloc -ffffffff81995790 T ttm_resource_free -ffffffff81995900 T ttm_resource_intersects -ffffffff81995950 T ttm_resource_compatible -ffffffff819959a0 T ttm_resource_compat -ffffffff81995b30 T ttm_resource_set_bo -ffffffff81995b80 T ttm_resource_manager_init -ffffffff81995c20 T ttm_resource_manager_evict_all -ffffffff81995de0 T ttm_resource_manager_usage -ffffffff81995e40 T ttm_resource_manager_debug -ffffffff81995f20 T ttm_resource_manager_first -ffffffff81995fb0 T ttm_resource_manager_next -ffffffff819960f0 T ttm_kmap_iter_iomap_init -ffffffff81996150 T ttm_kmap_iter_linear_io_init -ffffffff81996320 T ttm_kmap_iter_linear_io_fini -ffffffff81996370 T ttm_resource_manager_create_debugfs -ffffffff819963a0 t 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gfx_v8_0_wait_for_rlc_serdes -ffffffff81de0bd0 t gfx_v8_0_sq_irq_work_func -ffffffff81de0bf0 t amdgpu_bo_unreserve -ffffffff81de0cd0 t gfx_v8_0_kiq_resume -ffffffff81de0f30 t gfx_v8_0_cp_gfx_resume -ffffffff81de1a50 t gfx_v8_0_kcq_resume -ffffffff81de2480 t amdgpu_bo_reserve -ffffffff81de2600 t gfx_v8_0_mqd_commit -ffffffff81de27e0 t gfx_v8_0_mqd_init -ffffffff81de2c00 t gfx_v8_0_deactivate_hqd -ffffffff81de2cc0 t gfx_v8_0_update_medium_grain_clock_gating -ffffffff81de2ff0 t gfx_v8_0_update_coarse_grain_clock_gating -ffffffff81de4000 t gfx_v9_0_ras_error_inject -ffffffff81de41a0 t gfx_v9_0_query_ras_error_count -ffffffff81de4d40 t gfx_v9_0_reset_ras_error_count -ffffffff81de5780 T gfx_v9_0_select_se_sh -ffffffff81de5820 t gfx_v9_0_early_init -ffffffff81de5c70 t gfx_v9_0_late_init -ffffffff81de6980 t gfx_v9_0_sw_init -ffffffff81de7fe0 t gfx_v9_0_sw_fini -ffffffff81de8280 t gfx_v9_0_hw_init -ffffffff81deb310 t gfx_v9_0_hw_fini -ffffffff81deba70 t gfx_v9_0_suspend -ffffffff81debab0 t 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mpw_set_route +ffffffff813d31a0 t mpw_set_neighbor +ffffffff813d4000 T mpip_clone_create +ffffffff813d41b0 T mpip_clone_destroy +ffffffff813d42b0 T mpipattach +ffffffff813d42d0 T mpip_ioctl +ffffffff813d49a0 T mpip_output +ffffffff813d4d70 T mpip_start +ffffffff813d6000 T bpeattach +ffffffff813d6020 T bpe_input +ffffffff813d61b0 t bpe_tree_RBT_COMPARE +ffffffff813d6200 t bpe_clone_create +ffffffff813d63c0 t bpe_clone_destroy +ffffffff813d6460 t bpe_link_hook +ffffffff813d64f0 t bpe_detach_hook +ffffffff813d6540 t bpe_ioctl +ffffffff813d6e20 t bpe_start +ffffffff813d7060 t bpe_eb_port_eq +ffffffff813d70b0 t bpe_eb_port_take +ffffffff813d7110 t bpe_eb_port_rele +ffffffff813d7130 t bpe_eb_port_ifname +ffffffff813d7150 t bpe_eb_port_sa +ffffffff813d71a0 t bpe_down +ffffffff813d8000 T vether_clone_create +ffffffff813d8120 T vether_clone_destroy +ffffffff813d8190 T vether_media_change +ffffffff813d81c0 T vether_media_status +ffffffff813d8200 T vetherattach +ffffffff813d8220 T vetherioctl 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pppx_if_qstart +ffffffff813db280 T pppx_if_output +ffffffff813db4a0 T pppx_if_ioctl +ffffffff813db540 T pppacattach +ffffffff813db550 T pppacopen +ffffffff813db760 t pppac_output +ffffffff813db7d0 t pppac_qstart +ffffffff813dba00 t pppac_ioctl +ffffffff813dbaa0 T pppacread +ffffffff813dbbf0 T pppacwrite +ffffffff813dbe10 T pppacioctl +ffffffff813dbfa0 T pppackqfilter +ffffffff813dc070 T pppacclose +ffffffff813dc1c0 t pppx_ifs_RBT_COMPARE +ffffffff813dc1e0 t filt_pppac_rdetach +ffffffff813dc230 t filt_pppac_read +ffffffff813dc280 t filt_pppac_wdetach +ffffffff813dc2d0 t filt_pppac_write +ffffffff813dd000 T vxlanattach +ffffffff813dd020 t vxlan_clone_create +ffffffff813dd200 t vxlan_clone_destroy +ffffffff813dd2b0 t vxlan_detach_hook +ffffffff813dd310 t vxlan_send +ffffffff813dd680 t vxlan_ioctl +ffffffff813de870 t vxlan_output +ffffffff813de910 t vxlan_enqueue +ffffffff813de980 t vxlan_start +ffffffff813de9a0 t vxlan_eb_port_eq +ffffffff813de9f0 t vxlan_eb_port_take +ffffffff813dea50 t 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T ieee80211_media2mcs +ffffffff813ee0c0 T ieee80211_media2rate +ffffffff813ee110 T ieee80211_mcs2media +ffffffff813ee190 T ieee80211_watchdog +ffffffff813ee2b0 T ieee80211_min_basic_rate +ffffffff813ee3a0 T ieee80211_max_basic_rate +ffffffff813ee460 T ieee80211_next_mode +ffffffff813ee560 T ieee80211_chan2mode +ffffffff813ee5f0 T ieee80211_rate2plcp +ffffffff813ee6e0 T ieee80211_plcp2rate +ffffffff813ef000 T ieee80211_amrr_node_init +ffffffff813ef040 T ieee80211_amrr_choose +ffffffff813f0000 T ieee80211_crypto_attach +ffffffff813f0090 T ieee80211_set_key +ffffffff813f0130 T ieee80211_delete_key +ffffffff813f01a0 T ieee80211_crypto_detach +ffffffff813f0260 T ieee80211_crypto_clear_groupkeys +ffffffff813f03a0 T ieee80211_cipher_keylen +ffffffff813f0400 T ieee80211_get_txkey +ffffffff813f0480 T ieee80211_get_rxkey +ffffffff813f0550 T ieee80211_encrypt +ffffffff813f05d0 T ieee80211_decrypt +ffffffff813f0740 T ieee80211_prf +ffffffff813f0860 T ieee80211_kdf +ffffffff813f09c0 T ieee80211_derive_ptk +ffffffff813f0b30 T ieee80211_derive_pmkid +ffffffff813f0c50 T ieee80211_eapol_key_mic +ffffffff813f0d80 T ieee80211_eapol_key_check_mic +ffffffff813f0e00 T ieee80211_eapol_key_encrypt +ffffffff813f0fb0 T ieee80211_eapol_key_decrypt +ffffffff813f10c0 T ieee80211_pmksa_add +ffffffff813f1200 T ieee80211_pmksa_find +ffffffff813f2000 T ieee80211_bip_set_key +ffffffff813f2080 T ieee80211_bip_delete_key +ffffffff813f20f0 T ieee80211_bip_encap +ffffffff813f22f0 T ieee80211_bip_decap +ffffffff813f3000 T ieee80211_ccmp_set_key +ffffffff813f3080 T ieee80211_ccmp_delete_key +ffffffff813f30f0 T ieee80211_ccmp_encrypt +ffffffff813f35b0 t ieee80211_ccmp_phase1 +ffffffff813f3940 T ieee80211_ccmp_get_pn +ffffffff813f3a50 T ieee80211_ccmp_decrypt +ffffffff813f4000 T ieee80211_tkip_set_key +ffffffff813f40a0 T ieee80211_tkip_delete_key +ffffffff813f4110 T ieee80211_tkip_mic +ffffffff813f4290 T ieee80211_tkip_encrypt +ffffffff813f46d0 t Phase1 +ffffffff813f4860 t Phase2 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T ieee80211_ess_is_better +ffffffff814001f0 T ieee80211_match_ess +ffffffff814002e0 T ieee80211_switch_ess +ffffffff81400550 T ieee80211_set_ess +ffffffff81400820 T ieee80211_deselect_ess +ffffffff81400880 T ieee80211_node_attach +ffffffff81400a50 T ieee80211_node_alloc +ffffffff81400a70 T ieee80211_node_free +ffffffff81400b10 T ieee80211_node_copy +ffffffff81400cc0 T ieee80211_node_getrssi +ffffffff81400cf0 T ieee80211_node_checkrssi +ffffffff81400d70 T ieee80211_set_tim +ffffffff81400de0 T ieee80211_alloc_node_helper +ffffffff81400e50 T ieee80211_node_lateattach +ffffffff81400f00 T ieee80211_node_detach +ffffffff81401070 T ieee80211_free_allnodes +ffffffff81401190 T ieee80211_reset_scan +ffffffff81401210 T ieee80211_node_raise_inact +ffffffff81401250 T ieee80211_begin_scan +ffffffff81401400 T ieee80211_node_cleanup +ffffffff814014b0 T ieee80211_iterate_nodes +ffffffff81401540 T ieee80211_next_scan +ffffffff81401670 T ieee80211_end_scan +ffffffff81401bd0 T ieee80211_create_ibss +ffffffff814020a0 T ieee80211_match_bss +ffffffff81402500 T ieee80211_node_free_unref_cb +ffffffff81402570 T ieee80211_node_tx_stopped +ffffffff81402670 T ieee80211_node_switch_bss +ffffffff81402940 T ieee80211_node_tx_flushed +ffffffff81402ab0 T ieee80211_find_node +ffffffff81402b50 T ieee80211_node_join_bss +ffffffff81402d30 T ieee80211_choose_rsnparams +ffffffff81402e60 T ieee80211_node_choose_bss +ffffffff81403050 T ieee80211_free_node +ffffffff81403150 T ieee80211_node_cmp +ffffffff81403170 T ieee80211_clean_inactive_nodes +ffffffff81403230 T ieee80211_get_rate +ffffffff81403280 T ieee80211_ba_del +ffffffff81403360 T ieee80211_node_set_timeouts +ffffffff81403460 T ieee80211_node_addba_request_ac_be_to +ffffffff81403480 T ieee80211_node_addba_request_ac_bk_to +ffffffff814034a0 T ieee80211_node_addba_request_ac_vi_to +ffffffff814034c0 T ieee80211_node_addba_request_ac_vo_to +ffffffff814034e0 T ieee80211_setup_node +ffffffff81403660 T ieee80211_alloc_node +ffffffff81403700 T ieee80211_dup_bss +ffffffff814037d0 T ieee80211_find_txnode +ffffffff814039d0 T ieee80211_find_rxnode +ffffffff81403ce0 T ieee80211_node_tx_ba_clear +ffffffff81403d50 T ieee80211_release_node +ffffffff81403de0 T ieee80211_clean_cached +ffffffff81403e70 T ieee80211_node_leave +ffffffff814040d0 T ieee80211_setup_htcaps +ffffffff81404170 T ieee80211_clear_htcaps +ffffffff814041f0 T ieee80211_setup_htop +ffffffff81404270 T ieee80211_setup_vhtcaps +ffffffff814042f0 T ieee80211_setup_vhtop +ffffffff81404350 T ieee80211_clear_vhtcaps +ffffffff81404390 T ieee80211_setup_rates +ffffffff81404450 T ieee80211_node_trigger_addba_req +ffffffff814044b0 T ieee80211_node_addba_request +ffffffff814044e0 T ieee80211_iserp_sta +ffffffff81404690 T ieee80211_needs_auth +ffffffff814046c0 T ieee80211_node_join_ht +ffffffff81404710 T ieee80211_node_join_rsn +ffffffff81404820 T ieee80211_count_longslotsta +ffffffff81404860 T ieee80211_count_nonerpsta +ffffffff814048b0 T ieee80211_count_pssta +ffffffff81404900 T ieee80211_count_rekeysta +ffffffff81404950 T ieee80211_node_join_11g +ffffffff81404ae0 T ieee80211_node_join +ffffffff81404de0 T ieee80211_node_leave_ht +ffffffff81404f10 T ieee80211_node_leave_vht +ffffffff81404f50 T ieee80211_node_leave_rsn +ffffffff81405080 T ieee80211_node_leave_11g +ffffffff814053a0 T ieee80211_node_leave_pwrsave +ffffffff81405560 T ieee80211_ibss_merge +ffffffff81405860 T ieee80211_notify_dtim +ffffffff81405930 T ieee80211_ess_cmp +ffffffff81405950 t ieee80211_tree_RBT_COMPARE +ffffffff81405970 t ieee80211_ess_tree_RBT_COMPARE +ffffffff81406000 T ieee80211_output +ffffffff814060f0 T ieee80211_action_name +ffffffff81406140 T ieee80211_mgmt_output +ffffffff814063a0 T ieee80211_pwrsave +ffffffff814064c0 T ieee80211_up_to_ac +ffffffff81406580 T ieee80211_classify +ffffffff81406670 T ieee80211_can_use_ampdu +ffffffff814066d0 T ieee80211_tx_compressed_bar +ffffffff81406810 T ieee80211_get_compressed_bar +ffffffff814068e0 T ieee80211_encap +ffffffff81406d60 T ieee80211_add_capinfo +ffffffff81406df0 T ieee80211_add_ssid +ffffffff81406e50 T ieee80211_add_rates +ffffffff81406ec0 T ieee80211_add_ds_params +ffffffff81406f10 T ieee80211_add_tim +ffffffff81407060 T ieee80211_add_ibss_params +ffffffff81407090 T ieee80211_add_edca_params +ffffffff81407210 T ieee80211_add_erp +ffffffff814072b0 T ieee80211_add_qos_capability +ffffffff814072e0 T ieee80211_add_wme_info +ffffffff81407320 T ieee80211_add_wme_param +ffffffff814074b0 T ieee80211_add_rsn_body +ffffffff81407790 T ieee80211_add_rsn +ffffffff814077f0 T ieee80211_add_wpa +ffffffff81407850 T ieee80211_add_xrates +ffffffff814078d0 T ieee80211_add_htcaps +ffffffff814079a0 T ieee80211_add_htop +ffffffff81407a70 T ieee80211_add_vhtcaps +ffffffff81407b10 T ieee80211_add_tie +ffffffff81407b60 T ieee80211_getmgmt +ffffffff81407c20 T ieee80211_get_probe_req +ffffffff81407fd0 T ieee80211_get_probe_resp +ffffffff81408530 T ieee80211_get_auth +ffffffff814085c0 T ieee80211_get_deauth +ffffffff81408640 T ieee80211_get_assoc_req +ffffffff81408b30 T ieee80211_get_assoc_resp +ffffffff81408ef0 T ieee80211_get_disassoc +ffffffff81408f70 T ieee80211_get_addba_req +ffffffff81409060 T ieee80211_output_ba_move_window +ffffffff81409150 T ieee80211_output_ba_move_window_to_first_unacked +ffffffff814092e0 T ieee80211_output_ba_record_ack +ffffffff81409430 T ieee80211_get_addba_resp +ffffffff81409530 T ieee80211_get_delba +ffffffff814095d0 T ieee80211_get_sa_query +ffffffff81409660 T ieee80211_get_action +ffffffff814098f0 T ieee80211_send_mgmt +ffffffff81409c90 T ieee80211_get_rts +ffffffff81409d20 T ieee80211_get_cts_to_self +ffffffff81409da0 T ieee80211_beacon_alloc +ffffffff8140b000 T ieee80211_eapol_key_input +ffffffff8140b210 T ieee80211_recv_eapol_key_req +ffffffff8140b360 T ieee80211_recv_4way_msg3 +ffffffff8140bd00 T ieee80211_recv_4way_msg2or4 +ffffffff8140be40 T ieee80211_recv_4way_msg1 +ffffffff8140c120 T ieee80211_recv_wpa_group_msg1 +ffffffff8140c450 T ieee80211_recv_rsn_group_msg1 +ffffffff8140c980 T ieee80211_recv_group_msg2 +ffffffff8140cad0 T ieee80211_recv_4way_msg2 +ffffffff8140ccd0 T ieee80211_must_update_group_key +ffffffff8140cd30 T ieee80211_recv_4way_msg4 +ffffffff8140d000 T ieee80211_send_eapol_key +ffffffff8140d210 T ieee80211_eapol_timeout +ffffffff8140d290 T ieee80211_send_4way_msg1 +ffffffff8140d550 T ieee80211_send_4way_msg3 +ffffffff8140da90 T ieee80211_send_group_msg1 +ffffffff8140dfb0 T ieee80211_add_gtk_kde +ffffffff8140e060 T ieee80211_add_pmkid_kde +ffffffff8140e0b0 T ieee80211_add_igtk_kde +ffffffff8140e170 T ieee80211_get_eapol_key +ffffffff8140e230 T ieee80211_send_4way_msg2 +ffffffff8140e450 T ieee80211_send_4way_msg4 +ffffffff8140e630 T ieee80211_send_group_msg2 +ffffffff8140e810 T ieee80211_send_eapol_key_req +ffffffff8140f000 T ieee80211_proto_attach +ffffffff8140f0b0 T ieee80211_newstate +ffffffff8140fd80 T ieee80211_proto_detach +ffffffff8140fdb0 T ieee80211_print_essid +ffffffff8140ff30 T ieee80211_fix_rate +ffffffff81410370 T ieee80211_reset_erp +ffffffff81410480 T ieee80211_set_shortslottime +ffffffff814104e0 T ieee80211_keyrun +ffffffff81410640 T ieee80211_setkeys +ffffffff81410880 t ieee80211_node_gtk_rekey +ffffffff814108e0 T ieee80211_setkeysdone +ffffffff814109e0 T ieee80211_gtk_rekey_timeout +ffffffff81410a30 T ieee80211_sa_query_timeout +ffffffff81410b00 T ieee80211_sa_query_request +ffffffff81410b80 T ieee80211_ht_negotiate +ffffffff81410d50 T ieee80211_vht_negotiate +ffffffff81410f60 T ieee80211_tx_ba_timeout +ffffffff81411080 T ieee80211_delba_request +ffffffff814111f0 T ieee80211_rx_ba_timeout +ffffffff81411270 T ieee80211_addba_request +ffffffff81411440 T ieee80211_auth_open_confirm +ffffffff814114f0 T ieee80211_try_another_bss +ffffffff81411600 T ieee80211_auth_open +ffffffff81411900 T ieee80211_set_beacon_miss_threshold +ffffffff81411990 T ieee80211_stop_ampdu_tx +ffffffff81411aa0 T ieee80211_check_wpa_supplicant_failure +ffffffff81411b20 T ieee80211_set_link_state +ffffffff81411bb0 T ieee80211_rtm_80211info_task +ffffffff81412000 T ieee80211_ra_get_ht_rateset +ffffffff81412080 T ieee80211_ra_use_ht_sgi +ffffffff81412100 T ieee80211_ra_get_txrate +ffffffff81412190 T ieee80211_ra_next_lower_intra_rate +ffffffff81412320 T ieee80211_ra_next_intra_rate +ffffffff814124a0 T ieee80211_ra_next_rateset +ffffffff814126c0 T ieee80211_ra_best_mcs_in_rateset +ffffffff81412740 T ieee80211_ra_probe_next_rateset +ffffffff81412a00 T ieee80211_ra_next_mcs +ffffffff81412a40 T ieee80211_ra_probe_clear +ffffffff81412a80 T ieee80211_ra_probe_done +ffffffff81412ac0 T ieee80211_ra_intra_mode_ra_finished +ffffffff81412e30 T ieee80211_ra_trigger_next_rateset +ffffffff81412e90 T ieee80211_ra_inter_mode_ra_finished +ffffffff81412ec0 T ieee80211_ra_best_rate +ffffffff81412f60 T ieee80211_ra_probe_next_rate +ffffffff81412ff0 T ieee80211_ra_valid_tx_mcs +ffffffff81413070 T ieee80211_ra_valid_rates +ffffffff81413140 T ieee80211_ra_probe_valid +ffffffff81413190 T ieee80211_ra_add_stats_ht +ffffffff81413430 T ieee80211_ra_choose +ffffffff81413870 T ieee80211_ra_node_init +ffffffff81414000 T ieee80211_ra_vht_get_rateset +ffffffff814140a0 T ieee80211_ra_vht_use_sgi +ffffffff814141b0 T ieee80211_ra_vht_get_txrate +ffffffff81414250 T ieee80211_ra_vht_next_lower_intra_rate +ffffffff81414290 T ieee80211_ra_vht_get_max_mcs +ffffffff81414310 T ieee80211_ra_vht_next_intra_rate +ffffffff81414400 T ieee80211_ra_vht_next_rateset +ffffffff81414550 T ieee80211_ra_vht_best_mcs_in_rateset +ffffffff814145f0 T ieee80211_ra_vht_probe_next_rateset +ffffffff814148d0 T ieee80211_ra_vht_next_mcs +ffffffff81414950 T ieee80211_ra_vht_probe_clear +ffffffff81414980 T ieee80211_ra_vht_probe_done +ffffffff814149d0 T ieee80211_ra_vht_intra_mode_ra_finished +ffffffff81414d90 T ieee80211_ra_vht_trigger_next_rateset +ffffffff81414df0 T ieee80211_ra_vht_inter_mode_ra_finished +ffffffff81414e20 T ieee80211_ra_vht_best_rate +ffffffff814150e0 T ieee80211_ra_vht_probe_next_rate +ffffffff81415190 T ieee80211_ra_vht_init_valid_rates +ffffffff81415390 T ieee80211_ra_vht_probe_valid +ffffffff814153e0 T ieee80211_ra_vht_add_stats +ffffffff814156d0 T ieee80211_ra_vht_choose +ffffffff81415b00 T ieee80211_ra_vht_node_init +ffffffff81416000 T ieee80211_rssadapt_choose +ffffffff814160d0 T ieee80211_rssadapt_updatestats +ffffffff81416150 T ieee80211_rssadapt_input +ffffffff81416190 T ieee80211_rssadapt_lower_rate +ffffffff81416210 T ieee80211_rssadapt_raise_rate +ffffffff81417000 T bsearch +ffffffff814170b0 T ieee80211_regdomain_compare_cn +ffffffff814170d0 T ieee80211_regdomain_compare_rn +ffffffff814170f0 T ieee80211_name2countrycode +ffffffff81417190 T ieee80211_name2regdomain +ffffffff81417230 T ieee80211_countrycode2name +ffffffff814172c0 T ieee80211_regdomain2name +ffffffff81417330 T ieee80211_regdomain2flag +ffffffff814173f0 T ieee80211_countrycode2regdomain +ffffffff81418000 T arptimer +ffffffff81418080 T arptfree +ffffffff81418160 T arpinit +ffffffff814181d0 T arp_rtrequest +ffffffff81418600 T arprequest +ffffffff81418730 T arpinvalidate +ffffffff81418790 T arpreply +ffffffff81418870 T arpresolve +ffffffff81418e50 T arppullup +ffffffff81418f10 T arpinput +ffffffff81418f60 T arpintr +ffffffff81419010 T in_arpinput +ffffffff81419440 T arplookup +ffffffff81419530 T arpcache +ffffffff81419900 T arpproxy +ffffffff814199e0 T revarpinput +ffffffff81419a30 T in_revarpinput +ffffffff81419af0 T revarprequest +ffffffff81419c30 T revarpwhoarewe +ffffffff81419e10 T revarpwhoami +ffffffff8141a000 T igmp_init +ffffffff8141a080 T rti_fill +ffffffff8141a150 T rti_find +ffffffff8141a230 T rti_delete +ffffffff8141a2c0 T igmp_input +ffffffff8141a390 T igmp_input_if +ffffffff8141abf0 T igmp_joingroup +ffffffff8141ad30 T igmp_sendpkt +ffffffff8141aeb0 T igmp_leavegroup +ffffffff8141af30 T igmp_fasttimo +ffffffff8141afb0 T igmp_checktimer +ffffffff8141b090 T igmp_slowtimo +ffffffff8141b0f0 T igmp_sysctl +ffffffff8141b250 T igmp_sysctl_igmpstat +ffffffff8141c000 T in_canforward +ffffffff8141c060 T in_socktrim +ffffffff8141c0b0 T in_mask2len +ffffffff8141c180 T in_len2mask +ffffffff8141c240 T in_nam2sin +ffffffff8141c2a0 T in_sa2sin +ffffffff8141c2e0 T in_control +ffffffff8141c380 T in_ioctl +ffffffff8141c6f0 T in_ioctl_get +ffffffff8141c850 T in_ioctl_set_ifaddr +ffffffff8141ca40 T in_ioctl_change_ifaddr +ffffffff8141ce60 T in_scrubhost +ffffffff8141ce80 T in_addhost +ffffffff8141cea0 T in_ifscrub +ffffffff8141cf40 T in_ifinit +ffffffff8141d1e0 T in_purgeaddr +ffffffff8141d2e0 T in_remove_prefix +ffffffff8141d350 T in_insert_prefix +ffffffff8141d3d0 T in_addmulti +ffffffff8141d560 T in_delmulti +ffffffff8141d6b0 T in_broadcast +ffffffff8141d740 T in_hasmulti +ffffffff8141d7e0 T in_ifdetach +ffffffff8141d870 T in_prefixlen2mask +ffffffff8141e000 T in_init +ffffffff8141e060 T in_pcbhash +ffffffff8141e180 T in_pcblhash +ffffffff8141e230 T in_pcbinit +ffffffff8141e2e0 T in_baddynamic +ffffffff8141e350 T in_rootonly +ffffffff8141e3d0 T in_pcballoc +ffffffff8141e550 T in_pcbresize +ffffffff8141e730 T in_pcbhash_insert +ffffffff8141e910 T in_pcbbind +ffffffff8141ec10 T in_pcbaddrisavail +ffffffff8141ee00 T in_pcbpickport +ffffffff8141efe0 T in_pcbrehash +ffffffff8141f070 T in_pcblookup_local +ffffffff8141f320 T in_pcbunref +ffffffff8141f400 T in_pcbconnect +ffffffff8141f670 T in_pcbselsrc +ffffffff8141f8a0 T in_pcblookup +ffffffff8141f990 T in_pcbdisconnect +ffffffff8141fad0 T in_pcbdetach +ffffffff8141fc10 T in_pcbref +ffffffff8141fc60 T in_setsockaddr +ffffffff8141fcb0 T in_setpeeraddr +ffffffff8141fd20 T in_sockaddr +ffffffff8141fd80 T in_peeraddr +ffffffff8141fe00 T in_pcbnotifyall +ffffffff8141ff70 T in_losing +ffffffff81420000 T in_rtchange +ffffffff81420050 T in_pcbrtentry +ffffffff814201a0 T in_pcbhash_lookup +ffffffff81420340 T in_pcblookup_listen +ffffffff81421000 T inet_nat64_mask +ffffffff81421060 T inet_nat64 +ffffffff814211f0 T inet_nat64_inet +ffffffff814212b0 T inet_nat64_inet6 +ffffffff81421380 T inet_nat46 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icmp_mtudisc_clone +ffffffff814258e0 T icmp_mtudisc +ffffffff81425ab0 T icmp_do_exthdr +ffffffff81426000 T ip_randomid +ffffffff81427000 T ip_init +ffffffff81427280 T ip_ours +ffffffff81427300 T ip_fragcheck +ffffffff81427650 T ipintr +ffffffff81427700 T ip_deliver +ffffffff81427a80 T ipv4_input +ffffffff81427b00 T ip_input_if +ffffffff81427fc0 T ipv4_check +ffffffff814282e0 T ip_dooptions +ffffffff814288d0 T in_ouraddr +ffffffff81428c30 T ip_forward +ffffffff814290e0 T ip_flush +ffffffff814291e0 T ip_reass +ffffffff814297a0 T ip_freef +ffffffff814298a0 T ip_slowtimo +ffffffff81429930 T save_rte +ffffffff81429a10 T ip_srcroute +ffffffff81429b70 T ip_stripoptions +ffffffff81429c00 T ip_sysctl +ffffffff81429f40 T ip_sysctl_ipstat +ffffffff8142a1a0 T ip_savecontrol +ffffffff8142a3d0 T ip_send_do_dispatch +ffffffff8142a4b0 T ip_send +ffffffff8142a4e0 T ip_send_raw +ffffffff8142a510 t ip_send_dispatch +ffffffff8142a520 t ip_sendraw_dispatch +ffffffff8142b000 T mfc_find +ffffffff8142b0c0 T ip_mrouter_set +ffffffff8142b230 T ip_mrouter_init +ffffffff8142b2b0 T ip_mrouter_done +ffffffff8142b4d0 T add_vif +ffffffff8142b6d0 T del_vif +ffffffff8142b830 T add_mfc +ffffffff8142b9d0 T del_mfc +ffffffff8142bb50 T set_api_config +ffffffff8142bbf0 T ip_mrouter_get +ffffffff8142bc90 T get_version +ffffffff8142bcd0 T get_api_support +ffffffff8142bd10 T get_api_config +ffffffff8142bd50 T mrt_ioctl +ffffffff8142be90 T get_vif_cnt +ffffffff8142bf20 T get_sg_cnt +ffffffff8142c040 T if_lookupbyvif +ffffffff8142c0a0 T mrt_sysctl_vif +ffffffff8142c210 T mrt_rtwalk_mfcsysctl +ffffffff8142c350 T mrt_sysctl_mfc +ffffffff8142c470 T mrouter_rtwalk_delete +ffffffff8142c4b0 T mrt_mcast_del +ffffffff8142c540 T vif_delete +ffffffff8142c600 T mfc_expire_route +ffffffff8142c6d0 T mfc_add_route +ffffffff8142c850 T rt_mcast_add +ffffffff8142c980 T update_mfc_params +ffffffff8142ccb0 T mfc_add +ffffffff8142cdb0 T socket_send +ffffffff8142ce30 T ip_mforward +ffffffff8142d160 T ip_mdq +ffffffff8142e000 T ip_output +ffffffff8142ebb0 T ip_insertoptions +ffffffff8142ed60 T ip_output_ipsec_lookup +ffffffff8142eec0 T in_proto_cksum_out +ffffffff8142f0f0 T ip_mloopback +ffffffff8142f1a0 T ip_output_ipsec_send +ffffffff8142f3f0 T in_ifcap_cksum +ffffffff8142f450 T ip_fragment +ffffffff8142f990 T ip_output_ipsec_pmtu_update +ffffffff8142fa90 T ip_optcopy +ffffffff8142fbc0 T ip_ctloutput +ffffffff81430470 T ip_pcbopts +ffffffff814306b0 T ip_setmoptions +ffffffff81430c30 T ip_getmoptions +ffffffff81430d80 T ip_multicast_if +ffffffff81430e50 T ip_freemoptions +ffffffff81430ee0 T in_delayed_cksum +ffffffff81431000 T rip_attach +ffffffff814310f0 T rip_detach +ffffffff81431160 T rip_lock +ffffffff814311c0 T rip_unlock +ffffffff81431220 T rip_bind +ffffffff814312e0 T rip_connect +ffffffff81431360 T rip_disconnect +ffffffff814313c0 T rip_shutdown +ffffffff81431400 T rip_send +ffffffff814314e0 T rip_init +ffffffff81431500 T rip_input +ffffffff81431870 T rip_output +ffffffff81431a60 T rip_chkhdr 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vio_stop +ffffffff8168ca80 T vio_populate_rx_mbufs +ffffffff8168cd30 T vio_iff +ffffffff8168cf10 T vio_rxeof +ffffffff8168d150 T vio_tx_drain +ffffffff8168d210 T vio_rx_drain +ffffffff8168d2c0 T vio_txeof +ffffffff8168d480 T vio_encap +ffffffff8168d550 T vio_add_rx_mbuf +ffffffff8168d620 T vio_free_rx_mbuf +ffffffff8168d6a0 T vio_ctrl_rx +ffffffff8168dab0 T vio_wait_ctrl +ffffffff8168db70 T vio_wait_ctrl_done +ffffffff8168dc40 T vio_ctrl_wakeup +ffffffff8168dc60 T vio_set_rx_filter +ffffffff8168f000 T vioblk_match +ffffffff8168f030 T vioblk_attach +ffffffff8168f2d0 T vioblk_scsi_cmd +ffffffff8168f970 T vioblk_vq_done +ffffffff8168fa50 T vioblk_req_get +ffffffff8168fac0 T vioblk_req_put +ffffffff8168fb10 T vioblk_alloc_reqs +ffffffff81690000 T vioblk_vq_done1 +ffffffff81690140 T vioblk_reset +ffffffff816901f0 T vioblk_scsi_done +ffffffff81690200 T vioblk_scsi_inq +ffffffff81690320 T vioblk_scsi_capacity +ffffffff816903c0 T vioblk_scsi_capacity16 +ffffffff81691000 T viomb_match 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vga_pci_cnattach +ffffffff8169bd50 T vga_pci_ioctl +ffffffff8169c000 T cy82c693_init +ffffffff8169c0c0 T cy82c693_read +ffffffff8169c120 T cy82c693_write +ffffffff8169d000 t ahc_aic785X_setup +ffffffff8169d070 t ahc_aic7860_setup +ffffffff8169d0e0 t ahc_apa1480_setup +ffffffff8169d160 t ahc_aic7870_setup +ffffffff8169d1b0 t ahc_aha394X_setup +ffffffff8169d240 t ahc_aha398X_setup +ffffffff8169d2e0 t ahc_aha494X_setup +ffffffff8169d370 t ahc_aic7880_setup +ffffffff8169d3f0 t ahc_aha394XU_setup +ffffffff8169d4b0 t ahc_aha398XU_setup +ffffffff8169d580 t ahc_aha2940Pro_setup +ffffffff8169d610 t ahc_aic7890_setup +ffffffff8169d680 t ahc_aic7892_setup +ffffffff8169d6e0 t ahc_aha29160C_setup +ffffffff8169d750 t ahc_aic7895_setup +ffffffff8169d820 t ahc_aic7896_setup +ffffffff8169d890 t ahc_aic7899_setup +ffffffff8169d900 t ahc_raid_setup +ffffffff8169d940 T ahc_pci_probe +ffffffff8169da90 T ahc_pci_attach +ffffffff8169e970 T ahc_find_pci_device +ffffffff8169ea70 T ahc_pci_intr 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mpii_ioctl_disk +ffffffff81702610 T mpii_find_vol +ffffffff81702660 T mpii_bio_hs +ffffffff81702840 T mpii_bio_disk +ffffffff81702a90 T mpii_bio_volstate +ffffffff81702c20 T mpii_refresh_sensors +ffffffff81703000 T sili_pci_match +ffffffff817030a0 T sili_pci_attach +ffffffff817033b0 T sili_pci_detach +ffffffff81703460 T sili_pci_activate +ffffffff81703490 T sili_lookup +ffffffff81704000 T aq_fw1x_reset +ffffffff81704050 T aq_fw1x_set_mode +ffffffff81704080 T aq_fw1x_get_mode +ffffffff817040b0 T aq_fw1x_get_stats +ffffffff817040e0 T aq_fw2x_reset +ffffffff81704170 T aq_fw2x_set_mode +ffffffff81704310 T aq_fw2x_get_mode +ffffffff817044a0 T aq_fw2x_get_stats +ffffffff817044d0 T aq_match +ffffffff817044f0 T aq_attach +ffffffff81705130 T aq_activate +ffffffff81705160 T AQ_READ_REG +ffffffff81705190 T aq_lookup +ffffffff81705360 T aq_intr +ffffffff817054e0 T aq_intr_link +ffffffff817055e0 T aq_fw_reset +ffffffff817058a0 T aq_fw_version_init +ffffffff81705a20 T aq_hw_init_ucp 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nforce_chip_map +ffffffff81724480 T ite_chip_map +ffffffff81724740 T jmicron_chip_map +ffffffff81724b50 T phison_chip_map +ffffffff81724e70 T rdc_chip_map +ffffffff817252c0 T pciide_match +ffffffff81725360 T pciide_attach +ffffffff81725430 T pciide_detach +ffffffff81725480 T pciide_activate +ffffffff81725bb0 T pciide_lookup_product +ffffffff81725e10 T pciide_dmacmd_read +ffffffff81725e40 T pciide_dmacmd_write +ffffffff81725e70 T pciide_dmactl_read +ffffffff81725ea0 T pciide_dmactl_write +ffffffff81725ed0 T pciide_dmatbl_write +ffffffff81725f00 T pciide_mapregs_compat +ffffffff81726080 T pciide_unmapregs_compat +ffffffff81726100 T pciide_mapregs_native +ffffffff817263f0 T pciide_unmapregs_native +ffffffff81726480 T pciide_mapreg_dma +ffffffff81726610 T pciide_dma_init +ffffffff817268d0 T pciide_dma_start +ffffffff81726950 T pciide_dma_finish +ffffffff81726b20 T pciide_unmapreg_dma +ffffffff81726b50 T pciide_intr_flag +ffffffff81726d50 T pciide_compat_intr +ffffffff81726dc0 T pciide_pci_intr +ffffffff81726e80 T pciide_channel_dma_setup +ffffffff81726f40 T pciide_dma_table_setup +ffffffff81727180 T pciide_irqack +ffffffff817271d0 T pciide_chansetup +ffffffff817272b0 T pciide_chanfree +ffffffff817272f0 T pciide_mapchan +ffffffff81727380 T pciide_unmap_chan +ffffffff81727450 T pciide_chan_candisable +ffffffff817274c0 T pciide_map_compat_intr +ffffffff81727560 T pciide_unmap_compat_intr +ffffffff817275c0 T pciide_print_channels +ffffffff81727690 T pciide_print_modes +ffffffff817276a0 T default_chip_unmap +ffffffff81727780 T sata_setup_channel +ffffffff817278a0 T piix_timing_debug +ffffffff817278d0 T piix_setup_channel +ffffffff81727d60 T piix3_4_setup_channel +ffffffff817284f0 T piix_setup_idetim_timings +ffffffff81728560 T piix_setup_idetim_drvs +ffffffff81728680 T piix_setup_sidetim_timings +ffffffff817286f0 T amd756_setup_channel +ffffffff81728a90 T apollo_setup_channel +ffffffff81728e10 T cmd_channel_map +ffffffff81729180 T cmd_pci_intr +ffffffff81729280 T cmd646_9_irqack +ffffffff81729380 T cmd0643_9_setup_channel +ffffffff817297a0 T cmd680_setup_channel +ffffffff81729ca0 T cmd680_channel_map +ffffffff81729fd0 T sii_fixup_cacheline +ffffffff8172a2a0 T sii3112_setup_channel +ffffffff8172a460 T sii3112_drv_probe +ffffffff8172a880 T sii3114_mapreg_dma +ffffffff8172ab60 T sii3114_chansetup +ffffffff8172ac20 T sii3114_mapchan +ffffffff8172af30 T sii3114_dmacmd_read +ffffffff8172af70 T sii3114_dmacmd_write +ffffffff8172afb0 T sii3114_dmactl_read +ffffffff8172aff0 T sii3114_dmactl_write +ffffffff8172b030 T sii3114_dmatbl_write +ffffffff8172b070 T cy693_setup_channel +ffffffff8172b290 T sis_hostbr_match +ffffffff8172b350 T sis_south_match +ffffffff8172b390 T sis_setup_channel +ffffffff8172b6d0 T sis96x_setup_channel +ffffffff8172b9b0 T natsemi_irqack +ffffffff8172ba40 T natsemi_setup_channel +ffffffff8172be20 T natsemi_pci_intr +ffffffff8172bf20 T ns_scx200_setup_channel +ffffffff8172c210 T acer_dma_init +ffffffff8172c250 T acer_setup_channel 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svwsata_dmactl_read +ffffffff8172e9c0 T svwsata_dmactl_write +ffffffff8172e9f0 T svwsata_dmatbl_write +ffffffff8172ea20 T acard_setup_channel +ffffffff8172ee30 T nforce_setup_channel +ffffffff8172f180 T nforce_pci_intr +ffffffff8172f270 T ite_setup_channel +ffffffff8172f5f0 T ixp_setup_channel +ffffffff8172f990 T jmicron_setup_channel +ffffffff8172fbf0 T phison_setup_channel +ffffffff8172fdf0 T sch_setup_channel +ffffffff8172fff0 T rdc_setup_channel +ffffffff81731000 T ppbmatch +ffffffff81731050 T ppbattach +ffffffff817317a0 T ppbdetach +ffffffff817318c0 T ppbactivate +ffffffff81731d30 T ppb_alloc_busrange +ffffffff81731ef0 T ppb_hotplug_insert +ffffffff81731f50 T ppb_hotplug_rescan +ffffffff81731f90 T ppb_hotplug_remove +ffffffff817320f0 T ppb_hotplug_insert_finish +ffffffff81732110 T ppb_intr +ffffffff817321d0 T ppb_alloc_resources +ffffffff817328a0 T ppbprint +ffffffff81733000 T cy_pci_match +ffffffff81733020 T cy_pci_attach +ffffffff81734000 T rl_pci_match +ffffffff81734060 T rl_pci_attach +ffffffff81734220 T rl_pci_detach +ffffffff81735000 T re_pci_probe +ffffffff817350a0 T re_pci_attach +ffffffff817353d0 T re_pci_detach +ffffffff81735490 T re_pci_activate +ffffffff81736000 T vr_probe +ffffffff817360f0 T vr_attach +ffffffff81736870 T vr_activate +ffffffff817368f0 T vr_mii_readreg +ffffffff81736a50 T vr_mii_writereg +ffffffff81736bb0 T vr_miibus_readreg +ffffffff81736c10 T vr_miibus_writereg +ffffffff81736c70 T vr_miibus_statchg +ffffffff81736c90 T vr_setcfg +ffffffff81736eb0 T vr_iff +ffffffff81737020 T vr_reset +ffffffff81737130 T vr_quirks +ffffffff81737230 T vr_dmamem_alloc +ffffffff81737390 T vr_dmamem_free +ffffffff81737400 T vr_intr +ffffffff81737630 T vr_chipinit +ffffffff81737710 T vr_ioctl +ffffffff817378b0 T vr_start +ffffffff81737a80 T vr_watchdog +ffffffff81737b10 T vr_wol +ffffffff81737cc0 T vr_ifmedia_upd +ffffffff81737d00 T vr_ifmedia_sts +ffffffff81737d60 T vr_tick +ffffffff81737de0 T vr_rxtick +ffffffff81737eb0 T vr_stop +ffffffff81738140 T vr_init +ffffffff817386d0 T vr_list_tx_init +ffffffff817387d0 T vr_list_rx_init +ffffffff81738990 T vr_fill_rx_ring +ffffffff81738a50 T vr_alloc_mbuf +ffffffff81738bb0 T vr_rxeof +ffffffff81738e30 T vr_rxeoc +ffffffff81738fc0 T vr_txeof +ffffffff81739180 T vr_encap +ffffffff8173a000 T txp_probe +ffffffff8173a020 T txp_attach +ffffffff8173a180 T txp_attachhook +ffffffff8173a4a0 T txp_chip_init +ffffffff8173a660 T txp_download_fw +ffffffff8173ab00 T txp_alloc_rings +ffffffff8173b930 T txp_command +ffffffff8173ba00 T txp_ifmedia_upd +ffffffff8173bb10 T txp_ifmedia_sts +ffffffff8173be00 T txp_ioctl +ffffffff8173bf10 T txp_start +ffffffff8173c2d0 T txp_watchdog +ffffffff8173c300 T txp_capabilities +ffffffff8173c4b0 T txp_tick +ffffffff8173c600 T txp_intr +ffffffff8173c870 T txp_reset_adapter +ffffffff8173c960 T txp_download_fw_wait +ffffffff8173ca50 T txp_download_fw_section +ffffffff8173cdb0 T txp_dma_malloc +ffffffff8173cf50 T txp_dma_free +ffffffff8173cfd0 T txp_rx_reclaim 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bktrmmap +ffffffff8174cae0 t bktr_intr +ffffffff8174d000 T select_tuner +ffffffff8174d050 T tv_freq +ffffffff8174d2a0 T do_afc +ffffffff8174d3c0 T get_tuner_status +ffffffff8174d3e0 T tv_channel +ffffffff8174d4a0 T tuner_getchnlset +ffffffff8174e000 T xl_pci_match +ffffffff8174e020 T xl_pci_attach +ffffffff8174e370 T xl_pci_detach +ffffffff8174e400 T xl_pci_wol_power +ffffffff8174e450 T xl_pci_intr_ack +ffffffff8174f000 T fxp_pci_match +ffffffff8174f020 T fxp_pci_attach +ffffffff8174f340 T fxp_pci_detach +ffffffff81750000 T em_probe +ffffffff81750020 T em_attach +ffffffff81750520 T em_detach +ffffffff817505b0 T em_activate +ffffffff81750630 T em_defer_attach +ffffffff817506d0 T em_stop +ffffffff817507c0 T em_free_pci_resources +ffffffff81750a80 T em_setup_interface +ffffffff81750c60 T em_update_link_status +ffffffff81750e40 T em_local_timer +ffffffff81750ee0 T em_82547_move_tail +ffffffff81750f10 T em_identify_hardware +ffffffff81751010 T em_allocate_pci_resources +ffffffff81751410 T em_allocate_desc_rings +ffffffff81751520 T em_hardware_init +ffffffff817517c0 T em_kstat_attach +ffffffff81751910 T em_start +ffffffff81751c00 T em_encap +ffffffff817520d0 T em_82547_move_tail_locked +ffffffff81752300 T em_82547_update_fifo_head +ffffffff81752350 T em_ioctl +ffffffff81752630 T em_init +ffffffff81752990 T em_get_sffpage +ffffffff81752a40 T em_disable_intr +ffffffff81752b40 T em_iff +ffffffff81752e50 T em_initialize_receive_unit +ffffffff817535d0 T em_enable_intr +ffffffff81753730 T em_watchdog +ffffffff817538e0 T em_enable_hw_vlans +ffffffff81753970 T em_setup_transmit_structures +ffffffff81753b70 T em_initialize_transmit_unit +ffffffff81754190 T em_setup_receive_structures +ffffffff817542d0 T em_setup_queues_msix +ffffffff81754980 T em_intr +ffffffff81754a80 T em_txeof +ffffffff81754c40 T em_rxeof +ffffffff817550f0 T em_rxrefill +ffffffff81755200 T em_media_status +ffffffff81755430 T em_flowstatus +ffffffff81755540 T em_media_change +ffffffff81755690 T em_tx_ctx_setup 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+ffffffff81757970 T em_read_pcie_cap_reg +ffffffff817579a0 T em_flush_tx_ring +ffffffff81757b10 T em_flush_rx_ring +ffffffff81757cd0 T em_queue_intr_msix +ffffffff81757d70 T em_link_intr_msix +ffffffff81757e90 T em_enable_queue_intr_msix +ffffffff81758000 T em_set_mac_type +ffffffff81758a00 T em_set_sfp_media_type_82575 +ffffffff81758d50 T em_translate_82542_register +ffffffff81758f70 T em_read_sfp_data_byte +ffffffff81759060 T em_set_media_type +ffffffff817592d0 T em_reset_hw +ffffffff81759e90 T em_disable_pciex_master +ffffffff81759f50 T em_check_phy_reset_block +ffffffff8175a010 T em_gate_hw_phy_config_ich8lan +ffffffff8175a0b0 t em_get_software_flag +ffffffff8175a230 T em_hv_phy_workarounds_ich8lan +ffffffff8175a5c0 T em_lv_phy_workarounds_ich8lan +ffffffff8175a6c0 t em_phy_init_script +ffffffff8175a930 T em_read_eeprom +ffffffff8175b010 T em_set_eee_i350 +ffffffff8175b130 T em_init_hw +ffffffff8175cdc0 T em_phy_reset +ffffffff8175d000 T em_clear_vfta_i350 +ffffffff8175d1e0 T em_read_phy_reg +ffffffff8175d380 T em_setup_link +ffffffff8175fc10 T em_enable_tx_pkt_filtering +ffffffff8175ffe0 T em_clear_hw_cntrs +ffffffff817608c0 T em_write_phy_reg +ffffffff81760a50 T em_power_up_serdes_link_82575 +ffffffff81760b30 T em_copper_link_autoneg +ffffffff81760c60 T em_phy_setup_autoneg +ffffffff81760dc0 T em_copper_link_postconfig +ffffffff81760e90 T em_config_collision_dist +ffffffff81760f10 t em_config_mac_to_phy +ffffffff81761080 t em_config_fc_after_link_up +ffffffff81761380 t em_config_dsp_after_link_change +ffffffff81761c70 T em_force_mac_fc +ffffffff81761d30 T em_check_for_link +ffffffff81762520 T em_get_pcs_speed_and_duplex_82575 +ffffffff817625d0 T em_k1_gig_workaround_hv +ffffffff81762700 T em_link_stall_workaround_hv +ffffffff817627d0 T em_k1_workaround_lv +ffffffff81762880 T em_k1_workaround_lpt_lp +ffffffff81762b30 T em_set_eee_pchlan +ffffffff81762bd0 t em_polarity_reversal_workaround +ffffffff81762e10 T em_get_speed_and_duplex +ffffffff817632d0 T em_access_phy_wakeup_reg_bm +ffffffff81763430 t em_write_phy_reg_ex +ffffffff817636a0 t em_read_phy_reg_ex +ffffffff81763b50 T em_access_phy_debug_regs_hv +ffffffff81763c20 T em_access_phy_reg_hv +ffffffff81763dd0 t em_swfw_sync_acquire +ffffffff81763f80 t em_swfw_sync_release +ffffffff81764100 T em_sgmii_uses_mdio_82575 +ffffffff81764160 T em_read_phy_reg_i2c +ffffffff81764240 T em_write_phy_reg_i2c +ffffffff81764310 T em_phy_hw_reset +ffffffff81764950 T em_oem_bits_config_pchlan +ffffffff81764b20 T em_initialize_M88E1512_phy +ffffffff81764cd0 T em_init_eeprom_params +ffffffff81765210 T em_get_flash_presence_i210 +ffffffff81765270 t em_acquire_eeprom +ffffffff81765460 t em_read_eeprom_ich8 +ffffffff81765630 t em_release_eeprom +ffffffff817657a0 t em_standby_eeprom +ffffffff81765990 t em_shift_out_ee_bits +ffffffff81765b30 t em_shift_in_ee_bits +ffffffff81765c70 T em_validate_eeprom_checksum +ffffffff81765e10 T em_write_eeprom +ffffffff817663b0 T em_update_eeprom_checksum +ffffffff817664d0 t em_commit_shadow_ram +ffffffff81766a50 T em_read_part_num +ffffffff81766ae0 T em_read_mac_addr +ffffffff81766c60 T em_mc_addr_list_update +ffffffff81766e80 T em_hash_mc_addr +ffffffff81766f80 T em_rar_set +ffffffff81767070 T em_mta_set +ffffffff817671e0 T em_get_bus_info +ffffffff81767370 T em_check_mng_mode +ffffffff817673e0 T em_valid_nvm_bank_detect_ich8lan +ffffffff81767590 T em_read_eeprom_spt +ffffffff81767860 T em_read_ich8_data32 +ffffffff817679d0 t em_ich8_cycle_init +ffffffff81767b80 t em_ich8_flash_cycle +ffffffff81767cf0 T em_configure_k1_ich8lan +ffffffff81767f00 t em_get_hw_eeprom_semaphore +ffffffff81768070 t em_shift_out_mdi_bits +ffffffff817681f0 t em_erase_ich8_4k_segment +ffffffff81768430 t em_write_ich8_byte +ffffffff817685a0 t em_read_ich8_data +ffffffff81769000 T em_lookup_gcu +ffffffff81769030 T em_attach_miibus +ffffffff81769060 T gcu_miibus_readreg +ffffffff817691d0 T gcu_miibus_writereg +ffffffff81769310 T gcu_miibus_statchg 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ixgb_setup_receive_structures +ffffffff8176c840 T ixgb_initialize_receive_unit +ffffffff8176cad0 T ixgb_intr +ffffffff8176ccd0 T ixgb_rxeof +ffffffff8176d120 T ixgb_txeof +ffffffff8176d310 T ixgb_media_status +ffffffff8176d400 T ixgb_media_change +ffffffff8176d440 T ixgb_free_transmit_structures +ffffffff8176d570 T ixgb_free_receive_structures +ffffffff8176d6a0 T ixgb_allocate_transmit_structures +ffffffff8176d720 T ixgb_transmit_checksum_setup +ffffffff8176d810 T ixgb_get_buf +ffffffff8176d9c0 T ixgb_allocate_receive_structures +ffffffff8176db80 T ixgb_receive_checksum +ffffffff8176dbe0 T ixgb_write_pci_cfg +ffffffff8176e000 T ixgb_validate_eeprom_checksum +ffffffff8176e080 T ixgb_read_eeprom +ffffffff8176e2f0 T ixgb_update_eeprom_checksum +ffffffff8176e360 T ixgb_write_eeprom +ffffffff8176e820 t ixgb_shift_out_bits +ffffffff8176e960 T ixgb_get_eeprom_data +ffffffff8176ea00 T ixgb_get_eeprom_word +ffffffff8176eae0 T ixgb_get_ee_mac_addr +ffffffff8176ebd0 T ixgb_get_ee_pba_number +ffffffff8176ec90 T ixgb_get_ee_device_id +ffffffff8176f000 T ixgb_mac_reset +ffffffff8176f1e0 T ixgb_adapter_stop +ffffffff8176f310 T ixgb_init_hw +ffffffff8176f620 T ixgb_init_rx_addrs +ffffffff8176f750 T mac_addr_valid +ffffffff8176f7b0 T ixgb_clear_vfta +ffffffff8176f830 T ixgb_clear_hw_cntrs +ffffffff8176ff00 T ixgb_setup_fc +ffffffff81770090 T ixgb_check_for_link +ffffffff817702a0 T ixgb_rar_set +ffffffff81770310 T ixgb_mc_addr_list_update +ffffffff81770590 T ixgb_write_vfta +ffffffff817705c0 T ixgb_read_phy_reg +ffffffff81770ab0 T ixgb_write_phy_reg +ffffffff81770fa0 T ixgb_check_for_bad_link +ffffffff81771050 T ixgb_led_on +ffffffff817710a0 T ixgb_led_off +ffffffff81772000 T ixgbe_probe +ffffffff81772020 T ixgbe_attach +ffffffff81772590 T ixgbe_detach +ffffffff817727b0 T ixgbe_activate +ffffffff817728b0 T ixgbe_identify_hardware +ffffffff81772970 T ixgbe_allocate_pci_resources +ffffffff81772ab0 T ixgbe_allocate_queues +ffffffff81772fb0 T ixgbe_allocate_msix +ffffffff817731f0 T ixgbe_allocate_legacy +ffffffff81773310 T ixgbe_setup_interface +ffffffff81773650 T ixgbe_free_transmit_structures +ffffffff817736c0 T ixgbe_free_receive_structures +ffffffff81773780 T ixgbe_free_pci_resources +ffffffff81773860 T ixgbe_stop +ffffffff81773b80 T ixgbe_init +ffffffff817747b0 T ixgbe_start +ffffffff81774990 T ixgbe_encap +ffffffff81774d40 T ixgbe_ioctl +ffffffff817750a0 T ixgbe_rxrinfo +ffffffff817751f0 T ixgbe_get_sffpage +ffffffff81775390 T ixgbe_disable_intr +ffffffff81775460 T ixgbe_iff +ffffffff817755d0 T ixgbe_enable_intr +ffffffff817756e0 T ixgbe_enable_queues +ffffffff817757e0 T ixgbe_watchdog +ffffffff817759f0 T ixgbe_setup_transmit_structures +ffffffff81775ad0 T ixgbe_initialize_transmit_units +ffffffff81775d90 T ixgbe_setup_receive_structures +ffffffff81775ec0 T ixgbe_initialize_receive_units +ffffffff817763a0 T ixgbe_config_gpie +ffffffff81776470 T ixgbe_setup_vlan_hw_support +ffffffff81776600 T ixgbe_configure_ivars +ffffffff817767b0 T ixgbe_set_ivar +ffffffff81776980 T ixgbe_config_link +ffffffff81776b20 T ixgbe_config_delay_values +ffffffff81776c30 t ix_kstats_tick +ffffffff81776d00 T ixgbe_enable_queue +ffffffff81776dc0 T ixgbe_disable_queue +ffffffff81776e80 T ixgbe_link_intr +ffffffff81776e90 T ixgbe_intr +ffffffff81777360 T ixgbe_queue_intr +ffffffff817774b0 T ixgbe_rxeof +ffffffff81777870 T ixgbe_txeof +ffffffff81777a10 T ixgbe_rxrefill +ffffffff81777ac0 T ixgbe_legacy_intr +ffffffff81777c70 T ixgbe_update_link_status +ffffffff81777dc0 T ixgbe_handle_mod +ffffffff81777ee0 T ixgbe_handle_msf +ffffffff81777fb0 T ixgbe_handle_phy +ffffffff81778040 T ixgbe_media_status +ffffffff81778250 T ixgbe_media_change +ffffffff817782f0 T ixgbe_mc_array_itr +ffffffff81778330 T ixgbe_setup_msix +ffffffff817783c0 T ixgbe_add_media_types +ffffffff81778650 T ixgbe_dma_malloc +ffffffff81778840 T ixgbe_dma_free +ffffffff817788f0 T ixgbe_allocate_transmit_buffers +ffffffff81778a60 T ixgbe_setup_transmit_ring +ffffffff81778c00 T ixgbe_free_transmit_buffers +ffffffff81778d30 T ixgbe_get_buf +ffffffff81778e70 T ixgbe_allocate_receive_buffers +ffffffff81778fa0 T ixgbe_setup_receive_ring +ffffffff81779080 T ixgbe_rxfill +ffffffff817791b0 T ixgbe_initialize_rss_mapping +ffffffff81779420 T ixgbe_map_queue_statistics +ffffffff81779520 T ixgbe_free_receive_buffers +ffffffff81779660 T ixgbe_rx_checksum +ffffffff817796b0 T ixgbe_read_pci_cfg +ffffffff81779710 T ixgbe_write_pci_cfg +ffffffff81779780 t ix_kstats_read +ffffffff81779930 t ix_rxq_kstats_read +ffffffff81779a90 t ix_txq_kstats_read +ffffffff8177a000 T ixgbe_init_ops_generic +ffffffff8177a260 T ixgbe_init_eeprom_params_generic +ffffffff8177a310 T ixgbe_read_eerd_generic +ffffffff8177a410 T ixgbe_read_eeprom_bit_bang_generic +ffffffff8177a6b0 T ixgbe_write_eeprom_generic +ffffffff8177ab00 T ixgbe_validate_eeprom_checksum_generic +ffffffff8177abb0 T ixgbe_update_eeprom_checksum_generic +ffffffff8177ac30 T ixgbe_calc_eeprom_checksum_generic +ffffffff8177add0 T ixgbe_init_hw_generic +ffffffff8177ae20 T ixgbe_start_hw_generic +ffffffff8177af40 T ixgbe_clear_hw_cntrs_generic +ffffffff8177b920 T ixgbe_enable_rx_dma_generic +ffffffff8177b980 T ixgbe_get_mac_addr_generic +ffffffff8177ba10 T ixgbe_stop_adapter_generic +ffffffff8177bb90 T ixgbe_get_bus_info_generic +ffffffff8177bc40 T ixgbe_set_lan_id_multi_port_pcie +ffffffff8177bd10 T ixgbe_acquire_swfw_sync +ffffffff8177bf40 T ixgbe_release_swfw_sync +ffffffff8177bff0 T prot_autoc_read_generic +ffffffff8177c050 T prot_autoc_write_generic +ffffffff8177c0a0 T ixgbe_led_on_generic +ffffffff8177c160 T ixgbe_led_off_generic +ffffffff8177c210 T ixgbe_blink_led_start_generic +ffffffff8177c380 T ixgbe_blink_led_stop_generic +ffffffff8177c490 T ixgbe_set_rar_generic +ffffffff8177c5b0 T ixgbe_clear_rar_generic +ffffffff8177c6b0 T ixgbe_init_rx_addrs_generic +ffffffff8177c8b0 T ixgbe_update_mc_addr_list_generic +ffffffff8177caa0 T ixgbe_enable_mc_generic +ffffffff8177cb10 T ixgbe_disable_mc_generic +ffffffff8177cb70 T ixgbe_enable_rx_generic +ffffffff8177cc30 T ixgbe_disable_rx_generic +ffffffff8177cd10 T ixgbe_fc_enable_generic +ffffffff8177d140 T ixgbe_setup_fc_generic +ffffffff8177d410 T ixgbe_fc_autoneg +ffffffff8177d5e0 T ixgbe_device_supports_autoneg_fc +ffffffff8177d6d0 T ixgbe_start_hw_gen2 +ffffffff8177d8b0 T ixgbe_identify_phy +ffffffff8177d900 T ixgbe_set_pci_config_data_generic +ffffffff8177d970 T ixgbe_disable_rx +ffffffff8177d9b0 T ixgbe_disable_pcie_master +ffffffff8177db00 T ixgbe_read_eerd_buffer_generic +ffffffff8177dc40 T ixgbe_poll_eerd_eewr_done +ffffffff8177dce0 T ixgbe_write_eewr_buffer_generic +ffffffff8177de50 T ixgbe_write_eewr_generic +ffffffff8177de90 T ixgbe_acquire_eeprom +ffffffff8177e010 T ixgbe_get_eeprom_semaphore +ffffffff8177e220 T ixgbe_release_eeprom_semaphore +ffffffff8177e290 T ixgbe_ready_eeprom +ffffffff8177e3f0 T ixgbe_shift_out_eeprom_bits +ffffffff8177e5b0 T ixgbe_shift_in_eeprom_bits +ffffffff8177e710 T ixgbe_standby_eeprom +ffffffff8177e7f0 T ixgbe_raise_eeprom_clk +ffffffff8177e860 T ixgbe_lower_eeprom_clk +ffffffff8177e8d0 T ixgbe_release_eeprom +ffffffff8177e9b0 T ixgbe_validate_mac_addr +ffffffff8177ea10 T ixgbe_init_uta_tables +ffffffff8177ea50 T ixgbe_add_uc_addr +ffffffff8177eac0 T ixgbe_mta_vector +ffffffff8177eb60 T ixgbe_set_mta +ffffffff8177ec20 T ixgbe_negotiate_fc +ffffffff8177ecd0 T ixgbe_fc_autoneg_fiber +ffffffff8177ee00 T ixgbe_fc_autoneg_backplane +ffffffff8177ef60 T ixgbe_fc_autoneg_copper +ffffffff8177f090 T ixgbe_disable_sec_rx_path_generic +ffffffff8177f150 T ixgbe_enable_sec_rx_path_generic +ffffffff8177f1e0 T ixgbe_enable_rx +ffffffff8177f220 T ixgbe_get_pcie_msix_count_generic +ffffffff8177f2a0 T ixgbe_insert_mac_addr_generic +ffffffff8177f4a0 T ixgbe_set_vmdq +ffffffff8177f4e0 T ixgbe_set_rar +ffffffff8177f520 T ixgbe_clear_vmdq +ffffffff8177f560 T ixgbe_clear_vmdq_generic +ffffffff8177f700 T ixgbe_set_vmdq_generic +ffffffff8177f7b0 T ixgbe_init_uta_tables_generic +ffffffff8177f830 T ixgbe_find_vlvf_slot +ffffffff8177f8f0 T ixgbe_set_vfta_generic +ffffffff8177fa00 T ixgbe_set_vlvf_generic +ffffffff8177fc80 T ixgbe_clear_vfta_generic +ffffffff8177fd70 T ixgbe_need_crosstalk_fix +ffffffff8177fdc0 T ixgbe_check_mac_link_generic +ffffffff8177ffb0 T ixgbe_get_device_caps_generic +ffffffff81780000 T ixgbe_calculate_checksum +ffffffff817800c0 T ixgbe_hic_unlocked +ffffffff817802a0 T ixgbe_host_interface_command +ffffffff81780470 T ixgbe_clear_tx_pending +ffffffff81780660 T ixgbe_mng_present +ffffffff817806c0 T ixgbe_mng_enabled +ffffffff81780780 T ixgbe_setup_mac_link_multispeed_fiber +ffffffff81780b30 T ixgbe_flap_tx_laser +ffffffff81780b70 T ixgbe_check_link +ffffffff81780bb0 T ixgbe_set_soft_rate_select_speed +ffffffff81780ca0 T ixgbe_init_shared_code +ffffffff81780d50 T ixgbe_set_mac_type +ffffffff81780f00 T ixgbe_init_hw +ffffffff81780f40 T ixgbe_get_media_type +ffffffff81780f80 T ixgbe_read_mbx +ffffffff81780fd0 T ixgbe_write_mbx +ffffffff81781020 T ixgbe_check_for_msg +ffffffff81781060 T ixgbe_check_for_ack +ffffffff817810a0 T ixgbe_check_for_rst +ffffffff817810e0 T ixgbe_poll_for_msg +ffffffff81781190 T ixgbe_poll_for_ack +ffffffff81781240 T ixgbe_read_posted_mbx +ffffffff81781320 T ixgbe_write_posted_mbx +ffffffff817813f0 T ixgbe_init_mbx_ops_generic +ffffffff81781430 T ixgbe_read_v2p_mailbox +ffffffff817814a0 T ixgbe_check_for_bit_pf +ffffffff81781530 T ixgbe_check_for_msg_pf +ffffffff817815e0 T ixgbe_check_for_ack_pf +ffffffff81781680 T ixgbe_check_for_rst_pf +ffffffff81781770 T ixgbe_obtain_mbx_lock_pf +ffffffff81781800 T ixgbe_write_mbx_pf +ffffffff817819d0 T ixgbe_read_mbx_pf +ffffffff81781ae0 T ixgbe_init_mbx_params_pf +ffffffff81782000 T ixgbe_set_pcie_completion_timeout +ffffffff81782090 T ixgbe_init_ops_82598 +ffffffff817821e0 T ixgbe_init_phy_ops_82598 +ffffffff817822d0 T ixgbe_start_hw_82598 +ffffffff81782480 T ixgbe_reset_hw_82598 +ffffffff81782950 T ixgbe_get_media_type_82598 +ffffffff81782a10 T ixgbe_get_supported_physical_layer_82598 +ffffffff81782be0 T ixgbe_read_analog_reg8_82598 +ffffffff81782c90 T ixgbe_write_analog_reg8_82598 +ffffffff81782d10 T ixgbe_set_lan_id_multi_port_pcie_82598 +ffffffff81782db0 T ixgbe_enable_rx_dma_82598 +ffffffff81782e00 T ixgbe_set_vmdq_82598 +ffffffff81782eb0 T ixgbe_clear_vmdq_82598 +ffffffff81782f60 T ixgbe_set_vfta_82598 +ffffffff81783090 T ixgbe_clear_vfta_82598 +ffffffff81783240 T ixgbe_fc_enable_82598 +ffffffff817836a0 T ixgbe_read_i2c_eeprom_82598 +ffffffff817836c0 T ixgbe_check_mac_link_82598 +ffffffff81783950 T ixgbe_setup_mac_link_82598 +ffffffff81783b10 T ixgbe_get_link_capabilities_82598 +ffffffff81783bd0 T ixgbe_setup_copper_link_82598 +ffffffff81783ce0 T ixgbe_start_mac_link_82598 +ffffffff81783e00 T ixgbe_validate_link_ready +ffffffff81783eb0 T ixgbe_read_i2c_phy_82598 +ffffffff81785000 T ixgbe_init_mac_link_ops_82599 +ffffffff81785190 T ixgbe_disable_tx_laser_multispeed_fiber +ffffffff81785250 T ixgbe_enable_tx_laser_multispeed_fiber +ffffffff817852d0 T ixgbe_flap_tx_laser_multispeed_fiber +ffffffff81785410 T ixgbe_setup_mac_link_82599 +ffffffff817856a0 T ixgbe_set_hard_rate_select_speed +ffffffff81785760 T ixgbe_verify_lesm_fw_enabled_82599 +ffffffff81785820 T ixgbe_setup_mac_link_smartspeed +ffffffff81785ba0 T ixgbe_init_phy_ops_82599 +ffffffff81785cf0 T ixgbe_read_i2c_byte_82599 +ffffffff81785e60 T ixgbe_write_i2c_byte_82599 +ffffffff81785fd0 T ixgbe_setup_copper_link_82599 +ffffffff81786030 T ixgbe_setup_sfp_modules_82599 +ffffffff817861f0 T prot_autoc_read_82599 +ffffffff81786300 T prot_autoc_write_82599 +ffffffff81786470 T ixgbe_reset_pipeline_82599 +ffffffff817867b0 T ixgbe_init_ops_82599 +ffffffff81786990 T ixgbe_identify_phy_82599 +ffffffff81786a20 T ixgbe_reset_hw_82599 +ffffffff81786f60 T ixgbe_get_media_type_82599 +ffffffff81787090 T ixgbe_get_supported_physical_layer_82599 +ffffffff81787250 T ixgbe_enable_rx_dma_82599 +ffffffff817872c0 T ixgbe_read_analog_reg8_82599 +ffffffff81787370 T ixgbe_write_analog_reg8_82599 +ffffffff817873f0 T ixgbe_start_hw_82599 +ffffffff817874f0 T ixgbe_get_link_capabilities_82599 +ffffffff81787630 T ixgbe_stop_mac_link_on_d3_82599 +ffffffff817876e0 T ixgbe_read_eeprom_82599 +ffffffff81787710 T ixgbe_start_mac_link_82599 +ffffffff817878f0 T ixgbe_verify_fw_version_82599 +ffffffff81788000 T ixgbe_init_ops_X540 +ffffffff81788220 T ixgbe_init_eeprom_params_X540 +ffffffff817882a0 T ixgbe_read_eerd_X540 +ffffffff81788330 T ixgbe_write_eewr_X540 +ffffffff817883c0 T ixgbe_update_eeprom_checksum_X540 +ffffffff81788490 T ixgbe_validate_eeprom_checksum_X540 +ffffffff81788580 T ixgbe_calc_eeprom_checksum_X540 +ffffffff81788720 T ixgbe_reset_hw_X540 +ffffffff81788ab0 T ixgbe_get_media_type_X540 +ffffffff81788ae0 T ixgbe_get_supported_physical_layer_X540 +ffffffff81788b50 T ixgbe_start_hw_X540 +ffffffff81788ba0 T ixgbe_acquire_swfw_sync_X540 +ffffffff81788ff0 T ixgbe_release_swfw_sync_X540 +ffffffff81789120 T ixgbe_init_swfw_sync_X540 +ffffffff81789200 T ixgbe_setup_mac_link_X540 +ffffffff81789220 T ixgbe_blink_led_start_X540 +ffffffff81789340 T ixgbe_blink_led_stop_X540 +ffffffff81789440 T ixgbe_get_link_capabilities_X540 +ffffffff81789480 T ixgbe_update_flash_X540 +ffffffff81789660 T ixgbe_poll_flash_update_done_X540 +ffffffff817896f0 T ixgbe_get_swfw_sync_semaphore +ffffffff81789880 T ixgbe_release_swfw_sync_semaphore +ffffffff8178a000 T ixgbe_init_ops_X550 +ffffffff8178a110 T ixgbe_dmac_config_X550 +ffffffff8178a1f0 T ixgbe_dmac_config_tcs_X550 +ffffffff8178a340 T ixgbe_dmac_update_tcs_X550 +ffffffff8178a3f0 T ixgbe_set_source_address_pruning_X550 +ffffffff8178a4d0 T ixgbe_init_eeprom_params_X550 +ffffffff8178a550 T ixgbe_calc_eeprom_checksum_X550 +ffffffff8178a560 T ixgbe_read_ee_hostif_X550 +ffffffff8178a630 T ixgbe_write_ee_hostif_X550 +ffffffff8178a6f0 T ixgbe_update_eeprom_checksum_X550 +ffffffff8178a880 T ixgbe_validate_eeprom_checksum_X550 +ffffffff8178a9c0 T ixgbe_disable_rx_x550 +ffffffff8178aae0 T ixgbe_led_on_t_X550em +ffffffff8178aba0 T ixgbe_led_off_t_X550em +ffffffff8178ac60 T ixgbe_read_cs4227 +ffffffff8178ac90 T ixgbe_write_cs4227 +ffffffff8178acb0 T ixgbe_read_pe +ffffffff8178ad00 T ixgbe_write_pe +ffffffff8178ad50 T ixgbe_reset_cs4227 +ffffffff8178afd0 T ixgbe_check_cs4227 +ffffffff8178b180 T ixgbe_setup_mux_ctl +ffffffff8178b200 T ixgbe_identify_phy_x550em +ffffffff8178b420 T ixgbe_read_mng_if_sel_x550em +ffffffff8178b490 T ixgbe_fw_phy_activity +ffffffff8178b5b0 T ixgbe_get_phy_id_fw +ffffffff8178b6b0 T ixgbe_identify_phy_fw +ffffffff8178b700 T ixgbe_shutdown_fw_phy +ffffffff8178b760 T ixgbe_read_phy_reg_x550em +ffffffff8178b790 T ixgbe_write_phy_reg_x550em +ffffffff8178b7c0 T ixgbe_init_ops_X550EM +ffffffff8178ba70 T ixgbe_get_bus_info_X550em +ffffffff8178bac0 T ixgbe_get_media_type_X550em +ffffffff8178bbb0 T ixgbe_setup_sfp_modules_X550em +ffffffff8178bd40 T ixgbe_get_link_capabilities_X550em +ffffffff8178be10 T ixgbe_reset_hw_X550em +ffffffff8178c480 T ixgbe_get_supported_physical_layer_X550em +ffffffff8178c600 T ixgbe_setup_fc_X550em +ffffffff8178c750 T ixgbe_init_phy_ops_X550em +ffffffff8178cc20 T ixgbe_setup_fw_link +ffffffff8178cd50 T ixgbe_fc_autoneg_fw +ffffffff8178cd70 T ixgbe_setup_eee_fw +ffffffff8178cdd0 T ixgbe_init_ops_X550EM_a +ffffffff8178cf00 T ixgbe_read_iosf_sb_reg_x550 +ffffffff8178d080 T ixgbe_write_iosf_sb_reg_x550 +ffffffff8178d200 T ixgbe_read_iosf_sb_reg_x550a +ffffffff8178d290 T ixgbe_write_iosf_sb_reg_x550a +ffffffff8178d320 T ixgbe_acquire_swfw_sync_X550a +ffffffff8178d450 T ixgbe_release_swfw_sync_X550a +ffffffff8178d4e0 T ixgbe_fc_autoneg_fiber_x550em_a +ffffffff8178d520 T ixgbe_fc_autoneg_backplane_x550em_a +ffffffff8178d680 T ixgbe_setup_fc_backplane_x550em_a +ffffffff8178d870 T ixgbe_fc_autoneg_sgmii_x550em_a +ffffffff8178d960 T ixgbe_init_ops_X550EM_x +ffffffff8178da20 T ixgbe_acquire_swfw_sync_X550em +ffffffff8178dad0 T ixgbe_release_swfw_sync_X550em +ffffffff8178db60 T ixgbe_iosf_wait +ffffffff8178dc10 T ixgbe_get_phy_token +ffffffff8178dc90 T ixgbe_put_phy_token +ffffffff8178dd10 T ixgbe_supported_sfp_modules_X550em +ffffffff8178dd90 T ixgbe_identify_sfp_module_X550em +ffffffff8178de00 T ixgbe_init_mac_link_ops_X550em +ffffffff8178df40 T ixgbe_restart_an_internal_phy_x550em +ffffffff8178e050 T ixgbe_setup_sgmii +ffffffff8178e2f0 T ixgbe_setup_sgmii_fw +ffffffff8178e5c0 T ixgbe_setup_mac_link_sfp_x550a +ffffffff8178e7b0 T ixgbe_setup_mac_link_sfp_x550em +ffffffff8178e870 T ixgbe_setup_mac_link_t_X550em +ffffffff8178e920 T ixgbe_check_link_t_X550em +ffffffff8178e9f0 T ixgbe_get_lasi_ext_t_x550em +ffffffff8178eb70 T ixgbe_enable_lasi_ext_t_x550em +ffffffff8178ed00 T ixgbe_setup_kr_speed_x550em +ffffffff8178ef10 T ixgbe_reset_phy_fw +ffffffff8178efe0 T ixgbe_check_overtemp_fw +ffffffff8178f070 T ixgbe_read_phy_reg_x550a +ffffffff8178f110 T ixgbe_write_phy_reg_x550a +ffffffff8178f1b0 T ixgbe_setup_kr_x550em +ffffffff8178f220 T ixgbe_setup_internal_phy_t_x550em +ffffffff8178f3b0 T ixgbe_enter_lplu_t_x550em +ffffffff8178f6a0 T ixgbe_handle_lasi_ext_t_x550em +ffffffff8178f720 T ixgbe_reset_phy_t_X550em +ffffffff8178f770 T ixgbe_set_mdio_speed +ffffffff8178f840 T ixgbe_init_ext_t_x550em +ffffffff8178f8f0 T ixgbe_setup_sfi_x550a +ffffffff8178faa0 T ixgbe_setup_ixfi_x550em_x +ffffffff8178fc80 T ixgbe_setup_ixfi_x550em +ffffffff8178fe60 T ixgbe_ext_phy_t_x550em_get_link +ffffffff8178fef0 T ixgbe_setup_phy_loopback_x550em +ffffffff817900e0 T ixgbe_read_ee_hostif_buffer_X550 +ffffffff81790270 T ixgbe_write_ee_hostif_data_X550 +ffffffff817902d0 T ixgbe_checksum_ptr_x550 +ffffffff81790450 T ixgbe_calc_checksum_X550 +ffffffff817905e0 T ixgbe_update_flash_X550 +ffffffff81790630 T ixgbe_get_lcd_t_x550em +ffffffff817906e0 T ixgbe_set_mux +ffffffff81791000 T ixgbe_read_i2c_combined_generic_int +ffffffff81791250 T ixgbe_i2c_start +ffffffff817913b0 T ixgbe_clock_in_i2c_byte +ffffffff817914a0 T ixgbe_clock_out_i2c_bit +ffffffff817915b0 T ixgbe_i2c_stop +ffffffff81791730 T ixgbe_i2c_bus_clear +ffffffff81791850 T ixgbe_read_i2c_combined_generic +ffffffff81791870 T ixgbe_read_i2c_combined_generic_unlocked +ffffffff81791890 T ixgbe_write_i2c_combined_generic_int +ffffffff81791a70 T ixgbe_write_i2c_combined_generic +ffffffff81791a90 T ixgbe_write_i2c_combined_generic_unlocked +ffffffff81791ab0 T ixgbe_init_phy_ops_generic +ffffffff81791be0 T ixgbe_identify_phy_generic +ffffffff817920b0 T ixgbe_reset_phy_generic +ffffffff81792240 T ixgbe_read_phy_reg_generic +ffffffff817922e0 T ixgbe_write_phy_reg_generic +ffffffff81792380 T ixgbe_read_phy_reg_mdi +ffffffff81792500 T ixgbe_write_phy_reg_mdi +ffffffff81792660 T ixgbe_setup_phy_link_generic +ffffffff81792910 T ixgbe_setup_phy_link_speed_generic +ffffffff81792960 T ixgbe_get_phy_firmware_version_generic +ffffffff81792980 T ixgbe_read_i2c_byte_generic +ffffffff817929a0 T ixgbe_write_i2c_byte_generic +ffffffff817929c0 T ixgbe_read_i2c_eeprom_generic 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xge_alloc_txmem +ffffffff8179f0a0 T xge_alloc_rxmem +ffffffff8179f380 T xge_add_rxbuf +ffffffff8179f560 T xge_xgmii_mediachange +ffffffff8179f590 T xge_ifmedia_status +ffffffff8179f600 T xge_ioctl +ffffffff8179f880 T xge_start +ffffffff8179fbf0 T xge_intr +ffffffff817a01b0 T xge_enable +ffffffff817a0260 T xge_init +ffffffff817a06f0 T xge_stop +ffffffff817a07c0 T xge_setpromisc +ffffffff817a0840 T xge_setmulti +ffffffff817a1000 T thtc_match +ffffffff817a1060 T thtc_attach +ffffffff817a1280 T tht_match +ffffffff817a12b0 T tht_attach +ffffffff817a14e0 T thtc_lookup +ffffffff817a1560 T tht_intr +ffffffff817a1730 T thtc_print +ffffffff817a1790 T tht_sw_reset +ffffffff817a1c80 T tht_lladdr_read +ffffffff817a1d30 T tht_ioctl +ffffffff817a1ec0 T tht_start +ffffffff817a2490 T tht_watchdog +ffffffff817a24c0 T tht_media_change +ffffffff817a24f0 T tht_media_status +ffffffff817a25d0 T tht_mountroot +ffffffff817a27a0 T tht_fifo_alloc +ffffffff817a28b0 T tht_fw_load +ffffffff817a2c10 T tht_fifo_free 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myx_iff +ffffffff817aa4e0 T myx_setlladdr +ffffffff817aa5a0 T myx_tx_init +ffffffff817aa740 T myx_rx_init +ffffffff817aa970 T myx_rx_fill +ffffffff817aac50 T myx_rx_empty +ffffffff817aad20 T myx_rx_free +ffffffff817aada0 T myx_tx_free +ffffffff817aae20 T myx_tx_empty +ffffffff817aaef0 T myx_kstat_stop +ffffffff817aafe0 T myx_write_txd_tail +ffffffff817ab180 T myx_load_mbuf +ffffffff817ab230 T myx_txeof +ffffffff817ab380 T myx_rxeof +ffffffff817ab5d0 T myx_buf_fill +ffffffff817ab680 T myx_kstat_read +ffffffff817ab8d0 T myx_kstat_tick +ffffffff817ab960 T myx_kstat_start +ffffffff817ac000 T oce_match +ffffffff817ac020 T oce_attach +ffffffff817ac6f0 T oce_pci_alloc +ffffffff817ac970 T oce_dma_alloc +ffffffff817acb90 T oce_init_fw +ffffffff817acda0 T oce_mbox_init +ffffffff817acdf0 T oce_get_fw_config +ffffffff817acfe0 T oce_check_native_mode +ffffffff817ad140 T oce_macaddr_get +ffffffff817ad290 T oce_intr +ffffffff817ad480 T oce_init_stats +ffffffff817ad4f0 T oce_init_queues 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oce_new_eq +ffffffff817b33b0 T oce_new_mq +ffffffff817b3720 T oce_drain_mq +ffffffff817b3840 T oce_new_cq +ffffffff817b3c60 T oce_load_ring +ffffffff817b3d60 T oce_mbox_dispatch +ffffffff817b3f30 T oce_macaddr_add +ffffffff817b4080 T oce_macaddr_del +ffffffff817b41b0 T oce_stats_be2 +ffffffff817b42e0 T oce_stats_be3 +ffffffff817b4400 T oce_stats_xe +ffffffff817b5000 T dc_pci_match +ffffffff817b5080 T dc_pci_attach +ffffffff817b58a0 T dc_pci_detach +ffffffff817b6000 T epic_pci_match +ffffffff817b6020 T epic_pci_attach +ffffffff817b7000 T ti_pci_match +ffffffff817b7020 T ti_pci_attach +ffffffff817b8000 T ne_pci_match +ffffffff817b8100 T ne_pci_attach +ffffffff817b8470 T ne_pci_lookup +ffffffff817b9000 T gem_match_pci +ffffffff817b9020 T gem_attach_pci +ffffffff817b9290 T gem_detach_pci +ffffffff817b9310 T gem_pci_enaddr +ffffffff817ba000 T cas_match +ffffffff817ba020 T cas_attach +ffffffff817ba1b0 T cas_pci_enaddr +ffffffff817ba4b0 T cas_intr +ffffffff817ba620 T cas_config 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cas_tint +ffffffff817bd7b0 T cas_encap +ffffffff817be000 T sf_pci_match +ffffffff817be020 T sf_pci_attach +ffffffff817bf000 T sis_probe +ffffffff817bf020 T sis_attach +ffffffff817bfa70 T sis_activate +ffffffff817bfaf0 T sis_reverse +ffffffff817bfb50 T sis_delay +ffffffff817bfc60 T sis_eeprom_idle +ffffffff817c02c0 T sis_eeprom_putbyte +ffffffff817c05f0 T sis_eeprom_getword +ffffffff817c0c80 T sis_read_eeprom +ffffffff817c0d10 T sis_read_cmos +ffffffff817c0dd0 T sis_read_mac +ffffffff817c0fa0 T sis_read96x_mac +ffffffff817c10d0 T sis_mii_sync +ffffffff817c11f0 T sis_mii_send +ffffffff817c1380 T sis_mii_readreg +ffffffff817c1920 T sis_mii_writereg +ffffffff817c1bf0 T sis_miibus_readreg +ffffffff817c1dd0 T sis_miibus_writereg +ffffffff817c1f50 T sis_miibus_statchg +ffffffff817c22c0 T sis_mchash +ffffffff817c2330 T sis_iff +ffffffff817c2350 T sis_iff_ns +ffffffff817c25f0 T sis_iff_sis +ffffffff817c28a0 T sis_reset +ffffffff817c29c0 T sis_intr +ffffffff817c2b00 T sis_tick +ffffffff817c2b60 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iwm_set_hw_address_8000 +ffffffff81810860 T iwm_parse_nvm_data +ffffffff81810ab0 T iwm_parse_nvm_sections +ffffffff81810bb0 T iwm_nvm_init +ffffffff81810e70 T iwm_firmware_load_sect +ffffffff81810f20 T iwm_firmware_load_chunk +ffffffff818111d0 T iwm_load_firmware_7000 +ffffffff81811420 T iwm_load_cpu_sections_8000 +ffffffff818117b0 T iwm_load_firmware_8000 +ffffffff818119c0 T iwm_load_firmware +ffffffff81811aa0 T iwm_start_fw +ffffffff81811c60 T iwm_send_tx_ant_cfg +ffffffff81811cf0 T iwm_send_phy_cfg_cmd +ffffffff81811da0 T iwm_send_dqa_cmd +ffffffff81811e30 T iwm_load_ucode_wait_alive +ffffffff81812070 T iwm_save_fw_paging +ffffffff818120e0 T iwm_send_paging_cmd +ffffffff81812230 T iwm_free_fw_paging +ffffffff81812390 T iwm_run_init_mvm_ucode +ffffffff818127e0 T iwm_send_bt_init_conf +ffffffff81812870 T iwm_sf_config +ffffffff81812ac0 T iwm_config_ltr +ffffffff81812b80 T iwm_get_signal_strength +ffffffff81812be0 T iwm_rxmq_get_signal_strength +ffffffff81812c20 T iwm_rx_rx_phy_cmd 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T iwm_phy_ctxt_cmd_uhb +ffffffff818158c0 T iwm_phy_ctxt_cmd +ffffffff81815a10 T iwm_update_sched +ffffffff81815ae0 T iwm_send_cmd_status +ffffffff81815bf0 T iwm_cmd_done +ffffffff81815d90 T iwm_tx_fill_cmd +ffffffff818161c0 T iwm_rval2ridx +ffffffff81816250 T iwm_tx +ffffffff81816c70 T iwm_flush_tx_path +ffffffff81816d30 T iwm_wait_tx_queues_empty +ffffffff81816df0 T iwm_led_enable +ffffffff81816e20 T iwm_led_disable +ffffffff81816e50 T iwm_led_is_enabled +ffffffff81816eb0 T iwm_led_blink_timeout +ffffffff81816f30 T iwm_led_blink_start +ffffffff81816f80 T iwm_led_blink_stop +ffffffff81816fc0 T iwm_beacon_filter_send_cmd +ffffffff81817040 T iwm_beacon_filter_set_cqm_params +ffffffff81817070 T iwm_update_beacon_abort +ffffffff81817160 T iwm_power_build_cmd +ffffffff818171f0 T iwm_power_mac_update_mode +ffffffff81817400 T iwm_power_update_device +ffffffff818174a0 T iwm_enable_beacon_filter +ffffffff81817590 T iwm_disable_beacon_filter +ffffffff81817660 T iwm_add_sta_cmd +ffffffff81817a60 T iwm_add_aux_sta +ffffffff81817bf0 T iwm_drain_sta +ffffffff81817da0 T iwm_rm_sta_cmd +ffffffff81817e60 T iwm_scan_rx_chain +ffffffff81817ed0 T iwm_scan_rate_n_flags +ffffffff81817fc0 T iwm_lmac_scan_fill_channels +ffffffff818180a0 T iwm_umac_scan_fill_channels +ffffffff81818190 T iwm_fill_probe_req_v1 +ffffffff81818230 T iwm_fill_probe_req +ffffffff81818470 T iwm_lmac_scan +ffffffff81818960 T iwm_config_umac_scan +ffffffff81818b70 T iwm_umac_scan_size +ffffffff81818bd0 T iwm_get_scan_req_umac_chan_param +ffffffff81818c20 T iwm_get_scan_req_umac_data +ffffffff81818c70 T iwm_umac_scan +ffffffff818190e0 T iwm_mcc_update +ffffffff81819170 T iwm_ridx2rate +ffffffff818191e0 T iwm_ack_rates +ffffffff81819490 T iwm_mac_ctxt_cmd_common +ffffffff81819790 T iwm_mac_ctxt_cmd_fill_sta +ffffffff81819840 T iwm_update_quotas +ffffffff81819c30 T iwm_del_task +ffffffff81819c90 T iwm_scan +ffffffff81819f00 T iwm_scan_abort +ffffffff8181a020 T iwm_bgscan +ffffffff8181a0c0 T iwm_bgscan_done +ffffffff8181a160 T iwm_bgscan_done_task +ffffffff8181a3b0 T iwm_umac_scan_abort +ffffffff8181a440 T iwm_lmac_scan_abort +ffffffff8181a4e0 T iwm_auth +ffffffff8181a8e0 T iwm_deauth +ffffffff8181ac40 T iwm_run +ffffffff8181b320 T iwm_allow_mcast +ffffffff8181b420 T iwm_run_stop +ffffffff8181ba90 T iwm_node_alloc +ffffffff8181bab0 T iwm_set_key_v1 +ffffffff8181bbf0 T iwm_set_key +ffffffff8181be60 T iwm_delete_key_v1 +ffffffff8181bf80 T iwm_delete_key +ffffffff8181c1f0 T iwm_calib_timeout +ffffffff8181c2a0 T iwm_set_rate_table_vht +ffffffff8181c5c0 T iwm_set_rate_table +ffffffff8181c9c0 T iwm_media_change +ffffffff8181cba0 T iwm_stop +ffffffff8181d030 T iwm_init +ffffffff8181d2f0 T iwm_newstate_task +ffffffff8181d460 T iwm_newstate +ffffffff8181d5c0 T iwm_endscan +ffffffff8181d610 T iwm_fill_sf_command +ffffffff8181d700 T iwm_send_soc_conf +ffffffff8181d830 T iwm_send_update_mcc_cmd +ffffffff8181d9e0 T iwm_send_temp_report_ths_cmd +ffffffff8181dab0 T iwm_tt_tx_backoff +ffffffff8181db40 T iwm_fill_paging_mem +ffffffff8181dd70 T iwm_alloc_fw_paging_mem +ffffffff8181df10 T iwm_init_hw +ffffffff8181e8e0 T iwm_preinit +ffffffff8181eaf0 T iwm_start +ffffffff8181ecb0 T iwm_watchdog +ffffffff8181ee50 T iwm_nic_error +ffffffff8181f340 T iwm_dump_driver_status +ffffffff8181f3e0 T iwm_ioctl +ffffffff8181f540 T iwm_nic_umac_error +ffffffff8181f980 T iwm_desc_lookup +ffffffff8181fb10 T iwm_rx_pkt_valid +ffffffff8181fb60 T iwm_rx_pkt +ffffffff81820900 T iwm_notif_intr +ffffffff81820a60 T iwm_intr +ffffffff81820e90 T iwm_intr_msix +ffffffff81821130 T iwm_match +ffffffff81821150 T iwm_attach_hook +ffffffff81821190 T iwm_attach +ffffffff81822270 T iwm_radiotap_attach +ffffffff81822300 T iwm_init_task +ffffffff818223c0 T iwm_resume +ffffffff818224f0 T iwm_wakeup +ffffffff81822590 T iwm_activate +ffffffff81823000 T iwx_lookup_cmd_ver +ffffffff81823070 T iwx_lookup_notif_ver +ffffffff818230e0 T iwx_is_mimo_ht_plcp +ffffffff81823120 T iwx_is_mimo_mcs +ffffffff81823160 T iwx_store_cscheme +ffffffff818231b0 T iwx_ctxt_info_alloc_dma +ffffffff81823240 T iwx_dma_contig_alloc +ffffffff81823420 T iwx_ctxt_info_free_paging +ffffffff81823580 T iwx_dma_contig_free +ffffffff81823630 T iwx_get_num_sections +ffffffff818236b0 T iwx_init_fw_sec +ffffffff81823b50 T iwx_fw_version_str +ffffffff81823b90 T iwx_alloc_fw_monitor_block +ffffffff81823c30 T iwx_alloc_fw_monitor +ffffffff81823ce0 T iwx_apply_debug_destination +ffffffff81824220 T iwx_nic_lock +ffffffff81824360 T iwx_write_prph +ffffffff81824400 T iwx_set_bits_prph +ffffffff81824420 T iwx_clear_bits_prph +ffffffff81824440 T iwx_read_prph +ffffffff818244d0 T iwx_nic_unlock +ffffffff81824580 T iwx_set_ltr +ffffffff818246c0 T iwx_ctxt_info_init +ffffffff81824980 T iwx_ctxt_info_free_fw_img +ffffffff81824af0 T iwx_ctxt_info_gen3_init +ffffffff818250e0 T iwx_write_umac_prph +ffffffff81825180 T iwx_firmware_store_section +ffffffff81825220 T iwx_set_default_calib +ffffffff81825270 T iwx_fw_info_free +ffffffff81825300 T iwx_read_firmware +ffffffff81825e80 T iwx_prph_addr_mask +ffffffff81825ec0 T iwx_read_prph_unlocked +ffffffff81825f30 T iwx_nic_assert_locked +ffffffff81825f90 T iwx_write_prph_unlocked +ffffffff81826010 T iwx_write_prph64 +ffffffff81826130 T iwx_read_umac_prph_unlocked +ffffffff818261b0 T iwx_read_umac_prph +ffffffff81826250 T iwx_write_umac_prph_unlocked +ffffffff818262d0 T iwx_read_mem +ffffffff81826400 T iwx_write_mem +ffffffff81826540 T iwx_write_mem32 +ffffffff81826640 T iwx_poll_bit +ffffffff81826710 T iwx_set_bits_mask_prph +ffffffff818268f0 T iwx_alloc_rx_ring +ffffffff81826ad0 T iwx_rx_addbuf +ffffffff81826ce0 T iwx_free_rx_ring +ffffffff81826f90 T iwx_disable_rx_dma +ffffffff818271f0 T iwx_reset_rx_ring +ffffffff81827290 T iwx_alloc_tx_ring +ffffffff81827490 T iwx_free_tx_ring +ffffffff81827720 T iwx_reset_tx_ring +ffffffff81827980 T iwx_enable_rfkill_int +ffffffff81827a60 T iwx_check_rfkill +ffffffff81827ae0 T iwx_enable_interrupts +ffffffff81827b90 T iwx_enable_fwload_interrupt +ffffffff81827c70 T iwx_restore_interrupts +ffffffff81827ca0 T iwx_disable_interrupts +ffffffff81827d50 T iwx_ict_reset +ffffffff81827f10 T iwx_set_hw_ready +ffffffff818280e0 T iwx_prepare_card_hw +ffffffff81828220 T iwx_force_power_gating +ffffffff818282d0 T iwx_apm_config +ffffffff818283a0 T iwx_apm_init +ffffffff818285f0 T iwx_apm_stop +ffffffff818289b0 T iwx_init_msix_hw +ffffffff81828a50 T iwx_conf_msix_hw +ffffffff81828ff0 T iwx_clear_persistence_bit +ffffffff81829170 T iwx_start_hw +ffffffff81829560 T iwx_stop_device +ffffffff81829ad0 T iwx_nic_config +ffffffff81829b50 T iwx_nic_rx_init +ffffffff81829ba0 T iwx_nic_init +ffffffff81829cc0 T iwx_enable_txq +ffffffff81829e90 T iwx_send_cmd +ffffffff8182a470 T iwx_free_resp +ffffffff8182a4e0 T iwx_disable_txq +ffffffff8182a650 T iwx_post_alive +ffffffff8182a660 T iwx_schedule_session_protection +ffffffff8182a730 T iwx_send_cmd_pdu +ffffffff8182a7b0 T iwx_unprotect_session +ffffffff8182a880 T iwx_fw_valid_tx_ant +ffffffff8182a8c0 T iwx_fw_valid_rx_ant +ffffffff8182a900 T iwx_init_channel_map +ffffffff8182aaf0 T iwx_mimo_enabled +ffffffff8182ab30 T iwx_setup_ht_rates +ffffffff8182abd0 T iwx_setup_vht_rates +ffffffff8182ac50 T iwx_init_reorder_buffer +ffffffff8182acb0 T iwx_clear_reorder_buffer +ffffffff8182ad60 T iwx_rx_ba_session_expired +ffffffff8182ae60 T iwx_rx_bar_frame_release +ffffffff8182af00 T iwx_release_frames +ffffffff8182b0f0 T iwx_reorder_timer_expired +ffffffff8182b2a0 T iwx_sta_rx_agg +ffffffff8182b6f0 T iwx_send_cmd_pdu_status +ffffffff8182b780 T iwx_mac_ctxt_task +ffffffff8182b910 T iwx_mac_ctxt_cmd +ffffffff8182bb10 T iwx_phy_ctxt_task +ffffffff8182bcd0 T iwx_phy_ctxt_update +ffffffff8182c000 T iwx_updatechan +ffffffff8182c0c0 T iwx_add_task +ffffffff8182c130 T iwx_updateprot +ffffffff8182c1f0 T iwx_updateslot +ffffffff8182c2b0 T iwx_updateedca +ffffffff8182c370 T iwx_updatedtim +ffffffff8182c430 T iwx_sta_tx_agg_start +ffffffff8182c620 T iwx_ba_task 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T iwx_rx_frame +ffffffff8182e750 T iwx_detect_duplicate +ffffffff8182e850 T iwx_is_sn_less +ffffffff8182e8a0 T iwx_oldsn_workaround +ffffffff8182e960 T iwx_rx_reorder +ffffffff8182ef90 T iwx_rx_mpdu_mq +ffffffff8182f2e0 T iwx_clear_tx_desc +ffffffff8182f450 T iwx_txd_done +ffffffff8182f510 T iwx_txq_advance +ffffffff8182f850 T iwx_tx_update_byte_tbl +ffffffff8182f8f0 T iwx_rx_tx_cmd +ffffffff8182fa60 T iwx_clear_oactive +ffffffff8182fae0 T iwx_rx_compressed_ba +ffffffff8182fc60 T iwx_rx_bmiss +ffffffff8182fd50 T iwx_binding_cmd +ffffffff8182fed0 T iwx_get_vht_ctrl_pos +ffffffff8182ff40 T iwx_phy_ctxt_cmd_uhb_v3 +ffffffff81830150 T iwx_phy_ctxt_cmd_v3 +ffffffff81830360 T iwx_phy_ctxt_cmd +ffffffff81830460 T iwx_send_cmd_status +ffffffff81830570 T iwx_cmd_done +ffffffff81830650 T iwx_tx_fill_cmd +ffffffff81830a30 T iwx_rval2ridx +ffffffff81830ac0 T iwx_tx +ffffffff818311c0 T iwx_flush_sta_tids +ffffffff81831370 T iwx_wait_tx_queues_empty +ffffffff81831430 T iwx_drain_sta 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iwx_mac_ctxt_cmd_fill_sta +ffffffff81833780 T iwx_clear_statistics +ffffffff81833850 T iwx_del_task +ffffffff818338b0 T iwx_scan +ffffffff81833a50 T iwx_scan_abort +ffffffff81833af0 T iwx_bgscan +ffffffff81833b70 T iwx_bgscan_done +ffffffff81833c10 T iwx_bgscan_done_task +ffffffff81833d80 T iwx_umac_scan_abort +ffffffff81833e10 T iwx_enable_mgmt_queue +ffffffff81833e90 T iwx_rs_rval2idx +ffffffff81833f00 T iwx_rs_ht_rates +ffffffff81833fd0 T iwx_rs_vht_rates +ffffffff81834090 T iwx_rs_init +ffffffff818344c0 T iwx_rs_update +ffffffff81834640 T iwx_auth +ffffffff81834c50 T iwx_deauth +ffffffff81834ef0 T iwx_run +ffffffff81835530 T iwx_sf_config +ffffffff81835780 T iwx_allow_mcast +ffffffff81835880 T iwx_run_stop +ffffffff81835c50 T iwx_node_alloc +ffffffff81835c70 T iwx_set_key +ffffffff81835d90 T iwx_add_sta_key +ffffffff81836000 T iwx_setkey_task +ffffffff818360d0 T iwx_delete_key +ffffffff81836250 T iwx_media_change +ffffffff81836430 T iwx_stop +ffffffff818368d0 T iwx_init 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iwx_init_task +ffffffff8183bc30 T iwx_resume +ffffffff8183bd60 T iwx_wakeup +ffffffff8183be00 T iwx_activate +ffffffff8183c000 T cmpci_match +ffffffff8183c020 T cmpci_attach +ffffffff8183c4f0 T cmpci_activate +ffffffff8183c570 T cmpci_open +ffffffff8183c5a0 T cmpci_close +ffffffff8183c5d0 T cmpci_set_params +ffffffff8183d030 T cmpci_round_blocksize +ffffffff8183d060 T cmpci_halt_output +ffffffff8183d210 T cmpci_halt_input +ffffffff8183d380 T cmpci_set_port +ffffffff8183d4d0 T cmpci_get_port +ffffffff8183d5a0 T cmpci_query_devinfo +ffffffff8183dd70 T cmpci_malloc +ffffffff8183ddc0 T cmpci_free +ffffffff8183de90 T cmpci_round_buffersize +ffffffff8183ded0 T cmpci_trigger_output +ffffffff8183e1c0 T cmpci_trigger_input +ffffffff8183e470 T cmpci_mixerreg_read +ffffffff8183e500 T cmpci_mixerreg_write +ffffffff8183e570 T cmpci_reg_partial_write_1 +ffffffff8183e600 T cmpci_reg_partial_write_4 +ffffffff8183e690 T cmpci_reg_set_1 +ffffffff8183e6f0 T cmpci_reg_clear_1 +ffffffff8183e760 T cmpci_reg_set_4 +ffffffff8183e7c0 T cmpci_reg_clear_4 +ffffffff8183e830 T cmpci_reg_set_reg_misc +ffffffff8183e870 T cmpci_reg_clear_reg_misc +ffffffff8183e8b0 T cmpci_rate_to_index +ffffffff8183e930 T cmpci_index_to_rate +ffffffff8183e960 T cmpci_index_to_divider +ffffffff8183e990 T cmpci_intr +ffffffff8183ec90 T cmpci_set_mixer_gain +ffffffff8183f3e0 T cmpci_resume +ffffffff8183f450 T cmpci_alloc_dmamem +ffffffff8183f620 T cmpci_free_dmamem +ffffffff8183f6e0 T cmpci_find_dmamem +ffffffff8183f730 T cmpci_adjust +ffffffff8183f770 T cmpci_set_out_ports +ffffffff8183fd60 T cmpci_set_in_ports +ffffffff81840000 T iha_pci_probe +ffffffff81840060 T iha_pci_attach +ffffffff81841000 T pcscp_match +ffffffff81841030 T pcscp_attach +ffffffff81841410 T pcscp_read_reg +ffffffff81841440 T pcscp_write_reg +ffffffff81841470 T pcscp_dma_isintr +ffffffff818414c0 T pcscp_dma_reset +ffffffff81841520 T pcscp_dma_intr +ffffffff81841a80 T pcscp_dma_setup +ffffffff81841d00 T pcscp_dma_go +ffffffff81841e30 T pcscp_dma_stop +ffffffff81841ec0 T pcscp_dma_isactive +ffffffff81842000 T bge_probe +ffffffff81842020 T bge_attach +ffffffff81843510 T bge_detach +ffffffff81843660 T bge_activate +ffffffff81843700 T bge_readmem_ind +ffffffff818437b0 T bge_writemem_ind +ffffffff81843870 T bge_writereg_ind +ffffffff818438c0 T bge_writembx +ffffffff81843900 T bge_ape_lock_init +ffffffff81843b20 T bge_ape_read_fw_ver +ffffffff81843c80 T bge_ape_lock +ffffffff81843e40 T bge_ape_unlock +ffffffff81843f00 T bge_ape_send_event +ffffffff818440f0 T bge_ape_driver_state_change +ffffffff818442d0 T bge_nvram_getbyte +ffffffff81844520 T bge_read_nvram +ffffffff818445c0 T bge_eeprom_getbyte +ffffffff81844750 T bge_read_eeprom +ffffffff818447e0 T bge_miibus_readreg +ffffffff81844ab0 T bge_miibus_writereg +ffffffff81844db0 T bge_miibus_statchg +ffffffff81844fa0 T bge_newbuf +ffffffff81845120 T bge_newbuf_jumbo +ffffffff81845390 T bge_init_rx_ring_std +ffffffff818454f0 T bge_fill_rx_ring_std +ffffffff81845650 T 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T vic_read_cmd +ffffffff81890140 T vic_getlladdr +ffffffff818901f0 T vic_alloc_dmamem +ffffffff81890360 T vic_rx_fill +ffffffff81890540 T vic_alloc_mbuf +ffffffff81890600 T vic_init_data +ffffffff818909a0 T vic_uninit_data +ffffffff81890b70 T vic_link_state +ffffffff81890bf0 T vic_write +ffffffff81890c40 T vic_rx_proc +ffffffff81890ea0 T vic_tx_proc +ffffffff81891020 T vic_iff +ffffffff81891160 T vic_setlladdr +ffffffff818911c0 T vic_load_txb +ffffffff81891270 T vic_init +ffffffff81891410 T vic_stop +ffffffff81891540 T vic_rxrinfo +ffffffff81891610 T vic_free_dmamem +ffffffff81892000 T vmxnet3_match +ffffffff81892020 T vmxnet3_attach +ffffffff818928f0 T vmxnet3_intr +ffffffff81892990 T vmxnet3_intr_event +ffffffff81892a00 T vmxnet3_intr_intx +ffffffff81892a60 T vmxnet3_intr_queue +ffffffff81892af0 T vmxnet3_dma_init +ffffffff81892ea0 T vmxnet3_ioctl +ffffffff81893130 T vmxnet3_start +ffffffff81893450 T vmxnet3_watchdog +ffffffff818934a0 T vmxnet3_media_change +ffffffff818934d0 T vmxnet3_media_status +ffffffff818935d0 T vmxnet3_link_state +ffffffff81893690 T vmxnet3_dma_allocmem +ffffffff818937e0 T vmxnet3_alloc_txring +ffffffff81893950 T vmxnet3_alloc_rxring +ffffffff81893c00 T vmxnet3_rxfill_tick +ffffffff81893c70 T vmxnet3_txinit +ffffffff81893cd0 T vmxnet3_rxfill +ffffffff81893f20 T vmxnet3_rxinit +ffffffff81893ff0 T vmxnet3_txstop +ffffffff81894080 T vmxnet3_rxstop +ffffffff81894180 T vmxnet3_enable_all_intrs +ffffffff81894240 T vmxnet3_disable_all_intrs +ffffffff81894310 T vmxnet3_evintr +ffffffff818944e0 T vmxnet3_rxintr +ffffffff81894870 T vmxnet3_txintr +ffffffff81894a10 T vmxnet3_init +ffffffff81894e20 T vmxnet3_rx_csum +ffffffff81894e80 T vmxnet3_iff +ffffffff81894fc0 T vmxnet3_stop +ffffffff81895200 T vmxnet3_reset +ffffffff81895240 t vmx_kstat_create +ffffffff81895420 t vmx_kstat_read +ffffffff81896000 T vmwpvs_match +ffffffff81896030 T vmwpvs_attach +ffffffff81896de0 T vmwpvs_scsi_cmd +ffffffff81897250 T vmwpvs_intx +ffffffff818972c0 T vmwpvs_msg_task +ffffffff81897540 T vmwpvs_intr +ffffffff81897720 T vmwpvs_get_config +ffffffff81897920 T vmwpvs_dmamem_zalloc +ffffffff81897980 T vmwpvs_dmamem_alloc +ffffffff81897b00 T vmwpvs_ccb_put +ffffffff81897b60 T vmwpvs_setup_rings +ffffffff81897c90 T vmwpvs_setup_msg_ring +ffffffff81897d80 T vmwpvs_ccb_get +ffffffff81897e00 T vmwpvs_dmamem_free +ffffffff81897e80 T vmwpvs_cmd +ffffffff81897f20 T vmwpvs_scsi_cmd_done +ffffffff81898100 T vmwpvs_scsi_cmd_poll +ffffffff81899000 T lii_match +ffffffff81899020 T lii_attach +ffffffff81899420 T lii_activate +ffffffff81899510 T lii_reset +ffffffff818997e0 T lii_spi_configure +ffffffff818998d0 T lii_eeprom_present +ffffffff81899960 T lii_eeprom_read +ffffffff81899990 T lii_spi_read +ffffffff81899c40 T lii_read_macaddr +ffffffff81899db0 T lii_intr +ffffffff81899ec0 T lii_alloc_rings +ffffffff8189a0d0 T lii_tick +ffffffff8189a120 T lii_mii_readreg +ffffffff8189a3c0 T lii_mii_writereg +ffffffff8189a650 T lii_mii_statchg +ffffffff8189a6c0 T lii_media_change +ffffffff8189a710 T lii_media_status +ffffffff8189a770 T lii_ioctl +ffffffff8189a900 T lii_start +ffffffff8189aaa0 T lii_watchdog +ffffffff8189aae0 T lii_stop +ffffffff8189ab50 T lii_init +ffffffff8189b040 T lii_iff +ffffffff8189b180 T lii_tx_put +ffffffff8189b290 T lii_free_tx_space +ffffffff8189b2d0 T lii_rxintr +ffffffff8189b480 T lii_txintr +ffffffff8189c000 T ichiic_match +ffffffff8189c020 T ichiic_attach +ffffffff8189c210 T ichiic_intr +ffffffff8189c320 T ichiic_i2c_acquire_bus +ffffffff8189c370 T ichiic_i2c_release_bus +ffffffff8189c3b0 T ichiic_i2c_exec +ffffffff8189d000 T viapm_match +ffffffff8189d020 T viapm_attach +ffffffff8189d630 T viapm_intr +ffffffff8189d740 T viapm_i2c_acquire_bus +ffffffff8189d790 T viapm_i2c_release_bus +ffffffff8189d7d0 T viapm_i2c_exec +ffffffff8189daf0 T viapm_refresh_sensor_data +ffffffff8189de20 T viapm_refresh +ffffffff8189de40 T val_to_uK +ffffffff8189dee0 T val_to_rpm +ffffffff8189df20 T val_to_uV +ffffffff8189dfd0 T viapm_get_timecount +ffffffff8189f000 T amdiic_match +ffffffff8189f020 T amdiic_attach +ffffffff8189f1f0 T amdiic_intr +ffffffff8189f2c0 T amdiic_i2c_acquire_bus +ffffffff8189f310 T amdiic_i2c_release_bus +ffffffff8189f350 T amdiic_i2c_exec +ffffffff8189f5b0 T amdiic_read +ffffffff8189f720 T amdiic_wait +ffffffff8189f7c0 T amdiic_write +ffffffff818a0000 T nviic_match +ffffffff818a0020 T nviic_attach +ffffffff818a0270 T nviic_i2c_acquire_bus +ffffffff818a02b0 T nviic_i2c_release_bus +ffffffff818a02f0 T nviic_i2c_exec +ffffffff818a0510 T nviic_write +ffffffff818a0560 T nviic_read +ffffffff818a1000 T sdhc_pci_match +ffffffff818a1060 T sdhc_pci_attach +ffffffff818a13a0 T sdhc_pci_activate +ffffffff818a13f0 T sdhc_takecontroller +ffffffff818a1490 T sdhc_ricohfix +ffffffff818a1600 T sdhc_pci_conf_write +ffffffff818a2000 T kate_match +ffffffff818a2160 T kate_attach +ffffffff818a2410 T kate_refresh +ffffffff818a3000 T km_match +ffffffff818a3050 T km_attach +ffffffff818a30e0 T km_refresh +ffffffff818a4000 T ksmn_match +ffffffff818a4050 T ksmn_attach +ffffffff818a4230 T ksmn_ccd_attach +ffffffff818a4380 T ksmn_refresh +ffffffff818a44d0 T ksmn_read_reg +ffffffff818a5000 T itherm_probe +ffffffff818a5020 T itherm_attach +ffffffff818a5370 T itherm_activate +ffffffff818a53f0 T itherm_enable +ffffffff818a5450 T itherm_refresh +ffffffff818a5460 T itherm_refresh_sensor_data +ffffffff818a5840 T itherm_bias_temperature_sensor +ffffffff818a6000 T pchtemp_match +ffffffff818a6020 T pchtemp_attach +ffffffff818a6180 T pchtemp_refresh +ffffffff818a7000 T rtsx_pci_match +ffffffff818a7090 T rtsx_pci_attach +ffffffff818a8000 T xspd_match +ffffffff818a8020 T xspd_attach +ffffffff818a81e0 T xspd_intr +ffffffff818a9000 T virtio_pci_match +ffffffff818a9070 T virtio_pci_attach +ffffffff818a9420 T virtio_pci_detach +ffffffff818a94f0 T virtio_pci_kick +ffffffff818a9540 T virtio_pci_read_device_config_1 +ffffffff818a9560 T virtio_pci_read_device_config_2 +ffffffff818a9590 T virtio_pci_read_device_config_4 +ffffffff818a95c0 T virtio_pci_read_device_config_8 +ffffffff818a9640 T virtio_pci_write_device_config_1 +ffffffff818a9670 T virtio_pci_write_device_config_2 +ffffffff818a96a0 T virtio_pci_write_device_config_4 +ffffffff818a96d0 T virtio_pci_write_device_config_8 +ffffffff818a9740 T virtio_pci_read_queue_size +ffffffff818a97b0 T virtio_pci_setup_queue +ffffffff818a9a90 T virtio_pci_set_status +ffffffff818a9b10 T virtio_pci_negotiate_features +ffffffff818a9c50 T virtio_pci_poll_intr +ffffffff818a9cb0 T virtio_pci_find_cap +ffffffff818a9e60 T virtio_pci_attach_10 +ffffffff818aa290 T virtio_pci_attach_09 +ffffffff818aa3d0 T virtio_pci_adjust_config_region +ffffffff818aa470 T virtio_pci_setup_msix +ffffffff818aa7d0 T virtio_pci_legacy_intr +ffffffff818aa870 T virtio_pci_legacy_intr_mpsafe +ffffffff818aa900 T virtio_pci_free_irqs +ffffffff818aab40 T virtio_pci_negotiate_features_10 +ffffffff818aad70 T virtio_pci_msix_establish +ffffffff818aae30 T virtio_pci_set_msix_queue_vector +ffffffff818aaeb0 T virtio_pci_set_msix_config_vector +ffffffff818aaef0 T virtio_pci_config_intr +ffffffff818aaf30 T virtio_pci_shared_queue_intr +ffffffff818aaf40 T virtio_pci_queue_intr +ffffffff818ab000 T dwiic_pci_match +ffffffff818ab020 T dwiic_pci_attach +ffffffff818ab340 T dwiic_pci_activate +ffffffff818ab3b0 T dwiic_pci_bus_scan +ffffffff818ac000 T bwfm_pci_buscore_read +ffffffff818ac060 T bwfm_pci_buscore_write +ffffffff818ac0d0 T bwfm_pci_buscore_prepare +ffffffff818ac100 T bwfm_pci_buscore_reset +ffffffff818ac2f0 T bwfm_pci_buscore_activate +ffffffff818ac320 T bwfm_pci_preinit +ffffffff818ad440 T bwfm_pci_stop +ffffffff818ad4d0 T bwfm_pci_txcheck +ffffffff818ad590 T bwfm_pci_txdata +ffffffff818ad8f0 T bwfm_pci_msgbuf_query_dcmd +ffffffff818add30 T bwfm_pci_msgbuf_set_dcmd +ffffffff818add70 T bwfm_pci_match +ffffffff818add90 T bwfm_pci_attach +ffffffff818adff0 T bwfm_pci_detach +ffffffff818ae030 T bwfm_pci_activate +ffffffff818ae1e0 T bwfm_pci_intr +ffffffff818ae440 T bwfm_pci_select_core +ffffffff818ae510 T bwfm_pci_load_microcode +ffffffff818ae990 T bwfm_pci_dmamem_alloc +ffffffff818aeb30 T bwfm_pci_setup_ring +ffffffff818aed30 T bwfm_pci_intr_enable +ffffffff818aed80 T bwfm_pci_hostready +ffffffff818aede0 T bwfm_pci_fill_rx_rings +ffffffff818aee20 T bwfm_pci_dmamem_free +ffffffff818aee90 T bwfm_pci_cleanup +ffffffff818af500 T bwfm_pci_send_mb_data +ffffffff818af620 T bwfm_pci_intmask +ffffffff818af660 T bwfm_pci_pktid_avail +ffffffff818af6d0 T bwfm_pci_pktid_new +ffffffff818af830 T bwfm_pci_pktid_free +ffffffff818af8d0 T bwfm_pci_fill_rx_buf_ring +ffffffff818afc20 T bwfm_pci_fill_rx_ioctl_ring +ffffffff818aff90 T bwfm_pci_ring_write_reserve +ffffffff818b0080 T bwfm_pci_ring_write_cancel +ffffffff818b00c0 T bwfm_pci_ring_write_commit +ffffffff818b01a0 T bwfm_pci_ring_write_rptr +ffffffff818b0220 T bwfm_pci_ring_write_wptr +ffffffff818b02a0 T bwfm_pci_setup_flowring +ffffffff818b0400 T bwfm_pci_ring_bell +ffffffff818b0440 T bwfm_pci_ring_update_rptr +ffffffff818b04f0 T bwfm_pci_ring_update_wptr +ffffffff818b0590 T bwfm_pci_ring_write_reserve_multi +ffffffff818b06b0 T bwfm_pci_ring_read_avail +ffffffff818b07b0 T bwfm_pci_ring_read_commit +ffffffff818b0830 T bwfm_pci_ring_rx +ffffffff818b0a40 T bwfm_pci_msg_rx +ffffffff818b1020 T bwfm_pci_flowring_delete_cb +ffffffff818b10d0 T bwfm_pci_msgbuf_rxioctl +ffffffff818b11c0 T bwfm_pci_intr_status +ffffffff818b1200 T bwfm_pci_intr_ack +ffffffff818b1240 T bwfm_pci_flowring_lookup +ffffffff818b13b0 T bwfm_pci_flowring_create +ffffffff818b14e0 T bwfm_pci_flowring_create_cb +ffffffff818b1820 T bwfm_pci_flowring_delete +ffffffff818b1af0 T bwfm_pci_msgbuf_h2d_mb_write +ffffffff818b1d10 T bwfm_pci_handle_mb_data +ffffffff818b1de0 T bwfm_pci_intr_disable +ffffffff818b2000 T ccp_pci_match +ffffffff818b2020 T ccp_pci_attach +ffffffff818b3000 T bnxt_match +ffffffff818b3020 T bnxt_attach +ffffffff818b4200 T bnxt_dmamem_alloc +ffffffff818b4390 T bnxt_dmamem_free +ffffffff818b4410 T bnxt_hwrm_ver_get +ffffffff818b4560 T bnxt_hwrm_nvm_get_dev_info +ffffffff818b46a0 T bnxt_hwrm_func_drv_rgtr +ffffffff818b47c0 T bnxt_hwrm_func_rgtr_async_events +ffffffff818b48e0 T bnxt_hwrm_func_qcaps +ffffffff818b49c0 T bnxt_admin_intr +ffffffff818b4bc0 T bnxt_intr +ffffffff818b5090 T bnxt_hwrm_func_qcfg +ffffffff818b5140 T bnxt_hwrm_queue_qportcfg +ffffffff818b5210 T bnxt_hwrm_func_reset +ffffffff818b52c0 T bnxt_mark_cpr_invalid +ffffffff818b5310 T bnxt_hwrm_ring_alloc +ffffffff818b54c0 T bnxt_cfg_async_cr +ffffffff818b55c0 T bnxt_write_cp_doorbell +ffffffff818b5600 T bnxt_set_cp_ring_aggint +ffffffff818b56d0 T bnxt_ioctl +ffffffff818b5860 T bnxt_start +ffffffff818b5c80 T bnxt_watchdog +ffffffff818b5cb0 T bnxt_media_change +ffffffff818b5e00 T bnxt_media_status +ffffffff818b5e10 T bnxt_refill +ffffffff818b5e70 T bnxt_media_autonegotiate +ffffffff818b5f60 T bnxt_hwrm_port_phy_qcfg +ffffffff818b63f0 T bnxt_free_slots +ffffffff818b6480 T bnxt_hwrm_cmd_hdr_init +ffffffff818b64d0 T hwrm_send_message +ffffffff818b6550 T bnxt_queue_up +ffffffff818b7480 T bnxt_hwrm_stat_ctx_alloc +ffffffff818b7580 T bnxt_write_tx_doorbell +ffffffff818b75f0 T bnxt_write_rx_doorbell +ffffffff818b7660 T bnxt_hwrm_ring_grp_alloc +ffffffff818b7760 T bnxt_rx_fill +ffffffff818b7870 T bnxt_hwrm_ring_grp_free +ffffffff818b7950 T bnxt_hwrm_ring_free +ffffffff818b7a40 T bnxt_hwrm_stat_ctx_free +ffffffff818b7b30 T bnxt_queue_down +ffffffff818b8210 T bnxt_up +ffffffff818b88e0 T bnxt_hwrm_vnic_ctx_alloc +ffffffff818b89b0 T bnxt_hwrm_vnic_alloc +ffffffff818b8aa0 T bnxt_hwrm_vnic_cfg +ffffffff818b8be0 T bnxt_hwrm_vnic_cfg_placement +ffffffff818b8cb0 T bnxt_hwrm_set_filter +ffffffff818b8e30 T bnxt_hwrm_vnic_rss_cfg +ffffffff818b8f00 T bnxt_iff +ffffffff818b9070 T bnxt_hwrm_vnic_free +ffffffff818b9150 T bnxt_hwrm_vnic_ctx_free +ffffffff818b9230 T bnxt_down +ffffffff818b95d0 T bnxt_hwrm_free_filter +ffffffff818b96b0 T bnxt_hwrm_cfa_l2_set_rx_mask +ffffffff818b9780 T bnxt_rxrinfo +ffffffff818b98d0 T bnxt_get_sffpage +ffffffff818b9be0 T bnxt_load_mbuf +ffffffff818b9c90 T bnxt_handle_async_event +ffffffff818b9cd0 T bnxt_cpr_next_cmpl +ffffffff818b9d40 T bnxt_cpr_commit +ffffffff818b9d70 T bnxt_cpr_rollback +ffffffff818b9da0 T bnxt_write_cp_doorbell_index +ffffffff818b9e20 T bnxt_rx +ffffffff818ba0f0 T bnxt_txeof +ffffffff818ba210 T bnxt_get_media_type +ffffffff818ba760 T bnxt_add_media_type +ffffffff818ba920 T _hwrm_send_message +ffffffff818bd7d0 T bnxt_rx_fill_slots +ffffffff818bd980 T bnxt_hwrm_err_map +ffffffff818bd9c0 T _bnxt_hwrm_set_async_event_bit +ffffffff818be000 t mcx_match +ffffffff818be020 t mcx_attach +ffffffff818c1100 T mcx_rx_fill +ffffffff818c1340 T mcx_load_mbuf +ffffffff818c13f0 t mcx_dmamem_alloc +ffffffff818c1550 t mcx_pages +ffffffff818c1e30 t mcx_iff +ffffffff818c2270 t mcx_alloc_uar +ffffffff818c2460 t mcx_admin_intr +ffffffff818c2610 t mcx_create_eq +ffffffff818c2ba0 t mcx_ioctl +ffffffff818c3670 t mcx_start +ffffffff818c3b70 t mcx_watchdog +ffffffff818c3ba0 t mcx_media_change +ffffffff818c3e60 t mcx_media_status +ffffffff818c3fa0 t mcx_refill +ffffffff818c4010 t mcx_cq_intr +ffffffff818c4520 t mcx_calibrate +ffffffff818c46e0 t mcx_port_change +ffffffff818c4820 t mcx_cmdq_post +ffffffff818c4900 t mcx_set_flow_table_entry_mac +ffffffff818c4dd0 t mcx_delete_flow_table_entry +ffffffff818c5250 t mcx_access_hca_reg +ffffffff818c5680 t mcx_cmdq_exec +ffffffff818c5880 t mcx_up +ffffffff818c8b80 t mcx_down +ffffffff818c9be0 t mcx_create_flow_table +ffffffff818c9f90 t mcx_create_flow_group +ffffffff818ca470 t mcx_destroy_sq +ffffffff818ca720 t mcx_destroy_cq +ffffffff818ca9e0 t mcx_arm_cq +ffffffff818cab00 t mcx_destroy_flow_table +ffffffff818cae60 t mcx_kstat_attach_ppcnt +ffffffff818caf90 t mcx_kstat_ppcnt_read +ffffffff818cb0b0 t mcx_kstat_mtmp_read +ffffffff818cb240 t mcx_kstat_queue_read +ffffffff818cc6d0 t mcx_timecounter_read +ffffffff818cd000 t iavf_match +ffffffff818cd020 t iavf_attach +ffffffff818cd900 t iavf_reset +ffffffff818cdbd0 t iavf_dmamem_alloc +ffffffff818cdd30 t iavf_arq_fill +ffffffff818cdfe0 t iavf_arq_timeout +ffffffff818ce000 t iavf_init_admin_queue +ffffffff818ce1b0 t iavf_get_version +ffffffff818ce3d0 t iavf_get_vf_resources +ffffffff818ce5a0 t iavf_config_irq_map +ffffffff818ce790 t iavf_intr +ffffffff818cee10 t iavf_ioctl +ffffffff818cf9c0 t iavf_start +ffffffff818cfd10 t iavf_watchdog +ffffffff818cfd40 t iavf_media_change +ffffffff818cfd70 t iavf_media_status +ffffffff818cfe00 t iavf_arq_unfill +ffffffff818cff00 t iavf_down +ffffffff818d0460 t iavf_up +ffffffff818d10d0 t iavf_queue_select +ffffffff818d12d0 t iavf_rxfill +ffffffff818d14d0 t iavf_rxrefill +ffffffff818d14f0 t iavf_process_arq +ffffffff818d2000 T rge_match +ffffffff818d2020 T rge_attach +ffffffff818d2510 T rge_activate +ffffffff818d2640 T rge_intr +ffffffff818d2930 T rge_config_imtype +ffffffff818d29a0 T rge_exit_oob +ffffffff818d31b0 T rge_hw_init +ffffffff818d35a0 T rge_get_macaddr +ffffffff818d3620 T rge_set_phy_power +ffffffff818d3880 T rge_phy_config +ffffffff818d41c0 T rge_allocmem +ffffffff818d45d0 T rge_ioctl +ffffffff818d4780 T rge_start +ffffffff818d4950 T rge_watchdog +ffffffff818d4990 T rge_wol +ffffffff818d4bb0 T rge_tick +ffffffff818d4c30 T rge_txstart +ffffffff818d4c60 T rge_ifmedia_upd +ffffffff818d5220 T rge_ifmedia_sts +ffffffff818d5300 T rge_add_media_types +ffffffff818d53b0 T rge_kstat_attach +ffffffff818d5680 T rge_wol_power +ffffffff818d5760 T rge_rxeof +ffffffff818d5b60 T rge_txeof +ffffffff818d5d60 T rge_init +ffffffff818d6f20 T rge_setup_intr +ffffffff818d7090 T rge_encap +ffffffff818d7330 T rge_stop +ffffffff818d7590 T rge_iff +ffffffff818d7700 T rge_set_macaddr +ffffffff818d77d0 T rge_rx_list_init +ffffffff818d7890 T rge_tx_list_init +ffffffff818d7950 T rge_read_csi +ffffffff818d7bc0 T rge_write_csi +ffffffff818d7e40 T rge_write_mac_ocp +ffffffff818d7e80 T rge_read_mac_ocp +ffffffff818d7ef0 T rge_reset +ffffffff818d80b0 T rge_write_phy_ocp +ffffffff818d8170 T rge_read_phy_ocp +ffffffff818d8220 T rge_read_phy +ffffffff818d82f0 T rge_write_phy +ffffffff818d83d0 T rge_get_link_status +ffffffff818d8420 T rge_newbuf +ffffffff818d85a0 T rge_discard_rxbuf +ffffffff818d8600 T rge_fill_rx_ring +ffffffff818d8680 T rge_phy_config_mac_cfg2 +ffffffff818da080 T rge_phy_config_mac_cfg3 +ffffffff818dbd30 T rge_phy_config_mac_cfg4 +ffffffff818dfda0 T rge_phy_config_mac_cfg5 +ffffffff818e0890 T rge_patch_phy_mcu +ffffffff818e0b00 T rge_write_ephy +ffffffff818e0d60 T rge_phy_config_mcu +ffffffff818e1820 T rge_read_ephy +ffffffff818e1aa0 T rge_disable_phy_ocp_pwrsave +ffffffff818e1c70 T rge_disable_hw_im +ffffffff818e1ca0 T rge_disable_sim_im +ffffffff818e1d00 T rge_setup_sim_im +ffffffff818e1d80 T rge_link_state +ffffffff818e1e00 t rge_kstat_read +ffffffff818e1fa0 t rge_kstat_copy +ffffffff818e3000 T igc_match +ffffffff818e3020 T igc_attach +ffffffff818e3490 T igc_detach +ffffffff818e3690 T igc_identify_hardware +ffffffff818e36f0 T igc_allocate_pci_resources +ffffffff818e3810 T igc_allocate_queues +ffffffff818e3d00 T igc_is_valid_ether_addr +ffffffff818e3d60 T igc_allocate_msix +ffffffff818e3fc0 T igc_setup_interface +ffffffff818e4200 T igc_reset +ffffffff818e4340 T igc_update_link_status +ffffffff818e4440 T igc_get_hw_control +ffffffff818e44a0 T igc_release_hw_control +ffffffff818e4500 T igc_free_pci_resources +ffffffff818e45e0 T igc_stop +ffffffff818e48f0 T igc_free_transmit_structures +ffffffff818e4960 T igc_free_receive_structures +ffffffff818e4a20 T igc_setup_msix +ffffffff818e4ab0 T igc_dma_malloc +ffffffff818e4c10 T igc_rxrefill +ffffffff818e4ce0 T igc_dma_free +ffffffff818e4d90 T igc_init_dmac +ffffffff818e5030 T igc_intr_queue +ffffffff818e5140 T igc_intr_link +ffffffff818e52c0 T igc_ioctl +ffffffff818e5590 T igc_start +ffffffff818e5920 T igc_watchdog +ffffffff818e5950 T igc_media_change +ffffffff818e5a60 T igc_media_status +ffffffff818e5c00 T igc_init +ffffffff818e60f0 T igc_setup_transmit_structures +ffffffff818e61b0 T igc_initialize_transmit_unit +ffffffff818e63d0 T igc_setup_receive_structures +ffffffff818e6550 T igc_initialize_receive_unit +ffffffff818e6920 T igc_iff +ffffffff818e6a60 T igc_configure_queues +ffffffff818e6c70 T igc_rxfill +ffffffff818e6da0 T igc_enable_intr +ffffffff818e6e60 T igc_tx_ctx_setup +ffffffff818e7020 T igc_txeof +ffffffff818e71e0 T igc_disable_intr +ffffffff818e7280 T igc_rxrinfo +ffffffff818e73c0 T igc_get_buf +ffffffff818e7500 T igc_rxeof +ffffffff818e78a0 T igc_rx_checksum +ffffffff818e78f0 T igc_set_queues +ffffffff818e79c0 T igc_enable_queue +ffffffff818e79f0 T igc_allocate_transmit_buffers +ffffffff818e7b50 T igc_setup_transmit_ring +ffffffff818e7cd0 T igc_free_transmit_buffers +ffffffff818e7df0 T igc_allocate_receive_buffers +ffffffff818e7f10 T igc_setup_receive_ring +ffffffff818e7fd0 T igc_initialize_rss_mapping +ffffffff818e81f0 T igc_free_receive_buffers +ffffffff818e9000 T igc_init_mac_params +ffffffff818e9040 T igc_init_nvm_params +ffffffff818e9080 T igc_init_phy_params +ffffffff818e90c0 T igc_set_mac_type +ffffffff818e9170 T igc_setup_init_funcs +ffffffff818e92d0 T igc_update_mc_addr_list +ffffffff818e9310 T igc_check_for_link +ffffffff818e9350 T igc_reset_hw +ffffffff818e9390 T igc_init_hw +ffffffff818e93d0 T igc_get_speed_and_duplex +ffffffff818e9410 T igc_rar_set +ffffffff818e9450 T igc_check_reset_block +ffffffff818e9490 T igc_get_phy_info +ffffffff818e94d0 T igc_phy_hw_reset +ffffffff818e9510 T igc_read_mac_addr +ffffffff818e9530 T igc_validate_nvm_checksum +ffffffff818ea000 T igc_acquire_phy_base +ffffffff818ea030 T igc_release_phy_base +ffffffff818ea060 T igc_init_hw_base +ffffffff818ea160 T igc_power_down_phy_copper_base +ffffffff818eb000 T igc_init_nvm_params_i225 +ffffffff818eb180 T igc_acquire_nvm_i225 +ffffffff818eb250 T igc_release_nvm_i225 +ffffffff818eb2c0 T igc_get_flash_presence_i225 +ffffffff818eb310 T igc_read_nvm_srrd_i225 +ffffffff818eb3f0 T igc_write_nvm_srwr_i225 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drm_atomic_helper_disable_planes_on_crtc +ffffffff81901920 T drm_atomic_helper_update_plane +ffffffff81901a50 T drm_atomic_helper_disable_plane +ffffffff81901b10 T drm_atomic_helper_set_config +ffffffff81901bc0 T drm_atomic_helper_disable_all +ffffffff81901d70 T drm_atomic_helper_shutdown +ffffffff81901ec0 T drm_atomic_helper_duplicate_state +ffffffff81902030 T drm_atomic_helper_suspend +ffffffff81902180 T drm_atomic_helper_commit_duplicated_state +ffffffff819022c0 T drm_atomic_helper_resume +ffffffff819023f0 T drm_atomic_helper_page_flip +ffffffff819024b0 t page_flip_common +ffffffff819025b0 T drm_atomic_helper_page_flip_target +ffffffff819026c0 T drm_atomic_helper_bridge_propagate_bus_fmt +ffffffff81902730 t set_best_encoder +ffffffff81903000 T __drm_atomic_helper_crtc_state_reset +ffffffff81903030 T __drm_atomic_helper_crtc_reset +ffffffff81903090 T drm_atomic_helper_crtc_reset +ffffffff81903120 T __drm_atomic_helper_crtc_duplicate_state +ffffffff819031f0 T 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drm_atomic_helper_connector_destroy_state +ffffffff81903b50 T __drm_atomic_helper_private_obj_duplicate_state +ffffffff81903b90 T __drm_atomic_helper_bridge_duplicate_state +ffffffff81903bd0 T drm_atomic_helper_bridge_duplicate_state +ffffffff81903c70 T drm_atomic_helper_bridge_destroy_state +ffffffff81903c90 T __drm_atomic_helper_bridge_reset +ffffffff81903ce0 T drm_atomic_helper_bridge_reset +ffffffff81904000 T drm_atomic_set_mode_for_crtc +ffffffff81904200 T drm_atomic_set_mode_prop_for_crtc +ffffffff81904490 T drm_atomic_set_crtc_for_plane +ffffffff81904600 T drm_atomic_set_fb_for_plane +ffffffff819046d0 T drm_atomic_set_crtc_for_connector +ffffffff81904830 T drm_atomic_get_property +ffffffff81904f70 T drm_atomic_connector_commit_dpms +ffffffff819050d0 T drm_atomic_set_property +ffffffff81905b80 T drm_mode_atomic_ioctl +ffffffff81907000 T drm_is_current_master +ffffffff81907050 T drm_getmagic +ffffffff81907120 T drm_authmagic +ffffffff819071e0 T drm_master_create +ffffffff81907280 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drm_client_buffer_vmap +ffffffff8190e530 T drm_client_buffer_vunmap +ffffffff8190e550 T drm_client_framebuffer_create +ffffffff8190e830 T drm_client_framebuffer_delete +ffffffff8190e930 T drm_client_framebuffer_flush +ffffffff8190f000 T drm_client_modeset_create +ffffffff8190f140 T drm_client_modeset_free +ffffffff8190f250 T drm_client_modeset_probe +ffffffff81910a10 t drm_client_pick_crtcs +ffffffff81910d00 T drm_client_rotation +ffffffff81910ea0 T drm_client_modeset_check +ffffffff81910f40 t drm_client_modeset_commit_atomic +ffffffff81911140 T drm_client_modeset_commit_locked +ffffffff819112d0 T drm_client_modeset_commit +ffffffff81911340 T drm_client_modeset_dpms +ffffffff81911590 t drm_connector_pick_cmdline_mode +ffffffff81912000 T drm_color_ctm_s31_32_to_qm_n +ffffffff819120d0 T drm_crtc_enable_color_mgmt +ffffffff819121b0 T drm_mode_crtc_set_gamma_size +ffffffff819122d0 T drm_mode_gamma_set_ioctl +ffffffff819127c0 T drm_mode_gamma_get_ioctl +ffffffff81912900 T drm_get_color_encoding_name +ffffffff81912970 T drm_get_color_range_name +ffffffff819129e0 T drm_plane_create_color_properties +ffffffff81912c30 T drm_color_lut_check +ffffffff81913000 T drm_connector_ida_init +ffffffff81913110 T drm_connector_ida_destroy +ffffffff81913220 T drm_get_connector_type_name +ffffffff81913260 T drm_connector_free_work_fn +ffffffff81913320 T drm_connector_init +ffffffff819133a0 t __drm_connector_init +ffffffff819138b0 T drm_connector_init_with_ddc +ffffffff81913930 T drmm_connector_init +ffffffff819139f0 t drm_connector_cleanup_action +ffffffff81913a00 T drm_connector_attach_edid_property +ffffffff81913a20 T drm_connector_attach_encoder +ffffffff81913aa0 T drm_connector_has_possible_encoder +ffffffff81913ae0 T drm_connector_cleanup +ffffffff81913dd0 T drm_connector_unregister +ffffffff81913e60 T drm_mode_put_tile_group +ffffffff81913ef0 T drm_connector_register +ffffffff81913fe0 T drm_connector_unregister_all +ffffffff81914180 T drm_connector_list_iter_begin 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drm_connector_set_vrr_capable_property +ffffffff81915940 T drm_connector_set_panel_orientation +ffffffff81915a00 T drm_connector_set_panel_orientation_with_quirk +ffffffff81915ae0 T drm_connector_set_orientation_from_panel +ffffffff81915bd0 T drm_connector_create_privacy_screen_properties +ffffffff81915c70 T drm_connector_attach_privacy_screen_properties +ffffffff81915ce0 T drm_connector_attach_privacy_screen_provider +ffffffff81915df0 t drm_connector_privacy_screen_notifier +ffffffff81915e90 T drm_connector_update_privacy_screen +ffffffff81915f00 T drm_connector_set_obj_prop +ffffffff81915fe0 T drm_connector_property_set_ioctl +ffffffff81916040 T drm_mode_getconnector +ffffffff81916580 T drm_connector_find_by_fwnode +ffffffff81916630 T drm_connector_oob_hotplug_event +ffffffff81916710 T drm_mode_get_tile_group +ffffffff819167e0 T drm_mode_create_tile_group +ffffffff819168a0 t drm_connector_free +ffffffff819168e0 t kasprintf +ffffffff81917000 T drm_crtc_from_index +ffffffff81917060 T drm_crtc_force_disable +ffffffff81917170 T drm_mode_set_config_internal +ffffffff819171f0 T drm_crtc_register_all +ffffffff81917270 T drm_crtc_unregister_all +ffffffff819172e0 T drm_crtc_create_fence +ffffffff81917370 T drm_crtc_init_with_planes +ffffffff81917440 t __drm_crtc_init_with_planes +ffffffff81917830 T drmm_crtc_init_with_planes +ffffffff81917930 T __drmm_crtc_alloc_with_planes +ffffffff81917aa0 T drm_crtc_cleanup +ffffffff81917bc0 T drm_mode_getcrtc +ffffffff81917d50 t __drm_mode_set_config_internal +ffffffff81917ef0 T drm_crtc_check_viewport +ffffffff81917fa0 T drm_mode_setcrtc +ffffffff81918700 T drm_mode_crtc_set_obj_prop +ffffffff81918780 T drm_crtc_create_scaling_filter_property +ffffffff819187f0 t drm_crtc_fence_get_driver_name +ffffffff81918860 t drm_crtc_fence_get_timeline_name +ffffffff819188c0 t kasprintf +ffffffff81918990 t drmm_crtc_init_with_planes_cleanup +ffffffff81919000 T drm_helper_encoder_in_use +ffffffff81919170 T drm_helper_crtc_in_use +ffffffff81919290 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drm_hdmi_avi_infoframe_from_display_mode +ffffffff81923070 T drm_hdmi_avi_infoframe_quant_range +ffffffff81923110 T drm_hdmi_vendor_infoframe_from_display_mode +ffffffff819231d0 t connector_bad_edid +ffffffff81923390 t drm_for_each_detailed_block +ffffffff819235e0 t __cea_db_iter_next +ffffffff81923880 t update_display_info +ffffffff81924700 t get_monitor_range +ffffffff819247a0 t do_detailed_mode +ffffffff819250c0 t hdmi_mode_alternate_clock +ffffffff81925170 t do_cvt_mode +ffffffff819253c0 t drm_mode_std +ffffffff819260d0 t do_standard_modes +ffffffff81926210 t drm_monitor_supports_rb +ffffffff81926500 t drm_gtf2_hbreak +ffffffff81926790 t do_established_modes +ffffffff81926990 t drm_match_hdmi_mode +ffffffff81926bd0 t do_inferred_modes +ffffffff81927140 t mode_in_range +ffffffff81928000 T drm_encoder_register_all +ffffffff81928080 T drm_encoder_unregister_all +ffffffff819280f0 T drm_encoder_init +ffffffff819281c0 t __drm_encoder_init +ffffffff81928380 T drm_encoder_cleanup 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drm_fb_helper_unregister_fbi +ffffffff8192a920 T drm_fb_helper_fini +ffffffff8192aa10 T drm_fb_helper_set_suspend +ffffffff8192aa40 T drm_fb_helper_set_suspend_unlocked +ffffffff8192aa70 T drm_fb_helper_set_par +ffffffff8192ab60 T drm_fb_helper_pan_display +ffffffff8192ac30 T drm_fb_helper_fill_info +ffffffff8192acf0 T drm_fb_helper_initial_config +ffffffff8192ad20 t __drm_fb_helper_initial_config_and_unlock +ffffffff8192b270 T drm_fb_helper_hotplug_event +ffffffff8192b470 t drm_setup_crtcs_fb +ffffffff8192b5b0 T drm_fb_helper_lastclose +ffffffff8192b660 T drm_fb_helper_output_poll_changed +ffffffff8192b680 T drm_fbdev_generic_setup +ffffffff8192b830 t drm_fbdev_client_hotplug +ffffffff8192ba60 t drm_fbdev_client_unregister +ffffffff8192bad0 t drm_fbdev_client_restore +ffffffff8192bb70 t drm_fbdev_cleanup +ffffffff8192bc10 t drm_fbdev_use_shadow_fb +ffffffff8192bc60 t drm_fb_helper_generic_probe +ffffffff8192c000 T drm_dev_needs_global_mutex +ffffffff8192c060 T drm_file_alloc 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dma_fence_array_cb_func +ffffffff81942140 t dma_fence_chain_cb +ffffffff81942200 t dma_fence_chain_timo +ffffffff81943000 T drmm_kzalloc +ffffffff81943100 T drmm_kcalloc +ffffffff81943210 T drmm_kstrdup +ffffffff81943340 T drmm_kfree +ffffffff81943440 T drmm_add_action +ffffffff81943500 T drmm_add_action_or_reset +ffffffff819435d0 T drm_managed_release +ffffffff81943680 T drmm_add_final_kfree +ffffffff81944000 T mipi_dsi_attach +ffffffff81944050 T mipi_dsi_detach +ffffffff819440a0 T devm_mipi_dsi_attach +ffffffff81944110 T mipi_dsi_packet_format_is_short +ffffffff81944160 T mipi_dsi_packet_format_is_long +ffffffff819441b0 T mipi_dsi_create_packet +ffffffff819442b0 T mipi_dsi_shutdown_peripheral +ffffffff81944350 T mipi_dsi_turn_on_peripheral +ffffffff819443f0 T mipi_dsi_set_maximum_return_packet_size +ffffffff81944490 T mipi_dsi_compression_mode +ffffffff81944540 T mipi_dsi_picture_parameter_set +ffffffff819445f0 T mipi_dsi_generic_write +ffffffff819446a0 T mipi_dsi_generic_read +ffffffff81944750 T mipi_dsi_dcs_write_buffer +ffffffff81944810 T mipi_dsi_dcs_write +ffffffff81944950 T mipi_dsi_dcs_read +ffffffff819449e0 T mipi_dsi_dcs_nop +ffffffff81944a90 T mipi_dsi_dcs_soft_reset +ffffffff81944b40 T mipi_dsi_dcs_get_power_mode +ffffffff81944c00 T mipi_dsi_dcs_get_pixel_format +ffffffff81944cc0 T mipi_dsi_dcs_enter_sleep_mode +ffffffff81944d70 T mipi_dsi_dcs_exit_sleep_mode +ffffffff81944e20 T mipi_dsi_dcs_set_display_off +ffffffff81944ed0 T mipi_dsi_dcs_set_display_on +ffffffff81944f80 T mipi_dsi_dcs_set_column_address +ffffffff81945040 T mipi_dsi_dcs_set_page_address +ffffffff81945100 T mipi_dsi_dcs_set_tear_off +ffffffff819451b0 T mipi_dsi_dcs_set_tear_on +ffffffff81945260 T mipi_dsi_dcs_set_pixel_format +ffffffff81946000 T __drm_mm_interval_first +ffffffff819460b0 T drm_mm_reserve_node +ffffffff81946350 t add_hole +ffffffff819464b0 T drm_mm_insert_node_in_range +ffffffff81946aa0 T drm_mm_remove_node +ffffffff81946bd0 T drm_mm_replace_node +ffffffff81946da0 T drm_mm_scan_init_with_range +ffffffff81946e20 T drm_mm_scan_add_block +ffffffff81946f90 T drm_mm_scan_remove_block +ffffffff81947000 T drm_mm_scan_color_evict +ffffffff819470e0 T drm_mm_init +ffffffff81947180 T drm_mm_takedown +ffffffff819471c0 T drm_mm_print +ffffffff81948000 T drm_modeset_register_all +ffffffff819480a0 T drm_modeset_unregister_all +ffffffff819480d0 T drm_mode_getresources +ffffffff81948380 T drm_mode_config_reset +ffffffff819484d0 T drmm_mode_config_init +ffffffff81948b00 t drm_mode_config_init_release +ffffffff81948b10 T drm_mode_config_cleanup +ffffffff81948e50 T drm_mode_config_validate +ffffffff8194a000 T __drm_mode_object_add +ffffffff8194a100 T drm_mode_object_add +ffffffff8194a1d0 T drm_mode_object_register +ffffffff8194a220 T drm_mode_object_unregister +ffffffff8194a2c0 T drm_mode_object_lease_required +ffffffff8194a300 T __drm_mode_object_find +ffffffff8194a3b0 T drm_mode_object_find +ffffffff8194a460 T drm_mode_object_put +ffffffff8194a4e0 T drm_mode_object_get +ffffffff8194a540 T drm_object_attach_property +ffffffff8194a650 T drm_object_property_set_value +ffffffff8194a720 T drm_object_property_get_value +ffffffff8194a7b0 t __drm_object_property_get_value +ffffffff8194a890 T drm_object_property_get_default_value +ffffffff8194a960 T drm_mode_object_get_properties +ffffffff8194aaa0 T drm_mode_obj_get_properties_ioctl +ffffffff8194ace0 T drm_mode_obj_find_prop_id +ffffffff8194ad30 T drm_mode_obj_set_property_ioctl +ffffffff8194c000 T drm_mode_debug_printmodeline +ffffffff8194c130 T drm_mode_vrefresh +ffffffff8194c1d0 T drm_mode_create +ffffffff8194c1f0 T drm_mode_destroy +ffffffff8194c230 T drm_mode_probed_add +ffffffff8194c2d0 T drm_cvt_mode +ffffffff8194c780 T drm_mode_set_name +ffffffff8194c7d0 T drm_gtf_mode_complex +ffffffff8194cac0 T drm_gtf_mode +ffffffff8194cb10 T drm_mode_get_hv_timing +ffffffff8194cb60 T drm_mode_init +ffffffff8194cc30 T drm_mode_set_crtcinfo +ffffffff8194cde0 T drm_mode_copy +ffffffff8194ce40 T drm_mode_duplicate +ffffffff8194cec0 T drm_mode_match +ffffffff8194d060 T drm_mode_equal +ffffffff8194d080 T drm_mode_equal_no_clocks +ffffffff8194d0a0 T drm_mode_equal_no_clocks_no_stereo +ffffffff8194d160 T drm_mode_validate_driver +ffffffff8194d240 T drm_mode_validate_size +ffffffff8194d290 T drm_mode_validate_ycbcr420 +ffffffff8194d300 T drm_mode_is_420_only +ffffffff8194d350 T drm_get_mode_status_name +ffffffff8194d3c0 T drm_mode_prune_invalid +ffffffff8194d650 T drm_mode_sort +ffffffff8194d670 t drm_mode_compare +ffffffff8194d800 T drm_connector_list_update +ffffffff8194d9d0 T drm_mode_parse_command_line_for_connector +ffffffff8194da00 T drm_mode_create_from_cmdline_mode +ffffffff8194daf0 T drm_mode_convert_to_umode +ffffffff8194dc80 T drm_mode_convert_umode +ffffffff8194de90 T drm_mode_is_420_also +ffffffff8194dee0 T drm_mode_is_420 +ffffffff8194e000 T drm_helper_move_panel_connectors_to_head +ffffffff8194e0f0 T drm_helper_mode_fill_fb_struct +ffffffff8194e1b0 T drm_crtc_init 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+ffffffff81951220 T drm_panel_disable +ffffffff819512b0 T drm_panel_get_modes +ffffffff81951300 T drm_panel_of_backlight +ffffffff81952000 T drm_get_panel_orientation_quirk +ffffffff81953000 T drm_pci_set_busid +ffffffff81953090 t kasprintf +ffffffff81954000 T drm_universal_plane_init +ffffffff819540f0 t __drm_universal_plane_init +ffffffff819547e0 T __drmm_universal_plane_alloc +ffffffff81954920 t drmm_universal_plane_alloc_release +ffffffff81954960 T __drm_universal_plane_alloc +ffffffff81954aa0 T drm_plane_register_all +ffffffff81954b90 T drm_plane_unregister_all +ffffffff81954c00 T drm_plane_cleanup +ffffffff81954d50 T drm_plane_from_index +ffffffff81954db0 T drm_plane_force_disable +ffffffff81954ec0 T drm_mode_plane_set_obj_prop +ffffffff81954f40 T drm_mode_getplane_res +ffffffff81955030 T drm_mode_getplane +ffffffff81955190 T drm_plane_check_pixel_format +ffffffff81955250 T drm_any_plane_has_format +ffffffff81955380 T drm_mode_setplane +ffffffff819556e0 T drm_mode_cursor_ioctl +ffffffff81955740 t drm_mode_cursor_common +ffffffff81955dc0 T drm_mode_cursor2_ioctl +ffffffff81955dd0 T drm_mode_page_flip_ioctl +ffffffff81956340 T drm_plane_enable_fb_damage_clips +ffffffff81956360 T drm_plane_get_damage_clips_count +ffffffff819563a0 T __drm_plane_get_damage_clips +ffffffff819563e0 T drm_plane_get_damage_clips +ffffffff81956480 T drm_create_scaling_filter_prop +ffffffff819565d0 T drm_plane_create_scaling_filter_property +ffffffff81956640 t kasprintf +ffffffff81956710 t __setplane_internal +ffffffff81956900 t __setplane_check +ffffffff81957000 T drm_plane_helper_update_primary +ffffffff819574b0 t get_connectors_for_crtc +ffffffff819575c0 T drm_plane_helper_disable_primary +ffffffff81957670 T drm_plane_helper_destroy +ffffffff819576a0 T drm_plane_helper_atomic_check +ffffffff81958000 T drm_prime_remove_buf_handle +ffffffff81958090 T drm_prime_init_file_private +ffffffff819580e0 T drm_prime_destroy_file_private +ffffffff81958140 T drm_gem_dmabuf_export +ffffffff819581a0 T drm_gem_dmabuf_release +ffffffff819581e0 T drm_gem_prime_fd_to_handle +ffffffff819583e0 T drm_gem_prime_import +ffffffff81958440 t drm_prime_add_buf_handle +ffffffff81958590 T drm_prime_fd_to_handle_ioctl +ffffffff819585e0 T drm_gem_prime_handle_to_fd +ffffffff81958810 T drm_prime_handle_to_fd_ioctl +ffffffff81958870 T drm_gem_map_attach +ffffffff81958880 T drm_gem_map_detach +ffffffff81958890 T drm_gem_dmabuf_vmap +ffffffff819588a0 T drm_gem_dmabuf_vunmap +ffffffff819588b0 T drm_gem_prime_mmap +ffffffff81958900 T drm_prime_pages_to_sg +ffffffff81958950 T drm_prime_get_contiguous_size +ffffffff819589a0 T drm_gem_prime_export +ffffffff81958a30 T drm_gem_prime_import_dev +ffffffff81958a90 T drm_prime_sg_to_page_array +ffffffff81958ae0 T drm_prime_sg_to_dma_addr_array +ffffffff81958b30 T drm_prime_gem_destroy +ffffffff81959000 T __drm_puts_coredump +ffffffff819590e0 T __drm_printfn_coredump +ffffffff81959200 T __drm_puts_seq_file +ffffffff81959230 T __drm_printfn_seq_file +ffffffff81959260 T __drm_printfn_info +ffffffff81959290 T __drm_printfn_debug +ffffffff819592c0 T __drm_printfn_err +ffffffff81959300 T drm_puts +ffffffff81959330 T drm_printf +ffffffff819593b0 T drm_print_bits +ffffffff819595d0 T drm_dev_printk +ffffffff81959660 T __drm_dev_dbg +ffffffff819596f0 T ___drm_dbg +ffffffff81959780 T __drm_err +ffffffff81959810 T drm_print_regset32 +ffffffff8195a000 T drm_crtc_mode_valid +ffffffff8195a040 T drm_encoder_mode_valid +ffffffff8195a080 T drm_connector_mode_valid +ffffffff8195a0f0 T drm_kms_helper_poll_enable +ffffffff8195a1e0 T drm_helper_probe_detect +ffffffff8195a3d0 T drm_helper_probe_single_connector_modes +ffffffff8195a990 t __drm_helper_update_and_validate +ffffffff8195ad40 T drm_kms_helper_hotplug_event +ffffffff8195ad80 T drm_kms_helper_connector_hotplug_event +ffffffff8195adc0 T drm_kms_helper_is_poll_worker +ffffffff8195adf0 T drm_kms_helper_poll_disable +ffffffff8195ae60 T drm_kms_helper_poll_init +ffffffff8195aec0 t output_poll_execute +ffffffff8195b150 T drm_kms_helper_poll_fini +ffffffff8195b1d0 T drm_connector_helper_hpd_irq_event +ffffffff8195b290 t check_connector_changed +ffffffff8195b470 T drm_helper_hpd_irq_event +ffffffff8195b5c0 T drm_crtc_helper_mode_valid_fixed +ffffffff8195b610 T drm_connector_helper_get_modes_from_ddc +ffffffff8195b690 T drm_connector_helper_get_modes_fixed +ffffffff8195b7f0 T drm_connector_helper_get_modes +ffffffff8195b850 t __delayed_work_tick +ffffffff8195c000 T drm_property_create +ffffffff8195c1f0 T drm_property_create_enum +ffffffff8195c2a0 T drm_property_add_enum +ffffffff8195c4b0 T drm_property_destroy +ffffffff8195c560 T drm_property_create_bitmask +ffffffff8195c690 T drm_property_create_range +ffffffff8195c6f0 T drm_property_create_signed_range +ffffffff8195c760 T drm_property_create_object +ffffffff8195c7f0 T drm_property_create_bool +ffffffff8195c850 T drm_mode_getproperty_ioctl +ffffffff8195ca60 T drm_property_create_blob +ffffffff8195cb90 t drm_property_free_blob +ffffffff8195cc00 T drm_property_blob_put +ffffffff8195cc30 T drm_property_destroy_user_blobs +ffffffff8195ccb0 T drm_property_blob_get +ffffffff8195ccf0 T drm_property_lookup_blob +ffffffff8195cd10 T drm_property_replace_global_blob +ffffffff8195ce60 T drm_property_replace_blob +ffffffff8195ced0 T drm_mode_getblob_ioctl +ffffffff8195cf90 T drm_mode_createblob_ioctl +ffffffff8195d090 T drm_mode_destroyblob_ioctl +ffffffff8195d190 T drm_property_change_valid_get +ffffffff8195d3e0 T drm_property_change_valid_put +ffffffff8195e000 T drm_rect_intersect +ffffffff8195e080 T drm_rect_clip_scaled +ffffffff8195e2e0 T drm_rect_calc_hscale +ffffffff8195e3a0 T drm_rect_calc_vscale +ffffffff8195e470 T drm_rect_debug_print +ffffffff8195e580 T drm_rect_rotate +ffffffff8195e640 T drm_rect_rotate_inv +ffffffff8195f000 T drm_self_refresh_helper_update_avg_times +ffffffff8195f140 T drm_self_refresh_helper_alter_state +ffffffff8195f2d0 T drm_self_refresh_helper_init +ffffffff8195f470 t drm_self_refresh_helper_entry_work +ffffffff8195f5d0 T drm_self_refresh_helper_cleanup +ffffffff8195f650 t __delayed_work_tick +ffffffff81960000 T drm_syncobj_find +ffffffff81960070 T drm_syncobj_add_point +ffffffff81960160 t syncobj_wait_syncobj_func +ffffffff81960210 T drm_syncobj_replace_fence +ffffffff819602a0 T drm_syncobj_find_fence +ffffffff81960600 t drm_syncobj_fence_add_wait +ffffffff819606d0 T drm_syncobj_free +ffffffff81960750 T drm_syncobj_create +ffffffff81960960 T drm_syncobj_get_handle +ffffffff81960a80 T drm_syncobj_get_fd +ffffffff81960ad0 T drm_syncobj_open +ffffffff81960b00 T drm_syncobj_release +ffffffff81960b30 t drm_syncobj_release_handle +ffffffff81960be0 T drm_syncobj_create_ioctl +ffffffff81960d00 T drm_syncobj_destroy_ioctl +ffffffff81960e20 T drm_syncobj_handle_to_fd_ioctl +ffffffff81961000 T drm_syncobj_fd_to_handle_ioctl +ffffffff819611e0 T drm_syncobj_transfer_ioctl +ffffffff819615f0 T drm_timeout_abs_to_jiffies +ffffffff819616d0 T drm_syncobj_wait_ioctl +ffffffff81961860 t drm_syncobj_array_find +ffffffff81961a90 t drm_syncobj_array_free +ffffffff81961b70 T drm_syncobj_timeline_wait_ioctl +ffffffff81961d00 T drm_syncobj_reset_ioctl +ffffffff81961e50 T drm_syncobj_signal_ioctl +ffffffff81961fd0 T drm_syncobj_timeline_signal_ioctl +ffffffff819621f0 T drm_syncobj_query_ioctl +ffffffff819623f0 t drm_syncobj_array_wait_timeout +ffffffff81962860 t syncobj_wait_fence_func +ffffffff81963000 T drm_vblank_count +ffffffff81963090 T drm_crtc_accurate_vblank_count +ffffffff819631a0 t drm_update_vblank_count +ffffffff819635f0 T drm_vblank_disable_and_save +ffffffff81963740 T drm_vblank_init +ffffffff819638c0 t vblank_disable_fn +ffffffff81963940 t drm_vblank_init_release +ffffffff819639c0 T drm_dev_has_vblank +ffffffff819639f0 T drm_crtc_vblank_waitqueue +ffffffff81963a30 T drm_calc_timestamping_constants +ffffffff81963c60 T drm_crtc_vblank_helper_get_vblank_timestamp_internal +ffffffff81964190 T drm_crtc_vblank_helper_get_vblank_timestamp +ffffffff819641b0 T drm_crtc_vblank_count +ffffffff81964240 T drm_crtc_vblank_count_and_time +ffffffff81964300 T drm_crtc_arm_vblank_event +ffffffff819643e0 T drm_crtc_send_vblank_event +ffffffff81964590 T drm_vblank_get +ffffffff819646a0 t drm_vblank_enable +ffffffff81964860 T drm_crtc_vblank_get +ffffffff81964960 T drm_vblank_put +ffffffff81964a90 T drm_crtc_vblank_put +ffffffff81964ab0 T drm_wait_one_vblank +ffffffff81964f00 T drm_crtc_wait_one_vblank +ffffffff81964f20 T drm_crtc_vblank_off +ffffffff81965300 T drm_crtc_vblank_reset +ffffffff81965430 T drm_crtc_set_max_vblank_count +ffffffff81965510 T drm_crtc_vblank_on +ffffffff81965660 t drm_reset_vblank_timestamp +ffffffff81965860 T drm_crtc_vblank_restore +ffffffff81965c40 T drm_legacy_modeset_ctl_ioctl +ffffffff81965e50 T drm_wait_vblank_ioctl +ffffffff81966890 T drm_handle_vblank +ffffffff81966b70 t drm_handle_vblank_events +ffffffff81966e00 T drm_crtc_handle_vblank +ffffffff81966e20 T drm_crtc_get_sequence_ioctl +ffffffff81967010 T drm_crtc_queue_sequence_ioctl +ffffffff819673e0 t __get_vblank_counter +ffffffff81968000 T drm_handle_vblank_works +ffffffff819681b0 T drm_vblank_cancel_pending_works +ffffffff819682f0 T drm_vblank_work_schedule +ffffffff81968570 T drm_vblank_work_cancel_sync +ffffffff819686d0 T drm_vblank_work_flush +ffffffff819687a0 T drm_vblank_work_init +ffffffff81968810 T drm_vblank_worker_init +ffffffff81969000 T drm_vma_offset_manager_init +ffffffff81969040 T drm_vma_offset_manager_destroy +ffffffff81969050 T drm_vma_offset_lookup_locked +ffffffff819690e0 T drm_vma_offset_add +ffffffff81969170 T drm_vma_offset_remove +ffffffff819691c0 T drm_vma_node_allow +ffffffff819692f0 T drm_vma_node_revoke +ffffffff81969370 T drm_vma_node_is_allowed +ffffffff8196a000 T hdmi_avi_infoframe_init +ffffffff8196a070 T hdmi_avi_infoframe_check +ffffffff8196a0c0 T hdmi_avi_infoframe_pack_only +ffffffff8196a2c0 T hdmi_avi_infoframe_pack +ffffffff8196a320 T hdmi_spd_infoframe_init +ffffffff8196a3d0 T hdmi_spd_infoframe_check +ffffffff8196a420 T hdmi_spd_infoframe_pack_only +ffffffff8196a550 T hdmi_spd_infoframe_pack +ffffffff8196a6a0 T hdmi_audio_infoframe_init +ffffffff8196a6f0 T hdmi_audio_infoframe_check +ffffffff8196a740 T hdmi_audio_infoframe_pack_only +ffffffff8196a890 T hdmi_audio_infoframe_pack +ffffffff8196a8e0 T hdmi_audio_infoframe_pack_for_dp +ffffffff8196a9d0 T hdmi_vendor_infoframe_init +ffffffff8196aa30 T hdmi_vendor_infoframe_check +ffffffff8196aad0 T hdmi_vendor_infoframe_pack_only +ffffffff8196aca0 T hdmi_vendor_infoframe_pack +ffffffff8196ad40 T hdmi_drm_infoframe_init +ffffffff8196ada0 T hdmi_drm_infoframe_check +ffffffff8196adf0 T hdmi_drm_infoframe_pack_only +ffffffff8196afc0 T hdmi_drm_infoframe_pack +ffffffff8196b010 T hdmi_infoframe_check +ffffffff8196b160 T hdmi_infoframe_pack_only +ffffffff8196b370 T hdmi_infoframe_pack +ffffffff8196b4e0 T hdmi_infoframe_log +ffffffff8196c480 T hdmi_drm_infoframe_unpack_only +ffffffff8196c560 T hdmi_infoframe_unpack +ffffffff8196d000 T list_sort +ffffffff8196e000 T radix_tree_lookup +ffffffff8196e0b0 T radix_tree_iter_find +ffffffff8196e190 T radix_tree_delete +ffffffff8196e320 T radix_tree_iter_delete +ffffffff8196e340 T radix_tree_insert +ffffffff8196f000 T sort +ffffffff8196f040 t qsort +ffffffff81971000 T drm_dp_dual_mode_read +ffffffff81971110 T drm_dp_dual_mode_write +ffffffff819711f0 T drm_dp_dual_mode_detect +ffffffff81971490 T drm_dp_dual_mode_max_tmds_clock +ffffffff819715b0 T drm_dp_dual_mode_get_tmds_output +ffffffff819716e0 T drm_dp_dual_mode_set_tmds_output +ffffffff81971970 T drm_dp_get_dual_mode_type_name +ffffffff819719e0 T drm_lspcon_get_mode +ffffffff81971b90 T drm_lspcon_set_mode +ffffffff81972000 T drm_dp_channel_eq_ok +ffffffff81972080 T drm_dp_clock_recovery_ok +ffffffff81972100 T drm_dp_get_adjust_request_voltage +ffffffff81972140 T drm_dp_get_adjust_request_pre_emphasis +ffffffff81972180 T drm_dp_get_adjust_tx_ffe_preset +ffffffff819721c0 T drm_dp_128b132b_lane_channel_eq_done +ffffffff81972240 T drm_dp_128b132b_lane_symbol_locked +ffffffff819722b0 T drm_dp_128b132b_eq_interlane_align_done +ffffffff819722e0 T drm_dp_128b132b_cds_interlane_align_done +ffffffff81972310 T drm_dp_128b132b_link_training_failed +ffffffff81972340 T drm_dp_read_clock_recovery_delay +ffffffff81972440 T drm_dp_read_channel_eq_delay +ffffffff81972530 T drm_dp_128b132b_read_aux_rd_interval +ffffffff819725e0 T drm_dp_link_train_clock_recovery_delay +ffffffff81972660 t __8b10b_clock_recovery_delay_us +ffffffff819726e0 T drm_dp_link_train_channel_eq_delay +ffffffff81972750 T drm_dp_phy_name +ffffffff81972790 T drm_dp_lttpr_link_train_clock_recovery_delay +ffffffff819727b0 T drm_dp_lttpr_link_train_channel_eq_delay +ffffffff81972820 T drm_dp_link_rate_to_bw_code +ffffffff81972880 T drm_dp_bw_code_to_link_rate +ffffffff819728e0 T drm_dp_dpcd_probe +ffffffff81972a20 t drm_dp_dpcd_access +ffffffff81972b50 T drm_dp_dpcd_read +ffffffff81972c80 T drm_dp_dpcd_write +ffffffff81972d90 T drm_dp_dpcd_read_link_status +ffffffff81972db0 T drm_dp_dpcd_read_phy_link_status +ffffffff81972eb0 T drm_dp_downstream_is_type +ffffffff81972ef0 T drm_dp_downstream_is_tmds +ffffffff81972f60 T drm_dp_send_real_edid_checksum +ffffffff819731c0 T drm_dp_read_dpcd_caps +ffffffff81973350 T drm_dp_read_downstream_info +ffffffff81973450 T drm_dp_downstream_max_dotclock +ffffffff819734a0 T drm_dp_downstream_max_tmds_clock +ffffffff81973540 T drm_dp_downstream_min_tmds_clock +ffffffff819735c0 T drm_dp_downstream_max_bpc +ffffffff81973660 T drm_dp_downstream_420_passthrough +ffffffff819736c0 T drm_dp_downstream_444_to_420_conversion +ffffffff81973720 T drm_dp_downstream_rgb_to_ycbcr_conversion +ffffffff81973780 T drm_dp_downstream_mode +ffffffff81973800 T drm_dp_downstream_id +ffffffff81973820 T drm_dp_downstream_debug +ffffffff819738c0 T drm_dp_subconnector_type +ffffffff81973920 T drm_dp_set_subconnector_property +ffffffff81973990 T drm_dp_read_sink_count_cap +ffffffff819739e0 T drm_dp_read_sink_count +ffffffff81973a40 T drm_dp_remote_aux_init +ffffffff81973a70 t drm_dp_aux_crc_work +ffffffff81973be0 T drm_dp_aux_init +ffffffff81973c90 T drm_dp_aux_register +ffffffff81973db0 T drm_dp_aux_unregister +ffffffff81973de0 T drm_dp_psr_setup_time +ffffffff81973e20 T drm_dp_start_crc +ffffffff81973ec0 T drm_dp_stop_crc +ffffffff81973f50 T drm_dp_read_desc +ffffffff81974110 T drm_dp_dsc_sink_max_slice_count +ffffffff819741a0 T drm_dp_dsc_sink_line_buf_depth +ffffffff819741e0 T drm_dp_dsc_sink_supported_input_bpcs +ffffffff81974240 T drm_dp_read_lttpr_common_caps +ffffffff81974300 T drm_dp_read_lttpr_phy_caps +ffffffff819743c0 T drm_dp_lttpr_count +ffffffff81974440 T drm_dp_lttpr_max_link_rate +ffffffff81974490 T drm_dp_lttpr_max_lane_count +ffffffff819744c0 T drm_dp_lttpr_voltage_swing_level_3_supported +ffffffff819744f0 T drm_dp_lttpr_pre_emphasis_level_3_supported +ffffffff81974520 T drm_dp_get_phy_test_pattern +ffffffff81974640 T drm_dp_set_phy_test_pattern +ffffffff81974710 T drm_dp_vsc_sdp_log +ffffffff81974a40 T drm_dp_get_pcon_max_frl_bw +ffffffff81974a80 T drm_dp_pcon_frl_prepare +ffffffff81974ad0 T drm_dp_pcon_is_frl_ready +ffffffff81974b20 T drm_dp_pcon_frl_configure_1 +ffffffff81974c10 T drm_dp_pcon_frl_configure_2 +ffffffff81974c70 T drm_dp_pcon_reset_frl_config +ffffffff81974cc0 T drm_dp_pcon_frl_enable +ffffffff81974d70 T drm_dp_pcon_hdmi_link_active +ffffffff81974dc0 T drm_dp_pcon_hdmi_link_mode +ffffffff81974e30 T drm_dp_pcon_hdmi_frl_link_error_count +ffffffff81974f30 T drm_dp_pcon_enc_is_dsc_1_2 +ffffffff81974f60 T drm_dp_pcon_dsc_max_slices +ffffffff81974ff0 T drm_dp_pcon_dsc_max_slice_width +ffffffff81975020 T drm_dp_pcon_dsc_bpp_incr +ffffffff81975060 T drm_dp_pcon_pps_default +ffffffff819750e0 T drm_dp_pcon_pps_override_buf +ffffffff81975190 T drm_dp_pcon_pps_override_param +ffffffff81975270 T drm_dp_pcon_convert_rgb_to_ycbcr +ffffffff81975300 T drm_edp_backlight_set_level +ffffffff819753e0 T drm_edp_backlight_enable +ffffffff819755f0 t drm_edp_backlight_set_enable +ffffffff81975730 T drm_edp_backlight_disable +ffffffff81975770 T drm_edp_backlight_init +ffffffff81975cc0 T drm_panel_dp_aux_backlight +ffffffff81975e50 t __128b132b_channel_eq_delay_us +ffffffff81975ed0 t __8b10b_channel_eq_delay_us +ffffffff81975f50 t drm_dp_aux_get_crc +ffffffff81976020 t drm_dp_i2c_xfer +ffffffff81976270 t drm_dp_i2c_functionality +ffffffff819762a0 t drm_dp_i2c_do_msg +ffffffff81976680 t lock_bus +ffffffff819766a0 t trylock_bus +ffffffff819766f0 t unlock_bus +ffffffff81976710 t dp_aux_backlight_update_status +ffffffff81977000 T drm_dp_encode_sideband_req +ffffffff81977410 T drm_dp_decode_sideband_req +ffffffff81977950 T drm_dp_dump_sideband_msg_req_body +ffffffff81977d00 T drm_dp_mst_get_port_malloc +ffffffff81977d40 T drm_dp_mst_put_port_malloc +ffffffff81977e30 t kref_put +ffffffff81977e70 T drm_atomic_get_mst_payload_state +ffffffff81977ec0 T drm_dp_mst_dpcd_read +ffffffff81978180 T drm_dp_mst_dpcd_write +ffffffff819781d0 t drm_dp_send_dpcd_write +ffffffff81978410 T drm_dp_mst_connector_late_register +ffffffff81978490 T drm_dp_mst_connector_early_unregister +ffffffff819784d0 T drm_dp_send_power_updown_phy +ffffffff81978710 t drm_dp_mst_topology_put_port +ffffffff81978840 t drm_dp_mst_wait_tx_reply +ffffffff81978b90 T drm_dp_send_query_stream_enc_status +ffffffff81978e50 T drm_dp_add_payload_part1 +ffffffff81978fd0 T drm_dp_remove_payload +ffffffff81979130 T drm_dp_add_payload_part2 +ffffffff819792e0 T drm_dp_get_vc_payload_bw +ffffffff81979370 T drm_dp_read_mst_cap +ffffffff819793d0 T drm_dp_mst_topology_mgr_set_mst +ffffffff81979660 t drm_dp_dpcd_write_payload +ffffffff819797f0 t drm_dp_mst_topology_put_mstb +ffffffff819798f0 T drm_dp_mst_topology_mgr_suspend +ffffffff819799b0 t drm_dp_mst_topology_mgr_invalidate_mstb +ffffffff81979a20 T drm_dp_mst_topology_mgr_resume +ffffffff81979c60 T drm_dp_mst_hpd_irq +ffffffff8197aae0 T drm_dp_mst_detect_port +ffffffff8197ac50 T drm_dp_mst_get_edid +ffffffff8197ad50 T drm_dp_atomic_find_time_slots +ffffffff8197b020 T drm_atomic_get_mst_topology_state +ffffffff8197b030 T drm_dp_atomic_release_time_slots +ffffffff8197b250 T drm_dp_mst_atomic_setup_commit +ffffffff8197b3e0 T drm_dp_mst_atomic_wait_for_dependencies +ffffffff8197b560 T drm_dp_mst_root_conn_atomic_check +ffffffff8197b670 T drm_dp_mst_update_slots +ffffffff8197b6c0 T drm_dp_check_act_status +ffffffff8197b870 T drm_dp_calc_pbn_mode +ffffffff8197b8e0 T drm_dp_mst_dump_topology +ffffffff8197bb30 t drm_dp_mst_dump_mstb +ffffffff8197bba0 T drm_dp_mst_add_affected_dsc_crtcs +ffffffff8197bcd0 T drm_dp_mst_dsc_aux_for_port +ffffffff8197bef0 T drm_dp_mst_atomic_enable_dsc +ffffffff8197c090 T drm_dp_mst_atomic_check +ffffffff8197c370 t drm_dp_mst_atomic_check_mstb_bw_limit +ffffffff8197c640 t drm_dp_mst_duplicate_state +ffffffff8197c810 t drm_dp_mst_destroy_state +ffffffff8197c8d0 T drm_atomic_get_new_mst_topology_state +ffffffff8197c8e0 T drm_dp_mst_topology_mgr_init +ffffffff8197cb40 t drm_dp_mst_link_probe_work +ffffffff8197cde0 t drm_dp_tx_work +ffffffff8197ce20 t drm_dp_delayed_destroy_work +ffffffff8197d240 t drm_dp_mst_up_req_work +ffffffff8197d740 T drm_dp_mst_topology_mgr_destroy +ffffffff8197d7c0 t drm_dp_mst_is_virtual_dpcd +ffffffff8197d8a0 t drm_dp_free_mst_branch_device +ffffffff8197d8e0 t drm_dp_mst_topology_get_port_validated_locked +ffffffff8197d960 t drm_dp_mst_dump_sideband_msg_tx +ffffffff8197db70 t process_single_down_tx_qlock +ffffffff8197dce0 t process_single_tx_qlock +ffffffff8197e1c0 t drm_dp_msg_data_crc4 +ffffffff8197e2e0 t drm_dp_payload_send_msg +ffffffff8197e730 t drm_dp_mst_topology_get_mstb_validated_locked +ffffffff8197e7b0 t drm_dp_get_one_sb_msg +ffffffff8197eed0 t drm_dp_get_mst_branch_device +ffffffff8197f040 t drm_dp_check_and_send_link_address +ffffffff8197f110 t drm_dp_send_link_address +ffffffff8197fdc0 t drm_dp_send_enum_path_resources +ffffffff81980020 t drm_dp_port_set_pdt +ffffffff81980300 t drm_dp_mst_port_add_connector +ffffffff819804e0 t drm_dp_mst_i2c_xfer +ffffffff81980bd0 t drm_dp_mst_i2c_functionality +ffffffff81980c00 t get_mst_branch_device_by_guid_helper +ffffffff81981000 T drm_dsc_dp_pps_header_init +ffffffff81981030 T drm_dsc_dp_rc_buffer_size +ffffffff81981090 T drm_dsc_pps_payload_pack +ffffffff81981320 T drm_dsc_compute_rc_parameters +ffffffff81982000 T drm_connector_attach_content_protection_property +ffffffff81982030 T drm_hdcp_check_ksvs_revoked +ffffffff81982080 T drm_hdcp_update_content_protection +ffffffff81983000 T drm_hdmi_infoframe_set_hdr_metadata +ffffffff81983120 T drm_hdmi_avi_infoframe_colorimetry +ffffffff81983170 T drm_hdmi_avi_infoframe_bars +ffffffff819831c0 T drm_hdmi_avi_infoframe_content_type +ffffffff81984000 T drm_scdc_read +ffffffff81984090 T drm_scdc_write +ffffffff81984170 T drm_scdc_get_scrambling_status +ffffffff81984220 T drm_scdc_set_scrambling +ffffffff81984370 T drm_scdc_set_high_tmds_clock_ratio +ffffffff81985000 T drm_gem_ttm_mmap +ffffffff81985070 T drm_gem_ttm_vmap +ffffffff819850c0 T drm_gem_ttm_vunmap +ffffffff81986000 T ttm_agp_bind +ffffffff81986050 T ttm_agp_unbind +ffffffff81986070 T ttm_agp_is_bound +ffffffff819860c0 T ttm_agp_destroy +ffffffff819860e0 T ttm_agp_tt_create +ffffffff81987000 T ttm_bo_move_to_lru_tail +ffffffff81987040 T ttm_bo_set_bulk_move +ffffffff81987100 T ttm_bo_delayed_delete +ffffffff819873f0 t ttm_bo_cleanup_refs +ffffffff819877a0 T ttm_bo_put +ffffffff81987ce0 T ttm_bo_lock_delayed_workqueue +ffffffff81987d60 T ttm_bo_unlock_delayed_workqueue +ffffffff81987dd0 T ttm_bo_eviction_valuable +ffffffff81987e20 T ttm_mem_evict_first +ffffffff819886e0 T ttm_bo_pin +ffffffff81988780 T ttm_bo_unpin +ffffffff81988890 T ttm_bo_mem_space +ffffffff81988ae0 t ttm_bo_add_move_fence +ffffffff81988ba0 T ttm_bo_validate +ffffffff81988d20 T ttm_bo_init_reserved +ffffffff81988fc0 T ttm_bo_init_validate +ffffffff81989130 T ttm_bo_unmap_virtual +ffffffff81989240 T ttm_bo_wait +ffffffff819892c0 T ttm_bo_swapout +ffffffff819896d0 t ttm_bo_handle_move_mem +ffffffff81989840 T ttm_bo_tt_destroy +ffffffff8198a000 T ttm_mem_io_reserve +ffffffff8198a060 T ttm_mem_io_free +ffffffff8198a0d0 T ttm_move_memcpy +ffffffff8198a290 T ttm_bo_move_memcpy +ffffffff8198a4b0 T ttm_bo_move_sync_cleanup +ffffffff8198a5a0 T ttm_io_prot +ffffffff8198a5e0 T ttm_bo_kmap +ffffffff8198a890 T ttm_bo_kunmap +ffffffff8198a9d0 T ttm_bo_vmap +ffffffff8198abc0 T ttm_bo_vunmap +ffffffff8198aca0 T ttm_bo_move_accel_cleanup +ffffffff8198af60 T ttm_bo_pipeline_gutting +ffffffff8198b200 t ttm_buffer_object_transfer +ffffffff8198b450 t ttm_transfered_destroy +ffffffff8198c000 T ttm_bo_vm_reserve +ffffffff8198c250 T ttm_bo_vm_fault_reserved +ffffffff8198c560 T ttm_bo_vm_fault +ffffffff8198c6c0 T ttm_bo_vm_reference +ffffffff8198c6f0 T ttm_bo_vm_detach +ffffffff8198c700 T ttm_bo_mmap_obj +ffffffff8198d000 T ttm_global_swapout +ffffffff8198d100 T ttm_device_swapout +ffffffff8198d210 T ttm_device_init +ffffffff8198d460 t ttm_device_delayed_workqueue +ffffffff8198d500 T ttm_device_fini +ffffffff8198d6e0 T ttm_device_clear_dma_mappings +ffffffff8198d780 t ttm_device_clear_lru_dma_mappings +ffffffff8198d830 t __delayed_work_tick +ffffffff8198e000 T ttm_eu_backoff_reservation +ffffffff8198e130 T ttm_eu_reserve_buffers +ffffffff8198e520 T ttm_eu_fence_buffer_objects +ffffffff8198e670 t __ww_mutex_lock +ffffffff8198f000 T ttm_prot_from_caching +ffffffff81990000 T ttm_pool_alloc +ffffffff819907b0 T ttm_pool_free +ffffffff81990bd0 T ttm_pool_init +ffffffff81990e80 T ttm_pool_fini +ffffffff81991050 t ttm_pool_type_fini +ffffffff81991290 T ttm_pool_mgr_init +ffffffff81991570 t ttm_pool_shrinker_count +ffffffff819915c0 t ttm_pool_shrinker_scan +ffffffff819917d0 T ttm_pool_mgr_fini +ffffffff81992000 T ttm_range_man_init_nocheck +ffffffff81992180 T ttm_range_man_fini_nocheck +ffffffff81992310 t ttm_range_man_alloc +ffffffff81992450 t ttm_range_man_free +ffffffff819924b0 t ttm_range_man_intersects +ffffffff81992510 t ttm_range_man_compatible +ffffffff81992570 t ttm_range_man_debug +ffffffff81993000 T ttm_lru_bulk_move_init +ffffffff81993020 T ttm_lru_bulk_move_tail +ffffffff819931e0 T ttm_resource_add_bulk_move +ffffffff819932a0 T ttm_resource_del_bulk_move +ffffffff81993390 T ttm_resource_move_to_lru_tail +ffffffff819934e0 T ttm_resource_init +ffffffff819935e0 T ttm_resource_fini +ffffffff81993650 T ttm_resource_alloc +ffffffff81993790 T ttm_resource_free +ffffffff81993900 T ttm_resource_intersects +ffffffff81993950 T ttm_resource_compatible +ffffffff819939a0 T ttm_resource_compat +ffffffff81993b30 T ttm_resource_set_bo +ffffffff81993b80 T ttm_resource_manager_init +ffffffff81993c20 T ttm_resource_manager_evict_all +ffffffff81993de0 T ttm_resource_manager_usage +ffffffff81993e40 T ttm_resource_manager_debug +ffffffff81993f20 T ttm_resource_manager_first +ffffffff81993fb0 T ttm_resource_manager_next +ffffffff819940f0 T ttm_kmap_iter_iomap_init +ffffffff81994150 T ttm_kmap_iter_linear_io_init +ffffffff81994320 T ttm_kmap_iter_linear_io_fini +ffffffff81994370 T ttm_resource_manager_create_debugfs +ffffffff819943a0 t ttm_kmap_iter_iomap_map_local +ffffffff819944d0 t ttm_kmap_iter_iomap_unmap_local +ffffffff819944f0 t ttm_kmap_iter_linear_io_map_local +ffffffff81995000 T ttm_sys_man_init +ffffffff81995130 t ttm_sys_man_alloc +ffffffff819951b0 t ttm_sys_man_free +ffffffff81996000 T ttm_tt_create +ffffffff81996100 T ttm_tt_destroy +ffffffff81996120 T ttm_tt_init +ffffffff819961f0 T ttm_tt_fini +ffffffff819962d0 T ttm_sg_tt_init +ffffffff819964f0 T ttm_tt_swapin +ffffffff81996600 T ttm_tt_swapout +ffffffff81996650 T ttm_tt_populate +ffffffff81996820 T ttm_tt_unpopulate +ffffffff819968c0 T ttm_tt_mgr_init +ffffffff81996920 T ttm_kmap_iter_tt_init +ffffffff81996980 t ttm_kmap_iter_tt_map_local +ffffffff819969d0 t ttm_kmap_iter_tt_unmap_local +ffffffff81997000 T drm_sched_entity_init +ffffffff81997180 T drm_sched_entity_modify_sched +ffffffff81997200 T drm_sched_entity_is_ready +ffffffff81997240 T drm_sched_entity_flush +ffffffff819975b0 T drm_sched_entity_fini +ffffffff819978c0 T drm_sched_entity_destroy +ffffffff81997910 T drm_sched_entity_set_priority +ffffffff81997950 T drm_sched_entity_pop_job +ffffffff81997b90 T drm_sched_entity_select_rq +ffffffff81997c70 T drm_sched_entity_push_job +ffffffff81997d70 t drm_sched_entity_kill_jobs_cb +ffffffff81997dc0 t drm_sched_entity_kill_jobs_work +ffffffff81997e30 t drm_sched_entity_clear_dep +ffffffff81997e50 t drm_sched_entity_wakeup +ffffffff81998000 T drm_sched_fence_slab_init +ffffffff81998060 T drm_sched_fence_slab_fini +ffffffff81998080 T drm_sched_fence_scheduled +ffffffff81998090 T drm_sched_fence_finished +ffffffff819980a0 T drm_sched_fence_free +ffffffff81998140 T to_drm_sched_fence +ffffffff819981a0 T drm_sched_fence_alloc +ffffffff81998220 T drm_sched_fence_init +ffffffff819982a0 t drm_sched_fence_get_driver_name +ffffffff819982d0 t drm_sched_fence_get_timeline_name +ffffffff81998320 t drm_sched_fence_release_scheduled +ffffffff81998420 t drm_sched_fence_release_finished +ffffffff81999000 T drm_sched_rq_add_entity +ffffffff81999090 T drm_sched_rq_remove_entity +ffffffff81999120 T drm_sched_dependency_optimized +ffffffff819991b0 T drm_sched_fault +ffffffff819991e0 T drm_sched_suspend_timeout +ffffffff81999260 T drm_sched_resume_timeout +ffffffff81999300 T drm_sched_increase_karma +ffffffff81999320 T drm_sched_increase_karma_ext +ffffffff81999470 T drm_sched_reset_karma +ffffffff81999480 T drm_sched_stop +ffffffff81999650 T drm_sched_start +ffffffff81999760 t drm_sched_job_done_cb +ffffffff81999770 t drm_sched_job_done +ffffffff81999840 T drm_sched_resubmit_jobs +ffffffff81999990 T drm_sched_resubmit_jobs_ext +ffffffff81999af0 T drm_sched_job_init +ffffffff81999b70 T drm_sched_job_arm +ffffffff81999c00 T drm_sched_job_add_dependency +ffffffff81999d60 T drm_sched_job_add_implicit_dependencies +ffffffff81999e20 T drm_sched_job_cleanup +ffffffff81999ed0 T drm_sched_wakeup +ffffffff81999fa0 T drm_sched_pick_best +ffffffff8199a050 T drm_sched_init +ffffffff8199a2d0 t drm_sched_job_timedout +ffffffff8199a420 t drm_sched_main +ffffffff8199a840 T drm_sched_fini +ffffffff8199aa50 t __delayed_work_tick +ffffffff8199aa70 t drm_sched_get_cleanup_job +ffffffff8199abb0 t drm_sched_select_entity +ffffffff8199b000 t ch7017_init +ffffffff8199b140 t ch7017_dpms +ffffffff8199b380 t ch7017_mode_valid +ffffffff8199b3c0 t ch7017_mode_set +ffffffff8199b670 t ch7017_detect +ffffffff8199b6a0 t ch7017_get_hw_state +ffffffff8199b720 t ch7017_destroy +ffffffff8199b770 t ch7017_dump_regs +ffffffff8199c000 t ch7xxx_init +ffffffff8199c290 t ch7xxx_dpms +ffffffff8199c360 t ch7xxx_mode_valid +ffffffff8199c3a0 t ch7xxx_mode_set +ffffffff8199c840 t ch7xxx_detect +ffffffff8199ca90 t ch7xxx_get_hw_state +ffffffff8199cb60 t ch7xxx_destroy +ffffffff8199cbb0 t ch7xxx_dump_regs +ffffffff8199d000 t ivch_init +ffffffff8199d380 t ivch_dpms +ffffffff8199d7a0 t ivch_mode_valid +ffffffff8199d7e0 t ivch_mode_set +ffffffff8199dbd0 t ivch_detect +ffffffff8199dc00 t ivch_get_hw_state +ffffffff8199de20 t ivch_destroy +ffffffff8199de70 t ivch_dump_regs +ffffffff8199f000 t ns2501_init +ffffffff8199f200 t ns2501_dpms +ffffffff8199f910 t ns2501_mode_valid +ffffffff8199f9e0 t ns2501_mode_set +ffffffff819a0be0 t ns2501_detect +ffffffff819a0c10 t ns2501_get_hw_state +ffffffff819a0cf0 t ns2501_destroy +ffffffff819a1000 t sil164_init +ffffffff819a1200 t sil164_dpms +ffffffff819a1330 t sil164_mode_valid +ffffffff819a1360 t sil164_mode_set +ffffffff819a1390 t sil164_detect +ffffffff819a1480 t sil164_get_hw_state +ffffffff819a1550 t sil164_destroy +ffffffff819a15a0 t sil164_dump_regs +ffffffff819a2000 t tfp410_init +ffffffff819a2340 t tfp410_dpms +ffffffff819a2470 t tfp410_mode_valid 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cpt_set_link_train +ffffffff819a54f0 t g4x_set_link_train +ffffffff819a55b0 t chv_set_signal_levels +ffffffff819a56c0 t vlv_set_signal_levels +ffffffff819a57c0 t ivb_cpu_edp_set_signal_levels +ffffffff819a58c0 t snb_cpu_edp_set_signal_levels +ffffffff819a59c0 t g4x_set_signal_levels +ffffffff819a5ac0 t intel_dp_preemph_max_3 +ffffffff819a5af0 t intel_dp_voltage_max_3 +ffffffff819a5b20 t intel_dp_preemph_max_2 +ffffffff819a5b50 t intel_dp_voltage_max_2 +ffffffff819a5b80 t gm45_digital_port_connected +ffffffff819a5c10 t g4x_digital_port_connected +ffffffff819a5ca0 t ilk_digital_port_connected +ffffffff819a5d10 t ibx_digital_port_connected +ffffffff819a5d80 t intel_dp_encoder_reset +ffffffff819a5e80 t intel_dp_encoder_destroy +ffffffff819a5ee0 t intel_dp_prepare +ffffffff819a61b0 t intel_enable_dp +ffffffff819a6420 t intel_dp_link_down +ffffffff819a7000 T g4x_hdmi_init +ffffffff819a72d0 t intel_hdmi_hotplug +ffffffff819a7320 t pch_disable_hdmi +ffffffff819a7340 t pch_post_disable_hdmi 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intel_backlight_enable +ffffffff819b8970 T intel_backlight_device_register +ffffffff819b8bf0 T intel_backlight_device_unregister +ffffffff819b8c40 T intel_backlight_update +ffffffff819b8de0 T intel_backlight_setup +ffffffff819b8f80 T intel_backlight_destroy +ffffffff819b8fb0 T intel_backlight_init_funcs +ffffffff819b9100 t intel_backlight_device_update_status +ffffffff819b9320 t intel_backlight_device_get_brightness +ffffffff819b94a0 t bxt_setup_backlight +ffffffff819b96c0 t bxt_get_backlight +ffffffff819b9700 t bxt_set_backlight +ffffffff819b9740 t bxt_disable_backlight +ffffffff819b9870 t bxt_enable_backlight +ffffffff819b9ad0 t bxt_hz_to_pwm +ffffffff819b9b00 t cnp_setup_backlight +ffffffff819b9cd0 t cnp_disable_backlight +ffffffff819b9d90 t cnp_enable_backlight +ffffffff819b9f40 t cnp_hz_to_pwm +ffffffff819b9f80 t lpt_setup_backlight +ffffffff819ba2c0 t lpt_get_backlight +ffffffff819ba310 t lpt_set_backlight +ffffffff819ba380 t lpt_disable_backlight +ffffffff819ba480 t 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intel_bios_encoder_data_lookup +ffffffff819c1ac0 T intel_bios_is_port_dp_dual_mode +ffffffff819c1b30 T intel_bios_is_dsi_present +ffffffff819c1c10 T intel_bios_get_dsc_params +ffffffff819c1e10 T intel_bios_is_port_hpd_inverted +ffffffff819c1ed0 T intel_bios_is_lspcon_present +ffffffff819c1f20 T intel_bios_is_lane_reversal_needed +ffffffff819c1f60 T intel_bios_port_aux_ch +ffffffff819c21b0 T intel_bios_max_tmds_clock +ffffffff819c2250 T intel_bios_hdmi_level_shift +ffffffff819c22b0 T intel_bios_encoder_dp_boost_level +ffffffff819c2340 T intel_bios_encoder_hdmi_boost_level +ffffffff819c23d0 T intel_bios_dp_max_link_rate +ffffffff819c2460 T intel_bios_dp_max_lane_count +ffffffff819c24c0 T intel_bios_alternate_ddc_pin +ffffffff819c2630 T intel_bios_encoder_supports_typec_usb +ffffffff819c2680 T intel_bios_encoder_supports_tbt +ffffffff819c26c0 t opregion_get_panel_type +ffffffff819c26d0 t vbt_get_panel_type +ffffffff819c27e0 t pnpid_get_panel_type +ffffffff819c29c0 t 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intel_ddi_update_pipe +ffffffff819ddaf0 T intel_ddi_compute_min_voltage_level +ffffffff819ddb60 T intel_ddi_get_clock +ffffffff819ddc70 T hsw_ddi_get_config +ffffffff819ddd50 t intel_ddi_get_config +ffffffff819de5c0 T intel_ddi_init +ffffffff819df160 t intel_ddi_hotplug +ffffffff819df590 t intel_ddi_compute_output_type +ffffffff819df610 t intel_ddi_compute_config +ffffffff819df750 t intel_ddi_compute_config_late +ffffffff819dfa00 t intel_enable_ddi +ffffffff819e01e0 t intel_ddi_pre_pll_enable +ffffffff819e0350 t intel_ddi_pre_enable +ffffffff819e1020 t intel_disable_ddi +ffffffff819e11a0 t intel_ddi_post_disable +ffffffff819e16c0 t intel_ddi_sync_state +ffffffff819e1770 t intel_ddi_initial_fastset_check +ffffffff819e1830 t intel_ddi_encoder_suspend +ffffffff819e18e0 t intel_ddi_encoder_shutdown +ffffffff819e1990 t intel_ddi_get_power_domains +ffffffff819e1b40 t dg2_ddi_get_config +ffffffff819e1b90 t adls_ddi_enable_clock +ffffffff819e1d10 t adls_ddi_disable_clock +ffffffff819e1dd0 t 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intel_update_watermarks +ffffffff819e9040 T vlv_get_hpll_vco +ffffffff819e9090 T vlv_get_cck_clock +ffffffff819e9140 T vlv_get_cck_clock_hpll +ffffffff819e9240 T is_trans_port_sync_mode +ffffffff819e9280 T intel_crtc_bigjoiner_slave_pipes +ffffffff819e92e0 T intel_crtc_is_bigjoiner_slave +ffffffff819e9340 T intel_crtc_is_bigjoiner_master +ffffffff819e93a0 T intel_master_crtc +ffffffff819e9430 T assert_transcoder +ffffffff819e95e0 T vlv_wait_port_ready +ffffffff819e9730 T intel_enable_transcoder +ffffffff819e9a20 T intel_disable_transcoder +ffffffff819e9d20 T intel_rotation_info_size +ffffffff819e9d60 T intel_remapped_info_size +ffffffff819e9e80 T intel_plane_uses_fence +ffffffff819e9ed0 T intel_fb_xy_to_linear +ffffffff819e9f20 T intel_add_fb_offsets +ffffffff819e9f60 T intel_plane_fb_max_stride +ffffffff819e9fe0 T intel_set_plane_visible +ffffffff819ea030 T intel_plane_fixup_bitmasks +ffffffff819ea0d0 T intel_plane_disable_noatomic +ffffffff819ea2c0 T intel_plane_fence_y_offset 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intel_display_power_well_is_enabled +ffffffff81a044f0 T intel_power_well_is_always_on +ffffffff81a04520 T intel_power_well_domains +ffffffff81a04550 T intel_power_well_refcount +ffffffff81a04580 T gen9_sanitize_dc_state +ffffffff81a04650 T gen9_set_dc_state +ffffffff81a049a0 T gen9_enable_dc5 +ffffffff81a04c00 T skl_enable_dc6 +ffffffff81a04d50 T bxt_enable_dc9 +ffffffff81a04ef0 T bxt_disable_dc9 +ffffffff81a04fd0 T gen9_disable_dc_states +ffffffff81a053a0 T chv_phy_powergate_ch +ffffffff81a054b0 t assert_chv_phy_status +ffffffff81a05850 T chv_phy_powergate_lanes +ffffffff81a05b00 t i9xx_power_well_sync_hw_noop +ffffffff81a05b30 t i9xx_always_on_power_well_noop +ffffffff81a05b60 t i9xx_always_on_power_well_enabled +ffffffff81a05b90 t chv_pipe_power_well_sync_hw +ffffffff81a05bc0 t chv_pipe_power_well_enable +ffffffff81a05bf0 t chv_pipe_power_well_disable +ffffffff81a05c50 t chv_pipe_power_well_enabled +ffffffff81a05d50 t chv_dpio_cmn_power_well_enable +ffffffff81a05f60 t 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intel_dp_max_link_rate +ffffffff81a0c750 T intel_dp_rate_select +ffffffff81a0c7f0 T intel_dp_compute_rate +ffffffff81a0c8c0 T intel_dp_adjust_compliance_config +ffffffff81a0ca00 T intel_dp_limited_color_range +ffffffff81a0ca70 T intel_dp_compute_psr_vsc_sdp +ffffffff81a0cae0 T intel_dp_needs_vsc_sdp +ffffffff81a0cb30 t intel_dp_compute_vsc_colorimetry +ffffffff81a0ccb0 T intel_dp_compute_config +ffffffff81a0d340 t intel_dp_compute_output_format +ffffffff81a0d570 T intel_dp_set_link_params +ffffffff81a0d5b0 T intel_edp_backlight_on +ffffffff81a0d660 T intel_edp_backlight_off +ffffffff81a0d710 T intel_dp_sink_set_decompression_state +ffffffff81a0d7b0 T intel_dp_wait_source_oui +ffffffff81a0d880 T intel_dp_set_power +ffffffff81a0da90 T intel_dp_sync_state +ffffffff81a0db10 t intel_dp_get_dpcd +ffffffff81a0dc70 t intel_dp_reset_max_link_params +ffffffff81a0dd80 T intel_dp_initial_fastset_check +ffffffff81a0de80 T intel_dp_check_frl_training +ffffffff81a0e410 T intel_dp_pcon_dsc_configure +ffffffff81a0e5e0 T intel_dp_configure_protocol_converter +ffffffff81a0e750 T intel_dp_get_colorimetry_status +ffffffff81a0e7b0 T intel_edp_fixup_vbt_bpp +ffffffff81a0e850 T intel_write_dp_vsc_sdp +ffffffff81a0e9e0 T intel_dp_set_infoframes +ffffffff81a0eb00 t intel_write_dp_sdp +ffffffff81a0edf0 T intel_read_dp_sdp +ffffffff81a0f120 T intel_dp_retrain_link +ffffffff81a0f7d0 T intel_dp_phy_test +ffffffff81a0feb0 T intel_digital_port_connected +ffffffff81a0ff50 T intel_dp_encoder_flush_work +ffffffff81a0ffa0 T intel_dp_encoder_suspend +ffffffff81a0ffe0 T intel_dp_encoder_shutdown +ffffffff81a10020 T intel_dp_hpd_pulse +ffffffff81a10770 T intel_dp_is_port_edp +ffffffff81a107c0 T intel_dp_init_connector +ffffffff81a11910 t intel_dp_modeset_retry_work_fn +ffffffff81a11990 t intel_dp_set_common_rates +ffffffff81a11b30 T intel_dp_mst_suspend +ffffffff81a11bd0 T intel_dp_mst_resume +ffffffff81a11c80 t intel_dp_compute_link_config +ffffffff81a129a0 t intel_dp_dsc_get_slice_count +ffffffff81a12b10 t intel_dp_set_sink_rates +ffffffff81a12d40 t intel_dp_check_device_service_irq +ffffffff81a13310 t intel_dp_force +ffffffff81a13450 t intel_dp_connector_register +ffffffff81a13530 t intel_dp_connector_unregister +ffffffff81a13580 t intel_dp_oob_hotplug_event +ffffffff81a135f0 t intel_dp_set_edid +ffffffff81a13a20 t intel_dp_get_modes +ffffffff81a13b20 t intel_dp_detect +ffffffff81a14410 t intel_dp_mode_valid +ffffffff81a14ba0 t intel_dp_connector_atomic_check +ffffffff81a14ed0 t intel_dp_get_dsc_sink_cap +ffffffff81a16000 T intel_dp_aux_fini +ffffffff81a16020 T intel_dp_aux_init +ffffffff81a161f0 t xelpdp_aux_ctl_reg +ffffffff81a162b0 t xelpdp_aux_data_reg +ffffffff81a16380 t tgl_aux_ctl_reg +ffffffff81a16400 t tgl_aux_data_reg +ffffffff81a16490 t skl_aux_ctl_reg +ffffffff81a16510 t skl_aux_data_reg +ffffffff81a165a0 t ilk_aux_ctl_reg +ffffffff81a16620 t ilk_aux_data_reg +ffffffff81a166a0 t g4x_aux_ctl_reg +ffffffff81a16720 t g4x_aux_data_reg +ffffffff81a167b0 t skl_get_aux_clock_divider +ffffffff81a167e0 t hsw_get_aux_clock_divider +ffffffff81a16880 t ilk_get_aux_clock_divider +ffffffff81a168e0 t g4x_get_aux_clock_divider +ffffffff81a16930 t skl_get_aux_send_ctl +ffffffff81a169a0 t g4x_get_aux_send_ctl +ffffffff81a169f0 t kasprintf +ffffffff81a16ac0 t intel_dp_aux_transfer +ffffffff81a16d10 t intel_dp_aux_xfer +ffffffff81a18000 T intel_dp_aux_init_backlight_funcs +ffffffff81a18270 t intel_dp_aux_hdr_setup_backlight +ffffffff81a183c0 t intel_dp_aux_hdr_get_backlight +ffffffff81a18530 t intel_dp_aux_hdr_set_backlight +ffffffff81a18620 t intel_dp_aux_hdr_disable_backlight +ffffffff81a186a0 t intel_dp_aux_hdr_enable_backlight +ffffffff81a188e0 t intel_dp_aux_vesa_setup_backlight +ffffffff81a18aa0 t intel_dp_aux_vesa_get_backlight +ffffffff81a18ad0 t intel_dp_aux_vesa_set_backlight +ffffffff81a18b70 t intel_dp_aux_vesa_disable_backlight +ffffffff81a18c20 t intel_dp_aux_vesa_enable_backlight +ffffffff81a19000 T intel_dp_hdcp_init +ffffffff81a190b0 t intel_dp_hdcp_write_an_aksv +ffffffff81a191a0 t intel_dp_hdcp_read_bksv +ffffffff81a19230 t intel_dp_hdcp_read_bstatus +ffffffff81a192c0 t intel_dp_hdcp_repeater_present +ffffffff81a19360 t intel_dp_hdcp_read_ri_prime +ffffffff81a193f0 t intel_dp_hdcp_read_ksv_ready +ffffffff81a19490 t intel_dp_hdcp_read_ksv_fifo +ffffffff81a19580 t intel_dp_hdcp_read_v_prime_part +ffffffff81a19620 t intel_dp_hdcp_toggle_signalling +ffffffff81a19650 t intel_dp_mst_hdcp_stream_encryption +ffffffff81a19850 t intel_dp_hdcp_check_link +ffffffff81a198d0 t intel_dp_hdcp_capable +ffffffff81a19970 t intel_dp_hdcp2_capable +ffffffff81a199f0 t intel_dp_hdcp2_write_msg +ffffffff81a19ab0 t intel_dp_hdcp2_read_msg +ffffffff81a1a180 t intel_dp_hdcp2_config_stream_type +ffffffff81a1a230 t intel_dp_mst_hdcp2_stream_encryption +ffffffff81a1a4b0 t intel_dp_mst_hdcp2_check_link +ffffffff81a1a570 t get_hdcp2_dp_msg_data +ffffffff81a1a6b0 t intel_dp_hdcp2_check_link +ffffffff81a1b000 T intel_dp_init_lttpr_and_dprx_caps +ffffffff81a1b2a0 T intel_dp_get_adjust_train +ffffffff81a1b960 T intel_dp_program_link_training_pattern +ffffffff81a1ba50 T intel_dp_set_signal_levels +ffffffff81a1bdb0 T intel_dp_dump_link_status +ffffffff81a1be80 T intel_dp_stop_link_train +ffffffff81a1c0b0 T intel_dp_start_link_train +ffffffff81a1d1f0 t intel_dp_link_train_phy +ffffffff81a1f000 T intel_dp_mst_encoder_active_links +ffffffff81a1f030 T intel_dp_mst_encoder_init +ffffffff81a1f270 T intel_dp_mst_source_support +ffffffff81a1f2a0 T intel_dp_mst_encoder_cleanup +ffffffff81a1f2f0 T intel_dp_mst_is_master_trans +ffffffff81a1f330 T intel_dp_mst_is_slave_trans +ffffffff81a1f370 t intel_dp_add_mst_connector +ffffffff81a1f580 t intel_dp_mst_poll_hpd_irq +ffffffff81a1f5a0 t intel_dp_mst_get_hw_state +ffffffff81a1f600 t intel_dp_mst_connector_late_register +ffffffff81a1f670 t intel_dp_mst_connector_early_unregister +ffffffff81a1f6a0 t intel_dp_mst_get_modes +ffffffff81a1f740 t intel_dp_mst_detect +ffffffff81a1f830 t intel_dp_mst_mode_valid_ctx +ffffffff81a1f980 t intel_mst_atomic_best_encoder +ffffffff81a1f9d0 t intel_dp_mst_atomic_check +ffffffff81a1fb50 t intel_dp_mst_compute_config +ffffffff81a1fe60 t intel_dp_mst_compute_config_late +ffffffff81a1ff50 t intel_mst_disable_dp +ffffffff81a20000 t intel_mst_post_disable_dp +ffffffff81a202c0 t intel_mst_pre_pll_enable_dp +ffffffff81a20310 t intel_mst_pre_enable_dp +ffffffff81a20530 t intel_mst_enable_dp +ffffffff81a20920 t intel_dp_mst_enc_get_hw_state +ffffffff81a20960 t intel_dp_mst_enc_get_config +ffffffff81a20980 t intel_dp_mst_initial_fastset_check +ffffffff81a209a0 t intel_dp_mst_encoder_destroy +ffffffff81a21000 T bxt_port_to_phy_channel +ffffffff81a21130 T bxt_ddi_phy_set_signal_levels +ffffffff81a21650 T bxt_ddi_phy_is_enabled +ffffffff81a217a0 T bxt_ddi_phy_uninit +ffffffff81a21890 T bxt_ddi_phy_init +ffffffff81a21ac0 t _bxt_ddi_phy_init +ffffffff81a220e0 T bxt_ddi_phy_verify_state +ffffffff81a22420 t __phy_reg_verify_state +ffffffff81a22520 T bxt_ddi_phy_calc_lane_lat_optim_mask +ffffffff81a22590 T bxt_ddi_phy_set_lane_optim_mask +ffffffff81a228b0 T bxt_ddi_phy_get_lane_lat_optim_mask +ffffffff81a22b00 T chv_set_phy_signal_level +ffffffff81a22e60 T chv_data_lane_soft_reset +ffffffff81a23040 T chv_phy_pre_pll_enable +ffffffff81a232d0 T chv_phy_pre_encoder_enable +ffffffff81a23560 T chv_phy_release_cl2_override +ffffffff81a235f0 T chv_phy_post_pll_disable +ffffffff81a236a0 T vlv_set_phy_signal_level +ffffffff81a23820 T vlv_phy_pre_pll_enable +ffffffff81a23930 T vlv_phy_pre_encoder_enable +ffffffff81a23a40 T vlv_phy_reset_lanes +ffffffff81a24000 T pnv_calc_dpll_params +ffffffff81a240b0 T i9xx_calc_dpll_params +ffffffff81a24180 T vlv_calc_dpll_params +ffffffff81a24230 T chv_calc_dpll_params +ffffffff81a24300 T bxt_find_best_dpll +ffffffff81a24320 t chv_find_best_dpll +ffffffff81a24660 T i9xx_dpll_compute_fp +ffffffff81a246a0 T vlv_compute_dpll +ffffffff81a24720 T chv_compute_dpll +ffffffff81a247a0 T intel_dpll_crtc_compute_clock +ffffffff81a24890 T intel_dpll_crtc_get_shared_dpll +ffffffff81a249e0 T intel_dpll_init_clock_hook +ffffffff81a24ad0 T i9xx_enable_pll +ffffffff81a24e80 T vlv_enable_pll +ffffffff81a253e0 T chv_enable_pll +ffffffff81a25a50 T vlv_force_pll_on +ffffffff81a25ba0 T vlv_disable_pll +ffffffff81a25c60 T chv_disable_pll +ffffffff81a25d90 T i9xx_disable_pll +ffffffff81a25e90 T vlv_force_pll_off +ffffffff81a25f80 T assert_pll_enabled +ffffffff81a26060 T assert_pll_disabled +ffffffff81a26140 t intel_pll_is_valid +ffffffff81a26210 t dg2_crtc_compute_clock +ffffffff81a26290 t hsw_crtc_compute_clock +ffffffff81a26350 t hsw_crtc_get_shared_dpll +ffffffff81a263f0 t ilk_crtc_compute_clock +ffffffff81a266e0 t ilk_crtc_get_shared_dpll +ffffffff81a26730 t g4x_find_best_dpll +ffffffff81a26a70 t chv_crtc_compute_clock +ffffffff81a26b70 t vlv_crtc_compute_clock +ffffffff81a27020 t g4x_crtc_compute_clock +ffffffff81a27170 t i9xx_compute_dpll +ffffffff81a273f0 t pnv_crtc_compute_clock +ffffffff81a277a0 t i9xx_crtc_compute_clock +ffffffff81a278c0 t i9xx_find_best_dpll +ffffffff81a27bf0 t i8xx_crtc_compute_clock +ffffffff81a28000 T intel_get_shared_dpll_by_id +ffffffff81a28040 T intel_get_shared_dpll_id +ffffffff81a280d0 T assert_shared_dpll +ffffffff81a281f0 T intel_dpll_get_hw_state +ffffffff81a28210 T icl_tc_port_to_pll_id +ffffffff81a28240 T intel_enable_shared_dpll +ffffffff81a28530 T intel_disable_shared_dpll +ffffffff81a28760 T intel_shared_dpll_swap_state +ffffffff81a28840 T icl_set_active_port_dpll +ffffffff81a28880 T intel_shared_dpll_init +ffffffff81a28a90 T intel_compute_shared_dplls +ffffffff81a28b20 T intel_reserve_shared_dplls +ffffffff81a28bb0 T intel_release_shared_dplls +ffffffff81a28bf0 T intel_update_active_dpll +ffffffff81a28c50 T intel_dpll_get_freq +ffffffff81a28ce0 T intel_dpll_update_ref_clks +ffffffff81a28d20 T intel_dpll_readout_hw_state +ffffffff81a28ea0 T intel_dpll_sanitize_state +ffffffff81a28f80 T intel_dpll_dump_hw_state +ffffffff81a29000 T intel_shared_dpll_state_verify +ffffffff81a29120 t verify_single_dpll_state +ffffffff81a29440 T intel_shared_dpll_verify_disabled +ffffffff81a294b0 t icl_compute_dplls +ffffffff81a2a290 t icl_get_dplls +ffffffff81a2aa00 t icl_put_dplls +ffffffff81a2aac0 t icl_update_active_dpll +ffffffff81a2ab60 t icl_update_dpll_ref_clks +ffffffff81a2ab90 t icl_dump_hw_state +ffffffff81a2ac50 t combo_pll_enable +ffffffff81a2ae70 t combo_pll_disable +ffffffff81a2af60 t combo_pll_get_hw_state +ffffffff81a2aff0 t icl_ddi_combo_pll_get_freq +ffffffff81a2b1c0 t icl_dpll_write +ffffffff81a2b460 t adlp_cmtg_clock_gating_wa +ffffffff81a2b5c0 t icl_pll_disable +ffffffff81a2b760 t icl_pll_get_hw_state +ffffffff81a2baa0 t tbt_pll_enable +ffffffff81a2bc50 t tbt_pll_disable +ffffffff81a2bc70 t tbt_pll_get_hw_state +ffffffff81a2bc90 t icl_ddi_tbt_pll_get_freq +ffffffff81a2bd00 t mg_pll_enable +ffffffff81a2c2b0 t mg_pll_disable +ffffffff81a2c2f0 t dkl_pll_get_hw_state +ffffffff81a2c4c0 t icl_ddi_mg_pll_get_freq +ffffffff81a2c590 t intel_find_shared_dpll +ffffffff81a2c8c0 t intel_unreference_shared_dpll +ffffffff81a2ca20 t mg_pll_get_hw_state +ffffffff81a2cc60 t bxt_compute_dpll +ffffffff81a2cf80 t bxt_get_dpll +ffffffff81a2d1e0 t intel_put_dpll +ffffffff81a2d240 t bxt_update_dpll_ref_clks +ffffffff81a2d280 t bxt_dump_hw_state +ffffffff81a2d330 t bxt_ddi_pll_enable +ffffffff81a2de30 t bxt_ddi_pll_disable +ffffffff81a2e040 t bxt_ddi_pll_get_hw_state +ffffffff81a2e4d0 t bxt_ddi_pll_get_freq +ffffffff81a2e560 t bxt_ddi_set_dpll_hw_state +ffffffff81a2e720 t skl_compute_dpll +ffffffff81a2eea0 t skl_get_dpll +ffffffff81a2f0d0 t skl_update_dpll_ref_clks +ffffffff81a2f100 t skl_dump_hw_state +ffffffff81a2f160 t skl_ddi_dpll0_enable +ffffffff81a2f220 t skl_ddi_dpll0_disable +ffffffff81a2f250 t skl_ddi_dpll0_get_hw_state +ffffffff81a2f350 t skl_ddi_pll_get_freq +ffffffff81a2f3e0 t skl_ddi_wrpll_get_freq +ffffffff81a2f540 t skl_ddi_pll_enable +ffffffff81a2f750 t skl_ddi_pll_disable +ffffffff81a2f7e0 t skl_ddi_pll_get_hw_state +ffffffff81a2f900 t hsw_compute_dpll +ffffffff81a30150 t hsw_get_dpll +ffffffff81a30410 t hsw_update_dpll_ref_clks +ffffffff81a30480 t hsw_dump_hw_state +ffffffff81a304b0 t hsw_ddi_wrpll_enable +ffffffff81a30530 t hsw_ddi_wrpll_disable +ffffffff81a30610 t hsw_ddi_wrpll_get_hw_state +ffffffff81a306b0 t hsw_ddi_wrpll_get_freq +ffffffff81a307a0 t hsw_ddi_spll_enable +ffffffff81a30800 t hsw_ddi_spll_disable +ffffffff81a308d0 t hsw_ddi_spll_get_hw_state +ffffffff81a30950 t hsw_ddi_spll_get_freq +ffffffff81a309e0 t hsw_ddi_lcpll_enable +ffffffff81a30a10 t hsw_ddi_lcpll_disable +ffffffff81a30a40 t hsw_ddi_lcpll_get_hw_state +ffffffff81a30a70 t hsw_ddi_lcpll_get_freq +ffffffff81a30af0 t ibx_compute_dpll +ffffffff81a30b20 t ibx_get_dpll +ffffffff81a30da0 t ibx_dump_hw_state +ffffffff81a30e00 t ibx_pch_dpll_enable +ffffffff81a30fb0 t ibx_pch_dpll_disable +ffffffff81a31030 t ibx_pch_dpll_get_hw_state +ffffffff81a32000 T intel_dpt_pin +ffffffff81a321d0 T intel_dpt_unpin +ffffffff81a32240 T intel_dpt_resume +ffffffff81a32310 T intel_dpt_suspend +ffffffff81a323e0 T intel_dpt_create +ffffffff81a32710 t dpt_insert_page +ffffffff81a32780 t dpt_clear_range +ffffffff81a327b0 t dpt_insert_entries +ffffffff81a328b0 t dpt_cleanup +ffffffff81a32900 t dpt_bind_vma +ffffffff81a32990 t dpt_unbind_vma +ffffffff81a329c0 T intel_dpt_destroy +ffffffff81a32a00 t __ww_mutex_lock +ffffffff81a33000 T intel_drrs_type_str +ffffffff81a33040 T intel_drrs_is_active +ffffffff81a33070 T intel_drrs_activate +ffffffff81a33270 T intel_drrs_deactivate +ffffffff81a33350 t intel_drrs_set_state +ffffffff81a334a0 T intel_drrs_invalidate +ffffffff81a334b0 t intel_drrs_frontbuffer_update +ffffffff81a33610 T intel_drrs_flush +ffffffff81a33620 T intel_crtc_drrs_init +ffffffff81a336c0 t intel_drrs_downclock_work +ffffffff81a33710 t __delayed_work_tick +ffffffff81a34000 T intel_dsb_indexed_reg_write +ffffffff81a34130 T intel_dsb_reg_write +ffffffff81a34210 T intel_dsb_commit +ffffffff81a34650 T intel_dsb_prepare +ffffffff81a347e0 T intel_dsb_cleanup +ffffffff81a35000 T intel_dsi_bitrate +ffffffff81a35090 T intel_dsi_tlpx_ns +ffffffff81a350e0 T intel_dsi_get_modes +ffffffff81a350f0 T intel_dsi_mode_valid +ffffffff81a351b0 T intel_dsi_host_init +ffffffff81a35260 T intel_dsi_get_panel_orientation +ffffffff81a36000 T intel_dsi_dcs_init_backlight_funcs +ffffffff81a36090 t dcs_setup_backlight +ffffffff81a360e0 t dcs_get_backlight +ffffffff81a361d0 t dcs_set_backlight +ffffffff81a362b0 t dcs_disable_backlight +ffffffff81a36620 t dcs_enable_backlight +ffffffff81a37000 T intel_dsi_vbt_exec_sequence +ffffffff81a37020 T intel_dsi_msleep +ffffffff81a37090 T intel_dsi_log_params +ffffffff81a37410 T intel_dsi_vbt_init +ffffffff81a378a0 T intel_dsi_vbt_gpio_init +ffffffff81a378c0 T intel_dsi_vbt_gpio_cleanup +ffffffff81a38000 T intel_dvo_init +ffffffff81a384f0 t intel_disable_dvo +ffffffff81a385a0 t intel_enable_dvo +ffffffff81a38680 t intel_dvo_get_hw_state +ffffffff81a386e0 t intel_dvo_get_config +ffffffff81a38780 t intel_dvo_compute_config +ffffffff81a38800 t intel_dvo_pre_enable +ffffffff81a388f0 t intel_dvo_connector_get_hw_state +ffffffff81a38970 t intel_dvo_enc_destroy +ffffffff81a389b0 t intel_dvo_detect +ffffffff81a38ab0 t intel_dvo_get_modes +ffffffff81a38b10 t intel_dvo_mode_valid +ffffffff81a39000 T intel_fb_get_format_info +ffffffff81a39230 T intel_fb_is_ccs_modifier +ffffffff81a39400 T intel_fb_is_rc_ccs_cc_modifier +ffffffff81a395d0 T intel_fb_is_mc_ccs_modifier +ffffffff81a397a0 T intel_fb_plane_get_modifiers +ffffffff81a398e0 T intel_fb_plane_supports_modifier +ffffffff81a39940 T intel_format_info_is_yuv_semiplanar +ffffffff81a39be0 T intel_fb_is_ccs_aux_plane +ffffffff81a39e20 T intel_fb_rc_ccs_cc_plane +ffffffff81a3a080 T is_surface_linear +ffffffff81a3a3b0 T main_to_ccs_plane +ffffffff81a3a690 T skl_ccs_to_main_plane +ffffffff81a3a970 T skl_main_to_aux_plane +ffffffff81a3abd0 T intel_tile_size +ffffffff81a3ac10 T intel_tile_width_bytes +ffffffff81a3ae60 T intel_tile_height +ffffffff81a3aec0 T intel_tile_row_size +ffffffff81a3af40 T intel_fb_align_height +ffffffff81a3afb0 T intel_fb_uses_dpt +ffffffff81a3b000 T intel_cursor_alignment +ffffffff81a3b060 T intel_surf_alignment +ffffffff81a3b270 T intel_fb_plane_get_subsampling +ffffffff81a3b640 T intel_plane_adjust_aligned_offset +ffffffff81a3b6b0 t intel_adjust_aligned_offset +ffffffff81a3b860 T intel_plane_compute_aligned_offset +ffffffff81a3b960 t intel_compute_aligned_offset +ffffffff81a3bb20 T intel_fb_needs_pot_stride_remap +ffffffff81a3bb60 T intel_fb_supports_90_270_rotation +ffffffff81a3bbb0 T intel_fill_fb_info +ffffffff81a3c7f0 t calc_plane_remap_info +ffffffff81a3d250 T intel_fb_fill_view +ffffffff81a3d2a0 T intel_plane_compute_gtt +ffffffff81a3db70 t intel_plane_check_stride +ffffffff81a3dee0 T intel_framebuffer_init +ffffffff81a3f2f0 T intel_user_framebuffer_create +ffffffff81a3f430 T intel_framebuffer_create +ffffffff81a3f4c0 t intel_adjust_tile_offset +ffffffff81a3f600 t intel_user_framebuffer_destroy +ffffffff81a3f660 t intel_user_framebuffer_create_handle +ffffffff81a3f680 t intel_user_framebuffer_dirty +ffffffff81a40000 T intel_pin_and_fence_fb_obj +ffffffff81a40310 t i915_gem_object_lock +ffffffff81a40520 T intel_unpin_fb_vma +ffffffff81a40590 T intel_plane_pin_fb +ffffffff81a408c0 T intel_plane_unpin_fb +ffffffff81a41000 T intel_fbc_cleanup +ffffffff81a411c0 T intel_fbc_pre_update +ffffffff81a41810 T intel_fbc_post_update +ffffffff81a41a60 T intel_fbc_invalidate +ffffffff81a41c80 T intel_fbc_flush +ffffffff81a41f00 T intel_fbc_atomic_check +ffffffff81a42470 T intel_fbc_disable +ffffffff81a42530 t __intel_fbc_disable +ffffffff81a426c0 T intel_fbc_update +ffffffff81a42d80 T intel_fbc_reset_underrun +ffffffff81a42ee0 T intel_fbc_handle_fifo_underrun_irq +ffffffff81a42f90 T intel_fbc_add_plane +ffffffff81a42fc0 T intel_fbc_init +ffffffff81a43240 T intel_fbc_sanitize +ffffffff81a43310 T intel_fbc_crtc_debugfs_add +ffffffff81a43340 T intel_fbc_debugfs_register +ffffffff81a43370 t intel_fbc_is_ok +ffffffff81a43490 t intel_fbc_update_state +ffffffff81a43800 t intel_fbc_underrun_work_fn +ffffffff81a43920 t ivb_fbc_activate +ffffffff81a43b80 t ilk_fbc_deactivate +ffffffff81a43c30 t ilk_fbc_is_active +ffffffff81a43c90 t ivb_fbc_is_compressing +ffffffff81a43cf0 t snb_fbc_nuke +ffffffff81a43d60 t ilk_fbc_program_cfb +ffffffff81a43da0 t ivb_fbc_set_false_color +ffffffff81a43e60 t snb_fbc_activate +ffffffff81a43ee0 t ilk_fbc_is_compressing +ffffffff81a43f40 t ilk_fbc_activate +ffffffff81a44070 t i965_fbc_nuke +ffffffff81a44110 t g4x_fbc_activate +ffffffff81a44220 t g4x_fbc_deactivate +ffffffff81a442b0 t g4x_fbc_is_active +ffffffff81a44300 t g4x_fbc_is_compressing +ffffffff81a44360 t g4x_fbc_program_cfb +ffffffff81a44390 t i8xx_fbc_activate +ffffffff81a44500 t i8xx_fbc_deactivate +ffffffff81a445d0 t i8xx_fbc_is_active +ffffffff81a44620 t i8xx_fbc_is_compressing +ffffffff81a44680 t i8xx_fbc_program_cfb +ffffffff81a44700 t i8xx_fbc_nuke +ffffffff81a45000 T intel_fbdev_init +ffffffff81a454d0 t intel_fbdev_suspend_worker +ffffffff81a45500 T intel_fbdev_initial_config_async +ffffffff81a45570 T intel_fbdev_unregister +ffffffff81a455b0 T intel_fbdev_set_suspend +ffffffff81a455e0 T intel_fbdev_fini +ffffffff81a45670 T intel_fbdev_output_poll_changed +ffffffff81a45710 T intel_fbdev_restore_mode +ffffffff81a45790 T intel_fbdev_framebuffer +ffffffff81a457c0 t intelfb_create +ffffffff81a45dc0 t intel_fbdev_set_par +ffffffff81a46000 T assert_fdi_tx_enabled +ffffffff81a460e0 T assert_fdi_tx_disabled +ffffffff81a461c0 T assert_fdi_rx_enabled +ffffffff81a46270 T assert_fdi_rx_disabled +ffffffff81a46320 T assert_fdi_tx_pll_enabled +ffffffff81a463d0 T assert_fdi_rx_pll_enabled +ffffffff81a46490 T assert_fdi_rx_pll_disabled +ffffffff81a46550 T intel_fdi_link_train +ffffffff81a46570 T intel_fdi_pll_freq_update +ffffffff81a46620 T intel_fdi_link_freq +ffffffff81a46660 T ilk_fdi_compute_config +ffffffff81a46990 T intel_fdi_normal_train +ffffffff81a46b10 T hsw_fdi_link_train +ffffffff81a47010 T hsw_fdi_disable +ffffffff81a47170 T ilk_fdi_pll_enable +ffffffff81a47380 T ilk_fdi_pll_disable +ffffffff81a474b0 T ilk_fdi_disable +ffffffff81a47720 T intel_fdi_init_hook +ffffffff81a47780 t ilk_fdi_link_train +ffffffff81a47df0 t gen6_fdi_link_train +ffffffff81a48620 t ivb_manual_fdi_link_train +ffffffff81a48eb0 t cpt_set_fdi_bc_bifurcation +ffffffff81a4a000 T intel_set_cpu_fifo_underrun_reporting +ffffffff81a4a3e0 T intel_set_pch_fifo_underrun_reporting +ffffffff81a4a610 T intel_cpu_fifo_underrun_irq_handler +ffffffff81a4a800 T intel_pch_fifo_underrun_irq_handler +ffffffff81a4a880 T intel_check_cpu_fifo_underruns +ffffffff81a4aaa0 T intel_check_pch_fifo_underruns +ffffffff81a4b000 T intel_frontbuffer_flip_prepare +ffffffff81a4b050 T intel_frontbuffer_flip_complete +ffffffff81a4b120 T intel_frontbuffer_flip +ffffffff81a4b1f0 T __intel_fb_invalidate +ffffffff81a4b280 T __intel_fb_flush +ffffffff81a4b370 T intel_frontbuffer_get +ffffffff81a4b4a0 t frontbuffer_active +ffffffff81a4b4d0 t frontbuffer_retire +ffffffff81a4b510 T intel_frontbuffer_put +ffffffff81a4b690 T intel_frontbuffer_track +ffffffff81a4c000 T intel_atomic_global_obj_init +ffffffff81a4c070 T intel_atomic_global_obj_cleanup +ffffffff81a4c170 T intel_atomic_get_global_obj_state +ffffffff81a4c3e0 T intel_atomic_get_old_global_obj_state +ffffffff81a4c440 T intel_atomic_get_new_global_obj_state +ffffffff81a4c4a0 T intel_atomic_swap_global_state +ffffffff81a4c5f0 T intel_atomic_clear_global_state +ffffffff81a4c720 T intel_atomic_lock_global_state +ffffffff81a4c7a0 T intel_atomic_serialize_global_state +ffffffff81a4d000 T intel_gmbus_is_valid_pin +ffffffff81a4d100 T intel_gmbus_reset +ffffffff81a4d160 T intel_bb_set_bits +ffffffff81a4d290 T intel_bb_set_dir +ffffffff81a4d2c0 T intel_bb_read_bits +ffffffff81a4d440 T intel_acquire_bus +ffffffff81a4d630 T intel_release_bus +ffffffff81a4d7d0 T intel_send_start +ffffffff81a4d7f0 T intel_send_stop +ffffffff81a4d810 T intel_initiate_xfer +ffffffff81a4d830 T intel_read_byte +ffffffff81a4d850 T intel_write_byte +ffffffff81a4d870 T intel_gmbus_output_aksv +ffffffff81a4d940 t do_gmbus_xfer +ffffffff81a4df40 T intel_gmbus_setup +ffffffff81a4e2d0 T intel_gmbus_teardown +ffffffff81a4e340 T intel_gmbus_get_adapter +ffffffff81a4e3c0 T intel_gmbus_force_bit +ffffffff81a4e450 T intel_gmbus_is_forced_bit +ffffffff81a4e480 t gmbus_xfer_read +ffffffff81a4e750 t gmbus_xfer_write +ffffffff81a4e9a0 t gmbus_wait +ffffffff81a4ed80 t gmbus_wait_idle +ffffffff81a4ef20 t gmbus_xfer +ffffffff81a4eff0 t gmbus_func +ffffffff81a4f030 t gmbus_lock_bus +ffffffff81a4f050 t gmbus_trylock_bus +ffffffff81a4f0a0 t gmbus_unlock_bus +ffffffff81a50000 T intel_hdcp_capable +ffffffff81a500a0 t intel_hdcp_read_valid_bksv +ffffffff81a50320 T intel_hdcp2_capable +ffffffff81a50400 T is_hdcp_supported +ffffffff81a50450 T intel_hdcp_component_init +ffffffff81a50480 T intel_hdcp_init +ffffffff81a505b0 t intel_hdcp_check_work +ffffffff81a544b0 t intel_hdcp_prop_work +ffffffff81a54530 T intel_hdcp_enable +ffffffff81a54580 T intel_hdcp_disable +ffffffff81a546b0 t intel_hdcp_update_value +ffffffff81a54870 t _intel_hdcp2_disable +ffffffff81a54c70 t _intel_hdcp_disable +ffffffff81a54f70 T intel_hdcp_update_pipe +ffffffff81a550e0 T intel_hdcp_component_fini +ffffffff81a55120 T intel_hdcp_cleanup +ffffffff81a55260 T intel_hdcp_atomic_check +ffffffff81a552f0 T intel_hdcp_handle_cp_irq +ffffffff81a553f0 t __delayed_work_tick +ffffffff81a55410 t hdcp2_authenticate_repeater_topology +ffffffff81a556f0 t intel_hdcp_get_repeater_ctl +ffffffff81a56000 T hsw_write_infoframe +ffffffff81a56410 t hsw_dip_data_reg +ffffffff81a565d0 T hsw_read_infoframe +ffffffff81a56680 T intel_hdmi_infoframe_enable +ffffffff81a56720 T intel_hdmi_infoframes_enabled +ffffffff81a56830 T intel_read_infoframe +ffffffff81a569c0 T intel_hdmi_read_gcp_infoframe +ffffffff81a56ab0 T intel_dp_dual_mode_set_tmds_output +ffffffff81a56b80 T intel_hdmi_tmds_clock +ffffffff81a56bd0 T intel_hdmi_bpc_possible +ffffffff81a56d00 T intel_hdmi_limited_color_range +ffffffff81a56d70 T intel_hdmi_compute_config +ffffffff81a574c0 t intel_hdmi_compute_output_format +ffffffff81a575f0 T intel_hdmi_encoder_shutdown +ffffffff81a576c0 T intel_hdmi_handle_sink_scrambling +ffffffff81a577e0 T intel_infoframe_init +ffffffff81a57960 t vlv_write_infoframe +ffffffff81a57cc0 t vlv_read_infoframe +ffffffff81a57e90 t vlv_set_infoframes +ffffffff81a58230 t vlv_infoframes_enabled +ffffffff81a582d0 t g4x_write_infoframe +ffffffff81a58580 t g4x_read_infoframe +ffffffff81a586d0 t g4x_set_infoframes +ffffffff81a58970 t g4x_infoframes_enabled +ffffffff81a589e0 t hsw_set_infoframes +ffffffff81a58c80 t hsw_infoframes_enabled +ffffffff81a58d10 t ibx_write_infoframe +ffffffff81a59020 t ibx_read_infoframe +ffffffff81a59190 t ibx_set_infoframes +ffffffff81a59500 t ibx_infoframes_enabled +ffffffff81a59580 t cpt_write_infoframe +ffffffff81a59880 t cpt_read_infoframe +ffffffff81a599f0 t cpt_set_infoframes +ffffffff81a59cf0 t cpt_infoframes_enabled +ffffffff81a59d60 T intel_hdmi_init_connector +ffffffff81a5a3f0 T intel_hdmi_dsc_get_slice_height +ffffffff81a5a440 T intel_hdmi_dsc_get_num_slices +ffffffff81a5a5c0 T intel_hdmi_dsc_get_bpp +ffffffff81a5a6b0 t intel_hdmi_compute_clock +ffffffff81a5a970 t hdmi_port_clock_valid +ffffffff81a5aba0 t intel_write_infoframe +ffffffff81a5ad70 t intel_hdmi_detect +ffffffff81a5af20 t intel_hdmi_force +ffffffff81a5b000 t intel_hdmi_connector_register +ffffffff81a5b010 t intel_hdmi_connector_unregister +ffffffff81a5b020 t intel_hdmi_set_edid +ffffffff81a5b2c0 t intel_hdmi_get_modes +ffffffff81a5b300 t intel_hdmi_mode_valid +ffffffff81a5b4a0 t intel_hdmi_mode_clock_valid +ffffffff81a5b630 t intel_hdmi_hdcp_write_an_aksv +ffffffff81a5b780 t intel_hdmi_hdcp_read_bksv +ffffffff81a5b850 t intel_hdmi_hdcp_read_bstatus +ffffffff81a5b920 t intel_hdmi_hdcp_repeater_present +ffffffff81a5ba00 t intel_hdmi_hdcp_read_ri_prime +ffffffff81a5bad0 t intel_hdmi_hdcp_read_ksv_ready +ffffffff81a5bbb0 t intel_hdmi_hdcp_read_ksv_fifo +ffffffff81a5bc80 t intel_hdmi_hdcp_read_v_prime_part +ffffffff81a5bd70 t intel_hdmi_hdcp_toggle_signalling +ffffffff81a5bff0 t intel_hdmi_hdcp_check_link +ffffffff81a5c340 t intel_hdmi_hdcp2_capable +ffffffff81a5c3f0 t intel_hdmi_hdcp2_write_msg +ffffffff81a5c4d0 t intel_hdmi_hdcp2_read_msg +ffffffff81a5c960 t intel_hdmi_hdcp2_check_link +ffffffff81a5d000 T intel_hpd_pin_default +ffffffff81a5d030 T intel_encoder_hotplug +ffffffff81a5d160 T intel_hpd_trigger_irq +ffffffff81a5d1d0 T intel_hpd_irq_handler +ffffffff81a5d5b0 T intel_hpd_init +ffffffff81a5d6c0 T intel_hpd_poll_enable +ffffffff81a5d740 T intel_hpd_poll_disable +ffffffff81a5d790 T intel_hpd_init_work +ffffffff81a5d860 t i915_hotplug_work_func +ffffffff81a5dba0 t i915_digport_work_func +ffffffff81a5dd30 t i915_hpd_poll_init_work +ffffffff81a5de30 t intel_hpd_irq_storm_reenable_work +ffffffff81a5e170 T intel_hpd_cancel_work +ffffffff81a5e290 T intel_hpd_disable +ffffffff81a5e310 T intel_hpd_enable +ffffffff81a5e380 t __delayed_work_tick +ffffffff81a5f000 T intel_lpe_audio_irq_handler +ffffffff81a5f020 T intel_lpe_audio_init +ffffffff81a5f050 T intel_lpe_audio_teardown +ffffffff81a5f070 T intel_lpe_audio_notify +ffffffff81a60000 T lspcon_detect_hdr_capability +ffffffff81a600a0 T lspcon_write_infoframe +ffffffff81a60820 T lspcon_read_infoframe +ffffffff81a60860 T lspcon_set_infoframes +ffffffff81a60ad0 T lspcon_infoframes_enabled +ffffffff81a60cc0 T lspcon_wait_pcon_mode +ffffffff81a60cd0 t lspcon_wait_mode +ffffffff81a60f90 T lspcon_init +ffffffff81a613a0 T intel_lspcon_infoframes_enabled +ffffffff81a613e0 T lspcon_resume +ffffffff81a61690 t lspcon_change_mode +ffffffff81a62000 T intel_lvds_port_enabled +ffffffff81a62080 T intel_get_lvds_encoder +ffffffff81a620e0 T intel_is_dual_link_lvds +ffffffff81a62150 T intel_lvds_init +ffffffff81a628c0 t intel_enable_lvds +ffffffff81a62a00 t intel_pre_enable_lvds +ffffffff81a62cd0 t intel_lvds_compute_config +ffffffff81a62e30 t pch_disable_lvds +ffffffff81a62e50 t pch_post_disable_lvds +ffffffff81a62e70 t gmch_disable_lvds +ffffffff81a62ea0 t intel_lvds_get_hw_state +ffffffff81a62f60 t intel_lvds_get_config +ffffffff81a63060 t intel_lvds_shutdown +ffffffff81a63100 t intel_no_lvds_dmi_callback +ffffffff81a63150 t intel_disable_lvds +ffffffff81a63280 t intel_lvds_get_modes +ffffffff81a632b0 t intel_lvds_mode_valid +ffffffff81a63330 t intel_dual_link_lvds_callback +ffffffff81a64000 T intel_modeset_setup_hw_state +ffffffff81a66000 T intel_modeset_verify_crtc +ffffffff81a663b0 t verify_connector_state +ffffffff81a66660 T intel_modeset_verify_disabled +ffffffff81a67000 T intel_opregion_notify_encoder +ffffffff81a67160 t swsci +ffffffff81a67490 T intel_opregion_notify_adapter +ffffffff81a674e0 T intel_opregion_asle_intr +ffffffff81a67530 T intel_opregion_setup +ffffffff81a67d40 t asle_work +ffffffff81a681c0 T intel_opregion_get_panel_type +ffffffff81a682a0 T intel_opregion_get_edid +ffffffff81a68380 T intel_opregion_headless_sku +ffffffff81a683d0 T intel_opregion_register +ffffffff81a68460 T intel_opregion_resume +ffffffff81a684f0 T intel_opregion_suspend +ffffffff81a68590 T intel_opregion_unregister +ffffffff81a68710 t intel_no_opregion_vbt_callback +ffffffff81a68760 t intel_use_opregion_panel_type_callback +ffffffff81a69000 T intel_overlay_reset +ffffffff81a69050 T intel_overlay_switch_off +ffffffff81a69240 t intel_overlay_release_old_vid +ffffffff81a693e0 T intel_overlay_put_image_ioctl +ffffffff81a6a5a0 T intel_overlay_attrs_ioctl +ffffffff81a6aa40 T intel_overlay_setup +ffffffff81a6ac90 t intel_overlay_last_flip_retire +ffffffff81a6acd0 T intel_overlay_cleanup +ffffffff81a6ad90 T intel_overlay_capture_error_state +ffffffff81a6ae70 T intel_overlay_print_error_state +ffffffff81a6b240 t intel_overlay_release_old_vid_tail +ffffffff81a6b310 t intel_overlay_off_tail +ffffffff81a6b4b0 t intel_overlay_flip_prepare +ffffffff81a6c000 T intel_panel_use_ssc +ffffffff81a6c060 T intel_panel_preferred_fixed_mode +ffffffff81a6c0a0 T intel_panel_fixed_mode +ffffffff81a6c160 T intel_panel_downclock_mode +ffffffff81a6c240 T intel_panel_highest_mode +ffffffff81a6c2a0 T intel_panel_get_modes +ffffffff81a6c330 T intel_panel_drrs_type +ffffffff81a6c380 T intel_panel_compute_config +ffffffff81a6c500 T intel_panel_add_edid_fixed_modes +ffffffff81a6ca30 T intel_panel_add_vbt_lfp_fixed_mode +ffffffff81a6ca90 t intel_panel_add_fixed_mode +ffffffff81a6cc10 T intel_panel_add_vbt_sdvo_fixed_mode +ffffffff81a6cc70 T intel_panel_add_encoder_fixed_mode +ffffffff81a6ccb0 T intel_panel_fitting +ffffffff81a6d300 T intel_panel_detect +ffffffff81a6d390 T intel_panel_mode_valid +ffffffff81a6d4a0 T intel_panel_init +ffffffff81a6d560 T intel_panel_fini +ffffffff81a6e000 T intel_has_pch_trancoder +ffffffff81a6e050 T intel_crtc_pch_transcoder +ffffffff81a6e090 T intel_pch_transcoder_get_m1_n1 +ffffffff81a6e0d0 T intel_pch_transcoder_get_m2_n2 +ffffffff81a6e110 T ilk_pch_pre_enable +ffffffff81a6e130 T ilk_pch_enable +ffffffff81a6e6d0 t ilk_pch_transcoder_set_timings +ffffffff81a6e950 T ilk_pch_disable +ffffffff81a6e960 T ilk_pch_post_disable +ffffffff81a6ec90 T ilk_pch_get_config +ffffffff81a6ee50 T lpt_pch_enable +ffffffff81a6f080 T lpt_pch_disable +ffffffff81a6f190 T lpt_pch_get_config +ffffffff81a6f260 T intel_pch_sanitize +ffffffff81a6f530 t assert_pch_dp_disabled +ffffffff81a6f620 t assert_pch_hdmi_disabled +ffffffff81a70000 T lpt_disable_iclkip +ffffffff81a70070 T lpt_iclkip +ffffffff81a700f0 T lpt_program_iclkip +ffffffff81a70370 T lpt_get_iclkip +ffffffff81a70480 T lpt_disable_clkout_dp +ffffffff81a70550 T intel_init_pch_refclk +ffffffff81a72000 T intel_crtc_initial_plane_config +ffffffff81a73000 T intel_pps_lock +ffffffff81a73060 T intel_pps_unlock +ffffffff81a730b0 T intel_pps_reset_all +ffffffff81a73200 T intel_pps_check_power_unlocked +ffffffff81a733c0 T intel_pps_wait_power_cycle +ffffffff81a73580 T intel_pps_vdd_on_unlocked +ffffffff81a73ab0 T intel_pps_vdd_on +ffffffff81a73ba0 T intel_pps_vdd_off_sync +ffffffff81a73c70 t intel_pps_vdd_off_sync_unlocked +ffffffff81a73f50 T intel_pps_vdd_off_unlocked +ffffffff81a74060 T intel_pps_on_unlocked +ffffffff81a74460 T intel_pps_on +ffffffff81a74500 T intel_pps_off_unlocked +ffffffff81a74750 T intel_pps_off +ffffffff81a747f0 T intel_pps_backlight_on +ffffffff81a74a00 T intel_pps_backlight_off +ffffffff81a74c10 T intel_pps_backlight_power +ffffffff81a74de0 T vlv_pps_init +ffffffff81a74f40 t vlv_detach_power_sequencer +ffffffff81a750c0 t vlv_steal_power_sequencer +ffffffff81a751f0 t pps_init_delays +ffffffff81a75660 t pps_init_registers +ffffffff81a75a00 T intel_pps_have_panel_power_or_vdd +ffffffff81a75b50 T intel_pps_encoder_reset +ffffffff81a75ce0 t vlv_initial_power_sequencer_setup +ffffffff81a75f90 t pps_vdd_init +ffffffff81a760a0 T intel_pps_init +ffffffff81a76210 t edp_panel_vdd_work +ffffffff81a762c0 T intel_pps_init_late +ffffffff81a76430 T intel_pps_unlock_regs_wa +ffffffff81a76520 T intel_pps_setup +ffffffff81a76590 T assert_pps_unlocked +ffffffff81a767d0 t intel_pps_get_registers +ffffffff81a76eb0 t wait_panel_status +ffffffff81a77180 t intel_pps_readout_hw_state +ffffffff81a77340 t __delayed_work_tick +ffffffff81a78000 T intel_psr_irq_handler +ffffffff81a78680 T intel_psr_init_dpcd +ffffffff81a78910 T intel_psr_compute_config +ffffffff81a79100 T intel_psr_get_config +ffffffff81a792b0 T intel_psr_disable +ffffffff81a793c0 t intel_psr_disable_locked +ffffffff81a79830 T intel_psr_pause +ffffffff81a79a20 t intel_psr_exit +ffffffff81a79d00 T intel_psr_resume +ffffffff81a79d90 t intel_psr_activate +ffffffff81a7a4a0 T intel_psr2_disable_plane_sel_fetch +ffffffff81a7a510 T intel_psr2_program_plane_sel_fetch +ffffffff81a7a6c0 T intel_psr2_program_trans_man_trk_ctl +ffffffff81a7a800 T intel_psr2_sel_fetch_update +ffffffff81a7ae90 T intel_psr_pre_plane_update +ffffffff81a7b060 T intel_psr_post_plane_update +ffffffff81a7bae0 T intel_psr_wait_for_idle_locked +ffffffff81a7bcc0 T intel_psr_debug_set +ffffffff81a7bef0 t psr_irq_control +ffffffff81a7c040 T intel_psr_invalidate +ffffffff81a7c2f0 T intel_psr_flush +ffffffff81a7c7c0 T intel_psr_init +ffffffff81a7c8f0 t intel_psr_work +ffffffff81a7ca90 t tgl_dc3co_disable_work +ffffffff81a7cae0 T intel_psr_short_pulse +ffffffff81a7cea0 T intel_psr_enabled +ffffffff81a7cf20 T intel_psr_lock +ffffffff81a7d000 T intel_psr_unlock +ffffffff81a7d0e0 t tgl_psr2_disable_dc3co +ffffffff81a7d210 t __delayed_work_tick +ffffffff81a7e000 T intel_lookup_range_min_qp +ffffffff81a7e0b0 T intel_lookup_range_max_qp +ffffffff81a7f000 T intel_init_quirks +ffffffff81a7f0f0 T intel_has_quirk +ffffffff81a7f120 t quirk_ssc_force_disable +ffffffff81a7f150 t quirk_invert_brightness +ffffffff81a7f180 t quirk_backlight_present +ffffffff81a7f1b0 t quirk_increase_t12_delay +ffffffff81a7f1e0 t quirk_increase_ddi_disabled_time +ffffffff81a7f210 t intel_dmi_reverse_brightness +ffffffff81a7f260 t intel_dmi_no_pps_backlight +ffffffff81a80000 T intel_sdvo_port_enabled +ffffffff81a800a0 T intel_sdvo_init +ffffffff81a80c70 t intel_sdvo_compute_config +ffffffff81a811d0 t pch_disable_sdvo +ffffffff81a81200 t pch_post_disable_sdvo +ffffffff81a81210 t intel_disable_sdvo +ffffffff81a81380 t intel_sdvo_pre_enable +ffffffff81a81d00 t intel_enable_sdvo +ffffffff81a81f00 t intel_sdvo_get_hw_state +ffffffff81a81ff0 t intel_sdvo_get_config +ffffffff81a82560 t intel_sdvo_ddc_proxy_xfer +ffffffff81a82600 t intel_sdvo_ddc_proxy_func +ffffffff81a82630 t __intel_sdvo_write_cmd +ffffffff81a82af0 t proxy_lock_bus +ffffffff81a82b20 t proxy_trylock_bus +ffffffff81a82b50 t proxy_unlock_bus +ffffffff81a82b80 t intel_sdvo_enc_destroy +ffffffff81a82b90 t intel_sdvo_get_preferred_input_mode +ffffffff81a82f20 t intel_sdvo_get_dtd_from_mode +ffffffff81a83090 t intel_sdvo_read_response +ffffffff81a83530 t intel_sdvo_write_sdvox +ffffffff81a83720 t intel_sdvo_write_infoframe +ffffffff81a838f0 t intel_sdvo_dvi_init +ffffffff81a83b80 t intel_sdvo_tv_init +ffffffff81a83ea0 t intel_sdvo_lvds_init +ffffffff81a84090 t intel_sdvo_hotplug +ffffffff81a840d0 t intel_sdvo_connector_get_hw_state +ffffffff81a84160 t intel_sdvo_detect +ffffffff81a844d0 t intel_sdvo_connector_register +ffffffff81a844e0 t intel_sdvo_connector_unregister +ffffffff81a844f0 t intel_sdvo_connector_duplicate_state +ffffffff81a84570 t intel_sdvo_connector_atomic_set_property +ffffffff81a84740 t intel_sdvo_connector_atomic_get_property +ffffffff81a84960 t intel_sdvo_get_modes +ffffffff81a84c20 t intel_sdvo_mode_valid +ffffffff81a84cf0 t intel_sdvo_atomic_check +ffffffff81a84da0 t intel_sdvo_create_enhance_property +ffffffff81a86000 T intel_snps_phy_wait_for_calibration +ffffffff81a860d0 T intel_snps_phy_update_psr_power_state +ffffffff81a861a0 T intel_snps_phy_set_signal_levels +ffffffff81a863e0 T intel_mpllb_calc_state +ffffffff81a86590 T intel_snps_phy_check_hdmi_link_rate +ffffffff81a86610 T intel_mpllb_enable +ffffffff81a86870 T intel_mpllb_disable +ffffffff81a86a00 T intel_mpllb_calc_port_clock +ffffffff81a86ac0 T intel_mpllb_readout_hw_state +ffffffff81a86c20 T intel_mpllb_state_verify +ffffffff81a88000 T intel_plane_check_src_coordinates +ffffffff81a881c0 T vlv_plane_min_cdclk +ffffffff81a882a0 T ivb_plane_min_cdclk +ffffffff81a88360 T hsw_plane_min_cdclk +ffffffff81a883f0 T chv_plane_check_rotation +ffffffff81a88460 T intel_sprite_set_colorkey_ioctl +ffffffff81a88730 T intel_sprite_plane_create +ffffffff81a88a80 t vlv_sprite_update_noarm +ffffffff81a88b70 t vlv_sprite_update_arm +ffffffff81a89230 t vlv_sprite_disable_arm +ffffffff81a892c0 t vlv_sprite_get_hw_state +ffffffff81a89380 t vlv_sprite_check +ffffffff81a89610 t ivb_sprite_update_noarm +ffffffff81a89770 t ivb_sprite_update_arm +ffffffff81a89b50 t ivb_sprite_disable_arm +ffffffff81a89c00 t ivb_sprite_get_hw_state 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intel_sagv_pre_plane_update +ffffffff81a9d2a0 T intel_sagv_post_plane_update +ffffffff81a9d4f0 T intel_can_enable_sagv +ffffffff81a9d560 T skl_ddb_dbuf_slice_mask +ffffffff81a9d610 T skl_write_plane_wm +ffffffff81a9d9e0 T skl_write_cursor_wm +ffffffff81a9dd30 T skl_ddb_allocation_overlaps +ffffffff81a9ddc0 T skl_wm_get_hw_state +ffffffff81a9e3b0 t skl_pipe_wm_get_hw_state +ffffffff81a9e740 t skl_compute_dbuf_slices +ffffffff81a9ec70 T skl_wm_sanitize +ffffffff81a9eec0 T intel_wm_state_verify +ffffffff81a9f7e0 T skl_watermark_ipc_enabled +ffffffff81a9f810 T skl_watermark_ipc_update +ffffffff81a9f8c0 T skl_watermark_ipc_init +ffffffff81a9f9c0 T skl_wm_init +ffffffff81a9fff0 T intel_atomic_get_dbuf_state +ffffffff81aa0010 T intel_dbuf_init +ffffffff81aa0080 T intel_dbuf_pre_plane_update +ffffffff81aa0350 T intel_dbuf_post_plane_update +ffffffff81aa0420 T intel_mbus_dbox_update +ffffffff81aa0690 T skl_watermark_ipc_debugfs_register +ffffffff81aa06c0 t skl_sagv_disable +ffffffff81aa07e0 t skl_ddb_entry_for_slices +ffffffff81aa0920 t skl_compute_wm +ffffffff81aa3750 t skl_build_plane_wm_single +ffffffff81aa3a80 t skl_compute_wm_params +ffffffff81aa3e70 t skl_compute_plane_wm +ffffffff81aa4350 t intel_dbuf_duplicate_state +ffffffff81aa43e0 t intel_dbuf_destroy_state +ffffffff81aa5000 T pixel_format_from_register_bits +ffffffff81aa5060 T vlv_dsi_wait_for_fifo_empty +ffffffff81aa5120 T vlv_dsi_init +ffffffff81aa5980 t intel_dsi_compute_config +ffffffff81aa5ad0 t intel_dsi_pre_enable +ffffffff81aa7750 t bxt_dsi_enable +ffffffff81aa77b0 t intel_dsi_disable +ffffffff81aa7a60 t intel_dsi_post_disable +ffffffff81aa8740 t intel_dsi_get_hw_state +ffffffff81aa89f0 t intel_dsi_get_config +ffffffff81aa91b0 t intel_dsi_shutdown +ffffffff81aa92a0 t intel_dsi_encoder_destroy +ffffffff81aa92c0 t intel_dsi_prepare +ffffffff81aa9f10 t dpi_send_cmd +ffffffff81aaa0a0 t intel_dsi_host_attach +ffffffff81aaa0d0 t intel_dsi_host_detach +ffffffff81aaa100 t intel_dsi_host_transfer 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i915_gem_set_caching_ioctl +ffffffff81ab69f0 t i915_gem_object_lock_interruptible +ffffffff81ab6b20 T i915_gem_object_pin_to_display_plane +ffffffff81ab6d00 T i915_gem_object_set_to_cpu_domain +ffffffff81ab6dd0 T i915_gem_set_domain_ioctl +ffffffff81ab7130 T i915_gem_object_prepare_read +ffffffff81ab7280 T i915_gem_object_prepare_write +ffffffff81ab8000 T i915_gem_execbuffer2_ioctl +ffffffff81aba280 t eb_release_vmas +ffffffff81aba550 t parse_timeline_fences +ffffffff81aba940 t eb_pin_engine +ffffffff81abac00 t eb_validate_vmas +ffffffff81abb400 t eb_relocate_vma +ffffffff81abb640 t eb_parse +ffffffff81abba20 t eb_relocate_parse_slow +ffffffff81abc120 t eb_pin_timeline +ffffffff81abc300 t i915_gem_object_lock +ffffffff81abc510 t eb_relocate_entry +ffffffff81abccd0 t reloc_cache_reset +ffffffff81abd000 T __i915_gem_object_create_internal +ffffffff81abd0c0 T i915_gem_object_create_internal +ffffffff81abd170 t i915_gem_object_get_pages_internal +ffffffff81abd460 t i915_gem_object_put_pages_internal +ffffffff81abe000 T i915_gem_object_lmem_io_map +ffffffff81abe050 T i915_gem_object_is_lmem +ffffffff81abe090 T __i915_gem_object_is_lmem +ffffffff81abe0d0 T __i915_gem_object_create_lmem_with_ps +ffffffff81abe0f0 T i915_gem_object_create_lmem_from_data +ffffffff81abe1b0 T i915_gem_object_create_lmem +ffffffff81abf000 T i915_gem_mmap_ioctl +ffffffff81abf210 T i915_gem_mmap_gtt_version +ffffffff81abf240 T remap_io_mapping +ffffffff81abf300 T i915_gem_fault +ffffffff81abfdf0 T __i915_gem_object_release_mmap_gtt +ffffffff81abfe60 T i915_gem_object_release_mmap_gtt +ffffffff81abff10 T i915_gem_object_runtime_pm_release_mmap_offset +ffffffff81abff60 T i915_gem_object_release_mmap_offset +ffffffff81ac0060 T i915_gem_dumb_mmap_offset +ffffffff81ac00d0 t __assign_mmap_offset_handle +ffffffff81ac0530 T i915_gem_mmap_offset_ioctl +ffffffff81ac0630 T i915_gem_mmap +ffffffff81ac0760 t __ww_mutex_lock +ffffffff81ac1000 T i915_gem_object_alloc +ffffffff81ac1050 T i915_gem_object_free +ffffffff81ac1070 T i915_gem_object_init +ffffffff81ac1180 T __i915_gem_object_fini +ffffffff81ac11a0 T i915_gem_object_set_cache_coherency +ffffffff81ac1220 T i915_gem_object_can_bypass_llc +ffffffff81ac1270 T __i915_gem_free_object_rcu +ffffffff81ac12e0 T __i915_gem_object_pages_fini +ffffffff81ac1470 T __i915_gem_free_object +ffffffff81ac1520 T i915_gem_flush_free_objects +ffffffff81ac1610 T __i915_gem_object_flush_frontbuffer +ffffffff81ac16b0 T __i915_gem_object_invalidate_frontbuffer +ffffffff81ac1750 T i915_gem_object_read_from_page +ffffffff81ac1830 T i915_gem_object_has_struct_page +ffffffff81ac1860 T i915_gem_object_has_iomem +ffffffff81ac1890 T i915_gem_object_evictable +ffffffff81ac1940 T i915_gem_object_migratable +ffffffff81ac1980 T i915_gem_object_can_migrate +ffffffff81ac1af0 T i915_gem_object_migrate +ffffffff81ac1b90 T __i915_gem_object_migrate +ffffffff81ac1c30 T i915_gem_object_placement_possible +ffffffff81ac1cc0 T i915_gem_object_needs_ccs_pages +ffffffff81ac1d50 T i915_gem_init__objects +ffffffff81ac1d80 t __i915_gem_free_work +ffffffff81ac1da0 T i915_objects_module_exit +ffffffff81ac1dc0 T i915_objects_module_init +ffffffff81ac1e20 T i915_gem_object_get_moving_fence +ffffffff81ac1e40 T i915_gem_object_wait_moving_fence +ffffffff81ac1eb0 T i915_gem_object_has_unknown_state +ffffffff81ac1ee0 t i915_gem_free_object +ffffffff81ac1f70 t i915_gem_close_object +ffffffff81ac3000 T __i915_gem_object_set_pages +ffffffff81ac32e0 T ____i915_gem_object_get_pages +ffffffff81ac3350 T __i915_gem_object_get_pages +ffffffff81ac33f0 T i915_gem_object_pin_pages_unlocked +ffffffff81ac3510 t i915_gem_object_lock +ffffffff81ac3720 T i915_gem_object_truncate +ffffffff81ac3760 T __i915_gem_object_unset_pages +ffffffff81ac3910 T __i915_gem_object_put_pages +ffffffff81ac3990 T i915_gem_object_pin_map +ffffffff81ac3da0 T i915_gem_object_pin_map_unlocked +ffffffff81ac3ea0 T __i915_gem_object_flush_map +ffffffff81ac3f30 T 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intel_guc_log_info +ffffffff81b3dc80 T intel_guc_log_dump +ffffffff81b3e000 T intel_guc_log_debugfs_register +ffffffff81b3f000 T intel_guc_rc_init_early +ffffffff81b3f060 T intel_guc_rc_enable +ffffffff81b3f150 T intel_guc_rc_disable +ffffffff81b40000 T intel_guc_slpc_init_early +ffffffff81b40050 T intel_guc_slpc_init +ffffffff81b40130 t slpc_boost_work +ffffffff81b40180 T intel_guc_slpc_set_max_freq +ffffffff81b402a0 T intel_guc_slpc_get_max_freq +ffffffff81b403e0 T intel_guc_slpc_set_min_freq +ffffffff81b405b0 T intel_guc_slpc_get_min_freq +ffffffff81b406f0 T intel_guc_slpc_set_media_ratio_mode +ffffffff81b40800 T intel_guc_pm_intrmsk_enable +ffffffff81b40880 T intel_guc_slpc_enable +ffffffff81b40d90 T intel_guc_slpc_set_boost_freq +ffffffff81b40e30 t slpc_force_min_freq +ffffffff81b40f50 T intel_guc_slpc_dec_waiters +ffffffff81b40f90 T intel_guc_slpc_print_info +ffffffff81b411a0 T intel_guc_slpc_fini +ffffffff81b42000 T intel_guc_wait_for_pending_msg +ffffffff81b422a0 T intel_guc_wait_for_idle +ffffffff81b422f0 T intel_guc_busyness_park +ffffffff81b424f0 T intel_guc_busyness_unpark +ffffffff81b42660 T intel_guc_submission_reset_prepare +ffffffff81b42df0 t guc_flush_destroyed_contexts +ffffffff81b42f60 T intel_guc_submission_reset +ffffffff81b43080 t __guc_reset_context +ffffffff81b43370 T intel_guc_submission_cancel_requests +ffffffff81b43610 T intel_guc_submission_reset_finish +ffffffff81b436f0 T intel_guc_submission_init +ffffffff81b43860 T intel_guc_submission_fini +ffffffff81b43900 T intel_guc_submission_setup +ffffffff81b43cf0 t guc_sched_engine_disabled +ffffffff81b43d20 t guc_sched_engine_destroy +ffffffff81b43d80 t guc_bump_inflight_request_prio +ffffffff81b43e70 t guc_retire_inflight_request_prio +ffffffff81b43ee0 t guc_submission_tasklet +ffffffff81b442a0 t guc_sanitize +ffffffff81b44310 t guc_release +ffffffff81b44340 T intel_guc_submission_enable +ffffffff81b44500 T intel_guc_submission_disable +ffffffff81b44550 T intel_guc_submission_init_early +ffffffff81b446b0 t destroyed_worker_func +ffffffff81b44990 t reset_fail_worker_func +ffffffff81b44a20 t guc_timestamp_ping +ffffffff81b44c40 T intel_guc_deregister_done_process_msg +ffffffff81b44fa0 t register_context +ffffffff81b45900 T intel_guc_sched_done_process_msg +ffffffff81b45cb0 T intel_guc_context_reset_process_msg +ffffffff81b45ef0 T intel_guc_error_capture_process_msg +ffffffff81b45fa0 T intel_guc_lookup_engine +ffffffff81b45fe0 T intel_guc_engine_failure_process_msg +ffffffff81b46160 T intel_guc_find_hung_context +ffffffff81b46300 T intel_guc_dump_active_requests +ffffffff81b46490 T intel_guc_submission_print_info +ffffffff81b465d0 T intel_guc_submission_print_context_info +ffffffff81b46a00 t emit_bb_start_parent_no_preempt_mid_batch +ffffffff81b46b20 T intel_guc_virtual_engine_has_heartbeat +ffffffff81b46bb0 t guc_virtual_get_sibling +ffffffff81b46c50 t update_context_prio +ffffffff81b46e40 t try_context_registration +ffffffff81b472c0 t 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intel_runtime_pm_disable_interrupts +ffffffff81b6ccc0 T intel_runtime_pm_enable_interrupts +ffffffff81b6ccf0 T intel_synchronize_hardirq +ffffffff81b6cd10 t i9xx_pipestat_irq_reset +ffffffff81b6cea0 t kasprintf +ffffffff81b6cf70 t i915_hpd_irq_setup +ffffffff81b6d080 t icp_hpd_irq_setup +ffffffff81b6d270 t dg1_hpd_irq_setup +ffffffff81b6d2d0 t gen11_hpd_irq_setup +ffffffff81b6d520 t bxt_hpd_irq_setup +ffffffff81b6d6b0 t bdw_update_port_irq +ffffffff81b6d7f0 t spt_hpd_irq_setup +ffffffff81b6da00 t ilk_hpd_irq_setup +ffffffff81b6dc60 t gen11_display_irq_reset +ffffffff81b6e1e0 t ibx_irq_reset +ffffffff81b6e320 t cherryview_irq_handler +ffffffff81b6e5f0 t valleyview_irq_handler +ffffffff81b6e950 t i965_irq_handler +ffffffff81b6eec0 t i915_irq_handler +ffffffff81b6f3a0 t i8xx_irq_handler +ffffffff81b6f7a0 t dg1_irq_handler +ffffffff81b6f950 t gen11_irq_handler +ffffffff81b6faa0 t gen8_irq_handler +ffffffff81b6fb80 t ilk_irq_handler +ffffffff81b70a40 t i9xx_pipestat_irq_ack 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gen11_disable_metric_set +ffffffff81b7f320 t gen12_is_valid_b_counter_addr +ffffffff81b7f370 t gen12_is_valid_mux_addr +ffffffff81b7f3c0 t gen12_oa_enable +ffffffff81b7f540 t gen12_oa_disable +ffffffff81b7f680 t gen12_enable_metric_set +ffffffff81b7f7b0 t gen12_disable_metric_set +ffffffff81b7f880 t gen12_oa_hw_tail_read +ffffffff81b7f8d0 T i915_perf_sysctl_register +ffffffff81b7f900 T i915_perf_sysctl_unregister +ffffffff81b7f920 T i915_perf_fini +ffffffff81b7fa00 t destroy_config +ffffffff81b7fa90 T i915_perf_ioctl_version +ffffffff81b7fac0 t emit_oa_config +ffffffff81b801a0 t i915_gem_object_lock +ffffffff81b803b0 t lrc_configure_all_contexts +ffffffff81b80570 t oa_configure_all_contexts +ffffffff81b80890 t gen8_modify_self +ffffffff81b80a60 t gen8_modify_context +ffffffff81b80c00 t gen12_configure_oar_context +ffffffff81b81000 T i915_query_ioctl +ffffffff81b81110 t query_topology_info +ffffffff81b81150 t query_engine_info +ffffffff81b81390 t query_perf_config +ffffffff81b81680 t query_memregion_info +ffffffff81b81900 t query_hwconfig_blob +ffffffff81b81980 t query_geometry_subslices +ffffffff81b81a10 t fill_topology_info +ffffffff81b81bb0 t query_perf_config_data +ffffffff81b83000 T i915_request_slab_cache +ffffffff81b83030 t i915_fence_get_driver_name +ffffffff81b83060 t i915_fence_get_timeline_name +ffffffff81b830b0 t i915_fence_enable_signaling +ffffffff81b830c0 t i915_fence_signaled +ffffffff81b83110 t i915_fence_wait +ffffffff81b83130 t i915_fence_release +ffffffff81b83220 T i915_request_notify_execute_cb_imm +ffffffff81b83280 T i915_request_active_engine +ffffffff81b83360 T i915_request_free_capture_list +ffffffff81b833c0 T i915_request_retire +ffffffff81b83580 T i915_request_retire_upto +ffffffff81b835f0 T __i915_request_skip +ffffffff81b83680 T i915_request_set_error_once +ffffffff81b836f0 T i915_request_mark_eio +ffffffff81b83780 T __i915_request_submit +ffffffff81b839d0 T i915_request_submit +ffffffff81b83a10 T __i915_request_unsubmit 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intel_memory_regions_driver_release +ffffffff81b9b000 T intel_detect_pch +ffffffff81b9b310 t intel_pch_match +ffffffff81b9b360 t intel_pch_type +ffffffff81b9c000 T snb_pcode_read +ffffffff81b9c0d0 t __snb_pcode_rw +ffffffff81b9c260 T snb_pcode_write_timeout +ffffffff81b9c330 T skl_pcode_request +ffffffff81b9c670 T intel_pcode_init +ffffffff81b9c6d0 T snb_pcode_read_p +ffffffff81b9c7d0 T snb_pcode_write_p +ffffffff81b9d000 T intel_set_memory_cxsr +ffffffff81b9d090 t _intel_set_memory_cxsr +ffffffff81b9d340 T intel_wm_plane_visible +ffffffff81b9d390 T ilk_wm_max_level +ffffffff81b9d400 T intel_print_wm_latency +ffffffff81b9d550 T ilk_disable_lp_wm +ffffffff81b9d630 T g4x_wm_get_hw_state +ffffffff81b9de00 T g4x_wm_sanitize +ffffffff81b9df90 t g4x_program_watermarks +ffffffff81b9e330 T vlv_wm_get_hw_state +ffffffff81b9eff0 t vlv_invalidate_wms +ffffffff81b9f150 T vlv_wm_sanitize +ffffffff81b9f2a0 t vlv_program_watermarks +ffffffff81b9f9f0 T ilk_wm_get_hw_state +ffffffff81b9fe60 T intel_init_clock_gating +ffffffff81b9fe80 T intel_suspend_hw +ffffffff81b9ff20 T intel_init_clock_gating_hooks +ffffffff81ba0170 T intel_init_pm +ffffffff81ba0c60 T intel_pm_setup +ffffffff81ba0ca0 t chv_set_memory_dvfs +ffffffff81ba0e60 t pvc_init_clock_gating +ffffffff81ba1000 t dg2_init_clock_gating +ffffffff81ba1150 t xehpsdv_init_clock_gating +ffffffff81ba1250 t adlp_init_clock_gating +ffffffff81ba1340 t gen12lp_init_clock_gating +ffffffff81ba14b0 t dg1_init_clock_gating +ffffffff81ba1590 t icl_init_clock_gating +ffffffff81ba1650 t cfl_init_clock_gating +ffffffff81ba1770 t gen9_init_clock_gating +ffffffff81ba1880 t skl_init_clock_gating +ffffffff81ba19c0 t kbl_init_clock_gating +ffffffff81ba1bd0 t bxt_init_clock_gating +ffffffff81ba1d30 t glk_init_clock_gating +ffffffff81ba1d90 t bdw_init_clock_gating +ffffffff81ba21d0 t chv_init_clock_gating +ffffffff81ba2380 t hsw_init_clock_gating +ffffffff81ba24d0 t ivb_init_clock_gating +ffffffff81ba26e0 t g4x_disable_trickle_feed +ffffffff81ba2840 t cpt_init_clock_gating +ffffffff81ba2b70 t vlv_init_clock_gating +ffffffff81ba2c80 t gen6_init_clock_gating +ffffffff81ba2e80 t ilk_init_clock_gating +ffffffff81ba3050 t g4x_init_clock_gating +ffffffff81ba3100 t i965gm_init_clock_gating +ffffffff81ba31d0 t i965g_init_clock_gating +ffffffff81ba3240 t gen3_init_clock_gating +ffffffff81ba3330 t i85x_init_clock_gating +ffffffff81ba33d0 t i830_init_clock_gating +ffffffff81ba3400 t nop_init_clock_gating +ffffffff81ba3420 t ilk_compute_pipe_wm +ffffffff81ba3890 t ilk_compute_intermediate_wm +ffffffff81ba3bb0 t ilk_initial_watermarks +ffffffff81ba3c20 t ilk_optimize_watermarks +ffffffff81ba3cd0 t ilk_compute_wm_level +ffffffff81ba4240 t ilk_validate_wm_level +ffffffff81ba4380 t ilk_program_watermarks +ffffffff81ba5140 t ilk_wm_merge +ffffffff81ba53b0 t vlv_compute_pipe_wm +ffffffff81ba61f0 t vlv_compute_intermediate_wm +ffffffff81ba64f0 t vlv_initial_watermarks +ffffffff81ba6560 t vlv_atomic_update_fifo +ffffffff81ba6870 t vlv_optimize_watermarks +ffffffff81ba6930 t g4x_compute_pipe_wm +ffffffff81ba7560 t g4x_compute_intermediate_wm +ffffffff81ba79a0 t g4x_initial_watermarks +ffffffff81ba7a40 t g4x_optimize_watermarks +ffffffff81ba7b20 t pnv_update_wm +ffffffff81ba81d0 t i965_update_wm +ffffffff81ba8590 t i9xx_update_wm +ffffffff81ba8d40 t i845_update_wm +ffffffff81ba9000 T intel_region_ttm_device_init +ffffffff81ba9070 T intel_region_ttm_device_fini +ffffffff81ba9090 T intel_region_to_ttm_type +ffffffff81ba90d0 T intel_region_ttm_init +ffffffff81ba9170 T intel_region_ttm_fini +ffffffff81ba93d0 T intel_region_ttm_resource_to_rsgt +ffffffff81ba9410 T intel_region_ttm_resource_free +ffffffff81baa000 T intel_runtime_pm_get_raw +ffffffff81baa080 T intel_runtime_pm_get +ffffffff81baa130 T intel_runtime_pm_get_if_in_use +ffffffff81baa1e0 T intel_runtime_pm_get_if_active +ffffffff81baa290 T intel_runtime_pm_get_noresume +ffffffff81baa3c0 T intel_runtime_pm_put_raw +ffffffff81baa450 T intel_runtime_pm_put_unchecked +ffffffff81baa510 T intel_runtime_pm_enable +ffffffff81baa540 T intel_runtime_pm_disable +ffffffff81baa570 T intel_runtime_pm_driver_release +ffffffff81baa600 T intel_runtime_pm_init_early +ffffffff81bab000 T intel_sbi_read +ffffffff81bab050 t intel_sbi_rw +ffffffff81bab240 T intel_sbi_write +ffffffff81bac000 T intel_step_init +ffffffff81bac3f0 T intel_step_name +ffffffff81bac430 t pvc_step_lookup +ffffffff81bad000 T gen3_stolen_base +ffffffff81bad050 T gen11_stolen_base +ffffffff81bad0d0 T i830_stolen_size +ffffffff81bad140 T gen3_stolen_size +ffffffff81bad1b0 T gen6_stolen_size +ffffffff81bad200 T chv_stolen_size +ffffffff81bad270 T gen8_stolen_size +ffffffff81bad2c0 T gen9_stolen_size +ffffffff81bad330 T intel_init_stolen_res +ffffffff81bae000 T intel_uncore_mmio_debug_init_early +ffffffff81bae060 T intel_uncore_forcewake_domain_to_str +ffffffff81bae0d0 T intel_uncore_fw_release_timer +ffffffff81bae1f0 T intel_uncore_suspend +ffffffff81bae230 t intel_uncore_forcewake_reset +ffffffff81bae510 T intel_uncore_resume_early +ffffffff81bae640 T intel_uncore_unclaimed_mmio +ffffffff81bae6b0 T intel_uncore_runtime_resume +ffffffff81bae6e0 T intel_uncore_forcewake_get +ffffffff81bae850 T intel_uncore_forcewake_user_get +ffffffff81bae970 T intel_uncore_forcewake_get__locked +ffffffff81baea40 T intel_uncore_forcewake_user_put +ffffffff81baeb80 T intel_uncore_forcewake_put__locked +ffffffff81baec80 T intel_uncore_forcewake_put +ffffffff81baeda0 T intel_uncore_forcewake_put_delayed +ffffffff81baeef0 T intel_uncore_forcewake_flush +ffffffff81baefa0 T assert_forcewakes_inactive +ffffffff81baf010 T assert_forcewakes_active +ffffffff81baf040 T intel_uncore_setup_mmio +ffffffff81baf060 t uncore_unmap_mmio +ffffffff81baf090 T intel_uncore_init_early +ffffffff81baf0f0 T intel_uncore_init_mmio +ffffffff81bb0350 T intel_uncore_prune_engine_fw_domains +ffffffff81bb0520 t fw_domain_fini +ffffffff81bb0620 T intel_uncore_fini_mmio +ffffffff81bb06c0 T __intel_wait_for_register_fw +ffffffff81bb0970 T __intel_wait_for_register +ffffffff81bb0cf0 T intel_uncore_forcewake_for_reg +ffffffff81bb0e00 t check_for_unclaimed_mmio +ffffffff81bb0f60 T intel_uncore_arm_unclaimed_mmio_detection +ffffffff81bb1060 t vgpu_write8 +ffffffff81bb10a0 t vgpu_write16 +ffffffff81bb10e0 t vgpu_write32 +ffffffff81bb1120 t vgpu_read8 +ffffffff81bb1160 t vgpu_read16 +ffffffff81bb11a0 t vgpu_read32 +ffffffff81bb11e0 t vgpu_read64 +ffffffff81bb1220 t gen5_write8 +ffffffff81bb1310 t gen5_write16 +ffffffff81bb1410 t gen5_write32 +ffffffff81bb1500 t gen5_read8 +ffffffff81bb15e0 t gen5_read16 +ffffffff81bb16c0 t gen5_read32 +ffffffff81bb17a0 t gen5_read64 +ffffffff81bb1880 t gen2_write8 +ffffffff81bb1960 t gen2_write16 +ffffffff81bb1a40 t gen2_write32 +ffffffff81bb1b20 t gen2_read8 +ffffffff81bb1bf0 t gen2_read16 +ffffffff81bb1cc0 t gen2_read32 +ffffffff81bb1d90 t gen2_read64 +ffffffff81bb1e60 t fwtable_read8 +ffffffff81bb2120 t fwtable_read16 +ffffffff81bb23e0 t fwtable_read32 +ffffffff81bb26b0 t fwtable_read64 +ffffffff81bb2980 t fwtable_reg_read_fw_domains +ffffffff81bb2a90 t fwtable_write8 +ffffffff81bb2de0 t fwtable_write16 +ffffffff81bb3130 t fwtable_write32 +ffffffff81bb3480 t fwtable_reg_write_fw_domains +ffffffff81bb3630 t gen6_write8 +ffffffff81bb37f0 t gen6_write16 +ffffffff81bb39b0 t gen6_write32 +ffffffff81bb3b70 t gen6_reg_write_fw_domains +ffffffff81bb3ba0 t i915_pmic_bus_access_notifier +ffffffff81bb3c20 t fw_domains_get_with_thread_status +ffffffff81bb3d60 t fw_domains_get_with_fallback +ffffffff81bb4200 t fw_domain_wait_ack_with_fallback +ffffffff81bb4480 t fw_domains_get_normal +ffffffff81bb47b0 t ___force_wake_auto +ffffffff81bb4840 t __gen6_gt_wait_for_fifo +ffffffff81bb5000 T __intel_wakeref_get_first +ffffffff81bb50a0 T __intel_wakeref_put_last +ffffffff81bb5100 t ____intel_wakeref_put_last +ffffffff81bb51e0 T __intel_wakeref_init +ffffffff81bb5260 t __intel_wakeref_put_work +ffffffff81bb52d0 T intel_wakeref_wait_for_idle +ffffffff81bb5410 T intel_wakeref_auto_init +ffffffff81bb5480 t wakeref_auto_timeout +ffffffff81bb5520 T intel_wakeref_auto +ffffffff81bb5710 T intel_wakeref_auto_fini +ffffffff81bb57c0 t __delayed_work_tick +ffffffff81bb6000 T intel_wopcm_init_early +ffffffff81bb6070 T intel_wopcm_init +ffffffff81bb7000 T vlv_iosf_sb_get +ffffffff81bb7020 T vlv_iosf_sb_put +ffffffff81bb7040 T vlv_punit_read +ffffffff81bb7090 t vlv_sideband_rw +ffffffff81bb7240 T vlv_punit_write +ffffffff81bb7290 T vlv_bunit_read +ffffffff81bb72e0 T vlv_bunit_write +ffffffff81bb7330 T vlv_nc_read +ffffffff81bb7380 T vlv_iosf_sb_read +ffffffff81bb73d0 T vlv_iosf_sb_write +ffffffff81bb7420 T vlv_cck_read +ffffffff81bb7470 T vlv_cck_write +ffffffff81bb74c0 T vlv_ccu_read +ffffffff81bb7510 T vlv_ccu_write +ffffffff81bb7560 T vlv_dpio_read +ffffffff81bb7630 T vlv_dpio_write +ffffffff81bb76a0 T vlv_flisdsi_read +ffffffff81bb76f0 T vlv_flisdsi_write +ffffffff81bb8000 T vlv_suspend_complete +ffffffff81bb8a50 T vlv_resume_prepare +ffffffff81bb9490 T vlv_suspend_init +ffffffff81bb94f0 T vlv_suspend_cleanup +ffffffff81bb9540 t vlv_wait_for_pw_status +ffffffff81bba000 T atom_execute_table_scratch_unlocked +ffffffff81bba0a0 t atom_execute_table_locked +ffffffff81bba3d0 T atom_execute_table +ffffffff81bba480 T atom_parse +ffffffff81bba650 T atom_destroy +ffffffff81bba690 T atom_asic_init +ffffffff81bba8a0 T atom_parse_data_header +ffffffff81bba930 T atom_parse_cmd_header +ffffffff81bba9a0 T atom_allocate_fb_scratch +ffffffff81bbaa70 t atom_op_move +ffffffff81bbac50 t atom_op_and +ffffffff81bbae30 t atom_op_or +ffffffff81bbb010 t atom_op_shift_left +ffffffff81bbb200 t atom_op_shift_right +ffffffff81bbb3f0 t atom_op_mul +ffffffff81bbb540 t atom_op_div +ffffffff81bbb6b0 t atom_op_add +ffffffff81bbb890 t atom_op_sub +ffffffff81bbba70 t atom_op_setport +ffffffff81bbbbf0 t atom_op_setregblock +ffffffff81bbbcb0 t atom_op_setfbbase +ffffffff81bbbd80 t atom_op_compare +ffffffff81bbbf70 t atom_op_switch +ffffffff81bbc1c0 t atom_op_jump +ffffffff81bbc440 t atom_op_test +ffffffff81bbc600 t atom_op_delay +ffffffff81bbc6e0 t atom_op_calltable +ffffffff81bbc820 t atom_op_repeat +ffffffff81bbc850 t atom_op_clear +ffffffff81bbc950 t atom_op_nop +ffffffff81bbc980 t atom_op_eot +ffffffff81bbc9b0 t atom_op_mask +ffffffff81bbcc80 t atom_op_postcard +ffffffff81bbcd30 t atom_op_beep +ffffffff81bbcd50 t atom_op_savereg +ffffffff81bbcd80 t atom_op_restorereg +ffffffff81bbcdb0 t atom_op_setdatablock +ffffffff81bbcef0 t atom_op_xor +ffffffff81bbd0d0 t atom_op_shl +ffffffff81bbd2e0 t atom_op_shr +ffffffff81bbd4f0 t atom_op_debug +ffffffff81bbd520 t atom_put_dst +ffffffff81bbd9f0 t atom_get_src_int +ffffffff81bbe0a0 t atom_iio_execute +ffffffff81bbf000 T atombios_crtc_dpms +ffffffff81bbf2f0 T atombios_crtc_set_base +ffffffff81bbf340 t dce4_crtc_do_set_base +ffffffff81bbfe30 t avivo_crtc_do_set_base +ffffffff81bc06a0 T atombios_crtc_set_base_atomic +ffffffff81bc06e0 T radeon_atom_disp_eng_pll_init +ffffffff81bc07c0 t atombios_crtc_set_disp_eng_pll +ffffffff81bc08d0 t atombios_crtc_program_ss +ffffffff81bc0b80 T atombios_crtc_mode_set +ffffffff81bc15b0 T radeon_atombios_init_crtc +ffffffff81bc16a0 t radeon_bo_reserve +ffffffff81bc1820 t radeon_bo_unreserve +ffffffff81bc1900 t atombios_crtc_program_pll +ffffffff81bc1bb0 t atombios_crtc_prepare +ffffffff81bc1c60 t atombios_crtc_commit +ffffffff81bc1cd0 t atombios_crtc_mode_fixup +ffffffff81bc2a40 t atombios_crtc_disable +ffffffff81bc2ca0 t radeon_get_shared_nondp_ppll +ffffffff81bc3000 T radeon_atom_copy_swap +ffffffff81bc3010 T radeon_dp_aux_init +ffffffff81bc30f0 t radeon_dp_aux_transfer_atom +ffffffff81bc32c0 T radeon_dp_getsinktype +ffffffff81bc3330 T radeon_dp_getdpcd +ffffffff81bc34a0 T radeon_dp_get_panel_mode +ffffffff81bc35a0 T radeon_dp_set_link_config +ffffffff81bc3620 t radeon_dp_get_dp_link_config +ffffffff81bc37a0 T radeon_dp_mode_valid_helper +ffffffff81bc3850 T radeon_dp_needs_link_train +ffffffff81bc38c0 T radeon_dp_set_rx_power_state +ffffffff81bc3940 T radeon_dp_link_train +ffffffff81bc40c0 t radeon_process_aux_ch +ffffffff81bc4260 t dp_get_adjust_train +ffffffff81bc5000 T atombios_get_backlight_level +ffffffff81bc5060 T atombios_set_backlight_level +ffffffff81bc5210 T atombios_dig_transmitter_setup +ffffffff81bc5230 T radeon_atom_backlight_init +ffffffff81bc5400 t radeon_atom_backlight_get_brightness +ffffffff81bc5460 T atombios_dvo_setup +ffffffff81bc5620 T atombios_digital_setup +ffffffff81bc58c0 T atombios_get_encoder_mode +ffffffff81bc5b50 T atombios_dig_encoder_setup2 +ffffffff81bc5f90 T atombios_dig_encoder_setup +ffffffff81bc5fb0 T atombios_dig_transmitter_setup2 +ffffffff81bc6910 T atombios_set_edp_panel_power +ffffffff81bc6a30 T radeon_atom_release_dig_encoder +ffffffff81bc6a70 T radeon_atom_pick_dig_encoder +ffffffff81bc6c90 T radeon_atom_encoder_init +ffffffff81bc6d60 t atombios_external_encoder_setup +ffffffff81bc6fc0 T radeon_atom_ext_encoder_setup_ddc +ffffffff81bc7010 T radeon_enc_destroy +ffffffff81bc70c0 T radeon_add_atom_encoder +ffffffff81bc7500 t radeon_atom_backlight_update_status +ffffffff81bc7560 t radeon_atom_encoder_dpms +ffffffff81bc7870 t radeon_atom_mode_fixup +ffffffff81bc79b0 t radeon_atom_encoder_prepare +ffffffff81bc7e80 t radeon_atom_encoder_commit +ffffffff81bc7eb0 t radeon_atom_encoder_mode_set +ffffffff81bc8460 t radeon_atom_dig_detect +ffffffff81bc8570 t radeon_atom_encoder_disable +ffffffff81bc8820 t radeon_atom_encoder_dpms_avivo +ffffffff81bc8a50 t radeon_atom_encoder_dpms_dig +ffffffff81bc8f50 t radeon_atom_dac_detect +ffffffff81bc9140 t radeon_atom_ext_dpms +ffffffff81bc9170 t radeon_atom_ext_prepare +ffffffff81bc91a0 t radeon_atom_ext_commit +ffffffff81bc91d0 t radeon_atom_ext_mode_set +ffffffff81bc9200 t radeon_atom_ext_disable +ffffffff81bca000 T radeon_atom_hw_i2c_xfer +ffffffff81bca160 t radeon_process_i2c_ch +ffffffff81bca330 T radeon_atom_hw_i2c_func +ffffffff81bcb000 T btc_get_max_clock_from_voltage_dependency_table +ffffffff81bcb0d0 T btc_apply_voltage_dependency_rules +ffffffff81bcb140 T btc_skip_blacklist_clocks +ffffffff81bcb230 T btc_adjust_clock_combinations +ffffffff81bcb340 T btc_apply_voltage_delta_rules +ffffffff81bcb470 T btc_program_mgcg_hw_sequence +ffffffff81bcb570 T btc_dpm_enabled +ffffffff81bcb580 T btc_notify_uvd_to_smc +ffffffff81bcb5f0 T btc_reset_to_default +ffffffff81bcb640 T btc_read_arb_registers +ffffffff81bcb6d0 T btc_dpm_vblank_too_short +ffffffff81bcb730 T btc_dpm_pre_set_power_state +ffffffff81bcc610 T btc_dpm_set_power_state +ffffffff81bcca20 T btc_dpm_post_set_power_state +ffffffff81bccb40 T btc_dpm_enable +ffffffff81bcdd50 T btc_dpm_disable +ffffffff81bce280 T btc_dpm_setup_asic +ffffffff81bce350 T btc_dpm_init +ffffffff81bce750 T btc_dpm_fini +ffffffff81bce800 T btc_dpm_debugfs_print_current_performance_level +ffffffff81bce840 T btc_dpm_get_current_sclk +ffffffff81bce8c0 T btc_dpm_get_current_mclk +ffffffff81bce940 T btc_dpm_get_sclk +ffffffff81bce990 T btc_dpm_get_mclk +ffffffff81bcf000 T ci_dpm_powergate_uvd +ffffffff81bcf380 T ci_dpm_vblank_too_short +ffffffff81bcf400 T ci_fan_ctrl_get_fan_speed_percent +ffffffff81bcf4a0 T ci_fan_ctrl_set_fan_speed_percent +ffffffff81bcf570 T ci_fan_ctrl_set_mode +ffffffff81bcf700 t ci_fan_ctrl_set_static_mode +ffffffff81bcf7c0 t ci_thermal_start_smc_fan_control +ffffffff81bcfa00 T ci_fan_ctrl_get_mode +ffffffff81bcfa50 T ci_dpm_force_performance_level +ffffffff81bd0310 t ci_upload_dpm_level_enable_mask +ffffffff81bd0640 T ci_dpm_pre_set_power_state +ffffffff81bd0940 T ci_dpm_post_set_power_state +ffffffff81bd0a10 T ci_dpm_setup_asic +ffffffff81bd0c10 T ci_dpm_enable +ffffffff81bd4a40 t ci_enable_didt +ffffffff81bd4ce0 t ci_enable_power_containment +ffffffff81bd5180 T ci_dpm_late_enable +ffffffff81bd5370 T ci_dpm_disable +ffffffff81bd5a60 T ci_dpm_set_power_state +ffffffff81bd6be0 T ci_dpm_display_configuration_changed +ffffffff81bd6d80 T ci_dpm_fini +ffffffff81bd6e30 T ci_dpm_init +ffffffff81bd8500 T ci_dpm_debugfs_print_current_performance_level +ffffffff81bd8640 T ci_dpm_print_power_state +ffffffff81bd8700 T ci_dpm_get_current_sclk +ffffffff81bd87d0 T ci_dpm_get_current_mclk +ffffffff81bd88a0 T ci_dpm_get_sclk +ffffffff81bd88f0 T ci_dpm_get_mclk +ffffffff81bd8940 t ci_populate_all_graphic_levels +ffffffff81bd8ec0 t ci_populate_all_memory_levels +ffffffff81bd97d0 t ci_do_program_memory_timing_parameters +ffffffff81bd99f0 t ci_populate_smc_voltage_table +ffffffff81bd9b50 t ci_enable_sclk_mclk_dpm +ffffffff81bda000 T ci_copy_bytes_to_smc +ffffffff81bda250 T ci_start_smc +ffffffff81bda280 T ci_reset_smc +ffffffff81bda2b0 T ci_program_jump_on_start +ffffffff81bda2e0 T ci_stop_smc_clock +ffffffff81bda310 T ci_start_smc_clock +ffffffff81bda340 T ci_is_smc_running +ffffffff81bda3b0 T ci_load_smc_ucode +ffffffff81bda540 T ci_read_smc_sram_dword +ffffffff81bda610 T ci_write_smc_sram_dword +ffffffff81bdb000 T cik_get_allowed_info_register +ffffffff81bdb0a0 T cik_didt_rreg +ffffffff81bdb140 T cik_didt_wreg +ffffffff81bdb1c0 T ci_get_temp +ffffffff81bdb210 T kv_get_temp +ffffffff81bdb260 T cik_pciep_rreg +ffffffff81bdb2e0 T cik_pciep_wreg +ffffffff81bdb340 T cik_get_xclk +ffffffff81bdb3b0 T cik_mm_rdoorbell +ffffffff81bdb410 T cik_mm_wdoorbell +ffffffff81bdb460 T ci_mc_load_microcode +ffffffff81bdb7b0 T cik_ring_test +ffffffff81bdba50 T cik_fence_gfx_ring_emit +ffffffff81bdbe50 T cik_fence_compute_ring_emit +ffffffff81bdc0e0 T cik_semaphore_ring_emit +ffffffff81bdc2a0 T cik_copy_cpdma +ffffffff81bdc6a0 T cik_ring_ib_execute +ffffffff81bdcc70 T cik_ib_test +ffffffff81bdcf50 T cik_gfx_get_rptr +ffffffff81bdcfa0 T cik_gfx_get_wptr +ffffffff81bdcfe0 T cik_gfx_set_wptr +ffffffff81bdd020 T cik_compute_get_rptr +ffffffff81bdd0f0 T cik_compute_get_wptr +ffffffff81bdd1d0 T cik_compute_set_wptr +ffffffff81bdd250 T cik_gpu_check_soft_reset +ffffffff81bdd3c0 T cik_asic_reset +ffffffff81bdd7d0 t cik_gpu_pci_config_reset +ffffffff81bddff0 T cik_gfx_is_lockup +ffffffff81bde050 T cik_pcie_gart_tlb_flush +ffffffff81bde0a0 T cik_ib_parse +ffffffff81bde0d0 T cik_vm_init +ffffffff81bde130 T cik_vm_fini +ffffffff81bde160 T cik_vm_flush +ffffffff81bdeeb0 T cik_enter_rlc_safe_mode +ffffffff81bdef90 T cik_exit_rlc_safe_mode +ffffffff81bdefd0 T cik_update_cg +ffffffff81bdf4a0 t cik_enable_mgcg +ffffffff81bdf9c0 t cik_enable_cgcg +ffffffff81bdfd30 T cik_init_cp_pg_table +ffffffff81bdfff0 T cik_get_csb_size +ffffffff81be0080 T cik_get_csb_buffer +ffffffff81be0220 T cik_irq_set +ffffffff81be0fc0 t cik_disable_interrupt_state +ffffffff81be1480 T cik_irq_process +ffffffff81be2c20 t cik_irq_ack +ffffffff81be35a0 T cik_resume +ffffffff81be3630 t cik_init_golden_registers +ffffffff81be37f0 t cik_startup +ffffffff81be9540 T cik_suspend +ffffffff81be9920 T cik_init +ffffffff81bea110 t cik_init_microcode +ffffffff81beb120 t cik_pcie_gart_fini +ffffffff81beb220 T cik_fini +ffffffff81beb5c0 T dce8_program_fmt +ffffffff81beb6f0 T dce8_bandwidth_update +ffffffff81bec310 T cik_get_gpu_clock_counter +ffffffff81bec3d0 T cik_set_uvd_clocks +ffffffff81bec440 t cik_set_uvd_clock +ffffffff81bec5b0 T cik_set_vce_clocks +ffffffff81bec7f0 t cik_wait_for_rlc_serdes +ffffffff81bec9c0 t radeon_bo_reserve +ffffffff81becb40 t radeon_bo_unreserve +ffffffff81becc20 t cik_update_gfx_pg +ffffffff81becdc0 t cik_compute_stop +ffffffff81becf30 t cik_cp_compute_fini +ffffffff81bed0d0 t dce8_latency_watermark +ffffffff81bee000 T cik_sdma_get_rptr +ffffffff81bee070 T cik_sdma_get_wptr +ffffffff81bee0c0 T cik_sdma_set_wptr +ffffffff81bee110 T cik_sdma_ring_ib_execute +ffffffff81bee4f0 T cik_sdma_fence_ring_emit +ffffffff81bee6d0 t cik_sdma_hdp_flush_ring_emit +ffffffff81bee910 T cik_sdma_semaphore_ring_emit +ffffffff81beea30 T cik_sdma_enable +ffffffff81beec10 T cik_sdma_resume +ffffffff81bef0e0 T cik_sdma_fini +ffffffff81bef120 T cik_copy_dma +ffffffff81bef4f0 T cik_sdma_ring_test +ffffffff81bef790 T cik_sdma_ib_test +ffffffff81bef9e0 T cik_sdma_is_lockup +ffffffff81befa60 T cik_sdma_vm_copy_pages +ffffffff81befb70 T cik_sdma_vm_write_pages +ffffffff81befce0 T cik_sdma_vm_set_pages +ffffffff81befe50 T cik_sdma_vm_pad_ib +ffffffff81befea0 T cik_dma_vm_flush +ffffffff81bf1000 T cypress_enable_spread_spectrum +ffffffff81bf1130 T cypress_start_dpm +ffffffff81bf1180 T cypress_enable_sclk_control +ffffffff81bf11e0 T cypress_enable_mclk_control +ffffffff81bf1240 T cypress_notify_smc_display_change +ffffffff81bf1280 T cypress_program_response_times +ffffffff81bf1340 T cypress_advertise_gen2_capability +ffffffff81bf1410 T cypress_notify_link_speed_change_after_state_change +ffffffff81bf14d0 T cypress_notify_link_speed_change_before_state_change +ffffffff81bf1580 T cypress_get_strobe_mode_settings +ffffffff81bf1680 T cypress_get_mclk_frequency_ratio +ffffffff81bf1730 T cypress_map_clkf_to_ibias +ffffffff81bf17f0 T cypress_convert_power_level_to_smc +ffffffff81bf1bb0 t cypress_populate_mclk_value +ffffffff81bf1f80 T cypress_upload_sw_state +ffffffff81bf2100 T cypress_upload_mc_reg_table +ffffffff81bf21b0 t cypress_convert_mc_reg_table_to_smc +ffffffff81bf2450 T cypress_calculate_burst_time +ffffffff81bf24d0 T cypress_program_memory_timing_parameters +ffffffff81bf2680 T cypress_populate_smc_initial_state +ffffffff81bf2a10 T cypress_populate_smc_acpi_state +ffffffff81bf2da0 T cypress_construct_voltage_tables +ffffffff81bf2e40 t cypress_trim_voltage_table_to_fit_state_table +ffffffff81bf3030 T cypress_populate_smc_voltage_tables +ffffffff81bf3170 T cypress_get_mvdd_configuration +ffffffff81bf3230 T cypress_populate_mc_reg_table +ffffffff81bf3490 T cypress_get_table_locations +ffffffff81bf3570 T cypress_enable_display_gap +ffffffff81bf35c0 T cypress_dpm_setup_asic +ffffffff81bf36b0 T cypress_dpm_enable +ffffffff81bf4190 t cypress_force_mc_use_s1 +ffffffff81bf4410 t cypress_gfx_clock_gating_enable +ffffffff81bf4720 t cypress_mg_clock_gating_enable +ffffffff81bf49a0 T cypress_dpm_disable +ffffffff81bf4bd0 T cypress_dpm_set_power_state +ffffffff81bf4e80 T cypress_dpm_display_configuration_changed +ffffffff81bf4f60 T cypress_dpm_init +ffffffff81bf51d0 T cypress_dpm_fini +ffffffff81bf5260 T cypress_dpm_vblank_too_short +ffffffff81bf52c0 t cypress_wait_for_mc_sequencer +ffffffff81bf6000 T dce3_2_afmt_hdmi_write_speaker_allocation +ffffffff81bf6070 T dce3_2_afmt_dp_write_speaker_allocation +ffffffff81bf60e0 T dce3_2_afmt_write_sad_regs +ffffffff81bf61f0 T dce3_2_audio_set_dto +ffffffff81bf6330 T dce3_2_hdmi_update_acr +ffffffff81bf6690 T dce3_2_set_audio_packet +ffffffff81bf6820 T dce3_2_set_mute +ffffffff81bf7000 T dce6_endpoint_rreg +ffffffff81bf70d0 T dce6_endpoint_wreg +ffffffff81bf71c0 T dce6_audio_get_pin +ffffffff81bf7330 T dce6_afmt_select_pin +ffffffff81bf73c0 T dce6_afmt_write_latency_fields +ffffffff81bf7470 T dce6_afmt_hdmi_write_speaker_allocation +ffffffff81bf7540 T dce6_afmt_dp_write_speaker_allocation +ffffffff81bf7610 T dce6_afmt_write_sad_regs +ffffffff81bf7750 T dce6_audio_enable +ffffffff81bf7790 T dce6_hdmi_audio_set_dto +ffffffff81bf7800 T dce6_dp_audio_set_dto +ffffffff81bf8000 T eg_cg_rreg +ffffffff81bf8080 t r100_mm_rreg +ffffffff81bf80d0 T eg_cg_wreg +ffffffff81bf8130 T eg_pif_phy0_rreg +ffffffff81bf81b0 T eg_pif_phy0_wreg +ffffffff81bf8210 T eg_pif_phy1_rreg +ffffffff81bf8290 T eg_pif_phy1_wreg +ffffffff81bf82f0 T evergreen_get_allowed_info_register +ffffffff81bf8370 T evergreen_tiling_fields +ffffffff81bf8410 T sumo_set_uvd_clocks +ffffffff81bf84e0 t sumo_set_uvd_clock +ffffffff81bf86a0 T evergreen_set_uvd_clocks +ffffffff81bf8c40 T evergreen_fix_pci_max_read_req_size +ffffffff81bf8df0 T dce4_program_fmt +ffffffff81bf8f00 T dce4_wait_for_vblank +ffffffff81bf9180 T evergreen_page_flip +ffffffff81bf9310 T evergreen_page_flip_pending +ffffffff81bf9380 T evergreen_get_temp +ffffffff81bf9450 T sumo_get_temp +ffffffff81bf9490 T sumo_pm_init_profile +ffffffff81bf95d0 T btc_pm_init_profile +ffffffff81bf96e0 T evergreen_pm_misc +ffffffff81bf9880 T evergreen_pm_prepare +ffffffff81bf9980 T evergreen_pm_finish +ffffffff81bf9a80 T evergreen_hpd_sense +ffffffff81bf9af0 T evergreen_hpd_set_polarity +ffffffff81bf9c30 T evergreen_hpd_init +ffffffff81bf9d00 T evergreen_hpd_fini +ffffffff81bf9da0 T evergreen_get_number_of_dram_channels +ffffffff81bf9de0 T evergreen_bandwidth_update +ffffffff81bf9fa0 t evergreen_line_buffer_adjust +ffffffff81bfa1a0 t evergreen_program_watermarks +ffffffff81bfac50 T evergreen_mc_wait_for_idle +ffffffff81bface0 T evergreen_pcie_gart_tlb_flush +ffffffff81bfadb0 T evergreen_mc_stop +ffffffff81bfb8a0 T evergreen_mc_resume +ffffffff81bfbfb0 T evergreen_mc_program +ffffffff81bfc3c0 T evergreen_ring_ib_execute +ffffffff81bfc850 T evergreen_mc_init +ffffffff81bfc990 T evergreen_print_gpu_status_regs +ffffffff81bfc9c0 T evergreen_is_display_hung +ffffffff81bfcbc0 T evergreen_gpu_check_soft_reset +ffffffff81bfcd20 T evergreen_gpu_pci_config_reset +ffffffff81bfce90 T evergreen_asic_reset +ffffffff81bfd1a0 T evergreen_gfx_is_lockup +ffffffff81bfd200 T sumo_rlc_fini +ffffffff81bfd3c0 t radeon_bo_reserve +ffffffff81bfd540 t radeon_bo_unreserve +ffffffff81bfd620 T sumo_rlc_init +ffffffff81bfde00 T evergreen_rlc_resume +ffffffff81bfe170 T evergreen_get_vblank_counter +ffffffff81bfe1d0 T evergreen_disable_interrupt_state +ffffffff81bfe4a0 T evergreen_irq_set +ffffffff81bfea60 T evergreen_irq_suspend +ffffffff81bfeab0 T evergreen_irq_process +ffffffff81bff5a0 t evergreen_irq_ack +ffffffff81bffca0 T evergreen_resume +ffffffff81bffd80 t evergreen_init_golden_registers +ffffffff81bfff90 t evergreen_startup +ffffffff81c02620 T evergreen_suspend +ffffffff81c027c0 T evergreen_init +ffffffff81c02cd0 T evergreen_fini +ffffffff81c02ec0 T evergreen_pcie_gen2_enable +ffffffff81c030f0 T evergreen_program_aspm +ffffffff81c03790 t evergreen_latency_watermark +ffffffff81c04000 T evergreen_cs_parse +ffffffff81c068b0 T evergreen_dma_cs_parse +ffffffff81c07af0 T evergreen_ib_parse +ffffffff81c07fa0 T evergreen_dma_ib_parse +ffffffff81c08160 t evergreen_cs_track_check +ffffffff81c09180 t evergreen_cs_handle_reg +ffffffff81c0b0c0 t evergreen_surface_value_conv_check +ffffffff81c0b3a0 t evergreen_surface_check +ffffffff81c0b840 t evergreen_cs_track_validate_htile +ffffffff81c0bae0 t evergreen_vm_reg_valid +ffffffff81c0c000 T evergreen_dma_fence_ring_emit +ffffffff81c0c2c0 T evergreen_dma_ring_ib_execute +ffffffff81c0c600 T evergreen_copy_dma +ffffffff81c0c9b0 T evergreen_dma_is_lockup +ffffffff81c0d000 T dce4_audio_enable +ffffffff81c0d080 T evergreen_hdmi_update_acr +ffffffff81c0d290 T dce4_afmt_write_latency_fields +ffffffff81c0d300 T dce4_afmt_hdmi_write_speaker_allocation +ffffffff81c0d370 T dce4_afmt_dp_write_speaker_allocation +ffffffff81c0d3e0 T evergreen_hdmi_write_sad_regs +ffffffff81c0d4f0 T evergreen_set_avi_packet +ffffffff81c0d680 T dce4_hdmi_audio_set_dto +ffffffff81c0d750 T dce4_dp_audio_set_dto +ffffffff81c0d840 T dce4_set_vbi_packet +ffffffff81c0d8a0 T dce4_hdmi_set_color_depth +ffffffff81c0d9f0 T dce4_set_audio_packet +ffffffff81c0dc00 T dce4_set_mute +ffffffff81c0dd00 T evergreen_hdmi_enable +ffffffff81c0e030 T evergreen_dp_enable +ffffffff81c0f000 T kv_dpm_enable_bapm +ffffffff81c0f060 T kv_dpm_enable +ffffffff81c105a0 t kv_enable_didt +ffffffff81c10840 T kv_dpm_late_enable +ffffffff81c10a20 T kv_dpm_powergate_uvd +ffffffff81c10b90 T kv_dpm_disable +ffffffff81c10f00 T kv_dpm_force_performance_level +ffffffff81c11090 t kv_force_dpm_lowest +ffffffff81c11160 T kv_dpm_pre_set_power_state +ffffffff81c116f0 T kv_dpm_set_power_state +ffffffff81c11ea0 t kv_set_valid_clock_range +ffffffff81c12060 t kv_calculate_ds_divider +ffffffff81c121d0 t kv_calculate_nbps_level_settings +ffffffff81c12360 t kv_update_vce_dpm +ffffffff81c12540 T kv_dpm_post_set_power_state +ffffffff81c125e0 T kv_dpm_setup_asic +ffffffff81c12640 T kv_dpm_init +ffffffff81c12ee0 T kv_dpm_debugfs_print_current_performance_level +ffffffff81c12f50 T kv_dpm_get_current_sclk +ffffffff81c12fc0 T kv_dpm_get_current_mclk +ffffffff81c12ff0 T kv_dpm_print_power_state +ffffffff81c13090 T kv_dpm_fini +ffffffff81c13130 T kv_dpm_display_configuration_changed +ffffffff81c13160 T kv_dpm_get_sclk +ffffffff81c131b0 T kv_dpm_get_mclk +ffffffff81c14000 T kv_notify_message_to_smu +ffffffff81c140c0 T kv_dpm_get_enable_mask +ffffffff81c14190 T kv_send_msg_to_smc_with_parameter +ffffffff81c14260 T kv_read_smc_sram_dword +ffffffff81c142e0 T kv_smc_dpm_enable +ffffffff81c14400 T kv_smc_bapm_enable +ffffffff81c14520 T kv_copy_bytes_to_smc +ffffffff81c15000 T tn_smc_rreg +ffffffff81c15080 T tn_smc_wreg +ffffffff81c150e0 T ni_mc_load_microcode +ffffffff81c152d0 T ni_init_microcode +ffffffff81c15810 T cayman_get_allowed_info_register +ffffffff81c158a0 T tn_get_temp +ffffffff81c15930 T cayman_pcie_gart_tlb_flush +ffffffff81c15980 T cayman_cp_int_cntl_setup +ffffffff81c159d0 T cayman_fence_ring_emit +ffffffff81c15d70 T cayman_ring_ib_execute +ffffffff81c161e0 T cayman_gfx_get_rptr +ffffffff81c16270 T cayman_gfx_get_wptr +ffffffff81c162e0 T cayman_gfx_set_wptr +ffffffff81c16360 T cayman_gpu_check_soft_reset +ffffffff81c164e0 T cayman_asic_reset +ffffffff81c167e0 T cayman_gfx_is_lockup +ffffffff81c16840 T cayman_resume +ffffffff81c168d0 t ni_init_golden_registers +ffffffff81c169b0 t cayman_startup +ffffffff81c190e0 T cayman_suspend +ffffffff81c192d0 T cayman_init +ffffffff81c198d0 T cayman_fini +ffffffff81c19b50 T cayman_vm_init +ffffffff81c19bb0 T cayman_vm_fini +ffffffff81c19be0 T cayman_vm_decode_fault +ffffffff81c19c70 T cayman_vm_flush +ffffffff81c1a0f0 T tn_set_vce_clocks +ffffffff81c1b000 T cayman_dma_get_rptr +ffffffff81c1b070 T cayman_dma_get_wptr +ffffffff81c1b0c0 T cayman_dma_set_wptr +ffffffff81c1b110 T cayman_dma_ring_ib_execute +ffffffff81c1b4a0 T cayman_dma_stop +ffffffff81c1b550 T cayman_dma_resume +ffffffff81c1b7a0 T cayman_dma_fini +ffffffff81c1b850 T cayman_dma_is_lockup +ffffffff81c1b8d0 T cayman_dma_vm_copy_pages +ffffffff81c1b9c0 T cayman_dma_vm_write_pages +ffffffff81c1bb20 T cayman_dma_vm_set_pages +ffffffff81c1bc80 T cayman_dma_vm_pad_ib +ffffffff81c1bcd0 T cayman_dma_vm_flush +ffffffff81c1d000 T ni_get_pi +ffffffff81c1d030 T ni_get_ps +ffffffff81c1d060 T ni_dpm_vblank_too_short +ffffffff81c1d0c0 T ni_dpm_force_performance_level +ffffffff81c1d200 T ni_copy_and_switch_arb_sets +ffffffff81c1d4d0 T ni_set_uvd_clock_before_set_eng_clock +ffffffff81c1d550 T ni_set_uvd_clock_after_set_eng_clock +ffffffff81c1d5d0 T ni_dpm_setup_asic +ffffffff81c1d7e0 T ni_update_current_ps +ffffffff81c1d890 T ni_update_requested_ps +ffffffff81c1d940 T ni_dpm_enable +ffffffff81c20b80 t ni_populate_smc_tdp_limits +ffffffff81c20d40 T ni_dpm_disable +ffffffff81c21100 T ni_dpm_pre_set_power_state +ffffffff81c216e0 T ni_dpm_set_power_state +ffffffff81c227f0 T ni_dpm_post_set_power_state +ffffffff81c228c0 T ni_dpm_init +ffffffff81c23290 T ni_dpm_fini +ffffffff81c23340 T ni_dpm_print_power_state +ffffffff81c23410 T ni_dpm_debugfs_print_current_performance_level +ffffffff81c23450 T ni_dpm_get_current_sclk +ffffffff81c234b0 T ni_dpm_get_current_mclk +ffffffff81c23510 T ni_dpm_get_sclk +ffffffff81c23570 T ni_dpm_get_mclk +ffffffff81c235d0 t ni_do_program_memory_timing_parameters +ffffffff81c23700 t ni_calculate_sclk_params +ffffffff81c23920 t ni_calculate_power_boost_limit +ffffffff81c23ad0 t ni_populate_mclk_value +ffffffff81c24000 T r100_wait_for_vblank +ffffffff81c241a0 T r100_page_flip +ffffffff81c24450 T r100_page_flip_pending +ffffffff81c24500 T r100_pm_get_dynpm_state +ffffffff81c24720 T r100_pm_init_profile +ffffffff81c24800 T r100_pm_misc +ffffffff81c24c30 T r100_pm_prepare +ffffffff81c24ce0 T r100_pm_finish +ffffffff81c24d90 T r100_gui_idle +ffffffff81c24dd0 T r100_hpd_sense +ffffffff81c24e30 T r100_hpd_set_polarity +ffffffff81c24ee0 T r100_hpd_init +ffffffff81c24f70 T r100_hpd_fini +ffffffff81c24fd0 T r100_pci_gart_tlb_flush +ffffffff81c25000 T r100_pci_gart_init +ffffffff81c250d0 T r100_pci_gart_get_page_entry +ffffffff81c25100 T r100_pci_gart_set_page +ffffffff81c25130 T r100_pci_gart_enable +ffffffff81c25210 T r100_pci_gart_disable +ffffffff81c25280 T r100_pci_gart_fini +ffffffff81c252f0 T r100_irq_set +ffffffff81c253c0 T r100_irq_disable +ffffffff81c25430 T r100_irq_process +ffffffff81c25730 T r100_get_vblank_counter +ffffffff81c25780 T r100_fence_ring_emit +ffffffff81c25bf0 T r100_semaphore_ring_emit +ffffffff81c25c20 T r100_copy_blit +ffffffff81c262b0 T r100_ring_start +ffffffff81c263a0 T r100_gfx_get_rptr +ffffffff81c263f0 T r100_gfx_get_wptr +ffffffff81c26430 T r100_gfx_set_wptr +ffffffff81c26470 T r100_cp_init +ffffffff81c269a0 T r100_debugfs_cp_init +ffffffff81c269d0 T r100_cp_fini +ffffffff81c26a70 T r100_cp_disable +ffffffff81c26bb0 T r100_gui_wait_for_idle +ffffffff81c26ca0 T r100_reloc_pitch_offset +ffffffff81c26dd0 T r100_packet3_load_vbpntr +ffffffff81c27070 T r100_cs_parse_packet0 +ffffffff81c27180 T r100_cs_packet_parse_vline +ffffffff81c27370 T r100_cs_track_check_pkt3_indx_buffer +ffffffff81c273e0 T r100_cs_parse +ffffffff81c288a0 T r100_cs_track_clear +ffffffff81c28c30 T r100_cs_track_check +ffffffff81c29610 T r100_mc_wait_for_idle +ffffffff81c296a0 T r100_gpu_is_lockup +ffffffff81c29700 T r100_enable_bm +ffffffff81c29740 T r100_bm_disable +ffffffff81c297e0 T r100_asic_reset +ffffffff81c29b10 T r100_mc_stop +ffffffff81c29cc0 T r100_mc_resume +ffffffff81c29d70 T r100_set_common_regs +ffffffff81c29f20 T r100_vram_init_sizes +ffffffff81c2a100 T r100_vga_set_state +ffffffff81c2a160 T r100_pll_errata_after_index +ffffffff81c2a1a0 T r100_pll_rreg +ffffffff81c2a2c0 T r100_pll_wreg +ffffffff81c2a3d0 T r100_debugfs_rbbm_init +ffffffff81c2a400 T r100_debugfs_mc_info_init +ffffffff81c2a430 T r100_set_surface_reg +ffffffff81c2a640 T r100_clear_surface_reg +ffffffff81c2a6f0 T r100_bandwidth_update +ffffffff81c2b190 T r100_ring_test +ffffffff81c2b440 T r100_ring_ib_execute +ffffffff81c2b6a0 T r100_ib_test +ffffffff81c2b9e0 T r100_vga_render_disable +ffffffff81c2ba40 T r100_resume +ffffffff81c2bc30 t r100_startup +ffffffff81c2c160 T r100_suspend +ffffffff81c2c240 T r100_fini +ffffffff81c2c340 T r100_restore_sanity +ffffffff81c2c3e0 T r100_init +ffffffff81c2c950 T r100_mm_rreg_slow +ffffffff81c2c9c0 T r100_mm_wreg_slow +ffffffff81c2ca20 T r100_io_rreg +ffffffff81c2cac0 T r100_io_wreg +ffffffff81c2cb30 t r100_cs_track_texture_print +ffffffff81c2d000 T r200_copy_dma +ffffffff81c2d460 T r200_packet0_check +ffffffff81c2e470 T r200_set_safe_registers +ffffffff81c2f000 T rv370_pcie_rreg +ffffffff81c2f080 T rv370_pcie_wreg +ffffffff81c2f0e0 T rv370_pcie_gart_tlb_flush +ffffffff81c2f2d0 T rv370_pcie_gart_get_page_entry +ffffffff81c2f330 T rv370_pcie_gart_set_page +ffffffff81c2f370 T rv370_pcie_gart_init +ffffffff81c2f440 T rv370_pcie_gart_enable +ffffffff81c2f7a0 T rv370_pcie_gart_disable +ffffffff81c2f920 T rv370_pcie_gart_fini +ffffffff81c2f950 T r300_fence_ring_emit +ffffffff81c2fee0 T r300_ring_start +ffffffff81c308f0 T r300_mc_wait_for_idle +ffffffff81c30980 T r300_asic_reset +ffffffff81c30b90 T r300_mc_init +ffffffff81c30c40 T rv370_set_pcie_lanes +ffffffff81c30e00 T rv370_get_pcie_lanes +ffffffff81c30eb0 T r300_cs_parse +ffffffff81c31210 t r300_packet0_check +ffffffff81c32070 T r300_set_reg_safe +ffffffff81c320b0 T r300_mc_program +ffffffff81c32230 T r300_clock_startup +ffffffff81c322b0 T r300_resume +ffffffff81c32480 t r300_startup +ffffffff81c327e0 T r300_suspend +ffffffff81c32860 T r300_fini +ffffffff81c32940 T r300_init +ffffffff81c33000 T r420_pm_init_profile +ffffffff81c330e0 T r420_pipes_init +ffffffff81c332c0 T r420_mc_rreg +ffffffff81c33340 T r420_mc_wreg +ffffffff81c333b0 T r420_resume +ffffffff81c33580 t r420_startup +ffffffff81c33920 T r420_suspend +ffffffff81c33ac0 T r420_fini +ffffffff81c33ba0 T r420_init +ffffffff81c33e20 T r420_debugfs_pipes_info_init +ffffffff81c34000 T r520_mc_wait_for_idle +ffffffff81c34090 T r520_resume +ffffffff81c34180 t r520_startup +ffffffff81c34570 T r520_init +ffffffff81c35000 T r600_rcu_rreg +ffffffff81c35080 T r600_rcu_wreg +ffffffff81c350f0 T r600_uvd_ctx_rreg +ffffffff81c35170 T r600_uvd_ctx_wreg +ffffffff81c351e0 T r600_get_allowed_info_register +ffffffff81c35250 T r600_get_xclk +ffffffff81c35280 T r600_set_uvd_clocks +ffffffff81c357e0 T dce3_program_fmt +ffffffff81c358f0 T rv6xx_get_temp +ffffffff81c35940 T r600_pm_get_dynpm_state +ffffffff81c35d40 T rs780_pm_init_profile +ffffffff81c35e40 T r600_pm_init_profile +ffffffff81c360d0 T r600_pm_misc +ffffffff81c361a0 T r600_gui_idle +ffffffff81c361e0 T r600_hpd_sense +ffffffff81c36300 T r600_hpd_set_polarity +ffffffff81c36570 T r600_hpd_init +ffffffff81c36780 T r600_hpd_fini +ffffffff81c36930 T r600_pcie_gart_tlb_flush +ffffffff81c36a70 T r600_pcie_gart_init +ffffffff81c36b10 T r600_mc_wait_for_idle +ffffffff81c36ba0 T rs780_mc_rreg +ffffffff81c36c30 T rs780_mc_wreg +ffffffff81c36cb0 T r600_vram_scratch_init +ffffffff81c36db0 t radeon_bo_reserve +ffffffff81c36f30 t radeon_bo_unreserve +ffffffff81c37010 T r600_vram_scratch_fini +ffffffff81c37080 T r600_set_bios_scratch_engine_hung +ffffffff81c370d0 T r600_gpu_check_soft_reset +ffffffff81c37450 T r600_asic_reset +ffffffff81c377e0 t r600_gpu_pci_config_reset +ffffffff81c37a00 T r600_gfx_is_lockup +ffffffff81c37a60 T r6xx_remap_render_backend +ffffffff81c37c40 T r600_count_pipe_bits +ffffffff81c37cb0 T r600_pciep_rreg +ffffffff81c37d30 T r600_pciep_wreg +ffffffff81c37d90 T r600_cp_stop +ffffffff81c37e10 T r600_init_microcode +ffffffff81c382e0 T r600_gfx_get_rptr +ffffffff81c38330 T r600_gfx_get_wptr +ffffffff81c38370 T r600_gfx_set_wptr +ffffffff81c383b0 T r600_cp_start +ffffffff81c38730 T r600_cp_resume +ffffffff81c38a90 T r600_ring_init +ffffffff81c38b30 T r600_cp_fini +ffffffff81c38bb0 T r600_scratch_init +ffffffff81c38c20 T r600_ring_test +ffffffff81c38ec0 T r600_fence_ring_emit +ffffffff81c39780 T r600_semaphore_ring_emit +ffffffff81c39970 T r600_copy_cpdma +ffffffff81c39f20 T r600_set_surface_reg +ffffffff81c39f50 T r600_clear_surface_reg +ffffffff81c39f80 T r600_vga_set_state +ffffffff81c39fe0 T r600_resume +ffffffff81c3a070 t r600_startup +ffffffff81c3c080 T r600_suspend +ffffffff81c3c1e0 T r600_irq_suspend +ffffffff81c3c2a0 t r600_pcie_gart_disable +ffffffff81c3c4a0 T r600_init +ffffffff81c3cc90 T r600_ih_ring_init +ffffffff81c3cd00 T r600_irq_fini +ffffffff81c3ce30 T r600_fini +ffffffff81c3cfc0 T r600_ring_ib_execute +ffffffff81c3d440 T r600_ib_test +ffffffff81c3d6f0 T r600_ih_ring_alloc +ffffffff81c3d810 T r600_ih_ring_fini +ffffffff81c3d8a0 T r600_rlc_stop +ffffffff81c3da20 T r600_disable_interrupts +ffffffff81c3dad0 T r600_irq_init +ffffffff81c3df30 t r600_disable_interrupt_state +ffffffff81c3e220 T r600_irq_disable +ffffffff81c3e2e0 T r600_irq_set +ffffffff81c3ea50 t r600_irq_ack +ffffffff81c3ef40 T r600_irq_process +ffffffff81c3fb30 T r600_mmio_hdp_flush +ffffffff81c3fba0 T r600_set_pcie_lanes +ffffffff81c3fcd0 T r600_get_pcie_lanes +ffffffff81c3fda0 T r600_get_gpu_clock_counter +ffffffff81c40000 T r600_fmt_is_valid_color +ffffffff81c40040 T r600_fmt_is_valid_texture +ffffffff81c40090 T r600_fmt_get_blocksize +ffffffff81c400d0 T r600_fmt_get_nblocksx +ffffffff81c40120 T r600_fmt_get_nblocksy +ffffffff81c40170 T r600_cs_common_vline_parse +ffffffff81c40430 T r600_mip_minify +ffffffff81c40490 T r600_cs_parse +ffffffff81c42420 T r600_dma_cs_next_reloc +ffffffff81c424a0 T r600_dma_cs_parse +ffffffff81c42bd0 t r600_cs_track_check +ffffffff81c43d10 t r600_cs_check_reg +ffffffff81c45000 T r600_dma_get_rptr +ffffffff81c45060 T r600_dma_get_wptr +ffffffff81c450a0 T r600_dma_set_wptr +ffffffff81c450e0 T r600_dma_stop +ffffffff81c45170 T r600_dma_resume +ffffffff81c45370 T r600_dma_fini +ffffffff81c453e0 T r600_dma_is_lockup +ffffffff81c45440 T r600_dma_ring_test +ffffffff81c456a0 T r600_dma_fence_ring_emit +ffffffff81c45890 T r600_dma_semaphore_ring_emit +ffffffff81c459b0 T r600_dma_ib_test +ffffffff81c45bc0 T r600_dma_ring_ib_execute +ffffffff81c45f00 T r600_copy_dma +ffffffff81c47000 T r600_dpm_print_class_info +ffffffff81c472b0 T r600_dpm_print_cap_info +ffffffff81c47330 T r600_dpm_print_ps_status +ffffffff81c473c0 T r600_dpm_get_vblank_time +ffffffff81c47480 T r600_dpm_get_vrefresh +ffffffff81c47510 T r600_calculate_u_and_p +ffffffff81c47580 T r600_calculate_at +ffffffff81c47630 T r600_gfx_clockgating_enable +ffffffff81c47740 T r600_dynamicpm_enable +ffffffff81c477a0 T r600_enable_thermal_protection +ffffffff81c47800 T r600_enable_acpi_pm +ffffffff81c47850 T r600_enable_dynamic_pcie_gen2 +ffffffff81c478b0 T r600_dynamicpm_enabled +ffffffff81c478f0 T r600_enable_sclk_control +ffffffff81c47950 T r600_enable_mclk_control +ffffffff81c479b0 T r600_enable_spll_bypass +ffffffff81c47a10 T r600_wait_for_spll_change +ffffffff81c47a90 T r600_set_bsp +ffffffff81c47ad0 T r600_set_at +ffffffff81c47b30 T r600_set_tc +ffffffff81c47b90 T r600_select_td +ffffffff81c47c50 T r600_set_vrc +ffffffff81c47c90 T r600_set_tpu +ffffffff81c47ce0 T r600_set_tpc +ffffffff81c47d30 T r600_set_sstu +ffffffff81c47d80 T r600_set_sst +ffffffff81c47dd0 T r600_set_git +ffffffff81c47e20 T r600_set_fctu +ffffffff81c47e70 T r600_set_fct +ffffffff81c47ec0 T r600_set_ctxcgtt3d_rphc +ffffffff81c47f10 T r600_set_ctxcgtt3d_rsdc +ffffffff81c47f70 T r600_set_vddc3d_oorsu +ffffffff81c47fc0 T r600_set_vddc3d_oorphc +ffffffff81c48010 T r600_set_vddc3d_oorsdc +ffffffff81c48070 T r600_set_mpll_lock_time +ffffffff81c480c0 T r600_set_mpll_reset_time +ffffffff81c48110 T r600_engine_clock_entry_enable +ffffffff81c48210 T r600_engine_clock_entry_enable_pulse_skipping +ffffffff81c48310 T r600_engine_clock_entry_enable_post_divider +ffffffff81c48410 T r600_engine_clock_entry_set_post_divider +ffffffff81c484d0 T r600_engine_clock_entry_set_reference_divider +ffffffff81c48590 T r600_engine_clock_entry_set_feedback_divider +ffffffff81c48650 T r600_engine_clock_entry_set_step_time +ffffffff81c48710 T r600_vid_rt_set_ssu +ffffffff81c48760 T r600_vid_rt_set_vru +ffffffff81c487b0 T r600_vid_rt_set_vrt +ffffffff81c48800 T r600_voltage_control_enable_pins +ffffffff81c48850 T r600_voltage_control_program_voltages +ffffffff81c488e0 T r600_voltage_control_deactivate_static_control +ffffffff81c48970 T r600_power_level_enable +ffffffff81c489e0 T r600_power_level_set_voltage_index +ffffffff81c48a40 T r600_power_level_set_mem_clock_index +ffffffff81c48aa0 T r600_power_level_set_eng_clock_index +ffffffff81c48b10 T r600_power_level_set_watermark_id +ffffffff81c48b80 T r600_power_level_set_pcie_gen2 +ffffffff81c48be0 T r600_power_level_get_current_index +ffffffff81c48c20 T r600_power_level_get_target_index +ffffffff81c48c60 T r600_power_level_set_enter_index +ffffffff81c48cb0 T r600_wait_for_power_level_unequal +ffffffff81c48d90 T r600_wait_for_power_level +ffffffff81c48e70 T r600_start_dpm +ffffffff81c49150 T r600_stop_dpm +ffffffff81c491a0 T r600_dpm_pre_set_power_state +ffffffff81c491d0 T r600_dpm_post_set_power_state +ffffffff81c49200 T r600_is_uvd_state +ffffffff81c49230 T r600_is_internal_thermal_sensor +ffffffff81c49270 T r600_dpm_late_enable +ffffffff81c49380 T r600_get_platform_caps +ffffffff81c49420 T r600_parse_extended_power_table +ffffffff81c4a390 T r600_free_extended_power_table +ffffffff81c4a490 T r600_get_pcie_gen_support +ffffffff81c4a4e0 T r600_get_pcie_lane_support +ffffffff81c4a540 T r600_encode_pci_lane_width +ffffffff81c4b000 T r600_audio_update_hdmi +ffffffff81c4b170 t r600_audio_status +ffffffff81c4b290 T r600_hdmi_buffer_status_changed +ffffffff81c4b330 T r600_hdmi_update_audio_settings +ffffffff81c4b700 T r600_audio_enable +ffffffff81c4b780 T r600_audio_get_pin +ffffffff81c4b7b0 T r600_hdmi_update_acr +ffffffff81c4bb50 T r600_set_avi_packet +ffffffff81c4bd40 T r600_hdmi_audio_workaround +ffffffff81c4be00 T r600_hdmi_audio_set_dto +ffffffff81c4bec0 T r600_set_vbi_packet +ffffffff81c4bf70 T r600_set_audio_packet +ffffffff81c4c240 T r600_set_mute +ffffffff81c4c340 T r600_hdmi_enable +ffffffff81c4d000 T radeon_acpi_is_pcie_performance_request_supported +ffffffff81c4d040 T radeon_acpi_pcie_notify_device_ready +ffffffff81c4d170 T radeon_acpi_pcie_performance_request +ffffffff81c4d390 T radeon_acpi_init +ffffffff81c4dae0 t radeon_acpi_event +ffffffff81c4de30 T radeon_acpi_fini +ffffffff81c4e000 T radeon_agp_head_init +ffffffff81c4e050 T radeon_agp_init +ffffffff81c4e0a0 T radeon_agp_resume +ffffffff81c4e140 T radeon_agp_fini +ffffffff81c4e190 T radeon_agp_suspend +ffffffff81c4f000 T radeon_agp_disable +ffffffff81c4f110 T radeon_asic_init +ffffffff81c4f9a0 t radeon_invalid_rreg +ffffffff81c4f9e0 t radeon_invalid_wreg +ffffffff81c4fa20 t radeon_invalid_get_allowed_info_register +ffffffff81c50000 T radeon_atombios_i2c_init +ffffffff81c503a0 T radeon_atombios_lookup_gpio +ffffffff81c504a0 T radeon_get_atom_connector_info_from_object_table +ffffffff81c50e00 t radeon_lookup_i2c_gpio +ffffffff81c51100 t radeon_atom_apply_quirks +ffffffff81c51530 T radeon_get_atom_connector_info_from_supported_devices_table +ffffffff81c51a30 T radeon_atom_get_clock_info +ffffffff81c51db0 T radeon_atombios_sideport_present +ffffffff81c51e60 T radeon_atombios_get_tmds_info +ffffffff81c51fa0 T radeon_atombios_get_ppll_ss_info +ffffffff81c520c0 T radeon_atombios_get_asic_ss_info +ffffffff81c52430 T radeon_atombios_get_lvds_info +ffffffff81c52790 T radeon_atombios_get_primary_dac_info +ffffffff81c52840 T radeon_atom_get_tv_timings +ffffffff81c52a80 T radeon_atombios_get_tv_info +ffffffff81c52b30 T radeon_atombios_get_tv_dac_info +ffffffff81c52c30 T radeon_atombios_get_default_voltages +ffffffff81c52cf0 T radeon_atombios_get_power_modes +ffffffff81c53dc0 T radeon_atom_get_clock_dividers +ffffffff81c540b0 T radeon_atom_get_memory_pll_dividers +ffffffff81c541f0 T radeon_atom_set_clock_gating +ffffffff81c54240 T radeon_atom_get_engine_clock +ffffffff81c54290 T radeon_atom_get_memory_clock +ffffffff81c542e0 T radeon_atom_set_engine_clock +ffffffff81c54330 T radeon_atom_set_memory_clock +ffffffff81c54380 T radeon_atom_set_engine_dram_timings +ffffffff81c543f0 T radeon_atom_update_memory_dll +ffffffff81c54440 T radeon_atom_set_ac_timing +ffffffff81c54490 T radeon_atom_set_voltage +ffffffff81c54560 T radeon_atom_get_max_vddc +ffffffff81c54630 T radeon_atom_get_leakage_vddc_based_on_leakage_idx +ffffffff81c54700 T radeon_atom_get_leakage_id_from_vbios +ffffffff81c547c0 T radeon_atom_get_leakage_vddc_based_on_leakage_params +ffffffff81c549d0 T radeon_atom_get_voltage_evv +ffffffff81c54a80 T radeon_atom_get_voltage_gpio_settings +ffffffff81c54b80 T radeon_atom_is_voltage_gpio +ffffffff81c54d10 T radeon_atom_get_svi2_info +ffffffff81c54df0 T radeon_atom_get_max_voltage +ffffffff81c54f80 T radeon_atom_get_min_voltage +ffffffff81c550c0 T radeon_atom_get_voltage_step +ffffffff81c551b0 T radeon_atom_round_to_true_voltage +ffffffff81c55320 T radeon_atom_get_voltage_table +ffffffff81c55590 T radeon_atom_get_memory_info +ffffffff81c55740 T radeon_atom_get_mclk_range_table +ffffffff81c55990 T radeon_atom_init_mc_reg_table +ffffffff81c55c00 T radeon_atom_initialize_bios_scratch_regs +ffffffff81c55cd0 T radeon_save_bios_scratch_regs +ffffffff81c55db0 T radeon_restore_bios_scratch_regs +ffffffff81c55e90 T radeon_atom_output_lock +ffffffff81c55f20 T radeon_atombios_connected_scratch_regs +ffffffff81c566a0 T radeon_atombios_encoder_crtc_scratch_regs +ffffffff81c567e0 T radeon_atombios_encoder_dpms_scratch_regs +ffffffff81c569f0 t radeon_atombios_parse_misc_flags_1_3 +ffffffff81c56be0 t radeon_atombios_add_pplib_thermal_controller +ffffffff81c56fe0 t radeon_atombios_parse_pplib_clock_info +ffffffff81c572f0 t radeon_atombios_parse_pplib_non_clock_info +ffffffff81c58000 T radeon_audio_init +ffffffff81c58280 T radeon_audio_endpoint_rreg +ffffffff81c582c0 T radeon_audio_endpoint_wreg +ffffffff81c58300 T radeon_audio_get_pin +ffffffff81c58350 T radeon_audio_detect +ffffffff81c58680 T radeon_audio_fini +ffffffff81c587b0 T radeon_audio_mode_set +ffffffff81c587f0 T radeon_audio_dpms +ffffffff81c58840 T radeon_audio_decode_dfs_div +ffffffff81c588a0 t radeon_audio_hdmi_mode_set +ffffffff81c58fd0 t radeon_audio_write_speaker_allocation +ffffffff81c59080 t radeon_audio_write_sad_regs +ffffffff81c59150 t radeon_audio_set_avi_packet +ffffffff81c59290 t radeon_audio_dp_mode_set +ffffffff81c59410 t radeon_audio_rreg +ffffffff81c59460 t radeon_audio_wreg +ffffffff81c5a000 T radeon_benchmark +ffffffff81c5a940 t radeon_benchmark_move +ffffffff81c5ae00 t radeon_bo_reserve +ffffffff81c5af80 t radeon_bo_unreserve +ffffffff81c5c000 T radeon_get_bios +ffffffff81c5d000 t igp_read_bios_from_vram +ffffffff81c5d110 t radeon_read_bios +ffffffff81c5e000 T radeon_legacy_get_engine_clock +ffffffff81c5e0d0 T radeon_legacy_get_memory_clock +ffffffff81c5e1a0 T radeon_get_clock_info +ffffffff81c5e720 T radeon_legacy_set_engine_clock +ffffffff81c5ea70 T radeon_legacy_set_clock_gating +ffffffff81c60000 T radeon_combios_check_hardcoded_edid +ffffffff81c60100 T radeon_bios_get_hardcoded_edid +ffffffff81c60180 T radeon_combios_i2c_init +ffffffff81c60940 t combios_setup_i2c_bus +ffffffff81c60c40 T radeon_combios_get_clock_info +ffffffff81c60e30 T radeon_combios_sideport_present +ffffffff81c60eb0 T radeon_combios_get_primary_dac_info +ffffffff81c60ff0 T radeon_combios_get_tv_info +ffffffff81c610f0 T radeon_combios_get_tv_dac_info +ffffffff81c61390 T radeon_combios_get_lvds_info +ffffffff81c619e0 T radeon_legacy_get_tmds_info_from_table +ffffffff81c61ab0 T radeon_legacy_get_tmds_info_from_combios +ffffffff81c61cb0 T radeon_legacy_get_ext_tmds_info_from_table +ffffffff81c61ef0 T radeon_legacy_get_ext_tmds_info_from_combios +ffffffff81c62280 T radeon_get_legacy_connector_info_from_table +ffffffff81c64640 T radeon_get_legacy_connector_info_from_bios +ffffffff81c653d0 T radeon_combios_get_power_modes +ffffffff81c65c80 T radeon_external_tmds_setup +ffffffff81c65d40 T radeon_combios_external_tmds_setup +ffffffff81c662f0 T radeon_combios_asic_init +ffffffff81c66910 t combios_parse_mmio_table +ffffffff81c66b30 t combios_parse_pll_table +ffffffff81c66e00 T radeon_combios_initialize_bios_scratch_regs +ffffffff81c66e90 T radeon_combios_output_lock +ffffffff81c66ee0 T radeon_combios_connected_scratch_regs +ffffffff81c67240 T radeon_combios_encoder_crtc_scratch_regs +ffffffff81c67310 T radeon_combios_encoder_dpms_scratch_regs +ffffffff81c68000 T radeon_connector_hotplug +ffffffff81c68100 T radeon_get_monitor_bpc +ffffffff81c68530 T radeon_connector_edid +ffffffff81c685e0 T radeon_connector_encoder_get_dp_bridge_encoder_id +ffffffff81c68650 T radeon_connector_is_dp12_capable +ffffffff81c686f0 T radeon_add_atom_connector +ffffffff81c69540 T radeon_add_legacy_connector +ffffffff81c69a80 t radeon_dp_detect +ffffffff81c69e40 t radeon_dvi_force +ffffffff81c69e80 t radeon_connector_set_property +ffffffff81c6a6c0 t radeon_connector_unregister +ffffffff81c6a720 t radeon_connector_destroy +ffffffff81c6a790 t radeon_best_single_encoder +ffffffff81c6a810 t radeon_connector_get_edid +ffffffff81c6a970 t radeon_dp_get_modes +ffffffff81c6aca0 t radeon_dp_mode_valid +ffffffff81c6ae60 t radeon_dvi_encoder +ffffffff81c6af30 t radeon_fixup_lvds_native_mode +ffffffff81c6b060 t radeon_add_common_modes +ffffffff81c6b150 t radeon_fp_native_mode +ffffffff81c6b220 t radeon_lvds_set_property +ffffffff81c6b310 t radeon_vga_detect +ffffffff81c6b5c0 t radeon_connector_analog_encoder_conflict_solve +ffffffff81c6b7e0 t radeon_vga_get_modes +ffffffff81c6b8d0 t radeon_vga_mode_valid +ffffffff81c6b930 t radeon_dvi_detect +ffffffff81c6bfd0 t radeon_dvi_mode_valid +ffffffff81c6c160 t radeon_tv_detect +ffffffff81c6c3a0 t radeon_tv_get_modes +ffffffff81c6c470 t radeon_tv_mode_valid +ffffffff81c6c4c0 t radeon_lvds_detect +ffffffff81c6c660 t radeon_lvds_get_modes +ffffffff81c6c7c0 t radeon_lvds_mode_valid +ffffffff81c6d000 T radeon_cs_parser_init +ffffffff81c6d480 T radeon_cs_ioctl +ffffffff81c6dfb0 t radeon_cs_parser_fini +ffffffff81c6e140 T radeon_cs_packet_parse +ffffffff81c6e2f0 T radeon_cs_packet_next_is_pkt3_nop +ffffffff81c6e340 T radeon_cs_dump_packet +ffffffff81c6e3c0 T radeon_cs_packet_next_reloc +ffffffff81c6e590 t cmp_size_smaller_first +ffffffff81c6f000 T radeon_crtc_cursor_move +ffffffff81c6f070 t radeon_lock_cursor +ffffffff81c6f230 t radeon_cursor_move_locked +ffffffff81c6f780 T radeon_crtc_cursor_set2 +ffffffff81c6fa00 t radeon_hide_cursor +ffffffff81c6fac0 t radeon_bo_reserve +ffffffff81c6fc40 t radeon_bo_unreserve +ffffffff81c6fd20 t radeon_show_cursor +ffffffff81c6ff70 T radeon_cursor_reset +ffffffff81c70000 T radeon_is_px +ffffffff81c70040 T radeon_program_register_sequence +ffffffff81c70170 T radeon_pci_config_reset +ffffffff81c701a0 T radeon_surface_init +ffffffff81c70360 T radeon_scratch_init +ffffffff81c703e0 T radeon_scratch_get +ffffffff81c70460 T radeon_scratch_free +ffffffff81c704b0 T radeon_doorbell_get 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radeon_combios_fini +ffffffff81c716a0 T radeon_device_init +ffffffff81c72180 T radeon_device_fini +ffffffff81c72280 T radeon_suspend_kms +ffffffff81c725f0 T radeon_resume_kms +ffffffff81c72840 T radeon_gpu_reset +ffffffff81c73000 T radeon_crtc_load_lut +ffffffff81c73dc0 T radeon_crtc_handle_vblank +ffffffff81c73f30 T radeon_get_crtc_scanoutpos +ffffffff81c74560 T radeon_crtc_handle_flip +ffffffff81c74690 T radeon_compute_pll_avivo +ffffffff81c74bd0 T radeon_compute_pll_legacy +ffffffff81c75250 T radeon_framebuffer_init +ffffffff81c752c0 T radeon_update_display_priority +ffffffff81c75320 T radeon_modeset_init +ffffffff81c75e40 T radeon_modeset_fini +ffffffff81c75f90 T radeon_crtc_scaling_mode_fixup +ffffffff81c762e0 T radeon_get_crtc_scanout_position +ffffffff81c76340 t radeon_user_framebuffer_create +ffffffff81c764e0 t radeon_crtc_gamma_set +ffffffff81c76520 t radeon_crtc_destroy +ffffffff81c76560 t radeon_crtc_set_config +ffffffff81c76620 t radeon_crtc_page_flip_target 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radeon_get_connector_for_encoder +ffffffff81c7a4b0 T radeon_get_connector_for_encoder_init +ffffffff81c7a530 T radeon_get_external_encoder +ffffffff81c7a5b0 T radeon_encoder_get_dp_bridge_encoder_id +ffffffff81c7a640 T radeon_panel_mode_fixup +ffffffff81c7a800 T radeon_dig_monitor_is_duallink +ffffffff81c7a920 T radeon_encoder_is_digital +ffffffff81c7b000 T radeon_align_pitch +ffffffff81c7b080 T radeon_fbdev_init +ffffffff81c7b1d0 T radeondrm_burner_cb +ffffffff81c7b1f0 T radeon_fbdev_fini +ffffffff81c7b260 T radeon_fbdev_set_suspend +ffffffff81c7b2a0 T radeon_fbdev_robj_is_fb +ffffffff81c7b2f0 T radeondrm_burner +ffffffff81c7b370 t radeonfb_create +ffffffff81c7b770 t radeon_bo_reserve +ffffffff81c7b8f0 t radeon_bo_unreserve +ffffffff81c7c000 T radeon_fence_emit +ffffffff81c7c120 T radeon_fence_process +ffffffff81c7c1f0 t radeon_fence_activity +ffffffff81c7c390 T radeon_fence_signaled +ffffffff81c7c420 T radeon_fence_wait_timeout +ffffffff81c7c560 t radeon_fence_wait_seq_timeout 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radeon_gem_object_mmap +ffffffff81c80630 T radeon_gem_info_ioctl +ffffffff81c806a0 T radeon_gem_pread_ioctl +ffffffff81c806f0 T radeon_gem_pwrite_ioctl +ffffffff81c80740 T radeon_gem_create_ioctl +ffffffff81c80860 T radeon_gem_userptr_ioctl +ffffffff81c80890 T radeon_gem_set_domain_ioctl +ffffffff81c809f0 T radeon_mode_dumb_mmap +ffffffff81c80aa0 T radeon_gem_mmap_ioctl +ffffffff81c80b50 T radeon_gem_busy_ioctl +ffffffff81c80c00 T radeon_gem_wait_idle_ioctl +ffffffff81c80d10 T radeon_gem_set_tiling_ioctl +ffffffff81c80dc0 T radeon_gem_get_tiling_ioctl +ffffffff81c80e90 t radeon_bo_reserve +ffffffff81c810a0 t radeon_bo_unreserve +ffffffff81c81180 T radeon_gem_va_ioctl +ffffffff81c81540 T radeon_gem_op_ioctl +ffffffff81c81630 T radeon_mode_dumb_create +ffffffff81c81730 T radeon_gem_debugfs_init +ffffffff81c82000 T radeon_ddc_probe +ffffffff81c820c0 T radeon_router_select_ddc_port +ffffffff81c82320 T radeon_bb_set_bits +ffffffff81c82490 T radeon_bb_set_dir +ffffffff81c824c0 T radeon_bb_read_bits +ffffffff81c82590 T radeon_acquire_bus +ffffffff81c829e0 T radeon_release_bus +ffffffff81c82b50 T radeon_send_start +ffffffff81c82b70 T radeon_send_stop +ffffffff81c82b90 T radeon_initiate_xfer +ffffffff81c82bb0 T radeon_read_byte +ffffffff81c82bd0 T radeon_write_byte +ffffffff81c82bf0 T radeon_i2c_create +ffffffff81c82df0 T radeon_i2c_destroy +ffffffff81c82e70 T radeon_i2c_init +ffffffff81c82ec0 T radeon_i2c_fini +ffffffff81c82f70 T radeon_i2c_add +ffffffff81c83120 T radeon_i2c_lookup +ffffffff81c832e0 T radeon_i2c_get_byte +ffffffff81c833a0 T radeon_i2c_put_byte +ffffffff81c83430 T radeon_router_select_cd_port +ffffffff81c83690 t radeon_hw_i2c_xfer +ffffffff81c84250 t radeon_hw_i2c_func +ffffffff81c84280 t r100_hw_i2c_xfer +ffffffff81c84960 t radeon_get_i2c_prescale +ffffffff81c85000 T radeon_ib_get +ffffffff81c85100 T radeon_ib_free +ffffffff81c85150 T radeon_ib_schedule +ffffffff81c853e0 T radeon_ib_pool_init +ffffffff81c85470 T radeon_ib_pool_fini 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T radeon_driver_postclose_kms +ffffffff81c880c0 T radeon_get_vblank_counter_kms +ffffffff81c88250 T radeon_enable_vblank_kms +ffffffff81c882f0 T radeon_disable_vblank_kms +ffffffff81c89000 T radeon_crtc_set_base +ffffffff81c89020 T radeon_crtc_do_set_base +ffffffff81c895c0 T radeon_crtc_set_base_atomic +ffffffff81c895e0 t radeon_bo_reserve +ffffffff81c89760 t radeon_bo_unreserve +ffffffff81c89840 T radeon_legacy_init_crtc +ffffffff81c89880 t radeon_crtc_dpms +ffffffff81c89a80 t radeon_crtc_prepare +ffffffff81c89af0 t radeon_crtc_commit +ffffffff81c89b60 t radeon_crtc_mode_fixup +ffffffff81c89b70 t radeon_crtc_mode_set +ffffffff81c8afc0 t radeon_crtc_disable +ffffffff81c8c000 T radeon_legacy_get_backlight_level +ffffffff81c8c040 T radeon_legacy_set_backlight_level +ffffffff81c8c080 t radeon_legacy_lvds_update +ffffffff81c8c3e0 T radeon_legacy_backlight_init +ffffffff81c8c5b0 t radeon_legacy_backlight_get_brightness +ffffffff81c8c610 T radeon_add_legacy_encoder +ffffffff81c8c990 t radeon_legacy_backlight_update_status +ffffffff81c8ca20 t radeon_lvds_enc_destroy +ffffffff81c8cab0 t radeon_legacy_lvds_dpms +ffffffff81c8cb00 t radeon_legacy_mode_fixup +ffffffff81c8cb70 t radeon_legacy_lvds_prepare +ffffffff81c8cbf0 t radeon_legacy_lvds_commit +ffffffff81c8cc70 t radeon_legacy_lvds_mode_set +ffffffff81c8ce80 t radeon_legacy_encoder_disable +ffffffff81c8ced0 t radeon_legacy_tmds_int_dpms +ffffffff81c8cf90 t radeon_legacy_tmds_int_prepare +ffffffff81c8d050 t radeon_legacy_tmds_int_commit +ffffffff81c8d120 t radeon_legacy_tmds_int_mode_set +ffffffff81c8d380 t radeon_legacy_primary_dac_dpms +ffffffff81c8d4b0 t radeon_legacy_primary_dac_prepare +ffffffff81c8d500 t radeon_legacy_primary_dac_commit +ffffffff81c8d550 t radeon_legacy_primary_dac_mode_set +ffffffff81c8d6f0 t radeon_legacy_primary_dac_detect +ffffffff81c8d8e0 t radeon_legacy_tv_dac_dpms +ffffffff81c8dad0 t radeon_legacy_tv_dac_prepare +ffffffff81c8db20 t radeon_legacy_tv_dac_commit +ffffffff81c8db70 t radeon_legacy_tv_dac_mode_set +ffffffff81c8df10 t radeon_legacy_tv_dac_detect +ffffffff81c8eb30 t radeon_ext_tmds_enc_destroy +ffffffff81c8eb70 t radeon_legacy_tmds_ext_dpms +ffffffff81c8ec40 t radeon_legacy_tmds_ext_prepare +ffffffff81c8ed10 t radeon_legacy_tmds_ext_commit +ffffffff81c8ede0 t radeon_legacy_tmds_ext_mode_set +ffffffff81c8f000 T radeon_legacy_tv_mode_set +ffffffff81c900a0 T radeon_legacy_tv_adjust_crtc_reg +ffffffff81c901b0 T radeon_legacy_tv_adjust_pll1 +ffffffff81c902a0 T radeon_legacy_tv_adjust_pll2 +ffffffff81c91000 T radeon_ttm_bo_is_radeon_bo +ffffffff81c91040 t radeon_ttm_bo_destroy +ffffffff81c91170 T radeon_ttm_placement_from_domain +ffffffff81c912e0 T radeon_bo_create +ffffffff81c914a0 T radeon_bo_kmap +ffffffff81c91580 T radeon_bo_check_tiling +ffffffff81c91650 T radeon_bo_kunmap +ffffffff81c916d0 T radeon_bo_ref +ffffffff81c91710 T radeon_bo_unref +ffffffff81c91760 T radeon_bo_pin_restricted +ffffffff81c91a90 T radeon_bo_pin +ffffffff81c91ab0 T radeon_bo_unpin +ffffffff81c91b20 T radeon_bo_evict_vram +ffffffff81c91b70 T radeon_bo_force_delete +ffffffff81c91ce0 T radeon_bo_init +ffffffff81c91dc0 T radeon_bo_fini +ffffffff81c91e00 T radeon_bo_list_validate +ffffffff81c920f0 T radeon_bo_get_surface_reg +ffffffff81c92390 T radeon_bo_set_tiling_flags +ffffffff81c926b0 T radeon_bo_get_tiling_flags +ffffffff81c926f0 T radeon_bo_move_notify +ffffffff81c927b0 T radeon_bo_fault_reserve_notify +ffffffff81c92ab0 T radeon_bo_fence +ffffffff81c93000 T radeon_pm_get_type_index +ffffffff81c93070 T radeon_pm_acpi_event_handler +ffffffff81c93150 t radeon_pm_update_profile +ffffffff81c93270 t radeon_pm_set_clocks +ffffffff81c93c10 T radeon_dpm_enable_uvd +ffffffff81c93cd0 T radeon_pm_compute_clocks +ffffffff81c94700 T radeon_dpm_enable_vce +ffffffff81c94760 T radeon_pm_suspend +ffffffff81c94860 T radeon_pm_resume +ffffffff81c94b40 T radeon_pm_init +ffffffff81c95230 T radeon_pm_late_init +ffffffff81c952e0 T radeon_pm_fini +ffffffff81c953f0 t radeon_dpm_thermal_work_handler +ffffffff81c954d0 t radeon_dynpm_idle_work_handler +ffffffff81c957c0 t __delayed_work_tick +ffffffff81c96000 T radeon_gem_prime_get_sg_table +ffffffff81c96020 T radeon_gem_prime_pin +ffffffff81c960a0 t radeon_bo_reserve +ffffffff81c96220 t radeon_bo_unreserve +ffffffff81c96300 T radeon_gem_prime_unpin +ffffffff81c96370 T radeon_gem_prime_export +ffffffff81c97000 T radeon_ring_supports_scratch_reg +ffffffff81c97030 T radeon_ring_free_size +ffffffff81c970d0 T radeon_ring_lockup_update +ffffffff81c97130 T radeon_ring_alloc +ffffffff81c972b0 T radeon_ring_lock +ffffffff81c97330 T radeon_ring_commit +ffffffff81c97430 T radeon_ring_unlock_commit +ffffffff81c97460 T radeon_ring_undo +ffffffff81c97490 T radeon_ring_unlock_undo +ffffffff81c974b0 T radeon_ring_test_lockup +ffffffff81c975d0 T radeon_ring_backup +ffffffff81c97790 T radeon_ring_restore +ffffffff81c97950 T radeon_ring_init +ffffffff81c97b40 t radeon_bo_reserve +ffffffff81c97cc0 t radeon_bo_unreserve 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radeon_test_ring_sync2 +ffffffff81c9d0c0 t radeon_bo_reserve +ffffffff81c9d240 t radeon_bo_unreserve +ffffffff81c9e000 T radeon_get_rdev +ffffffff81c9e030 T radeon_ttm_tt_set_userptr +ffffffff81c9e080 T radeon_ttm_tt_is_bound +ffffffff81c9e0c0 T radeon_ttm_tt_has_userptr +ffffffff81c9e100 T radeon_ttm_tt_is_readonly +ffffffff81c9e140 T radeon_ttm_init +ffffffff81c9e350 T radeon_ttm_set_active_vram_size +ffffffff81c9e390 t radeon_bo_reserve +ffffffff81c9e510 t radeon_bo_unreserve +ffffffff81c9e5f0 T radeon_ttm_fini +ffffffff81c9e6c0 t radeon_ttm_tt_create +ffffffff81c9e7b0 t radeon_ttm_tt_populate +ffffffff81c9e860 t radeon_ttm_tt_unpopulate +ffffffff81c9e950 t radeon_ttm_tt_destroy +ffffffff81c9e9a0 t radeon_evict_flags +ffffffff81c9eaf0 t radeon_bo_move +ffffffff81c9ef70 t radeon_ttm_io_mem_reserve +ffffffff81ca0000 T radeon_ucode_print_mc_hdr +ffffffff81ca00b0 t radeon_ucode_print_common_hdr +ffffffff81ca01e0 T radeon_ucode_print_smc_hdr +ffffffff81ca0270 T radeon_ucode_print_gfx_hdr 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radeon_vm_bo_set_addr +ffffffff81ca7c10 t radeon_bo_unreserve +ffffffff81ca7cf0 t radeon_vm_clear_bo +ffffffff81ca7ee0 T radeon_vm_map_gart +ffffffff81ca7f20 T radeon_vm_update_page_directory +ffffffff81ca82c0 T radeon_vm_bo_update +ffffffff81ca89a0 T radeon_vm_clear_freed +ffffffff81ca8a80 T radeon_vm_clear_invalids +ffffffff81ca8b20 T radeon_vm_bo_rmv +ffffffff81ca8c00 T radeon_vm_bo_invalidate +ffffffff81ca8cb0 T radeon_vm_init +ffffffff81ca8f10 T radeon_vm_fini +ffffffff81ca91e0 t radeon_bo_reserve +ffffffff81ca9360 t radeon_vm_frag_ptes +ffffffff81caa000 T rs400_gart_adjust_size +ffffffff81caa0c0 T rs400_gart_tlb_flush +ffffffff81caa140 T rs400_gart_init +ffffffff81caa230 T rs400_gart_enable +ffffffff81caa590 T rs400_gart_disable +ffffffff81caa5f0 T rs400_gart_fini +ffffffff81caa660 T rs400_gart_get_page_entry +ffffffff81caa6c0 T rs400_gart_set_page +ffffffff81caa6f0 T rs400_mc_wait_for_idle +ffffffff81caa780 T rs400_mc_rreg +ffffffff81caa810 T rs400_mc_wreg +ffffffff81caa890 T rs400_resume +ffffffff81caa9c0 t rs400_mc_program +ffffffff81caaac0 t rs400_startup +ffffffff81caacb0 T rs400_suspend +ffffffff81caad40 T rs400_fini +ffffffff81caae30 T rs400_init +ffffffff81cac000 T avivo_wait_for_vblank +ffffffff81cac280 T rs600_page_flip +ffffffff81cac540 T rs600_page_flip_pending +ffffffff81cac5b0 T avivo_program_fmt +ffffffff81cac6d0 T rs600_pm_misc +ffffffff81caca10 T rs600_pm_prepare +ffffffff81cacb10 T rs600_pm_finish +ffffffff81cacc10 T rs600_hpd_sense +ffffffff81cacc70 T rs600_hpd_set_polarity +ffffffff81cacd20 T rs600_hpd_init +ffffffff81cace00 T rs600_hpd_fini +ffffffff81cacea0 T rs600_asic_reset +ffffffff81cad110 T rs600_gart_tlb_flush +ffffffff81cad1d0 T rs600_gart_get_page_entry +ffffffff81cad230 T rs600_gart_set_page +ffffffff81cad270 T rs600_irq_set +ffffffff81cad440 T rs600_irq_disable +ffffffff81cad4c0 t rs600_irq_ack +ffffffff81cad670 T rs600_irq_process +ffffffff81cad9e0 T rs600_get_vblank_counter +ffffffff81cada30 T rs600_mc_wait_for_idle +ffffffff81cadac0 T rs600_bandwidth_update +ffffffff81cadbb0 T rs600_mc_rreg +ffffffff81cadc30 T rs600_mc_wreg +ffffffff81cadc90 T rs600_set_safe_registers +ffffffff81cadcd0 T rs600_resume +ffffffff81cade00 t rs600_startup +ffffffff81cae640 T rs600_suspend +ffffffff81cae740 T rs600_fini +ffffffff81cae840 T rs600_init +ffffffff81caf000 T rs690_mc_wait_for_idle +ffffffff81caf090 T rs690_pm_info +ffffffff81caf320 T rs690_line_buffer_adjust +ffffffff81caf420 T rs690_bandwidth_update +ffffffff81caf740 t rs690_crtc_bandwidth_compute +ffffffff81cafb70 t rs690_compute_mode_priority +ffffffff81cafff0 T rs690_mc_rreg +ffffffff81cb0080 T rs690_mc_wreg +ffffffff81cb0100 T rs690_resume +ffffffff81cb01f0 t rs690_startup +ffffffff81cb04e0 T rs690_suspend +ffffffff81cb0540 T rs690_fini +ffffffff81cb05e0 T rs690_init +ffffffff81cb1000 T rs780_dpm_enable +ffffffff81cb1bd0 T rs780_dpm_disable +ffffffff81cb1cb0 T rs780_dpm_set_power_state +ffffffff81cb2090 t rs780_force_voltage +ffffffff81cb21d0 t rs780_enable_voltage_scaling +ffffffff81cb2380 T rs780_dpm_setup_asic +ffffffff81cb23b0 T rs780_dpm_display_configuration_changed +ffffffff81cb24f0 T rs780_dpm_init +ffffffff81cb2a50 T rs780_dpm_print_power_state +ffffffff81cb2ae0 T rs780_dpm_fini +ffffffff81cb2b70 T rs780_dpm_get_sclk +ffffffff81cb2bb0 T rs780_dpm_get_mclk +ffffffff81cb2be0 T rs780_dpm_debugfs_print_current_performance_level +ffffffff81cb2c10 T rs780_dpm_get_current_sclk +ffffffff81cb2c90 T rs780_dpm_get_current_mclk +ffffffff81cb2cc0 T rs780_dpm_force_performance_level +ffffffff81cb2ea0 t rs780_force_fbdiv +ffffffff81cb3000 T rv515_ring_start +ffffffff81cb3b30 T rv515_mc_wait_for_idle +ffffffff81cb3bc0 T rv515_vga_render_disable +ffffffff81cb3c10 T rv515_mc_rreg +ffffffff81cb3ca0 T rv515_mc_wreg +ffffffff81cb3d20 T rv515_debugfs +ffffffff81cb3d30 T rv515_mc_stop +ffffffff81cb42c0 T rv515_mc_resume +ffffffff81cb48c0 T rv515_clock_startup +ffffffff81cb4980 T rv515_resume +ffffffff81cb4bc0 t rv515_startup +ffffffff81cb50a0 T rv515_suspend +ffffffff81cb5100 T rv515_set_safe_registers +ffffffff81cb5140 T rv515_fini +ffffffff81cb51e0 T rv515_init +ffffffff81cb54d0 T atom_rv515_force_tv_scaler +ffffffff81cb8b70 T rv515_bandwidth_avivo_update +ffffffff81cb8d00 t rv515_crtc_bandwidth_compute +ffffffff81cb9040 t rv515_compute_mode_priority +ffffffff81cb94f0 T rv515_bandwidth_update +ffffffff81cba000 T rv6xx_dpm_enable +ffffffff81cba7f0 t rv6xx_calculate_stepping_parameters +ffffffff81cba9c0 t rv6xx_program_stepping_parameters_except_lowest_entry +ffffffff81cbafb0 t rv6xx_program_stepping_parameters_lowest_entry +ffffffff81cbb090 T rv6xx_dpm_disable +ffffffff81cbb410 T rv6xx_dpm_set_power_state +ffffffff81cbbe00 T rv6xx_setup_asic +ffffffff81cbbf40 T rv6xx_dpm_display_configuration_changed +ffffffff81cbbfc0 T rv6xx_dpm_init +ffffffff81cbc510 T rv6xx_dpm_print_power_state +ffffffff81cbc5c0 T rv6xx_dpm_debugfs_print_current_performance_level +ffffffff81cbc5f0 T rv6xx_dpm_get_current_sclk +ffffffff81cbc660 T rv6xx_dpm_get_current_mclk +ffffffff81cbc6d0 T rv6xx_dpm_fini +ffffffff81cbc760 T rv6xx_dpm_get_sclk +ffffffff81cbc7a0 T rv6xx_dpm_get_mclk +ffffffff81cbc7e0 T rv6xx_dpm_force_performance_level +ffffffff81cbc960 t rv6xx_generate_steps +ffffffff81cbcc70 t rv6xx_output_stepping +ffffffff81cbcd90 t rv6xx_program_mclk_stepping_entry +ffffffff81cbd000 t rv6xx_program_engine_spread_spectrum +ffffffff81cbd2e0 t rv6xx_step_sw_voltage +ffffffff81cbe000 T rv730_populate_sclk_value +ffffffff81cbe240 T rv730_populate_mclk_value +ffffffff81cbe460 T rv730_read_clock_registers +ffffffff81cbe580 T rv730_populate_smc_acpi_state +ffffffff81cbe730 T rv730_populate_smc_initial_state +ffffffff81cbe8e0 T rv730_program_memory_timing_parameters +ffffffff81cbeac0 T rv730_start_dpm +ffffffff81cbeb50 T rv730_stop_dpm +ffffffff81cbec10 T rv730_program_dcodt +ffffffff81cbece0 T rv730_get_odt_values +ffffffff81cbf000 T rv740_get_decoded_reference_divider +ffffffff81cbf0a0 T rv740_get_dll_speed +ffffffff81cbf1d0 T rv740_populate_sclk_value +ffffffff81cbf3e0 T rv740_populate_mclk_value +ffffffff81cbf820 T rv740_read_clock_registers +ffffffff81cbf950 T rv740_populate_smc_acpi_state +ffffffff81cbfb80 T rv740_enable_mclk_spread_spectrum +ffffffff81cbfbe0 T rv740_get_mclk_frequency_ratio +ffffffff81cc0000 T rv770_set_uvd_clocks +ffffffff81cc0570 T rv770_get_xclk +ffffffff81cc05d0 T rv770_page_flip +ffffffff81cc08e0 T rv770_page_flip_pending +ffffffff81cc0950 T rv770_get_temp +ffffffff81cc09b0 T rv770_pm_misc +ffffffff81cc0a80 T r700_cp_stop +ffffffff81cc0b00 T r700_cp_fini +ffffffff81cc0b80 T rv770_set_clk_bypass_mode +ffffffff81cc0ca0 T r700_vram_gtt_location +ffffffff81cc0e30 T rv770_resume +ffffffff81cc0ec0 t rv770_init_golden_registers +ffffffff81cc1050 t rv770_startup +ffffffff81cc3040 T rv770_suspend +ffffffff81cc3260 T rv770_init +ffffffff81cc3820 T rv770_fini +ffffffff81cc4000 T rv770_copy_dma +ffffffff81cc5000 T rv770_get_ps +ffffffff81cc5030 T rv770_get_pi +ffffffff81cc5060 T evergreen_get_pi +ffffffff81cc5090 T rv770_restore_cgcg +ffffffff81cc5100 T rv770_stop_dpm +ffffffff81cc51c0 T rv770_dpm_enabled +ffffffff81cc5200 T rv770_enable_thermal_protection +ffffffff81cc5260 T rv770_enable_acpi_pm +ffffffff81cc52b0 T rv770_get_seq_value +ffffffff81cc52e0 T rv770_write_smc_soft_register +ffffffff81cc5310 T rv770_populate_smc_t +ffffffff81cc54a0 T rv770_populate_smc_sp +ffffffff81cc5500 T rv770_map_clkf_to_ibias +ffffffff81cc5560 T rv770_populate_vddc_value +ffffffff81cc5600 T rv770_populate_mvdd_value +ffffffff81cc5650 T rv770_calculate_memory_refresh_rate +ffffffff81cc56c0 T rv770_enable_backbias +ffffffff81cc5720 T rv770_setup_bsp +ffffffff81cc5800 T rv770_program_git +ffffffff81cc5850 T rv770_program_tp +ffffffff81cc58d0 T rv770_program_tpp +ffffffff81cc5910 T rv770_program_sstp +ffffffff81cc5950 T rv770_program_engine_speed_parameters +ffffffff81cc59a0 T rv770_program_vc +ffffffff81cc59e0 T rv770_clear_vc +ffffffff81cc5a20 T rv770_upload_firmware +ffffffff81cc5a60 T rv770_populate_initial_mvdd_value +ffffffff81cc5ab0 T rv770_get_memory_module_index +ffffffff81cc5af0 T rv770_enable_voltage_control +ffffffff81cc5b50 T rv770_halt_smc +ffffffff81cc5bb0 T rv770_resume_smc +ffffffff81cc5c00 T rv770_set_sw_state +ffffffff81cc5c60 T rv770_set_boot_state +ffffffff81cc5cb0 T rv770_set_uvd_clock_before_set_eng_clock +ffffffff81cc5d10 T rv770_set_uvd_clock_after_set_eng_clock +ffffffff81cc5d80 T rv770_restrict_performance_levels_before_switch +ffffffff81cc5de0 T rv770_dpm_force_performance_level +ffffffff81cc5ea0 T r7xx_start_smc +ffffffff81cc5ec0 T r7xx_stop_smc +ffffffff81cc5ee0 T rv770_read_voltage_smio_registers +ffffffff81cc5f20 T rv770_reset_smio_status +ffffffff81cc5fd0 T rv770_get_memory_type +ffffffff81cc6020 T rv770_get_pcie_gen2_status +ffffffff81cc6090 T rv770_get_max_vddc +ffffffff81cc60f0 T rv770_program_response_times +ffffffff81cc6230 T rv770_enable_auto_throttle_source +ffffffff81cc63a0 T rv770_dpm_enable +ffffffff81cc7420 T rv770_dpm_late_enable +ffffffff81cc7550 T rv770_dpm_disable +ffffffff81cc78b0 T rv770_dpm_set_power_state +ffffffff81cc7ea0 T rv770_dpm_setup_asic +ffffffff81cc8200 T rv770_dpm_display_configuration_changed +ffffffff81cc8280 T rv7xx_parse_power_table +ffffffff81cc87c0 T rv770_get_engine_memory_ss +ffffffff81cc8850 T rv770_dpm_init +ffffffff81cc8a80 T rv770_dpm_print_power_state +ffffffff81cc8ba0 T rv770_dpm_debugfs_print_current_performance_level +ffffffff81cc8bd0 T rv770_dpm_get_current_sclk +ffffffff81cc8c30 T rv770_dpm_get_current_mclk +ffffffff81cc8c90 T rv770_dpm_fini +ffffffff81cc8d20 T rv770_dpm_get_sclk +ffffffff81cc8d60 T rv770_dpm_get_mclk +ffffffff81cc8da0 T rv770_dpm_vblank_too_short +ffffffff81cc8e00 t rv770_convert_power_level_to_smc +ffffffff81cca000 T rv770_copy_bytes_to_smc +ffffffff81cca230 T rv770_start_smc +ffffffff81cca280 T rv770_reset_smc +ffffffff81cca2d0 T rv770_stop_smc_clock +ffffffff81cca320 T rv770_start_smc_clock +ffffffff81cca370 T rv770_is_smc_running +ffffffff81cca3b0 T rv770_send_msg_to_smc +ffffffff81cca480 T rv770_wait_for_smc_inactive +ffffffff81cca510 T rv770_load_smc_ucode +ffffffff81cca690 T rv770_read_smc_sram_dword +ffffffff81cca740 T rv770_write_smc_sram_dword +ffffffff81ccb000 T si_get_allowed_info_register +ffffffff81ccb090 T si_get_xclk +ffffffff81ccb100 T si_get_temp +ffffffff81ccb140 T si_mc_load_microcode +ffffffff81ccb410 T dce6_bandwidth_update +ffffffff81ccb810 t dce6_program_watermarks +ffffffff81ccc2c0 T si_fence_ring_emit +ffffffff81ccc730 T si_ring_ib_execute +ffffffff81cccf00 T si_gpu_check_soft_reset +ffffffff81ccd090 T si_asic_reset +ffffffff81ccd4a0 t si_gpu_pci_config_reset +ffffffff81ccd850 T si_gfx_is_lockup +ffffffff81ccd8b0 T si_vram_gtt_location +ffffffff81ccd950 T si_pcie_gart_tlb_flush +ffffffff81ccd9a0 T si_ib_parse +ffffffff81cce050 T si_vm_init +ffffffff81cce090 T si_vm_fini +ffffffff81cce0c0 T si_vm_flush +ffffffff81cce7a0 T si_init_uvd_internal_cg +ffffffff81cce7e0 T si_get_csb_size +ffffffff81cce870 T si_get_csb_buffer +ffffffff81ccea00 T si_rlc_reset +ffffffff81ccea70 T si_irq_set +ffffffff81ccef70 t si_disable_interrupt_state +ffffffff81ccf1f0 T si_irq_process +ffffffff81cd03f0 t si_irq_ack +ffffffff81cd09f0 T si_resume +ffffffff81cd0a80 t si_init_golden_registers +ffffffff81cd0c40 t si_startup +ffffffff81cd5470 T si_suspend +ffffffff81cd57f0 T si_init +ffffffff81cd6cc0 t si_cp_fini +ffffffff81cd6db0 t si_pcie_gart_fini +ffffffff81cd6eb0 T si_fini +ffffffff81cd7150 T si_get_gpu_clock_counter +ffffffff81cd7210 T si_set_uvd_clocks +ffffffff81cd7780 T si_set_vce_clocks +ffffffff81cd7cc0 t si_vce_send_vcepll_ctlreq +ffffffff81cd7f00 t dce6_latency_watermark +ffffffff81cd8130 t si_rlc_stop +ffffffff81cd82e0 t si_vm_reg_valid +ffffffff81cd8440 t si_vm_packet3_cp_dma_check +ffffffff81cd85c0 t si_update_cg +ffffffff81cd8b10 t si_enable_mgcg +ffffffff81cd8f30 t si_enable_cgcg +ffffffff81cda000 T si_dma_is_lockup +ffffffff81cda080 T si_dma_vm_copy_pages +ffffffff81cda160 T si_dma_vm_write_pages +ffffffff81cda2c0 T si_dma_vm_set_pages +ffffffff81cda420 T si_dma_vm_flush +ffffffff81cda8b0 T si_copy_dma +ffffffff81cdb000 T si_dpm_force_performance_level +ffffffff81cdb160 T si_get_ddr3_mclk_frequency_ratio +ffffffff81cdb1b0 T si_get_mclk_frequency_ratio +ffffffff81cdb230 T si_trim_voltage_table_to_fit_state_table +ffffffff81cdb330 T si_dpm_setup_asic +ffffffff81cdb4f0 T si_fan_ctrl_get_fan_speed_percent +ffffffff81cdb580 T si_fan_ctrl_set_fan_speed_percent +ffffffff81cdb630 T si_fan_ctrl_set_mode +ffffffff81cdb870 T si_fan_ctrl_get_mode +ffffffff81cdb8c0 T si_dpm_enable +ffffffff81ce0bc0 t si_populate_smc_tdp_limits +ffffffff81ce0dd0 T si_dpm_late_enable +ffffffff81ce0f20 T si_dpm_disable +ffffffff81ce1290 T si_dpm_pre_set_power_state +ffffffff81ce1e90 T si_dpm_set_power_state +ffffffff81ce3410 T si_dpm_post_set_power_state +ffffffff81ce3440 T si_dpm_display_configuration_changed +ffffffff81ce3520 T si_dpm_init +ffffffff81ce4fd0 T si_dpm_fini +ffffffff81ce5080 T si_dpm_debugfs_print_current_performance_level +ffffffff81ce50c0 T si_dpm_get_current_sclk +ffffffff81ce5130 T si_dpm_get_current_mclk +ffffffff81ce51a0 t si_get_std_voltage_value +ffffffff81ce52d0 t si_convert_power_level_to_smc +ffffffff81ce5b70 t si_calculate_sclk_params +ffffffff81ce5d90 t si_convert_mc_reg_table_to_smc +ffffffff81ce5ef0 t si_program_cac_config_registers +ffffffff81ce7000 T si_copy_bytes_to_smc +ffffffff81ce7250 T si_start_smc +ffffffff81ce7280 T si_reset_smc +ffffffff81ce72c0 T si_program_jump_on_start +ffffffff81ce72f0 T si_stop_smc_clock +ffffffff81ce7320 T si_start_smc_clock +ffffffff81ce7350 T si_is_smc_running +ffffffff81ce73b0 T si_send_msg_to_smc +ffffffff81ce7480 T si_wait_for_smc_inactive +ffffffff81ce7520 T si_load_smc_ucode +ffffffff81ce76c0 T si_read_smc_sram_dword +ffffffff81ce7790 T si_write_smc_sram_dword +ffffffff81ce8000 T sumo_get_pi +ffffffff81ce8030 T sumo_gfx_clockgating_initialize +ffffffff81ce8110 T sumo_program_vc +ffffffff81ce8150 T sumo_clear_vc +ffffffff81ce8190 T sumo_program_sstp +ffffffff81ce8210 T sumo_take_smu_control +ffffffff81ce8240 T sumo_get_sleep_divider_from_id +ffffffff81ce8270 T sumo_get_sleep_divider_id_from_clock +ffffffff81ce8320 T sumo_dpm_enable +ffffffff81ce89c0 T sumo_dpm_late_enable +ffffffff81ce8f80 T sumo_dpm_disable +ffffffff81ce92d0 T sumo_dpm_pre_set_power_state +ffffffff81ce9780 T sumo_dpm_set_power_state +ffffffff81cea2c0 T sumo_dpm_post_set_power_state +ffffffff81cea360 T sumo_dpm_setup_asic +ffffffff81cea460 T sumo_dpm_display_configuration_changed +ffffffff81cea490 T sumo_convert_vid2_to_vid7 +ffffffff81cea4f0 T sumo_construct_sclk_voltage_mapping_table +ffffffff81cea5b0 T sumo_construct_vid_mapping_table +ffffffff81cea730 T sumo_dpm_init +ffffffff81ceaff0 T sumo_dpm_print_power_state +ffffffff81ceb110 T sumo_dpm_debugfs_print_current_performance_level +ffffffff81ceb140 T sumo_dpm_get_current_sclk +ffffffff81ceb1b0 T sumo_dpm_get_current_mclk +ffffffff81ceb1e0 T sumo_dpm_get_current_vddc +ffffffff81ceb2b0 T sumo_dpm_fini +ffffffff81ceb340 T sumo_dpm_get_sclk +ffffffff81ceb390 T sumo_dpm_get_mclk +ffffffff81ceb3c0 T sumo_dpm_force_performance_level +ffffffff81ceb7e0 t sumo_power_level_enable +ffffffff81ceba10 t sumo_program_power_level +ffffffff81cec000 T sumo_initialize_m3_arb +ffffffff81cec2b0 T sumo_smu_notify_alt_vddnb_change +ffffffff81cec340 t sumo_send_msg_to_smu +ffffffff81cec4e0 T sumo_smu_pg_init +ffffffff81cec500 T sumo_enable_boost_timer +ffffffff81cec630 T sumo_set_tdp_limit +ffffffff81cec6b0 T sumo_boost_state_enable +ffffffff81cec6f0 T sumo_get_running_fw_version +ffffffff81ced000 T trinity_dpm_enable_bapm +ffffffff81ced070 T trinity_dpm_enable +ffffffff81ced510 T trinity_dpm_late_enable +ffffffff81ceda60 T trinity_dpm_disable +ffffffff81cede70 T trinity_dpm_force_performance_level +ffffffff81cedf20 T trinity_dpm_pre_set_power_state +ffffffff81cee4e0 T trinity_dpm_set_power_state +ffffffff81ceea70 T trinity_dpm_post_set_power_state +ffffffff81ceeb10 T trinity_dpm_setup_asic +ffffffff81ceeb70 T trinity_dpm_display_configuration_changed +ffffffff81ceec00 T trinity_dpm_init +ffffffff81cef4f0 T trinity_dpm_print_power_state +ffffffff81cef600 T trinity_dpm_debugfs_print_current_performance_level +ffffffff81cef690 T trinity_dpm_get_current_sclk +ffffffff81cef6f0 T trinity_dpm_get_current_mclk +ffffffff81cef720 T trinity_dpm_fini +ffffffff81cef7c0 T trinity_dpm_get_sclk +ffffffff81cef810 T trinity_dpm_get_mclk +ffffffff81cef840 t trinity_program_power_level +ffffffff81cf0000 T trinity_dpm_bapm_enable +ffffffff81cf0140 T trinity_dpm_config +ffffffff81cf0220 T trinity_dpm_force_state +ffffffff81cf0300 T trinity_dpm_n_levels_disabled +ffffffff81cf03e0 T trinity_uvd_dpm_config +ffffffff81cf04b0 T trinity_dpm_no_forced_level +ffffffff81cf0580 T trinity_dce_enable_voltage_adjustment +ffffffff81cf06c0 T trinity_gfx_dynamic_mgpg_config +ffffffff81cf0790 T trinity_acquire_mutex +ffffffff81cf0820 T trinity_release_mutex +ffffffff81cf1000 T uvd_v1_0_get_rptr +ffffffff81cf1040 T uvd_v1_0_get_wptr +ffffffff81cf1080 T uvd_v1_0_set_wptr +ffffffff81cf10c0 T uvd_v1_0_fence_emit +ffffffff81cf14b0 T uvd_v1_0_resume +ffffffff81cf1600 T uvd_v1_0_init +ffffffff81cf1b90 T uvd_v1_0_start +ffffffff81cf2310 T uvd_v1_0_fini +ffffffff81cf2480 T uvd_v1_0_stop +ffffffff81cf25e0 T uvd_v1_0_ring_test +ffffffff81cf27b0 T uvd_v1_0_semaphore_emit +ffffffff81cf27e0 T uvd_v1_0_ib_execute +ffffffff81cf2970 T uvd_v1_0_ib_test +ffffffff81cf3000 T uvd_v2_2_fence_emit +ffffffff81cf3470 T uvd_v2_2_semaphore_emit +ffffffff81cf3670 T uvd_v2_2_resume +ffffffff81cf4000 T uvd_v3_1_semaphore_emit +ffffffff81cf5000 T uvd_v4_2_resume +ffffffff81cf6000 T vce_v1_0_get_rptr +ffffffff81cf6090 T vce_v1_0_get_wptr +ffffffff81cf6120 T vce_v1_0_set_wptr +ffffffff81cf61b0 T vce_v1_0_enable_mgcg +ffffffff81cf6460 T vce_v1_0_load_fw +ffffffff81cf6620 T vce_v1_0_bo_size +ffffffff81cf6690 T vce_v1_0_resume +ffffffff81cf7000 T vce_v1_0_start +ffffffff81cf77c0 T vce_v1_0_init +ffffffff81cf8000 T vce_v2_0_enable_mgcg +ffffffff81cf8070 t vce_v2_0_set_dyn_cg +ffffffff81cf8260 T vce_v2_0_bo_size +ffffffff81cf82d0 T vce_v2_0_resume +ffffffff81cf9000 T aldebaran_reset_init +ffffffff81cf90c0 t aldebaran_async_reset +ffffffff81cf9120 t aldebaran_get_reset_handler +ffffffff81cf91d0 T aldebaran_reset_fini +ffffffff81cf9220 t aldebaran_mode2_prepare_hwcontext +ffffffff81cf9340 t aldebaran_mode2_perform_reset +ffffffff81cf9510 t aldebaran_mode2_restore_hwcontext +ffffffff81cf99f0 t aldebaran_mode2_reset +ffffffff81cfa000 T aldebaran_reg_base_init +ffffffff81cfb000 T amdgpu_acpi_is_pcie_performance_request_supported +ffffffff81cfb040 T amdgpu_acpi_is_power_shift_control_supported +ffffffff81cfb070 T amdgpu_acpi_pcie_notify_device_ready +ffffffff81cfb180 t amdgpu_atcs_call +ffffffff81cfb270 T amdgpu_acpi_pcie_performance_request +ffffffff81cfb4c0 T amdgpu_acpi_power_shift_control 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amdgpu_atombios_crtc_overscan_setup +ffffffff81d07150 T amdgpu_atombios_crtc_scaler_setup +ffffffff81d071d0 T amdgpu_atombios_crtc_lock +ffffffff81d07230 T amdgpu_atombios_crtc_enable +ffffffff81d07290 T amdgpu_atombios_crtc_blank +ffffffff81d072f0 T amdgpu_atombios_crtc_powergate +ffffffff81d07360 T amdgpu_atombios_crtc_powergate_init +ffffffff81d073c0 T amdgpu_atombios_crtc_set_dtd_timing +ffffffff81d074d0 T amdgpu_atombios_crtc_set_disp_eng_pll +ffffffff81d075c0 T amdgpu_atombios_crtc_set_dce_clock +ffffffff81d076a0 T amdgpu_atombios_crtc_program_pll +ffffffff81d079b0 T amdgpu_atombios_crtc_prepare_pll +ffffffff81d07eb0 T amdgpu_atombios_crtc_set_pll +ffffffff81d09000 T amdgpu_atombios_dp_aux_init +ffffffff81d09090 t amdgpu_atombios_dp_aux_transfer +ffffffff81d09200 T amdgpu_atombios_dp_get_sinktype +ffffffff81d09260 T amdgpu_atombios_dp_get_dpcd +ffffffff81d09410 T amdgpu_atombios_dp_get_panel_mode +ffffffff81d09500 T amdgpu_atombios_dp_set_link_config +ffffffff81d09580 t amdgpu_atombios_dp_get_dp_link_config +ffffffff81d09700 T amdgpu_atombios_dp_mode_valid_helper +ffffffff81d09780 T amdgpu_atombios_dp_needs_link_train +ffffffff81d097f0 T amdgpu_atombios_dp_set_rx_power_state +ffffffff81d09870 T amdgpu_atombios_dp_link_train +ffffffff81d09dc0 t amdgpu_atombios_dp_process_aux_ch +ffffffff81d09f30 t amdgpu_atombios_dp_get_adjust_train +ffffffff81d0b000 T amdgpu_atombios_encoder_get_backlight_level_from_reg +ffffffff81d0b040 T amdgpu_atombios_encoder_set_backlight_level_to_reg +ffffffff81d0b090 T amdgpu_atombios_encoder_get_backlight_level +ffffffff81d0b0f0 T amdgpu_atombios_encoder_set_backlight_level +ffffffff81d0b200 T amdgpu_atombios_encoder_setup_dig_transmitter +ffffffff81d0bbd0 T amdgpu_atombios_encoder_init_backlight +ffffffff81d0bd60 t amdgpu_atombios_encoder_get_backlight_brightness +ffffffff81d0bdb0 T amdgpu_atombios_encoder_fini_backlight +ffffffff81d0be40 T amdgpu_atombios_encoder_is_digital +ffffffff81d0be90 T amdgpu_atombios_encoder_mode_fixup +ffffffff81d0bf70 T amdgpu_atombios_encoder_get_encoder_mode +ffffffff81d0c110 T amdgpu_atombios_encoder_setup_dig_encoder +ffffffff81d0c5d0 T amdgpu_atombios_encoder_set_edp_panel_power +ffffffff81d0c6d0 T amdgpu_atombios_encoder_dpms +ffffffff81d0c840 t amdgpu_atombios_encoder_setup_dig +ffffffff81d0cbb0 t amdgpu_atombios_encoder_setup_dvo +ffffffff81d0cd50 T amdgpu_atombios_encoder_set_crtc_source +ffffffff81d0d130 T amdgpu_atombios_encoder_init_dig +ffffffff81d0d1f0 t amdgpu_atombios_encoder_setup_external_encoder +ffffffff81d0d450 T amdgpu_atombios_encoder_dac_detect +ffffffff81d0d630 T amdgpu_atombios_encoder_dig_detect +ffffffff81d0d730 T amdgpu_atombios_encoder_setup_ext_encoder_ddc +ffffffff81d0d780 T amdgpu_atombios_encoder_set_bios_scratch_regs +ffffffff81d0dd20 T amdgpu_atombios_encoder_get_lcd_info +ffffffff81d0e080 T amdgpu_atombios_encoder_get_dig_info +ffffffff81d0e0f0 t amdgpu_atombios_encoder_update_backlight_status +ffffffff81d0f000 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amdgpu_connector_encoder_get_dp_bridge_encoder_id +ffffffff81d164a0 T amdgpu_connector_is_dp12_capable +ffffffff81d16530 T amdgpu_connector_add +ffffffff81d17140 t amdgpu_connector_dp_detect +ffffffff81d174b0 t amdgpu_connector_dvi_force +ffffffff81d174f0 t amdgpu_connector_set_property +ffffffff81d17a60 t amdgpu_connector_late_register +ffffffff81d17ac0 t amdgpu_connector_unregister +ffffffff81d17b20 t amdgpu_connector_destroy +ffffffff81d17b90 t amdgpu_connector_best_single_encoder +ffffffff81d17c10 t amdgpu_connector_dp_get_modes +ffffffff81d17f40 t amdgpu_connector_dp_mode_valid +ffffffff81d18060 t amdgpu_connector_dvi_encoder +ffffffff81d18130 t amdgpu_connector_get_edid +ffffffff81d182b0 t amdgpu_connector_fixup_lcd_native_mode +ffffffff81d183e0 t amdgpu_connector_add_common_modes +ffffffff81d184d0 t amdgpu_connector_lcd_native_mode +ffffffff81d185a0 t amdgpu_connector_set_lcd_property +ffffffff81d18690 t amdgpu_connector_vga_detect +ffffffff81d188e0 t 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amdgpu_gmc_init_pdb0 +ffffffff81d40220 T amdgpu_gmc_vram_pa +ffffffff81d40270 T amdgpu_gmc_vram_mc2pa +ffffffff81d402b0 T amdgpu_gmc_vram_cpu_pa +ffffffff81d40300 T amdgpu_gmc_vram_checking +ffffffff81d41000 T amdgpu_gtt_mgr_has_gart_addr +ffffffff81d41030 T amdgpu_gtt_mgr_recover +ffffffff81d410b0 T amdgpu_gtt_mgr_init +ffffffff81d41230 T amdgpu_gtt_mgr_fini +ffffffff81d413b0 t amdgpu_gtt_mgr_new +ffffffff81d41530 t amdgpu_gtt_mgr_del +ffffffff81d415a0 t amdgpu_gtt_mgr_intersects +ffffffff81d415e0 t amdgpu_gtt_mgr_compatible +ffffffff81d41620 t amdgpu_gtt_mgr_debug +ffffffff81d42000 T amdgpu_bb_set_bits +ffffffff81d420c0 T amdgpu_bb_set_dir +ffffffff81d420f0 T amdgpu_bb_read_bits +ffffffff81d42180 T amdgpu_acquire_bus +ffffffff81d42350 T amdgpu_release_bus +ffffffff81d42410 T amdgpu_send_start +ffffffff81d42430 T amdgpu_send_stop +ffffffff81d42450 T amdgpu_initiate_xfer +ffffffff81d42470 T amdgpu_read_byte +ffffffff81d42490 T amdgpu_write_byte +ffffffff81d424b0 T amdgpu_i2c_create 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amdgpu_vm_cpu_map_table +ffffffff81d87010 t amdgpu_vm_cpu_prepare +ffffffff81d87050 t amdgpu_vm_cpu_update +ffffffff81d87140 t amdgpu_vm_cpu_commit +ffffffff81d88000 T amdgpu_vm_pt_clear +ffffffff81d88420 T amdgpu_vm_pt_create +ffffffff81d88940 T amdgpu_vm_pt_free_work +ffffffff81d88c00 t amdgpu_vm_pt_free +ffffffff81d88ce0 T amdgpu_vm_pt_free_root +ffffffff81d88cf0 t amdgpu_vm_pt_free_dfs +ffffffff81d89a60 T amdgpu_vm_pt_is_root_clean +ffffffff81d89b30 T amdgpu_vm_pde_update +ffffffff81d89c20 T amdgpu_vm_ptes_update +ffffffff81d8a5f0 t amdgpu_vm_pt_next +ffffffff81d8b000 t amdgpu_vm_sdma_map_table +ffffffff81d8b060 t amdgpu_vm_sdma_prepare +ffffffff81d8b100 t amdgpu_vm_sdma_update +ffffffff81d8b5e0 t amdgpu_vm_sdma_commit +ffffffff81d8c000 T amdgpu_vram_mgr_bo_visible_size +ffffffff81d8c110 T amdgpu_vram_mgr_reserve_range +ffffffff81d8c1f0 t amdgpu_vram_mgr_do_reserve +ffffffff81d8c370 T amdgpu_vram_mgr_query_page_status +ffffffff81d8c450 T amdgpu_vram_mgr_alloc_sgt +ffffffff81d8c4a0 T amdgpu_vram_mgr_free_sgt +ffffffff81d8c4c0 T amdgpu_vram_mgr_vis_usage +ffffffff81d8c4f0 T amdgpu_vram_mgr_init +ffffffff81d8c6c0 T amdgpu_vram_mgr_fini +ffffffff81d8c8d0 t amdgpu_vram_mgr_new +ffffffff81d8ce60 t amdgpu_vram_mgr_del +ffffffff81d8cf30 t amdgpu_vram_mgr_intersects +ffffffff81d8cfb0 t amdgpu_vram_mgr_compatible +ffffffff81d8d030 t amdgpu_vram_mgr_debug +ffffffff81d8e000 t amdgpu_xgmi_hive_release +ffffffff81d8e050 T amdgpu_get_xgmi_hive +ffffffff81d8e0a0 T amdgpu_put_xgmi_hive +ffffffff81d8e0f0 T amdgpu_xgmi_set_pstate +ffffffff81d8e140 T amdgpu_xgmi_update_topology +ffffffff81d8e1f0 T amdgpu_xgmi_get_hops_count +ffffffff81d8e260 T amdgpu_xgmi_get_num_links +ffffffff81d8e2d0 T amdgpu_xgmi_add_device +ffffffff81d8e4f0 T amdgpu_xgmi_remove_device +ffffffff81d8e630 T amdgpu_xgmi_get_relative_phy_addr +ffffffff81d8e670 t amdgpu_ras_error_inject_xgmi +ffffffff81d8e7e0 t amdgpu_xgmi_query_ras_error_count +ffffffff81d8eff0 t amdgpu_xgmi_reset_ras_error_count +ffffffff81d8f310 t amdgpu_xgmi_ras_late_init +ffffffff81d90000 T arct_reg_base_init +ffffffff81d91000 T athub_v1_0_set_clockgating +ffffffff81d91210 T athub_v1_0_get_clockgating +ffffffff81d92000 T athub_v2_0_set_clockgating +ffffffff81d921e0 T athub_v2_0_get_clockgating +ffffffff81d93000 T athub_v2_1_set_clockgating +ffffffff81d931f0 T athub_v2_1_get_clockgating +ffffffff81d94000 T athub_v3_0_set_clockgating +ffffffff81d940d0 T athub_v3_0_get_clockgating +ffffffff81d94120 t athub_v3_0_get_cg_cntl +ffffffff81d941c0 t athub_v3_0_set_cg_cntl +ffffffff81d95000 t cz_ih_early_init +ffffffff81d95050 t cz_ih_sw_init +ffffffff81d950b0 t cz_ih_sw_fini +ffffffff81d950f0 t cz_ih_hw_init +ffffffff81d95310 t cz_ih_hw_fini +ffffffff81d953e0 t cz_ih_suspend +ffffffff81d954b0 t cz_ih_resume +ffffffff81d954f0 t cz_ih_is_idle +ffffffff81d95530 t cz_ih_wait_for_idle +ffffffff81d955c0 t cz_ih_soft_reset +ffffffff81d956a0 t cz_ih_set_clockgating_state +ffffffff81d956d0 t cz_ih_set_powergating_state +ffffffff81d95700 t cz_ih_get_wptr +ffffffff81d957f0 t cz_ih_decode_iv +ffffffff81d95860 t cz_ih_set_rptr +ffffffff81d96000 T dce_v10_0_disable_dce +ffffffff81d96170 t dce_v10_0_early_init +ffffffff81d96230 t dce_v10_0_sw_init +ffffffff81d966a0 t dce_v10_0_sw_fini +ffffffff81d967d0 t dce_v10_0_hw_init +ffffffff81d96b40 t dce_v10_0_hw_fini +ffffffff81d96cd0 t dce_v10_0_suspend +ffffffff81d96d30 t dce_v10_0_resume +ffffffff81d96da0 t dce_v10_0_is_idle +ffffffff81d96dd0 t dce_v10_0_wait_for_idle +ffffffff81d96e00 t dce_v10_0_check_soft_reset +ffffffff81d96e10 t dce_v10_0_soft_reset +ffffffff81d96ee0 t dce_v10_0_set_clockgating_state +ffffffff81d96f10 t dce_v10_0_set_powergating_state +ffffffff81d96f40 t dce_v10_0_audio_endpt_rreg +ffffffff81d96fd0 t dce_v10_0_audio_endpt_wreg +ffffffff81d97040 t dce_v10_0_bandwidth_update +ffffffff81d97aa0 t dce_v10_0_vblank_get_counter +ffffffff81d97af0 t dce_v10_0_hpd_sense +ffffffff81d97b50 t dce_v10_0_hpd_set_polarity +ffffffff81d97c20 t dce_v10_0_hpd_get_gpio_reg +ffffffff81d97c50 t dce_v10_0_page_flip +ffffffff81d97d40 t dce_v10_0_crtc_get_scanoutpos +ffffffff81d97de0 t dce_v10_0_encoder_add +ffffffff81d98010 t dce_v10_0_latency_watermark +ffffffff81d98230 t dce_v10_0_encoder_destroy +ffffffff81d98280 t dce_v10_0_encoder_prepare +ffffffff81d98480 t dce_v10_0_encoder_commit +ffffffff81d984b0 t dce_v10_0_encoder_mode_set +ffffffff81d99350 t dce_v10_0_encoder_disable +ffffffff81d99460 t dce_v10_0_ext_dpms +ffffffff81d99490 t dce_v10_0_ext_prepare +ffffffff81d994c0 t dce_v10_0_ext_commit +ffffffff81d994f0 t dce_v10_0_ext_mode_set +ffffffff81d99520 t dce_v10_0_ext_disable +ffffffff81d99550 t dce_v10_0_set_crtc_irq_state +ffffffff81d99630 t dce_v10_0_crtc_irq +ffffffff81d99860 t dce_v10_0_set_crtc_vblank_interrupt_state +ffffffff81d99930 t dce_v10_0_set_crtc_vline_interrupt_state +ffffffff81d99a00 t dce_v10_0_set_pageflip_irq_state +ffffffff81d99ab0 t dce_v10_0_pageflip_irq +ffffffff81d99c10 t dce_v10_0_set_hpd_irq_state +ffffffff81d99cd0 t dce_v10_0_hpd_irq +ffffffff81d99df0 t dce_v10_0_crtc_cursor_set2 +ffffffff81d9a160 t dce_v10_0_crtc_cursor_move +ffffffff81d9a230 t dce_v10_0_crtc_gamma_set +ffffffff81d9a270 t dce_v10_0_crtc_destroy +ffffffff81d9a2a0 t amdgpu_bo_reserve +ffffffff81d9a4b0 t amdgpu_bo_unreserve +ffffffff81d9a590 t dce_v10_0_cursor_move_locked +ffffffff81d9a6e0 t dce_v10_0_crtc_load_lut +ffffffff81d9aa70 t dce_v10_0_crtc_dpms +ffffffff81d9ac40 t dce_v10_0_crtc_prepare +ffffffff81d9ac80 t dce_v10_0_crtc_commit +ffffffff81d9acb0 t dce_v10_0_crtc_mode_fixup +ffffffff81d9ae70 t dce_v10_0_crtc_mode_set +ffffffff81d9b050 t dce_v10_0_crtc_set_base +ffffffff81d9b070 t dce_v10_0_crtc_set_base_atomic +ffffffff81d9b090 t dce_v10_0_crtc_disable +ffffffff81d9b230 t dce_v10_0_crtc_do_set_base +ffffffff81d9b8e0 t dce_v10_0_is_display_hung +ffffffff81d9c000 T dce_v11_0_disable_dce +ffffffff81d9c160 t dce_v11_0_early_init +ffffffff81d9c2a0 t dce_v11_0_sw_init +ffffffff81d9c720 t dce_v11_0_sw_fini +ffffffff81d9c850 t dce_v11_0_hw_init +ffffffff81d9cc20 t dce_v11_0_hw_fini +ffffffff81d9cdb0 t dce_v11_0_suspend +ffffffff81d9ce10 t dce_v11_0_resume +ffffffff81d9ce80 t dce_v11_0_is_idle +ffffffff81d9ceb0 t dce_v11_0_wait_for_idle +ffffffff81d9cee0 t dce_v11_0_soft_reset +ffffffff81d9d100 t dce_v11_0_set_clockgating_state +ffffffff81d9d130 t dce_v11_0_set_powergating_state +ffffffff81d9d160 t dce_v11_0_audio_endpt_rreg +ffffffff81d9d1f0 t dce_v11_0_audio_endpt_wreg +ffffffff81d9d260 t dce_v11_0_bandwidth_update +ffffffff81d9dcc0 t dce_v11_0_vblank_get_counter +ffffffff81d9dd10 t dce_v11_0_hpd_sense +ffffffff81d9dd70 t dce_v11_0_hpd_set_polarity +ffffffff81d9de40 t dce_v11_0_hpd_get_gpio_reg +ffffffff81d9de70 t dce_v11_0_page_flip +ffffffff81d9df60 t dce_v11_0_crtc_get_scanoutpos +ffffffff81d9e000 t dce_v11_0_encoder_add +ffffffff81d9e230 t dce_v11_0_latency_watermark +ffffffff81d9e450 t dce_v11_0_encoder_destroy +ffffffff81d9e4a0 t dce_v11_0_encoder_prepare +ffffffff81d9e6a0 t dce_v11_0_encoder_commit +ffffffff81d9e6d0 t dce_v11_0_encoder_mode_set +ffffffff81d9f570 t dce_v11_0_encoder_disable +ffffffff81d9f680 t dce_v11_0_ext_dpms +ffffffff81d9f6b0 t dce_v11_0_ext_prepare +ffffffff81d9f6e0 t dce_v11_0_ext_commit +ffffffff81d9f710 t dce_v11_0_ext_mode_set +ffffffff81d9f740 t dce_v11_0_ext_disable +ffffffff81d9f770 t dce_v11_0_set_crtc_irq_state +ffffffff81d9f850 t dce_v11_0_crtc_irq +ffffffff81d9fa70 t dce_v11_0_set_crtc_vblank_interrupt_state +ffffffff81d9fb40 t dce_v11_0_set_crtc_vline_interrupt_state +ffffffff81d9fc10 t dce_v11_0_set_pageflip_irq_state +ffffffff81d9fcc0 t dce_v11_0_pageflip_irq +ffffffff81d9fe20 t dce_v11_0_set_hpd_irq_state +ffffffff81d9fee0 t dce_v11_0_hpd_irq +ffffffff81da0000 t dce_v11_0_crtc_cursor_set2 +ffffffff81da0370 t dce_v11_0_crtc_cursor_move +ffffffff81da0440 t dce_v11_0_crtc_gamma_set +ffffffff81da0480 t dce_v11_0_crtc_destroy +ffffffff81da04b0 t amdgpu_bo_reserve +ffffffff81da06c0 t amdgpu_bo_unreserve +ffffffff81da07a0 t dce_v11_0_cursor_move_locked +ffffffff81da08f0 t dce_v11_0_crtc_load_lut +ffffffff81da0c60 t dce_v11_0_crtc_dpms +ffffffff81da0e30 t dce_v11_0_crtc_prepare +ffffffff81da0e70 t dce_v11_0_crtc_commit +ffffffff81da0ea0 t dce_v11_0_crtc_mode_fixup +ffffffff81da1110 t dce_v11_0_crtc_mode_set +ffffffff81da1370 t dce_v11_0_crtc_set_base +ffffffff81da1390 t dce_v11_0_crtc_set_base_atomic +ffffffff81da13b0 t dce_v11_0_crtc_disable +ffffffff81da1550 t dce_v11_0_crtc_do_set_base +ffffffff81da2000 t df_v1_7_sw_init +ffffffff81da2040 t df_v1_7_sw_fini +ffffffff81da2070 t df_v1_7_enable_broadcast_mode +ffffffff81da2190 t df_v1_7_get_fb_channel_number +ffffffff81da2210 t df_v1_7_get_hbm_channel_number +ffffffff81da2260 t df_v1_7_update_medium_grain_clock_gating +ffffffff81da23d0 t df_v1_7_get_clockgating_state +ffffffff81da2460 t df_v1_7_enable_ecc_force_par_wr_rmw +ffffffff81da3000 t df_v3_6_sw_init +ffffffff81da3140 t df_v3_6_sw_fini +ffffffff81da3170 t df_v3_6_enable_broadcast_mode +ffffffff81da3290 t df_v3_6_get_fb_channel_number +ffffffff81da3360 t df_v3_6_get_hbm_channel_number +ffffffff81da33b0 t df_v3_6_update_medium_grain_clock_gating +ffffffff81da3550 t df_v3_6_get_clockgating_state +ffffffff81da35e0 t df_v3_6_pmc_start +ffffffff81da3960 t df_v3_6_pmc_stop +ffffffff81da3bf0 t df_v3_6_pmc_get_count +ffffffff81da3d70 t df_v3_6_get_fica +ffffffff81da3e70 t df_v3_6_set_fica +ffffffff81da3f40 t df_v3_6_query_ras_poison_mode +ffffffff81da40b0 t df_v3_6_perfmon_arm_with_status +ffffffff81da5000 T dimgrey_cavefish_reg_base_init +ffffffff81da6000 T emu_soc_asic_init +ffffffff81da7000 t gfx_v10_0_early_init +ffffffff81da7420 t gfx_v10_0_late_init +ffffffff81da7490 t gfx_v10_0_sw_init +ffffffff81da8830 t gfx_v10_0_sw_fini +ffffffff81da8b60 t gfx_v10_0_hw_init +ffffffff81dab710 t gfx_v10_0_hw_fini +ffffffff81dab9f0 t gfx_v10_0_suspend +ffffffff81daba30 t gfx_v10_0_resume +ffffffff81daba40 t gfx_v10_0_is_idle +ffffffff81dabac0 t gfx_v10_0_wait_for_idle +ffffffff81dabba0 t gfx_v10_0_soft_reset +ffffffff81dabef0 t gfx_v10_0_set_clockgating_state +ffffffff81dac190 t gfx_v10_0_set_powergating_state +ffffffff81dac3b0 t gfx_v10_0_get_clockgating_state +ffffffff81dac4c0 t gfx10_kiq_set_resources +ffffffff81dac7f0 t gfx10_kiq_map_queues +ffffffff81dacb80 t gfx10_kiq_unmap_queues +ffffffff81dacf80 t gfx10_kiq_query_status +ffffffff81dad280 t gfx10_kiq_invalidate_tlbs +ffffffff81dad3a0 t gfx_v10_0_ring_get_rptr_compute +ffffffff81dad3d0 t gfx_v10_0_ring_get_wptr_compute +ffffffff81dad430 t gfx_v10_0_ring_set_wptr_compute +ffffffff81dad570 t gfx_v10_0_ring_emit_ib_compute +ffffffff81dad8c0 t gfx_v10_0_ring_emit_fence_kiq +ffffffff81dadcf0 t gfx_v10_0_ring_test_ring +ffffffff81dadf60 t gfx_v10_0_ring_test_ib +ffffffff81dae200 t gfx_v10_0_ring_emit_rreg +ffffffff81dae490 t gfx_v10_0_ring_emit_wreg +ffffffff81dae6c0 t gfx_v10_0_ring_emit_reg_wait +ffffffff81dae710 t gfx_v10_0_ring_emit_reg_write_reg_wait +ffffffff81dae7a0 t gfx_v10_0_wait_reg_mem +ffffffff81daead0 t gfx_v10_0_ring_get_rptr_gfx +ffffffff81daeb00 t gfx_v10_0_ring_get_wptr_gfx +ffffffff81daec10 t gfx_v10_0_ring_set_wptr_gfx +ffffffff81daee20 t gfx_v10_0_ring_emit_ib_gfx +ffffffff81daf4d0 t gfx_v10_0_ring_emit_fence +ffffffff81daf8a0 t gfx_v10_0_ring_emit_pipeline_sync +ffffffff81daf900 t gfx_v10_0_ring_emit_vm_flush +ffffffff81dafad0 t gfx_v10_0_ring_emit_hdp_flush +ffffffff81dafba0 t gfx_v10_0_ring_emit_gds_switch +ffffffff81dafc80 t gfx_v10_0_ring_emit_init_cond_exec +ffffffff81dafeb0 t gfx_v10_0_ring_emit_patch_cond_exec +ffffffff81daff70 t gfx_v10_0_ring_emit_sb +ffffffff81db0050 t gfx_v10_0_ring_emit_cntxcntl +ffffffff81db0530 t gfx_v10_0_ring_emit_frame_cntl +ffffffff81db0640 t gfx_v10_0_ring_soft_recovery +ffffffff81db06b0 t gfx_v10_0_ring_preempt_ib +ffffffff81db0820 t gfx_v10_0_emit_mem_sync +ffffffff81db0b60 t gfx_v10_0_write_data_to_reg +ffffffff81db0d70 t gfx_v10_0_set_eop_interrupt_state +ffffffff81db0e50 t gfx_v10_0_eop_irq +ffffffff81db1020 t gfx_v10_0_set_gfx_eop_interrupt_state +ffffffff81db11b0 t gfx_v10_0_set_compute_eop_interrupt_state +ffffffff81db1360 t gfx_v10_0_kiq_set_interrupt_state +ffffffff81db1630 t gfx_v10_0_kiq_irq +ffffffff81db16b0 t gfx_v10_0_set_priv_reg_fault_state +ffffffff81db17d0 t gfx_v10_0_priv_reg_irq +ffffffff81db1830 t gfx_v10_0_handle_priv_fault +ffffffff81db19c0 t gfx_v10_0_set_priv_inst_fault_state +ffffffff81db1ae0 t gfx_v10_0_priv_inst_irq +ffffffff81db1b40 t gfx_v10_0_is_rlc_enabled +ffffffff81db1bc0 t gfx_v10_0_set_safe_mode +ffffffff81db1e50 t gfx_v10_0_unset_safe_mode +ffffffff81db1f00 t gfx_v10_0_rlc_init +ffffffff81db1f70 t gfx_v10_0_get_csb_size +ffffffff81db1fc0 t gfx_v10_0_get_csb_buffer +ffffffff81db2140 t gfx_v10_0_rlc_resume +ffffffff81db2c40 t gfx_v10_0_rlc_stop +ffffffff81db2d10 t gfx_v10_0_rlc_reset +ffffffff81db2ea0 t gfx_v10_0_rlc_start +ffffffff81db3040 t gfx_v10_0_update_spm_vmid +ffffffff81db3170 t gfx_v10_0_wait_for_rlc_autoload_complete +ffffffff81db3d00 t gfx_v10_0_init_csb +ffffffff81db3fd0 t gfx_v10_0_is_rlcg_access_range +ffffffff81db4000 t gfx_v10_0_gfx_mqd_init +ffffffff81db43e0 t gfx_v10_0_compute_mqd_init +ffffffff81db4880 t amdgpu_bo_unreserve +ffffffff81db4960 t gfx_v10_0_get_gpu_clock_counter +ffffffff81db4e50 t gfx_v10_0_select_se_sh +ffffffff81db4ee0 t gfx_v10_0_read_wave_data +ffffffff81db5140 t gfx_v10_0_read_wave_vgprs +ffffffff81db5170 t gfx_v10_0_read_wave_sgprs +ffffffff81db51f0 t gfx_v10_0_select_me_pipe_q +ffffffff81db5210 t gfx_v10_0_init_spm_golden_registers +ffffffff81db5280 t gfx_v10_0_update_perfmon_mgcg +ffffffff81db53a0 t wave_read_ind +ffffffff81db5480 t wave_read_regs +ffffffff81db55e0 t gfx_v10_0_cp_resume +ffffffff81db8220 t gfx_v10_3_get_disabled_sa +ffffffff81db8330 t gfx_v10_0_get_rb_active_bitmap +ffffffff81db8450 t gfx_v10_0_get_wgp_active_bitmap_per_sh +ffffffff81db8560 t gfx_v10_0_enable_gui_idle_interrupt +ffffffff81db8670 t gfx_v10_0_cp_gfx_enable +ffffffff81db88b0 t gfx_v10_0_cp_compute_enable +ffffffff81db8a40 t amdgpu_bo_reserve +ffffffff81db8bc0 t gfx_v10_0_kiq_init_register +ffffffff81db9a30 t gfx_v10_0_cp_gfx_switch_pipe +ffffffff81db9b30 t gfx_v10_0_cp_gfx_set_doorbell +ffffffff81db9e00 t gfx_v10_0_cp_gfx_start +ffffffff81dba7e0 t gfx_v10_0_update_fine_grain_clock_gating +ffffffff81dbab00 t gfx_v10_0_update_medium_grain_clock_gating +ffffffff81dbb220 t gfx_v10_0_update_3d_clock_gating +ffffffff81dbb5e0 t gfx_v10_0_update_coarse_grain_clock_gating +ffffffff81dbc000 t gfx_v11_0_early_init +ffffffff81dbc390 t gfx_v11_0_late_init +ffffffff81dbc400 t gfx_v11_0_sw_init +ffffffff81dbd300 t gfx_v11_0_sw_fini +ffffffff81dbd5d0 t gfx_v11_0_hw_init +ffffffff81dc19e0 t gfx_v11_0_hw_fini +ffffffff81dc1c50 t gfx_v11_0_suspend +ffffffff81dc1c90 t gfx_v11_0_resume +ffffffff81dc1ca0 t gfx_v11_0_is_idle +ffffffff81dc1d20 t gfx_v11_0_wait_for_idle +ffffffff81dc1e00 t gfx_v11_0_check_soft_reset +ffffffff81dc1f30 t gfx_v11_0_soft_reset +ffffffff81dc2c10 t gfx_v11_0_set_clockgating_state +ffffffff81dc37f0 t gfx_v11_0_set_powergating_state +ffffffff81dc39e0 t gfx_v11_0_get_clockgating_state +ffffffff81dc3bb0 t gfx11_kiq_set_resources +ffffffff81dc3ee0 t gfx11_kiq_map_queues +ffffffff81dc4270 t gfx11_kiq_unmap_queues +ffffffff81dc4670 t gfx11_kiq_query_status +ffffffff81dc4970 t gfx11_kiq_invalidate_tlbs +ffffffff81dc4a90 t gfx_v11_0_ring_get_rptr_compute +ffffffff81dc4ac0 t gfx_v11_0_ring_get_wptr_compute +ffffffff81dc4b20 t gfx_v11_0_ring_set_wptr_compute +ffffffff81dc4c60 t gfx_v11_0_ring_emit_ib_compute +ffffffff81dc4fb0 t gfx_v11_0_ring_emit_fence_kiq +ffffffff81dc53e0 t gfx_v11_0_ring_test_ring +ffffffff81dc5670 t gfx_v11_0_ring_test_ib +ffffffff81dc5930 t gfx_v11_0_ring_emit_rreg +ffffffff81dc5bc0 t gfx_v11_0_ring_emit_wreg +ffffffff81dc5df0 t gfx_v11_0_ring_emit_reg_wait +ffffffff81dc5e40 t gfx_v11_0_ring_emit_reg_write_reg_wait +ffffffff81dc5ea0 t gfx_v11_0_wait_reg_mem +ffffffff81dc61d0 t gfx_v11_0_ring_get_rptr_gfx +ffffffff81dc6200 t gfx_v11_0_ring_get_wptr_gfx +ffffffff81dc6310 t gfx_v11_0_ring_set_wptr_gfx +ffffffff81dc6520 t gfx_v11_0_ring_emit_ib_gfx +ffffffff81dc6bc0 t gfx_v11_0_ring_emit_fence +ffffffff81dc6f90 t gfx_v11_0_ring_emit_pipeline_sync +ffffffff81dc6ff0 t gfx_v11_0_ring_emit_vm_flush +ffffffff81dc71c0 t gfx_v11_0_ring_emit_hdp_flush +ffffffff81dc7290 t gfx_v11_0_ring_emit_gds_switch +ffffffff81dc7370 t gfx_v11_0_ring_emit_init_cond_exec +ffffffff81dc75a0 t gfx_v11_0_ring_emit_patch_cond_exec +ffffffff81dc7660 t gfx_v11_0_ring_emit_cntxcntl +ffffffff81dc77c0 t gfx_v11_0_ring_emit_frame_cntl +ffffffff81dc78d0 t gfx_v11_0_ring_soft_recovery +ffffffff81dc7940 t gfx_v11_0_ring_preempt_ib +ffffffff81dc7ab0 t gfx_v11_0_emit_mem_sync +ffffffff81dc7df0 t gfx_v11_0_write_data_to_reg +ffffffff81dc8000 t gfx_v11_0_set_eop_interrupt_state +ffffffff81dc8090 t gfx_v11_0_eop_irq +ffffffff81dc8260 t gfx_v11_0_set_gfx_eop_interrupt_state +ffffffff81dc83f0 t gfx_v11_0_set_compute_eop_interrupt_state +ffffffff81dc8580 t gfx_v11_0_set_priv_reg_fault_state +ffffffff81dc86a0 t gfx_v11_0_priv_reg_irq +ffffffff81dc8700 t gfx_v11_0_handle_priv_fault +ffffffff81dc8890 t gfx_v11_0_set_priv_inst_fault_state +ffffffff81dc89b0 t gfx_v11_0_priv_inst_irq +ffffffff81dc8a10 t gfx_v11_0_is_rlc_enabled +ffffffff81dc8a90 t gfx_v11_0_set_safe_mode +ffffffff81dc8be0 t gfx_v11_0_unset_safe_mode +ffffffff81dc8c40 t gfx_v11_0_rlc_init +ffffffff81dc8cb0 t gfx_v11_0_get_csb_size +ffffffff81dc8d00 t gfx_v11_0_get_csb_buffer +ffffffff81dc8e80 t gfx_v11_0_rlc_resume +ffffffff81dc9ba0 t gfx_v11_0_rlc_stop +ffffffff81dc9c70 t gfx_v11_0_rlc_reset +ffffffff81dc9e00 t gfx_v11_0_rlc_start +ffffffff81dc9fa0 t gfx_v11_0_update_spm_vmid +ffffffff81dca0a0 t gfx_v11_0_init_csb +ffffffff81dca220 t gfx_v11_0_gfx_mqd_init +ffffffff81dca5f0 t gfx_v11_0_compute_mqd_init +ffffffff81dcab10 t amdgpu_bo_unreserve +ffffffff81dcabf0 t gfx_v11_0_get_gpu_clock_counter +ffffffff81dcad20 t gfx_v11_0_select_se_sh +ffffffff81dcadb0 t gfx_v11_0_read_wave_data +ffffffff81dcaff0 t gfx_v11_0_read_wave_vgprs +ffffffff81dcb020 t gfx_v11_0_read_wave_sgprs +ffffffff81dcb0a0 t gfx_v11_0_select_me_pipe_q +ffffffff81dcb0c0 t gfx_v11_0_update_perf_clk +ffffffff81dcb1f0 t wave_read_ind +ffffffff81dcb2d0 t wave_read_regs +ffffffff81dcb430 t gfx_v11_0_disable_gpa_mode +ffffffff81dcb5c0 t gfx_v11_0_cp_resume +ffffffff81dcf660 t gfx_v11_0_config_me_cache +ffffffff81dcfa00 t gfx_v11_0_config_pfp_cache +ffffffff81dcfda0 t gfx_v11_0_config_mec_cache +ffffffff81dd0140 t gfx_v11_0_enable_gui_idle_interrupt +ffffffff81dd0250 t gfx_v11_0_cp_compute_enable +ffffffff81dd0420 t gfx_v11_0_cp_gfx_enable +ffffffff81dd0610 t amdgpu_bo_reserve +ffffffff81dd0790 t gfx_v11_0_kiq_init_register +ffffffff81dd1600 t gfx_v11_0_cp_gfx_switch_pipe +ffffffff81dd16e0 t gfx_v11_0_cp_gfx_set_doorbell +ffffffff81dd18c0 t gfx_v11_0_cp_gfx_start +ffffffff81dd3000 t gfx_v8_0_early_init +ffffffff81dd3310 t gfx_v8_0_late_init +ffffffff81dd3a10 t gfx_v8_0_sw_init +ffffffff81dd50e0 t gfx_v8_0_sw_fini +ffffffff81dd5390 t gfx_v8_0_hw_init +ffffffff81dd75c0 t gfx_v8_0_hw_fini +ffffffff81dd7ab0 t gfx_v8_0_suspend +ffffffff81dd7af0 t gfx_v8_0_resume +ffffffff81dd7b00 t gfx_v8_0_is_idle +ffffffff81dd7b70 t gfx_v8_0_wait_for_idle +ffffffff81dd7c10 t gfx_v8_0_check_soft_reset +ffffffff81dd7cf0 t gfx_v8_0_pre_soft_reset +ffffffff81dd7e70 t gfx_v8_0_soft_reset +ffffffff81dd8020 t gfx_v8_0_post_soft_reset +ffffffff81dd81d0 t gfx_v8_0_set_clockgating_state +ffffffff81dd8490 t gfx_v8_0_set_powergating_state +ffffffff81dd8840 t gfx_v8_0_get_clockgating_state +ffffffff81dd8920 t gfx_v8_0_get_gpu_clock_counter +ffffffff81dd89b0 t gfx_v8_0_select_se_sh +ffffffff81dd8a10 t gfx_v8_0_read_wave_data +ffffffff81dd8eb0 t gfx_v8_0_read_wave_sgprs +ffffffff81dd8f60 t gfx_v8_0_select_me_pipe_q +ffffffff81dd8f80 t gfx_v8_0_ring_get_rptr +ffffffff81dd8fb0 t gfx_v8_0_ring_get_wptr_compute +ffffffff81dd8fe0 t gfx_v8_0_ring_set_wptr_compute +ffffffff81dd9010 t gfx_v8_0_ring_emit_fence_kiq +ffffffff81dd9440 t gfx_v8_0_ring_test_ring +ffffffff81dd9640 t gfx_v8_0_ring_emit_rreg +ffffffff81dd98d0 t gfx_v8_0_ring_emit_wreg +ffffffff81dd9b00 t gfx_v8_0_ring_get_wptr_gfx +ffffffff81dd9b50 t gfx_v8_0_ring_set_wptr_gfx +ffffffff81dd9bc0 t gfx_v8_0_ring_emit_ib_gfx +ffffffff81dda120 t gfx_v8_0_ring_emit_fence_gfx +ffffffff81dda620 t gfx_v8_0_ring_emit_pipeline_sync +ffffffff81dda910 t gfx_v8_0_ring_emit_vm_flush +ffffffff81ddacc0 t gfx_v8_0_ring_emit_hdp_flush +ffffffff81ddafe0 t gfx_v8_0_ring_emit_gds_switch +ffffffff81ddb7a0 t gfx_v8_0_ring_test_ib +ffffffff81ddb950 t gfx_v8_0_ring_emit_init_cond_exec +ffffffff81ddbb80 t gfx_v8_0_ring_emit_patch_cond_exec +ffffffff81ddbc30 t gfx_v8_ring_emit_sb +ffffffff81ddbd10 t gfx_v8_ring_emit_cntxcntl +ffffffff81ddc2b0 t gfx_v8_0_ring_soft_recovery +ffffffff81ddc2d0 t gfx_v8_0_emit_mem_sync +ffffffff81ddc4d0 t gfx_v8_0_ring_emit_ib_compute +ffffffff81ddc7d0 t gfx_v8_0_ring_emit_fence_compute +ffffffff81ddcad0 t gfx_v8_0_emit_mem_sync_compute +ffffffff81ddcd90 t gfx_v8_0_emit_wave_limit +ffffffff81ddcf40 t gfx_v8_0_set_eop_interrupt_state +ffffffff81ddd150 t gfx_v8_0_eop_irq +ffffffff81ddd280 t gfx_v8_0_set_priv_reg_fault_state +ffffffff81ddd2f0 t gfx_v8_0_priv_reg_irq +ffffffff81ddd410 t gfx_v8_0_set_priv_inst_fault_state +ffffffff81ddd480 t gfx_v8_0_priv_inst_irq +ffffffff81ddd5a0 t gfx_v8_0_set_cp_ecc_int_state +ffffffff81ddd810 t gfx_v8_0_cp_ecc_error_irq +ffffffff81ddd850 t gfx_v8_0_set_sq_int_state +ffffffff81ddd8d0 t gfx_v8_0_sq_irq +ffffffff81ddd960 t gfx_v8_0_parse_sq_irq +ffffffff81dddbb0 t gfx_v8_0_is_rlc_enabled +ffffffff81dddbf0 t gfx_v8_0_set_safe_mode +ffffffff81dddce0 t gfx_v8_0_unset_safe_mode +ffffffff81dddd80 t gfx_v8_0_rlc_init +ffffffff81ddde20 t gfx_v8_0_get_csb_size +ffffffff81ddde70 t gfx_v8_0_get_csb_buffer +ffffffff81dddff0 t gfx_v8_0_cp_jump_table_num +ffffffff81dde030 t gfx_v8_0_rlc_resume +ffffffff81dde3b0 t gfx_v8_0_rlc_stop +ffffffff81dde420 t gfx_v8_0_rlc_reset +ffffffff81dde4a0 t gfx_v8_0_rlc_start +ffffffff81dde520 t gfx_v8_0_update_spm_vmid +ffffffff81dde590 t gfx_v8_0_init_save_restore_list +ffffffff81dde9b0 t gfx_v8_0_wait_for_rlc_serdes +ffffffff81ddebd0 t gfx_v8_0_sq_irq_work_func +ffffffff81ddebf0 t amdgpu_bo_unreserve +ffffffff81ddecd0 t gfx_v8_0_kiq_resume +ffffffff81ddef30 t gfx_v8_0_cp_gfx_resume +ffffffff81ddfa50 t gfx_v8_0_kcq_resume +ffffffff81de0480 t amdgpu_bo_reserve +ffffffff81de0600 t gfx_v8_0_mqd_commit +ffffffff81de07e0 t gfx_v8_0_mqd_init +ffffffff81de0c00 t gfx_v8_0_deactivate_hqd +ffffffff81de0cc0 t gfx_v8_0_update_medium_grain_clock_gating +ffffffff81de0ff0 t gfx_v8_0_update_coarse_grain_clock_gating +ffffffff81de2000 t gfx_v9_0_ras_error_inject +ffffffff81de21a0 t gfx_v9_0_query_ras_error_count +ffffffff81de2d40 t gfx_v9_0_reset_ras_error_count +ffffffff81de3780 T gfx_v9_0_select_se_sh +ffffffff81de3820 t gfx_v9_0_early_init +ffffffff81de3c70 t gfx_v9_0_late_init +ffffffff81de4980 t gfx_v9_0_sw_init +ffffffff81de5fe0 t gfx_v9_0_sw_fini +ffffffff81de6280 t gfx_v9_0_hw_init +ffffffff81de9310 t gfx_v9_0_hw_fini +ffffffff81de9a70 t gfx_v9_0_suspend +ffffffff81de9ab0 t gfx_v9_0_resume +ffffffff81de9ac0 t gfx_v9_0_is_idle +ffffffff81de9b40 t gfx_v9_0_wait_for_idle +ffffffff81de9c20 t gfx_v9_0_soft_reset +ffffffff81de9fa0 t gfx_v9_0_set_clockgating_state +ffffffff81dea060 t gfx_v9_0_set_powergating_state +ffffffff81dea450 t gfx_v9_0_get_clockgating_state +ffffffff81dea560 t gfx_v9_0_kiq_set_resources +ffffffff81dea890 t gfx_v9_0_kiq_map_queues +ffffffff81deabd0 t gfx_v9_0_kiq_unmap_queues +ffffffff81deaf50 t gfx_v9_0_kiq_query_status +ffffffff81deb250 t gfx_v9_0_kiq_invalidate_tlbs +ffffffff81deb370 t gfx_v9_0_ring_get_rptr_compute +ffffffff81deb3a0 t gfx_v9_0_ring_get_wptr_compute +ffffffff81deb400 t gfx_v9_0_ring_set_wptr_compute +ffffffff81deb460 t gfx_v9_0_ring_emit_fence_kiq +ffffffff81deb890 t gfx_v9_0_ring_test_ring +ffffffff81debac0 t gfx_v9_0_ring_emit_rreg +ffffffff81debd50 t gfx_v9_0_ring_emit_wreg +ffffffff81debf80 t gfx_v9_0_ring_emit_reg_wait +ffffffff81debfd0 t gfx_v9_0_ring_emit_reg_write_reg_wait +ffffffff81dec070 t gfx_v9_0_wait_reg_mem +ffffffff81dec3a0 t gfx_v9_0_ring_get_rptr_gfx +ffffffff81dec3d0 t gfx_v9_0_ring_get_wptr_gfx +ffffffff81dec4e0 t gfx_v9_0_ring_set_wptr_gfx +ffffffff81dec600 t gfx_v9_0_ring_emit_ib_gfx +ffffffff81decb20 t gfx_v9_0_ring_emit_fence +ffffffff81decee0 t gfx_v9_0_ring_emit_pipeline_sync +ffffffff81decf40 t gfx_v9_0_ring_emit_vm_flush +ffffffff81ded050 t gfx_v9_0_ring_emit_hdp_flush +ffffffff81ded120 t gfx_v9_0_ring_emit_gds_switch +ffffffff81ded200 t gfx_v9_0_ring_test_ib +ffffffff81ded3b0 t gfx_v9_0_ring_emit_init_cond_exec +ffffffff81ded5e0 t gfx_v9_0_ring_emit_patch_cond_exec +ffffffff81ded6b0 t gfx_v9_ring_emit_sb +ffffffff81ded790 t gfx_v9_ring_emit_cntxcntl +ffffffff81dedb80 t gfx_v9_0_ring_emit_frame_cntl +ffffffff81dedc90 t gfx_v9_0_ring_soft_recovery +ffffffff81dedd00 t gfx_v9_0_emit_mem_sync +ffffffff81dedfc0 t gfx_v9_0_write_data_to_reg +ffffffff81dee1d0 t gfx_v9_0_ring_emit_ib_compute +ffffffff81dee500 t gfx_v9_0_emit_wave_limit +ffffffff81dee6d0 t gfx_v9_0_set_eop_interrupt_state +ffffffff81dee8a0 t gfx_v9_0_eop_irq +ffffffff81dee9d0 t gfx_v9_0_set_compute_eop_interrupt_state +ffffffff81deeb80 t gfx_v9_0_set_priv_reg_fault_state +ffffffff81deeca0 t gfx_v9_0_priv_reg_irq +ffffffff81deedc0 t gfx_v9_0_set_priv_inst_fault_state +ffffffff81deeee0 t gfx_v9_0_priv_inst_irq +ffffffff81def000 t gfx_v9_0_set_cp_ecc_error_state +ffffffff81def830 t gfx_v9_0_is_rlc_enabled +ffffffff81def8b0 t gfx_v9_0_set_safe_mode +ffffffff81defa00 t gfx_v9_0_unset_safe_mode +ffffffff81defa60 t gfx_v9_0_rlc_init +ffffffff81df0270 t gfx_v9_0_get_csb_size +ffffffff81df02c0 t gfx_v9_0_get_csb_buffer +ffffffff81df0410 t gfx_v9_0_cp_jump_table_num +ffffffff81df0460 t gfx_v9_0_rlc_resume +ffffffff81df11f0 t gfx_v9_0_rlc_stop +ffffffff81df1680 t gfx_v9_0_rlc_reset +ffffffff81df1810 t gfx_v9_0_rlc_start +ffffffff81df1950 t gfx_v9_0_update_spm_vmid +ffffffff81df1a80 t gfx_v9_0_is_rlcg_access_range +ffffffff81df1ad0 t gfx_v9_0_init_always_on_cu_mask +ffffffff81df1e30 t gfx_v9_0_init_csb +ffffffff81df1fc0 t gfx_v9_0_enable_lbpw +ffffffff81df20b0 t gfx_v9_0_enable_gui_idle_interrupt +ffffffff81df21b0 t amdgpu_bo_unreserve +ffffffff81df2290 t gfx_v9_0_get_gpu_clock_counter +ffffffff81df2a10 t gfx_v9_0_read_wave_data +ffffffff81df2c50 t gfx_v9_0_read_wave_vgprs +ffffffff81df2c70 t gfx_v9_0_read_wave_sgprs +ffffffff81df2cc0 t gfx_v9_0_select_me_pipe_q +ffffffff81df2ce0 t wave_read_ind +ffffffff81df2df0 t wave_read_regs +ffffffff81df2f60 t gfx_v9_0_cp_gfx_enable +ffffffff81df3040 t amdgpu_bo_reserve +ffffffff81df31c0 t gfx_v9_0_kiq_init_register +ffffffff81df3e40 t gfx_v9_0_mqd_init +ffffffff81df4380 t gfx_v9_0_update_medium_grain_clock_gating +ffffffff81df4890 t gfx_v9_0_update_3d_clock_gating +ffffffff81df4c70 t gfx_v9_0_update_coarse_grain_clock_gating +ffffffff81df5000 t gfx_v9_4_ras_error_inject +ffffffff81df5130 t gfx_v9_4_query_ras_error_count +ffffffff81df5ef0 t gfx_v9_4_query_ras_error_status +ffffffff81df60b0 t gfx_v9_4_reset_ras_error_count +ffffffff81df7000 T gfx_v9_4_2_do_edc_gpr_workarounds +ffffffff81df7790 T gfx_v9_4_2_init_golden_registers +ffffffff81df7820 T gfx_v9_4_2_debug_trap_config_init +ffffffff81df78c0 T gfx_v9_4_2_set_power_brake_sequence +ffffffff81df7a90 t gfx_v9_4_2_ras_error_inject +ffffffff81df7bc0 t gfx_v9_4_2_query_ras_error_count +ffffffff81df7c70 t gfx_v9_4_2_query_ras_error_status +ffffffff81df84b0 t gfx_v9_4_2_reset_ras_error_count +ffffffff81df8510 t gfx_v9_4_2_reset_ras_error_status +ffffffff81df89d0 t gfx_v9_4_2_enable_watchdog_timer +ffffffff81df8bf0 t gfx_v9_4_2_query_uctl2_poison_status +ffffffff81df8c70 t gfx_v9_4_2_run_shader +ffffffff81df8ff0 t gfx_v9_4_2_wait_for_waves_assigned +ffffffff81df9630 t gfx_v9_4_2_query_sram_edc_count +ffffffff81df9980 t gfx_v9_4_2_query_utc_edc_count +ffffffff81df9b60 t wave_read_ind +ffffffff81dfa000 t gfxhub_v1_0_get_mc_fb_offset +ffffffff81dfa080 t gfxhub_v1_0_setup_vm_pt_regs +ffffffff81dfa1b0 t gfxhub_v1_0_gart_enable +ffffffff81dfb690 t gfxhub_v1_0_gart_disable +ffffffff81dfb910 t gfxhub_v1_0_set_fault_enable_default +ffffffff81dfba00 t gfxhub_v1_0_init +ffffffff81dfc000 T gfxhub_v1_1_get_xgmi_info +ffffffff81dfd000 t gfxhub_v2_0_get_fb_location +ffffffff81dfd090 t gfxhub_v2_0_get_mc_fb_offset +ffffffff81dfd110 t gfxhub_v2_0_setup_vm_pt_regs +ffffffff81dfd240 t gfxhub_v2_0_gart_enable +ffffffff81dfe440 t gfxhub_v2_0_gart_disable +ffffffff81dfe670 t gfxhub_v2_0_set_fault_enable_default +ffffffff81dfe760 t gfxhub_v2_0_init +ffffffff81dfe820 t gfxhub_v2_0_print_l2_protection_fault_status +ffffffff81dfea00 t gfxhub_v2_0_get_invalidate_req +ffffffff81dff000 t gfxhub_v2_1_get_fb_location +ffffffff81dff090 t gfxhub_v2_1_get_mc_fb_offset +ffffffff81dff110 t gfxhub_v2_1_setup_vm_pt_regs +ffffffff81dff240 t gfxhub_v2_1_gart_enable +ffffffff81e00520 t gfxhub_v2_1_gart_disable +ffffffff81e007a0 t gfxhub_v2_1_set_fault_enable_default +ffffffff81e008b0 t gfxhub_v2_1_init +ffffffff81e00970 t gfxhub_v2_1_get_xgmi_info +ffffffff81e00aa0 t gfxhub_v2_1_utcl2_harvest +ffffffff81e00c70 t gfxhub_v2_1_save_regs +ffffffff81e016a0 t gfxhub_v2_1_restore_regs +ffffffff81e02270 t gfxhub_v2_1_halt +ffffffff81e02630 t gfxhub_v2_1_print_l2_protection_fault_status +ffffffff81e02810 t gfxhub_v2_1_get_invalidate_req +ffffffff81e03000 t gfxhub_v3_0_get_fb_location +ffffffff81e03090 t gfxhub_v3_0_get_mc_fb_offset +ffffffff81e03110 t gfxhub_v3_0_setup_vm_pt_regs +ffffffff81e03240 t gfxhub_v3_0_gart_enable +ffffffff81e044c0 t gfxhub_v3_0_gart_disable +ffffffff81e04740 t gfxhub_v3_0_set_fault_enable_default +ffffffff81e04ae0 t gfxhub_v3_0_init +ffffffff81e04ba0 t gfxhub_v3_0_print_l2_protection_fault_status +ffffffff81e04d80 t gfxhub_v3_0_get_invalidate_req +ffffffff81e05000 t gfxhub_v3_0_3_get_fb_location +ffffffff81e05090 t gfxhub_v3_0_3_get_mc_fb_offset +ffffffff81e05110 t gfxhub_v3_0_3_setup_vm_pt_regs +ffffffff81e05240 t gfxhub_v3_0_3_gart_enable +ffffffff81e064c0 t gfxhub_v3_0_3_gart_disable +ffffffff81e06760 t gfxhub_v3_0_3_set_fault_enable_default +ffffffff81e06870 t gfxhub_v3_0_3_init +ffffffff81e06930 t gfxhub_v3_0_3_print_l2_protection_fault_status +ffffffff81e06b10 t gfxhub_v3_0_3_get_invalidate_req +ffffffff81e07000 t gmc_v10_0_early_init +ffffffff81e071f0 t gmc_v10_0_late_init +ffffffff81e07260 t gmc_v10_0_sw_init +ffffffff81e07680 t gmc_v10_0_sw_fini +ffffffff81e076d0 t gmc_v10_0_hw_init +ffffffff81e07890 t gmc_v10_0_hw_fini +ffffffff81e07930 t gmc_v10_0_suspend +ffffffff81e079d0 t gmc_v10_0_resume +ffffffff81e07a20 t gmc_v10_0_is_idle +ffffffff81e07a50 t gmc_v10_0_wait_for_idle +ffffffff81e07a80 t gmc_v10_0_soft_reset +ffffffff81e07ab0 t gmc_v10_0_set_clockgating_state +ffffffff81e07b60 t gmc_v10_0_set_powergating_state +ffffffff81e07b90 t gmc_v10_0_get_clockgating_state +ffffffff81e07c30 t gmc_v10_0_flush_gpu_tlb +ffffffff81e07ed0 t gmc_v10_0_flush_gpu_tlb_pasid +ffffffff81e080f0 t gmc_v10_0_emit_flush_gpu_tlb +ffffffff81e082a0 t gmc_v10_0_emit_pasid_mapping +ffffffff81e08300 t gmc_v10_0_map_mtype +ffffffff81e08350 t gmc_v10_0_get_vm_pde +ffffffff81e08440 t gmc_v10_0_get_vm_pte +ffffffff81e084e0 t gmc_v10_0_get_vbios_fb_size +ffffffff81e08640 t gmc_v10_0_flush_vm_hub +ffffffff81e08aa0 t gmc_v10_0_vm_fault_interrupt_state +ffffffff81e08b10 t gmc_v10_0_process_interrupt +ffffffff81e08dd0 t gmc_v10_0_ecc_interrupt_state +ffffffff81e09000 t gmc_v11_0_early_init +ffffffff81e09220 t gmc_v11_0_late_init +ffffffff81e09290 t gmc_v11_0_sw_init +ffffffff81e095b0 t gmc_v11_0_sw_fini +ffffffff81e09600 t gmc_v11_0_hw_init +ffffffff81e09740 t gmc_v11_0_hw_fini +ffffffff81e097d0 t gmc_v11_0_suspend +ffffffff81e09860 t gmc_v11_0_resume +ffffffff81e098b0 t gmc_v11_0_is_idle +ffffffff81e098e0 t gmc_v11_0_wait_for_idle +ffffffff81e09910 t gmc_v11_0_soft_reset +ffffffff81e09940 t gmc_v11_0_set_clockgating_state +ffffffff81e099b0 t gmc_v11_0_set_powergating_state +ffffffff81e099e0 t gmc_v11_0_get_clockgating_state +ffffffff81e09a10 t gmc_v11_0_flush_gpu_tlb +ffffffff81e09ee0 t gmc_v11_0_flush_gpu_tlb_pasid +ffffffff81e0a0d0 t gmc_v11_0_emit_flush_gpu_tlb +ffffffff81e0a270 t gmc_v11_0_emit_pasid_mapping +ffffffff81e0a2d0 t gmc_v11_0_map_mtype +ffffffff81e0a320 t gmc_v11_0_get_vm_pde +ffffffff81e0a410 t gmc_v11_0_get_vm_pte +ffffffff81e0a4b0 t gmc_v11_0_get_vbios_fb_size +ffffffff81e0a4e0 t gmc_v11_0_vm_fault_interrupt_state +ffffffff81e0a550 t gmc_v11_0_process_interrupt +ffffffff81e0a770 t gmc_v11_0_ecc_interrupt_state +ffffffff81e0b000 t gmc_v7_0_early_init +ffffffff81e0b090 t gmc_v7_0_late_init +ffffffff81e0b0d0 t gmc_v7_0_sw_init +ffffffff81e0b5d0 t gmc_v7_0_sw_fini +ffffffff81e0b680 t gmc_v7_0_hw_init +ffffffff81e0c030 t gmc_v7_0_hw_fini +ffffffff81e0c0f0 t gmc_v7_0_suspend +ffffffff81e0c130 t gmc_v7_0_resume +ffffffff81e0c180 t gmc_v7_0_is_idle +ffffffff81e0c1c0 t gmc_v7_0_wait_for_idle +ffffffff81e0c250 t gmc_v7_0_soft_reset +ffffffff81e0c4b0 t gmc_v7_0_set_clockgating_state +ffffffff81e0c710 t gmc_v7_0_set_powergating_state +ffffffff81e0c740 t gmc_v7_0_flush_gpu_tlb +ffffffff81e0c760 t gmc_v7_0_flush_gpu_tlb_pasid +ffffffff81e0c820 t gmc_v7_0_emit_flush_gpu_tlb +ffffffff81e0c8b0 t gmc_v7_0_emit_pasid_mapping +ffffffff81e0c8d0 t gmc_v7_0_set_prt +ffffffff81e0ca80 t gmc_v7_0_get_vm_pde +ffffffff81e0cae0 t gmc_v7_0_get_vm_pte +ffffffff81e0cb20 t gmc_v7_0_get_vbios_fb_size +ffffffff81e0cb90 t gmc_v7_0_vm_fault_interrupt_state +ffffffff81e0cc60 t gmc_v7_0_process_interrupt +ffffffff81e0d000 t gmc_v8_0_early_init +ffffffff81e0d090 t gmc_v8_0_late_init +ffffffff81e0d0d0 t gmc_v8_0_sw_init +ffffffff81e0d750 t gmc_v8_0_sw_fini +ffffffff81e0d800 t gmc_v8_0_hw_init +ffffffff81e0e4b0 t gmc_v8_0_hw_fini +ffffffff81e0e570 t gmc_v8_0_suspend +ffffffff81e0e5b0 t gmc_v8_0_resume +ffffffff81e0e600 t gmc_v8_0_is_idle +ffffffff81e0e640 t gmc_v8_0_wait_for_idle +ffffffff81e0e6d0 t gmc_v8_0_check_soft_reset +ffffffff81e0e740 t gmc_v8_0_pre_soft_reset +ffffffff81e0e8b0 t gmc_v8_0_soft_reset +ffffffff81e0e970 t gmc_v8_0_post_soft_reset +ffffffff81e0e9e0 t gmc_v8_0_set_clockgating_state +ffffffff81e0ef90 t gmc_v8_0_set_powergating_state +ffffffff81e0efc0 t gmc_v8_0_get_clockgating_state +ffffffff81e0f030 t gmc_v8_0_flush_gpu_tlb +ffffffff81e0f050 t gmc_v8_0_flush_gpu_tlb_pasid +ffffffff81e0f110 t gmc_v8_0_emit_flush_gpu_tlb +ffffffff81e0f1a0 t gmc_v8_0_emit_pasid_mapping +ffffffff81e0f1c0 t gmc_v8_0_set_prt +ffffffff81e0f370 t gmc_v8_0_get_vm_pde +ffffffff81e0f3d0 t gmc_v8_0_get_vm_pte +ffffffff81e0f420 t gmc_v8_0_get_vbios_fb_size +ffffffff81e0f490 t gmc_v8_0_vm_fault_interrupt_state +ffffffff81e0f560 t gmc_v8_0_process_interrupt +ffffffff81e10000 T gmc_v9_0_restore_registers +ffffffff81e10150 t gmc_v9_0_early_init +ffffffff81e10500 t gmc_v9_0_late_init +ffffffff81e10600 t gmc_v9_0_sw_init +ffffffff81e10cb0 t gmc_v9_0_sw_fini +ffffffff81e10d20 t gmc_v9_0_hw_init +ffffffff81e11110 t gmc_v9_0_hw_fini +ffffffff81e111d0 t gmc_v9_0_suspend +ffffffff81e11290 t gmc_v9_0_resume +ffffffff81e112e0 t gmc_v9_0_is_idle +ffffffff81e11310 t gmc_v9_0_wait_for_idle +ffffffff81e11340 t gmc_v9_0_soft_reset +ffffffff81e11370 t gmc_v9_0_set_clockgating_state +ffffffff81e113d0 t gmc_v9_0_set_powergating_state +ffffffff81e11400 t gmc_v9_0_get_clockgating_state +ffffffff81e11430 t gmc_v9_0_flush_gpu_tlb +ffffffff81e11a70 t gmc_v9_0_flush_gpu_tlb_pasid +ffffffff81e11d40 t gmc_v9_0_emit_flush_gpu_tlb +ffffffff81e11f10 t gmc_v9_0_emit_pasid_mapping +ffffffff81e11f80 t gmc_v9_0_map_mtype +ffffffff81e11fc0 t gmc_v9_0_get_vm_pde +ffffffff81e120c0 t gmc_v9_0_get_vm_pte +ffffffff81e12190 t gmc_v9_0_get_vbios_fb_size +ffffffff81e12320 t gmc_v9_0_vm_fault_interrupt_state +ffffffff81e126a0 t gmc_v9_0_process_interrupt +ffffffff81e12ce0 t gmc_v9_0_ecc_interrupt_state +ffffffff81e13000 t hdp_v4_0_query_ras_error_count +ffffffff81e130b0 t hdp_v4_0_reset_ras_error_count +ffffffff81e131c0 t hdp_v4_0_flush_hdp +ffffffff81e13210 t hdp_v4_0_invalidate_hdp +ffffffff81e132d0 t hdp_v4_0_update_clock_gating +ffffffff81e133d0 t hdp_v4_0_get_clockgating_state +ffffffff81e13420 t hdp_v4_0_init_registers +ffffffff81e14000 t hdp_v5_0_flush_hdp +ffffffff81e14050 t hdp_v5_0_invalidate_hdp +ffffffff81e140f0 t hdp_v5_0_update_clock_gating +ffffffff81e144e0 t hdp_v5_0_get_clockgating_state +ffffffff81e14600 t hdp_v5_0_init_registers +ffffffff81e15000 t hdp_v5_2_flush_hdp +ffffffff81e15050 t hdp_v5_2_update_clock_gating +ffffffff81e15440 t hdp_v5_2_get_clockgating_state +ffffffff81e16000 t hdp_v6_0_flush_hdp +ffffffff81e16050 t hdp_v6_0_update_clock_gating +ffffffff81e16360 t hdp_v6_0_get_clockgating_state +ffffffff81e17000 t iceland_ih_early_init +ffffffff81e17050 t iceland_ih_sw_init +ffffffff81e170b0 t iceland_ih_sw_fini +ffffffff81e170f0 t iceland_ih_hw_init +ffffffff81e17310 t iceland_ih_hw_fini +ffffffff81e173e0 t iceland_ih_suspend +ffffffff81e174b0 t iceland_ih_resume +ffffffff81e174f0 t iceland_ih_is_idle +ffffffff81e17530 t iceland_ih_wait_for_idle +ffffffff81e175c0 t iceland_ih_soft_reset +ffffffff81e176a0 t iceland_ih_set_clockgating_state +ffffffff81e176d0 t iceland_ih_set_powergating_state +ffffffff81e17700 t iceland_ih_get_wptr +ffffffff81e177f0 t iceland_ih_decode_iv +ffffffff81e17860 t iceland_ih_set_rptr +ffffffff81e18000 t ih_v6_0_early_init +ffffffff81e18050 t ih_v6_0_sw_init +ffffffff81e181b0 t ih_v6_0_sw_fini +ffffffff81e181f0 t ih_v6_0_hw_init +ffffffff81e187a0 t ih_v6_0_hw_fini +ffffffff81e18800 t ih_v6_0_suspend +ffffffff81e18860 t ih_v6_0_resume +ffffffff81e18870 t ih_v6_0_is_idle +ffffffff81e188a0 t ih_v6_0_wait_for_idle +ffffffff81e188d0 t ih_v6_0_soft_reset +ffffffff81e18900 t ih_v6_0_set_clockgating_state +ffffffff81e18a20 t ih_v6_0_set_powergating_state +ffffffff81e18b90 t ih_v6_0_get_clockgating_state +ffffffff81e18c20 t ih_v6_0_get_wptr +ffffffff81e18d10 t ih_v6_0_set_rptr +ffffffff81e18dd0 t ih_v6_0_self_irq +ffffffff81e18e30 t ih_v6_0_toggle_interrupts +ffffffff81e19010 t force_update_wptr_for_self_int +ffffffff81e1a000 t imu_v11_0_init_microcode +ffffffff81e1a1f0 t imu_v11_0_load_microcode +ffffffff81e1a550 t imu_v11_0_setup +ffffffff81e1a7d0 t imu_v11_0_start +ffffffff81e1a8c0 t imu_v11_0_program_rlc_ram +ffffffff81e1aa70 t imu_v11_0_wait_for_reset_status +ffffffff81e1abb0 t program_imu_rlc_ram +ffffffff81e1b000 T imu_v11_0_3_program_rlc_ram +ffffffff81e1c000 T jpeg_v1_0_early_init +ffffffff81e1c060 T jpeg_v1_0_sw_init +ffffffff81e1c130 T jpeg_v1_0_sw_fini +ffffffff81e1c150 T jpeg_v1_0_start +ffffffff81e1cbc0 t jpeg_v1_0_decode_ring_get_rptr +ffffffff81e1cc40 t jpeg_v1_0_decode_ring_get_wptr +ffffffff81e1ccc0 t jpeg_v1_0_decode_ring_set_wptr +ffffffff81e1cd30 t jpeg_v1_0_decode_ring_emit_ib +ffffffff81e1d640 t jpeg_v1_0_decode_ring_emit_fence +ffffffff81e1df90 t jpeg_v1_0_decode_ring_emit_vm_flush +ffffffff81e1e000 t jpeg_v1_0_decode_ring_nop +ffffffff81e1e160 t jpeg_v1_0_decode_ring_insert_start +ffffffff81e1e320 t jpeg_v1_0_decode_ring_insert_end +ffffffff81e1e4e0 t jpeg_v1_0_ring_begin_use +ffffffff81e1e5e0 t jpeg_v1_0_decode_ring_emit_wreg +ffffffff81e1e840 t jpeg_v1_0_decode_ring_emit_reg_wait +ffffffff81e1ec50 t jpeg_v1_0_set_interrupt_state +ffffffff81e1ec80 t jpeg_v1_0_process_interrupt +ffffffff81e1f000 T jpeg_v2_0_dec_ring_insert_start +ffffffff81e1f1a0 T jpeg_v2_0_dec_ring_insert_end +ffffffff81e1f340 T jpeg_v2_0_dec_ring_emit_fence +ffffffff81e1fa30 T jpeg_v2_0_dec_ring_emit_ib +ffffffff81e20210 T jpeg_v2_0_dec_ring_emit_reg_wait +ffffffff81e205d0 T jpeg_v2_0_dec_ring_emit_vm_flush +ffffffff81e20640 T jpeg_v2_0_dec_ring_emit_wreg +ffffffff81e20880 T jpeg_v2_0_dec_ring_nop +ffffffff81e209e0 t jpeg_v2_0_early_init +ffffffff81e20a50 t jpeg_v2_0_sw_init +ffffffff81e20b60 t jpeg_v2_0_sw_fini +ffffffff81e20bb0 t jpeg_v2_0_hw_init +ffffffff81e20c30 t jpeg_v2_0_hw_fini +ffffffff81e20d00 t jpeg_v2_0_suspend +ffffffff81e20d20 t jpeg_v2_0_resume +ffffffff81e20db0 t jpeg_v2_0_is_idle +ffffffff81e20e30 t jpeg_v2_0_wait_for_idle +ffffffff81e20f20 t jpeg_v2_0_set_clockgating_state +ffffffff81e20fd0 t jpeg_v2_0_set_powergating_state +ffffffff81e217d0 t jpeg_v2_0_dec_ring_get_rptr +ffffffff81e21850 t jpeg_v2_0_dec_ring_get_wptr +ffffffff81e218f0 t jpeg_v2_0_dec_ring_set_wptr +ffffffff81e21980 t jpeg_v2_0_set_interrupt_state +ffffffff81e219b0 t jpeg_v2_0_process_interrupt +ffffffff81e21a40 t jpeg_v2_0_enable_clock_gating +ffffffff81e21be0 t jpeg_v2_0_disable_clock_gating +ffffffff81e22000 t jpeg_v2_6_query_ras_poison_status +ffffffff81e22140 t jpeg_v2_5_early_init +ffffffff81e22410 t jpeg_v2_5_sw_init +ffffffff81e22630 t jpeg_v2_5_sw_fini +ffffffff81e22680 t jpeg_v2_5_hw_init +ffffffff81e22770 t jpeg_v2_5_hw_fini +ffffffff81e228b0 t jpeg_v2_5_suspend +ffffffff81e228d0 t jpeg_v2_5_resume +ffffffff81e229d0 t jpeg_v2_5_is_idle +ffffffff81e22ac0 t jpeg_v2_5_wait_for_idle +ffffffff81e22bf0 t jpeg_v2_5_set_clockgating_state +ffffffff81e22d60 t jpeg_v2_5_set_powergating_state +ffffffff81e23440 t jpeg_v2_5_dec_ring_get_rptr +ffffffff81e234d0 t jpeg_v2_5_dec_ring_get_wptr +ffffffff81e23580 t jpeg_v2_5_dec_ring_set_wptr +ffffffff81e23620 t jpeg_v2_6_dec_ring_insert_start +ffffffff81e237e0 t jpeg_v2_6_dec_ring_insert_end +ffffffff81e239a0 t jpeg_v2_5_set_interrupt_state +ffffffff81e239d0 t jpeg_v2_5_process_interrupt +ffffffff81e23ab0 t jpeg_v2_5_enable_clock_gating +ffffffff81e23b80 t jpeg_v2_5_disable_clock_gating +ffffffff81e24000 t jpeg_v3_0_early_init +ffffffff81e240e0 t jpeg_v3_0_sw_init +ffffffff81e241f0 t jpeg_v3_0_sw_fini +ffffffff81e24240 t jpeg_v3_0_hw_init +ffffffff81e242c0 t jpeg_v3_0_hw_fini +ffffffff81e24390 t jpeg_v3_0_suspend +ffffffff81e243b0 t jpeg_v3_0_resume +ffffffff81e24440 t jpeg_v3_0_is_idle +ffffffff81e244c0 t jpeg_v3_0_wait_for_idle +ffffffff81e245b0 t jpeg_v3_0_set_clockgating_state +ffffffff81e24660 t jpeg_v3_0_set_powergating_state +ffffffff81e24f10 t jpeg_v3_0_dec_ring_get_rptr +ffffffff81e24f90 t jpeg_v3_0_dec_ring_get_wptr +ffffffff81e25030 t jpeg_v3_0_dec_ring_set_wptr +ffffffff81e250c0 t jpeg_v3_0_set_interrupt_state +ffffffff81e250f0 t jpeg_v3_0_process_interrupt +ffffffff81e25180 t jpeg_v3_0_enable_clock_gating +ffffffff81e25250 t jpeg_v3_0_disable_clock_gating +ffffffff81e26000 t jpeg_v4_0_early_init +ffffffff81e26080 t jpeg_v4_0_sw_init +ffffffff81e26190 t jpeg_v4_0_sw_fini +ffffffff81e261e0 t jpeg_v4_0_hw_init +ffffffff81e262f0 t jpeg_v4_0_hw_fini +ffffffff81e263c0 t jpeg_v4_0_suspend +ffffffff81e263e0 t jpeg_v4_0_resume +ffffffff81e26430 t jpeg_v4_0_is_idle +ffffffff81e264b0 t jpeg_v4_0_wait_for_idle +ffffffff81e265a0 t jpeg_v4_0_set_clockgating_state +ffffffff81e26650 t jpeg_v4_0_set_powergating_state +ffffffff81e26e50 t jpeg_v4_0_dec_ring_get_rptr +ffffffff81e26ed0 t jpeg_v4_0_dec_ring_get_wptr +ffffffff81e26f70 t jpeg_v4_0_dec_ring_set_wptr +ffffffff81e27010 t jpeg_v4_0_set_interrupt_state +ffffffff81e27040 t jpeg_v4_0_process_interrupt +ffffffff81e270e0 t jpeg_v4_0_enable_clock_gating +ffffffff81e27290 t jpeg_v4_0_disable_clock_gating +ffffffff81e28000 t lsdma_v6_0_copy_mem +ffffffff81e28350 t lsdma_v6_0_fill_mem +ffffffff81e28630 t lsdma_v6_0_update_memory_power_gating +ffffffff81e29000 t mca_v3_0_mp0_query_ras_error_count +ffffffff81e29020 t mca_v3_0_ras_block_match +ffffffff81e29060 t mca_v3_0_mp1_query_ras_error_count +ffffffff81e29080 t mca_v3_0_mpio_query_ras_error_count +ffffffff81e290a0 t mca_v3_0_init +ffffffff81e2a000 t mes_v10_0_late_init +ffffffff81e2a040 t mes_v10_1_sw_init +ffffffff81e2a640 t mes_v10_1_sw_fini +ffffffff81e2a7c0 t mes_v10_1_hw_init +ffffffff81e2b060 t mes_v10_1_hw_fini +ffffffff81e2b120 t mes_v10_1_suspend +ffffffff81e2b1f0 t mes_v10_1_resume +ffffffff81e2b240 t mes_v10_1_kiq_hw_init +ffffffff81e2b640 t mes_v10_1_add_hw_queue +ffffffff81e2b7b0 t mes_v10_1_remove_hw_queue +ffffffff81e2b840 t mes_v10_1_unmap_legacy_queue +ffffffff81e2b920 t mes_v10_1_suspend_gang +ffffffff81e2b950 t mes_v10_1_resume_gang +ffffffff81e2b980 t mes_v10_1_submit_pkt_and_poll_completion +ffffffff81e2bb80 t mes_v10_1_load_microcode +ffffffff81e2c370 t mes_v10_1_enable +ffffffff81e2c7e0 t mes_v10_1_queue_init +ffffffff81e2ca80 t amdgpu_bo_unreserve +ffffffff81e2cb60 t mes_v10_1_ring_get_rptr +ffffffff81e2cb90 t mes_v10_1_ring_get_wptr +ffffffff81e2cbf0 t mes_v10_1_ring_set_wptr +ffffffff81e2d000 t mes_v11_0_late_init +ffffffff81e2d050 t mes_v11_0_sw_init +ffffffff81e2d630 t mes_v11_0_sw_fini +ffffffff81e2d820 t mes_v11_0_hw_init +ffffffff81e2e030 t mes_v11_0_hw_fini +ffffffff81e2e060 t mes_v11_0_suspend +ffffffff81e2e070 t mes_v11_0_resume +ffffffff81e2e0c0 t mes_v11_0_kiq_hw_init +ffffffff81e2e2c0 t mes_v11_0_kiq_hw_fini +ffffffff81e2e700 t mes_v11_0_add_hw_queue +ffffffff81e2e8d0 t mes_v11_0_remove_hw_queue +ffffffff81e2e960 t mes_v11_0_unmap_legacy_queue +ffffffff81e2ea60 t mes_v11_0_suspend_gang +ffffffff81e2ea90 t mes_v11_0_resume_gang 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mmhub_v1_7_query_ras_error_count +ffffffff81e34150 t mmhub_v1_7_query_ras_error_status +ffffffff81e34230 t mmhub_v1_7_reset_ras_error_count +ffffffff81e342d0 t mmhub_v1_7_reset_ras_error_status +ffffffff81e343c0 t mmhub_v1_7_get_fb_location +ffffffff81e344d0 t mmhub_v1_7_init +ffffffff81e34570 t mmhub_v1_7_gart_enable +ffffffff81e35a50 t mmhub_v1_7_set_fault_enable_default +ffffffff81e35b60 t mmhub_v1_7_gart_disable +ffffffff81e35de0 t mmhub_v1_7_set_clockgating +ffffffff81e36150 t mmhub_v1_7_get_clockgating +ffffffff81e36270 t mmhub_v1_7_setup_vm_pt_regs +ffffffff81e37000 t mmhub_v2_0_init +ffffffff81e370c0 t mmhub_v2_0_gart_enable +ffffffff81e38240 t mmhub_v2_0_set_fault_enable_default +ffffffff81e38350 t mmhub_v2_0_gart_disable +ffffffff81e385d0 t mmhub_v2_0_set_clockgating +ffffffff81e38910 t mmhub_v2_0_get_clockgating +ffffffff81e38aa0 t mmhub_v2_0_setup_vm_pt_regs +ffffffff81e38be0 t mmhub_v2_0_print_l2_protection_fault_status +ffffffff81e38e40 t mmhub_v2_0_get_invalidate_req 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mmhub_v3_0_1_get_fb_location +ffffffff81e3e090 t mmhub_v3_0_1_get_mc_fb_offset +ffffffff81e3e110 t mmhub_v3_0_1_init +ffffffff81e3e1e0 t mmhub_v3_0_1_gart_enable +ffffffff81e3f460 t mmhub_v3_0_1_set_fault_enable_default +ffffffff81e3f550 t mmhub_v3_0_1_gart_disable +ffffffff81e3f7e0 t mmhub_v3_0_1_set_clockgating +ffffffff81e3f990 t mmhub_v3_0_1_get_clockgating +ffffffff81e3fa40 t mmhub_v3_0_1_setup_vm_pt_regs +ffffffff81e3fb80 t mmhub_v3_0_1_print_l2_protection_fault_status +ffffffff81e3fd90 t mmhub_v3_0_1_get_invalidate_req +ffffffff81e40000 t mmhub_v3_0_2_get_fb_location +ffffffff81e40090 t mmhub_v3_0_2_get_mc_fb_offset +ffffffff81e40110 t mmhub_v3_0_2_init +ffffffff81e401e0 t mmhub_v3_0_2_gart_enable +ffffffff81e41360 t mmhub_v3_0_2_set_fault_enable_default +ffffffff81e41470 t mmhub_v3_0_2_gart_disable +ffffffff81e416f0 t mmhub_v3_0_2_set_clockgating +ffffffff81e41720 t mmhub_v3_0_2_get_clockgating +ffffffff81e41750 t mmhub_v3_0_2_setup_vm_pt_regs +ffffffff81e41880 t mmhub_v3_0_2_print_l2_protection_fault_status +ffffffff81e41a70 t mmhub_v3_0_2_get_invalidate_req +ffffffff81e42000 t mmhub_v9_4_query_ras_error_count +ffffffff81e42150 t mmhub_v9_4_query_ras_error_status +ffffffff81e42230 t mmhub_v9_4_reset_ras_error_count +ffffffff81e422f0 t mmhub_v9_4_get_fb_location +ffffffff81e42400 t mmhub_v9_4_init +ffffffff81e42540 t mmhub_v9_4_gart_enable +ffffffff81e439d0 t mmhub_v9_4_set_fault_enable_default +ffffffff81e43bb0 t mmhub_v9_4_gart_disable +ffffffff81e43f10 t mmhub_v9_4_set_clockgating +ffffffff81e443d0 t mmhub_v9_4_get_clockgating +ffffffff81e444f0 t mmhub_v9_4_setup_vm_pt_regs +ffffffff81e44530 t mmhub_v9_4_setup_hubid_vm_pt_regs +ffffffff81e45000 T xgpu_ai_mailbox_set_irq_funcs +ffffffff81e45050 T xgpu_ai_mailbox_add_irq_id +ffffffff81e450e0 T xgpu_ai_mailbox_get_irq +ffffffff81e45190 t xgpu_ai_mailbox_flr_work +ffffffff81e45390 T xgpu_ai_mailbox_put_irq +ffffffff81e453d0 t xgpu_ai_request_full_gpu_access +ffffffff81e453f0 t xgpu_ai_release_full_gpu_access +ffffffff81e45410 t xgpu_ai_request_init_data +ffffffff81e45470 t xgpu_ai_request_reset +ffffffff81e45520 t xgpu_ai_mailbox_trans_msg +ffffffff81e45750 t xgpu_ai_set_mailbox_ack_irq +ffffffff81e457e0 t xgpu_ai_mailbox_ack_irq +ffffffff81e45830 t xgpu_ai_set_mailbox_rcv_irq +ffffffff81e458c0 t xgpu_ai_mailbox_rcv_irq +ffffffff81e459a0 t xgpu_ai_send_access_requests +ffffffff81e45a90 t xgpu_ai_poll_msg +ffffffff81e46000 T xgpu_nv_mailbox_set_irq_funcs +ffffffff81e46050 T xgpu_nv_mailbox_add_irq_id +ffffffff81e460e0 T xgpu_nv_mailbox_get_irq +ffffffff81e46190 t xgpu_nv_mailbox_flr_work +ffffffff81e463b0 T xgpu_nv_mailbox_put_irq +ffffffff81e463f0 t xgpu_nv_request_full_gpu_access +ffffffff81e46410 t xgpu_nv_release_full_gpu_access +ffffffff81e46430 t xgpu_nv_request_init_data +ffffffff81e46450 t xgpu_nv_request_reset +ffffffff81e46550 t xgpu_nv_mailbox_trans_msg +ffffffff81e466f0 t xgpu_nv_set_mailbox_ack_irq +ffffffff81e46760 t xgpu_nv_mailbox_ack_irq +ffffffff81e467b0 t xgpu_nv_set_mailbox_rcv_irq +ffffffff81e46830 t xgpu_nv_mailbox_rcv_irq +ffffffff81e468e0 t xgpu_nv_send_access_requests +ffffffff81e47000 T xgpu_vi_init_golden_registers +ffffffff81e470c0 T xgpu_vi_mailbox_set_irq_funcs +ffffffff81e47110 T xgpu_vi_mailbox_add_irq_id +ffffffff81e471a0 T xgpu_vi_mailbox_get_irq +ffffffff81e47250 t xgpu_vi_mailbox_flr_work +ffffffff81e473a0 T xgpu_vi_mailbox_put_irq +ffffffff81e473e0 t xgpu_vi_request_full_gpu_access +ffffffff81e47400 t xgpu_vi_release_full_gpu_access +ffffffff81e47420 t xgpu_vi_request_reset +ffffffff81e47440 t xgpu_vi_wait_reset_cmpl +ffffffff81e47520 t xgpu_vi_set_mailbox_ack_irq +ffffffff81e47590 t xgpu_vi_mailbox_ack_irq +ffffffff81e475e0 t xgpu_vi_set_mailbox_rcv_irq +ffffffff81e47660 t xgpu_vi_mailbox_rcv_irq +ffffffff81e47700 t xgpu_vi_mailbox_rcv_msg +ffffffff81e47820 t xgpu_vi_send_access_requests +ffffffff81e48000 t navi10_ih_early_init +ffffffff81e48050 t navi10_ih_sw_init +ffffffff81e481c0 t navi10_ih_sw_fini +ffffffff81e48200 t navi10_ih_hw_init +ffffffff81e48630 t navi10_ih_hw_fini +ffffffff81e48690 t navi10_ih_suspend +ffffffff81e486f0 t navi10_ih_resume +ffffffff81e48700 t navi10_ih_is_idle +ffffffff81e48730 t navi10_ih_wait_for_idle +ffffffff81e48760 t navi10_ih_soft_reset +ffffffff81e48790 t navi10_ih_set_clockgating_state +ffffffff81e488b0 t navi10_ih_set_powergating_state +ffffffff81e488e0 t navi10_ih_get_clockgating_state +ffffffff81e48970 t navi10_ih_get_wptr +ffffffff81e48a80 t navi10_ih_set_rptr +ffffffff81e48b50 t navi10_ih_self_irq +ffffffff81e48bc0 t navi10_ih_toggle_interrupts +ffffffff81e48d50 t force_update_wptr_for_self_int +ffffffff81e4a000 t nbio_v2_3_get_hdp_flush_req_offset +ffffffff81e4a040 t nbio_v2_3_get_hdp_flush_done_offset +ffffffff81e4a080 t nbio_v2_3_get_pcie_index_offset +ffffffff81e4a0b0 t nbio_v2_3_get_pcie_data_offset +ffffffff81e4a0e0 t nbio_v2_3_get_rev_id +ffffffff81e4a130 t nbio_v2_3_mc_access_enable +ffffffff81e4a1e0 t nbio_v2_3_get_memsize +ffffffff81e4a240 t nbio_v2_3_sdma_doorbell_range +ffffffff81e4a2e0 t nbio_v2_3_vcn_doorbell_range +ffffffff81e4a360 t nbio_v2_3_enable_doorbell_aperture +ffffffff81e4a450 t nbio_v2_3_enable_doorbell_selfring_aperture +ffffffff81e4a5b0 t nbio_v2_3_ih_doorbell_range +ffffffff81e4a6c0 t nbio_v2_3_update_medium_grain_clock_gating +ffffffff81e4a760 t nbio_v2_3_update_medium_grain_light_sleep +ffffffff81e4a800 t nbio_v2_3_get_clockgating_state +ffffffff81e4a880 t nbio_v2_3_ih_control +ffffffff81e4a9d0 t nbio_v2_3_init_registers +ffffffff81e4aa60 t nbio_v2_3_remap_hdp_registers +ffffffff81e4ab60 t nbio_v2_3_enable_aspm +ffffffff81e4abf0 t nbio_v2_3_program_aspm +ffffffff81e4b280 t nbio_v2_3_apply_lc_spc_mode_wa +ffffffff81e4b310 t nbio_v2_3_apply_l1_link_width_reconfig_wa +ffffffff81e4b380 t nbio_v2_3_clear_doorbell_interrupt +ffffffff81e4c000 t nbio_v4_3_get_hdp_flush_req_offset +ffffffff81e4c040 t nbio_v4_3_get_hdp_flush_done_offset +ffffffff81e4c080 t nbio_v4_3_get_pcie_index_offset +ffffffff81e4c0b0 t nbio_v4_3_get_pcie_data_offset +ffffffff81e4c0e0 t nbio_v4_3_get_rev_id +ffffffff81e4c160 t nbio_v4_3_mc_access_enable +ffffffff81e4c210 t nbio_v4_3_get_memsize +ffffffff81e4c270 t nbio_v4_3_sdma_doorbell_range +ffffffff81e4c3e0 t nbio_v4_3_vcn_doorbell_range +ffffffff81e4c590 t nbio_v4_3_gc_doorbell_init +ffffffff81e4c680 t nbio_v4_3_enable_doorbell_aperture +ffffffff81e4c770 t nbio_v4_3_enable_doorbell_selfring_aperture +ffffffff81e4c8d0 t nbio_v4_3_ih_doorbell_range +ffffffff81e4c9f0 t nbio_v4_3_update_medium_grain_clock_gating +ffffffff81e4cb20 t nbio_v4_3_update_medium_grain_light_sleep +ffffffff81e4cc50 t nbio_v4_3_get_clockgating_state +ffffffff81e4cd60 t nbio_v4_3_ih_control +ffffffff81e4ceb0 t nbio_v4_3_init_registers +ffffffff81e4cee0 t nbio_v4_3_remap_hdp_registers +ffffffff81e4cfe0 t nbio_v4_3_program_aspm +ffffffff81e4dc70 t nbio_v4_3_get_rom_offset +ffffffff81e4dcf0 t nbio_v4_3_sriov_sdma_doorbell_range +ffffffff81e4dd20 t nbio_v4_3_sriov_vcn_doorbell_range +ffffffff81e4dd50 t nbio_v4_3_sriov_gc_doorbell_init +ffffffff81e4dd80 t nbio_v4_3_sriov_ih_doorbell_range +ffffffff81e4e000 t nbio_v6_1_get_hdp_flush_req_offset +ffffffff81e4e040 t nbio_v6_1_get_hdp_flush_done_offset +ffffffff81e4e080 t nbio_v6_1_get_pcie_index_offset +ffffffff81e4e0b0 t nbio_v6_1_get_pcie_data_offset +ffffffff81e4e0e0 t nbio_v6_1_get_rev_id +ffffffff81e4e160 t nbio_v6_1_mc_access_enable +ffffffff81e4e210 t nbio_v6_1_get_memsize +ffffffff81e4e270 t nbio_v6_1_sdma_doorbell_range +ffffffff81e4e300 t nbio_v6_1_enable_doorbell_aperture +ffffffff81e4e3f0 t nbio_v6_1_enable_doorbell_selfring_aperture +ffffffff81e4e550 t nbio_v6_1_ih_doorbell_range +ffffffff81e4e660 t nbio_v6_1_update_medium_grain_clock_gating +ffffffff81e4e700 t nbio_v6_1_update_medium_grain_light_sleep +ffffffff81e4e7a0 t nbio_v6_1_get_clockgating_state +ffffffff81e4e820 t nbio_v6_1_ih_control +ffffffff81e4e970 t nbio_v6_1_init_registers +ffffffff81e4ea40 t nbio_v6_1_remap_hdp_registers +ffffffff81e4eb40 t nbio_v6_1_program_aspm +ffffffff81e4f000 t nbio_v7_0_get_hdp_flush_req_offset +ffffffff81e4f040 t nbio_v7_0_get_hdp_flush_done_offset +ffffffff81e4f080 t nbio_v7_0_get_pcie_index_offset +ffffffff81e4f0b0 t nbio_v7_0_get_pcie_data_offset +ffffffff81e4f0e0 t nbio_v7_0_get_rev_id +ffffffff81e4f160 t nbio_v7_0_mc_access_enable +ffffffff81e4f210 t nbio_v7_0_get_memsize +ffffffff81e4f270 t nbio_v7_0_sdma_doorbell_range +ffffffff81e4f300 t nbio_v7_0_vcn_doorbell_range +ffffffff81e4f370 t nbio_v7_0_enable_doorbell_aperture +ffffffff81e4f460 t nbio_v7_0_enable_doorbell_selfring_aperture +ffffffff81e4f490 t nbio_v7_0_ih_doorbell_range +ffffffff81e4f5a0 t nbio_v7_0_update_medium_grain_clock_gating +ffffffff81e4f6e0 t nbio_v7_0_update_medium_grain_light_sleep +ffffffff81e4f780 t nbio_v7_0_get_clockgating_state +ffffffff81e4f800 t nbio_v7_0_ih_control +ffffffff81e4f950 t nbio_v7_0_init_registers +ffffffff81e4f9a0 t nbio_v7_0_remap_hdp_registers +ffffffff81e4faa0 t nbio_7_0_read_syshub_ind_mmr +ffffffff81e4fb70 t nbio_7_0_write_syshub_ind_mmr +ffffffff81e50000 t nbio_v7_2_get_hdp_flush_req_offset +ffffffff81e50040 t nbio_v7_2_get_hdp_flush_done_offset +ffffffff81e50080 t nbio_v7_2_get_pcie_index_offset +ffffffff81e500b0 t nbio_v7_2_get_pcie_data_offset +ffffffff81e500e0 t nbio_v7_2_get_pcie_port_index_offset +ffffffff81e50110 t nbio_v7_2_get_pcie_port_data_offset +ffffffff81e50140 t nbio_v7_2_get_rev_id +ffffffff81e50220 t nbio_v7_2_mc_access_enable +ffffffff81e50360 t nbio_v7_2_get_memsize +ffffffff81e503c0 t nbio_v7_2_sdma_doorbell_range +ffffffff81e50450 t nbio_v7_2_vcn_doorbell_range +ffffffff81e504d0 t nbio_v7_2_enable_doorbell_aperture +ffffffff81e505b0 t nbio_v7_2_enable_doorbell_selfring_aperture +ffffffff81e50710 t nbio_v7_2_ih_doorbell_range +ffffffff81e50790 t nbio_v7_2_update_medium_grain_clock_gating +ffffffff81e50840 t nbio_v7_2_update_medium_grain_light_sleep +ffffffff81e509d0 t nbio_v7_2_get_clockgating_state +ffffffff81e50a60 t nbio_v7_2_ih_control +ffffffff81e50bb0 t nbio_v7_2_init_registers +ffffffff81e50c90 t nbio_v7_2_remap_hdp_registers +ffffffff81e51000 t nbio_v7_4_query_ras_error_count +ffffffff81e511a0 t nbio_v7_4_handle_ras_controller_intr_no_bifring +ffffffff81e513d0 t nbio_v7_4_handle_ras_err_event_athub_intr_no_bifring +ffffffff81e51580 t nbio_v7_4_init_ras_controller_interrupt +ffffffff81e515c0 t nbio_v7_4_init_ras_err_event_athub_interrupt +ffffffff81e51600 t nbio_v7_4_get_hdp_flush_req_offset +ffffffff81e51640 t nbio_v7_4_get_hdp_flush_done_offset +ffffffff81e51680 t nbio_v7_4_get_pcie_index_offset +ffffffff81e516b0 t nbio_v7_4_get_pcie_data_offset +ffffffff81e516e0 t nbio_v7_4_get_rev_id +ffffffff81e517a0 t nbio_v7_4_mc_access_enable +ffffffff81e51850 t nbio_v7_4_get_memsize +ffffffff81e518b0 t nbio_v7_4_sdma_doorbell_range +ffffffff81e51970 t nbio_v7_4_vcn_doorbell_range +ffffffff81e51a10 t nbio_v7_4_enable_doorbell_aperture +ffffffff81e51b00 t nbio_v7_4_enable_doorbell_selfring_aperture +ffffffff81e51c60 t nbio_v7_4_ih_doorbell_range +ffffffff81e51d70 t nbio_v7_4_enable_doorbell_interrupt +ffffffff81e51eb0 t nbio_v7_4_update_medium_grain_clock_gating +ffffffff81e51ee0 t nbio_v7_4_update_medium_grain_light_sleep +ffffffff81e51f80 t nbio_v7_4_get_clockgating_state +ffffffff81e52000 t nbio_v7_4_ih_control +ffffffff81e52150 t nbio_v7_4_init_registers +ffffffff81e52230 t nbio_v7_4_remap_hdp_registers +ffffffff81e52330 t nbio_v7_4_program_aspm +ffffffff81e52730 t nbio_v7_4_set_ras_controller_irq_state +ffffffff81e528c0 t nbio_v7_4_process_ras_controller_irq +ffffffff81e528f0 t nbio_v7_4_set_ras_err_event_athub_irq_state +ffffffff81e52a80 t nbio_v7_4_process_err_event_athub_irq +ffffffff81e53000 t nbio_v7_7_get_hdp_flush_req_offset +ffffffff81e53040 t nbio_v7_7_get_hdp_flush_done_offset +ffffffff81e53080 t nbio_v7_7_get_pcie_index_offset +ffffffff81e530b0 t nbio_v7_7_get_pcie_data_offset +ffffffff81e530e0 t nbio_v7_7_get_pcie_port_index_offset +ffffffff81e53110 t nbio_v7_7_get_pcie_port_data_offset +ffffffff81e53140 t nbio_v7_7_get_rev_id +ffffffff81e531c0 t nbio_v7_7_mc_access_enable +ffffffff81e53270 t nbio_v7_7_get_memsize +ffffffff81e532d0 t nbio_v7_7_sdma_doorbell_range +ffffffff81e53360 t nbio_v7_7_vcn_doorbell_range +ffffffff81e533e0 t nbio_v7_7_enable_doorbell_aperture +ffffffff81e534c0 t nbio_v7_7_enable_doorbell_selfring_aperture +ffffffff81e53620 t nbio_v7_7_ih_doorbell_range +ffffffff81e53730 t nbio_v7_7_update_medium_grain_clock_gating +ffffffff81e53860 t nbio_v7_7_update_medium_grain_light_sleep +ffffffff81e53a60 t nbio_v7_7_get_clockgating_state +ffffffff81e53b70 t nbio_v7_7_ih_control +ffffffff81e53cc0 t nbio_v7_7_init_registers +ffffffff81e53dc0 t nbio_v7_7_remap_hdp_registers +ffffffff81e54000 T nv_grbm_select +ffffffff81e54090 T nv_set_virt_ops +ffffffff81e540c0 t nv_common_early_init +ffffffff81e544a0 t nv_common_late_init +ffffffff81e54500 t nv_common_sw_init +ffffffff81e54540 t nv_common_sw_fini +ffffffff81e54570 t nv_common_hw_init +ffffffff81e54680 t nv_common_hw_fini +ffffffff81e546e0 t nv_common_suspend +ffffffff81e54740 t nv_common_resume +ffffffff81e54780 t nv_common_is_idle +ffffffff81e547b0 t nv_common_wait_for_idle +ffffffff81e547e0 t nv_common_soft_reset +ffffffff81e54810 t nv_common_set_clockgating_state +ffffffff81e548e0 t nv_common_set_powergating_state +ffffffff81e54910 t nv_common_get_clockgating_state +ffffffff81e54980 t nv_pcie_rreg +ffffffff81e549e0 t nv_pcie_wreg +ffffffff81e54a40 t nv_pcie_rreg64 +ffffffff81e54aa0 t nv_pcie_wreg64 +ffffffff81e54b00 t nv_didt_rreg +ffffffff81e54b90 t nv_didt_wreg +ffffffff81e54c10 t nv_read_disabled_bios +ffffffff81e54c40 t nv_read_register +ffffffff81e54d20 t nv_vga_set_state +ffffffff81e54d50 t nv_asic_reset +ffffffff81e54e90 t nv_asic_reset_method +ffffffff81e54f80 t nv_get_xclk +ffffffff81e54fb0 t nv_set_uvd_clocks +ffffffff81e54fe0 t nv_set_vce_clocks +ffffffff81e55010 t nv_get_config_memsize +ffffffff81e55030 t nv_need_full_reset +ffffffff81e55060 t nv_init_doorbell_index +ffffffff81e55190 t nv_need_reset_on_init +ffffffff81e55220 t nv_get_pcie_replay_count +ffffffff81e55250 t nv_pre_asic_init +ffffffff81e55280 t nv_update_umd_stable_pstate +ffffffff81e55330 t nv_query_video_codecs +ffffffff81e56000 T psp_v10_0_set_psp_funcs +ffffffff81e56030 t psp_v10_0_init_microcode +ffffffff81e562a0 t psp_v10_0_ring_init +ffffffff81e56320 t psp_v10_0_ring_create +ffffffff81e56620 t psp_v10_0_ring_stop +ffffffff81e56810 t psp_v10_0_ring_destroy +ffffffff81e56880 t psp_v10_0_mode1_reset +ffffffff81e568c0 t psp_v10_0_ring_get_wptr +ffffffff81e56920 t psp_v10_0_ring_set_wptr +ffffffff81e57000 T psp_v11_0_set_psp_funcs +ffffffff81e57030 t psp_v11_0_init_microcode +ffffffff81e57450 t psp_v11_0_bootloader_load_kdb +ffffffff81e57470 t psp_v11_0_bootloader_load_spl +ffffffff81e57490 t psp_v11_0_bootloader_load_sysdrv +ffffffff81e574b0 t psp_v11_0_bootloader_load_sos +ffffffff81e57800 t psp_v11_0_ring_init +ffffffff81e57880 t psp_v11_0_ring_create +ffffffff81e57f10 t psp_v11_0_ring_stop +ffffffff81e58130 t psp_v11_0_ring_destroy +ffffffff81e581a0 t psp_v11_0_mode1_reset +ffffffff81e58290 t psp_v11_0_memory_training +ffffffff81e58710 t psp_v11_0_ring_get_wptr +ffffffff81e58760 t psp_v11_0_ring_set_wptr +ffffffff81e588a0 t psp_v11_0_load_usbc_pd_fw +ffffffff81e58a90 t psp_v11_0_read_usbc_pd_fw +ffffffff81e58bb0 t psp_v11_0_bootloader_load_component +ffffffff81e58d70 t psp_v11_0_wait_for_bootloader +ffffffff81e58f40 t psp_v11_0_memory_training_send_msg +ffffffff81e5a000 T psp_v11_0_8_set_psp_funcs +ffffffff81e5a030 t psp_v11_0_8_ring_init +ffffffff81e5a0b0 t psp_v11_0_8_ring_create +ffffffff81e5a740 t psp_v11_0_8_ring_stop +ffffffff81e5aac0 t psp_v11_0_8_ring_destroy +ffffffff81e5ab30 t psp_v11_0_8_ring_get_wptr +ffffffff81e5aba0 t psp_v11_0_8_ring_set_wptr +ffffffff81e5b000 T psp_v12_0_set_psp_funcs +ffffffff81e5b030 t psp_v12_0_init_microcode +ffffffff81e5b290 t psp_v12_0_bootloader_load_sysdrv +ffffffff81e5b5b0 t psp_v12_0_bootloader_load_sos +ffffffff81e5b910 t psp_v12_0_ring_init +ffffffff81e5bee0 t psp_v12_0_ring_create +ffffffff81e5c430 t psp_v12_0_ring_stop +ffffffff81e5c650 t psp_v12_0_ring_destroy +ffffffff81e5c6c0 t psp_v12_0_mode1_reset +ffffffff81e5c7b0 t psp_v12_0_ring_get_wptr +ffffffff81e5c820 t psp_v12_0_ring_set_wptr +ffffffff81e5d000 T psp_v13_0_set_psp_funcs +ffffffff81e5d030 t psp_v13_0_init_microcode +ffffffff81e5d160 t psp_v13_0_bootloader_load_kdb +ffffffff81e5d180 t psp_v13_0_bootloader_load_spl +ffffffff81e5d1a0 t psp_v13_0_bootloader_load_sysdrv +ffffffff81e5d1c0 t psp_v13_0_bootloader_load_soc_drv +ffffffff81e5d1e0 t psp_v13_0_bootloader_load_intf_drv +ffffffff81e5d200 t psp_v13_0_bootloader_load_dbg_drv +ffffffff81e5d220 t psp_v13_0_bootloader_load_ras_drv +ffffffff81e5d240 t psp_v13_0_bootloader_load_sos +ffffffff81e5d5a0 t psp_v13_0_ring_init +ffffffff81e5d620 t psp_v13_0_ring_create +ffffffff81e5dcb0 t psp_v13_0_ring_stop +ffffffff81e5e030 t psp_v13_0_ring_destroy +ffffffff81e5e0a0 t psp_v13_0_memory_training +ffffffff81e5e4e0 t psp_v13_0_ring_get_wptr +ffffffff81e5e550 t psp_v13_0_ring_set_wptr +ffffffff81e5e640 t psp_v13_0_load_usbc_pd_fw +ffffffff81e5e830 t psp_v13_0_read_usbc_pd_fw +ffffffff81e5e950 t psp_v13_0_update_spirom +ffffffff81e5eb20 t psp_v13_0_vbflash_status +ffffffff81e5eb80 t psp_v13_0_bootloader_load_component +ffffffff81e5ed50 t psp_v13_0_wait_for_bootloader +ffffffff81e5ef20 t psp_v13_0_memory_training_send_msg +ffffffff81e5f080 t psp_v13_0_exec_spi_cmd +ffffffff81e60000 T psp_v13_0_4_set_psp_funcs +ffffffff81e60030 t psp_v13_0_4_init_microcode +ffffffff81e60100 t psp_v13_0_4_bootloader_load_kdb +ffffffff81e60120 t psp_v13_0_4_bootloader_load_spl +ffffffff81e60140 t psp_v13_0_4_bootloader_load_sysdrv +ffffffff81e60160 t psp_v13_0_4_bootloader_load_soc_drv +ffffffff81e60180 t psp_v13_0_4_bootloader_load_intf_drv +ffffffff81e601a0 t psp_v13_0_4_bootloader_load_dbg_drv +ffffffff81e601c0 t psp_v13_0_4_bootloader_load_sos +ffffffff81e60530 t psp_v13_0_4_ring_init +ffffffff81e605b0 t psp_v13_0_4_ring_create +ffffffff81e60c50 t psp_v13_0_4_ring_stop +ffffffff81e60fe0 t psp_v13_0_4_ring_destroy +ffffffff81e61050 t psp_v13_0_4_ring_get_wptr +ffffffff81e610c0 t psp_v13_0_4_ring_set_wptr +ffffffff81e611c0 t psp_v13_0_4_bootloader_load_component +ffffffff81e61390 t psp_v13_0_4_wait_for_bootloader +ffffffff81e62000 T psp_v3_1_set_psp_funcs +ffffffff81e62030 t psp_v3_1_init_microcode +ffffffff81e620e0 t psp_v3_1_bootloader_load_sysdrv +ffffffff81e62400 t psp_v3_1_bootloader_load_sos +ffffffff81e62760 t psp_v3_1_ring_init +ffffffff81e627e0 t psp_v3_1_ring_create +ffffffff81e632e0 t psp_v3_1_ring_stop +ffffffff81e63500 t psp_v3_1_ring_destroy +ffffffff81e63570 t psp_v3_1_smu_reload_quirk +ffffffff81e635c0 t psp_v3_1_mode1_reset +ffffffff81e636b0 t psp_v3_1_ring_get_wptr +ffffffff81e63700 t psp_v3_1_ring_set_wptr +ffffffff81e64000 t sdma_v2_4_early_init +ffffffff81e640e0 t sdma_v2_4_sw_init +ffffffff81e64470 t sdma_v2_4_sw_fini +ffffffff81e64550 t sdma_v2_4_hw_init +ffffffff81e64900 t sdma_v2_4_hw_fini +ffffffff81e64940 t sdma_v2_4_suspend +ffffffff81e64980 t sdma_v2_4_resume +ffffffff81e64990 t sdma_v2_4_is_idle +ffffffff81e649d0 t sdma_v2_4_wait_for_idle +ffffffff81e64a60 t sdma_v2_4_soft_reset +ffffffff81e64ba0 t sdma_v2_4_set_clockgating_state +ffffffff81e64bd0 t sdma_v2_4_set_powergating_state +ffffffff81e64c00 t sdma_v2_4_ring_get_rptr +ffffffff81e64c30 t sdma_v2_4_ring_get_wptr +ffffffff81e64c80 t sdma_v2_4_ring_set_wptr +ffffffff81e64cb0 t sdma_v2_4_ring_emit_ib +ffffffff81e64f60 t sdma_v2_4_ring_emit_fence +ffffffff81e65360 t sdma_v2_4_ring_emit_pipeline_sync +ffffffff81e655e0 t sdma_v2_4_ring_emit_vm_flush +ffffffff81e65860 t sdma_v2_4_ring_emit_hdp_flush +ffffffff81e65ae0 t sdma_v2_4_ring_test_ring +ffffffff81e65dc0 t sdma_v2_4_ring_test_ib +ffffffff81e65fa0 t sdma_v2_4_ring_insert_nop +ffffffff81e660c0 t sdma_v2_4_ring_pad_ib +ffffffff81e661e0 t sdma_v2_4_ring_emit_wreg +ffffffff81e66330 t sdma_v2_4_emit_copy_buffer +ffffffff81e663e0 t sdma_v2_4_emit_fill_buffer +ffffffff81e66470 t sdma_v2_4_vm_copy_pte +ffffffff81e66520 t sdma_v2_4_vm_write_pte +ffffffff81e665f0 t sdma_v2_4_vm_set_pte_pde +ffffffff81e666e0 t sdma_v2_4_set_trap_irq_state +ffffffff81e667a0 t sdma_v2_4_process_trap_irq +ffffffff81e66830 t sdma_v2_4_process_illegal_inst_irq +ffffffff81e668b0 t sdma_v2_4_enable +ffffffff81e67000 t sdma_v3_0_early_init +ffffffff81e67140 t sdma_v3_0_sw_init +ffffffff81e674f0 t sdma_v3_0_sw_fini +ffffffff81e675d0 t sdma_v3_0_hw_init +ffffffff81e67700 t sdma_v3_0_hw_fini +ffffffff81e67740 t sdma_v3_0_suspend +ffffffff81e67780 t sdma_v3_0_resume +ffffffff81e67790 t sdma_v3_0_is_idle +ffffffff81e677d0 t sdma_v3_0_wait_for_idle +ffffffff81e67860 t sdma_v3_0_check_soft_reset +ffffffff81e678b0 t sdma_v3_0_pre_soft_reset +ffffffff81e67900 t sdma_v3_0_soft_reset +ffffffff81e679c0 t sdma_v3_0_post_soft_reset +ffffffff81e67a00 t sdma_v3_0_set_clockgating_state +ffffffff81e67c60 t sdma_v3_0_set_powergating_state +ffffffff81e67c90 t sdma_v3_0_get_clockgating_state +ffffffff81e67d10 t sdma_v3_0_ring_get_rptr +ffffffff81e67d40 t sdma_v3_0_ring_get_wptr +ffffffff81e67dc0 t sdma_v3_0_ring_set_wptr +ffffffff81e67e70 t sdma_v3_0_ring_emit_ib +ffffffff81e68120 t sdma_v3_0_ring_emit_fence +ffffffff81e68520 t sdma_v3_0_ring_emit_pipeline_sync +ffffffff81e687a0 t sdma_v3_0_ring_emit_vm_flush +ffffffff81e68a20 t sdma_v3_0_ring_emit_hdp_flush +ffffffff81e68ca0 t sdma_v3_0_ring_test_ring +ffffffff81e68f80 t sdma_v3_0_ring_test_ib +ffffffff81e69160 t sdma_v3_0_ring_insert_nop +ffffffff81e69280 t sdma_v3_0_ring_pad_ib +ffffffff81e693a0 t sdma_v3_0_ring_emit_wreg +ffffffff81e694f0 t sdma_v3_0_emit_copy_buffer +ffffffff81e695a0 t sdma_v3_0_emit_fill_buffer +ffffffff81e69630 t sdma_v3_0_vm_copy_pte +ffffffff81e696e0 t sdma_v3_0_vm_write_pte +ffffffff81e697b0 t sdma_v3_0_vm_set_pte_pde +ffffffff81e698a0 t sdma_v3_0_set_trap_irq_state +ffffffff81e69960 t sdma_v3_0_process_trap_irq +ffffffff81e699f0 t sdma_v3_0_process_illegal_inst_irq +ffffffff81e69a70 t sdma_v3_0_ctx_switch_enable +ffffffff81e69c00 t sdma_v3_0_enable +ffffffff81e69d70 t sdma_v3_0_gfx_resume +ffffffff81e6b000 t sdma_v4_0_early_init +ffffffff81e6b580 t sdma_v4_0_late_init +ffffffff81e6b820 t sdma_v4_0_sw_init +ffffffff81e6bb90 t sdma_v4_0_sw_fini +ffffffff81e6bc50 t sdma_v4_0_hw_init +ffffffff81e6ebf0 t sdma_v4_0_hw_fini +ffffffff81e6eca0 t sdma_v4_0_suspend +ffffffff81e6ecf0 t sdma_v4_0_resume +ffffffff81e6ed60 t sdma_v4_0_is_idle +ffffffff81e6ee90 t sdma_v4_0_wait_for_idle +ffffffff81e6f030 t sdma_v4_0_soft_reset +ffffffff81e6f060 t sdma_v4_0_set_clockgating_state +ffffffff81e6f550 t sdma_v4_0_set_powergating_state +ffffffff81e6f610 t sdma_v4_0_get_clockgating_state +ffffffff81e6f6a0 t sdma_v4_0_query_ras_error_count +ffffffff81e6f870 t sdma_v4_0_reset_ras_error_count +ffffffff81e6f9c0 t sdma_v4_0_ring_get_rptr +ffffffff81e6fa20 t sdma_v4_0_ring_get_wptr +ffffffff81e6fc10 t sdma_v4_0_ring_set_wptr +ffffffff81e6fe90 t sdma_v4_0_ring_emit_ib +ffffffff81e70140 t sdma_v4_0_ring_emit_fence +ffffffff81e70570 t sdma_v4_0_ring_emit_pipeline_sync +ffffffff81e705c0 t sdma_v4_0_ring_emit_vm_flush +ffffffff81e705e0 t sdma_v4_0_ring_emit_hdp_flush +ffffffff81e70680 t sdma_v4_0_ring_test_ring +ffffffff81e70960 t sdma_v4_0_ring_test_ib +ffffffff81e70b40 t sdma_v4_0_ring_insert_nop +ffffffff81e70c60 t sdma_v4_0_ring_pad_ib +ffffffff81e70d80 t sdma_v4_0_ring_emit_wreg +ffffffff81e70ed0 t sdma_v4_0_ring_emit_reg_wait +ffffffff81e70f20 t sdma_v4_0_wait_reg_mem +ffffffff81e71250 t sdma_v4_0_page_ring_get_wptr +ffffffff81e71400 t sdma_v4_0_page_ring_set_wptr +ffffffff81e715c0 t sdma_v4_0_emit_copy_buffer +ffffffff81e71680 t sdma_v4_0_emit_fill_buffer +ffffffff81e71710 t sdma_v4_0_vm_copy_pte +ffffffff81e717d0 t sdma_v4_0_vm_write_pte +ffffffff81e718a0 t sdma_v4_0_vm_set_pte_pde +ffffffff81e719a0 t sdma_v4_0_set_trap_irq_state +ffffffff81e71b40 t sdma_v4_0_process_trap_irq +ffffffff81e71c80 t sdma_v4_0_process_illegal_inst_irq +ffffffff81e71da0 t sdma_v4_0_set_ecc_irq_state +ffffffff81e71f40 t sdma_v4_0_process_vm_hole_irq +ffffffff81e72080 t sdma_v4_0_process_doorbell_invalid_irq +ffffffff81e721c0 t sdma_v4_0_process_pool_timeout_irq +ffffffff81e72300 t sdma_v4_0_process_srbm_write_irq +ffffffff81e72440 t sdma_v4_0_process_ras_data_cb +ffffffff81e724b0 t sdma_v4_0_ctx_switch_enable +ffffffff81e72b60 t sdma_v4_0_enable +ffffffff81e73100 t sdma_v4_0_gfx_enable +ffffffff81e74000 t sdma_v4_4_query_ras_error_count +ffffffff81e74270 t sdma_v4_4_reset_ras_error_count +ffffffff81e75000 t sdma_v5_0_early_init +ffffffff81e75170 t sdma_v5_0_sw_init +ffffffff81e75410 t sdma_v5_0_sw_fini +ffffffff81e75490 t sdma_v5_0_hw_init +ffffffff81e76740 t sdma_v5_0_hw_fini +ffffffff81e767a0 t sdma_v5_0_suspend +ffffffff81e76800 t sdma_v5_0_resume +ffffffff81e76810 t sdma_v5_0_is_idle +ffffffff81e768a0 t sdma_v5_0_wait_for_idle +ffffffff81e76960 t sdma_v5_0_soft_reset +ffffffff81e76990 t sdma_v5_0_set_clockgating_state +ffffffff81e76b90 t sdma_v5_0_set_powergating_state +ffffffff81e76bc0 t sdma_v5_0_get_clockgating_state +ffffffff81e76c50 t sdma_v5_0_ring_get_rptr +ffffffff81e76cb0 t sdma_v5_0_ring_get_wptr +ffffffff81e76e50 t sdma_v5_0_ring_set_wptr +ffffffff81e771b0 t sdma_v5_0_ring_emit_ib +ffffffff81e77470 t sdma_v5_0_ring_emit_fence +ffffffff81e778d0 t sdma_v5_0_ring_emit_pipeline_sync +ffffffff81e77b50 t sdma_v5_0_ring_emit_vm_flush +ffffffff81e77b70 t sdma_v5_0_ring_emit_hdp_flush +ffffffff81e77e10 t sdma_v5_0_ring_test_ring +ffffffff81e781e0 t sdma_v5_0_ring_test_ib +ffffffff81e78500 t sdma_v5_0_ring_insert_nop +ffffffff81e78620 t sdma_v5_0_ring_pad_ib +ffffffff81e78740 t sdma_v5_0_ring_init_cond_exec +ffffffff81e78970 t sdma_v5_0_ring_patch_cond_exec +ffffffff81e78a30 t sdma_v5_0_ring_emit_wreg +ffffffff81e78b80 t sdma_v5_0_ring_emit_reg_wait +ffffffff81e78e00 t sdma_v5_0_ring_emit_reg_write_reg_wait +ffffffff81e78e70 t sdma_v5_0_ring_preempt_ib +ffffffff81e78fb0 t sdma_v5_0_ring_emit_mem_sync +ffffffff81e791c0 t sdma_v5_0_emit_copy_buffer +ffffffff81e79280 t sdma_v5_0_emit_fill_buffer +ffffffff81e79310 t sdma_v5_0_vm_copy_pte +ffffffff81e793d0 t sdma_v5_0_vm_write_pte +ffffffff81e794a0 t sdma_v5_0_vm_set_pte_pde +ffffffff81e795a0 t sdma_v5_0_set_trap_irq_state +ffffffff81e79630 t sdma_v5_0_process_trap_irq +ffffffff81e79740 t sdma_v5_0_process_illegal_inst_irq +ffffffff81e79770 t sdma_v5_0_mqd_init +ffffffff81e79850 t sdma_v5_0_ctx_switch_enable +ffffffff81e79b50 t sdma_v5_0_enable +ffffffff81e7a000 t sdma_v5_2_early_init +ffffffff81e7a170 t sdma_v5_2_sw_init +ffffffff81e7a3a0 t sdma_v5_2_sw_fini +ffffffff81e7a420 t sdma_v5_2_hw_init +ffffffff81e7a750 t sdma_v5_2_hw_fini +ffffffff81e7a7b0 t sdma_v5_2_suspend +ffffffff81e7a810 t sdma_v5_2_resume +ffffffff81e7a820 t sdma_v5_2_is_idle +ffffffff81e7a8d0 t sdma_v5_2_wait_for_idle +ffffffff81e7a9d0 t sdma_v5_2_soft_reset +ffffffff81e7ac70 t sdma_v5_2_set_clockgating_state +ffffffff81e7af80 t sdma_v5_2_set_powergating_state +ffffffff81e7afb0 t sdma_v5_2_get_clockgating_state +ffffffff81e7b040 t sdma_v5_2_ring_get_rptr +ffffffff81e7b0a0 t sdma_v5_2_ring_get_wptr +ffffffff81e7b1e0 t sdma_v5_2_ring_set_wptr +ffffffff81e7b3a0 t sdma_v5_2_ring_emit_ib +ffffffff81e7b660 t sdma_v5_2_ring_emit_fence +ffffffff81e7bac0 t sdma_v5_2_ring_emit_pipeline_sync +ffffffff81e7bd40 t sdma_v5_2_ring_emit_vm_flush +ffffffff81e7bd60 t sdma_v5_2_ring_emit_hdp_flush +ffffffff81e7c000 t sdma_v5_2_ring_test_ring +ffffffff81e7c3d0 t sdma_v5_2_ring_test_ib +ffffffff81e7c6f0 t sdma_v5_2_ring_insert_nop +ffffffff81e7c810 t sdma_v5_2_ring_pad_ib +ffffffff81e7c930 t sdma_v5_2_ring_init_cond_exec +ffffffff81e7cb60 t sdma_v5_2_ring_patch_cond_exec +ffffffff81e7cc20 t sdma_v5_2_ring_emit_wreg +ffffffff81e7cd70 t sdma_v5_2_ring_emit_reg_wait +ffffffff81e7cff0 t sdma_v5_2_ring_emit_reg_write_reg_wait +ffffffff81e7d060 t sdma_v5_2_ring_preempt_ib +ffffffff81e7d1d0 t sdma_v5_2_ring_emit_mem_sync +ffffffff81e7d3e0 t sdma_v5_2_emit_copy_buffer +ffffffff81e7d4a0 t sdma_v5_2_emit_fill_buffer +ffffffff81e7d530 t sdma_v5_2_vm_copy_pte +ffffffff81e7d5f0 t sdma_v5_2_vm_write_pte +ffffffff81e7d6c0 t sdma_v5_2_vm_set_pte_pde +ffffffff81e7d7c0 t sdma_v5_2_set_trap_irq_state +ffffffff81e7d880 t sdma_v5_2_process_trap_irq +ffffffff81e7d9c0 t sdma_v5_2_process_illegal_inst_irq +ffffffff81e7d9f0 t sdma_v5_2_mqd_init +ffffffff81e7dad0 t sdma_v5_2_ctx_switch_enable +ffffffff81e7ded0 t sdma_v5_2_enable +ffffffff81e7e2e0 t sdma_v5_2_gfx_resume +ffffffff81e80000 t sdma_v6_0_early_init +ffffffff81e80140 t sdma_v6_0_sw_init +ffffffff81e80320 t sdma_v6_0_sw_fini +ffffffff81e803a0 t sdma_v6_0_hw_init +ffffffff81e803b0 t sdma_v6_0_hw_fini +ffffffff81e80400 t sdma_v6_0_suspend +ffffffff81e80450 t sdma_v6_0_resume +ffffffff81e80460 t sdma_v6_0_is_idle +ffffffff81e804f0 t sdma_v6_0_wait_for_idle +ffffffff81e805b0 t sdma_v6_0_check_soft_reset +ffffffff81e80670 t sdma_v6_0_soft_reset +ffffffff81e80b10 t sdma_v6_0_set_clockgating_state +ffffffff81e80b40 t sdma_v6_0_set_powergating_state +ffffffff81e80b70 t sdma_v6_0_get_clockgating_state +ffffffff81e80ba0 t sdma_v6_0_ring_get_rptr +ffffffff81e80c00 t sdma_v6_0_ring_get_wptr +ffffffff81e80c70 t sdma_v6_0_ring_set_wptr +ffffffff81e80fd0 t sdma_v6_0_ring_emit_ib +ffffffff81e81290 t sdma_v6_0_ring_emit_fence +ffffffff81e816f0 t sdma_v6_0_ring_emit_pipeline_sync +ffffffff81e81970 t sdma_v6_0_ring_emit_vm_flush +ffffffff81e81990 t sdma_v6_0_ring_emit_hdp_flush +ffffffff81e81c30 t sdma_v6_0_ring_test_ring +ffffffff81e82000 t sdma_v6_0_ring_test_ib +ffffffff81e82320 t sdma_v6_0_ring_insert_nop +ffffffff81e82440 t sdma_v6_0_ring_pad_ib +ffffffff81e82560 t sdma_v6_0_ring_init_cond_exec +ffffffff81e82790 t sdma_v6_0_ring_patch_cond_exec +ffffffff81e82850 t sdma_v6_0_ring_emit_wreg +ffffffff81e829a0 t sdma_v6_0_ring_emit_reg_wait +ffffffff81e82c20 t sdma_v6_0_ring_emit_reg_write_reg_wait +ffffffff81e82c90 t sdma_v6_0_ring_preempt_ib +ffffffff81e82de0 t sdma_v6_0_ring_emit_mem_sync +ffffffff81e82ff0 t sdma_v6_0_emit_copy_buffer +ffffffff81e830b0 t sdma_v6_0_emit_fill_buffer +ffffffff81e83140 t sdma_v6_0_vm_copy_pte +ffffffff81e83200 t sdma_v6_0_vm_write_pte +ffffffff81e832d0 t sdma_v6_0_vm_set_pte_pde +ffffffff81e833d0 t sdma_v6_0_set_trap_irq_state +ffffffff81e83460 t sdma_v6_0_process_trap_irq +ffffffff81e83590 t sdma_v6_0_process_illegal_inst_irq +ffffffff81e835c0 t sdma_v6_0_mqd_init +ffffffff81e836d0 t sdma_v6_0_start +ffffffff81e83950 t sdma_v6_0_enable +ffffffff81e83ad0 t sdma_v6_0_gfx_resume +ffffffff81e84b50 t sdma_v6_0_gfx_stop +ffffffff81e85000 T sienna_cichlid_reset_init +ffffffff81e850c0 t sienna_cichlid_async_reset +ffffffff81e85120 t sienna_cichlid_get_reset_handler +ffffffff81e85180 T sienna_cichlid_reset_fini +ffffffff81e851d0 t sienna_cichlid_mode2_prepare_hwcontext +ffffffff81e85320 t sienna_cichlid_mode2_perform_reset +ffffffff81e853a0 t sienna_cichlid_mode2_restore_hwcontext +ffffffff81e856a0 t sienna_cichlid_mode2_reset +ffffffff81e86000 T smu_v11_0_i2c_control_init +ffffffff81e860c0 T smu_v11_0_i2c_control_fini +ffffffff81e86100 t smu_v11_0_i2c_xfer +ffffffff81e871e0 t smu_v11_0_i2c_func +ffffffff81e87210 t smu_v11_0_i2c_enable +ffffffff81e87350 t smu_v11_0_i2c_abort +ffffffff81e87450 t lock_bus +ffffffff81e874e0 t trylock_bus +ffffffff81e87530 t unlock_bus +ffffffff81e88000 t smuio_v11_0_get_rom_index_offset +ffffffff81e88030 t smuio_v11_0_get_rom_data_offset +ffffffff81e88060 t smuio_v11_0_update_rom_clock_gating +ffffffff81e881a0 t smuio_v11_0_get_clock_gating_state +ffffffff81e89000 t smuio_v11_0_6_get_rom_index_offset +ffffffff81e89030 t smuio_v11_0_6_get_rom_data_offset +ffffffff81e89060 t smuio_v11_0_6_update_rom_clock_gating +ffffffff81e891a0 t smuio_v11_0_6_get_clock_gating_state +ffffffff81e8a000 t smuio_v13_0_get_rom_index_offset +ffffffff81e8a030 t smuio_v13_0_get_rom_data_offset +ffffffff81e8a060 t smuio_v13_0_update_rom_clock_gating +ffffffff81e8a1a0 t smuio_v13_0_get_clock_gating_state +ffffffff81e8a230 t smuio_v13_0_get_die_id +ffffffff81e8a2b0 t smuio_v13_0_get_socket_id +ffffffff81e8a330 t smuio_v13_0_is_host_gpu_xgmi_supported +ffffffff81e8b000 t smuio_v13_0_6_get_rom_index_offset +ffffffff81e8b030 t smuio_v13_0_6_get_rom_data_offset +ffffffff81e8c000 t smuio_v9_0_get_rom_index_offset +ffffffff81e8c030 t smuio_v9_0_get_rom_data_offset +ffffffff81e8c060 t smuio_v9_0_update_rom_clock_gating +ffffffff81e8c1a0 t smuio_v9_0_get_clock_gating_state +ffffffff81e8d000 T soc15_grbm_select +ffffffff81e8d080 T soc15_program_register_sequence +ffffffff81e8d280 T soc15_set_virt_ops +ffffffff81e8d2f0 t soc15_common_early_init +ffffffff81e8d680 t soc15_common_late_init +ffffffff81e8d6c0 t soc15_common_sw_init +ffffffff81e8d720 t soc15_common_sw_fini +ffffffff81e8d770 t soc15_common_hw_init +ffffffff81e8d8a0 t soc15_common_hw_fini +ffffffff81e8d970 t soc15_common_suspend +ffffffff81e8d9b0 t soc15_common_resume +ffffffff81e8d9f0 t soc15_common_is_idle +ffffffff81e8da20 t soc15_common_wait_for_idle +ffffffff81e8da50 t soc15_common_soft_reset +ffffffff81e8da80 t soc15_common_set_clockgating_state +ffffffff81e8ddc0 t soc15_common_set_powergating_state +ffffffff81e8ddf0 t soc15_common_get_clockgating_state +ffffffff81e8ded0 t soc15_pcie_rreg +ffffffff81e8df30 t soc15_pcie_wreg +ffffffff81e8df90 t soc15_pcie_rreg64 +ffffffff81e8dff0 t soc15_pcie_wreg64 +ffffffff81e8e050 t soc15_uvd_ctx_rreg +ffffffff81e8e0f0 t soc15_uvd_ctx_wreg +ffffffff81e8e170 t soc15_didt_rreg +ffffffff81e8e200 t soc15_didt_wreg +ffffffff81e8e280 t soc15_gc_cac_rreg +ffffffff81e8e390 t soc15_gc_cac_wreg +ffffffff81e8e4a0 t soc15_se_cac_rreg +ffffffff81e8e5b0 t soc15_se_cac_wreg +ffffffff81e8e6c0 t soc15_read_disabled_bios +ffffffff81e8e6f0 t soc15_read_register +ffffffff81e8e7f0 t soc15_vga_set_state +ffffffff81e8e820 t soc15_asic_reset +ffffffff81e8e920 t soc15_asic_reset_method +ffffffff81e8eaa0 t soc15_get_xclk +ffffffff81e8eaf0 t soc15_set_uvd_clocks +ffffffff81e8eb20 t soc15_set_vce_clocks +ffffffff81e8eb50 t soc15_get_config_memsize +ffffffff81e8eb70 t soc15_need_full_reset +ffffffff81e8eba0 t soc15_get_pcie_usage +ffffffff81e8ecd0 t soc15_need_reset_on_init +ffffffff81e8ed70 t soc15_get_pcie_replay_count +ffffffff81e8ede0 t soc15_supports_baco +ffffffff81e8ee40 t soc15_pre_asic_init +ffffffff81e8ee50 t soc15_query_video_codecs +ffffffff81e8eef0 t vega20_get_pcie_usage +ffffffff81e90000 T soc21_grbm_select +ffffffff81e90080 t soc21_common_early_init +ffffffff81e90290 t soc21_common_late_init +ffffffff81e902c0 t soc21_common_sw_init +ffffffff81e902f0 t soc21_common_sw_fini +ffffffff81e90320 t soc21_common_hw_init +ffffffff81e903e0 t soc21_common_hw_fini +ffffffff81e90440 t soc21_common_suspend +ffffffff81e904a0 t soc21_common_resume +ffffffff81e90560 t soc21_common_is_idle +ffffffff81e90590 t soc21_common_wait_for_idle +ffffffff81e905c0 t soc21_common_soft_reset +ffffffff81e905f0 t soc21_common_set_clockgating_state +ffffffff81e906a0 t soc21_common_set_powergating_state +ffffffff81e90700 t soc21_common_get_clockgating_state +ffffffff81e90740 t soc21_pcie_rreg +ffffffff81e907a0 t soc21_pcie_wreg +ffffffff81e90800 t soc21_pcie_rreg64 +ffffffff81e90860 t soc21_pcie_wreg64 +ffffffff81e908c0 t soc21_didt_rreg +ffffffff81e90950 t soc21_didt_wreg +ffffffff81e909d0 t soc21_read_disabled_bios +ffffffff81e90a00 t soc21_read_register +ffffffff81e90af0 t soc21_vga_set_state +ffffffff81e90b20 t soc21_asic_reset +ffffffff81e90bf0 t soc21_asic_reset_method +ffffffff81e90cc0 t soc21_get_xclk +ffffffff81e90cf0 t soc21_set_uvd_clocks +ffffffff81e90d20 t soc21_set_vce_clocks +ffffffff81e90d50 t soc21_get_config_memsize +ffffffff81e90d70 t soc21_need_full_reset +ffffffff81e90dd0 t soc21_init_doorbell_index +ffffffff81e90ef0 t soc21_need_reset_on_init +ffffffff81e90f80 t soc21_get_pcie_replay_count +ffffffff81e90fb0 t soc21_pre_asic_init +ffffffff81e90fe0 t soc21_update_umd_stable_pstate +ffffffff81e91050 t soc21_query_video_codecs +ffffffff81e92000 t tonga_ih_early_init +ffffffff81e92050 t tonga_ih_sw_init +ffffffff81e920d0 t tonga_ih_sw_fini +ffffffff81e92110 t tonga_ih_hw_init +ffffffff81e922f0 t tonga_ih_hw_fini +ffffffff81e92390 t tonga_ih_suspend +ffffffff81e92430 t tonga_ih_resume +ffffffff81e92470 t tonga_ih_is_idle +ffffffff81e924b0 t tonga_ih_wait_for_idle +ffffffff81e92540 t tonga_ih_check_soft_reset +ffffffff81e92590 t tonga_ih_pre_soft_reset +ffffffff81e92630 t tonga_ih_soft_reset +ffffffff81e926f0 t tonga_ih_post_soft_reset +ffffffff81e92730 t tonga_ih_set_clockgating_state +ffffffff81e92760 t tonga_ih_set_powergating_state +ffffffff81e92790 t tonga_ih_get_wptr +ffffffff81e92880 t tonga_ih_decode_iv +ffffffff81e928f0 t tonga_ih_set_rptr +ffffffff81e93000 t umc_v6_0_init_registers +ffffffff81e94000 t umc_v6_1_query_ras_error_count +ffffffff81e944e0 t umc_v6_1_query_ras_error_address +ffffffff81e947c0 t umc_v6_1_err_cnt_init +ffffffff81e95000 t umc_v6_7_query_ras_error_count +ffffffff81e95410 t umc_v6_7_query_ras_error_address +ffffffff81e95580 t umc_v6_7_query_ras_poison_mode +ffffffff81e955d0 t umc_v6_7_convert_error_address +ffffffff81e958c0 t umc_v6_7_ecc_info_query_ras_error_count +ffffffff81e95af0 t umc_v6_7_ecc_info_query_ras_error_address +ffffffff81e96000 t umc_v8_10_query_ras_error_count +ffffffff81e96280 t umc_v8_10_query_ras_error_address +ffffffff81e965b0 t umc_v8_10_err_cnt_init +ffffffff81e96730 t umc_v8_10_query_ras_poison_mode +ffffffff81e97000 t umc_v8_7_query_ras_error_count +ffffffff81e97300 t umc_v8_7_query_ras_error_address +ffffffff81e974b0 t umc_v8_7_err_cnt_init +ffffffff81e97600 t umc_v8_7_ecc_info_query_ras_error_count +ffffffff81e97730 t umc_v8_7_ecc_info_query_ras_error_address +ffffffff81e98000 t uvd_v5_0_early_init +ffffffff81e98050 t uvd_v5_0_sw_init +ffffffff81e98130 t uvd_v5_0_sw_fini +ffffffff81e98180 t uvd_v5_0_hw_init +ffffffff81e98690 t uvd_v5_0_hw_fini +ffffffff81e98710 t uvd_v5_0_suspend +ffffffff81e98800 t uvd_v5_0_resume +ffffffff81e98850 t uvd_v5_0_is_idle +ffffffff81e98890 t uvd_v5_0_wait_for_idle +ffffffff81e98910 t uvd_v5_0_soft_reset +ffffffff81e989b0 t uvd_v5_0_set_clockgating_state +ffffffff81e98b50 t uvd_v5_0_set_powergating_state +ffffffff81e98b90 t uvd_v5_0_get_clockgating_state +ffffffff81e98c10 t uvd_v5_0_ring_get_rptr +ffffffff81e98c50 t uvd_v5_0_ring_get_wptr +ffffffff81e98c90 t uvd_v5_0_ring_set_wptr +ffffffff81e98cb0 t uvd_v5_0_ring_emit_ib +ffffffff81e98f20 t uvd_v5_0_ring_emit_fence +ffffffff81e994d0 t uvd_v5_0_ring_test_ring +ffffffff81e99670 t uvd_v5_0_ring_insert_nop +ffffffff81e997d0 t uvd_v5_0_set_interrupt_state +ffffffff81e99800 t uvd_v5_0_process_interrupt +ffffffff81e99860 t uvd_v5_0_stop +ffffffff81e99970 t uvd_v5_0_start +ffffffff81e9b000 t uvd_v6_0_early_init +ffffffff81e9b140 t uvd_v6_0_sw_init +ffffffff81e9b450 t uvd_v6_0_sw_fini +ffffffff81e9b500 t uvd_v6_0_hw_init +ffffffff81e9bac0 t uvd_v6_0_hw_fini +ffffffff81e9bb40 t uvd_v6_0_suspend +ffffffff81e9bc30 t uvd_v6_0_resume +ffffffff81e9bc80 t uvd_v6_0_is_idle +ffffffff81e9bcc0 t uvd_v6_0_wait_for_idle +ffffffff81e9bd40 t uvd_v6_0_check_soft_reset +ffffffff81e9bdb0 t uvd_v6_0_pre_soft_reset +ffffffff81e9bdf0 t uvd_v6_0_soft_reset +ffffffff81e9beb0 t uvd_v6_0_post_soft_reset +ffffffff81e9bf50 t uvd_v6_0_set_clockgating_state +ffffffff81e9c0e0 t uvd_v6_0_set_powergating_state +ffffffff81e9c150 t uvd_v6_0_get_clockgating_state +ffffffff81e9c1e0 t uvd_v6_0_ring_get_rptr +ffffffff81e9c220 t uvd_v6_0_ring_get_wptr +ffffffff81e9c260 t uvd_v6_0_ring_set_wptr +ffffffff81e9c280 t uvd_v6_0_ring_emit_ib +ffffffff81e9c5e0 t uvd_v6_0_ring_emit_fence +ffffffff81e9cb90 t uvd_v6_0_ring_emit_pipeline_sync +ffffffff81e9cf80 t uvd_v6_0_ring_emit_vm_flush +ffffffff81e9d2e0 t uvd_v6_0_ring_emit_hdp_flush +ffffffff81e9d310 t uvd_v6_0_ring_test_ring +ffffffff81e9d4b0 t uvd_v6_0_ring_insert_nop +ffffffff81e9d610 t uvd_v6_0_ring_emit_wreg +ffffffff81e9d890 t uvd_v6_0_enc_ring_get_rptr +ffffffff81e9d8f0 t uvd_v6_0_enc_ring_get_wptr +ffffffff81e9d950 t uvd_v6_0_enc_ring_set_wptr +ffffffff81e9d990 t uvd_v6_0_enc_ring_emit_ib +ffffffff81e9dbd0 t uvd_v6_0_enc_ring_emit_fence +ffffffff81e9de10 t uvd_v6_0_enc_ring_emit_pipeline_sync +ffffffff81e9dfc0 t uvd_v6_0_enc_ring_emit_vm_flush +ffffffff81e9e1d0 t uvd_v6_0_enc_ring_test_ring +ffffffff81e9e320 t uvd_v6_0_enc_ring_test_ib +ffffffff81e9e8d0 t uvd_v6_0_enc_ring_insert_end +ffffffff81e9e960 t uvd_v6_0_set_interrupt_state +ffffffff81e9e990 t uvd_v6_0_process_interrupt +ffffffff81e9ea80 t uvd_v6_0_stop +ffffffff81e9eb90 t uvd_v6_0_start +ffffffff81ea0000 t uvd_v7_0_early_init +ffffffff81ea0270 t uvd_v7_0_sw_init +ffffffff81ea05e0 t uvd_v7_0_sw_fini +ffffffff81ea06e0 t uvd_v7_0_hw_init +ffffffff81ea3600 t uvd_v7_0_hw_fini +ffffffff81ea3900 t uvd_v7_0_suspend +ffffffff81ea39b0 t uvd_v7_0_resume +ffffffff81ea3a00 t uvd_v7_0_set_clockgating_state +ffffffff81ea3a30 t uvd_v7_0_ring_get_rptr +ffffffff81ea3ac0 t uvd_v7_0_ring_get_wptr +ffffffff81ea3b50 t uvd_v7_0_ring_set_wptr +ffffffff81ea3bd0 t uvd_v7_0_ring_patch_cs_in_place +ffffffff81ea3c50 t uvd_v7_0_ring_emit_ib +ffffffff81ea3ff0 t uvd_v7_0_ring_emit_fence +ffffffff81ea4640 t uvd_v7_0_ring_emit_vm_flush +ffffffff81ea46b0 t uvd_v7_0_ring_emit_hdp_flush +ffffffff81ea46e0 t uvd_v7_0_ring_test_ring +ffffffff81ea4960 t uvd_v7_0_ring_insert_nop +ffffffff81ea4af0 t uvd_v7_0_ring_emit_wreg +ffffffff81ea4dc0 t uvd_v7_0_ring_emit_reg_wait +ffffffff81ea5160 t uvd_v7_0_enc_ring_get_rptr +ffffffff81ea5250 t uvd_v7_0_enc_ring_get_wptr +ffffffff81ea5350 t uvd_v7_0_enc_ring_set_wptr +ffffffff81ea5450 t uvd_v7_0_enc_ring_emit_ib +ffffffff81ea5690 t uvd_v7_0_enc_ring_emit_fence +ffffffff81ea58d0 t uvd_v7_0_enc_ring_emit_vm_flush +ffffffff81ea5940 t uvd_v7_0_enc_ring_test_ring +ffffffff81ea5aa0 t uvd_v7_0_enc_ring_test_ib +ffffffff81ea6050 t uvd_v7_0_enc_ring_insert_end +ffffffff81ea60e0 t uvd_v7_0_enc_ring_emit_wreg +ffffffff81ea6230 t uvd_v7_0_enc_ring_emit_reg_wait +ffffffff81ea63f0 t uvd_v7_0_set_interrupt_state +ffffffff81ea6420 t uvd_v7_0_process_interrupt +ffffffff81ea7000 t vce_v3_0_early_init +ffffffff81ea7180 t vce_v3_0_sw_init +ffffffff81ea72d0 t vce_v3_0_sw_fini +ffffffff81ea7320 t vce_v3_0_hw_init +ffffffff81ea7400 t vce_v3_0_hw_fini +ffffffff81ea74e0 t vce_v3_0_suspend +ffffffff81ea75b0 t vce_v3_0_resume +ffffffff81ea7600 t vce_v3_0_is_idle +ffffffff81ea7660 t vce_v3_0_wait_for_idle +ffffffff81ea7710 t vce_v3_0_check_soft_reset +ffffffff81ea7800 t vce_v3_0_pre_soft_reset +ffffffff81ea78a0 t vce_v3_0_soft_reset +ffffffff81ea7960 t vce_v3_0_post_soft_reset +ffffffff81ea7ac0 t vce_v3_0_set_clockgating_state +ffffffff81ea7da0 t vce_v3_0_set_powergating_state +ffffffff81ea85e0 t vce_v3_0_get_clockgating_state +ffffffff81ea86a0 t vce_v3_0_ring_get_rptr +ffffffff81ea8770 t vce_v3_0_ring_get_wptr +ffffffff81ea8840 t vce_v3_0_ring_set_wptr +ffffffff81ea88f0 t vce_v3_0_ring_emit_ib +ffffffff81ea8b30 t vce_v3_0_emit_pipeline_sync +ffffffff81ea8ce0 t vce_v3_0_emit_vm_flush +ffffffff81ea8f50 t vce_v3_0_set_interrupt_state +ffffffff81ea8fc0 t vce_v3_0_process_interrupt +ffffffff81ea9080 t vce_v3_0_stop +ffffffff81eaa000 t vce_v4_0_early_init +ffffffff81eaa0b0 t vce_v4_0_sw_init +ffffffff81eaa2e0 t vce_v4_0_sw_fini +ffffffff81eaa360 t vce_v4_0_hw_init +ffffffff81eaab30 t vce_v4_0_hw_fini +ffffffff81eaabd0 t vce_v4_0_suspend +ffffffff81eaadf0 t vce_v4_0_resume +ffffffff81eaae90 t vce_v4_0_set_clockgating_state +ffffffff81eaaec0 t vce_v4_0_set_powergating_state +ffffffff81eaafa0 t vce_v4_0_ring_get_rptr +ffffffff81eab000 t vce_v4_0_ring_get_wptr +ffffffff81eab090 t vce_v4_0_ring_set_wptr +ffffffff81eab110 t vce_v4_0_ring_emit_ib +ffffffff81eab350 t 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+ffffffff81ebad50 T vcn_v2_0_dec_ring_emit_reg_wait +ffffffff81ebb0a0 T vcn_v2_0_dec_ring_emit_vm_flush +ffffffff81ebb110 T vcn_v2_0_dec_ring_emit_wreg +ffffffff81ebb3a0 T vcn_v2_0_enc_ring_emit_fence +ffffffff81ebb5e0 T vcn_v2_0_enc_ring_insert_end +ffffffff81ebb670 T vcn_v2_0_enc_ring_emit_ib +ffffffff81ebb8b0 T vcn_v2_0_enc_ring_emit_reg_wait +ffffffff81ebba70 T vcn_v2_0_enc_ring_emit_vm_flush +ffffffff81ebbae0 T vcn_v2_0_enc_ring_emit_wreg +ffffffff81ebbc30 T vcn_v2_0_dec_ring_test_ring +ffffffff81ebbec0 t vcn_v2_0_early_init +ffffffff81ebc030 t vcn_v2_0_sw_init +ffffffff81ebc340 t vcn_v2_0_sw_fini +ffffffff81ebc3c0 t vcn_v2_0_hw_init +ffffffff81ebcd70 t vcn_v2_0_hw_fini +ffffffff81ebce70 t vcn_v2_0_suspend +ffffffff81ebce90 t vcn_v2_0_resume +ffffffff81ebcee0 t vcn_v2_0_is_idle +ffffffff81ebcf60 t vcn_v2_0_wait_for_idle +ffffffff81ebd050 t vcn_v2_0_set_clockgating_state +ffffffff81ebd0e0 t vcn_v2_0_set_powergating_state +ffffffff81ebf3a0 t vcn_v2_0_dec_ring_get_rptr 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vcn_v2_5_wait_for_idle +ffffffff81ec77e0 t vcn_v2_5_set_clockgating_state +ffffffff81ec7850 t vcn_v2_5_set_powergating_state +ffffffff81ec8130 t vcn_v2_5_dec_ring_get_rptr +ffffffff81ec81c0 t vcn_v2_5_dec_ring_get_wptr +ffffffff81ec8270 t vcn_v2_5_dec_ring_set_wptr +ffffffff81ec8310 t vcn_v2_5_enc_ring_get_rptr +ffffffff81ec8400 t vcn_v2_5_enc_ring_get_wptr +ffffffff81ec8500 t vcn_v2_5_enc_ring_set_wptr +ffffffff81ec85f0 t vcn_v2_5_set_interrupt_state +ffffffff81ec8620 t vcn_v2_5_process_interrupt +ffffffff81ec8740 t vcn_v2_5_pause_dpg_mode +ffffffff81ec90b0 t vcn_v2_5_enable_clock_gating +ffffffff81ec93b0 t vcn_v2_5_disable_clock_gating +ffffffff81ec98d0 t vcn_v2_5_start +ffffffff81ecd4d0 t vcn_v2_5_clock_gating_dpg_mode +ffffffff81ecde70 t vcn_v2_5_mc_resume_dpg_mode +ffffffff81ed1000 t vcn_v3_0_early_init +ffffffff81ed1210 t vcn_v3_0_sw_init +ffffffff81ed16b0 t vcn_v3_0_sw_fini +ffffffff81ed1790 t vcn_v3_0_hw_init +ffffffff81ed2330 t vcn_v3_0_hw_fini +ffffffff81ed2430 t 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+ffffffff81f0ae30 t pp_nv_set_min_deep_sleep_dcfclk +ffffffff81f0ae80 t pp_nv_set_voltage_by_freq +ffffffff81f0af10 t pp_nv_set_wm_ranges +ffffffff81f0af50 t pp_nv_set_hard_min_uclk_by_freq +ffffffff81f0afc0 t pp_nv_get_maximum_sustainable_clocks +ffffffff81f0b010 t pp_nv_get_uclk_dpm_states +ffffffff81f0b060 t pp_nv_set_pstate_handshake_support +ffffffff81f0b0b0 t pp_rn_set_wm_ranges +ffffffff81f0b0f0 t pp_rn_get_dpm_clock_table +ffffffff81f0c000 T amdgpu_dm_set_psr_caps +ffffffff81f0c110 T amdgpu_dm_link_setup_psr +ffffffff81f0c280 T amdgpu_dm_psr_enable +ffffffff81f0c370 T amdgpu_dm_psr_disable +ffffffff81f0c3f0 T amdgpu_dm_psr_disable_all +ffffffff81f0d000 T dm_get_elapse_time_in_ns +ffffffff81f0d030 T dm_perf_trace_timestamp +ffffffff81f0e000 T dc_assert_fp_enabled +ffffffff81f0e070 T dc_fpu_begin +ffffffff81f0e0c0 T dc_fpu_end +ffffffff81f0f000 T dal_vector_construct +ffffffff81f0f0d0 T dal_vector_presized_create +ffffffff81f0f350 T dal_vector_create +ffffffff81f0f470 T dal_vector_destruct +ffffffff81f0f4c0 T dal_vector_destroy +ffffffff81f0f530 T dal_vector_get_count +ffffffff81f0f560 T dal_vector_at_index +ffffffff81f0f5a0 T dal_vector_remove_at_index +ffffffff81f0f630 T dal_vector_set_at_index +ffffffff81f0f690 T dal_vector_insert_at +ffffffff81f0f780 T dal_vector_reserve +ffffffff81f0f820 T dal_vector_append +ffffffff81f0f920 T dal_vector_clone +ffffffff81f0f9d0 T dal_vector_capacity +ffffffff81f0fa00 T dal_vector_clear +ffffffff81f10000 T fixed_point_to_int_frac +ffffffff81f10200 T convert_float_matrix +ffffffff81f102c0 T reduce_fraction +ffffffff81f11000 T is_rgb_cspace +ffffffff81f11080 T is_lower_pipe_tree_visible +ffffffff81f110e0 T is_upper_pipe_tree_visible +ffffffff81f11140 T is_pipe_tree_visible +ffffffff81f111c0 T build_prescale_params +ffffffff81f12000 T dc_fixpt_from_fraction +ffffffff81f121d0 T dc_fixpt_mul +ffffffff81f12370 T dc_fixpt_sqr +ffffffff81f124d0 T dc_fixpt_recip +ffffffff81f12540 T dc_fixpt_sinc +ffffffff81f12730 T dc_fixpt_sin +ffffffff81f12760 T dc_fixpt_cos +ffffffff81f12840 T dc_fixpt_exp +ffffffff81f12b30 t fixed31_32_exp_from_taylor_series +ffffffff81f12f10 T dc_fixpt_log +ffffffff81f13120 T dc_fixpt_u4d19 +ffffffff81f13160 T dc_fixpt_u3d19 +ffffffff81f131a0 T dc_fixpt_u2d19 +ffffffff81f131e0 T dc_fixpt_u0d19 +ffffffff81f13210 T dc_fixpt_clamp_u0d14 +ffffffff81f13250 T dc_fixpt_clamp_u0d10 +ffffffff81f13290 T dc_fixpt_s4d19 +ffffffff81f14000 T bios_parser_create +ffffffff81f153b0 t bios_parser_get_connectors_number +ffffffff81f15410 t bios_parser_get_connector_id +ffffffff81f154a0 t bios_parser_get_src_obj +ffffffff81f155a0 t bios_parser_get_i2c_info +ffffffff81f157b0 t bios_parser_get_hpd_info +ffffffff81f15880 t bios_parser_get_device_tag +ffffffff81f15a70 t bios_parser_get_spread_spectrum_info +ffffffff81f15d70 t bios_parser_get_ss_entry_number +ffffffff81f15fa0 t bios_parser_get_embedded_panel_info +ffffffff81f164e0 t bios_parser_get_gpio_pin_info +ffffffff81f16600 t bios_parser_get_encoder_cap_info +ffffffff81f16700 t bios_parser_set_scratch_critical_state +ffffffff81f16710 t bios_parser_is_device_id_supported +ffffffff81f167d0 t bios_parser_encoder_control +ffffffff81f16810 t bios_parser_transmitter_control +ffffffff81f16850 t bios_parser_enable_crtc +ffffffff81f16890 t bios_parser_adjust_pixel_clock +ffffffff81f168d0 t bios_parser_set_pixel_clock +ffffffff81f16910 t bios_parser_set_dce_clock +ffffffff81f16950 t bios_parser_enable_spread_spectrum_on_ppll +ffffffff81f16990 t bios_parser_program_crtc_timing +ffffffff81f169d0 t bios_parser_program_display_engine_pll +ffffffff81f16a10 t bios_parser_enable_disp_power_gating +ffffffff81f16a50 t bios_parser_destroy +ffffffff81f16b10 t bios_get_board_layout_info +ffffffff81f16d90 t get_bios_object +ffffffff81f16f60 t get_ss_info_from_ss_info_table +ffffffff81f17120 t get_ss_entry_number_from_ss_info_tbl +ffffffff81f18000 T firmware_parser_create +ffffffff81f19de0 t bios_parser_get_connectors_number +ffffffff81f19f60 t bios_parser_get_connector_id +ffffffff81f19ff0 t bios_parser_get_src_obj +ffffffff81f1a280 t bios_parser_get_i2c_info +ffffffff81f1a4f0 t bios_parser_get_hpd_info +ffffffff81f1a660 t bios_parser_get_device_tag +ffffffff81f1a930 t bios_parser_get_spread_spectrum_info +ffffffff81f1acf0 t bios_parser_get_ss_entry_number +ffffffff81f1ad20 t bios_parser_get_embedded_panel_info +ffffffff81f1af10 t bios_parser_get_gpio_pin_info +ffffffff81f1b030 t bios_parser_get_encoder_cap_info +ffffffff81f1b1a0 t bios_parser_is_accelerated_mode +ffffffff81f1b1b0 t bios_parser_set_scratch_critical_state +ffffffff81f1b1c0 t bios_parser_is_device_id_supported +ffffffff81f1b240 t bios_parser_encoder_control +ffffffff81f1b280 t bios_parser_transmitter_control +ffffffff81f1b2c0 t bios_parser_enable_crtc +ffffffff81f1b300 t bios_parser_set_pixel_clock +ffffffff81f1b340 t bios_parser_set_dce_clock +ffffffff81f1b380 t bios_parser_program_crtc_timing +ffffffff81f1b3c0 t bios_parser_enable_disp_power_gating +ffffffff81f1b400 t firmware_parser_destroy +ffffffff81f1b4c0 t bios_get_board_layout_info +ffffffff81f1b970 t bios_parser_pack_data_tables +ffffffff81f1b9a0 t bios_get_atom_dc_golden_table +ffffffff81f1bae0 t bios_parser_enable_lvtma_control +ffffffff81f1bb30 t bios_parser_get_soc_bb_info +ffffffff81f1bc30 t bios_parser_get_disp_connector_caps_info +ffffffff81f1bd80 t bios_parser_get_lttpr_caps +ffffffff81f1bed0 t bios_parser_get_lttpr_interop +ffffffff81f1c010 t bios_parser_get_connector_speed_cap_info +ffffffff81f1c160 t get_bios_object +ffffffff81f1c2c0 t get_bios_object_from_path_v3 +ffffffff81f1d000 T object_id_from_bios_object_id +ffffffff81f1e000 T bios_get_image +ffffffff81f1e040 T bios_is_accelerated_mode +ffffffff81f1e0a0 T bios_set_scratch_acc_mode_change +ffffffff81f1e0d0 T bios_set_scratch_critical_state +ffffffff81f1e100 T bios_get_vga_enabled_displays +ffffffff81f1f000 T dal_bios_parser_create +ffffffff81f1f070 T dal_bios_parser_destroy +ffffffff81f20000 T dal_bios_parser_init_cmd_tbl +ffffffff81f20800 t encoder_control_digx_v3 +ffffffff81f20900 t encoder_control_digx_v4 +ffffffff81f20a00 t encoder_control_digx_v5 +ffffffff81f20b50 t encoder_control_dig1_v1 +ffffffff81f20bd0 t encoder_control_dig2_v1 +ffffffff81f20c50 t encoder_control_dig_v1 +ffffffff81f20cb0 t transmitter_control_v2 +ffffffff81f20e50 t transmitter_control_v3 +ffffffff81f21010 t transmitter_control_v4 +ffffffff81f211c0 t transmitter_control_v1_5 +ffffffff81f21340 t transmitter_control_v1_6 +ffffffff81f214b0 t set_pixel_clock_v3 +ffffffff81f21620 t set_pixel_clock_v5 +ffffffff81f217c0 t set_pixel_clock_v6 +ffffffff81f21960 t set_pixel_clock_v7 +ffffffff81f21b30 t enable_spread_spectrum_on_ppll_v1 +ffffffff81f21c40 t enable_spread_spectrum_on_ppll_v2 +ffffffff81f21d60 t enable_spread_spectrum_on_ppll_v3 +ffffffff81f21e60 t adjust_display_pll_v2 +ffffffff81f21fb0 t adjust_display_pll_v3 +ffffffff81f22120 t dac1_encoder_control_v1 +ffffffff81f22190 t dac2_encoder_control_v1 +ffffffff81f22200 t dac1_output_control_v1 +ffffffff81f22260 t dac2_output_control_v1 +ffffffff81f222c0 t set_crtc_using_dtd_timing_v3 +ffffffff81f22420 t set_crtc_timing_v1 +ffffffff81f225c0 t enable_crtc_v1 +ffffffff81f22660 t enable_crtc_mem_req_v1 +ffffffff81f22700 t program_clock_v5 +ffffffff81f22800 t program_clock_v6 +ffffffff81f22920 t external_encoder_control_v3 +ffffffff81f22ad0 t enable_disp_power_gating_v2_1 +ffffffff81f22b90 t set_dce_clock_v2_1 +ffffffff81f23000 T dal_firmware_parser_init_cmd_tbl +ffffffff81f233d0 t encoder_control_digx_v1_5 +ffffffff81f235a0 t encoder_control_fallback +ffffffff81f235f0 t transmitter_control_v1_6 +ffffffff81f23790 t transmitter_control_v1_7 +ffffffff81f23980 t transmitter_control_fallback +ffffffff81f239d0 t set_pixel_clock_v7 +ffffffff81f23c20 t set_pixel_clock_fallback +ffffffff81f23c70 t set_crtc_using_dtd_timing_v3 +ffffffff81f23dd0 t enable_crtc_v1 +ffffffff81f23e70 t external_encoder_control_v3 +ffffffff81f23ea0 t enable_disp_power_gating_v2_1 +ffffffff81f24000 t enable_disp_power_gating_fallback +ffffffff81f24050 t set_dce_clock_v2_1 +ffffffff81f24170 t get_smu_clock_info_v3_1 +ffffffff81f241d0 t enable_lvtma_control +ffffffff81f25000 T dal_bios_parser_init_cmd_tbl_helper +ffffffff81f250a0 T dal_cmd_table_helper_controller_id_to_atom +ffffffff81f251b0 T dal_cmd_table_helper_transmitter_bp_to_atom +ffffffff81f25230 T dal_cmd_table_helper_encoder_mode_bp_to_atom +ffffffff81f252c0 T dal_cmd_table_helper_assign_control_parameter +ffffffff81f25380 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src +ffffffff81f25460 T dal_cmd_table_helper_encoder_id_to_atom +ffffffff81f26000 T dal_bios_parser_init_cmd_tbl_helper2 +ffffffff81f260b0 T dal_cmd_table_helper_controller_id_to_atom2 +ffffffff81f261b0 T dal_cmd_table_helper_transmitter_bp_to_atom2 +ffffffff81f26230 T dal_cmd_table_helper_encoder_mode_bp_to_atom2 +ffffffff81f262c0 T dal_cmd_table_helper_clock_source_id_to_ref_clk_src2 +ffffffff81f263a0 T dal_cmd_table_helper_encoder_id_to_atom2 +ffffffff81f27000 T dal_cmd_tbl_helper_dce110_get_table +ffffffff81f27030 t encoder_action_to_atom +ffffffff81f270a0 t engine_bp_to_atom +ffffffff81f270e0 t clock_source_id_to_atom +ffffffff81f27170 t clock_source_id_to_atom_phy_clk_src_id +ffffffff81f271c0 t signal_type_to_atom_dig_mode +ffffffff81f27220 t hpd_sel_to_atom +ffffffff81f27250 t dig_encoder_sel_to_atom +ffffffff81f27280 t phy_id_to_atom +ffffffff81f272c0 t disp_power_gating_action_to_atom +ffffffff81f28000 T dal_cmd_tbl_helper_dce112_get_table2 +ffffffff81f28030 t encoder_action_to_atom +ffffffff81f280a0 t engine_bp_to_atom +ffffffff81f280e0 t clock_source_id_to_atom +ffffffff81f281b0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff81f28200 t signal_type_to_atom_dig_mode +ffffffff81f28260 t hpd_sel_to_atom +ffffffff81f28290 t dig_encoder_sel_to_atom +ffffffff81f282c0 t phy_id_to_atom +ffffffff81f28300 t disp_power_gating_action_to_atom +ffffffff81f28370 t dc_clock_type_to_atom +ffffffff81f283f0 t transmitter_color_depth_to_atom +ffffffff81f29000 T dal_cmd_tbl_helper_dce112_get_table ffffffff81f29030 t encoder_action_to_atom ffffffff81f290a0 t engine_bp_to_atom ffffffff81f290e0 t clock_source_id_to_atom -ffffffff81f29170 t clock_source_id_to_atom_phy_clk_src_id -ffffffff81f291c0 t signal_type_to_atom_dig_mode -ffffffff81f29220 t hpd_sel_to_atom -ffffffff81f29250 t dig_encoder_sel_to_atom -ffffffff81f29280 t phy_id_to_atom -ffffffff81f292c0 t disp_power_gating_action_to_atom -ffffffff81f2a000 T dal_cmd_tbl_helper_dce112_get_table2 +ffffffff81f291b0 t clock_source_id_to_atom_phy_clk_src_id +ffffffff81f29200 t signal_type_to_atom_dig_mode +ffffffff81f29260 t hpd_sel_to_atom +ffffffff81f29290 t dig_encoder_sel_to_atom +ffffffff81f292c0 t phy_id_to_atom +ffffffff81f29300 t disp_power_gating_action_to_atom +ffffffff81f29370 t dc_clock_type_to_atom +ffffffff81f293f0 t transmitter_color_depth_to_atom +ffffffff81f2a000 T dal_cmd_tbl_helper_dce80_get_table ffffffff81f2a030 t encoder_action_to_atom ffffffff81f2a0a0 t engine_bp_to_atom ffffffff81f2a0e0 t clock_source_id_to_atom @@ -29158,15738 +29166,15727 @@ ffffffff81f2a1b0 t clock_source_id_to_atom_phy_clk_src ffffffff81f2a200 t signal_type_to_atom_dig_mode ffffffff81f2a260 t hpd_sel_to_atom ffffffff81f2a290 t dig_encoder_sel_to_atom -ffffffff81f2a2c0 t phy_id_to_atom -ffffffff81f2a300 t disp_power_gating_action_to_atom -ffffffff81f2a370 t dc_clock_type_to_atom -ffffffff81f2a3f0 t transmitter_color_depth_to_atom -ffffffff81f2b000 T dal_cmd_tbl_helper_dce112_get_table -ffffffff81f2b030 t encoder_action_to_atom -ffffffff81f2b0a0 t engine_bp_to_atom -ffffffff81f2b0e0 t clock_source_id_to_atom -ffffffff81f2b1b0 t clock_source_id_to_atom_phy_clk_src_id -ffffffff81f2b200 t signal_type_to_atom_dig_mode -ffffffff81f2b260 t hpd_sel_to_atom -ffffffff81f2b290 t dig_encoder_sel_to_atom -ffffffff81f2b2c0 t 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+ffffffff81f3b1c0 T dcn30_smu_get_smu_version +ffffffff81f3b1e0 T dcn30_smu_check_driver_if_version +ffffffff81f3b230 T dcn30_smu_check_msg_header_version +ffffffff81f3b280 T dcn30_smu_set_dram_addr_high +ffffffff81f3b2a0 T dcn30_smu_set_dram_addr_low +ffffffff81f3b2c0 T dcn30_smu_transfer_wm_table_smu_2_dram +ffffffff81f3b2e0 T dcn30_smu_transfer_wm_table_dram_2_smu +ffffffff81f3b300 T dcn30_smu_set_hard_min_by_freq +ffffffff81f3b350 T dcn30_smu_set_hard_max_by_freq +ffffffff81f3b3a0 T dcn30_smu_get_dpm_freq_by_index +ffffffff81f3b3f0 T dcn30_smu_get_dc_mode_max_dpm_freq +ffffffff81f3b440 T dcn30_smu_set_min_deep_sleep_dcef_clk +ffffffff81f3b460 T dcn30_smu_set_num_of_displays +ffffffff81f3b480 T dcn30_smu_set_display_refresh_from_mall +ffffffff81f3b4b0 T dcn30_smu_set_external_client_df_cstate_allow +ffffffff81f3b4d0 T dcn30_smu_set_pme_workaround +ffffffff81f3c000 T dcn301_smu_get_smu_version +ffffffff81f3c070 t dcn301_smu_send_msg_with_param +ffffffff81f3c1f0 T dcn301_smu_set_dispclk +ffffffff81f3c290 T dcn301_smu_set_dprefclk +ffffffff81f3c330 T dcn301_smu_set_hard_min_dcfclk +ffffffff81f3c3d0 T dcn301_smu_set_min_deep_sleep_dcfclk +ffffffff81f3c470 T dcn301_smu_set_dppclk +ffffffff81f3c510 T dcn301_smu_set_display_idle_optimization +ffffffff81f3c560 T dcn301_smu_enable_phy_refclk_pwrdwn +ffffffff81f3c5b0 T dcn301_smu_enable_pme_wa +ffffffff81f3c5d0 T dcn301_smu_set_dram_addr_high +ffffffff81f3c620 T dcn301_smu_set_dram_addr_low +ffffffff81f3c670 T dcn301_smu_transfer_dpm_table_smu_2_dram +ffffffff81f3c690 T dcn301_smu_transfer_wm_table_dram_2_smu +ffffffff81f3d000 T vg_clk_mgr_construct +ffffffff81f3d760 T vg_clk_mgr_destroy +ffffffff81f3d7b0 t vg_update_clocks +ffffffff81f3db40 t vg_init_clocks +ffffffff81f3dbe0 t vg_enable_pme_wa +ffffffff81f3dbf0 t vg_are_clock_states_equal +ffffffff81f3dc40 t vg_notify_wm_ranges +ffffffff81f3e000 T dcn31_update_clocks +ffffffff81f3e620 T dcn31_init_clocks +ffffffff81f3e6d0 T dcn31_are_clock_states_equal +ffffffff81f3e730 T dcn31_get_dtb_ref_freq_khz +ffffffff81f3e760 T dcn31_clk_mgr_construct +ffffffff81f3edd0 T dcn31_clk_mgr_destroy +ffffffff81f3ee20 t dcn31_set_low_power_state +ffffffff81f3f000 t dcn31_enable_pme_wa +ffffffff81f3f010 t dcn31_notify_wm_ranges +ffffffff81f3f3b0 t find_clk_for_voltage +ffffffff81f40000 T dcn31_smu_get_smu_version +ffffffff81f40010 t dcn31_smu_send_msg_with_param +ffffffff81f40210 T dcn31_smu_set_dispclk +ffffffff81f40280 T dcn31_smu_set_dprefclk +ffffffff81f402f0 T dcn31_smu_set_hard_min_dcfclk +ffffffff81f40370 T dcn31_smu_set_min_deep_sleep_dcfclk +ffffffff81f403f0 T dcn31_smu_set_dppclk +ffffffff81f40460 T dcn31_smu_set_display_idle_optimization +ffffffff81f404b0 T dcn31_smu_enable_phy_refclk_pwrdwn +ffffffff81f404f0 T dcn31_smu_enable_pme_wa +ffffffff81f40530 T dcn31_smu_set_dram_addr_high +ffffffff81f40570 T dcn31_smu_set_dram_addr_low +ffffffff81f405b0 T dcn31_smu_transfer_dpm_table_smu_2_dram +ffffffff81f405f0 T dcn31_smu_transfer_wm_table_dram_2_smu +ffffffff81f40630 T dcn31_smu_set_zstate_support +ffffffff81f40690 T dcn31_smu_set_dtbclk +ffffffff81f41000 T dcn314_update_clocks +ffffffff81f416d0 T dcn314_are_clock_states_equal +ffffffff81f41730 T dcn314_clk_mgr_construct +ffffffff81f42430 T dcn314_clk_mgr_destroy +ffffffff81f42480 t dcn314_enable_pme_wa +ffffffff81f42490 t dcn314_notify_wm_ranges +ffffffff81f43000 T dcn314_smu_get_smu_version +ffffffff81f43010 t dcn314_smu_send_msg_with_param +ffffffff81f43210 T dcn314_smu_set_dispclk +ffffffff81f43280 T dcn314_smu_set_dprefclk +ffffffff81f432f0 T dcn314_smu_set_hard_min_dcfclk +ffffffff81f43370 T dcn314_smu_set_min_deep_sleep_dcfclk +ffffffff81f433f0 T dcn314_smu_set_dppclk +ffffffff81f43460 T dcn314_smu_set_display_idle_optimization +ffffffff81f434b0 T dcn314_smu_enable_phy_refclk_pwrdwn +ffffffff81f434f0 T dcn314_smu_enable_pme_wa +ffffffff81f43530 T dcn314_smu_set_dram_addr_high +ffffffff81f43570 T dcn314_smu_set_dram_addr_low +ffffffff81f435b0 T dcn314_smu_transfer_dpm_table_smu_2_dram +ffffffff81f435f0 T dcn314_smu_transfer_wm_table_dram_2_smu +ffffffff81f43630 T dcn314_smu_set_zstate_support +ffffffff81f43680 T dcn314_smu_set_dtbclk +ffffffff81f44000 T dcn315_clk_mgr_construct +ffffffff81f449c0 T dcn315_clk_mgr_destroy +ffffffff81f44a10 t dcn315_update_clocks +ffffffff81f44ff0 t dcn315_enable_pme_wa +ffffffff81f45000 t dcn315_notify_wm_ranges +ffffffff81f46000 T dcn315_smu_get_smu_version +ffffffff81f46010 t dcn315_smu_send_msg_with_param +ffffffff81f461a0 T dcn315_smu_set_dispclk +ffffffff81f46210 T dcn315_smu_set_hard_min_dcfclk +ffffffff81f46290 T dcn315_smu_set_min_deep_sleep_dcfclk +ffffffff81f46310 T dcn315_smu_set_dppclk +ffffffff81f46380 T dcn315_smu_set_display_idle_optimization +ffffffff81f463d0 T dcn315_smu_enable_phy_refclk_pwrdwn +ffffffff81f46410 T dcn315_smu_enable_pme_wa +ffffffff81f46450 T dcn315_smu_set_dram_addr_high +ffffffff81f46490 T dcn315_smu_set_dram_addr_low +ffffffff81f464d0 T dcn315_smu_transfer_dpm_table_smu_2_dram +ffffffff81f46510 T dcn315_smu_transfer_wm_table_dram_2_smu +ffffffff81f46550 T dcn315_smu_get_dpref_clk +ffffffff81f465a0 T dcn315_smu_get_dtbclk +ffffffff81f465f0 T dcn315_smu_set_dtbclk +ffffffff81f47000 T dcn316_clk_mgr_construct +ffffffff81f476a0 T dcn316_clk_mgr_destroy +ffffffff81f476f0 t dcn316_update_clocks +ffffffff81f47d20 t dcn316_enable_pme_wa +ffffffff81f47d30 t dcn316_notify_wm_ranges +ffffffff81f480c0 t find_clk_for_voltage +ffffffff81f49000 T dcn316_smu_get_smu_version +ffffffff81f49010 t dcn316_smu_send_msg_with_param +ffffffff81f491a0 T dcn316_smu_set_dispclk +ffffffff81f49210 T dcn316_smu_set_hard_min_dcfclk +ffffffff81f49290 T dcn316_smu_set_min_deep_sleep_dcfclk +ffffffff81f49310 T dcn316_smu_set_dppclk +ffffffff81f49380 T dcn316_smu_set_display_idle_optimization +ffffffff81f493d0 T dcn316_smu_enable_phy_refclk_pwrdwn +ffffffff81f49410 T dcn316_smu_set_dram_addr_high +ffffffff81f49450 T dcn316_smu_set_dram_addr_low +ffffffff81f49490 T dcn316_smu_transfer_dpm_table_smu_2_dram +ffffffff81f494d0 T dcn316_smu_transfer_wm_table_dram_2_smu +ffffffff81f49510 T dcn316_smu_enable_pme_wa +ffffffff81f49550 T dcn316_smu_set_dtbclk +ffffffff81f49590 T dcn316_smu_get_dpref_clk +ffffffff81f495e0 T dcn316_smu_get_smu_fclk +ffffffff81f4a000 T dcn32_init_clocks +ffffffff81f4a4d0 T dcn32_clk_mgr_construct +ffffffff81f4a760 T dcn32_clk_mgr_destroy +ffffffff81f4a7c0 t dcn32_update_clocks +ffffffff81f4af00 t dcn32_dump_clk_registers +ffffffff81f4b120 t dcn32_enable_pme_wa +ffffffff81f4b160 t dcn32_are_clock_states_equal +ffffffff81f4b1c0 t dcn32_notify_wm_ranges +ffffffff81f4b340 t dcn32_set_hard_min_memclk +ffffffff81f4b3e0 t dcn32_set_hard_max_memclk +ffffffff81f4b430 t dcn32_get_memclk_states_from_smu +ffffffff81f4b620 t dcn32_is_smu_present +ffffffff81f4c000 T dcn32_smu_send_fclk_pstate_message +ffffffff81f4c020 t dcn32_smu_send_msg_with_param +ffffffff81f4c160 T dcn32_smu_send_cab_for_uclk_message +ffffffff81f4c180 T dcn32_smu_transfer_wm_table_dram_2_smu +ffffffff81f4c1a0 T dcn32_smu_set_pme_workaround +ffffffff81f4c1c0 T dcn32_smu_set_hard_min_by_freq +ffffffff81f4d000 T dc_stream_adjust_vmin_vmax +ffffffff81f4d180 T dc_stream_get_last_used_drr_vtotal +ffffffff81f4d2e0 T dc_stream_get_crtc_position +ffffffff81f4d510 T dc_stream_configure_crc +ffffffff81f4d750 T dc_stream_get_crc +ffffffff81f4d830 T dc_stream_set_dyn_expansion +ffffffff81f4da90 T dc_stream_set_dither_option +ffffffff81f4dc00 T dc_stream_set_gamut_remap +ffffffff81f4dd80 T dc_stream_program_csc_matrix +ffffffff81f4dfa0 T dc_stream_set_static_screen_params +ffffffff81f4e130 T dc_create +ffffffff81f4ead0 t dc_construct_ctx +ffffffff81f4ec30 t dc_destruct +ffffffff81f4ef00 T dc_hardware_init +ffffffff81f4f010 T dc_init_callbacks +ffffffff81f4f040 T dc_deinit_callbacks +ffffffff81f4f070 T dc_destroy +ffffffff81f4f0c0 T dc_validate_boot_timing +ffffffff81f4f440 T dc_enable_stereo +ffffffff81f4f540 T dc_trigger_sync +ffffffff81f4fb50 T dc_z10_restore +ffffffff81f4fb90 T dc_z10_save_init +ffffffff81f4fbd0 T dc_commit_state +ffffffff81f4fd00 t dc_commit_state_no_check +ffffffff81f51180 T dc_acquire_release_mpc_3dlut +ffffffff81f51260 T dc_post_update_surfaces_to_stream +ffffffff81f51670 T dc_create_state +ffffffff81f51700 T dc_copy_state +ffffffff81f518f0 T dc_retain_state +ffffffff81f51920 T dc_release_state +ffffffff81f51990 T dc_set_generic_gpio_for_stereo +ffffffff81f51aa0 T dc_check_update_surfaces_for_stream +ffffffff81f52710 T dc_dmub_update_dirty_rect +ffffffff81f529a0 T dc_update_planes_and_stream +ffffffff81f530f0 t commit_minimal_transition_state +ffffffff81f53480 t commit_planes_for_stream +ffffffff81f54b30 T dc_commit_updates_for_stream +ffffffff81f54f20 t copy_surface_update_to_plane +ffffffff81f55320 t copy_stream_update_to_stream +ffffffff81f55950 T dc_get_current_stream_count +ffffffff81f55980 T dc_get_stream_at_index +ffffffff81f559c0 T dc_interrupt_to_irq_source +ffffffff81f559e0 T dc_interrupt_set +ffffffff81f55a30 T dc_interrupt_ack +ffffffff81f55a50 T dc_power_down_on_boot +ffffffff81f55aa0 T dc_set_power_state +ffffffff81f55c90 T dc_resume +ffffffff81f55d00 T dc_is_dmcu_initialized +ffffffff81f55d50 T dc_is_oem_i2c_device_present +ffffffff81f55d90 T dc_submit_i2c +ffffffff81f55dc0 T dc_submit_i2c_oem +ffffffff81f55e10 T dc_link_add_remote_sink +ffffffff81f55fa0 T dc_link_remove_remote_sink +ffffffff81f56090 T get_clock_requirements_for_state +ffffffff81f56110 T dc_set_clock +ffffffff81f56150 T dc_get_clock +ffffffff81f56190 T dc_set_psr_allow_active +ffffffff81f56290 T dc_allow_idle_optimizations +ffffffff81f56330 T dc_unlock_memory_clock_frequency +ffffffff81f563a0 T dc_lock_memory_clock_frequency +ffffffff81f56430 T dc_enable_dcmode_clk_limit +ffffffff81f56530 t blank_and_force_memclk +ffffffff81f56710 T dc_is_plane_eligible_for_idle_optimizations +ffffffff81f56760 T dc_hardware_release +ffffffff81f567b0 T dc_mclk_switch_using_fw_based_vblank_stretch_shut_down +ffffffff81f567f0 T dc_is_dmub_outbox_supported +ffffffff81f56850 T dc_enable_dmub_notifications +ffffffff81f568b0 T dc_enable_dmub_outbox +ffffffff81f568f0 T dc_process_dmub_aux_transfer_async +ffffffff81f56a90 T get_link_index_from_dpia_port_index +ffffffff81f56b40 T dc_process_dmub_set_config_async +ffffffff81f56c20 T dc_process_dmub_set_mst_slots +ffffffff81f56d10 T dc_process_dmub_dpia_hpd_int_enable +ffffffff81f56de0 T dc_disable_accelerated_mode +ffffffff81f56e00 T dc_notify_vsync_int_state +ffffffff81f57030 T dc_extended_blank_supported +ffffffff81f58000 T pre_surface_trace +ffffffff81f58030 T update_surface_trace +ffffffff81f58060 T post_surface_trace +ffffffff81f58090 T context_timing_trace +ffffffff81f58240 T context_clock_trace +ffffffff81f58270 T dc_status_to_str +ffffffff81f59000 T find_color_matrix +ffffffff81f590a0 T color_space_to_black_color +ffffffff81f59130 T hwss_wait_for_blank_complete +ffffffff81f591d0 T get_mpctree_visual_confirm_color +ffffffff81f59230 T get_surface_visual_confirm_color +ffffffff81f592e0 T get_hdr_visual_confirm_color +ffffffff81f59390 T get_subvp_visual_confirm_color +ffffffff81f59480 T get_surface_tile_visual_confirm_color +ffffffff81f5a000 T get_hpd_gpio +ffffffff81f5a0e0 T dc_link_wait_for_t12 +ffffffff81f5a140 T dc_link_detect_sink +ffffffff81f5a300 T dc_link_is_dp_sink_present +ffffffff81f5a580 T reset_cur_dp_mst_topology +ffffffff81f5a5e0 T dc_link_detect +ffffffff81f5b900 T dc_link_get_hpd_state +ffffffff81f5b970 T link_create +ffffffff81f5ca90 T link_destroy +ffffffff81f5cbf0 T dc_link_blank_all_dp_displays +ffffffff81f5ccc0 T dc_link_blank_dp_stream +ffffffff81f5cdd0 T dc_link_blank_all_edp_displays +ffffffff81f5ce90 T dc_power_alpm_dpcd_enable +ffffffff81f5cef0 T dc_link_validate_mode_timing +ffffffff81f5d410 T dc_link_get_backlight_level +ffffffff81f5d580 T dc_link_get_target_backlight_pwm +ffffffff81f5d690 T dc_link_set_backlight_level +ffffffff81f5d7f0 T dc_link_set_psr_allow_active +ffffffff81f5da60 T dc_link_get_psr_state +ffffffff81f5db90 T dc_link_setup_psr +ffffffff81f5dff0 T dc_link_get_psr_residency +ffffffff81f5e0e0 T dc_link_set_sink_vtotal_in_psr_active +ffffffff81f5e160 T dc_link_get_status +ffffffff81f5e190 T core_link_resume +ffffffff81f5e1d0 t program_hpd_filter +ffffffff81f5e360 T dc_link_allocate_mst_payload +ffffffff81f5e830 t update_mst_stream_alloc_table +ffffffff81f5eab0 t dc_log_vcp_x_y +ffffffff81f5ec40 T dc_link_reduce_mst_payload +ffffffff81f5f0c0 T dc_link_increase_mst_payload +ffffffff81f5f530 T core_link_enable_stream +ffffffff81f60210 t disable_link +ffffffff81f60330 t dc_link_update_sst_payload +ffffffff81f60570 T core_link_set_avmute +ffffffff81f605c0 T core_link_disable_stream +ffffffff81f60d50 t get_ext_hdmi_settings +ffffffff81f60f90 t write_i2c_retimer_setting +ffffffff81f61640 t write_i2c_default_retimer_setting +ffffffff81f61ce0 t write_i2c_redriver_setting +ffffffff81f61e20 T dc_link_enable_hpd_filter +ffffffff81f61f80 T dc_link_set_drive_settings +ffffffff81f62050 T dc_link_get_cur_link_res +ffffffff81f621a0 T dc_link_set_preferred_link_settings +ffffffff81f622f0 T dc_link_set_preferred_training_settings +ffffffff81f62430 T dc_link_enable_hpd +ffffffff81f62440 T dc_link_disable_hpd +ffffffff81f62450 T dc_link_set_test_pattern +ffffffff81f62490 T dc_link_bandwidth_kbps +ffffffff81f62530 T dc_link_should_enable_fec +ffffffff81f62650 T dc_link_get_link_cap +ffffffff81f626a0 T dc_link_overwrite_extended_receiver_cap +ffffffff81f626b0 T dc_link_is_fec_supported +ffffffff81f62770 T dc_bandwidth_in_kbps_from_timing +ffffffff81f628c0 T dc_get_cur_link_res_map +ffffffff81f629a0 T dc_restore_link_res_map +ffffffff81f62ac0 t read_current_link_settings_on_detect +ffffffff81f62cd0 t enable_link_dp +ffffffff81f63000 T dal_ddc_i2c_payloads_add +ffffffff81f630c0 T dal_ddc_service_create +ffffffff81f63230 T dal_ddc_service_destroy +ffffffff81f632c0 T dal_ddc_service_get_type +ffffffff81f632f0 T dal_ddc_service_set_transaction_type +ffffffff81f63320 T dal_ddc_service_is_in_aux_transaction_mode +ffffffff81f63350 T ddc_service_set_dongle_type +ffffffff81f63380 T get_defer_delay +ffffffff81f634a0 T dal_ddc_service_i2c_query_dp_dual_mode_adaptor +ffffffff81f638b0 T dal_ddc_service_query_ddc_data +ffffffff81f63c70 T dal_ddc_submit_aux_command +ffffffff81f63d60 T dc_link_aux_transfer_with_retries +ffffffff81f63d70 T dc_link_aux_transfer_raw +ffffffff81f63da0 T dc_link_aux_try_to_configure_timeout +ffffffff81f63e70 T dal_ddc_service_set_ddc_pin +ffffffff81f63ea0 T dal_ddc_service_get_ddc_pin +ffffffff81f63ed0 T dal_ddc_service_write_scdc_data +ffffffff81f63fc0 T dal_ddc_service_read_scdc_data +ffffffff81f65000 T dp_wait_for_training_aux_rd_interval +ffffffff81f65080 T dc_dp_training_pattern_to_dpcd_training_pattern +ffffffff81f65100 T dpcd_set_link_settings +ffffffff81f65280 T dc_dp_initialize_scrambling_data_symbols +ffffffff81f65310 T dp_is_cr_done +ffffffff81f65370 T dp_is_ch_eq_done +ffffffff81f65430 T dp_is_symbol_locked +ffffffff81f654f0 T dp_is_interlane_aligned +ffffffff81f65520 T dp_hw_to_dpcd_lane_settings +ffffffff81f655e0 T dp_get_link_encoding_format +ffffffff81f65630 T dp_decide_lane_settings +ffffffff81f65a70 T dp_get_lane_status_and_lane_adjust +ffffffff81f65ba0 T dpcd_set_lane_settings +ffffffff81f65be0 T dp_is_max_vs_reached +ffffffff81f65c70 T dp_translate_training_aux_read_interval +ffffffff81f65cb0 T dp_get_cr_failure +ffffffff81f65d20 T dp_check_link_loss_status +ffffffff81f65dc0 T dp_decide_training_settings +ffffffff81f66120 t decide_8b_10b_training_settings +ffffffff81f66430 T dp_convert_to_count +ffffffff81f664c0 T dc_link_dp_set_drive_settings +ffffffff81f66670 T dp_set_hw_lane_settings +ffffffff81f66820 T dc_link_dp_perform_link_training_skip_aux +ffffffff81f66c60 t override_training_settings +ffffffff81f66f10 T dp_set_hw_training_pattern +ffffffff81f66f60 T dp_set_hw_test_pattern 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dp_verify_link_cap_with_retries +ffffffff81f6c760 T dp_validate_mode_timing +ffffffff81f6c820 T decide_edp_link_settings +ffffffff81f6c950 T decide_link_settings +ffffffff81f6cd80 t decide_edp_link_settings_with_dsc +ffffffff81f6d120 T dc_link_dp_allow_hpd_rx_irq +ffffffff81f6d160 T is_dp_branch_device +ffffffff81f6d190 T dc_link_dp_handle_automated_test +ffffffff81f6dd50 T dc_link_dp_handle_link_loss +ffffffff81f6e1b0 T dc_link_handle_hpd_rx_irq +ffffffff81f6e550 T is_mst_supported +ffffffff81f6e5f0 T is_dp_active_dongle +ffffffff81f6e630 T dc_link_bw_kbps_from_raw_frl_link_rate_data +ffffffff81f6e670 T dp_retrieve_lttpr_cap +ffffffff81f6e850 T dp_decide_lttpr_mode +ffffffff81f6e970 T dp_decide_8b_10b_lttpr_mode +ffffffff81f6ea80 T dp_decide_128b_132b_lttpr_mode +ffffffff81f6eb20 T dp_get_lttpr_mode_override +ffffffff81f6ebf0 T dp_overwrite_extended_receiver_cap +ffffffff81f6ed00 t get_active_converter_info +ffffffff81f6f170 T detect_dp_sink_caps +ffffffff81f6f180 t retrieve_link_cap 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dcn20_validate_apply_pipe_split_flags +ffffffff820287a0 T dcn20_fast_validate_bw +ffffffff82028cb0 T dcn20_validate_bandwidth +ffffffff82028d30 T dcn20_acquire_idle_pipe_for_layer +ffffffff82028e40 T dcn20_get_dcc_compression_cap +ffffffff82028e70 T dcn20_patch_unknown_plane_state +ffffffff82028ec0 T dcn20_dwbc_create +ffffffff82028fe0 T dcn20_mmhubbub_create +ffffffff82029140 T dcn20_create_resource_pool +ffffffff8202a980 t dcn20_resource_destruct +ffffffff8202ae20 t dcn20_destroy_resource_pool +ffffffff8202ae80 t dcn20_panel_cntl_create +ffffffff8202af10 t read_dce_straps +ffffffff8202af30 t dcn20_create_audio +ffffffff8202b000 T enc2_set_dynamic_metadata +ffffffff8202b270 T enc2_stream_encoder_dp_unblank +ffffffff8202b5a0 T enc2_stream_encoder_dp_set_stream_attribute +ffffffff8202b600 T enc2_get_fifo_cal_average_level +ffffffff8202b660 T dcn20_stream_encoder_construct +ffffffff8202b6b0 t enc2_stream_encoder_update_hdmi_info_packets +ffffffff8202b780 t enc2_stream_encoder_stop_hdmi_info_packets +ffffffff8202ba80 t enc2_stream_encoder_update_dp_info_packets +ffffffff8202bb30 t enc2_read_state +ffffffff8202bcb0 t enc2_dp_set_dsc_config +ffffffff8202bd80 t enc2_dp_set_dsc_pps_info_packet +ffffffff8202c250 t enc2_dp_set_odm_combine +ffffffff8202c290 t enc2_update_hdmi_info_packet +ffffffff8202d000 T dcn20_vmid_setup +ffffffff8202e000 T dccg201_create +ffffffff8202e0b0 t dccg201_update_dpp_dto +ffffffff8202f000 T dpp201_construct +ffffffff8202f070 t dpp201_get_optimal_number_of_taps +ffffffff8202f450 t dpp201_cnv_setup +ffffffff82030000 T hubbub201_construct +ffffffff82030050 t hubbub201_program_watermarks +ffffffff82031000 T dcn201_hubp_construct +ffffffff82031070 t hubp201_setup +ffffffff82031350 t hubp201_program_surface_config +ffffffff82032000 T dcn201_update_plane_addr +ffffffff820322a0 T dcn201_init_blank +ffffffff820323e0 T dcn201_init_hw +ffffffff82032ca0 T dcn201_plane_atomic_disconnect +ffffffff82032e10 T dcn201_update_mpcc +ffffffff820330b0 T dcn201_pipe_control_lock +ffffffff820331b0 T dcn201_set_cursor_attribute +ffffffff82033240 T dcn201_set_dmdata_attributes +ffffffff82033350 T dcn201_unblank_stream +ffffffff82034000 T dcn201_hw_sequencer_construct +ffffffff82035000 T dcn201_link_encoder_construct +ffffffff820351a0 t dcn201_link_encoder_is_in_alt_mode +ffffffff82035210 t dcn201_link_encoder_get_max_link_cap +ffffffff82036000 t mpc201_set_out_rate_control +ffffffff82036120 T dcn201_mpc_construct +ffffffff82037000 T dcn201_opp_construct +ffffffff82038000 T optc201_is_two_pixels_per_containter +ffffffff82038010 T dcn201_timing_generator_init +ffffffff82038080 t optc201_validate_timing +ffffffff82038170 t optc201_triplebuffer_unlock +ffffffff82038210 t optc201_triplebuffer_lock +ffffffff82038330 t optc201_get_optc_source +ffffffff82039000 T dcn201_create_resource_pool +ffffffff82039a30 t dcn201_resource_destruct +ffffffff82039d20 t dcn201_destroy_resource_pool +ffffffff82039d80 t dcn201_link_init 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dcn21_link_encoder_enable_dp_mst_output +ffffffff82043570 t dcn21_link_encoder_disable_output +ffffffff82044000 T dcn21_fast_validate_bw +ffffffff82044650 T dcn21_create_resource_pool +ffffffff820459b0 t dcn21_resource_destruct +ffffffff82045e50 t dcn21_destroy_resource_pool +ffffffff82045eb0 t dcn21_panel_cntl_create +ffffffff82045f40 t dcn21_link_encoder_create +ffffffff82046040 t dcn21_validate_bandwidth +ffffffff820460d0 t dcn21_patch_unknown_plane_state +ffffffff82046120 t dcn21_get_panel_config_defaults +ffffffff82046190 t read_dce_straps +ffffffff820461b0 t dcn21_create_audio +ffffffff820461e0 t dcn21_stream_encoder_create +ffffffff82046280 t dcn21_hwseq_create +ffffffff82047000 T afmt3_setup_hdmi_audio +ffffffff820471c0 T afmt3_se_audio_setup +ffffffff82047380 T afmt3_audio_mute_control +ffffffff820473f0 T afmt3_audio_info_immediate_update +ffffffff82047430 T afmt3_setup_dp_audio +ffffffff82047520 T afmt3_construct +ffffffff82048000 T cm_helper_program_gamcor_xfer_func +ffffffff820483a0 T cm3_helper_translate_curve_to_hw_format +ffffffff82048fa0 T cm3_helper_convert_to_custom_float +ffffffff820493f0 T cm3_helper_translate_curve_to_degamma_hw_format +ffffffff82049c50 T is_rgb_equal +ffffffff8204a000 T dccg3_create +ffffffff8204a0b0 T dccg30_create +ffffffff8204b000 T dcn30_link_encoder_validate_output_with_stream +ffffffff8204b010 T dcn30_link_encoder_construct +ffffffff8204b230 T enc3_hw_init +ffffffff8204c000 T enc3_stream_encoder_update_hdmi_info_packets +ffffffff8204c100 t enc3_update_hdmi_info_packet +ffffffff8204c4f0 T enc3_stream_encoder_stop_hdmi_info_packets +ffffffff8204cab0 T enc3_dp_set_dsc_pps_info_packet +ffffffff8204cdd0 T enc3_stream_encoder_update_dp_info_packets +ffffffff8204d000 T enc3_audio_mute_control +ffffffff8204d070 T enc3_se_dp_audio_setup +ffffffff8204d0f0 T enc3_se_dp_audio_enable +ffffffff8204d1e0 T enc3_se_hdmi_audio_setup +ffffffff8204d4f0 T dcn30_dio_stream_encoder_construct +ffffffff8204d560 t enc3_stream_encoder_hdmi_set_stream_attribute +ffffffff8204db40 t enc3_stream_encoder_dvi_set_stream_attribute +ffffffff8204dd40 t enc3_read_state +ffffffff8204dec0 t enc3_dp_set_dsc_config +ffffffff8204df90 t enc3_dp_set_odm_combine +ffffffff8204e000 T dpp30_read_state +ffffffff8204e040 T dpp3_program_post_csc +ffffffff8204e220 T dpp3_set_pre_degam +ffffffff8204e2d0 T dpp3_cnv_setup +ffffffff8204eb90 T dpp3_set_cursor_attributes +ffffffff8204ed00 T dpp3_get_optimal_number_of_taps +ffffffff8204f770 T dpp3_construct +ffffffff8204f7d0 t dpp3_deferred_update +ffffffff8204fba0 t dpp3_program_blnd_lut +ffffffff82050610 t dpp3_program_shaper +ffffffff82052660 t dpp3_program_3dlut +ffffffff82052e30 t dpp3_set3dlut_ram12 +ffffffff82053000 T dpp3_program_cm_dealpha +ffffffff820530a0 T dpp3_program_cm_bias +ffffffff82053180 T dpp3_program_gamcor_lut +ffffffff82053bb0 t dpp3_power_on_gamcor_lut +ffffffff82053ce0 T dpp3_set_hdr_multiplier +ffffffff82053d30 T dpp3_cm_set_gamut_remap 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hubp3_set_vm_system_aperture_settings +ffffffff82057130 T hubp3_program_surface_flip_and_addr +ffffffff82057b60 T hubp3_dcc_control +ffffffff82057c20 T hubp3_dcc_control_sienna_cichlid +ffffffff82057d30 T hubp3_dmdata_set_attributes +ffffffff82057f30 T hubp3_program_surface_config +ffffffff82058230 T hubp3_read_state +ffffffff820584a0 T hubp3_setup +ffffffff82058530 T hubp3_init +ffffffff82058560 T hubp3_construct +ffffffff82059000 T dcn30_set_blend_lut +ffffffff82059060 T dcn30_set_input_transfer_func +ffffffff820591c0 T dcn30_set_output_transfer_func +ffffffff820594e0 T dcn30_update_writeback +ffffffff82059570 t dcn30_set_writeback +ffffffff82059720 T dcn30_mmhubbub_warmup +ffffffff820599d0 T dcn30_enable_writeback +ffffffff82059aa0 T dcn30_disable_writeback +ffffffff82059b80 T dcn30_program_all_writeback_pipes_in_tree +ffffffff82059e60 T dcn30_init_hw +ffffffff8205a750 T dcn30_set_avmute +ffffffff8205a7b0 T dcn30_update_info_frame +ffffffff8205a880 T dcn30_program_dmdata_engine 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mpc3_set_gamut_remap +ffffffff820619d0 T mpc3_program_3dlut +ffffffff82062150 t mpc3_set3dlut_ram12 +ffffffff82062330 T mpc3_set_output_csc +ffffffff820624a0 T mpc3_set_ocsc_default +ffffffff82062610 T mpc3_set_rmu_mux +ffffffff820626b0 T mpc3_get_rmu_mux_status +ffffffff82062750 T mpcc3_acquire_rmu +ffffffff820628b0 t mpcc3_release_rmu +ffffffff82062a20 t mpc3_set_mpc_mem_lp_mode +ffffffff82062bb0 T dcn30_mpc_construct +ffffffff82063000 T optc3_triplebuffer_lock +ffffffff82063120 T optc3_lock_doublebuffer_enable +ffffffff820633b0 T optc3_lock_doublebuffer_disable +ffffffff820634c0 T optc3_lock +ffffffff82063590 T optc3_set_out_mux +ffffffff820635d0 T optc3_program_blank_color +ffffffff82063700 T optc3_set_drr_trigger_window +ffffffff82063790 T optc3_set_vtotal_change_limit +ffffffff82063800 T optc3_set_dsc_config +ffffffff82063850 T optc3_set_odm_bypass +ffffffff820639c0 T optc3_set_vtotal_min_max +ffffffff820639d0 T optc3_tg_init +ffffffff82063a20 T dcn30_timing_generator_init +ffffffff82063a90 t optc3_set_odm_combine +ffffffff82064000 T dcn30_add_stream_to_ctx +ffffffff82064010 T dcn30_populate_dml_pipes_from_context +ffffffff82064100 T dcn30_populate_dml_writeback_from_context +ffffffff82064160 T dcn30_calc_max_scaled_time +ffffffff820641b0 T dcn30_set_mcif_arb_params +ffffffff82064320 T dcn30_acquire_post_bldn_3dlut +ffffffff82064490 T dcn30_release_post_bldn_3dlut +ffffffff82064530 T dcn30_internal_validate_bw +ffffffff82065300 t dcn30_split_stream_for_mpc_or_odm +ffffffff82065620 T dcn30_can_support_mclk_switch_using_fw_based_vblank_stretch +ffffffff82065740 T dcn30_setup_mclk_switch_using_fw_based_vblank_stretch +ffffffff820657e0 T dcn30_update_soc_for_wm_a +ffffffff82065830 T dcn30_calculate_wm_and_dlg +ffffffff820658a0 T dcn30_validate_bandwidth +ffffffff82065cd0 T dcn30_update_bw_bounding_box +ffffffff820664b0 T dcn30_create_resource_pool +ffffffff82067a70 t dcn30_resource_destruct +ffffffff82067fe0 t dcn30_destroy_resource_pool +ffffffff82068040 t dcn30_panel_cntl_create +ffffffff820680d0 t dcn30_link_encoder_create +ffffffff82068180 t read_dce_straps +ffffffff820681a0 t dcn30_create_audio +ffffffff820681d0 t dcn30_stream_encoder_create +ffffffff82068350 t dcn30_hwseq_create +ffffffff82069000 T vpg3_update_generic_info_packet +ffffffff820699a0 T vpg3_construct +ffffffff8206a000 T dccg301_create +ffffffff8206b000 T dcn301_link_encoder_construct +ffffffff8206c000 T hubbub301_construct +ffffffff8206d000 T dcn301_hw_sequencer_construct +ffffffff8206e000 T dcn301_panel_cntl_construct +ffffffff8206e050 t dcn301_panel_cntl_destroy +ffffffff8206e0a0 t dcn301_panel_cntl_hw_init +ffffffff8206e2a0 t dcn301_is_panel_backlight_on +ffffffff8206e300 t dcn301_is_panel_powered_on +ffffffff8206e3b0 t dcn301_store_backlight_level +ffffffff8206e450 t dcn301_get_16_bit_backlight_from_pwm +ffffffff8206f000 T dcn301_create_resource_pool +ffffffff82070590 t dcn301_destruct +ffffffff82070ad0 t dcn301_destroy_resource_pool +ffffffff82070b30 t dcn301_panel_cntl_create +ffffffff82070bc0 t dcn301_link_encoder_create +ffffffff82070c70 t dcn301_calculate_wm_and_dlg +ffffffff82070ce0 t read_dce_straps +ffffffff82070d00 t dcn301_create_audio +ffffffff82070d30 t dcn301_stream_encoder_create +ffffffff82070eb0 t dcn301_hwseq_create +ffffffff82071000 T dcn302_dpp_pg_control +ffffffff820712a0 T dcn302_hubp_pg_control +ffffffff82071550 T dcn302_dsc_pg_control +ffffffff82072000 T dcn302_hw_sequencer_construct +ffffffff82073000 T dcn302_update_bw_bounding_box +ffffffff82073050 T dcn302_create_resource_pool +ffffffff820743e0 t dcn302_resource_destruct +ffffffff820748f0 t dcn302_destroy_resource_pool +ffffffff82074940 t dcn302_panel_cntl_create +ffffffff820749d0 t dcn302_link_encoder_create +ffffffff82074a80 t read_dce_straps +ffffffff82074aa0 t dcn302_create_audio +ffffffff82074ad0 t dcn302_stream_encoder_create +ffffffff82074c50 t dcn302_hwseq_create +ffffffff82075000 T dcn303_dpp_pg_control +ffffffff82075030 T dcn303_hubp_pg_control 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dccg31_disable_dpstreamclk +ffffffff8207b480 T dccg31_enable_symclk32_se +ffffffff8207b770 T dccg31_disable_symclk32_se +ffffffff8207ba40 T dccg31_enable_symclk32_le +ffffffff8207bc10 T dccg31_disable_symclk32_le +ffffffff8207bdb0 T dccg31_disable_dscclk +ffffffff8207bf70 T dccg31_enable_dscclk +ffffffff8207c140 T dccg31_set_physymclk +ffffffff8207c650 T dccg31_set_dtbclk_dto +ffffffff8207c900 T dccg31_set_audio_dtbclk_dto +ffffffff8207ca00 T dccg31_get_dccg_ref_freq +ffffffff8207ca30 T dccg31_set_dispclk_change_mode +ffffffff8207ca80 T dccg31_init +ffffffff8207cfe0 T dccg31_otg_add_pixel +ffffffff8207d020 T dccg31_otg_drop_pixel +ffffffff8207d060 T dccg31_create +ffffffff8207e000 T dcn31_link_encoder_set_dio_phy_mux +ffffffff8207e380 T dcn31_link_encoder_construct +ffffffff8207e580 T dcn31_link_encoder_construct_minimal +ffffffff8207e600 T dcn31_link_encoder_enable_dp_output +ffffffff8207e840 T dcn31_link_encoder_enable_dp_mst_output +ffffffff8207ea80 T dcn31_link_encoder_disable_output +ffffffff8207ed10 T dcn31_link_encoder_is_in_alt_mode +ffffffff8207ee50 T dcn31_link_encoder_get_max_link_cap +ffffffff8207efc0 t enc31_hw_init +ffffffff82080000 T dcn31_hpo_dp_link_enc_enable +ffffffff82080150 T dcn31_hpo_dp_link_enc_disable +ffffffff820801c0 T dcn31_hpo_dp_link_enc_set_link_test_pattern +ffffffff82080af0 T dcn31_hpo_dp_link_enc_update_stream_allocation_table +ffffffff82080d80 T dcn31_hpo_dp_link_enc_set_throttled_vcp_size +ffffffff82081020 T dcn31_hpo_dp_link_enc_read_state +ffffffff820812d0 T dcn31_hpo_dp_link_enc_enable_dp_output +ffffffff820813d0 T dcn31_hpo_dp_link_enc_disable_output +ffffffff82081500 T dcn31_hpo_dp_link_enc_set_ffe +ffffffff820815f0 T hpo_dp_link_encoder31_construct +ffffffff82081640 t dcn31_hpo_dp_link_enc_is_in_alt_mode +ffffffff82082000 T dcn31_hpo_dp_stream_encoder_construct +ffffffff82082070 t dcn31_hpo_dp_stream_enc_enable_stream +ffffffff820821b0 t dcn31_hpo_dp_stream_enc_dp_unblank +ffffffff82082460 t dcn31_hpo_dp_stream_enc_dp_blank +ffffffff82082560 t dcn31_hpo_dp_stream_enc_disable +ffffffff820825d0 t dcn31_hpo_dp_stream_enc_set_stream_attribute +ffffffff82082e80 t dcn31_hpo_dp_stream_enc_update_dp_info_packets +ffffffff82083030 t dcn31_hpo_dp_stream_enc_stop_dp_info_packets +ffffffff820831c0 t dcn31_hpo_dp_stream_enc_set_dsc_pps_info_packet +ffffffff82083460 t dcn31_hpo_dp_stream_enc_map_stream_to_link +ffffffff82083560 t dcn31_hpo_dp_stream_enc_mute_control +ffffffff820835d0 t dcn31_hpo_dp_stream_enc_audio_setup +ffffffff82083680 t dcn31_hpo_dp_stream_enc_audio_enable +ffffffff82083750 t dcn31_hpo_dp_stream_enc_audio_disable +ffffffff82083900 t dcn31_hpo_dp_stream_enc_read_state +ffffffff82083a90 t dcn31_set_hblank_min_symbol_width +ffffffff82084000 T hubbub31_init_dchub_sys_ctx +ffffffff820841f0 T hubbub31_construct +ffffffff82084280 t hubbub31_get_dcc_compression_cap +ffffffff82084460 t hubbub31_get_dchub_ref_freq +ffffffff82084530 t hubbub31_program_watermarks +ffffffff82085de0 t hubbub31_verify_allow_pstate_change_high +ffffffff82085fa0 t dcn31_program_det_size +ffffffff82086150 t dcn31_program_compbuf_size +ffffffff820863d0 t dcn31_init_crb +ffffffff82087000 T hubp31_set_unbounded_requesting +ffffffff82087090 T hubp31_soft_reset +ffffffff820870e0 T hubp31_construct +ffffffff82087150 t hubp31_program_extended_blank +ffffffff82088000 T dcn31_init_hw +ffffffff82088960 T dcn31_dsc_pg_control +ffffffff82088ca0 T dcn31_enable_power_gating_plane +ffffffff82088f00 T dcn31_update_info_frame +ffffffff82088fd0 T dcn31_z10_save_init +ffffffff82089090 T dcn31_z10_restore +ffffffff82089170 T dcn31_hubp_pg_control +ffffffff82089480 T dcn31_init_sys_ctx +ffffffff82089530 T dcn31_reset_hw_ctx_wrap +ffffffff820898a0 T dcn31_setup_hpo_hw_control +ffffffff8208a000 T dcn31_hw_sequencer_construct +ffffffff8208b000 T optc31_immediate_disable_crtc +ffffffff8208b0f0 T optc31_set_drr +ffffffff8208b300 T optc3_init_odm +ffffffff8208b470 T dcn31_timing_generator_init +ffffffff8208b4e0 t optc31_enable_crtc +ffffffff8208b5e0 t optc31_disable_crtc +ffffffff8208b6c0 t optc31_set_odm_combine +ffffffff8208c000 T dcn31_panel_cntl_construct +ffffffff8208c040 t dcn31_panel_cntl_destroy +ffffffff8208c090 t dcn31_panel_cntl_hw_init +ffffffff8208c180 t dcn31_is_panel_backlight_on +ffffffff8208c220 t dcn31_is_panel_powered_on +ffffffff8208c2c0 t dcn31_store_backlight_level +ffffffff8208c380 t dcn31_get_16_bit_backlight_from_pwm +ffffffff8208d000 T dcn31_populate_dml_pipes_from_context +ffffffff8208d350 T dcn31_calculate_wm_and_dlg +ffffffff8208d3c0 T dcn31_populate_dml_writeback_from_context +ffffffff8208d420 T dcn31_set_mcif_arb_params +ffffffff8208d480 T dcn31_validate_bandwidth +ffffffff8208d860 T dcn31_create_resource_pool +ffffffff8208ec00 t dcn31_resource_destruct +ffffffff8208f260 t dcn31_destroy_resource_pool +ffffffff8208f2c0 t dcn31_panel_cntl_create +ffffffff8208f330 t dcn31_link_encoder_create +ffffffff8208f3e0 t dcn31_link_enc_create_minimal +ffffffff8208f480 t dcn31_get_panel_config_defaults +ffffffff8208f4f0 t read_dce_straps +ffffffff8208f510 t dcn31_create_audio +ffffffff8208f540 t dcn31_stream_encoder_create +ffffffff8208f6c0 t dcn31_hpo_dp_stream_encoder_create +ffffffff8208f880 t dcn31_hpo_dp_link_encoder_create +ffffffff8208f910 t dcn31_hwseq_create +ffffffff82090000 T vpg31_powerdown +ffffffff82090090 T vpg31_poweron +ffffffff82090120 T vpg31_construct +ffffffff82091000 T dccg314_create +ffffffff820910b0 t dccg314_set_dpstreamclk +ffffffff82091480 t dccg314_set_dtbclk_dto +ffffffff82091670 t dccg314_set_pixel_rate_div +ffffffff820919e0 t dccg314_set_valid_pixel_rate +ffffffff82092000 T dcn314_dio_stream_encoder_construct +ffffffff82092070 t enc314_stream_encoder_hdmi_set_stream_attribute +ffffffff82092660 t enc314_stream_encoder_dvi_set_stream_attribute +ffffffff82092860 t enc314_stream_encoder_dp_blank +ffffffff820928c0 t enc314_stream_encoder_dp_unblank +ffffffff82092c00 t enc314_read_state +ffffffff82092d60 t enc314_dp_set_dsc_config +ffffffff82092db0 t enc314_dp_set_odm_combine +ffffffff82092df0 t enc314_set_dig_input_mode +ffffffff82092e40 t enc314_enable_fifo +ffffffff82092ee0 t enc314_disable_fifo +ffffffff82092f20 t enc314_reset_fifo +ffffffff82094000 T dcn314_update_odm +ffffffff82094610 T dcn314_dsc_pg_control +ffffffff820949d0 T dcn314_enable_power_gating_plane +ffffffff82094c60 T dcn314_calculate_dccg_k1_k2_values +ffffffff82094de0 T dcn314_set_pixels_per_cycle +ffffffff82095000 T dcn314_hw_sequencer_construct +ffffffff82096000 T dcn314_timing_generator_init +ffffffff82096070 t optc314_enable_crtc +ffffffff82096170 t optc314_disable_crtc +ffffffff82096240 t optc314_phantom_crtc_post_enable +ffffffff82096300 t optc314_set_odm_bypass +ffffffff82096470 t optc314_set_odm_combine +ffffffff82096770 t optc314_set_h_timing_div_manual_mode +ffffffff82097000 T dcn314_create_resource_pool +ffffffff820982d0 t dcn314_resource_destruct +ffffffff82098930 t dcn314_destroy_resource_pool +ffffffff82098990 t dcn31_panel_cntl_create +ffffffff82098a00 t dcn31_link_encoder_create +ffffffff82098ab0 t dcn31_link_enc_create_minimal +ffffffff82098b50 t dcn314_populate_dml_pipes_from_context +ffffffff82098be0 t dcn314_update_bw_bounding_box +ffffffff82098c30 t dcn314_get_panel_config_defaults +ffffffff82098ca0 t read_dce_straps +ffffffff82098cc0 t dcn31_create_audio +ffffffff82098cf0 t dcn314_stream_encoder_create +ffffffff82098e70 t dcn31_hpo_dp_stream_encoder_create +ffffffff82099030 t dcn31_hpo_dp_link_encoder_create +ffffffff820990c0 t dcn314_hwseq_create +ffffffff8209a000 T dcn315_create_resource_pool +ffffffff8209b260 t dcn315_resource_destruct +ffffffff8209b8c0 t dcn315_destroy_resource_pool +ffffffff8209b920 t dcn31_panel_cntl_create +ffffffff8209b990 t dcn31_link_encoder_create +ffffffff8209ba40 t dcn31_link_enc_create_minimal +ffffffff8209bae0 t dcn315_populate_dml_pipes_from_context +ffffffff8209be20 t dcn315_get_panel_config_defaults +ffffffff8209be90 t read_dce_straps +ffffffff8209beb0 t dcn31_create_audio +ffffffff8209bee0 t dcn315_stream_encoder_create +ffffffff8209c060 t dcn31_hpo_dp_stream_encoder_create +ffffffff8209c220 t dcn31_hpo_dp_link_encoder_create +ffffffff8209c2b0 t dcn31_hwseq_create +ffffffff8209d000 T dcn316_create_resource_pool +ffffffff8209e2a0 t dcn316_resource_destruct +ffffffff8209e900 t dcn316_destroy_resource_pool +ffffffff8209e960 t dcn31_panel_cntl_create +ffffffff8209e9d0 t dcn31_link_encoder_create +ffffffff8209ea80 t dcn31_link_enc_create_minimal +ffffffff8209eb20 t dcn316_populate_dml_pipes_from_context +ffffffff8209ee40 t dcn316_get_panel_config_defaults +ffffffff8209eeb0 t read_dce_straps +ffffffff8209eed0 t dcn31_create_audio +ffffffff8209ef00 t dcn316_stream_encoder_create +ffffffff8209f080 t dcn31_hpo_dp_stream_encoder_create +ffffffff8209f240 t dcn31_hpo_dp_link_encoder_create +ffffffff8209f2d0 t dcn31_hwseq_create +ffffffff820a0000 T dccg32_create +ffffffff820a00b0 t dccg32_get_dccg_ref_freq +ffffffff820a00e0 t dccg32_otg_add_pixel +ffffffff820a0120 t dccg32_otg_drop_pixel +ffffffff820a0160 t dccg32_set_dpstreamclk +ffffffff820a0550 t dccg32_set_dtbclk_dto +ffffffff820a0740 t dccg32_set_pixel_rate_div +ffffffff820a0ab0 t dccg32_set_valid_pixel_rate +ffffffff820a1000 T enc32_hw_init +ffffffff820a1090 T dcn32_link_encoder_enable_dp_output +ffffffff820a10e0 T dcn32_link_encoder_construct +ffffffff820a12c0 t dcn32_link_encoder_is_in_alt_mode +ffffffff820a1340 t dcn32_link_encoder_get_max_link_cap +ffffffff820a2000 T dcn32_dio_stream_encoder_construct +ffffffff820a2070 t enc32_stream_encoder_hdmi_set_stream_attribute +ffffffff820a25a0 t enc32_stream_encoder_dvi_set_stream_attribute +ffffffff820a2720 t enc32_stream_encoder_dp_unblank +ffffffff820a2bd0 t enc32_read_state +ffffffff820a2d30 t enc32_dp_set_dsc_config +ffffffff820a2d80 t enc32_dp_set_odm_combine +ffffffff820a2dc0 t enc32_set_dig_input_mode +ffffffff820a3000 T dpp32_construct +ffffffff820a3060 t dscl32_calc_lb_num_partitions +ffffffff820a4000 T hpo_dp_link_encoder32_construct +ffffffff820a4050 t dcn32_hpo_dp_link_enc_is_in_alt_mode +ffffffff820a5000 T dcn32_program_det_size +ffffffff820a51a0 T hubbub32_program_urgent_watermarks +ffffffff820a5900 T hubbub32_program_stutter_watermarks +ffffffff820a5d50 T hubbub32_program_pstate_watermarks +ffffffff820a61d0 T hubbub32_program_usr_watermarks +ffffffff820a6420 T hubbub32_force_usr_retraining_allow +ffffffff820a64a0 T hubbub32_force_wm_propagate_to_pipes +ffffffff820a6540 T hubbub32_construct +ffffffff820a65c0 t hubbub32_wm_read_state +ffffffff820a6a30 t hubbub32_program_watermarks +ffffffff820a6b40 t hubbub32_init_watermarks +ffffffff820a6f80 t dcn32_program_compbuf_size +ffffffff820a7200 t dcn32_init_crb +ffffffff820a8000 T hubp32_update_force_pstate_disallow +ffffffff820a8090 T hubp32_update_mall_sel +ffffffff820a8120 T hubp32_prepare_subvp_buffering +ffffffff820a81b0 T hubp32_phantom_hubp_post_enable +ffffffff820a82c0 T hubp32_cursor_set_attributes +ffffffff820a8580 T hubp32_construct +ffffffff820a9000 T dcn32_dsc_pg_control +ffffffff820a9310 T dcn32_enable_power_gating_plane +ffffffff820a94b0 T dcn32_hubp_pg_control +ffffffff820a9720 T dcn32_apply_idle_power_optimizations +ffffffff820a9980 t dcn32_calculate_cab_allocation +ffffffff820a9d30 T dcn32_commit_subvp_config +ffffffff820a9dd0 T dcn32_subvp_pipe_control_lock +ffffffff820a9fa0 T dcn32_set_mcm_luts +ffffffff820aa130 T dcn32_set_input_transfer_func +ffffffff820aa270 T dcn32_set_output_transfer_func +ffffffff820aa470 T dcn32_subvp_update_force_pstate +ffffffff820aa5d0 T dcn32_update_mall_sel +ffffffff820aa750 T dcn32_program_mall_pipe_config +ffffffff820aa830 T dcn32_init_hw +ffffffff820ab010 T dcn32_update_odm +ffffffff820ab620 T dcn32_calculate_dccg_k1_k2_values +ffffffff820ab830 T dcn32_is_dp_dig_pixel_rate_div_policy +ffffffff820ab8c0 T dcn32_set_pixels_per_cycle +ffffffff820aba00 T dcn32_unblank_stream +ffffffff820abbd0 T dcn32_disable_link_output +ffffffff820abe60 T dcn32_update_phantom_vp_position +ffffffff820abf80 T dcn32_dsc_pg_status +ffffffff820ac060 T dcn32_update_dsc_pg +ffffffff820ad000 T dcn32_hw_sequencer_init_functions +ffffffff820ae000 t mmhubbub32_warmup_mcif +ffffffff820ae210 t mmhubbub32_config_mcif_buf +ffffffff820ae6b0 t mmhubbub32_config_mcif_arb +ffffffff820aeac0 T dcn32_mmhubbub_construct +ffffffff820af000 t mpc32_mpc_init +ffffffff820af220 t mpc32_program_post1dlut +ffffffff820afd00 t mpc32_program_shaper +ffffffff820b1fa0 t mpc32_program_3dlut +ffffffff820b2890 T dcn32_mpc_construct +ffffffff820b2950 t mpc32_power_on_shaper_3dlut +ffffffff820b2b80 t mpc32_set3dlut_ram12 +ffffffff820b3000 T dcn32_timing_generator_init +ffffffff820b3070 t optc32_enable_crtc +ffffffff820b3170 t optc32_disable_crtc +ffffffff820b3240 t optc32_phantom_crtc_post_enable +ffffffff820b3300 t optc32_set_drr +ffffffff820b3550 t optc32_set_odm_bypass +ffffffff820b36c0 t optc32_set_odm_combine +ffffffff820b39c0 t optc32_set_h_timing_div_manual_mode +ffffffff820b4000 T dcn32_panel_cntl_create +ffffffff820b4070 T dcn32_acquire_post_bldn_3dlut +ffffffff820b4160 T dcn32_release_post_bldn_3dlut +ffffffff820b4200 T dcn32_remove_phantom_pipes +ffffffff820b4370 T dcn32_add_phantom_pipes +ffffffff820b47b0 T dcn32_validate_bandwidth +ffffffff820b4c60 T dcn32_populate_dml_pipes_from_context +ffffffff820b4fc0 T dcn32_calculate_wm_and_dlg +ffffffff820b5030 T dcn32_create_resource_pool +ffffffff820b50e0 t dcn32_resource_construct +ffffffff820c1530 T dcn32_acquire_idle_pipe_for_head_pipe_in_layer +ffffffff820c1770 t dcn32_mpc_create +ffffffff820c6130 t dcn32_resource_destruct +ffffffff820c67a0 t dcn32_destroy_resource_pool +ffffffff820c6800 t dcn32_link_encoder_create +ffffffff820c7760 t dcn32_update_bw_bounding_box +ffffffff820c77b0 t read_dce_straps +ffffffff820c77e0 t dcn32_create_audio +ffffffff820c7b20 t dcn32_stream_encoder_create +ffffffff820c9990 t dcn32_hpo_dp_stream_encoder_create +ffffffff820ca670 t dcn32_hpo_dp_link_encoder_create +ffffffff820caaf0 t dcn32_hwseq_create +ffffffff820caf80 t dcn32_vpg_create +ffffffff820cc000 T dcn32_helper_calculate_num_ways_for_subvp +ffffffff820cc1e0 T dcn32_merge_pipes_for_subvp +ffffffff820cc3b0 T dcn32_all_pipes_have_stream_and_plane +ffffffff820cc440 T dcn32_subvp_in_use +ffffffff820cc4d0 T dcn32_mpo_in_use +ffffffff820cc530 T dcn32_any_surfaces_rotated +ffffffff820cc5c0 T dcn32_determine_det_override +ffffffff820cc900 T dcn32_set_det_allocations +ffffffff820cca80 T dcn32_save_mall_state +ffffffff820ccb30 T dcn32_restore_mall_state +ffffffff820cd000 T dcn321_link_encoder_construct +ffffffff820ce000 T dcn321_create_resource_pool +ffffffff820ce0b0 t dcn321_resource_construct +ffffffff820da460 t dcn321_mpc_create +ffffffff820dee20 t dcn321_resource_destruct +ffffffff820df490 t dcn321_destroy_resource_pool +ffffffff820df4f0 t dcn321_link_encoder_create +ffffffff820e0450 t dcn321_update_bw_bounding_box +ffffffff820e04a0 t read_dce_straps +ffffffff820e04d0 t dcn321_create_audio +ffffffff820e0810 t dcn321_stream_encoder_create +ffffffff820e2680 t dcn321_hpo_dp_stream_encoder_create +ffffffff820e3360 t dcn321_hpo_dp_link_encoder_create +ffffffff820e37e0 t dcn321_hwseq_create +ffffffff820e3c70 t dcn321_vpg_create +ffffffff820e5000 T bw_int_to_fixed_nonconst +ffffffff820e5090 T bw_frc_to_fixed +ffffffff820e5260 T bw_floor2 +ffffffff820e5310 T bw_ceil2 +ffffffff820e5390 T bw_mul +ffffffff820e6000 T convert_to_custom_float_format +ffffffff820e7000 T bw_calcs_init +ffffffff820e7e30 T bw_calcs +ffffffff820e9760 t calculate_bandwidth +ffffffff820f1000 T scaler_settings_calculation +ffffffff820f1380 T mode_support_and_system_configuration +ffffffff820f7160 T display_pipe_configuration +ffffffff820f79a0 T dispclkdppclkdcfclk_deep_sleep_prefetch_parameters_watermarks_and_performance_calculation +ffffffff820fd000 T dcn_bw_mod +ffffffff820fd050 T dcn_bw_min2 +ffffffff820fd090 T dcn_bw_max +ffffffff820fd0c0 T dcn_bw_max2 +ffffffff820fd100 T dcn_bw_floor2 +ffffffff820fd1a0 T dcn_bw_floor +ffffffff820fd1d0 T dcn_bw_ceil +ffffffff820fd210 T dcn_bw_ceil2 +ffffffff820fd2c0 T dcn_bw_max3 +ffffffff820fd360 T dcn_bw_max5 +ffffffff820fd4c0 T dcn_bw_pow +ffffffff820fd550 T dcn_bw_fabs +ffffffff820fd5b0 T dcn_bw_log +ffffffff820fe000 T swizzle_mode_to_macro_tile_size +ffffffff820fe090 T dcn_validate_bandwidth +ffffffff82100330 T dcn_bw_sync_calcs_and_dml +ffffffff82100580 t dcn_bw_calc_rq_dlg_ttu +ffffffff82100f00 T dcn_find_dcfclk_suits_all +ffffffff82101360 T dcn_bw_update_from_pplib_fclks +ffffffff821014f0 T dcn_bw_update_from_pplib_dcfclks +ffffffff821015c0 T dcn_get_soc_clks +ffffffff82101640 T dcn_bw_notify_pplib_of_wm_ranges +ffffffff82102000 T dcn20_populate_dml_writeback_from_context +ffffffff82102180 T dcn20_fpu_set_wb_arb_params +ffffffff82102330 T dcn20_calculate_dlg_params +ffffffff82102b10 T dcn20_populate_dml_pipes_from_context +ffffffff82103a10 T dcn20_calculate_wm +ffffffff821041b0 T dcn20_update_bounding_box +ffffffff82104420 T dcn20_cap_soc_clocks +ffffffff821047a0 T dcn20_patch_bounding_box +ffffffff82104910 T dcn20_validate_bandwidth_fp +ffffffff82104aa0 t dcn20_validate_bandwidth_internal +ffffffff82104e80 T dcn20_fpu_set_wm_ranges +ffffffff82104f20 T dcn20_fpu_adjust_dppclk +ffffffff82104fc0 T dcn21_populate_dml_pipes_from_context +ffffffff821050b0 T dcn21_validate_bandwidth_fp +ffffffff82105b30 T dcn21_update_bw_bounding_box +ffffffff82106010 T dcn21_clk_mgr_set_bw_params_wm_table +ffffffff82106070 T dcn201_populate_dml_writeback_from_context_fpu +ffffffff82106380 t calculate_wm_set_for_vlevel +ffffffff82107000 T dml20_recalculate +ffffffff82107740 t dml20_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff8210cda0 T dml20_ModeSupportAndSystemConfigurationFull +ffffffff82113d30 t TruncToValidBPP +ffffffff82113f10 t CalculateVMAndRowBytes +ffffffff821145a0 t CalculatePrefetchSourceLines +ffffffff82114760 t CalculateWriteBackDelay +ffffffff82114a30 t CalculatePrefetchSchedule +ffffffff821158f0 t CalculateFlipSchedule +ffffffff82115ca0 t adjust_ReturnBW +ffffffff82116000 T dml20v2_recalculate +ffffffff82116740 t dml20v2_DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff8211be50 T dml20v2_ModeSupportAndSystemConfigurationFull +ffffffff82122cd0 t TruncToValidBPP +ffffffff82123260 t CalculateVMAndRowBytes +ffffffff821238f0 t CalculatePrefetchSourceLines +ffffffff82123ab0 t CalculateWriteBackDelay +ffffffff82123d80 t CalculateDelayAfterScaler +ffffffff821240d0 t CalculatePrefetchSchedule +ffffffff82124e40 t CalculateFlipSchedule +ffffffff821251f0 t adjust_ReturnBW +ffffffff82126000 T dml20_rq_dlg_get_rq_reg +ffffffff82126490 t dml20_rq_dlg_get_rq_params +ffffffff82126660 T dml20_rq_dlg_get_dlg_reg +ffffffff821285a0 t get_surf_rq_param +ffffffff82128e20 t calculate_ttu_cursor +ffffffff8212a000 T dml20v2_rq_dlg_get_rq_reg +ffffffff8212a490 t dml20v2_rq_dlg_get_rq_params +ffffffff8212a660 T dml20v2_rq_dlg_get_dlg_reg +ffffffff8212c5b0 t get_surf_rq_param +ffffffff8212ce30 t calculate_ttu_cursor +ffffffff8212e000 T dml21_recalculate +ffffffff8212e700 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff821340b0 T dml21_ModeSupportAndSystemConfigurationFull +ffffffff8213a190 t TruncToValidBPP +ffffffff8213a720 t CalculateDCFCLKDeepSleep +ffffffff8213aa60 t CalculateVMAndRowBytes +ffffffff8213b2d0 t CalculatePrefetchSourceLines +ffffffff8213b490 t CalculateWriteBackDelay +ffffffff8213b760 t CalculatePrefetchSchedulePerPlane +ffffffff8213bf70 t CalculateUrgentBurstFactor +ffffffff8213c380 t CalculateFlipSchedule +ffffffff8213c870 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff8213d8d0 t CalculatePrefetchSchedule +ffffffff8213f000 T dml21_rq_dlg_get_rq_reg +ffffffff8213f490 t dml_rq_dlg_get_rq_params +ffffffff8213f660 T dml21_rq_dlg_get_dlg_reg +ffffffff821419c0 t get_surf_rq_param +ffffffff82142300 t calculate_ttu_cursor +ffffffff82143000 T optc3_fpu_set_vrr_m_const +ffffffff821434a0 T dcn30_fpu_populate_dml_writeback_from_context +ffffffff821437f0 T dcn30_fpu_set_mcif_arb_params +ffffffff82143960 T dcn30_fpu_update_soc_for_wm_a +ffffffff82143a10 T dcn30_fpu_calculate_wm_and_dlg +ffffffff821442f0 T dcn30_fpu_update_dram_channel_width_bytes +ffffffff82144350 T dcn30_fpu_update_max_clk +ffffffff821443f0 T dcn30_fpu_get_optimal_dcfclk_fclk_for_uclk +ffffffff821444f0 T dcn30_fpu_update_bw_bounding_box +ffffffff821446d0 T dcn30_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff82144890 T dcn3_fpu_build_wm_range_table +ffffffff82144b70 T patch_dcn30_soc_bounding_box +ffffffff82145000 T dml30_recalculate +ffffffff82145600 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff8214bc40 T dml30_CalculateBytePerPixelAnd256BBlockSizes +ffffffff8214beb0 T dml30_CalculateWriteBackDISPCLK +ffffffff8214c030 T dml30_ModeSupportAndSystemConfigurationFull +ffffffff82153430 t CalculateSwathAndDETConfiguration +ffffffff82153aa0 t TruncToValidBPP +ffffffff82153d20 t dscceComputeDelay +ffffffff82153e60 t CalculateVMAndRowBytes +ffffffff82154510 t CalculatePrefetchSourceLines +ffffffff821546d0 t CalculateUrgentBurstFactor +ffffffff82154960 t CalculateDCFCLKDeepSleep +ffffffff82154c80 t UseMinimumDCFCLK +ffffffff82155e80 t CalculatePrefetchSchedule +ffffffff821573e0 t CalculateFlipSchedule +ffffffff821578d0 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff821586f0 t CalculateSwathWidth +ffffffff82159000 T dml30_rq_dlg_get_rq_reg +ffffffff821594b0 t dml_rq_dlg_get_rq_params +ffffffff82159720 T dml30_rq_dlg_get_dlg_reg +ffffffff8215bed0 t get_surf_rq_param +ffffffff8215c870 t calculate_ttu_cursor +ffffffff8215d000 T dcn301_update_bw_bounding_box +ffffffff8215d320 T dcn301_fpu_set_wm_ranges +ffffffff8215d3c0 T dcn301_fpu_init_soc_bounding_box +ffffffff8215d460 T dcn301_calculate_wm_and_dlg_fp +ffffffff8215d790 t calculate_wm_set_for_vlevel +ffffffff8215e000 T dcn302_fpu_update_bw_bounding_box +ffffffff8215eac0 T dcn302_fpu_init_soc_bounding_box +ffffffff8215f000 T dcn303_fpu_update_bw_bounding_box +ffffffff8215fb00 T dcn303_fpu_init_soc_bounding_box +ffffffff82160000 T dcn31_zero_pipe_dcc_fraction +ffffffff82160060 T dcn31_update_soc_for_wm_a +ffffffff82160110 T dcn315_update_soc_for_wm_a +ffffffff821601e0 T dcn31_calculate_wm_and_dlg_fp +ffffffff821606e0 T dcn31_update_bw_bounding_box +ffffffff82160ad0 T dcn315_update_bw_bounding_box +ffffffff82160dc0 T dcn316_update_bw_bounding_box +ffffffff82162000 T dml31_recalculate +ffffffff821622a0 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff82169060 T dml31_CalculateWriteBackDISPCLK +ffffffff821691e0 T dml31_ModeSupportAndSystemConfigurationFull +ffffffff821714a0 t CalculateSwathAndDETConfiguration +ffffffff82171aa0 t TruncToValidBPP +ffffffff82171d20 t dscceComputeDelay +ffffffff82171e60 t CalculateDCFCLKDeepSleep +ffffffff821721a0 t CalculateVMAndRowBytes +ffffffff821727f0 t CalculatePrefetchSourceLines +ffffffff821729b0 t CalculateUrgentBurstFactor +ffffffff82172c40 t CalculatePrefetchSchedulePerPlane +ffffffff82173370 t CalculateFlipSchedule +ffffffff821738f0 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff82174550 t CalculateSwathWidth +ffffffff82174a60 t CalculatePrefetchSchedule +ffffffff82175ef0 t CalculateVupdateAndDynamicMetadataParameters +ffffffff82177000 T dml31_rq_dlg_get_rq_reg +ffffffff821774b0 t dml_rq_dlg_get_rq_params +ffffffff82177720 T dml31_rq_dlg_get_dlg_reg +ffffffff8217a1f0 t get_surf_rq_param +ffffffff8217b000 T dcn314_update_bw_bounding_box_fpu +ffffffff8217b480 T dcn314_populate_dml_pipes_from_context_fpu +ffffffff8217c000 T dml314_recalculate +ffffffff8217c280 t DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation +ffffffff82182f60 T dml314_CalculateWriteBackDISPCLK +ffffffff821830e0 T dml314_ModeSupportAndSystemConfigurationFull +ffffffff8218b280 t CalculateBytePerPixelAnd256BBlockSizes +ffffffff8218b4f0 t CalculateSwathAndDETConfiguration +ffffffff8218baf0 t TruncToValidBPP +ffffffff8218bd70 t dscceComputeDelay +ffffffff8218beb0 t CalculateDCFCLKDeepSleep +ffffffff8218c1f0 t CalculateVMAndRowBytes +ffffffff8218c840 t CalculatePrefetchSourceLines +ffffffff8218ca00 t CalculateUrgentBurstFactor +ffffffff8218cc90 t CalculateMaxVStartup +ffffffff8218cdd0 t CalculatePrefetchSchedulePerPlane +ffffffff8218d500 t CalculateFlipSchedule +ffffffff8218da80 t CalculateWatermarksAndDRAMSpeedChangeSupport +ffffffff8218e6e0 t CalculateSwathWidth +ffffffff8218ebf0 t CalculatePrefetchSchedule +ffffffff82190080 t CalculateVupdateAndDynamicMetadataParameters +ffffffff82191000 T dml314_rq_dlg_get_rq_reg +ffffffff821914b0 t dml_rq_dlg_get_rq_params +ffffffff82191720 T dml314_rq_dlg_get_dlg_reg +ffffffff82194270 t get_surf_rq_param +ffffffff82195000 T dcn32_build_wm_range_table_fpu +ffffffff82195390 T dcn32_find_dummy_latency_index_for_fw_based_mclk_switch +ffffffff821955c0 T dcn32_internal_validate_bw +ffffffff82197250 T dcn32_helper_populate_phantom_dlg_params +ffffffff821973f0 T dcn32_predict_pipe_split +ffffffff82197620 T insert_entry_into_table_sorted +ffffffff82197a50 T dcn32_set_phantom_stream_timing +ffffffff82197cf0 t dcn32_split_stream_for_mpc_or_odm +ffffffff82198080 T dcn32_calculate_wm_and_dlg_fpu +ffffffff82199570 T dcn32_patch_dpm_table +ffffffff82199780 T dcn32_update_bw_bounding_box_fpu +ffffffff8219b150 t subvp_drr_schedulable +ffffffff8219c000 T dml32_recalculate +ffffffff821a02f0 T dml32_ModeSupportAndSystemConfigurationFull +ffffffff821a8000 T dml32_dscceComputeDelay +ffffffff821a8140 T dml32_dscComputeDelay +ffffffff821a8180 T IsVertical +ffffffff821a81b0 T dml32_CalculateSinglePipeDPPCLKAndSCLThroughput +ffffffff821a84c0 T dml32_CalculateBytePerPixelAndBlockSizes +ffffffff821a87f0 T dml32_CalculateSwathAndDETConfiguration +ffffffff821a9000 T dml32_CalculateSwathWidth +ffffffff821a98a0 T dml32_UnboundedRequest +ffffffff821a9900 T dml32_CalculateDETBufferSize +ffffffff821a9f40 T dml32_CalculateODMMode +ffffffff821aa6a0 T dml32_CalculateRequiredDispclk +ffffffff821aa850 T dml32_RoundToDFSGranularity +ffffffff821aa8e0 T dml32_CalculateOutputLink +ffffffff821ab400 T dml32_TruncToValidBPP +ffffffff821ab750 T dml32_CalculateDPPCLK +ffffffff821ab900 T dml32_RequiredDTBCLK +ffffffff821abb50 T dml32_DSCDelayRequirement +ffffffff821ac010 T dml32_CalculateSurfaceSizeInMall +ffffffff821acb20 T dml32_CalculateVMRowAndSwath +ffffffff821ad950 T dml32_CalculateVMAndRowBytes +ffffffff821ae590 T dml32_CalculatePrefetchSourceLines +ffffffff821ae7e0 T dml32_CalculateMALLUseForStaticScreen +ffffffff821ae920 T dml32_CalculateRowBandwidth +ffffffff821aea80 T dml32_CalculateUrgentLatency +ffffffff821aeb10 T dml32_CalculateUrgentBurstFactor +ffffffff821aedb0 T dml32_CalculateDCFCLKDeepSleep +ffffffff821af0f0 T dml32_CalculateWriteBackDelay +ffffffff821af250 T dml32_UseMinimumDCFCLK +ffffffff821b0110 T dml32_CalculateExtraLatencyBytes +ffffffff821b02e0 T dml32_CalculateTWait +ffffffff821b03c0 T dml32_CalculateVUpdateAndDynamicMetadataParameters +ffffffff821b0620 T dml32_get_return_bw_mbps +ffffffff821b07d0 T dml32_get_return_bw_mbps_vm_only +ffffffff821b08b0 T dml32_CalculateExtraLatency +ffffffff821b0ad0 T dml32_CalculatePrefetchSchedule +ffffffff821b2080 T dml32_CalculateFlipSchedule +ffffffff821b2600 T dml32_CalculateWatermarksMALLUseAndDRAMSpeedChangeSupport +ffffffff821b3750 T dml32_CalculateWriteBackDISPCLK +ffffffff821b3910 T dml32_CalculateMinAndMaxPrefetchMode +ffffffff821b3950 T dml32_CalculatePixelDeliveryTimes +ffffffff821b3dc0 T dml32_CalculateMetaAndPTETimes +ffffffff821b4500 T dml32_CalculateVMGroupAndRequestTimes +ffffffff821b49f0 T dml32_CalculateDCCConfiguration +ffffffff821b5000 T dml32_CalculateStutterEfficiency +ffffffff821b5f40 T dml32_CalculateMaxDETAndMinCompressedBufferSize +ffffffff821b6020 T dml32_CalculateVActiveBandwithSupport +ffffffff821b61b0 T dml32_CalculatePrefetchBandwithSupport +ffffffff821b6450 T dml32_CalculateBandwidthAvailableForImmediateFlip +ffffffff821b65a0 T dml32_CalculateImmediateFlipBandwithSupport +ffffffff821b7000 T dml32_rq_dlg_get_rq_reg +ffffffff821b76a0 T dml32_rq_dlg_get_dlg_reg +ffffffff821ba000 T dcn321_insert_entry_into_table_sorted +ffffffff821ba430 T dcn321_update_bw_bounding_box_fpu +ffffffff821bc000 T dml_init_instance +ffffffff821bc300 T dml_get_status_message +ffffffff821bc340 T dml_log_pipe_params +ffffffff821bc370 T dml_log_mode_support_params +ffffffff821bd000 T dml_get_voltage_level +ffffffff821bd1e0 t fetch_socbb_params +ffffffff821bd6f0 t fetch_ip_params +ffffffff821bdb90 t fetch_pipe_params +ffffffff821bec90 T PixelClockAdjustmentForProgressiveToInterlaceUnit +ffffffff821bed00 T get_clk_dcf_deepsleep +ffffffff821bee10 T get_wm_urgent +ffffffff821bef20 T get_wm_memory_trip +ffffffff821bf030 T get_wm_writeback_urgent +ffffffff821bf140 T get_wm_stutter_exit +ffffffff821bf250 T get_wm_stutter_enter_exit +ffffffff821bf360 T get_wm_z8_stutter_exit +ffffffff821bf470 T get_wm_z8_stutter_enter_exit +ffffffff821bf580 T get_stutter_efficiency_z8 +ffffffff821bf690 T get_stutter_num_bursts_z8 +ffffffff821bf7a0 T get_wm_dram_clock_change +ffffffff821bf8b0 T get_wm_writeback_dram_clock_change +ffffffff821bf9c0 T get_stutter_efficiency +ffffffff821bfad0 T get_stutter_efficiency_no_vblank +ffffffff821bfbe0 T get_stutter_period +ffffffff821bfcf0 T get_urgent_latency +ffffffff821bfe00 T get_urgent_extra_latency +ffffffff821bff10 T get_nonurgent_latency +ffffffff821c0020 T get_dram_clock_change_latency +ffffffff821c0130 T get_dispclk_calculated +ffffffff821c0240 T get_total_data_read_bw +ffffffff821c0350 T get_return_bw +ffffffff821c0460 T get_tcalc +ffffffff821c0570 T get_fraction_of_urgent_bandwidth +ffffffff821c0680 T get_fraction_of_urgent_bandwidth_imm_flip +ffffffff821c0790 T get_cstate_max_cap_mode +ffffffff821c08b0 T get_comp_buffer_size_kbytes +ffffffff821c09c0 T get_pixel_chunk_size_in_kbyte +ffffffff821c0ad0 T get_alpha_pixel_chunk_size_in_kbyte +ffffffff821c0be0 T get_meta_chunk_size_in_kbyte +ffffffff821c0cf0 T get_min_pixel_chunk_size_in_byte +ffffffff821c0e00 T get_min_meta_chunk_size_in_byte +ffffffff821c0f10 T get_fclk_watermark +ffffffff821c1020 T get_usr_retraining_watermark +ffffffff821c1130 T get_comp_buffer_reserved_space_kbytes +ffffffff821c1240 T get_comp_buffer_reserved_space_64bytes +ffffffff821c1350 T get_comp_buffer_reserved_space_zs +ffffffff821c1460 T get_unbounded_request_enabled +ffffffff821c1580 T get_dsc_delay +ffffffff821c16a0 T get_dppclk_calculated +ffffffff821c17c0 T get_dscclk_calculated +ffffffff821c18e0 T get_min_ttu_vblank +ffffffff821c1a00 T get_min_ttu_vblank_in_us +ffffffff821c1b20 T get_vratio_prefetch_l +ffffffff821c1c40 T get_vratio_prefetch_c +ffffffff821c1d60 T get_dst_x_after_scaler +ffffffff821c1e80 T get_dst_y_after_scaler +ffffffff821c1fa0 T get_dst_y_per_vm_vblank +ffffffff821c20c0 T get_dst_y_per_row_vblank +ffffffff821c21e0 T get_dst_y_prefetch +ffffffff821c2300 T get_dst_y_per_vm_flip +ffffffff821c2420 T get_dst_y_per_row_flip +ffffffff821c2540 T get_refcyc_per_vm_group_vblank +ffffffff821c2660 T get_refcyc_per_vm_group_flip +ffffffff821c2780 T get_refcyc_per_vm_req_vblank +ffffffff821c28a0 T get_refcyc_per_vm_req_flip +ffffffff821c29c0 T get_refcyc_per_vm_group_vblank_in_us +ffffffff821c2ae0 T get_refcyc_per_vm_group_flip_in_us +ffffffff821c2c00 T get_refcyc_per_vm_req_vblank_in_us +ffffffff821c2d20 T get_refcyc_per_vm_req_flip_in_us +ffffffff821c2e40 T get_refcyc_per_vm_dmdata_in_us +ffffffff821c2f60 T get_dmdata_dl_delta_in_us +ffffffff821c3080 T get_refcyc_per_line_delivery_l_in_us +ffffffff821c31a0 T get_refcyc_per_line_delivery_c_in_us +ffffffff821c32c0 T get_refcyc_per_line_delivery_pre_l_in_us +ffffffff821c33e0 T get_refcyc_per_line_delivery_pre_c_in_us +ffffffff821c3500 T get_refcyc_per_req_delivery_l_in_us +ffffffff821c3620 T get_refcyc_per_req_delivery_c_in_us +ffffffff821c3740 T get_refcyc_per_req_delivery_pre_l_in_us +ffffffff821c3860 T get_refcyc_per_req_delivery_pre_c_in_us +ffffffff821c3980 T get_refcyc_per_cursor_req_delivery_in_us +ffffffff821c3aa0 T get_refcyc_per_cursor_req_delivery_pre_in_us +ffffffff821c3bc0 T get_refcyc_per_meta_chunk_nom_l_in_us +ffffffff821c3ce0 T get_refcyc_per_meta_chunk_nom_c_in_us +ffffffff821c3e00 T get_refcyc_per_meta_chunk_vblank_l_in_us +ffffffff821c3f20 T get_refcyc_per_meta_chunk_vblank_c_in_us +ffffffff821c4040 T get_refcyc_per_meta_chunk_flip_l_in_us +ffffffff821c4160 T get_refcyc_per_meta_chunk_flip_c_in_us +ffffffff821c4280 T get_vstartup +ffffffff821c43a0 T get_vupdate_offset +ffffffff821c44c0 T get_vupdate_width +ffffffff821c45e0 T get_vready_offset +ffffffff821c4700 T get_vready_at_or_after_vsync +ffffffff821c4830 T get_min_dst_y_next_start +ffffffff821c4950 T get_dst_y_per_pte_row_nom_l +ffffffff821c4a70 T get_dst_y_per_pte_row_nom_c +ffffffff821c4b90 T get_dst_y_per_meta_row_nom_l +ffffffff821c4cb0 T get_dst_y_per_meta_row_nom_c +ffffffff821c4dd0 T get_refcyc_per_pte_group_nom_l_in_us +ffffffff821c4ef0 T get_refcyc_per_pte_group_nom_c_in_us +ffffffff821c5010 T get_refcyc_per_pte_group_vblank_l_in_us +ffffffff821c5130 T get_refcyc_per_pte_group_vblank_c_in_us +ffffffff821c5250 T get_refcyc_per_pte_group_flip_l_in_us +ffffffff821c5370 T get_refcyc_per_pte_group_flip_c_in_us +ffffffff821c5490 T get_vstartup_calculated +ffffffff821c55b0 T get_dpte_row_height_linear_c +ffffffff821c56d0 T get_swath_height_l +ffffffff821c57f0 T get_swath_height_c +ffffffff821c5910 T get_det_stored_buffer_size_l_bytes +ffffffff821c5a30 T get_det_stored_buffer_size_c_bytes +ffffffff821c5b50 T get_dpte_group_size_in_bytes +ffffffff821c5c70 T get_vm_group_size_in_bytes +ffffffff821c5d90 T get_dpte_row_height_linear_l +ffffffff821c5eb0 T get_pte_buffer_mode +ffffffff821c5fe0 T get_subviewport_lines_needed_in_mall +ffffffff821c6100 T get_total_immediate_flip_bytes +ffffffff821c6210 T get_total_immediate_flip_bw +ffffffff821c63f0 T get_total_prefetch_bw +ffffffff821c65d0 T get_total_surface_size_in_mall_bytes +ffffffff821c6770 T get_det_buffer_size_kbytes +ffffffff821c6890 T get_is_phantom_pipe +ffffffff821c69b0 T Calculate256BBlockSizes +ffffffff821c6aa0 T CalculateMinAndMaxPrefetchMode +ffffffff821c6b10 T ModeSupportAndSystemConfiguration +ffffffff821c6e20 T CalculateWriteBackDISPCLK +ffffffff821c8000 T print__rq_params_st +ffffffff821c8030 T print__data_rq_sizing_params_st +ffffffff821c8060 T print__data_rq_dlg_params_st +ffffffff821c8090 T print__data_rq_misc_params_st +ffffffff821c80c0 T print__rq_dlg_params_st +ffffffff821c80f0 T print__dlg_sys_params_st +ffffffff821c8120 T print__data_rq_regs_st +ffffffff821c8150 T print__rq_regs_st +ffffffff821c8180 T print__dlg_regs_st +ffffffff821c81b0 T print__ttu_regs_st +ffffffff821c9000 T dml1_extract_rq_regs +ffffffff821c9330 T dml1_rq_dlg_get_rq_params +ffffffff821c9500 t get_surf_rq_param +ffffffff821ca200 T dml1_rq_dlg_get_dlg_params +ffffffff821cd000 T _do_calc_rc_params +ffffffff821ce040 t get_qp_set +ffffffff821cf000 T dc_dsc_parse_dsc_dpcd +ffffffff821cf2a0 t dsc_throughput_from_dpcd +ffffffff821cf460 T dc_dsc_compute_bandwidth_range +ffffffff821cf640 t intersect_dsc_caps +ffffffff821cf800 t setup_dsc_config +ffffffff821d01d0 T dc_dsc_compute_config +ffffffff821d02c0 T dc_dsc_stream_bandwidth_in_kbps +ffffffff821d0410 T dc_dsc_stream_bandwidth_overhead_in_kbps +ffffffff821d0560 T dc_dsc_get_policy_for_timing +ffffffff821d0600 T dc_dsc_policy_set_max_target_bpp_limit +ffffffff821d0630 T dc_dsc_policy_set_enable_dsc_when_not_needed +ffffffff821d0660 T dc_dsc_policy_set_disable_dsc_stream_overhead +ffffffff821d1000 T calc_rc_params +ffffffff821d2000 T dscc_compute_dsc_parameters +ffffffff821d3000 T dal_hw_factory_dce110_init +ffffffff821d3060 t define_hpd_registers +ffffffff821d30b0 t define_ddc_registers +ffffffff821d4000 T dal_hw_translate_dce110_init +ffffffff821d4030 t offset_to_id +ffffffff821d4390 t id_to_offset +ffffffff821d5000 T dal_hw_factory_dce120_init ffffffff821d5060 t define_hpd_registers ffffffff821d50b0 t define_ddc_registers -ffffffff821d6000 T dal_hw_translate_dce110_init +ffffffff821d6000 T dal_hw_translate_dce120_init ffffffff821d6030 t offset_to_id -ffffffff821d6390 t id_to_offset -ffffffff821d7000 T dal_hw_factory_dce120_init +ffffffff821d63a0 t id_to_offset +ffffffff821d7000 T dal_hw_factory_dce80_init ffffffff821d7060 t define_hpd_registers ffffffff821d70b0 t define_ddc_registers -ffffffff821d8000 T dal_hw_translate_dce120_init +ffffffff821d8000 T dal_hw_translate_dce80_init ffffffff821d8030 t offset_to_id -ffffffff821d83a0 t id_to_offset -ffffffff821d9000 T dal_hw_factory_dce80_init +ffffffff821d87b0 t id_to_offset +ffffffff821d9000 T dal_hw_factory_dcn10_init ffffffff821d9060 t define_hpd_registers ffffffff821d90b0 t define_ddc_registers -ffffffff821da000 T dal_hw_translate_dce80_init +ffffffff821d9140 t define_generic_registers +ffffffff821da000 T dal_hw_translate_dcn10_init ffffffff821da030 t offset_to_id -ffffffff821da7b0 t id_to_offset -ffffffff821db000 T dal_hw_factory_dcn10_init +ffffffff821da390 t id_to_offset +ffffffff821db000 T dal_hw_factory_dcn20_init ffffffff821db060 t define_hpd_registers ffffffff821db0b0 t define_ddc_registers -ffffffff821db140 t define_generic_registers -ffffffff821dc000 T dal_hw_translate_dcn10_init +ffffffff821db160 t define_generic_registers +ffffffff821dc000 T dal_hw_translate_dcn20_init ffffffff821dc030 t offset_to_id -ffffffff821dc390 t id_to_offset -ffffffff821dd000 T dal_hw_factory_dcn20_init +ffffffff821dc2b0 t id_to_offset +ffffffff821dd000 T dal_hw_factory_dcn21_init ffffffff821dd060 t define_hpd_registers ffffffff821dd0b0 t define_ddc_registers ffffffff821dd160 t define_generic_registers -ffffffff821de000 T dal_hw_translate_dcn20_init +ffffffff821de000 T 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vmx_handle_cr0_write -ffffffff824fb230 T vmx_handle_cr4_write -ffffffff824fb2d0 T vmm_handle_xsetbv -ffffffff824fb3b0 T vmx_handle_misc_enable_msr -ffffffff824fb410 T vmm_pat_is_valid -ffffffff824fb4f0 T vmm_gpa_is_valid -ffffffff824fb560 T vmx_exit_reason_decode -ffffffff824fb5a0 T svm_exit_reason_decode -ffffffff824fc3b0 T vcpu_state_decode -ffffffff824fd000 T vmm_dispatch_intr -ffffffff824fd019 T vmxon -ffffffff824fd049 T vmxoff -ffffffff824fd079 T vmclear -ffffffff824fd0a9 T vmptrld -ffffffff824fd0d9 T vmptrst -ffffffff824fd109 T vmwrite -ffffffff824fd139 T vmread -ffffffff824fd169 T invvpid -ffffffff824fd199 T invept -ffffffff824fd1c9 T vmx_enter_guest -ffffffff824fd1f0 t skip_init -ffffffff824fd2bd t no_l1df_msr -ffffffff824fd2c0 t l1df_tlb_loop -ffffffff824fd2d9 t l1df_tlb_done -ffffffff824fd2e1 t l1df_load_cache -ffffffff824fd2f8 t done_flush -ffffffff824fd38b t do_resume -ffffffff824fd410 t fail_launch_or_resume -ffffffff824fd44d t fail_launch_unknown -ffffffff824fd45a t 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sdmmc_function_alloc -ffffffff824ff4a0 T sdmmc_app_command -ffffffff824ff630 T sdmmc_mmc_command -ffffffff824ff6b0 T sdmmc_go_idle_state -ffffffff824ff7c0 T sdmmc_send_if_cond -ffffffff824ff910 T sdmmc_set_relative_addr -ffffffff82500000 T sdmmc_cisptr -ffffffff825000a0 T sdmmc_read_cis -ffffffff825003a0 T sdmmc_print_cis -ffffffff82500510 T sdmmc_check_cis_quirks -ffffffff82501000 T sdmmc_io_enable -ffffffff825012a0 T sdmmc_io_reset -ffffffff825013c0 T sdmmc_io_send_op_cond -ffffffff82501530 T sdmmc_io_scan -ffffffff82501680 T sdmmc_io_init -ffffffff825017a0 T sdmmc_io_set_highspeed -ffffffff82501a40 T sdmmc_io_set_bus_width -ffffffff82501cd0 T sdmmc_io_function_ready -ffffffff82501e40 T sdmmc_io_read_1 -ffffffff82501f90 T sdmmc_io_function_enable -ffffffff82502360 T sdmmc_io_write_1 -ffffffff825024e0 T sdmmc_io_function_disable -ffffffff82502760 T sdmmc_io_attach -ffffffff82502840 T sdmmc_print -ffffffff82502a90 T sdmmc_submatch -ffffffff82502b10 T sdmmc_io_detach -ffffffff82502bb0 T sdmmc_io_rw_direct -ffffffff82502d50 T sdmmc_io_rw_extended_subr -ffffffff82502ef0 T sdmmc_io_rw_extended -ffffffff825032e0 T sdmmc_io_read_2 -ffffffff82503430 T sdmmc_io_write_2 -ffffffff82503590 T sdmmc_io_read_4 -ffffffff825036e0 T sdmmc_io_write_4 -ffffffff82503840 T sdmmc_io_read_multi_1 -ffffffff82503930 T sdmmc_io_write_multi_1 -ffffffff82503a20 T sdmmc_io_read_region_1 -ffffffff82503b10 T sdmmc_io_write_region_1 -ffffffff82503c00 T sdmmc_io_xchg -ffffffff82503d90 T sdmmc_intr_enable -ffffffff82504000 T sdmmc_intr_disable -ffffffff82504270 T sdmmc_intr_establish -ffffffff82504370 T sdmmc_intr_disestablish -ffffffff82504450 T sdmmc_card_intr -ffffffff825044a0 T sdmmc_intr_task -ffffffff82504530 T sdmmc_io_set_blocklen -ffffffff82505000 T sdmmc_mem_enable -ffffffff825054e0 T sdmmc_mem_send_op_cond -ffffffff82505690 T sdmmc_mem_signal_voltage -ffffffff82505750 T sdmmc_mem_scan -ffffffff82505a50 T sdmmc_decode_csd -ffffffff82505e50 T sdmmc_decode_cid -ffffffff82506290 T sdmmc_mem_send_scr -ffffffff825063d0 T sdmmc_mem_decode_scr -ffffffff82506440 T sdmmc_mem_send_cxd_data -ffffffff825065b0 T sdmmc_mem_set_bus_width -ffffffff825066c0 T sdmmc_mem_sd_switch -ffffffff82506970 T sdmmc_be512_to_bitfield512 -ffffffff82506a20 T sdmmc_mem_mmc_switch -ffffffff82506b10 T sdmmc_mem_init -ffffffff82506c60 T sdmmc_mem_set_blocklen -ffffffff82506d60 T sdmmc_mem_sd_init -ffffffff82507310 T sdmmc_mem_mmc_init -ffffffff82507c30 T sdmmc_mem_select_transfer_mode -ffffffff82507cb0 T sdmmc_mem_execute_tuning -ffffffff82507d40 T sdmmc_mem_read_block_subr -ffffffff825080a0 T sdmmc_mem_single_read_block -ffffffff82508160 T sdmmc_mem_read_block -ffffffff82508320 T sdmmc_mem_write_block_subr -ffffffff82508670 T sdmmc_mem_single_write_block -ffffffff82508730 T sdmmc_mem_write_block -ffffffff825088f0 T sdmmc_mem_hibernate_write -ffffffff82509000 T sdmmc_scsi_cmd -ffffffff825091f0 T sdmmc_minphys -ffffffff82509260 T sdmmc_scsi_attach -ffffffff82509450 T sdmmc_alloc_ccbs -ffffffff82509590 T sdmmc_free_ccbs -ffffffff825095f0 T sdmmc_scsi_detach -ffffffff82509740 T sdmmc_stimeout -ffffffff825097c0 T sdmmc_ccb_alloc -ffffffff82509870 T sdmmc_ccb_free -ffffffff82509950 T sdmmc_inquiry -ffffffff82509b70 T sdmmc_start_xs -ffffffff82509c60 T sdmmc_complete_xs -ffffffff82509d20 T sdmmc_done_xs -ffffffff82509d60 T sdmmc_scsi_hibernate_io -ffffffff8250a000 T bwfm_sdio_preinit -ffffffff8250a4f0 T bwfm_sdio_txcheck -ffffffff8250a530 T bwfm_sdio_txdata -ffffffff8250a5a0 T bwfm_sdio_txctl -ffffffff8250a6f0 T bwfm_sdio_buscore_read -ffffffff8250a700 T bwfm_sdio_buscore_write -ffffffff8250a710 T bwfm_sdio_buscore_prepare -ffffffff8250a840 T bwfm_sdio_buscore_activate -ffffffff8250a8c0 T bwfm_sdio_match -ffffffff8250a980 T bwfm_sdio_attach -ffffffff8250ac40 T bwfm_sdio_detach -ffffffff8250aca0 T bwfm_sdio_task -ffffffff8250adf0 T bwfm_sdio_write_1 -ffffffff8250ae20 T bwfm_sdio_read_1 -ffffffff8250ae50 T bwfm_sdio_write_4 -ffffffff8250af00 T bwfm_sdio_read_4 -ffffffff8250afa0 T bwfm_sdio_load_microcode -ffffffff8250b200 T bwfm_sdio_clkctl -ffffffff8250b330 T bwfm_sdio_dev_write -ffffffff8250b370 T bwfm_sdio_intr -ffffffff8250b3b0 T bwfm_sdio_ram_read_write -ffffffff8250b5e0 T bwfm_sdio_htclk -ffffffff8250b840 T bwfm_sdio_readshared -ffffffff8250b900 T bwfm_sdio_dev_read -ffffffff8250b930 T bwfm_sdio_rx_frames -ffffffff8250bcc0 T bwfm_sdio_tx_frames -ffffffff8250bda0 T bwfm_sdio_backplane -ffffffff8250be50 T bwfm_sdio_buf_read -ffffffff8250bf20 T bwfm_sdio_buf_write -ffffffff8250bfd0 T bwfm_sdio_frame_read_write -ffffffff8250c150 T bwfm_sdio_newbuf -ffffffff8250c1d0 T bwfm_sdio_tx_ok -ffffffff8250c220 T bwfm_sdio_tx_ctrlframe -ffffffff8250c320 T bwfm_sdio_tx_dataframe -ffffffff8250c470 T bwfm_sdio_rx_glom -ffffffff8250d000 T onewire_match -ffffffff8250d050 T onewire_attach -ffffffff8250d0f0 T onewire_detach -ffffffff8250d160 T onewire_activate -ffffffff8250d180 T onewire_scan -ffffffff8250d390 T onewire_createthread -ffffffff8250d3f0 T onewire_print -ffffffff8250d4c0 T onewirebus_print -ffffffff8250d510 T onewire_lock -ffffffff8250d530 T onewire_unlock -ffffffff8250d540 T onewire_reset -ffffffff8250d560 T onewire_bit -ffffffff8250d580 T onewire_read_byte -ffffffff8250d6c0 T onewire_write_byte -ffffffff8250d790 T onewire_read_block -ffffffff8250d830 T onewire_write_block -ffffffff8250d8d0 T onewire_triplet -ffffffff8250d9b0 T onewire_matchrom -ffffffff8250db00 T onewire_search -ffffffff8250de90 T onewire_thread -ffffffff8250e000 T onewire_crc -ffffffff8250e0e0 T onewire_crc16 -ffffffff8250e1c0 T onewire_famname -ffffffff8250e200 T onewire_matchbyfam -ffffffff8250f000 T owid_match -ffffffff8250f020 T owid_attach -ffffffff8250f0f0 T owid_detach -ffffffff8250f130 T owid_activate -ffffffff82510000 T owsbm_match -ffffffff82510020 T owsbm_attach -ffffffff825101c0 T owsbm_detach -ffffffff82510230 T owsbm_activate -ffffffff82510260 T owsbm_update -ffffffff82511000 T owtemp_match -ffffffff82511020 T owtemp_attach -ffffffff82511110 T owtemp_detach -ffffffff82511180 T owtemp_activate -ffffffff825111b0 T owtemp_update -ffffffff82512000 T owctr_match -ffffffff82512020 T owctr_attach -ffffffff82512160 T owctr_detach -ffffffff825121d0 T owctr_activate -ffffffff82512200 T owctr_update -ffffffff82512230 T owctr_update_counter -ffffffff82513000 A __text_page_start -ffffffff82513000 T Xsyscall_meltdown -ffffffff8251300c T Xsyscall -ffffffff8251325e t Xsyscall_trampback -ffffffff82513270 T intr_user_exit -ffffffff825132b2 t intr_user_exit_post_ast -ffffffff825133ce t Xiretq_trampback -ffffffff825133da T doreti_iret -ffffffff82514000 T alltraps -ffffffff82514138 T recall_trap -ffffffff82514150 T alltraps_kern -ffffffff82514153 T alltraps_kern_meltdown -ffffffff82515000 ? Xsyscall32 -ffffffff82515000 A __kutext_start -ffffffff82515000 A __text_page_end -ffffffff82516000 ? Xtrap00 -ffffffff82516010 ? Xtrap01 -ffffffff82516020 ? Xtrap02 -ffffffff82516024 c calltrap_specstk -ffffffff825160f0 ? calltrap_specstk_tramp -ffffffff82516110 ? Xtrap03 -ffffffff82516120 ? Xtrap04 -ffffffff82516130 ? Xtrap05 -ffffffff82516140 ? Xtrap06 -ffffffff82516150 ? Xtrap07 -ffffffff82516160 ? Xtrap08 -ffffffff82516170 ? Xtrap09 -ffffffff82516180 ? Xtrap0a -ffffffff82516190 ? Xtrap0b -ffffffff825161a0 ? Xtrap0c -ffffffff825161b0 ? Xtrap0d -ffffffff82516230 ? Xtrap0e -ffffffff82516240 ? Xintrspurious -ffffffff82516240 ? Xtrap0f -ffffffff82516250 ? Xtrap10 -ffffffff82516260 ? Xtrap11 -ffffffff82516270 ? Xtrap12 -ffffffff82516280 ? Xtrap13 -ffffffff82516290 ? Xtrap14 -ffffffff82516290 ? Xtrap15 -ffffffff82516290 ? Xtrap16 -ffffffff82516290 ? Xtrap17 -ffffffff82516290 ? Xtrap18 -ffffffff82516290 ? Xtrap19 -ffffffff82516290 ? Xtrap1a -ffffffff82516290 ? Xtrap1b -ffffffff82516290 ? Xtrap1c -ffffffff82516290 ? Xtrap1d -ffffffff82516290 ? Xtrap1e -ffffffff82516290 ? Xtrap1f -ffffffff825162a0 ? x2apic_eoi -ffffffff825162c0 ? Xintr_lapic_ipi -ffffffff825162f0 ? Xipi_invltlb -ffffffff82516310 ? Xipi_invlpg -ffffffff82516340 ? Xipi_invlrange -ffffffff82516380 ? Xipi_invltlb_pcid -ffffffff825163c0 ? Xipi_invlpg_pcid -ffffffff82516410 ? Xipi_invlrange_pcid -ffffffff82516480 ? Xintr_lapic_ltimer -ffffffff825164b0 ? Xintr_xen_upcall -ffffffff825164e0 ? Xintr_hyperv_upcall -ffffffff82516510 ? Xintr_legacy0 -ffffffff82516540 ? Xintr_legacy1 -ffffffff82516570 ? Xintr_legacy2 -ffffffff825165a0 ? Xintr_legacy3 -ffffffff825165d0 ? Xintr_legacy4 -ffffffff82516600 ? Xintr_legacy5 -ffffffff82516630 ? Xintr_legacy6 -ffffffff82516660 ? Xintr_legacy7 -ffffffff82516690 ? Xintr_legacy8 -ffffffff825166c0 ? Xintr_legacy9 -ffffffff825166f0 ? Xintr_legacy10 -ffffffff82516720 ? Xintr_legacy11 -ffffffff82516750 ? Xintr_legacy12 -ffffffff82516780 ? Xintr_legacy13 -ffffffff825167b0 ? Xintr_legacy14 -ffffffff825167e0 ? Xintr_legacy15 -ffffffff82516810 ? Xintr_ioapic_edge0 -ffffffff82516840 ? Xintr_ioapic_edge1 -ffffffff82516870 ? Xintr_ioapic_edge2 -ffffffff825168a0 ? Xintr_ioapic_edge3 -ffffffff825168d0 ? Xintr_ioapic_edge4 -ffffffff82516900 ? Xintr_ioapic_edge5 -ffffffff82516930 ? Xintr_ioapic_edge6 -ffffffff82516960 ? Xintr_ioapic_edge7 -ffffffff82516990 ? Xintr_ioapic_edge8 -ffffffff825169c0 ? Xintr_ioapic_edge9 -ffffffff825169f0 ? Xintr_ioapic_edge10 -ffffffff82516a20 ? Xintr_ioapic_edge11 -ffffffff82516a50 ? Xintr_ioapic_edge12 -ffffffff82516a80 ? Xintr_ioapic_edge13 -ffffffff82516ab0 ? Xintr_ioapic_edge14 -ffffffff82516ae0 ? Xintr_ioapic_edge15 -ffffffff82516b10 ? Xintr_ioapic_edge16 -ffffffff82516b40 ? Xintr_ioapic_edge17 -ffffffff82516b70 ? Xintr_ioapic_edge18 -ffffffff82516ba0 ? Xintr_ioapic_edge19 -ffffffff82516bd0 ? Xintr_ioapic_edge20 -ffffffff82516c00 ? Xintr_ioapic_edge21 -ffffffff82516c30 ? Xintr_ioapic_edge22 -ffffffff82516c60 ? Xintr_ioapic_edge23 -ffffffff82516c90 ? Xintr_ioapic_edge24 -ffffffff82516cc0 ? Xintr_ioapic_edge25 -ffffffff82516cf0 ? Xintr_ioapic_edge26 -ffffffff82516d20 ? Xintr_ioapic_edge27 -ffffffff82516d50 ? Xintr_ioapic_edge28 -ffffffff82516d80 ? Xintr_ioapic_edge29 -ffffffff82516db0 ? Xintr_ioapic_edge30 -ffffffff82516de0 ? Xintr_ioapic_edge31 -ffffffff82516e10 ? Xintr_ioapic_edge32 -ffffffff82516e40 ? Xintr_ioapic_edge33 -ffffffff82516e70 ? Xintr_ioapic_edge34 -ffffffff82516ea0 ? Xintr_ioapic_edge35 -ffffffff82516ed0 ? Xintr_ioapic_edge36 -ffffffff82516f00 ? Xintr_ioapic_edge37 -ffffffff82516f30 ? Xintr_ioapic_edge38 -ffffffff82516f60 ? Xintr_ioapic_edge39 -ffffffff82516f90 ? Xintr_ioapic_edge40 -ffffffff82516fc0 ? Xintr_ioapic_edge41 -ffffffff82516ff0 ? Xintr_ioapic_edge42 -ffffffff82517020 ? Xintr_ioapic_edge43 -ffffffff82517050 ? Xintr_ioapic_edge44 -ffffffff82517080 ? Xintr_ioapic_edge45 -ffffffff825170b0 ? Xintr_ioapic_edge46 -ffffffff825170e0 ? Xintr_ioapic_edge47 -ffffffff82517110 ? Xintr_ioapic_edge48 -ffffffff82517140 ? Xintr_ioapic_edge49 -ffffffff82517170 ? Xintr_ioapic_edge50 -ffffffff825171a0 ? Xintr_ioapic_edge51 -ffffffff825171d0 ? Xintr_ioapic_edge52 -ffffffff82517200 ? Xintr_ioapic_edge53 -ffffffff82517230 ? Xintr_ioapic_edge54 -ffffffff82517260 ? Xintr_ioapic_edge55 -ffffffff82517290 ? Xintr_ioapic_edge56 -ffffffff825172c0 ? Xintr_ioapic_edge57 -ffffffff825172f0 ? Xintr_ioapic_edge58 -ffffffff82517320 ? Xintr_ioapic_edge59 -ffffffff82517350 ? Xintr_ioapic_edge60 -ffffffff82517380 ? Xintr_ioapic_edge61 -ffffffff825173b0 ? Xintr_ioapic_edge62 -ffffffff825173e0 ? Xintr_ioapic_edge63 -ffffffff82517410 ? Xintr_ioapic_level0 -ffffffff82517440 ? Xintr_ioapic_level1 -ffffffff82517470 ? Xintr_ioapic_level2 -ffffffff825174a0 ? Xintr_ioapic_level3 -ffffffff825174d0 ? Xintr_ioapic_level4 -ffffffff82517500 ? Xintr_ioapic_level5 -ffffffff82517530 ? Xintr_ioapic_level6 -ffffffff82517560 ? Xintr_ioapic_level7 -ffffffff82517590 ? Xintr_ioapic_level8 -ffffffff825175c0 ? Xintr_ioapic_level9 -ffffffff825175f0 ? Xintr_ioapic_level10 -ffffffff82517620 ? Xintr_ioapic_level11 -ffffffff82517650 ? Xintr_ioapic_level12 -ffffffff82517680 ? Xintr_ioapic_level13 -ffffffff825176b0 ? Xintr_ioapic_level14 -ffffffff825176e0 ? Xintr_ioapic_level15 -ffffffff82517710 ? Xintr_ioapic_level16 -ffffffff82517740 ? Xintr_ioapic_level17 -ffffffff82517770 ? Xintr_ioapic_level18 -ffffffff825177a0 ? Xintr_ioapic_level19 -ffffffff825177d0 ? Xintr_ioapic_level20 -ffffffff82517800 ? Xintr_ioapic_level21 -ffffffff82517830 ? Xintr_ioapic_level22 -ffffffff82517860 ? Xintr_ioapic_level23 -ffffffff82517890 ? Xintr_ioapic_level24 -ffffffff825178c0 ? Xintr_ioapic_level25 -ffffffff825178f0 ? Xintr_ioapic_level26 -ffffffff82517920 ? Xintr_ioapic_level27 -ffffffff82517950 ? Xintr_ioapic_level28 -ffffffff82517980 ? Xintr_ioapic_level29 -ffffffff825179b0 ? Xintr_ioapic_level30 -ffffffff825179e0 ? Xintr_ioapic_level31 -ffffffff82517a10 ? Xintr_ioapic_level32 -ffffffff82517a40 ? Xintr_ioapic_level33 -ffffffff82517a70 ? Xintr_ioapic_level34 -ffffffff82517aa0 ? Xintr_ioapic_level35 -ffffffff82517ad0 ? Xintr_ioapic_level36 -ffffffff82517b00 ? Xintr_ioapic_level37 -ffffffff82517b30 ? Xintr_ioapic_level38 -ffffffff82517b60 ? Xintr_ioapic_level39 -ffffffff82517b90 ? Xintr_ioapic_level40 -ffffffff82517bc0 ? Xintr_ioapic_level41 -ffffffff82517bf0 ? Xintr_ioapic_level42 -ffffffff82517c20 ? Xintr_ioapic_level43 -ffffffff82517c50 ? Xintr_ioapic_level44 -ffffffff82517c80 ? Xintr_ioapic_level45 -ffffffff82517cb0 ? Xintr_ioapic_level46 -ffffffff82517ce0 ? Xintr_ioapic_level47 -ffffffff82517d10 ? Xintr_ioapic_level48 -ffffffff82517d40 ? Xintr_ioapic_level49 -ffffffff82517d70 ? Xintr_ioapic_level50 -ffffffff82517da0 ? Xintr_ioapic_level51 -ffffffff82517dd0 ? Xintr_ioapic_level52 -ffffffff82517e00 ? Xintr_ioapic_level53 -ffffffff82517e30 ? Xintr_ioapic_level54 -ffffffff82517e60 ? Xintr_ioapic_level55 -ffffffff82517e90 ? Xintr_ioapic_level56 -ffffffff82517ec0 ? Xintr_ioapic_level57 -ffffffff82517ef0 ? Xintr_ioapic_level58 -ffffffff82517f20 ? Xintr_ioapic_level59 -ffffffff82517f50 ? Xintr_ioapic_level60 -ffffffff82517f80 ? Xintr_ioapic_level61 -ffffffff82517fb0 ? Xintr_ioapic_level62 -ffffffff82517fe0 ? Xintr_ioapic_level63 -ffffffff82519000 ? codepatch_fill_nop -ffffffff82519000 A __cptext_start -ffffffff82519000 A __kutext_end -ffffffff825190b0 ? codepatch_maprw -ffffffff82519190 ? codepatch_unmaprw -ffffffff825191f0 ? codepatch_nop -ffffffff82519340 ? codepatch_replace -ffffffff825194e0 ? codepatch_call -ffffffff82519500 ? codepatch_jmp -ffffffff8251a000 A __cptext_end -ffffffff8251a000 A __rodata_start -ffffffff8251a000 C _etext -ffffffff8251a000 C etext -ffffffff8251b000 r seeprom_read -ffffffff8251b004 r icl_mg_pll_find_divisors.div1_vals -ffffffff8251b028 r gen9bc_tgp_ddc_pin_map -ffffffff8251b038 r athn_ac2qid -ffffffff8251b038 r athn_ac2qid -ffffffff8251b038 r athn_ac2qid -ffffffff8251b044 r rtwn_get_rssi.cckoff -ffffffff8251b06c r rsu_ac2qid -ffffffff8251b07c r pckbc_portcmd -ffffffff8251b080 r tht_fifo_write_pad.pad -ffffffff8251b088 r rsu_get_rssi.cckoff -ffffffff8251b09c r adlp_n_revids -ffffffff8251b0ec r apple_iso_trans -ffffffff8251b0f0 r dg2_g12_revid_step_tbl -ffffffff8251b0f8 r wihap_check_tx.txratetable -ffffffff8251b0fc r dmamode -ffffffff8251b124 r gen9_edram_size_mb.sets -ffffffff8251c000 r isomappings -ffffffff8251c080 r unimappings -ffffffff8251c230 r replacements -ffffffff8251faf8 r cmd0646_9_tim_udma -ffffffff82572dfd r pp_r600_decoded_lanes -ffffffff8258df91 r cmd680_setup_channel.udma_tbl -ffffffff82595b2c r apollo_udma33_tim -ffffffff8259bbc8 r substchar -ffffffff8259dc5d r apollo_udma100_tim -ffffffff825c540f r apollo_udma66_tim -ffffffff825cc7db r apollo_pio_rec -ffffffff825dba64 r cy_pio_rec -ffffffff8260ac2e r apollo_udma133_tim -ffffffff826176a0 R drm_ca -ffffffff826176c8 R drm_filtops -ffffffff826176f8 R drmread_filtops -ffffffff82618000 r vga_emulops -ffffffff82618048 R vga_stdscreen -ffffffff82618078 R vga_stdscreen_mono -ffffffff826180a8 R vga_stdscreen_bf -ffffffff826180d8 R vga_40lscreen -ffffffff82618108 R vga_40lscreen_mono -ffffffff82618138 R vga_40lscreen_bf -ffffffff82618168 R vga_50lscreen -ffffffff82618198 R vga_50lscreen_mono -ffffffff826181c8 R vga_50lscreen_bf -ffffffff826181f8 R vga_screenlist -ffffffff82618208 R vga_screenlist_mono -ffffffff82618218 R vga_accessops -ffffffff82618278 r i945_wm_info -ffffffff826182b0 r bgansitopc -ffffffff826182b8 r pctoansi -ffffffff826182f8 r sdma_offsets -ffffffff826182f8 r sdma_offsets -ffffffff82618328 r iha_rate_tbl -ffffffff82618360 r i830_a_wm_info -ffffffff82618398 r gen9_edram_size_mb.ways -ffffffff82618400 r aggr_periodic_times -ffffffff82618480 r jsl_ehl_revids -ffffffff826184f8 r michael_final.pad -ffffffff82618520 r rt_copysa.maskarray -ffffffff82618528 r i915_wm_info -ffffffff82618530 r amdgpu_ih_clientid_jpeg -ffffffff82618530 r amdgpu_ih_clientid_uvds -ffffffff82618530 r amdgpu_ih_clientid_vcns -ffffffff82618530 r amdgpu_ih_clientid_vcns -ffffffff82618530 r amdgpu_ih_clientid_vcns -ffffffff82618568 r vga_setfontset.cmaptabb -ffffffff82618580 r tgl_revids -ffffffff826185d8 r i830_bc_wm_info -ffffffff82618680 r __drm_universal_plane_init.default_modifiers -ffffffff82618690 r iwn_tid2fifo -ffffffff826186a8 r vga_setfontset.cmaptaba -ffffffff826186b0 r crtc_offsets -ffffffff826186b0 r crtc_offsets -ffffffff826186b0 r crtc_offsets -ffffffff826186d0 r link_speed -ffffffff826186d0 r link_speed -ffffffff826186d0 r link_speed -ffffffff82618748 r rtwn_r88e_get_rssi.cckoff -ffffffff82619000 R edid_vendors -ffffffff826192c0 R edid_nvendors -ffffffff826192d0 R edid_products -ffffffff82619330 R edid_nproducts -ffffffff82619340 r _edid_modes -ffffffff8261a000 R videomode_list -ffffffff8261b080 R videomode_count -ffffffff8261c000 r ahc_hard_errors -ffffffff8261c080 r critical_sections -ffffffff8261c0b0 r patches -ffffffff8261cd50 r seqprog -ffffffff8261e000 r ahc_switch -ffffffff8261f000 r termstat_strings -ffffffff8261f020 r critical_sections -ffffffff8261f060 r seqprog -ffffffff8261fd50 r patches -ffffffff82621000 r ahd_switch -ffffffff82622000 R aic_switch -ffffffff82623000 R adw_switch -ffffffff82624000 R gdt_switch -ffffffff82625000 R twe_switch -ffffffff82626000 R ciss_switch -ffffffff82626030 R ciss_level -ffffffff82626050 R ciss_stat -ffffffff82627000 R ami_switch -ffffffff82627028 R ami_raw_switch -ffffffff82628000 R mfi_switch -ffffffff82628028 R mfi_pd_switch -ffffffff82628050 r mfi_iop_xscale -ffffffff82628080 r mfi_iop_ppc -ffffffff826280b0 r mfi_iop_gen2 -ffffffff826280e0 r mfi_iop_skinny -ffffffff82628110 r mfi_bbu_indicators -ffffffff826281c0 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs -ffffffff826281f0 r chv_oa_mux_regs -ffffffff82628210 r fiji_clock_stretcher_lookup_table -ffffffff82628210 r tonga_clock_stretcher_lookup_table -ffffffff82628240 r link_speed -ffffffff82628240 r link_speed -ffffffff82628240 r link_speed -ffffffff82628280 r drm_fb_xfrm.default_dst_pitch -ffffffff82628280 r non_supported_protection -ffffffff82628380 r tgl_uy_revids -ffffffff826283d0 r bwi_phy_noise_11g_rev1 -ffffffff82628450 r cardslot_process_event.antonym_ev -ffffffff826284e0 r gen11_oa_mux_regs -ffffffff826285d0 r ddr2_cycle_tenths -ffffffff82628640 r rtw_intr_rx.ratetbl -ffffffff826286c0 r abm_config -ffffffff82628720 r getbootinfo.ports.30 -ffffffff82628780 r reg_offsets -ffffffff82628790 r bwi_rf_lo_measure_11g.rf_lo_adjust -ffffffff826287a0 r init_non_clock_fields.look_up -ffffffff826287b0 r uftdi_8u232am_getrate.roundoff -ffffffff82628800 r zyd_rx_data.rates -ffffffff82628810 r ieee80211_ra_valid_tx_mcs.max_mcs -ffffffff82628850 r mmio_invalidate_full.gen8_regs -ffffffff82628890 r bwi_phy_noise_11g -ffffffff826288a0 r hpt366_pio -ffffffff826288d0 r glk_revids -ffffffff82628920 r bwi_rf_calc_nrssi_slope_11g.save_phy3_regs -ffffffff82628940 r ether_crc32_be_update.rev -ffffffff82628940 r rtw_grf5101_mac_crypt.caesar -ffffffff82628990 r snb_b_fdi_train_param -ffffffff82629000 R qlw_switch -ffffffff8262a000 R isp_2100_risc_code -ffffffff8263cbf0 R isp_2200_risc_code -ffffffff8264f990 R isp_2300_risc_code -ffffffff82669408 R qla_switch -ffffffff82669430 r qla_regs_2100 -ffffffff82669460 r qla_regs_2200 -ffffffff82669490 r qla_regs_23XX -ffffffff8266a000 R ahci_atascsi_methods -ffffffff8266b000 R nvme_switch -ffffffff8266b028 r nvme_ops -ffffffff8266c000 R mpi_switch -ffffffff8266c100 r intel_hpll_vco.elk_vco -ffffffff8266c160 r pin_offsets -ffffffff8266c1c0 r firmware_list -ffffffff8266c220 r atom_arg_shift -ffffffff8266c220 r atom_arg_shift -ffffffff8266c260 r pf_syncookie_wstab -ffffffff8266c280 r ieee80211_media_init.mopts -ffffffff8266c2e0 r add_entropy_words.twist_table -ffffffff8266c380 r urtw_8225v2_txpwr_cck -ffffffff8266c3c0 r bwfm_pci_prio2fifo -ffffffff8266c3c0 r ieee80211_up_to_ac.up_to_ac -ffffffff8266c480 r paritytab -ffffffff8266c480 r x86emu_parity_tab -ffffffff8266c4a0 r legacy_connector_convert -ffffffff8266c4e0 r gen7_oa_mux_regs -ffffffff8266c500 r hsw_oa_mux_regs -ffffffff8266c520 r notetab -ffffffff8266c540 r urtw_8225v2_txpwr_cck_ch14 -ffffffff8266c560 r bwi_rf_calibval.rf_calibvals -ffffffff8266c600 r pf_syncookie_msstab -ffffffff8266c660 r xgmi3x16_pcs_err_status_reg_aldebaran -ffffffff8266c6c0 r uath_wme_init.uath_wme_11g -ffffffff8266c6e0 r gen7_oa_b_counters -ffffffff8266c840 r icl_revids -ffffffff8266c900 r rtwn_iq_calib_run.reg_adda -ffffffff8266c940 r atom_def_dst -ffffffff8266c940 r atom_def_dst -ffffffff8266c980 r sha256_initial_hash_value -ffffffff8266c9e0 r otus_edca_def -ffffffff8266ca00 r intel_hpll_vco.blb_vco -ffffffff8266cac0 r epic_pci_subsys_info -ffffffff8266cae0 r atom_arg_mask -ffffffff8266cae0 r atom_arg_mask -ffffffff8266cb40 r butmap -ffffffff8266cb80 r GFX_RLC_SRM_INDEX_CNTL_DATA_OFFSETS -ffffffff8266cbc0 r comsoft.lsrmap -ffffffff8266cc00 r tulip_mii_phy_readspecific.table -ffffffff8266cc20 r kbl_revids -ffffffff8266cce0 r intel_hpll_vco.pnv_vco -ffffffff8266cd40 r dmapageport -ffffffff8266ce00 r intel_hpll_vco.ctg_vco -ffffffff8266cec0 r drm_calculate_luminance_range.pre_computed_values -ffffffff8266d000 R sili_atascsi_methods -ffffffff8266e000 R ncr53c9x_switch -ffffffff8266f000 r scf_period -ffffffff82670000 R siop_script -ffffffff826705a0 R lun_switch -ffffffff826705d0 R tag_switch -ffffffff82670660 R load_dsa -ffffffff826706c4 R siop_led_on -ffffffff826706cc R siop_led_off -ffffffff826706d8 R siop_switch -ffffffff82671000 R ep_vortex_media -ffffffff82671100 R ep_default_to_media -ffffffff82672000 R wi_card_ident -ffffffff82674000 R ucode_table -ffffffff82675000 r re_revisions -ffffffff82675290 r re_kstats_tpl -ffffffff82677000 R smc91cxx_media -ffffffff82677010 R smc91cxx_mii_bitbang_ops -ffffffff82678000 R dl10019_mii_bitbang_ops -ffffffff82678028 R dl10022_mii_bitbang_ops -ffffffff82679000 R ax88190_mii_bitbang_ops -ffffffff8267b000 R ac97_audio_default -ffffffff8267b020 R ac97_on_off -ffffffff8267b324 R ac97_mic_select -ffffffff8267b628 R ac97_mono_select -ffffffff8267b92c R ac97_source -ffffffff8267bc30 R ac97_volume_stereo -ffffffff8267bc4c R ac97_volume_mono -ffffffff8267bc70 R source_info -ffffffff8267c470 R ac97_ad -ffffffff8267c580 R ac97_ak -ffffffff8267c610 R ac97_av -ffffffff8267c750 R ac97_rl -ffffffff8267c7a0 R ac97_cm -ffffffff8267c820 R ac97_cr -ffffffff8267c840 R ac97_cs -ffffffff8267c920 R ac97_cx -ffffffff8267c980 R ac97_dt -ffffffff8267c9a0 R ac97_em -ffffffff8267c9d0 R ac97_es -ffffffff8267c9f0 R ac97_is -ffffffff8267ca10 R ac97_ic -ffffffff8267ca90 R ac97_it -ffffffff8267cac0 R ac97_ns -ffffffff8267cb80 R ac97_ps -ffffffff8267cbb0 R ac97_sl -ffffffff8267cbd0 R ac97_st -ffffffff8267cd20 R ac97_vi -ffffffff8267cd50 R ac97_tt -ffffffff8267cdd0 R ac97_ti -ffffffff8267cdf0 R ac97_wb -ffffffff8267ce10 R ac97_wo -ffffffff8267cea0 R ac97_ym -ffffffff8267cef0 R ac97_vendors -ffffffff8267d1f0 R ac97enhancement -ffffffff8267d2f0 R ac97feature -ffffffff8267e000 R lm_chips -ffffffff8267e020 R lm78_sensors -ffffffff8267e1a0 R w83627hf_sensors -ffffffff8267e3a0 R w83627ehf_sensors -ffffffff8267e5c0 R w83627dhg_sensors -ffffffff8267e7c0 R nct6776f_sensors -ffffffff8267ea00 R nct6779d_sensors -ffffffff8267ed60 R w83637hf_sensors -ffffffff8267ef20 R w83697hf_sensors -ffffffff8267f0c0 R w83781d_sensors -ffffffff8267f280 R w83782d_sensors -ffffffff8267f480 R w83783s_sensors -ffffffff8267f600 R w83791d_sensors -ffffffff8267f860 R w83792d_sensors -ffffffff8267fae0 R as99127f_sensors -ffffffff82680000 r ar5k_known_products -ffffffff82680110 r ar5111_gain_opt -ffffffff826801e0 r ar5112_gain_opt -ffffffff826802b0 r ar5k_5ghz_channels -ffffffff82680a00 r ar5k_2ghz_channels -ffffffff82680f10 r ar5111_rf -ffffffff82681350 r ar5112a_rf -ffffffff82681890 r ar5112_rf -ffffffff82681da0 r ar5413_rf -ffffffff826821b0 r ar2413_rf -ffffffff826824d0 r ar2425_rf -ffffffff82682830 r ar5111_rfg -ffffffff82682b30 r ar5112_rfg -ffffffff82682e30 r ar5413_rfg -ffffffff82683130 r ar2413_rfg -ffffffff82683430 r ar5k_rt_11a -ffffffff82683552 r ar5k_rt_11b -ffffffff82683674 r ar5k_rt_11g -ffffffff82683796 r ar5k_rt_xr -ffffffff82684000 r ar5210_ini -ffffffff82685000 r ar5211_mode -ffffffff826852c0 r ar5211_ini -ffffffff82685ad0 r ar5211_rf -ffffffff82686000 r ar5212_pcie -ffffffff82686080 r ar5212_mode -ffffffff82686310 r ar5212_ini -ffffffff82686c80 r ar5212_ar5111_mode -ffffffff82686f20 r ar5212_ar5112_mode -ffffffff826871b0 r ar5413_mode -ffffffff82687b10 r ar2413_mode -ffffffff82688430 r ar2425_mode -ffffffff82688d90 r ar5111_bbgain -ffffffff82689090 r ar5112_bbgain -ffffffff8268a000 r athn_5ghz_chans -ffffffff8268a020 r athn_rates -ffffffff8268b000 r athn_rates -ffffffff8268c000 r ar9160_ini -ffffffff8268c068 r ar5416_ini -ffffffff8268c0d0 r ar5416_serdes -ffffffff8268c0e8 r ar9160_1_1_addac -ffffffff8268c0f8 r ar9160_1_0_addac -ffffffff8268c108 r ar5416_2_2_addac -ffffffff8268c118 r ar5416_2_1_addac -ffffffff8268c128 r ar5416_set_power_calib.chainoffset -ffffffff8268c140 r ar9160_bank6tpc_vals -ffffffff8268c1c0 r ar5416_bank6tpc_vals -ffffffff8268c240 r ar5416_bb_rfgain_vals_2g -ffffffff8268c340 r ar5416_bb_rfgain_vals_5g -ffffffff8268c440 r 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dmub_dcn20_setup_outbox0 +ffffffff82205c90 T dmub_dcn20_get_outbox0_wptr +ffffffff82205cb0 T dmub_dcn20_set_outbox0_rptr +ffffffff82205cd0 T dmub_dcn20_is_hw_init +ffffffff82205d20 T dmub_dcn20_is_supported +ffffffff82205d80 T dmub_dcn20_set_gpint +ffffffff82205db0 T dmub_dcn20_is_gpint_acked +ffffffff82205e10 T dmub_dcn20_get_gpint_response +ffffffff82205e40 T dmub_dcn20_get_fw_boot_status +ffffffff82205e70 T dmub_dcn20_enable_dmub_boot_options +ffffffff82205ea0 T dmub_dcn20_skip_dmub_panel_power_sequence +ffffffff82205ef0 T dmub_dcn20_get_current_time +ffffffff82205f20 T dmub_dcn20_get_diagnostic_data +ffffffff82207000 T dmub_dcn21_is_phy_init +ffffffff82208000 T dmub_dcn30_backdoor_load +ffffffff82208260 T dmub_dcn30_setup_windows +ffffffff82209000 T dmub_dcn31_reset +ffffffff82209280 T dmub_dcn31_reset_release +ffffffff82209350 T dmub_dcn31_backdoor_load +ffffffff822095b0 T dmub_dcn31_setup_windows +ffffffff822098e0 T dmub_dcn31_setup_mailbox +ffffffff82209930 T dmub_dcn31_get_inbox1_rptr +ffffffff82209950 T dmub_dcn31_set_inbox1_wptr +ffffffff82209970 T dmub_dcn31_setup_out_mailbox +ffffffff822099c0 T dmub_dcn31_get_outbox1_wptr +ffffffff822099e0 T dmub_dcn31_set_outbox1_rptr +ffffffff82209a00 T dmub_dcn31_is_hw_init +ffffffff82209a80 T dmub_dcn31_is_supported +ffffffff82209ae0 T dmub_dcn31_set_gpint +ffffffff82209b10 T dmub_dcn31_is_gpint_acked +ffffffff82209b70 T dmub_dcn31_get_gpint_response +ffffffff82209ba0 T dmub_dcn31_get_gpint_dataout +ffffffff82209cc0 T dmub_dcn31_get_fw_boot_status +ffffffff82209cf0 T dmub_dcn31_enable_dmub_boot_options +ffffffff82209d70 T dmub_dcn31_skip_dmub_panel_power_sequence +ffffffff82209dc0 T dmub_dcn31_setup_outbox0 +ffffffff82209e10 T dmub_dcn31_get_outbox0_wptr +ffffffff82209e30 T dmub_dcn31_set_outbox0_rptr +ffffffff82209e50 T dmub_dcn31_get_current_time +ffffffff82209e80 T dmub_dcn31_get_diagnostic_data +ffffffff8220a320 T dmub_dcn31_should_detect +ffffffff8220b000 T dmub_dcn32_reset +ffffffff8220b1d0 T dmub_dcn32_reset_release +ffffffff8220b2c0 T dmub_dcn32_backdoor_load +ffffffff8220b520 T dmub_dcn32_backdoor_load_zfb_mode +ffffffff8220b700 T dmub_dcn32_setup_windows +ffffffff8220ba30 T dmub_dcn32_setup_mailbox +ffffffff8220ba80 T dmub_dcn32_get_inbox1_rptr +ffffffff8220baa0 T dmub_dcn32_set_inbox1_wptr +ffffffff8220bac0 T dmub_dcn32_setup_out_mailbox +ffffffff8220bb10 T dmub_dcn32_get_outbox1_wptr +ffffffff8220bb30 T dmub_dcn32_set_outbox1_rptr +ffffffff8220bb50 T dmub_dcn32_is_hw_init +ffffffff8220bbd0 T dmub_dcn32_is_supported +ffffffff8220bc30 T dmub_dcn32_set_gpint +ffffffff8220bc60 T dmub_dcn32_is_gpint_acked +ffffffff8220bcc0 T dmub_dcn32_get_gpint_response +ffffffff8220bcf0 T dmub_dcn32_get_gpint_dataout +ffffffff8220be10 T dmub_dcn32_get_fw_boot_status +ffffffff8220be40 T dmub_dcn32_enable_dmub_boot_options +ffffffff8220be70 T dmub_dcn32_skip_dmub_panel_power_sequence +ffffffff8220bec0 T dmub_dcn32_setup_outbox0 +ffffffff8220bf10 T dmub_dcn32_get_outbox0_wptr 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dmub_srv_wait_for_phy_init +ffffffff8220f210 T dmub_srv_wait_for_idle +ffffffff8220f2c0 T dmub_srv_send_gpint_command +ffffffff8220f3a0 T dmub_srv_get_gpint_response +ffffffff8220f400 T dmub_srv_get_gpint_dataout +ffffffff8220f460 T dmub_srv_get_fw_boot_status +ffffffff8220f4d0 T dmub_srv_cmd_with_reply_data +ffffffff8220f740 T dmub_srv_get_outbox0_msg +ffffffff8220f7e0 T dmub_srv_get_diagnostic_data +ffffffff8220f830 T dmub_srv_should_detect +ffffffff8220f870 T dmub_srv_clear_inbox0_ack +ffffffff8220f8c0 T dmub_srv_wait_for_inbox0_ack +ffffffff8220f950 T dmub_srv_send_inbox0_cmd +ffffffff82210000 T dmub_srv_stat_get_notification +ffffffff82211000 T setup_x_points_distribution +ffffffff82211160 T log_x_points_distribution +ffffffff82211190 T precompute_pq +ffffffff82211350 t compute_pq +ffffffff82211560 T precompute_de_pq +ffffffff822116b0 t compute_de_pq +ffffffff82211970 T calculate_user_regamma_coeff +ffffffff82211d40 t apply_lut_1d +ffffffff82212070 T calculate_user_regamma_ramp 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mod_freesync_calc_nominal_field_rate +ffffffff82218d20 T mod_freesync_handle_preflip +ffffffff82219140 T mod_freesync_handle_v_update +ffffffff82219600 T mod_freesync_get_settings +ffffffff82219660 T mod_freesync_calc_field_rate_from_timing +ffffffff822196b0 T mod_freesync_get_freesync_enabled +ffffffff822196e0 T mod_freesync_is_valid_range +ffffffff8221a000 T mod_build_vsc_infopacket +ffffffff8221a200 T mod_build_hf_vsif_infopacket +ffffffff8221b000 T dmub_init_abm_config +ffffffff8221b540 t fill_iram_v_2_3 +ffffffff8221b9a0 T dmcu_load_iram +ffffffff8221c180 T is_psr_su_specific_panel +ffffffff8221c210 T mod_power_calc_psr_configs +ffffffff8221c310 T mod_power_only_edp +ffffffff8221d000 T mod_vmid_get_for_ptb +ffffffff8221d230 T mod_vmid_reset +ffffffff8221d2f0 T mod_vmid_create +ffffffff8221d430 T mod_vmid_destroy +ffffffff8221e000 T amdgpu_dpm_get_sclk +ffffffff8221e090 T amdgpu_dpm_get_mclk +ffffffff8221e120 T amdgpu_dpm_set_powergating_by_smu +ffffffff8221e200 T amdgpu_dpm_set_gfx_power_up_by_imu +ffffffff8221e310 T amdgpu_dpm_baco_enter +ffffffff8221e3a0 T amdgpu_dpm_baco_exit +ffffffff8221e430 T amdgpu_dpm_set_mp1_state +ffffffff8221e4c0 T amdgpu_dpm_is_baco_supported +ffffffff8221e560 T amdgpu_dpm_mode2_reset +ffffffff8221e5f0 T amdgpu_dpm_baco_reset +ffffffff8221e6a0 T amdgpu_dpm_is_mode1_reset_supported +ffffffff8221e710 T amdgpu_dpm_mode1_reset +ffffffff8221e790 T amdgpu_dpm_switch_power_profile +ffffffff8221e830 T amdgpu_dpm_set_xgmi_pstate +ffffffff8221e8c0 T amdgpu_dpm_set_df_cstate +ffffffff8221e960 T amdgpu_dpm_allow_xgmi_power_down +ffffffff8221e9e0 T amdgpu_dpm_enable_mgpu_fan_boost +ffffffff8221ea70 T amdgpu_dpm_set_clockgating_by_smu +ffffffff8221eb10 T amdgpu_dpm_smu_i2c_bus_access +ffffffff8221ebb0 T amdgpu_pm_acpi_event_handler +ffffffff8221ec70 T amdgpu_dpm_read_sensor +ffffffff8221ed20 T amdgpu_dpm_compute_clocks +ffffffff8221ee00 T amdgpu_dpm_enable_uvd +ffffffff8221efe0 T amdgpu_dpm_enable_vce +ffffffff8221f1c0 T amdgpu_dpm_enable_jpeg +ffffffff8221f2b0 T amdgpu_pm_load_smu_firmware +ffffffff8221f360 T amdgpu_dpm_handle_passthrough_sbr +ffffffff8221f3e0 T amdgpu_dpm_send_hbm_bad_pages_num +ffffffff8221f460 T amdgpu_dpm_send_hbm_bad_channel_flag +ffffffff8221f4e0 T amdgpu_dpm_get_dpm_freq_range +ffffffff8221f580 T amdgpu_dpm_set_soft_freq_range +ffffffff8221f620 T amdgpu_dpm_write_watermarks_table +ffffffff8221f690 T amdgpu_dpm_wait_for_event +ffffffff8221f720 T amdgpu_dpm_set_residency_gfxoff +ffffffff8221f7a0 T amdgpu_dpm_get_residency_gfxoff +ffffffff8221f820 T amdgpu_dpm_get_entrycount_gfxoff +ffffffff8221f8a0 T amdgpu_dpm_get_status_gfxoff +ffffffff8221f920 T amdgpu_dpm_get_thermal_throttling_counter +ffffffff8221f970 T amdgpu_dpm_gfx_state_change +ffffffff8221f9d0 T amdgpu_dpm_get_ecc_info +ffffffff8221fa50 T amdgpu_dpm_get_vce_clock_state +ffffffff8221fae0 T amdgpu_dpm_get_current_power_state +ffffffff8221fb50 T amdgpu_dpm_set_power_state +ffffffff8221fca0 T amdgpu_dpm_dispatch_task +ffffffff8221fd40 T amdgpu_dpm_get_performance_level +ffffffff8221fdd0 T amdgpu_dpm_force_performance_level +ffffffff8221ffb0 T amdgpu_dpm_get_pp_num_states +ffffffff82220040 T amdgpu_dpm_get_pp_table +ffffffff822200d0 T amdgpu_dpm_set_fine_grain_clk_vol +ffffffff82220170 T amdgpu_dpm_odn_edit_dpm_table +ffffffff82220210 T amdgpu_dpm_print_clock_levels +ffffffff822202a0 T amdgpu_dpm_emit_clock_levels +ffffffff82220340 T amdgpu_dpm_set_ppfeature_status +ffffffff822203d0 T amdgpu_dpm_get_ppfeature_status +ffffffff82220460 T amdgpu_dpm_force_clock_level +ffffffff822204f0 T amdgpu_dpm_get_sclk_od +ffffffff82220570 T amdgpu_dpm_set_sclk_od +ffffffff822206f0 T amdgpu_dpm_get_mclk_od +ffffffff82220770 T amdgpu_dpm_set_mclk_od +ffffffff822208f0 T amdgpu_dpm_get_power_profile_mode +ffffffff82220980 T amdgpu_dpm_set_power_profile_mode +ffffffff82220a10 T amdgpu_dpm_get_gpu_metrics +ffffffff82220aa0 T amdgpu_dpm_get_fan_control_mode +ffffffff82220b30 T amdgpu_dpm_set_fan_speed_pwm +ffffffff82220bc0 T amdgpu_dpm_get_fan_speed_pwm +ffffffff82220c50 T amdgpu_dpm_get_fan_speed_rpm +ffffffff82220ce0 T amdgpu_dpm_set_fan_speed_rpm +ffffffff82220d70 T amdgpu_dpm_set_fan_control_mode +ffffffff82220e00 T amdgpu_dpm_get_power_limit +ffffffff82220ea0 T amdgpu_dpm_set_power_limit +ffffffff82220f30 T amdgpu_dpm_is_cclk_dpm_supported +ffffffff82220fa0 T amdgpu_dpm_debugfs_print_current_performance_level +ffffffff82221030 T amdgpu_dpm_get_smu_prv_buf_details +ffffffff822210d0 T amdgpu_dpm_is_overdrive_supported +ffffffff82221160 T amdgpu_dpm_set_pp_table +ffffffff82221200 T amdgpu_dpm_get_num_cpu_cores +ffffffff82221250 T amdgpu_dpm_stb_debug_fs_init +ffffffff822212a0 T amdgpu_dpm_display_configuration_change +ffffffff82221330 T amdgpu_dpm_get_clock_by_type +ffffffff822213c0 T amdgpu_dpm_get_display_mode_validation_clks +ffffffff82221450 T amdgpu_dpm_get_clock_by_type_with_latency +ffffffff822214e0 T amdgpu_dpm_get_clock_by_type_with_voltage +ffffffff82221570 T amdgpu_dpm_set_watermarks_for_clocks_ranges +ffffffff82221600 T amdgpu_dpm_display_clock_voltage_request +ffffffff82221690 T amdgpu_dpm_get_current_clocks +ffffffff82221720 T amdgpu_dpm_notify_smu_enable_pwe +ffffffff822217a0 T amdgpu_dpm_set_active_display_count +ffffffff82221830 T amdgpu_dpm_set_min_deep_sleep_dcefclk +ffffffff822218c0 T amdgpu_dpm_set_hard_min_dcefclk_by_freq +ffffffff82221950 T amdgpu_dpm_set_hard_min_fclk_by_freq +ffffffff822219e0 T amdgpu_dpm_display_disable_memory_clock_switch +ffffffff82221a70 T amdgpu_dpm_get_max_sustainable_clocks_by_dc +ffffffff82221b00 T amdgpu_dpm_get_uclk_dpm_states +ffffffff82221ba0 T amdgpu_dpm_get_dpm_clock_table +ffffffff82222000 T amdgpu_dpm_get_active_displays +ffffffff822220a0 T amdgpu_dpm_get_vblank_time +ffffffff82222150 T amdgpu_dpm_get_vrefresh +ffffffff82223000 T amdgpu_pm_sysfs_init +ffffffff82223030 T amdgpu_pm_sysfs_fini +ffffffff82223060 T amdgpu_debugfs_pm_init +ffffffff82224000 T amdgpu_dpm_print_class_info +ffffffff822242b0 T amdgpu_dpm_print_cap_info +ffffffff82224330 T amdgpu_dpm_print_ps_status +ffffffff822243c0 T amdgpu_pm_print_power_states +ffffffff82224470 T amdgpu_get_platform_caps +ffffffff82224510 T amdgpu_parse_extended_power_table +ffffffff82225520 T amdgpu_free_extended_power_table +ffffffff82225630 T amdgpu_add_thermal_controller +ffffffff82225a60 T amdgpu_get_vce_clock_state +ffffffff82225aa0 T amdgpu_legacy_dpm_compute_clocks +ffffffff82225f10 T amdgpu_dpm_thermal_work_handler +ffffffff82226000 t pp_early_init +ffffffff82226100 t pp_late_init +ffffffff82226210 t pp_sw_init +ffffffff82226230 t pp_sw_fini +ffffffff822262b0 t pp_hw_init +ffffffff82226300 t pp_hw_fini +ffffffff82226340 t pp_late_fini +ffffffff822263a0 t pp_suspend +ffffffff822263c0 t pp_resume +ffffffff822263e0 t pp_is_idle +ffffffff82226410 t pp_wait_for_idle +ffffffff82226440 t pp_sw_reset +ffffffff82226470 t pp_set_clockgating_state +ffffffff822264a0 t pp_set_powergating_state +ffffffff822264d0 t pp_dpm_set_fan_control_mode +ffffffff82226540 t pp_dpm_get_fan_control_mode +ffffffff822265b0 t pp_dpm_set_fan_speed_pwm +ffffffff82226610 t pp_dpm_get_fan_speed_pwm +ffffffff82226670 t pp_dpm_force_clock_level +ffffffff822266d0 t pp_dpm_print_clock_levels +ffffffff82226720 t pp_dpm_emit_clock_levels +ffffffff82226780 t pp_dpm_force_performance_level +ffffffff82226810 t pp_dpm_get_sclk_od +ffffffff82226860 t pp_dpm_set_sclk_od +ffffffff822268b0 t pp_dpm_get_mclk_od +ffffffff82226900 t pp_dpm_set_mclk_od +ffffffff82226950 t pp_dpm_read_sensor +ffffffff822269f0 t pp_dpm_get_performance_level +ffffffff82226a30 t pp_dpm_get_current_power_state +ffffffff82226aa0 t pp_dpm_get_fan_speed_rpm +ffffffff82226b00 t pp_dpm_set_fan_speed_rpm +ffffffff82226b60 t pp_dpm_get_pp_num_states +ffffffff82226ca0 t pp_dpm_get_pp_table +ffffffff82226cf0 t pp_dpm_set_pp_table +ffffffff82226e20 t pp_dpm_switch_power_profile +ffffffff82226f60 t pp_dpm_get_vce_clock_state +ffffffff82226fb0 t pp_dpm_dispatch_tasks +ffffffff82226ff0 t pp_dpm_load_fw +ffffffff82227060 t pp_dpm_fw_loading_complete +ffffffff82227090 t pp_set_powergating_by_smu +ffffffff82227200 t pp_set_clockgating_by_smu +ffffffff82227260 t pp_set_power_limit +ffffffff82227320 t pp_get_power_limit +ffffffff822273b0 t pp_get_power_profile_mode +ffffffff82227410 t pp_set_power_profile_mode +ffffffff82227470 t pp_set_fine_grain_clk_vol +ffffffff822274c0 t pp_odn_edit_dpm_table +ffffffff82227510 t pp_dpm_set_mp1_state +ffffffff82227560 t pp_smu_i2c_bus_access +ffffffff822275b0 t pp_gfx_state_change_set +ffffffff82227610 t pp_dpm_get_sclk +ffffffff82227660 t pp_dpm_get_mclk +ffffffff822276b0 t pp_display_configuration_change +ffffffff82227700 t pp_get_display_power_level +ffffffff82227740 t pp_get_current_clocks +ffffffff82227860 t pp_get_clock_by_type +ffffffff822278a0 t pp_get_clock_by_type_with_latency +ffffffff822278e0 t pp_get_clock_by_type_with_voltage +ffffffff82227920 t pp_set_watermarks_for_clocks_ranges +ffffffff82227960 t pp_display_clock_voltage_request +ffffffff822279a0 t pp_get_display_mode_validation_clocks +ffffffff82227a00 t pp_notify_smu_enable_pwe +ffffffff82227a60 t pp_enable_mgpu_fan_boost +ffffffff82227ac0 t pp_set_active_display_count +ffffffff82227b00 t pp_set_hard_min_dcefclk_by_freq +ffffffff82227b60 t pp_set_hard_min_fclk_by_freq +ffffffff82227bc0 t pp_set_min_deep_sleep_dcefclk +ffffffff82227c20 t pp_get_asic_baco_capability +ffffffff82227c90 t pp_get_asic_baco_state +ffffffff82227cf0 t pp_set_asic_baco_state +ffffffff82227d60 t pp_get_ppfeature_status +ffffffff82227db0 t pp_set_ppfeature_status +ffffffff82227e00 t pp_asic_reset_mode_2 +ffffffff82227e50 t pp_set_df_cstate +ffffffff82227eb0 t pp_set_xgmi_pstate +ffffffff82227f10 t pp_get_gpu_metrics +ffffffff82227f70 t pp_get_prv_buffer_details +ffffffff82227ff0 t pp_pm_compute_clocks +ffffffff82229000 T ci_baco_set_state +ffffffff8222a000 T baco_program_registers +ffffffff8222a0d0 t baco_cmd_handler +ffffffff8222a250 T soc15_baco_program_registers +ffffffff8222b000 T fiji_baco_set_state +ffffffff8222c000 T phm_setup_asic +ffffffff8222c050 T phm_power_down_asic +ffffffff8222c0a0 T phm_set_power_state +ffffffff8222c110 T phm_enable_dynamic_state_management +ffffffff8222c1c0 T phm_disable_dynamic_state_management +ffffffff8222c250 T phm_force_dpm_levels +ffffffff8222c2a0 T phm_apply_state_adjust_rules +ffffffff8222c2f0 T phm_apply_clock_adjust_rules +ffffffff8222c340 T phm_powerdown_uvd +ffffffff8222c390 T phm_disable_clock_power_gatings +ffffffff8222c3e0 T phm_pre_display_configuration_changed +ffffffff8222c440 T phm_display_configuration_changed +ffffffff8222c4a0 T phm_notify_smc_display_config_after_ps_adjustment +ffffffff8222c500 T phm_stop_thermal_controller +ffffffff8222c560 T phm_register_irq_handlers +ffffffff8222c5b0 T phm_start_thermal_controller +ffffffff8222c6e0 T phm_check_smc_update_required_for_display_configuration +ffffffff8222c740 T phm_check_states_equal +ffffffff8222c790 T phm_store_dal_configuration_data +ffffffff8222c8e0 T phm_get_dal_power_level +ffffffff8222c930 T phm_set_cpu_power_state +ffffffff8222c980 T phm_get_performance_level +ffffffff8222c9d0 T phm_get_clock_info +ffffffff8222cb50 T phm_get_current_shallow_sleep_clocks +ffffffff8222cba0 T phm_get_clock_by_type +ffffffff8222cbf0 T phm_get_clock_by_type_with_latency +ffffffff8222cc40 T phm_get_clock_by_type_with_voltage +ffffffff8222cc90 T phm_set_watermarks_for_clocks_ranges +ffffffff8222cce0 T phm_display_clock_voltage_request +ffffffff8222cd30 T phm_get_max_high_clocks +ffffffff8222cd80 T phm_disable_smc_firmware_ctf +ffffffff8222cde0 T phm_set_active_display_count +ffffffff8222d000 T hwmgr_early_init +ffffffff8222d470 T hwmgr_sw_init +ffffffff8222d4e0 T hwmgr_sw_fini +ffffffff8222d530 T hwmgr_hw_init +ffffffff8222d6f0 T hwmgr_hw_fini +ffffffff8222d7a0 T hwmgr_suspend +ffffffff8222d820 T hwmgr_resume +ffffffff8222d8c0 T hwmgr_handle_task +ffffffff8222e000 T polaris_baco_set_state +ffffffff8222f000 T pp_override_get_default_fuse_value +ffffffff82230000 T psm_init_power_state_table +ffffffff822302a0 T psm_fini_power_state_table +ffffffff82230360 T psm_set_boot_states +ffffffff82230420 T psm_set_performance_states +ffffffff822304e0 T psm_set_user_performance_state +ffffffff82230570 T psm_adjust_power_state_dynamic +ffffffff82231000 T atomctrl_initialize_mc_reg_table +ffffffff82231200 T atomctrl_initialize_mc_reg_table_v2_2 +ffffffff82231400 T atomctrl_set_engine_dram_timings_rv770 +ffffffff82231460 T atomctrl_get_memory_pll_dividers_si +ffffffff82231540 T atomctrl_get_memory_pll_dividers_vi +ffffffff822315b0 T atomctrl_get_memory_pll_dividers_ai +ffffffff82231660 T atomctrl_get_engine_pll_dividers_kong +ffffffff822316e0 T atomctrl_get_engine_pll_dividers_vi +ffffffff822317a0 T atomctrl_get_engine_pll_dividers_ai +ffffffff82231880 T atomctrl_get_dfs_pll_dividers_vi +ffffffff82231940 T atomctrl_get_reference_clock +ffffffff822319a0 T atomctrl_is_voltage_controlled_by_gpio_v3 +ffffffff82231a50 T atomctrl_get_voltage_table_v3 +ffffffff82231bb0 T atomctrl_get_pp_assign_pin +ffffffff82231ca0 T atomctrl_calculate_voltage_evv_on_sclk +ffffffff82232020 T atomctrl_get_voltage_evv_on_sclk +ffffffff822320a0 T atomctrl_get_voltage_evv +ffffffff82232150 T atomctrl_get_mpll_reference_clock +ffffffff822321c0 T atomctrl_is_asic_internal_ss_supported +ffffffff82232210 T atomctrl_get_memory_clock_spread_spectrum +ffffffff82232310 T atomctrl_get_engine_clock_spread_spectrum +ffffffff82232410 T atomctrl_read_efuse +ffffffff822324c0 T atomctrl_set_ac_timing_ai +ffffffff82232520 T atomctrl_get_voltage_evv_on_sclk_ai +ffffffff82232590 T atomctrl_get_smc_sclk_range_table +ffffffff82232650 T atomctrl_get_vddc_shared_railinfo +ffffffff822326c0 T atomctrl_get_avfs_information +ffffffff82232840 T atomctrl_get_svi2_info +ffffffff82232920 T atomctrl_get_leakage_id_from_efuse +ffffffff82232980 T atomctrl_get_leakage_vddc_base_on_leakage +ffffffff82232b10 T atomctrl_get_voltage_range +ffffffff82232bd0 T atomctrl_get_edc_hilo_leakage_offset_table +ffffffff82232c50 T atomctrl_get_edc_leakage_table +ffffffff82233000 T pp_atomfwctrl_is_voltage_controlled_by_gpio_v4 +ffffffff822330d0 T pp_atomfwctrl_get_voltage_table_v4 +ffffffff82233280 T pp_atomfwctrl_get_pp_assign_pin +ffffffff82233360 T pp_atomfwctrl_enter_self_refresh +ffffffff82233390 T pp_atomfwctrl_get_gpu_pll_dividers_vega10 +ffffffff82233430 T pp_atomfwctrl_get_avfs_information +ffffffff82233760 T pp_atomfwctrl_get_gpio_information +ffffffff82233800 T pp_atomfwctrl_get_clk_information_by_clkid +ffffffff82233880 T pp_atomfwctrl_get_vbios_bootup_values +ffffffff82233c00 T pp_atomfwctrl_get_smc_dpm_information +ffffffff82234000 T encode_pcie_lane_width +ffffffff82234030 T decode_pcie_lane_width +ffffffff82235000 t pp_tables_v1_0_initialize +ffffffff82236420 t pp_tables_v1_0_uninitialize +ffffffff822365c0 T get_number_of_powerplay_table_entries_v1_0 +ffffffff82236670 T get_powerplay_table_entry_v1_0 +ffffffff82237000 T pp_tables_get_response_times +ffffffff822370d0 T pp_tables_get_num_of_entries +ffffffff82237190 T pp_tables_get_entry +ffffffff822374f0 t init_non_clock_fields +ffffffff82237670 t pp_tables_initialize +ffffffff82238ad0 t pp_tables_uninitialize +ffffffff82238cd0 t get_number_of_vce_state_table_entries +ffffffff82238dd0 t get_vce_state_table_entry +ffffffff82239000 T smu10_init_function_pointers +ffffffff82239040 t smu10_hwmgr_backend_init +ffffffff82239710 t smu10_hwmgr_backend_fini +ffffffff82239840 t smu10_setup_asic_task +ffffffff822398b0 t smu10_get_power_state_size +ffffffff822398e0 t smu10_apply_state_adjust_rules +ffffffff82239910 t smu10_dpm_force_dpm_level +ffffffff82239e90 t smu10_enable_dpm_tasks +ffffffff82239f10 t smu10_disable_dpm_tasks +ffffffff82239f40 t smu10_dpm_patch_boot_state +ffffffff82239f70 t smu10_dpm_get_pp_table_entry +ffffffff82239fd0 t smu10_dpm_get_num_of_pp_table_entries +ffffffff8223a020 t smu10_powergate_vcn +ffffffff8223a0c0 t smu10_dpm_get_mclk +ffffffff8223a110 t smu10_dpm_get_sclk +ffffffff8223a160 t smu10_set_power_state_tasks +ffffffff8223a1d0 t smu10_set_cpu_power_state +ffffffff8223a200 t smu10_store_cc6_data +ffffffff8223a270 t smu10_get_dal_power_level +ffffffff8223a2a0 t smu10_get_performance_level +ffffffff8223a330 t smu10_get_current_shallow_sleep_clocks +ffffffff8223a390 t smu10_get_clock_by_type_with_latency +ffffffff8223a4e0 t smu10_get_clock_by_type_with_voltage +ffffffff8223a5e0 t smu10_set_watermarks_for_clocks_ranges +ffffffff8223a6b0 t smu10_display_clock_voltage_request +ffffffff8223a750 t smu10_get_max_high_clocks +ffffffff8223a780 t smu10_power_off_asic +ffffffff8223a7d0 t smu10_force_clock_level +ffffffff8223a990 t smu10_print_clock_levels +ffffffff8223ad30 t smu10_gfx_off_control +ffffffff8223ae40 t smu10_read_sensor +ffffffff8223afb0 t smu10_set_active_display_count +ffffffff8223b000 t smu10_set_min_deep_sleep_dcefclk +ffffffff8223b060 t smu10_get_power_profile_mode +ffffffff8223b0a0 t smu10_set_power_profile_mode +ffffffff8223b1f0 t smu10_set_fine_grain_clk_vol +ffffffff8223b3f0 t smu10_powergate_mmhub +ffffffff8223b410 t smu10_smus_notify_pwe +ffffffff8223b430 t smu10_powergate_sdma +ffffffff8223b450 t smu10_set_hard_min_dcefclk_by_freq +ffffffff8223b4b0 t smu10_set_hard_min_fclk_by_freq +ffffffff8223b510 t smu10_set_hard_min_gfxclk_by_freq +ffffffff8223b570 t smu10_set_soft_max_gfxclk_by_freq +ffffffff8223b5d0 t smu10_asic_reset +ffffffff8223b5f0 t smu10_gfx_state_change +ffffffff8223b630 t smu10_dpm_get_pp_table_entry_callback +ffffffff8223c000 T smu7_baco_get_capability +ffffffff8223c060 T smu7_baco_get_state +ffffffff8223c0b0 T smu7_baco_set_state +ffffffff8223d000 T smu7_powerdown_uvd +ffffffff8223d050 T smu7_disable_clock_power_gating +ffffffff8223d0d0 T smu7_powergate_uvd +ffffffff8223d1c0 T smu7_powergate_vce +ffffffff8223d2b0 T smu7_update_clock_gatings +ffffffff8223d660 T smu7_powergate_gfx +ffffffff8223e000 T smu7_get_sleep_divider_id_from_clock +ffffffff8223e0a0 T smu7_init_function_pointers +ffffffff8223e100 t smu7_hwmgr_backend_init +ffffffff8223ff40 t smu7_hwmgr_backend_fini +ffffffff8223ffb0 t smu7_setup_asic_task +ffffffff82240310 t smu7_get_power_state_size +ffffffff82240340 t smu7_apply_state_adjust_rules +ffffffff822407b0 t smu7_force_dpm_level +ffffffff82240be0 t smu7_enable_dpm_tasks +ffffffff82243340 t smu7_disable_dpm_tasks +ffffffff82243a80 t smu7_dpm_patch_boot_state +ffffffff82243bc0 t smu7_get_pp_table_entry +ffffffff82243fb0 t smu7_get_number_of_powerplay_table_entries +ffffffff82244020 t smu7_dpm_get_mclk +ffffffff822440c0 t smu7_dpm_get_sclk +ffffffff82244160 t smu7_set_power_state_tasks +ffffffff82244ee0 t smu7_notify_smc_display_config_after_ps_adjustment +ffffffff82244f10 t smu7_display_configuration_changed_task +ffffffff822450c0 t smu7_set_max_fan_rpm_output +ffffffff822450f0 t smu7_set_max_fan_pwm_output +ffffffff82245110 t smu7_set_fan_control_mode +ffffffff822451a0 t smu7_get_fan_control_mode +ffffffff822451e0 t smu7_register_irq_handlers +ffffffff82245280 t smu7_check_smc_update_required_for_display_configuration +ffffffff82245330 t smu7_check_states_equal +ffffffff822454d0 t smu7_get_performance_level +ffffffff82245560 t smu7_get_clock_by_type +ffffffff82245720 t smu7_get_clock_by_type_with_latency +ffffffff822458c0 t smu7_set_watermarks_for_clocks_ranges +ffffffff82245b00 t smu7_get_max_high_clocks +ffffffff82245b80 t smu7_power_off_asic +ffffffff82245bd0 t smu7_force_clock_level +ffffffff82245ce0 t smu7_print_clock_levels +ffffffff822462c0 t smu7_get_sclk_od +ffffffff82246320 t smu7_set_sclk_od +ffffffff822463e0 t smu7_get_mclk_od +ffffffff82246440 t smu7_set_mclk_od +ffffffff82246500 t smu7_read_sensor +ffffffff822467d0 t smu7_avfs_control +ffffffff822468a0 t smu7_notify_cac_buffer_info +ffffffff82246a40 t smu7_get_thermal_temperature_range +ffffffff82246ad0 t smu7_get_power_profile_mode +ffffffff82246b10 t smu7_set_power_profile_mode +ffffffff82246d70 t smu7_odn_edit_dpm_table +ffffffff82246f20 t phm_add_voltage +ffffffff82247030 t smu7_get_profiling_clk +ffffffff822471f0 t smu7_check_dpm_table_updated +ffffffff82247340 t smu7_odn_initial_default_setting +ffffffff82247470 t smu7_set_dpm_event_sources +ffffffff82247590 t smu7_get_pp_table_entry_callback_func_v0 +ffffffff82247a90 t smu7_get_pp_table_entry_callback_func_v1 +ffffffff82249000 T smu7_enable_didt_config +ffffffff822493c0 t smu7_program_pt_config_registers +ffffffff822495b0 t smu7_enable_didt +ffffffff822497a0 T smu7_disable_didt_config +ffffffff82249860 T smu7_enable_smc_cac +ffffffff822498f0 T smu7_disable_smc_cac +ffffffff82249980 T smu7_set_power_limit +ffffffff822499e0 T smu7_enable_power_containment +ffffffff82249b60 T smu7_disable_power_containment +ffffffff82249c80 T smu7_power_control_set_level +ffffffff8224a000 T smu7_fan_ctrl_get_fan_speed_info +ffffffff8224a080 T smu7_fan_ctrl_get_fan_speed_pwm +ffffffff8224a140 T smu7_fan_ctrl_get_fan_speed_rpm +ffffffff8224a1f0 T smu7_fan_ctrl_set_static_mode +ffffffff8224a320 T smu7_fan_ctrl_set_default_mode +ffffffff8224a400 T smu7_fan_ctrl_start_smc_fan_control +ffffffff8224a520 T smu7_fan_ctrl_stop_smc_fan_control +ffffffff8224a540 T smu7_fan_ctrl_set_fan_speed_pwm +ffffffff8224a720 T smu7_fan_ctrl_reset_fan_speed_to_default +ffffffff8224a900 T smu7_fan_ctrl_set_fan_speed_rpm +ffffffff8224aae0 T smu7_thermal_get_temperature +ffffffff8224ab40 T smu7_thermal_disable_alert +ffffffff8224abe0 T smu7_thermal_stop_thermal_controller +ffffffff8224ad60 T smu7_start_thermal_controller +ffffffff8224b110 T smu7_thermal_ctrl_uninitialize_thermal_controller +ffffffff8224c000 T smu8_init_function_pointers +ffffffff8224c040 t smu8_hwmgr_backend_init +ffffffff8224c520 t smu8_hwmgr_backend_fini +ffffffff8224c590 t smu8_setup_asic_task +ffffffff8224cab0 t smu8_get_power_state_size +ffffffff8224cae0 t smu8_apply_state_adjust_rules +ffffffff8224cc30 t smu8_dpm_force_dpm_level +ffffffff8224cf30 t smu8_enable_dpm_tasks +ffffffff8224d080 t smu8_disable_dpm_tasks +ffffffff8224d160 t smu8_dpm_patch_boot_state +ffffffff8224d1c0 t smu8_dpm_get_pp_table_entry +ffffffff8224d220 t smu8_dpm_get_num_of_pp_table_entries +ffffffff8224d270 t smu8_dpm_powerdown_uvd +ffffffff8224d2b0 t smu8_dpm_powergate_vce +ffffffff8224d480 t smu8_dpm_powergate_uvd +ffffffff8224d6b0 t smu8_dpm_powergate_acp +ffffffff8224d710 t smu8_dpm_get_mclk +ffffffff8224d740 t smu8_dpm_get_sclk +ffffffff8224d7b0 t smu8_set_power_state_tasks +ffffffff8224daf0 t smu8_set_cpu_power_state +ffffffff8224db60 t smu8_store_cc6_data +ffffffff8224dbe0 t smu8_get_dal_power_level +ffffffff8224dc60 t smu8_get_performance_level +ffffffff8224dd50 t smu8_get_current_shallow_sleep_clocks +ffffffff8224ddb0 t smu8_get_clock_by_type +ffffffff8224def0 t smu8_get_max_high_clocks +ffffffff8224dfb0 t smu8_power_off_asic +ffffffff8224e030 t smu8_force_clock_level +ffffffff8224e090 t smu8_print_clock_levels +ffffffff8224e260 t smu8_read_sensor +ffffffff8224e560 t smu8_notify_cac_buffer_info +ffffffff8224e610 t smu8_get_thermal_temperature_range +ffffffff8224e680 t smu8_dpm_get_pp_table_entry_callback +ffffffff8224f000 T smu9_baco_get_capability +ffffffff8224f0d0 T smu9_baco_get_state +ffffffff82250000 T convert_to_vid +ffffffff82250050 T convert_to_vddc +ffffffff822500a0 T phm_copy_clock_limits_array +ffffffff82250180 T phm_copy_overdrive_settings_limits_array +ffffffff82250260 T phm_set_field_to_u32 +ffffffff822502c0 T phm_wait_on_register +ffffffff822503d0 T phm_wait_on_indirect_register +ffffffff82250500 T phm_wait_for_register_unequal +ffffffff82250600 T phm_wait_for_indirect_register_unequal +ffffffff82250730 T phm_cf_want_uvd_power_gating +ffffffff82250760 T phm_cf_want_vce_power_gating +ffffffff82250790 T phm_trim_voltage_table +ffffffff822508c0 T phm_get_svi2_mvdd_voltage_table +ffffffff82250a50 T phm_get_svi2_vddci_voltage_table +ffffffff82250be0 T phm_get_svi2_vdd_voltage_table +ffffffff82250c80 T phm_trim_voltage_table_to_fit_state_table +ffffffff82250d60 T phm_reset_single_dpm_table +ffffffff82250e30 T phm_setup_pcie_table_entry +ffffffff82250e70 T phm_get_dpm_level_enable_mask_value +ffffffff82250f90 T phm_get_voltage_index +ffffffff82251010 T phm_get_voltage_id +ffffffff82251090 T phm_find_closest_vddci +ffffffff822510f0 T phm_find_boot_level +ffffffff82251160 T phm_get_sclk_for_voltage_evv +ffffffff82251210 T phm_initializa_dynamic_state_adjustment_rule_settings +ffffffff82251320 T phm_get_lowest_enabled_level +ffffffff82251360 T phm_apply_dal_min_voltage_request +ffffffff82251430 T phm_get_voltage_evv_on_sclk +ffffffff822514d0 T phm_irq_process +ffffffff822516d0 t orderly_poweroff +ffffffff822516e0 T smu9_register_irq_handlers +ffffffff82251790 T smu_atom_get_data_table +ffffffff82251800 T smu_get_voltage_dependency_table_ppt_v1 +ffffffff822518e0 T smu_set_watermarks_for_clocks_ranges +ffffffff82252000 T tonga_baco_set_state +ffffffff82253000 T vega10_baco_set_state +ffffffff82254000 T vega10_enable_disable_vce_dpm +ffffffff82254090 T vega10_hwmgr_init +ffffffff822540f0 t vega10_hwmgr_backend_init +ffffffff82254ef0 t vega10_hwmgr_backend_fini +ffffffff82254f60 t vega10_setup_asic_task +ffffffff82255080 t vega10_get_power_state_size +ffffffff822550b0 t vega10_apply_state_adjust_rules +ffffffff82255440 t vega10_dpm_force_dpm_level +ffffffff82255970 t vega10_enable_dpm_tasks +ffffffff822582d0 t vega10_disable_dpm_tasks +ffffffff822588b0 t vega10_patch_boot_state +ffffffff822588e0 t vega10_get_pp_table_entry +ffffffff82258950 t vega10_power_gate_vce +ffffffff822589f0 t vega10_power_gate_uvd +ffffffff82258a90 t vega10_dpm_get_mclk +ffffffff82258b30 t vega10_dpm_get_sclk +ffffffff82258bd0 t vega10_set_power_state_tasks +ffffffff82259650 t vega10_notify_smc_display_config_after_ps_adjustment +ffffffff82259800 t vega10_display_configuration_changed_task +ffffffff822598c0 t vega10_set_fan_control_mode +ffffffff82259930 t vega10_get_fan_control_mode +ffffffff82259970 t vega10_check_smc_update_required_for_display_configuration +ffffffff822599d0 t vega10_check_states_equal +ffffffff82259b30 t vega10_get_dal_power_level +ffffffff82259b70 t vega10_get_performance_level +ffffffff82259c00 t vega10_get_clock_by_type_with_latency +ffffffff82259e30 t vega10_get_clock_by_type_with_voltage +ffffffff82259f10 t vega10_set_watermarks_for_clocks_ranges +ffffffff82259f70 t vega10_display_clock_voltage_request +ffffffff82259fe0 t vega10_power_off_asic +ffffffff8225a050 t vega10_force_clock_level +ffffffff8225a180 t vega10_emit_clock_levels +ffffffff8225a2f0 t vega10_print_clock_levels +ffffffff8225aad0 t vega10_get_sclk_od +ffffffff8225ab40 t vega10_set_sclk_od +ffffffff8225ac40 t vega10_get_mclk_od +ffffffff8225acb0 t vega10_set_mclk_od +ffffffff8225ada0 t vega10_read_sensor +ffffffff8225aff0 t vega10_avfs_enable +ffffffff8225b0b0 t vega10_notify_cac_buffer_info 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vega10_odn_update_power_state +ffffffff8225d000 T vega10_enable_didt_config +ffffffff8225e870 T vega10_disable_didt_config +ffffffff8225eab0 T vega10_initialize_power_tune_defaults +ffffffff8225ebe0 T vega10_set_power_limit +ffffffff8225ec30 T vega10_enable_power_containment +ffffffff8225ed50 T vega10_disable_power_containment +ffffffff8225ee20 T vega10_power_control_set_level +ffffffff8225ee80 t vega10_didt_set_mask +ffffffff82260000 t vega10_pp_tables_initialize +ffffffff822619a0 t vega10_pp_tables_uninitialize +ffffffff82261b50 T vega10_get_number_of_powerplay_table_entries +ffffffff82261c00 T vega10_get_powerplay_table_entry +ffffffff82261d70 T vega10_baco_set_cap +ffffffff82262000 T vega10_fan_ctrl_get_fan_speed_info +ffffffff82262080 T vega10_fan_ctrl_get_fan_speed_pwm +ffffffff82262110 T vega10_fan_ctrl_get_fan_speed_rpm +ffffffff82262200 T vega10_fan_ctrl_set_static_mode +ffffffff822624a0 T vega10_fan_ctrl_set_default_mode +ffffffff822626b0 T vega10_fan_ctrl_start_smc_fan_control +ffffffff82262770 T vega10_fan_ctrl_stop_smc_fan_control +ffffffff82262830 T vega10_fan_ctrl_set_fan_speed_pwm +ffffffff82262a50 T vega10_fan_ctrl_reset_fan_speed_to_default +ffffffff82262b10 T vega10_fan_ctrl_set_fan_speed_rpm +ffffffff82262ce0 T vega10_thermal_get_temperature +ffffffff82262d70 T vega10_thermal_disable_alert +ffffffff82262e70 T vega10_thermal_stop_thermal_controller +ffffffff82262ed0 T vega10_enable_mgpu_fan_boost +ffffffff82262fe0 T vega10_start_thermal_controller +ffffffff82263560 T vega10_thermal_ctrl_uninitialize_thermal_controller +ffffffff82264000 T vega12_baco_set_state +ffffffff82265000 T vega12_enable_disable_vce_dpm +ffffffff82265090 T vega12_hwmgr_init +ffffffff822650d0 t vega12_hwmgr_backend_init +ffffffff82265930 t vega12_hwmgr_backend_fini +ffffffff82265980 t vega12_setup_asic_task +ffffffff822659c0 t vega12_apply_clocks_adjust_rules +ffffffff82265da0 t vega12_dpm_force_dpm_level +ffffffff822661e0 t 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t vega12_power_off_asic +ffffffff82267850 t vega12_force_clock_level +ffffffff82267a90 t vega12_print_clock_levels +ffffffff82268280 t vega12_gfx_off_control +ffffffff822682d0 t vega12_read_sensor +ffffffff822686a0 t vega12_notify_cac_buffer_info +ffffffff82268750 t vega12_get_thermal_temperature_range +ffffffff82268820 t vega12_get_ppfeature_status +ffffffff822688a0 t vega12_set_ppfeature_status +ffffffff82268940 t vega12_set_mp1_state +ffffffff822689b0 t vega12_get_gpu_metrics +ffffffff82268c30 t vega12_upload_dpm_min_level +ffffffff82268e70 t vega12_upload_dpm_max_level +ffffffff82269040 t vega12_setup_single_dpm_table +ffffffff8226a000 t vega12_pp_tables_initialize +ffffffff8226a5f0 t vega12_pp_tables_uninitialize +ffffffff8226b000 T vega12_fan_ctrl_get_fan_speed_info +ffffffff8226b040 T vega12_fan_ctrl_get_fan_speed_rpm +ffffffff8226b0a0 T vega12_fan_ctrl_start_smc_fan_control +ffffffff8226b0d0 T vega12_fan_ctrl_stop_smc_fan_control +ffffffff8226b100 T vega12_fan_ctrl_reset_fan_speed_to_default +ffffffff8226b130 T vega12_thermal_get_temperature +ffffffff8226b1c0 T vega12_thermal_disable_alert +ffffffff8226b240 T vega12_thermal_stop_thermal_controller +ffffffff8226b2c0 T vega12_start_thermal_controller +ffffffff8226c000 T vega20_baco_get_capability +ffffffff8226c0c0 T vega20_baco_get_state +ffffffff8226c150 T vega20_baco_set_state +ffffffff8226c340 T vega20_baco_apply_vdci_flush_workaround +ffffffff8226d000 T vega20_hwmgr_init +ffffffff8226d040 t vega20_hwmgr_backend_init +ffffffff8226d980 t vega20_hwmgr_backend_fini +ffffffff8226d9d0 t vega20_setup_asic_task +ffffffff8226dab0 t vega20_apply_clocks_adjust_rules +ffffffff8226dfa0 t vega20_dpm_force_dpm_level +ffffffff8226e710 t vega20_enable_dpm_tasks +ffffffff8226fb80 t vega20_disable_dpm_tasks +ffffffff8226fd10 t vega20_power_gate_vce +ffffffff8226fe40 t vega20_power_gate_uvd +ffffffff8226fee0 t vega20_dpm_get_mclk +ffffffff8226ffe0 t vega20_dpm_get_sclk +ffffffff822700e0 t vega20_notify_smc_display_config_after_ps_adjustment +ffffffff82270220 t vega20_pre_display_configuration_changed_task +ffffffff82270380 t vega20_display_configuration_changed_task +ffffffff82270460 t vega20_set_fan_control_mode +ffffffff822704d0 t vega20_get_fan_control_mode +ffffffff82270510 t vega20_check_smc_update_required_for_display_configuration +ffffffff82270570 t vega20_get_dal_power_level +ffffffff822705a0 t vega20_get_performance_level +ffffffff822705d0 t vega20_get_clock_by_type_with_latency +ffffffff82270920 t vega20_get_clock_by_type_with_voltage +ffffffff82270950 t vega20_set_watermarks_for_clocks_ranges +ffffffff822709d0 t vega20_display_clock_voltage_request +ffffffff82270a50 t vega20_power_off_asic +ffffffff82270ac0 t vega20_force_clock_level +ffffffff822710e0 t vega20_print_clock_levels +ffffffff82272000 t vega20_get_sclk_od +ffffffff82272070 t vega20_set_sclk_od +ffffffff82272200 t vega20_get_mclk_od +ffffffff82272270 t vega20_set_mclk_od +ffffffff82272400 t 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vega20_pp_tables_uninitialize +ffffffff82276000 T vega20_fan_ctrl_stop_smc_fan_control +ffffffff82276090 T vega20_fan_ctrl_start_smc_fan_control +ffffffff82276120 T vega20_fan_ctrl_get_fan_speed_pwm +ffffffff82276240 T vega20_fan_ctrl_set_fan_speed_pwm +ffffffff82276430 t vega20_fan_ctrl_set_static_mode +ffffffff822765e0 T vega20_fan_ctrl_get_fan_speed_info +ffffffff82276620 T vega20_fan_ctrl_get_fan_speed_rpm +ffffffff82276680 T vega20_fan_ctrl_set_fan_speed_rpm +ffffffff82276810 T vega20_thermal_get_temperature +ffffffff822768a0 T vega20_thermal_disable_alert +ffffffff82276920 T vega20_thermal_stop_thermal_controller +ffffffff822769a0 T vega20_start_thermal_controller +ffffffff82277000 t ci_smu_init +ffffffff82277060 t ci_smu_fini +ffffffff822770b0 t ci_start_smu +ffffffff822770e0 t ci_send_msg_to_smc +ffffffff82277180 t ci_send_msg_to_smc_with_parameter +ffffffff82277230 t ci_update_smc_table +ffffffff82277470 t ci_process_firmware_header +ffffffff82277980 t ci_update_sclk_threshold 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arcturus_get_fan_speed_rpm +ffffffff822a4370 t arcturus_get_thermal_temperature_range +ffffffff822a4460 t arcturus_set_performance_level +ffffffff822a4570 t arcturus_dump_pptable +ffffffff822a45a0 t arcturus_get_power_limit +ffffffff822a46a0 t arcturus_set_df_cstate +ffffffff822a47b0 t arcturus_allow_xgmi_power_down +ffffffff822a48b0 t arcturus_i2c_control_init +ffffffff822a49e0 t arcturus_i2c_control_fini +ffffffff822a4a20 t arcturus_get_unique_id +ffffffff822a4b40 t arcturus_init_smc_tables +ffffffff822a4cb0 t arcturus_setup_pptable +ffffffff822a4de0 t arcturus_set_fan_speed_pwm +ffffffff822a4f80 t arcturus_set_fan_speed_rpm +ffffffff822a5090 t arcturus_log_thermal_throttling_event +ffffffff822a5480 t arcturus_get_gpu_metrics +ffffffff822a5690 t arcturus_get_fan_parameters +ffffffff822a56d0 t arcturus_get_current_clk_freq_by_table +ffffffff822a5810 t arcturus_get_smu_metrics_data +ffffffff822a5a80 t arcturus_upload_dpm_level +ffffffff822a5b70 t arcturus_i2c_xfer +ffffffff822a5e20 t arcturus_i2c_func +ffffffff822a5e50 t arcturus_set_fan_static_mode +ffffffff822a7000 T cyan_skillfish_set_ppt_funcs +ffffffff822a7030 t cyan_skillfish_print_clk_levels +ffffffff822a7150 t cyan_skillfish_od_edit_dpm_table +ffffffff822a7440 t cyan_skillfish_read_sensor +ffffffff822a75f0 t cyan_skillfish_is_dpm_running +ffffffff822a7690 t cyan_skillfish_init_smc_tables +ffffffff822a7760 t cyan_skillfish_get_enabled_mask +ffffffff822a77a0 t cyan_skillfish_get_dpm_ultimate_freq +ffffffff822a7860 t cyan_skillfish_get_gpu_metrics +ffffffff822a7b00 t cyan_skillfish_get_smu_metrics_data +ffffffff822a8000 T navi10_set_ppt_funcs +ffffffff822a8050 t navi10_run_btc +ffffffff822a80d0 t navi10_get_allowed_feature_mask +ffffffff822a8390 t navi10_set_default_dpm_table +ffffffff822a8800 t navi10_populate_umd_state_clk +ffffffff822a8970 t navi10_print_clk_levels +ffffffff822a8b00 t navi10_emit_clk_levels +ffffffff822a8d40 t navi10_force_clk_levels +ffffffff822a8e70 t navi10_od_edit_dpm_table +ffffffff822a94f0 t navi10_get_clock_by_type_with_latency +ffffffff822a95f0 t navi10_get_power_profile_mode +ffffffff822a9850 t navi10_set_power_profile_mode +ffffffff822a9b10 t navi10_dpm_set_vcn_enable +ffffffff822a9b90 t navi10_dpm_set_jpeg_enable +ffffffff822a9c00 t navi10_read_sensor +ffffffff822a9d80 t navi10_pre_display_config_changed +ffffffff822a9e10 t navi10_display_config_changed +ffffffff822a9e90 t navi10_notify_smc_display_config +ffffffff822aa020 t navi10_is_dpm_running +ffffffff822aa070 t navi10_get_fan_speed_rpm +ffffffff822aa100 t navi10_set_watermarks_table +ffffffff822aa2a0 t navi10_get_thermal_temperature_range +ffffffff822aa390 t navi10_get_uclk_dpm_states +ffffffff822aa4a0 t navi10_set_default_od_settings +ffffffff822aa700 t navi10_display_disable_memory_clock_switch +ffffffff822aa780 t navi10_get_power_limit +ffffffff822aa8a0 t navi10_update_pcie_parameters +ffffffff822aaa00 t navi10_i2c_control_init +ffffffff822aab30 t navi10_i2c_control_fini +ffffffff822aab70 t navi10_init_smc_tables +ffffffff822aada0 t navi10_setup_pptable +ffffffff822aafb0 t navi10_baco_enter +ffffffff822ab000 t navi10_baco_exit +ffffffff822ab100 t navi1x_get_gpu_metrics +ffffffff822abaa0 t navi10_enable_mgpu_fan_boost +ffffffff822abb10 t navi10_get_fan_parameters +ffffffff822abb50 t navi10_post_smu_init +ffffffff822abe40 t navi10_get_default_config_table_settings +ffffffff822abe90 t navi10_set_config_table +ffffffff822abf40 t navi1x_get_smu_metrics_data +ffffffff822ac3a0 t navi10_get_smu_metrics_data +ffffffff822ac5d0 t navi10_i2c_xfer +ffffffff822ac880 t navi10_i2c_func +ffffffff822ac8b0 t navi10_umc_hybrid_cdr_workaround +ffffffff822ad000 T sienna_cichlid_set_ppt_funcs +ffffffff822ad050 t sienna_cichlid_run_btc +ffffffff822ad0d0 t sienna_cichlid_get_allowed_feature_mask +ffffffff822ad350 t sienna_cichlid_set_default_dpm_table +ffffffff822ad920 t sienna_cichlid_populate_umd_state_clk +ffffffff822ad9d0 t sienna_cichlid_print_clk_levels +ffffffff822adbb0 t sienna_cichlid_force_clk_levels +ffffffff822adce0 t sienna_cichlid_od_edit_dpm_table +ffffffff822ae270 t sienna_cichlid_get_power_profile_mode +ffffffff822ae4d0 t sienna_cichlid_set_power_profile_mode +ffffffff822ae790 t sienna_cichlid_dpm_set_vcn_enable +ffffffff822ae850 t sienna_cichlid_dpm_set_jpeg_enable +ffffffff822ae8d0 t sienna_cichlid_read_sensor +ffffffff822aebd0 t sienna_cichlid_pre_display_config_changed +ffffffff822aec00 t sienna_cichlid_display_config_changed +ffffffff822aec60 t sienna_cichlid_notify_smc_display_config +ffffffff822aedf0 t sienna_cichlid_is_dpm_running +ffffffff822aee40 t sienna_cichlid_get_fan_speed_rpm +ffffffff822aef40 t sienna_cichlid_set_watermarks_table +ffffffff822af0d0 t sienna_cichlid_get_thermal_temperature_range +ffffffff822af1a0 t sienna_cichlid_get_uclk_dpm_states +ffffffff822af2c0 t sienna_cichlid_set_default_od_settings +ffffffff822af410 t sienna_cichlid_display_disable_memory_clock_switch +ffffffff822af490 t sienna_cichlid_dump_pptable +ffffffff822af4c0 t sienna_cichlid_get_power_limit +ffffffff822af580 t sienna_cichlid_update_pcie_parameters +ffffffff822af6e0 t sienna_cichlid_i2c_control_init +ffffffff822af810 t sienna_cichlid_i2c_control_fini +ffffffff822af850 t sienna_cichlid_get_unique_id +ffffffff822af9a0 t sienna_cichlid_init_smc_tables +ffffffff822afcb0 t sienna_cichlid_set_mp1_state +ffffffff822afcf0 t sienna_cichlid_setup_pptable +ffffffff822b0150 t sienna_cichlid_system_features_control +ffffffff822b01e0 t sienna_cichlid_baco_enter +ffffffff822b0230 t sienna_cichlid_baco_exit +ffffffff822b0330 t sienna_cichlid_is_mode1_reset_supported +ffffffff822b03b0 t sienna_cichlid_is_mode2_reset_supported +ffffffff822b03e0 t sienna_cichlid_mode2_reset +ffffffff822b0510 t sienna_cichlid_get_dpm_ultimate_freq +ffffffff822b0520 t sienna_cichlid_get_gpu_metrics +ffffffff822b09a0 t sienna_cichlid_enable_mgpu_fan_boost +ffffffff822b09f0 t sienna_cichlid_get_fan_parameters +ffffffff822b0a30 t sienna_cichlid_gpo_control +ffffffff822b0ae0 t sienna_cichlid_get_ecc_info +ffffffff822b0bd0 t sienna_cichlid_stb_get_data_direct +ffffffff822b0c70 t sienna_cichlid_get_default_config_table_settings +ffffffff822b0cd0 t sienna_cichlid_set_config_table +ffffffff822b0da0 t sienna_cichlid_get_smu_metrics_data +ffffffff822b11e0 t sienna_cichlid_get_throttler_status_locked +ffffffff822b1360 t sienna_cichlid_get_smartshift_power_percentage +ffffffff822b1490 t sienna_cichlid_i2c_xfer +ffffffff822b1740 t sienna_cichlid_i2c_func +ffffffff822b2000 T smu_v11_0_init_microcode +ffffffff822b22a0 T smu_v11_0_fini_microcode +ffffffff822b2320 T smu_v11_0_load_microcode +ffffffff822b2460 T smu_v11_0_check_fw_status +ffffffff822b24b0 T smu_v11_0_check_fw_version +ffffffff822b2660 T smu_v11_0_setup_pptable +ffffffff822b2780 T smu_v11_0_init_smc_tables +ffffffff822b28d0 T smu_v11_0_fini_smc_tables +ffffffff822b2b00 T smu_v11_0_init_power +ffffffff822b2b80 T smu_v11_0_fini_power +ffffffff822b2be0 T smu_v11_0_get_vbios_bootup_values +ffffffff822b2f30 T smu_v11_0_notify_memory_pool_location +ffffffff822b3020 T smu_v11_0_set_min_deep_sleep_dcefclk +ffffffff822b30a0 T smu_v11_0_set_driver_table_location +ffffffff822b3110 T smu_v11_0_set_tool_table_location +ffffffff822b3180 T smu_v11_0_init_display_count +ffffffff822b31d0 T smu_v11_0_set_allowed_mask +ffffffff822b32a0 T smu_v11_0_system_features_control +ffffffff822b32c0 T smu_v11_0_notify_display_change +ffffffff822b3330 T smu_v11_0_init_max_sustainable_clocks +ffffffff822b35a0 t smu_v11_0_get_max_sustainable_clock +ffffffff822b36c0 T smu_v11_0_get_current_power_limit +ffffffff822b3790 T smu_v11_0_set_power_limit +ffffffff822b38d0 T smu_v11_0_interrupt_work +ffffffff822b3950 T smu_v11_0_enable_thermal_alert +ffffffff822b39e0 T smu_v11_0_disable_thermal_alert +ffffffff822b3a00 T smu_v11_0_get_gfx_vdd +ffffffff822b3ac0 T smu_v11_0_display_clock_voltage_request +ffffffff822b3c00 T smu_v11_0_set_hard_freq_limited_range +ffffffff822b3ce0 T smu_v11_0_gfx_off_control +ffffffff822b3d50 T smu_v11_0_get_fan_control_mode +ffffffff822b3da0 T smu_v11_0_set_fan_speed_pwm +ffffffff822b3f30 t smu_v11_0_set_fan_static_mode +ffffffff822b40e0 T smu_v11_0_set_fan_speed_rpm +ffffffff822b4200 T smu_v11_0_get_fan_speed_pwm +ffffffff822b4330 T smu_v11_0_get_fan_speed_rpm +ffffffff822b4430 T smu_v11_0_set_fan_control_mode +ffffffff822b45d0 T smu_v11_0_set_xgmi_pstate +ffffffff822b45f0 T smu_v11_0_register_irq_handler +ffffffff822b46b0 T smu_v11_0_get_max_sustainable_clocks_by_dc +ffffffff822b4740 T smu_v11_0_set_azalia_d3_pme +ffffffff822b4760 T smu_v11_0_baco_set_armd3_sequence +ffffffff822b4780 T smu_v11_0_baco_is_support +ffffffff822b4800 T smu_v11_0_baco_get_state +ffffffff822b4830 T smu_v11_0_baco_set_state +ffffffff822b4ae0 T smu_v11_0_baco_enter +ffffffff822b4bd0 T smu_v11_0_baco_exit +ffffffff822b4c70 T smu_v11_0_mode1_reset +ffffffff822b4cf0 T smu_v11_0_handle_passthrough_sbr +ffffffff822b4d10 T smu_v11_0_get_dpm_ultimate_freq +ffffffff822b4e50 T smu_v11_0_set_soft_freq_limited_range +ffffffff822b4f30 T smu_v11_0_set_performance_level +ffffffff822b5280 T smu_v11_0_set_power_source +ffffffff822b52e0 T smu_v11_0_get_dpm_freq_by_index +ffffffff822b5380 T smu_v11_0_get_dpm_level_count +ffffffff822b5410 T smu_v11_0_set_single_dpm_table +ffffffff822b55f0 T smu_v11_0_get_dpm_level_range +ffffffff822b5750 T smu_v11_0_get_current_pcie_link_width_level +ffffffff822b57a0 T smu_v11_0_get_current_pcie_link_width +ffffffff822b5800 T smu_v11_0_get_current_pcie_link_speed_level +ffffffff822b5850 T smu_v11_0_get_current_pcie_link_speed +ffffffff822b58a0 T smu_v11_0_gfx_ulv_control +ffffffff822b5910 T smu_v11_0_deep_sleep_control +ffffffff822b5ac0 T smu_v11_0_restore_user_od_settings +ffffffff822b5b50 T smu_v11_0_set_smu_mailbox_registers +ffffffff822b5bc0 t smu_v11_0_set_irq_state +ffffffff822b6140 t smu_v11_0_irq_process +ffffffff822b6440 t orderly_poweroff +ffffffff822b7000 T vangogh_set_ppt_funcs +ffffffff822b7040 t vangogh_set_default_dpm_tables +ffffffff822b7060 t vangogh_common_print_clk_levels +ffffffff822b74b0 t vangogh_force_clk_levels +ffffffff822b76e0 t vangogh_od_edit_dpm_table +ffffffff822b7c30 t vangogh_get_power_profile_mode +ffffffff822b7d00 t vangogh_set_power_profile_mode +ffffffff822b7e20 t vangogh_dpm_set_vcn_enable +ffffffff822b7e70 t vangogh_dpm_set_jpeg_enable +ffffffff822b7ec0 t vangogh_read_sensor +ffffffff822b7ff0 t vangogh_is_dpm_running +ffffffff822b8050 t vangogh_set_watermarks_table +ffffffff822b81e0 t vangogh_set_performance_level +ffffffff822b8b00 t vangogh_get_power_limit +ffffffff822b8c80 t vangogh_get_ppt_limit +ffffffff822b8ce0 t vangogh_get_dpm_clock_table +ffffffff822b8e50 t vangogh_init_smc_tables +ffffffff822b90a0 t vangogh_system_features_control +ffffffff822b90f0 t vangogh_set_power_limit +ffffffff822b9250 t vangogh_get_gfxoff_status +ffffffff822b92d0 t vangogh_get_gfxoff_entrycount +ffffffff822b9340 t vangogh_set_gfxoff_residency +ffffffff822b93b0 t vangogh_get_gfxoff_residency +ffffffff822b93e0 t vangogh_mode2_reset +ffffffff822b9520 t vangogh_common_get_gpu_metrics +ffffffff822b9b60 t vangogh_post_smu_init +ffffffff822b9d00 t vangogh_set_fine_grain_gfx_freq_parameters +ffffffff822b9d70 t vangogh_common_get_smu_metrics_data +ffffffff822ba0c0 t vangogh_force_dpm_limit_value +ffffffff822ba200 t vangogh_get_dpm_ultimate_freq +ffffffff822ba5c0 t vangogh_set_soft_freq_limited_range +ffffffff822bb000 T renoir_set_ppt_funcs +ffffffff822bb0a0 t renoir_get_current_power_state +ffffffff822bb110 t renoir_print_clk_levels +ffffffff822bb370 t renoir_force_clk_levels +ffffffff822bb5a0 t renoir_od_edit_dpm_table +ffffffff822bb8a0 t renoir_get_power_profile_mode +ffffffff822bb970 t renoir_set_power_profile_mode +ffffffff822bba90 t renoir_dpm_set_vcn_enable +ffffffff822bbb10 t renoir_dpm_set_jpeg_enable +ffffffff822bbb90 t renoir_read_sensor +ffffffff822bbf30 t renoir_is_dpm_running +ffffffff822bbf60 t renoir_set_watermarks_table +ffffffff822bc100 t renoir_set_performance_level +ffffffff822bc640 t renoir_get_dpm_clock_table +ffffffff822bc980 t renoir_init_smc_tables +ffffffff822bcaf0 t renoir_get_enabled_mask +ffffffff822bcb30 t renoir_get_dpm_ultimate_freq +ffffffff822bcdd0 t renoir_get_gpu_metrics +ffffffff822bcff0 t renoir_gfx_state_change_set +ffffffff822bd020 t renoir_set_fine_grain_gfx_freq_parameters +ffffffff822bd0b0 t renoir_force_dpm_limit_value +ffffffff822be000 T smu_v12_0_check_fw_status +ffffffff822be050 T smu_v12_0_check_fw_version +ffffffff822be110 T smu_v12_0_powergate_sdma +ffffffff822be150 T smu_v12_0_set_gfx_cgpg +ffffffff822be1b0 T smu_v12_0_get_gfxoff_status +ffffffff822be230 T smu_v12_0_gfx_off_control +ffffffff822be340 T smu_v12_0_fini_smc_tables +ffffffff822be3f0 T smu_v12_0_set_default_dpm_tables +ffffffff822be410 T smu_v12_0_mode2_reset +ffffffff822be430 T smu_v12_0_set_soft_freq_limited_range +ffffffff822be560 T smu_v12_0_set_driver_table_location +ffffffff822be5d0 T smu_v12_0_get_vbios_bootup_values +ffffffff822bf000 T aldebaran_set_ppt_funcs +ffffffff822bf040 t aldebaran_get_allowed_feature_mask +ffffffff822bf090 t aldebaran_set_default_dpm_table +ffffffff822bf290 t aldebaran_populate_umd_state_clk +ffffffff822bf390 t aldebaran_print_clk_levels +ffffffff822bf550 t aldebaran_force_clk_levels +ffffffff822bf700 t aldebaran_usr_edit_dpm_table +ffffffff822bf920 t aldebaran_read_sensor +ffffffff822bfbc0 t aldebaran_is_dpm_running +ffffffff822bfc10 t aldebaran_get_thermal_temperature_range +ffffffff822bfcd0 t aldebaran_set_performance_level +ffffffff822bfd70 t aldebaran_get_power_limit +ffffffff822bff00 t aldebaran_set_df_cstate +ffffffff822bff80 t aldebaran_allow_xgmi_power_down +ffffffff822c0010 t aldebaran_i2c_control_init +ffffffff822c00d0 t aldebaran_i2c_control_fini +ffffffff822c0110 t aldebaran_get_unique_id +ffffffff822c01f0 t aldebaran_init_smc_tables +ffffffff822c0380 t aldebaran_set_mp1_state +ffffffff822c03c0 t aldebaran_setup_pptable +ffffffff822c0480 t aldebaran_system_features_control +ffffffff822c05e0 t aldebaran_set_power_limit +ffffffff822c0670 t aldebaran_is_baco_supported +ffffffff822c06a0 t aldebaran_is_mode1_reset_supported +ffffffff822c06d0 t aldebaran_is_mode2_reset_supported +ffffffff822c0700 t aldebaran_mode1_reset +ffffffff822c07e0 t aldebaran_mode2_reset +ffffffff822c0990 t aldebaran_set_soft_freq_limited_range +ffffffff822c0b90 t aldebaran_log_thermal_throttling_event +ffffffff822c0ea0 t aldebaran_get_gpu_metrics +ffffffff822c1130 t aldebaran_smu_handle_passthrough_sbr +ffffffff822c1150 t aldebaran_smu_send_hbm_bad_page_num +ffffffff822c11d0 t aldebaran_get_ecc_info +ffffffff822c1330 t aldebaran_send_hbm_bad_channel_flag +ffffffff822c1410 t aldebaran_get_current_clk_freq_by_table +ffffffff822c1550 t aldebaran_get_smu_metrics_data +ffffffff822c17a0 t aldebaran_upload_dpm_level +ffffffff822c1890 t aldebaran_i2c_xfer +ffffffff822c1b40 t aldebaran_i2c_func +ffffffff822c2000 T smu_v13_0_init_microcode +ffffffff822c21d0 T smu_v13_0_fini_microcode +ffffffff822c2250 T smu_v13_0_load_microcode +ffffffff822c2280 T smu_v13_0_init_pptable_microcode +ffffffff822c2420 T smu_v13_0_get_pptable_from_firmware +ffffffff822c2540 T smu_v13_0_check_fw_status +ffffffff822c25a0 T smu_v13_0_check_fw_version +ffffffff822c26d0 T smu_v13_0_setup_pptable +ffffffff822c2870 T smu_v13_0_init_smc_tables +ffffffff822c29b0 T smu_v13_0_fini_smc_tables +ffffffff822c2ba0 T smu_v13_0_init_power +ffffffff822c2c20 T smu_v13_0_fini_power +ffffffff822c2ca0 T smu_v13_0_get_vbios_bootup_values +ffffffff822c2f40 T smu_v13_0_notify_memory_pool_location +ffffffff822c3000 T smu_v13_0_set_min_deep_sleep_dcefclk +ffffffff822c3080 T smu_v13_0_set_driver_table_location +ffffffff822c30f0 T smu_v13_0_set_tool_table_location +ffffffff822c3160 T smu_v13_0_init_display_count +ffffffff822c31a0 T smu_v13_0_set_allowed_mask +ffffffff822c3270 T smu_v13_0_gfx_off_control +ffffffff822c32e0 T smu_v13_0_system_features_control +ffffffff822c3300 T smu_v13_0_notify_display_change +ffffffff822c3370 T smu_v13_0_init_max_sustainable_clocks +ffffffff822c35e0 t smu_v13_0_get_max_sustainable_clock +ffffffff822c3700 T smu_v13_0_get_current_power_limit +ffffffff822c37d0 T smu_v13_0_set_power_limit +ffffffff822c38f0 T smu_v13_0_enable_thermal_alert +ffffffff822c3970 T smu_v13_0_disable_thermal_alert +ffffffff822c39b0 T smu_v13_0_get_gfx_vdd +ffffffff822c3a70 T smu_v13_0_display_clock_voltage_request +ffffffff822c3bb0 T smu_v13_0_set_hard_freq_limited_range +ffffffff822c3c90 T smu_v13_0_get_fan_control_mode +ffffffff822c3cd0 T smu_v13_0_set_fan_speed_pwm +ffffffff822c3ee0 t smu_v13_0_set_fan_static_mode +ffffffff822c40a0 T smu_v13_0_set_fan_control_mode +ffffffff822c4200 T smu_v13_0_set_fan_speed_rpm +ffffffff822c43b0 T smu_v13_0_set_xgmi_pstate +ffffffff822c43d0 T smu_v13_0_register_irq_handler +ffffffff822c4490 T smu_v13_0_get_max_sustainable_clocks_by_dc +ffffffff822c4520 T smu_v13_0_set_azalia_d3_pme +ffffffff822c4540 T smu_v13_0_wait_for_event +ffffffff822c4590 T smu_v13_0_get_dpm_ultimate_freq +ffffffff822c46e0 T smu_v13_0_set_soft_freq_limited_range +ffffffff822c47c0 T smu_v13_0_set_performance_level +ffffffff822c4f50 T smu_v13_0_set_power_source +ffffffff822c4fb0 T smu_v13_0_set_single_dpm_table +ffffffff822c5240 T smu_v13_0_get_dpm_level_range +ffffffff822c53c0 T smu_v13_0_get_current_pcie_link_width_level +ffffffff822c5410 T smu_v13_0_get_current_pcie_link_width +ffffffff822c5470 T smu_v13_0_get_current_pcie_link_speed_level +ffffffff822c54c0 T smu_v13_0_get_current_pcie_link_speed +ffffffff822c5510 T smu_v13_0_set_vcn_enable +ffffffff822c55c0 T smu_v13_0_set_jpeg_enable +ffffffff822c55e0 T smu_v13_0_run_btc +ffffffff822c5660 T smu_v13_0_deep_sleep_control +ffffffff822c58c0 T smu_v13_0_gfx_ulv_control +ffffffff822c5930 T smu_v13_0_baco_set_armd3_sequence +ffffffff822c5950 T smu_v13_0_baco_is_support +ffffffff822c59c0 T smu_v13_0_baco_get_state +ffffffff822c59f0 T smu_v13_0_baco_set_state +ffffffff822c5ab0 T smu_v13_0_baco_enter +ffffffff822c5bc0 T smu_v13_0_baco_exit +ffffffff822c5c50 T smu_v13_0_set_gfx_power_up_by_imu +ffffffff822c5c80 T smu_v13_0_od_edit_dpm_table +ffffffff822c5f50 T smu_v13_0_set_default_dpm_tables +ffffffff822c5f70 T smu_v13_0_set_smu_mailbox_registers +ffffffff822c5fe0 T smu_v13_0_mode1_reset +ffffffff822c6060 t smu_v13_0_set_irq_state +ffffffff822c65e0 t smu_v13_0_irq_process +ffffffff822c68d0 t orderly_poweroff +ffffffff822c7000 T smu_v13_0_0_set_ppt_funcs +ffffffff822c7050 t smu_v13_0_0_get_allowed_feature_mask +ffffffff822c7190 t smu_v13_0_0_set_default_dpm_table +ffffffff822c7580 t smu_v13_0_0_populate_umd_state_clk +ffffffff822c7680 t smu_v13_0_0_print_clk_levels +ffffffff822c77a0 t smu_v13_0_0_force_clk_levels +ffffffff822c7920 t smu_v13_0_0_get_power_profile_mode +ffffffff822c7b80 t smu_v13_0_0_set_power_profile_mode +ffffffff822c7dd0 t smu_v13_0_0_read_sensor +ffffffff822c7ff0 t smu_v13_0_0_is_dpm_running +ffffffff822c8040 t smu_v13_0_0_get_fan_speed_pwm +ffffffff822c80b0 t smu_v13_0_0_get_fan_speed_rpm +ffffffff822c8120 t smu_v13_0_0_get_thermal_temperature_range +ffffffff822c8210 t smu_v13_0_0_dump_pptable +ffffffff822c8240 t smu_v13_0_0_get_power_limit +ffffffff822c8320 t smu_v13_0_0_set_df_cstate +ffffffff822c8340 t smu_v13_0_0_update_pcie_parameters +ffffffff822c8420 t smu_v13_0_0_i2c_control_init +ffffffff822c8550 t smu_v13_0_0_i2c_control_fini +ffffffff822c8590 t smu_v13_0_0_get_unique_id +ffffffff822c8640 t smu_v13_0_0_init_smc_tables +ffffffff822c8830 t smu_v13_0_0_set_mp1_state +ffffffff822c8870 t smu_v13_0_0_setup_pptable +ffffffff822c89a0 t smu_v13_0_0_system_features_control +ffffffff822c89b0 t smu_v13_0_0_baco_enter +ffffffff822c8a00 t smu_v13_0_0_baco_exit +ffffffff822c8a60 t smu_v13_0_0_is_mode1_reset_supported +ffffffff822c8ab0 t smu_v13_0_0_get_gpu_metrics +ffffffff822c8ed0 t smu_v13_0_0_enable_mgpu_fan_boost +ffffffff822c8f20 t smu_v13_0_0_get_smu_metrics_data +ffffffff822c9290 t smu_v13_0_get_throttler_status +ffffffff822c9450 t smu_v13_0_0_i2c_xfer +ffffffff822c9700 t smu_v13_0_0_i2c_func +ffffffff822ca000 T smu_v13_0_4_set_ppt_funcs +ffffffff822ca090 t smu_v13_0_4_print_clk_levels +ffffffff822ca150 t smu_v13_0_4_force_clk_levels +ffffffff822ca3f0 t smu_v13_0_4_read_sensor +ffffffff822ca6a0 t smu_v13_0_4_is_dpm_running +ffffffff822ca6f0 t smu_v13_0_4_set_watermarks_table +ffffffff822ca880 t smu_v13_0_4_set_performance_level +ffffffff822cadb0 t smu_v13_0_4_init_smc_tables +ffffffff822caf20 t smu_v13_0_4_fini_smc_tables +ffffffff822cafd0 t smu_v13_0_4_system_features_control +ffffffff822cb020 t smu_v13_0_4_mode2_reset +ffffffff822cb040 t smu_v13_0_4_get_dpm_ultimate_freq +ffffffff822cb460 t smu_v13_0_4_get_gpu_metrics +ffffffff822cb630 t smu_v13_0_4_set_fine_grain_gfx_freq_parameters +ffffffff822cb680 t smu_v13_0_4_get_smu_metrics_data +ffffffff822cc000 T smu_v13_0_5_set_ppt_funcs +ffffffff822cc090 t smu_v13_0_5_set_default_dpm_tables +ffffffff822cc0b0 t smu_v13_0_5_print_clk_levels +ffffffff822cc160 t smu_v13_0_5_force_clk_levels +ffffffff822cc2c0 t smu_v13_0_5_od_edit_dpm_table +ffffffff822cc590 t smu_v13_0_5_dpm_set_vcn_enable +ffffffff822cc5b0 t smu_v13_0_5_dpm_set_jpeg_enable +ffffffff822cc5d0 t smu_v13_0_5_read_sensor +ffffffff822cc7f0 t smu_v13_0_5_is_dpm_running +ffffffff822cc840 t smu_v13_0_5_set_watermarks_table +ffffffff822cc9d0 t smu_v13_0_5_set_performance_level +ffffffff822ccbb0 t smu_v13_0_5_init_smc_tables +ffffffff822ccd20 t smu_v13_0_5_fini_smc_tables +ffffffff822ccdd0 t smu_v13_0_5_system_features_control +ffffffff822cce20 t smu_v13_0_5_mode2_reset +ffffffff822ccea0 t smu_v13_0_5_get_dpm_ultimate_freq +ffffffff822cd2e0 t smu_v13_0_5_get_gpu_metrics +ffffffff822cd420 t smu_v13_0_5_set_fine_grain_gfx_freq_parameters +ffffffff822cd470 t smu_v13_0_5_get_smu_metrics_data +ffffffff822ce000 T smu_v13_0_7_set_ppt_funcs +ffffffff822ce050 t smu_v13_0_7_get_allowed_feature_mask +ffffffff822ce1c0 t smu_v13_0_7_set_default_dpm_table +ffffffff822ce5b0 t smu_v13_0_7_populate_umd_state_clk +ffffffff822ce6b0 t smu_v13_0_7_print_clk_levels +ffffffff822ce7d0 t smu_v13_0_7_force_clk_levels +ffffffff822ce950 t smu_v13_0_7_get_power_profile_mode +ffffffff822cec30 t smu_v13_0_7_set_power_profile_mode +ffffffff822cee70 t smu_v13_0_7_read_sensor +ffffffff822cf080 t smu_v13_0_7_is_dpm_running +ffffffff822cf0d0 t smu_v13_0_7_get_fan_speed_pwm +ffffffff822cf140 t smu_v13_0_7_get_fan_speed_rpm +ffffffff822cf1b0 t smu_v13_0_7_get_thermal_temperature_range +ffffffff822cf2a0 t smu_v13_0_7_dump_pptable +ffffffff822cf2d0 t smu_v13_0_7_get_power_limit +ffffffff822cf3b0 t smu_v13_0_7_set_df_cstate +ffffffff822cf3d0 t smu_v13_0_7_update_pcie_parameters +ffffffff822cf4b0 t smu_v13_0_7_init_smc_tables +ffffffff822cf6a0 t smu_v13_0_7_check_fw_status +ffffffff822cf6f0 t smu_v13_0_7_set_mp1_state +ffffffff822cf730 t smu_v13_0_7_setup_pptable +ffffffff822cf890 t smu_v13_0_7_baco_enter +ffffffff822cf8e0 t smu_v13_0_7_baco_exit +ffffffff822cf940 t smu_v13_0_7_is_mode1_reset_supported +ffffffff822cf970 t smu_v13_0_7_get_gpu_metrics +ffffffff822cfd80 t smu_v13_0_7_enable_mgpu_fan_boost +ffffffff822cfdd0 t smu_v13_0_7_get_smu_metrics_data +ffffffff822d0120 t smu_v13_0_7_get_throttler_status +ffffffff822d1000 T yellow_carp_set_ppt_funcs +ffffffff822d1040 t yellow_carp_set_default_dpm_tables +ffffffff822d1060 t yellow_carp_print_clk_levels +ffffffff822d1120 t yellow_carp_force_clk_levels +ffffffff822d13c0 t yellow_carp_od_edit_dpm_table +ffffffff822d1690 t yellow_carp_dpm_set_vcn_enable +ffffffff822d16b0 t yellow_carp_dpm_set_jpeg_enable +ffffffff822d16d0 t yellow_carp_read_sensor +ffffffff822d1a70 t yellow_carp_is_dpm_running +ffffffff822d1ac0 t yellow_carp_set_watermarks_table +ffffffff822d1c50 t yellow_carp_set_performance_level +ffffffff822d2180 t yellow_carp_init_smc_tables +ffffffff822d22f0 t yellow_carp_fini_smc_tables +ffffffff822d23a0 t yellow_carp_system_features_control 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pci_msix_table_unmap +ffffffff822d56f0 T msi_hwmask +ffffffff822d5720 T msi_hwunmask +ffffffff822d5750 T msi_addroute +ffffffff822d5850 T msi_delroute +ffffffff822d58c0 T pci_intr_map_msi +ffffffff822d5940 T msix_hwmask +ffffffff822d5970 T msix_hwunmask +ffffffff822d59a0 T msix_addroute +ffffffff822d5b90 T msix_delroute +ffffffff822d5cf0 T pci_intr_map_msix +ffffffff822d5dc0 T pci_intr_map +ffffffff822d5fd0 T pci_intr_string +ffffffff822d60b0 T pci_intr_establish +ffffffff822d6100 T pci_intr_establish_cpu +ffffffff822d6260 T pci_intr_disestablish +ffffffff822d6270 T pci_init_extents +ffffffff822d6450 T pci_probe_device_hook +ffffffff822d6490 T pci_dev_postattach +ffffffff822d64a0 T pci_min_powerstate +ffffffff822d64b0 T pci_set_powerstate_md +ffffffff822d7000 T pciide_machdep_compat_intr_establish +ffffffff822d7060 T pciide_machdep_compat_intr_disestablish +ffffffff822d8000 T vga_post_init +ffffffff822d8310 t vm86_emu_inb +ffffffff822d8350 t vm86_emu_inw +ffffffff822d8390 t vm86_emu_inl +ffffffff822d83d0 t vm86_emu_outb +ffffffff822d8420 t vm86_emu_outw +ffffffff822d8460 t vm86_emu_outl +ffffffff822d84a0 T vga_post_call +ffffffff822d8510 T vga_post_free +ffffffff822d8580 T ddb_vgapost +ffffffff822d9000 T pchbmatch +ffffffff822d9040 T pchbattach +ffffffff822d94b0 T pchbactivate +ffffffff822d9520 T pchb_amd64ht_attach +ffffffff822d9660 T pchb_rnd +ffffffff822d96e0 T pchb_print +ffffffff822da000 T amas_match +ffffffff822da050 T amas_attach +ffffffff822da0b0 T amas_intl_nodes +ffffffff822da140 T amas_get_pagerange +ffffffff822db000 T agp_flush_cache +ffffffff822db030 T agp_flush_cache_range +ffffffff822db040 T agp_init_map +ffffffff822db100 T agp_destroy_map +ffffffff822db140 T agp_map_subregion +ffffffff822db170 T agp_unmap_subregion +ffffffff822db1a0 T agp_map_atomic +ffffffff822db1d0 T agp_unmap_atomic +ffffffff822dc000 T cardslotmatch +ffffffff822dc050 T cardslotattach +ffffffff822dc2a0 T cardslot_event +ffffffff822dc2f0 T cardslot_cb_print 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rbus_space_alloc_subregion +ffffffff822e1240 T rbus_space_free +ffffffff822e12d0 T rbus_new_body +ffffffff822e1360 T rbus_new_root_delegate +ffffffff822e1420 T rbus_new_root_share +ffffffff822e2000 T com_cardbus_match +ffffffff822e2070 T com_cardbus_attach +ffffffff822e2220 T com_cardbus_detach +ffffffff822e22b0 T com_cardbus_find_csdev +ffffffff822e2420 T com_cardbus_gofigure +ffffffff822e28d0 T com_cardbus_enable +ffffffff822e29a0 T com_cardbus_disable +ffffffff822e29f0 T com_cardbus_setup +ffffffff822e3000 T xl_cardbus_match +ffffffff822e3090 T xl_cardbus_attach +ffffffff822e3420 T xl_cardbus_detach +ffffffff822e34d0 T xl_cardbus_lookup +ffffffff822e3580 T xl_cardbus_intr_ack +ffffffff822e4000 T dc_cardbus_match +ffffffff822e4020 T dc_cardbus_attach +ffffffff822e43b0 T dc_cardbus_detach +ffffffff822e4440 T dc_cardbus_setup +ffffffff822e5000 T fxp_cardbus_match +ffffffff822e5020 T fxp_cardbus_attach +ffffffff822e5230 T fxp_cardbus_detach +ffffffff822e52c0 T fxp_cardbus_setup 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atw_cardbus_match +ffffffff822ea020 T atw_cardbus_attach +ffffffff822ea210 T atw_cardbus_detach +ffffffff822ea2d0 T atw_cardbus_enable +ffffffff822ea3a0 T atw_cardbus_disable +ffffffff822ea3f0 T atw_cardbus_power +ffffffff822ea420 T atw_cardbus_setup +ffffffff822eb000 T rtw_cardbus_match +ffffffff822eb020 T rtw_cardbus_attach +ffffffff822eb260 T rtw_cardbus_detach +ffffffff822eb380 T rtw_cardbus_intr_ack +ffffffff822eb3a0 T rtw_cardbus_funcregen +ffffffff822eb400 T rtw_cardbus_enable +ffffffff822eb550 T rtw_cardbus_disable +ffffffff822eb630 T rtw_cardbus_power +ffffffff822eb660 T rtw_cardbus_setup +ffffffff822ec000 T ral_cardbus_match +ffffffff822ec020 T ral_cardbus_attach +ffffffff822ec220 T ral_cardbus_detach +ffffffff822ec2d0 T ral_cardbus_activate +ffffffff822ec350 T ral_cardbus_enable +ffffffff822ec4b0 T ral_cardbus_disable +ffffffff822ec500 T ral_cardbus_setup +ffffffff822ec5a0 T ral_cardbus_wakeup +ffffffff822ed000 T acx_cardbus_match +ffffffff822ed020 T acx_cardbus_attach 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malo_cardbus_disable +ffffffff822f24f0 T malo_cardbus_setup +ffffffff822f3000 T bwi_cardbus_match +ffffffff822f3020 T bwi_cardbus_attach +ffffffff822f3290 T bwi_cardbus_detach +ffffffff822f3330 T bwi_cardbus_enable +ffffffff822f3480 T bwi_cardbus_disable +ffffffff822f34d0 T bwi_cardbus_setup +ffffffff822f3570 T bwi_cardbus_conf_read +ffffffff822f3590 T bwi_cardbus_conf_write +ffffffff822f4000 T rbus_pccbb_parent_mem +ffffffff822f4050 T rbus_pccbb_parent_io +ffffffff822f40c0 T pccbb_attach_hook +ffffffff822f5000 T pcmcia_match +ffffffff822f5050 T pcmcia_attach +ffffffff822f50d0 T pcmcia_activate +ffffffff822f5180 T pcmcia_ccr_read +ffffffff822f51d0 T pcmcia_ccr_write +ffffffff822f5230 T pcmcia_card_attach +ffffffff822f5430 T pcmcia_print +ffffffff822f5690 T pcmcia_submatch +ffffffff822f56e0 T pcmcia_card_detach +ffffffff822f5790 T pcmcia_card_deactivate +ffffffff822f57f0 T pcmcia_card_gettype +ffffffff822f5850 T pcmcia_function_init +ffffffff822f58a0 T pcmcia_function_enable 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ne_pcmcia_ax88190_set_iobase +ffffffff822fe000 T aic_pcmcia_match +ffffffff822fe0b0 T aic_pcmcia_attach +ffffffff822fe2a0 T aic_pcmcia_detach +ffffffff822ff000 T com_pcmcia_match +ffffffff822ff210 T com_pcmcia_attach +ffffffff822ff4f0 T com_pcmcia_detach +ffffffff822ff580 T com_pcmcia_activate +ffffffff822ff630 T com_pcmcia_enable1 +ffffffff822ff6d0 T com_pcmcia_enable +ffffffff822ff7c0 T com_pcmcia_disable +ffffffff822ff800 T com_pcmcia_disable1 +ffffffff82300000 t wdc_pcmcia_match +ffffffff823000d0 t wdc_pcmcia_attach +ffffffff82300540 T wdc_pcmcia_detach +ffffffff82300640 T wdc_pcmcia_activate +ffffffff82300760 T wdc_pcmcia_disk_device_interface_callback +ffffffff82300800 T wdc_pcmcia_disk_device_interface +ffffffff82300860 T wdc_pcmcia_lookup +ffffffff82301000 T sm_pcmcia_match +ffffffff82301100 T sm_pcmcia_attach +ffffffff82301320 T sm_pcmcia_detach +ffffffff823013c0 T sm_pcmcia_activate +ffffffff82301440 T sm_pcmcia_funce_enaddr +ffffffff82301460 T sm_pcmcia_ascii_enaddr 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hme_start +ffffffff82311a90 T hme_ioctl +ffffffff82311c40 T hme_watchdog +ffffffff82311ca0 t hme_mii_readreg +ffffffff82311e20 t hme_mii_writereg +ffffffff82311fa0 t hme_mii_statchg +ffffffff82312020 T hme_mediachange +ffffffff82312110 T hme_mediastatus +ffffffff82312180 T hme_mifinit +ffffffff82312240 T hme_tick +ffffffff82312360 T hme_unconfig +ffffffff82312450 T hme_fill_rx_ring +ffffffff823125f0 T hme_reset +ffffffff82312620 T hme_init +ffffffff82312b60 T hme_meminit +ffffffff82312ce0 T hme_iff +ffffffff82312e90 T hme_tint +ffffffff82312fe0 T hme_rint +ffffffff823131b0 T hme_eint +ffffffff82313250 T hme_intr +ffffffff82313350 T hme_newbuf +ffffffff82314000 T hmematch_pci +ffffffff82314030 T hmeattach_pci +ffffffff823142f0 T hmedetach_pci +ffffffff82314360 T hme_pci_enaddr +ffffffff82315000 T isamatch +ffffffff82315050 T isaattach +ffffffff82315180 T isascan +ffffffff82315590 T isaprint +ffffffff82315750 T isa_intr_typename +ffffffff82316000 T isadmamatch +ffffffff82316040 T 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fdattach +ffffffff823192c0 T fdactivate +ffffffff82319360 T fdgetdisklabel +ffffffff82319470 T fdstrategy +ffffffff823196a0 T fd_motor_on +ffffffff82319700 T fd_motor_off +ffffffff823197d0 T fdtimeout +ffffffff82319850 T fd_nvtotype +ffffffff823198c0 T fdstart +ffffffff82319970 T fdfinish +ffffffff82319ab0 T fdread +ffffffff82319ae0 T fdwrite +ffffffff82319b10 T fd_set_motor +ffffffff82319bd0 T fdintr +ffffffff8231a940 T fdopen +ffffffff8231ab80 T fdclose +ffffffff8231ac10 T fdsize +ffffffff8231ac40 T fddump +ffffffff8231ac70 T fdretry +ffffffff8231ae10 T fdioctl +ffffffff8231b2c0 T fdformat +ffffffff8231c000 T com_isa_probe +ffffffff8231c0c0 T com_isa_attach +ffffffff8231d000 T pckbc_isa_match +ffffffff8231d1e0 T pckbc_isa_attach +ffffffff8231d390 T pckbc_isa_activate +ffffffff8231e000 T vga_isa_match +ffffffff8231e0e0 T vga_isa_attach +ffffffff8231e120 T vga_isa_cnattach +ffffffff8231f000 T wdc_isa_probe +ffffffff8231f130 T wdc_isa_attach +ffffffff8231f350 t wdc_isa_dma_init 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isa_intr_alloc +ffffffff8232d850 T isa_intr_check +ffffffff8232d8c0 T isa_intr_establish +ffffffff8232d990 T isa_intr_disestablish +ffffffff8232d9a0 T isa_attach_hook +ffffffff8232d9f0 T _isa_dma_alloc_bouncebuf +ffffffff8232dad0 T _isa_dma_free_bouncebuf +ffffffff8232db80 T _isa_dma_check_buffer +ffffffff8232e000 T wsdisplay_emul_match +ffffffff8232e070 T wsdisplay_emul_attach +ffffffff8232e140 T wsdisplay_emul_detach +ffffffff8232e150 T wsdisplay_activate +ffffffff8232e1d0 T wsdisplay_getc_dummy +ffffffff8232e200 T wsdisplay_cnputc +ffffffff8232e280 T wsdisplay_pollc +ffffffff8232e310 T wsscreen_attach +ffffffff8232e4a0 T wsdisplay_emulbell_task +ffffffff8232e530 T wsscreen_detach +ffffffff8232e5e0 T wsdisplay_screentype_pick +ffffffff8232e6a0 T wsdisplay_addscreen_print +ffffffff8232e720 T wsdisplay_addscreen +ffffffff8232e910 T allocate_copybuffer +ffffffff8232ea40 T wsdisplay_getscreen +ffffffff8232eaf0 T wsdisplay_closescreen +ffffffff8232ec50 T wsdisplayopen +ffffffff8232ee10 T wsdisplay_delscreen +ffffffff8232efd0 T wsdisplay_update_rawkbd +ffffffff8232f0c0 T wsdisplay_common_attach +ffffffff8232f460 T wsdisplay_common_detach +ffffffff8232f690 T wsdisplay_switchtoconsole +ffffffff8232f700 T wsemuldisplaydevprint +ffffffff8232f750 T wsemuldisplaydevsubmatch +ffffffff8232f7a0 T wsdisplay_burner +ffffffff8232f870 T wsdisplay_burn +ffffffff8232f8e0 T wsdisplay_cnattach +ffffffff8232fa30 T wsdisplaystart +ffffffff8232fd10 T wsdisplayparam +ffffffff8232fd50 T wsdisplayclose +ffffffff8232fed0 T wsdisplay_kbdholdscr +ffffffff8232ff20 T wsdisplay_internal_ioctl +ffffffff82330670 T wsdisplayread +ffffffff823306f0 T wsdisplaywrite +ffffffff82330770 T wsdisplaytty +ffffffff823307e0 T wsdisplayioctl +ffffffff82330980 T wsdisplay_cfg_ioctl +ffffffff82330d00 T wsdisplay_param +ffffffff82330dd0 T wsdisplay_driver_ioctl +ffffffff82330ea0 T wsdisplay_burner_setup +ffffffff82330ff0 T wsdisplay_switch +ffffffff82331280 T wsmoused +ffffffff82331390 T wsdisplaymmap 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wsdisplay_suspend_device +ffffffff82332480 T wsdisplay_resume +ffffffff82332560 T wsdisplay_resume_device +ffffffff82332600 T wsscrollback +ffffffff82332680 T wsdisplay_get_param +ffffffff823327c0 T wsdisplay_set_param +ffffffff823328c0 T wsdisplay_brightness_step +ffffffff82332a50 T wsdisplay_brightness_zero +ffffffff82332b60 T wsdisplay_brightness_cycle +ffffffff82332bd0 T motion_event +ffffffff82332c80 T button_event +ffffffff82332e00 T ctrl_event +ffffffff82333010 T mouse_moverel +ffffffff82333140 T mouse_zaxis +ffffffff823331d0 T mouse_copy_end +ffffffff82333240 T mouse_copy_selection +ffffffff82333380 T mouse_copy_start +ffffffff823334f0 T mouse_copy_word +ffffffff82333820 T mouse_copy_line +ffffffff82333970 T mouse_paste +ffffffff82333a10 T mouse_copy_extend_after +ffffffff82333b10 T mouse_copy_extend +ffffffff82333b90 T inverse_char +ffffffff82333c90 T inverse_region +ffffffff82333d00 T skip_spc_right +ffffffff82333df0 T skip_spc_left +ffffffff82333ec0 T skip_char_right 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wsmux_add_mux +ffffffff82346340 T wsmux_detach_sc_locked +ffffffff82346430 T wsmuxkqfilter +ffffffff82346490 T wsmux_depth +ffffffff82346530 T wsmux_attach_sc +ffffffff823466f0 T wsmux_set_display +ffffffff82346820 T wsmux_get_layout +ffffffff82346850 T wsmux_set_layout +ffffffff82347000 T wsemul_pick +ffffffff82347060 T wsemul_getname +ffffffff82348000 T wsemul_getchar +ffffffff823481b0 T wsemul_local_translate +ffffffff82348480 T wsemul_utf8_translate +ffffffff82349000 T wsemul_vt100_cnattach +ffffffff823491e0 T wsemul_vt100_attach +ffffffff82349490 T wsemul_vt100_output +ffffffff82349750 T wsemul_vt100_detach +ffffffff823498a0 T wsemul_vt100_resetop +ffffffff82349a30 T wsemul_vt100_output_esc +ffffffff8234a040 T wsemul_vt100_output_csi +ffffffff8234a160 T wsemul_vt100_output_scs94 +ffffffff8234a210 T wsemul_vt100_output_scs94_percent +ffffffff8234a260 T wsemul_vt100_output_scs96 +ffffffff8234a3b0 T wsemul_vt100_output_scs96_percent +ffffffff8234a400 T wsemul_vt100_output_esc_hash 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wsemul_vt100_translate +ffffffff82350000 T pckbdprobe +ffffffff82350120 T pckbdattach +ffffffff82350300 T pckbdactivate +ffffffff82350380 T pckbd_enable +ffffffff823504d0 T pckbd_set_leds +ffffffff82350560 T pckbd_ioctl +ffffffff823506a0 T pckbd_cngetc +ffffffff82350870 T pckbd_cnpollc +ffffffff82350900 T pckbd_cnbell +ffffffff82350950 T pckbd_set_xtscancode +ffffffff82350ac0 T pckbd_init +ffffffff82350b20 T pckbd_input +ffffffff82350d90 T pckbd_scancode_translate +ffffffff82350e50 T pckbd_bell +ffffffff82350ea0 T pckbd_hookup_bell +ffffffff82350ee0 T pckbd_cnattach +ffffffff82351000 T pmsprobe +ffffffff823510a0 T pmsattach +ffffffff82351270 T pmsactivate +ffffffff823512d0 T pms_enable +ffffffff82351340 T pms_ioctl +ffffffff82351390 T pms_disable +ffffffff823513d0 T pms_sec_enable +ffffffff82351440 T pms_sec_ioctl +ffffffff82351480 T pms_sec_disable +ffffffff823514c0 T pms_ioctl_mouse +ffffffff823515e0 T pms_sync_mouse +ffffffff82351640 T pms_proc_mouse +ffffffff823516e0 T pms_enable_synaptics +ffffffff82351b10 T pms_ioctl_synaptics +ffffffff82351be0 T pms_sync_synaptics +ffffffff82351c40 T pms_proc_synaptics +ffffffff82351f90 T pms_disable_synaptics +ffffffff82352070 T pms_enable_alps +ffffffff82352af0 T pms_ioctl_alps +ffffffff82352ba0 T pms_sync_alps +ffffffff82352c40 T pms_proc_alps +ffffffff82352e90 T pms_enable_elantech_v1 +ffffffff82353090 T pms_ioctl_elantech +ffffffff82353150 T pms_sync_elantech_v1 +ffffffff82353230 T pms_proc_elantech_v1 +ffffffff823533a0 T pms_enable_elantech_v2 +ffffffff82353540 T pms_sync_elantech_v2 +ffffffff82353630 T pms_proc_elantech_v2 +ffffffff82353790 T pms_enable_elantech_v3 +ffffffff82353930 T pms_sync_elantech_v3 +ffffffff823539b0 T pms_proc_elantech_v3 +ffffffff82353b90 T pms_enable_elantech_v4 +ffffffff82353d90 T pms_sync_elantech_v4 +ffffffff82353e60 T pms_proc_elantech_v4 +ffffffff82354190 T pms_enable_intelli +ffffffff82354380 T pms_cmd +ffffffff823543f0 T pms_spec_cmd +ffffffff82354650 T pms_set_scaling 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T nvramread +ffffffff8235c2c0 T nvram_get_byte +ffffffff8235d000 T hid_start_parse +ffffffff8235d070 T hid_end_parse +ffffffff8235d0b0 T hid_get_item +ffffffff8235dc60 T hid_report_size +ffffffff8235dda0 T hid_locate +ffffffff8235df10 T hid_get_data_sub +ffffffff8235e030 T hid_get_data +ffffffff8235e140 T hid_get_udata +ffffffff8235e250 T hid_is_collection +ffffffff8235f000 T hidkbd_attach +ffffffff8235f0f0 T hidkbd_parse_desc +ffffffff8235f450 T hidkbd_delayed_decode +ffffffff8235f470 T hidkbd_attach_wskbd +ffffffff8235f4f0 T hidkbd_detach +ffffffff8235f590 T hidkbd_translate +ffffffff8235f5e0 T hidkbd_apple_translate +ffffffff8235f670 T hidkbd_apple_munge +ffffffff8235f7c0 T hidkbd_apple_tb_munge +ffffffff8235f9a0 T hidkbd_apple_iso_munge +ffffffff8235fbd0 T hidkbd_apple_mba_munge +ffffffff8235fd20 T hidkbd_apple_iso_mba_munge +ffffffff8235ff50 T hidkbd_input +ffffffff82360040 T hidkbd_decode +ffffffff823603b0 T hidkbd_enable +ffffffff823603f0 T hidkbd_set_leds +ffffffff823604d0 T hidkbd_ioctl +ffffffff82360570 T hidkbd_bell +ffffffff823605c0 T hidkbd_cngetc +ffffffff82360650 T hidkbd_hookup_bell +ffffffff82361000 T hidms_setup +ffffffff823615c0 T hidms_attach +ffffffff82361700 T hidms_detach +ffffffff82361740 T hidms_input +ffffffff823619f0 T hidms_enable +ffffffff82361a30 T hidms_ioctl +ffffffff82361c00 T hidms_disable +ffffffff82362000 T hidmt_get_resolution +ffffffff82362110 T hidmt_setup +ffffffff82362740 T hidmt_set_input_mode +ffffffff823627d0 T hidmt_configure +ffffffff82362870 T hidmt_attach +ffffffff82362980 T hidmt_detach +ffffffff823629c0 T hidmt_input +ffffffff82362eb0 T hidmt_enable +ffffffff82362ef0 T hidmt_ioctl +ffffffff82362fc0 T hidmt_disable +ffffffff82363000 T hidcc_match +ffffffff823630d0 T hidcc_attach +ffffffff82363270 T hidcc_parse +ffffffff82363610 T hidcc_attach_wskbd +ffffffff823636c0 T hidcc_detach +ffffffff82363760 T hidcc_intr +ffffffff82363b30 T hidcc_intr_slice +ffffffff82363c20 T hidcc_setbits +ffffffff82363e60 T hidcc_rawinput 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umb_command_done +ffffffff8244e5f0 T umb_decode_cid +ffffffff8244e940 T umb_decode_register_state +ffffffff8244eb80 T umb_decode_devices_caps +ffffffff8244ed20 T umb_decode_subscriber_status +ffffffff8244ef90 T umb_decode_radio_state +ffffffff8244f070 T umb_decode_pin +ffffffff8244f1b0 T umb_decode_packet_service +ffffffff8244f5a0 T umb_decode_signal_state +ffffffff8244f660 T umb_decode_connect_info +ffffffff8244f7b0 T umb_add_inet_config +ffffffff8244fa70 T umb_add_inet6_config +ffffffff8244fde0 T umb_decode_ip_configuration +ffffffff82450620 T umb_rxeof +ffffffff82450750 T umb_decap +ffffffff824509f0 T umb_txeof +ffffffff82450a90 T umb_send_encap_command +ffffffff82450b70 T umb_ctrl_msg +ffffffff82450e40 T umb_cmd1 +ffffffff82450f40 T umb_send_connect +ffffffff82451110 T umb_decode_qmi +ffffffff82452000 T uath_match +ffffffff82452070 T uath_attach +ffffffff82452810 T uath_detach +ffffffff82452a10 T uath_attachhook +ffffffff82452af0 T uath_loadfirmware +ffffffff82452e00 T uath_open_pipes +ffffffff82452f90 T uath_task +ffffffff82453410 T uath_next_scan +ffffffff82453450 T uath_stat +ffffffff824534c0 T uath_alloc_tx_cmd_list +ffffffff82453580 T uath_alloc_rx_cmd_list +ffffffff82453640 T uath_cmd_rxeof +ffffffff82453760 T uath_reset +ffffffff824538d0 T uath_query_eeprom +ffffffff82453a30 T uath_alloc_tx_data_list +ffffffff82453af0 T uath_alloc_rx_data_list +ffffffff82453c20 T uath_ioctl +ffffffff82453d00 T uath_start +ffffffff82453eb0 T uath_watchdog +ffffffff82453f30 T uath_newstate +ffffffff82453fd0 T uath_media_change +ffffffff82454030 T uath_close_pipes +ffffffff824540d0 T uath_free_tx_data_list +ffffffff824541e0 T uath_free_rx_cmd_list +ffffffff82454230 T uath_free_tx_cmd_list +ffffffff82454340 T uath_free_rx_data_list +ffffffff824543b0 T uath_init +ffffffff82454b00 T uath_cmd_write +ffffffff82454b20 T uath_set_led +ffffffff82454b80 T uath_switch_channel +ffffffff82454cb0 T uath_set_rates +ffffffff82454d50 T uath_cmd +ffffffff82454f60 T uath_cmd_read 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athn_usb_free_tx_cmd +ffffffff824579e0 T athn_usb_free_tx_list +ffffffff82457b10 T athn_usb_free_rx_list +ffffffff82457b60 T athn_usb_load_firmware +ffffffff82457d50 T athn_usb_htc_setup +ffffffff82458090 T athn_usb_ioctl +ffffffff82458240 T athn_usb_start +ffffffff824583c0 T athn_usb_watchdog +ffffffff82458440 T athn_usb_node_alloc +ffffffff82458460 T athn_usb_newauth +ffffffff82458630 T athn_usb_newassoc +ffffffff82458760 T athn_usb_node_free +ffffffff82458850 T athn_usb_updateslot +ffffffff82458880 T athn_usb_updateedca +ffffffff82458940 T athn_usb_set_key +ffffffff82458a80 T athn_usb_delete_key +ffffffff82458bd0 T athn_usb_newstate +ffffffff82458cd0 T athn_usb_media_change +ffffffff82458d50 T athn_usb_next_scan +ffffffff82458df0 T athn_usb_rx_enable +ffffffff82458e60 T athn_usb_intr +ffffffff82458ff0 T athn_usb_alloc_rx_list +ffffffff824590a0 T athn_usb_alloc_tx_list +ffffffff82459190 T athn_usb_do_async +ffffffff824592b0 T athn_usb_htc_msg +ffffffff82459340 T athn_usb_htc_connect_svc +ffffffff82459510 T athn_usb_wmi_xcmd +ffffffff82459730 T athn_usb_read_rom +ffffffff82459890 T athn_usb_stop +ffffffff82459ba0 T athn_usb_init +ffffffff82459ff0 T athn_usb_newstate_cb +ffffffff8245a2e0 T athn_usb_remove_node +ffffffff8245a3d0 T athn_usb_switch_chan +ffffffff8245a5b0 T athn_usb_create_node +ffffffff8245a820 T athn_usb_newassoc_cb +ffffffff8245a9b0 T athn_usb_node_set_rates +ffffffff8245aae0 T athn_usb_count_active_sta +ffffffff8245ab30 T athn_usb_newauth_cb +ffffffff8245ac10 T athn_usb_node_free_cb +ffffffff8245acd0 T athn_usb_ampdu_tx_start +ffffffff8245add0 T athn_usb_ampdu_tx_start_cb +ffffffff8245ae30 T athn_usb_ampdu_tx_stop +ffffffff8245af10 T athn_usb_ampdu_tx_stop_cb +ffffffff8245af70 T athn_usb_clean_nodes +ffffffff8245b030 T athn_usb_updateedca_cb +ffffffff8245b070 T athn_usb_updateslot_cb +ffffffff8245b0b0 T athn_usb_set_key_cb +ffffffff8245b170 T athn_usb_delete_key_cb +ffffffff8245b1d0 T athn_usb_bcneof +ffffffff8245b230 T athn_usb_swba +ffffffff8245b390 T athn_usb_tx_status +ffffffff8245b400 T athn_usb_rx_wmi_ctrl +ffffffff8245b620 T athn_usb_rx_radiotap +ffffffff8245b7f0 T athn_usb_rx_frame +ffffffff8245ba60 T athn_usb_rxeof +ffffffff8245bd80 T athn_usb_txeof +ffffffff8245be40 T athn_usb_tx +ffffffff8245d000 T uow_match +ffffffff8245d070 T uow_attach +ffffffff8245d520 T uow_detach +ffffffff8245d5f0 T uow_activate +ffffffff8245d660 T uow_intr +ffffffff8245d6b0 T uow_reset +ffffffff8245d6d0 T uow_ow_reset +ffffffff8245d720 T uow_ow_bit +ffffffff8245d7a0 T uow_ow_read_byte +ffffffff8245d820 T uow_ow_write_byte +ffffffff8245d880 T uow_ow_read_block +ffffffff8245d910 T uow_ow_write_block +ffffffff8245d980 T uow_ow_matchrom +ffffffff8245da50 T uow_cmd +ffffffff8245db90 T uow_read +ffffffff8245dc90 T uow_write +ffffffff8245dd70 T uow_ow_search +ffffffff8245e000 T uberry_match +ffffffff8245e070 T uberry_attach +ffffffff8245e1e0 T uberry_detach +ffffffff8245e210 T uberry_charge +ffffffff8245e2c0 T uberry_pearlmode +ffffffff8245f000 T upd_match +ffffffff8245f140 T upd_attach +ffffffff8245f3c0 T upd_detach +ffffffff8245f4a0 T upd_lookup_usage_entry +ffffffff8245f560 T upd_intr +ffffffff8245f590 T upd_attach_sensor_tree +ffffffff8245f850 T upd_refresh +ffffffff8245f970 T upd_request_children +ffffffff8245fa90 T upd_update_report_cb +ffffffff8245fbb0 T upd_lookup_sensor +ffffffff8245fc20 T upd_sensor_invalidate +ffffffff8245fca0 T upd_sensor_update +ffffffff82460000 T uwacom_match +ffffffff824600b0 T uwacom_attach +ffffffff824602b0 T uwacom_detach +ffffffff824602c0 T uwacom_enable +ffffffff82460320 T uwacom_ioctl +ffffffff824603c0 T uwacom_disable +ffffffff824603f0 T uwacom_intr +ffffffff82461000 T bwfm_usb_preinit +ffffffff82461500 T bwfm_usb_txcheck +ffffffff82461540 T bwfm_usb_txdata +ffffffff82461680 T bwfm_usb_txctl +ffffffff82461830 T bwfm_usb_match +ffffffff824618a0 T bwfm_usb_attach +ffffffff82461a30 T bwfm_usb_detach +ffffffff82461b10 T bwfm_usb_dl_cmd +ffffffff82461bb0 T bwfm_usb_load_microcode +ffffffff82461f20 T bwfm_usb_alloc_rx_list +ffffffff82462010 T bwfm_usb_alloc_tx_list +ffffffff82462130 T bwfm_usb_rxeof +ffffffff824622e0 T bwfm_usb_free_rx_list +ffffffff82462350 T bwfm_usb_free_tx_list +ffffffff824623c0 T bwfm_usb_newbuf +ffffffff82462440 T bwfm_usb_txeof +ffffffff82462550 T bwfm_usb_txctl_cb +ffffffff82463000 T umstc_match +ffffffff824630b0 T umstc_attach +ffffffff824631b0 T umstc_detach +ffffffff82463200 T umstc_intr +ffffffff82463340 T umstc_brightness_task +ffffffff82464000 T uhidpp_match +ffffffff824640d0 T uhidpp_attach +ffffffff82464440 T uhidpp_detach +ffffffff82464680 T uhidpp_intr +ffffffff824647b0 T uhidpp_task +ffffffff82464850 T hidpp10_get_type +ffffffff82464940 T hidpp10_get_name +ffffffff82464a30 T hidpp10_enable_notifications +ffffffff82464a90 T uhidpp_is_notification +ffffffff82464b10 T uhidpp_claim_notification +ffffffff82464c30 T uhidpp_refresh +ffffffff82464d00 T uhidpp_device_refresh +ffffffff82464db0 T uhidpp_consume_notification +ffffffff82464ef0 T uhidpp_device_connect +ffffffff82465350 T uhidpp_sleep +ffffffff82465380 T hidpp_get_protocol_version +ffffffff82465440 T uhidpp_device_features +ffffffff82465610 T hidpp20_battery_get_capability +ffffffff824656c0 T hidpp20_unified_battery_get_capabilities +ffffffff824657a0 T hidpp20_battery_get_level_status +ffffffff824658d0 T hidpp20_unified_battery_get_status +ffffffff824659f0 T hidpp20_root_get_feature +ffffffff82465aa0 T hidpp20_feature_get_count +ffffffff82465b40 T hidpp20_feature_get_id +ffffffff82465bf0 T hidpp_send_fap_report +ffffffff82465cd0 T hidpp_send_rap_report +ffffffff82465d80 T hidpp20_battery_status_is_charging +ffffffff82465db0 T hidpp20_unified_battery_status_is_charging +ffffffff82465de0 T hidpp_send_validate +ffffffff82465e30 T hidpp_send_report +ffffffff82467000 T ucc_match +ffffffff82467090 T ucc_attach +ffffffff824671a0 T ucc_detach +ffffffff82467200 T ucc_intr +ffffffff82467240 T ucc_enable +ffffffff82468000 T iic_match +ffffffff82468050 T iic_attach +ffffffff824680c0 T iicbus_print +ffffffff82468110 T iic_print +ffffffff82468170 T iic_search +ffffffff82468240 T iic_is_compatible +ffffffff82469000 T iic_exec +ffffffff82469220 T iic_smbus_write_byte +ffffffff82469320 T iic_smbus_read_byte +ffffffff82469380 T iic_smbus_receive_byte +ffffffff8246a000 T iicprobeinit +ffffffff8246a030 T iicprobenc +ffffffff8246a0e0 T iicprobew +ffffffff8246a190 T iicprobe +ffffffff8246a250 T lm75probe +ffffffff8246b770 T adm1032cloneprobe +ffffffff8246baf0 T iic_ignore_addr +ffffffff8246bba0 T iic_dump +ffffffff8246c050 T iic_probe_sensor +ffffffff82475d70 T iic_probe_eeprom +ffffffff82475e30 T iic_scan +ffffffff82477000 T i2c_wait_for_scl +ffffffff824770f0 T i2c_bitbang_send_stop +ffffffff82477170 T i2c_bitbang_send_start +ffffffff824772d0 T i2c_bitbang_initiate_xfer +ffffffff82477360 T i2c_bitbang_write_byte +ffffffff82477600 T i2c_bitbang_read_byte +ffffffff82478000 T lmtemp_match +ffffffff824780b0 T lmtemp_attach +ffffffff824782f0 T lmtemp_refresh_sensor_data +ffffffff824783d0 T lmtemp_temp_read +ffffffff82479000 T lmn_match +ffffffff82479050 T lmn_attach +ffffffff82479180 T lmn_refresh +ffffffff8247a000 T lmenv_match +ffffffff8247a0b0 T lmenv_attach +ffffffff8247a5f0 T lmenv_refresh +ffffffff8247b000 T maxtmp_match +ffffffff8247b150 T maxtmp_attach +ffffffff8247b2e0 T maxtmp_refresh +ffffffff8247b340 T maxtmp_readport +ffffffff8247c000 T adc_match +ffffffff8247c070 T adc_attach +ffffffff8247c320 T adc_refresh +ffffffff8247d000 T admtemp_match +ffffffff8247d110 T admtemp_attach +ffffffff8247d410 T admtemp_refresh +ffffffff8247e000 T admlc_match +ffffffff8247e050 T admlc_attach +ffffffff8247e3f0 T admlc_refresh +ffffffff8247f000 T admtm_match +ffffffff8247f090 T admtm_attach +ffffffff8247f400 T admtm_refresh +ffffffff82480000 T admtmp_match +ffffffff82480050 T admtmp_attach +ffffffff824801b0 T admtmp_refresh +ffffffff82481000 T admtt_match +ffffffff82481050 T admtt_attach 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nvt_refresh_fans +ffffffff82488000 T adl_match +ffffffff82488050 T adl_attach +ffffffff824881e0 T adl_refresh +ffffffff82489000 T andl_match +ffffffff82489050 T andl_attach +ffffffff824892e0 T andl_refresh +ffffffff82489360 T andl_refresh_temps +ffffffff824894a0 T andl_refresh_volts +ffffffff82489670 T andl_refresh_tachs +ffffffff82489780 T andl_readreg +ffffffff824897e0 T andl_writereg +ffffffff8248a000 T spdmem_iic_match +ffffffff8248a0a0 T spdmem_iic_attach +ffffffff8248a0f0 T spdmem_iic_read +ffffffff8248b000 T sdtemp_match +ffffffff8248b290 T sdtemp_attach +ffffffff8248b340 T sdtemp_refresh +ffffffff8248c000 T lisa_match +ffffffff8248c050 T lisa_attach +ffffffff8248c180 T lisa_refresh +ffffffff8248c290 T lisa_readreg +ffffffff8248c2f0 T lisa_writereg +ffffffff8248d000 T ihidev_match +ffffffff8248d050 T ihidev_attach +ffffffff8248d540 T ihidev_detach +ffffffff8248d5e0 T ihidev_activate +ffffffff8248d720 T ihidev_hid_command +ffffffff8248db00 T ihidev_hid_desc_parse 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acpisony_match +ffffffff824cf070 T acpisony_attach +ffffffff824cf0d0 T acpisony_activate +ffffffff824cf110 T acpisony_notify_setup +ffffffff824cf300 T acpisony_notify +ffffffff824cf6a0 T acpisony_find_offset +ffffffff824cf7b0 T acpisony_set_hotkey +ffffffff824cf9a0 T acpisony_brightness_down +ffffffff824cfab0 T acpisony_get_brightness +ffffffff824cfb30 T acpisony_set_brightness +ffffffff824d0000 T acpivideo_match +ffffffff824d0070 T acpivideo_attach +ffffffff824d01d0 T acpivideo_getpcibus +ffffffff824d0210 T acpivideo_notify +ffffffff824d0270 T acpivideo_set_policy +ffffffff824d0330 T acpi_foundvout +ffffffff824d0400 T acpivideo_print +ffffffff824d1000 T acpivout_match +ffffffff824d1070 T acpivout_attach +ffffffff824d11c0 T acpivout_notify +ffffffff824d1270 T acpivout_get_bcl +ffffffff824d1390 T acpivout_get_brightness +ffffffff824d1430 T acpivout_get_param +ffffffff824d14e0 T acpivout_set_param +ffffffff824d1650 T acpivout_select_brightness +ffffffff824d1720 T acpivout_find_brightness +ffffffff824d17b0 T acpivout_set_brightness +ffffffff824d2000 T acpipwrres_match +ffffffff824d2070 T acpipwrres_attach +ffffffff824d22b0 T acpipwrres_foundcons +ffffffff824d2430 T acpipwrres_ref_incr +ffffffff824d2520 T acpipwrres_hascons +ffffffff824d2570 T acpipwrres_ref_decr +ffffffff824d2660 T acpipwrres_addcons +ffffffff824d3000 T aibs_match +ffffffff824d3020 T aibs_attach +ffffffff824d3130 T aibs_probe +ffffffff824d3290 T aibs_attach_new +ffffffff824d33b0 T aibs_attach_sif +ffffffff824d3580 T aibs_notify +ffffffff824d35f0 T aibs_add_sensor +ffffffff824d3840 T aibs_getpack +ffffffff824d38b0 T aibs_refresh +ffffffff824d3910 T aibs_refresh_r +ffffffff824d3a50 T aibs_getvalue +ffffffff824d3ba0 T aibs_find_cb +ffffffff824d4000 T aplgpio_match +ffffffff824d4060 T aplgpio_attach +ffffffff824d4300 T aplgpio_intr +ffffffff824d4430 T aplgpio_read_pin +ffffffff824d4480 T aplgpio_write_pin +ffffffff824d44f0 T aplgpio_intr_establish +ffffffff824d4610 T aplgpio_intr_enable +ffffffff824d46a0 T aplgpio_intr_disable +ffffffff824d5000 T bytgpio_match +ffffffff824d5060 T bytgpio_attach +ffffffff824d5310 T bytgpio_intr +ffffffff824d5430 T bytgpio_read_pin +ffffffff824d5490 T bytgpio_write_pin +ffffffff824d5510 T bytgpio_intr_establish +ffffffff824d5580 T bytgpio_intr_enable +ffffffff824d5660 T bytgpio_intr_disable +ffffffff824d6000 T chvgpio_match +ffffffff824d6060 T chvgpio_attach +ffffffff824d6300 T chvgpio_intr +ffffffff824d63d0 T chvgpio_read_pin +ffffffff824d6470 T chvgpio_write_pin +ffffffff824d6530 T chvgpio_intr_establish +ffffffff824d6700 T chvgpio_intr_enable +ffffffff824d67c0 T chvgpio_intr_disable +ffffffff824d6880 T chvgpio_opreg_handler +ffffffff824d6900 T chvgpio_check_pin +ffffffff824d7000 T glkgpio_match +ffffffff824d7060 T glkgpio_attach +ffffffff824d7300 T glkgpio_intr +ffffffff824d7430 T glkgpio_read_pin +ffffffff824d7480 T glkgpio_write_pin +ffffffff824d74f0 T glkgpio_intr_establish +ffffffff824d7610 T glkgpio_intr_enable +ffffffff824d76a0 T glkgpio_intr_disable +ffffffff824d8000 T pchgpio_match +ffffffff824d8060 T pchgpio_attach +ffffffff824d84b0 T pchgpio_activate +ffffffff824d8560 T pchgpio_intr +ffffffff824d8780 T pchgpio_read_pin +ffffffff824d8870 T pchgpio_write_pin +ffffffff824d8980 T pchgpio_intr_establish +ffffffff824d8bb0 T pchgpio_intr_enable +ffffffff824d8cf0 T pchgpio_intr_disable +ffffffff824d8e30 T pchgpio_save +ffffffff824d8ea0 T pchgpio_restore +ffffffff824d8f10 T pchgpio_find_group +ffffffff824d8f90 T pchgpio_intr_handle +ffffffff824d9070 T pchgpio_save_pin +ffffffff824d9230 T pchgpio_restore_pin +ffffffff824da000 T tipmic_match +ffffffff824da050 T tipmic_attach +ffffffff824da250 T tipmic_write_1 +ffffffff824da310 T tipmic_intr +ffffffff824da470 T tipmic_get_lpat +ffffffff824da5a0 T tipmic_read_pin +ffffffff824da5d0 T tipmic_write_pin +ffffffff824da600 T tipmic_thermal_opreg_handler +ffffffff824dae00 T tipmic_power_opreg_handler +ffffffff824db0a0 T tipmic_read_1 +ffffffff824db160 T tipmic_raw_to_temp +ffffffff824dc000 T ccpmic_match +ffffffff824dc050 T ccpmic_attach +ffffffff824dc130 T ccpmic_get_lpat +ffffffff824dc250 T ccpmic_read_pin +ffffffff824dc3d0 T ccpmic_write_pin +ffffffff824dc530 T ccpmic_thermal_opreg_handler +ffffffff824dc760 T ccpmic_power_opreg_handler +ffffffff824dc940 T ccpmic_read_1 +ffffffff824dca00 T ccpmic_write_1 +ffffffff824dcac0 T ccpmic_raw_to_temp +ffffffff824dd000 T com_acpi_match +ffffffff824dd070 T com_acpi_attach +ffffffff824dd2e0 T com_acpi_is_designware +ffffffff824dd340 T com_acpi_intr_designware +ffffffff824dd370 T com_acpi_is_console +ffffffff824de000 T sdhc_acpi_match +ffffffff824de060 T sdhc_acpi_attach +ffffffff824de360 T sdhc_acpi_parse_resources +ffffffff824de410 T sdhc_acpi_card_detect_gpio +ffffffff824de470 T sdhc_acpi_card_detect_intr +ffffffff824de4b0 T sdhc_acpi_power_on +ffffffff824de530 T sdhc_acpi_explore +ffffffff824de560 T sdhc_acpi_card_detect_nonremovable +ffffffff824de590 T sdhc_acpi_do_explore +ffffffff824df000 T dwiic_acpi_match +ffffffff824df050 T dwiic_acpi_attach +ffffffff824df3b0 T dwiic_acpi_parse_crs +ffffffff824df4e0 T dwiic_acpi_power +ffffffff824df5e0 T dwiic_acpi_get_params +ffffffff824df710 T dwiic_i2c_intr_establish +ffffffff824df790 T dwiic_i2c_intr_disestablish +ffffffff824df7a0 T dwiic_i2c_intr_string +ffffffff824df830 T dwiic_acpi_bus_scan +ffffffff824df860 T dwiic_acpi_found_hid +ffffffff824dfb80 T dwiic_matchhids +ffffffff824dfc10 T dwiic_acpi_found_ihidev +ffffffff824dfe90 T dwiic_acpi_found_iatp +ffffffff824e0000 T acpicbkbd_match +ffffffff824e0020 T acpicbkbd_attach +ffffffff824e00b0 T acpicbkbd_activate +ffffffff824e0100 T acpicbkbd_get_backlight +ffffffff824e0170 T acpicbkbd_set_backlight +ffffffff824e0210 T acpicbkbd_write_backlight +ffffffff824e1000 T acpials_match +ffffffff824e1080 T acpials_attach +ffffffff824e1210 T acpials_read +ffffffff824e1290 T acpials_addtask +ffffffff824e12d0 T acpials_notify +ffffffff824e1350 T acpials_update +ffffffff824e2000 T tpm_match +ffffffff824e2050 T tpm_attach +ffffffff824e2320 T tpm_activate +ffffffff824e2420 T tpm2_start_method +ffffffff824e24a0 T tpm_probe +ffffffff824e2550 T tpm_init_tis +ffffffff824e27b0 T tpm_init_crb +ffffffff824e2af0 T tpm_suspend +ffffffff824e2be0 T tpm_resume +ffffffff824e2c10 T tpm_write_tis +ffffffff824e2f90 T tpm_read_tis +ffffffff824e3170 T tpm_write_crb +ffffffff824e3580 T tpm_read_crb +ffffffff824e3870 T tpm_request_locality_tis +ffffffff824e3960 T tpm_request_locality_crb +ffffffff824e3a60 T tpm_release_locality_crb +ffffffff824e3ab0 T tpm_release_locality_tis +ffffffff824e3b20 T tpm_getburst +ffffffff824e3bd0 T tpm_status +ffffffff824e3bf0 T tpm_waitfor +ffffffff824e3cc0 T tpm_waitfor_status +ffffffff824e4000 T acpihve_match +ffffffff824e40b0 T acpihve_attach +ffffffff824e5000 T acpisbs_match +ffffffff824e5020 T acpisbs_attach +ffffffff824e5290 T acpisbs_activate +ffffffff824e5370 T acpisbs_read +ffffffff824e5430 T acpisbs_setup_sensors +ffffffff824e5550 T acpisbs_refresh_sensors +ffffffff824e56c0 T acpisbs_notify +ffffffff824e57f0 T acpi_smbus_read +ffffffff824e6000 T surface_match +ffffffff824e6050 T surface_attach +ffffffff824e60b0 T surface_hotkey +ffffffff824e7000 T ipmi_acpi_match +ffffffff824e7020 T ipmi_acpi_attach +ffffffff824e7240 T ipmi_acpi_parse_crs +ffffffff824e8000 T amdgpio_match +ffffffff824e8060 T amdgpio_attach +ffffffff824e8290 T amdgpio_activate +ffffffff824e8380 T amdgpio_intr +ffffffff824e8520 T amdgpio_read_pin +ffffffff824e8570 T amdgpio_write_pin +ffffffff824e85e0 T amdgpio_intr_establish +ffffffff824e86d0 T amdgpio_intr_enable +ffffffff824e8750 T amdgpio_intr_disable +ffffffff824e87d0 T amdgpio_save +ffffffff824e8850 T amdgpio_restore +ffffffff824e88e0 T amdgpio_save_pin +ffffffff824e8950 T amdgpio_restore_pin +ffffffff824e89c0 T amdgpio_pin_intr +ffffffff824e9000 T acpihid_match +ffffffff824e9020 T acpihid_attach +ffffffff824e9200 T acpihid_init_dsm +ffffffff824e9360 T acpihid_eval +ffffffff824e9580 T acpihid_notify +ffffffff824e95e0 T acpihid_button_array_enable +ffffffff824ea000 T acpi_match +ffffffff824ea060 T acpi_attach +ffffffff824ea0a0 T acpi_probe +ffffffff824ea240 T acpi_map +ffffffff824ea330 T acpi_unmap +ffffffff824ea370 T acpi_bus_space_map +ffffffff824ea390 T acpi_bus_space_unmap +ffffffff824ea3a0 T acpi_intr_establish +ffffffff824ea4e0 T acpi_intr_disestablish +ffffffff824ea4f0 T acpi_scan +ffffffff824ea6a0 T acpi_acquire_glk +ffffffff824ea700 T acpi_release_glk +ffffffff824ea750 T acpi_attach_machdep +ffffffff824ea8e0 T acpi_sleep_cpu +ffffffff824eaa80 T acpi_resume_cpu +ffffffff824eab70 T sleep_mp +ffffffff824eac70 T resume_mp +ffffffff824ead60 T acpi_iommu_device_map +ffffffff824eb000 T hibernate_resume_machdep +ffffffff824eb050 T hibernate_drop_to_real_mode +ffffffff824eb060 T hibernate_activate_resume_pt_machdep +ffffffff824eb0a0 T hibernate_switch_stack_machdep +ffffffff824eb0e0 T hibernate_flush +ffffffff824eb110 T acpi_savecpu +ffffffff824ec000 T sleep_showstate +ffffffff824ec100 T sleep_setstate +ffffffff824ec160 T gosleep +ffffffff824ec220 T sleep_abort +ffffffff824ec250 T sleep_resume +ffffffff824ec2c0 T suspend_finish +ffffffff824ed000 T acpipci_match +ffffffff824ed020 T acpipci_attach +ffffffff824ed2e0 T acpipci_osc +ffffffff824ed420 T acpipci_parse_resources +ffffffff824ed530 T acpipci_attach_bus +ffffffff824ed700 T acpipci_print +ffffffff824ed760 T acpipci_attach_busses +ffffffff824ee000 T efi_match +ffffffff824ee060 T efi_attach +ffffffff824ee400 T efi_map_runtime +ffffffff824ee580 T efi_enter +ffffffff824ee600 T efi_leave +ffffffff824ee660 T efi_gettime +ffffffff824ee830 T efi_settime +ffffffff824ee990 T efi_fault +ffffffff824ef000 T vmm_probe +ffffffff824ef050 T vmm_attach +ffffffff824ef3c0 T vmm_activate +ffffffff824ef5d0 T vmm_enabled +ffffffff824ef660 T vmm_quiesce_vmx +ffffffff824ef830 T vmm_stop +ffffffff824ef970 T vmm_start +ffffffff824efa50 T vmmopen +ffffffff824efaa0 T vmmioctl +ffffffff824efeb0 T vm_create +ffffffff824f02e0 T vm_run +ffffffff824f04c0 T vm_get_info +ffffffff824f0710 T vm_terminate +ffffffff824f0880 T vm_resetcpu +ffffffff824f09e0 T vm_intr_pending +ffffffff824f0ab0 T vm_rwregs +ffffffff824f0c00 T vm_mprotect_ept +ffffffff824f0ea0 T vm_rwvmparams +ffffffff824f1050 T pledge_ioctl_vmm +ffffffff824f1120 T vmmclose +ffffffff824f1150 T vm_find +ffffffff824f1260 T vcpu_reset_regs +ffffffff824f12b0 T vmm_init_pvclock +ffffffff824f1380 T vcpu_readregs_vmx +ffffffff824f17a0 T vcpu_writeregs_vmx +ffffffff824f1c10 T vcpu_readregs_svm +ffffffff824f20b0 T vcpu_writeregs_svm +ffffffff824f2570 T vmm_get_guest_memtype +ffffffff824f25f0 T vmx_mprotect_ept +ffffffff824f2860 T vmx_pmap_find_pte_ept +ffffffff824f2930 T start_vmm_on_cpu +ffffffff824f2a00 T stop_vmm_on_cpu +ffffffff824f2aa0 T vmclear_on_cpu +ffffffff824f2b10 T vm_create_check_mem_ranges +ffffffff824f2c70 T vm_impl_init +ffffffff824f2d10 T vm_teardown +ffffffff824f2ec0 T vcpu_init +ffffffff824f2f90 T vm_impl_init_vmx +ffffffff824f30b0 T vm_impl_init_svm +ffffffff824f31d0 T vm_impl_deinit_vmx +ffffffff824f3200 T vm_impl_deinit_svm +ffffffff824f3230 T vm_impl_deinit +ffffffff824f3290 T vcpu_reload_vmcs_vmx +ffffffff824f33c0 T vcpu_reset_regs_svm +ffffffff824f3760 T svm_setmsrbrw +ffffffff824f38d0 T svm_setmsrbr +ffffffff824f39a0 T vmm_alloc_vpid +ffffffff824f3ab0 T svm_setmsrbw +ffffffff824f3b80 T vmx_setmsrbr +ffffffff824f3c30 T vmx_setmsrbw +ffffffff824f3ce0 T vmx_setmsrbrw +ffffffff824f3de0 T svm_set_clean +ffffffff824f3e30 T svm_set_dirty +ffffffff824f3e80 T vcpu_reset_regs_vmx +ffffffff824f49d0 T vcpu_vmx_check_cap +ffffffff824f4ad0 T vcpu_vmx_compute_ctrl +ffffffff824f4cb0 T vcpu_init_vmx +ffffffff824f5050 T vcpu_deinit_vmx +ffffffff824f51d0 T vcpu_init_svm +ffffffff824f5350 T vcpu_deinit_svm +ffffffff824f5490 T vmm_free_vpid +ffffffff824f54f0 T vcpu_deinit +ffffffff824f5540 T vcpu_run_vmx +ffffffff824f5d30 T vcpu_run_svm +ffffffff824f62d0 T vcpu_must_stop +ffffffff824f6330 T vmm_fpurestore +ffffffff824f6400 T vmm_fpusave +ffffffff824f6480 T vmm_translate_gva +ffffffff824f67b0 T vmm_update_pvclock +ffffffff824f68b0 T vmx_get_exit_info +ffffffff824f6910 T vmx_handle_exit +ffffffff824f6d00 T vmx_instruction_error_decode +ffffffff824f6ed0 T vmm_get_guest_cpu_cpl +ffffffff824f6f80 T vmx_handle_intr +ffffffff824f7010 T svm_handle_hlt +ffffffff824f7060 T vmx_handle_hlt +ffffffff824f7110 T svm_handle_exit +ffffffff824f73e0 T svm_handle_np_fault +ffffffff824f7580 T vmm_handle_cpuid +ffffffff824f7bd0 T svm_handle_msr +ffffffff824f7e80 T svm_handle_xsetbv +ffffffff824f7ed0 T svm_handle_inout +ffffffff824f7fe0 T vmm_inject_ud +ffffffff824f8010 T vmm_inject_db +ffffffff824f8040 T vmx_handle_np_fault +ffffffff824f81b0 T vmx_handle_inout +ffffffff824f8350 T vmx_handle_cr +ffffffff824f85c0 T vmx_handle_rdmsr +ffffffff824f8690 T vmx_handle_wrmsr +ffffffff824f88e0 T vmx_handle_xsetbv +ffffffff824f8970 T vmm_inject_gp +ffffffff824f89a0 T vmx_get_exit_qualification +ffffffff824f8a00 T vmx_get_guest_faulttype +ffffffff824f8aa0 T svm_get_guest_faulttype +ffffffff824f8ad0 T svm_fault_page +ffffffff824f8b50 T vmx_fault_page +ffffffff824f8cb0 T vmm_get_guest_cpu_mode +ffffffff824f8db0 T vmx_load_pdptes +ffffffff824f9030 T vmx_handle_cr0_write +ffffffff824f9230 T vmx_handle_cr4_write +ffffffff824f92d0 T vmm_handle_xsetbv +ffffffff824f93b0 T vmx_handle_misc_enable_msr +ffffffff824f9410 T vmm_pat_is_valid +ffffffff824f94f0 T vmm_gpa_is_valid +ffffffff824f9560 T vmx_exit_reason_decode +ffffffff824f95a0 T svm_exit_reason_decode +ffffffff824fa3b0 T vcpu_state_decode +ffffffff824fb000 T vmm_dispatch_intr +ffffffff824fb019 T vmxon +ffffffff824fb049 T vmxoff +ffffffff824fb079 T vmclear +ffffffff824fb0a9 T vmptrld +ffffffff824fb0d9 T vmptrst +ffffffff824fb109 T vmwrite +ffffffff824fb139 T vmread +ffffffff824fb169 T invvpid +ffffffff824fb199 T invept +ffffffff824fb1c9 T vmx_enter_guest +ffffffff824fb1f0 t skip_init +ffffffff824fb2bd t no_l1df_msr +ffffffff824fb2c0 t l1df_tlb_loop +ffffffff824fb2d9 t l1df_tlb_done +ffffffff824fb2e1 t l1df_load_cache +ffffffff824fb2f8 t done_flush +ffffffff824fb38b t do_resume +ffffffff824fb410 t fail_launch_or_resume +ffffffff824fb44d t fail_launch_unknown +ffffffff824fb45a t fail_launch_invalid_vmcs +ffffffff824fb467 t fail_launch_valid_vmcs +ffffffff824fb484 t vmx_exit_handler_asm +ffffffff824fb549 t restore_host +ffffffff824fb5e9 T svm_enter_guest +ffffffff824fb775 t restore_host_svm +ffffffff824fc000 T sdmmc_match +ffffffff824fc050 T sdmmc_attach +ffffffff824fc380 T sdmmc_detach +ffffffff824fc430 T sdmmc_activate +ffffffff824fc500 T sdmmc_discover_task +ffffffff824fc5c0 T sdmmc_create_thread +ffffffff824fc630 T sdmmc_holds_root_device +ffffffff824fc680 T sdmmc_task_thread +ffffffff824fc870 T sdmmc_needs_discover +ffffffff824fc920 T sdmmc_del_task +ffffffff824fc9d0 T sdmmc_card_detach +ffffffff824fcab0 T sdmmc_add_task +ffffffff824fcb30 T sdmmc_card_attach +ffffffff824fcc40 T sdmmc_enable +ffffffff824fcd90 T sdmmc_scan +ffffffff824fce10 T sdmmc_init +ffffffff824fcf10 T sdmmc_disable +ffffffff824fd070 T sdmmc_function_free +ffffffff824fd090 T sdmmc_delay +ffffffff824fd0e0 T sdmmc_select_card +ffffffff824fd260 T sdmmc_set_bus_power +ffffffff824fd420 T sdmmc_function_alloc +ffffffff824fd4a0 T sdmmc_app_command +ffffffff824fd630 T sdmmc_mmc_command +ffffffff824fd6b0 T sdmmc_go_idle_state +ffffffff824fd7c0 T sdmmc_send_if_cond +ffffffff824fd910 T sdmmc_set_relative_addr +ffffffff824fe000 T sdmmc_cisptr +ffffffff824fe0a0 T sdmmc_read_cis +ffffffff824fe3a0 T sdmmc_print_cis +ffffffff824fe510 T sdmmc_check_cis_quirks +ffffffff824ff000 T sdmmc_io_enable +ffffffff824ff2a0 T sdmmc_io_reset +ffffffff824ff3c0 T sdmmc_io_send_op_cond +ffffffff824ff530 T sdmmc_io_scan +ffffffff824ff680 T sdmmc_io_init +ffffffff824ff7a0 T sdmmc_io_set_highspeed +ffffffff824ffa40 T sdmmc_io_set_bus_width +ffffffff824ffcd0 T sdmmc_io_function_ready +ffffffff824ffe40 T sdmmc_io_read_1 +ffffffff824fff90 T sdmmc_io_function_enable +ffffffff82500360 T sdmmc_io_write_1 +ffffffff825004e0 T sdmmc_io_function_disable +ffffffff82500760 T sdmmc_io_attach +ffffffff82500840 T sdmmc_print +ffffffff82500a90 T sdmmc_submatch +ffffffff82500b10 T sdmmc_io_detach +ffffffff82500bb0 T sdmmc_io_rw_direct +ffffffff82500d50 T sdmmc_io_rw_extended_subr +ffffffff82500ef0 T sdmmc_io_rw_extended +ffffffff825012e0 T sdmmc_io_read_2 +ffffffff82501430 T sdmmc_io_write_2 +ffffffff82501590 T sdmmc_io_read_4 +ffffffff825016e0 T sdmmc_io_write_4 +ffffffff82501840 T sdmmc_io_read_multi_1 +ffffffff82501930 T sdmmc_io_write_multi_1 +ffffffff82501a20 T sdmmc_io_read_region_1 +ffffffff82501b10 T sdmmc_io_write_region_1 +ffffffff82501c00 T sdmmc_io_xchg +ffffffff82501d90 T sdmmc_intr_enable +ffffffff82502000 T sdmmc_intr_disable +ffffffff82502270 T sdmmc_intr_establish +ffffffff82502370 T sdmmc_intr_disestablish +ffffffff82502450 T sdmmc_card_intr +ffffffff825024a0 T sdmmc_intr_task +ffffffff82502530 T sdmmc_io_set_blocklen +ffffffff82503000 T sdmmc_mem_enable +ffffffff825034e0 T sdmmc_mem_send_op_cond +ffffffff82503690 T sdmmc_mem_signal_voltage +ffffffff82503750 T sdmmc_mem_scan +ffffffff82503a50 T sdmmc_decode_csd +ffffffff82503e50 T sdmmc_decode_cid +ffffffff82504290 T sdmmc_mem_send_scr +ffffffff825043d0 T sdmmc_mem_decode_scr +ffffffff82504440 T sdmmc_mem_send_cxd_data +ffffffff825045b0 T sdmmc_mem_set_bus_width +ffffffff825046c0 T sdmmc_mem_sd_switch +ffffffff82504970 T sdmmc_be512_to_bitfield512 +ffffffff82504a20 T sdmmc_mem_mmc_switch +ffffffff82504b10 T sdmmc_mem_init +ffffffff82504c60 T sdmmc_mem_set_blocklen +ffffffff82504d60 T sdmmc_mem_sd_init +ffffffff82505310 T sdmmc_mem_mmc_init +ffffffff82505c30 T sdmmc_mem_select_transfer_mode +ffffffff82505cb0 T sdmmc_mem_execute_tuning +ffffffff82505d40 T sdmmc_mem_read_block_subr +ffffffff825060a0 T sdmmc_mem_single_read_block +ffffffff82506160 T sdmmc_mem_read_block +ffffffff82506320 T sdmmc_mem_write_block_subr +ffffffff82506670 T sdmmc_mem_single_write_block +ffffffff82506730 T sdmmc_mem_write_block +ffffffff825068f0 T sdmmc_mem_hibernate_write +ffffffff82507000 T sdmmc_scsi_cmd +ffffffff825071f0 T sdmmc_minphys +ffffffff82507260 T sdmmc_scsi_attach +ffffffff82507450 T sdmmc_alloc_ccbs +ffffffff82507590 T sdmmc_free_ccbs +ffffffff825075f0 T sdmmc_scsi_detach +ffffffff82507740 T sdmmc_stimeout +ffffffff825077c0 T sdmmc_ccb_alloc +ffffffff82507870 T sdmmc_ccb_free +ffffffff82507950 T sdmmc_inquiry +ffffffff82507b70 T sdmmc_start_xs +ffffffff82507c60 T sdmmc_complete_xs +ffffffff82507d20 T sdmmc_done_xs +ffffffff82507d60 T sdmmc_scsi_hibernate_io +ffffffff82508000 T bwfm_sdio_preinit +ffffffff825084f0 T bwfm_sdio_txcheck +ffffffff82508530 T bwfm_sdio_txdata +ffffffff825085a0 T bwfm_sdio_txctl +ffffffff825086f0 T bwfm_sdio_buscore_read +ffffffff82508700 T bwfm_sdio_buscore_write +ffffffff82508710 T bwfm_sdio_buscore_prepare +ffffffff82508840 T bwfm_sdio_buscore_activate +ffffffff825088c0 T bwfm_sdio_match +ffffffff82508980 T bwfm_sdio_attach +ffffffff82508c40 T bwfm_sdio_detach +ffffffff82508ca0 T bwfm_sdio_task +ffffffff82508df0 T bwfm_sdio_write_1 +ffffffff82508e20 T bwfm_sdio_read_1 +ffffffff82508e50 T bwfm_sdio_write_4 +ffffffff82508f00 T bwfm_sdio_read_4 +ffffffff82508fa0 T bwfm_sdio_load_microcode +ffffffff82509200 T bwfm_sdio_clkctl +ffffffff82509330 T bwfm_sdio_dev_write +ffffffff82509370 T bwfm_sdio_intr +ffffffff825093b0 T bwfm_sdio_ram_read_write +ffffffff825095e0 T bwfm_sdio_htclk +ffffffff82509840 T bwfm_sdio_readshared +ffffffff82509900 T bwfm_sdio_dev_read +ffffffff82509930 T bwfm_sdio_rx_frames +ffffffff82509cc0 T bwfm_sdio_tx_frames +ffffffff82509da0 T bwfm_sdio_backplane +ffffffff82509e50 T bwfm_sdio_buf_read +ffffffff82509f20 T bwfm_sdio_buf_write +ffffffff82509fd0 T bwfm_sdio_frame_read_write +ffffffff8250a150 T bwfm_sdio_newbuf +ffffffff8250a1d0 T bwfm_sdio_tx_ok +ffffffff8250a220 T bwfm_sdio_tx_ctrlframe +ffffffff8250a320 T bwfm_sdio_tx_dataframe +ffffffff8250a470 T bwfm_sdio_rx_glom +ffffffff8250b000 T onewire_match +ffffffff8250b050 T onewire_attach +ffffffff8250b0f0 T onewire_detach +ffffffff8250b160 T onewire_activate +ffffffff8250b180 T onewire_scan +ffffffff8250b390 T onewire_createthread +ffffffff8250b3f0 T onewire_print +ffffffff8250b4c0 T onewirebus_print +ffffffff8250b510 T onewire_lock +ffffffff8250b530 T onewire_unlock +ffffffff8250b540 T onewire_reset +ffffffff8250b560 T onewire_bit +ffffffff8250b580 T onewire_read_byte +ffffffff8250b6c0 T onewire_write_byte +ffffffff8250b790 T onewire_read_block +ffffffff8250b830 T onewire_write_block +ffffffff8250b8d0 T onewire_triplet +ffffffff8250b9b0 T onewire_matchrom +ffffffff8250bb00 T onewire_search +ffffffff8250be90 T onewire_thread +ffffffff8250c000 T onewire_crc +ffffffff8250c0e0 T onewire_crc16 +ffffffff8250c1c0 T onewire_famname +ffffffff8250c200 T onewire_matchbyfam +ffffffff8250d000 T owid_match +ffffffff8250d020 T owid_attach +ffffffff8250d0f0 T owid_detach +ffffffff8250d130 T owid_activate +ffffffff8250e000 T owsbm_match +ffffffff8250e020 T owsbm_attach +ffffffff8250e1c0 T owsbm_detach +ffffffff8250e230 T owsbm_activate +ffffffff8250e260 T owsbm_update +ffffffff8250f000 T owtemp_match +ffffffff8250f020 T owtemp_attach +ffffffff8250f110 T owtemp_detach +ffffffff8250f180 T owtemp_activate +ffffffff8250f1b0 T owtemp_update +ffffffff82510000 T owctr_match +ffffffff82510020 T owctr_attach +ffffffff82510160 T owctr_detach +ffffffff825101d0 T owctr_activate +ffffffff82510200 T owctr_update +ffffffff82510230 T owctr_update_counter +ffffffff82511000 A __text_page_start +ffffffff82511000 T Xsyscall_meltdown +ffffffff8251100c T Xsyscall +ffffffff8251125e t Xsyscall_trampback +ffffffff82511270 T intr_user_exit +ffffffff825112b2 t intr_user_exit_post_ast +ffffffff825113ce t Xiretq_trampback +ffffffff825113da T doreti_iret +ffffffff82512000 T alltraps +ffffffff82512138 T recall_trap +ffffffff82512150 T alltraps_kern +ffffffff82512153 T alltraps_kern_meltdown +ffffffff82513000 ? Xsyscall32 +ffffffff82513000 A __kutext_start +ffffffff82513000 A __text_page_end +ffffffff82514000 ? Xtrap00 +ffffffff82514010 ? Xtrap01 +ffffffff82514020 ? Xtrap02 +ffffffff82514024 c calltrap_specstk +ffffffff825140f0 ? calltrap_specstk_tramp +ffffffff82514110 ? Xtrap03 +ffffffff82514120 ? Xtrap04 +ffffffff82514130 ? Xtrap05 +ffffffff82514140 ? Xtrap06 +ffffffff82514150 ? Xtrap07 +ffffffff82514160 ? Xtrap08 +ffffffff82514170 ? Xtrap09 +ffffffff82514180 ? Xtrap0a +ffffffff82514190 ? Xtrap0b +ffffffff825141a0 ? Xtrap0c +ffffffff825141b0 ? Xtrap0d +ffffffff82514230 ? Xtrap0e +ffffffff82514240 ? Xintrspurious +ffffffff82514240 ? Xtrap0f +ffffffff82514250 ? Xtrap10 +ffffffff82514260 ? Xtrap11 +ffffffff82514270 ? Xtrap12 +ffffffff82514280 ? Xtrap13 +ffffffff82514290 ? Xtrap14 +ffffffff82514290 ? Xtrap15 +ffffffff82514290 ? Xtrap16 +ffffffff82514290 ? Xtrap17 +ffffffff82514290 ? Xtrap18 +ffffffff82514290 ? Xtrap19 +ffffffff82514290 ? Xtrap1a +ffffffff82514290 ? Xtrap1b +ffffffff82514290 ? Xtrap1c +ffffffff82514290 ? Xtrap1d +ffffffff82514290 ? Xtrap1e +ffffffff82514290 ? Xtrap1f +ffffffff825142a0 ? x2apic_eoi +ffffffff825142c0 ? Xintr_lapic_ipi +ffffffff825142f0 ? Xipi_invltlb +ffffffff82514310 ? Xipi_invlpg +ffffffff82514340 ? Xipi_invlrange +ffffffff82514380 ? Xipi_invltlb_pcid +ffffffff825143c0 ? Xipi_invlpg_pcid +ffffffff82514410 ? Xipi_invlrange_pcid +ffffffff82514480 ? Xintr_lapic_ltimer +ffffffff825144b0 ? Xintr_xen_upcall +ffffffff825144e0 ? Xintr_hyperv_upcall +ffffffff82514510 ? Xintr_legacy0 +ffffffff82514540 ? Xintr_legacy1 +ffffffff82514570 ? Xintr_legacy2 +ffffffff825145a0 ? Xintr_legacy3 +ffffffff825145d0 ? Xintr_legacy4 +ffffffff82514600 ? Xintr_legacy5 +ffffffff82514630 ? Xintr_legacy6 +ffffffff82514660 ? Xintr_legacy7 +ffffffff82514690 ? Xintr_legacy8 +ffffffff825146c0 ? Xintr_legacy9 +ffffffff825146f0 ? Xintr_legacy10 +ffffffff82514720 ? Xintr_legacy11 +ffffffff82514750 ? Xintr_legacy12 +ffffffff82514780 ? Xintr_legacy13 +ffffffff825147b0 ? Xintr_legacy14 +ffffffff825147e0 ? Xintr_legacy15 +ffffffff82514810 ? Xintr_ioapic_edge0 +ffffffff82514840 ? Xintr_ioapic_edge1 +ffffffff82514870 ? Xintr_ioapic_edge2 +ffffffff825148a0 ? Xintr_ioapic_edge3 +ffffffff825148d0 ? Xintr_ioapic_edge4 +ffffffff82514900 ? Xintr_ioapic_edge5 +ffffffff82514930 ? Xintr_ioapic_edge6 +ffffffff82514960 ? Xintr_ioapic_edge7 +ffffffff82514990 ? Xintr_ioapic_edge8 +ffffffff825149c0 ? Xintr_ioapic_edge9 +ffffffff825149f0 ? Xintr_ioapic_edge10 +ffffffff82514a20 ? Xintr_ioapic_edge11 +ffffffff82514a50 ? Xintr_ioapic_edge12 +ffffffff82514a80 ? Xintr_ioapic_edge13 +ffffffff82514ab0 ? Xintr_ioapic_edge14 +ffffffff82514ae0 ? Xintr_ioapic_edge15 +ffffffff82514b10 ? Xintr_ioapic_edge16 +ffffffff82514b40 ? Xintr_ioapic_edge17 +ffffffff82514b70 ? Xintr_ioapic_edge18 +ffffffff82514ba0 ? Xintr_ioapic_edge19 +ffffffff82514bd0 ? Xintr_ioapic_edge20 +ffffffff82514c00 ? Xintr_ioapic_edge21 +ffffffff82514c30 ? Xintr_ioapic_edge22 +ffffffff82514c60 ? Xintr_ioapic_edge23 +ffffffff82514c90 ? Xintr_ioapic_edge24 +ffffffff82514cc0 ? Xintr_ioapic_edge25 +ffffffff82514cf0 ? Xintr_ioapic_edge26 +ffffffff82514d20 ? Xintr_ioapic_edge27 +ffffffff82514d50 ? Xintr_ioapic_edge28 +ffffffff82514d80 ? Xintr_ioapic_edge29 +ffffffff82514db0 ? Xintr_ioapic_edge30 +ffffffff82514de0 ? Xintr_ioapic_edge31 +ffffffff82514e10 ? Xintr_ioapic_edge32 +ffffffff82514e40 ? Xintr_ioapic_edge33 +ffffffff82514e70 ? Xintr_ioapic_edge34 +ffffffff82514ea0 ? Xintr_ioapic_edge35 +ffffffff82514ed0 ? Xintr_ioapic_edge36 +ffffffff82514f00 ? Xintr_ioapic_edge37 +ffffffff82514f30 ? Xintr_ioapic_edge38 +ffffffff82514f60 ? Xintr_ioapic_edge39 +ffffffff82514f90 ? Xintr_ioapic_edge40 +ffffffff82514fc0 ? Xintr_ioapic_edge41 +ffffffff82514ff0 ? Xintr_ioapic_edge42 +ffffffff82515020 ? Xintr_ioapic_edge43 +ffffffff82515050 ? Xintr_ioapic_edge44 +ffffffff82515080 ? Xintr_ioapic_edge45 +ffffffff825150b0 ? Xintr_ioapic_edge46 +ffffffff825150e0 ? Xintr_ioapic_edge47 +ffffffff82515110 ? Xintr_ioapic_edge48 +ffffffff82515140 ? Xintr_ioapic_edge49 +ffffffff82515170 ? Xintr_ioapic_edge50 +ffffffff825151a0 ? Xintr_ioapic_edge51 +ffffffff825151d0 ? Xintr_ioapic_edge52 +ffffffff82515200 ? Xintr_ioapic_edge53 +ffffffff82515230 ? Xintr_ioapic_edge54 +ffffffff82515260 ? Xintr_ioapic_edge55 +ffffffff82515290 ? Xintr_ioapic_edge56 +ffffffff825152c0 ? Xintr_ioapic_edge57 +ffffffff825152f0 ? Xintr_ioapic_edge58 +ffffffff82515320 ? Xintr_ioapic_edge59 +ffffffff82515350 ? Xintr_ioapic_edge60 +ffffffff82515380 ? Xintr_ioapic_edge61 +ffffffff825153b0 ? Xintr_ioapic_edge62 +ffffffff825153e0 ? Xintr_ioapic_edge63 +ffffffff82515410 ? Xintr_ioapic_level0 +ffffffff82515440 ? Xintr_ioapic_level1 +ffffffff82515470 ? Xintr_ioapic_level2 +ffffffff825154a0 ? Xintr_ioapic_level3 +ffffffff825154d0 ? Xintr_ioapic_level4 +ffffffff82515500 ? Xintr_ioapic_level5 +ffffffff82515530 ? Xintr_ioapic_level6 +ffffffff82515560 ? Xintr_ioapic_level7 +ffffffff82515590 ? Xintr_ioapic_level8 +ffffffff825155c0 ? Xintr_ioapic_level9 +ffffffff825155f0 ? Xintr_ioapic_level10 +ffffffff82515620 ? Xintr_ioapic_level11 +ffffffff82515650 ? Xintr_ioapic_level12 +ffffffff82515680 ? Xintr_ioapic_level13 +ffffffff825156b0 ? Xintr_ioapic_level14 +ffffffff825156e0 ? Xintr_ioapic_level15 +ffffffff82515710 ? Xintr_ioapic_level16 +ffffffff82515740 ? Xintr_ioapic_level17 +ffffffff82515770 ? Xintr_ioapic_level18 +ffffffff825157a0 ? Xintr_ioapic_level19 +ffffffff825157d0 ? Xintr_ioapic_level20 +ffffffff82515800 ? Xintr_ioapic_level21 +ffffffff82515830 ? Xintr_ioapic_level22 +ffffffff82515860 ? Xintr_ioapic_level23 +ffffffff82515890 ? Xintr_ioapic_level24 +ffffffff825158c0 ? Xintr_ioapic_level25 +ffffffff825158f0 ? Xintr_ioapic_level26 +ffffffff82515920 ? Xintr_ioapic_level27 +ffffffff82515950 ? Xintr_ioapic_level28 +ffffffff82515980 ? Xintr_ioapic_level29 +ffffffff825159b0 ? Xintr_ioapic_level30 +ffffffff825159e0 ? Xintr_ioapic_level31 +ffffffff82515a10 ? Xintr_ioapic_level32 +ffffffff82515a40 ? Xintr_ioapic_level33 +ffffffff82515a70 ? Xintr_ioapic_level34 +ffffffff82515aa0 ? Xintr_ioapic_level35 +ffffffff82515ad0 ? Xintr_ioapic_level36 +ffffffff82515b00 ? Xintr_ioapic_level37 +ffffffff82515b30 ? Xintr_ioapic_level38 +ffffffff82515b60 ? Xintr_ioapic_level39 +ffffffff82515b90 ? Xintr_ioapic_level40 +ffffffff82515bc0 ? Xintr_ioapic_level41 +ffffffff82515bf0 ? Xintr_ioapic_level42 +ffffffff82515c20 ? Xintr_ioapic_level43 +ffffffff82515c50 ? Xintr_ioapic_level44 +ffffffff82515c80 ? Xintr_ioapic_level45 +ffffffff82515cb0 ? Xintr_ioapic_level46 +ffffffff82515ce0 ? Xintr_ioapic_level47 +ffffffff82515d10 ? Xintr_ioapic_level48 +ffffffff82515d40 ? Xintr_ioapic_level49 +ffffffff82515d70 ? Xintr_ioapic_level50 +ffffffff82515da0 ? Xintr_ioapic_level51 +ffffffff82515dd0 ? Xintr_ioapic_level52 +ffffffff82515e00 ? Xintr_ioapic_level53 +ffffffff82515e30 ? Xintr_ioapic_level54 +ffffffff82515e60 ? Xintr_ioapic_level55 +ffffffff82515e90 ? Xintr_ioapic_level56 +ffffffff82515ec0 ? Xintr_ioapic_level57 +ffffffff82515ef0 ? Xintr_ioapic_level58 +ffffffff82515f20 ? Xintr_ioapic_level59 +ffffffff82515f50 ? Xintr_ioapic_level60 +ffffffff82515f80 ? Xintr_ioapic_level61 +ffffffff82515fb0 ? Xintr_ioapic_level62 +ffffffff82515fe0 ? Xintr_ioapic_level63 +ffffffff82517000 ? codepatch_fill_nop +ffffffff82517000 A __cptext_start +ffffffff82517000 A __kutext_end +ffffffff825170b0 ? codepatch_maprw +ffffffff82517190 ? codepatch_unmaprw +ffffffff825171f0 ? codepatch_nop +ffffffff82517340 ? codepatch_replace +ffffffff825174e0 ? codepatch_call +ffffffff82517500 ? codepatch_jmp +ffffffff82518000 A __cptext_end +ffffffff82518000 A __rodata_start +ffffffff82518000 C _etext +ffffffff82518000 C etext +ffffffff82519000 r seeprom_read +ffffffff82519004 r icl_mg_pll_find_divisors.div1_vals +ffffffff82519028 r gen9bc_tgp_ddc_pin_map +ffffffff82519038 r athn_ac2qid +ffffffff82519038 r athn_ac2qid +ffffffff82519038 r athn_ac2qid +ffffffff82519044 r rtwn_get_rssi.cckoff +ffffffff8251906c r rsu_ac2qid +ffffffff8251907c r pckbc_portcmd +ffffffff82519080 r tht_fifo_write_pad.pad +ffffffff82519088 r rsu_get_rssi.cckoff +ffffffff8251909c r adlp_n_revids +ffffffff825190ec r apple_iso_trans +ffffffff825190f0 r dg2_g12_revid_step_tbl +ffffffff825190f8 r wihap_check_tx.txratetable +ffffffff825190fc r dmamode +ffffffff82519124 r gen9_edram_size_mb.sets +ffffffff8251a000 r isomappings +ffffffff8251a080 r unimappings +ffffffff8251a230 r replacements +ffffffff8251daf8 r cmd0646_9_tim_udma +ffffffff82570dfd r pp_r600_decoded_lanes +ffffffff8258bf91 r cmd680_setup_channel.udma_tbl +ffffffff82593b2c r apollo_udma33_tim +ffffffff82599bc8 r substchar +ffffffff8259bc5d r apollo_udma100_tim +ffffffff825c340f r apollo_udma66_tim +ffffffff825ca7db r apollo_pio_rec +ffffffff825d9a64 r cy_pio_rec +ffffffff82608c2e r apollo_udma133_tim +ffffffff826156a0 R drm_ca +ffffffff826156c8 R drm_filtops +ffffffff826156f8 R drmread_filtops +ffffffff82616000 r vga_emulops +ffffffff82616048 R vga_stdscreen +ffffffff82616078 R vga_stdscreen_mono +ffffffff826160a8 R vga_stdscreen_bf +ffffffff826160d8 R vga_40lscreen +ffffffff82616108 R vga_40lscreen_mono +ffffffff82616138 R vga_40lscreen_bf +ffffffff82616168 R vga_50lscreen +ffffffff82616198 R vga_50lscreen_mono +ffffffff826161c8 R vga_50lscreen_bf +ffffffff826161f8 R vga_screenlist +ffffffff82616208 R vga_screenlist_mono +ffffffff82616218 R vga_accessops +ffffffff82616278 r i945_wm_info +ffffffff826162b0 r bgansitopc +ffffffff826162b8 r pctoansi +ffffffff826162f8 r sdma_offsets +ffffffff826162f8 r sdma_offsets +ffffffff82616328 r iha_rate_tbl +ffffffff82616360 r i830_a_wm_info +ffffffff82616398 r gen9_edram_size_mb.ways +ffffffff82616400 r aggr_periodic_times +ffffffff82616480 r jsl_ehl_revids +ffffffff826164f8 r michael_final.pad +ffffffff82616520 r rt_copysa.maskarray +ffffffff82616528 r i915_wm_info +ffffffff82616530 r amdgpu_ih_clientid_jpeg +ffffffff82616530 r amdgpu_ih_clientid_uvds +ffffffff82616530 r amdgpu_ih_clientid_vcns +ffffffff82616530 r amdgpu_ih_clientid_vcns +ffffffff82616530 r amdgpu_ih_clientid_vcns +ffffffff82616568 r vga_setfontset.cmaptabb +ffffffff82616580 r tgl_revids +ffffffff826165d8 r i830_bc_wm_info +ffffffff82616680 r __drm_universal_plane_init.default_modifiers +ffffffff82616690 r iwn_tid2fifo +ffffffff826166a8 r vga_setfontset.cmaptaba +ffffffff826166b0 r crtc_offsets +ffffffff826166b0 r crtc_offsets +ffffffff826166b0 r crtc_offsets +ffffffff826166d0 r link_speed +ffffffff826166d0 r link_speed +ffffffff826166d0 r link_speed +ffffffff82616748 r rtwn_r88e_get_rssi.cckoff +ffffffff82617000 R edid_vendors +ffffffff826172c0 R edid_nvendors +ffffffff826172d0 R edid_products +ffffffff82617330 R edid_nproducts +ffffffff82617340 r _edid_modes +ffffffff82618000 R videomode_list +ffffffff82619080 R videomode_count +ffffffff8261a000 r ahc_hard_errors +ffffffff8261a080 r critical_sections +ffffffff8261a0b0 r patches +ffffffff8261ad50 r seqprog +ffffffff8261c000 r ahc_switch +ffffffff8261d000 r termstat_strings +ffffffff8261d020 r critical_sections +ffffffff8261d060 r seqprog +ffffffff8261dd50 r patches +ffffffff8261f000 r ahd_switch +ffffffff82620000 R aic_switch +ffffffff82621000 R adw_switch +ffffffff82622000 R gdt_switch +ffffffff82623000 R twe_switch +ffffffff82624000 R ciss_switch +ffffffff82624030 R ciss_level +ffffffff82624050 R ciss_stat +ffffffff82625000 R ami_switch +ffffffff82625028 R ami_raw_switch +ffffffff82626000 R mfi_switch +ffffffff82626028 R mfi_pd_switch +ffffffff82626050 r mfi_iop_xscale +ffffffff82626080 r mfi_iop_ppc +ffffffff826260b0 r mfi_iop_gen2 +ffffffff826260e0 r mfi_iop_skinny +ffffffff82626110 r mfi_bbu_indicators +ffffffff826261c0 r bwi_rf_calc_nrssi_slope_11b.save_phy_regs +ffffffff826261f0 r chv_oa_mux_regs +ffffffff82626210 r fiji_clock_stretcher_lookup_table +ffffffff82626210 r tonga_clock_stretcher_lookup_table +ffffffff82626240 r link_speed +ffffffff82626240 r link_speed +ffffffff82626240 r link_speed +ffffffff82626280 r drm_fb_xfrm.default_dst_pitch +ffffffff82626280 r non_supported_protection +ffffffff82626380 r tgl_uy_revids +ffffffff826263d0 r bwi_phy_noise_11g_rev1 +ffffffff82626450 r cardslot_process_event.antonym_ev +ffffffff826264e0 r gen11_oa_mux_regs +ffffffff826265d0 r ddr2_cycle_tenths +ffffffff82626640 r rtw_intr_rx.ratetbl +ffffffff826266c0 r abm_config +ffffffff82626720 r getbootinfo.ports.30 +ffffffff82626780 r reg_offsets +ffffffff82626790 r bwi_rf_lo_measure_11g.rf_lo_adjust +ffffffff826267a0 r init_non_clock_fields.look_up +ffffffff826267b0 r uftdi_8u232am_getrate.roundoff +ffffffff82626800 r zyd_rx_data.rates +ffffffff82626810 r ieee80211_ra_valid_tx_mcs.max_mcs +ffffffff82626850 r mmio_invalidate_full.gen8_regs +ffffffff82626890 r bwi_phy_noise_11g +ffffffff826268a0 r hpt366_pio +ffffffff826268d0 r glk_revids +ffffffff82626920 r bwi_rf_calc_nrssi_slope_11g.save_phy3_regs +ffffffff82626940 r ether_crc32_be_update.rev +ffffffff82626940 r rtw_grf5101_mac_crypt.caesar +ffffffff82626990 r snb_b_fdi_train_param +ffffffff82627000 R qlw_switch +ffffffff82628000 R isp_2100_risc_code +ffffffff8263abf0 R isp_2200_risc_code +ffffffff8264d990 R isp_2300_risc_code +ffffffff82667408 R qla_switch +ffffffff82667430 r qla_regs_2100 +ffffffff82667460 r qla_regs_2200 +ffffffff82667490 r qla_regs_23XX +ffffffff82668000 R ahci_atascsi_methods +ffffffff82669000 R nvme_switch +ffffffff82669028 r nvme_ops +ffffffff8266a000 R mpi_switch +ffffffff8266a100 r intel_hpll_vco.elk_vco +ffffffff8266a160 r pin_offsets +ffffffff8266a1c0 r firmware_list +ffffffff8266a220 r atom_arg_shift +ffffffff8266a220 r atom_arg_shift +ffffffff8266a260 r pf_syncookie_wstab +ffffffff8266a280 r ieee80211_media_init.mopts +ffffffff8266a2e0 r add_entropy_words.twist_table +ffffffff8266a380 r urtw_8225v2_txpwr_cck +ffffffff8266a3c0 r bwfm_pci_prio2fifo +ffffffff8266a3c0 r ieee80211_up_to_ac.up_to_ac +ffffffff8266a480 r paritytab +ffffffff8266a480 r x86emu_parity_tab +ffffffff8266a4a0 r legacy_connector_convert +ffffffff8266a4e0 r gen7_oa_mux_regs +ffffffff8266a500 r hsw_oa_mux_regs +ffffffff8266a520 r notetab +ffffffff8266a540 r urtw_8225v2_txpwr_cck_ch14 +ffffffff8266a560 r bwi_rf_calibval.rf_calibvals +ffffffff8266a600 r pf_syncookie_msstab +ffffffff8266a660 r xgmi3x16_pcs_err_status_reg_aldebaran +ffffffff8266a6c0 r uath_wme_init.uath_wme_11g +ffffffff8266a6e0 r gen7_oa_b_counters +ffffffff8266a840 r icl_revids +ffffffff8266a900 r rtwn_iq_calib_run.reg_adda +ffffffff8266a940 r atom_def_dst +ffffffff8266a940 r atom_def_dst +ffffffff8266a980 r sha256_initial_hash_value +ffffffff8266a9e0 r otus_edca_def +ffffffff8266aa00 r intel_hpll_vco.blb_vco +ffffffff8266aac0 r epic_pci_subsys_info +ffffffff8266aae0 r atom_arg_mask +ffffffff8266aae0 r atom_arg_mask +ffffffff8266ab40 r butmap +ffffffff8266ab80 r GFX_RLC_SRM_INDEX_CNTL_DATA_OFFSETS +ffffffff8266abc0 r comsoft.lsrmap +ffffffff8266ac00 r tulip_mii_phy_readspecific.table +ffffffff8266ac20 r kbl_revids +ffffffff8266ace0 r intel_hpll_vco.pnv_vco +ffffffff8266ad40 r dmapageport +ffffffff8266ae00 r intel_hpll_vco.ctg_vco +ffffffff8266aec0 r drm_calculate_luminance_range.pre_computed_values +ffffffff8266b000 R sili_atascsi_methods +ffffffff8266c000 R ncr53c9x_switch +ffffffff8266d000 r scf_period +ffffffff8266e000 R siop_script +ffffffff8266e5a0 R lun_switch +ffffffff8266e5d0 R tag_switch +ffffffff8266e660 R load_dsa +ffffffff8266e6c4 R siop_led_on +ffffffff8266e6cc R siop_led_off +ffffffff8266e6d8 R siop_switch +ffffffff8266f000 R ep_vortex_media +ffffffff8266f100 R ep_default_to_media +ffffffff82670000 R wi_card_ident +ffffffff82672000 R ucode_table +ffffffff82673000 r re_revisions +ffffffff82673290 r re_kstats_tpl +ffffffff82675000 R smc91cxx_media +ffffffff82675010 R smc91cxx_mii_bitbang_ops +ffffffff82676000 R dl10019_mii_bitbang_ops +ffffffff82676028 R dl10022_mii_bitbang_ops +ffffffff82677000 R ax88190_mii_bitbang_ops +ffffffff82679000 R ac97_audio_default +ffffffff82679020 R ac97_on_off +ffffffff82679324 R ac97_mic_select +ffffffff82679628 R ac97_mono_select +ffffffff8267992c R ac97_source +ffffffff82679c30 R ac97_volume_stereo +ffffffff82679c4c R ac97_volume_mono +ffffffff82679c70 R source_info +ffffffff8267a470 R ac97_ad +ffffffff8267a580 R ac97_ak +ffffffff8267a610 R ac97_av +ffffffff8267a750 R ac97_rl +ffffffff8267a7a0 R ac97_cm +ffffffff8267a820 R ac97_cr +ffffffff8267a840 R ac97_cs +ffffffff8267a920 R ac97_cx +ffffffff8267a980 R ac97_dt +ffffffff8267a9a0 R ac97_em +ffffffff8267a9d0 R ac97_es +ffffffff8267a9f0 R ac97_is +ffffffff8267aa10 R ac97_ic +ffffffff8267aa90 R ac97_it +ffffffff8267aac0 R ac97_ns +ffffffff8267ab80 R ac97_ps +ffffffff8267abb0 R ac97_sl +ffffffff8267abd0 R ac97_st +ffffffff8267ad20 R ac97_vi +ffffffff8267ad50 R ac97_tt +ffffffff8267add0 R ac97_ti +ffffffff8267adf0 R ac97_wb +ffffffff8267ae10 R ac97_wo +ffffffff8267aea0 R ac97_ym +ffffffff8267aef0 R ac97_vendors +ffffffff8267b1f0 R ac97enhancement +ffffffff8267b2f0 R ac97feature +ffffffff8267c000 R lm_chips +ffffffff8267c020 R lm78_sensors +ffffffff8267c1a0 R w83627hf_sensors +ffffffff8267c3a0 R w83627ehf_sensors +ffffffff8267c5c0 R w83627dhg_sensors +ffffffff8267c7c0 R nct6776f_sensors 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dtps_static +ffffffff826bd000 R db_show_all_cmds +ffffffff826bd180 R db_show_cmds +ffffffff826bd4c0 R db_boot_cmds +ffffffff826bd5a0 R db_command_table +ffffffff826be000 R ddb_vars +ffffffff826bf000 R audio_ca +ffffffff826bf028 R audioctlread_filtops +ffffffff826bf058 R audiowrite_filtops +ffffffff826bf088 R audioread_filtops +ffffffff826c0000 R midi_ca +ffffffff826c0028 R midiwrite_filtops +ffffffff826c0058 R midiread_filtops +ffffffff826c1000 r mulawtolin16 +ffffffff826c1200 r lintomulaw +ffffffff826c2000 R randomread_filtops +ffffffff826c2030 R randomwrite_filtops +ffffffff826c3000 R video_ca +ffffffff826c3028 R video_filtops +ffffffff826c4000 R cd9660_vfsops +ffffffff826c5000 R cd9660_vops +ffffffff826c5110 R cd9660_specvops +ffffffff826c5220 R cd9660_fifovops +ffffffff826c5330 R cd9660read_filtops +ffffffff826c5360 R cd9660write_filtops +ffffffff826c5390 R cd9660vnode_filtops +ffffffff826c6000 R udf_vfsops +ffffffff826c7000 R udf_vops +ffffffff826c7110 r mon_lens +ffffffff826c8000 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tc_vars +ffffffff826d9000 r sys_gettimeofday.zerotz +ffffffff826da000 r taskq_sys_name +ffffffff826da006 r taskq_sys_mp_name +ffffffff826da010 R systq +ffffffff826da018 R systqmp +ffffffff826dc000 r gpt_get_fstype.gpt_uuid_openbsd +ffffffff826dc010 r gpt_get_fstype.gpt_uuid_msdos +ffffffff826dc020 r gpt_get_fstype.gpt_uuid_chromerootfs +ffffffff826dc030 r gpt_get_fstype.gpt_uuid_linux +ffffffff826dc040 r gpt_get_fstype.gpt_uuid_hfs +ffffffff826dc050 r gpt_get_fstype.gpt_uuid_unused +ffffffff826dc060 r gpt_get_fstype.gpt_uuid_efi_system +ffffffff826dc070 r gpt_get_fstype.gpt_uuid_bios_boot +ffffffff826dd000 r hiballoc_addr_RBT_INFO +ffffffff826dd018 R hiballoc_addr_RBT_TYPE +ffffffff826de000 R logread_filtops +ffffffff826df000 r phtree_RBT_INFO +ffffffff826df018 R phtree_RBT_TYPE +ffffffff826df020 r pool_lock_ops_rw +ffffffff826df058 r pool_lock_ops_mtx +ffffffff826e0000 r pselregister.evf +ffffffff826e000c r pselregister.evff +ffffffff826e1000 R pipe_rfiltops +ffffffff826e1030 R pipe_wfiltops +ffffffff826e1060 R pipe_efiltops +ffffffff826e1090 r pipeops +ffffffff826e2000 R socketops +ffffffff826e3000 R sysvsem_vars +ffffffff826e4000 R char_type +ffffffff826e4100 R ttyread_filtops +ffffffff826e4130 R ttywrite_filtops +ffffffff826e4160 R ttyexcept_filtops +ffffffff826e5000 R ptcread_filtops +ffffffff826e5030 R ptcwrite_filtops +ffffffff826e5060 R ptcexcept_filtops +ffffffff826e7000 R domains +ffffffff826e8000 R unixdomain +ffffffff826e8050 R unixsw +ffffffff826e9000 R solisten_filtops +ffffffff826e9030 R soread_filtops +ffffffff826e9060 R sowrite_filtops +ffffffff826e9090 R soexcept_filtops +ffffffff826e90c0 R socket_klistops +ffffffff826ea000 R sun_noname +ffffffff826ea010 R uipc_usrreqs +ffffffff826ea0b0 R uipc_dgram_usrreqs +ffffffff826ea150 R unpstctl_vars +ffffffff826ea180 R unpsqctl_vars +ffffffff826ea1b0 R unpdgctl_vars +ffffffff826eb000 r namecache_rb_cache_RBT_INFO +ffffffff826eb018 R namecache_rb_cache_RBT_TYPE +ffffffff826ec000 R generic_filtops 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egre_tree_RBT_INFO +ffffffff82709068 R egre_tree_RBT_TYPE +ffffffff82709070 r nvgre_ucast_tree_RBT_INFO +ffffffff82709088 R nvgre_ucast_tree_RBT_TYPE +ffffffff82709090 r nvgre_mcast_tree_RBT_INFO +ffffffff827090a8 R nvgre_mcast_tree_RBT_TYPE +ffffffff827090b0 r eoip_tree_RBT_INFO +ffffffff827090c8 R eoip_tree_RBT_TYPE +ffffffff827090d0 r nvgre_etherbridge_ops +ffffffff8270a000 r trunk_protos +ffffffff8270b000 R ethermulticastaddr_slowprotocols +ffffffff8270b006 R lacp_info_tlv_template +ffffffff8270b00e R marker_info_tlv_template +ffffffff8270b012 R marker_response_tlv_template +ffffffff8270b020 R lacp_timer_funcs +ffffffff8270c000 r lacp_rxm_state_names +ffffffff8270c040 r lacp_rxm_event_names +ffffffff8270c090 r aggr_port_selected_names +ffffffff8270c0b0 r lacp_mux_state_names +ffffffff8270c0e0 r lacp_mux_event_names +ffffffff8270c128 r lacp_address_slow +ffffffff8270d000 r tpmr_pf_ipv4 +ffffffff8270d018 r tpmr_pf_ipv6 +ffffffff8270e000 r bpe_tree_RBT_INFO +ffffffff8270e018 R bpe_tree_RBT_TYPE +ffffffff8270e020 r bpe_etherbridge_ops +ffffffff8270f000 R pppx_rd_filtops +ffffffff8270f030 R pppx_wr_filtops +ffffffff8270f060 r pppx_ifs_RBT_INFO +ffffffff8270f078 R pppx_ifs_RBT_TYPE +ffffffff8270f080 r pppac_rd_filtops +ffffffff8270f0b0 r pppac_wr_filtops +ffffffff82710000 r vxlan_peers_RBT_INFO +ffffffff82710018 R vxlan_peers_RBT_TYPE +ffffffff82710020 r vxlan_etherbridge_ops +ffffffff82711000 R stoeplitz_cache +ffffffff82712000 R ieee80211_std_rateset_11a +ffffffff82712010 R ieee80211_std_rateset_11b +ffffffff82712020 R ieee80211_std_rateset_11g +ffffffff82712030 R ieee80211_std_ratesets_11n +ffffffff827123b0 R ieee80211_std_ratesets_11ac +ffffffff827126b0 r ieee80211_setbasicrates.basic +ffffffff82712710 r ieee80211_setmode.chanflags +ffffffff82712730 r ieee80211_rate2media.rates +ffffffff827128c0 r ieee80211_media2rate.ieeerates +ffffffff82713000 r Sbox +ffffffff82715000 r ieee80211_ioctl.empty_macaddr +ffffffff82716000 r ieee80211_find_rxnode.zero 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auth_hash_hmac_sha2_256_128 +ffffffff827363a0 R auth_hash_hmac_sha2_384_192 +ffffffff827363e8 R auth_hash_hmac_sha2_512_256 +ffffffff82736430 R auth_hash_gmac_aes_128 +ffffffff82736478 R auth_hash_gmac_aes_192 +ffffffff827364c0 R auth_hash_gmac_aes_256 +ffffffff82736508 R auth_hash_chacha20_poly1305 +ffffffff82736550 R comp_algo_deflate +ffffffff82737000 r IV +ffffffff82738000 r idgen32_ftable +ffffffff82739000 r Chacha20_Poly1305_Update.zeroes +ffffffff82739010 r pad0 +ffffffff8273a000 r null_point +ffffffff8273a020 r base_point +ffffffff8273b000 R mplsdomain +ffffffff8273c000 R mplsctl_vars +ffffffff8273d000 r nfs_nodetree_RBT_INFO +ffffffff8273d018 R nfs_nodetree_RBT_TYPE +ffffffff8273e000 r nfsread_filtops +ffffffff8273e030 r nfswrite_filtops +ffffffff8273e060 r nfsvnode_filtops +ffffffff8273f000 r nfsrv_v3errmap +ffffffff8273f0b0 r nfsrv_v2errmap +ffffffff82740000 R nfs_vfsops +ffffffff82741000 R nfs_vops +ffffffff82741110 R nfs_specvops +ffffffff82741220 R nfs_fifovops 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uaddr_free_rbtree_RBT_TYPE +ffffffff8274f000 R aobj_pager +ffffffff82750000 R uvm_deviceops +ffffffff82751000 R kv_any +ffffffff82751018 R kv_intrsafe +ffffffff82751030 R kv_page +ffffffff82751048 R kp_dirty +ffffffff82751070 R kp_dma +ffffffff82751098 R kp_dma_contig +ffffffff827510c0 R kp_dma_zero +ffffffff827510e8 R kp_zero +ffffffff82751110 R kp_pageable +ffffffff82751138 R kp_none +ffffffff82751160 R kd_waitok +ffffffff82751178 R kd_nowait +ffffffff82751190 R kd_trylock +ffffffff82752000 R vmmapbsy +ffffffff82752010 r page_flagbits +ffffffff827520a8 r uvm_map_addr_RBT_INFO +ffffffff827520c0 R uvm_map_addr_RBT_TYPE +ffffffff82753000 R pmap_pager +ffffffff82753048 R bufcache_pager +ffffffff82754000 r uvm_objtree_RBT_INFO +ffffffff82754018 R uvm_objtree_RBT_TYPE +ffffffff82755000 r uvm_pmr_addr_RBT_INFO +ffffffff82755018 R uvm_pmr_addr_RBT_TYPE +ffffffff82755020 r uvm_pmr_size_RBT_INFO +ffffffff82755038 R uvm_pmr_size_RBT_TYPE +ffffffff82755040 r uvm_pmemrange_addr_RBT_INFO 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x86_soft_intr_to_ssir +ffffffff82778000 R Xexceptions +ffffffff82778100 r spl_lowered +ffffffff8277812d R i8259_stubs +ffffffff827782ad R ioapic_edge_stubs +ffffffff827788ad R ioapic_level_stubs +ffffffff82779000 R _stac +ffffffff82779003 R _clac +ffffffff8277a000 R x86_bus_space_io_ops +ffffffff8277a130 R x86_bus_space_mem_ops +ffffffff8277b000 ? cpu_spinup_trampoline +ffffffff8277b0b6 R cpu_spinup_trampoline_end +ffffffff8277b0b6 R mp_tramp_data_start +ffffffff8277b0fc R mp_tramp_data_end +ffffffff8277d000 R db_acpi_cmds +ffffffff8277d0a0 R db_machine_command_table +ffffffff8277e000 r i8254_delay.delaytab +ffffffff8277f000 R rasops_cmap +ffffffff8277f300 R rasops_isgray +ffffffff82780000 r reverse +ffffffff82780100 r ibm437_level1 +ffffffff82780230 r ibm437_level2_0 +ffffffff82780248 r ibm437_level2_1 +ffffffff82780260 r ibm437_level2_3 +ffffffff82780278 r ibm437_level2_32 +ffffffff82780290 r ibm437_level2_34 +ffffffff827802a8 r ibm437_level2_35 +ffffffff827802c0 r ibm437_level2_37 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virtio_device_name +ffffffff827c7000 R vio_ca +ffffffff827c7030 r virtio_net_feature_names +ffffffff827c8000 R vioblk_ca +ffffffff827c8028 R vioblk_switch +ffffffff827c9000 R viomb_ca +ffffffff827c9030 r viomb_feature_names +ffffffff827ca000 R viornd_ca +ffffffff827cb000 R vioscsi_ca +ffffffff827cb028 R vioscsi_switch +ffffffff827cb050 R vioscsi_vq_names +ffffffff827cc000 R vmmci_ca +ffffffff827cd000 R pci_ca +ffffffff827ce000 r pci_quirks +ffffffff827cf000 R pci_subclass_prehistoric +ffffffff827cf050 R pci_subclass_mass_storage +ffffffff827cf160 R pci_subclass_network +ffffffff827cf250 R pci_subclass_display +ffffffff827cf2d0 R pci_subclass_multimedia +ffffffff827cf360 R pci_subclass_memory +ffffffff827cf3c0 R pci_subclass_bridge +ffffffff827cf510 R pci_subclass_communications +ffffffff827cf5d0 R pci_subclass_system +ffffffff827cf6c0 R pci_subclass_input +ffffffff827cf770 R pci_subclass_dock +ffffffff827cf7c0 R pci_subclass_processor +ffffffff827cf880 R pci_subclass_serialbus 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adw_asc38C0800_mcode +ffffffff827fa888 R adw_asc38C0800_mcode_data +ffffffff827fa8a0 R adw_asc38C1600_mcode +ffffffff827fc160 R adw_asc38C1600_mcode_data +ffffffff827fd000 R twe_pci_ca +ffffffff827fd028 R twe_pci_devices +ffffffff827fe000 R arc_ca +ffffffff827fe028 R arc_switch +ffffffff827fe050 r arc_devices +ffffffff827fe190 r arc_intel +ffffffff827fe198 r arc_marvell +ffffffff827fe1a0 r arc_lsi +ffffffff827fe1a8 r arc_marvell2 +ffffffff827ff000 R jmb_ca +ffffffff827ff030 r jmb_devices +ffffffff82800000 R ahci_pci_ca +ffffffff82800028 R ahci_jmb_ca +ffffffff82800050 r ahci_devices +ffffffff82801000 R nvme_pci_ca +ffffffff82801028 r nvme_msi_blacklist +ffffffff82802000 R ami_pci_ca +ffffffff82802030 r ami_pci_subsys +ffffffff82802270 r ami_pci_vendors +ffffffff82803000 R mfi_pci_ca +ffffffff82803030 r mfi_pci_devices +ffffffff82804000 R mfii_ca +ffffffff82804028 R mfii_switch +ffffffff82804050 R mfii_pd_switch +ffffffff82804078 R mfii_iop_thunderbolt +ffffffff82804088 R mfii_iop_25 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ciss_pci_devices +ffffffff82813000 R qlw_pci_ca +ffffffff82813030 r qlw_devices +ffffffff82813050 r isp_1040_risc_code +ffffffff828189f0 r isp_1080_risc_code +ffffffff82820470 r isp_12160_risc_code +ffffffff82828000 R qla_pci_ca +ffffffff82828030 r qla_devices +ffffffff82829000 R qle_ca +ffffffff82829028 R qle_switch +ffffffff82829050 r qle_devices +ffffffff82829070 r isp_2400_risc_code +ffffffff82858a50 r isp_2500_risc_code +ffffffff8288b000 R mpi_pci_ca +ffffffff8288b030 r mpi_devices +ffffffff8288c000 R mpii_ca +ffffffff8288c028 R mpii_switch +ffffffff8288c050 r mpii_devices +ffffffff8288d000 R sili_pci_ca +ffffffff8288d030 r sili_devices +ffffffff8288e000 R aq_devices +ffffffff8288e040 R aq_products +ffffffff8288e100 R aq_fw1x_ops +ffffffff8288e120 R aq_fw2x_ops +ffffffff8288e140 R aq_ca +ffffffff8288f000 R de_ca +ffffffff8288f030 r tulip_srom_conninfo +ffffffff8288f120 r tulip_mii_phy_attrlist +ffffffff8288f1e0 r tulip_21140_znyx_zx34x_boardsw +ffffffff8288f208 r tulip_21040_10baset_only_boardsw +ffffffff8288f230 r tulip_21040_boardsw +ffffffff8288f258 r tulip_2114x_isv_boardsw +ffffffff8288f280 r tulip_21140_smc9332_boardsw +ffffffff8288f2a8 r tulip_21040_auibnc_only_boardsw +ffffffff8288f2d0 r tulip_21140_cogent_em100_boardsw +ffffffff8288f2f8 r tulip_21140_accton_boardsw +ffffffff8288f320 r tulip_21140_eb_boardsw +ffffffff8288f348 r tulip_21041_boardsw +ffffffff8288f370 r tulip_srom_mediums +ffffffff8288f3c0 r tulip_read_macaddr.testpat +ffffffff8288f3d0 r tulip_vendors +ffffffff8288f480 r tulip_media_to_ifmedia +ffffffff8288f4e0 r tulip_chipdescs +ffffffff82890000 R ep_pci_ca +ffffffff82890030 R ep_pci_devices +ffffffff82891000 R pcn_ca +ffffffff82891028 R pcn_devices +ffffffff82891030 r pcn_79c970_rcvfw +ffffffff82891050 r pcn_79c970_xmtsp +ffffffff82891070 r pcn_79c970_xmtfw +ffffffff82891090 r pcn_79c971_rcvfw +ffffffff828910b0 r pcn_79c971_xmtsp_sram +ffffffff828910d0 r pcn_79c971_xmtsp +ffffffff828910f0 r pcn_79c971_xmtfw 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acard_rec_pio +ffffffff828958b7 r nforce_udma +ffffffff828958be r nforce_pio +ffffffff828958c3 r ixp_mdma_timings +ffffffff828958c6 r ixp_pio_timings +ffffffff82896000 R ppb_ca +ffffffff82897000 R cy_pci_ca +ffffffff82897030 R cy_pci_devices +ffffffff82898000 R rl_pci_ca +ffffffff82898030 R rl_pci_devices +ffffffff82899000 R re_pci_devices +ffffffff82899030 R re_pci_ca +ffffffff8289a000 R vr_ca +ffffffff8289b000 R txp_ca +ffffffff8289b030 R txp_devices +ffffffff8289c000 r cards +ffffffff8289d000 r format_params +ffffffff8289d1a0 r pixfmt_table +ffffffff8289d320 r meteor_pixfmt_table +ffffffff8289e000 R bktr_ca +ffffffff8289e028 R bktr_hw_if +ffffffff8289f000 r tuners +ffffffff8289f170 r freqTable +ffffffff8289f260 r nabcst +ffffffff8289f2a0 r irccable +ffffffff8289f310 r hrccable +ffffffff8289f380 r weurope +ffffffff8289f420 r jpnbcst +ffffffff8289f460 r jpncable +ffffffff8289f4c0 r xussr +ffffffff8289f530 r australia +ffffffff8289f590 r france +ffffffff828a0000 R xl_pci_ca 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ixl_phy_type_map +ffffffff828a9770 r ixl_speed_type_map +ffffffff828a97b0 r ixl_hmc_pack_rxq +ffffffff828a9830 r ixl_hmc_pack_txq +ffffffff828a98a0 r ixl_sfp_ops +ffffffff828a98b8 r ixl_qsfp_ops +ffffffff828aa000 R xge_ca +ffffffff828aa028 R xge_devices +ffffffff828aa030 r xge_fix_mac +ffffffff828aa110 r xge_xena_dtx_cfg +ffffffff828aa170 r xge_herc_dtx_cfg +ffffffff828ab000 R thtc_ca +ffffffff828ab028 R tht_ca +ffffffff828ab050 r thtc_devices +ffffffff828ab068 r tht_link_state.interval +ffffffff828ac000 R myx_ca +ffffffff828ac028 R myx_devices +ffffffff828ad000 R oce_ca +ffffffff828ad030 R oce_devices +ffffffff828ae000 R dc_pci_ca +ffffffff828af000 R epic_pci_ca +ffffffff828af028 R epic_pci_devices +ffffffff828b0000 R ti_pci_ca +ffffffff828b0030 R ti_devices +ffffffff828b1000 R ne_pci_ca +ffffffff828b1030 R ne_pci_prod +ffffffff828b2000 R gem_pci_ca +ffffffff828b2030 R gem_pci_devices +ffffffff828b2050 r gem_promhdr +ffffffff828b2052 r gem_promdat +ffffffff828b205a r gem_promdat2 +ffffffff828b3000 R cas_ca +ffffffff828b3028 R cas_pci_devices +ffffffff828b3030 r cas_promhdr +ffffffff828b3032 r cas_promdat_sun +ffffffff828b303a r cas_promdat_ns +ffffffff828b3042 r cas_promdat2 +ffffffff828b4000 R sf_pci_ca +ffffffff828b4028 R sf_pci_products +ffffffff828b5000 R sis_ca +ffffffff828b5028 R sis_devices +ffffffff828b6000 R se_devices +ffffffff828b6008 R se_ca +ffffffff828b7000 R uhci_pci_ca +ffffffff828b8000 R ohci_pci_ca +ffffffff828b9000 R ehci_pci_ca +ffffffff828ba000 R xhci_pci_ca +ffffffff828bb000 R cbb_pci_ca +ffffffff828bb028 r pccbb_pcmcia_do_io_map.pcic_iowidth +ffffffff828bc000 R skc_devices +ffffffff828bc030 R skc_ca +ffffffff828bc058 R sk_ca +ffffffff828bd000 R mskc_devices +ffffffff828bd0a8 R mskc_ca +ffffffff828bd0d0 R msk_ca +ffffffff828bd100 r msk_mib +ffffffff828be000 R puc_pci_ca +ffffffff828bf000 R puc_devs +ffffffff828c4000 R com_puc_ca +ffffffff828c4030 r puc_port_types +ffffffff828c5000 R lpt_puc_ca +ffffffff828c6000 R wi_pci_ca +ffffffff828c6030 r wi_pci_products +ffffffff828c7000 R an_pci_ca +ffffffff828c7030 R an_pci_devices +ffffffff828c8000 R iwi_devices +ffffffff828c8010 R iwi_ca +ffffffff828c9000 R wpi_ca +ffffffff828c9028 r wpi_devices +ffffffff828c9030 r wpi_rates +ffffffff828c9050 r wpi_rf_gain_5ghz +ffffffff828c90a0 r wpi_dsp_gain_5ghz +ffffffff828c90f0 r wpi_rf_gain_2ghz +ffffffff828c9140 r wpi_dsp_gain_2ghz +ffffffff828c9190 r wpi_pmgt +ffffffff828c9310 r wpi_bands +ffffffff828ca000 R iwn_mcs2ridx +ffffffff828ca020 R iwn_ca +ffffffff828ca050 r iwn_devices +ffffffff828ca0e8 r iwn4965_sensitivity_limits +ffffffff828ca124 r iwn5000_sensitivity_limits +ffffffff828ca160 r iwn5150_sensitivity_limits +ffffffff828ca19c r iwn1000_sensitivity_limits +ffffffff828ca1d8 r iwn6000_sensitivity_limits +ffffffff828ca214 r iwn2000_sensitivity_limits +ffffffff828ca250 r iwn_fw_errmsg +ffffffff828ca340 r iwn4965_set_txpower.tdiv +ffffffff828ca360 r iwn4965_rf_gain_5ghz +ffffffff828ca3d0 r iwn4965_dsp_gain_5ghz +ffffffff828ca440 r iwn4965_dsp_gain_2ghz +ffffffff828ca4b0 r iwn_pmgt +ffffffff828ca6f0 r iwn4965_post_alive.qid2fifo +ffffffff828ca700 r iwn_bands +ffffffff828ca770 r iwn_rates +ffffffff828ca820 r iwn4965_rf_gain_2ghz +ffffffff828cb000 R iwm_nvm_channels +ffffffff828cb030 R iwm_nvm_channels_8000 +ffffffff828cb070 R iwm_rates +ffffffff828cb0d0 R iwm_ht_mcs2ridx +ffffffff828cb110 R iwm_tid_to_ac +ffffffff828cb118 R iwm_ac_to_tx_fifo +ffffffff828cb120 R iwm_nvm_to_read +ffffffff828cb144 r iwm_set_hw_address_8000.reserved_mac +ffffffff828cb180 r iwm_sf_full_timeout +ffffffff828cb1b0 r iwm_sf_full_timeout_def +ffffffff828cb1e0 r advanced_lookup +ffffffff828cb320 r iwm_devices +ffffffff828cb360 R iwm_ca +ffffffff828cc000 R iwx_9560_quz_a0_jf_b0_cfg +ffffffff828cc020 R iwx_9560_qu_c0_jf_b0_cfg +ffffffff828cc040 R iwx_qu_b0_hr1_b0 +ffffffff828cc060 R iwx_qu_b0_hr_b0 +ffffffff828cc080 R iwx_ax201_cfg_qu_hr +ffffffff828cc0a0 R iwx_qu_c0_hr1_b0 +ffffffff828cc0c0 R iwx_qu_c0_hr_b0 +ffffffff828cc0e0 R iwx_ax201_cfg_qu_c0_hr_b0 +ffffffff828cc100 R iwx_quz_a0_hr1_b0 +ffffffff828cc120 R iwx_ax201_cfg_quz_hr +ffffffff828cc140 R iwx_cfg_so_a0_hr_b0 +ffffffff828cc160 R iwx_cfg_quz_a0_hr_b0 +ffffffff828cc180 R iwx_2ax_cfg_so_gf_a0 +ffffffff828cc1a0 R iwx_2ax_cfg_so_gf_a0_long +ffffffff828cc1c0 R iwx_2ax_cfg_so_gf4_a0 +ffffffff828cc1e0 R iwx_2ax_cfg_so_gf4_a0_long +ffffffff828cc200 R iwx_2ax_cfg_ty_gf_a0 +ffffffff828cc220 R iwx_2ax_cfg_so_jf_b0 +ffffffff828cc240 R iwx_nvm_channels_8000 +ffffffff828cc280 R iwx_rates +ffffffff828cc2e0 R iwx_mcs2ridx +ffffffff828cc320 R iwx_tid_to_ac +ffffffff828cc328 R iwx_ac_to_tx_fifo +ffffffff828cc330 r iwx_nvm_channels_uhb +ffffffff828cc39e r iwx_is_valid_mac_addr.reserved_mac +ffffffff828cc3b0 r iwx_sf_full_timeout +ffffffff828cc3e0 r iwx_sf_full_timeout_def +ffffffff828cc410 r advanced_lookup +ffffffff828cc550 r iwx_devices +ffffffff828cc590 r iwx_dev_info_table +ffffffff828ccde8 R iwx_ca +ffffffff828cd000 R cmpci_ca +ffffffff828cd028 R cmpci_hw_if +ffffffff828cd0e0 r cmpci_rate_table +ffffffff828cd120 R cmpci_devices +ffffffff828cd130 r cmpci_query_devinfo.mixer_port_names +ffffffff828cd160 r cmpci_query_devinfo.mixer_classes +ffffffff828ce000 R iha_pci_ca +ffffffff828ce028 R iha_switch +ffffffff828cf000 R pcscp_ca +ffffffff828d0000 R bge_ca +ffffffff828d0030 R bge_devices +ffffffff828d01b0 r bge_revisions +ffffffff828d0610 r bge_majorrevs +ffffffff828d1000 R bnx_devices +ffffffff828d1020 R bnx_ca +ffffffff828d2000 R vge_ca +ffffffff828d2028 R vge_devices +ffffffff828d3000 R stge_ca +ffffffff828d3028 R stge_mii_bitbang_ops +ffffffff828d3050 R stge_devices +ffffffff828d4000 R nfe_ca +ffffffff828d4030 R nfe_devices +ffffffff828d5000 R et_devices +ffffffff828d5008 R et_ca +ffffffff828d6000 R jme_devices +ffffffff828d6008 R jme_ca +ffffffff828d7000 R age_devices +ffffffff828d7008 R age_ca +ffffffff828d8000 R alc_devices +ffffffff828d8038 R alc_ca +ffffffff828d9000 R ale_devices +ffffffff828d9008 R ale_ca +ffffffff828da000 R amdpm_ca +ffffffff828da030 R amdpm_ids +ffffffff828db000 R bce_ca +ffffffff828db028 R bce_devices +ffffffff828dc000 R ath_pci_ca +ffffffff828dd000 R athn_pci_ca +ffffffff828dd030 r athn_pci_devices +ffffffff828de000 R atw_pci_ca +ffffffff828de028 R atw_pci_devices +ffffffff828df000 R rtw_pci_ca +ffffffff828df030 R rtw_pci_products +ffffffff828e0000 R rtwn_pci_ca +ffffffff828e0030 r rtwn_pci_devices +ffffffff828e0040 r rtl8188eu_mac +ffffffff828e01b0 r rtl8192cu_mac +ffffffff828e0310 r rtl8192ce_mac +ffffffff828e0458 r rtl8188eu_bb_prog +ffffffff828e0480 r rtl8723a_bb_prog +ffffffff828e04a8 r rtl8192ce_bb_prog_1t +ffffffff828e04d0 r rtl8192ce_bb_prog_2t +ffffffff828e0500 r rtl8188eu_bb_regs +ffffffff828e0680 r rtl8188eu_bb_vals +ffffffff828e0980 r rtl8188eu_agc_vals +ffffffff828e0b80 r rtl8723a_bb_regs +ffffffff828e0d00 r rtl8723a_bb_vals +ffffffff828e0ff0 r rtl8192ce_agc_vals +ffffffff828e1270 r rtl8192ce_bb_regs +ffffffff828e13f0 r rtl8192ce_bb_vals_1t +ffffffff828e16e0 r rtl8192ce_bb_vals_2t +ffffffff828e2000 R ral_pci_ca +ffffffff828e2030 R ral_pci_devices +ffffffff828e3000 R acx_pci_ca +ffffffff828e3028 R acx_pci_devices +ffffffff828e4000 R pgt_pci_ca +ffffffff828e4028 R pgt_pci_devices +ffffffff828e5000 R malo_pci_ca +ffffffff828e5028 R malo_pci_devices +ffffffff828e6000 R bwi_pci_ca +ffffffff828e6030 R bwi_pci_devices +ffffffff828e7000 R piixpm_ca +ffffffff828e7030 R piixpm_ids +ffffffff828e8000 R vic_ca +ffffffff828e8028 R vic_devices +ffffffff828e9000 R vmx_devices +ffffffff828e9008 R vmx_ca +ffffffff828e9030 r vmx_tx_kstat_tpl +ffffffff828e90d0 r vmx_kstat_rate +ffffffff828e90e0 r vmx_rx_kstat_tpl +ffffffff828ea000 R vmwpvs_ca +ffffffff828ea028 R vmwpvs_switch +ffffffff828eb000 R lii_ca +ffffffff828eb028 R lii_devices +ffffffff828ec000 R ichiic_ca +ffffffff828ec030 R ichiic_ids +ffffffff828ed000 R viapm_ca +ffffffff828ed030 R viapm_ids +ffffffff828ed070 r val_to_temp +ffffffff828ed870 r val_to_uV.mult +ffffffff828ee000 R amdiic_ca +ffffffff828ee028 R amdiic_ids +ffffffff828ef000 R nviic_ca +ffffffff828ef030 R nviic_ids +ffffffff828f0000 R sdhc_pci_ca +ffffffff828f1000 R kate_ca +ffffffff828f1030 r kate_proc +ffffffff828f2000 R km_ca +ffffffff828f2030 r km_devices +ffffffff828f3000 R ksmn_ca +ffffffff828f3030 r ksmn_devices +ffffffff828f4000 R itherm_devices +ffffffff828f4008 R itherm_ca +ffffffff828f5000 R pchtemp_ca +ffffffff828f5030 R pchtemp_devices +ffffffff828f6000 R rtsx_pci_ca +ffffffff828f7000 R xspd_ca +ffffffff828f7028 R xspd_devices +ffffffff828f8000 R virtio_pci_ca +ffffffff828f9000 R dwiic_pci_ca +ffffffff828f9030 R dwiic_pci_ids +ffffffff828fa000 R bwfm_pci_ca +ffffffff828fa030 r bwfm_pci_devices +ffffffff828fb000 R ccp_pci_ca +ffffffff828fb030 r ccp_pci_devices +ffffffff828fc000 R bnxt_devices +ffffffff828fc040 R bnxt_ca +ffffffff828fd000 R mcx_ca +ffffffff828fd030 r mcx_devices +ffffffff828fd060 r mcx_rss_config +ffffffff828fd0d0 r mcx_eth_cap_map +ffffffff828fd2d0 r mcx_kstat_ppcnt_ieee8023 +ffffffff828fd2e8 r mcx_kstat_ppcnt_rfc2863 +ffffffff828fd300 r mcx_kstat_ppcnt_rfc2819 +ffffffff828fd318 r mcx_kstat_ppcnt_rfc3635 +ffffffff828fd330 r mcx_ppcnt_ieee8023_tpl +ffffffff828fd4b0 r mcx_ppcnt_rfc2863_tpl +ffffffff828fd5c0 r mcx_ppcnt_rfc2819_tpl +ffffffff828fd770 r mcx_ppcnt_rfc3635_tpl +ffffffff828fd8b0 r mcx_kstat_mtmp_tpl +ffffffff828fd950 r mcx_kstat_mtmp_rate +ffffffff828fd960 r mcx_queue_kstat_tpl +ffffffff828fe000 R iavf_ca +ffffffff828fe030 r iavf_devices +ffffffff828fe040 r iavf_aq_regs +ffffffff828fe0b0 r iavf_link_speeds +ffffffff828ff000 R rge_ca +ffffffff828ff028 R rge_devices +ffffffff828ff030 r rtl8125_mac_cfg2_ephy +ffffffff828ff090 r rge_phy_config_mac_cfg3.mac_cfg3_a438_value +ffffffff828ff0b0 r rge_phy_config_mac_cfg3.mac_cfg3_b88e_value +ffffffff828ff110 r rge_phy_config_mac_cfg4.mac_cfg4_b87c_value +ffffffff828ff170 r rtl8125_mac_cfg4_ephy +ffffffff828ff1e0 r rtl8125_mac_cfg2_mcu +ffffffff828ffe80 r rtl8125_mac_cfg3_mcu +ffffffff82900720 r rtl8125_mac_cfg4_mcu +ffffffff82902d10 r rtl8125_mac_cfg5_mcu +ffffffff82903c10 r rtl8125_mac_bps +ffffffff82903f80 r rtl8125b_mac_bps +ffffffff82904120 r rge_kstats_tpl +ffffffff82905000 R igc_devices +ffffffff82905040 R igc_ca +ffffffff82906000 R com_pci_ca +ffffffff82906030 R com_pci_ids +ffffffff82907000 r agp_attach.agp_max +ffffffff82907048 R agp_ca +ffffffff82908000 R intagp_ca +ffffffff82909000 r drm_plane_create_rotation_property.props +ffffffff8290a000 r drm_bridge_priv_state_funcs +ffffffff8290c000 r color_encoding_name +ffffffff8290c020 r color_range_name +ffffffff8290d000 r drm_subpixel_enum_list +ffffffff8290d060 r drm_dpms_enum_list +ffffffff8290d0a0 r drm_dvi_i_select_enum_list +ffffffff8290d0d0 r drm_dvi_i_subconnector_enum_list +ffffffff8290d100 r drm_tv_select_enum_list +ffffffff8290d150 r drm_tv_subconnector_enum_list +ffffffff8290d1a0 r drm_dp_subconnector_enum_list +ffffffff8290d210 r drm_link_status_enum_list +ffffffff8290d230 r drm_scaling_mode_enum_list +ffffffff8290d270 r drm_aspect_ratio_enum_list +ffffffff8290d2a0 r hdmi_colorspaces +ffffffff8290d370 r dp_colorspaces +ffffffff8290d450 r drm_content_type_enum_list +ffffffff8290d4a0 r drm_panel_orientation_enum_list +ffffffff8290d4e0 r privacy_screen_enum +ffffffff8290e000 r drm_crtc_fence_ops +ffffffff8290f000 r drm_dmt_modes +ffffffff82911940 r edid_cea_modes_1 +ffffffff829154d0 r edid_cea_modes_193 +ffffffff82916180 r edid_quirk_list +ffffffff82916350 r edid_4k_modes +ffffffff829165b0 r edid_est_modes +ffffffff82916db0 r est3_modes +ffffffff82916f10 r stereo_mandatory_modes +ffffffff82916f90 r extra_modes +ffffffff82917000 r drm_encoder_enum_list +ffffffff82918000 r drm_fbdev_client_funcs +ffffffff82918020 r drm_fb_helper_generic_funcs +ffffffff82918028 r drm_fbdev_fb_ops +ffffffff82919000 r drm_fb_xrgb8888_to_rgb332.dst_pixsize +ffffffff82919004 r drm_fb_xrgb8888_to_rgb565.dst_pixsize +ffffffff82919008 r drm_fb_xrgb8888_to_rgb888.dst_pixsize +ffffffff8291900c r drm_fb_xrgb8888_to_xrgb2101010.dst_pixsize +ffffffff82919010 r drm_fb_xrgb8888_to_gray8.dst_pixsize +ffffffff82919014 r drm_fb_rgb888_to_xrgb8888.dst_pixsize +ffffffff82919018 r drm_fb_rgb565_to_xrgb8888.dst_pixsize +ffffffff8291a000 r __drm_format_info.formats +ffffffff8291b000 R drm_pgops +ffffffff8291c000 r drm_ioctls +ffffffff8291e000 r dma_fence_stub_ops +ffffffff8291e038 R dma_fence_array_ops +ffffffff8291e070 R dma_fence_chain_ops +ffffffff8291e0a8 R dmabufops +ffffffff8291e0e0 R syncfileops +ffffffff8291f000 r drm_plane_type_enum_list +ffffffff82920000 r drm_mode_status_names +ffffffff82921000 r primary_plane_funcs +ffffffff82921068 r safe_modeset_formats +ffffffff82922000 r orientation_data +ffffffff82924f08 r lcd800x1280_rightside_up +ffffffff82924f20 r lcd720x1280_rightside_up +ffffffff82924f38 r asus_t100ha +ffffffff82924f50 r lcd1080x1920_leftside_up +ffffffff82924f68 r lcd1200x1920_rightside_up +ffffffff82924f80 r gpd_micropc +ffffffff82924f98 r gpd_pocket +ffffffff82924fb0 r gpd_pocket2 +ffffffff82924fc8 r gpd_win +ffffffff82924fe0 r gpd_win2 +ffffffff82924ff8 r itworks_tw891 +ffffffff82925010 r onegx1_pro +ffffffff82925028 r lcd1600x2560_leftside_up +ffffffff82925040 r lcd1280x1920_rightside_up +ffffffff82925058 r .compoundliteral +ffffffff82925068 r .compoundliteral.5 +ffffffff82925090 r .compoundliteral.9 +ffffffff829250b0 r .compoundliteral.17 +ffffffff829250f0 r .compoundliteral.21 +ffffffff82925110 r .compoundliteral.23 +ffffffff82925120 r .compoundliteral.25 +ffffffff82926000 r drm_gem_prime_dmabuf_ops +ffffffff82928000 r is_hdmi_adaptor.dp_dual_mode_hdmi_id +ffffffff82929000 r drm_dp_phy_name.phy_names +ffffffff82929048 r drm_dp_i2c_algo +ffffffff82929058 r drm_dp_i2c_lock_ops +ffffffff82929070 r dp_aux_bl_ops +ffffffff82929090 r dpcd_quirk_list +ffffffff82929320 r drm_dp_psr_setup_time.psr_setup_time_us +ffffffff8292a000 R drm_dp_mst_topology_state_funcs +ffffffff8292a020 r drm_dp_mst_req_type_str.req_type_str +ffffffff8292a1f0 r drm_dp_mst_sideband_tx_state_str.sideband_reason_str +ffffffff8292a220 r drm_dp_mst_nak_reason_str.nak_reason_str +ffffffff8292a278 r drm_dp_mst_i2c_algo +ffffffff8292b000 r hdmi_colorimetry_val +ffffffff8292c000 r ttm_bo_init_reserved.sys_mem +ffffffff8292d000 r ttm_bo_pipeline_gutting.sys_mem +ffffffff8292e018 R ttm_bo_vm_ops +ffffffff8292f000 r ttm_range_manager_func +ffffffff82930018 r ttm_kmap_iter_io_ops +ffffffff82930030 r ttm_kmap_iter_linear_io_ops +ffffffff82931000 r ttm_sys_manager_func +ffffffff82932000 r ttm_kmap_iter_tt_ops +ffffffff82933000 r drm_sched_fence_ops_scheduled +ffffffff82933038 r drm_sched_fence_ops_finished +ffffffff82934000 R ch7017_ops +ffffffff82935000 R ch7xxx_ops +ffffffff82935060 r ch7xxx_ids +ffffffff82936000 R ivch_ops +ffffffff82936060 r backup_addresses +ffffffff82937000 R ns2501_ops +ffffffff82937060 r mode_agnostic_values +ffffffff829370e0 r ns2501_modes +ffffffff82938000 R sil164_ops +ffffffff82939000 R tfp410_ops +ffffffff8293a000 r chv_dpll +ffffffff8293a050 r vlv_dpll +ffffffff8293a0a0 r g4x_dpll +ffffffff8293a0f0 r pch_dpll +ffffffff8293a138 r intel_dp_enc_funcs +ffffffff8293b000 r intel_hdmi_enc_funcs +ffffffff8293c000 r vlv_primary_formats +ffffffff8293c030 r ivb_primary_formats +ffffffff8293c050 r i965_primary_formats +ffffffff8293c070 r i8xx_primary_formats +ffffffff8293c080 r i965_plane_funcs +ffffffff8293c0e8 r i8xx_plane_funcs +ffffffff8293d000 r gen11_dsi_encoder_funcs +ffffffff8293d020 r gen11_dsi_connector_funcs +ffffffff8293d098 r gen11_dsi_connector_helper_funcs +ffffffff8293d0e8 r gen11_dsi_host_ops +ffffffff8293e000 r intel_plane_helper_funcs +ffffffff8293f000 r g4x_audio_funcs +ffffffff8293f010 r ilk_audio_funcs +ffffffff8293f020 r hsw_audio_funcs +ffffffff8293f030 r hdmi_audio_clock +ffffffff8293f0a0 r dp_aud_n_m +ffffffff8293f250 r hdmi_aud_ncts_36bpp +ffffffff8293f330 r hdmi_aud_ncts_30bpp +ffffffff8293f410 r hdmi_aud_ncts_24bpp +ffffffff82940000 r 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i830_info +ffffffff829ac160 r i845g_info +ffffffff829ac220 r i85x_info +ffffffff829ac2e0 r i865g_info +ffffffff829ac3a0 r i915g_info +ffffffff829ac460 r i915gm_info +ffffffff829ac520 r i945g_info +ffffffff829ac5e0 r i945gm_info +ffffffff829ac6a0 r i965g_info +ffffffff829ac760 r g33_info +ffffffff829ac820 r i965gm_info +ffffffff829ac8e0 r gm45_info +ffffffff829ac9a0 r g45_info +ffffffff829aca60 r pnv_g_info +ffffffff829acb20 r pnv_m_info +ffffffff829acbe0 r ilk_d_info +ffffffff829acca0 r ilk_m_info +ffffffff829acd60 r snb_d_gt1_info +ffffffff829ace20 r snb_d_gt2_info +ffffffff829acee0 r snb_m_gt1_info +ffffffff829acfa0 r snb_m_gt2_info +ffffffff829ad060 r ivb_q_info +ffffffff829ad120 r ivb_m_gt1_info +ffffffff829ad1e0 r ivb_m_gt2_info +ffffffff829ad2a0 r ivb_d_gt1_info +ffffffff829ad360 r ivb_d_gt2_info +ffffffff829ad420 r hsw_gt1_info +ffffffff829ad4e0 r hsw_gt2_info +ffffffff829ad5a0 r hsw_gt3_info +ffffffff829ad660 r vlv_info +ffffffff829ad720 r bdw_gt1_info +ffffffff829ad7e0 r bdw_gt2_info +ffffffff829ad8a0 r bdw_gt3_info +ffffffff829ad960 r bdw_rsvd_info +ffffffff829ada20 r chv_info +ffffffff829adae0 r skl_gt1_info +ffffffff829adba0 r skl_gt2_info +ffffffff829adc60 r skl_gt3_info +ffffffff829add20 r skl_gt4_info +ffffffff829adde0 r bxt_info +ffffffff829adea0 r glk_info +ffffffff829adf60 r kbl_gt1_info +ffffffff829ae020 r kbl_gt2_info +ffffffff829ae0e0 r kbl_gt3_info +ffffffff829ae1a0 r cfl_gt1_info +ffffffff829ae260 r cfl_gt2_info +ffffffff829ae320 r cfl_gt3_info +ffffffff829ae3e0 r cml_gt1_info +ffffffff829ae4a0 r cml_gt2_info +ffffffff829ae560 r icl_info +ffffffff829ae620 r ehl_info +ffffffff829ae6e0 r jsl_info +ffffffff829ae7a0 r tgl_info +ffffffff829ae860 r rkl_info +ffffffff829ae920 r adl_s_info +ffffffff829ae9e0 r adl_p_info +ffffffff829aeaa0 r dg1_info +ffffffff829aeb60 r dg2_info +ffffffff829aec20 r ats_m_info +ffffffff829aece0 r xelpmp_extra_gt +ffffffff829aed20 r mtl_info +ffffffff829af000 r oa_formats +ffffffff829af060 r gen8_update_reg_state_unlocked.flex_regs +ffffffff829af080 r gen8_oa_mux_regs +ffffffff829af0a0 r gen12_oa_b_counters +ffffffff829af0e0 r gen12_oa_mux_regs +ffffffff829b0000 r i915_query_funcs +ffffffff829b1000 R i915_fence_ops +ffffffff829b2000 r rsgt_ops +ffffffff829b3000 r fence_ops +ffffffff829b4000 r i915_ttm_buddy_manager_func +ffffffff829b5000 r bind_ops +ffffffff829b6000 r platform_names +ffffffff829b6140 r subplatform_ult_ids +ffffffff829b7000 r intel_dram_type_str.str +ffffffff829b8000 r intel_region_map +ffffffff829ba000 r pvc_clock_gating_funcs +ffffffff829ba008 r dg2_clock_gating_funcs +ffffffff829ba010 r xehpsdv_clock_gating_funcs +ffffffff829ba018 r adlp_clock_gating_funcs +ffffffff829ba020 r dg1_clock_gating_funcs +ffffffff829ba028 r gen12lp_clock_gating_funcs +ffffffff829ba030 r icl_clock_gating_funcs +ffffffff829ba038 r cfl_clock_gating_funcs +ffffffff829ba040 r skl_clock_gating_funcs +ffffffff829ba048 r kbl_clock_gating_funcs +ffffffff829ba050 r bxt_clock_gating_funcs +ffffffff829ba058 r glk_clock_gating_funcs +ffffffff829ba060 r bdw_clock_gating_funcs +ffffffff829ba068 r chv_clock_gating_funcs +ffffffff829ba070 r hsw_clock_gating_funcs +ffffffff829ba078 r ivb_clock_gating_funcs +ffffffff829ba080 r vlv_clock_gating_funcs +ffffffff829ba088 r gen6_clock_gating_funcs +ffffffff829ba090 r ilk_clock_gating_funcs +ffffffff829ba098 r g4x_clock_gating_funcs +ffffffff829ba0a0 r i965gm_clock_gating_funcs +ffffffff829ba0a8 r i965g_clock_gating_funcs +ffffffff829ba0b0 r gen3_clock_gating_funcs +ffffffff829ba0b8 r i85x_clock_gating_funcs +ffffffff829ba0c0 r i830_clock_gating_funcs +ffffffff829ba0c8 r nop_clock_gating_funcs +ffffffff829ba0d0 r ilk_wm_funcs +ffffffff829ba108 r nop_funcs +ffffffff829ba140 r vlv_wm_funcs +ffffffff829ba178 r g4x_wm_funcs +ffffffff829ba1b0 r pnv_wm_funcs +ffffffff829ba1e8 r i965_wm_funcs +ffffffff829ba220 r i9xx_wm_funcs +ffffffff829ba258 r i845_wm_funcs +ffffffff829ba290 r cxsr_latency_table +ffffffff829bb000 r dg2_g10_revid_step_tbl +ffffffff829bb030 r dg2_g11_revid_step_tbl +ffffffff829bb050 r xehpsdv_revids +ffffffff829bb080 r adlp_revids +ffffffff829bb0c0 r adls_rpls_revids +ffffffff829bb100 r adls_revids +ffffffff829bb140 r rkl_revids +ffffffff829bb160 r bxt_revids +ffffffff829bb1a0 r skl_revids +ffffffff829bb1d0 r pvc_bd_subids +ffffffff829bb1f0 r pvc_ct_subids +ffffffff829bd000 r forcewake_domain_names +ffffffff829bd080 r __pvc_fw_ranges +ffffffff829bd200 r pvc_shadowed_regs +ffffffff829bd320 r __dg2_fw_ranges +ffffffff829bd5f0 r dg2_shadowed_regs +ffffffff829bd710 r __xehp_fw_ranges +ffffffff829bd9e0 r gen12_shadowed_regs +ffffffff829bdb00 r __gen12_fw_ranges +ffffffff829bdd10 r __gen11_fw_ranges +ffffffff829bdec0 r gen11_shadowed_regs +ffffffff829bdf80 r __gen9_fw_ranges +ffffffff829be100 r gen8_shadowed_regs +ffffffff829be130 r __chv_fw_ranges +ffffffff829be1f0 r __gen6_fw_ranges +ffffffff829be200 r __vlv_fw_ranges +ffffffff829be258 r uncore_get_fallback +ffffffff829be260 r uncore_get_normal +ffffffff829be268 r uncore_get_thread_status +ffffffff829bf000 r atom_op_names +ffffffff829bf3e0 r opcode_table +ffffffff829bfb90 r atom_dst_to_src +ffffffff829bfc10 r atom_io_names +ffffffff829bfc40 r atom_table_names +ffffffff829bfe90 r atom_iio_len +ffffffff829c0000 r vga_control_regs +ffffffff829c0018 r atombios_helper_funcs +ffffffff829c1000 r voltage_names +ffffffff829c1020 r pre_emph_names +ffffffff829c2000 r radeon_atom_backlight_ops +ffffffff829c2018 r radeon_atom_enc_funcs +ffffffff829c2038 r radeon_atom_dig_helper_funcs +ffffffff829c20a0 r radeon_atom_dac_helper_funcs +ffffffff829c2108 r radeon_atom_ext_helper_funcs +ffffffff829c3000 r caicos_cgcg_cgls_default +ffffffff829c3240 r barts_mgcg_default +ffffffff829c3900 r turks_mgcg_default +ffffffff829c3d80 r caicos_mgcg_default +ffffffff829c4110 r turks_sysls_default +ffffffff829c41d0 r caicos_sysls_default +ffffffff829c4280 r caicos_cgcg_cgls_enable +ffffffff829c44d0 r caicos_cgcg_cgls_disable +ffffffff829c4730 r barts_mgcg_enable +ffffffff829c47b0 r turks_mgcg_enable +ffffffff829c4830 r caicos_mgcg_enable +ffffffff829c48b0 r caicos_mgcg_disable +ffffffff829c4930 r turks_sysls_enable +ffffffff829c49f0 r caicos_sysls_enable +ffffffff829c4aa0 r turks_sysls_disable +ffffffff829c4b60 r caicos_sysls_disable +ffffffff829c5000 r didt_config_ci +ffffffff829c55b4 r defaults_bonaire_xt +ffffffff829c5600 r defaults_saturn_xt +ffffffff829c564c r defaults_hawaii_xt +ffffffff829c5698 r defaults_hawaii_pro +ffffffff829c6000 r ci_program_jump_on_start.data +ffffffff829c7000 r bonaire_io_mc_regs +ffffffff829c7120 r hawaii_io_mc_regs +ffffffff829c71d0 r mc_cg_registers +ffffffff829c7200 r bonaire_mgcg_cgcg_init +ffffffff829c75e0 r bonaire_golden_registers +ffffffff829c77d0 r bonaire_golden_common_registers +ffffffff829c7800 r bonaire_golden_spm_registers +ffffffff829c7810 r kalindi_mgcg_cgcg_init +ffffffff829c7ab0 r kalindi_golden_registers +ffffffff829c7c20 r kalindi_golden_common_registers +ffffffff829c7c50 r kalindi_golden_spm_registers +ffffffff829c7c60 r godavari_golden_registers +ffffffff829c7de0 r spectre_mgcg_cgcg_init +ffffffff829c8200 r spectre_golden_registers +ffffffff829c8330 r spectre_golden_common_registers +ffffffff829c8360 r spectre_golden_spm_registers +ffffffff829c8370 r hawaii_mgcg_cgcg_init +ffffffff829c8880 r hawaii_golden_registers +ffffffff829c8a30 r hawaii_golden_common_registers +ffffffff829c8a6c r hawaii_golden_spm_registers +ffffffff829c8a80 r spectre_rlc_save_restore_register_list +ffffffff829c9170 r kalindi_rlc_save_restore_register_list +ffffffff829c9680 r ci_cs_data +ffffffff829c96a0 r ci_SECT_CONTEXT_defs +ffffffff829c9720 r ci_SECT_CONTEXT_def_1 +ffffffff829c9a70 r ci_SECT_CONTEXT_def_3 +ffffffff829c9a90 r ci_SECT_CONTEXT_def_4 +ffffffff829c9d04 r ci_SECT_CONTEXT_def_5 +ffffffff829c9d0c r ci_SECT_CONTEXT_def_6 +ffffffff829c9d10 r ci_SECT_CONTEXT_def_2 +ffffffff829ca160 r ci_SECT_CONTEXT_def_7 +ffffffff829ca510 r cik_default_state +ffffffff829cc000 r dce3_2_afmt_write_sad_regs.eld_reg_to_type +ffffffff829cd000 r dce6_afmt_write_sad_regs.eld_reg_to_type +ffffffff829ce000 r ni_tx_offsets +ffffffff829ce020 r evergreen_dp_offsets +ffffffff829ce040 r evergreen_disp_int_status +ffffffff829ce060 r evergreen_golden_registers +ffffffff829ce260 r evergreen_golden_registers2 +ffffffff829ce310 r cypress_mgcg_init +ffffffff829cea10 r juniper_mgcg_init +ffffffff829cee80 r redwood_mgcg_init +ffffffff829cf1b0 r cedar_golden_registers +ffffffff829cf390 r cedar_mgcg_init +ffffffff829cf5f0 r wrestler_golden_registers +ffffffff829cf840 r supersumo_golden_registers +ffffffff829cfba0 r sumo_golden_registers +ffffffff829cfbe0 r barts_golden_registers +ffffffff829cfe00 r turks_golden_registers +ffffffff829d0040 r caicos_golden_registers +ffffffff829d0280 r sumo_rlc_save_restore_register_list +ffffffff829d03d0 r evergreen_cs_data +ffffffff829d0410 r SECT_CONTEXT_defs +ffffffff829d0490 r SECT_CLEAR_defs +ffffffff829d04b0 r SECT_CTRLCONST_defs +ffffffff829d04d0 r SECT_CONTEXT_def_2 +ffffffff829d04f0 r SECT_CONTEXT_def_4 +ffffffff829d0680 r SECT_CONTEXT_def_5 +ffffffff829d06a0 r SECT_CONTEXT_def_6 +ffffffff829d0780 r SECT_CONTEXT_def_1 +ffffffff829d0f20 r SECT_CONTEXT_def_3 +ffffffff829d1000 r SECT_CONTEXT_def_7 +ffffffff829d1488 r SECT_CLEAR_def_1 +ffffffff829d1494 r SECT_CTRLCONST_def_1 +ffffffff829d14a0 r evergreen_default_state +ffffffff829d2000 r cayman_reg_safe_bm +ffffffff829d4000 r evergreen_reg_safe_bm +ffffffff829d7000 r evergreen_hdmi_write_sad_regs.eld_reg_to_type +ffffffff829d8000 r didt_config_kv +ffffffff829d9000 r barts_io_mc_regs +ffffffff829d90f0 r turks_io_mc_regs +ffffffff829d91e0 r caicos_io_mc_regs +ffffffff829d92d0 r cayman_io_mc_regs +ffffffff829d93c0 r cayman_golden_registers +ffffffff829d9580 r cayman_golden_registers2 +ffffffff829d95d0 r dvst_golden_registers +ffffffff829d9860 r dvst_golden_registers2 +ffffffff829d9890 r scrapper_golden_registers +ffffffff829d9d70 r tn_rlc_save_restore_register_list +ffffffff829d9f60 r cayman_cs_data +ffffffff829d9fa0 r SECT_CONTEXT_defs +ffffffff829da020 r SECT_CLEAR_defs +ffffffff829da040 r SECT_CTRLCONST_defs +ffffffff829da060 r SECT_CONTEXT_def_2 +ffffffff829da080 r SECT_CONTEXT_def_4 +ffffffff829da210 r SECT_CONTEXT_def_5 +ffffffff829da230 r SECT_CONTEXT_def_1 +ffffffff829da9d0 r SECT_CONTEXT_def_3 +ffffffff829daab0 r SECT_CONTEXT_def_6 +ffffffff829dab90 r SECT_CONTEXT_def_7 +ffffffff829db018 r SECT_CLEAR_def_1 +ffffffff829db024 r SECT_CTRLCONST_def_1 +ffffffff829db030 r cayman_default_state +ffffffff829dc000 r cac_weights_cayman_xt +ffffffff829dc128 r cac_weights_cayman_pro +ffffffff829dc250 r cac_weights_cayman_le +ffffffff829dc380 r cayman_cgcg_cgls_default +ffffffff829dc5c0 r cayman_mgcg_default +ffffffff829dcf20 r cayman_sysls_default +ffffffff829dcff0 r cayman_cgcg_cgls_enable +ffffffff829dd240 r cayman_cgcg_cgls_disable +ffffffff829dd4a0 r cayman_mgcg_enable +ffffffff829dd520 r cayman_mgcg_disable +ffffffff829dd5a0 r cayman_sysls_enable +ffffffff829dd670 r cayman_sysls_disable +ffffffff829de000 r rn50_reg_safe_bm +ffffffff829de1a0 r r100_reg_safe_bm +ffffffff829df000 r r200_reg_safe_bm +ffffffff829e0000 r r300_reg_safe_bm +ffffffff829e1000 r r420_reg_safe_bm +ffffffff829e3000 r color_formats_table +ffffffff829e3480 r r600_reg_safe_bm +ffffffff829e6000 R r600_utc +ffffffff829e6040 R r600_dtc +ffffffff829e6080 r r600_encode_pci_lane_width.encoded_lanes +ffffffff829e8000 r r100_gfx_ring +ffffffff829e8070 r r300_gfx_ring +ffffffff829e80e0 r rv515_gfx_ring +ffffffff829e8150 r r600_gfx_ring +ffffffff829e81c0 r r600_dma_ring +ffffffff829e8230 r rv6xx_uvd_ring +ffffffff829e82a0 r rv770_uvd_ring +ffffffff829e8310 r evergreen_gfx_ring +ffffffff829e8380 r evergreen_dma_ring +ffffffff829e83f0 r cayman_gfx_ring +ffffffff829e8460 r cayman_dma_ring +ffffffff829e84d0 r cayman_uvd_ring +ffffffff829e8540 r trinity_vce_ring +ffffffff829e85b0 r si_gfx_ring +ffffffff829e8620 r si_dma_ring +ffffffff829e8690 r ci_gfx_ring +ffffffff829e8700 r ci_cp_ring +ffffffff829e8770 r ci_dma_ring +ffffffff829e87e0 r ci_vce_ring +ffffffff829e9000 r object_connector_convert +ffffffff829e9060 r supported_devices_connector_convert +ffffffff829e90a0 r supported_devices_connector_object_id_convert +ffffffff829e90c0 r thermal_controller_names +ffffffff829e9100 r pp_lib_thermal_controller_names +ffffffff829ea000 r pin_offsets +ffffffff829ea020 r radeon_audio_acr.hdmi_predefined_acr +ffffffff829ec000 r thermal_controller_names +ffffffff829ec020 r default_primarydac_adj +ffffffff829ec120 r default_tvdac_adj +ffffffff829ec220 r default_tmds_pll +ffffffff829ed000 r radeon_dp_connector_helper_funcs +ffffffff829ed050 r radeon_vga_connector_helper_funcs +ffffffff829ed0a0 r radeon_dvi_connector_helper_funcs +ffffffff829ed0f0 r radeon_tv_connector_helper_funcs +ffffffff829ed140 r radeon_lvds_connector_helper_funcs +ffffffff829ed190 r radeon_dp_connector_funcs +ffffffff829ed298 r radeon_lvds_bridge_connector_funcs +ffffffff829ed310 r radeon_vga_connector_funcs +ffffffff829ed388 r radeon_dvi_connector_funcs +ffffffff829ed400 r radeon_edp_connector_funcs +ffffffff829ed478 r radeon_tv_connector_funcs +ffffffff829ed4f0 r radeon_lvds_connector_funcs +ffffffff829ee000 r radeon_family_name +ffffffff829ee3f0 r radeon_px_quirk_list +ffffffff829ef000 r radeon_fb_funcs +ffffffff829ef018 r radeon_mode_funcs +ffffffff829ef060 r radeon_tmds_pll_enum_list +ffffffff829ef080 r radeon_tv_std_enum_list +ffffffff829ef100 r radeon_underscan_enum_list +ffffffff829ef130 r radeon_audio_enum_list +ffffffff829ef160 r radeon_dither_enum_list +ffffffff829ef180 r radeon_output_csc_enum_list +ffffffff829ef1c0 r radeon_crtc_funcs +ffffffff829ef280 r hpd_names +ffffffff829ef2b0 r encoder_names +ffffffff829ef3e0 r radeon_afmt_init.eg_offsets +ffffffff829f0000 r aux_offset +ffffffff829f1000 R radeondrm_ca +ffffffff829f1030 r pciidlist +ffffffff829f51d0 r kms_driver +ffffffff829f52c0 r radeon_ioctls_kms +ffffffff829f6000 r radeon_fb_helper_funcs +ffffffff829f6008 r radeonfb_ops +ffffffff829f7000 R radeon_fence_ops +ffffffff829f9000 R radeon_gem_object_funcs +ffffffff829f9060 r radeon_gem_vm_ops +ffffffff829fa000 r radeon_i2c_algo +ffffffff829fa010 r radeon_atom_i2c_algo +ffffffff829fb000 r legacy_helper_funcs +ffffffff829fc000 r radeon_backlight_ops +ffffffff829fc018 r radeon_legacy_lvds_enc_funcs +ffffffff829fc038 r radeon_legacy_lvds_helper_funcs +ffffffff829fc0a0 r radeon_legacy_tmds_int_enc_funcs +ffffffff829fc0c0 r radeon_legacy_tmds_int_helper_funcs +ffffffff829fc128 r radeon_legacy_primary_dac_enc_funcs +ffffffff829fc148 r radeon_legacy_primary_dac_helper_funcs +ffffffff829fc1b0 r radeon_legacy_tv_dac_enc_funcs +ffffffff829fc1d0 r radeon_legacy_tv_dac_helper_funcs +ffffffff829fc238 r radeon_legacy_tmds_ext_enc_funcs +ffffffff829fc258 r radeon_legacy_tmds_ext_helper_funcs +ffffffff829fd000 r SLOPE_value +ffffffff829fd030 r YCOEF_EN_value +ffffffff829fd060 r YCOEF_value +ffffffff829fd090 r available_tv_modes +ffffffff829fd110 r hor_timing_NTSC +ffffffff829fd150 r vert_timing_NTSC +ffffffff829fd190 r hor_timing_PAL +ffffffff829fd1d0 r vert_timing_PAL +ffffffff829ff000 r radeon_pm_state_type_name +ffffffff82a00000 r radeon_evict_flags.placements +ffffffff82a03000 r rs600_reg_safe_bm +ffffffff82a05000 r rv515_reg_safe_bm +ffffffff82a06000 r dll_speed_table +ffffffff82a07000 r r7xx_golden_registers +ffffffff82a07090 r r7xx_golden_dyn_gpr_registers +ffffffff82a07100 r rv770ce_golden_registers +ffffffff82a07160 r rv770_golden_registers +ffffffff82a071b0 r rv770_mgcg_init +ffffffff82a078f0 r rv730_golden_registers +ffffffff82a07950 r rv730_mgcg_init +ffffffff82a07ee0 r rv710_golden_registers +ffffffff82a07f30 r rv710_mgcg_init +ffffffff82a081d0 r rv740_golden_registers +ffffffff82a08360 r rv740_mgcg_init +ffffffff82a0a000 r rv730_smc_int_vectors +ffffffff82a0a040 r rv710_smc_int_vectors +ffffffff82a0a080 r rv740_smc_int_vectors +ffffffff82a0a0c0 r cypress_smc_int_vectors +ffffffff82a0a100 r caicos_smc_int_vectors +ffffffff82a0a140 r cayman_smc_int_vectors +ffffffff82a0b000 r tahiti_io_mc_regs +ffffffff82a0b120 r pitcairn_io_mc_regs +ffffffff82a0b240 r verde_io_mc_regs +ffffffff82a0b360 r oland_io_mc_regs +ffffffff82a0b480 r hainan_io_mc_regs +ffffffff82a0b5a0 r crtc_offsets +ffffffff82a0b5c0 r si_disp_int_status +ffffffff82a0b5e0 r tahiti_golden_registers +ffffffff82a0b760 r tahiti_golden_rlc_registers +ffffffff82a0b7b0 r tahiti_mgcg_cgcg_init +ffffffff82a0bd98 r tahiti_golden_registers2 +ffffffff82a0bdb0 r pitcairn_golden_registers +ffffffff82a0bf00 r pitcairn_golden_rlc_registers +ffffffff82a0bf40 r pitcairn_mgcg_cgcg_init +ffffffff82a0c3b0 r verde_golden_registers +ffffffff82a0c620 r verde_golden_rlc_registers +ffffffff82a0c660 r verde_mgcg_cgcg_init +ffffffff82a0cae0 r oland_golden_registers +ffffffff82a0cc30 r oland_golden_rlc_registers +ffffffff82a0cc70 r oland_mgcg_cgcg_init +ffffffff82a0d000 r hainan_golden_registers +ffffffff82a0d12c r hainan_golden_registers2 +ffffffff82a0d140 r hainan_mgcg_cgcg_init +ffffffff82a0d4b0 r verde_rlc_save_restore_register_list +ffffffff82a0d820 r si_cs_data +ffffffff82a0d840 r si_SECT_CONTEXT_defs +ffffffff82a0d8c0 r si_SECT_CONTEXT_def_1 +ffffffff82a0dc10 r si_SECT_CONTEXT_def_3 +ffffffff82a0dc30 r si_SECT_CONTEXT_def_4 +ffffffff82a0dea4 r si_SECT_CONTEXT_def_5 +ffffffff82a0dea8 r si_SECT_CONTEXT_def_6 +ffffffff82a0deb0 r si_SECT_CONTEXT_def_2 +ffffffff82a0e2f0 r si_SECT_CONTEXT_def_7 +ffffffff82a0e6a0 r mc_cg_registers +ffffffff82a0e6d0 r si_default_state +ffffffff82a0f000 r cac_weights_tahiti +ffffffff82a0f4d0 r lcac_tahiti +ffffffff82a0fba0 r cac_override_tahiti +ffffffff82a0fbb4 r powertune_data_tahiti +ffffffff82a0fbf0 r dte_data_tahiti +ffffffff82a0fcc0 r dte_data_new_zealand +ffffffff82a0fd90 r dte_data_malta +ffffffff82a0fe60 r lcac_pitcairn +ffffffff82a10530 r cac_override_pitcairn +ffffffff82a10544 r powertune_data_pitcairn +ffffffff82a10580 r lcac_cape_verde +ffffffff82a109d0 r cac_override_cape_verde +ffffffff82a109e4 r powertune_data_cape_verde +ffffffff82a10a20 r cac_weights_cape_verde_pro +ffffffff82a10ef0 r cac_weights_heathrow +ffffffff82a113c0 r cac_weights_chelsea_xt +ffffffff82a11890 r cac_weights_chelsea_pro +ffffffff82a11d60 r cac_weights_cape_verde +ffffffff82a12230 r cac_weights_mars_pro +ffffffff82a12700 r lcac_mars_pro +ffffffff82a12a60 r cac_override_oland +ffffffff82a12a74 r powertune_data_mars_pro +ffffffff82a12ab0 r cac_weights_mars_xt +ffffffff82a12f80 r cac_weights_oland_pro +ffffffff82a13450 r cac_weights_oland_xt +ffffffff82a13920 r lcac_oland +ffffffff82a13c7c r powertune_data_oland +ffffffff82a13cb8 r dte_data_oland +ffffffff82a13d90 r cac_weights_hainan +ffffffff82a14254 r powertune_data_hainan +ffffffff82a14290 r dte_data_aruba_pro +ffffffff82a14360 r dte_data_tahiti_pro +ffffffff82a14430 r dte_data_curacao_pro +ffffffff82a14500 r dte_data_neptune_xt +ffffffff82a145d0 r dte_data_sun_xt +ffffffff82a146a0 r dte_data_venus_xtx +ffffffff82a14770 r dte_data_venus_xt +ffffffff82a14840 r dte_data_venus_pro +ffffffff82a14910 r dte_data_mars_pro +ffffffff82a15000 r si_program_jump_on_start.data +ffffffff82a16000 r sumo_dtc +ffffffff82a17000 r trinity_mgcg_shls_default +ffffffff82a17380 r trinity_sysls_enable +ffffffff82a17450 r trinity_sysls_disable +ffffffff82a19000 r GC_BASE +ffffffff82a190a8 r HDP_BASE +ffffffff82a19150 r MMHUB_BASE +ffffffff82a191f8 r ATHUB_BASE +ffffffff82a192a0 r NBIO_BASE +ffffffff82a19348 r MP0_BASE +ffffffff82a193f0 r MP1_BASE +ffffffff82a19498 r DF_BASE +ffffffff82a19540 r OSSSYS_BASE +ffffffff82a195e8 r SDMA0_BASE +ffffffff82a19690 r SDMA1_BASE +ffffffff82a19738 r SDMA2_BASE +ffffffff82a197e0 r SDMA3_BASE +ffffffff82a19888 r SDMA4_BASE +ffffffff82a19930 r SMUIO_BASE +ffffffff82a199d8 r THM_BASE +ffffffff82a19a80 r UMC_BASE +ffffffff82a19b28 r VCN_BASE +ffffffff82a1a000 r amdgpu_afmt_predefined_acr +ffffffff82a1b000 r atom_op_names +ffffffff82a1b3e0 r opcode_table +ffffffff82a1bbd0 r atom_dst_to_src +ffffffff82a1bc50 r atom_io_names +ffffffff82a1bc80 r atom_table_names +ffffffff82a1bed0 r atom_iio_len +ffffffff82a1c000 r object_connector_convert +ffffffff82a1c058 R amdgpu_vbios_version_attr_group +ffffffff82a1d000 r voltage_names +ffffffff82a1d020 r pre_emph_names +ffffffff82a1e000 r amdgpu_atombios_encoder_backlight_ops +ffffffff82a20000 r amdgpu_benchmark.common_modes +ffffffff82a21000 r amdgpu_cgs_ops +ffffffff82a22000 r amdgpu_connector_dp_helper_funcs +ffffffff82a22050 r amdgpu_connector_vga_helper_funcs +ffffffff82a220a0 r amdgpu_connector_dvi_helper_funcs +ffffffff82a220f0 r amdgpu_connector_lvds_helper_funcs +ffffffff82a22140 r amdgpu_connector_dp_funcs +ffffffff82a221c0 r amdgpu_connector_add_common_modes.common_modes +ffffffff82a22248 r amdgpu_connector_edp_funcs +ffffffff82a222c0 r amdgpu_connector_vga_funcs +ffffffff82a22338 r amdgpu_connector_dvi_funcs +ffffffff82a223b0 r amdgpu_connector_lvds_funcs +ffffffff82a24000 R amdgpu_ctx_num_entities +ffffffff82a25000 r amdgpu_device_ip_reinit_late_sriov.ip_order +ffffffff82a26000 r hw_id_map +ffffffff82a26090 r hw_id_names +ffffffff82a27000 r hpd_names +ffffffff82a27030 r encoder_names +ffffffff82a27180 r dcc_retile_formats +ffffffff82a27270 r dcc_formats +ffffffff82a27360 R amdgpu_mode_funcs +ffffffff82a273b0 r amdgpu_underscan_enum_list +ffffffff82a273e0 r amdgpu_audio_enum_list +ffffffff82a27410 r amdgpu_dither_enum_list +ffffffff82a27430 r amdgpu_fb_funcs +ffffffff82a28000 R amdgpu_dmabuf_ops +ffffffff82a29000 R amdgpu_ioctls_kms +ffffffff82a29210 R amdgpu_ca +ffffffff82a29240 r pciidlist +ffffffff82a2a110 r amdgpu_unsupported_pciidlist +ffffffff82a2a690 r amdgpu_kms_driver +ffffffff82a2b000 r amdgpu_job_fence_ops +ffffffff82a2b038 r amdgpu_fence_ops +ffffffff82a2c000 r amdgpu_gem_object_funcs +ffffffff82a2c060 r amdgpu_gem_vm_ops +ffffffff82a2e000 R amdgpu_gtt_mgr_attr_group +ffffffff82a2e018 r amdgpu_gtt_mgr_func +ffffffff82a2f000 r amdgpu_atombios_i2c_algo +ffffffff82a30000 R amdgpu_sched_ops +ffffffff82a33000 r amdgpu_vram_names +ffffffff82a34000 r amdgpu_preempt_mgr_func +ffffffff82a35000 R psp_ip_funcs +ffffffff82a350a0 R psp_v3_1_ip_block +ffffffff82a350b8 R psp_v10_0_ip_block +ffffffff82a350d0 R psp_v11_0_ip_block +ffffffff82a350e8 R psp_v11_0_8_ip_block +ffffffff82a35100 R psp_v12_0_ip_block +ffffffff82a35118 R psp_v13_0_ip_block +ffffffff82a35130 R psp_v13_0_4_ip_block +ffffffff82a37000 r amdgpu_evict_flags.placements +ffffffff82a3b000 R amdgpu_vkms_ip_block +ffffffff82a3d000 R amdgpu_vm_cpu_funcs +ffffffff82a3f000 R amdgpu_vm_sdma_funcs +ffffffff82a40000 R amdgpu_vram_mgr_attr_group +ffffffff82a40018 r amdgpu_vram_mgr_func +ffffffff82a41000 r xgmi_pcs_err_status_reg_arct +ffffffff82a42000 r GC_BASE +ffffffff82a420c0 r HDP_BASE +ffffffff82a42180 r MMHUB_BASE +ffffffff82a42240 r ATHUB_BASE +ffffffff82a42300 r NBIF0_BASE +ffffffff82a423c0 r MP0_BASE +ffffffff82a42480 r MP1_BASE +ffffffff82a42540 r UVD_BASE +ffffffff82a42600 r DF_BASE +ffffffff82a426c0 r OSSSYS_BASE +ffffffff82a42780 r SDMA0_BASE +ffffffff82a42840 r SDMA1_BASE +ffffffff82a42900 r SDMA2_BASE +ffffffff82a429c0 r SDMA3_BASE +ffffffff82a42a80 r SDMA4_BASE +ffffffff82a42b40 r SDMA5_BASE +ffffffff82a42c00 r SDMA6_BASE +ffffffff82a42cc0 r SDMA7_BASE +ffffffff82a42d80 r SMUIO_BASE +ffffffff82a42e40 r THM_BASE +ffffffff82a42f00 r UMC_BASE +ffffffff82a42fc0 r RSMU_BASE +ffffffff82a44000 r cz_ih_ip_funcs +ffffffff82a440a0 R cz_ih_ip_block +ffffffff82a440b8 r cz_ih_funcs +ffffffff82a45000 r crtc_offsets +ffffffff82a45020 r dce_v10_0_ip_funcs +ffffffff82a450c0 R dce_v10_0_ip_block +ffffffff82a450d8 R dce_v10_1_ip_block +ffffffff82a450f0 r dce_v10_0_display_funcs +ffffffff82a45150 r hpd_offsets +ffffffff82a45168 r dce_v10_0_encoder_funcs +ffffffff82a45188 r dce_v10_0_dac_helper_funcs +ffffffff82a451f0 r dce_v10_0_dig_helper_funcs +ffffffff82a45258 r dce_v10_0_ext_helper_funcs +ffffffff82a452c0 r dce_v10_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82a452f0 r dce_v10_0_crtc_irq_funcs +ffffffff82a45300 r dce_v10_0_pageflip_irq_funcs +ffffffff82a45310 r dce_v10_0_hpd_irq_funcs +ffffffff82a45320 r interrupt_status_offsets +ffffffff82a45380 r dce_v10_0_crtc_funcs +ffffffff82a45440 r dce_v10_0_crtc_helper_funcs +ffffffff82a454c0 r vga_control_regs +ffffffff82a454e0 r dig_offsets +ffffffff82a45500 r pin_offsets +ffffffff82a45520 r fiji_mgcg_cgcg_init +ffffffff82a45540 r golden_settings_fiji_a10 +ffffffff82a45570 r tonga_mgcg_cgcg_init +ffffffff82a45590 r golden_settings_tonga_a11 +ffffffff82a46000 r crtc_offsets +ffffffff82a46020 r dce_v11_0_ip_funcs +ffffffff82a460c0 R dce_v11_0_ip_block +ffffffff82a460d8 R dce_v11_2_ip_block +ffffffff82a460f0 r dce_v11_0_display_funcs +ffffffff82a46150 r hpd_offsets +ffffffff82a46168 r dce_v11_0_encoder_funcs +ffffffff82a46188 r dce_v11_0_dac_helper_funcs +ffffffff82a461f0 r dce_v11_0_dig_helper_funcs +ffffffff82a46258 r dce_v11_0_ext_helper_funcs +ffffffff82a462c0 r dce_v11_0_audio_write_sad_regs.eld_reg_to_type +ffffffff82a462f0 r dce_v11_0_crtc_irq_funcs +ffffffff82a46300 r dce_v11_0_pageflip_irq_funcs +ffffffff82a46310 r dce_v11_0_hpd_irq_funcs +ffffffff82a46320 r interrupt_status_offsets +ffffffff82a46380 r dce_v11_0_crtc_funcs +ffffffff82a46440 r dce_v11_0_crtc_helper_funcs +ffffffff82a464c0 r vga_control_regs +ffffffff82a464e0 r dig_offsets +ffffffff82a46510 r cz_mgcg_cgcg_init +ffffffff82a46530 r cz_golden_settings_a11 +ffffffff82a46550 r stoney_golden_settings_a11 +ffffffff82a46570 r polaris11_golden_settings_a11 +ffffffff82a465b0 r polaris10_golden_settings_a11 +ffffffff82a47000 R df_v1_7_funcs +ffffffff82a47070 r df_v1_7_channel_number +ffffffff82a48000 R df_v3_6_funcs +ffffffff82a48070 r df_v3_6_channel_number +ffffffff82a49000 r GC_BASE +ffffffff82a490a8 r HDP_BASE +ffffffff82a49150 r MMHUB_BASE +ffffffff82a491f8 r ATHUB_BASE +ffffffff82a492a0 r NBIO_BASE +ffffffff82a49348 r MP0_BASE +ffffffff82a493f0 r MP1_BASE +ffffffff82a49498 r VCN0_BASE +ffffffff82a49540 r DF_BASE +ffffffff82a495e8 r DCN_BASE +ffffffff82a49690 r OSSSYS_BASE +ffffffff82a49738 r SMUIO_BASE +ffffffff82a497e0 r THM_BASE +ffffffff82a4a000 r gfx_v10_0_ip_funcs +ffffffff82a4a0a0 R gfx_v10_0_ip_block +ffffffff82a4a0b8 r gfx_v10_0_kiq_pm4_funcs +ffffffff82a4a0f8 r gfx_v10_0_ring_funcs_kiq +ffffffff82a4a218 r gfx_v10_0_ring_funcs_gfx +ffffffff82a4a338 r gfx_v10_0_ring_funcs_compute +ffffffff82a4a458 r gfx_v10_0_eop_irq_funcs +ffffffff82a4a468 r gfx_v10_0_kiq_irq_funcs +ffffffff82a4a478 r gfx_v10_0_priv_reg_irq_funcs +ffffffff82a4a488 r gfx_v10_0_priv_inst_irq_funcs +ffffffff82a4a498 r gfx_v10_0_rlc_funcs +ffffffff82a4a500 r gfx_v10_0_rlc_funcs_sriov +ffffffff82a4a570 r gfx10_cs_data +ffffffff82a4a590 r gfx10_SECT_CONTEXT_defs +ffffffff82a4a620 r gfx10_SECT_CONTEXT_def_1 +ffffffff82a4a980 r gfx10_SECT_CONTEXT_def_3 +ffffffff82a4a990 r gfx10_SECT_CONTEXT_def_4 +ffffffff82a4ac08 r gfx10_SECT_CONTEXT_def_5 +ffffffff82a4ac10 r gfx10_SECT_CONTEXT_def_6 +ffffffff82a4ac20 r gfx10_SECT_CONTEXT_def_2 +ffffffff82a4b060 r gfx10_SECT_CONTEXT_def_7 +ffffffff82a4b170 r gfx10_SECT_CONTEXT_def_8 +ffffffff82a4b4a0 r gfx_v10_0_gfx_funcs +ffffffff82a4b4e0 r golden_settings_gc_rlc_spm_10_0_nv10 +ffffffff82a51780 r golden_settings_gc_rlc_spm_10_1_nv14 +ffffffff82a551a0 r golden_settings_gc_rlc_spm_10_1_2_nv12 +ffffffff82a5b440 r golden_settings_gc_10_1 +ffffffff82a5b800 r golden_settings_gc_10_0_nv10 +ffffffff82a5b800 r golden_settings_gc_10_1_1 +ffffffff82a5bb90 r golden_settings_gc_10_1_2 +ffffffff82a5bb90 r golden_settings_gc_10_1_nv14 +ffffffff82a5bf80 r golden_settings_gc_10_1_2_nv12 +ffffffff82a5bf80 r golden_settings_gc_10_3 +ffffffff82a5c388 r golden_settings_gc_10_3_sienna_cichlid +ffffffff82a5c390 r golden_settings_gc_10_3_2 +ffffffff82a5c780 r golden_settings_gc_10_3_vangogh +ffffffff82a5c9e0 r golden_settings_gc_10_3_3 +ffffffff82a5cbc0 r golden_settings_gc_10_3_4 +ffffffff82a5cf20 r golden_settings_gc_10_3_5 +ffffffff82a5d220 r golden_settings_gc_10_0_cyan_skillfish +ffffffff82a5d550 r golden_settings_gc_10_3_6 +ffffffff82a5d760 r golden_settings_gc_10_3_7 +ffffffff82a5e000 r gfx_v11_0_ip_funcs +ffffffff82a5e0a0 R gfx_v11_0_ip_block +ffffffff82a5e0b8 r gfx_v11_0_kiq_pm4_funcs +ffffffff82a5e0f8 r gfx_v11_0_ring_funcs_kiq +ffffffff82a5e218 r gfx_v11_0_ring_funcs_gfx +ffffffff82a5e338 r gfx_v11_0_ring_funcs_compute +ffffffff82a5e458 r gfx_v11_0_eop_irq_funcs +ffffffff82a5e468 r gfx_v11_0_priv_reg_irq_funcs +ffffffff82a5e478 r gfx_v11_0_priv_inst_irq_funcs +ffffffff82a5e488 r gfx_v11_0_rlc_funcs +ffffffff82a5e4f0 r gfx11_cs_data +ffffffff82a5e510 r gfx11_SECT_CONTEXT_defs +ffffffff82a5e590 r gfx11_SECT_CONTEXT_def_1 +ffffffff82a5e8f0 r gfx11_SECT_CONTEXT_def_3 +ffffffff82a5e900 r gfx11_SECT_CONTEXT_def_5 +ffffffff82a5e908 r gfx11_SECT_CONTEXT_def_6 +ffffffff82a5e910 r gfx11_SECT_CONTEXT_def_2 +ffffffff82a5ed50 r gfx11_SECT_CONTEXT_def_4 +ffffffff82a5efd0 r gfx11_SECT_CONTEXT_def_7 +ffffffff82a5f438 r gfx_v11_0_gfx_funcs +ffffffff82a5f480 r golden_settings_gc_11_0_1 +ffffffff82a60000 r gfx_v8_0_ip_funcs +ffffffff82a600a0 R gfx_v8_0_ip_block +ffffffff82a600b8 R gfx_v8_1_ip_block +ffffffff82a600d0 r gfx_v8_0_gfx_funcs +ffffffff82a60110 r gfx_v8_0_ring_funcs_kiq +ffffffff82a60230 r gfx_v8_0_ring_funcs_gfx +ffffffff82a60350 r gfx_v8_0_ring_funcs_compute +ffffffff82a60470 r amdgpu_gds_reg_offset +ffffffff82a60570 r gfx_v8_0_eop_irq_funcs +ffffffff82a60580 r gfx_v8_0_priv_reg_irq_funcs +ffffffff82a60590 r gfx_v8_0_priv_inst_irq_funcs +ffffffff82a605a0 r gfx_v8_0_cp_ecc_error_irq_funcs +ffffffff82a605b0 r gfx_v8_0_sq_irq_funcs +ffffffff82a605c0 r sq_edc_source_names +ffffffff82a605f8 r iceland_rlc_funcs +ffffffff82a60660 r vi_cs_data +ffffffff82a60680 r vi_SECT_CONTEXT_defs +ffffffff82a60700 r vi_SECT_CONTEXT_def_1 +ffffffff82a60a50 r vi_SECT_CONTEXT_def_3 +ffffffff82a60a70 r vi_SECT_CONTEXT_def_4 +ffffffff82a60ce4 r vi_SECT_CONTEXT_def_5 +ffffffff82a60cec r vi_SECT_CONTEXT_def_6 +ffffffff82a60cf0 r vi_SECT_CONTEXT_def_2 +ffffffff82a61140 r vi_SECT_CONTEXT_def_7 +ffffffff82a614f0 r vgpr_init_compute_shader +ffffffff82a61600 r vgpr_init_regs +ffffffff82a61690 r sgpr1_init_regs +ffffffff82a61720 r sgpr2_init_regs +ffffffff82a617b0 r sec_ded_counter_registers +ffffffff82a61820 r iceland_mgcg_cgcg_init +ffffffff82a61b20 r golden_settings_iceland_a11 +ffffffff82a61be0 r iceland_golden_common_all +ffffffff82a61c40 r fiji_mgcg_cgcg_init +ffffffff82a61df0 r golden_settings_fiji_a10 +ffffffff82a61e80 r fiji_golden_common_all +ffffffff82a61f00 r tonga_mgcg_cgcg_init +ffffffff82a62290 r golden_settings_tonga_a11 +ffffffff82a62350 r tonga_golden_common_all +ffffffff82a623b0 r golden_settings_vegam_a11 +ffffffff82a62480 r vegam_golden_common_all +ffffffff82a624d0 r golden_settings_polaris11_a11 +ffffffff82a625a0 r polaris11_golden_common_all +ffffffff82a625f0 r golden_settings_polaris10_a11 +ffffffff82a626c0 r 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gfx9_SECT_CONTEXT_defs +ffffffff82a65500 r gfx9_SECT_CONTEXT_def_1 +ffffffff82a65850 r gfx9_SECT_CONTEXT_def_3 +ffffffff82a65860 r gfx9_SECT_CONTEXT_def_4 +ffffffff82a65ad4 r gfx9_SECT_CONTEXT_def_5 +ffffffff82a65adc r gfx9_SECT_CONTEXT_def_6 +ffffffff82a65ae0 r gfx9_SECT_CONTEXT_def_7 +ffffffff82a65bf0 r gfx9_SECT_CONTEXT_def_2 +ffffffff82a66060 r gfx9_SECT_CONTEXT_def_8 +ffffffff82a662d0 r vgpr_init_compute_shader_arcturus +ffffffff82a66b60 r vgpr_init_regs_arcturus +ffffffff82a66cf0 r vgpr_init_regs +ffffffff82a66e80 r sgpr1_init_regs +ffffffff82a67010 r sgpr2_init_regs +ffffffff82a67198 r gfx_v9_0_gfx_funcs +ffffffff82a671e0 r golden_settings_gc_9_0 +ffffffff82a673c0 r golden_settings_gc_9_0_vg10 +ffffffff82a67570 r golden_settings_gc_9_2_1 +ffffffff82a676f0 r golden_settings_gc_9_2_1_vg12 +ffffffff82a67830 r golden_settings_gc_9_0_vg20 +ffffffff82a67940 r golden_settings_gc_9_4_1_arct +ffffffff82a67a50 r golden_settings_gc_9_1 +ffffffff82a67c90 r golden_settings_gc_9_1_rv2 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uvd_v6_0_enc_ring_vm_funcs -ffffffff82ac4448 r uvd_v6_0_irq_funcs -ffffffff82ac5000 R uvd_v7_0_ip_funcs -ffffffff82ac50a0 R uvd_v7_0_ip_block -ffffffff82ac50b8 r uvd_v7_0_ring_vm_funcs -ffffffff82ac51d8 r uvd_v7_0_enc_ring_vm_funcs -ffffffff82ac52f8 r uvd_v7_0_irq_funcs -ffffffff82ac6000 r vce_v3_0_ip_funcs -ffffffff82ac60a0 R vce_v3_0_ip_block -ffffffff82ac60b8 R vce_v3_1_ip_block -ffffffff82ac60d0 R vce_v3_4_ip_block -ffffffff82ac60e8 r vce_v3_0_ring_vm_funcs -ffffffff82ac6208 r vce_v3_0_ring_phys_funcs -ffffffff82ac6328 r vce_v3_0_irq_funcs -ffffffff82ac7000 R vce_v4_0_ip_funcs -ffffffff82ac70a0 R vce_v4_0_ip_block -ffffffff82ac70b8 r vce_v4_0_ring_vm_funcs -ffffffff82ac71d8 r vce_v4_0_irq_funcs -ffffffff82ac8000 r vcn_v1_0_ip_funcs -ffffffff82ac80a0 R vcn_v1_0_ip_block -ffffffff82ac80b8 r vcn_v1_0_dec_ring_vm_funcs -ffffffff82ac81d8 r vcn_v1_0_enc_ring_vm_funcs -ffffffff82ac82f8 r vcn_v1_0_irq_funcs -ffffffff82ac9000 r vcn_v2_0_ip_funcs -ffffffff82ac90a0 R vcn_v2_0_ip_block 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vega10_ih_ip_block -ffffffff82acd0b8 r vega10_ih_funcs -ffffffff82acd0d8 r vega10_ih_self_irq_funcs +ffffffff82a74000 R gmc_v10_0_ip_funcs +ffffffff82a740a0 R gmc_v10_0_ip_block +ffffffff82a740b8 r gmc_v10_0_gmc_funcs +ffffffff82a74100 r gmc_v10_0_irq_funcs +ffffffff82a74110 r gmc_v10_0_ecc_funcs +ffffffff82a75000 R gmc_v11_0_ip_funcs +ffffffff82a750a0 R gmc_v11_0_ip_block +ffffffff82a750b8 r gmc_v11_0_gmc_funcs +ffffffff82a75100 r gmc_v11_0_irq_funcs +ffffffff82a75110 r gmc_v11_0_ecc_funcs +ffffffff82a76000 r gmc_v7_0_ip_funcs +ffffffff82a760a0 R gmc_v7_0_ip_block +ffffffff82a760b8 R gmc_v7_4_ip_block +ffffffff82a760d0 r gmc_v7_0_gmc_funcs +ffffffff82a76118 r gmc_v7_0_irq_funcs +ffffffff82a76128 r iceland_mgcg_cgcg_init +ffffffff82a76140 r golden_settings_iceland_a11 +ffffffff82a76170 r mc_cg_registers +ffffffff82a761a0 r mc_cg_en +ffffffff82a761d0 r mc_cg_ls_en +ffffffff82a77000 r gmc_v8_0_ip_funcs +ffffffff82a770a0 R gmc_v8_0_ip_block +ffffffff82a770b8 R gmc_v8_1_ip_block +ffffffff82a770d0 R gmc_v8_5_ip_block +ffffffff82a770e8 r gmc_v8_0_gmc_funcs +ffffffff82a77130 r gmc_v8_0_irq_funcs +ffffffff82a77140 r fiji_mgcg_cgcg_init +ffffffff82a77150 r golden_settings_fiji_a10 +ffffffff82a77180 r tonga_mgcg_cgcg_init +ffffffff82a77190 r golden_settings_tonga_a11 +ffffffff82a771f0 r golden_settings_polaris11_a11 +ffffffff82a77220 r golden_settings_polaris10_a11 +ffffffff82a7725c r cz_mgcg_cgcg_init +ffffffff82a77270 r stoney_mgcg_cgcg_init +ffffffff82a77290 r golden_settings_stoney_common +ffffffff82a78000 R gmc_v9_0_ip_funcs +ffffffff82a780a0 R gmc_v9_0_ip_block +ffffffff82a780b8 r gmc_v9_0_gmc_funcs +ffffffff82a78100 r gmc_v9_0_irq_funcs +ffffffff82a78110 r gmc_v9_0_ecc_funcs +ffffffff82a78120 r gfxhub_client_ids +ffffffff82a78190 r mmhub_client_ids_vega10 +ffffffff82a78480 r mmhub_client_ids_vega12 +ffffffff82a78780 r mmhub_client_ids_vega20 +ffffffff82a78a70 r mmhub_client_ids_arcturus +ffffffff82a7a280 r mmhub_client_ids_raven +ffffffff82a7a440 r mmhub_client_ids_renoir +ffffffff82a7a630 r mmhub_client_ids_aldebaran +ffffffff82a7be40 r ecc_umc_mcumc_ctrl_addrs +ffffffff82a7bec0 r ecc_umc_mcumc_ctrl_mask_addrs +ffffffff82a7bf40 r golden_settings_mmhub_1_0_0 +ffffffff82a7bf70 r golden_settings_athub_1_0_0 +ffffffff82a7c000 R hdp_v4_0_funcs +ffffffff82a7d000 R hdp_v5_0_funcs +ffffffff82a7e000 R hdp_v5_2_funcs +ffffffff82a7f000 R hdp_v6_0_funcs +ffffffff82a80000 r iceland_ih_ip_funcs +ffffffff82a800a0 R iceland_ih_ip_block +ffffffff82a800b8 r iceland_ih_funcs +ffffffff82a81000 r ih_v6_0_ip_funcs +ffffffff82a810a0 R ih_v6_0_ip_block +ffffffff82a810b8 r ih_v6_0_funcs +ffffffff82a810d8 r ih_v6_0_self_irq_funcs +ffffffff82a82000 R gfx_v11_0_imu_funcs +ffffffff82a82030 r imu_rlc_ram_golden_11 +ffffffff82a82680 r imu_rlc_ram_golden_11_0_2 +ffffffff82a83000 r imu_rlc_ram_golden_11_0_3 +ffffffff82a84000 r jpeg_v1_0_decode_ring_vm_funcs +ffffffff82a84120 r jpeg_v1_0_irq_funcs +ffffffff82a85000 r jpeg_v2_0_ip_funcs +ffffffff82a850a0 R jpeg_v2_0_ip_block +ffffffff82a850b8 r jpeg_v2_0_dec_ring_vm_funcs +ffffffff82a851d8 r jpeg_v2_0_irq_funcs +ffffffff82a86000 r jpeg_v2_5_ip_funcs +ffffffff82a860a0 R jpeg_v2_5_ip_block +ffffffff82a860b8 r jpeg_v2_6_ip_funcs +ffffffff82a86158 R jpeg_v2_6_ip_block +ffffffff82a86170 R jpeg_v2_6_ras_hw_ops +ffffffff82a861b0 r jpeg_v2_5_dec_ring_vm_funcs +ffffffff82a862d0 r jpeg_v2_6_dec_ring_vm_funcs +ffffffff82a863f0 r jpeg_v2_5_irq_funcs +ffffffff82a87000 r jpeg_v3_0_ip_funcs +ffffffff82a870a0 R jpeg_v3_0_ip_block +ffffffff82a870b8 r jpeg_v3_0_dec_ring_vm_funcs +ffffffff82a871d8 r jpeg_v3_0_irq_funcs +ffffffff82a88000 r jpeg_v4_0_ip_funcs +ffffffff82a880a0 R jpeg_v4_0_ip_block +ffffffff82a880b8 r jpeg_v4_0_dec_ring_vm_funcs +ffffffff82a881d8 r jpeg_v4_0_irq_funcs +ffffffff82a89000 R lsdma_v6_0_funcs +ffffffff82a8a000 R mca_v3_0_mp0_hw_ops +ffffffff82a8a040 R mca_v3_0_mp1_hw_ops +ffffffff82a8a080 R mca_v3_0_mpio_hw_ops +ffffffff82a8a0c0 R mca_v3_0_funcs +ffffffff82a8b000 r mes_v10_1_ip_funcs +ffffffff82a8b0a0 R mes_v10_1_ip_block +ffffffff82a8b0b8 r mes_v10_1_funcs +ffffffff82a8b0e8 r mes_v10_1_ring_funcs +ffffffff82a8c000 r mes_v11_0_ip_funcs +ffffffff82a8c0a0 R mes_v11_0_ip_block +ffffffff82a8c0b8 r mes_v11_0_funcs +ffffffff82a8c0e8 r mes_v11_0_ring_funcs +ffffffff82a8d000 R mmhub_v1_0_funcs +ffffffff82a8d050 r mmhub_v1_0_edc_cnt_regs +ffffffff82a8d0c0 r mmhub_v1_0_ras_fields +ffffffff82a8e000 R mmhub_v1_7_funcs +ffffffff82a8e050 r mmhub_v1_7_edc_cnt_regs +ffffffff82a8e250 r mmhub_v1_7_ras_fields +ffffffff82a8f9c0 r mmhub_v1_7_ea_err_status_regs +ffffffff82a90000 R mmhub_v2_0_funcs +ffffffff82a90050 r mmhub_v2_0_vmhub_funcs +ffffffff82a90060 r mmhub_client_ids_navi1x +ffffffff82a90190 r mmhub_client_ids_sienna_cichlid +ffffffff82a90450 r mmhub_client_ids_beige_goby +ffffffff82a91000 R mmhub_v2_3_funcs +ffffffff82a91050 r mmhub_v2_3_vmhub_funcs +ffffffff82a91060 r mmhub_client_ids_vangogh +ffffffff82a92000 R mmhub_v3_0_funcs +ffffffff82a92050 r mmhub_v3_0_vmhub_funcs +ffffffff82a92060 r mmhub_client_ids_v3_0_0 +ffffffff82a93000 R mmhub_v3_0_1_funcs +ffffffff82a93050 r mmhub_v3_0_1_vmhub_funcs +ffffffff82a93060 r mmhub_client_ids_v3_0_1 +ffffffff82a94000 R mmhub_v3_0_2_funcs +ffffffff82a94050 r mmhub_v3_0_2_vmhub_funcs +ffffffff82a94060 r mmhub_client_ids_v3_0_2 +ffffffff82a95000 R mmhub_v9_4_ras_hw_ops +ffffffff82a95040 R mmhub_v9_4_funcs +ffffffff82a95090 r mmhub_v9_4_edc_cnt_regs +ffffffff82a95330 r mmhub_v9_4_ras_fields +ffffffff82a973b0 r mmhub_v9_4_err_status_regs +ffffffff82a98000 r xgpu_ai_mailbox_ack_irq_funcs +ffffffff82a98010 r xgpu_ai_mailbox_rcv_irq_funcs +ffffffff82a98020 R xgpu_ai_virt_ops +ffffffff82a99000 r xgpu_nv_mailbox_ack_irq_funcs +ffffffff82a99010 r xgpu_nv_mailbox_rcv_irq_funcs +ffffffff82a99020 R xgpu_nv_virt_ops +ffffffff82a9a000 r xgpu_fiji_mgcg_cgcg_init +ffffffff82a9a240 r xgpu_fiji_golden_settings_a10 +ffffffff82a9a370 r xgpu_fiji_golden_common_all +ffffffff82a9a3f0 r xgpu_tonga_mgcg_cgcg_init +ffffffff82a9a810 r xgpu_tonga_golden_settings_a11 +ffffffff82a9a9d0 r xgpu_tonga_golden_common_all +ffffffff82a9aa28 r xgpu_vi_mailbox_ack_irq_funcs +ffffffff82a9aa38 r xgpu_vi_mailbox_rcv_irq_funcs +ffffffff82a9aa48 R xgpu_vi_virt_ops +ffffffff82a9b000 r navi10_ih_ip_funcs +ffffffff82a9b0a0 R navi10_ih_ip_block +ffffffff82a9b0b8 r navi10_ih_funcs +ffffffff82a9b0d8 r navi10_ih_self_irq_funcs +ffffffff82a9c000 R nbio_v2_3_hdp_flush_reg +ffffffff82a9c048 R nbio_v2_3_funcs +ffffffff82a9d000 R nbio_v4_3_hdp_flush_reg +ffffffff82a9d048 R nbio_v4_3_funcs +ffffffff82a9d130 R nbio_v4_3_sriov_funcs +ffffffff82a9e000 R nbio_v6_1_hdp_flush_reg +ffffffff82a9e048 R nbio_v6_1_funcs +ffffffff82a9f000 R nbio_v7_0_hdp_flush_reg +ffffffff82a9f048 R nbio_v7_0_funcs +ffffffff82aa0000 R nbio_v7_2_hdp_flush_reg +ffffffff82aa0048 R nbio_v7_2_funcs +ffffffff82aa1000 R nbio_v7_4_hdp_flush_reg +ffffffff82aa1048 R nbio_v7_4_ras_hw_ops +ffffffff82aa1088 R nbio_v7_4_funcs +ffffffff82aa1170 r nbio_v7_4_ras_controller_irq_funcs +ffffffff82aa1180 r nbio_v7_4_ras_err_event_athub_irq_funcs +ffffffff82aa2000 R nbio_v7_7_hdp_flush_reg +ffffffff82aa2048 R nbio_v7_7_funcs +ffffffff82aa3000 r nv_common_ip_funcs +ffffffff82aa30a0 R nv_common_ip_block +ffffffff82aa30b8 r nv_asic_funcs +ffffffff82aa3170 r nv_allowed_read_registers +ffffffff82aa32f0 r nv_video_codecs_encode +ffffffff82aa3300 r sc_video_codecs_decode +ffffffff82aa3310 r yc_video_codecs_decode +ffffffff82aa3320 r bg_video_codecs_encode +ffffffff82aa3330 r bg_video_codecs_decode +ffffffff82aa3340 r nv_video_codecs_decode +ffffffff82aa3350 r nv_video_codecs_encode_array +ffffffff82aa3380 r sc_video_codecs_decode_array +ffffffff82aa3420 r yc_video_codecs_decode_array +ffffffff82aa3490 r bg_video_codecs_decode_array +ffffffff82aa34d0 r nv_video_codecs_decode_array +ffffffff82aa4000 r psp_v10_0_funcs +ffffffff82aa5000 r psp_v11_0_funcs +ffffffff82aa6000 r psp_v11_0_8_funcs +ffffffff82aa7000 r psp_v12_0_funcs +ffffffff82aa8000 r psp_v13_0_funcs +ffffffff82aa9000 r psp_v13_0_4_funcs +ffffffff82aaa000 r psp_v3_1_funcs +ffffffff82aab000 r sdma_v2_4_ip_funcs +ffffffff82aab0a0 R sdma_v2_4_ip_block +ffffffff82aab0b8 r sdma_v2_4_ring_funcs +ffffffff82aab1d8 r sdma_v2_4_buffer_funcs +ffffffff82aab1f8 r sdma_v2_4_vm_pte_funcs +ffffffff82aab218 r sdma_v2_4_trap_irq_funcs +ffffffff82aab228 r sdma_v2_4_illegal_inst_irq_funcs +ffffffff82aab240 r iceland_mgcg_cgcg_init +ffffffff82aab260 r golden_settings_iceland_a11 +ffffffff82aac000 r sdma_v3_0_ip_funcs +ffffffff82aac0a0 R sdma_v3_0_ip_block +ffffffff82aac0b8 R sdma_v3_1_ip_block +ffffffff82aac0d0 r sdma_v3_0_ring_funcs +ffffffff82aac1f0 r sdma_v3_0_buffer_funcs +ffffffff82aac210 r sdma_v3_0_vm_pte_funcs +ffffffff82aac230 r sdma_v3_0_trap_irq_funcs +ffffffff82aac240 r sdma_v3_0_illegal_inst_irq_funcs +ffffffff82aac250 r fiji_mgcg_cgcg_init +ffffffff82aac270 r golden_settings_fiji_a10 +ffffffff82aac2d0 r tonga_mgcg_cgcg_init +ffffffff82aac2f0 r golden_settings_tonga_a11 +ffffffff82aac370 r golden_settings_polaris11_a11 +ffffffff82aac3f0 r golden_settings_polaris10_a11 +ffffffff82aac470 r cz_mgcg_cgcg_init +ffffffff82aac490 r cz_golden_settings_a11 +ffffffff82aac520 r stoney_mgcg_cgcg_init +ffffffff82aac530 r stoney_golden_settings_a11 +ffffffff82aad000 R sdma_v4_0_ip_funcs +ffffffff82aad0a0 R sdma_v4_0_ras_hw_ops +ffffffff82aad0e0 R sdma_v4_0_ip_block +ffffffff82aad0f8 r sdma_v4_0_ring_funcs_2nd_mmhub +ffffffff82aad218 r sdma_v4_0_ring_funcs +ffffffff82aad338 r sdma_v4_0_page_ring_funcs_2nd_mmhub +ffffffff82aad458 r sdma_v4_0_page_ring_funcs +ffffffff82aad578 r sdma_v4_0_buffer_funcs +ffffffff82aad598 r sdma_v4_0_vm_pte_funcs +ffffffff82aad5b8 r sdma_v4_0_trap_irq_funcs +ffffffff82aad5c8 r sdma_v4_0_illegal_inst_irq_funcs +ffffffff82aad5d8 r sdma_v4_0_ecc_irq_funcs +ffffffff82aad5e8 r sdma_v4_0_vm_hole_irq_funcs +ffffffff82aad5f8 r sdma_v4_0_doorbell_invalid_irq_funcs +ffffffff82aad608 r sdma_v4_0_pool_timeout_irq_funcs +ffffffff82aad618 r sdma_v4_0_srbm_write_irq_funcs +ffffffff82aad630 r golden_settings_sdma_4 +ffffffff82aad890 r golden_settings_sdma_vg10 +ffffffff82aad940 r golden_settings_sdma_vg12 +ffffffff82aad9f0 r golden_settings_sdma0_4_2_init +ffffffff82aada10 r golden_settings_sdma0_4_2 +ffffffff82aadca0 r golden_settings_sdma1_4_2 +ffffffff82aadf30 r golden_settings_sdma_arct +ffffffff82aae230 r golden_settings_sdma_aldebaran +ffffffff82aae3a0 r golden_settings_sdma_4_1 +ffffffff82aae4b0 r golden_settings_sdma_rv2 +ffffffff82aae4e0 r golden_settings_sdma_rv1 +ffffffff82aae510 r golden_settings_sdma_4_3 +ffffffff82aae600 r sdma_v4_0_ras_fields +ffffffff82aaf000 R sdma_v4_4_ras_hw_ops +ffffffff82aaf040 r sdma_v4_4_ras_fields +ffffffff82ab0000 R sdma_v5_0_ip_funcs +ffffffff82ab00a0 R sdma_v5_0_ip_block +ffffffff82ab00b8 r sdma_v5_0_ring_funcs +ffffffff82ab01d8 r sdma_v5_0_buffer_funcs +ffffffff82ab01f8 r sdma_v5_0_vm_pte_funcs +ffffffff82ab0218 r sdma_v5_0_trap_irq_funcs +ffffffff82ab0228 r sdma_v5_0_illegal_inst_irq_funcs +ffffffff82ab0240 r golden_settings_sdma_5 +ffffffff82ab0480 r golden_settings_sdma_nv10 +ffffffff82ab04b0 r golden_settings_sdma_nv14 +ffffffff82ab04e0 r golden_settings_sdma_5_sriov +ffffffff82ab06c0 r golden_settings_sdma_nv12 +ffffffff82ab0750 r golden_settings_sdma_cyan_skillfish +ffffffff82ab1000 R sdma_v5_2_ip_funcs +ffffffff82ab10a0 R sdma_v5_2_ip_block +ffffffff82ab10b8 r sdma_v5_2_ring_funcs +ffffffff82ab11d8 r sdma_v5_2_buffer_funcs +ffffffff82ab11f8 r sdma_v5_2_vm_pte_funcs +ffffffff82ab1218 r sdma_v5_2_trap_irq_funcs +ffffffff82ab1228 r sdma_v5_2_illegal_inst_irq_funcs +ffffffff82ab2000 R sdma_v6_0_ip_funcs +ffffffff82ab20a0 R sdma_v6_0_ip_block +ffffffff82ab20b8 r sdma_v6_0_ring_funcs +ffffffff82ab21d8 r sdma_v6_0_buffer_funcs +ffffffff82ab21f8 r sdma_v6_0_vm_pte_funcs +ffffffff82ab2218 r sdma_v6_0_trap_irq_funcs +ffffffff82ab2228 r sdma_v6_0_illegal_inst_irq_funcs +ffffffff82ab3000 r smu_v11_0_i2c_algo +ffffffff82ab3010 r smu_v11_0_i2c_i2c_lock_ops +ffffffff82ab3028 r smu_v11_0_i2c_control_quirks +ffffffff82ab4000 R smuio_v11_0_funcs +ffffffff82ab5000 R smuio_v11_0_6_funcs +ffffffff82ab6000 R smuio_v13_0_funcs +ffffffff82ab7000 R smuio_v13_0_6_funcs +ffffffff82ab8000 R smuio_v9_0_funcs +ffffffff82ab9000 r soc15_common_ip_funcs +ffffffff82ab90a0 R vega10_common_ip_block +ffffffff82ab90b8 r soc15_asic_funcs +ffffffff82ab9170 r vega20_asic_funcs +ffffffff82ab9230 r soc15_allowed_read_registers +ffffffff82ab93c0 r vega_video_codecs_encode +ffffffff82ab93d0 r vega_video_codecs_decode +ffffffff82ab93e0 r rv_video_codecs_decode +ffffffff82ab93f0 r rn_video_codecs_decode +ffffffff82ab9400 r vega_video_codecs_encode_array +ffffffff82ab9430 r vega_video_codecs_decode_array +ffffffff82ab94b0 r rv_video_codecs_decode_array +ffffffff82ab9540 r rn_video_codecs_decode_array +ffffffff82aba000 r soc21_common_ip_funcs +ffffffff82aba0a0 R soc21_common_ip_block +ffffffff82aba0b8 r soc21_asic_funcs +ffffffff82aba170 r soc21_allowed_read_registers +ffffffff82aba2f0 r vcn_4_0_0_video_codecs_encode +ffffffff82aba300 r vcn_4_0_0_video_codecs_decode +ffffffff82aba310 r vcn_4_0_0_video_codecs_encode_array +ffffffff82aba340 r vcn_4_0_0_video_codecs_decode_array +ffffffff82abb000 r tonga_ih_ip_funcs +ffffffff82abb0a0 R tonga_ih_ip_block +ffffffff82abb0b8 r tonga_ih_funcs +ffffffff82abc000 R umc_v6_0_funcs +ffffffff82abd000 R umc_v6_1_channel_idx_tbl +ffffffff82abd080 R umc_v6_1_ras_hw_ops +ffffffff82abe000 R umc_v6_7_channel_idx_tbl_second +ffffffff82abe080 R umc_v6_7_channel_idx_tbl_first +ffffffff82abe100 R umc_v6_7_ras_hw_ops +ffffffff82abf000 R umc_v8_10_channelnum_map_colbit_table +ffffffff82abf040 R umc_v8_10_channel_idx_tbl +ffffffff82abf0a0 R umc_v8_10_ras_hw_ops +ffffffff82ac0000 R umc_v8_7_channel_idx_tbl +ffffffff82ac0040 R umc_v8_7_ras_hw_ops +ffffffff82ac1000 r uvd_v5_0_ip_funcs +ffffffff82ac10a0 R uvd_v5_0_ip_block +ffffffff82ac10b8 r uvd_v5_0_ring_funcs +ffffffff82ac11d8 r uvd_v5_0_irq_funcs +ffffffff82ac2000 r uvd_v6_0_ip_funcs +ffffffff82ac20a0 R uvd_v6_0_ip_block +ffffffff82ac20b8 R uvd_v6_2_ip_block +ffffffff82ac20d0 R uvd_v6_3_ip_block +ffffffff82ac20e8 r uvd_v6_0_ring_vm_funcs +ffffffff82ac2208 r uvd_v6_0_ring_phys_funcs +ffffffff82ac2328 r uvd_v6_0_enc_ring_vm_funcs +ffffffff82ac2448 r uvd_v6_0_irq_funcs +ffffffff82ac3000 R uvd_v7_0_ip_funcs +ffffffff82ac30a0 R uvd_v7_0_ip_block +ffffffff82ac30b8 r uvd_v7_0_ring_vm_funcs +ffffffff82ac31d8 r uvd_v7_0_enc_ring_vm_funcs +ffffffff82ac32f8 r uvd_v7_0_irq_funcs +ffffffff82ac4000 r vce_v3_0_ip_funcs +ffffffff82ac40a0 R vce_v3_0_ip_block +ffffffff82ac40b8 R vce_v3_1_ip_block +ffffffff82ac40d0 R vce_v3_4_ip_block +ffffffff82ac40e8 r vce_v3_0_ring_vm_funcs +ffffffff82ac4208 r vce_v3_0_ring_phys_funcs +ffffffff82ac4328 r vce_v3_0_irq_funcs +ffffffff82ac5000 R vce_v4_0_ip_funcs +ffffffff82ac50a0 R vce_v4_0_ip_block +ffffffff82ac50b8 r vce_v4_0_ring_vm_funcs +ffffffff82ac51d8 r vce_v4_0_irq_funcs +ffffffff82ac6000 r vcn_v1_0_ip_funcs +ffffffff82ac60a0 R vcn_v1_0_ip_block +ffffffff82ac60b8 r vcn_v1_0_dec_ring_vm_funcs +ffffffff82ac61d8 r vcn_v1_0_enc_ring_vm_funcs +ffffffff82ac62f8 r vcn_v1_0_irq_funcs +ffffffff82ac7000 r vcn_v2_0_ip_funcs +ffffffff82ac70a0 R vcn_v2_0_ip_block +ffffffff82ac70b8 r vcn_v2_0_dec_ring_vm_funcs +ffffffff82ac71d8 r vcn_v2_0_enc_ring_vm_funcs +ffffffff82ac72f8 r vcn_v2_0_irq_funcs +ffffffff82ac8000 r vcn_v2_5_ip_funcs +ffffffff82ac80a0 R vcn_v2_5_ip_block +ffffffff82ac80b8 r vcn_v2_6_ip_funcs +ffffffff82ac8158 R vcn_v2_6_ip_block +ffffffff82ac8170 R vcn_v2_6_ras_hw_ops +ffffffff82ac81b0 r vcn_v2_5_dec_ring_vm_funcs +ffffffff82ac82d0 r vcn_v2_6_dec_ring_vm_funcs +ffffffff82ac83f0 r vcn_v2_5_enc_ring_vm_funcs +ffffffff82ac8510 r vcn_v2_6_enc_ring_vm_funcs +ffffffff82ac8630 r vcn_v2_5_irq_funcs +ffffffff82ac9000 r vcn_v3_0_ip_funcs +ffffffff82ac90a0 R vcn_v3_0_ip_block +ffffffff82ac90b8 r vcn_v3_0_dec_ring_vm_funcs +ffffffff82ac91d8 r vcn_v3_0_enc_ring_vm_funcs +ffffffff82ac92f8 r vcn_v3_0_irq_funcs +ffffffff82aca000 r vcn_v4_0_ip_funcs +ffffffff82aca0a0 R vcn_v4_0_ip_block +ffffffff82aca0b8 r vcn_v4_0_unified_ring_vm_funcs +ffffffff82aca1d8 r vcn_v4_0_irq_funcs +ffffffff82acb000 R vega10_ih_ip_funcs +ffffffff82acb0a0 R vega10_ih_ip_block +ffffffff82acb0b8 r vega10_ih_funcs +ffffffff82acb0d8 r vega10_ih_self_irq_funcs +ffffffff82acc000 r GC_BASE +ffffffff82acc064 r HDP_BASE +ffffffff82acc0c8 r MMHUB_BASE +ffffffff82acc12c r ATHUB_BASE +ffffffff82acc190 r NBIO_BASE +ffffffff82acc1f4 r MP0_BASE +ffffffff82acc258 r MP1_BASE +ffffffff82acc2bc r VCE_BASE +ffffffff82acc320 r VCN_BASE +ffffffff82acc384 r DF_BASE +ffffffff82acc3e8 r DCE_BASE +ffffffff82acc44c r OSSSYS_BASE +ffffffff82acc4b0 r SDMA0_BASE +ffffffff82acc514 r SDMA1_BASE +ffffffff82acc578 r SMUIO_BASE +ffffffff82acc5dc r PWR_BASE +ffffffff82acc640 r NBIF_BASE +ffffffff82acc6a4 r THM_BASE +ffffffff82acc708 r CLK_BASE +ffffffff82acd000 R vega20_ih_ip_funcs +ffffffff82acd0a0 R vega20_ih_ip_block +ffffffff82acd0b8 r vega20_ih_funcs +ffffffff82acd0d8 r vega20_ih_self_irq_funcs ffffffff82ace000 r GC_BASE -ffffffff82ace064 r HDP_BASE -ffffffff82ace0c8 r MMHUB_BASE -ffffffff82ace12c r ATHUB_BASE -ffffffff82ace190 r NBIO_BASE -ffffffff82ace1f4 r MP0_BASE -ffffffff82ace258 r MP1_BASE -ffffffff82ace2bc r VCE_BASE -ffffffff82ace320 r VCN_BASE -ffffffff82ace384 r DF_BASE -ffffffff82ace3e8 r DCE_BASE -ffffffff82ace44c r OSSSYS_BASE -ffffffff82ace4b0 r SDMA0_BASE -ffffffff82ace514 r SDMA1_BASE -ffffffff82ace578 r SMUIO_BASE -ffffffff82ace5dc r PWR_BASE -ffffffff82ace640 r NBIF_BASE -ffffffff82ace6a4 r THM_BASE -ffffffff82ace708 r CLK_BASE -ffffffff82acf000 R vega20_ih_ip_funcs -ffffffff82acf0a0 R vega20_ih_ip_block -ffffffff82acf0b8 r vega20_ih_funcs -ffffffff82acf0d8 r vega20_ih_self_irq_funcs -ffffffff82ad0000 r GC_BASE -ffffffff82ad0090 r HDP_BASE -ffffffff82ad0120 r MMHUB_BASE -ffffffff82ad01b0 r ATHUB_BASE -ffffffff82ad0240 r NBIO_BASE -ffffffff82ad02d0 r MP0_BASE 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cz_video_codecs_decode_array -ffffffff82ad1550 r iceland_mgcg_cgcg_init -ffffffff82ad1590 r fiji_mgcg_cgcg_init -ffffffff82ad15f0 r tonga_mgcg_cgcg_init -ffffffff82ad1650 r cz_mgcg_cgcg_init -ffffffff82ad1690 r stoney_mgcg_cgcg_init -ffffffff82ad2000 r amdgpu_dm_funcs -ffffffff82ad20a0 R dm_ip_block -ffffffff82ad20b8 R amdgpu_dm_encoder_helper_funcs -ffffffff82ad2120 r dm_display_funcs -ffffffff82ad2180 r hpd_disconnect_quirk_table -ffffffff82ad2ef0 r amdgpu_dm_mode_funcs -ffffffff82ad2f38 r amdgpu_dm_encoder_funcs -ffffffff82ad2f58 r amdgpu_dm_connector_funcs -ffffffff82ad2fd0 r amdgpu_dm_connector_helper_funcs -ffffffff82ad3020 r amdgpu_dm_i2c_algo -ffffffff82ad31f0 r add_fs_modes.common_rates -ffffffff82ad3220 r amdgpu_dm_backlight_ops -ffffffff82ad4000 r amdgpu_dm_crtc_funcs -ffffffff82ad40c0 r amdgpu_dm_crtc_helper_funcs -ffffffff82ad5000 r dm_dtn_log_begin.msg -ffffffff82ad500d r dm_dtn_log_end.msg -ffffffff82ad5018 r SYNAPTICS_DEVICE_ID -ffffffff82ad6000 r dm_crtc_irq_funcs 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r THM_BASE +ffffffff82ace900 r CLK_BASE +ffffffff82ace990 r UMC_BASE +ffffffff82acea20 r RSMU_BASE +ffffffff82acf000 r vi_common_ip_block +ffffffff82acf018 r vi_common_ip_funcs +ffffffff82acf0b8 r vi_asic_funcs +ffffffff82acf170 r vi_allowed_read_registers +ffffffff82acf3d0 r topaz_video_codecs_encode +ffffffff82acf3e0 r topaz_video_codecs_decode +ffffffff82acf3f0 r tonga_video_codecs_encode +ffffffff82acf400 r tonga_video_codecs_decode +ffffffff82acf410 r polaris_video_codecs_encode +ffffffff82acf420 r cz_video_codecs_decode +ffffffff82acf430 r tonga_video_codecs_encode_array +ffffffff82acf450 r tonga_video_codecs_decode_array +ffffffff82acf4a0 r polaris_video_codecs_encode_array +ffffffff82acf4d0 r cz_video_codecs_decode_array +ffffffff82acf550 r iceland_mgcg_cgcg_init +ffffffff82acf590 r fiji_mgcg_cgcg_init +ffffffff82acf5f0 r tonga_mgcg_cgcg_init +ffffffff82acf650 r cz_mgcg_cgcg_init +ffffffff82acf690 r stoney_mgcg_cgcg_init +ffffffff82ad0000 r amdgpu_dm_funcs +ffffffff82ad00a0 R dm_ip_block +ffffffff82ad00b8 R amdgpu_dm_encoder_helper_funcs +ffffffff82ad0120 r dm_display_funcs +ffffffff82ad0180 r hpd_disconnect_quirk_table +ffffffff82ad0ef0 r amdgpu_dm_mode_funcs +ffffffff82ad0f38 r amdgpu_dm_encoder_funcs +ffffffff82ad0f58 r amdgpu_dm_connector_funcs +ffffffff82ad0fd0 r amdgpu_dm_connector_helper_funcs +ffffffff82ad1020 r amdgpu_dm_i2c_algo +ffffffff82ad11f0 r add_fs_modes.common_rates +ffffffff82ad1220 r amdgpu_dm_backlight_ops +ffffffff82ad2000 r amdgpu_dm_crtc_funcs +ffffffff82ad20c0 r amdgpu_dm_crtc_helper_funcs +ffffffff82ad3000 r dm_dtn_log_begin.msg +ffffffff82ad300d r dm_dtn_log_end.msg +ffffffff82ad3018 r SYNAPTICS_DEVICE_ID +ffffffff82ad4000 r dm_crtc_irq_funcs +ffffffff82ad4010 r dm_vline0_irq_funcs +ffffffff82ad4020 r dm_dmub_outbox_irq_funcs +ffffffff82ad4030 r dm_vupdate_irq_funcs +ffffffff82ad4040 r dm_dmub_trace_irq_funcs +ffffffff82ad4050 r dm_pageflip_irq_funcs +ffffffff82ad4060 r dm_hpd_irq_funcs +ffffffff82ad5000 r amdgpu_dm_encoder_funcs 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dp_lt_fallbacks -ffffffff82af6000 r mandatory_dpcd_partitions -ffffffff82af8000 r dce_funcs -ffffffff82af9000 r funcs -ffffffff82afa000 R video_optimized_pixel_rates -ffffffff82afa1b0 r dce110_clk_src_funcs -ffffffff82afa1d8 r dce112_clk_src_funcs -ffffffff82afa200 r dcn20_clk_src_funcs -ffffffff82afa228 r dcn3_clk_src_funcs -ffffffff82afa250 r dcn31_clk_src_funcs -ffffffff82afb000 r dce_funcs -ffffffff82afb068 r dcn10_funcs -ffffffff82afb0d0 r dcn20_funcs -ffffffff82afb138 r dcn21_funcs -ffffffff82afc000 r dce_ipp_funcs -ffffffff82afd000 r dce110_lnk_enc_funcs -ffffffff82afe000 r dce_mi_funcs -ffffffff82afe090 r dce112_mi_funcs -ffffffff82afe120 r dce120_mi_funcs -ffffffff82afe1b0 r pte_settings -ffffffff82aff000 r funcs -ffffffff82b00000 r dce_link_panel_cntl_funcs -ffffffff82b01000 r filter_3tap_16p_upscale -ffffffff82b01040 r filter_3tap_16p_116 -ffffffff82b01080 r filter_3tap_16p_149 -ffffffff82b010c0 r filter_3tap_16p_183 -ffffffff82b01100 r filter_3tap_64p_upscale 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res_create_funcs -ffffffff82b09358 r dce100_res_pool_funcs -ffffffff82b09440 r panel_cntl_regs -ffffffff82b09460 r panel_cntl_shift -ffffffff82b09470 r panel_cntl_mask -ffffffff82b094b0 r link_enc_regs -ffffffff82b09870 r link_enc_aux_regs -ffffffff82b098c0 r link_enc_hpd_regs -ffffffff82b098d8 r link_enc_feature -ffffffff82b098e8 r cs_shift -ffffffff82b098f4 r cs_mask -ffffffff82b09920 r mi_regs -ffffffff82b09c38 r mi_shifts -ffffffff82b09c80 r mi_masks -ffffffff82b09da0 r ipp_regs -ffffffff82b09f98 r ipp_shift -ffffffff82b09fc0 r ipp_mask -ffffffff82b0a060 r xfm_regs -ffffffff82b0a600 r xfm_shift -ffffffff82b0a660 r xfm_mask -ffffffff82b0a7e0 r opp_regs -ffffffff82b0a930 r opp_shift -ffffffff82b0a95c r opp_mask -ffffffff82b0aa10 r aux_engine_regs -ffffffff82b0ab00 r aux_mask -ffffffff82b0ab60 r aux_shift -ffffffff82b0ab80 r i2c_hw_regs -ffffffff82b0acd0 r i2c_shifts -ffffffff82b0acfc r i2c_masks -ffffffff82b0ada0 r audio_regs -ffffffff82b0aed4 r audio_shift -ffffffff82b0aeec r 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vmid_shifts -ffffffff82bcbc88 r vmid_masks -ffffffff82bcbcb0 r hubp_regs -ffffffff82bcc4e0 r hubp_shift -ffffffff82bcc5dc r hubp_mask -ffffffff82bcc9d0 r dpp_regs -ffffffff82bcded0 r tf_shift -ffffffff82bce1a0 r tf_mask -ffffffff82bcece0 r opp_regs -ffffffff82bcee40 r opp_shift -ffffffff82bcee78 r opp_mask -ffffffff82bcef50 r optc_regs -ffffffff82bcf450 r optc_shift -ffffffff82bcf510 r optc_mask -ffffffff82bcf80c r mpc_regs -ffffffff82bd0ff8 r mpc_shift -ffffffff82bd10d4 r mpc_mask -ffffffff82bd1440 r dsc_regs -ffffffff82bd168c r dsc_shift -ffffffff82bd1744 r dsc_mask -ffffffff82bd1a20 r dwbc30_regs -ffffffff82bd1bfc r dwbc30_shift -ffffffff82bd1d30 r dwbc30_mask -ffffffff82bd2200 r mcif_wb30_regs -ffffffff82bd22fc r mcif_wb30_shift -ffffffff82bd23a8 r mcif_wb30_mask -ffffffff82bd2660 r aux_engine_regs -ffffffff82bd2728 r aux_mask -ffffffff82bd2788 r aux_shift -ffffffff82bd27a0 r i2c_hw_regs -ffffffff82bd28b8 r i2c_shifts -ffffffff82bd28e4 r i2c_masks -ffffffff82bd2990 r audio_regs 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dcn32_mmhubbub_funcs -ffffffff82bdb000 R dcn32_mpc_funcs -ffffffff82bdc000 r res_cap_dcn32 -ffffffff82bdc040 r debug_defaults_diags -ffffffff82bdc1b8 r dccg_shift -ffffffff82bdc250 r dccg_mask -ffffffff82bdc4ac r abm_shift -ffffffff82bdc4c0 r abm_mask -ffffffff82bdc508 r res_create_funcs -ffffffff82bdc538 r res_create_maximus_funcs -ffffffff82bdc568 r plane_cap -ffffffff82bdc594 r le_shift -ffffffff82bdc684 r le_mask -ffffffff82bdca3c r link_enc_feature -ffffffff82bdca50 r debug_defaults_drv -ffffffff82bdcbc8 r cs_shift -ffffffff82bdcbd4 r cs_mask -ffffffff82bdcbfc r hubbub_shift -ffffffff82bdcc84 r hubbub_mask -ffffffff82bdcea0 r vmid_shifts -ffffffff82bdcea8 r vmid_masks -ffffffff82bdcec8 r hubp_shift -ffffffff82bdcfc4 r hubp_mask -ffffffff82bdd3b4 r tf_shift -ffffffff82bdd684 r tf_mask -ffffffff82bde1c4 r opp_shift -ffffffff82bde1fc r opp_mask -ffffffff82bde2d0 r optc_shift -ffffffff82bde390 r optc_mask -ffffffff82bde68c r mpc_shift -ffffffff82bde768 r mpc_mask -ffffffff82bdead4 r dsc_shift -ffffffff82bdeb8c r dsc_mask -ffffffff82bdee64 r dwbc30_shift -ffffffff82bdef98 r dwbc30_mask -ffffffff82bdf460 r mcif_wb30_shift -ffffffff82bdf50c r mcif_wb30_mask -ffffffff82bdf7b8 r aux_mask -ffffffff82bdf818 r aux_shift -ffffffff82bdf830 r i2c_shifts -ffffffff82bdf85c r i2c_masks -ffffffff82bdf900 r audio_shift -ffffffff82bdf918 r audio_mask -ffffffff82bdf954 r se_shift -ffffffff82bdfa30 r se_mask -ffffffff82bdfd9c r vpg_shift -ffffffff82bdfdc4 r vpg_mask -ffffffff82bdfe58 r afmt_shift -ffffffff82bdfe6c r afmt_mask -ffffffff82bdfeb0 r hpo_dp_se_shift -ffffffff82bdfed8 r hpo_dp_se_mask -ffffffff82bdff78 r apg_shift -ffffffff82bdff80 r apg_mask -ffffffff82bdff98 r hpo_dp_le_shift -ffffffff82bdffb4 r hpo_dp_le_mask -ffffffff82be0018 r hwseq_shift -ffffffff82be0098 r hwseq_mask -ffffffff82be1000 r dcn321_link_enc_funcs -ffffffff82be2000 r res_cap_dcn321 -ffffffff82be2040 r debug_defaults_diags -ffffffff82be21b8 r dccg_shift -ffffffff82be2250 r dccg_mask -ffffffff82be24ac r abm_shift -ffffffff82be24c0 r abm_mask -ffffffff82be2508 r res_create_funcs -ffffffff82be2538 r res_create_maximus_funcs -ffffffff82be2568 r plane_cap -ffffffff82be2594 r le_shift -ffffffff82be2684 r le_mask -ffffffff82be2a3c r link_enc_feature -ffffffff82be2a50 r debug_defaults_drv -ffffffff82be2bc8 r cs_shift -ffffffff82be2bd4 r cs_mask -ffffffff82be2bfc r hubbub_shift -ffffffff82be2c84 r hubbub_mask -ffffffff82be2ea0 r vmid_shifts -ffffffff82be2ea8 r vmid_masks -ffffffff82be2ec8 r hubp_shift -ffffffff82be2fc4 r hubp_mask -ffffffff82be33b4 r tf_shift -ffffffff82be3684 r tf_mask -ffffffff82be41c4 r opp_shift -ffffffff82be41fc r opp_mask -ffffffff82be42d0 r optc_shift -ffffffff82be4390 r optc_mask -ffffffff82be468c r mpc_shift -ffffffff82be4768 r mpc_mask -ffffffff82be4ad4 r dsc_shift -ffffffff82be4b8c r dsc_mask -ffffffff82be4e64 r dwbc30_shift -ffffffff82be4f98 r dwbc30_mask -ffffffff82be5460 r mcif_wb30_shift -ffffffff82be550c r mcif_wb30_mask -ffffffff82be57b8 r aux_mask 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-ffffffff82bf7080 R qp_table_420_12bpc_max -ffffffff82bf77c0 R qp_table_444_10bpc_min -ffffffff82bf8400 R qp_table_420_8bpc_max -ffffffff82bf8840 R qp_table_444_8bpc_min -ffffffff82bf9180 R qp_table_444_12bpc_min -ffffffff82bfa0c0 R qp_table_420_12bpc_min -ffffffff82bfa800 R qp_table_422_12bpc_min -ffffffff82bfb140 R qp_table_422_12bpc_max -ffffffff82bfba80 R qp_table_444_12bpc_max -ffffffff82bfc9c0 R qp_table_420_8bpc_min -ffffffff82bfce00 R qp_table_422_8bpc_min -ffffffff82bfd340 R qp_table_422_10bpc_max -ffffffff82bfda80 R qp_table_420_10bpc_max -ffffffff82bfe040 R qp_table_420_10bpc_min -ffffffff82bfe600 R qp_table_444_10bpc_max -ffffffff82bff240 R qp_table_422_8bpc_max +ffffffff82aec0c0 r ddr4_wm_table +ffffffff82aed000 r clk_mgr_regs_dcn321 +ffffffff82aed054 r clk_mgr_shift_dcn321 +ffffffff82aed060 r clk_mgr_mask_dcn321 +ffffffff82aed084 r clk_mgr_regs_dcn32 +ffffffff82aed0d8 r clk_mgr_shift_dcn32 +ffffffff82aed0e4 r clk_mgr_mask_dcn32 +ffffffff82aee000 r DC_BUILD_ID +ffffffff82af0000 r output_csc_matrix +ffffffff82af00e0 r black_color_format +ffffffff82af1000 r DP_SINK_BRANCH_DEV_NAME_7580 +ffffffff82af2000 r DP_VGA_DONGLE_BRANCH_DEV_NAME +ffffffff82af2006 r DP_DVI_CONVERTER_ID_4 +ffffffff82af200d r DP_DVI_CONVERTER_ID_5 +ffffffff82af3000 r DP_VGA_LVDS_CONVERTER_ID_2 +ffffffff82af3007 r DP_VGA_LVDS_CONVERTER_ID_3 +ffffffff82af3010 r dp_lt_fallbacks +ffffffff82af4000 r mandatory_dpcd_partitions +ffffffff82af6000 r dce_funcs +ffffffff82af7000 r funcs +ffffffff82af8000 R video_optimized_pixel_rates +ffffffff82af81b0 r dce110_clk_src_funcs +ffffffff82af81d8 r dce112_clk_src_funcs +ffffffff82af8200 r dcn20_clk_src_funcs +ffffffff82af8228 r dcn3_clk_src_funcs +ffffffff82af8250 r dcn31_clk_src_funcs +ffffffff82af9000 r dce_funcs +ffffffff82af9068 r dcn10_funcs +ffffffff82af90d0 r dcn20_funcs +ffffffff82af9138 r dcn21_funcs +ffffffff82afa000 r dce_ipp_funcs +ffffffff82afb000 r dce110_lnk_enc_funcs +ffffffff82afc000 r dce_mi_funcs +ffffffff82afc090 r dce112_mi_funcs +ffffffff82afc120 r dce120_mi_funcs +ffffffff82afc1b0 r pte_settings +ffffffff82afd000 r funcs +ffffffff82afe000 r dce_link_panel_cntl_funcs +ffffffff82aff000 r filter_3tap_16p_upscale +ffffffff82aff040 r filter_3tap_16p_116 +ffffffff82aff080 r filter_3tap_16p_149 +ffffffff82aff0c0 r filter_3tap_16p_183 +ffffffff82aff100 r filter_3tap_64p_upscale +ffffffff82aff1d0 r filter_3tap_64p_116 +ffffffff82aff2a0 r filter_3tap_64p_149 +ffffffff82aff370 r filter_3tap_64p_183 +ffffffff82aff440 r filter_4tap_16p_upscale +ffffffff82aff490 r filter_4tap_16p_116 +ffffffff82aff4e0 r filter_4tap_16p_149 +ffffffff82aff530 r filter_4tap_16p_183 +ffffffff82aff580 r filter_4tap_64p_upscale +ffffffff82aff690 r filter_4tap_64p_116 +ffffffff82aff7a0 r filter_4tap_64p_149 +ffffffff82aff8b0 r filter_4tap_64p_183 +ffffffff82aff9c0 r filter_5tap_64p_upscale +ffffffff82affb10 r filter_5tap_64p_116 +ffffffff82affc60 r filter_5tap_64p_149 +ffffffff82affdb0 r filter_5tap_64p_183 +ffffffff82afff00 r filter_6tap_64p_upscale +ffffffff82b00090 r filter_6tap_64p_116 +ffffffff82b00220 r filter_6tap_64p_149 +ffffffff82b003b0 r filter_6tap_64p_183 +ffffffff82b00540 r filter_7tap_64p_upscale +ffffffff82b00710 r filter_7tap_64p_116 +ffffffff82b008e0 r filter_7tap_64p_149 +ffffffff82b00ab0 r filter_7tap_64p_183 +ffffffff82b00c80 r filter_8tap_64p_upscale +ffffffff82b00e90 r filter_8tap_64p_116 +ffffffff82b010a0 r filter_8tap_64p_149 +ffffffff82b012b0 r filter_8tap_64p_183 +ffffffff82b014c0 r filter_2tap_16p +ffffffff82b014f0 r filter_2tap_64p +ffffffff82b02000 r audio_clock_info_table_48bpc +ffffffff82b02190 r audio_clock_info_table_36bpc +ffffffff82b02320 r audio_clock_info_table +ffffffff82b024e0 r dce110_str_enc_funcs +ffffffff82b03000 r global_color_matrix +ffffffff82b030a8 r dce_transform_funcs +ffffffff82b04000 r abm_funcs +ffffffff82b05000 r psr_funcs +ffffffff82b05040 r DP_SINK_DEVICE_STR_ID_1 +ffffffff82b05045 r DP_SINK_DEVICE_STR_ID_2 +ffffffff82b06000 r reg_offsets +ffffffff82b07000 r bios_regs +ffffffff82b07008 r res_cap +ffffffff82b07050 r clk_src_regs +ffffffff82b0714c r dmcu_regs +ffffffff82b071a8 r dmcu_shift +ffffffff82b071bc r dmcu_mask +ffffffff82b07208 r abm_regs +ffffffff82b07248 r abm_shift +ffffffff82b0725c r abm_mask +ffffffff82b072b0 r dce100_tg_offsets +ffffffff82b072f8 r plane_cap +ffffffff82b07328 r res_create_funcs +ffffffff82b07358 r dce100_res_pool_funcs +ffffffff82b07440 r panel_cntl_regs +ffffffff82b07460 r panel_cntl_shift +ffffffff82b07470 r panel_cntl_mask +ffffffff82b074b0 r link_enc_regs +ffffffff82b07870 r link_enc_aux_regs +ffffffff82b078c0 r link_enc_hpd_regs +ffffffff82b078d8 r link_enc_feature +ffffffff82b078e8 r cs_shift +ffffffff82b078f4 r cs_mask +ffffffff82b07920 r mi_regs +ffffffff82b07c38 r mi_shifts +ffffffff82b07c80 r mi_masks +ffffffff82b07da0 r ipp_regs +ffffffff82b07f98 r ipp_shift +ffffffff82b07fc0 r ipp_mask +ffffffff82b08060 r xfm_regs +ffffffff82b08600 r xfm_shift +ffffffff82b08660 r xfm_mask +ffffffff82b087e0 r opp_regs +ffffffff82b08930 r opp_shift +ffffffff82b0895c r opp_mask +ffffffff82b08a10 r aux_engine_regs +ffffffff82b08b00 r aux_mask +ffffffff82b08b60 r aux_shift +ffffffff82b08b80 r i2c_hw_regs +ffffffff82b08cd0 r i2c_shifts +ffffffff82b08cfc r i2c_masks +ffffffff82b08da0 r audio_regs +ffffffff82b08ed4 r audio_shift +ffffffff82b08eec r audio_mask +ffffffff82b08f30 r stream_enc_regs +ffffffff82b095dc r se_shift +ffffffff82b09660 r se_mask +ffffffff82b09864 r hwseq_reg +ffffffff82b09a80 r hwseq_shift +ffffffff82b09b00 r hwseq_mask +ffffffff82b0a000 r reg_offsets +ffffffff82b0a018 r dce110_compressor_funcs +ffffffff82b0b000 r dce110_funcs +ffffffff82b0b2c0 r dce110_private_funcs +ffffffff82b0c000 r dce110_mem_input_v_funcs +ffffffff82b0c090 r dvmm_Hw_Setting_1DTiling +ffffffff82b0c120 r dvmm_Hw_Setting_2DTiling +ffffffff82b0c1b0 r dvmm_Hw_Setting_Linear +ffffffff82b0d000 r global_color_matrix +ffffffff82b0d0b0 r input_csc_matrix +ffffffff82b0e000 r funcs +ffffffff82b0f000 r bios_regs +ffffffff82b0f008 r dce110_res_pool_funcs +ffffffff82b0f0f0 r clk_src_regs +ffffffff82b0f1ec r dmcu_regs +ffffffff82b0f248 r dmcu_shift +ffffffff82b0f25c r dmcu_mask +ffffffff82b0f2a8 r abm_regs +ffffffff82b0f2e8 r abm_shift +ffffffff82b0f2fc r abm_mask +ffffffff82b0f350 r dce110_tg_offsets +ffffffff82b0f398 r res_create_funcs +ffffffff82b0f3c8 r plane_cap +ffffffff82b0f3f4 r underlay_plane_cap +ffffffff82b0f420 r stoney_resource_cap +ffffffff82b0f45c r carrizo_resource_cap +ffffffff82b0f4a0 r panel_cntl_regs +ffffffff82b0f4c0 r panel_cntl_shift +ffffffff82b0f4d0 r panel_cntl_mask +ffffffff82b0f510 r link_enc_regs +ffffffff82b0f8d0 r link_enc_aux_regs +ffffffff82b0f920 r link_enc_hpd_regs +ffffffff82b0f938 r link_enc_feature +ffffffff82b0f948 r cs_shift +ffffffff82b0f954 r cs_mask +ffffffff82b0f980 r mi_regs +ffffffff82b0fb0c r mi_shifts +ffffffff82b0fb54 r mi_masks +ffffffff82b0fc70 r ipp_regs +ffffffff82b0fd6c r ipp_shift +ffffffff82b0fd94 r ipp_mask +ffffffff82b0fe30 r xfm_regs +ffffffff82b10100 r xfm_shift +ffffffff82b10160 r xfm_mask +ffffffff82b102e0 r opp_regs +ffffffff82b10430 r opp_shift +ffffffff82b1045c r opp_mask +ffffffff82b10510 r aux_engine_regs +ffffffff82b10600 r aux_mask +ffffffff82b10660 r aux_shift +ffffffff82b10680 r i2c_hw_regs +ffffffff82b107d0 r i2c_shifts +ffffffff82b107fc r i2c_masks +ffffffff82b108a0 r audio_regs +ffffffff82b109d4 r audio_shift +ffffffff82b109ec r audio_mask +ffffffff82b10a30 r stream_enc_regs +ffffffff82b10d0c r se_shift +ffffffff82b10d90 r se_mask +ffffffff82b10f94 r hwseq_stoney_reg +ffffffff82b111b0 r hwseq_cz_reg +ffffffff82b113cc r hwseq_shift +ffffffff82b1144c r hwseq_mask +ffffffff82b12000 r dce110_tg_funcs +ffffffff82b13000 r dce110_tg_v_funcs +ffffffff82b14000 r dce110_xfmv_funcs +ffffffff82b15000 r reg_offsets +ffffffff82b16000 r reg_offsets +ffffffff82b17000 r bios_regs +ffffffff82b17010 r clk_src_regs +ffffffff82b17208 r dmcu_regs +ffffffff82b17264 r dmcu_shift +ffffffff82b17278 r dmcu_mask +ffffffff82b172c4 r abm_regs +ffffffff82b17304 r abm_shift +ffffffff82b17318 r abm_mask +ffffffff82b17360 r dce112_tg_offsets +ffffffff82b173a8 r res_create_funcs +ffffffff82b173d8 r plane_cap +ffffffff82b17404 r polaris_11_resource_cap +ffffffff82b17440 r polaris_10_resource_cap +ffffffff82b17480 r dce112_res_pool_funcs +ffffffff82b17560 r panel_cntl_regs +ffffffff82b17580 r panel_cntl_shift +ffffffff82b17590 r panel_cntl_mask +ffffffff82b175d0 r link_enc_regs +ffffffff82b17990 r link_enc_aux_regs +ffffffff82b179e0 r link_enc_hpd_regs +ffffffff82b179f8 r link_enc_feature +ffffffff82b17a08 r cs_shift +ffffffff82b17a14 r cs_mask +ffffffff82b17a40 r mi_regs +ffffffff82b17d58 r mi_shifts +ffffffff82b17da0 r mi_masks +ffffffff82b17ec0 r ipp_regs +ffffffff82b180b8 r ipp_shift +ffffffff82b180e0 r ipp_mask +ffffffff82b18180 r xfm_regs +ffffffff82b18720 r xfm_shift +ffffffff82b18780 r xfm_mask +ffffffff82b18900 r opp_regs +ffffffff82b18a50 r opp_shift +ffffffff82b18a7c r opp_mask +ffffffff82b18b30 r aux_engine_regs +ffffffff82b18c20 r aux_mask +ffffffff82b18c80 r aux_shift +ffffffff82b18ca0 r i2c_hw_regs +ffffffff82b18df0 r i2c_shifts +ffffffff82b18e1c r i2c_masks +ffffffff82b18ec0 r audio_regs +ffffffff82b18fc8 r audio_shift +ffffffff82b18fe0 r audio_mask +ffffffff82b19020 r stream_enc_regs +ffffffff82b195d8 r se_shift +ffffffff82b1965c r se_mask +ffffffff82b19860 r hwseq_reg +ffffffff82b19a7c r hwseq_shift +ffffffff82b19afc r hwseq_mask +ffffffff82b1a000 r bios_regs +ffffffff82b1a008 r res_cap +ffffffff82b1a048 r dce120_res_pool_funcs +ffffffff82b1a128 r debug_defaults +ffffffff82b1a2a0 r clk_src_regs +ffffffff82b1a498 r dmcu_regs +ffffffff82b1a4f4 r dmcu_shift +ffffffff82b1a508 r dmcu_mask +ffffffff82b1a554 r abm_regs +ffffffff82b1a594 r abm_shift +ffffffff82b1a5a8 r abm_mask +ffffffff82b1a5f0 r dce120_tg_offsets +ffffffff82b1a638 r dce121_res_create_funcs +ffffffff82b1a668 r res_create_funcs +ffffffff82b1a698 r plane_cap +ffffffff82b1a6d0 r panel_cntl_regs +ffffffff82b1a6f0 r panel_cntl_shift +ffffffff82b1a700 r panel_cntl_mask +ffffffff82b1a740 r link_enc_regs +ffffffff82b1ab00 r link_enc_aux_regs +ffffffff82b1ab50 r link_enc_hpd_regs +ffffffff82b1ab68 r link_enc_feature +ffffffff82b1ab78 r cs_shift +ffffffff82b1ab84 r cs_mask +ffffffff82b1abb0 r mi_regs +ffffffff82b1aec8 r mi_shifts +ffffffff82b1af10 r mi_masks +ffffffff82b1b030 r ipp_regs +ffffffff82b1b228 r ipp_shift +ffffffff82b1b250 r ipp_mask +ffffffff82b1b2f0 r xfm_regs +ffffffff82b1b890 r xfm_shift +ffffffff82b1b8f0 r xfm_mask +ffffffff82b1ba70 r opp_regs +ffffffff82b1bbc0 r opp_shift +ffffffff82b1bbec r opp_mask +ffffffff82b1bca0 r aux_engine_regs +ffffffff82b1bd90 r aux_mask +ffffffff82b1bdf0 r aux_shift +ffffffff82b1be10 r i2c_hw_regs +ffffffff82b1bf60 r i2c_shifts +ffffffff82b1bf8c r i2c_masks +ffffffff82b1c030 r audio_regs +ffffffff82b1c164 r audio_shift +ffffffff82b1c17c r audio_mask +ffffffff82b1c1c0 r stream_enc_regs +ffffffff82b1c778 r se_shift +ffffffff82b1c7fc r se_mask +ffffffff82b1ca00 r dce121_hwseq_reg +ffffffff82b1cc1c r dce121_hwseq_shift +ffffffff82b1cc9c r dce121_hwseq_mask +ffffffff82b1ce90 r hwseq_reg +ffffffff82b1d0ac r hwseq_shift +ffffffff82b1d12c r hwseq_mask +ffffffff82b1e000 r dce120_tg_funcs +ffffffff82b1f000 r bios_regs +ffffffff82b1f008 r res_cap +ffffffff82b1f048 r dce80_res_pool_funcs +ffffffff82b1f130 r clk_src_regs +ffffffff82b1f22c r dmcu_regs +ffffffff82b1f288 r dmcu_shift +ffffffff82b1f29c r dmcu_mask +ffffffff82b1f2e8 r abm_regs +ffffffff82b1f328 r abm_shift +ffffffff82b1f33c r abm_mask +ffffffff82b1f390 r dce80_tg_offsets +ffffffff82b1f3d8 r plane_cap +ffffffff82b1f408 r res_create_funcs +ffffffff82b1f440 r panel_cntl_regs +ffffffff82b1f460 r panel_cntl_shift +ffffffff82b1f470 r panel_cntl_mask +ffffffff82b1f4b0 r link_enc_regs +ffffffff82b1f870 r link_enc_aux_regs +ffffffff82b1f8c0 r link_enc_hpd_regs +ffffffff82b1f8d8 r link_enc_feature +ffffffff82b1f8e8 r cs_shift +ffffffff82b1f8f4 r cs_mask +ffffffff82b1f920 r mi_regs +ffffffff82b1fc38 r mi_shifts +ffffffff82b1fc80 r mi_masks +ffffffff82b1fda0 r ipp_regs +ffffffff82b1ff98 r ipp_shift +ffffffff82b1ffc0 r ipp_mask +ffffffff82b20060 r xfm_regs +ffffffff82b20600 r xfm_shift +ffffffff82b20660 r xfm_mask +ffffffff82b207e0 r opp_regs +ffffffff82b20930 r opp_shift +ffffffff82b2095c r opp_mask +ffffffff82b20a10 r aux_engine_regs +ffffffff82b20b00 r aux_mask +ffffffff82b20b60 r aux_shift +ffffffff82b20b80 r i2c_hw_regs +ffffffff82b20cd0 r i2c_shifts +ffffffff82b20cfc r i2c_masks +ffffffff82b20da0 r audio_regs +ffffffff82b20ed4 r audio_shift +ffffffff82b20eec r audio_mask +ffffffff82b20f30 r stream_enc_regs +ffffffff82b215dc r se_shift +ffffffff82b21660 r se_mask +ffffffff82b21864 r hwseq_reg +ffffffff82b21a80 r hwseq_shift +ffffffff82b21b00 r hwseq_mask +ffffffff82b21cf4 r res_cap_81 +ffffffff82b21d30 r res_cap_83 +ffffffff82b22000 r reg_offsets +ffffffff82b22048 r dce80_tg_funcs +ffffffff82b23000 r dcn10_dpp_funcs +ffffffff82b24000 r dpp_input_csc_matrix +ffffffff82b26000 r hubbub1_funcs +ffffffff82b27000 r dcn10_hubp_funcs +ffffffff82b28000 r reduceSizeAndFraction.prime_numbers +ffffffff82b2a000 r dcn10_funcs +ffffffff82b2a2c0 r dcn10_private_funcs +ffffffff82b2b000 r dcn10_ipp_funcs +ffffffff82b2b048 r dcn20_ipp_funcs +ffffffff82b2c000 r dcn10_lnk_enc_funcs +ffffffff82b2d000 r dcn10_mpc_funcs +ffffffff82b2e000 r dcn10_opp_funcs +ffffffff82b2f000 r dcn10_tg_funcs +ffffffff82b30000 r bios_regs +ffffffff82b30008 r rv2_res_cap +ffffffff82b30044 r res_cap +ffffffff82b30080 r debug_defaults_drv +ffffffff82b301f8 r debug_defaults_diags +ffffffff82b30370 r clk_src_regs +ffffffff82b304c0 r dmcu_regs +ffffffff82b3051c r dmcu_shift +ffffffff82b30530 r dmcu_mask +ffffffff82b3057c r abm_regs +ffffffff82b305bc r abm_shift +ffffffff82b305d0 r abm_mask +ffffffff82b30618 r res_create_funcs +ffffffff82b30648 r res_create_maximus_funcs +ffffffff82b30678 r plane_cap +ffffffff82b306a8 r dcn10_res_pool_funcs +ffffffff82b30790 r panel_cntl_regs +ffffffff82b307b0 r panel_cntl_shift +ffffffff82b307c0 r panel_cntl_mask +ffffffff82b30800 r link_enc_regs +ffffffff82b30d10 r link_enc_aux_regs +ffffffff82b30d50 r link_enc_hpd_regs +ffffffff82b30d60 r le_shift +ffffffff82b30e50 r le_mask +ffffffff82b31208 r link_enc_feature +ffffffff82b31218 r cs_shift +ffffffff82b31224 r cs_mask +ffffffff82b31250 r hubp_regs +ffffffff82b31900 r hubp_shift +ffffffff82b319c4 r hubp_mask +ffffffff82b31cd0 r ipp_regs +ffffffff82b31db0 r ipp_shift +ffffffff82b31dcc r ipp_mask +ffffffff82b31e40 r tf_regs +ffffffff82b32da0 r tf_shift +ffffffff82b33008 r tf_mask +ffffffff82b339a0 r opp_regs +ffffffff82b33a70 r opp_shift +ffffffff82b33a90 r opp_mask +ffffffff82b33b10 r tg_regs +ffffffff82b34010 r tg_shift +ffffffff82b340d0 r tg_mask +ffffffff82b343d0 r aux_engine_regs +ffffffff82b344c0 r aux_mask +ffffffff82b34520 r aux_shift +ffffffff82b34540 r i2c_hw_regs +ffffffff82b34690 r i2c_shifts +ffffffff82b346bc r i2c_masks +ffffffff82b34760 r mpc_regs +ffffffff82b34880 r mpc_shift +ffffffff82b34898 r mpc_mask +ffffffff82b348f4 r hubbub_reg +ffffffff82b34a68 r hubbub_shift +ffffffff82b34af0 r hubbub_mask +ffffffff82b34d10 r audio_regs +ffffffff82b34dc0 r audio_shift +ffffffff82b34dd8 r audio_mask +ffffffff82b34e20 r stream_enc_regs +ffffffff82b35370 r se_shift +ffffffff82b3544c r se_mask +ffffffff82b357b8 r hwseq_reg +ffffffff82b359d4 r hwseq_shift +ffffffff82b35a54 r hwseq_mask +ffffffff82b36000 r audio_clock_info_table_48bpc +ffffffff82b36190 r audio_clock_info_table_36bpc +ffffffff82b36320 r audio_clock_info_table +ffffffff82b364e0 r dcn10_str_enc_funcs +ffffffff82b37000 r dccg2_funcs +ffffffff82b39000 r dpp_input_csc_matrix +ffffffff82b3a000 R dcn20_dsc_funcs +ffffffff82b3b000 R dcn20_dwbc_funcs +ffffffff82b3c000 r filter_12tap_16p_upscale +ffffffff82b3c0e0 r filter_12tap_16p_117 +ffffffff82b3c1c0 r filter_12tap_16p_150 +ffffffff82b3c2a0 r filter_12tap_16p_183 +ffffffff82b3c380 r filter_11tap_16p_upscale +ffffffff82b3c450 r filter_11tap_16p_117 +ffffffff82b3c520 r filter_11tap_16p_150 +ffffffff82b3c5f0 r filter_11tap_16p_183 +ffffffff82b3c6c0 r filter_10tap_16p_upscale +ffffffff82b3c780 r filter_10tap_16p_117 +ffffffff82b3c840 r filter_10tap_16p_150 +ffffffff82b3c900 r filter_10tap_16p_183 +ffffffff82b3c9c0 r filter_9tap_16p_upscale +ffffffff82b3ca70 r filter_9tap_16p_117 +ffffffff82b3cb20 r filter_9tap_16p_150 +ffffffff82b3cbd0 r filter_9tap_16p_183 +ffffffff82b3cc80 r filter_8tap_16p_upscale +ffffffff82b3cd10 r filter_8tap_16p_117 +ffffffff82b3cda0 r filter_8tap_16p_150 +ffffffff82b3ce30 r filter_8tap_16p_183 +ffffffff82b3cec0 r filter_7tap_16p_upscale +ffffffff82b3cf40 r filter_7tap_16p_117 +ffffffff82b3cfc0 r filter_7tap_16p_150 +ffffffff82b3d040 r filter_7tap_16p_183 +ffffffff82b3d0c0 r filter_6tap_16p_upscale +ffffffff82b3d130 r filter_6tap_16p_117 +ffffffff82b3d1a0 r filter_6tap_16p_150 +ffffffff82b3d210 r filter_6tap_16p_183 +ffffffff82b3d280 r filter_5tap_16p_upscale +ffffffff82b3d2e0 r filter_5tap_16p_117 +ffffffff82b3d340 r filter_5tap_16p_150 +ffffffff82b3d3a0 r filter_5tap_16p_183 +ffffffff82b3d400 r filter_4tap_16p_upscale +ffffffff82b3d450 r filter_4tap_16p_117 +ffffffff82b3d4a0 r filter_4tap_16p_150 +ffffffff82b3d4f0 r filter_4tap_16p_183 +ffffffff82b3d540 r filter_3tap_16p_upscale +ffffffff82b3d580 r filter_3tap_16p_117 +ffffffff82b3d5c0 r filter_3tap_16p_150 +ffffffff82b3d600 r filter_3tap_16p_183 +ffffffff82b3e000 r hubbub2_funcs +ffffffff82b3f000 r dcn20_funcs +ffffffff82b3f2c0 r dcn20_private_funcs +ffffffff82b40000 r dcn2_mpll_cfg +ffffffff82b40190 r dcn20_link_enc_funcs +ffffffff82b41000 R dcn20_mmhubbub_funcs +ffffffff82b42000 R dcn20_mpc_funcs +ffffffff82b43000 r tf_regs +ffffffff82b44920 r tf_shift +ffffffff82b44ba4 r tf_mask +ffffffff82b455c0 r ipp_regs +ffffffff82b45710 r ipp_shift +ffffffff82b4572c r ipp_mask +ffffffff82b457a0 r opp_regs +ffffffff82b459b0 r opp_shift +ffffffff82b459e8 r opp_mask +ffffffff82b45ac0 r aux_engine_regs +ffffffff82b45bb0 r aux_mask +ffffffff82b45c10 r aux_shift +ffffffff82b45c30 r i2c_hw_regs +ffffffff82b45d80 r i2c_shifts +ffffffff82b45dac r i2c_masks +ffffffff82b45e50 r mpc_regs +ffffffff82b46398 r mpc_shift +ffffffff82b463e0 r mpc_mask +ffffffff82b464f4 r hubbub_reg +ffffffff82b46668 r hubbub_shift +ffffffff82b466f0 r hubbub_mask +ffffffff82b4690c r res_cap_nv10 +ffffffff82b46950 r vmid_regs +ffffffff82b46b10 r vmid_shifts +ffffffff82b46b18 r vmid_masks +ffffffff82b46b40 r tg_regs +ffffffff82b472c0 r tg_shift +ffffffff82b47380 r tg_mask +ffffffff82b47680 r link_enc_regs +ffffffff82b47e20 r link_enc_aux_regs +ffffffff82b47e80 r link_enc_hpd_regs +ffffffff82b47e98 r le_shift +ffffffff82b47f88 r le_mask +ffffffff82b48340 r stream_enc_regs +ffffffff82b48b38 r se_shift +ffffffff82b48c14 r se_mask +ffffffff82b48f80 r hwseq_reg +ffffffff82b4919c r hwseq_shift +ffffffff82b4921c r hwseq_mask +ffffffff82b49410 r dsc_regs +ffffffff82b498a8 r dsc_shift +ffffffff82b49960 r dsc_mask +ffffffff82b49c40 r hubp_regs +ffffffff82b4a888 r hubp_shift +ffffffff82b4a984 r hubp_mask +ffffffff82b4ad80 r dwbc20_regs +ffffffff82b4ae38 r dwbc20_shift +ffffffff82b4aeb8 r dwbc20_mask +ffffffff82b4b0b0 r mcif_wb20_regs +ffffffff82b4b190 r mcif_wb20_shift +ffffffff82b4b230 r mcif_wb20_mask +ffffffff82b4b4b0 r link_enc_feature +ffffffff82b4b4c0 r bios_regs +ffffffff82b4b4c8 r dcn20_res_pool_funcs +ffffffff82b4b5a8 r res_cap_nv14 +ffffffff82b4b5e8 r debug_defaults_drv +ffffffff82b4b760 r debug_defaults_diags +ffffffff82b4b8e0 r clk_src_regs +ffffffff82b4bad8 r dccg_regs +ffffffff82b4bbc4 r dccg_shift +ffffffff82b4bc5c r dccg_mask +ffffffff82b4beb8 r dmcu_regs +ffffffff82b4bf14 r dmcu_shift +ffffffff82b4bf28 r dmcu_mask +ffffffff82b4bf74 r abm_regs +ffffffff82b4bfb4 r abm_shift +ffffffff82b4bfc8 r abm_mask +ffffffff82b4c010 r res_create_funcs +ffffffff82b4c040 r res_create_maximus_funcs +ffffffff82b4c070 r plane_cap +ffffffff82b4c0a0 r panel_cntl_regs +ffffffff82b4c0c0 r panel_cntl_shift +ffffffff82b4c0d0 r panel_cntl_mask +ffffffff82b4c10c r cs_shift +ffffffff82b4c118 r cs_mask +ffffffff82b4c140 r audio_regs +ffffffff82b4c274 r audio_shift +ffffffff82b4c28c r audio_mask +ffffffff82b4d000 r dcn20_str_enc_funcs +ffffffff82b4e000 r dccg201_funcs +ffffffff82b4f000 r hubbub201_funcs +ffffffff82b50000 r dcn201_funcs +ffffffff82b502c0 r dcn201_private_funcs +ffffffff82b51000 r dcn201_link_enc_funcs +ffffffff82b52000 R dcn201_mpc_funcs +ffffffff82b53000 r bios_regs +ffffffff82b53008 r res_cap_dnc201 +ffffffff82b53048 r debug_defaults_drv +ffffffff82b531c0 r clk_src_regs +ffffffff82b53268 r dccg_regs +ffffffff82b53354 r dccg_shift +ffffffff82b533ec r dccg_mask +ffffffff82b53648 r res_create_funcs +ffffffff82b53678 r res_create_maximus_funcs +ffffffff82b536a8 r plane_cap +ffffffff82b536e0 r link_enc_regs +ffffffff82b53970 r link_enc_aux_regs +ffffffff82b53990 r link_enc_hpd_regs +ffffffff82b53998 r le_shift +ffffffff82b53a88 r le_mask +ffffffff82b53e40 r link_enc_feature +ffffffff82b53e50 r cs_shift +ffffffff82b53e5c r cs_mask +ffffffff82b53e90 r hubp_regs +ffffffff82b54620 r hubp_shift +ffffffff82b546f8 r hubp_mask +ffffffff82b54a60 r ipp_regs +ffffffff82b54b40 r ipp_shift +ffffffff82b54b5c r ipp_mask +ffffffff82b54bd0 r tf_regs +ffffffff82b55c10 r tf_shift +ffffffff82b55e94 r tf_mask +ffffffff82b568b0 r opp_regs +ffffffff82b56960 r opp_shift +ffffffff82b56998 r opp_mask +ffffffff82b56a70 r aux_engine_regs +ffffffff82b56ac0 r aux_mask +ffffffff82b56b20 r aux_shift +ffffffff82b56b40 r i2c_hw_regs +ffffffff82b56bb0 r i2c_shifts +ffffffff82b56bdc r i2c_masks +ffffffff82b56c80 r tg_regs +ffffffff82b56f00 r tg_shift +ffffffff82b56fc0 r tg_mask +ffffffff82b572bc r mpc_regs +ffffffff82b57804 r mpc_shift +ffffffff82b57850 r mpc_mask +ffffffff82b57978 r hubbub_reg +ffffffff82b57aec r hubbub_shift +ffffffff82b57b74 r hubbub_mask +ffffffff82b57d90 r audio_regs +ffffffff82b57de8 r audio_shift +ffffffff82b57e00 r audio_mask +ffffffff82b57e40 r stream_enc_regs +ffffffff82b580e8 r se_shift +ffffffff82b581c4 r se_mask +ffffffff82b58530 r hwseq_reg +ffffffff82b5874c r hwseq_shift +ffffffff82b587cc r hwseq_mask +ffffffff82b59000 r dccg21_funcs +ffffffff82b5a000 r hubbub21_funcs +ffffffff82b5b000 r dcn21_funcs +ffffffff82b5b2c0 r dcn21_private_funcs +ffffffff82b5c000 r dcn21_mpll_cfg_ref +ffffffff82b5c190 r dcn21_link_enc_funcs +ffffffff82b5d000 r bios_regs +ffffffff82b5d008 r res_cap_rn +ffffffff82b5d048 r dcn21_res_pool_funcs +ffffffff82b5d128 r debug_defaults_drv +ffffffff82b5d2a0 r debug_defaults_diags +ffffffff82b5d420 r clk_src_regs +ffffffff82b5d5c4 r dccg_regs +ffffffff82b5d6b0 r dccg_shift +ffffffff82b5d748 r dccg_mask +ffffffff82b5d9a4 r dmcu_regs +ffffffff82b5da00 r dmcu_shift +ffffffff82b5da14 r dmcu_mask +ffffffff82b5da60 r abm_regs +ffffffff82b5daa0 r abm_shift +ffffffff82b5dab4 r abm_mask +ffffffff82b5db00 r res_create_funcs +ffffffff82b5db30 r res_create_maximus_funcs +ffffffff82b5db60 r plane_cap +ffffffff82b5db90 r panel_cntl_regs +ffffffff82b5dbb0 r panel_cntl_shift +ffffffff82b5dbc0 r panel_cntl_mask +ffffffff82b5dc00 r link_enc_regs +ffffffff82b5e260 r link_enc_aux_regs +ffffffff82b5e2b0 r link_enc_hpd_regs +ffffffff82b5e2c4 r le_shift +ffffffff82b5e3b4 r le_mask +ffffffff82b5e76c r link_enc_feature +ffffffff82b5e77c r panel_config_defaults +ffffffff82b5e7b0 r cs_shift +ffffffff82b5e7bc r cs_mask +ffffffff82b5e7f0 r hubp_regs +ffffffff82b5f020 r hubp_shift +ffffffff82b5f11c r hubp_mask +ffffffff82b5f510 r ipp_regs +ffffffff82b5f5f0 r ipp_shift +ffffffff82b5f60c r ipp_mask +ffffffff82b5f680 r tf_regs +ffffffff82b60740 r tf_shift +ffffffff82b609c4 r tf_mask +ffffffff82b613e0 r opp_regs +ffffffff82b615f0 r opp_shift +ffffffff82b61628 r opp_mask +ffffffff82b61700 r tg_regs +ffffffff82b61c00 r tg_shift +ffffffff82b61cc0 r tg_mask +ffffffff82b61fc0 r aux_engine_regs +ffffffff82b62088 r aux_mask +ffffffff82b620e8 r aux_shift +ffffffff82b62100 r i2c_hw_regs +ffffffff82b62218 r i2c_shifts +ffffffff82b62244 r i2c_masks +ffffffff82b622e8 r mpc_regs +ffffffff82b62830 r mpc_shift +ffffffff82b62878 r mpc_mask +ffffffff82b6298c r hubbub_reg +ffffffff82b62b00 r hubbub_shift +ffffffff82b62b88 r hubbub_mask +ffffffff82b62db0 r vmid_regs +ffffffff82b62f70 r vmid_shifts +ffffffff82b62f78 r vmid_masks +ffffffff82b62fa0 r dsc_regs +ffffffff82b63438 r dsc_shift +ffffffff82b634f0 r dsc_mask +ffffffff82b637d0 r audio_regs +ffffffff82b638d8 r audio_shift +ffffffff82b638f0 r audio_mask +ffffffff82b63930 r stream_enc_regs +ffffffff82b63fd4 r se_shift +ffffffff82b640b0 r se_mask +ffffffff82b6441c r hwseq_reg +ffffffff82b64638 r hwseq_shift +ffffffff82b646b8 r hwseq_mask +ffffffff82b65000 r dccg3_funcs +ffffffff82b66000 r dcn30_link_enc_funcs +ffffffff82b67000 r dcn30_str_enc_funcs +ffffffff82b68000 r dpp_input_csc_matrix +ffffffff82b69000 R dcn30_dwbc_funcs +ffffffff82b6a000 r hubbub30_funcs +ffffffff82b6c000 r dcn30_funcs +ffffffff82b6c2c0 r dcn30_private_funcs +ffffffff82b6d000 R dcn30_mmhubbub_funcs +ffffffff82b6e000 R dcn30_mpc_funcs +ffffffff82b6f000 r bios_regs +ffffffff82b6f008 r res_cap_dcn3 +ffffffff82b6f048 r debug_defaults_drv +ffffffff82b6f1c0 r debug_defaults_diags +ffffffff82b6f340 r clk_src_regs +ffffffff82b6f538 r dccg_regs +ffffffff82b6f624 r dccg_shift +ffffffff82b6f6bc r dccg_mask +ffffffff82b6f920 r abm_regs +ffffffff82b6faa0 r abm_shift +ffffffff82b6fab4 r abm_mask +ffffffff82b6fb00 r res_create_funcs +ffffffff82b6fb30 r res_create_maximus_funcs +ffffffff82b6fb60 r plane_cap +ffffffff82b6fb90 r dcn30_res_pool_funcs +ffffffff82b6fc70 r panel_cntl_regs +ffffffff82b6fc90 r panel_cntl_shift +ffffffff82b6fca0 r panel_cntl_mask +ffffffff82b6fce0 r link_enc_regs +ffffffff82b70480 r link_enc_aux_regs +ffffffff82b704e0 r link_enc_hpd_regs +ffffffff82b704f8 r le_shift +ffffffff82b705e8 r le_mask +ffffffff82b709a0 r link_enc_feature +ffffffff82b709b0 r cs_shift +ffffffff82b709bc r cs_mask +ffffffff82b709e4 r hubbub_reg +ffffffff82b70b58 r hubbub_shift +ffffffff82b70be0 r hubbub_mask +ffffffff82b70e00 r vmid_regs +ffffffff82b70fc0 r vmid_shifts +ffffffff82b70fc8 r vmid_masks +ffffffff82b70ff0 r hubp_regs +ffffffff82b71c38 r hubp_shift +ffffffff82b71d34 r hubp_mask +ffffffff82b72130 r dpp_regs +ffffffff82b740b0 r tf_shift +ffffffff82b74380 r tf_mask +ffffffff82b74ec0 r opp_regs +ffffffff82b750d0 r opp_shift +ffffffff82b75108 r opp_mask +ffffffff82b751e0 r optc_regs +ffffffff82b75960 r optc_shift +ffffffff82b75a20 r optc_mask +ffffffff82b75d1c r mpc_regs +ffffffff82b77508 r mpc_shift +ffffffff82b775e4 r mpc_mask +ffffffff82b77950 r dsc_regs +ffffffff82b77de8 r dsc_shift +ffffffff82b77ea0 r dsc_mask +ffffffff82b78180 r dwbc30_regs +ffffffff82b7835c r dwbc30_shift +ffffffff82b78490 r dwbc30_mask +ffffffff82b78960 r mcif_wb30_regs +ffffffff82b78a5c r mcif_wb30_shift +ffffffff82b78b08 r mcif_wb30_mask +ffffffff82b78dc0 r aux_engine_regs +ffffffff82b78eb0 r aux_mask +ffffffff82b78f10 r aux_shift +ffffffff82b78f30 r i2c_hw_regs +ffffffff82b79080 r i2c_shifts +ffffffff82b790ac r i2c_masks +ffffffff82b79150 r audio_regs +ffffffff82b79284 r audio_shift +ffffffff82b7929c r audio_mask +ffffffff82b792e0 r stream_enc_regs +ffffffff82b79ad8 r se_shift +ffffffff82b79bb4 r se_mask +ffffffff82b79f20 r vpg_regs +ffffffff82b79fac r vpg_shift +ffffffff82b79fd4 r vpg_mask +ffffffff82b7a070 r afmt_regs +ffffffff82b7a16c r afmt_shift +ffffffff82b7a180 r afmt_mask +ffffffff82b7a1c4 r hwseq_reg +ffffffff82b7a3e0 r hwseq_shift +ffffffff82b7a460 r hwseq_mask +ffffffff82b7b000 r dccg301_funcs +ffffffff82b7c000 r dcn301_link_enc_funcs +ffffffff82b7d000 r hubbub301_funcs +ffffffff82b7e000 r dcn301_funcs +ffffffff82b7e2c0 r dcn301_private_funcs +ffffffff82b7f000 r dcn301_link_panel_cntl_funcs +ffffffff82b80000 r bios_regs +ffffffff82b80008 r debug_defaults_drv +ffffffff82b80180 r debug_defaults_diags +ffffffff82b80300 r clk_src_regs +ffffffff82b80450 r dccg_regs +ffffffff82b8053c r dccg_shift +ffffffff82b805d4 r dccg_mask +ffffffff82b80830 r abm_regs +ffffffff82b80930 r abm_shift +ffffffff82b80944 r abm_mask +ffffffff82b80990 r res_create_funcs +ffffffff82b809c0 r res_create_maximus_funcs +ffffffff82b809f0 r plane_cap +ffffffff82b80a20 r panel_cntl_regs +ffffffff82b80a60 r panel_cntl_shift +ffffffff82b80a70 r panel_cntl_mask +ffffffff82b80ab0 r link_enc_regs +ffffffff82b80fc0 r link_enc_aux_regs +ffffffff82b81000 r link_enc_hpd_regs +ffffffff82b81010 r le_shift +ffffffff82b81100 r le_mask +ffffffff82b814b8 r link_enc_feature +ffffffff82b814c8 r cs_shift +ffffffff82b814d4 r cs_mask +ffffffff82b814fc r hubbub_reg +ffffffff82b81670 r hubbub_shift +ffffffff82b816f8 r hubbub_mask +ffffffff82b81920 r vmid_regs +ffffffff82b81ae0 r vmid_shifts +ffffffff82b81ae8 r vmid_masks +ffffffff82b81b10 r hubp_regs +ffffffff82b82340 r hubp_shift +ffffffff82b8243c r hubp_mask +ffffffff82b82830 r dpp_regs +ffffffff82b83d30 r tf_shift +ffffffff82b84000 r tf_mask +ffffffff82b84b40 r opp_regs +ffffffff82b84ca0 r opp_shift +ffffffff82b84cd8 r opp_mask +ffffffff82b84db0 r optc_regs +ffffffff82b852b0 r optc_shift +ffffffff82b85370 r optc_mask +ffffffff82b8566c r mpc_regs +ffffffff82b86e58 r mpc_shift +ffffffff82b86f34 r mpc_mask +ffffffff82b872a0 r dsc_regs +ffffffff82b874ec r dsc_shift +ffffffff82b875a4 r dsc_mask +ffffffff82b87880 r dwbc30_regs +ffffffff82b87a5c r dwbc30_shift +ffffffff82b87b90 r dwbc30_mask +ffffffff82b88060 r mcif_wb30_regs +ffffffff82b8815c r mcif_wb30_shift +ffffffff82b88208 r mcif_wb30_mask +ffffffff82b884c0 r aux_engine_regs +ffffffff82b88560 r aux_mask +ffffffff82b885c0 r aux_shift +ffffffff82b885e0 r i2c_hw_regs +ffffffff82b886c0 r i2c_shifts +ffffffff82b886ec r i2c_masks +ffffffff82b88790 r audio_regs +ffffffff82b888c4 r audio_shift +ffffffff82b888dc r audio_mask +ffffffff82b88920 r stream_enc_regs +ffffffff82b88e70 r se_shift +ffffffff82b88f4c r se_mask +ffffffff82b892c0 r vpg_regs +ffffffff82b89310 r vpg_shift +ffffffff82b89338 r vpg_mask +ffffffff82b893d0 r afmt_regs +ffffffff82b89460 r afmt_shift +ffffffff82b89474 r afmt_mask +ffffffff82b894b8 r hwseq_reg +ffffffff82b896d4 r hwseq_shift +ffffffff82b89754 r hwseq_mask +ffffffff82b8a000 r bios_regs +ffffffff82b8a008 r res_cap_dcn302 +ffffffff82b8a048 r debug_defaults_drv +ffffffff82b8a1c0 r debug_defaults_diags +ffffffff82b8a340 r clk_src_regs +ffffffff82b8a4e4 r dccg_regs +ffffffff82b8a5d0 r dccg_shift +ffffffff82b8a668 r dccg_mask +ffffffff82b8a8d0 r abm_regs +ffffffff82b8aa10 r abm_shift +ffffffff82b8aa24 r abm_mask +ffffffff82b8aa70 r res_create_funcs +ffffffff82b8aaa0 r res_create_maximus_funcs +ffffffff82b8aad0 r plane_cap +ffffffff82b8ab00 r panel_cntl_regs +ffffffff82b8ab20 r panel_cntl_shift +ffffffff82b8ab30 r panel_cntl_mask +ffffffff82b8ab70 r link_enc_regs +ffffffff82b8b1d0 r link_enc_aux_regs +ffffffff82b8b220 r link_enc_hpd_regs +ffffffff82b8b234 r le_shift +ffffffff82b8b324 r le_mask +ffffffff82b8b6dc r link_enc_feature +ffffffff82b8b6ec r cs_shift +ffffffff82b8b6f8 r cs_mask +ffffffff82b8b720 r hubbub_reg +ffffffff82b8b894 r hubbub_shift +ffffffff82b8b91c r hubbub_mask +ffffffff82b8bb40 r vmid_regs +ffffffff82b8bd00 r vmid_shifts +ffffffff82b8bd08 r vmid_masks +ffffffff82b8bd30 r hubp_regs +ffffffff82b8c76c r hubp_shift +ffffffff82b8c868 r hubp_mask +ffffffff82b8cc60 r dpp_regs +ffffffff82b8e6a0 r tf_shift +ffffffff82b8e970 r tf_mask +ffffffff82b8f4b0 r opp_regs +ffffffff82b8f668 r opp_shift +ffffffff82b8f6a0 r opp_mask +ffffffff82b8f780 r optc_regs +ffffffff82b8fdc0 r optc_shift +ffffffff82b8fe80 r optc_mask +ffffffff82b9017c r mpc_regs +ffffffff82b91968 r mpc_shift +ffffffff82b91a44 r mpc_mask +ffffffff82b91db0 r dsc_regs +ffffffff82b92184 r dsc_shift +ffffffff82b9223c r dsc_mask +ffffffff82b92520 r dwbc30_regs +ffffffff82b926fc r dwbc30_shift +ffffffff82b92830 r dwbc30_mask +ffffffff82b92d00 r mcif_wb30_regs +ffffffff82b92dfc r mcif_wb30_shift +ffffffff82b92ea8 r mcif_wb30_mask +ffffffff82b93160 r aux_engine_regs +ffffffff82b93228 r aux_mask +ffffffff82b93288 r aux_shift +ffffffff82b932a0 r i2c_hw_regs +ffffffff82b933b8 r i2c_shifts +ffffffff82b933e4 r i2c_masks +ffffffff82b93490 r audio_regs +ffffffff82b935c4 r audio_shift +ffffffff82b935dc r audio_mask +ffffffff82b93620 r stream_enc_regs +ffffffff82b93cc4 r se_shift +ffffffff82b93da0 r se_mask +ffffffff82b94110 r vpg_regs +ffffffff82b94188 r vpg_shift +ffffffff82b941b0 r vpg_mask +ffffffff82b94250 r afmt_regs +ffffffff82b94328 r afmt_shift +ffffffff82b9433c r afmt_mask +ffffffff82b94380 r hwseq_reg +ffffffff82b9459c r hwseq_shift +ffffffff82b9461c r hwseq_mask +ffffffff82b95000 r bios_regs +ffffffff82b95008 r res_cap_dcn303 +ffffffff82b95048 r debug_defaults_drv +ffffffff82b951c0 r debug_defaults_diags +ffffffff82b95340 r clk_src_regs +ffffffff82b953e8 r dccg_regs +ffffffff82b954d4 r dccg_shift +ffffffff82b9556c r dccg_mask +ffffffff82b957d0 r abm_regs +ffffffff82b95850 r abm_shift +ffffffff82b95864 r abm_mask +ffffffff82b958b0 r res_create_funcs +ffffffff82b958e0 r res_create_maximus_funcs +ffffffff82b95910 r plane_cap +ffffffff82b95940 r panel_cntl_regs +ffffffff82b95960 r panel_cntl_shift +ffffffff82b95970 r panel_cntl_mask +ffffffff82b959b0 r link_enc_regs +ffffffff82b95c40 r link_enc_aux_regs +ffffffff82b95c60 r link_enc_hpd_regs +ffffffff82b95c68 r le_shift +ffffffff82b95d58 r le_mask +ffffffff82b96110 r link_enc_feature +ffffffff82b96120 r cs_shift +ffffffff82b9612c r cs_mask +ffffffff82b96154 r hubbub_reg +ffffffff82b962c8 r hubbub_shift +ffffffff82b96350 r hubbub_mask +ffffffff82b96570 r vmid_regs +ffffffff82b96730 r vmid_shifts +ffffffff82b96738 r vmid_masks +ffffffff82b96760 r hubp_regs +ffffffff82b96b78 r hubp_shift +ffffffff82b96c74 r hubp_mask +ffffffff82b97070 r dpp_regs +ffffffff82b97af0 r tf_shift +ffffffff82b97dc0 r tf_mask +ffffffff82b98900 r opp_regs +ffffffff82b989b0 r opp_shift +ffffffff82b989e8 r opp_mask +ffffffff82b98ac0 r optc_regs +ffffffff82b98d40 r optc_shift +ffffffff82b98e00 r optc_mask +ffffffff82b990fc r mpc_regs +ffffffff82b9a8e8 r mpc_shift +ffffffff82b9a9c4 r mpc_mask +ffffffff82b9ad30 r dsc_regs +ffffffff82b9aeb8 r dsc_shift +ffffffff82b9af70 r dsc_mask +ffffffff82b9b250 r dwbc30_regs +ffffffff82b9b42c r dwbc30_shift +ffffffff82b9b560 r dwbc30_mask +ffffffff82b9ba30 r mcif_wb30_regs +ffffffff82b9bb2c r mcif_wb30_shift +ffffffff82b9bbd8 r mcif_wb30_mask +ffffffff82b9be90 r aux_engine_regs +ffffffff82b9bee0 r aux_mask +ffffffff82b9bf40 r aux_shift +ffffffff82b9bf60 r i2c_hw_regs +ffffffff82b9bfd0 r i2c_shifts +ffffffff82b9bffc r i2c_masks +ffffffff82b9c0a0 r audio_regs +ffffffff82b9c1d4 r audio_shift +ffffffff82b9c1ec r audio_mask +ffffffff82b9c230 r stream_enc_regs +ffffffff82b9c4d8 r se_shift +ffffffff82b9c5b4 r se_mask +ffffffff82b9c920 r vpg_regs +ffffffff82b9c95c r vpg_shift +ffffffff82b9c984 r vpg_mask +ffffffff82b9ca20 r afmt_regs +ffffffff82b9ca8c r afmt_shift +ffffffff82b9caa0 r afmt_mask +ffffffff82b9cae4 r hwseq_reg +ffffffff82b9cd00 r hwseq_shift +ffffffff82b9cd80 r hwseq_mask +ffffffff82b9d000 r dccg31_funcs +ffffffff82b9e000 r dcn31_link_enc_funcs +ffffffff82b9f000 r dcn30_str_enc_funcs +ffffffff82ba0000 r hubbub31_funcs +ffffffff82ba1000 r dcn31_funcs +ffffffff82ba12c0 r dcn31_private_funcs +ffffffff82ba2000 r dcn31_link_panel_cntl_funcs +ffffffff82ba3000 r bios_regs +ffffffff82ba3008 r res_cap_dcn31 +ffffffff82ba3048 r debug_defaults_diags +ffffffff82ba31c0 r clk_src_regs +ffffffff82ba3370 r clk_src_regs_b0 +ffffffff82ba3514 r dccg_regs +ffffffff82ba3600 r dccg_shift +ffffffff82ba3698 r dccg_mask +ffffffff82ba3900 r abm_regs +ffffffff82ba3a00 r abm_shift +ffffffff82ba3a14 r abm_mask +ffffffff82ba3a60 r res_create_funcs +ffffffff82ba3a90 r res_create_maximus_funcs +ffffffff82ba3ac0 r plane_cap +ffffffff82ba3af0 r link_enc_regs +ffffffff82ba4150 r link_enc_aux_regs +ffffffff82ba41a0 r link_enc_hpd_regs +ffffffff82ba41b4 r le_shift +ffffffff82ba42a4 r le_mask +ffffffff82ba465c r link_enc_feature +ffffffff82ba466c r panel_config_defaults +ffffffff82ba46a0 r debug_defaults_drv +ffffffff82ba4818 r cs_shift +ffffffff82ba4824 r cs_mask +ffffffff82ba484c r hubbub_reg +ffffffff82ba49c0 r hubbub_shift +ffffffff82ba4a48 r hubbub_mask +ffffffff82ba4c70 r vmid_regs +ffffffff82ba4e30 r vmid_shifts +ffffffff82ba4e38 r vmid_masks +ffffffff82ba4e60 r hubp_regs +ffffffff82ba5690 r hubp_shift +ffffffff82ba578c r hubp_mask +ffffffff82ba5b80 r dpp_regs +ffffffff82ba7080 r tf_shift +ffffffff82ba7350 r tf_mask +ffffffff82ba7e90 r opp_regs +ffffffff82ba7ff0 r opp_shift +ffffffff82ba8028 r opp_mask +ffffffff82ba8100 r optc_regs +ffffffff82ba8600 r optc_shift +ffffffff82ba86c0 r optc_mask +ffffffff82ba89bc r mpc_regs +ffffffff82baa1a8 r mpc_shift +ffffffff82baa284 r mpc_mask +ffffffff82baa5f0 r dsc_regs +ffffffff82baa83c r dsc_shift +ffffffff82baa8f4 r dsc_mask +ffffffff82baabd0 r dwbc30_regs +ffffffff82baadac r dwbc30_shift +ffffffff82baaee0 r dwbc30_mask +ffffffff82bab3b0 r mcif_wb30_regs +ffffffff82bab4ac r mcif_wb30_shift +ffffffff82bab558 r mcif_wb30_mask +ffffffff82bab810 r aux_engine_regs +ffffffff82bab8d8 r aux_mask +ffffffff82bab938 r aux_shift +ffffffff82bab950 r i2c_hw_regs +ffffffff82baba68 r i2c_shifts +ffffffff82baba94 r i2c_masks +ffffffff82babb40 r audio_regs +ffffffff82babc74 r audio_shift +ffffffff82babc8c r audio_mask +ffffffff82babcc8 r se_shift +ffffffff82babda4 r se_mask +ffffffff82bac110 r vpg_regs +ffffffff82bac200 r vpg_shift +ffffffff82bac228 r vpg_mask +ffffffff82bac2d0 r afmt_regs +ffffffff82bac3a8 r afmt_shift +ffffffff82bac3bc r afmt_mask +ffffffff82bac410 r stream_enc_regs +ffffffff82badab0 r hpo_dp_stream_enc_regs +ffffffff82badce0 r hpo_dp_se_shift +ffffffff82badd08 r hpo_dp_se_mask +ffffffff82baddb0 r apg_regs +ffffffff82baddf0 r apg_shift +ffffffff82baddf8 r apg_mask +ffffffff82bade10 r hpo_dp_link_enc_regs +ffffffff82badf20 r hpo_dp_le_shift +ffffffff82badf3c r hpo_dp_le_mask +ffffffff82badfa0 r hwseq_reg +ffffffff82bae1bc r hwseq_shift +ffffffff82bae23c r hwseq_mask +ffffffff82baf000 r dccg314_funcs +ffffffff82bb0000 r dcn314_str_enc_funcs +ffffffff82bb1000 r dcn314_funcs +ffffffff82bb12c0 r dcn314_private_funcs +ffffffff82bb2000 r bios_regs +ffffffff82bb2008 r res_cap_dcn314 +ffffffff82bb2048 r debug_defaults_diags +ffffffff82bb21c0 r clk_src_regs +ffffffff82bb2364 r dccg_regs +ffffffff82bb2450 r dccg_shift +ffffffff82bb24e8 r dccg_mask +ffffffff82bb2750 r abm_regs +ffffffff82bb2850 r abm_shift +ffffffff82bb2864 r abm_mask +ffffffff82bb28b0 r res_create_funcs +ffffffff82bb28e0 r res_create_maximus_funcs +ffffffff82bb2910 r plane_cap +ffffffff82bb2940 r link_enc_regs +ffffffff82bb2fa0 r link_enc_aux_regs +ffffffff82bb2ff0 r link_enc_hpd_regs +ffffffff82bb3004 r le_shift +ffffffff82bb30f4 r le_mask +ffffffff82bb34ac r link_enc_feature +ffffffff82bb34bc r panel_config_defaults +ffffffff82bb34f0 r debug_defaults_drv +ffffffff82bb3668 r cs_shift +ffffffff82bb3674 r cs_mask +ffffffff82bb369c r hubbub_reg +ffffffff82bb3810 r hubbub_shift +ffffffff82bb3898 r hubbub_mask +ffffffff82bb3ac0 r vmid_regs +ffffffff82bb3c80 r vmid_shifts +ffffffff82bb3c88 r vmid_masks +ffffffff82bb3cb0 r hubp_regs +ffffffff82bb44e0 r hubp_shift +ffffffff82bb45dc r hubp_mask +ffffffff82bb49d0 r dpp_regs +ffffffff82bb5ed0 r tf_shift +ffffffff82bb61a0 r tf_mask +ffffffff82bb6ce0 r opp_regs +ffffffff82bb6e40 r opp_shift +ffffffff82bb6e78 r opp_mask +ffffffff82bb6f50 r optc_regs +ffffffff82bb7450 r optc_shift +ffffffff82bb7510 r optc_mask +ffffffff82bb780c r mpc_regs +ffffffff82bb8ff8 r mpc_shift +ffffffff82bb90d4 r mpc_mask +ffffffff82bb9440 r dsc_regs +ffffffff82bb9750 r dsc_shift +ffffffff82bb9808 r dsc_mask +ffffffff82bb9ae0 r dwbc30_regs +ffffffff82bb9cbc r dwbc30_shift +ffffffff82bb9df0 r dwbc30_mask +ffffffff82bba2c0 r mcif_wb30_regs +ffffffff82bba3bc r mcif_wb30_shift +ffffffff82bba468 r mcif_wb30_mask +ffffffff82bba720 r aux_engine_regs +ffffffff82bba7e8 r aux_mask +ffffffff82bba848 r aux_shift +ffffffff82bba860 r i2c_hw_regs +ffffffff82bba978 r i2c_shifts +ffffffff82bba9a4 r i2c_masks +ffffffff82bbaa50 r audio_regs +ffffffff82bbab84 r audio_shift +ffffffff82bbab9c r audio_mask +ffffffff82bbabe0 r stream_enc_regs +ffffffff82bbb284 r se_shift +ffffffff82bbb360 r se_mask +ffffffff82bbb6d0 r vpg_regs +ffffffff82bbb7c0 r vpg_shift +ffffffff82bbb7e8 r vpg_mask +ffffffff82bbb890 r afmt_regs +ffffffff82bbb968 r afmt_shift +ffffffff82bbb97c r afmt_mask +ffffffff82bbb9d0 r hpo_dp_stream_enc_regs +ffffffff82bbbc00 r hpo_dp_se_shift +ffffffff82bbbc28 r hpo_dp_se_mask +ffffffff82bbbcd0 r apg_regs +ffffffff82bbbd10 r apg_shift +ffffffff82bbbd18 r apg_mask +ffffffff82bbbd30 r hpo_dp_link_enc_regs +ffffffff82bbbe40 r hpo_dp_le_shift +ffffffff82bbbe5c r hpo_dp_le_mask +ffffffff82bbbec0 r hwseq_reg +ffffffff82bbc0dc r hwseq_shift +ffffffff82bbc15c r hwseq_mask +ffffffff82bbd000 r bios_regs +ffffffff82bbd008 r res_cap_dcn31 +ffffffff82bbd048 r debug_defaults_diags +ffffffff82bbd1c0 r clk_src_regs +ffffffff82bbd364 r dccg_regs +ffffffff82bbd450 r dccg_shift +ffffffff82bbd4e8 r dccg_mask +ffffffff82bbd750 r abm_regs +ffffffff82bbd850 r abm_shift +ffffffff82bbd864 r abm_mask +ffffffff82bbd8b0 r res_create_funcs +ffffffff82bbd8e0 r res_create_maximus_funcs +ffffffff82bbd910 r plane_cap +ffffffff82bbd940 r link_enc_regs +ffffffff82bbdfa0 r link_enc_aux_regs +ffffffff82bbdff0 r link_enc_hpd_regs +ffffffff82bbe004 r le_shift +ffffffff82bbe0f4 r le_mask +ffffffff82bbe4ac r link_enc_feature +ffffffff82bbe4bc r panel_config_defaults +ffffffff82bbe4f0 r debug_defaults_drv +ffffffff82bbe668 r cs_shift +ffffffff82bbe674 r cs_mask +ffffffff82bbe69c r hubbub_reg +ffffffff82bbe810 r hubbub_shift +ffffffff82bbe898 r hubbub_mask +ffffffff82bbeac0 r vmid_regs +ffffffff82bbec80 r vmid_shifts +ffffffff82bbec88 r vmid_masks +ffffffff82bbecb0 r hubp_regs +ffffffff82bbf4e0 r hubp_shift +ffffffff82bbf5dc r hubp_mask +ffffffff82bbf9d0 r dpp_regs +ffffffff82bc0ed0 r tf_shift +ffffffff82bc11a0 r tf_mask +ffffffff82bc1ce0 r opp_regs +ffffffff82bc1e40 r opp_shift +ffffffff82bc1e78 r opp_mask +ffffffff82bc1f50 r optc_regs +ffffffff82bc2450 r optc_shift +ffffffff82bc2510 r optc_mask +ffffffff82bc280c r mpc_regs +ffffffff82bc3ff8 r mpc_shift +ffffffff82bc40d4 r mpc_mask +ffffffff82bc4440 r dsc_regs +ffffffff82bc468c r dsc_shift +ffffffff82bc4744 r dsc_mask +ffffffff82bc4a20 r dwbc30_regs +ffffffff82bc4bfc r dwbc30_shift +ffffffff82bc4d30 r dwbc30_mask +ffffffff82bc5200 r mcif_wb30_regs +ffffffff82bc52fc r mcif_wb30_shift +ffffffff82bc53a8 r mcif_wb30_mask +ffffffff82bc5660 r aux_engine_regs +ffffffff82bc5728 r aux_mask +ffffffff82bc5788 r aux_shift +ffffffff82bc57a0 r i2c_hw_regs +ffffffff82bc58b8 r i2c_shifts +ffffffff82bc58e4 r i2c_masks +ffffffff82bc5990 r audio_regs +ffffffff82bc5ac4 r audio_shift +ffffffff82bc5adc r audio_mask +ffffffff82bc5b20 r stream_enc_regs +ffffffff82bc61c4 r se_shift +ffffffff82bc62a0 r se_mask +ffffffff82bc6610 r vpg_regs +ffffffff82bc6700 r vpg_shift +ffffffff82bc6728 r vpg_mask +ffffffff82bc67d0 r afmt_regs +ffffffff82bc68a8 r afmt_shift +ffffffff82bc68bc r afmt_mask +ffffffff82bc6910 r hpo_dp_stream_enc_regs +ffffffff82bc6b40 r hpo_dp_se_shift +ffffffff82bc6b68 r hpo_dp_se_mask +ffffffff82bc6c10 r apg_regs +ffffffff82bc6c50 r apg_shift +ffffffff82bc6c58 r apg_mask +ffffffff82bc6c70 r hpo_dp_link_enc_regs +ffffffff82bc6d80 r hpo_dp_le_shift +ffffffff82bc6d9c r hpo_dp_le_mask +ffffffff82bc6e00 r hwseq_reg +ffffffff82bc701c r hwseq_shift +ffffffff82bc709c r hwseq_mask +ffffffff82bc8000 r bios_regs +ffffffff82bc8008 r res_cap_dcn31 +ffffffff82bc8048 r debug_defaults_diags +ffffffff82bc81c0 r clk_src_regs +ffffffff82bc8364 r dccg_regs +ffffffff82bc8450 r dccg_shift +ffffffff82bc84e8 r dccg_mask +ffffffff82bc8750 r abm_regs +ffffffff82bc8850 r abm_shift +ffffffff82bc8864 r abm_mask +ffffffff82bc88b0 r res_create_funcs +ffffffff82bc88e0 r res_create_maximus_funcs +ffffffff82bc8910 r plane_cap +ffffffff82bc8940 r link_enc_regs +ffffffff82bc8fa0 r link_enc_aux_regs +ffffffff82bc8ff0 r link_enc_hpd_regs +ffffffff82bc9004 r le_shift +ffffffff82bc90f4 r le_mask +ffffffff82bc94ac r link_enc_feature +ffffffff82bc94bc r panel_config_defaults +ffffffff82bc94f0 r debug_defaults_drv +ffffffff82bc9668 r cs_shift +ffffffff82bc9674 r cs_mask +ffffffff82bc969c r hubbub_reg +ffffffff82bc9810 r hubbub_shift +ffffffff82bc9898 r hubbub_mask +ffffffff82bc9ac0 r vmid_regs +ffffffff82bc9c80 r vmid_shifts +ffffffff82bc9c88 r vmid_masks +ffffffff82bc9cb0 r hubp_regs +ffffffff82bca4e0 r hubp_shift +ffffffff82bca5dc r hubp_mask +ffffffff82bca9d0 r dpp_regs +ffffffff82bcbed0 r tf_shift +ffffffff82bcc1a0 r tf_mask +ffffffff82bccce0 r opp_regs +ffffffff82bcce40 r opp_shift +ffffffff82bcce78 r opp_mask +ffffffff82bccf50 r optc_regs +ffffffff82bcd450 r optc_shift +ffffffff82bcd510 r optc_mask +ffffffff82bcd80c r mpc_regs +ffffffff82bceff8 r mpc_shift +ffffffff82bcf0d4 r mpc_mask +ffffffff82bcf440 r dsc_regs +ffffffff82bcf68c r dsc_shift +ffffffff82bcf744 r dsc_mask +ffffffff82bcfa20 r dwbc30_regs +ffffffff82bcfbfc r dwbc30_shift +ffffffff82bcfd30 r dwbc30_mask +ffffffff82bd0200 r mcif_wb30_regs +ffffffff82bd02fc r mcif_wb30_shift +ffffffff82bd03a8 r mcif_wb30_mask +ffffffff82bd0660 r aux_engine_regs +ffffffff82bd0728 r aux_mask +ffffffff82bd0788 r aux_shift +ffffffff82bd07a0 r i2c_hw_regs +ffffffff82bd08b8 r i2c_shifts +ffffffff82bd08e4 r i2c_masks +ffffffff82bd0990 r audio_regs +ffffffff82bd0ac4 r audio_shift +ffffffff82bd0adc r audio_mask +ffffffff82bd0b20 r stream_enc_regs +ffffffff82bd11c4 r se_shift +ffffffff82bd12a0 r se_mask +ffffffff82bd1610 r vpg_regs +ffffffff82bd1700 r vpg_shift +ffffffff82bd1728 r vpg_mask +ffffffff82bd17d0 r afmt_regs +ffffffff82bd18a8 r afmt_shift +ffffffff82bd18bc r afmt_mask +ffffffff82bd1910 r hpo_dp_stream_enc_regs +ffffffff82bd1b40 r hpo_dp_se_shift +ffffffff82bd1b68 r hpo_dp_se_mask +ffffffff82bd1c10 r apg_regs +ffffffff82bd1c50 r apg_shift +ffffffff82bd1c58 r apg_mask +ffffffff82bd1c70 r hpo_dp_link_enc_regs +ffffffff82bd1d80 r hpo_dp_le_shift +ffffffff82bd1d9c r hpo_dp_le_mask +ffffffff82bd1e00 r hwseq_reg +ffffffff82bd201c r hwseq_shift +ffffffff82bd209c r hwseq_mask +ffffffff82bd3000 r dccg32_funcs +ffffffff82bd4000 r dcn32_link_enc_funcs +ffffffff82bd5000 r dcn32_str_enc_funcs +ffffffff82bd6000 r hubbub32_funcs +ffffffff82bd7000 r dcn32_funcs +ffffffff82bd72c0 r dcn32_private_funcs +ffffffff82bd8000 R dcn32_mmhubbub_funcs +ffffffff82bd9000 R dcn32_mpc_funcs +ffffffff82bda000 r res_cap_dcn32 +ffffffff82bda040 r debug_defaults_diags +ffffffff82bda1b8 r dccg_shift +ffffffff82bda250 r dccg_mask +ffffffff82bda4ac r abm_shift +ffffffff82bda4c0 r abm_mask +ffffffff82bda508 r res_create_funcs +ffffffff82bda538 r res_create_maximus_funcs +ffffffff82bda568 r plane_cap +ffffffff82bda594 r le_shift +ffffffff82bda684 r le_mask +ffffffff82bdaa3c r link_enc_feature +ffffffff82bdaa50 r debug_defaults_drv +ffffffff82bdabc8 r cs_shift +ffffffff82bdabd4 r cs_mask +ffffffff82bdabfc r hubbub_shift +ffffffff82bdac84 r hubbub_mask +ffffffff82bdaea0 r vmid_shifts +ffffffff82bdaea8 r vmid_masks +ffffffff82bdaec8 r hubp_shift +ffffffff82bdafc4 r hubp_mask +ffffffff82bdb3b4 r tf_shift +ffffffff82bdb684 r tf_mask +ffffffff82bdc1c4 r opp_shift +ffffffff82bdc1fc r opp_mask +ffffffff82bdc2d0 r optc_shift +ffffffff82bdc390 r optc_mask +ffffffff82bdc68c r mpc_shift +ffffffff82bdc768 r mpc_mask +ffffffff82bdcad4 r dsc_shift +ffffffff82bdcb8c r dsc_mask +ffffffff82bdce64 r dwbc30_shift +ffffffff82bdcf98 r dwbc30_mask +ffffffff82bdd460 r mcif_wb30_shift +ffffffff82bdd50c r mcif_wb30_mask +ffffffff82bdd7b8 r aux_mask +ffffffff82bdd818 r aux_shift +ffffffff82bdd830 r i2c_shifts +ffffffff82bdd85c r i2c_masks +ffffffff82bdd900 r audio_shift +ffffffff82bdd918 r audio_mask +ffffffff82bdd954 r se_shift +ffffffff82bdda30 r se_mask +ffffffff82bddd9c r vpg_shift +ffffffff82bdddc4 r vpg_mask +ffffffff82bdde58 r afmt_shift +ffffffff82bdde6c r afmt_mask +ffffffff82bddeb0 r hpo_dp_se_shift +ffffffff82bdded8 r hpo_dp_se_mask +ffffffff82bddf78 r apg_shift +ffffffff82bddf80 r apg_mask +ffffffff82bddf98 r hpo_dp_le_shift +ffffffff82bddfb4 r hpo_dp_le_mask +ffffffff82bde018 r hwseq_shift +ffffffff82bde098 r hwseq_mask +ffffffff82bdf000 r dcn321_link_enc_funcs +ffffffff82be0000 r res_cap_dcn321 +ffffffff82be0040 r debug_defaults_diags +ffffffff82be01b8 r dccg_shift +ffffffff82be0250 r dccg_mask +ffffffff82be04ac r abm_shift +ffffffff82be04c0 r abm_mask +ffffffff82be0508 r res_create_funcs +ffffffff82be0538 r res_create_maximus_funcs +ffffffff82be0568 r plane_cap +ffffffff82be0594 r le_shift +ffffffff82be0684 r le_mask +ffffffff82be0a3c r link_enc_feature +ffffffff82be0a50 r debug_defaults_drv +ffffffff82be0bc8 r cs_shift +ffffffff82be0bd4 r cs_mask +ffffffff82be0bfc r hubbub_shift +ffffffff82be0c84 r hubbub_mask +ffffffff82be0ea0 r vmid_shifts +ffffffff82be0ea8 r vmid_masks +ffffffff82be0ec8 r hubp_shift +ffffffff82be0fc4 r hubp_mask +ffffffff82be13b4 r tf_shift +ffffffff82be1684 r tf_mask +ffffffff82be21c4 r opp_shift +ffffffff82be21fc r opp_mask +ffffffff82be22d0 r optc_shift +ffffffff82be2390 r optc_mask +ffffffff82be268c r mpc_shift +ffffffff82be2768 r mpc_mask +ffffffff82be2ad4 r dsc_shift +ffffffff82be2b8c r dsc_mask +ffffffff82be2e64 r dwbc30_shift +ffffffff82be2f98 r dwbc30_mask +ffffffff82be3460 r mcif_wb30_shift +ffffffff82be350c r mcif_wb30_mask +ffffffff82be37b8 r aux_mask +ffffffff82be3818 r aux_shift +ffffffff82be3830 r i2c_shifts +ffffffff82be385c r i2c_masks +ffffffff82be3900 r audio_shift +ffffffff82be3918 r audio_mask +ffffffff82be3954 r se_shift +ffffffff82be3a30 r se_mask +ffffffff82be3d9c r vpg_shift +ffffffff82be3dc4 r vpg_mask +ffffffff82be3e58 r afmt_shift +ffffffff82be3e6c r afmt_mask +ffffffff82be3eb0 r hpo_dp_se_shift +ffffffff82be3ed8 r hpo_dp_se_mask +ffffffff82be3f78 r apg_shift +ffffffff82be3f80 r apg_mask +ffffffff82be3f98 r hpo_dp_le_shift +ffffffff82be3fb4 r hpo_dp_le_mask +ffffffff82be4018 r hwseq_shift +ffffffff82be4098 r hwseq_mask +ffffffff82be6000 R dcn10_soc_defaults +ffffffff82be608c R dcn10_ip_defaults +ffffffff82bf1000 R dml20_funcs +ffffffff82bf1030 R dml20v2_funcs +ffffffff82bf1060 R dml21_funcs +ffffffff82bf1090 R dml30_funcs +ffffffff82bf10c0 R dml31_funcs +ffffffff82bf10f0 R dml314_funcs +ffffffff82bf1120 R dml32_funcs +ffffffff82bf4000 R qp_table_422_10bpc_min +ffffffff82bf4740 R qp_table_444_8bpc_max +ffffffff82bf5080 R qp_table_420_12bpc_max +ffffffff82bf57c0 R qp_table_444_10bpc_min +ffffffff82bf6400 R qp_table_420_8bpc_max +ffffffff82bf6840 R qp_table_444_8bpc_min +ffffffff82bf7180 R qp_table_444_12bpc_min +ffffffff82bf80c0 R qp_table_420_12bpc_min +ffffffff82bf8800 R qp_table_422_12bpc_min +ffffffff82bf9140 R qp_table_422_12bpc_max +ffffffff82bf9a80 R qp_table_444_12bpc_max +ffffffff82bfa9c0 R qp_table_420_8bpc_min +ffffffff82bfae00 R qp_table_422_8bpc_min +ffffffff82bfb340 R qp_table_422_10bpc_max +ffffffff82bfba80 R qp_table_420_10bpc_max +ffffffff82bfc040 R qp_table_420_10bpc_min +ffffffff82bfc600 R qp_table_444_10bpc_max +ffffffff82bfd240 R qp_table_422_8bpc_max +ffffffff82bff000 r funcs +ffffffff82bff050 r hpd_regs +ffffffff82bff1a0 r hpd_shift +ffffffff82bff1b0 r hpd_mask +ffffffff82bff1c0 r ddc_data_regs +ffffffff82bff3a0 r ddc_clk_regs +ffffffff82bff580 r ddc_shift +ffffffff82bff5a8 r ddc_mask +ffffffff82c00000 r funcs ffffffff82c01000 r funcs ffffffff82c01050 r hpd_regs ffffffff82c011a0 r hpd_shift @@ -44916,111 +44913,111 @@ ffffffff82c051c0 r ddc_data_regs ffffffff82c053a0 r ddc_clk_regs ffffffff82c05580 r ddc_shift ffffffff82c055a8 r ddc_mask +ffffffff82c055d0 r generic_regs +ffffffff82c05640 r generic_shift +ffffffff82c05650 r generic_mask ffffffff82c06000 r funcs ffffffff82c07000 r funcs ffffffff82c07050 r hpd_regs ffffffff82c071a0 r hpd_shift ffffffff82c071b0 r hpd_mask -ffffffff82c071c0 r ddc_data_regs -ffffffff82c073a0 r ddc_clk_regs -ffffffff82c07580 r ddc_shift -ffffffff82c075a8 r ddc_mask -ffffffff82c075d0 r generic_regs -ffffffff82c07640 r generic_shift -ffffffff82c07650 r generic_mask +ffffffff82c071c0 r ddc_data_regs_dcn +ffffffff82c07370 r ddc_clk_regs_dcn +ffffffff82c07520 r ddc_shift +ffffffff82c07610 r ddc_mask +ffffffff82c07700 r generic_regs +ffffffff82c07770 r generic_shift +ffffffff82c07780 r generic_mask ffffffff82c08000 r funcs ffffffff82c09000 r funcs ffffffff82c09050 r hpd_regs -ffffffff82c091a0 r hpd_shift -ffffffff82c091b0 r hpd_mask -ffffffff82c091c0 r ddc_data_regs_dcn -ffffffff82c09370 r ddc_clk_regs_dcn -ffffffff82c09520 r ddc_shift -ffffffff82c09610 r ddc_mask -ffffffff82c09700 r generic_regs -ffffffff82c09770 r generic_shift -ffffffff82c09780 r generic_mask +ffffffff82c09168 r hpd_shift +ffffffff82c09178 r hpd_mask +ffffffff82c09190 r ddc_data_regs_dcn +ffffffff82c092c0 r ddc_clk_regs_dcn +ffffffff82c093f0 r ddc_shift +ffffffff82c094e0 r ddc_mask +ffffffff82c095d0 r generic_regs +ffffffff82c09604 r generic_shift +ffffffff82c0960c r generic_mask ffffffff82c0a000 r funcs ffffffff82c0b000 r funcs ffffffff82c0b050 r hpd_regs -ffffffff82c0b168 r hpd_shift -ffffffff82c0b178 r hpd_mask -ffffffff82c0b190 r ddc_data_regs_dcn -ffffffff82c0b2c0 r ddc_clk_regs_dcn -ffffffff82c0b3f0 r ddc_shift -ffffffff82c0b4e0 r ddc_mask -ffffffff82c0b5d0 r generic_regs -ffffffff82c0b604 r generic_shift -ffffffff82c0b60c r generic_mask +ffffffff82c0b1a0 r hpd_shift +ffffffff82c0b1b0 r hpd_mask +ffffffff82c0b1c0 r ddc_data_regs_dcn +ffffffff82c0b370 r ddc_clk_regs_dcn +ffffffff82c0b520 r ddc_shift +ffffffff82c0b610 r ddc_mask +ffffffff82c0b700 r generic_regs +ffffffff82c0b770 r generic_shift +ffffffff82c0b780 r generic_mask ffffffff82c0c000 r funcs ffffffff82c0d000 r funcs ffffffff82c0d050 r hpd_regs -ffffffff82c0d1a0 r hpd_shift -ffffffff82c0d1b0 r hpd_mask -ffffffff82c0d1c0 r ddc_data_regs_dcn -ffffffff82c0d370 r ddc_clk_regs_dcn -ffffffff82c0d520 r ddc_shift -ffffffff82c0d610 r ddc_mask -ffffffff82c0d700 r generic_regs -ffffffff82c0d770 r generic_shift -ffffffff82c0d780 r generic_mask +ffffffff82c0d168 r hpd_shift +ffffffff82c0d178 r hpd_mask +ffffffff82c0d190 r ddc_data_regs_dcn +ffffffff82c0d300 r ddc_clk_regs_dcn +ffffffff82c0d470 r ddc_shift +ffffffff82c0d560 r ddc_mask +ffffffff82c0d650 r generic_regs +ffffffff82c0d6c0 r generic_shift +ffffffff82c0d6d0 r generic_mask ffffffff82c0e000 r funcs ffffffff82c0f000 r funcs ffffffff82c0f050 r hpd_regs ffffffff82c0f168 r hpd_shift ffffffff82c0f178 r hpd_mask ffffffff82c0f190 r ddc_data_regs_dcn -ffffffff82c0f300 r ddc_clk_regs_dcn -ffffffff82c0f470 r ddc_shift -ffffffff82c0f560 r ddc_mask -ffffffff82c0f650 r generic_regs -ffffffff82c0f6c0 r generic_shift -ffffffff82c0f6d0 r generic_mask +ffffffff82c0f340 r ddc_clk_regs_dcn +ffffffff82c0f4f0 r ddc_shift +ffffffff82c0f5e0 r ddc_mask +ffffffff82c0f6d0 r generic_regs +ffffffff82c0f740 r generic_shift +ffffffff82c0f750 r generic_mask ffffffff82c10000 r funcs ffffffff82c11000 r funcs -ffffffff82c11050 r hpd_regs -ffffffff82c11168 r hpd_shift -ffffffff82c11178 r hpd_mask -ffffffff82c11190 r ddc_data_regs_dcn -ffffffff82c11340 r ddc_clk_regs_dcn -ffffffff82c114f0 r ddc_shift -ffffffff82c115e0 r ddc_mask -ffffffff82c116d0 r generic_regs -ffffffff82c11740 r generic_shift -ffffffff82c11750 r generic_mask ffffffff82c12000 r funcs ffffffff82c13000 r funcs -ffffffff82c14000 r funcs -ffffffff82c15000 r funcs -ffffffff82c16000 r hdmi_14_protection -ffffffff82c16010 r dp_11_protection -ffffffff82c16020 r hdcp_i2c_offsets -ffffffff82c16050 r hdcp_dpcd_addrs -ffffffff82c17000 r irq_service_funcs_dce110 -ffffffff82c17010 r irq_source_info_dce110 -ffffffff82c182a0 r dummy_irq_info_funcs -ffffffff82c182b0 r hpd_irq_info_funcs -ffffffff82c182c0 r hpd_rx_irq_info_funcs -ffffffff82c182d0 r pflip_irq_info_funcs -ffffffff82c182e0 r vupdate_irq_info_funcs -ffffffff82c182f0 r vblank_irq_info_funcs -ffffffff82c19000 r irq_service_funcs_dce120 +ffffffff82c14000 r hdmi_14_protection +ffffffff82c14010 r dp_11_protection +ffffffff82c14020 r hdcp_i2c_offsets +ffffffff82c14050 r hdcp_dpcd_addrs +ffffffff82c15000 r irq_service_funcs_dce110 +ffffffff82c15010 r irq_source_info_dce110 +ffffffff82c162a0 r dummy_irq_info_funcs +ffffffff82c162b0 r hpd_irq_info_funcs +ffffffff82c162c0 r hpd_rx_irq_info_funcs +ffffffff82c162d0 r pflip_irq_info_funcs +ffffffff82c162e0 r vupdate_irq_info_funcs +ffffffff82c162f0 r vblank_irq_info_funcs +ffffffff82c17000 r irq_service_funcs_dce120 +ffffffff82c17008 r dummy_irq_info_funcs +ffffffff82c17018 r hpd_irq_info_funcs +ffffffff82c17028 r hpd_rx_irq_info_funcs +ffffffff82c17038 r pflip_irq_info_funcs +ffffffff82c17048 r vupdate_irq_info_funcs +ffffffff82c17058 r vblank_irq_info_funcs +ffffffff82c17070 r irq_source_info_dce120 +ffffffff82c19000 r irq_service_funcs_dce80 ffffffff82c19008 r dummy_irq_info_funcs ffffffff82c19018 r hpd_irq_info_funcs ffffffff82c19028 r hpd_rx_irq_info_funcs ffffffff82c19038 r pflip_irq_info_funcs ffffffff82c19048 r vupdate_irq_info_funcs ffffffff82c19058 r vblank_irq_info_funcs -ffffffff82c19070 r irq_source_info_dce120 -ffffffff82c1b000 r irq_service_funcs_dce80 +ffffffff82c19070 r irq_source_info_dce80 +ffffffff82c1b000 r irq_service_funcs_dcn10 ffffffff82c1b008 r dummy_irq_info_funcs ffffffff82c1b018 r hpd_irq_info_funcs ffffffff82c1b028 r hpd_rx_irq_info_funcs ffffffff82c1b038 r pflip_irq_info_funcs -ffffffff82c1b048 r vupdate_irq_info_funcs +ffffffff82c1b048 r vupdate_no_lock_irq_info_funcs ffffffff82c1b058 r vblank_irq_info_funcs -ffffffff82c1b070 r irq_source_info_dce80 -ffffffff82c1d000 r irq_service_funcs_dcn10 +ffffffff82c1b068 r vline0_irq_info_funcs +ffffffff82c1b080 r irq_source_info_dcn10 +ffffffff82c1d000 r irq_service_funcs_dcn20 ffffffff82c1d008 r dummy_irq_info_funcs ffffffff82c1d018 r hpd_irq_info_funcs ffffffff82c1d028 r hpd_rx_irq_info_funcs @@ -45028,8 +45025,8 @@ ffffffff82c1d038 r pflip_irq_info_funcs ffffffff82c1d048 r vupdate_no_lock_irq_info_funcs ffffffff82c1d058 r vblank_irq_info_funcs ffffffff82c1d068 r vline0_irq_info_funcs -ffffffff82c1d080 r irq_source_info_dcn10 -ffffffff82c1f000 r irq_service_funcs_dcn20 +ffffffff82c1d080 r irq_source_info_dcn20 +ffffffff82c1f000 r irq_service_funcs_dcn201 ffffffff82c1f008 r dummy_irq_info_funcs ffffffff82c1f018 r hpd_irq_info_funcs ffffffff82c1f028 r hpd_rx_irq_info_funcs @@ -45037,18 +45034,19 @@ ffffffff82c1f038 r pflip_irq_info_funcs ffffffff82c1f048 r vupdate_no_lock_irq_info_funcs ffffffff82c1f058 r vblank_irq_info_funcs ffffffff82c1f068 r vline0_irq_info_funcs -ffffffff82c1f080 r irq_source_info_dcn20 -ffffffff82c21000 r irq_service_funcs_dcn201 -ffffffff82c21008 r dummy_irq_info_funcs -ffffffff82c21018 r hpd_irq_info_funcs -ffffffff82c21028 r hpd_rx_irq_info_funcs -ffffffff82c21038 r pflip_irq_info_funcs -ffffffff82c21048 r vupdate_no_lock_irq_info_funcs -ffffffff82c21058 r vblank_irq_info_funcs -ffffffff82c21068 r vline0_irq_info_funcs -ffffffff82c21080 r irq_source_info_dcn201 -ffffffff82c23000 r irq_source_info_dcn21 -ffffffff82c24290 r irq_service_funcs_dcn21 +ffffffff82c1f080 r irq_source_info_dcn201 +ffffffff82c21000 r irq_source_info_dcn21 +ffffffff82c22290 r irq_service_funcs_dcn21 +ffffffff82c22298 r dummy_irq_info_funcs +ffffffff82c222a8 r hpd_irq_info_funcs +ffffffff82c222b8 r hpd_rx_irq_info_funcs +ffffffff82c222c8 r pflip_irq_info_funcs +ffffffff82c222d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c222e8 r vblank_irq_info_funcs +ffffffff82c222f8 r vline0_irq_info_funcs +ffffffff82c22308 r dmub_outbox_irq_info_funcs +ffffffff82c23000 r irq_source_info_dcn30 +ffffffff82c24290 r irq_service_funcs_dcn30 ffffffff82c24298 r dummy_irq_info_funcs ffffffff82c242a8 r hpd_irq_info_funcs ffffffff82c242b8 r hpd_rx_irq_info_funcs @@ -45056,9 +45054,9 @@ ffffffff82c242c8 r pflip_irq_info_funcs ffffffff82c242d8 r vupdate_no_lock_irq_info_funcs ffffffff82c242e8 r vblank_irq_info_funcs ffffffff82c242f8 r vline0_irq_info_funcs -ffffffff82c24308 r dmub_outbox_irq_info_funcs -ffffffff82c25000 r irq_source_info_dcn30 -ffffffff82c26290 r irq_service_funcs_dcn30 +ffffffff82c24308 r dmub_trace_irq_info_funcs +ffffffff82c25000 r irq_source_info_dcn302 +ffffffff82c26290 r irq_service_funcs_dcn302 ffffffff82c26298 r dummy_irq_info_funcs ffffffff82c262a8 r hpd_irq_info_funcs ffffffff82c262b8 r hpd_rx_irq_info_funcs @@ -45067,27 +45065,27 @@ ffffffff82c262d8 r vupdate_no_lock_irq_info_funcs ffffffff82c262e8 r vblank_irq_info_funcs ffffffff82c262f8 r vline0_irq_info_funcs ffffffff82c26308 r dmub_trace_irq_info_funcs -ffffffff82c27000 r irq_source_info_dcn302 -ffffffff82c28290 r irq_service_funcs_dcn302 -ffffffff82c28298 r dummy_irq_info_funcs -ffffffff82c282a8 r hpd_irq_info_funcs -ffffffff82c282b8 r hpd_rx_irq_info_funcs -ffffffff82c282c8 r pflip_irq_info_funcs -ffffffff82c282d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c282e8 r vblank_irq_info_funcs -ffffffff82c282f8 r vline0_irq_info_funcs -ffffffff82c28308 r dmub_trace_irq_info_funcs -ffffffff82c29000 r irq_service_funcs_dcn303 -ffffffff82c29008 r dummy_irq_info_funcs -ffffffff82c29018 r hpd_irq_info_funcs -ffffffff82c29028 r hpd_rx_irq_info_funcs -ffffffff82c29038 r pflip_irq_info_funcs -ffffffff82c29048 r vupdate_no_lock_irq_info_funcs -ffffffff82c29058 r vblank_irq_info_funcs -ffffffff82c29068 r vline0_irq_info_funcs -ffffffff82c29080 r irq_source_info_dcn303 -ffffffff82c2b000 r irq_source_info_dcn31 -ffffffff82c2c290 r irq_service_funcs_dcn31 +ffffffff82c27000 r irq_service_funcs_dcn303 +ffffffff82c27008 r dummy_irq_info_funcs +ffffffff82c27018 r hpd_irq_info_funcs +ffffffff82c27028 r hpd_rx_irq_info_funcs +ffffffff82c27038 r pflip_irq_info_funcs +ffffffff82c27048 r vupdate_no_lock_irq_info_funcs +ffffffff82c27058 r vblank_irq_info_funcs +ffffffff82c27068 r vline0_irq_info_funcs +ffffffff82c27080 r irq_source_info_dcn303 +ffffffff82c29000 r irq_source_info_dcn31 +ffffffff82c2a290 r irq_service_funcs_dcn31 +ffffffff82c2a298 r dummy_irq_info_funcs +ffffffff82c2a2a8 r hpd_irq_info_funcs +ffffffff82c2a2b8 r hpd_rx_irq_info_funcs +ffffffff82c2a2c8 r pflip_irq_info_funcs +ffffffff82c2a2d8 r vupdate_no_lock_irq_info_funcs +ffffffff82c2a2e8 r vblank_irq_info_funcs +ffffffff82c2a2f8 r vline0_irq_info_funcs +ffffffff82c2a308 r outbox_irq_info_funcs +ffffffff82c2b000 r irq_source_info_dcn314 +ffffffff82c2c290 r irq_service_funcs_dcn314 ffffffff82c2c298 r dummy_irq_info_funcs ffffffff82c2c2a8 r hpd_irq_info_funcs ffffffff82c2c2b8 r hpd_rx_irq_info_funcs @@ -45096,8 +45094,8 @@ ffffffff82c2c2d8 r vupdate_no_lock_irq_info_funcs ffffffff82c2c2e8 r vblank_irq_info_funcs ffffffff82c2c2f8 r vline0_irq_info_funcs ffffffff82c2c308 r outbox_irq_info_funcs -ffffffff82c2d000 r irq_source_info_dcn314 -ffffffff82c2e290 r irq_service_funcs_dcn314 +ffffffff82c2d000 r irq_source_info_dcn315 +ffffffff82c2e290 r irq_service_funcs_dcn315 ffffffff82c2e298 r dummy_irq_info_funcs ffffffff82c2e2a8 r hpd_irq_info_funcs ffffffff82c2e2b8 r hpd_rx_irq_info_funcs @@ -45106,8 +45104,8 @@ ffffffff82c2e2d8 r vupdate_no_lock_irq_info_funcs ffffffff82c2e2e8 r vblank_irq_info_funcs ffffffff82c2e2f8 r vline0_irq_info_funcs ffffffff82c2e308 r outbox_irq_info_funcs -ffffffff82c2f000 r irq_source_info_dcn315 -ffffffff82c30290 r irq_service_funcs_dcn315 +ffffffff82c2f000 r irq_source_info_dcn32 +ffffffff82c30290 r irq_service_funcs_dcn32 ffffffff82c30298 r dummy_irq_info_funcs ffffffff82c302a8 r hpd_irq_info_funcs ffffffff82c302b8 r hpd_rx_irq_info_funcs @@ -45116,9456 +45114,9446 @@ ffffffff82c302d8 r vupdate_no_lock_irq_info_funcs ffffffff82c302e8 r vblank_irq_info_funcs ffffffff82c302f8 r vline0_irq_info_funcs ffffffff82c30308 r outbox_irq_info_funcs -ffffffff82c31000 r irq_source_info_dcn32 -ffffffff82c32290 r irq_service_funcs_dcn32 -ffffffff82c32298 r dummy_irq_info_funcs -ffffffff82c322a8 r hpd_irq_info_funcs -ffffffff82c322b8 r hpd_rx_irq_info_funcs -ffffffff82c322c8 r pflip_irq_info_funcs -ffffffff82c322d8 r vupdate_no_lock_irq_info_funcs -ffffffff82c322e8 r vblank_irq_info_funcs -ffffffff82c322f8 r vline0_irq_info_funcs -ffffffff82c32308 r outbox_irq_info_funcs -ffffffff82c33000 r dio_link_hwss -ffffffff82c34000 r dpia_link_hwss -ffffffff82c35000 r hpo_dp_link_hwss -ffffffff82c36000 r virtual_lnk_enc_funcs -ffffffff82c37000 r virtual_link_hwss -ffffffff82c38000 r virtual_str_enc_funcs -ffffffff82c39000 R dmub_srv_dcn20_regs -ffffffff82c3a000 R dmub_srv_dcn21_regs -ffffffff82c3b000 R dmub_srv_dcn30_regs -ffffffff82c3c000 R dmub_srv_dcn301_regs -ffffffff82c3d000 R dmub_srv_dcn302_regs -ffffffff82c3e000 R dmub_srv_dcn303_regs -ffffffff82c3f000 R dmub_srv_dcn31_regs -ffffffff82c40000 R dmub_srv_dcn315_regs -ffffffff82c41000 R dmub_srv_dcn316_regs -ffffffff82c42000 R dmub_srv_dcn32_regs -ffffffff82c43000 r numerator01 -ffffffff82c43020 r numerator02 -ffffffff82c43040 r numerator04 -ffffffff82c43060 r numerator05 -ffffffff82c45000 r abm_settings -ffffffff82c45010 r abm_settings_config0 -ffffffff82c45050 r abm_settings_config1 -ffffffff82c45088 r min_reduction_table_v_2_2 -ffffffff82c45095 r max_reduction_table_v_2_2 -ffffffff82c450a2 r min_reduction_table -ffffffff82c450af r max_reduction_table -ffffffff82c46000 R amdgpu_pp_profile_name -ffffffff82c47000 r pp_lib_thermal_controller_names -ffffffff82c48000 r pp_ip_funcs -ffffffff82c480a0 R pp_smu_ip_block -ffffffff82c480b8 r pp_dpm_funcs +ffffffff82c31000 r dio_link_hwss +ffffffff82c32000 r dpia_link_hwss +ffffffff82c33000 r hpo_dp_link_hwss +ffffffff82c34000 r virtual_lnk_enc_funcs +ffffffff82c35000 r virtual_link_hwss +ffffffff82c36000 r virtual_str_enc_funcs +ffffffff82c37000 R dmub_srv_dcn20_regs +ffffffff82c38000 R dmub_srv_dcn21_regs +ffffffff82c39000 R dmub_srv_dcn30_regs +ffffffff82c3a000 R dmub_srv_dcn301_regs +ffffffff82c3b000 R dmub_srv_dcn302_regs +ffffffff82c3c000 R dmub_srv_dcn303_regs +ffffffff82c3d000 R dmub_srv_dcn31_regs +ffffffff82c3e000 R dmub_srv_dcn315_regs +ffffffff82c3f000 R dmub_srv_dcn316_regs +ffffffff82c40000 R dmub_srv_dcn32_regs +ffffffff82c41000 r numerator01 +ffffffff82c41020 r numerator02 +ffffffff82c41040 r numerator04 +ffffffff82c41060 r numerator05 +ffffffff82c43000 r abm_settings +ffffffff82c43010 r abm_settings_config0 +ffffffff82c43050 r abm_settings_config1 +ffffffff82c43088 r min_reduction_table_v_2_2 +ffffffff82c43095 r max_reduction_table_v_2_2 +ffffffff82c430a2 r min_reduction_table +ffffffff82c430af r max_reduction_table +ffffffff82c44000 R amdgpu_pp_profile_name +ffffffff82c45000 r pp_lib_thermal_controller_names +ffffffff82c46000 r pp_ip_funcs +ffffffff82c460a0 R pp_smu_ip_block +ffffffff82c460b8 r pp_dpm_funcs +ffffffff82c47000 r gpio_tbl +ffffffff82c470f0 r enable_fb_req_rej_tbl +ffffffff82c47140 r use_bclk_tbl +ffffffff82c47310 r turn_off_plls_tbl +ffffffff82c47640 r enter_baco_tbl +ffffffff82c47730 r exit_baco_tbl +ffffffff82c47850 r clean_baco_tbl +ffffffff82c48000 r gpio_tbl +ffffffff82c480f0 r enable_fb_req_rej_tbl +ffffffff82c48140 r use_bclk_tbl +ffffffff82c482e0 r turn_off_plls_tbl +ffffffff82c48370 r clk_req_b_tbl +ffffffff82c48490 r enter_baco_tbl +ffffffff82c485b0 r exit_baco_tbl +ffffffff82c486d0 r clean_baco_tbl ffffffff82c49000 r gpio_tbl ffffffff82c490f0 r enable_fb_req_rej_tbl -ffffffff82c49140 r use_bclk_tbl -ffffffff82c49310 r turn_off_plls_tbl -ffffffff82c49640 r enter_baco_tbl -ffffffff82c49730 r exit_baco_tbl -ffffffff82c49850 r clean_baco_tbl -ffffffff82c4a000 r gpio_tbl -ffffffff82c4a0f0 r enable_fb_req_rej_tbl -ffffffff82c4a140 r use_bclk_tbl -ffffffff82c4a2e0 r turn_off_plls_tbl -ffffffff82c4a370 r clk_req_b_tbl -ffffffff82c4a490 r enter_baco_tbl -ffffffff82c4a5b0 r exit_baco_tbl -ffffffff82c4a6d0 r clean_baco_tbl -ffffffff82c4b000 r gpio_tbl -ffffffff82c4b0f0 r enable_fb_req_rej_tbl -ffffffff82c4b140 r use_bclk_tbl_vg -ffffffff82c4b200 r turn_off_plls_tbl_vg -ffffffff82c4b350 r use_bclk_tbl -ffffffff82c4b440 r turn_off_plls_tbl -ffffffff82c4b5f0 r clk_req_b_tbl -ffffffff82c4b710 r enter_baco_tbl -ffffffff82c4b830 r exit_baco_tbl -ffffffff82c4b950 r clean_baco_tbl -ffffffff82c4c000 r vega10_fuses_default -ffffffff82c5b000 r pp_r600_encode_lanes -ffffffff82c5c000 R pptable_v1_0_funcs -ffffffff82c5d000 R pptable_funcs -ffffffff82c5d020 r soft_dummy_pp_table -ffffffff82c5e000 r smu10_hwmgr_funcs -ffffffff82c5f000 r smu7_hwmgr_funcs -ffffffff82c5f2f8 r smu7_irq_funcs -ffffffff82c5f310 r SMU7ThermalPolicy -ffffffff82c60000 r GCCACConfig_Polaris10 -ffffffff82c601b0 r DIDTConfig_Polaris10 -ffffffff82c60a50 r GCCACConfig_Polaris11 -ffffffff82c60c00 r DIDTConfig_Polaris11_Kicker -ffffffff82c614a0 r DIDTConfig_Polaris11 -ffffffff82c61d40 r DIDTConfig_Polaris12 -ffffffff82c625e0 r GCCACConfig_VegaM -ffffffff82c62790 r DIDTConfig_VegaM -ffffffff82c64000 r smu8_hwmgr_funcs -ffffffff82c642f0 r SMU7ThermalPolicy -ffffffff82c65000 r smu9_irq_funcs -ffffffff82c66000 r gpio_tbl_iceland -ffffffff82c66060 r gpio_tbl -ffffffff82c66150 r enable_fb_req_rej_tbl -ffffffff82c661a0 r use_bclk_tbl -ffffffff82c66370 r turn_off_plls_tbl -ffffffff82c66610 r enter_baco_tbl -ffffffff82c66730 r exit_baco_tbl_iceland -ffffffff82c66870 r clean_baco_tbl_iceland -ffffffff82c66890 r exit_baco_tbl -ffffffff82c669b0 r clean_baco_tbl -ffffffff82c67000 r pre_baco_tbl -ffffffff82c67090 r enter_baco_tbl -ffffffff82c672b0 r exit_baco_tbl -ffffffff82c67520 r clean_baco_tbl -ffffffff82c68000 r vega10_hwmgr_funcs -ffffffff82c682f0 r channel_number -ffffffff82c68320 r SMU7ThermalWithDelayPolicy -ffffffff82c69000 r SEDiDtStallCtrlConfig_vega10 -ffffffff82c69110 r SEDiDtStallPatternConfig_vega10 -ffffffff82c692e0 r SEDiDtWeightConfig_Vega10 -ffffffff82c693b0 r SEDiDtCtrl1Config_Vega10 -ffffffff82c69440 r SEDiDtCtrl2Config_Vega10 -ffffffff82c69510 r SEDiDtCtrl3Config_vega10 -ffffffff82c69820 r SEDiDtTuningCtrlConfig_Vega10 -ffffffff82c698b0 r SELCacConfig_Vega10 -ffffffff82c69a40 r SEDiDtCtrl0Config_Vega10 -ffffffff82c69d10 r AvfsPSMInitConfig_vega10 -ffffffff82c69d90 r SEEDCStallPatternConfig_Vega10 -ffffffff82c69ea0 r SEEDCStallDelayConfig_Vega10 -ffffffff82c69f80 r SEEDCCtrlConfig_Vega10 -ffffffff82c6a040 r PSMSEEDCStallPatternConfig_Vega10 -ffffffff82c6a0c0 r PSMSEEDCStallDelayConfig_Vega10 -ffffffff82c6a1d0 r PSMSEEDCCtrlResetConfig_Vega10 -ffffffff82c6a290 r PSMSEEDCCtrlConfig_Vega10 -ffffffff82c6a350 r SEEDCForceStallPatternConfig_Vega10 -ffffffff82c6a3e0 r SEEDCCtrlForceStallConfig_Vega10 -ffffffff82c6b000 R vega10_pptable_funcs -ffffffff82c6c000 r pre_baco_tbl -ffffffff82c6c090 r enter_baco_tbl -ffffffff82c6c2b0 r exit_baco_tbl -ffffffff82c6c520 r clean_baco_tbl -ffffffff82c6d000 r vega12_hwmgr_funcs -ffffffff82c6d2f0 r SMU7ThermalWithDelayPolicy -ffffffff82c6d340 r link_width -ffffffff82c6e000 R vega12_pptable_funcs -ffffffff82c6f000 r clean_baco_tbl -ffffffff82c70000 r vega20_hwmgr_funcs -ffffffff82c702f0 r SMU7ThermalWithDelayPolicy -ffffffff82c70340 r link_width -ffffffff82c71000 R vega20_pptable_funcs -ffffffff82c72000 R ci_smu_funcs -ffffffff82c720e0 r defaults_hawaii_pro -ffffffff82c7212c r defaults_hawaii_xt -ffffffff82c72178 r defaults_saturn_xt -ffffffff82c721c4 r defaults_bonaire_xt -ffffffff82c72210 r ci_program_jump_on_start.data -ffffffff82c73000 R fiji_smu_funcs -ffffffff82c730e0 r avfs_graphics_level -ffffffff82c73240 r fiji_power_tune_data_set_array -ffffffff82c73246 r fiji_clock_stretch_amount_conversion -ffffffff82c73260 r fiji_clock_stretcher_ddt_table -ffffffff82c74000 R iceland_smu_funcs -ffffffff82c740e0 r defaults_icelandxt -ffffffff82c7412c r defaults_icelandpro -ffffffff82c74178 r defaults_iceland -ffffffff82c75000 R polaris10_smu_funcs -ffffffff82c750e0 r avfs_graphics_level_polaris10 -ffffffff82c752a0 r avfs_memory_level_polaris10 -ffffffff82c752c0 r polaris10_power_tune_data_set_array -ffffffff82c75310 r Range_Table -ffffffff82c76000 R smu10_smu_funcs -ffffffff82c77000 r smu7_program_jump_on_start.data -ffffffff82c77010 r pwr_virus_table_pre -ffffffff82c77680 r pwr_virus_table_post -ffffffff82c77f80 r pwr_virus_section1 -ffffffff82c78610 r pwr_virus_section2 -ffffffff82c78660 r pwr_virus_section3 -ffffffff82c7fab0 r pwr_virus_section4 -ffffffff82c7fe80 r pwr_virus_section5 -ffffffff82c80490 r pwr_virus_section6 -ffffffff82c82000 R smu8_smu_funcs -ffffffff82c83000 R tonga_smu_funcs -ffffffff82c830e0 r tonga_power_tune_data_set_array -ffffffff82c8312c r tonga_clock_stretch_amount_conversion -ffffffff82c83140 r tonga_clock_stretcher_ddt_table -ffffffff82c84000 R vega10_smu_funcs -ffffffff82c85000 R vega12_smu_funcs -ffffffff82c86000 R vega20_smu_funcs -ffffffff82c87000 R vegam_smu_funcs -ffffffff82c870e0 r vegam_power_tune_data_set_array -ffffffff82c87130 r Range_Table -ffffffff82c88000 R smu_ip_funcs -ffffffff82c880a0 R smu_v11_0_ip_block -ffffffff82c880b8 R smu_v12_0_ip_block -ffffffff82c880d0 R smu_v13_0_ip_block -ffffffff82c880e8 r swsmu_pm_funcs -ffffffff82c89000 r arcturus_table_map -ffffffff82c89080 r arcturus_pwr_src_map -ffffffff82c89090 r arcturus_workload_map -ffffffff82c890d0 r arcturus_ppt_funcs -ffffffff82c894a0 r smu11_thermal_policy -ffffffff82c894f0 r arcturus_i2c_algo -ffffffff82c89500 r arcturus_i2c_control_quirks -ffffffff82c89510 r arcturus_throttler_map -ffffffff82c89530 r arcturus_message_map -ffffffff82c89f50 r arcturus_clk_map -ffffffff82c8a010 r arcturus_feature_mask_map -ffffffff82c8b000 r cyan_skillfish_ppt_funcs -ffffffff82c8c000 r navi10_ppt_funcs -ffffffff82c8c3d0 r smu11_thermal_policy -ffffffff82c8c420 r navi10_i2c_algo -ffffffff82c8c430 r navi10_i2c_control_quirks -ffffffff82c8c440 r navi1x_throttler_map -ffffffff82c8c460 r NoDbiPrbs7 -ffffffff82c8d460 r DbiPrbs7 -ffffffff82c8f000 r sienna_cichlid_ppt_funcs -ffffffff82c8f3d0 r smu11_thermal_policy -ffffffff82c8f420 r sienna_cichlid_i2c_algo -ffffffff82c8f430 r sienna_cichlid_i2c_control_quirks -ffffffff82c8f440 r sienna_cichlid_throttler_map -ffffffff82c90000 r smu_v11_0_irq_funcs -ffffffff82c90010 r link_width -ffffffff82c91000 r vangogh_ppt_funcs -ffffffff82c913d0 r vangogh_throttler_map -ffffffff82c92000 r renoir_ppt_funcs -ffffffff82c923d0 r renoir_throttler_map -ffffffff82c93000 r aldebaran_message_map -ffffffff82c93a20 r aldebaran_clk_map -ffffffff82c93ae0 r aldebaran_table_map -ffffffff82c93b60 r aldebaran_ppt_funcs -ffffffff82c93f30 r smu13_thermal_policy -ffffffff82c93f80 r aldebaran_i2c_algo -ffffffff82c93f90 r aldebaran_i2c_control_quirks -ffffffff82c93fa0 r aldebaran_throttler_map -ffffffff82c93fc0 r aldebaran_feature_mask_map -ffffffff82c95000 r smu_v13_0_irq_funcs -ffffffff82c95010 r link_width -ffffffff82c96000 r smu_v13_0_0_ppt_funcs -ffffffff82c963d0 r smu13_thermal_policy -ffffffff82c96420 r smu_v13_0_0_i2c_algo -ffffffff82c96430 r smu_v13_0_0_i2c_control_quirks -ffffffff82c96440 r smu_v13_0_0_throttler_map -ffffffff82c97000 r smu_v13_0_4_ppt_funcs -ffffffff82c98000 r smu_v13_0_5_ppt_funcs -ffffffff82c99000 r smu_v13_0_7_ppt_funcs -ffffffff82c993d0 r smu13_thermal_policy -ffffffff82c99420 r smu_v13_0_7_throttler_map -ffffffff82c9a000 r yellow_carp_ppt_funcs -ffffffff82c9b000 r __smu_message_names -ffffffff82c9c000 R pchb_ca -ffffffff82c9d000 R amas_ca -ffffffff82c9d028 R amas_devices -ffffffff82c9d040 r amas_feature -ffffffff82c9e000 R cardslot_ca -ffffffff82c9f000 R cardbus_ca -ffffffff82ca0000 R com_cardbus_ca -ffffffff82ca1000 R xl_cardbus_ca -ffffffff82ca1030 R xl_cardbus_products -ffffffff82ca2000 R dc_cardbus_ca -ffffffff82ca2030 R dc_cardbus_devices -ffffffff82ca3000 R fxp_cardbus_ca -ffffffff82ca3028 R fxp_cardbus_devices -ffffffff82ca4000 R rl_cardbus_devices -ffffffff82ca4028 R rl_cardbus_ca -ffffffff82ca5000 R re_cardbus_ca -ffffffff82ca5028 R re_cardbus_devices -ffffffff82ca6000 R ath_cardbus_ca -ffffffff82ca7000 R athn_cardbus_ca -ffffffff82ca7030 r athn_cardbus_devices -ffffffff82ca8000 R atw_cardbus_ca -ffffffff82ca8028 R atw_cardbus_devices -ffffffff82ca9000 R rtw_cardbus_ca -ffffffff82ca9028 R rtw_cardbus_devices -ffffffff82caa000 R ral_cardbus_ca -ffffffff82caa030 r ral_cardbus_devices -ffffffff82cab000 R acx_cardbus_ca -ffffffff82cab028 r acx_cardbus_devices -ffffffff82cac000 R pgt_cardbus_ca -ffffffff82cac028 R pgt_cardbus_devices -ffffffff82cad000 R ehci_cardbus_ca -ffffffff82cae000 R ohci_cardbus_ca -ffffffff82caf000 R uhci_cardbus_ca -ffffffff82cb0000 R malo_cardbus_ca -ffffffff82cb0028 r malo_cardbus_devices -ffffffff82cb1000 R bwi_cardbus_ca -ffffffff82cb1030 r bwi_cardbus_devices -ffffffff82cb2000 R pcmcia_ca -ffffffff82cb3000 r pcmcia_parse_cis_tuple.init_cfe -ffffffff82cb4000 r pcmcia_cis_quirks -ffffffff82cb5000 R ep_pcmcia_ca -ffffffff82cb6000 R ne_pcmcia_ca -ffffffff82cb6030 R ne2000devs -ffffffff82cb8000 R aic_pcmcia_ca -ffffffff82cb9000 R com_pcmcia_ca -ffffffff82cba000 R wdc_pcmcia_ca -ffffffff82cbb000 R sm_pcmcia_ca -ffffffff82cbc000 R xe_pcmcia_ca -ffffffff82cbd000 R wi_pcmcia_ca -ffffffff82cbd030 r wi_pcmcia_products -ffffffff82cbe000 R malo_pcmcia_ca -ffffffff82cbf000 R an_pcmcia_ca -ffffffff82cc0000 R pcib_ca -ffffffff82cc1000 R amdpcib_ca -ffffffff82cc1028 R amdpcib_devices -ffffffff82cc2000 R tcpcib_ca -ffffffff82cc2028 R tcpcib_devices -ffffffff82cc3000 R aapic_ca -ffffffff82cc4000 R hme_pci_ca -ffffffff82cc4028 r hme_promhdr -ffffffff82cc402a r hme_promdat -ffffffff82cc5000 R isa_ca -ffffffff82cc6000 R isadma_ca -ffffffff82cc7000 R fdc_ca -ffffffff82cc8000 R fd_ca -ffffffff82cc9000 R com_isa_ca -ffffffff82cca000 R pckbc_isa_ca -ffffffff82ccb000 R vga_isa_ca -ffffffff82ccc000 R wdc_isa_ca -ffffffff82ccd000 R mpu_midi_hw_if -ffffffff82cce000 R mpu_isa_ca -ffffffff82ccf000 R pcppi_ca -ffffffff82cd0000 R spkr_ca -ffffffff82cd0030 r pitchtab -ffffffff82cd1000 R lpt_isa_ca -ffffffff82cd2000 R wbsio_ca -ffffffff82cd3000 R schsio_ca -ffffffff82cd4000 R lm_isa_ca -ffffffff82cd4028 R lm_wbsio_ca -ffffffff82cd5000 R it_sensors -ffffffff82cd5110 R it_vrfact -ffffffff82cd5140 R it_fan_regs -ffffffff82cd5160 R it_fan_ext_regs -ffffffff82cd5178 R it_ca -ffffffff82cd6000 R abitkv_sensors -ffffffff82cd6200 R abitaa_sensors -ffffffff82cd6480 R abitav_sensors -ffffffff82cd6700 R abitas_sensors -ffffffff82cd6980 R abitax_sensors -ffffffff82cd6bc0 R abitm4_sensors -ffffffff82cd6e80 R abitan_sensors -ffffffff82cd7120 R abital_sensors -ffffffff82cd73a0 R abitaw_sensors -ffffffff82cd7700 R abitni_sensors -ffffffff82cd79a0 R abitat_sensors -ffffffff82cd7cc0 R abitan2_sensors -ffffffff82cd7f60 R abitab_sensors -ffffffff82cd8220 R abitan3_sensors -ffffffff82cd8500 R abitaw2_sensors -ffffffff82cd8860 R abitat2_sensors -ffffffff82cd8b60 R abitab2_sensors -ffffffff82cd8ea0 R abitin_sensors -ffffffff82cd91e0 R uguru_ca -ffffffff82cda000 R aps_ca -ffffffff82cdb000 R wsdisplay_emul_ca -ffffffff82cdb030 r charClass -ffffffff82cdc000 r usl_syncops -ffffffff82cdd000 R wsevent_filtops -ffffffff82cde000 R wskbd_ca -ffffffff82cdf000 r latin1_to_upper -ffffffff82ce0000 R wsmouse_ca -ffffffff82ce1000 R cyrillic_to_koi8 -ffffffff82ce1060 R unicode_to_latin2 -ffffffff82ce10e0 R unicode_to_latin7 -ffffffff82ce2000 R wsemul_vt100_ops -ffffffff82ce3000 r decspcgr2uni -ffffffff82ce3100 r dectech2uni -ffffffff82ce3200 r nrctable -ffffffff82ce3320 r nrcovlpos -ffffffff82ce4000 r vt100_fkeys -ffffffff82ce40c0 r vt100_pfkeys -ffffffff82ce40e0 r vt100_numpad -ffffffff82ce5000 R pckbd_ca -ffffffff82ce5028 R pckbd_accessops -ffffffff82ce5040 R pckbd_consops -ffffffff82ce5060 R pckbd_keymapdata -ffffffff82ce5070 R pckbd_xtbl -ffffffff82ce5100 R pckbd_xtbl_ext -ffffffff82ce6000 r pckbd_keydesc_us -ffffffff82ce6250 r pckbd_keydesc_de -ffffffff82ce62f0 r pckbd_keydesc_de_nodead -ffffffff82ce6310 r pckbd_keydesc_fr -ffffffff82ce63d0 r pckbd_keydesc_fr_dvorak_bepo -ffffffff82ce6510 r pckbd_keydesc_dk -ffffffff82ce65a0 r pckbd_keydesc_dk_nodead -ffffffff82ce65b0 r pckbd_keydesc_it -ffffffff82ce6640 r pckbd_keydesc_uk -ffffffff82ce66e0 r pckbd_keydesc_jp -ffffffff82ce6750 r pckbd_keydesc_sv -ffffffff82ce6780 r pckbd_keydesc_sv_nodead -ffffffff82ce6790 r pckbd_keydesc_no -ffffffff82ce67c0 r pckbd_keydesc_no_nodead -ffffffff82ce67d0 r pckbd_keydesc_us_declk -ffffffff82ce6860 r pckbd_keydesc_us_dvorak -ffffffff82ce6900 r pckbd_keydesc_us_colemak -ffffffff82ce6948 r pckbd_keydesc_swapctrlcaps -ffffffff82ce6960 r pckbd_keydesc_iopener -ffffffff82ce69b0 r pckbd_keydesc_es -ffffffff82ce6a50 r pckbd_keydesc_be -ffffffff82ce6b10 r pckbd_keydesc_ru -ffffffff82ce6c80 r pckbd_keydesc_ua -ffffffff82ce6e10 r pckbd_keydesc_sg -ffffffff82ce6ec0 r pckbd_keydesc_sg_nodead -ffffffff82ce6ee0 r pckbd_keydesc_sf -ffffffff82ce6f00 r pckbd_keydesc_pt -ffffffff82ce6f90 r pckbd_keydesc_lt -ffffffff82ce7070 r pckbd_keydesc_la -ffffffff82ce7100 r pckbd_keydesc_br -ffffffff82ce7180 r pckbd_keydesc_tr -ffffffff82ce7230 r pckbd_keydesc_tr_nodead -ffffffff82ce7250 r pckbd_keydesc_pl -ffffffff82ce72b0 r pckbd_keydesc_hu -ffffffff82ce73c0 r pckbd_keydesc_si -ffffffff82ce74d0 r pckbd_keydesc_cf -ffffffff82ce75a0 r pckbd_keydesc_cf_nodead -ffffffff82ce75c0 r pckbd_keydesc_lv -ffffffff82ce7640 r pckbd_keydesc_nl -ffffffff82ce7720 r pckbd_keydesc_nl_nodead -ffffffff82ce7740 r pckbd_keydesc_is -ffffffff82ce77cc r pckbd_keydesc_is_nodead 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ether_ipmulticast_min -ffffffff8312100c D ether_ipmulticast_max -ffffffff83121012 D ether_ip6multicast_min -ffffffff83121018 D ether_ip6multicast_max -ffffffff83122000 D etherip_cloner -ffffffff83122030 D etherip_list -ffffffff83123000 D loop_cloner -ffffffff83124000 D ifmedia_mtx -ffffffff83125000 D ppp_compressors -ffffffff83125020 D ppp_cloner -ffffffff83126000 D ppp_pkt_init -ffffffff83127000 D ppp_bsd_compress -ffffffff83128000 D ppp_deflate -ffffffff83128070 D ppp_deflate_draft -ffffffff83129000 D tun_cloner -ffffffff83129030 D tap_cloner -ffffffff8312a000 D bridgeintrq -ffffffff8312a038 D bridge_cloner -ffffffff8312b000 d veb_cloner -ffffffff8312b030 d vport_cloner -ffffffff8312c000 D vlan_tagh_lk -ffffffff8312c010 D vlan_cloner -ffffffff8312c040 D svlan_cloner -ffffffff8312d000 D pipex_list_mtx -ffffffff8312d010 D pipex_prune -ffffffff8312d018 D pipexoutq -ffffffff8312d050 d SHAPad2 -ffffffff8312e000 D rtmap_gc -ffffffff8312e018 D rt_rc -ffffffff8312f000 D rt_labels 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tcp_syn_bucket_limit -ffffffff8314601c D tcp_syn_use_limit -ffffffff83147000 D tcp_outflags -ffffffff83148000 D tcp_timer_mtx -ffffffff83148010 D tcp_mssdflt -ffffffff83148014 D tcp_rttdflt -ffffffff83148018 D tcp_do_rfc1323 -ffffffff8314801c D tcp_do_sack -ffffffff83148020 D tcp_do_rfc3390 -ffffffff83148024 D tcp_reass_limit -ffffffff83148028 D tcp_sackhole_limit -ffffffff83149000 D tcp_backoff -ffffffff83149034 D tcp_totbackoff -ffffffff8314a000 D tcp_sendspace -ffffffff8314a004 D tcp_recvspace -ffffffff8314a008 D tcp_autorcvbuf_inc -ffffffff8314b000 D udpcksum -ffffffff8314b004 D udp_sendspace -ffffffff8314b008 D udp_recvspace -ffffffff8314c000 D ipsec_flows_mtx -ffffffff8314c010 D ipsec_ids_idle -ffffffff8314c014 D ipsec_ids_next_flow -ffffffff8314c018 D ipsec_policy_head -ffffffff8314c028 D ipsp_ids_gc_timeout -ffffffff8314c070 D tdb_sadb_mtx -ffffffff8314c080 d tdb_hashmask -ffffffff8314d000 D ipo_tdb_mtx -ffffffff8314d010 D ipsec_acquire_mtx -ffffffff8314d020 D ipsec_acquire_head -ffffffff8314e000 D ipsec_keep_invalid -ffffffff8314e004 D ipsec_require_pfs -ffffffff8314e008 D ipsec_soft_timeout -ffffffff8314e00c D ipsec_exp_timeout -ffffffff8314e010 D ipsec_soft_first_use -ffffffff8314e014 D ipsec_exp_first_use -ffffffff8314e018 D ipsec_expire_acquire -ffffffff8314e01c D esp_enable -ffffffff8314e020 D ah_enable -ffffffff8314f000 D udpencap_enable -ffffffff8314f004 D udpencap_port -ffffffff83150000 D carp_vh_rc -ffffffff83150020 D carp_sc_rc -ffffffff83150040 D carp_opts -ffffffff83150058 D carp_cloner -ffffffff83150088 d carp_send_na.mcast -ffffffff83151000 d PADDING -ffffffff83152000 d PADDING -ffffffff83153000 d weak_keys -ffffffff83154000 D swcr_id -ffffffff83155000 D window_inflate -ffffffff83155004 D window_deflate -ffffffff83156000 D ghash_update -ffffffff83157000 D mpls_defttl -ffffffff83157004 D mpls_mapttl_ip -ffffffff83158000 D nfskevq_lock -ffffffff83159000 D nfs_backoff -ffffffff83159020 D nfs_ptimers -ffffffff8315a000 D desirednfsrvcache -ffffffff8315a010 D nonidempotent -ffffffff8315a070 D nfsv2_repstat -ffffffff8315b000 D nfsv2_type -ffffffff8315b030 D nfsv3_type -ffffffff8315b060 D nv2tov_type -ffffffff8315b080 D nv3tov_type -ffffffff8315b0a0 D nfsv3_procid -ffffffff8315b100 D nfsv2_procid -ffffffff8315b15c d nfsv3err_getattr -ffffffff8315b170 d nfsv3err_setattr -ffffffff8315b190 d nfsv3err_lookup -ffffffff8315b1a4 d nfsv3err_access -ffffffff8315b1b0 d nfsv3err_readlink -ffffffff8315b1d0 d nfsv3err_read -ffffffff8315b1f0 d nfsv3err_write -ffffffff8315b210 d nfsv3err_create -ffffffff8315b230 d nfsv3err_mkdir -ffffffff8315b250 d nfsv3err_symlink -ffffffff8315b270 d nfsv3err_mknod -ffffffff8315b290 d nfsv3err_remove -ffffffff8315b2b0 d nfsv3err_rmdir -ffffffff8315b2d0 d nfsv3err_rename -ffffffff8315b300 d nfsv3err_link -ffffffff8315b330 d nfsv3err_readdir -ffffffff8315b350 d nfsv3err_readdirplus -ffffffff8315b366 d nfsv3err_fsstat -ffffffff8315b372 d nfsv3err_fsinfo -ffffffff8315b37c d nfsv3err_pathconf -ffffffff8315b386 d nfsv3err_commit -ffffffff8315c000 D nfsrv3_procs -ffffffff8315c0b8 D nfs_niothreads -ffffffff8315d000 D fragtbl -ffffffff8315e000 D ffs_vtbl -ffffffff8315f000 D softdep_typenames -ffffffff8315f070 D tickdelay -ffffffff83160000 D dirchk -ffffffff83161000 D desireddquot -ffffffff83162000 D amap_list_lock -ffffffff83163000 d uao_list_lock -ffffffff83164000 d uvmexp_countersboot_boot_cpumem -ffffffff831640c0 D uvmexp_counters -ffffffff831640c8 D vm_min_kernel_address -ffffffff83165000 D no_constraint -ffffffff83166000 d uvm_kmapent_warn_rate -ffffffff83167000 D maxslp -ffffffff83168000 D uvmpagerops -ffffffff83169000 D swap_syscall_lock -ffffffff83169010 D oommtx -ffffffff8316a000 D uvm_doswapencrypt -ffffffff8316b000 D gif_list -ffffffff8316b010 D gif_cloner -ffffffff8316c000 D divert6_sendspace -ffffffff8316c004 D divert6_recvspace -ffffffff8316c008 D divb6hashsize -ffffffff8316d000 d in6_get_hw_ifid.allone -ffffffff8316e000 D ip6_sendredirects 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lapic_ppr -ffffffff8317d100 d lapic_isr -ffffffff8317e000 D warn_once -ffffffff8317f000 d errata -ffffffff83180000 D cpu_ucode_intel_mtx -ffffffff83181000 D mem_owner_bios -ffffffff83181008 D mrops -ffffffff83181028 D mtrrmask -ffffffff83181030 D mtrrtomrt -ffffffff83182000 D pmap_pg_wc -ffffffff83182008 D pmaps_lock -ffffffff83182018 d pmap_maxkvaddr -ffffffff83183000 D kv_physwait -ffffffff83184000 D fpu_save_len -ffffffff83185000 D i8259_pic -ffffffff83186000 D softintr_pic -ffffffff83187000 D ipifunc -ffffffff83188000 D setperf_mp_mutex -ffffffff83189000 D db_Grp6 -ffffffff83189040 D db_Grp7 -ffffffff83189100 D db_Grp8 -ffffffff83189140 D db_Grp9 -ffffffff83189200 D db_GrpA -ffffffff83189240 D db_GrpB -ffffffff83189280 D db_GrpC -ffffffff831892c0 D db_inst_0f0x -ffffffff83189440 D db_inst_0f2x -ffffffff831895c0 D db_inst_0f3x -ffffffff83189740 D db_inst_0f8x -ffffffff831898c0 D db_inst_0f9x -ffffffff83189a40 D db_inst_0fax -ffffffff83189bc0 D db_inst_0fbx -ffffffff83189d40 D db_inst_0fcx -ffffffff83189ec0 D db_inst_0f -ffffffff83189f40 D db_Esc92 -ffffffff83189f80 D db_Esc94 -ffffffff83189fc0 D db_Esc95 -ffffffff8318a000 D db_Esc96 -ffffffff8318a040 D db_Esc97 -ffffffff8318a080 D db_Esca5 -ffffffff8318a0c0 D db_Escb4 -ffffffff8318a100 D db_Esce3 -ffffffff8318a140 D db_Escf4 -ffffffff8318a180 D db_Esc8 -ffffffff8318a240 D db_Esc9 -ffffffff8318a300 D db_Esca -ffffffff8318a3c0 D db_Escb -ffffffff8318a480 D db_Escc -ffffffff8318a540 D db_Escd -ffffffff8318a600 D db_Esce -ffffffff8318a6c0 D db_Escf -ffffffff8318a780 D db_Esc_inst -ffffffff8318a7c0 D db_Grp1 -ffffffff8318a800 D db_Grp2 -ffffffff8318a840 D db_Grp3 -ffffffff8318a900 D db_Grp4 -ffffffff8318a9c0 D db_Grp5 -ffffffff8318aa80 D db_inst_table -ffffffff8318c280 D db_bad_inst -ffffffff8318c2a0 D db_index_reg_16 -ffffffff8318c2e0 D db_reg -ffffffff8318c4e0 D db_seg_reg -ffffffff8318c520 D db_lengths -ffffffff8318d000 D db_regs -ffffffff8318d1e0 D db_eregs -ffffffff8318d1f0 D db_reg_args -ffffffff8318e000 D timer_mutex -ffffffff8318e010 d i8254_timecounter -ffffffff8318f000 D spleen8x16 -ffffffff8318f058 D spleen12x24 -ffffffff8318f0b0 D spleen16x32 -ffffffff8318f108 D spleen32x64 -ffffffff8318f160 d builtin_fonts -ffffffff8318f1e0 d wsfont_add.cookiegen -ffffffff8318f1f0 d spleen8x16_data -ffffffff8318fff0 d spleen12x24_data -ffffffff831929f0 d spleen16x32_data -ffffffff831961f0 d spleen32x64_data -ffffffff831a5000 D nsphy_cd -ffffffff831a6000 D nsphyter_cd -ffffffff831a7000 D gentbi_cd -ffffffff831a8000 D qsphy_cd -ffffffff831a9000 D inphy_cd -ffffffff831aa000 D iophy_cd -ffffffff831ab000 D eephy_cd -ffffffff831ac000 D exphy_cd -ffffffff831ad000 D rlphy_cd -ffffffff831ae000 D lxtphy_cd -ffffffff831af000 D luphy_cd -ffffffff831b0000 D mtdphy_cd -ffffffff831b1000 D icsphy_cd -ffffffff831b2000 D sqphy_cd -ffffffff831b3000 D tqphy_cd -ffffffff831b4000 D ukphy_cd -ffffffff831b5000 D dcphy_cd -ffffffff831b6000 D bmtphy_cd -ffffffff831b7000 D brgphy_cd -ffffffff831b8000 D xmphy_cd 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tht_cd -ffffffff8320b040 D tht_txt_desc -ffffffff8320b068 D tht_rxf_desc -ffffffff8320b090 D tht_rxd_desc -ffffffff8320b0b8 D tht_txf_desc -ffffffff8320c000 D myx_cd -ffffffff8320d000 D oce_cd -ffffffff8320e000 D dc_devs -ffffffff8320f000 D cas_cd -ffffffff83210000 D sis_cd -ffffffff83211000 D se_cd -ffffffff83212000 D cbb_cd -ffffffff83212020 D yc_chipsets -ffffffff832121b0 d pccbb_funcs -ffffffff832121e0 d pccbb_pcmcia_funcs -ffffffff83213000 D skc_cd -ffffffff83213020 D sk_cd -ffffffff83214000 D mskc_cd -ffffffff83214020 D msk_cd -ffffffff83215000 D puc_cd -ffffffff83216000 D puc_ndevs -ffffffff83217000 D iwi_cd -ffffffff83218000 D wpi_cd -ffffffff83219000 D iwn_cd -ffffffff8321a000 D iwm_cd -ffffffff8321b000 D iwx_cd -ffffffff8321c000 D cmpci_cd -ffffffff8321d000 D iha_cd -ffffffff8321e000 D pcscp_cd -ffffffff8321e020 D pcscp_glue -ffffffff8321f000 D bge_cd -ffffffff83220000 D bnx_firmwares -ffffffff83220160 D bnx_rv2ps -ffffffff832201c0 D bnx_cd -ffffffff832201e0 d flash_5709 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sienna_cichlid_ppt_funcs +ffffffff82c8d3d0 r smu11_thermal_policy +ffffffff82c8d420 r sienna_cichlid_i2c_algo +ffffffff82c8d430 r sienna_cichlid_i2c_control_quirks +ffffffff82c8d440 r sienna_cichlid_throttler_map +ffffffff82c8e000 r smu_v11_0_irq_funcs +ffffffff82c8e010 r link_width +ffffffff82c8f000 r vangogh_ppt_funcs +ffffffff82c8f3d0 r vangogh_throttler_map +ffffffff82c90000 r renoir_ppt_funcs +ffffffff82c903d0 r renoir_throttler_map +ffffffff82c91000 r aldebaran_message_map +ffffffff82c91a20 r aldebaran_clk_map +ffffffff82c91ae0 r aldebaran_table_map +ffffffff82c91b60 r aldebaran_ppt_funcs +ffffffff82c91f30 r smu13_thermal_policy +ffffffff82c91f80 r aldebaran_i2c_algo +ffffffff82c91f90 r aldebaran_i2c_control_quirks +ffffffff82c91fa0 r aldebaran_throttler_map +ffffffff82c91fc0 r aldebaran_feature_mask_map +ffffffff82c93000 r smu_v13_0_irq_funcs +ffffffff82c93010 r link_width +ffffffff82c94000 r smu_v13_0_0_ppt_funcs +ffffffff82c943d0 r smu13_thermal_policy +ffffffff82c94420 r smu_v13_0_0_i2c_algo +ffffffff82c94430 r smu_v13_0_0_i2c_control_quirks +ffffffff82c94440 r smu_v13_0_0_throttler_map +ffffffff82c95000 r smu_v13_0_4_ppt_funcs +ffffffff82c96000 r smu_v13_0_5_ppt_funcs +ffffffff82c97000 r smu_v13_0_7_ppt_funcs +ffffffff82c973d0 r smu13_thermal_policy +ffffffff82c97420 r smu_v13_0_7_throttler_map +ffffffff82c98000 r yellow_carp_ppt_funcs +ffffffff82c99000 r __smu_message_names +ffffffff82c9a000 R pchb_ca +ffffffff82c9b000 R amas_ca +ffffffff82c9b028 R amas_devices +ffffffff82c9b040 r amas_feature +ffffffff82c9c000 R cardslot_ca +ffffffff82c9d000 R cardbus_ca +ffffffff82c9e000 R com_cardbus_ca +ffffffff82c9f000 R xl_cardbus_ca +ffffffff82c9f030 R xl_cardbus_products +ffffffff82ca0000 R dc_cardbus_ca +ffffffff82ca0030 R dc_cardbus_devices +ffffffff82ca1000 R fxp_cardbus_ca +ffffffff82ca1028 R fxp_cardbus_devices +ffffffff82ca2000 R rl_cardbus_devices +ffffffff82ca2028 R rl_cardbus_ca +ffffffff82ca3000 R re_cardbus_ca +ffffffff82ca3028 R re_cardbus_devices +ffffffff82ca4000 R ath_cardbus_ca +ffffffff82ca5000 R athn_cardbus_ca +ffffffff82ca5030 r athn_cardbus_devices +ffffffff82ca6000 R atw_cardbus_ca +ffffffff82ca6028 R atw_cardbus_devices +ffffffff82ca7000 R rtw_cardbus_ca +ffffffff82ca7028 R rtw_cardbus_devices +ffffffff82ca8000 R ral_cardbus_ca +ffffffff82ca8030 r ral_cardbus_devices +ffffffff82ca9000 R acx_cardbus_ca +ffffffff82ca9028 r acx_cardbus_devices +ffffffff82caa000 R pgt_cardbus_ca +ffffffff82caa028 R pgt_cardbus_devices +ffffffff82cab000 R ehci_cardbus_ca +ffffffff82cac000 R ohci_cardbus_ca +ffffffff82cad000 R uhci_cardbus_ca +ffffffff82cae000 R malo_cardbus_ca +ffffffff82cae028 r malo_cardbus_devices +ffffffff82caf000 R bwi_cardbus_ca +ffffffff82caf030 r bwi_cardbus_devices +ffffffff82cb0000 R pcmcia_ca +ffffffff82cb1000 r pcmcia_parse_cis_tuple.init_cfe +ffffffff82cb2000 r pcmcia_cis_quirks +ffffffff82cb3000 R ep_pcmcia_ca +ffffffff82cb4000 R ne_pcmcia_ca +ffffffff82cb4030 R ne2000devs +ffffffff82cb6000 R aic_pcmcia_ca +ffffffff82cb7000 R com_pcmcia_ca +ffffffff82cb8000 R wdc_pcmcia_ca +ffffffff82cb9000 R sm_pcmcia_ca +ffffffff82cba000 R xe_pcmcia_ca +ffffffff82cbb000 R wi_pcmcia_ca +ffffffff82cbb030 r wi_pcmcia_products +ffffffff82cbc000 R malo_pcmcia_ca +ffffffff82cbd000 R an_pcmcia_ca +ffffffff82cbe000 R pcib_ca +ffffffff82cbf000 R amdpcib_ca +ffffffff82cbf028 R amdpcib_devices +ffffffff82cc0000 R tcpcib_ca +ffffffff82cc0028 R tcpcib_devices +ffffffff82cc1000 R aapic_ca +ffffffff82cc2000 R hme_pci_ca +ffffffff82cc2028 r hme_promhdr +ffffffff82cc202a r hme_promdat +ffffffff82cc3000 R isa_ca +ffffffff82cc4000 R isadma_ca +ffffffff82cc5000 R fdc_ca +ffffffff82cc6000 R fd_ca +ffffffff82cc7000 R com_isa_ca +ffffffff82cc8000 R pckbc_isa_ca +ffffffff82cc9000 R vga_isa_ca +ffffffff82cca000 R wdc_isa_ca +ffffffff82ccb000 R mpu_midi_hw_if +ffffffff82ccc000 R mpu_isa_ca +ffffffff82ccd000 R pcppi_ca +ffffffff82cce000 R spkr_ca +ffffffff82cce030 r pitchtab +ffffffff82ccf000 R lpt_isa_ca +ffffffff82cd0000 R wbsio_ca +ffffffff82cd1000 R schsio_ca +ffffffff82cd2000 R lm_isa_ca +ffffffff82cd2028 R lm_wbsio_ca +ffffffff82cd3000 R it_sensors +ffffffff82cd3110 R it_vrfact +ffffffff82cd3140 R it_fan_regs +ffffffff82cd3160 R it_fan_ext_regs +ffffffff82cd3178 R it_ca +ffffffff82cd4000 R abitkv_sensors +ffffffff82cd4200 R abitaa_sensors +ffffffff82cd4480 R abitav_sensors +ffffffff82cd4700 R abitas_sensors +ffffffff82cd4980 R abitax_sensors +ffffffff82cd4bc0 R abitm4_sensors +ffffffff82cd4e80 R abitan_sensors +ffffffff82cd5120 R abital_sensors +ffffffff82cd53a0 R abitaw_sensors +ffffffff82cd5700 R abitni_sensors +ffffffff82cd59a0 R abitat_sensors +ffffffff82cd5cc0 R abitan2_sensors +ffffffff82cd5f60 R abitab_sensors +ffffffff82cd6220 R abitan3_sensors +ffffffff82cd6500 R abitaw2_sensors +ffffffff82cd6860 R abitat2_sensors +ffffffff82cd6b60 R abitab2_sensors +ffffffff82cd6ea0 R abitin_sensors +ffffffff82cd71e0 R uguru_ca +ffffffff82cd8000 R aps_ca +ffffffff82cd9000 R wsdisplay_emul_ca +ffffffff82cd9030 r charClass +ffffffff82cda000 r usl_syncops +ffffffff82cdb000 R wsevent_filtops +ffffffff82cdc000 R wskbd_ca +ffffffff82cdd000 r latin1_to_upper +ffffffff82cde000 R wsmouse_ca +ffffffff82cdf000 R cyrillic_to_koi8 +ffffffff82cdf060 R unicode_to_latin2 +ffffffff82cdf0e0 R unicode_to_latin7 +ffffffff82ce0000 R wsemul_vt100_ops +ffffffff82ce1000 r decspcgr2uni +ffffffff82ce1100 r dectech2uni +ffffffff82ce1200 r nrctable +ffffffff82ce1320 r nrcovlpos +ffffffff82ce2000 r vt100_fkeys +ffffffff82ce20c0 r vt100_pfkeys +ffffffff82ce20e0 r vt100_numpad +ffffffff82ce3000 R pckbd_ca +ffffffff82ce3028 R pckbd_accessops +ffffffff82ce3040 R pckbd_consops +ffffffff82ce3060 R pckbd_keymapdata +ffffffff82ce3070 R pckbd_xtbl +ffffffff82ce3100 R pckbd_xtbl_ext +ffffffff82ce4000 r pckbd_keydesc_us +ffffffff82ce4250 r pckbd_keydesc_de +ffffffff82ce42f0 r pckbd_keydesc_de_nodead +ffffffff82ce4310 r pckbd_keydesc_fr +ffffffff82ce43d0 r pckbd_keydesc_fr_dvorak_bepo +ffffffff82ce4510 r pckbd_keydesc_dk +ffffffff82ce45a0 r pckbd_keydesc_dk_nodead +ffffffff82ce45b0 r pckbd_keydesc_it +ffffffff82ce4640 r pckbd_keydesc_uk +ffffffff82ce46e0 r pckbd_keydesc_jp +ffffffff82ce4750 r pckbd_keydesc_sv +ffffffff82ce4780 r pckbd_keydesc_sv_nodead +ffffffff82ce4790 r pckbd_keydesc_no +ffffffff82ce47c0 r pckbd_keydesc_no_nodead +ffffffff82ce47d0 r pckbd_keydesc_us_declk +ffffffff82ce4860 r pckbd_keydesc_us_dvorak +ffffffff82ce4900 r pckbd_keydesc_us_colemak +ffffffff82ce4948 r pckbd_keydesc_swapctrlcaps +ffffffff82ce4960 r pckbd_keydesc_iopener +ffffffff82ce49b0 r pckbd_keydesc_es +ffffffff82ce4a50 r pckbd_keydesc_be +ffffffff82ce4b10 r pckbd_keydesc_ru +ffffffff82ce4c80 r pckbd_keydesc_ua +ffffffff82ce4e10 r pckbd_keydesc_sg +ffffffff82ce4ec0 r pckbd_keydesc_sg_nodead +ffffffff82ce4ee0 r pckbd_keydesc_sf +ffffffff82ce4f00 r pckbd_keydesc_pt +ffffffff82ce4f90 r pckbd_keydesc_lt +ffffffff82ce5070 r pckbd_keydesc_la +ffffffff82ce5100 r pckbd_keydesc_br +ffffffff82ce5180 r pckbd_keydesc_tr +ffffffff82ce5230 r pckbd_keydesc_tr_nodead +ffffffff82ce5250 r pckbd_keydesc_pl +ffffffff82ce52b0 r pckbd_keydesc_hu +ffffffff82ce53c0 r pckbd_keydesc_si +ffffffff82ce54d0 r pckbd_keydesc_cf +ffffffff82ce55a0 r pckbd_keydesc_cf_nodead +ffffffff82ce55c0 r pckbd_keydesc_lv +ffffffff82ce5640 r pckbd_keydesc_nl +ffffffff82ce5720 r pckbd_keydesc_nl_nodead +ffffffff82ce5740 r pckbd_keydesc_is +ffffffff82ce57cc r pckbd_keydesc_is_nodead +ffffffff82ce57e0 r pckbd_keydesc_ee +ffffffff82ce5890 r pckbd_keydesc_ee_nodead +ffffffff82ce58b0 R pckbd_keydesctab +ffffffff82ce6000 R pms_ca +ffffffff82ce6028 R pms_accessops +ffffffff82ce6040 R pms_sec_accessops +ffffffff82ce6060 R pms_protocols +ffffffff82ce61e0 r alps_models +ffffffff82ce7000 R skgpio_led_offset +ffffffff82ce7008 R skgpio_ca +ffffffff82ce8000 R hidkbd_trtab +ffffffff82ce8100 r apple_fn_trans +ffffffff82ce8120 r apple_tb_trans +ffffffff82ce8140 r apple_mba_trans +ffffffff82ce9000 r hidcc_attach_wskbd.accessops +ffffffff82ce9020 r hidcc_keysyms +ffffffff82cea000 R usb_ca +ffffffff82ceb000 R usb_known_products +ffffffff82cf6e60 R usb_known_vendors +ffffffff82cf9660 R usbd_error_strs +ffffffff82cfa000 R usb_quirks +ffffffff82cfa390 R usb_dev_quirks +ffffffff82cfa398 R usbd_no_quirk +ffffffff82cfb000 R uhub_ca +ffffffff82cfb028 R uhub_uhub_ca +ffffffff82cfc000 R uaudio_ca +ffffffff82cfc028 R uaudio_hw_if +ffffffff82cfc0e0 R uaudio_rates +ffffffff82cfc120 r uaudio_clkname.names +ffffffff82cfc140 r uaudio_feature_addent.features +ffffffff82cfd000 R uvideo_ca +ffffffff82cfd028 R uvideo_hw_if +ffffffff82cfd100 R uvideo_devs +ffffffff82cfe000 r utvfu_select_norm.pal +ffffffff82cfe040 r utvfu_select_norm.ntsc +ffffffff82cfe080 r utvfu_setup_capture.setup +ffffffff82cfe180 r utvfu_audio_start_chip.setup +ffffffff82cfe1c8 r utvfu_audio_stop_chip.setup +ffffffff82cfe1d8 R utvfu_ca +ffffffff82cfe200 R utvfu_vid_hw_if +ffffffff82cfe2d0 R utvfu_au_hw_if +ffffffff82cff000 R udl_ca +ffffffff82cff030 r udl_devs +ffffffff82cff0b0 r udl_modes +ffffffff82d00000 R umidi_hw_if +ffffffff82d00030 R umidi_ca +ffffffff82d00060 r umidi_evlen +ffffffff82d00080 r packet_length +ffffffff82d01000 r quirk_name +ffffffff82d02000 R ucom_ca +ffffffff82d03000 R ugen_ca +ffffffff82d03028 R ugenread_intr_filtops +ffffffff82d03058 R ugenread_isoc_filtops +ffffffff82d04000 R uhidev_ca +ffffffff82d04030 r uhid_graphire_report_descr +ffffffff82d040b0 r uhid_graphire3_4x5_report_descr +ffffffff82d04160 r uhid_xb360gp_report_descr +ffffffff82d04210 r uhid_xbonegp_report_descr +ffffffff82d05000 R uhid_ca +ffffffff82d05028 R uhidread_filtops +ffffffff82d06000 R fido_ca +ffffffff82d07000 R ujoy_ca +ffffffff82d08000 r ukbd_keydesc_us +ffffffff82d08290 r ukbd_keydesc_de +ffffffff82d08340 r ukbd_keydesc_de_nodead +ffffffff82d08360 r ukbd_keydesc_fr +ffffffff82d08420 r ukbd_keydesc_fr_apple +ffffffff82d08560 r ukbd_keydesc_fr_dvorak_bepo +ffffffff82d086a0 r ukbd_keydesc_dk +ffffffff82d08740 r ukbd_keydesc_dk_nodead +ffffffff82d08750 r ukbd_keydesc_it +ffffffff82d087f0 r ukbd_keydesc_uk +ffffffff82d088a0 r ukbd_keydesc_jp +ffffffff82d08910 r ukbd_keydesc_sv +ffffffff82d08940 r ukbd_keydesc_sv_nodead +ffffffff82d08950 r ukbd_keydesc_no +ffffffff82d08980 r ukbd_keydesc_no_nodead +ffffffff82d08990 r ukbd_keydesc_us_dvorak +ffffffff82d08a30 r ukbd_keydesc_us_colemak +ffffffff82d08a78 r ukbd_keydesc_swapctrlcaps +ffffffff82d08a90 r ukbd_keydesc_iopener +ffffffff82d08ae0 r ukbd_keydesc_es +ffffffff82d08b80 r ukbd_keydesc_be +ffffffff82d08c40 r ukbd_keydesc_ru +ffffffff82d08db0 r ukbd_keydesc_ua +ffffffff82d08f50 r ukbd_keydesc_sg +ffffffff82d09010 r ukbd_keydesc_sg_nodead +ffffffff82d09030 r ukbd_keydesc_sf +ffffffff82d09050 r ukbd_keydesc_pt +ffffffff82d090e0 r ukbd_keydesc_pt_apple +ffffffff82d09100 r ukbd_keydesc_lt +ffffffff82d091e0 r ukbd_keydesc_la +ffffffff82d09280 r ukbd_keydesc_br +ffffffff82d09310 r ukbd_keydesc_tr +ffffffff82d093d0 r ukbd_keydesc_tr_nodead +ffffffff82d093f0 r ukbd_keydesc_pl +ffffffff82d09450 r ukbd_keydesc_hu +ffffffff82d09560 r ukbd_keydesc_si +ffffffff82d09680 r ukbd_keydesc_cf +ffffffff82d09760 r ukbd_keydesc_cf_nodead +ffffffff82d09780 r ukbd_keydesc_lv +ffffffff82d09800 r ukbd_keydesc_nl +ffffffff82d098e0 r ukbd_keydesc_nl_nodead +ffffffff82d09900 r ukbd_keydesc_is +ffffffff82d09994 r ukbd_keydesc_is_nodead +ffffffff82d099a0 r ukbd_keydesc_ee +ffffffff82d09a50 r ukbd_keydesc_ee_nodead +ffffffff82d09a70 R ukbd_keydesctab +ffffffff82d0a000 R ukbd_countrylayout +ffffffff82d0a090 R ukbd_consops +ffffffff82d0a0b0 R ukbd_accessops +ffffffff82d0a0c8 R ukbd_ca +ffffffff82d0b000 R ums_accessops +ffffffff82d0b018 R ums_ca +ffffffff82d0c000 R umt_accessops +ffffffff82d0c018 R umt_ca +ffffffff82d0d000 R uts_devs +ffffffff82d0d010 R uts_accessops +ffffffff82d0d028 R uts_ca +ffffffff82d0e000 R ubcmtp_accessops +ffffffff82d0e018 R ubcmtp_ca +ffffffff82d0e040 r ubcmtp_devices +ffffffff82d0f000 R ucycom_methods +ffffffff82d0f040 R ucycom_devs +ffffffff82d0f050 R ucycom_ca +ffffffff82d10000 R uslhcom_methods +ffffffff82d10040 R uslhcom_ca +ffffffff82d10068 r uslhcom_devs +ffffffff82d11000 R ulpt_ca +ffffffff82d12000 R umass_ca +ffffffff82d12028 R umass_bbb_methods +ffffffff82d12040 R umass_cbi_methods +ffffffff82d13000 R umass_quirks +ffffffff82d14000 R umass_scsi_switch +ffffffff82d15000 R uthum_devs +ffffffff82d15008 R uthum_ca +ffffffff82d15030 r uthum_sensor_type_s +ffffffff82d16000 R ugold_devs +ffffffff82d16010 R ugold_ca +ffffffff82d17000 R utrh_devs +ffffffff82d17008 R utrh_ca +ffffffff82d18000 R uoakrh_devs +ffffffff82d18008 R uoakrh_ca +ffffffff82d18030 R uoakrh_methods +ffffffff82d19000 R uoaklux_devs +ffffffff82d19008 R uoaklux_ca +ffffffff82d19030 R uoaklux_methods +ffffffff82d1a000 R uoakv_devs +ffffffff82d1a008 R uoakv_ca +ffffffff82d1a030 R uoakv_methods +ffffffff82d1b000 R uonerng_ca +ffffffff82d1c000 R urng_ca +ffffffff82d1c030 r urng_devs +ffffffff82d1d000 R udcf_ca +ffffffff82d1d028 r udcf_devs +ffffffff82d1e000 R umbg_ca +ffffffff82d1f000 R uvisor_methods +ffffffff82d1f040 R uvisor_ca +ffffffff82d1f070 r uvisor_devs +ffffffff82d20000 R udsbr_hw_if +ffffffff82d20028 R udsbr_ca +ffffffff82d21000 R utwitch_devs +ffffffff82d21008 R utwitch_ca +ffffffff82d22000 R aue_devs +ffffffff82d221b0 R aue_ca +ffffffff82d23000 R axe_devs +ffffffff82d230d0 R axe_ca +ffffffff82d24000 R axen_devs +ffffffff82d24020 R axen_ca +ffffffff82d25000 R smsc_ca +ffffffff82d25030 r smsc_devs +ffffffff82d26000 R cue_ca +ffffffff82d27000 R kue_devs +ffffffff82d27088 R kue_ca +ffffffff82d28000 R cdce_devs +ffffffff82d28048 R cdce_ca +ffffffff82d29000 R urndis_ca +ffffffff82d29030 R urndis_class +ffffffff82d2a000 R mos_devs +ffffffff82d2a018 R mos_ca +ffffffff82d2b000 R mue_devs +ffffffff82d2b020 R mue_ca +ffffffff82d2c000 R udav_ca +ffffffff82d2c030 r udav_devs +ffffffff82d2d000 R upl_ca +ffffffff82d2e000 R ugl_ca +ffffffff82d2f000 R url_ca +ffffffff82d2f030 r url_devs +ffffffff82d30000 R ure_devs +ffffffff82d300f0 R ure_ca +ffffffff82d31000 R uaq_devs +ffffffff82d31018 R uaq_ca +ffffffff82d32000 R umodem_methods +ffffffff82d32040 R umodem_ca +ffffffff82d33000 R uftdi_methods +ffffffff82d33040 R uftdi_ca +ffffffff82d33070 r uftdi_devs +ffffffff82d34000 R uplcom_methods +ffffffff82d34040 R uplcom_ca +ffffffff82d34070 r uplcom_devs +ffffffff82d35000 R umct_methods +ffffffff82d35040 R umct_ca +ffffffff82d35070 r umct_devs +ffffffff82d36000 R uvscom_methods +ffffffff82d36040 R uvscom_ca +ffffffff82d36070 r uvscom_devs +ffffffff82d37000 R ubsa_methods +ffffffff82d37040 R ubsa_devs +ffffffff82d37060 R ubsa_ca +ffffffff82d38000 R ukspan_ca +ffffffff82d38028 r ukspan_devs +ffffffff82d38030 r ukspan_methods +ffffffff82d39000 R uslcom_methods +ffffffff82d39040 R uslcom_ca +ffffffff82d39070 r uslcom_devs +ffffffff82d3a000 R uark_methods +ffffffff82d3a040 R uark_ca +ffffffff82d3a068 r uark_devs +ffffffff82d3b000 R moscom_methods +ffffffff82d3b040 R moscom_ca +ffffffff82d3b068 r moscom_devs +ffffffff82d3c000 R umcs_methods +ffffffff82d3c040 R umcs_devs +ffffffff82d3c050 R umcs_ca +ffffffff82d3d000 R uscom_methods +ffffffff82d3d040 R uscom_ca +ffffffff82d3d068 r uscom_devs +ffffffff82d3e000 R ucrcom_methods +ffffffff82d3e040 R ucrcom_ca +ffffffff82d3f000 R uxrcom_methods +ffffffff82d3f040 R uxrcom_ca +ffffffff82d3f068 r uxrcom_devs +ffffffff82d40000 R uipaq_methods +ffffffff82d40040 R uipaq_ca +ffffffff82d40070 r uipaq_devs +ffffffff82d41000 R umsm_methods +ffffffff82d41040 R umsm_ca +ffffffff82d41070 r umsm_devs +ffffffff82d42000 R uchcom_methods +ffffffff82d42040 R uchcom_ca +ffffffff82d42068 r uchcom_devs +ffffffff82d42080 r dividers +ffffffff82d43000 R uticom_methods +ffffffff82d43040 R uticom_ca +ffffffff82d43070 r uticom_devs +ffffffff82d44000 R wi_usb_devs +ffffffff82d440f0 R wi_usb_ca +ffffffff82d45000 R atu_ca +ffffffff82d46000 R ural_ca +ffffffff82d46030 r ural_devs +ffffffff82d460a0 r ural_rf2522_r2 +ffffffff82d460e0 r ural_rf2524_r2 +ffffffff82d46120 r ural_rf2525_hi_r2 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wi_func_io +ffffffff830a6000 D an_cd +ffffffff830a7000 D xl_cd +ffffffff830a8000 D fxp_int_delay +ffffffff830a8004 D fxp_bundle_max +ffffffff830a8008 D fxp_min_size_mask +ffffffff830a8010 D fxp_cd +ffffffff830a8030 d tx_threshold +ffffffff830a8040 d fxp_cb_config_template +ffffffff830a9000 D rl_cd +ffffffff830aa000 D re_cd +ffffffff830ab000 D dc_cd +ffffffff830ac000 D smc91cxx_idstrs +ffffffff830ac080 D sm_cd +ffffffff830ad000 D epic_cd +ffffffff830ae000 D ne_cd +ffffffff830ae020 d ne2000_detect.test_pattern +ffffffff830af000 D gem_cd +ffffffff830b0000 D ti_cd +ffffffff830b1000 D com_cd +ffffffff830b1020 D comdefaultrate +ffffffff830b1024 D comconsrate +ffffffff830b1028 D comconscflag +ffffffff830b1030 d comcnattach.comcons +ffffffff830b2000 D pckbc_slot_names +ffffffff830b2010 D pckbc_cd +ffffffff830b3000 D ac97civ +ffffffff830b4000 D cy_cd +ffffffff830b5000 D lpt_cd +ffffffff830b6000 D lm_cd +ffffffff830b7000 D ath_dwelltime +ffffffff830b7004 D ath_calinterval +ffffffff830b7008 D ath_outdoor +ffffffff830b700c D ath_xchanmode +ffffffff830b7010 D ath_softcrypto +ffffffff830b7018 D ath_cd +ffffffff830b8000 D athn_cd +ffffffff830b9000 D bwfm_2ghz_channels +ffffffff830b9010 D bwfm_5ghz_channels +ffffffff830b9030 D bwfm_proto_bcdc_ops +ffffffff830b9050 D bwfm_cd +ffffffff830ba000 D atw_bbp_io_enable_delay +ffffffff830ba004 D atw_bbp_io_disable_delay +ffffffff830ba008 D atw_writewep_delay +ffffffff830ba00c D atw_beacon_len_adjust +ffffffff830ba010 D atw_dwelltime +ffffffff830ba018 D atw_cd +ffffffff830bb000 D rtw_dwelltime +ffffffff830bb004 D rtw_macbangbits_timeout +ffffffff830bb008 D rtw_cd +ffffffff830bc000 D ral_cd +ffffffff830bd000 D rt3090_freqs +ffffffff830be000 D acx_beacon_intvl +ffffffff830be008 D acx_cd +ffffffff830bf000 D pgt_cd +ffffffff830c0000 D sf_cd +ffffffff830c1000 D malo_cd +ffffffff830c2000 D bwi_cd +ffffffff830c2020 D bwi_constraint +ffffffff830c2030 D bwi_pa_mode +ffffffff830c3000 D uhci_cd +ffffffff830c4000 D ohci_cd +ffffffff830c5000 D ehci_cd +ffffffff830c6000 D xhci_cd +ffffffff830c7000 D ccp_cd +ffffffff830c8000 D sdhc_functions +ffffffff830c8068 D sdhc_cd +ffffffff830c9000 D rtsx_functions +ffffffff830c9068 D rtsx_cd +ffffffff830ca000 D radio_cd +ffffffff830cb000 D kcs_if +ffffffff830cb040 D smic_if +ffffffff830cb080 D bt_if +ffffffff830cb0c0 D ipmi_cd +ffffffff830cb0e0 D maxsdrlen +ffffffff830cc000 D vscsi_cd +ffffffff830cd000 D mpath_cd +ffffffff830ce000 D softraid_cd +ffffffff830ce020 D smd +ffffffff830cf000 D spdmem_cd +ffffffff830d0000 D dwiic_cd +ffffffff830d1000 D kstat_lock +ffffffff830d1010 D kstat_next_id +ffffffff830d1018 D kstat_default_lock +ffffffff830d2000 D pf_hdr_limit +ffffffff830d2008 D pf_purge_task +ffffffff830d2038 D pf_purge_to +ffffffff830d2080 D pf_pool_limits +ffffffff830d20f0 D pf_state_list +ffffffff830d3000 D pf_tags +ffffffff830d3010 D pf_qids +ffffffff830d3020 D pf_lock +ffffffff830d3030 D pf_state_lock +ffffffff830d3040 D pfioctl_rw +ffffffff830d4000 D pfi_update +ffffffff830d5000 D pflog_cloner +ffffffff830d6000 D pfsync_qs +ffffffff830d6078 D pfsync_cloner +ffffffff830d60a8 d pfsync_task +ffffffff830d7000 D pflow_cloner +ffffffff830d8000 D pppoe_cloner +ffffffff830d8030 D pppoediscinq +ffffffff830d8060 D pppoeinq +ffffffff830d9000 D dt_lock +ffffffff830da000 D dt_prov_profile +ffffffff830da030 D dt_prov_interval +ffffffff830db000 D dtps_nsysent +ffffffff830db008 D dt_prov_syscall +ffffffff830dc000 D dt_prov_static +ffffffff830dc030 D dt_static_sched_dequeue +ffffffff830dc0a0 D dt_static_sched_enqueue +ffffffff830dc110 D dt_static_sched_off__cpu +ffffffff830dc180 D dt_static_sched_on__cpu +ffffffff830dc1f0 D dt_static_sched_remain__cpu +ffffffff830dc260 D dt_static_sched_sleep +ffffffff830dc2d0 D dt_static_sched_wakeup +ffffffff830dc340 D dt_static_raw_syscalls_sys_enter +ffffffff830dc3b0 D dt_static_raw_syscalls_sys_exit +ffffffff830dc420 D dt_static_uvm_fault +ffffffff830dc490 D dt_static_uvm_map_insert +ffffffff830dc500 D dt_static_uvm_map_remove +ffffffff830dc570 D dt_static_uvm_malloc +ffffffff830dc5e0 D dt_static_uvm_free +ffffffff830dc650 D dt_static_uvm_pool_get +ffffffff830dc6c0 D dt_static_uvm_pool_put +ffffffff830dc730 D dt_static_vfs_bufcache_rel +ffffffff830dc7a0 D dt_static_vfs_bufcache_take +ffffffff830dc810 D dt_static_vfs_cleaner +ffffffff830dc880 D dt_static_vmm_guest_enter +ffffffff830dc8f0 D dt_static_vmm_guest_exit +ffffffff830dc960 D dt_static_vmm_inout +ffffffff830dc9d0 D dt_static_smr_call +ffffffff830dca40 D dt_static_smr_called +ffffffff830dcab0 D dt_static_smr_barrier_enter +ffffffff830dcb20 D dt_static_smr_barrier_exit +ffffffff830dcb90 D dt_static_smr_wakeup +ffffffff830dcc00 D dt_static_smr_thread +ffffffff830dcc70 D dt_static_refcnt_none +ffffffff830dcce0 D dt_static_refcnt_ifaddr +ffffffff830dcd50 D dt_static_refcnt_inpcb +ffffffff830dcdc0 D dt_static_refcnt_tdb +ffffffff830dd000 D db_next_free_breakpoint +ffffffff830dd008 D db_breakpoints_inserted +ffffffff830de000 D db_ed_style +ffffffff830df000 D db_examine_format +ffffffff830df078 D db_print_format +ffffffff830e0000 D db_history_size +ffffffff830e0008 D db_history_curr +ffffffff830e0010 D db_history_last +ffffffff830e1000 D db_tab_stop_width +ffffffff830e1004 D db_max_line +ffffffff830e1008 D db_max_width +ffffffff830e100c D db_radix +ffffffff830e2000 D db_lastsym +ffffffff830e2008 D db_maxoff +ffffffff830e3000 D db_vars +ffffffff830e3090 D db_evars +ffffffff830e4000 D db_watchpoints_inserted +ffffffff830e4008 D db_next_free_watchpoint +ffffffff830e5000 D db_log +ffffffff830e6000 D audio_cd +ffffffff830e6020 D audio_lock +ffffffff830e7000 D midi_cd +ffffffff830e8000 D rnd_cold +ffffffff830e8004 D rnd_slowextract +ffffffff830e8008 D rnd_timeout +ffffffff830e8050 D rndlock +ffffffff830e8060 D rndreinit_timeout +ffffffff830e80a8 D rnd_task +ffffffff830e9000 D video_cd +ffffffff830ea000 d rrip_table_analyze +ffffffff830ea0e0 d rrip_table_getname +ffffffff830ea1e0 d rrip_table_getsymname +ffffffff830ea280 d rrip_table_extref +ffffffff830eb000 D nexecs +ffffffff830ec000 D elf_note_names +ffffffff830ed000 D ncpus +ffffffff830ed004 D ncpusfound +ffffffff830ee000 D acct_lock +ffffffff830ee010 D acctsuspend +ffffffff830ee014 D acctresume +ffffffff830ee018 D acctrate +ffffffff830ef000 D clockintr_mtx +ffffffff830ef010 D statclock_gen +ffffffff830f0000 D fhdlk +ffffffff830f1000 D kqueue_klist_lock +ffffffff830f1010 D kq_timeoutmax +ffffffff830f2000 D stackgap_random +ffffffff830f3000 D nprocesses +ffffffff830f3004 D nthreads +ffffffff830f3008 D fork_tfmrate +ffffffff830f4000 D kthread_q +ffffffff830f5000 D malloc_mtx +ffffffff830f5010 D memname +ffffffff830f54a0 D sysctl_kmemlock +ffffffff830f54b0 D malloc_errintvl +ffffffff830f6000 D maxdmap +ffffffff830f6008 D maxsmap +ffffffff830f6010 D rlimit_lock +ffffffff830f7000 D sched_cost_load +ffffffff830f7004 D sched_cost_priority +ffffffff830f7008 D sched_cost_runnable +ffffffff830f700c D sched_cost_resident +ffffffff830f8000 D intrmap_lock +ffffffff830f9000 D nosuidcoredump +ffffffff830f9008 D sigio_lock +ffffffff830fa000 D smr_lock +ffffffff830fa010 D smr_logintvl +ffffffff830fb000 D startuphook_list +ffffffff830fc000 D sysctl_lock +ffffffff830fc010 D sysctl_disklock +ffffffff830fc020 d openbsd +ffffffff830fc024 d arg_max +ffffffff830fc028 d posix_version +ffffffff830fc02c d ngroups_max +ffffffff830fc030 d int_one +ffffffff830fc034 d maxpartitions +ffffffff830fc038 d raw_part +ffffffff830fc03c D allowpowerdown +ffffffff830fc040 D hw_power +ffffffff830fc044 d byte_order +ffffffff830fc048 d page_size +ffffffff830fd000 d thrsleep_queue +ffffffff830fd010 d thrsleep_lock +ffffffff830fe000 D tc_lock +ffffffff830fe010 D windup_mtx +ffffffff830fe020 D timecounter +ffffffff830fe028 D time_second +ffffffff830fe030 d timehands +ffffffff830fe038 d dummy_timecounter +ffffffff830fe090 d th0 +ffffffff830fe128 d th1 +ffffffff830ff000 D itimer_mtx +ffffffff830ff010 D ratecheck_mtx +ffffffff830ff020 D ppsratecheck_mtx +ffffffff830ff030 D resettodr_to +ffffffff830ff078 D resettodr_task +ffffffff83100000 D timeout_mutex +ffffffff83101000 D wdog_auto +ffffffff83102000 D taskq_sys +ffffffff83102050 D taskq_sys_mp +ffffffff83103000 D ccpu +ffffffff83103004 D perflevel +ffffffff83103008 D perfpolicy +ffffffff83103010 D setperf_to +ffffffff83104000 D autoconf_attdet_mtx +ffffffff83104010 D msgs +ffffffff83105000 d evcount_list +ffffffff83105010 d evcount_percpu_init_list +ffffffff83106000 D syslogf_rwlock +ffffffff83106010 D log_mtx +ffffffff83106020 D logstash_in +ffffffff83106028 D logstash_out +ffffffff83106030 D logstash_rwlock +ffffffff83107000 D pool_head +ffffffff83107010 D pool_lock +ffffffff83107020 D pool_debug +ffffffff83107028 D pool_allocator_single +ffffffff83107040 D pool_allocator_multi +ffffffff83107058 D pool_allocator_multi_ni +ffffffff83107070 D pool_gc_tick +ffffffff831070b8 D pool_gc_task +ffffffff83108000 D kprintf_mutex +ffffffff83108010 D db_panic +ffffffff83108014 D splassert_ctl +ffffffff83108018 D v_putc +ffffffff83108020 D printf_flags +ffffffff83109000 D userconf_base +ffffffff83109004 D userconf_maxdev +ffffffff83109008 D userconf_totdev +ffffffff8310900c D userconf_maxlocnames +ffffffff83109010 D userconf_cnt +ffffffff83109014 D userconf_lines +ffffffff83109018 D userconf_histsz +ffffffff83109020 D userconf_cmds +ffffffff8310a000 D ftlock +ffffffff8310b000 d ppollcollect.poll_errintvl +ffffffff8310c000 D ttydefchars +ffffffff8310c014 D ttclos +ffffffff8310c01b D ttopen +ffffffff8310c022 D ttybg +ffffffff8310c028 D ttyin +ffffffff8310c02e D ttyout +ffffffff8310c038 D ttylist_lock +ffffffff8310d000 D linesw +ffffffff8310d280 D nlinesw +ffffffff8310e000 D pt_softc_lock +ffffffff8310f000 d mbstat_boot_boot_cpumem +ffffffff8310f080 D mbstat +ffffffff8310f090 D mclsizes +ffffffff8310f0b0 D m_extref_mtx +ffffffff8310f0c0 D m_pool_allocator +ffffffff83110000 D somaxconn +ffffffff83110004 D sominconn +ffffffff83110008 D sosplice_lock +ffffffff83111000 D sb_max +ffffffff83112000 D unp_lock +ffffffff83112010 D unp_df_lock +ffffffff83112020 D unp_gc_lock +ffffffff83112030 D unp_rights_mtx +ffffffff83112040 D unp_ino_mtx +ffffffff83112050 D unp_gc_task +ffffffff83112080 D unpst_sendspace +ffffffff83112084 D unpst_recvspace +ffffffff83112088 D unpsq_sendspace +ffffffff8311208c D unpsq_recvspace +ffffffff83112090 D unpdg_sendspace +ffffffff83112094 D unpdg_recvspace +ffffffff83113000 D doingcache +ffffffff83114000 D maxvfsconf +ffffffff83114010 d vfsconflist +ffffffff83115000 D lockf_lock +ffffffff83115010 D maxlocksperuid +ffffffff83116000 D iftovt_tab +ffffffff83116040 D vttoif_tab +ffffffff83116064 D suid_clear +ffffffff83116068 D vnode_mtx +ffffffff83116078 D vfs_stall_lock +ffffffff83116090 D vtypes +ffffffff831160e0 D vtags +ffffffff83117000 D syncer_maxdelay +ffffffff83117004 D syncdelay +ffffffff83118000 D dosdirtemplate +ffffffff83119000 D ntfs_hashlock +ffffffff8311a000 D ntfs_toupper_lock +ffffffff8311b000 D art_table_gc_mtx +ffffffff8311b010 D art_table_gc_task +ffffffff8311b040 D art_node_gc_mtx +ffffffff8311b050 D art_node_gc_task +ffffffff8311c000 D bpf_bufsize +ffffffff8311c004 D bpf_maxbufsize +ffffffff8311c008 D bpf_sysctl_lk +ffffffff8311d000 D ifg_head +ffffffff8311d010 D if_cloners_lock +ffffffff8311d020 D if_input_task_locked +ffffffff8311d050 D netlock +ffffffff8311d060 D ifnetlist +ffffffff8311e000 D ifiq_maxlen_drop +ffffffff8311e004 D ifiq_maxlen_return +ffffffff8311f000 D etherbroadcastaddr +ffffffff8311f006 D ether_ipmulticast_min +ffffffff8311f00c D ether_ipmulticast_max +ffffffff8311f012 D ether_ip6multicast_min +ffffffff8311f018 D ether_ip6multicast_max +ffffffff83120000 D etherip_cloner +ffffffff83120030 D etherip_list +ffffffff83121000 D loop_cloner +ffffffff83122000 D ifmedia_mtx +ffffffff83123000 D ppp_compressors +ffffffff83123020 D ppp_cloner +ffffffff83124000 D ppp_pkt_init +ffffffff83125000 D ppp_bsd_compress +ffffffff83126000 D ppp_deflate +ffffffff83126070 D ppp_deflate_draft +ffffffff83127000 D tun_cloner +ffffffff83127030 D tap_cloner +ffffffff83128000 D bridgeintrq +ffffffff83128038 D bridge_cloner +ffffffff83129000 d veb_cloner +ffffffff83129030 d vport_cloner +ffffffff8312a000 D vlan_tagh_lk +ffffffff8312a010 D vlan_cloner +ffffffff8312a040 D svlan_cloner +ffffffff8312b000 D pipex_list_mtx +ffffffff8312b010 D pipex_prune +ffffffff8312b018 D pipexoutq +ffffffff8312b050 d SHAPad2 +ffffffff8312c000 D rtmap_gc +ffffffff8312c018 D rt_rc +ffffffff8312d000 D rt_labels +ffffffff8312e000 D enc_cloner +ffffffff8312f000 D gre_cloner +ffffffff8312f030 D gre_list +ffffffff8312f040 D mgre_cloner +ffffffff8312f070 D egre_cloner +ffffffff8312f0a0 D nvgre_cloner +ffffffff8312f0d0 D eoip_cloner +ffffffff83130000 D trunk_cloner +ffffffff83131000 d aggr_cloner +ffffffff83132000 d tpmr_cloner +ffffffff83133000 D mpe_cloner +ffffffff83134000 D mpw_cloner +ffffffff83135000 D mpip_cloner +ffffffff83136000 d bpe_cloner +ffffffff83136030 d bpe_lock +ffffffff83137000 D vether_cloner +ffffffff83138000 D pair_cloner +ffffffff83139000 d vxlan_cloner +ffffffff83139030 d vxlan_lock +ffffffff83139040 d vxlan_teps +ffffffff8313a000 D underload_interval +ffffffff8313a010 D wg_cloner +ffffffff8313b000 d stoeplitz_keyseed +ffffffff8313c000 D ieee80211_cache_size +ffffffff8313d000 D arpt_prune +ffffffff8313d004 D arpt_keep +ffffffff8313d008 D arpt_down +ffffffff8313d010 D arpinq +ffffffff8313d048 D arp_mtx +ffffffff8313d058 D arp_maxtries +ffffffff8313e000 D ipport_firstauto +ffffffff8313e004 D ipport_lastauto +ffffffff8313e008 D ipport_hifirstauto +ffffffff8313e00c D ipport_hilastauto +ffffffff8313f000 D divert_sendspace +ffffffff8313f004 D divert_recvspace +ffffffff8313f008 D divbhashsize +ffffffff83140000 D icmptstamprepl +ffffffff83140004 D icmperrppslim +ffffffff83140008 D icmp_redirtimeout +ffffffff83141000 D ipsendredirects +ffffffff83141004 D ip_defttl +ffffffff83141008 D ip_mtudisc +ffffffff8314100c D ip_mtudisc_timeout +ffffffff83141010 D ipq_mutex +ffffffff83141020 D ip_maxqueue +ffffffff83141028 D ipintrq +ffffffff83141060 d ipsend_task +ffffffff83141090 d ipsendraw_task +ffffffff83142000 D ip_mrtproto +ffffffff83142004 d sin +ffffffff83143000 D rip_sendspace +ffffffff83143008 D rip_recvspace +ffffffff83144000 D tcprexmtthresh +ffffffff83144004 D tcptv_keep_init +ffffffff83144008 D tcp_rst_ppslim +ffffffff8314400c D tcp_ackdrop_ppslim +ffffffff83144010 D tcp_syn_hash_size +ffffffff83144014 D tcp_syn_cache_limit +ffffffff83144018 D tcp_syn_bucket_limit +ffffffff8314401c D tcp_syn_use_limit +ffffffff83145000 D tcp_outflags +ffffffff83146000 D tcp_timer_mtx +ffffffff83146010 D tcp_mssdflt +ffffffff83146014 D tcp_rttdflt +ffffffff83146018 D tcp_do_rfc1323 +ffffffff8314601c D tcp_do_sack +ffffffff83146020 D tcp_do_rfc3390 +ffffffff83146024 D tcp_reass_limit +ffffffff83146028 D tcp_sackhole_limit +ffffffff83147000 D tcp_backoff +ffffffff83147034 D tcp_totbackoff +ffffffff83148000 D tcp_sendspace +ffffffff83148004 D tcp_recvspace +ffffffff83148008 D tcp_autorcvbuf_inc +ffffffff83149000 D udpcksum +ffffffff83149004 D udp_sendspace +ffffffff83149008 D udp_recvspace +ffffffff8314a000 D ipsec_flows_mtx +ffffffff8314a010 D ipsec_ids_idle +ffffffff8314a014 D ipsec_ids_next_flow +ffffffff8314a018 D ipsec_policy_head +ffffffff8314a028 D ipsp_ids_gc_timeout +ffffffff8314a070 D tdb_sadb_mtx +ffffffff8314a080 d tdb_hashmask +ffffffff8314b000 D ipo_tdb_mtx +ffffffff8314b010 D ipsec_acquire_mtx +ffffffff8314b020 D ipsec_acquire_head +ffffffff8314c000 D ipsec_keep_invalid +ffffffff8314c004 D ipsec_require_pfs +ffffffff8314c008 D ipsec_soft_timeout +ffffffff8314c00c D ipsec_exp_timeout +ffffffff8314c010 D ipsec_soft_first_use +ffffffff8314c014 D ipsec_exp_first_use +ffffffff8314c018 D ipsec_expire_acquire +ffffffff8314c01c D esp_enable +ffffffff8314c020 D ah_enable +ffffffff8314d000 D udpencap_enable +ffffffff8314d004 D udpencap_port +ffffffff8314e000 D carp_vh_rc +ffffffff8314e020 D carp_sc_rc +ffffffff8314e040 D carp_opts +ffffffff8314e058 D carp_cloner +ffffffff8314e088 d carp_send_na.mcast +ffffffff8314f000 d PADDING +ffffffff83150000 d PADDING +ffffffff83151000 d weak_keys +ffffffff83152000 D swcr_id +ffffffff83153000 D window_inflate +ffffffff83153004 D window_deflate +ffffffff83154000 D ghash_update +ffffffff83155000 D mpls_defttl +ffffffff83155004 D mpls_mapttl_ip +ffffffff83156000 D nfskevq_lock +ffffffff83157000 D nfs_backoff +ffffffff83157020 D nfs_ptimers +ffffffff83158000 D desirednfsrvcache +ffffffff83158010 D nonidempotent +ffffffff83158070 D nfsv2_repstat +ffffffff83159000 D nfsv2_type +ffffffff83159030 D nfsv3_type +ffffffff83159060 D nv2tov_type +ffffffff83159080 D nv3tov_type +ffffffff831590a0 D nfsv3_procid +ffffffff83159100 D nfsv2_procid +ffffffff8315915c d nfsv3err_getattr +ffffffff83159170 d nfsv3err_setattr +ffffffff83159190 d nfsv3err_lookup +ffffffff831591a4 d nfsv3err_access +ffffffff831591b0 d nfsv3err_readlink +ffffffff831591d0 d nfsv3err_read +ffffffff831591f0 d nfsv3err_write +ffffffff83159210 d nfsv3err_create +ffffffff83159230 d nfsv3err_mkdir +ffffffff83159250 d nfsv3err_symlink +ffffffff83159270 d nfsv3err_mknod +ffffffff83159290 d nfsv3err_remove +ffffffff831592b0 d nfsv3err_rmdir +ffffffff831592d0 d nfsv3err_rename +ffffffff83159300 d nfsv3err_link +ffffffff83159330 d nfsv3err_readdir +ffffffff83159350 d nfsv3err_readdirplus +ffffffff83159366 d nfsv3err_fsstat +ffffffff83159372 d nfsv3err_fsinfo +ffffffff8315937c d nfsv3err_pathconf +ffffffff83159386 d nfsv3err_commit +ffffffff8315a000 D nfsrv3_procs +ffffffff8315a0b8 D nfs_niothreads +ffffffff8315b000 D fragtbl +ffffffff8315c000 D ffs_vtbl +ffffffff8315d000 D softdep_typenames +ffffffff8315d070 D tickdelay +ffffffff8315e000 D dirchk +ffffffff8315f000 D desireddquot +ffffffff83160000 D amap_list_lock +ffffffff83161000 d uao_list_lock +ffffffff83162000 d uvmexp_countersboot_boot_cpumem +ffffffff831620c0 D uvmexp_counters +ffffffff831620c8 D vm_min_kernel_address +ffffffff83163000 D no_constraint +ffffffff83164000 d uvm_kmapent_warn_rate +ffffffff83165000 D maxslp +ffffffff83166000 D uvmpagerops +ffffffff83167000 D swap_syscall_lock +ffffffff83167010 D oommtx +ffffffff83168000 D uvm_doswapencrypt +ffffffff83169000 D gif_list +ffffffff83169010 D gif_cloner +ffffffff8316a000 D divert6_sendspace +ffffffff8316a004 D divert6_recvspace +ffffffff8316a008 D divb6hashsize +ffffffff8316b000 d in6_get_hw_ifid.allone +ffffffff8316c000 D ip6_sendredirects +ffffffff8316c004 D ip6_defhlim +ffffffff8316c008 D ip6_defmcasthlim +ffffffff8316c00c D ip6_maxfragpackets +ffffffff8316c010 D ip6_maxfrags +ffffffff8316c014 D ip6_log_interval +ffffffff8316c018 D ip6_hdrnestlimit +ffffffff8316c01c D ip6_dad_count +ffffffff8316c020 D ip6_auto_flowlabel +ffffffff8316c024 D ip6_use_deprecated +ffffffff8316c028 D ip6_neighborgcthresh +ffffffff8316c02c D ip6_maxdynroutes +ffffffff8316c030 D rip6_sendspace +ffffffff8316c038 D rip6_recvspace +ffffffff8316c040 D icmp6_redirtimeout +ffffffff8316c044 D icmp6errppslim +ffffffff8316c048 D ip6_mtudisc_timeout +ffffffff8316d000 D frag6_mutex +ffffffff8316e000 d icmp6_mtudisc_hiwat +ffffffff8316e004 d icmp6_mtudisc_lowat +ffffffff8316f000 d randomtab_20 +ffffffff83170000 D ip6intrq +ffffffff83170038 d ip6send_task +ffffffff83171000 D nd6_timer_next +ffffffff83171008 D nd6_expire_next +ffffffff83171010 D nd6_delay +ffffffff83171014 D nd6_umaxtries +ffffffff83171018 D nd6_mmaxtries +ffffffff8317101c D nd6_gctimer +ffffffff83171020 D nd6_maxndopt +ffffffff83172000 d dadq +ffffffff83173000 D pfkeyv2_mtx +ffffffff83173010 d pfkeyv2_seq +ffffffff83174000 D sadb_exts_allowed_in +ffffffff83174090 D sadb_exts_required_in +ffffffff83175000 D cold +ffffffff83176000 D bdevsw +ffffffff83176460 D nblkdev +ffffffff83176470 D cdevsw +ffffffff83178400 D nchrdev +ffffffff83178404 D mem_no +ffffffff83178408 D swapdev +ffffffff83178410 D constab +ffffffff83179000 D machine +ffffffff83179008 D lid_action +ffffffff8317900c D pwr_action +ffffffff83179010 D isa_constraint +ffffffff83179020 D dma_constraint +ffffffff83179030 D uvm_md_constraints +ffffffff83179048 D delay_func +ffffffff83179050 D initclock_func +ffffffff83179058 D bootinfo_size +ffffffff8317905c D waittime +ffffffff83179060 D dumpmag +ffffffff8317a000 D tsc_rdtsc +ffffffff8317a008 D tsc_timecounter +ffffffff8317a060 D tsc_is_synchronized +ffffffff8317b000 D local_apic +ffffffff8317b020 D lapic_id +ffffffff8317b080 D lapic_tpr +ffffffff8317b0a0 d lapic_ppr +ffffffff8317b100 d lapic_isr +ffffffff8317c000 D warn_once +ffffffff8317d000 d errata +ffffffff8317e000 D cpu_ucode_intel_mtx +ffffffff8317f000 D mem_owner_bios +ffffffff8317f008 D mrops +ffffffff8317f028 D mtrrmask +ffffffff8317f030 D mtrrtomrt +ffffffff83180000 D pmap_pg_wc +ffffffff83180008 D pmaps_lock +ffffffff83180018 d pmap_maxkvaddr +ffffffff83181000 D kv_physwait +ffffffff83182000 D fpu_save_len +ffffffff83183000 D i8259_pic +ffffffff83184000 D softintr_pic +ffffffff83185000 D ipifunc +ffffffff83186000 D setperf_mp_mutex +ffffffff83187000 D db_Grp6 +ffffffff83187040 D db_Grp7 +ffffffff83187100 D db_Grp8 +ffffffff83187140 D db_Grp9 +ffffffff83187200 D db_GrpA +ffffffff83187240 D db_GrpB +ffffffff83187280 D db_GrpC +ffffffff831872c0 D db_inst_0f0x +ffffffff83187440 D db_inst_0f2x +ffffffff831875c0 D db_inst_0f3x +ffffffff83187740 D db_inst_0f8x +ffffffff831878c0 D db_inst_0f9x +ffffffff83187a40 D db_inst_0fax +ffffffff83187bc0 D db_inst_0fbx +ffffffff83187d40 D db_inst_0fcx +ffffffff83187ec0 D db_inst_0f +ffffffff83187f40 D db_Esc92 +ffffffff83187f80 D db_Esc94 +ffffffff83187fc0 D db_Esc95 +ffffffff83188000 D db_Esc96 +ffffffff83188040 D db_Esc97 +ffffffff83188080 D db_Esca5 +ffffffff831880c0 D db_Escb4 +ffffffff83188100 D db_Esce3 +ffffffff83188140 D db_Escf4 +ffffffff83188180 D db_Esc8 +ffffffff83188240 D db_Esc9 +ffffffff83188300 D db_Esca +ffffffff831883c0 D db_Escb +ffffffff83188480 D db_Escc +ffffffff83188540 D db_Escd +ffffffff83188600 D db_Esce +ffffffff831886c0 D db_Escf +ffffffff83188780 D db_Esc_inst +ffffffff831887c0 D db_Grp1 +ffffffff83188800 D db_Grp2 +ffffffff83188840 D db_Grp3 +ffffffff83188900 D db_Grp4 +ffffffff831889c0 D db_Grp5 +ffffffff83188a80 D db_inst_table +ffffffff8318a280 D db_bad_inst +ffffffff8318a2a0 D db_index_reg_16 +ffffffff8318a2e0 D db_reg +ffffffff8318a4e0 D db_seg_reg +ffffffff8318a520 D db_lengths +ffffffff8318b000 D db_regs +ffffffff8318b1e0 D db_eregs +ffffffff8318b1f0 D db_reg_args +ffffffff8318c000 D timer_mutex +ffffffff8318c010 d i8254_timecounter +ffffffff8318d000 D spleen8x16 +ffffffff8318d058 D spleen12x24 +ffffffff8318d0b0 D spleen16x32 +ffffffff8318d108 D spleen32x64 +ffffffff8318d160 d builtin_fonts +ffffffff8318d1e0 d wsfont_add.cookiegen +ffffffff8318d1f0 d spleen8x16_data +ffffffff8318dff0 d spleen12x24_data +ffffffff831909f0 d spleen16x32_data +ffffffff831941f0 d spleen32x64_data +ffffffff831a3000 D nsphy_cd +ffffffff831a4000 D nsphyter_cd +ffffffff831a5000 D gentbi_cd +ffffffff831a6000 D qsphy_cd +ffffffff831a7000 D inphy_cd +ffffffff831a8000 D iophy_cd +ffffffff831a9000 D eephy_cd +ffffffff831aa000 D exphy_cd +ffffffff831ab000 D rlphy_cd +ffffffff831ac000 D lxtphy_cd +ffffffff831ad000 D luphy_cd +ffffffff831ae000 D mtdphy_cd +ffffffff831af000 D icsphy_cd +ffffffff831b0000 D sqphy_cd +ffffffff831b1000 D tqphy_cd +ffffffff831b2000 D ukphy_cd +ffffffff831b3000 D dcphy_cd +ffffffff831b4000 D bmtphy_cd +ffffffff831b5000 D brgphy_cd +ffffffff831b6000 D xmphy_cd +ffffffff831b7000 D amphy_cd +ffffffff831b8000 D acphy_cd +ffffffff831b9000 D nsgphy_cd +ffffffff831ba000 D urlphy_cd +ffffffff831bb000 D rgephy_cd +ffffffff831bc000 D ciphy_cd +ffffffff831bd000 D ipgphy_cd +ffffffff831be000 D etphy_cd +ffffffff831bf000 D jmphy_cd +ffffffff831c0000 D atphy_cd +ffffffff831c1000 D scsi_autoconf +ffffffff831c1008 D scsibus_cd +ffffffff831c2000 D cd_cd +ffffffff831c3000 D ch_cd +ffffffff831c3020 D chquirks +ffffffff831c4000 D sd_cd +ffffffff831c5000 D st_cd +ffffffff831c6000 D uk_cd +ffffffff831c7000 D safte_cd +ffffffff831c8000 D ses_cd +ffffffff831c9000 D sym_cd +ffffffff831c9020 D sym_devices +ffffffff831c9070 D asym_devices +ffffffff831ca000 D rdac_cd +ffffffff831ca020 D rdac_devices +ffffffff831cb000 D emc_cd +ffffffff831cb020 D emc_devices +ffffffff831cc000 D hds_cd +ffffffff831cc020 D hds_devices +ffffffff831cd000 D atapiscsi_cd +ffffffff831ce000 D wd_cd +ffffffff831ce020 d wddumpmulti +ffffffff831cf000 D mainbus_cd +ffffffff831cf020 D mba_iba +ffffffff831d0000 D bios_cd +ffffffff831d0020 D smbios_uninfo +ffffffff831d1000 D mpbios_cd +ffffffff831d1020 d mp_conf +ffffffff831d1070 d extint_bus +ffffffff831d10a0 d smi_bus +ffffffff831d10d0 d nmi_bus +ffffffff831d2000 D cpu_info_full_primary +ffffffff831d5000 D cpu_info_list +ffffffff831d5008 D mp_cpu_funcs +ffffffff831d5020 D cpu_cd +ffffffff831d5040 D cpu_info +ffffffff831d6000 D local_pic +ffffffff831d6090 D lapic_readreg +ffffffff831d6098 D lapic_writereg +ffffffff831d60a0 D x86_ipi +ffffffff831d7000 D ioapic_cold +ffffffff831d7008 D ioapic_cd +ffffffff831d8000 D efifb_std_descr +ffffffff831d8030 D efifb_descrs +ffffffff831d8038 D efifb_accessops +ffffffff831d8098 D efifb_cd +ffffffff831d9000 D pvbus_cd +ffffffff831d9020 D pvbus_types +ffffffff831d90e0 D pvbus_dma_tag +ffffffff831da000 D pvclock_cd +ffffffff831da020 D pvclock_timecounter +ffffffff831db000 D vmt_tclo_rpc +ffffffff831db0d0 D vmt_cd +ffffffff831dc000 D xen_cd +ffffffff831dc020 D xen_bus_dma_tag +ffffffff831dd000 D xnf_cd +ffffffff831de000 D xbf_cd +ffffffff831df000 D hv_msg_dispatch +ffffffff831df110 D hv_timecounter +ffffffff831df168 D hyperv_cd +ffffffff831e0000 d hv_ic_devs +ffffffff831e1000 D hvn_cd +ffffffff831e2000 D hvs_cd +ffffffff831e3000 D virtio_cd +ffffffff831e4000 D vio_cd +ffffffff831e5000 D vioblk_cd +ffffffff831e6000 D viomb_cd +ffffffff831e7000 D viornd_cd +ffffffff831e8000 D vioscsi_cd +ffffffff831e9000 D vmmci_cd +ffffffff831ea000 D pci_cd +ffffffff831eb000 D arc_fw_hdr +ffffffff831eb008 D arc_cd +ffffffff831ec000 D jmb_cd +ffffffff831ed000 D mfii_cd +ffffffff831ee000 D ips_cd +ffffffff831ef000 D eap_cd +ffffffff831f0000 D auacer_cd +ffffffff831f1000 D auich_cd +ffffffff831f2000 D azalia_cd +ffffffff831f3000 D envy_cd +ffffffff831f3020 D envy_matchids +ffffffff831f3030 D envy_rates +ffffffff831f30b0 D ak4524_dac +ffffffff831f30d8 D ak4524_adc +ffffffff831f3100 D ak4358_dac +ffffffff831f3128 D ak5365_adc +ffffffff831f3150 D unkenvy_codec +ffffffff831f3180 D envy_cards +ffffffff831f33f0 D envy_cards_ht +ffffffff831f3600 d julia_eeprom +ffffffff831f4000 D emu_cd +ffffffff831f5000 D auixp_cd +ffffffff831f6000 D clcs_cd +ffffffff831f7000 D yds_cd +ffffffff831f8000 D auvia_cd +ffffffff831f9000 D qle_cd +ffffffff831fa000 D mpii_cd +ffffffff831fb000 D aq_cd +ffffffff831fc000 D de_cd +ffffffff831fd000 D pcn_cd +ffffffff831fe000 D wdc_sii3114_vtbl +ffffffff831fe038 D wdc_pdc203xx_vtbl +ffffffff831fe070 D wdc_svwsata_vtbl +ffffffff831fe0a8 D pciide_cd +ffffffff831fe0d0 d sis_hostbr_type +ffffffff831ff000 D ppb_cd +ffffffff83200000 D vr_cd +ffffffff83200020 D vr_devices +ffffffff83201000 D txp_cd +ffffffff83202000 D bt848_card_signature +ffffffff83203000 D bktr_cd +ffffffff83204000 D em_cd +ffffffff83205000 D ixgb_cd +ffffffff83206000 D ix_cd +ffffffff83206020 D ixgbe_smart_speed +ffffffff83206024 D ixgbe_enable_msix +ffffffff83207000 D ixl_cd +ffffffff83207020 d ixl_sff_lock +ffffffff83208000 D xge_cd +ffffffff83209000 D thtc_cd +ffffffff83209020 D tht_cd +ffffffff83209040 D tht_txt_desc +ffffffff83209068 D tht_rxf_desc +ffffffff83209090 D tht_rxd_desc +ffffffff832090b8 D tht_txf_desc +ffffffff8320a000 D myx_cd +ffffffff8320b000 D oce_cd +ffffffff8320c000 D dc_devs +ffffffff8320d000 D cas_cd +ffffffff8320e000 D sis_cd +ffffffff8320f000 D se_cd +ffffffff83210000 D cbb_cd +ffffffff83210020 D yc_chipsets +ffffffff832101b0 d pccbb_funcs +ffffffff832101e0 d pccbb_pcmcia_funcs +ffffffff83211000 D skc_cd +ffffffff83211020 D sk_cd +ffffffff83212000 D mskc_cd +ffffffff83212020 D msk_cd +ffffffff83213000 D puc_cd +ffffffff83214000 D puc_ndevs +ffffffff83215000 D iwi_cd +ffffffff83216000 D wpi_cd +ffffffff83217000 D iwn_cd +ffffffff83218000 D iwm_cd +ffffffff83219000 D iwx_cd +ffffffff8321a000 D cmpci_cd +ffffffff8321b000 D iha_cd +ffffffff8321c000 D pcscp_cd +ffffffff8321c020 D pcscp_glue +ffffffff8321d000 D bge_cd +ffffffff8321e000 D bnx_firmwares +ffffffff8321e160 D bnx_rv2ps +ffffffff8321e1c0 D bnx_cd +ffffffff8321e1e0 d flash_5709 +ffffffff8321e210 d flash_table +ffffffff8321f000 D vge_cd +ffffffff83220000 D stge_cd +ffffffff83221000 D nfe_cd +ffffffff83222000 D et_cd +ffffffff83223000 D jme_cd +ffffffff83224000 D age_cd +ffffffff83225000 D alc_dma_burst +ffffffff83225020 D alc_cd +ffffffff83226000 D ale_cd +ffffffff83227000 D amdpm_cd +ffffffff83227020 d amdpm_timecounter +ffffffff83228000 D bce_cd +ffffffff83229000 D rtwn_cd +ffffffff8322a000 d ral_rt2560_opns +ffffffff8322a028 d ral_rt2661_opns +ffffffff8322a050 d ral_rt2860_opns +ffffffff8322b000 D piixpm_cd +ffffffff8322c000 D vic_cd +ffffffff8322d000 D vmx_cd +ffffffff8322e000 D vmwpvs_cd +ffffffff8322f000 D lii_cd +ffffffff83230000 D ichiic_cd +ffffffff83231000 D viapm_cd +ffffffff83231020 d viapm_timecounter +ffffffff83232000 D amdiic_cd +ffffffff83233000 D nviic_cd +ffffffff83234000 D kate_cd +ffffffff83235000 D km_cd +ffffffff83236000 D cpu_model_offsets +ffffffff83236070 D ksmn_cd +ffffffff83237000 D itherm_cd +ffffffff83238000 D pchtemp_cd +ffffffff83239000 D xspd_cd +ffffffff8323a000 D virtio_pci_ops +ffffffff8323b000 D bwfm_pci_buscore_ops +ffffffff8323b030 D bwfm_pci_bus_ops +ffffffff8323b058 D bwfm_pci_msgbuf_ops +ffffffff8323c000 D bnxt_cd +ffffffff8323d000 D mcx_cd +ffffffff8323e000 D iavf_cd +ffffffff8323f000 D rge_cd +ffffffff83240000 D igc_cd +ffffffff83241000 D agp_cd +ffffffff83242000 D intagp_cd +ffffffff83242020 D agp_i810_methods +ffffffff83243000 D reservation_ww_class +ffffffff83244000 d bridge_lock +ffffffff83244010 d bridge_list +ffffffff83245000 d drm_connector_enum_list +ffffffff832451f8 d connector_list_lock +ffffffff83245208 d connector_list +ffffffff83246000 d kernel_fb_helper_list +ffffffff83246010 d kernel_fb_helper_lock +ffffffff83247000 D drm_global_mutex +ffffffff83248000 D sch_mtx +ffffffff83248010 D i2c_bit_algo +ffffffff83248020 d drm_fence_context_count +ffffffff83248028 d dma_fence_stub_mtx +ffffffff83248038 D wait_bit_mtx +ffffffff83248048 D shrinkers +ffffffff83249000 d crtc_ww_class +ffffffff8324a000 d panel_lock +ffffffff8324a010 d panel_list +ffffffff8324b000 d ttm_global_mutex +ffffffff8324c000 D intel_bbops +ffffffff8324d000 d i915_sys_placement +ffffffff8324d020 d i915_ttm_bo_driver +ffffffff8324e000 d mchdev_lock +ffffffff8324f000 D inteldrm_stdscreen +ffffffff8324f030 D inteldrm_scrlist +ffffffff8324f038 D inteldrm_screenlist +ffffffff8324f048 D inteldrm_accessops +ffffffff8324f0a8 D inteldrm_cd +ffffffff83250000 d i915_gpu_coredump.capture_mutex +ffffffff83251000 d mitigations +ffffffff83252000 D i915_modparams +ffffffff83253000 d schedule_lock +ffffffff83254000 d unbind_fence_ops +ffffffff83255000 D intel_graphics_stolen_res +ffffffff83256000 D btc_valid_sclk +ffffffff83257000 d evergreen_cs_packet_parse_vline.vline_start_end +ffffffff83257020 d evergreen_cs_packet_parse_vline.vline_status +ffffffff83258000 d r600_cs_packet_parse_vline.vline_start_end +ffffffff83258008 d r600_cs_packet_parse_vline.vline_status +ffffffff83259000 d r100_asic +ffffffff832592e0 d r200_asic +ffffffff832595c0 d r300_asic_pcie +ffffffff832598a0 d r300_asic +ffffffff83259b80 d r420_asic +ffffffff83259e60 d rs400_asic +ffffffff8325a140 d rs600_asic +ffffffff8325a420 d rs690_asic +ffffffff8325a700 d rv515_asic +ffffffff8325a9e0 d r520_asic +ffffffff8325acc0 d r600_asic +ffffffff8325afa0 d rv6xx_asic +ffffffff8325b280 d rs780_asic +ffffffff8325b560 d rv770_asic +ffffffff8325b840 d evergreen_asic +ffffffff8325bb20 d sumo_asic +ffffffff8325be00 d btc_asic +ffffffff8325c0e0 d cayman_asic +ffffffff8325c3c0 d trinity_asic +ffffffff8325c6a0 d si_asic +ffffffff8325c980 d ci_asic +ffffffff8325cc60 d kv_asic +ffffffff8325d000 d dce6_funcs +ffffffff8325d018 d dce6_hdmi_funcs +ffffffff8325d088 d dce6_dp_funcs +ffffffff8325d0f8 d dce4_funcs +ffffffff8325d110 d dce4_hdmi_funcs +ffffffff8325d180 d dce4_dp_funcs +ffffffff8325d1f0 d dce32_funcs +ffffffff8325d208 d dce32_hdmi_funcs +ffffffff8325d278 d dce32_dp_funcs +ffffffff8325d2e8 d r600_funcs +ffffffff8325d300 d r600_hdmi_funcs +ffffffff8325e000 D radeon_modeset +ffffffff8325e004 D radeon_dynclks +ffffffff8325e008 D radeon_agpmode +ffffffff8325e00c D radeon_gart_size +ffffffff8325e010 D radeon_tv +ffffffff8325e014 D radeon_audio +ffffffff8325e018 D radeon_pcie_gen2 +ffffffff8325e01c D radeon_msi +ffffffff8325e020 D radeon_lockup_timeout +ffffffff8325e024 D radeon_dpm +ffffffff8325e028 D radeon_aspm +ffffffff8325e02c D radeon_runtime_pm +ffffffff8325e030 D radeon_vm_size +ffffffff8325e034 D radeon_vm_block_size +ffffffff8325e038 D radeon_use_pflipirq +ffffffff8325e03c D radeon_bapm +ffffffff8325e040 D radeon_backlight +ffffffff8325e044 D radeon_auxch +ffffffff8325e048 D radeon_uvd +ffffffff8325e04c D radeon_vce +ffffffff8325e050 D radeon_si_support +ffffffff8325e054 D radeon_cik_support +ffffffff8325e058 D radeondrm_cd +ffffffff8325e078 D radeondrm_stdscreen +ffffffff8325e0a8 D radeondrm_scrlist +ffffffff8325e0b0 D radeondrm_screenlist +ffffffff8325e0c0 D radeondrm_accessops +ffffffff8325f000 D radeon_bbops +ffffffff83260000 d radeon_bo_driver +ffffffff83261000 d verde_pg_init +ffffffff83262000 d cac_weights_pitcairn +ffffffff832624d0 d cac_weights_oland +ffffffff83263000 d aldebaran_mode2_handler +ffffffff83264000 d amdgpu_vbios_version_attrs +ffffffff83265000 D amdgpu_asic_name +ffffffff83266000 D amdgpu_gart_size +ffffffff83266004 D amdgpu_gtt_size +ffffffff83266008 D amdgpu_moverate +ffffffff8326600c D amdgpu_audio +ffffffff83266010 D amdgpu_pcie_gen2 +ffffffff83266014 D amdgpu_msi +ffffffff83266018 D amdgpu_dpm +ffffffff8326601c D amdgpu_fw_load_type +ffffffff83266020 D amdgpu_aspm +ffffffff83266024 D amdgpu_runtime_pm +ffffffff83266028 D amdgpu_ip_block_mask +ffffffff8326602c D amdgpu_bapm +ffffffff83266030 D amdgpu_vm_size +ffffffff83266034 D amdgpu_vm_fragment_size +ffffffff83266038 D amdgpu_vm_block_size +ffffffff8326603c D amdgpu_vm_update_mode +ffffffff83266040 D amdgpu_dc +ffffffff83266044 D amdgpu_sched_jobs +ffffffff83266048 D amdgpu_sched_hw_submission +ffffffff83266050 D amdgpu_cg_mask +ffffffff83266058 D amdgpu_pg_mask +ffffffff8326605c D amdgpu_sdma_phase_quantum +ffffffff83266060 D amdgpu_pp_feature_mask +ffffffff83266064 D amdgpu_lbpw +ffffffff83266068 D amdgpu_compute_multipipe +ffffffff8326606c D amdgpu_gpu_recovery +ffffffff83266070 D amdgpu_smu_pptable_id +ffffffff83266074 D amdgpu_dc_feature_mask +ffffffff83266078 D amdgpu_async_gfx_ring +ffffffff8326607c D amdgpu_discovery +ffffffff83266080 D amdgpu_noretry +ffffffff83266084 D amdgpu_force_asic_type +ffffffff83266088 D amdgpu_tmz +ffffffff8326608c D amdgpu_reset_method +ffffffff83266090 D amdgpu_num_kcq +ffffffff83266094 D amdgpu_use_xgmi_p2p +ffffffff83266098 D mgpu_info +ffffffff83266248 D amdgpu_ras_enable +ffffffff8326624c D amdgpu_ras_mask +ffffffff83266250 D amdgpu_bad_page_threshold +ffffffff83266254 D amdgpu_backlight +ffffffff83266258 D amdgpu_cd +ffffffff83266278 D amdgpu_stdscreen +ffffffff832662a8 D amdgpu_scrlist +ffffffff832662b0 D amdgpu_screenlist +ffffffff832662c0 D amdgpu_accessops +ffffffff83267000 d amdgpu_gtt_mgr_attributes +ffffffff83268000 D amdgpu_bbops +ffffffff83269000 D soc15_ih_clientid_name +ffffffff8326a000 D ras_error_string +ffffffff8326a030 D ras_block_string +ffffffff8326a0c0 D ras_mca_block_string +ffffffff8326b000 d amdgpu_bo_driver +ffffffff8326c000 d amdgpu_vram_mgr_attributes +ffffffff8326d000 D amdgpu_xgmi_hive_type +ffffffff8326d008 d xgmi_mutex +ffffffff8326d018 D xgmi_ras_hw_ops +ffffffff8326d058 D xgmi_ras +ffffffff8326e000 d gfx_v9_0_ras +ffffffff8326f000 D gfx_v9_4_ras +ffffffff83270000 D gfx_v9_4_2_ras_ops +ffffffff83270040 D gfx_v9_4_2_ras +ffffffff83271000 D hdp_v4_0_ras_hw_ops +ffffffff83271040 D hdp_v4_0_ras +ffffffff83272000 d jpeg_v2_6_ras +ffffffff83273000 D mca_v3_0_mp0_ras +ffffffff83273058 D mca_v3_0_mp1_ras +ffffffff832730b0 D mca_v3_0_mpio_ras +ffffffff83274000 D mmhub_v1_0_ras_hw_ops +ffffffff83274040 D mmhub_v1_0_ras +ffffffff83275000 D mmhub_v1_7_ras_hw_ops +ffffffff83275040 D mmhub_v1_7_ras +ffffffff83276000 D mmhub_v9_4_ras +ffffffff83277000 D nbio_v7_4_ras +ffffffff83278000 d sriov_sc_video_codecs_encode +ffffffff83278010 d sriov_sc_video_codecs_decode +ffffffff83278020 d sriov_sc_video_codecs_encode_array +ffffffff83278050 d sriov_sc_video_codecs_decode_array +ffffffff83279000 d sdma_v4_0_ras +ffffffff8327a000 D sdma_v4_4_ras +ffffffff8327b000 d sienna_cichlid_mode2_handler +ffffffff8327c000 D umc_v6_1_ras +ffffffff8327d000 D umc_v6_7_ras +ffffffff8327e000 D umc_v8_10_ras +ffffffff8327f000 D umc_v8_7_ras +ffffffff83280000 d vcn_v2_6_ras +ffffffff83281000 d amdgpu_dm_mode_config_helperfuncs +ffffffff83281010 d dm_atomic_state_funcs +ffffffff83282000 d construct_integrated_info.result +ffffffff83282004 d bios_parser_get_firmware_info.result +ffffffff83283000 d dce_funcs +ffffffff83284000 d dce110_funcs +ffffffff83285000 d dce112_funcs +ffffffff83286000 d dce120_funcs +ffffffff83287000 d rv1_clk_funcs +ffffffff83287088 d rv1_clk_internal_funcs +ffffffff83288000 d rv2_clk_internal_funcs +ffffffff83289000 d dcn2_funcs +ffffffff8328a000 D dcn201_funcs +ffffffff8328b000 d dcn21_funcs +ffffffff8328b088 d rn_bw_params +ffffffff8328c000 D dcn3_fpga_funcs +ffffffff8328c088 d dcn3_funcs +ffffffff8328d000 d vg_funcs +ffffffff8328d088 d dummy_clocks +ffffffff8328d1b8 d vg_bw_params +ffffffff8328e000 d dcn31_bw_params +ffffffff8328e2a0 d dcn31_funcs +ffffffff8328f000 d dcn314_bw_params +ffffffff8328f2a0 d dcn314_funcs +ffffffff83290000 d dcn315_funcs +ffffffff83290088 d dcn315_bw_params +ffffffff83291000 d dcn316_funcs +ffffffff83291088 d dcn316_bw_params +ffffffff83292000 d dcn32_funcs +ffffffff83293000 d dcn10_dpp_cap +ffffffff83294000 D aperture_default_system +ffffffff83295000 d dcn20_dpp_cap +ffffffff83295010 d dcn20_dpp_funcs +ffffffff83296000 d dcn20_hubp_funcs +ffffffff83297000 d dcn20_opp_funcs +ffffffff83298000 d dcn20_tg_funcs +ffffffff83299000 d dcn201_dpp_funcs +ffffffff83299110 d dcn201_dpp_cap +ffffffff8329a000 d dcn201_hubp_funcs +ffffffff8329b000 d dcn201_opp_funcs +ffffffff8329c000 d dcn201_tg_funcs +ffffffff8329d000 D dcn201_ip +ffffffff8329d1b8 D dcn201_soc +ffffffff8329db88 d dcn201_res_pool_funcs +ffffffff8329e000 d dcn21_hubp_funcs +ffffffff8329f000 d dcn30_afmt_funcs +ffffffff832a0000 d dcn30_dpp_cap +ffffffff832a0010 d dcn30_dpp_funcs +ffffffff832a1000 d dcn30_hubp_funcs +ffffffff832a2000 d dcn30_tg_funcs +ffffffff832a3000 d dcn30_vpg_funcs +ffffffff832a4000 d res_cap_dcn301 +ffffffff832a4040 d dcn301_res_pool_funcs +ffffffff832a5000 d dcn302_res_pool_funcs +ffffffff832a6000 d dcn303_res_pool_funcs +ffffffff832a7000 d dcn31_afmt_funcs +ffffffff832a8000 d dcn31_apg_funcs +ffffffff832a9000 d dcn31_hpo_dp_link_encoder_funcs +ffffffff832aa000 d dcn31_hubp_funcs +ffffffff832ab000 d dcn31_tg_funcs +ffffffff832ac000 d dcn31_res_pool_funcs +ffffffff832ad000 d dcn31_vpg_funcs +ffffffff832ae000 d dcn314_tg_funcs +ffffffff832af000 d dcn314_res_pool_funcs +ffffffff832b0000 d dcn315_res_pool_funcs +ffffffff832b1000 d dcn316_res_pool_funcs +ffffffff832b2000 d dcn32_dpp_funcs +ffffffff832b2110 d dcn32_dpp_cap +ffffffff832b3000 d dcn32_hpo_dp_link_encoder_funcs +ffffffff832b4000 d dcn32_hubp_funcs +ffffffff832b5000 d dcn32_tg_funcs +ffffffff832b6000 d dcn32_res_pool_funcs +ffffffff832b7000 d dcn321_res_pool_funcs +ffffffff832b8000 D dcn1_0_ip +ffffffff832b81b8 D dcn1_0_soc +ffffffff832b9000 D dcn2_0_ip +ffffffff832b91b8 D dcn2_0_nv14_ip +ffffffff832b9370 D dcn2_0_soc +ffffffff832b9d40 D dcn2_0_nv14_soc +ffffffff832ba710 D dcn2_1_ip +ffffffff832ba8c8 D dcn2_1_soc +ffffffff832bb298 D ddr4_wm_table_gs +ffffffff832bb358 D lpddr4_wm_table_gs +ffffffff832bb418 D lpddr4_wm_table_with_disabled_ppt +ffffffff832bb4d8 D ddr4_wm_table_rn +ffffffff832bb598 D ddr4_1R_wm_table_rn +ffffffff832bb658 D lpddr4_wm_table_rn +ffffffff832bc000 D dcn3_0_ip +ffffffff832bc1b8 D dcn3_0_soc +ffffffff832bd000 D dcn3_01_ip +ffffffff832bd1b8 D dcn3_01_soc +ffffffff832bdb88 D ddr4_wm_table +ffffffff832bdc48 D lpddr5_wm_table +ffffffff832be000 D dcn3_02_ip +ffffffff832be1b8 D dcn3_02_soc +ffffffff832bf000 D dcn3_03_ip +ffffffff832bf1b8 D dcn3_03_soc +ffffffff832c0000 D dcn3_1_ip +ffffffff832c01b8 D dcn3_15_ip +ffffffff832c0370 D dcn3_16_ip +ffffffff832c0528 d dcn3_15_soc +ffffffff832c0ef8 d dcn3_1_soc +ffffffff832c18c8 d dcn3_16_soc +ffffffff832c3000 D dcn3_14_ip +ffffffff832c31b8 D dcn3_14_soc +ffffffff832c4000 D dcn3_2_ip +ffffffff832c41b8 D dcn3_2_soc +ffffffff832c5000 D dcn3_21_ip +ffffffff832c51b8 D dcn3_21_soc +ffffffff832c6000 d dsc_policy_max_target_bpp_limit +ffffffff832c7000 D DIDTEDCConfig_P12 +ffffffff832c7070 d smu7_profiling +ffffffff832c8000 d cyan_skillfish_message_map +ffffffff832c8a20 d cyan_skillfish_table_map +ffffffff832c9000 d navi10_table_map +ffffffff832c9080 d navi10_pwr_src_map +ffffffff832c9090 d navi10_workload_map +ffffffff832c90d0 d navi10_message_map +ffffffff832c9af0 d navi10_clk_map +ffffffff832c9bb0 d navi10_feature_mask_map +ffffffff832ca000 d sienna_cichlid_message_map +ffffffff832caa20 d sienna_cichlid_table_map +ffffffff832caaa0 d sienna_cichlid_pwr_src_map +ffffffff832caab0 d sienna_cichlid_workload_map +ffffffff832caaf0 d sienna_cichlid_clk_map +ffffffff832cabb0 d sienna_cichlid_feature_mask_map +ffffffff832cb000 d vangogh_message_map +ffffffff832cba20 d vangogh_table_map +ffffffff832cbaa0 d vangogh_workload_map +ffffffff832cbae0 d vangogh_feature_mask_map +ffffffff832cc000 d renoir_table_map +ffffffff832cc080 d renoir_workload_map +ffffffff832cc0c0 d renoir_message_map +ffffffff832ccae0 d renoir_clk_map +ffffffff832cd000 d smu_v13_0_0_feature_mask_map +ffffffff832cd3d0 d smu_v13_0_0_table_map +ffffffff832cd450 d smu_v13_0_0_pwr_src_map +ffffffff832cd460 d smu_v13_0_0_workload_map +ffffffff832cd4a0 d smu_v13_0_0_message_map +ffffffff832cdec0 d smu_v13_0_0_clk_map +ffffffff832ce000 d smu_v13_0_4_message_map +ffffffff832cea20 d smu_v13_0_4_table_map +ffffffff832ceaa0 d smu_v13_0_4_feature_mask_map +ffffffff832cf000 d smu_v13_0_5_table_map +ffffffff832cf080 d smu_v13_0_5_message_map +ffffffff832cfaa0 d smu_v13_0_5_feature_mask_map +ffffffff832d0000 d smu_v13_0_7_feature_mask_map +ffffffff832d03d0 d smu_v13_0_7_table_map +ffffffff832d0450 d smu_v13_0_7_pwr_src_map +ffffffff832d0460 d smu_v13_0_7_workload_map +ffffffff832d04a0 d smu_v13_0_7_message_map +ffffffff832d0ec0 d smu_v13_0_7_clk_map +ffffffff832d1000 d yellow_carp_table_map +ffffffff832d1080 d yellow_carp_message_map +ffffffff832d1aa0 d yellow_carp_feature_mask_map +ffffffff832d2000 D pci_conf_lock +ffffffff832d2010 D pci_bus_dma_tag +ffffffff832d2088 D msi_pic +ffffffff832d2118 D msix_pic +ffffffff832d3000 D pchb_cd +ffffffff832d4000 D amas_cd +ffffffff832d5000 D cardslot_cd +ffffffff832d6000 D cardbus_cd +ffffffff832d7000 d csdevs +ffffffff832d8000 d ral_rt2560_opns +ffffffff832d8028 d ral_rt2661_opns +ffffffff832d8050 d ral_rt2860_opns +ffffffff832d9000 D pcmcia_cd +ffffffff832da000 D pcmcia_3cxem556_func0 +ffffffff832da0b8 D pcmcia_3cxem556_func0_cfe0 +ffffffff832da158 D pcmcia_megahertz_xjem1144_func0 +ffffffff832da210 D pcmcia_megahertz_xjem1144_func0_cfe0 +ffffffff832da2b0 d pcmcia_3cxem556_func1 +ffffffff832da368 d pcmcia_3cxem556_func1_cfe0 +ffffffff832da408 d pcmcia_megahertz_xjem1144_func1 +ffffffff832da4c0 d pcmcia_megahertz_xjem1144_func1_cfe0 +ffffffff832da560 d pcmcia_sierra_a555_func1 +ffffffff832da618 d pcmcia_sierra_a555_func1_cfe0 +ffffffff832da6b8 d pcmcia_sveclancard_func0 +ffffffff832da770 d pcmcia_sveclancard_func0_cfe0 +ffffffff832db000 D ep_pcmcia_prod +ffffffff832dc000 D aic_pcmcia_prod +ffffffff832dd000 D com_pcmcia_prod +ffffffff832de000 D wdc_pcmcia_pr +ffffffff832df000 D sm_pcmcia_prod +ffffffff832e0000 D xe_cd +ffffffff832e1000 D pcib_cd +ffffffff832e2000 D amdpcib_cd +ffffffff832e3000 D tcpcib_cd +ffffffff832e4000 D aapic_cd +ffffffff832e5000 D hme_cd +ffffffff832e6000 D isa_cd +ffffffff832e7000 D isadma_cd +ffffffff832e8000 D fdc_cd +ffffffff832e9000 D fd_types +ffffffff832e91f8 D fd_cd +ffffffff832ea000 D mpu_cd +ffffffff832eb000 D pcppi_cd +ffffffff832ec000 D spkr_cd +ffffffff832ed000 D wbsio_cd +ffffffff832ee000 D schsio_cd +ffffffff832ef000 D it_cd +ffffffff832f0000 D uguru_cd +ffffffff832f1000 D aps_cd +ffffffff832f2000 D isa_bus_dma_tag +ffffffff832f3000 D wsdisplay_cd +ffffffff832f3020 D wsdisplay_cons +ffffffff832f3058 D wsdisplay_defaultscreens +ffffffff832f4000 D wskbd_cd +ffffffff832f4020 D wskbd_default_bell_data +ffffffff832f4030 D wskbd_default_keyrepeat_data +ffffffff832f4040 D wskbd_srcops +ffffffff832f5000 d compose_tab +ffffffff832f6000 D wsmouse_cd +ffffffff832f6020 D wsmouse_srcops +ffffffff832f7000 D wsmux_srcops +ffffffff832f7030 D wsmux_tree_lock +ffffffff832f8000 D vt100_output +ffffffff832f9000 D pckbd_cd +ffffffff832fa000 D pms_cd +ffffffff832fa020 d synaptics_params +ffffffff832fa030 d alps_params +ffffffff832fb000 D skgpio_cd +ffffffff832fc000 D pctr_conf_lock +ffffffff832fd000 D ukbd_keymapdata +ffffffff832fe000 D usbrev_str +ffffffff832fe030 D usb_cd +ffffffff832ff000 d usbd_ratecheck.errinterval +ffffffff83300000 D uhub_cd +ffffffff83301000 D uaudio_cd +ffffffff83302000 D uvideo_ctrls +ffffffff833022d8 D uvideo_cd +ffffffff83303000 D utvfu_norm_params +ffffffff83303030 D utvfu_cd +ffffffff83304000 D udl_reg_vals_640x480_60 +ffffffff83304020 D udl_reg_vals_640x480_67 +ffffffff83304040 D udl_reg_vals_640x480_72 +ffffffff83304060 D udl_reg_vals_640x480_75 +ffffffff83304080 D udl_reg_vals_800x480_61 +ffffffff833040a0 D udl_reg_vals_800x600_56 +ffffffff833040c0 D udl_reg_vals_800x600_60 +ffffffff833040e0 D udl_reg_vals_800x600_72 +ffffffff83304100 D udl_reg_vals_800x600_74 +ffffffff83304120 D udl_reg_vals_800x600_75 +ffffffff83304140 D udl_reg_vals_1024x768_60 +ffffffff83304160 D udl_reg_vals_1024x768_70 +ffffffff83304180 D udl_reg_vals_1024x768_75 +ffffffff833041a0 D udl_reg_vals_1280x800_60 +ffffffff833041c0 D udl_reg_vals_1280x960_60 +ffffffff833041e0 D udl_reg_vals_1280x1024_60 +ffffffff83304200 D udl_reg_vals_1280x1024_75 +ffffffff83304220 D udl_reg_vals_1366x768_60 +ffffffff83304240 D udl_reg_vals_1440x900_60 +ffffffff83304260 D udl_reg_vals_1440x900_59 +ffffffff83304280 D udl_reg_vals_1440x900_75 +ffffffff833042a0 D udl_reg_vals_1680x1050_60 +ffffffff833042c0 D udl_reg_vals_1600x1200_60 +ffffffff833042e0 D udl_reg_vals_1920x1080_60 +ffffffff83304300 D udl_null_key_1 +ffffffff83304310 D udl_decomp_table +ffffffff83305510 D udl_cd +ffffffff83305530 D udl_stdscreen +ffffffff83305560 D udl_scrlist +ffffffff83305568 D udl_screenlist +ffffffff83305578 D udl_accessops +ffffffff83306000 D umidi_cd +ffffffff83307000 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE +ffffffff83307020 d umq_ROLAND_ROLAND_UM1_2 +ffffffff83307040 d umq_ROLAND_ROLAND_SC8850_2 +ffffffff83307060 d umq_ROLAND_ROLAND_SD90_2 +ffffffff83307080 d umq_ROLAND_ROLAND_UM880N_0 +ffffffff833070a0 d umq_ROLAND_ROLAND_UA100_2 +ffffffff833070c0 d umq_ROLAND_ROLAND_UM4_2 +ffffffff833070e0 d umq_ROLAND_ROLAND_U8_2 +ffffffff83307100 d umq_ROLAND_ROLAND_UM2_2 +ffffffff83307120 d umq_ROLAND_ROLAND_SC8820_2 +ffffffff83307140 d umq_ROLAND_ROLAND_PC300_2 +ffffffff83307160 d umq_ROLAND_ROLAND_SK500_2 +ffffffff83307180 d umq_ROLAND_ROLAND_SCD70_2 +ffffffff833071a0 d umq_ROLAND_ROLAND_UM550_0 +ffffffff833071c0 d umq_ROLAND_ROLAND_SD20_0 +ffffffff833071e0 d umq_ROLAND_ROLAND_SD80_0 +ffffffff83307200 d umq_ROLAND_ROLAND_UA700_3 +ffffffff83307220 d umq_ROLAND_ROLAND_UMONE_ANYIFACE +ffffffff83307240 D umidi_quirklist +ffffffff833074a0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_desc +ffffffff833074c0 d umq_YAMAHA_YAMAHA_UX256_ANYIFACE_fixed_ep_endpoints +ffffffff833074d0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_desc +ffffffff833074f0 d umq_ROLAND_ROLAND_UM1_2_fixed_ep_endpoints +ffffffff83307500 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_desc +ffffffff83307520 d umq_ROLAND_ROLAND_SC8850_2_fixed_ep_endpoints +ffffffff83307530 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_desc +ffffffff83307550 d umq_ROLAND_ROLAND_SD90_2_fixed_ep_endpoints +ffffffff83307560 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_desc +ffffffff83307580 d umq_ROLAND_ROLAND_UM880N_0_fixed_ep_endpoints +ffffffff83307590 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_desc +ffffffff833075b0 d umq_ROLAND_ROLAND_UA100_2_fixed_ep_endpoints +ffffffff833075c0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_desc +ffffffff833075e0 d umq_ROLAND_ROLAND_UM4_2_fixed_ep_endpoints +ffffffff833075f0 d umq_ROLAND_ROLAND_U8_2_fixed_ep_desc +ffffffff83307610 d umq_ROLAND_ROLAND_U8_2_fixed_ep_endpoints +ffffffff83307620 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_desc +ffffffff83307640 d umq_ROLAND_ROLAND_UM2_2_fixed_ep_endpoints +ffffffff83307650 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_desc +ffffffff83307670 d umq_ROLAND_ROLAND_SC8820_2_fixed_ep_endpoints +ffffffff83307680 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_desc +ffffffff833076a0 d umq_ROLAND_ROLAND_PC300_2_fixed_ep_endpoints +ffffffff833076b0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_desc +ffffffff833076d0 d umq_ROLAND_ROLAND_SK500_2_fixed_ep_endpoints +ffffffff833076e0 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_desc +ffffffff83307700 d umq_ROLAND_ROLAND_SCD70_2_fixed_ep_endpoints +ffffffff83307710 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_desc +ffffffff83307730 d umq_ROLAND_ROLAND_UM550_0_fixed_ep_endpoints +ffffffff83307740 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_desc +ffffffff83307760 d umq_ROLAND_ROLAND_SD20_0_fixed_ep_endpoints +ffffffff83307770 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_desc +ffffffff83307790 d umq_ROLAND_ROLAND_SD80_0_fixed_ep_endpoints +ffffffff833077a0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_desc +ffffffff833077c0 d umq_ROLAND_ROLAND_UA700_3_fixed_ep_endpoints +ffffffff833077d0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_desc +ffffffff833077f0 d umq_ROLAND_ROLAND_UMONE_ANYIFACE_fixed_ep_endpoints +ffffffff83308000 D ucom_cd +ffffffff83309000 D ugen_cd +ffffffff8330a000 D uhidev_cd +ffffffff8330a020 d uhidev_use_rdesc.reportbuf +ffffffff8330b000 D uhid_cd +ffffffff8330c000 D fido_cd +ffffffff8330d000 D ujoy_cd +ffffffff8330e000 D ukbd_cd +ffffffff8330f000 D ums_cd +ffffffff8330f020 d ums_fix_elecom_descriptor.match +ffffffff83310000 D umt_cd +ffffffff83311000 D def_scale +ffffffff83311020 D uts_cd +ffffffff83312000 D ubcmtp_cd +ffffffff83313000 D ucycom_cd +ffffffff83314000 D uslhcom_cd +ffffffff83315000 D ulpt_fwdevs +ffffffff83315060 D ulpt_cd +ffffffff83315080 D ulptusein +ffffffff83316000 D umass_cd +ffffffff83316020 d umass_bbb_transfer.dCBWtag +ffffffff83317000 D uthum_cd +ffffffff83318000 D ugold_cd +ffffffff83318020 d cmd_init +ffffffff83318028 d cmd_type +ffffffff83318030 d cmd_data +ffffffff83319000 D utrh_cd +ffffffff8331a000 D uoakrh_cd +ffffffff8331b000 D uoaklux_cd +ffffffff8331c000 D uoakv_cd +ffffffff8331d000 D uonerng_cd +ffffffff8331e000 D urng_cd +ffffffff8331f000 D udcf_cd +ffffffff83320000 D umbg_cd +ffffffff83321000 D uvisor_cd +ffffffff83322000 D udsbr_cd +ffffffff83323000 D utwitch_cd +ffffffff83324000 D aue_cd +ffffffff83325000 D axe_cd +ffffffff83326000 D axen_cd +ffffffff83327000 D smsc_cd +ffffffff83328000 D cue_devs +ffffffff83328010 D cue_cd +ffffffff83329000 D kue_cd +ffffffff8332a000 D cdce_cd +ffffffff8332b000 D urndis_cd +ffffffff8332c000 D mos_cd +ffffffff8332d000 D mue_cd +ffffffff8332e000 D udav_cd +ffffffff8332f000 D upl_devs +ffffffff8332f008 D upl_cd +ffffffff83330000 D ugl_devs +ffffffff83330008 D ugl_cd +ffffffff83331000 D url_cd +ffffffff83332000 D ure_cd +ffffffff83333000 D uaq_cd +ffffffff83334000 D umodem_cd +ffffffff83335000 D uftdi_cd +ffffffff83336000 D uplcom_cd +ffffffff83337000 D umct_cd +ffffffff83338000 D uvscom_cd +ffffffff83339000 D ubsa_cd +ffffffff8333a000 D ukspan_cd +ffffffff8333b000 D uslcom_cd +ffffffff8333c000 D uark_cd +ffffffff8333d000 D moscom_cd +ffffffff8333e000 D umcs_cd +ffffffff8333f000 D uscom_cd +ffffffff83340000 D ucrcom_cd +ffffffff83341000 D uxrcom_cd +ffffffff83342000 D uipaq_cd +ffffffff83343000 D umsm_cd +ffffffff83344000 D uchcom_cd +ffffffff83345000 D uticom_cd +ffffffff83346000 D wi_func_usb +ffffffff83346060 D wi_usb_cd +ffffffff83347000 D atu_cd +ffffffff83347020 D atu_devs +ffffffff83347270 D atu_radfirm +ffffffff83348000 D ural_cd +ffffffff83349000 D rum_cd +ffffffff8334a000 D run_cd +ffffffff8334a020 D rt3070_freqs +ffffffff8334b000 D mtw_cd +ffffffff8334c000 D zyd_cd +ffffffff8334d000 D upgt_cd +ffffffff8334e000 D urtw_cd +ffffffff8334f000 D urtwn_cd +ffffffff83350000 D rsu_cd +ffffffff83351000 D otus_cd +ffffffff83351020 d AR_PLCP_HDR_INTR +ffffffff83352000 D umb_xfer_tout +ffffffff83352010 D umb_uuid_basic_connect +ffffffff83352020 D umb_uuid_context_internet +ffffffff83352030 D umb_uuid_qmi_mbim +ffffffff83352040 D umb_cd +ffffffff83352060 D umb_delay +ffffffff83352070 D umb_qmi_alloc_cid +ffffffff83352080 D umb_qmi_fcc_auth +ffffffff83353000 D uath_cd +ffffffff83354000 D uow_cd +ffffffff83355000 D uberry_cd +ffffffff83356000 D upd_cd +ffffffff83356020 d upd_usage_roots +ffffffff833560a0 d upd_usage_batdep +ffffffff83357000 D uwacom_cd +ffffffff83357020 d uwacom_attach.reportbuf +ffffffff83358000 D bwfm_usb_bus_ops +ffffffff83359000 D umstc_cd +ffffffff8335a000 D uhidpp_cd +ffffffff8335b000 D ucc_cd +ffffffff8335c000 D iic_cd +ffffffff8335d000 D probe_addrs_sensor +ffffffff8335d008 D probe_addrs_eeprom +ffffffff8335e000 D lmtemp_cd +ffffffff8335f000 D lmn_worklist +ffffffff8335f240 D lmn_cd +ffffffff83360000 D lmenv_cd +ffffffff83361000 D maxtmp_cd +ffffffff83362000 D adc_cd +ffffffff83363000 D admtemp_cd +ffffffff83364000 D admlc_cd +ffffffff83365000 D admtm_cd +ffffffff83366000 D admtmp_cd +ffffffff83367000 D admtt_cd +ffffffff83368000 D maxds_cd +ffffffff83369000 D adt_chips +ffffffff83369160 D worklist +ffffffff833691a0 D adt_cd +ffffffff8336a000 D admcts_cd +ffffffff8336b000 D wbng_cd +ffffffff8336c000 D nvt_cd +ffffffff8336d000 D adl_worklist +ffffffff8336d138 D adl_cd +ffffffff8336e000 D andl_cd +ffffffff8336f000 D sdtemp_cd +ffffffff83370000 D lisa_cd +ffffffff83371000 D ihidev_cd +ffffffff83372000 D ikbd_cd +ffffffff83373000 D ims_cd +ffffffff83374000 D imt_cd +ffffffff83375000 D iatp_cd +ffffffff83376000 D bgw_cd +ffffffff83377000 D icc_cd +ffffffff83378000 D gpio_cd +ffffffff83379000 D acpi_cd +ffffffff83379020 D acpi_pcidevs +ffffffff83379030 D acpi_pcirootdevs +ffffffff83379040 D acpi_taskq +ffffffff83379050 d acpi_indicator.save_led_state +ffffffff83379060 d acpi_getprop.prop_guid +ffffffff83379070 d acpi_getpropint.prop_guid +ffffffff83379080 D acpi_skip_hids +ffffffff833790f0 D acpi_isa_hids +ffffffff8337a000 D aml_intlen +ffffffff8337a010 D aml_table +ffffffff8337aaf0 d osstring +ffffffff8337ab10 D aml_defobj +ffffffff8337aca0 D aml_valid_osi +ffffffff8337ad68 D acpi_max_osi +ffffffff8337ad70 D aml_regionspace +ffffffff8337c000 D acpitimer_cd +ffffffff8337c020 d acpi_timecounter +ffffffff8337d000 D acpiac_cd +ffffffff8337d020 D acpiac_hids +ffffffff8337e000 D acpibat_cd +ffffffff8337e020 D acpibat_hids +ffffffff8337f000 D acpibtn_cd +ffffffff8337f020 D acpibtn_hids +ffffffff83380000 D acpicmos_cd +ffffffff83380020 D acpicmos_hids +ffffffff83381000 D acpicpu_cd +ffffffff83381020 D acpicpu_hids +ffffffff83381030 d acpicpu_set_pdc.cpu_oscuuid +ffffffff83382000 D acpihpet_cd +ffffffff83382020 d hpet_timecounter +ffffffff83383000 D acpiec_cd +ffffffff83383020 D acpiec_hids +ffffffff83384000 D acpitz_cd +ffffffff83384020 D acpitz_perflevel +ffffffff83385000 D acpimadt_cd +ffffffff83386000 D acpimcfg_cd +ffffffff83387000 D acpiprt_map_list +ffffffff83387010 D acpiprt_cd +ffffffff83387030 D acpiprt_pri +ffffffff83388000 D acpidmar_force_cm +ffffffff83388008 D acpidmar_cd +ffffffff83388030 D vtd_faults +ffffffff83389000 D acpidock_cd +ffffffff8338a000 D abl_cd +ffffffff8338a020 D abl_hids +ffffffff8338b000 D asmc_cd +ffffffff8338b020 D asmc_hids +ffffffff8338c000 D acpiasus_cd +ffffffff8338c020 D acpiasus_hids +ffffffff8338d000 D acpithinkpad_cd +ffffffff8338d020 D acpithinkpad_hids +ffffffff8338e000 D acpitoshiba_cd +ffffffff8338e020 D acpitoshiba_hids +ffffffff8338f000 D acpisony_cd +ffffffff83390000 D acpivideo_cd +ffffffff83391000 D acpivout_cd +ffffffff83392000 D acpipwrres_cd +ffffffff83393000 D aibs_cd +ffffffff83393020 d aibs_hids +ffffffff83394000 D aplgpio_cd +ffffffff83394020 D aplgpio_hids +ffffffff83395000 D bytgpio_cd +ffffffff83395020 D bytgpio_hids +ffffffff83396000 D chvgpio_cd +ffffffff83396020 D chvgpio_hids +ffffffff83397000 D glkgpio_cd +ffffffff83397020 D glkgpio_hids +ffffffff83398000 D pchgpio_cd +ffffffff83398020 D pchgpio_hids +ffffffff83398070 D pchgpio_devices +ffffffff83399000 D tipmic_cd +ffffffff83399020 D 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