--- 7.0/2021-10-14T17:46:11Z/2021-09-27T00:00:00Z/nm-bsd-ot14.txt	Fri Oct 15 06:53:40 2021
+++ 7.0/2021-10-14T17:46:11Z/2021-09-28T00:00:00Z/nm-bsd-ot14.txt	Fri Oct 15 08:49:14 2021
@@ -18118,14 +18118,16 @@ ffffffff818fb000 T drm_getmagic
 ffffffff818fb0c0 T drm_authmagic
 ffffffff818fb170 T drm_master_create
 ffffffff818fb210 T drm_setmaster_ioctl
-ffffffff818fb3c0 T drm_is_current_master
-ffffffff818fb3f0 T drm_dropmaster_ioctl
-ffffffff818fb530 T drm_master_open
-ffffffff818fb700 T drm_master_get
-ffffffff818fb730 T drm_master_release
-ffffffff818fb880 T drm_master_put
-ffffffff818fb910 T drm_master_internal_acquire
-ffffffff818fb970 T drm_master_internal_release
+ffffffff818fb2d0 T drm_is_current_master
+ffffffff818fb300 t drm_new_set_master
+ffffffff818fb490 T drm_dropmaster_ioctl
+ffffffff818fb5d0 T drm_master_open
+ffffffff818fb680 T drm_master_get
+ffffffff818fb6b0 T drm_master_release
+ffffffff818fb800 T drm_master_put
+ffffffff818fb890 T drm_file_get_master
+ffffffff818fb8f0 T drm_master_internal_acquire
+ffffffff818fb950 T drm_master_internal_release
 ffffffff818fc000 T drm_plane_create_alpha_property
 ffffffff818fc0a0 T drm_plane_create_rotation_property
 ffffffff818fc1d0 T drm_rotation_simplify
@@ -18575,41 +18577,41 @@ ffffffff81933030 T drm_unref
 ffffffff81933090 T drm_fault
 ffffffff81933240 T drm_flush
 ffffffff81933270 T udv_attach_drm
-ffffffff819334c0 T drm_gem_init
-ffffffff81933570 t drm_gem_init_release
-ffffffff81933590 T drm_gem_object_init
-ffffffff819336c0 T drm_gem_private_object_init
-ffffffff81933770 T drm_gem_handle_delete
-ffffffff81933820 t drm_gem_object_release_handle
-ffffffff819338d0 T drm_gem_dumb_map_offset
-ffffffff819339e0 T drm_gem_object_lookup
-ffffffff81933a50 T drm_gem_create_mmap_offset
-ffffffff81933a80 T drm_gem_dumb_destroy
-ffffffff81933a90 T drm_gem_handle_create_tail
-ffffffff81933c30 t drm_gem_object_handle_put_unlocked
-ffffffff81933d60 T drm_gem_handle_create
-ffffffff81933da0 T drm_gem_free_mmap_offset
-ffffffff81933dc0 T drm_gem_create_mmap_offset_size
-ffffffff81933df0 T drm_gem_get_pages
-ffffffff81933e40 T drm_gem_put_pages
-ffffffff81933e60 T drm_gem_objects_lookup
-ffffffff81933ff0 T drm_gem_dma_resv_wait
-ffffffff81934110 T drm_gem_close_ioctl
-ffffffff81934160 T drm_gem_flink_ioctl
-ffffffff819342b0 T drm_gem_open_ioctl
-ffffffff819343c0 T drm_gem_open
-ffffffff819343f0 T drm_gem_release
-ffffffff81934420 T drm_gem_object_release
-ffffffff819344a0 T drm_gem_object_free
-ffffffff81934500 T drm_gem_object_put_locked
-ffffffff819345c0 T drm_gem_print_info
-ffffffff819346e0 T drm_gem_pin
-ffffffff81934740 T drm_gem_unpin
-ffffffff819347a0 T drm_gem_vmap
-ffffffff81934820 T drm_gem_vunmap
-ffffffff81934880 T drm_gem_lock_reservations
-ffffffff81934ae0 T drm_gem_unlock_reservations
-ffffffff81934be0 t __ww_mutex_lock
+ffffffff819334d0 T drm_gem_init
+ffffffff81933580 t drm_gem_init_release
+ffffffff819335a0 T drm_gem_object_init
+ffffffff819336d0 T drm_gem_private_object_init
+ffffffff81933780 T drm_gem_handle_delete
+ffffffff81933830 t drm_gem_object_release_handle
+ffffffff819338e0 T drm_gem_dumb_map_offset
+ffffffff819339f0 T drm_gem_object_lookup
+ffffffff81933a60 T drm_gem_create_mmap_offset
+ffffffff81933a90 T drm_gem_dumb_destroy
+ffffffff81933aa0 T drm_gem_handle_create_tail
+ffffffff81933c40 t drm_gem_object_handle_put_unlocked
+ffffffff81933d70 T drm_gem_handle_create
+ffffffff81933db0 T drm_gem_free_mmap_offset
+ffffffff81933dd0 T drm_gem_create_mmap_offset_size
+ffffffff81933e00 T drm_gem_get_pages
+ffffffff81933e50 T drm_gem_put_pages
+ffffffff81933e70 T drm_gem_objects_lookup
+ffffffff81934000 T drm_gem_dma_resv_wait
+ffffffff81934120 T drm_gem_close_ioctl
+ffffffff81934170 T drm_gem_flink_ioctl
+ffffffff819342c0 T drm_gem_open_ioctl
+ffffffff819343d0 T drm_gem_open
+ffffffff81934400 T drm_gem_release
+ffffffff81934430 T drm_gem_object_release
+ffffffff819344b0 T drm_gem_object_free
+ffffffff81934510 T drm_gem_object_put_locked
+ffffffff819345d0 T drm_gem_print_info
+ffffffff819346f0 T drm_gem_pin
+ffffffff81934750 T drm_gem_unpin
+ffffffff819347b0 T drm_gem_vmap
+ffffffff81934830 T drm_gem_vunmap
+ffffffff81934890 T drm_gem_lock_reservations
+ffffffff81934af0 T drm_gem_unlock_reservations
+ffffffff81934bf0 t __ww_mutex_lock
 ffffffff81935000 T drm_gem_fb_destroy
 ffffffff819350c0 T drm_gem_fb_create_handle
 ffffffff81936000 T drm_ht_create
@@ -20847,23 +20849,23 @@ ffffffff81a5d1b0 T i915_gem_context_getparam_ioctl
 ffffffff81a5d700 T i915_gem_context_setparam_ioctl
 ffffffff81a5d7e0 t ctx_setparam
 ffffffff81a5ea00 T i915_gem_context_reset_stats_ioctl
-ffffffff81a5eab0 T i915_gem_engines_iter_next
-ffffffff81a5eb00 T i915_global_gem_context_init
-ffffffff81a5eb60 t contexts_free_worker
-ffffffff81a5eb70 t default_engines
-ffffffff81a5ed90 t engines_notify
-ffffffff81a5ef00 t __set_ppgtt
-ffffffff81a5eff0 t engines_idle_release
-ffffffff81a5f110 t lut_close
-ffffffff81a5f2b0 t kill_engines
-ffffffff81a5f500 t create_setparam
-ffffffff81a5f570 t create_clone
-ffffffff81a5f5c0 t set_ppgtt_barrier
-ffffffff81a5f630 t cb_retire
-ffffffff81a5f680 t set_engines__load_balance
-ffffffff81a5fa10 t set_engines__bond
-ffffffff81a5fd40 t i915_global_gem_context_shrink
-ffffffff81a5fd60 t i915_global_gem_context_exit
+ffffffff81a5eac0 T i915_gem_engines_iter_next
+ffffffff81a5eb10 T i915_global_gem_context_init
+ffffffff81a5eb70 t contexts_free_worker
+ffffffff81a5eb80 t default_engines
+ffffffff81a5eda0 t engines_notify
+ffffffff81a5ef10 t __set_ppgtt
+ffffffff81a5f000 t engines_idle_release
+ffffffff81a5f120 t lut_close
+ffffffff81a5f2c0 t kill_engines
+ffffffff81a5f510 t create_setparam
+ffffffff81a5f580 t create_clone
+ffffffff81a5f5d0 t set_ppgtt_barrier
+ffffffff81a5f640 t cb_retire
+ffffffff81a5f690 t set_engines__load_balance
+ffffffff81a5fa20 t set_engines__bond
+ffffffff81a5fd50 t i915_global_gem_context_shrink
+ffffffff81a5fd70 t i915_global_gem_context_exit
 ffffffff81a60000 T i915_gem_prime_export
 ffffffff81a60090 T i915_gem_prime_import
 ffffffff81a61000 T i915_gem_object_flush_if_display
@@ -20881,18 +20883,18 @@ ffffffff81a62020 T i915_gem_object_prepare_write
 ffffffff81a621c0 t __ww_mutex_lock
 ffffffff81a63000 T i915_gem_execbuffer_ioctl
 ffffffff81a63370 t i915_gem_do_execbuffer
-ffffffff81a64b00 T i915_gem_execbuffer2_ioctl
-ffffffff81a64d90 t eb_release_vmas
-ffffffff81a64ee0 t parse_timeline_fences
-ffffffff81a652b0 t eb_pin_engine
-ffffffff81a65460 t eb_validate_vmas
-ffffffff81a65c40 t eb_relocate_vma
-ffffffff81a65e80 t eb_parse
-ffffffff81a66260 t eb_relocate_parse_slow
-ffffffff81a66a70 t __ww_mutex_lock
-ffffffff81a66c00 t eb_relocate_entry
-ffffffff81a679a0 t reloc_cache_reset
-ffffffff81a67ac0 t reloc_gpu_flush
+ffffffff81a64b10 T i915_gem_execbuffer2_ioctl
+ffffffff81a64da0 t eb_release_vmas
+ffffffff81a64ef0 t parse_timeline_fences
+ffffffff81a652c0 t eb_pin_engine
+ffffffff81a65470 t eb_validate_vmas
+ffffffff81a65c50 t eb_relocate_vma
+ffffffff81a65e90 t eb_parse
+ffffffff81a66270 t eb_relocate_parse_slow
+ffffffff81a66a80 t __ww_mutex_lock
+ffffffff81a66c10 t eb_relocate_entry
+ffffffff81a679b0 t reloc_cache_reset
+ffffffff81a67ad0 t reloc_gpu_flush
 ffffffff81a68000 T i915_gem_object_lock_fence
 ffffffff81a680f0 t stub_notify
 ffffffff81a68140 t stub_release
@@ -21768,12 +21770,12 @@ ffffffff81ae1280 T i915_gem_cleanup_early
 ffffffff81ae1330 T i915_gem_freeze
 ffffffff81ae1370 T i915_gem_freeze_late
 ffffffff81ae1610 T i915_gem_open
-ffffffff81ae16d0 T i915_gem_ww_ctx_init
-ffffffff81ae1730 T i915_gem_ww_unlock_single
-ffffffff81ae1800 T i915_gem_ww_ctx_fini
-ffffffff81ae1860 t i915_gem_ww_ctx_unlock_all
-ffffffff81ae1970 T i915_gem_ww_ctx_backoff
-ffffffff81ae1bb0 t __i915_gem_object_lock
+ffffffff81ae16e0 T i915_gem_ww_ctx_init
+ffffffff81ae1740 T i915_gem_ww_unlock_single
+ffffffff81ae1810 T i915_gem_ww_ctx_fini
+ffffffff81ae1870 t i915_gem_ww_ctx_unlock_all
+ffffffff81ae1980 T i915_gem_ww_ctx_backoff
+ffffffff81ae1bc0 t __i915_gem_object_lock
 ffffffff81ae2000 T i915_gem_evict_something
 ffffffff81ae2340 T i915_gem_evict_for_node
 ffffffff81ae2500 T i915_gem_evict_vm
@@ -24405,31 +24407,31 @@ ffffffff81c8c0f0 t amdgpu_connector_lvds_get_modes
 ffffffff81c8c230 t amdgpu_connector_lvds_mode_valid
 ffffffff81c8d000 T amdgpu_cs_report_moved_bytes
 ffffffff81c8d070 T amdgpu_cs_ioctl
-ffffffff81c8edc0 T amdgpu_cs_wait_ioctl
-ffffffff81c8ef00 T amdgpu_cs_fence_to_handle_ioctl
-ffffffff81c8f050 t amdgpu_cs_get_fence
-ffffffff81c8f100 T amdgpu_cs_wait_fences_ioctl
-ffffffff81c8f400 T amdgpu_cs_find_mapping
-ffffffff81c8f500 t amdgpu_cs_validate
-ffffffff81c8f580 t amdgpu_cs_list_validate
-ffffffff81c8f6d0 t amdgpu_cs_bo_validate
+ffffffff81c8edd0 T amdgpu_cs_wait_ioctl
+ffffffff81c8ef10 T amdgpu_cs_fence_to_handle_ioctl
+ffffffff81c8f060 t amdgpu_cs_get_fence
+ffffffff81c8f110 T amdgpu_cs_wait_fences_ioctl
+ffffffff81c8f410 T amdgpu_cs_find_mapping
+ffffffff81c8f510 t amdgpu_cs_validate
+ffffffff81c8f590 t amdgpu_cs_list_validate
+ffffffff81c8f6e0 t amdgpu_cs_bo_validate
 ffffffff81c90000 T amdgpu_csa_vaddr
 ffffffff81c90050 T amdgpu_allocate_static_csa
 ffffffff81c900f0 T amdgpu_free_static_csa
 ffffffff81c90100 T amdgpu_map_static_csa
 ffffffff81c91000 T amdgpu_ctx_get_entity
 ffffffff81c91230 T amdgpu_ctx_ioctl
-ffffffff81c918a0 T amdgpu_ctx_get
-ffffffff81c91920 T amdgpu_ctx_put
-ffffffff81c91c60 T amdgpu_ctx_add_fence
-ffffffff81c91d40 T amdgpu_ctx_get_fence
-ffffffff81c91df0 T amdgpu_ctx_priority_override
-ffffffff81c91f10 T amdgpu_ctx_wait_prev_fence
-ffffffff81c91fc0 T amdgpu_ctx_mgr_init
-ffffffff81c92000 T amdgpu_ctx_mgr_entity_flush
-ffffffff81c921f0 T amdgpu_ctx_mgr_entity_fini
-ffffffff81c923b0 T amdgpu_ctx_mgr_fini
-ffffffff81c92460 t amdgpu_ctx_fini
+ffffffff81c918b0 T amdgpu_ctx_get
+ffffffff81c91930 T amdgpu_ctx_put
+ffffffff81c91c70 T amdgpu_ctx_add_fence
+ffffffff81c91d50 T amdgpu_ctx_get_fence
+ffffffff81c91e00 T amdgpu_ctx_priority_override
+ffffffff81c91f20 T amdgpu_ctx_wait_prev_fence
+ffffffff81c91fd0 T amdgpu_ctx_mgr_init
+ffffffff81c92010 T amdgpu_ctx_mgr_entity_flush
+ffffffff81c92200 T amdgpu_ctx_mgr_entity_fini
+ffffffff81c923c0 T amdgpu_ctx_mgr_fini
+ffffffff81c92470 t amdgpu_ctx_fini
 ffffffff81c93000 T amdgpu_debugfs_add_files
 ffffffff81c930c0 T amdgpu_debugfs_wait_dump
 ffffffff81c930f0 T amdgpu_debugfs_init
@@ -24600,9 +24602,9 @@ ffffffff81ca5b20 T amdgpu_gem_wait_idle_ioctl
 ffffffff81ca5c90 T amdgpu_gem_metadata_ioctl
 ffffffff81ca5dd0 T amdgpu_gem_va_map_flags
 ffffffff81ca5e40 T amdgpu_gem_va_ioctl
-ffffffff81ca6220 T amdgpu_gem_op_ioctl
-ffffffff81ca6400 T amdgpu_mode_dumb_create
-ffffffff81ca6550 T amdgpu_debugfs_gem_init
+ffffffff81ca6230 T amdgpu_gem_op_ioctl
+ffffffff81ca6410 T amdgpu_mode_dumb_create
+ffffffff81ca6560 T amdgpu_debugfs_gem_init
 ffffffff81ca7000 T amdgpu_gfx_mec_queue_to_bit
 ffffffff81ca7040 T amdgpu_queue_mask_bit_to_mec_queue
 ffffffff81ca70a0 T amdgpu_gfx_is_mec_queue_enabled
@@ -25629,96 +25631,96 @@ ffffffff81d2a000 T gfx_v9_0_select_se_sh
 ffffffff81d2a0b0 T gfx_v9_0_rlc_stop
 ffffffff81d2a3d0 t gfx_v9_0_early_init
 ffffffff81d2a630 t gfx_v9_0_late_init
-ffffffff81d2b250 t gfx_v9_0_sw_init
-ffffffff81d2ca90 t gfx_v9_0_sw_fini
-ffffffff81d2cd30 t gfx_v9_0_hw_init
-ffffffff81d2f3a0 t gfx_v9_0_hw_fini
-ffffffff81d2ff60 t gfx_v9_0_suspend
-ffffffff81d2ffa0 t gfx_v9_0_resume
-ffffffff81d2ffb0 t gfx_v9_0_is_idle
-ffffffff81d30000 t gfx_v9_0_wait_for_idle
-ffffffff81d30090 t gfx_v9_0_soft_reset
-ffffffff81d30200 t gfx_v9_0_set_clockgating_state
-ffffffff81d30560 t gfx_v9_0_set_powergating_state
-ffffffff81d30950 t gfx_v9_0_get_clockgating_state
-ffffffff81d30a60 t gfx_v9_0_kiq_set_resources
-ffffffff81d30d90 t gfx_v9_0_kiq_map_queues
-ffffffff81d310f0 t gfx_v9_0_kiq_unmap_queues
-ffffffff81d31480 t gfx_v9_0_kiq_query_status
-ffffffff81d31780 t gfx_v9_0_kiq_invalidate_tlbs
-ffffffff81d318a0 t gfx_v9_0_ring_get_rptr_compute
-ffffffff81d318e0 t gfx_v9_0_ring_get_wptr_compute
-ffffffff81d31950 t gfx_v9_0_ring_set_wptr_compute
-ffffffff81d319b0 t gfx_v9_0_ring_emit_fence_kiq
-ffffffff81d31de0 t gfx_v9_0_ring_test_ring
-ffffffff81d32010 t gfx_v9_0_ring_emit_rreg
-ffffffff81d322a0 t gfx_v9_0_ring_emit_wreg
-ffffffff81d324d0 t gfx_v9_0_ring_emit_reg_wait
-ffffffff81d32520 t gfx_v9_0_ring_emit_reg_write_reg_wait
-ffffffff81d325c0 t gfx_v9_0_wait_reg_mem
-ffffffff81d328f0 t gfx_v9_0_ring_get_rptr_gfx
-ffffffff81d32930 t gfx_v9_0_ring_get_wptr_gfx
-ffffffff81d329c0 t gfx_v9_0_ring_set_wptr_gfx
-ffffffff81d32a50 t gfx_v9_0_ring_emit_ib_gfx
-ffffffff81d32f80 t gfx_v9_0_ring_emit_fence
-ffffffff81d33340 t gfx_v9_0_ring_emit_pipeline_sync
-ffffffff81d333a0 t gfx_v9_0_ring_emit_vm_flush
-ffffffff81d334b0 t gfx_v9_0_ring_emit_hdp_flush
-ffffffff81d33580 t gfx_v9_0_ring_emit_gds_switch
-ffffffff81d33660 t gfx_v9_0_ring_test_ib
-ffffffff81d33810 t gfx_v9_0_ring_emit_init_cond_exec
-ffffffff81d33a40 t gfx_v9_0_ring_emit_patch_cond_exec
-ffffffff81d33af0 t gfx_v9_ring_emit_sb
-ffffffff81d33bd0 t gfx_v9_ring_emit_cntxcntl
-ffffffff81d33fc0 t gfx_v9_0_ring_emit_frame_cntl
-ffffffff81d340d0 t gfx_v9_0_ring_soft_recovery
-ffffffff81d34100 t gfx_v9_0_emit_mem_sync
-ffffffff81d343c0 t gfx_v9_0_write_data_to_reg
-ffffffff81d345d0 t gfx_v9_0_ring_emit_ib_compute
-ffffffff81d34900 t gfx_v9_0_set_eop_interrupt_state
-ffffffff81d34a90 t gfx_v9_0_eop_irq
-ffffffff81d34ba0 t gfx_v9_0_set_priv_reg_fault_state
-ffffffff81d34c30 t gfx_v9_0_priv_reg_irq
-ffffffff81d34d30 t gfx_v9_0_set_priv_inst_fault_state
-ffffffff81d34dc0 t gfx_v9_0_priv_inst_irq
-ffffffff81d34ec0 t gfx_v9_0_set_cp_ecc_error_state
-ffffffff81d350f0 t gfx_v9_0_is_rlc_enabled
-ffffffff81d35140 t gfx_v9_0_set_safe_mode
-ffffffff81d351f0 t gfx_v9_0_unset_safe_mode
-ffffffff81d35220 t gfx_v9_0_rlc_init
-ffffffff81d35550 t gfx_v9_0_get_csb_size
-ffffffff81d355a0 t gfx_v9_0_get_csb_buffer
-ffffffff81d356f0 t gfx_v9_0_cp_jump_table_num
-ffffffff81d35720 t gfx_v9_0_rlc_resume
-ffffffff81d361e0 t gfx_v9_0_rlc_reset
-ffffffff81d36270 t gfx_v9_0_rlc_start
-ffffffff81d36350 t gfx_v9_0_update_spm_vmid
-ffffffff81d363c0 t gfx_v9_0_rlcg_wreg
-ffffffff81d36570 t gfx_v9_0_is_rlcg_access_range
-ffffffff81d365c0 t gfx_v9_0_init_always_on_cu_mask
-ffffffff81d367e0 t gfx_v9_0_init_csb
-ffffffff81d36b40 t amdgpu_bo_unreserve
-ffffffff81d36c10 t gfx_v9_0_get_gpu_clock_counter
-ffffffff81d37120 t gfx_v9_0_read_wave_data
-ffffffff81d37340 t gfx_v9_0_read_wave_vgprs
-ffffffff81d37360 t gfx_v9_0_read_wave_sgprs
-ffffffff81d373b0 t gfx_v9_0_select_me_pipe_q
-ffffffff81d373d0 t gfx_v9_0_ras_error_inject
-ffffffff81d37580 t gfx_v9_0_query_ras_error_count
-ffffffff81d37be0 t gfx_v9_0_reset_ras_error_count
-ffffffff81d38150 t wave_read_ind
-ffffffff81d382a0 t wave_read_regs
-ffffffff81d38460 t gfx_v9_0_cp_gfx_enable
-ffffffff81d385a0 t gfx_v9_0_cp_compute_enable
-ffffffff81d38780 t amdgpu_bo_reserve
-ffffffff81d38900 t gfx_v9_0_kiq_init_register
-ffffffff81d3a250 t gfx_v9_0_mqd_init
-ffffffff81d3a5f0 t gfx_v9_0_update_medium_grain_clock_gating
+ffffffff81d2b260 t gfx_v9_0_sw_init
+ffffffff81d2caa0 t gfx_v9_0_sw_fini
+ffffffff81d2cd40 t gfx_v9_0_hw_init
+ffffffff81d2f3b0 t gfx_v9_0_hw_fini
+ffffffff81d2ff70 t gfx_v9_0_suspend
+ffffffff81d2ffb0 t gfx_v9_0_resume
+ffffffff81d2ffc0 t gfx_v9_0_is_idle
+ffffffff81d30010 t gfx_v9_0_wait_for_idle
+ffffffff81d300a0 t gfx_v9_0_soft_reset
+ffffffff81d30210 t gfx_v9_0_set_clockgating_state
+ffffffff81d30570 t gfx_v9_0_set_powergating_state
+ffffffff81d30960 t gfx_v9_0_get_clockgating_state
+ffffffff81d30a70 t gfx_v9_0_kiq_set_resources
+ffffffff81d30da0 t gfx_v9_0_kiq_map_queues
+ffffffff81d31100 t gfx_v9_0_kiq_unmap_queues
+ffffffff81d31490 t gfx_v9_0_kiq_query_status
+ffffffff81d31790 t gfx_v9_0_kiq_invalidate_tlbs
+ffffffff81d318b0 t gfx_v9_0_ring_get_rptr_compute
+ffffffff81d318f0 t gfx_v9_0_ring_get_wptr_compute
+ffffffff81d31960 t gfx_v9_0_ring_set_wptr_compute
+ffffffff81d319c0 t gfx_v9_0_ring_emit_fence_kiq
+ffffffff81d31df0 t gfx_v9_0_ring_test_ring
+ffffffff81d32020 t gfx_v9_0_ring_emit_rreg
+ffffffff81d322b0 t gfx_v9_0_ring_emit_wreg
+ffffffff81d324e0 t gfx_v9_0_ring_emit_reg_wait
+ffffffff81d32530 t gfx_v9_0_ring_emit_reg_write_reg_wait
+ffffffff81d325d0 t gfx_v9_0_wait_reg_mem
+ffffffff81d32900 t gfx_v9_0_ring_get_rptr_gfx
+ffffffff81d32940 t gfx_v9_0_ring_get_wptr_gfx
+ffffffff81d329d0 t gfx_v9_0_ring_set_wptr_gfx
+ffffffff81d32a60 t gfx_v9_0_ring_emit_ib_gfx
+ffffffff81d32f90 t gfx_v9_0_ring_emit_fence
+ffffffff81d33350 t gfx_v9_0_ring_emit_pipeline_sync
+ffffffff81d333b0 t gfx_v9_0_ring_emit_vm_flush
+ffffffff81d334c0 t gfx_v9_0_ring_emit_hdp_flush
+ffffffff81d33590 t gfx_v9_0_ring_emit_gds_switch
+ffffffff81d33670 t gfx_v9_0_ring_test_ib
+ffffffff81d33820 t gfx_v9_0_ring_emit_init_cond_exec
+ffffffff81d33a50 t gfx_v9_0_ring_emit_patch_cond_exec
+ffffffff81d33b00 t gfx_v9_ring_emit_sb
+ffffffff81d33be0 t gfx_v9_ring_emit_cntxcntl
+ffffffff81d33fd0 t gfx_v9_0_ring_emit_frame_cntl
+ffffffff81d340e0 t gfx_v9_0_ring_soft_recovery
+ffffffff81d34110 t gfx_v9_0_emit_mem_sync
+ffffffff81d343d0 t gfx_v9_0_write_data_to_reg
+ffffffff81d345e0 t gfx_v9_0_ring_emit_ib_compute
+ffffffff81d34910 t gfx_v9_0_set_eop_interrupt_state
+ffffffff81d34aa0 t gfx_v9_0_eop_irq
+ffffffff81d34bb0 t gfx_v9_0_set_priv_reg_fault_state
+ffffffff81d34c40 t gfx_v9_0_priv_reg_irq
+ffffffff81d34d40 t gfx_v9_0_set_priv_inst_fault_state
+ffffffff81d34dd0 t gfx_v9_0_priv_inst_irq
+ffffffff81d34ed0 t gfx_v9_0_set_cp_ecc_error_state
+ffffffff81d35100 t gfx_v9_0_is_rlc_enabled
+ffffffff81d35150 t gfx_v9_0_set_safe_mode
+ffffffff81d35200 t gfx_v9_0_unset_safe_mode
+ffffffff81d35230 t gfx_v9_0_rlc_init
+ffffffff81d35560 t gfx_v9_0_get_csb_size
+ffffffff81d355b0 t gfx_v9_0_get_csb_buffer
+ffffffff81d35700 t gfx_v9_0_cp_jump_table_num
+ffffffff81d35730 t gfx_v9_0_rlc_resume
+ffffffff81d361f0 t gfx_v9_0_rlc_reset
+ffffffff81d36280 t gfx_v9_0_rlc_start
+ffffffff81d36360 t gfx_v9_0_update_spm_vmid
+ffffffff81d363d0 t gfx_v9_0_rlcg_wreg
+ffffffff81d36580 t gfx_v9_0_is_rlcg_access_range
+ffffffff81d365d0 t gfx_v9_0_init_always_on_cu_mask
+ffffffff81d367f0 t gfx_v9_0_init_csb
+ffffffff81d36b50 t amdgpu_bo_unreserve
+ffffffff81d36c20 t gfx_v9_0_get_gpu_clock_counter
+ffffffff81d37130 t gfx_v9_0_read_wave_data
+ffffffff81d37350 t gfx_v9_0_read_wave_vgprs
+ffffffff81d37370 t gfx_v9_0_read_wave_sgprs
+ffffffff81d373c0 t gfx_v9_0_select_me_pipe_q
+ffffffff81d373e0 t gfx_v9_0_ras_error_inject
+ffffffff81d37590 t gfx_v9_0_query_ras_error_count
+ffffffff81d37bf0 t gfx_v9_0_reset_ras_error_count
+ffffffff81d38160 t wave_read_ind
+ffffffff81d382b0 t wave_read_regs
+ffffffff81d38470 t gfx_v9_0_cp_gfx_enable
+ffffffff81d385b0 t gfx_v9_0_cp_compute_enable
+ffffffff81d38790 t amdgpu_bo_reserve
+ffffffff81d38910 t gfx_v9_0_kiq_init_register
+ffffffff81d3a260 t gfx_v9_0_mqd_init
+ffffffff81d3a600 t gfx_v9_0_update_medium_grain_clock_gating
 ffffffff81d3b000 T gfx_v9_4_query_ras_error_count
 ffffffff81d3b750 t gfx_v9_4_select_se_sh
 ffffffff81d3b800 T gfx_v9_4_reset_ras_error_count
-ffffffff81d3bd00 T gfx_v9_4_ras_error_inject
-ffffffff81d3be50 T gfx_v9_4_query_ras_error_status
+ffffffff81d3bd10 T gfx_v9_4_ras_error_inject
+ffffffff81d3be60 T gfx_v9_4_query_ras_error_status
 ffffffff81d3c000 T gfxhub_v1_0_get_mc_fb_offset
 ffffffff81d3c050 T gfxhub_v1_0_setup_vm_pt_regs
 ffffffff81d3c0d0 T gfxhub_v1_0_gart_enable
@@ -26442,56 +26444,56 @@ ffffffff81d8cb20 t trylock_bus
 ffffffff81d8cb70 t unlock_bus
 ffffffff81d8d000 T soc15_grbm_select
 ffffffff81d8d090 T soc15_program_register_sequence
-ffffffff81d8d280 T soc15_set_virt_ops
-ffffffff81d8d2a0 t soc15_reg_base_init
-ffffffff81d8d360 T soc15_set_ip_blocks
-ffffffff81d8d890 t soc15_common_early_init
-ffffffff81d8dbd0 t soc15_common_late_init
-ffffffff81d8dc50 t soc15_common_sw_init
-ffffffff81d8dcb0 t soc15_common_sw_fini
-ffffffff81d8dd00 t soc15_common_hw_init
-ffffffff81d8de20 t soc15_common_hw_fini
-ffffffff81d8df00 t soc15_common_suspend
-ffffffff81d8df40 t soc15_common_resume
-ffffffff81d8df80 t soc15_common_is_idle
-ffffffff81d8dfb0 t soc15_common_wait_for_idle
-ffffffff81d8dfe0 t soc15_common_soft_reset
-ffffffff81d8e010 t soc15_common_set_clockgating_state
-ffffffff81d8e3c0 t soc15_common_set_powergating_state
-ffffffff81d8e3f0 t soc15_common_get_clockgating_state
-ffffffff81d8e4d0 t soc15_pcie_rreg
-ffffffff81d8e530 t soc15_pcie_wreg
-ffffffff81d8e590 t soc15_pcie_rreg64
-ffffffff81d8e5f0 t soc15_pcie_wreg64
-ffffffff81d8e650 t soc15_uvd_ctx_rreg
-ffffffff81d8e6f0 t soc15_uvd_ctx_wreg
-ffffffff81d8e770 t soc15_didt_rreg
-ffffffff81d8e800 t soc15_didt_wreg
-ffffffff81d8e880 t soc15_gc_cac_rreg
-ffffffff81d8e910 t soc15_gc_cac_wreg
-ffffffff81d8e990 t soc15_se_cac_rreg
-ffffffff81d8ea20 t soc15_se_cac_wreg
-ffffffff81d8eaa0 t soc15_read_disabled_bios
-ffffffff81d8ead0 t soc15_read_bios_from_rom
-ffffffff81d8ebc0 t soc15_read_register
-ffffffff81d8ecc0 t soc15_vga_set_state
-ffffffff81d8ecf0 t soc15_asic_reset
-ffffffff81d8eea0 t soc15_asic_reset_method
-ffffffff81d8efc0 t soc15_get_xclk
-ffffffff81d8f010 t soc15_set_uvd_clocks
-ffffffff81d8f040 t soc15_set_vce_clocks
-ffffffff81d8f070 t soc15_get_config_memsize
-ffffffff81d8f090 t soc15_flush_hdp
-ffffffff81d8f0b0 t soc15_invalidate_hdp
-ffffffff81d8f110 t soc15_need_full_reset
-ffffffff81d8f140 t soc15_get_pcie_usage
-ffffffff81d8f270 t soc15_need_reset_on_init
-ffffffff81d8f2d0 t soc15_get_pcie_replay_count
-ffffffff81d8f340 t soc15_supports_baco
-ffffffff81d8f3a0 t soc15_pre_asic_init
-ffffffff81d8f3b0 t vega20_reset_hdp_ras_error_count
-ffffffff81d8f410 t vega20_get_pcie_usage
-ffffffff81d8f540 t soc15_update_hdp_light_sleep
+ffffffff81d8d290 T soc15_set_virt_ops
+ffffffff81d8d2b0 t soc15_reg_base_init
+ffffffff81d8d370 T soc15_set_ip_blocks
+ffffffff81d8d8a0 t soc15_common_early_init
+ffffffff81d8dbe0 t soc15_common_late_init
+ffffffff81d8dc60 t soc15_common_sw_init
+ffffffff81d8dcc0 t soc15_common_sw_fini
+ffffffff81d8dd10 t soc15_common_hw_init
+ffffffff81d8de30 t soc15_common_hw_fini
+ffffffff81d8df10 t soc15_common_suspend
+ffffffff81d8df50 t soc15_common_resume
+ffffffff81d8df90 t soc15_common_is_idle
+ffffffff81d8dfc0 t soc15_common_wait_for_idle
+ffffffff81d8dff0 t soc15_common_soft_reset
+ffffffff81d8e020 t soc15_common_set_clockgating_state
+ffffffff81d8e3d0 t soc15_common_set_powergating_state
+ffffffff81d8e400 t soc15_common_get_clockgating_state
+ffffffff81d8e4e0 t soc15_pcie_rreg
+ffffffff81d8e540 t soc15_pcie_wreg
+ffffffff81d8e5a0 t soc15_pcie_rreg64
+ffffffff81d8e600 t soc15_pcie_wreg64
+ffffffff81d8e660 t soc15_uvd_ctx_rreg
+ffffffff81d8e700 t soc15_uvd_ctx_wreg
+ffffffff81d8e780 t soc15_didt_rreg
+ffffffff81d8e810 t soc15_didt_wreg
+ffffffff81d8e890 t soc15_gc_cac_rreg
+ffffffff81d8e920 t soc15_gc_cac_wreg
+ffffffff81d8e9a0 t soc15_se_cac_rreg
+ffffffff81d8ea30 t soc15_se_cac_wreg
+ffffffff81d8eab0 t soc15_read_disabled_bios
+ffffffff81d8eae0 t soc15_read_bios_from_rom
+ffffffff81d8ebd0 t soc15_read_register
+ffffffff81d8ecd0 t soc15_vga_set_state
+ffffffff81d8ed00 t soc15_asic_reset
+ffffffff81d8eeb0 t soc15_asic_reset_method
+ffffffff81d8efd0 t soc15_get_xclk
+ffffffff81d8f020 t soc15_set_uvd_clocks
+ffffffff81d8f050 t soc15_set_vce_clocks
+ffffffff81d8f080 t soc15_get_config_memsize
+ffffffff81d8f0a0 t soc15_flush_hdp
+ffffffff81d8f0c0 t soc15_invalidate_hdp
+ffffffff81d8f120 t soc15_need_full_reset
+ffffffff81d8f150 t soc15_get_pcie_usage
+ffffffff81d8f280 t soc15_need_reset_on_init
+ffffffff81d8f2e0 t soc15_get_pcie_replay_count
+ffffffff81d8f350 t soc15_supports_baco
+ffffffff81d8f3b0 t soc15_pre_asic_init
+ffffffff81d8f3c0 t vega20_reset_hdp_ras_error_count
+ffffffff81d8f420 t vega20_get_pcie_usage
+ffffffff81d8f550 t soc15_update_hdp_light_sleep
 ffffffff81d90000 t tonga_ih_early_init
 ffffffff81d90050 t tonga_ih_sw_init
 ffffffff81d900d0 t tonga_ih_sw_fini
@@ -26666,45 +26668,45 @@ ffffffff81da7000 T vcn_v1_0_set_pg_for_begin_use
 ffffffff81da7140 T vcn_v1_0_ring_end_use
 ffffffff81da71b0 t vcn_v1_0_early_init
 ffffffff81da7320 t vcn_v1_0_sw_init
-ffffffff81da75a0 t vcn_v1_0_sw_fini
-ffffffff81da7600 t vcn_v1_0_hw_init
-ffffffff81da76e0 t vcn_v1_0_hw_fini
-ffffffff81da7790 t vcn_v1_0_suspend
-ffffffff81da7830 t vcn_v1_0_resume
-ffffffff81da7920 t vcn_v1_0_is_idle
-ffffffff81da7970 t vcn_v1_0_wait_for_idle
-ffffffff81da7a60 t vcn_v1_0_set_clockgating_state
-ffffffff81da7ad0 t vcn_v1_0_set_powergating_state
-ffffffff81da82f0 t vcn_v1_0_dec_ring_get_rptr
-ffffffff81da8340 t vcn_v1_0_dec_ring_get_wptr
-ffffffff81da8390 t vcn_v1_0_dec_ring_set_wptr
-ffffffff81da8400 t vcn_v1_0_dec_ring_emit_ib
-ffffffff81da8790 t vcn_v1_0_dec_ring_emit_fence
-ffffffff81da8db0 t vcn_v1_0_dec_ring_emit_vm_flush
-ffffffff81da8e20 t vcn_v1_0_dec_ring_insert_nop
-ffffffff81da8fa0 t vcn_v1_0_dec_ring_insert_start
-ffffffff81da9170 t vcn_v1_0_dec_ring_insert_end
-ffffffff81da9280 t vcn_v1_0_ring_begin_use
-ffffffff81da9320 t vcn_v1_0_dec_ring_emit_wreg
-ffffffff81da95d0 t vcn_v1_0_dec_ring_emit_reg_wait
-ffffffff81da9950 t vcn_v1_0_enc_ring_get_rptr
-ffffffff81da99b0 t vcn_v1_0_enc_ring_get_wptr
-ffffffff81da9a10 t vcn_v1_0_enc_ring_set_wptr
-ffffffff81da9a50 t vcn_v1_0_enc_ring_emit_ib
-ffffffff81da9c90 t vcn_v1_0_enc_ring_emit_fence
-ffffffff81da9ed0 t vcn_v1_0_enc_ring_emit_vm_flush
-ffffffff81da9f40 t vcn_v1_0_enc_ring_insert_end
-ffffffff81da9fd0 t vcn_v1_0_enc_ring_emit_wreg
-ffffffff81daa120 t vcn_v1_0_enc_ring_emit_reg_wait
-ffffffff81daa2e0 t vcn_v1_0_set_interrupt_state
-ffffffff81daa310 t vcn_v1_0_process_interrupt
-ffffffff81daa3b0 t vcn_v1_0_idle_work_handler
-ffffffff81daa530 t vcn_v1_0_pause_dpg_mode
-ffffffff81daade0 t vcn_v1_0_enable_clock_gating
-ffffffff81daaf50 t vcn_v1_0_disable_clock_gating
-ffffffff81dab140 t vcn_v1_0_start
-ffffffff81dad180 t vcn_1_0_enable_static_power_gating
-ffffffff81dad2f0 t vcn_v1_0_clock_gating_dpg_mode
+ffffffff81da7590 t vcn_v1_0_sw_fini
+ffffffff81da75f0 t vcn_v1_0_hw_init
+ffffffff81da76d0 t vcn_v1_0_hw_fini
+ffffffff81da7780 t vcn_v1_0_suspend
+ffffffff81da7820 t vcn_v1_0_resume
+ffffffff81da7910 t vcn_v1_0_is_idle
+ffffffff81da7960 t vcn_v1_0_wait_for_idle
+ffffffff81da7a50 t vcn_v1_0_set_clockgating_state
+ffffffff81da7ac0 t vcn_v1_0_set_powergating_state
+ffffffff81da82e0 t vcn_v1_0_dec_ring_get_rptr
+ffffffff81da8330 t vcn_v1_0_dec_ring_get_wptr
+ffffffff81da8380 t vcn_v1_0_dec_ring_set_wptr
+ffffffff81da83f0 t vcn_v1_0_dec_ring_emit_ib
+ffffffff81da8780 t vcn_v1_0_dec_ring_emit_fence
+ffffffff81da8da0 t vcn_v1_0_dec_ring_emit_vm_flush
+ffffffff81da8e10 t vcn_v1_0_dec_ring_insert_nop
+ffffffff81da8f90 t vcn_v1_0_dec_ring_insert_start
+ffffffff81da9160 t vcn_v1_0_dec_ring_insert_end
+ffffffff81da9270 t vcn_v1_0_ring_begin_use
+ffffffff81da9310 t vcn_v1_0_dec_ring_emit_wreg
+ffffffff81da95c0 t vcn_v1_0_dec_ring_emit_reg_wait
+ffffffff81da9940 t vcn_v1_0_enc_ring_get_rptr
+ffffffff81da99a0 t vcn_v1_0_enc_ring_get_wptr
+ffffffff81da9a00 t vcn_v1_0_enc_ring_set_wptr
+ffffffff81da9a40 t vcn_v1_0_enc_ring_emit_ib
+ffffffff81da9c80 t vcn_v1_0_enc_ring_emit_fence
+ffffffff81da9ec0 t vcn_v1_0_enc_ring_emit_vm_flush
+ffffffff81da9f30 t vcn_v1_0_enc_ring_insert_end
+ffffffff81da9fc0 t vcn_v1_0_enc_ring_emit_wreg
+ffffffff81daa110 t vcn_v1_0_enc_ring_emit_reg_wait
+ffffffff81daa2d0 t vcn_v1_0_set_interrupt_state
+ffffffff81daa300 t vcn_v1_0_process_interrupt
+ffffffff81daa3a0 t vcn_v1_0_idle_work_handler
+ffffffff81daa520 t vcn_v1_0_pause_dpg_mode
+ffffffff81daadd0 t vcn_v1_0_enable_clock_gating
+ffffffff81daaf40 t vcn_v1_0_disable_clock_gating
+ffffffff81dab130 t vcn_v1_0_start
+ffffffff81dad170 t vcn_1_0_enable_static_power_gating
+ffffffff81dad2e0 t vcn_v1_0_clock_gating_dpg_mode
 ffffffff81dae000 T vcn_v2_0_dec_ring_insert_start
 ffffffff81dae1c0 T vcn_v2_0_dec_ring_insert_end
 ffffffff81dae2c0 T vcn_v2_0_dec_ring_insert_nop
@@ -26722,28 +26724,28 @@ ffffffff81dafae0 T vcn_v2_0_enc_ring_emit_wreg
 ffffffff81dafc30 T vcn_v2_0_dec_ring_test_ring
 ffffffff81dafec0 t vcn_v2_0_early_init
 ffffffff81db0030 t vcn_v2_0_sw_init
-ffffffff81db0330 t vcn_v2_0_sw_fini
-ffffffff81db0390 t vcn_v2_0_hw_init
-ffffffff81db0b70 t vcn_v2_0_hw_fini
-ffffffff81db0c20 t vcn_v2_0_suspend
-ffffffff81db0cc0 t vcn_v2_0_resume
-ffffffff81db0d10 t vcn_v2_0_is_idle
-ffffffff81db0d60 t vcn_v2_0_wait_for_idle
-ffffffff81db0e50 t vcn_v2_0_set_clockgating_state
-ffffffff81db0ee0 t vcn_v2_0_set_powergating_state
-ffffffff81db1670 t vcn_v2_0_dec_ring_get_rptr
-ffffffff81db16c0 t vcn_v2_0_dec_ring_get_wptr
-ffffffff81db1730 t vcn_v2_0_dec_ring_set_wptr
-ffffffff81db17e0 t vcn_v2_0_enc_ring_get_rptr
-ffffffff81db1840 t vcn_v2_0_enc_ring_get_wptr
-ffffffff81db18d0 t vcn_v2_0_enc_ring_set_wptr
-ffffffff81db1950 t vcn_v2_0_set_interrupt_state
-ffffffff81db1980 t vcn_v2_0_process_interrupt
-ffffffff81db1a20 t vcn_v2_0_pause_dpg_mode
-ffffffff81db1f50 t vcn_v2_0_enable_clock_gating
-ffffffff81db2070 t vcn_v2_0_disable_clock_gating
-ffffffff81db2200 t vcn_v2_0_start
-ffffffff81db59d0 t vcn_v2_0_enable_static_power_gating
+ffffffff81db0320 t vcn_v2_0_sw_fini
+ffffffff81db0380 t vcn_v2_0_hw_init
+ffffffff81db0b60 t vcn_v2_0_hw_fini
+ffffffff81db0c10 t vcn_v2_0_suspend
+ffffffff81db0cb0 t vcn_v2_0_resume
+ffffffff81db0d00 t vcn_v2_0_is_idle
+ffffffff81db0d50 t vcn_v2_0_wait_for_idle
+ffffffff81db0e40 t vcn_v2_0_set_clockgating_state
+ffffffff81db0ed0 t vcn_v2_0_set_powergating_state
+ffffffff81db1660 t vcn_v2_0_dec_ring_get_rptr
+ffffffff81db16b0 t vcn_v2_0_dec_ring_get_wptr
+ffffffff81db1720 t vcn_v2_0_dec_ring_set_wptr
+ffffffff81db17d0 t vcn_v2_0_enc_ring_get_rptr
+ffffffff81db1830 t vcn_v2_0_enc_ring_get_wptr
+ffffffff81db18c0 t vcn_v2_0_enc_ring_set_wptr
+ffffffff81db1940 t vcn_v2_0_set_interrupt_state
+ffffffff81db1970 t vcn_v2_0_process_interrupt
+ffffffff81db1a10 t vcn_v2_0_pause_dpg_mode
+ffffffff81db1f40 t vcn_v2_0_enable_clock_gating
+ffffffff81db2060 t vcn_v2_0_disable_clock_gating
+ffffffff81db21f0 t vcn_v2_0_start
+ffffffff81db59c0 t vcn_v2_0_enable_static_power_gating
 ffffffff81db6000 t vcn_v2_5_early_init
 ffffffff81db62a0 t vcn_v2_5_sw_init
 ffffffff81db6790 t vcn_v2_5_sw_fini
@@ -26770,27 +26772,27 @@ ffffffff81db8b70 t vcn_v2_5_start
 ffffffff81dbc1a0 t vcn_v2_5_clock_gating_dpg_mode
 ffffffff81dbd000 t vcn_v3_0_early_init
 ffffffff81dbd2b0 t vcn_v3_0_sw_init
-ffffffff81dbd750 t vcn_v3_0_sw_fini
-ffffffff81dbd7b0 t vcn_v3_0_hw_init
-ffffffff81dbe140 t vcn_v3_0_hw_fini
-ffffffff81dbe240 t vcn_v3_0_suspend
-ffffffff81dbe260 t vcn_v3_0_resume
-ffffffff81dbe2b0 t vcn_v3_0_is_idle
-ffffffff81dbe360 t vcn_v3_0_wait_for_idle
-ffffffff81dbe490 t vcn_v3_0_set_clockgating_state
-ffffffff81dbe550 t vcn_v3_0_set_powergating_state
-ffffffff81dbee10 t vcn_v3_0_dec_ring_get_rptr
-ffffffff81dbee60 t vcn_v3_0_dec_ring_get_wptr
-ffffffff81dbeed0 t vcn_v3_0_dec_ring_set_wptr
-ffffffff81dbef40 t vcn_v3_0_enc_ring_get_rptr
-ffffffff81dbefc0 t vcn_v3_0_enc_ring_get_wptr
-ffffffff81dbf060 t vcn_v3_0_enc_ring_set_wptr
-ffffffff81dbf0f0 t vcn_v3_0_set_interrupt_state
-ffffffff81dbf120 t vcn_v3_0_process_interrupt
-ffffffff81dbf210 t vcn_v3_0_pause_dpg_mode
-ffffffff81dbf700 t vcn_v3_0_enable_clock_gating
-ffffffff81dbf7f0 t vcn_v3_0_disable_clock_gating
-ffffffff81dbfa30 t vcn_v3_0_start
+ffffffff81dbd740 t vcn_v3_0_sw_fini
+ffffffff81dbd7a0 t vcn_v3_0_hw_init
+ffffffff81dbe130 t vcn_v3_0_hw_fini
+ffffffff81dbe230 t vcn_v3_0_suspend
+ffffffff81dbe250 t vcn_v3_0_resume
+ffffffff81dbe2a0 t vcn_v3_0_is_idle
+ffffffff81dbe350 t vcn_v3_0_wait_for_idle
+ffffffff81dbe480 t vcn_v3_0_set_clockgating_state
+ffffffff81dbe540 t vcn_v3_0_set_powergating_state
+ffffffff81dbee00 t vcn_v3_0_dec_ring_get_rptr
+ffffffff81dbee50 t vcn_v3_0_dec_ring_get_wptr
+ffffffff81dbeec0 t vcn_v3_0_dec_ring_set_wptr
+ffffffff81dbef30 t vcn_v3_0_enc_ring_get_rptr
+ffffffff81dbefb0 t vcn_v3_0_enc_ring_get_wptr
+ffffffff81dbf050 t vcn_v3_0_enc_ring_set_wptr
+ffffffff81dbf0e0 t vcn_v3_0_set_interrupt_state
+ffffffff81dbf110 t vcn_v3_0_process_interrupt
+ffffffff81dbf200 t vcn_v3_0_pause_dpg_mode
+ffffffff81dbf6f0 t vcn_v3_0_enable_clock_gating
+ffffffff81dbf7e0 t vcn_v3_0_disable_clock_gating
+ffffffff81dbfa20 t vcn_v3_0_start
 ffffffff81dc4000 t vega10_ih_early_init
 ffffffff81dc4050 t vega10_ih_sw_init
 ffffffff81dc4150 t vega10_ih_sw_fini
@@ -26811,7 +26813,7 @@ ffffffff81dc4f90 t vega10_ih_disable_interrupts
 ffffffff81dc6000 T vega10_reg_base_init
 ffffffff81dc6150 T vega10_doorbell_index_init
 ffffffff81dc7000 T vega20_reg_base_init
-ffffffff81dc7150 T vega20_doorbell_index_init
+ffffffff81dc7160 T vega20_doorbell_index_init
 ffffffff81dc8000 T vi_srbm_select
 ffffffff81dc8040 T vi_set_virt_ops
 ffffffff81dc8070 T vi_set_ip_blocks
@@ -28347,7 +28349,7 @@ ffffffff81eac770 T dcn10_setup_vupdate_interrupt
 ffffffff81eac820 T dcn10_unblank_stream
 ffffffff81eac920 T dcn10_send_immediate_sdp_message
 ffffffff81eac980 T dcn10_set_clock
-ffffffff81eacaa0 T dcn10_get_clock
+ffffffff81eaca80 T dcn10_get_clock
 ffffffff81ead000 T snprintf_count
 ffffffff81ead080 T dcn10_clear_status_bits
 ffffffff81ead210 T dcn10_get_hw_state
@@ -28616,29 +28618,29 @@ ffffffff81ed7100 T dcn20_blank_pixel_data
 ffffffff81ed7300 T dcn20_enable_plane
 ffffffff81ed74c0 T dcn20_pipe_control_lock
 ffffffff81ed7710 T dcn20_program_front_end_for_ctx
-ffffffff81ed8ad0 T dcn20_post_unlock_program_front_end
-ffffffff81ed8cb0 T dcn20_prepare_bandwidth
-ffffffff81ed8d50 T dcn20_optimize_bandwidth
-ffffffff81ed8dc0 T dcn20_update_bandwidth
-ffffffff81ed8fb0 T dcn20_enable_writeback
-ffffffff81ed9100 T dcn20_disable_writeback
-ffffffff81ed9190 T dcn20_wait_for_blank_complete
-ffffffff81ed9230 T dcn20_dmdata_status_done
-ffffffff81ed9270 T dcn20_disable_stream_gating
-ffffffff81ed9310 T dcn20_enable_stream_gating
-ffffffff81ed93b0 T dcn20_set_dmdata_attributes
-ffffffff81ed9470 T dcn20_init_vm_ctx
-ffffffff81ed9530 T dcn20_init_sys_ctx
-ffffffff81ed95d0 T dcn20_update_plane_addr
-ffffffff81ed96f0 T dcn20_unblank_stream
-ffffffff81ed9840 T dcn20_setup_vupdate_interrupt
-ffffffff81ed98a0 T dcn20_reset_hw_ctx_wrap
-ffffffff81ed9c10 T dcn20_get_mpctree_visual_confirm_color
-ffffffff81ed9c70 T dcn20_update_mpcc
-ffffffff81ed9f10 T dcn20_enable_stream
-ffffffff81eda040 T dcn20_program_dmdata_engine
-ffffffff81eda0e0 T dcn20_fpga_init_hw
-ffffffff81eda6c0 T dcn20_optimize_timing_for_fsft
+ffffffff81ed8af0 T dcn20_post_unlock_program_front_end
+ffffffff81ed8cd0 T dcn20_prepare_bandwidth
+ffffffff81ed8d70 T dcn20_optimize_bandwidth
+ffffffff81ed8de0 T dcn20_update_bandwidth
+ffffffff81ed8fd0 T dcn20_enable_writeback
+ffffffff81ed9120 T dcn20_disable_writeback
+ffffffff81ed91b0 T dcn20_wait_for_blank_complete
+ffffffff81ed9250 T dcn20_dmdata_status_done
+ffffffff81ed9290 T dcn20_disable_stream_gating
+ffffffff81ed9330 T dcn20_enable_stream_gating
+ffffffff81ed93d0 T dcn20_set_dmdata_attributes
+ffffffff81ed9490 T dcn20_init_vm_ctx
+ffffffff81ed9550 T dcn20_init_sys_ctx
+ffffffff81ed95f0 T dcn20_update_plane_addr
+ffffffff81ed9710 T dcn20_unblank_stream
+ffffffff81ed9860 T dcn20_setup_vupdate_interrupt
+ffffffff81ed98c0 T dcn20_reset_hw_ctx_wrap
+ffffffff81ed9c30 T dcn20_get_mpctree_visual_confirm_color
+ffffffff81ed9c90 T dcn20_update_mpcc
+ffffffff81ed9f30 T dcn20_enable_stream
+ffffffff81eda060 T dcn20_program_dmdata_engine
+ffffffff81eda100 T dcn20_fpga_init_hw
+ffffffff81eda6e0 T dcn20_optimize_timing_for_fsft
 ffffffff81edb000 T dcn20_hw_sequencer_construct
 ffffffff81edc000 T enc2_fec_set_enable
 ffffffff81edc080 T enc2_fec_set_ready
@@ -28723,28 +28725,28 @@ ffffffff81ee46d0 T dcn20_populate_dml_writeback_from_c
 ffffffff81ee4850 T dcn20_populate_dml_pipes_from_context
 ffffffff81ee5640 T dcn20_calc_max_scaled_time
 ffffffff81ee56b0 T dcn20_set_mcif_arb_params
-ffffffff81ee5920 T dcn20_validate_dsc
-ffffffff81ee5ac0 T dcn20_find_secondary_pipe
-ffffffff81ee5ca0 T dcn20_validate_apply_pipe_split_flags
-ffffffff81ee6590 T dcn20_fast_validate_bw
-ffffffff81ee6cc0 T dcn20_calculate_dlg_params
-ffffffff81ee71a0 T dcn20_validate_bandwidth
-ffffffff81ee7200 t dcn20_validate_bandwidth_fp
-ffffffff81ee7380 T dcn20_acquire_idle_pipe_for_layer
-ffffffff81ee7490 T dcn20_get_dcc_compression_cap
-ffffffff81ee74c0 T dcn20_patch_unknown_plane_state
-ffffffff81ee7510 T dcn20_dwbc_create
-ffffffff81ee75f0 T dcn20_mmhubbub_create
-ffffffff81ee7710 T dcn20_cap_soc_clocks
-ffffffff81ee7a20 T dcn20_update_bounding_box
-ffffffff81ee7c60 T dcn20_patch_bounding_box
-ffffffff81ee7da0 T dcn20_create_resource_pool
-ffffffff81ee9950 t dcn20_validate_bandwidth_internal
-ffffffff81eea470 t dcn20_resource_destruct
-ffffffff81eea910 t dcn20_destroy_resource_pool
-ffffffff81eea970 t dcn20_panel_cntl_create
-ffffffff81eeaa00 t read_dce_straps
-ffffffff81eeaa20 t dcn20_create_audio
+ffffffff81ee5940 T dcn20_validate_dsc
+ffffffff81ee5ae0 T dcn20_find_secondary_pipe
+ffffffff81ee5cc0 T dcn20_validate_apply_pipe_split_flags
+ffffffff81ee65b0 T dcn20_fast_validate_bw
+ffffffff81ee6ce0 T dcn20_calculate_dlg_params
+ffffffff81ee71c0 T dcn20_validate_bandwidth
+ffffffff81ee7220 t dcn20_validate_bandwidth_fp
+ffffffff81ee73a0 T dcn20_acquire_idle_pipe_for_layer
+ffffffff81ee74b0 T dcn20_get_dcc_compression_cap
+ffffffff81ee74e0 T dcn20_patch_unknown_plane_state
+ffffffff81ee7530 T dcn20_dwbc_create
+ffffffff81ee7610 T dcn20_mmhubbub_create
+ffffffff81ee7730 T dcn20_cap_soc_clocks
+ffffffff81ee7a40 T dcn20_update_bounding_box
+ffffffff81ee7c80 T dcn20_patch_bounding_box
+ffffffff81ee7dc0 T dcn20_create_resource_pool
+ffffffff81ee9970 t dcn20_validate_bandwidth_internal
+ffffffff81eea490 t dcn20_resource_destruct
+ffffffff81eea930 t dcn20_destroy_resource_pool
+ffffffff81eea990 t dcn20_panel_cntl_create
+ffffffff81eeaa20 t read_dce_straps
+ffffffff81eeaa40 t dcn20_create_audio
 ffffffff81eeb000 T enc2_set_dynamic_metadata
 ffffffff81eeb280 T enc2_stream_encoder_dp_unblank
 ffffffff81eeb5a0 T enc2_stream_encoder_dp_set_stream_attribute
@@ -28876,8 +28878,8 @@ ffffffff81f08750 t dwb3_get_caps
 ffffffff81f087f0 T dcn30_dwbc_construct
 ffffffff81f08840 T dwb3_set_host_read_rate_control
 ffffffff81f09000 T dwb3_ogam_set_input_transfer_func
-ffffffff81f09880 T dwb3_set_gamut_remap
-ffffffff81f09b20 T dwb3_program_hdr_mult
+ffffffff81f09a30 T dwb3_set_gamut_remap
+ffffffff81f09cf0 T dwb3_program_hdr_mult
 ffffffff81f0a000 T hubbub3_init_dchub_sys_ctx
 ffffffff81f0a1f0 T hubbub3_program_watermarks
 ffffffff81f0a300 T hubbub3_dcc_support_swizzle
@@ -28903,11 +28905,11 @@ ffffffff81f0d710 T dcn30_mmhubbub_warmup
 ffffffff81f0d9b0 T dcn30_enable_writeback
 ffffffff81f0da80 T dcn30_disable_writeback
 ffffffff81f0db60 T dcn30_program_all_writeback_pipes_in_tree
-ffffffff81f0de90 T dcn30_init_hw
-ffffffff81f0e670 T dcn30_set_avmute
-ffffffff81f0e6d0 T dcn30_update_info_frame
-ffffffff81f0e770 T dcn30_program_dmdata_engine
-ffffffff81f0e810 T dcn30_apply_idle_power_optimizations
+ffffffff81f0de60 T dcn30_init_hw
+ffffffff81f0e640 T dcn30_set_avmute
+ffffffff81f0e6a0 T dcn30_update_info_frame
+ffffffff81f0e740 T dcn30_program_dmdata_engine
+ffffffff81f0e7e0 T dcn30_apply_idle_power_optimizations
 ffffffff81f0f000 T dcn30_hw_sequencer_construct
 ffffffff81f10000 T mmhubbub3_config_mcif_buf
 ffffffff81f104a0 t mmhubbub3_warmup_mcif
@@ -28959,14 +28961,14 @@ ffffffff81f17af0 T dcn30_release_post_bldn_3dlut
 ffffffff81f17b90 T dcn30_calculate_wm_and_dlg
 ffffffff81f18460 T dcn30_validate_bandwidth
 ffffffff81f19610 T dcn30_update_bw_bounding_box
-ffffffff81f19e30 T dcn30_create_resource_pool
-ffffffff81f1b470 t dcn30_split_stream_for_mpc_or_odm
-ffffffff81f1b710 t dcn30_resource_destruct
-ffffffff81f1bc70 t dcn30_destroy_resource_pool
-ffffffff81f1bcd0 t dcn30_panel_cntl_create
-ffffffff81f1bd60 t dcn30_link_encoder_create
-ffffffff81f1be10 t read_dce_straps
-ffffffff81f1be30 t dcn30_create_audio
+ffffffff81f19f90 T dcn30_create_resource_pool
+ffffffff81f1b5d0 t dcn30_split_stream_for_mpc_or_odm
+ffffffff81f1b870 t dcn30_resource_destruct
+ffffffff81f1bdd0 t dcn30_destroy_resource_pool
+ffffffff81f1be30 t dcn30_panel_cntl_create
+ffffffff81f1bec0 t dcn30_link_encoder_create
+ffffffff81f1bf70 t read_dce_straps
+ffffffff81f1bf90 t dcn30_create_audio
 ffffffff81f1c000 T vpg3_construct
 ffffffff81f1c050 t vpg3_update_generic_info_packet
 ffffffff81f1d000 T dml20_recalculate
@@ -29694,53 +29696,53 @@ ffffffff81fd7660 T smu7_powergate_gfx
 ffffffff81fd8000 T smu7_get_sleep_divider_id_from_clock
 ffffffff81fd80a0 T smu7_init_function_pointers
 ffffffff81fd8100 t smu7_hwmgr_backend_init
-ffffffff81fd9e50 t smu7_hwmgr_backend_fini
-ffffffff81fd9ec0 t smu7_setup_asic_task
-ffffffff81fda220 t smu7_get_power_state_size
-ffffffff81fda250 t smu7_apply_state_adjust_rules
-ffffffff81fda580 t smu7_force_dpm_level
-ffffffff81fda9e0 t smu7_enable_dpm_tasks
-ffffffff81fdcfd0 t smu7_disable_dpm_tasks
-ffffffff81fdd710 t smu7_dpm_patch_boot_state
-ffffffff81fdd850 t smu7_get_pp_table_entry
-ffffffff81fddc40 t smu7_get_number_of_powerplay_table_entries
-ffffffff81fddca0 t smu7_dpm_get_mclk
-ffffffff81fddd40 t smu7_dpm_get_sclk
-ffffffff81fddde0 t smu7_set_power_state_tasks
-ffffffff81fdeb10 t smu7_notify_smc_display_config_after_ps_adjustment
-ffffffff81fdeb60 t smu7_display_configuration_changed_task
-ffffffff81fded10 t smu7_set_max_fan_rpm_output
-ffffffff81fded30 t smu7_set_max_fan_pwm_output
-ffffffff81fded50 t smu7_set_fan_control_mode
-ffffffff81fdede0 t smu7_get_fan_control_mode
-ffffffff81fdee20 t smu7_register_irq_handlers
-ffffffff81fdeec0 t smu7_check_smc_update_required_for_display_configuration
-ffffffff81fdef50 t smu7_check_states_equal
-ffffffff81fdf0f0 t smu7_get_performance_level
-ffffffff81fdf180 t smu7_get_clock_by_type
-ffffffff81fdf360 t smu7_get_clock_by_type_with_latency
-ffffffff81fdf4b0 t smu7_get_max_high_clocks
-ffffffff81fdf530 t smu7_power_off_asic
-ffffffff81fdf580 t smu7_force_clock_level
-ffffffff81fdf690 t smu7_print_clock_levels
-ffffffff81fdfc40 t smu7_get_sclk_od
-ffffffff81fdfca0 t smu7_set_sclk_od
-ffffffff81fdfd60 t smu7_get_mclk_od
-ffffffff81fdfdc0 t smu7_set_mclk_od
-ffffffff81fdfe80 t smu7_read_sensor
-ffffffff81fe0130 t smu7_avfs_control
-ffffffff81fe0200 t smu7_notify_cac_buffer_info
-ffffffff81fe03a0 t smu7_get_thermal_temperature_range
-ffffffff81fe0430 t smu7_get_power_profile_mode
-ffffffff81fe06a0 t smu7_set_power_profile_mode
-ffffffff81fe0900 t smu7_odn_edit_dpm_table
-ffffffff81fe0ab0 t phm_add_voltage
-ffffffff81fe0bc0 t smu7_get_profiling_clk
-ffffffff81fe0d80 t smu7_check_dpm_table_updated
-ffffffff81fe0ec0 t smu7_odn_initial_default_setting
-ffffffff81fe0fe0 t smu7_set_dpm_event_sources
-ffffffff81fe1100 t smu7_get_pp_table_entry_callback_func_v0
-ffffffff81fe1600 t smu7_get_pp_table_entry_callback_func_v1
+ffffffff81fd9de0 t smu7_hwmgr_backend_fini
+ffffffff81fd9e50 t smu7_setup_asic_task
+ffffffff81fda1b0 t smu7_get_power_state_size
+ffffffff81fda1e0 t smu7_apply_state_adjust_rules
+ffffffff81fda510 t smu7_force_dpm_level
+ffffffff81fda970 t smu7_enable_dpm_tasks
+ffffffff81fdcf60 t smu7_disable_dpm_tasks
+ffffffff81fdd6a0 t smu7_dpm_patch_boot_state
+ffffffff81fdd7e0 t smu7_get_pp_table_entry
+ffffffff81fddbd0 t smu7_get_number_of_powerplay_table_entries
+ffffffff81fddc30 t smu7_dpm_get_mclk
+ffffffff81fddcd0 t smu7_dpm_get_sclk
+ffffffff81fddd70 t smu7_set_power_state_tasks
+ffffffff81fdeaa0 t smu7_notify_smc_display_config_after_ps_adjustment
+ffffffff81fdeaf0 t smu7_display_configuration_changed_task
+ffffffff81fdeca0 t smu7_set_max_fan_rpm_output
+ffffffff81fdecc0 t smu7_set_max_fan_pwm_output
+ffffffff81fdece0 t smu7_set_fan_control_mode
+ffffffff81fded70 t smu7_get_fan_control_mode
+ffffffff81fdedb0 t smu7_register_irq_handlers
+ffffffff81fdee50 t smu7_check_smc_update_required_for_display_configuration
+ffffffff81fdeee0 t smu7_check_states_equal
+ffffffff81fdf080 t smu7_get_performance_level
+ffffffff81fdf110 t smu7_get_clock_by_type
+ffffffff81fdf2f0 t smu7_get_clock_by_type_with_latency
+ffffffff81fdf440 t smu7_get_max_high_clocks
+ffffffff81fdf4c0 t smu7_power_off_asic
+ffffffff81fdf510 t smu7_force_clock_level
+ffffffff81fdf620 t smu7_print_clock_levels
+ffffffff81fdfbd0 t smu7_get_sclk_od
+ffffffff81fdfc30 t smu7_set_sclk_od
+ffffffff81fdfcf0 t smu7_get_mclk_od
+ffffffff81fdfd50 t smu7_set_mclk_od
+ffffffff81fdfe10 t smu7_read_sensor
+ffffffff81fe00c0 t smu7_avfs_control
+ffffffff81fe0190 t smu7_notify_cac_buffer_info
+ffffffff81fe0330 t smu7_get_thermal_temperature_range
+ffffffff81fe03c0 t smu7_get_power_profile_mode
+ffffffff81fe0630 t smu7_set_power_profile_mode
+ffffffff81fe0890 t smu7_odn_edit_dpm_table
+ffffffff81fe0a40 t phm_add_voltage
+ffffffff81fe0b50 t smu7_get_profiling_clk
+ffffffff81fe0d10 t smu7_check_dpm_table_updated
+ffffffff81fe0e50 t smu7_odn_initial_default_setting
+ffffffff81fe0f70 t smu7_set_dpm_event_sources
+ffffffff81fe1090 t smu7_get_pp_table_entry_callback_func_v0
+ffffffff81fe1590 t smu7_get_pp_table_entry_callback_func_v1
 ffffffff81fe3000 T smu7_enable_didt_config
 ffffffff81fe32b0 t smu7_program_pt_config_registers
 ffffffff81fe34a0 t smu7_enable_didt
@@ -35440,17 +35442,17 @@ ffffffff82283000 r isomappings
 ffffffff82283080 r unimappings
 ffffffff82283230 r replacements
 ffffffff82286a23 r cmd0646_9_tim_udma
-ffffffff822d0a4c r pp_r600_decoded_lanes
-ffffffff822e911d r cmd680_setup_channel.udma_tbl
-ffffffff822effb7 r apollo_udma33_tim
-ffffffff822f523c r substchar
-ffffffff822f71f9 r apollo_udma100_tim
-ffffffff8231a60c r apollo_udma66_tim
-ffffffff82320f98 r apollo_pio_rec
-ffffffff8232ea75 r cy_pio_rec
-ffffffff82358d0f r apollo_udma133_tim
-ffffffff82364158 R drm_filtops
-ffffffff82364188 R drmread_filtops
+ffffffff822d0a55 r pp_r600_decoded_lanes
+ffffffff822e9104 r cmd680_setup_channel.udma_tbl
+ffffffff822eff9e r apollo_udma33_tim
+ffffffff822f5223 r substchar
+ffffffff822f71e0 r apollo_udma100_tim
+ffffffff8231a5f3 r apollo_udma66_tim
+ffffffff82320f7f r apollo_pio_rec
+ffffffff8232ea5c r cy_pio_rec
+ffffffff82358cd1 r apollo_udma133_tim
+ffffffff82364118 R drm_filtops
+ffffffff82364148 R drmread_filtops
 ffffffff82365000 r vga_emulops
 ffffffff82365048 R vga_stdscreen
 ffffffff82365078 R vga_stdscreen_mono
@@ -35486,11 +35488,11 @@ ffffffff823654e0 r amdgpu_ih_clientid_vcns
 ffffffff82365510 r vga_setfontset.cmaptabb
 ffffffff82365560 r i830_bc_wm_info
 ffffffff823655f8 r iwn_tid2fifo
-ffffffff82365608 r vga_setfontset.cmaptaba
-ffffffff82365610 r crtc_offsets
-ffffffff82365610 r crtc_offsets
-ffffffff82365610 r crtc_offsets
-ffffffff82365678 r rtwn_r88e_get_rssi.cckoff
+ffffffff82365610 r vga_setfontset.cmaptaba
+ffffffff82365618 r crtc_offsets
+ffffffff82365618 r crtc_offsets
+ffffffff82365618 r crtc_offsets
+ffffffff82365680 r rtwn_r88e_get_rssi.cckoff
 ffffffff82366000 R edid_vendors
 ffffffff823662c0 R edid_nvendors
 ffffffff823662d0 R edid_products
@@ -48270,12 +48272,11 @@ ffffffff831f8004 b dcn30_program_all_writeback_pipes_i
 ffffffff831f8008 b dcn30_program_all_writeback_pipes_in_tree.__warned.8
 ffffffff831f800c b dcn30_program_all_writeback_pipes_in_tree.__warned.10
 ffffffff831f8010 b dcn30_program_all_writeback_pipes_in_tree.__warned.12
-ffffffff831f8014 b dcn30_program_all_writeback_pipes_in_tree.__warned.14
-ffffffff831f8018 b dcn30_update_info_frame.__warned
-ffffffff831f801c b dcn30_set_writeback.__warned
+ffffffff831f8014 b dcn30_update_info_frame.__warned
+ffffffff831f8018 b dcn30_set_writeback.__warned
+ffffffff831f801c b dcn30_set_writeback.__warned.17
 ffffffff831f8020 b dcn30_set_writeback.__warned.19
 ffffffff831f8024 b dcn30_set_writeback.__warned.21
-ffffffff831f8028 b dcn30_set_writeback.__warned.23
 ffffffff831f9000 b optc3_set_odm_combine.__warned
 ffffffff831fa000 b dcn30_acquire_post_bldn_3dlut.__warned
 ffffffff831fa004 b dcn30_internal_validate_bw.__warned