--- 2021-08-02T18:57:01Z/2021-07-15T00:00:00Z/nm-bsd-ot14.txt Wed Aug 4 07:08:33 2021 +++ 2021-08-02T18:57:01Z/2021-07-16T00:00:00Z/nm-bsd-ot14.txt Wed Aug 4 09:56:02 2021 @@ -18026,21 +18026,21 @@ ffffffff818f9430 T drm_bridge_chain_disable ffffffff818f94c0 T drm_bridge_chain_post_disable ffffffff818f9540 T drm_bridge_chain_mode_set ffffffff818f95d0 T drm_bridge_chain_pre_enable -ffffffff818f9640 T drm_bridge_chain_enable -ffffffff818f96c0 T drm_atomic_bridge_chain_disable -ffffffff818f97c0 T drm_atomic_bridge_chain_post_disable -ffffffff818f98d0 T drm_atomic_bridge_chain_pre_enable -ffffffff818f99d0 T drm_atomic_bridge_chain_enable -ffffffff818f9ae0 T drm_atomic_bridge_chain_check -ffffffff818f9e50 T drm_bridge_detect -ffffffff818f9ea0 T drm_bridge_get_modes -ffffffff818f9ef0 T drm_bridge_get_edid -ffffffff818f9f40 T drm_bridge_hpd_enable -ffffffff818fa010 T drm_bridge_hpd_disable -ffffffff818fa0b0 T drm_bridge_hpd_notify -ffffffff818fa110 t drm_bridge_atomic_duplicate_priv_state -ffffffff818fa150 t drm_bridge_atomic_destroy_priv_state -ffffffff818fa170 t select_bus_fmt_recursive +ffffffff818f9660 T drm_bridge_chain_enable +ffffffff818f96e0 T drm_atomic_bridge_chain_disable +ffffffff818f97e0 T drm_atomic_bridge_chain_post_disable +ffffffff818f98f0 T drm_atomic_bridge_chain_pre_enable +ffffffff818f99f0 T drm_atomic_bridge_chain_enable +ffffffff818f9b00 T drm_atomic_bridge_chain_check +ffffffff818f9e70 T drm_bridge_detect +ffffffff818f9ec0 T drm_bridge_get_modes +ffffffff818f9f10 T drm_bridge_get_edid +ffffffff818f9f60 T drm_bridge_hpd_enable +ffffffff818fa030 T drm_bridge_hpd_disable +ffffffff818fa0d0 T drm_bridge_hpd_notify +ffffffff818fa130 t drm_bridge_atomic_duplicate_priv_state +ffffffff818fa170 t drm_bridge_atomic_destroy_priv_state +ffffffff818fa190 t select_bus_fmt_recursive ffffffff818fb000 T drm_clflush_pages ffffffff818fb130 T drm_clflush_sg ffffffff818fb270 T drm_clflush_virt_range @@ -26884,9 +26884,9 @@ ffffffff81ddf480 t amdgpu_dm_mst_connector_early_unreg ffffffff81ddf4a0 t dm_dp_mst_connector_destroy ffffffff81ddf510 t dm_dp_mst_get_modes ffffffff81ddf730 t dm_dp_mst_detect -ffffffff81ddf760 t dm_mst_atomic_best_encoder -ffffffff81ddf7a0 t dm_dp_mst_atomic_check -ffffffff81ddf840 t set_dsc_configs_from_fairness_vars +ffffffff81ddf790 t dm_mst_atomic_best_encoder +ffffffff81ddf7d0 t dm_dp_mst_atomic_check +ffffffff81ddf870 t set_dsc_configs_from_fairness_vars ffffffff81de0000 T dm_pp_apply_display_requirements ffffffff81de0220 T dm_pp_get_clock_levels_by_type ffffffff81de0670 T dm_pp_get_clock_levels_by_type_with_latency